xf86-video-intel-2.99.917/0000775000175000017500000000000012445556132012016 500000000000000xf86-video-intel-2.99.917/tools/0000775000175000017500000000000012445556132013156 500000000000000xf86-video-intel-2.99.917/tools/Makefile.am0000664000175000017500000000440612400044327015123 00000000000000# Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL # ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER # IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. AM_CFLAGS = \ @CWARNFLAGS@ \ @NOWARNFLAGS@ \ $(NULL) drivermandir = $(DRIVER_MAN_DIR) policydir = $(datarootdir)/polkit-1/actions if BUILD_TOOLS bin_PROGRAMS = intel-virtual-output driverman_DATA = intel-virtual-output.$(DRIVER_MAN_SUFFIX) endif if BUILD_BACKLIGHT_HELPER libexec_PROGRAMS = xf86-video-intel-backlight-helper nodist_policy_DATA = org.x.xf86-video-intel.backlight-helper.policy backlight_helper = $(libexecdir)/xf86-video-intel-backlight-helper install-exec-hook: -chown root $(DESTDIR)$(backlight_helper) && chmod u+s $(DESTDIR)$(backlight_helper) endif intel_virtual_output_CFLAGS = \ @CWARNFLAGS@ \ $(IVO_CFLAGS) \ @NOWARNFLAGS@ \ $(NULL) intel_virtual_output_SOURCES = \ virtual.c \ $(NULL) intel_virtual_output_LDADD = \ $(IVO_LIBS) \ $(NULL) xf86_video_intel_backlight_helper_SOURCES = \ backlight_helper.c \ $(NULL) EXTRA_DIST = intel-virtual-output.man org.x.xf86-video-intel.backlight-helper.policy.in CLEANFILES = $(driverman_DATA) $(nodist_policy_DATA) # String replacements in MAN_SUBSTS now come from xorg-macros.m4 via configure SUFFIXES = .$(DRIVER_MAN_SUFFIX) .man .man.$(DRIVER_MAN_SUFFIX): $(AM_V_GEN)$(SED) $(MAN_SUBSTS) < $< > $@ xf86-video-intel-2.99.917/tools/org.x.xf86-video-intel.backlight-helper.policy.in0000664000175000017500000000153612400044327024166 00000000000000 The X.Org project https://01.org/linuxgraphics/community/xf86-video-intel brightness Modify lcd panel brightness Authentication is required to modify the lcd panel brightness no no yes @LIBEXEC_PATH@/xf86-video-intel-backlight-helper xf86-video-intel-2.99.917/tools/virtual.c0000664000175000017500000026030312444634673014742 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #if HAVE_X11_EXTENSIONS_SHMPROTO_H #include #elif HAVE_X11_EXTENSIONS_SHMSTR_H #include #else #error Failed to find the right header for X11 MIT-SHM protocol definitions #endif #include #if HAVE_X11_EXTENSIONS_XINERAMA_H #include #define USE_XINERAMA #endif #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #define FORCE_FULL_REDRAW 0 #define FORCE_16BIT_XFER 0 #define DBG(v, x) if (verbose & v) printf x static int verbose; #define X11 0x1 #define XRR 0x1 #define TIMER 0x4 #define DRAW 0x8 #define DAMAGE 0x10 #define CURSOR 0x20 #define POLL 0x40 struct display { Display *dpy; struct clone *clone; struct context *ctx; int damage_event, damage_error; int xfixes_event, xfixes_error; int rr_event, rr_error, rr_active; int xinerama_event, xinerama_error, xinerama_active; int dri3_active; Window root; Visual *visual; Damage damage; int width; int height; int depth; XRenderPictFormat *root_format; XRenderPictFormat *rgb16_format; XRenderPictFormat *rgb24_format; int has_shm; int has_shm_pixmap; int shm_opcode; int shm_event; Cursor invisible_cursor; Cursor visible_cursor; XcursorImage cursor_image; int cursor_serial; int cursor_x; int cursor_y; int cursor_moved; int cursor_visible; int cursor; int flush; int send; int skip_clone; int skip_frame; }; struct output { struct display *display; Display *dpy; char *name; RROutput rr_output; RRCrtc rr_crtc; Window window; Picture win_picture; Picture pix_picture; Pixmap pixmap; GC gc; long serial; int use_shm; int use_shm_pixmap; XShmSegmentInfo shm; XRenderPictFormat *use_render; int x, y; XRRModeInfo mode; Rotation rotation; }; struct clone { struct clone *next; struct clone *active; struct output src, dst; long timestamp; XShmSegmentInfo shm; XImage image; int width, height, depth; struct { int x1, x2, y1, y2; } damaged; int rr_update; struct dri3_fence { XID xid; void *addr; } dri3; }; struct context { struct display *display; struct clone *clones; struct clone *active; struct pollfd *pfd; #define timer pfd[0].fd Display *record; int nclone; int ndisplay; int nfd; int timer_active; long timestamp; long configTimestamp; Atom singleton; char command[1024]; int command_continuation; }; static inline int is_power_of_2(unsigned long n) { return n && ((n & (n - 1)) == 0); } static int xlib_vendor_is_xorg(Display *dpy) { const char *const vendor = ServerVendor(dpy); return strstr(vendor, "X.Org") || strstr(vendor, "Xorg"); } static inline XRRScreenResources *_XRRGetScreenResourcesCurrent(Display *dpy, Window window) { XRRScreenResources *res; res = XRRGetScreenResourcesCurrent(dpy, window); if (res == NULL) res = XRRGetScreenResources(dpy, window); return res; } #define XORG_VERSION_ENCODE(major,minor,patch,snap) \ (((major) * 10000000) + ((minor) * 100000) + ((patch) * 1000) + snap) static int _x_error_occurred; static int _check_error_handler(Display *display, XErrorEvent *event) { DBG(X11, ("X11 error from display %s, serial=%ld, error=%d, req=%d.%d\n", DisplayString(display), event->serial, event->error_code, event->request_code, event->minor_code)); _x_error_occurred = 1; return False; /* ignored */ } static int can_use_shm(Display *dpy, Window window, int *shm_event, int *shm_opcode, int *shm_pixmap) { XShmSegmentInfo shm; Status success; XExtCodes *codes; int major, minor, has_shm, has_pixmap; if (!XShmQueryExtension(dpy)) return 0; XShmQueryVersion(dpy, &major, &minor, &has_pixmap); shm.shmid = shmget(IPC_PRIVATE, 0x1000, IPC_CREAT | 0600); if (shm.shmid == -1) return 0; shm.readOnly = 0; shm.shmaddr = shmat(shm.shmid, NULL, 0); if (shm.shmaddr == (char *) -1) { shmctl(shm.shmid, IPC_RMID, NULL); return 0; } XSync(dpy, False); _x_error_occurred = 0; success = XShmAttach(dpy, &shm); XSync(dpy, False); has_shm = success && _x_error_occurred == 0; /* As libXext sets the SEND_EVENT bit in the ShmCompletionEvent, * the Xserver may crash if it does not take care when processing * the event type. For instance versions of Xorg prior to 1.11.1 * exhibited this bug, and was fixed by: * * commit 2d2dce558d24eeea0eb011ec9ebaa6c5c2273c39 * Author: Sam Spilsbury * Date: Wed Sep 14 09:58:34 2011 +0800 * * Remove the SendEvent bit (0x80) before doing range checks on event type. */ codes = 0; if (has_shm) codes = XInitExtension(dpy, SHMNAME); if (xlib_vendor_is_xorg(dpy) && VendorRelease(dpy) < XORG_VERSION_ENCODE(1,11,0,1)) codes = 0; if (codes) { XShmCompletionEvent e; memset(&e, 0, sizeof(e)); e.type = codes->first_event; e.send_event = 1; e.serial = 1; e.drawable = window; e.major_code = codes->major_opcode; e.minor_code = X_ShmPutImage; e.shmseg = shm.shmid; e.offset = 0; XSendEvent(dpy, e.drawable, False, 0, (XEvent *)&e); XSync(dpy, False); if (_x_error_occurred == 0) { *shm_opcode = codes->major_opcode; *shm_event = codes->first_event; *shm_pixmap = has_pixmap; } } XShmDetach(dpy, &shm); shmctl(shm.shmid, IPC_RMID, NULL); shmdt(shm.shmaddr); return has_shm; } #ifdef DRI3 #include #include #include #include #include static Pixmap dri3_create_pixmap(Display *dpy, Drawable draw, int width, int height, int depth, int fd, int bpp, int stride, int size) { xcb_connection_t *c = XGetXCBConnection(dpy); xcb_pixmap_t pixmap = xcb_generate_id(c); xcb_dri3_pixmap_from_buffer(c, pixmap, draw, size, width, height, stride, depth, bpp, fd); return pixmap; } static int dri3_create_fd(Display *dpy, Pixmap pixmap, int *stride) { xcb_connection_t *c = XGetXCBConnection(dpy); xcb_dri3_buffer_from_pixmap_cookie_t cookie; xcb_dri3_buffer_from_pixmap_reply_t *reply; cookie = xcb_dri3_buffer_from_pixmap(c, pixmap); reply = xcb_dri3_buffer_from_pixmap_reply(c, cookie, NULL); if (!reply) return -1; if (reply->nfd != 1) return -1; *stride = reply->stride; return xcb_dri3_buffer_from_pixmap_reply_fds(c, reply)[0]; } static int dri3_query_version(Display *dpy, int *major, int *minor) { xcb_connection_t *c = XGetXCBConnection(dpy); xcb_dri3_query_version_reply_t *reply; *major = *minor = -1; reply = xcb_dri3_query_version_reply(c, xcb_dri3_query_version(c, XCB_DRI3_MAJOR_VERSION, XCB_DRI3_MINOR_VERSION), NULL); if (reply == NULL) return -1; *major = reply->major_version; *minor = reply->minor_version; free(reply); return 0; } static int dri3_exists(Display *dpy) { int major, minor; if (dri3_query_version(dpy, &major, &minor) < 0) return 0; return major >= 0; } static void dri3_create_fence(Display *dpy, Drawable d, struct dri3_fence *fence) { xcb_connection_t *c = XGetXCBConnection(dpy); struct dri3_fence f; int fd; fd = xshmfence_alloc_shm(); if (fd < 0) return; f.addr = xshmfence_map_shm(fd); if (f.addr == NULL) { close(fd); return; } f.xid = xcb_generate_id(c); xcb_dri3_fence_from_fd(c, d, f.xid, 0, fd); *fence = f; } static void dri3_fence_flush(Display *dpy, struct dri3_fence *fence) { xcb_sync_trigger_fence(XGetXCBConnection(dpy), fence->xid); } static void dri3_fence_free(Display *dpy, struct dri3_fence *fence) { xshmfence_unmap_shm(fence->addr); xcb_sync_destroy_fence(XGetXCBConnection(dpy), fence->xid); } #else static int dri3_exists(Display *dpy) { return 0; } static void dri3_create_fence(Display *dpy, Drawable d, struct dri3_fence *fence) { } static void dri3_fence_flush(Display *dpy, struct dri3_fence *fence) { } static void dri3_fence_free(Display *dpy, struct dri3_fence *fence) { } static Pixmap dri3_create_pixmap(Display *dpy, Drawable draw, int width, int height, int depth, int fd, int bpp, int stride, int size) { return None; } static int dri3_create_fd(Display *dpy, Pixmap pixmap, int *stride) { return -1; } #endif static int timerfd(int hz) { struct itimerspec it; int fd; fd = -1; #ifdef CLOCK_MONOTONIC_COARSE fd = timerfd_create(CLOCK_MONOTONIC_COARSE, TFD_NONBLOCK); #endif if (fd < 0) fd = timerfd_create(CLOCK_MONOTONIC, TFD_NONBLOCK); if (fd < 0) return -ETIME; it.it_interval.tv_sec = 0; it.it_interval.tv_nsec = 1000000000 / hz; it.it_value = it.it_interval; if (timerfd_settime(fd, 0, &it, NULL) < 0) { close(fd); return -ETIME; } return fd; } static int context_init(struct context *ctx) { struct pollfd *pfd; memset(ctx, 0, sizeof(*ctx)); ctx->pfd = malloc(2*sizeof(struct pollfd)); if (ctx->pfd == NULL) return -ENOMEM; ctx->clones = malloc(sizeof(struct clone)); if (ctx->clones == NULL) return -ENOMEM; ctx->display = malloc(sizeof(struct display)); if (ctx->display == NULL) return -ENOMEM; pfd = memset(&ctx->pfd[ctx->nfd++], 0, sizeof(struct pollfd)); pfd->fd = timerfd(60); if (pfd->fd < 0) return pfd->fd; pfd->events = POLLIN; return 0; } static void context_enable_timer(struct context *ctx) { uint64_t count; DBG(TIMER, ("%s timer active? %d\n", __func__, ctx->timer_active)); if (ctx->timer_active) return; /* reset timer */ count = read(ctx->timer, &count, sizeof(count)); ctx->timer_active = 1; } static int add_fd(struct context *ctx, int fd) { struct pollfd *pfd; if (fd < 0) return fd; if (is_power_of_2(ctx->nfd)) { ctx->pfd = realloc(ctx->pfd, 2*ctx->nfd*sizeof(struct pollfd)); if (ctx->pfd == NULL) return -ENOMEM; } pfd = memset(&ctx->pfd[ctx->nfd++], 0, sizeof(struct pollfd)); pfd->fd = fd; pfd->events = POLLIN; return 0; } static void display_mark_flush(struct display *display) { DBG(DRAW, ("%s mark flush (flush=%d)\n", DisplayString(display->dpy), display->flush)); if (display->flush) return; context_enable_timer(display->ctx); display->flush = 1; } static int mode_equal(const XRRModeInfo *a, const XRRModeInfo *b) { return (a->width == b->width && a->height == b->height && a->dotClock == b->dotClock && a->hSyncStart == b->hSyncStart && a->hSyncEnd == b->hSyncEnd && a->hTotal == b->hTotal && a->hSkew == b->hSkew && a->vSyncStart == b->vSyncStart && a->vSyncEnd == b->vSyncEnd && a->vTotal == b->vTotal && a->modeFlags == b->modeFlags); } static XRRModeInfo *lookup_mode(XRRScreenResources *res, int id) { int i; for (i = 0; i < res->nmode; i++) { if (res->modes[i].id == id) return &res->modes[i]; } return NULL; } static void clone_update_edid(struct clone *clone) { unsigned long nitems, after; unsigned char *data; int format; Atom type; if (XRRGetOutputProperty(clone->dst.dpy, clone->dst.rr_output, XInternAtom(clone->dst.dpy, "EDID", False), 0, 100, False, False, AnyPropertyType, &type, &format, &nitems, &after, &data) == Success) { XRRChangeOutputProperty(clone->src.dpy, clone->src.rr_output, XInternAtom(clone->src.dpy, "EDID", False), type, format, PropModeReplace, data, nitems); } } static int disable_crtc(Display *dpy, XRRScreenResources *res, RRCrtc crtc) { XRRPanning panning; if (crtc) { XRRSetPanning(dpy, res, crtc, memset(&panning, 0, sizeof(panning))); if (XRRSetCrtcConfig(dpy, res, crtc, CurrentTime, 0, 0, None, RR_Rotate_0, NULL, 0) != Success) return 0; if (XRRSetPanning(dpy, res, crtc, memset(&panning, 0, sizeof(panning))) != Success) { DBG(XRR, ("%s failed to clear panning on CRTC:%ld\n", DisplayString(dpy), (long)crtc)); if (verbose) { XRRCrtcInfo *c; XRRPanning *p; c = XRRGetCrtcInfo(dpy, res, crtc); if (c) { DBG(XRR, ("%s CRTC:%ld x=%d, y=%d, rotation=%d, mode=%ld\n", DisplayString(dpy), (long)crtc, c->x, c->y, c->rotation, c->mode)); XRRFreeCrtcInfo(c); } p = XRRGetPanning(dpy, res, crtc); if (p) { DBG(XRR, ("%s CRTC:%ld panning (%d, %d)x(%d, %d), tracking (%d, %d)x(%d, %d), border (%d, %d),(%d, %d)\n", DisplayString(dpy), (long)crtc, p->left, p->top, p->width, p->height, p->track_left, p->track_top, p->track_width, p->track_height, p->border_left, p->border_top, p->border_right, p->border_bottom)); XRRFreePanning(p); } } } } return 1; } static int clone_update_modes__randr(struct clone *clone) { XRRScreenResources *from_res = NULL, *to_res = NULL; XRROutputInfo *from_info = NULL, *to_info = NULL; int i, j, ret = ENOENT; assert(clone->src.rr_output); assert(clone->dst.rr_output); assert(clone->dst.display->rr_event); from_res = _XRRGetScreenResourcesCurrent(clone->dst.dpy, clone->dst.window); if (from_res == NULL) goto err; from_info = XRRGetOutputInfo(clone->dst.dpy, from_res, clone->dst.rr_output); if (from_info == NULL) goto err; DBG(XRR, ("%s(%s-%s <- %s-%s): timestamp %ld (last %ld)\n", __func__, DisplayString(clone->src.dpy), clone->src.name, DisplayString(clone->dst.dpy), clone->dst.name, from_info->timestamp, clone->timestamp)); to_res = _XRRGetScreenResourcesCurrent(clone->src.dpy, clone->src.window); if (to_res == NULL) goto err; to_info = XRRGetOutputInfo(clone->src.dpy, to_res, clone->src.rr_output); if (to_info == NULL) goto err; DBG(XRR, ("%s: dst.rr_crtc=%ld, now %ld\n", __func__, (long)clone->dst.rr_crtc, (long)from_info->crtc)); if (clone->dst.rr_crtc == from_info->crtc) { for (i = 0; i < to_info->nmode; i++) { XRRModeInfo *mode, *old; mode = lookup_mode(to_res, to_info->modes[i]); if (mode == NULL) break; DBG(XRR, ("%s(%s-%s): lookup mode %s\n", __func__, DisplayString(clone->src.dpy), clone->src.name, mode->name)); for (j = 0; j < from_info->nmode; j++) { old = lookup_mode(from_res, from_info->modes[j]); if (old && mode_equal(mode, old)) { mode = NULL; break; } } if (mode) { DBG(XRR, ("%s(%s-%s): unknown mode %s\n", __func__, DisplayString(clone->src.dpy), clone->src.name, mode->name)); break; } } if (i == from_info->nmode && i == to_info->nmode) { DBG(XRR, ("%s(%s-%s): no change in output\n", __func__, DisplayString(clone->src.dpy), clone->src.name)); goto done; } } /* Disable the remote output */ if (from_info->crtc != clone->dst.rr_crtc) { DBG(XRR, ("%s(%s-%s): disabling active CRTC\n", __func__, DisplayString(clone->dst.dpy), clone->dst.name)); if (disable_crtc(clone->dst.dpy, from_res, from_info->crtc)) { clone->dst.rr_crtc = 0; clone->dst.mode.id = 0; } else { XRRCrtcInfo *c = XRRGetCrtcInfo(clone->dst.dpy, from_res, from_info->crtc); if (c) { clone->dst.x = c->x; clone->dst.y = c->y; clone->dst.rotation = c->rotation; clone->dst.mode.id = c->mode; XRRFreeCrtcInfo(c); } } } /* Create matching modes for the real output on the virtual */ XGrabServer(clone->src.dpy); /* Clear all current UserModes on the output, including any active ones */ if (to_info->crtc) { DBG(XRR, ("%s(%s-%s): disabling active CRTC\n", __func__, DisplayString(clone->src.dpy), clone->src.name)); disable_crtc(clone->src.dpy, to_res, to_info->crtc); } for (i = 0; i < to_info->nmode; i++) { DBG(XRR, ("%s(%s-%s): deleting mode %ld\n", __func__, DisplayString(clone->src.dpy), clone->src.name, (long)to_info->modes[i])); XRRDeleteOutputMode(clone->src.dpy, clone->src.rr_output, to_info->modes[i]); } clone->src.rr_crtc = 0; for (i = 0; i < from_info->nmode; i++) { XRRModeInfo *mode, *old; RRMode id; mode = lookup_mode(from_res, from_info->modes[i]); if (mode == NULL) continue; for (j = 0; j < i; j++) { old = lookup_mode(from_res, from_info->modes[j]); if (old && mode_equal(mode, old)) { mode = NULL; break; } } if (mode == NULL) continue; id = 0; for (j = 0; j < to_res->nmode; j++) { old = &to_res->modes[j]; if (mode_equal(mode, old)) { id = old->id; DBG(XRR, ("%s(%s-%s): reusing mode %ld: %s\n", __func__, DisplayString(clone->src.dpy), clone->src.name, id, mode->name)); break; } } if (id == 0) { XRRModeInfo m; char buf[256]; /* XXX User names must be unique! */ m = *mode; m.nameLength = snprintf(buf, sizeof(buf), "%s.%ld-%s", clone->src.name, (long)from_info->modes[i], mode->name); m.name = buf; id = XRRCreateMode(clone->src.dpy, clone->src.window, &m); DBG(XRR, ("%s(%s-%s): adding mode %ld: %s\n", __func__, DisplayString(clone->src.dpy), clone->src.name, id, mode->name)); } XRRAddOutputMode(clone->src.dpy, clone->src.rr_output, id); } clone_update_edid(clone); XUngrabServer(clone->src.dpy); done: ret = 0; clone->timestamp = from_info->timestamp; err: if (to_info) XRRFreeOutputInfo(to_info); if (to_res) XRRFreeScreenResources(to_res); if (from_info) XRRFreeOutputInfo(from_info); if (from_res) XRRFreeScreenResources(from_res); return ret; } static int clone_update_modes__fixed(struct clone *clone) { char mode_name[80]; XRRScreenResources *res = NULL; XRROutputInfo *info = NULL; XRRModeInfo mode; RRMode id; int i, j, ret = ENOENT; assert(clone->src.rr_output); res = _XRRGetScreenResourcesCurrent(clone->src.dpy, clone->src.window); if (res == NULL) goto err; info = XRRGetOutputInfo(clone->src.dpy, res, clone->src.rr_output); if (info == NULL) goto err; XGrabServer(clone->src.dpy); /* Clear all current UserModes on the output, including any active ones */ if (info->crtc) { DBG(XRR, ("%s(%s-%s): disabling active CRTC\n", __func__, DisplayString(clone->src.dpy), clone->src.name)); disable_crtc(clone->src.dpy, res, info->crtc); } for (i = 0; i < info->nmode; i++) { DBG(XRR, ("%s(%s-%s): deleting mode %ld\n", __func__, DisplayString(clone->src.dpy), clone->src.name, (long)info->modes[i])); XRRDeleteOutputMode(clone->src.dpy, clone->src.rr_output, info->modes[i]); } clone->src.rr_crtc = 0; /* Create matching mode for the real output on the virtual */ memset(&mode, 0, sizeof(mode)); mode.width = clone->width; mode.height = clone->height; mode.nameLength = sprintf(mode_name, "FAKE-%dx%d", mode.width, mode.height); mode.name = mode_name; id = 0; for (j = 0; j < res->nmode; j++) { if (mode_equal(&mode, &res->modes[j])) { id = res->modes[j].id; break; } } if (id == 0) id = XRRCreateMode(clone->src.dpy, clone->src.window, &mode); XRRAddOutputMode(clone->src.dpy, clone->src.rr_output, id); XUngrabServer(clone->src.dpy); ret = 0; err: if (info) XRRFreeOutputInfo(info); if (res) XRRFreeScreenResources(res); return ret; } static RROutput claim_virtual(struct display *display, char *output_name, int nclone) { char mode_name[] = "ClaimVirtualHead"; Display *dpy = display->dpy; XRRScreenResources *res; XRROutputInfo *output; XRRModeInfo mode; RRMode id; RROutput rr_output = 0; int i; DBG(X11, ("%s(%d)\n", __func__, nclone)); XGrabServer(dpy); res = _XRRGetScreenResourcesCurrent(dpy, display->root); if (res == NULL) goto out; sprintf(output_name, "VIRTUAL%d", nclone); for (i = rr_output = 0; rr_output == 0 && i < res->noutput; i++) { output = XRRGetOutputInfo(dpy, res, res->outputs[i]); if (output == NULL) continue; if (strcmp(output->name, output_name) == 0) rr_output = res->outputs[i]; XRRFreeOutputInfo(output); } for (i = id = 0; id == 0 && i < res->nmode; i++) { if (strcmp(res->modes[i].name, mode_name) == 0) id = res->modes[i].id; } XRRFreeScreenResources(res); DBG(XRR, ("%s(%s): rr_output=%ld\n", __func__, output_name, (long)rr_output)); if (rr_output == 0) goto out; /* Set any mode on the VirtualHead to make the Xserver allocate another */ memset(&mode, 0, sizeof(mode)); mode.width = 1024; mode.height = 768; mode.name = mode_name; mode.nameLength = sizeof(mode_name) - 1; if (id == 0) id = XRRCreateMode(dpy, display->root, &mode); XRRAddOutputMode(dpy, rr_output, id); /* Force a redetection for the ddx to spot the new outputs */ res = XRRGetScreenResources(dpy, display->root); if (res == NULL) goto out; /* Some else may have interrupted us and installed that new mode! */ output = XRRGetOutputInfo(dpy, res, rr_output); if (output) { disable_crtc(dpy, res, output->crtc); XRRFreeOutputInfo(output); } XRRFreeScreenResources(res); XRRDeleteOutputMode(dpy, rr_output, id); XRRDestroyMode(dpy, id); /* And hide it again */ res = XRRGetScreenResources(dpy, display->root); if (res != NULL) XRRFreeScreenResources(res); out: XUngrabServer(dpy); return rr_output; } static int stride_for_depth(int width, int depth) { if (depth == 24) depth = 32; return ((width * depth + 7) / 8 + 3) & ~3; } static void init_image(struct clone *clone) { XImage *image = &clone->image; int ret; image->width = clone->width; image->height = clone->height; image->format = ZPixmap; image->xoffset = 0; image->byte_order = LSBFirst; image->bitmap_unit = 32; image->bitmap_bit_order = LSBFirst; image->bitmap_pad = 32; image->data = clone->shm.shmaddr; image->bytes_per_line = stride_for_depth(clone->width, clone->depth); switch (clone->depth) { case 24: image->red_mask = 0xff << 16; image->green_mask = 0xff << 8; image->blue_mask = 0xff << 0;; image->depth = 24; image->bits_per_pixel = 32; break; case 16: image->red_mask = 0x1f << 11; image->green_mask = 0x3f << 5; image->blue_mask = 0x1f << 0;; image->depth = 16; image->bits_per_pixel = 16; break; } ret = XInitImage(image); assert(ret); (void)ret; } static int mode_height(const XRRModeInfo *mode, Rotation rotation) { switch (rotation & 0xf) { case RR_Rotate_0: case RR_Rotate_180: return mode->height; case RR_Rotate_90: case RR_Rotate_270: return mode->width; default: return 0; } } static int mode_width(const XRRModeInfo *mode, Rotation rotation) { switch (rotation & 0xf) { case RR_Rotate_0: case RR_Rotate_180: return mode->width; case RR_Rotate_90: case RR_Rotate_270: return mode->height; default: return 0; } } static void output_init_xfer(struct clone *clone, struct output *output) { if (output->pixmap == None && output->use_shm_pixmap) { DBG(DRAW, ("%s-%s: creating shm pixmap\n", DisplayString(output->dpy), output->name)); XSync(output->dpy, False); _x_error_occurred = 0; output->pixmap = XShmCreatePixmap(output->dpy, output->window, clone->shm.shmaddr, &output->shm, clone->width, clone->height, clone->depth); if (output->pix_picture) { XRenderFreePicture(output->dpy, output->pix_picture); output->pix_picture = None; } XSync(output->dpy, False); if (_x_error_occurred) { XFreePixmap(output->dpy, output->pixmap); output->pixmap = None; output->use_shm_pixmap = 0; } } if (output->use_render) { DBG(DRAW, ("%s-%s: creating picture\n", DisplayString(output->dpy), output->name)); if (output->win_picture == None) output->win_picture = XRenderCreatePicture(output->dpy, output->window, output->display->root_format, 0, NULL); if (output->pixmap == None) output->pixmap = XCreatePixmap(output->dpy, output->window, clone->width, clone->height, clone->depth); if (output->pix_picture == None) output->pix_picture = XRenderCreatePicture(output->dpy, output->pixmap, output->use_render, 0, NULL); } if (output->gc == None) { XGCValues gcv; DBG(DRAW, ("%s-%s: creating gc\n", DisplayString(output->dpy), output->name)); gcv.graphics_exposures = False; gcv.subwindow_mode = IncludeInferiors; output->gc = XCreateGC(output->dpy, output->pixmap ?: output->window, GCGraphicsExposures | GCSubwindowMode, &gcv); } } static int bpp_for_depth(int depth) { switch (depth) { case 1: return 1; case 8: return 8; case 15: return 16; case 16: return 16; case 24: return 24; case 32: return 32; default: return 0; } } static int clone_init_xfer(struct clone *clone) { int width, height; if (clone->dst.mode.id == 0) { width = 0; height = 0; } else if (clone->dri3.xid) { width = clone->dst.display->width; height = clone->dst.display->height; } else { width = mode_width(&clone->src.mode, clone->src.rotation); height = mode_height(&clone->src.mode, clone->src.rotation); } if (width == clone->width && height == clone->height) return 0; DBG(DRAW, ("%s-%s create xfer, %dx%d\n", DisplayString(clone->dst.dpy), clone->dst.name, width, height)); if (clone->shm.shmaddr) { if (clone->src.use_shm) XShmDetach(clone->src.dpy, &clone->src.shm); if (clone->dst.use_shm) XShmDetach(clone->dst.dpy, &clone->dst.shm); shmdt(clone->shm.shmaddr); clone->shm.shmaddr = NULL; } if (clone->src.pixmap) { XFreePixmap(clone->src.dpy, clone->src.pixmap); clone->src.pixmap = 0; } if (clone->dst.pixmap) { XFreePixmap(clone->dst.dpy, clone->dst.pixmap); clone->dst.pixmap = 0; } if ((width | height) == 0) { clone->damaged.x2 = clone->damaged.y2 = INT_MIN; clone->damaged.x1 = clone->damaged.y1 = INT_MAX; return 0; } if (clone->dri3.xid) { int fd, stride; Pixmap src; _x_error_occurred = 0; DBG(DRAW, ("%s-%s create xfer, trying DRI3\n", DisplayString(clone->dst.dpy), clone->dst.name)); fd = dri3_create_fd(clone->dst.dpy, clone->dst.window, &stride); if (fd < 0) goto disable_dri3; DBG(DRAW, ("%s-%s create xfer, DRI3 fd=%d, stride=%d\n", DisplayString(clone->dst.dpy), clone->dst.name, fd, stride)); src = dri3_create_pixmap(clone->src.dpy, clone->src.window, width, height, clone->depth, fd, bpp_for_depth(clone->depth), stride, lseek(fd, 0, SEEK_END)); XSync(clone->src.dpy, False); if (!_x_error_occurred) { clone->src.pixmap = src; clone->width = width; clone->height = height; } else { XFreePixmap(clone->src.dpy, src); close(fd); disable_dri3: dri3_fence_free(clone->src.dpy, &clone->dri3); clone->dri3.xid = 0; DBG(DRAW, ("%s-%s create xfer, DRI3 failed\n", DisplayString(clone->dst.dpy), clone->dst.name)); } } width = mode_width(&clone->src.mode, clone->src.rotation); height = mode_height(&clone->src.mode, clone->src.rotation); if (!clone->dri3.xid) { DBG(DRAW, ("%s-%s create xfer, trying SHM\n", DisplayString(clone->dst.dpy), clone->dst.name)); clone->shm.shmid = shmget(IPC_PRIVATE, height * stride_for_depth(width, clone->depth), IPC_CREAT | 0666); if (clone->shm.shmid == -1) return errno; clone->shm.shmaddr = shmat(clone->shm.shmid, 0, 0); if (clone->shm.shmaddr == (char *) -1) { shmctl(clone->shm.shmid, IPC_RMID, NULL); return ENOMEM; } if (clone->src.use_shm) { clone->src.shm = clone->shm; clone->src.shm.readOnly = False; XShmAttach(clone->src.dpy, &clone->src.shm); XSync(clone->src.dpy, False); } if (clone->dst.use_shm) { clone->dst.shm = clone->shm; clone->dst.shm.readOnly = !clone->dst.use_shm_pixmap; XShmAttach(clone->dst.dpy, &clone->dst.shm); XSync(clone->dst.dpy, False); } shmctl(clone->shm.shmid, IPC_RMID, NULL); clone->width = width; clone->height = height; init_image(clone); } output_init_xfer(clone, &clone->src); output_init_xfer(clone, &clone->dst); clone->damaged.x1 = clone->src.x; clone->damaged.x2 = clone->src.x + width; clone->damaged.y1 = clone->src.y; clone->damaged.y2 = clone->src.y + height; display_mark_flush(clone->dst.display); return 0; } static void clone_update(struct clone *clone) { if (!clone->rr_update) return; DBG(X11, ("%s-%s cloning modes\n", DisplayString(clone->dst.dpy), clone->dst.name)); clone_update_modes__randr(clone); clone->rr_update = 0; } static int context_update(struct context *ctx) { Display *dpy = ctx->display->dpy; XRRScreenResources *res; int context_changed = 0; int i, n; DBG(X11, ("%s\n", __func__)); res = _XRRGetScreenResourcesCurrent(dpy, ctx->display->root); if (res == NULL) return 0; DBG(XRR, ("%s timestamp %ld (last %ld), config %ld (last %ld)\n", DisplayString(dpy), res->timestamp, ctx->timestamp, res->configTimestamp, ctx->configTimestamp)); if (res->timestamp == ctx->timestamp && res->configTimestamp == ctx->configTimestamp && res->timestamp != res->configTimestamp) { /* mutter be damned */ XRRFreeScreenResources(res); return 0; } ctx->timestamp = res->timestamp; ctx->configTimestamp = res->configTimestamp; for (n = 0; n < ctx->nclone; n++) { struct output *output = &ctx->clones[n].src; XRROutputInfo *o; XRRCrtcInfo *c; RRMode mode = 0; int changed = 0; o = XRRGetOutputInfo(dpy, res, output->rr_output); if (o == NULL) continue; c = NULL; if (o->crtc) c = XRRGetCrtcInfo(dpy, res, o->crtc); if (c) { DBG(XRR, ("%s-%s: (x=%d, y=%d, rotation=%d, mode=%ld) -> (x=%d, y=%d, rotation=%d, mode=%ld)\n", DisplayString(dpy), output->name, output->x, output->y, output->rotation, output->mode.id, c->x, c->y, c->rotation, c->mode)); changed |= output->rotation != c->rotation; output->rotation = c->rotation; changed |= output->x != c->x; output->x = c->x; changed |= output->y != c->y; output->y = c->y; changed |= output->mode.id != c->mode; mode = c->mode; XRRFreeCrtcInfo(c); } else { DBG(XRR, ("%s-%s: (x=%d, y=%d, rotation=%d, mode=%ld) -> off\n", DisplayString(dpy), output->name, output->x, output->y, output->rotation, output->mode.id)); } output->rr_crtc = o->crtc; XRRFreeOutputInfo(o); DBG(XRR, ("%s-%s crtc changed? %d\n", DisplayString(ctx->clones[n].dst.display->dpy), ctx->clones[n].dst.name, changed)); if (mode) { if (output->mode.id != mode) { for (i = 0; i < res->nmode; i++) { if (res->modes[i].id == mode) { output->mode = res->modes[i]; break; } } } } else { changed = output->mode.id != 0; output->mode.id = 0; } DBG(XRR, ("%s-%s output changed? %d\n", DisplayString(ctx->clones[n].dst.display->dpy), ctx->clones[n].dst.name, changed)); context_changed |= changed; } XRRFreeScreenResources(res); DBG(XRR, ("%s changed? %d\n", DisplayString(dpy), context_changed)); if (!context_changed) return 0; for (n = 1; n < ctx->ndisplay; n++) { struct display *display = &ctx->display[n]; struct clone *clone; int x1, x2, y1, y2; if (display->rr_active == 0) continue; x1 = y1 = INT_MAX; x2 = y2 = INT_MIN; for (clone = display->clone; clone; clone = clone->next) { struct output *output = &clone->src; int v; assert(clone->dst.display == display); if (output->mode.id == 0) continue; DBG(XRR, ("%s: source %s enabled (%d, %d)x(%d, %d)\n", DisplayString(clone->dst.dpy), output->name, output->x, output->y, mode_width(&output->mode, output->rotation), mode_height(&output->mode, output->rotation))); if (output->x < x1) x1 = output->x; if (output->y < y1) y1 = output->y; v = (int)output->x + mode_width(&output->mode, output->rotation); if (v > x2) x2 = v; v = (int)output->y + mode_height(&output->mode, output->rotation); if (v > y2) y2 = v; } DBG(XRR, ("%s fb bounds (%d, %d)x(%d, %d)\n", DisplayString(display->dpy), x1, y1, x2, y2)); XGrabServer(display->dpy); res = _XRRGetScreenResourcesCurrent(display->dpy, display->root); if (res == NULL) goto ungrab; if (x2 <= x1 || y2 <= y1) { /* Nothing enabled, preserve the current fb, and turn everything off */ for (clone = display->clone; clone; clone = clone->next) { struct output *dst = &clone->dst; if (!dst->rr_crtc) continue; DBG(XRR, ("%s: disabling output '%s'\n", DisplayString(display->dpy), dst->name)); assert(clone->dst.display == display); if (disable_crtc(display->dpy, res, dst->rr_crtc)) { dst->rr_crtc = 0; dst->mode.id = 0; } } goto free_res; } x2 -= x1; y2 -= y1; DBG(XRR, ("%s: current size %dx%d, need %dx%d\n", DisplayString(display->dpy), display->width, display->height, x2, y2)); if (display->width != x2 || display->height != y2) { /* When shrinking we have to manually resize the fb */ for (clone = display->clone; clone; clone = clone->next) { struct output *dst = &clone->dst; if (!dst->rr_crtc) continue; DBG(XRR, ("%s: disabling output '%s'\n", DisplayString(display->dpy), dst->name)); assert(clone->dst.display == display); if (disable_crtc(display->dpy, res, dst->rr_crtc)) { dst->rr_crtc = 0; dst->mode.id = 0; } } DBG(XRR, ("%s: XRRSetScreenSize %dx%d\n", DisplayString(display->dpy), x2, y2)); XRRSetScreenSize(display->dpy, display->root, x2, y2, x2 * 96 / 25.4, y2 * 96 / 25.4); display->width = x2; display->height = y2; } for (clone = display->clone; clone; clone = clone->next) { struct output *src = &clone->src; struct output *dst = &clone->dst; XRROutputInfo *o; XRRPanning panning; struct clone *set; RRCrtc rr_crtc; Status ret; DBG(XRR, ("%s: copying configuration from %s (mode=%ld: %dx%d) to %s\n", DisplayString(display->dpy), src->name, (long)src->mode.id, src->mode.width, src->mode.height, dst->name)); if (src->mode.id == 0) { err: if (dst->rr_crtc) { DBG(XRR, ("%s: disabling unused output '%s'\n", DisplayString(display->dpy), dst->name)); assert(clone->dst.display == display); if (disable_crtc(display->dpy, res, dst->rr_crtc)) { dst->rr_crtc = 0; dst->mode.id = 0; } } continue; } dst->x = src->x - x1; dst->y = src->y - y1; dst->rotation = src->rotation; dst->mode = src->mode; dst->mode.id = 0; for (i = 0; i < res->nmode; i++) { if (mode_equal(&src->mode, &res->modes[i])) { dst->mode.id = res->modes[i].id; break; } } if (dst->mode.id == 0) { XRRModeInfo m; char buf[256]; RRMode id; /* XXX User names must be unique! */ m = src->mode; m.nameLength = snprintf(buf, sizeof(buf), "%s.%ld-%dx%d", src->name, (long)src->mode.id, src->mode.width, src->mode.height); m.name = buf; id = XRRCreateMode(dst->dpy, dst->window, &m); if (id) { DBG(XRR, ("%s: adding mode %ld: %dx%d to %s, new mode %ld\n", DisplayString(dst->dpy), (long)src->mode.id, src->mode.width, src->mode.height, dst->name, (long)id)); XRRAddOutputMode(dst->dpy, dst->rr_output, id); dst->mode.id = id; } else { DBG(XRR, ("%s: failed to find suitable mode for %s\n", DisplayString(dst->dpy), dst->name)); goto err; } } rr_crtc = dst->rr_crtc; if (rr_crtc) { for (set = display->clone; set != clone; set = set->next) { if (set->dst.rr_crtc == rr_crtc) { DBG(XRR, ("%s: CRTC reassigned from %s\n", DisplayString(dst->dpy), dst->name)); rr_crtc = 0; break; } } } if (rr_crtc == 0) { o = XRRGetOutputInfo(dst->dpy, res, dst->rr_output); for (i = 0; i < o->ncrtc; i++) { DBG(XRR, ("%s: checking whether CRTC:%ld is available\n", DisplayString(dst->dpy), (long)o->crtcs[i])); for (set = display->clone; set != clone; set = set->next) { if (set->dst.rr_crtc == o->crtcs[i]) { DBG(XRR, ("%s: CRTC:%ld already assigned to %s\n", DisplayString(dst->dpy), (long)o->crtcs[i], set->dst.name)); break; } } if (set == clone) { rr_crtc = o->crtcs[i]; break; } } XRRFreeOutputInfo(o); } if (rr_crtc == 0) { DBG(XRR, ("%s: failed to find available CRTC for %s\n", DisplayString(dst->dpy), dst->name)); goto err; } DBG(XRR, ("%s: enabling output '%s' (%d,%d)x(%d,%d), rotation %d, on CRTC:%ld, using mode %ld\n", DisplayString(dst->dpy), dst->name, dst->x, dst->y, dst->mode.width, dst->mode.height, dst->rotation, (long)rr_crtc, dst->mode.id)); ret = XRRSetPanning(dst->dpy, res, rr_crtc, memset(&panning, 0, sizeof(panning))); DBG(XRR, ("%s-%s: XRRSetPanning %s\n", DisplayString(dst->dpy), dst->name, ret ? "failed" : "success")); (void)ret; ret = XRRSetCrtcConfig(dst->dpy, res, rr_crtc, CurrentTime, dst->x, dst->y, dst->mode.id, dst->rotation, &dst->rr_output, 1); DBG(XRR, ("%s-%s: XRRSetCrtcConfig %s\n", DisplayString(dst->dpy), dst->name, ret ? "failed" : "success")); if (ret) goto err; if (verbose & XRR) { XRRCrtcInfo *c; XRRPanning *p; c = XRRGetCrtcInfo(dst->dpy, res, rr_crtc); if (c) { DBG(XRR, ("%s-%s: x=%d, y=%d, rotation=%d, mode=%ld\n", DisplayString(dst->dpy), dst->name, c->x, c->y, c->rotation, c->mode)); XRRFreeCrtcInfo(c); } p = XRRGetPanning(dst->dpy, res, rr_crtc); if (p) { DBG(XRR, ("%s-%s: panning (%d, %d)x(%d, %d), tracking (%d, %d)x(%d, %d), border (%d, %d),(%d, %d)\n", DisplayString(dst->dpy), dst->name, p->left, p->top, p->width, p->height, p->track_left, p->track_top, p->track_width, p->track_height, p->border_left, p->border_top, p->border_right, p->border_bottom)); XRRFreePanning(p); } } dst->rr_crtc = rr_crtc; } free_res: XRRFreeScreenResources(res); ungrab: XUngrabServer(display->dpy); } ctx->active = NULL; for (n = 0; n < ctx->nclone; n++) { struct clone *clone = &ctx->clones[n]; clone_init_xfer(clone); if (clone->dst.rr_crtc == 0) continue; DBG(XRR, ("%s-%s: added to active list\n", DisplayString(clone->dst.display->dpy), clone->dst.name)); clone->active = ctx->active; ctx->active = clone; } return 1; } static Cursor display_load_invisible_cursor(struct display *display) { char zero[8] = {}; XColor black = {}; Pixmap bitmap = XCreateBitmapFromData(display->dpy, display->root, zero, 8, 8); return XCreatePixmapCursor(display->dpy, bitmap, bitmap, &black, &black, 0, 0); } static Cursor display_get_visible_cursor(struct display *display) { if (display->cursor_serial != display->cursor_image.size) { DBG(CURSOR, ("%s updating cursor\n", DisplayString(display->dpy))); if (display->visible_cursor) XFreeCursor(display->dpy, display->visible_cursor); display->visible_cursor = XcursorImageLoadCursor(display->dpy, &display->cursor_image); display->cursor_serial = display->cursor_image.size; } return display->visible_cursor; } static void display_load_visible_cursor(struct display *display, XFixesCursorImage *cur) { unsigned long *src; /* XXX deep sigh */ XcursorPixel *dst; unsigned n; if (cur->width != display->cursor_image.width || cur->height != display->cursor_image.height) display->cursor_image.pixels = realloc(display->cursor_image.pixels, 4 * cur->width * cur->height); if (display->cursor_image.pixels == NULL) return; display->cursor_image.width = cur->width; display->cursor_image.height = cur->height; display->cursor_image.xhot = cur->xhot; display->cursor_image.yhot = cur->yhot; display->cursor_image.size++; n = cur->width*cur->height; src = cur->pixels; dst = display->cursor_image.pixels; while (n--) *dst++ = *src++; DBG(CURSOR, ("%s marking cursor changed\n", DisplayString(display->dpy))); display->cursor_moved++; if (display->cursor != display->invisible_cursor) { display->cursor_visible++; context_enable_timer(display->ctx); } } static void display_cursor_move(struct display *display, int x, int y, int visible) { DBG(CURSOR, ("%s cursor moved (visible=%d, (%d, %d))\n", DisplayString(display->dpy), visible, x, y)); display->cursor_moved++; display->cursor_visible += visible; if (visible) { display->cursor_x = x; display->cursor_y = y; } context_enable_timer(display->ctx); } static void display_flush_cursor(struct display *display) { Cursor cursor; int x, y; if (!display->cursor_moved) return; if (display->cursor_visible) { x = display->cursor_x; y = display->cursor_y; } else { x = display->cursor_x++ & 31; y = display->cursor_y++ & 31; } DBG(CURSOR, ("%s setting cursor position (%d, %d), visible? %d\n", DisplayString(display->dpy), x, y, display->cursor_visible)); XWarpPointer(display->dpy, None, display->root, 0, 0, 0, 0, x, y); cursor = None; if (display->cursor_visible) cursor = display_get_visible_cursor(display); if (cursor == None) cursor = display->invisible_cursor; if (cursor != display->cursor) { XDefineCursor(display->dpy, display->root, cursor); display->cursor = cursor; } display_mark_flush(display); display->cursor_moved = 0; display->cursor_visible = 0; } static void clone_move_cursor(struct clone *c, int x, int y) { int visible; DBG(CURSOR, ("%s-%s moving cursor (%d, %d) [(%d, %d), (%d, %d)]\n", DisplayString(c->dst.dpy), c->dst.name, x, y, c->src.x, c->src.y, c->src.x + c->width, c->src.y + c->height)); visible = (x >= c->src.x && x < c->src.x + c->width && y >= c->src.y && y < c->src.y + c->height); x += c->dst.x - c->src.x; y += c->dst.y - c->src.y; display_cursor_move(c->dst.display, x, y, visible); } static int clone_output_init(struct clone *clone, struct output *output, struct display *display, const char *name, RROutput rr_output) { Display *dpy = display->dpy; int depth; DBG(X11, ("%s(%s, %s)\n", __func__, DisplayString(dpy), name)); output->name = strdup(name); if (output->name == NULL) return -ENOMEM; output->display = display; output->dpy = dpy; output->rr_output = rr_output; output->rotation = RR_Rotate_0; output->window = display->root; output->use_shm = display->has_shm; output->use_shm_pixmap = display->has_shm_pixmap; DBG(X11, ("%s-%s use shm? %d (use shm pixmap? %d)\n", DisplayString(dpy), name, display->has_shm, display->has_shm_pixmap)); depth = output->use_shm && !FORCE_16BIT_XFER ? display->depth : 16; if (depth < clone->depth) clone->depth = depth; return 0; } static void ximage_prepare(XImage *image, int width, int height) { image->width = width; image->height = height; image->bytes_per_line = stride_for_depth(width, image->depth); } static void get_src(struct clone *c, const XRectangle *clip) { DBG(DRAW,("%s-%s get_src(%d,%d)x(%d,%d)\n", DisplayString(c->dst.dpy), c->dst.name, clip->x, clip->y, clip->width, clip->height)); c->image.obdata = (char *)&c->src.shm; if (c->src.use_render) { XRenderComposite(c->src.dpy, PictOpSrc, c->src.win_picture, 0, c->src.pix_picture, clip->x, clip->y, 0, 0, 0, 0, clip->width, clip->height); if (c->src.use_shm_pixmap) { XSync(c->src.dpy, False); } else if (c->src.use_shm) { ximage_prepare(&c->image, clip->width, clip->height); XShmGetImage(c->src.dpy, c->src.pixmap, &c->image, clip->x, clip->y, AllPlanes); } else { ximage_prepare(&c->image, c->width, c->height); XGetSubImage(c->src.dpy, c->src.pixmap, clip->x, clip->y, clip->width, clip->height, AllPlanes, ZPixmap, &c->image, 0, 0); } } else if (c->src.pixmap) { XCopyArea(c->src.dpy, c->src.window, c->src.pixmap, c->src.gc, clip->x, clip->y, clip->width, clip->height, 0, 0); XSync(c->src.dpy, False); } else if (c->src.use_shm) { ximage_prepare(&c->image, clip->width, clip->height); XShmGetImage(c->src.dpy, c->src.window, &c->image, clip->x, clip->y, AllPlanes); } else { ximage_prepare(&c->image, c->width, c->height); XGetSubImage(c->src.dpy, c->src.window, clip->x, clip->y, clip->width, clip->height, AllPlanes, ZPixmap, &c->image, 0, 0); } c->src.display->flush = 0; } static void put_dst(struct clone *c, const XRectangle *clip) { DBG(DRAW, ("%s-%s put_dst(%d,%d)x(%d,%d)\n", DisplayString(c->dst.dpy), c->dst.name, clip->x, clip->y, clip->width, clip->height)); c->image.obdata = (char *)&c->dst.shm; if (c->dst.use_render) { if (c->dst.use_shm_pixmap) { DBG(DRAW, ("%s-%s using SHM pixmap composite\n", DisplayString(c->dst.dpy), c->dst.name)); } else if (c->dst.use_shm) { DBG(DRAW, ("%s-%s using SHM image composite\n", DisplayString(c->dst.dpy), c->dst.name)); XShmPutImage(c->dst.dpy, c->dst.pixmap, c->dst.gc, &c->image, 0, 0, 0, 0, clip->width, clip->height, False); } else { DBG(DRAW, ("%s-%s using composite\n", DisplayString(c->dst.dpy), c->dst.name)); XPutImage(c->dst.dpy, c->dst.pixmap, c->dst.gc, &c->image, 0, 0, 0, 0, clip->width, clip->height); } if (c->dst.use_shm) c->dst.serial = NextRequest(c->dst.dpy); XRenderComposite(c->dst.dpy, PictOpSrc, c->dst.pix_picture, 0, c->dst.win_picture, 0, 0, 0, 0, clip->x, clip->y, clip->width, clip->height); c->dst.display->send |= c->dst.use_shm; } else if (c->dst.pixmap) { DBG(DRAW, ("%s-%s using SHM pixmap\n", DisplayString(c->dst.dpy), c->dst.name)); c->dst.serial = NextRequest(c->dst.dpy); XCopyArea(c->dst.dpy, c->dst.pixmap, c->dst.window, c->dst.gc, 0, 0, clip->width, clip->height, clip->x, clip->y); c->dst.display->send = 1; } else if (c->dst.use_shm) { DBG(DRAW, ("%s-%s using SHM image\n", DisplayString(c->dst.dpy), c->dst.name)); c->dst.serial = NextRequest(c->dst.dpy); XShmPutImage(c->dst.dpy, c->dst.window, c->dst.gc, &c->image, 0, 0, clip->x, clip->y, clip->width, clip->height, True); } else { DBG(DRAW, ("%s-%s using image\n", DisplayString(c->dst.dpy), c->dst.name)); XPutImage(c->dst.dpy, c->dst.window, c->dst.gc, &c->image, 0, 0, clip->x, clip->y, clip->width, clip->height); c->dst.serial = 0; } } static int clone_paint(struct clone *c) { XRectangle clip; DBG(DRAW, ("%s-%s paint clone, damaged (%d, %d), (%d, %d) [(%d, %d), (%d, %d)]\n", DisplayString(c->dst.dpy), c->dst.name, c->damaged.x1, c->damaged.y1, c->damaged.x2, c->damaged.y2, c->src.x, c->src.y, c->src.x + c->width, c->src.y + c->height)); if (c->damaged.x1 < c->src.x) c->damaged.x1 = c->src.x; if (c->damaged.x2 > c->src.x + c->width) c->damaged.x2 = c->src.x + c->width; if (c->damaged.x2 <= c->damaged.x1) goto done; if (c->damaged.y1 < c->src.y) c->damaged.y1 = c->src.y; if (c->damaged.y2 > c->src.y + c->height) c->damaged.y2 = c->src.y + c->height; if (c->damaged.y2 <= c->damaged.y1) goto done; DBG(DRAW, ("%s-%s is damaged, last SHM serial: %ld, now %ld\n", DisplayString(c->dst.dpy), c->dst.name, (long)c->dst.serial, (long)LastKnownRequestProcessed(c->dst.dpy))); if (c->dst.serial > LastKnownRequestProcessed(c->dst.dpy)) { struct pollfd pfd; pfd.fd = ConnectionNumber(c->dst.dpy); pfd.events = POLLIN; XEventsQueued(c->dst.dpy, poll(&pfd, 1, 0) ? QueuedAfterReading : QueuedAfterFlush); if (c->dst.serial > LastKnownRequestProcessed(c->dst.dpy)) { c->dst.display->skip_clone++; return EAGAIN; } } c->dst.display->skip_clone = 0; c->dst.display->skip_frame = 0; if (FORCE_FULL_REDRAW) { c->damaged.x1 = c->src.x; c->damaged.y1 = c->src.y; c->damaged.x2 = c->src.x + c->width; c->damaged.y2 = c->src.y + c->height; } if (c->dri3.xid) { if (c->src.use_render) { XRenderComposite(c->src.dpy, PictOpSrc, c->src.win_picture, 0, c->src.pix_picture, c->damaged.x1, c->damaged.y1, 0, 0, c->damaged.x1 + c->dst.x - c->src.x, c->damaged.y1 + c->dst.y - c->src.y, c->damaged.x2 - c->damaged.x1, c->damaged.y2 - c->damaged.y1); } else { XCopyArea(c->src.dpy, c->src.window, c->src.pixmap, c->src.gc, c->damaged.x1, c->damaged.y1, c->damaged.x2 - c->damaged.x1, c->damaged.y2 - c->damaged.y1, c->damaged.x1 + c->dst.x - c->src.x, c->damaged.y1 + c->dst.y - c->src.y); } dri3_fence_flush(c->src.dpy, &c->dri3); } else { clip.x = c->damaged.x1; clip.y = c->damaged.y1; clip.width = c->damaged.x2 - c->damaged.x1; clip.height = c->damaged.y2 - c->damaged.y1; get_src(c, &clip); clip.x += c->dst.x - c->src.x; clip.y += c->dst.y - c->src.y; put_dst(c, &clip); } display_mark_flush(c->dst.display); done: c->damaged.x2 = c->damaged.y2 = INT_MIN; c->damaged.x1 = c->damaged.y1 = INT_MAX; return 0; } static void clone_damage(struct clone *c, const XRectangle *rec) { int v; if ((v = rec->x) < c->damaged.x1) c->damaged.x1 = v; if ((v = (int)rec->x + rec->width) > c->damaged.x2) c->damaged.x2 = v; if ((v = rec->y) < c->damaged.y1) c->damaged.y1 = v; if ((v = (int)rec->y + rec->height) > c->damaged.y2) c->damaged.y2 = v; DBG(DAMAGE, ("%s-%s damaged: (%d, %d), (%d, %d)\n", DisplayString(c->dst.display->dpy), c->dst.name, c->damaged.x1, c->damaged.y1, c->damaged.x2, c->damaged.y2)); } static void usage(const char *arg0) { printf("Usage: %s [OPTION]... [TARGET_DISPLAY]...\n", arg0); printf(" -d source display\n"); printf(" -f keep in foreground (do not detach from console and daemonize)\n"); printf(" -b start bumblebee\n"); printf(" -a connect to all local displays (e.g. :1, :2, etc)\n"); printf(" -S disable use of a singleton and launch a fresh intel-virtual-output process\n"); printf(" -v all verbose output, implies -f\n"); printf(" -V specific verbose output, implies -f\n"); printf(" -h this help\n"); printf("If no target displays are parsed on the commandline, \n"); printf("intel-virtual-output will attempt to connect to any local display\n"); printf("and then start bumblebee.\n"); } static void record_callback(XPointer closure, XRecordInterceptData *data) { struct context *ctx = (struct context *)closure; DBG(X11, ("%s\n", __func__)); if (data->category == XRecordFromServer) { const xEvent *e = (const xEvent *)data->data; DBG(X11, ("%s -- from server, event type %d, root %ld (ours? %d)\n", __func__, e->u.u.type, (long)e->u.keyButtonPointer.root, ctx->display->root == e->u.keyButtonPointer.root)); if (e->u.u.type == MotionNotify && e->u.keyButtonPointer.root == ctx->display->root) { struct clone *clone; for (clone = ctx->active; clone; clone = clone->active) clone_move_cursor(clone, e->u.keyButtonPointer.rootX, e->u.keyButtonPointer.rootY); } } XRecordFreeData(data); } static int record_mouse(struct context *ctx) { Display *dpy; XRecordRange *rr; XRecordClientSpec rcs; XRecordContext rc; DBG(X11, ("%s(%s)\n", __func__, DisplayString(ctx->display->dpy))); dpy = XOpenDisplay(DisplayString(ctx->display->dpy)); if (dpy == NULL) return -ECONNREFUSED; rr = XRecordAllocRange(); if (rr == NULL) return -ENOMEM; rr->device_events.first = rr->device_events.last = MotionNotify; rcs = XRecordAllClients; rc = XRecordCreateContext(dpy, 0, &rcs, 1, &rr, 1); XSync(dpy, False); if (!XRecordEnableContextAsync(dpy, rc, record_callback, (XPointer)ctx)) return -EINVAL; ctx->record = dpy; return ConnectionNumber(dpy); } static int bad_visual(Visual *visual, int depth) { DBG(X11, ("%s? depth=%d, visual: class=%d, bits_per_rgb=%d, red_mask=%08lx, green_mask=%08lx, blue_mask=%08lx\n", __func__, depth, visual->class, visual->bits_per_rgb, visual->red_mask, visual->green_mask, visual->blue_mask)); if (!(visual->class == TrueColor || visual->class == DirectColor)) return 1; switch (depth) { case 16: return (/* visual->bits_per_rgb != 6 || */ visual->red_mask != 0x1f << 11 || visual->green_mask != 0x3f << 5 || visual->blue_mask != 0x1f << 0); case 24: return (/* visual->bits_per_rgb != 8 || */ visual->red_mask != 0xff << 16 || visual->green_mask != 0xff << 8 || visual->blue_mask != 0xff << 0); default: return 1; } } static XRenderPictFormat * find_xrender_format(Display *dpy, pixman_format_code_t format) { XRenderPictFormat tmpl; int mask; #define MASK(x) ((1<<(x))-1) memset(&tmpl, 0, sizeof(tmpl)); tmpl.depth = PIXMAN_FORMAT_DEPTH(format); mask = PictFormatType | PictFormatDepth; DBG(X11, ("%s(0x%08lx)\n", __func__, (long)format)); switch (PIXMAN_FORMAT_TYPE(format)) { case PIXMAN_TYPE_ARGB: tmpl.type = PictTypeDirect; if (PIXMAN_FORMAT_A(format)) { tmpl.direct.alphaMask = MASK(PIXMAN_FORMAT_A(format)); tmpl.direct.alpha = (PIXMAN_FORMAT_R(format) + PIXMAN_FORMAT_G(format) + PIXMAN_FORMAT_B(format)); } tmpl.direct.redMask = MASK(PIXMAN_FORMAT_R(format)); tmpl.direct.red = (PIXMAN_FORMAT_G(format) + PIXMAN_FORMAT_B(format)); tmpl.direct.greenMask = MASK(PIXMAN_FORMAT_G(format)); tmpl.direct.green = PIXMAN_FORMAT_B(format); tmpl.direct.blueMask = MASK(PIXMAN_FORMAT_B(format)); tmpl.direct.blue = 0; mask |= PictFormatRed | PictFormatRedMask; mask |= PictFormatGreen | PictFormatGreenMask; mask |= PictFormatBlue | PictFormatBlueMask; mask |= PictFormatAlpha | PictFormatAlphaMask; break; case PIXMAN_TYPE_ABGR: tmpl.type = PictTypeDirect; if (tmpl.direct.alphaMask) { tmpl.direct.alphaMask = MASK(PIXMAN_FORMAT_A(format)); tmpl.direct.alpha = (PIXMAN_FORMAT_B(format) + PIXMAN_FORMAT_G(format) + PIXMAN_FORMAT_R(format)); } tmpl.direct.blueMask = MASK(PIXMAN_FORMAT_B(format)); tmpl.direct.blue = (PIXMAN_FORMAT_G(format) + PIXMAN_FORMAT_R(format)); tmpl.direct.greenMask = MASK(PIXMAN_FORMAT_G(format)); tmpl.direct.green = PIXMAN_FORMAT_R(format); tmpl.direct.redMask = MASK(PIXMAN_FORMAT_R(format)); tmpl.direct.red = 0; mask |= PictFormatRed | PictFormatRedMask; mask |= PictFormatGreen | PictFormatGreenMask; mask |= PictFormatBlue | PictFormatBlueMask; mask |= PictFormatAlpha | PictFormatAlphaMask; break; case PIXMAN_TYPE_BGRA: tmpl.type = PictTypeDirect; tmpl.direct.blueMask = MASK(PIXMAN_FORMAT_B(format)); tmpl.direct.blue = (PIXMAN_FORMAT_BPP(format) - PIXMAN_FORMAT_B(format)); tmpl.direct.greenMask = MASK(PIXMAN_FORMAT_G(format)); tmpl.direct.green = (PIXMAN_FORMAT_BPP(format) - PIXMAN_FORMAT_B(format) - PIXMAN_FORMAT_G(format)); tmpl.direct.redMask = MASK(PIXMAN_FORMAT_R(format)); tmpl.direct.red = (PIXMAN_FORMAT_BPP(format) - PIXMAN_FORMAT_B(format) - PIXMAN_FORMAT_G(format) - PIXMAN_FORMAT_R(format)); if (tmpl.direct.alphaMask) { tmpl.direct.alphaMask = MASK(PIXMAN_FORMAT_A(format)); tmpl.direct.alpha = 0; } mask |= PictFormatRed | PictFormatRedMask; mask |= PictFormatGreen | PictFormatGreenMask; mask |= PictFormatBlue | PictFormatBlueMask; mask |= PictFormatAlpha | PictFormatAlphaMask; break; case PIXMAN_TYPE_A: tmpl.type = PictTypeDirect; tmpl.direct.alpha = 0; tmpl.direct.alphaMask = MASK(PIXMAN_FORMAT_A(format)); mask |= PictFormatAlpha | PictFormatAlphaMask; break; case PIXMAN_TYPE_COLOR: case PIXMAN_TYPE_GRAY: /* XXX Find matching visual/colormap */ tmpl.type = PictTypeIndexed; //tmpl.colormap = screen->visuals[PIXMAN_FORMAT_VIS(format)].vid; //mask |= PictFormatColormap; return NULL; } #undef MASK return XRenderFindFormat(dpy, mask, &tmpl, 0); } static int display_init_render(struct display *display, int depth, XRenderPictFormat **use_render) { Display *dpy = display->dpy; int major, minor; DBG(X11, ("%s is depth %d, want %d\n", DisplayString(dpy), display->depth, depth)); *use_render = 0; if (depth == display->depth && !bad_visual(display->visual, depth)) return 0; if (display->root_format == 0) { if (!XRenderQueryVersion(dpy, &major, &minor)) { fprintf(stderr, "Render extension not supported by %s\n", DisplayString(dpy)); return -EINVAL; } display->root_format = XRenderFindVisualFormat(dpy, display->visual); display->rgb16_format = find_xrender_format(dpy, PIXMAN_r5g6b5); display->rgb24_format = XRenderFindStandardFormat(dpy, PictStandardRGB24); DBG(X11, ("%s: root format=%lx, rgb16 format=%lx, rgb24 format=%lx\n", DisplayString(dpy), (long)display->root_format, (long)display->rgb16_format, (long)display->rgb24_format)); } switch (depth) { case 16: *use_render = display->rgb16_format; break; case 24: *use_render = display->rgb24_format; break; } if (*use_render == 0) return -ENOENT; return 0; } static int clone_init_depth(struct clone *clone) { int ret, depth; DBG(X11,("%s-%s wants depth %d\n", DisplayString(clone->dst.dpy), clone->dst.name, clone->depth)); ret = -1; for (depth = clone->depth; depth <= 24; depth += 8) { ret = display_init_render(clone->src.display, depth, &clone->src.use_render); if (ret) continue; ret = display_init_render(clone->dst.display, depth, &clone->dst.use_render); if (ret) continue; break; } if (ret) return ret; DBG(X11, ("%s-%s using depth %d, requires xrender for src? %d, for dst? %d\n", DisplayString(clone->dst.dpy), clone->dst.name, clone->depth, clone->src.use_render != NULL, clone->dst.use_render != NULL)); if (!clone->dst.use_render && clone->src.display->dri3_active && clone->dst.display->dri3_active) dri3_create_fence(clone->src.dpy, clone->src.window, &clone->dri3); return 0; } #if defined(USE_XINERAMA) static int xinerama_active(struct display *display) { int active = 0; if (XineramaQueryExtension(display->dpy, &display->xinerama_event, &display->xinerama_error)) active = XineramaIsActive(display->dpy); return active; } #else #define xinerama_active(d) 0 #endif static int add_display(struct context *ctx, Display *dpy) { struct display *display; int first_display = ctx->ndisplay == 0; if (is_power_of_2(ctx->ndisplay)) { struct display *new_display; new_display = realloc(ctx->display, 2*ctx->ndisplay*sizeof(struct display)); if (new_display == NULL) return -ENOMEM; if (new_display != ctx->display) { int n; for (n = 0; n < ctx->nclone; n++) { struct clone *clone = &ctx->clones[n]; clone->src.display = new_display + (clone->src.display - ctx->display); clone->dst.display = new_display + (clone->dst.display - ctx->display); } } ctx->display = new_display; } display = memset(&ctx->display[ctx->ndisplay++], 0, sizeof(struct display)); display->dpy = dpy; display->ctx = ctx; display->root = DefaultRootWindow(dpy); display->depth = DefaultDepth(dpy, DefaultScreen(dpy)); display->visual = DefaultVisual(dpy, DefaultScreen(dpy)); display->has_shm = can_use_shm(dpy, display->root, &display->shm_event, &display->shm_opcode, &display->has_shm_pixmap); DBG(X11, ("%s: has_shm?=%d, event=%d, opcode=%d, has_pixmap?=%d\n", DisplayString(dpy), display->has_shm, display->shm_event, display->shm_opcode, display->has_shm_pixmap)); display->rr_active = XRRQueryExtension(dpy, &display->rr_event, &display->rr_error); DBG(X11, ("%s: randr_active?=%d, event=%d, error=%d\n", DisplayString(dpy), display->rr_active, display->rr_event, display->rr_error)); display->xinerama_active = xinerama_active(display); DBG(X11, ("%s: xinerama_active?=%d, event=%d, error=%d\n", DisplayString(dpy), display->xinerama_active, display->xinerama_event, display->xinerama_error)); display->dri3_active = dri3_exists(dpy); DBG(X11, ("%s: dri3_active?=%d\n", DisplayString(dpy), display->dri3_active)); /* first display (source) is slightly special */ if (!first_display) { display->invisible_cursor = display_load_invisible_cursor(display); display_cursor_move(display, 0, 0, 0); } return ConnectionNumber(dpy); } static int display_open(struct context *ctx, const char *name) { Display *dpy; int n; DBG(X11, ("%s(%s)\n", __func__, name)); dpy = XOpenDisplay(name); if (dpy == NULL) return -ECONNREFUSED; /* Prevent cloning the same display twice */ for (n = 0; n < ctx->ndisplay; n++) { if (strcmp(DisplayString(dpy), DisplayString(ctx->display[n].dpy)) == 0) { DBG(X11, ("%s %s is already connected\n", __func__, name)); XCloseDisplay(dpy); return -EBUSY; } } return add_display(ctx, dpy); } static int bumblebee_open(struct context *ctx) { char buf[256]; struct sockaddr_un addr; int fd, len; fd = socket(PF_UNIX, SOCK_STREAM, 0); if (fd < 0) { DBG(X11, ("%s unable to create a socket: %d\n", __func__, errno)); return -ECONNREFUSED; } addr.sun_family = AF_UNIX; snprintf(addr.sun_path, sizeof(addr.sun_path), "%s", optarg && *optarg ? optarg : "/var/run/bumblebee.socket"); if (connect(fd, (struct sockaddr *)&addr, sizeof(addr)) < 0) { DBG(X11, ("%s unable to create a socket: %d\n", __func__, errno)); goto err; } /* Ask bumblebee to start the second server */ buf[0] = 'C'; if (send(fd, &buf, 1, 0) != 1 || (len = recv(fd, &buf, 255, 0)) <= 0) { DBG(X11, ("%s startup send/recv failed: %d\n", __func__, errno)); goto err; } buf[len] = '\0'; /* Query the display name */ strcpy(buf, "Q VirtualDisplay"); if (send(fd, buf, 17, 0) != 17 || (len = recv(fd, buf, 255, 0)) <= 0) { DBG(X11, ("%s query send/recv failed: %d\n", __func__, errno)); goto err; } buf[len] = '\0'; DBG(X11, ("%s query result '%s'\n", __func__, buf)); if (strncmp(buf, "Value: ", 7)) goto err; len = 7; while (buf[len] != '\n' && buf[len] != '\0') len++; buf[len] = '\0'; /* XXX We must keep the control socket open whilst we want to keep * the display around. * * So what we need to do is listen for new bumblee Xservers and * bind only for their duration. */ return display_open(ctx, buf+7); err: close(fd); return -ECONNREFUSED; } static int display_init_damage(struct display *display) { DBG(X11, ("%s(%s)\n", __func__, DisplayString(display->dpy))); if (!XDamageQueryExtension(display->dpy, &display->damage_event, &display->damage_error) || !XFixesQueryExtension(display->dpy, &display->xfixes_event, &display->xfixes_error)) { fprintf(stderr, "Damage/Fixes extension not supported by %s\n", DisplayString(display->dpy)); return EINVAL; } display->damage = XDamageCreate(display->dpy, display->root, XDamageReportBoundingBox); if (display->damage == 0) return EACCES; return 0; } static void display_reset_damage(struct display *display) { Damage damage; damage = XDamageCreate(display->dpy, display->root, XDamageReportBoundingBox); if (damage) { XDamageDestroy(display->dpy, display->damage); display->damage = damage; XFlush(display->dpy); display->flush = 0; } } static void display_init_randr_hpd(struct display *display) { int major, minor; DBG(X11,("%s(%s)\n", __func__, DisplayString(display->dpy))); if (!XRRQueryVersion(display->dpy, &major, &minor)) return; DBG(X11, ("%s - randr version %d.%d\n", DisplayString(display->dpy), major, minor)); if (major > 1 || (major == 1 && minor >= 2)) XRRSelectInput(display->dpy, display->root, RROutputChangeNotifyMask); } static void rebuild_clones(struct context *ctx, struct clone *new_clones) { int n, m; for (n = 1; n < ctx->ndisplay; n++) { struct display *d = &ctx->display[n]; d->clone = NULL; for (m = 0; m < ctx->nclone; m++) { struct clone *c = &new_clones[m]; if (c->dst.display != d) continue; c->next = d->clone; d->clone = c; } } ctx->clones = new_clones; } static struct clone *add_clone(struct context *ctx) { if (is_power_of_2(ctx->nclone)) { struct clone *new_clones; new_clones = realloc(ctx->clones, 2*ctx->nclone*sizeof(struct clone)); if (new_clones == NULL) return NULL; if (new_clones != ctx->clones) rebuild_clones(ctx, new_clones); } return memset(&ctx->clones[ctx->nclone++], 0, sizeof(struct clone)); } static struct display *last_display(struct context *ctx) { return &ctx->display[ctx->ndisplay-1]; } static void reverse_clone_list(struct display *display) { struct clone *list = NULL; while (display->clone) { struct clone *clone = display->clone; display->clone = clone->next; clone->next = list; list = clone; } display->clone = list; } static int last_display_add_clones__randr(struct context *ctx) { struct display *display = last_display(ctx); XRRScreenResources *res; char buf[80]; int i, ret; DBG(X11, ("%s(%s)\n", __func__, DisplayString(display->dpy))); display_init_randr_hpd(display); /* Force a probe of outputs on initial connection */ res = XRRGetScreenResources(display->dpy, display->root); if (res == NULL) return -ENOMEM; DBG(X11, ("%s - noutputs=%d\n", DisplayString(display->dpy), res->noutput)); for (i = 0; i < res->noutput; i++) { XRROutputInfo *o = XRRGetOutputInfo(display->dpy, res, res->outputs[i]); struct clone *clone = add_clone(ctx); RROutput id; if (clone == NULL) return -ENOMEM; clone->depth = 24; clone->next = display->clone; display->clone = clone; id = claim_virtual(ctx->display, buf, ctx->nclone); if (id == 0) { fprintf(stderr, "Failed to find available VirtualHead \"%s\" for \"%s\" on display \"%s\"\n", buf, o->name, DisplayString(display->dpy)); return -ENOSPC; } ret = clone_output_init(clone, &clone->src, ctx->display, buf, id); if (ret) { fprintf(stderr, "Failed to add output \"%s\" on display \"%s\"\n", buf, DisplayString(ctx->display->dpy)); return ret; } ret = clone_output_init(clone, &clone->dst, display, o->name, res->outputs[i]); if (ret) { fprintf(stderr, "Failed to add output \"%s\" on display \"%s\"\n", o->name, DisplayString(display->dpy)); return ret; } ret = clone_init_depth(clone); if (ret) { fprintf(stderr, "Failed to negotiate image format for display \"%s\"\n", DisplayString(display->dpy)); return ret; } ret = clone_update_modes__randr(clone); if (ret) { fprintf(stderr, "Failed to clone output \"%s\" from display \"%s\"\n", o->name, DisplayString(display->dpy)); return ret; } if (o->crtc) { DBG(X11, ("%s - disabling active output\n", DisplayString(display->dpy))); disable_crtc(display->dpy, res, o->crtc); } XRRFreeOutputInfo(o); } XRRFreeScreenResources(res); reverse_clone_list(display); return 0; } #if defined(USE_XINERAMA) static int last_display_add_clones__xinerama(struct context *ctx) { struct display *display = last_display(ctx); Display *dpy = display->dpy; XineramaScreenInfo *xi; char buf[80]; int n, count, ret; DBG(X11, ("%s(%s)\n", __func__, DisplayString(display->dpy))); count = 0; xi = XineramaQueryScreens(dpy, &count); for (n = 0; n < count; n++) { struct clone *clone = add_clone(ctx); RROutput id; if (clone == NULL) return -ENOMEM; if (xi[n].width == 0 || xi[n].height == 0) continue; clone->depth = 24; clone->next = display->clone; display->clone = clone; id = claim_virtual(ctx->display, buf, ctx->nclone); if (id == 0) { fprintf(stderr, "Failed to find available VirtualHead \"%s\" for Xinerama screen %d on display \"%s\"\n", buf, n, DisplayString(dpy)); } ret = clone_output_init(clone, &clone->src, ctx->display, buf, id); if (ret) { fprintf(stderr, "Failed to add Xinerama screen %d on display \"%s\"\n", n, DisplayString(ctx->display->dpy)); return ret; } sprintf(buf, "XINERAMA%d", n); ret = clone_output_init(clone, &clone->dst, display, buf, 0); if (ret) { fprintf(stderr, "Failed to add Xinerama screen %d on display \"%s\"\n", n, DisplayString(dpy)); return ret; } ret = clone_init_depth(clone); if (ret) { fprintf(stderr, "Failed to negotiate image format for display \"%s\"\n", DisplayString(display->dpy)); return ret; } /* Replace the modes on the local VIRTUAL output with the remote Screen */ clone->width = xi[n].width; clone->height = xi[n].height; clone->dst.x = xi[n].x_org; clone->dst.y = xi[n].y_org; clone->dst.rr_crtc = -1; ret = clone_update_modes__fixed(clone); if (ret) { fprintf(stderr, "Failed to clone Xinerama screen %d from display \"%s\"\n", n, DisplayString(display->dpy)); return ret; } clone->active = ctx->active; ctx->active = clone; } XFree(xi); reverse_clone_list(display); return 0; } #else #define last_display_add_clones__xinerama(ctx) -1 #endif static int last_display_add_clones__display(struct context *ctx) { struct display *display = last_display(ctx); Display *dpy = display->dpy; struct clone *clone; Screen *scr; char buf[80]; int ret; RROutput id; DBG(X11, ("%s(%s)\n", __func__, DisplayString(dpy))); clone = add_clone(ctx); if (clone == NULL) return -ENOMEM; clone->depth = 24; clone->next = display->clone; display->clone = clone; id = claim_virtual(ctx->display, buf, ctx->nclone); if (id == 0) { fprintf(stderr, "Failed to find available VirtualHead \"%s\" for on display \"%s\"\n", buf, DisplayString(dpy)); } ret = clone_output_init(clone, &clone->src, ctx->display, buf, id); if (ret) { fprintf(stderr, "Failed to add display \"%s\"\n", DisplayString(ctx->display->dpy)); return ret; } sprintf(buf, "WHOLE"); ret = clone_output_init(clone, &clone->dst, display, buf, 0); if (ret) { fprintf(stderr, "Failed to add display \"%s\"\n", DisplayString(dpy)); return ret; } ret = clone_init_depth(clone); if (ret) { fprintf(stderr, "Failed to negotiate image format for display \"%s\"\n", DisplayString(dpy)); return ret; } /* Replace the modes on the local VIRTUAL output with the remote Screen */ scr = ScreenOfDisplay(dpy, DefaultScreen(dpy)); clone->width = scr->width; clone->height = scr->height; clone->dst.x = 0; clone->dst.y = 0; clone->dst.rr_crtc = -1; ret = clone_update_modes__fixed(clone); if (ret) { fprintf(stderr, "Failed to clone display \"%s\"\n", DisplayString(dpy)); return ret; } clone->active = ctx->active; ctx->active = clone; return 0; } static int last_display_add_clones(struct context *ctx) { struct display *display = last_display(ctx); display->width = DisplayWidth(display->dpy, DefaultScreen(display->dpy)); display->height = DisplayHeight(display->dpy, DefaultScreen(display->dpy)); DBG(X11, ("%s - initial size %dx%d\n", DisplayString(display->dpy), display->width, display->height)); if (display->rr_active) return last_display_add_clones__randr(ctx); if (display->xinerama_active) return last_display_add_clones__xinerama(ctx); return last_display_add_clones__display(ctx); } static int last_display_clone(struct context *ctx, int fd) { fd = add_fd(ctx, fd); if (fd < 0) return fd; fd = last_display_add_clones(ctx); if (fd) return fd; return 0; } static int first_display_has_singleton(struct context *ctx) { struct display *display = ctx->display; unsigned long nitems, bytes; unsigned char *prop; int format; Atom type; ctx->singleton = XInternAtom(display->dpy, "intel-virtual-output-singleton", False); XGetWindowProperty(display->dpy, display->root, ctx->singleton, 0, 0, 0, AnyPropertyType, &type, &format, &nitems, &bytes, &prop); DBG(X11, ("%s: singleton registered? %d\n", DisplayString(display->dpy), type != None)); return type != None; } static int first_display_wait_for_ack(struct context *ctx, int timeout, int id) { struct display *display = ctx->display; struct pollfd pfd; char expect[6]; /* "1234R\0" */ sprintf(expect, "%04xR", id); DBG(X11, ("%s: wait for act '%c%c%c%c%c'\n", DisplayString(display->dpy), expect[0], expect[1], expect[2], expect[3], expect[4])); XFlush(display->dpy); pfd.fd = ConnectionNumber(display->dpy); pfd.events = POLLIN; do { if (poll(&pfd, 1, timeout) <= 0) return -ETIME; while (XPending(display->dpy)) { XEvent e; XClientMessageEvent *cme; XNextEvent(display->dpy, &e); DBG(X11, ("%s: reading event type %d\n", DisplayString(display->dpy), e.type)); if (e.type != ClientMessage) continue; cme = (XClientMessageEvent *)&e; if (cme->message_type != ctx->singleton) continue; if (cme->format != 8) continue; DBG(X11, ("%s: client message '%c%c%c%c%c'\n", DisplayString(display->dpy), cme->data.b[0], cme->data.b[1], cme->data.b[2], cme->data.b[3], cme->data.b[4])); if (memcmp(cme->data.b, expect, 5)) continue; return -atoi(cme->data.b + 5); } } while (1); } #if defined(__GNUC__) && (__GNUC__ > 3) __attribute__((format(gnu_printf, 3, 4))) #endif static int first_display_send_command(struct context *ctx, int timeout, const char *format, ...) { struct display *display = ctx->display; char buf[1024], *b; int len, id; va_list va; id = rand() & 0xffff; sprintf(buf, "%04x", id); va_start(va, format); len = vsnprintf(buf+4, sizeof(buf)-4, format, va)+5; va_end(va); assert(len < sizeof(buf)); DBG(X11, ("%s: send command '%s'\n", DisplayString(display->dpy), buf)); b = buf; while (len) { XClientMessageEvent msg; int n = len; if (n > sizeof(msg.data.b)) n = sizeof(msg.data.b); len -= n; msg.type = ClientMessage; msg.serial = 0; msg.message_type = ctx->singleton; msg.format = 8; memcpy(msg.data.b, b, n); b += n; XSendEvent(display->dpy, display->root, False, PropertyChangeMask, (XEvent *)&msg); } return first_display_wait_for_ack(ctx, timeout, id); } static void first_display_reply(struct context *ctx, int result) { struct display *display = ctx->display; XClientMessageEvent msg; sprintf(msg.data.b, "%c%c%c%cR%d", ctx->command[0], ctx->command[1], ctx->command[2], ctx->command[3], -result); DBG(X11, ("%s: send reply '%s'\n", DisplayString(display->dpy), msg.data.b)); msg.type = ClientMessage; msg.serial = 0; msg.message_type = ctx->singleton; msg.format = 8; XSendEvent(display->dpy, display->root, False, PropertyChangeMask, (XEvent *)&msg); XFlush(display->dpy); } static void first_display_handle_command(struct context *ctx, const char *msg) { int len; DBG(X11, ("client message!\n")); for (len = 0; len < 20 && msg[len]; len++) ; if (ctx->command_continuation + len > sizeof(ctx->command)) { ctx->command_continuation = 0; return; } memcpy(ctx->command + ctx->command_continuation, msg, len); ctx->command_continuation += len; if (len < 20) { ctx->command[ctx->command_continuation] = 0; DBG(X11, ("client command complete! '%s'\n", ctx->command)); switch (ctx->command[4]) { case 'B': first_display_reply(ctx, last_display_clone(ctx, bumblebee_open(ctx))); break; case 'C': first_display_reply(ctx, last_display_clone(ctx, display_open(ctx, ctx->command + 5))); break; case 'P': first_display_reply(ctx, 0); break; case 'R': break; } ctx->command_continuation = 0; return; } } static int first_display_register_as_singleton(struct context *ctx) { struct display *display = ctx->display; struct pollfd pfd; XChangeProperty(display->dpy, display->root, ctx->singleton, XA_STRING, 8, PropModeReplace, (unsigned char *)".", 1); XFlush(display->dpy); /* And eat the notify (presuming that it is ours!) */ pfd.fd = ConnectionNumber(display->dpy); pfd.events = POLLIN; do { if (poll(&pfd, 1, 1000) <= 0) { fprintf(stderr, "Failed to register as singleton\n"); return EBUSY; } while (XPending(display->dpy)) { XEvent e; XNextEvent(display->dpy, &e); DBG(X11, ("%s: reading event type %d\n", DisplayString(display->dpy), e.type)); if (e.type == PropertyNotify && ((XPropertyEvent *)&e)->atom == ctx->singleton) return 0; } } while (1); } static void display_flush_send(struct display *display) { XShmCompletionEvent e; if (!display->send) return; DBG(X11, ("%s flushing send (serial now %ld) (has shm send? %d)\n", DisplayString(display->dpy), (long)NextRequest(display->dpy), display->shm_event)); display->send = 0; if (display->shm_event == 0) { XSync(display->dpy, False); display->flush = 0; return; } memset(&e, 0, sizeof(e)); e.type = display->shm_event; e.send_event = 1; e.drawable = display->root; e.major_code = display->shm_opcode; e.minor_code = X_ShmPutImage; XSendEvent(display->dpy, display->root, False, 0, (XEvent *)&e); display_mark_flush(display); } static void display_sync(struct display *display) { if (display->skip_clone == 0) return; if (display->skip_frame++ < 2) return; DBG(X11, ("%s forcing sync\n", DisplayString(display->dpy))); XSync(display->dpy, False); display->flush = 0; display->send = 0; /* Event tracking proven unreliable, disable */ display->shm_event = 0; } static void display_flush(struct display *display) { display_flush_cursor(display); display_flush_send(display); display_sync(display); if (!display->flush) return; DBG(X11, ("%s(%s)\n", __func__, DisplayString(display->dpy))); XFlush(display->dpy); display->flush = 0; } static int first_display_first_sibling(struct context *ctx) { const char *str, *colon; int dpy, scr, len; str = DisplayString(ctx->display->dpy); colon = strrchr(str, ':'); if (colon == NULL) return -1; if (sscanf(colon + 1, "%d.%d", &dpy, &scr) == 1) scr = 0; len = (colon - str) + 1; memcpy(ctx->command, str, len); len += sprintf(ctx->command + len, "%d.", dpy); ctx->command_continuation = len; return scr + 1; } static int first_display_sibling(struct context *ctx, int i) { if (i < 0) return 0; sprintf(ctx->command + ctx->command_continuation, "%d", i); return 1; } #define first_display_for_each_sibling(CTX, i) \ for (i = first_display_first_sibling(CTX); first_display_sibling(CTX, i); i++) static void display_cleanup(struct display *display) { Display *dpy = display->dpy; XRRScreenResources *res; int n; XGrabServer(dpy); res = _XRRGetScreenResourcesCurrent(dpy, display->root); if (res != NULL) { for (n = 0; n < res->ncrtc; n++) disable_crtc(display->dpy, res, res->crtcs[n]); XRRFreeScreenResources(res); } XUngrabServer(dpy); } static void context_cleanup(struct context *ctx) { Display *dpy = ctx->display->dpy; XRRScreenResources *res; int i, j; for (i = 1; i < ctx->ndisplay; i++) display_cleanup(&ctx->display[i]); if (dpy == NULL) return; res = _XRRGetScreenResourcesCurrent(dpy, ctx->display->root); if (res == NULL) return; XGrabServer(dpy); for (i = 0; i < ctx->nclone; i++) { struct clone *clone = &ctx->clones[i]; XRROutputInfo *output; assert(clone->src.display == ctx->display); output = XRRGetOutputInfo(dpy, res, clone->src.rr_output); if (output == NULL) continue; disable_crtc(dpy, res, output->crtc); for (j = 0; j < output->nmode; j++) XRRDeleteOutputMode(dpy, clone->src.rr_output, output->modes[j]); XRRFreeOutputInfo(output); } for (i = 0; i < res->nmode; i++) { if (strncmp(res->modes[i].name, "VIRTUAL", 7) == 0) { XRRDestroyMode(dpy, res->modes[i].id); continue; } if (strcmp(res->modes[i].name, "ClaimVirtualHead") == 0) { XRRDestroyMode(dpy, res->modes[i].id); continue; } } XRRFreeScreenResources(res); /* And hide them again */ res = XRRGetScreenResources(dpy, ctx->display->root); if (res != NULL) XRRFreeScreenResources(res); XUngrabServer(dpy); if (ctx->singleton) XDeleteProperty(dpy, ctx->display->root, ctx->singleton); XCloseDisplay(dpy); } static int done; static void signal_handler(int sig) { done = sig; } int main(int argc, char **argv) { struct context ctx; const char *src_name = NULL; uint64_t count; int daemonize = 1, bumblebee = 0, siblings = 0, singleton = 1; int i, ret, open, fail; signal(SIGPIPE, SIG_IGN); while ((i = getopt(argc, argv, "abd:fhSvV:")) != -1) { switch (i) { case 'd': src_name = optarg; break; case 'f': daemonize = 0; break; case 'b': bumblebee = 1; break; case 's': siblings = 1; break; case 'S': singleton = 0; break; case 'v': verbose = ~0; daemonize = 0; break; case 'V': verbose = strtol(optarg, NULL, 0); daemonize = 0; break; case 'h': default: usage(argv[0]); exit(0); } } if (verbose) printf("intel-virtual-output: version %d.%d.%d\n", PACKAGE_VERSION_MAJOR, PACKAGE_VERSION_MINOR, PACKAGE_VERSION_PATCHLEVEL); ret = context_init(&ctx); if (ret) return -ret; XSetErrorHandler(_check_error_handler); ret = add_fd(&ctx, display_open(&ctx, src_name)); if (ret) { fprintf(stderr, "Unable to connect to \"%s\".\n", src_name ?: getenv("DISPLAY") ?: ", set either the DISPLAY environment variable or pass -d on the commandline"); ret = -ret; goto out; } if (singleton) { XSelectInput(ctx.display->dpy, ctx.display->root, PropertyChangeMask); if (first_display_has_singleton(&ctx)) { DBG(X11, ("%s: pinging singleton\n", DisplayString(ctx.display->dpy))); ret = first_display_send_command(&ctx, 2000, "P"); if (ret) { if (ret != -ETIME) { ret = -ret; goto out; } DBG(X11, ("No reply from singleton; assuming control\n")); } else { DBG(X11, ("%s: singleton active, sending open commands\n", DisplayString(ctx.display->dpy))); open = fail = 0; for (i = optind; i < argc; i++) { ret = first_display_send_command(&ctx, 5000, "C%s", argv[i]); if (ret && ret != -EBUSY) { fprintf(stderr, "Unable to connect to \"%s\".\n", argv[i]); fail++; } else open++; } if (siblings || (optind == argc && !bumblebee)) { first_display_for_each_sibling(&ctx, i) { ret = first_display_send_command(&ctx, 5000, "C%s", ctx.command); if (ret && ret != -EBUSY) break; else open++; } } if (bumblebee || (optind == argc && !siblings)) { ret = first_display_send_command(&ctx, 5000, "B"); if (ret && ret != -EBUSY) { if (bumblebee) fprintf(stderr, "Unable to connect to bumblebee.\n"); fail++; } else open++; } ret = open || !fail ? 0 : ECONNREFUSED; goto out; } } ret = first_display_register_as_singleton(&ctx); if (ret) goto out; } ret = display_init_damage(ctx.display); if (ret) goto out; if ((ctx.display->rr_event | ctx.display->rr_error) == 0) { fprintf(stderr, "RandR extension not supported by %s\n", DisplayString(ctx.display->dpy)); ret = EINVAL; goto out; } XRRSelectInput(ctx.display->dpy, ctx.display->root, RRScreenChangeNotifyMask); XFixesSelectCursorInput(ctx.display->dpy, ctx.display->root, XFixesDisplayCursorNotifyMask); ret = add_fd(&ctx, record_mouse(&ctx)); if (ret) { fprintf(stderr, "XTEST extension not supported by display \"%s\"\n", DisplayString(ctx.display->dpy)); ret = -ret; goto out; } open = fail = 0; for (i = optind; i < argc; i++) { ret = last_display_clone(&ctx, display_open(&ctx, argv[i])); if (ret && ret != -EBUSY) { fprintf(stderr, "Unable to connect to \"%s\".\n", argv[i]); fail++; } else open++; } if (siblings || (optind == argc && !bumblebee)) { first_display_for_each_sibling(&ctx, i) { ret = last_display_clone(&ctx, display_open(&ctx, ctx.command)); if (ret && ret != -EBUSY) break; else open++; } } if (bumblebee || (optind == argc && !siblings)) { ret = last_display_clone(&ctx, bumblebee_open(&ctx)); if (ret && ret != -EBUSY) { if (bumblebee) fprintf(stderr, "Unable to connect to bumblebee.\n"); fail++; } else open++; } if (open == 0) { ret = fail ? ECONNREFUSED : 0; goto out; } if (daemonize && daemon(0, 0)) { ret = EINVAL; goto out; } signal(SIGHUP, signal_handler); signal(SIGINT, signal_handler); signal(SIGTERM, signal_handler); ctx.command_continuation = 0; while (!done) { XEvent e; int reconfigure = 0; int rr_update = 0; DBG(POLL, ("polling - enable timer? %d, nfd=%d, ndisplay=%d\n", ctx.timer_active, ctx.nfd, ctx.ndisplay)); ret = poll(ctx.pfd + !ctx.timer_active, ctx.nfd - !ctx.timer_active, -1); if (ret <= 0) break; /* pfd[0] is the timer, pfd[1] is the local display, pfd[2] is the mouse, pfd[3+] are the remotes */ DBG(POLL, ("poll reports %d fd awake\n", ret)); if (ctx.pfd[1].revents || XPending(ctx.display[0].dpy)) { DBG(POLL,("%s woken up\n", DisplayString(ctx.display[0].dpy))); do { XNextEvent(ctx.display->dpy, &e); if (e.type == ctx.display->damage_event + XDamageNotify ) { const XDamageNotifyEvent *de = (const XDamageNotifyEvent *)&e; struct clone *clone; DBG(DAMAGE, ("%s damaged: (%d, %d)x(%d, %d)\n", DisplayString(ctx.display->dpy), de->area.x, de->area.y, de->area.width, de->area.height)); for (clone = ctx.active; clone; clone = clone->active) clone_damage(clone, &de->area); if (ctx.active) context_enable_timer(&ctx); } else if (e.type == ctx.display->xfixes_event + XFixesCursorNotify) { XFixesCursorImage *cur; DBG(CURSOR, ("%s cursor changed\n", DisplayString(ctx.display->dpy))); cur = XFixesGetCursorImage(ctx.display->dpy); if (cur == NULL) continue; for (i = 1; i < ctx.ndisplay; i++) display_load_visible_cursor(&ctx.display[i], cur); XFree(cur); } else if (e.type == ctx.display->rr_event + RRScreenChangeNotify) { DBG(XRR, ("%s screen changed (reconfigure pending? %d)\n", DisplayString(ctx.display->dpy), reconfigure)); reconfigure = 1; } else if (e.type == PropertyNotify) { XPropertyEvent *pe = (XPropertyEvent *)&e; if (pe->atom == ctx.singleton) { DBG(X11, ("lost control of singleton\n")); return 0; } } else if (e.type == ClientMessage) { XClientMessageEvent *cme; DBG(X11, ("%s client message\n", DisplayString(ctx.display->dpy))); cme = (XClientMessageEvent *)&e; if (cme->message_type != ctx.singleton) continue; if (cme->format != 8) continue; first_display_handle_command(&ctx, cme->data.b); } else { DBG(X11, ("unknown event %d\n", e.type)); } } while (XEventsQueued(ctx.display->dpy, QueuedAfterReading)); } for (i = 1; i < ctx.ndisplay; i++) { if (ctx.pfd[i+2].revents == 0 && !XPending(ctx.display[i].dpy)) continue; DBG(POLL, ("%s woken up\n", DisplayString(ctx.display[i].dpy))); do { XNextEvent(ctx.display[i].dpy, &e); DBG(POLL, ("%s received event %d\n", DisplayString(ctx.display[i].dpy), e.type)); if (ctx.display[i].rr_active && e.type == ctx.display[i].rr_event + RRNotify) { XRRNotifyEvent *re = (XRRNotifyEvent *)&e; DBG(XRR, ("%s received RRNotify, type %d\n", DisplayString(ctx.display[i].dpy), re->subtype)); if (re->subtype == RRNotify_OutputChange) { XRROutputPropertyNotifyEvent *ro = (XRROutputPropertyNotifyEvent *)re; struct clone *clone; DBG(XRR, ("%s RRNotify_OutputChange, timestamp %ld\n", DisplayString(ctx.display[i].dpy), ro->timestamp)); for (clone = ctx.display[i].clone; clone; clone = clone->next) { if (clone->dst.rr_output == ro->output) rr_update = clone->rr_update = 1; } } } } while (XEventsQueued(ctx.display[i].dpy, QueuedAfterReading)); } if (rr_update) { for (i = 0; i < ctx.nclone; i++) clone_update(&ctx.clones[i]); } if (reconfigure && context_update(&ctx)) display_reset_damage(ctx.display); while (XPending(ctx.record)) /* discard all implicit events */ XNextEvent(ctx.record, &e); if (ctx.timer_active && read(ctx.timer, &count, sizeof(count)) > 0) { struct clone *clone; DBG(TIMER, ("%s timer expired (count=%ld)\n", DisplayString(ctx.display->dpy), (long)count)); ret = 0; if (ctx.active) { DBG(DAMAGE, ("%s clearing damage\n", DisplayString(ctx.display->dpy))); XDamageSubtract(ctx.display->dpy, ctx.display->damage, None, None); ctx.display->flush = 1; } for (clone = ctx.active; clone; clone = clone->active) ret |= clone_paint(clone); for (i = 0; i < ctx.ndisplay; i++) display_flush(&ctx.display[i]); DBG(TIMER, ("%s timer still active? %d\n", DisplayString(ctx.display->dpy), ret != 0)); ctx.timer_active = ret != 0; } } ret = 0; out: context_cleanup(&ctx); return ret; } xf86-video-intel-2.99.917/tools/backlight_helper.c0000664000175000017500000000231012400044327016512 00000000000000#include #include #include #include #include #include #include #include #include #define DBG 0 #if defined(__GNUC__) && (__GNUC__ > 3) __attribute__((format(printf, 1, 2), noreturn)) #endif static void die(const char *format, ...) { if (DBG) { va_list args; va_start(args, format); vfprintf(stderr, format, args); va_end(args); } exit(1); } int main(int argc, char *argv[]) { struct stat st; char buf[1024]; int len, fd; if (argc != 2) die("Usage: xf86-video-intel-backlight-helper \n"); if (strchr(argv[1], '/') != NULL) die("Invalid interface '%s': contains '/'\n", argv[1]); if (snprintf(buf, sizeof(buf), "/sys/class/backlight/%s/brightness", argv[1]) >= sizeof(buf)) die("Invalid interface '%s': name too long\n", argv[1]); fd = open(buf, O_RDWR); if (fd < 0 || fstat(fd, &st) || major(st.st_dev)) die("Invalid interface '%s': unknown backlight file\n", argv[1]); while (fgets(buf, sizeof(buf), stdin)) { len = strlen(buf); if (write(fd, buf, len) != len) die("Failed to update backlight interface '%s': errno=%d\n", argv[1], errno); } return 0; } xf86-video-intel-2.99.917/tools/Makefile.in0000664000175000017500000007736012445556120015155 00000000000000# Makefile.in generated by automake 1.14.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 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@BUILD_BACKLIGHT_HELPER_TRUE@install-exec-hook: @BUILD_BACKLIGHT_HELPER_TRUE@ -chown root $(DESTDIR)$(backlight_helper) && chmod u+s $(DESTDIR)$(backlight_helper) .man.$(DRIVER_MAN_SUFFIX): $(AM_V_GEN)$(SED) $(MAN_SUBSTS) < $< > $@ # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: xf86-video-intel-2.99.917/tools/intel-virtual-output.man0000664000175000017500000000226412400044327017721 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel-virtual-output __drivermansuffix__ __vendorversion__ .SH NAME intel-virtual-output \- Utility for connecting the Integrated Intel GPU to discrete outputs .SH SYNOPSIS .nf .B "intel-virtual-output [] ..." .fi .SH DESCRIPTION .B intel-virtual-output is a utility for Intel integrated graphics chipsets on hybrid systems. The tool connects local VirtualHeads to a remote output, allowing the primary display to extend onto the remote outputs. .SH REPORTING BUGS The xf86-video-intel driver is part of the X.Org and Freedesktop.org umbrella projects. Details on bug reporting can be found at https://01.org/linuxgraphics/documentation/how-report-bugs. Mailing lists are also commonly used to report experiences and ask questions about configuration and other topics. See lists.freedesktop.org for more information (the xorg@lists.freedesktop.org mailing list is the most appropriate place to ask X.Org and driver related questions). .SH "SEE ALSO" intel(__drivermansuffix__), __xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__) xf86-video-intel-2.99.917/man/0000775000175000017500000000000012445556130012567 500000000000000xf86-video-intel-2.99.917/man/Makefile.am0000664000175000017500000000273512244635610014550 00000000000000# # Copyright 2005 Sun Microsystems, Inc. All rights reserved. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # the rights to use, copy, modify, merge, publish, distribute, sublicense, # and/or sell copies of the Software, and to permit persons to whom the # Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL # THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER # LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER # DEALINGS IN THE SOFTWARE. # drivermandir = $(DRIVER_MAN_DIR) driverman_DATA = $(DRIVER_NAME).$(DRIVER_MAN_SUFFIX) EXTRA_DIST = $(DRIVER_NAME).man CLEANFILES = $(driverman_DATA) # String replacements in MAN_SUBSTS now come from xorg-macros.m4 via configure SUFFIXES = .$(DRIVER_MAN_SUFFIX) .man .man.$(DRIVER_MAN_SUFFIX): $(AM_V_GEN)$(SED) $(MAN_SUBSTS) < $< > $@ xf86-video-intel-2.99.917/man/intel.man0000664000175000017500000005277412432737457014347 00000000000000.\" shorthand for double quote that works everywhere. .ds q \N'34' .TH intel __drivermansuffix__ __vendorversion__ .SH NAME intel \- Intel integrated graphics chipsets .SH SYNOPSIS .nf .B "Section \*qDevice\*q" .BI " Identifier \*q" devname \*q .B " Driver \*qintel\*q" \ \ ... .B EndSection .fi .SH DESCRIPTION .B intel is an __xservername__ driver for Intel integrated graphics chipsets. The driver supports depths 8, 15, 16 and 24. All visual types are supported in depth 8. For the i810/i815 other depths support the TrueColor and DirectColor visuals. For the i830M and later, only the TrueColor visual is supported for depths greater than 8. The driver supports hardware accelerated 3D via the Direct Rendering Infrastructure (DRI), but only in depth 16 for the i810/i815 and depths 16 and 24 for the 830M and later. .SH SUPPORTED HARDWARE .B intel supports the i810, i810-DC100, i810e, i815, i830M, 845G, 852GM, 855GM, 865G, 915G, 915GM, 945G, 945GM, 965G, 965Q, 946GZ, 965GM, 945GME, G33, Q33, Q35, G35, GM45, G45, Q45, G43, G41 chipsets, Pineview-M in Atom N400 series, Pineview-D in Atom D400/D500 series, Intel(R) HD Graphics: 2000-6000, Intel(R) Iris(TM) Graphics: 5100/6100, and Intel(R) Iris(TM) Pro Graphics: 5200/6200/P6300. .SH CONFIGURATION DETAILS Please refer to __xconfigfile__(__filemansuffix__) for general configuration details. This section only covers configuration details specific to this driver. .PP The Intel 8xx and 9xx families of integrated graphics chipsets have a unified memory architecture meaning that system memory is used as video RAM. For the i810 and i815 family of chipsets, operating system support for allocating system memory is required in order to use this driver. For the 830M and later, this is required in order for the driver to use more video RAM than has been pre-allocated at boot time by the BIOS. This is usually achieved with an "agpgart" or "agp" kernel driver. Linux, FreeBSD, OpenBSD, NetBSD, and Solaris have such kernel drivers available. .PP By default, the i810/i815 will use 8 MB of system memory for graphics if AGP allocable memory is < 128 MB, 16 MB if < 192 MB or 24 MB if higher. Use the .B VideoRam option to change the default value. .PP For the 830M and later, the driver will automatically size its memory allocation according to the features it will support. Therefore, the .B VideoRam option, which in the past had been necessary to allow more than some small amount of memory to be allocated, is now ignored. .PP The following driver .B Options are supported .TP .BI "Option \*qColorKey\*q \*q" integer \*q This sets the default pixel value for the YUV video overlay key. .IP Default: undefined. .TP .BI "Option \*qDRI\*q \*q" string \*q Disable or enable DRI support. A driver name to use can be provided instead of simple boolean value, which will be passed to the GL implementation for it to load the appropriate backend. Alternatively the maximum level of DRI to enable (e.g. "1", "2" or "3") can be specified. .IP Default: All levels of DRI are enabled for configurations where it is supported. .PP The following driver .B Options are supported for the i810 and i815 chipsets: .TP .BI "Option \*qCacheLines\*q \*q" integer \*q This allows the user to change the amount of graphics memory used for 2D acceleration and video when XAA acceleration is enabled. Decreasing this amount leaves more for 3D textures. Increasing it can improve 2D performance at the expense of 3D performance. .IP Default: depends on the resolution, depth, and available video memory. The driver attempts to allocate space for at 3 screenfuls of pixmaps plus an HD-sized XV video. The default used for a specific configuration can be found by examining the __xservername__ log file. .TP .BI "Option \*qDDC\*q \*q" boolean \*q Disable or enable DDC support. .IP Default: enabled. .TP .BI "Option \*qDac6Bit\*q \*q" boolean \*q Enable or disable 6-bits per RGB for 8-bit modes. .IP Default: 8-bits per RGB for 8-bit modes. .TP .BI "Option \*qXvMCSurfaces\*q \*q" integer \*q This option enables XvMC. The integer parameter specifies the number of surfaces to use. Valid values are 6 and 7. .IP Default: XvMC is disabled. .TP .BI "VideoRam " integer This option specifies the amount of system memory to use for graphics, in KB. .IP The default is 8192 if AGP allocable memory is < 128 MB, 16384 if < 192 MB, 24576 if higher. DRI require at least a value of 16384. Higher values may give better 3D performance, at expense of available system memory. .TP .BI "Option \*qNoAccel\*q \*q" boolean \*q Disable or enable acceleration. .IP Default: acceleration is enabled. .PP The following driver .B Options are supported for the 830M and later chipsets: .TP .BI "Option \*qNoAccel\*q \*q" boolean \*q Disable or enable acceleration. .IP Default: acceleration is enabled. .TP .BI "Option \*qPresent\*q \*q" boolean \*q Enable use of hardware counters and flow control for the Present extension. .IP Default: Enabled .TP .BI "Option \*qAccelMethod\*q \*q" string \*q Select acceleration method. There are a couple of backends available for accelerating the DDX. \*qUXA\*q (Unified Acceleration Architecture) is the mature backend that was introduced to support the GEM driver model. It is in the process of being superseded by \*qSNA\*q (Sandybridge's New Acceleration). Until that process is complete, the ability to choose which backend to use remains for backwards compatibility. In addition, there are a pair of sub-options to limit the acceleration for debugging use. Specify \*qoff\*q or \*qnone\*q to disable all acceleration, or \*qblt\*q to disable render acceleration and only use the BLT engine. .IP Default: use SNA (render acceleration) .TP .BI "Option \*qTearFree\*q \*q" boolean \*q Disable or enable TearFree updates. This option forces X to perform all rendering to a backbuffer prior to updating the actual display. It requires an extra memory allocation the same size as a framebuffer, the occasional extra copy, and requires Damage tracking. Thus enabling TearFree requires more memory and is slower (reduced throughput) and introduces a small amount of output latency, but it should not impact input latency. However, the update to the screen is then performed synchronously with the vertical refresh of the display so that the entire update is completed before the display starts its refresh. That is only one frame is ever visible, preventing an unsightly tear between two visible and differing frames. Note that this replicates what the compositing manager should be doing, however TearFree will redirect the compositor updates (and those of fullscreen games) directly on to the scanout thus incurring no additional overhead in the composited case. Also note that not all compositing managers prevent tearing, and if the outputs are rotated, there will still be tearing without TearFree enabled. .IP Default: TearFree is disabled. .TP .BI "Option \*qReprobeOutputs\*q \*q" boolean \*q Disable or enable rediscovery of connected displays during server startup. As the kernel driver loads it scans for connected displays and configures a console spanning those outputs. When the X server starts, we then take the list of connected displays and framebuffer layout and use that for the initial configuration. Sometimes, not all displays are correctly detected by the kernel and so it is useful in a few circumstances for X to force the kernel to reprobe all displays when it starts. To make the X server recheck the status of connected displays, set the \*qReprobeOutputs\*q option to true. Please do file a bug for any circumstances which require this workaround. .IP Default: reprobing is disabled for a faster startup. .TP .BI "Option \*qVideoKey\*q \*q" integer \*q This is the same as the .B \*qColorKey\*q option described above. It is provided for compatibility with most other drivers. .TP .BI "Option \*qXvPreferOverlay\*q \*q" boolean \*q Make hardware overlay be the first XV adaptor. The overlay behaves incorrectly in the presence of compositing, but some prefer it due to it syncing to vblank in the absence of compositing. While most XV-using applications have options to select which XV adaptor to use, this option can be used to place the overlay first for applications which don't have options for selecting adaptors. .IP Default: Textured video adaptor is preferred. .TP .BI "Option \*qBacklight\*q \*q" string \*q Override the probed backlight control interface. Sometimes the automatically selected backlight interface may not correspond to the correct, or simply most useful, interface available on the system. This allows you to override that choice by specifying the entry under /sys/class/backlight to use. .IP Default: Automatic selection. .TP .BI "Option \*qFallbackDebug\*q \*q" boolean \*q Enable printing of debugging information on acceleration fallbacks to the server log. .IP Default: Disabled .TP .BI "Option \*qDebugFlushBatches\*q \*q" boolean \*q Flush the batch buffer after every single operation. .IP Default: Disabled .TP .BI "Option \*qDebugFlushCaches\*q \*q" boolean \*q Include an MI_FLUSH at the end of every batch buffer to force data to be flushed out of cache and into memory before the completion of the batch. .IP Default: Disabled .TP .BI "Option \*qDebugWait\*q \*q" boolean \*q Wait for the completion of every batch buffer before continuing, i.e. perform synchronous rendering. .IP Default: Disabled .TP .TP .BI "Option \*qVSync\*q \*q" boolean \*q This option controls the use of commands to synchronise rendering with the vertical refresh of the display. Some rendering commands have the option to be performed in a "tear-free" fashion by stalling the GPU to wait for the display to be outside of the region to be updated. This slows down all rendering, and historically has been the source of many GPU hangs. .IP Default: enabled. .TP .BI "Option \*qPageFlip\*q \*q" boolean \*q This option controls the use of commands to flip the scanout address on a VBlank. This is used by glXSwapBuffers to efficiently perform the back-to-front exchange at the end of a frame without incurring the penalty of a copy, or stalling the render pipeline (the flip is performed asynchronrously to the render command stream by the display engine). However, it has historically been the source of many GPU hangs. .IP Default: enabled. .TP .BI "Option \*qSwapbuffersWait\*q \*q" boolean \*q This option controls the behavior of glXSwapBuffers and glXCopySubBufferMESA calls by GL applications. If enabled, the calls will avoid tearing by making sure the display scanline is outside of the area to be copied before the copy occurs. If disabled, no scanline synchronization is performed, meaning tearing will likely occur. .IP Default: enabled. .TP .BI "Option \*qTripleBuffer\*q \*q" boolean \*q This option enables the use of a third buffer for page-flipping. The third buffer allows applications to run at vrefresh rates even if they occasionally fail to swapbuffers on time. The effect of such missed swaps is the output jitters between 60fps and 30fps, and in the worst case appears frame-locked to 30fps. The disadvantage of triple buffering is that there is an extra frame of latency, due to the pre-rendered frame sitting in the swap queue, between input and any display update. .IP Default: enabled. .TP .BI "Option \*qTiling\*q \*q" boolean \*q This option controls whether memory buffers for Pixmaps are allocated in tiled mode. In most cases (especially for complex rendering), tiling dramatically improves performance. .IP Default: enabled. .TP .BI "Option \*qLinearFramebuffer\*q \*q" boolean \*q This option controls whether the memory for the scanout (also known as the front or frame buffer) is allocated in linear memory. A tiled framebuffer is required for power conservation features, but for certain system configurations you may wish to override this and force a linear layout. .IP Default: disabled .TP .BI "Option \*qRelaxedFencing\*q \*q" boolean \*q This option controls whether we attempt to allocate the minimal amount of memory required for the buffers. The reduction in working set has a substantial improvement on system performance. However, this has been demonstrate to be buggy on older hardware (845-865 and 915-945, but ok on PineView and later) so on those chipsets defaults to off. .IP Default: Enabled for G33 (includes PineView), and later, class machines. .TP .BI "Option \*qXvMC\*q \*q" boolean \*q Enable XvMC driver. Current support MPEG2 MC on 915/945 and G33 series. User should provide absolute path to libIntelXvMC.so in XvMCConfig file. .IP Default: Disabled. .TP .BI "Option \*qThrottle\*q \*q" boolean \*q This option controls whether the driver periodically waits for pending drawing operations to complete. Throttling ensures that the GPU does not lag too far behind the CPU and thus noticeable delays in user responsible at the cost of throughput performance. .IP Default: enabled. .TP .BI "Option \*qHotPlug\*q \*q" boolean \*q This option controls whether the driver automatically notifies applications when monitors are connected or disconnected. .IP Default: enabled. .TP .BI "Option \*qVirtualheads\*q \*q" integer \*q This option controls specifies the number of fake outputs to create in addition to the normal outputs detected on your hardware. These outputs cannot be assigned to the regular displays attached to the GPU, but do otherwise act as any other xrandr output and share a portion of the regular framebuffer. One use case for these extra heads is for extending your desktop onto a discrete GPU using the Bumblebee project. However, the recommendation here is to use PRIME instead to create a single Xserver that can addresses and coordinate between multiple GPUs. .IP Default: 0 .TP .BI "Option \*qZaphodHeads\*q \*q" string \*q .IP Specify the randr output(s) to use with zaphod mode for a particular driver instance. If you this option you must use it with all instances of the driver .br For example: .B Option \*qZaphodHeads\*q \*qLVDS1,VGA1\*q will assign xrandr outputs LVDS1 and VGA0 to this instance of the driver. .SH OUTPUT CONFIGURATION On 830M and better chipsets, the driver supports runtime configuration of detected outputs. You can use the .B xrandr tool to control outputs on the command line as follows: .RS .B xrandr \-\-output .I output .B \-\-set .I property value .RE Note that you may need to quote property and value arguments that contain spaces. Each output listed below may have one or more properties associated with it (like a binary EDID block if one is found). Some outputs have unique properties which are described below. See the "MULTIHEAD CONFIGURATIONS" section below for additional information. .SS "VGA" VGA output port (typically exposed via an HD15 connector). .SS "LVDS" Low Voltage Differential Signalling output (typically a laptop LCD panel). Available properties: .TP \fBBACKLIGHT\fB - current backlight level (adjustable) By adjusting the BACKLIGHT property, the brightness on the LVDS output can be adjusted. In some cases, this property may be unavailable (for example if your platform uses an external microcontroller to control the backlight). .TP \fBscaling mode\fP - control LCD panel scaling mode When the currently selected display mode differs from the native panel resolution, various scaling options are available. These include .RS .TP .B Center Simply center the image on-screen without scaling. This is the only scaling mode that guarantees a one-to-one correspondence between native and displayed pixels, but some portions of the panel may be unused (so-called "letterboxing"). .TP .B Full aspect Scale the image as much as possible while preserving aspect ratio. Pixels may not be displayed one-to-one (there may be some blurriness). Some portions of the panel may be unused if the aspect ratio of the selected mode does not match that of the panel. .TP .B Full Scale the image to the panel size without regard to aspect ratio. This is the only mode which guarantees that every pixel of the panel will be used. But the displayed image may be distorted by stretching either horizontally or vertically, and pixels may not be displayed one-to-one (there may be some blurriness). .RE The precise names of these options may differ depending on the kernel video driver, (but the functionality should be similar). See the output of .B xrandr \-\-prop for a list of currently available scaling modes. .SS "TV" Integrated TV output. Available properties include: .TP \fBBOTTOM, RIGHT, TOP, LEFT\fP - margins Adjusting these properties allows you to control the placement of your TV output buffer on the screen. The options with the same name can also be set in xorg.conf with integer value. .TP \fBBRIGHTNESS\fP - TV brightness, range 0-255 Adjust TV brightness, default value is 128. .TP \fBCONTRAST\fP - TV contrast, range 0-255 Adjust TV contrast, default value is 1.0 in chipset specific format. .TP \fBSATURATION\fP - TV saturation, range 0-255 Adjust TV saturation, default value is 1.0 in chipset specific format. .TP \fBHUE\fP - TV hue, range 0-255 Adjust TV hue, default value is 0. .TP \fBTV_FORMAT\fP - output standard This property allows you to control the output standard used on your TV output port. You can select between NTSC-M, NTSC-443, NTSC-J, PAL-M, PAL-N, and PAL. .TP \fBTV_Connector\fP - connector type This config option should be added to xorg.conf TV monitor's section, it allows you to force the TV output connector type, which bypass load detect and TV will always be taken as connected. You can select between S-Video, Composite and Component. .SS "TMDS-1" First DVI SDVO output .SS "TMDS-2" Second DVI SDVO output .SS "TMDS-1", "TMDS-2", "HDMI-1", "HDMI-2" DVI/HDMI outputs. Avaliable common properties include: .TP \fBBROADCAST_RGB\fP - method used to set RGB color range Adjusting this property allows you to set RGB color range on each channel in order to match HDTV requirment(default 0 for full range). Setting 1 means RGB color range is 16-235, 0 means RGB color range is 0-255 on each channel. (Full range is 0-255, not 16-235) .PP SDVO and DVO TV outputs are not supported by the driver at this time. .PP See __xconfigfile__(__filemansuffix__) for information on associating Monitor sections with these outputs for configuration. Associating Monitor sections with each output can be helpful if you need to ignore a specific output, for example, or statically configure an extended desktop monitor layout. .SH MULTIHEAD CONFIGURATIONS The number of independent outputs is dictated by the number of CRTCs (in X parlance) a given chip supports. Most recent Intel chips have two CRTCs, meaning that two separate framebuffers can be displayed simultaneously, in an extended desktop configuration. If a chip supports more outputs than it has CRTCs (say local flat panel, VGA and TV in the case of many outputs), two of the outputs will have to be "cloned", meaning that they display the same framebuffer contents (or one displays a subset of another's framebuffer if the modes aren't equal). You can use the "xrandr" tool, or various desktop utilities, to change your output configuration at runtime. To statically configure your outputs, you can use the "Monitor-" options along with additional monitor sections in your xorg.conf to create your screen topology. The example below puts the VGA output to the right of the builtin laptop screen, both running at 1024x768. .nf .B "Section \*qMonitor\*q" .BI " Identifier \*qLaptop FooBar Internal Display\*q" .BI " Option \*qPosition\*q \*q0 0\*q" .B "EndSection" .B "Section \*qMonitor\*q" .BI " Identifier \*qSome Random CRT\*q" .BI " Option \*qPosition\*q \*q1024 0\*q" .BI " Option \*qRightOf\*q \*qLaptop FoodBar Internal Display\*q" .B "EndSection" .B "Section \*qDevice\*q" .BI " Driver \*qintel\*q" .BI " Option \*qmonitor-LVDS\*q \*qLaptop FooBar Internal Display\*q" .BI " Option \*qmonitor-VGA\*q \*qSome Random CRT\*q" .B "EndSection" .SH TEXTURED VIDEO ATTRIBUTES The driver supports the following X11 Xv attributes for Textured Video. You can use the "xvattr" tool to query/set those attributes at runtime. .SS "XV_SYNC_TO_VBLANK" XV_SYNC_TO_VBLANK is used to control whether textured adapter synchronizes the screen update to the vblank to eliminate tearing. It is a Boolean attribute with values of 0 (never sync) or 1 (always sync). An historic value of -1 (sync for large windows only) will now be interpreted as 1, (since the current approach for sync is not costly even with small video windows). .SS "XV_BRIGHTNESS" .SS "XV_CONTRAST" .SH REPORTING BUGS The xf86-video-intel driver is part of the X.Org and Freedesktop.org umbrella projects. Details on bug reporting can be found at https://01.org/linuxgraphics/documentation/how-report-bugs. Mailing lists are also commonly used to report experiences and ask questions about configuration and other topics. See lists.freedesktop.org for more information (the xorg@lists.freedesktop.org mailing list is the most appropriate place to ask X.Org and driver related questions). .SH "SEE ALSO" __xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__) .SH AUTHORS Authors include: Keith Whitwell, and also Jonathan Bian, Matthew J Sottek, Jeff Hartmann, Mark Vojkovich, Alan Hourihane, H. J. Lu. 830M and 845G support reworked for XFree86 4.3 by David Dawes and Keith Whitwell. 852GM, 855GM, and 865G support added by David Dawes and Keith Whitwell. 915G, 915GM, 945G, 945GM, 965G, 965Q and 946GZ support added by Alan Hourihane and Keith Whitwell. Lid status support added by Alan Hourihane. Textured video support for 915G and later chips, RandR 1.2 and hardware modesetting added by Eric Anholt and Keith Packard. EXA and Render acceleration added by Wang Zhenyu. TV out support added by Zou Nan Hai and Keith Packard. 965GM, G33, Q33, and Q35 support added by Wang Zhenyu. xf86-video-intel-2.99.917/man/Makefile.in0000664000175000017500000004204012445556117014561 00000000000000# Makefile.in generated by automake 1.14.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # # Copyright 2005 Sun Microsystems, Inc. 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furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL # ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER # IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. ACLOCAL_AMFLAGS = ${ACLOCAL_FLAGS} -I m4 SUBDIRS = man libobj xvmc src tools MAINTAINERCLEANFILES = ChangeLog INSTALL if HAVE_X11 SUBDIRS += test endif .PHONY: ChangeLog INSTALL INSTALL: $(INSTALL_CMD) ChangeLog: $(CHANGELOG_CMD) dist-hook: ChangeLog INSTALL xf86-video-intel-2.99.917/src/0000775000175000017500000000000012445556132012605 500000000000000xf86-video-intel-2.99.917/src/intel_driver.h0000664000175000017500000001133112432737457015372 00000000000000#ifndef INTEL_DRIVER_H #define INTEL_DRIVER_H struct xf86_platform_device; #define INTEL_VERSION 4000 #define INTEL_NAME "intel" #define INTEL_DRIVER_NAME "intel" #define INTEL_VERSION_MAJOR PACKAGE_VERSION_MAJOR #define INTEL_VERSION_MINOR PACKAGE_VERSION_MINOR #define INTEL_VERSION_PATCH PACKAGE_VERSION_PATCHLEVEL #define PCI_CHIP_I810 0x7121 #define PCI_CHIP_I810_DC100 0x7123 #define PCI_CHIP_I810_E 0x7125 #define PCI_CHIP_I815 0x1132 #define PCI_CHIP_I830_M 0x3577 #define PCI_CHIP_845_G 0x2562 #define PCI_CHIP_I854 0x358E #define PCI_CHIP_I855_GM 0x3582 #define PCI_CHIP_I865_G 0x2572 #define PCI_CHIP_I915_G 0x2582 #define PCI_CHIP_I915_GM 0x2592 #define PCI_CHIP_E7221_G 0x258A #define PCI_CHIP_I945_G 0x2772 #define PCI_CHIP_I945_GM 0x27A2 #define PCI_CHIP_I945_GME 0x27AE #define PCI_CHIP_PINEVIEW_M 0xA011 #define PCI_CHIP_PINEVIEW_G 0xA001 #define PCI_CHIP_Q35_G 0x29B2 #define PCI_CHIP_G33_G 0x29C2 #define PCI_CHIP_Q33_G 0x29D2 #define PCI_CHIP_G35_G 0x2982 #define PCI_CHIP_I965_Q 0x2992 #define PCI_CHIP_I965_G 0x29A2 #define PCI_CHIP_I946_GZ 0x2972 #define PCI_CHIP_I965_GM 0x2A02 #define PCI_CHIP_I965_GME 0x2A12 #define PCI_CHIP_GM45_GM 0x2A42 #define PCI_CHIP_G45_E_G 0x2E02 #define PCI_CHIP_G45_G 0x2E22 #define PCI_CHIP_Q45_G 0x2E12 #define PCI_CHIP_G41_G 0x2E32 #define PCI_CHIP_B43_G 0x2E42 #define PCI_CHIP_B43_G1 0x2E92 #define PCI_CHIP_IRONLAKE_D_G 0x0042 #define PCI_CHIP_IRONLAKE_M_G 0x0046 #define PCI_CHIP_SANDYBRIDGE_GT1 0x0102 #define PCI_CHIP_SANDYBRIDGE_GT2 0x0112 #define PCI_CHIP_SANDYBRIDGE_GT2_PLUS 0x0122 #define PCI_CHIP_SANDYBRIDGE_M_GT1 0x0106 #define PCI_CHIP_SANDYBRIDGE_M_GT2 0x0116 #define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126 #define PCI_CHIP_SANDYBRIDGE_S_GT 0x010A #define PCI_CHIP_IVYBRIDGE_M_GT1 0x0156 #define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166 #define PCI_CHIP_IVYBRIDGE_D_GT1 0x0152 #define PCI_CHIP_IVYBRIDGE_D_GT2 0x0162 #define PCI_CHIP_IVYBRIDGE_S_GT1 0x015a #define PCI_CHIP_IVYBRIDGE_S_GT2 0x016a #define PCI_CHIP_HASWELL_D_GT1 0x0402 #define PCI_CHIP_HASWELL_D_GT2 0x0412 #define PCI_CHIP_HASWELL_D_GT3 0x0422 #define PCI_CHIP_HASWELL_M_GT1 0x0406 #define PCI_CHIP_HASWELL_M_GT2 0x0416 #define PCI_CHIP_HASWELL_M_GT3 0x0426 #define PCI_CHIP_HASWELL_S_GT1 0x040A #define PCI_CHIP_HASWELL_S_GT2 0x041A #define PCI_CHIP_HASWELL_S_GT3 0x042A #define PCI_CHIP_HASWELL_B_GT1 0x040B #define PCI_CHIP_HASWELL_B_GT2 0x041B #define PCI_CHIP_HASWELL_B_GT3 0x042B #define PCI_CHIP_HASWELL_E_GT1 0x040E #define PCI_CHIP_HASWELL_E_GT2 0x041E #define PCI_CHIP_HASWELL_E_GT3 0x042E #define PCI_CHIP_HASWELL_ULT_D_GT1 0x0A02 #define PCI_CHIP_HASWELL_ULT_D_GT2 0x0A12 #define PCI_CHIP_HASWELL_ULT_D_GT3 0x0A22 #define PCI_CHIP_HASWELL_ULT_M_GT1 0x0A06 #define PCI_CHIP_HASWELL_ULT_M_GT2 0x0A16 #define PCI_CHIP_HASWELL_ULT_M_GT3 0x0A26 #define PCI_CHIP_HASWELL_ULT_S_GT1 0x0A0A #define PCI_CHIP_HASWELL_ULT_S_GT2 0x0A1A #define PCI_CHIP_HASWELL_ULT_S_GT3 0x0A2A #define PCI_CHIP_HASWELL_ULT_B_GT1 0x0A0B #define PCI_CHIP_HASWELL_ULT_B_GT2 0x0A1B #define PCI_CHIP_HASWELL_ULT_B_GT3 0x0A2B #define PCI_CHIP_HASWELL_ULT_E_GT1 0x0A0E #define PCI_CHIP_HASWELL_ULT_E_GT2 0x0A1E #define PCI_CHIP_HASWELL_ULT_E_GT3 0x0A2E #define PCI_CHIP_HASWELL_CRW_D_GT1 0x0D02 #define PCI_CHIP_HASWELL_CRW_D_GT2 0x0D12 #define PCI_CHIP_HASWELL_CRW_D_GT3 0x0D22 #define PCI_CHIP_HASWELL_CRW_M_GT1 0x0D06 #define PCI_CHIP_HASWELL_CRW_M_GT2 0x0D16 #define PCI_CHIP_HASWELL_CRW_M_GT3 0x0D26 #define PCI_CHIP_HASWELL_CRW_S_GT1 0x0D0A #define PCI_CHIP_HASWELL_CRW_S_GT2 0x0D1A #define PCI_CHIP_HASWELL_CRW_S_GT3 0x0D2A #define PCI_CHIP_HASWELL_CRW_B_GT1 0x0D0B #define PCI_CHIP_HASWELL_CRW_B_GT2 0x0D1B #define PCI_CHIP_HASWELL_CRW_B_GT3 0x0D2B #define PCI_CHIP_HASWELL_CRW_E_GT1 0x0D0E #define PCI_CHIP_HASWELL_CRW_E_GT2 0x0D1E #define PCI_CHIP_HASWELL_CRW_E_GT3 0x0D2E struct intel_device_info { int gen; }; struct intel_device; int intel_entity_get_devid(int index); int intel_open_device(int entity_num, const struct pci_device *pci, struct xf86_platform_device *dev); int __intel_peek_fd(ScrnInfoPtr scrn); struct intel_device *intel_get_device(ScrnInfoPtr scrn, int *fd); int intel_has_render_node(struct intel_device *dev); const char *intel_get_client_name(struct intel_device *dev); int intel_get_client_fd(struct intel_device *dev); int intel_get_device_id(struct intel_device *dev); int intel_get_master(struct intel_device *dev); int intel_put_master(struct intel_device *dev); void intel_put_device(struct intel_device *dev); void intel_detect_chipset(ScrnInfoPtr scrn, struct intel_device *dev); #define IS_DEFAULT_ACCEL_METHOD(x) ({ \ enum { NOACCEL, SNA, UXA } default_accel_method__ = DEFAULT_ACCEL_METHOD; \ default_accel_method__ == x; \ }) #define hosted() (0) #endif /* INTEL_DRIVER_H */ xf86-video-intel-2.99.917/src/intel_options.h0000664000175000017500000000222112400044327015546 00000000000000#ifndef INTEL_OPTIONS_H #define INTEL_OPTIONS_H #include #include #include /* * Note: "ColorKey" is provided for compatibility with the i810 driver. * However, the correct option name is "VideoKey". "ColorKey" usually * refers to the tranparency key for 8+24 overlays, not for video overlays. */ enum intel_options { OPTION_ACCEL_DISABLE, OPTION_ACCEL_METHOD, OPTION_BACKLIGHT, OPTION_DRI, OPTION_PRESENT, OPTION_VIDEO_KEY, OPTION_COLOR_KEY, OPTION_TILING_2D, OPTION_TILING_FB, OPTION_VSYNC, OPTION_PAGEFLIP, OPTION_SWAPBUFFERS_WAIT, OPTION_TRIPLE_BUFFER, OPTION_PREFER_OVERLAY, OPTION_HOTPLUG, OPTION_REPROBE, OPTION_DELETE_DP12, #if defined(XvMCExtension) && defined(ENABLE_XVMC) OPTION_XVMC, #define INTEL_XVMC 1 #endif #ifdef USE_SNA OPTION_ZAPHOD, OPTION_VIRTUAL, OPTION_TEAR_FREE, OPTION_CRTC_PIXMAPS, #endif #ifdef USE_UXA OPTION_FALLBACKDEBUG, OPTION_DEBUG_FLUSH_BATCHES, OPTION_DEBUG_FLUSH_CACHES, OPTION_DEBUG_WAIT, OPTION_BUFFER_CACHE, #endif NUM_OPTIONS, }; extern const OptionInfoRec intel_options[]; OptionInfoPtr intel_options_get(ScrnInfoPtr scrn); #endif /* INTEL_OPTIONS_H */ xf86-video-intel-2.99.917/src/Makefile.am0000664000175000017500000000435512400044327014555 00000000000000# Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL # ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER # IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. SUBDIRS = render_program legacy # this is obnoxious: # -module lets us name the module exactly how we want # -avoid-version prevents gratuitous .0.0.0 version numbers on the end # _ladir passes a dummy rpath to libtool so the thing will actually link # TODO: -nostdlib/-Bstatic/-lgcc platform magic, not installing the .a, etc. AM_CFLAGS = \ @CWARNFLAGS@ \ $(XORG_CFLAGS) \ $(DRM_CFLAGS) \ $(PCIACCESS_CFLAGS) \ @NOWARNFLAGS@ \ $(NULL) if VALGRIND AM_CFLAGS += $(VALGRIND_CFLAGS) endif intel_drv_la_LTLIBRARIES = intel_drv.la intel_drv_la_LDFLAGS = -module -avoid-version intel_drv_ladir = $(moduledir)/drivers intel_drv_la_LIBADD = legacy/liblegacy.la $(PCIACCESS_LIBS) $(XORG_LIBS) if SNA SUBDIRS += sna intel_drv_la_LIBADD += sna/libsna.la endif if UXA SUBDIRS += uxa intel_drv_la_LIBADD += uxa/libuxa.la endif NULL:=# intel_drv_la_SOURCES = \ backlight.c \ backlight.h \ fd.h \ fd.c \ i915_pciids.h \ intel_list.h \ intel_options.h \ intel_device.c \ intel_driver.h \ intel_options.c \ intel_module.c \ compat-api.h \ $(NULL) EXTRA_DIST = \ scripts/clock.5c \ scripts/clock-graph.5c \ scripts/fix.5c \ scripts/tv.5c \ $(NULL) xf86-video-intel-2.99.917/src/intel_options.c0000664000175000017500000000412312400044327015544 00000000000000#ifdef HAVE_CONFIG_H #include "config.h" #endif #include "intel_options.h" const OptionInfoRec intel_options[] = { {OPTION_ACCEL_DISABLE, "NoAccel", OPTV_BOOLEAN, {0}, 0}, {OPTION_ACCEL_METHOD, "AccelMethod", OPTV_STRING, {0}, 0}, {OPTION_BACKLIGHT, "Backlight", OPTV_STRING, {0}, 0}, {OPTION_DRI, "DRI", OPTV_STRING, {0}, 0}, {OPTION_PRESENT, "Present", OPTV_BOOLEAN, {0}, 1}, {OPTION_COLOR_KEY, "ColorKey", OPTV_INTEGER, {0}, 0}, {OPTION_VIDEO_KEY, "VideoKey", OPTV_INTEGER, {0}, 0}, {OPTION_TILING_2D, "Tiling", OPTV_BOOLEAN, {0}, 1}, {OPTION_TILING_FB, "LinearFramebuffer", OPTV_BOOLEAN, {0}, 0}, {OPTION_VSYNC, "VSync", OPTV_BOOLEAN, {0}, 1}, {OPTION_PAGEFLIP, "PageFlip", OPTV_BOOLEAN, {0}, 1}, {OPTION_SWAPBUFFERS_WAIT, "SwapbuffersWait", OPTV_BOOLEAN, {0}, 1}, {OPTION_TRIPLE_BUFFER, "TripleBuffer", OPTV_BOOLEAN, {0}, 1}, {OPTION_PREFER_OVERLAY, "XvPreferOverlay", OPTV_BOOLEAN, {0}, 0}, {OPTION_HOTPLUG, "HotPlug", OPTV_BOOLEAN, {0}, 1}, {OPTION_REPROBE, "ReprobeOutputs", OPTV_BOOLEAN, {0}, 0}, {OPTION_DELETE_DP12, "DeleteUnusedDP12Displays", OPTV_BOOLEAN, {0}, 0}, #ifdef INTEL_XVMC {OPTION_XVMC, "XvMC", OPTV_BOOLEAN, {0}, 1}, #endif #ifdef USE_SNA {OPTION_ZAPHOD, "ZaphodHeads", OPTV_STRING, {0}, 0}, {OPTION_VIRTUAL, "VirtualHeads", OPTV_INTEGER, {0}, 0}, {OPTION_TEAR_FREE, "TearFree", OPTV_BOOLEAN, {0}, 0}, {OPTION_CRTC_PIXMAPS, "PerCrtcPixmaps", OPTV_BOOLEAN, {0}, 0}, #endif #ifdef USE_UXA {OPTION_FALLBACKDEBUG, "FallbackDebug",OPTV_BOOLEAN, {0}, 0}, {OPTION_DEBUG_FLUSH_BATCHES, "DebugFlushBatches", OPTV_BOOLEAN, {0}, 0}, {OPTION_DEBUG_FLUSH_CACHES, "DebugFlushCaches", OPTV_BOOLEAN, {0}, 0}, {OPTION_DEBUG_WAIT, "DebugWait", OPTV_BOOLEAN, {0}, 0}, {OPTION_BUFFER_CACHE, "BufferCache", OPTV_BOOLEAN, {0}, 1}, #endif {-1, NULL, OPTV_NONE, {0}, 0} }; OptionInfoPtr intel_options_get(ScrnInfoPtr scrn) { OptionInfoPtr options; xf86CollectOptions(scrn, NULL); if (!(options = malloc(sizeof(intel_options)))) return NULL; memcpy(options, intel_options, sizeof(intel_options)); xf86ProcessOptions(scrn->scrnIndex, scrn->options, options); return options; } xf86-video-intel-2.99.917/src/render_program/0000775000175000017500000000000012445556131015612 500000000000000xf86-video-intel-2.99.917/src/render_program/exa_sf_mask.g4b0000664000175000017500000000147112202250410020371 00000000000000 { 0x00400031, 0x20c01fbd, 0x0069002c, 0x01110001 }, { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, { 0x00600040, 0x20e077bd, 0x008d0080, 0x008d40a0 }, { 0x00600041, 0x202077be, 0x008d00e0, 0x000000c0 }, { 0x00600040, 0x20e077bd, 0x008d00a0, 0x008d4060 }, { 0x00600041, 0x204077be, 0x008d00e0, 0x000000c8 }, { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_projective.g6a0000664000175000017500000000443612244635610022662 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* * Fragment to compute src u/v values */ include(`exa_wm.g4i') define(`u', `mask_u') define(`ul', `mask_u') define(`uh', `m9') define(`v', `mask_v') define(`vl', `mask_v') define(`vh', `m11') define(`w', `mask_w') define(`wl', `mask_w_0') define(`wh', `mask_w_1') define(`bl', `g2.0<8,8,1>F') define(`bh', `g4.0<8,8,1>F') define(`a0_a_x',`g8.0<0,1,0>F') define(`a0_a_y',`g8.16<0,1,0>F') define(`a0_a_z',`g9.0<0,1,0>F') /* W */ pln (8) temp_x_0<1>F a0_a_z bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_z bh { align1 }; /* pixel 8-15 */ math (8) wl<1>F temp_x_0<8,8,1>F null inv { align1 }; math (8) wh<1>F temp_x_1<8,8,1>F null inv { align1 }; /* U */ pln (8) temp_x_0<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ mul (8) ul<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; mul (8) uh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; /* V */ pln (8) temp_x_0<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ mul (8) vl<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; mul (8) vh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_yuv_rgb.g8b0000664000175000017500000000202512432737457021160 00000000000000 { 0x00800040, 0x23003ae8, 0x3e8d0200, 0xbd808081 }, { 0x00800041, 0x23003ae8, 0x3e8d0300, 0x3f94fdf4 }, { 0x00800040, 0x22c03ae8, 0x3e8d01c0, 0xbf008084 }, { 0x00800040, 0x23403ae8, 0x3e8d0240, 0xbf008084 }, { 0x00600001, 0x24003ae0, 0x008d0300, 0x00000000 }, { 0x80600048, 0x21c03ae8, 0x3e8d02c0, 0x3fcc49ba }, { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, { 0x80600048, 0x21e03ae8, 0x3e8d02e0, 0x3fcc49ba }, { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, { 0x00600048, 0x24003ae0, 0x3e8d02c0, 0xbf5020c5 }, { 0x80600048, 0x22003ae8, 0x3e8d0340, 0xbec8b439 }, { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, { 0x00600048, 0x24003ae0, 0x3e8d02e0, 0xbf5020c5 }, { 0x80800048, 0x22203ae8, 0x3e8d0360, 0xbec8b439 }, { 0x00600001, 0x24003ae0, 0x008d0300, 0x00000000 }, { 0x80600048, 0x22403ae8, 0x3e8d0340, 0x40011687 }, { 0x00600001, 0x24003ae0, 0x008d0320, 0x00000000 }, { 0x80600048, 0x22603ae8, 0x3e8d0360, 0x40011687 }, { 0x00800001, 0x22803ee8, 0x38000000, 0x3f800000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_affine.g4a0000664000175000017500000000276312202250410021720 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ include(`exa_wm.g4i') define(`du_dx', `mask_du_dx') define(`du_dy', `mask_du_dy') define(`uo', `mask_uo') define(`dv_dx', `mask_dv_dx') define(`dv_dy', `mask_dv_dy') define(`vo', `mask_vo') define(`u', `mask_u') define(`v', `mask_v') include(`exa_wm_affine.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g8a0000664000175000017500000000265612244635610022624 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface */ include(`exa_wm.g4i') undefine(`src_msg') undefine(`src_msg_ind') define(`src_msg', `g65') define(`src_msg_ind', `65') include(`exa_wm_src_sample_argb.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_ca.g5b0000664000175000017500000000033412244635610020051 00000000000000 { 0x00802041, 0x21c077bd, 0x008d01c0, 0x008d02c0 }, { 0x00802041, 0x220077bd, 0x008d0200, 0x008d0300 }, { 0x00802041, 0x224077bd, 0x008d0240, 0x008d0340 }, { 0x00802041, 0x228077bd, 0x008d0280, 0x008d0380 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_a.g7a0000664000175000017500000000377512244635610022133 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load alpha */ mov (1) g0.8<1>UD 0x00007000UD { align1 mask_disable }; mov (8) g65<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* g65 will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) 65 /* msg reg index */ src_sample_a_01<1>UW /* readback */ null sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_projective.g7b0000664000175000017500000000122412244635610022654 00000000000000 { 0x0060005a, 0x23c077bd, 0x00000120, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x00000120, 0x008d0080 }, { 0x01600038, 0x218003bd, 0x008d03c0, 0x00000000 }, { 0x01600038, 0x21a003bd, 0x008d03e0, 0x00000000 }, { 0x0060005a, 0x23c077bd, 0x00000100, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x00000100, 0x008d0080 }, { 0x00600041, 0x290077bd, 0x008d03c0, 0x008d0180 }, { 0x00600041, 0x292077bd, 0x008d03e0, 0x008d01a0 }, { 0x0060005a, 0x23c077bd, 0x00000110, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x00000110, 0x008d0080 }, { 0x00600041, 0x294077bd, 0x008d03c0, 0x008d0180 }, { 0x00600041, 0x296077bd, 0x008d03e0, 0x008d01a0 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_affine.g5a0000664000175000017500000000261212244635610021731 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ include(`exa_wm.g4i') line (16) null mask_du_dx dst_x<8,8,1>F { compr align1 }; mac (16) mask_u mask_du_dy dst_y<8,8,1>F { compr align1 }; line (16) null mask_dv_dx dst_x<8,8,1>F { compr align1 }; mac (16) mask_v mask_dv_dy dst_y<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_src_projective.g5b0000664000175000017500000000156012244635610022511 00000000000000 { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000080 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000084 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x0000008c }, { 0x00600031, 0x21801fbd, 0x108d03c0, 0x02100001 }, { 0x00600031, 0x21a01fbd, 0x108d03e0, 0x02100001 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x0000006c }, { 0x00802041, 0x204077be, 0x008d03c0, 0x008d0180 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x0000007c }, { 0x00802041, 0x208077be, 0x008d03c0, 0x008d0180 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g4a0000664000175000017500000000250312244635610022607 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface */ include(`exa_wm.g4i') include(`exa_wm_src_sample_argb.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_planar.g5b0000664000175000017500000000042312244635610023152 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x01800031, 0x22001c09, 0x20000000, 0x0a2a0001 }, { 0x01800031, 0x21c01c09, 0x20000000, 0x0a2a0003 }, { 0x01800031, 0x22401c09, 0x20000000, 0x0a2a0005 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_a.g5a0000664000175000017500000000403112244635610022257 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the mask surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load only alpha */ mov (1) g0.8<1>UD 0x00007000UD { align1 mask_disable }; mov (8) mask_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* mask_msg will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) mask_msg_ind /* msg reg index */ mask_sample_a_01<1>UW /* readback */ null sampler (2,1,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g6a0000664000175000017500000000250312244635610022611 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface */ include(`exa_wm.g4i') include(`exa_wm_src_sample_argb.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g6a0000664000175000017500000000310712244635610020621 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ include(`exa_wm.g4i') /* * Prepare data in m2-m3 for Red channel, m4-m5 for Green channel, * m6-m7 for Blue and m8-m9 for Alpha channel */ define(`slot_r_00', `m2') define(`slot_r_01', `m3') define(`slot_g_00', `m4') define(`slot_g_01', `m5') define(`slot_b_00', `m6') define(`slot_b_01', `m7') define(`slot_a_00', `m8') define(`slot_a_01', `m9') define(`data_port_msg_2_ind', `2') include(`exa_wm_write.g6i') xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_a.g5b0000664000175000017500000000024512244635610022117 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x01800031, 0x22801c09, 0x20000000, 0x0a2a0001 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_yuv_rgb.g4b.gen50000664000175000017500000000122412202250410021757 00000000000000 { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_xy.g5b0000664000175000017500000000033412244635610020126 00000000000000 { 0x00800040, 0x23c06d29, 0x00480028, 0x10101010 }, { 0x00800040, 0x23806d29, 0x0048002a, 0x11001100 }, { 0x00802040, 0x2100753d, 0x008d03c0, 0x00004020 }, { 0x00802040, 0x2140753d, 0x008d0380, 0x00004024 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_affine.g8b0000664000175000017500000000033412400044327021561 00000000000000 { 0x0060005a, 0x28403ae8, 0x3a0000c0, 0x008d0040 }, { 0x0060005a, 0x28603ae8, 0x3a0000c0, 0x008d0080 }, { 0x0060005a, 0x28803ae8, 0x3a0000d0, 0x008d0040 }, { 0x0060005a, 0x28a03ae8, 0x3a0000d0, 0x008d0080 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_a.g5a0000664000175000017500000000401612244635610022116 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load alpha */ mov (1) g0.8<1>UD 0x00007000UD { align1 mask_disable }; mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* src_msg will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) src_msg_ind /* msg reg index */ src_sample_a_01<1>UW /* readback */ null sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_projective.g4b.gen50000664000175000017500000000156012202250410023472 00000000000000 { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000c0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000c4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x000000cc }, { 0x00600031, 0x21801fbd, 0x108d03c0, 0x02100001 }, { 0x00600031, 0x21a01fbd, 0x108d03e0, 0x02100001 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000a0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000a4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x000000ac }, { 0x00802041, 0x210077be, 0x008d03c0, 0x008d0180 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000b0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000b4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x000000bc }, { 0x00802041, 0x214077be, 0x008d03c0, 0x008d0180 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_argb.g7a0000664000175000017500000000377712244635610022774 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the mask surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load argb */ mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; mov (8) g71<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* g71 will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) 71 /* msg reg index */ mask_sample_base<1>UW /* readback */ null sampler (2,1,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_src_affine.g6b0000664000175000017500000000033412244635610021566 00000000000000 { 0x0060005a, 0x204077be, 0x000000c0, 0x008d0040 }, { 0x0060005a, 0x206077be, 0x000000c0, 0x008d0080 }, { 0x0060005a, 0x208077be, 0x000000d0, 0x008d0040 }, { 0x0060005a, 0x20a077be, 0x000000d0, 0x008d0080 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_yuv_rgb.g6a0000664000175000017500000000631612202250410021132 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Keith Packard * Eric Anholt * */ include(`exa_wm.g4i') define(`YCbCr_base', `src_sample_base') define(`Cr', `src_sample_r') define(`Cr_01', `src_sample_r_01') define(`Cr_23', `src_sample_r_23') define(`Y', `src_sample_g') define(`Y_01', `src_sample_g_01') define(`Y_23', `src_sample_g_23') define(`Cb', `src_sample_b') define(`Cb_01', `src_sample_b_01') define(`Cb_23', `src_sample_b_23') define(`Crn', `mask_sample_r') define(`Crn_01', `mask_sample_r_01') define(`Crn_23', `mask_sample_r_23') define(`Yn', `mask_sample_g') define(`Yn_01', `mask_sample_g_01') define(`Yn_23', `mask_sample_g_23') define(`Cbn', `mask_sample_b') define(`Cbn_01', `mask_sample_b_01') define(`Cbn_23', `mask_sample_b_23') /* color space conversion function: * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) */ /* Normalize Y, Cb and Cr: * * Yn = (Y - 16/255) * 1.164 * Crn = Cr - 128 / 255 * Cbn = Cb - 128 / 255 */ add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; /* * R = Y + Cr * 1.596 */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; /* * G = Crn * -0.813 + Cbn * -0.392 + Y */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; /* * B = Cbn * 2.017 + Y */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; /* * A = 1.0 */ mov (16) src_sample_a<1>F 1.0F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g7b0000664000175000017500000000024512244635610022614 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0000, 0x00000000 }, { 0x02800031, 0x21c01ca9, 0x00000820, 0x0a8c0001 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_affine.g6a0000664000175000017500000000271312244635610021570 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* * Fragment to compute src u/v values */ include(`exa_wm.g4i') define(`ul', `src_u') define(`uh', `m3') define(`vl', `src_v') define(`vh', `m5') define(`bl', `g2.0<8,8,1>F') define(`bh', `g4.0<8,8,1>F') define(`a0_a_x',`g6.0<0,1,0>F') define(`a0_a_y',`g6.16<0,1,0>F') include(`exa_wm_affine.g6i') xf86-video-intel-2.99.917/src/render_program/exa_sf_mask.g5b0000664000175000017500000000060112244635610020403 00000000000000 { 0x00400031, 0x20c01fbd, 0x1069002c, 0x02100001 }, { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, { 0x00600040, 0x20e077bd, 0x008d0080, 0x008d40a0 }, { 0x00600041, 0x202077be, 0x008d00e0, 0x000000c0 }, { 0x00600040, 0x20e077bd, 0x008d00a0, 0x008d4060 }, { 0x00600041, 0x204077be, 0x008d00e0, 0x000000c8 }, { 0x00600031, 0x20001fbc, 0x648d0000, 0x8808c800 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_planar.g5a0000664000175000017500000000252212244635610023153 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface in planar format */ include(`exa_wm.g4i') include(`exa_wm_sample_planar.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_ca_srcalpha.g5a0000664000175000017500000000331312244635610021725 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Composite src and mask together, no component alpha */ include(`exa_wm.g4i') mul (16) src_sample_r_01<1>F mask_sample_r_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_g_01<1>F mask_sample_g_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_b_01<1>F mask_sample_b_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_a_01<1>F mask_sample_a_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_ca.g4b.gen50000664000175000017500000000033412202250410020666 00000000000000 { 0x00802041, 0x21c077bd, 0x008d01c0, 0x008d02c0 }, { 0x00802041, 0x220077bd, 0x008d0200, 0x008d0300 }, { 0x00802041, 0x224077bd, 0x008d0240, 0x008d0340 }, { 0x00802041, 0x228077bd, 0x008d0280, 0x008d0380 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g8b0000664000175000017500000000164712400044327020624 00000000000000 { 0x00600001, 0x28403ae8, 0x008d01c0, 0x00000000 }, { 0x00600001, 0x28603ae8, 0x008d01e0, 0x00000000 }, { 0x00600001, 0x28803ae8, 0x008d0200, 0x00000000 }, { 0x00600001, 0x28a03ae8, 0x008d0220, 0x00000000 }, { 0x00600001, 0x28c03ae8, 0x008d0240, 0x00000000 }, { 0x00600001, 0x28e03ae8, 0x008d0260, 0x00000000 }, { 0x00600001, 0x29003ae8, 0x008d0280, 0x00000000 }, { 0x00600001, 0x29203ae8, 0x008d02a0, 0x00000000 }, { 0x05800031, 0x24000a40, 0x0e000840, 0x90031000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, xf86-video-intel-2.99.917/src/render_program/exa_sf.g4b0000664000175000017500000000147112202250410017356 00000000000000 { 0x00400031, 0x20c01fbd, 0x0069002c, 0x01110001 }, { 0x00400001, 0x206003be, 0x00690060, 0x00000000 }, { 0x00400040, 0x20e077bd, 0x00690080, 0x006940a0 }, { 0x00400041, 0x202077be, 0x006900e0, 0x000000c0 }, { 0x00400040, 0x20e077bd, 0x006900a0, 0x00694060 }, { 0x00400041, 0x204077be, 0x006900e0, 0x000000c8 }, { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_affine.g6b0000664000175000017500000000033412244635610021732 00000000000000 { 0x0060005a, 0x210077be, 0x00000100, 0x008d0040 }, { 0x0060005a, 0x212077be, 0x00000100, 0x008d0080 }, { 0x0060005a, 0x214077be, 0x00000110, 0x008d0040 }, { 0x0060005a, 0x216077be, 0x00000110, 0x008d0080 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_xy.g5a0000664000175000017500000000353712244635610020135 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Register assignments: * * x g6/g7 * y g8/g9 * * temp x g10/g11 * temp y g12/g13 * * src w g14/g15 * src u m1/m2 * src v m3/m4 */ /* Fragment to compute per-pixel XY values */ include(`exa_wm.g4i') /* Load X and Y coordinates and compute per-pixel coordinates */ add (16) temp_x_uw<1>UW dst_x_uw 0x10101010V { align1 }; add (16) temp_y_uw<1>UW dst_y_uw 0x11001100V { align1 }; /* subtract screen-space origin of vertex 0 */ add (16) dst_x<1>F temp_x_uw<8,8,1>UW -screen_x0 { compr align1 }; add (16) dst_y<1>F temp_y_uw<8,8,1>UW -screen_y0 { compr align1 }; xf86-video-intel-2.99.917/src/render_program/Makefile.am0000664000175000017500000001310612432737457017577 00000000000000INTEL_G4A = \ exa_sf.g4a \ exa_sf_mask.g4a \ exa_wm_src_affine.g4a \ exa_wm_src_projective.g4a \ exa_wm_src_sample_argb.g4a \ exa_wm_src_sample_a.g4a \ exa_wm_src_sample_planar.g4a \ exa_wm_mask_affine.g4a \ exa_wm_mask_projective.g4a \ exa_wm_mask_sample_argb.g4a \ exa_wm_mask_sample_a.g4a \ exa_wm_noca.g4a \ exa_wm_ca.g4a \ exa_wm_ca_srcalpha.g4a \ exa_wm_write.g4a \ exa_wm_yuv_rgb.g4a \ exa_wm_xy.g4a \ $(NULL) INTEL_G4I = \ exa_wm.g4i \ exa_wm_affine.g4i \ exa_wm_projective.g4i \ exa_wm_sample_planar.g4i \ exa_wm_src_sample_argb.g4i \ $(NULL) INTEL_G4B = \ exa_sf.g4b \ exa_sf_mask.g4b \ exa_wm_src_affine.g4b \ exa_wm_src_projective.g4b \ exa_wm_src_sample_argb.g4b \ exa_wm_src_sample_a.g4b \ exa_wm_src_sample_planar.g4b \ exa_wm_mask_affine.g4b \ exa_wm_mask_projective.g4b \ exa_wm_mask_sample_argb.g4b \ exa_wm_mask_sample_a.g4b \ exa_wm_noca.g4b \ exa_wm_ca.g4b \ exa_wm_ca_srcalpha.g4b \ exa_wm_write.g4b \ exa_wm_yuv_rgb.g4b \ exa_wm_xy.g4b \ $(NULL) INTEL_G4B_GEN5 = \ exa_sf.g4b.gen5 \ exa_sf_mask.g4b.gen5 \ exa_wm_src_affine.g4b.gen5 \ exa_wm_src_projective.g4b.gen5 \ exa_wm_src_sample_argb.g4b.gen5 \ exa_wm_src_sample_a.g4b.gen5 \ exa_wm_src_sample_planar.g4b.gen5 \ exa_wm_mask_affine.g4b.gen5 \ exa_wm_mask_projective.g4b.gen5 \ exa_wm_mask_sample_argb.g4b.gen5 \ exa_wm_mask_sample_a.g4b.gen5 \ exa_wm_noca.g4b.gen5 \ exa_wm_ca.g4b.gen5 \ exa_wm_ca_srcalpha.g4b.gen5 \ exa_wm_write.g4b.gen5 \ exa_wm_yuv_rgb.g4b.gen5 \ exa_wm_xy.g4b.gen5 \ $(NULL) INTEL_G5A = \ exa_sf.g5a \ exa_sf_mask.g5a \ exa_wm_src_affine.g5a \ exa_wm_src_projective.g5a \ exa_wm_src_sample_argb.g5a \ exa_wm_src_sample_a.g5a \ exa_wm_src_sample_planar.g5a \ exa_wm_mask_affine.g5a \ exa_wm_mask_projective.g5a \ exa_wm_mask_sample_argb.g5a \ exa_wm_mask_sample_a.g5a \ exa_wm_noca.g5a \ exa_wm_ca.g5a \ exa_wm_ca_srcalpha.g5a \ exa_wm_write.g5a \ exa_wm_yuv_rgb.g5a \ exa_wm_xy.g5a \ $(NULL) INTEL_G5B = \ exa_sf.g5b \ exa_sf_mask.g5b \ exa_wm_src_affine.g5b \ exa_wm_src_projective.g5b \ exa_wm_src_sample_argb.g5b \ exa_wm_src_sample_a.g5b \ exa_wm_src_sample_planar.g5b \ exa_wm_mask_affine.g5b \ exa_wm_mask_projective.g5b \ exa_wm_mask_sample_argb.g5b \ exa_wm_mask_sample_a.g5b \ exa_wm_noca.g5b \ exa_wm_ca.g5b \ exa_wm_ca_srcalpha.g5b \ exa_wm_write.g5b \ exa_wm_yuv_rgb.g5b \ exa_wm_xy.g5b \ $(NULL) INTEL_G6I = \ exa_wm_affine.g6i \ exa_wm_write.g6i \ $(NULL) INTEL_G6A = \ exa_wm_src_affine.g6a \ exa_wm_src_projective.g6a \ exa_wm_src_sample_argb.g6a \ exa_wm_src_sample_planar.g6a \ exa_wm_src_sample_a.g6a \ exa_wm_mask_affine.g6a \ exa_wm_mask_projective.g6a \ exa_wm_mask_sample_argb.g6a \ exa_wm_mask_sample_a.g6a \ exa_wm_ca.g6a \ exa_wm_ca_srcalpha.g6a \ exa_wm_noca.g6a \ exa_wm_write.g6a \ exa_wm_yuv_rgb.g6a \ $(NULL) INTEL_G6B = \ exa_wm_src_affine.g6b \ exa_wm_src_projective.g6b \ exa_wm_src_sample_argb.g6b \ exa_wm_src_sample_planar.g6b \ exa_wm_src_sample_a.g6b \ exa_wm_mask_affine.g6b \ exa_wm_mask_projective.g6b \ exa_wm_mask_sample_argb.g6b \ exa_wm_mask_sample_a.g6b \ exa_wm_ca.g6b \ exa_wm_ca_srcalpha.g6b \ exa_wm_noca.g6b \ exa_wm_write.g6b \ exa_wm_yuv_rgb.g6b \ $(NULL) INTEL_G7A = \ exa_wm_mask_affine.g7a \ exa_wm_mask_projective.g7a \ exa_wm_mask_sample_a.g7a \ exa_wm_mask_sample_argb.g7a \ exa_wm_src_affine.g7a \ exa_wm_src_projective.g7a \ exa_wm_src_sample_a.g7a \ exa_wm_src_sample_argb.g7a \ exa_wm_src_sample_planar.g7a \ exa_wm_write.g7a \ exa_wm_yuv_rgb.g7a \ $(NULL) INTEL_G7B = \ exa_wm_mask_affine.g7b \ exa_wm_mask_projective.g7b \ exa_wm_mask_sample_a.g7b \ exa_wm_mask_sample_argb.g7b \ exa_wm_src_affine.g7b \ exa_wm_src_projective.g7b \ exa_wm_src_sample_a.g7b \ exa_wm_src_sample_argb.g7b \ exa_wm_src_sample_planar.g7b \ exa_wm_write.g7b \ exa_wm_yuv_rgb.g7b \ $(NULL) INTEL_G8A = \ exa_wm_src_affine.g8a \ exa_wm_src_sample_argb.g8a \ exa_wm_src_sample_planar.g8a \ exa_wm_write.g8a \ exa_wm_yuv_rgb.g8a \ $(NULL) INTEL_G8B = \ exa_wm_src_affine.g8b \ exa_wm_src_sample_argb.g8b \ exa_wm_src_sample_planar.g8b \ exa_wm_write.g8b \ exa_wm_yuv_rgb.g8b \ $(NULL) EXTRA_DIST = \ $(INTEL_G4A) \ $(INTEL_G4I) \ $(INTEL_G4B) \ $(INTEL_G4B_GEN5)\ $(INTEL_G5A) \ $(INTEL_G5B) \ $(INTEL_G6A) \ $(INTEL_G6B) \ $(INTEL_G6I) \ $(INTEL_G7A) \ $(INTEL_G7B) \ $(INTEL_G8A) \ $(INTEL_G8B) if HAVE_GEN4ASM SUFFIXES = .g4a .g4b .g5a .g5b .g6a .g6b .g7a .g7b .g8b .g4a.g4b: $(AM_V_GEN)m4 -I$(srcdir) -s $< > $*.g4m && @INTEL_GEN4ASM@ -o $@ $*.g4m && @INTEL_GEN4ASM@ -g 5 -o $@.gen5 $*.g4m && rm $*.g4m .g5a.g5b: $(AM_V_GEN)m4 -I$(srcdir) -s $< > $*.g5m && @INTEL_GEN4ASM@ -g 5 -o $@ $*.g5m && rm $*.g5m .g6a.g6b: $(AM_V_GEN)m4 -I$(srcdir) -s $< > $*.g6m && @INTEL_GEN4ASM@ -g 6 -o $@ $*.g6m && rm $*.g6m .g7a.g7b: $(AM_V_GEN)m4 -I$(srcdir) -s $< > $*.g7m && @INTEL_GEN4ASM@ -g 7 -o $@ $*.g7m && rm $*.g7m .g8a.g8b: $(AM_V_GEN)m4 -I$(srcdir) -s $< > $*.g8m && @INTEL_GEN4ASM@ -g 8 -o $@ $*.g8m && rm $*.g8m $(INTEL_G4B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G5B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G6B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G6I) $(INTEL_G7B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G6I) $(INTEL_G8B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G6I) BUILT_SOURCES=$(INTEL_G4B) $(INTEL_G4B_GEN5) $(INTEL_G5B) $(INTEL_G6B) $(INTEL_G7B) $(INTEL_G8B) clean-local: -rm -f $(BUILT_SOURCES) endif xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g6b0000664000175000017500000000024512244635610022613 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x02800031, 0x21c01cc9, 0x00000020, 0x0a8a0001 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_yuv_rgb.g6b0000664000175000017500000000122412244635610021143 00000000000000 { 0x00800040, 0x23007fbd, 0x008d0200, 0xbd808081 }, { 0x00800041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, { 0x00800040, 0x23407fbd, 0x008d0240, 0xbf008084 }, { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x80800048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x00800048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 }, { 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_projective.g5a0000664000175000017500000000337712244635610022664 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ include(`exa_wm.g4i') define(`du_dx', `mask_du_dx') define(`du_dy', `mask_du_dy') define(`uo', `mask_uo') define(`dv_dx', `mask_dv_dx') define(`dv_dy', `mask_dv_dy') define(`vo', `mask_vo') define(`dw_dx', `mask_dw_dx') define(`dw_dy', `mask_dw_dy') define(`wo', `mask_wo') define(`u', `mask_u') define(`v', `mask_v') define(`w', `mask_w') define(`u_0', `mask_u_0') define(`v_0', `mask_v_0') define(`u_1', `mask_u_1') define(`v_1', `mask_v_1') define(`w_0', `mask_w_0') define(`w_1', `mask_w_1') include(`exa_wm_projective.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_noca.g4b.gen50000664000175000017500000000033412202250410021223 00000000000000 { 0x00802041, 0x21c077bd, 0x008d01c0, 0x008d0380 }, { 0x00802041, 0x220077bd, 0x008d0200, 0x008d0380 }, { 0x00802041, 0x224077bd, 0x008d0240, 0x008d0380 }, { 0x00802041, 0x228077bd, 0x008d0280, 0x008d0380 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_projective.g5b0000664000175000017500000000156012244635610022655 00000000000000 { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000c0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000c4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x000000cc }, { 0x00600031, 0x21801fbd, 0x108d03c0, 0x02100001 }, { 0x00600031, 0x21a01fbd, 0x108d03e0, 0x02100001 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000a0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000a4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x000000ac }, { 0x00802041, 0x210077be, 0x008d03c0, 0x008d0180 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000b0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000b4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x000000bc }, { 0x00802041, 0x214077be, 0x008d03c0, 0x008d0180 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g4b.gen50000664000175000017500000000024512244635610023446 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x01800031, 0x21c01c09, 0x20000000, 0x0a8a0001 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g5b0000664000175000017500000000051212244635610020616 00000000000000 { 0x00802001, 0x304003be, 0x008d01c0, 0x00000000 }, { 0x00802001, 0x306003be, 0x008d0200, 0x00000000 }, { 0x00802001, 0x308003be, 0x008d0240, 0x00000000 }, { 0x00802001, 0x30a003be, 0x008d0280, 0x00000000 }, { 0x00600201, 0x202003be, 0x008d0020, 0x00000000 }, { 0x00800031, 0x24001d28, 0x548d0000, 0x94084800 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_planar.g7a0000664000175000017500000000267512244635610023166 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface in planar format */ include(`exa_wm.g4i') undefine(`src_msg') undefine(`src_msg_ind') define(`src_msg', `g65') define(`src_msg_ind', `65') include(`exa_wm_sample_planar.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_affine.g4b.gen50000664000175000017500000000067012202250410022551 00000000000000 { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000a0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000a4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x210077be, 0x008d03c0, 0x000000ac }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000b0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000b4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x214077be, 0x008d03c0, 0x000000bc }, xf86-video-intel-2.99.917/src/render_program/exa_wm_yuv_rgb.g5b0000664000175000017500000000122412244635610021142 00000000000000 { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_planar.g7b0000664000175000017500000000042312244635610023154 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, { 0x00600001, 0x28200021, 0x008d0000, 0x00000000 }, { 0x02800031, 0x22001ca9, 0x00000820, 0x0a2c0001 }, { 0x02800031, 0x21c01ca9, 0x00000820, 0x0a2c0003 }, { 0x02800031, 0x22401ca9, 0x00000820, 0x0a2c0005 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_argb.g5a0000664000175000017500000000402312244635610022753 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the mask surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load argb */ mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; mov (8) mask_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* mask_msg will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) mask_msg_ind /* msg reg index */ mask_sample_base<1>UW /* readback */ null sampler (2,1,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_yuv_rgb.g4b0000664000175000017500000000122412202250410021122 00000000000000 { 0x00802040, 0x23007fbd, 0x008d0200, 0xbd808081 }, { 0x00802041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, { 0x00802040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, { 0x00802040, 0x23407fbd, 0x008d0240, 0xbf008084 }, { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x80802048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x00802048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, { 0x80802048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, { 0x00802001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x80802048, 0x22407fbd, 0x008d0340, 0x40011687 }, { 0x00802001, 0x228003fd, 0x00000000, 0x3f800000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_argb.g5b0000664000175000017500000000024512244635610022756 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 }, { 0x07800031, 0x22c01c09, 0x20000000, 0x0a8a0102 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_noca.g5a0000664000175000017500000000336112244635610020410 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Composite src and mask together, no component alpha */ include(`exa_wm.g4i') /* mul mask's alpha channel to src */ mul (16) src_sample_r_01<1>F src_sample_r_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_g_01<1>F src_sample_g_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_b_01<1>F src_sample_b_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_a_01<1>F src_sample_a_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g4i0000664000175000017500000000373012244635610022622 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load argb */ mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* src_msg will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) src_msg_ind /* msg reg index */ src_sample_base<1>UW /* readback */ null sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_ca.g6b0000664000175000017500000000033412244635610020052 00000000000000 { 0x00800041, 0x21c077bd, 0x008d01c0, 0x008d02c0 }, { 0x00800041, 0x220077bd, 0x008d0200, 0x008d0300 }, { 0x00800041, 0x224077bd, 0x008d0240, 0x008d0340 }, { 0x00800041, 0x228077bd, 0x008d0280, 0x008d0380 }, xf86-video-intel-2.99.917/src/render_program/exa_sf.g5b0000664000175000017500000000060112244635610017370 00000000000000 { 0x00400031, 0x20c01fbd, 0x1069002c, 0x02100001 }, { 0x00400001, 0x206003be, 0x00690060, 0x00000000 }, { 0x00400040, 0x20e077bd, 0x00690080, 0x006940a0 }, { 0x00400041, 0x202077be, 0x006900e0, 0x000000c0 }, { 0x00400040, 0x20e077bd, 0x006900a0, 0x00694060 }, { 0x00400041, 0x204077be, 0x006900e0, 0x000000c8 }, { 0x00600031, 0x20001fbc, 0x648d0000, 0x8808c800 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_yuv_rgb.g7b0000664000175000017500000000122412244635610021144 00000000000000 { 0x00800040, 0x23007fbd, 0x008d0200, 0xbd808081 }, { 0x00800041, 0x23007fbd, 0x008d0300, 0x3f94fdf4 }, { 0x00800040, 0x22c07fbd, 0x008d01c0, 0xbf008084 }, { 0x00800040, 0x23407fbd, 0x008d0240, 0xbf008084 }, { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x80800048, 0x21c07fbd, 0x008d02c0, 0x3fcc49ba }, { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x00800048, 0x24007fbc, 0x008d02c0, 0xbf5020c5 }, { 0x80800048, 0x22007fbd, 0x008d0340, 0xbec8b439 }, { 0x00800001, 0x240003bc, 0x008d0300, 0x00000000 }, { 0x80800048, 0x22407fbd, 0x008d0340, 0x40011687 }, { 0x00800001, 0x228003fd, 0x00000000, 0x3f800000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_argb.g4b0000664000175000017500000000024512244635610022755 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 }, { 0x07800031, 0x22c01c09, 0x00000000, 0x02580102 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g5b0000664000175000017500000000015612244635610022613 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x01800031, 0x21c01d29, 0x208d0000, 0x0a8a0001 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_projective.g6a0000664000175000017500000000442612244635610022515 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* * Fragment to compute src u/v values */ include(`exa_wm.g4i') define(`u', `src_u') define(`ul', `src_u') define(`uh', `m3') define(`v', `src_v') define(`vl', `src_v') define(`vh', `m5') define(`w', `src_w') define(`wl', `src_w_0') define(`wh', `src_w_1') define(`bl', `g2.0<8,8,1>F') define(`bh', `g4.0<8,8,1>F') define(`a0_a_x',`g6.0<0,1,0>F') define(`a0_a_y',`g6.16<0,1,0>F') define(`a0_a_z',`g7.0<0,1,0>F') /* W */ pln (8) temp_x_0<1>F a0_a_z bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_z bh { align1 }; /* pixel 8-15 */ math (8) wl<1>F temp_x_0<8,8,1>F null inv { align1 }; math (8) wh<1>F temp_x_1<8,8,1>F null inv { align1 }; /* U */ pln (8) temp_x_0<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ mul (8) ul<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; mul (8) uh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; /* V */ pln (8) temp_x_0<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ mul (8) vl<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; mul (8) vh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_ca_srcalpha.g4b.gen50000664000175000017500000000033412202250410022543 00000000000000 { 0x00802041, 0x21c077bd, 0x008d02c0, 0x008d0280 }, { 0x00802041, 0x220077bd, 0x008d0300, 0x008d0280 }, { 0x00802041, 0x224077bd, 0x008d0340, 0x008d0280 }, { 0x00802041, 0x228077bd, 0x008d0380, 0x008d0280 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_a.g6b0000664000175000017500000000024512244635610022264 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 }, { 0x02800031, 0x23801cc9, 0x000000e0, 0x0a2a0102 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_affine.g5b0000664000175000017500000000033412244635610021565 00000000000000 { 0x00802059, 0x200077bc, 0x00000060, 0x008d0100 }, { 0x00802048, 0x204077be, 0x00000064, 0x008d0140 }, { 0x00802059, 0x200077bc, 0x00000070, 0x008d0100 }, { 0x00802048, 0x208077be, 0x00000074, 0x008d0140 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_yuv_rgb.g8a0000664000175000017500000000730712432737457021167 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Keith Packard * Eric Anholt * */ include(`exa_wm.g4i') define(`YCbCr_base', `src_sample_base') define(`Cr', `src_sample_r') define(`Cr_01', `src_sample_r_01') define(`Cr_23', `src_sample_r_23') define(`Y', `src_sample_g') define(`Y_01', `src_sample_g_01') define(`Y_23', `src_sample_g_23') define(`Cb', `src_sample_b') define(`Cb_01', `src_sample_b_01') define(`Cb_23', `src_sample_b_23') define(`Crn', `mask_sample_r') define(`Crn_01', `mask_sample_r_01') define(`Crn_23', `mask_sample_r_23') define(`Yn', `mask_sample_g') define(`Yn_01', `mask_sample_g_01') define(`Yn_23', `mask_sample_g_23') define(`Cbn', `mask_sample_b') define(`Cbn_01', `mask_sample_b_01') define(`Cbn_23', `mask_sample_b_23') /* color space conversion function: * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) */ /* Normalize Y, Cb and Cr: * * Yn = (Y - 16/255) * 1.164 * Crn = Cr - 128 / 255 * Cbn = Cb - 128 / 255 */ add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; /* * R = Y + Cr * 1.596 */ mov (8) acc0<1>F Yn<8,8,1>F { compr align1 }; mac.sat(8) src_sample_r_01<1>F Crn_01<8,8,1>F 1.596F { compr align1 }; mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; mac.sat(8) src_sample_r_23<1>F Crn_23<8,8,1>F 1.596F { compr align1 }; /* * G = Crn * -0.813 + Cbn * -0.392 + Y */ mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; mac (8) acc0<1>F Crn_01<8,8,1>F -0.813F { compr align1 }; mac.sat(8) src_sample_g_01<1>F Cbn_01<8,8,1>F -0.392F { compr align1 }; mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; mac (8) acc0<1>F Crn_23<8,8,1>F -0.813F { compr align1 }; mac.sat(16) src_sample_g_23<1>F Cbn_23<8,8,1>F -0.392F { compr align1 }; /* * B = Cbn * 2.017 + Y */ mov (8) acc0<1>F Yn_01<8,8,1>F { compr align1 }; mac.sat(8) src_sample_b_01<1>F Cbn_01<8,8,1>F 2.017F { compr align1 }; mov (8) acc0<1>F Yn_23<8,8,1>F { compr align1 }; mac.sat(8) src_sample_b_23<1>F Cbn_23<8,8,1>F 2.017F { compr align1 }; /* * A = 1.0 */ mov (16) src_sample_a<1>F 1.0F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_src_projective.g4b0000664000175000017500000000156012202250410022471 00000000000000 { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000080 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000084 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x0000008c }, { 0x00600031, 0x21801fbd, 0x008d03c0, 0x01110001 }, { 0x00600031, 0x21a01fbd, 0x008d03e0, 0x01110001 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x0000006c }, { 0x00802041, 0x204077be, 0x008d03c0, 0x008d0180 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x0000007c }, { 0x00802041, 0x208077be, 0x008d03c0, 0x008d0180 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g6b0000664000175000017500000000164712244635610020631 00000000000000 { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, { 0x00600001, 0x206003be, 0x008d01e0, 0x00000000 }, { 0x00600001, 0x208003be, 0x008d0200, 0x00000000 }, { 0x00600001, 0x20a003be, 0x008d0220, 0x00000000 }, { 0x00600001, 0x20c003be, 0x008d0240, 0x00000000 }, { 0x00600001, 0x20e003be, 0x008d0260, 0x00000000 }, { 0x00600001, 0x210003be, 0x008d0280, 0x00000000 }, { 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 }, { 0x05800031, 0x24001cc8, 0x00000040, 0x90019000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_planar.g8a0000664000175000017500000000267512244635610023167 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface in planar format */ include(`exa_wm.g4i') undefine(`src_msg') undefine(`src_msg_ind') define(`src_msg', `g65') define(`src_msg_ind', `65') include(`exa_wm_sample_planar.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_affine.g7b0000664000175000017500000000033412244635610021733 00000000000000 { 0x0060005a, 0x290077bd, 0x00000100, 0x008d0040 }, { 0x0060005a, 0x292077bd, 0x00000100, 0x008d0080 }, { 0x0060005a, 0x294077bd, 0x00000110, 0x008d0040 }, { 0x0060005a, 0x296077bd, 0x00000110, 0x008d0080 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_planar.g4a0000664000175000017500000000252212244635610023152 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface in planar format */ include(`exa_wm.g4i') include(`exa_wm_sample_planar.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_affine.g6a0000664000175000017500000000271612244635610021737 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* * Fragment to compute src u/v values */ include(`exa_wm.g4i') define(`ul', `mask_u') define(`uh', `m9') define(`vl', `mask_v') define(`vh', `m11') define(`bl', `g2.0<8,8,1>F') define(`bh', `g4.0<8,8,1>F') define(`a0_a_x',`g8.0<0,1,0>F') define(`a0_a_y',`g8.16<0,1,0>F') include(`exa_wm_affine.g6i') xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_affine.g4b0000664000175000017500000000067012202250410021714 00000000000000 { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000a0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000a4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x210077be, 0x008d03c0, 0x000000ac }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000b0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000b4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x214077be, 0x008d03c0, 0x000000bc }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_affine.g4b0000664000175000017500000000067012202250410021550 00000000000000 { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x204077be, 0x008d03c0, 0x0000006c }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x208077be, 0x008d03c0, 0x0000007c }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_a.g6a0000664000175000017500000000403112244635610022260 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the mask surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load only alpha */ mov (1) g0.8<1>UD 0x00007000UD { align1 mask_disable }; mov (8) mask_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* mask_msg will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) mask_msg_ind /* msg reg index */ mask_sample_a_01<1>UW /* readback */ null sampler (2,1,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_yuv_rgb.g5a0000664000175000017500000000631612244635610021150 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Keith Packard * Eric Anholt * */ include(`exa_wm.g4i') define(`YCbCr_base', `src_sample_base') define(`Cr', `src_sample_r') define(`Cr_01', `src_sample_r_01') define(`Cr_23', `src_sample_r_23') define(`Y', `src_sample_g') define(`Y_01', `src_sample_g_01') define(`Y_23', `src_sample_g_23') define(`Cb', `src_sample_b') define(`Cb_01', `src_sample_b_01') define(`Cb_23', `src_sample_b_23') define(`Crn', `mask_sample_r') define(`Crn_01', `mask_sample_r_01') define(`Crn_23', `mask_sample_r_23') define(`Yn', `mask_sample_g') define(`Yn_01', `mask_sample_g_01') define(`Yn_23', `mask_sample_g_23') define(`Cbn', `mask_sample_b') define(`Cbn_01', `mask_sample_b_01') define(`Cbn_23', `mask_sample_b_23') /* color space conversion function: * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) */ /* Normalize Y, Cb and Cr: * * Yn = (Y - 16/255) * 1.164 * Crn = Cr - 128 / 255 * Cbn = Cb - 128 / 255 */ add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; /* * R = Y + Cr * 1.596 */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; /* * G = Crn * -0.813 + Cbn * -0.392 + Y */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; /* * B = Cbn * 2.017 + Y */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; /* * A = 1.0 */ mov (16) src_sample_a<1>F 1.0F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_projective.g6b0000664000175000017500000000122412244635610022653 00000000000000 { 0x0060005a, 0x23c077bd, 0x00000120, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x00000120, 0x008d0080 }, { 0x01600038, 0x218003bd, 0x008d03c0, 0x00000000 }, { 0x01600038, 0x21a003bd, 0x008d03e0, 0x00000000 }, { 0x0060005a, 0x23c077bd, 0x00000100, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x00000100, 0x008d0080 }, { 0x00600041, 0x210077be, 0x008d03c0, 0x008d0180 }, { 0x00600041, 0x212077be, 0x008d03e0, 0x008d01a0 }, { 0x0060005a, 0x23c077bd, 0x00000110, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x00000110, 0x008d0080 }, { 0x00600041, 0x214077be, 0x008d03c0, 0x008d0180 }, { 0x00600041, 0x216077be, 0x008d03e0, 0x008d01a0 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g8a0000664000175000017500000000313012244635610020617 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ include(`exa_wm.g4i') /* * Prepare data in g66-g67 for Red channel, g68-g69 for Green channel, * g70-g71 for Blue and g72-g73 for Alpha channel */ define(`slot_r_00', `g66') define(`slot_r_01', `g67') define(`slot_g_00', `g68') define(`slot_g_01', `g69') define(`slot_b_00', `g70') define(`slot_b_01', `g71') define(`slot_a_00', `g72') define(`slot_a_01', `g73') define(`data_port_msg_2_ind', `66') include(`exa_wm_write.g6i') xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_a.g6a0000664000175000017500000000401612244635610022117 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load alpha */ mov (1) g0.8<1>UD 0x00007000UD { align1 mask_disable }; mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* src_msg will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) src_msg_ind /* msg reg index */ src_sample_a_01<1>UW /* readback */ null sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_projective.g4i0000664000175000017500000000450312202250410021631 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /********** Compute w *************/ mul (16) temp_x<1>F dst_x<8,8,1>F dw_dx { compr align1 }; mul (16) temp_y<1>F dst_y<8,8,1>F dw_dy { compr align1 }; add (16) temp_x<1>F temp_x<8,8,1>F temp_y<8,8,1>F { compr align1 }; add (16) temp_x<1>F temp_x<8,8,1>F wo { compr align1 }; send (8) 0 w_0<1>F temp_x_0<8,8,1>F math inv mlen 1 rlen 1 { align1 }; send (8) 0 w_1<1>F temp_x_1<8,8,1>F math inv mlen 1 rlen 1 { sechalf align1 }; /********** Compute u *************/ mul (16) temp_x<1>F dst_x<8,8,1>F du_dx { compr align1 }; mul (16) temp_y<1>F dst_y<8,8,1>F du_dy { compr align1 }; add (16) temp_x<1>F temp_x<8,8,1>F temp_y<8,8,1>F { compr align1 }; add (16) temp_x<1>F temp_x<8,8,1>F uo { compr align1 }; mul (16) u<1>F temp_x<8,8,1>F w<8,8,1>F { compr align1 }; /********** Compute v *************/ mul (16) temp_x<1>F dst_x<8,8,1>F dv_dx { compr align1 }; mul (16) temp_y<1>F dst_y<8,8,1>F dv_dy { compr align1 }; add (16) temp_x<1>F temp_x<8,8,1>F temp_y<8,8,1>F { compr align1 }; add (16) temp_x<1>F temp_x<8,8,1>F vo { compr align1 }; mul (16) v<1>F temp_x<8,8,1>F w<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_noca.g4a0000664000175000017500000000336112202250410020370 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Composite src and mask together, no component alpha */ include(`exa_wm.g4i') /* mul mask's alpha channel to src */ mul (16) src_sample_r_01<1>F src_sample_r_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_g_01<1>F src_sample_g_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_b_01<1>F src_sample_b_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_a_01<1>F src_sample_a_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_a.g4b.gen50000664000175000017500000000024512244635610022753 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x01800031, 0x22801c09, 0x20000000, 0x0a2a0001 }, xf86-video-intel-2.99.917/src/render_program/exa_sf_mask.g5a0000664000175000017500000000573312244635610020415 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Keith Packard * Eric Anholt * Wang Zhenyu */ /* * Inputs (note all sub-register addresses are bytes, not float indices) * * Note that the vertices will have been reordered: * * V0 is topmost (leftmost among topmost) (upper left) * V1 is next clockwise (lower right) * V2 is remaining (lower left) * * V0 ...................... XX * | . * | . * | . * V2------------------------V1 * * G0 thread state -- just pass along * * G1 and G2 are fixed by SF spec * * G1.0 reserved * G1.4 Provoking vertex * G1.8 Determinant * G1.12 X1 - X0 * G1.16 X2 - X0 * G1.20 Y1 - Y0 * G1.24 Y2 - Y0 * G1.30 reserved * * G2.0 Z0 * G2.4 1/W0 * G2.8 Z1 * G2.12 1/W1 * G2.16 Z2 * G2.20 1/W2 * G2.24 reserved * G2.30 reserved * * G3 is V0 Vertex Attribute Data from URB (upper left) * * G3.0 u0 * G3.4 v0 * * G4 is V1 Vertex Attribute Data from URB (lower right) * * G4.0 u1 * G4.4 v1 * * G5 is V2 Vertex Attribute Data from URB (lower left) * */ /* Compute inverses of the input deltas */ send (4) 0 g6<1>F g1.12<4,4,1>F math inv mlen 1 rlen 1 { align1 }; /* texture location at V0 */ mov (8) m3<1>F g3<8,8,1>F { align1 }; /* compute V1 - V2 (motion in X) for texture coordinates */ add (8) g7<1>F g4<8,8,1>F -g5<8,8,1>F { align1 }; /* multiply by 1/dx */ mul (8) m1<1>F g7<8,8,1>F g6.0<0,1,0>F { align1 }; /* Compute V2 - V0 (motion in Y) for texture coordinates */ add (8) g7<1>F g5<8,8,1>F -g3<8,8,1>F { align1 }; /* multiply by 1/dy */ mul (8) m2<1>F g7<8,8,1>F g6.8<0,1,0>F {align1 }; /* and we're done */ send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT }; xf86-video-intel-2.99.917/src/render_program/exa_wm_ca_srcalpha.g6a0000664000175000017500000000331312202250410021707 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Composite src and mask together, no component alpha */ include(`exa_wm.g4i') mul (16) src_sample_r_01<1>F mask_sample_r_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_g_01<1>F mask_sample_g_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_b_01<1>F mask_sample_b_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_a_01<1>F mask_sample_a_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_a.g7b0000664000175000017500000000024512244635610022265 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, { 0x00600001, 0x28e00021, 0x008d0000, 0x00000000 }, { 0x02800031, 0x23801ca9, 0x000008e0, 0x0a2c0102 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_ca.g6a0000664000175000017500000000335712202250410020042 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Composite src and mask together, no component alpha */ include(`exa_wm.g4i') /* mul mask rgba channels to src */ mul (16) src_sample_r_01<1>F src_sample_r_01<8,8,1>F mask_sample_r_01<8,8,1>F { compr align1 }; mul (16) src_sample_g_01<1>F src_sample_g_01<8,8,1>F mask_sample_g_01<8,8,1>F { compr align1 }; mul (16) src_sample_b_01<1>F src_sample_b_01<8,8,1>F mask_sample_b_01<8,8,1>F { compr align1 }; mul (16) src_sample_a_01<1>F src_sample_a_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_ca.g4b0000664000175000017500000000033412202250410020031 00000000000000 { 0x00802041, 0x21c077bd, 0x008d01c0, 0x008d02c0 }, { 0x00802041, 0x220077bd, 0x008d0200, 0x008d0300 }, { 0x00802041, 0x224077bd, 0x008d0240, 0x008d0340 }, { 0x00802041, 0x228077bd, 0x008d0280, 0x008d0380 }, xf86-video-intel-2.99.917/src/render_program/exa_sf.g4a0000664000175000017500000000573212202250410017361 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Keith Packard * Eric Anholt * */ /* * Inputs (note all sub-register addresses are bytes, not float indices) * * Note that the vertices will have been reordered: * * V0 is topmost (leftmost among topmost) (upper left) * V1 is next clockwise (lower right) * V2 is remaining (lower left) * * V0 ...................... XX * | . * | . * | . * V2------------------------V1 * * G0 thread state -- just pass along * * G1 and G2 are fixed by SF spec * * G1.0 reserved * G1.4 Provoking vertex * G1.8 Determinant * G1.12 X1 - X0 * G1.16 X2 - X0 * G1.20 Y1 - Y0 * G1.24 Y2 - Y0 * G1.30 reserved * * G2.0 Z0 * G2.4 1/W0 * G2.8 Z1 * G2.12 1/W1 * G2.16 Z2 * G2.20 1/W2 * G2.24 reserved * G2.30 reserved * * G3 is V0 Vertex Attribute Data from URB (upper left) * * G3.0 u0 * G3.4 v0 * * G4 is V1 Vertex Attribute Data from URB (lower right) * * G4.0 u1 * G4.4 v1 * * G5 is V2 Vertex Attribute Data from URB (lower left) * */ /* Compute inverses of the input deltas */ send (4) 0 g6<1>F g1.12<4,4,1>F math inv mlen 1 rlen 1 { align1 }; /* texture location at V0 */ mov (4) m3<1>F g3<4,4,1>F { align1 }; /* compute V1 - V2 (motion in X) for texture coordinates */ add (4) g7<1>F g4<4,4,1>F -g5<4,4,1>F { align1 }; /* multiply by 1/dx */ mul (4) m1<1>F g7<4,4,1>F g6.0<0,1,0>F { align1 }; /* Compute V2 - V0 (motion in Y) for texture coordinates */ add (4) g7<1>F g5<4,4,1>F -g3<4,4,1>F { align1 }; /* multiply by 1/dy */ mul (4) m2<1>F g7<4,4,1>F g6.8<0,1,0>F {align1 }; /* and we're done */ send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT }; nop; nop; nop; nop; nop; nop; nop; nop; xf86-video-intel-2.99.917/src/render_program/exa_wm_affine.g6i0000664000175000017500000000264212244635610020732 00000000000000/* * Copyright © 2010-2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* * Fragment to compute src u/v values */ /* U */ pln (8) ul<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ pln (8) uh<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ /* V */ pln (8) vl<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ pln (8) vh<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_xy.g4a0000664000175000017500000000353712202250410020115 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Register assignments: * * x g6/g7 * y g8/g9 * * temp x g10/g11 * temp y g12/g13 * * src w g14/g15 * src u m1/m2 * src v m3/m4 */ /* Fragment to compute per-pixel XY values */ include(`exa_wm.g4i') /* Load X and Y coordinates and compute per-pixel coordinates */ add (16) temp_x_uw<1>UW dst_x_uw 0x10101010V { align1 }; add (16) temp_y_uw<1>UW dst_y_uw 0x11001100V { align1 }; /* subtract screen-space origin of vertex 0 */ add (16) dst_x<1>F temp_x_uw<8,8,1>UW -screen_x0 { compr align1 }; add (16) dst_y<1>F temp_y_uw<8,8,1>UW -screen_y0 { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_noca.g5b0000664000175000017500000000033412244635610020406 00000000000000 { 0x00802041, 0x21c077bd, 0x008d01c0, 0x008d0380 }, { 0x00802041, 0x220077bd, 0x008d0200, 0x008d0380 }, { 0x00802041, 0x224077bd, 0x008d0240, 0x008d0380 }, { 0x00802041, 0x228077bd, 0x008d0280, 0x008d0380 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g7a0000664000175000017500000000265612244635610022623 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface */ include(`exa_wm.g4i') undefine(`src_msg') undefine(`src_msg_ind') define(`src_msg', `g65') define(`src_msg_ind', `65') include(`exa_wm_src_sample_argb.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_projective.g4b0000664000175000017500000000156012202250410022635 00000000000000 { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000c0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000c4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x000000cc }, { 0x00600031, 0x21801fbd, 0x008d03c0, 0x01110001 }, { 0x00600031, 0x21a01fbd, 0x008d03e0, 0x01110001 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000a0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000a4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x000000ac }, { 0x00802041, 0x210077be, 0x008d03c0, 0x008d0180 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x000000b0 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x000000b4 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x000000bc }, { 0x00802041, 0x214077be, 0x008d03c0, 0x008d0180 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_ca_srcalpha.g4a0000664000175000017500000000331312202250410021705 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Composite src and mask together, no component alpha */ include(`exa_wm.g4i') mul (16) src_sample_r_01<1>F mask_sample_r_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_g_01<1>F mask_sample_g_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_b_01<1>F mask_sample_b_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_a_01<1>F mask_sample_a_01<8,8,1>F src_sample_a_01<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_sf.g4b.gen50000664000175000017500000000147112202250410020213 00000000000000 { 0x00400031, 0x20c01fbd, 0x1069002c, 0x02100001 }, { 0x00400001, 0x206003be, 0x00690060, 0x00000000 }, { 0x00400040, 0x20e077bd, 0x00690080, 0x006940a0 }, { 0x00400041, 0x202077be, 0x006900e0, 0x000000c0 }, { 0x00400040, 0x20e077bd, 0x006900a0, 0x00694060 }, { 0x00400041, 0x204077be, 0x006900e0, 0x000000c8 }, { 0x00600031, 0x20001fbc, 0x648d0000, 0x8808c800 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_planar.g6b0000664000175000017500000000042312244635610023153 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x02800031, 0x22001cc9, 0x00000020, 0x0a2a0001 }, { 0x02800031, 0x21c01cc9, 0x00000020, 0x0a2a0003 }, { 0x02800031, 0x22401cc9, 0x00000020, 0x0a2a0005 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g5a0000664000175000017500000000374212244635610020625 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ include(`exa_wm.g4i') /* * Prepare data in m2-m5 for subspan(1,0), m6-m9 for subspan(3,2), */ mov (16) m130<1>F src_sample_r_01<8,8,1>F { align1 compr }; mov (16) m131<1>F src_sample_g_01<8,8,1>F { align1 compr }; mov (16) m132<1>F src_sample_b_01<8,8,1>F { align1 compr }; mov (16) m133<1>F src_sample_a_01<8,8,1>F { align1 compr }; /* m0, m1 are all direct passed by PS thread payload */ mov (8) data_port_msg_1<1>F g1<8,8,1>F { mask_disable align1 }; /* write */ send (16) data_port_msg_0_ind acc0<1>UW g0<8,8,1>UW write ( 0, /* binding_table */ 8, /* pixel scordboard clear, msg type simd16 single source */ 4, /* render target write */ 0 /* no write commit message */ ) mlen 10 rlen 0 { align1 EOT }; xf86-video-intel-2.99.917/src/render_program/exa_wm_src_affine.g7b0000664000175000017500000000033412244635610021567 00000000000000 { 0x0060005a, 0x284077bd, 0x000000c0, 0x008d0040 }, { 0x0060005a, 0x286077bd, 0x000000c0, 0x008d0080 }, { 0x0060005a, 0x288077bd, 0x000000d0, 0x008d0040 }, { 0x0060005a, 0x28a077bd, 0x000000d0, 0x008d0080 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_affine.g8a0000664000175000017500000000271112244635610021570 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* * Fragment to compute src u/v values */ include(`exa_wm.g4i') define(`ul', `g66') define(`uh', `g67') define(`vl', `g68') define(`vh', `g69') define(`bl', `g2.0<8,8,1>F') define(`bh', `g4.0<8,8,1>F') define(`a0_a_x',`g6.0<0,1,0>F') define(`a0_a_y',`g6.16<0,1,0>F') include(`exa_wm_affine.g6i') xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_a.g7b0000664000175000017500000000024512244635610022121 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, { 0x00600001, 0x28200021, 0x008d0000, 0x00000000 }, { 0x02800031, 0x22801ca9, 0x00000820, 0x0a2c0001 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_projective.g7a0000664000175000017500000000442312244635610022657 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* * Fragment to compute src u/v values */ include(`exa_wm.g4i') define(`u', `g72') define(`ul', `g72') define(`uh', `g73') define(`v', `g74') define(`vl', `g74') define(`vh', `g75') define(`w', `mask_w') define(`wl', `mask_w_0') define(`wh', `mask_w_1') define(`bl', `g2.0<8,8,1>F') define(`bh', `g4.0<8,8,1>F') define(`a0_a_x',`g8.0<0,1,0>F') define(`a0_a_y',`g8.16<0,1,0>F') define(`a0_a_z',`g9.0<0,1,0>F') /* W */ pln (8) temp_x_0<1>F a0_a_z bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_z bh { align1 }; /* pixel 8-15 */ math (8) wl<1>F temp_x_0<8,8,1>F null inv { align1 }; math (8) wh<1>F temp_x_1<8,8,1>F null inv { align1 }; /* U */ pln (8) temp_x_0<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ mul (8) ul<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; mul (8) uh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; /* V */ pln (8) temp_x_0<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ mul (8) vl<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; mul (8) vh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_noca.g6b0000664000175000017500000000033412244635610020407 00000000000000 { 0x00800041, 0x21c077bd, 0x008d01c0, 0x008d0380 }, { 0x00800041, 0x220077bd, 0x008d0200, 0x008d0380 }, { 0x00800041, 0x224077bd, 0x008d0240, 0x008d0380 }, { 0x00800041, 0x228077bd, 0x008d0280, 0x008d0380 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_projective.g5a0000664000175000017500000000335112244635610022510 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ include(`exa_wm.g4i') define(`du_dx', `src_du_dx') define(`du_dy', `src_du_dy') define(`uo', `src_uo') define(`dv_dx', `src_dv_dx') define(`dv_dy', `src_dv_dy') define(`vo', `src_vo') define(`dw_dx', `src_dw_dx') define(`dw_dy', `src_dw_dy') define(`wo', `src_wo') define(`u', `src_u') define(`v', `src_v') define(`w', `src_w') define(`u_0', `src_u_0') define(`v_0', `src_v_0') define(`u_1', `src_u_1') define(`v_1', `src_v_1') define(`w_0', `src_w_0') define(`w_1', `src_w_1') include(`exa_wm_projective.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_xy.g4b.gen50000664000175000017500000000033412202250410020743 00000000000000 { 0x00800040, 0x23c06d29, 0x00480028, 0x10101010 }, { 0x00800040, 0x23806d29, 0x0048002a, 0x11001100 }, { 0x00802040, 0x2100753d, 0x008d03c0, 0x00004020 }, { 0x00802040, 0x2140753d, 0x008d0380, 0x00004024 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_projective.g6b0000664000175000017500000000122412244635610022507 00000000000000 { 0x0060005a, 0x23c077bd, 0x000000e0, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x000000e0, 0x008d0080 }, { 0x01600038, 0x218003bd, 0x008d03c0, 0x00000000 }, { 0x01600038, 0x21a003bd, 0x008d03e0, 0x00000000 }, { 0x0060005a, 0x23c077bd, 0x000000c0, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x000000c0, 0x008d0080 }, { 0x00600041, 0x204077be, 0x008d03c0, 0x008d0180 }, { 0x00600041, 0x206077be, 0x008d03e0, 0x008d01a0 }, { 0x0060005a, 0x23c077bd, 0x000000d0, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x000000d0, 0x008d0080 }, { 0x00600041, 0x208077be, 0x008d03c0, 0x008d0180 }, { 0x00600041, 0x20a077be, 0x008d03e0, 0x008d01a0 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_projective.g4a0000664000175000017500000000335112202250410022470 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ include(`exa_wm.g4i') define(`du_dx', `src_du_dx') define(`du_dy', `src_du_dy') define(`uo', `src_uo') define(`dv_dx', `src_dv_dx') define(`dv_dy', `src_dv_dy') define(`vo', `src_vo') define(`dw_dx', `src_dw_dx') define(`dw_dy', `src_dw_dy') define(`wo', `src_wo') define(`u', `src_u') define(`v', `src_v') define(`w', `src_w') define(`u_0', `src_u_0') define(`v_0', `src_v_0') define(`u_1', `src_u_1') define(`v_1', `src_v_1') define(`w_0', `src_w_0') define(`w_1', `src_w_1') include(`exa_wm_projective.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_projective.g4a0000664000175000017500000000337712202250410022644 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ include(`exa_wm.g4i') define(`du_dx', `mask_du_dx') define(`du_dy', `mask_du_dy') define(`uo', `mask_uo') define(`dv_dx', `mask_dv_dx') define(`dv_dy', `mask_dv_dy') define(`vo', `mask_vo') define(`dw_dx', `mask_dw_dx') define(`dw_dy', `mask_dw_dy') define(`wo', `mask_wo') define(`u', `mask_u') define(`v', `mask_v') define(`w', `mask_w') define(`u_0', `mask_u_0') define(`v_0', `mask_v_0') define(`u_1', `mask_u_1') define(`v_1', `mask_v_1') define(`w_0', `mask_w_0') define(`w_1', `mask_w_1') include(`exa_wm_projective.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g8b0000664000175000017500000000024512400044327022606 00000000000000 { 0x00000001, 0x2008060c, 0x00000000, 0x00000000 }, { 0x00600001, 0x28200208, 0x008d0000, 0x00000000 }, { 0x02800031, 0x21c00a48, 0x0e000820, 0x0a8c0001 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_a.g4b0000664000175000017500000000024512244635610022116 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x01800031, 0x22801c09, 0x00000000, 0x02520001 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_planar.g4b0000664000175000017500000000042312244635610023151 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x01800031, 0x22001c09, 0x00000000, 0x02520001 }, { 0x01800031, 0x21c01c09, 0x00000000, 0x02520003 }, { 0x01800031, 0x22401c09, 0x00000000, 0x02520005 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_affine.g5a0000664000175000017500000000260412244635610021566 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ include(`exa_wm.g4i') line (16) null src_du_dx dst_x<8,8,1>F { compr align1 }; mac (16) src_u src_du_dy dst_y<8,8,1>F { compr align1 }; line (16) null src_dv_dx dst_x<8,8,1>F { compr align1 }; mac (16) src_v src_dv_dy dst_y<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g4a0000664000175000017500000000500412202250410020576 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ include(`exa_wm.g4i') /* * Prepare data in m2-m5 for subspan(1,0), m6-m9 for subspan(3,2), * * Note that the SIMD16 write message takes data for the first * two sub-spans followed by the data for the second two sub-spans * instead of having the two sub-spans interleaved by channel. Weird. */ mov (8) data_port_r_01<1>F src_sample_r_01<8,8,1>F { align1 }; mov (8) data_port_g_01<1>F src_sample_g_01<8,8,1>F { align1 }; mov (8) data_port_b_01<1>F src_sample_b_01<8,8,1>F { align1 }; mov (8) data_port_a_01<1>F src_sample_a_01<8,8,1>F { align1 }; mov (8) data_port_r_23<1>F src_sample_r_23<8,8,1>F { sechalf align1 }; mov (8) data_port_g_23<1>F src_sample_g_23<8,8,1>F { sechalf align1 }; mov (8) data_port_b_23<1>F src_sample_b_23<8,8,1>F { sechalf align1 }; mov (8) data_port_a_23<1>F src_sample_a_23<8,8,1>F { sechalf align1 }; /* m0, m1 are all direct passed by PS thread payload */ mov (8) data_port_msg_1<1>UD g1<8,8,1>UD { mask_disable align1 }; /* write */ send (16) data_port_msg_0_ind acc0<1>UW g0<8,8,1>UW write ( 0, /* binding_table */ 8, /* pixel scordboard clear, msg type simd16 single source */ 4, /* render target write */ 0 /* no write commit message */ ) mlen 10 rlen 0 { align1 EOT }; nop; nop; nop; nop; nop; nop; nop; nop; xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_a.g5b0000664000175000017500000000024512244635610022263 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 }, { 0x07800031, 0x23801c09, 0x20000000, 0x0a2a0102 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_noca.g4b0000664000175000017500000000033412202250410020366 00000000000000 { 0x00802041, 0x21c077bd, 0x008d01c0, 0x008d0380 }, { 0x00802041, 0x220077bd, 0x008d0200, 0x008d0380 }, { 0x00802041, 0x224077bd, 0x008d0240, 0x008d0380 }, { 0x00802041, 0x228077bd, 0x008d0280, 0x008d0380 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g7b0000664000175000017500000000164712244635610020632 00000000000000 { 0x00600001, 0x284003bd, 0x008d01c0, 0x00000000 }, { 0x00600001, 0x286003bd, 0x008d01e0, 0x00000000 }, { 0x00600001, 0x288003bd, 0x008d0200, 0x00000000 }, { 0x00600001, 0x28a003bd, 0x008d0220, 0x00000000 }, { 0x00600001, 0x28c003bd, 0x008d0240, 0x00000000 }, { 0x00600001, 0x28e003bd, 0x008d0260, 0x00000000 }, { 0x00600001, 0x290003bd, 0x008d0280, 0x00000000 }, { 0x00600001, 0x292003bd, 0x008d02a0, 0x00000000 }, { 0x05800031, 0x24001ca8, 0x00000840, 0x90031000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_argb.g6b0000664000175000017500000000024512244635610022757 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 }, { 0x02800031, 0x22c01cc9, 0x000000e0, 0x0a8a0102 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_yuv_rgb.g4a0000664000175000017500000000631612202250410021130 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Keith Packard * Eric Anholt * */ include(`exa_wm.g4i') define(`YCbCr_base', `src_sample_base') define(`Cr', `src_sample_r') define(`Cr_01', `src_sample_r_01') define(`Cr_23', `src_sample_r_23') define(`Y', `src_sample_g') define(`Y_01', `src_sample_g_01') define(`Y_23', `src_sample_g_23') define(`Cb', `src_sample_b') define(`Cb_01', `src_sample_b_01') define(`Cb_23', `src_sample_b_23') define(`Crn', `mask_sample_r') define(`Crn_01', `mask_sample_r_01') define(`Crn_23', `mask_sample_r_23') define(`Yn', `mask_sample_g') define(`Yn_01', `mask_sample_g_01') define(`Yn_23', `mask_sample_g_23') define(`Cbn', `mask_sample_b') define(`Cbn_01', `mask_sample_b_01') define(`Cbn_23', `mask_sample_b_23') /* color space conversion function: * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) */ /* Normalize Y, Cb and Cr: * * Yn = (Y - 16/255) * 1.164 * Crn = Cr - 128 / 255 * Cbn = Cb - 128 / 255 */ add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; /* * R = Y + Cr * 1.596 */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; /* * G = Crn * -0.813 + Cbn * -0.392 + Y */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; /* * B = Cbn * 2.017 + Y */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; /* * A = 1.0 */ mov (16) src_sample_a<1>F 1.0F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_planar.g8b0000664000175000017500000000042312400044327023146 00000000000000 { 0x00000001, 0x2008060c, 0x00000000, 0x0000e000 }, { 0x00600001, 0x28200208, 0x008d0000, 0x00000000 }, { 0x02800031, 0x22000a48, 0x0e000820, 0x0a2c0001 }, { 0x02800031, 0x21c00a48, 0x0e000820, 0x0a2c0003 }, { 0x02800031, 0x22400a48, 0x0e000820, 0x0a2c0005 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_ca_srcalpha.g5b0000664000175000017500000000033412244635610021726 00000000000000 { 0x00802041, 0x21c077bd, 0x008d02c0, 0x008d0280 }, { 0x00802041, 0x220077bd, 0x008d0300, 0x008d0280 }, { 0x00802041, 0x224077bd, 0x008d0340, 0x008d0280 }, { 0x00802041, 0x228077bd, 0x008d0380, 0x008d0280 }, xf86-video-intel-2.99.917/src/render_program/exa_sf_mask.g4a0000664000175000017500000000600312202250410020364 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Keith Packard * Eric Anholt * Wang Zhenyu */ /* * Inputs (note all sub-register addresses are bytes, not float indices) * * Note that the vertices will have been reordered: * * V0 is topmost (leftmost among topmost) (upper left) * V1 is next clockwise (lower right) * V2 is remaining (lower left) * * V0 ...................... XX * | . * | . * | . * V2------------------------V1 * * G0 thread state -- just pass along * * G1 and G2 are fixed by SF spec * * G1.0 reserved * G1.4 Provoking vertex * G1.8 Determinant * G1.12 X1 - X0 * G1.16 X2 - X0 * G1.20 Y1 - Y0 * G1.24 Y2 - Y0 * G1.30 reserved * * G2.0 Z0 * G2.4 1/W0 * G2.8 Z1 * G2.12 1/W1 * G2.16 Z2 * G2.20 1/W2 * G2.24 reserved * G2.30 reserved * * G3 is V0 Vertex Attribute Data from URB (upper left) * * G3.0 u0 * G3.4 v0 * * G4 is V1 Vertex Attribute Data from URB (lower right) * * G4.0 u1 * G4.4 v1 * * G5 is V2 Vertex Attribute Data from URB (lower left) * */ /* Compute inverses of the input deltas */ send (4) 0 g6<1>F g1.12<4,4,1>F math inv mlen 1 rlen 1 { align1 }; /* texture location at V0 */ mov (8) m3<1>F g3<8,8,1>F { align1 }; /* compute V1 - V2 (motion in X) for texture coordinates */ add (8) g7<1>F g4<8,8,1>F -g5<8,8,1>F { align1 }; /* multiply by 1/dx */ mul (8) m1<1>F g7<8,8,1>F g6.0<0,1,0>F { align1 }; /* Compute V2 - V0 (motion in Y) for texture coordinates */ add (8) g7<1>F g5<8,8,1>F -g3<8,8,1>F { align1 }; /* multiply by 1/dy */ mul (8) m2<1>F g7<8,8,1>F g6.8<0,1,0>F {align1 }; /* and we're done */ send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT }; nop; nop; nop; nop; nop; nop; nop; nop; xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_affine.g7a0000664000175000017500000000271112244635610021733 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* * Fragment to compute src u/v values */ include(`exa_wm.g4i') define(`ul', `g72') define(`uh', `g73') define(`vl', `g74') define(`vh', `g75') define(`bl', `g2.0<8,8,1>F') define(`bh', `g4.0<8,8,1>F') define(`a0_a_x',`g8.0<0,1,0>F') define(`a0_a_y',`g8.16<0,1,0>F') include(`exa_wm_affine.g6i') xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_a.g4b.gen50000664000175000017500000000024512244635610023117 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 }, { 0x07800031, 0x23801c09, 0x20000000, 0x0a2a0102 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_argb.g4b.gen50000664000175000017500000000024512244635610023612 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 }, { 0x07800031, 0x22c01c09, 0x20000000, 0x0a8a0102 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_argb.g7b0000664000175000017500000000024512244635610022760 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d0000, 0x00000000 }, { 0x02800031, 0x22c01ca9, 0x000008e0, 0x0a8c0102 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_planar.g6a0000664000175000017500000000252212244635610023154 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface in planar format */ include(`exa_wm.g4i') include(`exa_wm_sample_planar.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g7a0000664000175000017500000000313012244635610020616 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ include(`exa_wm.g4i') /* * Prepare data in g66-g67 for Red channel, g68-g69 for Green channel, * g70-g71 for Blue and g72-g73 for Alpha channel */ define(`slot_r_00', `g66') define(`slot_r_01', `g67') define(`slot_g_00', `g68') define(`slot_g_01', `g69') define(`slot_b_00', `g70') define(`slot_b_01', `g71') define(`slot_a_00', `g72') define(`slot_a_01', `g73') define(`data_port_msg_2_ind', `66') include(`exa_wm_write.g6i') xf86-video-intel-2.99.917/src/render_program/exa_wm_src_projective.g7b0000664000175000017500000000122412400044327022501 00000000000000 { 0x0060005a, 0x23c077bd, 0x000000e0, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x000000e0, 0x008d0080 }, { 0x01600038, 0x218003bd, 0x008d03c0, 0x00000000 }, { 0x01600038, 0x21a003bd, 0x008d03e0, 0x00000000 }, { 0x0060005a, 0x23c077bd, 0x000000c0, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x000000c0, 0x008d0080 }, { 0x00600041, 0x284077bd, 0x008d03c0, 0x008d0180 }, { 0x00600041, 0x286077bd, 0x008d03e0, 0x008d01a0 }, { 0x0060005a, 0x23c077bd, 0x000000d0, 0x008d0040 }, { 0x0060005a, 0x23e077bd, 0x000000d0, 0x008d0080 }, { 0x00600041, 0x288077bd, 0x008d03c0, 0x008d0180 }, { 0x00600041, 0x28a077bd, 0x008d03e0, 0x008d01a0 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_ca_srcalpha.g6b0000664000175000017500000000033412244635610021727 00000000000000 { 0x00800041, 0x21c077bd, 0x008d02c0, 0x008d0280 }, { 0x00800041, 0x220077bd, 0x008d0300, 0x008d0280 }, { 0x00800041, 0x224077bd, 0x008d0340, 0x008d0280 }, { 0x00800041, 0x228077bd, 0x008d0380, 0x008d0280 }, xf86-video-intel-2.99.917/src/render_program/exa_sf.g5a0000664000175000017500000000566212244635610017403 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Keith Packard * Eric Anholt * */ /* * Inputs (note all sub-register addresses are bytes, not float indices) * * Note that the vertices will have been reordered: * * V0 is topmost (leftmost among topmost) (upper left) * V1 is next clockwise (lower right) * V2 is remaining (lower left) * * V0 ...................... XX * | . * | . * | . * V2------------------------V1 * * G0 thread state -- just pass along * * G1 and G2 are fixed by SF spec * * G1.0 reserved * G1.4 Provoking vertex * G1.8 Determinant * G1.12 X1 - X0 * G1.16 X2 - X0 * G1.20 Y1 - Y0 * G1.24 Y2 - Y0 * G1.30 reserved * * G2.0 Z0 * G2.4 1/W0 * G2.8 Z1 * G2.12 1/W1 * G2.16 Z2 * G2.20 1/W2 * G2.24 reserved * G2.30 reserved * * G3 is V0 Vertex Attribute Data from URB (upper left) * * G3.0 u0 * G3.4 v0 * * G4 is V1 Vertex Attribute Data from URB (lower right) * * G4.0 u1 * G4.4 v1 * * G5 is V2 Vertex Attribute Data from URB (lower left) * */ /* Compute inverses of the input deltas */ send (4) 0 g6<1>F g1.12<4,4,1>F math inv mlen 1 rlen 1 { align1 }; /* texture location at V0 */ mov (4) m3<1>F g3<4,4,1>F { align1 }; /* compute V1 - V2 (motion in X) for texture coordinates */ add (4) g7<1>F g4<4,4,1>F -g5<4,4,1>F { align1 }; /* multiply by 1/dx */ mul (4) m1<1>F g7<4,4,1>F g6.0<0,1,0>F { align1 }; /* Compute V2 - V0 (motion in Y) for texture coordinates */ add (4) g7<1>F g5<4,4,1>F -g3<4,4,1>F { align1 }; /* multiply by 1/dy */ mul (4) m2<1>F g7<4,4,1>F g6.8<0,1,0>F {align1 }; /* and we're done */ send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT }; xf86-video-intel-2.99.917/src/render_program/exa_wm_ca_srcalpha.g4b0000664000175000017500000000033412202250410021706 00000000000000 { 0x00802041, 0x21c077bd, 0x008d02c0, 0x008d0280 }, { 0x00802041, 0x220077bd, 0x008d0300, 0x008d0280 }, { 0x00802041, 0x224077bd, 0x008d0340, 0x008d0280 }, { 0x00802041, 0x228077bd, 0x008d0380, 0x008d0280 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_affine.g4b.gen50000664000175000017500000000067012202250410022405 00000000000000 { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x204077be, 0x008d03c0, 0x0000006c }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x208077be, 0x008d03c0, 0x0000007c }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_projective.g4b.gen50000664000175000017500000000156012202250410023326 00000000000000 { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000080 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000084 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x0000008c }, { 0x00600031, 0x21801fbd, 0x108d03c0, 0x02100001 }, { 0x00600031, 0x21a01fbd, 0x108d03e0, 0x02100001 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000060 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000064 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x0000006c }, { 0x00802041, 0x204077be, 0x008d03c0, 0x008d0180 }, { 0x00802041, 0x23c077bd, 0x008d0100, 0x00000070 }, { 0x00802041, 0x238077bd, 0x008d0140, 0x00000074 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x008d0380 }, { 0x00802040, 0x23c077bd, 0x008d03c0, 0x0000007c }, { 0x00802041, 0x208077be, 0x008d03c0, 0x008d0180 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_affine.g4a0000664000175000017500000000306312202250410021546 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Fragment to compute src u/v values under an affine transform */ include(`exa_wm.g4i') define(`du_dx', `src_du_dx') define(`du_dy', `src_du_dy') define(`uo', `src_uo') define(`dv_dx', `src_dv_dx') define(`dv_dy', `src_dv_dy') define(`vo', `src_vo') define(`u', `src_u') define(`v', `src_v') include(`exa_wm_affine.g4i') xf86-video-intel-2.99.917/src/render_program/exa_wm_src_projective.g7a0000664000175000017500000000442012400044327022501 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* * Fragment to compute src u/v values */ include(`exa_wm.g4i') define(`u', `g66') define(`ul', `g66') define(`uh', `g67') define(`v', `g68') define(`vl', `g68') define(`vh', `g69') define(`w', `src_w') define(`wl', `src_w_0') define(`wh', `src_w_1') define(`bl', `g2.0<8,8,1>F') define(`bh', `g4.0<8,8,1>F') define(`a0_a_x',`g6.0<0,1,0>F') define(`a0_a_y',`g6.16<0,1,0>F') define(`a0_a_z',`g7.0<0,1,0>F') /* W */ pln (8) temp_x_0<1>F a0_a_z bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_z bh { align1 }; /* pixel 8-15 */ math (8) wl<1>F temp_x_0<8,8,1>F null inv { align1 }; math (8) wh<1>F temp_x_1<8,8,1>F null inv { align1 }; /* U */ pln (8) temp_x_0<1>F a0_a_x bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_x bh { align1 }; /* pixel 8-15 */ mul (8) ul<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; mul (8) uh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; /* V */ pln (8) temp_x_0<1>F a0_a_y bl { align1 }; /* pixel 0-7 */ pln (8) temp_x_1<1>F a0_a_y bh { align1 }; /* pixel 8-15 */ mul (8) vl<1>F temp_x_0<8,8,1>F wl<8,8,1>F { align1 }; mul (8) vh<1>F temp_x_1<8,8,1>F wh<8,8,1>F { align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_sample_planar.g4i0000664000175000017500000000526112244635610022316 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface in planar format */ /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load r */ mov (1) g0.8<1>UD 0x0000e000UD { align1 mask_disable }; /* src_msg will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ /* sample Y */ mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ send (16) src_msg_ind /* msg reg index */ src_sample_g<1>UW /* readback */ null sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ /* sample U (Cr) */ send (16) src_msg_ind /* msg reg index */ src_sample_r<1>UW /* readback */ null sampler (3,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ /* sample V (Cb) */ send (16) src_msg_ind /* msg reg index */ src_sample_b<1>UW /* readback */ null sampler (5,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_argb.g4a0000664000175000017500000000402312244635610022752 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the mask surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load argb */ mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; mov (8) mask_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* mask_msg will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) mask_msg_ind /* msg reg index */ mask_sample_base<1>UW /* readback */ null sampler (2,1,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_affine.g5b0000664000175000017500000000033412244635610021731 00000000000000 { 0x00802059, 0x200077bc, 0x000000a0, 0x008d0100 }, { 0x00802048, 0x210077be, 0x000000a4, 0x008d0140 }, { 0x00802059, 0x200077bc, 0x000000b0, 0x008d0100 }, { 0x00802048, 0x214077be, 0x000000b4, 0x008d0140 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_a.g7a0000664000175000017500000000400512244635610022262 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the mask surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load only alpha */ mov (1) g0.8<1>UD 0x00007000UD { align1 mask_disable }; mov (8) g71<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* g71 will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) 71 /* msg reg index */ mask_sample_a_01<1>UW /* readback */ null sampler (2,1,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_a.g4b0000664000175000017500000000024512244635610022262 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, { 0x00600001, 0x20e00022, 0x008d0000, 0x00000000 }, { 0x07800031, 0x23801c09, 0x00000000, 0x02520102 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g5a0000664000175000017500000000357712244635610022624 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load argb */ mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; /* src_msg will be copied with g0, as it contains send desc */ send (16) src_msg_ind /* msg reg index */ src_sample_base<1>UW /* readback */ g0<8,8,1>UW sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 8 { align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_planar.g4b.gen50000664000175000017500000000042312244635610024006 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x0000e000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x01800031, 0x22001c09, 0x20000000, 0x0a2a0001 }, { 0x01800031, 0x21c01c09, 0x20000000, 0x0a2a0003 }, { 0x01800031, 0x22401c09, 0x20000000, 0x0a2a0005 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_ca.g4a0000664000175000017500000000335712202250410020040 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Composite src and mask together, no component alpha */ include(`exa_wm.g4i') /* mul mask rgba channels to src */ mul (16) src_sample_r_01<1>F src_sample_r_01<8,8,1>F mask_sample_r_01<8,8,1>F { compr align1 }; mul (16) src_sample_g_01<1>F src_sample_g_01<8,8,1>F mask_sample_g_01<8,8,1>F { compr align1 }; mul (16) src_sample_b_01<1>F src_sample_b_01<8,8,1>F mask_sample_b_01<8,8,1>F { compr align1 }; mul (16) src_sample_a_01<1>F src_sample_a_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_yuv_rgb.g7a0000664000175000017500000000631612202250410021133 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Keith Packard * Eric Anholt * */ include(`exa_wm.g4i') define(`YCbCr_base', `src_sample_base') define(`Cr', `src_sample_r') define(`Cr_01', `src_sample_r_01') define(`Cr_23', `src_sample_r_23') define(`Y', `src_sample_g') define(`Y_01', `src_sample_g_01') define(`Y_23', `src_sample_g_23') define(`Cb', `src_sample_b') define(`Cb_01', `src_sample_b_01') define(`Cb_23', `src_sample_b_23') define(`Crn', `mask_sample_r') define(`Crn_01', `mask_sample_r_01') define(`Crn_23', `mask_sample_r_23') define(`Yn', `mask_sample_g') define(`Yn_01', `mask_sample_g_01') define(`Yn_23', `mask_sample_g_23') define(`Cbn', `mask_sample_b') define(`Cbn_01', `mask_sample_b_01') define(`Cbn_23', `mask_sample_b_23') /* color space conversion function: * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) */ /* Normalize Y, Cb and Cr: * * Yn = (Y - 16/255) * 1.164 * Crn = Cr - 128 / 255 * Cbn = Cb - 128 / 255 */ add (16) Yn<1>F Y<8,8,1>F -0.0627451F { compr align1 }; mul (16) Yn<1>F Yn<8,8,1>F 1.164F { compr align1 }; add (16) Crn<1>F Cr<8,8,1>F -0.501961F { compr align1 }; add (16) Cbn<1>F Cb<8,8,1>F -0.501961F { compr align1 }; /* * R = Y + Cr * 1.596 */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac.sat(16) src_sample_r<1>F Crn<8,8,1>F 1.596F { compr align1 }; /* * G = Crn * -0.813 + Cbn * -0.392 + Y */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac (16) acc0<1>F Crn<8,8,1>F -0.813F { compr align1 }; mac.sat(16) src_sample_g<1>F Cbn<8,8,1>F -0.392F { compr align1 }; /* * B = Cbn * 2.017 + Y */ mov (16) acc0<1>F Yn<8,8,1>F { compr align1 }; mac.sat(16) src_sample_b<1>F Cbn<8,8,1>F 2.017F { compr align1 }; /* * A = 1.0 */ mov (16) src_sample_a<1>F 1.0F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g4b.gen50000664000175000017500000000173612202250410021444 00000000000000 { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, { 0x00600001, 0x206003be, 0x008d0200, 0x00000000 }, { 0x00600001, 0x208003be, 0x008d0240, 0x00000000 }, { 0x00600001, 0x20a003be, 0x008d0280, 0x00000000 }, { 0x00601001, 0x20c003be, 0x008d01e0, 0x00000000 }, { 0x00601001, 0x20e003be, 0x008d0220, 0x00000000 }, { 0x00601001, 0x210003be, 0x008d0260, 0x00000000 }, { 0x00601001, 0x212003be, 0x008d02a0, 0x00000000 }, { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 }, { 0x00800031, 0x24001d28, 0x548d0000, 0x94084800 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 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@localstatedir@ mandir = @mandir@ mkdir_p = @mkdir_p@ moduledir = @moduledir@ oldincludedir = @oldincludedir@ pdfdir = @pdfdir@ prefix = @prefix@ program_transform_name = @program_transform_name@ psdir = @psdir@ sbindir = @sbindir@ sharedstatedir = @sharedstatedir@ srcdir = @srcdir@ sysconfdir = @sysconfdir@ target_alias = @target_alias@ top_build_prefix = @top_build_prefix@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ INTEL_G4A = \ exa_sf.g4a \ exa_sf_mask.g4a \ exa_wm_src_affine.g4a \ exa_wm_src_projective.g4a \ exa_wm_src_sample_argb.g4a \ exa_wm_src_sample_a.g4a \ exa_wm_src_sample_planar.g4a \ exa_wm_mask_affine.g4a \ exa_wm_mask_projective.g4a \ exa_wm_mask_sample_argb.g4a \ exa_wm_mask_sample_a.g4a \ exa_wm_noca.g4a \ exa_wm_ca.g4a \ exa_wm_ca_srcalpha.g4a \ exa_wm_write.g4a \ exa_wm_yuv_rgb.g4a \ exa_wm_xy.g4a \ $(NULL) INTEL_G4I = \ exa_wm.g4i \ exa_wm_affine.g4i \ exa_wm_projective.g4i \ exa_wm_sample_planar.g4i \ exa_wm_src_sample_argb.g4i \ $(NULL) INTEL_G4B = \ exa_sf.g4b \ exa_sf_mask.g4b \ exa_wm_src_affine.g4b \ exa_wm_src_projective.g4b \ exa_wm_src_sample_argb.g4b \ exa_wm_src_sample_a.g4b \ exa_wm_src_sample_planar.g4b \ exa_wm_mask_affine.g4b \ exa_wm_mask_projective.g4b \ exa_wm_mask_sample_argb.g4b \ exa_wm_mask_sample_a.g4b \ exa_wm_noca.g4b \ exa_wm_ca.g4b \ exa_wm_ca_srcalpha.g4b \ exa_wm_write.g4b \ exa_wm_yuv_rgb.g4b \ exa_wm_xy.g4b \ $(NULL) INTEL_G4B_GEN5 = \ exa_sf.g4b.gen5 \ exa_sf_mask.g4b.gen5 \ exa_wm_src_affine.g4b.gen5 \ exa_wm_src_projective.g4b.gen5 \ exa_wm_src_sample_argb.g4b.gen5 \ exa_wm_src_sample_a.g4b.gen5 \ exa_wm_src_sample_planar.g4b.gen5 \ exa_wm_mask_affine.g4b.gen5 \ exa_wm_mask_projective.g4b.gen5 \ exa_wm_mask_sample_argb.g4b.gen5 \ exa_wm_mask_sample_a.g4b.gen5 \ exa_wm_noca.g4b.gen5 \ exa_wm_ca.g4b.gen5 \ exa_wm_ca_srcalpha.g4b.gen5 \ exa_wm_write.g4b.gen5 \ exa_wm_yuv_rgb.g4b.gen5 \ exa_wm_xy.g4b.gen5 \ $(NULL) INTEL_G5A = \ exa_sf.g5a \ exa_sf_mask.g5a \ exa_wm_src_affine.g5a \ exa_wm_src_projective.g5a \ exa_wm_src_sample_argb.g5a \ exa_wm_src_sample_a.g5a \ exa_wm_src_sample_planar.g5a \ exa_wm_mask_affine.g5a \ exa_wm_mask_projective.g5a \ exa_wm_mask_sample_argb.g5a \ exa_wm_mask_sample_a.g5a \ exa_wm_noca.g5a \ exa_wm_ca.g5a \ exa_wm_ca_srcalpha.g5a \ exa_wm_write.g5a \ exa_wm_yuv_rgb.g5a \ exa_wm_xy.g5a \ $(NULL) INTEL_G5B = \ exa_sf.g5b \ exa_sf_mask.g5b \ exa_wm_src_affine.g5b \ exa_wm_src_projective.g5b \ exa_wm_src_sample_argb.g5b \ exa_wm_src_sample_a.g5b \ exa_wm_src_sample_planar.g5b \ exa_wm_mask_affine.g5b \ exa_wm_mask_projective.g5b \ exa_wm_mask_sample_argb.g5b \ exa_wm_mask_sample_a.g5b \ exa_wm_noca.g5b \ exa_wm_ca.g5b \ exa_wm_ca_srcalpha.g5b \ exa_wm_write.g5b \ exa_wm_yuv_rgb.g5b \ exa_wm_xy.g5b \ $(NULL) INTEL_G6I = \ exa_wm_affine.g6i \ exa_wm_write.g6i \ $(NULL) INTEL_G6A = \ exa_wm_src_affine.g6a \ exa_wm_src_projective.g6a \ exa_wm_src_sample_argb.g6a \ exa_wm_src_sample_planar.g6a \ exa_wm_src_sample_a.g6a \ exa_wm_mask_affine.g6a \ exa_wm_mask_projective.g6a \ exa_wm_mask_sample_argb.g6a \ exa_wm_mask_sample_a.g6a \ exa_wm_ca.g6a \ exa_wm_ca_srcalpha.g6a \ exa_wm_noca.g6a \ exa_wm_write.g6a \ exa_wm_yuv_rgb.g6a \ $(NULL) INTEL_G6B = \ exa_wm_src_affine.g6b \ exa_wm_src_projective.g6b \ exa_wm_src_sample_argb.g6b \ exa_wm_src_sample_planar.g6b \ exa_wm_src_sample_a.g6b \ exa_wm_mask_affine.g6b \ exa_wm_mask_projective.g6b \ exa_wm_mask_sample_argb.g6b \ exa_wm_mask_sample_a.g6b \ exa_wm_ca.g6b \ exa_wm_ca_srcalpha.g6b \ exa_wm_noca.g6b \ exa_wm_write.g6b \ exa_wm_yuv_rgb.g6b \ $(NULL) INTEL_G7A = \ exa_wm_mask_affine.g7a \ exa_wm_mask_projective.g7a \ exa_wm_mask_sample_a.g7a \ exa_wm_mask_sample_argb.g7a \ exa_wm_src_affine.g7a \ exa_wm_src_projective.g7a \ exa_wm_src_sample_a.g7a \ exa_wm_src_sample_argb.g7a \ exa_wm_src_sample_planar.g7a \ exa_wm_write.g7a \ exa_wm_yuv_rgb.g7a \ $(NULL) INTEL_G7B = \ exa_wm_mask_affine.g7b \ exa_wm_mask_projective.g7b \ exa_wm_mask_sample_a.g7b \ exa_wm_mask_sample_argb.g7b \ exa_wm_src_affine.g7b \ exa_wm_src_projective.g7b \ exa_wm_src_sample_a.g7b \ exa_wm_src_sample_argb.g7b \ exa_wm_src_sample_planar.g7b \ exa_wm_write.g7b \ exa_wm_yuv_rgb.g7b \ $(NULL) INTEL_G8A = \ exa_wm_src_affine.g8a \ exa_wm_src_sample_argb.g8a \ exa_wm_src_sample_planar.g8a \ exa_wm_write.g8a \ exa_wm_yuv_rgb.g8a \ $(NULL) INTEL_G8B = \ exa_wm_src_affine.g8b \ exa_wm_src_sample_argb.g8b \ exa_wm_src_sample_planar.g8b \ exa_wm_write.g8b \ exa_wm_yuv_rgb.g8b \ $(NULL) EXTRA_DIST = \ $(INTEL_G4A) \ $(INTEL_G4I) \ $(INTEL_G4B) \ $(INTEL_G4B_GEN5)\ $(INTEL_G5A) \ $(INTEL_G5B) \ $(INTEL_G6A) \ $(INTEL_G6B) \ $(INTEL_G6I) \ $(INTEL_G7A) \ $(INTEL_G7B) \ $(INTEL_G8A) \ $(INTEL_G8B) @HAVE_GEN4ASM_TRUE@SUFFIXES = .g4a .g4b .g5a .g5b .g6a .g6b .g7a .g7b .g8b @HAVE_GEN4ASM_TRUE@BUILT_SOURCES = $(INTEL_G4B) $(INTEL_G4B_GEN5) $(INTEL_G5B) $(INTEL_G6B) $(INTEL_G7B) $(INTEL_G8B) all: $(BUILT_SOURCES) $(MAKE) $(AM_MAKEFLAGS) all-am .SUFFIXES: .SUFFIXES: .g4a .g4b .g5a .g5b .g6a .g6b .g7a .g7b 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@HAVE_GEN4ASM_TRUE@$(INTEL_G6B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G6I) @HAVE_GEN4ASM_TRUE@$(INTEL_G7B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G6I) @HAVE_GEN4ASM_TRUE@$(INTEL_G8B): $(INTEL_GEN4ASM) $(INTEL_G4I) $(INTEL_G6I) @HAVE_GEN4ASM_TRUE@clean-local: @HAVE_GEN4ASM_TRUE@ -rm -f $(BUILT_SOURCES) # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g4b0000664000175000017500000000173612202250410020607 00000000000000 { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, { 0x00600001, 0x206003be, 0x008d0200, 0x00000000 }, { 0x00600001, 0x208003be, 0x008d0240, 0x00000000 }, { 0x00600001, 0x20a003be, 0x008d0280, 0x00000000 }, { 0x00601001, 0x20c003be, 0x008d01e0, 0x00000000 }, { 0x00601001, 0x20e003be, 0x008d0220, 0x00000000 }, { 0x00601001, 0x210003be, 0x008d0260, 0x00000000 }, { 0x00601001, 0x212003be, 0x008d02a0, 0x00000000 }, { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_a.g4a0000664000175000017500000000401612244635610022115 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the src surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load alpha */ mov (1) g0.8<1>UD 0x00007000UD { align1 mask_disable }; mov (8) src_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* src_msg will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) src_msg_ind /* msg reg index */ src_sample_a_01<1>UW /* readback */ null sampler (1,0,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_argb.g4b0000664000175000017500000000024512244635610022611 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00000000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x01800031, 0x21c01c09, 0x00000000, 0x02580001 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_affine.g4i0000664000175000017500000000353312202250410020711 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Fragment to compute src u/v values under an affine transform */ /********** Compute u *************/ mul (16) temp_x<1>F dst_x<8,8,1>F du_dx { compr align1 }; mul (16) temp_y<1>F dst_y<8,8,1>F du_dy { compr align1 }; add (16) temp_x<1>F temp_x<8,8,1>F temp_y<8,8,1>F { compr align1 }; add (16) u<1>F temp_x<8,8,1>F uo { compr align1 }; /********** Compute v *************/ mul (16) temp_x<1>F dst_x<8,8,1>F dv_dx { compr align1 }; mul (16) temp_y<1>F dst_y<8,8,1>F dv_dy { compr align1 }; add (16) temp_x<1>F temp_x<8,8,1>F temp_y<8,8,1>F { compr align1 }; add (16) v<1>F temp_x<8,8,1>F vo { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_sf_mask.g4b.gen50000664000175000017500000000147112202250410021226 00000000000000 { 0x00400031, 0x20c01fbd, 0x1069002c, 0x02100001 }, { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 }, { 0x00600040, 0x20e077bd, 0x008d0080, 0x008d40a0 }, { 0x00600041, 0x202077be, 0x008d00e0, 0x000000c0 }, { 0x00600040, 0x20e077bd, 0x008d00a0, 0x008d4060 }, { 0x00600041, 0x204077be, 0x008d00e0, 0x000000c8 }, { 0x00600031, 0x20001fbc, 0x648d0000, 0x8808c800 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_ca.g5a0000664000175000017500000000335712244635610020060 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Composite src and mask together, no component alpha */ include(`exa_wm.g4i') /* mul mask rgba channels to src */ mul (16) src_sample_r_01<1>F src_sample_r_01<8,8,1>F mask_sample_r_01<8,8,1>F { compr align1 }; mul (16) src_sample_g_01<1>F src_sample_g_01<8,8,1>F mask_sample_g_01<8,8,1>F { compr align1 }; mul (16) src_sample_b_01<1>F src_sample_b_01<8,8,1>F mask_sample_b_01<8,8,1>F { compr align1 }; mul (16) src_sample_a_01<1>F src_sample_a_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_noca.g6a0000664000175000017500000000336112202250410020372 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Composite src and mask together, no component alpha */ include(`exa_wm.g4i') /* mul mask's alpha channel to src */ mul (16) src_sample_r_01<1>F src_sample_r_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_g_01<1>F src_sample_g_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_b_01<1>F src_sample_b_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; mul (16) src_sample_a_01<1>F src_sample_a_01<8,8,1>F mask_sample_a_01<8,8,1>F { compr align1 }; xf86-video-intel-2.99.917/src/render_program/exa_wm_src_affine.g7a0000664000175000017500000000271112244635610021567 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ /* * Fragment to compute src u/v values */ include(`exa_wm.g4i') define(`ul', `g66') define(`uh', `g67') define(`vl', `g68') define(`vh', `g69') define(`bl', `g2.0<8,8,1>F') define(`bh', `g4.0<8,8,1>F') define(`a0_a_x',`g6.0<0,1,0>F') define(`a0_a_y',`g6.16<0,1,0>F') include(`exa_wm_affine.g6i') xf86-video-intel-2.99.917/src/render_program/exa_wm.g4i0000664000175000017500000001104012202250410017371 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* * Input parameters */ /* Destination X/Y */ define(`dst_x_uw', `g1.8<2,4,0>UW') define(`dst_y_uw', `g1.10<2,4,0>UW') define(`screen_x0', `g1.0<0,1,0>F') define(`screen_y0', `g1.4<0,1,0>F') /* Source transformation parameters */ define(`src_du_dx', `g3.0<0,1,0>F') define(`src_du_dy', `g3.4<0,1,0>F') define(`src_uo', `g3.12<0,1,0>F') define(`src_dv_dx', `g3.16<0,1,0>F') define(`src_dv_dy', `g3.20<0,1,0>F') define(`src_vo', `g3.28<0,1,0>F') define(`src_dw_dx', `g4.0<0,1,0>F') define(`src_dw_dy', `g4.4<0,1,0>F') define(`src_wo', `g4.12<0,1,0>F') define(`mask_du_dx', `g5.0<0,1,0>F') define(`mask_du_dy', `g5.4<0,1,0>F') define(`mask_uo', `g5.12<0,1,0>F') define(`mask_dv_dx', `g5.16<0,1,0>F') define(`mask_dv_dy', `g5.20<0,1,0>F') define(`mask_vo', `g5.28<0,1,0>F') define(`mask_dw_dx', `g6.0<0,1,0>F') define(`mask_dw_dy', `g6.4<0,1,0>F') define(`mask_wo', `g6.12<0,1,0>F') /* * Local variables. Pairs must be aligned on even reg boundry */ /* this holds the X dest coordinates */ define(`dst_x', `g8') define(`dst_x_0', `dst_x') define(`dst_x_1', `g9') /* this holds the Y dest coordinates */ define(`dst_y', `g10') define(`dst_y_0', `dst_y') define(`dst_y_1', `g11') /* When computing x * dn/dx, use this */ define(`temp_x', `g30') define(`temp_x_0', `temp_x') define(`temp_x_1', `g31') /* When computing y * dn/dy, use this */ define(`temp_y', `g28') define(`temp_y_0', temp_y) define(`temp_y_1', `g29') /* when loading x/y, use these to hold them in UW format */ define(`temp_x_uw', temp_x) define(`temp_y_uw', temp_y) /* compute source and mask u/v to this pair to send to sampler */ define(`src_msg', `m1') define(`src_msg_ind',`1') define(`src_u', `m2') define(`src_v', `m4') define(`src_w', `g12') define(`src_w_0', `src_w') define(`src_w_1', `g13') define(`mask_msg', `m7') define(`mask_msg_ind',`7') define(`mask_u', `m8') define(`mask_v', `m10') define(`mask_w', `src_w') define(`mask_w_0', `src_w_0') define(`mask_w_1', `src_w_1') /* sample src to these registers */ define(`src_sample_base', `g14') define(`src_sample_r', `g14') define(`src_sample_r_01', `g14') define(`src_sample_r_23', `g15') define(`src_sample_g', `g16') define(`src_sample_g_01', `g16') define(`src_sample_g_23', `g17') define(`src_sample_b', `g18') define(`src_sample_b_01', `g18') define(`src_sample_b_23', `g19') define(`src_sample_a', `g20') define(`src_sample_a_01', `g20') define(`src_sample_a_23', `g21') /* sample mask to these registers */ define(`mask_sample_base', `g22') define(`mask_sample_r', `g22') define(`mask_sample_r_01', `g22') define(`mask_sample_r_23', `g23') define(`mask_sample_g', `g24') define(`mask_sample_g_01', `g24') define(`mask_sample_g_23', `g25') define(`mask_sample_b', `g26') define(`mask_sample_b_01', `g26') define(`mask_sample_b_23', `g27') define(`mask_sample_a', `g28') define(`mask_sample_a_01', `g28') define(`mask_sample_a_23', `g29') /* data port SIMD16 send registers */ define(`data_port_msg_0', `m0') define(`data_port_msg_0_ind', `0') define(`data_port_msg_1', `m1') define(`data_port_r_01', `m2') define(`data_port_g_01', `m3') define(`data_port_b_01', `m4') define(`data_port_a_01', `m5') define(`data_port_r_23', `m6') define(`data_port_g_23', `m7') define(`data_port_b_23', `m8') define(`data_port_a_23', `m9') xf86-video-intel-2.99.917/src/render_program/exa_wm_src_sample_a.g6b0000664000175000017500000000024512244635610022120 00000000000000 { 0x00000201, 0x20080061, 0x00000000, 0x00007000 }, { 0x00600001, 0x20200022, 0x008d0000, 0x00000000 }, { 0x02800031, 0x22801cc9, 0x00000020, 0x0a2a0001 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_argb.g6a0000664000175000017500000000402312244635610022754 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the mask surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load argb */ mov (1) g0.8<1>UD 0x00000000UD { align1 mask_disable }; mov (8) mask_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* mask_msg will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) mask_msg_ind /* msg reg index */ mask_sample_base<1>UW /* readback */ null sampler (2,1,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/render_program/exa_wm_write.g6i0000664000175000017500000000377612244635610020645 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ mov (8) slot_r_00<1>F src_sample_r_01<8,8,1>F { align1 }; mov (8) slot_r_01<1>F src_sample_r_23<8,8,1>F { align1 }; mov (8) slot_g_00<1>F src_sample_g_01<8,8,1>F { align1 }; mov (8) slot_g_01<1>F src_sample_g_23<8,8,1>F { align1 }; mov (8) slot_b_00<1>F src_sample_b_01<8,8,1>F { align1 }; mov (8) slot_b_01<1>F src_sample_b_23<8,8,1>F { align1 }; mov (8) slot_a_00<1>F src_sample_a_01<8,8,1>F { align1 }; mov (8) slot_a_01<1>F src_sample_a_23<8,8,1>F { align1 }; /* write */ send (16) data_port_msg_2_ind acc0<1>UW null write ( 0, /* binding_table */ 16, /* pixel scordboard clear, msg type simd16 single source */ 12, /* render target write */ 0, /* no write commit message */ 0 /* headerless render target write */ ) mlen 8 rlen 0 { align1 EOT }; nop; nop; nop; nop; nop; nop; nop; nop; xf86-video-intel-2.99.917/src/render_program/exa_wm_xy.g4b0000664000175000017500000000033412202250410020106 00000000000000 { 0x00800040, 0x23c06d29, 0x00480028, 0x10101010 }, { 0x00800040, 0x23806d29, 0x0048002a, 0x11001100 }, { 0x00802040, 0x2100753d, 0x008d03c0, 0x00004020 }, { 0x00802040, 0x2140753d, 0x008d0380, 0x00004024 }, xf86-video-intel-2.99.917/src/render_program/exa_wm_mask_sample_a.g4a0000664000175000017500000000403112244635610022256 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Wang Zhenyu * Keith Packard */ /* Sample the mask surface */ include(`exa_wm.g4i') /* prepare sampler read back gX register, which would be written back to output */ /* use simd16 sampler, param 0 is u, param 1 is v. */ /* 'payload' loading, assuming tex coord start from g4 */ /* load only alpha */ mov (1) g0.8<1>UD 0x00007000UD { align1 mask_disable }; mov (8) mask_msg<1>UD g0<8,8,1>UD { align1 }; /* copy to msg start reg*/ /* mask_msg will be copied with g0, as it contains send desc */ /* emit sampler 'send' cmd */ send (16) mask_msg_ind /* msg reg index */ mask_sample_a_01<1>UW /* readback */ null sampler (2,1,F) /* sampler message description, (binding_table,sampler_index,datatype) /* here(src->dst) we should use src_sampler and src_surface */ mlen 5 rlen 2 { align1 }; /* required message len 5, readback len 8 */ xf86-video-intel-2.99.917/src/backlight.h0000664000175000017500000000404012432737457014633 00000000000000/*************************************************************************** Copyright 2014 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifndef BACKLIGHT_H #define BACKLIGHT_H enum backlight_type { BL_NONE = -1, BL_PLATFORM, BL_FIRMWARE, BL_RAW, BL_NAMED, }; struct backlight { char *iface; enum backlight_type type; int max; int has_power; int pid, fd; }; enum backlight_type backlight_exists(const char *iface); void backlight_init(struct backlight *backlight); int backlight_open(struct backlight *backlight, char *iface); int backlight_set(struct backlight *backlight, int level); int backlight_get(struct backlight *backlight); int backlight_on(struct backlight *b); int backlight_off(struct backlight *b); void backlight_disable(struct backlight *backlight); void backlight_close(struct backlight *backlight); struct pci_device; char *backlight_find_for_device(struct pci_device *pci); #endif /* BACKLIGHT_H */ xf86-video-intel-2.99.917/src/intel_module.c0000664000175000017500000004420312432737457015363 00000000000000/* * Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. * All Rights Reserved. * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(1,6,99,0,0) #include #endif #include "intel_driver.h" #include "intel_options.h" #include "legacy/legacy.h" #include "sna/sna_module.h" #include "uxa/uxa_module.h" #include "i915_pciids.h" /* copied from (kernel) include/drm/i915_pciids.h */ #ifdef XSERVER_PLATFORM_BUS #include #endif #ifndef XF86_ALLOCATE_GPU_SCREEN #define XF86_ALLOCATE_GPU_SCREEN 0 #endif static const struct intel_device_info intel_generic_info = { .gen = -1, }; static const struct intel_device_info intel_i81x_info = { .gen = 010, }; static const struct intel_device_info intel_i830_info = { .gen = 020, }; static const struct intel_device_info intel_i845_info = { .gen = 020, }; static const struct intel_device_info intel_i855_info = { .gen = 021, }; static const struct intel_device_info intel_i865_info = { .gen = 022, }; static const struct intel_device_info intel_i915_info = { .gen = 030, }; static const struct intel_device_info intel_i945_info = { .gen = 031, }; static const struct intel_device_info intel_g33_info = { .gen = 033, }; static const struct intel_device_info intel_i965_info = { .gen = 040, }; static const struct intel_device_info intel_g4x_info = { .gen = 045, }; static const struct intel_device_info intel_ironlake_info = { .gen = 050, }; static const struct intel_device_info intel_sandybridge_info = { .gen = 060, }; static const struct intel_device_info intel_ivybridge_info = { .gen = 070, }; static const struct intel_device_info intel_valleyview_info = { .gen = 071, }; static const struct intel_device_info intel_haswell_info = { .gen = 075, }; static const struct intel_device_info intel_broadwell_info = { .gen = 0100, }; static const struct intel_device_info intel_cherryview_info = { .gen = 0101, }; static const struct intel_device_info intel_skylake_info = { .gen = 0110, }; static const SymTabRec intel_chipsets[] = { {PCI_CHIP_I810, "i810"}, {PCI_CHIP_I810_DC100, "i810-dc100"}, {PCI_CHIP_I810_E, "i810e"}, {PCI_CHIP_I815, "i815"}, {PCI_CHIP_I830_M, "i830M"}, {PCI_CHIP_845_G, "845G"}, {PCI_CHIP_I854, "854"}, {PCI_CHIP_I855_GM, "852GM/855GM"}, {PCI_CHIP_I865_G, "865G"}, {PCI_CHIP_I915_G, "915G"}, {PCI_CHIP_E7221_G, "E7221 (i915)"}, {PCI_CHIP_I915_GM, "915GM"}, {PCI_CHIP_I945_G, "945G"}, {PCI_CHIP_I945_GM, "945GM"}, {PCI_CHIP_I945_GME, "945GME"}, {PCI_CHIP_PINEVIEW_M, "Pineview GM"}, {PCI_CHIP_PINEVIEW_G, "Pineview G"}, {PCI_CHIP_I965_G, "965G"}, {PCI_CHIP_G35_G, "G35"}, {PCI_CHIP_I965_Q, "965Q"}, {PCI_CHIP_I946_GZ, "946GZ"}, {PCI_CHIP_I965_GM, "965GM"}, {PCI_CHIP_I965_GME, "965GME/GLE"}, {PCI_CHIP_G33_G, "G33"}, {PCI_CHIP_Q35_G, "Q35"}, {PCI_CHIP_Q33_G, "Q33"}, {PCI_CHIP_GM45_GM, "GM45"}, {PCI_CHIP_G45_E_G, "4 Series"}, {PCI_CHIP_G45_G, "G45/G43"}, {PCI_CHIP_Q45_G, "Q45/Q43"}, {PCI_CHIP_G41_G, "G41"}, {PCI_CHIP_B43_G, "B43"}, {PCI_CHIP_B43_G1, "B43"}, {0, ""}, {PCI_CHIP_IRONLAKE_D_G, "HD Graphics"}, {PCI_CHIP_IRONLAKE_M_G, "HD Graphics"}, {PCI_CHIP_SANDYBRIDGE_GT1, "HD Graphics 2000" }, {PCI_CHIP_SANDYBRIDGE_GT2, "HD Graphics 3000" }, {PCI_CHIP_SANDYBRIDGE_GT2_PLUS, "HD Graphics 3000" }, {PCI_CHIP_SANDYBRIDGE_M_GT1, "HD Graphics 2000" }, {PCI_CHIP_SANDYBRIDGE_M_GT2, "HD Graphics 3000" }, {PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, "HD Graphics 3000" }, {PCI_CHIP_SANDYBRIDGE_S_GT, "HD Graphics" }, {PCI_CHIP_IVYBRIDGE_M_GT1, "HD Graphics 2500" }, {PCI_CHIP_IVYBRIDGE_M_GT2, "HD Graphics 4000" }, {PCI_CHIP_IVYBRIDGE_D_GT1, "HD Graphics 2500" }, {PCI_CHIP_IVYBRIDGE_D_GT2, "HD Graphics 4000" }, {PCI_CHIP_IVYBRIDGE_S_GT1, "HD Graphics" }, {PCI_CHIP_IVYBRIDGE_S_GT2, "HD Graphics P4000" }, {PCI_CHIP_HASWELL_D_GT1, "HD Graphics" }, {PCI_CHIP_HASWELL_D_GT2, "HD Graphics 4600" }, {PCI_CHIP_HASWELL_D_GT3, "HD Graphics 5000" }, /* ??? */ {PCI_CHIP_HASWELL_M_GT1, "HD Graphics" }, {PCI_CHIP_HASWELL_M_GT2, "HD Graphics 4600" }, {PCI_CHIP_HASWELL_M_GT3, "HD Graphics 5000" }, /* ??? */ {PCI_CHIP_HASWELL_S_GT1, "HD Graphics" }, {PCI_CHIP_HASWELL_S_GT2, "HD Graphics P4600/P4700" }, {PCI_CHIP_HASWELL_S_GT3, "HD Graphics 5000" }, /* ??? */ {PCI_CHIP_HASWELL_B_GT1, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_B_GT2, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_B_GT3, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_E_GT1, "HD Graphics" }, {PCI_CHIP_HASWELL_E_GT2, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_E_GT3, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_ULT_D_GT1, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_ULT_D_GT2, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_ULT_D_GT3, "Iris(TM) Graphics 5100" }, {PCI_CHIP_HASWELL_ULT_M_GT1, "HD Graphics" }, {PCI_CHIP_HASWELL_ULT_M_GT2, "HD Graphics 4400" }, {PCI_CHIP_HASWELL_ULT_M_GT3, "HD Graphics 5000" }, {PCI_CHIP_HASWELL_ULT_S_GT1, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_ULT_S_GT2, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_ULT_S_GT3, "Iris(TM) Graphics 5100" }, {PCI_CHIP_HASWELL_ULT_B_GT1, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_ULT_B_GT2, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_ULT_B_GT3, "Iris(TM) Graphics 5100" }, {PCI_CHIP_HASWELL_ULT_E_GT1, "HD Graphics" }, {PCI_CHIP_HASWELL_ULT_E_GT2, "HD Graphics 4200" }, {PCI_CHIP_HASWELL_ULT_E_GT3, "Iris(TM) Graphics 5100" }, {PCI_CHIP_HASWELL_CRW_D_GT1, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_CRW_D_GT2, "HD Graphics 4600" }, {PCI_CHIP_HASWELL_CRW_D_GT3, "Iris(TM) Pro Graphics 5200" }, {PCI_CHIP_HASWELL_CRW_M_GT1, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_CRW_M_GT2, "HD Graphics 4600" }, {PCI_CHIP_HASWELL_CRW_M_GT3, "Iris(TM) Pro Graphics 5200" }, {PCI_CHIP_HASWELL_CRW_S_GT1, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_CRW_S_GT2, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_CRW_S_GT3, "Iris(TM) Pro Graphics 5200" }, {PCI_CHIP_HASWELL_CRW_B_GT1, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_CRW_B_GT2, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_CRW_B_GT3, "Iris(TM) Pro Graphics 5200" }, {PCI_CHIP_HASWELL_CRW_E_GT1, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_CRW_E_GT2, "HD Graphics" }, /* ??? */ {PCI_CHIP_HASWELL_CRW_E_GT3, "Iris(TM) Pro Graphics 5200" }, /* Valleyview (Baytail) */ {0x0f30, "HD Graphics"}, {0x0f31, "HD Graphics"}, {0x0f32, "HD Graphics"}, {0x0f33, "HD Graphics"}, {0x0155, "HD Graphics"}, {0x0157, "HD Graphics"}, /* Broadwell Marketing names */ {0x1602, "HD graphics"}, {0x1606, "HD graphics"}, {0x160B, "HD graphics"}, {0x160A, "HD graphics"}, {0x160D, "HD graphics"}, {0x160E, "HD graphics"}, {0x1612, "HD graphics 5600"}, {0x1616, "HD graphics 5500"}, {0x161B, "HD graphics"}, {0x161A, "HD graphics"}, {0x161D, "HD graphics"}, {0x161E, "HD graphics 5300"}, {0x1622, "Iris Pro graphics 6200"}, {0x1626, "HD graphics 6000"}, {0x162B, "Iris graphics 6100"}, {0x162A, "Iris Pro graphics P6300"}, {0x162D, "HD graphics"}, {0x162E, "HD graphics"}, {0x1632, "HD graphics"}, {0x1636, "HD graphics"}, {0x163B, "HD graphics"}, {0x163A, "HD graphics"}, {0x163D, "HD graphics"}, {0x163E, "HD graphics"}, /* When adding new identifiers, also update: * 1. intel_identify() * 2. man/intel.man * 3. README */ {-1, NULL} /* Sentinel */ }; static const struct pci_id_match intel_device_match[] = { #if UMS INTEL_VGA_DEVICE(PCI_CHIP_I810, &intel_i81x_info), INTEL_VGA_DEVICE(PCI_CHIP_I810_DC100, &intel_i81x_info), INTEL_VGA_DEVICE(PCI_CHIP_I810_E, &intel_i81x_info), INTEL_VGA_DEVICE(PCI_CHIP_I815, &intel_i81x_info), #endif #if KMS INTEL_I830_IDS(&intel_i830_info), INTEL_I845G_IDS(&intel_i845_info), INTEL_I85X_IDS(&intel_i855_info), INTEL_I865G_IDS(&intel_i865_info), INTEL_I915G_IDS(&intel_i915_info), INTEL_I915GM_IDS(&intel_i915_info), INTEL_I945G_IDS(&intel_i945_info), INTEL_I945GM_IDS(&intel_i945_info), INTEL_G33_IDS(&intel_g33_info), INTEL_PINEVIEW_IDS(&intel_g33_info), INTEL_I965G_IDS(&intel_i965_info), INTEL_I965GM_IDS(&intel_i965_info), INTEL_G45_IDS(&intel_g4x_info), INTEL_GM45_IDS(&intel_g4x_info), INTEL_IRONLAKE_D_IDS(&intel_ironlake_info), INTEL_IRONLAKE_M_IDS(&intel_ironlake_info), INTEL_SNB_D_IDS(&intel_sandybridge_info), INTEL_SNB_M_IDS(&intel_sandybridge_info), INTEL_IVB_D_IDS(&intel_ivybridge_info), INTEL_IVB_M_IDS(&intel_ivybridge_info), INTEL_HSW_D_IDS(&intel_haswell_info), INTEL_HSW_M_IDS(&intel_haswell_info), INTEL_VLV_D_IDS(&intel_valleyview_info), INTEL_VLV_M_IDS(&intel_valleyview_info), INTEL_BDW_D_IDS(&intel_broadwell_info), INTEL_BDW_M_IDS(&intel_broadwell_info), INTEL_CHV_IDS(&intel_cherryview_info), INTEL_SKL_IDS(&intel_skylake_info), INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info), #endif { 0, 0, 0 }, }; void intel_detect_chipset(ScrnInfoPtr scrn, struct intel_device *dev) { int devid; const char *name = NULL; int i; if (dev == NULL) { EntityInfoPtr ent; struct pci_device *pci; ent = xf86GetEntityInfo(scrn->entityList[0]); if (ent->device->chipID >= 0) { xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n", ent->device->chipID); devid = ent->device->chipID; } else { pci = xf86GetPciInfoForEntity(ent->index); if (pci) devid = pci->device_id; else devid = ~0; } } else devid = intel_get_device_id(dev); for (i = 0; intel_chipsets[i].name != NULL; i++) { if (devid == intel_chipsets[i].token) { name = intel_chipsets[i].name; break; } } if (name == NULL) { int gen = 0; for (i = 0; intel_device_match[i].device_id != 0; i++) { if (devid == intel_device_match[i].device_id) { const struct intel_device_info *info = (void *)intel_device_match[i].match_data; gen = info->gen >> 3; break; } } if (gen) { xf86DrvMsg(scrn->scrnIndex, X_PROBED, "gen%d engineering sample\n", gen); } else { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "Unknown chipset\n"); } name = "unknown"; } else { xf86DrvMsg(scrn->scrnIndex, X_PROBED, "Integrated Graphics Chipset: Intel(R) %s\n", name); } scrn->chipset = (char *)name; } /* * intel_identify -- * * Returns the string name for the driver based on the chipset. * */ static void intel_identify(int flags) { const SymTabRec *chipset; const char *stack[64], **unique; int i, j, size, len; unique = stack; size = sizeof(stack)/sizeof(stack[0]); i = 0; xf86Msg(X_INFO, INTEL_NAME ": Driver for Intel(R) Integrated Graphics Chipsets:\n\t"); len = 8; for (chipset = intel_chipsets; chipset->token; chipset++) { for (j = i; --j >= 0;) if (strcmp(unique[j], chipset->name) == 0) break; if (j < 0) { int name_len = strlen(chipset->name); if (i != 0) { xf86ErrorF(","); len++; if (len + 2 + name_len < 78) { xf86ErrorF(" "); len++; } else { xf86ErrorF("\n\t"); len = 8; } } xf86ErrorF("%s", chipset->name); len += name_len; if (i == size) { const char **new_unique; if (unique == stack) new_unique = malloc(2*sizeof(*unique)*size); else new_unique = realloc(unique, 2*sizeof(*unique)*size); if (new_unique != NULL) { if (unique == stack) memcpy(new_unique, stack, sizeof(stack)); unique = new_unique; size *= 2; } } if (i < size) unique[i++] = chipset->name; } } xf86ErrorF("\n"); if (unique != stack) free(unique); xf86Msg(X_INFO, INTEL_NAME ": Driver for Intel(R) HD Graphics: 2000-6000\n"); xf86Msg(X_INFO, INTEL_NAME ": Driver for Intel(R) Iris(TM) Graphics: 5100, 6100\n"); xf86Msg(X_INFO, INTEL_NAME ": Driver for Intel(R) Iris(TM) Pro Graphics: 5200, 6200, P6300\n"); } static Bool intel_driver_func(ScrnInfoPtr pScrn, xorgDriverFuncOp op, pointer ptr) { xorgHWFlags *flag; switch (op) { case GET_REQUIRED_HW_INTERFACES: flag = (CARD32*)ptr; (*flag) = 0; #if UMS (*flag) = HW_IO | HW_MMIO; #endif #ifdef HW_SKIP_CONSOLE if (hosted()) (*flag) = HW_SKIP_CONSOLE; #endif return TRUE; #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,15,99,902,0) case SUPPORTS_SERVER_FDS: return TRUE; #endif default: /* Unknown or deprecated function */ return FALSE; } } #if KMS extern XF86ConfigPtr xf86configptr; static XF86ConfDevicePtr _xf86findDriver(const char *ident, XF86ConfDevicePtr p) { while (p) { if (p->dev_driver && xf86nameCompare(ident, p->dev_driver) == 0) return p; p = p->list.next; } return NULL; } static enum accel_method { NOACCEL, SNA, UXA } get_accel_method(void) { enum accel_method accel_method = DEFAULT_ACCEL_METHOD; XF86ConfDevicePtr dev; if (hosted()) return SNA; dev = _xf86findDriver("intel", xf86configptr->conf_device_lst); if (dev && dev->dev_option_lst) { const char *s; s = xf86FindOptionValue(dev->dev_option_lst, "AccelMethod"); if (s ) { if (strcasecmp(s, "none") == 0) accel_method = NOACCEL; else if (strcasecmp(s, "sna") == 0) accel_method = SNA; else if (strcasecmp(s, "uxa") == 0) accel_method = UXA; } } return accel_method; } #endif static Bool intel_scrn_create(DriverPtr driver, int entity_num, intptr_t match_data, unsigned flags) { ScrnInfoPtr scrn; if (match_data == 0) { int devid = intel_entity_get_devid(entity_num), i; if (devid == 0) return FALSE; for (i = 0; intel_device_match[i].device_id != 0; i++) { if (devid == intel_device_match[i].device_id) { match_data = (intptr_t)&intel_device_match[i]; break; } } if (match_data == 0) return FALSE; } scrn = xf86AllocateScreen(driver, flags); if (scrn == NULL) return FALSE; scrn->driverVersion = INTEL_VERSION; scrn->driverName = (char *)INTEL_DRIVER_NAME; scrn->name = (char *)INTEL_NAME; scrn->driverPrivate = (void *)(match_data | (flags & XF86_ALLOCATE_GPU_SCREEN) | 2); scrn->Probe = NULL; if (xf86IsEntitySharable(entity_num)) xf86SetEntityShared(entity_num); xf86AddEntityToScreen(scrn, entity_num); #if UMS if ((unsigned)((struct intel_device_info *)match_data)->gen < 020) return lg_i810_init(scrn); #endif #if KMS switch (get_accel_method()) { #if USE_SNA case NOACCEL: case SNA: return sna_init_scrn(scrn, entity_num); #endif #if USE_UXA #if !USE_SNA case NOACCEL: #endif case UXA: return intel_init_scrn(scrn); #endif default: break; } #endif return FALSE; } /* * intel_pci_probe -- * * Look through the PCI bus to find cards that are intel boards. * Setup the dispatch table for the rest of the driver functions. * */ static Bool intel_pci_probe(DriverPtr driver, int entity_num, struct pci_device *pci, intptr_t match_data) { if (intel_open_device(entity_num, pci, NULL) == -1) { #if UMS switch (pci->device_id) { case PCI_CHIP_I810: case PCI_CHIP_I810_DC100: case PCI_CHIP_I810_E: case PCI_CHIP_I815: if (!hosted()) break; default: return FALSE; } #else return FALSE; #endif } return intel_scrn_create(driver, entity_num, match_data, 0); } #ifdef XSERVER_PLATFORM_BUS static Bool intel_platform_probe(DriverPtr driver, int entity_num, int flags, struct xf86_platform_device *dev, intptr_t match_data) { unsigned scrn_flags = 0; if (intel_open_device(entity_num, dev->pdev, dev) == -1) return FALSE; /* Allow ourselves to act as a slaved output if not primary */ if (flags & PLATFORM_PROBE_GPU_SCREEN) { flags &= ~PLATFORM_PROBE_GPU_SCREEN; scrn_flags |= XF86_ALLOCATE_GPU_SCREEN; } /* if we get any flags we don't understand fail to probe for now */ if (flags) return FALSE; return intel_scrn_create(driver, entity_num, match_data, scrn_flags); } #endif #ifdef XFree86LOADER static MODULESETUPPROTO(intel_setup); static XF86ModuleVersionInfo intel_version = { "intel", MODULEVENDORSTRING, MODINFOSTRING1, MODINFOSTRING2, XORG_VERSION_CURRENT, INTEL_VERSION_MAJOR, INTEL_VERSION_MINOR, INTEL_VERSION_PATCH, ABI_CLASS_VIDEODRV, ABI_VIDEODRV_VERSION, MOD_CLASS_VIDEODRV, {0, 0, 0, 0} }; static const OptionInfoRec * intel_available_options(int chipid, int busid) { switch (chipid) { #if UMS case PCI_CHIP_I810: case PCI_CHIP_I810_DC100: case PCI_CHIP_I810_E: case PCI_CHIP_I815: return lg_i810_available_options(chipid, busid); #endif default: return intel_options; } } static DriverRec intel = { INTEL_VERSION, (char *)INTEL_DRIVER_NAME, intel_identify, NULL, intel_available_options, NULL, 0, intel_driver_func, intel_device_match, intel_pci_probe, #ifdef XSERVER_PLATFORM_BUS intel_platform_probe #endif }; static pointer intel_setup(pointer module, pointer opts, int *errmaj, int *errmin) { static Bool setupDone = 0; /* This module should be loaded only once, but check to be sure. */ if (!setupDone) { setupDone = 1; xf86AddDriver(&intel, module, HaveDriverFuncs); /* * The return value must be non-NULL on success even though there * is no TearDownProc. */ return (pointer) 1; } else { if (errmaj) *errmaj = LDR_ONCEONLY; return NULL; } } _X_EXPORT XF86ModuleData intelModuleData = { &intel_version, intel_setup, NULL }; #endif xf86-video-intel-2.99.917/src/intel_device.c0000664000175000017500000003633112432737457015340 00000000000000/*************************************************************************** Copyright 2013 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #ifdef XSERVER_PLATFORM_BUS #include #endif #ifdef HAVE_VALGRIND #include #include #define VG(x) x #else #define VG(x) #endif #define VG_CLEAR(s) VG(memset(&s, 0, sizeof(s))) #include "intel_driver.h" #include "fd.h" struct intel_device { int idx; char *master_node; char *render_node; int fd; int device_id; int open_count; int master_count; }; static int intel_device_key = -1; static int dump_file(ScrnInfoPtr scrn, const char *path) { FILE *file; size_t len = 0; char *line = NULL; file = fopen(path, "r"); if (file == NULL) return 0; xf86DrvMsg(scrn->scrnIndex, X_INFO, "[drm] Contents of '%s':\n", path); while (getline(&line, &len, file) != -1) xf86DrvMsg(scrn->scrnIndex, X_INFO, "[drm] %s", line); free(line); fclose(file); return 1; } static int __find_debugfs(void) { int i; for (i = 0; i < DRM_MAX_MINOR; i++) { char path[80]; sprintf(path, "/sys/kernel/debug/dri/%d/i915_wedged", i); if (access(path, R_OK) == 0) return i; sprintf(path, "/debug/dri/%d/i915_wedged", i); if (access(path, R_OK) == 0) return i; } return -1; } static int drm_get_minor(int fd) { struct stat st; if (fstat(fd, &st)) return __find_debugfs(); if (!S_ISCHR(st.st_mode)) return __find_debugfs(); return st.st_rdev & 0x63; } #if __linux__ #include static void dump_debugfs(ScrnInfoPtr scrn, int fd, const char *name) { char path[80]; int minor; minor = drm_get_minor(fd); if (minor < 0) return; sprintf(path, "/sys/kernel/debug/dri/%d/%s", minor, name); if (dump_file(scrn, path)) return; sprintf(path, "/debug/dri/%d/%s", minor, name); if (dump_file(scrn, path)) return; if (mount("X-debug", "/sys/kernel/debug", "debugfs", 0, 0) == 0) { sprintf(path, "/sys/kernel/debug/dri/%d/%s", minor, name); dump_file(scrn, path); umount("X-debug"); return; } } #else static void dump_debugfs(ScrnInfoPtr scrn, int fd, const char *name) { } #endif static void dump_clients_info(ScrnInfoPtr scrn, int fd) { dump_debugfs(scrn, fd, "clients"); } static int __intel_get_device_id(int fd) { struct drm_i915_getparam gp; int devid = 0; VG_CLEAR(gp); gp.param = I915_PARAM_CHIPSET_ID; gp.value = &devid; if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) return 0; return devid; } int intel_entity_get_devid(int idx) { struct intel_device *dev; dev = xf86GetEntityPrivate(idx, intel_device_key)->ptr; if (dev == NULL) return 0; return dev->device_id; } static inline struct intel_device *intel_device(ScrnInfoPtr scrn) { if (scrn->entityList == NULL) return NULL; return xf86GetEntityPrivate(scrn->entityList[0], intel_device_key)->ptr; } static int is_i915_device(int fd) { drm_version_t version; char name[5] = ""; memset(&version, 0, sizeof(version)); version.name_len = 4; version.name = name; if (drmIoctl(fd, DRM_IOCTL_VERSION, &version)) return 0; return strcmp("i915", name) == 0; } static int is_i915_gem(int fd) { int ret = is_i915_device(fd); if (ret) { struct drm_i915_getparam gp; VG_CLEAR(gp); gp.param = I915_PARAM_HAS_GEM; gp.value = &ret; if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) ret = 0; } return ret; } static int __intel_check_device(int fd) { int ret; /* Confirm that this is a i915.ko device with GEM/KMS enabled */ ret = is_i915_gem(fd); if (ret && !hosted()) { struct drm_mode_card_res res; memset(&res, 0, sizeof(res)); if (drmIoctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res)) ret = 0; } return ret; } static int open_cloexec(const char *path) { struct stat st; int loop = 1000; int fd; /* No file? Assume the driver is loading slowly */ while (stat(path, &st) == -1 && errno == ENOENT && --loop) usleep(50000); if (loop != 1000) ErrorF("intel: waited %d ms for '%s' to appear\n", (1000 - loop) * 50, path); fd = -1; #ifdef O_CLOEXEC fd = open(path, O_RDWR | O_NONBLOCK | O_CLOEXEC); #endif if (fd == -1) fd = fd_set_cloexec(open(path, O_RDWR | O_NONBLOCK)); return fd; } #ifdef __linux__ static int __intel_open_device__major_minor(int _major, int _minor) { char path[256]; DIR *dir; struct dirent *de; int base, fd = -1; base = sprintf(path, "/dev/dri/"); dir = opendir(path); if (dir == NULL) return -1; while ((de = readdir(dir)) != NULL) { struct stat st; if (*de->d_name == '.') continue; sprintf(path + base, "%s", de->d_name); if (stat(path, &st) == 0 && major(st.st_rdev) == _major && minor(st.st_rdev) == _minor) { fd = open_cloexec(path); break; } } closedir(dir); return fd; } static int __intel_open_device__pci(const struct pci_device *pci) { struct stat st; char path[256]; DIR *dir; struct dirent *de; int base; int fd; /* Look up the major:minor for the drm device through sysfs. * First we need to check that sysfs is available, then * check that we have loaded our driver. When we are happy * that our KMS module is loaded, we can then search for our * device node. We make the assumption that it uses the same * name, but after that we read the major:minor assigned to us * and search for a matching entry in /dev. */ base = sprintf(path, "/sys/bus/pci/devices/%04x:%02x:%02x.%d/", pci->domain, pci->bus, pci->dev, pci->func); if (stat(path, &st)) return -1; sprintf(path + base, "drm"); dir = opendir(path); if (dir == NULL) { int loop = 0; sprintf(path + base, "driver"); if (stat(path, &st)) { if (xf86LoadKernelModule("i915")) return -1; (void)xf86LoadKernelModule("fbcon"); } sprintf(path + base, "drm"); while ((dir = opendir(path)) == NULL && loop++ < 100) usleep(20000); ErrorF("intel: waited %d ms for i915.ko driver to load\n", loop * 20000 / 1000); if (dir == NULL) return -1; } fd = -1; while ((de = readdir(dir)) != NULL) { if (*de->d_name == '.') continue; if (strncmp(de->d_name, "card", 4) == 0) { sprintf(path + base + 4, "/dev/dri/%s", de->d_name); fd = open_cloexec(path + base + 4); if (fd != -1) break; sprintf(path + base + 3, "/%s/dev", de->d_name); fd = open(path, O_RDONLY); if (fd == -1) break; base = read(fd, path, sizeof(path) - 1); close(fd); fd = -1; if (base > 0) { int major, minor; path[base] = '\0'; if (sscanf(path, "%d:%d", &major, &minor) == 2) fd = __intel_open_device__major_minor(major, minor); } break; } } closedir(dir); return fd; } #else static int __intel_open_device__pci(const struct pci_device *pci) { return -1; } #endif static int __intel_open_device__legacy(const struct pci_device *pci) { char id[20]; int ret; snprintf(id, sizeof(id), "pci:%04x:%02x:%02x.%d", pci->domain, pci->bus, pci->dev, pci->func); ret = drmCheckModesettingSupported(id); if (ret) { if (xf86LoadKernelModule("i915")) ret = drmCheckModesettingSupported(id); if (ret) return -1; /* Be nice to the user and load fbcon too */ (void)xf86LoadKernelModule("fbcon"); } return fd_set_nonblock(drmOpen(NULL, id)); } static int __intel_open_device(const struct pci_device *pci, const char *path) { int fd; if (path == NULL) { if (pci == NULL) return -1; fd = __intel_open_device__pci(pci); if (fd == -1) fd = __intel_open_device__legacy(pci); } else fd = open_cloexec(path); return fd; } static char *find_master_node(int fd) { struct stat st, master; char buf[128]; if (fstat(fd, &st)) return NULL; if (!S_ISCHR(st.st_mode)) return NULL; sprintf(buf, "/dev/dri/card%d", (int)(st.st_rdev & 0x7f)); if (stat(buf, &master) == 0 && st.st_mode == master.st_mode && (st.st_rdev & 0x7f) == master.st_rdev) return strdup(buf); /* Fallback to iterating over the usual suspects */ return drmGetDeviceNameFromFd(fd); } static int is_render_node(int fd, struct stat *st) { if (fstat(fd, st)) return 0; if (!S_ISCHR(st->st_mode)) return 0; return st->st_rdev & 0x80; } static char *find_render_node(int fd) { #if defined(USE_RENDERNODE) struct stat master, render; char buf[128]; /* Are we a render-node ourselves? */ if (is_render_node(fd, &master)) return NULL; sprintf(buf, "/dev/dri/renderD%d", (int)((master.st_rdev | 0x80) & 0xbf)); if (stat(buf, &render) == 0 && master.st_mode == render.st_mode && render.st_rdev == ((master.st_rdev | 0x80) & 0xbf)) return strdup(buf); #endif return NULL; } #if defined(ODEV_ATTRIB_PATH) static char *get_path(struct xf86_platform_device *dev) { const char *path; if (dev == NULL) return NULL; path = xf86_get_platform_device_attrib(dev, ODEV_ATTRIB_PATH); if (path == NULL) return NULL; return strdup(path); } #else static char *get_path(struct xf86_platform_device *dev) { return NULL; } #endif #if defined(ODEV_ATTRIB_FD) static int get_fd(struct xf86_platform_device *dev) { if (dev == NULL) return -1; return xf86_get_platform_device_int_attrib(dev, ODEV_ATTRIB_FD, -1); } #else static int get_fd(struct xf86_platform_device *dev) { return -1; } #endif static int is_master(int fd) { drmSetVersion sv; sv.drm_di_major = 1; sv.drm_di_minor = 1; sv.drm_dd_major = -1; sv.drm_dd_minor = -1; return drmIoctl(fd, DRM_IOCTL_SET_VERSION, &sv) == 0; } int intel_open_device(int entity_num, const struct pci_device *pci, struct xf86_platform_device *platform) { struct intel_device *dev; char *path; int fd, master_count; if (intel_device_key == -1) intel_device_key = xf86AllocateEntityPrivateIndex(); if (intel_device_key == -1) return -1; dev = xf86GetEntityPrivate(entity_num, intel_device_key)->ptr; if (dev) return dev->fd; path = get_path(platform); master_count = 1; /* DRM_MASTER is managed by Xserver */ fd = get_fd(platform); if (fd == -1) { fd = __intel_open_device(pci, path); if (fd == -1) goto err_path; master_count = 0; } if (path == NULL) { path = find_master_node(fd); if (path == NULL) goto err_close; } if (!__intel_check_device(fd)) goto err_close; dev = malloc(sizeof(*dev)); if (dev == NULL) goto err_close; /* If hosted under a system compositor, just pretend to be master */ if (hosted()) master_count++; /* Non-root user holding MASTER, don't let go */ if (geteuid() && is_master(fd)) master_count++; if (pci) dev->device_id = pci->device_id; else dev->device_id = __intel_get_device_id(fd); dev->idx = entity_num; dev->fd = fd; dev->open_count = master_count; dev->master_count = master_count; dev->master_node = path; dev->render_node = find_render_node(fd); if (dev->render_node == NULL) dev->render_node = dev->master_node; xf86GetEntityPrivate(entity_num, intel_device_key)->ptr = dev; return fd; err_close: if (master_count == 0) /* Don't close server-fds */ close(fd); err_path: free(path); return -1; } int __intel_peek_fd(ScrnInfoPtr scrn) { struct intel_device *dev; dev = intel_device(scrn); assert(dev && dev->fd != -1); return dev->fd; } int intel_has_render_node(struct intel_device *dev) { struct stat st; assert(dev && dev->fd != -1); return is_render_node(dev->fd, &st); } struct intel_device *intel_get_device(ScrnInfoPtr scrn, int *fd) { struct intel_device *dev; int ret; dev = intel_device(scrn); if (dev == NULL) return NULL; assert(dev->fd != -1); if (dev->open_count++ == 0) { drmSetVersion sv; int retry = 2000; assert(!hosted()); /* Check that what we opened was a master or a * master-capable FD, by setting the version of the * interface we'll use to talk to it. */ do { sv.drm_di_major = 1; sv.drm_di_minor = 1; sv.drm_dd_major = -1; sv.drm_dd_minor = -1; ret = drmIoctl(dev->fd, DRM_IOCTL_SET_VERSION, &sv); if (ret == 0) break; usleep(1000); } while (--retry); if (ret != 0) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "[drm] failed to set drm interface version: %s [%d].\n", strerror(errno), errno); dump_clients_info(scrn, dev->fd); dev->open_count--; return NULL; } } *fd = dev->fd; return dev; } const char *intel_get_client_name(struct intel_device *dev) { assert(dev && dev->render_node); return dev->render_node; } static int authorise(struct intel_device *dev, int fd) { struct stat st; drm_magic_t magic; if (is_render_node(fd, &st)) /* restricted authority, do not elevate */ return 1; return drmGetMagic(fd, &magic) == 0 && drmAuthMagic(dev->fd, magic) == 0; } int intel_get_client_fd(struct intel_device *dev) { int fd = -1; assert(dev && dev->fd != -1); assert(dev->render_node); #ifdef O_CLOEXEC fd = open(dev->render_node, O_RDWR | O_CLOEXEC); #endif if (fd < 0) fd = fd_set_cloexec(open(dev->render_node, O_RDWR)); if (fd < 0) return -BadAlloc; if (!authorise(dev, fd)) { close(fd); return -BadMatch; } assert(is_i915_gem(fd)); return fd; } int intel_get_device_id(struct intel_device *dev) { assert(dev && dev->fd != -1); return dev->device_id; } int intel_get_master(struct intel_device *dev) { int ret; assert(dev && dev->fd != -1); ret = 0; if (dev->master_count++ == 0) { int retry = 2000; assert(!hosted()); do { ret = drmSetMaster(dev->fd); if (ret == 0) break; usleep(1000); } while (--retry); } return ret; } int intel_put_master(struct intel_device *dev) { int ret; assert(dev && dev->fd != -1); ret = 0; assert(dev->master_count); if (--dev->master_count == 0) { assert(!hosted()); assert(drmSetMaster(dev->fd) == 0); ret = drmDropMaster(dev->fd); } return ret; } void intel_put_device(struct intel_device *dev) { assert(dev && dev->fd != -1); assert(dev->open_count); if (--dev->open_count) return; assert(!hosted()); xf86GetEntityPrivate(dev->idx, intel_device_key)->ptr = NULL; drmClose(dev->fd); if (dev->render_node != dev->master_node) free(dev->render_node); free(dev->master_node); free(dev); } xf86-video-intel-2.99.917/src/fd.h0000664000175000017500000000260712432737457013303 00000000000000/*************************************************************************** Copyright 2013 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifndef FD_H #define FD_H int fd_move_cloexec(int fd); int fd_set_cloexec(int fd); int fd_set_nonblock(int fd); #endif /* FD_H */ xf86-video-intel-2.99.917/src/backlight.c0000664000175000017500000002571212432737457014637 00000000000000/*************************************************************************** Copyright 2014 Intel Corporation. All Rights Reserved. Copyright 2014 Red Hat, Inc. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "backlight.h" #include "fd.h" #define BACKLIGHT_CLASS "/sys/class/backlight" /* Enough for 10 digits of backlight + '\n' + '\0' */ #define BACKLIGHT_VALUE_LEN 12 #ifndef ARRAY_SIZE #define ARRAY_SIZE(A) (sizeof(A)/sizeof(A[0])) #endif /* * Unfortunately this is not as simple as I would like it to be. If selinux is * dropping dbus messages pkexec may block *forever*. * * Backgrounding pkexec by doing System("pkexec ...&") does not work because * that detaches pkexec from its parent at which point its security checks * fail and it refuses to execute the helper. * * So we're left with spawning a helper child which gets levels to set written * to it through a pipe. This turns the blocking forever problem from a hung * machine problem into a simple backlight control not working problem. * * If only things were as simple as on OpenBSD! :) */ void backlight_init(struct backlight *b) { b->type = BL_NONE; b->iface = NULL; b->fd = -1; b->pid = -1; b->max = -1; b->has_power = 0; } #ifdef __OpenBSD__ #include #include int backlight_set(struct backlight *b, int level) { struct wsdisplay_param param; if (b->iface == NULL) return -1; if ((unsigned)level > b->max) level = b->max; memset(¶m, 0, sizeof(param)); param.param = WSDISPLAYIO_PARAM_BRIGHTNESS; param.curval = level; return ioctl(xf86Info.consoleFd, WSDISPLAYIO_SETPARAM, ¶m); } int backlight_get(struct backlight *b) { struct wsdisplay_param param; if (b->iface == NULL) return -1; memset(¶m, 0, sizeof(param)); param.param = WSDISPLAYIO_PARAM_BRIGHTNESS; if (ioctl(xf86Info.consoleFd, WSDISPLAYIO_GETPARAM, ¶m)) return -1; return param.curval; } int backlight_open(struct backlight *b, char *iface) { struct wsdisplay_param param; if (iface != NULL) return -1; memset(¶m, 0, sizeof(param)); param.param = WSDISPLAYIO_PARAM_BRIGHTNESS; if (ioctl(xf86Info.consoleFd, WSDISPLAYIO_GETPARAM, ¶m) == -1) return -1; b->iface = strdup("wscons"); if (b->iface == NULL) return -1; b->max = param.max; b->fd = -1; b->type = BL_PLATFORM; return param.curval; } enum backlight_type backlight_exists(const char *iface) { if (iface != NULL) return BL_NONE; return BL_PLATFORM; } int backlight_on(struct backlight *b) { return 0; } int backlight_off(struct backlight *b) { return 0; } #else static int is_sysfs_fd(int fd) { struct stat st; return fstat(fd, &st) == 0 && major(st.st_dev) == 0; } static int __backlight_open(const char *iface, const char *file, int mode) { char buf[1024]; int fd; snprintf(buf, sizeof(buf), BACKLIGHT_CLASS "/%s/%s", iface, file); fd = open(buf, mode); if (fd == -1) return -1; if (!is_sysfs_fd(fd)) { close(fd); return -1; } return fd; } static int __backlight_read(const char *iface, const char *file) { char buf[BACKLIGHT_VALUE_LEN]; int fd, val; fd = __backlight_open(iface, file, O_RDONLY); if (fd < 0) return -1; val = read(fd, buf, BACKLIGHT_VALUE_LEN - 1); if (val > 0) { buf[val] = '\0'; val = atoi(buf); } else val = -1; close(fd); return val; } static int __backlight_write(const char *iface, const char *file, const char *value) { int fd, ret; fd = __backlight_open(iface, file, O_WRONLY); if (fd < 0) return -1; ret = write(fd, value, strlen(value)+1); close(fd); return ret; } /* List of available kernel interfaces in priority order */ static const char *known_interfaces[] = { "dell_backlight", "gmux_backlight", "asus-laptop", "asus-nb-wmi", "eeepc", "thinkpad_screen", "mbp_backlight", "fujitsu-laptop", "sony", "samsung", "acpi_video1", "acpi_video0", "intel_backlight", }; static enum backlight_type __backlight_type(const char *iface) { char buf[1024]; int fd, v; v = -1; fd = __backlight_open(iface, "type", O_RDONLY); if (fd >= 0) { v = read(fd, buf, sizeof(buf)-1); close(fd); } if (v > 0) { while (v > 0 && isspace(buf[v-1])) v--; buf[v] = '\0'; if (strcmp(buf, "raw") == 0) v = BL_RAW; else if (strcmp(buf, "platform") == 0) v = BL_PLATFORM; else if (strcmp(buf, "firmware") == 0) v = BL_FIRMWARE; else v = BL_NAMED; } else v = BL_NAMED; if (v == BL_NAMED) { int i; for (i = 0; i < ARRAY_SIZE(known_interfaces); i++) { if (strcmp(iface, known_interfaces[i]) == 0) break; } v += i; } return v; } enum backlight_type backlight_exists(const char *iface) { if (__backlight_read(iface, "brightness") < 0) return BL_NONE; if (__backlight_read(iface, "max_brightness") <= 0) return BL_NONE; return __backlight_type(iface); } static int __backlight_init(struct backlight *b, char *iface, int fd) { b->fd = fd_move_cloexec(fd_set_nonblock(fd)); b->iface = iface; return 1; } static int __backlight_direct_init(struct backlight *b, char *iface) { int fd; fd = __backlight_open(iface, "brightness", O_RDWR); if (fd < 0) return 0; if (__backlight_read(iface, "bl_power") != -1) b->has_power = 1; return __backlight_init(b, iface, fd); } static int __backlight_helper_init(struct backlight *b, char *iface) { #if USE_BACKLIGHT_HELPER struct stat st; char *env[] = { NULL }; int use_pkexec = 0; int fds[2]; /* * Some systems may prefer using PolicyKit's pkexec over * making the helper suid root, since the suid option will allow * anyone to control the backlight. However, as pkexec * is quite troublesome and not universally available, we * still try the old fashioned and simple method first. * Either way, we have to trust that it is our backlight-helper * that is run and that we have scrutinised it carefully. */ if (stat(LIBEXEC_PATH "/xf86-video-intel-backlight-helper", &st)) return 0; if ((st.st_mode & (S_IFREG | S_ISUID | S_IXUSR)) != (S_IFREG | S_ISUID | S_IXUSR)) { if (System("pkexec --version")) return 0; use_pkexec = 1; } if (pipe(fds)) return 0; switch ((b->pid = fork())) { case 0: if (setgid(getgid()) || setuid(getuid())) _exit(127); close(fds[1]); if (dup2(fds[0], 0)) _exit(127); close(fds[0]); if (use_pkexec) { execlp("pkexec", "pkexec", LIBEXEC_PATH "/xf86-video-intel-backlight-helper", iface, (char *)0); } else { execle(LIBEXEC_PATH "/xf86-video-intel-backlight-helper", "xf86-video-intel-backlight-helper", iface, (char *)0, env); } _exit(1); /* unreachable fallthrough */ case -1: close(fds[1]); close(fds[0]); return 0; default: close(fds[0]); return __backlight_init(b, iface, fds[1]); } #else return 0; #endif } static char * __backlight_find(void) { char *best_iface = NULL; unsigned best_type = INT_MAX; DIR *dir; struct dirent *de; dir = opendir(BACKLIGHT_CLASS); if (dir == NULL) return NULL; while ((de = readdir(dir))) { int v; if (*de->d_name == '.') continue; /* Fallback to priority list of known iface for old kernels */ v = backlight_exists(de->d_name); if (v < best_type) { char *copy = strdup(de->d_name); if (copy) { free(best_iface); best_iface = copy; best_type = v; } } } closedir(dir); return best_iface; } int backlight_open(struct backlight *b, char *iface) { int level; if (iface == NULL) iface = __backlight_find(); if (iface == NULL) goto err; b->type = __backlight_type(iface); b->max = __backlight_read(iface, "max_brightness"); if (b->max <= 0) goto err; level = __backlight_read(iface, "brightness"); if (level < 0) goto err; if (!__backlight_direct_init(b, iface) && !__backlight_helper_init(b, iface)) goto err; return level; err: backlight_init(b); return -1; } int backlight_set(struct backlight *b, int level) { char val[BACKLIGHT_VALUE_LEN]; int len, ret = 0; if (b->iface == NULL) return 0; if ((unsigned)level > b->max) level = b->max; len = snprintf(val, BACKLIGHT_VALUE_LEN, "%d\n", level); if (write(b->fd, val, len) != len) ret = -1; return ret; } int backlight_get(struct backlight *b) { int level; if (b->iface == NULL) return -1; level = __backlight_read(b->iface, "brightness"); if (level > b->max) level = b->max; else if (level < 0) level = -1; return level; } int backlight_off(struct backlight *b) { if (b->iface == NULL) return 0; if (!b->has_power) return 0; /* 4 -> FB_BLANK_POWERDOWN */ return __backlight_write(b->iface, "bl_power", "4"); } int backlight_on(struct backlight *b) { if (b->iface == NULL) return 0; if (!b->has_power) return 0; /* 0 -> FB_BLANK_UNBLANK */ return __backlight_write(b->iface, "bl_power", "0"); } #endif void backlight_disable(struct backlight *b) { if (b->iface == NULL) return; if (b->fd != -1) close(b->fd); free(b->iface); b->iface = NULL; } void backlight_close(struct backlight *b) { backlight_disable(b); if (b->pid) waitpid(b->pid, NULL, 0); } char *backlight_find_for_device(struct pci_device *pci) { char path[200]; unsigned best_type = INT_MAX; char *best_iface = NULL; DIR *dir; struct dirent *de; snprintf(path, sizeof(path), "/sys/bus/pci/devices/%04x:%02x:%02x.%d/backlight", pci->domain, pci->bus, pci->dev, pci->func); dir = opendir(path); if (dir == NULL) return NULL; while ((de = readdir(dir))) { int v; if (*de->d_name == '.') continue; v = backlight_exists(de->d_name); if (v < best_type) { char *copy = strdup(de->d_name); if (copy) { free(best_iface); best_iface = copy; best_type = v; } } } closedir(dir); return best_iface; } xf86-video-intel-2.99.917/src/scripts/0000775000175000017500000000000012445556131014273 500000000000000xf86-video-intel-2.99.917/src/scripts/fix.5c0000664000175000017500000000036112202250410015210 00000000000000/* * Convert CSC fix point values to floats */ real fixval (int fix) { int exp = fix >> 9; int mant = fix & ((1 << 9) - 1); real ret; if (exp == 0x7) return 1.0; ret = (2 ** -exp) * mant / (1 << 9); return ret; } xf86-video-intel-2.99.917/src/scripts/clock-graph.5c0000664000175000017500000000713112202250410016616 00000000000000autoload Cairo; import Cairo; library "examples/sort.5c"; import Sort; int width = 1000, height = 200; int min_vco = 1400000000; int max_vco = 2800000000; int min = 0xffffffff; int max = 0; int max_clocks = 2000; int[4][max_clocks] clocks; int[4][max_clocks] vcos; int[4] clock_count = {0...}; int[4] p2vals = {5,10,7,14}; cairo_t cr = Cairo::new(width, height); void calc_p2(int p2i) { int p2 = p2vals[p2i]; int min_p, max_p; clocks[p2i] = (int [max_clocks]){0...}; if (p2 == 7 || p2 == 14) { /* LVDS */ min_p = 7; max_p = 98; } else { /* SDVO/DAC */ min_p = 5; max_p = 80; } for (int m1 = 10; m1 <= 22; m1++) { for (int m2 = 5; m2 <= 9; m2++) { for (int n = 1; n <= 5; n++) { for (int p1 = 1; p1 <= 8; p1++) { int ref = 96000000; int m = 5 * (m1 + 2) + (m2 + 2); int p = p1 * p2; int vco = floor(ref * m / (n + 2)); int clock = floor(vco / p); if (p < min_p || p > max_p) continue; if (m < 70 || m > 120) continue; if (m2 > m1) continue; /* won't happen */ if (vco < min_vco || vco > max_vco) continue; /* printf("clock: %d (%d,%d), %d, " "(%d,%d)\n", floor(clock / 1000), m1, m2, n, p1, p2); */ clocks[p2i][clock_count[p2i]] = clock; vcos[p2i][clock_count[p2i]] = vco; clock_count[p2i]++; } } } } } bool sort_p2(poly a, poly b) { return a > b; } int min_rate = 25000 * 1000; int max_rate = 200000 * 1000; real scale_x(real clock) { int min_x = 75, max_x = width - 50; real frac = (clock - min_rate) / (max_rate - min_rate); return min_x + frac * (max_x - min_x); } for (p2i = 0; p2i < dim(p2vals); p2i++) { int p2 = p2vals[p2i]; calc_p2(p2i); real row_y1 = (p2i + 1) / (dim(p2vals) + 1) * height; real row_y2 = p2i / (dim(p2vals) + 1) * height; /*qsort(&p2vals[p2i], sort_p2);*/ switch (p2) { case 5: set_source_rgb(cr, 1,0,0); break; case 10: set_source_rgb(cr, 0,1,0); break; case 7: set_source_rgb(cr, 0,0,1); break; case 14: set_source_rgb(cr, 0,0,0); break; } /* draw the line for the clock */ for (int i = 0; i < clock_count[p2i]; i++) { int clock = clocks[p2i][i]; real xpos; if (clock < min_rate || clock > max_rate) continue; xpos = scale_x(clock); move_to(cr, xpos, row_y1); line_to(cr, xpos, row_y2); stroke(cr); } set_source_rgb(cr, 1, 1, 1); /* add a mark for the vco value of the clocks at each location */ for (int i = 0; i < clock_count[p2i]; i++) { int clock = clocks[p2i][i]; int vco = vcos[p2i][i]; real mark_center; if (clock < min_rate || clock > max_rate) continue; real xpos = scale_x(clock); real vcofrac = (vco - min_vco) / (max_vco - min_vco); real mark_height = (row_y1 + vcofrac * (row_y2 - row_y1)); move_to(cr, xpos, mark_height - 1); line_to(cr, xpos, mark_height + 1); stroke(cr); } set_source_rgb(cr, 0, 0, 0); string p2label = sprintf("p2 = %d", p2); move_to(cr, 5, (p2i + .5) / (dim(p2vals) + 1) * height + 4); show_text(cr, p2label); } void label_clock(real clock) { real center_x = scale_x(clock); string label = sprintf("%d", floor((clock + 500) / 1000000)); text_extents_t e = text_extents(cr, label); real left_x = center_x - e.x_advance / 2; save(cr); move_to(cr, left_x, height - 20); show_text(cr, label); restore(cr); } label_clock(min_rate); label_clock(max_rate); label_clock(140 * 1000 * 1000); label_clock(115 * 1000 * 1000); label_clock(100 * 1000 * 1000); label_clock(82 * 1000 * 1000); string xlabel = "Clock in Mhz"; text_extents_t e = text_extents(cr, xlabel); move_to(cr, width / 2 - e.x_advance / 2, height - 5); show_text(cr, xlabel); sleep(10); xf86-video-intel-2.99.917/src/scripts/clock.5c0000664000175000017500000000137512202250410015523 00000000000000int p2 = 14; int min_p, max_p; if (p2 == 7 || p2 == 14) { /* LVDS */ min_p = 7; max_p = 98; } else { /* SDVO/DAC */ min_p = 5; max_p = 80; } for (int m1 = 10; m1 <= 22; m1++) { for (int m2 = 5; m2 <= 9; m2++) { for (int n = 1; n <= 6; n++) { for (int p1 = 1; p1 <= 8; p1++) { int ref = 96000000; int m = 5 * (m1 + 2) + (m2 + 2); int p = p1 * p2; int vco = floor(ref * m / (n + 2)); int clock = floor(vco / p); if (p < min_p || p > max_p) continue; if (m < 70 || m > 120) continue; if (m2 > m1) continue; /* won't happen */ if (vco < 1400000000 || vco > 2800000000) continue; printf("clock: %d (%d,%d),%d,(%d,%d)\n", floor(clock / 1000), m1, m2, n, p1, p2); } } } } xf86-video-intel-2.99.917/src/scripts/tv.5c0000664000175000017500000000606512202250410015062 00000000000000/* * tv.5c * * Compute tv encoder subcarrier dda constants * * The TV encoder subcarrier must be set precisely to the * required frequency or the cumulative phase errors will be * quite visible in the output. To accomplish this, the TV encoder * has a complex circuit that takes a fixed clock, generated by the PLL * and generates a precise subcarrier clock from that using the following * formula: * * subcarrier = pixel_clock * (S1 + (S2 + (S3/Z3)) / Z2) / 4096 * * Careful selection of the constants will provide the necessarily * precise clock. * * In the code below, S1 is represented by dda1, S2/Z2 by dda2 and S3/Z3 * by dda3. */ typedef struct { int step; int size; } term_t; /* * Find the approximation closest, but no larger than 'v', where * 0 <= v < 1, and the result denominator must be less than 30000. */ term_t approx (rational v) { rational best_dist = 1.0; term_t best; for (int den = 20000; den < 30000; den++) { int num = floor (v * den); term_t approx = { step = num, size = den }; rational dist = v - approx.step/approx.size; if (dist >= 0 && dist < best_dist) { best_dist = dist; best = approx; } } return best; } typedef struct { rational subcarrier; rational pixel; rational result; term_t dda1; term_t dda2; term_t dda3; } dda; /* * Compute the dda constants for the given pixel clock and * desired subcarrier frequency */ dda find_dda (rational pixel, rational subcarrier) { dda d; d.subcarrier = subcarrier; d.pixel = pixel; rational dda1 = subcarrier / pixel * 4096; d.dda1 = (term_t) { step = floor (dda1), size = 4096 }; rational dda2 = dda1 - d.dda1.step; d.dda2 = approx (dda2); rational dda3 = dda2 * d.dda2.size - d.dda2.step; d.dda3 = approx (dda3); /* Compute the resulting pixel clock to compare */ d.result = d.pixel * (d.dda1.step + (d.dda2.step + d.dda3.step/d.dda3.size) / d.dda2.size) / d.dda1.size; return d; } /* * Print out the computed constants */ void print_dda (dda d) { printf ("\t/* desired %9.7f actual %9.7f clock %g */\n", d.subcarrier, d.result, d.pixel); printf ("\t.dda1_inc\t= %6d,\n", d.dda1.step); printf ("\t.dda2_inc\t= %6d,\t.dda2_size\t= %6d,\n", d.dda2.step, d.dda2.step != 0 ? d.dda2.size : 0); printf ("\t.dda3_inc\t= %6d,\t.dda3_size\t= %6d,\n", d.dda3.step, d.dda3.step != 0 ? d.dda3.size : 0); } /* * These are all of the required subcarrier frequencies */ rational[] subcarriers = { /* these are the values we use; for some reason, this generates * a more stable image (at least for NTSC) */ 3.580, 4.434, 3.582, 3.576, 4.430, /* these are the values pulled out of the various specs */ 3.579545, 4.433618, 3.582056, 3.575611, 4.433618 }; /* * We fix the pixel clock to a value which the hardware can * generate exactly */ rational pixel = 107.520; void main () { for (int i = 0; i < dim(subcarriers); i++) { dda d = find_dda (pixel, subcarriers[i]); print_dda (d); } } main (); xf86-video-intel-2.99.917/src/i915_pciids.h0000664000175000017500000002410512432737457014731 00000000000000/* * Copyright 2013 Intel Corporation * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #ifndef _I915_PCIIDS_H #define _I915_PCIIDS_H /* * A pci_device_id struct { * __u32 vendor, device; * __u32 subvendor, subdevice; * __u32 class, class_mask; * kernel_ulong_t driver_data; * }; * Don't use C99 here because "class" is reserved and we want to * give userspace flexibility. */ #define INTEL_VGA_DEVICE(id, info) { \ 0x8086, id, \ ~0, ~0, \ 0x030000, 0xff0000, \ (unsigned long) info } #define INTEL_QUANTA_VGA_DEVICE(info) { \ 0x8086, 0x16a, \ 0x152d, 0x8990, \ 0x030000, 0xff0000, \ (unsigned long) info } #define INTEL_I830_IDS(info) \ INTEL_VGA_DEVICE(0x3577, info) #define INTEL_I845G_IDS(info) \ INTEL_VGA_DEVICE(0x2562, info) #define INTEL_I85X_IDS(info) \ INTEL_VGA_DEVICE(0x3582, info), /* I855_GM */ \ INTEL_VGA_DEVICE(0x358e, info) #define INTEL_I865G_IDS(info) \ INTEL_VGA_DEVICE(0x2572, info) /* I865_G */ #define INTEL_I915G_IDS(info) \ INTEL_VGA_DEVICE(0x2582, info), /* I915_G */ \ INTEL_VGA_DEVICE(0x258a, info) /* E7221_G */ #define INTEL_I915GM_IDS(info) \ INTEL_VGA_DEVICE(0x2592, info) /* I915_GM */ #define INTEL_I945G_IDS(info) \ INTEL_VGA_DEVICE(0x2772, info) /* I945_G */ #define INTEL_I945GM_IDS(info) \ INTEL_VGA_DEVICE(0x27a2, info), /* I945_GM */ \ INTEL_VGA_DEVICE(0x27ae, info) /* I945_GME */ #define INTEL_I965G_IDS(info) \ INTEL_VGA_DEVICE(0x2972, info), /* I946_GZ */ \ INTEL_VGA_DEVICE(0x2982, info), /* G35_G */ \ INTEL_VGA_DEVICE(0x2992, info), /* I965_Q */ \ INTEL_VGA_DEVICE(0x29a2, info) /* I965_G */ #define INTEL_G33_IDS(info) \ INTEL_VGA_DEVICE(0x29b2, info), /* Q35_G */ \ INTEL_VGA_DEVICE(0x29c2, info), /* G33_G */ \ INTEL_VGA_DEVICE(0x29d2, info) /* Q33_G */ #define INTEL_I965GM_IDS(info) \ INTEL_VGA_DEVICE(0x2a02, info), /* I965_GM */ \ INTEL_VGA_DEVICE(0x2a12, info) /* I965_GME */ #define INTEL_GM45_IDS(info) \ INTEL_VGA_DEVICE(0x2a42, info) /* GM45_G */ #define INTEL_G45_IDS(info) \ INTEL_VGA_DEVICE(0x2e02, info), /* IGD_E_G */ \ INTEL_VGA_DEVICE(0x2e12, info), /* Q45_G */ \ INTEL_VGA_DEVICE(0x2e22, info), /* G45_G */ \ INTEL_VGA_DEVICE(0x2e32, info), /* G41_G */ \ INTEL_VGA_DEVICE(0x2e42, info), /* B43_G */ \ INTEL_VGA_DEVICE(0x2e92, info) /* B43_G.1 */ #define INTEL_PINEVIEW_IDS(info) \ INTEL_VGA_DEVICE(0xa001, info), \ INTEL_VGA_DEVICE(0xa011, info) #define INTEL_IRONLAKE_D_IDS(info) \ INTEL_VGA_DEVICE(0x0042, info) #define INTEL_IRONLAKE_M_IDS(info) \ INTEL_VGA_DEVICE(0x0046, info) #define INTEL_SNB_D_IDS(info) \ INTEL_VGA_DEVICE(0x0102, info), \ INTEL_VGA_DEVICE(0x0112, info), \ INTEL_VGA_DEVICE(0x0122, info), \ INTEL_VGA_DEVICE(0x010A, info) #define INTEL_SNB_M_IDS(info) \ INTEL_VGA_DEVICE(0x0106, info), \ INTEL_VGA_DEVICE(0x0116, info), \ INTEL_VGA_DEVICE(0x0126, info) #define INTEL_IVB_M_IDS(info) \ INTEL_VGA_DEVICE(0x0156, info), /* GT1 mobile */ \ INTEL_VGA_DEVICE(0x0166, info) /* GT2 mobile */ #define INTEL_IVB_D_IDS(info) \ INTEL_VGA_DEVICE(0x0152, info), /* GT1 desktop */ \ INTEL_VGA_DEVICE(0x0162, info), /* GT2 desktop */ \ INTEL_VGA_DEVICE(0x015a, info), /* GT1 server */ \ INTEL_VGA_DEVICE(0x016a, info) /* GT2 server */ #define INTEL_IVB_Q_IDS(info) \ INTEL_QUANTA_VGA_DEVICE(info) /* Quanta transcode */ #define INTEL_HSW_D_IDS(info) \ INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \ INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \ INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \ INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \ INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \ INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \ INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \ INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \ INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \ INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \ INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \ INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \ INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \ INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \ INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \ INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \ INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \ INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \ INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \ INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \ INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \ INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \ INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \ INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \ INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \ INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \ INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \ INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \ INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \ INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \ INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \ INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \ INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \ INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \ INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \ INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \ INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \ INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \ INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \ INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \ INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \ INTEL_VGA_DEVICE(0x0D2E, info) /* CRW GT3 reserved */ \ #define INTEL_HSW_M_IDS(info) \ INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \ INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \ INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \ INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \ INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \ INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \ INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \ INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ INTEL_VGA_DEVICE(0x0D26, info) /* CRW GT3 mobile */ #define INTEL_VLV_M_IDS(info) \ INTEL_VGA_DEVICE(0x0f30, info), \ INTEL_VGA_DEVICE(0x0f31, info), \ INTEL_VGA_DEVICE(0x0f32, info), \ INTEL_VGA_DEVICE(0x0f33, info), \ INTEL_VGA_DEVICE(0x0157, info) #define INTEL_VLV_D_IDS(info) \ INTEL_VGA_DEVICE(0x0155, info) #define _INTEL_BDW_M(gt, id, info) \ INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) #define _INTEL_BDW_D(gt, id, info) \ INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) #define _INTEL_BDW_M_IDS(gt, info) \ _INTEL_BDW_M(gt, 0x1602, info), /* ULT */ \ _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \ _INTEL_BDW_M(gt, 0x160B, info), /* Iris */ \ _INTEL_BDW_M(gt, 0x160E, info) /* ULX */ #define _INTEL_BDW_D_IDS(gt, info) \ _INTEL_BDW_D(gt, 0x160A, info), /* Server */ \ _INTEL_BDW_D(gt, 0x160D, info) /* Workstation */ #define INTEL_BDW_GT12M_IDS(info) \ _INTEL_BDW_M_IDS(1, info), \ _INTEL_BDW_M_IDS(2, info) #define INTEL_BDW_GT12D_IDS(info) \ _INTEL_BDW_D_IDS(1, info), \ _INTEL_BDW_D_IDS(2, info) #define INTEL_BDW_GT3M_IDS(info) \ _INTEL_BDW_M_IDS(3, info) #define INTEL_BDW_GT3D_IDS(info) \ _INTEL_BDW_D_IDS(3, info) #define INTEL_BDW_RSVDM_IDS(info) \ _INTEL_BDW_M_IDS(4, info) #define INTEL_BDW_RSVDD_IDS(info) \ _INTEL_BDW_D_IDS(4, info) #define INTEL_BDW_M_IDS(info) \ INTEL_BDW_GT12M_IDS(info), \ INTEL_BDW_GT3M_IDS(info), \ INTEL_BDW_RSVDM_IDS(info) #define INTEL_BDW_D_IDS(info) \ INTEL_BDW_GT12D_IDS(info), \ INTEL_BDW_GT3D_IDS(info), \ INTEL_BDW_RSVDD_IDS(info) #define INTEL_CHV_IDS(info) \ INTEL_VGA_DEVICE(0x22b0, info), \ INTEL_VGA_DEVICE(0x22b1, info), \ INTEL_VGA_DEVICE(0x22b2, info), \ INTEL_VGA_DEVICE(0x22b3, info) #define INTEL_SKL_IDS(info) \ INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \ INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \ INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \ INTEL_VGA_DEVICE(0x1921, info), /* ULT GT2F */ \ INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \ INTEL_VGA_DEVICE(0x191E, info), /* ULX GT2 */ \ INTEL_VGA_DEVICE(0x1912, info), /* DT GT2 */ \ INTEL_VGA_DEVICE(0x1902, info), /* DT GT1 */ \ INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \ INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \ INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \ INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \ INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \ INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \ INTEL_VGA_DEVICE(0x191D, info) /* WKS GT2 */ #endif /* _I915_PCIIDS_H */ xf86-video-intel-2.99.917/src/fd.c0000664000175000017500000000410612432737457013272 00000000000000/*************************************************************************** Copyright 2013 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include /* MAXCLIENTS */ #include "fd.h" int fd_move_cloexec(int fd) { int newfd; newfd = fcntl(fd, #ifdef F_DUPFD_CLOEXEC F_DUPFD_CLOEXEC, #else F_DUPFD, #endif MAXCLIENTS); if (newfd < 0) return fd; #ifndef F_DUPFD_CLOEXEC newfd = fd_set_cloexec(newfd); #endif close(fd); return newfd; } int fd_set_cloexec(int fd) { int flags; if (fd == -1) return fd; #ifdef FD_CLOEXEC flags = fcntl(fd, F_GETFD); if (flags != -1) { flags |= FD_CLOEXEC; fcntl(fd, F_SETFD, flags); } #endif return fd; } int fd_set_nonblock(int fd) { int flags; if (fd == -1) return fd; flags = fcntl(fd, F_GETFL); if (flags != -1) { flags |= O_NONBLOCK; fcntl(fd, F_SETFL, flags); } return fd; } xf86-video-intel-2.99.917/src/compat-api.h0000664000175000017500000002061112432737457014737 00000000000000/* * Copyright 2012 Red Hat, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Author: Dave Airlie */ /* this file provides API compat between server post 1.13 and pre it, it should be reused inside as many drivers as possible */ #ifndef COMPAT_API_H #define COMPAT_API_H #include #include #include #ifndef GLYPH_HAS_GLYPH_PICTURE_ACCESSOR #define GetGlyphPicture(g, s) GlyphPicture((g))[(s)->myNum] #define SetGlyphPicture(g, s, p) GlyphPicture((g))[(s)->myNum] = p #endif #ifndef XF86_HAS_SCRN_CONV #define xf86ScreenToScrn(s) xf86Screens[(s)->myNum] #define xf86ScrnToScreen(s) screenInfo.screens[(s)->scrnIndex] #endif #ifndef XF86_SCRN_INTERFACE #define SCRN_ARG_TYPE int #define SCRN_INFO_PTR(arg1) ScrnInfoPtr scrn = xf86Screens[(arg1)] #define SCREEN_ARG_TYPE int #define SCREEN_PTR(arg1) ScreenPtr screen = screenInfo.screens[(arg1)] #define SCREEN_INIT_ARGS_DECL int scrnIndex, ScreenPtr screen, int argc, char **argv #define BLOCKHANDLER_ARGS_DECL int arg, pointer blockData, pointer timeout, pointer read_mask #define BLOCKHANDLER_ARGS arg, blockData, timeout, read_mask #define WAKEUPHANDLER_ARGS_DECL int arg, pointer wakeupData, unsigned long result, pointer read_mask #define WAKEUPHANDLER_ARGS arg, wakeupData, result, read_mask #define CLOSE_SCREEN_ARGS_DECL int scrnIndex, ScreenPtr screen #define CLOSE_SCREEN_ARGS scrnIndex, screen #define ADJUST_FRAME_ARGS_DECL int arg, int x, int y, int flags #define ADJUST_FRAME_ARGS(arg, x, y) (arg)->scrnIndex, x, y, 0 #define SWITCH_MODE_ARGS_DECL int arg, DisplayModePtr mode, int flags #define SWITCH_MODE_ARGS(arg, m) (arg)->scrnIndex, m, 0 #define FREE_SCREEN_ARGS_DECL int arg, int flags #define VT_FUNC_ARGS_DECL int arg, int flags #define VT_FUNC_ARGS(flags) scrn->scrnIndex, (flags) #define XF86_ENABLEDISABLEFB_ARG(x) ((x)->scrnIndex) #else #define SCRN_ARG_TYPE ScrnInfoPtr #define SCRN_INFO_PTR(arg1) ScrnInfoPtr scrn = (arg1) #define SCREEN_ARG_TYPE ScreenPtr #define SCREEN_PTR(arg1) ScreenPtr screen = (arg1) #define SCREEN_INIT_ARGS_DECL ScreenPtr screen, int argc, char **argv #define BLOCKHANDLER_ARGS_DECL ScreenPtr arg, pointer timeout, pointer read_mask #define BLOCKHANDLER_ARGS arg, timeout, read_mask #define WAKEUPHANDLER_ARGS_DECL ScreenPtr arg, unsigned long result, pointer read_mask #define WAKEUPHANDLER_ARGS arg, result, read_mask #define CLOSE_SCREEN_ARGS_DECL ScreenPtr screen #define CLOSE_SCREEN_ARGS screen #define ADJUST_FRAME_ARGS_DECL ScrnInfoPtr arg, int x, int y #define ADJUST_FRAME_ARGS(arg, x, y) arg, x, y #define SWITCH_MODE_ARGS_DECL ScrnInfoPtr arg, DisplayModePtr mode #define SWITCH_MODE_ARGS(arg, m) arg, m #define FREE_SCREEN_ARGS_DECL ScrnInfoPtr arg #define VT_FUNC_ARGS_DECL ScrnInfoPtr arg #define VT_FUNC_ARGS(flags) scrn #define XF86_ENABLEDISABLEFB_ARG(x) (x) #endif static inline int region_num_rects(const RegionRec *r) { return r->data ? r->data->numRects : 1; } static inline int region_nil(const RegionRec *r) { return region_num_rects(r) == 0; } static inline BoxPtr region_boxptr(const RegionRec *r) { return (BoxPtr)(r->data + 1); } static inline const BoxRec * region_rects(const RegionRec *r) { return r->data ? (const BoxRec *)(r->data + 1) : &r->extents; } #ifndef INCLUDE_LEGACY_REGION_DEFINES #define RegionCreate(r, s) REGION_CREATE(NULL, r, s) #define RegionBreak(r) REGION_BREAK(NULL, r) #define RegionSizeof REGION_SZOF #define RegionBoxptr REGION_BOXPTR #define RegionEnd REGION_END #define RegionExtents(r) REGION_EXTENTS(NULL, r) #define RegionRects REGION_RECTS #define RegionNumRects REGION_NUM_RECTS #define RegionContainsRect(r, b) RECT_IN_REGION(NULL, r, b) #define RegionContainsPoint(r, x, y, b) POINT_IN_REGION(NULL, r, x, y, b) #define RegionCopy(res, r) REGION_COPY(NULL, res, r) #define RegionIntersect(res, r1, r2) REGION_INTERSECT(NULL, res, r1, r2) #define RegionUnion(res, r1, r2) REGION_UNION(NULL, res, r1, r2) #define RegionSubtract(res, r1, r2) REGION_SUBTRACT(NULL, res, r1, r2) #define RegionTranslate(r, x, y) REGION_TRANSLATE(NULL, r, x, y) #define RegionUninit(r) REGION_UNINIT(NULL, r) #define region_from_bitmap BITMAP_TO_REGION #define RegionNil REGION_NIL #define RegionNull(r) REGION_NULL(NULL, r) #define RegionNotEmpty(r) REGION_NOTEMPTY(NULL, r) #define RegionEmpty(r) REGION_EMPTY(NULL, r) #define RegionEqual(a, b) REGION_EQUAL(NULL, a, b) #define RegionDestroy(r) REGION_DESTROY(NULL, r) #else #define region_from_bitmap BitmapToRegion #endif #ifndef _X_UNUSED #define _X_UNUSED #endif #if HAS_DEVPRIVATEKEYREC #define __get_private(p, key) dixGetPrivateAddr(&(p)->devPrivates, &(key)) #else #define __get_private(p, key) dixLookupPrivate(&(p)->devPrivates, &(key)) typedef int DevPrivateKeyRec; static inline void FreePixmap(PixmapPtr pixmap) { dixFreePrivates(pixmap->devPrivates); free(pixmap); } #endif #if !HAS_DIXREGISTERPRIVATEKEY #define dixPrivateKeyRegistered(key__) (*(key__) != 0) #endif #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,9,99,902,0) #define SourceValidate(d, x, y, w, h, mode) \ if ((d)->pScreen->SourceValidate) (d)->pScreen->SourceValidate(d, x, y, w, h, mode) #else #define SourceValidate(d, x, y, w, h, mode) \ if ((d)->pScreen->SourceValidate) (d)->pScreen->SourceValidate(d, x, y, w, h) #endif #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,14,99,2,0) #define DamageUnregister(d, dd) DamageUnregister(dd) #endif #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,16,99,1,0) #define XORG_XV_VERSION 2 #define ddStopVideo_ARGS XvPortPtr port, DrawablePtr draw #define ddSetPortAttribute_ARGS XvPortPtr port, Atom attribute, INT32 value #define ddGetPortAttribute_ARGS XvPortPtr port, Atom attribute, INT32 *value #define ddQueryBestSize_ARGS XvPortPtr port, CARD8 motion, CARD16 vid_w, CARD16 vid_h, CARD16 drw_w, CARD16 drw_h, unsigned int *p_w, unsigned int *p_h #define ddPutImage_ARGS DrawablePtr draw, XvPortPtr port, GCPtr gc, INT16 src_x, INT16 src_y, CARD16 src_w, CARD16 src_h, INT16 drw_x, INT16 drw_y, CARD16 drw_w, CARD16 drw_h, XvImagePtr format, unsigned char *buf, Bool sync, CARD16 width, CARD16 height #define ddQueryImageAttributes_ARGS XvPortPtr port, XvImagePtr format, unsigned short *w, unsigned short *h, int *pitches, int *offsets #else #define XORG_XV_VERSION 1 #define ddStopVideo_ARGS ClientPtr client, XvPortPtr port, DrawablePtr draw #define ddSetPortAttribute_ARGS ClientPtr client, XvPortPtr port, Atom attribute, INT32 value #define ddGetPortAttribute_ARGS ClientPtr client, XvPortPtr port, Atom attribute, INT32 *value #define ddQueryBestSize_ARGS ClientPtr client, XvPortPtr port, CARD8 motion, CARD16 vid_w, CARD16 vid_h, CARD16 drw_w, CARD16 drw_h, unsigned int *p_w, unsigned int *p_h #define ddPutImage_ARGS ClientPtr client, DrawablePtr draw, XvPortPtr port, GCPtr gc, INT16 src_x, INT16 src_y, CARD16 src_w, CARD16 src_h, INT16 drw_x, INT16 drw_y, CARD16 drw_w, CARD16 drw_h, XvImagePtr format, unsigned char *buf, Bool sync, CARD16 width, CARD16 height #define ddQueryImageAttributes_ARGS ClientPtr client, XvPortPtr port, XvImagePtr format, unsigned short *w, unsigned short *h, int *pitches, int *offsets #endif #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,16,99,1,0) #include #define miHandleExposures(pSrcDrawable, pDstDrawable, \ pGC, srcx, srcy, width, height, \ dstx, dsty, plane) \ miHandleExposures(pSrcDrawable, pDstDrawable, \ pGC, srcx, srcy, width, height, \ dstx, dsty) #endif #endif xf86-video-intel-2.99.917/src/Makefile.in0000664000175000017500000007063612445556117014611 00000000000000# Makefile.in generated by automake 1.14.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 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subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * */ #ifndef _INTEL_LIST_H_ #define _INTEL_LIST_H_ #include #if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(1,9,0,0,0) || XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,11,99,903,0) #include /** * @file Classic doubly-link circular list implementation. * For real usage examples of the linked list, see the file test/list.c * * Example: * We need to keep a list of struct foo in the parent struct bar, i.e. what * we want is something like this. * * struct bar { * ... * struct foo *list_of_foos; -----> struct foo {}, struct foo {}, struct foo{} * ... * } * * We need one list head in bar and a list element in all list_of_foos (both are of * data type 'struct list'). * * struct bar { * ... * struct list list_of_foos; * ... * } * * struct foo { * ... * struct list entry; * ... * } * * Now we initialize the list head: * * struct bar bar; * ... * list_init(&bar.list_of_foos); * * Then we create the first element and add it to this list: * * struct foo *foo = malloc(...); * .... * list_add(&foo->entry, &bar.list_of_foos); * * Repeat the above for each element you want to add to the list. Deleting * works with the element itself. * list_del(&foo->entry); * free(foo); * * Note: calling list_del(&bar.list_of_foos) will set bar.list_of_foos to an empty * list again. * * Looping through the list requires a 'struct foo' as iterator and the * name of the field the subnodes use. * * struct foo *iterator; * list_for_each_entry(iterator, &bar.list_of_foos, entry) { * if (iterator->something == ...) * ... * } * * Note: You must not call list_del() on the iterator if you continue the * loop. You need to run the safe for-each loop instead: * * struct foo *iterator, *next; * list_for_each_entry_safe(iterator, next, &bar.list_of_foos, entry) { * if (...) * list_del(&iterator->entry); * } * */ /** * The linkage struct for list nodes. This struct must be part of your * to-be-linked struct. struct list is required for both the head of the * list and for each list node. * * Position and name of the struct list field is irrelevant. * There are no requirements that elements of a list are of the same type. * There are no requirements for a list head, any struct list can be a list * head. */ struct list { struct list *next, *prev; }; /** * Initialize the list as an empty list. * * Example: * list_init(&bar->list_of_foos); * * @param The list to initialized. */ static void list_init(struct list *list) { list->next = list->prev = list; } static inline void __list_add(struct list *entry, struct list *prev, struct list *next) { next->prev = entry; entry->next = next; entry->prev = prev; prev->next = entry; } /** * Insert a new element after the given list head. The new element does not * need to be initialised as empty list. * The list changes from: * head → some element → ... * to * head → new element → older element → ... * * Example: * struct foo *newfoo = malloc(...); * list_add(&newfoo->entry, &bar->list_of_foos); * * @param entry The new element to prepend to the list. * @param head The existing list. */ static inline void list_add(struct list *entry, struct list *head) { __list_add(entry, head, head->next); } static inline void list_add_tail(struct list *entry, struct list *head) { __list_add(entry, head->prev, head); } static inline void list_replace(struct list *old, struct list *new) { new->next = old->next; new->next->prev = new; new->prev = old->prev; new->prev->next = new; } #define list_last_entry(ptr, type, member) \ list_entry((ptr)->prev, type, member) #define list_for_each(pos, head) \ for (pos = (head)->next; pos != (head); pos = pos->next) /** * Append a new element to the end of the list given with this list head. * * The list changes from: * head → some element → ... → lastelement * to * head → some element → ... → lastelement → new element * * Example: * struct foo *newfoo = malloc(...); * list_append(&newfoo->entry, &bar->list_of_foos); * * @param entry The new element to prepend to the list. * @param head The existing list. */ static inline void list_append(struct list *entry, struct list *head) { __list_add(entry, head->prev, head); } static inline void __list_del(struct list *prev, struct list *next) { assert(next->prev == prev->next); next->prev = prev; prev->next = next; } static inline void _list_del(struct list *entry) { assert(entry->prev->next == entry); assert(entry->next->prev == entry); __list_del(entry->prev, entry->next); } /** * Remove the element from the list it is in. Using this function will reset * the pointers to/from this element so it is removed from the list. It does * NOT free the element itself or manipulate it otherwise. * * Using list_del on a pure list head (like in the example at the top of * this file) will NOT remove the first element from * the list but rather reset the list as empty list. * * Example: * list_del(&foo->entry); * * @param entry The element to remove. */ static inline void list_del(struct list *entry) { _list_del(entry); list_init(entry); } static inline void list_move(struct list *list, struct list *head) { if (list->prev != head) { _list_del(list); list_add(list, head); } } static inline void list_move_tail(struct list *list, struct list *head) { _list_del(list); list_add_tail(list, head); } /** * Check if the list is empty. * * Example: * list_is_empty(&bar->list_of_foos); * * @return True if the list contains one or more elements or False otherwise. */ static inline bool list_is_empty(const struct list *head) { return head->next == head; } /** * Alias of container_of */ #define list_entry(ptr, type, member) \ container_of(ptr, type, member) /** * Retrieve the first list entry for the given list pointer. * * Example: * struct foo *first; * first = list_first_entry(&bar->list_of_foos, struct foo, list_of_foos); * * @param ptr The list head * @param type Data type of the list element to retrieve * @param member Member name of the struct list field in the list element. * @return A pointer to the first list element. */ #define list_first_entry(ptr, type, member) \ list_entry((ptr)->next, type, member) /** * Retrieve the last list entry for the given listpointer. * * Example: * struct foo *first; * first = list_last_entry(&bar->list_of_foos, struct foo, list_of_foos); * * @param ptr The list head * @param type Data type of the list element to retrieve * @param member Member name of the struct list field in the list element. * @return A pointer to the last list element. */ #define list_last_entry(ptr, type, member) \ list_entry((ptr)->prev, type, member) #define __container_of(ptr, sample, member) \ (void *)((char *)(ptr) \ - ((char *)&(sample)->member - (char *)(sample))) /** * Loop through the list given by head and set pos to struct in the list. * * Example: * struct foo *iterator; * list_for_each_entry(iterator, &bar->list_of_foos, entry) { * [modify iterator] * } * * This macro is not safe for node deletion. Use list_for_each_entry_safe * instead. * * @param pos Iterator variable of the type of the list elements. * @param head List head * @param member Member name of the struct list in the list elements. * */ #define list_for_each_entry(pos, head, member) \ for (pos = __container_of((head)->next, pos, member); \ &pos->member != (head); \ pos = __container_of(pos->member.next, pos, member)) #define list_for_each_entry_reverse(pos, head, member) \ for (pos = __container_of((head)->prev, pos, member); \ &pos->member != (head); \ pos = __container_of(pos->member.prev, pos, member)) /** * Loop through the list, keeping a backup pointer to the element. This * macro allows for the deletion of a list element while looping through the * list. * * See list_for_each_entry for more details. */ #define list_for_each_entry_safe(pos, tmp, head, member) \ for (pos = __container_of((head)->next, pos, member), \ tmp = __container_of(pos->member.next, pos, member); \ &pos->member != (head); \ pos = tmp, tmp = __container_of(pos->member.next, tmp, member)) #else #include static inline void list_add_tail(struct list *entry, struct list *head) { __list_add(entry, head->prev, head); } static inline void _list_del(struct list *entry) { assert(entry->prev->next == entry); assert(entry->next->prev == entry); __list_del(entry->prev, entry->next); } static inline void list_replace(struct list *old, struct list *new) { new->next = old->next; new->next->prev = new; new->prev = old->prev; new->prev->next = new; } static inline void list_move(struct list *list, struct list *head) { if (list->prev != head) { _list_del(list); list_add(list, head); } } static inline void list_move_tail(struct list *list, struct list *head) { _list_del(list); list_add_tail(list, head); } #define list_last_entry(ptr, type, member) \ list_entry((ptr)->prev, type, member) #define list_for_each_entry_reverse(pos, head, member) \ for (pos = __container_of((head)->prev, pos, member); \ &pos->member != (head); \ pos = __container_of(pos->member.prev, pos, member)) #endif #undef container_of #define container_of(ptr, type, member) \ ((type *)((char *)(ptr) - (char *) &((type *)0)->member)) static inline int list_is_singular(const struct list *list) { return list->next == list->prev; } #endif /* _INTEL_LIST_H_ */ xf86-video-intel-2.99.917/src/legacy/0000775000175000017500000000000012445556131014050 500000000000000xf86-video-intel-2.99.917/src/legacy/Makefile.am0000664000175000017500000000040312400044327016007 00000000000000SUBDIRS = noinst_LTLIBRARIES = liblegacy.la NULL:=# liblegacy_la_SOURCES = legacy.h liblegacy_la_LIBADD = if UMS SUBDIRS += i810 liblegacy_la_SOURCES += liblegacy_la_LIBADD += \ i810/liblegacy-i810.la \ $(NULL) endif EXTRA_DIST = README xf86-video-intel-2.99.917/src/legacy/legacy.h0000664000175000017500000000021612244635610015401 00000000000000/* The old i810 (only) driver. */ const OptionInfoRec *lg_i810_available_options(int chipid, int busid); Bool lg_i810_init(ScrnInfoPtr scrn); xf86-video-intel-2.99.917/src/legacy/README0000664000175000017500000000047112244635610014647 00000000000000Welcome to the attic! The code contained herein is no longer under active development and is not the target for new features or other improvements. Instead, we have placed it here to mature gracefully and still provide hardware compatibility for those antiquated devices that turn up when you least expect them. xf86-video-intel-2.99.917/src/legacy/i810/0000775000175000017500000000000012445556131014531 500000000000000xf86-video-intel-2.99.917/src/legacy/i810/i810_accel.c0000664000175000017500000002204112400044327016412 00000000000000 /************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif /* * Authors: * Keith Whitwell * */ #include "xorg-server.h" #include "xf86.h" #include "xaarop.h" #include "i810.h" const int I810CopyROP[16] = { ROP_0, /* GXclear */ ROP_DSa, /* GXand */ ROP_SDna, /* GXandReverse */ ROP_S, /* GXcopy */ ROP_DSna, /* GXandInverted */ ROP_D, /* GXnoop */ ROP_DSx, /* GXxor */ ROP_DSo, /* GXor */ ROP_DSon, /* GXnor */ ROP_DSxn, /* GXequiv */ ROP_Dn, /* GXinvert */ ROP_SDno, /* GXorReverse */ ROP_Sn, /* GXcopyInverted */ ROP_DSno, /* GXorInverted */ ROP_DSan, /* GXnand */ ROP_1 /* GXset */ }; const int I810PatternROP[16] = { ROP_0, ROP_DPa, ROP_PDna, ROP_P, ROP_DPna, ROP_D, ROP_DPx, ROP_DPo, ROP_DPon, ROP_PDxn, ROP_Dn, ROP_PDno, ROP_Pn, ROP_DPno, ROP_DPan, ROP_1 }; int I810WaitLpRing(ScrnInfoPtr pScrn, int n, int timeout_millis) { I810Ptr pI810 = I810PTR(pScrn); I810RingBuffer *ring = pI810->LpRing; int iters = 0; int start = 0; int now = 0; int last_head = 0; int first = 0; /* If your system hasn't moved the head pointer in 2 seconds, I'm going to * call it crashed. */ if (timeout_millis == 0) timeout_millis = 2000; if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) { ErrorF("I810WaitLpRing %d\n", n); first = GetTimeInMillis(); } while (ring->space < n) { ring->head = INREG(LP_RING + RING_HEAD) & HEAD_ADDR; ring->space = ring->head - (ring->tail + 8); if (ring->space < 0) ring->space += ring->mem.Size; iters++; now = GetTimeInMillis(); if (start == 0 || now < start || ring->head != last_head) { if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) if (now > start) ErrorF("space: %d wanted %d\n", ring->space, n); start = now; last_head = ring->head; } else if (now - start > timeout_millis) { ErrorF("Error in I810WaitLpRing(), now is %d, start is %d\n", now, start); I810PrintErrorState(pScrn); ErrorF("space: %d wanted %d\n", ring->space, n); #ifdef HAVE_DRI1 if (pI810->directRenderingEnabled) { DRIUnlock(xf86ScrnToScreen(pScrn)); DRICloseScreen(xf86ScrnToScreen(pScrn)); } #endif #if HAVE_XAA_H pI810->AccelInfoRec = NULL; /* Stops recursive behavior */ #endif FatalError("lockup\n"); } DELAY(10000); } if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) { now = GetTimeInMillis(); if (now - first) { ErrorF("Elapsed %d ms\n", now - first); ErrorF("space: %d wanted %d\n", ring->space, n); } } return iters; } void I810Sync(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); if (I810_DEBUG & (DEBUG_VERBOSE_ACCEL | DEBUG_VERBOSE_SYNC)) ErrorF("I810Sync\n"); #ifdef HAVE_DRI1 /* VT switching tries to do this. */ if (!pI810->LockHeld && pI810->directRenderingEnabled) { return; } #endif /* Send a flush instruction and then wait till the ring is empty. * This is stronger than waiting for the blitter to finish as it also * flushes the internal graphics caches. */ { BEGIN_LP_RING(2); OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE); OUT_RING(0); /* pad to quadword */ ADVANCE_LP_RING(); } I810WaitLpRing(pScrn, pI810->LpRing->mem.Size - 8, 0); pI810->LpRing->space = pI810->LpRing->mem.Size - 8; pI810->nextColorExpandBuf = 0; } void I810SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop, unsigned int planemask) { I810Ptr pI810 = I810PTR(pScrn); if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I810SetupForFillRectSolid color: %x rop: %x mask: %x\n", color, rop, planemask); /* Color blit, p166 */ pI810->BR[13] = (BR13_SOLID_PATTERN | (I810PatternROP[rop] << 16) | (pScrn->displayWidth * pI810->cpp)); pI810->BR[16] = color; } void I810SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y, int w, int h) { I810Ptr pI810 = I810PTR(pScrn); if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I810SubsequentFillRectSolid %d,%d %dx%d\n", x, y, w, h); { BEGIN_LP_RING(6); OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3); OUT_RING(pI810->BR[13]); OUT_RING((h << 16) | (w * pI810->cpp)); OUT_RING(pI810->bufferOffset + (y * pScrn->displayWidth + x) * pI810->cpp); OUT_RING(pI810->BR[16]); OUT_RING(0); /* pad to quadword */ ADVANCE_LP_RING(); } } void I810SetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir, int ydir, int rop, unsigned int planemask, int transparency_color) { I810Ptr pI810 = I810PTR(pScrn); if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I810SetupForScreenToScreenCopy %d %d %x %x %d\n", xdir, ydir, rop, planemask, transparency_color); pI810->BR[13] = (pScrn->displayWidth * pI810->cpp); if (ydir == -1) pI810->BR[13] = (-pI810->BR[13]) & 0xFFFF; if (xdir == -1) pI810->BR[13] |= BR13_RIGHT_TO_LEFT; pI810->BR[13] |= I810CopyROP[rop] << 16; pI810->BR[18] = 0; } void I810SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int x1, int y1, int x2, int y2, int w, int h) { I810Ptr pI810 = I810PTR(pScrn); int src, dst; int w_back = w; if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF( "I810SubsequentScreenToScreenCopy %d,%d - %d,%d %dx%d\n", x1,y1,x2,y2,w,h); /* * This works around a bug in the i810 drawing engine. * This was developed empirically so it may not catch all * cases. */ #define I810_MWIDTH 8 if ( !(pI810->BR[13] & BR13_RIGHT_TO_LEFT) && (y2 - y1) < 3 && (y2 - y1) >= 0 && (x2 - x1) <= (w + I810_MWIDTH) && (w > I810_MWIDTH)) w = I810_MWIDTH; do { if (pI810->BR[13] & BR13_PITCH_SIGN_BIT) { src = (y1 + h - 1) * pScrn->displayWidth * pI810->cpp; dst = (y2 + h - 1) * pScrn->displayWidth * pI810->cpp; } else { src = y1 * pScrn->displayWidth * pI810->cpp; dst = y2 * pScrn->displayWidth * pI810->cpp; } if (pI810->BR[13] & BR13_RIGHT_TO_LEFT) { src += (x1 + w - 1) * pI810->cpp + pI810->cpp - 1; dst += (x2 + w - 1) * pI810->cpp + pI810->cpp - 1; } else { src += x1 * pI810->cpp; dst += x2 * pI810->cpp; } /* SRC_COPY_BLT, p169 */ { BEGIN_LP_RING(6); OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4 ); OUT_RING( pI810->BR[13]); OUT_RING( (h << 16) | (w * pI810->cpp)); OUT_RING( pI810->bufferOffset + dst); OUT_RING( pI810->BR[13] & 0xFFFF); OUT_RING( pI810->bufferOffset + src); ADVANCE_LP_RING(); } w_back -= w; if (w_back <= 0) break; x2 += w; x1 += w; if (w_back > I810_MWIDTH) w = I810_MWIDTH; else w = w_back; } while (1); } void I810EmitFlush(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); BEGIN_LP_RING(2); OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE); OUT_RING(0); ADVANCE_LP_RING(); } void I810SelectBuffer(ScrnInfoPtr pScrn, int buffer) { I810Ptr pI810 = I810PTR(pScrn); switch (buffer) { case I810_SELECT_BACK: pI810->bufferOffset = pI810->BackBuffer.Start; break; case I810_SELECT_DEPTH: pI810->bufferOffset = pI810->DepthBuffer.Start; break; default: case I810_SELECT_FRONT: pI810->bufferOffset = pI810->FrontBuffer.Start; break; } if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I810SelectBuffer %d --> offset %x\n", buffer, pI810->bufferOffset); } void I810RefreshRing(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); pI810->LpRing->head = INREG(LP_RING + RING_HEAD) & HEAD_ADDR; pI810->LpRing->tail = INREG(LP_RING + RING_TAIL); pI810->LpRing->space = pI810->LpRing->head - (pI810->LpRing->tail + 8); if (pI810->LpRing->space < 0) pI810->LpRing->space += pI810->LpRing->mem.Size; #if HAVE_XAA_H if (pI810->AccelInfoRec) pI810->AccelInfoRec->NeedToSync = TRUE; #endif } xf86-video-intel-2.99.917/src/legacy/i810/Makefile.am0000664000175000017500000000143612400044327016477 00000000000000SUBDIRS = xvmc noinst_LTLIBRARIES = liblegacy-i810.la AM_CFLAGS = $(CWARNFLAGS) $(XORG_CFLAGS) $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) \ -I$(top_srcdir)/src \ -I$(top_srcdir)/src/legacy \ $(NULL) liblegacy_i810_la_SOURCES = \ i810_accel.c \ i810_common.h \ i810_cursor.c \ i810_driver.c \ i810.h \ i810_memory.c \ i810_reg.h \ i810_ring.h \ i810_video.c \ i810_wmark.c if XAA liblegacy_i810_la_SOURCES += \ i810_xaa.c endif if DGA liblegacy_i810_la_SOURCES += \ i810_dga.c endif if DRI1 liblegacy_i810_la_SOURCES +=\ i810_dri.c \ i810_dri.h \ $(NULL) AM_CFLAGS += $(DRI1_CFLAGS) if XVMC liblegacy_i810_la_SOURCES += \ i810_hwmc.c \ $(NULL) endif endif xf86-video-intel-2.99.917/src/legacy/i810/i810_dga.c0000664000175000017500000001653512400044327016111 00000000000000/* * Copyright 2000 by Alan Hourihane, Sychdyn, North Wales, UK. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Alan Hourihane not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Alan Hourihane makes no representations * about the suitability of this software for any purpose. It is provided * "as is" without express or implied warranty. * * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. * * Authors: Alan Hourihane, */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "xf86Pci.h" #include "i810.h" #include "i810_reg.h" #include "dgaproc.h" #include "vgaHW.h" static Bool I810_OpenFramebuffer(ScrnInfoPtr, char **, unsigned char **, int *, int *, int *); static Bool I810_SetMode(ScrnInfoPtr, DGAModePtr); static int I810_GetViewport(ScrnInfoPtr); static void I810_SetViewport(ScrnInfoPtr, int, int, int); #ifdef HAVE_XAA_H static void I810_Sync(ScrnInfoPtr); static void I810_FillRect(ScrnInfoPtr, int, int, int, int, unsigned long); static void I810_BlitRect(ScrnInfoPtr, int, int, int, int, int, int); #endif #if 0 static void I810_BlitTransRect(ScrnInfoPtr, int, int, int, int, int, int, unsigned long); #endif static DGAFunctionRec I810DGAFuncs = { I810_OpenFramebuffer, NULL, I810_SetMode, I810_SetViewport, I810_GetViewport, #ifdef HAVE_XAA_H I810_Sync, I810_FillRect, I810_BlitRect, #else NULL, NULL, NULL, #endif #if 0 I810_BlitTransRect #else NULL #endif }; Bool I810DGAInit(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr pI810 = I810PTR(pScrn); DGAModePtr modes = NULL, newmodes = NULL, currentMode; DisplayModePtr pMode, firstMode; int Bpp = pScrn->bitsPerPixel >> 3; int num = 0; pMode = firstMode = pScrn->modes; while (pMode) { newmodes = realloc(modes, (num + 1) * sizeof(DGAModeRec)); if (!newmodes) { free(modes); return FALSE; } modes = newmodes; currentMode = modes + num; num++; currentMode->mode = pMode; currentMode->flags = DGA_CONCURRENT_ACCESS | DGA_PIXMAP_AVAILABLE; if (!pI810->noAccel) currentMode->flags |= DGA_FILL_RECT | DGA_BLIT_RECT; if (pMode->Flags & V_DBLSCAN) currentMode->flags |= DGA_DOUBLESCAN; if (pMode->Flags & V_INTERLACE) currentMode->flags |= DGA_INTERLACED; currentMode->byteOrder = pScrn->imageByteOrder; currentMode->depth = pScrn->depth; currentMode->bitsPerPixel = pScrn->bitsPerPixel; currentMode->red_mask = pScrn->mask.red; currentMode->green_mask = pScrn->mask.green; currentMode->blue_mask = pScrn->mask.blue; currentMode->visualClass = (Bpp == 1) ? PseudoColor : TrueColor; currentMode->viewportWidth = pMode->HDisplay; currentMode->viewportHeight = pMode->VDisplay; currentMode->xViewportStep = (Bpp == 3) ? 2 : 1; currentMode->yViewportStep = 1; currentMode->viewportFlags = DGA_FLIP_RETRACE; currentMode->offset = 0; currentMode->address = pI810->FbBase; currentMode->bytesPerScanline = ((pScrn->displayWidth * Bpp) + 3) & ~3L; currentMode->imageWidth = pI810->FbMemBox.x2; currentMode->imageHeight = pI810->FbMemBox.y2; currentMode->pixmapWidth = currentMode->imageWidth; currentMode->pixmapHeight = currentMode->imageHeight; currentMode->maxViewportX = currentMode->imageWidth - currentMode->viewportWidth; /* this might need to get clamped to some maximum */ currentMode->maxViewportY = currentMode->imageHeight - currentMode->viewportHeight; pMode = pMode->next; if (pMode == firstMode) break; } pI810->numDGAModes = num; pI810->DGAModes = modes; return DGAInit(pScreen, &I810DGAFuncs, modes, num); } static DisplayModePtr I810SavedDGAModes[MAXSCREENS]; static Bool I810_SetMode(ScrnInfoPtr pScrn, DGAModePtr pMode) { int index = pScrn->pScreen->myNum; I810Ptr pI810 = I810PTR(pScrn); if (!pMode) { /* restore the original mode */ if (pI810->DGAactive) { pScrn->currentMode = I810SavedDGAModes[index]; pScrn->SwitchMode(SWITCH_MODE_ARGS(pScrn, pScrn->currentMode)); pScrn->AdjustFrame(ADJUST_FRAME_ARGS(pScrn, 0, 0)); pI810->DGAactive = FALSE; } } else { if (!pI810->DGAactive) { I810SavedDGAModes[index] = pScrn->currentMode; pI810->DGAactive = TRUE; } pScrn->SwitchMode(SWITCH_MODE_ARGS(pScrn, pMode->mode)); } return TRUE; } static int I810_GetViewport(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); return pI810->DGAViewportStatus; } static void I810_SetViewport(ScrnInfoPtr pScrn, int x, int y, int flags) { I810Ptr pI810 = I810PTR(pScrn); vgaHWPtr hwp = VGAHWPTR(pScrn); pScrn->AdjustFrame(ADJUST_FRAME_ARGS(pScrn, x, y)); /* wait for retrace */ while ((hwp->readST01(hwp) & 0x08)) ; while (!(hwp->readST01(hwp) & 0x08)) ; pI810->DGAViewportStatus = 0; } #ifdef HAVE_XAA_H static void I810_FillRect(ScrnInfoPtr pScrn, int x, int y, int w, int h, unsigned long color) { I810Ptr pI810 = I810PTR(pScrn); if (pI810->AccelInfoRec) { (*pI810->AccelInfoRec->SetupForSolidFill) (pScrn, color, GXcopy, ~0); (*pI810->AccelInfoRec->SubsequentSolidFillRect) (pScrn, x, y, w, h); SET_SYNC_FLAG(pI810->AccelInfoRec); } } static void I810_Sync(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); if (pI810->AccelInfoRec) { (*pI810->AccelInfoRec->Sync) (pScrn); } } static void I810_BlitRect(ScrnInfoPtr pScrn, int srcx, int srcy, int w, int h, int dstx, int dsty) { I810Ptr pI810 = I810PTR(pScrn); if (pI810->AccelInfoRec) { int xdir = ((srcx < dstx) && (srcy == dsty)) ? -1 : 1; int ydir = (srcy < dsty) ? -1 : 1; (*pI810->AccelInfoRec->SetupForScreenToScreenCopy) (pScrn, xdir, ydir, GXcopy, ~0, -1); (*pI810->AccelInfoRec->SubsequentScreenToScreenCopy) (pScrn, srcx, srcy, dstx, dsty, w, h); SET_SYNC_FLAG(pI810->AccelInfoRec); } } #endif #if 0 static void I810_BlitTransRect(ScrnInfoPtr pScrn, int srcx, int srcy, int w, int h, int dstx, int dsty, unsigned long color) { /* this one should be separate since the XAA function would * prohibit usage of ~0 as the key */ } #endif static Bool I810_OpenFramebuffer(ScrnInfoPtr pScrn, char **name, unsigned char **mem, int *size, int *offset, int *flags) { I810Ptr pI810 = I810PTR(pScrn); *name = NULL; /* no special device */ *mem = (unsigned char *)pI810->LinearAddr; *size = pI810->FbMapSize; *offset = 0; *flags = DGA_NEED_ROOT; return TRUE; } xf86-video-intel-2.99.917/src/legacy/i810/i810_wmark.c0000664000175000017500000001665612400044327016503 00000000000000/************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * Authors: * Keith Whitwell */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "xorg-server.h" #include "xf86.h" #include "i810.h" struct wm_info { double freq; unsigned int wm; }; static struct wm_info i810_wm_8_100[] = { {0, 0x22003000}, {25.2, 0x22003000}, {28.0, 0x22003000}, {31.5, 0x22003000}, {36.0, 0x22007000}, {40.0, 0x22007000}, {45.0, 0x22007000}, {49.5, 0x22008000}, {50.0, 0x22008000}, {56.3, 0x22008000}, {65.0, 0x22008000}, {75.0, 0x22008000}, {78.8, 0x22008000}, {80.0, 0x22008000}, {94.0, 0x22008000}, {96.0, 0x22107000}, {99.0, 0x22107000}, {108.0, 0x22107000}, {121.0, 0x22107000}, {128.9, 0x22107000}, {132.0, 0x22109000}, {135.0, 0x22109000}, {157.5, 0x2210b000}, {162.0, 0x2210b000}, {175.5, 0x2210b000}, {189.0, 0x2220e000}, {202.5, 0x2220e000} }; static struct wm_info i810_wm_16_100[] = { {0, 0x22004000}, {25.2, 0x22006000}, {28.0, 0x22006000}, {31.5, 0x22007000}, {36.0, 0x22007000}, {40.0, 0x22007000}, {45.0, 0x22007000}, {49.5, 0x22009000}, {50.0, 0x22009000}, {56.3, 0x22108000}, {65.0, 0x2210e000}, {75.0, 0x2210e000}, {78.8, 0x2210e000}, {80.0, 0x22210000}, {94.5, 0x22210000}, {96.0, 0x22210000}, {99.0, 0x22210000}, {108.0, 0x22210000}, {121.0, 0x22210000}, {128.9, 0x22210000}, {132.0, 0x22314000}, {135.0, 0x22314000}, {157.5, 0x22415000}, {162.0, 0x22416000}, {175.5, 0x22416000}, {189.0, 0x22416000}, {195.0, 0x22416000}, {202.5, 0x22416000} }; static struct wm_info i810_wm_24_100[] = { {0, 0x22006000}, {25.2, 0x22009000}, {28.0, 0x22009000}, {31.5, 0x2200a000}, {36.0, 0x2210c000}, {40.0, 0x2210c000}, {45.0, 0x2210c000}, {49.5, 0x22111000}, {50.0, 0x22111000}, {56.3, 0x22111000}, {65.0, 0x22214000}, {75.0, 0x22214000}, {78.8, 0x22215000}, {80.0, 0x22216000}, {94.5, 0x22218000}, {96.0, 0x22418000}, {99.0, 0x22418000}, {108.0, 0x22418000}, {121.0, 0x22418000}, {128.9, 0x22419000}, {132.0, 0x22519000}, {135.0, 0x4441d000}, {157.5, 0x44419000}, {162.0, 0x44419000}, {175.5, 0x44419000}, {189.0, 0x44419000}, {195.0, 0x44419000}, {202.5, 0x44419000} }; #if 0 /* not used */ static struct wm_info i810_wm_32_100[] = { {0, 0x2210b000}, {60, 0x22415000}, /* 0x314000 works too */ {80, 0x22419000} /* 0x518000 works too */ }; #endif static struct wm_info i810_wm_8_133[] = { {0, 0x22003000}, {25.2, 0x22003000}, {28.0, 0x22003000}, {31.5, 0x22003000}, {36.0, 0x22007000}, {40.0, 0x22007000}, {45.0, 0x22007000}, {49.5, 0x22008000}, {50.0, 0x22008000}, {56.3, 0x22008000}, {65.0, 0x22008000}, {75.0, 0x22008000}, {78.8, 0x22008000}, {80.0, 0x22008000}, {94.0, 0x22008000}, {96.0, 0x22107000}, {99.0, 0x22107000}, {108.0, 0x22107000}, {121.0, 0x22107000}, {128.9, 0x22107000}, {132.0, 0x22109000}, {135.0, 0x22109000}, {157.5, 0x2210b000}, {162.0, 0x2210b000}, {175.5, 0x2210b000}, {189.0, 0x2220e000}, {202.5, 0x2220e000} }; static struct wm_info i810_wm_16_133[] = { {0, 0x22004000}, {25.2, 0x22006000}, {28.0, 0x22006000}, {31.5, 0x22007000}, {36.0, 0x22007000}, {40.0, 0x22007000}, {45.0, 0x22007000}, {49.5, 0x22009000}, {50.0, 0x22009000}, {56.3, 0x22108000}, {65.0, 0x2210e000}, {75.0, 0x2210e000}, {78.8, 0x2210e000}, {80.0, 0x22210000}, {94.5, 0x22210000}, {96.0, 0x22210000}, {99.0, 0x22210000}, {108.0, 0x22210000}, {121.0, 0x22210000}, {128.9, 0x22210000}, {132.0, 0x22314000}, {135.0, 0x22314000}, {157.5, 0x22415000}, {162.0, 0x22416000}, {175.5, 0x22416000}, {189.0, 0x22416000}, {195.0, 0x22416000}, {202.5, 0x22416000} }; static struct wm_info i810_wm_24_133[] = { {0, 0x22006000}, {25.2, 0x22009000}, {28.0, 0x22009000}, {31.5, 0x2200a000}, {36.0, 0x2210c000}, {40.0, 0x2210c000}, {45.0, 0x2210c000}, {49.5, 0x22111000}, {50.0, 0x22111000}, {56.3, 0x22111000}, {65.0, 0x22214000}, {75.0, 0x22214000}, {78.8, 0x22215000}, {80.0, 0x22216000}, {94.5, 0x22218000}, {96.0, 0x22418000}, {99.0, 0x22418000}, {108.0, 0x22418000}, {121.0, 0x22418000}, {128.9, 0x22419000}, {132.0, 0x22519000}, {135.0, 0x4441d000}, {157.5, 0x44419000}, {162.0, 0x44419000}, {175.5, 0x44419000}, {189.0, 0x44419000}, {195.0, 0x44419000}, {202.5, 0x44419000} }; #define Elements(x) (sizeof(x)/sizeof(*x)) /* * I810CalcFIFO -- * * Calculate burst length and FIFO watermark. */ unsigned int I810CalcWatermark(ScrnInfoPtr pScrn, double freq, Bool dcache) { I810Ptr pI810 = I810PTR(pScrn); struct wm_info *tab; int nr; int i; if (pI810->LmFreqSel == 100) { switch (pScrn->bitsPerPixel) { case 8: tab = i810_wm_8_100; nr = Elements(i810_wm_8_100); break; case 16: tab = i810_wm_16_100; nr = Elements(i810_wm_16_100); break; case 24: tab = i810_wm_24_100; nr = Elements(i810_wm_24_100); break; default: return 0; } } else { switch (pScrn->bitsPerPixel) { case 8: tab = i810_wm_8_133; nr = Elements(i810_wm_8_133); break; case 16: tab = i810_wm_16_133; nr = Elements(i810_wm_16_133); break; case 24: tab = i810_wm_24_133; nr = Elements(i810_wm_24_133); break; default: return 0; } } for (i = 0; i < nr && tab[i].freq < freq; i++) ; if (i == nr) i--; xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "chose watermark 0x%x: (tab.freq %.1f)\n", tab[i].wm, tab[i].freq); /* None of these values (sourced from intel) have watermarks for * the dcache memory. Fake it for now by using the same watermark * for both... * * Update: this is probably because dcache isn't real useful as * framebuffer memory, so intel's drivers don't need watermarks * for that memory because they never use it to feed the ramdacs. * We do use it in the fallback mode, so keep the watermarks for * now. */ if (dcache) return (tab[i].wm & ~0xffffff) | ((tab[i].wm >> 12) & 0xfff); else return tab[i].wm; } xf86-video-intel-2.99.917/src/legacy/i810/i810_hwmc.c0000664000175000017500000002675512400044327016321 00000000000000/*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * i810_hwmc.c: i810 HWMC Driver * * Authors: * Matt Sottek * * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "compiler.h" #include "xf86Pci.h" #include "xf86fbman.h" #include "regionstr.h" #include "i810.h" #include "i810_dri.h" #include "xf86xv.h" #include "xf86xvmc.h" #include #include #include "dixstruct.h" #include "fourcc.h" int I810XvMCCreateContext (ScrnInfoPtr pScrn, XvMCContextPtr pContext, int *num_priv, long **priv ); void I810XvMCDestroyContext (ScrnInfoPtr pScrn, XvMCContextPtr pContext); int I810XvMCCreateSurface (ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf, int *num_priv, long **priv ); void I810XvMCDestroySurface (ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf); int I810XvMCCreateSubpicture (ScrnInfoPtr pScrn, XvMCSubpicturePtr pSurf, int *num_priv, long **priv ); void I810XvMCDestroySubpicture (ScrnInfoPtr pScrn, XvMCSubpicturePtr pSurf); typedef struct { drm_context_t drmcontext; unsigned int fbBase; unsigned int OverlayOffset; unsigned int OverlaySize; unsigned int SurfacesOffset; unsigned int SurfacesSize; char busIdString[10]; char pad[2]; } I810XvMCCreateContextRec; static int yv12_subpicture_index_list[2] = { FOURCC_IA44, FOURCC_AI44 }; static XF86MCImageIDList yv12_subpicture_list = { 2, yv12_subpicture_index_list }; static XF86MCSurfaceInfoRec i810_YV12_mpg2_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 720, 576, 720, 576, XVMC_MPEG_2, XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING | XVMC_INTRA_UNSIGNED, &yv12_subpicture_list }; static XF86MCSurfaceInfoRec i810_YV12_mpg1_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 720, 576, 720, 576, XVMC_MPEG_1, XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING | XVMC_INTRA_UNSIGNED, &yv12_subpicture_list }; static XF86MCSurfaceInfoPtr ppSI[2] = { (XF86MCSurfaceInfoPtr)&i810_YV12_mpg2_surface, (XF86MCSurfaceInfoPtr)&i810_YV12_mpg1_surface }; /* List of subpicture types that we support */ static XF86ImageRec ia44_subpicture = XVIMAGE_IA44; static XF86ImageRec ai44_subpicture = XVIMAGE_AI44; static XF86ImagePtr i810_subpicture_list[2] = { (XF86ImagePtr)&ia44_subpicture, (XF86ImagePtr)&ai44_subpicture }; /* Fill in the device dependent adaptor record. * This is named "I810 Video Overlay" because this code falls under the * XV extenstion, the name must match or it won't be used. * * Surface and Subpicture - see above * Function pointers to functions below */ static XF86MCAdaptorRec pAdapt = { "I810 Video Overlay", /* name */ 2, /* num_surfaces */ ppSI, /* surfaces */ 2, /* num_subpictures */ i810_subpicture_list, /* subpictures */ (xf86XvMCCreateContextProcPtr)I810XvMCCreateContext, (xf86XvMCDestroyContextProcPtr)I810XvMCDestroyContext, (xf86XvMCCreateSurfaceProcPtr)I810XvMCCreateSurface, (xf86XvMCDestroySurfaceProcPtr)I810XvMCDestroySurface, (xf86XvMCCreateSubpictureProcPtr)I810XvMCCreateSubpicture, (xf86XvMCDestroySubpictureProcPtr)I810XvMCDestroySubpicture }; static XF86MCAdaptorPtr ppAdapt[1] = { (XF86MCAdaptorPtr)&pAdapt }; /************************************************************************** * * I810InitMC * * Initialize the hardware motion compenstation extention for this * hardware. The initialization routines want the address of the pointers * to the structures, not the address of the structures. This means we * allocate (or create static?) the pointer memory and pass that * address. This seems a little convoluted. * * We need to allocate memory for the device depended adaptor record. * This is what holds the pointers to all our device functions. * * We need to map the overlay registers into the drm. * * We need to map the surfaces into the drm. * * Inputs: * Screen pointer * * Outputs: * None, this calls the device independent screen initialization * function. * * Revisions: * **************************************************************************/ void I810InitMC(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr pI810 = I810PTR(pScrn); int i; /* Clear the Surface Allocation */ for(i=0; isurfaceAllocation[i] = 0; } /* Cursor is at a page boundary, Overlay regs are not, don't forget */ if (drmAddMap(pI810->drmSubFD, (drm_handle_t)pI810->CursorStart, 4096, DRM_AGP, 0, (drmAddress) &pI810->overlay_map) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "drmAddMap(overlay) failed\n"); return; } if (drmAddMap(pI810->drmSubFD, (drm_handle_t)pI810->MC.Start, pI810->MC.Size, DRM_AGP, 0, (drmAddress) &pI810->mc_map) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "drmAddMap(MC) failed\n"); return; } xf86XvMCScreenInit(pScreen, 1, ppAdapt); } /************************************************************************** * * I810XvMCCreateContext * * Some info about the private data: * * Set *num_priv to the number of 32bit words that make up the size of * of the data that priv will point to. * * *priv = (long *) calloc (elements, sizeof(element)) * *num_priv = (elements * sizeof(element)) >> 2; * **************************************************************************/ int I810XvMCCreateContext (ScrnInfoPtr pScrn, XvMCContextPtr pContext, int *num_priv, long **priv ) { I810Ptr pI810 = I810PTR(pScrn); DRIInfoPtr pDRIInfo = pI810->pDRIInfo; I810XvMCCreateContextRec *contextRec; if(!pI810->directRenderingEnabled) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "I810XvMCCreateContext: Cannot use XvMC without DRI!\n"); return BadAlloc; } /* Context Already in use! */ if(pI810->xvmcContext) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "I810XvMCCreateContext: 2 XvMC Contexts Attempted, not supported.\n"); return BadAlloc; } *priv = calloc(1,sizeof(I810XvMCCreateContextRec)); contextRec = (I810XvMCCreateContextRec *)*priv; if(!*priv) { *num_priv = 0; return BadAlloc; } *num_priv = sizeof(I810XvMCCreateContextRec) >> 2; if(drmCreateContext(pI810->drmSubFD, &(contextRec->drmcontext) ) < 0) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "I810XvMCCreateContext: Unable to create DRMContext!\n"); free(*priv); return BadAlloc; } drmAuthMagic(pI810->drmSubFD, pContext->flags); pI810->xvmcContext = contextRec->drmcontext; contextRec->fbBase = pScrn->memPhysBase; /* Overlay Regs are at 1024 offset into the Cursor Space */ contextRec->OverlayOffset = pI810->CursorStart; contextRec->OverlaySize = 4096; contextRec->SurfacesOffset = pI810->MC.Start; contextRec->SurfacesSize = pI810->MC.Size; strncpy (contextRec->busIdString, pDRIInfo->busIdString, 9); return Success; } int I810XvMCCreateSurface (ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf, int *num_priv, long **priv ) { I810Ptr pI810 = I810PTR(pScrn); int i; *priv = (long *)calloc(2,sizeof(long)); if(!*priv) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "I810XvMCCreateSurface: Unable to allocate memory!\n"); *num_priv = 0; return BadAlloc; } *num_priv = 2; /* Surface Arrangement is different based on 6 or 7 Surfaces */ if(pI810->numSurfaces == 6) { for(i=0; inumSurfaces; i++) { if(!pI810->surfaceAllocation[i]) { pI810->surfaceAllocation[i] = pSurf->surface_id; /* Y data starts at 2MB offset, each surface is 576k */ (*priv)[0] = (2*1024*1024 + 576*1024 * i); /* UV data starts at 0 offset, each set is 288k */ (*priv)[1] = (576*512 * i); return Success; } } } if(pI810->numSurfaces == 7) { for(i=0; inumSurfaces; i++) { if(!pI810->surfaceAllocation[i]) { pI810->surfaceAllocation[i] = pSurf->surface_id; /* Y data starts at 2.5MB offset, each surface is 576k */ (*priv)[0] = (2*1024*1024 + 512*1024 + 576*1024 * i); /* UV data starts at 0 offset, each set is 288k */ (*priv)[1] = (576*512 * i); return Success; } } } (*priv)[0] = 0; (*priv)[1] = 0; return BadAlloc; } int I810XvMCCreateSubpicture (ScrnInfoPtr pScrn, XvMCSubpicturePtr pSubp, int *num_priv, long **priv ) { I810Ptr pI810 = I810PTR(pScrn); int i; *priv = (long *)calloc(1,sizeof(long)); if(!*priv) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "I810XvMCCreateSubpicture: Unable to allocate memory!\n"); *num_priv = 0; return BadAlloc; } *num_priv = 1; if(pI810->numSurfaces == 6) { for(i=6; i<8; i++) { if(!pI810->surfaceAllocation[i]) { pI810->surfaceAllocation[i] = pSubp->subpicture_id; /* Subpictures are after the Y surfaces in memory */ (*priv)[0] = (2*1024*1024 + 576*1024 * i); return Success; } } } if(pI810->numSurfaces == 7) { for(i=7; i<9; i++) { if(!pI810->surfaceAllocation[i]) { pI810->surfaceAllocation[i] = pSubp->subpicture_id; /* Subpictures are after the Y surfaces in memory */ (*priv)[0] = (2*1024*1024 + 512*1024 + 576*1024 * i); return Success; } } } (*priv)[0] = 0; return BadAlloc; } void I810XvMCDestroyContext (ScrnInfoPtr pScrn, XvMCContextPtr pContext) { I810Ptr pI810 = I810PTR(pScrn); drmDestroyContext(pI810->drmSubFD,pI810->xvmcContext); pI810->xvmcContext = 0; } void I810XvMCDestroySurface (ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf) { I810Ptr pI810 = I810PTR(pScrn); int i; for(i=0; isurfaceAllocation[i] == pSurf->surface_id) { pI810->surfaceAllocation[i] = 0; return; } } return; } void I810XvMCDestroySubpicture (ScrnInfoPtr pScrn, XvMCSubpicturePtr pSubp) { I810Ptr pI810 = I810PTR(pScrn); int i; for(i=pI810->numSurfaces; isurfaceAllocation[i] == pSubp->subpicture_id) { pI810->surfaceAllocation[i] = 0; return; } } return; } xf86-video-intel-2.99.917/src/legacy/i810/i810_dri.h0000664000175000017500000000661112244635610016142 00000000000000 #ifndef _I810_DRI_ #define _I810_DRI_ #include "xf86drm.h" #include "i810_common.h" #define I810_MAX_DRAWABLES 256 #define I810_MAJOR_VERSION 1 #define I810_MINOR_VERSION 7 #define I810_PATCHLEVEL 4 typedef struct { drm_handle_t regs; drmSize regsSize; drmSize backbufferSize; drm_handle_t backbuffer; drmSize depthbufferSize; drm_handle_t depthbuffer; drm_handle_t textures; int textureSize; drm_handle_t agp_buffers; drmSize agp_buf_size; int deviceID; int width; int height; int mem; int cpp; int bitsPerPixel; int fbOffset; int fbStride; int backOffset; int depthOffset; int auxPitch; int auxPitchBits; int logTextureGranularity; int textureOffset; /* For non-dma direct rendering. */ int ringOffset; int ringSize; drmBufMapPtr drmBufs; int irq; unsigned int sarea_priv_offset; } I810DRIRec, *I810DRIPtr; /* WARNING: Do not change the SAREA structure without changing the kernel * as well */ #define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ #define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ #define I810_UPLOAD_CTX 0x4 #define I810_UPLOAD_BUFFERS 0x8 #define I810_UPLOAD_TEX0 0x10 #define I810_UPLOAD_TEX1 0x20 #define I810_UPLOAD_CLIPRECTS 0x40 typedef struct { unsigned char next, prev; /* indices to form a circular LRU */ unsigned char in_use; /* owned by a client, or free? */ int age; /* tracked by clients to update local LRU's */ } I810TexRegionRec, *I810TexRegionPtr; typedef struct { unsigned int ContextState[I810_CTX_SETUP_SIZE]; unsigned int BufferState[I810_DEST_SETUP_SIZE]; unsigned int TexState[2][I810_TEX_SETUP_SIZE]; unsigned int dirty; unsigned int nbox; drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS]; /* Maintain an LRU of contiguous regions of texture space. If * you think you own a region of texture memory, and it has an * age different to the one you set, then you are mistaken and * it has been stolen by another client. If global texAge * hasn't changed, there is no need to walk the list. * * These regions can be used as a proxy for the fine-grained * texture information of other clients - by maintaining them * in the same lru which is used to age their own textures, * clients have an approximate lru for the whole of global * texture space, and can make informed decisions as to which * areas to kick out. There is no need to choose whether to * kick out your own texture or someone else's - simply eject * them all in LRU order. */ drmTextureRegion texList[I810_NR_TEX_REGIONS + 1]; /* Last elt is sentinal */ int texAge; /* last time texture was uploaded */ int last_enqueue; /* last time a buffer was enqueued */ int last_dispatch; /* age of the most recently dispatched buffer */ int last_quiescent; /* */ int ctxOwner; /* last context to upload state */ int vertex_prim; int pf_enabled; /* is pageflipping allowed? */ int pf_active; /* is pageflipping active right now? */ int pf_current_page; /* which buffer is being displayed? */ } I810SAREARec, *I810SAREAPtr; typedef struct { /* Nothing here yet */ int dummy; } I810ConfigPrivRec, *I810ConfigPrivPtr; typedef struct { /* Nothing here yet */ int dummy; } I810DRIContextRec, *I810DRIContextPtr; #endif xf86-video-intel-2.99.917/src/legacy/i810/i810_memory.c0000664000175000017500000002566012400044327016665 00000000000000/************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif /* * Authors: * Keith Whitwell * */ #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "i810.h" #include "i810_reg.h" int I810AllocLow(I810MemRange * result, I810MemRange * pool, int size) { if (size > (long)pool->Size) return 0; pool->Size -= size; result->Size = size; result->Start = pool->Start; result->End = pool->Start += size; return 1; } int I810AllocHigh(I810MemRange * result, I810MemRange * pool, int size) { if (size > (long)pool->Size) return 0; pool->Size -= size; result->Size = size; result->End = pool->End; result->Start = pool->End -= size; return 1; } int I810AllocateGARTMemory(ScrnInfoPtr pScrn) { unsigned long size = pScrn->videoRam * 1024UL; I810Ptr pI810 = I810PTR(pScrn); int key; long tom = 0; unsigned long physical; if (!xf86AgpGARTSupported() || !xf86AcquireGART(pScrn->scrnIndex)) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "AGP GART support is either not available or cannot be used.\n" "\tMake sure your kernel has agpgart support or has the\n" "\tagpgart module loaded.\n"); return FALSE; } /* This allows the 2d only Xserver to regen */ pI810->agpAcquired2d = TRUE; /* * I810/I815 * * Treat the gart like video memory - we assume we own all that is * there, so ignore EBUSY errors. Don't try to remove it on * failure, either, as other X server may be using it. */ if ((key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 0, NULL)) == -1) return FALSE; pI810->VramOffset = 0; pI810->VramKey = key; if (!xf86BindGARTMemory(pScrn->scrnIndex, key, 0)) return FALSE; pI810->SysMem.Start = 0; pI810->SysMem.Size = size; pI810->SysMem.End = size; pI810->SavedSysMem = pI810->SysMem; tom = pI810->SysMem.End; pI810->DcacheMem.Start = 0; pI810->DcacheMem.End = 0; pI810->DcacheMem.Size = 0; pI810->CursorPhysical = 0; pI810->CursorARGBPhysical = 0; /* * Dcache - half the speed of normal ram, so not really useful for * a 2d server. Don't bother reporting its presence. This is * mapped in addition to the requested amount of system ram. */ size = 1024 * 4096; /* * Keep it 512K aligned for the sake of tiled regions. */ tom += 0x7ffff; tom &= ~0x7ffff; if ((key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 1, NULL)) != -1) { pI810->DcacheOffset = tom; pI810->DcacheKey = key; if (!xf86BindGARTMemory(pScrn->scrnIndex, key, tom)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Allocation of %ld bytes for DCACHE failed\n", size); pI810->DcacheKey = -1; } else { pI810->DcacheMem.Start = tom; pI810->DcacheMem.Size = size; pI810->DcacheMem.End = pI810->DcacheMem.Start + pI810->DcacheMem.Size; tom = pI810->DcacheMem.End; } } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "No physical memory available for %ld bytes of DCACHE\n", size); pI810->DcacheKey = -1; } /* * Mouse cursor -- The i810 (crazy) needs a physical address in * system memory from which to upload the cursor. We get this from * the agpgart module using a special memory type. */ /* * 4k for the cursor is excessive, I'm going to steal 3k for * overlay registers later */ size = 4096; if ((key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 2, &physical)) == -1) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "No physical memory available for HW cursor\n"); pI810->HwcursKey = -1; pI810->CursorStart = 0; } else { pI810->HwcursOffset = tom; pI810->HwcursKey = key; if (!xf86BindGARTMemory(pScrn->scrnIndex, key, tom)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Allocation of %ld bytes for HW cursor failed\n", size); pI810->HwcursKey = -1; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Allocated of %ld bytes for HW cursor\n", size); pI810->CursorPhysical = physical; pI810->CursorStart = tom; tom += size; } } /* * 16k for the ARGB cursor */ size = 16384; if ((key = xf86AllocateGARTMemory(pScrn->scrnIndex, size, 2, &physical)) == -1) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "No physical memory available for ARGB HW cursor\n"); pI810->ARGBHwcursKey = -1; pI810->CursorARGBStart = 0; } else { pI810->ARGBHwcursOffset = tom; pI810->ARGBHwcursKey = key; if (!xf86BindGARTMemory(pScrn->scrnIndex, key, tom)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Allocation of %ld bytes for ARGB HW cursor failed\n", size); pI810->ARGBHwcursKey = -1; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Allocated of %ld bytes for ARGB HW cursor\n", size); pI810->CursorARGBPhysical = physical; pI810->CursorARGBStart = tom; tom += size; } } /* * Overlay register buffer -- Just like the cursor, the i810 needs a * physical address in system memory from which to upload the overlay * registers. */ if (pI810->CursorStart != 0) { pI810->OverlayPhysical = pI810->CursorPhysical + 1024; pI810->OverlayStart = pI810->CursorStart + 1024; } pI810->GttBound = 1; return TRUE; } /* Tiled memory is good... really, really good... * * Need to make it less likely that we miss out on this - probably * need to move the frontbuffer away from the 'guarenteed' alignment * of the first memory segment, or perhaps allocate a discontigous * framebuffer to get more alignment 'sweet spots'. */ void I810SetTiledMemory(ScrnInfoPtr pScrn, int nr, unsigned int start, unsigned int pitch, unsigned int size) { I810Ptr pI810 = I810PTR(pScrn); I810RegPtr i810Reg = &pI810->ModeReg; uint32_t val; uint32_t fence_mask = 0; if (nr < 0 || nr > 7) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "%s - fence %d out of range\n", "I810SetTiledMemory", nr); return; } i810Reg->Fence[nr] = 0; fence_mask = ~FENCE_START_MASK; if (start & fence_mask) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "%s %d: start (%x) is not 512k aligned\n", "I810SetTiledMemory", nr, start); return; } if (start % size) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "%s %d: start (%x) is not size (%x) aligned\n", "I810SetTiledMemory", nr, start, size); return; } if (pitch & 127) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "%s %d: pitch (%x) not a multiple of 128 bytes\n", "I810SetTiledMemory", nr, pitch); return; } val = (start | FENCE_X_MAJOR | FENCE_VALID); switch (size) { case KB(512): val |= FENCE_SIZE_512K; break; case MB(1): val |= FENCE_SIZE_1M; break; case MB(2): val |= FENCE_SIZE_2M; break; case MB(4): val |= FENCE_SIZE_4M; break; case MB(8): val |= FENCE_SIZE_8M; break; case MB(16): val |= FENCE_SIZE_16M; break; case MB(32): val |= FENCE_SIZE_32M; break; default: xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "%s %d: illegal size (0x%x)\n", "I810SetTiledMemory", nr, size); return; } switch (pitch / 128) { case 1: val |= FENCE_PITCH_1; break; case 2: val |= FENCE_PITCH_2; break; case 4: val |= FENCE_PITCH_4; break; case 8: val |= FENCE_PITCH_8; break; case 16: val |= FENCE_PITCH_16; break; case 32: val |= FENCE_PITCH_32; break; default: xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "%s %d: illegal size (0x%x)\n", "I810SetTiledMemory", nr, size); return; } i810Reg->Fence[nr] = val; } Bool I810BindGARTMemory(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); if (xf86AgpGARTSupported() && !pI810->directRenderingEnabled && !pI810->GttBound) { if (!xf86AcquireGART(pScrn->scrnIndex)) return FALSE; if (pI810->VramKey != -1 && !xf86BindGARTMemory(pScrn->scrnIndex, pI810->VramKey, pI810->VramOffset)) return FALSE; if (pI810->DcacheKey != -1 && !xf86BindGARTMemory(pScrn->scrnIndex, pI810->DcacheKey, pI810->DcacheOffset)) return FALSE; if (pI810->HwcursKey != -1 && !xf86BindGARTMemory(pScrn->scrnIndex, pI810->HwcursKey, pI810->HwcursOffset)) return FALSE; if (pI810->ARGBHwcursKey != -1 && !xf86BindGARTMemory(pScrn->scrnIndex, pI810->ARGBHwcursKey, pI810->ARGBHwcursOffset)) return FALSE; pI810->GttBound = 1; } return TRUE; } Bool I810UnbindGARTMemory(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); if (xf86AgpGARTSupported() && !pI810->directRenderingEnabled && pI810->GttBound) { if (pI810->VramKey != -1 && !xf86UnbindGARTMemory(pScrn->scrnIndex, pI810->VramKey)) return FALSE; if (pI810->DcacheKey != -1 && !xf86UnbindGARTMemory(pScrn->scrnIndex, pI810->DcacheKey)) return FALSE; if (pI810->HwcursKey != -1 && !xf86UnbindGARTMemory(pScrn->scrnIndex, pI810->HwcursKey)) return FALSE; if (pI810->ARGBHwcursKey != -1 && !xf86UnbindGARTMemory(pScrn->scrnIndex, pI810->ARGBHwcursKey)) return FALSE; if (!xf86ReleaseGART(pScrn->scrnIndex)) return FALSE; pI810->GttBound = 0; } return TRUE; } int I810CheckAvailableMemory(ScrnInfoPtr pScrn) { AgpInfoPtr agpinf; int maxPages; if (!xf86AgpGARTSupported() || !xf86AcquireGART(pScrn->scrnIndex) || (agpinf = xf86GetAGPInfo(pScrn->scrnIndex)) == NULL || !xf86ReleaseGART(pScrn->scrnIndex)) return -1; maxPages = agpinf->totalPages - agpinf->usedPages; xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 2, "%s: %dk available\n", "I810CheckAvailableMemory", maxPages * 4); return maxPages * 4; } xf86-video-intel-2.99.917/src/legacy/i810/i810_video.c0000664000175000017500000010731212400044327016456 00000000000000/*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * i810_video.c: i810 Xv driver. Based on the mga Xv driver by Mark Vojkovich. * * Authors: * Jonathan Bian * Offscreen Images: * Matt Sottek */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "compiler.h" #include "xf86Pci.h" #include "xf86fbman.h" #include "regionstr.h" #include "i810.h" #include "xf86xv.h" #include #include "dixstruct.h" #include "fourcc.h" #define OFF_DELAY 250 /* milliseconds */ #define FREE_DELAY 15000 #define OFF_TIMER 0x01 #define FREE_TIMER 0x02 #define CLIENT_VIDEO_ON 0x04 #define TIMER_MASK (OFF_TIMER | FREE_TIMER) static void I810InitOffscreenImages(ScreenPtr); static XF86VideoAdaptorPtr I810SetupImageVideo(ScreenPtr); static void I810StopVideo(ScrnInfoPtr, pointer, Bool); static int I810SetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer); static int I810GetPortAttribute(ScrnInfoPtr, Atom ,INT32 *, pointer); static void I810QueryBestSize(ScrnInfoPtr, Bool, short, short, short, short, unsigned int *, unsigned int *, pointer); static int I810PutImage( ScrnInfoPtr, short, short, short, short, short, short, short, short, int, unsigned char*, short, short, Bool, RegionPtr, pointer, DrawablePtr); static int I810QueryImageAttributes(ScrnInfoPtr, int, unsigned short *, unsigned short *, int *, int *); static void I810BlockHandler(BLOCKHANDLER_ARGS_DECL); #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE) static Atom xvBrightness, xvContrast, xvColorKey; #define IMAGE_MAX_WIDTH 1440 #define IMAGE_FAST_WIDTH 720 #define IMAGE_MAX_HEIGHT 1080 #define Y_BUF_SIZE (IMAGE_MAX_WIDTH * IMAGE_MAX_HEIGHT) #define OVERLAY_UPDATE(p) OUTREG(0x30000, p | 0x80000000); /* * OV0CMD - Overlay Command Register */ #define VERTICAL_CHROMINANCE_FILTER 0x70000000 #define VC_SCALING_OFF 0x00000000 #define VC_LINE_REPLICATION 0x10000000 #define VC_UP_INTERPOLATION 0x20000000 #define VC_PIXEL_DROPPING 0x50000000 #define VC_DOWN_INTERPOLATION 0x60000000 #define VERTICAL_LUMINANCE_FILTER 0x0E000000 #define VL_SCALING_OFF 0x00000000 #define VL_LINE_REPLICATION 0x02000000 #define VL_UP_INTERPOLATION 0x04000000 #define VL_PIXEL_DROPPING 0x0A000000 #define VL_DOWN_INTERPOLATION 0x0C000000 #define HORIZONTAL_CHROMINANCE_FILTER 0x01C00000 #define HC_SCALING_OFF 0x00000000 #define HC_LINE_REPLICATION 0x00400000 #define HC_UP_INTERPOLATION 0x00800000 #define HC_PIXEL_DROPPING 0x01400000 #define HC_DOWN_INTERPOLATION 0x01800000 #define HORIZONTAL_LUMINANCE_FILTER 0x00380000 #define HL_SCALING_OFF 0x00000000 #define HL_LINE_REPLICATION 0x00080000 #define HL_UP_INTERPOLATION 0x00100000 #define HL_PIXEL_DROPPING 0x00280000 #define HL_DOWN_INTERPOLATION 0x00300000 #define Y_ADJUST 0x00010000 #define OV_BYTE_ORDER 0x0000C000 #define UV_SWAP 0x00004000 #define Y_SWAP 0x00008000 #define Y_AND_UV_SWAP 0x0000C000 #define SOURCE_FORMAT 0x00003C00 #define RGB_555 0x00000800 #define RGB_565 0x00000C00 #define YUV_422 0x00002000 #define YUV_411 0x00002400 #define YUV_420 0x00003000 #define YUV_410 0x00003800 #define BUFFER_AND_FIELD 0x00000006 #define BUFFER0_FIELD0 0x00000000 #define BUFFER1_FIELD0 0x00000004 #define OVERLAY_ENABLE 0x00000001 #define UV_VERT_BUF1 0x02 #define UV_VERT_BUF0 0x04 /* * DOV0STA - Display/Overlay 0 Status Register */ #define DOV0STA 0x30008 #define MINUV_SCALE 0x1 #define RGB16ToColorKey(c) \ (((c & 0xF800) << 8) | ((c & 0x07E0) << 5) | ((c & 0x001F) << 3)) #define RGB15ToColorKey(c) \ (((c & 0x7c00) << 9) | ((c & 0x03E0) << 6) | ((c & 0x001F) << 3)) void I810InitVideo(ScreenPtr screen) { ScrnInfoPtr pScrn = xf86ScreenToScrn(screen); XF86VideoAdaptorPtr *adaptors = NULL; int num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors); if (pScrn->bitsPerPixel != 8) { XF86VideoAdaptorPtr newAdaptor; newAdaptor = I810SetupImageVideo(screen); I810InitOffscreenImages(screen); if (newAdaptor) { XF86VideoAdaptorPtr *newAdaptors; newAdaptors = realloc(adaptors, (num_adaptors + 1) * sizeof(XF86VideoAdaptorPtr)); if (newAdaptors != NULL) { newAdaptors[num_adaptors++] = newAdaptor; adaptors = newAdaptors; } } } if (num_adaptors) xf86XVScreenInit(screen, adaptors, num_adaptors); free(adaptors); } /* *INDENT-OFF* */ /* client libraries expect an encoding */ static XF86VideoEncodingRec DummyEncoding[1] = { { 0, "XV_IMAGE", IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT, {1, 1} } }; #define NUM_FORMATS 3 static XF86VideoFormatRec Formats[NUM_FORMATS] = { {15, TrueColor}, {16, TrueColor}, {24, TrueColor} }; #define NUM_ATTRIBUTES 3 static XF86AttributeRec Attributes[NUM_ATTRIBUTES] = { {XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"}, {XvSettable | XvGettable, -128, 127, "XV_BRIGHTNESS"}, {XvSettable | XvGettable, 0, 255, "XV_CONTRAST"} }; #define NUM_IMAGES 6 #define I810_RV15 0x35315652 #define I810_RV16 0x36315652 static XF86ImageRec Images[NUM_IMAGES] = { { I810_RV15, XvRGB, LSBFirst, {'R','V','1','5', 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, 16, XvPacked, 1, 15, 0x7C00, 0x03E0, 0x001F, 0, 0, 0, 0, 0, 0, 0, 0, 0, {'R','V','B',0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, XvTopToBottom }, { I810_RV16, XvRGB, LSBFirst, {'R','V','1','6', 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, 16, XvPacked, 1, 16, 0xF800, 0x07E0, 0x001F, 0, 0, 0, 0, 0, 0, 0, 0, 0, {'R','V','B',0, 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, XvTopToBottom }, XVIMAGE_YUY2, XVIMAGE_YV12, XVIMAGE_I420, XVIMAGE_UYVY }; /* *INDENT-ON* */ typedef struct { uint32_t OBUF_0Y; uint32_t OBUF_1Y; uint32_t OBUF_0U; uint32_t OBUF_0V; uint32_t OBUF_1U; uint32_t OBUF_1V; uint32_t OV0STRIDE; uint32_t YRGB_VPH; uint32_t UV_VPH; uint32_t HORZ_PH; uint32_t INIT_PH; uint32_t DWINPOS; uint32_t DWINSZ; uint32_t SWID; uint32_t SWIDQW; uint32_t SHEIGHT; uint32_t YRGBSCALE; uint32_t UVSCALE; uint32_t OV0CLRC0; uint32_t OV0CLRC1; uint32_t DCLRKV; uint32_t DCLRKM; uint32_t SCLRKVH; uint32_t SCLRKVL; uint32_t SCLRKM; uint32_t OV0CONF; uint32_t OV0CMD; } I810OverlayRegRec, *I810OverlayRegPtr; typedef struct { uint32_t YBuf0offset; uint32_t UBuf0offset; uint32_t VBuf0offset; uint32_t YBuf1offset; uint32_t UBuf1offset; uint32_t VBuf1offset; unsigned char currentBuf; int brightness; int contrast; RegionRec clip; uint32_t colorKey; uint32_t videoStatus; Time offTime; Time freeTime; FBLinearPtr linear; } I810PortPrivRec, *I810PortPrivPtr; #define GET_PORT_PRIVATE(pScrn) \ (I810PortPrivPtr)((I810PTR(pScrn))->adaptor->pPortPrivates[0].ptr) static void I810ResetVideo(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); I810PortPrivPtr pPriv = pI810->adaptor->pPortPrivates[0].ptr; I810OverlayRegPtr overlay = (I810OverlayRegPtr) (pI810->FbBase + pI810->OverlayStart); /* * Default to maximum image size in YV12 */ overlay->YRGB_VPH = 0; overlay->UV_VPH = 0; overlay->HORZ_PH = 0; overlay->INIT_PH = 0; overlay->DWINPOS = 0; overlay->DWINSZ = (IMAGE_MAX_HEIGHT << 16) | IMAGE_MAX_WIDTH; overlay->SWID = IMAGE_MAX_WIDTH | (IMAGE_MAX_WIDTH << 15); overlay->SWIDQW = (IMAGE_MAX_WIDTH >> 3) | (IMAGE_MAX_WIDTH << 12); overlay->SHEIGHT = IMAGE_MAX_HEIGHT | (IMAGE_MAX_HEIGHT << 15); overlay->YRGBSCALE = 0x80004000; /* scale factor 1 */ overlay->UVSCALE = 0x80004000; /* scale factor 1 */ overlay->OV0CLRC0 = 0x4000; /* brightness: 0 contrast: 1.0 */ overlay->OV0CLRC1 = 0x80; /* saturation: bypass */ /* * Enable destination color keying */ switch(pScrn->depth) { case 16: overlay->DCLRKV = RGB16ToColorKey(pPriv->colorKey); overlay->DCLRKM = 0x80070307; break; case 15: overlay->DCLRKV = RGB15ToColorKey(pPriv->colorKey); overlay->DCLRKM = 0x80070707; break; default: overlay->DCLRKV = pPriv->colorKey; overlay->DCLRKM = 0x80000000; break; } overlay->SCLRKVH = 0; overlay->SCLRKVL = 0; overlay->SCLRKM = 0; /* source color key disable */ overlay->OV0CONF = 0; /* two 720 pixel line buffers */ overlay->OV0CMD = VC_UP_INTERPOLATION | HC_UP_INTERPOLATION | Y_ADJUST | YUV_420; OVERLAY_UPDATE(pI810->OverlayPhysical); } static XF86VideoAdaptorPtr I810SetupImageVideo(ScreenPtr screen) { ScrnInfoPtr pScrn = xf86ScreenToScrn(screen); I810Ptr pI810 = I810PTR(pScrn); XF86VideoAdaptorPtr adapt; I810PortPrivPtr pPriv; if(!(adapt = calloc(1, sizeof(XF86VideoAdaptorRec) + sizeof(I810PortPrivRec) + sizeof(DevUnion)))) return NULL; adapt->type = XvWindowMask | XvInputMask | XvImageMask; adapt->flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT; adapt->name = "I810 Video Overlay"; adapt->nEncodings = 1; adapt->pEncodings = DummyEncoding; adapt->nFormats = NUM_FORMATS; adapt->pFormats = Formats; adapt->nPorts = 1; adapt->pPortPrivates = (DevUnion*)(&adapt[1]); pPriv = (I810PortPrivPtr)(&adapt->pPortPrivates[1]); adapt->pPortPrivates[0].ptr = (pointer)(pPriv); adapt->pAttributes = Attributes; adapt->nImages = NUM_IMAGES; adapt->nAttributes = NUM_ATTRIBUTES; adapt->pImages = Images; adapt->PutVideo = NULL; adapt->PutStill = NULL; adapt->GetVideo = NULL; adapt->GetStill = NULL; adapt->StopVideo = I810StopVideo; adapt->SetPortAttribute = I810SetPortAttribute; adapt->GetPortAttribute = I810GetPortAttribute; adapt->QueryBestSize = I810QueryBestSize; adapt->PutImage = I810PutImage; adapt->QueryImageAttributes = I810QueryImageAttributes; pPriv->colorKey = pI810->colorKey & ((1 << pScrn->depth) - 1); pPriv->videoStatus = 0; pPriv->brightness = 0; pPriv->contrast = 64; pPriv->linear = NULL; pPriv->currentBuf = 0; /* gotta uninit this someplace */ REGION_NULL(screen, &pPriv->clip); pI810->adaptor = adapt; pI810->BlockHandler = screen->BlockHandler; screen->BlockHandler = I810BlockHandler; xvBrightness = MAKE_ATOM("XV_BRIGHTNESS"); xvContrast = MAKE_ATOM("XV_CONTRAST"); xvColorKey = MAKE_ATOM("XV_COLORKEY"); I810ResetVideo(pScrn); return adapt; } /* I810ClipVideo - Takes the dst box in standard X BoxRec form (top and left edges inclusive, bottom and right exclusive). The new dst box is returned. The source boundaries are given (x1, y1 inclusive, x2, y2 exclusive) and returned are the new source boundaries in 16.16 fixed point. */ static void I810ClipVideo( BoxPtr dst, INT32 *x1, INT32 *x2, INT32 *y1, INT32 *y2, BoxPtr extents, /* extents of the clip region */ INT32 width, INT32 height ){ INT32 vscale, hscale, delta; int diff; hscale = ((*x2 - *x1) << 16) / (dst->x2 - dst->x1); vscale = ((*y2 - *y1) << 16) / (dst->y2 - dst->y1); *x1 <<= 16; *x2 <<= 16; *y1 <<= 16; *y2 <<= 16; diff = extents->x1 - dst->x1; if(diff > 0) { dst->x1 = extents->x1; *x1 += diff * hscale; } diff = dst->x2 - extents->x2; if(diff > 0) { dst->x2 = extents->x2; *x2 -= diff * hscale; } diff = extents->y1 - dst->y1; if(diff > 0) { dst->y1 = extents->y1; *y1 += diff * vscale; } diff = dst->y2 - extents->y2; if(diff > 0) { dst->y2 = extents->y2; *y2 -= diff * vscale; } if(*x1 < 0) { diff = (- *x1 + hscale - 1)/ hscale; dst->x1 += diff; *x1 += diff * hscale; } delta = *x2 - (width << 16); if(delta > 0) { diff = (delta + hscale - 1)/ hscale; dst->x2 -= diff; *x2 -= diff * hscale; } if(*y1 < 0) { diff = (- *y1 + vscale - 1)/ vscale; dst->y1 += diff; *y1 += diff * vscale; } delta = *y2 - (height << 16); if(delta > 0) { diff = (delta + vscale - 1)/ vscale; dst->y2 -= diff; *y2 -= diff * vscale; } } static void I810StopVideo(ScrnInfoPtr pScrn, pointer data, Bool shutdown) { I810PortPrivPtr pPriv = (I810PortPrivPtr)data; I810Ptr pI810 = I810PTR(pScrn); I810OverlayRegPtr overlay = (I810OverlayRegPtr) (pI810->FbBase + pI810->OverlayStart); REGION_EMPTY(pScrn->screen, &pPriv->clip); if(shutdown) { if(pPriv->videoStatus & CLIENT_VIDEO_ON) { overlay->OV0CMD &= 0xFFFFFFFE; OVERLAY_UPDATE(pI810->OverlayPhysical); } if(pPriv->linear) { xf86FreeOffscreenLinear(pPriv->linear); pPriv->linear = NULL; } pPriv->videoStatus = 0; } else { if(pPriv->videoStatus & CLIENT_VIDEO_ON) { pPriv->videoStatus |= OFF_TIMER; pPriv->offTime = currentTime.milliseconds + OFF_DELAY; } } } static int I810SetPortAttribute( ScrnInfoPtr pScrn, Atom attribute, INT32 value, pointer data ){ I810PortPrivPtr pPriv = (I810PortPrivPtr)data; I810Ptr pI810 = I810PTR(pScrn); I810OverlayRegPtr overlay = (I810OverlayRegPtr) (pI810->FbBase + pI810->OverlayStart); if(attribute == xvBrightness) { if((value < -128) || (value > 127)) return BadValue; pPriv->brightness = value; overlay->OV0CLRC0 = (pPriv->contrast << 8) | (pPriv->brightness & 0xff); OVERLAY_UPDATE(pI810->OverlayPhysical); } else if(attribute == xvContrast) { if((value < 0) || (value > 255)) return BadValue; pPriv->contrast = value; overlay->OV0CLRC0 = (pPriv->contrast << 8) | (pPriv->brightness & 0xff); OVERLAY_UPDATE(pI810->OverlayPhysical); } else if(attribute == xvColorKey) { pPriv->colorKey = value; switch(pScrn->depth) { case 16: overlay->DCLRKV = RGB16ToColorKey(pPriv->colorKey); break; case 15: overlay->DCLRKV = RGB15ToColorKey(pPriv->colorKey); break; default: overlay->DCLRKV = pPriv->colorKey; break; } OVERLAY_UPDATE(pI810->OverlayPhysical); REGION_EMPTY(pScrn->screen, &pPriv->clip); } else return BadMatch; return Success; } static int I810GetPortAttribute( ScrnInfoPtr pScrn, Atom attribute, INT32 *value, pointer data ){ I810PortPrivPtr pPriv = (I810PortPrivPtr)data; if(attribute == xvBrightness) { *value = pPriv->brightness; } else if(attribute == xvContrast) { *value = pPriv->contrast; } else if(attribute == xvColorKey) { *value = pPriv->colorKey; } else return BadMatch; return Success; } static void I810QueryBestSize( ScrnInfoPtr pScrn, Bool motion, short vid_w, short vid_h, short drw_w, short drw_h, unsigned int *p_w, unsigned int *p_h, pointer data ){ if(vid_w > (drw_w << 1)) drw_w = vid_w >> 1; if(vid_h > (drw_h << 1)) drw_h = vid_h >> 1; *p_w = drw_w; *p_h = drw_h; } static void I810CopyPackedData( ScrnInfoPtr pScrn, unsigned char *buf, int srcPitch, int dstPitch, int top, int left, int h, int w ) { I810Ptr pI810 = I810PTR(pScrn); I810PortPrivPtr pPriv = pI810->adaptor->pPortPrivates[0].ptr; unsigned char *src, *dst; src = buf + (top*srcPitch) + (left<<1); if (pPriv->currentBuf == 0) dst = pI810->FbBase + pPriv->YBuf0offset; else dst = pI810->FbBase + pPriv->YBuf1offset; w <<= 1; while(h--) { memcpy(dst, src, w); src += srcPitch; dst += dstPitch; } } static void I810CopyPlanarData( ScrnInfoPtr pScrn, unsigned char *buf, int srcPitch, int dstPitch, /* of chroma */ int srcH, int top, int left, int h, int w, int id ) { I810Ptr pI810 = I810PTR(pScrn); I810PortPrivPtr pPriv = pI810->adaptor->pPortPrivates[0].ptr; int i; unsigned char *src1, *src2, *src3, *dst1, *dst2, *dst3; /* Copy Y data */ src1 = buf + (top*srcPitch) + left; if (pPriv->currentBuf == 0) dst1 = pI810->FbBase + pPriv->YBuf0offset; else dst1 = pI810->FbBase + pPriv->YBuf1offset; for (i = 0; i < h; i++) { memcpy(dst1, src1, w); src1 += srcPitch; dst1 += dstPitch << 1; } /* Copy V data for YV12, or U data for I420 */ src2 = buf + (srcH*srcPitch) + ((top*srcPitch)>>2) + (left>>1); if (pPriv->currentBuf == 0) { if (id == FOURCC_I420) dst2 = pI810->FbBase + pPriv->UBuf0offset; else dst2 = pI810->FbBase + pPriv->VBuf0offset; } else { if (id == FOURCC_I420) dst2 = pI810->FbBase + pPriv->UBuf1offset; else dst2 = pI810->FbBase + pPriv->VBuf1offset; } for (i = 0; i < h/2; i++) { memcpy(dst2, src2, w/2); src2 += srcPitch>>1; dst2 += dstPitch; } /* Copy U data for YV12, or V data for I420 */ src3 = buf + (srcH*srcPitch) + ((srcH*srcPitch)>>2) + ((top*srcPitch)>>2) + (left>>1); if (pPriv->currentBuf == 0) { if (id == FOURCC_I420) dst3 = pI810->FbBase + pPriv->VBuf0offset; else dst3 = pI810->FbBase + pPriv->UBuf0offset; } else { if (id == FOURCC_I420) dst3 = pI810->FbBase + pPriv->VBuf1offset; else dst3 = pI810->FbBase + pPriv->UBuf1offset; } for (i = 0; i < h/2; i++) { memcpy(dst3, src3, w/2); src3 += srcPitch>>1; dst3 += dstPitch; } } static void I810DisplayVideo( ScrnInfoPtr pScrn, int id, short width, short height, int dstPitch, /* of chroma for 4:2:0 */ int x1, int y1, int x2, int y2, BoxPtr dstBox, short src_w, short src_h, short drw_w, short drw_h ){ I810Ptr pI810 = I810PTR(pScrn); I810PortPrivPtr pPriv = pI810->adaptor->pPortPrivates[0].ptr; I810OverlayRegPtr overlay = (I810OverlayRegPtr) (pI810->FbBase + pI810->OverlayStart); int xscaleInt, xscaleFract, yscaleInt, yscaleFract; int xscaleIntUV = 0, xscaleFractUV = 0, yscaleIntUV = 0, yscaleFractUV = 0; unsigned int swidth; switch(id) { case FOURCC_YV12: case FOURCC_I420: swidth = ALIGN(width, 8); overlay->SWID = (swidth << 15) | swidth; overlay->SWIDQW = (swidth << 12) | (swidth >> 3); break; case FOURCC_UYVY: case FOURCC_YUY2: default: swidth = ALIGN(width, 4) << 1; overlay->SWID = swidth; overlay->SWIDQW = swidth >> 3; break; } /* wide video formats (>720 pixels) are special */ if( swidth > IMAGE_FAST_WIDTH ) { overlay->OV0CONF = 1; /* one 1440 pixel line buffer */ } else { overlay->OV0CONF = 0; /* two 720 pixel line buffers */ } overlay->SHEIGHT = height | (height << 15); overlay->DWINPOS = (dstBox->y1 << 16) | (dstBox->x1); overlay->DWINSZ = ((dstBox->y2 - dstBox->y1) << 16) | (dstBox->x2 - dstBox->x1); /* buffer locations */ overlay->OBUF_0Y = pPriv->YBuf0offset; overlay->OBUF_1Y = pPriv->YBuf1offset; overlay->OBUF_0U = pPriv->UBuf0offset; overlay->OBUF_0V = pPriv->VBuf0offset; overlay->OBUF_1U = pPriv->UBuf1offset; overlay->OBUF_1V = pPriv->VBuf1offset; /* * Calculate horizontal and vertical scaling factors, default to 1:1 */ overlay->YRGBSCALE = 0x80004000; overlay->UVSCALE = 0x80004000; /* * Initially, YCbCr and Overlay Enable and * vertical chrominance up interpolation and horozontal chrominance * up interpolation */ overlay->OV0CMD = VC_UP_INTERPOLATION | HC_UP_INTERPOLATION | Y_ADJUST | OVERLAY_ENABLE; if ((drw_w != src_w) || (drw_h != src_h)) { xscaleInt = (src_w / drw_w) & 0x3; xscaleFract = (src_w << 12) / drw_w; yscaleInt = (src_h / drw_h) & 0x3; yscaleFract = (src_h << 12) / drw_h; overlay->YRGBSCALE = (xscaleInt << 15) | ((xscaleFract & 0xFFF) << 3) | (yscaleInt) | ((yscaleFract & 0xFFF) << 20); if (drw_w > src_w) { /* horizontal up-scaling */ overlay->OV0CMD &= ~HORIZONTAL_CHROMINANCE_FILTER; overlay->OV0CMD &= ~HORIZONTAL_LUMINANCE_FILTER; overlay->OV0CMD |= (HC_UP_INTERPOLATION | HL_UP_INTERPOLATION); } if (drw_h > src_h) { /* vertical up-scaling */ overlay->OV0CMD &= ~VERTICAL_CHROMINANCE_FILTER; overlay->OV0CMD &= ~VERTICAL_LUMINANCE_FILTER; overlay->OV0CMD |= (VC_UP_INTERPOLATION | VL_UP_INTERPOLATION); } if (drw_w < src_w) { /* horizontal down-scaling */ overlay->OV0CMD &= ~HORIZONTAL_CHROMINANCE_FILTER; overlay->OV0CMD &= ~HORIZONTAL_LUMINANCE_FILTER; overlay->OV0CMD |= (HC_DOWN_INTERPOLATION | HL_DOWN_INTERPOLATION); } if (drw_h < src_h) { /* vertical down-scaling */ overlay->OV0CMD &= ~VERTICAL_CHROMINANCE_FILTER; overlay->OV0CMD &= ~VERTICAL_LUMINANCE_FILTER; overlay->OV0CMD |= (VC_DOWN_INTERPOLATION | VL_DOWN_INTERPOLATION); } /* now calculate the UV scaling factor */ if (xscaleFract) { xscaleFractUV = xscaleFract >> MINUV_SCALE; overlay->OV0CMD &= ~HC_DOWN_INTERPOLATION; overlay->OV0CMD |= HC_UP_INTERPOLATION; } if (xscaleInt) { xscaleIntUV = xscaleInt >> MINUV_SCALE; if (xscaleIntUV) { overlay->OV0CMD &= ~HC_UP_INTERPOLATION; } } if (yscaleFract) { yscaleFractUV = yscaleFract >> MINUV_SCALE; overlay->OV0CMD &= ~VC_DOWN_INTERPOLATION; overlay->OV0CMD |= VC_UP_INTERPOLATION; } if (yscaleInt) { yscaleIntUV = yscaleInt >> MINUV_SCALE; if (yscaleIntUV) { overlay->OV0CMD &= ~VC_UP_INTERPOLATION; overlay->OV0CMD |= VC_DOWN_INTERPOLATION; } } overlay->UVSCALE = yscaleIntUV | ((xscaleFractUV & 0xFFF) << 3) | ((yscaleFractUV & 0xFFF) << 20); } switch(id) { case FOURCC_YV12: case FOURCC_I420: /* set UV vertical phase to -0.25 */ overlay->UV_VPH = 0x30003000; overlay->INIT_PH = UV_VERT_BUF0 | UV_VERT_BUF1; overlay->OV0STRIDE = (dstPitch << 1) | (dstPitch << 16); overlay->OV0CMD &= ~SOURCE_FORMAT; overlay->OV0CMD |= YUV_420; break; case I810_RV15: case I810_RV16: overlay->UV_VPH = 0; overlay->INIT_PH = 0; overlay->OV0STRIDE = dstPitch; overlay->OV0CMD &= ~SOURCE_FORMAT; overlay->OV0CMD |= (id==I810_RV15 ? RGB_555 : RGB_565); overlay->OV0CMD &= ~OV_BYTE_ORDER; break; case FOURCC_UYVY: case FOURCC_YUY2: default: overlay->UV_VPH = 0; overlay->INIT_PH = 0; overlay->OV0STRIDE = dstPitch; overlay->OV0CMD &= ~SOURCE_FORMAT; overlay->OV0CMD |= YUV_422; overlay->OV0CMD &= ~OV_BYTE_ORDER; if (id == FOURCC_UYVY) overlay->OV0CMD |= Y_SWAP; break; } overlay->OV0CMD &= ~BUFFER_AND_FIELD; if (pPriv->currentBuf == 0) overlay->OV0CMD |= BUFFER0_FIELD0; else overlay->OV0CMD |= BUFFER1_FIELD0; OVERLAY_UPDATE(pI810->OverlayPhysical); } static FBLinearPtr I810AllocateMemory( ScrnInfoPtr pScrn, FBLinearPtr linear, int size ){ ScreenPtr screen; FBLinearPtr new_linear; if(linear) { if(linear->size >= size) return linear; if(xf86ResizeOffscreenLinear(linear, size)) return linear; xf86FreeOffscreenLinear(linear); } screen = xf86ScrnToScreen(pScrn); new_linear = xf86AllocateOffscreenLinear(screen, size, 4, NULL, NULL, NULL); if(!new_linear) { int max_size; xf86QueryLargestOffscreenLinear(screen, &max_size, 4, PRIORITY_EXTREME); if(max_size < size) return NULL; xf86PurgeUnlockedOffscreenAreas(screen); new_linear = xf86AllocateOffscreenLinear(screen, size, 4, NULL, NULL, NULL); } return new_linear; } static int I810PutImage( ScrnInfoPtr pScrn, short src_x, short src_y, short drw_x, short drw_y, short src_w, short src_h, short drw_w, short drw_h, int id, unsigned char* buf, short width, short height, Bool sync, RegionPtr clipBoxes, pointer data, DrawablePtr pDraw ){ I810Ptr pI810 = I810PTR(pScrn); I810PortPrivPtr pPriv = (I810PortPrivPtr)data; INT32 x1, x2, y1, y2; int srcPitch, dstPitch; int top, left, npixels, nlines, size, loops; BoxRec dstBox; /* Clip */ x1 = src_x; x2 = src_x + src_w; y1 = src_y; y2 = src_y + src_h; dstBox.x1 = drw_x; dstBox.x2 = drw_x + drw_w; dstBox.y1 = drw_y; dstBox.y2 = drw_y + drw_h; I810ClipVideo(&dstBox, &x1, &x2, &y1, &y2, REGION_EXTENTS(pScrn->screen, clipBoxes), width, height); if((x1 >= x2) || (y1 >= y2)) return Success; /* * Fix for 4 pixel granularity of AdjustFrame * unless boarder is clipped by frame */ dstBox.x1 -= (pScrn->frameX0 & ((dstBox.x1 == pScrn->frameX0) ? ~0x0UL : ~0x3UL)); dstBox.x2 -= (pScrn->frameX0 & ~0x3); dstBox.y1 -= pScrn->frameY0; dstBox.y2 -= pScrn->frameY0; switch(id) { case FOURCC_YV12: case FOURCC_I420: srcPitch = ALIGN(width, 4); dstPitch = ALIGN((width >> 1), 8); /* of chroma */ size = dstPitch * height * 3; break; case FOURCC_UYVY: case FOURCC_YUY2: default: srcPitch = (width << 1); dstPitch = ALIGN(srcPitch, 8); size = dstPitch * height; break; } if(!(pPriv->linear = I810AllocateMemory(pScrn, pPriv->linear, (pScrn->bitsPerPixel == 16) ? size : (size >> 1)))) return BadAlloc; /* fixup pointers */ pPriv->YBuf0offset = pPriv->linear->offset * pI810->cpp; pPriv->UBuf0offset = pPriv->YBuf0offset + (dstPitch * 2 * height); pPriv->VBuf0offset = pPriv->UBuf0offset + (dstPitch * height >> 1); pPriv->YBuf1offset = (pPriv->linear->offset * pI810->cpp) + size; pPriv->UBuf1offset = pPriv->YBuf1offset + (dstPitch * 2 * height); pPriv->VBuf1offset = pPriv->UBuf1offset + (dstPitch * height >> 1); /* Make sure this buffer isn't in use */ loops = 0; while (loops < 1000000) { if(((INREG(DOV0STA)&0x00100000)>>20) == pPriv->currentBuf) { break; } loops++; } if(loops >= 1000000) { pPriv->currentBuf = !pPriv->currentBuf; } /* buffer swap */ if (pPriv->currentBuf == 0) pPriv->currentBuf = 1; else pPriv->currentBuf = 0; /* copy data */ top = y1 >> 16; left = (x1 >> 16) & ~1; npixels = ALIGN(((x2 + 0xffff) >> 16), 2) - left; switch(id) { case FOURCC_YV12: case FOURCC_I420: top &= ~1; nlines = ALIGN(((y2 + 0xffff) >> 16), 2) - top; I810CopyPlanarData(pScrn, buf, srcPitch, dstPitch, height, top, left, nlines, npixels, id); break; case FOURCC_UYVY: case FOURCC_YUY2: default: nlines = ((y2 + 0xffff) >> 16) - top; I810CopyPackedData(pScrn, buf, srcPitch, dstPitch, top, left, nlines, npixels); break; } /* update cliplist */ if(!REGION_EQUAL(pScrn->screen, &pPriv->clip, clipBoxes)) { REGION_COPY(pScrn->screen, &pPriv->clip, clipBoxes); /* draw these */ xf86XVFillKeyHelperDrawable(pDraw, pPriv->colorKey, clipBoxes); } I810DisplayVideo(pScrn, id, width, height, dstPitch, x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h); pPriv->videoStatus = CLIENT_VIDEO_ON; return Success; } static int I810QueryImageAttributes( ScrnInfoPtr pScrn, int id, unsigned short *w, unsigned short *h, int *pitches, int *offsets ){ int size, tmp; if(*w > IMAGE_MAX_WIDTH) *w = IMAGE_MAX_WIDTH; if(*h > IMAGE_MAX_HEIGHT) *h = IMAGE_MAX_HEIGHT; *w = (*w + 1) & ~1; if(offsets) offsets[0] = 0; switch(id) { /* IA44 is for XvMC only */ case FOURCC_IA44: case FOURCC_AI44: if(pitches) pitches[0] = *w; size = *w * *h; break; case FOURCC_YV12: case FOURCC_I420: *h = (*h + 1) & ~1; size = (*w + 3) & ~3; if(pitches) pitches[0] = size; size *= *h; if(offsets) offsets[1] = size; tmp = ((*w >> 1) + 3) & ~3; if(pitches) pitches[1] = pitches[2] = tmp; tmp *= (*h >> 1); size += tmp; if(offsets) offsets[2] = size; size += tmp; break; case FOURCC_UYVY: case FOURCC_YUY2: default: size = *w << 1; if(pitches) pitches[0] = size; size *= *h; break; } return size; } static void I810BlockHandler (BLOCKHANDLER_ARGS_DECL) { SCREEN_PTR(arg); ScrnInfoPtr pScrn = xf86ScreenToScrn(screen); I810Ptr pI810 = I810PTR(pScrn); I810PortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn); I810OverlayRegPtr overlay = (I810OverlayRegPtr) (pI810->FbBase + pI810->OverlayStart); screen->BlockHandler = pI810->BlockHandler; (*screen->BlockHandler) (BLOCKHANDLER_ARGS); screen->BlockHandler = I810BlockHandler; if(pPriv->videoStatus & TIMER_MASK) { UpdateCurrentTime(); if(pPriv->videoStatus & OFF_TIMER) { if(pPriv->offTime < currentTime.milliseconds) { /* Turn off the overlay */ overlay->OV0CMD &= 0xFFFFFFFE; OVERLAY_UPDATE(pI810->OverlayPhysical); pPriv->videoStatus = FREE_TIMER; pPriv->freeTime = currentTime.milliseconds + FREE_DELAY; } } else { /* FREE_TIMER */ if(pPriv->freeTime < currentTime.milliseconds) { if(pPriv->linear) { xf86FreeOffscreenLinear(pPriv->linear); pPriv->linear = NULL; } pPriv->videoStatus = 0; } } } } /*************************************************************************** * Offscreen Images ***************************************************************************/ typedef struct { FBLinearPtr linear; Bool isOn; } OffscreenPrivRec, * OffscreenPrivPtr; static int I810AllocateSurface( ScrnInfoPtr pScrn, int id, unsigned short w, unsigned short h, XF86SurfacePtr surface ){ FBLinearPtr linear; int pitch, size, bpp; OffscreenPrivPtr pPriv; I810Ptr pI810 = I810PTR(pScrn); if((w > 1024) || (h > 1024)) return BadAlloc; w = ALIGN(w, 2); pitch = ALIGN((w << 1), 16); bpp = pScrn->bitsPerPixel >> 3; size = ((pitch * h) + bpp - 1) / bpp; if(!(linear = I810AllocateMemory(pScrn, NULL, size))) return BadAlloc; surface->width = w; surface->height = h; if(!(surface->pitches = malloc(sizeof(int)))) { xf86FreeOffscreenLinear(linear); return BadAlloc; } if(!(surface->offsets = malloc(sizeof(int)))) { free(surface->pitches); xf86FreeOffscreenLinear(linear); return BadAlloc; } if(!(pPriv = malloc(sizeof(OffscreenPrivRec)))) { free(surface->pitches); free(surface->offsets); xf86FreeOffscreenLinear(linear); return BadAlloc; } pPriv->linear = linear; pPriv->isOn = FALSE; surface->pScrn = pScrn; surface->id = id; surface->pitches[0] = pitch; surface->offsets[0] = linear->offset * bpp; surface->devPrivate.ptr = (pointer)pPriv; memset(pI810->FbBase + surface->offsets[0],0,size); return Success; } static int I810StopSurface( XF86SurfacePtr surface ){ OffscreenPrivPtr pPriv = (OffscreenPrivPtr)surface->devPrivate.ptr; if(pPriv->isOn) { I810Ptr pI810 = I810PTR(surface->pScrn); I810OverlayRegPtr overlay = (I810OverlayRegPtr) (pI810->FbBase + pI810->OverlayStart); overlay->OV0CMD &= 0xFFFFFFFE; OVERLAY_UPDATE(pI810->OverlayPhysical); pPriv->isOn = FALSE; } return Success; } static int I810FreeSurface( XF86SurfacePtr surface ){ OffscreenPrivPtr pPriv = (OffscreenPrivPtr)surface->devPrivate.ptr; if(pPriv->isOn) { I810StopSurface(surface); } xf86FreeOffscreenLinear(pPriv->linear); free(surface->pitches); free(surface->offsets); free(surface->devPrivate.ptr); return Success; } static int I810GetSurfaceAttribute( ScrnInfoPtr pScrn, Atom attribute, INT32 *value ){ return I810GetPortAttribute(pScrn, attribute, value, GET_PORT_PRIVATE(pScrn)); } static int I810SetSurfaceAttribute( ScrnInfoPtr pScrn, Atom attribute, INT32 value ){ return I810SetPortAttribute(pScrn, attribute, value, GET_PORT_PRIVATE(pScrn)); } static int I810DisplaySurface( XF86SurfacePtr surface, short src_x, short src_y, short drw_x, short drw_y, short src_w, short src_h, short drw_w, short drw_h, RegionPtr clipBoxes ){ OffscreenPrivPtr pPriv = (OffscreenPrivPtr)surface->devPrivate.ptr; ScrnInfoPtr pScrn = surface->pScrn; I810Ptr pI810 = I810PTR(pScrn); I810PortPrivPtr pI810Priv = GET_PORT_PRIVATE(pScrn); INT32 x1, y1, x2, y2; INT32 loops = 0; BoxRec dstBox; x1 = src_x; x2 = src_x + src_w; y1 = src_y; y2 = src_y + src_h; dstBox.x1 = drw_x; dstBox.x2 = drw_x + drw_w; dstBox.y1 = drw_y; dstBox.y2 = drw_y + drw_h; I810ClipVideo(&dstBox, &x1, &x2, &y1, &y2, REGION_EXTENTS(screenInfo.screens[0], clipBoxes), surface->width, surface->height); /* * Fix for 4 pixel granularity of AdjustFrame * unless boarder is clipped by frame */ dstBox.x1 -= (pScrn->frameX0 & ((dstBox.x1 == pScrn->frameX0) ? ~0x0UL : ~0x3UL)); dstBox.x2 -= (pScrn->frameX0 & ~0x3); dstBox.y1 -= pScrn->frameY0; dstBox.y2 -= pScrn->frameY0; /* fixup pointers */ pI810Priv->YBuf0offset = surface->offsets[0]; pI810Priv->YBuf1offset = pI810Priv->YBuf0offset; /* wait for the last rendered buffer to be flipped in */ while (((INREG(DOV0STA)&0x00100000)>>20) != pI810Priv->currentBuf) { if(loops == 200000) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Overlay Lockup\n"); break; } loops++; } /* buffer swap */ if (pI810Priv->currentBuf == 0) pI810Priv->currentBuf = 1; else pI810Priv->currentBuf = 0; I810ResetVideo(pScrn); I810DisplayVideo(pScrn, surface->id, surface->width, surface->height, surface->pitches[0], x1, y1, x2, y2, &dstBox, src_w, src_h, drw_w, drw_h); xf86XVFillKeyHelper(pScrn->pScreen, pI810Priv->colorKey, clipBoxes); pPriv->isOn = TRUE; /* we've prempted the XvImage stream so set its free timer */ if(pI810Priv->videoStatus & CLIENT_VIDEO_ON) { REGION_EMPTY(pScrn->screen, & pI810Priv->clip); UpdateCurrentTime(); pI810Priv->videoStatus = FREE_TIMER; pI810Priv->freeTime = currentTime.milliseconds + FREE_DELAY; pScrn->pScreen->BlockHandler = I810BlockHandler; } return Success; } static void I810InitOffscreenImages(ScreenPtr screen) { XF86OffscreenImagePtr offscreenImages; /* need to free this someplace */ if(!(offscreenImages = malloc(sizeof(XF86OffscreenImageRec)))) { return; } offscreenImages[0].image = &Images[0]; offscreenImages[0].flags = VIDEO_OVERLAID_IMAGES | VIDEO_CLIP_TO_VIEWPORT; offscreenImages[0].alloc_surface = I810AllocateSurface; offscreenImages[0].free_surface = I810FreeSurface; offscreenImages[0].display = I810DisplaySurface; offscreenImages[0].stop = I810StopSurface; offscreenImages[0].setAttribute = I810SetSurfaceAttribute; offscreenImages[0].getAttribute = I810GetSurfaceAttribute; offscreenImages[0].max_width = 1024; offscreenImages[0].max_height = 1024; offscreenImages[0].num_attributes = 1; offscreenImages[0].attributes = Attributes; if (!xf86XVRegisterOffscreenImages(screen, offscreenImages, 1)) free(offscreenImages); } xf86-video-intel-2.99.917/src/legacy/i810/i810_common.h0000664000175000017500000002372312400044327016650 00000000000000/* i810_common.h -- common header definitions for I810 2D/3D/DRM suite * * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Converted to common header format: * Jens Owen * * */ /* WARNING: If you change any of these defines, make sure to change * the kernel include file as well (i810_drm.h) */ #ifndef _I810_COMMON_H_ #define _I810_COMMON_H_ /* Provide substitutes for gcc's __FUNCTION__ on other compilers */ #if !defined(__GNUC__) && !defined(__FUNCTION__) # if defined(__STDC__) && (__STDC_VERSION__>=199901L) /* C99 */ # define __FUNCTION__ __func__ # else # define __FUNCTION__ "" # endif #endif #define PFX __FILE__,__LINE__,__FUNCTION__ #define FUNCTION_NAME __FUNCTION__ #define KB(x) ((x) * 1024) #define MB(x) ((x) * KB(1024)) #define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) /* Using usleep() makes things noticably slow. */ #if 0 #define DELAY(x) usleep(x) #else #define DELAY(x) do {;} while (0) #endif #define PrintErrorState I810PrintErrorState #define WaitRingFunc I810WaitLpRing #define RecPtr pI810 static inline void memset_volatile(volatile void *b, int c, size_t len) { unsigned i; for (i = 0; i < len; i++) ((volatile char *)b)[i] = c; } static inline void memcpy_volatile(volatile void *dst, const void *src, size_t len) { unsigned i; for (i = 0; i < len; i++) ((volatile char *)dst)[i] = ((const volatile char *)src)[i]; } /* Memory mapped register access macros */ #define INREG8(addr) *(volatile uint8_t *)(RecPtr->MMIOBase + (addr)) #define INREG16(addr) *(volatile uint16_t *)(RecPtr->MMIOBase + (addr)) #define INREG(addr) *(volatile uint32_t *)(RecPtr->MMIOBase + (addr)) #define INGTT(addr) *(volatile uint32_t *)(RecPtr->GTTBase + (addr)) #define POSTING_READ(addr) (void)INREG(addr) #define OUTREG8(addr, val) do { \ *(volatile uint8_t *)(RecPtr->MMIOBase + (addr)) = (val); \ if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) { \ ErrorF("OUTREG8(0x%lx, 0x%lx) in %s\n", (unsigned long)(addr), \ (unsigned long)(val), FUNCTION_NAME); \ } \ } while (0) #define OUTREG16(addr, val) do { \ *(volatile uint16_t *)(RecPtr->MMIOBase + (addr)) = (val); \ if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) { \ ErrorF("OUTREG16(0x%lx, 0x%lx) in %s\n", (unsigned long)(addr), \ (unsigned long)(val), FUNCTION_NAME); \ } \ } while (0) #define OUTREG(addr, val) do { \ *(volatile uint32_t *)(RecPtr->MMIOBase + (addr)) = (val); \ if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) { \ ErrorF("OUTREG(0x%lx, 0x%lx) in %s\n", (unsigned long)(addr), \ (unsigned long)(val), FUNCTION_NAME); \ } \ } while (0) /* To remove all debugging, make sure I810_DEBUG is defined as a * preprocessor symbol, and equal to zero. */ #if 1 #define I810_DEBUG 0 #endif #ifndef I810_DEBUG #warning "Debugging enabled - expect reduced performance" extern int I810_DEBUG; #endif #define DEBUG_VERBOSE_ACCEL 0x1 #define DEBUG_VERBOSE_SYNC 0x2 #define DEBUG_VERBOSE_VGA 0x4 #define DEBUG_VERBOSE_RING 0x8 #define DEBUG_VERBOSE_OUTREG 0x10 #define DEBUG_VERBOSE_MEMORY 0x20 #define DEBUG_VERBOSE_CURSOR 0x40 #define DEBUG_ALWAYS_SYNC 0x80 #define DEBUG_VERBOSE_DRI 0x100 #define DEBUG_VERBOSE_BIOS 0x200 /* Size of the mmio region. */ #define I810_REG_SIZE 0x80000 #define GTT_PAGE_SIZE KB(4) #define PRIMARY_RINGBUFFER_SIZE KB(128) #define MIN_SCRATCH_BUFFER_SIZE KB(16) #define MAX_SCRATCH_BUFFER_SIZE KB(64) #define HWCURSOR_SIZE GTT_PAGE_SIZE #define HWCURSOR_SIZE_ARGB GTT_PAGE_SIZE * 4 /* Use a 64x64 HW cursor */ #define I810_CURSOR_X 64 #define I810_CURSOR_Y I810_CURSOR_X #define PIPE_NAME(n) ('A' + (n)) extern struct pci_device * intel_host_bridge (void); /** * Hints to CreatePixmap to tell the driver how the pixmap is going to be * used. * * Compare to CREATE_PIXMAP_USAGE_* in the server. */ enum { INTEL_CREATE_PIXMAP_TILING_X = 0x10000000, INTEL_CREATE_PIXMAP_TILING_Y, INTEL_CREATE_PIXMAP_TILING_NONE, }; #ifndef _I810_DEFINES_ #define _I810_DEFINES_ #define I810_USE_BATCH 1 #define I810_DMA_BUF_ORDER 12 #define I810_DMA_BUF_SZ (1< * Eric Anholt * * based on the i740 driver by * Kevin E. Martin * * */ #ifndef _I810_REG_H #define _I810_REG_H /* I/O register offsets */ #define SRX 0x3C4 /* p208 */ #define GRX 0x3CE /* p213 */ #define ARX 0x3C0 /* p224 */ /* VGA Color Palette Registers */ #define DACMASK 0x3C6 /* p232 */ #define DACSTATE 0x3C7 /* p232 */ #define DACRX 0x3C7 /* p233 */ #define DACWX 0x3C8 /* p233 */ #define DACDATA 0x3C9 /* p233 */ /* CRT Controller Registers (CRX) */ #define START_ADDR_HI 0x0C /* p246 */ #define START_ADDR_LO 0x0D /* p247 */ #define VERT_SYNC_END 0x11 /* p249 */ #define EXT_VERT_TOTAL 0x30 /* p257 */ #define EXT_VERT_DISPLAY 0x31 /* p258 */ #define EXT_VERT_SYNC_START 0x32 /* p259 */ #define EXT_VERT_BLANK_START 0x33 /* p260 */ #define EXT_HORIZ_TOTAL 0x35 /* p261 */ #define EXT_HORIZ_BLANK 0x39 /* p261 */ #define EXT_START_ADDR 0x40 /* p262 */ #define EXT_START_ADDR_ENABLE 0x80 #define EXT_OFFSET 0x41 /* p263 */ #define EXT_START_ADDR_HI 0x42 /* p263 */ #define INTERLACE_CNTL 0x70 /* p264 */ #define INTERLACE_ENABLE 0x80 #define INTERLACE_DISABLE 0x00 /* Miscellaneous Output Register */ #define MSR_R 0x3CC /* p207 */ #define MSR_W 0x3C2 /* p207 */ #define IO_ADDR_SELECT 0x01 #define MDA_BASE 0x3B0 /* p207 */ #define CGA_BASE 0x3D0 /* p207 */ /* CR80 - IO Control, p264 */ #define IO_CTNL 0x80 #define EXTENDED_ATTR_CNTL 0x02 #define EXTENDED_CRTC_CNTL 0x01 /* GR10 - Address mapping, p221 */ #define ADDRESS_MAPPING 0x10 #define PAGE_TO_LOCAL_MEM_ENABLE 0x10 #define GTT_MEM_MAP_ENABLE 0x08 #define PACKED_MODE_ENABLE 0x04 #define LINEAR_MODE_ENABLE 0x02 #define PAGE_MAPPING_ENABLE 0x01 #define HOTKEY_VBIOS_SWITCH_BLOCK 0x80 #define HOTKEY_SWITCH 0x20 #define HOTKEY_TOGGLE 0x10 /* Blitter control, p378 */ #define BITBLT_CNTL 0x7000c #define COLEXP_MODE 0x30 #define COLEXP_8BPP 0x00 #define COLEXP_16BPP 0x10 #define COLEXP_24BPP 0x20 #define COLEXP_RESERVED 0x30 #define BITBLT_STATUS 0x01 #define CHDECMISC 0x10111 #define DCC 0x10200 #define C0DRB0 0x10200 #define C0DRB1 0x10202 #define C0DRB2 0x10204 #define C0DRB3 0x10206 #define C0DRA01 0x10208 #define C0DRA23 0x1020a #define C1DRB0 0x10600 #define C1DRB1 0x10602 #define C1DRB2 0x10604 #define C1DRB3 0x10606 #define C1DRA01 0x10608 #define C1DRA23 0x1060a /* p375. */ #define DISPLAY_CNTL 0x70008 #define VGA_WRAP_MODE 0x02 #define VGA_WRAP_AT_256KB 0x00 #define VGA_NO_WRAP 0x02 #define GUI_MODE 0x01 #define STANDARD_VGA_MODE 0x00 #define HIRES_MODE 0x01 /* p375 */ #define PIXPIPE_CONFIG_0 0x70009 #define DAC_8_BIT 0x80 #define DAC_6_BIT 0x00 #define HW_CURSOR_ENABLE 0x10 #define EXTENDED_PALETTE 0x01 /* p375 */ #define PIXPIPE_CONFIG_1 0x7000a #define DISPLAY_COLOR_MODE 0x0F #define DISPLAY_VGA_MODE 0x00 #define DISPLAY_8BPP_MODE 0x02 #define DISPLAY_15BPP_MODE 0x04 #define DISPLAY_16BPP_MODE 0x05 #define DISPLAY_24BPP_MODE 0x06 #define DISPLAY_32BPP_MODE 0x07 /* p375 */ #define PIXPIPE_CONFIG_2 0x7000b #define DISPLAY_GAMMA_ENABLE 0x08 #define DISPLAY_GAMMA_DISABLE 0x00 #define OVERLAY_GAMMA_ENABLE 0x04 #define OVERLAY_GAMMA_DISABLE 0x00 /* p380 */ #define DISPLAY_BASE 0x70020 #define DISPLAY_BASE_MASK 0x03fffffc /* Cursor control registers, pp383-384 */ /* Desktop (845G, 865G) */ #define CURSOR_CONTROL 0x70080 #define CURSOR_ENABLE 0x80000000 #define CURSOR_GAMMA_ENABLE 0x40000000 #define CURSOR_STRIDE_MASK 0x30000000 #define CURSOR_FORMAT_SHIFT 24 #define CURSOR_FORMAT_MASK (0x07 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_2C (0x00 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_3C (0x01 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_4C (0x02 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_ARGB (0x04 << CURSOR_FORMAT_SHIFT) #define CURSOR_FORMAT_XRGB (0x05 << CURSOR_FORMAT_SHIFT) /* Mobile and i810 */ #define CURSOR_A_CONTROL CURSOR_CONTROL #define CURSOR_ORIGIN_SCREEN 0x00 /* i810 only */ #define CURSOR_ORIGIN_DISPLAY 0x1 /* i810 only */ #define CURSOR_MODE 0x27 #define CURSOR_MODE_DISABLE 0x00 #define CURSOR_MODE_32_4C_AX 0x01 /* i810 only */ #define CURSOR_MODE_64_3C 0x04 #define CURSOR_MODE_64_4C_AX 0x05 #define CURSOR_MODE_64_4C 0x06 #define CURSOR_MODE_64_32B_AX 0x07 #define CURSOR_MODE_64_ARGB_AX (0x20 | CURSOR_MODE_64_32B_AX) #define MCURSOR_PIPE_SELECT (1 << 28) #define MCURSOR_PIPE_A 0x00 #define MCURSOR_PIPE_B (1 << 28) #define MCURSOR_GAMMA_ENABLE (1 << 26) #define MCURSOR_MEM_TYPE_LOCAL (1 << 25) #define CURSOR_BASEADDR 0x70084 #define CURSOR_A_BASE CURSOR_BASEADDR #define CURSOR_BASEADDR_MASK 0x1FFFFF00 #define CURSOR_A_POSITION 0x70088 #define CURSOR_POS_SIGN 0x8000 #define CURSOR_POS_MASK 0x007FF #define CURSOR_X_SHIFT 0 #define CURSOR_Y_SHIFT 16 #define CURSOR_X_LO 0x70088 #define CURSOR_X_HI 0x70089 #define CURSOR_X_POS 0x00 #define CURSOR_X_NEG 0x80 #define CURSOR_Y_LO 0x7008A #define CURSOR_Y_HI 0x7008B #define CURSOR_Y_POS 0x00 #define CURSOR_Y_NEG 0x80 #define CURSOR_A_PALETTE0 0x70090 #define CURSOR_A_PALETTE1 0x70094 #define CURSOR_A_PALETTE2 0x70098 #define CURSOR_A_PALETTE3 0x7009C #define CURSOR_SIZE 0x700A0 #define CURSOR_SIZE_MASK 0x3FF #define CURSOR_SIZE_HSHIFT 0 #define CURSOR_SIZE_VSHIFT 12 #define CURSOR_B_CONTROL 0x700C0 #define CURSOR_B_BASE 0x700C4 #define CURSOR_B_POSITION 0x700C8 #define CURSOR_B_PALETTE0 0x700D0 #define CURSOR_B_PALETTE1 0x700D4 #define CURSOR_B_PALETTE2 0x700D8 #define CURSOR_B_PALETTE3 0x700DC /* Similar registers exist in Device 0 on the i810 (pp55-65), but I'm * not sure they refer to local (graphics) memory. * * These details are for the local memory control registers, * (pp301-310). The test machines are not equiped with local memory, * so nothing is tested. Only a single row seems to be supported. */ #define DRAM_ROW_TYPE 0x3000 #define DRAM_ROW_0 0x01 #define DRAM_ROW_0_SDRAM 0x01 #define DRAM_ROW_0_EMPTY 0x00 #define DRAM_ROW_CNTL_LO 0x3001 #define DRAM_PAGE_MODE_CTRL 0x10 #define DRAM_RAS_TO_CAS_OVRIDE 0x08 #define DRAM_CAS_LATENCY 0x04 #define DRAM_RAS_TIMING 0x02 #define DRAM_RAS_PRECHARGE 0x01 #define DRAM_ROW_CNTL_HI 0x3002 #define DRAM_REFRESH_RATE 0x18 #define DRAM_REFRESH_DISABLE 0x00 #define DRAM_REFRESH_60HZ 0x08 #define DRAM_REFRESH_FAST_TEST 0x10 #define DRAM_REFRESH_RESERVED 0x18 #define DRAM_SMS 0x07 #define DRAM_SMS_NORMAL 0x00 #define DRAM_SMS_NOP_ENABLE 0x01 #define DRAM_SMS_ABPCE 0x02 #define DRAM_SMS_MRCE 0x03 #define DRAM_SMS_CBRCE 0x04 /* p307 */ #define DPMS_SYNC_SELECT 0x5002 #define VSYNC_CNTL 0x08 #define VSYNC_ON 0x00 #define VSYNC_OFF 0x08 #define HSYNC_CNTL 0x02 #define HSYNC_ON 0x00 #define HSYNC_OFF 0x02 #define GPIOA 0x5010 #define GPIOB 0x5014 #define GPIOC 0x5018 #define GPIOD 0x501c #define GPIOE 0x5020 #define GPIOF 0x5024 #define GPIOG 0x5028 #define GPIOH 0x502c # define GPIO_CLOCK_DIR_MASK (1 << 0) # define GPIO_CLOCK_DIR_IN (0 << 1) # define GPIO_CLOCK_DIR_OUT (1 << 1) # define GPIO_CLOCK_VAL_MASK (1 << 2) # define GPIO_CLOCK_VAL_OUT (1 << 3) # define GPIO_CLOCK_VAL_IN (1 << 4) # define GPIO_CLOCK_PULLUP_DISABLE (1 << 5) # define GPIO_DATA_DIR_MASK (1 << 8) # define GPIO_DATA_DIR_IN (0 << 9) # define GPIO_DATA_DIR_OUT (1 << 9) # define GPIO_DATA_VAL_MASK (1 << 10) # define GPIO_DATA_VAL_OUT (1 << 11) # define GPIO_DATA_VAL_IN (1 << 12) # define GPIO_DATA_PULLUP_DISABLE (1 << 13) /* GMBus registers for hardware-assisted (non-bitbanging) I2C access */ #define GMBUS0 0x5100 #define GMBUS1 0x5104 #define GMBUS2 0x5108 #define GMBUS3 0x510c #define GMBUS4 0x5110 #define GMBUS5 0x5120 /* p317, 319 */ #define VCLK2_VCO_M 0x6008 /* treat as 16 bit? (includes msbs) */ #define VCLK2_VCO_N 0x600a #define VCLK2_VCO_DIV_SEL 0x6012 #define VCLK_DIVISOR_VGA0 0x6000 #define VCLK_DIVISOR_VGA1 0x6004 #define VCLK_POST_DIV 0x6010 /** Selects a post divisor of 4 instead of 2. */ # define VGA1_PD_P2_DIV_4 (1 << 15) /** Overrides the p2 post divisor field */ # define VGA1_PD_P1_DIV_2 (1 << 13) # define VGA1_PD_P1_SHIFT 8 /** P1 value is 2 greater than this field */ # define VGA1_PD_P1_MASK (0x1f << 8) /** Selects a post divisor of 4 instead of 2. */ # define VGA0_PD_P2_DIV_4 (1 << 7) /** Overrides the p2 post divisor field */ # define VGA0_PD_P1_DIV_2 (1 << 5) # define VGA0_PD_P1_SHIFT 0 /** P1 value is 2 greater than this field */ # define VGA0_PD_P1_MASK (0x1f << 0) #define POST_DIV_SELECT 0x70 #define POST_DIV_1 0x00 #define POST_DIV_2 0x10 #define POST_DIV_4 0x20 #define POST_DIV_8 0x30 #define POST_DIV_16 0x40 #define POST_DIV_32 0x50 #define VCO_LOOP_DIV_BY_4M 0x00 #define VCO_LOOP_DIV_BY_16M 0x04 /* Instruction Parser Mode Register * - p281 * - 2 new bits. */ #define INST_PM 0x20c0 #define AGP_SYNC_PACKET_FLUSH_ENABLE 0x20 /* reserved */ #define SYNC_PACKET_FLUSH_ENABLE 0x10 #define TWO_D_INST_DISABLE 0x08 #define THREE_D_INST_DISABLE 0x04 #define STATE_VAR_UPDATE_DISABLE 0x02 #define PAL_STIP_DISABLE 0x01 #define MEMMODE 0x20dc /* Instruction parser error register. p279 */ #define IPEIR 0x2088 #define IPEHR 0x208C #define INST_DONE 0x2090 # define IDCT_DONE (1 << 30) # define IQ_DONE (1 << 29) # define PR_DONE (1 << 28) # define VLD_DONE (1 << 27) # define IP_DONE (1 << 26) # define FBC_DONE (1 << 25) # define BINNER_DONE (1 << 24) # define SF_DONE (1 << 23) # define SE_DONE (1 << 22) # define WM_DONE (1 << 21) # define IZ_DONE (1 << 20) # define PERSPECTIVE_INTERP_DONE (1 << 19) # define DISPATCHER_DONE (1 << 18) # define PROJECTION_DONE (1 << 17) # define DEPENDENT_ADDRESS_DONE (1 << 16) # define QUAD_CACHE_DONE (1 << 15) # define TEXTURE_FETCH_DONE (1 << 14) # define TEXTURE_DECOMPRESS_DONE (1 << 13) # define SAMPLER_CACHE_DONE (1 << 12) # define FILTER_DONE (1 << 11) # define BYPASS_FIFO_DONE (1 << 10) # define PS_DONE (1 << 9) # define CC_DONE (1 << 8) # define MAP_FILTER_DONE (1 << 7) # define MAP_L2_IDLE (1 << 6) # define RING_2_ENABLE (1 << 2) # define RING_1_ENABLE (1 << 1) # define RING_0_ENABLE (1 << 0) #define SCPD0 0x209c /* debug */ #define INST_PS 0x20c4 #define IPEIR_I965 0x2064 /* i965 */ #define IPEHR_I965 0x2068 /* i965 */ #define INST_DONE_I965 0x206c # define I965_SF_DONE (1 << 23) # define I965_SE_DONE (1 << 22) # define I965_WM_DONE (1 << 21) # define I965_TEXTURE_FETCH_DONE (1 << 14) # define I965_SAMPLER_CACHE_DONE (1 << 12) # define I965_FILTER_DONE (1 << 11) # define I965_PS_DONE (1 << 9) # define I965_CC_DONE (1 << 8) # define I965_MAP_FILTER_DONE (1 << 7) # define I965_MAP_L2_IDLE (1 << 6) # define I965_CP_DONE (1 << 1) # define I965_RING_0_ENABLE (1 << 0) #define INST_PS_I965 0x2070 /* Current active ring head address: */ #define ACTHD_I965 0x2074 #define ACTHD 0x20C8 /* Current primary/secondary DMA fetch addresses: */ #define DMA_FADD_P 0x2078 #define DMA_FADD_S 0x20d4 #define INST_DONE_1 0x207c #define CACHE_MODE_0 0x2120 #define CACHE_MODE_1 0x2124 #define MI_MODE 0x209c #define MI_DISPLAY_POWER_DOWN 0x20e0 #define MI_ARB_STATE 0x20e4 #define MI_RDRET_STATE 0x20fc /* Start addresses for each of the primary rings: */ #define PR0_STR 0x20f0 #define PR1_STR 0x20f4 #define PR2_STR 0x20f8 #define WIZ_CTL 0x7c00 #define WIZ_CTL_SINGLE_SUBSPAN (1<<6) #define WIZ_CTL_IGNORE_STALLS (1<<5) #define SVG_WORK_CTL 0x7408 #define TS_CTL 0x7e00 #define TS_MUX_ERR_CODE (0<<8) #define TS_MUX_URB_0 (1<<8) #define TS_MUX_DISPATCH_ID_0 (10<<8) #define TS_MUX_ERR_CODE_VALID (15<<8) #define TS_MUX_TID_0 (16<<8) #define TS_MUX_EUID_0 (18<<8) #define TS_MUX_FFID_0 (22<<8) #define TS_MUX_EOT (26<<8) #define TS_MUX_SIDEBAND_0 (27<<8) #define TS_SNAP_ALL_CHILD (1<<2) #define TS_SNAP_ALL_ROOT (1<<1) #define TS_SNAP_ENABLE (1<<0) #define TS_DEBUG_DATA 0x7e0c #define TD_CTL 0x8000 #define TD_CTL2 0x8004 #define ECOSKPD 0x21d0 #define EXCC 0x2028 /* I965 debug regs: */ #define IA_VERTICES_COUNT_QW 0x2310 #define IA_PRIMITIVES_COUNT_QW 0x2318 #define VS_INVOCATION_COUNT_QW 0x2320 #define GS_INVOCATION_COUNT_QW 0x2328 #define GS_PRIMITIVES_COUNT_QW 0x2330 #define CL_INVOCATION_COUNT_QW 0x2338 #define CL_PRIMITIVES_COUNT_QW 0x2340 #define PS_INVOCATION_COUNT_QW 0x2348 #define PS_DEPTH_COUNT_QW 0x2350 #define TIMESTAMP_QW 0x2358 #define CLKCMP_QW 0x2360 /* General error reporting regs, p296 */ #define EIR 0x20B0 #define EMR 0x20B4 #define ESR 0x20B8 # define ERR_VERTEX_MAX (1 << 5) /* lpt/cst */ # define ERR_PGTBL_ERROR (1 << 4) # define ERR_DISPLAY_OVERLAY_UNDERRUN (1 << 3) # define ERR_MAIN_MEMORY_REFRESH (1 << 1) # define ERR_INSTRUCTION_ERROR (1 << 0) /* Interrupt Control Registers * - new bits for i810 * - new register hwstam (mask) */ #define HWS_PGA 0x2080 #define PWRCTXA 0x2088 /* 965GM+ only */ #define PWRCTX_EN (1<<0) #define HWSTAM 0x2098 /* p290 */ #define IER 0x20a0 /* p291 */ #define IIR 0x20a4 /* p292 */ #define IMR 0x20a8 /* p293 */ #define ISR 0x20ac /* p294 */ #define HW_ERROR 0x8000 #define SYNC_STATUS_TOGGLE 0x1000 #define DPY_0_FLIP_PENDING 0x0800 #define DPY_1_FLIP_PENDING 0x0400 /* not implemented on i810 */ #define OVL_0_FLIP_PENDING 0x0200 #define OVL_1_FLIP_PENDING 0x0100 /* not implemented on i810 */ #define DPY_0_VBLANK 0x0080 #define DPY_0_EVENT 0x0040 #define DPY_1_VBLANK 0x0020 /* not implemented on i810 */ #define DPY_1_EVENT 0x0010 /* not implemented on i810 */ #define HOST_PORT_EVENT 0x0008 /* */ #define CAPTURE_EVENT 0x0004 /* */ #define USER_DEFINED 0x0002 #define BREAKPOINT 0x0001 #define INTR_RESERVED (0x6000 | \ DPY_1_FLIP_PENDING | \ OVL_1_FLIP_PENDING | \ DPY_1_VBLANK | \ DPY_1_EVENT | \ HOST_PORT_EVENT | \ CAPTURE_EVENT ) /* FIFO Watermark and Burst Length Control Register * * - different offset and contents on i810 (p299) (fewer bits per field) * - some overlay fields added * - what does it all mean? */ #define FWATER_BLC 0x20d8 #define FWATER_BLC2 0x20dc #define MM_BURST_LENGTH 0x00700000 #define MM_FIFO_WATERMARK 0x0001F000 #define LM_BURST_LENGTH 0x00000700 #define LM_FIFO_WATERMARK 0x0000001F /* Fence/Tiling ranges [0..7] */ #define FENCE 0x2000 #define FENCE_NR 8 #define FENCE_NEW 0x3000 #define FENCE_NEW_NR 16 #define FENCE_LINEAR 0 #define FENCE_XMAJOR 1 #define FENCE_YMAJOR 2 #define I915G_FENCE_START_MASK 0x0ff00000 #define I830_FENCE_START_MASK 0x07f80000 #define FENCE_START_MASK 0x03F80000 #define FENCE_X_MAJOR 0x00000000 #define FENCE_Y_MAJOR 0x00001000 #define FENCE_SIZE_MASK 0x00000700 #define FENCE_SIZE_512K 0x00000000 #define FENCE_SIZE_1M 0x00000100 #define FENCE_SIZE_2M 0x00000200 #define FENCE_SIZE_4M 0x00000300 #define FENCE_SIZE_8M 0x00000400 #define FENCE_SIZE_16M 0x00000500 #define FENCE_SIZE_32M 0x00000600 #define FENCE_SIZE_64M 0x00000700 #define I915G_FENCE_SIZE_1M 0x00000000 #define I915G_FENCE_SIZE_2M 0x00000100 #define I915G_FENCE_SIZE_4M 0x00000200 #define I915G_FENCE_SIZE_8M 0x00000300 #define I915G_FENCE_SIZE_16M 0x00000400 #define I915G_FENCE_SIZE_32M 0x00000500 #define I915G_FENCE_SIZE_64M 0x00000600 #define I915G_FENCE_SIZE_128M 0x00000700 #define I965_FENCE_X_MAJOR 0x00000000 #define I965_FENCE_Y_MAJOR 0x00000002 #define FENCE_PITCH_1 0x00000000 #define FENCE_PITCH_2 0x00000010 #define FENCE_PITCH_4 0x00000020 #define FENCE_PITCH_8 0x00000030 #define FENCE_PITCH_16 0x00000040 #define FENCE_PITCH_32 0x00000050 #define FENCE_PITCH_64 0x00000060 #define FENCE_VALID 0x00000001 /* Registers to control page table, p274 */ #define PGETBL_CTL 0x2020 #define PGETBL_ADDR_MASK 0xFFFFF000 #define PGETBL_ENABLE_MASK 0x00000001 #define PGETBL_ENABLED 0x00000001 /** Added in 965G, this field has the actual size of the global GTT */ #define PGETBL_SIZE_MASK 0x0000000e #define PGETBL_SIZE_512KB (0 << 1) #define PGETBL_SIZE_256KB (1 << 1) #define PGETBL_SIZE_128KB (2 << 1) #define PGETBL_SIZE_1MB (3 << 1) #define PGETBL_SIZE_2MB (4 << 1) #define PGETBL_SIZE_1_5MB (5 << 1) #define G33_PGETBL_SIZE_MASK (3 << 8) #define G33_PGETBL_SIZE_1M (1 << 8) #define G33_PGETBL_SIZE_2M (2 << 8) #define I830_PTE_BASE 0x10000 #define PTE_ADDRESS_MASK 0xfffff000 #define PTE_ADDRESS_MASK_HIGH 0x000000f0 /* i915+ */ #define PTE_MAPPING_TYPE_UNCACHED (0 << 1) #define PTE_MAPPING_TYPE_DCACHE (1 << 1) /* i830 only */ #define PTE_MAPPING_TYPE_CACHED (3 << 1) #define PTE_MAPPING_TYPE_MASK (3 << 1) #define PTE_VALID (1 << 0) /** @defgroup PGE_ERR * @{ */ /** Page table debug register for i845 */ #define PGE_ERR 0x2024 #define PGE_ERR_ADDR_MASK 0xFFFFF000 #define PGE_ERR_ID_MASK 0x00000038 #define PGE_ERR_CAPTURE 0x00000000 #define PGE_ERR_OVERLAY 0x00000008 #define PGE_ERR_DISPLAY 0x00000010 #define PGE_ERR_HOST 0x00000018 #define PGE_ERR_RENDER 0x00000020 #define PGE_ERR_BLITTER 0x00000028 #define PGE_ERR_MAPPING 0x00000030 #define PGE_ERR_CMD_PARSER 0x00000038 #define PGE_ERR_TYPE_MASK 0x00000007 #define PGE_ERR_INV_TABLE 0x00000000 #define PGE_ERR_INV_PTE 0x00000001 #define PGE_ERR_MIXED_TYPES 0x00000002 #define PGE_ERR_PAGE_MISS 0x00000003 #define PGE_ERR_ILLEGAL_TRX 0x00000004 #define PGE_ERR_LOCAL_MEM 0x00000005 #define PGE_ERR_TILED 0x00000006 /** @} */ /** @defgroup PGTBL_ER * @{ */ /** Page table debug register for i945 */ # define PGTBL_ER 0x2024 # define PGTBL_ERR_MT_TILING (1 << 27) # define PGTBL_ERR_MT_GTT_PTE (1 << 26) # define PGTBL_ERR_LC_TILING (1 << 25) # define PGTBL_ERR_LC_GTT_PTE (1 << 24) # define PGTBL_ERR_BIN_VERTEXDATA_GTT_PTE (1 << 23) # define PGTBL_ERR_BIN_INSTRUCTION_GTT_PTE (1 << 22) # define PGTBL_ERR_CS_VERTEXDATA_GTT_PTE (1 << 21) # define PGTBL_ERR_CS_INSTRUCTION_GTT_PTE (1 << 20) # define PGTBL_ERR_CS_GTT (1 << 19) # define PGTBL_ERR_OVERLAY_TILING (1 << 18) # define PGTBL_ERR_OVERLAY_GTT_PTE (1 << 16) # define PGTBL_ERR_DISPC_TILING (1 << 14) # define PGTBL_ERR_DISPC_GTT_PTE (1 << 12) # define PGTBL_ERR_DISPB_TILING (1 << 10) # define PGTBL_ERR_DISPB_GTT_PTE (1 << 8) # define PGTBL_ERR_DISPA_TILING (1 << 6) # define PGTBL_ERR_DISPA_GTT_PTE (1 << 4) # define PGTBL_ERR_HOST_PTE_DATA (1 << 1) # define PGTBL_ERR_HOST_GTT_PTE (1 << 0) /** @} */ /* Ring buffer registers, p277, overview p19 */ #define LP_RING 0x2030 #define HP_RING 0x2040 #define RING_TAIL 0x00 #define TAIL_ADDR 0x000FFFF8 #define I830_TAIL_MASK 0x001FFFF8 #define RING_HEAD 0x04 #define HEAD_WRAP_COUNT 0xFFE00000 #define HEAD_WRAP_ONE 0x00200000 #define HEAD_ADDR 0x001FFFFC #define I830_HEAD_MASK 0x001FFFFC #define RING_START 0x08 #define START_ADDR 0x03FFFFF8 #define I830_RING_START_MASK 0xFFFFF000 #define RING_LEN 0x0C #define RING_NR_PAGES 0x001FF000 #define I830_RING_NR_PAGES 0x001FF000 #define RING_REPORT_MASK 0x00000006 #define RING_REPORT_64K 0x00000002 #define RING_REPORT_128K 0x00000004 #define RING_NO_REPORT 0x00000000 #define RING_VALID_MASK 0x00000001 #define RING_VALID 0x00000001 #define RING_INVALID 0x00000000 /* BitBlt Instructions * * There are many more masks & ranges yet to add. */ #define BR00_BITBLT_CLIENT 0x40000000 #define BR00_OP_COLOR_BLT 0x10000000 #define BR00_OP_SRC_COPY_BLT 0x10C00000 #define BR00_OP_FULL_BLT 0x11400000 #define BR00_OP_MONO_SRC_BLT 0x11800000 #define BR00_OP_MONO_SRC_COPY_BLT 0x11000000 #define BR00_OP_MONO_PAT_BLT 0x11C00000 #define BR00_OP_MONO_SRC_COPY_IMMEDIATE_BLT (0x61 << 22) #define BR00_OP_TEXT_IMMEDIATE_BLT 0xc000000 #define BR00_TPCY_DISABLE 0x00000000 #define BR00_TPCY_ENABLE 0x00000010 #define BR00_TPCY_ROP 0x00000000 #define BR00_TPCY_NO_ROP 0x00000020 #define BR00_TPCY_EQ 0x00000000 #define BR00_TPCY_NOT_EQ 0x00000040 #define BR00_PAT_MSB_FIRST 0x00000000 /* ? */ #define BR00_PAT_VERT_ALIGN 0x000000e0 #define BR00_LENGTH 0x0000000F #define BR09_DEST_ADDR 0x03FFFFFF #define BR11_SOURCE_PITCH 0x00003FFF #define BR12_SOURCE_ADDR 0x03FFFFFF #define BR13_SOLID_PATTERN 0x80000000 #define BR13_RIGHT_TO_LEFT 0x40000000 #define BR13_LEFT_TO_RIGHT 0x00000000 #define BR13_MONO_TRANSPCY 0x20000000 #define BR13_MONO_PATN_TRANS 0x10000000 #define BR13_USE_DYN_DEPTH 0x04000000 #define BR13_DYN_8BPP 0x00000000 #define BR13_DYN_16BPP 0x01000000 #define BR13_DYN_24BPP 0x02000000 #define BR13_ROP_MASK 0x00FF0000 #define BR13_DEST_PITCH 0x0000FFFF #define BR13_PITCH_SIGN_BIT 0x00008000 #define BR14_DEST_HEIGHT 0xFFFF0000 #define BR14_DEST_WIDTH 0x0000FFFF #define BR15_PATTERN_ADDR 0x03FFFFFF #define BR16_SOLID_PAT_COLOR 0x00FFFFFF #define BR16_BACKGND_PAT_CLR 0x00FFFFFF #define BR17_FGND_PAT_CLR 0x00FFFFFF #define BR18_SRC_BGND_CLR 0x00FFFFFF #define BR19_SRC_FGND_CLR 0x00FFFFFF /* Instruction parser instructions */ #define INST_PARSER_CLIENT 0x00000000 #define INST_OP_FLUSH 0x02000000 #define INST_FLUSH_MAP_CACHE 0x00000001 #define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) /* Registers in the i810 host-pci bridge pci config space which affect * the i810 graphics operations. */ #define SMRAM_MISCC 0x70 #define GMS 0x000000c0 #define GMS_DISABLE 0x00000000 #define GMS_ENABLE_BARE 0x00000040 #define GMS_ENABLE_512K 0x00000080 #define GMS_ENABLE_1M 0x000000c0 #define USMM 0x00000030 #define USMM_DISABLE 0x00000000 #define USMM_TSEG_ZERO 0x00000010 #define USMM_TSEG_512K 0x00000020 #define USMM_TSEG_1M 0x00000030 #define GFX_MEM_WIN_SIZE 0x00010000 #define GFX_MEM_WIN_32M 0x00010000 #define GFX_MEM_WIN_64M 0x00000000 /* Overkill? I don't know. Need to figure out top of mem to make the * SMRAM calculations come out. Linux seems to have problems * detecting it all on its own, so this seems a reasonable double * check to any user supplied 'mem=...' boot param. * * ... unfortunately this reg doesn't work according to spec on the * test hardware. */ #define WHTCFG_PAMR_DRP 0x50 #define SYS_DRAM_ROW_0_SHIFT 16 #define SYS_DRAM_ROW_1_SHIFT 20 #define DRAM_MASK 0x0f #define DRAM_VALUE_0 0 #define DRAM_VALUE_1 8 /* No 2 value defined */ #define DRAM_VALUE_3 16 #define DRAM_VALUE_4 16 #define DRAM_VALUE_5 24 #define DRAM_VALUE_6 32 #define DRAM_VALUE_7 32 #define DRAM_VALUE_8 48 #define DRAM_VALUE_9 64 #define DRAM_VALUE_A 64 #define DRAM_VALUE_B 96 #define DRAM_VALUE_C 128 #define DRAM_VALUE_D 128 #define DRAM_VALUE_E 192 #define DRAM_VALUE_F 256 /* nice one, geezer */ #define LM_FREQ_MASK 0x10 #define LM_FREQ_133 0x10 #define LM_FREQ_100 0x00 /* These are 3d state registers, but the state is invarient, so we let * the X server handle it: */ /* GFXRENDERSTATE_COLOR_CHROMA_KEY, p135 */ #define GFX_OP_COLOR_CHROMA_KEY ((0x3<<29)|(0x1d<<24)|(0x2<<16)|0x1) #define CC1_UPDATE_KILL_WRITE (1<<28) #define CC1_ENABLE_KILL_WRITE (1<<27) #define CC1_DISABLE_KILL_WRITE 0 #define CC1_UPDATE_COLOR_IDX (1<<26) #define CC1_UPDATE_CHROMA_LOW (1<<25) #define CC1_UPDATE_CHROMA_HI (1<<24) #define CC1_CHROMA_LOW_MASK ((1<<24)-1) #define CC2_COLOR_IDX_SHIFT 24 #define CC2_COLOR_IDX_MASK (0xff<<24) #define CC2_CHROMA_HI_MASK ((1<<24)-1) #define GFX_CMD_CONTEXT_SEL ((0<<29)|(0x5<<23)) #define CS_UPDATE_LOAD (1<<17) #define CS_UPDATE_USE (1<<16) #define CS_UPDATE_LOAD (1<<17) #define CS_LOAD_CTX0 0 #define CS_LOAD_CTX1 (1<<8) #define CS_USE_CTX0 0 #define CS_USE_CTX1 (1<<0) /* I810 LCD/TV registers */ #define LCD_TV_HTOTAL 0x60000 #define LCD_TV_C 0x60018 #define LCD_TV_OVRACT 0x6001C #define LCD_TV_ENABLE (1 << 31) #define LCD_TV_VGAMOD (1 << 28) /* I830 CRTC registers */ #define HTOTAL_A 0x60000 #define HBLANK_A 0x60004 #define HSYNC_A 0x60008 #define VTOTAL_A 0x6000c #define VBLANK_A 0x60010 #define VSYNC_A 0x60014 #define PIPEASRC 0x6001c #define BCLRPAT_A 0x60020 #define VSYNCSHIFT_A 0x60028 #define HTOTAL_B 0x61000 #define HBLANK_B 0x61004 #define HSYNC_B 0x61008 #define VTOTAL_B 0x6100c #define VBLANK_B 0x61010 #define VSYNC_B 0x61014 #define PIPEBSRC 0x6101c #define BCLRPAT_B 0x61020 #define VSYNCSHIFT_B 0x61028 #define PP_STATUS 0x61200 # define PP_ON (1 << 31) /** * Indicates that all dependencies of the panel are on: * * - PLL enabled * - pipe enabled * - LVDS/DVOB/DVOC on */ # define PP_READY (1 << 30) # define PP_SEQUENCE_NONE (0 << 28) # define PP_SEQUENCE_ON (1 << 28) # define PP_SEQUENCE_OFF (2 << 28) # define PP_SEQUENCE_MASK 0x30000000 #define PP_CONTROL 0x61204 # define POWER_DOWN_ON_RESET (1 << 1) # define POWER_TARGET_ON (1 << 0) #define PP_ON_DELAYS 0x61208 #define PP_OFF_DELAYS 0x6120c #define PP_DIVISOR 0x61210 #define PFIT_CONTROL 0x61230 # define PFIT_ENABLE (1 << 31) /* Pre-965 */ # define VERT_INTERP_DISABLE (0 << 10) # define VERT_INTERP_BILINEAR (1 << 10) # define VERT_INTERP_MASK (3 << 10) # define VERT_AUTO_SCALE (1 << 9) # define HORIZ_INTERP_DISABLE (0 << 6) # define HORIZ_INTERP_BILINEAR (1 << 6) # define HORIZ_INTERP_MASK (3 << 6) # define HORIZ_AUTO_SCALE (1 << 5) # define PANEL_8TO6_DITHER_ENABLE (1 << 3) /* 965+ */ # define PFIT_PIPE_MASK (3 << 29) # define PFIT_PIPE_SHIFT 29 # define PFIT_SCALING_MODE_MASK (7 << 26) # define PFIT_SCALING_AUTO (0 << 26) # define PFIT_SCALING_PROGRAMMED (1 << 26) # define PFIT_SCALING_PILLAR (2 << 26) # define PFIT_SCALING_LETTER (3 << 26) # define PFIT_FILTER_SELECT_MASK (3 << 24) # define PFIT_FILTER_FUZZY (0 << 24) # define PFIT_FILTER_CRISP (1 << 24) # define PFIT_FILTER_MEDIAN (2 << 24) #define PFIT_PGM_RATIOS 0x61234 /* Pre-965 */ # define PFIT_VERT_SCALE_SHIFT 20 # define PFIT_VERT_SCALE_MASK 0xfff00000 # define PFIT_HORIZ_SCALE_SHIFT 4 # define PFIT_HORIZ_SCALE_MASK 0x0000fff0 /* 965+ */ # define PFIT_VERT_SCALE_SHIFT_965 16 # define PFIT_VERT_SCALE_MASK_965 0x1fff0000 # define PFIT_HORIZ_SCALE_SHIFT_965 0 # define PFIT_HORIZ_SCALE_MASK_965 0x00001fff #define DPLL_A 0x06014 #define DPLL_B 0x06018 # define DPLL_VCO_ENABLE (1 << 31) # define DPLL_DVO_HIGH_SPEED (1 << 30) # define DPLL_SYNCLOCK_ENABLE (1 << 29) # define DPLL_VGA_MODE_DIS (1 << 28) # define DPLLB_MODE_DAC_SERIAL (1 << 26) /* i915 */ # define DPLLB_MODE_LVDS (2 << 26) /* i915 */ # define DPLL_MODE_MASK (3 << 26) # define DPLL_DAC_SERIAL_P2_CLOCK_DIV_10 (0 << 24) /* i915 */ # define DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 (1 << 24) /* i915 */ # define DPLLB_LVDS_P2_CLOCK_DIV_14 (0 << 24) /* i915 */ # define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ # define DPLL_P2_CLOCK_DIV_MASK 0x03000000 /* i915 */ # define DPLL_FPA01_P1_POST_DIV_MASK 0x00ff0000 /* i915 */ # define DPLL_FPA01_P1_POST_DIV_MASK_IGD 0x00ff8000 /* IGD */ /** * The i830 generation, in DAC/serial mode, defines p1 as two plus this * bitfield, or just 2 if PLL_P1_DIVIDE_BY_TWO is set. */ # define DPLL_FPA01_P1_POST_DIV_MASK_I830 0x001f0000 /** * The i830 generation, in LVDS mode, defines P1 as the bit number set within * this field (only one bit may be set). */ # define DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS 0x003f0000 # define DPLL_FPA01_P1_POST_DIV_SHIFT 16 # define DPLL_FPA01_P1_POST_DIV_SHIFT_IGD 15 /* Ironlake */ # define DPLL_FPA0_P1_POST_DIV_SHIFT 16 # define PLL_P2_DIVIDE_BY_4 (1 << 23) /* i830, required in DVO non-gang */ # define PLL_P1_DIVIDE_BY_TWO (1 << 21) /* i830 */ # define PLL_REF_INPUT_DREFCLK (0 << 13) # define PLL_REF_INPUT_TVCLKINA (1 << 13) /* i830 */ # define PLL_REF_INPUT_SUPER_SSC (1 << 13) /* Ironlake: 120M SSC */ # define PLL_REF_INPUT_TVCLKINBC (2 << 13) /* SDVO TVCLKIN */ # define PLLB_REF_INPUT_SPREADSPECTRUMIN (3 << 13) # define PLL_REF_INPUT_MASK (3 << 13) # define PLL_REF_INPUT_DMICLK (5 << 13) /* Ironlake: DMI refclk */ # define PLL_LOAD_PULSE_PHASE_SHIFT 9 /* * Parallel to Serial Load Pulse phase selection. * Selects the phase for the 10X DPLL clock for the PCIe * digital display port. The range is 4 to 13; 10 or more * is just a flip delay. The default is 6 */ # define PLL_LOAD_PULSE_PHASE_MASK (0xf << PLL_LOAD_PULSE_PHASE_SHIFT) # define DISPLAY_RATE_SELECT_FPA1 (1 << 8) /* Ironlake */ # define PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT 9 # define PLL_REF_SDVO_HDMI_MULTIPLIER_MASK (7 << 9) # define PLL_REF_SDVO_HDMI_MULTIPLIER(x) (((x)-1)<< PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT) # define DPLL_FPA1_P1_POST_DIV_SHIFT 0 # define DPLL_FPA1_P1_POST_DIV_MASK 0xff /** * SDVO multiplier for 945G/GM. Not used on 965. * * \sa DPLL_MD_UDI_MULTIPLIER_MASK */ # define SDVO_MULTIPLIER_MASK 0x000000ff # define SDVO_MULTIPLIER_SHIFT_HIRES 4 # define SDVO_MULTIPLIER_SHIFT_VGA 0 /** @defgroup DPLL_MD * @{ */ /** Pipe A SDVO/UDI clock multiplier/divider register for G965. */ #define DPLL_A_MD 0x0601c /** Pipe B SDVO/UDI clock multiplier/divider register for G965. */ #define DPLL_B_MD 0x06020 /** * UDI pixel divider, controlling how many pixels are stuffed into a packet. * * Value is pixels minus 1. Must be set to 1 pixel for SDVO. */ # define DPLL_MD_UDI_DIVIDER_MASK 0x3f000000 # define DPLL_MD_UDI_DIVIDER_SHIFT 24 /** UDI pixel divider for VGA, same as DPLL_MD_UDI_DIVIDER_MASK. */ # define DPLL_MD_VGA_UDI_DIVIDER_MASK 0x003f0000 # define DPLL_MD_VGA_UDI_DIVIDER_SHIFT 16 /** * SDVO/UDI pixel multiplier. * * SDVO requires that the bus clock rate be between 1 and 2 Ghz, and the bus * clock rate is 10 times the DPLL clock. At low resolution/refresh rate * modes, the bus rate would be below the limits, so SDVO allows for stuffing * dummy bytes in the datastream at an increased clock rate, with both sides of * the link knowing how many bytes are fill. * * So, for a mode with a dotclock of 65Mhz, we would want to double the clock * rate to 130Mhz to get a bus rate of 1.30Ghz. The DPLL clock rate would be * set to 130Mhz, and the SDVO multiplier set to 2x in this register and * through an SDVO command. * * This register field has values of multiplication factor minus 1, with * a maximum multiplier of 5 for SDVO. */ # define DPLL_MD_UDI_MULTIPLIER_MASK 0x00003f00 # define DPLL_MD_UDI_MULTIPLIER_SHIFT 8 /** SDVO/UDI pixel multiplier for VGA, same as DPLL_MD_UDI_MULTIPLIER_MASK. * This best be set to the default value (3) or the CRT won't work. No, * I don't entirely understand what this does... */ # define DPLL_MD_VGA_UDI_MULTIPLIER_MASK 0x0000003f # define DPLL_MD_VGA_UDI_MULTIPLIER_SHIFT 0 /** @} */ #define DPLL_TEST 0x606c # define DPLLB_TEST_SDVO_DIV_1 (0 << 22) # define DPLLB_TEST_SDVO_DIV_2 (1 << 22) # define DPLLB_TEST_SDVO_DIV_4 (2 << 22) # define DPLLB_TEST_SDVO_DIV_MASK (3 << 22) # define DPLLB_TEST_N_BYPASS (1 << 19) # define DPLLB_TEST_M_BYPASS (1 << 18) # define DPLLB_INPUT_BUFFER_ENABLE (1 << 16) # define DPLLA_TEST_N_BYPASS (1 << 3) # define DPLLA_TEST_M_BYPASS (1 << 2) # define DPLLA_INPUT_BUFFER_ENABLE (1 << 0) #define D_STATE 0x6104 #define DSPCLK_GATE_D 0x6200 # define DPUNIT_B_CLOCK_GATE_DISABLE (1 << 30) /* 965 */ # define VSUNIT_CLOCK_GATE_DISABLE (1 << 29) /* 965 */ # define VRHUNIT_CLOCK_GATE_DISABLE (1 << 28) /* 965 */ # define VRDUNIT_CLOCK_GATE_DISABLE (1 << 27) /* 965 */ # define AUDUNIT_CLOCK_GATE_DISABLE (1 << 26) /* 965 */ # define DPUNIT_A_CLOCK_GATE_DISABLE (1 << 25) /* 965 */ # define DPCUNIT_CLOCK_GATE_DISABLE (1 << 24) /* 965 */ # define TVRUNIT_CLOCK_GATE_DISABLE (1 << 23) /* 915-945 */ # define TVCUNIT_CLOCK_GATE_DISABLE (1 << 22) /* 915-945 */ # define TVFUNIT_CLOCK_GATE_DISABLE (1 << 21) /* 915-945 */ # define TVEUNIT_CLOCK_GATE_DISABLE (1 << 20) /* 915-945 */ # define DVSUNIT_CLOCK_GATE_DISABLE (1 << 19) /* 915-945 */ # define DSSUNIT_CLOCK_GATE_DISABLE (1 << 18) /* 915-945 */ # define DDBUNIT_CLOCK_GATE_DISABLE (1 << 17) /* 915-945 */ # define DPRUNIT_CLOCK_GATE_DISABLE (1 << 16) /* 915-945 */ # define DPFUNIT_CLOCK_GATE_DISABLE (1 << 15) /* 915-945 */ # define DPBMUNIT_CLOCK_GATE_DISABLE (1 << 14) /* 915-945 */ # define DPLSUNIT_CLOCK_GATE_DISABLE (1 << 13) /* 915-945 */ # define DPLUNIT_CLOCK_GATE_DISABLE (1 << 12) /* 915-945 */ # define DPOUNIT_CLOCK_GATE_DISABLE (1 << 11) # define DPBUNIT_CLOCK_GATE_DISABLE (1 << 10) # define DCUNIT_CLOCK_GATE_DISABLE (1 << 9) # define DPUNIT_CLOCK_GATE_DISABLE (1 << 8) # define VRUNIT_CLOCK_GATE_DISABLE (1 << 7) /* 915+: reserved */ # define OVHUNIT_CLOCK_GATE_DISABLE (1 << 6) /* 830-865 */ # define DPIOUNIT_CLOCK_GATE_DISABLE (1 << 6) /* 915-945 */ # define OVFUNIT_CLOCK_GATE_DISABLE (1 << 5) # define OVBUNIT_CLOCK_GATE_DISABLE (1 << 4) /** * This bit must be set on the 830 to prevent hangs when turning off the * overlay scaler. */ # define OVRUNIT_CLOCK_GATE_DISABLE (1 << 3) # define OVCUNIT_CLOCK_GATE_DISABLE (1 << 2) # define OVUUNIT_CLOCK_GATE_DISABLE (1 << 1) # define ZVUNIT_CLOCK_GATE_DISABLE (1 << 0) /* 830 */ # define OVLUNIT_CLOCK_GATE_DISABLE (1 << 0) /* 845,865 */ #define RENCLK_GATE_D1 0x6204 # define BLITTER_CLOCK_GATE_DISABLE (1 << 13) /* 945GM only */ # define MPEG_CLOCK_GATE_DISABLE (1 << 12) /* 945GM only */ # define PC_FE_CLOCK_GATE_DISABLE (1 << 11) # define PC_BE_CLOCK_GATE_DISABLE (1 << 10) # define WINDOWER_CLOCK_GATE_DISABLE (1 << 9) # define INTERPOLATOR_CLOCK_GATE_DISABLE (1 << 8) # define COLOR_CALCULATOR_CLOCK_GATE_DISABLE (1 << 7) # define MOTION_COMP_CLOCK_GATE_DISABLE (1 << 6) # define MAG_CLOCK_GATE_DISABLE (1 << 5) /** This bit must be unset on 855,865 */ # define MECI_CLOCK_GATE_DISABLE (1 << 4) # define DCMP_CLOCK_GATE_DISABLE (1 << 3) # define MEC_CLOCK_GATE_DISABLE (1 << 2) # define MECO_CLOCK_GATE_DISABLE (1 << 1) /** This bit must be set on 855,865. */ # define SV_CLOCK_GATE_DISABLE (1 << 0) # define I915_MPEG_CLOCK_GATE_DISABLE (1 << 16) # define I915_VLD_IP_PR_CLOCK_GATE_DISABLE (1 << 15) # define I915_MOTION_COMP_CLOCK_GATE_DISABLE (1 << 14) # define I915_BD_BF_CLOCK_GATE_DISABLE (1 << 13) # define I915_SF_SE_CLOCK_GATE_DISABLE (1 << 12) # define I915_WM_CLOCK_GATE_DISABLE (1 << 11) # define I915_IZ_CLOCK_GATE_DISABLE (1 << 10) # define I915_PI_CLOCK_GATE_DISABLE (1 << 9) # define I915_DI_CLOCK_GATE_DISABLE (1 << 8) # define I915_SH_SV_CLOCK_GATE_DISABLE (1 << 7) # define I915_PL_DG_QC_FT_CLOCK_GATE_DISABLE (1 << 6) # define I915_SC_CLOCK_GATE_DISABLE (1 << 5) # define I915_FL_CLOCK_GATE_DISABLE (1 << 4) # define I915_DM_CLOCK_GATE_DISABLE (1 << 3) # define I915_PS_CLOCK_GATE_DISABLE (1 << 2) # define I915_CC_CLOCK_GATE_DISABLE (1 << 1) # define I915_BY_CLOCK_GATE_DISABLE (1 << 0) # define I965_RCZ_CLOCK_GATE_DISABLE (1 << 30) /** This bit must always be set on 965G/965GM */ # define I965_RCC_CLOCK_GATE_DISABLE (1 << 29) # define I965_RCPB_CLOCK_GATE_DISABLE (1 << 28) # define I965_DAP_CLOCK_GATE_DISABLE (1 << 27) # define I965_ROC_CLOCK_GATE_DISABLE (1 << 26) # define I965_GW_CLOCK_GATE_DISABLE (1 << 25) # define I965_TD_CLOCK_GATE_DISABLE (1 << 24) /** This bit must always be set on 965G */ # define I965_ISC_CLOCK_GATE_DISABLE (1 << 23) # define I965_IC_CLOCK_GATE_DISABLE (1 << 22) # define I965_EU_CLOCK_GATE_DISABLE (1 << 21) # define I965_IF_CLOCK_GATE_DISABLE (1 << 20) # define I965_TC_CLOCK_GATE_DISABLE (1 << 19) # define I965_SO_CLOCK_GATE_DISABLE (1 << 17) # define I965_FBC_CLOCK_GATE_DISABLE (1 << 16) # define I965_MARI_CLOCK_GATE_DISABLE (1 << 15) # define I965_MASF_CLOCK_GATE_DISABLE (1 << 14) # define I965_MAWB_CLOCK_GATE_DISABLE (1 << 13) # define I965_EM_CLOCK_GATE_DISABLE (1 << 12) # define I965_UC_CLOCK_GATE_DISABLE (1 << 11) # define I965_SI_CLOCK_GATE_DISABLE (1 << 6) # define I965_MT_CLOCK_GATE_DISABLE (1 << 5) # define I965_PL_CLOCK_GATE_DISABLE (1 << 4) # define I965_DG_CLOCK_GATE_DISABLE (1 << 3) # define I965_QC_CLOCK_GATE_DISABLE (1 << 2) # define I965_FT_CLOCK_GATE_DISABLE (1 << 1) # define I965_DM_CLOCK_GATE_DISABLE (1 << 0) #define RENCLK_GATE_D2 0x6208 #define VF_UNIT_CLOCK_GATE_DISABLE (1 << 9) #define GS_UNIT_CLOCK_GATE_DISABLE (1 << 7) #define CL_UNIT_CLOCK_GATE_DISABLE (1 << 6) #define RAMCLK_GATE_D 0x6210 /* CRL only */ #define DEUC 0x6214 /* CRL only */ /* * This is a PCI config space register to manipulate backlight brightness * It is used when the BLM_LEGACY_MODE is turned on. When enabled, the first * byte of this config register sets brightness within the range from * 0 to 0xff */ #define LEGACY_BACKLIGHT_BRIGHTNESS 0xf4 #define BLC_PWM_CTL 0x61254 #define BACKLIGHT_MODULATION_FREQ_SHIFT (17) #define BACKLIGHT_MODULATION_FREQ_SHIFT2 (16) /** * This is the most significant 15 bits of the number of backlight cycles in a * complete cycle of the modulated backlight control. * * The actual value is this field multiplied by two. */ #define BACKLIGHT_MODULATION_FREQ_MASK (0x7fff << 17) #define BACKLIGHT_MODULATION_FREQ_MASK2 (0xffff << 16) #define BLM_LEGACY_MODE (1 << 16) /** * This is the number of cycles out of the backlight modulation cycle for which * the backlight is on. * * This field must be no greater than the number of cycles in the complete * backlight modulation cycle. */ #define BACKLIGHT_DUTY_CYCLE_SHIFT (0) #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) /* On 965+ backlight control is in another register */ #define BLC_PWM_CTL2 0x61250 #define BLM_LEGACY_MODE2 (1 << 30) #define BLM_CTL 0x61260 #define BLM_THRESHOLD_0 0x61270 #define BLM_THRESHOLD_1 0x61274 #define BLM_THRESHOLD_2 0x61278 #define BLM_THRESHOLD_3 0x6127c #define BLM_THRESHOLD_4 0x61280 #define BLM_THRESHOLD_5 0x61284 #define BLM_ACCUMULATOR_0 0x61290 #define BLM_ACCUMULATOR_1 0x61294 #define BLM_ACCUMULATOR_2 0x61298 #define BLM_ACCUMULATOR_3 0x6129c #define BLM_ACCUMULATOR_4 0x612a0 #define BLM_ACCUMULATOR_5 0x612a4 #define FPA0 0x06040 #define FPA1 0x06044 #define FPB0 0x06048 #define FPB1 0x0604c # define FP_N_DIV_MASK 0x003f0000 # define FP_N_IGD_DIV_MASK 0x00ff0000 # define FP_N_DIV_SHIFT 16 # define FP_M1_DIV_MASK 0x00003f00 # define FP_M1_DIV_SHIFT 8 # define FP_M2_DIV_MASK 0x0000003f # define FP_M2_IGD_DIV_MASK 0x000000ff # define FP_M2_DIV_SHIFT 0 #define PORT_HOTPLUG_EN 0x61110 # define HDMIB_HOTPLUG_INT_EN (1 << 29) # define HDMIC_HOTPLUG_INT_EN (1 << 28) # define HDMID_HOTPLUG_INT_EN (1 << 27) # define SDVOB_HOTPLUG_INT_EN (1 << 26) # define SDVOC_HOTPLUG_INT_EN (1 << 25) # define TV_HOTPLUG_INT_EN (1 << 18) # define CRT_HOTPLUG_INT_EN (1 << 9) # define CRT_HOTPLUG_ACTIVATION_PERIOD_32 (0 << 8) /* must use period 64 on GM45 according to docs */ # define CRT_HOTPLUG_ACTIVATION_PERIOD_64 (1 << 8) # define CRT_HOTPLUG_DAC_ON_TIME_2M (0 << 7) # define CRT_HOTPLUG_DAC_ON_TIME_4M (1 << 7) # define CRT_HOTPLUG_VOLTAGE_COMPARE_40 (0 << 5) # define CRT_HOTPLUG_VOLTAGE_COMPARE_50 (1 << 5) # define CRT_HOTPLUG_VOLTAGE_COMPARE_60 (2 << 5) # define CRT_HOTPLUG_VOLTAGE_COMPARE_70 (3 << 5) # define CRT_HOTPLUG_VOLTAGE_COMPARE_MASK (3 << 5) # define CRT_HOTPLUG_DETECT_DELAY_1G (0 << 4) # define CRT_HOTPLUG_DETECT_DELAY_2G (1 << 4) # define CRT_HOTPLUG_FORCE_DETECT (1 << 3) # define CRT_HOTPLUG_DETECT_VOLTAGE_325MV (0 << 2) # define CRT_HOTPLUG_DETECT_VOLTAGE_475MV (1 << 2) # define CRT_HOTPLUG_MASK (0x3fc) /* Bits 9-2 */ # define CRT_FORCE_HOTPLUG_MASK 0xfffffe1f #define PORT_HOTPLUG_STAT 0x61114 # define HDMIB_HOTPLUG_INT_STATUS (1 << 29) # define HDMIC_HOTPLUG_INT_STATUS (1 << 28) # define HDMID_HOTPLUG_INT_STATUS (1 << 27) # define CRT_HOTPLUG_INT_STATUS (1 << 11) # define TV_HOTPLUG_INT_STATUS (1 << 10) # define CRT_HOTPLUG_MONITOR_MASK (3 << 8) # define CRT_HOTPLUG_MONITOR_COLOR (3 << 8) # define CRT_HOTPLUG_MONITOR_MONO (2 << 8) # define CRT_HOTPLUG_MONITOR_NONE (0 << 8) # define SDVOC_HOTPLUG_INT_STATUS (1 << 7) # define SDVOB_HOTPLUG_INT_STATUS (1 << 6) #define SDVOB 0x61140 #define SDVOC 0x61160 #define SDVO_ENABLE (1 << 31) #define SDVO_PIPE_B_SELECT (1 << 30) #define SDVO_STALL_SELECT (1 << 29) #define SDVO_INTERRUPT_ENABLE (1 << 26) /** * 915G/GM SDVO pixel multiplier. * * Programmed value is multiplier - 1, up to 5x. * * \sa DPLL_MD_UDI_MULTIPLIER_MASK */ #define SDVO_PORT_MULTIPLY_MASK (7 << 23) #define SDVO_PORT_MULTIPLY_SHIFT 23 #define SDVO_PHASE_SELECT_MASK (15 << 19) #define SDVO_PHASE_SELECT_DEFAULT (6 << 19) #define SDVO_CLOCK_OUTPUT_INVERT (1 << 18) #define SDVOC_GANG_MODE (1 << 16) #define SDVO_ENCODING_SDVO (0x0 << 10) #define SDVO_ENCODING_HDMI (0x2 << 10) /** Requird for HDMI operation */ #define SDVO_NULL_PACKETS_DURING_VSYNC (1 << 9) #define SDVO_COLOR_NOT_FULL_RANGE (1 << 8) #define SDVO_BORDER_ENABLE (1 << 7) #define SDVO_AUDIO_ENABLE (1 << 6) /** New with 965, default is to be set */ #define SDVO_VSYNC_ACTIVE_HIGH (1 << 4) /** New with 965, default is to be set */ #define SDVO_HSYNC_ACTIVE_HIGH (1 << 3) /** 915/945 only, read-only bit */ #define SDVOB_PCIE_CONCURRENCY (1 << 3) #define SDVO_DETECTED (1 << 2) /* Bits to be preserved when writing */ #define SDVOB_PRESERVE_MASK ((1 << 17) | (1 << 16) | (1 << 14)) #define SDVOC_PRESERVE_MASK (1 << 17) #define UDIB_SVB_SHB_CODES 0x61144 #define UDIB_SHA_BLANK_CODES 0x61148 #define UDIB_START_END_FILL_CODES 0x6114c #define SDVOUDI 0x61150 #define I830_HTOTAL_MASK 0xfff0000 #define I830_HACTIVE_MASK 0x7ff #define I830_HBLANKEND_MASK 0xfff0000 #define I830_HBLANKSTART_MASK 0xfff #define I830_HSYNCEND_MASK 0xfff0000 #define I830_HSYNCSTART_MASK 0xfff #define I830_VTOTAL_MASK 0xfff0000 #define I830_VACTIVE_MASK 0x7ff #define I830_VBLANKEND_MASK 0xfff0000 #define I830_VBLANKSTART_MASK 0xfff #define I830_VSYNCEND_MASK 0xfff0000 #define I830_VSYNCSTART_MASK 0xfff #define I830_PIPEA_HORZ_MASK 0x7ff0000 #define I830_PIPEA_VERT_MASK 0x7ff #define ADPA 0x61100 #define ADPA_DAC_ENABLE (1<<31) #define ADPA_DAC_DISABLE 0 #define ADPA_PIPE_SELECT_MASK (1<<30) #define ADPA_PIPE_A_SELECT 0 #define ADPA_PIPE_B_SELECT (1<<30) #define ADPA_USE_VGA_HVPOLARITY (1<<15) #define ADPA_SETS_HVPOLARITY 0 #define ADPA_VSYNC_CNTL_DISABLE (1<<11) #define ADPA_VSYNC_CNTL_ENABLE 0 #define ADPA_HSYNC_CNTL_DISABLE (1<<10) #define ADPA_HSYNC_CNTL_ENABLE 0 #define ADPA_VSYNC_ACTIVE_HIGH (1<<4) #define ADPA_VSYNC_ACTIVE_LOW 0 #define ADPA_HSYNC_ACTIVE_HIGH (1<<3) #define ADPA_HSYNC_ACTIVE_LOW 0 #define DVOA 0x61120 #define DVOB 0x61140 #define DVOC 0x61160 #define DVO_ENABLE (1 << 31) #define DVO_PIPE_B_SELECT (1 << 30) #define DVO_PIPE_STALL_UNUSED (0 << 28) #define DVO_PIPE_STALL (1 << 28) #define DVO_PIPE_STALL_TV (2 << 28) #define DVO_PIPE_STALL_MASK (3 << 28) #define DVO_USE_VGA_SYNC (1 << 15) #define DVO_DATA_ORDER_I740 (0 << 14) #define DVO_DATA_ORDER_FP (1 << 14) #define DVO_VSYNC_DISABLE (1 << 11) #define DVO_HSYNC_DISABLE (1 << 10) #define DVO_VSYNC_TRISTATE (1 << 9) #define DVO_HSYNC_TRISTATE (1 << 8) #define DVO_BORDER_ENABLE (1 << 7) #define DVO_DATA_ORDER_GBRG (1 << 6) #define DVO_DATA_ORDER_RGGB (0 << 6) #define DVO_DATA_ORDER_GBRG_ERRATA (0 << 6) #define DVO_DATA_ORDER_RGGB_ERRATA (1 << 6) #define DVO_VSYNC_ACTIVE_HIGH (1 << 4) #define DVO_HSYNC_ACTIVE_HIGH (1 << 3) #define DVO_BLANK_ACTIVE_HIGH (1 << 2) #define DVO_OUTPUT_CSTATE_PIXELS (1 << 1) /* SDG only */ #define DVO_OUTPUT_SOURCE_SIZE_PIXELS (1 << 0) /* SDG only */ #define DVO_PRESERVE_MASK (0x7<<24) #define DVOA_SRCDIM 0x61124 #define DVOB_SRCDIM 0x61144 #define DVOC_SRCDIM 0x61164 #define DVO_SRCDIM_HORIZONTAL_SHIFT 12 #define DVO_SRCDIM_VERTICAL_SHIFT 0 /** @defgroup LVDS * @{ */ /** * This register controls the LVDS output enable, pipe selection, and data * format selection. * * All of the clock/data pairs are force powered down by power sequencing. */ #define LVDS 0x61180 /** * Enables the LVDS port. This bit must be set before DPLLs are enabled, as * the DPLL semantics change when the LVDS is assigned to that pipe. */ # define LVDS_PORT_EN (1 << 31) /** Selects pipe B for LVDS data. Must be set on pre-965. */ # define LVDS_PIPEB_SELECT (1 << 30) /* on 965, dithering is enabled in this register, not PFIT_CONTROL */ # define LVDS_DITHER_ENABLE (1 << 25) /* * Selects between .0 and .1 formats: * * 0 = 1x18.0, 2x18.0, 1x24.0 or 2x24.0 * 1 = 1x24.1 or 2x24.1 */ # define LVDS_DATA_FORMAT_DOT_ONE (1 << 24) /* Using LE instead of HS on second channel control signal */ # define LVDS_LE_CONTROL_ENABLE (1 << 23) /* Using LF instead of VS on second channel control signal */ # define LVDS_LF_CONTROL_ENABLE (1 << 22) /* invert vsync signal polarity */ # define LVDS_VSYNC_POLARITY_INVERT (1 << 21) /* invert hsync signal polarity */ # define LVDS_HSYNC_POLARITY_INVERT (1 << 20) /* invert display enable signal polarity */ # define LVDS_DE_POLARITY_INVERT (1 << 19) /* * Control signals for second channel, ignored in single channel modes */ /* send DE, HS, VS on second channel */ # define LVDS_SECOND_CHANNEL_DE_HS_VS (0 << 17) # define LVDS_SECOND_CHANNEL_RESERVED (1 << 17) /* Send zeros instead of DE, HS, VS on second channel */ # define LVDS_SECOND_CHANNEL_ZEROS (2 << 17) /* Set DE=0, HS=LE, VS=LF on second channel */ # define LVDS_SECOND_CHANNEL_HS_VS (3 << 17) /* * Send duplicate data for channel reserved bits, otherwise send zeros */ # define LVDS_CHANNEL_DUP_RESERVED (1 << 16) /* * Enable border for unscaled (or aspect-scaled) display */ # define LVDS_BORDER_ENABLE (1 << 15) /* * Tri-state the LVDS buffers when powered down, otherwise * they are set to 0V */ # define LVDS_POWER_DOWN_TRI_STATE (1 << 10) /** * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per * pixel. */ # define LVDS_A0A2_CLKA_POWER_MASK (3 << 8) # define LVDS_A0A2_CLKA_POWER_DOWN (0 << 8) # define LVDS_A0A2_CLKA_POWER_UP (3 << 8) /** * Controls the A3 data pair, which contains the additional LSBs for 24 bit * mode. Only enabled if LVDS_A0A2_CLKA_POWER_UP also indicates it should be * on. */ # define LVDS_A3_POWER_MASK (3 << 6) # define LVDS_A3_POWER_DOWN (0 << 6) # define LVDS_A3_POWER_UP (3 << 6) /** * Controls the CLKB pair. This should only be set when LVDS_B0B3_POWER_UP * is set. */ # define LVDS_CLKB_POWER_MASK (3 << 4) # define LVDS_CLKB_POWER_DOWN (0 << 4) # define LVDS_CLKB_POWER_UP (3 << 4) /** * Controls the B0-B3 data pairs. This must be set to match the DPLL p2 * setting for whether we are in dual-channel mode. The B3 pair will * additionally only be powered up when LVDS_A3_POWER_UP is set. */ # define LVDS_B0B3_POWER_MASK (3 << 2) # define LVDS_B0B3_POWER_DOWN (0 << 2) # define LVDS_B0B3_POWER_UP (3 << 2) /** @} */ #define DP_B 0x64100 #define DPB_AUX_CH_CTL 0x64110 #define DPB_AUX_CH_DATA1 0x64114 #define DPB_AUX_CH_DATA2 0x64118 #define DPB_AUX_CH_DATA3 0x6411c #define DPB_AUX_CH_DATA4 0x64120 #define DPB_AUX_CH_DATA5 0x64124 #define DP_C 0x64200 #define DPC_AUX_CH_CTL 0x64210 #define DPC_AUX_CH_DATA1 0x64214 #define DPC_AUX_CH_DATA2 0x64218 #define DPC_AUX_CH_DATA3 0x6421c #define DPC_AUX_CH_DATA4 0x64220 #define DPC_AUX_CH_DATA5 0x64224 #define DP_D 0x64300 #define DPD_AUX_CH_CTL 0x64310 #define DPD_AUX_CH_DATA1 0x64314 #define DPD_AUX_CH_DATA2 0x64318 #define DPD_AUX_CH_DATA3 0x6431c #define DPD_AUX_CH_DATA4 0x64320 #define DPD_AUX_CH_DATA5 0x64324 /* * Two channel clock control. Turn this on if you need clkb for two channel mode * Overridden by global LVDS power sequencing */ /* clkb off */ # define LVDS_CLKB_POWER_DOWN (0 << 4) /* powered up, but clkb forced to 0 */ # define LVDS_CLKB_POWER_PARTIAL (1 << 4) /* clock B running */ # define LVDS_CLKB_POWER_UP (3 << 4) /* * Two channel mode B0-B2 control. Sets state when power is on. * Set to POWER_DOWN in single channel mode, other settings enable * two channel mode. The CLKB power control controls whether that clock * is enabled during two channel mode. * */ /* Everything is off, including B3 and CLKB */ # define LVDS_B_POWER_DOWN (0 << 2) /* B0, B1, B2 and data lines forced to 0. timing is active */ # define LVDS_B_POWER_PARTIAL (1 << 2) /* data lines active (both timing and colour) */ # define LVDS_B_POWER_UP (3 << 2) /** @defgroup TV_CTL * @{ */ #define TV_CTL 0x68000 /** Enables the TV encoder */ # define TV_ENC_ENABLE (1 << 31) /** Sources the TV encoder input from pipe B instead of A. */ # define TV_ENC_PIPEB_SELECT (1 << 30) /** Outputs composite video (DAC A only) */ # define TV_ENC_OUTPUT_COMPOSITE (0 << 28) /** Outputs SVideo video (DAC B/C) */ # define TV_ENC_OUTPUT_SVIDEO (1 << 28) /** Outputs Component video (DAC A/B/C) */ # define TV_ENC_OUTPUT_COMPONENT (2 << 28) /** Outputs Composite and SVideo (DAC A/B/C) */ # define TV_ENC_OUTPUT_SVIDEO_COMPOSITE (3 << 28) # define TV_TRILEVEL_SYNC (1 << 21) /** Enables slow sync generation (945GM only) */ # define TV_SLOW_SYNC (1 << 20) /** Selects 4x oversampling for 480i and 576p */ # define TV_OVERSAMPLE_4X (0 << 18) /** Selects 2x oversampling for 720p and 1080i */ # define TV_OVERSAMPLE_2X (1 << 18) /** Selects no oversampling for 1080p */ # define TV_OVERSAMPLE_NONE (2 << 18) /** Selects 8x oversampling */ # define TV_OVERSAMPLE_8X (3 << 18) /** Selects progressive mode rather than interlaced */ # define TV_PROGRESSIVE (1 << 17) /** Sets the colorburst to PAL mode. Required for non-M PAL modes. */ # define TV_PAL_BURST (1 << 16) /** Field for setting delay of Y compared to C */ # define TV_YC_SKEW_MASK (7 << 12) /** Enables a fix for 480p/576p standard definition modes on the 915GM only */ # define TV_ENC_SDP_FIX (1 << 11) /** * Enables a fix for the 915GM only. * * Not sure what it does. */ # define TV_ENC_C0_FIX (1 << 10) /** Bits that must be preserved by software */ # define TV_CTL_SAVE ((1 << 11) | (3 << 9) | (7 << 6) | 0xf) # define TV_FUSE_STATE_MASK (3 << 4) /** Read-only state that reports all features enabled */ # define TV_FUSE_STATE_ENABLED (0 << 4) /** Read-only state that reports that Macrovision is disabled in hardware*/ # define TV_FUSE_STATE_NO_MACROVISION (1 << 4) /** Read-only state that reports that TV-out is disabled in hardware. */ # define TV_FUSE_STATE_DISABLED (2 << 4) /** Normal operation */ # define TV_TEST_MODE_NORMAL (0 << 0) /** Encoder test pattern 1 - combo pattern */ # define TV_TEST_MODE_PATTERN_1 (1 << 0) /** Encoder test pattern 2 - full screen vertical 75% color bars */ # define TV_TEST_MODE_PATTERN_2 (2 << 0) /** Encoder test pattern 3 - full screen horizontal 75% color bars */ # define TV_TEST_MODE_PATTERN_3 (3 << 0) /** Encoder test pattern 4 - random noise */ # define TV_TEST_MODE_PATTERN_4 (4 << 0) /** Encoder test pattern 5 - linear color ramps */ # define TV_TEST_MODE_PATTERN_5 (5 << 0) /** * This test mode forces the DACs to 50% of full output. * * This is used for load detection in combination with TVDAC_SENSE_MASK */ # define TV_TEST_MODE_MONITOR_DETECT (7 << 0) # define TV_TEST_MODE_MASK (7 << 0) /** @} */ /** @defgroup TV_DAC * @{ */ #define TV_DAC 0x68004 /** * Reports that DAC state change logic has reported change (RO). * * This gets cleared when TV_DAC_STATE_EN is cleared */ # define TVDAC_STATE_CHG (1 << 31) # define TVDAC_SENSE_MASK (7 << 28) /** Reports that DAC A voltage is above the detect threshold */ # define TVDAC_A_SENSE (1 << 30) /** Reports that DAC B voltage is above the detect threshold */ # define TVDAC_B_SENSE (1 << 29) /** Reports that DAC C voltage is above the detect threshold */ # define TVDAC_C_SENSE (1 << 28) /** * Enables DAC state detection logic, for load-based TV detection. * * The PLL of the chosen pipe (in TV_CTL) must be running, and the encoder set * to off, for load detection to work. */ # define TVDAC_STATE_CHG_EN (1 << 27) /** Sets the DAC A sense value to high */ # define TVDAC_A_SENSE_CTL (1 << 26) /** Sets the DAC B sense value to high */ # define TVDAC_B_SENSE_CTL (1 << 25) /** Sets the DAC C sense value to high */ # define TVDAC_C_SENSE_CTL (1 << 24) /** Overrides the ENC_ENABLE and DAC voltage levels */ # define DAC_CTL_OVERRIDE (1 << 7) /** Sets the slew rate. Must be preserved in software */ # define ENC_TVDAC_SLEW_FAST (1 << 6) # define DAC_A_1_3_V (0 << 4) # define DAC_A_1_1_V (1 << 4) # define DAC_A_0_7_V (2 << 4) # define DAC_A_MASK (3 << 4) # define DAC_B_1_3_V (0 << 2) # define DAC_B_1_1_V (1 << 2) # define DAC_B_0_7_V (2 << 2) # define DAC_B_MASK (3 << 2) # define DAC_C_1_3_V (0 << 0) # define DAC_C_1_1_V (1 << 0) # define DAC_C_0_7_V (2 << 0) # define DAC_C_MASK (3 << 0) /** @} */ /** * CSC coefficients are stored in a floating point format with 9 bits of * mantissa and 2 or 3 bits of exponent. The exponent is represented as 2**-n, * where 2-bit exponents are unsigned n, and 3-bit exponents are signed n with * -1 (0x3) being the only legal negative value. */ #define TV_CSC_Y 0x68010 # define TV_RY_MASK 0x07ff0000 # define TV_RY_SHIFT 16 # define TV_GY_MASK 0x00000fff # define TV_GY_SHIFT 0 #define TV_CSC_Y2 0x68014 # define TV_BY_MASK 0x07ff0000 # define TV_BY_SHIFT 16 /** * Y attenuation for component video. * * Stored in 1.9 fixed point. */ # define TV_AY_MASK 0x000003ff # define TV_AY_SHIFT 0 #define TV_CSC_U 0x68018 # define TV_RU_MASK 0x07ff0000 # define TV_RU_SHIFT 16 # define TV_GU_MASK 0x000007ff # define TV_GU_SHIFT 0 #define TV_CSC_U2 0x6801c # define TV_BU_MASK 0x07ff0000 # define TV_BU_SHIFT 16 /** * U attenuation for component video. * * Stored in 1.9 fixed point. */ # define TV_AU_MASK 0x000003ff # define TV_AU_SHIFT 0 #define TV_CSC_V 0x68020 # define TV_RV_MASK 0x0fff0000 # define TV_RV_SHIFT 16 # define TV_GV_MASK 0x000007ff # define TV_GV_SHIFT 0 #define TV_CSC_V2 0x68024 # define TV_BV_MASK 0x07ff0000 # define TV_BV_SHIFT 16 /** * V attenuation for component video. * * Stored in 1.9 fixed point. */ # define TV_AV_MASK 0x000007ff # define TV_AV_SHIFT 0 /** @defgroup TV_CSC_KNOBS * @{ */ #define TV_CLR_KNOBS 0x68028 /** 2s-complement brightness adjustment */ # define TV_BRIGHTNESS_MASK 0xff000000 # define TV_BRIGHTNESS_SHIFT 24 /** Contrast adjustment, as a 2.6 unsigned floating point number */ # define TV_CONTRAST_MASK 0x00ff0000 # define TV_CONTRAST_SHIFT 16 /** Saturation adjustment, as a 2.6 unsigned floating point number */ # define TV_SATURATION_MASK 0x0000ff00 # define TV_SATURATION_SHIFT 8 /** Hue adjustment, as an integer phase angle in degrees */ # define TV_HUE_MASK 0x000000ff # define TV_HUE_SHIFT 0 /** @} */ /** @defgroup TV_CLR_LEVEL * @{ */ #define TV_CLR_LEVEL 0x6802c /** Controls the DAC level for black */ # define TV_BLACK_LEVEL_MASK 0x01ff0000 # define TV_BLACK_LEVEL_SHIFT 16 /** Controls the DAC level for blanking */ # define TV_BLANK_LEVEL_MASK 0x000001ff # define TV_BLANK_LEVEL_SHIFT 0 /* @} */ /** @defgroup TV_H_CTL_1 * @{ */ #define TV_H_CTL_1 0x68030 /** Number of pixels in the hsync. */ # define TV_HSYNC_END_MASK 0x1fff0000 # define TV_HSYNC_END_SHIFT 16 /** Total number of pixels minus one in the line (display and blanking). */ # define TV_HTOTAL_MASK 0x00001fff # define TV_HTOTAL_SHIFT 0 /** @} */ /** @defgroup TV_H_CTL_2 * @{ */ #define TV_H_CTL_2 0x68034 /** Enables the colorburst (needed for non-component color) */ # define TV_BURST_ENA (1 << 31) /** Offset of the colorburst from the start of hsync, in pixels minus one. */ # define TV_HBURST_START_SHIFT 16 # define TV_HBURST_START_MASK 0x1fff0000 /** Length of the colorburst */ # define TV_HBURST_LEN_SHIFT 0 # define TV_HBURST_LEN_MASK 0x0001fff /** @} */ /** @defgroup TV_H_CTL_3 * @{ */ #define TV_H_CTL_3 0x68038 /** End of hblank, measured in pixels minus one from start of hsync */ # define TV_HBLANK_END_SHIFT 16 # define TV_HBLANK_END_MASK 0x1fff0000 /** Start of hblank, measured in pixels minus one from start of hsync */ # define TV_HBLANK_START_SHIFT 0 # define TV_HBLANK_START_MASK 0x0001fff /** @} */ /** @defgroup TV_V_CTL_1 * @{ */ #define TV_V_CTL_1 0x6803c /** XXX */ # define TV_NBR_END_SHIFT 16 # define TV_NBR_END_MASK 0x07ff0000 /** XXX */ # define TV_VI_END_F1_SHIFT 8 # define TV_VI_END_F1_MASK 0x00003f00 /** XXX */ # define TV_VI_END_F2_SHIFT 0 # define TV_VI_END_F2_MASK 0x0000003f /** @} */ /** @defgroup TV_V_CTL_2 * @{ */ #define TV_V_CTL_2 0x68040 /** Length of vsync, in half lines */ # define TV_VSYNC_LEN_MASK 0x07ff0000 # define TV_VSYNC_LEN_SHIFT 16 /** Offset of the start of vsync in field 1, measured in one less than the * number of half lines. */ # define TV_VSYNC_START_F1_MASK 0x00007f00 # define TV_VSYNC_START_F1_SHIFT 8 /** * Offset of the start of vsync in field 2, measured in one less than the * number of half lines. */ # define TV_VSYNC_START_F2_MASK 0x0000007f # define TV_VSYNC_START_F2_SHIFT 0 /** @} */ /** @defgroup TV_V_CTL_3 * @{ */ #define TV_V_CTL_3 0x68044 /** Enables generation of the equalization signal */ # define TV_EQUAL_ENA (1 << 31) /** Length of vsync, in half lines */ # define TV_VEQ_LEN_MASK 0x007f0000 # define TV_VEQ_LEN_SHIFT 16 /** Offset of the start of equalization in field 1, measured in one less than * the number of half lines. */ # define TV_VEQ_START_F1_MASK 0x0007f00 # define TV_VEQ_START_F1_SHIFT 8 /** * Offset of the start of equalization in field 2, measured in one less than * the number of half lines. */ # define TV_VEQ_START_F2_MASK 0x000007f # define TV_VEQ_START_F2_SHIFT 0 /** @} */ /** @defgroup TV_V_CTL_4 * @{ */ #define TV_V_CTL_4 0x68048 /** * Offset to start of vertical colorburst, measured in one less than the * number of lines from vertical start. */ # define TV_VBURST_START_F1_MASK 0x003f0000 # define TV_VBURST_START_F1_SHIFT 16 /** * Offset to the end of vertical colorburst, measured in one less than the * number of lines from the start of NBR. */ # define TV_VBURST_END_F1_MASK 0x000000ff # define TV_VBURST_END_F1_SHIFT 0 /** @} */ /** @defgroup TV_V_CTL_5 * @{ */ #define TV_V_CTL_5 0x6804c /** * Offset to start of vertical colorburst, measured in one less than the * number of lines from vertical start. */ # define TV_VBURST_START_F2_MASK 0x003f0000 # define TV_VBURST_START_F2_SHIFT 16 /** * Offset to the end of vertical colorburst, measured in one less than the * number of lines from the start of NBR. */ # define TV_VBURST_END_F2_MASK 0x000000ff # define TV_VBURST_END_F2_SHIFT 0 /** @} */ /** @defgroup TV_V_CTL_6 * @{ */ #define TV_V_CTL_6 0x68050 /** * Offset to start of vertical colorburst, measured in one less than the * number of lines from vertical start. */ # define TV_VBURST_START_F3_MASK 0x003f0000 # define TV_VBURST_START_F3_SHIFT 16 /** * Offset to the end of vertical colorburst, measured in one less than the * number of lines from the start of NBR. */ # define TV_VBURST_END_F3_MASK 0x000000ff # define TV_VBURST_END_F3_SHIFT 0 /** @} */ /** @defgroup TV_V_CTL_7 * @{ */ #define TV_V_CTL_7 0x68054 /** * Offset to start of vertical colorburst, measured in one less than the * number of lines from vertical start. */ # define TV_VBURST_START_F4_MASK 0x003f0000 # define TV_VBURST_START_F4_SHIFT 16 /** * Offset to the end of vertical colorburst, measured in one less than the * number of lines from the start of NBR. */ # define TV_VBURST_END_F4_MASK 0x000000ff # define TV_VBURST_END_F4_SHIFT 0 /** @} */ /** @defgroup TV_SC_CTL_1 * @{ */ #define TV_SC_CTL_1 0x68060 /** Turns on the first subcarrier phase generation DDA */ # define TV_SC_DDA1_EN (1 << 31) /** Turns on the first subcarrier phase generation DDA */ # define TV_SC_DDA2_EN (1 << 30) /** Turns on the first subcarrier phase generation DDA */ # define TV_SC_DDA3_EN (1 << 29) /** Sets the subcarrier DDA to reset frequency every other field */ # define TV_SC_RESET_EVERY_2 (0 << 24) /** Sets the subcarrier DDA to reset frequency every fourth field */ # define TV_SC_RESET_EVERY_4 (1 << 24) /** Sets the subcarrier DDA to reset frequency every eighth field */ # define TV_SC_RESET_EVERY_8 (2 << 24) /** Sets the subcarrier DDA to never reset the frequency */ # define TV_SC_RESET_NEVER (3 << 24) /** Sets the peak amplitude of the colorburst.*/ # define TV_BURST_LEVEL_MASK 0x00ff0000 # define TV_BURST_LEVEL_SHIFT 16 /** Sets the increment of the first subcarrier phase generation DDA */ # define TV_SCDDA1_INC_MASK 0x00000fff # define TV_SCDDA1_INC_SHIFT 0 /** @} */ /** @defgroup TV_SC_CTL_2 * @{ */ #define TV_SC_CTL_2 0x68064 /** Sets the rollover for the second subcarrier phase generation DDA */ # define TV_SCDDA2_SIZE_MASK 0x7fff0000 # define TV_SCDDA2_SIZE_SHIFT 16 /** Sets the increent of the second subcarrier phase generation DDA */ # define TV_SCDDA2_INC_MASK 0x00007fff # define TV_SCDDA2_INC_SHIFT 0 /** @} */ /** @defgroup TV_SC_CTL_3 * @{ */ #define TV_SC_CTL_3 0x68068 /** Sets the rollover for the third subcarrier phase generation DDA */ # define TV_SCDDA3_SIZE_MASK 0x7fff0000 # define TV_SCDDA3_SIZE_SHIFT 16 /** Sets the increent of the third subcarrier phase generation DDA */ # define TV_SCDDA3_INC_MASK 0x00007fff # define TV_SCDDA3_INC_SHIFT 0 /** @} */ /** @defgroup TV_WIN_POS * @{ */ #define TV_WIN_POS 0x68070 /** X coordinate of the display from the start of horizontal active */ # define TV_XPOS_MASK 0x1fff0000 # define TV_XPOS_SHIFT 16 /** Y coordinate of the display from the start of vertical active (NBR) */ # define TV_YPOS_MASK 0x00000fff # define TV_YPOS_SHIFT 0 /** @} */ /** @defgroup TV_WIN_SIZE * @{ */ #define TV_WIN_SIZE 0x68074 /** Horizontal size of the display window, measured in pixels*/ # define TV_XSIZE_MASK 0x1fff0000 # define TV_XSIZE_SHIFT 16 /** * Vertical size of the display window, measured in pixels. * * Must be even for interlaced modes. */ # define TV_YSIZE_MASK 0x00000fff # define TV_YSIZE_SHIFT 0 /** @} */ /** @defgroup TV_FILTER_CTL_1 * @{ */ #define TV_FILTER_CTL_1 0x68080 /** * Enables automatic scaling calculation. * * If set, the rest of the registers are ignored, and the calculated values can * be read back from the register. */ # define TV_AUTO_SCALE (1 << 31) /** * Disables the vertical filter. * * This is required on modes more than 1024 pixels wide */ # define TV_V_FILTER_BYPASS (1 << 29) /** Enables adaptive vertical filtering */ # define TV_VADAPT (1 << 28) # define TV_VADAPT_MODE_MASK (3 << 26) /** Selects the least adaptive vertical filtering mode */ # define TV_VADAPT_MODE_LEAST (0 << 26) /** Selects the moderately adaptive vertical filtering mode */ # define TV_VADAPT_MODE_MODERATE (1 << 26) /** Selects the most adaptive vertical filtering mode */ # define TV_VADAPT_MODE_MOST (3 << 26) /** * Sets the horizontal scaling factor. * * This should be the fractional part of the horizontal scaling factor divided * by the oversampling rate. TV_HSCALE should be less than 1, and set to: * * (src width - 1) / ((oversample * dest width) - 1) */ # define TV_HSCALE_FRAC_MASK 0x00003fff # define TV_HSCALE_FRAC_SHIFT 0 /** @} */ /** @defgroup TV_FILTER_CTL_2 * @{ */ #define TV_FILTER_CTL_2 0x68084 /** * Sets the integer part of the 3.15 fixed-point vertical scaling factor. * * TV_VSCALE should be (src height - 1) / ((interlace * dest height) - 1) */ # define TV_VSCALE_INT_MASK 0x00038000 # define TV_VSCALE_INT_SHIFT 15 /** * Sets the fractional part of the 3.15 fixed-point vertical scaling factor. * * \sa TV_VSCALE_INT_MASK */ # define TV_VSCALE_FRAC_MASK 0x00007fff # define TV_VSCALE_FRAC_SHIFT 0 /** @} */ /** @defgroup TV_FILTER_CTL_3 * @{ */ #define TV_FILTER_CTL_3 0x68088 /** * Sets the integer part of the 3.15 fixed-point vertical scaling factor. * * TV_VSCALE should be (src height - 1) / (1/4 * (dest height - 1)) * * For progressive modes, TV_VSCALE_IP_INT should be set to zeroes. */ # define TV_VSCALE_IP_INT_MASK 0x00038000 # define TV_VSCALE_IP_INT_SHIFT 15 /** * Sets the fractional part of the 3.15 fixed-point vertical scaling factor. * * For progressive modes, TV_VSCALE_IP_INT should be set to zeroes. * * \sa TV_VSCALE_IP_INT_MASK */ # define TV_VSCALE_IP_FRAC_MASK 0x00007fff # define TV_VSCALE_IP_FRAC_SHIFT 0 /** @} */ /** @defgroup TV_CC_CONTROL * @{ */ #define TV_CC_CONTROL 0x68090 # define TV_CC_ENABLE (1 << 31) /** * Specifies which field to send the CC data in. * * CC data is usually sent in field 0. */ # define TV_CC_FID_MASK (1 << 27) # define TV_CC_FID_SHIFT 27 /** Sets the horizontal position of the CC data. Usually 135. */ # define TV_CC_HOFF_MASK 0x03ff0000 # define TV_CC_HOFF_SHIFT 16 /** Sets the vertical position of the CC data. Usually 21 */ # define TV_CC_LINE_MASK 0x0000003f # define TV_CC_LINE_SHIFT 0 /** @} */ /** @defgroup TV_CC_DATA * @{ */ #define TV_CC_DATA 0x68094 # define TV_CC_RDY (1 << 31) /** Second word of CC data to be transmitted. */ # define TV_CC_DATA_2_MASK 0x007f0000 # define TV_CC_DATA_2_SHIFT 16 /** First word of CC data to be transmitted. */ # define TV_CC_DATA_1_MASK 0x0000007f # define TV_CC_DATA_1_SHIFT 0 /** @} */ /** @{ */ #define TV_H_LUMA_0 0x68100 #define TV_H_LUMA_59 0x681ec #define TV_H_CHROMA_0 0x68200 #define TV_H_CHROMA_59 0x682ec #define TV_V_LUMA_0 0x68300 #define TV_V_LUMA_42 0x683a8 #define TV_V_CHROMA_0 0x68400 #define TV_V_CHROMA_42 0x684a8 /** @} */ #define PIPEA_DSL 0x70000 #define PIPEACONF 0x70008 #define PIPEACONF_ENABLE (1<<31) #define PIPEACONF_DISABLE 0 #define PIPEACONF_DOUBLE_WIDE (1<<30) #define I965_PIPECONF_ACTIVE (1<<30) #define PIPEACONF_SINGLE_WIDE 0 #define PIPEACONF_PIPE_UNLOCKED 0 #define PIPEACONF_PIPE_LOCKED (1<<25) #define PIPEACONF_PALETTE 0 #define PIPEACONF_GAMMA (1<<24) /* Ironlake: gamma */ #define PIPECONF_PALETTE_8BIT (0<<24) #define PIPECONF_PALETTE_10BIT (1<<24) #define PIPECONF_PALETTE_12BIT (2<<24) #define PIPECONF_FORCE_BORDER (1<<25) #define PIPECONF_PROGRESSIVE (0 << 21) #define PIPECONF_INTERLACE_W_FIELD_INDICATION (6 << 21) #define PIPECONF_INTERLACE_FIELD_0_ONLY (7 << 21) /* Ironlake */ #define PIPECONF_MSA_TIMING_DELAY (0<<18) /* for eDP */ #define PIPECONF_NO_DYNAMIC_RATE_CHANGE (0 << 16) #define PIPECONF_NO_ROTATION (0<<14) #define PIPECONF_FULL_COLOR_RANGE (0<<13) #define PIPECONF_CE_COLOR_RANGE (1<<13) #define PIPECONF_COLOR_SPACE_RGB (0<<11) #define PIPECONF_COLOR_SPACE_YUV601 (1<<11) #define PIPECONF_COLOR_SPACE_YUV709 (2<<11) #define PIPECONF_CONNECT_DEFAULT (0<<9) #define PIPECONF_8BPP (0<<5) #define PIPECONF_10BPP (1<<5) #define PIPECONF_6BPP (2<<5) #define PIPECONF_12BPP (3<<5) #define PIPECONF_ENABLE_DITHER (1<<4) #define PIPECONF_DITHER_SPATIAL (0<<2) #define PIPECONF_DITHER_ST1 (1<<2) #define PIPECONF_DITHER_ST2 (2<<2) #define PIPECONF_DITHER_TEMPORAL (3<<2) #define PIPEAGCMAXRED 0x70010 #define PIPEAGCMAXGREEN 0x70014 #define PIPEAGCMAXBLUE 0x70018 #define PIPEASTAT 0x70024 # define FIFO_UNDERRUN (1 << 31) # define CRC_ERROR_ENABLE (1 << 29) # define CRC_DONE_ENABLE (1 << 28) # define GMBUS_EVENT_ENABLE (1 << 27) # define VSYNC_INT_ENABLE (1 << 25) # define DLINE_COMPARE_ENABLE (1 << 24) # define DPST_EVENT_ENABLE (1 << 23) # define LBLC_EVENT_ENABLE (1 << 22) # define OFIELD_INT_ENABLE (1 << 21) # define EFIELD_INT_ENABLE (1 << 20) # define SVBLANK_INT_ENABLE (1 << 18) # define VBLANK_INT_ENABLE (1 << 17) # define OREG_UPDATE_ENABLE (1 << 16) # define CRC_ERROR_INT_STATUS (1 << 13) # define CRC_DONE_INT_STATUS (1 << 12) # define GMBUS_INT_STATUS (1 << 11) # define VSYNC_INT_STATUS (1 << 9) # define DLINE_COMPARE_STATUS (1 << 8) # define DPST_EVENT_STATUS (1 << 7) # define LBLC_EVENT_STATUS (1 << 6) # define OFIELD_INT_STATUS (1 << 5) # define EFIELD_INT_STATUS (1 << 4) # define SVBLANK_INT_STATUS (1 << 2) # define VBLANK_INT_STATUS (1 << 1) # define OREG_UPDATE_STATUS (1 << 0) #define DSPARB 0x70030 #define DSPARB_CSTART_SHIFT 7 #define DSPARB_BSTART_SHIFT 0 #define DSPARB_BEND_SHIFT 9 /* on 855 */ #define DSPARB_AEND_SHIFT 0 #define DSPFW1 0x70034 #define DSPFW2 0x70038 #define DSPFW3 0x7003c /* * The two pipe frame counter registers are not synchronized, so * reading a stable value is somewhat tricky. The following code * should work: * * do { * high1 = ((INREG(PIPEAFRAMEHIGH) & PIPE_FRAME_HIGH_MASK) >> PIPE_FRAME_HIGH_SHIFT; * low1 = ((INREG(PIPEAFRAMEPIXEL) & PIPE_FRAME_LOW_MASK) >> PIPE_FRAME_LOW_SHIFT); * high2 = ((INREG(PIPEAFRAMEHIGH) & PIPE_FRAME_HIGH_MASK) >> PIPE_FRAME_HIGH_SHIFT); * } while (high1 != high2); * frame = (high1 << 8) | low1; */ #define PIPEAFRAMEHIGH 0x70040 #define PIPE_FRAME_HIGH_MASK 0x0000ffff #define PIPE_FRAME_HIGH_SHIFT 0 #define PIPEAFRAMEPIXEL 0x70044 #define PIPE_FRAME_LOW_MASK 0xff000000 #define PIPE_FRAME_LOW_SHIFT 24 /* * Pixel within the current frame is counted in the PIPEAFRAMEPIXEL register * and is 24 bits wide. */ #define PIPE_PIXEL_MASK 0x00ffffff #define PIPE_PIXEL_SHIFT 0 /* * Computing GMCH M and N values. * * GMCH M/N = dot clock * bytes per pixel / ls_clk * # of lanes * * ls_clk (we assume) is the DP link clock (1.62 or 2.7 GHz) * * The GMCH value is used internally */ #define PIPEA_GMCH_DATA_M 0x70050 /* Transfer unit size for display port - 1, default is 0x3f (for TU size 64) */ #define PIPE_GMCH_DATA_M_TU_SIZE_MASK (0x3f << 25) #define PIPE_GMCH_DATA_M_TU_SIZE_SHIFT 25 #define PIPE_GMCH_DATA_M_MASK (0xffffff) #define PIPEA_GMCH_DATA_N 0x70054 #define PIPE_GMCH_DATA_N_MASK (0xffffff) /* * Computing Link M and N values. * * Link M / N = pixel_clock / ls_clk * * (the DP spec calls pixel_clock the 'strm_clk') * * The Link value is transmitted in the Main Stream * Attributes and VB-ID. */ #define PIPEA_DP_LINK_M 0x70060 #define PIPEA_DP_LINK_M_MASK (0xffffff) #define PIPEA_DP_LINK_N 0x70064 #define PIPEA_DP_LINK_N_MASK (0xffffff) #define PIPEB_DSL 0x71000 #define PIPEBCONF 0x71008 #define PIPEBCONF_ENABLE (1<<31) #define PIPEBCONF_DISABLE 0 #define PIPEBCONF_DOUBLE_WIDE (1<<30) #define PIPEBCONF_DISABLE 0 #define PIPEBCONF_GAMMA (1<<24) #define PIPEBCONF_PALETTE 0 #define PIPEBGCMAXRED 0x71010 #define PIPEBGCMAXGREEN 0x71014 #define PIPEBGCMAXBLUE 0x71018 #define PIPEBSTAT 0x71024 #define PIPEBFRAMEHIGH 0x71040 #define PIPEBFRAMEPIXEL 0x71044 #define PIPEB_GMCH_DATA_M 0x71050 #define PIPEB_GMCH_DATA_N 0x71054 #define PIPEB_DP_LINK_M 0x71060 #define PIPEB_DP_LINK_N 0x71064 #define DSPACNTR 0x70180 #define DSPBCNTR 0x71180 #define DISPLAY_PLANE_ENABLE (1<<31) #define DISPLAY_PLANE_DISABLE 0 #define DISPLAY_PLANE_TILED (1<<10) #define DISPPLANE_GAMMA_ENABLE (1<<30) #define DISPPLANE_GAMMA_DISABLE 0 #define DISPPLANE_PIXFORMAT_MASK (0xf<<26) #define DISPPLANE_8BPP (0x2<<26) #define DISPPLANE_15_16BPP (0x4<<26) #define DISPPLANE_16BPP (0x5<<26) #define DISPPLANE_32BPP_NO_ALPHA (0x6<<26) /* Ironlake: BGRX */ #define DISPPLANE_32BPP (0x7<<26) /* Ironlake: not support */ /* Ironlake */ #define DISPPLANE_32BPP_10 (0x8<<26) /* 2:10:10:10 */ #define DISPPLANE_32BPP_BGRX (0xa<<26) #define DISPPLANE_64BPP (0xc<<26) #define DISPPLANE_32BPP_RGBX (0xe<<26) #define DISPPLANE_STEREO_ENABLE (1<<25) #define DISPPLANE_STEREO_DISABLE 0 #define DISPPLANE_SEL_PIPE_MASK (1<<24) #define DISPPLANE_SEL_PIPE_A 0 /* Ironlake: don't use */ #define DISPPLANE_SEL_PIPE_B (1<<24) #define DISPPLANE_NORMAL_RANGE (0<<25) #define DISPPLANE_EXT_RANGE (1<<25) /* Ironlake */ #define DISPPLANE_CSC_BYPASS (0<<24) #define DISPPLANE_CSC_PASSTHROUGH (1<<24) #define DISPPLANE_SRC_KEY_ENABLE (1<<22) #define DISPPLANE_SRC_KEY_DISABLE 0 #define DISPPLANE_LINE_DOUBLE (1<<20) #define DISPPLANE_NO_LINE_DOUBLE 0 #define DISPPLANE_STEREO_POLARITY_FIRST 0 #define DISPPLANE_STEREO_POLARITY_SECOND (1<<18) /* plane B only */ #define DISPPLANE_ALPHA_TRANS_ENABLE (1<<15) #define DISPPLANE_ALPHA_TRANS_DISABLE 0 #define DISPPLANE_SPRITE_ABOVE_DISPLAYA 0 #define DISPPLANE_SPRITE_ABOVE_OVERLAY (1) /* Ironlake */ #define DISPPLANE_X_TILE (1<<10) #define DISPPLANE_LINEAR (0<<10) #define DSPABASE 0x70184 /* Ironlake */ #define DSPALINOFF 0x70184 #define DSPASTRIDE 0x70188 #define DSPBBASE 0x71184 /* Ironlake */ #define DSPBLINOFF 0x71184 #define DSPBADDR DSPBBASE #define DSPBSTRIDE 0x71188 #define DSPAKEYVAL 0x70194 #define DSPAKEYMASK 0x70198 #define DSPAPOS 0x7018C /* reserved */ #define DSPASIZE 0x70190 #define DSPBPOS 0x7118C #define DSPBSIZE 0x71190 #define DSPASURF 0x7019C #define DSPATILEOFF 0x701A4 #define DSPBSURF 0x7119C #define DSPBTILEOFF 0x711A4 #define VGACNTRL 0x71400 # define VGA_DISP_DISABLE (1 << 31) # define VGA_2X_MODE (1 << 30) # define VGA_PIPE_B_SELECT (1 << 29) /* Various masks for reserved bits, etc. */ #define I830_FWATER1_MASK (~((1<<11)|(1<<10)|(1<<9)| \ (1<<8)|(1<<26)|(1<<25)|(1<<24)|(1<<5)|(1<<4)|(1<<3)| \ (1<<2)|(1<<1)|1|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16))) #define I830_FWATER2_MASK ~(0) #define DV0A_RESERVED ((1<<26)|(1<<25)|(1<<24)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<16)|(1<<5)|(1<<1)|1) #define DV0B_RESERVED ((1<<27)|(1<<26)|(1<<25)|(1<<24)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<16)|(1<<5)|(1<<1)|1) #define VGA0_N_DIVISOR_MASK ((1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)) #define VGA0_M1_DIVISOR_MASK ((1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8)) #define VGA0_M2_DIVISOR_MASK ((1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1) #define VGA0_M1M2N_RESERVED ~(VGA0_N_DIVISOR_MASK|VGA0_M1_DIVISOR_MASK|VGA0_M2_DIVISOR_MASK) #define VGA0_POSTDIV_MASK ((1<<7)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1) #define VGA1_POSTDIV_MASK ((1<<15)|(1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8)) #define VGA_POSTDIV_RESERVED ~(VGA0_POSTDIV_MASK|VGA1_POSTDIV_MASK|(1<<7)|(1<<15)) #define DPLLA_POSTDIV_MASK ((1<<23)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)) #define DPLLA_RESERVED ((1<<27)|(1<<26)|(1<<25)|(1<<24)|(1<<22)|(1<<15)|(1<<12)|(1<<11)|(1<<10)|(1<<9)|(1<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1) #define ADPA_RESERVED ((1<<2)|(1<<1)|1|(1<<9)|(1<<8)|(1<<7)|(1<<6)|(1<<5)|(1<<30)|(1<<29)|(1<<28)|(1<<27)|(1<<26)|(1<<25)|(1<<24)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)) #define SUPER_WORD 32 #define BURST_A_MASK ((1<<11)|(1<<10)|(1<<9)|(1<<8)) #define BURST_B_MASK ((1<<26)|(1<<25)|(1<<24)) #define WATER_A_MASK ((1<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|1) #define WATER_B_MASK ((1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)) #define WATER_RESERVED ((1<<31)|(1<<30)|(1<<29)|(1<<28)|(1<<27)|(1<<23)|(1<<22)|(1<<21)|(1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<7)|(1<<6)) #define PIPEACONF_RESERVED ((1<<29)|(1<<28)|(1<<27)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)|0xffff) #define PIPEBCONF_RESERVED ((1<<30)|(1<<29)|(1<<28)|(1<<27)|(1<<26)|(1<<25)|(1<<23)|(1<<22)|(1<<21)|(1<<20)|(1<<19)|(1<<18)|(1<<17)|(1<<16)|0xffff) #define DSPACNTR_RESERVED ((1<<23)|(1<<19)|(1<<17)|(1<<16)|0xffff) #define DSPBCNTR_RESERVED ((1<<23)|(1<<19)|(1<<17)|(1<<16)|0x7ffe) #define I830_GMCH_CTRL 0x52 #define I830_GMCH_ENABLED 0x4 #define I830_GMCH_MEM_MASK 0x1 #define I830_GMCH_MEM_64M 0x1 #define I830_GMCH_MEM_128M 0 #define I830_GMCH_GMS_MASK 0x70 #define I830_GMCH_GMS_DISABLED 0x00 #define I830_GMCH_GMS_LOCAL 0x10 #define I830_GMCH_GMS_STOLEN_512 0x20 #define I830_GMCH_GMS_STOLEN_1024 0x30 #define I830_GMCH_GMS_STOLEN_8192 0x40 #define I830_RDRAM_CHANNEL_TYPE 0x03010 #define I830_RDRAM_ND(x) (((x) & 0x20) >> 5) #define I830_RDRAM_DDT(x) (((x) & 0x18) >> 3) #define I855_GMCH_GMS_MASK (0xF << 4) #define I855_GMCH_GMS_DISABLED 0x00 #define I855_GMCH_GMS_STOLEN_1M (0x1 << 4) #define I855_GMCH_GMS_STOLEN_4M (0x2 << 4) #define I855_GMCH_GMS_STOLEN_8M (0x3 << 4) #define I855_GMCH_GMS_STOLEN_16M (0x4 << 4) #define I855_GMCH_GMS_STOLEN_32M (0x5 << 4) #define I915G_GMCH_GMS_STOLEN_48M (0x6 << 4) #define I915G_GMCH_GMS_STOLEN_64M (0x7 << 4) #define G33_GMCH_GMS_STOLEN_128M (0x8 << 4) #define G33_GMCH_GMS_STOLEN_256M (0x9 << 4) #define INTEL_GMCH_GMS_STOLEN_96M (0xa << 4) #define INTEL_GMCH_GMS_STOLEN_160M (0xb << 4) #define INTEL_GMCH_GMS_STOLEN_224M (0xc << 4) #define INTEL_GMCH_GMS_STOLEN_352M (0xd << 4) #define I915_GCFGC 0xf0 #define I915_LOW_FREQUENCY_ENABLE (1 << 7) #define I915_DISPLAY_CLOCK_190_200_MHZ (0 << 4) #define I915_DISPLAY_CLOCK_333_MHZ (4 << 4) #define I915_DISPLAY_CLOCK_MASK (7 << 4) #define I855_HPLLCC 0xc0 #define I855_CLOCK_CONTROL_MASK (3 << 0) #define I855_CLOCK_133_200 (0 << 0) #define I855_CLOCK_100_200 (1 << 0) #define I855_CLOCK_100_133 (2 << 0) #define I855_CLOCK_166_250 (3 << 0) /* BLT commands */ #define COLOR_BLT_CMD ((2<<29)|(0x40<<22)|(0x3)) #define COLOR_BLT_WRITE_ALPHA (1<<21) #define COLOR_BLT_WRITE_RGB (1<<20) #define XY_COLOR_BLT_CMD ((2<<29)|(0x50<<22)|(0x4)) #define XY_COLOR_BLT_WRITE_ALPHA (1<<21) #define XY_COLOR_BLT_WRITE_RGB (1<<20) #define XY_COLOR_BLT_TILED (1<<11) #define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1) #define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) #define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_SRC_COPY_BLT_SRC_TILED (1<<15) #define XY_SRC_COPY_BLT_DST_TILED (1<<11) #define SRC_COPY_BLT_CMD ((2<<29)|(0x43<<22)|0x4) #define SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_PAT_BLT_IMMEDIATE ((2<<29)|(0x72<<22)) #define XY_MONO_PAT_BLT_CMD ((0x2<<29)|(0x52<<22)|0x7) #define XY_MONO_PAT_VERT_SEED ((1<<10)|(1<<9)|(1<<8)) #define XY_MONO_PAT_HORT_SEED ((1<<14)|(1<<13)|(1<<12)) #define XY_MONO_PAT_BLT_WRITE_ALPHA (1<<21) #define XY_MONO_PAT_BLT_WRITE_RGB (1<<20) #define XY_MONO_SRC_BLT_CMD ((0x2<<29)|(0x54<<22)|(0x6)) #define XY_MONO_SRC_BLT_WRITE_ALPHA (1<<21) #define XY_MONO_SRC_BLT_WRITE_RGB (1<<20) #define STATE3D_FOG_MODE ((3<<29)|(0x1d<<24)|(0x89<<16)|2) #define FOG_MODE_VERTEX (1<<31) #define DISABLE_TEX_TRANSFORM (1<<28) #define TEXTURE_SET(x) (x<<29) #define STATE3D_VERTEX_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8b<<16)) #define DISABLE_VIEWPORT_TRANSFORM (1<<31) #define DISABLE_PERSPECTIVE_DIVIDE (1<<29) #define MI_SET_CONTEXT (0x18<<23) #define CTXT_NO_RESTORE (1) #define CTXT_PALETTE_SAVE_DISABLE (1<<3) #define CTXT_PALETTE_RESTORE_DISABLE (1<<2) /* Dword 0 */ #define MI_VERTEX_BUFFER (0x17<<23) #define MI_VERTEX_BUFFER_IDX(x) (x<<20) #define MI_VERTEX_BUFFER_PITCH(x) (x<<13) #define MI_VERTEX_BUFFER_WIDTH(x) (x<<6) /* Dword 1 */ #define MI_VERTEX_BUFFER_DISABLE (1) /* Overlay Flip */ #define MI_OVERLAY_FLIP (0x11<<23) #define MI_OVERLAY_FLIP_CONTINUE (0<<21) #define MI_OVERLAY_FLIP_ON (1<<21) #define MI_OVERLAY_FLIP_OFF (2<<21) /* Wait for Events */ #define MI_WAIT_FOR_EVENT (0x03<<23) #define MI_WAIT_FOR_PIPEB_SVBLANK (1<<18) #define MI_WAIT_FOR_PIPEA_SVBLANK (1<<17) #define MI_WAIT_FOR_OVERLAY_FLIP (1<<16) #define MI_WAIT_FOR_PIPEB_VBLANK (1<<7) #define MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW (1<<5) #define MI_WAIT_FOR_PIPEA_VBLANK (1<<3) #define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW (1<<1) /* Set the scan line for MI_WAIT_FOR_PIPE?_SCAN_LINE_WINDOW */ #define MI_LOAD_SCAN_LINES_INCL (0x12<<23) #define MI_LOAD_SCAN_LINES_DISPLAY_PIPEA (0) #define MI_LOAD_SCAN_LINES_DISPLAY_PIPEB (0x1<<20) /* Flush */ #define MI_FLUSH (0x04<<23) #define MI_WRITE_DIRTY_STATE (1<<4) #define MI_END_SCENE (1<<3) #define MI_GLOBAL_SNAPSHOT_COUNT_RESET (1<<3) #define MI_INHIBIT_RENDER_CACHE_FLUSH (1<<2) #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) #define MI_INVALIDATE_MAP_CACHE (1<<0) /* broadwater flush bits */ #define BRW_MI_GLOBAL_SNAPSHOT_RESET (1 << 3) /* Noop */ #define MI_NOOP 0x00 #define MI_NOOP_WRITE_ID (1<<22) #define MI_NOOP_ID_MASK (1<<22 - 1) #define STATE3D_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x01<<16)) /* Batch */ #define MI_BATCH_BUFFER ((0x30 << 23) | 1) #define MI_BATCH_BUFFER_START (0x31 << 23) #define MI_BATCH_BUFFER_END (0xA << 23) #define MI_BATCH_NON_SECURE (1) #define MI_BATCH_NON_SECURE_I965 (1 << 8) /* STATE3D_FOG_MODE stuff */ #define ENABLE_FOG_SOURCE (1<<27) #define ENABLE_FOG_CONST (1<<24) #define ENABLE_FOG_DENSITY (1<<23) #define MAX_DISPLAY_PIPES 2 typedef enum { CrtIndex = 0, TvIndex, DfpIndex, LfpIndex, Crt2Index, Tv2Index, Dfp2Index, Lfp2Index, NumDisplayTypes } DisplayType; /* What's connected to the pipes (as reported by the BIOS) */ #define PIPE_ACTIVE_MASK 0xff #define PIPE_CRT_ACTIVE (1 << CrtIndex) #define PIPE_TV_ACTIVE (1 << TvIndex) #define PIPE_DFP_ACTIVE (1 << DfpIndex) #define PIPE_LCD_ACTIVE (1 << LfpIndex) #define PIPE_CRT2_ACTIVE (1 << Crt2Index) #define PIPE_TV2_ACTIVE (1 << Tv2Index) #define PIPE_DFP2_ACTIVE (1 << Dfp2Index) #define PIPE_LCD2_ACTIVE (1 << Lfp2Index) #define PIPE_SIZED_DISP_MASK (PIPE_DFP_ACTIVE | \ PIPE_LCD_ACTIVE | \ PIPE_DFP2_ACTIVE) #define PIPE_A_SHIFT 0 #define PIPE_B_SHIFT 8 #define PIPE_SHIFT(n) ((n) == 0 ? \ PIPE_A_SHIFT : PIPE_B_SHIFT) /* * Some BIOS scratch area registers. The 845 (and 830?) store the amount * of video memory available to the BIOS in SWF1. */ #define SWF0 0x71410 #define SWF1 0x71414 #define SWF2 0x71418 #define SWF3 0x7141c #define SWF4 0x71420 #define SWF5 0x71424 #define SWF6 0x71428 /* * 855 scratch registers. */ #define SWF00 0x70410 #define SWF01 0x70414 #define SWF02 0x70418 #define SWF03 0x7041c #define SWF04 0x70420 #define SWF05 0x70424 #define SWF06 0x70428 #define SWF10 SWF0 #define SWF11 SWF1 #define SWF12 SWF2 #define SWF13 SWF3 #define SWF14 SWF4 #define SWF15 SWF5 #define SWF16 SWF6 #define SWF30 0x72414 #define SWF31 0x72418 #define SWF32 0x7241c /* * Overlay registers. These are overlay registers accessed via MMIO. * Those loaded via the overlay register page are defined in i830_video.c. */ #define OVADD 0x30000 #define DOVSTA 0x30008 #define OC_BUF (0x3<<20) #define OGAMC5 0x30010 #define OGAMC4 0x30014 #define OGAMC3 0x30018 #define OGAMC2 0x3001c #define OGAMC1 0x30020 #define OGAMC0 0x30024 /* * Palette registers */ #define PALETTE_A 0x0a000 #define PALETTE_B 0x0a800 /* Framebuffer compression */ #define FBC_CFB_BASE 0x03200 /* 4k page aligned */ #define FBC_LL_BASE 0x03204 /* 4k page aligned */ #define FBC_CONTROL 0x03208 #define FBC_CTL_EN (1<<31) #define FBC_CTL_PERIODIC (1<<30) #define FBC_CTL_INTERVAL_SHIFT (16) #define FBC_CTL_UNCOMPRESSIBLE (1<<14) #define FBC_CTL_STRIDE_SHIFT (5) #define FBC_CTL_FENCENO (1<<0) #define FBC_COMMAND 0x0320c #define FBC_CMD_COMPRESS (1<<0) #define FBC_STATUS 0x03210 #define FBC_STAT_COMPRESSING (1<<31) #define FBC_STAT_COMPRESSED (1<<30) #define FBC_STAT_MODIFIED (1<<29) #define FBC_STAT_CURRENT_LINE (1<<0) #define FBC_CONTROL2 0x03214 #define FBC_CTL_FENCE_DBL (0<<4) #define FBC_CTL_IDLE_IMM (0<<2) #define FBC_CTL_IDLE_FULL (1<<2) #define FBC_CTL_IDLE_LINE (2<<2) #define FBC_CTL_IDLE_DEBUG (3<<2) #define FBC_CTL_CPU_FENCE (1<<1) #define FBC_CTL_PLANEA (0<<0) #define FBC_CTL_PLANEB (1<<0) #define FBC_FENCE_OFF 0x0321b #define FBC_MOD_NUM 0x03220 #define FBC_TAG_DEBUG 0x03300 #define FBC_LL_SIZE (1536) #define FBC_LL_PAD (32) /* Framebuffer compression version 2 */ #define DPFC_CB_BASE 0x3200 #define DPFC_CONTROL 0x3208 #define DPFC_CTL_EN (1<<31) #define DPFC_CTL_PLANEA (0<<30) #define DPFC_CTL_PLANEB (1<<30) #define DPFC_CTL_FENCE_EN (1<<29) #define DPFC_CTL_LIMIT_1X (0<<6) #define DPFC_CTL_LIMIT_2X (1<<6) #define DPFC_CTL_LIMIT_4X (2<<6) #define DPFC_RECOMP_CTL 0x320c #define DPFC_RECOMP_STALL_EN (1<<27) #define DPFC_RECOMP_STALL_WM_SHIFT (16) #define DPFC_RECOMP_STALL_WM_MASK (0x07ff0000) #define DPFC_RECOMP_TIMER_COUNT_SHIFT (0) #define DPFC_RECOMP_TIMER_COUNT_MASK (0x0000003f) #define DPFC_STATUS 0x3210 #define DPFC_INVAL_SEG_SHIFT (16) #define DPFC_INVAL_SEG_MASK (0x07ff0000) #define DPFC_COMP_SEG_SHIFT (0) #define DPFC_COMP_SEG_MASK (0x000003ff) #define DPFC_STATUS2 0x3214 #define DPFC_FENCE_YOFF 0x3218 #define PEG_BAND_GAP_DATA 0x14d68 #define MCHBAR_RENDER_STANDBY 0x111B8 #define RENDER_STANDBY_ENABLE (1 << 30) /* Ironlake */ /* warmup time in us */ #define WARMUP_PCH_REF_CLK_SSC_MOD 1 #define WARMUP_PCH_FDI_RECEIVER_PLL 25 #define WARMUP_PCH_DPLL 50 #define WARMUP_CPU_DP_PLL 20 #define WARMUP_CPU_FDI_TRANSMITTER_PLL 10 #define WARMUP_DMI_LATENCY 20 #define FDI_TRAIN_PATTERN_1_TIME 0.5 #define FDI_TRAIN_PATTERN_2_TIME 1.5 #define FDI_ONE_IDLE_PATTERN_TIME 31 #define CPU_VGACNTRL 0x41000 #define DIGITAL_PORT_HOTPLUG_CNTRL 0x44030 #define DIGITAL_PORTA_HOTPLUG_ENABLE (1 << 4) #define DIGITAL_PORTA_SHORT_PULSE_2MS (0 << 2) #define DIGITAL_PORTA_SHORT_PULSE_4_5MS (1 << 2) #define DIGITAL_PORTA_SHORT_PULSE_6MS (2 << 2) #define DIGITAL_PORTA_SHORT_PULSE_100MS (3 << 2) #define DIGITAL_PORTA_NO_DETECT (0 << 0) #define DIGITAL_PORTA_LONG_PULSE_DETECT_MASK (1 << 1) #define DIGITAL_PORTA_SHORT_PULSE_DETECT_MASK (1 << 0) /* refresh rate hardware control */ #define RR_HW_CTL 0x45300 #define RR_HW_LOW_POWER_FRAMES_MASK 0xff #define RR_HW_HIGH_POWER_FRAMES_MASK 0xff00 #define FDI_PLL_BIOS_0 0x46000 #define FDI_PLL_BIOS_1 0x46004 #define FDI_PLL_BIOS_2 0x46008 #define DISPLAY_PORT_PLL_BIOS_0 0x4600c #define DISPLAY_PORT_PLL_BIOS_1 0x46010 #define DISPLAY_PORT_PLL_BIOS_2 0x46014 #define FDI_PLL_FREQ_CTL 0x46030 #define FDI_PLL_FREQ_CHANGE_REQUEST (1<<24) #define FDI_PLL_FREQ_LOCK_LIMIT_MASK 0xfff00 #define FDI_PLL_FREQ_DISABLE_COUNT_LIMIT_MASK 0xff #define PIPEA_DATA_M1 0x60030 #define TU_SIZE(x) (((x)-1) << 25) /* default size 64 */ #define TU_SIZE_MASK 0x7e000000 #define PIPEA_DATA_M1_OFFSET 0 #define PIPEA_DATA_N1 0x60034 #define PIPEA_DATA_N1_OFFSET 0 #define PIPEA_DATA_M2 0x60038 #define PIPEA_DATA_M2_OFFSET 0 #define PIPEA_DATA_N2 0x6003c #define PIPEA_DATA_N2_OFFSET 0 #define PIPEA_LINK_M1 0x60040 #define PIPEA_LINK_M1_OFFSET 0 #define PIPEA_LINK_N1 0x60044 #define PIPEA_LINK_N1_OFFSET 0 #define PIPEA_LINK_M2 0x60048 #define PIPEA_LINK_M2_OFFSET 0 #define PIPEA_LINK_N2 0x6004c #define PIPEA_LINK_N2_OFFSET 0 /* PIPEB timing regs are same start from 0x61000 */ #define PIPEB_DATA_M1 0x61030 #define PIPEB_DATA_M1_OFFSET 0 #define PIPEB_DATA_N1 0x61034 #define PIPEB_DATA_N1_OFFSET 0 #define PIPEB_DATA_M2 0x61038 #define PIPEB_DATA_M2_OFFSET 0 #define PIPEB_DATA_N2 0x6103c #define PIPEB_DATA_N2_OFFSET 0 #define PIPEB_LINK_M1 0x61040 #define PIPEB_LINK_M1_OFFSET 0 #define PIPEB_LINK_N1 0x61044 #define PIPEB_LINK_N1_OFFSET 0 #define PIPEB_LINK_M2 0x61048 #define PIPEB_LINK_M2_OFFSET 0 #define PIPEB_LINK_N2 0x6104c #define PIPEB_LINK_N2_OFFSET 0 /* PIPECONF for pipe A/B addr is same */ /* cusor A is only connected to pipe A, cursor B is connected to pipe B. Otherwise no change. */ /* Plane A/B, DSPACNTR/DSPBCNTR addr not changed */ /* CPU panel fitter */ #define PFA_CTL_1 0x68080 #define PFB_CTL_1 0x68880 #define PF_ENABLE (1<<31) #define PFA_WIN_POS 0x68070 #define PFB_WIN_POS 0x68870 #define PFA_WIN_SIZE 0x68074 #define PFB_WIN_SIZE 0x68874 /* legacy palette */ #define LGC_PALETTE_A 0x4a000 #define LGC_PALETTE_B 0x4a800 /* interrupts */ #define DE_MASTER_IRQ_CONTROL (1 << 31) #define DE_SPRITEB_FLIP_DONE (1 << 29) #define DE_SPRITEA_FLIP_DONE (1 << 28) #define DE_PLANEB_FLIP_DONE (1 << 27) #define DE_PLANEA_FLIP_DONE (1 << 26) #define DE_PCU_EVENT (1 << 25) #define DE_GTT_FAULT (1 << 24) #define DE_POISON (1 << 23) #define DE_PERFORM_COUNTER (1 << 22) #define DE_PCH_EVENT (1 << 21) #define DE_AUX_CHANNEL_A (1 << 20) #define DE_DP_A_HOTPLUG (1 << 19) #define DE_GSE (1 << 18) #define DE_PIPEB_VBLANK (1 << 15) #define DE_PIPEB_EVEN_FIELD (1 << 14) #define DE_PIPEB_ODD_FIELD (1 << 13) #define DE_PIPEB_LINE_COMPARE (1 << 12) #define DE_PIPEB_VSYNC (1 << 11) #define DE_PIPEB_FIFO_UNDERRUN (1 << 8) #define DE_PIPEA_VBLANK (1 << 7) #define DE_PIPEA_EVEN_FIELD (1 << 6) #define DE_PIPEA_ODD_FIELD (1 << 5) #define DE_PIPEA_LINE_COMPARE (1 << 4) #define DE_PIPEA_VSYNC (1 << 3) #define DE_PIPEA_FIFO_UNDERRUN (1 << 0) #define DEISR 0x44000 #define DEIMR 0x44004 #define DEIIR 0x44008 #define DEIER 0x4400c /* GT interrupt */ #define GT_SYNC_STATUS (1 << 2) #define GT_USER_INTERRUPT (1 << 0) #define GTISR 0x44010 #define GTIMR 0x44014 #define GTIIR 0x44018 #define GTIER 0x4401c /* PCH */ /* south display engine interrupt */ #define SDE_CRT_HOTPLUG (1 << 11) #define SDE_PORTD_HOTPLUG (1 << 10) #define SDE_PORTC_HOTPLUG (1 << 9) #define SDE_PORTB_HOTPLUG (1 << 8) #define SDE_SDVOB_HOTPLUG (1 << 6) #define SDEISR 0xc4000 #define SDEIMR 0xc4004 #define SDEIIR 0xc4008 #define SDEIER 0xc400c /* digital port hotplug */ #define PCH_PORT_HOTPLUG 0xc4030 #define PORTD_HOTPLUG_ENABLE (1 << 20) #define PORTD_PULSE_DURATION_2ms (0) #define PORTD_PULSE_DURATION_4_5ms (1 << 18) #define PORTD_PULSE_DURATION_6ms (2 << 18) #define PORTD_PULSE_DURATION_100ms (3 << 18) #define PORTD_HOTPLUG_NO_DETECT (0) #define PORTD_HOTPLUG_SHORT_DETECT (1 << 16) #define PORTD_HOTPLUG_LONG_DETECT (1 << 17) #define PORTC_HOTPLUG_ENABLE (1 << 12) #define PORTC_PULSE_DURATION_2ms (0) #define PORTC_PULSE_DURATION_4_5ms (1 << 10) #define PORTC_PULSE_DURATION_6ms (2 << 10) #define PORTC_PULSE_DURATION_100ms (3 << 10) #define PORTC_HOTPLUG_NO_DETECT (0) #define PORTC_HOTPLUG_SHORT_DETECT (1 << 8) #define PORTC_HOTPLUG_LONG_DETECT (1 << 9) #define PORTB_HOTPLUG_ENABLE (1 << 4) #define PORTB_PULSE_DURATION_2ms (0) #define PORTB_PULSE_DURATION_4_5ms (1 << 2) #define PORTB_PULSE_DURATION_6ms (2 << 2) #define PORTB_PULSE_DURATION_100ms (3 << 2) #define PORTB_HOTPLUG_NO_DETECT (0) #define PORTB_HOTPLUG_SHORT_DETECT (1 << 0) #define PORTB_HOTPLUG_LONG_DETECT (1 << 1) #define PCH_GPIOA 0xc5010 #define PCH_GPIOB 0xc5014 #define PCH_GPIOC 0xc5018 #define PCH_GPIOD 0xc501c #define PCH_GPIOE 0xc5020 #define PCH_GPIOF 0xc5024 #define PCH_GMBUS0 0xc5100 #define PCH_GMBUS1 0xc5104 #define PCH_GMBUS2 0xc5108 #define PCH_GMBUS3 0xc510c #define PCH_GMBUS4 0xc5110 #define PCH_GMBUS5 0xc5120 #define PCH_DPLL_A 0xc6014 #define PCH_DPLL_B 0xc6018 #define PCH_FPA0 0xc6040 #define PCH_FPA1 0xc6044 #define PCH_FPB0 0xc6048 #define PCH_FPB1 0xc604c #define PCH_DPLL_TEST 0xc606c #define PCH_DREF_CONTROL 0xC6200 #define DREF_CONTROL_MASK 0x7fc3 #define DREF_CPU_SOURCE_OUTPUT_DISABLE (0<<13) #define DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD (2<<13) #define DREF_CPU_SOURCE_OUTPUT_NONSPREAD (3<<13) #define DREF_SSC_SOURCE_DISABLE (0<<11) #define DREF_SSC_SOURCE_ENABLE (2<<11) #define DREF_NONSPREAD_SOURCE_DISABLE (0<<9) #define DREF_NONSPREAD_SOURCE_ENABLE (2<<9) #define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7) #define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7) #define DREF_SSC4_DOWNSPREAD (0<<6) #define DREF_SSC4_CENTERSPREAD (1<<6) #define DREF_SSC1_DISABLE (0<<1) #define DREF_SSC1_ENABLE (1<<1) #define DREF_SSC4_DISABLE (0) #define DREF_SSC4_ENABLE (1) #define PCH_RAWCLK_FREQ 0xc6204 #define FDL_TP1_TIMER_SHIFT 12 #define FDL_TP1_TIMER_MASK (3<<12) #define FDL_TP2_TIMER_SHIFT 10 #define FDL_TP2_TIMER_MASK (3<<10) #define RAWCLK_FREQ_MASK 0x3ff #define PCH_DPLL_TMR_CFG 0xc6208 #define PCH_SSC4_PARMS 0xc6210 #define PCH_SSC4_AUX_PARMS 0xc6214 /* transcoder */ #define TRANS_HTOTAL_A 0xe0000 #define TRANS_HTOTAL_SHIFT 16 #define TRANS_HACTIVE_SHIFT 0 #define TRANS_HBLANK_A 0xe0004 #define TRANS_HBLANK_END_SHIFT 16 #define TRANS_HBLANK_START_SHIFT 0 #define TRANS_HSYNC_A 0xe0008 #define TRANS_HSYNC_END_SHIFT 16 #define TRANS_HSYNC_START_SHIFT 0 #define TRANS_VTOTAL_A 0xe000c #define TRANS_VTOTAL_SHIFT 16 #define TRANS_VACTIVE_SHIFT 0 #define TRANS_VBLANK_A 0xe0010 #define TRANS_VBLANK_END_SHIFT 16 #define TRANS_VBLANK_START_SHIFT 0 #define TRANS_VSYNC_A 0xe0014 #define TRANS_VSYNC_END_SHIFT 16 #define TRANS_VSYNC_START_SHIFT 0 #define TRANSA_DATA_M1 0xe0030 #define TRANSA_DATA_N1 0xe0034 #define TRANSA_DATA_M2 0xe0038 #define TRANSA_DATA_N2 0xe003c #define TRANSA_DP_LINK_M1 0xe0040 #define TRANSA_DP_LINK_N1 0xe0044 #define TRANSA_DP_LINK_M2 0xe0048 #define TRANSA_DP_LINK_N2 0xe004c #define TRANS_HTOTAL_B 0xe1000 #define TRANS_HBLANK_B 0xe1004 #define TRANS_HSYNC_B 0xe1008 #define TRANS_VTOTAL_B 0xe100c #define TRANS_VBLANK_B 0xe1010 #define TRANS_VSYNC_B 0xe1014 #define TRANSB_DATA_M1 0xe1030 #define TRANSB_DATA_N1 0xe1034 #define TRANSB_DATA_M2 0xe1038 #define TRANSB_DATA_N2 0xe103c #define TRANSB_DP_LINK_M1 0xe1040 #define TRANSB_DP_LINK_N1 0xe1044 #define TRANSB_DP_LINK_M2 0xe1048 #define TRANSB_DP_LINK_N2 0xe104c #define TRANSACONF 0xf0008 #define TRANSBCONF 0xf1008 #define TRANS_DISABLE (0<<31) #define TRANS_ENABLE (1<<31) #define TRANS_STATE_MASK (1<<30) #define TRANS_STATE_DISABLE (0<<30) #define TRANS_STATE_ENABLE (1<<30) #define TRANS_FSYNC_DELAY_HB1 (0<<27) #define TRANS_FSYNC_DELAY_HB2 (1<<27) #define TRANS_FSYNC_DELAY_HB3 (2<<27) #define TRANS_FSYNC_DELAY_HB4 (3<<27) #define TRANS_DP_AUDIO_ONLY (1<<26) #define TRANS_DP_VIDEO_AUDIO (0<<26) #define TRANS_PROGRESSIVE (0<<21) #define TRANS_8BPC (0<<5) #define TRANS_10BPC (1<<5) #define TRANS_6BPC (2<<5) #define TRANS_12BPC (3<<5) #define FDI_RXA_CHICKEN 0xc200c #define FDI_RXB_CHICKEN 0xc2010 #define FDI_RX_PHASE_SYNC_POINTER_ENABLE (1) /* CPU: FDI_TX */ #define FDI_TXA_CTL 0x60100 #define FDI_TXB_CTL 0x61100 #define FDI_TX_DISABLE (0<<31) #define FDI_TX_ENABLE (1<<31) #define FDI_LINK_TRAIN_PATTERN_1 (0<<28) #define FDI_LINK_TRAIN_PATTERN_2 (1<<28) #define FDI_LINK_TRAIN_PATTERN_IDLE (2<<28) #define FDI_LINK_TRAIN_NONE (3<<28) #define FDI_LINK_TRAIN_VOLTAGE_0_4V (0<<25) #define FDI_LINK_TRAIN_VOLTAGE_0_6V (1<<25) #define FDI_LINK_TRAIN_VOLTAGE_0_8V (2<<25) #define FDI_LINK_TRAIN_VOLTAGE_1_2V (3<<25) #define FDI_LINK_TRAIN_PRE_EMPHASIS_NONE (0<<22) #define FDI_LINK_TRAIN_PRE_EMPHASIS_1_5X (1<<22) #define FDI_LINK_TRAIN_PRE_EMPHASIS_2X (2<<22) #define FDI_LINK_TRAIN_PRE_EMPHASIS_3X (3<<22) #define FDI_DP_PORT_WIDTH_X1 (0<<19) #define FDI_DP_PORT_WIDTH_X2 (1<<19) #define FDI_DP_PORT_WIDTH_X3 (2<<19) #define FDI_DP_PORT_WIDTH_X4 (3<<19) #define FDI_TX_ENHANCE_FRAME_ENABLE (1<<18) /* Ironlake: hardwired to 1 */ #define FDI_TX_PLL_ENABLE (1<<14) /* both Tx and Rx */ #define FDI_SCRAMBLING_ENABLE (0<<7) #define FDI_SCRAMBLING_DISABLE (1<<7) /* FDI_RX, FDI_X is hard-wired to Transcoder_X */ #define FDI_RXA_CTL 0xf000c #define FDI_RXB_CTL 0xf100c #define FDI_RX_ENABLE (1<<31) #define FDI_RX_DISABLE (0<<31) /* train, dp width same as FDI_TX */ #define FDI_DP_PORT_WIDTH_X8 (7<<19) #define FDI_8BPC (0<<16) #define FDI_10BPC (1<<16) #define FDI_6BPC (2<<16) #define FDI_12BPC (3<<16) #define FDI_LINK_REVERSE_OVERWRITE (1<<15) #define FDI_DMI_LINK_REVERSE_MASK (1<<14) #define FDI_RX_PLL_ENABLE (1<<13) #define FDI_FS_ERR_CORRECT_ENABLE (1<<11) #define FDI_FE_ERR_CORRECT_ENABLE (1<<10) #define FDI_FS_ERR_REPORT_ENABLE (1<<9) #define FDI_FE_ERR_REPORT_ENABLE (1<<8) #define FDI_RX_ENHANCE_FRAME_ENABLE (1<<6) #define FDI_SEL_RAWCLK (0<<4) #define FDI_SEL_PCDCLK (1<<4) #define FDI_RXA_MISC 0xf0010 #define FDI_RXB_MISC 0xf1010 #define FDI_RXA_TUSIZE1 0xf0030 #define FDI_RXA_TUSIZE2 0xf0038 #define FDI_RXB_TUSIZE1 0xf1030 #define FDI_RXB_TUSIZE2 0xf1038 /* FDI_RX interrupt register format */ #define FDI_RX_INTER_LANE_ALIGN (1<<10) #define FDI_RX_SYMBOL_LOCK (1<<9) /* train 2 */ #define FDI_RX_BIT_LOCK (1<<8) /* train 1 */ #define FDI_RX_TRAIN_PATTERN_2_FAIL (1<<7) #define FDI_RX_FS_CODE_ERR (1<<6) #define FDI_RX_FE_CODE_ERR (1<<5) #define FDI_RX_SYMBOL_ERR_RATE_ABOVE (1<<4) #define FDI_RX_HDCP_LINK_FAIL (1<<3) #define FDI_RX_PIXEL_FIFO_OVERFLOW (1<<2) #define FDI_RX_CROSS_CLOCK_OVERFLOW (1<<1) #define FDI_RX_SYMBOL_QUEUE_OVERFLOW (1<<0) #define FDI_RXA_IIR 0xf0014 #define FDI_RXA_IMR 0xf0018 #define FDI_RXB_IIR 0xf1014 #define FDI_RXB_IMR 0xf1018 #define FDI_PLL_CTL_1 0xfe000 #define FDI_PLL_CTL_2 0xfe004 /* CRT */ #define PCH_ADPA 0xe1100 #define ADPA_TRANS_SELECT_MASK (1<<30) #define ADPA_TRANS_A_SELECT 0 #define ADPA_TRANS_B_SELECT (1<<30) /* HPD is here */ #define ADPA_CRT_HOTPLUG_MASK 0x03ff0000 /* bit 25-16 */ #define ADPA_CRT_HOTPLUG_MONITOR_NONE (0<<24) #define ADPA_CRT_HOTPLUG_MONITOR_MASK (3<<24) #define ADPA_CRT_HOTPLUG_MONITOR_COLOR (3<<24) #define ADPA_CRT_HOTPLUG_MONITOR_MONO (2<<24) #define ADPA_CRT_HOTPLUG_ENABLE (1<<23) #define ADPA_CRT_HOTPLUG_PERIOD_64 (0<<22) #define ADPA_CRT_HOTPLUG_PERIOD_128 (1<<22) #define ADPA_CRT_HOTPLUG_WARMUP_5MS (0<<21) #define ADPA_CRT_HOTPLUG_WARMUP_10MS (1<<21) #define ADPA_CRT_HOTPLUG_SAMPLE_2S (0<<20) #define ADPA_CRT_HOTPLUG_SAMPLE_4S (1<<20) #define ADPA_CRT_HOTPLUG_VOLTAGE_40 (0<<18) #define ADPA_CRT_HOTPLUG_VOLTAGE_50 (1<<18) #define ADPA_CRT_HOTPLUG_VOLTAGE_60 (2<<18) #define ADPA_CRT_HOTPLUG_VOLTAGE_70 (3<<18) #define ADPA_CRT_HOTPLUG_VOLREF_325MV (0<<17) #define ADPA_CRT_HOTPLUG_VOLREF_475MV (1<<17) #define ADPA_CRT_HOTPLUG_FORCE_TRIGGER (1<<16) /* polarity control not changed */ /* or SDVOB */ #define HDMIB 0xe1140 #define PORT_ENABLE (1 << 31) #define TRANSCODER_A (0) #define TRANSCODER_B (1 << 30) #define COLOR_FORMAT_8bpc (0) #define COLOR_FORMAT_12bpc (3 << 26) #define SDVOB_HOTPLUG_ENABLE (1 << 23) #define SDVO_ENCODING (0) #define TMDS_ENCODING (2 << 10) #define NULL_PACKET_VSYNC_ENABLE (1 << 9) #define SDVOB_BORDER_ENABLE (1 << 7) #define AUDIO_ENABLE (1 << 6) #define VSYNC_ACTIVE_HIGH (1 << 4) #define HSYNC_ACTIVE_HIGH (1 << 3) #define PORT_DETECTED (1 << 2) #define HDMIC 0xe1150 #define HDMID 0xe1160 #define PCH_LVDS 0xe1180 #define AUD_CONFIG 0x62000 #define AUD_DEBUG 0x62010 #define AUD_VID_DID 0x62020 #define AUD_RID 0x62024 #define AUD_SUBN_CNT 0x62028 #define AUD_FUNC_GRP 0x62040 #define AUD_SUBN_CNT2 0x62044 #define AUD_GRP_CAP 0x62048 #define AUD_PWRST 0x6204c #define AUD_SUPPWR 0x62050 #define AUD_SID 0x62054 #define AUD_OUT_CWCAP 0x62070 #define AUD_OUT_PCMSIZE 0x62074 #define AUD_OUT_STR 0x62078 #define AUD_OUT_DIG_CNVT 0x6207c #define AUD_OUT_CH_STR 0x62080 #define AUD_OUT_STR_DESC 0x62084 #define AUD_PINW_CAP 0x620a0 #define AUD_PIN_CAP 0x620a4 #define AUD_PINW_CONNLNG 0x620a8 #define AUD_PINW_CONNLST 0x620ac #define AUD_PINW_CNTR 0x620b0 #define AUD_PINW_UNSOLRESP 0x620b8 #define AUD_CNTL_ST 0x620b4 #define AUD_PINW_CONFIG 0x620bc #define AUD_HDMIW_STATUS 0x620d4 #define AUD_HDMIW_HDMIEDID 0x6210c #define AUD_HDMIW_INFOFR 0x62118 #define AUD_CONV_CHCNT 0x62120 #define AUD_CTS_ENABLE 0x62128 #define VIDEO_DIP_CTL 0x61170 #endif /* _I810_REG_H */ xf86-video-intel-2.99.917/src/legacy/i810/xvmc/0000775000175000017500000000000012445556131015506 500000000000000xf86-video-intel-2.99.917/src/legacy/i810/xvmc/I810XvMC.c0000664000175000017500000040346612244635610016763 00000000000000/*************************************************************************** Copyright 2001 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /************************************************************************* ** File libI810XvMC.c ** ** Authors: ** Matt Sottek ** Bob Paauwe ** ** ***************************************************************************/ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "I810XvMC.h" static int error_base; static int event_base; /*************************************************************************** // Function: i810_get_free_buffer // Description: Allocates a free dma page using kernel ioctls, then // programs the data into the already allocated dma buffer list. // Arguments: pI810XvMC private data structure from the current context. // Notes: We faked the drmMapBufs for the i810's security so now we have // to insert an allocated page into the correct spot in the faked // list to keep up appearences. // Concept for this function was taken from Mesa sources. // Returns: drmBufPtr containing the information about the allocated page. ***************************************************************************/ drmBufPtr i810_get_free_buffer(i810XvMCContext *pI810XvMC) { drmI810DMA dma; drmBufPtr buf; dma.granted = 0; dma.request_size = 4096; while(!dma.granted) { if(GET_BUFFER(pI810XvMC, dma) || !dma.granted) FLUSH(pI810XvMC); } /* No DMA granted */ buf = &(pI810XvMC->dmabufs->list[dma.request_idx]); buf->idx = dma.request_idx; buf->used = 0; buf->total = dma.request_size; buf->address = (drmAddress)dma.virtual; return buf; } /*************************************************************************** // Function: free_privContext // Description: Free's the private context structure if the reference // count is 0. ***************************************************************************/ void i810_free_privContext(i810XvMCContext *pI810XvMC) { I810_LOCK(pI810XvMC,DRM_LOCK_QUIESCENT); pI810XvMC->ref--; if(!pI810XvMC->ref) { drmUnmapBufs(pI810XvMC->dmabufs); drmUnmap(pI810XvMC->overlay.address,pI810XvMC->overlay.size); drmUnmap(pI810XvMC->surfaces.address,pI810XvMC->surfaces.size); drmClose(pI810XvMC->fd); free(pI810XvMC->dmabufs->list); free(pI810XvMC); } I810_UNLOCK(pI810XvMC); } /*************************************************************************** // Function: XvMCCreateContext // Description: Create a XvMC context for the given surface parameters. // Arguments: // display - Connection to the X server. // port - XvPortID to use as avertised by the X connection. // surface_type_id - Unique identifier for the Surface type. // width - Width of the surfaces. // height - Height of the surfaces. // flags - one or more of the following // XVMC_DIRECT - A direct rendered context is requested. // // Notes: surface_type_id and width/height parameters must match those // returned by XvMCListSurfaceTypes. // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCCreateContext(Display *display, XvPortID port, int surface_type_id, int width, int height, int flags, XvMCContext *context) { i810XvMCContext *pI810XvMC; int priv_count; uint *priv_data; uint magic; Status ret; int major, minor; /* Verify Obvious things first */ if(context == NULL) { return XvMCBadContext; } if(!(flags & XVMC_DIRECT)) { /* Indirect */ printf("Indirect Rendering not supported!\nUsing Direct."); } /* Limit use to root for now */ if(geteuid()) { printf("Use of XvMC on i810 is currently limited to root\n"); return BadAccess; } /* FIXME: Check $DISPLAY for legal values here */ context->surface_type_id = surface_type_id; context->width = (unsigned short)width; context->height = (unsigned short)height; context->flags = flags; context->port = port; /* Width, Height, and flags are checked against surface_type_id and port for validity inside the X server, no need to check here. */ /* Allocate private Context data */ context->privData = (void *)malloc(sizeof(i810XvMCContext)); if(!context->privData) { printf("Unable to allocate resources for XvMC context.\n"); return BadAlloc; } pI810XvMC = (i810XvMCContext *)context->privData; /* Verify the XvMC extension exists */ if(! XvMCQueryExtension(display, &event_base, &error_base)) { printf("XvMC Extension is not available!\n"); return BadAlloc; } /* Verify XvMC version */ ret = XvMCQueryVersion(display, &major, &minor); if(ret) { printf("XvMCQuery Version Failed, unable to determine protocol version\n"); } /* FIXME: Check Major and Minor here */ /* Check for drm */ if(! drmAvailable()) { printf("Direct Rendering is not avilable on this system!\n"); return BadAlloc; } /* Build the Attribute Atoms, and Initialize the ones that exist in Xv. */ pI810XvMC->xv_colorkey = XInternAtom(display,"XV_COLORKEY",0); if(!pI810XvMC->xv_colorkey) { return XvBadPort; } ret = XvGetPortAttribute(display,port,pI810XvMC->xv_colorkey, &pI810XvMC->colorkey); if(ret) { return ret; } pI810XvMC->xv_brightness = XInternAtom(display,"XV_BRIGHTNESS",0); pI810XvMC->xv_saturation = XInternAtom(display,"XV_SATURATION",0); pI810XvMC->xv_contrast = XInternAtom(display,"XV_CONTRAST",0); pI810XvMC->brightness = 0; pI810XvMC->saturation = 0x80; /* 1.0 in 3.7 format */ pI810XvMC->contrast = 0x40; /* 1.0 in 3.6 format */ /* Open DRI Device */ if((pI810XvMC->fd = drmOpen("i810",NULL)) < 0) { printf("DRM Device for i810 could not be opened.\n"); free(pI810XvMC); return BadAccess; } /* !pI810XvMC->fd */ /* Get magic number and put it in privData for passing */ drmGetMagic(pI810XvMC->fd,&magic); context->flags = (unsigned long)magic; /* Pass control to the X server to create a drm_context_t for us and validate the with/height and flags. */ if((ret = _xvmc_create_context(display, context, &priv_count, &priv_data))) { printf("Unable to create XvMC Context.\n"); return ret; } /* X server returns a structure like this: drm_context_t fbBase OverlayOffset OverlaySize SurfacesOffset SurfacesSize busIdString = 9 char + 1 */ if(priv_count != 9) { printf("_xvmc_create_context() returned incorrect data size!\n"); printf("\tExpected 9, got %d\n",priv_count); _xvmc_destroy_context(display, context); free(pI810XvMC); return BadAlloc; } pI810XvMC->drmcontext = priv_data[0]; pI810XvMC->fb_base = priv_data[1]; pI810XvMC->overlay.offset = priv_data[2] + priv_data[1]; pI810XvMC->overlay.size = priv_data[3]; pI810XvMC->surfaces.offset = priv_data[4] + priv_data[1]; pI810XvMC->surfaces.size = priv_data[5]; strncpy(pI810XvMC->busIdString,(char *)&priv_data[6],9); pI810XvMC->busIdString[9] = '\0'; /* Must free the private data we were passed from X */ free(priv_data); /* Initialize private context values */ pI810XvMC->current = 0; pI810XvMC->lock = 0; pI810XvMC->last_flip = 0; pI810XvMC->dual_prime = 0; /* Map dma Buffers: Not really, this would be a drmMapBufs but due to the i810 security model we have to just create an empty data structure to fake it. */ pI810XvMC->dmabufs = (drmBufMapPtr)malloc(sizeof(drmBufMap)); if(pI810XvMC->dmabufs == NULL) { printf("Dma Bufs could not be mapped.\n"); _xvmc_destroy_context(display, context); free(pI810XvMC); return BadAlloc; } /* pI810XvMC->dmabufs == NULL */ memset(pI810XvMC->dmabufs, 0, sizeof(drmBufMap)); pI810XvMC->dmabufs->list = (drmBufPtr)malloc(sizeof(drmBuf) * I810_DMA_BUF_NR); if(pI810XvMC->dmabufs->list == NULL) { printf("Dma Bufs could not be mapped.\n"); _xvmc_destroy_context(display, context); free(pI810XvMC); return BadAlloc; } /* pI810XvMC->dmabufs->list == NULL */ memset(pI810XvMC->dmabufs->list, 0, sizeof(drmBuf) * I810_DMA_BUF_NR); /* Map the Overlay memory */ if(drmMap(pI810XvMC->fd,pI810XvMC->overlay.offset, pI810XvMC->overlay.size,&(pI810XvMC->overlay.address)) < 0) { printf("Unable to map Overlay at offset 0x%x and size 0x%x\n", (unsigned int)pI810XvMC->overlay.offset,pI810XvMC->overlay.size); _xvmc_destroy_context(display, context); free(pI810XvMC->dmabufs->list); free(pI810XvMC); return BadAlloc; } /* drmMap() < 0 */ /* Overlay Regs are offset 1024 into Overlay Map */ pI810XvMC->oregs = (i810OverlayRec *) ((unsigned char *)pI810XvMC->overlay.address + 1024); /* Map Surfaces */ if(drmMap(pI810XvMC->fd,pI810XvMC->surfaces.offset, pI810XvMC->surfaces.size,&(pI810XvMC->surfaces.address)) < 0) { printf("Unable to map XvMC Surfaces.\n"); _xvmc_destroy_context(display, context); free(pI810XvMC->dmabufs->list); free(pI810XvMC); return BadAlloc; } /* drmMap() < 0 */ /* There is a tiny chance that someone was using the overlay and issued a flip that hasn't finished. To be 100% sure I'll just take the lock and sleep for the worst case time for a flip. */ I810_LOCK(pI810XvMC,DRM_LOCK_QUIESCENT); usleep(20000); /* 1/50th Sec for 50hz refresh */ /* Set up Overlay regs with Initial Values */ pI810XvMC->oregs->YRGB_VPH = 0; pI810XvMC->oregs->UV_VPH = 0; pI810XvMC->oregs->HORZ_PH = 0; pI810XvMC->oregs->INIT_PH = 0; pI810XvMC->oregs->DWINPOS = 0; pI810XvMC->oregs->DWINSZ = (I810_XVMC_MAXHEIGHT << 16) | I810_XVMC_MAXWIDTH; pI810XvMC->oregs->SWID = I810_XVMC_MAXWIDTH | (I810_XVMC_MAXWIDTH << 15); pI810XvMC->oregs->SWIDQW = (I810_XVMC_MAXWIDTH >> 3) | (I810_XVMC_MAXWIDTH << 12); pI810XvMC->oregs->SHEIGHT = I810_XVMC_MAXHEIGHT | (I810_XVMC_MAXHEIGHT << 15); pI810XvMC->oregs->YRGBSCALE = 0x80004000; /* scale factor 1 */ pI810XvMC->oregs->UVSCALE = 0x80004000; /* scale factor 1 */ pI810XvMC->oregs->OV0CLRC0 = 0x4000; /* brightness: 0 contrast: 1.0 */ pI810XvMC->oregs->OV0CLRC1 = 0x80; /* saturation: bypass */ /* Destination Colorkey Setup */ pI810XvMC->oregs->DCLRKV = RGB16ToColorKey(pI810XvMC->colorkey); pI810XvMC->oregs->DCLRKM = 0x80070307; pI810XvMC->oregs->SCLRKVH = 0; pI810XvMC->oregs->SCLRKVL = 0; pI810XvMC->oregs->SCLRKM = 0; /* source color key disable */ pI810XvMC->oregs->OV0CONF = 0; /* two 720 pixel line buffers */ pI810XvMC->oregs->OV0CMD = VC_UP_INTERPOLATION | HC_UP_INTERPOLATION | Y_ADJUST | YUV_420; pI810XvMC->ref = 1; I810_UNLOCK(pI810XvMC); return Success; } /*************************************************************************** // Function: XvMCDestroyContext // Description: Destorys the specified context. // // Arguments: // display - Specifies the connection to the server. // context - The context to be destroyed. // // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCDestroyContext(Display *display, XvMCContext *context) { i810XvMCContext *pI810XvMC; if(context == NULL) { return (error_base + XvMCBadContext); } if(context->privData == NULL) { return (error_base + XvMCBadContext); } pI810XvMC = (i810XvMCContext *)context->privData; /* Turn off the overlay */ if(pI810XvMC->last_flip) { I810_LOCK(pI810XvMC,DRM_LOCK_QUIESCENT); /* Make sure last flip is done */ BLOCK_OVERLAY(pI810XvMC,pI810XvMC->current); pI810XvMC->oregs->OV0CMD = VC_UP_INTERPOLATION | HC_UP_INTERPOLATION | Y_ADJUST; pI810XvMC->current = !pI810XvMC->current; if(pI810XvMC->current == 1) { pI810XvMC->oregs->OV0CMD |= BUFFER1_FIELD0; } else { pI810XvMC->oregs->OV0CMD |= BUFFER0_FIELD0; } OVERLAY_FLIP(pI810XvMC); pI810XvMC->last_flip++; /* Wait for the flip */ BLOCK_OVERLAY(pI810XvMC,pI810XvMC->current); I810_UNLOCK(pI810XvMC); } /* Pass Control to the X server to destroy the drm_context_t */ _xvmc_destroy_context(display, context); i810_free_privContext(pI810XvMC); context->privData = NULL; return Success; } /*************************************************************************** // Function: XvMCCreateSurface ***************************************************************************/ _X_EXPORT Status XvMCCreateSurface( Display *display, XvMCContext *context, XvMCSurface *surface) { i810XvMCContext *pI810XvMC; i810XvMCSurface *pI810Surface; int priv_count; uint *priv_data; Status ret; if((surface == NULL) || (context == NULL) || (display == NULL)){ return BadValue; } pI810XvMC = (i810XvMCContext *)context->privData; if(pI810XvMC == NULL) { return (error_base + XvMCBadContext); } surface->privData = (i810XvMCSurface *)malloc(sizeof(i810XvMCSurface)); if(!surface->privData) { return BadAlloc; } pI810Surface = (i810XvMCSurface *)surface->privData; /* Initialize private values */ pI810Surface->privContext = pI810XvMC; pI810Surface->last_render = 0; pI810Surface->last_flip = 0; pI810Surface->second_field = 0; if((ret = _xvmc_create_surface(display, context, surface, &priv_count, &priv_data))) { free(pI810Surface); printf("Unable to create XvMCSurface.\n"); return ret; } /* _xvmc_create_subpicture returns 2 uints with the offset into the DRM map for the Y surface and UV surface. */ if(priv_count != 2) { printf("_xvmc_create_surface() return incorrect data size.\n"); printf("Expected 2 got %d\n",priv_count); free(priv_data); free(pI810Surface); return BadAlloc; } /* Data == Client Address, offset == Physical address offset */ pI810Surface->data = pI810XvMC->surfaces.address; pI810Surface->offset = pI810XvMC->surfaces.offset; /* i810's MC Engine needs surfaces of 2^x (x= 9,10,11,12) pitch and the Tiler need 512k aligned surfaces, basically we are stuck with fixed memory with pitch 1024 for Y data. UV = 512. */ pI810Surface->pitch = 10; if((surface->surface_type_id == FOURCC_UYVY) || (surface->surface_type_id == FOURCC_YUY2)) { /* This is not implemented server side. */ pI810Surface->pitch++; } /* offsets[0,1,2] == Offsets from either data or offset for the Y U and V surfaces. */ pI810Surface->offsets[0] = priv_data[0]; if(((unsigned long)pI810Surface->data + pI810Surface->offsets[0]) & 4095) { printf("XvMCCreateSurface: Surface offset 0 is not 4096 aligned\n"); } if((surface->surface_type_id == FOURCC_UYVY) || (surface->surface_type_id == FOURCC_YUY2)) { /* Packed surface, not fully implemented */ pI810Surface->offsets[1] = 0; pI810Surface->offsets[2] = 0; } else { /* Planar surface */ pI810Surface->offsets[1] = priv_data[1]; if(((unsigned long)pI810Surface->data + pI810Surface->offsets[1]) & 2047) { printf("XvMCCreateSurface: Surface offset 1 is not 2048 aligned\n"); } pI810Surface->offsets[2] = ((unsigned long)pI810Surface->offsets[1] + (1<<(pI810Surface->pitch - 1)) * 288); if(((unsigned long)pI810Surface->data + pI810Surface->offsets[2]) & 2047) { printf("XvMCCreateSurface: Surface offset 2 is not 2048 aligned\n"); } } /* Free data returned from xvmc_create_surface */ free(priv_data); /* Clear the surface to 0 */ memset((void *)((unsigned long)pI810Surface->data + (unsigned long)pI810Surface->offsets[0]), 0, ((1<pitch) * surface->height)); switch(surface->surface_type_id) { case FOURCC_YV12: case FOURCC_I420: /* Destination buffer info command */ pI810Surface->dbi1y = ((((unsigned int)pI810Surface->offset + pI810Surface->offsets[0]) & ~0xfc000fff) | (pI810Surface->pitch - 9)); pI810Surface->dbi1u = ((((unsigned int)pI810Surface->offset + pI810Surface->offsets[1]) & ~0xfc000fff) | (pI810Surface->pitch - 10)); pI810Surface->dbi1v = ((((unsigned int)pI810Surface->offset + pI810Surface->offsets[2]) & ~0xfc000fff) | (pI810Surface->pitch - 10)); /* Destination buffer variables command */ pI810Surface->dbv1 = (0x8<<20) | (0x8<<16); /* Map info command */ pI810Surface->mi1y = (0x1<<24) | (1<<9) | (pI810Surface->pitch - 3); pI810Surface->mi1u = (0x1<<24) | (1<<9) | (pI810Surface->pitch - 4); pI810Surface->mi1v = (0x1<<24) | (1<<9) | (pI810Surface->pitch - 4); pI810Surface->mi2y = (((unsigned int)surface->height - 1)<<16) | ((unsigned int)surface->width - 1); pI810Surface->mi2u = (((unsigned int)surface->height - 1)<<15) | (((unsigned int)surface->width - 1)>>1); pI810Surface->mi2v = pI810Surface->mi2u; pI810Surface->mi3y = ((unsigned int)pI810Surface->offset + pI810Surface->offsets[0]) & ~0x0000000f; pI810Surface->mi3u = ((unsigned int)pI810Surface->offset + pI810Surface->offsets[1]) & ~0x0000000f; pI810Surface->mi3v = ((unsigned int)pI810Surface->offset + pI810Surface->offsets[2]) & ~0x0000000f; break; case FOURCC_UYVY: case FOURCC_YUY2: default: /* Destination buffer info command */ pI810Surface->dbi1y = ((((unsigned int)pI810Surface->offset + pI810Surface->offsets[0]) & ~0xfc000fff) | (pI810Surface->pitch - 9)); /* Destination buffer variables command */ if(surface->surface_type_id == FOURCC_YUY2) { pI810Surface->dbv1 = 0x5<<8; pI810Surface->mi1y = 0x5<<24 | pI810Surface->pitch | 0x1<<21; } else { pI810Surface->dbv1 = 0x4<<8; pI810Surface->mi1y = 0x5<<24 | (pI810Surface->pitch - 3); } pI810Surface->mi2y = (((unsigned int)surface->width - 1)<<16) | ((unsigned int)surface->height - 1); pI810Surface->mi3y = ((unsigned int)pI810Surface->offset + pI810Surface->offsets[0]) & ~0xfc000fff; break; } pI810XvMC->ref++; return Success; } /*************************************************************************** // Function: XvMCDestroySurface ***************************************************************************/ _X_EXPORT Status XvMCDestroySurface(Display *display, XvMCSurface *surface) { i810XvMCSurface *pI810Surface; i810XvMCContext *pI810XvMC; if((display == NULL) || (surface == NULL)) { return BadValue; } if(surface->privData == NULL) { return (error_base + XvMCBadSurface); } pI810Surface = (i810XvMCSurface *)surface->privData; if(pI810Surface->last_flip) { XvMCSyncSurface(display,surface); } pI810XvMC = (i810XvMCContext *)pI810Surface->privContext; _xvmc_destroy_surface(display,surface); i810_free_privContext(pI810XvMC); free(pI810Surface); surface->privData = NULL; return Success; } /*************************************************************************** // Function: XvMCCreateBlocks ***************************************************************************/ _X_EXPORT Status XvMCCreateBlocks(Display *display, XvMCContext *context, unsigned int num_blocks, XvMCBlockArray *block) { if((display == NULL) || (context == NULL) || (num_blocks == 0)) { return BadValue; } block->blocks = (short *)malloc(num_blocks<<6 * sizeof(short)); if(block->blocks == NULL) { return BadAlloc; } block->num_blocks = num_blocks; block->context_id = context->context_id; block->privData = NULL; return Success; } /*************************************************************************** // Function: XvMCDestroyBlocks ***************************************************************************/ _X_EXPORT Status XvMCDestroyBlocks(Display *display, XvMCBlockArray *block) { if(display == NULL) { return BadValue; } free(block->blocks); block->num_blocks = 0; block->context_id = 0; block->privData = NULL; return Success; } /*************************************************************************** // Function: XvMCCreateMacroBlocks ***************************************************************************/ _X_EXPORT Status XvMCCreateMacroBlocks(Display *display, XvMCContext *context, unsigned int num_blocks, XvMCMacroBlockArray *blocks) { if((display == NULL) || (context == NULL) || (blocks == NULL) || (num_blocks == 0)) { return BadValue; } memset(blocks,0,sizeof(XvMCMacroBlockArray)); blocks->context_id = context->context_id; blocks->privData = NULL; blocks->macro_blocks = (XvMCMacroBlock *) malloc(num_blocks * sizeof(XvMCMacroBlock)); if(blocks->macro_blocks == NULL) { return BadAlloc; } blocks->num_blocks = num_blocks; return Success; } /*************************************************************************** // Function: XvMCDestroyMacroBlocks ***************************************************************************/ _X_EXPORT Status XvMCDestroyMacroBlocks(Display *display, XvMCMacroBlockArray *block) { if((display == NULL) || (block == NULL)) { return BadValue; } if(block->macro_blocks) { free(block->macro_blocks); } block->context_id = 0; block->num_blocks = 0; block->privData = NULL; return Success; } /*************************************************************************** // Function: dp (Debug Print) // Description: This function prints out in hex i * uint32_t at the address // supplied. This enables you to print out the dma buffers from // within the debugger even though they are not in your address space. ***************************************************************************/ void dp(unsigned int *address, unsigned int i) { int j; printf("DebugPrint:\n"); for(j=0; jaddress; *data++ = CMD_FLUSH; *data++ = BOOLEAN_ENA_2; *data++ = CMD_FLUSH; *data++ = DEST_BUFFER_INFO; *data++ = privTarget->dbi1y; *data++ = DEST_BUFFER_VAR; *data++ = privTarget->dbv1; /* Past Surface */ *data++ = CMD_MAP_INFO; *data++ = privPast->mi1y; *data++ = privPast->mi2y; *data++ = privPast->mi3y; /* Future Surface */ *data++ = CMD_MAP_INFO; *data++ = privFuture->mi1y | 0x1<<28; *data++ = privFuture->mi2y; *data++ = privFuture->mi3y; mc.idx = pDMA->idx; mc.used = (unsigned long)data - (unsigned long)pDMA->address; mc.last_render = ++pI810XvMC->last_render; privTarget->last_render = pI810XvMC->last_render; I810_MC(pI810XvMC,mc); } static __inline__ void renderError(void) { printf("Invalid Macroblock Parameters found.\n"); return; } /*************************************************************************** // Function: renderIntrainFrame // Description: inline function that sets hardware parameters for an Intra // encoded macroblock in a Frame picture. ***************************************************************************/ static __inline__ void renderIntrainFrame(uint **datay,uint **datau, uint **datav, XvMCMacroBlock *mb, short *block_ptr) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; /* Y Blocks */ *dy++ = GFXBLOCK + 68; *dy++ = (1<<30) | (3<<28) | (0xf<<24); *dy++ = ((uint)mb->x<<20) | ((uint)mb->y<<4); *dy++ = (16<<16) | 16; *dy++ = 0; *dy++ = 0; PACK_INTRA_DATA(dy,block_ptr,256); dy += 64; block_ptr += 256; /* End Y Blocks */ /* U Block */ *du++ = GFXBLOCK + 20; *du++ = (2<<30) | (1<<28) | (1<<23); *du++ = (((uint)mb->x)<<19) | (((uint)mb->y)<<3); *du++ = (8<<16) | 8; *du++ = 0; *du++ = 0; PACK_INTRA_DATA(du,block_ptr,64); du += 16; block_ptr += 64; /* V Block */ *dv++ = GFXBLOCK + 20; *dv++ = (3<<30) | (1<<28) | (1<<22); *dv++ = (((uint)mb->x)<<19) | (((uint)mb->y)<<3); *dv++ = (8<<16) | 8; *dv++ = 0; *dv++ = 0; PACK_INTRA_DATA(dv,block_ptr,64); dv += 16; block_ptr += 64; *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: renderIntrainFrameDCT1 // Description: inline function that sets hardware parameters for an Intra // encoded macroblock in a Frame picture with DCT type 1. ***************************************************************************/ static __inline__ void renderIntrainFrameDCT1(uint **datay,uint **datau, uint **datav,XvMCMacroBlock *mb, short *block_ptr,uint flags) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; /* Y Blocks */ *dy++ = GFXBLOCK + 36; *dy++ = (1<<30) | (2<<28) | (0x3<<26) | (0x2<<6); *dy++ = ((uint)mb->x<<20) | ((uint)mb->y<<3); *dy++ = (8<<16) | 16; *dy++ = 0; *dy++ = 0; PACK_INTRA_DATA(dy,block_ptr,128); dy += 32; block_ptr += 128; /* Second Y block */ *dy++ = GFXBLOCK + 36; *dy++ = (1<<30) | (2<<28) | (0x3<<26) | (0x3<<6); *dy++ = ((uint)mb->x<<20) | ((uint)mb->y<<3); *dy++ = (8<<16) | 16; *dy++ = 0; *dy++ = 0; PACK_INTRA_DATA(dy,block_ptr,128); dy += 32; block_ptr += 128; /* End Y Blocks */ /* U Block */ *du++ = GFXBLOCK + 20; *du++ = (2<<30) | (1<<28) | (1<<23); *du++ = (((uint)mb->x)<<19) | (((uint)mb->y)<<3); *du++ = (8<<16) | 8; *du++ = 0; *du++ = 0; PACK_INTRA_DATA(du,block_ptr,64); du += 16; block_ptr += 64; /* V Block */ *dv++ = GFXBLOCK + 20; *dv++ = (3<<30) | (1<<28) | (1<<22); *dv++ = (((uint)mb->x)<<19) | (((uint)mb->y)<<3); *dv++ = (8<<16) | 8; *dv++ = 0; *dv++ = 0; PACK_INTRA_DATA(dv,block_ptr,64); dv += 16; block_ptr += 64; *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: renderIntrainField // Description: inline function that sets hardware parameters for an Intra // encoded macroblock in Field pictures. ***************************************************************************/ static __inline__ void renderIntrainField(uint **datay,uint **datau, uint **datav, XvMCMacroBlock *mb,short *block_ptr, uint ps) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; uint xy = ((uint)mb->x<<20) | ((uint)mb->y<<4); uint dw1 = drps_table[~ps & 0x1]; /* Y Blocks */ *dy++ = GFXBLOCK + 68; *dy++ = (1<<30) | (3<<28) | (0xf<<24) | dw1; *dy++ = xy; *dy++ = (16<<16) | 16; *dy++ = 0; *dy++ = 0; PACK_INTRA_DATA(dy,block_ptr,256); dy += 64; block_ptr += 256; /* End Y Blocks */ xy >>= 1; /* U Block */ *du++ = GFXBLOCK + 20; *du++ = (2<<30) | (1<<28) | (1<<23) | dw1; *du++ = xy; *du++ = (8<<16) | 8; *du++ = 0; *du++ = 0; PACK_INTRA_DATA(du,block_ptr,64); du += 16; block_ptr += 64; /* V Block */ *dv++ = GFXBLOCK + 20; *dv++ = (3<<30) | (1<<28) | (1<<22) | dw1; *dv++ = xy; *dv++ = (8<<16) | 8; *dv++ = 0; *dv++ = 0; PACK_INTRA_DATA(dv,block_ptr,64); dv += 16; block_ptr += 64; *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: renderFieldinField // Description: inline function that sets hardware parameters for a Field // encoded macroblock in a Field Picture. ***************************************************************************/ static __inline__ void renderFieldinField(uint **datay,uint **datau, uint **datav, XvMCMacroBlock *mb,short *block_ptr, uint ps, uint flags) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; /* Motion Vectors */ short fmv[2]; short bmv[2]; /* gfxblock dword 1 */ uint dw1; uint parity = ~ps & XVMC_TOP_FIELD; uint ysize = y_frame_bytes[mb->coded_block_pattern]; uint usize = u_frame_bytes[mb->coded_block_pattern]; uint vsize = v_frame_bytes[mb->coded_block_pattern]; uint xy = ((uint)mb->x<<20) | ((uint)mb->y<<4); /* i810 Specific flag used to identify the second field in a P frame */ if(flags & 0x80000000) { /* P Frame */ if((mb->motion_vertical_field_select & XVMC_SELECT_FIRST_FORWARD) == parity) { /* Same parity, use reference field (map0) */ dw1 = 1<<12 | ((0x2 + parity)<<6) | ((0x2 + parity)<<3) | (((uint)mb->coded_block_pattern)<<22); fmv[0] = mb->PMV[0][0][1]; fmv[1] = mb->PMV[0][0][0]; bmv[0] = 0; bmv[1] = 0; } else { /* Opposite parity, set up as if it were backward motion and use map1. */ dw1 = 2<<12 | ((0x2 + parity)<<6) | (0x3 - parity) | (((uint)mb->coded_block_pattern)<<22); bmv[0] = mb->PMV[0][0][1]; bmv[1] = mb->PMV[0][0][0]; fmv[0] = 0; fmv[1] = 0; } } else { dw1 = type_table[mb->macroblock_type & 0xf] | drps_table[~ps & 0x1] | mvfs_table[mb->motion_vertical_field_select & 3] | (((uint)mb->coded_block_pattern)<<22); fmv[0] = mb->PMV[0][0][1]; fmv[1] = mb->PMV[0][0][0]; bmv[0] = mb->PMV[0][1][1]; bmv[1] = mb->PMV[0][1][0]; } /* Y Block */ *dy++ = GFXBLOCK + 4 + (ysize>>2); *dy++ = (1<<30) | (3<<28) | dw1; *dy++ = xy; *dy++ = (16<<16) | 16; *dy++ = *(uint *)fmv; *dy++ = *(uint *)bmv; PACK_CORR_DATA(dy,block_ptr,ysize); block_ptr = (short *)((unsigned long)block_ptr + ysize); /* End Y Blocks */ fmv[0] /= 2; fmv[1] /= 2; bmv[0] /= 2; bmv[1] /= 2; xy >>= 1; /* U Block */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1; *du++ = xy; *du++ = (8<<16) | 8; *du++ = *(uint *)fmv; *du++ = *(uint *)bmv; PACK_CORR_DATA(du,block_ptr,usize); block_ptr = (short *)((unsigned long)block_ptr + usize); /* V Block */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1; *dv++ = xy; *dv++ = (8<<16) | 8; *dv++ = *(uint *)fmv; *dv++ = *(uint *)bmv; PACK_CORR_DATA(dv,block_ptr,vsize); block_ptr = (short *)((unsigned long)block_ptr + vsize); *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: render16x8inField // Description: inline function that sets hardware parameters for a 16x8 // encoded macroblock in a field picture. ***************************************************************************/ static __inline__ void render16x8inField(uint **datay,uint **datau, uint **datav, XvMCMacroBlock *mb,short *block_ptr, uint ps, uint flags) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; /* Motion Vectors */ short fmv[4]; short bmv[4]; /* gfxblock dword 1 */ uint dw1[2]; uint y1size = y_first_field_bytes[mb->coded_block_pattern]; uint y2size = y_second_field_bytes[mb->coded_block_pattern]; uint usize = u_field_bytes[mb->coded_block_pattern]; uint vsize = v_field_bytes[mb->coded_block_pattern]; uint parity = ~ps & XVMC_TOP_FIELD; uint xy = ((uint)mb->x<<20) | ((uint)mb->y<<4); /* i810 Specific flag used to identify the second field in a P frame */ if(flags & 0x80000000) { /* P Frame */ if((mb->motion_vertical_field_select & XVMC_SELECT_FIRST_FORWARD) == parity) { /* Same parity, use reference field (map0) */ dw1[0] = 1<<12 | ((0x2 + parity)<<6) | ((0x2 + parity)<<3) | (((uint)mb->coded_block_pattern)<<22); fmv[0] = mb->PMV[0][0][1]; fmv[1] = mb->PMV[0][0][0]; bmv[0] = 0; bmv[1] = 0; } else { /* Opposite parity, set up as if it were backward motion and use map1. */ dw1[0] = 2<<12 | ((0x2 + parity)<<6) | (0x3 - parity) | (((uint)mb->coded_block_pattern)<<22); bmv[0] = mb->PMV[0][0][1]; bmv[1] = mb->PMV[0][0][0]; fmv[0] = 0; fmv[1] = 0; } if((mb->motion_vertical_field_select & XVMC_SELECT_SECOND_FORWARD) == (parity<<2)) { /* Same parity, use reference field (map0) */ dw1[1] = 1<<12 | ((0x2 + parity)<<6) | ((0x2 + parity)<<3) | ((((uint)mb->coded_block_pattern<<22) & (0x3<<22)) | (((uint)mb->coded_block_pattern<<24) & (0x3<<26))); fmv[2] = mb->PMV[1][0][1]; fmv[3] = mb->PMV[1][0][0]; bmv[2] = 0; bmv[3] = 0; } else { /* Opposite parity, set up as if it were backward motion and use map1. */ dw1[1] = 2<<12 | ((0x2 + parity)<<6) | (0x3 - parity) | ((((uint)mb->coded_block_pattern<<22) & (0x3<<22)) | (((uint)mb->coded_block_pattern<<24) & (0x3<<26))); bmv[2] = mb->PMV[1][0][1]; bmv[3] = mb->PMV[1][0][0]; fmv[2] = 0; fmv[3] = 0; } } else { dw1[0] = type_table[mb->macroblock_type & 0xf] | drps_table[~ps & 0x1] | mvfs_table[mb->motion_vertical_field_select & 3] | (((uint)mb->coded_block_pattern)<<22); dw1[1] = type_table[mb->macroblock_type & 0xf] | drps_table[~ps & 0x1] | mvfs_table[(mb->motion_vertical_field_select>>2) & 0x3] | ((((uint)mb->coded_block_pattern<<22) & (0x3<<22)) | (((uint)mb->coded_block_pattern<<24) & (0x3<<26))); fmv[0] = mb->PMV[0][0][1]; fmv[1] = mb->PMV[0][0][0]; fmv[2] = mb->PMV[1][0][1]; fmv[3] = mb->PMV[1][0][0]; bmv[0] = mb->PMV[0][1][1]; bmv[1] = mb->PMV[0][1][0]; bmv[2] = mb->PMV[1][1][1]; bmv[3] = mb->PMV[1][1][0]; } /* First Y Block */ *dy++ = GFXBLOCK + 4 + (y1size>>2); *dy++ = (1<<30) | (2<<28) | dw1[0]; *dy++ = xy; *dy++ = (8<<16) | 16; *dy++ = *(uint *)fmv; *dy++ = *(uint *)bmv; PACK_CORR_DATA(dy,block_ptr,y1size); block_ptr = (short *)((unsigned long)block_ptr + y1size); /* Second Y Block */ *dy++ = GFXBLOCK + 4 + (y2size>>2); *dy++ = (1<<30) | (2<<28) | dw1[1]; *dy++ = (xy + 8); *dy++ = (8<<16) | 16; *dy++ = *(uint *)&fmv[2]; *dy++ = *(uint *)&bmv[2]; PACK_CORR_DATA(dy,block_ptr,y2size); block_ptr = (short *)((unsigned long)block_ptr + y2size); /* End Y Blocks */ fmv[0] /= 2; fmv[1] /= 2; fmv[2] /= 2; fmv[3] /= 2; bmv[0] /= 2; bmv[1] /= 2; bmv[2] /= 2; bmv[3] /= 2; xy >>= 1; /* U Blocks */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1[0]; *du++ = xy; *du++ = (4<<16) | 8; *du++ = *(uint *)fmv; *du++ = *(uint *)bmv; PACK_CORR_DATA(du,block_ptr,usize); block_ptr = (short *)((unsigned long)block_ptr + usize); /* Second U block */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1[1]; *du++ = (xy + 4); *du++ = (4<<16) | 8; *du++ = *(uint *)&fmv[2]; *du++ = *(uint *)&bmv[2]; PACK_CORR_DATA(du,block_ptr,usize); block_ptr = (short *)((unsigned long)block_ptr + usize); /* End U Blocks */ /* V Blocks */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1[0]; *dv++ = xy; *dv++ = (4<<16) | 8; *dv++ = *(uint *)fmv; *dv++ = *(uint *)bmv; PACK_CORR_DATA(dv,block_ptr,vsize); block_ptr = (short *)((unsigned long)block_ptr + vsize); /* Second V Block */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1[1]; *dv++ = (xy + 4); *dv++ = (4<<16) | 8; *dv++ = *(uint *)&fmv[2]; *dv++ = *(uint *)&bmv[2]; PACK_CORR_DATA(dv,block_ptr,vsize); block_ptr = (short *)((unsigned long)block_ptr + vsize); /* End V Blocks */ *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: renderDualPrimeinField // Description: inline function that sets hardware parameters for a Dual // prime encoded macroblock in a field picture. ***************************************************************************/ static __inline__ void renderDualPrimeinField(uint **datay,uint **datau, uint **datav,XvMCMacroBlock *mb, short *block_ptr,uint ps, uint flags) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; /* Motion Vectors */ short fmv[2]; short bmv[2]; /* gfxblock dword 1 */ uint dw1; uint ysize = y_frame_bytes[mb->coded_block_pattern]; uint usize = u_frame_bytes[mb->coded_block_pattern]; uint vsize = v_frame_bytes[mb->coded_block_pattern]; uint xy = ((uint)mb->x<<20) | ((uint)mb->y<<4); if(ps & XVMC_TOP_FIELD) { dw1 = (mb->coded_block_pattern<<22) | 3<<12 | 2<<6 | 2<<3 | 3; } else { dw1 = (mb->coded_block_pattern<<22) | 3<<12 | 3<<6 | 3<<3 | 2; } fmv[0] = mb->PMV[0][0][1]; fmv[1] = mb->PMV[0][0][0]; bmv[0] = mb->PMV[0][1][1]; bmv[1] = mb->PMV[0][1][0]; /* Y Block */ *dy++ = GFXBLOCK + 4 + (ysize>>2); *dy++ = (1<<30) | (3<<28) | dw1; *dy++ = xy; *dy++ = (16<<16) | 16; *dy++ = *(uint *)fmv; *dy++ = *(uint *)bmv; PACK_CORR_DATA(dy,block_ptr,ysize); block_ptr = (short *)((unsigned long)block_ptr + ysize); /* End Y Blocks */ fmv[0] /= 2; fmv[1] /= 2; bmv[0] /= 2; bmv[1] /= 2; xy >>= 1; /* U Block */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1; *du++ = xy; *du++ = (8<<16) | 8; *du++ = *(uint *)fmv; *du++ = *(uint *)bmv; PACK_CORR_DATA(du,block_ptr,usize); block_ptr = (short *)((unsigned long)block_ptr + usize); /* V Block */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1; *dv++ = xy; *dv++ = (8<<16) | 8; *dv++ = *(uint *)fmv; *dv++ = *(uint *)bmv; PACK_CORR_DATA(dv,block_ptr,vsize); block_ptr = (short *)((unsigned long)block_ptr + vsize); *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: renderFieldinFrame // Description: inline function that sets hardware parameters for a Field // encoded macroblock in a frame picture. ***************************************************************************/ typedef union { short s[4]; uint u[2]; } su_t; static __inline__ void renderFieldinFrame(uint **datay,uint **datau, uint **datav, XvMCMacroBlock *mb,short *block_ptr, uint flags) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; /* Motion Vectors */ su_t fmv; su_t bmv; /* gfxblock dword 1 */ uint dw1[2]; uint y1size = y_first_field_bytes[mb->coded_block_pattern]; uint y2size = y_second_field_bytes[mb->coded_block_pattern]; uint usize = u_field_bytes[mb->coded_block_pattern]; uint vsize = v_field_bytes[mb->coded_block_pattern]; uint xy = ((uint)mb->x<<20) | ((uint)mb->y<<3); dw1[0] = type_table[mb->macroblock_type & 0xf] | (0x2<<6) | mvfs_table[mb->motion_vertical_field_select & 3] | (((uint)mb->coded_block_pattern)<<22); dw1[1] = type_table[mb->macroblock_type & 0xf] | (0x3<<6) | mvfs_table[mb->motion_vertical_field_select>>2] | (((mb->coded_block_pattern & 0x3) | ((mb->coded_block_pattern & 0xc)<<2))<<22); fmv.s[0] = mb->PMV[0][0][1]/2; fmv.s[1] = mb->PMV[0][0][0]; fmv.s[2] = mb->PMV[1][0][1]/2; fmv.s[3] = mb->PMV[1][0][0]; bmv.s[0] = mb->PMV[0][1][1]/2; bmv.s[1] = mb->PMV[0][1][0]; bmv.s[2] = mb->PMV[1][1][1]/2; bmv.s[3] = mb->PMV[1][1][0]; /* First Y Block */ *dy++ = GFXBLOCK + 4 + (y1size>>2); *dy++ = (1<<30) | (2<<28) | dw1[0]; *dy++ = xy; *dy++ = (8<<16) | 16; *dy++ = fmv.u[0]; *dy++ = bmv.u[0]; PACK_CORR_DATA(dy,block_ptr,y1size); block_ptr = (short *)((unsigned long)block_ptr + y1size); /* Second Y Block */ *dy++ = GFXBLOCK + 4 + (y2size>>2); *dy++ = (1<<30) | (2<<28) | dw1[1]; *dy++ = xy; *dy++ = (8<<16) | 16; *dy++ = fmv.u[1]; *dy++ = bmv.u[1]; PACK_CORR_DATA(dy,block_ptr,y2size); block_ptr = (short *)((unsigned long)block_ptr + y2size); /* End Y Blocks */ fmv.s[0] /= 2; fmv.s[1] /= 2; fmv.s[2] /= 2; fmv.s[3] /= 2; bmv.s[0] /= 2; bmv.s[1] /= 2; bmv.s[2] /= 2; bmv.s[3] /= 2; xy >>= 1; /* U Blocks */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1[0]; *du++ = xy; *du++ = (4<<16) | 8; *du++ = fmv.u[0]; *du++ = bmv.u[0]; if(usize) { PACK_CORR_DATA_SHORT(du,block_ptr); } /* Second U Block */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1[1]; *du++ = xy; *du++ = (4<<16) | 8; *du++ = fmv.u[1]; *du++ = bmv.u[1]; if(usize) { block_ptr = (short *)((unsigned long)block_ptr + 16); PACK_CORR_DATA_SHORT(du,block_ptr); block_ptr = (short *)((unsigned long)block_ptr + 112); } /* End U Blocks */ /* V Blocks */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1[0]; *dv++ = xy; *dv++ = (4<<16) | 8; *dv++ = fmv.u[0]; *dv++ = bmv.u[0]; if(vsize) { PACK_CORR_DATA_SHORT(dv,block_ptr); } /* Second V Block */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1[1]; *dv++ = xy; *dv++ = (4<<16) | 8; *dv++ = fmv.u[1]; *dv++ = bmv.u[1]; if(vsize) { block_ptr = (short *)((unsigned long)block_ptr + 16); PACK_CORR_DATA_SHORT(dv,block_ptr); block_ptr = (short *)((unsigned long)block_ptr + 112); } /* End V Blocks */ *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: renderFieldinFrameDCT0 // Description: inline function that sets hardware parameters for a Field // encoded macroblock in a frame picture with DCT0. ***************************************************************************/ static __inline__ void renderFieldinFrameDCT0(uint **datay,uint **datau, uint **datav,XvMCMacroBlock *mb, short *block_ptr,uint flags) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; /* Motion Vectors */ su_t fmv; su_t bmv; /* CBP */ uint cbp = (uint)mb->coded_block_pattern; /* gfxblock dword 1 */ uint dw1[2]; short * top_left_b = NULL; short * top_right_b = NULL; short * bottom_left_b = NULL; short * bottom_right_b = NULL; unsigned int ysize = y_dct0_field_bytes[cbp]; unsigned int usize = u_field_bytes[cbp]; unsigned int vsize = v_field_bytes[cbp]; uint xy = ((uint)mb->x<<20) | ((uint)mb->y<<3); dw1[0] = type_table[mb->macroblock_type & 0xf] | (0x2<<6) | mvfs_table[mb->motion_vertical_field_select & 3] | ((cbp | ((cbp<<2) & 0x30))<<22); dw1[1] = type_table[mb->macroblock_type & 0xf] | (0x3<<6) | mvfs_table[mb->motion_vertical_field_select>>2] | ((cbp | ((cbp<<2) & 0x30))<<22); fmv.s[0] = mb->PMV[0][0][1]/2; fmv.s[1] = mb->PMV[0][0][0]; fmv.s[2] = mb->PMV[1][0][1]/2; fmv.s[3] = mb->PMV[1][0][0]; bmv.s[0] = mb->PMV[0][1][1]/2; bmv.s[1] = mb->PMV[0][1][0]; bmv.s[2] = mb->PMV[1][1][1]/2; bmv.s[3] = mb->PMV[1][1][0]; /* The i810 cannot use DCT0 directly with field motion, we have to interlace the data for it. We use a zero block when the CBP has one half of the to-be-interlaced data but not the other half. */ top_left_b = &empty_block[0]; if(cbp & 0x20) { top_left_b = block_ptr; block_ptr += 64; } top_right_b = &empty_block[0]; if(cbp & 0x10) { top_right_b = block_ptr; block_ptr += 64; } bottom_left_b = &empty_block[0]; if(cbp & 0x8) { bottom_left_b = block_ptr; block_ptr += 64; } bottom_right_b = &empty_block[0]; if(cbp & 0x4) { bottom_right_b = block_ptr; block_ptr += 64; } /* First Y Block */ *dy++ = GFXBLOCK + 4 + (ysize>>2); *dy++ = (1<<30) | (2<<28) | dw1[0]; *dy++ = xy; *dy++ = (8<<16) | 16; *dy++ = fmv.u[0]; *dy++ = bmv.u[0]; if(dw1[0] & (1<<27)) { PACK_CORR_DATA_0to1(dy,top_left_b,bottom_left_b); } if(dw1[0] & (1<<26)) { PACK_CORR_DATA_0to1(dy,top_right_b,bottom_right_b); } /* Second Y Block */ *dy++ = GFXBLOCK + 4 + (ysize>>2); *dy++ = (1<<30) | (2<<28) | dw1[1]; *dy++ = xy; *dy++ = (8<<16) | 16; *dy++ = fmv.u[1]; *dy++ = bmv.u[1]; if(dw1[1] & (1<<27)) { top_left_b = (short *)((unsigned long)top_left_b + 16); bottom_left_b = (short *)((unsigned long)bottom_left_b + 16); PACK_CORR_DATA_0to1(dy,top_left_b,bottom_left_b); } if(dw1[1] & (1<<26)) { top_right_b = (short *)((unsigned long)top_right_b + 16); bottom_right_b = (short *)((unsigned long)bottom_right_b + 16); PACK_CORR_DATA_0to1(dy,top_right_b,bottom_right_b); } /* End Y Blocks */ fmv.s[0] /= 2; fmv.s[1] /= 2; fmv.s[2] /= 2; fmv.s[3] /= 2; bmv.s[0] /= 2; bmv.s[1] /= 2; bmv.s[2] /= 2; bmv.s[3] /= 2; xy >>= 1; /* U Blocks */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1[0]; *du++ = xy; *du++ = (4<<16) | 8; *du++ = fmv.u[0]; *du++ = bmv.u[0]; if(usize) { PACK_CORR_DATA_SHORT(du,block_ptr); } /* Second U Block */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1[1]; *du++ = xy; *du++ = (4<<16) | 8; *du++ = fmv.u[1]; *du++ = bmv.u[1]; if(usize) { block_ptr = (short *)((unsigned long)block_ptr + 16); PACK_CORR_DATA_SHORT(du,block_ptr); block_ptr = (short *)((unsigned long)block_ptr + 112); } /* End U Blocks */ /* V Blocks */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1[0]; *dv++ = xy; *dv++ = (4<<16) | 8; *dv++ = fmv.u[0]; *dv++ = bmv.u[0]; if(vsize) { PACK_CORR_DATA_SHORT(dv,block_ptr); } /* Second V Block */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1[1]; *dv++ = xy; *dv++ = (4<<16) | 8; *dv++ = fmv.u[1]; *dv++ = bmv.u[1]; if(vsize) { block_ptr = (short *)((unsigned long)block_ptr + 16); PACK_CORR_DATA_SHORT(dv,block_ptr); block_ptr = (short *)((unsigned long)block_ptr + 112); } /* End V Blocks */ *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: renderFrameinFrame // Description: inline function that sets hardware parameters for a Frame // encoded macroblock in a frame picture. ***************************************************************************/ static __inline__ void renderFrameinFrame(uint **datay,uint **datau, uint **datav, XvMCMacroBlock *mb,short *block_ptr, uint flags) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; /* Motion Vectors */ su_t fmv; su_t bmv; /* gfxblock dword 1 */ uint dw1; unsigned int ysize = y_frame_bytes[mb->coded_block_pattern]; unsigned int usize = u_frame_bytes[mb->coded_block_pattern]; unsigned int vsize = v_frame_bytes[mb->coded_block_pattern]; uint xy = ((uint)mb->x<<20) | ((uint)mb->y<<4); dw1 = type_table[mb->macroblock_type & 0xf] | (((uint)mb->coded_block_pattern)<<22); fmv.s[0] = mb->PMV[0][0][1]; fmv.s[1] = mb->PMV[0][0][0]; bmv.s[0] = mb->PMV[0][1][1]; bmv.s[1] = mb->PMV[0][1][0]; /* Y Block */ *dy++ = GFXBLOCK + 4 + (ysize>>2); *dy++ = (1<<30) | (3<<28) | dw1; *dy++ = xy; *dy++ = (16<<16) | 16; *dy++ = fmv.u[0]; *dy++ = bmv.u[0]; PACK_CORR_DATA(dy,block_ptr,ysize); block_ptr = (short *)((unsigned long)block_ptr + ysize); /* End Y Blocks */ fmv.s[0] /= 2; fmv.s[1] /= 2; bmv.s[0] /= 2; bmv.s[1] /= 2; xy >>= 1; /* U Block */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1; *du++ = xy; *du++ = (8<<16) | 8; *du++ = fmv.u[0]; *du++ = bmv.u[0]; PACK_CORR_DATA(du,block_ptr,usize); block_ptr = (short *)((unsigned long)block_ptr + usize); /* End U Block */ /* V Block */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1; *dv++ = xy; *dv++ = (8<<16) | 8; *dv++ = fmv.u[0]; *dv++ = bmv.u[0]; PACK_CORR_DATA(dv,block_ptr,vsize); block_ptr = (short *)((unsigned long)block_ptr + vsize); /* End V Block */ *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: renderFrameinFrameDCT1 // Description: inline function that sets hardware parameters for a Frame // encoded macroblock in a frame picture with DCT type 1. ***************************************************************************/ static __inline__ void renderFrameinFrameDCT1(uint **datay,uint **datau, uint **datav,XvMCMacroBlock *mb, short *block_ptr,uint flags) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; /* Motion Vectors */ su_t fmv; su_t bmv; short * top_left_b = NULL; short * top_right_b = NULL; short * bottom_left_b = NULL; short * bottom_right_b = NULL; uint temp_bp = 0; uint ysize = y_dct1_frame_bytes[mb->coded_block_pattern]; uint usize = u_frame_bytes[mb->coded_block_pattern]; uint vsize = v_frame_bytes[mb->coded_block_pattern]; uint xy = ((uint)mb->x<<20) | ((uint)mb->y<<4); uint dw1 = type_table[mb->macroblock_type & 0xf] | (((uint)mb->coded_block_pattern)<<22); fmv.s[0] = mb->PMV[0][0][1]; fmv.s[1] = mb->PMV[0][0][0]; bmv.s[0] = mb->PMV[0][1][1]; bmv.s[1] = mb->PMV[0][1][0]; /* It is easiest to find out what blocks are in need of reading first rather than as we go. */ top_left_b = &empty_block[0]; if(dw1 & (1<<27)) { temp_bp |= (1<<25); top_left_b = block_ptr; block_ptr += 64; } top_right_b = &empty_block[0]; if(dw1 & (1<<26)) { temp_bp |= (1<<24); top_right_b = block_ptr; block_ptr += 64; } bottom_left_b = &empty_block[0]; if(dw1 & (1<<25)) { temp_bp |= (1<<27); bottom_left_b = block_ptr; block_ptr += 64; } bottom_right_b = &empty_block[0]; if(dw1 & (1<<24)) { temp_bp |= (1<<26); bottom_right_b = block_ptr; block_ptr += 64; } dw1 |= temp_bp; /* Y Block */ *dy++ = GFXBLOCK + 4 + (ysize>>2); *dy++ = (1<<30) | (3<<28) | dw1; *dy++ = xy; *dy++ = (16<<16) | 16; *dy++ = fmv.u[0]; *dy++ = bmv.u[0]; if(dw1 & (1<<27)) { PACK_CORR_DATA_1to0(dy,top_left_b,bottom_left_b); top_left_b = (short *)((unsigned long)top_left_b + 64); bottom_left_b = (short *)((unsigned long)bottom_left_b + 64); } if(dw1 & (1<<26)) { PACK_CORR_DATA_1to0(dy,top_right_b,bottom_right_b); top_right_b = (short *)((unsigned long)top_right_b + 64); bottom_right_b = (short *)((unsigned long)bottom_right_b + 64); } if(dw1 & (1<<27)) { PACK_CORR_DATA_1to0(dy,top_left_b,bottom_left_b); } if(dw1 & (1<<26)) { PACK_CORR_DATA_1to0(dy,top_right_b,bottom_right_b); } /* End Y Block */ fmv.s[0] /= 2; fmv.s[1] /= 2; bmv.s[0] /= 2; bmv.s[1] /= 2; xy >>= 1; /* U Block */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1; *du++ = xy; *du++ = (8<<16) | 8; *du++ = fmv.u[0]; *du++ = bmv.u[0]; PACK_CORR_DATA(du,block_ptr,usize); block_ptr = (short *)((unsigned long)block_ptr + usize); /* V Block */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1; *dv++ = xy; *dv++ = (8<<16) | 8; *dv++ = fmv.u[0]; *dv++ = bmv.u[0]; PACK_CORR_DATA(dv,block_ptr,vsize); block_ptr = (short *)((unsigned long)block_ptr + vsize); *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: renderDualPrimeinFrame // Description: inline function that sets hardware parameters for a Dual // Prime encoded macroblock in a frame picture with dct 1. ***************************************************************************/ static __inline__ void renderDualPrimeinFrame(uint **datay,uint **datau, uint **datav,XvMCMacroBlock *mb, short *block_ptr,uint flags) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; /* Motion Vectors */ su_t fmv; su_t bmv; /* gfxblock dword 1 */ uint dw1[2]; uint y1size = y_first_field_bytes[mb->coded_block_pattern]; uint y2size = y_second_field_bytes[mb->coded_block_pattern]; uint usize = u_field_bytes[mb->coded_block_pattern]; uint vsize = v_field_bytes[mb->coded_block_pattern]; uint xy = ((uint)mb->x<<20) | ((uint)mb->y<<3); /* Past Surface (map 0) is used for same parity prediction, Future surface (map 1) is used for opposite. */ dw1[0] = (((uint)mb->coded_block_pattern)<<22) | 3<<12 | 2<<6 | 2<<3 | 3; dw1[1] = (((mb->coded_block_pattern & 0x3) | ((mb->coded_block_pattern & 0xc)<<2))<<22) | 3<<12 | 3<<6 | 3<<3 | 2; fmv.s[0] = mb->PMV[0][0][1]; fmv.s[1] = mb->PMV[0][0][0]; bmv.s[0] = mb->PMV[1][0][1]; bmv.s[1] = mb->PMV[1][0][0]; fmv.s[2] = mb->PMV[0][0][1]; fmv.s[3] = mb->PMV[0][0][0]; bmv.s[2] = mb->PMV[1][1][1]; bmv.s[3] = mb->PMV[1][1][0]; /* First Y Block */ *dy++ = GFXBLOCK + 4 + (y1size>>2); *dy++ = (1<<30) | (2<<28) | dw1[0]; *dy++ = xy; *dy++ = (8<<16) | 16; *dy++ = fmv.u[0]; *dy++ = bmv.u[0];; PACK_CORR_DATA(dy,block_ptr,y1size); block_ptr = (short *)((unsigned long)block_ptr + y1size); /* Second Y Block */ *dy++ = GFXBLOCK + 4 + (y2size>>2); *dy++ = (1<<30) | (2<<28) | dw1[1]; *dy++ = xy; *dy++ = (8<<16) | 16; *dy++ = fmv.u[1]; *dy++ = bmv.u[1]; PACK_CORR_DATA(dy,block_ptr,y2size); block_ptr = (short *)((unsigned long)block_ptr + y2size); fmv.s[0] /= 2; fmv.s[1] /= 2; bmv.s[0] /= 2; bmv.s[1] /= 2; fmv.s[2] /= 2; fmv.s[3] /= 2; bmv.s[2] /= 2; bmv.s[3] /= 2; xy >>= 1; /* U Blocks */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1[0]; *du++ = xy; *du++ = (4<<16) | 8; *du++ = fmv.u[0]; *du++ = bmv.u[0]; if(dw1[0] & (1<<23)) { PACK_CORR_DATA_SHORT(du,block_ptr); } /* Second U Block */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1[1]; *du++ = xy; *du++ = (4<<16) | 8; *du++ = fmv.u[1]; *du++ = bmv.u[1]; if(dw1[1] & (1<<23)) { block_ptr = (short *)((unsigned long)block_ptr + 16); PACK_CORR_DATA_SHORT(du,block_ptr); block_ptr = (short *)((unsigned long)block_ptr + 112); } /* End U Blocks */ /* V Blocks */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1[0]; *dv++ = xy; *dv++ = (4<<16) | 8; *dv++ = fmv.u[0]; *dv++ = bmv.u[0]; if(dw1[0] & (1<<22)) { PACK_CORR_DATA_SHORT(dv,block_ptr); } /* Second V Block */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1[1]; *dv++ = xy; *dv++ = (4<<16) | 8; *dv++ = fmv.u[1]; *dv++ = bmv.u[1]; if(dw1[1] & (1<<22)) { block_ptr = (short *)((unsigned long)block_ptr + 16); PACK_CORR_DATA_SHORT(dv,block_ptr); block_ptr = (short *)((unsigned long)block_ptr + 112); } /* End V Blocks */ *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: renderDualPrimeinFrameDCT0 // Description: inline function that sets hardware parameters for a Dual // Prime encoded macroblock in a frame picture with dct 0. ***************************************************************************/ static __inline__ void renderDualPrimeinFrameDCT0(uint **datay,uint **datau, uint **datav, XvMCMacroBlock *mb, short *block_ptr, uint flags) { register uint *dy = *datay; register uint *du = *datau; register uint *dv = *datav; /* Motion Vectors */ su_t fmv; su_t bmv; /* gfxblock dword 1 */ uint dw1[2]; short * top_left_b = NULL; short * top_right_b = NULL; short * bottom_left_b = NULL; short * bottom_right_b = NULL; uint cbp = (uint)mb->coded_block_pattern; uint ysize = y_dct0_field_bytes[cbp]; uint usize = u_field_bytes[cbp]; uint vsize = v_field_bytes[cbp]; uint xy = ((uint)mb->x<<20) | ((uint)mb->y<<3); /* Past Surface (map 0) is used for same parity prediction, Future surface (map 1) is used for opposite. */ dw1[0] = ((cbp | ((cbp<<2) & 0x30))<<22) | 3<<12 | 2<<6 | 2<<3 | 3; dw1[1] = ((cbp | ((cbp<<2) & 0x30))<<22) | 3<<12 | 3<<6 | 3<<3 | 2; fmv.s[0] = mb->PMV[0][0][1]; fmv.s[1] = mb->PMV[0][0][0]; bmv.s[0] = mb->PMV[1][0][1]; bmv.s[1] = mb->PMV[1][0][0]; fmv.s[2] = mb->PMV[0][0][1]; fmv.s[3] = mb->PMV[0][0][0]; bmv.s[2] = mb->PMV[1][1][1]; bmv.s[3] = mb->PMV[1][1][0]; /* The i810 cannot use DCT0 directly with field motion, we have to interlace the data for it. We use a zero block when the CBP has one half of the to-be-interlaced data but not the other half. */ top_left_b = &empty_block[0]; if(cbp & 0x20) { top_left_b = block_ptr; block_ptr += 64; } top_right_b = &empty_block[0]; if(cbp & 0x10) { top_right_b = block_ptr; block_ptr += 64; } bottom_left_b = &empty_block[0]; if(cbp & 0x8) { bottom_left_b = block_ptr; block_ptr += 64; } bottom_right_b = &empty_block[0]; if(cbp & 0x4) { bottom_right_b = block_ptr; block_ptr += 64; } /* First Y Block */ *dy++ = GFXBLOCK + 4 + (ysize>>2); *dy++ = (1<<30) | (2<<28) | dw1[0]; *dy++ = xy; *dy++ = (8<<16) | 16; *dy++ = fmv.u[0]; *dy++ = bmv.u[0]; if(cbp & 0x20) { PACK_CORR_DATA_0to1(dy,top_left_b,bottom_left_b); } if(cbp & 0x10) { PACK_CORR_DATA_0to1(dy,top_right_b,bottom_right_b); } /* Second Y Block */ *dy++ = GFXBLOCK + 4 + (ysize>>2); *dy++ = (1<<30) | (2<<28) | dw1[1]; *dy++ = xy; *dy++ = (8<<16) | 16; *dy++ = fmv.u[1]; *dy++ = bmv.u[1]; if(cbp & 0x20) { top_left_b = (short *)((unsigned long)top_left_b + 16); bottom_left_b = (short *)((unsigned long)bottom_left_b + 16); PACK_CORR_DATA_0to1(dy,top_left_b,bottom_left_b); } if(cbp & 0x10) { top_right_b = (short *)((unsigned long)top_right_b + 16); bottom_right_b = (short *)((unsigned long)bottom_right_b + 16); PACK_CORR_DATA_0to1(dy,top_right_b,bottom_right_b); } /* End Y Blocks */ fmv.s[0] /= 2; fmv.s[1] /= 2; bmv.s[0] /= 2; bmv.s[1] /= 2; fmv.s[2] /= 2; fmv.s[3] /= 2; bmv.s[2] /= 2; bmv.s[3] /= 2; xy >>= 1; /* U Blocks */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1[0]; *du++ = xy; *du++ = (4<<16) | 8; *du++ = fmv.u[0]; *du++ = bmv.u[0]; if(cbp & (1<<23)) { PACK_CORR_DATA_SHORT(du,block_ptr); } /* Second U Block */ *du++ = GFXBLOCK + 4 + (usize>>2); *du++ = (2<<30) | (1<<28) | dw1[1]; *du++ = xy; *du++ = (4<<16) | 8; *du++ = fmv.u[1]; *du++ = bmv.u[1]; if(cbp & (1<<23)) { block_ptr = (short *)((unsigned long)block_ptr + 16); PACK_CORR_DATA_SHORT(du,block_ptr); block_ptr = (short *)((unsigned long)block_ptr + 112); } /* End U Blocks */ /* V Blocks */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1[0]; *dv++ = xy; *dv++ = (4<<16) | 8; *dv++ = fmv.u[0]; *dv++ = bmv.u[0]; if(cbp & (1<<22)) { PACK_CORR_DATA_SHORT(dv,block_ptr); } /* Second V Block */ *dv++ = GFXBLOCK + 4 + (vsize>>2); *dv++ = (3<<30) | (1<<28) | dw1[1]; *dv++ = xy; *dv++ = (4<<16) | 8; *dv++ = fmv.u[1]; *dv++ = bmv.u[1]; if(cbp & (1<<22)) { block_ptr = (short *)((unsigned long)block_ptr + 16); PACK_CORR_DATA_SHORT(dv,block_ptr); block_ptr = (short *)((unsigned long)block_ptr + 112); } /* End V Blocks */ *datay = dy; *datau = du; *datav = dv; } /*************************************************************************** // Function: XvMCRenderSurface // Description: This function does the actual HWMC. Given a list of // macroblock structures it dispatched the hardware commands to execute // them. DMA buffer containing Y data are dispatched as they fill up // U and V DMA buffers are queued until all Y's are done. This minimizes // the context flipping and flushing required when switching between Y // U and V surfaces. ***************************************************************************/ #define UV_QUEUE 14 _X_EXPORT Status XvMCRenderSurface(Display *display, XvMCContext *context, unsigned int picture_structure, XvMCSurface *target_surface, XvMCSurface *past_surface, XvMCSurface *future_surface, unsigned int flags, unsigned int num_macroblocks, unsigned int first_macroblock, XvMCMacroBlockArray *macroblock_array, XvMCBlockArray *blocks) { /* Dma Data Structures */ drmBufPtr pDMAy = NULL,pDMAu[UV_QUEUE],pDMAv[UV_QUEUE]; int u_index = 0,v_index = 0; int dirty_context = 1; /* Block Pointer */ short *block_ptr; /* Current Macroblock Pointer */ XvMCMacroBlock *mb; drm_i810_mc_t mc; int i,j; i810XvMCSurface *privTarget; i810XvMCSurface *privFuture = NULL; i810XvMCSurface *privPast = NULL; i810XvMCContext *pI810XvMC; /* DMA Pointers set to NULL */ uint *datay = NULL; uint *datau = NULL; uint *datav = NULL; /* Check Parameters for validity */ if((target_surface == NULL) || (context == NULL) || (display == NULL)) { printf("Error, Invalid Target,Context, or DIsplay!\n"); return BadValue; } if(num_macroblocks == 0) {return Success;} if((macroblock_array == NULL) || (blocks == NULL)) {return BadValue;} if(context->privData == NULL) {return BadValue;} pI810XvMC = (i810XvMCContext *)context->privData; if(target_surface->privData == NULL) { printf("Error, Invalid Target Surface!\n"); return BadValue; } privTarget = (i810XvMCSurface *)target_surface->privData; if(macroblock_array->num_blocks < (num_macroblocks + first_macroblock)) { printf("Error, Too many macroblocks requested for MB array size.\n"); return BadValue; } /* Test For YV12 Surface */ if(context->surface_type_id != FOURCC_YV12) { printf("Error, HWMC only possible on YV12 Surfaces\n"); return BadValue; } /* P Frame Test */ if(past_surface == NULL) { /* Just to avoid some ifs later. */ privPast = privTarget; } else { if(past_surface->privData == NULL) { printf("Error, Invalid Past Surface!\n"); return BadValue; } privPast = (i810XvMCSurface *)past_surface->privData; } /* B Frame Test */ if(future_surface == NULL) { privFuture = privTarget; if(pI810XvMC->dual_prime) { privFuture = privPast; /* I810 Specific flag for marking when dual prime is in use. */ flags |= 0x40000000; } /* References are different for the Second Field Picture. The i810 needs to know if it is the second field picture in a P picture. We use a Private flag to mark this. */ if(flags & XVMC_SECOND_FIELD) { /* I810 Specific flag for marking second fields. */ flags |= 0x80000000; } } else { if((future_surface->privData == NULL) || (past_surface == NULL)) { printf("Error, Invalid Future Surface or No Past Surface!\n"); return BadValue; } privFuture = (i810XvMCSurface *)future_surface->privData; /* Undo Second Field flag since the second field in B frames is just like the first. */ flags &= ~0x80000000; } /* Lock For DMA */ I810_LOCK(pI810XvMC,0); for(i=first_macroblock; i<(num_macroblocks + first_macroblock); i++) { /* Set up values needed for each macroblock */ mb = ¯oblock_array->macro_blocks[i]; block_ptr = &(blocks->blocks[mb->index<<6]); /* Lockup can happen if the coordinates are too far out of range */ if(mb->x > target_surface->width>>4) { mb->x = 0; } if(mb->y > target_surface->height>>4) { mb->y = 0; } /* If buffers are almost full dispatch them */ if(datay) { pDMAy->used = (unsigned long)datay - (unsigned long)pDMAy->address; if(pDMAy->used > 3520) { if(dirty_context) { dispatchYContext(privTarget,privPast,privFuture,pI810XvMC); } dirty_context = 0; mc.idx = pDMAy->idx; mc.used = pDMAy->used; datay = NULL; mc.last_render = ++pI810XvMC->last_render; privTarget->last_render = pI810XvMC->last_render; I810_MC(pI810XvMC,mc); } /* datay near full */ } /* if(datay) */ if(datau) { pDMAu[u_index]->used = (unsigned long)datau - (unsigned long)pDMAu[u_index]->address; if(pDMAu[u_index]->used > 3904) { u_index++; datau = NULL; if(u_index == UV_QUEUE) { for(j=0; jidx; mc.used = pDMAu[j]->used; mc.last_render = ++pI810XvMC->last_render; privTarget->last_render = pI810XvMC->last_render; I810_MC(pI810XvMC,mc); } u_index = 0; dirty_context = 1; } /* if(u_index == UV_QUEUE) */ } /* datau near full */ } /* if(datau) */ if(datav) { pDMAv[v_index]->used = (unsigned long)datav - (unsigned long)pDMAv[v_index]->address; if(pDMAv[v_index]->used > 3904) { v_index++; datav = NULL; if(v_index == UV_QUEUE) { for(j=0; jidx; mc.used = pDMAv[j]->used; mc.last_render = ++pI810XvMC->last_render; privTarget->last_render = pI810XvMC->last_render; I810_MC(pI810XvMC,mc); } v_index = 0; dirty_context = 1; } /* if(v_index == UV_QUEUE) */ } /* datav near full */ } /* if(datav) */ /* Allocate buffers if this is the first loop,or if we just dispatched */ if(datay == NULL) { pDMAy = i810_get_free_buffer(pI810XvMC); datay = pDMAy->address; }/* if(datay == NULL) */ if(datau == NULL) { pDMAu[u_index] = i810_get_free_buffer(pI810XvMC); datau = pDMAu[u_index]->address; if(u_index == 0) { *datau++ = CMD_FLUSH; *datau++ = BOOLEAN_ENA_2; *datau++ = CMD_FLUSH; *datau++ = DEST_BUFFER_INFO; *datau++ = privTarget->dbi1u; *datau++ = DEST_BUFFER_VAR; *datau++ = privTarget->dbv1; /* Past Surface */ *datau++ = CMD_MAP_INFO; *datau++ = privPast->mi1u; *datau++ = privPast->mi2u; *datau++ = privPast->mi3u; /* Future Surface */ *datau++ = CMD_MAP_INFO; *datau++ = privFuture->mi1u | 0x1<<28; *datau++ = privFuture->mi2u; *datau++ = privFuture->mi3u; } } /* if(datau == NULL) */ if(datav == NULL) { pDMAv[v_index] = i810_get_free_buffer(pI810XvMC); datav = pDMAv[v_index]->address; if(v_index == 0) { *datav++ = CMD_FLUSH; *datav++ = BOOLEAN_ENA_2; *datav++ = CMD_FLUSH; *datav++ = DEST_BUFFER_INFO; *datav++ = privTarget->dbi1v; *datav++ = DEST_BUFFER_VAR; *datav++ = privTarget->dbv1; /* Past Surface */ *datav++ = CMD_MAP_INFO; *datav++ = privPast->mi1v; *datav++ = privPast->mi2v; *datav++ = privPast->mi3v; /* Future Surface */ *datav++ = CMD_MAP_INFO; *datav++ = privFuture->mi1v | 0x1<<28; *datav++ = privFuture->mi2v; *datav++ = privFuture->mi3v; } }/* if(datav == NULL) */ /* Catch no pattern case */ if(!(mb->macroblock_type & 0x8)) { mb->coded_block_pattern = 0; } if(mb->motion_type == XVMC_PREDICTION_DUAL_PRIME) { /* By default the maps will not be set up for dual prime. We have to change them. */ if(!pI810XvMC->dual_prime) { pI810XvMC->dual_prime = 1; privFuture = privPast; /* Y */ *datay++ = CMD_MAP_INFO; *datay++ = privFuture->mi1y | 0x1<<28; *datay++ = privFuture->mi2y; *datay++ = privFuture->mi3y; /* U */ *datau++ = CMD_MAP_INFO; *datau++ = privFuture->mi1u | 0x1<<28; *datau++ = privFuture->mi2u; *datau++ = privFuture->mi3u; /* V */ *datav++ = CMD_MAP_INFO; *datav++ = privFuture->mi1v | 0x1<<28; *datav++ = privFuture->mi2v; *datav++ = privFuture->mi3v; } } if((pI810XvMC->dual_prime) && (mb->motion_type != XVMC_PREDICTION_DUAL_PRIME)) { pI810XvMC->dual_prime = 0; privFuture = privTarget; /* Y */ *datay++ = CMD_MAP_INFO; *datay++ = privFuture->mi1y | 0x1<<28; *datay++ = privFuture->mi2y; *datay++ = privFuture->mi3y; /* U */ *datau++ = CMD_MAP_INFO; *datau++ = privFuture->mi1u | 0x1<<28; *datau++ = privFuture->mi2u; *datau++ = privFuture->mi3u; /* V */ *datav++ = CMD_MAP_INFO; *datav++ = privFuture->mi1v | 0x1<<28; *datav++ = privFuture->mi2v; *datav++ = privFuture->mi3v; } /* Frame Picture */ if((picture_structure & XVMC_FRAME_PICTURE) == XVMC_FRAME_PICTURE) { /* Intra Blocks */ if(mb->macroblock_type & XVMC_MB_TYPE_INTRA) { if(mb->dct_type) { renderIntrainFrameDCT1(&datay,&datau,&datav,mb,block_ptr,flags); continue; } renderIntrainFrame(&datay,&datau,&datav,mb,block_ptr); continue; } switch((mb->motion_type & 0x3) | (mb->dct_type<<2)) { case 0x2: /* Frame DCT0 */ renderFrameinFrame(&datay,&datau,&datav,mb,block_ptr,flags); continue; case 0x5: /* Field DCT1 */ renderFieldinFrame(&datay,&datau,&datav,mb,block_ptr,flags); continue; case 0x6: /* Frame DCT1 */ renderFrameinFrameDCT1(&datay,&datau,&datav,mb,block_ptr,flags); continue; case 0x1: /* Field DCT0 */ renderFieldinFrameDCT0(&datay,&datau,&datav,mb,block_ptr,flags); continue; case 0x3: /* Dual Prime DCT0 */ renderDualPrimeinFrame(&datay,&datau,&datav,mb,block_ptr,flags); continue; case 0x7: /* Dual Prime DCT1 */ renderDualPrimeinFrameDCT0(&datay,&datau,&datav,mb,block_ptr,flags); continue; default: /* No Motion Type */ renderError(); continue; } /* Switch */ } /* Frame Picture */ /* Field Pictures */ if(mb->macroblock_type & XVMC_MB_TYPE_INTRA) { renderIntrainField(&datay,&datau,&datav,mb,block_ptr,picture_structure); continue; } switch(mb->motion_type & 0x3) { case 0x1: /* Field Motion */ renderFieldinField(&datay,&datau,&datav,mb,block_ptr,picture_structure, flags); continue; case 0x2: /* 16x8 Motion */ render16x8inField(&datay,&datau,&datav,mb,block_ptr,picture_structure, flags); continue; case 0x3: /* Dual Prime */ renderDualPrimeinField(&datay,&datau,&datav,mb,block_ptr, picture_structure,flags); continue; default: /* No Motion Type */ renderError(); continue; } continue; } /* for each Macroblock */ /* Dispatch remaining DMA buffers */ if(dirty_context) { dispatchYContext(privTarget,privPast,privFuture,pI810XvMC); } mc.idx = pDMAy->idx; mc.used = (unsigned long)datay - (unsigned long)pDMAy->address; mc.last_render = ++pI810XvMC->last_render; privTarget->last_render = pI810XvMC->last_render; I810_MC(pI810XvMC,mc); pDMAu[u_index]->used = (unsigned long)datau - (unsigned long)pDMAu[u_index]->address; for(j=0; j<=u_index; j++) { mc.idx = pDMAu[j]->idx; mc.used = pDMAu[j]->used; mc.last_render = ++pI810XvMC->last_render; privTarget->last_render = pI810XvMC->last_render; I810_MC(pI810XvMC,mc); } pDMAv[v_index]->used = (unsigned long)datav - (unsigned long)pDMAv[v_index]->address; for(j=0; j<=v_index; j++) { mc.idx = pDMAv[j]->idx; mc.used = pDMAv[j]->used; mc.last_render = ++pI810XvMC->last_render; privTarget->last_render = pI810XvMC->last_render; I810_MC(pI810XvMC,mc); } I810_UNLOCK(pI810XvMC); return Success; } /*************************************************************************** // Function: XvMCPutSurface // Description: // Arguments: // display: Connection to X server // surface: Surface to be displayed // draw: X Drawable on which to display the surface // srcx: X coordinate of the top left corner of the region to be // displayed within the surface. // srcy: Y coordinate of the top left corner of the region to be // displayed within the surface. // srcw: Width of the region to be displayed. // srch: Height of the region to be displayed. // destx: X cordinate of the top left corner of the destination region // in the drawable coordinates. // desty: Y cordinate of the top left corner of the destination region // in the drawable coordinates. // destw: Width of the destination region. // desth: Height of the destination region. // flags: One or more of the following. // XVMC_TOP_FIELD - Display only the Top field of the surface. // XVMC_BOTTOM_FIELD - Display only the Bottom Field of the surface. // XVMC_FRAME_PICTURE - Display both fields or frame. // // Info: Portions of this function derived from i810_video.c (XFree86) // // This function is organized so that we wait as long as possible before // touching the overlay registers. Since we don't know that the last // flip has happened yet we want to give the overlay as long as // possible to catch up before we have to check on its progress. This // makes it unlikely that we have to wait on the last flip. ***************************************************************************/ _X_EXPORT Status XvMCPutSurface(Display *display,XvMCSurface *surface, Drawable draw, short srcx, short srcy, unsigned short srcw, unsigned short srch, short destx, short desty, unsigned short destw, unsigned short desth, int flags) { i810XvMCContext *pI810XvMC; i810XvMCSurface *pI810Surface; i810OverlayRecPtr pORegs; unsigned int ysrc_offset,uvsrc_offset; Box extents; uint window_width,window_height; unsigned int xscaleInt = 0,xscaleFract = 0,yscaleInt = 0,yscaleFract = 0; unsigned int xscaleFractUV = 0,xscaleIntUV = 0,yscaleFractUV = 0; unsigned int yscaleIntUV = 0,yPitch = 0,uvPitch = 0; unsigned int ovcmd = 0; uint d; double xscale,yscale; int diff; int clipped_srcx, clipped_srcy, clipped_destx, clipped_desty; int clipped_srcw, clipped_srch, clipped_destw, clipped_desth; uint x1,y1,root_width,root_height; int x2 = 0, y2 = 0,unused; uint nChilds; int stat; Window win,root,parent,*pChilds; if((display == NULL) || (surface == NULL)) { return BadValue; } if(surface->privData == NULL) { return (error_base + XvMCBadSurface); } pI810Surface = (i810XvMCSurface *)surface->privData; pI810XvMC = (i810XvMCContext *)pI810Surface->privContext; pORegs = (i810OverlayRecPtr)pI810XvMC->oregs; switch(surface->surface_type_id) { case FOURCC_YV12: case FOURCC_I420: yPitch = (srcw + 7) & ~7; uvPitch = ((srcw>>1) + 7) & ~7; if((flags & XVMC_FRAME_PICTURE) != XVMC_FRAME_PICTURE) { srch = srch>>1; } break; case FOURCC_UYVY: case FOURCC_YUY2: default: /* FIXME: Non Planar not fully implemented. */ return BadValue; yPitch = ((srcw + 7) & ~7) << 1; break; }/* switch(surface->surface_type_id) */ /* FIXME: This should be using the DRI's clip rect but that isn't all hooked up yet. This has some latency but we get by. */ win = draw; XQueryTree(display,win,&root,&parent,&pChilds,&nChilds); if(nChilds) XFree(pChilds); XGetGeometry(display,win, &root, &x2, &y2, &window_width, &window_height, &d, &d); x1 = x2; y1 = y2; win = parent; do { XQueryTree(display,win,&root,&parent,&pChilds,&nChilds); if(nChilds) XFree(pChilds); XGetGeometry(display,win, &root, &x2, &y2, &d, &d, &d, &d); x1 += x2; y1 += y2; win = parent; }while(win != root); XGetGeometry(display,root, &root, &unused, &unused, &root_width, &root_height, &d, &d); /* Left edge of Video window clipped to screen */ extents.x1 = 0; if(x1 > extents.x1) { extents.x1 = x1; } /* Right edge of Video window clipped to screen */ extents.x2 = root_width; if(extents.x2 > (x1 + window_width)) { extents.x2 = x1 + window_width; } /* Top edge of Video window clipped to screen */ extents.y1 = 0; if(y1 > extents.y1) { extents.y1 = y1; } /* Bottom edge of Video window clipped to screen */ extents.y2 = root_height; if(extents.y2 > (y1 + window_height)) { extents.y2 = y1 + window_height; } /* Clipping is more difficult than is seems. We need to keep the scaling factors even if the destination window needs to be clipped. We clip the destination window first then apply a scaled version to the source window. */ /* Put destination coords in screen coords */ destx += x1; desty += y1; /* Scale factors requested */ xscale = (double)srcw / (double)destw; yscale = (double)srch / (double)desth; /* If destination window needs to be clipped we actually adjust both the src and dest window so as to keep the scaling that was requested */ clipped_srcx = srcx; clipped_srcy = srcy; clipped_destx = destx; clipped_desty = desty; clipped_srcw = srcw; clipped_srch = srch; clipped_destw = destw; clipped_desth = desth; /* Clip to the source surface boundaries */ if(clipped_srcx < 0) { clipped_destx += (0 - clipped_srcx) / xscale; clipped_srcw -= clipped_srcx; clipped_destw -= clipped_srcx / xscale; clipped_srcx = 0; } if((clipped_srcw + clipped_srcx) > surface->width) { clipped_srcw = surface->width - clipped_srcx; clipped_destw -= (clipped_srcw - srcw) / xscale; } if(clipped_srcy < 0) { clipped_desty += (0 - clipped_srcy) / yscale; clipped_srch -= clipped_srcy; clipped_desth -= clipped_srcy / yscale; clipped_srcy = 0; } if((clipped_srch + clipped_srcy) > surface->height) { clipped_srch = surface->height - clipped_srcy; clipped_desth -= (clipped_srch - srch) / yscale; } /* Clip to the extents */ if(clipped_destx < extents.x1) { diff = extents.x1 - clipped_destx; clipped_srcx += diff * xscale; clipped_srcw -= diff * xscale; clipped_destw -= diff; clipped_destx = extents.x1; } diff = (clipped_destx + clipped_destw) - extents.x2; if(diff > 0) { clipped_destw -= diff; clipped_srcw -= diff * xscale; } if(clipped_desty < extents.y1) { diff = extents.y1 - clipped_desty; clipped_srcy += diff * yscale; clipped_srch -= diff * yscale; clipped_desth -= diff; clipped_desty = 0; } diff = (clipped_desty + clipped_desth) - extents.y2; if(diff > 0) { clipped_desth -= diff; clipped_srch -= diff * yscale; } /* If the whole window is clipped turn off the overlay */ if((clipped_destx + clipped_destw < extents.x1) || (clipped_desty + clipped_desth < extents.y1) || (clipped_destx > extents.x2) || (clipped_desty > extents.y2)) { return XvMCHideSurface(display, surface); } /* Adjust the source offset width and height according to the clipped destination window. */ ysrc_offset = ((clipped_srcx + 1) & ~1) + ((clipped_srcy + 1) & ~1) * (1<pitch); uvsrc_offset = (clipped_srcx>>1) + (clipped_srcy>>1) * (1<<(pI810Surface->pitch - 1)); /* Initially, YCbCr and Overlay Enable and vertical chrominance up interpolation and horozontal chrominance up interpolation */ ovcmd = VC_UP_INTERPOLATION | HC_UP_INTERPOLATION | Y_ADJUST | OVERLAY_ENABLE; if ((clipped_destw != clipped_srcw) || (clipped_desth != clipped_srch)) { xscaleInt = (clipped_srcw / clipped_destw) & 0x3; xscaleFract = (clipped_srcw << 12) / clipped_destw; yscaleInt = (clipped_srch / clipped_desth) & 0x3; yscaleFract = (clipped_srch << 12) / clipped_desth; if (clipped_destw > clipped_srcw) { /* horizontal up-scaling */ ovcmd &= ~HORIZONTAL_CHROMINANCE_FILTER; ovcmd &= ~HORIZONTAL_LUMINANCE_FILTER; ovcmd |= (HC_UP_INTERPOLATION | HL_UP_INTERPOLATION); } if (clipped_desth > clipped_srch) { /* vertical up-scaling */ ovcmd &= ~VERTICAL_CHROMINANCE_FILTER; ovcmd &= ~VERTICAL_LUMINANCE_FILTER; ovcmd |= (VC_UP_INTERPOLATION | VL_UP_INTERPOLATION); } if (clipped_destw < clipped_srcw) { /* horizontal down-scaling */ ovcmd &= ~HORIZONTAL_CHROMINANCE_FILTER; ovcmd &= ~HORIZONTAL_LUMINANCE_FILTER; ovcmd |= (HC_DOWN_INTERPOLATION | HL_DOWN_INTERPOLATION); } if (clipped_desth < clipped_srch) { /* vertical down-scaling */ ovcmd &= ~VERTICAL_CHROMINANCE_FILTER; ovcmd &= ~VERTICAL_LUMINANCE_FILTER; ovcmd |= (VC_DOWN_INTERPOLATION | VL_DOWN_INTERPOLATION); } /* now calculate the UV scaling factor */ if (xscaleFract) { xscaleFractUV = xscaleFract >> MINUV_SCALE; ovcmd &= ~HC_DOWN_INTERPOLATION; ovcmd |= HC_UP_INTERPOLATION; } if (xscaleInt) { xscaleIntUV = xscaleInt >> MINUV_SCALE; if (xscaleIntUV) { ovcmd &= ~HC_UP_INTERPOLATION; } } if (yscaleFract) { yscaleFractUV = yscaleFract >> MINUV_SCALE; ovcmd &= ~VC_DOWN_INTERPOLATION; ovcmd |= VC_UP_INTERPOLATION; } if (yscaleInt) { yscaleIntUV = yscaleInt >> MINUV_SCALE; if (yscaleIntUV) { ovcmd &= ~VC_UP_INTERPOLATION; ovcmd |= VC_DOWN_INTERPOLATION; } } }/* if((destw != srcw) || (desth != srch)) */ /* Lock the DRM */ I810_LOCK(pI810XvMC,0); /* Block until rendering on this surface is finished */ stat = XVMC_RENDERING; while(stat & XVMC_RENDERING) { XvMCGetSurfaceStatus(display,surface,&stat); } /* Block until the last flip is finished */ if(pI810XvMC->last_flip) { BLOCK_OVERLAY(pI810XvMC,pI810XvMC->current); } pI810XvMC->current = !pI810XvMC->current; pORegs->OV0CMD = ovcmd; if ((clipped_destw != clipped_srcw) || (clipped_desth != clipped_srch)) { pORegs->YRGBSCALE = (xscaleInt << 15) | ((xscaleFract & 0xFFF) << 3) | (yscaleInt) | ((yscaleFract & 0xFFF) << 20); pORegs->UVSCALE = yscaleIntUV | ((xscaleFractUV & 0xFFF) << 3) | ((yscaleFractUV & 0xFFF) << 20); } else { /* Normal 1:1 scaling */ pORegs->YRGBSCALE = 0x80004000; pORegs->UVSCALE = 0x80004000; } pORegs->SHEIGHT = clipped_srch | (clipped_srch << 15); pORegs->DWINPOS = (clipped_desty << 16) | clipped_destx; pORegs->DWINSZ = ((clipped_desth<< 16) | (clipped_destw)); /* Attributes */ pORegs->OV0CLRC0 = ((pI810XvMC->contrast & 0x1ff)<<8) | (pI810XvMC->brightness & 0xff); pORegs->OV0CLRC1 = (pI810XvMC->saturation & 0x3ff); /* Destination Colorkey Setup */ pI810XvMC->oregs->DCLRKV = RGB16ToColorKey(pI810XvMC->colorkey); /* buffer locations, add the offset from the clipping */ if(pI810XvMC->current) { pORegs->OBUF_1Y = (unsigned long)pI810Surface->offset + (unsigned long)pI810Surface->offsets[0] + ysrc_offset; pORegs->OBUF_1V = (unsigned long)pI810Surface->offset + (unsigned long)pI810Surface->offsets[2] + uvsrc_offset; pORegs->OBUF_1U = (unsigned long)pI810Surface->offset + (unsigned long)pI810Surface->offsets[1] + uvsrc_offset; } else { pORegs->OBUF_0Y = (unsigned long)pI810Surface->offset + (unsigned long)pI810Surface->offsets[0] + ysrc_offset; pORegs->OBUF_0V = (unsigned long)pI810Surface->offset + (unsigned long)pI810Surface->offsets[2] + uvsrc_offset; pORegs->OBUF_0U = (unsigned long)pI810Surface->offset + (unsigned long)pI810Surface->offsets[1] + uvsrc_offset; } switch(surface->surface_type_id) { case FOURCC_YV12: case FOURCC_I420: pORegs->SWID = (uvPitch << 16) | yPitch; pORegs->SWIDQW = (uvPitch << 13) | (yPitch >> 3); pORegs->OV0STRIDE = (1<pitch) | ((1<pitch) << 15); pORegs->OV0CMD &= ~SOURCE_FORMAT; pORegs->OV0CMD |= YUV_420; if((flags & XVMC_FRAME_PICTURE) != XVMC_FRAME_PICTURE) { /* Top Field Only */ if(flags & XVMC_TOP_FIELD) { if(pI810XvMC->current == 1) { pORegs->OV0CMD |= (VERTICAL_PHASE_BOTH | FLIP_TYPE_FIELD | BUFFER1_FIELD0); } else { pORegs->OV0CMD |= (VERTICAL_PHASE_BOTH | FLIP_TYPE_FIELD | BUFFER0_FIELD0); } pORegs->YRGB_VPH = 1<<15 | 1<<31; pORegs->UV_VPH = 3<<14 | 3<<30; pORegs->INIT_PH = 0x06 | 0x18; } /* Bottom Field Only */ else { if(pI810XvMC->current == 1) { pORegs->OV0CMD |= (VERTICAL_PHASE_BOTH | FLIP_TYPE_FIELD | BUFFER1_FIELD1); } else { pORegs->OV0CMD |= (VERTICAL_PHASE_BOTH | FLIP_TYPE_FIELD | BUFFER0_FIELD1); } pORegs->YRGB_VPH = 0; pORegs->UV_VPH = 7<<29 | 7<<13; pORegs->INIT_PH = 0x06; } } /* Frame Picture */ else { if(pI810XvMC->current == 1) { pORegs->OV0CMD |= BUFFER1_FIELD0; } else { pORegs->OV0CMD |= BUFFER0_FIELD0; } pORegs->YRGB_VPH = 0; pORegs->UV_VPH = 0; pORegs->INIT_PH = 0; } break; case FOURCC_UYVY: case FOURCC_YUY2: default: pORegs->SWID = srcw; pORegs->SWIDQW = srcw >> 3; pORegs->OV0STRIDE = pI810Surface->pitch; pORegs->OV0CMD &= ~SOURCE_FORMAT; pORegs->OV0CMD |= YUV_422; pORegs->OV0CMD &= ~OV_BYTE_ORDER; if (surface->surface_type_id == FOURCC_UYVY) { pORegs->OV0CMD |= Y_SWAP; } pORegs->OV0CMD &= ~BUFFER_AND_FIELD; if(pI810XvMC->current == 1) { pORegs->OV0CMD |= BUFFER1_FIELD0; } else { pORegs->OV0CMD |= BUFFER0_FIELD0; } break; } /* switch(surface->surface_type_id) */ OVERLAY_FLIP(pI810XvMC); /* The Overlay only flips when it knows you changed something. So the first time change stuff while it is watching to be sure. */ if(!pI810XvMC->last_flip) { pORegs->OV0CMD &= ~0x4; if(pI810XvMC->current == 1) { pORegs->OV0CMD |= BUFFER1_FIELD0; } else { pORegs->OV0CMD |= BUFFER0_FIELD0; } } pI810Surface->last_flip = ++pI810XvMC->last_flip; I810_UNLOCK(pI810XvMC); return Success; } /*************************************************************************** // Function: XvMCSyncSurface // Arguments: // display - Connection to the X server // surface - The surface to synchronize // Info: // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCSyncSurface(Display *display,XvMCSurface *surface) { Status ret; int stat=0; /* FIXME: Perhaps a timer here to prevent lockup? FIXME: Perhaps a usleep to not be busy waiting? */ do { ret = XvMCGetSurfaceStatus(display,surface,&stat); }while(!ret && (stat & XVMC_RENDERING)); return ret; } /*************************************************************************** // Function: XvMCFlushSurface // Description: // This function commits pending rendering requests to ensure that they // wll be completed in a finite amount of time. // Arguments: // display - Connection to X server // surface - Surface to flush // Info: // This command is a noop for i810 becuase we always dispatch buffers in // render. There is little gain to be had with 4k buffers. // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCFlushSurface(Display * display, XvMCSurface *surface) { return Success; } /*************************************************************************** // Function: XvMCGetSurfaceStatus // Description: // Arguments: // display: connection to X server // surface: The surface to query // stat: One of the Following // XVMC_RENDERING - The last XvMCRenderSurface command has not // completed. // XVMC_DISPLAYING - The surface is currently being displayed or a // display is pending. ***************************************************************************/ _X_EXPORT Status XvMCGetSurfaceStatus(Display *display, XvMCSurface *surface, int *stat) { i810XvMCSurface *privSurface; i810XvMCContext *pI810XvMC; int temp; if((display == NULL) || (surface == NULL) || (stat == NULL)) { return BadValue; } if(surface->privData == NULL) { return BadValue; } *stat = 0; privSurface = surface->privData; pI810XvMC = privSurface->privContext; if(pI810XvMC == NULL) { return (error_base + XvMCBadSurface); } I810_LOCK(pI810XvMC,0); if(privSurface->last_flip) { /* This can not happen */ if(pI810XvMC->last_flip < privSurface->last_flip) { printf("Error: Context last flip is less than surface last flip.\n"); return BadValue; } /* If the context has 2 or more flips after this surface it cannot be displaying. Don't bother to check. */ if(!(pI810XvMC->last_flip > (privSurface->last_flip + 1))) { /* If this surface was the last flipped it is either displaying or about to be so don't bother checking. */ if(pI810XvMC->last_flip == privSurface->last_flip) { *stat |= XVMC_DISPLAYING; } else { /* In this case there has been one more flip since our surface's but we need to check if it is finished or not. */ temp = GET_FSTATUS(pI810XvMC); if(((temp & (1<<20))>>20) != pI810XvMC->current) { *stat |= XVMC_DISPLAYING; } } } } if(privSurface->last_render && (privSurface->last_render > GET_RSTATUS(pI810XvMC))) { *stat |= XVMC_RENDERING; } I810_UNLOCK(pI810XvMC); return Success; } /*************************************************************************** // // Surface manipulation functions // ***************************************************************************/ /*************************************************************************** // Function: XvMCHideSurface // Description: Stops the display of a surface. // Arguments: // display - Connection to the X server. // surface - surface to be hidden. // // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCHideSurface(Display *display, XvMCSurface *surface) { i810XvMCSurface *pI810Surface; i810XvMCContext *pI810XvMC; int ss, xx; /* Did we get a good display and surface passed into us? */ if(display == NULL) { return BadValue; } if(surface == NULL) { return (error_base + XvMCBadSurface); } XvMCSyncSurface(display, surface); /* Get surface private data pointer */ if(surface->privData == NULL) { return (error_base + XvMCBadSurface); } pI810Surface = (i810XvMCSurface *)surface->privData; /* Get the status of the surface, if it is not currently displayed we don't need to worry about it. */ if((xx = XvMCGetSurfaceStatus(display, surface, &ss)) != Success) { return xx; } if(! (ss & XVMC_DISPLAYING)) { return Success; } /* Get the associated context pointer */ pI810XvMC = (i810XvMCContext *)pI810Surface->privContext; if(pI810XvMC == NULL) { return (error_base + XvMCBadSurface); } if(pI810XvMC->last_flip) { I810_LOCK(pI810XvMC,DRM_LOCK_QUIESCENT); /* Make sure last flip is done */ BLOCK_OVERLAY(pI810XvMC,pI810XvMC->current); /* Set the registers to turn the overlay off */ pI810XvMC->oregs->OV0CMD = VC_UP_INTERPOLATION | HC_UP_INTERPOLATION | Y_ADJUST; pI810XvMC->current = !pI810XvMC->current; if(pI810XvMC->current == 1) { pI810XvMC->oregs->OV0CMD |= BUFFER1_FIELD0; } else { pI810XvMC->oregs->OV0CMD |= BUFFER0_FIELD0; } OVERLAY_FLIP(pI810XvMC); /* Increment the context flip but not the surface. This way no surface has the last flip #. */ pI810XvMC->last_flip++; /* Now wait until the hardware reads the registers and makes the change. */ BLOCK_OVERLAY(pI810XvMC,pI810XvMC->current) I810_UNLOCK(pI810XvMC); } return Success; } /*************************************************************************** // // Functions that deal with subpictures // ***************************************************************************/ /*************************************************************************** // Function: XvMCCreateSubpicture // Description: This creates a subpicture by filling out the XvMCSubpicture // structure passed to it and returning Success. // Arguments: // display - Connection to the X server. // context - The context to create the subpicture for. // subpicture - Pre-allocated XvMCSubpicture structure to be filled in. // width - of subpicture // height - of subpicture // xvimage_id - The id describing the XvImage format. // // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCCreateSubpicture(Display *display, XvMCContext *context, XvMCSubpicture *subpicture, unsigned short width, unsigned short height, int xvimage_id) { i810XvMCContext *pI810XvMC; i810XvMCSubpicture *pI810Subpicture; int priv_count; uint *priv_data; Status ret; if((subpicture == NULL) || (context == NULL) || (display == NULL)){ return BadValue; } pI810XvMC = (i810XvMCContext *)context->privData; if(pI810XvMC == NULL) { return (error_base + XvMCBadContext); } subpicture->context_id = context->context_id; subpicture->xvimage_id = xvimage_id; /* These need to be checked to make sure they are not too big! */ subpicture->width = width; subpicture->height = height; subpicture->privData = (i810XvMCSubpicture *)malloc(sizeof(i810XvMCSubpicture)); if(!subpicture->privData) { return BadAlloc; } pI810Subpicture = (i810XvMCSubpicture *)subpicture->privData; if((ret = _xvmc_create_subpicture(display, context, subpicture, &priv_count, &priv_data))) { printf("Unable to create XvMCSubpicture.\n"); return ret; } if(priv_count != 1) { printf("_xvmc_create_subpicture() returned incorrect data size.\n"); printf("Expected 1 got %d\n",priv_count); free(priv_data); return BadAlloc; } /* Data == Client Address, offset == Physical address offset */ pI810Subpicture->data = pI810XvMC->surfaces.address; pI810Subpicture->offset = pI810XvMC->surfaces.offset; /* Initialize private values */ pI810Subpicture->privContext = pI810XvMC; pI810Subpicture->last_render = 0; pI810Subpicture->last_flip = 0; /* Based on the xvimage_id we will need to set the other values */ subpicture->num_palette_entries = 16; subpicture->entry_bytes = 3; strcpy(subpicture->component_order,"YUV"); /* i810's MC Engine needs surfaces of 2^x (x= 9,10,11,12) pitch and the Tiler need 512k aligned surfaces, basically we are stuck with fixed memory with pitch 1024. */ pI810Subpicture->pitch = 10; /* offsets[0] == offset into the map described by either address (Client memeory address) or offset (physical offset from fb base) */ pI810Subpicture->offsets[0] = priv_data[0]; if(((unsigned long)pI810Subpicture->data + pI810Subpicture->offsets[0]) & 4095) { printf("XvMCCreateSubpicture: Subpicture offset 0 is not 4096 aligned\n"); } /* Free data returned from xvmc_create_surface */ free(priv_data); /* Clear the surface to 0 */ memset((void *)((unsigned long)pI810Subpicture->data + (unsigned long)pI810Subpicture->offsets[0]), 0, ((1<pitch) * subpicture->height)); switch(subpicture->xvimage_id) { case FOURCC_IA44: case FOURCC_AI44: /* Destination buffer info command */ pI810Subpicture->dbi1 = ((((unsigned int)pI810Subpicture->offset + pI810Subpicture->offsets[0]) & ~0xfc000fff) | (pI810Subpicture->pitch - 9)); /* Destination buffer variables command */ pI810Subpicture->dbv1 = (0x8<<20) | (0x8<<16); /* Map info command */ pI810Subpicture->mi1 = (0x0<<24) | (3<<21) | (1<<9) | (pI810Subpicture->pitch - 3); pI810Subpicture->mi2 = (((unsigned int)subpicture->height - 1)<<16) | ((unsigned int)subpicture->width - 1); pI810Subpicture->mi3 = ((unsigned int)pI810Subpicture->offset + pI810Subpicture->offsets[0]) & ~0xfc00000f; break; default: free(subpicture->privData); return BadMatch; } pI810XvMC->ref++; return Success; } /*************************************************************************** // Function: XvMCClearSubpicture // Description: Clear the area of the given subpicture to "color". // structure passed to it and returning Success. // Arguments: // display - Connection to the X server. // subpicture - Subpicture to clear. // x, y, width, height - rectangle in the subpicture to clear. // color - The data to file the rectangle with. // // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCClearSubpicture(Display *display, XvMCSubpicture *subpicture, short x, short y, unsigned short width, unsigned short height, unsigned int color) { i810XvMCContext *pI810XvMC; i810XvMCSubpicture *pI810Subpicture; int i; if((subpicture == NULL) || (display == NULL)){ return BadValue; } if(!subpicture->privData) { return (error_base + XvMCBadSubpicture); } pI810Subpicture = (i810XvMCSubpicture *)subpicture->privData; pI810XvMC = (i810XvMCContext *)pI810Subpicture->privContext; if(pI810XvMC == NULL) { return (error_base + XvMCBadSubpicture); } if((x < 0) || (x + width > subpicture->width)) { return BadValue; } if((y < 0) || (y + height > subpicture->height)) { return BadValue; } for(i=y; idata + (unsigned long)pI810Subpicture->offsets[0] + x + (1<pitch) * i),(char)color,width); } return Success; } /*************************************************************************** // Function: XvMCCompositeSubpicture // Description: Composite the XvImae on the subpicture. This composit uses // non-premultiplied alpha. Destination alpha is utilized // except for with indexed subpictures. Indexed subpictures // use a simple "replace". // Arguments: // display - Connection to the X server. // subpicture - Subpicture to clear. // image - the XvImage to be used as the source of the composite. // srcx, srcy, width, height - The rectangle from the image to be used. // dstx, dsty - location in the subpicture to composite the source. // // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCCompositeSubpicture(Display *display, XvMCSubpicture *subpicture, XvImage *image, short srcx, short srcy, unsigned short width, unsigned short height, short dstx, short dsty) { i810XvMCContext *pI810XvMC; i810XvMCSubpicture *pI810Subpicture; int i; if((subpicture == NULL) || (display == NULL)){ return BadValue; } if(!subpicture->privData) { return (error_base + XvMCBadSubpicture); } pI810Subpicture = (i810XvMCSubpicture *)subpicture->privData; pI810XvMC = (i810XvMCContext *)pI810Subpicture->privContext; if(pI810XvMC == NULL) { return (error_base + XvMCBadSubpicture); } if((srcx < 0) || (srcx + width > image->width)) { return BadValue; } if((dstx < 0) || (dstx + width > subpicture->width)) { return BadValue; } if((srcy < 0) || (srcy + height > image->height)) { return BadValue; } if((dsty < 0) || (dsty + height > subpicture->height)) { return BadValue; } for(i=0; idata + (unsigned long)pI810Subpicture->offsets[0] + dstx + (1<pitch) * (i + dsty)), (void *)((unsigned long)image->data + (unsigned long)image->offsets[0] + srcx + image->pitches[0] * (i + srcy)) ,width); } return Success; } /*************************************************************************** // Function: XvMCDestroySubpicture // Description: Destroys the specified subpicture. // Arguments: // display - Connection to the X server. // subpicture - Subpicture to be destroyed. // // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCDestroySubpicture(Display *display, XvMCSubpicture *subpicture) { i810XvMCSubpicture *pI810Subpicture; i810XvMCContext *pI810XvMC; if((display == NULL) || (subpicture == NULL)) { return BadValue; } if(!subpicture->privData) { return (error_base + XvMCBadSubpicture); } pI810Subpicture = (i810XvMCSubpicture *)subpicture->privData; pI810XvMC = (i810XvMCContext *)pI810Subpicture->privContext; if(!pI810XvMC) { return (error_base + XvMCBadSubpicture); } if(pI810Subpicture->last_render) { XvMCSyncSubpicture(display,subpicture); } _xvmc_destroy_subpicture(display,subpicture); i810_free_privContext(pI810XvMC); free(pI810Subpicture); subpicture->privData = NULL; return Success; } /*************************************************************************** // Function: XvMCSetSubpicturePalette // Description: Set the subpictures palette // Arguments: // display - Connection to the X server. // subpicture - Subpiture to set palette for. // palette - A pointer to an array holding the palette data. The array // is num_palette_entries * entry_bytes in size. // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCSetSubpicturePalette(Display *display, XvMCSubpicture *subpicture, unsigned char *palette) { i810XvMCSubpicture *privSubpicture; int i,j; if((display == NULL) || (subpicture == NULL)) { return BadValue; } if(subpicture->privData == NULL) { return (error_base + XvMCBadSubpicture); } privSubpicture = (i810XvMCSubpicture *)subpicture->privData; j=0; for(i=0; i<16; i++) { privSubpicture->palette[0][i] = palette[j++]; privSubpicture->palette[1][i] = palette[j++]; privSubpicture->palette[2][i] = palette[j++]; } return Success; } /*************************************************************************** // Function: XvMCBlendSubpicture // Description: // The behavior of this function is different depending on whether // or not the XVMC_BACKEND_SUBPICTURE flag is set in the XvMCSurfaceInfo. // i810 only support frontend behavior. // // XVMC_BACKEND_SUBPICTURE not set ("frontend" behavior): // // XvMCBlendSubpicture is a no-op in this case. // // Arguments: // display - Connection to the X server. // subpicture - The subpicture to be blended into the video. // target_surface - The surface to be displayed with the blended subpic. // source_surface - Source surface prior to blending. // subx, suby, subw, subh - The rectangle from the subpicture to use. // surfx, surfy, surfw, surfh - The rectangle in the surface to blend // blend the subpicture rectangle into. Scaling can ocure if // XVMC_SUBPICTURE_INDEPENDENT_SCALING is set. // // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCBlendSubpicture(Display *display, XvMCSurface *target_surface, XvMCSubpicture *subpicture, short subx, short suby, unsigned short subw, unsigned short subh, short surfx, short surfy, unsigned short surfw, unsigned short surfh) { return BadMatch; } /*************************************************************************** // Function: XvMCBlendSubpicture2 // Description: // The behavior of this function is different depending on whether // or not the XVMC_BACKEND_SUBPICTURE flag is set in the XvMCSurfaceInfo. // i810 only supports frontend blending. // // XVMC_BACKEND_SUBPICTURE not set ("frontend" behavior): // // XvMCBlendSubpicture2 blends the source_surface and subpicture and // puts it in the target_surface. This does not effect the status of // the source surface but will cause the target_surface to query // XVMC_RENDERING until the blend is completed. // // Arguments: // display - Connection to the X server. // subpicture - The subpicture to be blended into the video. // target_surface - The surface to be displayed with the blended subpic. // source_surface - Source surface prior to blending. // subx, suby, subw, subh - The rectangle from the subpicture to use. // surfx, surfy, surfw, surfh - The rectangle in the surface to blend // blend the subpicture rectangle into. Scaling can ocure if // XVMC_SUBPICTURE_INDEPENDENT_SCALING is set. // // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCBlendSubpicture2(Display *display, XvMCSurface *source_surface, XvMCSurface *target_surface, XvMCSubpicture *subpicture, short subx, short suby, unsigned short subw, unsigned short subh, short surfx, short surfy, unsigned short surfw, unsigned short surfh) { drmBufPtr pDMA; unsigned int *data; i810XvMCContext *pI810XvMC; i810XvMCSubpicture *privSubpicture; i810XvMCSurface *privTarget; i810XvMCSurface *privSource; drm_i810_mc_t mc; int i,j; if(display == NULL) { return BadValue; } if(subpicture == NULL) { return (error_base + XvMCBadSubpicture); } if((target_surface == NULL) || (source_surface == NULL)) { return (error_base + XvMCBadSurface); } if((subpicture->xvimage_id != FOURCC_AI44) && (subpicture->xvimage_id != FOURCC_IA44)) { return (error_base + XvMCBadSubpicture); } if(!subpicture->privData) { return (error_base + XvMCBadSubpicture); } privSubpicture = (i810XvMCSubpicture *)subpicture->privData; pI810XvMC = (i810XvMCContext *)privSubpicture->privContext; if(pI810XvMC == NULL) { return (error_base + XvMCBadSubpicture); } if(!target_surface->privData) { return (error_base + XvMCBadSurface); } privTarget = (i810XvMCSurface *)target_surface->privData; if(!source_surface->privData) { return (error_base + XvMCBadSurface); } privSource = (i810XvMCSurface *)source_surface->privData; /* Check that size isn't bigger than subpicture */ if((subx + subw) > subpicture->width) { return BadValue; } if((suby + subh) > subpicture->height) { return BadValue; } /* Check that dest isn't bigger than surface */ if((surfx + surfw) > target_surface->width) { return BadValue; } if((surfy + surfh) > target_surface->height) { return BadValue; } /* Make sure surfaces match */ if(target_surface->width != source_surface->width) { return BadValue; } if(target_surface->height != source_surface->height) { return BadValue; } /* Lock For DMA */ I810_LOCK(pI810XvMC,0); /* Allocate DMA buffer */ pDMA = i810_get_free_buffer(pI810XvMC); data = pDMA->address; /* Copy Y data first */ /* SOURCE_COPY_BLT */ *data++ = (2<<29) | (0x43<<22) | 0x4; *data++ = (0xcc<<16) | (1<<26) | (1<pitch); *data++ = (target_surface->height<<16) | target_surface->width; *data++ = privTarget->offset + privTarget->offsets[0]; *data++ = (1<pitch); *data++ = privSource->offset + privSource->offsets[0]; /* Select Context 1 for loading */ *data++ = CMD_FLUSH; *data++ = (5<<23) | (1<<17) | (1<<8); *data++ = CMD_FLUSH; /* Load Palette */ *data++ = MAP_PALETTE_LOAD; /* 16 levels of alpha for each Y */ switch(subpicture->xvimage_id) { case FOURCC_IA44: for(i=0; i<16; i++) { for(j=0; j<16; j++) { *data++ = (j<<12) | (j<<8) | privSubpicture->palette[0][i]; } } break; case FOURCC_AI44: for(i=0; i<16; i++) { for(j=0; j<16; j++) { *data++ = (i<<12) | (i<<8) | privSubpicture->palette[0][j]; } } break; } /* TARGET */ /* *data++ = CMD_FLUSH; */ /* *data++ = BOOLEAN_ENA_2; */ *data++ = CMD_FLUSH; *data++ = DEST_BUFFER_INFO; *data++ = privTarget->dbi1y; *data++ = DEST_BUFFER_VAR; *data++ = privTarget->dbv1; /* ALPHA */ *data++ = CMD_MAP_INFO; *data++ = privSubpicture->mi1; *data++ = privSubpicture->mi2; *data++ = privSubpicture->mi3; *data++ = VERTEX_FORMAT | (1<<8) | (3<<1); *data++ = BOOLEAN_ENA_1; *data++ = SRC_DEST_BLEND_MONO | (0x940); /* Map Filter */ *data++ = (3<<29) | (0x1c<<24) | (2<<19) | (0x224); /* Use context 1 */ *data++ = CMD_FLUSH; *data++ = (5<<23) | (1<<16) | 1; *data++ = CMD_FLUSH; /* Drawing Rect Info */ *data++ = DRAWING_RECT_INFO; *data++ = 0x0; *data++ = 0x0; *data++ = 0x0; *data++ = 0x0; *data++ = 0x0; /* GFXPRIMITIVE RECTANGLE */ *data++ = (3<<29) | (0x1f<<24) | (0x7<<18) | 11; /* Bottom Right Vertex */ *(float *)data++ = (float) (surfx + surfw); *(float *)data++ = (float) (surfy + surfh); *(float *)data++ = (float) (subx + subw); *(float *)data++ = (float) (suby + subh); /* Bottom Left Vertex */ *(float *)data++ = (float) surfx; *(float *)data++ = (float) (surfy + surfh); *(float *)data++ = (float) subx; *(float *)data++ = (float) (suby + subh); /* Top Left Vertex */ *(float *)data++ = (float) surfx; *(float *)data++ = (float) surfy; *(float *)data++ = (float) subx; *(float *)data++ = (float) suby; /* Load and Use Context 0 */ *data++ = CMD_FLUSH; *data++ = (5<<23) | (1<<17) | (1<<16); *data++ = CMD_FLUSH; /* U data */ /* SOURCE_COPY_BLT */ *data++ = (2<<29) | (0x43<<22) | 0x4; *data++ = (0xcc<<16) | (1<<26) | (1<<(privTarget->pitch - 1)); *data++ = (target_surface->height<<15) | (target_surface->width>>1); *data++ = (unsigned long)privTarget->offset + (unsigned long)privTarget->offsets[1]; *data++ = (1<<(privSource->pitch - 1)); *data++ = (unsigned long)privSource->offset + (unsigned long)privSource->offsets[1]; /* Context 1 select */ *data++ = CMD_FLUSH; *data++ = (5<<23) | (1<<17) | (1<<8); *data++ = CMD_FLUSH; /* ALPHA PALETTE */ *data++ = MAP_PALETTE_LOAD; /* 16 levels of alpha for each Y */ switch(subpicture->xvimage_id) { case FOURCC_IA44: for(i=0; i<16; i++) { for(j=0; j<16; j++) { *data++ = (j<<12) | (j<<8) | privSubpicture->palette[2][i]; } } break; case FOURCC_AI44: for(i=0; i<16; i++) { for(j=0; j<16; j++) { *data++ = (i<<12) | (i<<8) | privSubpicture->palette[2][j]; } } break; } /* TARGET */ *data++ = CMD_FLUSH; *data++ = BOOLEAN_ENA_2; *data++ = CMD_FLUSH; *data++ = DEST_BUFFER_INFO; *data++ = privTarget->dbi1u; *data++ = DEST_BUFFER_VAR; *data++ = privTarget->dbv1; /* ALPHA */ *data++ = CMD_MAP_INFO; *data++ = privSubpicture->mi1; *data++ = privSubpicture->mi2; *data++ = privSubpicture->mi3; *data++ = VERTEX_FORMAT | (1<<8) | (3<<1); *data++ = BOOLEAN_ENA_1; *data++ = SRC_DEST_BLEND_MONO | (0x940); /* Map Filter */ *data++ = (3<<29) | (0x1c<<24) | (2<<19) | (1<<16) | (0x224); /* Use context 1 */ *data++ = CMD_FLUSH; *data++ = (5<<23) | (1<<16) | 1; *data++ = CMD_FLUSH; /* Drawing Rect Info */ *data++ = (3<<29) | (0x1d<<24) | (0x80<<16) | 3; *data++ = 0; *data++ = 0; *data++ = 0; *data++ = 0; *data++ = 0; /* Rectangle */ *data++ = (3<<29) | (0x1f<<24) | (0x7<<18) | 11; /* Bottom Right */ *(float *)data++ = (float) ((surfx + surfw)>>1); *(float *)data++ = (float) ((surfy + surfh)>>1); *(float *)data++ = (float) subx + subw; *(float *)data++ = (float) suby + subh; /* Bottom Left */ *(float *)data++ = (float) (surfx>>1); *(float *)data++ = (float) ((surfy + surfh)>>1); *(float *)data++ = (float) subx; *(float *)data++ = (float) suby + subh; /* Top Left */ *(float *)data++ = (float) (surfx>>1); *(float *)data++ = (float) (surfy>>1); *(float *)data++ = (float) subx; *(float *)data++ = (float) suby; /* Load and Use Context 0 */ *data++ = CMD_FLUSH; *data++ = (5<<23) | (1<<17) | (1<<16); *data++ = CMD_FLUSH; /* V data */ /* SOURCE_COPY_BLT */ *data++ = (2<<29) | (0x43<<22) | 0x4; *data++ = (0xcc<<16) | (1<<26) | (1<<(privTarget->pitch - 1)); *data++ = (target_surface->height<<15) | (target_surface->width>>1); *data++ = (unsigned long)privTarget->offset + (unsigned long)privTarget->offsets[2]; *data++ = (1<<(privSource->pitch - 1)); *data++ = (unsigned long)privSource->offset + (unsigned long)privSource->offsets[2]; /* Context 1 select */ *data++ = CMD_FLUSH; *data++ = (5<<23) | (1<<17) | (1<<8); *data++ = CMD_FLUSH; /* ALPHA PALETTE */ *data++ = MAP_PALETTE_LOAD; /* 16 levels of alpha for each Y */ switch(subpicture->xvimage_id) { case FOURCC_IA44: for(i=0; i<16; i++) { for(j=0; j<16; j++) { *data++ = (j<<12) | (j<<8) | privSubpicture->palette[1][i]; } } break; case FOURCC_AI44: for(i=0; i<16; i++) { for(j=0; j<16; j++) { *data++ = (i<<12) | (i<<8) | privSubpicture->palette[1][j]; } } break; } /* TARGET */ *data++ = CMD_FLUSH; *data++ = BOOLEAN_ENA_2; *data++ = CMD_FLUSH; *data++ = DEST_BUFFER_INFO; *data++ = privTarget->dbi1v; *data++ = DEST_BUFFER_VAR; *data++ = privTarget->dbv1; /* ALPHA */ *data++ = CMD_MAP_INFO; *data++ = privSubpicture->mi1; *data++ = privSubpicture->mi2; *data++ = privSubpicture->mi3; *data++ = VERTEX_FORMAT | (1<<8) | (3<<1); *data++ = BOOLEAN_ENA_1; *data++ = SRC_DEST_BLEND_MONO | (0x940); /* Map Filter */ *data++ = (3<<29) | (0x1c<<24) | (2<<19) | (1<<16) | (0x224); /* Use context 1 */ *data++ = CMD_FLUSH; *data++ = (5<<23) | (1<<16) | 1; *data++ = CMD_FLUSH; /* Drawing Rect Info */ *data++ = (3<<29) | (0x1d<<24) | (0x80<<16) | 3; *data++ = 0; *data++ = 0; *data++ = 0; *data++ = 0; *data++ = 0; /* Rectangle */ *data++ = (3<<29) | (0x1f<<24) | (0x7<<18) | 11; /* Bottom Right */ *(float *)data++ = (float) ((surfx + surfw)>>1); *(float *)data++ = (float) ((surfy + surfh)>>1); *(float *)data++ = (float) subx + subw; *(float *)data++ = (float) suby + subh; /* Bottom Left */ *(float *)data++ = (float) (surfx>>1); *(float *)data++ = (float) ((surfy + surfh)>>1); *(float *)data++ = (float) subx; *(float *)data++ = (float) suby + subh; /* Top Left */ *(float *)data++ = (float) (surfx>>1); *(float *)data++ = (float) (surfy>>1); *(float *)data++ = (float) subx; *(float *)data++ = (float) suby; /* Load and Use Context 0 */ *data++ = CMD_FLUSH; *data++ = (5<<23) | (1<<17) | (1<<16); *data++ = CMD_FLUSH; /* Dispatch */ pDMA->used = (unsigned long)data - (unsigned long)pDMA->address; mc.idx = pDMA->idx; mc.used = pDMA->used; mc.last_render = ++pI810XvMC->last_render; privTarget->last_render = pI810XvMC->last_render; I810_MC(pI810XvMC,mc); I810_UNLOCK(pI810XvMC); return Success; } /*************************************************************************** // Function: XvMCSyncSubpicture // Description: This function blocks until all composite/clear requests on // the subpicture have been complete. // Arguments: // display - Connection to the X server. // subpicture - The subpicture to synchronize // // Returns: Status ***************************************************************************/ _X_EXPORT Status XvMCSyncSubpicture(Display *display, XvMCSubpicture *subpicture) { Status ret; int stat=0; do { ret = XvMCGetSubpictureStatus(display,subpicture,&stat); }while(!ret && (stat & XVMC_RENDERING)); return ret; } /*************************************************************************** // Function: XvMCFlushSubpicture // Description: This function commits pending composite/clear requests to // ensure that they will be completed in a finite amount of // time. // Arguments: // display - Connection to the X server. // subpicture - The subpicture whos compsiting should be flushed // // Returns: Status // NOTES: i810 always dispatches commands so flush is a no-op ***************************************************************************/ _X_EXPORT Status XvMCFlushSubpicture(Display *display, XvMCSubpicture *subpicture) { if(display == NULL) { return BadValue; } if(subpicture == NULL) { return (error_base + XvMCBadSubpicture); } return Success; } /*************************************************************************** // Function: XvMCGetSubpictureStatus // Description: This function gets the current status of a subpicture // // Arguments: // display - Connection to the X server. // subpicture - The subpicture whos status is being queried // stat - The status of the subpicture. It can be any of the following // OR'd together: // XVMC_RENDERING - Last composite or clear request not completed // XVMC_DISPLAYING - Suppicture currently being displayed. // // Returns: Status // Notes: i810 always blends into a third surface so the subpicture is // never actually displaying, only a copy of it is displaying. We only // have to worry about the rendering case. ***************************************************************************/ _X_EXPORT Status XvMCGetSubpictureStatus(Display *display, XvMCSubpicture *subpicture, int *stat) { i810XvMCSubpicture *privSubpicture; i810XvMCContext *pI810XvMC; if((display == NULL) || (stat == NULL)) { return BadValue; } if((subpicture == NULL) || (subpicture->privData == NULL)) { return (error_base + XvMCBadSubpicture); } *stat = 0; privSubpicture = (i810XvMCSubpicture *)subpicture->privData; pI810XvMC = (i810XvMCContext *)privSubpicture->privContext; if(pI810XvMC == NULL) { return (error_base + XvMCBadSubpicture); } I810_LOCK(pI810XvMC,0); if(privSubpicture->last_render && (privSubpicture->last_render > GET_RSTATUS(pI810XvMC))) { *stat |= XVMC_RENDERING; } I810_UNLOCK(pI810XvMC); return Success; } #define NUM_XVMC_ATTRIBUTES 4 static XvAttribute I810_XVMC_ATTRIBUTES[] = { {XvGettable | XvSettable, 0, 0xffffff, "XV_COLORKEY"}, {XvGettable | XvSettable, -127, +127, "XV_BRIGHTNESS"}, {XvGettable | XvSettable, 0, 0x1ff, "XV_CONTRAST"}, {XvGettable | XvSettable, 0, 0x3ff, "XV_SATURATION"} }; /*************************************************************************** // Function: XvMCQueryAttributes // Description: An array of XvAttributes of size "number" is returned by // this function. If there are no attributes, NULL is returned and number // is set to 0. The array may be freed with free(). // // Arguments: // display - Connection to the X server. // context - The context whos attributes we are querying. // number - The number of returned atoms. // // Returns: // An array of XvAttributes. // Notes: // For i810 we support these Attributes: // XV_COLORKEY: The colorkey value, initialized from the Xv value at // context creation time. // XV_BRIGHTNESS // XV_CONTRAST // XV_SATURATION ***************************************************************************/ _X_EXPORT XvAttribute *XvMCQueryAttributes(Display *display, XvMCContext *context, int *number) { i810XvMCContext *pI810XvMC; XvAttribute *attributes; if(number == NULL) { return NULL; } if(display == NULL) { *number = 0; return NULL; } if(context == NULL) { *number = 0; return NULL; } pI810XvMC = context->privData; if(pI810XvMC == NULL) { *number = 0; return NULL; } attributes = (XvAttribute *)malloc(NUM_XVMC_ATTRIBUTES * sizeof(XvAttribute)); if(attributes == NULL) { *number = 0; return NULL; } memcpy(attributes,I810_XVMC_ATTRIBUTES,(NUM_XVMC_ATTRIBUTES * sizeof(XvAttribute))); *number = NUM_XVMC_ATTRIBUTES; return attributes; } /*************************************************************************** // Function: XvMCSetAttribute // Description: This function sets a context-specific attribute. // // Arguments: // display - Connection to the X server. // context - The context whos attributes we are querying. // attribute - The X atom of the attribute to be changed. // value - The new value for the attribute. // // Returns: // Status // Notes: // For i810 we support these Attributes: // XV_COLORKEY: The colorkey value, initialized from the Xv value at // context creation time. // XV_BRIGHTNESS // XV_CONTRAST // XV_SATURATION ***************************************************************************/ _X_EXPORT Status XvMCSetAttribute(Display *display, XvMCContext *context, Atom attribute, int value) { i810XvMCContext *pI810XvMC; if(display == NULL) { return BadValue; } if(context == NULL) { return (error_base + XvMCBadContext); } pI810XvMC = context->privData; if(pI810XvMC == NULL) { return (error_base + XvMCBadContext); } if(attribute == pI810XvMC->xv_colorkey) { if((value < I810_XVMC_ATTRIBUTES[0].min_value) || (value > I810_XVMC_ATTRIBUTES[0].max_value)) { return BadValue; } pI810XvMC->colorkey = value; return Success; } if(attribute == pI810XvMC->xv_brightness) { if((value < I810_XVMC_ATTRIBUTES[1].min_value) || (value > I810_XVMC_ATTRIBUTES[1].max_value)) { return BadValue; } pI810XvMC->brightness = value; return Success; } if(attribute == pI810XvMC->xv_saturation) { if((value < I810_XVMC_ATTRIBUTES[2].min_value) || (value > I810_XVMC_ATTRIBUTES[2].max_value)) { return BadValue; } pI810XvMC->saturation = value; return Success; } if(attribute == pI810XvMC->xv_contrast) { if((value < I810_XVMC_ATTRIBUTES[3].min_value) || (value > I810_XVMC_ATTRIBUTES[3].max_value)) { return BadValue; } pI810XvMC->contrast = value; return Success; } return BadValue; } /*************************************************************************** // Function: XvMCGetAttribute // Description: This function queries a context-specific attribute and // returns the value. // // Arguments: // display - Connection to the X server. // context - The context whos attributes we are querying. // attribute - The X atom of the attribute to be queried // value - The returned attribute value // // Returns: // Status // Notes: // For i810 we support these Attributes: // XV_COLORKEY: The colorkey value, initialized from the Xv value at // context creation time. // XV_BRIGHTNESS // XV_CONTRAST // XV_SATURATION ***************************************************************************/ _X_EXPORT Status XvMCGetAttribute(Display *display, XvMCContext *context, Atom attribute, int *value) { i810XvMCContext *pI810XvMC; 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xf86-video-intel-2.99.917/src/legacy/i810/xvmc/I810XvMC.h0000664000175000017500000003303712244635610016761 00000000000000/*************************************************************************** Copyright 2001 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /*************************************************************************** * libI810XvMC.h: MC Driver i810 includes * * Authors: * Matt Sottek * * ***************************************************************************/ #ifndef I810XVMC_H #define I810XVMC_H /* #define XVMC_DEBUG(x) do {x; }while(0); */ #define XVMC_DEBUG(x) #include #include "xf86drm.h" #include "../i810_common.h" #include /*************************************************************************** // i810OverlayRec: Structure that is used to reference the overlay // register memory. A i810OverlayRecPtr is set to the address of the // allocated overlay registers. ***************************************************************************/ typedef struct _i810OverlayRec { unsigned int OBUF_0Y; unsigned int OBUF_1Y; unsigned int OBUF_0U; unsigned int OBUF_0V; unsigned int OBUF_1U; unsigned int OBUF_1V; unsigned int OV0STRIDE; unsigned int YRGB_VPH; unsigned int UV_VPH; unsigned int HORZ_PH; unsigned int INIT_PH; unsigned int DWINPOS; unsigned int DWINSZ; unsigned int SWID; unsigned int SWIDQW; unsigned int SHEIGHT; unsigned int YRGBSCALE; unsigned int UVSCALE; unsigned int OV0CLRC0; unsigned int OV0CLRC1; unsigned int DCLRKV; unsigned int DCLRKM; unsigned int SCLRKVH; unsigned int SCLRKVL; unsigned int SCLRKM; unsigned int OV0CONF; unsigned int OV0CMD; } i810OverlayRec, *i810OverlayRecPtr; /*************************************************************************** // i810XvMCDrmMap: Holds the data about the DRM maps ***************************************************************************/ typedef struct _i810XvMCDrmMap { drm_handle_t offset; drmAddress address; unsigned int size; } i810XvMCDrmMap, *i810XvMCDrmMapPtr; /*************************************************************************** // i810XvMCContext: Private Context data referenced via the privData // pointer in the XvMCContext structure. ***************************************************************************/ typedef struct _i810XvMCContext { int fd; /* File descriptor for /dev/dri */ i810XvMCDrmMap overlay; i810XvMCDrmMap surfaces; drmBufMapPtr dmabufs; /* Data structure to hold available dma buffers */ drm_context_t drmcontext; unsigned int last_render; unsigned int last_flip; unsigned short ref; unsigned short current; int lock; /* Lightweight lock to avoid locking twice */ char busIdString[10]; /* PCI:0:1:0 or PCI:0:2:0 */ i810OverlayRecPtr oregs; unsigned int dual_prime; /* Flag to identify when dual prime is in use. */ unsigned int fb_base; Atom xv_colorkey; Atom xv_brightness; Atom xv_contrast; Atom xv_saturation; int brightness; int saturation; int contrast; int colorkey; } i810XvMCContext; /*************************************************************************** // i810XvMCSurface: Private data structure for each XvMCSurface. This // structure is referenced by the privData pointer in the XvMCSurface // structure. ***************************************************************************/ typedef struct _i810XvMCSurface { unsigned int pitch; unsigned int dbi1y; /* Destination buffer info command word 1 for Y */ unsigned int dbi1u; /* Destination buffer info command word 1 for U */ unsigned int dbi1v; /* Destination buffer info command word 1 for V */ unsigned int dbv1; /* Destination buffer variables command word 1 */ unsigned int mi1y; /* Map Info command word 1 (Minus bit 28) for Y */ unsigned int mi1u; /* Map Info command word 1 (Minus bit 28) for U */ unsigned int mi1v; /* Map Info command word 1 (Minus bit 28) for V */ unsigned int mi2y; /* Map info command word 2 for y */ unsigned int mi2u; /* Map info command word 2 for y */ unsigned int mi2v; /* Map info command word 2 for y */ unsigned int mi3y; /* Map info command word 3 */ unsigned int mi3u; /* Map info command word 3 */ unsigned int mi3v; /* Map info command word 3 */ unsigned int last_render; unsigned int last_flip; unsigned int second_field; /* Flags a surface that is only half done */ drmAddress data; drm_handle_t offset; unsigned int offsets[3]; i810XvMCContext *privContext; } i810XvMCSurface; /*************************************************************************** // i810XvMCSubpicture: Private data structure for each XvMCSubpicture. This // structure is referenced by the privData pointer in the XvMCSubpicture // structure. ***************************************************************************/ typedef struct _i810XvMCSubpicture { unsigned int pitch; unsigned int dbi1; /* Destination buffer info command word 1 */ unsigned int dbv1; /* Destination buffer variables command word */ unsigned int mi1; /* Map Info command word 1 (Minus bit 28) */ unsigned int mi2; /* Map info command word 2 */ unsigned int mi3; /* Map info command word 3 */ unsigned int last_render; unsigned int last_flip; drmAddress data; drm_handle_t offset; unsigned int offsets[1]; unsigned char palette[3][16]; i810XvMCContext *privContext; } i810XvMCSubpicture; typedef struct _Box { int x1,y1,x2,y2; } Box, *BoxPtr; /*************************************************************************** // drm_i810_overlay_t: Structure returned by overlay info ioctl. // NOTE: If you change this structure you will have to change the equiv. // structure in the kernel. ***************************************************************************/ typedef struct _drm_i810_overlay_t { unsigned int offset; unsigned int physical; } drm_i810_overlay_t; /*************************************************************************** // drm_i810_dma_t: Structure used by dma allocation ioctl. // NOTE: If you change this structure you will have to change the equiv. // structure in the kernel. ***************************************************************************/ typedef struct _drm_i810_dma { void *virtual; int request_idx; int request_size; int granted; } drm_i810_dma_t; /*************************************************************************** // drm_i810_mc_t: Structure used by mc dispatch ioctl. // NOTE: If you change this structure you will have to change the equiv. // structure in the kernel. ***************************************************************************/ typedef struct _drm_i810_mc { int idx; /* buffer index */ int used; /* nr bytes in use */ int num_blocks; /* number of GFXBlocks */ int *length; /* List of lengths for GFXBlocks */ unsigned int last_render; /* Last render request */ } drm_i810_mc_t; /* Subpicture fourcc */ #define FOURCC_IA44 0x34344149 /* Static Parameters */ #define I810_XVMC_MAXWIDTH 720 #define I810_XVMC_MAXHEIGHT 576 #define I810_DEFAULT16_COLORKEY 31 #define I810_DMA_BUF_NR 256 /* COMMANDS */ #define CMD_FLUSH ((4<<23) | 0x1) #define BOOLEAN_ENA_1 ((3<<29) | (3<<24) | (3<<2)) #define BOOLEAN_ENA_2 ((3<<29) | (4<<24) | (3<<16) | (1<<3) | (1<<2)) #define DEST_BUFFER_INFO (0x15<<23) #define DEST_BUFFER_VAR ((0x3<<29) | (0x1d<<24) | (0x85<<16)) #define DRAWING_RECT_INFO ((3<<29) | (0x1d<<24) | (0x80<<16) | 3) #define GFXBLOCK ((0x3<<29) | (0x1e<<24)) #define CMD_MAP_INFO ((0x3<<29) | (0x1d<<24) | 0x2) #define MAP_PALETTE_LOAD ((3<<29) | (0x1d<<24) | (0x82<<16) | 0xff) #define VERTEX_FORMAT ((3<<29) | (0x5<<24)) #define SRC_DEST_BLEND_MONO ((3<<29) | (8<<24)) /* Bit Patterns */ /* * OV0CMD - Overlay Command Register */ #define VERTICAL_CHROMINANCE_FILTER 0x70000000 #define VC_SCALING_OFF 0x00000000 #define VC_LINE_REPLICATION 0x10000000 #define VC_UP_INTERPOLATION 0x20000000 #define VC_PIXEL_DROPPING 0x50000000 #define VC_DOWN_INTERPOLATION 0x60000000 #define VERTICAL_LUMINANCE_FILTER 0x0E000000 #define VL_SCALING_OFF 0x00000000 #define VL_LINE_REPLICATION 0x02000000 #define VL_UP_INTERPOLATION 0x04000000 #define VL_PIXEL_DROPPING 0x0A000000 #define VL_DOWN_INTERPOLATION 0x0C000000 #define HORIZONTAL_CHROMINANCE_FILTER 0x01C00000 #define HC_SCALING_OFF 0x00000000 #define HC_LINE_REPLICATION 0x00400000 #define HC_UP_INTERPOLATION 0x00800000 #define HC_PIXEL_DROPPING 0x01400000 #define HC_DOWN_INTERPOLATION 0x01800000 #define HORIZONTAL_LUMINANCE_FILTER 0x00380000 #define HL_SCALING_OFF 0x00000000 #define HL_LINE_REPLICATION 0x00080000 #define HL_UP_INTERPOLATION 0x00100000 #define HL_PIXEL_DROPPING 0x00280000 #define HL_DOWN_INTERPOLATION 0x00300000 #define Y_ADJUST 0x00010000 #define OV_BYTE_ORDER 0x0000C000 #define UV_SWAP 0x00004000 #define Y_SWAP 0x00008000 #define Y_AND_UV_SWAP 0x0000C000 #define SOURCE_FORMAT 0x00003C00 #define RGB_555 0x00000800 #define RGB_565 0x00000C00 #define YUV_422 0x00002000 #define YUV_411 0x00002400 #define YUV_420 0x00003000 #define YUV_410 0x00003800 #define VERTICAL_PHASE_BOTH 0x00000020 #define FLIP_TYPE_FIELD 0x00000020 #define FLIP_TYPE_FRAME 0x00000000 #define BUFFER_AND_FIELD 0x00000006 #define BUFFER0_FIELD0 0x00000000 #define BUFFER0_FIELD1 0x00000002 #define BUFFER1_FIELD0 0x00000004 #define BUFFER1_FIELD1 0x00000006 #define OVERLAY_ENABLE 0x00000001 /* * DOV0STA - Display/Overlay 0 Status Register */ #define DOV0STA 0x30008 #define OV0ADD 0x30000 #define MINUV_SCALE 0x1 #define RGB16ToColorKey(c) \ (((c & 0xF800) << 8) | ((c & 0x07E0) << 5) | ((c & 0x001F) << 3)) /* Locking Macros lightweight lock used to prevent relocking */ #define I810_LOCK(c,f) \ if(!c->lock) { \ drmGetLock(c->fd, c->drmcontext, f); \ } \ c->lock++; #define I810_UNLOCK(c) \ c->lock--; \ if(!c->lock) { \ drmUnlock(c->fd, c->drmcontext); \ } /* Block until the passed in value (n) is the active buffer on the overlay. */ #define BLOCK_OVERLAY(c,n) \ do { \ int temp,i=0; \ while(i < 100000) { \ temp = GET_FSTATUS(c); \ if(((temp & (1<<20))>>20) == n) { \ break; \ } \ usleep(10); \ } \ if(i == 100000) { \ printf("Overlay Lockup.\n"); \ return BadAlloc; \ } \ }while(0); #define OVERLAY_INFO(c,i) drmCommandRead(c->fd, DRM_I810_OV0INFO, &i, sizeof(i)) #define OVERLAY_FLIP(c) drmCommandNone(c->fd, DRM_I810_OV0FLIP) #define GET_FSTATUS(c) drmCommandNone(c->fd, DRM_I810_FSTATUS) #define I810_MC(c,mc) drmCommandWrite(c->fd, DRM_I810_MC, &mc, sizeof(mc)) #define GET_RSTATUS(c) drmCommandNone(c->fd, DRM_I810_RSTATUS) #define GET_BUFFER(c,dma) drmCommandWriteRead(c->fd, DRM_I810_GETBUF, &dma, sizeof(drmI810DMA)) #define FLUSH(c) drmCommandNone(c->fd, DRM_I810_FLUSH) /* Definitions for temporary wire protocol hooks to be replaced when a HW independent libXvMC is created. */ extern Status _xvmc_create_context(Display *dpy, XvMCContext *context, int *priv_count, uint **priv_data); extern Status _xvmc_destroy_context(Display *dpy, XvMCContext *context); extern Status _xvmc_create_surface(Display *dpy, XvMCContext *context, XvMCSurface *surface, int *priv_count, uint **priv_data); extern Status _xvmc_destroy_surface(Display *dpy, XvMCSurface *surface); extern Status _xvmc_create_subpicture(Display *dpy, XvMCContext *context, XvMCSubpicture *subpicture, int *priv_count, uint **priv_data); extern Status _xvmc_destroy_subpicture(Display *dpy, XvMCSubpicture *subpicture); /* Prototypes */ drmBufPtr i810_get_free_buffer(i810XvMCContext *pI810XvMC); void i810_free_privContext(i810XvMCContext *pI810XvMC); void dp(unsigned int *address, unsigned int i); #endif xf86-video-intel-2.99.917/src/legacy/i810/i810.h0000664000175000017500000002115112244635610015300 00000000000000 /************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. Copyright © 2002 David Dawes All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * Authors: * Keith Whitwell * David Dawes * */ #ifndef _I810_H_ #define _I810_H_ #include #include "compiler.h" #include "xf86Pci.h" #include "i810_reg.h" #ifdef HAVE_XAA_H #include "xaa.h" #endif #include "xf86Cursor.h" #include "xf86xv.h" #include "vbe.h" #include "vgaHW.h" #include "xorg-server.h" #include #include "compat-api.h" #ifdef HAVE_DRI1 #include "xf86drm.h" #include "sarea.h" #define _XF86DRI_SERVER_ #include "dri.h" #include "i810_dri.h" #endif #include "i810_common.h" #include "i810_ring.h" #include "intel_driver.h" /* HWMC Surfaces */ #define I810_MAX_SURFACES 7 #define I810_MAX_SUBPICTURES 2 #define I810_TOTAL_SURFACES 9 /* Globals */ typedef struct _I810Rec *I810Ptr; extern void I810SetTiledMemory(ScrnInfoPtr pScrn, int nr, unsigned start, unsigned pitch, unsigned size); typedef struct { unsigned long Start; unsigned long End; unsigned long Size; } I810MemRange; typedef struct { int tail_mask; I810MemRange mem; unsigned char *virtual_start; int head; int tail; int space; } I810RingBuffer; typedef struct { unsigned char DisplayControl; unsigned char PixelPipeCfg0; unsigned char PixelPipeCfg1; unsigned char PixelPipeCfg2; unsigned short VideoClk2_M; unsigned short VideoClk2_N; unsigned char VideoClk2_DivisorSel; unsigned char AddressMapping; unsigned char IOControl; unsigned char BitBLTControl; unsigned char ExtVertTotal; unsigned char ExtVertDispEnd; unsigned char ExtVertSyncStart; unsigned char ExtVertBlankStart; unsigned char ExtHorizTotal; unsigned char ExtHorizBlank; unsigned char ExtOffset; unsigned char InterlaceControl; unsigned int LMI_FIFO_Watermark; unsigned int LprbTail; unsigned int LprbHead; unsigned int LprbStart; unsigned int LprbLen; unsigned int Fence[8]; unsigned short OverlayActiveStart; unsigned short OverlayActiveEnd; } I810RegRec, *I810RegPtr; typedef struct _I810Rec { unsigned char *MMIOBase; unsigned char *FbBase; long FbMapSize; long DepthOffset; long BackOffset; int cpp; int MaxClock; unsigned int bufferOffset; /* for I810SelectBuffer */ Bool DoneFrontAlloc; BoxRec FbMemBox; I810MemRange FrontBuffer; I810MemRange BackBuffer; I810MemRange DepthBuffer; I810MemRange TexMem; I810MemRange Scratch; I810MemRange BufferMem; I810MemRange ContextMem; I810MemRange MC; int auxPitch; int auxPitchBits; Bool CursorIsARGB; int CursorOffset; unsigned long CursorPhysical; unsigned long CursorStart; int CursorARGBOffset; unsigned long CursorARGBPhysical; unsigned long CursorARGBStart; unsigned long OverlayPhysical; unsigned long OverlayStart; int colorKey; unsigned int surfaceAllocation[I810_TOTAL_SURFACES]; int numSurfaces; DGAModePtr DGAModes; int numDGAModes; Bool DGAactive; int DGAViewportStatus; int Chipset; unsigned long LinearAddr; unsigned long MMIOAddr; EntityInfoPtr pEnt; struct pci_device *PciInfo; I810RingBuffer *LpRing; unsigned int BR[20]; int LmFreqSel; int VramKey; unsigned long VramOffset; int DcacheKey; unsigned long DcacheOffset; int HwcursKey; unsigned long HwcursOffset; int ARGBHwcursKey; unsigned long ARGBHwcursOffset; int GttBound; I810MemRange DcacheMem; I810MemRange SysMem; I810MemRange SavedDcacheMem; I810MemRange SavedSysMem; unsigned char **ScanlineColorExpandBuffers; int NumScanlineColorExpandBuffers; int nextColorExpandBuf; I810RegRec SavedReg; I810RegRec ModeReg; #ifdef HAVE_XAA_H XAAInfoRecPtr AccelInfoRec; #endif xf86CursorInfoPtr CursorInfoRec; CloseScreenProcPtr CloseScreen; ScreenBlockHandlerProcPtr BlockHandler; Bool directRenderingDisabled; /* DRI disabled in PreInit */ Bool directRenderingEnabled; /* false if XF86DRI not defined. */ #ifdef HAVE_DRI1 int LockHeld; DRIInfoPtr pDRIInfo; int drmSubFD; int numVisualConfigs; unsigned long dcacheHandle; unsigned long backHandle; unsigned long zHandle; unsigned long cursorHandle; unsigned long cursorARGBHandle; unsigned long xvmcHandle; unsigned long sysmemHandle; Bool agpAcquired; drm_handle_t buffer_map; drm_handle_t ring_map; drm_handle_t overlay_map; drm_handle_t mc_map; drm_handle_t xvmcContext; #endif Bool agpAcquired2d; XF86VideoAdaptorPtr adaptor; OptionInfoPtr Options; int configured_device; Bool showCache; Bool noAccel; Bool allowPageFlip; Bool have3DWindows; int drmMinor; } I810Rec; #define I810PTR(p) ((I810Ptr)((p)->driverPrivate)) #define I810_SELECT_FRONT 0 #define I810_SELECT_BACK 1 #define I810_SELECT_DEPTH 2 #ifdef HAVE_DRI1 extern Bool I810DRIScreenInit(ScreenPtr pScreen); extern void I810DRICloseScreen(ScreenPtr pScreen); extern Bool I810DRIFinishScreenInit(ScreenPtr pScreen); extern Bool I810DRILeave(ScrnInfoPtr pScrn); extern Bool I810DRIEnter(ScrnInfoPtr pScrn); #endif extern Bool I810InitDma(ScrnInfoPtr pScrn); extern Bool I810CleanupDma(ScrnInfoPtr pScrn); #define I810PTR(p) ((I810Ptr)((p)->driverPrivate)) #define I810REGPTR(p) (&(I810PTR(p)->ModeReg)) extern Bool I810CursorInit(ScreenPtr pScreen); #ifdef HAVE_XAA_H extern Bool I810AccelInit(ScreenPtr pScreen); #else static inline Bool I810AccelInit(ScreenPtr pScreen) { return TRUE; } #endif extern void I810SetPIOAccess(I810Ptr pI810); extern void I810SetMMIOAccess(I810Ptr pI810); extern unsigned int I810CalcWatermark(ScrnInfoPtr pScrn, double freq, Bool dcache); extern void I810PrintErrorState(ScrnInfoPtr pScrn); extern int I810WaitLpRing(ScrnInfoPtr pScrn, int n, int timeout_millis); extern void I810Sync(ScrnInfoPtr pScrn); extern unsigned long I810LocalToPhysical(ScrnInfoPtr pScrn, unsigned long local); extern int I810AllocLow(I810MemRange * result, I810MemRange * pool, int size); extern int I810AllocHigh(I810MemRange * result, I810MemRange * pool, int size); extern Bool I810AllocateFront(ScrnInfoPtr pScrn); extern int I810AllocateGARTMemory(ScrnInfoPtr pScrn); extern void I810FreeGARTMemory(ScrnInfoPtr pScrn); extern Bool I810BindGARTMemory(ScrnInfoPtr pScrn); extern Bool I810UnbindGARTMemory(ScrnInfoPtr pScrn); extern int I810CheckAvailableMemory(ScrnInfoPtr pScrn); extern Bool I810SwitchMode(SWITCH_MODE_ARGS_DECL); extern void I810AdjustFrame(ADJUST_FRAME_ARGS_DECL); extern void I810SetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir, int ydir, int rop, unsigned int planemask, int trans_color); extern void I810SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int srcX, int srcY, int dstX, int dstY, int w, int h); extern void I810SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop, unsigned int planemask); extern void I810SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y, int w, int h); extern void I810SelectBuffer(ScrnInfoPtr pScrn, int buffer); extern void I810RefreshRing(ScrnInfoPtr pScrn); extern void I810EmitFlush(ScrnInfoPtr pScrn); extern Bool I810DGAInit(ScreenPtr pScreen); extern void I810InitVideo(ScreenPtr pScreen); extern void I810InitMC(ScreenPtr pScreen); extern const OptionInfoRec *I810AvailableOptions(int chipid, int busid); extern const int I810CopyROP[16]; const int I810PatternROP[16]; #endif /* _I810_H_ */ xf86-video-intel-2.99.917/src/legacy/i810/i810_driver.c0000664000175000017500000015746012432737457016676 00000000000000 /************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif /* * Authors: * Keith Whitwell * * Add ARGB HW cursor support: * Alan Hourihane * */ /* * This server does not support these XFree86 4.0 features yet * shadowFb (if requested or acceleration is off) * Overlay planes * DGA */ #include #include #include /* * These are X and server generic header files. */ #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "xf86cmap.h" #include "compiler.h" #include "vgaHW.h" #include "mipointer.h" #include "micmap.h" #include "fb.h" #include "miscstruct.h" #include "xf86xv.h" #include #include "vbe.h" #include "xf86fbman.h" #include "i810.h" #ifdef HAVE_DRI1 #include "dri.h" #endif #include "../legacy.h" static Bool I810PreInit(ScrnInfoPtr pScrn, int flags); static Bool I810ScreenInit(SCREEN_INIT_ARGS_DECL); static Bool I810EnterVT(VT_FUNC_ARGS_DECL); static void I810LeaveVT(VT_FUNC_ARGS_DECL); static Bool I810CloseScreen(CLOSE_SCREEN_ARGS_DECL); static Bool I810SaveScreen(ScreenPtr pScreen, Bool unblank); static void I810FreeScreen(FREE_SCREEN_ARGS_DECL); static void I810DisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagermentMode, int flags); static ModeStatus I810ValidMode(SCRN_ARG_TYPE arg, DisplayModePtr mode, Bool verbose, int flags); typedef enum { OPTION_NOACCEL, OPTION_SW_CURSOR, OPTION_COLOR_KEY, OPTION_CACHE_LINES, OPTION_DAC_6BIT, OPTION_DRI, OPTION_NO_DDC, OPTION_SHOW_CACHE, OPTION_XVMC_SURFACES, OPTION_PAGEFLIP } I810Opts; static const OptionInfoRec I810Options[] = { {OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE}, {OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE}, {OPTION_COLOR_KEY, "ColorKey", OPTV_INTEGER, {0}, FALSE}, {OPTION_CACHE_LINES, "CacheLines", OPTV_INTEGER, {0}, FALSE}, {OPTION_DAC_6BIT, "Dac6Bit", OPTV_BOOLEAN, {0}, FALSE}, {OPTION_DRI, "DRI", OPTV_BOOLEAN, {0}, FALSE}, {OPTION_NO_DDC, "NoDDC", OPTV_BOOLEAN, {0}, FALSE}, {OPTION_SHOW_CACHE, "ShowCache", OPTV_BOOLEAN, {0}, FALSE}, {OPTION_XVMC_SURFACES, "XvMCSurfaces", OPTV_INTEGER, {0}, FALSE}, {OPTION_PAGEFLIP, "PageFlip", OPTV_BOOLEAN, {0}, FALSE}, {-1, NULL, OPTV_NONE, {0}, FALSE} }; /* *INDENT-ON* */ #ifndef I810_DEBUG int I810_DEBUG = (0 /* | DEBUG_ALWAYS_SYNC */ /* | DEBUG_VERBOSE_ACCEL */ /* | DEBUG_VERBOSE_SYNC */ /* | DEBUG_VERBOSE_VGA */ /* | DEBUG_VERBOSE_RING */ /* | DEBUG_VERBOSE_OUTREG */ /* | DEBUG_VERBOSE_MEMORY */ /* | DEBUG_VERBOSE_CURSOR */ ); #endif #ifdef HAVE_DRI1 static int i810_pitches[] = { 512, 1024, 2048, 4096, 0 }; #endif /* * I810GetRec and I810FreeRec -- * * Private data for the driver is stored in the screen structure. * These two functions create and destroy that private data. * */ static Bool I810GetRec(ScrnInfoPtr scrn) { if (((uintptr_t)scrn->driverPrivate & 3) == 0) return TRUE; scrn->driverPrivate = xnfcalloc(sizeof(I810Rec), 1); return TRUE; } static void I810FreeRec(ScrnInfoPtr scrn) { if (!scrn) return; if (!scrn->driverPrivate) return; free(scrn->driverPrivate); scrn->driverPrivate = NULL; } struct pci_device * intel_host_bridge (void) { static const struct pci_slot_match bridge_match = { 0, 0, 0, PCI_MATCH_ANY, 0 }; struct pci_device_iterator *slot_iterator; struct pci_device *bridge; slot_iterator = pci_slot_match_iterator_create (&bridge_match); bridge = pci_device_next (slot_iterator); pci_iterator_destroy (slot_iterator); return bridge; } static void I810ProbeDDC(ScrnInfoPtr scrn, int index) { vbeInfoPtr pVbe; if (xf86LoadSubModule(scrn, "vbe")) { pVbe = VBEInit(NULL, index); ConfiguredMonitor = vbeDoEDID(pVbe, NULL); vbeFree(pVbe); } } static xf86MonPtr I810DoDDC(ScrnInfoPtr scrn, int index) { vbeInfoPtr pVbe; xf86MonPtr MonInfo = NULL; I810Ptr pI810 = I810PTR(scrn); /* Honour Option "noDDC" */ if (xf86ReturnOptValBool(pI810->Options, OPTION_NO_DDC, FALSE)) { return MonInfo; } if (xf86LoadSubModule(scrn, "vbe") && (pVbe = VBEInit(NULL, index))) { MonInfo = vbeDoEDID(pVbe, NULL); xf86PrintEDID(MonInfo); xf86SetDDCproperties(scrn, MonInfo); vbeFree(pVbe); } else { xf86DrvMsg(scrn->scrnIndex, X_INFO, "this driver cannot do DDC without VBE\n"); } return MonInfo; } /* * I810PreInit -- * * Do initial setup of the board before we know what resolution we will * be running at. * */ static Bool I810PreInit(ScrnInfoPtr scrn, int flags) { I810Ptr pI810; ClockRangePtr clockRanges; int i; MessageType from; int flags24; rgb defaultWeight = { 0, 0, 0 }; int mem; Bool enable; if (scrn->numEntities != 1) return FALSE; /* Allocate driverPrivate */ if (!I810GetRec(scrn)) return FALSE; pI810 = I810PTR(scrn); pI810->pEnt = xf86GetEntityInfo(scrn->entityList[0]); if (pI810->pEnt == NULL || pI810->pEnt->location.type != BUS_PCI) return FALSE; if (flags & PROBE_DETECT) { I810ProbeDDC(scrn, pI810->pEnt->index); return TRUE; } /* The vgahw module should be loaded here when needed */ if (!xf86LoadSubModule(scrn, "vgahw")) return FALSE; /* Allocate a vgaHWRec */ if (!vgaHWGetHWRec(scrn)) return FALSE; pI810->PciInfo = xf86GetPciInfoForEntity(pI810->pEnt->index); /* Set scrn->monitor */ scrn->monitor = scrn->confScreen->monitor; flags24 = Support24bppFb | PreferConvert32to24 | SupportConvert32to24; if (!xf86SetDepthBpp(scrn, 16, 0, 16, flags24)) { return FALSE; } else { switch (scrn->depth) { case 8: case 15: case 16: case 24: break; default: xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Given depth (%d) is not supported by i810 driver\n", scrn->depth); return FALSE; } } xf86PrintDepthBpp(scrn); switch (scrn->bitsPerPixel) { case 8: case 16: case 24: break; default: xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Given bpp (%d) is not supported by i810 driver\n", scrn->bitsPerPixel); return FALSE; } if (!xf86SetWeight(scrn, defaultWeight, defaultWeight)) return FALSE; if (!xf86SetDefaultVisual(scrn, -1)) return FALSE; /* We use a programmable clock */ scrn->progClock = TRUE; pI810->cpp = scrn->bitsPerPixel / 8; /* Process the options */ xf86CollectOptions(scrn, NULL); if (!(pI810->Options = malloc(sizeof(I810Options)))) return FALSE; memcpy(pI810->Options, I810Options, sizeof(I810Options)); xf86ProcessOptions(scrn->scrnIndex, scrn->options, pI810->Options); scrn->rgbBits = 8; if (xf86ReturnOptValBool(pI810->Options, OPTION_DAC_6BIT, FALSE)) scrn->rgbBits = 6; if (xf86ReturnOptValBool(pI810->Options, OPTION_SHOW_CACHE, FALSE)) pI810->showCache = TRUE; else pI810->showCache = FALSE; /* 6-BIT dac isn't reasonable for modes with > 8bpp */ if (xf86ReturnOptValBool(pI810->Options, OPTION_DAC_6BIT, FALSE) && scrn->bitsPerPixel > 8) { OptionInfoPtr ptr; ptr = xf86TokenToOptinfo(pI810->Options, OPTION_DAC_6BIT); ptr->found = FALSE; } if (xf86ReturnOptValBool(pI810->Options, OPTION_NOACCEL, FALSE)) pI810->noAccel = TRUE; if (!pI810->noAccel && !xf86LoadSubModule(scrn, "xaa")) pI810->noAccel = TRUE; #ifdef HAVE_DRI1 pI810->directRenderingDisabled = !xf86ReturnOptValBool(pI810->Options, OPTION_DRI, TRUE); if (!pI810->directRenderingDisabled) { if (scrn->depth!=16) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "DRI is disabled because it " "runs only at 16-bit depth.\n"); pI810->directRenderingDisabled=TRUE; } } #endif /* Get DDC info from monitor */ /* after xf86ProcessOptions, * because it is controlled by options [no]vbe and [no]ddc */ I810DoDDC(scrn, pI810->pEnt->index); intel_detect_chipset(scrn, NULL); pI810->LinearAddr = pI810->PciInfo->regions[0].base_addr; xf86DrvMsg(scrn->scrnIndex, X_PROBED, "Linear framebuffer at 0x%lX\n", (unsigned long)pI810->LinearAddr); pI810->MMIOAddr = pI810->PciInfo->regions[1].base_addr; xf86DrvMsg(scrn->scrnIndex, X_PROBED, "IO registers at addr 0x%lX\n", (unsigned long)pI810->MMIOAddr); /* AGP GART support is required. Don't proceed any further if it isn't * present. */ if (!xf86AgpGARTSupported()) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "AGP GART support is not available. Make sure your kernel has\n" "\tagpgart support or that the agpgart kernel module is loaded.\n"); return FALSE; } /* Find out memory bus frequency. */ { uint32_t whtcfg_pamr_drp; pci_device_cfg_read_u32(pI810->PciInfo, & whtcfg_pamr_drp, WHTCFG_PAMR_DRP); /* Need this for choosing watermarks. */ if ((whtcfg_pamr_drp & LM_FREQ_MASK) == LM_FREQ_133) pI810->LmFreqSel = 133; else pI810->LmFreqSel = 100; } /* Default to 4MB framebuffer, which is sufficient for all * supported 2d resolutions. If the user has specified a different * size in the XF86Config, use that amount instead. * * Changed to 8 Meg so we can have acceleration by default (Mark). */ mem = I810CheckAvailableMemory(scrn); if (pI810->directRenderingDisabled || mem < 131072) /* < 128 MB */ scrn->videoRam = 8192; else if (mem < 196608) scrn->videoRam = 16384; /* < 192 MB */ else scrn->videoRam = 24576; from = X_DEFAULT; if (pI810->pEnt->device->videoRam) { scrn->videoRam = pI810->pEnt->device->videoRam; from = X_CONFIG; } if (mem > 0 && mem < scrn->videoRam) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "%dk of memory was requested," " but the\n\t maximum AGP memory available is %dk.\n", scrn->videoRam, mem); from = X_PROBED; if (mem > (6 * 1024)) { xf86DrvMsg(scrn->scrnIndex, X_INFO, "Reducing video memory to 4MB\n"); scrn->videoRam = 4096; } else { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Less than 6MB of AGP memory" " is available. Cannot proceed.\n"); I810FreeRec(scrn); return FALSE; } } xf86DrvMsg(scrn->scrnIndex, from, "Will alloc AGP framebuffer: %d kByte\n", scrn->videoRam); /* Calculate Fixed Offsets depending on graphics aperture size */ { struct pci_device *bridge = intel_host_bridge (); uint32_t smram_miscc; pci_device_cfg_read_u32 (bridge, & smram_miscc, SMRAM_MISCC); if ((smram_miscc & GFX_MEM_WIN_SIZE) == GFX_MEM_WIN_32M) { pI810->FbMapSize = 0x1000000; pI810->DepthOffset = 0x1000000; pI810->BackOffset = 0x1800000; } else { pI810->FbMapSize = 0x3000000; pI810->DepthOffset = 0x3000000; pI810->BackOffset = 0x3800000; } } /* * If the driver can do gamma correction, it should call xf86SetGamma() * here. */ { Gamma zeros = { 0.0, 0.0, 0.0 }; if (!xf86SetGamma(scrn, zeros)) { return FALSE; } } pI810->MaxClock = 0; if (pI810->pEnt->device->dacSpeeds[0]) { switch (scrn->bitsPerPixel) { case 8: pI810->MaxClock = pI810->pEnt->device->dacSpeeds[DAC_BPP8]; break; case 16: pI810->MaxClock = pI810->pEnt->device->dacSpeeds[DAC_BPP16]; break; case 24: pI810->MaxClock = pI810->pEnt->device->dacSpeeds[DAC_BPP24]; break; case 32: /* not supported */ pI810->MaxClock = pI810->pEnt->device->dacSpeeds[DAC_BPP32]; break; } if (!pI810->MaxClock) pI810->MaxClock = pI810->pEnt->device->dacSpeeds[0]; } else { switch (scrn->bitsPerPixel) { case 8: pI810->MaxClock = 203000; break; case 16: pI810->MaxClock = 163000; break; case 24: pI810->MaxClock = 136000; break; case 32: /* not supported */ pI810->MaxClock = 86000; } } clockRanges = xnfcalloc(sizeof(ClockRange), 1); clockRanges->next = NULL; /* 9.4MHz appears to be the smallest that works. */ clockRanges->minClock = 9500; clockRanges->maxClock = pI810->MaxClock; clockRanges->clockIndex = -1; clockRanges->interlaceAllowed = TRUE; clockRanges->doubleScanAllowed = FALSE; i = xf86ValidateModes(scrn, scrn->monitor->Modes, scrn->display->modes, clockRanges, #ifndef HAVE_DRI1 0, 320, 1600, 64 * scrn->bitsPerPixel, #else i810_pitches, 0, 0, 64 * scrn->bitsPerPixel, #endif 200, 1200, scrn->display->virtualX, scrn->display->virtualY, scrn->videoRam * 1024, LOOKUP_BEST_REFRESH); if (i == -1) { I810FreeRec(scrn); return FALSE; } xf86PruneDriverModes(scrn); if (!i || !scrn->modes) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "No valid modes found\n"); I810FreeRec(scrn); return FALSE; } xf86SetCrtcForModes(scrn, INTERLACE_HALVE_V); scrn->currentMode = scrn->modes; xf86PrintModes(scrn); xf86SetDpi(scrn, 0, 0); if (!xf86LoadSubModule(scrn, "fb")) { I810FreeRec(scrn); return FALSE; } if (!xf86ReturnOptValBool(pI810->Options, OPTION_SW_CURSOR, FALSE)) { if (!xf86LoadSubModule(scrn, "ramdac")) { I810FreeRec(scrn); return FALSE; } } if (xf86GetOptValInteger (pI810->Options, OPTION_COLOR_KEY, &(pI810->colorKey))) { xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "video overlay key set to 0x%x\n", pI810->colorKey); } else { pI810->colorKey = (1 << scrn->offset.red) | (1 << scrn->offset.green) | (((scrn->mask.blue >> scrn->offset.blue) - 1) << scrn->offset.blue); } pI810->allowPageFlip=FALSE; enable = xf86ReturnOptValBool(pI810->Options, OPTION_PAGEFLIP, FALSE); #ifdef HAVE_DRI1 if (!pI810->directRenderingDisabled) { pI810->allowPageFlip = enable; if (pI810->allowPageFlip == TRUE) { if (!xf86LoadSubModule(scrn, "shadowfb")) { pI810->allowPageFlip = 0; xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Couldn't load shadowfb module:\n"); } } xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "page flipping %s\n", enable ? "enabled" : "disabled"); } #endif if (xf86GetOptValInteger(pI810->Options, OPTION_XVMC_SURFACES, &(pI810->numSurfaces))) { xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "%d XvMC Surfaces Requested.\n", pI810->numSurfaces); if (pI810->numSurfaces > 7) { xf86DrvMsg(scrn->scrnIndex, X_PROBED, "Using 7 XvMC Surfaces (Maximum Allowed).\n"); pI810->numSurfaces = 7; } if (pI810->numSurfaces < 6) { xf86DrvMsg(scrn->scrnIndex, X_PROBED, "Using 6 XvMC Surfaces (Minimum Allowed).\n"); pI810->numSurfaces = 6; } } else { xf86DrvMsg(scrn->scrnIndex, X_INFO, "XvMC is Disabled: use XvMCSurfaces config option to enable.\n"); pI810->numSurfaces = 0; } #ifdef HAVE_DRI1 /* Load the dri module if requested. */ if (xf86ReturnOptValBool(pI810->Options, OPTION_DRI, FALSE)) { xf86LoadSubModule(scrn, "dri"); } #endif return TRUE; } static Bool I810MapMMIO(ScrnInfoPtr scrn) { I810Ptr pI810 = I810PTR(scrn); struct pci_device *const device = pI810->PciInfo; int err; err = pci_device_map_range (device, pI810->MMIOAddr, I810_REG_SIZE, PCI_DEV_MAP_FLAG_WRITABLE, (void **) &pI810->MMIOBase); if (err) { xf86DrvMsg (scrn->scrnIndex, X_ERROR, "Unable to map mmio BAR. %s (%d)\n", strerror (err), err); return FALSE; } return TRUE; } static Bool I810MapMem(ScrnInfoPtr scrn) { I810Ptr pI810 = I810PTR(scrn); struct pci_device *const device = pI810->PciInfo; int err; if (!I810MapMMIO(scrn)) return FALSE; err = pci_device_map_range (device, pI810->LinearAddr, pI810->FbMapSize, PCI_DEV_MAP_FLAG_WRITABLE | PCI_DEV_MAP_FLAG_WRITE_COMBINE, (void **) &pI810->FbBase); if (err) { xf86DrvMsg (scrn->scrnIndex, X_ERROR, "Unable to map frame buffer BAR. %s (%d)\n", strerror (err), err); return FALSE; } pI810->LpRing->virtual_start = pI810->FbBase + pI810->LpRing->mem.Start; return TRUE; } static void I810UnmapMMIO(ScrnInfoPtr scrn) { I810Ptr pI810 = I810PTR(scrn); pci_device_unmap_range (pI810->PciInfo, pI810->MMIOBase, I810_REG_SIZE); pI810->MMIOBase = NULL; } static Bool I810UnmapMem(ScrnInfoPtr scrn) { I810Ptr pI810 = I810PTR(scrn); pci_device_unmap_range (pI810->PciInfo, pI810->FbBase, pI810->FbMapSize); pI810->FbBase = NULL; I810UnmapMMIO(scrn); return TRUE; } /* Famous last words */ void I810PrintErrorState(ScrnInfoPtr scrn) { I810Ptr pI810 = I810PTR(scrn); ErrorF("pgetbl_ctl: 0x%lx pgetbl_err: 0x%lx\n", (unsigned long) INREG(PGETBL_CTL), (unsigned long) INREG(PGE_ERR)); ErrorF("ipeir: %lx iphdr: %lx\n", (unsigned long) INREG(IPEIR), (unsigned long) INREG(IPEHR)); ErrorF("LP ring tail: %lx head: %lx len: %lx start %lx\n", (unsigned long) INREG(LP_RING + RING_TAIL), (unsigned long) INREG(LP_RING + RING_HEAD) & HEAD_ADDR, (unsigned long) INREG(LP_RING + RING_LEN), (unsigned long) INREG(LP_RING + RING_START)); ErrorF("eir: %x esr: %x emr: %x\n", INREG16(EIR), INREG16(ESR), INREG16(EMR)); ErrorF("instdone: %x instpm: %x\n", INREG16(INST_DONE), INREG8(INST_PM)); ErrorF("memmode: %lx instps: %lx\n", (unsigned long) INREG(MEMMODE), (unsigned long) INREG(INST_PS)); ErrorF("hwstam: %x ier: %x imr: %x iir: %x\n", INREG16(HWSTAM), INREG16(IER), INREG16(IMR), INREG16(IIR)); } /* * I810Save -- * * This function saves the video state. It reads all of the SVGA registers * into the vgaI810Rec data structure. There is in general no need to * mask out bits here - just read the registers. */ static void DoSave(ScrnInfoPtr scrn, vgaRegPtr vgaReg, I810RegPtr i810Reg, Bool saveFonts) { I810Ptr pI810; vgaHWPtr hwp; int i; pI810 = I810PTR(scrn); hwp = VGAHWPTR(scrn); /* * This function will handle creating the data structure and filling * in the generic VGA portion. */ if (saveFonts) vgaHWSave(scrn, vgaReg, VGA_SR_MODE | VGA_SR_FONTS | VGA_SR_CMAP); else vgaHWSave(scrn, vgaReg, VGA_SR_MODE | VGA_SR_CMAP); /* * The port I/O code necessary to read in the extended registers * into the fields of the vgaI810Rec structure goes here. */ i810Reg->IOControl = hwp->readCrtc(hwp, IO_CTNL); i810Reg->AddressMapping = hwp->readGr(hwp, ADDRESS_MAPPING); i810Reg->BitBLTControl = INREG8(BITBLT_CNTL); i810Reg->VideoClk2_M = INREG16(VCLK2_VCO_M); i810Reg->VideoClk2_N = INREG16(VCLK2_VCO_N); i810Reg->VideoClk2_DivisorSel = INREG8(VCLK2_VCO_DIV_SEL); i810Reg->ExtVertTotal = hwp->readCrtc(hwp, EXT_VERT_TOTAL); i810Reg->ExtVertDispEnd = hwp->readCrtc(hwp, EXT_VERT_DISPLAY); i810Reg->ExtVertSyncStart = hwp->readCrtc(hwp, EXT_VERT_SYNC_START); i810Reg->ExtVertBlankStart = hwp->readCrtc(hwp, EXT_VERT_BLANK_START); i810Reg->ExtHorizTotal = hwp->readCrtc(hwp, EXT_HORIZ_TOTAL); i810Reg->ExtHorizBlank = hwp->readCrtc(hwp, EXT_HORIZ_BLANK); i810Reg->ExtOffset = hwp->readCrtc(hwp, EXT_OFFSET); i810Reg->InterlaceControl = hwp->readCrtc(hwp, INTERLACE_CNTL); i810Reg->PixelPipeCfg0 = INREG8(PIXPIPE_CONFIG_0); i810Reg->PixelPipeCfg1 = INREG8(PIXPIPE_CONFIG_1); i810Reg->PixelPipeCfg2 = INREG8(PIXPIPE_CONFIG_2); i810Reg->DisplayControl = INREG8(DISPLAY_CNTL); i810Reg->LMI_FIFO_Watermark = INREG(FWATER_BLC); for (i = 0; i < 8; i++) i810Reg->Fence[i] = INREG(FENCE + i * 4); i810Reg->LprbTail = INREG(LP_RING + RING_TAIL); i810Reg->LprbHead = INREG(LP_RING + RING_HEAD); i810Reg->LprbStart = INREG(LP_RING + RING_START); i810Reg->LprbLen = INREG(LP_RING + RING_LEN); if ((i810Reg->LprbTail & TAIL_ADDR) != (i810Reg->LprbHead & HEAD_ADDR) && i810Reg->LprbLen & RING_VALID) { I810PrintErrorState(scrn); FatalError("Active ring not flushed\n"); } } static void I810Save(ScrnInfoPtr scrn) { vgaHWPtr hwp; I810Ptr pI810; uint32_t temp; hwp = VGAHWPTR(scrn); pI810 = I810PTR(scrn); DoSave(scrn, &hwp->SavedReg, &pI810->SavedReg, TRUE); temp = INREG(MEMMODE); temp |= 4; OUTREG(MEMMODE, temp); } static void i810PrintMode(vgaRegPtr vgaReg, I810RegPtr mode) { int i; ErrorF(" MiscOut: %x\n", vgaReg->MiscOutReg); ErrorF("SEQ: "); for (i = 0; i < vgaReg->numSequencer; i++) { if ((i & 7) == 0) ErrorF("\n"); ErrorF(" %d: %x", i, vgaReg->Sequencer[i]); } ErrorF("\n"); ErrorF("CRTC: "); for (i = 0; i < vgaReg->numCRTC; i++) { if ((i & 3) == 0) ErrorF("\n"); ErrorF(" %d: %x", i, vgaReg->CRTC[i]); } ErrorF("\n"); ErrorF("GFX: "); for (i = 0; i < vgaReg->numGraphics; i++) { if ((i & 7) == 0) ErrorF("\n"); ErrorF(" %d: %x", i, vgaReg->Graphics[i]); } ErrorF("\n"); ErrorF("ATTR: "); for (i = 0; i < vgaReg->numAttribute; i++) { if ((i & 7) == 0) ErrorF("\n"); ErrorF(" %d: %x", i, vgaReg->Attribute[i]); } ErrorF("\n"); ErrorF(" DisplayControl: %x\n", mode->DisplayControl); ErrorF(" PixelPipeCfg0: %x\n", mode->PixelPipeCfg0); ErrorF(" PixelPipeCfg1: %x\n", mode->PixelPipeCfg1); ErrorF(" PixelPipeCfg2: %x\n", mode->PixelPipeCfg2); ErrorF(" VideoClk2_M: %x\n", mode->VideoClk2_M); ErrorF(" VideoClk2_N: %x\n", mode->VideoClk2_N); ErrorF(" VideoClk2_DivisorSel: %x\n", mode->VideoClk2_DivisorSel); ErrorF(" AddressMapping: %x\n", mode->AddressMapping); ErrorF(" IOControl: %x\n", mode->IOControl); ErrorF(" BitBLTControl: %x\n", mode->BitBLTControl); ErrorF(" ExtVertTotal: %x\n", mode->ExtVertTotal); ErrorF(" ExtVertDispEnd: %x\n", mode->ExtVertDispEnd); ErrorF(" ExtVertSyncStart: %x\n", mode->ExtVertSyncStart); ErrorF(" ExtVertBlankStart: %x\n", mode->ExtVertBlankStart); ErrorF(" ExtHorizTotal: %x\n", mode->ExtHorizTotal); ErrorF(" ExtHorizBlank: %x\n", mode->ExtHorizBlank); ErrorF(" ExtOffset: %x\n", mode->ExtOffset); ErrorF(" InterlaceControl: %x\n", mode->InterlaceControl); ErrorF(" LMI_FIFO_Watermark: %x\n", mode->LMI_FIFO_Watermark); ErrorF(" LprbTail: %x\n", mode->LprbTail); ErrorF(" LprbHead: %x\n", mode->LprbHead); ErrorF(" LprbStart: %x\n", mode->LprbStart); ErrorF(" LprbLen: %x\n", mode->LprbLen); } static void DoRestore(ScrnInfoPtr scrn, vgaRegPtr vgaReg, I810RegPtr i810Reg, Bool restoreFonts) { I810Ptr pI810; vgaHWPtr hwp; unsigned char temp; unsigned int itemp; int i; pI810 = I810PTR(scrn); hwp = VGAHWPTR(scrn); if (I810_DEBUG & DEBUG_VERBOSE_VGA) { ErrorF("Setting mode in I810Restore:\n"); i810PrintMode(vgaReg, i810Reg); } vgaHWProtect(scrn, TRUE); usleep(50000); /* Turn off DRAM Refresh */ temp = INREG8(DRAM_ROW_CNTL_HI); temp &= ~DRAM_REFRESH_RATE; temp |= DRAM_REFRESH_DISABLE; OUTREG8(DRAM_ROW_CNTL_HI, temp); usleep(1000); /* Wait 1 ms */ /* Write the M, N and P values */ OUTREG16(VCLK2_VCO_M, i810Reg->VideoClk2_M); OUTREG16(VCLK2_VCO_N, i810Reg->VideoClk2_N); OUTREG8(VCLK2_VCO_DIV_SEL, i810Reg->VideoClk2_DivisorSel); /* * Turn on 8 bit dac mode, if requested. This is needed to make * sure that vgaHWRestore writes the values into the DAC properly. * The problem occurs if 8 bit dac mode is requested and the HW is * in 6 bit dac mode. If this happens, all the values are * automatically shifted left twice by the HW and incorrect colors * will be displayed on the screen. The only time this can happen * is at server startup time and when switching back from a VT. */ temp = INREG8(PIXPIPE_CONFIG_0); temp &= 0x7F; /* Save all but the 8 bit dac mode bit */ temp |= (i810Reg->PixelPipeCfg0 & DAC_8_BIT); OUTREG8(PIXPIPE_CONFIG_0, temp); /* * Code to restore any SVGA registers that have been saved/modified * goes here. Note that it is allowable, and often correct, to * only modify certain bits in a register by a read/modify/write cycle. * * A special case - when using an external clock-setting program, * this function must not change bits associated with the clock * selection. This condition can be checked by the condition: * * if (i810Reg->std.NoClock >= 0) * restore clock-select bits. */ if (restoreFonts) vgaHWRestore(scrn, vgaReg, VGA_SR_FONTS | VGA_SR_MODE | VGA_SR_CMAP); else vgaHWRestore(scrn, vgaReg, VGA_SR_MODE | VGA_SR_CMAP); hwp->writeCrtc(hwp, EXT_VERT_TOTAL, i810Reg->ExtVertTotal); hwp->writeCrtc(hwp, EXT_VERT_DISPLAY, i810Reg->ExtVertDispEnd); hwp->writeCrtc(hwp, EXT_VERT_SYNC_START, i810Reg->ExtVertSyncStart); hwp->writeCrtc(hwp, EXT_VERT_BLANK_START, i810Reg->ExtVertBlankStart); hwp->writeCrtc(hwp, EXT_HORIZ_TOTAL, i810Reg->ExtHorizTotal); hwp->writeCrtc(hwp, EXT_HORIZ_BLANK, i810Reg->ExtHorizBlank); hwp->writeCrtc(hwp, EXT_OFFSET, i810Reg->ExtOffset); temp = hwp->readCrtc(hwp, INTERLACE_CNTL); temp &= ~INTERLACE_ENABLE; temp |= i810Reg->InterlaceControl; hwp->writeCrtc(hwp, INTERLACE_CNTL, temp); temp = hwp->readGr(hwp, ADDRESS_MAPPING); temp &= 0xE0; /* Save reserved bits 7:5 */ temp |= i810Reg->AddressMapping; hwp->writeGr(hwp, ADDRESS_MAPPING, temp); /* Setting the OVRACT Register for video overlay */ { uint32_t LCD_TV_Control = INREG(LCD_TV_C); uint32_t TV_HTotal = INREG(LCD_TV_HTOTAL); uint32_t ActiveStart, ActiveEnd; if((LCD_TV_Control & LCD_TV_ENABLE) && !(LCD_TV_Control & LCD_TV_VGAMOD) && TV_HTotal) { ActiveStart = ((TV_HTotal >> 16) & 0xfff) - 31; ActiveEnd = (TV_HTotal & 0x3ff) - 31; } else { ActiveStart = i810Reg->OverlayActiveStart; ActiveEnd = i810Reg->OverlayActiveEnd; } OUTREG(LCD_TV_OVRACT, (ActiveEnd << 16) | ActiveStart); } /* Turn on DRAM Refresh */ temp = INREG8(DRAM_ROW_CNTL_HI); temp &= ~DRAM_REFRESH_RATE; temp |= DRAM_REFRESH_60HZ; OUTREG8(DRAM_ROW_CNTL_HI, temp); temp = INREG8(BITBLT_CNTL); temp &= ~COLEXP_MODE; temp |= i810Reg->BitBLTControl; OUTREG8(BITBLT_CNTL, temp); temp = INREG8(DISPLAY_CNTL); temp &= ~(VGA_WRAP_MODE | GUI_MODE); temp |= i810Reg->DisplayControl; OUTREG8(DISPLAY_CNTL, temp); temp = INREG8(PIXPIPE_CONFIG_0); temp &= 0x64; /* Save reserved bits 6:5,2 */ temp |= i810Reg->PixelPipeCfg0; OUTREG8(PIXPIPE_CONFIG_0, temp); temp = INREG8(PIXPIPE_CONFIG_2); temp &= 0xF3; /* Save reserved bits 7:4,1:0 */ temp |= i810Reg->PixelPipeCfg2; OUTREG8(PIXPIPE_CONFIG_2, temp); temp = INREG8(PIXPIPE_CONFIG_1); temp &= ~DISPLAY_COLOR_MODE; temp &= 0xEF; /* Restore the CRT control bit */ temp |= i810Reg->PixelPipeCfg1; OUTREG8(PIXPIPE_CONFIG_1, temp); OUTREG16(EIR, 0); itemp = INREG(FWATER_BLC); itemp &= ~(LM_BURST_LENGTH | LM_FIFO_WATERMARK | MM_BURST_LENGTH | MM_FIFO_WATERMARK); itemp |= i810Reg->LMI_FIFO_Watermark; OUTREG(FWATER_BLC, itemp); for (i = 0; i < 8; i++) { OUTREG(FENCE + i * 4, i810Reg->Fence[i]); if (I810_DEBUG & DEBUG_VERBOSE_VGA) ErrorF("Fence Register : %x\n", i810Reg->Fence[i]); } /* First disable the ring buffer (Need to wait for empty first?, if so * should probably do it before entering this section) */ itemp = INREG(LP_RING + RING_LEN); itemp &= ~RING_VALID_MASK; OUTREG(LP_RING + RING_LEN, itemp); /* Set up the low priority ring buffer. */ OUTREG(LP_RING + RING_TAIL, 0); OUTREG(LP_RING + RING_HEAD, 0); pI810->LpRing->head = 0; pI810->LpRing->tail = 0; itemp = INREG(LP_RING + RING_START); itemp &= ~(START_ADDR); itemp |= i810Reg->LprbStart; OUTREG(LP_RING + RING_START, itemp); itemp = INREG(LP_RING + RING_LEN); itemp &= ~(RING_NR_PAGES | RING_REPORT_MASK | RING_VALID_MASK); itemp |= i810Reg->LprbLen; OUTREG(LP_RING + RING_LEN, itemp); if (!(vgaReg->Attribute[0x10] & 0x1)) { usleep(50000); if (restoreFonts) vgaHWRestore(scrn, vgaReg, VGA_SR_FONTS | VGA_SR_MODE | VGA_SR_CMAP); else vgaHWRestore(scrn, vgaReg, VGA_SR_MODE | VGA_SR_CMAP); } vgaHWProtect(scrn, FALSE); temp = hwp->readCrtc(hwp, IO_CTNL); temp &= ~(EXTENDED_ATTR_CNTL | EXTENDED_CRTC_CNTL); temp |= i810Reg->IOControl; hwp->writeCrtc(hwp, IO_CTNL, temp); } static void I810SetRingRegs(ScrnInfoPtr scrn) { unsigned int itemp; I810Ptr pI810 = I810PTR(scrn); OUTREG(LP_RING + RING_TAIL, 0); OUTREG(LP_RING + RING_HEAD, 0); itemp = INREG(LP_RING + RING_START); itemp &= ~(START_ADDR); itemp |= pI810->LpRing->mem.Start; OUTREG(LP_RING + RING_START, itemp); itemp = INREG(LP_RING + RING_LEN); itemp &= ~(RING_NR_PAGES | RING_REPORT_MASK | RING_VALID_MASK); itemp |= ((pI810->LpRing->mem.Size - 4096) | RING_NO_REPORT | RING_VALID); OUTREG(LP_RING + RING_LEN, itemp); } static void I810Restore(ScrnInfoPtr scrn) { vgaHWPtr hwp; I810Ptr pI810; hwp = VGAHWPTR(scrn); pI810 = I810PTR(scrn); DoRestore(scrn, &hwp->SavedReg, &pI810->SavedReg, TRUE); } /* * I810CalcVCLK -- * * Determine the closest clock frequency to the one requested. */ #define MAX_VCO_FREQ 600.0 #define TARGET_MAX_N 30 #define REF_FREQ 24.0 #define CALC_VCLK(m,n,p) \ (double)m / ((double)n * (1 << p)) * 4 * REF_FREQ static void I810CalcVCLK(ScrnInfoPtr scrn, double freq) { I810Ptr pI810 = I810PTR(scrn); I810RegPtr i810Reg = &pI810->ModeReg; int m, n, p; double f_out; double f_err; double f_vco; int m_best = 0, n_best = 0, p_best = 0; double f_target = freq; double err_max = 0.005; double err_target = 0.001; double err_best = 999999.0; p_best = p = log(MAX_VCO_FREQ / f_target) / log((double)2); /* Make sure p is within range. */ if (p_best > 5) { p_best = p = 5; } f_vco = f_target * (1 << p); n = 2; do { n++; m = f_vco / (REF_FREQ / (double)n) / (double)4.0 + 0.5; if (m < 3) m = 3; f_out = CALC_VCLK(m, n, p); f_err = 1.0 - (f_target / f_out); if (fabs(f_err) < err_max) { m_best = m; n_best = n; err_best = f_err; } } while ((fabs(f_err) >= err_target) && ((n <= TARGET_MAX_N) || (fabs(err_best) > err_max))); if (fabs(f_err) < err_target) { m_best = m; n_best = n; } i810Reg->VideoClk2_M = (m_best - 2) & 0x3FF; i810Reg->VideoClk2_N = (n_best - 2) & 0x3FF; i810Reg->VideoClk2_DivisorSel = (p_best << 4); xf86DrvMsgVerb(scrn->scrnIndex, X_INFO, 3, "Setting dot clock to %.1f MHz " "[ 0x%x 0x%x 0x%x ] " "[ %d %d %d ]\n", CALC_VCLK(m_best, n_best, p_best), i810Reg->VideoClk2_M, i810Reg->VideoClk2_N, i810Reg->VideoClk2_DivisorSel, m_best, n_best, p_best); } static Bool I810SetMode(ScrnInfoPtr scrn, DisplayModePtr mode) { I810Ptr pI810 = I810PTR(scrn); I810RegPtr i810Reg = &pI810->ModeReg; vgaRegPtr pVga = &VGAHWPTR(scrn)->ModeReg; double dclk = mode->Clock / 1000.0; switch (scrn->bitsPerPixel) { case 8: pVga->CRTC[0x13] = scrn->displayWidth >> 3; i810Reg->ExtOffset = scrn->displayWidth >> 11; i810Reg->PixelPipeCfg1 = DISPLAY_8BPP_MODE; i810Reg->BitBLTControl = COLEXP_8BPP; break; case 16: if (scrn->weight.green == 5) { i810Reg->PixelPipeCfg1 = DISPLAY_15BPP_MODE; } else { i810Reg->PixelPipeCfg1 = DISPLAY_16BPP_MODE; } pVga->CRTC[0x13] = scrn->displayWidth >> 2; i810Reg->ExtOffset = scrn->displayWidth >> 10; i810Reg->BitBLTControl = COLEXP_16BPP; /* Enable Palette Programming for Direct Color visuals. -jens */ i810Reg->PixelPipeCfg2 = DISPLAY_GAMMA_ENABLE; break; case 24: pVga->CRTC[0x13] = (scrn->displayWidth * 3) >> 3; i810Reg->ExtOffset = (scrn->displayWidth * 3) >> 11; i810Reg->PixelPipeCfg1 = DISPLAY_24BPP_MODE; i810Reg->BitBLTControl = COLEXP_24BPP; /* Enable Palette Programming for Direct Color visuals. -jens */ i810Reg->PixelPipeCfg2 = DISPLAY_GAMMA_ENABLE; break; default: break; } /* Turn on 8 bit dac if requested */ if (xf86ReturnOptValBool(pI810->Options, OPTION_DAC_6BIT, FALSE)) i810Reg->PixelPipeCfg0 = DAC_6_BIT; else i810Reg->PixelPipeCfg0 = DAC_8_BIT; /* Do not delay CRT Blank: needed for video overlay */ i810Reg->PixelPipeCfg1 |= 0x10; /* Turn on Extended VGA Interpretation */ i810Reg->IOControl = EXTENDED_CRTC_CNTL; /* Turn on linear and page mapping */ i810Reg->AddressMapping = (LINEAR_MODE_ENABLE | GTT_MEM_MAP_ENABLE); /* Turn on GUI mode */ i810Reg->DisplayControl = HIRES_MODE; /* Calculate the extended CRTC regs */ i810Reg->ExtVertTotal = (mode->CrtcVTotal - 2) >> 8; i810Reg->ExtVertDispEnd = (mode->CrtcVDisplay - 1) >> 8; i810Reg->ExtVertSyncStart = mode->CrtcVSyncStart >> 8; i810Reg->ExtVertBlankStart = mode->CrtcVBlankStart >> 8; i810Reg->ExtHorizTotal = ((mode->CrtcHTotal >> 3) - 5) >> 8; i810Reg->ExtHorizBlank = (((mode->CrtcHBlankEnd >> 3) - 1) & 0x40) >> 6; /* * the KGA fix in vgaHW.c results in the first * scanline and the first character clock (8 pixels) * of each scanline thereafter on display with an i810 * to be blank. Restoring CRTC 3, 5, & 22 to their * "theoretical" values corrects the problem. KAO. */ pVga->CRTC[3] = (((mode->CrtcHBlankEnd >> 3) - 1) & 0x1F) | 0x80; pVga->CRTC[5] = ((((mode->CrtcHBlankEnd >> 3) - 1) & 0x20) << 2) | (((mode->CrtcHSyncEnd >> 3)) & 0x1F); pVga->CRTC[22] = (mode->CrtcVBlankEnd - 1) & 0xFF; i810Reg->ExtHorizBlank = vgaHWHBlankKGA(mode, pVga, 7, 0); vgaHWVBlankKGA(mode, pVga, 8, 0); /* * The following workarounds are needed to get video overlay working * at 1024x768 and 1280x1024 display resolutions. */ if ((mode->CrtcVDisplay == 768) && (i810Reg->ExtVertBlankStart == 3)) { i810Reg->ExtVertBlankStart = 2; } if ((mode->CrtcVDisplay == 1024) && (i810Reg->ExtVertBlankStart == 4)) { i810Reg->ExtVertBlankStart = 3; } /* OVRACT Register */ i810Reg->OverlayActiveStart = mode->CrtcHTotal - 32; i810Reg->OverlayActiveEnd = mode->CrtcHDisplay - 32; /* Turn on interlaced mode if necessary */ if (mode->Flags & V_INTERLACE) { i810Reg->InterlaceControl = INTERLACE_ENABLE; i810Reg->ExtVertDispEnd *= 2; } else i810Reg->InterlaceControl = INTERLACE_DISABLE; /* * Set the overscan color to 0. * NOTE: This only affects >8bpp mode. */ pVga->Attribute[0x11] = 0; /* * Calculate the VCLK that most closely matches the requested dot * clock. */ I810CalcVCLK(scrn, dclk); /* Since we program the clocks ourselves, always use VCLK2. */ pVga->MiscOutReg |= 0x0C; /* Calculate the FIFO Watermark and Burst Length. */ i810Reg->LMI_FIFO_Watermark = I810CalcWatermark(scrn, dclk, FALSE); /* Setup the ring buffer */ i810Reg->LprbTail = 0; i810Reg->LprbHead = 0; i810Reg->LprbStart = pI810->LpRing->mem.Start; if (i810Reg->LprbStart) i810Reg->LprbLen = ((pI810->LpRing->mem.Size - 4096) | RING_NO_REPORT | RING_VALID); else i810Reg->LprbLen = RING_INVALID; return TRUE; } static Bool I810ModeInit(ScrnInfoPtr scrn, DisplayModePtr mode) { vgaHWPtr hwp; I810Ptr pI810; hwp = VGAHWPTR(scrn); pI810 = I810PTR(scrn); vgaHWUnlock(hwp); if (!vgaHWInit(scrn, mode)) return FALSE; scrn->vtSema = TRUE; if (!I810SetMode(scrn, mode)) return FALSE; #ifdef HAVE_DRI1 if (pI810->directRenderingEnabled) { DRILock(xf86ScrnToScreen(scrn), 0); pI810->LockHeld = 1; } #endif DoRestore(scrn, &hwp->ModeReg, &pI810->ModeReg, FALSE); #ifdef HAVE_DRI1 if (pI810->directRenderingEnabled) { DRIUnlock(xf86ScrnToScreen(scrn)); pI810->LockHeld = 0; } #endif return TRUE; } static void I810LoadPalette15(ScrnInfoPtr scrn, int numColors, int *indices, LOCO * colors, VisualPtr pVisual) { vgaHWPtr hwp; int i, j, index; unsigned char r, g, b; hwp = VGAHWPTR(scrn); for (i = 0; i < numColors; i++) { index = indices[i]; r = colors[index].red; g = colors[index].green; b = colors[index].blue; for (j = 0; j < 8; j++) { hwp->writeDacWriteAddr(hwp, (index << 3) + j); hwp->writeDacData(hwp, r); hwp->writeDacData(hwp, g); hwp->writeDacData(hwp, b); } } } static void I810LoadPalette16(ScrnInfoPtr scrn, int numColors, int *indices, LOCO * colors, VisualPtr pVisual) { vgaHWPtr hwp; int i, index; unsigned char r, g, b; hwp = VGAHWPTR(scrn); /* Load all four entries in each of the 64 color ranges. -jens */ for (i = 0; i < numColors; i++) { index = indices[i / 2]; r = colors[index].red; b = colors[index].blue; index = indices[i]; g = colors[index].green; hwp->writeDacWriteAddr(hwp, index << 2); hwp->writeDacData(hwp, r); hwp->writeDacData(hwp, g); hwp->writeDacData(hwp, b); hwp->writeDacWriteAddr(hwp, (index << 2) + 1); hwp->writeDacData(hwp, r); hwp->writeDacData(hwp, g); hwp->writeDacData(hwp, b); hwp->writeDacWriteAddr(hwp, (index << 2) + 2); hwp->writeDacData(hwp, r); hwp->writeDacData(hwp, g); hwp->writeDacData(hwp, b); hwp->writeDacWriteAddr(hwp, (index << 2) + 3); hwp->writeDacData(hwp, r); hwp->writeDacData(hwp, g); hwp->writeDacData(hwp, b); i++; index = indices[i]; g = colors[index].green; hwp->writeDacWriteAddr(hwp, index << 2); hwp->writeDacData(hwp, r); hwp->writeDacData(hwp, g); hwp->writeDacData(hwp, b); hwp->writeDacWriteAddr(hwp, (index << 2) + 1); hwp->writeDacData(hwp, r); hwp->writeDacData(hwp, g); hwp->writeDacData(hwp, b); hwp->writeDacWriteAddr(hwp, (index << 2) + 2); hwp->writeDacData(hwp, r); hwp->writeDacData(hwp, g); hwp->writeDacData(hwp, b); hwp->writeDacWriteAddr(hwp, (index << 2) + 3); hwp->writeDacData(hwp, r); hwp->writeDacData(hwp, g); hwp->writeDacData(hwp, b); } } static void I810LoadPalette24(ScrnInfoPtr scrn, int numColors, int *indices, LOCO * colors, VisualPtr pVisual) { vgaHWPtr hwp; int i, index; unsigned char r, g, b; hwp = VGAHWPTR(scrn); for (i = 0; i < numColors; i++) { index = indices[i]; r = colors[index].red; g = colors[index].green; b = colors[index].blue; hwp->writeDacWriteAddr(hwp, index); hwp->writeDacData(hwp, r); hwp->writeDacData(hwp, g); hwp->writeDacData(hwp, b); } } Bool I810AllocateFront(ScrnInfoPtr scrn) { I810Ptr pI810 = I810PTR(scrn); int cache_lines = -1; if (pI810->DoneFrontAlloc) return TRUE; memset(&(pI810->FbMemBox), 0, sizeof(BoxRec)); /* Alloc FrontBuffer/Ring/Accel memory */ pI810->FbMemBox.x1 = 0; pI810->FbMemBox.x2 = scrn->displayWidth; pI810->FbMemBox.y1 = 0; pI810->FbMemBox.y2 = scrn->virtualY; xf86GetOptValInteger(pI810->Options, OPTION_CACHE_LINES, &cache_lines); if (cache_lines < 0) { /* make sure there is enough for two DVD sized YUV buffers */ cache_lines = (scrn->depth == 24) ? 256 : 384; if (scrn->displayWidth <= 1024) cache_lines *= 2; } /* Make sure there's enough space for cache_lines. * * Had a bug here where maxCacheLines was computed to be less than 0. * Not sure why 256 was initially subtracted from videoRam in the * maxCacheLines calculation, but that was causing a problem * for configurations that have exactly enough Ram for the framebuffer. * Common code should catch the case where there isn't enough space for * framebuffer, we'll just check for no space for cache_lines. -jens * */ { int maxCacheLines; maxCacheLines = (scrn->videoRam * 1024 / (scrn->bitsPerPixel / 8) / scrn->displayWidth) - scrn->virtualY; if (maxCacheLines < 0) maxCacheLines = 0; if (cache_lines > maxCacheLines) cache_lines = maxCacheLines; } pI810->FbMemBox.y2 += cache_lines; xf86DrvMsg(scrn->scrnIndex, X_INFO, "Adding %i scanlines for pixmap caching\n", cache_lines); /* Reserve room for the framebuffer and pixcache. Put at the top * of memory so we can have nice alignment for the tiled regions at * the start of memory. */ if (!I810AllocLow(&(pI810->FrontBuffer), &(pI810->SysMem), ALIGN((pI810->FbMemBox.x2 * pI810->FbMemBox.y2 * pI810->cpp), 4096))) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "Framebuffer allocation failed\n"); return FALSE; } memset(pI810->LpRing, 0, sizeof(I810RingBuffer)); if (I810AllocLow(&(pI810->LpRing->mem), &(pI810->SysMem), 16 * 4096)) { pI810->LpRing->tail_mask = pI810->LpRing->mem.Size - 1; pI810->LpRing->virtual_start = pI810->FbBase + pI810->LpRing->mem.Start; pI810->LpRing->head = 0; pI810->LpRing->tail = 0; pI810->LpRing->space = 0; } else { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Ring buffer allocation failed\n"); return (FALSE); } if (I810AllocLow(&pI810->Scratch, &(pI810->SysMem), 64 * 1024) || I810AllocLow(&pI810->Scratch, &(pI810->SysMem), 16 * 1024)) { xf86DrvMsg(scrn->scrnIndex, X_INFO, "Allocated Scratch Memory\n"); } else { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Scratch memory allocation failed\n"); return (FALSE); } pI810->DoneFrontAlloc = TRUE; return TRUE; } static Bool I810ScreenInit(SCREEN_INIT_ARGS_DECL) { ScrnInfoPtr scrn; vgaHWPtr hwp; I810Ptr pI810; VisualPtr visual; scrn = xf86ScreenToScrn(screen); pI810 = I810PTR(scrn); hwp = VGAHWPTR(scrn); pI810->LpRing = calloc(sizeof(I810RingBuffer),1); if (!pI810->LpRing) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Could not allocate lpring data structure.\n"); return FALSE; } miClearVisualTypes(); /* Re-implemented Direct Color support, -jens */ if (!miSetVisualTypes(scrn->depth, miGetDefaultVisualMask(scrn->depth), scrn->rgbBits, scrn->defaultVisual)) return FALSE; if (!miSetPixmapDepths()) return FALSE; { I810RegPtr i810Reg = &pI810->ModeReg; int i; for (i = 0; i < 8; i++) i810Reg->Fence[i] = 0; } /* Have to init the DRM earlier than in other drivers to get agp * memory. Wonder if this is going to be a problem... */ #ifdef HAVE_DRI1 /* * Setup DRI after visuals have been established, but before fbScreenInit * is called. fbScreenInit will eventually call into the drivers * InitGLXVisuals call back. */ /* * pI810->directRenderingDisabled is set once in PreInit. Reinitialise * pI810->directRenderingEnabled based on it each generation. */ pI810->directRenderingEnabled = !pI810->directRenderingDisabled; if (pI810->directRenderingEnabled==TRUE) pI810->directRenderingEnabled = I810DRIScreenInit(screen); #else pI810->directRenderingEnabled = FALSE; if (!I810AllocateGARTMemory(scrn)) return FALSE; if (!I810AllocateFront(scrn)) return FALSE; #endif if (!I810MapMem(scrn)) return FALSE; scrn->memPhysBase = (unsigned long)pI810->LinearAddr; scrn->fbOffset = 0; vgaHWSetMmioFuncs(hwp, pI810->MMIOBase, 0); vgaHWGetIOBase(hwp); if (!vgaHWMapMem(scrn)) return FALSE; I810Save(scrn); if (!I810ModeInit(scrn, scrn->currentMode)) return FALSE; I810SaveScreen(screen, FALSE); I810AdjustFrame(ADJUST_FRAME_ARGS(scrn, scrn->frameX0, scrn->frameY0)); if (!fbScreenInit(screen, pI810->FbBase + scrn->fbOffset, scrn->virtualX, scrn->virtualY, scrn->xDpi, scrn->yDpi, scrn->displayWidth, scrn->bitsPerPixel)) return FALSE; if (scrn->bitsPerPixel > 8) { /* Fixup RGB ordering */ visual = screen->visuals + screen->numVisuals; while (--visual >= screen->visuals) { if ((visual->class | DynamicClass) == DirectColor) { visual->offsetRed = scrn->offset.red; visual->offsetGreen = scrn->offset.green; visual->offsetBlue = scrn->offset.blue; visual->redMask = scrn->mask.red; visual->greenMask = scrn->mask.green; visual->blueMask = scrn->mask.blue; } } } fbPictureInit(screen, NULL, 0); xf86SetBlackWhitePixels(screen); #ifdef HAVE_DRI1 if (pI810->LpRing->mem.Start == 0 && pI810->directRenderingEnabled) { pI810->directRenderingEnabled = FALSE; I810DRICloseScreen(screen); } if (!pI810->directRenderingEnabled) { pI810->DoneFrontAlloc = FALSE; if (!I810AllocateGARTMemory(scrn)) return FALSE; if (!I810AllocateFront(scrn)) return FALSE; } #endif #ifdef HAVE_DGAPROC_H I810DGAInit(screen); #endif if (!xf86InitFBManager(screen, &(pI810->FbMemBox))) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Failed to init memory manager\n"); return FALSE; } if (pI810->LpRing->mem.Size != 0) { I810SetRingRegs(scrn); if (!pI810->noAccel && !I810AccelInit(screen)) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Hardware acceleration initialization failed\n"); } I810EmitFlush(scrn); } xf86SetBackingStore(screen); xf86SetSilkenMouse(screen); miDCInitialize(screen, xf86GetPointerScreenFuncs()); if (!xf86ReturnOptValBool(pI810->Options, OPTION_SW_CURSOR, FALSE)) { if (!I810CursorInit(screen)) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Hardware cursor initialization failed\n"); } } if (!miCreateDefColormap(screen)) return FALSE; /* Use driver specific palette load routines for Direct Color support. -jens */ if (scrn->bitsPerPixel == 16) { if (scrn->depth == 15) { if (!xf86HandleColormaps(screen, 256, 8, I810LoadPalette15, NULL, CMAP_PALETTED_TRUECOLOR | CMAP_RELOAD_ON_MODE_SWITCH)) return FALSE; } else { if (!xf86HandleColormaps(screen, 256, 8, I810LoadPalette16, NULL, CMAP_PALETTED_TRUECOLOR | CMAP_RELOAD_ON_MODE_SWITCH)) return FALSE; } } else { if (!xf86HandleColormaps(screen, 256, 8, I810LoadPalette24, NULL, CMAP_PALETTED_TRUECOLOR | CMAP_RELOAD_ON_MODE_SWITCH)) return FALSE; } xf86DPMSInit(screen, I810DisplayPowerManagementSet, 0); I810InitVideo(screen); #ifdef HAVE_DRI1 if (pI810->directRenderingEnabled) { /* Now that mi, fb, drm and others have done their thing, * complete the DRI setup. */ pI810->directRenderingEnabled = I810DRIFinishScreenInit(screen); } #ifdef XvMCExtension if ((pI810->directRenderingEnabled) && (pI810->numSurfaces)) { /* Initialize the hardware motion compensation code */ I810InitMC(screen); } #endif #endif if (pI810->directRenderingEnabled) { xf86DrvMsg(scrn->scrnIndex, X_INFO, "Direct rendering enabled\n"); } else { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "Direct rendering disabled\n"); } screen->SaveScreen = I810SaveScreen; pI810->CloseScreen = screen->CloseScreen; screen->CloseScreen = I810CloseScreen; if (serverGeneration == 1) xf86ShowUnusedOptions(scrn->scrnIndex, scrn->options); return TRUE; } Bool I810SwitchMode(SWITCH_MODE_ARGS_DECL) { SCRN_INFO_PTR(arg); #if 0 I810Ptr pI810 = I810PTR(scrn); #endif if (I810_DEBUG & DEBUG_VERBOSE_CURSOR) ErrorF("I810SwitchMode %p\n", (void *)mode); #if 0 /* * This has been added to prevent lockups on mode switch by modeling * it after I810Leave()/I810Enter() but the call to I810DRILeave() * was missing so it caused the opposite. * The version below works but it is doubtful it does any good. * If lockups on mode switch are still seen revisit this code. (EE) */ # ifdef HAVE_DRI1 if (pI810->directRenderingEnabled) { if (I810_DEBUG & DEBUG_VERBOSE_DRI) ErrorF("calling dri lock\n"); DRILock(screenInfo.screens[scrnIndex], 0); pI810->LockHeld = 1; } # endif if (pI810->AccelInfoRec != NULL) { I810RefreshRing(scrn); I810Sync(scrn); pI810->AccelInfoRec->NeedToSync = FALSE; } I810Restore(scrn); # ifdef HAVE_DRI1 if (pI810->directRenderingEnabled) { if (!I810DRILeave(scrn)) return FALSE; if (!I810DRIEnter(scrn)) return FALSE; if (I810_DEBUG & DEBUG_VERBOSE_DRI) ErrorF("calling dri unlock\n"); DRIUnlock(screenInfo.screens[scrnIndex]); pI810->LockHeld = 0; } # endif #endif return I810ModeInit(scrn, mode); } void I810AdjustFrame(ADJUST_FRAME_ARGS_DECL) { SCRN_INFO_PTR(arg); I810Ptr pI810 = I810PTR(scrn); vgaHWPtr hwp = VGAHWPTR(scrn); int Base; #if 1 if (pI810->showCache) { int lastline = pI810->FbMapSize / ((scrn->displayWidth * scrn->bitsPerPixel) / 8); lastline -= scrn->currentMode->VDisplay; if (y > 0) y += scrn->currentMode->VDisplay; if (y > lastline) y = lastline; } #endif Base = (y * scrn->displayWidth + x) >> 2; if (I810_DEBUG & DEBUG_VERBOSE_CURSOR) ErrorF("I810AdjustFrame %d,%d\n", x, y); switch (scrn->bitsPerPixel) { case 8: break; case 16: Base *= 2; break; case 24: /* KW: Need to do 16-pixel alignment for i810, otherwise you * get bad watermark problems. Need to fixup the mouse * pointer positioning to take this into account. */ pI810->CursorOffset = (Base & 0x3) * 4; Base &= ~0x3; Base *= 3; break; case 32: Base *= 4; break; } hwp->writeCrtc(hwp, START_ADDR_LO, Base & 0xFF); hwp->writeCrtc(hwp, START_ADDR_HI, (Base & 0xFF00) >> 8); hwp->writeCrtc(hwp, EXT_START_ADDR_HI, (Base & 0x3FC00000) >> 22); hwp->writeCrtc(hwp, EXT_START_ADDR, ((Base & 0x00eF0000) >> 16 | EXT_START_ADDR_ENABLE)); } /* These functions are usually called with the lock **not held**. */ static Bool I810EnterVT(VT_FUNC_ARGS_DECL) { SCRN_INFO_PTR(arg); #ifdef HAVE_DRI1 I810Ptr pI810 = I810PTR(scrn); #endif if (I810_DEBUG & DEBUG_VERBOSE_DRI) ErrorF("\n\nENTER VT\n"); if (!I810BindGARTMemory(scrn)) { return FALSE; } #ifdef HAVE_DRI1 if (!I810DRIEnter(scrn)) { return FALSE; } if (pI810->directRenderingEnabled) { if (I810_DEBUG & DEBUG_VERBOSE_DRI) ErrorF("calling dri unlock\n"); DRIUnlock(xf86ScrnToScreen(scrn)); pI810->LockHeld = 0; } #endif if (!I810ModeInit(scrn, scrn->currentMode)) return FALSE; I810AdjustFrame(ADJUST_FRAME_ARGS(scrn, scrn->frameX0, scrn->frameY0)); return TRUE; } static void I810LeaveVT(VT_FUNC_ARGS_DECL) { SCRN_INFO_PTR(arg); vgaHWPtr hwp = VGAHWPTR(scrn); I810Ptr pI810 = I810PTR(scrn); if (I810_DEBUG & DEBUG_VERBOSE_DRI) ErrorF("\n\n\nLeave VT\n"); #ifdef HAVE_DRI1 if (pI810->directRenderingEnabled) { if (I810_DEBUG & DEBUG_VERBOSE_DRI) ErrorF("calling dri lock\n"); DRILock(xf86ScrnToScreen(scrn), 0); pI810->LockHeld = 1; } #endif #ifdef HAVE_XAA_H if (pI810->AccelInfoRec != NULL) { I810RefreshRing(scrn); I810Sync(scrn); pI810->AccelInfoRec->NeedToSync = FALSE; } #endif I810Restore(scrn); if (!I810UnbindGARTMemory(scrn)) return; #ifdef HAVE_DRI1 if (!I810DRILeave(scrn)) return; #endif vgaHWLock(hwp); } static Bool I810CloseScreen(CLOSE_SCREEN_ARGS_DECL) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); vgaHWPtr hwp = VGAHWPTR(scrn); I810Ptr pI810 = I810PTR(scrn); #ifdef HAVE_XAA_H XAAInfoRecPtr infoPtr = pI810->AccelInfoRec; #endif if (scrn->vtSema == TRUE) { #ifdef HAVE_XAA_H if (pI810->AccelInfoRec != NULL) { I810RefreshRing(scrn); I810Sync(scrn); pI810->AccelInfoRec->NeedToSync = FALSE; } #endif I810Restore(scrn); vgaHWLock(hwp); } #ifdef HAVE_DRI1 if (pI810->directRenderingEnabled) { I810DRICloseScreen(screen); pI810->directRenderingEnabled = FALSE; } #endif if (scrn->vtSema == TRUE) { I810UnbindGARTMemory(scrn); I810Restore(scrn); vgaHWLock(hwp); } I810UnmapMem(scrn); vgaHWUnmapMem(scrn); if (pI810->ScanlineColorExpandBuffers) { free(pI810->ScanlineColorExpandBuffers); pI810->ScanlineColorExpandBuffers = NULL; } #ifdef HAVE_XAA_H if (infoPtr) { if (infoPtr->ScanlineColorExpandBuffers) free(infoPtr->ScanlineColorExpandBuffers); XAADestroyInfoRec(infoPtr); pI810->AccelInfoRec = NULL; } #endif if (pI810->CursorInfoRec) { xf86DestroyCursorInfoRec(pI810->CursorInfoRec); pI810->CursorInfoRec = NULL; } /* Free all allocated video ram. */ pI810->SysMem = pI810->SavedSysMem; pI810->DcacheMem = pI810->SavedDcacheMem; pI810->DoneFrontAlloc = FALSE; /* Need to actually close the gart fd, or the unbound memory will just sit * around. Will prevent the Xserver from recycling. */ xf86GARTCloseScreen(scrn->scrnIndex); free(pI810->LpRing); pI810->LpRing = NULL; scrn->vtSema = FALSE; screen->CloseScreen = pI810->CloseScreen; return (*screen->CloseScreen) (CLOSE_SCREEN_ARGS); } static void I810FreeScreen(FREE_SCREEN_ARGS_DECL) { SCRN_INFO_PTR(arg); I810FreeRec(scrn); if (xf86LoaderCheckSymbol("vgaHWFreeHWRec")) vgaHWFreeHWRec(scrn); } static ModeStatus I810ValidMode(SCRN_ARG_TYPE arg, DisplayModePtr mode, Bool verbose, int flags) { SCRN_INFO_PTR(arg); if (mode->Flags & V_INTERLACE) { if (verbose) { xf86DrvMsg(scrn->scrnIndex, X_PROBED, "Removing interlaced mode \"%s\"\n", mode->name); } return MODE_BAD; } return MODE_OK; } static Bool I810SaveScreen(ScreenPtr screen, Bool unblack) { return vgaHWSaveScreen(screen, unblack); } static void I810DisplayPowerManagementSet(ScrnInfoPtr scrn, int PowerManagementMode, int flags) { I810Ptr pI810; unsigned char SEQ01 = 0; int DPMSSyncSelect = 0; vgaHWPtr hwp; pI810 = I810PTR(scrn); switch (PowerManagementMode) { case DPMSModeOn: /* Screen: On; HSync: On, VSync: On */ SEQ01 = 0x00; DPMSSyncSelect = HSYNC_ON | VSYNC_ON; break; case DPMSModeStandby: /* Screen: Off; HSync: Off, VSync: On */ SEQ01 = 0x20; DPMSSyncSelect = HSYNC_OFF | VSYNC_ON; break; case DPMSModeSuspend: /* Screen: Off; HSync: On, VSync: Off */ SEQ01 = 0x20; DPMSSyncSelect = HSYNC_ON | VSYNC_OFF; break; case DPMSModeOff: /* Screen: Off; HSync: Off, VSync: Off */ SEQ01 = 0x20; DPMSSyncSelect = HSYNC_OFF | VSYNC_OFF; break; } hwp = VGAHWPTR(scrn); /* Turn the screen on/off */ SEQ01 |= hwp->readSeq(hwp, 0x01) & ~0x20; hwp->writeSeq(hwp, 0x01, SEQ01); /* Set the DPMS mode */ OUTREG8(DPMS_SYNC_SELECT, DPMSSyncSelect); } const OptionInfoRec * lg_i810_available_options(int chipid, int busid) { return I810Options; } Bool lg_i810_init(ScrnInfoPtr scrn) { scrn->PreInit = I810PreInit; scrn->ScreenInit = I810ScreenInit; scrn->SwitchMode = I810SwitchMode; scrn->AdjustFrame = I810AdjustFrame; scrn->EnterVT = I810EnterVT; scrn->LeaveVT = I810LeaveVT; scrn->FreeScreen = I810FreeScreen; scrn->ValidMode = I810ValidMode; return TRUE; } xf86-video-intel-2.99.917/src/legacy/i810/i810_ring.h0000664000175000017500000000666312400044327016323 00000000000000/************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. Copyright © 2002 David Dawes All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifndef _INTEL_RING_H #define _INTEL_RING_H #define OUT_RING(n) do { \ if (I810_DEBUG & DEBUG_VERBOSE_RING) \ ErrorF("OUT_RING %lx: %x, (mask %x)\n", \ (unsigned long)(outring), (unsigned int)(n), ringmask); \ *(volatile unsigned int *)(virt + outring) = n; \ outring += 4; ringused += 4; \ outring &= ringmask; \ } while (0) #define ADVANCE_LP_RING() do { \ if (ringused > needed) \ FatalError("%s: ADVANCE_LP_RING: exceeded allocation %d/%d\n ", \ __FUNCTION__, ringused, needed); \ else if (ringused < needed) \ FatalError("%s: ADVANCE_LP_RING: under-used allocation %d/%d\n ", \ __FUNCTION__, ringused, needed); \ pI810->LpRing->tail = outring; \ pI810->LpRing->space -= ringused; \ if (outring & 0x07) \ FatalError("%s: ADVANCE_LP_RING: " \ "outring (0x%x) isn't on a QWord boundary\n", \ __FUNCTION__, outring); \ OUTREG(LP_RING + RING_TAIL, outring); \ } while (0) /* * XXX Note: the head/tail masks are different for 810 and i830. * If the i810 always sets the higher bits to 0, then this shouldn't be * a problem. Check this! */ #define DO_RING_IDLE() do { \ int _head; \ int _tail; \ do { \ _head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK; \ _tail = INREG(LP_RING + RING_TAIL) & I830_TAIL_MASK; \ DELAY(10); \ } while (_head != _tail); \ } while( 0) #define BEGIN_LP_RING(n) \ unsigned int outring, ringmask, ringused = 0; \ volatile unsigned char *virt; \ unsigned needed; \ if ((n) & 1) \ ErrorF("BEGIN_LP_RING called with odd argument: %d\n", n); \ if ((n) > 2 && (I810_DEBUG&DEBUG_ALWAYS_SYNC)) \ DO_RING_IDLE(); \ needed = (n) * 4; \ if (pI810->LpRing->space < needed) \ WaitRingFunc(pScrn, needed, 0); \ outring = pI810->LpRing->tail; \ ringmask = pI810->LpRing->tail_mask; \ virt = pI810->LpRing->virtual_start; \ if (I810_DEBUG & DEBUG_VERBOSE_RING) \ ErrorF( "BEGIN_LP_RING %d in %s\n", n, FUNCTION_NAME); #endif /* _INTEL_RING_H */ xf86-video-intel-2.99.917/src/legacy/i810/i810_dri.c0000664000175000017500000012604212400044327016127 00000000000000#ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "xf86Pci.h" #include "windowstr.h" #include "shadow.h" #include "shadowfb.h" #include "i810.h" #include "i810_dri.h" static char I810KernelDriverName[] = "i810"; static char I810ClientDriverName[] = "i810"; static Bool I810CreateContext(ScreenPtr pScreen, VisualPtr visual, drm_context_t hwContext, void *pVisualConfigPriv, DRIContextType contextStore); static void I810DestroyContext(ScreenPtr pScreen, drm_context_t hwContext, DRIContextType contextStore); static void I810DRISwapContext(ScreenPtr pScreen, DRISyncType syncType, DRIContextType readContextType, void *readContextStore, DRIContextType writeContextType, void *writeContextStore); static void I810DRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index); static void I810DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, RegionPtr prgnSrc, CARD32 index); static void I810EnablePageFlip(ScreenPtr pScreen); static void I810DisablePageFlip(ScreenPtr pScreen); static void I810DRITransitionSingleToMulti3d(ScreenPtr pScreen); static void I810DRITransitionMultiToSingle3d(ScreenPtr pScreen); static void I810DRITransitionTo3d(ScreenPtr pScreen); static void I810DRITransitionTo2d(ScreenPtr pScreen); static void I810DRIRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); static int i810_pitches[] = { 512, 1024, 2048, 4096, 0 }; static int i810_pitch_flags[] = { 0x0, 0x1, 0x2, 0x3, 0 }; static unsigned int i810_drm_version = 0; Bool I810CleanupDma(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); drmI810Init info; memset(&info, 0, sizeof(drmI810Init)); info.func = I810_CLEANUP_DMA; if (drmCommandWrite(pI810->drmSubFD, DRM_I810_INIT, &info, sizeof(drmI810Init))) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] I810 Dma Cleanup Failed\n"); return FALSE; } return TRUE; } Bool I810InitDma(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); I810RingBuffer *ring = pI810->LpRing; I810DRIPtr pI810DRI = (I810DRIPtr) pI810->pDRIInfo->devPrivate; drmI810Init info; memset(&info, 0, sizeof(drmI810Init)); info.ring_start = ring->mem.Start; info.ring_end = ring->mem.End; info.ring_size = ring->mem.Size; info.mmio_offset = (unsigned int)pI810DRI->regs; info.buffers_offset = (unsigned int)pI810->buffer_map; info.sarea_priv_offset = sizeof(XF86DRISAREARec); info.front_offset = 0; info.back_offset = pI810->BackBuffer.Start; info.depth_offset = pI810->DepthBuffer.Start; info.overlay_offset = pI810->OverlayStart; info.overlay_physical = pI810->OverlayPhysical; info.w = pScrn->virtualX; info.h = pScrn->virtualY; info.pitch = pI810->auxPitch; info.pitch_bits = pI810->auxPitchBits; /* We require DRM v1.2 or greater. Since DRM v1.2 broke compatibility * we created a new v1.4 that supports a new init function. Eventually the * old init function will go away. If you change the drm interface, make a * new init type too so that we can detect the new client. */ switch(i810_drm_version) { case ((1<<16) | 0): case ((1<<16) | 1): case ((1<<16) | 2): case ((1<<16) | 3): /* Use OLD drm < 1.4 init */ info.func = I810_INIT_DMA; xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] Init PRE v1.4 interface.\n"); break; default: case ((1<<16) | 4): /* DRM version 1.3 or greater init */ info.func = I810_INIT_DMA_1_4; xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] Init v1.4 interface.\n"); break; } if (drmCommandWrite(pI810->drmSubFD, DRM_I810_INIT, &info, sizeof(drmI810Init))) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[drm] I810 Dma Initialization failed.\n"); return FALSE; } return TRUE; } static unsigned int mylog2(unsigned int n) { unsigned int log2 = 1; while (n > 1) n >>= 1, log2++; return log2; } Bool I810DRIScreenInit(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr pI810 = I810PTR(pScrn); DRIInfoPtr pDRIInfo; I810DRIPtr pI810DRI; unsigned long tom; drm_handle_t agpHandle; drm_handle_t dcacheHandle; int sysmem_size = 0; int back_size = 0; unsigned int pitch_idx = 0; int bufs; int width = pScrn->displayWidth * pI810->cpp; int i; /* Hardware 3D rendering only implemented for 16bpp */ /* And it only works for 5:6:5 (Mark) */ if (pScrn->depth != 16) return FALSE; /* Check that the DRI, and DRM modules have been loaded by testing * for known symbols in each module. */ if (!xf86LoaderCheckSymbol("drmAvailable")) return FALSE; if (!xf86LoaderCheckSymbol("DRIQueryVersion")) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] I810DRIScreenInit failed (libdri.a too old)\n"); return FALSE; } /* adjust width first */ #define Elements(x) sizeof(x)/sizeof(*x) for (pitch_idx = 0; pitch_idx < Elements(i810_pitches); pitch_idx++) if (width <= i810_pitches[pitch_idx]) break; if (pitch_idx == Elements(i810_pitches)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] Couldn't find depth/back buffer pitch"); DRICloseScreen(pScreen); return FALSE; } else { /* for tiled memory to work, the buffer needs to have the * number of lines as a multiple of 16 (the tile size), * - airlied */ int lines = (pScrn->virtualY + 15) / 16 * 16; back_size = i810_pitches[pitch_idx] * lines; back_size = ((back_size + 4096 - 1) / 4096) * 4096; } pScrn->displayWidth = i810_pitches[pitch_idx] / pI810->cpp; /* Check the DRI version */ { int major, minor, patch; DRIQueryVersion(&major, &minor, &patch); if (major != DRIINFO_MAJOR_VERSION || minor < DRIINFO_MINOR_VERSION) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] I810DRIScreenInit failed because of a version mismatch.\n" "[dri] libdri version is %d.%d.%d bug version %d.%d.x is needed.\n" "[dri] Disabling DRI.\n", major, minor, patch, DRIINFO_MAJOR_VERSION, DRIINFO_MINOR_VERSION); return FALSE; } } pDRIInfo = DRICreateInfoRec(); if (!pDRIInfo) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] DRICreateInfoRec failed. Disabling DRI.\n"); return FALSE; } /* pDRIInfo->wrap.ValidateTree = 0; */ /* pDRIInfo->wrap.PostValidateTree = 0; */ pI810->pDRIInfo = pDRIInfo; pI810->LockHeld = 0; pDRIInfo->drmDriverName = I810KernelDriverName; pDRIInfo->clientDriverName = I810ClientDriverName; if (xf86LoaderCheckSymbol("DRICreatePCIBusID")) { pDRIInfo->busIdString = DRICreatePCIBusID(pI810->PciInfo); } else { pDRIInfo->busIdString = malloc(64); if (pDRIInfo->busIdString) sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d", ((pI810->PciInfo->domain << 8) | pI810->PciInfo->bus), pI810->PciInfo->dev, pI810->PciInfo->func ); } if (!pDRIInfo->busIdString) { DRIDestroyInfoRec(pI810->pDRIInfo); pI810->pDRIInfo = NULL; return FALSE; } pDRIInfo->ddxDriverMajorVersion = I810_MAJOR_VERSION; pDRIInfo->ddxDriverMinorVersion = I810_MINOR_VERSION; pDRIInfo->ddxDriverPatchVersion = I810_PATCHLEVEL; pDRIInfo->frameBufferPhysicalAddress = (pointer) pI810->LinearAddr; pDRIInfo->frameBufferSize = (((pScrn->displayWidth * pScrn->virtualY * pI810->cpp) + 4096 - 1) / 4096) * 4096; pDRIInfo->frameBufferStride = pScrn->displayWidth * pI810->cpp; pDRIInfo->ddxDrawableTableEntry = I810_MAX_DRAWABLES; if (SAREA_MAX_DRAWABLES < I810_MAX_DRAWABLES) pDRIInfo->maxDrawableTableEntry = SAREA_MAX_DRAWABLES; else pDRIInfo->maxDrawableTableEntry = I810_MAX_DRAWABLES; /* For now the mapping works by using a fixed size defined * in the SAREA header */ if (sizeof(XF86DRISAREARec) + sizeof(I810SAREARec) > SAREA_MAX) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] Data does not fit in SAREA\n"); return FALSE; } pDRIInfo->SAREASize = SAREA_MAX; if (!(pI810DRI = (I810DRIPtr) calloc(sizeof(I810DRIRec), 1))) { DRIDestroyInfoRec(pI810->pDRIInfo); pI810->pDRIInfo = NULL; return FALSE; } pDRIInfo->devPrivate = pI810DRI; pDRIInfo->devPrivateSize = sizeof(I810DRIRec); pDRIInfo->contextSize = sizeof(I810DRIContextRec); pDRIInfo->CreateContext = I810CreateContext; pDRIInfo->DestroyContext = I810DestroyContext; pDRIInfo->SwapContext = I810DRISwapContext; pDRIInfo->InitBuffers = I810DRIInitBuffers; pDRIInfo->MoveBuffers = I810DRIMoveBuffers; pDRIInfo->bufferRequests = DRI_ALL_WINDOWS; pDRIInfo->TransitionTo2d = I810DRITransitionTo2d; pDRIInfo->TransitionTo3d = I810DRITransitionTo3d; pDRIInfo->TransitionSingleToMulti3D = I810DRITransitionSingleToMulti3d; pDRIInfo->TransitionMultiToSingle3D = I810DRITransitionMultiToSingle3d; pDRIInfo->createDummyCtx = TRUE; pDRIInfo->createDummyCtxPriv = FALSE; /* This adds the framebuffer as a drm map *before* we have asked agp * to allocate it. Scary stuff, hold on... */ if (!DRIScreenInit(pScreen, pDRIInfo, &pI810->drmSubFD)) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] DRIScreenInit failed. Disabling DRI.\n"); free(pDRIInfo->devPrivate); pDRIInfo->devPrivate = NULL; DRIDestroyInfoRec(pI810->pDRIInfo); pI810->pDRIInfo = NULL; return FALSE; } /* Check the i810 DRM versioning */ { drmVersionPtr version; /* Check the DRM lib version. * drmGetLibVersion was not supported in version 1.0, so check for * symbol first to avoid possible crash or hang. */ if (xf86LoaderCheckSymbol("drmGetLibVersion")) { version = drmGetLibVersion(pI810->drmSubFD); } else { /* drmlib version 1.0.0 didn't have the drmGetLibVersion * entry point. Fake it by allocating a version record * via drmGetVersion and changing it to version 1.0.0 */ version = drmGetVersion(pI810->drmSubFD); version->version_major = 1; version->version_minor = 0; version->version_patchlevel = 0; } #define REQ_MAJ 1 #define REQ_MIN 1 if (version) { if (version->version_major != REQ_MAJ || version->version_minor < REQ_MIN) { /* incompatible drm library version */ xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] I810DRIScreenInit failed because of a version mismatch.\n" "[dri] libdrm.a module version is %d.%d.%d but version %d.%d.x is needed.\n" "[dri] Disabling DRI.\n", version->version_major, version->version_minor, version->version_patchlevel, REQ_MAJ, REQ_MIN); drmFreeVersion(version); I810DRICloseScreen(pScreen); return FALSE; } drmFreeVersion(version); } /* Check the i810 DRM version */ version = drmGetVersion(pI810->drmSubFD); if (version) { i810_drm_version = (version->version_major<<16) | version->version_minor; if (version->version_major != 1 || version->version_minor < 2) { /* incompatible drm version */ xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] I810DRIScreenInit failed because of a version mismatch.\n" "[dri] i810.o kernel module version is %d.%d.%d but version 1.2.0 or greater is needed.\n" "[dri] Disabling DRI.\n", version->version_major, version->version_minor, version->version_patchlevel); I810DRICloseScreen(pScreen); drmFreeVersion(version); return FALSE; } pI810->drmMinor = version->version_minor; drmFreeVersion(version); } } pI810DRI->regsSize = I810_REG_SIZE; if (drmAddMap(pI810->drmSubFD, (drm_handle_t) pI810->MMIOAddr, pI810DRI->regsSize, DRM_REGISTERS, 0, (drmAddress) &pI810DRI->regs) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAddMap(regs) failed\n"); DRICloseScreen(pScreen); return FALSE; } xf86DrvMsg(pScreen->myNum, X_INFO, "[drm] Registers = 0x%08x\n", (int)pI810DRI->regs); pI810->backHandle = DRM_AGP_NO_HANDLE; pI810->zHandle = DRM_AGP_NO_HANDLE; pI810->cursorHandle = DRM_AGP_NO_HANDLE; pI810->xvmcHandle = DRM_AGP_NO_HANDLE; pI810->sysmemHandle = DRM_AGP_NO_HANDLE; pI810->agpAcquired = FALSE; pI810->dcacheHandle = DRM_AGP_NO_HANDLE; /* Agp Support - Need this just to get the framebuffer. */ if (drmAgpAcquire(pI810->drmSubFD) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] drmAgpAquire failed\n"); DRICloseScreen(pScreen); return FALSE; } pI810->agpAcquired = TRUE; if (drmAgpEnable(pI810->drmSubFD, 0) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] drmAgpEnable failed\n"); DRICloseScreen(pScreen); return FALSE; } memset(&pI810->DcacheMem, 0, sizeof(I810MemRange)); memset(&pI810->BackBuffer, 0, sizeof(I810MemRange)); memset(&pI810->DepthBuffer, 0, sizeof(I810MemRange)); pI810->CursorPhysical = 0; pI810->CursorARGBPhysical = 0; /* Dcache - half the speed of normal ram, but has use as a Z buffer * under the DRI. */ drmAgpAlloc(pI810->drmSubFD, 4096 * 1024, 1, NULL, (drmAddress) &dcacheHandle); pI810->dcacheHandle = dcacheHandle; xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] dcacheHandle : 0x%x\n", (int)dcacheHandle); sysmem_size = pScrn->videoRam * 1024; if (dcacheHandle != DRM_AGP_NO_HANDLE) { if (back_size > 4 * 1024 * 1024) { xf86DrvMsg(pScreen->myNum, X_INFO, "[dri] Backsize is larger then 4 meg\n"); sysmem_size = sysmem_size - 2 * back_size; drmAgpFree(pI810->drmSubFD, dcacheHandle); pI810->dcacheHandle = dcacheHandle = DRM_AGP_NO_HANDLE; } else { sysmem_size = sysmem_size - back_size; } } else { sysmem_size = sysmem_size - 2 * back_size; } /* Max size is 48 without XvMC, 41 with 6 surfaces, 40 with 7 surfaces */ if (pI810->numSurfaces && (pI810->numSurfaces == 6)) { if (sysmem_size > (pI810->FbMapSize - 7 * 1024 * 1024)) { sysmem_size = (pI810->FbMapSize - 7 * 1024 * 1024); xf86DrvMsg(pScrn->scrnIndex, X_INFO, "User requested more memory then fits in the agp aperture\n" "Truncating to %d bytes of memory\n", sysmem_size); } } if (pI810->numSurfaces && (pI810->numSurfaces == 7)) { if (sysmem_size > (pI810->FbMapSize - 8 * 1024 * 1024)) { sysmem_size = (pI810->FbMapSize - 8 * 1024 * 1024); xf86DrvMsg(pScrn->scrnIndex, X_INFO, "User requested more memory then fits in the agp aperture\n" "Truncating to %d bytes of memory\n", sysmem_size); } } if (sysmem_size > pI810->FbMapSize) { sysmem_size = pI810->FbMapSize; xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] User requested more memory then fits in the agp" " aperture\n\tTruncating to %d bytes of memory\n", sysmem_size); } sysmem_size -= 4096; /* remove 4k for the hw cursor */ sysmem_size -= 16384; /* remove 16k for the ARGB hw cursor */ pI810->SysMem.Start = 0; pI810->SysMem.Size = sysmem_size; pI810->SysMem.End = sysmem_size; tom = sysmem_size; pI810->SavedSysMem = pI810->SysMem; if (dcacheHandle != DRM_AGP_NO_HANDLE) { if (drmAgpBind(pI810->drmSubFD, dcacheHandle, pI810->DepthOffset) == 0) { memset(&pI810->DcacheMem, 0, sizeof(I810MemRange)); xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] GART: Found 4096K Z buffer memory\n"); pI810->DcacheMem.Start = pI810->DepthOffset; pI810->DcacheMem.Size = 1024 * 4096; pI810->DcacheMem.End = pI810->DcacheMem.Start + pI810->DcacheMem.Size; if (!I810AllocLow (&(pI810->DepthBuffer), &(pI810->DcacheMem), back_size)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] Depth buffer allocation failed\n"); DRICloseScreen(pScreen); return FALSE; } } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] GART: dcache bind failed\n"); drmAgpFree(pI810->drmSubFD, dcacheHandle); pI810->dcacheHandle = dcacheHandle = DRM_AGP_NO_HANDLE; } } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] GART: no dcache memory found\n"); } drmAgpAlloc(pI810->drmSubFD, back_size, 0, NULL, (drmAddress) &agpHandle); pI810->backHandle = agpHandle; if (agpHandle != DRM_AGP_NO_HANDLE) { if (drmAgpBind(pI810->drmSubFD, agpHandle, pI810->BackOffset) == 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] Bound backbuffer memory\n"); pI810->BackBuffer.Start = pI810->BackOffset; pI810->BackBuffer.Size = back_size; pI810->BackBuffer.End = (pI810->BackBuffer.Start + pI810->BackBuffer.Size); } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] Unable to bind backbuffer. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] Unable to allocate backbuffer memory. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } if (dcacheHandle == DRM_AGP_NO_HANDLE) { drmAgpAlloc(pI810->drmSubFD, back_size, 0, NULL, (drmAddress) &agpHandle); pI810->zHandle = agpHandle; if (agpHandle != DRM_AGP_NO_HANDLE) { if (drmAgpBind(pI810->drmSubFD, agpHandle, pI810->DepthOffset) == 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] Bound depthbuffer memory\n"); pI810->DepthBuffer.Start = pI810->DepthOffset; pI810->DepthBuffer.Size = back_size; pI810->DepthBuffer.End = (pI810->DepthBuffer.Start + pI810->DepthBuffer.Size); } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] Unable to bind depthbuffer. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] Unable to allocate depthbuffer memory. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } } /* Now allocate and bind the agp space. This memory will include the * regular framebuffer as well as texture memory. */ drmAgpAlloc(pI810->drmSubFD, sysmem_size, 0, NULL, (drmAddress)&agpHandle); pI810->sysmemHandle = agpHandle; if (agpHandle != DRM_AGP_NO_HANDLE) { if (drmAgpBind(pI810->drmSubFD, agpHandle, 0) == 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] Bound System Texture Memory\n"); } else { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Unable to bind system texture memory. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } } else { xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Unable to allocate system texture memory. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } /* Allocate 7 or 8MB for XvMC this is setup as follows to best use tiled regions and required surface pitches. (Numbers are adjusted if the AGP region is only 32MB For numSurfaces == 6 44 - 48MB = 4MB Fence, 8 Tiles wide 43 - 44MB = 1MB Fence, 8 Tiles wide 42 - 43MB = 1MB Fence, 4 Tiles wide 41 - 42MB = 1MB Fence, 4 Tiles wide For numSurfaces == 7 44 - 48MB = 4MB Fence, 8 Tiles wide 43 - 44MB = 1MB Fence, 8 Tiles wide 42.5 - 43MB = 0.5MB Fence, 8 Tiles wide 42 - 42.5MB = 0.5MB Fence, 4 Tiles wide 40 - 42MB = 2MB Fence, 4 Tiles wide */ if (pI810->numSurfaces) { if (pI810->numSurfaces == 6) { pI810->MC.Size = 7 * 1024 * 1024; pI810->MC.Start = pI810->FbMapSize - 7 * 1024 * 1024; } if (pI810->numSurfaces == 7) { pI810->MC.Size = 8 * 1024 * 1024; pI810->MC.Start = pI810->FbMapSize - 8 * 1024 * 1024; } drmAgpAlloc(pI810->drmSubFD, pI810->MC.Size, 0, NULL, (drmAddress) &agpHandle); pI810->xvmcHandle = agpHandle; if (agpHandle != DRM_AGP_NO_HANDLE) { if (drmAgpBind(pI810->drmSubFD, agpHandle, pI810->MC.Start) == 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "GART: Allocated 7MB for HWMC\n"); pI810->MC.End = pI810->MC.Start + pI810->MC.Size; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "GART: HWMC bind failed\n"); pI810->MC.Start = 0; pI810->MC.Size = 0; pI810->MC.End = 0; } } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "GART: HWMC alloc failed\n"); pI810->MC.Start = 0; pI810->MC.Size = 0; pI810->MC.End = 0; } pI810->xvmcContext = 0; } drmAgpAlloc(pI810->drmSubFD, 4096, 2, (unsigned long *)&pI810->CursorPhysical, (drmAddress) &agpHandle); pI810->cursorHandle = agpHandle; if (agpHandle != DRM_AGP_NO_HANDLE) { tom = sysmem_size; if (drmAgpBind(pI810->drmSubFD, agpHandle, tom) == 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] GART: Allocated 4K for mouse cursor image\n"); pI810->CursorStart = tom; tom += 4096; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] GART: cursor bind failed\n"); pI810->CursorPhysical = 0; } } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] GART: cursor alloc failed\n"); pI810->CursorPhysical = 0; } drmAgpAlloc(pI810->drmSubFD, 16384, 2, (unsigned long *)&pI810->CursorARGBPhysical, (drmAddress) &agpHandle); pI810->cursorARGBHandle = agpHandle; if (agpHandle != DRM_AGP_NO_HANDLE) { if (drmAgpBind(pI810->drmSubFD, agpHandle, tom) == 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] GART: Allocated 16K for ARGB mouse cursor image\n"); pI810->CursorARGBStart = tom; tom += 16384; } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] GART: ARGB cursor bind failed\n"); pI810->CursorARGBPhysical = 0; } } else { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] GART: ARGB cursor alloc failed\n"); pI810->CursorARGBPhysical = 0; } /* Steal some of the excess cursor space for the overlay regs. */ pI810->OverlayPhysical = pI810->CursorPhysical + 1024; pI810->OverlayStart = pI810->CursorStart + 1024; I810SetTiledMemory(pScrn, 1, pI810->DepthBuffer.Start, i810_pitches[pitch_idx], 8 * 1024 * 1024); I810SetTiledMemory(pScrn, 2, pI810->BackBuffer.Start, i810_pitches[pitch_idx], 8 * 1024 * 1024); /* These are for HWMC surfaces */ if (pI810->numSurfaces == 6) { I810SetTiledMemory(pScrn, 3, pI810->MC.Start, 512, 1024 * 1024); I810SetTiledMemory(pScrn, 4, pI810->MC.Start + 1024 * 1024, 512, 1024 * 1024); I810SetTiledMemory(pScrn, 5, pI810->MC.Start + 1024 * 1024 * 2, 1024, 1024 * 1024); I810SetTiledMemory(pScrn, 6, pI810->MC.Start + 1024 * 1024 * 3, 1024, 4 * 1024 * 1024); } if (pI810->numSurfaces == 7) { I810SetTiledMemory(pScrn, 3, pI810->MC.Start, 512, 2 * 1024 * 1024); I810SetTiledMemory(pScrn, 4, pI810->MC.Start + 2 * 1024 * 1024, 512, 512 * 1024); I810SetTiledMemory(pScrn, 5, pI810->MC.Start + 2 * 1024 * 1024 + 512 * 1024, 1024, 512 * 1024); I810SetTiledMemory(pScrn, 6, pI810->MC.Start + 3 * 1024 * 1024, 1024, 1 * 1024 * 1024); I810SetTiledMemory(pScrn, 7, pI810->MC.Start + 4 * 1024 * 1024, 1024, 4 * 1024 * 1024); } pI810->auxPitch = i810_pitches[pitch_idx]; pI810->auxPitchBits = i810_pitch_flags[pitch_idx]; pI810->SavedDcacheMem = pI810->DcacheMem; pI810DRI->backbufferSize = pI810->BackBuffer.Size; if (drmAddMap(pI810->drmSubFD, (drm_handle_t) pI810->BackBuffer.Start, pI810->BackBuffer.Size, DRM_AGP, 0, (drmAddress) &pI810DRI->backbuffer) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAddMap(backbuffer) failed. Disabling DRI\n"); DRICloseScreen(pScreen); return FALSE; } pI810DRI->depthbufferSize = pI810->DepthBuffer.Size; if (drmAddMap(pI810->drmSubFD, (drm_handle_t) pI810->DepthBuffer.Start, pI810->DepthBuffer.Size, DRM_AGP, 0, (drmAddress) &pI810DRI->depthbuffer) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAddMap(depthbuffer) failed. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } /* Allocate FrontBuffer etc. */ if (!I810AllocateFront(pScrn)) { DRICloseScreen(pScreen); return FALSE; } /* Allocate buffer memory */ I810AllocHigh(&(pI810->BufferMem), &(pI810->SysMem), I810_DMA_BUF_NR * I810_DMA_BUF_SZ); xf86DrvMsg(pScreen->myNum, X_INFO, "[dri] Buffer map : %lx\n", pI810->BufferMem.Start); if (pI810->BufferMem.Start == 0 || pI810->BufferMem.End - pI810->BufferMem.Start > I810_DMA_BUF_NR * I810_DMA_BUF_SZ) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[dri] Not enough memory for dma buffers. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } if (drmAddMap(pI810->drmSubFD, (drm_handle_t) pI810->BufferMem.Start, pI810->BufferMem.Size, DRM_AGP, 0, (drmAddress) &pI810->buffer_map) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAddMap(buffer_map) failed. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } pI810DRI->agp_buffers = pI810->buffer_map; pI810DRI->agp_buf_size = pI810->BufferMem.Size; if (drmAddMap(pI810->drmSubFD, (drm_handle_t) pI810->LpRing->mem.Start, pI810->LpRing->mem.Size, DRM_AGP, 0, (drmAddress) &pI810->ring_map) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAddMap(ring_map) failed. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } /* Use the rest of memory for textures. */ pI810DRI->textureSize = pI810->SysMem.Size; i = mylog2(pI810DRI->textureSize / I810_NR_TEX_REGIONS); if (i < I810_LOG_MIN_TEX_REGION_SIZE) i = I810_LOG_MIN_TEX_REGION_SIZE; pI810DRI->logTextureGranularity = i; pI810DRI->textureSize = (pI810DRI->textureSize >> i) << i; /* truncate */ if (pI810DRI->textureSize < 512 * 1024) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] Less then 512k memory left for textures. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } if (!I810AllocLow(&(pI810->TexMem), &(pI810->SysMem), pI810DRI->textureSize)) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[agp] Texure memory allocation failed\n"); DRICloseScreen(pScreen); return FALSE; } if (drmAddMap(pI810->drmSubFD, (drm_handle_t) pI810->TexMem.Start, pI810->TexMem.Size, DRM_AGP, 0, (drmAddress) &pI810DRI->textures) < 0) { xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAddMap(textures) failed. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } if ((bufs = drmAddBufs(pI810->drmSubFD, I810_DMA_BUF_NR, I810_DMA_BUF_SZ, DRM_AGP_BUFFER, pI810->BufferMem.Start)) <= 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] failure adding %d %d byte DMA buffers. Disabling DRI.\n", I810_DMA_BUF_NR, I810_DMA_BUF_SZ); DRICloseScreen(pScreen); return FALSE; } xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] added %d %d byte DMA buffers\n", bufs, I810_DMA_BUF_SZ); I810InitDma(pScrn); /* Okay now initialize the dma engine */ if (!pI810DRI->irq) { pI810DRI->irq = drmGetInterruptFromBusID(pI810->drmSubFD, ((pI810->PciInfo->domain << 8) | pI810->PciInfo->bus), pI810->PciInfo->dev, pI810->PciInfo->func ); if ((drmCtlInstHandler(pI810->drmSubFD, pI810DRI->irq)) != 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] failure adding irq handler, there is a device " "already using that irq\n Consider rearranging your " "PCI cards. Disabling DRI.\n"); DRICloseScreen(pScreen); return FALSE; } } xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] dma control initialized, using IRQ %d\n", pI810DRI->irq); pI810DRI->deviceID = pI810->PciInfo->device_id; pI810DRI->width = pScrn->virtualX; pI810DRI->height = pScrn->virtualY; pI810DRI->mem = pScrn->videoRam * 1024; pI810DRI->cpp = pI810->cpp; pI810DRI->fbOffset = pI810->FrontBuffer.Start; pI810DRI->fbStride = pI810->auxPitch; pI810DRI->bitsPerPixel = pScrn->bitsPerPixel; pI810DRI->textureOffset = pI810->TexMem.Start; pI810DRI->backOffset = pI810->BackBuffer.Start; pI810DRI->depthOffset = pI810->DepthBuffer.Start; pI810DRI->ringOffset = pI810->LpRing->mem.Start; pI810DRI->ringSize = pI810->LpRing->mem.Size; pI810DRI->auxPitch = pI810->auxPitch; pI810DRI->auxPitchBits = pI810->auxPitchBits; pI810DRI->sarea_priv_offset = sizeof(XF86DRISAREARec); xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] visual configs initialized.\n"); pI810->pDRIInfo->driverSwapMethod = DRI_HIDE_X_CONTEXT; return TRUE; } void I810DRICloseScreen(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr pI810 = I810PTR(pScrn); if (pI810->pDRIInfo) { I810DRIPtr pI810DRI = (I810DRIPtr) pI810->pDRIInfo->devPrivate; if (pI810DRI) { if (pI810DRI->irq) { drmCtlUninstHandler(pI810->drmSubFD); pI810DRI->irq = 0; } free(pI810->pDRIInfo->devPrivate); pI810->pDRIInfo->devPrivate = NULL; } I810CleanupDma(pScrn); DRICloseScreen(pScreen); DRIDestroyInfoRec(pI810->pDRIInfo); pI810->pDRIInfo = NULL; } if (pI810->dcacheHandle!=DRM_AGP_NO_HANDLE) drmAgpFree(pI810->drmSubFD, pI810->dcacheHandle); if (pI810->backHandle!=DRM_AGP_NO_HANDLE) drmAgpFree(pI810->drmSubFD, pI810->backHandle); if (pI810->zHandle!=DRM_AGP_NO_HANDLE) drmAgpFree(pI810->drmSubFD, pI810->zHandle); if (pI810->cursorHandle!=DRM_AGP_NO_HANDLE) drmAgpFree(pI810->drmSubFD, pI810->cursorHandle); if (pI810->xvmcHandle!=DRM_AGP_NO_HANDLE) drmAgpFree(pI810->drmSubFD, pI810->xvmcHandle); if (pI810->sysmemHandle!=DRM_AGP_NO_HANDLE) drmAgpFree(pI810->drmSubFD, pI810->sysmemHandle); if (pI810->agpAcquired == TRUE) drmAgpRelease(pI810->drmSubFD); pI810->backHandle = DRM_AGP_NO_HANDLE; pI810->zHandle = DRM_AGP_NO_HANDLE; pI810->cursorHandle = DRM_AGP_NO_HANDLE; pI810->xvmcHandle = DRM_AGP_NO_HANDLE; pI810->sysmemHandle = DRM_AGP_NO_HANDLE; pI810->agpAcquired = FALSE; pI810->dcacheHandle = DRM_AGP_NO_HANDLE; } static Bool I810CreateContext(ScreenPtr pScreen, VisualPtr visual, drm_context_t hwContext, void *pVisualConfigPriv, DRIContextType contextStore) { return TRUE; } static void I810DestroyContext(ScreenPtr pScreen, drm_context_t hwContext, DRIContextType contextStore) { } Bool I810DRIFinishScreenInit(ScreenPtr pScreen) { I810SAREARec *sPriv = (I810SAREARec *) DRIGetSAREAPrivate(pScreen); ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr info = I810PTR(pScrn); memset(sPriv, 0, sizeof(*sPriv)); /* Have shadow run only while there is 3d active. */ if (info->allowPageFlip && info->drmMinor >= 3) { ShadowFBInit( pScreen, I810DRIRefreshArea ); } else info->allowPageFlip = 0; return DRIFinishScreenInit(pScreen); } void I810DRISwapContext(ScreenPtr pScreen, DRISyncType syncType, DRIContextType oldContextType, void *oldContext, DRIContextType newContextType, void *newContext) { ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr pI810 = I810PTR(pScrn); if (syncType == DRI_3D_SYNC && oldContextType == DRI_2D_CONTEXT && newContextType == DRI_2D_CONTEXT) { if (I810_DEBUG & DEBUG_VERBOSE_DRI) ErrorF("I810DRISwapContext (in)\n"); if (!pScrn->vtSema) return; pI810->LockHeld = 1; I810RefreshRing(pScrn); } else if (syncType == DRI_2D_SYNC && oldContextType == DRI_NO_CONTEXT && newContextType == DRI_2D_CONTEXT) { pI810->LockHeld = 0; if (I810_DEBUG & DEBUG_VERBOSE_DRI) ErrorF("I810DRISwapContext (out)\n"); } else if (I810_DEBUG & DEBUG_VERBOSE_DRI) ErrorF("I810DRISwapContext (other)\n"); } static void I810DRISetNeedSync(ScrnInfoPtr pScrn) { #ifdef HAVE_XAA_H I810Ptr pI810 = I810PTR(pScrn); if (pI810->AccelInfoRec) pI810->AccelInfoRec->NeedToSync = TRUE; #endif } static void I810DRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index) { ScreenPtr pScreen = pWin->drawable.pScreen; ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); BoxPtr pbox = REGION_RECTS(prgn); int nbox = REGION_NUM_RECTS(prgn); if (I810_DEBUG & DEBUG_VERBOSE_DRI) ErrorF("I810DRIInitBuffers\n"); I810SetupForSolidFill(pScrn, 0, GXcopy, -1); while (nbox--) { I810SelectBuffer(pScrn, I810_SELECT_BACK); I810SubsequentSolidFillRect(pScrn, pbox->x1, pbox->y1, pbox->x2 - pbox->x1, pbox->y2 - pbox->y1); pbox++; } /* Clear the depth buffer - uses 0xffff rather than 0. */ pbox = REGION_RECTS(prgn); nbox = REGION_NUM_RECTS(prgn); I810SelectBuffer(pScrn, I810_SELECT_DEPTH); I810SetupForSolidFill(pScrn, 0xffff, GXcopy, -1); while (nbox--) { I810SubsequentSolidFillRect(pScrn, pbox->x1, pbox->y1, pbox->x2 - pbox->x1, pbox->y2 - pbox->y1); pbox++; } I810SelectBuffer(pScrn, I810_SELECT_FRONT); I810DRISetNeedSync(pScrn); } /* This routine is a modified form of XAADoBitBlt with the calls to * ScreenToScreenBitBlt built in. My routine has the prgnSrc as source * instead of destination. My origin is upside down so the ydir cases * are reversed. * * KW: can you believe that this is called even when a 2d window moves? */ static void I810DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, RegionPtr prgnSrc, CARD32 index) { ScreenPtr pScreen = pParent->drawable.pScreen; ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); BoxPtr pboxTmp, pboxNext, pboxBase; DDXPointPtr pptTmp, pptNew2 = NULL; int xdir, ydir; int screenwidth = pScrn->virtualX; int screenheight = pScrn->virtualY; BoxPtr pbox = REGION_RECTS(prgnSrc); int nbox = REGION_NUM_RECTS(prgnSrc); BoxPtr pboxNew1 = NULL; BoxPtr pboxNew2 = NULL; DDXPointPtr pptNew1 = NULL; DDXPointPtr pptSrc = &ptOldOrg; int dx = pParent->drawable.x - ptOldOrg.x; int dy = pParent->drawable.y - ptOldOrg.y; /* If the copy will overlap in Y, reverse the order */ if (dy > 0) { ydir = -1; if (nbox > 1) { /* Keep ordering in each band, reverse order of bands */ pboxNew1 = (BoxPtr) malloc(sizeof(BoxRec) * nbox); if (!pboxNew1) return; pptNew1 = (DDXPointPtr) malloc(sizeof(DDXPointRec) * nbox); if (!pptNew1) { free(pboxNew1); return; } pboxBase = pboxNext = pbox + nbox - 1; while (pboxBase >= pbox) { while ((pboxNext >= pbox) && (pboxBase->y1 == pboxNext->y1)) pboxNext--; pboxTmp = pboxNext + 1; pptTmp = pptSrc + (pboxTmp - pbox); while (pboxTmp <= pboxBase) { *pboxNew1++ = *pboxTmp++; *pptNew1++ = *pptTmp++; } pboxBase = pboxNext; } pboxNew1 -= nbox; pbox = pboxNew1; pptNew1 -= nbox; pptSrc = pptNew1; } } else { /* No changes required */ ydir = 1; } /* If the regions will overlap in X, reverse the order */ if (dx > 0) { xdir = -1; if (nbox > 1) { /*reverse orderof rects in each band */ pboxNew2 = (BoxPtr) malloc(sizeof(BoxRec) * nbox); pptNew2 = (DDXPointPtr) malloc(sizeof(DDXPointRec) * nbox); if (!pboxNew2 || !pptNew2) { if (pptNew2) free(pptNew2); if (pboxNew2) free(pboxNew2); if (pboxNew1) { free(pptNew1); free(pboxNew1); } return; } pboxBase = pboxNext = pbox; while (pboxBase < pbox + nbox) { while ((pboxNext < pbox + nbox) && (pboxNext->y1 == pboxBase->y1)) pboxNext++; pboxTmp = pboxNext; pptTmp = pptSrc + (pboxTmp - pbox); while (pboxTmp != pboxBase) { *pboxNew2++ = *--pboxTmp; *pptNew2++ = *--pptTmp; } pboxBase = pboxNext; } pboxNew2 -= nbox; pbox = pboxNew2; pptNew2 -= nbox; pptSrc = pptNew2; } } else { /* No changes are needed */ xdir = 1; } /* SelectBuffer isn't really a good concept for the i810. */ I810EmitFlush(pScrn); I810SetupForScreenToScreenCopy(pScrn, xdir, ydir, GXcopy, -1, -1); for (; nbox--; pbox++) { int x1 = pbox->x1; int y1 = pbox->y1; int destx = x1 + dx; int desty = y1 + dy; int w = pbox->x2 - x1 + 1; int h = pbox->y2 - y1 + 1; if (destx < 0) x1 -= destx, w += destx, destx = 0; if (desty < 0) y1 -= desty, h += desty, desty = 0; if (destx + w > screenwidth) w = screenwidth - destx; if (desty + h > screenheight) h = screenheight - desty; if (w <= 0) continue; if (h <= 0) continue; if (I810_DEBUG & DEBUG_VERBOSE_DRI) ErrorF("MoveBuffers %d,%d %dx%d dx: %d dy: %d\n", x1, y1, w, h, dx, dy); I810SelectBuffer(pScrn, I810_SELECT_BACK); I810SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h); I810SelectBuffer(pScrn, I810_SELECT_DEPTH); I810SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h); } I810SelectBuffer(pScrn, I810_SELECT_FRONT); I810EmitFlush(pScrn); if (pboxNew2) { free(pptNew2); free(pboxNew2); } if (pboxNew1) { free(pptNew1); free(pboxNew1); } I810DRISetNeedSync(pScrn); } /* Use the miext/shadow module to maintain a list of dirty rectangles. * These are blitted to the back buffer to keep both buffers clean * during page-flipping when the 3d application isn't fullscreen. * * Unlike most use of the shadow code, both buffers are in video memory. * * An alternative to this would be to organize for all on-screen drawing * operations to be duplicated for the two buffers. That might be * faster, but seems like a lot more work... */ /* This should be done *before* XAA syncs or fires its buffer. * Otherwise will have to fire it again??? */ static void I810DRIRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox) { I810Ptr pI810 = I810PTR(pScrn); int i; I810SAREAPtr pSAREAPriv = DRIGetSAREAPrivate(pScrn->pScreen); unsigned int br13; int cpp=2; /* Don't want to do this when no 3d is active and pages are * right-way-round */ if (!pSAREAPriv->pf_active && pSAREAPriv->pf_current_page == 0) return; br13 = (pI810->auxPitch) | (0xcc << 16); for (i = 0 ; i < num ; i++, pbox++) { unsigned int w = min(pbox->y2, pScrn->virtualY-1) - max(pbox->y1, 0) + 1; unsigned int h = min(pbox->x2, pScrn->virtualX-1) - max(pbox->x1, 0) + 1; unsigned int dst = max(pbox->x1, 0)*cpp + (max(pbox->y1, 0)*pI810->auxPitch); BEGIN_LP_RING(6); OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4); OUT_RING(br13); OUT_RING( (h<<16) | (w*cpp) ); OUT_RING(pI810->BackBuffer.Start + dst); OUT_RING(br13 & 0xffff); OUT_RING(dst); ADVANCE_LP_RING(); } } static void I810EnablePageFlip(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr pI810 = I810PTR(pScrn); I810SAREAPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen); int cpp=2; pSAREAPriv->pf_enabled = pI810->allowPageFlip; pSAREAPriv->pf_active = 0; if (pI810->allowPageFlip) { unsigned int br13 = pI810->auxPitch | (0xcc << 16); BEGIN_LP_RING(6); OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4); OUT_RING(br13); OUT_RING((pScrn->virtualY << 16) | (pScrn->virtualX*cpp)); OUT_RING(pI810->BackBuffer.Start); OUT_RING(br13 & 0xFFFF); OUT_RING(0); ADVANCE_LP_RING(); pSAREAPriv->pf_active = 1; } } static void I810DisablePageFlip(ScreenPtr pScreen) { I810SAREAPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen); pSAREAPriv->pf_active=0; } static void I810DRITransitionSingleToMulti3d(ScreenPtr pScreen) { /* Tell the clients not to pageflip. How? * -- Field in sarea, plus bumping the window counters. * -- DRM needs to cope with Front-to-Back swapbuffers. */ I810DisablePageFlip(pScreen); } static void I810DRITransitionMultiToSingle3d(ScreenPtr pScreen) { /* Let the remaining 3d app start page flipping again */ I810EnablePageFlip(pScreen); } static void I810DRITransitionTo3d(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr pI810 = I810PTR(pScrn); I810EnablePageFlip(pScreen); pI810->have3DWindows = 1; } static void I810DRITransitionTo2d(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr pI810 = I810PTR(pScrn); I810SAREAPtr pSAREAPriv = DRIGetSAREAPrivate(pScreen); /* Try flipping back to the front page if necessary */ if (pSAREAPriv->pf_current_page == 1) drmCommandNone(pI810->drmSubFD, DRM_I810_FLIP); /* Shut down shadowing if we've made it back to the front page */ if (pSAREAPriv->pf_current_page == 0) { I810DisablePageFlip(pScreen); } pI810->have3DWindows = 0; } Bool I810DRILeave(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); if (pI810->directRenderingEnabled) { if (pI810->dcacheHandle != 0) if (drmAgpUnbind(pI810->drmSubFD, pI810->dcacheHandle) != 0) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"%s\n",strerror(errno)); return FALSE; } if (pI810->backHandle != 0) if (drmAgpUnbind(pI810->drmSubFD, pI810->backHandle) != 0) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"%s\n",strerror(errno)); return FALSE; } if (pI810->zHandle != 0) if (drmAgpUnbind(pI810->drmSubFD, pI810->zHandle) != 0) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"%s\n",strerror(errno)); return FALSE; } if (pI810->sysmemHandle != 0) if (drmAgpUnbind(pI810->drmSubFD, pI810->sysmemHandle) != 0) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"%s\n",strerror(errno)); return FALSE; } if (pI810->xvmcHandle != 0) if (drmAgpUnbind(pI810->drmSubFD, pI810->xvmcHandle) != 0) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"%s\n",strerror(errno)); return FALSE; } if (pI810->cursorHandle != 0) if (drmAgpUnbind(pI810->drmSubFD, pI810->cursorHandle) != 0) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"%s\n",strerror(errno)); return FALSE; } if (pI810->cursorARGBHandle != 0) if (drmAgpUnbind(pI810->drmSubFD, pI810->cursorARGBHandle) != 0) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"%s\n",strerror(errno)); return FALSE; } if (pI810->agpAcquired == TRUE) drmAgpRelease(pI810->drmSubFD); pI810->agpAcquired = FALSE; } return TRUE; } Bool I810DRIEnter(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); if (pI810->directRenderingEnabled) { if (pI810->agpAcquired == FALSE) drmAgpAcquire(pI810->drmSubFD); pI810->agpAcquired = TRUE; if (pI810->dcacheHandle != 0) if (drmAgpBind(pI810->drmSubFD, pI810->dcacheHandle, pI810->DepthOffset) != 0) return FALSE; if (pI810->backHandle != 0) if (drmAgpBind(pI810->drmSubFD, pI810->backHandle, pI810->BackOffset) != 0) return FALSE; if (pI810->zHandle != 0) if (drmAgpBind(pI810->drmSubFD, pI810->zHandle, pI810->DepthOffset) != 0) return FALSE; if (pI810->sysmemHandle != 0) if (drmAgpBind(pI810->drmSubFD, pI810->sysmemHandle, 0) != 0) return FALSE; if (pI810->xvmcHandle != 0) if (drmAgpBind(pI810->drmSubFD, pI810->xvmcHandle, pI810->MC.Start) != 0) return FALSE; if (pI810->cursorHandle != 0) if (drmAgpBind(pI810->drmSubFD, pI810->cursorHandle, pI810->CursorStart) != 0) return FALSE; if (pI810->cursorARGBHandle != 0) if (drmAgpBind(pI810->drmSubFD, pI810->cursorARGBHandle, pI810->CursorARGBStart) != 0) return FALSE; } I810SelectBuffer(pScrn, I810_SELECT_FRONT); return TRUE; } xf86-video-intel-2.99.917/src/legacy/i810/i810_xaa.c0000664000175000017500000002237612400044327016127 00000000000000 /************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif /* * Authors: * Keith Whitwell * */ #include "xorg-server.h" #include "xf86.h" #include "xaarop.h" #include "i810.h" static void I810SetupForMono8x8PatternFill(ScrnInfoPtr pScrn, int pattx, int patty, int fg, int bg, int rop, unsigned int planemask) { I810Ptr pI810 = I810PTR(pScrn); if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I810SetupFor8x8PatternColorExpand\n"); /* FULL_MONO_PAT_BLT, p176 */ pI810->BR[0] = (BR00_BITBLT_CLIENT | BR00_OP_MONO_PAT_BLT | 0x9); pI810->BR[18] = bg; pI810->BR[19] = fg; pI810->BR[13] = (pScrn->displayWidth * pI810->cpp); pI810->BR[13] |= I810PatternROP[rop] << 16; if (bg == -1) pI810->BR[13] |= BR13_MONO_PATN_TRANS; } static void I810SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty, int x, int y, int w, int h) { I810Ptr pI810 = I810PTR(pScrn); int addr = pI810->bufferOffset + (y * pScrn->displayWidth + x) * pI810->cpp; if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I810Subsequent8x8PatternColorExpand\n"); { BEGIN_LP_RING(12); OUT_RING(pI810->BR[0] | ((y << 5) & BR00_PAT_VERT_ALIGN)); OUT_RING(pI810->BR[13]); OUT_RING((h << 16) | (w * pI810->cpp)); OUT_RING(addr); OUT_RING(pI810->BR[13] & 0xFFFF); /* src pitch */ OUT_RING(addr); /* src addr */ OUT_RING(0); /* transparency color */ OUT_RING(pI810->BR[18]); /* bg */ OUT_RING(pI810->BR[19]); /* fg */ OUT_RING(pattx); /* pattern data */ OUT_RING(patty); OUT_RING(0); ADVANCE_LP_RING(); } } static void I810GetNextScanlineColorExpandBuffer(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); XAAInfoRecPtr infoPtr = pI810->AccelInfoRec; if (pI810->nextColorExpandBuf == pI810->NumScanlineColorExpandBuffers) I810Sync(pScrn); infoPtr->ScanlineColorExpandBuffers[0] = pI810->ScanlineColorExpandBuffers[pI810->nextColorExpandBuf]; if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("using color expand buffer %d\n", pI810->nextColorExpandBuf); pI810->nextColorExpandBuf++; } static void I810SetupForScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn, int fg, int bg, int rop, unsigned int planemask) { I810Ptr pI810 = I810PTR(pScrn); if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I810SetupForScanlineScreenToScreenColorExpand %d %d %x %x\n", fg, bg, rop, planemask); pI810->BR[13] = (pScrn->displayWidth * pI810->cpp); pI810->BR[13] |= I810CopyROP[rop] << 16; pI810->BR[13] |= (1 << 27); if (bg == -1) pI810->BR[13] |= BR13_MONO_TRANSPCY; pI810->BR[18] = bg; pI810->BR[19] = fg; I810GetNextScanlineColorExpandBuffer(pScrn); } static void I810SubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn, int x, int y, int w, int h, int skipleft) { I810Ptr pI810 = I810PTR(pScrn); if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I810SubsequentScanlineCPUToScreenColorExpandFill " "%d,%d %dx%x %d\n", x, y, w, h, skipleft); pI810->BR[0] = BR00_BITBLT_CLIENT | BR00_OP_MONO_SRC_COPY_BLT | 0x06; pI810->BR[9] = (pI810->bufferOffset + (y * pScrn->displayWidth + x) * pI810->cpp); pI810->BR[14] = ((1 << 16) | (w * pI810->cpp)); pI810->BR[11] = ((w + 31) / 32) - 1; } static void I810SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno) { I810Ptr pI810 = I810PTR(pScrn); pI810->BR[12] = (pI810->AccelInfoRec->ScanlineColorExpandBuffers[0] - pI810->FbBase); if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I810SubsequentColorExpandScanline %d (addr %x)\n", bufno, pI810->BR[12]); { BEGIN_LP_RING(8); OUT_RING(pI810->BR[0]); OUT_RING(pI810->BR[13]); OUT_RING(pI810->BR[14]); OUT_RING(pI810->BR[9]); OUT_RING(pI810->BR[11]); OUT_RING(pI810->BR[12]); /* srcaddr */ OUT_RING(pI810->BR[18]); OUT_RING(pI810->BR[19]); ADVANCE_LP_RING(); } /* Advance to next scanline. */ pI810->BR[9] += pScrn->displayWidth * pI810->cpp; I810GetNextScanlineColorExpandBuffer(pScrn); } /* Emit on gaining VT? */ #if 0 static void I810EmitInvarientState(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); BEGIN_LP_RING(10); OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE); OUT_RING(GFX_CMD_CONTEXT_SEL | CS_UPDATE_USE | CS_USE_CTX0); OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE); OUT_RING(0); OUT_RING(GFX_OP_COLOR_CHROMA_KEY); OUT_RING(CC1_UPDATE_KILL_WRITE | CC1_DISABLE_KILL_WRITE | CC1_UPDATE_COLOR_IDX | CC1_UPDATE_CHROMA_LOW | CC1_UPDATE_CHROMA_HI | 0); OUT_RING(0); OUT_RING(0); /* OUT_RING( CMD_OP_Z_BUFFER_INFO ); */ /* OUT_RING( pI810->DepthBuffer.Start | pI810->auxPitchBits); */ ADVANCE_LP_RING(); } #endif /* The following function sets up the supported acceleration. Call it * from the FbInit() function in the SVGA driver, or before ScreenInit * in a monolithic server. */ Bool I810AccelInit(ScreenPtr pScreen) { XAAInfoRecPtr infoPtr; ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr pI810 = I810PTR(pScrn); if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) ErrorF("I810AccelInit\n"); pI810->AccelInfoRec = infoPtr = XAACreateInfoRec(); if (!infoPtr) return FALSE; pI810->bufferOffset = 0; infoPtr->Flags = LINEAR_FRAMEBUFFER | OFFSCREEN_PIXMAPS; infoPtr->Flags |= PIXMAP_CACHE; /* Sync */ infoPtr->Sync = I810Sync; /* Solid filled rectangles */ { infoPtr->SolidFillFlags = NO_PLANEMASK; infoPtr->SetupForSolidFill = I810SetupForSolidFill; infoPtr->SubsequentSolidFillRect = I810SubsequentSolidFillRect; } /* Screen to screen copy * - the transparency op hangs the blit engine, disable for now. */ { infoPtr->ScreenToScreenCopyFlags = (0 | NO_PLANEMASK | NO_TRANSPARENCY | 0); infoPtr->SetupForScreenToScreenCopy = I810SetupForScreenToScreenCopy; infoPtr->SubsequentScreenToScreenCopy = I810SubsequentScreenToScreenCopy; } /* 8x8 pattern fills */ { infoPtr->SetupForMono8x8PatternFill = I810SetupForMono8x8PatternFill; infoPtr->SubsequentMono8x8PatternFillRect = I810SubsequentMono8x8PatternFillRect; infoPtr->Mono8x8PatternFillFlags = (HARDWARE_PATTERN_PROGRAMMED_BITS | HARDWARE_PATTERN_SCREEN_ORIGIN | BIT_ORDER_IN_BYTE_MSBFIRST | NO_PLANEMASK | 0); } /* 8x8 color fills - not considered useful for XAA. */ /* Scanline color expansion - Use the same scheme as the 3.3 driver. * */ if (pI810->Scratch.Size != 0) { int i; int width = ALIGN(pScrn->displayWidth, 32) / 8; int nr_buffers = pI810->Scratch.Size / width; unsigned char *ptr = pI810->FbBase + pI810->Scratch.Start; pI810->NumScanlineColorExpandBuffers = nr_buffers; pI810->ScanlineColorExpandBuffers = (unsigned char **) xnfcalloc(nr_buffers, sizeof(unsigned char *)); for (i = 0; i < nr_buffers; i++, ptr += width) pI810->ScanlineColorExpandBuffers[i] = ptr; infoPtr->ScanlineCPUToScreenColorExpandFillFlags = (NO_PLANEMASK | ROP_NEEDS_SOURCE | BIT_ORDER_IN_BYTE_MSBFIRST | 0); infoPtr->ScanlineColorExpandBuffers = (unsigned char **) xnfcalloc(1, sizeof(unsigned char *)); infoPtr->NumScanlineColorExpandBuffers = 1; infoPtr->ScanlineColorExpandBuffers[0] = pI810->ScanlineColorExpandBuffers[0]; pI810->nextColorExpandBuf = 0; infoPtr->SetupForScanlineCPUToScreenColorExpandFill = I810SetupForScanlineCPUToScreenColorExpandFill; infoPtr->SubsequentScanlineCPUToScreenColorExpandFill = I810SubsequentScanlineCPUToScreenColorExpandFill; infoPtr->SubsequentColorExpandScanline = I810SubsequentColorExpandScanline; } /* Possible todo: Image writes w/ non-GXCOPY rop. */ I810SelectBuffer(pScrn, I810_SELECT_FRONT); return XAAInit(pScreen, infoPtr); } xf86-video-intel-2.99.917/src/legacy/i810/Makefile.in0000664000175000017500000006160712445556117016534 00000000000000# Makefile.in generated by automake 1.14.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; 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/************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif /* * Authors: * Keith Whitwell * * Add ARGB HW cursor support: * Alan Hourihane * */ #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "compiler.h" #include "xf86fbman.h" #include "i810.h" static Bool I810UseHWCursorARGB(ScreenPtr pScreen, CursorPtr pCurs); static void I810LoadCursorARGB(ScrnInfoPtr pScrn, CursorPtr pCurs); static void I810LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src); static void I810ShowCursor(ScrnInfoPtr pScrn); static void I810HideCursor(ScrnInfoPtr pScrn); static void I810SetCursorColors(ScrnInfoPtr pScrn, int bg, int fb); static void I810SetCursorPosition(ScrnInfoPtr pScrn, int x, int y); static Bool I810UseHWCursor(ScreenPtr pScrn, CursorPtr pCurs); Bool I810CursorInit(ScreenPtr pScreen) { ScrnInfoPtr pScrn; I810Ptr pI810; xf86CursorInfoPtr infoPtr; pScrn = xf86ScreenToScrn(pScreen); pI810 = I810PTR(pScrn); pI810->CursorInfoRec = infoPtr = xf86CreateCursorInfoRec(); if (!infoPtr) return FALSE; infoPtr->MaxWidth = 64; infoPtr->MaxHeight = 64; infoPtr->Flags = (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP | HARDWARE_CURSOR_BIT_ORDER_MSBFIRST | HARDWARE_CURSOR_INVERT_MASK | HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK | HARDWARE_CURSOR_AND_SOURCE_WITH_MASK | HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64 | 0); infoPtr->SetCursorColors = I810SetCursorColors; infoPtr->SetCursorPosition = I810SetCursorPosition; infoPtr->LoadCursorImage = I810LoadCursorImage; infoPtr->HideCursor = I810HideCursor; infoPtr->ShowCursor = I810ShowCursor; infoPtr->UseHWCursor = I810UseHWCursor; #ifdef ARGB_CURSOR pI810->CursorIsARGB = FALSE; if (!pI810->CursorARGBPhysical) { infoPtr->UseHWCursorARGB = I810UseHWCursorARGB; infoPtr->LoadCursorARGB = I810LoadCursorARGB; } #endif return xf86InitCursor(pScreen, infoPtr); } #ifdef ARGB_CURSOR #include "cursorstr.h" static Bool I810UseHWCursorARGB (ScreenPtr pScreen, CursorPtr pCurs) { ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr pI810 = I810PTR(pScrn); if (!pI810->CursorARGBPhysical) return FALSE; if (pCurs->bits->height <= 64 && pCurs->bits->width <= 64) return TRUE; return FALSE; } static void I810LoadCursorARGB (ScrnInfoPtr pScrn, CursorPtr pCurs) { I810Ptr pI810 = I810PTR(pScrn); uint32_t *pcurs = (uint32_t *) (pI810->FbBase + pI810->CursorStart); uint32_t *image = (uint32_t *) pCurs->bits->argb; int x, y, w, h; #ifdef ARGB_CURSOR pI810->CursorIsARGB = TRUE; #endif w = pCurs->bits->width; h = pCurs->bits->height; for (y = 0; y < h; y++) { for (x = 0; x < w; x++) *pcurs++ = *image++; for (; x < 64; x++) *pcurs++ = 0; } for (; y < 64; y++) for (x = 0; x < 64; x++) *pcurs++ = 0; } #endif static Bool I810UseHWCursor(ScreenPtr pScreen, CursorPtr pCurs) { ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); I810Ptr pI810 = I810PTR(pScrn); if (!pI810->CursorPhysical) return FALSE; else return TRUE; } static void I810LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src) { I810Ptr pI810 = I810PTR(pScrn); uint8_t *pcurs = (uint8_t *) (pI810->FbBase + pI810->CursorStart); int x, y; #ifdef ARGB_CURSOR pI810->CursorIsARGB = FALSE; #endif for (y = 0; y < 64; y++) { for (x = 0; x < 64 / 4; x++) { *pcurs++ = *src++; } } } static void I810SetCursorPosition(ScrnInfoPtr pScrn, int x, int y) { I810Ptr pI810 = I810PTR(pScrn); int flag; x += pI810->CursorOffset; if (x >= 0) flag = CURSOR_X_POS; else { flag = CURSOR_X_NEG; x = -x; } OUTREG8(CURSOR_X_LO, x & 0xFF); OUTREG8(CURSOR_X_HI, (((x >> 8) & 0x07) | flag)); if (y >= 0) flag = CURSOR_Y_POS; else { flag = CURSOR_Y_NEG; y = -y; } OUTREG8(CURSOR_Y_LO, y & 0xFF); OUTREG8(CURSOR_Y_HI, (((y >> 8) & 0x07) | flag)); if (pI810->CursorIsARGB) OUTREG(CURSOR_BASEADDR, pI810->CursorARGBPhysical); else OUTREG(CURSOR_BASEADDR, pI810->CursorPhysical); } static void I810ShowCursor(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); unsigned char tmp; if (pI810->CursorIsARGB) { OUTREG(CURSOR_BASEADDR, pI810->CursorARGBPhysical); OUTREG8(CURSOR_CONTROL, CURSOR_ORIGIN_DISPLAY | CURSOR_MODE_64_ARGB_AX); } else { OUTREG(CURSOR_BASEADDR, pI810->CursorPhysical); OUTREG8(CURSOR_CONTROL, CURSOR_ORIGIN_DISPLAY | CURSOR_MODE_64_3C); } tmp = INREG8(PIXPIPE_CONFIG_0); tmp |= HW_CURSOR_ENABLE; OUTREG8(PIXPIPE_CONFIG_0, tmp); } static void I810HideCursor(ScrnInfoPtr pScrn) { unsigned char tmp; I810Ptr pI810 = I810PTR(pScrn); tmp = INREG8(PIXPIPE_CONFIG_0); tmp &= ~HW_CURSOR_ENABLE; OUTREG8(PIXPIPE_CONFIG_0, tmp); } static void I810SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg) { int tmp; I810Ptr pI810 = I810PTR(pScrn); vgaHWPtr hwp; #ifdef ARGB_CURSOR if (pI810->CursorIsARGB) return; #endif hwp = VGAHWPTR(pScrn); tmp = INREG8(PIXPIPE_CONFIG_0); tmp |= EXTENDED_PALETTE; OUTREG8(PIXPIPE_CONFIG_0, tmp); hwp->writeDacMask(hwp, 0xFF); hwp->writeDacWriteAddr(hwp, 0x04); hwp->writeDacData(hwp, (bg & 0x00FF0000) >> 16); hwp->writeDacData(hwp, (bg & 0x0000FF00) >> 8); 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IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ /* Each instruction is 3 dwords long, though most don't require all * this space. Maximum of 123 instructions. Smaller maxes per insn * type. */ #define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16)) #define REG_TYPE_R 0 /* temporary regs, no need to * dcl, must be written before * read -- Preserved between * phases. */ #define REG_TYPE_T 1 /* Interpolated values, must be * dcl'ed before use. * * 0..7: texture coord, * 8: diffuse spec, * 9: specular color, * 10: fog parameter in w. */ #define REG_TYPE_CONST 2 /* Restriction: only one const * can be referenced per * instruction, though it may be * selected for multiple inputs. * Constants not initialized * default to zero. */ #define REG_TYPE_S 3 /* sampler */ #define REG_TYPE_OC 4 /* output color (rgba) */ #define REG_TYPE_OD 5 /* output depth (w), xyz are * temporaries. If not written, * interpolated depth is used? */ #define REG_TYPE_U 6 /* unpreserved temporaries */ #define REG_TYPE_MASK 0x7 #define REG_TYPE_SHIFT 4 #define REG_NR_MASK 0xf /* REG_TYPE_T: */ #define T_TEX0 0 #define T_TEX1 1 #define T_TEX2 2 #define T_TEX3 3 #define T_TEX4 4 #define T_TEX5 5 #define T_TEX6 6 #define T_TEX7 7 #define T_DIFFUSE 8 #define T_SPECULAR 9 #define T_FOG_W 10 /* interpolated fog is in W coord */ /* Arithmetic instructions */ /* .replicate_swizzle == selection and replication of a particular * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww */ #define A0_NOP (0x0<<24) /* no operation */ #define A0_ADD (0x1<<24) /* dst = src0 + src1 */ #define A0_MOV (0x2<<24) /* dst = src0 */ #define A0_MUL (0x3<<24) /* dst = src0 * src1 */ #define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ #define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ #define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ #define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ #define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ #define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ #define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ #define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ #define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ #define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ #define A0_FLR (0x10<<24) /* dst = floor(src0) */ #define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ #define A0_TRC (0x12<<24) /* dst = int(src0) */ #define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ #define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ #define A0_DEST_SATURATE (1<<22) #define A0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ #define A0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define A0_DEST_CHANNEL_X (1<<10) #define A0_DEST_CHANNEL_Y (2<<10) #define A0_DEST_CHANNEL_Z (4<<10) #define A0_DEST_CHANNEL_W (8<<10) #define A0_DEST_CHANNEL_ALL (0xf<<10) #define A0_DEST_CHANNEL_SHIFT 10 #define A0_SRC0_TYPE_SHIFT 7 #define A0_SRC0_NR_SHIFT 2 #define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) #define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) #define SRC_X 0 #define SRC_Y 1 #define SRC_Z 2 #define SRC_W 3 #define SRC_ZERO 4 #define SRC_ONE 5 #define A1_SRC0_CHANNEL_X_NEGATE (1<<31) #define A1_SRC0_CHANNEL_X_SHIFT 28 #define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) #define A1_SRC0_CHANNEL_Y_SHIFT 24 #define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) #define A1_SRC0_CHANNEL_Z_SHIFT 20 #define A1_SRC0_CHANNEL_W_NEGATE (1<<19) #define A1_SRC0_CHANNEL_W_SHIFT 16 #define A1_SRC1_TYPE_SHIFT 13 #define A1_SRC1_NR_SHIFT 8 #define A1_SRC1_CHANNEL_X_NEGATE (1<<7) #define A1_SRC1_CHANNEL_X_SHIFT 4 #define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) #define A1_SRC1_CHANNEL_Y_SHIFT 0 #define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) #define A2_SRC1_CHANNEL_Z_SHIFT 28 #define A2_SRC1_CHANNEL_W_NEGATE (1<<27) #define A2_SRC1_CHANNEL_W_SHIFT 24 #define A2_SRC2_TYPE_SHIFT 21 #define A2_SRC2_NR_SHIFT 16 #define A2_SRC2_CHANNEL_X_NEGATE (1<<15) #define A2_SRC2_CHANNEL_X_SHIFT 12 #define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) #define A2_SRC2_CHANNEL_Y_SHIFT 8 #define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) #define A2_SRC2_CHANNEL_Z_SHIFT 4 #define A2_SRC2_CHANNEL_W_NEGATE (1<<3) #define A2_SRC2_CHANNEL_W_SHIFT 0 /* Texture instructions */ #define T0_TEXLD (0x15<<24) /* Sample texture using predeclared * sampler and address, and output * filtered texel data to destination * register */ #define T0_TEXLDP (0x16<<24) /* Same as texld but performs a * perspective divide of the texture * coordinate .xyz values by .w before * sampling. */ #define T0_TEXLDB (0x17<<24) /* Same as texld but biases the * computed LOD by w. Only S4.6 two's * comp is used. This implies that a * float to fixed conversion is * done. */ #define T0_TEXKILL (0x18<<24) /* Does not perform a sampling * operation. Simply kills the pixel * if any channel of the address * register is < 0.0. */ #define T0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ /* Note: U (unpreserved) regs do not retain their values between * phases (cannot be used for feedback) * * Note: oC and OD registers can only be used as the destination of a * texture instruction once per phase (this is an implementation * restriction). */ #define T0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ #define T0_SAMPLER_NR_MASK (0xf<<0) #define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ #define T1_ADDRESS_REG_NR_SHIFT 17 #define T2_MBZ 0 /* Declaration instructions */ #define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) * register or an s (sampler) * register. */ #define D0_SAMPLE_TYPE_SHIFT 22 #define D0_SAMPLE_TYPE_2D (0x0<<22) #define D0_SAMPLE_TYPE_CUBE (0x1<<22) #define D0_SAMPLE_TYPE_VOLUME (0x2<<22) #define D0_SAMPLE_TYPE_MASK (0x3<<22) #define D0_TYPE_SHIFT 19 /* Allow: T, S */ #define D0_NR_SHIFT 14 /* Allow T: 0..10, S: 0..15 */ #define D0_CHANNEL_X (1<<10) #define D0_CHANNEL_Y (2<<10) #define D0_CHANNEL_Z (4<<10) #define D0_CHANNEL_W (8<<10) #define D0_CHANNEL_ALL (0xf<<10) #define D0_CHANNEL_NONE (0<<10) #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse * or specular declarations. * * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) * * Must be zero for S (sampler) dcls */ #define D1_MBZ 0 #define D2_MBZ 0 /* MASK_* are the unshifted bitmasks of the destination mask in arithmetic * operations */ #define MASK_X 0x1 #define MASK_Y 0x2 #define MASK_Z 0x4 #define MASK_W 0x8 #define MASK_XYZ (MASK_X | MASK_Y | MASK_Z) #define MASK_XYZW (MASK_XYZ | MASK_W) #define MASK_SATURATE 0x10 /* Temporary, undeclared regs. Preserved between phases */ #define FS_R0 ((REG_TYPE_R << REG_TYPE_SHIFT) | 0) #define FS_R1 ((REG_TYPE_R << REG_TYPE_SHIFT) | 1) #define FS_R2 ((REG_TYPE_R << REG_TYPE_SHIFT) | 2) #define FS_R3 ((REG_TYPE_R << REG_TYPE_SHIFT) | 3) /* Texture coordinate regs. Must be declared. */ #define FS_T0 ((REG_TYPE_T << REG_TYPE_SHIFT) | 0) #define FS_T1 ((REG_TYPE_T << REG_TYPE_SHIFT) | 1) #define FS_T2 ((REG_TYPE_T << REG_TYPE_SHIFT) | 2) #define FS_T3 ((REG_TYPE_T << REG_TYPE_SHIFT) | 3) #define FS_T4 ((REG_TYPE_T << REG_TYPE_SHIFT) | 4) #define FS_T5 ((REG_TYPE_T << REG_TYPE_SHIFT) | 5) #define FS_T6 ((REG_TYPE_T << REG_TYPE_SHIFT) | 6) #define FS_T7 ((REG_TYPE_T << REG_TYPE_SHIFT) | 7) #define FS_T8 ((REG_TYPE_T << REG_TYPE_SHIFT) | 8) #define FS_T9 ((REG_TYPE_T << REG_TYPE_SHIFT) | 9) #define FS_T10 ((REG_TYPE_T << REG_TYPE_SHIFT) | 10) /* Constant values */ #define FS_C0 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 0) #define FS_C1 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 1) #define FS_C2 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 2) #define FS_C3 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 3) #define FS_C4 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 4) #define FS_C5 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 5) #define FS_C6 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 6) #define FS_C7 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 7) /* Sampler regs */ #define FS_S0 ((REG_TYPE_S << REG_TYPE_SHIFT) | 0) #define FS_S1 ((REG_TYPE_S << REG_TYPE_SHIFT) | 1) #define FS_S2 ((REG_TYPE_S << REG_TYPE_SHIFT) | 2) #define FS_S3 ((REG_TYPE_S << REG_TYPE_SHIFT) | 3) /* Output color */ #define FS_OC ((REG_TYPE_OC << REG_TYPE_SHIFT) | 0) /* Output depth */ #define FS_OD ((REG_TYPE_OD << REG_TYPE_SHIFT) | 0) /* Unpreserved temporary regs */ #define FS_U0 ((REG_TYPE_U << REG_TYPE_SHIFT) | 0) #define FS_U1 ((REG_TYPE_U << REG_TYPE_SHIFT) | 1) #define FS_U2 ((REG_TYPE_U << REG_TYPE_SHIFT) | 2) #define FS_U3 ((REG_TYPE_U << REG_TYPE_SHIFT) | 3) #define X_CHANNEL_SHIFT (REG_TYPE_SHIFT + 3) #define Y_CHANNEL_SHIFT (X_CHANNEL_SHIFT + 4) #define Z_CHANNEL_SHIFT (Y_CHANNEL_SHIFT + 4) #define W_CHANNEL_SHIFT (Z_CHANNEL_SHIFT + 4) #define REG_CHANNEL_MASK 0xf #define REG_NR(reg) ((reg) & REG_NR_MASK) #define REG_TYPE(reg) (((reg) >> REG_TYPE_SHIFT) & REG_TYPE_MASK) #define REG_X(reg) (((reg) >> X_CHANNEL_SHIFT) & REG_CHANNEL_MASK) #define REG_Y(reg) (((reg) >> Y_CHANNEL_SHIFT) & REG_CHANNEL_MASK) #define REG_Z(reg) (((reg) >> Z_CHANNEL_SHIFT) & REG_CHANNEL_MASK) #define REG_W(reg) (((reg) >> W_CHANNEL_SHIFT) & REG_CHANNEL_MASK) enum i915_fs_channel { X_CHANNEL_VAL = 0, Y_CHANNEL_VAL, Z_CHANNEL_VAL, W_CHANNEL_VAL, ZERO_CHANNEL_VAL, ONE_CHANNEL_VAL, NEG_X_CHANNEL_VAL = X_CHANNEL_VAL | 0x8, NEG_Y_CHANNEL_VAL = Y_CHANNEL_VAL | 0x8, NEG_Z_CHANNEL_VAL = Z_CHANNEL_VAL | 0x8, NEG_W_CHANNEL_VAL = W_CHANNEL_VAL | 0x8, NEG_ONE_CHANNEL_VAL = ONE_CHANNEL_VAL | 0x8 }; #define i915_fs_operand(reg, x, y, z, w) \ (reg) | \ (x##_CHANNEL_VAL << X_CHANNEL_SHIFT) | \ (y##_CHANNEL_VAL << Y_CHANNEL_SHIFT) | \ (z##_CHANNEL_VAL << Z_CHANNEL_SHIFT) | \ (w##_CHANNEL_VAL << W_CHANNEL_SHIFT) /** * Construct an operand description for using a register with no swizzling */ #define i915_fs_operand_reg(reg) \ i915_fs_operand(reg, X, Y, Z, W) #define i915_fs_operand_reg_negate(reg) \ i915_fs_operand(reg, NEG_X, NEG_Y, NEG_Z, NEG_W) /** * Returns an operand containing (0.0, 0.0, 0.0, 0.0). */ #define i915_fs_operand_zero() i915_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO) /** * Returns an unused operand */ #define i915_fs_operand_none() i915_fs_operand_zero() /** * Returns an operand containing (1.0, 1.0, 1.0, 1.0). */ #define i915_fs_operand_one() i915_fs_operand(FS_R0, ONE, ONE, ONE, ONE) #define i915_get_hardware_channel_val(val, shift, negate) \ (((val & 0x7) << shift) | ((val & 0x8) ? negate : 0)) /** * Outputs a fragment shader command to declare a sampler or texture register. */ #define i915_fs_dcl(reg) \ do { \ OUT_BATCH(D0_DCL | \ (REG_TYPE(reg) << D0_TYPE_SHIFT) | \ (REG_NR(reg) << D0_NR_SHIFT) | \ ((REG_TYPE(reg) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); \ OUT_BATCH(0); \ OUT_BATCH(0); \ } while (0) #define i915_fs_texld(dest_reg, sampler_reg, address_reg) \ do { \ OUT_BATCH(T0_TEXLD | \ (REG_TYPE(dest_reg) << T0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << T0_DEST_NR_SHIFT) | \ (REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT)); \ OUT_BATCH((REG_TYPE(address_reg) << T1_ADDRESS_REG_TYPE_SHIFT) | \ (REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT)); \ OUT_BATCH(0); \ } while (0) #define i915_fs_texldp(dest_reg, sampler_reg, address_reg) \ do { \ OUT_BATCH(T0_TEXLDP | \ (REG_TYPE(dest_reg) << T0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << T0_DEST_NR_SHIFT) | \ (REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT)); \ OUT_BATCH((REG_TYPE(address_reg) << T1_ADDRESS_REG_TYPE_SHIFT) | \ (REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT)); \ OUT_BATCH(0); \ } while (0) #define i915_fs_arith_masked(op, dest_reg, dest_mask, operand0, operand1, operand2) \ _i915_fs_arith_masked(A0_##op, dest_reg, dest_mask, operand0, operand1, operand2) #define i915_fs_arith(op, dest_reg, operand0, operand1, operand2) \ _i915_fs_arith(A0_##op, dest_reg, operand0, operand1, operand2) #define _i915_fs_arith_masked(cmd, dest_reg, dest_mask, operand0, operand1, operand2) \ do { \ /* Set up destination register and write mask */ \ OUT_BATCH(cmd | \ (REG_TYPE(dest_reg) << A0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << A0_DEST_NR_SHIFT) | \ (((dest_mask) & ~MASK_SATURATE) << A0_DEST_CHANNEL_SHIFT) | \ (((dest_mask) & MASK_SATURATE) ? A0_DEST_SATURATE : 0) | \ /* Set up operand 0 */ \ (REG_TYPE(operand0) << A0_SRC0_TYPE_SHIFT) | \ (REG_NR(operand0) << A0_SRC0_NR_SHIFT)); \ OUT_BATCH(i915_get_hardware_channel_val(REG_X(operand0), \ A1_SRC0_CHANNEL_X_SHIFT, \ A1_SRC0_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand0), \ A1_SRC0_CHANNEL_Y_SHIFT, \ A1_SRC0_CHANNEL_Y_NEGATE) | \ i915_get_hardware_channel_val(REG_Z(operand0), \ A1_SRC0_CHANNEL_Z_SHIFT, \ A1_SRC0_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand0), \ A1_SRC0_CHANNEL_W_SHIFT, \ A1_SRC0_CHANNEL_W_NEGATE) | \ /* Set up operand 1 */ \ (REG_TYPE(operand1) << A1_SRC1_TYPE_SHIFT) | \ (REG_NR(operand1) << A1_SRC1_NR_SHIFT) | \ i915_get_hardware_channel_val(REG_X(operand1), \ A1_SRC1_CHANNEL_X_SHIFT, \ A1_SRC1_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand1), \ A1_SRC1_CHANNEL_Y_SHIFT, \ A1_SRC1_CHANNEL_Y_NEGATE)); \ OUT_BATCH(i915_get_hardware_channel_val(REG_Z(operand1), \ A2_SRC1_CHANNEL_Z_SHIFT, \ A2_SRC1_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand1), \ A2_SRC1_CHANNEL_W_SHIFT, \ A2_SRC1_CHANNEL_W_NEGATE) | \ /* Set up operand 2 */ \ (REG_TYPE(operand2) << A2_SRC2_TYPE_SHIFT) | \ (REG_NR(operand2) << A2_SRC2_NR_SHIFT) | \ i915_get_hardware_channel_val(REG_X(operand2), \ A2_SRC2_CHANNEL_X_SHIFT, \ A2_SRC2_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand2), \ A2_SRC2_CHANNEL_Y_SHIFT, \ A2_SRC2_CHANNEL_Y_NEGATE) | \ i915_get_hardware_channel_val(REG_Z(operand2), \ A2_SRC2_CHANNEL_Z_SHIFT, \ A2_SRC2_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand2), \ A2_SRC2_CHANNEL_W_SHIFT, \ A2_SRC2_CHANNEL_W_NEGATE)); \ } while (0) #define _i915_fs_arith(cmd, dest_reg, operand0, operand1, operand2) do {\ /* Set up destination register and write mask */ \ OUT_BATCH(cmd | \ (REG_TYPE(dest_reg) << A0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << A0_DEST_NR_SHIFT) | \ (A0_DEST_CHANNEL_ALL) | \ /* Set up operand 0 */ \ (REG_TYPE(operand0) << A0_SRC0_TYPE_SHIFT) | \ (REG_NR(operand0) << A0_SRC0_NR_SHIFT)); \ OUT_BATCH(i915_get_hardware_channel_val(REG_X(operand0), \ A1_SRC0_CHANNEL_X_SHIFT, \ A1_SRC0_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand0), \ A1_SRC0_CHANNEL_Y_SHIFT, \ A1_SRC0_CHANNEL_Y_NEGATE) | \ i915_get_hardware_channel_val(REG_Z(operand0), \ A1_SRC0_CHANNEL_Z_SHIFT, \ A1_SRC0_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand0), \ A1_SRC0_CHANNEL_W_SHIFT, \ A1_SRC0_CHANNEL_W_NEGATE) | \ /* Set up operand 1 */ \ (REG_TYPE(operand1) << A1_SRC1_TYPE_SHIFT) | \ (REG_NR(operand1) << A1_SRC1_NR_SHIFT) | \ i915_get_hardware_channel_val(REG_X(operand1), \ A1_SRC1_CHANNEL_X_SHIFT, \ A1_SRC1_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand1), \ A1_SRC1_CHANNEL_Y_SHIFT, \ A1_SRC1_CHANNEL_Y_NEGATE)); \ OUT_BATCH(i915_get_hardware_channel_val(REG_Z(operand1), \ A2_SRC1_CHANNEL_Z_SHIFT, \ A2_SRC1_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand1), \ A2_SRC1_CHANNEL_W_SHIFT, \ A2_SRC1_CHANNEL_W_NEGATE) | \ /* Set up operand 2 */ \ (REG_TYPE(operand2) << A2_SRC2_TYPE_SHIFT) | \ (REG_NR(operand2) << A2_SRC2_NR_SHIFT) | \ i915_get_hardware_channel_val(REG_X(operand2), \ A2_SRC2_CHANNEL_X_SHIFT, \ A2_SRC2_CHANNEL_X_NEGATE) | \ i915_get_hardware_channel_val(REG_Y(operand2), \ A2_SRC2_CHANNEL_Y_SHIFT, \ A2_SRC2_CHANNEL_Y_NEGATE) | \ i915_get_hardware_channel_val(REG_Z(operand2), \ A2_SRC2_CHANNEL_Z_SHIFT, \ A2_SRC2_CHANNEL_Z_NEGATE) | \ i915_get_hardware_channel_val(REG_W(operand2), \ A2_SRC2_CHANNEL_W_SHIFT, \ A2_SRC2_CHANNEL_W_NEGATE)); \ } while (0) #define i915_fs_mov(dest_reg, operand0) \ i915_fs_arith(MOV, dest_reg, \ operand0, \ i915_fs_operand_none(), \ i915_fs_operand_none()) #define i915_fs_mov_masked(dest_reg, dest_mask, operand0) \ i915_fs_arith_masked (MOV, dest_reg, dest_mask, \ operand0, \ i915_fs_operand_none(), \ i915_fs_operand_none()) #define i915_fs_frc(dest_reg, operand0) \ i915_fs_arith (FRC, dest_reg, \ operand0, \ i915_fs_operand_none(), \ i915_fs_operand_none()) /** Add operand0 and operand1 and put the result in dest_reg */ #define i915_fs_add(dest_reg, operand0, operand1) \ i915_fs_arith (ADD, dest_reg, \ operand0, operand1, \ i915_fs_operand_none()) /** Multiply operand0 and operand1 and put the result in dest_reg */ #define i915_fs_mul(dest_reg, operand0, operand1) \ i915_fs_arith (MUL, dest_reg, \ operand0, operand1, \ i915_fs_operand_none()) /** Computes 1/sqrt(operand0.replicate_swizzle) puts the result in dest_reg */ #define i915_fs_rsq(dest_reg, dest_mask, operand0) \ do { \ if (dest_mask) { \ i915_fs_arith_masked (RSQ, dest_reg, dest_mask, \ operand0, \ i915_fs_operand_none (), \ i915_fs_operand_none ()); \ } else { \ i915_fs_arith (RSQ, dest_reg, \ operand0, \ i915_fs_operand_none (), \ i915_fs_operand_none ()); \ } \ } while (0) /** Puts the minimum of operand0 and operand1 in dest_reg */ #define i915_fs_min(dest_reg, operand0, operand1) \ i915_fs_arith (MIN, dest_reg, \ operand0, operand1, \ i915_fs_operand_none()) /** Puts the maximum of operand0 and operand1 in dest_reg */ #define i915_fs_max(dest_reg, operand0, operand1) \ i915_fs_arith (MAX, dest_reg, \ operand0, operand1, \ i915_fs_operand_none()) #define i915_fs_cmp(dest_reg, operand0, operand1, operand2) \ i915_fs_arith (CMP, dest_reg, operand0, operand1, operand2) /** Perform operand0 * operand1 + operand2 and put the result in dest_reg */ #define i915_fs_mad(dest_reg, dest_mask, op0, op1, op2) \ do { \ if (dest_mask) { \ i915_fs_arith_masked (MAD, dest_reg, dest_mask, op0, op1, op2); \ } else { \ i915_fs_arith (MAD, dest_reg, op0, op1, op2); \ } \ } while (0) #define i915_fs_dp2add(dest_reg, dest_mask, op0, op1, op2) \ do { \ if (dest_mask) { \ i915_fs_arith_masked (DP2ADD, dest_reg, dest_mask, op0, op1, op2); \ } else { \ i915_fs_arith (DP2ADD, dest_reg, op0, op1, op2); \ } \ } while (0) /** * Perform a 3-component dot-product of operand0 and operand1 and put the * resulting scalar in the channels of dest_reg specified by the dest_mask. */ #define i915_fs_dp3(dest_reg, dest_mask, op0, op1) \ do { \ if (dest_mask) { \ i915_fs_arith_masked (DP3, dest_reg, dest_mask, \ op0, op1,\ i915_fs_operand_none()); \ } else { \ i915_fs_arith (DP3, dest_reg, op0, op1,\ i915_fs_operand_none()); \ } \ } while (0) /** * Sets up local state for accumulating a fragment shader buffer. * * \param x maximum number of shader commands that may be used between * a FS_START and FS_END */ #define FS_LOCALS() \ uint32_t _shader_offset #define FS_BEGIN() \ do { \ _shader_offset = intel->batch_used++; \ } while (0) #define FS_END() \ do { \ intel->batch_ptr[_shader_offset] = \ _3DSTATE_PIXEL_SHADER_PROGRAM | \ (intel->batch_used - _shader_offset - 2); \ } while (0); xf86-video-intel-2.99.917/src/uxa/uxa.c0000664000175000017500000004016212441657365014274 00000000000000/* * Copyright © 2001 Keith Packard * * Partly based on code that is Copyright © The XFree86 Project Inc. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ /** @file * This file covers the initialization and teardown of UXA, and has various * functions not responsible for performing rendering, pixmap migration, or * memory management. */ #ifdef HAVE_DIX_CONFIG_H #include #endif #include #include "uxa-priv.h" #include #include "dixfontstr.h" #include "uxa.h" #if HAS_DEVPRIVATEKEYREC DevPrivateKeyRec uxa_screen_index; #else int uxa_screen_index; #endif /** * uxa_get_drawable_pixmap() returns a backing pixmap for a given drawable. * * @param pDrawable the drawable being requested. * * This function returns the backing pixmap for a drawable, whether it is a * redirected window, unredirected window, or already a pixmap. Note that * coordinate translation is needed when drawing to the backing pixmap of a * redirected window, and the translation coordinates are provided by calling * uxa_get_drawable_pixmap() on the drawable. */ PixmapPtr uxa_get_drawable_pixmap(DrawablePtr pDrawable) { if (pDrawable->type == DRAWABLE_WINDOW) return pDrawable->pScreen-> GetWindowPixmap((WindowPtr) pDrawable); else return (PixmapPtr) pDrawable; } /** * Sets the offsets to add to coordinates to make them address the same bits in * the backing drawable. These coordinates are nonzero only for redirected * windows. */ void uxa_get_drawable_deltas(DrawablePtr pDrawable, PixmapPtr pPixmap, int *xp, int *yp) { #ifdef COMPOSITE if (pDrawable->type == DRAWABLE_WINDOW) { *xp = -pPixmap->screen_x; *yp = -pPixmap->screen_y; return; } #endif *xp = 0; *yp = 0; } /** * uxa_pixmap_is_offscreen() is used to determine if a pixmap is in offscreen * memory, meaning that acceleration could probably be done to it, and that it * will need to be wrapped by PrepareAccess()/FinishAccess() when accessing it * with the CPU. * * Note that except for UploadToScreen()/DownloadFromScreen() (which explicitly * deal with moving pixmaps in and out of system memory), UXA will give drivers * pixmaps as arguments for which uxa_pixmap_is_offscreen() is TRUE. * * @return TRUE if the given drawable is in framebuffer memory. */ Bool uxa_pixmap_is_offscreen(PixmapPtr p) { ScreenPtr pScreen = p->drawable.pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(pScreen); if (uxa_screen->info->pixmap_is_offscreen) return uxa_screen->info->pixmap_is_offscreen(p); return FALSE; } /** * uxa_drawable_is_offscreen() is a convenience wrapper for * uxa_pixmap_is_offscreen(). */ Bool uxa_drawable_is_offscreen(DrawablePtr pDrawable) { return uxa_pixmap_is_offscreen(uxa_get_drawable_pixmap(pDrawable)); } /** * Returns the pixmap which backs a drawable, and the offsets to add to * coordinates to make them address the same bits in the backing drawable. */ PixmapPtr uxa_get_offscreen_pixmap(DrawablePtr drawable, int *xp, int *yp) { PixmapPtr pixmap = uxa_get_drawable_pixmap(drawable); uxa_get_drawable_deltas(drawable, pixmap, xp, yp); if (uxa_pixmap_is_offscreen(pixmap)) return pixmap; else return NULL; } /** * uxa_prepare_access() is UXA's wrapper for the driver's PrepareAccess() handler. * * It deals with waiting for synchronization with the card, determining if * PrepareAccess() is necessary, and working around PrepareAccess() failure. */ Bool uxa_prepare_access(DrawablePtr pDrawable, uxa_access_t access) { ScreenPtr pScreen = pDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(pScreen); PixmapPtr pPixmap = uxa_get_drawable_pixmap(pDrawable); Bool offscreen = uxa_pixmap_is_offscreen(pPixmap); if (!offscreen) return TRUE; if (uxa_screen->info->prepare_access) return (*uxa_screen->info->prepare_access) (pPixmap, access); return TRUE; } /** * uxa_finish_access() is UXA's wrapper for the driver's finish_access() handler. * * It deals with calling the driver's finish_access() only if necessary. */ void uxa_finish_access(DrawablePtr pDrawable, uxa_access_t access) { ScreenPtr pScreen = pDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(pScreen); PixmapPtr pPixmap; if (uxa_screen->info->finish_access == NULL) return; pPixmap = uxa_get_drawable_pixmap(pDrawable); if (!uxa_pixmap_is_offscreen(pPixmap)) return; (*uxa_screen->info->finish_access) (pPixmap, access); } /** * uxa_validate_gc() sets the ops to UXA's implementations, which may be * accelerated or may sync the card and fall back to fb. */ static void uxa_validate_gc(GCPtr pGC, unsigned long changes, DrawablePtr pDrawable) { /* fbValidateGC will do direct access to pixmaps if the tiling has * changed. * Preempt fbValidateGC by doing its work and masking the change out, so * that we can do the Prepare/finish_access. */ #ifdef FB_24_32BIT if ((changes & GCTile) && fbGetRotatedPixmap(pGC)) { (*pGC->pScreen->DestroyPixmap) (fbGetRotatedPixmap(pGC)); fbGetRotatedPixmap(pGC) = 0; } if (pGC->fillStyle == FillTiled) { PixmapPtr pOldTile, pNewTile; pOldTile = pGC->tile.pixmap; if (pOldTile->drawable.bitsPerPixel != pDrawable->bitsPerPixel) { pNewTile = fbGetRotatedPixmap(pGC); if (!pNewTile || pNewTile->drawable.bitsPerPixel != pDrawable->bitsPerPixel) { if (pNewTile) (*pGC->pScreen-> DestroyPixmap) (pNewTile); /* fb24_32ReformatTile will do direct access * of a newly-allocated pixmap. This isn't a * problem yet, since we don't put pixmaps in * FB until at least one accelerated UXA op. */ if (uxa_prepare_access (&pOldTile->drawable, UXA_ACCESS_RO)) { pNewTile = fb24_32ReformatTile(pOldTile, pDrawable-> bitsPerPixel); uxa_finish_access(&pOldTile->drawable, UXA_ACCESS_RO); } } if (pNewTile) { fbGetRotatedPixmap(pGC) = pOldTile; pGC->tile.pixmap = pNewTile; changes |= GCTile; } } } #endif if (changes & GCTile) { if (!pGC->tileIsPixel && FbEvenTile(pGC->tile.pixmap->drawable.width * pDrawable->bitsPerPixel)) { if (uxa_prepare_access (&pGC->tile.pixmap->drawable, UXA_ACCESS_RW)) { fbPadPixmap(pGC->tile.pixmap); uxa_finish_access(&pGC->tile.pixmap->drawable, UXA_ACCESS_RW); } } /* Mask out the GCTile change notification, now that we've * done FB's job for it. */ changes &= ~GCTile; } if (changes & GCStipple && pGC->stipple) { /* We can't inline stipple handling like we do for GCTile * because it sets fbgc privates. */ if (uxa_prepare_access(&pGC->stipple->drawable, UXA_ACCESS_RW)) { fbValidateGC(pGC, changes, pDrawable); uxa_finish_access(&pGC->stipple->drawable, UXA_ACCESS_RW); } } else { fbValidateGC(pGC, changes, pDrawable); } pGC->ops = (GCOps *) & uxa_ops; } static GCFuncs uxaGCFuncs = { uxa_validate_gc, miChangeGC, miCopyGC, miDestroyGC, miChangeClip, miDestroyClip, miCopyClip }; /** * uxa_create_gc makes a new GC and hooks up its funcs handler, so that * uxa_validate_gc() will get called. */ static int uxa_create_gc(GCPtr pGC) { if (!fbCreateGC(pGC)) return FALSE; pGC->funcs = &uxaGCFuncs; return TRUE; } Bool uxa_prepare_access_window(WindowPtr pWin) { if (pWin->backgroundState == BackgroundPixmap) { if (!uxa_prepare_access (&pWin->background.pixmap->drawable, UXA_ACCESS_RO)) return FALSE; } if (pWin->borderIsPixel == FALSE) { if (!uxa_prepare_access (&pWin->border.pixmap->drawable, UXA_ACCESS_RO)) { if (pWin->backgroundState == BackgroundPixmap) uxa_finish_access(&pWin->background.pixmap-> drawable, UXA_ACCESS_RO); return FALSE; } } return TRUE; } void uxa_finish_access_window(WindowPtr pWin) { if (pWin->backgroundState == BackgroundPixmap) uxa_finish_access(&pWin->background.pixmap->drawable, UXA_ACCESS_RO); if (pWin->borderIsPixel == FALSE) uxa_finish_access(&pWin->border.pixmap->drawable, UXA_ACCESS_RO); } static Bool uxa_change_window_attributes(WindowPtr pWin, unsigned long mask) { Bool ret; if (!uxa_prepare_access_window(pWin)) return FALSE; ret = fbChangeWindowAttributes(pWin, mask); uxa_finish_access_window(pWin); return ret; } static RegionPtr uxa_bitmap_to_region(PixmapPtr pPix) { RegionPtr ret; if (!uxa_prepare_access(&pPix->drawable, UXA_ACCESS_RO)) return NULL; ret = fbPixmapToRegion(pPix); uxa_finish_access(&pPix->drawable, UXA_ACCESS_RO); return ret; } void uxa_set_fallback_debug(ScreenPtr screen, Bool enable) { uxa_screen_t *uxa_screen = uxa_get_screen(screen); uxa_screen->fallback_debug = enable; } void uxa_set_force_fallback(ScreenPtr screen, Bool value) { uxa_screen_t *uxa_screen = uxa_get_screen(screen); uxa_screen->force_fallback = value; } /** * uxa_close_screen() unwraps its wrapped screen functions and tears down UXA's * screen private, before calling down to the next CloseSccreen. */ static Bool uxa_close_screen(CLOSE_SCREEN_ARGS_DECL) { uxa_screen_t *uxa_screen = uxa_get_screen(screen); #ifdef RENDER PictureScreenPtr ps = GetPictureScreenIfSet(screen); #endif int n; if (uxa_screen->solid_clear) FreePicture(uxa_screen->solid_clear, 0); if (uxa_screen->solid_black) FreePicture(uxa_screen->solid_black, 0); if (uxa_screen->solid_white) FreePicture(uxa_screen->solid_white, 0); for (n = 0; n < uxa_screen->solid_cache_size; n++) FreePicture(uxa_screen->solid_cache[n].picture, 0); uxa_glyphs_fini(screen); #if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(1,15,99,903,0) if (screen->devPrivate) { /* Destroy the pixmap created by miScreenInit() *before* * chaining up as we finalize ourselves here and so this * is the last chance we have of releasing our resources * associated with the Pixmap. So do it first. */ (void) (*screen->DestroyPixmap) (screen->devPrivate); screen->devPrivate = NULL; } #endif screen->CreateGC = uxa_screen->SavedCreateGC; screen->CloseScreen = uxa_screen->SavedCloseScreen; screen->GetImage = uxa_screen->SavedGetImage; screen->GetSpans = uxa_screen->SavedGetSpans; screen->CreatePixmap = uxa_screen->SavedCreatePixmap; screen->DestroyPixmap = uxa_screen->SavedDestroyPixmap; screen->CopyWindow = uxa_screen->SavedCopyWindow; screen->ChangeWindowAttributes = uxa_screen->SavedChangeWindowAttributes; screen->BitmapToRegion = uxa_screen->SavedBitmapToRegion; #ifdef RENDER if (ps) { ps->Composite = uxa_screen->SavedComposite; ps->Glyphs = uxa_screen->SavedGlyphs; ps->Trapezoids = uxa_screen->SavedTrapezoids; ps->AddTraps = uxa_screen->SavedAddTraps; ps->Triangles = uxa_screen->SavedTriangles; ps->UnrealizeGlyph = uxa_screen->SavedUnrealizeGlyph; } #endif free(uxa_screen); return (*screen->CloseScreen) (CLOSE_SCREEN_ARGS); } /** * This function allocates a driver structure for UXA drivers to fill in. By * having UXA allocate the structure, the driver structure can be extended * without breaking ABI between UXA and the drivers. The driver's * responsibility is to check beforehand that the UXA module has a matching * major number and sufficient minor. Drivers are responsible for freeing the * driver structure using free(). * * @return a newly allocated, zero-filled driver structure */ uxa_driver_t *uxa_driver_alloc(void) { return calloc(1, sizeof(uxa_driver_t)); } /** * @param screen screen being initialized * @param pScreenInfo UXA driver record * * uxa_driver_init sets up UXA given a driver record filled in by the driver. * pScreenInfo should have been allocated by uxa_driver_alloc(). See the * comments in _UxaDriver for what must be filled in and what is optional. * * @return TRUE if UXA was successfully initialized. */ Bool uxa_driver_init(ScreenPtr screen, uxa_driver_t * uxa_driver) { uxa_screen_t *uxa_screen; if (!uxa_driver) return FALSE; if (uxa_driver->uxa_major != UXA_VERSION_MAJOR || uxa_driver->uxa_minor > UXA_VERSION_MINOR) { LogMessage(X_ERROR, "UXA(%d): driver's UXA version requirements " "(%d.%d) are incompatible with UXA version (%d.%d)\n", screen->myNum, uxa_driver->uxa_major, uxa_driver->uxa_minor, UXA_VERSION_MAJOR, UXA_VERSION_MINOR); return FALSE; } if (!uxa_driver->prepare_solid) { LogMessage(X_ERROR, "UXA(%d): uxa_driver_t::prepare_solid must be " "non-NULL\n", screen->myNum); return FALSE; } if (!uxa_driver->prepare_copy) { LogMessage(X_ERROR, "UXA(%d): uxa_driver_t::prepare_copy must be " "non-NULL\n", screen->myNum); return FALSE; } #if HAS_DIXREGISTERPRIVATEKEY if (!dixRegisterPrivateKey(&uxa_screen_index, PRIVATE_SCREEN, 0)) return FALSE; #endif uxa_screen = calloc(sizeof(uxa_screen_t), 1); if (!uxa_screen) { LogMessage(X_WARNING, "UXA(%d): Failed to allocate screen private\n", screen->myNum); return FALSE; } uxa_screen->info = uxa_driver; dixSetPrivate(&screen->devPrivates, &uxa_screen_index, uxa_screen); uxa_screen->force_fallback = FALSE; uxa_screen->solid_cache_size = 0; uxa_screen->solid_clear = 0; uxa_screen->solid_black = 0; uxa_screen->solid_white = 0; // exaDDXDriverInit(screen); /* * Replace various fb screen functions */ uxa_screen->SavedCloseScreen = screen->CloseScreen; screen->CloseScreen = uxa_close_screen; uxa_screen->SavedCreateGC = screen->CreateGC; screen->CreateGC = uxa_create_gc; uxa_screen->SavedGetImage = screen->GetImage; screen->GetImage = uxa_get_image; uxa_screen->SavedGetSpans = screen->GetSpans; screen->GetSpans = uxa_get_spans; uxa_screen->SavedCopyWindow = screen->CopyWindow; screen->CopyWindow = uxa_copy_window; uxa_screen->SavedChangeWindowAttributes = screen->ChangeWindowAttributes; screen->ChangeWindowAttributes = uxa_change_window_attributes; uxa_screen->SavedBitmapToRegion = screen->BitmapToRegion; screen->BitmapToRegion = uxa_bitmap_to_region; #ifdef RENDER { PictureScreenPtr ps = GetPictureScreenIfSet(screen); if (ps) { uxa_screen->SavedComposite = ps->Composite; ps->Composite = uxa_composite; uxa_screen->SavedGlyphs = ps->Glyphs; ps->Glyphs = uxa_glyphs; uxa_screen->SavedUnrealizeGlyph = ps->UnrealizeGlyph; ps->UnrealizeGlyph = uxa_glyph_unrealize; uxa_screen->SavedTriangles = ps->Triangles; ps->Triangles = uxa_triangles; uxa_screen->SavedTrapezoids = ps->Trapezoids; ps->Trapezoids = uxa_trapezoids; uxa_screen->SavedAddTraps = ps->AddTraps; ps->AddTraps = uxa_add_traps; } } #endif LogMessage(X_INFO, "UXA(%d): Driver registered support for the following" " operations:\n", screen->myNum); assert(uxa_driver->prepare_solid != NULL); LogMessage(X_INFO, " solid\n"); assert(uxa_driver->prepare_copy != NULL); LogMessage(X_INFO, " copy\n"); if (uxa_driver->prepare_composite != NULL) { LogMessage(X_INFO, " composite (RENDER acceleration)\n"); } if (uxa_driver->put_image != NULL) { LogMessage(X_INFO, " put_image\n"); } if (uxa_driver->get_image != NULL) { LogMessage(X_INFO, " get_image\n"); } return TRUE; } Bool uxa_resources_init(ScreenPtr screen) { if (!uxa_glyphs_init(screen)) return FALSE; return TRUE; } /** * uxa_driver_fini tears down UXA on a given screen. * * @param pScreen screen being torn down. */ void uxa_driver_fini(ScreenPtr pScreen) { /*right now does nothing */ } xf86-video-intel-2.99.917/src/uxa/intel_display.c0000664000175000017500000020240712441657344016336 00000000000000/* * Copyright © 2007 Red Hat, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Dave Airlie * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include "xorg-server.h" #include "xorgVersion.h" #include "intel.h" #include "intel_bufmgr.h" #include "intel_options.h" #include "backlight.h" #include "xf86drm.h" #include "xf86drmMode.h" #include "X11/Xatom.h" #if defined(HAVE_X11_EXTENSIONS_DPMSCONST_H) #include #else #define DPMSModeOn 0 #define DPMSModeOff 3 #endif #include "xf86DDC.h" #include "fb.h" #if USE_UXA #include "intel_uxa.h" #endif #define KNOWN_MODE_FLAGS ((1<<14)-1) struct intel_drm_queue { struct list list; xf86CrtcPtr crtc; uint32_t seq; void *data; ScrnInfoPtr scrn; intel_drm_handler_proc handler; intel_drm_abort_proc abort; }; static uint32_t intel_drm_seq; static struct list intel_drm_queue; struct intel_mode { int fd; uint32_t fb_id; int cpp; drmEventContext event_context; int old_fb_id; int flip_count; uint64_t fe_msc; uint64_t fe_usec; struct list outputs; struct list crtcs; void *pageflip_data; intel_pageflip_handler_proc pageflip_handler; intel_pageflip_abort_proc pageflip_abort; Bool delete_dp_12_displays; }; struct intel_pageflip { struct intel_mode *mode; Bool dispatch_me; }; struct intel_crtc { struct intel_mode *mode; drmModeModeInfo kmode; drmModeCrtcPtr mode_crtc; int pipe; dri_bo *cursor; dri_bo *rotate_bo; uint32_t rotate_pitch; uint32_t rotate_fb_id; xf86CrtcPtr crtc; struct list link; PixmapPtr scanout_pixmap; uint32_t scanout_fb_id; int32_t vblank_offset; uint32_t msc_prev; uint64_t msc_high; }; struct intel_property { drmModePropertyPtr mode_prop; uint64_t value; int num_atoms; /* if range prop, num_atoms == 1; if enum prop, num_atoms == num_enums + 1 */ Atom *atoms; }; struct intel_output { struct intel_mode *mode; int output_id; drmModeConnectorPtr mode_output; drmModeEncoderPtr *mode_encoders; drmModePropertyBlobPtr edid_blob; int num_props; struct intel_property *props; void *private_data; Bool has_panel_limits; int panel_hdisplay; int panel_vdisplay; int dpms_mode; struct backlight backlight; int backlight_active_level; xf86OutputPtr output; struct list link; int enc_mask; int enc_clone_mask; }; static void intel_output_dpms(xf86OutputPtr output, int mode); static void intel_output_dpms_backlight(xf86OutputPtr output, int oldmode, int mode); static inline int crtc_id(struct intel_crtc *crtc) { return crtc->mode_crtc->crtc_id; } static void intel_output_backlight_set(xf86OutputPtr output, int level) { struct intel_output *intel_output = output->driver_private; if (backlight_set(&intel_output->backlight, level) < 0) { xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "failed to set backlight %s to brightness level %d, disabling\n", intel_output->backlight.iface, level); backlight_disable(&intel_output->backlight); } } static int intel_output_backlight_get(xf86OutputPtr output) { struct intel_output *intel_output = output->driver_private; return backlight_get(&intel_output->backlight); } static void intel_output_backlight_init(xf86OutputPtr output) { struct intel_output *intel_output = output->driver_private; intel_screen_private *intel = intel_get_screen_private(output->scrn); const char *str; #if !USE_BACKLIGHT return; #endif str = xf86GetOptValString(intel->Options, OPTION_BACKLIGHT); if (str != NULL) { if (backlight_exists(str) != BL_NONE) { intel_output->backlight_active_level = backlight_open(&intel_output->backlight, strdup(str)); if (intel_output->backlight_active_level != -1) { xf86DrvMsg(output->scrn->scrnIndex, X_CONFIG, "found backlight control interface %s\n", str); return; } } xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "unrecognised backlight control interface %s\n", str); } intel_output->backlight_active_level = backlight_open(&intel_output->backlight, NULL); if (intel_output->backlight_active_level != -1) { xf86DrvMsg(output->scrn->scrnIndex, X_PROBED, "found backlight control interface %s\n", intel_output->backlight.iface); return; } } static void mode_from_kmode(ScrnInfoPtr scrn, drmModeModeInfoPtr kmode, DisplayModePtr mode) { memset(mode, 0, sizeof(DisplayModeRec)); mode->status = MODE_OK; mode->Clock = kmode->clock; mode->HDisplay = kmode->hdisplay; mode->HSyncStart = kmode->hsync_start; mode->HSyncEnd = kmode->hsync_end; mode->HTotal = kmode->htotal; mode->HSkew = kmode->hskew; mode->VDisplay = kmode->vdisplay; mode->VSyncStart = kmode->vsync_start; mode->VSyncEnd = kmode->vsync_end; mode->VTotal = kmode->vtotal; mode->VScan = kmode->vscan; mode->Flags = kmode->flags; mode->name = strdup(kmode->name); if (kmode->type & DRM_MODE_TYPE_DRIVER) mode->type = M_T_DRIVER; if (kmode->type & DRM_MODE_TYPE_PREFERRED) mode->type |= M_T_PREFERRED; if (mode->status == MODE_OK && kmode->flags & ~KNOWN_MODE_FLAGS) mode->status = MODE_BAD; /* unknown flags => unhandled */ xf86SetModeCrtc (mode, scrn->adjustFlags); } static void mode_to_kmode(ScrnInfoPtr scrn, drmModeModeInfoPtr kmode, DisplayModePtr mode) { memset(kmode, 0, sizeof(*kmode)); kmode->clock = mode->Clock; kmode->hdisplay = mode->HDisplay; kmode->hsync_start = mode->HSyncStart; kmode->hsync_end = mode->HSyncEnd; kmode->htotal = mode->HTotal; kmode->hskew = mode->HSkew; kmode->vdisplay = mode->VDisplay; kmode->vsync_start = mode->VSyncStart; kmode->vsync_end = mode->VSyncEnd; kmode->vtotal = mode->VTotal; kmode->vscan = mode->VScan; kmode->flags = mode->Flags; if (mode->name) strncpy(kmode->name, mode->name, DRM_DISPLAY_MODE_LEN); kmode->name[DRM_DISPLAY_MODE_LEN-1] = 0; } static void intel_crtc_dpms(xf86CrtcPtr crtc, int mode) { } void intel_mode_disable_unused_functions(ScrnInfoPtr scrn) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); struct intel_mode *mode = intel_get_screen_private(scrn)->modes; int i; /* Force off for consistency between kernel and ddx */ for (i = 0; i < xf86_config->num_crtc; i++) { xf86CrtcPtr crtc = xf86_config->crtc[i]; if (!crtc->enabled) drmModeSetCrtc(mode->fd, crtc_id(crtc->driver_private), 0, 0, 0, NULL, 0, NULL); } } static Bool intel_crtc_apply(xf86CrtcPtr crtc) { ScrnInfoPtr scrn = crtc->scrn; struct intel_crtc *intel_crtc = crtc->driver_private; struct intel_mode *mode = intel_crtc->mode; xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(crtc->scrn); uint32_t *output_ids; int output_count = 0; int fb_id, x, y; int i, ret = FALSE; output_ids = calloc(sizeof(uint32_t), xf86_config->num_output); if (!output_ids) return FALSE; for (i = 0; i < xf86_config->num_output; i++) { xf86OutputPtr output = xf86_config->output[i]; struct intel_output *intel_output; /* Make sure we mark the output as off (and save the backlight) * before the kernel turns it off due to changing the pipe. * This is necessary as the kernel may turn off the backlight * and we lose track of the user settings. */ if (output->crtc == NULL) output->funcs->dpms(output, DPMSModeOff); if (output->crtc != crtc) continue; intel_output = output->driver_private; if (!intel_output->mode_output) return FALSE; output_ids[output_count] = intel_output->mode_output->connector_id; output_count++; } if (!intel_crtc->scanout_fb_id) { #if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(1,5,99,0,0) if (!xf86CrtcRotate(crtc, mode, rotation)) goto done; #else if (!xf86CrtcRotate(crtc)) goto done; #endif } #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,7,0,0,0) crtc->funcs->gamma_set(crtc, crtc->gamma_red, crtc->gamma_green, crtc->gamma_blue, crtc->gamma_size); #endif x = crtc->x; y = crtc->y; fb_id = mode->fb_id; if (intel_crtc->rotate_fb_id) { fb_id = intel_crtc->rotate_fb_id; x = 0; y = 0; } else if (intel_crtc->scanout_fb_id && intel_crtc->scanout_pixmap->drawable.width >= crtc->mode.HDisplay && intel_crtc->scanout_pixmap->drawable.height >= crtc->mode.VDisplay) { fb_id = intel_crtc->scanout_fb_id; x = 0; y = 0; } ret = drmModeSetCrtc(mode->fd, crtc_id(intel_crtc), fb_id, x, y, output_ids, output_count, &intel_crtc->kmode); if (ret) { xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, "failed to set mode: %s\n", strerror(-ret)); ret = FALSE; } else { ret = TRUE; /* Force DPMS to On for all outputs, which the kernel will have done * with the mode set. Also, restore the backlight level */ for (i = 0; i < xf86_config->num_output; i++) { xf86OutputPtr output = xf86_config->output[i]; struct intel_output *intel_output; if (output->crtc != crtc) continue; intel_output = output->driver_private; intel_output_dpms_backlight(output, intel_output->dpms_mode, DPMSModeOn); intel_output->dpms_mode = DPMSModeOn; } } if (scrn->pScreen) xf86_reload_cursors(scrn->pScreen); done: free(output_ids); return ret; } static Bool intel_crtc_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode, Rotation rotation, int x, int y) { ScrnInfoPtr scrn = crtc->scrn; intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_crtc *intel_crtc = crtc->driver_private; struct intel_mode *intel_mode = intel_crtc->mode; int saved_x, saved_y; Rotation saved_rotation; DisplayModeRec saved_mode; int ret = TRUE; unsigned int pitch = scrn->displayWidth * intel->cpp; if (intel_mode->fb_id == 0) { ret = drmModeAddFB(intel_mode->fd, scrn->virtualX, scrn->virtualY, scrn->depth, scrn->bitsPerPixel, pitch, intel->front_buffer->handle, &intel_mode->fb_id); if (ret < 0) { ErrorF("failed to add fb\n"); return FALSE; } drm_intel_bo_disable_reuse(intel->front_buffer); } saved_mode = crtc->mode; saved_x = crtc->x; saved_y = crtc->y; saved_rotation = crtc->rotation; crtc->mode = *mode; crtc->x = x; crtc->y = y; crtc->rotation = rotation; intel_flush(intel); mode_to_kmode(crtc->scrn, &intel_crtc->kmode, mode); ret = intel_crtc_apply(crtc); if (!ret) { crtc->x = saved_x; crtc->y = saved_y; crtc->rotation = saved_rotation; crtc->mode = saved_mode; } return ret; } static void intel_crtc_set_cursor_colors(xf86CrtcPtr crtc, int bg, int fg) { } static void intel_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y) { struct intel_crtc *intel_crtc = crtc->driver_private; struct intel_mode *mode = intel_crtc->mode; drmModeMoveCursor(mode->fd, crtc_id(intel_crtc), x, y); } static int __intel_crtc_load_cursor_argb(xf86CrtcPtr crtc, CARD32 *image) { struct intel_crtc *intel_crtc = crtc->driver_private; int ret; ret = dri_bo_subdata(intel_crtc->cursor, 0, 64*64*4, image); if (ret) xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, "failed to set cursor: %s\n", strerror(-ret)); return ret; } #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,15,99,902,2) static Bool intel_crtc_load_cursor_argb(xf86CrtcPtr crtc, CARD32 *image) { return __intel_crtc_load_cursor_argb(crtc, image) == 0; } #else static void intel_crtc_load_cursor_argb(xf86CrtcPtr crtc, CARD32 *image) { __intel_crtc_load_cursor_argb(crtc, image); } #endif static void intel_crtc_hide_cursor(xf86CrtcPtr crtc) { struct intel_crtc *intel_crtc = crtc->driver_private; struct intel_mode *mode = intel_crtc->mode; drmModeSetCursor(mode->fd, crtc_id(intel_crtc), 0, 64, 64); } static void intel_crtc_show_cursor(xf86CrtcPtr crtc) { struct intel_crtc *intel_crtc = crtc->driver_private; struct intel_mode *mode = intel_crtc->mode; drmModeSetCursor(mode->fd, crtc_id(intel_crtc), intel_crtc->cursor->handle, 64, 64); } static void * intel_crtc_shadow_allocate(xf86CrtcPtr crtc, int width, int height) { ScrnInfoPtr scrn = crtc->scrn; struct intel_crtc *intel_crtc = crtc->driver_private; struct intel_mode *mode = intel_crtc->mode; int rotate_pitch; uint32_t tiling; int ret; intel_crtc->rotate_bo = intel_allocate_framebuffer(scrn, width, height, mode->cpp, &rotate_pitch, &tiling); if (!intel_crtc->rotate_bo) { xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, "Couldn't allocate shadow memory for rotated CRTC\n"); return NULL; } ret = drmModeAddFB(mode->fd, width, height, crtc->scrn->depth, crtc->scrn->bitsPerPixel, rotate_pitch, intel_crtc->rotate_bo->handle, &intel_crtc->rotate_fb_id); if (ret) { ErrorF("failed to add rotate fb\n"); drm_intel_bo_unreference(intel_crtc->rotate_bo); return NULL; } intel_crtc->rotate_pitch = rotate_pitch; return intel_crtc->rotate_bo; } static PixmapPtr intel_create_pixmap_header(ScreenPtr pScreen, int width, int height, int depth, int bitsPerPixel, int devKind, void *pPixData) { PixmapPtr pixmap; /* width and height of 0 means don't allocate any pixmap data */ pixmap = (*pScreen->CreatePixmap) (pScreen, 0, 0, depth, 0); if (pixmap) { if ((*pScreen->ModifyPixmapHeader) (pixmap, width, height, depth, bitsPerPixel, devKind, pPixData)) { return pixmap; } (*pScreen->DestroyPixmap) (pixmap); } return NullPixmap; } static PixmapPtr intel_crtc_shadow_create(xf86CrtcPtr crtc, void *data, int width, int height) { ScrnInfoPtr scrn = crtc->scrn; intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_crtc *intel_crtc = crtc->driver_private; PixmapPtr rotate_pixmap; if (!data) { data = intel_crtc_shadow_allocate (crtc, width, height); if (!data) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Couldn't allocate shadow pixmap for rotated CRTC\n"); return NULL; } } if (intel_crtc->rotate_bo == NULL) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Couldn't allocate shadow pixmap for rotated CRTC\n"); return NULL; } rotate_pixmap = intel_create_pixmap_header(scrn->pScreen, width, height, scrn->depth, scrn->bitsPerPixel, intel_crtc->rotate_pitch, NULL); if (rotate_pixmap == NULL) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Couldn't allocate shadow pixmap for rotated CRTC\n"); return NULL; } intel_set_pixmap_bo(rotate_pixmap, intel_crtc->rotate_bo); intel->shadow_present = TRUE; return rotate_pixmap; } static void intel_crtc_shadow_destroy(xf86CrtcPtr crtc, PixmapPtr rotate_pixmap, void *data) { ScrnInfoPtr scrn = crtc->scrn; intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_crtc *intel_crtc = crtc->driver_private; struct intel_mode *mode = intel_crtc->mode; if (rotate_pixmap) { intel_set_pixmap_bo(rotate_pixmap, NULL); rotate_pixmap->drawable.pScreen->DestroyPixmap(rotate_pixmap); } if (data) { /* Be sure to sync acceleration before the memory gets * unbound. */ drmModeRmFB(mode->fd, intel_crtc->rotate_fb_id); intel_crtc->rotate_fb_id = 0; dri_bo_unreference(intel_crtc->rotate_bo); intel_crtc->rotate_bo = NULL; } intel->shadow_present = FALSE; } static void intel_crtc_gamma_set(xf86CrtcPtr crtc, CARD16 *red, CARD16 *green, CARD16 *blue, int size) { struct intel_crtc *intel_crtc = crtc->driver_private; struct intel_mode *mode = intel_crtc->mode; drmModeCrtcSetGamma(mode->fd, crtc_id(intel_crtc), size, red, green, blue); } static void intel_crtc_destroy(xf86CrtcPtr crtc) { struct intel_crtc *intel_crtc = crtc->driver_private; if (intel_crtc->cursor) { drmModeSetCursor(intel_crtc->mode->fd, crtc_id(intel_crtc), 0, 64, 64); drm_intel_bo_unreference(intel_crtc->cursor); intel_crtc->cursor = NULL; } list_del(&intel_crtc->link); free(intel_crtc); crtc->driver_private = NULL; } #ifdef INTEL_PIXMAP_SHARING static Bool intel_set_scanout_pixmap(xf86CrtcPtr crtc, PixmapPtr ppix) { struct intel_crtc *intel_crtc = crtc->driver_private; ScrnInfoPtr scrn = crtc->scrn; intel_screen_private *intel = intel_get_screen_private(scrn); dri_bo *bo; if (ppix == intel_crtc->scanout_pixmap) return TRUE; if (!ppix) { intel_crtc->scanout_pixmap = NULL; if (intel_crtc->scanout_fb_id) { drmModeRmFB(intel->drmSubFD, intel_crtc->scanout_fb_id); intel_crtc->scanout_fb_id = 0; } return TRUE; } bo = intel_get_pixmap_bo(ppix); if (intel->front_buffer) { ErrorF("have front buffer\n"); } drm_intel_bo_disable_reuse(bo); intel_crtc->scanout_pixmap = ppix; return drmModeAddFB(intel->drmSubFD, ppix->drawable.width, ppix->drawable.height, ppix->drawable.depth, ppix->drawable.bitsPerPixel, ppix->devKind, bo->handle, &intel_crtc->scanout_fb_id) == 0; } #endif static const xf86CrtcFuncsRec intel_crtc_funcs = { .dpms = intel_crtc_dpms, .set_mode_major = intel_crtc_set_mode_major, .set_cursor_colors = intel_crtc_set_cursor_colors, .set_cursor_position = intel_crtc_set_cursor_position, .show_cursor = intel_crtc_show_cursor, .hide_cursor = intel_crtc_hide_cursor, #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,15,99,902,3) .load_cursor_argb_check = intel_crtc_load_cursor_argb, #else .load_cursor_argb = intel_crtc_load_cursor_argb, #endif .shadow_create = intel_crtc_shadow_create, .shadow_allocate = intel_crtc_shadow_allocate, .shadow_destroy = intel_crtc_shadow_destroy, .gamma_set = intel_crtc_gamma_set, .destroy = intel_crtc_destroy, #ifdef INTEL_PIXMAP_SHARING .set_scanout_pixmap = intel_set_scanout_pixmap, #endif }; static void intel_crtc_init(ScrnInfoPtr scrn, struct intel_mode *mode, drmModeResPtr mode_res, int num) { intel_screen_private *intel = intel_get_screen_private(scrn); xf86CrtcPtr crtc; struct intel_crtc *intel_crtc; intel_crtc = calloc(sizeof(struct intel_crtc), 1); if (intel_crtc == NULL) return; crtc = xf86CrtcCreate(scrn, &intel_crtc_funcs); if (crtc == NULL) { free(intel_crtc); return; } intel_crtc->mode_crtc = drmModeGetCrtc(mode->fd, mode_res->crtcs[num]); if (intel_crtc->mode_crtc == NULL) { free(intel_crtc); return; } intel_crtc->mode = mode; crtc->driver_private = intel_crtc; intel_crtc->pipe = drm_intel_get_pipe_from_crtc_id(intel->bufmgr, crtc_id(intel_crtc)); intel_crtc->cursor = drm_intel_bo_alloc(intel->bufmgr, "ARGB cursor", 4*64*64, 4096); intel_crtc->crtc = crtc; list_add(&intel_crtc->link, &mode->crtcs); } static Bool is_panel(int type) { return (type == DRM_MODE_CONNECTOR_LVDS || type == DRM_MODE_CONNECTOR_eDP); } static xf86OutputStatus intel_output_detect(xf86OutputPtr output) { /* go to the hw and retrieve a new output struct */ struct intel_output *intel_output = output->driver_private; struct intel_mode *mode = intel_output->mode; xf86OutputStatus status; drmModeFreeConnector(intel_output->mode_output); intel_output->mode_output = drmModeGetConnector(mode->fd, intel_output->output_id); if (intel_output->mode_output == NULL) { /* and hope we are safe everywhere else */ xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "drmModeGetConnector failed, reporting output disconnected\n"); return XF86OutputStatusDisconnected; } switch (intel_output->mode_output->connection) { case DRM_MODE_CONNECTED: status = XF86OutputStatusConnected; break; case DRM_MODE_DISCONNECTED: status = XF86OutputStatusDisconnected; break; default: case DRM_MODE_UNKNOWNCONNECTION: status = XF86OutputStatusUnknown; break; } return status; } static Bool intel_output_mode_valid(xf86OutputPtr output, DisplayModePtr pModes) { struct intel_output *intel_output = output->driver_private; /* * If the connector type is a panel, we will use the panel limit to * verfiy whether the mode is valid. */ if (intel_output->has_panel_limits) { if (pModes->HDisplay > intel_output->panel_hdisplay || pModes->VDisplay > intel_output->panel_vdisplay) return MODE_PANEL; } return MODE_OK; } static void intel_output_attach_edid(xf86OutputPtr output) { struct intel_output *intel_output = output->driver_private; drmModeConnectorPtr koutput = intel_output->mode_output; struct intel_mode *mode = intel_output->mode; xf86MonPtr mon = NULL; int i; if (!koutput) { xf86OutputSetEDID(output, mon); return; } /* look for an EDID property */ for (i = 0; i < koutput->count_props; i++) { drmModePropertyPtr props; props = drmModeGetProperty(mode->fd, koutput->props[i]); if (!props) continue; if (!(props->flags & DRM_MODE_PROP_BLOB)) { drmModeFreeProperty(props); continue; } if (!strcmp(props->name, "EDID")) { drmModeFreePropertyBlob(intel_output->edid_blob); intel_output->edid_blob = drmModeGetPropertyBlob(mode->fd, koutput->prop_values[i]); } drmModeFreeProperty(props); } if (intel_output->edid_blob) { mon = xf86InterpretEDID(output->scrn->scrnIndex, intel_output->edid_blob->data); if (mon && intel_output->edid_blob->length > 128) mon->flags |= MONITOR_EDID_COMPLETE_RAWDATA; } xf86OutputSetEDID(output, mon); } static DisplayModePtr intel_output_panel_edid(xf86OutputPtr output, DisplayModePtr modes) { xf86MonPtr mon = output->MonInfo; if (!mon || !GTF_SUPPORTED(mon->features.msc)) { DisplayModePtr i, m, p = NULL; int max_x = 0, max_y = 0; float max_vrefresh = 0.0; for (m = modes; m; m = m->next) { if (m->type & M_T_PREFERRED) p = m; max_x = max(max_x, m->HDisplay); max_y = max(max_y, m->VDisplay); max_vrefresh = max(max_vrefresh, xf86ModeVRefresh(m)); } max_vrefresh = max(max_vrefresh, 60.0); max_vrefresh *= (1 + SYNC_TOLERANCE); #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,0,0) m = xf86GetDefaultModes(); #else m = xf86GetDefaultModes(0,0); #endif xf86ValidateModesSize(output->scrn, m, max_x, max_y, 0); for (i = m; i; i = i->next) { if (xf86ModeVRefresh(i) > max_vrefresh) i->status = MODE_VSYNC; if (p && i->HDisplay >= p->HDisplay && i->VDisplay >= p->VDisplay && xf86ModeVRefresh(i) >= xf86ModeVRefresh(p)) i->status = MODE_VSYNC; } xf86PruneInvalidModes(output->scrn, &m, FALSE); modes = xf86ModesAdd(modes, m); } return modes; } static DisplayModePtr intel_output_get_modes(xf86OutputPtr output) { struct intel_output *intel_output = output->driver_private; drmModeConnectorPtr koutput = intel_output->mode_output; DisplayModePtr Modes = NULL; int i; intel_output_attach_edid(output); if (!koutput) return Modes; /* modes should already be available */ for (i = 0; i < koutput->count_modes; i++) { DisplayModePtr Mode; Mode = calloc(1, sizeof(DisplayModeRec)); if (Mode) { mode_from_kmode(output->scrn, &koutput->modes[i], Mode); Modes = xf86ModesAdd(Modes, Mode); } } /* * If the connector type is a panel, we will traverse the kernel mode to * get the panel limit. And then add all the standard modes to fake * the fullscreen experience. * If it is incorrect, please fix me. */ intel_output->has_panel_limits = FALSE; if (is_panel(koutput->connector_type)) { for (i = 0; i < koutput->count_modes; i++) { drmModeModeInfo *mode_ptr; mode_ptr = &koutput->modes[i]; if (mode_ptr->hdisplay > intel_output->panel_hdisplay) intel_output->panel_hdisplay = mode_ptr->hdisplay; if (mode_ptr->vdisplay > intel_output->panel_vdisplay) intel_output->panel_vdisplay = mode_ptr->vdisplay; } intel_output->has_panel_limits = intel_output->panel_hdisplay && intel_output->panel_vdisplay; Modes = intel_output_panel_edid(output, Modes); } return Modes; } static void intel_output_destroy(xf86OutputPtr output) { struct intel_output *intel_output = output->driver_private; int i; drmModeFreePropertyBlob(intel_output->edid_blob); for (i = 0; i < intel_output->num_props; i++) { drmModeFreeProperty(intel_output->props[i].mode_prop); free(intel_output->props[i].atoms); } free(intel_output->props); for (i = 0; i < intel_output->mode_output->count_encoders; i++) { drmModeFreeEncoder(intel_output->mode_encoders[i]); } free(intel_output->mode_encoders); drmModeFreeConnector(intel_output->mode_output); intel_output->mode_output = NULL; list_del(&intel_output->link); backlight_close(&intel_output->backlight); free(intel_output); output->driver_private = NULL; } static void intel_output_dpms_backlight(xf86OutputPtr output, int oldmode, int mode) { struct intel_output *intel_output = output->driver_private; if (!intel_output->backlight.iface) return; if (mode == DPMSModeOn) { /* If we're going from off->on we may need to turn on the backlight. */ if (oldmode != DPMSModeOn) intel_output_backlight_set(output, intel_output->backlight_active_level); } else { /* Only save the current backlight value if we're going from on to off. */ if (oldmode == DPMSModeOn) intel_output->backlight_active_level = intel_output_backlight_get(output); intel_output_backlight_set(output, 0); } } static void intel_output_dpms(xf86OutputPtr output, int dpms) { struct intel_output *intel_output = output->driver_private; drmModeConnectorPtr koutput = intel_output->mode_output; struct intel_mode *mode = intel_output->mode; int i; if (!koutput) return; for (i = 0; i < koutput->count_props; i++) { drmModePropertyPtr props; props = drmModeGetProperty(mode->fd, koutput->props[i]); if (!props) continue; if (!strcmp(props->name, "DPMS")) { /* Make sure to reverse the order between on and off. */ if (dpms != DPMSModeOn) intel_output_dpms_backlight(output, intel_output->dpms_mode, dpms); drmModeConnectorSetProperty(mode->fd, intel_output->output_id, props->prop_id, dpms); if (dpms == DPMSModeOn) intel_output_dpms_backlight(output, intel_output->dpms_mode, dpms); intel_output->dpms_mode = dpms; drmModeFreeProperty(props); return; } drmModeFreeProperty(props); } } int intel_output_dpms_status(xf86OutputPtr output) { struct intel_output *intel_output = output->driver_private; return intel_output->dpms_mode; } static Bool intel_property_ignore(drmModePropertyPtr prop) { if (!prop) return TRUE; /* ignore blob prop */ if (prop->flags & DRM_MODE_PROP_BLOB) return TRUE; /* ignore standard property */ if (!strcmp(prop->name, "EDID") || !strcmp(prop->name, "DPMS")) return TRUE; return FALSE; } static void intel_output_create_ranged_atom(xf86OutputPtr output, Atom *atom, const char *name, INT32 min, INT32 max, uint64_t value, Bool immutable) { int err; INT32 atom_range[2]; atom_range[0] = min; atom_range[1] = max; *atom = MakeAtom(name, strlen(name), TRUE); err = RRConfigureOutputProperty(output->randr_output, *atom, FALSE, TRUE, immutable, 2, atom_range); if (err != 0) xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "RRConfigureOutputProperty error, %d\n", err); err = RRChangeOutputProperty(output->randr_output, *atom, XA_INTEGER, 32, PropModeReplace, 1, &value, FALSE, FALSE); if (err != 0) xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "RRChangeOutputProperty error, %d\n", err); } #define BACKLIGHT_NAME "Backlight" #define BACKLIGHT_DEPRECATED_NAME "BACKLIGHT" static Atom backlight_atom, backlight_deprecated_atom; static void intel_output_create_resources(xf86OutputPtr output) { struct intel_output *intel_output = output->driver_private; drmModeConnectorPtr mode_output = intel_output->mode_output; struct intel_mode *mode = intel_output->mode; int i, j, err; intel_output->props = calloc(mode_output->count_props, sizeof(struct intel_property)); if (!intel_output->props) return; intel_output->num_props = 0; for (i = j = 0; i < mode_output->count_props; i++) { drmModePropertyPtr drmmode_prop; drmmode_prop = drmModeGetProperty(mode->fd, mode_output->props[i]); if (intel_property_ignore(drmmode_prop)) { drmModeFreeProperty(drmmode_prop); continue; } intel_output->props[j].mode_prop = drmmode_prop; intel_output->props[j].value = mode_output->prop_values[i]; j++; } intel_output->num_props = j; for (i = 0; i < intel_output->num_props; i++) { struct intel_property *p = &intel_output->props[i]; drmModePropertyPtr drmmode_prop = p->mode_prop; if (drmmode_prop->flags & DRM_MODE_PROP_RANGE) { p->num_atoms = 1; p->atoms = calloc(p->num_atoms, sizeof(Atom)); if (!p->atoms) continue; intel_output_create_ranged_atom(output, &p->atoms[0], drmmode_prop->name, drmmode_prop->values[0], drmmode_prop->values[1], p->value, drmmode_prop->flags & DRM_MODE_PROP_IMMUTABLE ? TRUE : FALSE); } else if (drmmode_prop->flags & DRM_MODE_PROP_ENUM) { p->num_atoms = drmmode_prop->count_enums + 1; p->atoms = calloc(p->num_atoms, sizeof(Atom)); if (!p->atoms) continue; p->atoms[0] = MakeAtom(drmmode_prop->name, strlen(drmmode_prop->name), TRUE); for (j = 1; j <= drmmode_prop->count_enums; j++) { struct drm_mode_property_enum *e = &drmmode_prop->enums[j-1]; p->atoms[j] = MakeAtom(e->name, strlen(e->name), TRUE); } err = RRConfigureOutputProperty(output->randr_output, p->atoms[0], FALSE, FALSE, drmmode_prop->flags & DRM_MODE_PROP_IMMUTABLE ? TRUE : FALSE, p->num_atoms - 1, (INT32 *)&p->atoms[1]); if (err != 0) { xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "RRConfigureOutputProperty error, %d\n", err); } for (j = 0; j < drmmode_prop->count_enums; j++) if (drmmode_prop->enums[j].value == p->value) break; /* there's always a matching value */ err = RRChangeOutputProperty(output->randr_output, p->atoms[0], XA_ATOM, 32, PropModeReplace, 1, &p->atoms[j+1], FALSE, FALSE); if (err != 0) { xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "RRChangeOutputProperty error, %d\n", err); } } } if (intel_output->backlight.iface) { /* Set up the backlight property, which takes effect * immediately and accepts values only within the * backlight_range. */ intel_output_create_ranged_atom(output, &backlight_atom, BACKLIGHT_NAME, 0, intel_output->backlight.max, intel_output->backlight_active_level, FALSE); intel_output_create_ranged_atom(output, &backlight_deprecated_atom, BACKLIGHT_DEPRECATED_NAME, 0, intel_output->backlight.max, intel_output->backlight_active_level, FALSE); } } static Bool intel_output_set_property(xf86OutputPtr output, Atom property, RRPropertyValuePtr value) { struct intel_output *intel_output = output->driver_private; struct intel_mode *mode = intel_output->mode; int i; if (property == backlight_atom || property == backlight_deprecated_atom) { INT32 val; if (value->type != XA_INTEGER || value->format != 32 || value->size != 1) { return FALSE; } val = *(INT32 *)value->data; if (val < 0 || val > intel_output->backlight.max) return FALSE; if (intel_output->dpms_mode == DPMSModeOn) intel_output_backlight_set(output, val); intel_output->backlight_active_level = val; return TRUE; } for (i = 0; i < intel_output->num_props; i++) { struct intel_property *p = &intel_output->props[i]; if (p->atoms[0] != property) continue; if (p->mode_prop->flags & DRM_MODE_PROP_RANGE) { uint32_t val; if (value->type != XA_INTEGER || value->format != 32 || value->size != 1) return FALSE; val = *(uint32_t *)value->data; drmModeConnectorSetProperty(mode->fd, intel_output->output_id, p->mode_prop->prop_id, (uint64_t)val); return TRUE; } else if (p->mode_prop->flags & DRM_MODE_PROP_ENUM) { Atom atom; const char *name; int j; if (value->type != XA_ATOM || value->format != 32 || value->size != 1) return FALSE; memcpy(&atom, value->data, 4); name = NameForAtom(atom); if (name == NULL) return FALSE; /* search for matching name string, then set its value down */ for (j = 0; j < p->mode_prop->count_enums; j++) { if (!strcmp(p->mode_prop->enums[j].name, name)) { drmModeConnectorSetProperty(mode->fd, intel_output->output_id, p->mode_prop->prop_id, p->mode_prop->enums[j].value); return TRUE; } } return FALSE; } } /* We didn't recognise this property, just report success in order * to allow the set to continue, otherwise we break setting of * common properties like EDID. */ return TRUE; } static Bool intel_output_get_property(xf86OutputPtr output, Atom property) { struct intel_output *intel_output = output->driver_private; int err; if (property == backlight_atom || property == backlight_deprecated_atom) { INT32 val; if (!intel_output->backlight.iface) return FALSE; if (intel_output->dpms_mode == DPMSModeOn) { val = intel_output_backlight_get(output); if (val < 0) return FALSE; } else { val = intel_output->backlight_active_level; } err = RRChangeOutputProperty(output->randr_output, property, XA_INTEGER, 32, PropModeReplace, 1, &val, FALSE, FALSE); if (err != 0) { xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "RRChangeOutputProperty error, %d\n", err); return FALSE; } return TRUE; } return FALSE; } static const xf86OutputFuncsRec intel_output_funcs = { .create_resources = intel_output_create_resources, #ifdef RANDR_12_INTERFACE .set_property = intel_output_set_property, .get_property = intel_output_get_property, #endif .dpms = intel_output_dpms, #if 0 .save = drmmode_crt_save, .restore = drmmode_crt_restore, .mode_fixup = drmmode_crt_mode_fixup, .prepare = intel_output_prepare, .mode_set = drmmode_crt_mode_set, .commit = intel_output_commit, #endif .detect = intel_output_detect, .mode_valid = intel_output_mode_valid, .get_modes = intel_output_get_modes, .destroy = intel_output_destroy }; static const int subpixel_conv_table[7] = { 0, SubPixelUnknown, SubPixelHorizontalRGB, SubPixelHorizontalBGR, SubPixelVerticalRGB, SubPixelVerticalBGR, SubPixelNone }; static const char *output_names[] = { "None", "VGA", "DVI", "DVI", "DVI", "Composite", "TV", "LVDS", "CTV", "DIN", "DP", "HDMI", "HDMI", "TV", "eDP", }; static xf86OutputPtr find_output(ScrnInfoPtr pScrn, int id) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); int i; for (i = 0; i < xf86_config->num_output; i++) { xf86OutputPtr output = xf86_config->output[i]; struct intel_output *intel_output; intel_output = output->driver_private; if (intel_output->output_id == id) return output; } return NULL; } static int parse_path_blob(drmModePropertyBlobPtr path_blob, int *conn_base_id, char **path) { char *conn; char conn_id[5]; int id, len; char *blob_data; if (!path_blob) return -1; blob_data = path_blob->data; /* we only handle MST paths for now */ if (strncmp(blob_data, "mst:", 4)) return -1; conn = strchr(blob_data + 4, '-'); if (!conn) return -1; len = conn - (blob_data + 4); if (len + 1 > 5) return -1; memcpy(conn_id, blob_data + 4, len); conn_id[len] = '\0'; id = strtoul(conn_id, NULL, 10); *conn_base_id = id; *path = conn + 1; return 0; } static void drmmode_create_name(ScrnInfoPtr pScrn, drmModeConnectorPtr koutput, char *name, drmModePropertyBlobPtr path_blob) { xf86OutputPtr output; int conn_id; char *extra_path; output = NULL; if (parse_path_blob(path_blob, &conn_id, &extra_path) == 0) output = find_output(pScrn, conn_id); if (output) { snprintf(name, 32, "%s-%s", output->name, extra_path); } else { const char *output_name; if (koutput->connector_type < ARRAY_SIZE(output_names)) output_name = output_names[koutput->connector_type]; else output_name = "UNKNOWN"; snprintf(name, 32, "%s%d", output_name, koutput->connector_type_id); } } static void intel_output_init(ScrnInfoPtr scrn, struct intel_mode *mode, drmModeResPtr mode_res, int num, int dynamic) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); xf86OutputPtr output; drmModeConnectorPtr koutput; drmModeEncoderPtr *kencoders = NULL; struct intel_output *intel_output; char name[32]; drmModePropertyPtr props; drmModePropertyBlobPtr path_blob = NULL; int i; koutput = drmModeGetConnector(mode->fd, mode_res->connectors[num]); if (!koutput) return; for (i = 0; i < koutput->count_props; i++) { props = drmModeGetProperty(mode->fd, koutput->props[i]); if (props && (props->flags & DRM_MODE_PROP_BLOB)) { if (!strcmp(props->name, "PATH")) { path_blob = drmModeGetPropertyBlob(mode->fd, koutput->prop_values[i]); drmModeFreeProperty(props); break; } drmModeFreeProperty(props); } } drmmode_create_name(scrn, koutput, name, path_blob); if (path_blob) drmModeFreePropertyBlob(path_blob); if (path_blob && dynamic) { /* See if we have an output with this name already * and hook stuff up. */ for (i = 0; i < xf86_config->num_output; i++) { output = xf86_config->output[i]; if (strncmp(output->name, name, 32)) continue; intel_output = output->driver_private; intel_output->output_id = mode_res->connectors[num]; intel_output->mode_output = koutput; return; } } kencoders = calloc(sizeof(drmModeEncoderPtr), koutput->count_encoders); if (!kencoders) { goto out_free_encoders; } for (i = 0; i < koutput->count_encoders; i++) { kencoders[i] = drmModeGetEncoder(mode->fd, koutput->encoders[i]); if (!kencoders[i]) goto out_free_encoders; } output = xf86OutputCreate (scrn, &intel_output_funcs, name); if (!output) { goto out_free_encoders; } intel_output = calloc(sizeof(struct intel_output), 1); if (!intel_output) { xf86OutputDestroy(output); goto out_free_encoders; } intel_output->output_id = mode_res->connectors[num]; intel_output->mode_output = koutput; intel_output->mode_encoders = kencoders; intel_output->mode = mode; output->mm_width = koutput->mmWidth; output->mm_height = koutput->mmHeight; output->subpixel_order = subpixel_conv_table[koutput->subpixel]; output->driver_private = intel_output; if (is_panel(koutput->connector_type)) intel_output_backlight_init(output); output->possible_crtcs = 0x7f; for (i = 0; i < koutput->count_encoders; i++) { output->possible_crtcs &= kencoders[i]->possible_crtcs; } output->interlaceAllowed = TRUE; intel_output->output = output; if (dynamic) { output->randr_output = RROutputCreate(xf86ScrnToScreen(scrn), output->name, strlen(output->name), output); intel_output_create_resources(output); } list_add(&intel_output->link, &mode->outputs); return; out_free_encoders: if (kencoders) { for (i = 0; i < koutput->count_encoders; i++) drmModeFreeEncoder(kencoders[i]); free(kencoders); } drmModeFreeConnector(koutput); } static Bool intel_xf86crtc_resize(ScrnInfoPtr scrn, int width, int height) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); struct intel_crtc *intel_crtc = xf86_config->crtc[0]->driver_private; struct intel_mode *mode = intel_crtc->mode; intel_screen_private *intel = intel_get_screen_private(scrn); drm_intel_bo *old_front = NULL; Bool ret; uint32_t old_fb_id; int i, old_width, old_height, old_pitch; int pitch; uint32_t tiling; if (scrn->virtualX == width && scrn->virtualY == height) return TRUE; intel_flush(intel); old_width = scrn->virtualX; old_height = scrn->virtualY; old_pitch = scrn->displayWidth; old_fb_id = mode->fb_id; old_front = intel->front_buffer; if (intel->back_buffer) { drm_intel_bo_unreference(intel->back_buffer); intel->back_buffer = NULL; } intel->front_buffer = intel_allocate_framebuffer(scrn, width, height, intel->cpp, &pitch, &tiling); if (!intel->front_buffer) goto fail; ret = drmModeAddFB(mode->fd, width, height, scrn->depth, scrn->bitsPerPixel, pitch, intel->front_buffer->handle, &mode->fb_id); if (ret) goto fail; intel->front_pitch = pitch; intel->front_tiling = tiling; scrn->virtualX = width; scrn->virtualY = height; if (!intel_uxa_create_screen_resources(scrn->pScreen)) goto fail; for (i = 0; i < xf86_config->num_crtc; i++) { xf86CrtcPtr crtc = xf86_config->crtc[i]; if (!crtc->enabled) continue; if (!intel_crtc_apply(crtc)) goto fail; } if (old_fb_id) drmModeRmFB(mode->fd, old_fb_id); if (old_front) drm_intel_bo_unreference(old_front); return TRUE; fail: if (intel->front_buffer) drm_intel_bo_unreference(intel->front_buffer); intel->front_buffer = old_front; scrn->virtualX = old_width; scrn->virtualY = old_height; scrn->displayWidth = old_pitch; if (old_fb_id != mode->fb_id) drmModeRmFB(mode->fd, mode->fb_id); mode->fb_id = old_fb_id; return FALSE; } static void intel_pageflip_handler(ScrnInfoPtr scrn, xf86CrtcPtr crtc, uint64_t frame, uint64_t usec, void *data); static void intel_pageflip_abort(ScrnInfoPtr scrn, xf86CrtcPtr crtc, void *data); static void intel_pageflip_complete(struct intel_mode *mode); static void intel_drm_abort_seq (ScrnInfoPtr scrn, uint32_t seq); Bool intel_do_pageflip(intel_screen_private *intel, dri_bo *new_front, int ref_crtc_hw_id, Bool async, void *pageflip_data, intel_pageflip_handler_proc pageflip_handler, intel_pageflip_abort_proc pageflip_abort) { ScrnInfoPtr scrn = intel->scrn; xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn); struct intel_crtc *crtc = config->crtc[0]->driver_private; struct intel_mode *mode = crtc->mode; unsigned int pitch = scrn->displayWidth * intel->cpp; struct intel_pageflip *flip; uint32_t new_fb_id; uint32_t flags; uint32_t seq; int i; /* * Create a new handle for the back buffer */ if (drmModeAddFB(mode->fd, scrn->virtualX, scrn->virtualY, scrn->depth, scrn->bitsPerPixel, pitch, new_front->handle, &new_fb_id)) goto error_out; drm_intel_bo_disable_reuse(new_front); intel_flush(intel); mode->pageflip_data = pageflip_data; mode->pageflip_handler = pageflip_handler; mode->pageflip_abort = pageflip_abort; /* * Queue flips on all enabled CRTCs * Note that if/when we get per-CRTC buffers, we'll have to update this. * Right now it assumes a single shared fb across all CRTCs, with the * kernel fixing up the offset of each CRTC as necessary. * * Also, flips queued on disabled or incorrectly configured displays * may never complete; this is a configuration error. */ mode->fe_msc = 0; mode->fe_usec = 0; flags = DRM_MODE_PAGE_FLIP_EVENT; if (async) flags |= DRM_MODE_PAGE_FLIP_ASYNC; for (i = 0; i < config->num_crtc; i++) { if (!intel_crtc_on(config->crtc[i])) continue; crtc = config->crtc[i]->driver_private; flip = calloc(1, sizeof(struct intel_pageflip)); if (flip == NULL) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "flip queue: carrier alloc failed.\n"); goto error_undo; } /* Only the reference crtc will finally deliver its page flip * completion event. All other crtc's events will be discarded. */ flip->dispatch_me = (intel_crtc_to_pipe(crtc->crtc) == ref_crtc_hw_id); flip->mode = mode; seq = intel_drm_queue_alloc(scrn, config->crtc[i], flip, intel_pageflip_handler, intel_pageflip_abort); if (!seq) { free(flip); goto error_undo; } again: if (drmModePageFlip(mode->fd, crtc_id(crtc), new_fb_id, flags, (void *)(uintptr_t)seq)) { if (intel_mode_read_drm_events(intel)) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "flip queue retry\n"); goto again; } xf86DrvMsg(scrn->scrnIndex, X_WARNING, "flip queue failed: %s\n", strerror(errno)); if (seq) intel_drm_abort_seq(scrn, seq); free(flip); goto error_undo; } mode->flip_count++; } mode->old_fb_id = mode->fb_id; mode->fb_id = new_fb_id; if (!mode->flip_count) intel_pageflip_complete(mode); return TRUE; error_undo: drmModeRmFB(mode->fd, new_fb_id); for (i = 0; i < config->num_crtc; i++) { if (config->crtc[i]->enabled) intel_crtc_apply(config->crtc[i]); } error_out: xf86DrvMsg(scrn->scrnIndex, X_WARNING, "Page flip failed: %s\n", strerror(errno)); mode->flip_count = 0; return FALSE; } static const xf86CrtcConfigFuncsRec intel_xf86crtc_config_funcs = { intel_xf86crtc_resize }; /* * Enqueue a potential drm response; when the associated response * appears, we've got data to pass to the handler from here */ uint32_t intel_drm_queue_alloc(ScrnInfoPtr scrn, xf86CrtcPtr crtc, void *data, intel_drm_handler_proc handler, intel_drm_abort_proc abort) { struct intel_drm_queue *q; q = calloc(1, sizeof(struct intel_drm_queue)); if (!q) return 0; if (!intel_drm_seq) ++intel_drm_seq; q->seq = intel_drm_seq++; q->scrn = scrn; q->crtc = crtc; q->data = data; q->handler = handler; q->abort = abort; list_add(&q->list, &intel_drm_queue); return q->seq; } /* * Abort one queued DRM entry, removing it * from the list, calling the abort function and * freeing the memory */ static void intel_drm_abort_one(struct intel_drm_queue *q) { list_del(&q->list); q->abort(q->scrn, q->crtc, q->data); free(q); } /* * Externally usable abort function that uses a callback to match a single queued * entry to abort */ void intel_drm_abort(ScrnInfoPtr scrn, Bool (*match)(void *data, void *match_data), void *match_data) { struct intel_drm_queue *q; list_for_each_entry(q, &intel_drm_queue, list) { if (match(q->data, match_data)) { intel_drm_abort_one(q); break; } } } /* * Abort by drm queue sequence number */ static void intel_drm_abort_seq(ScrnInfoPtr scrn, uint32_t seq) { struct intel_drm_queue *q; list_for_each_entry(q, &intel_drm_queue, list) { if (q->seq == seq) { intel_drm_abort_one(q); break; } } } /* * Abort all queued entries on a specific scrn, used * when resetting the X server */ static void intel_drm_abort_scrn(ScrnInfoPtr scrn) { struct intel_drm_queue *q, *tmp; list_for_each_entry_safe(q, tmp, &intel_drm_queue, list) { if (q->scrn == scrn) intel_drm_abort_one(q); } } static uint32_t pipe_select(int pipe) { if (pipe > 1) return pipe << DRM_VBLANK_HIGH_CRTC_SHIFT; else if (pipe > 0) return DRM_VBLANK_SECONDARY; else return 0; } /* * Get the current msc/ust value from the kernel */ static int intel_get_msc_ust(ScrnInfoPtr scrn, xf86CrtcPtr crtc, uint32_t *msc, uint64_t *ust) { intel_screen_private *intel = intel_get_screen_private(scrn); drmVBlank vbl; /* Get current count */ vbl.request.type = DRM_VBLANK_RELATIVE | pipe_select(intel_crtc_to_pipe(crtc)); vbl.request.sequence = 0; vbl.request.signal = 0; if (drmWaitVBlank(intel->drmSubFD, &vbl)) { *msc = 0; *ust = 0; return BadMatch; } else { *msc = vbl.reply.sequence; *ust = (CARD64) vbl.reply.tval_sec * 1000000 + vbl.reply.tval_usec; return Success; } } /* * Convert a 32-bit kernel MSC sequence number to a 64-bit local sequence * number, adding in the vblank_offset and high 32 bits, and dealing * with 64-bit wrapping */ uint64_t intel_sequence_to_crtc_msc(xf86CrtcPtr crtc, uint32_t sequence) { struct intel_crtc *intel_crtc = crtc->driver_private; sequence += intel_crtc->vblank_offset; if ((int32_t) (sequence - intel_crtc->msc_prev) < -0x40000000) intel_crtc->msc_high += 0x100000000L; intel_crtc->msc_prev = sequence; return intel_crtc->msc_high + sequence; } /* * Get the current 64-bit adjust MSC and UST value */ int intel_get_crtc_msc_ust(ScrnInfoPtr scrn, xf86CrtcPtr crtc, uint64_t *msc, uint64_t *ust) { uint32_t sequence; int ret; ret = intel_get_msc_ust(scrn, crtc, &sequence, ust); if (ret) return ret; *msc = intel_sequence_to_crtc_msc(crtc, sequence); return 0; } /* * Convert a 64-bit adjusted MSC value into a 32-bit kernel sequence number, * removing the high 32 bits and subtracting out the vblank_offset term. * * This also updates the vblank_offset when it notices that the value should * change. */ #define MAX_VBLANK_OFFSET 1000 uint32_t intel_crtc_msc_to_sequence(ScrnInfoPtr scrn, xf86CrtcPtr crtc, uint64_t expect) { struct intel_crtc *intel_crtc = crtc->driver_private; uint64_t msc, ust; if (intel_get_crtc_msc_ust(scrn, crtc, &msc, &ust) == 0) { int64_t diff = expect - msc; /* We're way off here, assume that the kernel has lost its mind * and smack the vblank back to something sensible */ if (diff < -MAX_VBLANK_OFFSET || diff > MAX_VBLANK_OFFSET) { intel_crtc->vblank_offset += (int32_t) diff; if (intel_crtc->vblank_offset > -MAX_VBLANK_OFFSET && intel_crtc->vblank_offset < MAX_VBLANK_OFFSET) intel_crtc->vblank_offset = 0; } } return (uint32_t) (expect - intel_crtc->vblank_offset); } /* * General DRM kernel handler. Looks for the matching sequence number in the * drm event queue and calls the handler for it. */ static void intel_drm_handler(int fd, uint32_t frame, uint32_t sec, uint32_t usec, void *user_ptr) { uint32_t user_data = (intptr_t)user_ptr; struct intel_drm_queue *q; list_for_each_entry(q, &intel_drm_queue, list) { if (q->seq == user_data) { list_del(&q->list); q->handler(q->scrn, q->crtc, intel_sequence_to_crtc_msc(q->crtc, frame), (uint64_t)sec * 1000000 + usec, q->data); free(q); break; } } } /* * Notify the page flip caller that the flip is * complete */ static void intel_pageflip_complete(struct intel_mode *mode) { /* Release framebuffer */ drmModeRmFB(mode->fd, mode->old_fb_id); if (!mode->pageflip_handler) return; mode->pageflip_handler(mode->fe_msc, mode->fe_usec, mode->pageflip_data); } /* * One pageflip event has completed. Update the saved msc/ust values * as needed, then check to see if the whole set of events are * complete and notify the application at that point */ static struct intel_mode * intel_handle_pageflip(struct intel_pageflip *flip, uint64_t msc, uint64_t usec) { struct intel_mode *mode = flip->mode; if (flip->dispatch_me) { /* Yes: Cache msc, ust for later delivery. */ mode->fe_msc = msc; mode->fe_usec = usec; } free(flip); /* Last crtc completed flip? */ mode->flip_count--; if (mode->flip_count > 0) return NULL; return mode; } /* * Called from the DRM event queue when a single flip has completed */ static void intel_pageflip_handler(ScrnInfoPtr scrn, xf86CrtcPtr crtc, uint64_t msc, uint64_t usec, void *data) { struct intel_pageflip *flip = data; struct intel_mode *mode = intel_handle_pageflip(flip, msc, usec); if (!mode) return; intel_pageflip_complete(mode); } /* * Called from the DRM queue abort code when a flip has been aborted */ static void intel_pageflip_abort(ScrnInfoPtr scrn, xf86CrtcPtr crtc, void *data) { struct intel_pageflip *flip = data; struct intel_mode *mode = intel_handle_pageflip(flip, 0, 0); if (!mode) return; /* Release framebuffer */ drmModeRmFB(mode->fd, mode->old_fb_id); if (!mode->pageflip_abort) return; mode->pageflip_abort(mode->pageflip_data); } /* * Check for pending DRM events and process them. */ static void drm_wakeup_handler(pointer data, int err, pointer p) { struct intel_mode *mode; fd_set *read_mask; if (data == NULL || err < 0) return; mode = data; read_mask = p; if (FD_ISSET(mode->fd, read_mask)) drmHandleEvent(mode->fd, &mode->event_context); } /* * If there are any available, read drm_events */ int intel_mode_read_drm_events(struct intel_screen_private *intel) { struct intel_mode *mode = intel->modes; struct pollfd p = { .fd = mode->fd, .events = POLLIN }; int r; do { r = poll(&p, 1, 0); } while (r == -1 && (errno == EINTR || errno == EAGAIN)); if (r <= 0) return 0; return drmHandleEvent(mode->fd, &mode->event_context); } /* * Libdrm's possible_clones is a mask of encoders, Xorg's possible_clones is a * mask of outputs. This function sets Xorg's possible_clones based on the * values read from libdrm. */ static uint32_t find_clones(ScrnInfoPtr scrn, xf86OutputPtr output) { struct intel_output *intel_output = output->driver_private, *clone_drmout; int i; xf86OutputPtr clone_output; xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); int index_mask = 0; if (intel_output->enc_clone_mask == 0) return index_mask; for (i = 0; i < xf86_config->num_output; i++) { clone_output = xf86_config->output[i]; clone_drmout = clone_output->driver_private; if (output == clone_output) continue; if (clone_drmout->enc_mask == 0) continue; if (intel_output->enc_clone_mask == clone_drmout->enc_mask) index_mask |= (1 << i); } return index_mask; } static void intel_compute_possible_clones(ScrnInfoPtr scrn, struct intel_mode *mode, drmModeResPtr mode_res) { int i, j; xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); for (i = 0; i < xf86_config->num_output; i++) { xf86OutputPtr output = xf86_config->output[i]; struct intel_output *intel_output; intel_output = output->driver_private; intel_output->enc_clone_mask = 0xff; /* and all the possible encoder clones for this output together */ for (j = 0; j < intel_output->mode_output->count_encoders; j++) { int k; for (k = 0; k < mode_res->count_encoders; k++) { if (mode_res->encoders[k] == intel_output->mode_encoders[j]->encoder_id) intel_output->enc_mask |= (1 << k); } intel_output->enc_clone_mask &= intel_output->mode_encoders[j]->possible_clones; } } for (i = 0; i < xf86_config->num_output; i++) { xf86OutputPtr output = xf86_config->output[i]; output->possible_clones = find_clones(scrn, output); } } Bool intel_mode_pre_init(ScrnInfoPtr scrn, int fd, int cpp) { intel_screen_private *intel = intel_get_screen_private(scrn); struct drm_i915_getparam gp; struct intel_mode *mode; unsigned int i; int has_flipping; drmModeResPtr mode_res; mode = calloc(1, sizeof *mode); if (!mode) return FALSE; mode->fd = fd; list_init(&mode->crtcs); list_init(&mode->outputs); xf86CrtcConfigInit(scrn, &intel_xf86crtc_config_funcs); mode->cpp = cpp; mode_res = drmModeGetResources(mode->fd); if (!mode_res) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "failed to get resources: %s\n", strerror(errno)); free(mode); return FALSE; } xf86CrtcSetSizeRange(scrn, 320, 200, mode_res->max_width, mode_res->max_height); for (i = 0; i < mode_res->count_crtcs; i++) intel_crtc_init(scrn, mode, mode_res, i); for (i = 0; i < mode_res->count_connectors; i++) intel_output_init(scrn, mode, mode_res, i, 0); intel_compute_possible_clones(scrn, mode, mode_res); #ifdef INTEL_PIXMAP_SHARING xf86ProviderSetup(scrn, NULL, "Intel"); #endif xf86InitialConfiguration(scrn, TRUE); mode->event_context.version = DRM_EVENT_CONTEXT_VERSION; mode->event_context.vblank_handler = intel_drm_handler; mode->event_context.page_flip_handler = intel_drm_handler; /* XXX assumes only one intel screen */ list_init(&intel_drm_queue); intel_drm_seq = 0; has_flipping = 0; gp.param = I915_PARAM_HAS_PAGEFLIPPING; gp.value = &has_flipping; (void)drmCommandWriteRead(intel->drmSubFD, DRM_I915_GETPARAM, &gp, sizeof(gp)); if (has_flipping && intel->swapbuffers_wait) { xf86DrvMsg(scrn->scrnIndex, X_INFO, "Kernel page flipping support detected, enabling\n"); intel->use_pageflipping = TRUE; } if (xf86ReturnOptValBool(intel->Options, OPTION_DELETE_DP12, FALSE)) { mode->delete_dp_12_displays = TRUE; } intel->modes = mode; drmModeFreeResources(mode_res); return TRUE; } void intel_mode_init(struct intel_screen_private *intel) { struct intel_mode *mode = intel->modes; /* We need to re-register the mode->fd for the synchronisation * feedback on every server generation, so perform the * registration within ScreenInit and not PreInit. */ mode->flip_count = 0; AddGeneralSocket(mode->fd); RegisterBlockAndWakeupHandlers((BlockHandlerProcPtr)NoopDDA, drm_wakeup_handler, mode); } void intel_mode_remove_fb(intel_screen_private *intel) { struct intel_mode *mode = intel->modes; if (mode->fb_id) { drmModeRmFB(mode->fd, mode->fb_id); mode->fb_id = 0; } } void intel_mode_close(intel_screen_private *intel) { struct intel_mode *mode = intel->modes; if (mode == NULL) return; intel_drm_abort_scrn(intel->scrn); RemoveBlockAndWakeupHandlers((BlockHandlerProcPtr)NoopDDA, drm_wakeup_handler, mode); RemoveGeneralSocket(mode->fd); } void intel_mode_fini(intel_screen_private *intel) { struct intel_mode *mode = intel->modes; if (mode == NULL) return; while(!list_is_empty(&mode->crtcs)) { xf86CrtcDestroy(list_first_entry(&mode->crtcs, struct intel_crtc, link)->crtc); } while(!list_is_empty(&mode->outputs)) { xf86OutputDestroy(list_first_entry(&mode->outputs, struct intel_output, link)->output); } if (mode->fb_id) drmModeRmFB(mode->fd, mode->fb_id); /* mode->rotate_fb_id should have been destroyed already */ free(mode); intel->modes = NULL; } /* for the mode overlay */ int intel_crtc_id(xf86CrtcPtr crtc) { return crtc_id(crtc->driver_private); } int intel_crtc_to_pipe(xf86CrtcPtr crtc) { struct intel_crtc *intel_crtc = crtc->driver_private; return intel_crtc->pipe; } Bool intel_crtc_on(xf86CrtcPtr crtc) { struct intel_crtc *intel_crtc = crtc->driver_private; xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(crtc->scrn); drmModeCrtcPtr drm_crtc; Bool ret; int i; if (!crtc->enabled) return FALSE; /* Kernel manages CRTC status based on output config */ ret = FALSE; for (i = 0; i < xf86_config->num_output; i++) { xf86OutputPtr output = xf86_config->output[i]; if (output->crtc == crtc && intel_output_dpms_status(output) == DPMSModeOn) { ret = TRUE; break; } } if (!ret) return FALSE; /* And finally check with the kernel that the fb is bound */ drm_crtc = drmModeGetCrtc(intel_crtc->mode->fd, crtc_id(intel_crtc)); if (drm_crtc == NULL) return FALSE; ret = (drm_crtc->mode_valid && (intel_crtc->mode->fb_id == drm_crtc->buffer_id || intel_crtc->mode->old_fb_id == drm_crtc->buffer_id)); free(drm_crtc); return ret; } static PixmapPtr intel_create_pixmap_for_bo(ScreenPtr pScreen, dri_bo *bo, int width, int height, int depth, int bpp, int pitch) { PixmapPtr pixmap; pixmap = pScreen->CreatePixmap(pScreen, 0, 0, depth, 0); if (pixmap == NullPixmap) return pixmap; if (!pScreen->ModifyPixmapHeader(pixmap, width, height, depth, bpp, pitch, NULL)) { pScreen->DestroyPixmap(pixmap); return NullPixmap; } intel_set_pixmap_bo(pixmap, bo); return pixmap; } static PixmapPtr intel_create_pixmap_for_fbcon(ScrnInfoPtr scrn, int fbcon_id) { ScreenPtr pScreen = xf86ScrnToScreen(scrn); intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_mode *mode = intel->modes; int fd = mode->fd; drmModeFBPtr fbcon; struct drm_gem_flink flink; drm_intel_bo *bo; PixmapPtr pixmap = NullPixmap; fbcon = drmModeGetFB(fd, fbcon_id); if (fbcon == NULL) return NULL; if (fbcon->depth != scrn->depth || fbcon->width != scrn->virtualX || fbcon->height != scrn->virtualY) goto out_free_fb; flink.handle = fbcon->handle; if (ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink) < 0) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Couldn't flink fbcon handle\n"); goto out_free_fb; } bo = drm_intel_bo_gem_create_from_name(intel->bufmgr, "fbcon", flink.name); if (bo == NULL) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Couldn't allocate bo for fbcon handle\n"); goto out_free_fb; } pixmap = intel_create_pixmap_for_bo(pScreen, bo, fbcon->width, fbcon->height, fbcon->depth, fbcon->bpp, fbcon->pitch); if (pixmap == NullPixmap) xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Couldn't allocate pixmap fbcon contents\n"); drm_intel_bo_unreference(bo); out_free_fb: drmModeFreeFB(fbcon); return pixmap; } void intel_copy_fb(ScrnInfoPtr scrn) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); ScreenPtr pScreen = xf86ScrnToScreen(scrn); intel_screen_private *intel = intel_get_screen_private(scrn); PixmapPtr src, dst; unsigned int pitch = scrn->displayWidth * intel->cpp; struct intel_crtc *intel_crtc; int i, fbcon_id; if (intel->force_fallback) return; fbcon_id = 0; for (i = 0; i < xf86_config->num_crtc; i++) { intel_crtc = xf86_config->crtc[i]->driver_private; if (intel_crtc->mode_crtc->buffer_id) fbcon_id = intel_crtc->mode_crtc->buffer_id; } if (!fbcon_id) return; src = intel_create_pixmap_for_fbcon(scrn, fbcon_id); if (src == NULL) return; /* We dont have a screen Pixmap yet */ dst = intel_create_pixmap_for_bo(pScreen, intel->front_buffer, scrn->virtualX, scrn->virtualY, scrn->depth, scrn->bitsPerPixel, pitch); if (dst == NullPixmap) goto cleanup_src; if (!intel->uxa_driver->prepare_copy(src, dst, -1, -1, GXcopy, FB_ALLONES)) goto cleanup_dst; intel->uxa_driver->copy(dst, 0, 0, 0, 0, scrn->virtualX, scrn->virtualY); intel->uxa_driver->done_copy(dst); #if ABI_VIDEODRV_VERSION >= SET_ABI_VERSION(10, 0) pScreen->canDoBGNoneRoot = TRUE; #endif cleanup_dst: (*pScreen->DestroyPixmap)(dst); cleanup_src: (*pScreen->DestroyPixmap)(src); } void intel_mode_hotplug(struct intel_screen_private *intel) { ScrnInfoPtr scrn = intel->scrn; xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn); drmModeResPtr mode_res; int i, j; Bool found; Bool changed = FALSE; struct intel_mode *mode = intel->modes; mode_res = drmModeGetResources(intel->drmSubFD); if (!mode_res) goto out; restart_destroy: for (i = 0; i < config->num_output; i++) { xf86OutputPtr output = config->output[i]; struct intel_output *intel_output; intel_output = output->driver_private; found = FALSE; for (j = 0; j < mode_res->count_connectors; j++) { if (mode_res->connectors[j] == intel_output->output_id) { found = TRUE; break; } } if (found) continue; drmModeFreeConnector(intel_output->mode_output); intel_output->mode_output = NULL; intel_output->output_id = -1; changed = TRUE; if (mode->delete_dp_12_displays) { RROutputDestroy(output->randr_output); xf86OutputDestroy(output); goto restart_destroy; } } /* find new output ids we don't have outputs for */ for (i = 0; i < mode_res->count_connectors; i++) { found = FALSE; for (j = 0; j < config->num_output; j++) { xf86OutputPtr output = config->output[j]; struct intel_output *intel_output; intel_output = output->driver_private; if (mode_res->connectors[i] == intel_output->output_id) { found = TRUE; break; } } if (found) continue; changed = TRUE; intel_output_init(scrn, intel->modes, mode_res, i, 1); } if (changed) { RRSetChanged(xf86ScrnToScreen(scrn)); RRTellChanged(xf86ScrnToScreen(scrn)); } drmModeFreeResources(mode_res); out: RRGetInfo(xf86ScrnToScreen(scrn), TRUE); } void intel_box_intersect(BoxPtr dest, BoxPtr a, BoxPtr b) { dest->x1 = a->x1 > b->x1 ? a->x1 : b->x1; dest->x2 = a->x2 < b->x2 ? a->x2 : b->x2; if (dest->x1 >= dest->x2) { dest->x1 = dest->x2 = dest->y1 = dest->y2 = 0; return; } dest->y1 = a->y1 > b->y1 ? a->y1 : b->y1; dest->y2 = a->y2 < b->y2 ? a->y2 : b->y2; if (dest->y1 >= dest->y2) dest->x1 = dest->x2 = dest->y1 = dest->y2 = 0; } void intel_crtc_box(xf86CrtcPtr crtc, BoxPtr crtc_box) { if (crtc->enabled) { crtc_box->x1 = crtc->x; crtc_box->x2 = crtc->x + xf86ModeWidth(&crtc->mode, crtc->rotation); crtc_box->y1 = crtc->y; crtc_box->y2 = crtc->y + xf86ModeHeight(&crtc->mode, crtc->rotation); } else crtc_box->x1 = crtc_box->x2 = crtc_box->y1 = crtc_box->y2 = 0; } static int intel_box_area(BoxPtr box) { return (int)(box->x2 - box->x1) * (int)(box->y2 - box->y1); } /* * Return the crtc covering 'box'. If two crtcs cover a portion of * 'box', then prefer 'desired'. If 'desired' is NULL, then prefer the crtc * with greater coverage */ xf86CrtcPtr intel_covering_crtc(ScrnInfoPtr scrn, BoxPtr box, xf86CrtcPtr desired, BoxPtr crtc_box_ret) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); xf86CrtcPtr crtc, best_crtc; int coverage, best_coverage; int c; BoxRec crtc_box, cover_box; best_crtc = NULL; best_coverage = 0; crtc_box_ret->x1 = 0; crtc_box_ret->x2 = 0; crtc_box_ret->y1 = 0; crtc_box_ret->y2 = 0; for (c = 0; c < xf86_config->num_crtc; c++) { crtc = xf86_config->crtc[c]; /* If the CRTC is off, treat it as not covering */ if (!intel_crtc_on(crtc)) continue; intel_crtc_box(crtc, &crtc_box); intel_box_intersect(&cover_box, &crtc_box, box); coverage = intel_box_area(&cover_box); if (coverage && crtc == desired) { *crtc_box_ret = crtc_box; return crtc; } if (coverage > best_coverage) { *crtc_box_ret = crtc_box; best_crtc = crtc; best_coverage = coverage; } } return best_crtc; } xf86-video-intel-2.99.917/src/uxa/intel_uxa_video.c0000664000175000017500000002652612432737457016666 00000000000000/*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * i830_video.c: i830/i845 Xv driver. * * Copyright © 2002 by Alan Hourihane and David Dawes * * Authors: * Alan Hourihane * David Dawes * * Derived from i810 Xv driver: * * Authors of i810 code: * Jonathan Bian * Offscreen Images: * Matt Sottek */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "compiler.h" #include "xf86Pci.h" #include "xf86fbman.h" #include "xf86drm.h" #include "regionstr.h" #include "randrstr.h" #include "windowstr.h" #include "damage.h" #include "intel.h" #include "intel_uxa.h" #include "i830_reg.h" #include "xf86xv.h" #include #include "dixstruct.h" #include "fourcc.h" #ifdef INTEL_XVMC #define _INTEL_XVMC_SERVER_ #include "intel_xvmc.h" #endif /* overlay debugging printf function */ #if 0 #define UXA_VIDEO_DEBUG ErrorF #else #define UXA_VIDEO_DEBUG if (0) ErrorF #endif static int intel_uxa_video_put_image_textured(ScrnInfoPtr, short, short, short, short, short, short, short, short, int, unsigned char *, short, short, Bool, RegionPtr, pointer, DrawablePtr); static int intel_uxa_video_set_port_attribute(ScrnInfoPtr scrn, Atom attribute, INT32 value, pointer data) { intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data; if (attribute == intel_xv_Brightness) { if ((value < -128) || (value > 127)) return BadValue; adaptor_priv->brightness = value; return Success; } else if (attribute == intel_xv_Contrast) { if ((value < 0) || (value > 255)) return BadValue; adaptor_priv->contrast = value; return Success; } else if (attribute == intel_xv_SyncToVblank) { if ((value < -1) || (value > 1)) return BadValue; adaptor_priv->SyncToVblank = value; return Success; } else { return BadMatch; } } static int xvmc_passthrough(int id) { #ifdef INTEL_XVMC return id == FOURCC_XVMC; #else return 0; #endif } static void intel_wait_for_scanline(ScrnInfoPtr scrn, PixmapPtr pixmap, xf86CrtcPtr crtc, RegionPtr clipBoxes) { intel_screen_private *intel = intel_get_screen_private(scrn); pixman_box16_t box, crtc_box; int pipe, event; Bool full_height; int y1, y2; pipe = -1; if (scrn->vtSema && pixmap_is_scanout(pixmap)) pipe = intel_crtc_to_pipe(crtc); if (pipe < 0) return; box = *REGION_EXTENTS(unused, clipBoxes); if (crtc->transform_in_use) pixman_f_transform_bounds(&crtc->f_framebuffer_to_crtc, &box); /* We could presume the clip was correctly computed... */ intel_crtc_box(crtc, &crtc_box); intel_box_intersect(&box, &crtc_box, &box); /* * Make sure we don't wait for a scanline that will * never occur */ y1 = (crtc_box.y1 <= box.y1) ? box.y1 - crtc_box.y1 : 0; y2 = (box.y2 <= crtc_box.y2) ? box.y2 - crtc_box.y1 : crtc_box.y2 - crtc_box.y1; if (y2 <= y1) return; full_height = FALSE; if (y1 == 0 && y2 == (crtc_box.y2 - crtc_box.y1)) full_height = TRUE; /* * Pre-965 doesn't have SVBLANK, so we need a bit * of extra time for the blitter to start up and * do its job for a full height blit */ if (full_height && INTEL_INFO(intel)->gen < 040) y2 -= 2; if (pipe == 0) { pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEA; event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW; if (full_height && INTEL_INFO(intel)->gen >= 040) event = MI_WAIT_FOR_PIPEA_SVBLANK; } else { pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEB; event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW; if (full_height && INTEL_INFO(intel)->gen >= 040) event = MI_WAIT_FOR_PIPEB_SVBLANK; } if (crtc->mode.Flags & V_INTERLACE) { /* DSL count field lines */ y1 /= 2; y2 /= 2; } BEGIN_BATCH(5); /* The documentation says that the LOAD_SCAN_LINES command * always comes in pairs. Don't ask me why. */ OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | pipe); OUT_BATCH((y1 << 16) | (y2-1)); OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | pipe); OUT_BATCH((y1 << 16) | (y2-1)); OUT_BATCH(MI_WAIT_FOR_EVENT | event); ADVANCE_BATCH(); } /* * The source rectangle of the video is defined by (src_x, src_y, src_w, src_h). * The dest rectangle of the video is defined by (drw_x, drw_y, drw_w, drw_h). * id is a fourcc code for the format of the video. * buf is the pointer to the source data in system memory. * width and height are the w/h of the source data. * If "sync" is TRUE, then we must be finished with *buf at the point of return * (which we always are). * clipBoxes is the clipping region in screen space. * data is a pointer to our port private. * drawable is some Drawable, which might not be the screen in the case of * compositing. It's a new argument to the function in the 1.1 server. */ static int intel_uxa_video_put_image_textured(ScrnInfoPtr scrn, short src_x, short src_y, short drw_x, short drw_y, short src_w, short src_h, short drw_w, short drw_h, int id, unsigned char *buf, short width, short height, Bool sync, RegionPtr clipBoxes, pointer data, DrawablePtr drawable) { intel_screen_private *intel = intel_get_screen_private(scrn); intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data; PixmapPtr pixmap = get_drawable_pixmap(drawable); int dstPitch, dstPitch2; BoxRec dstBox; xf86CrtcPtr crtc; int top, left, npixels, nlines; if (!intel_uxa_pixmap_is_offscreen(pixmap)) return BadAlloc; #if 0 ErrorF("I830PutImage: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d)\n" "width %d, height %d\n", src_x, src_y, src_w, src_h, drw_x, drw_y, drw_w, drw_h, width, height); #endif if (!intel_clip_video_helper(scrn, adaptor_priv, &crtc, &dstBox, src_x, src_y, drw_x, drw_y, src_w, src_h, drw_w, drw_h, id, &top, &left, &npixels, &nlines, clipBoxes, width, height)) return Success; if (xvmc_passthrough(id)) { uint32_t *gem_handle = (uint32_t *)buf; int size; intel_setup_dst_params(scrn, adaptor_priv, width, height, &dstPitch, &dstPitch2, &size, id); if (IS_I915G(intel) || IS_I915GM(intel)) { /* XXX: i915 is not support and needs some * serious care. grep for KMS in i915_hwmc.c */ return BadAlloc; } if (adaptor_priv->buf) drm_intel_bo_unreference(adaptor_priv->buf); adaptor_priv->buf = drm_intel_bo_gem_create_from_name(intel->bufmgr, "xvmc surface", *gem_handle); if (adaptor_priv->buf == NULL) return BadAlloc; adaptor_priv->reusable = FALSE; } else { if (!intel_video_copy_data(scrn, adaptor_priv, width, height, &dstPitch, &dstPitch2, top, left, npixels, nlines, id, buf)) return BadAlloc; } if (crtc && adaptor_priv->SyncToVblank != 0 && INTEL_INFO(intel)->gen < 060) { intel_wait_for_scanline(scrn, pixmap, crtc, clipBoxes); } if (INTEL_INFO(intel)->gen >= 060) { Gen6DisplayVideoTextured(scrn, adaptor_priv, id, clipBoxes, width, height, dstPitch, dstPitch2, src_w, src_h, drw_w, drw_h, pixmap); } else if (INTEL_INFO(intel)->gen >= 040) { I965DisplayVideoTextured(scrn, adaptor_priv, id, clipBoxes, width, height, dstPitch, dstPitch2, src_w, src_h, drw_w, drw_h, pixmap); } else { I915DisplayVideoTextured(scrn, adaptor_priv, id, clipBoxes, width, height, dstPitch, dstPitch2, src_w, src_h, drw_w, drw_h, pixmap); } intel_get_screen_private(scrn)->needs_flush = TRUE; DamageDamageRegion(drawable, clipBoxes); /* And make sure the WAIT_FOR_EVENT is queued before any * modesetting/dpms operations on the pipe. */ intel_batch_submit(scrn); return Success; } XF86VideoAdaptorPtr intel_uxa_video_setup_image_textured(ScreenPtr screen) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); XF86VideoAdaptorPtr adapt; intel_adaptor_private *adaptor_privs; DevUnion *devUnions; int nports = 16, i; UXA_VIDEO_DEBUG("intel_video_overlay_setup_image\n"); adapt = calloc(1, sizeof(XF86VideoAdaptorRec)); adaptor_privs = calloc(nports, sizeof(intel_adaptor_private)); devUnions = calloc(nports, sizeof(DevUnion)); if (adapt == NULL || adaptor_privs == NULL || devUnions == NULL) { free(adapt); free(adaptor_privs); free(devUnions); return NULL; } adapt->type = XvWindowMask | XvInputMask | XvImageMask; adapt->flags = 0; adapt->name = "Intel(R) Textured Video"; adapt->nEncodings = 1; adapt->pEncodings = xnfalloc(sizeof(intel_xv_dummy_encoding)); memcpy(adapt->pEncodings, intel_xv_dummy_encoding, sizeof(intel_xv_dummy_encoding)); adapt->nFormats = NUM_FORMATS; adapt->pFormats = intel_xv_formats; adapt->nPorts = nports; adapt->pPortPrivates = devUnions; adapt->nAttributes = 0; adapt->pAttributes = NULL; if (IS_I915G(intel) || IS_I915GM(intel)) adapt->nImages = NUM_IMAGES - XVMC_IMAGE; else adapt->nImages = NUM_IMAGES; adapt->pImages = intel_xv_images; adapt->PutVideo = NULL; adapt->PutStill = NULL; adapt->GetVideo = NULL; adapt->GetStill = NULL; adapt->StopVideo = intel_video_stop_video; adapt->SetPortAttribute = intel_uxa_video_set_port_attribute; adapt->GetPortAttribute = intel_video_get_port_attribute; adapt->QueryBestSize = intel_video_query_best_size; adapt->PutImage = intel_uxa_video_put_image_textured; adapt->QueryImageAttributes = intel_video_query_image_attributes; for (i = 0; i < nports; i++) { intel_adaptor_private *adaptor_priv = &adaptor_privs[i]; adaptor_priv->textured = TRUE; adaptor_priv->videoStatus = 0; adaptor_priv->buf = NULL; adaptor_priv->old_buf[0] = NULL; adaptor_priv->old_buf[1] = NULL; adaptor_priv->rotation = RR_Rotate_0; adaptor_priv->SyncToVblank = 1; /* gotta uninit this someplace, XXX: shouldn't be necessary for textured */ REGION_NULL(screen, &adaptor_priv->clip); adapt->pPortPrivates[i].ptr = (pointer) (adaptor_priv); } intel_xv_SyncToVblank = MAKE_ATOM("XV_SYNC_TO_VBLANK"); return adapt; } xf86-video-intel-2.99.917/src/uxa/intel_video.h0000664000175000017500000001160612432737457016007 00000000000000/*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifndef _INTEL_VIDEO_H_ #define _INTEL_VIDEO_H_ #include "xf86.h" #include "xf86_OSproc.h" typedef struct { uint32_t YBufOffset; uint32_t UBufOffset; uint32_t VBufOffset; int brightness; int contrast; int saturation; xf86CrtcPtr desired_crtc; RegionRec clip; uint32_t colorKey; uint32_t gamma0; uint32_t gamma1; uint32_t gamma2; uint32_t gamma3; uint32_t gamma4; uint32_t gamma5; /* only used by the overlay */ uint32_t videoStatus; Time offTime; Time freeTime; /** YUV data buffers */ drm_intel_bo *buf, *old_buf[2]; Bool reusable; Bool textured; Rotation rotation; /* should remove intel->rotation later */ int SyncToVblank; /* -1: auto, 0: off, 1: on */ } intel_adaptor_private; #define OFF_DELAY 250 /* milliseconds */ #define OFF_TIMER 0x01 #define CLIENT_VIDEO_ON 0x02 static inline intel_adaptor_private * intel_get_adaptor_private(intel_screen_private *intel) { return intel->adaptor->pPortPrivates[0].ptr; } int is_planar_fourcc(int id); void intel_video_block_handler(intel_screen_private *intel); int intel_video_query_image_attributes(ScrnInfoPtr, int, unsigned short *, unsigned short *, int *, int *); Bool intel_video_copy_data(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, short width, short height, int *dstPitch, int *dstPitch2, int top, int left, int npixels, int nlines, int id, unsigned char *buf); Bool intel_clip_video_helper(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, xf86CrtcPtr * crtc_ret, BoxPtr dst, short src_x, short src_y, short drw_x, short drw_y, short src_w, short src_h, short drw_w, short drw_h, int id, int *top, int* left, int* npixels, int *nlines, RegionPtr reg, INT32 width, INT32 height); void intel_free_video_buffers(intel_adaptor_private *adaptor_priv); int intel_video_get_port_attribute(ScrnInfoPtr scrn, Atom attribute, INT32 * value, pointer data); void intel_video_query_best_size(ScrnInfoPtr, Bool, short, short, short, short, unsigned int *, unsigned int *, pointer); void intel_setup_dst_params(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, short width, short height, int *dstPitch, int *dstPitch2, int *size, int id); void intel_video_stop_video(ScrnInfoPtr scrn, pointer data, Bool shutdown); extern Atom intel_xv_Brightness, intel_xv_Contrast, intel_xv_Saturation, intel_xv_ColorKey, intel_xv_Pipe; extern Atom intel_xv_Gamma0, intel_xv_Gamma1, intel_xv_Gamma2, intel_xv_Gamma3, intel_xv_Gamma4, intel_xv_Gamma5; extern Atom intel_xv_SyncToVblank; #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE) /* Limits for the overlay/textured video source sizes. The documented hardware * limits are 2048x2048 or better for overlay and both of our textured video * implementations. Additionally, on the 830 and 845, larger sizes resulted in * the card hanging, so we keep the limits lower there. */ #define IMAGE_MAX_WIDTH 2048 #define IMAGE_MAX_HEIGHT 2048 #define IMAGE_MAX_WIDTH_LEGACY 1024 #define IMAGE_MAX_HEIGHT_LEGACY 1088 extern const XF86VideoEncodingRec intel_xv_dummy_encoding[1]; #define NUM_FORMATS 3 extern XF86VideoFormatRec intel_xv_formats[NUM_FORMATS]; #define NUM_ATTRIBUTES 5 extern XF86AttributeRec intel_xv_attributes[NUM_ATTRIBUTES]; #define GAMMA_ATTRIBUTES 6 extern XF86AttributeRec intel_xv_gamma_attributes[GAMMA_ATTRIBUTES]; #ifdef INTEL_XVMC #define NUM_IMAGES 5 #define XVMC_IMAGE 1 #else #define NUM_IMAGES 4 #define XVMC_IMAGE 0 #endif extern XF86ImageRec intel_xv_images[NUM_IMAGES]; #endif /* _INTEL_VIDEO_H_ */ xf86-video-intel-2.99.917/src/uxa/uxa-priv.h0000664000175000017500000002617112400044327015242 00000000000000/* * * Copyright © 2000,2008 Keith Packard * 2005 Zack Rusin, Trolltech * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS * SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND * FITNESS, IN NO EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS * SOFTWARE. */ #ifndef UXAPRIV_H #define UXAPRIV_H #ifdef HAVE_CONFIG_H #include #endif #ifdef HAVE_DIX_CONFIG_H #include #else #include #endif #include "xf86.h" #include "uxa.h" #include #include #include "scrnintstr.h" #include "pixmapstr.h" #include "windowstr.h" #include "servermd.h" #include "colormapst.h" #include "gcstruct.h" #include "input.h" #include "mipointer.h" #include "mi.h" #include "dix.h" #include "fb.h" #include "fboverlay.h" #ifdef RENDER #include "fbpict.h" #include "glyphstr.h" #endif #include "damage.h" #include "../src/compat-api.h" /* Provide substitutes for gcc's __FUNCTION__ on other compilers */ #if !defined(__GNUC__) && !defined(__FUNCTION__) # if defined(__STDC__) && (__STDC_VERSION__>=199901L) /* C99 */ # define __FUNCTION__ __func__ # else # define __FUNCTION__ "" # endif #endif /* 1.6 and earlier server compat */ #ifndef miGetCompositeClip #define miCopyRegion fbCopyRegion #define miDoCopy fbDoCopy #endif #define DEBUG_MIGRATE 0 #define DEBUG_PIXMAP 0 #define DEBUG_OFFSCREEN 0 #define DEBUG_GLYPH_CACHE 0 #define UXA_FALLBACK(x) \ if (uxa_get_screen(screen)->fallback_debug) { \ ErrorF("UXA fallback at %s: ", __FUNCTION__); \ ErrorF x; \ } char uxa_drawable_location(DrawablePtr pDrawable); #if DEBUG_PIXMAP #define DBG_PIXMAP(a) ErrorF a #else #define DBG_PIXMAP(a) #endif typedef struct { PicturePtr picture; /* Where the glyphs of the cache are stored */ GlyphPtr *glyphs; uint16_t count; uint16_t evict; } uxa_glyph_cache_t; #define UXA_NUM_GLYPH_CACHE_FORMATS 2 typedef struct { uint32_t color; PicturePtr picture; } uxa_solid_cache_t; #define UXA_NUM_SOLID_CACHE 16 typedef void (*EnableDisableFBAccessProcPtr) (int, Bool); typedef struct { uxa_driver_t *info; CreateGCProcPtr SavedCreateGC; CloseScreenProcPtr SavedCloseScreen; GetImageProcPtr SavedGetImage; GetSpansProcPtr SavedGetSpans; CreatePixmapProcPtr SavedCreatePixmap; DestroyPixmapProcPtr SavedDestroyPixmap; CopyWindowProcPtr SavedCopyWindow; ChangeWindowAttributesProcPtr SavedChangeWindowAttributes; BitmapToRegionProcPtr SavedBitmapToRegion; #ifdef RENDER CompositeProcPtr SavedComposite; TrianglesProcPtr SavedTriangles; GlyphsProcPtr SavedGlyphs; TrapezoidsProcPtr SavedTrapezoids; AddTrapsProcPtr SavedAddTraps; UnrealizeGlyphProcPtr SavedUnrealizeGlyph; #endif Bool force_fallback; Bool fallback_debug; uxa_glyph_cache_t glyphCaches[UXA_NUM_GLYPH_CACHE_FORMATS]; Bool glyph_cache_initialized; PicturePtr solid_clear, solid_black, solid_white; uxa_solid_cache_t solid_cache[UXA_NUM_SOLID_CACHE]; int solid_cache_size; } uxa_screen_t; /* * This is the only completely portable way to * compute this info. */ #ifndef BitsPerPixel #define BitsPerPixel(d) (\ PixmapWidthPaddingInfo[d].notPower2 ? \ (PixmapWidthPaddingInfo[d].bytesPerPixel * 8) : \ ((1 << PixmapWidthPaddingInfo[d].padBytesLog2) * 8 / \ (PixmapWidthPaddingInfo[d].padRoundUp+1))) #endif #if HAS_DEVPRIVATEKEYREC extern DevPrivateKeyRec uxa_screen_index; #else extern int uxa_screen_index; #endif static inline uxa_screen_t *uxa_get_screen(ScreenPtr screen) { #if HAS_DEVPRIVATEKEYREC return dixGetPrivate(&screen->devPrivates, &uxa_screen_index); #else return dixLookupPrivate(&screen->devPrivates, &uxa_screen_index); #endif } /** Align an offset to an arbitrary alignment */ #define UXA_ALIGN(offset, align) (((offset) + (align) - 1) - \ (((offset) + (align) - 1) % (align))) /** Align an offset to a power-of-two alignment */ #define UXA_ALIGN2(offset, align) (((offset) + (align) - 1) & ~((align) - 1)) typedef struct { INT16 xSrc; INT16 ySrc; INT16 xDst; INT16 yDst; INT16 width; INT16 height; } uxa_composite_rect_t; /** * exaDDXDriverInit must be implemented by the DDX using EXA, and is the place * to set EXA options or hook in screen functions to handle using EXA as the AA. */ void exaDDXDriverInit(ScreenPtr pScreen); Bool uxa_prepare_access_window(WindowPtr pWin); void uxa_finish_access_window(WindowPtr pWin); /* uxa-unaccel.c */ Bool uxa_prepare_access_gc(GCPtr pGC); void uxa_finish_access_gc(GCPtr pGC); void uxa_check_fill_spans(DrawablePtr pDrawable, GCPtr pGC, int nspans, DDXPointPtr ppt, int *pwidth, int fSorted); void uxa_check_set_spans(DrawablePtr pDrawable, GCPtr pGC, char *psrc, DDXPointPtr ppt, int *pwidth, int nspans, int fSorted); void uxa_check_put_image(DrawablePtr pDrawable, GCPtr pGC, int depth, int x, int y, int w, int h, int leftPad, int format, char *bits); RegionPtr uxa_check_copy_area(DrawablePtr pSrc, DrawablePtr pDst, GCPtr pGC, int srcx, int srcy, int w, int h, int dstx, int dsty); RegionPtr uxa_check_copy_plane(DrawablePtr pSrc, DrawablePtr pDst, GCPtr pGC, int srcx, int srcy, int w, int h, int dstx, int dsty, unsigned long bitPlane); void uxa_check_poly_point(DrawablePtr pDrawable, GCPtr pGC, int mode, int npt, DDXPointPtr pptInit); void uxa_check_poly_lines(DrawablePtr pDrawable, GCPtr pGC, int mode, int npt, DDXPointPtr ppt); void uxa_check_poly_segment(DrawablePtr pDrawable, GCPtr pGC, int nsegInit, xSegment * pSegInit); void uxa_check_poly_arc(DrawablePtr pDrawable, GCPtr pGC, int narcs, xArc * pArcs); void uxa_check_poly_fill_rect(DrawablePtr pDrawable, GCPtr pGC, int nrect, xRectangle * prect); void uxa_check_image_glyph_blt(DrawablePtr pDrawable, GCPtr pGC, int x, int y, unsigned int nglyph, CharInfoPtr * ppci, pointer pglyphBase); void uxa_check_poly_glyph_blt(DrawablePtr pDrawable, GCPtr pGC, int x, int y, unsigned int nglyph, CharInfoPtr * ppci, pointer pglyphBase); void uxa_check_push_pixels(GCPtr pGC, PixmapPtr pBitmap, DrawablePtr pDrawable, int w, int h, int x, int y); void uxa_check_get_spans(DrawablePtr pDrawable, int wMax, DDXPointPtr ppt, int *pwidth, int nspans, char *pdstStart); void uxa_check_paint_window(WindowPtr pWin, RegionPtr pRegion, int what); void uxa_check_add_traps(PicturePtr pPicture, INT16 x_off, INT16 y_off, int ntrap, xTrap * traps); /* uxa-accel.c */ static _X_INLINE Bool uxa_gc_reads_destination(DrawablePtr pDrawable, unsigned long planemask, unsigned int fillStyle, unsigned char alu) { return ((alu != GXcopy && alu != GXclear && alu != GXset && alu != GXcopyInverted) || fillStyle == FillStippled || !UXA_PM_IS_SOLID(pDrawable, planemask)); } void uxa_copy_window(WindowPtr pWin, DDXPointRec ptOldOrg, RegionPtr prgnSrc); Bool uxa_fill_region_tiled(DrawablePtr pDrawable, RegionPtr pRegion, PixmapPtr pTile, DDXPointPtr pPatOrg, CARD32 planemask, CARD32 alu); void uxa_paint_window(WindowPtr pWin, RegionPtr pRegion, int what); void uxa_get_image(DrawablePtr pDrawable, int x, int y, int w, int h, unsigned int format, unsigned long planeMask, char *d); void uxa_get_spans(DrawablePtr pDrawable, int wMax, DDXPointPtr ppt, int *pwidth, int nspans, char *pdstStart); void uxa_add_traps(PicturePtr pPicture, INT16 x_off, INT16 y_off, int ntrap, xTrap * traps); extern const GCOps uxa_ops; #ifdef RENDER void uxa_check_composite(CARD8 op, PicturePtr pSrc, PicturePtr pMask, PicturePtr pDst, INT16 xSrc, INT16 ySrc, INT16 xMask, INT16 yMask, INT16 xDst, INT16 yDst, CARD16 width, CARD16 height); #endif /* uxa.c */ Bool uxa_prepare_access(DrawablePtr pDrawable, uxa_access_t access); void uxa_finish_access(DrawablePtr pDrawable, uxa_access_t access); Bool uxa_picture_prepare_access(PicturePtr picture, int mode); void uxa_picture_finish_access(PicturePtr picture, int mode); void uxa_get_drawable_deltas(DrawablePtr pDrawable, PixmapPtr pPixmap, int *xp, int *yp); Bool uxa_drawable_is_offscreen(DrawablePtr pDrawable); Bool uxa_pixmap_is_offscreen(PixmapPtr p); PixmapPtr uxa_get_offscreen_pixmap(DrawablePtr pDrawable, int *xp, int *yp); PixmapPtr uxa_get_drawable_pixmap(DrawablePtr pDrawable); RegionPtr uxa_copy_area(DrawablePtr pSrcDrawable, DrawablePtr pDstDrawable, GCPtr pGC, int srcx, int srcy, int width, int height, int dstx, int dsty); void uxa_copy_n_to_n(DrawablePtr pSrcDrawable, DrawablePtr pDstDrawable, GCPtr pGC, BoxPtr pbox, int nbox, int dx, int dy, Bool reverse, Bool upsidedown, Pixel bitplane, void *closure); /* uxa_render.c */ Bool uxa_op_reads_destination(CARD8 op); void uxa_composite(CARD8 op, PicturePtr pSrc, PicturePtr pMask, PicturePtr pDst, INT16 xSrc, INT16 ySrc, INT16 xMask, INT16 yMask, INT16 xDst, INT16 yDst, CARD16 width, CARD16 height); void uxa_composite_rects(CARD8 op, PicturePtr pSrc, PicturePtr pDst, int nrect, uxa_composite_rect_t * rects); void uxa_solid_rects (CARD8 op, PicturePtr dst, xRenderColor *color, int num_rects, xRectangle *rects); void uxa_trapezoids(CARD8 op, PicturePtr pSrc, PicturePtr pDst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int ntrap, xTrapezoid * traps); void uxa_triangles(CARD8 op, PicturePtr pSrc, PicturePtr pDst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int ntri, xTriangle * tris); PicturePtr uxa_acquire_solid(ScreenPtr screen, SourcePict *source); PicturePtr uxa_acquire_drawable(ScreenPtr pScreen, PicturePtr pSrc, INT16 x, INT16 y, CARD16 width, CARD16 height, INT16 * out_x, INT16 * out_y); PicturePtr uxa_acquire_pattern(ScreenPtr pScreen, PicturePtr pSrc, pixman_format_code_t format, INT16 x, INT16 y, CARD16 width, CARD16 height); Bool uxa_get_rgba_from_pixel(CARD32 pixel, CARD16 * red, CARD16 * green, CARD16 * blue, CARD16 * alpha, CARD32 format); /* uxa_glyph.c */ Bool uxa_glyphs_init(ScreenPtr pScreen); void uxa_glyphs_fini(ScreenPtr pScreen); void uxa_glyphs(CARD8 op, PicturePtr pSrc, PicturePtr pDst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int nlist, GlyphListPtr list, GlyphPtr * glyphs); void uxa_glyph_unrealize(ScreenPtr pScreen, GlyphPtr pGlyph); #endif /* UXAPRIV_H */ xf86-video-intel-2.99.917/src/uxa/intel_sync.c0000664000175000017500000001006712400044327015626 00000000000000/* * Copyright © 2013-2014 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that copyright * notice and this permission notice appear in supporting documentation, and * that the name of the copyright holders not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. The copyright holders make no representations * about the suitability of this software for any purpose. It is provided "as * is" without express or implied warranty. * * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE * OF THIS SOFTWARE. */ #include "intel.h" #include "misyncshm.h" #include "misyncstr.h" /* * This whole file exists to wrap a sync fence trigger operation * so that we can flush the batch buffer to provide serialization * between the server and the shm fence client */ static DevPrivateKeyRec intel_sync_fence_private_key; typedef struct _intel_sync_fence_private { SyncFenceSetTriggeredFunc set_triggered; } intel_sync_fence_private; #define SYNC_FENCE_PRIV(pFence) \ (intel_sync_fence_private *) dixLookupPrivate(&pFence->devPrivates, &intel_sync_fence_private_key) static void intel_sync_fence_set_triggered (SyncFence *fence) { ScreenPtr screen = fence->pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); intel_sync_fence_private *private = SYNC_FENCE_PRIV(fence); /* Flush pending rendering operations */ if (intel->flush_rendering) intel->flush_rendering(intel); fence->funcs.SetTriggered = private->set_triggered; fence->funcs.SetTriggered(fence); private->set_triggered = fence->funcs.SetTriggered; fence->funcs.SetTriggered = intel_sync_fence_set_triggered; } static void intel_sync_create_fence(ScreenPtr screen, SyncFence *fence, Bool initially_triggered) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); SyncScreenFuncsPtr screen_funcs = miSyncGetScreenFuncs(screen); intel_sync_fence_private *private = SYNC_FENCE_PRIV(fence); screen_funcs->CreateFence = intel->save_sync_screen_funcs.CreateFence; screen_funcs->CreateFence(screen, fence, initially_triggered); intel->save_sync_screen_funcs.CreateFence = screen_funcs->CreateFence; screen_funcs->CreateFence = intel_sync_create_fence; private->set_triggered = fence->funcs.SetTriggered; fence->funcs.SetTriggered = intel_sync_fence_set_triggered; } Bool intel_sync_init(ScreenPtr screen) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); SyncScreenFuncsPtr screen_funcs; if (!miSyncShmScreenInit(screen)) return FALSE; if (!dixPrivateKeyRegistered(&intel_sync_fence_private_key)) { if (!dixRegisterPrivateKey(&intel_sync_fence_private_key, PRIVATE_SYNC_FENCE, sizeof (intel_sync_fence_private))) return FALSE; } screen_funcs = miSyncGetScreenFuncs(screen); intel->save_sync_screen_funcs.CreateFence = screen_funcs->CreateFence; screen_funcs->CreateFence = intel_sync_create_fence; return TRUE; } void intel_sync_close(ScreenPtr screen) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); SyncScreenFuncsPtr screen_funcs = miSyncGetScreenFuncs(screen); if (screen_funcs) screen_funcs->CreateFence = intel->save_sync_screen_funcs.CreateFence; } xf86-video-intel-2.99.917/src/uxa/brw_defines.h0000664000175000017500000010617512400044327015761 00000000000000 /************************************************************************** * * Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef BRW_DEFINES_H #define BRW_DEFINES_H /* */ #if 0 #define MI_NOOP 0x00 #define MI_USER_INTERRUPT 0x02 #define MI_WAIT_FOR_EVENT 0x03 #define MI_FLUSH 0x04 #define MI_REPORT_HEAD 0x07 #define MI_ARB_ON_OFF 0x08 #define MI_BATCH_BUFFER_END 0x0A #define MI_OVERLAY_FLIP 0x11 #define MI_LOAD_SCAN_LINES_INCL 0x12 #define MI_LOAD_SCAN_LINES_EXCL 0x13 #define MI_DISPLAY_BUFFER_INFO 0x14 #define MI_SET_CONTEXT 0x18 #define MI_STORE_DATA_IMM 0x20 #define MI_STORE_DATA_INDEX 0x21 #define MI_LOAD_REGISTER_IMM 0x22 #define MI_STORE_REGISTER_MEM 0x24 #define MI_BATCH_BUFFER_START 0x31 #define MI_SYNCHRONOUS_FLIP 0x0 #define MI_ASYNCHRONOUS_FLIP 0x1 #define MI_BUFFER_SECURE 0x0 #define MI_BUFFER_NONSECURE 0x1 #define MI_ARBITRATE_AT_CHAIN_POINTS 0x0 #define MI_ARBITRATE_BETWEEN_INSTS 0x1 #define MI_NO_ARBITRATION 0x3 #define MI_CONDITION_CODE_WAIT_DISABLED 0x0 #define MI_CONDITION_CODE_WAIT_0 0x1 #define MI_CONDITION_CODE_WAIT_1 0x2 #define MI_CONDITION_CODE_WAIT_2 0x3 #define MI_CONDITION_CODE_WAIT_3 0x4 #define MI_CONDITION_CODE_WAIT_4 0x5 #define MI_DISPLAY_PIPE_A 0x0 #define MI_DISPLAY_PIPE_B 0x1 #define MI_DISPLAY_PLANE_A 0x0 #define MI_DISPLAY_PLANE_B 0x1 #define MI_DISPLAY_PLANE_C 0x2 #define MI_STANDARD_FLIP 0x0 #define MI_ENQUEUE_FLIP_PERFORM_BASE_FRAME_NUMBER_LOAD 0x1 #define MI_ENQUEUE_FLIP_TARGET_FRAME_NUMBER_RELATIVE 0x2 #define MI_ENQUEUE_FLIP_ABSOLUTE_TARGET_FRAME_NUMBER 0x3 #define MI_PHYSICAL_ADDRESS 0x0 #define MI_VIRTUAL_ADDRESS 0x1 #define MI_BUFFER_MEMORY_MAIN 0x0 #define MI_BUFFER_MEMORY_GTT 0x2 #define MI_BUFFER_MEMORY_PER_PROCESS_GTT 0x3 #define MI_FLIP_CONTINUE 0x0 #define MI_FLIP_ON 0x1 #define MI_FLIP_OFF 0x2 #define MI_UNTRUSTED_REGISTER_SPACE 0x0 #define MI_TRUSTED_REGISTER_SPACE 0x1 #endif /* 3D state: */ #define _3DOP_3DSTATE_PIPELINED 0x0 #define _3DOP_3DSTATE_NONPIPELINED 0x1 #define _3DOP_3DCONTROL 0x2 #define _3DOP_3DPRIMITIVE 0x3 #define _3DSTATE_PIPELINED_POINTERS 0x00 #define _3DSTATE_BINDING_TABLE_POINTERS 0x01 #define _3DSTATE_VERTEX_BUFFERS 0x08 #define _3DSTATE_VERTEX_ELEMENTS 0x09 #define _3DSTATE_INDEX_BUFFER 0x0A #define _3DSTATE_VF_STATISTICS 0x0B #define _3DSTATE_DRAWING_RECTANGLE 0x00 #define _3DSTATE_CONSTANT_COLOR 0x01 #define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02 #define _3DSTATE_CHROMA_KEY 0x04 #define _3DSTATE_DEPTH_BUFFER 0x05 #define _3DSTATE_POLY_STIPPLE_OFFSET 0x06 #define _3DSTATE_POLY_STIPPLE_PATTERN 0x07 #define _3DSTATE_LINE_STIPPLE 0x08 #define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09 #define _3DCONTROL 0x00 #define _3DPRIMITIVE 0x00 #define PIPE_CONTROL_NOWRITE 0x00 #define PIPE_CONTROL_WRITEIMMEDIATE 0x01 #define PIPE_CONTROL_WRITEDEPTH 0x02 #define PIPE_CONTROL_WRITETIMESTAMP 0x03 #define PIPE_CONTROL_GTTWRITE_PROCESS_LOCAL 0x00 #define PIPE_CONTROL_GTTWRITE_GLOBAL 0x01 #define _3DPRIM_POINTLIST 0x01 #define _3DPRIM_LINELIST 0x02 #define _3DPRIM_LINESTRIP 0x03 #define _3DPRIM_TRILIST 0x04 #define _3DPRIM_TRISTRIP 0x05 #define _3DPRIM_TRIFAN 0x06 #define _3DPRIM_QUADLIST 0x07 #define _3DPRIM_QUADSTRIP 0x08 #define _3DPRIM_LINELIST_ADJ 0x09 #define _3DPRIM_LINESTRIP_ADJ 0x0A #define _3DPRIM_TRILIST_ADJ 0x0B #define _3DPRIM_TRISTRIP_ADJ 0x0C #define _3DPRIM_TRISTRIP_REVERSE 0x0D #define _3DPRIM_POLYGON 0x0E #define _3DPRIM_RECTLIST 0x0F #define _3DPRIM_LINELOOP 0x10 #define _3DPRIM_POINTLIST_BF 0x11 #define _3DPRIM_LINESTRIP_CONT 0x12 #define _3DPRIM_LINESTRIP_BF 0x13 #define _3DPRIM_LINESTRIP_CONT_BF 0x14 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 #define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 #define BRW_ANISORATIO_2 0 #define BRW_ANISORATIO_4 1 #define BRW_ANISORATIO_6 2 #define BRW_ANISORATIO_8 3 #define BRW_ANISORATIO_10 4 #define BRW_ANISORATIO_12 5 #define BRW_ANISORATIO_14 6 #define BRW_ANISORATIO_16 7 #define BRW_BLENDFACTOR_ONE 0x1 #define BRW_BLENDFACTOR_SRC_COLOR 0x2 #define BRW_BLENDFACTOR_SRC_ALPHA 0x3 #define BRW_BLENDFACTOR_DST_ALPHA 0x4 #define BRW_BLENDFACTOR_DST_COLOR 0x5 #define BRW_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 #define BRW_BLENDFACTOR_CONST_COLOR 0x7 #define BRW_BLENDFACTOR_CONST_ALPHA 0x8 #define BRW_BLENDFACTOR_SRC1_COLOR 0x9 #define BRW_BLENDFACTOR_SRC1_ALPHA 0x0A #define BRW_BLENDFACTOR_ZERO 0x11 #define BRW_BLENDFACTOR_INV_SRC_COLOR 0x12 #define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 #define BRW_BLENDFACTOR_INV_DST_ALPHA 0x14 #define BRW_BLENDFACTOR_INV_DST_COLOR 0x15 #define BRW_BLENDFACTOR_INV_CONST_COLOR 0x17 #define BRW_BLENDFACTOR_INV_CONST_ALPHA 0x18 #define BRW_BLENDFACTOR_INV_SRC1_COLOR 0x19 #define BRW_BLENDFACTOR_INV_SRC1_ALPHA 0x1A #define BRW_BLENDFUNCTION_ADD 0 #define BRW_BLENDFUNCTION_SUBTRACT 1 #define BRW_BLENDFUNCTION_REVERSE_SUBTRACT 2 #define BRW_BLENDFUNCTION_MIN 3 #define BRW_BLENDFUNCTION_MAX 4 #define BRW_ALPHATEST_FORMAT_UNORM8 0 #define BRW_ALPHATEST_FORMAT_FLOAT32 1 #define BRW_CHROMAKEY_KILL_ON_ANY_MATCH 0 #define BRW_CHROMAKEY_REPLACE_BLACK 1 #define BRW_CLIP_API_OGL 0 #define BRW_CLIP_API_DX 1 #define BRW_CLIPMODE_NORMAL 0 #define BRW_CLIPMODE_CLIP_ALL 1 #define BRW_CLIPMODE_CLIP_NON_REJECTED 2 #define BRW_CLIPMODE_REJECT_ALL 3 #define BRW_CLIPMODE_ACCEPT_ALL 4 #define BRW_CLIP_NDCSPACE 0 #define BRW_CLIP_SCREENSPACE 1 #define BRW_COMPAREFUNCTION_ALWAYS 0 #define BRW_COMPAREFUNCTION_NEVER 1 #define BRW_COMPAREFUNCTION_LESS 2 #define BRW_COMPAREFUNCTION_EQUAL 3 #define BRW_COMPAREFUNCTION_LEQUAL 4 #define BRW_COMPAREFUNCTION_GREATER 5 #define BRW_COMPAREFUNCTION_NOTEQUAL 6 #define BRW_COMPAREFUNCTION_GEQUAL 7 #define BRW_COVERAGE_PIXELS_HALF 0 #define BRW_COVERAGE_PIXELS_1 1 #define BRW_COVERAGE_PIXELS_2 2 #define BRW_COVERAGE_PIXELS_4 3 #define BRW_CULLMODE_BOTH 0 #define BRW_CULLMODE_NONE 1 #define BRW_CULLMODE_FRONT 2 #define BRW_CULLMODE_BACK 3 #define BRW_DEFAULTCOLOR_R8G8B8A8_UNORM 0 #define BRW_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 #define BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 #define BRW_DEPTHFORMAT_D32_FLOAT 1 #define BRW_DEPTHFORMAT_D24_UNORM_S8_UINT 2 #define BRW_DEPTHFORMAT_D16_UNORM 5 #define BRW_FLOATING_POINT_IEEE_754 0 #define BRW_FLOATING_POINT_NON_IEEE_754 1 #define BRW_FRONTWINDING_CW 0 #define BRW_FRONTWINDING_CCW 1 #define BRW_INDEX_BYTE 0 #define BRW_INDEX_WORD 1 #define BRW_INDEX_DWORD 2 #define BRW_LOGICOPFUNCTION_CLEAR 0 #define BRW_LOGICOPFUNCTION_NOR 1 #define BRW_LOGICOPFUNCTION_AND_INVERTED 2 #define BRW_LOGICOPFUNCTION_COPY_INVERTED 3 #define BRW_LOGICOPFUNCTION_AND_REVERSE 4 #define BRW_LOGICOPFUNCTION_INVERT 5 #define BRW_LOGICOPFUNCTION_XOR 6 #define BRW_LOGICOPFUNCTION_NAND 7 #define BRW_LOGICOPFUNCTION_AND 8 #define BRW_LOGICOPFUNCTION_EQUIV 9 #define BRW_LOGICOPFUNCTION_NOOP 10 #define BRW_LOGICOPFUNCTION_OR_INVERTED 11 #define BRW_LOGICOPFUNCTION_COPY 12 #define BRW_LOGICOPFUNCTION_OR_REVERSE 13 #define BRW_LOGICOPFUNCTION_OR 14 #define BRW_LOGICOPFUNCTION_SET 15 #define BRW_MAPFILTER_NEAREST 0x0 #define BRW_MAPFILTER_LINEAR 0x1 #define BRW_MAPFILTER_ANISOTROPIC 0x2 #define BRW_MIPFILTER_NONE 0 #define BRW_MIPFILTER_NEAREST 1 #define BRW_MIPFILTER_LINEAR 3 #define BRW_POLYGON_FRONT_FACING 0 #define BRW_POLYGON_BACK_FACING 1 #define BRW_PREFILTER_ALWAYS 0x0 #define BRW_PREFILTER_NEVER 0x1 #define BRW_PREFILTER_LESS 0x2 #define BRW_PREFILTER_EQUAL 0x3 #define BRW_PREFILTER_LEQUAL 0x4 #define BRW_PREFILTER_GREATER 0x5 #define BRW_PREFILTER_NOTEQUAL 0x6 #define BRW_PREFILTER_GEQUAL 0x7 #define BRW_PROVOKING_VERTEX_0 0 #define BRW_PROVOKING_VERTEX_1 1 #define BRW_PROVOKING_VERTEX_2 2 #define BRW_RASTRULE_UPPER_LEFT 0 #define BRW_RASTRULE_UPPER_RIGHT 1 #define BRW_RENDERTARGET_CLAMPRANGE_UNORM 0 #define BRW_RENDERTARGET_CLAMPRANGE_SNORM 1 #define BRW_RENDERTARGET_CLAMPRANGE_FORMAT 2 #define BRW_STENCILOP_KEEP 0 #define BRW_STENCILOP_ZERO 1 #define BRW_STENCILOP_REPLACE 2 #define BRW_STENCILOP_INCRSAT 3 #define BRW_STENCILOP_DECRSAT 4 #define BRW_STENCILOP_INCR 5 #define BRW_STENCILOP_DECR 6 #define BRW_STENCILOP_INVERT 7 #define BRW_SURFACE_MIPMAPLAYOUT_BELOW 0 #define BRW_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define BRW_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define BRW_SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define BRW_SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define BRW_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define BRW_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define BRW_SURFACEFORMAT_R64G64_FLOAT 0x005 #define BRW_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define BRW_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define BRW_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define BRW_SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define BRW_SURFACEFORMAT_R32G32B32_SINT 0x041 #define BRW_SURFACEFORMAT_R32G32B32_UINT 0x042 #define BRW_SURFACEFORMAT_R32G32B32_UNORM 0x043 #define BRW_SURFACEFORMAT_R32G32B32_SNORM 0x044 #define BRW_SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define BRW_SURFACEFORMAT_R32G32B32_USCALED 0x046 #define BRW_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define BRW_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define BRW_SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define BRW_SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define BRW_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define BRW_SURFACEFORMAT_R32G32_FLOAT 0x085 #define BRW_SURFACEFORMAT_R32G32_SINT 0x086 #define BRW_SURFACEFORMAT_R32G32_UINT 0x087 #define BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define BRW_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define BRW_SURFACEFORMAT_L32A32_FLOAT 0x08A #define BRW_SURFACEFORMAT_R32G32_UNORM 0x08B #define BRW_SURFACEFORMAT_R32G32_SNORM 0x08C #define BRW_SURFACEFORMAT_R64_FLOAT 0x08D #define BRW_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define BRW_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define BRW_SURFACEFORMAT_A32X32_FLOAT 0x090 #define BRW_SURFACEFORMAT_L32X32_FLOAT 0x091 #define BRW_SURFACEFORMAT_I32X32_FLOAT 0x092 #define BRW_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define BRW_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define BRW_SURFACEFORMAT_R32G32_SSCALED 0x095 #define BRW_SURFACEFORMAT_R32G32_USCALED 0x096 #define BRW_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define BRW_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define BRW_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define BRW_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define BRW_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define BRW_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define BRW_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define BRW_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define BRW_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define BRW_SURFACEFORMAT_R16G16_UNORM 0x0CC #define BRW_SURFACEFORMAT_R16G16_SNORM 0x0CD #define BRW_SURFACEFORMAT_R16G16_SINT 0x0CE #define BRW_SURFACEFORMAT_R16G16_UINT 0x0CF #define BRW_SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define BRW_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define BRW_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define BRW_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define BRW_SURFACEFORMAT_R32_SINT 0x0D6 #define BRW_SURFACEFORMAT_R32_UINT 0x0D7 #define BRW_SURFACEFORMAT_R32_FLOAT 0x0D8 #define BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define BRW_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define BRW_SURFACEFORMAT_L16A16_UNORM 0x0DF #define BRW_SURFACEFORMAT_I24X8_UNORM 0x0E0 #define BRW_SURFACEFORMAT_L24X8_UNORM 0x0E1 #define BRW_SURFACEFORMAT_A24X8_UNORM 0x0E2 #define BRW_SURFACEFORMAT_I32_FLOAT 0x0E3 #define BRW_SURFACEFORMAT_L32_FLOAT 0x0E4 #define BRW_SURFACEFORMAT_A32_FLOAT 0x0E5 #define BRW_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define BRW_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define BRW_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define BRW_SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define BRW_SURFACEFORMAT_R32_UNORM 0x0F1 #define BRW_SURFACEFORMAT_R32_SNORM 0x0F2 #define BRW_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define BRW_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define BRW_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define BRW_SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define BRW_SURFACEFORMAT_R16G16_USCALED 0x0F7 #define BRW_SURFACEFORMAT_R32_SSCALED 0x0F8 #define BRW_SURFACEFORMAT_R32_USCALED 0x0F9 #define BRW_SURFACEFORMAT_B5G6R5_UNORM 0x100 #define BRW_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define BRW_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define BRW_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define BRW_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define BRW_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define BRW_SURFACEFORMAT_R8G8_UNORM 0x106 #define BRW_SURFACEFORMAT_R8G8_SNORM 0x107 #define BRW_SURFACEFORMAT_R8G8_SINT 0x108 #define BRW_SURFACEFORMAT_R8G8_UINT 0x109 #define BRW_SURFACEFORMAT_R16_UNORM 0x10A #define BRW_SURFACEFORMAT_R16_SNORM 0x10B #define BRW_SURFACEFORMAT_R16_SINT 0x10C #define BRW_SURFACEFORMAT_R16_UINT 0x10D #define BRW_SURFACEFORMAT_R16_FLOAT 0x10E #define BRW_SURFACEFORMAT_I16_UNORM 0x111 #define BRW_SURFACEFORMAT_L16_UNORM 0x112 #define BRW_SURFACEFORMAT_A16_UNORM 0x113 #define BRW_SURFACEFORMAT_L8A8_UNORM 0x114 #define BRW_SURFACEFORMAT_I16_FLOAT 0x115 #define BRW_SURFACEFORMAT_L16_FLOAT 0x116 #define BRW_SURFACEFORMAT_A16_FLOAT 0x117 #define BRW_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define BRW_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define BRW_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define BRW_SURFACEFORMAT_R8G8_SSCALED 0x11C #define BRW_SURFACEFORMAT_R8G8_USCALED 0x11D #define BRW_SURFACEFORMAT_R16_SSCALED 0x11E #define BRW_SURFACEFORMAT_R16_USCALED 0x11F #define BRW_SURFACEFORMAT_R8_UNORM 0x140 #define BRW_SURFACEFORMAT_R8_SNORM 0x141 #define BRW_SURFACEFORMAT_R8_SINT 0x142 #define BRW_SURFACEFORMAT_R8_UINT 0x143 #define BRW_SURFACEFORMAT_A8_UNORM 0x144 #define BRW_SURFACEFORMAT_I8_UNORM 0x145 #define BRW_SURFACEFORMAT_L8_UNORM 0x146 #define BRW_SURFACEFORMAT_P4A4_UNORM 0x147 #define BRW_SURFACEFORMAT_A4P4_UNORM 0x148 #define BRW_SURFACEFORMAT_R8_SSCALED 0x149 #define BRW_SURFACEFORMAT_R8_USCALED 0x14A #define BRW_SURFACEFORMAT_R1_UINT 0x181 #define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182 #define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define BRW_SURFACEFORMAT_BC1_UNORM 0x186 #define BRW_SURFACEFORMAT_BC2_UNORM 0x187 #define BRW_SURFACEFORMAT_BC3_UNORM 0x188 #define BRW_SURFACEFORMAT_BC4_UNORM 0x189 #define BRW_SURFACEFORMAT_BC5_UNORM 0x18A #define BRW_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define BRW_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define BRW_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define BRW_SURFACEFORMAT_MONO8 0x18E #define BRW_SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define BRW_SURFACEFORMAT_YCRCB_SWAPY 0x190 #define BRW_SURFACEFORMAT_DXT1_RGB 0x191 #define BRW_SURFACEFORMAT_FXT1 0x192 #define BRW_SURFACEFORMAT_R8G8B8_UNORM 0x193 #define BRW_SURFACEFORMAT_R8G8B8_SNORM 0x194 #define BRW_SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define BRW_SURFACEFORMAT_R8G8B8_USCALED 0x196 #define BRW_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define BRW_SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define BRW_SURFACEFORMAT_BC4_SNORM 0x199 #define BRW_SURFACEFORMAT_BC5_SNORM 0x19A #define BRW_SURFACEFORMAT_R16G16B16_UNORM 0x19C #define BRW_SURFACEFORMAT_R16G16B16_SNORM 0x19D #define BRW_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define BRW_SURFACEFORMAT_R16G16B16_USCALED 0x19F #define BRW_SURFACERETURNFORMAT_FLOAT32 0 #define BRW_SURFACERETURNFORMAT_S1 1 #define BRW_SURFACE_1D 0 #define BRW_SURFACE_2D 1 #define BRW_SURFACE_3D 2 #define BRW_SURFACE_CUBE 3 #define BRW_SURFACE_BUFFER 4 #define BRW_SURFACE_NULL 7 #define BRW_BORDER_COLOR_MODE_DEFAULT 0 #define BRW_BORDER_COLOR_MODE_LEGACY 1 #define HSW_SCS_ZERO 0 #define HSW_SCS_ONE 1 #define HSW_SCS_RED 4 #define HSW_SCS_GREEN 5 #define HSW_SCS_BLUE 6 #define HSW_SCS_ALPHA 7 #define BRW_TEXCOORDMODE_WRAP 0 #define BRW_TEXCOORDMODE_MIRROR 1 #define BRW_TEXCOORDMODE_CLAMP 2 #define BRW_TEXCOORDMODE_CUBE 3 #define BRW_TEXCOORDMODE_CLAMP_BORDER 4 #define BRW_TEXCOORDMODE_MIRROR_ONCE 5 #define BRW_THREAD_PRIORITY_NORMAL 0 #define BRW_THREAD_PRIORITY_HIGH 1 #define BRW_TILEWALK_XMAJOR 0 #define BRW_TILEWALK_YMAJOR 1 #define BRW_VERTEX_SUBPIXEL_PRECISION_8BITS 0 #define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS 1 #define BRW_VERTEXBUFFER_ACCESS_VERTEXDATA 0 #define BRW_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 #define BRW_VFCOMPONENT_NOSTORE 0 #define BRW_VFCOMPONENT_STORE_SRC 1 #define BRW_VFCOMPONENT_STORE_0 2 #define BRW_VFCOMPONENT_STORE_1_FLT 3 #define BRW_VFCOMPONENT_STORE_1_INT 4 #define BRW_VFCOMPONENT_STORE_VID 5 #define BRW_VFCOMPONENT_STORE_IID 6 #define BRW_VFCOMPONENT_STORE_PID 7 /* Execution Unit (EU) defines */ #define BRW_ALIGN_1 0 #define BRW_ALIGN_16 1 #define BRW_ADDRESS_DIRECT 0 #define BRW_ADDRESS_REGISTER_INDIRECT_REGISTER 1 #define BRW_CHANNEL_X 0 #define BRW_CHANNEL_Y 1 #define BRW_CHANNEL_Z 2 #define BRW_CHANNEL_W 3 #define BRW_COMPRESSION_NONE 0 #define BRW_COMPRESSION_2NDHALF 1 #define BRW_COMPRESSION_COMPRESSED 2 #define BRW_CONDITIONAL_NONE 0 #define BRW_CONDITIONAL_Z 1 #define BRW_CONDITIONAL_NZ 2 #define BRW_CONDITIONAL_EQ 1 /* Z */ #define BRW_CONDITIONAL_NEQ 2 /* NZ */ #define BRW_CONDITIONAL_G 3 #define BRW_CONDITIONAL_GE 4 #define BRW_CONDITIONAL_L 5 #define BRW_CONDITIONAL_LE 6 #define BRW_CONDITIONAL_C 7 #define BRW_CONDITIONAL_O 8 #define BRW_DEBUG_NONE 0 #define BRW_DEBUG_BREAKPOINT 1 #define BRW_DEPENDENCY_NORMAL 0 #define BRW_DEPENDENCY_NOTCLEARED 1 #define BRW_DEPENDENCY_NOTCHECKED 2 #define BRW_DEPENDENCY_DISABLE 3 #define BRW_EXECUTE_1 0 #define BRW_EXECUTE_2 1 #define BRW_EXECUTE_4 2 #define BRW_EXECUTE_8 3 #define BRW_EXECUTE_16 4 #define BRW_EXECUTE_32 5 #define BRW_HORIZONTAL_STRIDE_0 0 #define BRW_HORIZONTAL_STRIDE_1 1 #define BRW_HORIZONTAL_STRIDE_2 2 #define BRW_HORIZONTAL_STRIDE_4 3 #define BRW_INSTRUCTION_NORMAL 0 #define BRW_INSTRUCTION_SATURATE 1 #define BRW_MASK_ENABLE 0 #define BRW_MASK_DISABLE 1 #define BRW_OPCODE_MOV 1 #define BRW_OPCODE_SEL 2 #define BRW_OPCODE_NOT 4 #define BRW_OPCODE_AND 5 #define BRW_OPCODE_OR 6 #define BRW_OPCODE_XOR 7 #define BRW_OPCODE_SHR 8 #define BRW_OPCODE_SHL 9 #define BRW_OPCODE_RSR 10 #define BRW_OPCODE_RSL 11 #define BRW_OPCODE_ASR 12 #define BRW_OPCODE_CMP 16 #define BRW_OPCODE_JMPI 32 #define BRW_OPCODE_IF 34 #define BRW_OPCODE_IFF 35 #define BRW_OPCODE_ELSE 36 #define BRW_OPCODE_ENDIF 37 #define BRW_OPCODE_DO 38 #define BRW_OPCODE_WHILE 39 #define BRW_OPCODE_BREAK 40 #define BRW_OPCODE_CONTINUE 41 #define BRW_OPCODE_HALT 42 #define BRW_OPCODE_MSAVE 44 #define BRW_OPCODE_MRESTORE 45 #define BRW_OPCODE_PUSH 46 #define BRW_OPCODE_POP 47 #define BRW_OPCODE_WAIT 48 #define BRW_OPCODE_SEND 49 #define BRW_OPCODE_ADD 64 #define BRW_OPCODE_MUL 65 #define BRW_OPCODE_AVG 66 #define BRW_OPCODE_FRC 67 #define BRW_OPCODE_RNDU 68 #define BRW_OPCODE_RNDD 69 #define BRW_OPCODE_RNDE 70 #define BRW_OPCODE_RNDZ 71 #define BRW_OPCODE_MAC 72 #define BRW_OPCODE_MACH 73 #define BRW_OPCODE_LZD 74 #define BRW_OPCODE_SAD2 80 #define BRW_OPCODE_SADA2 81 #define BRW_OPCODE_DP4 84 #define BRW_OPCODE_DPH 85 #define BRW_OPCODE_DP3 86 #define BRW_OPCODE_DP2 87 #define BRW_OPCODE_DPA2 88 #define BRW_OPCODE_LINE 89 #define BRW_OPCODE_NOP 126 #define BRW_PREDICATE_NONE 0 #define BRW_PREDICATE_NORMAL 1 #define BRW_PREDICATE_ALIGN1_ANYV 2 #define BRW_PREDICATE_ALIGN1_ALLV 3 #define BRW_PREDICATE_ALIGN1_ANY2H 4 #define BRW_PREDICATE_ALIGN1_ALL2H 5 #define BRW_PREDICATE_ALIGN1_ANY4H 6 #define BRW_PREDICATE_ALIGN1_ALL4H 7 #define BRW_PREDICATE_ALIGN1_ANY8H 8 #define BRW_PREDICATE_ALIGN1_ALL8H 9 #define BRW_PREDICATE_ALIGN1_ANY16H 10 #define BRW_PREDICATE_ALIGN1_ALL16H 11 #define BRW_PREDICATE_ALIGN16_REPLICATE_X 2 #define BRW_PREDICATE_ALIGN16_REPLICATE_Y 3 #define BRW_PREDICATE_ALIGN16_REPLICATE_Z 4 #define BRW_PREDICATE_ALIGN16_REPLICATE_W 5 #define BRW_PREDICATE_ALIGN16_ANY4H 6 #define BRW_PREDICATE_ALIGN16_ALL4H 7 #define BRW_ARCHITECTURE_REGISTER_FILE 0 #define BRW_GENERAL_REGISTER_FILE 1 #define BRW_MESSAGE_REGISTER_FILE 2 #define BRW_IMMEDIATE_VALUE 3 #define BRW_REGISTER_TYPE_UD 0 #define BRW_REGISTER_TYPE_D 1 #define BRW_REGISTER_TYPE_UW 2 #define BRW_REGISTER_TYPE_W 3 #define BRW_REGISTER_TYPE_UB 4 #define BRW_REGISTER_TYPE_B 5 #define BRW_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ #define BRW_REGISTER_TYPE_HF 6 #define BRW_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ #define BRW_REGISTER_TYPE_F 7 #define BRW_ARF_NULL 0x00 #define BRW_ARF_ADDRESS 0x10 #define BRW_ARF_ACCUMULATOR 0x20 #define BRW_ARF_FLAG 0x30 #define BRW_ARF_MASK 0x40 #define BRW_ARF_MASK_STACK 0x50 #define BRW_ARF_MASK_STACK_DEPTH 0x60 #define BRW_ARF_STATE 0x70 #define BRW_ARF_CONTROL 0x80 #define BRW_ARF_NOTIFICATION_COUNT 0x90 #define BRW_ARF_IP 0xA0 #define BRW_AMASK 0 #define BRW_IMASK 1 #define BRW_LMASK 2 #define BRW_CMASK 3 #define BRW_THREAD_NORMAL 0 #define BRW_THREAD_ATOMIC 1 #define BRW_THREAD_SWITCH 2 #define BRW_VERTICAL_STRIDE_0 0 #define BRW_VERTICAL_STRIDE_1 1 #define BRW_VERTICAL_STRIDE_2 2 #define BRW_VERTICAL_STRIDE_4 3 #define BRW_VERTICAL_STRIDE_8 4 #define BRW_VERTICAL_STRIDE_16 5 #define BRW_VERTICAL_STRIDE_32 6 #define BRW_VERTICAL_STRIDE_64 7 #define BRW_VERTICAL_STRIDE_128 8 #define BRW_VERTICAL_STRIDE_256 9 #define BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF #define BRW_WIDTH_1 0 #define BRW_WIDTH_2 1 #define BRW_WIDTH_4 2 #define BRW_WIDTH_8 3 #define BRW_WIDTH_16 4 #define BRW_STATELESS_BUFFER_BOUNDARY_1K 0 #define BRW_STATELESS_BUFFER_BOUNDARY_2K 1 #define BRW_STATELESS_BUFFER_BOUNDARY_4K 2 #define BRW_STATELESS_BUFFER_BOUNDARY_8K 3 #define BRW_STATELESS_BUFFER_BOUNDARY_16K 4 #define BRW_STATELESS_BUFFER_BOUNDARY_32K 5 #define BRW_STATELESS_BUFFER_BOUNDARY_64K 6 #define BRW_STATELESS_BUFFER_BOUNDARY_128K 7 #define BRW_STATELESS_BUFFER_BOUNDARY_256K 8 #define BRW_STATELESS_BUFFER_BOUNDARY_512K 9 #define BRW_STATELESS_BUFFER_BOUNDARY_1M 10 #define BRW_STATELESS_BUFFER_BOUNDARY_2M 11 #define BRW_POLYGON_FACING_FRONT 0 #define BRW_POLYGON_FACING_BACK 1 #define BRW_MESSAGE_TARGET_NULL 0 #define BRW_MESSAGE_TARGET_MATH 1 #define BRW_MESSAGE_TARGET_SAMPLER 2 #define BRW_MESSAGE_TARGET_GATEWAY 3 #define BRW_MESSAGE_TARGET_DATAPORT_READ 4 #define BRW_MESSAGE_TARGET_DATAPORT_WRITE 5 #define BRW_MESSAGE_TARGET_URB 6 #define BRW_MESSAGE_TARGET_THREAD_SPAWNER 7 #define BRW_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define BRW_SAMPLER_RETURN_FORMAT_UINT32 2 #define BRW_SAMPLER_RETURN_FORMAT_SINT32 3 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 #define BRW_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 #define BRW_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 #define BRW_SAMPLER_MESSAGE_SIMD8_RESINFO 2 #define BRW_SAMPLER_MESSAGE_SIMD16_RESINFO 2 #define BRW_SAMPLER_MESSAGE_SIMD4X2_LD 3 #define BRW_SAMPLER_MESSAGE_SIMD8_LD 3 #define BRW_SAMPLER_MESSAGE_SIMD16_LD 3 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 #define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define BRW_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 #define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 #define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 #define BRW_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2 #define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 #define BRW_DATAPORT_READ_TARGET_DATA_CACHE 0 #define BRW_DATAPORT_READ_TARGET_RENDER_CACHE 1 #define BRW_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 #define BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 #define BRW_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 #define BRW_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2 #define BRW_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 #define BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 #define BRW_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 #define BRW_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 #define BRW_MATH_FUNCTION_INV 1 #define BRW_MATH_FUNCTION_LOG 2 #define BRW_MATH_FUNCTION_EXP 3 #define BRW_MATH_FUNCTION_SQRT 4 #define BRW_MATH_FUNCTION_RSQ 5 #define BRW_MATH_FUNCTION_SIN 6 /* was 7 */ #define BRW_MATH_FUNCTION_COS 7 /* was 8 */ #define BRW_MATH_FUNCTION_SINCOS 8 /* was 6 */ #define BRW_MATH_FUNCTION_TAN 9 #define BRW_MATH_FUNCTION_POW 10 #define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 #define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT 12 #define BRW_MATH_FUNCTION_INT_DIV_REMAINDER 13 #define BRW_MATH_INTEGER_UNSIGNED 0 #define BRW_MATH_INTEGER_SIGNED 1 #define BRW_MATH_PRECISION_FULL 0 #define BRW_MATH_PRECISION_PARTIAL 1 #define BRW_MATH_SATURATE_NONE 0 #define BRW_MATH_SATURATE_SATURATE 1 #define BRW_MATH_DATA_VECTOR 0 #define BRW_MATH_DATA_SCALAR 1 #define BRW_URB_OPCODE_WRITE 0 #define BRW_URB_SWIZZLE_NONE 0 #define BRW_URB_SWIZZLE_INTERLEAVE 1 #define BRW_URB_SWIZZLE_TRANSPOSE 2 #define BRW_SCRATCH_SPACE_SIZE_1K 0 #define BRW_SCRATCH_SPACE_SIZE_2K 1 #define BRW_SCRATCH_SPACE_SIZE_4K 2 #define BRW_SCRATCH_SPACE_SIZE_8K 3 #define BRW_SCRATCH_SPACE_SIZE_16K 4 #define BRW_SCRATCH_SPACE_SIZE_32K 5 #define BRW_SCRATCH_SPACE_SIZE_64K 6 #define BRW_SCRATCH_SPACE_SIZE_128K 7 #define BRW_SCRATCH_SPACE_SIZE_256K 8 #define BRW_SCRATCH_SPACE_SIZE_512K 9 #define BRW_SCRATCH_SPACE_SIZE_1M 10 #define BRW_SCRATCH_SPACE_SIZE_2M 11 #define CMD_URB_FENCE 0x6000 #define CMD_CONST_BUFFER_STATE 0x6001 #define CMD_CONST_BUFFER 0x6002 #define CMD_STATE_BASE_ADDRESS 0x6101 #define CMD_STATE_INSN_POINTER 0x6102 #define CMD_PIPELINE_SELECT 0x6104 #define CMD_PIPELINED_STATE_POINTERS 0x7800 #define CMD_BINDING_TABLE_PTRS 0x7801 #define CMD_VERTEX_BUFFER 0x7808 #define CMD_VERTEX_ELEMENT 0x7809 #define CMD_INDEX_BUFFER 0x780a #define CMD_VF_STATISTICS 0x780b #define CMD_DRAW_RECT 0x7900 #define CMD_BLEND_CONSTANT_COLOR 0x7901 #define CMD_CHROMA_KEY 0x7904 #define CMD_DEPTH_BUFFER 0x7905 #define CMD_POLY_STIPPLE_OFFSET 0x7906 #define CMD_POLY_STIPPLE_PATTERN 0x7907 #define CMD_LINE_STIPPLE_PATTERN 0x7908 #define CMD_GLOBAL_DEPTH_OFFSET_CLAMP 0x7908 #define CMD_PIPE_CONTROL 0x7a00 #define CMD_3D_PRIM 0x7b00 #define CMD_MI_FLUSH 0x0200 /* Various values from the R0 vertex header: */ #define R02_PRIM_END 0x1 #define R02_PRIM_START 0x2 /* media pipeline */ #define BRW_VFE_MODE_GENERIC 0x0 #define BRW_VFE_MODE_VLD_MPEG2 0x1 #define BRW_VFE_MODE_IS 0x2 #define BRW_VFE_MODE_AVC_MC 0x4 #define BRW_VFE_MODE_AVC_IT 0x7 #define BRW_VFE_MODE_VC1_IT 0xB #define BRW_VFE_DEBUG_COUNTER_FREE 0 #define BRW_VFE_DEBUG_COUNTER_FROZEN 1 #define BRW_VFE_DEBUG_COUNTER_ONCE 2 #define BRW_VFE_DEBUG_COUNTER_ALWAYS 3 /* VLD_STATE */ #define BRW_MPEG_TOP_FIELD 1 #define BRW_MPEG_BOTTOM_FIELD 2 #define BRW_MPEG_FRAME 3 #define BRW_MPEG_QSCALE_LINEAR 0 #define BRW_MPEG_QSCALE_NONLINEAR 1 #define BRW_MPEG_ZIGZAG_SCAN 0 #define BRW_MPEG_ALTER_VERTICAL_SCAN 1 #define BRW_MPEG_I_PICTURE 1 #define BRW_MPEG_P_PICTURE 2 #define BRW_MPEG_B_PICTURE 3 #endif xf86-video-intel-2.99.917/src/uxa/uxa.h0000664000175000017500000005256312432737457014312 00000000000000/* * Copyright © 2000, 2008 Keith Packard * 2004 Eric Anholt * 2005 Zack Rusin * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of copyright holders not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Copyright holders make no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS * SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND * FITNESS, IN NO EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY * SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING * OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS * SOFTWARE. */ /** @file * UXA - the unified memory acceleration architecture. * * This is the header containing the public API of UXA for uxa drivers. */ #ifndef UXA_H #define UXA_H #include "scrnintstr.h" #include "pixmapstr.h" #include "windowstr.h" #include "gcstruct.h" #include "picturestr.h" #include "fb.h" #define UXA_VERSION_MAJOR 1 #define UXA_VERSION_MINOR 0 #define UXA_VERSION_RELEASE 0 typedef enum { UXA_ACCESS_RO, UXA_ACCESS_RW, } uxa_access_t; /** * The UxaDriver structure is allocated through uxa_driver_alloc(), and then * fllled in by drivers. */ typedef struct _UxaDriver { /** * uxa_major and uxa_minor should be set by the driver to the version of * UXA which the driver was compiled for (or configures itself at * runtime to support). This allows UXA to extend the structure for * new features without breaking ABI for drivers compiled against * older versions. */ int uxa_major, uxa_minor; /** * The flags field is bitfield of boolean values controlling UXA's * behavior. * * The flags include UXA_TWO_BITBLT_DIRECTIONS. */ int flags; /** @name solid * @{ */ /** * check_solid() checks whether the driver can do a solid fill to this drawable. * @param pDrawable Destination drawable * @param alu raster operation * @param planemask write mask for the fill * * The check_solid() call is recommended if prepare_solid() is * implemented, but is not required. */ Bool(*check_solid) (DrawablePtr pDrawable, int alu, Pixel planemask); /** * prepare_solid() sets up the driver for doing a solid fill. * @param pPixmap Destination pixmap * @param alu raster operation * @param planemask write mask for the fill * @param fg "foreground" color for the fill * * This call should set up the driver for doing a series of solid fills * through the solid() call. The alu raster op is one of the GX* * graphics functions listed in X.h, and typically maps to a similar * single-byte "ROP" setting in all hardware. The planemask controls * which bits of the destination should be affected, and will only * represent the bits up to the depth of pPixmap. The fg is the pixel * value of the foreground color referred to in ROP descriptions. * * Note that many drivers will need to store some of the data in the * driver private record, for sending to the hardware with each * drawing command. * * The prepare_solid() call is required of all drivers, but it may fail * for any reason. Failure results in a fallback to software rendering. */ Bool(*prepare_solid) (PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg); /** * solid() performs a solid fill set up in the last prepare_solid() * call. * * @param pPixmap destination pixmap * @param x1 left coordinate * @param y1 top coordinate * @param x2 right coordinate * @param y2 bottom coordinate * * Performs the fill set up by the last prepare_solid() call, * covering the area from (x1,y1) to (x2,y2) in pPixmap. Note that * the coordinates are in the coordinate space of the destination * pixmap, so the driver will need to set up the hardware's offset * and pitch for the destination coordinates according to the pixmap's * offset and pitch within framebuffer. * * This call is required if prepare_solid() ever succeeds. */ void (*solid) (PixmapPtr pPixmap, int x1, int y1, int x2, int y2); /** * done_solid() finishes a set of solid fills. * * @param pPixmap destination pixmap. * * The done_solid() call is called at the end of a series of consecutive * solid() calls following a successful prepare_solid(). This allows * drivers to finish up emitting drawing commands that were buffered, or * clean up state from prepare_solid(). * * This call is required if prepare_solid() ever succeeds. */ void (*done_solid) (PixmapPtr pPixmap); /** @} */ /** @name copy * @{ */ /** * check_copy() checks whether the driver can blit between the two Pictures */ Bool(*check_copy) (PixmapPtr pSrc, PixmapPtr pDst, int alu, Pixel planemask); /** * prepare_copy() sets up the driver for doing a copy within video * memory. - * * @param pSrcPixmap source pixmap * @param pDstPixmap destination pixmap * @param dx X copy direction * @param dy Y copy direction * @param alu raster operation * @param planemask write mask for the fill * * This call should set up the driver for doing a series of copies * from the pSrcPixmap to the pDstPixmap. The dx flag will be * positive if the * hardware should do the copy from the left to the right, and dy will * be positive if the copy should be done from the top to the bottom. * This is to deal with self-overlapping copies when * pSrcPixmap == pDstPixmap. * * If your hardware can only support blits that are (left to right, * top to bottom) or (right to left, bottom to top), then you should * set #UXA_TWO_BITBLT_DIRECTIONS, and UXA will break down copy * operations to ones that meet those requirements. The alu raster * op is one of the GX* graphics functions listed in X.h, and * typically maps to a similar single-byte "ROP" setting in all * hardware. The planemask controls which bits of the destination * should be affected, and will only represent the bits up to the * depth of pPixmap. * * Note that many drivers will need to store some of the data in the * driver private record, for sending to the hardware with each * drawing command. * * The prepare_copy() call is required of all drivers, but it may fail * for any reason. Failure results in a fallback to software rendering. */ Bool(*prepare_copy) (PixmapPtr pSrcPixmap, PixmapPtr pDstPixmap, int dx, int dy, int alu, Pixel planemask); /** * copy() performs a copy set up in the last prepare_copy call. * * @param pDstPixmap destination pixmap * @param srcX source X coordinate * @param srcY source Y coordinate * @param dstX destination X coordinate * @param dstY destination Y coordinate * @param width width of the rectangle to be copied * @param height height of the rectangle to be copied. * * Performs the copy set up by the last prepare_copy() call, copying the * rectangle from (srcX, srcY) to (srcX + width, srcY + width) in the * source pixmap to the same-sized rectangle at (dstX, dstY) in the * destination pixmap. Those rectangles may overlap in memory, if * pSrcPixmap == pDstPixmap. Note that this call does not receive the * pSrcPixmap as an argument -- if it's needed in this function, it * should be stored in the driver private during prepare_copy(). As * with solid(), the coordinates are in the coordinate space of each * pixmap, so the driver will need to set up source and destination * pitches and offsets from those pixmaps, probably using * uxaGetPixmapOffset() and uxa_get_pixmap_pitch(). * * This call is required if prepare_copy ever succeeds. */ void (*copy) (PixmapPtr pDstPixmap, int srcX, int srcY, int dstX, int dstY, int width, int height); /** * done_copy() finishes a set of copies. * * @param pPixmap destination pixmap. * * The done_copy() call is called at the end of a series of consecutive * copy() calls following a successful prepare_copy(). This allows * drivers to finish up emitting drawing commands that were buffered, * or clean up state from prepare_copy(). * * This call is required if prepare_copy() ever succeeds. */ void (*done_copy) (PixmapPtr pDstPixmap); /** @} */ /** @name composite * @{ */ /** * check_composite() checks to see if a composite operation could be * accelerated. * * @param op Render operation * @param pSrcPicture source Picture * @param pMaskPicture mask picture * @param pDstPicture destination Picture * @param width The width of the composite operation * @param height The height of the composite operation * * The check_composite() call checks if the driver could handle * acceleration of op with the given source, mask, and destination * pictures. This allows drivers to check source and destination * formats, supported operations, transformations, and component * alpha state, and send operations it can't support to software * rendering early on. * * See prepare_composite() for more details on likely issues that * drivers will have in accelerating composite operations. * * The check_composite() call is recommended if prepare_composite() is * implemented, but is not required. */ Bool(*check_composite) (int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, PicturePtr pDstPicture, int width, int height); /** * check_composite_target() checks to see if the destination of the composite * operation can be used without midification. * * @param pixmap Destination Pixmap * * The check_composite_target() call is recommended if prepare_composite() is * implemented, but is not required. */ Bool(*check_composite_target) (PixmapPtr pixmap); /** * check_composite_texture() checks to see if a source to the composite * operation can be used without midification. * * @param pScreen Screen * @param pPicture Picture * * The check_composite_texture() call is recommended if prepare_composite() is * implemented, but is not required. */ Bool(*check_composite_texture) (ScreenPtr pScreen, PicturePtr pPicture); /** * prepare_composite() sets up the driver for doing a composite * operation described in the Render extension protocol spec. * * @param op Render operation * @param pSrcPicture source Picture * @param pMaskPicture mask picture * @param pDstPicture destination Picture * @param pSrc source pixmap * @param pMask mask pixmap * @param pDst destination pixmap * * This call should set up the driver for doing a series of composite * operations, as described in the Render protocol spec, with the given * pSrcPicture, pMaskPicture, and pDstPicture. The pSrc, pMask, and * pDst are the pixmaps containing the pixel data, and should be used * for setting the offset and pitch used for the coordinate spaces for * each of the Pictures. * * Notes on interpreting Picture structures: * - The Picture structures will always have a valid pDrawable. * - The Picture structures will never have alphaMap set. * - The mask Picture (and therefore pMask) may be NULL, in which case * the operation is simply src OP dst instead of src IN mask OP dst, * and mask coordinates should be ignored. * - pMarkPicture may have componentAlpha set, which greatly changes * the behavior of the composite operation. componentAlpha has no * effect when set on pSrcPicture or pDstPicture. * - The source and mask Pictures may have a transformation set * (Picture->transform != NULL), which means that the source * coordinates should be transformed by that transformation, * resulting in scaling, rotation, etc. The PictureTransformPoint() * call can transform coordinates for you. Transforms have no * effect on Pictures when used as a destination. * - The source and mask pictures may have a filter set. * PictFilterNearest and PictFilterBilinear are defined in the * Render protocol, but others may be encountered, and must be * handled correctly (usually by prepare_composite failing, and * falling back to software). Filters have * no effect on Pictures when used as a destination. * - The source and mask Pictures may have repeating set, which must be * respected. Many chipsets will be unable to support repeating on * pixmaps that have a width or height that is not a power of two. * * If your hardware can't support source pictures (textures) with * non-power-of-two pitches, you should set #UXA_OFFSCREEN_ALIGN_POT. * * Note that many drivers will need to store some of the data in the * driver private record, for sending to the hardware with each * drawing command. * * The prepare_composite() call is not required. However, it is highly * recommended for performance of antialiased font rendering and * performance of cairo applications. Failure results in a fallback * to software rendering. */ Bool(*prepare_composite) (int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst); /** * composite() performs a composite operation set up in the last * prepare_composite() call. * * @param pDstPixmap destination pixmap * @param srcX source X coordinate * @param srcY source Y coordinate * @param maskX source X coordinate * @param maskY source Y coordinate * @param dstX destination X coordinate * @param dstY destination Y coordinate * @param width destination rectangle width * @param height destination rectangle height * * Performs the composite operation set up by the last * prepare_composite() call, to the rectangle from (dstX, dstY) to * (dstX + width, dstY + height) in the destination Pixmap. Note that * if a transformation was set on the source or mask Pictures, the * source rectangles may not be the same size as the destination * rectangles and filtering. Getting the coordinate transformation * right at the subpixel level can be tricky, and rendercheck * can test this for you. * * This call is required if prepare_composite() ever succeeds. */ void (*composite) (PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int width, int height); /** * done_composite() finishes a set of composite operations. * * @param pPixmap destination pixmap. * * The done_composite() call is called at the end of a series of * consecutive composite() calls following a successful * prepare_composite(). This allows drivers to finish up emitting * drawing commands that were buffered, or clean up state from * prepare_composite(). * * This call is required if prepare_composite() ever succeeds. */ void (*done_composite) (PixmapPtr pDst); /** @} */ /** * put_image() loads a rectangle of data from src into pDst. * * @param pDst destination pixmap * @param x destination X coordinate. * @param y destination Y coordinate * @param width width of the rectangle to be copied * @param height height of the rectangle to be copied * @param src pointer to the beginning of the source data * @param src_pitch pitch (in bytes) of the lines of source data. * * put_image() copies data in system memory beginning at src (with * pitch src_pitch) into the destination pixmap from (x, y) to * (x + width, y + height). This is typically done with hostdata * uploads, where the CPU sets up a blit command on the hardware with * instructions that the blit data will be fed through some sort of * aperture on the card. * * put_image() is most important for the performance of uxa_glyphs() * (antialiased font drawing) by allowing pipelining of data uploads, * avoiding a sync of the card after each glyph. * * @return TRUE if the driver successfully uploaded the data. FALSE * indicates that UXA should fall back to doing the upload in software. * * put_image() is not required, but is recommended if composite * acceleration is supported. */ Bool(*put_image) (PixmapPtr pDst, int x, int y, int w, int h, char *src, int src_pitch); /** * get_image() loads a rectangle of data from pSrc into dst * * @param pSrc source pixmap * @param x source X coordinate. * @param y source Y coordinate * @param width width of the rectangle to be copied * @param height height of the rectangle to be copied * @param dst pointer to the beginning of the destination data * @param dst_pitch pitch (in bytes) of the lines of destination data. * * get_image() copies data from offscreen memory in pSrc from * (x, y) to (x + width, y + height), to system memory starting at * dst (with pitch dst_pitch). This would usually be done * using scatter-gather DMA, supported by a DRM call, or by blitting * to AGP and then synchronously reading from AGP. * * @return TRUE if the driver successfully downloaded the data. FALSE * indicates that UXA should fall back to doing the download in * software. * * get_image() is not required, but is highly recommended. */ Bool(*get_image) (PixmapPtr pSrc, int x, int y, int w, int h, char *dst, int dst_pitch); /** @{ */ /** * prepare_access() is called before CPU access to an offscreen pixmap. * * @param pPix the pixmap being accessed * @param index the index of the pixmap being accessed. * * prepare_access() will be called before CPU access to an offscreen * pixmap. * * This can be used to set up hardware surfaces for byteswapping or * untiling, or to adjust the pixmap's devPrivate.ptr for the purpose of * making CPU access use a different aperture. * * The index is one of #UXA_PREPARE_DEST, #UXA_PREPARE_SRC, or * #UXA_PREPARE_MASK, indicating which pixmap is in question. Since * only up to three pixmaps will have prepare_access() called on them * per operation, drivers can have a small, statically-allocated space * to maintain state for prepare_access() and finish_access() in. * Note that the same pixmap may have prepare_access() called on it * more than once, for uxample when doing a copy within the same * pixmap (so it gets prepare_access as * #UXA_PREPARE_DEST and then as #UXA_PREPARE_SRC). * * prepare_access() may fail. An example might be the case of * hardware that can set up 1 or 2 surfaces for CPU access, but not * 3. If prepare_access() * fails, UXA will migrate the pixmap to system memory. * get_image() must be implemented and must not fail if a driver * wishes to fail in prepare_access(). prepare_access() must not * fail when pPix is the visible screen, because the visible screen * can not be migrated. * * @return TRUE if prepare_access() successfully prepared the pixmap * for CPU drawing. * @return FALSE if prepare_access() is unsuccessful and UXA should use * get_image() to migate the pixmap out. */ Bool(*prepare_access) (PixmapPtr pPix, uxa_access_t access); /** * finish_access() is called after CPU access to an offscreen pixmap. * * @param pPix the pixmap being accessed * @param index the index of the pixmap being accessed. * * finish_access() will be called after finishing CPU access of an * offscreen pixmap set up by prepare_access(). Note that the * finish_access() will not be called if prepare_access() failed. */ void (*finish_access) (PixmapPtr pPix, uxa_access_t access); /** * PixmapIsOffscreen() is an optional driver replacement to * uxa_pixmap_is_offscreen(). Set to NULL if you want the standard * behaviour of uxa_pixmap_is_offscreen(). * * @param pPix the pixmap * @return TRUE if the given drawable is in framebuffer memory. * * uxa_pixmap_is_offscreen() is used to determine if a pixmap is in * offscreen memory, meaning that acceleration could probably be done * to it, and that it will need to be wrapped by * prepare_access()/finish_access() when accessing it with the CPU. */ Bool(*pixmap_is_offscreen) (PixmapPtr pPix); /** @} */ } uxa_driver_t; /** @name UXA driver flags * @{ */ /** * UXA_TWO_BITBLT_DIRECTIONS indicates to UXA that the driver can only * support copies that are (left-to-right, top-to-bottom) or * (right-to-left, bottom-to-top). */ #define UXA_TWO_BITBLT_DIRECTIONS (1 << 2) /** @} */ /** @name UXA CreatePixmap hint flags * @{ */ /** * Flag to hint that the first operation on the pixmap will be a * prepare_access. */ #define UXA_CREATE_PIXMAP_FOR_MAP 0x20000000 /** @} */ uxa_driver_t *uxa_driver_alloc(void); Bool uxa_driver_init(ScreenPtr screen, uxa_driver_t * uxa_driver); Bool uxa_resources_init(ScreenPtr screen); void uxa_driver_fini(ScreenPtr pScreen); CARD32 uxa_get_pixmap_first_pixel(PixmapPtr pPixmap); Bool uxa_get_color_for_pixmap (PixmapPtr pixmap, CARD32 src_format, CARD32 dst_format, CARD32 *pixel); void uxa_set_fallback_debug(ScreenPtr screen, Bool enable); void uxa_set_force_fallback(ScreenPtr screen, Bool enable); /** * Returns TRUE if the given planemask covers all the significant bits in the * pixel values for pDrawable. */ #define UXA_PM_IS_SOLID(_pDrawable, _pm) \ (((_pm) & FbFullMask((_pDrawable)->depth)) == \ FbFullMask((_pDrawable)->depth)) #endif /* UXA_H */ xf86-video-intel-2.99.917/src/uxa/intel_present.c0000664000175000017500000002650612432737457016361 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that copyright * notice and this permission notice appear in supporting documentation, and * that the name of the copyright holders not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. The copyright holders make no representations * about the suitability of this software for any purpose. It is provided "as * is" without express or implied warranty. * * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE * OF THIS SOFTWARE. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include #include #include #include #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "xf86Pci.h" #include "xf86drm.h" #include "windowstr.h" #include "shadow.h" #include "fb.h" #include "intel.h" #include "i830_reg.h" #include "i915_drm.h" #include "present.h" struct intel_present_vblank_event { uint64_t event_id; }; static uint32_t pipe_select(int pipe) { if (pipe > 1) return pipe << DRM_VBLANK_HIGH_CRTC_SHIFT; else if (pipe > 0) return DRM_VBLANK_SECONDARY; else return 0; } static RRCrtcPtr intel_present_get_crtc(WindowPtr window) { ScreenPtr screen = window->drawable.pScreen; ScrnInfoPtr pScrn = xf86ScreenToScrn(screen); BoxRec box, crtcbox; xf86CrtcPtr crtc; RRCrtcPtr randr_crtc = NULL; box.x1 = window->drawable.x; box.y1 = window->drawable.y; box.x2 = box.x1 + window->drawable.width; box.y2 = box.y1 + window->drawable.height; crtc = intel_covering_crtc(pScrn, &box, NULL, &crtcbox); /* Make sure the CRTC is valid and this is the real front buffer */ if (crtc != NULL && !crtc->rotatedData) randr_crtc = crtc->randr_crtc; return randr_crtc; } static int intel_present_crtc_pipe(ScreenPtr screen, RRCrtcPtr randr_crtc) { xf86CrtcPtr crtc; if (randr_crtc == NULL) return 0; crtc = randr_crtc->devPrivate; return intel_crtc_to_pipe(crtc); } static int intel_present_get_ust_msc(RRCrtcPtr crtc, CARD64 *ust, CARD64 *msc) { xf86CrtcPtr xf86_crtc = crtc->devPrivate; ScreenPtr screen = crtc->pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); return intel_get_crtc_msc_ust(scrn, xf86_crtc, msc, ust); } /* * Flush the DRM event queue when full; this * makes space for new requests */ static Bool intel_present_flush_drm_events(ScreenPtr screen) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); return intel_mode_read_drm_events(intel) >= 0; } /* * Called when the queued vblank event has occurred */ static void intel_present_vblank_handler(ScrnInfoPtr scrn, xf86CrtcPtr crtc, uint64_t msc, uint64_t usec, void *data) { struct intel_present_vblank_event *event = data; present_event_notify(event->event_id, usec, msc); free(event); } /* * Called when the queued vblank is aborted */ static void intel_present_vblank_abort(ScrnInfoPtr scrn, xf86CrtcPtr crtc, void *data) { struct intel_present_vblank_event *event = data; free(event); } /* * Queue an event to report back to the Present extension when the specified * MSC has past */ static int intel_present_queue_vblank(RRCrtcPtr crtc, uint64_t event_id, uint64_t msc) { xf86CrtcPtr xf86_crtc = crtc->devPrivate; ScreenPtr screen = crtc->pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); int pipe = intel_present_crtc_pipe(screen, crtc); struct intel_present_vblank_event *event; drmVBlank vbl; int ret; uint32_t seq; event = calloc(sizeof(struct intel_present_vblank_event), 1); if (!event) return BadAlloc; event->event_id = event_id; seq = intel_drm_queue_alloc(scrn, xf86_crtc, event, intel_present_vblank_handler, intel_present_vblank_abort); if (!seq) { free(event); return BadAlloc; } vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT | pipe_select(pipe); vbl.request.sequence = intel_crtc_msc_to_sequence(scrn, xf86_crtc, msc); vbl.request.signal = seq; for (;;) { ret = drmWaitVBlank(intel->drmSubFD, &vbl); if (!ret) break; if (errno != EBUSY || !intel_present_flush_drm_events(screen)) return BadAlloc; } DebugPresent(("\t\tiq %lld seq %u msc %llu (hw msc %u)\n", (long long) event_id, seq, (long long) msc, vbl.request.sequence)); return Success; } static Bool intel_present_event_match(void *data, void *match_data) { struct intel_present_vblank_event *event = data; uint64_t *match = match_data; return *match == event->event_id; } /* * Remove a pending vblank event from the DRM queue so that it is not reported * to the extension */ static void intel_present_abort_vblank(RRCrtcPtr crtc, uint64_t event_id, uint64_t msc) { ScreenPtr screen = crtc->pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_drm_abort(scrn, intel_present_event_match, &event_id); } /* * Flush our batch buffer when requested by the Present extension. */ static void intel_present_flush(WindowPtr window) { ScreenPtr screen = window->drawable.pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); if (intel->flush_rendering) intel->flush_rendering(intel); } /* * Test to see if page flipping is possible on the target crtc */ static Bool intel_present_check_flip(RRCrtcPtr crtc, WindowPtr window, PixmapPtr pixmap, Bool sync_flip) { ScreenPtr screen = window->drawable.pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); dri_bo *bo; if (!scrn->vtSema) return FALSE; if (intel->shadow_present) return FALSE; if (!intel->use_pageflipping) return FALSE; if (crtc && !intel_crtc_on(crtc->devPrivate)) return FALSE; /* Check stride, can't change that on flip */ if (pixmap->devKind != intel->front_pitch) return FALSE; /* Make sure there's a bo we can get to */ bo = intel_get_pixmap_bo(pixmap); if (!bo) return FALSE; return TRUE; } /* * Once the flip has been completed on all pipes, notify the * extension code telling it when that happened */ static void intel_present_flip_event(uint64_t msc, uint64_t ust, void *pageflip_data) { struct intel_present_vblank_event *event = pageflip_data; present_event_notify(event->event_id, ust, msc); free(event); } /* * The flip has been aborted, free the structure */ static void intel_present_flip_abort(void *pageflip_data) { struct intel_present_vblank_event *event = pageflip_data; free(event); } /* * Queue a flip on 'crtc' to 'pixmap' at 'target_msc'. If 'sync_flip' is true, * then wait for vblank. Otherwise, flip immediately */ static Bool intel_present_flip(RRCrtcPtr crtc, uint64_t event_id, uint64_t target_msc, PixmapPtr pixmap, Bool sync_flip) { ScreenPtr screen = crtc->pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_present_vblank_event *event; int pipe = intel_present_crtc_pipe(screen, crtc); dri_bo *bo; Bool ret; if (!intel_present_check_flip(crtc, screen->root, pixmap, sync_flip)) return FALSE; bo = intel_get_pixmap_bo(pixmap); if (!bo) return FALSE; event = calloc(1, sizeof(struct intel_present_vblank_event)); if (!event) return FALSE; event->event_id = event_id; ret = intel_do_pageflip(intel, bo, pipe, !sync_flip, event, intel_present_flip_event, intel_present_flip_abort); if (!ret) xf86DrvMsg(scrn->scrnIndex, X_ERROR, "present flip failed\n"); return ret; } /* * Queue a flip back to the normal frame buffer */ static void intel_present_unflip(ScreenPtr screen, uint64_t event_id) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_present_vblank_event *event; PixmapPtr pixmap = screen->GetScreenPixmap(screen); dri_bo *bo; Bool ret; if (!intel_present_check_flip(NULL, screen->root, pixmap, true)) return; bo = intel_get_pixmap_bo(pixmap); if (!bo) return; event = calloc(1, sizeof(struct intel_present_vblank_event)); if (!event) return; event->event_id = event_id; ret = intel_do_pageflip(intel, bo, -1, FALSE, event, intel_present_flip_event, intel_present_flip_abort); if (!ret) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "present unflip failed\n"); } } static present_screen_info_rec intel_present_screen_info = { .version = PRESENT_SCREEN_INFO_VERSION, .get_crtc = intel_present_get_crtc, .get_ust_msc = intel_present_get_ust_msc, .queue_vblank = intel_present_queue_vblank, .abort_vblank = intel_present_abort_vblank, .flush = intel_present_flush, .capabilities = PresentCapabilityNone, .check_flip = intel_present_check_flip, .flip = intel_present_flip, .unflip = intel_present_unflip, }; static Bool intel_present_has_async_flip(ScreenPtr screen) { #ifdef DRM_CAP_ASYNC_PAGE_FLIP ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); int ret; uint64_t value; ret = drmGetCap(intel->drmSubFD, DRM_CAP_ASYNC_PAGE_FLIP, &value); if (ret == 0) return value == 1; #endif return FALSE; } Bool intel_present_screen_init(ScreenPtr screen) { if (intel_present_has_async_flip(screen)) intel_present_screen_info.capabilities |= PresentCapabilityAsync; return present_screen_init(screen, &intel_present_screen_info); } xf86-video-intel-2.99.917/src/uxa/Makefile.am0000664000175000017500000000463112432737457015371 00000000000000# Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL # ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER # IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. AM_CFLAGS = @CWARNFLAGS@ $(XORG_CFLAGS) $(DRM_CFLAGS) $(PCIACCESS_CFLAGS) AM_CFLAGS += $(UDEV_CFLAGS) $(DRM_CFLAGS) $(DRMINTEL_CFLAGS) AM_CFLAGS += -I$(top_srcdir)/xvmc -I$(top_srcdir)/src -I$(top_srcdir)/src/render_program noinst_LTLIBRARIES = libuxa.la libuxa_la_LIBADD = $(UDEV_LIBS) $(DRMINTEL_LIBS) $(DRM_LIBS) libuxa_la_SOURCES = \ intel_uxa.h \ brw_defines.h \ brw_structs.h \ common.h \ intel.h \ intel_batchbuffer.c \ intel_batchbuffer.h \ intel_display.c \ intel_driver.c \ intel_memory.c \ intel_uxa.c \ intel_video.c \ intel_video.h \ intel_video_overlay.c \ intel_video_overlay.h \ intel_uxa_video.c \ i830_3d.c \ i830_render.c \ i830_reg.h \ i915_3d.h \ i915_reg.h \ i915_3d.c \ i915_render.c \ i915_video.c \ i965_reg.h \ i965_3d.c \ i965_video.c \ i965_render.c \ uxa_module.h \ uxa.c \ uxa.h \ uxa-accel.c \ uxa-glyphs.c \ uxa-render.c \ uxa-priv.h \ uxa-unaccel.c $(NULL) if DRI2 AM_CFLAGS += $(DRI2_CFLAGS) libuxa_la_SOURCES += \ intel_dri.c \ $(NULL) libuxa_la_LIBADD += \ $(DRI2_LIBS) \ $(CLOCK_GETTIME_LIBS) \ $(NULL) endif if DRI3 libuxa_la_SOURCES += \ intel_dri3.c \ intel_sync.c \ $(NULL) endif if PRESENT libuxa_la_SOURCES += \ intel_present.c \ $(NULL) endif if XVMC AM_CFLAGS += -I$(top_srcdir)/xvmc libuxa_la_SOURCES += \ intel_hwmc.c \ $(NULL) endif xf86-video-intel-2.99.917/src/uxa/i915_video.c0000664000175000017500000003452312432737457015361 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "xf86xv.h" #include "fourcc.h" #include "gcstruct.h" #include "intel.h" #include "intel_uxa.h" #include "i915_reg.h" #include "i915_3d.h" void I915DisplayVideoTextured(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, int id, RegionPtr dstRegion, short width, short height, int video_pitch, int video_pitch2, short src_w, short src_h, short drw_w, short drw_h, PixmapPtr pixmap) { intel_screen_private *intel = intel_get_screen_private(scrn); uint32_t format, ms3, s5, tiling; BoxPtr pbox = REGION_RECTS(dstRegion); int nbox_total = REGION_NUM_RECTS(dstRegion); int nbox_this_time; int dxo, dyo, pix_xoff, pix_yoff; PixmapPtr target; #if 0 ErrorF("I915DisplayVideo: %dx%d (pitch %d)\n", width, height, video_pitch); #endif dxo = dstRegion->extents.x1; dyo = dstRegion->extents.y1; if (pixmap->drawable.width > 2048 || pixmap->drawable.height > 2048 || !intel_uxa_check_pitch_3d(pixmap)) { ScreenPtr screen = pixmap->drawable.pScreen; target = screen->CreatePixmap(screen, dstRegion->extents.x2 - dxo, dstRegion->extents.y2 - dyo, pixmap->drawable.depth, CREATE_PIXMAP_USAGE_SCRATCH); if (target == NULL) return; if (intel_uxa_get_pixmap_bo(target) == NULL) { screen->DestroyPixmap(target); return; } pix_xoff = -dxo; pix_yoff = -dyo; } else { target = pixmap; /* Set up the offset for translating from the given region * (in screen coordinates) to the backing pixmap. */ #ifdef COMPOSITE pix_xoff = -target->screen_x + target->drawable.x; pix_yoff = -target->screen_y + target->drawable.y; #else pix_xoff = 0; pix_yoff = 0; #endif } #define BYTES_FOR_BOXES(n) ((200 + (n) * 20) * 4) #define BOXES_IN_BYTES(s) ((((s)/4) - 200) / 20) #define BATCH_BYTES(p) ((p)->batch_bo->size - 16) while (nbox_total) { nbox_this_time = nbox_total; if (BYTES_FOR_BOXES(nbox_this_time) > BATCH_BYTES(intel)) nbox_this_time = BOXES_IN_BYTES(BATCH_BYTES(intel)); nbox_total -= nbox_this_time; intel_batch_start_atomic(scrn, 200 + 20 * nbox_this_time); IntelEmitInvarientState(scrn); intel->last_3d = LAST_3D_VIDEO; /* draw rect -- just clipping */ OUT_BATCH(_3DSTATE_DRAW_RECT_CMD); OUT_BATCH(DRAW_DITHER_OFS_X(pixmap->drawable.x & 3) | DRAW_DITHER_OFS_Y(pixmap->drawable.y & 3)); OUT_BATCH(0x00000000); /* ymin, xmin */ /* ymax, xmax */ OUT_BATCH((target->drawable.width - 1) | (target->drawable.height - 1) << 16); OUT_BATCH(0x00000000); /* yorigin, xorigin */ OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(5) | I1_LOAD_S(6) | 2); OUT_BATCH(S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D) | S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT)); s5 = 0x0; if (intel->cpp == 2) s5 |= S5_COLOR_DITHER_ENABLE; OUT_BATCH(s5); /* S5 - enable bits */ OUT_BATCH((2 << S6_DEPTH_TEST_FUNC_SHIFT) | (2 << S6_CBUF_SRC_BLEND_FACT_SHIFT) | (1 << S6_CBUF_DST_BLEND_FACT_SHIFT) | S6_COLOR_WRITE_ENABLE | (2 << S6_TRISTRIP_PV_SHIFT)); OUT_BATCH(_3DSTATE_CONST_BLEND_COLOR_CMD); OUT_BATCH(0x00000000); OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD); if (intel->cpp == 2) format = COLR_BUF_RGB565; else format = COLR_BUF_ARGB8888 | DEPTH_FRMT_24_FIXED_8_OTHER; OUT_BATCH(LOD_PRECLAMP_OGL | DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8) | format); /* front buffer, pitch, offset */ if (intel_uxa_pixmap_tiled(target)) { tiling = BUF_3D_TILED_SURFACE; if (intel_uxa_get_pixmap_private(target)->tiling == I915_TILING_Y) tiling |= BUF_3D_TILE_WALK_Y; } else tiling = 0; OUT_BATCH(_3DSTATE_BUF_INFO_CMD); OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling | BUF_3D_PITCH(intel_pixmap_pitch(target))); OUT_RELOC_PIXMAP(target, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); if (!is_planar_fourcc(id)) { FS_LOCALS(); OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | 4); OUT_BATCH(0x0000001); /* constant 0 */ /* constant 0: brightness/contrast */ OUT_BATCH_F(adaptor_priv->brightness / 128.0); OUT_BATCH_F(adaptor_priv->contrast / 255.0); OUT_BATCH_F(0.0); OUT_BATCH_F(0.0); OUT_BATCH(_3DSTATE_SAMPLER_STATE | 3); OUT_BATCH(0x00000001); OUT_BATCH(SS2_COLORSPACE_CONVERSION | (FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) | (0 << SS3_TEXTUREMAP_INDEX_SHIFT) | SS3_NORMALIZED_COORDS); OUT_BATCH(0x00000000); OUT_BATCH(_3DSTATE_MAP_STATE | 3); OUT_BATCH(0x00000001); /* texture map #1 */ if (adaptor_priv->buf) OUT_RELOC(adaptor_priv->buf, I915_GEM_DOMAIN_SAMPLER, 0, adaptor_priv->YBufOffset); else OUT_BATCH(adaptor_priv->YBufOffset); ms3 = MAPSURF_422; switch (id) { case FOURCC_YUY2: ms3 |= MT_422_YCRCB_NORMAL; break; case FOURCC_UYVY: ms3 |= MT_422_YCRCB_SWAPY; break; } ms3 |= (height - 1) << MS3_HEIGHT_SHIFT; ms3 |= (width - 1) << MS3_WIDTH_SHIFT; OUT_BATCH(ms3); OUT_BATCH(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT); FS_BEGIN(); i915_fs_dcl(FS_S0); i915_fs_dcl(FS_T0); i915_fs_texld(FS_OC, FS_S0, FS_T0); if (adaptor_priv->brightness != 0) { i915_fs_add(FS_OC, i915_fs_operand_reg(FS_OC), i915_fs_operand(FS_C0, X, X, X, ZERO)); } FS_END(); } else { FS_LOCALS(); /* For the planar formats, we set up three samplers -- * one for each plane, in a Y8 format. Because I * couldn't get the special PLANAR_TO_PACKED * shader setup to work, I did the manual pixel shader: * * y' = y - .0625 * u' = u - .5 * v' = v - .5; * * r = 1.1643 * y' + 0.0 * u' + 1.5958 * v' * g = 1.1643 * y' - 0.39173 * u' - 0.81290 * v' * b = 1.1643 * y' + 2.017 * u' + 0.0 * v' * * register assignment: * r0 = (y',u',v',0) * r1 = (y,y,y,y) * r2 = (u,u,u,u) * r3 = (v,v,v,v) * OC = (r,g,b,1) */ OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | (22 - 2)); OUT_BATCH(0x000001f); /* constants 0-4 */ /* constant 0: normalization offsets */ OUT_BATCH_F(-0.0625); OUT_BATCH_F(-0.5); OUT_BATCH_F(-0.5); OUT_BATCH_F(0.0); /* constant 1: r coefficients */ OUT_BATCH_F(1.1643); OUT_BATCH_F(0.0); OUT_BATCH_F(1.5958); OUT_BATCH_F(0.0); /* constant 2: g coefficients */ OUT_BATCH_F(1.1643); OUT_BATCH_F(-0.39173); OUT_BATCH_F(-0.81290); OUT_BATCH_F(0.0); /* constant 3: b coefficients */ OUT_BATCH_F(1.1643); OUT_BATCH_F(2.017); OUT_BATCH_F(0.0); OUT_BATCH_F(0.0); /* constant 4: brightness/contrast */ OUT_BATCH_F(adaptor_priv->brightness / 128.0); OUT_BATCH_F(adaptor_priv->contrast / 255.0); OUT_BATCH_F(0.0); OUT_BATCH_F(0.0); OUT_BATCH(_3DSTATE_SAMPLER_STATE | 9); OUT_BATCH(0x00000007); /* sampler 0 */ OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) | (0 << SS3_TEXTUREMAP_INDEX_SHIFT) | SS3_NORMALIZED_COORDS); OUT_BATCH(0x00000000); /* sampler 1 */ OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) | (1 << SS3_TEXTUREMAP_INDEX_SHIFT) | SS3_NORMALIZED_COORDS); OUT_BATCH(0x00000000); /* sampler 2 */ OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) | (2 << SS3_TEXTUREMAP_INDEX_SHIFT) | SS3_NORMALIZED_COORDS); OUT_BATCH(0x00000000); OUT_BATCH(_3DSTATE_MAP_STATE | 9); OUT_BATCH(0x00000007); if (adaptor_priv->buf) OUT_RELOC(adaptor_priv->buf, I915_GEM_DOMAIN_SAMPLER, 0, adaptor_priv->YBufOffset); else OUT_BATCH(adaptor_priv->YBufOffset); ms3 = MAPSURF_8BIT | MT_8BIT_I8; ms3 |= (height - 1) << MS3_HEIGHT_SHIFT; ms3 |= (width - 1) << MS3_WIDTH_SHIFT; OUT_BATCH(ms3); /* check to see if Y has special pitch than normal * double u/v pitch, e.g i915 XvMC hw requires at * least 1K alignment, so Y pitch might * be same as U/V's.*/ if (video_pitch2) OUT_BATCH(((video_pitch2 / 4) - 1) << MS4_PITCH_SHIFT); else OUT_BATCH(((video_pitch * 2 / 4) - 1) << MS4_PITCH_SHIFT); if (adaptor_priv->buf) OUT_RELOC(adaptor_priv->buf, I915_GEM_DOMAIN_SAMPLER, 0, adaptor_priv->UBufOffset); else OUT_BATCH(adaptor_priv->UBufOffset); ms3 = MAPSURF_8BIT | MT_8BIT_I8; ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT; ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT; OUT_BATCH(ms3); OUT_BATCH(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT); if (adaptor_priv->buf) OUT_RELOC(adaptor_priv->buf, I915_GEM_DOMAIN_SAMPLER, 0, adaptor_priv->VBufOffset); else OUT_BATCH(adaptor_priv->VBufOffset); ms3 = MAPSURF_8BIT | MT_8BIT_I8; ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT; ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT; OUT_BATCH(ms3); OUT_BATCH(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT); FS_BEGIN(); /* Declare samplers */ i915_fs_dcl(FS_S0); /* Y */ i915_fs_dcl(FS_S1); /* U */ i915_fs_dcl(FS_S2); /* V */ i915_fs_dcl(FS_T0); /* normalized coords */ /* Load samplers to temporaries. */ i915_fs_texld(FS_R1, FS_S0, FS_T0); i915_fs_texld(FS_R2, FS_S1, FS_T0); i915_fs_texld(FS_R3, FS_S2, FS_T0); /* Move the sampled YUV data in R[123] to the first * 3 channels of R0. */ i915_fs_mov_masked(FS_R0, MASK_X, i915_fs_operand_reg(FS_R1)); i915_fs_mov_masked(FS_R0, MASK_Y, i915_fs_operand_reg(FS_R2)); i915_fs_mov_masked(FS_R0, MASK_Z, i915_fs_operand_reg(FS_R3)); /* Normalize the YUV data */ i915_fs_add(FS_R0, i915_fs_operand_reg(FS_R0), i915_fs_operand_reg(FS_C0)); /* dot-product the YUV data in R0 by the vectors of * coefficients for calculating R, G, and B, storing * the results in the R, G, or B channels of the output * color. The OC results are implicitly clamped * at the end of the program. */ i915_fs_dp3(FS_OC, MASK_X, i915_fs_operand_reg(FS_R0), i915_fs_operand_reg(FS_C1)); i915_fs_dp3(FS_OC, MASK_Y, i915_fs_operand_reg(FS_R0), i915_fs_operand_reg(FS_C2)); i915_fs_dp3(FS_OC, MASK_Z, i915_fs_operand_reg(FS_R0), i915_fs_operand_reg(FS_C3)); /* Set alpha of the output to 1.0, by wiring W to 1 * and not actually using the source. */ i915_fs_mov_masked(FS_OC, MASK_W, i915_fs_operand_one()); if (adaptor_priv->brightness != 0) { i915_fs_add(FS_OC, i915_fs_operand_reg(FS_OC), i915_fs_operand(FS_C4, X, X, X, ZERO)); } FS_END(); } OUT_BATCH(PRIM3D_RECTLIST | (12 * nbox_this_time - 1)); while (nbox_this_time--) { int box_x1 = pbox->x1; int box_y1 = pbox->y1; int box_x2 = pbox->x2; int box_y2 = pbox->y2; float src_scale_x, src_scale_y; pbox++; src_scale_x = ((float)src_w / width) / drw_w; src_scale_y = ((float)src_h / height) / drw_h; /* vertex data - rect list consists of bottom right, * bottom left, and top left vertices. */ /* bottom right */ OUT_BATCH_F(box_x2 + pix_xoff); OUT_BATCH_F(box_y2 + pix_yoff); OUT_BATCH_F((box_x2 - dxo) * src_scale_x); OUT_BATCH_F((box_y2 - dyo) * src_scale_y); /* bottom left */ OUT_BATCH_F(box_x1 + pix_xoff); OUT_BATCH_F(box_y2 + pix_yoff); OUT_BATCH_F((box_x1 - dxo) * src_scale_x); OUT_BATCH_F((box_y2 - dyo) * src_scale_y); /* top left */ OUT_BATCH_F(box_x1 + pix_xoff); OUT_BATCH_F(box_y1 + pix_yoff); OUT_BATCH_F((box_x1 - dxo) * src_scale_x); OUT_BATCH_F((box_y1 - dyo) * src_scale_y); } intel_batch_end_atomic(scrn); } if (target != pixmap) { GCPtr gc; gc = GetScratchGC(pixmap->drawable.depth, pixmap->drawable.pScreen); if (gc) { gc->subWindowMode = ClipByChildren; if (REGION_NUM_RECTS(dstRegion) > 1) { RegionPtr tmp; tmp = REGION_CREATE(pixmap->drawable.pScreen, NULL, 0); if (tmp) { REGION_COPY(pixmap->drawable.pScreen, tmp, dstRegion); gc->funcs->ChangeClip(gc, CT_REGION, tmp, 0); } } ValidateGC(&pixmap->drawable, gc); gc->ops->CopyArea(&target->drawable, &pixmap->drawable, gc, 0, 0, target->drawable.width, target->drawable.height, -pix_xoff, -pix_yoff); FreeScratchGC(gc); } target->drawable.pScreen->DestroyPixmap(target); } intel_uxa_debug_flush(scrn); } xf86-video-intel-2.99.917/src/uxa/intel_video.c0000664000175000017500000005702712432737457016011 00000000000000/*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * i830_video.c: i830/i845 Xv driver. * * Copyright © 2002 by Alan Hourihane and David Dawes * * Authors: * Alan Hourihane * David Dawes * * Derived from i810 Xv driver: * * Authors of i810 code: * Jonathan Bian * Offscreen Images: * Matt Sottek */ /* * XXX Could support more formats. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "compiler.h" #include "xf86Pci.h" #include "xf86fbman.h" #include "xf86drm.h" #include "regionstr.h" #include "randrstr.h" #include "windowstr.h" #include "damage.h" #include "intel.h" #include "intel_video.h" #include "i830_reg.h" #include "xf86xv.h" #include #include "dixstruct.h" #include "fourcc.h" #ifdef INTEL_XVMC #define _INTEL_XVMC_SERVER_ #include "intel_xvmc.h" #endif #include "intel_uxa.h" #include "intel_video_overlay.h" Atom intel_xv_Brightness, intel_xv_Contrast, intel_xv_Saturation, intel_xv_ColorKey, intel_xv_Pipe; Atom intel_xv_Gamma0, intel_xv_Gamma1, intel_xv_Gamma2, intel_xv_Gamma3, intel_xv_Gamma4, intel_xv_Gamma5; Atom intel_xv_SyncToVblank; /* client libraries expect an encoding */ const XF86VideoEncodingRec intel_xv_dummy_encoding[1] = { { 0, "XV_IMAGE", IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT, {1, 1} } }; XF86VideoFormatRec intel_xv_formats[NUM_FORMATS] = { {15, TrueColor}, {16, TrueColor}, {24, TrueColor} }; XF86AttributeRec intel_xv_attributes[NUM_ATTRIBUTES] = { {XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"}, {XvSettable | XvGettable, -128, 127, "XV_BRIGHTNESS"}, {XvSettable | XvGettable, 0, 255, "XV_CONTRAST"}, {XvSettable | XvGettable, 0, 1023, "XV_SATURATION"}, {XvSettable | XvGettable, -1, 1, "XV_PIPE"} }; #define GAMMA_ATTRIBUTES 6 XF86AttributeRec intel_xv_gamma_attributes[GAMMA_ATTRIBUTES] = { {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA0"}, {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA1"}, {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA2"}, {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA3"}, {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA4"}, {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA5"} }; #ifdef INTEL_XVMC #define NUM_IMAGES 5 #define XVMC_IMAGE 1 #else #define NUM_IMAGES 4 #define XVMC_IMAGE 0 #endif XF86ImageRec intel_xv_images[NUM_IMAGES] = { XVIMAGE_YUY2, XVIMAGE_YV12, XVIMAGE_I420, XVIMAGE_UYVY, #ifdef INTEL_XVMC { /* * Below, a dummy picture type that is used in XvPutImage only to do * an overlay update. Introduced for the XvMC client lib. * Defined to have a zero data size. */ FOURCC_XVMC, XvYUV, LSBFirst, {'X', 'V', 'M', 'C', 0x00, 0x00, 0x00, 0x10, 0x80, 0x00, 0x00, 0xAA, 0x00, 0x38, 0x9B, 0x71}, 12, XvPlanar, 3, 0, 0, 0, 0, 8, 8, 8, 1, 2, 2, 1, 2, 2, {'Y', 'V', 'U', 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, XvTopToBottom}, #endif }; void intel_video_init(ScreenPtr screen) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); XF86VideoAdaptorPtr *adaptors = NULL, *newAdaptors = NULL; XF86VideoAdaptorPtr overlayAdaptor = NULL, texturedAdaptor = NULL; int num_adaptors = xf86XVListGenericAdaptors(scrn, &adaptors); /* Give our adaptor list enough space for the overlay and/or texture video * adaptors. */ newAdaptors = realloc(adaptors, (num_adaptors + 3) * sizeof(XF86VideoAdaptorPtr)); if (newAdaptors == NULL) { free(adaptors); return; } adaptors = newAdaptors; /* Add the adaptors supported by our hardware. First, set up the atoms * that will be used by both output adaptors. */ intel_xv_Brightness = MAKE_ATOM("XV_BRIGHTNESS"); intel_xv_Contrast = MAKE_ATOM("XV_CONTRAST"); /* Set up textured video if we can do it at this depth and we are on * supported hardware. */ if (!intel->force_fallback && scrn->bitsPerPixel >= 16 && INTEL_INFO(intel)->gen >= 030 && INTEL_INFO(intel)->gen < 0100) { texturedAdaptor = intel_uxa_video_setup_image_textured(screen); if (texturedAdaptor != NULL) { xf86DrvMsg(scrn->scrnIndex, X_INFO, "Set up textured video\n"); } else { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Failed to set up textured video\n"); } } overlayAdaptor = intel_video_overlay_setup_image(screen); if (intel->use_overlay) { if (overlayAdaptor != NULL) { xf86DrvMsg(scrn->scrnIndex, X_INFO, "Set up overlay video\n"); } else { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Failed to set up overlay video\n"); } } if (overlayAdaptor && intel->XvPreferOverlay) adaptors[num_adaptors++] = overlayAdaptor; if (texturedAdaptor) adaptors[num_adaptors++] = texturedAdaptor; if (overlayAdaptor && !intel->XvPreferOverlay) adaptors[num_adaptors++] = overlayAdaptor; if (num_adaptors) { xf86XVScreenInit(screen, adaptors, num_adaptors); } else { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "Disabling Xv because no adaptors could be initialized.\n"); intel->XvEnabled = FALSE; } #ifdef INTEL_XVMC if (texturedAdaptor) intel_xvmc_adaptor_init(screen); #endif free(adaptors); } void intel_free_video_buffers(intel_adaptor_private *adaptor_priv) { int i; for (i = 0; i < 2; i++) { if (adaptor_priv->old_buf[i]) { drm_intel_bo_disable_reuse(adaptor_priv->old_buf[i]); drm_intel_bo_unreference(adaptor_priv->old_buf[i]); adaptor_priv->old_buf[i] = NULL; } } if (adaptor_priv->buf) { drm_intel_bo_unreference(adaptor_priv->buf); adaptor_priv->buf = NULL; } } int intel_video_get_port_attribute(ScrnInfoPtr scrn, Atom attribute, INT32 * value, pointer data) { intel_screen_private *intel = intel_get_screen_private(scrn); intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data; if (attribute == intel_xv_Brightness) { *value = adaptor_priv->brightness; } else if (attribute == intel_xv_Contrast) { *value = adaptor_priv->contrast; } else if (attribute == intel_xv_Saturation) { *value = adaptor_priv->saturation; } else if (attribute == intel_xv_Pipe) { int c; xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); for (c = 0; c < xf86_config->num_crtc; c++) if (xf86_config->crtc[c] == adaptor_priv->desired_crtc) break; if (c == xf86_config->num_crtc) c = -1; *value = c; } else if (attribute == intel_xv_Gamma0 && (INTEL_INFO(intel)->gen >= 030)) { *value = adaptor_priv->gamma0; } else if (attribute == intel_xv_Gamma1 && (INTEL_INFO(intel)->gen >= 030)) { *value = adaptor_priv->gamma1; } else if (attribute == intel_xv_Gamma2 && (INTEL_INFO(intel)->gen >= 030)) { *value = adaptor_priv->gamma2; } else if (attribute == intel_xv_Gamma3 && (INTEL_INFO(intel)->gen >= 030)) { *value = adaptor_priv->gamma3; } else if (attribute == intel_xv_Gamma4 && (INTEL_INFO(intel)->gen >= 030)) { *value = adaptor_priv->gamma4; } else if (attribute == intel_xv_Gamma5 && (INTEL_INFO(intel)->gen >= 030)) { *value = adaptor_priv->gamma5; } else if (attribute == intel_xv_ColorKey) { *value = adaptor_priv->colorKey; } else if (attribute == intel_xv_SyncToVblank) { *value = adaptor_priv->SyncToVblank; } else return BadMatch; return Success; } void intel_video_query_best_size(ScrnInfoPtr scrn, Bool motion, short vid_w, short vid_h, short drw_w, short drw_h, unsigned int *p_w, unsigned int *p_h, pointer data) { if (vid_w > (drw_w << 1)) drw_w = vid_w >> 1; if (vid_h > (drw_h << 1)) drw_h = vid_h >> 1; *p_w = drw_w; *p_h = drw_h; } static Bool intel_video_copy_packed_data(intel_adaptor_private *adaptor_priv, unsigned char *buf, int srcPitch, int dstPitch, int top, int left, int h, int w) { unsigned char *src, *dst, *dst_base; int i, j; unsigned char *s; #if 0 ErrorF("intel_video_copy_packed_data: (%d,%d) (%d,%d)\n" "srcPitch: %d, dstPitch: %d\n", top, left, h, w, srcPitch, dstPitch); #endif src = buf + (top * srcPitch) + (left << 1); if (drm_intel_gem_bo_map_gtt(adaptor_priv->buf)) return FALSE; dst_base = adaptor_priv->buf->virtual; dst = dst_base + adaptor_priv->YBufOffset; switch (adaptor_priv->rotation) { case RR_Rotate_0: w <<= 1; for (i = 0; i < h; i++) { memcpy(dst, src, w); src += srcPitch; dst += dstPitch; } break; case RR_Rotate_90: h <<= 1; for (i = 0; i < h; i += 2) { s = src; for (j = 0; j < w; j++) { /* Copy Y */ dst[(i + 0) + ((w - j - 1) * dstPitch)] = *s++; (void)*s++; } src += srcPitch; } h >>= 1; src = buf + (top * srcPitch) + (left << 1); for (i = 0; i < h; i += 2) { for (j = 0; j < w; j += 2) { /* Copy U */ dst[((i * 2) + 1) + ((w - j - 1) * dstPitch)] = src[(j * 2) + 1 + (i * srcPitch)]; dst[((i * 2) + 1) + ((w - j - 2) * dstPitch)] = src[(j * 2) + 1 + ((i + 1) * srcPitch)]; /* Copy V */ dst[((i * 2) + 3) + ((w - j - 1) * dstPitch)] = src[(j * 2) + 3 + (i * srcPitch)]; dst[((i * 2) + 3) + ((w - j - 2) * dstPitch)] = src[(j * 2) + 3 + ((i + 1) * srcPitch)]; } } break; case RR_Rotate_180: w <<= 1; for (i = 0; i < h; i++) { s = src; for (j = 0; j < w; j += 4) { dst[(w - j - 4) + ((h - i - 1) * dstPitch)] = *s++; dst[(w - j - 3) + ((h - i - 1) * dstPitch)] = *s++; dst[(w - j - 2) + ((h - i - 1) * dstPitch)] = *s++; dst[(w - j - 1) + ((h - i - 1) * dstPitch)] = *s++; } src += srcPitch; } break; case RR_Rotate_270: h <<= 1; for (i = 0; i < h; i += 2) { s = src; for (j = 0; j < w; j++) { /* Copy Y */ dst[(h - i - 2) + (j * dstPitch)] = *s++; (void)*s++; } src += srcPitch; } h >>= 1; src = buf + (top * srcPitch) + (left << 1); for (i = 0; i < h; i += 2) { for (j = 0; j < w; j += 2) { /* Copy U */ dst[(((h - i) * 2) - 3) + (j * dstPitch)] = src[(j * 2) + 1 + (i * srcPitch)]; dst[(((h - i) * 2) - 3) + ((j + 1) * dstPitch)] = src[(j * 2) + 1 + ((i + 1) * srcPitch)]; /* Copy V */ dst[(((h - i) * 2) - 1) + (j * dstPitch)] = src[(j * 2) + 3 + (i * srcPitch)]; dst[(((h - i) * 2) - 1) + ((j + 1) * dstPitch)] = src[(j * 2) + 3 + ((i + 1) * srcPitch)]; } } break; } drm_intel_gem_bo_unmap_gtt(adaptor_priv->buf); return TRUE; } static void intel_memcpy_plane(unsigned char *dst, unsigned char *src, int height, int width, int dstPitch, int srcPitch, Rotation rotation) { int i, j = 0; unsigned char *s; switch (rotation) { case RR_Rotate_0: /* optimise for the case of no clipping */ if (srcPitch == dstPitch && srcPitch == width) memcpy(dst, src, srcPitch * height); else for (i = 0; i < height; i++) { memcpy(dst, src, width); src += srcPitch; dst += dstPitch; } break; case RR_Rotate_90: for (i = 0; i < height; i++) { s = src; for (j = 0; j < width; j++) { dst[(i) + ((width - j - 1) * dstPitch)] = *s++; } src += srcPitch; } break; case RR_Rotate_180: for (i = 0; i < height; i++) { s = src; for (j = 0; j < width; j++) { dst[(width - j - 1) + ((height - i - 1) * dstPitch)] = *s++; } src += srcPitch; } break; case RR_Rotate_270: for (i = 0; i < height; i++) { s = src; for (j = 0; j < width; j++) { dst[(height - i - 1) + (j * dstPitch)] = *s++; } src += srcPitch; } break; } } static Bool intel_video_copy_planar_data(intel_adaptor_private *adaptor_priv, unsigned char *buf, int srcPitch, int srcPitch2, int dstPitch, int dstPitch2, int srcH, int top, int left, int h, int w, int id) { unsigned char *src1, *src2, *src3, *dst_base, *dst1, *dst2, *dst3; #if 0 ErrorF("intel_video_copy_planar_data: srcPitch %d, srcPitch %d, dstPitch %d\n" "nlines %d, npixels %d, top %d, left %d\n", srcPitch, srcPitch2, dstPitch, h, w, top, left); #endif /* Copy Y data */ src1 = buf + (top * srcPitch) + left; #if 0 ErrorF("src1 is %p, offset is %ld\n", src1, (unsigned long)src1 - (unsigned long)buf); #endif if (drm_intel_gem_bo_map_gtt(adaptor_priv->buf)) return FALSE; dst_base = adaptor_priv->buf->virtual; dst1 = dst_base + adaptor_priv->YBufOffset; intel_memcpy_plane(dst1, src1, h, w, dstPitch2, srcPitch, adaptor_priv->rotation); /* Copy V data for YV12, or U data for I420 */ src2 = buf + /* start of YUV data */ (srcH * srcPitch) + /* move over Luma plane */ ((top >> 1) * srcPitch2) + /* move down from by top lines */ (left >> 1); /* move left by left pixels */ #if 0 ErrorF("src2 is %p, offset is %ld\n", src2, (unsigned long)src2 - (unsigned long)buf); #endif if (id == FOURCC_I420) dst2 = dst_base + adaptor_priv->UBufOffset; else dst2 = dst_base + adaptor_priv->VBufOffset; intel_memcpy_plane(dst2, src2, h / 2, w / 2, dstPitch, srcPitch2, adaptor_priv->rotation); /* Copy U data for YV12, or V data for I420 */ src3 = buf + /* start of YUV data */ (srcH * srcPitch) + /* move over Luma plane */ ((srcH >> 1) * srcPitch2) + /* move over Chroma plane */ ((top >> 1) * srcPitch2) + /* move down from by top lines */ (left >> 1); /* move left by left pixels */ #if 0 ErrorF("src3 is %p, offset is %ld\n", src3, (unsigned long)src3 - (unsigned long)buf); #endif if (id == FOURCC_I420) dst3 = dst_base + adaptor_priv->VBufOffset; else dst3 = dst_base + adaptor_priv->UBufOffset; intel_memcpy_plane(dst3, src3, h / 2, w / 2, dstPitch, srcPitch2, adaptor_priv->rotation); drm_intel_gem_bo_unmap_gtt(adaptor_priv->buf); return TRUE; } void intel_setup_dst_params(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, short width, short height, int *dstPitch, int *dstPitch2, int *size, int id) { intel_screen_private *intel = intel_get_screen_private(scrn); int pitchAlign; /* Only needs to be DWORD-aligned for textured on i915, but overlay has * stricter requirements. */ if (adaptor_priv->textured) { pitchAlign = 4; } else { if (INTEL_INFO(intel)->gen >= 040) /* Actually the alignment is 64 bytes, too. But the * stride must be at least 512 bytes. Take the easy fix * and align on 512 bytes unconditionally. */ pitchAlign = 512; else if (IS_I830(intel) || IS_845G(intel)) /* Harsh, errata on these chipsets limit the stride to be * a multiple of 256 bytes. */ pitchAlign = 256; else pitchAlign = 64; } #if INTEL_XVMC /* for i915 xvmc, hw requires 1kb aligned surfaces */ if ((id == FOURCC_XVMC) && IS_GEN3(intel)) pitchAlign = 1024; #endif /* Determine the desired destination pitch (representing the chroma's pitch, * in the planar case. */ if (is_planar_fourcc(id)) { if (adaptor_priv->rotation & (RR_Rotate_90 | RR_Rotate_270)) { *dstPitch = ALIGN((height / 2), pitchAlign); *dstPitch2 = ALIGN(height, pitchAlign); *size = *dstPitch * width * 3; } else { *dstPitch = ALIGN((width / 2), pitchAlign); *dstPitch2 = ALIGN(width, pitchAlign); *size = *dstPitch * height * 3; } } else { if (adaptor_priv->rotation & (RR_Rotate_90 | RR_Rotate_270)) { *dstPitch = ALIGN((height << 1), pitchAlign); *size = *dstPitch * width; } else { *dstPitch = ALIGN((width << 1), pitchAlign); *size = *dstPitch * height; } *dstPitch2 = 0; } #if 0 ErrorF("srcPitch: %d, dstPitch: %d, size: %d\n", srcPitch, *dstPitch, size); #endif adaptor_priv->YBufOffset = 0; if (adaptor_priv->rotation & (RR_Rotate_90 | RR_Rotate_270)) { adaptor_priv->UBufOffset = adaptor_priv->YBufOffset + (*dstPitch2 * width); adaptor_priv->VBufOffset = adaptor_priv->UBufOffset + (*dstPitch * width / 2); } else { adaptor_priv->UBufOffset = adaptor_priv->YBufOffset + (*dstPitch2 * height); adaptor_priv->VBufOffset = adaptor_priv->UBufOffset + (*dstPitch * height / 2); } } static Bool intel_setup_video_buffer(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, int alloc_size, int id, unsigned char *buf) { intel_screen_private *intel = intel_get_screen_private(scrn); /* Free the current buffer if we're going to have to reallocate */ if (adaptor_priv->buf && adaptor_priv->buf->size < alloc_size) intel_free_video_buffers(adaptor_priv); if (adaptor_priv->buf == NULL) { adaptor_priv->buf = drm_intel_bo_alloc(intel->bufmgr, "xv buffer", alloc_size, 4096); if (adaptor_priv->buf == NULL) return FALSE; adaptor_priv->reusable = TRUE; } return TRUE; } Bool intel_video_copy_data(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, short width, short height, int *dstPitch, int *dstPitch2, int top, int left, int npixels, int nlines, int id, unsigned char *buf) { int srcPitch = 0, srcPitch2 = 0; int size; if (is_planar_fourcc(id)) { srcPitch = ALIGN(width, 0x4); srcPitch2 = ALIGN((width >> 1), 0x4); } else { srcPitch = width << 1; } intel_setup_dst_params(scrn, adaptor_priv, width, height, dstPitch, dstPitch2, &size, id); if (!intel_setup_video_buffer(scrn, adaptor_priv, size, id, buf)) return FALSE; /* copy data */ if (is_planar_fourcc(id)) { return intel_video_copy_planar_data(adaptor_priv, buf, srcPitch, srcPitch2, *dstPitch, *dstPitch2, height, top, left, nlines, npixels, id); } else { return intel_video_copy_packed_data(adaptor_priv, buf, srcPitch, *dstPitch, top, left, nlines, npixels); } } int is_planar_fourcc(int id) { switch (id) { case FOURCC_YV12: case FOURCC_I420: #ifdef INTEL_XVMC case FOURCC_XVMC: #endif return 1; case FOURCC_UYVY: case FOURCC_YUY2: return 0; default: ErrorF("Unknown format 0x%x\n", id); return 0; } } Bool intel_clip_video_helper(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, xf86CrtcPtr * crtc_ret, BoxPtr dst, short src_x, short src_y, short drw_x, short drw_y, short src_w, short src_h, short drw_w, short drw_h, int id, int *top, int* left, int* npixels, int *nlines, RegionPtr reg, INT32 width, INT32 height) { Bool ret; RegionRec crtc_region_local; RegionPtr crtc_region = reg; BoxRec crtc_box; INT32 x1, x2, y1, y2; xf86CrtcPtr crtc; x1 = src_x; x2 = src_x + src_w; y1 = src_y; y2 = src_y + src_h; dst->x1 = drw_x; dst->x2 = drw_x + drw_w; dst->y1 = drw_y; dst->y2 = drw_y + drw_h; /* * For overlay video, compute the relevant CRTC and * clip video to that */ crtc = intel_covering_crtc(scrn, dst, adaptor_priv->desired_crtc, &crtc_box); /* For textured video, we don't actually want to clip at all. */ if (crtc && !adaptor_priv->textured) { REGION_INIT(screen, &crtc_region_local, &crtc_box, 1); crtc_region = &crtc_region_local; REGION_INTERSECT(screen, crtc_region, crtc_region, reg); } *crtc_ret = crtc; ret = xf86XVClipVideoHelper(dst, &x1, &x2, &y1, &y2, crtc_region, width, height); if (crtc_region != reg) REGION_UNINIT(screen, &crtc_region_local); *top = y1 >> 16; *left = (x1 >> 16) & ~1; *npixels = ALIGN(((x2 + 0xffff) >> 16), 2) - *left; if (is_planar_fourcc(id)) { *top &= ~1; *nlines = ALIGN(((y2 + 0xffff) >> 16), 2) - *top; } else *nlines = ((y2 + 0xffff) >> 16) - *top; return ret; } int intel_video_query_image_attributes(ScrnInfoPtr scrn, int id, unsigned short *w, unsigned short *h, int *pitches, int *offsets) { intel_screen_private *intel = intel_get_screen_private(scrn); int size, tmp; #if 0 ErrorF("intel_video_query_image_attributes: w is %d, h is %d\n", *w, *h); #endif if (IS_845G(intel) || IS_I830(intel)) { if (*w > IMAGE_MAX_WIDTH_LEGACY) *w = IMAGE_MAX_WIDTH_LEGACY; if (*h > IMAGE_MAX_HEIGHT_LEGACY) *h = IMAGE_MAX_HEIGHT_LEGACY; } else { if (*w > IMAGE_MAX_WIDTH) *w = IMAGE_MAX_WIDTH; if (*h > IMAGE_MAX_HEIGHT) *h = IMAGE_MAX_HEIGHT; } *w = (*w + 1) & ~1; if (offsets) offsets[0] = 0; switch (id) { /* IA44 is for XvMC only */ case FOURCC_IA44: case FOURCC_AI44: if (pitches) pitches[0] = *w; size = *w * *h; break; case FOURCC_YV12: case FOURCC_I420: *h = (*h + 1) & ~1; size = (*w + 3) & ~3; if (pitches) pitches[0] = size; size *= *h; if (offsets) offsets[1] = size; tmp = ((*w >> 1) + 3) & ~3; if (pitches) pitches[1] = pitches[2] = tmp; tmp *= (*h >> 1); size += tmp; if (offsets) offsets[2] = size; size += tmp; #if 0 if (pitches) ErrorF("pitch 0 is %d, pitch 1 is %d, pitch 2 is %d\n", pitches[0], pitches[1], pitches[2]); if (offsets) ErrorF("offset 1 is %d, offset 2 is %d\n", offsets[1], offsets[2]); if (offsets) ErrorF("size is %d\n", size); #endif break; #ifdef INTEL_XVMC case FOURCC_XVMC: *h = (*h + 1) & ~1; size = sizeof(struct intel_xvmc_command); if (pitches) pitches[0] = size; break; #endif case FOURCC_UYVY: case FOURCC_YUY2: default: size = *w << 1; if (pitches) pitches[0] = size; size *= *h; break; } return size; } void intel_video_stop_video(ScrnInfoPtr scrn, pointer data, Bool shutdown) { intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data; if (adaptor_priv->textured) return; REGION_EMPTY(scrn->pScreen, &adaptor_priv->clip); if (shutdown) { if (adaptor_priv->videoStatus & CLIENT_VIDEO_ON) intel_video_overlay_off(intel_get_screen_private(scrn)); intel_free_video_buffers(adaptor_priv); adaptor_priv->videoStatus = 0; } else { if (adaptor_priv->videoStatus & CLIENT_VIDEO_ON) { adaptor_priv->videoStatus |= OFF_TIMER; adaptor_priv->offTime = currentTime.milliseconds + OFF_DELAY; } } } void intel_video_block_handler(intel_screen_private *intel) { intel_adaptor_private *adaptor_priv; /* no overlay */ if (intel->adaptor == NULL) return; adaptor_priv = intel_get_adaptor_private(intel); if (adaptor_priv->videoStatus & OFF_TIMER) { Time now = currentTime.milliseconds; if (adaptor_priv->offTime < now) { /* Turn off the overlay */ intel_video_overlay_off(intel); intel_free_video_buffers(adaptor_priv); adaptor_priv->videoStatus = 0; } } } xf86-video-intel-2.99.917/src/uxa/i965_render.c0000664000175000017500000026311212432737457015535 00000000000000/* * Copyright © 2006,2008 Intel Corporation * Copyright © 2007 Red Hat, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Wang Zhenyu * Eric Anholt * Carl Worth * Keith Packard * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include "xorg-server.h" #include "xf86.h" #include "intel.h" #include "intel_uxa.h" #include "i830_reg.h" #include "i965_reg.h" /* bring in brw structs */ #include "brw_defines.h" #include "brw_structs.h" // refer vol2, 3d rasterization 3.8.1 /* defined in brw_defines.h */ static const struct blendinfo { Bool dst_alpha; Bool src_alpha; uint32_t src_blend; uint32_t dst_blend; } i965_blend_op[] = { /* Clear */ {0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ZERO}, /* Src */ {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ZERO}, /* Dst */ {0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ONE}, /* Over */ {0, 1, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_INV_SRC_ALPHA}, /* OverReverse */ {1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ONE}, /* In */ {1, 0, BRW_BLENDFACTOR_DST_ALPHA, BRW_BLENDFACTOR_ZERO}, /* InReverse */ {0, 1, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_SRC_ALPHA}, /* Out */ {1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ZERO}, /* OutReverse */ {0, 1, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_INV_SRC_ALPHA}, /* Atop */ {1, 1, BRW_BLENDFACTOR_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA}, /* AtopReverse */ {1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_SRC_ALPHA}, /* Xor */ {1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA}, /* Add */ {0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ONE}, }; /** * Highest-valued BLENDFACTOR used in i965_blend_op. * * This leaves out BRW_BLENDFACTOR_INV_DST_COLOR, * BRW_BLENDFACTOR_INV_CONST_{COLOR,ALPHA}, * BRW_BLENDFACTOR_INV_SRC1_{COLOR,ALPHA} */ #define BRW_BLENDFACTOR_COUNT (BRW_BLENDFACTOR_INV_DST_ALPHA + 1) /* FIXME: surface format defined in brw_defines.h, shared Sampling engine * 1.7.2 */ static const struct formatinfo { int fmt; uint32_t card_fmt; } i965_tex_formats[] = { {PICT_a8, BRW_SURFACEFORMAT_A8_UNORM}, {PICT_a8r8g8b8, BRW_SURFACEFORMAT_B8G8R8A8_UNORM}, {PICT_x8r8g8b8, BRW_SURFACEFORMAT_B8G8R8X8_UNORM}, {PICT_a8b8g8r8, BRW_SURFACEFORMAT_R8G8B8A8_UNORM}, {PICT_x8b8g8r8, BRW_SURFACEFORMAT_R8G8B8X8_UNORM}, {PICT_r8g8b8, BRW_SURFACEFORMAT_R8G8B8_UNORM}, {PICT_r5g6b5, BRW_SURFACEFORMAT_B5G6R5_UNORM}, {PICT_a1r5g5b5, BRW_SURFACEFORMAT_B5G5R5A1_UNORM}, #if XORG_VERSION_CURRENT >= 10699900 {PICT_a2r10g10b10, BRW_SURFACEFORMAT_B10G10R10A2_UNORM}, {PICT_x2r10g10b10, BRW_SURFACEFORMAT_B10G10R10X2_UNORM}, {PICT_a2b10g10r10, BRW_SURFACEFORMAT_R10G10B10A2_UNORM}, {PICT_x2r10g10b10, BRW_SURFACEFORMAT_B10G10R10X2_UNORM}, #endif {PICT_a4r4g4b4, BRW_SURFACEFORMAT_B4G4R4A4_UNORM}, }; static void i965_get_blend_cntl(int op, PicturePtr mask, uint32_t dst_format, uint32_t * sblend, uint32_t * dblend) { *sblend = i965_blend_op[op].src_blend; *dblend = i965_blend_op[op].dst_blend; /* If there's no dst alpha channel, adjust the blend op so that we'll treat * it as always 1. */ if (PICT_FORMAT_A(dst_format) == 0 && i965_blend_op[op].dst_alpha) { if (*sblend == BRW_BLENDFACTOR_DST_ALPHA) *sblend = BRW_BLENDFACTOR_ONE; else if (*sblend == BRW_BLENDFACTOR_INV_DST_ALPHA) *sblend = BRW_BLENDFACTOR_ZERO; } /* If the source alpha is being used, then we should only be in a case where * the source blend factor is 0, and the source blend value is the mask * channels multiplied by the source picture's alpha. */ if (mask && mask->componentAlpha && PICT_FORMAT_RGB(mask->format) && i965_blend_op[op].src_alpha) { if (*dblend == BRW_BLENDFACTOR_SRC_ALPHA) { *dblend = BRW_BLENDFACTOR_SRC_COLOR; } else if (*dblend == BRW_BLENDFACTOR_INV_SRC_ALPHA) { *dblend = BRW_BLENDFACTOR_INV_SRC_COLOR; } } } static uint32_t i965_get_dest_format(PicturePtr dest_picture) { switch (dest_picture->format) { case PICT_a8r8g8b8: case PICT_x8r8g8b8: return BRW_SURFACEFORMAT_B8G8R8A8_UNORM; case PICT_a8b8g8r8: case PICT_x8b8g8r8: return BRW_SURFACEFORMAT_R8G8B8A8_UNORM; #if XORG_VERSION_CURRENT >= 10699900 case PICT_a2r10g10b10: case PICT_x2r10g10b10: return BRW_SURFACEFORMAT_B10G10R10A2_UNORM; #endif case PICT_r5g6b5: return BRW_SURFACEFORMAT_B5G6R5_UNORM; case PICT_x1r5g5b5: case PICT_a1r5g5b5: return BRW_SURFACEFORMAT_B5G5R5A1_UNORM; case PICT_a8: return BRW_SURFACEFORMAT_A8_UNORM; case PICT_a4r4g4b4: case PICT_x4r4g4b4: return BRW_SURFACEFORMAT_B4G4R4A4_UNORM; default: return -1; } } Bool i965_check_composite(int op, PicturePtr source_picture, PicturePtr mask_picture, PicturePtr dest_picture, int width, int height) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest_picture->pDrawable->pScreen); /* Check for unsupported compositing operations. */ if (op >= sizeof(i965_blend_op) / sizeof(i965_blend_op[0])) { intel_uxa_debug_fallback(scrn, "Unsupported Composite op 0x%x\n", op); return FALSE; } if (mask_picture && mask_picture->componentAlpha && PICT_FORMAT_RGB(mask_picture->format)) { /* Check if it's component alpha that relies on a source alpha and on * the source value. We can only get one of those into the single * source value that we get to blend with. */ if (i965_blend_op[op].src_alpha && (i965_blend_op[op].src_blend != BRW_BLENDFACTOR_ZERO)) { intel_uxa_debug_fallback(scrn, "Component alpha not supported " "with source alpha and source " "value blending.\n"); return FALSE; } } if (i965_get_dest_format(dest_picture) == -1) { intel_uxa_debug_fallback(scrn, "Usupported Color buffer format 0x%x\n", (int)dest_picture->format); return FALSE; } return TRUE; } Bool i965_check_composite_texture(ScreenPtr screen, PicturePtr picture) { if (picture->repeatType > RepeatReflect) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_uxa_debug_fallback(scrn, "extended repeat (%d) not supported\n", picture->repeatType); return FALSE; } if (picture->filter != PictFilterNearest && picture->filter != PictFilterBilinear) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_uxa_debug_fallback(scrn, "Unsupported filter 0x%x\n", picture->filter); return FALSE; } if (picture->pDrawable) { int w, h, i; w = picture->pDrawable->width; h = picture->pDrawable->height; if ((w > 8192) || (h > 8192)) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_uxa_debug_fallback(scrn, "Picture w/h too large (%dx%d)\n", w, h); return FALSE; } for (i = 0; i < sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]); i++) { if (i965_tex_formats[i].fmt == picture->format) break; } if (i == sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0])) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_uxa_debug_fallback(scrn, "Unsupported picture format " "0x%x\n", (int)picture->format); return FALSE; } return TRUE; } return FALSE; } #define BRW_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1) /* Set up a default static partitioning of the URB, which is supposed to * allow anything we would want to do, at potentially lower performance. */ #define URB_CS_ENTRY_SIZE 0 #define URB_CS_ENTRIES 0 #define URB_VS_ENTRY_SIZE 1 // each 512-bit row #define URB_VS_ENTRIES 8 // we needs at least 8 entries #define URB_GS_ENTRY_SIZE 0 #define URB_GS_ENTRIES 0 #define URB_CLIP_ENTRY_SIZE 0 #define URB_CLIP_ENTRIES 0 #define URB_SF_ENTRY_SIZE 2 #define URB_SF_ENTRIES 1 /* * this program computes dA/dx and dA/dy for the texture coordinates along * with the base texture coordinate. It was extracted from the Mesa driver */ #define SF_KERNEL_NUM_GRF 16 #define SF_MAX_THREADS 2 static const uint32_t sf_kernel_static[][4] = { #include "exa_sf.g4b" }; static const uint32_t sf_kernel_mask_static[][4] = { #include "exa_sf_mask.g4b" }; /* ps kernels */ #define PS_KERNEL_NUM_GRF 32 #define PS_MAX_THREADS 48 static const uint32_t ps_kernel_nomask_affine_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_nomask_projective_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_projective.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_maskca_affine_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_mask_affine.g4b" #include "exa_wm_mask_sample_argb.g4b" #include "exa_wm_ca.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_maskca_projective_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_projective.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_mask_projective.g4b" #include "exa_wm_mask_sample_argb.g4b" #include "exa_wm_ca.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_maskca_srcalpha_affine_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_a.g4b" #include "exa_wm_mask_affine.g4b" #include "exa_wm_mask_sample_argb.g4b" #include "exa_wm_ca_srcalpha.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_maskca_srcalpha_projective_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_projective.g4b" #include "exa_wm_src_sample_a.g4b" #include "exa_wm_mask_projective.g4b" #include "exa_wm_mask_sample_argb.g4b" #include "exa_wm_ca_srcalpha.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_masknoca_affine_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_mask_affine.g4b" #include "exa_wm_mask_sample_a.g4b" #include "exa_wm_noca.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_masknoca_projective_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_projective.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_mask_projective.g4b" #include "exa_wm_mask_sample_a.g4b" #include "exa_wm_noca.g4b" #include "exa_wm_write.g4b" }; /* new programs for Ironlake */ static const uint32_t sf_kernel_static_gen5[][4] = { #include "exa_sf.g4b.gen5" }; static const uint32_t sf_kernel_mask_static_gen5[][4] = { #include "exa_sf_mask.g4b.gen5" }; static const uint32_t ps_kernel_nomask_affine_static_gen5[][4] = { #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_affine.g4b.gen5" #include "exa_wm_src_sample_argb.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; static const uint32_t ps_kernel_nomask_projective_static_gen5[][4] = { #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_projective.g4b.gen5" #include "exa_wm_src_sample_argb.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; static const uint32_t ps_kernel_maskca_affine_static_gen5[][4] = { #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_affine.g4b.gen5" #include "exa_wm_src_sample_argb.g4b.gen5" #include "exa_wm_mask_affine.g4b.gen5" #include "exa_wm_mask_sample_argb.g4b.gen5" #include "exa_wm_ca.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; static const uint32_t ps_kernel_maskca_projective_static_gen5[][4] = { #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_projective.g4b.gen5" #include "exa_wm_src_sample_argb.g4b.gen5" #include "exa_wm_mask_projective.g4b.gen5" #include "exa_wm_mask_sample_argb.g4b.gen5" #include "exa_wm_ca.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; static const uint32_t ps_kernel_maskca_srcalpha_affine_static_gen5[][4] = { #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_affine.g4b.gen5" #include "exa_wm_src_sample_a.g4b.gen5" #include "exa_wm_mask_affine.g4b.gen5" #include "exa_wm_mask_sample_argb.g4b.gen5" #include "exa_wm_ca_srcalpha.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; static const uint32_t ps_kernel_maskca_srcalpha_projective_static_gen5[][4] = { #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_projective.g4b.gen5" #include "exa_wm_src_sample_a.g4b.gen5" #include "exa_wm_mask_projective.g4b.gen5" #include "exa_wm_mask_sample_argb.g4b.gen5" #include "exa_wm_ca_srcalpha.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; static const uint32_t ps_kernel_masknoca_affine_static_gen5[][4] = { #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_affine.g4b.gen5" #include "exa_wm_src_sample_argb.g4b.gen5" #include "exa_wm_mask_affine.g4b.gen5" #include "exa_wm_mask_sample_a.g4b.gen5" #include "exa_wm_noca.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; static const uint32_t ps_kernel_masknoca_projective_static_gen5[][4] = { #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_projective.g4b.gen5" #include "exa_wm_src_sample_argb.g4b.gen5" #include "exa_wm_mask_projective.g4b.gen5" #include "exa_wm_mask_sample_a.g4b.gen5" #include "exa_wm_noca.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; /* programs for GEN6 */ static const uint32_t ps_kernel_nomask_affine_static_gen6[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_nomask_projective_static_gen6[][4] = { #include "exa_wm_src_projective.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_maskca_affine_static_gen6[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_mask_affine.g6b" #include "exa_wm_mask_sample_argb.g6b" #include "exa_wm_ca.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_maskca_projective_static_gen6[][4] = { #include "exa_wm_src_projective.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_mask_projective.g6b" #include "exa_wm_mask_sample_argb.g6b" #include "exa_wm_ca.g4b.gen5" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_maskca_srcalpha_affine_static_gen6[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_a.g6b" #include "exa_wm_mask_affine.g6b" #include "exa_wm_mask_sample_argb.g6b" #include "exa_wm_ca_srcalpha.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_maskca_srcalpha_projective_static_gen6[][4] = { #include "exa_wm_src_projective.g6b" #include "exa_wm_src_sample_a.g6b" #include "exa_wm_mask_projective.g6b" #include "exa_wm_mask_sample_argb.g6b" #include "exa_wm_ca_srcalpha.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_masknoca_affine_static_gen6[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_mask_affine.g6b" #include "exa_wm_mask_sample_a.g6b" #include "exa_wm_noca.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_masknoca_projective_static_gen6[][4] = { #include "exa_wm_src_projective.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_mask_projective.g6b" #include "exa_wm_mask_sample_a.g6b" #include "exa_wm_noca.g6b" #include "exa_wm_write.g6b" }; /* programs for GEN7 */ static const uint32_t ps_kernel_nomask_affine_static_gen7[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_nomask_projective_static_gen7[][4] = { #include "exa_wm_src_projective.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_maskca_affine_static_gen7[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_mask_affine.g7b" #include "exa_wm_mask_sample_argb.g7b" #include "exa_wm_ca.g6b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_maskca_projective_static_gen7[][4] = { #include "exa_wm_src_projective.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_mask_projective.g7b" #include "exa_wm_mask_sample_argb.g7b" #include "exa_wm_ca.g4b.gen5" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_maskca_srcalpha_affine_static_gen7[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_a.g7b" #include "exa_wm_mask_affine.g7b" #include "exa_wm_mask_sample_argb.g7b" #include "exa_wm_ca_srcalpha.g6b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_maskca_srcalpha_projective_static_gen7[][4] = { #include "exa_wm_src_projective.g7b" #include "exa_wm_src_sample_a.g7b" #include "exa_wm_mask_projective.g7b" #include "exa_wm_mask_sample_argb.g7b" #include "exa_wm_ca_srcalpha.g6b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_masknoca_affine_static_gen7[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_mask_affine.g7b" #include "exa_wm_mask_sample_a.g7b" #include "exa_wm_noca.g6b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_masknoca_projective_static_gen7[][4] = { #include "exa_wm_src_projective.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_mask_projective.g7b" #include "exa_wm_mask_sample_a.g7b" #include "exa_wm_noca.g6b" #include "exa_wm_write.g7b" }; typedef enum { SS_INVALID_FILTER = -1, SS_FILTER_NEAREST, SS_FILTER_BILINEAR, FILTER_COUNT, } sampler_state_filter_t; typedef enum { SS_INVALID_EXTEND = -1, SS_EXTEND_NONE, SS_EXTEND_REPEAT, SS_EXTEND_PAD, SS_EXTEND_REFLECT, EXTEND_COUNT, } sampler_state_extend_t; typedef enum { WM_KERNEL_NOMASK_AFFINE, WM_KERNEL_NOMASK_PROJECTIVE, WM_KERNEL_MASKCA_AFFINE, WM_KERNEL_MASKCA_PROJECTIVE, WM_KERNEL_MASKCA_SRCALPHA_AFFINE, WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE, WM_KERNEL_MASKNOCA_AFFINE, WM_KERNEL_MASKNOCA_PROJECTIVE, KERNEL_COUNT } wm_kernel_t; #define KERNEL(kernel_enum, kernel, masked) \ [kernel_enum] = {&kernel, sizeof(kernel), masked} struct wm_kernel_info { const void *data; unsigned int size; Bool has_mask; }; static const struct wm_kernel_info wm_kernels_gen4[] = { KERNEL(WM_KERNEL_NOMASK_AFFINE, ps_kernel_nomask_affine_static, FALSE), KERNEL(WM_KERNEL_NOMASK_PROJECTIVE, ps_kernel_nomask_projective_static, FALSE), KERNEL(WM_KERNEL_MASKCA_AFFINE, ps_kernel_maskca_affine_static, TRUE), KERNEL(WM_KERNEL_MASKCA_PROJECTIVE, ps_kernel_maskca_projective_static, TRUE), KERNEL(WM_KERNEL_MASKCA_SRCALPHA_AFFINE, ps_kernel_maskca_srcalpha_affine_static, TRUE), KERNEL(WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE, ps_kernel_maskca_srcalpha_projective_static, TRUE), KERNEL(WM_KERNEL_MASKNOCA_AFFINE, ps_kernel_masknoca_affine_static, TRUE), KERNEL(WM_KERNEL_MASKNOCA_PROJECTIVE, ps_kernel_masknoca_projective_static, TRUE), }; static const struct wm_kernel_info wm_kernels_gen5[] = { KERNEL(WM_KERNEL_NOMASK_AFFINE, ps_kernel_nomask_affine_static_gen5, FALSE), KERNEL(WM_KERNEL_NOMASK_PROJECTIVE, ps_kernel_nomask_projective_static_gen5, FALSE), KERNEL(WM_KERNEL_MASKCA_AFFINE, ps_kernel_maskca_affine_static_gen5, TRUE), KERNEL(WM_KERNEL_MASKCA_PROJECTIVE, ps_kernel_maskca_projective_static_gen5, TRUE), KERNEL(WM_KERNEL_MASKCA_SRCALPHA_AFFINE, ps_kernel_maskca_srcalpha_affine_static_gen5, TRUE), KERNEL(WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE, ps_kernel_maskca_srcalpha_projective_static_gen5, TRUE), KERNEL(WM_KERNEL_MASKNOCA_AFFINE, ps_kernel_masknoca_affine_static_gen5, TRUE), KERNEL(WM_KERNEL_MASKNOCA_PROJECTIVE, ps_kernel_masknoca_projective_static_gen5, TRUE), }; static const struct wm_kernel_info wm_kernels_gen6[] = { KERNEL(WM_KERNEL_NOMASK_AFFINE, ps_kernel_nomask_affine_static_gen6, FALSE), KERNEL(WM_KERNEL_NOMASK_PROJECTIVE, ps_kernel_nomask_projective_static_gen6, FALSE), KERNEL(WM_KERNEL_MASKCA_AFFINE, ps_kernel_maskca_affine_static_gen6, TRUE), KERNEL(WM_KERNEL_MASKCA_PROJECTIVE, ps_kernel_maskca_projective_static_gen6, TRUE), KERNEL(WM_KERNEL_MASKCA_SRCALPHA_AFFINE, ps_kernel_maskca_srcalpha_affine_static_gen6, TRUE), KERNEL(WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE, ps_kernel_maskca_srcalpha_projective_static_gen6, TRUE), KERNEL(WM_KERNEL_MASKNOCA_AFFINE, ps_kernel_masknoca_affine_static_gen6, TRUE), KERNEL(WM_KERNEL_MASKNOCA_PROJECTIVE, ps_kernel_masknoca_projective_static_gen6, TRUE), }; static const struct wm_kernel_info wm_kernels_gen7[] = { KERNEL(WM_KERNEL_NOMASK_AFFINE, ps_kernel_nomask_affine_static_gen7, FALSE), KERNEL(WM_KERNEL_NOMASK_PROJECTIVE, ps_kernel_nomask_projective_static_gen7, FALSE), KERNEL(WM_KERNEL_MASKCA_AFFINE, ps_kernel_maskca_affine_static_gen7, TRUE), KERNEL(WM_KERNEL_MASKCA_PROJECTIVE, ps_kernel_maskca_projective_static_gen7, TRUE), KERNEL(WM_KERNEL_MASKCA_SRCALPHA_AFFINE, ps_kernel_maskca_srcalpha_affine_static_gen7, TRUE), KERNEL(WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE, ps_kernel_maskca_srcalpha_projective_static_gen7, TRUE), KERNEL(WM_KERNEL_MASKNOCA_AFFINE, ps_kernel_masknoca_affine_static_gen7, TRUE), KERNEL(WM_KERNEL_MASKNOCA_PROJECTIVE, ps_kernel_masknoca_projective_static_gen7, TRUE), }; #undef KERNEL typedef struct _brw_cc_unit_state_padded { struct brw_cc_unit_state state; char pad[64 - sizeof(struct brw_cc_unit_state)]; } brw_cc_unit_state_padded; #ifndef MAX #define MAX(a, b) ((a) > (b) ? (a) : (b)) #endif #define SURFACE_STATE_PADDED_SIZE ALIGN(MAX(sizeof(struct brw_surface_state), sizeof(struct gen7_surface_state)), 32) struct gen4_cc_unit_state { /* Index by [src_blend][dst_blend] */ brw_cc_unit_state_padded cc_state[BRW_BLENDFACTOR_COUNT][BRW_BLENDFACTOR_COUNT]; }; typedef struct gen4_composite_op { int op; sampler_state_filter_t src_filter; sampler_state_filter_t mask_filter; sampler_state_extend_t src_extend; sampler_state_extend_t mask_extend; Bool is_affine; wm_kernel_t wm_kernel; int vertex_id; } gen4_composite_op; /** Private data for gen4 render accel implementation. */ struct gen4_render_state { drm_intel_bo *vs_state_bo; drm_intel_bo *sf_state_bo; drm_intel_bo *sf_mask_state_bo; drm_intel_bo *cc_state_bo; drm_intel_bo *wm_state_bo[KERNEL_COUNT] [FILTER_COUNT] [EXTEND_COUNT] [FILTER_COUNT] [EXTEND_COUNT]; drm_intel_bo *wm_kernel_bo[KERNEL_COUNT]; drm_intel_bo *cc_vp_bo; drm_intel_bo *gen6_blend_bo; drm_intel_bo *gen6_depth_stencil_bo; drm_intel_bo *ps_sampler_state_bo[FILTER_COUNT] [EXTEND_COUNT] [FILTER_COUNT] [EXTEND_COUNT]; gen4_composite_op composite_op; }; static void gen6_emit_composite_state(struct intel_screen_private *intel); static void gen6_render_state_init(ScrnInfoPtr scrn); /** * Sets up the SF state pointing at an SF kernel. * * The SF kernel does coord interp: for each attribute, * calculate dA/dx and dA/dy. Hand these interpolation coefficients * back to SF which then hands pixels off to WM. */ static drm_intel_bo *gen4_create_sf_state(intel_screen_private *intel, drm_intel_bo * kernel_bo) { struct brw_sf_unit_state *sf_state; drm_intel_bo *sf_state_bo; int ret; sf_state_bo = drm_intel_bo_alloc(intel->bufmgr, "gen4 SF state", sizeof(*sf_state), 4096); assert(sf_state_bo); ret = drm_intel_bo_map(sf_state_bo, TRUE); assert(ret == 0); sf_state = memset(sf_state_bo->virtual, 0, sizeof(*sf_state)); sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF); sf_state->thread0.kernel_start_pointer = intel_uxa_emit_reloc(sf_state_bo, offsetof(struct brw_sf_unit_state, thread0), kernel_bo, sf_state->thread0.grf_reg_count << 1, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6; sf_state->sf1.single_program_flow = 1; sf_state->sf1.binding_table_entry_count = 0; sf_state->sf1.thread_priority = 0; sf_state->sf1.floating_point_mode = 0; /* Mesa does this */ sf_state->sf1.illegal_op_exception_enable = 1; sf_state->sf1.mask_stack_exception_enable = 1; sf_state->sf1.sw_exception_enable = 1; sf_state->thread2.per_thread_scratch_space = 0; /* scratch space is not used in our kernel */ sf_state->thread2.scratch_space_base_pointer = 0; sf_state->thread3.const_urb_entry_read_length = 0; /* no const URBs */ sf_state->thread3.const_urb_entry_read_offset = 0; /* no const URBs */ sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */ /* don't smash vertex header, read start from dw8 */ sf_state->thread3.urb_entry_read_offset = 1; sf_state->thread3.dispatch_grf_start_reg = 3; sf_state->thread4.max_threads = SF_MAX_THREADS - 1; sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1; sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES; sf_state->sf5.viewport_transform = FALSE; /* skip viewport */ sf_state->sf6.cull_mode = BRW_CULLMODE_NONE; sf_state->sf6.scissor = 0; sf_state->sf7.trifan_pv = 2; sf_state->sf6.dest_org_vbias = 0x8; sf_state->sf6.dest_org_hbias = 0x8; drm_intel_bo_unmap(sf_state_bo); return sf_state_bo; (void)ret; } static drm_intel_bo *sampler_border_color_create(intel_screen_private *intel) { struct brw_sampler_legacy_border_color sampler_border_color; /* Set up the sampler border color (always transparent black) */ memset(&sampler_border_color, 0, sizeof(sampler_border_color)); sampler_border_color.color[0] = 0; /* R */ sampler_border_color.color[1] = 0; /* G */ sampler_border_color.color[2] = 0; /* B */ sampler_border_color.color[3] = 0; /* A */ return intel_uxa_bo_alloc_for_data(intel, &sampler_border_color, sizeof(sampler_border_color), "gen4 render sampler border color"); } static void gen4_sampler_state_init(drm_intel_bo * sampler_state_bo, struct brw_sampler_state *sampler_state, sampler_state_filter_t filter, sampler_state_extend_t extend, drm_intel_bo * border_color_bo) { uint32_t sampler_state_offset; sampler_state_offset = (char *)sampler_state - (char *)sampler_state_bo->virtual; /* PS kernel use this sampler */ memset(sampler_state, 0, sizeof(*sampler_state)); sampler_state->ss0.lod_preclamp = 1; /* GL mode */ /* We use the legacy mode to get the semantics specified by * the Render extension. */ sampler_state->ss0.border_color_mode = BRW_BORDER_COLOR_MODE_LEGACY; switch (filter) { default: case SS_FILTER_NEAREST: sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST; sampler_state->ss0.mag_filter = BRW_MAPFILTER_NEAREST; break; case SS_FILTER_BILINEAR: sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR; sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR; break; } switch (extend) { default: case SS_EXTEND_NONE: sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER; break; case SS_EXTEND_REPEAT: sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP; sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_WRAP; sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP; break; case SS_EXTEND_PAD: sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP; sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP; sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP; break; case SS_EXTEND_REFLECT: sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_MIRROR; sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_MIRROR; sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_MIRROR; break; } sampler_state->ss2.border_color_pointer = intel_uxa_emit_reloc(sampler_state_bo, sampler_state_offset + offsetof(struct brw_sampler_state, ss2), border_color_bo, 0, I915_GEM_DOMAIN_SAMPLER, 0) >> 5; sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */ } static void gen7_sampler_state_init(drm_intel_bo * sampler_state_bo, struct gen7_sampler_state *sampler_state, sampler_state_filter_t filter, sampler_state_extend_t extend, drm_intel_bo * border_color_bo) { uint32_t sampler_state_offset; sampler_state_offset = (char *)sampler_state - (char *)sampler_state_bo->virtual; /* PS kernel use this sampler */ memset(sampler_state, 0, sizeof(*sampler_state)); sampler_state->ss0.lod_preclamp = 1; /* GL mode */ /* We use the legacy mode to get the semantics specified by * the Render extension. */ sampler_state->ss0.default_color_mode = BRW_BORDER_COLOR_MODE_LEGACY; switch (filter) { default: case SS_FILTER_NEAREST: sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST; sampler_state->ss0.mag_filter = BRW_MAPFILTER_NEAREST; break; case SS_FILTER_BILINEAR: sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR; sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR; break; } switch (extend) { default: case SS_EXTEND_NONE: sampler_state->ss3.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss3.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss3.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER; break; case SS_EXTEND_REPEAT: sampler_state->ss3.r_wrap_mode = BRW_TEXCOORDMODE_WRAP; sampler_state->ss3.s_wrap_mode = BRW_TEXCOORDMODE_WRAP; sampler_state->ss3.t_wrap_mode = BRW_TEXCOORDMODE_WRAP; break; case SS_EXTEND_PAD: sampler_state->ss3.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP; sampler_state->ss3.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP; sampler_state->ss3.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP; break; case SS_EXTEND_REFLECT: sampler_state->ss3.r_wrap_mode = BRW_TEXCOORDMODE_MIRROR; sampler_state->ss3.s_wrap_mode = BRW_TEXCOORDMODE_MIRROR; sampler_state->ss3.t_wrap_mode = BRW_TEXCOORDMODE_MIRROR; break; } sampler_state->ss2.default_color_pointer = intel_uxa_emit_reloc(sampler_state_bo, sampler_state_offset + offsetof(struct gen7_sampler_state, ss2), border_color_bo, 0, I915_GEM_DOMAIN_SAMPLER, 0) >> 5; sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */ } static drm_intel_bo *gen4_create_sampler_state(intel_screen_private *intel, sampler_state_filter_t src_filter, sampler_state_extend_t src_extend, sampler_state_filter_t mask_filter, sampler_state_extend_t mask_extend, drm_intel_bo * border_color_bo) { drm_intel_bo *sampler_state_bo; struct brw_sampler_state *sampler_state; int ret; sampler_state_bo = drm_intel_bo_alloc(intel->bufmgr, "gen4 sampler state", sizeof(struct brw_sampler_state) * 2, 4096); assert(sampler_state_bo); ret = drm_intel_bo_map(sampler_state_bo, TRUE); assert(ret == 0); sampler_state = sampler_state_bo->virtual; gen4_sampler_state_init(sampler_state_bo, &sampler_state[0], src_filter, src_extend, border_color_bo); gen4_sampler_state_init(sampler_state_bo, &sampler_state[1], mask_filter, mask_extend, border_color_bo); drm_intel_bo_unmap(sampler_state_bo); return sampler_state_bo; (void)ret; } static drm_intel_bo * gen7_create_sampler_state(intel_screen_private *intel, sampler_state_filter_t src_filter, sampler_state_extend_t src_extend, sampler_state_filter_t mask_filter, sampler_state_extend_t mask_extend, drm_intel_bo * border_color_bo) { drm_intel_bo *sampler_state_bo; struct gen7_sampler_state *sampler_state; int ret; sampler_state_bo = drm_intel_bo_alloc(intel->bufmgr, "gen7 sampler state", sizeof(struct gen7_sampler_state) * 2, 4096); assert(sampler_state_bo); ret = drm_intel_bo_map(sampler_state_bo, TRUE); assert(ret == 0); sampler_state = sampler_state_bo->virtual; gen7_sampler_state_init(sampler_state_bo, &sampler_state[0], src_filter, src_extend, border_color_bo); gen7_sampler_state_init(sampler_state_bo, &sampler_state[1], mask_filter, mask_extend, border_color_bo); drm_intel_bo_unmap(sampler_state_bo); return sampler_state_bo; (void)ret; } static inline drm_intel_bo * i965_create_sampler_state(intel_screen_private *intel, sampler_state_filter_t src_filter, sampler_state_extend_t src_extend, sampler_state_filter_t mask_filter, sampler_state_extend_t mask_extend, drm_intel_bo * border_color_bo) { if (INTEL_INFO(intel)->gen < 070) return gen4_create_sampler_state(intel, src_filter, src_extend, mask_filter, mask_extend, border_color_bo); return gen7_create_sampler_state(intel, src_filter, src_extend, mask_filter, mask_extend, border_color_bo); } static void cc_state_init(drm_intel_bo * cc_state_bo, uint32_t cc_state_offset, int src_blend, int dst_blend, drm_intel_bo * cc_vp_bo) { struct brw_cc_unit_state *cc_state; cc_state = (struct brw_cc_unit_state *)((char *)cc_state_bo->virtual + cc_state_offset); memset(cc_state, 0, sizeof(*cc_state)); cc_state->cc0.stencil_enable = 0; /* disable stencil */ cc_state->cc2.depth_test = 0; /* disable depth test */ cc_state->cc2.logicop_enable = 0; /* disable logic op */ cc_state->cc3.ia_blend_enable = 0; /* blend alpha same as colors */ cc_state->cc3.blend_enable = 1; /* enable color blend */ cc_state->cc3.alpha_test = 0; /* disable alpha test */ cc_state->cc4.cc_viewport_state_offset = intel_uxa_emit_reloc(cc_state_bo, cc_state_offset + offsetof(struct brw_cc_unit_state, cc4), cc_vp_bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5; cc_state->cc5.dither_enable = 0; /* disable dither */ cc_state->cc5.logicop_func = 0xc; /* COPY */ cc_state->cc5.statistics_enable = 1; cc_state->cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD; /* Fill in alpha blend factors same as color, for the future. */ cc_state->cc5.ia_src_blend_factor = src_blend; cc_state->cc5.ia_dest_blend_factor = dst_blend; cc_state->cc6.blend_function = BRW_BLENDFUNCTION_ADD; cc_state->cc6.clamp_post_alpha_blend = 1; cc_state->cc6.clamp_pre_alpha_blend = 1; cc_state->cc6.clamp_range = 0; /* clamp range [0,1] */ cc_state->cc6.src_blend_factor = src_blend; cc_state->cc6.dest_blend_factor = dst_blend; } static drm_intel_bo *gen4_create_wm_state(intel_screen_private *intel, Bool has_mask, drm_intel_bo * kernel_bo, drm_intel_bo * sampler_bo) { struct brw_wm_unit_state *state; drm_intel_bo *wm_state_bo; int ret; wm_state_bo = drm_intel_bo_alloc(intel->bufmgr, "gen4 WM state", sizeof(*state), 4096); assert(wm_state_bo); ret = drm_intel_bo_map(wm_state_bo, TRUE); assert(ret == 0); state = memset(wm_state_bo->virtual, 0, sizeof(*state)); state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF); state->thread0.kernel_start_pointer = intel_uxa_emit_reloc(wm_state_bo, offsetof(struct brw_wm_unit_state, thread0), kernel_bo, state->thread0.grf_reg_count << 1, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6; state->thread1.single_program_flow = 0; /* scratch space is not used in our kernel */ state->thread2.scratch_space_base_pointer = 0; state->thread2.per_thread_scratch_space = 0; state->thread3.const_urb_entry_read_length = 0; state->thread3.const_urb_entry_read_offset = 0; state->thread3.urb_entry_read_offset = 0; /* wm kernel use urb from 3, see wm_program in compiler module */ state->thread3.dispatch_grf_start_reg = 3; /* must match kernel */ if (IS_GEN5(intel)) state->wm4.sampler_count = 0; /* hardware requirement */ else state->wm4.sampler_count = 1; /* 1-4 samplers used */ state->wm4.sampler_state_pointer = intel_uxa_emit_reloc(wm_state_bo, offsetof(struct brw_wm_unit_state, wm4), sampler_bo, state->wm4.sampler_count << 2, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5; state->wm5.max_threads = PS_MAX_THREADS - 1; state->wm5.transposed_urb_read = 0; state->wm5.thread_dispatch_enable = 1; /* just use 16-pixel dispatch (4 subspans), don't need to change kernel * start point */ state->wm5.enable_16_pix = 1; state->wm5.enable_8_pix = 0; state->wm5.early_depth_test = 1; /* Each pair of attributes (src/mask coords) is two URB entries */ if (has_mask) { state->thread1.binding_table_entry_count = 3; /* 2 tex and fb */ state->thread3.urb_entry_read_length = 4; } else { state->thread1.binding_table_entry_count = 2; /* 1 tex and fb */ state->thread3.urb_entry_read_length = 2; } /* binding table entry count is only used for prefetching, and it has to * be set 0 for Ironlake */ if (IS_GEN5(intel)) state->thread1.binding_table_entry_count = 0; drm_intel_bo_unmap(wm_state_bo); return wm_state_bo; (void)ret; } static drm_intel_bo *gen4_create_cc_viewport(intel_screen_private *intel) { drm_intel_bo *bo; struct brw_cc_viewport vp; int ret; vp.min_depth = -1.e35; vp.max_depth = 1.e35; bo = drm_intel_bo_alloc(intel->bufmgr, "gen4 render unit state", sizeof(vp), 4096); assert(bo); ret = drm_intel_bo_subdata(bo, 0, sizeof(vp), &vp); assert(ret == 0); return bo; (void)ret; } static drm_intel_bo *gen4_create_vs_unit_state(intel_screen_private *intel) { struct brw_vs_unit_state vs_state; memset(&vs_state, 0, sizeof(vs_state)); /* Set up the vertex shader to be disabled (passthrough) */ if (IS_GEN5(intel)) vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; /* hardware requirement */ else vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES; vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1; vs_state.vs6.vs_enable = 0; vs_state.vs6.vert_cache_disable = 1; return intel_uxa_bo_alloc_for_data(intel, &vs_state, sizeof(vs_state), "gen4 render VS state"); } /** * Set up all combinations of cc state: each blendfactor for source and * dest. */ static drm_intel_bo *gen4_create_cc_unit_state(intel_screen_private *intel) { drm_intel_bo *cc_state_bo, *cc_vp_bo; int i, j, ret; cc_vp_bo = gen4_create_cc_viewport(intel); cc_state_bo = drm_intel_bo_alloc(intel->bufmgr, "gen4 CC state", sizeof(struct gen4_cc_unit_state), 4096); assert(cc_state_bo); ret = drm_intel_bo_map(cc_state_bo, TRUE); assert(ret == 0); for (i = 0; i < BRW_BLENDFACTOR_COUNT; i++) { for (j = 0; j < BRW_BLENDFACTOR_COUNT; j++) { cc_state_init(cc_state_bo, offsetof(struct gen4_cc_unit_state, cc_state[i][j].state), i, j, cc_vp_bo); } } drm_intel_bo_unmap(cc_state_bo); drm_intel_bo_unreference(cc_vp_bo); return cc_state_bo; (void)ret; } static uint32_t i965_get_card_format(PicturePtr picture) { unsigned i; for (i = 0; i < sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]); i++) if (i965_tex_formats[i].fmt == picture->format) return i965_tex_formats[i].card_fmt; assert(i != sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0])); return 0; } static sampler_state_filter_t sampler_state_filter_from_picture(int filter) { switch (filter) { case PictFilterNearest: return SS_FILTER_NEAREST; case PictFilterBilinear: return SS_FILTER_BILINEAR; default: return SS_INVALID_FILTER; } } static sampler_state_extend_t sampler_state_extend_from_picture(int repeat_type) { switch (repeat_type) { case RepeatNone: return SS_EXTEND_NONE; case RepeatNormal: return SS_EXTEND_REPEAT; case RepeatPad: return SS_EXTEND_PAD; case RepeatReflect: return SS_EXTEND_REFLECT; default: return SS_INVALID_EXTEND; } } /** * Sets up the common fields for a surface state buffer for the given * picture in the given surface state buffer. */ static int gen4_set_picture_surface_state(intel_screen_private *intel, PicturePtr picture, PixmapPtr pixmap, Bool is_dst) { struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap); struct brw_surface_state *ss; uint32_t write_domain, read_domains; int offset; if (is_dst) { write_domain = I915_GEM_DOMAIN_RENDER; read_domains = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domains = I915_GEM_DOMAIN_SAMPLER; } intel_batch_mark_pixmap_domains(intel, priv, read_domains, write_domain); ss = (struct brw_surface_state *) (intel->surface_data + intel->surface_used); memset(ss, 0, sizeof(*ss)); ss->ss0.surface_type = BRW_SURFACE_2D; if (is_dst) ss->ss0.surface_format = i965_get_dest_format(picture); else ss->ss0.surface_format = i965_get_card_format(picture); ss->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32; ss->ss0.color_blend = 1; ss->ss1.base_addr = priv->bo->offset; ss->ss2.height = pixmap->drawable.height - 1; ss->ss2.width = pixmap->drawable.width - 1; ss->ss3.pitch = intel_pixmap_pitch(pixmap) - 1; ss->ss3.tile_walk = 0; /* Tiled X */ ss->ss3.tiled_surface = intel_uxa_pixmap_tiled(pixmap) ? 1 : 0; dri_bo_emit_reloc(intel->surface_bo, read_domains, write_domain, 0, intel->surface_used + offsetof(struct brw_surface_state, ss1), priv->bo); offset = intel->surface_used; intel->surface_used += SURFACE_STATE_PADDED_SIZE; return offset; } static int gen7_set_picture_surface_state(intel_screen_private *intel, PicturePtr picture, PixmapPtr pixmap, Bool is_dst) { struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap); struct gen7_surface_state *ss; uint32_t write_domain, read_domains; int offset; if (is_dst) { write_domain = I915_GEM_DOMAIN_RENDER; read_domains = I915_GEM_DOMAIN_RENDER; } else { write_domain = 0; read_domains = I915_GEM_DOMAIN_SAMPLER; } intel_batch_mark_pixmap_domains(intel, priv, read_domains, write_domain); ss = (struct gen7_surface_state *) (intel->surface_data + intel->surface_used); memset(ss, 0, sizeof(*ss)); ss->ss0.surface_type = BRW_SURFACE_2D; if (is_dst) ss->ss0.surface_format = i965_get_dest_format(picture); else ss->ss0.surface_format = i965_get_card_format(picture); ss->ss0.tile_walk = 0; /* Tiled X */ ss->ss0.tiled_surface = intel_uxa_pixmap_tiled(pixmap) ? 1 : 0; ss->ss1.base_addr = priv->bo->offset; ss->ss2.height = pixmap->drawable.height - 1; ss->ss2.width = pixmap->drawable.width - 1; ss->ss3.pitch = intel_pixmap_pitch(pixmap) - 1; if (IS_HSW(intel)) { ss->ss7.shader_chanel_select_r = HSW_SCS_RED; ss->ss7.shader_chanel_select_g = HSW_SCS_GREEN; ss->ss7.shader_chanel_select_b = HSW_SCS_BLUE; ss->ss7.shader_chanel_select_a = HSW_SCS_ALPHA; } dri_bo_emit_reloc(intel->surface_bo, read_domains, write_domain, 0, intel->surface_used + offsetof(struct gen7_surface_state, ss1), priv->bo); offset = intel->surface_used; intel->surface_used += SURFACE_STATE_PADDED_SIZE; return offset; } static inline int i965_set_picture_surface_state(intel_screen_private *intel, PicturePtr picture, PixmapPtr pixmap, Bool is_dst) { if (INTEL_INFO(intel)->gen < 070) return gen4_set_picture_surface_state(intel, picture, pixmap, is_dst); return gen7_set_picture_surface_state(intel, picture, pixmap, is_dst); } static void gen4_composite_vertex_elements(struct intel_screen_private *intel) { struct gen4_render_state *render_state = intel->gen4_render_state; gen4_composite_op *composite_op = &render_state->composite_op; Bool has_mask = intel->render_mask != NULL; Bool is_affine = composite_op->is_affine; /* * number of extra parameters per vertex */ int nelem = has_mask ? 2 : 1; /* * size of extra parameters: * 3 for homogenous (xyzw) * 2 for cartesian (xy) */ int selem = is_affine ? 2 : 3; uint32_t w_component; uint32_t src_format; int id; id = has_mask << 1 | is_affine; if (composite_op->vertex_id == id) return; composite_op->vertex_id = id; if (is_affine) { src_format = BRW_SURFACEFORMAT_R32G32_FLOAT; w_component = BRW_VFCOMPONENT_STORE_1_FLT; } else { src_format = BRW_SURFACEFORMAT_R32G32B32_FLOAT; w_component = BRW_VFCOMPONENT_STORE_SRC; } if (IS_GEN5(intel)) { /* * The reason to add this extra vertex element in the header is that * Ironlake has different vertex header definition and origin method to * set destination element offset doesn't exist anymore, which means * hardware requires a predefined vertex element layout. * * haihao proposed this approach to fill the first vertex element, so * origin layout for Gen4 doesn't need to change, and origin shader * programs behavior is also kept. * * I think this is not bad. - zhenyu */ OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * (2 + nelem)) - 1)); OUT_BATCH((id << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); OUT_BATCH((BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT)); } else { /* Set up our vertex elements, sourced from the single vertex buffer. * that will be set up later. */ OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * (1 + nelem)) - 1)); } /* x,y */ OUT_BATCH((id << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); if (IS_GEN5(intel)) OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); else OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); /* u0, v0, w0 */ OUT_BATCH((id << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (src_format << VE0_FORMAT_SHIFT) | ((2 * 4) << VE0_OFFSET_SHIFT)); /* offset vb in bytes */ if (IS_GEN5(intel)) OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (w_component << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); else OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (w_component << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | ((4 + 4) << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); /* VUE offset in dwords */ /* u1, v1, w1 */ if (has_mask) { OUT_BATCH((id << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (src_format << VE0_FORMAT_SHIFT) | (((2 + selem) * 4) << VE0_OFFSET_SHIFT)); /* vb offset in bytes */ if (IS_GEN5(intel)) OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (w_component << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); else OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (w_component << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | ((4 + 4 + 4) << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); /* VUE offset in dwords */ } } static void i965_emit_composite_state(struct intel_screen_private *intel) { struct gen4_render_state *render_state = intel->gen4_render_state; gen4_composite_op *composite_op = &render_state->composite_op; int op = composite_op->op; PicturePtr mask_picture = intel->render_mask_picture; PicturePtr dest_picture = intel->render_dest_picture; PixmapPtr mask = intel->render_mask; PixmapPtr dest = intel->render_dest; sampler_state_filter_t src_filter = composite_op->src_filter; sampler_state_filter_t mask_filter = composite_op->mask_filter; sampler_state_extend_t src_extend = composite_op->src_extend; sampler_state_extend_t mask_extend = composite_op->mask_extend; uint32_t src_blend, dst_blend; intel->needs_render_state_emit = FALSE; /* Begin the long sequence of commands needed to set up the 3D * rendering pipe */ if (intel->needs_3d_invariant) { if (IS_GEN5(intel)) { /* Ironlake errata workaround: Before disabling the clipper, * you have to MI_FLUSH to get the pipeline idle. */ OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH); } /* Match Mesa driver setup */ if (INTEL_INFO(intel)->gen >= 045) OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D); else OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D); /* Set system instruction pointer */ OUT_BATCH(BRW_STATE_SIP | 0); OUT_BATCH(0); intel->needs_3d_invariant = FALSE; } if (intel->surface_reloc == 0) { /* Zero out the two base address registers so all offsets are * absolute. */ if (IS_GEN5(intel)) { OUT_BATCH(BRW_STATE_BASE_ADDRESS | 6); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* Generate state base address */ intel->surface_reloc = intel->batch_used; intel_batch_emit_dword(intel, intel->surface_bo->offset | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* media base addr, don't care */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* Instruction base address */ /* general state max addr, disabled */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* media object state max addr, disabled */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* Instruction max addr, disabled */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); } else { OUT_BATCH(BRW_STATE_BASE_ADDRESS | 4); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* Generate state base address */ intel->surface_reloc = intel->batch_used; intel_batch_emit_dword(intel, intel->surface_bo->offset | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* media base addr, don't care */ /* general state max addr, disabled */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* media object state max addr, disabled */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); } } i965_get_blend_cntl(op, mask_picture, dest_picture->format, &src_blend, &dst_blend); /* Binding table pointers */ OUT_BATCH(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4); OUT_BATCH(0); /* vs */ OUT_BATCH(0); /* gs */ OUT_BATCH(0); /* clip */ OUT_BATCH(0); /* sf */ /* Only the PS uses the binding table */ OUT_BATCH(intel->surface_table); /* The drawing rectangle clipping is always on. Set it to values that * shouldn't do any clipping. */ OUT_BATCH(BRW_3DSTATE_DRAWING_RECTANGLE | 2); OUT_BATCH(0x00000000); /* ymin, xmin */ OUT_BATCH(DRAW_YMAX(dest->drawable.height - 1) | DRAW_XMAX(dest->drawable.width - 1)); /* ymax, xmax */ OUT_BATCH(0x00000000); /* yorigin, xorigin */ /* skip the depth buffer */ /* skip the polygon stipple */ /* skip the polygon stipple offset */ /* skip the line stipple */ /* Set the pointers to the 3d pipeline state */ OUT_BATCH(BRW_3DSTATE_PIPELINED_POINTERS | 5); OUT_RELOC(render_state->vs_state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_BATCH(BRW_GS_DISABLE); /* disable GS, resulting in passthrough */ OUT_BATCH(BRW_CLIP_DISABLE); /* disable CLIP, resulting in passthrough */ if (mask) { OUT_RELOC(render_state->sf_mask_state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); } else { OUT_RELOC(render_state->sf_state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); } OUT_RELOC(render_state->wm_state_bo[composite_op->wm_kernel] [src_filter][src_extend] [mask_filter][mask_extend], I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_RELOC(render_state->cc_state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, offsetof(struct gen4_cc_unit_state, cc_state[src_blend][dst_blend])); { int urb_vs_start, urb_vs_size; int urb_gs_start, urb_gs_size; int urb_clip_start, urb_clip_size; int urb_sf_start, urb_sf_size; int urb_cs_start, urb_cs_size; urb_vs_start = 0; urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE; urb_gs_start = urb_vs_start + urb_vs_size; urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE; urb_clip_start = urb_gs_start + urb_gs_size; urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE; urb_sf_start = urb_clip_start + urb_clip_size; urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE; urb_cs_start = urb_sf_start + urb_sf_size; urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE; /* Erratum (Vol 1a, p32): * URB_FENCE must not cross a cache-line (64 bytes). */ if ((intel->batch_used & 15) > (16 - 3)) { int cnt = 16 - (intel->batch_used & 15); while (cnt--) OUT_BATCH(MI_NOOP); } OUT_BATCH(BRW_URB_FENCE | UF0_CS_REALLOC | UF0_SF_REALLOC | UF0_CLIP_REALLOC | UF0_GS_REALLOC | UF0_VS_REALLOC | 1); OUT_BATCH(((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) | ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) | ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT)); OUT_BATCH(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) | ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT)); /* Constant buffer state */ OUT_BATCH(BRW_CS_URB_STATE | 0); OUT_BATCH(((URB_CS_ENTRY_SIZE - 1) << 4) | (URB_CS_ENTRIES << 0)); } gen4_composite_vertex_elements(intel); } /** * Returns whether the current set of composite state plus vertex buffer is * expected to fit in the aperture. */ static Bool i965_composite_check_aperture(intel_screen_private *intel) { struct gen4_render_state *render_state = intel->gen4_render_state; gen4_composite_op *composite_op = &render_state->composite_op; drm_intel_bo *bo_table[] = { intel->batch_bo, intel->vertex_bo, intel->surface_bo, render_state->vs_state_bo, render_state->sf_state_bo, render_state->sf_mask_state_bo, render_state->wm_state_bo[composite_op->wm_kernel] [composite_op->src_filter] [composite_op->src_extend] [composite_op->mask_filter] [composite_op->mask_extend], render_state->cc_state_bo, }; drm_intel_bo *gen6_bo_table[] = { intel->batch_bo, intel->vertex_bo, intel->surface_bo, render_state->wm_kernel_bo[composite_op->wm_kernel], render_state->ps_sampler_state_bo[composite_op->src_filter] [composite_op->src_extend] [composite_op->mask_filter] [composite_op->mask_extend], render_state->cc_vp_bo, render_state->cc_state_bo, render_state->gen6_blend_bo, render_state->gen6_depth_stencil_bo, }; if (INTEL_INFO(intel)->gen >= 060) return drm_intel_bufmgr_check_aperture_space(gen6_bo_table, ARRAY_SIZE(gen6_bo_table)) == 0; else return drm_intel_bufmgr_check_aperture_space(bo_table, ARRAY_SIZE(bo_table)) == 0; } static void i965_surface_flush(struct intel_screen_private *intel) { int ret; ret = drm_intel_bo_subdata(intel->surface_bo, 0, intel->surface_used, intel->surface_data); assert(ret == 0); intel->surface_used = 0; assert (intel->surface_reloc != 0); drm_intel_bo_emit_reloc(intel->batch_bo, intel->surface_reloc * 4, intel->surface_bo, BASE_ADDRESS_MODIFY, I915_GEM_DOMAIN_INSTRUCTION, 0); intel->surface_reloc = 0; drm_intel_bo_unreference(intel->surface_bo); intel->surface_bo = drm_intel_bo_alloc(intel->bufmgr, "surface data", sizeof(intel->surface_data), 4096); assert(intel->surface_bo); return; (void)ret; } static void i965_emit_composite_primitive_identity_source(intel_screen_private *intel, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { OUT_VERTEX(dstX + w); OUT_VERTEX(dstY + h); OUT_VERTEX((srcX + w) * intel->scale_units[0][0]); OUT_VERTEX((srcY + h) * intel->scale_units[0][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY + h); OUT_VERTEX(srcX * intel->scale_units[0][0]); OUT_VERTEX((srcY + h) * intel->scale_units[0][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY); OUT_VERTEX(srcX * intel->scale_units[0][0]); OUT_VERTEX(srcY * intel->scale_units[0][1]); } static void i965_emit_composite_primitive_affine_source(intel_screen_private *intel, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { float src_x[3], src_y[3]; if (!intel_uxa_get_transformed_coordinates(srcX, srcY, intel->transform[0], &src_x[0], &src_y[0])) return; if (!intel_uxa_get_transformed_coordinates(srcX, srcY + h, intel->transform[0], &src_x[1], &src_y[1])) return; if (!intel_uxa_get_transformed_coordinates(srcX + w, srcY + h, intel->transform[0], &src_x[2], &src_y[2])) return; OUT_VERTEX(dstX + w); OUT_VERTEX(dstY + h); OUT_VERTEX(src_x[2] * intel->scale_units[0][0]); OUT_VERTEX(src_y[2] * intel->scale_units[0][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY + h); OUT_VERTEX(src_x[1] * intel->scale_units[0][0]); OUT_VERTEX(src_y[1] * intel->scale_units[0][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY); OUT_VERTEX(src_x[0] * intel->scale_units[0][0]); OUT_VERTEX(src_y[0] * intel->scale_units[0][1]); } static void i965_emit_composite_primitive_identity_source_mask(intel_screen_private *intel, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { OUT_VERTEX(dstX + w); OUT_VERTEX(dstY + h); OUT_VERTEX((srcX + w) * intel->scale_units[0][0]); OUT_VERTEX((srcY + h) * intel->scale_units[0][1]); OUT_VERTEX((maskX + w) * intel->scale_units[1][0]); OUT_VERTEX((maskY + h) * intel->scale_units[1][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY + h); OUT_VERTEX(srcX * intel->scale_units[0][0]); OUT_VERTEX((srcY + h) * intel->scale_units[0][1]); OUT_VERTEX(maskX * intel->scale_units[1][0]); OUT_VERTEX((maskY + h) * intel->scale_units[1][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY); OUT_VERTEX(srcX * intel->scale_units[0][0]); OUT_VERTEX(srcY * intel->scale_units[0][1]); OUT_VERTEX(maskX * intel->scale_units[1][0]); OUT_VERTEX(maskY * intel->scale_units[1][1]); } static void i965_emit_composite_primitive(intel_screen_private *intel, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { float src_x[3], src_y[3], src_w[3], mask_x[3], mask_y[3], mask_w[3]; Bool is_affine = intel->gen4_render_state->composite_op.is_affine; if (is_affine) { if (!intel_uxa_get_transformed_coordinates(srcX, srcY, intel->transform[0], &src_x[0], &src_y[0])) return; if (!intel_uxa_get_transformed_coordinates(srcX, srcY + h, intel->transform[0], &src_x[1], &src_y[1])) return; if (!intel_uxa_get_transformed_coordinates(srcX + w, srcY + h, intel->transform[0], &src_x[2], &src_y[2])) return; } else { if (!intel_uxa_get_transformed_coordinates_3d(srcX, srcY, intel->transform[0], &src_x[0], &src_y[0], &src_w[0])) return; if (!intel_uxa_get_transformed_coordinates_3d(srcX, srcY + h, intel->transform[0], &src_x[1], &src_y[1], &src_w[1])) return; if (!intel_uxa_get_transformed_coordinates_3d(srcX + w, srcY + h, intel->transform[0], &src_x[2], &src_y[2], &src_w[2])) return; } if (intel->render_mask) { if (is_affine) { if (!intel_uxa_get_transformed_coordinates(maskX, maskY, intel->transform[1], &mask_x[0], &mask_y[0])) return; if (!intel_uxa_get_transformed_coordinates(maskX, maskY + h, intel->transform[1], &mask_x[1], &mask_y[1])) return; if (!intel_uxa_get_transformed_coordinates(maskX + w, maskY + h, intel->transform[1], &mask_x[2], &mask_y[2])) return; } else { if (!intel_uxa_get_transformed_coordinates_3d(maskX, maskY, intel->transform[1], &mask_x[0], &mask_y[0], &mask_w[0])) return; if (!intel_uxa_get_transformed_coordinates_3d(maskX, maskY + h, intel->transform[1], &mask_x[1], &mask_y[1], &mask_w[1])) return; if (!intel_uxa_get_transformed_coordinates_3d(maskX + w, maskY + h, intel->transform[1], &mask_x[2], &mask_y[2], &mask_w[2])) return; } } OUT_VERTEX(dstX + w); OUT_VERTEX(dstY + h); OUT_VERTEX(src_x[2] * intel->scale_units[0][0]); OUT_VERTEX(src_y[2] * intel->scale_units[0][1]); if (!is_affine) OUT_VERTEX(src_w[2]); if (intel->render_mask) { OUT_VERTEX(mask_x[2] * intel->scale_units[1][0]); OUT_VERTEX(mask_y[2] * intel->scale_units[1][1]); if (!is_affine) OUT_VERTEX(mask_w[2]); } OUT_VERTEX(dstX); OUT_VERTEX(dstY + h); OUT_VERTEX(src_x[1] * intel->scale_units[0][0]); OUT_VERTEX(src_y[1] * intel->scale_units[0][1]); if (!is_affine) OUT_VERTEX(src_w[1]); if (intel->render_mask) { OUT_VERTEX(mask_x[1] * intel->scale_units[1][0]); OUT_VERTEX(mask_y[1] * intel->scale_units[1][1]); if (!is_affine) OUT_VERTEX(mask_w[1]); } OUT_VERTEX(dstX); OUT_VERTEX(dstY); OUT_VERTEX(src_x[0] * intel->scale_units[0][0]); OUT_VERTEX(src_y[0] * intel->scale_units[0][1]); if (!is_affine) OUT_VERTEX(src_w[0]); if (intel->render_mask) { OUT_VERTEX(mask_x[0] * intel->scale_units[1][0]); OUT_VERTEX(mask_y[0] * intel->scale_units[1][1]); if (!is_affine) OUT_VERTEX(mask_w[0]); } } Bool i965_prepare_composite(int op, PicturePtr source_picture, PicturePtr mask_picture, PicturePtr dest_picture, PixmapPtr source, PixmapPtr mask, PixmapPtr dest) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest_picture->pDrawable->pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); struct gen4_render_state *render_state = intel->gen4_render_state; gen4_composite_op *composite_op = &render_state->composite_op; composite_op->src_filter = sampler_state_filter_from_picture(source_picture->filter); if (composite_op->src_filter == SS_INVALID_FILTER) { intel_uxa_debug_fallback(scrn, "Bad src filter 0x%x\n", source_picture->filter); return FALSE; } composite_op->src_extend = sampler_state_extend_from_picture(source_picture->repeatType); if (composite_op->src_extend == SS_INVALID_EXTEND) { intel_uxa_debug_fallback(scrn, "Bad src repeat 0x%x\n", source_picture->repeatType); return FALSE; } if (mask_picture) { if (mask_picture->componentAlpha && PICT_FORMAT_RGB(mask_picture->format)) { /* Check if it's component alpha that relies on a source alpha and on * the source value. We can only get one of those into the single * source value that we get to blend with. */ if (i965_blend_op[op].src_alpha && (i965_blend_op[op].src_blend != BRW_BLENDFACTOR_ZERO)) { intel_uxa_debug_fallback(scrn, "Component alpha not supported " "with source alpha and source " "value blending.\n"); return FALSE; } } composite_op->mask_filter = sampler_state_filter_from_picture(mask_picture->filter); if (composite_op->mask_filter == SS_INVALID_FILTER) { intel_uxa_debug_fallback(scrn, "Bad mask filter 0x%x\n", mask_picture->filter); return FALSE; } composite_op->mask_extend = sampler_state_extend_from_picture(mask_picture->repeatType); if (composite_op->mask_extend == SS_INVALID_EXTEND) { intel_uxa_debug_fallback(scrn, "Bad mask repeat 0x%x\n", mask_picture->repeatType); return FALSE; } } else { composite_op->mask_filter = SS_FILTER_NEAREST; composite_op->mask_extend = SS_EXTEND_NONE; } /* Flush any pending writes prior to relocating the textures. */ if (intel_uxa_pixmap_is_dirty(source) || intel_uxa_pixmap_is_dirty(mask)) intel_batch_emit_flush(scrn); composite_op->op = op; intel->render_source_picture = source_picture; intel->render_mask_picture = mask_picture; intel->render_dest_picture = dest_picture; intel->render_source = source; intel->render_mask = mask; intel->render_dest = dest; intel->scale_units[0][0] = 1. / source->drawable.width; intel->scale_units[0][1] = 1. / source->drawable.height; intel->transform[0] = source_picture->transform; composite_op->is_affine = intel_uxa_transform_is_affine(intel->transform[0]); if (mask_picture == NULL) { intel->transform[1] = NULL; intel->scale_units[1][0] = -1; intel->scale_units[1][1] = -1; } else { assert(mask != NULL); intel->transform[1] = mask_picture->transform; intel->scale_units[1][0] = 1. / mask->drawable.width; intel->scale_units[1][1] = 1. / mask->drawable.height; composite_op->is_affine &= intel_uxa_transform_is_affine(intel->transform[1]); } if (mask) { assert(mask_picture != NULL); if (mask_picture->componentAlpha && PICT_FORMAT_RGB(mask_picture->format)) { if (i965_blend_op[op].src_alpha) { if (composite_op->is_affine) composite_op->wm_kernel = WM_KERNEL_MASKCA_SRCALPHA_AFFINE; else composite_op->wm_kernel = WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE; } else { if (composite_op->is_affine) composite_op->wm_kernel = WM_KERNEL_MASKCA_AFFINE; else composite_op->wm_kernel = WM_KERNEL_MASKCA_PROJECTIVE; } } else { if (composite_op->is_affine) composite_op->wm_kernel = WM_KERNEL_MASKNOCA_AFFINE; else composite_op->wm_kernel = WM_KERNEL_MASKNOCA_PROJECTIVE; } } else { if (composite_op->is_affine) composite_op->wm_kernel = WM_KERNEL_NOMASK_AFFINE; else composite_op->wm_kernel = WM_KERNEL_NOMASK_PROJECTIVE; } intel->prim_emit = i965_emit_composite_primitive; if (!mask) { if (intel->transform[0] == NULL) intel->prim_emit = i965_emit_composite_primitive_identity_source; else if (composite_op->is_affine) intel->prim_emit = i965_emit_composite_primitive_affine_source; } else { if (intel->transform[0] == NULL && intel->transform[1] == NULL) intel->prim_emit = i965_emit_composite_primitive_identity_source_mask; } intel->floats_per_vertex = 2 + (mask ? 2 : 1) * (composite_op->is_affine ? 2: 3); if (!i965_composite_check_aperture(intel)) { intel_batch_submit(scrn); if (!i965_composite_check_aperture(intel)) { intel_uxa_debug_fallback(scrn, "Couldn't fit render operation " "in aperture\n"); return FALSE; } } if (sizeof(intel->surface_data) - intel->surface_used < 4 * SURFACE_STATE_PADDED_SIZE) i965_surface_flush(intel); intel->needs_render_state_emit = TRUE; return TRUE; } static void i965_select_vertex_buffer(struct intel_screen_private *intel) { int id = intel->gen4_render_state->composite_op.vertex_id; int modifyenable = 0; if (intel->vertex_id & (1 << id)) return; if (INTEL_INFO(intel)->gen >= 070) modifyenable = GEN7_VB0_ADDRESS_MODIFYENABLE; /* Set up the pointer to our (single) vertex buffer */ OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | 3); /* XXX could use multiple vbo to reduce relocations if * frequently switching between vertex sizes, like rgb10text. */ if (INTEL_INFO(intel)->gen >= 060) { OUT_BATCH((id << GEN6_VB0_BUFFER_INDEX_SHIFT) | GEN6_VB0_VERTEXDATA | modifyenable | (4*intel->floats_per_vertex << VB0_BUFFER_PITCH_SHIFT)); } else { OUT_BATCH((id << VB0_BUFFER_INDEX_SHIFT) | VB0_VERTEXDATA | (4*intel->floats_per_vertex << VB0_BUFFER_PITCH_SHIFT)); } OUT_RELOC(intel->vertex_bo, I915_GEM_DOMAIN_VERTEX, 0, 0); if (INTEL_INFO(intel)->gen >= 050) OUT_RELOC(intel->vertex_bo, I915_GEM_DOMAIN_VERTEX, 0, sizeof(intel->vertex_ptr) - 1); else OUT_BATCH(0); OUT_BATCH(0); // ignore for VERTEXDATA, but still there intel->vertex_id |= 1 << id; } static void i965_bind_surfaces(struct intel_screen_private *intel) { uint32_t *binding_table; assert(intel->surface_used + 4 * SURFACE_STATE_PADDED_SIZE <= sizeof(intel->surface_data)); binding_table = (uint32_t*) (intel->surface_data + intel->surface_used); intel->surface_table = intel->surface_used; intel->surface_used += SURFACE_STATE_PADDED_SIZE; binding_table[0] = i965_set_picture_surface_state(intel, intel->render_dest_picture, intel->render_dest, TRUE); binding_table[1] = i965_set_picture_surface_state(intel, intel->render_source_picture, intel->render_source, FALSE); if (intel->render_mask) { binding_table[2] = i965_set_picture_surface_state(intel, intel->render_mask_picture, intel->render_mask, FALSE); } } void i965_composite(PixmapPtr dest, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); intel_batch_start_atomic(scrn, 200); if (intel->needs_render_state_emit) { i965_bind_surfaces(intel); if (INTEL_INFO(intel)->gen >= 060) gen6_emit_composite_state(intel); else i965_emit_composite_state(intel); } if (intel->floats_per_vertex != intel->last_floats_per_vertex) { intel->vertex_index = (intel->vertex_used + intel->floats_per_vertex - 1) / intel->floats_per_vertex; intel->vertex_used = intel->vertex_index * intel->floats_per_vertex; intel->last_floats_per_vertex = intel->floats_per_vertex; } if (intel_vertex_space(intel) < 3*4*intel->floats_per_vertex) { i965_vertex_flush(intel); intel_next_vertex(intel); intel->vertex_index = 0; } i965_select_vertex_buffer(intel); if (intel->vertex_offset == 0) { if (INTEL_INFO(intel)->gen >= 070) { OUT_BATCH(BRW_3DPRIMITIVE | (7 - 2)); OUT_BATCH(BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST); } else { OUT_BATCH(BRW_3DPRIMITIVE | BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL | (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) | (0 << 9) | 4); } intel->vertex_offset = intel->batch_used; OUT_BATCH(0); /* vertex count, to be filled in later */ OUT_BATCH(intel->vertex_index); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ intel->vertex_count = intel->vertex_index; } intel->prim_emit(intel, srcX, srcY, maskX, maskY, dstX, dstY, w, h); intel->vertex_index += 3; if (INTEL_INFO(intel)->gen < 050) { /* XXX OMG! */ i965_vertex_flush(intel); OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH); } intel_batch_end_atomic(scrn); } void i965_batch_commit_notify(intel_screen_private *intel) { intel->needs_render_state_emit = TRUE; intel->needs_3d_invariant = TRUE; intel->last_floats_per_vertex = 0; intel->vertex_index = 0; intel->gen4_render_state->composite_op.vertex_id = -1; intel->gen6_render_state.num_sf_outputs = 0; intel->gen6_render_state.samplers = NULL; intel->gen6_render_state.blend = -1; intel->gen6_render_state.kernel = NULL; intel->gen6_render_state.drawrect = -1; assert(intel->surface_reloc == 0); } /** * Called at EnterVT so we can set up our offsets into the state buffer. */ void gen4_render_state_init(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct gen4_render_state *render; const struct wm_kernel_info *wm_kernels; sampler_state_filter_t src_filter; sampler_state_extend_t src_extend; sampler_state_filter_t mask_filter; sampler_state_extend_t mask_extend; drm_intel_bo *sf_kernel_bo, *sf_kernel_mask_bo; drm_intel_bo *border_color_bo; int m; intel->needs_3d_invariant = TRUE; intel->surface_bo = drm_intel_bo_alloc(intel->bufmgr, "surface data", sizeof(intel->surface_data), 4096); assert(intel->surface_bo); intel->surface_used = 0; if (intel->gen4_render_state == NULL) { intel->gen4_render_state = calloc(1, sizeof(*render)); assert(intel->gen4_render_state != NULL); } if (INTEL_INFO(intel)->gen >= 060) return gen6_render_state_init(scrn); render = intel->gen4_render_state; render->composite_op.vertex_id = -1; render->vs_state_bo = gen4_create_vs_unit_state(intel); /* Set up the two SF states (one for blending with a mask, one without) */ if (IS_GEN5(intel)) { sf_kernel_bo = intel_uxa_bo_alloc_for_data(intel, sf_kernel_static_gen5, sizeof (sf_kernel_static_gen5), "sf kernel gen5"); sf_kernel_mask_bo = intel_uxa_bo_alloc_for_data(intel, sf_kernel_mask_static_gen5, sizeof(sf_kernel_mask_static_gen5), "sf mask kernel"); } else { sf_kernel_bo = intel_uxa_bo_alloc_for_data(intel, sf_kernel_static, sizeof(sf_kernel_static), "sf kernel"); sf_kernel_mask_bo = intel_uxa_bo_alloc_for_data(intel, sf_kernel_mask_static, sizeof (sf_kernel_mask_static), "sf mask kernel"); } render->sf_state_bo = gen4_create_sf_state(intel, sf_kernel_bo); render->sf_mask_state_bo = gen4_create_sf_state(intel, sf_kernel_mask_bo); drm_intel_bo_unreference(sf_kernel_bo); drm_intel_bo_unreference(sf_kernel_mask_bo); wm_kernels = IS_GEN5(intel) ? wm_kernels_gen5 : wm_kernels_gen4; for (m = 0; m < KERNEL_COUNT; m++) { render->wm_kernel_bo[m] = intel_uxa_bo_alloc_for_data(intel, wm_kernels[m].data, wm_kernels[m].size, "WM kernel"); } /* Set up the WM states: each filter/extend type for source and mask, per * kernel. */ border_color_bo = sampler_border_color_create(intel); for (src_filter = 0; src_filter < FILTER_COUNT; src_filter++) { for (src_extend = 0; src_extend < EXTEND_COUNT; src_extend++) { for (mask_filter = 0; mask_filter < FILTER_COUNT; mask_filter++) { for (mask_extend = 0; mask_extend < EXTEND_COUNT; mask_extend++) { drm_intel_bo *sampler_state_bo; sampler_state_bo = i965_create_sampler_state(intel, src_filter, src_extend, mask_filter, mask_extend, border_color_bo); for (m = 0; m < KERNEL_COUNT; m++) { render->wm_state_bo[m][src_filter][src_extend][mask_filter][mask_extend] = gen4_create_wm_state (intel, wm_kernels[m]. has_mask, render->wm_kernel_bo[m], sampler_state_bo); } drm_intel_bo_unreference(sampler_state_bo); } } } } drm_intel_bo_unreference(border_color_bo); render->cc_state_bo = gen4_create_cc_unit_state(intel); } /** * Called at LeaveVT. */ void gen4_render_state_cleanup(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct gen4_render_state *render_state = intel->gen4_render_state; int i, j, k, l, m; drm_intel_bo_unreference(intel->surface_bo); drm_intel_bo_unreference(render_state->vs_state_bo); drm_intel_bo_unreference(render_state->sf_state_bo); drm_intel_bo_unreference(render_state->sf_mask_state_bo); for (i = 0; i < KERNEL_COUNT; i++) drm_intel_bo_unreference(render_state->wm_kernel_bo[i]); for (i = 0; i < FILTER_COUNT; i++) for (j = 0; j < EXTEND_COUNT; j++) for (k = 0; k < FILTER_COUNT; k++) for (l = 0; l < EXTEND_COUNT; l++) for (m = 0; m < KERNEL_COUNT; m++) drm_intel_bo_unreference (render_state-> wm_state_bo[m][i][j][k] [l]); for (i = 0; i < FILTER_COUNT; i++) for (j = 0; j < EXTEND_COUNT; j++) for (k = 0; k < FILTER_COUNT; k++) for (l = 0; l < EXTEND_COUNT; l++) drm_intel_bo_unreference(render_state->ps_sampler_state_bo[i][j][k][l]); drm_intel_bo_unreference(render_state->cc_state_bo); drm_intel_bo_unreference(render_state->cc_vp_bo); drm_intel_bo_unreference(render_state->gen6_blend_bo); drm_intel_bo_unreference(render_state->gen6_depth_stencil_bo); free(intel->gen4_render_state); intel->gen4_render_state = NULL; } /* * for GEN6+ */ #define GEN6_BLEND_STATE_PADDED_SIZE ALIGN(sizeof(struct gen6_blend_state), 64) static drm_intel_bo * gen6_composite_create_cc_state(intel_screen_private *intel) { struct gen6_color_calc_state *state; drm_intel_bo *cc_bo; int ret; cc_bo = drm_intel_bo_alloc(intel->bufmgr, "gen6 CC state", sizeof(*state), 4096); assert(cc_bo); ret = drm_intel_bo_map(cc_bo, TRUE); assert(ret == 0); state = memset(cc_bo->virtual, 0, sizeof(*state)); state->constant_r = 1.0; state->constant_g = 0.0; state->constant_b = 1.0; state->constant_a = 1.0; drm_intel_bo_unmap(cc_bo); return cc_bo; (void)ret; } static drm_intel_bo * gen6_composite_create_blend_state(intel_screen_private *intel) { drm_intel_bo *blend_bo; int src, dst, ret; blend_bo = drm_intel_bo_alloc(intel->bufmgr, "gen6 BLEND state", BRW_BLENDFACTOR_COUNT * BRW_BLENDFACTOR_COUNT * GEN6_BLEND_STATE_PADDED_SIZE, 4096); assert(blend_bo); ret = drm_intel_bo_map(blend_bo, TRUE); assert(ret == 0); memset(blend_bo->virtual, 0, blend_bo->size); for (src = 0; src < BRW_BLENDFACTOR_COUNT; src++) { for (dst = 0; dst < BRW_BLENDFACTOR_COUNT; dst++) { uint32_t blend_state_offset = (src * BRW_BLENDFACTOR_COUNT + dst) * GEN6_BLEND_STATE_PADDED_SIZE; struct gen6_blend_state *blend; blend = (struct gen6_blend_state *)((char *)blend_bo->virtual + blend_state_offset); blend->blend0.dest_blend_factor = dst; blend->blend0.source_blend_factor = src; blend->blend0.blend_func = BRW_BLENDFUNCTION_ADD; blend->blend0.blend_enable = 1; blend->blend1.post_blend_clamp_enable = 1; blend->blend1.pre_blend_clamp_enable = 1; } } drm_intel_bo_unmap(blend_bo); return blend_bo; (void)ret; } static drm_intel_bo * gen6_composite_create_depth_stencil_state(intel_screen_private *intel) { drm_intel_bo *depth_stencil_bo; int ret; depth_stencil_bo = drm_intel_bo_alloc(intel->bufmgr, "gen6 DEPTH_STENCIL state", sizeof(struct gen6_depth_stencil_state), 4096); assert(depth_stencil_bo); ret = drm_intel_bo_map(depth_stencil_bo, TRUE); assert(ret == 0); memset(depth_stencil_bo->virtual, 0, sizeof(struct gen6_depth_stencil_state)); drm_intel_bo_unmap(depth_stencil_bo); return depth_stencil_bo; (void)ret; } static void gen6_composite_state_base_address(intel_screen_private *intel) { OUT_BATCH(BRW_STATE_BASE_ADDRESS | (10 - 2)); OUT_BATCH(BASE_ADDRESS_MODIFY); /* General state base address */ intel->surface_reloc = intel->batch_used; intel_batch_emit_dword(intel, intel->surface_bo->offset | BASE_ADDRESS_MODIFY); OUT_BATCH(BASE_ADDRESS_MODIFY); /* Dynamic state base address */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* Indirect object base address */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* Instruction base address */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* General state upper bound */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* Indirect object upper bound */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* Instruction access upper bound */ } static void gen6_composite_cc_state_pointers(intel_screen_private *intel, uint32_t blend_offset) { struct gen4_render_state *render_state = intel->gen4_render_state; drm_intel_bo *cc_bo = NULL; drm_intel_bo *depth_stencil_bo = NULL; if (intel->gen6_render_state.blend == blend_offset) return; if (intel->gen6_render_state.blend == -1) { cc_bo = render_state->cc_state_bo; depth_stencil_bo = render_state->gen6_depth_stencil_bo; } if (INTEL_INFO(intel)->gen >= 070) { gen7_upload_cc_state_pointers(intel, render_state->gen6_blend_bo, cc_bo, depth_stencil_bo, blend_offset); } else { gen6_upload_cc_state_pointers(intel, render_state->gen6_blend_bo, cc_bo, depth_stencil_bo, blend_offset); } intel->gen6_render_state.blend = blend_offset; } static void gen6_composite_sampler_state_pointers(intel_screen_private *intel, drm_intel_bo *bo) { if (intel->gen6_render_state.samplers == bo) return; intel->gen6_render_state.samplers = bo; if (INTEL_INFO(intel)->gen >= 070) gen7_upload_sampler_state_pointers(intel, bo); else gen6_upload_sampler_state_pointers(intel, bo); } static void gen6_composite_wm_constants(intel_screen_private *intel) { Bool ivb = INTEL_INFO(intel)->gen >= 070; /* disable WM constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | ((ivb ? 7 : 5) - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); if (ivb) { OUT_BATCH(0); OUT_BATCH(0); } } static void gen6_composite_sf_state(intel_screen_private *intel, Bool has_mask) { int num_sf_outputs = has_mask ? 2 : 1; if (intel->gen6_render_state.num_sf_outputs == num_sf_outputs) return; intel->gen6_render_state.num_sf_outputs = num_sf_outputs; if (INTEL_INFO(intel)->gen >= 070) gen7_upload_sf_state(intel, num_sf_outputs, 1); else gen6_upload_sf_state(intel, num_sf_outputs, 1); } static void gen6_composite_wm_state(intel_screen_private *intel, Bool has_mask, drm_intel_bo *bo) { int num_surfaces = has_mask ? 3 : 2; int num_sf_outputs = has_mask ? 2 : 1; if (intel->gen6_render_state.kernel == bo) return; intel->gen6_render_state.kernel = bo; OUT_BATCH(GEN6_3DSTATE_WM | (9 - 2)); OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_BATCH((1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF) | (num_surfaces << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT)); OUT_BATCH(0); OUT_BATCH((6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT)); /* DW4 */ OUT_BATCH(((40 - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT) | GEN6_3DSTATE_WM_DISPATCH_ENABLE | GEN6_3DSTATE_WM_16_DISPATCH_ENABLE); OUT_BATCH((num_sf_outputs << GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT) | GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_composite_wm_state(intel_screen_private *intel, Bool has_mask, drm_intel_bo *bo) { int num_surfaces = has_mask ? 3 : 2; unsigned int max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_IVB; unsigned int num_samples = 0; if (IS_HSW(intel)) { max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_HSW; num_samples = 1 << GEN7_PS_SAMPLE_MASK_SHIFT_HSW; } if (intel->gen6_render_state.kernel == bo) return; intel->gen6_render_state.kernel = bo; OUT_BATCH(GEN6_3DSTATE_WM | (3 - 2)); OUT_BATCH(GEN7_WM_DISPATCH_ENABLE | GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PS | (8 - 2)); OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_BATCH((1 << GEN7_PS_SAMPLER_COUNT_SHIFT) | (num_surfaces << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); OUT_BATCH(0); /* scratch space base offset */ OUT_BATCH(((48 - 1) << max_threads_shift) | num_samples | GEN7_PS_ATTRIBUTE_ENABLE | GEN7_PS_16_DISPATCH_ENABLE); OUT_BATCH((6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0)); OUT_BATCH(0); /* kernel 1 pointer */ OUT_BATCH(0); /* kernel 2 pointer */ } static void gen6_composite_drawing_rectangle(intel_screen_private *intel, PixmapPtr dest) { uint32_t dw = DRAW_YMAX(dest->drawable.height - 1) | DRAW_XMAX(dest->drawable.width - 1); /* XXX cacomposite depends upon the implicit non-pipelined flush */ if (0 && intel->gen6_render_state.drawrect == dw) return; intel->gen6_render_state.drawrect = dw; OUT_BATCH(BRW_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0x00000000); /* ymin, xmin */ OUT_BATCH(dw); /* ymax, xmax */ OUT_BATCH(0x00000000); /* yorigin, xorigin */ } static void gen6_composite_vertex_element_state(intel_screen_private *intel, Bool has_mask, Bool is_affine) { /* * vertex data in vertex buffer * position: (x, y) * texture coordinate 0: (u0, v0) if (is_affine is TRUE) else (u0, v0, w0) * texture coordinate 1 if (has_mask is TRUE): same as above */ gen4_composite_op *composite_op = &intel->gen4_render_state->composite_op; int nelem = has_mask ? 2 : 1; int selem = is_affine ? 2 : 3; uint32_t w_component; uint32_t src_format; int id; id = has_mask << 1 | is_affine; if (composite_op->vertex_id == id) return; composite_op->vertex_id = id; if (is_affine) { src_format = BRW_SURFACEFORMAT_R32G32_FLOAT; w_component = BRW_VFCOMPONENT_STORE_1_FLT; } else { src_format = BRW_SURFACEFORMAT_R32G32B32_FLOAT; w_component = BRW_VFCOMPONENT_STORE_SRC; } /* The VUE layout * dword 0-3: pad (0.0, 0.0, 0.0. 0.0) * dword 4-7: position (x, y, 1.0, 1.0), * dword 8-11: texture coordinate 0 (u0, v0, w0, 1.0) * dword 12-15: texture coordinate 1 (u1, v1, w1, 1.0) * * dword 4-15 are fetched from vertex buffer */ OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * (2 + nelem)) + 1 - 2)); OUT_BATCH((id << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); OUT_BATCH((BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT)); /* x,y */ OUT_BATCH((id << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); /* offsets vb in bytes */ OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); /* u0, v0, w0 */ OUT_BATCH((id << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID | (src_format << VE0_FORMAT_SHIFT) | ((2 * 4) << VE0_OFFSET_SHIFT)); /* offset vb in bytes */ OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (w_component << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); /* u1, v1, w1 */ if (has_mask) { OUT_BATCH((id << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID | (src_format << VE0_FORMAT_SHIFT) | (((2 + selem) * 4) << VE0_OFFSET_SHIFT)); /* vb offset in bytes */ OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (w_component << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); } } static void gen6_emit_composite_state(struct intel_screen_private *intel) { struct gen4_render_state *render = intel->gen4_render_state; gen4_composite_op *composite_op = &render->composite_op; sampler_state_filter_t src_filter = composite_op->src_filter; sampler_state_filter_t mask_filter = composite_op->mask_filter; sampler_state_extend_t src_extend = composite_op->src_extend; sampler_state_extend_t mask_extend = composite_op->mask_extend; Bool is_affine = composite_op->is_affine; Bool has_mask = intel->render_mask != NULL; Bool ivb = INTEL_INFO(intel)->gen >= 070; uint32_t src, dst; drm_intel_bo *ps_sampler_state_bo = render->ps_sampler_state_bo[src_filter][src_extend][mask_filter][mask_extend]; intel->needs_render_state_emit = FALSE; if (intel->needs_3d_invariant) { gen6_upload_invariant_states(intel); if (ivb) { gen7_upload_viewport_state_pointers(intel, render->cc_vp_bo); gen7_upload_urb(intel); gen7_upload_bypass_states(intel); gen7_upload_depth_buffer_state(intel); } else { gen6_upload_invariant_states(intel); gen6_upload_viewport_state_pointers(intel, render->cc_vp_bo); gen6_upload_urb(intel); gen6_upload_gs_state(intel); gen6_upload_depth_buffer_state(intel); } gen6_composite_wm_constants(intel); gen6_upload_vs_state(intel); gen6_upload_clip_state(intel); intel->needs_3d_invariant = FALSE; } i965_get_blend_cntl(composite_op->op, intel->render_mask_picture, intel->render_dest_picture->format, &src, &dst); if (intel->surface_reloc == 0) gen6_composite_state_base_address(intel); gen6_composite_cc_state_pointers(intel, (src * BRW_BLENDFACTOR_COUNT + dst) * GEN6_BLEND_STATE_PADDED_SIZE); gen6_composite_sampler_state_pointers(intel, ps_sampler_state_bo); gen6_composite_sf_state(intel, has_mask); if (ivb) { gen7_composite_wm_state(intel, has_mask, render->wm_kernel_bo[composite_op->wm_kernel]); gen7_upload_binding_table(intel, intel->surface_table); } else { gen6_composite_wm_state(intel, has_mask, render->wm_kernel_bo[composite_op->wm_kernel]); gen6_upload_binding_table(intel, intel->surface_table); } gen6_composite_drawing_rectangle(intel, intel->render_dest); gen6_composite_vertex_element_state(intel, has_mask, is_affine); } static void gen6_render_state_init(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct gen4_render_state *render; sampler_state_filter_t src_filter; sampler_state_filter_t mask_filter; sampler_state_extend_t src_extend; sampler_state_extend_t mask_extend; int m; drm_intel_bo *border_color_bo; const struct wm_kernel_info *wm_kernels; render= intel->gen4_render_state; render->composite_op.vertex_id = -1; intel->gen6_render_state.num_sf_outputs = 0; intel->gen6_render_state.samplers = NULL; intel->gen6_render_state.blend = -1; intel->gen6_render_state.kernel = NULL; intel->gen6_render_state.drawrect = -1; wm_kernels = IS_GEN7(intel) ? wm_kernels_gen7 : wm_kernels_gen6; for (m = 0; m < KERNEL_COUNT; m++) { render->wm_kernel_bo[m] = intel_uxa_bo_alloc_for_data(intel, wm_kernels[m].data, wm_kernels[m].size, "WM kernel gen6/7"); } border_color_bo = sampler_border_color_create(intel); for (src_filter = 0; src_filter < FILTER_COUNT; src_filter++) { for (src_extend = 0; src_extend < EXTEND_COUNT; src_extend++) { for (mask_filter = 0; mask_filter < FILTER_COUNT; mask_filter++) { for (mask_extend = 0; mask_extend < EXTEND_COUNT; mask_extend++) { render->ps_sampler_state_bo[src_filter][src_extend][mask_filter][mask_extend] = i965_create_sampler_state(intel, src_filter, src_extend, mask_filter, mask_extend, border_color_bo); } } } } drm_intel_bo_unreference(border_color_bo); render->cc_vp_bo = gen4_create_cc_viewport(intel); render->cc_state_bo = gen6_composite_create_cc_state(intel); render->gen6_blend_bo = gen6_composite_create_blend_state(intel); render->gen6_depth_stencil_bo = gen6_composite_create_depth_stencil_state(intel); } void i965_vertex_flush(struct intel_screen_private *intel) { if (intel->vertex_offset) { intel->batch_ptr[intel->vertex_offset] = intel->vertex_index - intel->vertex_count; intel->vertex_offset = 0; } } void i965_batch_flush(struct intel_screen_private *intel) { if (intel->surface_used) i965_surface_flush(intel); } xf86-video-intel-2.99.917/src/uxa/intel_dri3.c0000664000175000017500000000702112432737457015531 00000000000000/* * Copyright © 2013-2014 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that copyright * notice and this permission notice appear in supporting documentation, and * that the name of the copyright holders not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. The copyright holders make no representations * about the suitability of this software for any purpose. It is provided "as * is" without express or implied warranty. * * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE * OF THIS SOFTWARE. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "xorg-server.h" #include "xf86.h" #include "fb.h" #include "intel.h" #if USE_UXA #include "intel_uxa.h" #endif #include "dri3.h" static int intel_dri3_open(ScreenPtr screen, RRProviderPtr provider, int *out) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); int fd; fd = intel_get_client_fd(intel->dev); if (fd < 0) return -fd; *out = fd; return Success; } static PixmapPtr intel_dri3_pixmap_from_fd(ScreenPtr screen, int fd, CARD16 width, CARD16 height, CARD16 stride, CARD8 depth, CARD8 bpp) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_uxa_pixmap *priv; PixmapPtr pixmap; dri_bo *bo; if (depth < 8) return NULL; switch (bpp) { case 8: case 16: case 32: break; default: return NULL; } pixmap = fbCreatePixmap(screen, 0, 0, depth, 0); if (!pixmap) return NULL; if (!screen->ModifyPixmapHeader(pixmap, width, height, 0, 0, stride, NULL)) goto free_pixmap; bo = drm_intel_bo_gem_create_from_prime(intel->bufmgr, fd, (uint32_t)height * stride); if (bo == NULL) goto free_pixmap; intel_uxa_set_pixmap_bo(pixmap, bo); dri_bo_unreference(bo); priv = intel_uxa_get_pixmap_private(pixmap); if (priv == NULL) goto free_pixmap; priv->pinned |= PIN_DRI3; return pixmap; free_pixmap: fbDestroyPixmap(pixmap); return NULL; } static int intel_dri3_fd_from_pixmap(ScreenPtr screen, PixmapPtr pixmap, CARD16 *stride, CARD32 *size) { struct intel_uxa_pixmap *priv; int fd; priv = intel_uxa_get_pixmap_private(pixmap); if (!priv) return -1; if (intel_pixmap_pitch(pixmap) > UINT16_MAX) return -1; if (drm_intel_bo_gem_export_to_prime(priv->bo, &fd) < 0) return -1; priv->pinned |= PIN_DRI3; *stride = intel_pixmap_pitch(pixmap); *size = priv->bo->size; return fd; } static dri3_screen_info_rec intel_dri3_screen_info = { .version = DRI3_SCREEN_INFO_VERSION, .open = intel_dri3_open, .pixmap_from_fd = intel_dri3_pixmap_from_fd, .fd_from_pixmap = intel_dri3_fd_from_pixmap }; Bool intel_dri3_screen_init(ScreenPtr screen) { return dri3_screen_init(screen, &intel_dri3_screen_info); } xf86-video-intel-2.99.917/src/uxa/i915_3d.c0000664000175000017500000000723112432737457014555 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "xorg-server.h" #include "xf86.h" #include "intel.h" #include "intel_uxa.h" #include "i915_reg.h" void I915EmitInvarientState(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); assert(intel->in_batch_atomic); OUT_BATCH(_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 | AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0); /* Disable independent alpha blend */ OUT_BATCH(_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) | IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) | IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT)); OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_DFLT_Z_CMD); OUT_BATCH(0); /* Don't support texture crossbar yet */ OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | CSB_TCB(2, 2) | CSB_TCB(3, 3) | CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7)); OUT_BATCH(_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX | ENABLE_TRI_FAN_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D); OUT_BATCH(_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) | ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff)); OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | 2); OUT_BATCH(0x00000000); /* Disable texture coordinate wrap-shortest */ OUT_BATCH((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE | S4_CULLMODE_NONE | S4_VFMT_XY); OUT_BATCH(0x00000000); /* Stencil. */ OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE); OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */ OUT_BATCH(0); OUT_BATCH(_3DSTATE_STIPPLE); OUT_BATCH(0x00000000); OUT_BATCH(_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0); } xf86-video-intel-2.99.917/src/uxa/i965_3d.c0000664000175000017500000002534712432737457014572 00000000000000/* * Copyright 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include "intel.h" #include "intel_uxa.h" #include "i965_reg.h" #include "brw_defines.h" void gen6_upload_invariant_states(intel_screen_private *intel) { Bool ivb = INTEL_INFO(intel)->gen >= 070; OUT_BATCH(BRW_PIPE_CONTROL | (4 - 2)); OUT_BATCH(BRW_PIPE_CONTROL_IS_FLUSH | BRW_PIPE_CONTROL_WC_FLUSH | BRW_PIPE_CONTROL_DEPTH_CACHE_FLUSH | BRW_PIPE_CONTROL_NOWRITE); OUT_BATCH(0); /* write address */ OUT_BATCH(0); /* write data */ OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D); OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | ((ivb ? 4 : 3) - 2)); OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ OUT_BATCH(0); if (ivb) OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK | (2 - 2)); OUT_BATCH(1); /* Set system instruction pointer */ OUT_BATCH(BRW_STATE_SIP | 0); OUT_BATCH(0); } void gen6_upload_viewport_state_pointers(intel_screen_private *intel, drm_intel_bo *cc_vp_bo) { OUT_BATCH(GEN6_3DSTATE_VIEWPORT_STATE_POINTERS | GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_RELOC(cc_vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); } void gen7_upload_viewport_state_pointers(intel_screen_private *intel, drm_intel_bo *cc_vp_bo) { OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); OUT_RELOC(cc_vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2)); OUT_BATCH(0); } void gen6_upload_urb(intel_screen_private *intel) { OUT_BATCH(GEN6_3DSTATE_URB | (3 - 2)); OUT_BATCH(((1 - 1) << GEN6_3DSTATE_URB_VS_SIZE_SHIFT) | (24 << GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT)); /* at least 24 on GEN6 */ OUT_BATCH((0 << GEN6_3DSTATE_URB_GS_SIZE_SHIFT) | (0 << GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT)); /* no GS thread */ } /* * URB layout on GEN7 * ---------------------------------------- * | PS Push Constants (8KB) | VS entries | * ---------------------------------------- */ void gen7_upload_urb(intel_screen_private *intel) { unsigned int num_urb_entries = 32; if (IS_HSW(intel)) num_urb_entries = 64; OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2)); OUT_BATCH(8); /* in 1KBs */ OUT_BATCH(GEN7_3DSTATE_URB_VS | (2 - 2)); OUT_BATCH( (num_urb_entries << GEN7_URB_ENTRY_NUMBER_SHIFT) | (2 - 1) << GEN7_URB_ENTRY_SIZE_SHIFT | (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_GS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_HS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_DS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); } void gen6_upload_cc_state_pointers(intel_screen_private *intel, drm_intel_bo *blend_bo, drm_intel_bo *cc_bo, drm_intel_bo *depth_stencil_bo, uint32_t blend_offset) { OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS | (4 - 2)); if (blend_bo) OUT_RELOC(blend_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, blend_offset | 1); else OUT_BATCH(0); if (depth_stencil_bo) OUT_RELOC(depth_stencil_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); else OUT_BATCH(0); if (cc_bo) OUT_RELOC(cc_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); else OUT_BATCH(0); } void gen7_upload_cc_state_pointers(intel_screen_private *intel, drm_intel_bo *blend_bo, drm_intel_bo *cc_bo, drm_intel_bo *depth_stencil_bo, uint32_t blend_offset) { OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); if (blend_bo) OUT_RELOC(blend_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, blend_offset | 1); else OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS | (2 - 2)); if (cc_bo) OUT_RELOC(cc_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); else OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS | (2 - 2)); if (depth_stencil_bo) OUT_RELOC(depth_stencil_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); else OUT_BATCH(0); } void gen6_upload_sampler_state_pointers(intel_screen_private *intel, drm_intel_bo *sampler_bo) { OUT_BATCH(GEN6_3DSTATE_SAMPLER_STATE_POINTERS | GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS | (4 - 2)); OUT_BATCH(0); /* VS */ OUT_BATCH(0); /* GS */ OUT_RELOC(sampler_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); } void gen7_upload_sampler_state_pointers(intel_screen_private *intel, drm_intel_bo *sampler_bo) { OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2)); OUT_RELOC(sampler_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); } void gen7_upload_bypass_states(intel_screen_private *intel) { /* bypass GS */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_GS | (7 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_GS | (7 - 2)); OUT_BATCH(0); /* without GS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS | (2 - 2)); OUT_BATCH(0); /* disable HS */ OUT_BATCH(GEN7_3DSTATE_CONSTANT_HS | (7 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_HS | (7 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS | (2 - 2)); OUT_BATCH(0); /* Disable TE */ OUT_BATCH(GEN7_3DSTATE_TE | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* Disable DS */ OUT_BATCH(GEN7_3DSTATE_CONSTANT_DS | (7 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_DS | (6 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS | (2 - 2)); OUT_BATCH(0); /* Disable STREAMOUT */ OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); } void gen6_upload_vs_state(intel_screen_private *intel) { Bool ivb = INTEL_INFO(intel)->gen >= 070; /* disable VS constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | ((ivb ? 7 : 5) - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); if (ivb) { OUT_BATCH(0); OUT_BATCH(0); } OUT_BATCH(GEN6_3DSTATE_VS | (6 - 2)); OUT_BATCH(0); /* without VS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } void gen6_upload_gs_state(intel_screen_private *intel) { /* disable GS constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_GS | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_GS | (7 - 2)); OUT_BATCH(0); /* without GS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } void gen6_upload_clip_state(intel_screen_private *intel) { OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(0); } void gen6_upload_sf_state(intel_screen_private *intel, int num_sf_outputs, int read_offset) { OUT_BATCH(GEN6_3DSTATE_SF | (20 - 2)); OUT_BATCH((num_sf_outputs << GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT) | (1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT) | (read_offset << GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT)); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SF_CULL_NONE); OUT_BATCH(2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); /* DW4 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW9 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW14 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW19 */ } void gen7_upload_sf_state(intel_screen_private *intel, int num_sf_outputs, int read_offset) { OUT_BATCH(GEN7_3DSTATE_SBE | (14 - 2)); OUT_BATCH((num_sf_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT) | (1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT) | (read_offset << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW4 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW9 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SF | (7 - 2)); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SF_CULL_NONE); OUT_BATCH(2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } void gen6_upload_binding_table(intel_screen_private *intel, uint32_t ps_binding_table_offset) { /* Binding table pointers */ OUT_BATCH(BRW_3DSTATE_BINDING_TABLE_POINTERS | GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS | (4 - 2)); OUT_BATCH(0); /* VS */ OUT_BATCH(0); /* GS */ /* Only the PS uses the binding table */ OUT_BATCH(ps_binding_table_offset); } void gen7_upload_binding_table(intel_screen_private *intel, uint32_t ps_binding_table_offset) { OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2)); OUT_BATCH(ps_binding_table_offset); } void gen6_upload_depth_buffer_state(intel_screen_private *intel) { OUT_BATCH(BRW_3DSTATE_DEPTH_BUFFER | (7 - 2)); OUT_BATCH((BRW_SURFACE_NULL << BRW_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT) | (BRW_DEPTHFORMAT_D32_FLOAT << BRW_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(BRW_3DSTATE_CLEAR_PARAMS | (2 - 2)); OUT_BATCH(0); } void gen7_upload_depth_buffer_state(intel_screen_private *intel) { OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2)); OUT_BATCH((BRW_DEPTHFORMAT_D32_FLOAT << 18) | (BRW_SURFACE_NULL << 29)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); } xf86-video-intel-2.99.917/src/uxa/i830_render.c0000664000175000017500000006207612432737457015532 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Wang Zhenyu * Eric Anholt * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "xorg-server.h" #include "xf86.h" #include "intel.h" #include "intel_uxa.h" #include "i830_reg.h" struct blendinfo { Bool dst_alpha; Bool src_alpha; uint32_t src_blend; uint32_t dst_blend; }; struct formatinfo { int fmt; uint32_t card_fmt; }; #define TB0C_LAST_STAGE (1 << 31) #define TB0C_RESULT_SCALE_1X (0 << 29) #define TB0C_RESULT_SCALE_2X (1 << 29) #define TB0C_RESULT_SCALE_4X (2 << 29) #define TB0C_OP_MODULE (3 << 25) #define TB0C_OUTPUT_WRITE_CURRENT (0 << 24) #define TB0C_OUTPUT_WRITE_ACCUM (1 << 24) #define TB0C_ARG3_REPLICATE_ALPHA (1<<23) #define TB0C_ARG3_INVERT (1<<22) #define TB0C_ARG3_SEL_XXX #define TB0C_ARG2_REPLICATE_ALPHA (1<<17) #define TB0C_ARG2_INVERT (1<<16) #define TB0C_ARG2_SEL_ONE (0 << 12) #define TB0C_ARG2_SEL_FACTOR (1 << 12) #define TB0C_ARG2_SEL_TEXEL0 (6 << 12) #define TB0C_ARG2_SEL_TEXEL1 (7 << 12) #define TB0C_ARG2_SEL_TEXEL2 (8 << 12) #define TB0C_ARG2_SEL_TEXEL3 (9 << 12) #define TB0C_ARG1_REPLICATE_ALPHA (1<<11) #define TB0C_ARG1_INVERT (1<<10) #define TB0C_ARG1_SEL_ONE (0 << 6) #define TB0C_ARG1_SEL_TEXEL0 (6 << 6) #define TB0C_ARG1_SEL_TEXEL1 (7 << 6) #define TB0C_ARG1_SEL_TEXEL2 (8 << 6) #define TB0C_ARG1_SEL_TEXEL3 (9 << 6) #define TB0C_ARG0_REPLICATE_ALPHA (1<<5) #define TB0C_ARG0_SEL_XXX #define TB0A_CTR_STAGE_ENABLE (1<<31) #define TB0A_RESULT_SCALE_1X (0 << 29) #define TB0A_RESULT_SCALE_2X (1 << 29) #define TB0A_RESULT_SCALE_4X (2 << 29) #define TB0A_OP_MODULE (3 << 25) #define TB0A_OUTPUT_WRITE_CURRENT (0<<24) #define TB0A_OUTPUT_WRITE_ACCUM (1<<24) #define TB0A_CTR_STAGE_SEL_BITS_XXX #define TB0A_ARG3_SEL_XXX #define TB0A_ARG3_INVERT (1<<17) #define TB0A_ARG2_INVERT (1<<16) #define TB0A_ARG2_SEL_ONE (0 << 12) #define TB0A_ARG2_SEL_TEXEL0 (6 << 12) #define TB0A_ARG2_SEL_TEXEL1 (7 << 12) #define TB0A_ARG2_SEL_TEXEL2 (8 << 12) #define TB0A_ARG2_SEL_TEXEL3 (9 << 12) #define TB0A_ARG1_INVERT (1<<10) #define TB0A_ARG1_SEL_ONE (0 << 6) #define TB0A_ARG1_SEL_TEXEL0 (6 << 6) #define TB0A_ARG1_SEL_TEXEL1 (7 << 6) #define TB0A_ARG1_SEL_TEXEL2 (8 << 6) #define TB0A_ARG1_SEL_TEXEL3 (9 << 6) static struct blendinfo i830_blend_op[] = { /* Clear */ {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ZERO}, /* Src */ {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO}, /* Dst */ {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE}, /* Over */ {0, 1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA}, /* OverReverse */ {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE}, /* In */ {1, 0, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_ZERO}, /* InReverse */ {0, 1, BLENDFACTOR_ZERO, BLENDFACTOR_SRC_ALPHA}, /* Out */ {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ZERO}, /* OutReverse */ {0, 1, BLENDFACTOR_ZERO, BLENDFACTOR_INV_SRC_ALPHA}, /* Atop */ {1, 1, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA}, /* AtopReverse */ {1, 1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_SRC_ALPHA}, /* Xor */ {1, 1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA}, /* Add */ {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ONE}, }; static struct formatinfo i830_tex_formats[] = { {PICT_a8, MAPSURF_8BIT | MT_8BIT_A8}, {PICT_a8r8g8b8, MAPSURF_32BIT | MT_32BIT_ARGB8888}, {PICT_a8b8g8r8, MAPSURF_32BIT | MT_32BIT_ABGR8888}, {PICT_r5g6b5, MAPSURF_16BIT | MT_16BIT_RGB565}, {PICT_a1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555}, {PICT_a4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444}, }; static struct formatinfo i855_tex_formats[] = { {PICT_x8r8g8b8, MAPSURF_32BIT | MT_32BIT_XRGB8888}, {PICT_x8b8g8r8, MAPSURF_32BIT | MT_32BIT_XBGR8888}, }; static Bool i830_get_dest_format(PicturePtr dest_picture, uint32_t * dst_format) { ScrnInfoPtr scrn; switch (dest_picture->format) { case PICT_a8r8g8b8: case PICT_x8r8g8b8: *dst_format = COLR_BUF_ARGB8888; break; case PICT_r5g6b5: *dst_format = COLR_BUF_RGB565; break; case PICT_a1r5g5b5: case PICT_x1r5g5b5: *dst_format = COLR_BUF_ARGB1555; break; case PICT_a8: *dst_format = COLR_BUF_8BIT; break; case PICT_a4r4g4b4: case PICT_x4r4g4b4: *dst_format = COLR_BUF_ARGB4444; break; default: scrn = xf86ScreenToScrn(dest_picture->pDrawable->pScreen); intel_uxa_debug_fallback(scrn, "Unsupported dest format 0x%x\n", (int)dest_picture->format); return FALSE; } *dst_format |= DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8); return TRUE; } static Bool i830_get_blend_cntl(ScrnInfoPtr scrn, int op, PicturePtr mask, uint32_t dst_format, uint32_t * blendctl) { uint32_t sblend, dblend; sblend = i830_blend_op[op].src_blend; dblend = i830_blend_op[op].dst_blend; /* If there's no dst alpha channel, adjust the blend op so that we'll treat * it as always 1. */ if (PICT_FORMAT_A(dst_format) == 0 && i830_blend_op[op].dst_alpha) { if (sblend == BLENDFACTOR_DST_ALPHA) sblend = BLENDFACTOR_ONE; else if (sblend == BLENDFACTOR_INV_DST_ALPHA) sblend = BLENDFACTOR_ZERO; } /* For blending purposes, COLR_BUF_8BIT values show up in the green * channel. So we can't use the alpha channel. */ if (dst_format == PICT_a8 && ((sblend == BLENDFACTOR_DST_ALPHA || sblend == BLENDFACTOR_INV_DST_ALPHA))) { intel_uxa_debug_fallback(scrn, "Can't do dst alpha blending with " "PICT_a8 dest.\n"); return FALSE; } /* If the source alpha is being used, then we should only be in a case * where the source blend factor is 0, and the source blend value is the * mask channels multiplied by the source picture's alpha. */ if (mask && mask->componentAlpha && PICT_FORMAT_RGB(mask->format) && i830_blend_op[op].src_alpha) { if (dblend == BLENDFACTOR_SRC_ALPHA) { dblend = BLENDFACTOR_SRC_COLR; } else if (dblend == BLENDFACTOR_INV_SRC_ALPHA) { dblend = BLENDFACTOR_INV_SRC_COLR; } } *blendctl = (sblend << S8_SRC_BLEND_FACTOR_SHIFT) | (dblend << S8_DST_BLEND_FACTOR_SHIFT); return TRUE; } static uint32_t i8xx_get_card_format(intel_screen_private *intel, PicturePtr picture) { int i; for (i = 0; i < sizeof(i830_tex_formats) / sizeof(i830_tex_formats[0]); i++) { if (i830_tex_formats[i].fmt == picture->format) return i830_tex_formats[i].card_fmt; } if (!(IS_I830(intel) || IS_845G(intel))) { for (i = 0; i < sizeof(i855_tex_formats) / sizeof(i855_tex_formats[0]); i++) { if (i855_tex_formats[i].fmt == picture->format) return i855_tex_formats[i].card_fmt; } } return 0; } static void i830_texture_setup(PicturePtr picture, PixmapPtr pixmap, int unit) { ScrnInfoPtr scrn = xf86ScreenToScrn(picture->pDrawable->pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); uint32_t format, tiling_bits, pitch, filter; uint32_t wrap_mode; uint32_t texcoordtype; pitch = intel_pixmap_pitch(pixmap); intel->scale_units[unit][0] = pixmap->drawable.width; intel->scale_units[unit][1] = pixmap->drawable.height; intel->transform[unit] = picture->transform; if (intel_uxa_transform_is_affine(intel->transform[unit])) texcoordtype = TEXCOORDTYPE_CARTESIAN; else texcoordtype = TEXCOORDTYPE_HOMOGENEOUS; switch (picture->repeatType) { case RepeatNone: wrap_mode = TEXCOORDMODE_CLAMP_BORDER; break; case RepeatNormal: wrap_mode = TEXCOORDMODE_WRAP; break; case RepeatPad: wrap_mode = TEXCOORDMODE_CLAMP; break; case RepeatReflect: wrap_mode = TEXCOORDMODE_MIRROR; break; default: FatalError("Unknown repeat type %d\n", picture->repeatType); } switch (picture->filter) { case PictFilterNearest: filter = ((FILTER_NEAREST << TM0S3_MAG_FILTER_SHIFT) | (FILTER_NEAREST << TM0S3_MIN_FILTER_SHIFT)); break; case PictFilterBilinear: filter = ((FILTER_LINEAR << TM0S3_MAG_FILTER_SHIFT) | (FILTER_LINEAR << TM0S3_MIN_FILTER_SHIFT)); break; default: FatalError("Bad filter 0x%x\n", picture->filter); } filter |= (MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT); if (intel_uxa_pixmap_tiled(pixmap)) { tiling_bits = TM0S1_TILED_SURFACE; if (intel_uxa_get_pixmap_private(pixmap)->tiling == I915_TILING_Y) tiling_bits |= TM0S1_TILE_WALK; } else tiling_bits = 0; format = i8xx_get_card_format(intel, picture); assert(intel->in_batch_atomic); OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_MAP(unit) | 4); OUT_RELOC_PIXMAP(pixmap, I915_GEM_DOMAIN_SAMPLER, 0, 0); OUT_BATCH(((pixmap->drawable.height - 1) << TM0S1_HEIGHT_SHIFT) | ((pixmap->drawable.width - 1) << TM0S1_WIDTH_SHIFT) | format | tiling_bits); OUT_BATCH((pitch / 4 - 1) << TM0S2_PITCH_SHIFT | TM0S2_MAP_2D); OUT_BATCH(filter); OUT_BATCH(0); /* default color */ OUT_BATCH(_3DSTATE_MAP_COORD_SET_CMD | TEXCOORD_SET(unit) | ENABLE_TEXCOORD_PARAMS | TEXCOORDS_ARE_NORMAL | texcoordtype | ENABLE_ADDR_V_CNTL | TEXCOORD_ADDR_V_MODE(wrap_mode) | ENABLE_ADDR_U_CNTL | TEXCOORD_ADDR_U_MODE(wrap_mode)); /* map texel stream */ OUT_BATCH(_3DSTATE_MAP_COORD_SETBIND_CMD); if (unit == 0) OUT_BATCH(TEXBIND_SET0(TEXCOORDSRC_VTXSET_0) | TEXBIND_SET1(TEXCOORDSRC_KEEP) | TEXBIND_SET2(TEXCOORDSRC_KEEP) | TEXBIND_SET3(TEXCOORDSRC_KEEP)); else OUT_BATCH(TEXBIND_SET0(TEXCOORDSRC_VTXSET_0) | TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) | TEXBIND_SET2(TEXCOORDSRC_KEEP) | TEXBIND_SET3(TEXCOORDSRC_KEEP)); OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | (unit << 16) | DISABLE_TEX_STREAM_BUMP | ENABLE_TEX_STREAM_COORD_SET | TEX_STREAM_COORD_SET(unit) | ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(unit)); } Bool i830_check_composite(int op, PicturePtr source_picture, PicturePtr mask_picture, PicturePtr dest_picture, int width, int height) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest_picture->pDrawable->pScreen); uint32_t tmp1; /* Check for unsupported compositing operations. */ if (op >= sizeof(i830_blend_op) / sizeof(i830_blend_op[0])) { intel_uxa_debug_fallback(scrn, "Unsupported Composite op 0x%x\n", op); return FALSE; } if (mask_picture != NULL && mask_picture->componentAlpha && PICT_FORMAT_RGB(mask_picture->format)) { /* Check if it's component alpha that relies on a source alpha and on * the source value. We can only get one of those into the single * source value that we get to blend with. */ if (i830_blend_op[op].src_alpha && (i830_blend_op[op].src_blend != BLENDFACTOR_ZERO)) { intel_uxa_debug_fallback(scrn, "Component alpha not " "supported with source alpha and " "source value blending.\n"); return FALSE; } } if (!i830_get_dest_format(dest_picture, &tmp1)) { intel_uxa_debug_fallback(scrn, "Get Color buffer format\n"); return FALSE; } if (width > 2048 || height > 2048) { intel_uxa_debug_fallback(scrn, "Operation is too large (%d, %d)\n", width, height); return FALSE; } return TRUE; } Bool i830_check_composite_target(PixmapPtr pixmap) { if (pixmap->drawable.width > 2048 || pixmap->drawable.height > 2048) return FALSE; if(!intel_uxa_check_pitch_3d(pixmap)) return FALSE; return TRUE; } Bool i830_check_composite_texture(ScreenPtr screen, PicturePtr picture) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); if (picture->repeatType > RepeatReflect) { intel_uxa_debug_fallback(scrn, "Unsupported picture repeat %d\n", picture->repeatType); return FALSE; } if (picture->filter != PictFilterNearest && picture->filter != PictFilterBilinear) { intel_uxa_debug_fallback(scrn, "Unsupported filter 0x%x\n", picture->filter); return FALSE; } if (picture->pDrawable) { int w, h; w = picture->pDrawable->width; h = picture->pDrawable->height; if ((w > 2048) || (h > 2048)) { intel_uxa_debug_fallback(scrn, "Picture w/h too large (%dx%d)\n", w, h); return FALSE; } /* XXX we can use the xrgb32 types if there the picture covers the clip */ if (!i8xx_get_card_format(intel, picture)) { intel_uxa_debug_fallback(scrn, "Unsupported picture format " "0x%x\n", (int)picture->format); return FALSE; } return TRUE; } return FALSE; } Bool i830_prepare_composite(int op, PicturePtr source_picture, PicturePtr mask_picture, PicturePtr dest_picture, PixmapPtr source, PixmapPtr mask, PixmapPtr dest) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest_picture->pDrawable->pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); drm_intel_bo *bo_table[] = { NULL, /* batch_bo */ intel_uxa_get_pixmap_bo(source), mask ? intel_uxa_get_pixmap_bo(mask) : NULL, intel_uxa_get_pixmap_bo(dest), }; intel->render_source_picture = source_picture; intel->render_source = source; intel->render_mask_picture = mask_picture; intel->render_mask = mask; intel->render_dest_picture = dest_picture; intel->render_dest = dest; if (!intel_uxa_check_pitch_3d(source)) return FALSE; if (mask) { if (mask_picture->componentAlpha && PICT_FORMAT_RGB(mask_picture->format)) { /* Check if it's component alpha that relies on a source alpha and on * the source value. We can only get one of those into the single * source value that we get to blend with. */ if (i830_blend_op[op].src_alpha && (i830_blend_op[op].src_blend != BLENDFACTOR_ZERO)) { intel_uxa_debug_fallback(scrn, "Component alpha not " "supported with source alpha and " "source value blending.\n"); return FALSE; } } if (!intel_uxa_check_pitch_3d(mask)) return FALSE; } if (!intel_uxa_check_pitch_3d(dest)) return FALSE; if (!i830_get_dest_format(dest_picture, &intel->render_dest_format)) return FALSE; if (!intel_uxa_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table))) return FALSE; if (mask) { intel->transform[1] = NULL; intel->scale_units[1][0] = -1; intel->scale_units[1][1] = -1; } { uint32_t cblend, ablend, blendctl; /* If component alpha is active in the mask and the blend operation * uses the source alpha, then we know we don't need the source * value (otherwise we would have hit a fallback earlier), so we * provide the source alpha (src.A * mask.X) as output color. * Conversely, if CA is set and we don't need the source alpha, then * we produce the source value (src.X * mask.X) and the source alpha * is unused.. Otherwise, we provide the non-CA source value * (src.X * mask.A). * * The PICT_FORMAT_RGB(pict) == 0 fixups are not needed on 855+'s a8 * pictures, but we need to implement it for 830/845 and there's no * harm done in leaving it in. */ cblend = TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OP_MODULE | TB0C_OUTPUT_WRITE_CURRENT; ablend = TB0A_RESULT_SCALE_1X | TB0A_OP_MODULE | TB0A_OUTPUT_WRITE_CURRENT; /* Get the source picture's channels into TBx_ARG1 */ if ((mask_picture != NULL && mask_picture->componentAlpha && PICT_FORMAT_RGB(mask_picture->format) && i830_blend_op[op].src_alpha) || dest_picture->format == PICT_a8) { /* Producing source alpha value, so the first set of channels * is src.A instead of src.X. We also do this if the destination * is a8, in which case src.G is what's written, and the other * channels are ignored. */ ablend |= TB0A_ARG1_SEL_TEXEL0; cblend |= TB0C_ARG1_SEL_TEXEL0 | TB0C_ARG1_REPLICATE_ALPHA; } else { if (PICT_FORMAT_RGB(source_picture->format) != 0) cblend |= TB0C_ARG1_SEL_TEXEL0; else cblend |= TB0C_ARG1_SEL_ONE | TB0C_ARG1_INVERT; /* 0.0 */ ablend |= TB0A_ARG1_SEL_TEXEL0; } if (mask) { cblend |= TB0C_ARG2_SEL_TEXEL1; if (dest_picture->format == PICT_a8 || ! mask_picture->componentAlpha || ! PICT_FORMAT_RGB(mask_picture->format)) cblend |= TB0C_ARG2_REPLICATE_ALPHA; ablend |= TB0A_ARG2_SEL_TEXEL1; } else { cblend |= TB0C_ARG2_SEL_ONE; ablend |= TB0A_ARG2_SEL_ONE; } if (!i830_get_blend_cntl (scrn, op, mask_picture, dest_picture->format, &blendctl)) { return FALSE; } intel->cblend = cblend; intel->ablend = ablend; intel->s8_blendctl = blendctl; } if (intel_uxa_pixmap_is_dirty(source) || intel_uxa_pixmap_is_dirty(mask)) intel_batch_emit_flush(scrn); intel->needs_render_state_emit = TRUE; return TRUE; } static void i830_emit_composite_state(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); uint32_t vf2, tiling_bits; uint32_t texcoordfmt = 0; intel->needs_render_state_emit = FALSE; IntelEmitInvarientState(scrn); intel->last_3d = LAST_3D_RENDER; assert(intel->in_batch_atomic); if (intel_uxa_pixmap_tiled(intel->render_dest)) { tiling_bits = BUF_3D_TILED_SURFACE; if (intel_uxa_get_pixmap_private(intel->render_dest)->tiling == I915_TILING_Y) tiling_bits |= BUF_3D_TILE_WALK_Y; } else tiling_bits = 0; OUT_BATCH(_3DSTATE_BUF_INFO_CMD); OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling_bits | BUF_3D_PITCH(intel_pixmap_pitch(intel->render_dest))); OUT_RELOC_PIXMAP(intel->render_dest, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD); OUT_BATCH(intel->render_dest_format); OUT_BATCH(_3DSTATE_DRAW_RECT_CMD); OUT_BATCH(0); OUT_BATCH(0); /* ymin, xmin */ OUT_BATCH(DRAW_YMAX(intel->render_dest->drawable.height - 1) | DRAW_XMAX(intel->render_dest->drawable.width - 1)); OUT_BATCH(0); /* yorig, xorig */ OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2); if (intel->render_mask) vf2 = 2 << 12; /* 2 texture coord sets */ else vf2 = 1 << 12; OUT_BATCH(vf2); /* number of coordinate sets */ OUT_BATCH(S3_CULLMODE_NONE | S3_VERTEXHAS_XY); OUT_BATCH(S8_ENABLE_COLOR_BLEND | S8_BLENDFUNC_ADD | intel-> s8_blendctl | S8_ENABLE_COLOR_BUFFER_WRITE); OUT_BATCH(_3DSTATE_INDPT_ALPHA_BLEND_CMD | DISABLE_INDPT_ALPHA_BLEND); OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_BLEND_STAGE(0) | 1); OUT_BATCH(intel->cblend); OUT_BATCH(intel->ablend); OUT_BATCH(_3DSTATE_ENABLES_1_CMD | DISABLE_LOGIC_OP | DISABLE_STENCIL_TEST | DISABLE_DEPTH_BIAS | DISABLE_SPEC_ADD | DISABLE_FOG | DISABLE_ALPHA_TEST | ENABLE_COLOR_BLEND | DISABLE_DEPTH_TEST); /* We have to explicitly say we don't want write disabled */ OUT_BATCH(_3DSTATE_ENABLES_2_CMD | ENABLE_COLOR_MASK | DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE | DISABLE_DITHER | ENABLE_COLOR_WRITE | DISABLE_DEPTH_WRITE); if (intel_uxa_transform_is_affine(intel->render_source_picture->transform)) texcoordfmt |= (TEXCOORDFMT_2D << 0); else texcoordfmt |= (TEXCOORDFMT_3D << 0); if (intel->render_mask) { if (intel_uxa_transform_is_affine (intel->render_mask_picture->transform)) texcoordfmt |= (TEXCOORDFMT_2D << 2); else texcoordfmt |= (TEXCOORDFMT_3D << 2); } OUT_BATCH(_3DSTATE_VERTEX_FORMAT_2_CMD | texcoordfmt); i830_texture_setup(intel->render_source_picture, intel->render_source, 0); if (intel->render_mask) { i830_texture_setup(intel->render_mask_picture, intel->render_mask, 1); } } /* Emit the vertices for a single composite rectangle. * * This function is no longer shared between i830 and i915 generation code. */ static void i830_emit_composite_primitive(PixmapPtr dest, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); Bool is_affine_src, is_affine_mask = TRUE; int per_vertex; float src_x[3], src_y[3], src_w[3], mask_x[3], mask_y[3], mask_w[3]; per_vertex = 2; /* dest x/y */ { float x = srcX, y = srcY; is_affine_src = intel_uxa_transform_is_affine(intel->transform[0]); if (is_affine_src) { if (!intel_uxa_get_transformed_coordinates(x, y, intel-> transform[0], &src_x[0], &src_y[0])) return; if (!intel_uxa_get_transformed_coordinates(x, y + h, intel-> transform[0], &src_x[1], &src_y[1])) return; if (!intel_uxa_get_transformed_coordinates(x + w, y + h, intel-> transform[0], &src_x[2], &src_y[2])) return; per_vertex += 2; /* src x/y */ } else { if (!intel_uxa_get_transformed_coordinates_3d(x, y, intel-> transform[0], &src_x[0], &src_y[0], &src_w[0])) return; if (!intel_uxa_get_transformed_coordinates_3d(x, y + h, intel-> transform[0], &src_x[1], &src_y[1], &src_w[1])) return; if (!intel_uxa_get_transformed_coordinates_3d(x + w, y + h, intel-> transform[0], &src_x[2], &src_y[2], &src_w[2])) return; per_vertex += 3; /* src x/y/w */ } } if (intel->render_mask) { float x = maskX, y = maskY; is_affine_mask = intel_uxa_transform_is_affine(intel->transform[1]); if (is_affine_mask) { if (!intel_uxa_get_transformed_coordinates(x, y, intel-> transform[1], &mask_x[0], &mask_y[0])) return; if (!intel_uxa_get_transformed_coordinates(x, y + h, intel-> transform[1], &mask_x[1], &mask_y[1])) return; if (!intel_uxa_get_transformed_coordinates(x + w, y + h, intel-> transform[1], &mask_x[2], &mask_y[2])) return; per_vertex += 2; /* mask x/y */ } else { if (!intel_uxa_get_transformed_coordinates_3d(x, y, intel-> transform[1], &mask_x[0], &mask_y[0], &mask_w[0])) return; if (!intel_uxa_get_transformed_coordinates_3d(x, y + h, intel-> transform[1], &mask_x[1], &mask_y[1], &mask_w[1])) return; if (!intel_uxa_get_transformed_coordinates_3d(x + w, y + h, intel-> transform[1], &mask_x[2], &mask_y[2], &mask_w[2])) return; per_vertex += 3; /* mask x/y/w */ } } if (intel->vertex_count == 0) { intel->vertex_index = intel->batch_used; OUT_BATCH(PRIM3D_INLINE | PRIM3D_RECTLIST); } OUT_BATCH_F(dstX + w); OUT_BATCH_F(dstY + h); OUT_BATCH_F(src_x[2] / intel->scale_units[0][0]); OUT_BATCH_F(src_y[2] / intel->scale_units[0][1]); if (!is_affine_src) { OUT_BATCH_F(src_w[2]); } if (intel->render_mask) { OUT_BATCH_F(mask_x[2] / intel->scale_units[1][0]); OUT_BATCH_F(mask_y[2] / intel->scale_units[1][1]); if (!is_affine_mask) { OUT_BATCH_F(mask_w[2]); } } OUT_BATCH_F(dstX); OUT_BATCH_F(dstY + h); OUT_BATCH_F(src_x[1] / intel->scale_units[0][0]); OUT_BATCH_F(src_y[1] / intel->scale_units[0][1]); if (!is_affine_src) { OUT_BATCH_F(src_w[1]); } if (intel->render_mask) { OUT_BATCH_F(mask_x[1] / intel->scale_units[1][0]); OUT_BATCH_F(mask_y[1] / intel->scale_units[1][1]); if (!is_affine_mask) { OUT_BATCH_F(mask_w[1]); } } OUT_BATCH_F(dstX); OUT_BATCH_F(dstY); OUT_BATCH_F(src_x[0] / intel->scale_units[0][0]); OUT_BATCH_F(src_y[0] / intel->scale_units[0][1]); if (!is_affine_src) { OUT_BATCH_F(src_w[0]); } if (intel->render_mask) { OUT_BATCH_F(mask_x[0] / intel->scale_units[1][0]); OUT_BATCH_F(mask_y[0] / intel->scale_units[1][1]); if (!is_affine_mask) { OUT_BATCH_F(mask_w[0]); } } intel->vertex_count += 3 * per_vertex; } void i830_vertex_flush(intel_screen_private *intel) { if (intel->vertex_count) { intel->batch_ptr[intel->vertex_index] |= intel->vertex_count - 1; intel->vertex_count = 0; } } /** * Do a single rectangle composite operation. */ void i830_composite(PixmapPtr dest, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); intel_batch_start_atomic(scrn, 58 + /* invarient */ 22 + /* setup */ 20 + /* 2 * setup_texture */ 1 + 30 /* verts */ ); if (intel->needs_render_state_emit) i830_emit_composite_state(scrn); i830_emit_composite_primitive(dest, srcX, srcY, maskX, maskY, dstX, dstY, w, h); intel_batch_end_atomic(scrn); } void i830_batch_commit_notify(intel_screen_private *intel) { intel->needs_render_state_emit = TRUE; } xf86-video-intel-2.99.917/src/uxa/intel_video_overlay.c0000664000175000017500000004107012432737457017541 00000000000000/*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * i830_video.c: i830/i845 Xv driver. * * Copyright © 2002 by Alan Hourihane and David Dawes * * Authors: * Alan Hourihane * David Dawes * * Derived from i810 Xv driver: * * Authors of i810 code: * Jonathan Bian * Offscreen Images: * Matt Sottek */ /* * XXX Could support more formats. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "compiler.h" #include "xf86Pci.h" #include "xf86fbman.h" #include "xf86drm.h" #include "regionstr.h" #include "randrstr.h" #include "windowstr.h" #include "damage.h" #include "intel.h" #include "intel_video.h" #include "i830_reg.h" #include "xf86xv.h" #include #include "dixstruct.h" #include "fourcc.h" #include "intel_video_overlay.h" /* overlay debugging printf function */ #if 0 #define OVERLAY_DEBUG ErrorF #else #define OVERLAY_DEBUG if (0) ErrorF #endif /* kernel modesetting overlay functions */ static Bool intel_has_overlay(intel_screen_private *intel) { struct drm_i915_getparam gp; int has_overlay = 0; int ret; gp.param = I915_PARAM_HAS_OVERLAY; gp.value = &has_overlay; ret = drmCommandWriteRead(intel->drmSubFD, DRM_I915_GETPARAM, &gp, sizeof(gp)); return ret == 0 && !! has_overlay; } static Bool intel_overlay_update_attrs(intel_screen_private *intel) { intel_adaptor_private *adaptor_priv = intel_get_adaptor_private(intel); struct drm_intel_overlay_attrs attrs; attrs.flags = I915_OVERLAY_UPDATE_ATTRS; attrs.brightness = adaptor_priv->brightness; attrs.contrast = adaptor_priv->contrast; attrs.saturation = adaptor_priv->saturation; attrs.color_key = adaptor_priv->colorKey; attrs.gamma0 = adaptor_priv->gamma0; attrs.gamma1 = adaptor_priv->gamma1; attrs.gamma2 = adaptor_priv->gamma2; attrs.gamma3 = adaptor_priv->gamma3; attrs.gamma4 = adaptor_priv->gamma4; attrs.gamma5 = adaptor_priv->gamma5; return drmCommandWriteRead(intel->drmSubFD, DRM_I915_OVERLAY_ATTRS, &attrs, sizeof(attrs)) == 0; } void intel_video_overlay_off(intel_screen_private *intel) { struct drm_intel_overlay_put_image request; int ret; request.flags = 0; ret = drmCommandWrite(intel->drmSubFD, DRM_I915_OVERLAY_PUT_IMAGE, &request, sizeof(request)); (void) ret; } static int intel_video_overlay_set_port_attribute(ScrnInfoPtr scrn, Atom attribute, INT32 value, pointer data) { intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data; intel_screen_private *intel = intel_get_screen_private(scrn); if (attribute == intel_xv_Brightness) { if ((value < -128) || (value > 127)) return BadValue; adaptor_priv->brightness = value; OVERLAY_DEBUG("BRIGHTNESS\n"); } else if (attribute == intel_xv_Contrast) { if ((value < 0) || (value > 255)) return BadValue; adaptor_priv->contrast = value; OVERLAY_DEBUG("CONTRAST\n"); } else if (attribute == intel_xv_Saturation) { if ((value < 0) || (value > 1023)) return BadValue; adaptor_priv->saturation = value; } else if (attribute == intel_xv_Pipe) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); if ((value < -1) || (value >= xf86_config->num_crtc)) return BadValue; if (value < 0) adaptor_priv->desired_crtc = NULL; else adaptor_priv->desired_crtc = xf86_config->crtc[value]; } else if (attribute == intel_xv_Gamma0 && (INTEL_INFO(intel)->gen >= 030)) { adaptor_priv->gamma0 = value; } else if (attribute == intel_xv_Gamma1 && (INTEL_INFO(intel)->gen >= 030)) { adaptor_priv->gamma1 = value; } else if (attribute == intel_xv_Gamma2 && (INTEL_INFO(intel)->gen >= 030)) { adaptor_priv->gamma2 = value; } else if (attribute == intel_xv_Gamma3 && (INTEL_INFO(intel)->gen >= 030)) { adaptor_priv->gamma3 = value; } else if (attribute == intel_xv_Gamma4 && (INTEL_INFO(intel)->gen >= 030)) { adaptor_priv->gamma4 = value; } else if (attribute == intel_xv_Gamma5 && (INTEL_INFO(intel)->gen >= 030)) { adaptor_priv->gamma5 = value; } else if (attribute == intel_xv_ColorKey) { adaptor_priv->colorKey = value; OVERLAY_DEBUG("COLORKEY\n"); } else return BadMatch; if ((attribute == intel_xv_Gamma0 || attribute == intel_xv_Gamma1 || attribute == intel_xv_Gamma2 || attribute == intel_xv_Gamma3 || attribute == intel_xv_Gamma4 || attribute == intel_xv_Gamma5) && (INTEL_INFO(intel)->gen >= 030)) { OVERLAY_DEBUG("GAMMA\n"); } if (!intel_overlay_update_attrs(intel)) return BadValue; if (attribute == intel_xv_ColorKey) REGION_EMPTY(scrn->pScreen, &adaptor_priv->clip); return Success; } static Bool intel_overlay_put_image(intel_screen_private *intel, xf86CrtcPtr crtc, int id, short width, short height, int dstPitch, int dstPitch2, BoxPtr dstBox, short src_w, short src_h, short drw_w, short drw_h) { intel_adaptor_private *adaptor_priv = intel_get_adaptor_private(intel); struct drm_intel_overlay_put_image request; int ret; int planar = is_planar_fourcc(id); float scale; dri_bo *tmp; request.flags = I915_OVERLAY_ENABLE; request.bo_handle = adaptor_priv->buf->handle; if (planar) { request.stride_Y = dstPitch2; request.stride_UV = dstPitch; } else { request.stride_Y = dstPitch; request.stride_UV = 0; } request.offset_Y = adaptor_priv->YBufOffset; request.offset_U = adaptor_priv->UBufOffset; request.offset_V = adaptor_priv->VBufOffset; OVERLAY_DEBUG("off_Y: %i, off_U: %i, off_V: %i\n", request.offset_Y, request.offset_U, request.offset_V); request.crtc_id = intel_crtc_id(crtc); request.dst_x = dstBox->x1; request.dst_y = dstBox->y1; request.dst_width = dstBox->x2 - dstBox->x1; request.dst_height = dstBox->y2 - dstBox->y1; request.src_width = width; request.src_height = height; /* adjust src dimensions */ if (request.dst_height > 1) { scale = ((float)request.dst_height - 1) / ((float)drw_h - 1); request.src_scan_height = src_h * scale; } else request.src_scan_height = 1; if (request.dst_width > 1) { scale = ((float)request.dst_width - 1) / ((float)drw_w - 1); request.src_scan_width = src_w * scale; } else request.src_scan_width = 1; if (planar) { request.flags |= I915_OVERLAY_YUV_PLANAR | I915_OVERLAY_YUV420; } else { request.flags |= I915_OVERLAY_YUV_PACKED | I915_OVERLAY_YUV422; if (id == FOURCC_UYVY) request.flags |= I915_OVERLAY_Y_SWAP; } ret = drmCommandWrite(intel->drmSubFD, DRM_I915_OVERLAY_PUT_IMAGE, &request, sizeof(request)); if (ret) return FALSE; if (!adaptor_priv->reusable) { drm_intel_bo_unreference(adaptor_priv->buf); adaptor_priv->buf = NULL; adaptor_priv->reusable = TRUE; } tmp = adaptor_priv->old_buf[1]; adaptor_priv->old_buf[1] = adaptor_priv->old_buf[0]; adaptor_priv->old_buf[0] = adaptor_priv->buf; adaptor_priv->buf = tmp; return TRUE; } static void intel_update_dst_box_to_crtc_coords(ScrnInfoPtr scrn, xf86CrtcPtr crtc, BoxPtr dstBox) { int tmp; /* for overlay, we should take it from crtc's screen * coordinate to current crtc's display mode. * yeah, a bit confusing. */ switch (crtc->rotation & 0xf) { case RR_Rotate_0: dstBox->x1 -= crtc->x; dstBox->x2 -= crtc->x; dstBox->y1 -= crtc->y; dstBox->y2 -= crtc->y; break; case RR_Rotate_90: tmp = dstBox->x1; dstBox->x1 = dstBox->y1 - crtc->x; dstBox->y1 = scrn->virtualX - tmp - crtc->y; tmp = dstBox->x2; dstBox->x2 = dstBox->y2 - crtc->x; dstBox->y2 = scrn->virtualX - tmp - crtc->y; tmp = dstBox->y1; dstBox->y1 = dstBox->y2; dstBox->y2 = tmp; break; case RR_Rotate_180: tmp = dstBox->x1; dstBox->x1 = scrn->virtualX - dstBox->x2 - crtc->x; dstBox->x2 = scrn->virtualX - tmp - crtc->x; tmp = dstBox->y1; dstBox->y1 = scrn->virtualY - dstBox->y2 - crtc->y; dstBox->y2 = scrn->virtualY - tmp - crtc->y; break; case RR_Rotate_270: tmp = dstBox->x1; dstBox->x1 = scrn->virtualY - dstBox->y1 - crtc->x; dstBox->y1 = tmp - crtc->y; tmp = dstBox->x2; dstBox->x2 = scrn->virtualY - dstBox->y2 - crtc->x; dstBox->y2 = tmp - crtc->y; tmp = dstBox->x1; dstBox->x1 = dstBox->x2; dstBox->x2 = tmp; break; } return; } static Bool intel_video_overlay_display(ScrnInfoPtr scrn, xf86CrtcPtr crtc, int id, short width, short height, int dstPitch, int dstPitch2, BoxPtr dstBox, short src_w, short src_h, short drw_w, short drw_h) { intel_screen_private *intel = intel_get_screen_private(scrn); int tmp; OVERLAY_DEBUG("I830DisplayVideo: %dx%d (pitch %d)\n", width, height, dstPitch); /* * If the video isn't visible on any CRTC, turn it off */ if (!crtc) { intel_video_overlay_off(intel); return TRUE; } intel_update_dst_box_to_crtc_coords(scrn, crtc, dstBox); if (crtc->rotation & (RR_Rotate_90 | RR_Rotate_270)) { tmp = width; width = height; height = tmp; tmp = drw_w; drw_w = drw_h; drw_h = tmp; tmp = src_w; src_w = src_h; src_h = tmp; } return intel_overlay_put_image(intel, crtc, id, width, height, dstPitch, dstPitch2, dstBox, src_w, src_h, drw_w, drw_h); } static int intel_video_overlay_put_image(ScrnInfoPtr scrn, short src_x, short src_y, short drw_x, short drw_y, short src_w, short src_h, short drw_w, short drw_h, int id, unsigned char *buf, short width, short height, Bool sync, RegionPtr clipBoxes, pointer data, DrawablePtr drawable) { intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data; int dstPitch, dstPitch2; BoxRec dstBox; xf86CrtcPtr crtc; int top, left, npixels, nlines; #if 0 ErrorF("I830PutImage: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d)\n" "width %d, height %d\n", src_x, src_y, src_w, src_h, drw_x, drw_y, drw_w, drw_h, width, height); #endif /* If dst width and height are less than 1/8th the src size, the * src/dst scale factor becomes larger than 8 and doesn't fit in * the scale register. */ if (src_w >= (drw_w * 8)) drw_w = src_w / 7; if (src_h >= (drw_h * 8)) drw_h = src_h / 7; if (!intel_clip_video_helper(scrn, adaptor_priv, &crtc, &dstBox, src_x, src_y, drw_x, drw_y, src_w, src_h, drw_w, drw_h, id, &top, &left, &npixels, &nlines, clipBoxes, width, height)) return Success; /* overlay can't handle rotation natively, store it for the copy func */ if (crtc) adaptor_priv->rotation = crtc->rotation; else { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "Fail to clip video to any crtc!\n"); return Success; } if (!intel_video_copy_data(scrn, adaptor_priv, width, height, &dstPitch, &dstPitch2, top, left, npixels, nlines, id, buf)) return BadAlloc; if (!intel_video_overlay_display (scrn, crtc, id, width, height, dstPitch, dstPitch2, &dstBox, src_w, src_h, drw_w, drw_h)) return BadAlloc; /* update cliplist */ if (!REGION_EQUAL(scrn->pScreen, &adaptor_priv->clip, clipBoxes)) { REGION_COPY(scrn->pScreen, &adaptor_priv->clip, clipBoxes); xf86XVFillKeyHelperDrawable(drawable, adaptor_priv->colorKey, clipBoxes); } adaptor_priv->videoStatus = CLIENT_VIDEO_ON; return Success; } XF86VideoAdaptorPtr intel_video_overlay_setup_image(ScreenPtr screen) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); XF86VideoAdaptorPtr adapt; intel_adaptor_private *adaptor_priv; XF86AttributePtr att; /* Set up overlay video if it is available */ intel->use_overlay = intel_has_overlay(intel); if (!intel->use_overlay) return NULL; OVERLAY_DEBUG("intel_video_overlay_setup_image\n"); if (!(adapt = calloc(1, sizeof(XF86VideoAdaptorRec) + sizeof(intel_adaptor_private) + sizeof(DevUnion)))) return NULL; adapt->type = XvWindowMask | XvInputMask | XvImageMask; adapt->flags = VIDEO_OVERLAID_IMAGES /*| VIDEO_CLIP_TO_VIEWPORT */ ; adapt->name = "Intel(R) Video Overlay"; adapt->nEncodings = 1; adapt->pEncodings = xnfalloc(sizeof(intel_xv_dummy_encoding)); memcpy(adapt->pEncodings, intel_xv_dummy_encoding, sizeof(intel_xv_dummy_encoding)); if (IS_845G(intel) || IS_I830(intel)) { adapt->pEncodings->width = IMAGE_MAX_WIDTH_LEGACY; adapt->pEncodings->height = IMAGE_MAX_HEIGHT_LEGACY; } adapt->nFormats = NUM_FORMATS; adapt->pFormats = intel_xv_formats; adapt->nPorts = 1; adapt->pPortPrivates = (DevUnion *) (&adapt[1]); adaptor_priv = (intel_adaptor_private *)&adapt->pPortPrivates[1]; adapt->pPortPrivates[0].ptr = (pointer) (adaptor_priv); adapt->nAttributes = NUM_ATTRIBUTES; if (INTEL_INFO(intel)->gen >= 030) adapt->nAttributes += GAMMA_ATTRIBUTES; /* has gamma */ adapt->pAttributes = xnfalloc(sizeof(XF86AttributeRec) * adapt->nAttributes); /* Now copy the attributes */ att = adapt->pAttributes; memcpy((char *)att, (char *)intel_xv_attributes, sizeof(XF86AttributeRec) * NUM_ATTRIBUTES); att += NUM_ATTRIBUTES; if (INTEL_INFO(intel)->gen >= 030) { memcpy((char *)att, (char *)intel_xv_gamma_attributes, sizeof(XF86AttributeRec) * GAMMA_ATTRIBUTES); } adapt->nImages = NUM_IMAGES - XVMC_IMAGE; adapt->pImages = intel_xv_images; adapt->PutVideo = NULL; adapt->PutStill = NULL; adapt->GetVideo = NULL; adapt->GetStill = NULL; adapt->StopVideo = intel_video_stop_video; adapt->SetPortAttribute = intel_video_overlay_set_port_attribute; adapt->GetPortAttribute = intel_video_get_port_attribute; adapt->QueryBestSize = intel_video_query_best_size; adapt->PutImage = intel_video_overlay_put_image; adapt->QueryImageAttributes = intel_video_query_image_attributes; adaptor_priv->textured = FALSE; adaptor_priv->colorKey = intel->colorKey & ((1 << scrn->depth) - 1); adaptor_priv->videoStatus = 0; adaptor_priv->brightness = -19; /* (255/219) * -16 */ adaptor_priv->contrast = 75; /* 255/219 * 64 */ adaptor_priv->saturation = 146; /* 128/112 * 128 */ adaptor_priv->desired_crtc = NULL; adaptor_priv->buf = NULL; adaptor_priv->old_buf[0] = NULL; adaptor_priv->old_buf[1] = NULL; adaptor_priv->gamma5 = 0xc0c0c0; adaptor_priv->gamma4 = 0x808080; adaptor_priv->gamma3 = 0x404040; adaptor_priv->gamma2 = 0x202020; adaptor_priv->gamma1 = 0x101010; adaptor_priv->gamma0 = 0x080808; adaptor_priv->rotation = RR_Rotate_0; /* gotta uninit this someplace */ REGION_NULL(screen, &adaptor_priv->clip); intel->adaptor = adapt; intel_xv_ColorKey = MAKE_ATOM("XV_COLORKEY"); intel_xv_Brightness = MAKE_ATOM("XV_BRIGHTNESS"); intel_xv_Contrast = MAKE_ATOM("XV_CONTRAST"); intel_xv_Saturation = MAKE_ATOM("XV_SATURATION"); /* Allow the pipe to be switched from pipe A to B when in clone mode */ intel_xv_Pipe = MAKE_ATOM("XV_PIPE"); if (INTEL_INFO(intel)->gen >= 030) { intel_xv_Gamma0 = MAKE_ATOM("XV_GAMMA0"); intel_xv_Gamma1 = MAKE_ATOM("XV_GAMMA1"); intel_xv_Gamma2 = MAKE_ATOM("XV_GAMMA2"); intel_xv_Gamma3 = MAKE_ATOM("XV_GAMMA3"); intel_xv_Gamma4 = MAKE_ATOM("XV_GAMMA4"); intel_xv_Gamma5 = MAKE_ATOM("XV_GAMMA5"); } intel_overlay_update_attrs(intel); return adapt; } xf86-video-intel-2.99.917/src/uxa/intel_dri.c0000664000175000017500000012246012441617516015444 00000000000000/************************************************************************** Copyright 2001 VA Linux Systems Inc., Fremont, California. Copyright © 2002 by David Dawes All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation on the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * Authors: Jeff Hartmann * David Dawes * Keith Whitwell */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include #include #include #include #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "xf86Pci.h" #include "xf86drm.h" #include "windowstr.h" #include "shadow.h" #include "fb.h" #include "intel.h" #include "i830_reg.h" #include "i915_drm.h" #include "dri2.h" #if USE_UXA #include "intel_uxa.h" #endif typedef struct { int refcnt; PixmapPtr pixmap; } I830DRI2BufferPrivateRec, *I830DRI2BufferPrivatePtr; #if HAS_DEVPRIVATEKEYREC static DevPrivateKeyRec i830_client_key; #else static int i830_client_key; #endif static uint32_t pixmap_flink(PixmapPtr pixmap) { struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap); uint32_t name; if (priv == NULL || priv->bo == NULL) return 0; if (dri_bo_flink(priv->bo, &name) != 0) return 0; priv->pinned |= PIN_DRI2; return name; } static PixmapPtr get_front_buffer(DrawablePtr drawable) { PixmapPtr pixmap; pixmap = get_drawable_pixmap(drawable); if (!intel_get_pixmap_bo(pixmap)) return NULL; pixmap->refcnt++; return pixmap; } #if DRI2INFOREC_VERSION < 2 static DRI2BufferPtr I830DRI2CreateBuffers(DrawablePtr drawable, unsigned int *attachments, int count) { ScreenPtr screen = drawable->pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); DRI2BufferPtr buffers; I830DRI2BufferPrivatePtr privates; PixmapPtr pixmap, pDepthPixmap; int i; buffers = calloc(count, sizeof *buffers); if (buffers == NULL) return NULL; privates = calloc(count, sizeof *privates); if (privates == NULL) { free(buffers); return NULL; } pDepthPixmap = NULL; for (i = 0; i < count; i++) { pixmap = NULL; if (attachments[i] == DRI2BufferFrontLeft) { pixmap = get_front_buffer(drawable); if (pixmap == NULL) drawable = &(get_drawable_pixmap(drawable)->drawable); } else if (attachments[i] == DRI2BufferStencil && pDepthPixmap) { pixmap = pDepthPixmap; pixmap->refcnt++; } if (pixmap == NULL) { unsigned int hint = INTEL_CREATE_PIXMAP_DRI2; if (intel->tiling & INTEL_TILING_3D) { switch (attachments[i]) { case DRI2BufferDepth: if (SUPPORTS_YTILING(intel)) hint |= INTEL_CREATE_PIXMAP_TILING_Y; else hint |= INTEL_CREATE_PIXMAP_TILING_X; break; case DRI2BufferFakeFrontLeft: case DRI2BufferFakeFrontRight: case DRI2BufferBackLeft: case DRI2BufferBackRight: hint |= INTEL_CREATE_PIXMAP_TILING_X; break; } } pixmap = screen->CreatePixmap(screen, drawable->width, drawable->height, drawable->depth, hint); if (pixmap == NULL || intel_get_pixmap_bo(pixmap) == NULL) { if (pixmap) screen->DestroyPixmap(pixmap); goto unwind; } } if (attachments[i] == DRI2BufferDepth) pDepthPixmap = pixmap; buffers[i].attachment = attachments[i]; buffers[i].pitch = pixmap->devKind; buffers[i].cpp = pixmap->drawable.bitsPerPixel / 8; buffers[i].driverPrivate = &privates[i]; buffers[i].flags = 0; /* not tiled */ privates[i].refcnt = 1; privates[i].pixmap = pixmap; if ((buffers[i].name = pixmap_flink(pixmap)) == 0) { /* failed to name buffer */ screen->DestroyPixmap(pixmap); goto unwind; } } return buffers; unwind: while (i--) screen->DestroyPixmap(privates[i].pixmap); free(privates); free(buffers); return NULL; } static void I830DRI2DestroyBuffers(DrawablePtr drawable, DRI2BufferPtr buffers, int count) { ScreenPtr screen = drawable->pScreen; I830DRI2BufferPrivatePtr private; int i; for (i = 0; i < count; i++) { private = buffers[i].driverPrivate; screen->DestroyPixmap(private->pixmap); } if (buffers) { free(buffers[0].driverPrivate); free(buffers); } } #else static DRI2Buffer2Ptr I830DRI2CreateBuffer(DrawablePtr drawable, unsigned int attachment, unsigned int format) { ScreenPtr screen = drawable->pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); DRI2Buffer2Ptr buffer; I830DRI2BufferPrivatePtr privates; PixmapPtr pixmap; buffer = calloc(1, sizeof *buffer); if (buffer == NULL) return NULL; privates = calloc(1, sizeof *privates); if (privates == NULL) { free(buffer); return NULL; } pixmap = NULL; if (attachment == DRI2BufferFrontLeft) { pixmap = get_front_buffer(drawable); if (pixmap == NULL) drawable = &(get_drawable_pixmap(drawable)->drawable); } if (pixmap == NULL) { unsigned int hint = INTEL_CREATE_PIXMAP_DRI2; int pixmap_width = drawable->width; int pixmap_height = drawable->height; int pixmap_cpp = (format != 0) ? format : drawable->depth; if (intel->tiling & INTEL_TILING_3D) { switch (attachment) { case DRI2BufferDepth: case DRI2BufferDepthStencil: case DRI2BufferHiz: if (SUPPORTS_YTILING(intel)) { hint |= INTEL_CREATE_PIXMAP_TILING_Y; break; } case DRI2BufferAccum: case DRI2BufferBackLeft: case DRI2BufferBackRight: case DRI2BufferFakeFrontLeft: case DRI2BufferFakeFrontRight: case DRI2BufferFrontLeft: case DRI2BufferFrontRight: hint |= INTEL_CREATE_PIXMAP_TILING_X; break; case DRI2BufferStencil: /* * The stencil buffer is W tiled. However, we * request from the kernel a non-tiled buffer * because the GTT is incapable of W fencing. */ hint |= INTEL_CREATE_PIXMAP_TILING_NONE; break; default: free(privates); free(buffer); return NULL; } } /* * The stencil buffer has quirky pitch requirements. From Vol * 2a, 11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface * Pitch": * The pitch must be set to 2x the value computed based on * width, as the stencil buffer is stored with two rows * interleaved. * To accomplish this, we resort to the nasty hack of doubling * the drm region's cpp and halving its height. * * If we neglect to double the pitch, then render corruption * occurs. */ if (attachment == DRI2BufferStencil) { pixmap_width = ALIGN(pixmap_width, 64); pixmap_height = ALIGN((pixmap_height + 1) / 2, 64); pixmap_cpp *= 2; } pixmap = screen->CreatePixmap(screen, pixmap_width, pixmap_height, pixmap_cpp, hint); if (pixmap == NULL || intel_get_pixmap_bo(pixmap) == NULL) { if (pixmap) screen->DestroyPixmap(pixmap); free(privates); free(buffer); return NULL; } } buffer->attachment = attachment; buffer->pitch = pixmap->devKind; buffer->cpp = pixmap->drawable.bitsPerPixel / 8; buffer->driverPrivate = privates; buffer->format = format; buffer->flags = 0; /* not tiled */ privates->refcnt = 1; privates->pixmap = pixmap; if ((buffer->name = pixmap_flink(pixmap)) == 0) { /* failed to name buffer */ screen->DestroyPixmap(pixmap); free(privates); free(buffer); return NULL; } return buffer; } static void I830DRI2DestroyBuffer(DrawablePtr drawable, DRI2Buffer2Ptr buffer) { if (buffer && buffer->driverPrivate) { I830DRI2BufferPrivatePtr private = buffer->driverPrivate; if (--private->refcnt == 0) { ScreenPtr screen = private->pixmap->drawable.pScreen; screen->DestroyPixmap(private->pixmap); free(private); free(buffer); } } else free(buffer); } #endif static void I830DRI2CopyRegion(DrawablePtr drawable, RegionPtr pRegion, DRI2BufferPtr destBuffer, DRI2BufferPtr sourceBuffer) { I830DRI2BufferPrivatePtr srcPrivate = sourceBuffer->driverPrivate; I830DRI2BufferPrivatePtr dstPrivate = destBuffer->driverPrivate; ScreenPtr screen = drawable->pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); DrawablePtr src = (sourceBuffer->attachment == DRI2BufferFrontLeft) ? drawable : &srcPrivate->pixmap->drawable; DrawablePtr dst = (destBuffer->attachment == DRI2BufferFrontLeft) ? drawable : &dstPrivate->pixmap->drawable; RegionPtr pCopyClip; GCPtr gc; gc = GetScratchGC(dst->depth, screen); if (!gc) return; pCopyClip = REGION_CREATE(screen, NULL, 0); REGION_COPY(screen, pCopyClip, pRegion); (*gc->funcs->ChangeClip) (gc, CT_REGION, pCopyClip, 0); ValidateGC(dst, gc); /* Wait for the scanline to be outside the region to be copied */ if (scrn->vtSema && pixmap_is_scanout(get_drawable_pixmap(dst)) && intel->swapbuffers_wait && INTEL_INFO(intel)->gen < 060) { BoxPtr box; BoxRec crtcbox; int y1, y2; int event, load_scan_lines_pipe; xf86CrtcPtr crtc; Bool full_height = FALSE; box = REGION_EXTENTS(unused, gc->pCompositeClip); crtc = intel_covering_crtc(scrn, box, NULL, &crtcbox); /* * Make sure the CRTC is valid and this is the real front * buffer */ if (crtc != NULL && !crtc->rotatedData) { int pipe = intel_crtc_to_pipe(crtc); /* * Make sure we don't wait for a scanline that will * never occur */ y1 = (crtcbox.y1 <= box->y1) ? box->y1 - crtcbox.y1 : 0; y2 = (box->y2 <= crtcbox.y2) ? box->y2 - crtcbox.y1 : crtcbox.y2 - crtcbox.y1; if (y1 == 0 && y2 == (crtcbox.y2 - crtcbox.y1)) full_height = TRUE; /* * Pre-965 doesn't have SVBLANK, so we need a bit * of extra time for the blitter to start up and * do its job for a full height blit */ if (full_height && INTEL_INFO(intel)->gen < 040) y2 -= 2; if (pipe == 0) { event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW; load_scan_lines_pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEA; if (full_height && INTEL_INFO(intel)->gen >= 040) event = MI_WAIT_FOR_PIPEA_SVBLANK; } else { event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW; load_scan_lines_pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEB; if (full_height && INTEL_INFO(intel)->gen >= 040) event = MI_WAIT_FOR_PIPEB_SVBLANK; } if (crtc->mode.Flags & V_INTERLACE) { /* DSL count field lines */ y1 /= 2; y2 /= 2; } BEGIN_BATCH(5); /* * The documentation says that the LOAD_SCAN_LINES * command always comes in pairs. Don't ask me why. */ OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | load_scan_lines_pipe); OUT_BATCH((y1 << 16) | (y2-1)); OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | load_scan_lines_pipe); OUT_BATCH((y1 << 16) | (y2-1)); OUT_BATCH(MI_WAIT_FOR_EVENT | event); ADVANCE_BATCH(); } } /* It's important that this copy gets submitted before the * direct rendering client submits rendering for the next * frame, but we don't actually need to submit right now. The * client will wait for the DRI2CopyRegion reply or the swap * buffer event before rendering, and we'll hit the flush * callback chain before those messages are sent. We submit * our batch buffers from the flush callback chain so we know * that will happen before the client tries to render * again. */ gc->ops->CopyArea(src, dst, gc, 0, 0, drawable->width, drawable->height, 0, 0); FreeScratchGC(gc); /* And make sure the WAIT_FOR_EVENT is queued before any * modesetting/dpms operations on the pipe. */ intel_batch_submit(scrn); } static void I830DRI2FallbackBlitSwap(DrawablePtr drawable, DRI2BufferPtr dst, DRI2BufferPtr src) { BoxRec box; RegionRec region; box.x1 = 0; box.y1 = 0; box.x2 = drawable->width; box.y2 = drawable->height; REGION_INIT(pScreen, ®ion, &box, 0); I830DRI2CopyRegion(drawable, ®ion, dst, src); } #if DRI2INFOREC_VERSION >= 4 static void I830DRI2ReferenceBuffer(DRI2Buffer2Ptr buffer) { if (buffer) { I830DRI2BufferPrivatePtr private = buffer->driverPrivate; private->refcnt++; } } static xf86CrtcPtr I830DRI2DrawableCrtc(DrawablePtr pDraw) { ScreenPtr pScreen = pDraw->pScreen; ScrnInfoPtr pScrn = xf86ScreenToScrn(pScreen); BoxRec box, crtcbox; xf86CrtcPtr crtc = NULL; box.x1 = pDraw->x; box.y1 = pDraw->y; box.x2 = box.x1 + pDraw->width; box.y2 = box.y1 + pDraw->height; if (pDraw->type != DRAWABLE_PIXMAP) crtc = intel_covering_crtc(pScrn, &box, NULL, &crtcbox); /* Make sure the CRTC is valid and this is the real front buffer */ if (crtc != NULL && !crtc->rotatedData) return crtc; return NULL; } static RESTYPE frame_event_client_type, frame_event_drawable_type; struct i830_dri2_resource { XID id; RESTYPE type; struct list list; }; static struct i830_dri2_resource * get_resource(XID id, RESTYPE type) { struct i830_dri2_resource *resource; void *ptr; ptr = NULL; dixLookupResourceByType(&ptr, id, type, NULL, DixWriteAccess); if (ptr) return ptr; resource = malloc(sizeof(*resource)); if (resource == NULL) return NULL; if (!AddResource(id, type, resource)) { free(resource); return NULL; } resource->id = id; resource->type = type; list_init(&resource->list); return resource; } static int i830_dri2_frame_event_client_gone(void *data, XID id) { struct i830_dri2_resource *resource = data; while (!list_is_empty(&resource->list)) { DRI2FrameEventPtr info = list_first_entry(&resource->list, DRI2FrameEventRec, client_resource); list_del(&info->client_resource); info->client = NULL; } free(resource); return Success; } static int i830_dri2_frame_event_drawable_gone(void *data, XID id) { struct i830_dri2_resource *resource = data; while (!list_is_empty(&resource->list)) { DRI2FrameEventPtr info = list_first_entry(&resource->list, DRI2FrameEventRec, drawable_resource); list_del(&info->drawable_resource); info->drawable_id = None; } free(resource); return Success; } static Bool i830_dri2_register_frame_event_resource_types(void) { frame_event_client_type = CreateNewResourceType(i830_dri2_frame_event_client_gone, "Frame Event Client"); if (!frame_event_client_type) return FALSE; frame_event_drawable_type = CreateNewResourceType(i830_dri2_frame_event_drawable_gone, "Frame Event Drawable"); if (!frame_event_drawable_type) return FALSE; return TRUE; } static XID get_client_id(ClientPtr client) { #if HAS_DIXREGISTERPRIVATEKEY XID *ptr = dixGetPrivateAddr(&client->devPrivates, &i830_client_key); #else XID *ptr = dixLookupPrivate(&client->devPrivates, &i830_client_key); #endif if (*ptr == 0) *ptr = FakeClientID(client->index); return *ptr; } /* * Hook this frame event into the server resource * database so we can clean it up if the drawable or * client exits while the swap is pending */ static Bool i830_dri2_add_frame_event(DRI2FrameEventPtr info) { struct i830_dri2_resource *resource; resource = get_resource(get_client_id(info->client), frame_event_client_type); if (resource == NULL) return FALSE; list_add(&info->client_resource, &resource->list); resource = get_resource(info->drawable_id, frame_event_drawable_type); if (resource == NULL) { list_del(&info->client_resource); return FALSE; } list_add(&info->drawable_resource, &resource->list); return TRUE; } static void i830_dri2_del_frame_event(DRI2FrameEventPtr info) { list_del(&info->client_resource); list_del(&info->drawable_resource); if (info->front) I830DRI2DestroyBuffer(NULL, info->front); if (info->back) I830DRI2DestroyBuffer(NULL, info->back); free(info); } static struct intel_uxa_pixmap * intel_exchange_pixmap_buffers(struct intel_screen_private *intel, PixmapPtr front, PixmapPtr back) { struct intel_uxa_pixmap *new_front = NULL, *new_back; RegionRec region; /* Post damage on the front buffer so that listeners, such * as DisplayLink know take a copy and shove it over the USB. * also for sw cursors. */ region.extents.x1 = region.extents.y1 = 0; region.extents.x2 = front->drawable.width; region.extents.y2 = front->drawable.height; region.data = NULL; DamageRegionAppend(&front->drawable, ®ion); new_front = intel_uxa_get_pixmap_private(back); new_back = intel_uxa_get_pixmap_private(front); intel_uxa_set_pixmap_private(front, new_front); intel_uxa_set_pixmap_private(back, new_back); new_front->busy = 1; new_back->busy = -1; DamageRegionProcessPending(&front->drawable); return new_front; } static void I830DRI2ExchangeBuffers(struct intel_screen_private *intel, DRI2BufferPtr front, DRI2BufferPtr back) { I830DRI2BufferPrivatePtr front_priv, back_priv; int tmp; struct intel_uxa_pixmap *new_front; front_priv = front->driverPrivate; back_priv = back->driverPrivate; /* Swap BO names so DRI works */ tmp = front->name; front->name = back->name; back->name = tmp; /* Swap pixmap bos */ new_front = intel_exchange_pixmap_buffers(intel, front_priv->pixmap, back_priv->pixmap); dri_bo_unreference (intel->front_buffer); intel->front_buffer = new_front->bo; dri_bo_reference (intel->front_buffer); } static drm_intel_bo *get_pixmap_bo(I830DRI2BufferPrivatePtr priv) { drm_intel_bo *bo = intel_get_pixmap_bo(priv->pixmap); assert(bo != NULL); /* guaranteed by construction of the DRI2 buffer */ return bo; } static void I830DRI2FlipComplete(uint64_t frame, uint64_t usec, void *pageflip_data) { DRI2FrameEventPtr info = pageflip_data; I830DRI2FlipEventHandler((uint32_t) frame, usec / 1000000, usec % 1000000, info); } static void I830DRI2FlipAbort(void *pageflip_data) { DRI2FrameEventPtr info = pageflip_data; i830_dri2_del_frame_event(info); } /* * Our internal swap routine takes care of actually exchanging, blitting, or * flipping buffers as necessary. */ static Bool I830DRI2ScheduleFlip(struct intel_screen_private *intel, DrawablePtr draw, DRI2FrameEventPtr info) { I830DRI2BufferPrivatePtr priv = info->back->driverPrivate; drm_intel_bo *new_back, *old_back; int tmp_name; if (!intel->use_triple_buffer) { info->type = DRI2_SWAP; if (!intel_do_pageflip(intel, get_pixmap_bo(priv), info->pipe, FALSE, info, I830DRI2FlipComplete, I830DRI2FlipAbort)) return FALSE; I830DRI2ExchangeBuffers(intel, info->front, info->back); return TRUE; } if (intel->pending_flip[info->pipe]) { assert(intel->pending_flip[info->pipe]->chain == NULL); intel->pending_flip[info->pipe]->chain = info; return TRUE; } if (intel->back_buffer == NULL) { new_back = drm_intel_bo_alloc(intel->bufmgr, "front buffer", intel->front_buffer->size, 0); if (new_back == NULL) return FALSE; if (intel->front_tiling != I915_TILING_NONE) { uint32_t tiling = intel->front_tiling; drm_intel_bo_set_tiling(new_back, &tiling, intel->front_pitch); if (tiling != intel->front_tiling) { drm_intel_bo_unreference(new_back); return FALSE; } } drm_intel_bo_disable_reuse(new_back); dri_bo_flink(new_back, &intel->back_name); } else { new_back = intel->back_buffer; intel->back_buffer = NULL; } old_back = get_pixmap_bo(priv); if (!intel_do_pageflip(intel, old_back, info->pipe, FALSE, info, I830DRI2FlipComplete, I830DRI2FlipAbort)) { intel->back_buffer = new_back; return FALSE; } info->type = DRI2_SWAP_CHAIN; intel->pending_flip[info->pipe] = info; priv = info->front->driverPrivate; /* Exchange the current front-buffer with the fresh bo */ intel->back_buffer = intel->front_buffer; drm_intel_bo_reference(intel->back_buffer); intel_set_pixmap_bo(priv->pixmap, new_back); drm_intel_bo_unreference(new_back); tmp_name = info->front->name; info->front->name = intel->back_name; intel->back_name = tmp_name; /* Then flip DRI2 pointers and update the screen pixmap */ I830DRI2ExchangeBuffers(intel, info->front, info->back); DRI2SwapComplete(info->client, draw, 0, 0, 0, DRI2_EXCHANGE_COMPLETE, info->event_complete, info->event_data); return TRUE; } static Bool can_exchange(DrawablePtr drawable, DRI2BufferPtr front, DRI2BufferPtr back) { ScrnInfoPtr pScrn = xf86ScreenToScrn(drawable->pScreen); struct intel_screen_private *intel = intel_get_screen_private(pScrn); I830DRI2BufferPrivatePtr front_priv = front->driverPrivate; I830DRI2BufferPrivatePtr back_priv = back->driverPrivate; PixmapPtr front_pixmap = front_priv->pixmap; PixmapPtr back_pixmap = back_priv->pixmap; struct intel_uxa_pixmap *front_intel = intel_uxa_get_pixmap_private(front_pixmap); struct intel_uxa_pixmap *back_intel = intel_uxa_get_pixmap_private(back_pixmap); if (!pScrn->vtSema) return FALSE; if (I830DRI2DrawableCrtc(drawable) == NULL) return FALSE; if (!DRI2CanFlip(drawable)) return FALSE; if (intel->shadow_present) return FALSE; if (!intel->use_pageflipping) return FALSE; if (front_pixmap->drawable.width != back_pixmap->drawable.width) return FALSE; if (front_pixmap->drawable.height != back_pixmap->drawable.height) return FALSE; /* XXX should we be checking depth instead of bpp? */ #if 0 if (front_pixmap->drawable.depth != back_pixmap->drawable.depth) return FALSE; #else if (front_pixmap->drawable.bitsPerPixel != back_pixmap->drawable.bitsPerPixel) return FALSE; #endif /* prevent an implicit tiling mode change */ if (front_intel->tiling != back_intel->tiling) return FALSE; if (front_intel->pinned & ~(PIN_SCANOUT | PIN_DRI2)) return FALSE; return TRUE; } void I830DRI2FrameEventHandler(unsigned int frame, unsigned int tv_sec, unsigned int tv_usec, DRI2FrameEventPtr swap_info) { intel_screen_private *intel = swap_info->intel; DrawablePtr drawable; int status; if (!swap_info->drawable_id) status = BadDrawable; else status = dixLookupDrawable(&drawable, swap_info->drawable_id, serverClient, M_ANY, DixWriteAccess); if (status != Success) { i830_dri2_del_frame_event(swap_info); return; } switch (swap_info->type) { case DRI2_FLIP: /* If we can still flip... */ if (can_exchange(drawable, swap_info->front, swap_info->back) && I830DRI2ScheduleFlip(intel, drawable, swap_info)) return; /* else fall through to exchange/blit */ case DRI2_SWAP: { I830DRI2FallbackBlitSwap(drawable, swap_info->front, swap_info->back); DRI2SwapComplete(swap_info->client, drawable, frame, tv_sec, tv_usec, DRI2_BLIT_COMPLETE, swap_info->client ? swap_info->event_complete : NULL, swap_info->event_data); break; } case DRI2_WAITMSC: if (swap_info->client) DRI2WaitMSCComplete(swap_info->client, drawable, frame, tv_sec, tv_usec); break; default: xf86DrvMsg(intel->scrn->scrnIndex, X_WARNING, "%s: unknown vblank event received\n", __func__); /* Unknown type */ break; } i830_dri2_del_frame_event(swap_info); } void I830DRI2FlipEventHandler(unsigned int frame, unsigned int tv_sec, unsigned int tv_usec, DRI2FrameEventPtr flip_info) { struct intel_screen_private *intel = flip_info->intel; DrawablePtr drawable; DRI2FrameEventPtr chain; drawable = NULL; if (flip_info->drawable_id) dixLookupDrawable(&drawable, flip_info->drawable_id, serverClient, M_ANY, DixWriteAccess); /* We assume our flips arrive in order, so we don't check the frame */ switch (flip_info->type) { case DRI2_SWAP: if (!drawable) break; /* Check for too small vblank count of pageflip completion, taking wraparound * into account. This usually means some defective kms pageflip completion, * causing wrong (msc, ust) return values and possible visual corruption. */ if ((frame < flip_info->frame) && (flip_info->frame - frame < 5)) { static int limit = 5; /* XXX we are currently hitting this path with older * kernels, so make it quieter. */ if (limit) { xf86DrvMsg(intel->scrn->scrnIndex, X_WARNING, "%s: Pageflip completion has impossible msc %d < target_msc %d\n", __func__, frame, flip_info->frame); limit--; } /* All-0 values signal timestamping failure. */ frame = tv_sec = tv_usec = 0; } DRI2SwapComplete(flip_info->client, drawable, frame, tv_sec, tv_usec, DRI2_FLIP_COMPLETE, flip_info->client ? flip_info->event_complete : NULL, flip_info->event_data); break; case DRI2_SWAP_CHAIN: assert(intel->pending_flip[flip_info->pipe] == flip_info); intel->pending_flip[flip_info->pipe] = NULL; chain = flip_info->chain; if (chain) { DrawablePtr chain_drawable = NULL; if (chain->drawable_id) dixLookupDrawable(&chain_drawable, chain->drawable_id, serverClient, M_ANY, DixWriteAccess); if (chain_drawable == NULL) { i830_dri2_del_frame_event(chain); } else if (!can_exchange(chain_drawable, chain->front, chain->back) || !I830DRI2ScheduleFlip(intel, chain_drawable, chain)) { I830DRI2FallbackBlitSwap(chain_drawable, chain->front, chain->back); DRI2SwapComplete(chain->client, chain_drawable, frame, tv_sec, tv_usec, DRI2_BLIT_COMPLETE, chain->client ? chain->event_complete : NULL, chain->event_data); i830_dri2_del_frame_event(chain); } } break; default: xf86DrvMsg(intel->scrn->scrnIndex, X_WARNING, "%s: unknown vblank event received\n", __func__); /* Unknown type */ break; } i830_dri2_del_frame_event(flip_info); } static uint32_t pipe_select(int pipe) { if (pipe > 1) return pipe << DRM_VBLANK_HIGH_CRTC_SHIFT; else if (pipe > 0) return DRM_VBLANK_SECONDARY; else return 0; } static void intel_dri2_vblank_handler(ScrnInfoPtr scrn, xf86CrtcPtr crtc, uint64_t msc, uint64_t usec, void *data) { DRI2FrameEventPtr swap_info = data; I830DRI2FrameEventHandler((uint32_t) msc, usec / 1000000, usec % 1000000, swap_info); } static void intel_dri2_vblank_abort(ScrnInfoPtr scrn, xf86CrtcPtr crtc, void *data) { DRI2FrameEventPtr swap_info = data; i830_dri2_del_frame_event(swap_info); } /* * ScheduleSwap is responsible for requesting a DRM vblank event for the * appropriate frame. * * In the case of a blit (e.g. for a windowed swap) or buffer exchange, * the vblank requested can simply be the last queued swap frame + the swap * interval for the drawable. * * In the case of a page flip, we request an event for the last queued swap * frame + swap interval - 1, since we'll need to queue the flip for the frame * immediately following the received event. * * The client will be blocked if it tries to perform further GL commands * after queueing a swap, though in the Intel case after queueing a flip, the * client is free to queue more commands; they'll block in the kernel if * they access buffers busy with the flip. * * When the swap is complete, the driver should call into the server so it * can send any swap complete events that have been requested. */ static int I830DRI2ScheduleSwap(ClientPtr client, DrawablePtr draw, DRI2BufferPtr front, DRI2BufferPtr back, CARD64 *target_msc, CARD64 divisor, CARD64 remainder, DRI2SwapEventPtr func, void *data) { ScreenPtr screen = draw->pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); drmVBlank vbl; int ret; xf86CrtcPtr crtc = I830DRI2DrawableCrtc(draw); int pipe = crtc ? intel_crtc_to_pipe(crtc) : -1; int flip = 0; DRI2FrameEventPtr swap_info = NULL; enum DRI2FrameEventType swap_type = DRI2_SWAP; uint64_t current_msc, current_ust; uint64_t request_msc; uint32_t seq; /* Drawable not displayed... just complete the swap */ if (pipe == -1) goto blit_fallback; swap_info = calloc(1, sizeof(DRI2FrameEventRec)); if (!swap_info) goto blit_fallback; swap_info->intel = intel; swap_info->drawable_id = draw->id; swap_info->client = client; swap_info->event_complete = func; swap_info->event_data = data; swap_info->front = front; swap_info->back = back; swap_info->pipe = pipe; if (!i830_dri2_add_frame_event(swap_info)) { free(swap_info); swap_info = NULL; goto blit_fallback; } I830DRI2ReferenceBuffer(front); I830DRI2ReferenceBuffer(back); ret = intel_get_crtc_msc_ust(scrn, crtc, ¤t_msc, ¤t_ust); if (ret) goto blit_fallback; /* Flips need to be submitted one frame before */ if (can_exchange(draw, front, back)) { swap_type = DRI2_FLIP; flip = 1; } swap_info->type = swap_type; /* Correct target_msc by 'flip' if swap_type == DRI2_FLIP. * Do it early, so handling of different timing constraints * for divisor, remainder and msc vs. target_msc works. */ if (*target_msc > 0) *target_msc -= flip; /* * If divisor is zero, or current_msc is smaller than target_msc * we just need to make sure target_msc passes before initiating * the swap. */ if (divisor == 0 || current_msc < *target_msc) { /* * If we can, schedule the flip directly from here rather * than waiting for an event from the kernel for the current * (or a past) MSC. */ if (flip && divisor == 0 && current_msc >= *target_msc && I830DRI2ScheduleFlip(intel, draw, swap_info)) return TRUE; vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT | pipe_select(pipe); /* If non-pageflipping, but blitting/exchanging, we need to use * DRM_VBLANK_NEXTONMISS to avoid unreliable timestamping later * on. */ if (flip == 0) vbl.request.type |= DRM_VBLANK_NEXTONMISS; /* If target_msc already reached or passed, set it to * current_msc to ensure we return a reasonable value back * to the caller. This makes swap_interval logic more robust. */ if (current_msc >= *target_msc) *target_msc = current_msc; seq = intel_drm_queue_alloc(scrn, crtc, swap_info, intel_dri2_vblank_handler, intel_dri2_vblank_abort); if (!seq) goto blit_fallback; vbl.request.sequence = intel_crtc_msc_to_sequence(scrn, crtc, *target_msc); vbl.request.signal = seq; ret = drmWaitVBlank(intel->drmSubFD, &vbl); if (ret) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "divisor 0 get vblank counter failed: %s\n", strerror(errno)); goto blit_fallback; } *target_msc = intel_sequence_to_crtc_msc(crtc, vbl.reply.sequence + flip); swap_info->frame = *target_msc; return TRUE; } /* * If we get here, target_msc has already passed or we don't have one, * and we need to queue an event that will satisfy the divisor/remainder * equation. */ vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT | pipe_select(pipe); if (flip == 0) vbl.request.type |= DRM_VBLANK_NEXTONMISS; request_msc = current_msc - (current_msc % divisor) + remainder; /* * If the calculated deadline vbl.request.sequence is smaller than * or equal to current_msc, it means we've passed the last point * when effective onset frame seq could satisfy * seq % divisor == remainder, so we need to wait for the next time * this will happen. * This comparison takes the 1 frame swap delay in pageflipping mode * into account, as well as a potential DRM_VBLANK_NEXTONMISS delay * if we are blitting/exchanging instead of flipping. */ if (request_msc <= current_msc) request_msc += divisor; seq = intel_drm_queue_alloc(scrn, crtc, swap_info, intel_dri2_vblank_handler, intel_dri2_vblank_abort); if (!seq) goto blit_fallback; /* Account for 1 frame extra pageflip delay if flip > 0 */ vbl.request.sequence = intel_crtc_msc_to_sequence(scrn, crtc, request_msc) - flip; vbl.request.signal = seq; ret = drmWaitVBlank(intel->drmSubFD, &vbl); if (ret) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "final get vblank counter failed: %s\n", strerror(errno)); goto blit_fallback; } /* Adjust returned value for 1 fame pageflip offset of flip > 0 */ *target_msc = intel_sequence_to_crtc_msc(crtc, vbl.reply.sequence + flip); swap_info->frame = *target_msc; return TRUE; blit_fallback: I830DRI2FallbackBlitSwap(draw, front, back); DRI2SwapComplete(client, draw, 0, 0, 0, DRI2_BLIT_COMPLETE, func, data); if (swap_info) i830_dri2_del_frame_event(swap_info); *target_msc = 0; /* offscreen, so zero out target vblank count */ return TRUE; } static uint64_t gettime_us(void) { struct timespec tv; if (clock_gettime(CLOCK_MONOTONIC, &tv)) return 0; return (uint64_t)tv.tv_sec * 1000000 + tv.tv_nsec / 1000; } /* * Get current frame count and frame count timestamp, based on drawable's * crtc. */ static int I830DRI2GetMSC(DrawablePtr draw, CARD64 *ust, CARD64 *msc) { ScreenPtr screen = draw->pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); int ret; xf86CrtcPtr crtc = I830DRI2DrawableCrtc(draw); /* Drawable not displayed, make up a *monotonic* value */ if (crtc == NULL) { fail: *ust = gettime_us(); *msc = 0; return TRUE; } ret = intel_get_crtc_msc_ust(scrn, crtc, msc, ust); if (ret) { static int limit = 5; if (limit) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "%s:%d get vblank counter failed: %s\n", __FUNCTION__, __LINE__, strerror(errno)); limit--; } goto fail; } return TRUE; } /* * Request a DRM event when the requested conditions will be satisfied. * * We need to handle the event and ask the server to wake up the client when * we receive it. */ static int I830DRI2ScheduleWaitMSC(ClientPtr client, DrawablePtr draw, CARD64 target_msc, CARD64 divisor, CARD64 remainder) { ScreenPtr screen = draw->pScreen; ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); DRI2FrameEventPtr wait_info; drmVBlank vbl; int ret; xf86CrtcPtr crtc = I830DRI2DrawableCrtc(draw); int pipe = crtc ? intel_crtc_to_pipe(crtc) : -1; CARD64 current_msc, current_ust, request_msc; uint32_t seq; /* Drawable not visible, return immediately */ if (pipe == -1) goto out_complete; wait_info = calloc(1, sizeof(DRI2FrameEventRec)); if (!wait_info) goto out_complete; wait_info->intel = intel; wait_info->drawable_id = draw->id; wait_info->client = client; wait_info->type = DRI2_WAITMSC; if (!i830_dri2_add_frame_event(wait_info)) { free(wait_info); wait_info = NULL; goto out_complete; } /* Get current count */ ret = intel_get_crtc_msc_ust(scrn, crtc, ¤t_msc, ¤t_ust); if (ret) goto out_free; /* * If divisor is zero, or current_msc is smaller than target_msc, * we just need to make sure target_msc passes before waking up the * client. */ if (divisor == 0 || current_msc < target_msc) { /* If target_msc already reached or passed, set it to * current_msc to ensure we return a reasonable value back * to the caller. This keeps the client from continually * sending us MSC targets from the past by forcibly updating * their count on this call. */ seq = intel_drm_queue_alloc(scrn, crtc, wait_info, intel_dri2_vblank_handler, intel_dri2_vblank_abort); if (!seq) goto out_free; if (current_msc >= target_msc) target_msc = current_msc; vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT | pipe_select(pipe); vbl.request.sequence = intel_crtc_msc_to_sequence(scrn, crtc, target_msc); vbl.request.signal = seq; ret = drmWaitVBlank(intel->drmSubFD, &vbl); if (ret) { static int limit = 5; if (limit) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "%s:%d get vblank counter failed: %s\n", __FUNCTION__, __LINE__, strerror(errno)); limit--; } goto out_free; } wait_info->frame = intel_sequence_to_crtc_msc(crtc, vbl.reply.sequence); DRI2BlockClient(client, draw); return TRUE; } /* * If we get here, target_msc has already passed or we don't have one, * so we queue an event that will satisfy the divisor/remainder equation. */ vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT | pipe_select(pipe); request_msc = current_msc - (current_msc % divisor) + remainder; /* * If calculated remainder is larger than requested remainder, * it means we've passed the last point where * seq % divisor == remainder, so we need to wait for the next time * that will happen. */ if ((current_msc % divisor) >= remainder) request_msc += divisor; seq = intel_drm_queue_alloc(scrn, crtc, wait_info, intel_dri2_vblank_handler, intel_dri2_vblank_abort); if (!seq) goto out_free; vbl.request.sequence = intel_crtc_msc_to_sequence(scrn, crtc, request_msc); vbl.request.signal = seq; ret = drmWaitVBlank(intel->drmSubFD, &vbl); if (ret) { static int limit = 5; if (limit) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "%s:%d get vblank counter failed: %s\n", __FUNCTION__, __LINE__, strerror(errno)); limit--; } goto out_free; } wait_info->frame = intel_sequence_to_crtc_msc(crtc, vbl.reply.sequence); DRI2BlockClient(client, draw); return TRUE; out_free: i830_dri2_del_frame_event(wait_info); out_complete: DRI2WaitMSCComplete(client, draw, target_msc, 0, 0); return TRUE; } static int dri2_server_generation; #endif static int has_i830_dri(void) { return access(DRI_DRIVER_PATH "/i830_dri.so", R_OK) == 0; } static const char *dri_driver_name(intel_screen_private *intel) { #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,7,99,901,0) const char *s = xf86GetOptValString(intel->Options, OPTION_DRI); Bool dummy; if (s == NULL || xf86getBoolValue(&dummy, s)) { if (INTEL_INFO(intel)->gen < 030) return has_i830_dri() ? "i830" : "i915"; else if (INTEL_INFO(intel)->gen < 040) return "i915"; else return "i965"; } return s; #else if (INTEL_INFO(intel)->gen < 030) return has_i830_dri() ? "i830" : "i915"; else if (INTEL_INFO(intel)->gen < 040) return "i915"; else return "i965"; #endif } Bool I830DRI2ScreenInit(ScreenPtr screen) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); DRI2InfoRec info; int dri2scr_major = 1; int dri2scr_minor = 0; #if DRI2INFOREC_VERSION >= 4 const char *driverNames[2]; #endif if (intel->force_fallback) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "cannot enable DRI2 whilst forcing software fallbacks\n"); return FALSE; } if (xf86LoaderCheckSymbol("DRI2Version")) DRI2Version(&dri2scr_major, &dri2scr_minor); if (dri2scr_minor < 1) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "DRI2 requires DRI2 module version 1.1.0 or later\n"); return FALSE; } #if HAS_DIXREGISTERPRIVATEKEY if (!dixRegisterPrivateKey(&i830_client_key, PRIVATE_CLIENT, sizeof(XID))) return FALSE; #else if (!dixRequestPrivate(&i830_client_key, sizeof(XID))) return FALSE; #endif #if DRI2INFOREC_VERSION >= 4 if (serverGeneration != dri2_server_generation) { dri2_server_generation = serverGeneration; if (!i830_dri2_register_frame_event_resource_types()) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "Cannot register DRI2 frame event resources\n"); return FALSE; } } #endif intel->deviceName = drmGetDeviceNameFromFd(intel->drmSubFD); memset(&info, '\0', sizeof(info)); info.fd = intel->drmSubFD; info.driverName = dri_driver_name(intel); info.deviceName = intel->deviceName; #if DRI2INFOREC_VERSION == 1 info.version = 1; info.CreateBuffers = I830DRI2CreateBuffers; info.DestroyBuffers = I830DRI2DestroyBuffers; #elif DRI2INFOREC_VERSION == 2 /* The ABI between 2 and 3 was broken so we could get rid of * the multi-buffer alloc functions. Make sure we indicate the * right version so DRI2 can reject us if it's version 3 or above. */ info.version = 2; info.CreateBuffer = I830DRI2CreateBuffer; info.DestroyBuffer = I830DRI2DestroyBuffer; #else info.version = 3; info.CreateBuffer = I830DRI2CreateBuffer; info.DestroyBuffer = I830DRI2DestroyBuffer; #endif info.CopyRegion = I830DRI2CopyRegion; #if DRI2INFOREC_VERSION >= 4 info.version = 4; info.ScheduleSwap = I830DRI2ScheduleSwap; info.GetMSC = I830DRI2GetMSC; info.ScheduleWaitMSC = I830DRI2ScheduleWaitMSC; info.numDrivers = 2; info.driverNames = driverNames; driverNames[0] = info.driverName; driverNames[1] = info.driverName; #endif return DRI2ScreenInit(screen, &info); } void I830DRI2CloseScreen(ScreenPtr screen) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); DRI2CloseScreen(screen); drmFree(intel->deviceName); } xf86-video-intel-2.99.917/src/uxa/intel_batchbuffer.h0000664000175000017500000001633512432737457017160 00000000000000/************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. Copyright © 2002 David Dawes All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifndef _INTEL_BATCHBUFFER_H #define _INTEL_BATCHBUFFER_H #define BATCH_RESERVED 16 void intel_batch_init(ScrnInfoPtr scrn); void intel_batch_teardown(ScrnInfoPtr scrn); void intel_batch_emit_flush(ScrnInfoPtr scrn); void intel_batch_submit(ScrnInfoPtr scrn); static inline int intel_batch_space(intel_screen_private *intel) { return (intel->batch_bo->size - BATCH_RESERVED) - (4*intel->batch_used); } static inline int intel_vertex_space(intel_screen_private *intel) { return intel->vertex_bo ? intel->vertex_bo->size - (4*intel->vertex_used) : 0; } static inline void intel_batch_require_space(ScrnInfoPtr scrn, intel_screen_private *intel, int sz) { assert(sz < intel->batch_bo->size - 8); if (intel_batch_space(intel) < sz) intel_batch_submit(scrn); } static inline void intel_batch_start_atomic(ScrnInfoPtr scrn, int sz) { intel_screen_private *intel = intel_get_screen_private(scrn); assert(!intel->in_batch_atomic); if (intel->current_batch != RENDER_BATCH) { if (intel->current_batch && intel->context_switch) intel->context_switch(intel, RENDER_BATCH); } intel_batch_require_space(scrn, intel, sz * 4); intel->current_batch = RENDER_BATCH; intel->in_batch_atomic = TRUE; intel->batch_atomic_limit = intel->batch_used + sz; } static inline void intel_batch_end_atomic(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); assert(intel->in_batch_atomic); assert(intel->batch_used <= intel->batch_atomic_limit); intel->in_batch_atomic = FALSE; } static inline void intel_batch_emit_dword(intel_screen_private *intel, uint32_t dword) { intel->batch_ptr[intel->batch_used++] = dword; } static inline void intel_batch_align(intel_screen_private *intel, uint32_t align) { uint32_t delta; align /= 4; assert(align); if ((delta = intel->batch_used & (align - 1))) { delta = align - delta; memset (intel->batch_ptr + intel->batch_used, 0, 4*delta); intel->batch_used += delta; } } static inline void intel_batch_emit_reloc(intel_screen_private *intel, dri_bo * bo, uint32_t read_domains, uint32_t write_domains, uint32_t delta, int needs_fence) { uint64_t offset; if (needs_fence) drm_intel_bo_emit_reloc_fence(intel->batch_bo, intel->batch_used * 4, bo, delta, read_domains, write_domains); else drm_intel_bo_emit_reloc(intel->batch_bo, intel->batch_used * 4, bo, delta, read_domains, write_domains); offset = bo->offset64 + delta; intel_batch_emit_dword(intel, offset); if (INTEL_INFO(intel)->gen >= 0100) intel_batch_emit_dword(intel, offset >> 32); } static inline void intel_batch_mark_pixmap_domains(intel_screen_private *intel, struct intel_uxa_pixmap *priv, uint32_t read_domains, uint32_t write_domain) { assert (read_domains); assert (write_domain == 0 || write_domain == read_domains); if (list_is_empty(&priv->batch)) list_add(&priv->batch, &intel->batch_pixmaps); priv->dirty |= write_domain != 0; priv->busy = 1; intel->needs_flush |= write_domain != 0; } static inline void intel_batch_emit_reloc_pixmap(intel_screen_private *intel, PixmapPtr pixmap, uint32_t read_domains, uint32_t write_domain, uint32_t delta, int needs_fence) { struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap); intel_batch_mark_pixmap_domains(intel, priv, read_domains, write_domain); intel_batch_emit_reloc(intel, priv->bo, read_domains, write_domain, delta, needs_fence); } #define ALIGN_BATCH(align) intel_batch_align(intel, align); #define OUT_BATCH(dword) intel_batch_emit_dword(intel, dword) #define OUT_RELOC(bo, read_domains, write_domains, delta) \ intel_batch_emit_reloc(intel, bo, read_domains, write_domains, delta, 0) #define OUT_RELOC_FENCED(bo, read_domains, write_domains, delta) \ intel_batch_emit_reloc(intel, bo, read_domains, write_domains, delta, 1) #define OUT_RELOC_PIXMAP(pixmap, reads, write, delta) \ intel_batch_emit_reloc_pixmap(intel, pixmap, reads, write, delta, 0) #define OUT_RELOC_PIXMAP_FENCED(pixmap, reads, write, delta) \ intel_batch_emit_reloc_pixmap(intel, pixmap, reads, write, delta, 1) union intfloat { float f; unsigned int ui; }; #define OUT_BATCH_F(x) do { \ union intfloat tmp; \ tmp.f = (float)(x); \ OUT_BATCH(tmp.ui); \ } while(0) #define __BEGIN_BATCH(n,batch_idx) \ do { \ if (intel->batch_emitting != 0) \ FatalError("%s: BEGIN_BATCH called without closing " \ "ADVANCE_BATCH\n", __FUNCTION__); \ assert(!intel->in_batch_atomic); \ if (intel->current_batch != batch_idx) { \ if (intel->current_batch && intel->context_switch) \ intel->context_switch(intel, batch_idx); \ } \ intel_batch_require_space(scrn, intel, (n) * 4); \ intel->current_batch = batch_idx; \ intel->batch_emitting = (n); \ intel->batch_emit_start = intel->batch_used; \ } while (0) #define BEGIN_BATCH(n) __BEGIN_BATCH(n,RENDER_BATCH) #define BEGIN_BATCH_BLT(n) __BEGIN_BATCH(n,BLT_BATCH) #define ADVANCE_BATCH() do { \ if (intel->batch_emitting == 0) \ FatalError("%s: ADVANCE_BATCH called with no matching " \ "BEGIN_BATCH\n", __FUNCTION__); \ if (intel->batch_used > \ intel->batch_emit_start + intel->batch_emitting) \ FatalError("%s: ADVANCE_BATCH: exceeded allocation %d/%d\n ", \ __FUNCTION__, \ intel->batch_used - intel->batch_emit_start, \ intel->batch_emitting); \ if (intel->batch_used < intel->batch_emit_start + \ intel->batch_emitting) \ FatalError("%s: ADVANCE_BATCH: under-used allocation %d/%d\n ", \ __FUNCTION__, \ intel->batch_used - intel->batch_emit_start, \ intel->batch_emitting); \ intel->batch_emitting = 0; \ } while (0) void intel_next_vertex(intel_screen_private *intel); static inline void intel_vertex_emit(intel_screen_private *intel, float v) { intel->vertex_ptr[intel->vertex_used++] = v; } #define OUT_VERTEX(v) intel_vertex_emit(intel, v) #endif /* _INTEL_BATCHBUFFER_H */ xf86-video-intel-2.99.917/src/uxa/intel_memory.c0000664000175000017500000002306112432737457016202 00000000000000/************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. Copyright © 2002 by David Dawes. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * Authors: * Keith Whitwell * David Dawes * * Updated for Dual Head capabilities: * Alan Hourihane */ /** * @file intel_memory.c * * This is the video memory allocator. Our memory allocation is different from * other graphics chips, where you have a fixed amount of graphics memory * available that you want to put to the best use. Instead, we have almost no * memory pre-allocated, and we have to choose an appropriate amount of sytem * memory to use. * * The allocations we might do: * * - Ring buffer * - HW cursor block (either one block or four) * - Overlay registers * - Front buffer (screen 1) * - Front buffer (screen 2, only in zaphod mode) * - Back/depth buffer (3D only) * - Compatibility texture pool (optional, more is always better) * - New texture pool (optional, more is always better. aperture allocation * only) * * The user may request a specific amount of memory to be used * (intel->pEnt->videoRam != 0), in which case allocations have to fit within * that much aperture. If not, the individual allocations will be * automatically sized, and will be fit within the maximum aperture size. * Only the actual memory used (not alignment padding) will get actual AGP * memory allocated. * * Given that the allocations listed are generally a page or more than a page, * our allocator will only return page-aligned offsets, simplifying the memory * binding process. For smaller allocations, the acceleration architecture's * linear allocator is preferred. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "intel.h" #include "i915_drm.h" /** * Returns the fence size for a tiled area of the given size. */ unsigned long intel_get_fence_size(intel_screen_private *intel, unsigned long size) { unsigned long i; unsigned long start; if (INTEL_INFO(intel)->gen >= 040 || intel->has_relaxed_fencing) { /* The 965 can have fences at any page boundary. */ return ALIGN(size, 4096); } else { /* Align the size to a power of two greater than the smallest fence * size. */ if (IS_GEN3(intel)) start = MB(1); else start = KB(512); for (i = start; i < size; i <<= 1) ; return i; } } /** * On some chips, pitch width has to be a power of two tile width, so * calculate that here. */ unsigned long intel_get_fence_pitch(intel_screen_private *intel, unsigned long pitch, uint32_t tiling_mode) { unsigned long i; unsigned long tile_width = (tiling_mode == I915_TILING_Y) ? 128 : 512; if (tiling_mode == I915_TILING_NONE) return pitch; /* 965+ is flexible */ if (INTEL_INFO(intel)->gen >= 040) return ALIGN(pitch, tile_width); /* Pre-965 needs power of two tile width */ for (i = tile_width; i < pitch; i <<= 1) ; return i; } Bool intel_check_display_stride(ScrnInfoPtr scrn, int stride, Bool tiling) { intel_screen_private *intel = intel_get_screen_private(scrn); int limit; /* 8xx spec has always 8K limit, but tests show larger limit in non-tiling mode, which makes large monitor work. */ if (tiling) { if (IS_GEN2(intel)) limit = KB(8); else if (IS_GEN3(intel)) limit = KB(8); else if (IS_GEN4(intel)) limit = KB(16); else limit = KB(32); } else limit = KB(32); return stride <= limit; } static size_t agp_aperture_size(struct pci_device *dev, int gen) { return dev->regions[gen < 030 ? 0 : 2].size; } void intel_set_gem_max_sizes(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); size_t agp_size = agp_aperture_size(xf86GetPciInfoForEntity(intel->pEnt->index), INTEL_INFO(intel)->gen); /* The chances of being able to mmap an object larger than * agp_size/2 are slim. Moreover, we may be forced to fallback * using a gtt mapping as both the source and a mask, as well * as a destination and all need to fit into the aperture. */ intel->max_gtt_map_size = agp_size / 4; /* Let objects be tiled up to the size where only 4 would fit in * the aperture, presuming best case alignment. Also if we * cannot mmap it using the GTT we will be stuck. */ intel->max_tiling_size = intel->max_gtt_map_size; /* Large BOs will tend to hit SW fallbacks frequently, and also will * tend to fail to successfully map when doing SW fallbacks because we * overcommit address space for BO access, or worse cause aperture * thrashing. */ intel->max_bo_size = intel->max_gtt_map_size; } unsigned int intel_compute_size(struct intel_screen_private *intel, int w, int h, int bpp, unsigned usage, uint32_t *tiling, int *stride) { int pitch, size; if (*tiling != I915_TILING_NONE) { /* First check whether tiling is necessary. */ pitch = (w * bpp + 7) / 8; pitch = ALIGN(pitch, 64); size = pitch * ALIGN (h, 2); if (INTEL_INFO(intel)->gen < 040) { /* Gen 2/3 has a maximum stride for tiling of * 8192 bytes. */ if (pitch > KB(8)) *tiling = I915_TILING_NONE; /* Narrower than half a tile? */ if (pitch < 256) *tiling = I915_TILING_NONE; /* Older hardware requires fences to be pot size * aligned with a minimum of 1 MiB, so causes * massive overallocation for small textures. */ if (size < 1024*1024/2 && !intel->has_relaxed_fencing) *tiling = I915_TILING_NONE; } else if (!(usage & INTEL_CREATE_PIXMAP_DRI2) && size <= 4096) { /* Disable tiling beneath a page size, we will not see * any benefit from reducing TLB misses and instead * just incur extra cost when we require a fence. */ *tiling = I915_TILING_NONE; } } pitch = (w * bpp + 7) / 8; if (!(usage & INTEL_CREATE_PIXMAP_DRI2) && pitch <= 256) *tiling = I915_TILING_NONE; if (*tiling != I915_TILING_NONE) { int aligned_h, tile_height; if (IS_GEN2(intel)) tile_height = 16; else if (*tiling == I915_TILING_X) tile_height = 8; else tile_height = 32; aligned_h = ALIGN(h, tile_height); *stride = intel_get_fence_pitch(intel, ALIGN(pitch, 512), *tiling); /* Round the object up to the size of the fence it will live in * if necessary. We could potentially make the kernel allocate * a larger aperture space and just bind the subset of pages in, * but this is easier and also keeps us out of trouble (as much) * with drm_intel_bufmgr_check_aperture(). */ size = intel_get_fence_size(intel, *stride * aligned_h); if (size > intel->max_tiling_size) *tiling = I915_TILING_NONE; } if (*tiling == I915_TILING_NONE) { /* We only require a 64 byte alignment for scanouts, but * a 256 byte alignment for sharing with PRIME. */ *stride = ALIGN(pitch, 256); /* Round the height up so that the GPU's access to a 2x2 aligned * subspan doesn't address an invalid page offset beyond the * end of the GTT. */ size = *stride * ALIGN(h, 2); } return size; } drm_intel_bo *intel_allocate_framebuffer(ScrnInfoPtr scrn, int width, int height, int cpp, int *out_stride, uint32_t *out_tiling) { intel_screen_private *intel = intel_get_screen_private(scrn); uint32_t tiling; int stride, size; drm_intel_bo *bo; intel_set_gem_max_sizes(scrn); if (intel->tiling & INTEL_TILING_FB) tiling = I915_TILING_X; else tiling = I915_TILING_NONE; retry: size = intel_compute_size(intel, width, height, intel->cpp*8, 0, &tiling, &stride); if (!intel_check_display_stride(scrn, stride, tiling)) { if (tiling != I915_TILING_NONE) { tiling = I915_TILING_NONE; goto retry; } xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Front buffer stride %d kB " "exceeds display limit\n", stride / 1024); return NULL; } bo = drm_intel_bo_alloc(intel->bufmgr, "front buffer", size, 0); if (bo == NULL) return FALSE; if (tiling != I915_TILING_NONE) drm_intel_bo_set_tiling(bo, &tiling, stride); xf86DrvMsg(scrn->scrnIndex, X_INFO, "Allocated new frame buffer %dx%d stride %d, %s\n", width, height, stride, tiling == I915_TILING_NONE ? "untiled" : "tiled"); drm_intel_bo_disable_reuse(bo); *out_stride = stride; *out_tiling = tiling; return bo; } xf86-video-intel-2.99.917/src/uxa/uxa_module.h0000664000175000017500000000017312400044327015623 00000000000000#ifndef INTEL_MODULE_H #define INTEL_MODULE_H extern Bool intel_init_scrn(ScrnInfoPtr scrn); #endif /* INTEL_MODULE_H */ xf86-video-intel-2.99.917/src/uxa/uxa-render.c0000664000175000017500000014215212432737457015554 00000000000000/* * Copyright © 2001 Keith Packard * * Partly based on code that is Copyright © The XFree86 Project Inc. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #ifdef HAVE_DIX_CONFIG_H #include #endif #include #include "uxa-priv.h" #ifdef RENDER #include "mipict.h" static void uxa_composite_fallback_pict_desc(PicturePtr pict, char *string, int n) { char format[20]; char size[20]; char loc; if (!pict) { snprintf(string, n, "None"); return; } if (pict->pDrawable == NULL) { snprintf(string, n, "source-only"); return; } switch (pict->format) { case PICT_a8r8g8b8: snprintf(format, 20, "ARGB8888"); break; case PICT_x8r8g8b8: snprintf(format, 20, "XRGB8888"); break; case PICT_r5g6b5: snprintf(format, 20, "RGB565 "); break; case PICT_x1r5g5b5: snprintf(format, 20, "RGB555 "); break; case PICT_a8: snprintf(format, 20, "A8 "); break; case PICT_a1: snprintf(format, 20, "A1 "); break; default: snprintf(format, 20, "0x%x", (int)pict->format); break; } loc = uxa_drawable_is_offscreen(pict->pDrawable) ? 's' : 'm'; snprintf(size, 20, "%dx%d%s", pict->pDrawable->width, pict->pDrawable->height, pict->repeat ? " R" : ""); snprintf(string, n, "%p:%c fmt %s (%s)%s", pict->pDrawable, loc, format, size, pict->alphaMap ? " with alpha map" :""); } static const char * op_to_string(CARD8 op) { switch (op) { #define C(x) case PictOp##x: return #x C(Clear); C(Src); C(Dst); C(Over); C(OverReverse); C(In); C(InReverse); C(Out); C(OutReverse); C(Atop); C(AtopReverse); C(Xor); C(Add); C(Saturate); /* * Operators only available in version 0.2 */ #if RENDER_MAJOR >= 1 || RENDER_MINOR >= 2 C(DisjointClear); C(DisjointSrc); C(DisjointDst); C(DisjointOver); C(DisjointOverReverse); C(DisjointIn); C(DisjointInReverse); C(DisjointOut); C(DisjointOutReverse); C(DisjointAtop); C(DisjointAtopReverse); C(DisjointXor); C(ConjointClear); C(ConjointSrc); C(ConjointDst); C(ConjointOver); C(ConjointOverReverse); C(ConjointIn); C(ConjointInReverse); C(ConjointOut); C(ConjointOutReverse); C(ConjointAtop); C(ConjointAtopReverse); C(ConjointXor); #endif /* * Operators only available in version 0.11 */ #if RENDER_MAJOR >= 1 || RENDER_MINOR >= 11 C(Multiply); C(Screen); C(Overlay); C(Darken); C(Lighten); C(ColorDodge); C(ColorBurn); C(HardLight); C(SoftLight); C(Difference); C(Exclusion); C(HSLHue); C(HSLSaturation); C(HSLColor); C(HSLLuminosity); #endif default: return "garbage"; #undef C } } static void uxa_print_composite_fallback(const char *func, CARD8 op, PicturePtr pSrc, PicturePtr pMask, PicturePtr pDst) { uxa_screen_t *uxa_screen = uxa_get_screen(pDst->pDrawable->pScreen); char srcdesc[40], maskdesc[40], dstdesc[40]; if (! uxa_screen->fallback_debug) return; /* Limit the noise if fallbacks are expected. */ if (uxa_screen->force_fallback) return; uxa_composite_fallback_pict_desc(pSrc, srcdesc, 40); uxa_composite_fallback_pict_desc(pMask, maskdesc, 40); uxa_composite_fallback_pict_desc(pDst, dstdesc, 40); ErrorF("Composite fallback at %s:\n" " op %s, \n" " src %s, \n" " mask %s, \n" " dst %s, \n", func, op_to_string (op), srcdesc, maskdesc, dstdesc); } Bool uxa_op_reads_destination(CARD8 op) { /* FALSE (does not read destination) is the list of ops in the protocol * document with "0" in the "Fb" column and no "Ab" in the "Fa" column. * That's just Clear and Src. ReduceCompositeOp() will already have * converted con/disjoint clear/src to Clear or Src. */ switch (op) { case PictOpClear: case PictOpSrc: return FALSE; default: return TRUE; } } static Bool uxa_get_pixel_from_rgba(CARD32 * pixel, CARD16 red, CARD16 green, CARD16 blue, CARD16 alpha, CARD32 format) { int rbits, bbits, gbits, abits; int rshift, bshift, gshift, ashift; rbits = PICT_FORMAT_R(format); gbits = PICT_FORMAT_G(format); bbits = PICT_FORMAT_B(format); abits = PICT_FORMAT_A(format); if (abits == 0) abits = PICT_FORMAT_BPP(format) - (rbits+gbits+bbits); if (PICT_FORMAT_TYPE(format) == PICT_TYPE_A) { *pixel = alpha >> (16 - abits); return TRUE; } if (!PICT_FORMAT_COLOR(format)) return FALSE; if (PICT_FORMAT_TYPE(format) == PICT_TYPE_ARGB) { bshift = 0; gshift = bbits; rshift = gshift + gbits; ashift = rshift + rbits; } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_ABGR) { rshift = 0; gshift = rbits; bshift = gshift + gbits; ashift = bshift + bbits; #if XORG_VERSION_CURRENT >= 10699900 } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_BGRA) { ashift = 0; rshift = abits; gshift = rshift + rbits; bshift = gshift + gbits; #endif } else { return FALSE; } *pixel = 0; *pixel |= (blue >> (16 - bbits)) << bshift; *pixel |= (green >> (16 - gbits)) << gshift; *pixel |= (red >> (16 - rbits)) << rshift; *pixel |= (alpha >> (16 - abits)) << ashift; return TRUE; } Bool uxa_get_rgba_from_pixel(CARD32 pixel, CARD16 * red, CARD16 * green, CARD16 * blue, CARD16 * alpha, CARD32 format) { int rbits, bbits, gbits, abits; int rshift, bshift, gshift, ashift; rbits = PICT_FORMAT_R(format); gbits = PICT_FORMAT_G(format); bbits = PICT_FORMAT_B(format); abits = PICT_FORMAT_A(format); if (PICT_FORMAT_TYPE(format) == PICT_TYPE_A) { rshift = gshift = bshift = ashift = 0; } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_ARGB) { bshift = 0; gshift = bbits; rshift = gshift + gbits; ashift = rshift + rbits; } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_ABGR) { rshift = 0; gshift = rbits; bshift = gshift + gbits; ashift = bshift + bbits; #if XORG_VERSION_CURRENT >= 10699900 } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_BGRA) { ashift = 0; rshift = abits; if (abits == 0) rshift = PICT_FORMAT_BPP(format) - (rbits+gbits+bbits); gshift = rshift + rbits; bshift = gshift + gbits; #endif } else { return FALSE; } if (rbits) { *red = ((pixel >> rshift) & ((1 << rbits) - 1)) << (16 - rbits); while (rbits < 16) { *red |= *red >> rbits; rbits <<= 1; } } else *red = 0; if (gbits) { *green = ((pixel >> gshift) & ((1 << gbits) - 1)) << (16 - gbits); while (gbits < 16) { *green |= *green >> gbits; gbits <<= 1; } } else *green = 0; if (bbits) { *blue = ((pixel >> bshift) & ((1 << bbits) - 1)) << (16 - bbits); while (bbits < 16) { *blue |= *blue >> bbits; bbits <<= 1; } } else *blue = 0; if (abits) { *alpha = ((pixel >> ashift) & ((1 << abits) - 1)) << (16 - abits); while (abits < 16) { *alpha |= *alpha >> abits; abits <<= 1; } } else *alpha = 0xffff; return TRUE; } Bool uxa_get_color_for_pixmap (PixmapPtr pixmap, CARD32 src_format, CARD32 dst_format, CARD32 *pixel) { CARD16 red, green, blue, alpha; *pixel = uxa_get_pixmap_first_pixel(pixmap); if (src_format != dst_format) { if (!uxa_get_rgba_from_pixel(*pixel, &red, &green, &blue, &alpha, src_format)) return FALSE; if (!uxa_get_pixel_from_rgba(pixel, red, green, blue, alpha, dst_format)) return FALSE; } return TRUE; } static int uxa_try_driver_solid_fill(PicturePtr pSrc, PicturePtr pDst, INT16 xSrc, INT16 ySrc, INT16 xDst, INT16 yDst, CARD16 width, CARD16 height) { uxa_screen_t *uxa_screen = uxa_get_screen(pDst->pDrawable->pScreen); RegionRec region; BoxPtr pbox; int nbox; int dst_off_x, dst_off_y; PixmapPtr pSrcPix = NULL, pDstPix; CARD32 pixel; if (uxa_screen->info->check_solid && !uxa_screen->info->check_solid(pDst->pDrawable, GXcopy, FB_ALLONES)) return -1; pDstPix = uxa_get_offscreen_pixmap(pDst->pDrawable, &dst_off_x, &dst_off_y); if (!pDstPix) return -1; xDst += pDst->pDrawable->x; yDst += pDst->pDrawable->y; if (pSrc->pDrawable) { pSrcPix = uxa_get_drawable_pixmap(pSrc->pDrawable); xSrc += pSrc->pDrawable->x; ySrc += pSrc->pDrawable->y; } if (!miComputeCompositeRegion(®ion, pSrc, NULL, pDst, xSrc, ySrc, 0, 0, xDst, yDst, width, height)) return 1; if (pSrcPix) { if (! uxa_get_color_for_pixmap (pSrcPix, pSrc->format, pDst->format, &pixel)) { REGION_UNINIT(pDst->pDrawable->pScreen, ®ion); return -1; } } else { SourcePict *source = pSrc->pSourcePict; PictSolidFill *solid = &source->solidFill; if (source == NULL || source->type != SourcePictTypeSolidFill) { REGION_UNINIT(pDst->pDrawable->pScreen, ®ion); return -1; } if (pDst->format == PICT_a8r8g8b8) { pixel = solid->color; } else if (pDst->format == PICT_x8r8g8b8) { pixel = solid->color | 0xff000000; } else { CARD16 red, green, blue, alpha; if (!uxa_get_rgba_from_pixel(solid->color, &red, &green, &blue, &alpha, PICT_a8r8g8b8) || !uxa_get_pixel_from_rgba(&pixel, red, green, blue, alpha, pDst->format)) { REGION_UNINIT(pDst->pDrawable->pScreen, ®ion); return -1; } } } if (!(*uxa_screen->info->prepare_solid) (pDstPix, GXcopy, FB_ALLONES, pixel)) { REGION_UNINIT(pDst->pDrawable->pScreen, ®ion); return -1; } REGION_TRANSLATE(pScreen, ®ion, dst_off_x, dst_off_y); nbox = REGION_NUM_RECTS(®ion); pbox = REGION_RECTS(®ion); while (nbox--) { (*uxa_screen->info->solid) (pDstPix, pbox->x1, pbox->y1, pbox->x2, pbox->y2); pbox++; } (*uxa_screen->info->done_solid) (pDstPix); REGION_UNINIT(pDst->pDrawable->pScreen, ®ion); return 1; } static PicturePtr uxa_picture_for_pixman_format(ScreenPtr screen, pixman_format_code_t format, int width, int height) { PicturePtr picture; PixmapPtr pixmap; int error; if (format == PIXMAN_a1) format = PIXMAN_a8; /* fill alpha if unset */ if (PIXMAN_FORMAT_A(format) == 0) format = PIXMAN_a8r8g8b8; pixmap = screen->CreatePixmap(screen, width, height, PIXMAN_FORMAT_DEPTH(format), UXA_CREATE_PIXMAP_FOR_MAP); if (!pixmap) return 0; if (!uxa_pixmap_is_offscreen(pixmap)) { screen->DestroyPixmap(pixmap); return 0; } picture = CreatePicture(0, &pixmap->drawable, PictureMatchFormat(screen, PIXMAN_FORMAT_DEPTH(format), format), 0, 0, serverClient, &error); screen->DestroyPixmap(pixmap); if (!picture) return 0; ValidatePicture(picture); return picture; } static PicturePtr uxa_picture_from_pixman_image(ScreenPtr screen, pixman_image_t * image, pixman_format_code_t format) { uxa_screen_t *uxa_screen = uxa_get_screen(screen); PicturePtr picture; PixmapPtr pixmap; int width, height; width = pixman_image_get_width(image); height = pixman_image_get_height(image); picture = uxa_picture_for_pixman_format(screen, format, width, height); if (!picture) return 0; if (uxa_screen->info->put_image && ((picture->pDrawable->depth << 24) | picture->format) == format && uxa_screen->info->put_image((PixmapPtr)picture->pDrawable, 0, 0, width, height, (char *)pixman_image_get_data(image), pixman_image_get_stride(image))) return picture; pixmap = GetScratchPixmapHeader(screen, width, height, PIXMAN_FORMAT_DEPTH(format), PIXMAN_FORMAT_BPP(format), pixman_image_get_stride(image), pixman_image_get_data(image)); if (!pixmap) { FreePicture(picture, 0); return 0; } if (((picture->pDrawable->depth << 24) | picture->format) == format) { GCPtr gc; gc = GetScratchGC(PIXMAN_FORMAT_DEPTH(format), screen); if (!gc) { FreeScratchPixmapHeader(pixmap); FreePicture(picture, 0); return 0; } ValidateGC(picture->pDrawable, gc); (*gc->ops->CopyArea) (&pixmap->drawable, picture->pDrawable, gc, 0, 0, width, height, 0, 0); FreeScratchGC(gc); } else { PicturePtr src; int error; src = CreatePicture(0, &pixmap->drawable, PictureMatchFormat(screen, PIXMAN_FORMAT_DEPTH(format), format), 0, 0, serverClient, &error); if (!src) { FreeScratchPixmapHeader(pixmap); FreePicture(picture, 0); return 0; } ValidatePicture(src); if (uxa_picture_prepare_access(picture, UXA_ACCESS_RW)) { fbComposite(PictOpSrc, src, NULL, picture, 0, 0, 0, 0, 0, 0, width, height); uxa_picture_finish_access(picture, UXA_ACCESS_RW); } FreePicture(src, 0); } FreeScratchPixmapHeader(pixmap); return picture; } static PicturePtr uxa_create_solid(ScreenPtr screen, uint32_t color) { PixmapPtr pixmap; PicturePtr picture; XID repeat = RepeatNormal; int error = 0; pixmap = (*screen->CreatePixmap)(screen, 1, 1, 32, UXA_CREATE_PIXMAP_FOR_MAP); if (!pixmap) return 0; if (!uxa_prepare_access((DrawablePtr)pixmap, UXA_ACCESS_RW)) { (*screen->DestroyPixmap)(pixmap); return 0; } *((uint32_t *)pixmap->devPrivate.ptr) = color; uxa_finish_access((DrawablePtr)pixmap, UXA_ACCESS_RW); picture = CreatePicture(0, &pixmap->drawable, PictureMatchFormat(screen, 32, PICT_a8r8g8b8), CPRepeat, &repeat, serverClient, &error); (*screen->DestroyPixmap)(pixmap); return picture; } static PicturePtr uxa_solid_clear(ScreenPtr screen) { uxa_screen_t *uxa_screen = uxa_get_screen(screen); PicturePtr picture; if (!uxa_screen->solid_clear) { uxa_screen->solid_clear = uxa_create_solid(screen, 0); if (!uxa_screen->solid_clear) return 0; } picture = uxa_screen->solid_clear; return picture; } PicturePtr uxa_acquire_solid(ScreenPtr screen, SourcePict *source) { uxa_screen_t *uxa_screen = uxa_get_screen(screen); PictSolidFill *solid = &source->solidFill; PicturePtr picture; int i; if ((solid->color >> 24) == 0) { picture = uxa_solid_clear(screen); if (!picture) return 0; goto DONE; } else if (solid->color == 0xff000000) { if (!uxa_screen->solid_black) { uxa_screen->solid_black = uxa_create_solid(screen, 0xff000000); if (!uxa_screen->solid_black) return 0; } picture = uxa_screen->solid_black; goto DONE; } else if (solid->color == 0xffffffff) { if (!uxa_screen->solid_white) { uxa_screen->solid_white = uxa_create_solid(screen, 0xffffffff); if (!uxa_screen->solid_white) return 0; } picture = uxa_screen->solid_white; goto DONE; } for (i = 0; i < uxa_screen->solid_cache_size; i++) { if (uxa_screen->solid_cache[i].color == solid->color) { picture = uxa_screen->solid_cache[i].picture; goto DONE; } } picture = uxa_create_solid(screen, solid->color); if (!picture) return 0; if (uxa_screen->solid_cache_size == UXA_NUM_SOLID_CACHE) { i = rand() % UXA_NUM_SOLID_CACHE; FreePicture(uxa_screen->solid_cache[i].picture, 0); } else uxa_screen->solid_cache_size++; uxa_screen->solid_cache[i].picture = picture; uxa_screen->solid_cache[i].color = solid->color; DONE: picture->refcnt++; return picture; } PicturePtr uxa_acquire_pattern(ScreenPtr pScreen, PicturePtr pSrc, pixman_format_code_t format, INT16 x, INT16 y, CARD16 width, CARD16 height) { PicturePtr pDst; if (pSrc->pSourcePict) { SourcePict *source = pSrc->pSourcePict; if (source->type == SourcePictTypeSolidFill) return uxa_acquire_solid (pScreen, source); } pDst = uxa_picture_for_pixman_format(pScreen, format, width, height); if (!pDst) return 0; if (uxa_picture_prepare_access(pDst, UXA_ACCESS_RW)) { fbComposite(PictOpSrc, pSrc, NULL, pDst, x, y, 0, 0, 0, 0, width, height); uxa_picture_finish_access(pDst, UXA_ACCESS_RW); return pDst; } else { FreePicture(pDst, 0); return 0; } } static Bool transform_is_integer_translation(PictTransformPtr t, int *tx, int *ty) { if (t == NULL) { *tx = *ty = 0; return TRUE; } if (t->matrix[0][0] != IntToxFixed(1) || t->matrix[0][1] != 0 || t->matrix[1][0] != 0 || t->matrix[1][1] != IntToxFixed(1) || t->matrix[2][0] != 0 || t->matrix[2][1] != 0 || t->matrix[2][2] != IntToxFixed(1)) return FALSE; if (xFixedFrac(t->matrix[0][2]) != 0 || xFixedFrac(t->matrix[1][2]) != 0) return FALSE; *tx = xFixedToInt(t->matrix[0][2]); *ty = xFixedToInt(t->matrix[1][2]); return TRUE; } static PicturePtr uxa_render_picture(ScreenPtr screen, PicturePtr src, pixman_format_code_t format, INT16 x, INT16 y, CARD16 width, CARD16 height) { PicturePtr picture; int ret = 0; /* XXX we need a mechanism for the card to choose the fallback format */ /* force alpha channel in case source does not entirely cover the extents */ if (PIXMAN_FORMAT_A(format) == 0) format = PIXMAN_a8r8g8b8; /* available on all hardware */ picture = uxa_picture_for_pixman_format(screen, format, width, height); if (!picture) return 0; if (uxa_picture_prepare_access(picture, UXA_ACCESS_RW)) { if (uxa_picture_prepare_access(src, UXA_ACCESS_RO)) { ret = 1; fbComposite(PictOpSrc, src, NULL, picture, x, y, 0, 0, 0, 0, width, height); uxa_picture_finish_access(src, UXA_ACCESS_RO); } uxa_picture_finish_access(picture, UXA_ACCESS_RW); } if (!ret) { FreePicture(picture, 0); return 0; } return picture; } static int drawable_contains (DrawablePtr drawable, int x, int y, int w, int h) { if (x < 0 || y < 0) return FALSE; if (x + w > drawable->width) return FALSE; if (y + h > drawable->height) return FALSE; return TRUE; } PicturePtr uxa_acquire_drawable(ScreenPtr pScreen, PicturePtr pSrc, INT16 x, INT16 y, CARD16 width, CARD16 height, INT16 * out_x, INT16 * out_y) { PixmapPtr pPixmap; PicturePtr pDst; int depth, error; int tx, ty; GCPtr pGC; depth = pSrc->pDrawable->depth; if (!transform_is_integer_translation(pSrc->transform, &tx, &ty) || !drawable_contains(pSrc->pDrawable, x + tx, y + ty, width, height) || depth == 1 || pSrc->filter == PictFilterConvolution) { /* XXX extract the sample extents and do the transformation on the GPU */ pDst = uxa_render_picture(pScreen, pSrc, pSrc->format | (BitsPerPixel(pSrc->pDrawable->depth) << 24), x, y, width, height); if (!pDst) return 0; goto done; } else { if (width == pSrc->pDrawable->width && height == pSrc->pDrawable->height) { *out_x = x + pSrc->pDrawable->x; *out_y = y + pSrc->pDrawable->y; return pSrc; } } pPixmap = pScreen->CreatePixmap(pScreen, width, height, depth, CREATE_PIXMAP_USAGE_SCRATCH); if (!pPixmap) return 0; /* Skip the copy if the result remains in memory and not a bo */ if (!uxa_pixmap_is_offscreen(pPixmap)) { pScreen->DestroyPixmap(pPixmap); return 0; } pGC = GetScratchGC(depth, pScreen); if (!pGC) { pScreen->DestroyPixmap(pPixmap); return 0; } ValidateGC(&pPixmap->drawable, pGC); pGC->ops->CopyArea(pSrc->pDrawable, &pPixmap->drawable, pGC, x + tx, y + ty, width, height, 0, 0); FreeScratchGC(pGC); pDst = CreatePicture(0, &pPixmap->drawable, PictureMatchFormat(pScreen, depth, pSrc->format), 0, 0, serverClient, &error); pScreen->DestroyPixmap(pPixmap); if (!pDst) return 0; ValidatePicture(pDst); done: pDst->componentAlpha = pSrc->componentAlpha; *out_x = 0; *out_y = 0; return pDst; } static PicturePtr uxa_acquire_picture(ScreenPtr screen, PicturePtr src, pixman_format_code_t format, INT16 x, INT16 y, CARD16 width, CARD16 height, INT16 * out_x, INT16 * out_y) { uxa_screen_t *uxa_screen = uxa_get_screen(screen); if (uxa_screen->info->check_composite_texture && uxa_screen->info->check_composite_texture(screen, src)) { if (src->pDrawable) { *out_x = x + src->pDrawable->x; *out_y = y + src->pDrawable->y; } else { *out_x = x; *out_y = y; } return src; } if (src->pDrawable) { PicturePtr dst; dst = uxa_acquire_drawable(screen, src, x, y, width, height, out_x, out_y); if (!dst) return 0; if (uxa_screen->info->check_composite_texture && !uxa_screen->info->check_composite_texture(screen, dst)) { if (dst != src) FreePicture(dst, 0); return 0; } return dst; } *out_x = 0; *out_y = 0; return uxa_acquire_pattern(screen, src, format, x, y, width, height); } static PicturePtr uxa_acquire_source(ScreenPtr screen, PicturePtr pict, INT16 x, INT16 y, CARD16 width, CARD16 height, INT16 * out_x, INT16 * out_y) { return uxa_acquire_picture (screen, pict, PIXMAN_a8r8g8b8, x, y, width, height, out_x, out_y); } static PicturePtr uxa_acquire_mask(ScreenPtr screen, PicturePtr pict, INT16 x, INT16 y, INT16 width, INT16 height, INT16 * out_x, INT16 * out_y) { return uxa_acquire_picture (screen, pict, PIXMAN_a8, x, y, width, height, out_x, out_y); } static int uxa_try_driver_composite(CARD8 op, PicturePtr pSrc, PicturePtr pMask, PicturePtr pDst, INT16 xSrc, INT16 ySrc, INT16 xMask, INT16 yMask, INT16 xDst, INT16 yDst, CARD16 width, CARD16 height) { ScreenPtr screen = pDst->pDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(screen); RegionRec region; BoxPtr pbox; int nbox; int xDst_copy = 0, yDst_copy = 0; int src_off_x, src_off_y, mask_off_x, mask_off_y, dst_off_x, dst_off_y; PixmapPtr pSrcPix, pMaskPix = NULL, pDstPix; PicturePtr localSrc, localMask = NULL; PicturePtr localDst = pDst; if (uxa_screen->info->check_composite && !(*uxa_screen->info->check_composite) (op, pSrc, pMask, pDst, width, height)) return -1; if (uxa_screen->info->check_composite_target && !uxa_screen->info->check_composite_target(uxa_get_drawable_pixmap(pDst->pDrawable))) { int depth = pDst->pDrawable->depth; PixmapPtr pixmap; int error; GCPtr gc; pixmap = uxa_get_drawable_pixmap(pDst->pDrawable); if (uxa_screen->info->check_copy && !uxa_screen->info->check_copy(pixmap, pixmap, GXcopy, FB_ALLONES)) return -1; pixmap = screen->CreatePixmap(screen, width, height, depth, CREATE_PIXMAP_USAGE_SCRATCH); if (!pixmap) return 0; gc = GetScratchGC(depth, screen); if (!gc) { screen->DestroyPixmap(pixmap); return 0; } ValidateGC(&pixmap->drawable, gc); gc->ops->CopyArea(pDst->pDrawable, &pixmap->drawable, gc, xDst, yDst, width, height, 0, 0); FreeScratchGC(gc); xDst_copy = xDst; xDst = 0; yDst_copy = yDst; yDst = 0; localDst = CreatePicture(0, &pixmap->drawable, PictureMatchFormat(screen, depth, pDst->format), 0, 0, serverClient, &error); screen->DestroyPixmap(pixmap); if (!localDst) return 0; ValidatePicture(localDst); } pDstPix = uxa_get_offscreen_pixmap(localDst->pDrawable, &dst_off_x, &dst_off_y); if (!pDstPix) { if (localDst != pDst) FreePicture(localDst, 0); return -1; } xDst += localDst->pDrawable->x; yDst += localDst->pDrawable->y; localSrc = uxa_acquire_source(screen, pSrc, xSrc, ySrc, width, height, &xSrc, &ySrc); if (!localSrc) { if (localDst != pDst) FreePicture(localDst, 0); return 0; } if (pMask) { localMask = uxa_acquire_mask(screen, pMask, xMask, yMask, width, height, &xMask, &yMask); if (!localMask) { if (localSrc != pSrc) FreePicture(localSrc, 0); if (localDst != pDst) FreePicture(localDst, 0); return 0; } } if (!miComputeCompositeRegion(®ion, localSrc, localMask, localDst, xSrc, ySrc, xMask, yMask, xDst, yDst, width, height)) { if (localSrc != pSrc) FreePicture(localSrc, 0); if (localMask && localMask != pMask) FreePicture(localMask, 0); if (localDst != pDst) FreePicture(localDst, 0); return 1; } pSrcPix = uxa_get_offscreen_pixmap(localSrc->pDrawable, &src_off_x, &src_off_y); if (!pSrcPix) { REGION_UNINIT(screen, ®ion); if (localSrc != pSrc) FreePicture(localSrc, 0); if (localMask && localMask != pMask) FreePicture(localMask, 0); if (localDst != pDst) FreePicture(localDst, 0); return 0; } if (localMask) { pMaskPix = uxa_get_offscreen_pixmap(localMask->pDrawable, &mask_off_x, &mask_off_y); if (!pMaskPix) { REGION_UNINIT(screen, ®ion); if (localSrc != pSrc) FreePicture(localSrc, 0); if (localMask && localMask != pMask) FreePicture(localMask, 0); if (localDst != pDst) FreePicture(localDst, 0); return 0; } } if (!(*uxa_screen->info->prepare_composite) (op, localSrc, localMask, localDst, pSrcPix, pMaskPix, pDstPix)) { REGION_UNINIT(screen, ®ion); if (localSrc != pSrc) FreePicture(localSrc, 0); if (localMask && localMask != pMask) FreePicture(localMask, 0); if (localDst != pDst) FreePicture(localDst, 0); return -1; } if (pMask) { xMask = xMask + mask_off_x - xDst; yMask = yMask + mask_off_y - yDst; } xSrc = xSrc + src_off_x - xDst; ySrc = ySrc + src_off_y - yDst; nbox = REGION_NUM_RECTS(®ion); pbox = REGION_RECTS(®ion); while (nbox--) { (*uxa_screen->info->composite) (pDstPix, pbox->x1 + xSrc, pbox->y1 + ySrc, pbox->x1 + xMask, pbox->y1 + yMask, pbox->x1 + dst_off_x, pbox->y1 + dst_off_y, pbox->x2 - pbox->x1, pbox->y2 - pbox->y1); pbox++; } (*uxa_screen->info->done_composite) (pDstPix); REGION_UNINIT(screen, ®ion); if (localSrc != pSrc) FreePicture(localSrc, 0); if (localMask && localMask != pMask) FreePicture(localMask, 0); if (localDst != pDst) { GCPtr gc; gc = GetScratchGC(pDst->pDrawable->depth, screen); if (gc) { ValidateGC(pDst->pDrawable, gc); gc->ops->CopyArea(localDst->pDrawable, pDst->pDrawable, gc, 0, 0, width, height, xDst_copy, yDst_copy); FreeScratchGC(gc); } FreePicture(localDst, 0); } return 1; } /** * uxa_try_magic_two_pass_composite_helper implements PictOpOver using two passes of * simpler operations PictOpOutReverse and PictOpAdd. Mainly used for component * alpha and limited 1-tmu cards. * * From http://anholt.livejournal.com/32058.html: * * The trouble is that component-alpha rendering requires two different sources * for blending: one for the source value to the blender, which is the * per-channel multiplication of source and mask, and one for the source alpha * for multiplying with the destination channels, which is the multiplication * of the source channels by the mask alpha. So the equation for Over is: * * dst.A = src.A * mask.A + (1 - (src.A * mask.A)) * dst.A * dst.R = src.R * mask.R + (1 - (src.A * mask.R)) * dst.R * dst.G = src.G * mask.G + (1 - (src.A * mask.G)) * dst.G * dst.B = src.B * mask.B + (1 - (src.A * mask.B)) * dst.B * * But we can do some simpler operations, right? How about PictOpOutReverse, * which has a source factor of 0 and dest factor of (1 - source alpha). We * can get the source alpha value (srca.X = src.A * mask.X) out of the texture * blenders pretty easily. So we can do a component-alpha OutReverse, which * gets us: * * dst.A = 0 + (1 - (src.A * mask.A)) * dst.A * dst.R = 0 + (1 - (src.A * mask.R)) * dst.R * dst.G = 0 + (1 - (src.A * mask.G)) * dst.G * dst.B = 0 + (1 - (src.A * mask.B)) * dst.B * * OK. And if an op doesn't use the source alpha value for the destination * factor, then we can do the channel multiplication in the texture blenders * to get the source value, and ignore the source alpha that we wouldn't use. * We've supported this in the Radeon driver for a long time. An example would * be PictOpAdd, which does: * * dst.A = src.A * mask.A + dst.A * dst.R = src.R * mask.R + dst.R * dst.G = src.G * mask.G + dst.G * dst.B = src.B * mask.B + dst.B * * Hey, this looks good! If we do a PictOpOutReverse and then a PictOpAdd right * after it, we get: * * dst.A = src.A * mask.A + ((1 - (src.A * mask.A)) * dst.A) * dst.R = src.R * mask.R + ((1 - (src.A * mask.R)) * dst.R) * dst.G = src.G * mask.G + ((1 - (src.A * mask.G)) * dst.G) * dst.B = src.B * mask.B + ((1 - (src.A * mask.B)) * dst.B) */ static int uxa_try_magic_two_pass_composite_helper(CARD8 op, PicturePtr pSrc, PicturePtr pMask, PicturePtr pDst, INT16 xSrc, INT16 ySrc, INT16 xMask, INT16 yMask, INT16 xDst, INT16 yDst, CARD16 width, CARD16 height) { ScreenPtr screen = pDst->pDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(screen); PicturePtr localDst = pDst; int xDst_copy, yDst_copy; assert(op == PictOpOver); if (uxa_screen->info->check_composite && (!(*uxa_screen->info->check_composite) (PictOpOutReverse, pSrc, pMask, pDst, width, height) || !(*uxa_screen->info->check_composite) (PictOpAdd, pSrc, pMask, pDst, width, height))) { return -1; } if (uxa_screen->info->check_composite_target && !uxa_screen->info->check_composite_target(uxa_get_drawable_pixmap(pDst->pDrawable))) { int depth = pDst->pDrawable->depth; PixmapPtr pixmap; int error; GCPtr gc; pixmap = uxa_get_drawable_pixmap(pDst->pDrawable); if (uxa_screen->info->check_copy && !uxa_screen->info->check_copy(pixmap, pixmap, GXcopy, FB_ALLONES)) return -1; pixmap = screen->CreatePixmap(screen, width, height, depth, CREATE_PIXMAP_USAGE_SCRATCH); if (!pixmap) return 0; gc = GetScratchGC(depth, screen); if (!gc) { screen->DestroyPixmap(pixmap); return 0; } ValidateGC(&pixmap->drawable, gc); gc->ops->CopyArea(pDst->pDrawable, &pixmap->drawable, gc, xDst, yDst, width, height, 0, 0); FreeScratchGC(gc); xDst_copy = xDst; xDst = 0; yDst_copy = yDst; yDst = 0; localDst = CreatePicture(0, &pixmap->drawable, PictureMatchFormat(screen, depth, pDst->format), 0, 0, serverClient, &error); screen->DestroyPixmap(pixmap); if (!localDst) return 0; ValidatePicture(localDst); } /* Now, we think we should be able to accelerate this operation. First, * composite the destination to be the destination times the source alpha * factors. */ uxa_composite(PictOpOutReverse, pSrc, pMask, localDst, xSrc, ySrc, xMask, yMask, xDst, yDst, width, height); /* Then, add in the source value times the destination alpha factors (1.0). */ uxa_composite(PictOpAdd, pSrc, pMask, localDst, xSrc, ySrc, xMask, yMask, xDst, yDst, width, height); if (localDst != pDst) { GCPtr gc; gc = GetScratchGC(pDst->pDrawable->depth, screen); if (gc) { ValidateGC(pDst->pDrawable, gc); gc->ops->CopyArea(localDst->pDrawable, pDst->pDrawable, gc, 0, 0, width, height, xDst_copy, yDst_copy); FreeScratchGC(gc); } FreePicture(localDst, 0); } return 1; } static int compatible_formats (CARD8 op, PicturePtr dst, PicturePtr src) { if (op == PictOpSrc) { if (src->format == dst->format) return 1; /* Is the destination an alpha-less version of source? */ if (dst->format == PICT_FORMAT(PICT_FORMAT_BPP(src->format), PICT_FORMAT_TYPE(src->format), 0, PICT_FORMAT_R(src->format), PICT_FORMAT_G(src->format), PICT_FORMAT_B(src->format))) return 1; /* XXX xrgb is promoted to argb during image upload... */ #if 0 if (dst->format == PICT_a8r8g8b8 && src->format == PICT_x8r8g8b8) return 1; #endif } else if (op == PictOpOver) { if (PICT_FORMAT_A(src->format)) return 0; return src->format == dst->format; } return 0; } void uxa_composite(CARD8 op, PicturePtr pSrc, PicturePtr pMask, PicturePtr pDst, INT16 xSrc, INT16 ySrc, INT16 xMask, INT16 yMask, INT16 xDst, INT16 yDst, CARD16 width, CARD16 height) { uxa_screen_t *uxa_screen = uxa_get_screen(pDst->pDrawable->pScreen); int ret = -1; Bool saveSrcRepeat = pSrc->repeat; Bool saveMaskRepeat = pMask ? pMask->repeat : 0; RegionRec region; int tx, ty; if (uxa_screen->force_fallback) goto fallback; if (!uxa_drawable_is_offscreen(pDst->pDrawable)) goto fallback; if (pDst->alphaMap || pSrc->alphaMap || (pMask && pMask->alphaMap)) goto fallback; /* Remove repeat in source if useless */ if (pSrc->pDrawable && pSrc->repeat && pSrc->filter != PictFilterConvolution && transform_is_integer_translation(pSrc->transform, &tx, &ty) && (pSrc->pDrawable->width > 1 || pSrc->pDrawable->height > 1) && drawable_contains(pSrc->pDrawable, xSrc + tx, ySrc + ty, width, height)) pSrc->repeat = 0; if (!pMask) { if (op == PictOpClear) { PicturePtr clear = uxa_solid_clear(pDst->pDrawable->pScreen); if (clear && uxa_try_driver_solid_fill(clear, pDst, xSrc, ySrc, xDst, yDst, width, height) == 1) goto done; } if (pSrc->pDrawable == NULL) { if (pSrc->pSourcePict) { SourcePict *source = pSrc->pSourcePict; if (source->type == SourcePictTypeSolidFill) { if (op == PictOpSrc || (op == PictOpOver && (source->solidFill.color & 0xff000000) == 0xff000000)) { ret = uxa_try_driver_solid_fill(pSrc, pDst, xSrc, ySrc, xDst, yDst, width, height); if (ret == 1) goto done; } } } } else if (pSrc->pDrawable->width == 1 && pSrc->pDrawable->height == 1 && pSrc->repeat && (op == PictOpSrc || (op == PictOpOver && !PICT_FORMAT_A(pSrc->format)))) { ret = uxa_try_driver_solid_fill(pSrc, pDst, xSrc, ySrc, xDst, yDst, width, height); if (ret == 1) goto done; } else if (compatible_formats (op, pDst, pSrc) && pSrc->filter != PictFilterConvolution && transform_is_integer_translation(pSrc->transform, &tx, &ty)) { if (!pSrc->repeat && drawable_contains(pSrc->pDrawable, xSrc + tx, ySrc + ty, width, height)) { xDst += pDst->pDrawable->x; yDst += pDst->pDrawable->y; xSrc += pSrc->pDrawable->x + tx; ySrc += pSrc->pDrawable->y + ty; if (!miComputeCompositeRegion (®ion, pSrc, pMask, pDst, xSrc, ySrc, xMask, yMask, xDst, yDst, width, height)) goto done; uxa_copy_n_to_n(pSrc->pDrawable, pDst->pDrawable, NULL, REGION_RECTS(®ion), REGION_NUM_RECTS(®ion), xSrc - xDst, ySrc - yDst, FALSE, FALSE, 0, NULL); REGION_UNINIT(pDst->pDrawable->pScreen, ®ion); goto done; } else if (pSrc->repeat && pSrc->repeatType == RepeatNormal && pSrc->pDrawable->type == DRAWABLE_PIXMAP) { DDXPointRec patOrg; /* Let's see if the driver can do the repeat * in one go */ if (uxa_screen->info->prepare_composite) { ret = uxa_try_driver_composite(op, pSrc, pMask, pDst, xSrc, ySrc, xMask, yMask, xDst, yDst, width, height); if (ret == 1) goto done; } /* Now see if we can use * uxa_fill_region_tiled() */ xDst += pDst->pDrawable->x; yDst += pDst->pDrawable->y; xSrc += pSrc->pDrawable->x + tx; ySrc += pSrc->pDrawable->y + ty; if (!miComputeCompositeRegion (®ion, pSrc, pMask, pDst, xSrc, ySrc, xMask, yMask, xDst, yDst, width, height)) goto done; /* pattern origin is the point in the * destination drawable * corresponding to (0,0) in the source */ patOrg.x = xDst - xSrc; patOrg.y = yDst - ySrc; ret = uxa_fill_region_tiled(pDst->pDrawable, ®ion, (PixmapPtr) pSrc-> pDrawable, &patOrg, FB_ALLONES, GXcopy); REGION_UNINIT(pDst->pDrawable->pScreen, ®ion); if (ret) goto done; } } } /* Remove repeat in mask if useless */ if (pMask && pMask->pDrawable && pMask->repeat && pMask->filter != PictFilterConvolution && transform_is_integer_translation(pMask->transform, &tx, &ty) && (pMask->pDrawable->width > 1 || pMask->pDrawable->height > 1) && drawable_contains(pMask->pDrawable, xMask + tx, yMask + ty, width, height)) pMask->repeat = 0; if (uxa_screen->info->prepare_composite) { Bool isSrcSolid; ret = uxa_try_driver_composite(op, pSrc, pMask, pDst, xSrc, ySrc, xMask, yMask, xDst, yDst, width, height); if (ret == 1) goto done; /* For generic masks and solid src pictures, mach64 can do * Over in two passes, similar to the component-alpha case. */ isSrcSolid = pSrc->pDrawable ? pSrc->pDrawable->width == 1 && pSrc->pDrawable->height == 1 && pSrc->repeat : pSrc->pSourcePict ? pSrc->pSourcePict->type == SourcePictTypeSolidFill : 0; /* If we couldn't do the Composite in a single pass, and it * was a component-alpha Over, see if we can do it in two * passes with an OutReverse and then an Add. */ if (ret == -1 && op == PictOpOver && pMask && (pMask->componentAlpha || isSrcSolid)) { ret = uxa_try_magic_two_pass_composite_helper(op, pSrc, pMask, pDst, xSrc, ySrc, xMask, yMask, xDst, yDst, width, height); if (ret == 1) goto done; } } fallback: uxa_print_composite_fallback("uxa_composite", op, pSrc, pMask, pDst); uxa_check_composite(op, pSrc, pMask, pDst, xSrc, ySrc, xMask, yMask, xDst, yDst, width, height); done: pSrc->repeat = saveSrcRepeat; if (pMask) pMask->repeat = saveMaskRepeat; } #endif /** * Same as miCreateAlphaPicture, except it uses uxa_check_poly_fill_rect instead * of PolyFillRect to initialize the pixmap after creating it, to prevent * the pixmap from being migrated. * * See the comments about uxa_trapezoids and uxa_triangles. */ static PicturePtr uxa_create_alpha_picture(ScreenPtr pScreen, PicturePtr pDst, PictFormatPtr pPictFormat, CARD16 width, CARD16 height) { PixmapPtr pPixmap; PicturePtr pPicture; int error; if (width > 32767 || height > 32767) return 0; if (!pPictFormat) { if (pDst->polyEdge == PolyEdgeSharp) pPictFormat = PictureMatchFormat(pScreen, 1, PICT_a1); else pPictFormat = PictureMatchFormat(pScreen, 8, PICT_a8); if (!pPictFormat) return 0; } pPixmap = (*pScreen->CreatePixmap) (pScreen, width, height, pPictFormat->depth, UXA_CREATE_PIXMAP_FOR_MAP); if (!pPixmap) return 0; pPicture = CreatePicture(0, &pPixmap->drawable, pPictFormat, 0, 0, serverClient, &error); (*pScreen->DestroyPixmap) (pPixmap); return pPicture; } static void uxa_check_trapezoids(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int ntrap, xTrapezoid * traps) { ScreenPtr screen = dst->pDrawable->pScreen; if (maskFormat) { PixmapPtr scratch = NULL; PicturePtr mask; INT16 xDst, yDst; INT16 xRel, yRel; BoxRec bounds; int width, height; pixman_image_t *image; pixman_format_code_t format; int error; xDst = traps[0].left.p1.x >> 16; yDst = traps[0].left.p1.y >> 16; miTrapezoidBounds (ntrap, traps, &bounds); if (bounds.y1 >= bounds.y2 || bounds.x1 >= bounds.x2) return; width = bounds.x2 - bounds.x1; height = bounds.y2 - bounds.y1; format = maskFormat->format | (BitsPerPixel(maskFormat->depth) << 24); image = pixman_image_create_bits(format, width, height, NULL, 0); if (!image) return; for (; ntrap; ntrap--, traps++) pixman_rasterize_trapezoid(image, (pixman_trapezoid_t *) traps, -bounds.x1, -bounds.y1); scratch = GetScratchPixmapHeader(screen, width, height, PIXMAN_FORMAT_DEPTH(format), PIXMAN_FORMAT_BPP(format), pixman_image_get_stride(image), pixman_image_get_data(image)); if (!scratch) { pixman_image_unref(image); return; } mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, PIXMAN_FORMAT_DEPTH(format), format), 0, 0, serverClient, &error); if (!mask) { FreeScratchPixmapHeader(scratch); pixman_image_unref(image); return; } xRel = bounds.x1 + xSrc - xDst; yRel = bounds.y1 + ySrc - yDst; CompositePicture(op, src, mask, dst, xRel, yRel, 0, 0, bounds.x1, bounds.y1, width, height); FreePicture(mask, 0); FreeScratchPixmapHeader(scratch); pixman_image_unref(image); } else { if (dst->polyEdge == PolyEdgeSharp) maskFormat = PictureMatchFormat(screen, 1, PICT_a1); else maskFormat = PictureMatchFormat(screen, 8, PICT_a8); for (; ntrap; ntrap--, traps++) uxa_check_trapezoids(op, src, dst, maskFormat, xSrc, ySrc, 1, traps); } } /** * uxa_trapezoids is essentially a copy of miTrapezoids that uses * uxa_create_alpha_picture instead of miCreateAlphaPicture. * * The problem with miCreateAlphaPicture is that it calls PolyFillRect * to initialize the contents after creating the pixmap, which * causes the pixmap to be moved in for acceleration. The subsequent * call to RasterizeTrapezoid won't be accelerated however, which * forces the pixmap to be moved out again. * * uxa_create_alpha_picture avoids this roundtrip by using * uxa_check_poly_fill_rect to initialize the contents. */ void uxa_trapezoids(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int ntrap, xTrapezoid * traps) { ScreenPtr screen = dst->pDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(screen); BoxRec bounds; Bool direct; if (uxa_screen->force_fallback) { uxa_check_trapezoids(op, src, dst, maskFormat, xSrc, ySrc, ntrap, traps); return; } direct = op == PictOpAdd && miIsSolidAlpha(src); if (maskFormat || direct) { miTrapezoidBounds(ntrap, traps, &bounds); if (bounds.y1 >= bounds.y2 || bounds.x1 >= bounds.x2) return; } /* * Check for solid alpha add */ if (direct) { DrawablePtr pDraw = dst->pDrawable; PixmapPtr pixmap = uxa_get_drawable_pixmap(pDraw); int xoff, yoff; uxa_get_drawable_deltas(pDraw, pixmap, &xoff, &yoff); xoff += pDraw->x; yoff += pDraw->y; if (uxa_prepare_access(pDraw, UXA_ACCESS_RW)) { PictureScreenPtr ps = GetPictureScreen(screen); for (; ntrap; ntrap--, traps++) (*ps->RasterizeTrapezoid) (dst, traps, 0, 0); uxa_finish_access(pDraw, UXA_ACCESS_RW); } } else if (maskFormat) { PixmapPtr scratch = NULL; PicturePtr mask; INT16 xDst, yDst; INT16 xRel, yRel; int width, height; pixman_image_t *image; pixman_format_code_t format; xDst = traps[0].left.p1.x >> 16; yDst = traps[0].left.p1.y >> 16; width = bounds.x2 - bounds.x1; height = bounds.y2 - bounds.y1; format = maskFormat->format | (BitsPerPixel(maskFormat->depth) << 24); image = pixman_image_create_bits(format, width, height, NULL, 0); if (!image) return; for (; ntrap; ntrap--, traps++) pixman_rasterize_trapezoid(image, (pixman_trapezoid_t *) traps, -bounds.x1, -bounds.y1); if (uxa_drawable_is_offscreen(dst->pDrawable)) { mask = uxa_picture_from_pixman_image(screen, image, format); } else { int error; scratch = GetScratchPixmapHeader(screen, width, height, PIXMAN_FORMAT_DEPTH(format), PIXMAN_FORMAT_BPP(format), pixman_image_get_stride(image), pixman_image_get_data(image)); mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, PIXMAN_FORMAT_DEPTH(format), format), 0, 0, serverClient, &error); } if (!mask) { if (scratch) FreeScratchPixmapHeader(scratch); pixman_image_unref(image); return; } xRel = bounds.x1 + xSrc - xDst; yRel = bounds.y1 + ySrc - yDst; CompositePicture(op, src, mask, dst, xRel, yRel, 0, 0, bounds.x1, bounds.y1, width, height); FreePicture(mask, 0); if (scratch) FreeScratchPixmapHeader(scratch); pixman_image_unref(image); } else { if (dst->polyEdge == PolyEdgeSharp) maskFormat = PictureMatchFormat(screen, 1, PICT_a1); else maskFormat = PictureMatchFormat(screen, 8, PICT_a8); for (; ntrap; ntrap--, traps++) uxa_trapezoids(op, src, dst, maskFormat, xSrc, ySrc, 1, traps); } } static void uxa_check_triangles(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int ntri, xTriangle *tri) { ScreenPtr screen = dst->pDrawable->pScreen; if (maskFormat) { PixmapPtr scratch = NULL; PicturePtr mask; INT16 xDst, yDst; INT16 xRel, yRel; BoxRec bounds; int width, height; pixman_image_t *image; pixman_format_code_t format; int error; xDst = pixman_fixed_to_int(tri[0].p1.x); yDst = pixman_fixed_to_int(tri[0].p1.y); miTriangleBounds (ntri, tri, &bounds); if (bounds.y1 >= bounds.y2 || bounds.x1 >= bounds.x2) return; width = bounds.x2 - bounds.x1; height = bounds.y2 - bounds.y1; format = maskFormat->format | (BitsPerPixel(maskFormat->depth) << 24); image = pixman_image_create_bits(format, width, height, NULL, 0); if (!image) return; pixman_add_triangles(image, -bounds.x1, -bounds.y1, ntri, (pixman_triangle_t *)tri); scratch = GetScratchPixmapHeader(screen, width, height, PIXMAN_FORMAT_DEPTH(format), PIXMAN_FORMAT_BPP(format), pixman_image_get_stride(image), pixman_image_get_data(image)); if (!scratch) { pixman_image_unref(image); return; } mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, PIXMAN_FORMAT_DEPTH(format), format), 0, 0, serverClient, &error); if (!mask) { FreeScratchPixmapHeader(scratch); pixman_image_unref(image); return; } xRel = bounds.x1 + xSrc - xDst; yRel = bounds.y1 + ySrc - yDst; CompositePicture(op, src, mask, dst, xRel, yRel, 0, 0, bounds.x1, bounds.y1, width, height); FreePicture(mask, 0); FreeScratchPixmapHeader(scratch); pixman_image_unref(image); } else { if (dst->polyEdge == PolyEdgeSharp) maskFormat = PictureMatchFormat(screen, 1, PICT_a1); else maskFormat = PictureMatchFormat(screen, 8, PICT_a8); for (; ntri; ntri--, tri++) uxa_check_triangles(op, src, dst, maskFormat, xSrc, ySrc, 1, tri); } } /** * uxa_triangles is essentially a copy of miTriangles that uses * uxa_create_alpha_picture instead of miCreateAlphaPicture. * * The problem with miCreateAlphaPicture is that it calls PolyFillRect * to initialize the contents after creating the pixmap, which * causes the pixmap to be moved in for acceleration. The subsequent * call to AddTriangles won't be accelerated however, which forces the pixmap * to be moved out again. * * uxa_create_alpha_picture avoids this roundtrip by using * uxa_check_poly_fill_rect to initialize the contents. */ void uxa_triangles(CARD8 op, PicturePtr pSrc, PicturePtr pDst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int ntri, xTriangle * tris) { ScreenPtr pScreen = pDst->pDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(pScreen); PictureScreenPtr ps = GetPictureScreen(pScreen); BoxRec bounds; Bool direct; if (uxa_screen->force_fallback) { uxa_check_triangles(op, pSrc, pDst, maskFormat, xSrc, ySrc, ntri, tris); return; } direct = op == PictOpAdd && miIsSolidAlpha(pSrc); if (maskFormat || direct) { miTriangleBounds(ntri, tris, &bounds); if (bounds.y1 >= bounds.y2 || bounds.x1 >= bounds.x2) return; } /* * Check for solid alpha add */ if (direct) { DrawablePtr pDraw = pDst->pDrawable; if (uxa_prepare_access(pDraw, UXA_ACCESS_RW)) { (*ps->AddTriangles) (pDst, 0, 0, ntri, tris); uxa_finish_access(pDraw, UXA_ACCESS_RW); } } else if (maskFormat) { PicturePtr pPicture; INT16 xDst, yDst; INT16 xRel, yRel; int width = bounds.x2 - bounds.x1; int height = bounds.y2 - bounds.y1; GCPtr pGC; xRectangle rect; xDst = tris[0].p1.x >> 16; yDst = tris[0].p1.y >> 16; pPicture = uxa_create_alpha_picture(pScreen, pDst, maskFormat, width, height); if (!pPicture) return; /* Clear the alpha picture to 0. */ pGC = GetScratchGC(pPicture->pDrawable->depth, pScreen); if (!pGC) { FreePicture(pPicture, 0); return; } ValidateGC(pPicture->pDrawable, pGC); rect.x = 0; rect.y = 0; rect.width = width; rect.height = height; uxa_check_poly_fill_rect(pPicture->pDrawable, pGC, 1, &rect); FreeScratchGC(pGC); if (uxa_prepare_access(pPicture->pDrawable, UXA_ACCESS_RW)) { (*ps->AddTriangles) (pPicture, -bounds.x1, -bounds.y1, ntri, tris); uxa_finish_access(pPicture->pDrawable, UXA_ACCESS_RW); } xRel = bounds.x1 + xSrc - xDst; yRel = bounds.y1 + ySrc - yDst; CompositePicture(op, pSrc, pPicture, pDst, xRel, yRel, 0, 0, bounds.x1, bounds.y1, bounds.x2 - bounds.x1, bounds.y2 - bounds.y1); FreePicture(pPicture, 0); } else { if (pDst->polyEdge == PolyEdgeSharp) maskFormat = PictureMatchFormat(pScreen, 1, PICT_a1); else maskFormat = PictureMatchFormat(pScreen, 8, PICT_a8); for (; ntri; ntri--, tris++) uxa_triangles(op, pSrc, pDst, maskFormat, xSrc, ySrc, 1, tris); } } void uxa_add_traps(PicturePtr pPicture, INT16 x_off, INT16 y_off, int ntrap, xTrap * traps) { uxa_check_add_traps(pPicture, x_off, y_off, ntrap, traps); } xf86-video-intel-2.99.917/src/uxa/i915_reg.h0000664000175000017500000007762612400044327015026 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef _I915_REG_H_ #define _I915_REG_H_ #define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value) #define CMD_3D (0x3<<29) #define PRIM3D (CMD_3D | (0x1f<<24)) #define PRIM3D_INDIRECT_SEQUENTIAL ((1<<23) | (0<<17)) #define PRIM3D_TRILIST (PRIM3D | (0x0<<18)) #define PRIM3D_TRISTRIP (PRIM3D | (0x1<<18)) #define PRIM3D_TRISTRIP_RVRSE (PRIM3D | (0x2<<18)) #define PRIM3D_TRIFAN (PRIM3D | (0x3<<18)) #define PRIM3D_POLY (PRIM3D | (0x4<<18)) #define PRIM3D_LINELIST (PRIM3D | (0x5<<18)) #define PRIM3D_LINESTRIP (PRIM3D | (0x6<<18)) #define PRIM3D_RECTLIST (PRIM3D | (0x7<<18)) #define PRIM3D_POINTLIST (PRIM3D | (0x8<<18)) #define PRIM3D_DIB (PRIM3D | (0x9<<18)) #define PRIM3D_CLEAR_RECT (PRIM3D | (0xa<<18)) #define PRIM3D_ZONE_INIT (PRIM3D | (0xd<<18)) #define PRIM3D_MASK (0x1f<<18) /* p137 */ #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) #define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) #define AA_LINE_ECAAR_WIDTH_0_5 0 #define AA_LINE_ECAAR_WIDTH_1_0 (1<<14) #define AA_LINE_ECAAR_WIDTH_2_0 (2<<14) #define AA_LINE_ECAAR_WIDTH_4_0 (3<<14) #define AA_LINE_REGION_WIDTH_ENABLE (1<<8) #define AA_LINE_REGION_WIDTH_0_5 0 #define AA_LINE_REGION_WIDTH_1_0 (1<<6) #define AA_LINE_REGION_WIDTH_2_0 (2<<6) #define AA_LINE_REGION_WIDTH_4_0 (3<<6) /* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/ #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24)) #define BFO_ENABLE_STENCIL_REF (1<<23) #define BFO_STENCIL_REF_SHIFT 15 #define BFO_STENCIL_REF_MASK (0xff<<15) #define BFO_ENABLE_STENCIL_FUNCS (1<<14) #define BFO_STENCIL_TEST_SHIFT 11 #define BFO_STENCIL_TEST_MASK (0x7<<11) #define BFO_STENCIL_FAIL_SHIFT 8 #define BFO_STENCIL_FAIL_MASK (0x7<<8) #define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5 #define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5) #define BFO_STENCIL_PASS_Z_PASS_SHIFT 2 #define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2) #define BFO_ENABLE_STENCIL_TWO_SIDE (1<<1) #define BFO_STENCIL_TWO_SIDE (1<<0) /* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */ #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24)) #define BFM_ENABLE_STENCIL_TEST_MASK (1<<17) #define BFM_ENABLE_STENCIL_WRITE_MASK (1<<16) #define BFM_STENCIL_TEST_MASK_SHIFT 8 #define BFM_STENCIL_TEST_MASK_MASK (0xff<<8) #define BFM_STENCIL_WRITE_MASK_SHIFT 0 #define BFM_STENCIL_WRITE_MASK_MASK (0xff<<0) /* 3DSTATE_BIN_CONTROL p141 */ /* p143 */ #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) /* Dword 1 */ #define BUF_3D_ID_COLOR_BACK (0x3<<24) #define BUF_3D_ID_DEPTH (0x7<<24) #define BUF_3D_USE_FENCE (1<<23) #define BUF_3D_TILED_SURFACE (1<<22) #define BUF_3D_TILE_WALK_X 0 #define BUF_3D_TILE_WALK_Y (1<<21) #define BUF_3D_PITCH(x) (((x)/4)<<2) /* Dword 2 */ #define BUF_3D_ADDR(x) ((x) & ~0x3) /* 3DSTATE_CHROMA_KEY */ /* 3DSTATE_CLEAR_PARAMETERS, p150 */ #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5) /* Dword 1 */ #define CLEARPARAM_CLEAR_RECT (1 << 16) #define CLEARPARAM_ZONE_INIT (0 << 16) #define CLEARPARAM_WRITE_COLOR (1 << 2) #define CLEARPARAM_WRITE_DEPTH (1 << 1) #define CLEARPARAM_WRITE_STENCIL (1 << 0) /* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */ #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) /* 3DSTATE_COORD_SET_BINDINGS, p154 */ #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24)) #define CSB_TCB(iunit, eunit) ((eunit)<<(iunit*3)) /* p156 */ #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) /* p157 */ #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) /* p158 */ #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) /* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */ #define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16)) /* scale in dword 1 */ /* The depth subrectangle is not supported, but must be disabled. */ /* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */ #define _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<<19) | (1 << 1) | (0 << 0)) /* p161 */ #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) /* Dword 1 */ #define TEX_DEFAULT_COLOR_OGL (0<<30) #define TEX_DEFAULT_COLOR_D3D (1<<30) #define ZR_EARLY_DEPTH (1<<29) #define LOD_PRECLAMP_OGL (1<<28) #define LOD_PRECLAMP_D3D (0<<28) #define DITHER_FULL_ALWAYS (0<<26) #define DITHER_FULL_ON_FB_BLEND (1<<26) #define DITHER_CLAMPED_ALWAYS (2<<26) #define LINEAR_GAMMA_BLEND_32BPP (1<<25) #define DEBUG_DISABLE_ENH_DITHER (1<<24) #define DSTORG_HORT_BIAS(x) ((x)<<20) #define DSTORG_VERT_BIAS(x) ((x)<<16) #define COLOR_4_2_2_CHNL_WRT_ALL 0 #define COLOR_4_2_2_CHNL_WRT_Y (1<<12) #define COLOR_4_2_2_CHNL_WRT_CR (2<<12) #define COLOR_4_2_2_CHNL_WRT_CB (3<<12) #define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) #define COLR_BUF_8BIT 0 #define COLR_BUF_RGB555 (1<<8) #define COLR_BUF_RGB565 (2<<8) #define COLR_BUF_ARGB8888 (3<<8) #define COLR_BUF_ARGB4444 (8<<8) #define COLR_BUF_ARGB1555 (9<<8) #define COLR_BUF_ARGB2AAA (0xa<<8) #define DEPTH_FRMT_16_FIXED 0 #define DEPTH_FRMT_16_FLOAT (1<<2) #define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) #define VERT_LINE_STRIDE_1 (1<<1) #define VERT_LINE_STRIDE_0 (0<<1) #define VERT_LINE_STRIDE_OFS_1 1 #define VERT_LINE_STRIDE_OFS_0 0 /* p166 */ #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) /* Dword 1 */ #define DRAW_RECT_DIS_DEPTH_OFS (1<<30) #define DRAW_DITHER_OFS_X(x) ((x)<<26) #define DRAW_DITHER_OFS_Y(x) ((x)<<24) /* Dword 2 */ #define DRAW_YMIN(x) ((x)<<16) #define DRAW_XMIN(x) (x) /* Dword 3 */ #define DRAW_YMAX(x) ((x)<<16) #define DRAW_XMAX(x) (x) /* Dword 4 */ #define DRAW_YORG(x) ((x)<<16) #define DRAW_XORG(x) (x) /* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */ /* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */ /* _3DSTATE_FOG_COLOR, p173 */ #define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) #define FOG_COLOR_RED(x) ((x)<<16) #define FOG_COLOR_GREEN(x) ((x)<<8) #define FOG_COLOR_BLUE(x) (x) /* _3DSTATE_FOG_MODE, p174 */ #define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) /* Dword 1 */ #define FMC1_FOGFUNC_MODIFY_ENABLE (1<<31) #define FMC1_FOGFUNC_VERTEX (0<<28) #define FMC1_FOGFUNC_PIXEL_EXP (1<<28) #define FMC1_FOGFUNC_PIXEL_EXP2 (2<<28) #define FMC1_FOGFUNC_PIXEL_LINEAR (3<<28) #define FMC1_FOGFUNC_MASK (3<<28) #define FMC1_FOGINDEX_MODIFY_ENABLE (1<<27) #define FMC1_FOGINDEX_Z (0<<25) #define FMC1_FOGINDEX_W (1<<25) #define FMC1_C1_C2_MODIFY_ENABLE (1<<24) #define FMC1_DENSITY_MODIFY_ENABLE (1<<23) #define FMC1_C1_ONE (1<<13) #define FMC1_C1_MASK (0xffff<<4) /* Dword 2 */ #define FMC2_C2_ONE (1<<16) /* Dword 3 */ #define FMC3_D_ONE (1<<16) /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */ #define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) #define IAB_MODIFY_ENABLE (1<<23) #define IAB_ENABLE (1<<22) #define IAB_MODIFY_FUNC (1<<21) #define IAB_FUNC_SHIFT 16 #define IAB_MODIFY_SRC_FACTOR (1<<11) #define IAB_SRC_FACTOR_SHIFT 6 #define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6) #define IAB_MODIFY_DST_FACTOR (1<<5) #define IAB_DST_FACTOR_SHIFT 0 #define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0) #define BLENDFACT_ZERO 0x01 #define BLENDFACT_ONE 0x02 #define BLENDFACT_SRC_COLR 0x03 #define BLENDFACT_INV_SRC_COLR 0x04 #define BLENDFACT_SRC_ALPHA 0x05 #define BLENDFACT_INV_SRC_ALPHA 0x06 #define BLENDFACT_DST_ALPHA 0x07 #define BLENDFACT_INV_DST_ALPHA 0x08 #define BLENDFACT_DST_COLR 0x09 #define BLENDFACT_INV_DST_COLR 0x0a #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b #define BLENDFACT_CONST_COLOR 0x0c #define BLENDFACT_INV_CONST_COLOR 0x0d #define BLENDFACT_CONST_ALPHA 0x0e #define BLENDFACT_INV_CONST_ALPHA 0x0f #define BLENDFACT_MASK 0x0f #define BLENDFUNC_ADD 0x0 #define BLENDFUNC_SUBTRACT 0x1 #define BLENDFUNC_REVERSE_SUBTRACT 0x2 #define BLENDFUNC_MIN 0x3 #define BLENDFUNC_MAX 0x4 #define BLENDFUNC_MASK 0x7 /* 3DSTATE_LOAD_INDIRECT, p180 */ #define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16)) #define LI0_STATE_STATIC_INDIRECT (0x01<<8) #define LI0_STATE_DYNAMIC_INDIRECT (0x02<<8) #define LI0_STATE_SAMPLER (0x04<<8) #define LI0_STATE_MAP (0x08<<8) #define LI0_STATE_PROGRAM (0x10<<8) #define LI0_STATE_CONSTANTS (0x20<<8) #define SIS0_BUFFER_ADDRESS(x) ((x)&~0x3) #define SIS0_FORCE_LOAD (1<<1) #define SIS0_BUFFER_VALID (1<<0) #define SIS1_BUFFER_LENGTH(x) ((x)&0xff) #define DIS0_BUFFER_ADDRESS(x) ((x)&~0x3) #define DIS0_BUFFER_RESET (1<<1) #define DIS0_BUFFER_VALID (1<<0) #define SSB0_BUFFER_ADDRESS(x) ((x)&~0x3) #define SSB0_FORCE_LOAD (1<<1) #define SSB0_BUFFER_VALID (1<<0) #define SSB1_BUFFER_LENGTH(x) ((x)&0xff) #define MSB0_BUFFER_ADDRESS(x) ((x)&~0x3) #define MSB0_FORCE_LOAD (1<<1) #define MSB0_BUFFER_VALID (1<<0) #define MSB1_BUFFER_LENGTH(x) ((x)&0xff) #define PSP0_BUFFER_ADDRESS(x) ((x)&~0x3) #define PSP0_FORCE_LOAD (1<<1) #define PSP0_BUFFER_VALID (1<<0) #define PSP1_BUFFER_LENGTH(x) ((x)&0xff) #define PSC0_BUFFER_ADDRESS(x) ((x)&~0x3) #define PSC0_FORCE_LOAD (1<<1) #define PSC0_BUFFER_VALID (1<<0) #define PSC1_BUFFER_LENGTH(x) ((x)&0xff) /* _3DSTATE_RASTERIZATION_RULES */ #define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) #define ENABLE_POINT_RASTER_RULE (1<<15) #define OGL_POINT_RASTER_RULE (1<<13) #define ENABLE_TEXKILL_3D_4D (1<<10) #define TEXKILL_3D (0<<9) #define TEXKILL_4D (1<<9) #define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) #define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) #define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) #define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) /* _3DSTATE_SCISSOR_ENABLE, p256 */ #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) #define ENABLE_SCISSOR_RECT ((1<<1) | 1) #define DISABLE_SCISSOR_RECT (1<<1) /* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */ #define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) /* Dword 1 */ #define SCISSOR_RECT_0_YMIN(x) ((x)<<16) #define SCISSOR_RECT_0_XMIN(x) (x) /* Dword 2 */ #define SCISSOR_RECT_0_YMAX(x) ((x)<<16) #define SCISSOR_RECT_0_XMAX(x) (x) /* p189 */ #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16)) #define I1_LOAD_S(n) (1<<(4+n)) #define S0_VB_OFFSET_MASK 0xffffffc #define S0_AUTO_CACHE_INV_DISABLE (1<<0) #define S1_VERTEX_WIDTH_SHIFT 24 #define S1_VERTEX_WIDTH_MASK (0x3f<<24) #define S1_VERTEX_PITCH_SHIFT 16 #define S1_VERTEX_PITCH_MASK (0x3f<<16) #define TEXCOORDFMT_2D 0x0 #define TEXCOORDFMT_3D 0x1 #define TEXCOORDFMT_4D 0x2 #define TEXCOORDFMT_1D 0x3 #define TEXCOORDFMT_2D_16 0x4 #define TEXCOORDFMT_4D_16 0x5 #define TEXCOORDFMT_NOT_PRESENT 0xf #define S2_TEXCOORD_FMT0_MASK 0xf #define S2_TEXCOORD_FMT1_SHIFT 4 #define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4)) #define S2_TEXCOORD_NONE (~0) #define TEXCOORD_WRAP_SHORTEST_TCX 8 #define TEXCOORD_WRAP_SHORTEST_TCY 4 #define TEXCOORD_WRAP_SHORTEST_TCZ 2 #define TEXCOORD_PERSPECTIVE_DISABLE 1 #define S3_WRAP_SHORTEST_TCX(unit) (TEXCOORD_WRAP_SHORTEST_TCX << ((unit) * 4)) #define S3_WRAP_SHORTEST_TCY(unit) (TEXCOORD_WRAP_SHORTEST_TCY << ((unit) * 4)) #define S3_WRAP_SHORTEST_TCZ(unit) (TEXCOORD_WRAP_SHORTEST_TCZ << ((unit) * 4)) #define S3_PERSPECTIVE_DISABLE(unit) (TEXCOORD_PERSPECTIVE_DISABLE << ((unit) * 4)) /* S3 not interesting */ #define S4_POINT_WIDTH_SHIFT 23 #define S4_POINT_WIDTH_MASK (0x1ff<<23) #define S4_LINE_WIDTH_SHIFT 19 #define S4_LINE_WIDTH_ONE (0x2<<19) #define S4_LINE_WIDTH_MASK (0xf<<19) #define S4_FLATSHADE_ALPHA (1<<18) #define S4_FLATSHADE_FOG (1<<17) #define S4_FLATSHADE_SPECULAR (1<<16) #define S4_FLATSHADE_COLOR (1<<15) #define S4_CULLMODE_BOTH (0<<13) #define S4_CULLMODE_NONE (1<<13) #define S4_CULLMODE_CW (2<<13) #define S4_CULLMODE_CCW (3<<13) #define S4_CULLMODE_MASK (3<<13) #define S4_VFMT_POINT_WIDTH (1<<12) #define S4_VFMT_SPEC_FOG (1<<11) #define S4_VFMT_COLOR (1<<10) #define S4_VFMT_DEPTH_OFFSET (1<<9) #define S4_VFMT_XYZ (1<<6) #define S4_VFMT_XYZW (2<<6) #define S4_VFMT_XY (3<<6) #define S4_VFMT_XYW (4<<6) #define S4_VFMT_XYZW_MASK (7<<6) #define S4_FORCE_DEFAULT_DIFFUSE (1<<5) #define S4_FORCE_DEFAULT_SPECULAR (1<<4) #define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3) #define S4_VFMT_FOG_PARAM (1<<2) #define S4_SPRITE_POINT_ENABLE (1<<1) #define S4_LINE_ANTIALIAS_ENABLE (1<<0) #define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \ S4_VFMT_SPEC_FOG | \ S4_VFMT_COLOR | \ S4_VFMT_DEPTH_OFFSET | \ S4_VFMT_XYZW_MASK | \ S4_VFMT_FOG_PARAM) #define S5_WRITEDISABLE_ALPHA (1<<31) #define S5_WRITEDISABLE_RED (1<<30) #define S5_WRITEDISABLE_GREEN (1<<29) #define S5_WRITEDISABLE_BLUE (1<<28) #define S5_WRITEDISABLE_MASK (0xf<<28) #define S5_FORCE_DEFAULT_POINT_SIZE (1<<27) #define S5_LAST_PIXEL_ENABLE (1<<26) #define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25) #define S5_FOG_ENABLE (1<<24) #define S5_STENCIL_REF_SHIFT 16 #define S5_STENCIL_REF_MASK (0xff<<16) #define S5_STENCIL_TEST_FUNC_SHIFT 13 #define S5_STENCIL_TEST_FUNC_MASK (0x7<<13) #define S5_STENCIL_FAIL_SHIFT 10 #define S5_STENCIL_FAIL_MASK (0x7<<10) #define S5_STENCIL_PASS_Z_FAIL_SHIFT 7 #define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7) #define S5_STENCIL_PASS_Z_PASS_SHIFT 4 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) #define S5_STENCIL_WRITE_ENABLE (1<<3) #define S5_STENCIL_TEST_ENABLE (1<<2) #define S5_COLOR_DITHER_ENABLE (1<<1) #define S5_LOGICOP_ENABLE (1<<0) #define S6_ALPHA_TEST_ENABLE (1<<31) #define S6_ALPHA_TEST_FUNC_SHIFT 28 #define S6_ALPHA_TEST_FUNC_MASK (0x7<<28) #define S6_ALPHA_REF_SHIFT 20 #define S6_ALPHA_REF_MASK (0xff<<20) #define S6_DEPTH_TEST_ENABLE (1<<19) #define S6_DEPTH_TEST_FUNC_SHIFT 16 #define S6_DEPTH_TEST_FUNC_MASK (0x7<<16) #define S6_CBUF_BLEND_ENABLE (1<<15) #define S6_CBUF_BLEND_FUNC_SHIFT 12 #define S6_CBUF_BLEND_FUNC_MASK (0x7<<12) #define S6_CBUF_SRC_BLEND_FACT_SHIFT 8 #define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8) #define S6_CBUF_DST_BLEND_FACT_SHIFT 4 #define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4) #define S6_DEPTH_WRITE_ENABLE (1<<3) #define S6_COLOR_WRITE_ENABLE (1<<2) #define S6_TRISTRIP_PV_SHIFT 0 #define S6_TRISTRIP_PV_MASK (0x3<<0) #define S7_DEPTH_OFFSET_CONST_MASK ~0 /* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */ /* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */ /* _3DSTATE_MODES_4, p218 */ #define _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24)) #define ENABLE_LOGIC_OP_FUNC (1<<23) #define LOGIC_OP_FUNC(x) ((x)<<18) #define LOGICOP_MASK (0xf<<18) #define LOGICOP_COPY 0xc #define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) #define ENABLE_STENCIL_TEST_MASK (1<<17) #define STENCIL_TEST_MASK(x) ((x)<<8) #define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) #define ENABLE_STENCIL_WRITE_MASK (1<<16) #define STENCIL_WRITE_MASK(x) ((x)&0xff) /* _3DSTATE_MODES_5, p220 */ #define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) #define PIPELINE_FLUSH_RENDER_CACHE (1<<18) #define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16) /* p221 */ #define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16)) #define PS1_REG(n) (1<<(n)) #define PS2_CONST_X(n) (n) #define PS3_CONST_Y(n) (n) #define PS4_CONST_Z(n) (n) #define PS5_CONST_W(n) (n) /* p222 */ #define I915_MAX_TEX_INDIRECT 4 #define I915_MAX_TEX_INSN 32 #define I915_MAX_ALU_INSN 64 #define I915_MAX_DECL_INSN 27 #define I915_MAX_TEMPORARY 16 /* Each instruction is 3 dwords long, though most don't require all * this space. Maximum of 123 instructions. Smaller maxes per insn * type. */ #define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16)) #define REG_TYPE_R 0 /* temporary regs, no need to * dcl, must be written before * read -- Preserved between * phases. */ #define REG_TYPE_T 1 /* Interpolated values, must be * dcl'ed before use. * * 0..7: texture coord, * 8: diffuse spec, * 9: specular color, * 10: fog parameter in w. */ #define REG_TYPE_CONST 2 /* Restriction: only one const * can be referenced per * instruction, though it may be * selected for multiple inputs. * Constants not initialized * default to zero. */ #define REG_TYPE_S 3 /* sampler */ #define REG_TYPE_OC 4 /* output color (rgba) */ #define REG_TYPE_OD 5 /* output depth (w), xyz are * temporaries. If not written, * interpolated depth is used? */ #define REG_TYPE_U 6 /* unpreserved temporaries */ #define REG_TYPE_MASK 0x7 #define REG_NR_MASK 0xf /* REG_TYPE_T: */ #define T_TEX0 0 #define T_TEX1 1 #define T_TEX2 2 #define T_TEX3 3 #define T_TEX4 4 #define T_TEX5 5 #define T_TEX6 6 #define T_TEX7 7 #define T_DIFFUSE 8 #define T_SPECULAR 9 #define T_FOG_W 10 /* interpolated fog is in W coord */ /* Arithmetic instructions */ /* .replicate_swizzle == selection and replication of a particular * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww */ #define A0_NOP (0x0<<24) /* no operation */ #define A0_ADD (0x1<<24) /* dst = src0 + src1 */ #define A0_MOV (0x2<<24) /* dst = src0 */ #define A0_MUL (0x3<<24) /* dst = src0 * src1 */ #define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ #define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ #define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ #define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ #define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ #define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ #define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ #define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ #define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ #define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ #define A0_FLR (0x10<<24) /* dst = floor(src0) */ #define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ #define A0_TRC (0x12<<24) /* dst = int(src0) */ #define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ #define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ #define A0_DEST_SATURATE (1<<22) #define A0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ #define A0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define A0_DEST_CHANNEL_X (1<<10) #define A0_DEST_CHANNEL_Y (2<<10) #define A0_DEST_CHANNEL_Z (4<<10) #define A0_DEST_CHANNEL_W (8<<10) #define A0_DEST_CHANNEL_ALL (0xf<<10) #define A0_DEST_CHANNEL_SHIFT 10 #define A0_SRC0_TYPE_SHIFT 7 #define A0_SRC0_NR_SHIFT 2 #define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) #define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) #define SRC_X 0 #define SRC_Y 1 #define SRC_Z 2 #define SRC_W 3 #define SRC_ZERO 4 #define SRC_ONE 5 #define A1_SRC0_CHANNEL_X_NEGATE (1<<31) #define A1_SRC0_CHANNEL_X_SHIFT 28 #define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) #define A1_SRC0_CHANNEL_Y_SHIFT 24 #define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) #define A1_SRC0_CHANNEL_Z_SHIFT 20 #define A1_SRC0_CHANNEL_W_NEGATE (1<<19) #define A1_SRC0_CHANNEL_W_SHIFT 16 #define A1_SRC1_TYPE_SHIFT 13 #define A1_SRC1_NR_SHIFT 8 #define A1_SRC1_CHANNEL_X_NEGATE (1<<7) #define A1_SRC1_CHANNEL_X_SHIFT 4 #define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) #define A1_SRC1_CHANNEL_Y_SHIFT 0 #define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) #define A2_SRC1_CHANNEL_Z_SHIFT 28 #define A2_SRC1_CHANNEL_W_NEGATE (1<<27) #define A2_SRC1_CHANNEL_W_SHIFT 24 #define A2_SRC2_TYPE_SHIFT 21 #define A2_SRC2_NR_SHIFT 16 #define A2_SRC2_CHANNEL_X_NEGATE (1<<15) #define A2_SRC2_CHANNEL_X_SHIFT 12 #define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) #define A2_SRC2_CHANNEL_Y_SHIFT 8 #define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) #define A2_SRC2_CHANNEL_Z_SHIFT 4 #define A2_SRC2_CHANNEL_W_NEGATE (1<<3) #define A2_SRC2_CHANNEL_W_SHIFT 0 /* Texture instructions */ #define T0_TEXLD (0x15<<24) /* Sample texture using predeclared * sampler and address, and output * filtered texel data to destination * register */ #define T0_TEXLDP (0x16<<24) /* Same as texld but performs a * perspective divide of the texture * coordinate .xyz values by .w before * sampling. */ #define T0_TEXLDB (0x17<<24) /* Same as texld but biases the * computed LOD by w. Only S4.6 two's * comp is used. This implies that a * float to fixed conversion is * done. */ #define T0_TEXKILL (0x18<<24) /* Does not perform a sampling * operation. Simply kills the pixel * if any channel of the address * register is < 0.0. */ #define T0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ /* Note: U (unpreserved) regs do not retain their values between * phases (cannot be used for feedback) * * Note: oC and OD registers can only be used as the destination of a * texture instruction once per phase (this is an implementation * restriction). */ #define T0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ #define T0_SAMPLER_NR_MASK (0xf<<0) #define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ #define T1_ADDRESS_REG_NR_SHIFT 17 #define T2_MBZ 0 /* Declaration instructions */ #define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) * register or an s (sampler) * register. */ #define D0_SAMPLE_TYPE_SHIFT 22 #define D0_SAMPLE_TYPE_2D (0x0<<22) #define D0_SAMPLE_TYPE_CUBE (0x1<<22) #define D0_SAMPLE_TYPE_VOLUME (0x2<<22) #define D0_SAMPLE_TYPE_MASK (0x3<<22) #define D0_TYPE_SHIFT 19 /* Allow: T, S */ #define D0_NR_SHIFT 14 /* Allow T: 0..10, S: 0..15 */ #define D0_CHANNEL_X (1<<10) #define D0_CHANNEL_Y (2<<10) #define D0_CHANNEL_Z (4<<10) #define D0_CHANNEL_W (8<<10) #define D0_CHANNEL_ALL (0xf<<10) #define D0_CHANNEL_NONE (0<<10) #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse * or specular declarations. * * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) * * Must be zero for S (sampler) dcls */ #define D1_MBZ 0 #define D2_MBZ 0 /* p207. * The DWORD count is 3 times the number of bits set in MS1_MAPMASK_MASK */ #define _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16)) #define MS1_MAPMASK_SHIFT 0 #define MS1_MAPMASK_MASK (0x8fff<<0) #define MS2_UNTRUSTED_SURFACE (1<<31) #define MS2_ADDRESS_MASK 0xfffffffc #define MS2_VERTICAL_LINE_STRIDE (1<<1) #define MS2_VERTICAL_OFFSET (1<<1) #define MS3_HEIGHT_SHIFT 21 #define MS3_WIDTH_SHIFT 10 #define MS3_PALETTE_SELECT (1<<9) #define MS3_MAPSURF_FORMAT_SHIFT 7 #define MS3_MAPSURF_FORMAT_MASK (0x7<<7) #define MAPSURF_8BIT (1<<7) #define MAPSURF_16BIT (2<<7) #define MAPSURF_32BIT (3<<7) #define MAPSURF_422 (5<<7) #define MAPSURF_COMPRESSED (6<<7) #define MAPSURF_4BIT_INDEXED (7<<7) #define MS3_MT_FORMAT_MASK (0x7 << 3) #define MS3_MT_FORMAT_SHIFT 3 #define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */ #define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */ #define MT_8BIT_L8 (1<<3) #define MT_8BIT_A8 (4<<3) #define MT_8BIT_MONO8 (5<<3) #define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */ #define MT_16BIT_ARGB1555 (1<<3) #define MT_16BIT_ARGB4444 (2<<3) #define MT_16BIT_AY88 (3<<3) #define MT_16BIT_88DVDU (5<<3) #define MT_16BIT_BUMP_655LDVDU (6<<3) #define MT_16BIT_I16 (7<<3) #define MT_16BIT_L16 (8<<3) #define MT_16BIT_A16 (9<<3) #define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ #define MT_32BIT_ABGR8888 (1<<3) #define MT_32BIT_XRGB8888 (2<<3) #define MT_32BIT_XBGR8888 (3<<3) #define MT_32BIT_QWVU8888 (4<<3) #define MT_32BIT_AXVU8888 (5<<3) #define MT_32BIT_LXVU8888 (6<<3) #define MT_32BIT_XLVU8888 (7<<3) #define MT_32BIT_ARGB2101010 (8<<3) #define MT_32BIT_ABGR2101010 (9<<3) #define MT_32BIT_AWVU2101010 (0xA<<3) #define MT_32BIT_GR1616 (0xB<<3) #define MT_32BIT_VU1616 (0xC<<3) #define MT_32BIT_xI824 (0xD<<3) #define MT_32BIT_xA824 (0xE<<3) #define MT_32BIT_xL824 (0xF<<3) #define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */ #define MT_422_YCRCB_NORMAL (1<<3) #define MT_422_YCRCB_SWAPUV (2<<3) #define MT_422_YCRCB_SWAPUVY (3<<3) #define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */ #define MT_COMPRESS_DXT2_3 (1<<3) #define MT_COMPRESS_DXT4_5 (2<<3) #define MT_COMPRESS_FXT1 (3<<3) #define MT_COMPRESS_DXT1_RGB (4<<3) #define MS3_USE_FENCE_REGS (1<<2) #define MS3_TILED_SURFACE (1<<1) #define MS3_TILE_WALK (1<<0) /* The pitch is the pitch measured in DWORDS, minus 1 */ #define MS4_PITCH_SHIFT 21 #define MS4_CUBE_FACE_ENA_NEGX (1<<20) #define MS4_CUBE_FACE_ENA_POSX (1<<19) #define MS4_CUBE_FACE_ENA_NEGY (1<<18) #define MS4_CUBE_FACE_ENA_POSY (1<<17) #define MS4_CUBE_FACE_ENA_NEGZ (1<<16) #define MS4_CUBE_FACE_ENA_POSZ (1<<15) #define MS4_CUBE_FACE_ENA_MASK (0x3f<<15) #define MS4_MAX_LOD_SHIFT 9 #define MS4_MAX_LOD_MASK (0x3f<<9) #define MS4_MIP_LAYOUT_LEGACY (0<<8) #define MS4_MIP_LAYOUT_BELOW_LPT (0<<8) #define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8) #define MS4_VOLUME_DEPTH_SHIFT 0 #define MS4_VOLUME_DEPTH_MASK (0xff<<0) /* p244. * The DWORD count is 3 times the number of bits set in SS1_MAPMASK_MASK. */ #define _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16)) #define SS1_MAPMASK_SHIFT 0 #define SS1_MAPMASK_MASK (0x8fff<<0) #define SS2_REVERSE_GAMMA_ENABLE (1<<31) #define SS2_PACKED_TO_PLANAR_ENABLE (1<<30) #define SS2_COLORSPACE_CONVERSION (1<<29) #define SS2_CHROMAKEY_SHIFT 27 #define SS2_BASE_MIP_LEVEL_SHIFT 22 #define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22) #define SS2_MIP_FILTER_SHIFT 20 #define SS2_MIP_FILTER_MASK (0x3<<20) #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #define SS2_MAG_FILTER_SHIFT 17 #define SS2_MAG_FILTER_MASK (0x7<<17) #define FILTER_NEAREST 0 #define FILTER_LINEAR 1 #define FILTER_ANISOTROPIC 2 #define FILTER_4X4_1 3 #define FILTER_4X4_2 4 #define FILTER_4X4_FLAT 5 #define FILTER_6X5_MONO 6 /* XXX - check */ #define SS2_MIN_FILTER_SHIFT 14 #define SS2_MIN_FILTER_MASK (0x7<<14) #define SS2_LOD_BIAS_SHIFT 5 #define SS2_LOD_BIAS_ONE (0x10<<5) #define SS2_LOD_BIAS_MASK (0x1ff<<5) /* Shadow requires: * MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format * FILTER_4X4_x MIN and MAG filters */ #define SS2_SHADOW_ENABLE (1<<4) #define SS2_MAX_ANISO_MASK (1<<3) #define SS2_MAX_ANISO_2 (0<<3) #define SS2_MAX_ANISO_4 (1<<3) #define SS2_SHADOW_FUNC_SHIFT 0 #define SS2_SHADOW_FUNC_MASK (0x7<<0) /* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */ #define SS3_MIN_LOD_SHIFT 24 #define SS3_MIN_LOD_ONE (0x10<<24) #define SS3_MIN_LOD_MASK (0xff<<24) #define SS3_KILL_PIXEL_ENABLE (1<<17) #define SS3_TCX_ADDR_MODE_SHIFT 12 #define SS3_TCX_ADDR_MODE_MASK (0x7<<12) #define TEXCOORDMODE_WRAP 0 #define TEXCOORDMODE_MIRROR 1 #define TEXCOORDMODE_CLAMP_EDGE 2 #define TEXCOORDMODE_CUBE 3 #define TEXCOORDMODE_CLAMP_BORDER 4 #define TEXCOORDMODE_MIRROR_ONCE 5 #define SS3_TCY_ADDR_MODE_SHIFT 9 #define SS3_TCY_ADDR_MODE_MASK (0x7<<9) #define SS3_TCZ_ADDR_MODE_SHIFT 6 #define SS3_TCZ_ADDR_MODE_MASK (0x7<<6) #define SS3_NORMALIZED_COORDS (1<<5) #define SS3_TEXTUREMAP_INDEX_SHIFT 1 #define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1) #define SS3_DEINTERLACER_ENABLE (1<<0) #define SS4_BORDER_COLOR_MASK (~0) /* 3DSTATE_SPAN_STIPPLE, p258 */ #define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) #define ST1_ENABLE (1<<16) #define ST1_MASK (0xffff) #define FLUSH_MAP_CACHE (1<<0) #define FLUSH_RENDER_CACHE (1<<1) #endif xf86-video-intel-2.99.917/src/uxa/i830_reg.h0000664000175000017500000007025312400044327015007 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef _I830_REG_H_ #define _I830_REG_H_ #define I830_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value) /* Flush */ #define MI_FLUSH (0x04<<23) #define MI_FLUSH_DW (0x26<<23) #define MI_WRITE_DIRTY_STATE (1<<4) #define MI_END_SCENE (1<<3) #define MI_GLOBAL_SNAPSHOT_COUNT_RESET (1<<3) #define MI_INHIBIT_RENDER_CACHE_FLUSH (1<<2) #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) #define MI_INVALIDATE_MAP_CACHE (1<<0) /* broadwater flush bits */ #define BRW_MI_GLOBAL_SNAPSHOT_RESET (1 << 3) #define MI_BATCH_BUFFER_END (0xA << 23) /* Noop */ #define MI_NOOP 0x00 #define MI_NOOP_WRITE_ID (1<<22) #define MI_NOOP_ID_MASK (1<<22 - 1) /* Wait for Events */ #define MI_WAIT_FOR_EVENT (0x03<<23) #define MI_WAIT_FOR_PIPEB_SVBLANK (1<<18) #define MI_WAIT_FOR_PIPEA_SVBLANK (1<<17) #define MI_WAIT_FOR_OVERLAY_FLIP (1<<16) #define MI_WAIT_FOR_PIPEB_VBLANK (1<<7) #define MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW (1<<5) #define MI_WAIT_FOR_PIPEA_VBLANK (1<<3) #define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW (1<<1) /* Set the scan line for MI_WAIT_FOR_PIPE?_SCAN_LINE_WINDOW */ #define MI_LOAD_SCAN_LINES_INCL (0x12<<23) #define MI_LOAD_SCAN_LINES_DISPLAY_PIPEA (0) #define MI_LOAD_SCAN_LINES_DISPLAY_PIPEB (0x1<<20) /* BLT commands */ #define COLOR_BLT_CMD ((2<<29)|(0x40<<22)|(0x3)) #define COLOR_BLT_WRITE_ALPHA (1<<21) #define COLOR_BLT_WRITE_RGB (1<<20) #define XY_COLOR_BLT_CMD ((2<<29)|(0x50<<22)) #define XY_COLOR_BLT_WRITE_ALPHA (1<<21) #define XY_COLOR_BLT_WRITE_RGB (1<<20) #define XY_COLOR_BLT_TILED (1<<11) #define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)) #define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)) #define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_SRC_COPY_BLT_SRC_TILED (1<<15) #define XY_SRC_COPY_BLT_DST_TILED (1<<11) #define SRC_COPY_BLT_CMD ((2<<29)|(0x43<<22)) #define SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_PAT_BLT_IMMEDIATE ((2<<29)|(0x72<<22)) #define XY_MONO_PAT_BLT_CMD ((0x2<<29)|(0x52<<22)) #define XY_MONO_PAT_VERT_SEED ((1<<10)|(1<<9)|(1<<8)) #define XY_MONO_PAT_HORT_SEED ((1<<14)|(1<<13)|(1<<12)) #define XY_MONO_PAT_BLT_WRITE_ALPHA (1<<21) #define XY_MONO_PAT_BLT_WRITE_RGB (1<<20) #define XY_MONO_SRC_BLT_CMD ((0x2<<29)|(0x54<<22)) #define XY_MONO_SRC_BLT_WRITE_ALPHA (1<<21) #define XY_MONO_SRC_BLT_WRITE_RGB (1<<20) #define CMD_3D (0x3<<29) #define PRIM3D_INLINE (CMD_3D | (0x1f<<24)) #define PRIM3D_TRILIST (0x0<<18) #define PRIM3D_TRISTRIP (0x1<<18) #define PRIM3D_TRISTRIP_RVRSE (0x2<<18) #define PRIM3D_TRIFAN (0x3<<18) #define PRIM3D_POLY (0x4<<18) #define PRIM3D_LINELIST (0x5<<18) #define PRIM3D_LINESTRIP (0x6<<18) #define PRIM3D_RECTLIST (0x7<<18) #define PRIM3D_POINTLIST (0x8<<18) #define PRIM3D_DIB (0x9<<18) #define PRIM3D_CLEAR_RECT (0xa<<18) #define PRIM3D_ZONE_INIT (0xd<<18) #define PRIM3D_MASK (0x1f<<18) #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) #define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) #define AA_LINE_ECAAR_WIDTH_0_5 0 #define AA_LINE_ECAAR_WIDTH_1_0 (1<<14) #define AA_LINE_ECAAR_WIDTH_2_0 (2<<14) #define AA_LINE_ECAAR_WIDTH_4_0 (3<<14) #define AA_LINE_REGION_WIDTH_ENABLE (1<<8) #define AA_LINE_REGION_WIDTH_0_5 0 #define AA_LINE_REGION_WIDTH_1_0 (1<<6) #define AA_LINE_REGION_WIDTH_2_0 (2<<6) #define AA_LINE_REGION_WIDTH_4_0 (3<<6) #define AA_LINE_ENABLE ((1<<1) | 1) #define AA_LINE_DISABLE (1<<1) #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) /* Dword 1 */ #define BUF_3D_ID_COLOR_BACK (0x3<<24) #define BUF_3D_ID_DEPTH (0x7<<24) #define BUF_3D_USE_FENCE (1<<23) #define BUF_3D_TILED_SURFACE (1<<22) #define BUF_3D_TILE_WALK_X 0 #define BUF_3D_TILE_WALK_Y (1<<21) #define BUF_3D_PITCH(x) (((x)/4)<<2) /* Dword 2 */ #define BUF_3D_ADDR(x) ((x) & ~0x3) #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16)) #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \ ((0x90+(stage))<<16)) #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) /* Dword 1 */ #define DSTORG_HORT_BIAS(x) ((x)<<20) #define DSTORG_VERT_BIAS(x) ((x)<<16) #define COLOR_4_2_2_CHNL_WRT_ALL 0 #define COLOR_4_2_2_CHNL_WRT_Y (1<<12) #define COLOR_4_2_2_CHNL_WRT_CR (2<<12) #define COLOR_4_2_2_CHNL_WRT_CB (3<<12) #define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) #define COLR_BUF_8BIT 0 #define COLR_BUF_RGB555 (1<<8) #define COLR_BUF_RGB565 (2<<8) #define COLR_BUF_ARGB8888 (3<<8) #define COLR_BUF_ARGB4444 (8<<8) #define COLR_BUF_ARGB1555 (9<<8) #define DEPTH_IS_Z 0 #define DEPTH_IS_W (1<<6) #define DEPTH_FRMT_16_FIXED 0 #define DEPTH_FRMT_16_FLOAT (1<<2) #define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) #define DEPTH_FRMT_24_FLOAT_8_OTHER (3<<2) #define VERT_LINE_STRIDE_1 (1<<1) #define VERT_LINE_STRIDE_0 0 #define VERT_LINE_STRIDE_OFS_1 1 #define VERT_LINE_STRIDE_OFS_0 0 #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) /* Dword 1 */ #define DRAW_RECT_DIS_DEPTH_OFS (1<<30) #define DRAW_DITHER_OFS_X(x) ((x)<<26) #define DRAW_DITHER_OFS_Y(x) ((x)<<24) /* Dword 2 */ #define DRAW_YMIN(x) ((x)<<16) #define DRAW_XMIN(x) (x) /* Dword 3 */ #define DRAW_YMAX(x) ((x)<<16) #define DRAW_XMAX(x) (x) /* Dword 4 */ #define DRAW_YORG(x) ((x)<<16) #define DRAW_XORG(x) (x) #define _3DSTATE_ENABLES_1_CMD (CMD_3D|(0x3<<24)) #define ENABLE_LOGIC_OP_MASK ((1<<23)|(1<<22)) #define ENABLE_LOGIC_OP ((1<<23)|(1<<22)) #define DISABLE_LOGIC_OP (1<<23) #define ENABLE_STENCIL_TEST ((1<<21)|(1<<20)) #define DISABLE_STENCIL_TEST (1<<21) #define ENABLE_DEPTH_BIAS ((1<<11)|(1<<10)) #define DISABLE_DEPTH_BIAS (1<<11) #define ENABLE_SPEC_ADD_MASK ((1<<9)|(1<<8)) #define ENABLE_SPEC_ADD ((1<<9)|(1<<8)) #define DISABLE_SPEC_ADD (1<<9) #define ENABLE_DIS_FOG_MASK ((1<<7)|(1<<6)) #define ENABLE_FOG ((1<<7)|(1<<6)) #define DISABLE_FOG (1<<7) #define ENABLE_DIS_ALPHA_TEST_MASK ((1<<5)|(1<<4)) #define ENABLE_ALPHA_TEST ((1<<5)|(1<<4)) #define DISABLE_ALPHA_TEST (1<<5) #define ENABLE_DIS_CBLEND_MASK ((1<<3)|(1<<2)) #define ENABLE_COLOR_BLEND ((1<<3)|(1<<2)) #define DISABLE_COLOR_BLEND (1<<3) #define ENABLE_DIS_DEPTH_TEST_MASK ((1<<1)|1) #define ENABLE_DEPTH_TEST ((1<<1)|1) #define DISABLE_DEPTH_TEST (1<<1) /* _3DSTATE_ENABLES_2, p138 */ #define _3DSTATE_ENABLES_2_CMD (CMD_3D|(0x4<<24)) #define ENABLE_STENCIL_WRITE ((1<<21)|(1<<20)) #define DISABLE_STENCIL_WRITE (1<<21) #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) #define DISABLE_TEX_CACHE (1<<17) #define ENABLE_DITHER ((1<<9)|(1<<8)) #define DISABLE_DITHER (1<<9) #define ENABLE_COLOR_MASK (1<<10) #define WRITEMASK_ALPHA (1<<7) #define WRITEMASK_ALPHA_SHIFT 7 #define WRITEMASK_RED (1<<6) #define WRITEMASK_RED_SHIFT 6 #define WRITEMASK_GREEN (1<<5) #define WRITEMASK_GREEN_SHIFT 5 #define WRITEMASK_BLUE (1<<4) #define WRITEMASK_BLUE_SHIFT 4 #define WRITEMASK_MASK ((1<<4)|(1<<5)|(1<<6)|(1<<7)) #define ENABLE_COLOR_WRITE ((1<<3)|(1<<2)) #define DISABLE_COLOR_WRITE (1<<3) #define ENABLE_DIS_DEPTH_WRITE_MASK 0x3 #define ENABLE_DEPTH_WRITE ((1<<1)|1) #define DISABLE_DEPTH_WRITE (1<<1) /* _3DSTATE_FOG_COLOR, p139 */ #define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) #define FOG_COLOR_RED(x) ((x)<<16) #define FOG_COLOR_GREEN(x) ((x)<<8) #define FOG_COLOR_BLUE(x) (x) /* _3DSTATE_FOG_MODE, p140 */ #define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) /* Dword 1 */ #define FOGFUNC_ENABLE (1<<31) #define FOGFUNC_VERTEX 0 #define FOGFUNC_PIXEL_EXP (1<<28) #define FOGFUNC_PIXEL_EXP2 (2<<28) #define FOGFUNC_PIXEL_LINEAR (3<<28) #define FOGSRC_INDEX_Z (1<<27) #define FOGSRC_INDEX_W ((1<<27)|(1<<25)) #define FOG_LINEAR_CONST (1<<24) #define FOG_CONST_1(x) ((x)<<4) #define ENABLE_FOG_DENSITY (1<<23) /* Dword 2 */ #define FOG_CONST_2(x) (x) /* Dword 3 */ #define FOG_DENSITY(x) (x) /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p142 */ #define _3DSTATE_INDPT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) #define ENABLE_INDPT_ALPHA_BLEND ((1<<23)|(1<<22)) #define DISABLE_INDPT_ALPHA_BLEND (1<<23) #define ALPHA_BLENDFUNC_MASK 0x3f0000 #define ENABLE_ALPHA_BLENDFUNC (1<<21) #define ABLENDFUNC_ADD 0 #define ABLENDFUNC_SUB (1<<16) #define ABLENDFUNC_RVSE_SUB (2<<16) #define ABLENDFUNC_MIN (3<<16) #define ABLENDFUNC_MAX (4<<16) #define SRC_DST_ABLEND_MASK 0xfff #define ENABLE_SRC_ABLEND_FACTOR (1<<11) #define SRC_ABLEND_FACT(x) ((x)<<6) #define ENABLE_DST_ABLEND_FACTOR (1<<5) #define DST_ABLEND_FACT(x) (x) #define BLENDFACTOR_ZERO 0x01 #define BLENDFACTOR_ONE 0x02 #define BLENDFACTOR_SRC_COLR 0x03 #define BLENDFACTOR_INV_SRC_COLR 0x04 #define BLENDFACTOR_SRC_ALPHA 0x05 #define BLENDFACTOR_INV_SRC_ALPHA 0x06 #define BLENDFACTOR_DST_ALPHA 0x07 #define BLENDFACTOR_INV_DST_ALPHA 0x08 #define BLENDFACTOR_DST_COLR 0x09 #define BLENDFACTOR_INV_DST_COLR 0x0a #define BLENDFACTOR_SRC_ALPHA_SATURATE 0x0b #define BLENDFACTOR_CONST_COLOR 0x0c #define BLENDFACTOR_INV_CONST_COLOR 0x0d #define BLENDFACTOR_CONST_ALPHA 0x0e #define BLENDFACTOR_INV_CONST_ALPHA 0x0f #define BLENDFACTOR_MASK 0x0f /* _3DSTATE_MAP_BLEND_ARG, p152 */ #define _3DSTATE_MAP_BLEND_ARG_CMD(stage) (CMD_3D|(0x0e<<24)|((stage)<<20)) #define TEXPIPE_COLOR 0 #define TEXPIPE_ALPHA (1<<18) #define TEXPIPE_KILL (2<<18) #define TEXBLEND_ARG0 0 #define TEXBLEND_ARG1 (1<<15) #define TEXBLEND_ARG2 (2<<15) #define TEXBLEND_ARG3 (3<<15) #define TEXBLENDARG_MODIFY_PARMS (1<<6) #define TEXBLENDARG_REPLICATE_ALPHA (1<<5) #define TEXBLENDARG_INV_ARG (1<<4) #define TEXBLENDARG_ONE 0 #define TEXBLENDARG_FACTOR 0x01 #define TEXBLENDARG_ACCUM 0x02 #define TEXBLENDARG_DIFFUSE 0x03 #define TEXBLENDARG_SPEC 0x04 #define TEXBLENDARG_CURRENT 0x05 #define TEXBLENDARG_TEXEL0 0x06 #define TEXBLENDARG_TEXEL1 0x07 #define TEXBLENDARG_TEXEL2 0x08 #define TEXBLENDARG_TEXEL3 0x09 #define TEXBLENDARG_FACTOR_N 0x0e /* _3DSTATE_MAP_BLEND_OP, p155 */ #define _3DSTATE_MAP_BLEND_OP_CMD(stage) (CMD_3D|(0x0d<<24)|((stage)<<20)) #if 0 # define TEXPIPE_COLOR 0 # define TEXPIPE_ALPHA (1<<18) # define TEXPIPE_KILL (2<<18) #endif #define ENABLE_TEXOUTPUT_WRT_SEL (1<<17) #define TEXOP_OUTPUT_CURRENT 0 #define TEXOP_OUTPUT_ACCUM (1<<15) #define ENABLE_TEX_CNTRL_STAGE ((1<<12)|(1<<11)) #define DISABLE_TEX_CNTRL_STAGE (1<<12) #define TEXOP_SCALE_SHIFT 9 #define TEXOP_SCALE_1X (0 << TEXOP_SCALE_SHIFT) #define TEXOP_SCALE_2X (1 << TEXOP_SCALE_SHIFT) #define TEXOP_SCALE_4X (2 << TEXOP_SCALE_SHIFT) #define TEXOP_MODIFY_PARMS (1<<8) #define TEXOP_LAST_STAGE (1<<7) #define TEXBLENDOP_KILLPIXEL 0x02 #define TEXBLENDOP_ARG1 0x01 #define TEXBLENDOP_ARG2 0x02 #define TEXBLENDOP_MODULATE 0x03 #define TEXBLENDOP_ADD 0x06 #define TEXBLENDOP_ADDSIGNED 0x07 #define TEXBLENDOP_BLEND 0x08 #define TEXBLENDOP_BLEND_AND_ADD 0x09 #define TEXBLENDOP_SUBTRACT 0x0a #define TEXBLENDOP_DOT3 0x0b #define TEXBLENDOP_DOT4 0x0c #define TEXBLENDOP_MODULATE_AND_ADD 0x0d #define TEXBLENDOP_MODULATE_2X_AND_ADD 0x0e #define TEXBLENDOP_MODULATE_4X_AND_ADD 0x0f /* _3DSTATE_MAP_BUMP_TABLE, p160 TODO */ /* _3DSTATE_MAP_COLOR_CHROMA_KEY, p161 TODO */ #define _3DSTATE_MAP_COORD_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8c<<16)) #define DISABLE_TEX_TRANSFORM (1<<28) #define TEXTURE_SET(x) (x<<29) #define _3DSTATE_VERTEX_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8b<<16)) #define DISABLE_VIEWPORT_TRANSFORM (1<<31) #define DISABLE_PERSPECTIVE_DIVIDE (1<<29) /* _3DSTATE_MAP_COORD_SET_BINDINGS, p162 */ #define _3DSTATE_MAP_COORD_SETBIND_CMD (CMD_3D|(0x1d<<24)|(0x02<<16)) #define TEXBIND_MASK3 ((1<<15)|(1<<14)|(1<<13)|(1<<12)) #define TEXBIND_MASK2 ((1<<11)|(1<<10)|(1<<9)|(1<<8)) #define TEXBIND_MASK1 ((1<<7)|(1<<6)|(1<<5)|(1<<4)) #define TEXBIND_MASK0 ((1<<3)|(1<<2)|(1<<1)|1) #define TEXBIND_SET3(x) ((x)<<12) #define TEXBIND_SET2(x) ((x)<<8) #define TEXBIND_SET1(x) ((x)<<4) #define TEXBIND_SET0(x) (x) #define TEXCOORDSRC_KEEP 0 #define TEXCOORDSRC_DEFAULT 0x01 #define TEXCOORDSRC_VTXSET_0 0x08 #define TEXCOORDSRC_VTXSET_1 0x09 #define TEXCOORDSRC_VTXSET_2 0x0a #define TEXCOORDSRC_VTXSET_3 0x0b #define TEXCOORDSRC_VTXSET_4 0x0c #define TEXCOORDSRC_VTXSET_5 0x0d #define TEXCOORDSRC_VTXSET_6 0x0e #define TEXCOORDSRC_VTXSET_7 0x0f #define MAP_UNIT(unit) ((unit)<<16) #define MAP_UNIT_MASK (0x7<<16) /* _3DSTATE_MAP_COORD_SETS, p164 */ #define _3DSTATE_MAP_COORD_SET_CMD (CMD_3D|(0x1c<<24)|(0x01<<19)) #define TEXCOORD_SET(n) ((n)<<16) #define ENABLE_TEXCOORD_PARAMS (1<<15) #define TEXCOORDS_ARE_NORMAL (1<<14) #define TEXCOORDS_ARE_IN_TEXELUNITS 0 #define TEXCOORDTYPE_CARTESIAN 0 #define TEXCOORDTYPE_HOMOGENEOUS (1<<11) #define TEXCOORDTYPE_VECTOR (2<<11) #define TEXCOORDTYPE_MASK (0x7<<11) #define ENABLE_ADDR_V_CNTL (1<<7) #define ENABLE_ADDR_U_CNTL (1<<3) #define TEXCOORD_ADDR_V_MODE(x) ((x)<<4) #define TEXCOORD_ADDR_U_MODE(x) (x) #define TEXCOORDMODE_WRAP 0 #define TEXCOORDMODE_MIRROR 1 #define TEXCOORDMODE_CLAMP 2 #define TEXCOORDMODE_WRAP_SHORTEST 3 #define TEXCOORDMODE_CLAMP_BORDER 4 #define TEXCOORD_ADDR_V_MASK 0x70 #define TEXCOORD_ADDR_U_MASK 0x7 /* _3DSTATE_MAP_CUBE, p168 TODO */ #define _3DSTATE_MAP_CUBE (CMD_3D|(0x1c<<24)|(0x0a<<19)) #define CUBE_NEGX_ENABLE (1<<5) #define CUBE_POSX_ENABLE (1<<4) #define CUBE_NEGY_ENABLE (1<<3) #define CUBE_POSY_ENABLE (1<<2) #define CUBE_NEGZ_ENABLE (1<<1) #define CUBE_POSZ_ENABLE (1<<0) #define _3DSTATE_MAP_INFO_CMD (CMD_3D|(0x1d<<24)|(0x0<<16)|3) #define TEXMAP_INDEX(x) ((x)<<28) #define MAP_SURFACE_8BIT (1<<24) #define MAP_SURFACE_16BIT (2<<24) #define MAP_SURFACE_32BIT (3<<24) #define MAP_FORMAT_2D (0) #define MAP_FORMAT_3D_CUBE (1<<11) /* _3DSTATE_MODES_1, p190 */ #define _3DSTATE_MODES_1_CMD (CMD_3D|(0x08<<24)) #define BLENDFUNC_MASK 0x3f0000 #define ENABLE_COLR_BLND_FUNC (1<<21) #define BLENDFUNC_ADD 0 #define BLENDFUNC_SUB (1<<16) #define BLENDFUNC_RVRSE_SUB (2<<16) #define BLENDFUNC_MIN (3<<16) #define BLENDFUNC_MAX (4<<16) #define SRC_DST_BLND_MASK 0xfff #define ENABLE_SRC_BLND_FACTOR (1<<11) #define ENABLE_DST_BLND_FACTOR (1<<5) #define SRC_BLND_FACT(x) ((x)<<6) #define DST_BLND_FACT(x) (x) /* _3DSTATE_MODES_2, p192 */ #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) #define ENABLE_GLOBAL_DEPTH_BIAS (1<<22) #define GLOBAL_DEPTH_BIAS(x) ((x)<<14) #define ENABLE_ALPHA_TEST_FUNC (1<<13) #define ENABLE_ALPHA_REF_VALUE (1<<8) #define ALPHA_TEST_FUNC(x) ((x)<<9) #define ALPHA_REF_VALUE(x) (x) #define ALPHA_TEST_REF_MASK 0x3fff /* _3DSTATE_MODES_3, p193 */ #define _3DSTATE_MODES_3_CMD (CMD_3D|(0x02<<24)) #define DEPTH_TEST_FUNC_MASK 0x1f0000 #define ENABLE_DEPTH_TEST_FUNC (1<<20) /* Uses COMPAREFUNC */ #define DEPTH_TEST_FUNC(x) ((x)<<16) #define ENABLE_ALPHA_SHADE_MODE (1<<11) #define ENABLE_FOG_SHADE_MODE (1<<9) #define ENABLE_SPEC_SHADE_MODE (1<<7) #define ENABLE_COLOR_SHADE_MODE (1<<5) #define ALPHA_SHADE_MODE(x) ((x)<<10) #define FOG_SHADE_MODE(x) ((x)<<8) #define SPEC_SHADE_MODE(x) ((x)<<6) #define COLOR_SHADE_MODE(x) ((x)<<4) #define CULLMODE_MASK 0xf #define ENABLE_CULL_MODE (1<<3) #define CULLMODE_BOTH 0 #define CULLMODE_NONE 1 #define CULLMODE_CW 2 #define CULLMODE_CCW 3 #define SHADE_MODE_LINEAR 0 #define SHADE_MODE_FLAT 0x1 /* _3DSTATE_MODES_4, p195 */ #define _3DSTATE_MODES_4_CMD (CMD_3D|(0x16<<24)) #define ENABLE_LOGIC_OP_FUNC (1<<23) #define LOGIC_OP_FUNC(x) ((x)<<18) #define LOGICOP_MASK ((1<<18)|(1<<19)|(1<<20)|(1<<21)) #define LOGICOP_CLEAR 0 #define LOGICOP_NOR 0x1 #define LOGICOP_AND_INV 0x2 #define LOGICOP_COPY_INV 0x3 #define LOGICOP_AND_RVRSE 0x4 #define LOGICOP_INV 0x5 #define LOGICOP_XOR 0x6 #define LOGICOP_NAND 0x7 #define LOGICOP_AND 0x8 #define LOGICOP_EQUIV 0x9 #define LOGICOP_NOOP 0xa #define LOGICOP_OR_INV 0xb #define LOGICOP_COPY 0xc #define LOGICOP_OR_RVRSE 0xd #define LOGICOP_OR 0xe #define LOGICOP_SET 0xf #define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) #define ENABLE_STENCIL_TEST_MASK (1<<17) #define STENCIL_TEST_MASK(x) ((x)<<8) #define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) #define ENABLE_STENCIL_WRITE_MASK (1<<16) #define STENCIL_WRITE_MASK(x) ((x)&0xff) /* _3DSTATE_MODES_5, p196 */ #define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) #define ENABLE_SPRITE_POINT_TEX (1<<23) #define SPRITE_POINT_TEX_ON (1<<22) #define SPRITE_POINT_TEX_OFF 0 #define FLUSH_RENDER_CACHE (1<<18) #define FLUSH_TEXTURE_CACHE (1<<16) #define FIXED_LINE_WIDTH_MASK 0xfc00 #define ENABLE_FIXED_LINE_WIDTH (1<<15) #define FIXED_LINE_WIDTH(x) ((x)<<10) #define FIXED_POINT_WIDTH_MASK 0x3ff #define ENABLE_FIXED_POINT_WIDTH (1<<9) #define FIXED_POINT_WIDTH(x) (x) /* _3DSTATE_RASTERIZATION_RULES, p198 */ #define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) #define ENABLE_POINT_RASTER_RULE (1<<15) #define OGL_POINT_RASTER_RULE (1<<13) #define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) #define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) #define ENABLE_TRI_STRIP_PROVOKE_VRTX (1<<2) #define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) #define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) #define TRI_STRIP_PROVOKE_VRTX(x) (x) /* _3DSTATE_SCISSOR_ENABLE, p200 */ #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) #define ENABLE_SCISSOR_RECT ((1<<1) | 1) #define DISABLE_SCISSOR_RECT (1<<1) /* _3DSTATE_SCISSOR_RECTANGLE_0, p201 */ #define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) /* Dword 1 */ #define SCISSOR_RECT_0_YMIN(x) ((x)<<16) #define SCISSOR_RECT_0_XMIN(x) (x) /* Dword 2 */ #define SCISSOR_RECT_0_YMAX(x) ((x)<<16) #define SCISSOR_RECT_0_XMAX(x) (x) /* _3DSTATE_STENCIL_TEST, p202 */ #define _3DSTATE_STENCIL_TEST_CMD (CMD_3D|(0x09<<24)) #define ENABLE_STENCIL_PARMS (1<<23) #define STENCIL_OPS_MASK (0xffc000) #define STENCIL_FAIL_OP(x) ((x)<<20) #define STENCIL_PASS_DEPTH_FAIL_OP(x) ((x)<<17) #define STENCIL_PASS_DEPTH_PASS_OP(x) ((x)<<14) #define ENABLE_STENCIL_TEST_FUNC_MASK ((1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)) #define ENABLE_STENCIL_TEST_FUNC (1<<13) /* Uses COMPAREFUNC */ #define STENCIL_TEST_FUNC(x) ((x)<<9) #define STENCIL_REF_VALUE_MASK ((1<<8)|0xff) #define ENABLE_STENCIL_REF_VALUE (1<<8) #define STENCIL_REF_VALUE(x) (x) /* _3DSTATE_VERTEX_FORMAT, p204 */ #define _3DSTATE_VFT0_CMD (CMD_3D|(0x05<<24)) #define VFT0_POINT_WIDTH (1<<12) #define VFT0_TEX_COUNT_MASK (7<<8) #define VFT0_TEX_COUNT_SHIFT 8 #define VFT0_TEX_COUNT(x) ((x)<<8) #define VFT0_SPEC (1<<7) #define VFT0_DIFFUSE (1<<6) #define VFT0_DEPTH_OFFSET (1<<5) #define VFT0_XYZ (1<<1) #define VFT0_XYZW (2<<1) #define VFT0_XY (3<<1) #define VFT0_XYW (4<<1) #define VFT0_XYZW_MASK (7<<1) /* _3DSTATE_VERTEX_FORMAT_2, p206 */ #define _3DSTATE_VERTEX_FORMAT_2_CMD (CMD_3D|(0x0a<<24)) #define VFT1_TEX7_FMT(x) ((x)<<14) #define VFT1_TEX6_FMT(x) ((x)<<12) #define VFT1_TEX5_FMT(x) ((x)<<10) #define VFT1_TEX4_FMT(x) ((x)<<8) #define VFT1_TEX3_FMT(x) ((x)<<6) #define VFT1_TEX2_FMT(x) ((x)<<4) #define VFT1_TEX1_FMT(x) ((x)<<2) #define VFT1_TEX0_FMT(x) (x) #define VFT1_TEX0_MASK 3 #define VFT1_TEX1_SHIFT 2 #define TEXCOORDFMT_2D 0 #define TEXCOORDFMT_3D 1 #define TEXCOORDFMT_4D 2 #define TEXCOORDFMT_1D 3 /*New stuff picked up along the way */ #define MLC_LOD_BIAS_MASK ((1<<7)-1) /* _3DSTATE_VERTEX_TRANSFORM, p207 */ #define _3DSTATE_VERTEX_TRANS_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|0) #define _3DSTATE_VERTEX_TRANS_MTX_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|6) /* Dword 1 */ #define ENABLE_VIEWPORT_TRANSFORM ((1<<31)|(1<<30)) #define DISABLE_VIEWPORT_TRANSFORM (1<<31) #define ENABLE_PERSP_DIVIDE ((1<<29)|(1<<28)) #define DISABLE_PERSP_DIVIDE (1<<29) #define VRTX_TRANS_LOAD_MATRICES 0x7421 #define VRTX_TRANS_NO_LOAD_MATRICES 0x0000 /* Dword 2 -> 7 are matrix elements */ /* _3DSTATE_W_STATE, p209 */ #define _3DSTATE_W_STATE_CMD (CMD_3D|(0x1d<<24)|(0x8d<<16)|1) /* Dword 1 */ #define MAGIC_W_STATE_DWORD1 0x00000008 /* Dword 2 */ #define WFAR_VALUE(x) (x) /* Stipple command, carried over from the i810, apparently: */ #define _3DSTATE_STIPPLE (CMD_3D|(0x1d<<24)|(0x83<<16)) #define ST1_ENABLE (1<<16) #define ST1_MASK (0xffff) #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D|(0x1d<<24)|(0x04<<16)) #define I1_LOAD_S(n) (1<<((n)+4)) #define S3_POINT_WIDTH_SHIFT 23 #define S3_LINE_WIDTH_SHIFT 19 #define S3_ALPHA_SHADE_MODE_SHIFT 18 #define S3_FOG_SHADE_MODE_SHIFT 17 #define S3_SPEC_SHADE_MODE_SHIFT 16 #define S3_COLOR_SHADE_MODE_SHIFT 15 #define S3_CULL_MODE_SHIFT 13 #define S3_CULLMODE_BOTH (0) #define S3_CULLMODE_NONE (1<<13) #define S3_CULLMODE_CW (2<<13) #define S3_CULLMODE_CCW (3<<13) #define S3_POINT_WIDTH_PRESENT (1<<12) #define S3_SPEC_FOG_PRESENT (1<<11) #define S3_DIFFUSE_PRESENT (1<<10) #define S3_DEPTH_OFFSET_PRESENT (1<<9) #define S3_POSITION_SHIFT 6 #define S3_VERTEXHAS_XYZ (1<<6) #define S3_VERTEXHAS_XYZW (2<<6) #define S3_VERTEXHAS_XY (3<<6) #define S3_VERTEXHAS_XYW (4<<6) #define S3_ENABLE_SPEC_ADD (1<<5) #define S3_ENABLE_FOG (1<<4) #define S3_ENABLE_LOCAL_DEPTH_BIAS (1<<3) #define S3_ENABLE_SPRITE_POINT (1<<1) #define S3_ENABLE_ANTIALIASING 1 #define S8_ENABLE_ALPHA_TEST (1<<31) #define S8_ALPHA_TEST_FUNC_SHIFT 28 #define S8_ALPHA_REFVALUE_SHIFT 20 #define S8_ENABLE_DEPTH_TEST (1<<19) #define S8_DEPTH_TEST_FUNC_SHIFT 16 #define S8_ENABLE_COLOR_BLEND (1<<15) #define S8_COLOR_BLEND_FUNC_SHIFT 12 #define S8_BLENDFUNC_ADD (0) #define S8_BLENDFUNC_SUB (1<<12) #define S8_BLENDFUNC_RVRSE_SUB (2<<12) #define S8_BLENDFUNC_MIN (3<<12) #define S8_BLENDFUNC_MAX (4<<12) #define S8_SRC_BLEND_FACTOR_SHIFT 8 #define S8_DST_BLEND_FACTOR_SHIFT 4 #define S8_ENABLE_DEPTH_BUFFER_WRITE (1<<3) #define S8_ENABLE_COLOR_BUFFER_WRITE (1<<2) #define _3DSTATE_LOAD_STATE_IMMEDIATE_2 (CMD_3D|(0x1d<<24)|(0x03<<16)) #define LOAD_TEXTURE_MAP(x) (1<<((x)+11)) #define LOAD_TEXTURE_BLEND_STAGE(x) (1<<((x)+7)) #define LOAD_GLOBAL_COLOR_FACTOR (1<<6) #define TM0S0_ADDRESS_MASK 0xfffffffc #define TM0S0_USE_FENCE (1<<1) #define TM0S1_HEIGHT_SHIFT 21 #define TM0S1_WIDTH_SHIFT 10 #define TM0S1_PALETTE_SELECT (1<<9) #define TM0S1_MAPSURF_FORMAT_MASK (0x7 << 6) #define TM0S1_MAPSURF_FORMAT_SHIFT 6 #define MAPSURF_8BIT_INDEXED (0<<6) #define MAPSURF_8BIT (1<<6) #define MAPSURF_16BIT (2<<6) #define MAPSURF_32BIT (3<<6) #define MAPSURF_411 (4<<6) #define MAPSURF_422 (5<<6) #define MAPSURF_COMPRESSED (6<<6) #define MAPSURF_4BIT_INDEXED (7<<6) #define TM0S1_MT_FORMAT_MASK (0x7 << 3) #define TM0S1_MT_FORMAT_SHIFT 3 #define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */ #define MT_8BIT_IDX_RGB565 (0<<3) /* SURFACE_8BIT_INDEXED */ #define MT_8BIT_IDX_ARGB1555 (1<<3) #define MT_8BIT_IDX_ARGB4444 (2<<3) #define MT_8BIT_IDX_AY88 (3<<3) #define MT_8BIT_IDX_ABGR8888 (4<<3) #define MT_8BIT_IDX_BUMP_88DVDU (5<<3) #define MT_8BIT_IDX_BUMP_655LDVDU (6<<3) #define MT_8BIT_IDX_ARGB8888 (7<<3) #define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */ #define MT_8BIT_L8 (1<<3) #define MT_8BIT_A8 (4<<3) #define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */ #define MT_16BIT_ARGB1555 (1<<3) #define MT_16BIT_ARGB4444 (2<<3) #define MT_16BIT_AY88 (3<<3) #define MT_16BIT_DIB_ARGB1555_8888 (4<<3) #define MT_16BIT_BUMP_88DVDU (5<<3) #define MT_16BIT_BUMP_655LDVDU (6<<3) #define MT_16BIT_DIB_RGB565_8888 (7<<3) #define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ #define MT_32BIT_ABGR8888 (1<<3) #define MT_32BIT_XRGB8888 (2<<3) #define MT_32BIT_XBGR8888 (3<<3) #define MT_32BIT_BUMP_XLDVDU_8888 (6<<3) #define MT_32BIT_DIB_8888 (7<<3) #define MT_411_YUV411 (0<<3) /* SURFACE_411 */ #define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */ #define MT_422_YCRCB_NORMAL (1<<3) #define MT_422_YCRCB_SWAPUV (2<<3) #define MT_422_YCRCB_SWAPUVY (3<<3) #define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */ #define MT_COMPRESS_DXT2_3 (1<<3) #define MT_COMPRESS_DXT4_5 (2<<3) #define MT_COMPRESS_FXT1 (3<<3) #define TM0S1_COLORSPACE_CONVERSION (1 << 2) #define TM0S1_TILED_SURFACE (1 << 1) #define TM0S1_TILE_WALK (1 << 0) #define TM0S2_PITCH_SHIFT 21 #define TM0S2_CUBE_FACE_ENA_SHIFT 15 #define TM0S2_CUBE_FACE_ENA_MASK (1<<15) #define TM0S2_MAP_FORMAT (1<<14) #define TM0S2_MAP_2D (0<<14) #define TM0S2_MAP_3D_CUBE (1<<14) #define TM0S2_VERTICAL_LINE_STRIDE (1<<13) #define TM0S2_VERITCAL_LINE_STRIDE_OFF (1<<12) #define TM0S2_OUTPUT_CHAN_SHIFT 10 #define TM0S2_OUTPUT_CHAN_MASK (3<<10) #define TM0S3_MIP_FILTER_MASK (0x3<<30) #define TM0S3_MIP_FILTER_SHIFT 30 #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #define TM0S3_MAG_FILTER_MASK (0x3<<28) #define TM0S3_MAG_FILTER_SHIFT 28 #define TM0S3_MIN_FILTER_MASK (0x3<<26) #define TM0S3_MIN_FILTER_SHIFT 26 #define FILTER_NEAREST 0 #define FILTER_LINEAR 1 #define FILTER_ANISOTROPIC 2 #define TM0S3_LOD_BIAS_SHIFT 17 #define TM0S3_LOD_BIAS_MASK (0x1ff<<17) #define TM0S3_MAX_MIP_SHIFT 9 #define TM0S3_MAX_MIP_MASK (0xff<<9) #define TM0S3_MIN_MIP_SHIFT 3 #define TM0S3_MIN_MIP_MASK (0x3f<<3) #define TM0S3_KILL_PIXEL (1<<2) #define TM0S3_KEYED_FILTER (1<<1) #define TM0S3_CHROMA_KEY (1<<0) /* _3DSTATE_MAP_TEXEL_STREAM, p188 */ #define _3DSTATE_MAP_TEX_STREAM_CMD (CMD_3D|(0x1c<<24)|(0x05<<19)) #define DISABLE_TEX_STREAM_BUMP (1<<12) #define ENABLE_TEX_STREAM_BUMP ((1<<12)|(1<<11)) #define TEX_MODIFY_UNIT_0 0 #define TEX_MODIFY_UNIT_1 (1<<8) #define ENABLE_TEX_STREAM_COORD_SET (1<<7) #define TEX_STREAM_COORD_SET(x) ((x)<<4) #define ENABLE_TEX_STREAM_MAP_IDX (1<<3) #define TEX_STREAM_MAP_IDX(x) (x) #define FLUSH_MAP_CACHE (1<<0) #define _3DSTATE_MAP_FILTER_CMD (CMD_3D|(0x1c<<24)|(0x02<<19)) #define FILTER_TEXMAP_INDEX(x) ((x) << 16) #define MAG_MODE_FILTER_ENABLE (1 << 5) #define MIN_MODE_FILTER_ENABLE (1 << 2) #define MAG_MAPFILTER_NEAREST (0 << 3) #define MAG_MAPFILTER_LINEAR (1 << 3) #define MAG_MAPFILTER_ANISOTROPIC (2 << 3) #define MIN_MAPFILTER_NEAREST (0) #define MIN_MAPFILTER_LINEAR (1) #define MIN_MAPFILTER_ANISOTROPIC (2) #define ENABLE_KEYS (1<<15) #define DISABLE_COLOR_KEY 0 #define DISABLE_CHROMA_KEY 0 #define DISABLE_KILL_PIXEL 0 #define ENABLE_MIP_MODE_FILTER (1 << 9) #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #endif xf86-video-intel-2.99.917/src/uxa/intel_driver.c0000664000175000017500000007621512441657352016171 00000000000000/************************************************************************** Copyright 2001 VA Linux Systems Inc., Fremont, California. Copyright © 2002 by David Dawes All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation on the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * Authors: Jeff Hartmann * Abraham van der Merwe * David Dawes * Alan Hourihane */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "xf86cmap.h" #include "xf86drm.h" #include "compiler.h" #include "mipointer.h" #include "micmap.h" #include #include "fb.h" #include "miscstruct.h" #include "dixstruct.h" #include "xf86xv.h" #include "shadow.h" #include "intel.h" #include "intel_video.h" #include "uxa_module.h" #ifdef INTEL_XVMC #define _INTEL_XVMC_SERVER_ #include "intel_xvmc.h" #endif #if USE_UXA #include "intel_uxa.h" #endif #include "intel_options.h" #include "i915_drm.h" static void i830AdjustFrame(ADJUST_FRAME_ARGS_DECL); static Bool I830CloseScreen(CLOSE_SCREEN_ARGS_DECL); static Bool I830EnterVT(VT_FUNC_ARGS_DECL); /* temporary */ extern void xf86SetCursor(ScreenPtr screen, CursorPtr pCurs, int x, int y); /* Export I830 options to i830 driver where necessary */ static void I830LoadPalette(ScrnInfoPtr scrn, int numColors, int *indices, LOCO * colors, VisualPtr pVisual) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); int i, j, index; int p; uint16_t lut_r[256], lut_g[256], lut_b[256]; for (p = 0; p < xf86_config->num_crtc; p++) { xf86CrtcPtr crtc = xf86_config->crtc[p]; switch (scrn->depth) { case 15: for (i = 0; i < numColors; i++) { index = indices[i]; for (j = 0; j < 8; j++) { lut_r[index * 8 + j] = colors[index].red << 8; lut_g[index * 8 + j] = colors[index].green << 8; lut_b[index * 8 + j] = colors[index].blue << 8; } } break; case 16: for (i = 0; i < numColors; i++) { index = indices[i]; if (index <= 31) { for (j = 0; j < 8; j++) { lut_r[index * 8 + j] = colors[index].red << 8; lut_b[index * 8 + j] = colors[index].blue << 8; } } for (j = 0; j < 4; j++) { lut_g[index * 4 + j] = colors[index].green << 8; } } break; default: for (i = 0; i < numColors; i++) { index = indices[i]; lut_r[index] = colors[index].red << 8; lut_g[index] = colors[index].green << 8; lut_b[index] = colors[index].blue << 8; } break; } /* Make the change through RandR */ #ifdef RANDR_12_INTERFACE RRCrtcGammaSet(crtc->randr_crtc, lut_r, lut_g, lut_b); #else crtc->funcs->gamma_set(crtc, lut_r, lut_g, lut_b, 256); #endif } } /** * Adjust the screen pixmap for the current location of the front buffer. * This is done at EnterVT when buffers are bound as long as the resources * have already been created, but the first EnterVT happens before * CreateScreenResources. */ static Bool i830CreateScreenResources(ScreenPtr screen) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); screen->CreateScreenResources = intel->CreateScreenResources; if (!(*screen->CreateScreenResources) (screen)) return FALSE; if (!intel_uxa_create_screen_resources(screen)) return FALSE; intel_copy_fb(scrn); return TRUE; } void intel_set_pixmap_bo(PixmapPtr pixmap, dri_bo *bo) { intel_uxa_set_pixmap_bo(pixmap, bo); } dri_bo * intel_get_pixmap_bo(PixmapPtr pixmap) { return intel_uxa_get_pixmap_bo(pixmap); } void intel_flush(intel_screen_private *intel) { intel_batch_submit(intel->scrn); } static void PreInitCleanup(ScrnInfoPtr scrn) { if (!scrn || !scrn->driverPrivate) return; free(scrn->driverPrivate); scrn->driverPrivate = NULL; } static void intel_check_chipset_option(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); intel_detect_chipset(scrn, intel->dev); } static Bool I830GetEarlyOptions(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); /* Process the options */ intel->Options = intel_options_get(scrn); if (!intel->Options) return FALSE; #if USE_UXA intel->fallback_debug = xf86ReturnOptValBool(intel->Options, OPTION_FALLBACKDEBUG, FALSE); intel->debug_flush = 0; if (xf86ReturnOptValBool(intel->Options, OPTION_DEBUG_FLUSH_BATCHES, FALSE)) intel->debug_flush |= DEBUG_FLUSH_BATCHES; if (xf86ReturnOptValBool(intel->Options, OPTION_DEBUG_FLUSH_CACHES, FALSE)) intel->debug_flush |= DEBUG_FLUSH_CACHES; if (xf86ReturnOptValBool(intel->Options, OPTION_DEBUG_WAIT, FALSE)) intel->debug_flush |= DEBUG_FLUSH_WAIT; #endif return TRUE; } static Bool intel_option_cast_string_to_bool(intel_screen_private *intel, int id, Bool val) { #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,7,99,901,0) xf86getBoolValue(&val, xf86GetOptValString(intel->Options, id)); return val; #else return val; #endif } static void intel_check_dri_option(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); intel->dri2 = intel->dri3 = DRI_NONE; if (!intel_option_cast_string_to_bool(intel, OPTION_DRI, TRUE)) intel->dri2 = intel->dri3 = DRI_DISABLED; if (scrn->depth != 16 && scrn->depth != 24 && scrn->depth != 30) { xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "DRI is disabled because it " "runs only at depths 16, 24, and 30.\n"); intel->dri2 = intel->dri3 = DRI_DISABLED; } } static Bool intel_open_drm_master(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); intel->dev = intel_get_device(scrn, &intel->drmSubFD); return intel->dev != NULL; } static int intel_init_bufmgr(intel_screen_private *intel) { int batch_size; batch_size = 4096 * 4; if (IS_I865G(intel)) /* The 865 has issues with larger-than-page-sized batch buffers. */ batch_size = 4096; intel->bufmgr = drm_intel_bufmgr_gem_init(intel->drmSubFD, batch_size); if (!intel->bufmgr) return FALSE; if (xf86ReturnOptValBool(intel->Options, OPTION_BUFFER_CACHE, TRUE)) drm_intel_bufmgr_gem_enable_reuse(intel->bufmgr); drm_intel_bufmgr_gem_set_vma_cache_size(intel->bufmgr, 512); drm_intel_bufmgr_gem_enable_fenced_relocs(intel->bufmgr); list_init(&intel->batch_pixmaps); if ((INTEL_INFO(intel)->gen == 060)) { intel->wa_scratch_bo = drm_intel_bo_alloc(intel->bufmgr, "wa scratch", 4096, 4096); } return TRUE; } static void intel_bufmgr_fini(intel_screen_private *intel) { if (intel->bufmgr == NULL) return; drm_intel_bo_unreference(intel->wa_scratch_bo); drm_intel_bufmgr_destroy(intel->bufmgr); } static void I830XvInit(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); MessageType from = X_PROBED; intel->XvPreferOverlay = xf86ReturnOptValBool(intel->Options, OPTION_PREFER_OVERLAY, FALSE); if (xf86GetOptValInteger(intel->Options, OPTION_VIDEO_KEY, &(intel->colorKey))) { from = X_CONFIG; } else if (xf86GetOptValInteger(intel->Options, OPTION_COLOR_KEY, &(intel->colorKey))) { from = X_CONFIG; } else { intel->colorKey = (1 << scrn->offset.red) | (1 << scrn->offset.green) | (((scrn->mask.blue >> scrn->offset.blue) - 1) << scrn->offset.blue); from = X_DEFAULT; } xf86DrvMsg(scrn->scrnIndex, from, "video overlay key set to 0x%x\n", intel->colorKey); } static Bool drm_has_boolean_param(struct intel_screen_private *intel, int param) { drm_i915_getparam_t gp; int value; gp.value = &value; gp.param = param; if (drmIoctl(intel->drmSubFD, DRM_IOCTL_I915_GETPARAM, &gp)) return FALSE; return value; } static Bool has_kernel_flush(struct intel_screen_private *intel) { /* The BLT ring was introduced at the same time as the * automatic flush for the busy-ioctl. */ return drm_has_boolean_param(intel, I915_PARAM_HAS_BLT); } static Bool has_relaxed_fencing(struct intel_screen_private *intel) { return drm_has_boolean_param(intel, I915_PARAM_HAS_RELAXED_FENCING); } static Bool has_prime_vmap_flush(struct intel_screen_private *intel) { return drm_has_boolean_param(intel, I915_PARAM_HAS_PRIME_VMAP_FLUSH); } static Bool can_accelerate_blt(struct intel_screen_private *intel) { if (INTEL_INFO(intel)->gen == -1) return FALSE; if (xf86ReturnOptValBool(intel->Options, OPTION_ACCEL_DISABLE, FALSE) || !intel_option_cast_string_to_bool(intel, OPTION_ACCEL_METHOD, TRUE)) { xf86DrvMsg(intel->scrn->scrnIndex, X_CONFIG, "Disabling hardware acceleration.\n"); return FALSE; } if (INTEL_INFO(intel)->gen == 060) { struct pci_device *const device = xf86GetPciInfoForEntity(intel->pEnt->index); /* Sandybridge rev07 locks up easily, even with the * BLT ring workaround in place. * Thus use shadowfb by default. */ if (device->revision < 8) { xf86DrvMsg(intel->scrn->scrnIndex, X_WARNING, "Disabling hardware acceleration on this pre-production hardware.\n"); return FALSE; } } if (INTEL_INFO(intel)->gen >= 060) { drm_i915_getparam_t gp; int value; /* On Sandybridge we need the BLT in order to do anything since * it so frequently used in the acceleration code paths. */ gp.value = &value; gp.param = I915_PARAM_HAS_BLT; if (drmIoctl(intel->drmSubFD, DRM_IOCTL_I915_GETPARAM, &gp)) return FALSE; } return TRUE; } static void intel_setup_capabilities(ScrnInfoPtr scrn) { #ifdef INTEL_PIXMAP_SHARING intel_screen_private *intel = intel_get_screen_private(scrn); uint64_t value; int ret; scrn->capabilities = 0; ret = drmGetCap(intel->drmSubFD, DRM_CAP_PRIME, &value); if (ret == 0) { if (value & DRM_PRIME_CAP_EXPORT) scrn->capabilities |= RR_Capability_SourceOutput | RR_Capability_SinkOffload; if (value & DRM_PRIME_CAP_IMPORT) scrn->capabilities |= RR_Capability_SinkOutput; } #endif } /** * This is called before ScreenInit to do any require probing of screen * configuration. * * This code generally covers probing, module loading, option handling * card mapping, and RandR setup. * * Since xf86InitialConfiguration ends up requiring that we set video modes * in order to detect configuration, we end up having to do a lot of driver * setup (talking to the DRM, mapping the device, etc.) in this function. * As a result, we want to set up that server initialization once rather * that doing it per generation. */ static Bool I830PreInit(ScrnInfoPtr scrn, int flags) { intel_screen_private *intel; rgb defaultWeight = { 0, 0, 0 }; EntityInfoPtr pEnt; int flags24; Gamma zeros = { 0.0, 0.0, 0.0 }; if (scrn->numEntities != 1) return FALSE; pEnt = xf86GetEntityInfo(scrn->entityList[0]); if (pEnt == NULL) return FALSE; if (pEnt->location.type != BUS_PCI #ifdef XSERVER_PLATFORM_BUS && pEnt->location.type != BUS_PLATFORM #endif ) return FALSE; if (flags & PROBE_DETECT) return TRUE; if (((uintptr_t)scrn->driverPrivate) & 3) { intel = xnfcalloc(sizeof(*intel), 1); if (intel == NULL) return FALSE; intel->info = (void *)((uintptr_t)scrn->driverPrivate & ~3); scrn->driverPrivate = intel; } intel = intel_get_screen_private(scrn); intel->scrn = scrn; intel->pEnt = pEnt; scrn->displayWidth = 640; /* default it */ if (!intel_open_drm_master(scrn)) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Failed to become DRM master.\n"); return FALSE; } scrn->monitor = scrn->confScreen->monitor; scrn->progClock = TRUE; scrn->rgbBits = 8; flags24 = Support32bppFb | PreferConvert24to32 | SupportConvert24to32; if (!xf86SetDepthBpp(scrn, 0, 0, 0, flags24)) return FALSE; switch (scrn->depth) { case 15: case 16: case 24: case 30: break; case 8: default: xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Given depth (%d) is not supported by intel driver\n", scrn->depth); return FALSE; } xf86PrintDepthBpp(scrn); if (!xf86SetWeight(scrn, defaultWeight, defaultWeight)) return FALSE; if (!xf86SetDefaultVisual(scrn, -1)) return FALSE; intel->cpp = scrn->bitsPerPixel / 8; if (!I830GetEarlyOptions(scrn)) return FALSE; intel_setup_capabilities(scrn); intel_check_chipset_option(scrn); intel_check_dri_option(scrn); if (!intel_init_bufmgr(intel)) { PreInitCleanup(scrn); return FALSE; } intel->force_fallback = drmCommandNone(intel->drmSubFD, DRM_I915_GEM_THROTTLE) != 0; /* Enable tiling by default */ intel->tiling = INTEL_TILING_ALL; /* Allow user override if they set a value */ if (!xf86ReturnOptValBool(intel->Options, OPTION_TILING_2D, TRUE)) intel->tiling &= ~INTEL_TILING_2D; if (xf86ReturnOptValBool(intel->Options, OPTION_TILING_FB, FALSE)) intel->tiling &= ~INTEL_TILING_FB; if (!can_accelerate_blt(intel)) { intel->force_fallback = TRUE; intel->tiling &= ~INTEL_TILING_FB; } intel->has_kernel_flush = has_kernel_flush(intel); intel->has_prime_vmap_flush = has_prime_vmap_flush(intel); intel->has_relaxed_fencing = INTEL_INFO(intel)->gen >= 033; /* And override the user if there is no kernel support */ if (intel->has_relaxed_fencing) intel->has_relaxed_fencing = has_relaxed_fencing(intel); xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "Relaxed fencing %s\n", intel->has_relaxed_fencing ? "enabled" : "disabled"); /* SwapBuffers delays to avoid tearing */ intel->swapbuffers_wait = xf86ReturnOptValBool(intel->Options, OPTION_SWAPBUFFERS_WAIT, TRUE); xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "Wait on SwapBuffers? %s\n", intel->swapbuffers_wait ? "enabled" : "disabled"); intel->use_triple_buffer = xf86ReturnOptValBool(intel->Options, OPTION_TRIPLE_BUFFER, TRUE); xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "Triple buffering? %s\n", intel->use_triple_buffer ? "enabled" : "disabled"); xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "Framebuffer %s\n", intel->tiling & INTEL_TILING_FB ? "tiled" : "linear"); xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "Pixmaps %s\n", intel->tiling & INTEL_TILING_2D ? "tiled" : "linear"); xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "3D buffers %s\n", intel->tiling & INTEL_TILING_3D ? "tiled" : "linear"); xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "SwapBuffers wait %sabled\n", intel->swapbuffers_wait ? "en" : "dis"); I830XvInit(scrn); if (!intel_mode_pre_init(scrn, intel->drmSubFD, intel->cpp)) { PreInitCleanup(scrn); return FALSE; } if (!xf86SetGamma(scrn, zeros)) { PreInitCleanup(scrn); return FALSE; } if (scrn->modes == NULL) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "No modes.\n"); PreInitCleanup(scrn); return FALSE; } scrn->currentMode = scrn->modes; /* Set display resolution */ xf86SetDpi(scrn, 0, 0); /* Load the required sub modules */ if (!xf86LoadSubModule(scrn, "fb")) { PreInitCleanup(scrn); return FALSE; } /* Load the dri modules if requested. */ #if HAVE_DRI2 if (intel->dri2 != DRI_DISABLED && !xf86LoadSubModule(scrn, "dri2")) intel->dri2 = DRI_DISABLED; #endif #if HAVE_DRI3 if (intel->dri3 != DRI_DISABLED && !xf86LoadSubModule(scrn, "dri3")) intel->dri3 = DRI_DISABLED; #endif return TRUE; } #ifdef INTEL_PIXMAP_SHARING static void redisplay_dirty(ScreenPtr screen, PixmapDirtyUpdatePtr dirty) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); RegionRec pixregion; int was_blocked; PixmapRegionInit(&pixregion, dirty->slave_dst->master_pixmap); RegionTranslate(&pixregion, dirty->x, dirty->y); RegionIntersect(&pixregion, &pixregion, DamageRegion(dirty->damage)); RegionTranslate(&pixregion, -dirty->x, -dirty->y); was_blocked = RegionNil(&pixregion); DamageRegionAppend(&dirty->slave_dst->drawable, &pixregion); RegionUninit(&pixregion); if (was_blocked) return; PixmapRegionInit(&pixregion, dirty->slave_dst->master_pixmap); PixmapSyncDirtyHelper(dirty, &pixregion); RegionUninit(&pixregion); intel_flush(intel); if (!intel->has_prime_vmap_flush) { drm_intel_bo *bo = intel_uxa_get_pixmap_bo(dirty->slave_dst->master_pixmap); was_blocked = xf86BlockSIGIO(); drm_intel_bo_map(bo, FALSE); drm_intel_bo_unmap(bo); xf86UnblockSIGIO(was_blocked); } DamageRegionProcessPending(&dirty->slave_dst->drawable); return; } static void intel_dirty_update(ScreenPtr screen) { RegionPtr region; PixmapDirtyUpdatePtr ent; if (xorg_list_is_empty(&screen->pixmap_dirty_list)) return; xorg_list_for_each_entry(ent, &screen->pixmap_dirty_list, ent) { region = DamageRegion(ent->damage); if (RegionNotEmpty(region)) { redisplay_dirty(screen, ent); DamageEmpty(ent->damage); } } } #endif static void I830BlockHandler(BLOCKHANDLER_ARGS_DECL) { SCREEN_PTR(arg); ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); screen->BlockHandler = intel->BlockHandler; (*screen->BlockHandler) (BLOCKHANDLER_ARGS); intel->BlockHandler = screen->BlockHandler; screen->BlockHandler = I830BlockHandler; intel_uxa_block_handler(intel); intel_video_block_handler(intel); #ifdef INTEL_PIXMAP_SHARING intel_dirty_update(screen); #endif } static Bool intel_init_initial_framebuffer(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); int width = scrn->virtualX; int height = scrn->virtualY; int pitch; uint32_t tiling; intel->front_buffer = intel_allocate_framebuffer(scrn, width, height, intel->cpp, &pitch, &tiling); if (!intel->front_buffer) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Couldn't allocate initial framebuffer.\n"); return FALSE; } intel->front_pitch = pitch; intel->front_tiling = tiling; scrn->displayWidth = pitch / intel->cpp; return TRUE; } static void intel_flush_callback(CallbackListPtr *list, pointer user_data, pointer call_data) { ScrnInfoPtr scrn = user_data; if (scrn->vtSema) intel_flush(intel_get_screen_private(scrn)); } #if HAVE_UDEV static void I830HandleUEvents(int fd, void *closure) { ScrnInfoPtr scrn = closure; intel_screen_private *intel = intel_get_screen_private(scrn); struct udev_device *dev; const char *hotplug; struct stat s; dev_t udev_devnum; dev = udev_monitor_receive_device(intel->uevent_monitor); if (!dev) return; udev_devnum = udev_device_get_devnum(dev); if (fstat(intel->drmSubFD, &s)) { udev_device_unref(dev); return; } /* * Check to make sure this event is directed at our * device (by comparing dev_t values), then make * sure it's a hotplug event (HOTPLUG=1) */ hotplug = udev_device_get_property_value(dev, "HOTPLUG"); if (memcmp(&s.st_rdev, &udev_devnum, sizeof (dev_t)) == 0 && hotplug && atoi(hotplug) == 1) { intel_mode_hotplug(intel); } udev_device_unref(dev); } static void I830UeventInit(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct udev *u; struct udev_monitor *mon; Bool hotplug; MessageType from = X_CONFIG; if (!xf86GetOptValBool(intel->Options, OPTION_HOTPLUG, &hotplug)) { from = X_DEFAULT; hotplug = TRUE; } xf86DrvMsg(scrn->scrnIndex, from, "hotplug detection: \"%s\"\n", hotplug ? "enabled" : "disabled"); if (!hotplug) return; u = udev_new(); if (!u) return; mon = udev_monitor_new_from_netlink(u, "udev"); if (!mon) { udev_unref(u); return; } if (udev_monitor_filter_add_match_subsystem_devtype(mon, "drm", "drm_minor") < 0 || udev_monitor_enable_receiving(mon) < 0) { udev_monitor_unref(mon); udev_unref(u); return; } intel->uevent_handler = xf86AddGeneralHandler(udev_monitor_get_fd(mon), I830HandleUEvents, scrn); if (!intel->uevent_handler) { udev_monitor_unref(mon); udev_unref(u); return; } intel->uevent_monitor = mon; } static void I830UeventFini(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); if (intel->uevent_handler) { struct udev *u = udev_monitor_get_udev(intel->uevent_monitor); xf86RemoveGeneralHandler(intel->uevent_handler); udev_monitor_unref(intel->uevent_monitor); udev_unref(u); intel->uevent_handler = NULL; intel->uevent_monitor = NULL; } } #endif /* HAVE_UDEV */ static Bool I830ScreenInit(SCREEN_INIT_ARGS_DECL) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); VisualPtr visual; #ifdef INTEL_XVMC MessageType from; #endif struct pci_device *const device = xf86GetPciInfoForEntity(intel->pEnt->index); int fb_bar = IS_GEN2(intel) ? 0 : 2; scrn->videoRam = device->regions[fb_bar].size / 1024; intel->last_3d = LAST_3D_OTHER; intel->overlayOn = FALSE; /* * Set this so that the overlay allocation is factored in when * appropriate. */ intel->XvEnabled = TRUE; if (!intel_init_initial_framebuffer(scrn)) return FALSE; miClearVisualTypes(); if (!miSetVisualTypes(scrn->depth, miGetDefaultVisualMask(scrn->depth), scrn->rgbBits, scrn->defaultVisual)) return FALSE; if (!miSetPixmapDepths()) return FALSE; /* Must be first, before anything else installs screen callbacks. */ if (!fbScreenInit(screen, NULL, scrn->virtualX, scrn->virtualY, scrn->xDpi, scrn->yDpi, scrn->displayWidth, scrn->bitsPerPixel)) return FALSE; if (scrn->bitsPerPixel > 8) { /* Fixup RGB ordering */ visual = screen->visuals + screen->numVisuals; while (--visual >= screen->visuals) { if ((visual->class | DynamicClass) == DirectColor) { visual->offsetRed = scrn->offset.red; visual->offsetGreen = scrn->offset.green; visual->offsetBlue = scrn->offset.blue; visual->redMask = scrn->mask.red; visual->greenMask = scrn->mask.green; visual->blueMask = scrn->mask.blue; } } } fbPictureInit(screen, NULL, 0); xf86SetBlackWhitePixels(screen); if (!intel_uxa_init(screen)) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Hardware acceleration initialization failed\n"); return FALSE; } #if HAVE_DRI2 if (intel->dri2 == DRI_NONE && I830DRI2ScreenInit(screen)) intel->dri2 = DRI_ACTIVE; #endif #if HAVE_DRI3 if (!intel_sync_init(screen)) intel->dri3 = DRI_DISABLED; if (intel->dri3 == DRI_NONE && intel_dri3_screen_init(screen)) intel->dri3 = DRI_ACTIVE; #endif if (xf86ReturnOptValBool(intel->Options, OPTION_PRESENT, TRUE)) intel_present_screen_init(screen); xf86SetBackingStore(screen); xf86SetSilkenMouse(screen); miDCInitialize(screen, xf86GetPointerScreenFuncs()); xf86DrvMsg(scrn->scrnIndex, X_INFO, "Initializing HW Cursor\n"); if (!xf86_cursors_init(screen, 64, 64, (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP | HARDWARE_CURSOR_BIT_ORDER_MSBFIRST | HARDWARE_CURSOR_INVERT_MASK | HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK | HARDWARE_CURSOR_AND_SOURCE_WITH_MASK | HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64 | HARDWARE_CURSOR_UPDATE_UNHIDDEN | HARDWARE_CURSOR_ARGB))) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Hardware cursor initialization failed\n"); } intel->BlockHandler = screen->BlockHandler; screen->BlockHandler = I830BlockHandler; #ifdef INTEL_PIXMAP_SHARING screen->StartPixmapTracking = PixmapStartDirtyTracking; screen->StopPixmapTracking = PixmapStopDirtyTracking; #endif if (!AddCallback(&FlushCallback, intel_flush_callback, scrn)) return FALSE; screen->SaveScreen = xf86SaveScreen; intel->CloseScreen = screen->CloseScreen; screen->CloseScreen = I830CloseScreen; intel->CreateScreenResources = screen->CreateScreenResources; screen->CreateScreenResources = i830CreateScreenResources; if (!xf86CrtcScreenInit(screen)) return FALSE; if (!miCreateDefColormap(screen)) return FALSE; if (!xf86HandleColormaps(screen, 256, 8, I830LoadPalette, NULL, CMAP_RELOAD_ON_MODE_SWITCH | CMAP_PALETTED_TRUECOLOR)) { return FALSE; } xf86DPMSInit(screen, xf86DPMSSet, 0); #ifdef INTEL_XVMC if (INTEL_INFO(intel)->gen >= 040) intel->XvMCEnabled = TRUE; from = (intel->dri2 == DRI_ACTIVE && xf86GetOptValBool(intel->Options, OPTION_XVMC, &intel->XvMCEnabled) ? X_CONFIG : X_DEFAULT); xf86DrvMsg(scrn->scrnIndex, from, "Intel XvMC decoder %sabled\n", intel->XvMCEnabled ? "en" : "dis"); #endif /* Init video */ if (intel->XvEnabled) intel_video_init(screen); #if HAVE_DRI2 switch (intel->dri2) { case DRI_ACTIVE: xf86DrvMsg(scrn->scrnIndex, X_INFO, "DRI2: Enabled\n"); break; case DRI_DISABLED: xf86DrvMsg(scrn->scrnIndex, X_INFO, "DRI2: Disabled\n"); break; case DRI_NONE: xf86DrvMsg(scrn->scrnIndex, X_INFO, "DRI2: Failed\n"); break; } #else xf86DrvMsg(scrn->scrnIndex, X_INFO, "DRI2: Not available\n"); #endif #if HAVE_DRI3 switch (intel->dri3) { case DRI_ACTIVE: xf86DrvMsg(scrn->scrnIndex, X_INFO, "DRI3: Enabled\n"); break; case DRI_DISABLED: xf86DrvMsg(scrn->scrnIndex, X_INFO, "DRI3: Disabled\n"); break; case DRI_NONE: xf86DrvMsg(scrn->scrnIndex, X_INFO, "DRI3: Failed\n"); break; } #else xf86DrvMsg(scrn->scrnIndex, X_INFO, "DRI3: Not available\n"); #endif if (serverGeneration == 1) xf86ShowUnusedOptions(scrn->scrnIndex, scrn->options); intel_mode_init(intel); intel->suspended = FALSE; #if HAVE_UDEV I830UeventInit(scrn); #endif /* Must force it before EnterVT, so we are in control of VT and * later memory should be bound when allocating, e.g rotate_mem */ scrn->vtSema = TRUE; return I830EnterVT(VT_FUNC_ARGS(0)); } static void i830AdjustFrame(ADJUST_FRAME_ARGS_DECL) { } static void I830FreeScreen(FREE_SCREEN_ARGS_DECL) { SCRN_INFO_PTR(arg); intel_screen_private *intel = intel_get_screen_private(scrn); if (intel && !((uintptr_t)intel & 3)) { intel_mode_fini(intel); intel_bufmgr_fini(intel); intel_put_device(intel->dev); free(intel); scrn->driverPrivate = NULL; } } static void I830LeaveVT(VT_FUNC_ARGS_DECL) { SCRN_INFO_PTR(arg); intel_screen_private *intel = intel_get_screen_private(scrn); xf86RotateFreeShadow(scrn); xf86_hide_cursors(scrn); if (intel_put_master(intel->dev)) xf86DrvMsg(scrn->scrnIndex, X_WARNING, "drmDropMaster failed: %s\n", strerror(errno)); } /* * This gets called when gaining control of the VT, and from ScreenInit(). */ static Bool I830EnterVT(VT_FUNC_ARGS_DECL) { SCRN_INFO_PTR(arg); intel_screen_private *intel = intel_get_screen_private(scrn); if (intel_get_master(intel->dev)) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "drmSetMaster failed: %s\n", strerror(errno)); return FALSE; } if (!xf86SetDesiredModes(scrn)) return FALSE; intel_mode_disable_unused_functions(scrn); return TRUE; } static Bool I830SwitchMode(SWITCH_MODE_ARGS_DECL) { SCRN_INFO_PTR(arg); return xf86SetSingleMode(scrn, mode, RR_Rotate_0); } static Bool I830CloseScreen(CLOSE_SCREEN_ARGS_DECL) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); #if HAVE_UDEV I830UeventFini(scrn); #endif intel_mode_close(intel); DeleteCallback(&FlushCallback, intel_flush_callback, scrn); TimerFree(intel->cache_expire); intel->cache_expire = NULL; if (intel->uxa_driver) { uxa_driver_fini(screen); free(intel->uxa_driver); intel->uxa_driver = NULL; } if (intel->back_buffer) { drm_intel_bo_unreference(intel->back_buffer); intel->back_buffer = NULL; } if (intel->front_buffer) { intel_mode_remove_fb(intel); drm_intel_bo_unreference(intel->front_buffer); intel->front_buffer = NULL; } if (scrn->vtSema == TRUE) { I830LeaveVT(VT_FUNC_ARGS(0)); } intel_batch_teardown(scrn); if (INTEL_INFO(intel)->gen >= 040 && INTEL_INFO(intel)->gen < 0100) gen4_render_state_cleanup(scrn); xf86_cursors_fini(screen); i965_free_video(scrn); screen->CloseScreen = intel->CloseScreen; (*screen->CloseScreen) (CLOSE_SCREEN_ARGS); if (intel->dri2 == DRI_ACTIVE) { I830DRI2CloseScreen(screen); intel->dri2 = DRI_NONE; } if (intel->dri3 == DRI_ACTIVE) { /* nothing to do here? */ intel->dri3 = DRI_NONE; } intel_sync_close(screen); xf86GARTCloseScreen(scrn->scrnIndex); scrn->vtSema = FALSE; return TRUE; } static ModeStatus I830ValidMode(SCRN_ARG_TYPE arg, DisplayModePtr mode, Bool verbose, int flags) { SCRN_INFO_PTR(arg); if (mode->Flags & V_INTERLACE) { if (verbose) { xf86DrvMsg(scrn->scrnIndex, X_PROBED, "Removing interlaced mode \"%s\"\n", mode->name); } return MODE_BAD; } return MODE_OK; } #ifndef SUSPEND_SLEEP #define SUSPEND_SLEEP 0 #endif #ifndef RESUME_SLEEP #define RESUME_SLEEP 0 #endif /* * This function is only required if we need to do anything differently from * DoApmEvent() in common/xf86PM.c, including if we want to see events other * than suspend/resume. */ static Bool I830PMEvent(SCRN_ARG_TYPE arg, pmEvent event, Bool undo) { SCRN_INFO_PTR(arg); intel_screen_private *intel = intel_get_screen_private(scrn); switch (event) { case XF86_APM_SYS_SUSPEND: case XF86_APM_CRITICAL_SUSPEND: /*do we want to delay a critical suspend? */ case XF86_APM_USER_SUSPEND: case XF86_APM_SYS_STANDBY: case XF86_APM_USER_STANDBY: if (!undo && !intel->suspended) { scrn->LeaveVT(VT_FUNC_ARGS(0)); intel->suspended = TRUE; sleep(SUSPEND_SLEEP); } else if (undo && intel->suspended) { sleep(RESUME_SLEEP); scrn->EnterVT(VT_FUNC_ARGS(0)); intel->suspended = FALSE; } break; case XF86_APM_STANDBY_RESUME: case XF86_APM_NORMAL_RESUME: case XF86_APM_CRITICAL_RESUME: if (intel->suspended) { sleep(RESUME_SLEEP); scrn->EnterVT(VT_FUNC_ARGS(0)); intel->suspended = FALSE; /* * Turn the screen saver off when resuming. This seems to be * needed to stop xscreensaver kicking in (when used). * * XXX DoApmEvent() should probably call this just like * xf86VTSwitch() does. Maybe do it here only in 4.2 * compatibility mode. */ SaveScreens(SCREEN_SAVER_FORCER, ScreenSaverReset); } break; /* This is currently used for ACPI */ case XF86_APM_CAPABILITY_CHANGED: ErrorF("I830PMEvent: Capability change\n"); SaveScreens(SCREEN_SAVER_FORCER, ScreenSaverReset); break; default: ErrorF("I830PMEvent: received APM event %d\n", event); } return TRUE; } Bool intel_init_scrn(ScrnInfoPtr scrn) { scrn->PreInit = I830PreInit; scrn->ScreenInit = I830ScreenInit; scrn->SwitchMode = I830SwitchMode; scrn->AdjustFrame = i830AdjustFrame; scrn->EnterVT = I830EnterVT; scrn->LeaveVT = I830LeaveVT; scrn->FreeScreen = I830FreeScreen; scrn->ValidMode = I830ValidMode; scrn->PMEvent = I830PMEvent; return TRUE; } xf86-video-intel-2.99.917/src/uxa/intel_video_overlay.h0000664000175000017500000000354712432737457017555 00000000000000/*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * i830_video.c: i830/i845 Xv driver. * * Copyright © 2002 by Alan Hourihane and David Dawes * * Authors: * Alan Hourihane * David Dawes * * Derived from i810 Xv driver: * * Authors of i810 code: * Jonathan Bian * Offscreen Images: * Matt Sottek */ #ifndef _INTEL_VIDEO_OVERLAY_H_ #define _INTEL_VIDEO_OVERLAY_H_ XF86VideoAdaptorPtr intel_video_overlay_setup_image(ScreenPtr); void intel_video_overlay_off(intel_screen_private *intel); #endif /* _INTEL_VIDEO_OVERLAY_H_ */ xf86-video-intel-2.99.917/src/uxa/i965_reg.h0000664000175000017500000005305312400044327015017 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ /* * New regs for broadwater -- we need to split this file up sensibly somehow. */ #define BRW_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define BRW_URB_FENCE BRW_3D(0, 0, 0) #define BRW_CS_URB_STATE BRW_3D(0, 0, 1) #define BRW_CONSTANT_BUFFER BRW_3D(0, 0, 2) #define BRW_STATE_PREFETCH BRW_3D(0, 0, 3) #define BRW_STATE_BASE_ADDRESS BRW_3D(0, 1, 1) #define BRW_STATE_SIP BRW_3D(0, 1, 2) #define BRW_PIPELINE_SELECT BRW_3D(0, 1, 4) #define NEW_PIPELINE_SELECT BRW_3D(1, 1, 4) #define BRW_MEDIA_STATE_POINTERS BRW_3D(2, 0, 0) #define BRW_MEDIA_OBJECT BRW_3D(2, 1, 0) #define BRW_3DSTATE_PIPELINED_POINTERS BRW_3D(3, 0, 0) #define BRW_3DSTATE_BINDING_TABLE_POINTERS BRW_3D(3, 0, 1) # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN6 */ #define BRW_3DSTATE_VERTEX_BUFFERS BRW_3D(3, 0, 8) #define BRW_3DSTATE_VERTEX_ELEMENTS BRW_3D(3, 0, 9) #define BRW_3DSTATE_INDEX_BUFFER BRW_3D(3, 0, 0xa) #define BRW_3DSTATE_VF_STATISTICS BRW_3D(3, 0, 0xb) #define BRW_3DSTATE_DRAWING_RECTANGLE BRW_3D(3, 1, 0) #define BRW_3DSTATE_CONSTANT_COLOR BRW_3D(3, 1, 1) #define BRW_3DSTATE_SAMPLER_PALETTE_LOAD BRW_3D(3, 1, 2) #define BRW_3DSTATE_CHROMA_KEY BRW_3D(3, 1, 4) #define BRW_3DSTATE_DEPTH_BUFFER BRW_3D(3, 1, 5) # define BRW_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 # define BRW_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 #define BRW_3DSTATE_POLY_STIPPLE_OFFSET BRW_3D(3, 1, 6) #define BRW_3DSTATE_POLY_STIPPLE_PATTERN BRW_3D(3, 1, 7) #define BRW_3DSTATE_LINE_STIPPLE BRW_3D(3, 1, 8) #define BRW_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP BRW_3D(3, 1, 9) /* These two are BLC and CTG only, not BW or CL */ #define BRW_3DSTATE_AA_LINE_PARAMS BRW_3D(3, 1, 0xa) #define BRW_3DSTATE_GS_SVB_INDEX BRW_3D(3, 1, 0xb) #define BRW_PIPE_CONTROL BRW_3D(3, 2, 0) #define BRW_3DPRIMITIVE BRW_3D(3, 3, 0) #define BRW_3DSTATE_CLEAR_PARAMS BRW_3D(3, 1, 0x10) /* DW1 */ # define BRW_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) /* for GEN6+ */ #define GEN6_3DSTATE_SAMPLER_STATE_POINTERS BRW_3D(3, 0, 0x02) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) #define GEN6_3DSTATE_URB BRW_3D(3, 0, 0x05) /* DW1 */ # define GEN6_3DSTATE_URB_VS_SIZE_SHIFT 16 # define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT 0 /* DW2 */ # define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT 8 # define GEN6_3DSTATE_URB_GS_SIZE_SHIFT 0 #define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS BRW_3D(3, 0, 0x0d) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) #define GEN6_3DSTATE_CC_STATE_POINTERS BRW_3D(3, 0, 0x0e) #define GEN6_3DSTATE_VS BRW_3D(3, 0, 0x10) #define GEN6_3DSTATE_GS BRW_3D(3, 0, 0x11) /* DW4 */ # define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 #define GEN6_3DSTATE_CLIP BRW_3D(3, 0, 0x12) #define GEN6_3DSTATE_SF BRW_3D(3, 0, 0x13) /* DW1 */ # define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW2 */ /* DW3 */ # define GEN6_3DSTATE_SF_CULL_BOTH (0 << 29) # define GEN6_3DSTATE_SF_CULL_NONE (1 << 29) # define GEN6_3DSTATE_SF_CULL_FRONT (2 << 29) # define GEN6_3DSTATE_SF_CULL_BACK (3 << 29) /* DW4 */ # define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 # define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 # define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 #define GEN6_3DSTATE_WM BRW_3D(3, 0, 0x14) /* DW2 */ # define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF 27 # define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 /* DW4 */ # define GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT 16 /* DW5 */ # define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT 25 # define GEN6_3DSTATE_WM_DISPATCH_ENABLE (1 << 19) # define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1) # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) /* DW6 */ # define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20 # define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) # define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) # define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) # define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) #define GEN6_3DSTATE_CONSTANT_VS BRW_3D(3, 0, 0x15) #define GEN6_3DSTATE_CONSTANT_GS BRW_3D(3, 0, 0x16) #define GEN6_3DSTATE_CONSTANT_PS BRW_3D(3, 0, 0x17) #define GEN6_3DSTATE_SAMPLE_MASK BRW_3D(3, 0, 0x18) #define GEN6_3DSTATE_MULTISAMPLE BRW_3D(3, 1, 0x0d) /* DW1 */ # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) /* on GEN7+ */ /* _3DSTATE_VERTEX_BUFFERS on GEN7*/ /* DW1 */ #define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14) /* _3DPRIMITIVE on GEN7 */ /* DW1 */ # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8) # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8) /* 3DSTATE_WM on GEN7 */ /* DW1 */ # define GEN7_WM_STATISTICS_ENABLE (1 << 31) # define GEN7_WM_DEPTH_CLEAR (1 << 30) # define GEN7_WM_DISPATCH_ENABLE (1 << 29) # define GEN6_WM_DEPTH_RESOLVE (1 << 28) # define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) # define GEN7_WM_KILL_ENABLE (1 << 25) # define GEN7_WM_PSCDEPTH_OFF (0 << 23) # define GEN7_WM_PSCDEPTH_ON (1 << 23) # define GEN7_WM_PSCDEPTH_ON_GE (2 << 23) # define GEN7_WM_PSCDEPTH_ON_LE (3 << 23) # define GEN7_WM_USES_SOURCE_DEPTH (1 << 20) # define GEN7_WM_USES_SOURCE_W (1 << 19) # define GEN7_WM_POSITION_ZW_PIXEL (0 << 17) # define GEN7_WM_POSITION_ZW_CENTROID (2 << 17) # define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17) # define GEN7_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 16) # define GEN7_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 15) # define GEN7_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 14) # define GEN7_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 13) # define GEN7_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 12) # define GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11) # define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8) # define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6) # define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6) # define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6) # define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6) # define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4) # define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3) # define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2) # define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0) # define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0) # define GEN7_WM_MSRAST_ON_PIXEL (2 << 0) # define GEN7_WM_MSRAST_ON_PATTERN (3 << 0) /* DW2 */ # define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31) #define GEN7_3DSTATE_CLEAR_PARAMS BRW_3D(3, 0, 0x04) #define GEN7_3DSTATE_DEPTH_BUFFER BRW_3D(3, 0, 0x05) #define GEN7_3DSTATE_CONSTANT_HS BRW_3D(3, 0, 0x19) #define GEN7_3DSTATE_CONSTANT_DS BRW_3D(3, 0, 0x1a) #define GEN7_3DSTATE_HS BRW_3D(3, 0, 0x1b) #define GEN7_3DSTATE_TE BRW_3D(3, 0, 0x1c) #define GEN7_3DSTATE_DS BRW_3D(3, 0, 0x1d) #define GEN7_3DSTATE_STREAMOUT BRW_3D(3, 0, 0x1e) #define GEN7_3DSTATE_SBE BRW_3D(3, 0, 0x1f) /* DW1 */ # define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28) # define GEN7_SBE_NUM_OUTPUTS_SHIFT 22 # define GEN7_SBE_SWIZZLE_ENABLE (1 << 21) # define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20) # define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4 #define GEN7_3DSTATE_PS BRW_3D(3, 0, 0x20) /* DW1: kernel pointer */ /* DW2 */ # define GEN7_PS_SPF_MODE (1 << 31) # define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30) # define GEN7_PS_SAMPLER_COUNT_SHIFT 27 # define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 # define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) # define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) /* DW3: scratch space */ /* DW4 */ # define GEN7_PS_MAX_THREADS_SHIFT_IVB 24 # define GEN7_PS_MAX_THREADS_SHIFT_HSW 23 # define GEN7_PS_SAMPLE_MASK_SHIFT_HSW 12 # define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) # define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) # define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) # define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7) # define GEN7_PS_POSOFFSET_NONE (0 << 3) # define GEN7_PS_POSOFFSET_CENTROID (2 << 3) # define GEN7_PS_POSOFFSET_SAMPLE (3 << 3) # define GEN7_PS_32_DISPATCH_ENABLE (1 << 2) # define GEN7_PS_16_DISPATCH_ENABLE (1 << 1) # define GEN7_PS_8_DISPATCH_ENABLE (1 << 0) /* DW5 */ # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0 /* DW6: kernel 1 pointer */ /* DW7: kernel 2 pointer */ #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL BRW_3D(3, 0, 0x21) #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC BRW_3D(3, 0, 0x23) #define GEN7_3DSTATE_BLEND_STATE_POINTERS BRW_3D(3, 0, 0x24) #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS BRW_3D(3, 0, 0x25) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS BRW_3D(3, 0, 0x26) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS BRW_3D(3, 0, 0x27) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS BRW_3D(3, 0, 0x28) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS BRW_3D(3, 0, 0x29) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS BRW_3D(3, 0, 0x2a) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS BRW_3D(3, 0, 0x2b) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS BRW_3D(3, 0, 0x2e) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS BRW_3D(3, 0, 0x2f) #define GEN7_3DSTATE_URB_VS BRW_3D(3, 0, 0x30) #define GEN7_3DSTATE_URB_HS BRW_3D(3, 0, 0x31) #define GEN7_3DSTATE_URB_DS BRW_3D(3, 0, 0x32) #define GEN7_3DSTATE_URB_GS BRW_3D(3, 0, 0x33) /* DW1 */ # define GEN7_URB_ENTRY_NUMBER_SHIFT 0 # define GEN7_URB_ENTRY_SIZE_SHIFT 16 # define GEN7_URB_STARTING_ADDRESS_SHIFT 25 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS BRW_3D(3, 1, 0x12) #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS BRW_3D(3, 1, 0x16) /* DW1 */ # define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 #define PIPELINE_SELECT_3D 0 #define PIPELINE_SELECT_MEDIA 1 #define UF0_CS_REALLOC (1 << 13) #define UF0_VFE_REALLOC (1 << 12) #define UF0_SF_REALLOC (1 << 11) #define UF0_CLIP_REALLOC (1 << 10) #define UF0_GS_REALLOC (1 << 9) #define UF0_VS_REALLOC (1 << 8) #define UF1_CLIP_FENCE_SHIFT 20 #define UF1_GS_FENCE_SHIFT 10 #define UF1_VS_FENCE_SHIFT 0 #define UF2_CS_FENCE_SHIFT 20 #define UF2_VFE_FENCE_SHIFT 10 #define UF2_SF_FENCE_SHIFT 0 /* for BRW_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) /* for BRW_3DSTATE_PIPELINED_POINTERS */ #define BRW_GS_DISABLE 0 #define BRW_GS_ENABLE 1 #define BRW_CLIP_DISABLE 0 #define BRW_CLIP_ENABLE 1 /* for BRW_PIPE_CONTROL */ #define BRW_PIPE_CONTROL_CS_STALL (1 << 20) #define BRW_PIPE_CONTROL_NOWRITE (0 << 14) #define BRW_PIPE_CONTROL_WRITE_QWORD (1 << 14) #define BRW_PIPE_CONTROL_WRITE_DEPTH (2 << 14) #define BRW_PIPE_CONTROL_WRITE_TIME (3 << 14) #define BRW_PIPE_CONTROL_DEPTH_STALL (1 << 13) #define BRW_PIPE_CONTROL_WC_FLUSH (1 << 12) #define BRW_PIPE_CONTROL_IS_FLUSH (1 << 11) #define BRW_PIPE_CONTROL_TC_FLUSH (1 << 10) #define BRW_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) #define BRW_PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define BRW_PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define BRW_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) #define BRW_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) /* VERTEX_BUFFER_STATE Structure */ #define VB0_BUFFER_INDEX_SHIFT 27 #define GEN6_VB0_BUFFER_INDEX_SHIFT 26 #define VB0_VERTEXDATA (0 << 26) #define VB0_INSTANCEDATA (1 << 26) #define GEN6_VB0_VERTEXDATA (0 << 20) #define GEN6_VB0_INSTANCEDATA (1 << 20) #define VB0_BUFFER_PITCH_SHIFT 0 /* VERTEX_ELEMENT_STATE Structure */ #define VE0_VERTEX_BUFFER_INDEX_SHIFT 27 #define GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT 26 /* for GEN6 */ #define VE0_VALID (1 << 26) #define GEN6_VE0_VALID (1 << 25) /* for GEN6 */ #define VE0_FORMAT_SHIFT 16 #define VE0_OFFSET_SHIFT 0 #define VE1_VFCOMPONENT_0_SHIFT 28 #define VE1_VFCOMPONENT_1_SHIFT 24 #define VE1_VFCOMPONENT_2_SHIFT 20 #define VE1_VFCOMPONENT_3_SHIFT 16 #define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 /* 3DPRIMITIVE bits */ #define BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) #define BRW_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) /* Primitive types are in brw_defines.h */ #define BRW_3DPRIMITIVE_TOPOLOGY_SHIFT 10 #define BRW_SVG_CTL 0x7400 #define BRW_SVG_CTL_GS_BA (0 << 8) #define BRW_SVG_CTL_SS_BA (1 << 8) #define BRW_SVG_CTL_IO_BA (2 << 8) #define BRW_SVG_CTL_GS_AUB (3 << 8) #define BRW_SVG_CTL_IO_AUB (4 << 8) #define BRW_SVG_CTL_SIP (5 << 8) #define BRW_SVG_RDATA 0x7404 #define BRW_SVG_WORK_CTL 0x7408 #define BRW_VF_CTL 0x7500 #define BRW_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) #define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) #define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) #define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) #define BRW_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) #define BRW_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) #define BRW_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) #define BRW_VF_CTL_SNAPSHOT_ENABLE (1 << 0) #define BRW_VF_STRG_VAL 0x7504 #define BRW_VF_STR_VL_OVR 0x7508 #define BRW_VF_VC_OVR 0x750c #define BRW_VF_STR_PSKIP 0x7510 #define BRW_VF_MAX_PRIM 0x7514 #define BRW_VF_RDATA 0x7518 #define BRW_VS_CTL 0x7600 #define BRW_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) #define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) #define BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) #define BRW_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) #define BRW_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define BRW_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define BRW_VS_CTL_SNAPSHOT_ENABLE (1 << 0) #define BRW_VS_STRG_VAL 0x7604 #define BRW_VS_RDATA 0x7608 #define BRW_SF_CTL 0x7b00 #define BRW_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) #define BRW_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) #define BRW_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) #define BRW_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define BRW_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define BRW_SF_CTL_SNAPSHOT_ENABLE (1 << 0) #define BRW_SF_STRG_VAL 0x7b04 #define BRW_SF_RDATA 0x7b18 #define BRW_WIZ_CTL 0x7c00 #define BRW_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) #define BRW_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 #define BRW_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) #define BRW_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) #define BRW_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) #define BRW_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) #define BRW_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) #define BRW_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) #define BRW_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) #define BRW_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define BRW_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define BRW_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) #define BRW_WIZ_STRG_VAL 0x7c04 #define BRW_WIZ_RDATA 0x7c18 #define BRW_TS_CTL 0x7e00 #define BRW_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define BRW_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) #define BRW_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) #define BRW_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) #define BRW_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) #define BRW_TS_CTL_SNAPSHOT_ENABLE (1 << 0) #define BRW_TS_STRG_VAL 0x7e04 #define BRW_TS_RDATA 0x7e08 #define BRW_TD_CTL 0x8000 #define BRW_TD_CTL_MUX_SHIFT 8 #define BRW_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define BRW_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) #define BRW_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) #define BRW_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) #define BRW_TD_CTL_BREAKPOINT_ENABLE (1 << 2) #define BRW_TD_CTL2 0x8004 #define BRW_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) #define BRW_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) #define BRW_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) #define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 #define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) #define BRW_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) #define BRW_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) #define BRW_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) #define BRW_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) #define BRW_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) #define BRW_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) #define BRW_TD_VF_VS_EMSK 0x8008 #define BRW_TD_GS_EMSK 0x800c #define BRW_TD_CLIP_EMSK 0x8010 #define BRW_TD_SF_EMSK 0x8014 #define BRW_TD_WIZ_EMSK 0x8018 #define BRW_TD_0_6_EHTRG_VAL 0x801c #define BRW_TD_0_7_EHTRG_VAL 0x8020 #define BRW_TD_0_6_EHTRG_MSK 0x8024 #define BRW_TD_0_7_EHTRG_MSK 0x8028 #define BRW_TD_RDATA 0x802c #define BRW_TD_TS_EMSK 0x8030 #define BRW_EU_CTL 0x8800 #define BRW_EU_CTL_SELECT_SHIFT 16 #define BRW_EU_CTL_DATA_MUX_SHIFT 8 #define BRW_EU_ATT_0 0x8810 #define BRW_EU_ATT_1 0x8814 #define BRW_EU_ATT_DATA_0 0x8820 #define BRW_EU_ATT_DATA_1 0x8824 #define BRW_EU_ATT_CLR_0 0x8830 #define BRW_EU_ATT_CLR_1 0x8834 #define BRW_EU_RDATA 0x8840 /* End regs for broadwater */ xf86-video-intel-2.99.917/src/uxa/i965_video.c0000664000175000017500000017126312432737457015371 00000000000000/* * Copyright 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * * Authors: * Eric Anholt * Keith Packard * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "xorg-server.h" #include "xf86.h" #include "xf86_OSproc.h" #include "xf86xv.h" #include "fourcc.h" #include "intel.h" #include "intel_xvmc.h" #include "intel_uxa.h" #include "i830_reg.h" #include "i965_reg.h" #include "brw_defines.h" #include "brw_structs.h" #include /* Make assert() work. */ #undef NDEBUG #include static const uint32_t sip_kernel_static[][4] = { /* wait (1) a0<1>UW a145<0,1,0>UW { align1 + } */ {0x00000030, 0x20000108, 0x00001220, 0x00000000}, /* nop (4) g0<1>UD { align1 + } */ {0x0040007e, 0x20000c21, 0x00690000, 0x00000000}, /* nop (4) g0<1>UD { align1 + } */ {0x0040007e, 0x20000c21, 0x00690000, 0x00000000}, /* nop (4) g0<1>UD { align1 + } */ {0x0040007e, 0x20000c21, 0x00690000, 0x00000000}, /* nop (4) g0<1>UD { align1 + } */ {0x0040007e, 0x20000c21, 0x00690000, 0x00000000}, /* nop (4) g0<1>UD { align1 + } */ {0x0040007e, 0x20000c21, 0x00690000, 0x00000000}, /* nop (4) g0<1>UD { align1 + } */ {0x0040007e, 0x20000c21, 0x00690000, 0x00000000}, /* nop (4) g0<1>UD { align1 + } */ {0x0040007e, 0x20000c21, 0x00690000, 0x00000000}, /* nop (4) g0<1>UD { align1 + } */ {0x0040007e, 0x20000c21, 0x00690000, 0x00000000}, /* nop (4) g0<1>UD { align1 + } */ {0x0040007e, 0x20000c21, 0x00690000, 0x00000000}, }; /* * this program computes dA/dx and dA/dy for the texture coordinates along * with the base texture coordinate. It was extracted from the Mesa driver. * It uses about 10 GRF registers. */ #define SF_KERNEL_NUM_GRF 16 #define SF_MAX_THREADS 1 static const uint32_t sf_kernel_static[][4] = { #include "exa_sf.g4b" }; /* * Ok, this kernel picks up the required data flow values in g0 and g1 * and passes those along in m0 and m1. In m2-m9, it sticks constant * values (bright pink). */ /* Our PS kernel uses less than 32 GRF registers (about 20) */ #define PS_KERNEL_NUM_GRF 32 #define PS_MAX_THREADS 32 #define BRW_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1) static const uint32_t ps_kernel_packed_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_yuv_rgb.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_planar_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_planar.g4b" #include "exa_wm_yuv_rgb.g4b" #include "exa_wm_write.g4b" }; /* new program for Ironlake */ static const uint32_t sf_kernel_static_gen5[][4] = { #include "exa_sf.g4b.gen5" }; static const uint32_t ps_kernel_packed_static_gen5[][4] = { #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_affine.g4b.gen5" #include "exa_wm_src_sample_argb.g4b.gen5" #include "exa_wm_yuv_rgb.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; static const uint32_t ps_kernel_planar_static_gen5[][4] = { #include "exa_wm_xy.g4b.gen5" #include "exa_wm_src_affine.g4b.gen5" #include "exa_wm_src_sample_planar.g4b.gen5" #include "exa_wm_yuv_rgb.g4b.gen5" #include "exa_wm_write.g4b.gen5" }; /* programs for Sandybridge */ static const uint32_t ps_kernel_packed_static_gen6[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_yuv_rgb.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_planar_static_gen6[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_planar.g6b" #include "exa_wm_yuv_rgb.g6b" #include "exa_wm_write.g6b" }; /* programs for Ivybridge */ static const uint32_t ps_kernel_packed_static_gen7[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_yuv_rgb.g7b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_planar_static_gen7[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_planar.g7b" #include "exa_wm_yuv_rgb.g7b" #include "exa_wm_write.g7b" }; #ifndef MAX2 #define MAX2(a,b) ((a) > (b) ? (a) : (b)) #endif #define SURFACE_STATE_PADDED_SIZE_I965 ALIGN(sizeof(struct brw_surface_state), 32) #define SURFACE_STATE_PADDED_SIZE_GEN7 ALIGN(sizeof(struct gen7_surface_state), 32) #define SURFACE_STATE_PADDED_SIZE MAX2(SURFACE_STATE_PADDED_SIZE_I965, SURFACE_STATE_PADDED_SIZE_GEN7) #define SURFACE_STATE_OFFSET(index) (SURFACE_STATE_PADDED_SIZE * index) static uint32_t float_to_uint(float f) { union { uint32_t i; float f; } x; x.f = f; return x.i; } #if 0 static struct { uint32_t svg_ctl; char *name; } svg_ctl_bits[] = { { BRW_SVG_CTL_GS_BA, "General State Base Address"}, { BRW_SVG_CTL_SS_BA, "Surface State Base Address"}, { BRW_SVG_CTL_IO_BA, "Indirect Object Base Address"}, { BRW_SVG_CTL_GS_AUB, "Generate State Access Upper Bound"}, { BRW_SVG_CTL_IO_AUB, "Indirect Object Access Upper Bound"}, { BRW_SVG_CTL_SIP, "System Instruction Pointer"}, { 0, 0},}; static void brw_debug(ScrnInfoPtr scrn, char *when) { intel_screen_private *intel = intel_get_screen_private(scrn); int i; uint32_t v; ErrorF("brw_debug: %s\n", when); for (i = 0; svg_ctl_bits[i].name; i++) { OUTREG(BRW_SVG_CTL, svg_ctl_bits[i].svg_ctl); v = INREG(BRW_SVG_RDATA); ErrorF("\t%34.34s: 0x%08x\n", svg_ctl_bits[i].name, v); } } #endif #define WATCH_SF 0 #define WATCH_WIZ 0 #define WATCH_STATS 0 static void i965_pre_draw_debug(ScrnInfoPtr scrn) { #if 0 intel_screen_private *intel = intel_get_screen_private(scrn); #endif #if 0 ErrorF("before EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n", INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0), INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0)); OUTREG(BRW_VF_CTL, BRW_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID | BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX | BRW_VF_CTL_SNAPSHOT_ENABLE); OUTREG(BRW_VF_STRG_VAL, 0); #endif #if 0 OUTREG(BRW_VS_CTL, BRW_VS_CTL_SNAPSHOT_ALL_THREADS | BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT | BRW_VS_CTL_THREAD_SNAPSHOT_ENABLE); OUTREG(BRW_VS_STRG_VAL, 0); #endif #if WATCH_SF OUTREG(BRW_SF_CTL, BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT | BRW_SF_CTL_SNAPSHOT_ALL_THREADS | BRW_SF_CTL_THREAD_SNAPSHOT_ENABLE); OUTREG(BRW_SF_STRG_VAL, 0); #endif #if WATCH_WIZ OUTREG(BRW_WIZ_CTL, BRW_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE | BRW_WIZ_CTL_SNAPSHOT_ALL_THREADS | BRW_WIZ_CTL_SNAPSHOT_ENABLE); OUTREG(BRW_WIZ_STRG_VAL, (box_x1) | (box_y1 << 16)); #endif #if 0 OUTREG(BRW_TS_CTL, BRW_TS_CTL_SNAPSHOT_MESSAGE_ERROR | BRW_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS | BRW_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS | BRW_TS_CTL_SNAPSHOT_ENABLE); #endif } static void i965_post_draw_debug(ScrnInfoPtr scrn) { #if 0 intel_screen_private *intel = intel_get_screen_private(scrn); #endif #if 0 for (j = 0; j < 100000; j++) { ctl = INREG(BRW_VF_CTL); if (ctl & BRW_VF_CTL_SNAPSHOT_COMPLETE) break; } rdata = INREG(BRW_VF_RDATA); OUTREG(BRW_VF_CTL, 0); ErrorF("VF_CTL: 0x%08x VF_RDATA: 0x%08x\n", ctl, rdata); #endif #if 0 for (j = 0; j < 1000000; j++) { ctl = INREG(BRW_VS_CTL); if (ctl & BRW_VS_CTL_SNAPSHOT_COMPLETE) break; } rdata = INREG(BRW_VS_RDATA); for (k = 0; k <= 3; k++) { OUTREG(BRW_VS_CTL, BRW_VS_CTL_SNAPSHOT_COMPLETE | (k << 8)); rdata = INREG(BRW_VS_RDATA); ErrorF("VS_CTL: 0x%08x VS_RDATA(%d): 0x%08x\n", ctl, k, rdata); } OUTREG(BRW_VS_CTL, 0); #endif #if WATCH_SF for (j = 0; j < 1000000; j++) { ctl = INREG(BRW_SF_CTL); if (ctl & BRW_SF_CTL_SNAPSHOT_COMPLETE) break; } for (k = 0; k <= 7; k++) { OUTREG(BRW_SF_CTL, BRW_SF_CTL_SNAPSHOT_COMPLETE | (k << 8)); rdata = INREG(BRW_SF_RDATA); ErrorF("SF_CTL: 0x%08x SF_RDATA(%d): 0x%08x\n", ctl, k, rdata); } OUTREG(BRW_SF_CTL, 0); #endif #if WATCH_WIZ for (j = 0; j < 100000; j++) { ctl = INREG(BRW_WIZ_CTL); if (ctl & BRW_WIZ_CTL_SNAPSHOT_COMPLETE) break; } rdata = INREG(BRW_WIZ_RDATA); OUTREG(BRW_WIZ_CTL, 0); ErrorF("WIZ_CTL: 0x%08x WIZ_RDATA: 0x%08x\n", ctl, rdata); #endif #if 0 for (j = 0; j < 100000; j++) { ctl = INREG(BRW_TS_CTL); if (ctl & BRW_TS_CTL_SNAPSHOT_COMPLETE) break; } rdata = INREG(BRW_TS_RDATA); OUTREG(BRW_TS_CTL, 0); ErrorF("TS_CTL: 0x%08x TS_RDATA: 0x%08x\n", ctl, rdata); ErrorF("after EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n", INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0), INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0)); #endif #if 0 for (j = 0; j < 256; j++) { OUTREG(BRW_TD_CTL, j << BRW_TD_CTL_MUX_SHIFT); rdata = INREG(BRW_TD_RDATA); ErrorF("TD_RDATA(%d): 0x%08x\n", j, rdata); } #endif } /* For 3D, the VS must have 8, 12, 16, 24, or 32 VUEs allocated to it. * A VUE consists of a 256-bit vertex header followed by the vertex data, * which in our case is 4 floats (128 bits), thus a single 512-bit URB * entry. */ #define URB_VS_ENTRIES 8 #define URB_VS_ENTRY_SIZE 1 #define URB_GS_ENTRIES 0 #define URB_GS_ENTRY_SIZE 0 #define URB_CLIP_ENTRIES 0 #define URB_CLIP_ENTRY_SIZE 0 /* The SF kernel we use outputs only 4 256-bit registers, leading to an * entry size of 2 512-bit URBs. We don't need to have many entries to * output as we're generally working on large rectangles and don't care * about having WM threads running on different rectangles simultaneously. */ #define URB_SF_ENTRIES 1 #define URB_SF_ENTRY_SIZE 2 #define URB_CS_ENTRIES 0 #define URB_CS_ENTRY_SIZE 0 static void i965_create_dst_surface_state(ScrnInfoPtr scrn, PixmapPtr pixmap, drm_intel_bo *surf_bo, uint32_t offset) { intel_screen_private *intel = intel_get_screen_private(scrn); struct brw_surface_state dest_surf_state; drm_intel_bo *pixmap_bo = intel_uxa_get_pixmap_bo(pixmap); assert(pixmap_bo != NULL); memset(&dest_surf_state, 0, sizeof(dest_surf_state)); dest_surf_state.ss0.surface_type = BRW_SURFACE_2D; dest_surf_state.ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32; if (intel->cpp == 2) { dest_surf_state.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; } else { dest_surf_state.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; } dest_surf_state.ss0.writedisable_alpha = 0; dest_surf_state.ss0.writedisable_red = 0; dest_surf_state.ss0.writedisable_green = 0; dest_surf_state.ss0.writedisable_blue = 0; dest_surf_state.ss0.color_blend = 1; dest_surf_state.ss0.vert_line_stride = 0; dest_surf_state.ss0.vert_line_stride_ofs = 0; dest_surf_state.ss0.mipmap_layout_mode = 0; dest_surf_state.ss0.render_cache_read_mode = 0; dest_surf_state.ss1.base_addr = intel_uxa_emit_reloc(surf_bo, offset + offsetof(struct brw_surface_state, ss1), pixmap_bo, 0, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); dest_surf_state.ss2.height = pixmap->drawable.height - 1; dest_surf_state.ss2.width = pixmap->drawable.width - 1; dest_surf_state.ss2.mip_count = 0; dest_surf_state.ss2.render_target_rotation = 0; dest_surf_state.ss3.pitch = intel_pixmap_pitch(pixmap) - 1; dest_surf_state.ss3.tiled_surface = intel_uxa_pixmap_tiled(pixmap); dest_surf_state.ss3.tile_walk = 0; /* TileX */ dri_bo_subdata(surf_bo, offset, sizeof(dest_surf_state), &dest_surf_state); } static void i965_create_src_surface_state(ScrnInfoPtr scrn, drm_intel_bo * src_bo, uint32_t src_offset, int src_width, int src_height, int src_pitch, uint32_t src_surf_format, drm_intel_bo *surface_bo, uint32_t offset) { struct brw_surface_state src_surf_state; memset(&src_surf_state, 0, sizeof(src_surf_state)); /* Set up the source surface state buffer */ src_surf_state.ss0.surface_type = BRW_SURFACE_2D; src_surf_state.ss0.surface_format = src_surf_format; src_surf_state.ss0.writedisable_alpha = 0; src_surf_state.ss0.writedisable_red = 0; src_surf_state.ss0.writedisable_green = 0; src_surf_state.ss0.writedisable_blue = 0; src_surf_state.ss0.color_blend = 1; src_surf_state.ss0.vert_line_stride = 0; src_surf_state.ss0.vert_line_stride_ofs = 0; src_surf_state.ss0.mipmap_layout_mode = 0; src_surf_state.ss0.render_cache_read_mode = 0; src_surf_state.ss2.width = src_width - 1; src_surf_state.ss2.height = src_height - 1; src_surf_state.ss2.mip_count = 0; src_surf_state.ss2.render_target_rotation = 0; src_surf_state.ss3.pitch = src_pitch - 1; if (src_bo) { src_surf_state.ss1.base_addr = intel_uxa_emit_reloc(surface_bo, offset + offsetof(struct brw_surface_state, ss1), src_bo, src_offset, I915_GEM_DOMAIN_SAMPLER, 0); } else { src_surf_state.ss1.base_addr = src_offset; } dri_bo_subdata(surface_bo, offset, sizeof(src_surf_state), &src_surf_state); } static void gen7_create_dst_surface_state(ScrnInfoPtr scrn, PixmapPtr pixmap, drm_intel_bo *surf_bo, uint32_t offset) { intel_screen_private *intel = intel_get_screen_private(scrn); struct gen7_surface_state dest_surf_state; drm_intel_bo *pixmap_bo = intel_uxa_get_pixmap_bo(pixmap); assert(pixmap_bo != NULL); memset(&dest_surf_state, 0, sizeof(dest_surf_state)); dest_surf_state.ss0.surface_type = BRW_SURFACE_2D; dest_surf_state.ss0.tiled_surface = intel_uxa_pixmap_tiled(pixmap); dest_surf_state.ss0.tile_walk = 0; /* TileX */ if (intel->cpp == 2) { dest_surf_state.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; } else { dest_surf_state.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; } dest_surf_state.ss1.base_addr = intel_uxa_emit_reloc(surf_bo, offset + offsetof(struct gen7_surface_state, ss1), pixmap_bo, 0, I915_GEM_DOMAIN_SAMPLER, 0); dest_surf_state.ss2.height = pixmap->drawable.height - 1; dest_surf_state.ss2.width = pixmap->drawable.width - 1; dest_surf_state.ss3.pitch = intel_pixmap_pitch(pixmap) - 1; if (IS_HSW(intel)) { dest_surf_state.ss7.shader_chanel_select_r = HSW_SCS_RED; dest_surf_state.ss7.shader_chanel_select_g = HSW_SCS_GREEN; dest_surf_state.ss7.shader_chanel_select_b = HSW_SCS_BLUE; dest_surf_state.ss7.shader_chanel_select_a = HSW_SCS_ALPHA; } dri_bo_subdata(surf_bo, offset, sizeof(dest_surf_state), &dest_surf_state); } static void gen7_create_src_surface_state(ScrnInfoPtr scrn, drm_intel_bo * src_bo, uint32_t src_offset, int src_width, int src_height, int src_pitch, uint32_t src_surf_format, drm_intel_bo *surface_bo, uint32_t offset) { intel_screen_private * const intel = intel_get_screen_private(scrn); struct gen7_surface_state src_surf_state; memset(&src_surf_state, 0, sizeof(src_surf_state)); src_surf_state.ss0.surface_type = BRW_SURFACE_2D; src_surf_state.ss0.surface_format = src_surf_format; if (src_bo) { src_surf_state.ss1.base_addr = intel_uxa_emit_reloc(surface_bo, offset + offsetof(struct gen7_surface_state, ss1), src_bo, src_offset, I915_GEM_DOMAIN_SAMPLER, 0); } else { src_surf_state.ss1.base_addr = src_offset; } src_surf_state.ss2.width = src_width - 1; src_surf_state.ss2.height = src_height - 1; src_surf_state.ss3.pitch = src_pitch - 1; if (IS_HSW(intel)) { src_surf_state.ss7.shader_chanel_select_r = HSW_SCS_RED; src_surf_state.ss7.shader_chanel_select_g = HSW_SCS_GREEN; src_surf_state.ss7.shader_chanel_select_b = HSW_SCS_BLUE; src_surf_state.ss7.shader_chanel_select_a = HSW_SCS_ALPHA; } dri_bo_subdata(surface_bo, offset, sizeof(src_surf_state), &src_surf_state); } static void i965_create_binding_table(ScrnInfoPtr scrn, drm_intel_bo *bind_bo, int n_surf) { uint32_t binding_table[n_surf]; int i; /* Set up a binding table for our surfaces. Only the PS will use it */ for (i = 0; i < n_surf; i++) binding_table[i] = i * SURFACE_STATE_PADDED_SIZE; dri_bo_subdata(bind_bo, n_surf * SURFACE_STATE_PADDED_SIZE, sizeof(binding_table), binding_table); } static drm_intel_bo *i965_create_sampler_state(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct brw_sampler_state sampler_state; memset(&sampler_state, 0, sizeof(sampler_state)); sampler_state.ss0.min_filter = BRW_MAPFILTER_LINEAR; sampler_state.ss0.mag_filter = BRW_MAPFILTER_LINEAR; sampler_state.ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP; sampler_state.ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP; sampler_state.ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP; return intel_uxa_bo_alloc_for_data(intel, &sampler_state, sizeof(sampler_state), "textured video sampler state"); } static drm_intel_bo *gen7_create_sampler_state(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct gen7_sampler_state sampler_state; memset(&sampler_state, 0, sizeof(sampler_state)); sampler_state.ss0.min_filter = BRW_MAPFILTER_LINEAR; sampler_state.ss0.mag_filter = BRW_MAPFILTER_LINEAR; sampler_state.ss3.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP; sampler_state.ss3.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP; sampler_state.ss3.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP; return intel_uxa_bo_alloc_for_data(intel, &sampler_state, sizeof(sampler_state), "textured video sampler state"); } static drm_intel_bo *i965_create_vs_state(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct brw_vs_unit_state vs_state; /* Set up the vertex shader to be disabled (passthrough) */ memset(&vs_state, 0, sizeof(vs_state)); if (IS_GEN5(intel)) vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; else vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES; vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1; vs_state.vs6.vs_enable = 0; vs_state.vs6.vert_cache_disable = 1; return intel_uxa_bo_alloc_for_data(intel, &vs_state, sizeof(vs_state), "textured video vs state"); } static drm_intel_bo *i965_create_program(ScrnInfoPtr scrn, const uint32_t * program, unsigned int program_size) { intel_screen_private *intel = intel_get_screen_private(scrn); return intel_uxa_bo_alloc_for_data(intel, program, program_size, "textured video program"); } static drm_intel_bo *i965_create_sf_state(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); drm_intel_bo *sf_bo, *kernel_bo; struct brw_sf_unit_state sf_state; if (IS_GEN5(intel)) kernel_bo = i965_create_program(scrn, &sf_kernel_static_gen5[0][0], sizeof(sf_kernel_static_gen5)); else kernel_bo = i965_create_program(scrn, &sf_kernel_static[0][0], sizeof(sf_kernel_static)); if (!kernel_bo) return NULL; sf_bo = drm_intel_bo_alloc(intel->bufmgr, "textured video sf state", 4096, sizeof(sf_state)); if (sf_bo == NULL) { drm_intel_bo_unreference(kernel_bo); return NULL; } /* Set up the SF kernel to do coord interp: for each attribute, * calculate dA/dx and dA/dy. Hand these interpolation coefficients * back to SF which then hands pixels off to WM. */ memset(&sf_state, 0, sizeof(sf_state)); sf_state.thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF); sf_state.thread0.kernel_start_pointer = intel_uxa_emit_reloc(sf_bo, offsetof(struct brw_sf_unit_state, thread0), kernel_bo, sf_state.thread0.grf_reg_count << 1, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6; sf_state.sf1.single_program_flow = 1; /* XXX */ sf_state.sf1.binding_table_entry_count = 0; sf_state.sf1.thread_priority = 0; sf_state.sf1.floating_point_mode = 0; /* Mesa does this */ sf_state.sf1.illegal_op_exception_enable = 1; sf_state.sf1.mask_stack_exception_enable = 1; sf_state.sf1.sw_exception_enable = 1; sf_state.thread2.per_thread_scratch_space = 0; /* scratch space is not used in our kernel */ sf_state.thread2.scratch_space_base_pointer = 0; sf_state.thread3.const_urb_entry_read_length = 0; /* no const URBs */ sf_state.thread3.const_urb_entry_read_offset = 0; /* no const URBs */ sf_state.thread3.urb_entry_read_length = 1; /* 1 URB per vertex */ sf_state.thread3.urb_entry_read_offset = 0; sf_state.thread3.dispatch_grf_start_reg = 3; sf_state.thread4.max_threads = SF_MAX_THREADS - 1; sf_state.thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1; sf_state.thread4.nr_urb_entries = URB_SF_ENTRIES; sf_state.thread4.stats_enable = 1; sf_state.sf5.viewport_transform = FALSE; /* skip viewport */ sf_state.sf6.cull_mode = BRW_CULLMODE_NONE; sf_state.sf6.scissor = 0; sf_state.sf7.trifan_pv = 2; sf_state.sf6.dest_org_vbias = 0x8; sf_state.sf6.dest_org_hbias = 0x8; dri_bo_subdata(sf_bo, 0, sizeof(sf_state), &sf_state); return sf_bo; } static drm_intel_bo *i965_create_wm_state(ScrnInfoPtr scrn, drm_intel_bo * sampler_bo, Bool is_packed) { intel_screen_private *intel = intel_get_screen_private(scrn); drm_intel_bo *wm_bo, *kernel_bo; struct brw_wm_unit_state wm_state; if (is_packed) { if (IS_GEN5(intel)) kernel_bo = i965_create_program(scrn, &ps_kernel_packed_static_gen5[0] [0], sizeof (ps_kernel_packed_static_gen5)); else kernel_bo = i965_create_program(scrn, &ps_kernel_packed_static[0][0], sizeof (ps_kernel_packed_static)); } else { if (IS_GEN5(intel)) kernel_bo = i965_create_program(scrn, &ps_kernel_planar_static_gen5[0] [0], sizeof (ps_kernel_planar_static_gen5)); else kernel_bo = i965_create_program(scrn, &ps_kernel_planar_static[0][0], sizeof (ps_kernel_planar_static)); } if (!kernel_bo) return NULL; wm_bo = drm_intel_bo_alloc(intel->bufmgr, "textured video wm state", sizeof(wm_state), 0); if (wm_bo == NULL) { drm_intel_bo_unreference(kernel_bo); return NULL; } memset(&wm_state, 0, sizeof(wm_state)); wm_state.thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF); wm_state.thread0.kernel_start_pointer = intel_uxa_emit_reloc(wm_bo, offsetof(struct brw_wm_unit_state, thread0), kernel_bo, wm_state.thread0.grf_reg_count << 1, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6; wm_state.thread1.single_program_flow = 1; /* XXX */ if (is_packed) wm_state.thread1.binding_table_entry_count = 2; else wm_state.thread1.binding_table_entry_count = 7; /* binding table entry count is only used for prefetching, and it has to * be set 0 for Ironlake */ if (IS_GEN5(intel)) wm_state.thread1.binding_table_entry_count = 0; /* Though we never use the scratch space in our WM kernel, it has to be * set, and the minimum allocation is 1024 bytes. */ wm_state.thread2.scratch_space_base_pointer = 0; wm_state.thread2.per_thread_scratch_space = 0; /* 1024 bytes */ wm_state.thread3.dispatch_grf_start_reg = 3; /* XXX */ wm_state.thread3.const_urb_entry_read_length = 0; wm_state.thread3.const_urb_entry_read_offset = 0; wm_state.thread3.urb_entry_read_length = 1; /* XXX */ wm_state.thread3.urb_entry_read_offset = 0; /* XXX */ wm_state.wm4.stats_enable = 1; wm_state.wm4.sampler_state_pointer = intel_uxa_emit_reloc(wm_bo, offsetof(struct brw_wm_unit_state, wm4), sampler_bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5; if (IS_GEN5(intel)) wm_state.wm4.sampler_count = 0; else wm_state.wm4.sampler_count = 1; /* 1-4 samplers used */ wm_state.wm5.max_threads = PS_MAX_THREADS - 1; wm_state.wm5.thread_dispatch_enable = 1; wm_state.wm5.enable_16_pix = 1; wm_state.wm5.enable_8_pix = 0; wm_state.wm5.early_depth_test = 1; dri_bo_subdata(wm_bo, 0, sizeof(wm_state), &wm_state); drm_intel_bo_unreference(kernel_bo); return wm_bo; } static drm_intel_bo *i965_create_cc_vp_state(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct brw_cc_viewport cc_viewport; memset(&cc_viewport, 0, sizeof(cc_viewport)); cc_viewport.min_depth = -1.e35; cc_viewport.max_depth = 1.e35; return intel_uxa_bo_alloc_for_data(intel, &cc_viewport, sizeof(cc_viewport), "textured video cc viewport"); } static drm_intel_bo *i965_create_cc_state(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); drm_intel_bo *cc_bo, *cc_vp_bo; struct brw_cc_unit_state cc_state; cc_vp_bo = i965_create_cc_vp_state(scrn); if (!cc_vp_bo) return NULL; cc_bo = drm_intel_bo_alloc(intel->bufmgr, "textured video cc state", sizeof(cc_state), 0); if (cc_bo == NULL){ drm_intel_bo_unreference(cc_vp_bo); return NULL; } /* Color calculator state */ memset(&cc_state, 0, sizeof(cc_state)); cc_state.cc0.stencil_enable = 0; /* disable stencil */ cc_state.cc2.depth_test = 0; /* disable depth test */ cc_state.cc2.logicop_enable = 1; /* enable logic op */ cc_state.cc3.ia_blend_enable = 1; /* blend alpha just like colors */ cc_state.cc3.blend_enable = 0; /* disable color blend */ cc_state.cc3.alpha_test = 0; /* disable alpha test */ cc_state.cc4.cc_viewport_state_offset = intel_uxa_emit_reloc(cc_bo, offsetof(struct brw_cc_unit_state, cc4), cc_vp_bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5; cc_state.cc5.dither_enable = 0; /* disable dither */ cc_state.cc5.logicop_func = 0xc; /* WHITE */ cc_state.cc5.statistics_enable = 1; cc_state.cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD; cc_state.cc5.ia_src_blend_factor = BRW_BLENDFACTOR_ONE; cc_state.cc5.ia_dest_blend_factor = BRW_BLENDFACTOR_ONE; dri_bo_subdata(cc_bo, 0, sizeof(cc_state), &cc_state); drm_intel_bo_unreference(cc_vp_bo); return cc_bo; } static void i965_emit_video_setup(ScrnInfoPtr scrn, drm_intel_bo * surface_state_binding_table_bo, int n_src_surf, PixmapPtr pixmap) { intel_screen_private *intel = intel_get_screen_private(scrn); int urb_vs_start, urb_vs_size; int urb_gs_start, urb_gs_size; int urb_clip_start, urb_clip_size; int urb_sf_start, urb_sf_size; int urb_cs_start, urb_cs_size; int pipe_ctl; IntelEmitInvarientState(scrn); intel->last_3d = LAST_3D_VIDEO; intel->needs_3d_invariant = TRUE; urb_vs_start = 0; urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE; urb_gs_start = urb_vs_start + urb_vs_size; urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE; urb_clip_start = urb_gs_start + urb_gs_size; urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE; urb_sf_start = urb_clip_start + urb_clip_size; urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE; urb_cs_start = urb_sf_start + urb_sf_size; urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE; OUT_BATCH(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH | BRW_MI_GLOBAL_SNAPSHOT_RESET); OUT_BATCH(MI_NOOP); /* brw_debug (scrn, "before base address modify"); */ /* Match Mesa driver setup */ if (INTEL_INFO(intel)->gen >= 045) OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D); else OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D); /* Mesa does this. Who knows... */ OUT_BATCH(BRW_CS_URB_STATE | 0); OUT_BATCH((0 << 4) | /* URB Entry Allocation Size */ (0 << 0)); /* Number of URB Entries */ /* Zero out the two base address registers so all offsets are * absolute */ if (IS_GEN5(intel)) { OUT_BATCH(BRW_STATE_BASE_ADDRESS | 6); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* Generate state base address */ OUT_RELOC(surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* media base addr, don't care */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* Instruction base address */ /* general state max addr, disabled */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* media object state max addr, disabled */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* Instruction max addr, disabled */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); } else { OUT_BATCH(BRW_STATE_BASE_ADDRESS | 4); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* Generate state base address */ OUT_RELOC(surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* media base addr, don't care */ /* general state max addr, disabled */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); /* media object state max addr, disabled */ OUT_BATCH(0 | BASE_ADDRESS_MODIFY); } /* Set system instruction pointer */ OUT_BATCH(BRW_STATE_SIP | 0); /* system instruction pointer */ OUT_RELOC(intel->video.gen4_sip_kernel_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); /* brw_debug (scrn, "after base address modify"); */ if (IS_GEN5(intel)) pipe_ctl = BRW_PIPE_CONTROL_NOWRITE; else pipe_ctl = BRW_PIPE_CONTROL_NOWRITE | BRW_PIPE_CONTROL_IS_FLUSH; /* Pipe control */ OUT_BATCH(BRW_PIPE_CONTROL | pipe_ctl | 2); OUT_BATCH(0); /* Destination address */ OUT_BATCH(0); /* Immediate data low DW */ OUT_BATCH(0); /* Immediate data high DW */ /* Binding table pointers */ OUT_BATCH(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4); OUT_BATCH(0); /* vs */ OUT_BATCH(0); /* gs */ OUT_BATCH(0); /* clip */ OUT_BATCH(0); /* sf */ /* Only the PS uses the binding table */ OUT_BATCH((n_src_surf + 1) * SURFACE_STATE_PADDED_SIZE); /* Blend constant color (magenta is fun) */ OUT_BATCH(BRW_3DSTATE_CONSTANT_COLOR | 3); OUT_BATCH(float_to_uint(1.0)); OUT_BATCH(float_to_uint(0.0)); OUT_BATCH(float_to_uint(1.0)); OUT_BATCH(float_to_uint(1.0)); /* The drawing rectangle clipping is always on. Set it to values that * shouldn't do any clipping. */ OUT_BATCH(BRW_3DSTATE_DRAWING_RECTANGLE | 2); /* XXX 3 for BLC or CTG */ OUT_BATCH(0x00000000); /* ymin, xmin */ OUT_BATCH((pixmap->drawable.width - 1) | (pixmap->drawable.height - 1) << 16); /* ymax, xmax */ OUT_BATCH(0x00000000); /* yorigin, xorigin */ /* skip the depth buffer */ /* skip the polygon stipple */ /* skip the polygon stipple offset */ /* skip the line stipple */ /* Set the pointers to the 3d pipeline state */ OUT_BATCH(BRW_3DSTATE_PIPELINED_POINTERS | 5); OUT_RELOC(intel->video.gen4_vs_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); /* disable GS, resulting in passthrough */ OUT_BATCH(BRW_GS_DISABLE); /* disable CLIP, resulting in passthrough */ OUT_BATCH(BRW_CLIP_DISABLE); OUT_RELOC(intel->video.gen4_sf_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); if (n_src_surf == 1) OUT_RELOC(intel->video.gen4_wm_packed_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); else OUT_RELOC(intel->video.gen4_wm_planar_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_RELOC(intel->video.gen4_cc_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); /* URB fence */ OUT_BATCH(BRW_URB_FENCE | UF0_CS_REALLOC | UF0_SF_REALLOC | UF0_CLIP_REALLOC | UF0_GS_REALLOC | UF0_VS_REALLOC | 1); OUT_BATCH(((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) | ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) | ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT)); OUT_BATCH(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) | ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT)); /* Constant buffer state */ OUT_BATCH(BRW_CS_URB_STATE | 0); OUT_BATCH(((URB_CS_ENTRY_SIZE - 1) << 4) | (URB_CS_ENTRIES << 0)); /* Set up our vertex elements, sourced from the single vertex buffer. */ if (IS_GEN5(intel)) { OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | 3); /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */ OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */ OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (8 << VE0_OFFSET_SHIFT)); OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); } else { OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | 3); /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */ OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | (0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */ OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (8 << VE0_OFFSET_SHIFT)); OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); } } void I965DisplayVideoTextured(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, int id, RegionPtr dstRegion, short width, short height, int video_pitch, int video_pitch2, short src_w, short src_h, short drw_w, short drw_h, PixmapPtr pixmap) { intel_screen_private *intel = intel_get_screen_private(scrn); BoxPtr pbox; int nbox, dxo, dyo, pix_xoff, pix_yoff; float src_scale_x, src_scale_y; int src_surf; int n_src_surf; uint32_t src_surf_format; uint32_t src_surf_base[6]; int src_width[6]; int src_height[6]; int src_pitch[6]; drm_intel_bo *surface_state_binding_table_bo; #if 0 ErrorF("BroadwaterDisplayVideoTextured: %dx%d (pitch %d)\n", width, height, video_pitch); #endif #if 0 /* enable debug */ OUTREG(INST_PM, (1 << (16 + 4)) | (1 << 4)); ErrorF("INST_PM 0x%08x\n", INREG(INST_PM)); #endif src_surf_base[0] = adaptor_priv->YBufOffset; src_surf_base[1] = adaptor_priv->YBufOffset; src_surf_base[2] = adaptor_priv->VBufOffset; src_surf_base[3] = adaptor_priv->VBufOffset; src_surf_base[4] = adaptor_priv->UBufOffset; src_surf_base[5] = adaptor_priv->UBufOffset; #if 0 ErrorF("base 0 0x%x base 1 0x%x base 2 0x%x\n", src_surf_base[0], src_surf_base[1], src_surf_base[2]); #endif if (is_planar_fourcc(id)) { src_surf_format = BRW_SURFACEFORMAT_R8_UNORM; src_width[1] = src_width[0] = width; src_height[1] = src_height[0] = height; src_pitch[1] = src_pitch[0] = video_pitch2; src_width[4] = src_width[5] = src_width[2] = src_width[3] = width / 2; src_height[4] = src_height[5] = src_height[2] = src_height[3] = height / 2; src_pitch[4] = src_pitch[5] = src_pitch[2] = src_pitch[3] = video_pitch; n_src_surf = 6; } else { if (id == FOURCC_UYVY) src_surf_format = BRW_SURFACEFORMAT_YCRCB_SWAPY; else src_surf_format = BRW_SURFACEFORMAT_YCRCB_NORMAL; src_width[0] = width; src_height[0] = height; src_pitch[0] = video_pitch; n_src_surf = 1; } #if 0 ErrorF("dst surf: 0x%08x\n", state_base_offset + dest_surf_offset); ErrorF("src surf: 0x%08x\n", state_base_offset + src_surf_offset); #endif /* We'll be poking the state buffers that could be in use by the 3d * hardware here, but we should have synced the 3D engine already in * I830PutImage. */ surface_state_binding_table_bo = drm_intel_bo_alloc(intel->bufmgr, "surface state & binding table", (n_src_surf + 1) * (SURFACE_STATE_PADDED_SIZE + sizeof(uint32_t)), 4096); if (!surface_state_binding_table_bo) return; i965_create_dst_surface_state(scrn, pixmap, surface_state_binding_table_bo, 0); for (src_surf = 0; src_surf < n_src_surf; src_surf++) { i965_create_src_surface_state(scrn, adaptor_priv->buf, src_surf_base[src_surf], src_width[src_surf], src_height[src_surf], src_pitch[src_surf], src_surf_format, surface_state_binding_table_bo, (src_surf + 1) * SURFACE_STATE_PADDED_SIZE); } i965_create_binding_table(scrn, surface_state_binding_table_bo, n_src_surf + 1); if (intel->video.gen4_sampler_bo == NULL) intel->video.gen4_sampler_bo = i965_create_sampler_state(scrn); if (intel->video.gen4_sip_kernel_bo == NULL) { intel->video.gen4_sip_kernel_bo = i965_create_program(scrn, &sip_kernel_static[0][0], sizeof(sip_kernel_static)); if (!intel->video.gen4_sip_kernel_bo) { drm_intel_bo_unreference(surface_state_binding_table_bo); return; } } if (intel->video.gen4_vs_bo == NULL) { intel->video.gen4_vs_bo = i965_create_vs_state(scrn); if (!intel->video.gen4_vs_bo) { drm_intel_bo_unreference(surface_state_binding_table_bo); return; } } if (intel->video.gen4_sf_bo == NULL) { intel->video.gen4_sf_bo = i965_create_sf_state(scrn); if (!intel->video.gen4_sf_bo) { drm_intel_bo_unreference(surface_state_binding_table_bo); return; } } if (intel->video.gen4_wm_packed_bo == NULL) { intel->video.gen4_wm_packed_bo = i965_create_wm_state(scrn, intel->video.gen4_sampler_bo, TRUE); if (!intel->video.gen4_wm_packed_bo) { drm_intel_bo_unreference(surface_state_binding_table_bo); return; } } if (intel->video.gen4_wm_planar_bo == NULL) { intel->video.gen4_wm_planar_bo = i965_create_wm_state(scrn, intel->video.gen4_sampler_bo, FALSE); if (!intel->video.gen4_wm_planar_bo) { drm_intel_bo_unreference(surface_state_binding_table_bo); return; } } if (intel->video.gen4_cc_bo == NULL) { intel->video.gen4_cc_bo = i965_create_cc_state(scrn); if (!intel->video.gen4_cc_bo) { drm_intel_bo_unreference(surface_state_binding_table_bo); return; } } /* Set up the offset for translating from the given region (in screen * coordinates) to the backing pixmap. */ #ifdef COMPOSITE pix_xoff = -pixmap->screen_x + pixmap->drawable.x; pix_yoff = -pixmap->screen_y + pixmap->drawable.y; #else pix_xoff = 0; pix_yoff = 0; #endif dxo = dstRegion->extents.x1; dyo = dstRegion->extents.y1; /* Use normalized texture coordinates */ src_scale_x = ((float)src_w / width) / (float)drw_w; src_scale_y = ((float)src_h / height) / (float)drw_h; pbox = REGION_RECTS(dstRegion); nbox = REGION_NUM_RECTS(dstRegion); while (nbox--) { int box_x1 = pbox->x1; int box_y1 = pbox->y1; int box_x2 = pbox->x2; int box_y2 = pbox->y2; int i; float vb[12]; drm_intel_bo *bo_table[] = { NULL, /* vb_bo */ intel->batch_bo, surface_state_binding_table_bo, intel->video.gen4_sampler_bo, intel->video.gen4_sip_kernel_bo, intel->video.gen4_vs_bo, intel->video.gen4_sf_bo, intel->video.gen4_wm_packed_bo, intel->video.gen4_wm_planar_bo, intel->video.gen4_cc_bo, }; pbox++; i = 0; vb[i++] = (box_x2 - dxo) * src_scale_x; vb[i++] = (box_y2 - dyo) * src_scale_y; vb[i++] = (float)box_x2 + pix_xoff; vb[i++] = (float)box_y2 + pix_yoff; vb[i++] = (box_x1 - dxo) * src_scale_x; vb[i++] = (box_y2 - dyo) * src_scale_y; vb[i++] = (float)box_x1 + pix_xoff; vb[i++] = (float)box_y2 + pix_yoff; vb[i++] = (box_x1 - dxo) * src_scale_x; vb[i++] = (box_y1 - dyo) * src_scale_y; vb[i++] = (float)box_x1 + pix_xoff; vb[i++] = (float)box_y1 + pix_yoff; bo_table[0] = intel_uxa_bo_alloc_for_data(intel, vb, sizeof(vb), "textured video vbo"); if (IS_GEN4(intel)) i965_pre_draw_debug(scrn); /* If this command won't fit in the current batch, flush. * Assume that it does after being flushed. */ if (drm_intel_bufmgr_check_aperture_space(bo_table, ARRAY_SIZE(bo_table)) < 0) { intel_batch_submit(scrn); } intel_batch_start_atomic(scrn, 150); i965_emit_video_setup(scrn, surface_state_binding_table_bo, n_src_surf, pixmap); /* Set up the pointer to our vertex buffer */ OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | 3); /* four 32-bit floats per vertex */ OUT_BATCH((0 << VB0_BUFFER_INDEX_SHIFT) | VB0_VERTEXDATA | ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); OUT_RELOC(bo_table[0], I915_GEM_DOMAIN_VERTEX, 0, 0); if (IS_GEN5(intel)) OUT_RELOC(bo_table[0], I915_GEM_DOMAIN_VERTEX, 0, i * 4); else OUT_BATCH(3); /* four corners to our rectangle */ OUT_BATCH(0); /* reserved */ OUT_BATCH(BRW_3DPRIMITIVE | BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL | (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) | (0 << 9) | /* CTG - indirect vertex count */ 4); OUT_BATCH(3); /* vertex count per instance */ OUT_BATCH(0); /* start vertex offset */ OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ OUT_BATCH(MI_NOOP); intel_batch_end_atomic(scrn); drm_intel_bo_unreference(bo_table[0]); if (IS_GEN4(intel)) i965_post_draw_debug(scrn); } /* release reference once we're finished */ drm_intel_bo_unreference(surface_state_binding_table_bo); intel_uxa_debug_flush(scrn); } void i965_free_video(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); drm_intel_bo_unreference(intel->video.gen4_vs_bo); intel->video.gen4_vs_bo = NULL; drm_intel_bo_unreference(intel->video.gen4_sf_bo); intel->video.gen4_sf_bo = NULL; drm_intel_bo_unreference(intel->video.gen4_cc_bo); intel->video.gen4_cc_bo = NULL; drm_intel_bo_unreference(intel->video.gen4_wm_packed_bo); intel->video.gen4_wm_packed_bo = NULL; drm_intel_bo_unreference(intel->video.gen4_wm_planar_bo); intel->video.gen4_wm_planar_bo = NULL; drm_intel_bo_unreference(intel->video.gen4_cc_vp_bo); intel->video.gen4_cc_vp_bo = NULL; drm_intel_bo_unreference(intel->video.gen4_sampler_bo); intel->video.gen4_sampler_bo = NULL; drm_intel_bo_unreference(intel->video.gen4_sip_kernel_bo); intel->video.gen4_sip_kernel_bo = NULL; drm_intel_bo_unreference(intel->video.wm_prog_packed_bo); intel->video.wm_prog_packed_bo = NULL; drm_intel_bo_unreference(intel->video.wm_prog_planar_bo); intel->video.wm_prog_planar_bo = NULL; drm_intel_bo_unreference(intel->video.gen6_blend_bo); intel->video.gen6_blend_bo = NULL; drm_intel_bo_unreference(intel->video.gen6_depth_stencil_bo); intel->video.gen6_depth_stencil_bo = NULL; } /* for GEN6+ */ static drm_intel_bo * gen6_create_cc_state(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct gen6_color_calc_state cc_state; memset(&cc_state, 0, sizeof(cc_state)); cc_state.constant_r = 1.0; cc_state.constant_g = 0.0; cc_state.constant_b = 1.0; cc_state.constant_a = 1.0; return intel_uxa_bo_alloc_for_data(intel, &cc_state, sizeof(cc_state), "textured video cc state"); } static drm_intel_bo * gen6_create_blend_state(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct gen6_blend_state blend_state; memset(&blend_state, 0, sizeof(blend_state)); blend_state.blend1.logic_op_enable = 1; blend_state.blend1.logic_op_func = 0xc; blend_state.blend1.pre_blend_clamp_enable = 1; return intel_uxa_bo_alloc_for_data(intel, &blend_state, sizeof(blend_state), "textured video blend state"); } static drm_intel_bo * gen6_create_depth_stencil_state(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct gen6_depth_stencil_state depth_stencil_state; memset(&depth_stencil_state, 0, sizeof(depth_stencil_state)); return intel_uxa_bo_alloc_for_data(intel, &depth_stencil_state, sizeof(depth_stencil_state), "textured video blend state"); } static Bool gen6_create_vidoe_objects(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); drm_intel_bo *(*create_sampler_state)(ScrnInfoPtr); const uint32_t *packed_ps_kernel, *planar_ps_kernel; unsigned int packed_ps_size, planar_ps_size; if (INTEL_INFO(intel)->gen >= 070) { create_sampler_state = gen7_create_sampler_state; packed_ps_kernel = &ps_kernel_packed_static_gen7[0][0]; packed_ps_size = sizeof(ps_kernel_packed_static_gen7); planar_ps_kernel = &ps_kernel_planar_static_gen7[0][0]; planar_ps_size = sizeof(ps_kernel_planar_static_gen7); } else { create_sampler_state = i965_create_sampler_state; packed_ps_kernel = &ps_kernel_packed_static_gen6[0][0]; packed_ps_size = sizeof(ps_kernel_packed_static_gen6); planar_ps_kernel = &ps_kernel_planar_static_gen6[0][0]; planar_ps_size = sizeof(ps_kernel_planar_static_gen6); } if (intel->video.gen4_sampler_bo == NULL) intel->video.gen4_sampler_bo = create_sampler_state(scrn); if (intel->video.wm_prog_packed_bo == NULL) intel->video.wm_prog_packed_bo = i965_create_program(scrn, packed_ps_kernel, packed_ps_size); if (intel->video.wm_prog_planar_bo == NULL) intel->video.wm_prog_planar_bo = i965_create_program(scrn, planar_ps_kernel, planar_ps_size); if (intel->video.gen4_cc_vp_bo == NULL) intel->video.gen4_cc_vp_bo = i965_create_cc_vp_state(scrn); if (intel->video.gen4_cc_bo == NULL) intel->video.gen4_cc_bo = gen6_create_cc_state(scrn); if (intel->video.gen6_blend_bo == NULL) intel->video.gen6_blend_bo = gen6_create_blend_state(scrn); if (intel->video.gen6_depth_stencil_bo == NULL) intel->video.gen6_depth_stencil_bo = gen6_create_depth_stencil_state(scrn); return (intel->video.gen4_sampler_bo != NULL && intel->video.wm_prog_packed_bo != NULL && intel->video.wm_prog_planar_bo != NULL && intel->video.gen4_cc_vp_bo != NULL && intel->video.gen4_cc_bo != NULL && intel->video.gen6_blend_bo != NULL && intel->video.gen6_depth_stencil_bo != NULL); } static void gen6_upload_state_base_address(ScrnInfoPtr scrn, drm_intel_bo *surface_state_binding_table_bo) { intel_screen_private *intel = intel_get_screen_private(scrn); OUT_BATCH(BRW_STATE_BASE_ADDRESS | (10 - 2)); OUT_BATCH(BASE_ADDRESS_MODIFY); /* General state base address */ OUT_RELOC(surface_state_binding_table_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* Dynamic state base address */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* Indirect object base address */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* Instruction base address */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* General state upper bound */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* Dynamic state upper bound */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* Indirect object upper bound */ OUT_BATCH(BASE_ADDRESS_MODIFY); /* Instruction access upper bound */ } static void gen6_upload_drawing_rectangle(ScrnInfoPtr scrn, PixmapPtr pixmap) { intel_screen_private *intel = intel_get_screen_private(scrn); OUT_BATCH(BRW_3DSTATE_DRAWING_RECTANGLE | 2); OUT_BATCH(0x00000000); /* ymin, xmin */ OUT_BATCH((pixmap->drawable.width - 1) | (pixmap->drawable.height - 1) << 16); /* ymax, xmax */ OUT_BATCH(0x00000000); /* yorigin, xorigin */ } static void gen6_upload_wm_state(ScrnInfoPtr scrn, Bool is_packed) { intel_screen_private *intel = intel_get_screen_private(scrn); /* disable WM constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_WM | (9 - 2)); if (is_packed) { OUT_RELOC(intel->video.wm_prog_packed_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_BATCH((1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF) | (2 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT)); } else { OUT_RELOC(intel->video.wm_prog_planar_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_BATCH((1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF) | (7 << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT)); } OUT_BATCH(0); OUT_BATCH((6 << GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT)); /* DW4 */ OUT_BATCH(((40 - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT) | GEN6_3DSTATE_WM_DISPATCH_ENABLE | GEN6_3DSTATE_WM_16_DISPATCH_ENABLE); OUT_BATCH((1 << GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT) | GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(0); OUT_BATCH(0); } static void gen6_upload_vertex_element_state(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); /* Set up our vertex elements, sourced from the single vertex buffer. */ OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | (5 - 2)); /* offset 0: X,Y -> {X, Y, 1.0, 1.0} */ OUT_BATCH((0 << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); /* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */ OUT_BATCH((0 << GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT) | GEN6_VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) | (8 << VE0_OFFSET_SHIFT)); OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT)); } static void gen6_upload_vertex_buffer(ScrnInfoPtr scrn, drm_intel_bo *vertex_bo, uint32_t end_address_offset) { intel_screen_private *intel = intel_get_screen_private(scrn); /* Set up the pointer to our vertex buffer */ OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | (5 - 2)); /* four 32-bit floats per vertex */ OUT_BATCH((0 << GEN6_VB0_BUFFER_INDEX_SHIFT) | GEN6_VB0_VERTEXDATA | ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); OUT_RELOC(vertex_bo, I915_GEM_DOMAIN_VERTEX, 0, 0); OUT_RELOC(vertex_bo, I915_GEM_DOMAIN_VERTEX, 0, end_address_offset); OUT_BATCH(0); /* reserved */ } static void gen6_upload_primitive(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); OUT_BATCH(BRW_3DPRIMITIVE | BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL | (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) | (0 << 9) | /* Internal Vertex Count */ (6 - 2)); OUT_BATCH(3); /* vertex count per instance */ OUT_BATCH(0); /* start vertex offset */ OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ } static void gen6_emit_video_setup(ScrnInfoPtr scrn, drm_intel_bo *surface_state_binding_table_bo, int n_src_surf, PixmapPtr pixmap, drm_intel_bo *vertex_bo, uint32_t end_address_offset) { intel_screen_private *intel = intel_get_screen_private(scrn); assert(n_src_surf == 1 || n_src_surf == 6); IntelEmitInvarientState(scrn); intel->last_3d = LAST_3D_VIDEO; intel->needs_3d_invariant = TRUE; gen6_upload_invariant_states(intel); gen6_upload_state_base_address(scrn, surface_state_binding_table_bo); gen6_upload_viewport_state_pointers(intel, intel->video.gen4_cc_vp_bo); gen6_upload_urb(intel); gen6_upload_cc_state_pointers(intel, intel->video.gen6_blend_bo, intel->video.gen4_cc_bo, intel->video.gen6_depth_stencil_bo, 0); gen6_upload_sampler_state_pointers(intel, intel->video.gen4_sampler_bo); gen6_upload_vs_state(intel); gen6_upload_gs_state(intel); gen6_upload_clip_state(intel); gen6_upload_sf_state(intel, 1, 0); gen6_upload_wm_state(scrn, n_src_surf == 1 ? TRUE : FALSE); gen6_upload_binding_table(intel, (n_src_surf + 1) * SURFACE_STATE_PADDED_SIZE); gen6_upload_depth_buffer_state(intel); gen6_upload_drawing_rectangle(scrn, pixmap); gen6_upload_vertex_element_state(scrn); gen6_upload_vertex_buffer(scrn, vertex_bo, end_address_offset); gen6_upload_primitive(scrn); } static void gen7_upload_wm_state(ScrnInfoPtr scrn, Bool is_packed) { intel_screen_private *intel = intel_get_screen_private(scrn); unsigned int max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_IVB; unsigned int num_samples = 0; if (IS_HSW(intel)) { max_threads_shift = GEN7_PS_MAX_THREADS_SHIFT_HSW; num_samples = 1 << GEN7_PS_SAMPLE_MASK_SHIFT_HSW; } /* disable WM constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (7 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_WM | (3 - 2)); OUT_BATCH(GEN7_WM_DISPATCH_ENABLE | GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_PS | (8 - 2)); if (is_packed) { OUT_RELOC(intel->video.wm_prog_packed_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_BATCH((1 << GEN7_PS_SAMPLER_COUNT_SHIFT) | (2 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); } else { OUT_RELOC(intel->video.wm_prog_planar_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_BATCH((1 << GEN7_PS_SAMPLER_COUNT_SHIFT) | (7 << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT)); } OUT_BATCH(0); /* scratch space base offset */ OUT_BATCH( ((48 - 1) << max_threads_shift) | num_samples | GEN7_PS_ATTRIBUTE_ENABLE | GEN7_PS_16_DISPATCH_ENABLE); OUT_BATCH( (6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_0)); OUT_BATCH(0); /* kernel 1 pointer */ OUT_BATCH(0); /* kernel 2 pointer */ } static void gen7_upload_vertex_buffer(ScrnInfoPtr scrn, drm_intel_bo *vertex_bo, uint32_t end_address_offset) { intel_screen_private *intel = intel_get_screen_private(scrn); /* Set up the pointer to our vertex buffer */ OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | (5 - 2)); /* four 32-bit floats per vertex */ OUT_BATCH((0 << GEN6_VB0_BUFFER_INDEX_SHIFT) | GEN6_VB0_VERTEXDATA | GEN7_VB0_ADDRESS_MODIFYENABLE | ((4 * 4) << VB0_BUFFER_PITCH_SHIFT)); OUT_RELOC(vertex_bo, I915_GEM_DOMAIN_VERTEX, 0, 0); OUT_RELOC(vertex_bo, I915_GEM_DOMAIN_VERTEX, 0, end_address_offset); OUT_BATCH(0); /* reserved */ } static void gen7_upload_primitive(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); OUT_BATCH(BRW_3DPRIMITIVE | (7 - 2)); OUT_BATCH(_3DPRIM_RECTLIST | GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL); OUT_BATCH(3); /* vertex count per instance */ OUT_BATCH(0); /* start vertex offset */ OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); } static void gen7_emit_video_setup(ScrnInfoPtr scrn, drm_intel_bo *surface_state_binding_table_bo, int n_src_surf, PixmapPtr pixmap, drm_intel_bo *vertex_bo, uint32_t end_address_offset) { intel_screen_private *intel = intel_get_screen_private(scrn); assert(n_src_surf == 1 || n_src_surf == 6); IntelEmitInvarientState(scrn); intel->last_3d = LAST_3D_VIDEO; intel->needs_3d_invariant = TRUE; gen6_upload_invariant_states(intel); gen6_upload_state_base_address(scrn, surface_state_binding_table_bo); gen7_upload_viewport_state_pointers(intel, intel->video.gen4_cc_vp_bo); gen7_upload_urb(intel); gen7_upload_cc_state_pointers(intel, intel->video.gen6_blend_bo, intel->video.gen4_cc_bo, intel->video.gen6_depth_stencil_bo, 0); gen7_upload_sampler_state_pointers(intel, intel->video.gen4_sampler_bo); gen7_upload_bypass_states(intel); gen6_upload_vs_state(intel); gen6_upload_clip_state(intel); gen7_upload_sf_state(intel, 1, 0); gen7_upload_wm_state(scrn, n_src_surf == 1 ? TRUE : FALSE); gen7_upload_binding_table(intel, (n_src_surf + 1) * SURFACE_STATE_PADDED_SIZE); gen7_upload_depth_buffer_state(intel); gen6_upload_drawing_rectangle(scrn, pixmap); gen6_upload_vertex_element_state(scrn); gen7_upload_vertex_buffer(scrn, vertex_bo, end_address_offset); gen7_upload_primitive(scrn); } void Gen6DisplayVideoTextured(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, int id, RegionPtr dstRegion, short width, short height, int video_pitch, int video_pitch2, short src_w, short src_h, short drw_w, short drw_h, PixmapPtr pixmap) { intel_screen_private *intel = intel_get_screen_private(scrn); BoxPtr pbox; int nbox, dxo, dyo, pix_xoff, pix_yoff; float src_scale_x, src_scale_y; int src_surf; int n_src_surf; uint32_t src_surf_format; uint32_t src_surf_base[6]; int src_width[6]; int src_height[6]; int src_pitch[6]; drm_intel_bo *surface_state_binding_table_bo; void (*create_dst_surface_state)(ScrnInfoPtr, PixmapPtr, drm_intel_bo *, uint32_t); void (*create_src_surface_state)(ScrnInfoPtr, drm_intel_bo *, uint32_t, int, int, int, uint32_t, drm_intel_bo *, uint32_t); void (*emit_video_setup)(ScrnInfoPtr, drm_intel_bo *, int, PixmapPtr, drm_intel_bo *, uint32_t); if (INTEL_INFO(intel)->gen >= 070) { create_dst_surface_state = gen7_create_dst_surface_state; create_src_surface_state = gen7_create_src_surface_state; emit_video_setup = gen7_emit_video_setup; } else { create_dst_surface_state = i965_create_dst_surface_state; create_src_surface_state = i965_create_src_surface_state; emit_video_setup = gen6_emit_video_setup; } src_surf_base[0] = adaptor_priv->YBufOffset; src_surf_base[1] = adaptor_priv->YBufOffset; src_surf_base[2] = adaptor_priv->VBufOffset; src_surf_base[3] = adaptor_priv->VBufOffset; src_surf_base[4] = adaptor_priv->UBufOffset; src_surf_base[5] = adaptor_priv->UBufOffset; if (is_planar_fourcc(id)) { src_surf_format = BRW_SURFACEFORMAT_R8_UNORM; src_width[1] = src_width[0] = width; src_height[1] = src_height[0] = height; src_pitch[1] = src_pitch[0] = video_pitch2; src_width[4] = src_width[5] = src_width[2] = src_width[3] = width / 2; src_height[4] = src_height[5] = src_height[2] = src_height[3] = height / 2; src_pitch[4] = src_pitch[5] = src_pitch[2] = src_pitch[3] = video_pitch; n_src_surf = 6; } else { if (id == FOURCC_UYVY) src_surf_format = BRW_SURFACEFORMAT_YCRCB_SWAPY; else src_surf_format = BRW_SURFACEFORMAT_YCRCB_NORMAL; src_width[0] = width; src_height[0] = height; src_pitch[0] = video_pitch; n_src_surf = 1; } surface_state_binding_table_bo = drm_intel_bo_alloc(intel->bufmgr, "surface state & binding table", (n_src_surf + 1) * (SURFACE_STATE_PADDED_SIZE + sizeof(uint32_t)), 4096); if (!surface_state_binding_table_bo) return; create_dst_surface_state(scrn, pixmap, surface_state_binding_table_bo, 0); for (src_surf = 0; src_surf < n_src_surf; src_surf++) { create_src_surface_state(scrn, adaptor_priv->buf, src_surf_base[src_surf], src_width[src_surf], src_height[src_surf], src_pitch[src_surf], src_surf_format, surface_state_binding_table_bo, (src_surf + 1) * SURFACE_STATE_PADDED_SIZE); } i965_create_binding_table(scrn, surface_state_binding_table_bo, n_src_surf + 1); if (!gen6_create_vidoe_objects(scrn)) { drm_intel_bo_unreference(surface_state_binding_table_bo); return; } /* Set up the offset for translating from the given region (in screen * coordinates) to the backing pixmap. */ #ifdef COMPOSITE pix_xoff = -pixmap->screen_x + pixmap->drawable.x; pix_yoff = -pixmap->screen_y + pixmap->drawable.y; #else pix_xoff = 0; pix_yoff = 0; #endif dxo = dstRegion->extents.x1; dyo = dstRegion->extents.y1; /* Use normalized texture coordinates */ src_scale_x = ((float)src_w / width) / (float)drw_w; src_scale_y = ((float)src_h / height) / (float)drw_h; pbox = REGION_RECTS(dstRegion); nbox = REGION_NUM_RECTS(dstRegion); while (nbox--) { int box_x1 = pbox->x1; int box_y1 = pbox->y1; int box_x2 = pbox->x2; int box_y2 = pbox->y2; int i; float vb[12]; drm_intel_bo *bo_table[] = { NULL, /* vb_bo */ intel->batch_bo, surface_state_binding_table_bo, intel->video.gen4_sampler_bo, intel->video.wm_prog_packed_bo, intel->video.wm_prog_planar_bo, intel->video.gen4_cc_vp_bo, intel->video.gen4_cc_bo, intel->video.gen6_blend_bo, intel->video.gen6_depth_stencil_bo, }; pbox++; i = 0; vb[i++] = (box_x2 - dxo) * src_scale_x; vb[i++] = (box_y2 - dyo) * src_scale_y; vb[i++] = (float)box_x2 + pix_xoff; vb[i++] = (float)box_y2 + pix_yoff; vb[i++] = (box_x1 - dxo) * src_scale_x; vb[i++] = (box_y2 - dyo) * src_scale_y; vb[i++] = (float)box_x1 + pix_xoff; vb[i++] = (float)box_y2 + pix_yoff; vb[i++] = (box_x1 - dxo) * src_scale_x; vb[i++] = (box_y1 - dyo) * src_scale_y; vb[i++] = (float)box_x1 + pix_xoff; vb[i++] = (float)box_y1 + pix_yoff; bo_table[0] = intel_uxa_bo_alloc_for_data(intel, vb, sizeof(vb), "video vbo"); /* If this command won't fit in the current batch, flush. * Assume that it does after being flushed. */ if (drm_intel_bufmgr_check_aperture_space(bo_table, ARRAY_SIZE(bo_table)) < 0) intel_batch_submit(scrn); intel_batch_start_atomic(scrn, 200); emit_video_setup(scrn, surface_state_binding_table_bo, n_src_surf, pixmap, bo_table[0], i * 4); intel_batch_end_atomic(scrn); drm_intel_bo_unreference(bo_table[0]); } /* release reference once we're finished */ drm_intel_bo_unreference(surface_state_binding_table_bo); intel_uxa_debug_flush(scrn); } xf86-video-intel-2.99.917/src/uxa/i915_render.c0000664000175000017500000007025612432737457015535 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Wang Zhenyu * Eric Anholt * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "xorg-server.h" #include "xf86.h" #include "intel.h" #include "intel_uxa.h" #include "i915_reg.h" #include "i915_3d.h" struct formatinfo { int fmt; uint32_t card_fmt; }; struct blendinfo { Bool dst_alpha; Bool src_alpha; uint32_t src_blend; uint32_t dst_blend; }; static struct blendinfo i915_blend_op[] = { /* Clear */ {0, 0, BLENDFACT_ZERO, BLENDFACT_ZERO}, /* Src */ {0, 0, BLENDFACT_ONE, BLENDFACT_ZERO}, /* Dst */ {0, 0, BLENDFACT_ZERO, BLENDFACT_ONE}, /* Over */ {0, 1, BLENDFACT_ONE, BLENDFACT_INV_SRC_ALPHA}, /* OverReverse */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE}, /* In */ {1, 0, BLENDFACT_DST_ALPHA, BLENDFACT_ZERO}, /* InReverse */ {0, 1, BLENDFACT_ZERO, BLENDFACT_SRC_ALPHA}, /* Out */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO}, /* OutReverse */ {0, 1, BLENDFACT_ZERO, BLENDFACT_INV_SRC_ALPHA}, /* Atop */ {1, 1, BLENDFACT_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, /* AtopReverse */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA}, /* Xor */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, /* Add */ {0, 0, BLENDFACT_ONE, BLENDFACT_ONE}, }; static struct formatinfo i915_tex_formats[] = { {PICT_a8, MAPSURF_8BIT | MT_8BIT_A8}, {PICT_a8r8g8b8, MAPSURF_32BIT | MT_32BIT_ARGB8888}, {PICT_x8r8g8b8, MAPSURF_32BIT | MT_32BIT_XRGB8888}, {PICT_a8b8g8r8, MAPSURF_32BIT | MT_32BIT_ABGR8888}, {PICT_x8b8g8r8, MAPSURF_32BIT | MT_32BIT_XBGR8888}, #if XORG_VERSION_CURRENT >= 10699900 {PICT_a2r10g10b10, MAPSURF_32BIT | MT_32BIT_ARGB2101010}, {PICT_a2b10g10r10, MAPSURF_32BIT | MT_32BIT_ABGR2101010}, #endif {PICT_r5g6b5, MAPSURF_16BIT | MT_16BIT_RGB565}, {PICT_a1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555}, {PICT_a4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444}, }; static uint32_t i915_get_blend_cntl(int op, PicturePtr mask, uint32_t dst_format) { uint32_t sblend, dblend; sblend = i915_blend_op[op].src_blend; dblend = i915_blend_op[op].dst_blend; /* If there's no dst alpha channel, adjust the blend op so that we'll * treat it as always 1. */ if (PICT_FORMAT_A(dst_format) == 0 && i915_blend_op[op].dst_alpha) { if (sblend == BLENDFACT_DST_ALPHA) sblend = BLENDFACT_ONE; else if (sblend == BLENDFACT_INV_DST_ALPHA) sblend = BLENDFACT_ZERO; } /* i915 engine reads 8bit color buffer into green channel in cases like color buffer blending .etc, and also writes back green channel. So with dst_alpha blend we should use color factor. See spec on "8-bit rendering" */ if ((dst_format == PICT_a8) && i915_blend_op[op].dst_alpha) { if (sblend == BLENDFACT_DST_ALPHA) sblend = BLENDFACT_DST_COLR; else if (sblend == BLENDFACT_INV_DST_ALPHA) sblend = BLENDFACT_INV_DST_COLR; } /* If the source alpha is being used, then we should only be in a case * where the source blend factor is 0, and the source blend value is the * mask channels multiplied by the source picture's alpha. */ if (mask && mask->componentAlpha && PICT_FORMAT_RGB(mask->format) && i915_blend_op[op].src_alpha) { if (dblend == BLENDFACT_SRC_ALPHA) { dblend = BLENDFACT_SRC_COLR; } else if (dblend == BLENDFACT_INV_SRC_ALPHA) { dblend = BLENDFACT_INV_SRC_COLR; } } return S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | (BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT) | (sblend << S6_CBUF_SRC_BLEND_FACT_SHIFT) | (dblend << S6_CBUF_DST_BLEND_FACT_SHIFT); } #define DSTORG_HORT_BIAS(x) ((x)<<20) #define DSTORG_VERT_BIAS(x) ((x)<<16) static Bool i915_get_dest_format(PicturePtr dest_picture, uint32_t * dst_format) { ScrnInfoPtr scrn; switch (dest_picture->format) { case PICT_a8r8g8b8: case PICT_x8r8g8b8: *dst_format = COLR_BUF_ARGB8888; break; case PICT_r5g6b5: *dst_format = COLR_BUF_RGB565; break; case PICT_a1r5g5b5: case PICT_x1r5g5b5: *dst_format = COLR_BUF_ARGB1555; break; #if XORG_VERSION_CURRENT >= 10699900 case PICT_a2r10g10b10: case PICT_x2r10g10b10: *dst_format = COLR_BUF_ARGB2AAA; break; #endif case PICT_a8: *dst_format = COLR_BUF_8BIT; break; case PICT_a4r4g4b4: case PICT_x4r4g4b4: *dst_format = COLR_BUF_ARGB4444; break; default: scrn = xf86ScreenToScrn(dest_picture->pDrawable->pScreen); intel_uxa_debug_fallback(scrn, "Unsupported dest format 0x%x\n", (int)dest_picture->format); return FALSE; } *dst_format |= DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8); return TRUE; } Bool i915_check_composite(int op, PicturePtr source_picture, PicturePtr mask_picture, PicturePtr dest_picture, int width, int height) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest_picture->pDrawable->pScreen); uint32_t tmp1; /* Check for unsupported compositing operations. */ if (op >= sizeof(i915_blend_op) / sizeof(i915_blend_op[0])) { intel_uxa_debug_fallback(scrn, "Unsupported Composite op 0x%x\n", op); return FALSE; } if (mask_picture != NULL && mask_picture->componentAlpha && PICT_FORMAT_RGB(mask_picture->format)) { /* Check if it's component alpha that relies on a source alpha * and on the source value. We can only get one of those * into the single source value that we get to blend with. */ if (i915_blend_op[op].src_alpha && (i915_blend_op[op].src_blend != BLENDFACT_ZERO)) { if (op != PictOpOver) { intel_uxa_debug_fallback(scrn, "Component alpha not supported " "with source alpha and source " "value blending.\n"); return FALSE; } } } if (!i915_get_dest_format(dest_picture, &tmp1)) { intel_uxa_debug_fallback(scrn, "Get Color buffer format\n"); return FALSE; } if (width > 2048 || height > 2048) return FALSE; return TRUE; } Bool i915_check_composite_target(PixmapPtr pixmap) { if (pixmap->drawable.width > 2048 || pixmap->drawable.height > 2048) return FALSE; if(!intel_uxa_check_pitch_3d(pixmap)) return FALSE; return TRUE; } Bool i915_check_composite_texture(ScreenPtr screen, PicturePtr picture) { if (picture->repeatType > RepeatReflect) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_uxa_debug_fallback(scrn, "Unsupported picture repeat %d\n", picture->repeatType); return FALSE; } if (picture->filter != PictFilterNearest && picture->filter != PictFilterBilinear) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_uxa_debug_fallback(scrn, "Unsupported filter 0x%x\n", picture->filter); return FALSE; } if (picture->pSourcePict) return FALSE; if (picture->pDrawable) { int w, h, i; w = picture->pDrawable->width; h = picture->pDrawable->height; if ((w > 2048) || (h > 2048)) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_uxa_debug_fallback(scrn, "Picture w/h too large (%dx%d)\n", w, h); return FALSE; } for (i = 0; i < sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0]); i++) { if (i915_tex_formats[i].fmt == picture->format) break; } if (i == sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0])) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_uxa_debug_fallback(scrn, "Unsupported picture format " "0x%x\n", (int)picture->format); return FALSE; } return TRUE; } return FALSE; } static Bool i915_texture_setup(PicturePtr picture, PixmapPtr pixmap, int unit) { ScrnInfoPtr scrn = xf86ScreenToScrn(picture->pDrawable->pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); uint32_t format, pitch, filter; uint32_t wrap_mode, tiling_bits; int i; pitch = intel_pixmap_pitch(pixmap); intel->scale_units[unit][0] = 1. / pixmap->drawable.width; intel->scale_units[unit][1] = 1. / pixmap->drawable.height; for (i = 0; i < sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0]); i++) { if (i915_tex_formats[i].fmt == picture->format) break; } if (i == sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0])) { intel_uxa_debug_fallback(scrn, "unknown texture format\n"); return FALSE; } format = i915_tex_formats[i].card_fmt; switch (picture->repeatType) { case RepeatNone: wrap_mode = TEXCOORDMODE_CLAMP_BORDER; break; case RepeatNormal: wrap_mode = TEXCOORDMODE_WRAP; break; case RepeatPad: wrap_mode = TEXCOORDMODE_CLAMP_EDGE; break; case RepeatReflect: wrap_mode = TEXCOORDMODE_MIRROR; break; default: FatalError("Unknown repeat type %d\n", picture->repeatType); } switch (picture->filter) { case PictFilterNearest: filter = (FILTER_NEAREST << SS2_MAG_FILTER_SHIFT) | (FILTER_NEAREST << SS2_MIN_FILTER_SHIFT); break; case PictFilterBilinear: filter = (FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT); break; default: intel_uxa_debug_fallback(scrn, "Bad filter 0x%x\n", picture->filter); return FALSE; } /* offset filled in at emit time */ if (intel_uxa_pixmap_tiled(pixmap)) { tiling_bits = MS3_TILED_SURFACE; if (intel_uxa_get_pixmap_private(pixmap)->tiling == I915_TILING_Y) tiling_bits |= MS3_TILE_WALK; } else tiling_bits = 0; intel->texture[unit] = pixmap; intel->mapstate[unit * 3 + 0] = 0; intel->mapstate[unit * 3 + 1] = format | tiling_bits | ((pixmap->drawable.height - 1) << MS3_HEIGHT_SHIFT) | ((pixmap->drawable.width - 1) << MS3_WIDTH_SHIFT); intel->mapstate[unit * 3 + 2] = ((pitch / 4) - 1) << MS4_PITCH_SHIFT; intel->samplerstate[unit * 3 + 0] = (MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT); intel->samplerstate[unit * 3 + 0] |= filter; intel->samplerstate[unit * 3 + 1] = SS3_NORMALIZED_COORDS; intel->samplerstate[unit * 3 + 1] |= wrap_mode << SS3_TCX_ADDR_MODE_SHIFT; intel->samplerstate[unit * 3 + 1] |= wrap_mode << SS3_TCY_ADDR_MODE_SHIFT; intel->samplerstate[unit * 3 + 1] |= unit << SS3_TEXTUREMAP_INDEX_SHIFT; intel->samplerstate[unit * 3 + 2] = 0x00000000; /* border color */ intel->transform[unit] = picture->transform; return TRUE; } static void i915_emit_composite_primitive_identity_source(intel_screen_private *intel, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { OUT_VERTEX(dstX + w); OUT_VERTEX(dstY + h); OUT_VERTEX((srcX + w) * intel->scale_units[0][0]); OUT_VERTEX((srcY + h) * intel->scale_units[0][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY + h); OUT_VERTEX(srcX * intel->scale_units[0][0]); OUT_VERTEX((srcY + h) * intel->scale_units[0][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY); OUT_VERTEX(srcX * intel->scale_units[0][0]); OUT_VERTEX(srcY * intel->scale_units[0][1]); } static void i915_emit_composite_primitive_affine_source(intel_screen_private *intel, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { float src_x[3], src_y[3]; if (!intel_uxa_get_transformed_coordinates(srcX, srcY, intel->transform[0], &src_x[0], &src_y[0])) return; if (!intel_uxa_get_transformed_coordinates(srcX, srcY + h, intel->transform[0], &src_x[1], &src_y[1])) return; if (!intel_uxa_get_transformed_coordinates(srcX + w, srcY + h, intel->transform[0], &src_x[2], &src_y[2])) return; OUT_VERTEX(dstX + w); OUT_VERTEX(dstY + h); OUT_VERTEX(src_x[2] * intel->scale_units[0][0]); OUT_VERTEX(src_y[2] * intel->scale_units[0][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY + h); OUT_VERTEX(src_x[1] * intel->scale_units[0][0]); OUT_VERTEX(src_y[1] * intel->scale_units[0][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY); OUT_VERTEX(src_x[0] * intel->scale_units[0][0]); OUT_VERTEX(src_y[0] * intel->scale_units[0][1]); } static void i915_emit_composite_primitive_identity_source_mask(intel_screen_private *intel, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { OUT_VERTEX(dstX + w); OUT_VERTEX(dstY + h); OUT_VERTEX((srcX + w) * intel->scale_units[0][0]); OUT_VERTEX((srcY + h) * intel->scale_units[0][1]); OUT_VERTEX((maskX + w) * intel->scale_units[1][0]); OUT_VERTEX((maskY + h) * intel->scale_units[1][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY + h); OUT_VERTEX(srcX * intel->scale_units[0][0]); OUT_VERTEX((srcY + h) * intel->scale_units[0][1]); OUT_VERTEX(maskX * intel->scale_units[1][0]); OUT_VERTEX((maskY + h) * intel->scale_units[1][1]); OUT_VERTEX(dstX); OUT_VERTEX(dstY); OUT_VERTEX(srcX * intel->scale_units[0][0]); OUT_VERTEX(srcY * intel->scale_units[0][1]); OUT_VERTEX(maskX * intel->scale_units[1][0]); OUT_VERTEX(maskY * intel->scale_units[1][1]); } static void i915_emit_composite_primitive(intel_screen_private *intel, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { Bool is_affine_src = TRUE, is_affine_mask = TRUE; int tex_unit = 0; int src_unit = -1, mask_unit = -1; float src_x[3], src_y[3], src_w[3], mask_x[3], mask_y[3], mask_w[3]; src_unit = tex_unit++; is_affine_src = intel_uxa_transform_is_affine(intel->transform[src_unit]); if (is_affine_src) { if (!intel_uxa_get_transformed_coordinates(srcX, srcY, intel-> transform[src_unit], &src_x[0], &src_y[0])) return; if (!intel_uxa_get_transformed_coordinates(srcX, srcY + h, intel-> transform[src_unit], &src_x[1], &src_y[1])) return; if (!intel_uxa_get_transformed_coordinates(srcX + w, srcY + h, intel-> transform[src_unit], &src_x[2], &src_y[2])) return; } else { if (!intel_uxa_get_transformed_coordinates_3d(srcX, srcY, intel-> transform[src_unit], &src_x[0], &src_y[0], &src_w[0])) return; if (!intel_uxa_get_transformed_coordinates_3d(srcX, srcY + h, intel-> transform[src_unit], &src_x[1], &src_y[1], &src_w[1])) return; if (!intel_uxa_get_transformed_coordinates_3d(srcX + w, srcY + h, intel-> transform[src_unit], &src_x[2], &src_y[2], &src_w[2])) return; } if (intel->render_mask) { mask_unit = tex_unit++; is_affine_mask = intel_uxa_transform_is_affine(intel->transform[mask_unit]); if (is_affine_mask) { if (!intel_uxa_get_transformed_coordinates(maskX, maskY, intel-> transform[mask_unit], &mask_x[0], &mask_y[0])) return; if (!intel_uxa_get_transformed_coordinates(maskX, maskY + h, intel-> transform[mask_unit], &mask_x[1], &mask_y[1])) return; if (!intel_uxa_get_transformed_coordinates(maskX + w, maskY + h, intel-> transform[mask_unit], &mask_x[2], &mask_y[2])) return; } else { if (!intel_uxa_get_transformed_coordinates_3d(maskX, maskY, intel-> transform[mask_unit], &mask_x[0], &mask_y[0], &mask_w[0])) return; if (!intel_uxa_get_transformed_coordinates_3d(maskX, maskY + h, intel-> transform[mask_unit], &mask_x[1], &mask_y[1], &mask_w[1])) return; if (!intel_uxa_get_transformed_coordinates_3d(maskX + w, maskY + h, intel-> transform[mask_unit], &mask_x[2], &mask_y[2], &mask_w[2])) return; } } OUT_VERTEX(dstX + w); OUT_VERTEX(dstY + h); OUT_VERTEX(src_x[2] * intel->scale_units[src_unit][0]); OUT_VERTEX(src_y[2] * intel->scale_units[src_unit][1]); if (!is_affine_src) { OUT_VERTEX(0.0); OUT_VERTEX(src_w[2]); } if (intel->render_mask) { OUT_VERTEX(mask_x[2] * intel->scale_units[mask_unit][0]); OUT_VERTEX(mask_y[2] * intel->scale_units[mask_unit][1]); if (!is_affine_mask) { OUT_VERTEX(0.0); OUT_VERTEX(mask_w[2]); } } OUT_VERTEX(dstX); OUT_VERTEX(dstY + h); OUT_VERTEX(src_x[1] * intel->scale_units[src_unit][0]); OUT_VERTEX(src_y[1] * intel->scale_units[src_unit][1]); if (!is_affine_src) { OUT_VERTEX(0.0); OUT_VERTEX(src_w[1]); } if (intel->render_mask) { OUT_VERTEX(mask_x[1] * intel->scale_units[mask_unit][0]); OUT_VERTEX(mask_y[1] * intel->scale_units[mask_unit][1]); if (!is_affine_mask) { OUT_VERTEX(0.0); OUT_VERTEX(mask_w[1]); } } OUT_VERTEX(dstX); OUT_VERTEX(dstY); OUT_VERTEX(src_x[0] * intel->scale_units[src_unit][0]); OUT_VERTEX(src_y[0] * intel->scale_units[src_unit][1]); if (!is_affine_src) { OUT_VERTEX(0.0); OUT_VERTEX(src_w[0]); } if (intel->render_mask) { OUT_VERTEX(mask_x[0] * intel->scale_units[mask_unit][0]); OUT_VERTEX(mask_y[0] * intel->scale_units[mask_unit][1]); if (!is_affine_mask) { OUT_VERTEX(0.0); OUT_VERTEX(mask_w[0]); } } } Bool i915_prepare_composite(int op, PicturePtr source_picture, PicturePtr mask_picture, PicturePtr dest_picture, PixmapPtr source, PixmapPtr mask, PixmapPtr dest) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest_picture->pDrawable->pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); drm_intel_bo *bo_table[] = { NULL, /* batch_bo */ intel_uxa_get_pixmap_bo(dest), intel_uxa_get_pixmap_bo(source), mask ? intel_uxa_get_pixmap_bo(mask) : NULL, }; int tex_unit = 0; int floats_per_vertex; intel->render_source_picture = source_picture; intel->render_source = source; intel->render_mask_picture = mask_picture; intel->render_mask = mask; intel->render_dest_picture = dest_picture; intel->render_dest = dest; if (!intel_uxa_check_pitch_3d(source)) return FALSE; if (mask && !intel_uxa_check_pitch_3d(mask)) return FALSE; if (!intel_uxa_check_pitch_3d(dest)) return FALSE; if (!i915_get_dest_format(dest_picture, &intel->i915_render_state.dst_format)) return FALSE; if (!intel_uxa_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table))) return FALSE; if (mask_picture != NULL && mask_picture->componentAlpha && PICT_FORMAT_RGB(mask_picture->format)) { /* Check if it's component alpha that relies on a source alpha * and on the source value. We can only get one of those * into the single source value that we get to blend with. */ if (i915_blend_op[op].src_alpha && (i915_blend_op[op].src_blend != BLENDFACT_ZERO)) return FALSE; } intel->transform[0] = NULL; intel->scale_units[0][0] = -1; intel->scale_units[0][1] = -1; intel->transform[1] = NULL; intel->scale_units[1][0] = -1; intel->scale_units[1][1] = -1; floats_per_vertex = 2; /* dest x/y */ if (!i915_texture_setup(source_picture, source, tex_unit++)) { intel_uxa_debug_fallback(scrn, "fail to setup src texture\n"); return FALSE; } if (intel_uxa_transform_is_affine(source_picture->transform)) floats_per_vertex += 2; /* src x/y */ else floats_per_vertex += 4; /* src x/y/z/w */ if (mask_picture != NULL) { assert(mask != NULL); if (!i915_texture_setup(mask_picture, mask, tex_unit++)) { intel_uxa_debug_fallback(scrn, "fail to setup mask texture\n"); return FALSE; } if (intel_uxa_transform_is_affine(mask_picture->transform)) floats_per_vertex += 2; /* mask x/y */ else floats_per_vertex += 4; /* mask x/y/z/w */ } intel->i915_render_state.op = op; if (intel_uxa_pixmap_is_dirty(source) || intel_uxa_pixmap_is_dirty(mask)) intel_batch_emit_flush(scrn); intel->needs_render_state_emit = TRUE; intel->prim_emit = i915_emit_composite_primitive; if (!mask) { if (intel->transform[0] == NULL) intel->prim_emit = i915_emit_composite_primitive_identity_source; else if (intel_uxa_transform_is_affine(intel->transform[0])) intel->prim_emit = i915_emit_composite_primitive_affine_source; } else { if (intel->transform[0] == NULL) { if (intel->transform[1] == NULL) intel->prim_emit = i915_emit_composite_primitive_identity_source_mask; } } if (floats_per_vertex != intel->floats_per_vertex) { intel->floats_per_vertex = floats_per_vertex; intel->needs_render_vertex_emit = TRUE; } return TRUE; } static void i915_composite_emit_shader(intel_screen_private *intel, CARD8 op) { PicturePtr mask_picture = intel->render_mask_picture; PixmapPtr mask = intel->render_mask; int src_reg, mask_reg; Bool dest_is_alpha = PIXMAN_FORMAT_RGB(intel->render_dest_picture->format) == 0; FS_LOCALS(); FS_BEGIN(); /* Declare the registers necessary for our program. */ i915_fs_dcl(FS_T0); i915_fs_dcl(FS_S0); if (!mask) { /* No mask, so load directly to output color */ if (dest_is_alpha) src_reg = FS_R0; else src_reg = FS_OC; if (intel_uxa_transform_is_affine(intel->transform[0])) i915_fs_texld(src_reg, FS_S0, FS_T0); else i915_fs_texldp(src_reg, FS_S0, FS_T0); if (src_reg != FS_OC) i915_fs_mov(FS_OC, i915_fs_operand(src_reg, W, W, W, W)); } else { i915_fs_dcl(FS_T1); i915_fs_dcl(FS_S1); /* Load the source_picture texel */ if (intel_uxa_transform_is_affine(intel->transform[0])) i915_fs_texld(FS_R0, FS_S0, FS_T0); else i915_fs_texldp(FS_R0, FS_S0, FS_T0); src_reg = FS_R0; /* Load the mask_picture texel */ if (intel_uxa_transform_is_affine(intel->transform[1])) i915_fs_texld(FS_R1, FS_S1, FS_T1); else i915_fs_texldp(FS_R1, FS_S1, FS_T1); mask_reg = FS_R1; if (dest_is_alpha) { i915_fs_mul(FS_OC, i915_fs_operand(src_reg, W, W, W, W), i915_fs_operand(mask_reg, W, W, W, W)); } else { /* If component alpha is active in the mask and the blend * operation uses the source alpha, then we know we don't * need the source value (otherwise we would have hit a * fallback earlier), so we provide the source alpha (src.A * * mask.X) as output color. * Conversely, if CA is set and we don't need the source alpha, * then we produce the source value (src.X * mask.X) and the * source alpha is unused. Otherwise, we provide the non-CA * source value (src.X * mask.A). */ if (mask_picture->componentAlpha && PICT_FORMAT_RGB(mask_picture->format)) { if (i915_blend_op[op].src_alpha) { i915_fs_mul(FS_OC, i915_fs_operand(src_reg, W, W, W, W), i915_fs_operand_reg(mask_reg)); } else { i915_fs_mul(FS_OC, i915_fs_operand_reg(src_reg), i915_fs_operand_reg(mask_reg)); } } else { i915_fs_mul(FS_OC, i915_fs_operand_reg(src_reg), i915_fs_operand(mask_reg, W, W, W, W)); } } } FS_END(); } static void i915_emit_composite_setup(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); int op = intel->i915_render_state.op; PicturePtr mask_picture = intel->render_mask_picture; PicturePtr dest_picture = intel->render_dest_picture; PixmapPtr mask = intel->render_mask; PixmapPtr dest = intel->render_dest; int tex_count, t; intel->needs_render_state_emit = FALSE; IntelEmitInvarientState(scrn); intel->last_3d = LAST_3D_RENDER; tex_count = 1 + (mask != NULL); assert(intel->in_batch_atomic); if (tex_count != 0) { OUT_BATCH(_3DSTATE_MAP_STATE | (3 * tex_count)); OUT_BATCH((1 << tex_count) - 1); for (t = 0; t < tex_count; t++) { OUT_RELOC_PIXMAP(intel->texture[t], I915_GEM_DOMAIN_SAMPLER, 0, 0); OUT_BATCH(intel->mapstate[3*t + 1]); OUT_BATCH(intel->mapstate[3*t + 2]); } OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3 * tex_count)); OUT_BATCH((1 << tex_count) - 1); for (t = 0; t < tex_count; t++) { OUT_BATCH(intel->samplerstate[3*t + 0]); OUT_BATCH(intel->samplerstate[3*t + 1]); OUT_BATCH(intel->samplerstate[3*t + 2]); } } /* BUF_INFO is an implicit flush, so avoid if the target has not changed. * XXX However for reasons unfathomed, correct rendering in KDE requires * at least a MI_FLUSH | INHIBIT_RENDER_CACHE_FLUSH here. */ if (1) { uint32_t tiling_bits; if (intel_uxa_pixmap_tiled(dest)) { tiling_bits = BUF_3D_TILED_SURFACE; if (intel_uxa_get_pixmap_private(dest)->tiling == I915_TILING_Y) tiling_bits |= BUF_3D_TILE_WALK_Y; } else tiling_bits = 0; OUT_BATCH(_3DSTATE_BUF_INFO_CMD); OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling_bits | BUF_3D_PITCH(intel_pixmap_pitch(dest))); OUT_RELOC_PIXMAP(dest, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD); OUT_BATCH(intel->i915_render_state.dst_format); /* draw rect is unconditional */ OUT_BATCH(_3DSTATE_DRAW_RECT_CMD); OUT_BATCH(0x00000000); OUT_BATCH(0x00000000); /* ymin, xmin */ OUT_BATCH(DRAW_YMAX(dest->drawable.height - 1) | DRAW_XMAX(dest->drawable.width - 1)); /* yorig, xorig (relate to color buffer?) */ OUT_BATCH(0x00000000); } { uint32_t ss2; ss2 = ~0; ss2 &= ~S2_TEXCOORD_FMT(0, TEXCOORDFMT_NOT_PRESENT); ss2 |= S2_TEXCOORD_FMT(0, intel_uxa_transform_is_affine(intel->transform[0]) ? TEXCOORDFMT_2D : TEXCOORDFMT_4D); if (mask) { ss2 &= ~S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT); ss2 |= S2_TEXCOORD_FMT(1, intel_uxa_transform_is_affine(intel->transform[1]) ? TEXCOORDFMT_2D : TEXCOORDFMT_4D); } OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(6) | 1); OUT_BATCH(ss2); OUT_BATCH(i915_get_blend_cntl(op, mask_picture, dest_picture->format)); } i915_composite_emit_shader(intel, op); } void i915_composite(PixmapPtr dest, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); /* 28 + 16 + 10 + 20 + 32 + 16 */ intel_batch_start_atomic(scrn, 150); if (intel->needs_render_state_emit) i915_emit_composite_setup(scrn); if (intel->needs_render_vertex_emit || intel_vertex_space(intel) < 3*4*intel->floats_per_vertex) { i915_vertex_flush(intel); if (intel_vertex_space(intel) < 256) { intel_next_vertex(intel); OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(0) | I1_LOAD_S(1) | 1); OUT_RELOC(intel->vertex_bo, I915_GEM_DOMAIN_VERTEX, 0, 0); OUT_BATCH((intel->floats_per_vertex << S1_VERTEX_WIDTH_SHIFT) | (intel->floats_per_vertex << S1_VERTEX_PITCH_SHIFT)); intel->vertex_index = 0; } else if (intel->floats_per_vertex != intel->last_floats_per_vertex){ OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(1) | 0); OUT_BATCH((intel->floats_per_vertex << S1_VERTEX_WIDTH_SHIFT) | (intel->floats_per_vertex << S1_VERTEX_PITCH_SHIFT)); intel->vertex_index = (intel->vertex_used + intel->floats_per_vertex - 1) / intel->floats_per_vertex; intel->vertex_used = intel->vertex_index * intel->floats_per_vertex; } intel->last_floats_per_vertex = intel->floats_per_vertex; intel->needs_render_vertex_emit = FALSE; } if (intel->prim_offset == 0) { intel->prim_offset = intel->batch_used; OUT_BATCH(PRIM3D_RECTLIST | PRIM3D_INDIRECT_SEQUENTIAL); OUT_BATCH(intel->vertex_index); } intel->vertex_count += 3; intel->prim_emit(intel, srcX, srcY, maskX, maskY, dstX, dstY, w, h); intel_batch_end_atomic(scrn); } void i915_vertex_flush(intel_screen_private *intel) { if (intel->prim_offset == 0) return; intel->batch_ptr[intel->prim_offset] |= intel->vertex_count; intel->prim_offset = 0; intel->vertex_index += intel->vertex_count; intel->vertex_count = 0; } void i915_batch_commit_notify(intel_screen_private *intel) { intel->needs_render_state_emit = TRUE; intel->last_floats_per_vertex = 0; } xf86-video-intel-2.99.917/src/uxa/i830_3d.c0000664000175000017500000001671212432737457014555 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "xorg-server.h" #include "xf86.h" #include "intel.h" #include "intel_uxa.h" #include "i830_reg.h" void I830EmitInvarientState(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); assert(intel->in_batch_atomic); OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(0)); OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(1)); OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(2)); OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(3)); OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_DFLT_Z_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_FOG_MODE_CMD); OUT_BATCH(FOGFUNC_ENABLE | FOG_LINEAR_CONST | FOGSRC_INDEX_Z | ENABLE_FOG_DENSITY); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | MAP_UNIT(0) | DISABLE_TEX_STREAM_BUMP | ENABLE_TEX_STREAM_COORD_SET | TEX_STREAM_COORD_SET(0) | ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(0)); OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | MAP_UNIT(1) | DISABLE_TEX_STREAM_BUMP | ENABLE_TEX_STREAM_COORD_SET | TEX_STREAM_COORD_SET(1) | ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(1)); OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | MAP_UNIT(2) | DISABLE_TEX_STREAM_BUMP | ENABLE_TEX_STREAM_COORD_SET | TEX_STREAM_COORD_SET(2) | ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(2)); OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | MAP_UNIT(3) | DISABLE_TEX_STREAM_BUMP | ENABLE_TEX_STREAM_COORD_SET | TEX_STREAM_COORD_SET(3) | ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(3)); OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM); OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(0)); OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM); OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(1)); OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM); OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(2)); OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM); OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(3)); OUT_BATCH(_3DSTATE_RASTER_RULES_CMD | ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE | ENABLE_LINE_STRIP_PROVOKE_VRTX | ENABLE_TRI_FAN_PROVOKE_VRTX | ENABLE_TRI_STRIP_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) | TRI_FAN_PROVOKE_VRTX(2) | TRI_STRIP_PROVOKE_VRTX(2)); OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(_3DSTATE_VERTEX_TRANSFORM); OUT_BATCH(DISABLE_VIEWPORT_TRANSFORM | DISABLE_PERSPECTIVE_DIVIDE); OUT_BATCH(_3DSTATE_W_STATE_CMD); OUT_BATCH(MAGIC_W_STATE_DWORD1); OUT_BATCH(0x3f800000 /* 1.0 in IEEE float */ ); OUT_BATCH(_3DSTATE_COLOR_FACTOR_CMD); OUT_BATCH(0x80808080); /* .5 required in alpha for GL_DOT3_RGBA_EXT */ OUT_BATCH(_3DSTATE_MAP_COORD_SETBIND_CMD); OUT_BATCH(TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) | TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) | TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) | TEXBIND_SET0(TEXCOORDSRC_VTXSET_0)); /* copy from mesa */ OUT_BATCH(_3DSTATE_INDPT_ALPHA_BLEND_CMD | DISABLE_INDPT_ALPHA_BLEND | ENABLE_ALPHA_BLENDFUNC | ABLENDFUNC_ADD); OUT_BATCH(_3DSTATE_FOG_COLOR_CMD | FOG_COLOR_RED(0) | FOG_COLOR_GREEN(0) | FOG_COLOR_BLUE(0)); OUT_BATCH(_3DSTATE_CONST_BLEND_COLOR_CMD); OUT_BATCH(0); OUT_BATCH(_3DSTATE_MODES_1_CMD | ENABLE_COLR_BLND_FUNC | BLENDFUNC_ADD | ENABLE_SRC_BLND_FACTOR | SRC_BLND_FACT(BLENDFACTOR_ONE) | ENABLE_DST_BLND_FACTOR | DST_BLND_FACT(BLENDFACTOR_ZERO)); OUT_BATCH(_3DSTATE_MODES_2_CMD | ENABLE_GLOBAL_DEPTH_BIAS | GLOBAL_DEPTH_BIAS(0) | ENABLE_ALPHA_TEST_FUNC | ALPHA_TEST_FUNC(0) | /* always */ ALPHA_REF_VALUE(0)); OUT_BATCH(_3DSTATE_MODES_3_CMD | ENABLE_DEPTH_TEST_FUNC | DEPTH_TEST_FUNC(0x2) | /* COMPAREFUNC_LESS */ ENABLE_ALPHA_SHADE_MODE | ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_FOG_SHADE_MODE | FOG_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_SPEC_SHADE_MODE | SPEC_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_COLOR_SHADE_MODE | COLOR_SHADE_MODE(SHADE_MODE_LINEAR) | ENABLE_CULL_MODE | CULLMODE_NONE); OUT_BATCH(_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) | ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff) | ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff)); OUT_BATCH(_3DSTATE_STENCIL_TEST_CMD | ENABLE_STENCIL_PARMS | STENCIL_FAIL_OP(0) | /* STENCILOP_KEEP */ STENCIL_PASS_DEPTH_FAIL_OP(0) | /* STENCILOP_KEEP */ STENCIL_PASS_DEPTH_PASS_OP(0) | /* STENCILOP_KEEP */ ENABLE_STENCIL_TEST_FUNC | STENCIL_TEST_FUNC(0) | /* COMPAREFUNC_ALWAYS */ ENABLE_STENCIL_REF_VALUE | STENCIL_REF_VALUE(0)); OUT_BATCH(_3DSTATE_MODES_5_CMD | FLUSH_TEXTURE_CACHE | ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) | /* 1.0 */ ENABLE_FIXED_POINT_WIDTH | FIXED_POINT_WIDTH(1)); OUT_BATCH(_3DSTATE_ENABLES_1_CMD | DISABLE_LOGIC_OP | DISABLE_STENCIL_TEST | DISABLE_DEPTH_BIAS | DISABLE_SPEC_ADD | DISABLE_FOG | DISABLE_ALPHA_TEST | ENABLE_COLOR_BLEND | DISABLE_DEPTH_TEST); OUT_BATCH(_3DSTATE_ENABLES_2_CMD | DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE | DISABLE_DITHER | ENABLE_COLOR_MASK | ENABLE_COLOR_WRITE | DISABLE_DEPTH_WRITE); OUT_BATCH(_3DSTATE_STIPPLE); /* Set default blend state */ OUT_BATCH(_3DSTATE_MAP_BLEND_OP_CMD(0) | TEXPIPE_COLOR | ENABLE_TEXOUTPUT_WRT_SEL | TEXOP_OUTPUT_CURRENT | DISABLE_TEX_CNTRL_STAGE | TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXOP_LAST_STAGE | TEXBLENDOP_ARG1); OUT_BATCH(_3DSTATE_MAP_BLEND_OP_CMD(0) | TEXPIPE_ALPHA | ENABLE_TEXOUTPUT_WRT_SEL | TEXOP_OUTPUT_CURRENT | TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1); OUT_BATCH(_3DSTATE_MAP_BLEND_ARG_CMD(0) | TEXPIPE_COLOR | TEXBLEND_ARG1 | TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE); OUT_BATCH(_3DSTATE_MAP_BLEND_ARG_CMD(0) | TEXPIPE_ALPHA | TEXBLEND_ARG1 | TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE); OUT_BATCH(_3DSTATE_AA_CMD | AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 | AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0 | AA_LINE_DISABLE); } xf86-video-intel-2.99.917/src/uxa/uxa-unaccel.c0000664000175000017500000003074112400044327015665 00000000000000/* * * Copyright 1999 Keith Packard * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "uxa-priv.h" /* * These functions wrap the low-level fb rendering functions and * synchronize framebuffer/accelerated drawing by stalling until * the accelerator is idle */ /** * Calls uxa_prepare_access with UXA_PREPARE_SRC for the tile, if that is the * current fill style. * * Solid doesn't use an extra pixmap source, and Stippled/OpaqueStippled are * 1bpp and never in fb, so we don't worry about them. * We should worry about them for completeness sake and going forward. */ Bool uxa_prepare_access_gc(GCPtr pGC) { if (pGC->stipple) if (!uxa_prepare_access(&pGC->stipple->drawable, UXA_ACCESS_RO)) return FALSE; if (pGC->fillStyle == FillTiled) if (!uxa_prepare_access (&pGC->tile.pixmap->drawable, UXA_ACCESS_RO)) { if (pGC->stipple) uxa_finish_access(&pGC->stipple->drawable, UXA_ACCESS_RO); return FALSE; } return TRUE; } /** * Finishes access to the tile in the GC, if used. */ void uxa_finish_access_gc(GCPtr pGC) { if (pGC->fillStyle == FillTiled) uxa_finish_access(&pGC->tile.pixmap->drawable, UXA_ACCESS_RO); if (pGC->stipple) uxa_finish_access(&pGC->stipple->drawable, UXA_ACCESS_RO); } Bool uxa_picture_prepare_access(PicturePtr picture, int mode) { if (picture->pDrawable == NULL) return TRUE; if (!uxa_prepare_access(picture->pDrawable, mode)) return FALSE; if (picture->alphaMap && !uxa_prepare_access(picture->alphaMap->pDrawable, mode)) { uxa_finish_access(picture->pDrawable, mode); return FALSE; } return TRUE; } void uxa_picture_finish_access(PicturePtr picture, int mode) { if (picture->pDrawable == NULL) return; uxa_finish_access(picture->pDrawable, mode); if (picture->alphaMap) uxa_finish_access(picture->alphaMap->pDrawable, mode); } char uxa_drawable_location(DrawablePtr pDrawable) { return uxa_drawable_is_offscreen(pDrawable) ? 's' : 'm'; } void uxa_check_fill_spans(DrawablePtr pDrawable, GCPtr pGC, int nspans, DDXPointPtr ppt, int *pwidth, int fSorted) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("to %p (%c)\n", pDrawable, uxa_drawable_location(pDrawable))); if (uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) { if (uxa_prepare_access_gc(pGC)) { fbFillSpans(pDrawable, pGC, nspans, ppt, pwidth, fSorted); uxa_finish_access_gc(pGC); } uxa_finish_access(pDrawable, UXA_ACCESS_RW); } } void uxa_check_set_spans(DrawablePtr pDrawable, GCPtr pGC, char *psrc, DDXPointPtr ppt, int *pwidth, int nspans, int fSorted) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("to %p (%c)\n", pDrawable, uxa_drawable_location(pDrawable))); if (uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) { fbSetSpans(pDrawable, pGC, psrc, ppt, pwidth, nspans, fSorted); uxa_finish_access(pDrawable, UXA_ACCESS_RW); } } void uxa_check_put_image(DrawablePtr pDrawable, GCPtr pGC, int depth, int x, int y, int w, int h, int leftPad, int format, char *bits) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("to %p (%c)\n", pDrawable, uxa_drawable_location(pDrawable))); if (uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) { fbPutImage(pDrawable, pGC, depth, x, y, w, h, leftPad, format, bits); uxa_finish_access(pDrawable, UXA_ACCESS_RW); } } RegionPtr uxa_check_copy_area(DrawablePtr pSrc, DrawablePtr pDst, GCPtr pGC, int srcx, int srcy, int w, int h, int dstx, int dsty) { ScreenPtr screen = pSrc->pScreen; RegionPtr ret = NULL; UXA_FALLBACK(("from %p to %p (%c,%c)\n", pSrc, pDst, uxa_drawable_location(pSrc), uxa_drawable_location(pDst))); if (uxa_prepare_access(pDst, UXA_ACCESS_RW)) { if (uxa_prepare_access(pSrc, UXA_ACCESS_RO)) { ret = fbCopyArea(pSrc, pDst, pGC, srcx, srcy, w, h, dstx, dsty); uxa_finish_access(pSrc, UXA_ACCESS_RO); } uxa_finish_access(pDst, UXA_ACCESS_RW); } return ret; } RegionPtr uxa_check_copy_plane(DrawablePtr pSrc, DrawablePtr pDst, GCPtr pGC, int srcx, int srcy, int w, int h, int dstx, int dsty, unsigned long bitPlane) { ScreenPtr screen = pSrc->pScreen; RegionPtr ret = NULL; UXA_FALLBACK(("from %p to %p (%c,%c)\n", pSrc, pDst, uxa_drawable_location(pSrc), uxa_drawable_location(pDst))); if (uxa_prepare_access(pDst, UXA_ACCESS_RW)) { if (uxa_prepare_access(pSrc, UXA_ACCESS_RO)) { ret = fbCopyPlane(pSrc, pDst, pGC, srcx, srcy, w, h, dstx, dsty, bitPlane); uxa_finish_access(pSrc, UXA_ACCESS_RO); } uxa_finish_access(pDst, UXA_ACCESS_RW); } return ret; } void uxa_check_poly_point(DrawablePtr pDrawable, GCPtr pGC, int mode, int npt, DDXPointPtr pptInit) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("to %p (%c)\n", pDrawable, uxa_drawable_location(pDrawable))); if (uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) { fbPolyPoint(pDrawable, pGC, mode, npt, pptInit); uxa_finish_access(pDrawable, UXA_ACCESS_RW); } } void uxa_check_poly_lines(DrawablePtr pDrawable, GCPtr pGC, int mode, int npt, DDXPointPtr ppt) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("to %p (%c), width %d, mode %d, count %d\n", pDrawable, uxa_drawable_location(pDrawable), pGC->lineWidth, mode, npt)); if (pGC->lineWidth == 0) { if (uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) { if (uxa_prepare_access_gc(pGC)) { fbPolyLine(pDrawable, pGC, mode, npt, ppt); uxa_finish_access_gc(pGC); } uxa_finish_access(pDrawable, UXA_ACCESS_RW); } return; } /* fb calls mi functions in the lineWidth != 0 case. */ fbPolyLine(pDrawable, pGC, mode, npt, ppt); } void uxa_check_poly_segment(DrawablePtr pDrawable, GCPtr pGC, int nsegInit, xSegment * pSegInit) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("to %p (%c) width %d, count %d\n", pDrawable, uxa_drawable_location(pDrawable), pGC->lineWidth, nsegInit)); if (pGC->lineWidth == 0) { if (uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) { if (uxa_prepare_access_gc(pGC)) { fbPolySegment(pDrawable, pGC, nsegInit, pSegInit); uxa_finish_access_gc(pGC); } uxa_finish_access(pDrawable, UXA_ACCESS_RW); } return; } /* fb calls mi functions in the lineWidth != 0 case. */ fbPolySegment(pDrawable, pGC, nsegInit, pSegInit); } void uxa_check_poly_arc(DrawablePtr pDrawable, GCPtr pGC, int narcs, xArc * pArcs) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("to %p (%c)\n", pDrawable, uxa_drawable_location(pDrawable))); /* Disable this as fbPolyArc can call miZeroPolyArc which in turn * can call accelerated functions, that as yet, haven't been notified * with uxa_finish_access(). */ #if 0 if (pGC->lineWidth == 0) { if (uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) { if (uxa_prepare_access_gc(pGC)) { fbPolyArc(pDrawable, pGC, narcs, pArcs); uxa_finish_access_gc(pGC); } uxa_finish_access(pDrawable, UXA_ACCESS_RW); } return; } #endif miPolyArc(pDrawable, pGC, narcs, pArcs); } void uxa_check_poly_fill_rect(DrawablePtr pDrawable, GCPtr pGC, int nrect, xRectangle * prect) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("to %p (%c)\n", pDrawable, uxa_drawable_location(pDrawable))); if (uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) { if (uxa_prepare_access_gc(pGC)) { fbPolyFillRect(pDrawable, pGC, nrect, prect); uxa_finish_access_gc(pGC); } uxa_finish_access(pDrawable, UXA_ACCESS_RW); } } void uxa_check_image_glyph_blt(DrawablePtr pDrawable, GCPtr pGC, int x, int y, unsigned int nglyph, CharInfoPtr * ppci, pointer pglyphBase) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("to %p (%c)\n", pDrawable, uxa_drawable_location(pDrawable))); if (uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) { if (uxa_prepare_access_gc(pGC)) { fbImageGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase); uxa_finish_access_gc(pGC); } uxa_finish_access(pDrawable, UXA_ACCESS_RW); } } void uxa_check_poly_glyph_blt(DrawablePtr pDrawable, GCPtr pGC, int x, int y, unsigned int nglyph, CharInfoPtr * ppci, pointer pglyphBase) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("to %p (%c), style %d alu %d\n", pDrawable, uxa_drawable_location(pDrawable), pGC->fillStyle, pGC->alu)); if (uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) { if (uxa_prepare_access_gc(pGC)) { fbPolyGlyphBlt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase); uxa_finish_access_gc(pGC); } uxa_finish_access(pDrawable, UXA_ACCESS_RW); } } void uxa_check_push_pixels(GCPtr pGC, PixmapPtr pBitmap, DrawablePtr pDrawable, int w, int h, int x, int y) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("from %p to %p (%c,%c)\n", pBitmap, pDrawable, uxa_drawable_location(&pBitmap->drawable), uxa_drawable_location(pDrawable))); if (uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) { if (uxa_prepare_access(&pBitmap->drawable, UXA_ACCESS_RO)) { if (uxa_prepare_access_gc(pGC)) { fbPushPixels(pGC, pBitmap, pDrawable, w, h, x, y); uxa_finish_access_gc(pGC); } uxa_finish_access(&pBitmap->drawable, UXA_ACCESS_RO); } uxa_finish_access(pDrawable, UXA_ACCESS_RW); } } void uxa_check_get_spans(DrawablePtr pDrawable, int wMax, DDXPointPtr ppt, int *pwidth, int nspans, char *pdstStart) { ScreenPtr screen = pDrawable->pScreen; UXA_FALLBACK(("from %p (%c)\n", pDrawable, uxa_drawable_location(pDrawable))); if (uxa_prepare_access(pDrawable, UXA_ACCESS_RO)) { fbGetSpans(pDrawable, wMax, ppt, pwidth, nspans, pdstStart); uxa_finish_access(pDrawable, UXA_ACCESS_RO); } } void uxa_check_composite(CARD8 op, PicturePtr pSrc, PicturePtr pMask, PicturePtr pDst, INT16 xSrc, INT16 ySrc, INT16 xMask, INT16 yMask, INT16 xDst, INT16 yDst, CARD16 width, CARD16 height) { ScreenPtr screen = pDst->pDrawable->pScreen; UXA_FALLBACK(("from picts %p/%p to pict %p\n", pSrc, pMask, pDst)); if (uxa_picture_prepare_access(pDst, UXA_ACCESS_RW)) { if (uxa_picture_prepare_access(pSrc, UXA_ACCESS_RO)) { if (!pMask || uxa_picture_prepare_access(pMask, UXA_ACCESS_RO)) { fbComposite(op, pSrc, pMask, pDst, xSrc, ySrc, xMask, yMask, xDst, yDst, width, height); if (pMask) uxa_picture_finish_access(pMask, UXA_ACCESS_RO); } uxa_picture_finish_access(pSrc, UXA_ACCESS_RO); } uxa_picture_finish_access(pDst, UXA_ACCESS_RW); } } void uxa_check_add_traps(PicturePtr pPicture, INT16 x_off, INT16 y_off, int ntrap, xTrap * traps) { ScreenPtr screen = pPicture->pDrawable->pScreen; UXA_FALLBACK(("to pict %p (%c)\n", pPicture, uxa_drawable_location(pPicture->pDrawable))); if (uxa_picture_prepare_access(pPicture, UXA_ACCESS_RW)) { fbAddTraps(pPicture, x_off, y_off, ntrap, traps); uxa_picture_finish_access(pPicture, UXA_ACCESS_RW); } } /** * Gets the 0,0 pixel of a pixmap. Used for doing solid fills of tiled pixmaps * that happen to be 1x1. Pixmap must be at least 8bpp. * * XXX This really belongs in fb, so it can be aware of tiling and etc. */ CARD32 uxa_get_pixmap_first_pixel(PixmapPtr pPixmap) { CARD32 pixel; void *fb; if (!uxa_prepare_access(&pPixmap->drawable, UXA_ACCESS_RO)) return 0; fb = pPixmap->devPrivate.ptr; switch (pPixmap->drawable.bitsPerPixel) { case 32: pixel = *(CARD32 *) fb; break; case 16: pixel = *(CARD16 *) fb; break; default: pixel = *(CARD8 *) fb; break; } uxa_finish_access(&pPixmap->drawable, UXA_ACCESS_RO); return pixel; } xf86-video-intel-2.99.917/src/uxa/uxa-accel.c0000664000175000017500000006653312432737457015354 00000000000000 /* * Copyright ® 2001 Keith Packard * * Partly based on code that is Copyright ® The XFree86 Project Inc. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. * * Authors: * Eric Anholt * Michel Dänzer * */ #ifdef HAVE_DIX_CONFIG_H #include #endif #include "uxa-priv.h" #include #include "dixfontstr.h" #include "uxa.h" static void uxa_fill_spans(DrawablePtr pDrawable, GCPtr pGC, int n, DDXPointPtr ppt, int *pwidth, int fSorted) { ScreenPtr screen = pDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(screen); RegionPtr pClip = fbGetCompositeClip(pGC); PixmapPtr dst_pixmap; BoxPtr pbox; int nbox; int x1, x2, y; int off_x, off_y; if (uxa_screen->force_fallback) goto fallback; if (pGC->fillStyle != FillSolid) goto fallback; dst_pixmap = uxa_get_offscreen_pixmap(pDrawable, &off_x, &off_y); if (!dst_pixmap) goto fallback; if (uxa_screen->info->check_solid && !uxa_screen->info->check_solid(pDrawable, pGC->alu, pGC->planemask)) goto fallback; if (!(*uxa_screen->info->prepare_solid) (dst_pixmap, pGC->alu, pGC->planemask, pGC->fgPixel)) goto fallback; while (n--) { x1 = ppt->x; y = ppt->y; x2 = x1 + (int)*pwidth; ppt++; pwidth++; nbox = REGION_NUM_RECTS(pClip); pbox = REGION_RECTS(pClip); while (nbox--) { int X1 = x1, X2 = x2; if (X1 < pbox->x1) X1 = pbox->x1; if (X2 > pbox->x2) X2 = pbox->x2; if (X2 > X1 && pbox->y1 <= y && pbox->y2 > y) (*uxa_screen->info->solid) (dst_pixmap, X1 + off_x, y + off_y, X2 + off_x, y + 1 + off_y); pbox++; } } (*uxa_screen->info->done_solid) (dst_pixmap); return; fallback: uxa_check_fill_spans(pDrawable, pGC, n, ppt, pwidth, fSorted); } static Bool uxa_do_put_image(DrawablePtr pDrawable, GCPtr pGC, int depth, int x, int y, int w, int h, int format, char *bits, int src_stride) { uxa_screen_t *uxa_screen = uxa_get_screen(pDrawable->pScreen); PixmapPtr pPix; RegionPtr pClip; BoxPtr pbox; int nbox; int xoff, yoff; int bpp = pDrawable->bitsPerPixel; /* Don't bother with under 8bpp, XYPixmaps. */ if (format != ZPixmap || bpp < 8) return FALSE; if (uxa_screen->force_fallback) return FALSE; if (!uxa_screen->info->put_image) return FALSE; /* Only accelerate copies: no rop or planemask. */ if (!UXA_PM_IS_SOLID(pDrawable, pGC->planemask) || pGC->alu != GXcopy) return FALSE; pPix = uxa_get_offscreen_pixmap(pDrawable, &xoff, &yoff); if (!pPix) return FALSE; x += pDrawable->x; y += pDrawable->y; pClip = fbGetCompositeClip(pGC); for (nbox = REGION_NUM_RECTS(pClip), pbox = REGION_RECTS(pClip); nbox--; pbox++) { int x1 = x; int y1 = y; int x2 = x + w; int y2 = y + h; char *src; Bool ok; if (x1 < pbox->x1) x1 = pbox->x1; if (y1 < pbox->y1) y1 = pbox->y1; if (x2 > pbox->x2) x2 = pbox->x2; if (y2 > pbox->y2) y2 = pbox->y2; if (x1 >= x2 || y1 >= y2) continue; src = bits + (y1 - y) * src_stride + (x1 - x) * (bpp / 8); ok = uxa_screen->info->put_image(pPix, x1 + xoff, y1 + yoff, x2 - x1, y2 - y1, src, src_stride); /* If we fail to accelerate the upload, fall back to using * unaccelerated fb calls. */ if (!ok) { FbStip *dst; FbStride dst_stride; int dstBpp; int dstXoff, dstYoff; if (!uxa_prepare_access(pDrawable, UXA_ACCESS_RW)) return FALSE; fbGetStipDrawable(pDrawable, dst, dst_stride, dstBpp, dstXoff, dstYoff); fbBltStip((FbStip *) bits + (y1 - y) * (src_stride / sizeof(FbStip)), src_stride / sizeof(FbStip), (x1 - x) * dstBpp, dst + (y1 + dstYoff) * dst_stride, dst_stride, (x1 + dstXoff) * dstBpp, (x2 - x1) * dstBpp, y2 - y1, GXcopy, FB_ALLONES, dstBpp); uxa_finish_access(pDrawable, UXA_ACCESS_RW); } } return TRUE; } static void uxa_put_image(DrawablePtr pDrawable, GCPtr pGC, int depth, int x, int y, int w, int h, int leftPad, int format, char *bits) { if (!uxa_do_put_image(pDrawable, pGC, depth, x, y, w, h, format, bits, PixmapBytePad(w, pDrawable->depth))) { uxa_check_put_image(pDrawable, pGC, depth, x, y, w, h, leftPad, format, bits); } } static inline Bool uxa_copy_n_to_n_two_dir(DrawablePtr pSrcDrawable, DrawablePtr pDstDrawable, GCPtr pGC, BoxPtr pbox, int nbox, int dx, int dy) { uxa_screen_t *uxa_screen = uxa_get_screen(pDstDrawable->pScreen); PixmapPtr pSrcPixmap, pDstPixmap; int src_off_x, src_off_y, dst_off_x, dst_off_y; int dirsetup; /* Need to get both pixmaps to call the driver routines */ pSrcPixmap = uxa_get_offscreen_pixmap(pSrcDrawable, &src_off_x, &src_off_y); pDstPixmap = uxa_get_offscreen_pixmap(pDstDrawable, &dst_off_x, &dst_off_y); if (!pSrcPixmap || !pDstPixmap) return FALSE; /* * Now the case of a chip that only supports xdir = ydir = 1 or * xdir = ydir = -1, but we have xdir != ydir. */ dirsetup = 0; /* No direction set up yet. */ for (; nbox; pbox++, nbox--) { if (dx >= 0 && (src_off_y + pbox->y1 + dy) != pbox->y1) { /* Do a xdir = ydir = -1 blit instead. */ if (dirsetup != -1) { if (dirsetup != 0) uxa_screen->info->done_copy(pDstPixmap); dirsetup = -1; if (!(*uxa_screen->info->prepare_copy) (pSrcPixmap, pDstPixmap, -1, -1, pGC ? pGC->alu : GXcopy, pGC ? pGC->planemask : FB_ALLONES)) return FALSE; } (*uxa_screen->info->copy) (pDstPixmap, src_off_x + pbox->x1 + dx, src_off_y + pbox->y1 + dy, dst_off_x + pbox->x1, dst_off_y + pbox->y1, pbox->x2 - pbox->x1, pbox->y2 - pbox->y1); } else if (dx < 0 && (src_off_y + pbox->y1 + dy) != pbox->y1) { /* Do a xdir = ydir = 1 blit instead. */ if (dirsetup != 1) { if (dirsetup != 0) uxa_screen->info->done_copy(pDstPixmap); dirsetup = 1; if (!(*uxa_screen->info->prepare_copy) (pSrcPixmap, pDstPixmap, 1, 1, pGC ? pGC->alu : GXcopy, pGC ? pGC->planemask : FB_ALLONES)) return FALSE; } (*uxa_screen->info->copy) (pDstPixmap, src_off_x + pbox->x1 + dx, src_off_y + pbox->y1 + dy, dst_off_x + pbox->x1, dst_off_y + pbox->y1, pbox->x2 - pbox->x1, pbox->y2 - pbox->y1); } else if (dx >= 0) { /* * xdir = 1, ydir = -1. * Perform line-by-line xdir = ydir = 1 blits, going up. */ int i; if (dirsetup != 1) { if (dirsetup != 0) uxa_screen->info->done_copy(pDstPixmap); dirsetup = 1; if (!(*uxa_screen->info->prepare_copy) (pSrcPixmap, pDstPixmap, 1, 1, pGC ? pGC->alu : GXcopy, pGC ? pGC->planemask : FB_ALLONES)) return FALSE; } for (i = pbox->y2 - pbox->y1 - 1; i >= 0; i--) (*uxa_screen->info->copy) (pDstPixmap, src_off_x + pbox->x1 + dx, src_off_y + pbox->y1 + dy + i, dst_off_x + pbox->x1, dst_off_y + pbox->y1 + i, pbox->x2 - pbox->x1, 1); } else { /* * xdir = -1, ydir = 1. * Perform line-by-line xdir = ydir = -1 blits, * going down. */ int i; if (dirsetup != -1) { if (dirsetup != 0) uxa_screen->info->done_copy(pDstPixmap); dirsetup = -1; if (!(*uxa_screen->info->prepare_copy) (pSrcPixmap, pDstPixmap, -1, -1, pGC ? pGC->alu : GXcopy, pGC ? pGC->planemask : FB_ALLONES)) return FALSE; } for (i = 0; i < pbox->y2 - pbox->y1; i++) (*uxa_screen->info->copy) (pDstPixmap, src_off_x + pbox->x1 + dx, src_off_y + pbox->y1 + dy + i, dst_off_x + pbox->x1, dst_off_y + pbox->y1 + i, pbox->x2 - pbox->x1, 1); } } if (dirsetup != 0) uxa_screen->info->done_copy(pDstPixmap); return TRUE; } void uxa_copy_n_to_n(DrawablePtr pSrcDrawable, DrawablePtr pDstDrawable, GCPtr pGC, BoxPtr pbox, int nbox, int dx, int dy, Bool reverse, Bool upsidedown, Pixel bitplane, void *closure) { ScreenPtr screen = pDstDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(screen); int src_off_x, src_off_y; int dst_off_x, dst_off_y; PixmapPtr pSrcPixmap, pDstPixmap; if (uxa_screen->force_fallback) goto fallback; pSrcPixmap = uxa_get_drawable_pixmap(pSrcDrawable); pDstPixmap = uxa_get_drawable_pixmap(pDstDrawable); if (!pSrcPixmap || !pDstPixmap) goto fallback; if (uxa_screen->info->check_copy && !uxa_screen->info->check_copy(pSrcPixmap, pDstPixmap, pGC ? pGC->alu : GXcopy, pGC ? pGC->planemask : FB_ALLONES)) goto fallback; uxa_get_drawable_deltas(pSrcDrawable, pSrcPixmap, &src_off_x, &src_off_y); uxa_get_drawable_deltas(pDstDrawable, pDstPixmap, &dst_off_x, &dst_off_y); /* Mixed directions must be handled specially if the card is lame */ if ((uxa_screen->info->flags & UXA_TWO_BITBLT_DIRECTIONS) && reverse != upsidedown) { if (uxa_copy_n_to_n_two_dir (pSrcDrawable, pDstDrawable, pGC, pbox, nbox, dx, dy)) return; goto fallback; } if (!uxa_pixmap_is_offscreen(pDstPixmap)) { int stride, bpp; char *dst; if (!uxa_pixmap_is_offscreen(pSrcPixmap)) goto fallback; if (!uxa_screen->info->get_image) goto fallback; /* Don't bother with under 8bpp, XYPixmaps. */ bpp = pSrcPixmap->drawable.bitsPerPixel; if (bpp != pDstDrawable->bitsPerPixel || bpp < 8) goto fallback; /* Only accelerate copies: no rop or planemask. */ if (pGC && (!UXA_PM_IS_SOLID(pSrcDrawable, pGC->planemask) || pGC->alu != GXcopy)) goto fallback; dst = pDstPixmap->devPrivate.ptr; stride = pDstPixmap->devKind; bpp /= 8; while (nbox--) { if (!uxa_screen->info->get_image(pSrcPixmap, pbox->x1 + dx + src_off_x, pbox->y1 + dy + src_off_y, pbox->x2 - pbox->x1, pbox->y2 - pbox->y1, (char *) dst + (pbox->y1 + dst_off_y) * stride + (pbox->x1 + dst_off_x) * bpp, stride)) goto fallback; pbox++; } return; } if (uxa_pixmap_is_offscreen(pSrcPixmap)) { if (!(*uxa_screen->info->prepare_copy) (pSrcPixmap, pDstPixmap, reverse ? -1 : 1, upsidedown ? -1 : 1, pGC ? pGC->alu : GXcopy, pGC ? pGC-> planemask : FB_ALLONES)) goto fallback; while (nbox--) { (*uxa_screen->info->copy) (pDstPixmap, pbox->x1 + dx + src_off_x, pbox->y1 + dy + src_off_y, pbox->x1 + dst_off_x, pbox->y1 + dst_off_y, pbox->x2 - pbox->x1, pbox->y2 - pbox->y1); pbox++; } (*uxa_screen->info->done_copy) (pDstPixmap); } else { int stride, bpp; char *src; if (!uxa_screen->info->put_image) goto fallback; /* Don't bother with under 8bpp, XYPixmaps. */ bpp = pSrcPixmap->drawable.bitsPerPixel; if (bpp != pDstDrawable->bitsPerPixel || bpp < 8) goto fallback; /* Only accelerate copies: no rop or planemask. */ if (pGC && (!UXA_PM_IS_SOLID(pSrcDrawable, pGC->planemask) || pGC->alu != GXcopy)) goto fallback; src = pSrcPixmap->devPrivate.ptr; stride = pSrcPixmap->devKind; bpp /= 8; while (nbox--) { if (!uxa_screen->info->put_image(pDstPixmap, pbox->x1 + dst_off_x, pbox->y1 + dst_off_y, pbox->x2 - pbox->x1, pbox->y2 - pbox->y1, (char *) src + (pbox->y1 + dy + src_off_y) * stride + (pbox->x1 + dx + src_off_x) * bpp, stride)) goto fallback; pbox++; } } return; fallback: UXA_FALLBACK(("from %p to %p (%c,%c)\n", pSrcDrawable, pDstDrawable, uxa_drawable_location(pSrcDrawable), uxa_drawable_location(pDstDrawable))); if (uxa_prepare_access(pDstDrawable, UXA_ACCESS_RW)) { if (pSrcDrawable == pDstDrawable || uxa_prepare_access(pSrcDrawable, UXA_ACCESS_RO)) { fbCopyNtoN(pSrcDrawable, pDstDrawable, pGC, pbox, nbox, dx, dy, reverse, upsidedown, bitplane, closure); if (pSrcDrawable != pDstDrawable) uxa_finish_access(pSrcDrawable, UXA_ACCESS_RO); } uxa_finish_access(pDstDrawable, UXA_ACCESS_RW); } } RegionPtr uxa_copy_area(DrawablePtr pSrcDrawable, DrawablePtr pDstDrawable, GCPtr pGC, int srcx, int srcy, int width, int height, int dstx, int dsty) { uxa_screen_t *uxa_screen = uxa_get_screen(pDstDrawable->pScreen); if (uxa_screen->force_fallback) { return uxa_check_copy_area(pSrcDrawable, pDstDrawable, pGC, srcx, srcy, width, height, dstx, dsty); } return miDoCopy(pSrcDrawable, pDstDrawable, pGC, srcx, srcy, width, height, dstx, dsty, uxa_copy_n_to_n, 0, NULL); } static void uxa_poly_point(DrawablePtr pDrawable, GCPtr pGC, int mode, int npt, DDXPointPtr ppt) { int i; xRectangle *prect; /* If we can't reuse the current GC as is, don't bother accelerating the * points. */ if (pGC->fillStyle != FillSolid) { uxa_check_poly_point(pDrawable, pGC, mode, npt, ppt); return; } prect = malloc(sizeof(xRectangle) * npt); if (!prect) return; for (i = 0; i < npt; i++) { prect[i].x = ppt[i].x; prect[i].y = ppt[i].y; if (i > 0 && mode == CoordModePrevious) { prect[i].x += prect[i - 1].x; prect[i].y += prect[i - 1].y; } prect[i].width = 1; prect[i].height = 1; } pGC->ops->PolyFillRect(pDrawable, pGC, npt, prect); free(prect); } /** * uxa_poly_lines() checks if it can accelerate the lines as a group of * horizontal or vertical lines (rectangles), and uses existing rectangle fill * acceleration if so. */ static void uxa_poly_lines(DrawablePtr pDrawable, GCPtr pGC, int mode, int npt, DDXPointPtr ppt) { xRectangle *prect; int x1, x2, y1, y2; int i; /* Don't try to do wide lines or non-solid fill style. */ if (pGC->lineWidth != 0 || pGC->lineStyle != LineSolid || pGC->fillStyle != FillSolid) { uxa_check_poly_lines(pDrawable, pGC, mode, npt, ppt); return; } prect = malloc(sizeof(xRectangle) * (npt - 1)); if (!prect) return; x1 = ppt[0].x; y1 = ppt[0].y; /* If we have any non-horizontal/vertical, fall back. */ for (i = 0; i < npt - 1; i++) { if (mode == CoordModePrevious) { x2 = x1 + ppt[i + 1].x; y2 = y1 + ppt[i + 1].y; } else { x2 = ppt[i + 1].x; y2 = ppt[i + 1].y; } if (x1 != x2 && y1 != y2) { free(prect); uxa_check_poly_lines(pDrawable, pGC, mode, npt, ppt); return; } if (x1 < x2) { prect[i].x = x1; prect[i].width = x2 - x1 + 1; } else { prect[i].x = x2; prect[i].width = x1 - x2 + 1; } if (y1 < y2) { prect[i].y = y1; prect[i].height = y2 - y1 + 1; } else { prect[i].y = y2; prect[i].height = y1 - y2 + 1; } x1 = x2; y1 = y2; } pGC->ops->PolyFillRect(pDrawable, pGC, npt - 1, prect); free(prect); } static BoxRec box_from_seg(const xSegment *seg, GCPtr gc) { BoxRec b; if (seg->x1 == seg->x2) { if (seg->y1 > seg->y2) { b.y2 = seg->y1 + 1; b.y1 = seg->y2 + 1; if (gc->capStyle != CapNotLast) b.y1--; } else { b.y1 = seg->y1; b.y2 = seg->y2; if (gc->capStyle != CapNotLast) b.y2++; } b.x1 = seg->x1; b.x2 = seg->x1 + 1; } else { if (seg->x1 > seg->x2) { b.x2 = seg->x1 + 1; b.x1 = seg->x2 + 1; if (gc->capStyle != CapNotLast) b.x1--; } else { b.x1 = seg->x1; b.x2 = seg->x2; if (gc->capStyle != CapNotLast) b.x2++; } b.y1 = seg->y1; b.y2 = seg->y1 + 1; } return b; } /** * uxa_poly_segment() checks if it can accelerate the lines as a group of * horizontal or vertical lines (rectangles), and uses existing rectangle fill * acceleration if so. */ static void uxa_poly_segment(DrawablePtr pDrawable, GCPtr pGC, int nseg, xSegment * pSeg) { xRectangle *prect; int i; /* Don't try to do wide lines or non-solid fill style. */ if (pGC->lineWidth != 0 || pGC->lineStyle != LineSolid || pGC->fillStyle != FillSolid) { uxa_check_poly_segment(pDrawable, pGC, nseg, pSeg); return; } /* If we have any non-horizontal/vertical, fall back. */ for (i = 0; i < nseg; i++) { if (pSeg[i].x1 != pSeg[i].x2 && pSeg[i].y1 != pSeg[i].y2) { uxa_check_poly_segment(pDrawable, pGC, nseg, pSeg); return; } } prect = malloc(sizeof(xRectangle) * nseg); if (!prect) return; for (i = 0; i < nseg; i++) { BoxRec b = box_from_seg(&pSeg[i], pGC); prect[i].x = b.x1; prect[i].y = b.y1; prect[i].width = b.x2 - b.x1; prect[i].height = b.y2 - b.y1; } pGC->ops->PolyFillRect(pDrawable, pGC, nseg, prect); free(prect); } static Bool uxa_fill_region_solid(DrawablePtr pDrawable, RegionPtr pRegion, Pixel pixel, CARD32 planemask, CARD32 alu); static void uxa_poly_fill_rect(DrawablePtr pDrawable, GCPtr pGC, int nrect, xRectangle * prect) { uxa_screen_t *uxa_screen = uxa_get_screen(pDrawable->pScreen); RegionPtr pClip = fbGetCompositeClip(pGC); PixmapPtr pPixmap; RegionPtr pReg; BoxPtr pbox; int fullX1, fullX2, fullY1, fullY2; int xoff, yoff; int xorg, yorg; int n; /* Compute intersection of rects and clip region */ pReg = RECTS_TO_REGION(pScreen, nrect, prect, CT_UNSORTED); REGION_TRANSLATE(pScreen, pReg, pDrawable->x, pDrawable->y); REGION_INTERSECT(pScreen, pReg, pClip, pReg); if (!REGION_NUM_RECTS(pReg)) goto out; if (uxa_screen->force_fallback) goto fallback; pPixmap = uxa_get_offscreen_pixmap (pDrawable, &xoff, &yoff); if (!pPixmap) goto fallback; /* For ROPs where overlaps don't matter, convert rectangles to region * and call uxa_fill_region_{solid,tiled}. */ if ((pGC->fillStyle == FillSolid || pGC->fillStyle == FillTiled) && (nrect == 1 || pGC->alu == GXcopy || pGC->alu == GXclear || pGC->alu == GXnoop || pGC->alu == GXcopyInverted || pGC->alu == GXset)) { if (((pGC->fillStyle == FillSolid || pGC->tileIsPixel) && uxa_fill_region_solid(pDrawable, pReg, pGC->fillStyle == FillSolid ? pGC->fgPixel : pGC->tile. pixel, pGC->planemask, pGC->alu)) || (pGC->fillStyle == FillTiled && !pGC->tileIsPixel && uxa_fill_region_tiled(pDrawable, pReg, pGC->tile.pixmap, &pGC->patOrg, pGC->planemask, pGC->alu))) { goto out; } } if (pGC->fillStyle != FillSolid && !(pGC->tileIsPixel && pGC->fillStyle == FillTiled)) { goto fallback; } if (uxa_screen->info->check_solid && !uxa_screen->info->check_solid(pDrawable, pGC->alu, pGC->planemask)) { goto fallback; } if (!(*uxa_screen->info->prepare_solid) (pPixmap, pGC->alu, pGC->planemask, pGC->fgPixel)) { fallback: uxa_check_poly_fill_rect(pDrawable, pGC, nrect, prect); goto out; } xorg = pDrawable->x; yorg = pDrawable->y; while (nrect--) { fullX1 = prect->x + xorg; fullY1 = prect->y + yorg; fullX2 = fullX1 + (int)prect->width; fullY2 = fullY1 + (int)prect->height; prect++; n = REGION_NUM_RECTS(pClip); pbox = REGION_RECTS(pClip); /* * clip the rectangle to each box in the clip region * this is logically equivalent to calling Intersect(), * but rectangles may overlap each other here. */ while (n--) { int x1 = fullX1; int x2 = fullX2; int y1 = fullY1; int y2 = fullY2; if (pbox->x1 > x1) x1 = pbox->x1; if (pbox->x2 < x2) x2 = pbox->x2; if (pbox->y1 > y1) y1 = pbox->y1; if (pbox->y2 < y2) y2 = pbox->y2; pbox++; if (x1 >= x2 || y1 >= y2) continue; (*uxa_screen->info->solid) (pPixmap, x1 + xoff, y1 + yoff, x2 + xoff, y2 + yoff); } } (*uxa_screen->info->done_solid) (pPixmap); out: REGION_UNINIT(pScreen, pReg); REGION_DESTROY(pScreen, pReg); } void uxa_get_spans(DrawablePtr pDrawable, int wMax, DDXPointPtr ppt, int *pwidth, int nspans, char *pdstStart) { uxa_check_get_spans(pDrawable, wMax, ppt, pwidth, nspans, pdstStart); } static void uxa_set_spans(DrawablePtr pDrawable, GCPtr gc, char *src, DDXPointPtr points, int *widths, int n, int sorted) { uxa_check_set_spans(pDrawable, gc, src, points, widths, n, sorted); } static RegionPtr uxa_copy_plane(DrawablePtr pSrc, DrawablePtr pDst, GCPtr pGC, int srcx, int srcy, int w, int h, int dstx, int dsty, unsigned long bitPlane) { return uxa_check_copy_plane(pSrc, pDst, pGC, srcx, srcy, w, h, dstx, dsty, bitPlane); } static void uxa_image_glyph_blt(DrawablePtr pDrawable, GCPtr pGC, int x, int y, unsigned int nglyph, CharInfoPtr * ppci, pointer pglyphBase) { uxa_check_image_glyph_blt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase); } static void uxa_poly_glyph_blt(DrawablePtr pDrawable, GCPtr pGC, int x, int y, unsigned int nglyph, CharInfoPtr * ppci, pointer pglyphBase) { uxa_check_poly_glyph_blt(pDrawable, pGC, x, y, nglyph, ppci, pglyphBase); } static void uxa_push_pixels(GCPtr pGC, PixmapPtr pBitmap, DrawablePtr pDrawable, int w, int h, int x, int y) { uxa_check_push_pixels(pGC, pBitmap, pDrawable, w, h, x, y); } const GCOps uxa_ops = { uxa_fill_spans, uxa_set_spans, uxa_put_image, uxa_copy_area, uxa_copy_plane, uxa_poly_point, uxa_poly_lines, uxa_poly_segment, miPolyRectangle, uxa_check_poly_arc, miFillPolygon, uxa_poly_fill_rect, miPolyFillArc, miPolyText8, miPolyText16, miImageText8, miImageText16, uxa_image_glyph_blt, uxa_poly_glyph_blt, uxa_push_pixels, }; void uxa_copy_window(WindowPtr pWin, DDXPointRec ptOldOrg, RegionPtr prgnSrc) { RegionRec rgnDst; int dx, dy; PixmapPtr pPixmap = (*pWin->drawable.pScreen->GetWindowPixmap) (pWin); dx = ptOldOrg.x - pWin->drawable.x; dy = ptOldOrg.y - pWin->drawable.y; REGION_TRANSLATE(pWin->drawable.pScreen, prgnSrc, -dx, -dy); REGION_INIT(pWin->drawable.pScreen, &rgnDst, NullBox, 0); REGION_INTERSECT(pWin->drawable.pScreen, &rgnDst, &pWin->borderClip, prgnSrc); #ifdef COMPOSITE if (pPixmap->screen_x || pPixmap->screen_y) REGION_TRANSLATE(pWin->drawable.pScreen, &rgnDst, -pPixmap->screen_x, -pPixmap->screen_y); #endif miCopyRegion(&pPixmap->drawable, &pPixmap->drawable, NULL, &rgnDst, dx, dy, uxa_copy_n_to_n, 0, NULL); REGION_UNINIT(pWin->drawable.pScreen, &rgnDst); } static Bool uxa_fill_region_solid(DrawablePtr pDrawable, RegionPtr pRegion, Pixel pixel, CARD32 planemask, CARD32 alu) { ScreenPtr screen = pDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(screen); PixmapPtr pixmap; int xoff, yoff; int nbox; BoxPtr pBox; Bool ret = FALSE; pixmap = uxa_get_offscreen_pixmap(pDrawable, &xoff, &yoff); if (!pixmap) return FALSE; REGION_TRANSLATE(screen, pRegion, xoff, yoff); nbox = REGION_NUM_RECTS(pRegion); pBox = REGION_RECTS(pRegion); if (uxa_screen->info->check_solid && !uxa_screen->info->check_solid(&pixmap->drawable, alu, planemask)) goto err; if (!uxa_screen->info->prepare_solid(pixmap, alu, planemask, pixel)) goto err; while (nbox--) { uxa_screen->info->solid(pixmap, pBox->x1, pBox->y1, pBox->x2, pBox->y2); pBox++; } uxa_screen->info->done_solid(pixmap); ret = TRUE; err: REGION_TRANSLATE(screen, pRegion, -xoff, -yoff); return ret; } /* Try to do an accelerated tile of the pTile into pRegion of pDrawable. * Based on fbFillRegionTiled(), fbTile(). */ Bool uxa_fill_region_tiled(DrawablePtr pDrawable, RegionPtr pRegion, PixmapPtr pTile, DDXPointPtr pPatOrg, CARD32 planemask, CARD32 alu) { uxa_screen_t *uxa_screen = uxa_get_screen(pDrawable->pScreen); PixmapPtr pPixmap; int xoff, yoff; int tileWidth, tileHeight; int nbox = REGION_NUM_RECTS(pRegion); BoxPtr pBox = REGION_RECTS(pRegion); Bool ret = FALSE; tileWidth = pTile->drawable.width; tileHeight = pTile->drawable.height; /* If we're filling with a solid color, grab it out and go to * FillRegionsolid, saving numerous copies. */ if (tileWidth == 1 && tileHeight == 1) return uxa_fill_region_solid(pDrawable, pRegion, uxa_get_pixmap_first_pixel(pTile), planemask, alu); pPixmap = uxa_get_offscreen_pixmap(pDrawable, &xoff, &yoff); if (!pPixmap || !uxa_pixmap_is_offscreen(pTile)) goto out; if (uxa_screen->info->check_copy && !uxa_screen->info->check_copy(pTile, pPixmap, alu, planemask)) return FALSE; REGION_TRANSLATE(pScreen, pRegion, xoff, yoff); if ((*uxa_screen->info->prepare_copy) (pTile, pPixmap, 1, 1, alu, planemask)) { while (nbox--) { int height = pBox->y2 - pBox->y1; int dstY = pBox->y1; int tileY; modulus(dstY - yoff - pDrawable->y - pPatOrg->y, tileHeight, tileY); while (height > 0) { int width = pBox->x2 - pBox->x1; int dstX = pBox->x1; int tileX; int h = tileHeight - tileY; if (h > height) h = height; height -= h; modulus(dstX - xoff - pDrawable->x - pPatOrg->x, tileWidth, tileX); while (width > 0) { int w = tileWidth - tileX; if (w > width) w = width; width -= w; (*uxa_screen->info->copy) (pPixmap, tileX, tileY, dstX, dstY, w, h); dstX += w; tileX = 0; } dstY += h; tileY = 0; } pBox++; } (*uxa_screen->info->done_copy) (pPixmap); ret = TRUE; } out: REGION_TRANSLATE(pScreen, pRegion, -xoff, -yoff); return ret; } /** * Accelerates GetImage for solid ZPixmap downloads from framebuffer memory. * * This is probably the only case we actually care about. The rest fall through * to migration and fbGetImage, which hopefully will result in migration pushing * the pixmap out of framebuffer. */ void uxa_get_image(DrawablePtr pDrawable, int x, int y, int w, int h, unsigned int format, unsigned long planeMask, char *d) { ScreenPtr screen = pDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(screen); BoxRec Box; PixmapPtr pPix = uxa_get_drawable_pixmap(pDrawable); int xoff, yoff; Bool ok; uxa_get_drawable_deltas(pDrawable, pPix, &xoff, &yoff); Box.x1 = pDrawable->y + x + xoff; Box.y1 = pDrawable->y + y + yoff; Box.x2 = Box.x1 + w; Box.y2 = Box.y1 + h; if (uxa_screen->force_fallback) goto fallback; pPix = uxa_get_offscreen_pixmap(pDrawable, &xoff, &yoff); if (pPix == NULL || uxa_screen->info->get_image == NULL) goto fallback; /* Only cover the ZPixmap, solid copy case. */ if (format != ZPixmap || !UXA_PM_IS_SOLID(pDrawable, planeMask)) goto fallback; /* Only try to handle the 8bpp and up cases, since we don't want to * think about <8bpp. */ if (pDrawable->bitsPerPixel < 8) goto fallback; ok = uxa_screen->info->get_image(pPix, pDrawable->x + x + xoff, pDrawable->y + y + yoff, w, h, d, PixmapBytePad(w, pDrawable->depth)); if (ok) return; fallback: UXA_FALLBACK(("from %p (%c)\n", pDrawable, uxa_drawable_location(pDrawable))); if (uxa_prepare_access(pDrawable, UXA_ACCESS_RO)) { fbGetImage(pDrawable, x, y, w, h, format, planeMask, d); uxa_finish_access(pDrawable, UXA_ACCESS_RO); } return; } xf86-video-intel-2.99.917/src/uxa/intel.h0000664000175000017500000003501612441657165014617 00000000000000/************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. Copyright © 2002 David Dawes All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * Authors: * Keith Whitwell * David Dawes * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #if 0 #define I830DEBUG #endif #include #ifndef REMAP_RESERVED #define REMAP_RESERVED 0 #endif #ifndef _I830_H_ #define _I830_H_ #include "xorg-server.h" #include "xf86_OSproc.h" #include "compiler.h" #include "xf86Cursor.h" #include "xf86xv.h" #include "xf86Crtc.h" #include "xf86RandR12.h" #include "xorg-server.h" #include #define _XF86DRI_SERVER_ #include "drm.h" #include "dri2.h" #include "intel_bufmgr.h" #include "i915_drm.h" #include "intel_driver.h" #include "intel_options.h" #include "intel_list.h" #include "compat-api.h" #if HAVE_UDEV #include #endif #if HAVE_DRI3 #include "misync.h" #endif /* remain compatible to xorg-server 1.6 */ #ifndef MONITOR_EDID_COMPLETE_RAWDATA #define MONITOR_EDID_COMPLETE_RAWDATA EDID_COMPLETE_RAWDATA #endif #if XF86_CRTC_VERSION >= 5 #define INTEL_PIXMAP_SHARING 1 #endif #define MAX_PIPES 4 /* consider making all users dynamic */ #include "common.h" #define PITCH_NONE 0 /** enumeration of 3d consumers so some can maintain invariant state. */ enum last_3d { LAST_3D_OTHER, LAST_3D_VIDEO, LAST_3D_RENDER, LAST_3D_ROTATION }; enum dri_type { DRI_DISABLED, DRI_NONE, DRI_ACTIVE }; typedef struct intel_screen_private { ScrnInfoPtr scrn; struct intel_device *dev; int cpp; #define RENDER_BATCH I915_EXEC_RENDER #define BLT_BATCH I915_EXEC_BLT unsigned int current_batch; void *modes; drm_intel_bo *front_buffer, *back_buffer; unsigned int back_name; long front_pitch, front_tiling; dri_bufmgr *bufmgr; #if USE_UXA uint32_t batch_ptr[4096]; /** Byte offset in batch_ptr for the next dword to be emitted. */ unsigned int batch_used; /** Position in batch_ptr at the start of the current BEGIN_BATCH */ unsigned int batch_emit_start; /** Number of bytes to be emitted in the current BEGIN_BATCH. */ uint32_t batch_emitting; dri_bo *batch_bo, *last_batch_bo[2]; /** Whether we're in a section of code that can't tolerate flushing */ Bool in_batch_atomic; /** Ending batch_used that was verified by intel_start_batch_atomic() */ int batch_atomic_limit; struct list batch_pixmaps; drm_intel_bo *wa_scratch_bo; OsTimerPtr cache_expire; #endif /* For Xvideo */ Bool use_overlay; #ifdef INTEL_XVMC /* For XvMC */ Bool XvMCEnabled; #endif CreateScreenResourcesProcPtr CreateScreenResources; Bool shadow_present; unsigned int tiling; #define INTEL_TILING_FB 0x1 #define INTEL_TILING_2D 0x2 #define INTEL_TILING_3D 0x4 #define INTEL_TILING_ALL (~0) Bool swapbuffers_wait; Bool has_relaxed_fencing; int Chipset; EntityInfoPtr pEnt; const struct intel_device_info *info; unsigned int BR[20]; CloseScreenProcPtr CloseScreen; void (*context_switch) (struct intel_screen_private *intel, int new_mode); void (*vertex_flush) (struct intel_screen_private *intel); void (*batch_flush) (struct intel_screen_private *intel); void (*batch_commit_notify) (struct intel_screen_private *intel); #if USE_UXA struct _UxaDriver *uxa_driver; int uxa_flags; #endif Bool need_sync; int accel_pixmap_offset_alignment; int accel_max_x; int accel_max_y; int max_bo_size; int max_gtt_map_size; int max_tiling_size; Bool XvDisabled; /* Xv disabled in PreInit. */ Bool XvEnabled; /* Xv enabled for this generation. */ Bool XvPreferOverlay; int colorKey; XF86VideoAdaptorPtr adaptor; ScreenBlockHandlerProcPtr BlockHandler; Bool overlayOn; struct { drm_intel_bo *gen4_vs_bo; drm_intel_bo *gen4_sf_bo; drm_intel_bo *gen4_wm_packed_bo; drm_intel_bo *gen4_wm_planar_bo; drm_intel_bo *gen4_cc_bo; drm_intel_bo *gen4_cc_vp_bo; drm_intel_bo *gen4_sampler_bo; drm_intel_bo *gen4_sip_kernel_bo; drm_intel_bo *wm_prog_packed_bo; drm_intel_bo *wm_prog_planar_bo; drm_intel_bo *gen6_blend_bo; drm_intel_bo *gen6_depth_stencil_bo; } video; #if USE_UXA /* Render accel state */ float scale_units[2][2]; /** Transform pointers for src/mask, or NULL if identity */ PictTransform *transform[2]; PixmapPtr render_source, render_mask, render_dest; PicturePtr render_source_picture, render_mask_picture, render_dest_picture; Bool needs_3d_invariant; Bool needs_render_state_emit; Bool needs_render_vertex_emit; /* i830 render accel state */ uint32_t render_dest_format; uint32_t cblend, ablend, s8_blendctl; /* i915 render accel state */ PixmapPtr texture[2]; uint32_t mapstate[6]; uint32_t samplerstate[6]; struct { int op; uint32_t dst_format; } i915_render_state; struct { int num_sf_outputs; int drawrect; uint32_t blend; dri_bo *samplers; dri_bo *kernel; } gen6_render_state; uint32_t prim_offset; void (*prim_emit)(struct intel_screen_private *intel, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h); int floats_per_vertex; int last_floats_per_vertex; uint16_t vertex_offset; uint16_t vertex_count; uint16_t vertex_index; uint16_t vertex_used; uint32_t vertex_id; float vertex_ptr[4*1024]; dri_bo *vertex_bo; uint8_t surface_data[16*1024]; uint16_t surface_used; uint16_t surface_table; uint32_t surface_reloc; dri_bo *surface_bo; /* 965 render acceleration state */ struct gen4_render_state *gen4_render_state; #endif /* DRI enabled this generation. */ enum dri_type dri2, dri3; int drmSubFD; char *deviceName; Bool use_pageflipping; Bool use_triple_buffer; Bool force_fallback; Bool has_kernel_flush; Bool needs_flush; struct _DRI2FrameEvent *pending_flip[MAX_PIPES]; /* Broken-out options. */ OptionInfoPtr Options; /* Driver phase/state information */ Bool suspended; enum last_3d last_3d; /** * User option to print acceleration fallback info to the server log. */ Bool fallback_debug; unsigned debug_flush; #if HAVE_UDEV struct udev_monitor *uevent_monitor; pointer uevent_handler; #endif Bool has_prime_vmap_flush; #if HAVE_DRI3 SyncScreenFuncsRec save_sync_screen_funcs; #endif void (*flush_rendering)(struct intel_screen_private *intel); } intel_screen_private; #define INTEL_INFO(intel) ((intel)->info) #define IS_GENx(intel, X) (INTEL_INFO(intel)->gen >= 8*(X) && INTEL_INFO(intel)->gen < 8*((X)+1)) #define IS_GEN1(intel) IS_GENx(intel, 1) #define IS_GEN2(intel) IS_GENx(intel, 2) #define IS_GEN3(intel) IS_GENx(intel, 3) #define IS_GEN4(intel) IS_GENx(intel, 4) #define IS_GEN5(intel) IS_GENx(intel, 5) #define IS_GEN6(intel) IS_GENx(intel, 6) #define IS_GEN7(intel) IS_GENx(intel, 7) #define IS_HSW(intel) (INTEL_INFO(intel)->gen == 075) /* Some chips have specific errata (or limits) that we need to workaround. */ #define IS_I830(intel) (intel_get_device_id((intel)->dev) == PCI_CHIP_I830_M) #define IS_845G(intel) (intel_get_device_id((intel)->dev) == PCI_CHIP_845_G) #define IS_I865G(intel) (intel_get_device_id((intel)->dev) == PCI_CHIP_I865_G) #define IS_I915G(pI810) (intel_get_device_id((intel)->dev) == PCI_CHIP_I915_G || intel_get_device_id((intel)->dev) == PCI_CHIP_E7221_G) #define IS_I915GM(pI810) (intel_get_device_id((intel)->dev) == PCI_CHIP_I915_GM) #define IS_965_Q(pI810) (intel_get_device_id((intel)->dev) == PCI_CHIP_I965_Q) /* supports Y tiled surfaces (pre-965 Mesa isn't ready yet) */ #define SUPPORTS_YTILING(pI810) (INTEL_INFO(intel)->gen >= 040) #define HAS_BLT(pI810) (INTEL_INFO(intel)->gen >= 060) #ifndef I915_PARAM_HAS_PRIME_VMAP_FLUSH #define I915_PARAM_HAS_PRIME_VMAP_FLUSH 21 #endif enum { DEBUG_FLUSH_BATCHES = 0x1, DEBUG_FLUSH_CACHES = 0x2, DEBUG_FLUSH_WAIT = 0x4, }; extern Bool intel_mode_pre_init(ScrnInfoPtr pScrn, int fd, int cpp); extern void intel_mode_init(struct intel_screen_private *intel); extern void intel_mode_disable_unused_functions(ScrnInfoPtr scrn); extern void intel_mode_remove_fb(intel_screen_private *intel); extern void intel_mode_close(intel_screen_private *intel); extern void intel_mode_fini(intel_screen_private *intel); extern int intel_mode_read_drm_events(intel_screen_private *intel); extern void intel_mode_hotplug(intel_screen_private *intel); typedef void (*intel_drm_handler_proc)(ScrnInfoPtr scrn, xf86CrtcPtr crtc, uint64_t seq, uint64_t usec, void *data); typedef void (*intel_drm_abort_proc)(ScrnInfoPtr scrn, xf86CrtcPtr crtc, void *data); extern uint32_t intel_drm_queue_alloc(ScrnInfoPtr scrn, xf86CrtcPtr crtc, void *data, intel_drm_handler_proc handler, intel_drm_abort_proc abort); extern void intel_drm_abort(ScrnInfoPtr scrn, Bool (*match)(void *data, void *match_data), void *match_data); extern int intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, xf86CrtcPtr crtc); extern int intel_crtc_id(xf86CrtcPtr crtc); extern int intel_output_dpms_status(xf86OutputPtr output); extern void intel_copy_fb(ScrnInfoPtr scrn); int intel_get_crtc_msc_ust(ScrnInfoPtr scrn, xf86CrtcPtr crtc, uint64_t *msc, uint64_t *ust); uint32_t intel_crtc_msc_to_sequence(ScrnInfoPtr scrn, xf86CrtcPtr crtc, uint64_t expect); uint64_t intel_sequence_to_crtc_msc(xf86CrtcPtr crtc, uint32_t sequence); enum DRI2FrameEventType { DRI2_SWAP, DRI2_SWAP_CHAIN, DRI2_FLIP, DRI2_WAITMSC, }; #if XORG_VERSION_CURRENT <= XORG_VERSION_NUMERIC(1,7,99,3,0) typedef void (*DRI2SwapEventPtr)(ClientPtr client, void *data, int type, CARD64 ust, CARD64 msc, CARD64 sbc); #endif typedef void (*intel_pageflip_handler_proc) (uint64_t frame, uint64_t usec, void *data); typedef void (*intel_pageflip_abort_proc) (void *data); typedef struct _DRI2FrameEvent { struct intel_screen_private *intel; XID drawable_id; ClientPtr client; enum DRI2FrameEventType type; int frame; int pipe; struct list drawable_resource, client_resource; /* for swaps & flips only */ DRI2SwapEventPtr event_complete; void *event_data; DRI2BufferPtr front; DRI2BufferPtr back; struct _DRI2FrameEvent *chain; } DRI2FrameEventRec, *DRI2FrameEventPtr; extern Bool intel_do_pageflip(intel_screen_private *intel, dri_bo *new_front, int ref_crtc_hw_id, Bool async, void *pageflip_data, intel_pageflip_handler_proc pageflip_handler, intel_pageflip_abort_proc pageflip_abort); static inline intel_screen_private * intel_get_screen_private(ScrnInfoPtr scrn) { return (intel_screen_private *)(scrn->driverPrivate); } #ifndef ARRAY_SIZE #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) #endif #ifndef ALIGN #define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) #endif #ifndef MIN #define MIN(a,b) ((a) < (b) ? (a) : (b)) #endif extern void intel_video_init(ScreenPtr pScreen); extern void intel_box_intersect(BoxPtr dest, BoxPtr a, BoxPtr b); extern void intel_crtc_box(xf86CrtcPtr crtc, BoxPtr crtc_box); extern xf86CrtcPtr intel_covering_crtc(ScrnInfoPtr scrn, BoxPtr box, xf86CrtcPtr desired, BoxPtr crtc_box_ret); Bool I830DRI2ScreenInit(ScreenPtr pScreen); void I830DRI2CloseScreen(ScreenPtr pScreen); void I830DRI2FrameEventHandler(unsigned int frame, unsigned int tv_sec, unsigned int tv_usec, DRI2FrameEventPtr flip_info); void I830DRI2FlipEventHandler(unsigned int frame, unsigned int tv_sec, unsigned int tv_usec, DRI2FrameEventPtr flip_info); /* intel_dri3.c */ Bool intel_dri3_screen_init(ScreenPtr screen); extern Bool intel_crtc_on(xf86CrtcPtr crtc); int intel_crtc_to_pipe(xf86CrtcPtr crtc); /* intel_memory.c */ unsigned long intel_get_fence_size(intel_screen_private *intel, unsigned long size); unsigned long intel_get_fence_pitch(intel_screen_private *intel, unsigned long pitch, uint32_t tiling_mode); Bool intel_check_display_stride(ScrnInfoPtr scrn, int stride, Bool tiling); void intel_set_gem_max_sizes(ScrnInfoPtr scrn); unsigned int intel_compute_size(struct intel_screen_private *intel, int w, int h, int bpp, unsigned usage, uint32_t *tiling, int *stride); drm_intel_bo *intel_allocate_framebuffer(ScrnInfoPtr scrn, int width, int height, int cpp, int *out_stride, uint32_t *out_tiling); static inline PixmapPtr get_drawable_pixmap(DrawablePtr drawable) { ScreenPtr screen = drawable->pScreen; if (drawable->type == DRAWABLE_PIXMAP) return (PixmapPtr) drawable; else return screen->GetWindowPixmap((WindowPtr) drawable); } static inline Bool pixmap_is_scanout(PixmapPtr pixmap) { ScreenPtr screen = pixmap->drawable.pScreen; return pixmap == screen->GetScreenPixmap(screen); } static inline int intel_pixmap_pitch(PixmapPtr pixmap) { return (unsigned long)pixmap->devKind; } /* * intel_sync.c */ #if HAVE_DRI3 Bool intel_sync_init(ScreenPtr screen); void intel_sync_close(ScreenPtr screen); #else static inline Bool intel_sync_init(ScreenPtr screen) { return 0; } static inline void intel_sync_close(ScreenPtr screen) { } #endif /* * intel_present.c */ #if 0 #define DebugPresent(x) ErrorF x #else #define DebugPresent(x) #endif #if HAVE_PRESENT Bool intel_present_screen_init(ScreenPtr screen); #else static inline Bool intel_present_screen_init(ScreenPtr screen) { return 0; } #endif dri_bo * intel_get_pixmap_bo(PixmapPtr pixmap); void intel_set_pixmap_bo(PixmapPtr pixmap, dri_bo *bo); void intel_flush(intel_screen_private *intel); #endif /* _I830_H_ */ xf86-video-intel-2.99.917/src/uxa/uxa-glyphs.c0000664000175000017500000006272612432737457015613 00000000000000/* * Copyright © 2010 Intel Corporation * Partly based on code Copyright © 2008 Red Hat, Inc. * Partly based on code Copyright © 2000 SuSE, Inc. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Intel not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. Intel makes no representations about the * suitability of this software for any purpose. It is provided "as is" * without express or implied warranty. * * INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL INTEL * BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Red Hat not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. Red Hat makes no representations about the * suitability of this software for any purpose. It is provided "as is" * without express or implied warranty. * * Red Hat DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL Red Hat * BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of SuSE not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. SuSE makes no representations about the * suitability of this software for any purpose. It is provided "as is" * without express or implied warranty. * * SuSE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL SuSE * BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * Author: Chris Wilson * Based on code by: Keith Packard and Owen Taylor */ #ifdef HAVE_DIX_CONFIG_H #include #endif #include #include "uxa-priv.h" #include "common.h" /* Width of the pixmaps we use for the caches; this should be less than * max texture size of the driver; this may need to actually come from * the driver. */ #define CACHE_PICTURE_SIZE 1024 #define GLYPH_MIN_SIZE 8 #define GLYPH_MAX_SIZE 64 #define GLYPH_CACHE_SIZE (CACHE_PICTURE_SIZE * CACHE_PICTURE_SIZE / (GLYPH_MIN_SIZE * GLYPH_MIN_SIZE)) struct uxa_glyph { uxa_glyph_cache_t *cache; uint16_t x, y; uint16_t size, pos; }; #if HAS_DEVPRIVATEKEYREC static DevPrivateKeyRec uxa_glyph_key; #else static int uxa_glyph_key; #endif static inline struct uxa_glyph *uxa_glyph_get_private(GlyphPtr glyph) { #if HAS_DEVPRIVATEKEYREC return dixGetPrivate(&glyph->devPrivates, &uxa_glyph_key); #else return dixLookupPrivate(&glyph->devPrivates, &uxa_glyph_key); #endif } static inline void uxa_glyph_set_private(GlyphPtr glyph, struct uxa_glyph *priv) { dixSetPrivate(&glyph->devPrivates, &uxa_glyph_key, priv); } #define NeedsComponent(f) (PICT_FORMAT_A(f) != 0 && PICT_FORMAT_RGB(f) != 0) static void uxa_unrealize_glyph_caches(ScreenPtr pScreen) { uxa_screen_t *uxa_screen = uxa_get_screen(pScreen); int i; if (!uxa_screen->glyph_cache_initialized) return; for (i = 0; i < UXA_NUM_GLYPH_CACHE_FORMATS; i++) { uxa_glyph_cache_t *cache = &uxa_screen->glyphCaches[i]; if (cache->picture) FreePicture(cache->picture, 0); if (cache->glyphs) free(cache->glyphs); } uxa_screen->glyph_cache_initialized = FALSE; } void uxa_glyphs_fini(ScreenPtr pScreen) { uxa_unrealize_glyph_caches(pScreen); } /* All caches for a single format share a single pixmap for glyph storage, * allowing mixing glyphs of different sizes without paying a penalty * for switching between source pixmaps. (Note that for a size of font * right at the border between two sizes, we might be switching for almost * every glyph.) * * This function allocates the storage pixmap, and then fills in the * rest of the allocated structures for all caches with the given format. */ static Bool uxa_realize_glyph_caches(ScreenPtr pScreen) { uxa_screen_t *uxa_screen = uxa_get_screen(pScreen); unsigned int formats[] = { PIXMAN_a8, PIXMAN_a8r8g8b8, }; unsigned i; if (uxa_screen->glyph_cache_initialized) return TRUE; uxa_screen->glyph_cache_initialized = TRUE; memset(uxa_screen->glyphCaches, 0, sizeof(uxa_screen->glyphCaches)); for (i = 0; i < sizeof(formats)/sizeof(formats[0]); i++) { uxa_glyph_cache_t *cache = &uxa_screen->glyphCaches[i]; PixmapPtr pixmap; PicturePtr picture; CARD32 component_alpha; int depth = PIXMAN_FORMAT_DEPTH(formats[i]); int error; PictFormatPtr pPictFormat = PictureMatchFormat(pScreen, depth, formats[i]); if (!pPictFormat) goto bail; /* Now allocate the pixmap and picture */ pixmap = pScreen->CreatePixmap(pScreen, CACHE_PICTURE_SIZE, CACHE_PICTURE_SIZE, depth, INTEL_CREATE_PIXMAP_TILING_X); if (!pixmap) goto bail; if (!uxa_pixmap_is_offscreen(pixmap)) { /* Presume shadow is in-effect */ pScreen->DestroyPixmap(pixmap); uxa_unrealize_glyph_caches(pScreen); return TRUE; } component_alpha = NeedsComponent(pPictFormat->format); picture = CreatePicture(0, &pixmap->drawable, pPictFormat, CPComponentAlpha, &component_alpha, serverClient, &error); pScreen->DestroyPixmap(pixmap); if (!picture) goto bail; ValidatePicture(picture); cache->picture = picture; cache->glyphs = calloc(sizeof(GlyphPtr), GLYPH_CACHE_SIZE); if (!cache->glyphs) goto bail; cache->evict = rand() % GLYPH_CACHE_SIZE; } assert(i == UXA_NUM_GLYPH_CACHE_FORMATS); return TRUE; bail: uxa_unrealize_glyph_caches(pScreen); return FALSE; } Bool uxa_glyphs_init(ScreenPtr pScreen) { #if HAS_DIXREGISTERPRIVATEKEY if (!dixRegisterPrivateKey(&uxa_glyph_key, PRIVATE_GLYPH, 0)) return FALSE; #else if (!dixRequestPrivate(&uxa_glyph_key, 0)) return FALSE; #endif /* Skip pixmap creation if we don't intend to use it. */ if (uxa_get_screen(pScreen)->force_fallback) return TRUE; return uxa_realize_glyph_caches(pScreen); } /* The most efficient thing to way to upload the glyph to the screen * is to use CopyArea; uxa pixmaps are always offscreen. */ static void uxa_glyph_cache_upload_glyph(ScreenPtr screen, uxa_glyph_cache_t * cache, GlyphPtr glyph, int x, int y) { PicturePtr pGlyphPicture = GetGlyphPicture(glyph, screen); PixmapPtr pGlyphPixmap = (PixmapPtr) pGlyphPicture->pDrawable; PixmapPtr pCachePixmap = (PixmapPtr) cache->picture->pDrawable; PixmapPtr scratch; GCPtr gc; gc = GetScratchGC(pCachePixmap->drawable.depth, screen); if (!gc) return; ValidateGC(&pCachePixmap->drawable, gc); scratch = pGlyphPixmap; /* Create a temporary bo to stream the updates to the cache */ if (pGlyphPixmap->drawable.depth != pCachePixmap->drawable.depth || !uxa_pixmap_is_offscreen(scratch)) { scratch = screen->CreatePixmap(screen, glyph->info.width, glyph->info.height, pCachePixmap->drawable.depth, UXA_CREATE_PIXMAP_FOR_MAP); if (scratch) { if (pGlyphPixmap->drawable.depth != pCachePixmap->drawable.depth) { PicturePtr picture; int error; picture = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, pCachePixmap->drawable.depth, cache->picture->format), 0, NULL, serverClient, &error); if (picture) { ValidatePicture(picture); uxa_composite(PictOpSrc, pGlyphPicture, NULL, picture, 0, 0, 0, 0, 0, 0, glyph->info.width, glyph->info.height); FreePicture(picture, 0); } } else { uxa_copy_area(&pGlyphPixmap->drawable, &scratch->drawable, gc, 0, 0, glyph->info.width, glyph->info.height, 0, 0); } } else { scratch = pGlyphPixmap; } } uxa_copy_area(&scratch->drawable, &pCachePixmap->drawable, gc, 0, 0, glyph->info.width, glyph->info.height, x, y); if (scratch != pGlyphPixmap) screen->DestroyPixmap(scratch); FreeScratchGC(gc); } void uxa_glyph_unrealize(ScreenPtr screen, GlyphPtr glyph) { struct uxa_glyph *priv; /* Use Lookup in case we have not attached to this glyph. */ priv = dixLookupPrivate(&glyph->devPrivates, &uxa_glyph_key); if (priv == NULL) return; priv->cache->glyphs[priv->pos] = NULL; uxa_glyph_set_private(glyph, NULL); free(priv); } /* Cut and paste from render/glyph.c - probably should export it instead */ static void uxa_glyph_extents(int nlist, GlyphListPtr list, GlyphPtr * glyphs, BoxPtr extents) { int x1, x2, y1, y2; int x, y, n; x1 = y1 = MAXSHORT; x2 = y2 = MINSHORT; x = y = 0; while (nlist--) { x += list->xOff; y += list->yOff; n = list->len; list++; while (n--) { GlyphPtr glyph = *glyphs++; int v; v = x - glyph->info.x; if (v < x1) x1 = v; v += glyph->info.width; if (v > x2) x2 = v; v = y - glyph->info.y; if (v < y1) y1 = v; v += glyph->info.height; if (v > y2) y2 = v; x += glyph->info.xOff; y += glyph->info.yOff; } } extents->x1 = x1 < MINSHORT ? MINSHORT : x1; extents->x2 = x2 > MAXSHORT ? MAXSHORT : x2; extents->y1 = y1 < MINSHORT ? MINSHORT : y1; extents->y2 = y2 > MAXSHORT ? MAXSHORT : y2; } /** * Returns TRUE if the glyphs in the lists intersect. Only checks based on * bounding box, which appears to be good enough to catch most cases at least. */ static Bool uxa_glyphs_intersect(int nlist, GlyphListPtr list, GlyphPtr * glyphs) { int x1, x2, y1, y2; int n; int x, y; BoxRec extents; Bool first = TRUE; x = 0; y = 0; extents.x1 = 0; extents.y1 = 0; extents.x2 = 0; extents.y2 = 0; while (nlist--) { x += list->xOff; y += list->yOff; n = list->len; list++; while (n--) { GlyphPtr glyph = *glyphs++; if (glyph->info.width == 0 || glyph->info.height == 0) { x += glyph->info.xOff; y += glyph->info.yOff; continue; } x1 = x - glyph->info.x; if (x1 < MINSHORT) x1 = MINSHORT; y1 = y - glyph->info.y; if (y1 < MINSHORT) y1 = MINSHORT; x2 = x1 + glyph->info.width; if (x2 > MAXSHORT) x2 = MAXSHORT; y2 = y1 + glyph->info.height; if (y2 > MAXSHORT) y2 = MAXSHORT; if (first) { extents.x1 = x1; extents.y1 = y1; extents.x2 = x2; extents.y2 = y2; first = FALSE; } else { if (x1 < extents.x2 && x2 > extents.x1 && y1 < extents.y2 && y2 > extents.y1) { return TRUE; } if (x1 < extents.x1) extents.x1 = x1; if (x2 > extents.x2) extents.x2 = x2; if (y1 < extents.y1) extents.y1 = y1; if (y2 > extents.y2) extents.y2 = y2; } x += glyph->info.xOff; y += glyph->info.yOff; } } return FALSE; } static void uxa_check_glyphs(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int nlist, GlyphListPtr list, GlyphPtr * glyphs) { pixman_image_t *image; PixmapPtr scratch; PicturePtr mask, mask_src = NULL, mask_dst = NULL, white = NULL; int width = 0, height = 0; int x, y, n; int xDst = list->xOff, yDst = list->yOff; BoxRec extents = { 0, 0, 0, 0 }; CARD8 mask_op = 0; if (maskFormat) { pixman_format_code_t format; CARD32 component_alpha; xRenderColor color; int error; uxa_glyph_extents(nlist, list, glyphs, &extents); if (extents.x2 <= extents.x1 || extents.y2 <= extents.y1) return; width = extents.x2 - extents.x1; height = extents.y2 - extents.y1; format = maskFormat->format | (BitsPerPixel(maskFormat->depth) << 24); image = pixman_image_create_bits(format, width, height, NULL, 0); if (!image) return; scratch = GetScratchPixmapHeader(dst->pDrawable->pScreen, width, height, PIXMAN_FORMAT_DEPTH(format), PIXMAN_FORMAT_BPP(format), pixman_image_get_stride(image), pixman_image_get_data(image)); if (!scratch) { pixman_image_unref(image); return; } component_alpha = NeedsComponent(maskFormat->format); mask = CreatePicture(0, &scratch->drawable, maskFormat, CPComponentAlpha, &component_alpha, serverClient, &error); if (!mask) { FreeScratchPixmapHeader(scratch); pixman_image_unref(image); return; } ValidatePicture(mask); x = -extents.x1; y = -extents.y1; color.red = color.green = color.blue = color.alpha = 0xffff; white = CreateSolidPicture(0, &color, &error); mask_op = op; op = PictOpAdd; mask_src = src; src = white; mask_dst = dst; dst = mask; } else { mask = dst; x = 0; y = 0; } while (nlist--) { x += list->xOff; y += list->yOff; n = list->len; while (n--) { GlyphPtr glyph = *glyphs++; PicturePtr g = GetGlyphPicture(glyph, dst->pDrawable->pScreen); if (g) { CompositePicture(op, src, g, dst, xSrc + (x - glyph->info.x) - xDst, ySrc + (y - glyph->info.y) - yDst, 0, 0, x - glyph->info.x, y - glyph->info.y, glyph->info.width, glyph->info.height); } x += glyph->info.xOff; y += glyph->info.yOff; } list++; } if (white) FreePicture(white, 0); if (maskFormat) { x = extents.x1; y = extents.y1; CompositePicture(mask_op, mask_src, mask, mask_dst, xSrc + x - xDst, ySrc + y - yDst, 0, 0, x, y, width, height); FreePicture(mask, 0); FreeScratchPixmapHeader(scratch); pixman_image_unref(image); } } static inline unsigned int uxa_glyph_size_to_count(int size) { size /= GLYPH_MIN_SIZE; return size * size; } static inline unsigned int uxa_glyph_count_to_mask(int count) { return ~(count - 1); } static inline unsigned int uxa_glyph_size_to_mask(int size) { return uxa_glyph_count_to_mask(uxa_glyph_size_to_count(size)); } static PicturePtr uxa_glyph_cache(ScreenPtr screen, GlyphPtr glyph, int *out_x, int *out_y) { uxa_screen_t *uxa_screen = uxa_get_screen(screen); PicturePtr glyph_picture = GetGlyphPicture(glyph, screen); uxa_glyph_cache_t *cache = &uxa_screen->glyphCaches[PICT_FORMAT_RGB(glyph_picture->format) != 0]; struct uxa_glyph *priv = NULL; int size, mask, pos, s; if (glyph->info.width > GLYPH_MAX_SIZE || glyph->info.height > GLYPH_MAX_SIZE) return NULL; for (size = GLYPH_MIN_SIZE; size <= GLYPH_MAX_SIZE; size *= 2) if (glyph->info.width <= size && glyph->info.height <= size) break; s = uxa_glyph_size_to_count(size); mask = uxa_glyph_count_to_mask(s); pos = (cache->count + s - 1) & mask; if (pos < GLYPH_CACHE_SIZE) { cache->count = pos + s; } else { for (s = size; s <= GLYPH_MAX_SIZE; s *= 2) { int i = cache->evict & uxa_glyph_size_to_mask(s); GlyphPtr evicted = cache->glyphs[i]; if (evicted == NULL) continue; priv = uxa_glyph_get_private(evicted); if (priv->size >= s) { cache->glyphs[i] = NULL; uxa_glyph_set_private(evicted, NULL); pos = cache->evict & uxa_glyph_size_to_mask(size); } else priv = NULL; break; } if (priv == NULL) { int count = uxa_glyph_size_to_count(size); mask = uxa_glyph_count_to_mask(count); pos = cache->evict & mask; for (s = 0; s < count; s++) { GlyphPtr evicted = cache->glyphs[pos + s]; if (evicted != NULL) { if (priv != NULL) free(priv); priv = uxa_glyph_get_private(evicted); uxa_glyph_set_private(evicted, NULL); cache->glyphs[pos + s] = NULL; } } } /* And pick a new eviction position */ cache->evict = rand() % GLYPH_CACHE_SIZE; } if (priv == NULL) { priv = malloc(sizeof(struct uxa_glyph)); if (priv == NULL) return NULL; } uxa_glyph_set_private(glyph, priv); cache->glyphs[pos] = glyph; priv->cache = cache; priv->size = size; priv->pos = pos; s = pos / ((GLYPH_MAX_SIZE / GLYPH_MIN_SIZE) * (GLYPH_MAX_SIZE / GLYPH_MIN_SIZE)); priv->x = s % (CACHE_PICTURE_SIZE / GLYPH_MAX_SIZE) * GLYPH_MAX_SIZE; priv->y = (s / (CACHE_PICTURE_SIZE / GLYPH_MAX_SIZE)) * GLYPH_MAX_SIZE; for (s = GLYPH_MIN_SIZE; s < GLYPH_MAX_SIZE; s *= 2) { if (pos & 1) priv->x += s; if (pos & 2) priv->y += s; pos >>= 2; } uxa_glyph_cache_upload_glyph(screen, cache, glyph, priv->x, priv->y); *out_x = priv->x; *out_y = priv->y; return cache->picture; } static void uxa_clear_pixmap(ScreenPtr screen, uxa_screen_t *uxa_screen, PixmapPtr pixmap) { if (uxa_screen->info->check_solid && !uxa_screen->info->check_solid(&pixmap->drawable, GXcopy, FB_ALLONES)) goto fallback; if (!uxa_screen->info->prepare_solid(pixmap, GXcopy, FB_ALLONES, 0)) goto fallback; uxa_screen->info->solid(pixmap, 0, 0, pixmap->drawable.width, pixmap->drawable.height); uxa_screen->info->done_solid(pixmap); return; fallback: { GCPtr gc; gc = GetScratchGC(pixmap->drawable.depth, screen); if (gc) { xRectangle rect; ValidateGC(&pixmap->drawable, gc); rect.x = 0; rect.y = 0; rect.width = pixmap->drawable.width; rect.height = pixmap->drawable.height; gc->ops->PolyFillRect(&pixmap->drawable, gc, 1, &rect); FreeScratchGC(gc); } } } static PicturePtr create_white_solid(ScreenPtr screen) { PicturePtr white, ret = NULL; xRenderColor color; int error; color.red = color.green = color.blue = color.alpha = 0xffff; white = CreateSolidPicture(0, &color, &error); if (white) { ret = uxa_acquire_solid(screen, white->pSourcePict); FreePicture(white, 0); } return ret; } static int uxa_glyphs_via_mask(CARD8 op, PicturePtr pSrc, PicturePtr pDst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int nlist, GlyphListPtr list, GlyphPtr * glyphs) { ScreenPtr screen = pDst->pDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(screen); CARD32 component_alpha; PixmapPtr pixmap, white_pixmap; PicturePtr glyph_atlas, mask, white; int xDst = list->xOff, yDst = list->yOff; int x, y, width, height; int dst_off_x, dst_off_y; int n, error; BoxRec box; uxa_glyph_extents(nlist, list, glyphs, &box); if (box.x2 <= box.x1 || box.y2 <= box.y1) return 0; dst_off_x = box.x1; dst_off_y = box.y1; width = box.x2 - box.x1; height = box.y2 - box.y1; x = -box.x1; y = -box.y1; if (maskFormat->depth == 1) { PictFormatPtr a8Format = PictureMatchFormat(screen, 8, PICT_a8); if (!a8Format) return -1; maskFormat = a8Format; } pixmap = screen->CreatePixmap(screen, width, height, maskFormat->depth, CREATE_PIXMAP_USAGE_SCRATCH); if (!pixmap) return 1; if (!uxa_pixmap_is_offscreen(pixmap)) { screen->DestroyPixmap(pixmap); return -1; } white_pixmap = NULL; white = create_white_solid(screen); if (white) white_pixmap = uxa_get_drawable_pixmap(white->pDrawable); if (!white_pixmap) { if (white) FreePicture(white, 0); screen->DestroyPixmap(pixmap); return -1; } uxa_clear_pixmap(screen, uxa_screen, pixmap); component_alpha = NeedsComponent(maskFormat->format); mask = CreatePicture(0, &pixmap->drawable, maskFormat, CPComponentAlpha, &component_alpha, serverClient, &error); screen->DestroyPixmap(pixmap); if (!mask) { FreePicture(white, 0); return 1; } ValidatePicture(mask); glyph_atlas = NULL; while (nlist--) { x += list->xOff; y += list->yOff; n = list->len; while (n--) { GlyphPtr glyph = *glyphs++; PicturePtr this_atlas; int glyph_x, glyph_y; struct uxa_glyph *priv; if (glyph->info.width == 0 || glyph->info.height == 0) goto next_glyph; priv = uxa_glyph_get_private(glyph); if (priv != NULL) { glyph_x = priv->x; glyph_y = priv->y; this_atlas = priv->cache->picture; } else { if (glyph_atlas) { uxa_screen->info->done_composite(pixmap); glyph_atlas = NULL; } this_atlas = uxa_glyph_cache(screen, glyph, &glyph_x, &glyph_y); if (this_atlas == NULL) { /* no cache for this glyph */ this_atlas = GetGlyphPicture(glyph, screen); glyph_x = glyph_y = 0; } } if (this_atlas != glyph_atlas) { PixmapPtr glyph_pixmap; if (glyph_atlas) uxa_screen->info->done_composite(pixmap); glyph_pixmap = uxa_get_drawable_pixmap(this_atlas->pDrawable); if (!uxa_pixmap_is_offscreen(glyph_pixmap) || !uxa_screen->info->prepare_composite(PictOpAdd, white, this_atlas, mask, white_pixmap, glyph_pixmap, pixmap)) { FreePicture(white, 0); FreePicture(mask, 0); return -1; } glyph_atlas = this_atlas; } uxa_screen->info->composite(pixmap, 0, 0, glyph_x, glyph_y, x - glyph->info.x, y - glyph->info.y, glyph->info.width, glyph->info.height); next_glyph: x += glyph->info.xOff; y += glyph->info.yOff; } list++; } if (glyph_atlas) uxa_screen->info->done_composite(pixmap); uxa_composite(op, pSrc, mask, pDst, dst_off_x + xSrc - xDst, dst_off_y + ySrc - yDst, 0, 0, dst_off_x, dst_off_y, width, height); FreePicture(white, 0); FreePicture(mask, 0); return 0; } static int uxa_glyphs_to_dst(CARD8 op, PicturePtr pSrc, PicturePtr pDst, INT16 xSrc, INT16 ySrc, int nlist, GlyphListPtr list, GlyphPtr * glyphs) { ScreenPtr screen = pDst->pDrawable->pScreen; int x, y, n; xSrc -= list->xOff; ySrc -= list->yOff; x = y = 0; while (nlist--) { x += list->xOff; y += list->yOff; n = list->len; while (n--) { GlyphPtr glyph = *glyphs++; PicturePtr glyph_atlas; int glyph_x, glyph_y; struct uxa_glyph *priv; if (glyph->info.width == 0 || glyph->info.height == 0) goto next_glyph; priv = uxa_glyph_get_private(glyph); if (priv != NULL) { glyph_x = priv->x; glyph_y = priv->y; glyph_atlas = priv->cache->picture; } else { glyph_atlas = uxa_glyph_cache(screen, glyph, &glyph_x, &glyph_y); if (glyph_atlas == NULL) { /* no cache for this glyph */ glyph_atlas = GetGlyphPicture(glyph, screen); glyph_x = glyph_y = 0; } } uxa_composite(op, pSrc, glyph_atlas, pDst, xSrc + x - glyph->info.x, ySrc + y - glyph->info.y, glyph_x, glyph_y, x - glyph->info.x, y - glyph->info.y, glyph->info.width, glyph->info.height); next_glyph: x += glyph->info.xOff; y += glyph->info.yOff; } list++; } return 0; } static Bool is_solid(PicturePtr picture) { if (picture->pSourcePict) { SourcePict *source = picture->pSourcePict; return source->type == SourcePictTypeSolidFill; } else { return (picture->repeat && picture->pDrawable->width == 1 && picture->pDrawable->height == 1); } } void uxa_glyphs(CARD8 op, PicturePtr pSrc, PicturePtr pDst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int nlist, GlyphListPtr list, GlyphPtr * glyphs) { ScreenPtr screen = pDst->pDrawable->pScreen; uxa_screen_t *uxa_screen = uxa_get_screen(screen); if (!uxa_screen->info->prepare_composite || uxa_screen->force_fallback || !uxa_drawable_is_offscreen(pDst->pDrawable) || pDst->alphaMap || pSrc->alphaMap || /* XXX we fail to handle (rare) non-solid sources correctly. */ !is_solid(pSrc)) { fallback: uxa_check_glyphs(op, pSrc, pDst, maskFormat, xSrc, ySrc, nlist, list, glyphs); return; } /* basic sanity check */ if (uxa_screen->info->check_composite && !uxa_screen->info->check_composite(op, pSrc, NULL, pDst, 0, 0)) { goto fallback; } ValidatePicture(pSrc); ValidatePicture(pDst); if (!maskFormat) { /* If we don't have a mask format but all the glyphs have the same format, * require ComponentAlpha and don't intersect, use the glyph format as mask * format for the full benefits of the glyph cache. */ if (NeedsComponent(list[0].format->format)) { Bool sameFormat = TRUE; int i; maskFormat = list[0].format; for (i = 0; i < nlist; i++) { if (maskFormat->format != list[i].format->format) { sameFormat = FALSE; break; } } if (!sameFormat || uxa_glyphs_intersect(nlist, list, glyphs)) maskFormat = NULL; } } if (!maskFormat) { if (uxa_glyphs_to_dst(op, pSrc, pDst, xSrc, ySrc, nlist, list, glyphs)) goto fallback; } else { if (uxa_glyphs_via_mask(op, pSrc, pDst, maskFormat, xSrc, ySrc, nlist, list, glyphs)) goto fallback; } } xf86-video-intel-2.99.917/src/uxa/Makefile.in0000664000175000017500000006045412445556117015403 00000000000000# Makefile.in generated by automake 1.14.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL # ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER # IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 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substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Zhenyu Wang * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #define _INTEL_XVMC_SERVER_ #include "intel.h" #include "intel_xvmc.h" #include #include #include static int create_subpicture(ScrnInfoPtr scrn, XvMCSubpicturePtr subpicture, int *num_priv, CARD32 ** priv) { return Success; } static void destroy_subpicture(ScrnInfoPtr scrn, XvMCSubpicturePtr subpicture) { } static int create_surface(ScrnInfoPtr scrn, XvMCSurfacePtr surface, int *num_priv, CARD32 ** priv) { return Success; } static void destroy_surface(ScrnInfoPtr scrn, XvMCSurfacePtr surface) { } static int create_context(ScrnInfoPtr scrn, XvMCContextPtr pContext, int *num_priv, CARD32 **priv) { intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_xvmc_hw_context *contextRec; *priv = calloc(1, sizeof(struct intel_xvmc_hw_context)); contextRec = (struct intel_xvmc_hw_context *) *priv; if (!contextRec) { *num_priv = 0; return BadAlloc; } *num_priv = sizeof(struct intel_xvmc_hw_context) >> 2; if (IS_GEN3(intel)) { contextRec->type = XVMC_I915_MPEG2_MC; contextRec->i915.use_phys_addr = 0; } else { if (INTEL_INFO(intel)->gen >= 045) contextRec->type = XVMC_I965_MPEG2_VLD; else contextRec->type = XVMC_I965_MPEG2_MC; contextRec->i965.is_g4x = INTEL_INFO(intel)->gen == 045; contextRec->i965.is_965_q = IS_965_Q(intel); contextRec->i965.is_igdng = IS_GEN5(intel); } return Success; } static void destroy_context(ScrnInfoPtr scrn, XvMCContextPtr context) { } /* i915 hwmc support */ static XF86MCSurfaceInfoRec i915_YV12_mpg2_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 720, 576, 720, 576, XVMC_MPEG_2, /* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING, */ 0, /* &yv12_subpicture_list */ NULL, }; static XF86MCSurfaceInfoRec i915_YV12_mpg1_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 720, 576, 720, 576, XVMC_MPEG_1, /* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING, */ 0, NULL, }; static XF86MCSurfaceInfoPtr surface_info_i915[2] = { (XF86MCSurfaceInfoPtr) & i915_YV12_mpg2_surface, (XF86MCSurfaceInfoPtr) & i915_YV12_mpg1_surface }; /* i965 and later hwmc support */ #ifndef XVMC_VLD #define XVMC_VLD 0x00020000 #endif static XF86MCSurfaceInfoRec yv12_mpeg2_vld_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 1936, 1096, 1920, 1080, XVMC_MPEG_2 | XVMC_VLD, XVMC_INTRA_UNSIGNED, NULL }; static XF86MCSurfaceInfoRec yv12_mpeg2_i965_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 1936, 1096, 1920, 1080, XVMC_MPEG_2 | XVMC_MOCOMP, /* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING, */ XVMC_INTRA_UNSIGNED, /* &yv12_subpicture_list */ NULL }; static XF86MCSurfaceInfoRec yv12_mpeg1_i965_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 1920, 1080, 1920, 1080, XVMC_MPEG_1 | XVMC_MOCOMP, /*XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING | XVMC_INTRA_UNSIGNED, */ XVMC_INTRA_UNSIGNED, /*&yv12_subpicture_list */ NULL }; static XF86MCSurfaceInfoPtr surface_info_i965[] = { &yv12_mpeg2_i965_surface, &yv12_mpeg1_i965_surface }; static XF86MCSurfaceInfoPtr surface_info_vld[] = { &yv12_mpeg2_vld_surface, &yv12_mpeg2_i965_surface, }; /* check chip type and load xvmc driver */ Bool intel_xvmc_adaptor_init(ScreenPtr pScreen) { ScrnInfoPtr scrn = xf86ScreenToScrn(pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); struct pci_device *pci; static XF86MCAdaptorRec *pAdapt; char *name; char buf[64]; if (!intel->XvMCEnabled) return FALSE; /* Needs KMS support. */ if (IS_I915G(intel) || IS_I915GM(intel)) return FALSE; if (IS_GEN2(intel)) { ErrorF("Your chipset doesn't support XvMC.\n"); return FALSE; } pci = xf86GetPciInfoForEntity(intel->pEnt->index); if (pci == NULL) return FALSE; pAdapt = calloc(1, sizeof(XF86MCAdaptorRec)); if (!pAdapt) { ErrorF("Allocation error.\n"); return FALSE; } pAdapt->name = "Intel(R) Textured Video"; pAdapt->num_subpictures = 0; pAdapt->subpictures = NULL; pAdapt->CreateContext = create_context; pAdapt->DestroyContext = destroy_context; pAdapt->CreateSurface = create_surface; pAdapt->DestroySurface = destroy_surface; pAdapt->CreateSubpicture = create_subpicture; pAdapt->DestroySubpicture = destroy_subpicture; if (IS_GEN3(intel)) { name = "i915_xvmc", pAdapt->num_surfaces = ARRAY_SIZE(surface_info_i915); pAdapt->surfaces = surface_info_i915; } else if (INTEL_INFO(intel)->gen >= 045) { name = "xvmc_vld", pAdapt->num_surfaces = ARRAY_SIZE(surface_info_vld); pAdapt->surfaces = surface_info_vld; } else { name = "i965_xvmc", pAdapt->num_surfaces = ARRAY_SIZE(surface_info_i965); pAdapt->surfaces = surface_info_i965; } if (xf86XvMCScreenInit(pScreen, 1, &pAdapt)) { xf86DrvMsg(scrn->scrnIndex, X_INFO, "[XvMC] %s driver initialized.\n", name); } else { intel->XvMCEnabled = FALSE; xf86DrvMsg(scrn->scrnIndex, X_INFO, "[XvMC] Failed to initialize XvMC.\n"); return FALSE; } sprintf(buf, "pci:%04x:%02x:%02x.%d", pci->domain, pci->bus, pci->dev, pci->func); xf86XvMCRegisterDRInfo(pScreen, INTEL_XVMC_LIBNAME, buf, INTEL_XVMC_MAJOR, INTEL_XVMC_MINOR, INTEL_XVMC_PATCHLEVEL); return TRUE; } xf86-video-intel-2.99.917/src/uxa/common.h0000664000175000017500000000434312400044327014754 00000000000000 /************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. Copyright © 2002 David Dawes All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * Authors: * Keith Whitwell * David Dawes * */ #ifndef _INTEL_COMMON_H_ #define _INTEL_COMMON_H_ #include /* Provide substitutes for gcc's __FUNCTION__ on other compilers */ #if !defined(__GNUC__) && !defined(__FUNCTION__) # if defined(__STDC__) && (__STDC_VERSION__>=199901L) /* C99 */ # define __FUNCTION__ __func__ # else # define __FUNCTION__ "" # endif #endif #define PFX __FILE__,__LINE__,__FUNCTION__ #define FUNCTION_NAME __FUNCTION__ #define KB(x) ((x) * 1024) #define MB(x) ((x) * KB(1024)) /** * Hints to CreatePixmap to tell the driver how the pixmap is going to be * used. * * Compare to CREATE_PIXMAP_USAGE_* in the server. */ enum { INTEL_CREATE_PIXMAP_TILING_X = 0x10000000, INTEL_CREATE_PIXMAP_TILING_Y = 0x20000000, INTEL_CREATE_PIXMAP_TILING_NONE = 0x40000000, INTEL_CREATE_PIXMAP_DRI2 = 0x80000000, }; #endif /* _INTEL_COMMON_H_ */ xf86-video-intel-2.99.917/src/uxa/intel_batchbuffer.c0000664000175000017500000002105112432737457017142 00000000000000/* -*- c-basic-offset: 4 -*- */ /* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include "xorg-server.h" #include "xf86.h" #include "intel.h" #include "i830_reg.h" #include "i915_drm.h" #include "i965_reg.h" #include "intel_uxa.h" #define DUMP_BATCHBUFFERS NULL // "/tmp/i915-batchbuffers.dump" static void intel_end_vertex(intel_screen_private *intel) { if (intel->vertex_bo) { if (intel->vertex_used) { dri_bo_subdata(intel->vertex_bo, 0, intel->vertex_used*4, intel->vertex_ptr); intel->vertex_used = 0; } dri_bo_unreference(intel->vertex_bo); intel->vertex_bo = NULL; } intel->vertex_id = 0; } void intel_next_vertex(intel_screen_private *intel) { intel_end_vertex(intel); intel->vertex_bo = dri_bo_alloc(intel->bufmgr, "vertex", sizeof (intel->vertex_ptr), 4096); } static dri_bo *bo_alloc(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); int size = 4 * 4096; /* The 865 has issues with larger-than-page-sized batch buffers. */ if (IS_I865G(intel)) size = 4096; return dri_bo_alloc(intel->bufmgr, "batch", size, 4096); } static void intel_next_batch(ScrnInfoPtr scrn, int mode) { intel_screen_private *intel = intel_get_screen_private(scrn); dri_bo *tmp; drm_intel_gem_bo_clear_relocs(intel->batch_bo, 0); tmp = intel->last_batch_bo[mode]; intel->last_batch_bo[mode] = intel->batch_bo; intel->batch_bo = tmp; intel->batch_used = 0; /* We don't know when another client has executed, so we have * to reinitialize our 3D state per batch. */ intel->last_3d = LAST_3D_OTHER; } void intel_batch_init(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); intel->batch_emit_start = 0; intel->batch_emitting = 0; intel->vertex_id = 0; intel->last_batch_bo[0] = bo_alloc(scrn); intel->last_batch_bo[1] = bo_alloc(scrn); intel->batch_bo = bo_alloc(scrn); intel->batch_used = 0; intel->last_3d = LAST_3D_OTHER; } void intel_batch_teardown(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); int i; for (i = 0; i < ARRAY_SIZE(intel->last_batch_bo); i++) { if (intel->last_batch_bo[i] != NULL) { dri_bo_unreference(intel->last_batch_bo[i]); intel->last_batch_bo[i] = NULL; } } if (intel->batch_bo != NULL) { dri_bo_unreference(intel->batch_bo); intel->batch_bo = NULL; } if (intel->vertex_bo) { dri_bo_unreference(intel->vertex_bo); intel->vertex_bo = NULL; } while (!list_is_empty(&intel->batch_pixmaps)) list_del(intel->batch_pixmaps.next); } static void intel_batch_do_flush(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_uxa_pixmap *priv; list_for_each_entry(priv, &intel->batch_pixmaps, batch) priv->dirty = 0; } static void intel_emit_post_sync_nonzero_flush(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); /* keep this entire sequence of 3 PIPE_CONTROL cmds in one batch to * avoid upsetting the gpu. */ BEGIN_BATCH(3*4); OUT_BATCH(BRW_PIPE_CONTROL | (4 - 2)); OUT_BATCH(BRW_PIPE_CONTROL_CS_STALL | BRW_PIPE_CONTROL_STALL_AT_SCOREBOARD); OUT_BATCH(0); /* address */ OUT_BATCH(0); /* write data */ OUT_BATCH(BRW_PIPE_CONTROL | (4 - 2)); OUT_BATCH(BRW_PIPE_CONTROL_WRITE_QWORD); OUT_RELOC(intel->wa_scratch_bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, 0); OUT_BATCH(0); /* write data */ /* now finally the _real flush */ OUT_BATCH(BRW_PIPE_CONTROL | (4 - 2)); OUT_BATCH(BRW_PIPE_CONTROL_WC_FLUSH | BRW_PIPE_CONTROL_TC_FLUSH | BRW_PIPE_CONTROL_NOWRITE); OUT_BATCH(0); /* write address */ OUT_BATCH(0); /* write data */ ADVANCE_BATCH(); } void intel_batch_emit_flush(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); int flags; assert (!intel->in_batch_atomic); /* Big hammer, look to the pipelined flushes in future. */ if ((INTEL_INFO(intel)->gen >= 0100)) { /* Only BLT supported */ BEGIN_BATCH_BLT(4); OUT_BATCH(MI_FLUSH_DW | 2); OUT_BATCH(0); /* address low */ OUT_BATCH(0); /* address high */ OUT_BATCH(0); /* dword data */ ADVANCE_BATCH(); } else if ((INTEL_INFO(intel)->gen >= 060)) { if (intel->current_batch == BLT_BATCH) { BEGIN_BATCH_BLT(4); OUT_BATCH(MI_FLUSH_DW | 2); OUT_BATCH(0); /* address */ OUT_BATCH(0); /* qword low */ OUT_BATCH(0); /* qword high */ ADVANCE_BATCH(); } else { if ((INTEL_INFO(intel)->gen == 060)) { /* HW-Workaround for Sandybdrige */ intel_emit_post_sync_nonzero_flush(scrn); } else { BEGIN_BATCH(4); OUT_BATCH(BRW_PIPE_CONTROL | (4 - 2)); OUT_BATCH(BRW_PIPE_CONTROL_WC_FLUSH | BRW_PIPE_CONTROL_TC_FLUSH | BRW_PIPE_CONTROL_NOWRITE); OUT_BATCH(0); /* write address */ OUT_BATCH(0); /* write data */ ADVANCE_BATCH(); } } } else { flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE; if (INTEL_INFO(intel)->gen >= 040) flags = 0; BEGIN_BATCH(1); OUT_BATCH(MI_FLUSH | flags); ADVANCE_BATCH(); } intel_batch_do_flush(scrn); } void intel_batch_submit(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); int ret; assert (!intel->in_batch_atomic); if (intel->vertex_flush) intel->vertex_flush(intel); intel_end_vertex(intel); if (intel->batch_flush) intel->batch_flush(intel); if (intel->batch_used == 0) return; /* Mark the end of the batchbuffer. */ OUT_BATCH(MI_BATCH_BUFFER_END); /* Emit a padding dword if we aren't going to be quad-word aligned. */ if (intel->batch_used & 1) OUT_BATCH(MI_NOOP); if (DUMP_BATCHBUFFERS) { FILE *file = fopen(DUMP_BATCHBUFFERS, "a"); if (file) { fwrite (intel->batch_ptr, intel->batch_used*4, 1, file); fclose(file); } } ret = dri_bo_subdata(intel->batch_bo, 0, intel->batch_used*4, intel->batch_ptr); if (ret == 0) { ret = drm_intel_bo_mrb_exec(intel->batch_bo, intel->batch_used*4, NULL, 0, 0xffffffff, (HAS_BLT(intel) ? intel->current_batch: I915_EXEC_DEFAULT)); } if (ret != 0) { static int once; if (!once) { if (ret == -EIO) { /* The GPU has hung and unlikely to recover by this point. */ xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Detected a hung GPU, disabling acceleration.\n"); xf86DrvMsg(scrn->scrnIndex, X_ERROR, "When reporting this, please include i915_error_state from debugfs and the full dmesg.\n"); } else { /* The driver is broken. */ xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Failed to submit batch buffer, expect rendering corruption: %s.\n ", strerror(-ret)); } uxa_set_force_fallback(xf86ScrnToScreen(scrn), TRUE); intel->force_fallback = TRUE; once = 1; } } while (!list_is_empty(&intel->batch_pixmaps)) { struct intel_uxa_pixmap *entry; entry = list_first_entry(&intel->batch_pixmaps, struct intel_uxa_pixmap, batch); entry->busy = -1; entry->dirty = 0; list_del(&entry->batch); } if (intel->debug_flush & DEBUG_FLUSH_WAIT) drm_intel_bo_wait_rendering(intel->batch_bo); intel_next_batch(scrn, intel->current_batch == I915_EXEC_BLT); if (intel->batch_commit_notify) intel->batch_commit_notify(intel); intel->current_batch = 0; } void intel_uxa_debug_flush(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); if (intel->debug_flush & DEBUG_FLUSH_CACHES) intel_batch_emit_flush(scrn); if (intel->debug_flush & DEBUG_FLUSH_BATCHES) intel_batch_submit(scrn); } xf86-video-intel-2.99.917/src/uxa/brw_structs.h0000664000175000017500000011361112400044327016044 00000000000000 /************************************************************************** * * Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef BRW_STRUCTS_H #define BRW_STRUCTS_H /* Command packets: */ struct header { unsigned int length:16; unsigned int opcode:16; }; union header_union { struct header bits; unsigned int dword; }; struct brw_3d_control { struct { unsigned int length:8; unsigned int notify_enable:1; unsigned int pad:3; unsigned int wc_flush_enable:1; unsigned int depth_stall_enable:1; unsigned int operation:2; unsigned int opcode:16; } header; struct { unsigned int pad:2; unsigned int dest_addr_type:1; unsigned int dest_addr:29; } dest; unsigned int dword2; unsigned int dword3; }; struct brw_3d_primitive { struct { unsigned int length:8; unsigned int pad:2; unsigned int topology:5; unsigned int indexed:1; unsigned int opcode:16; } header; unsigned int verts_per_instance; unsigned int start_vert_location; unsigned int instance_count; unsigned int start_instance_location; unsigned int base_vert_location; }; /* These seem to be passed around as function args, so it works out * better to keep them as #defines: */ #define BRW_FLUSH_READ_CACHE 0x1 #define BRW_FLUSH_STATE_CACHE 0x2 #define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4 #define BRW_FLUSH_SNAPSHOT_COUNTERS 0x8 struct brw_mi_flush { unsigned int flags:4; unsigned int pad:12; unsigned int opcode:16; }; struct brw_vf_statistics { unsigned int statistics_enable:1; unsigned int pad:15; unsigned int opcode:16; }; struct brw_binding_table_pointers { struct header header; unsigned int vs; unsigned int gs; unsigned int clp; unsigned int sf; unsigned int wm; }; struct brw_blend_constant_color { struct header header; float blend_constant_color[4]; }; struct brw_depthbuffer { union header_union header; union { struct { unsigned int pitch:18; unsigned int format:3; unsigned int pad:4; unsigned int depth_offset_disable:1; unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int pad2:1; unsigned int surface_type:3; } bits; unsigned int dword; } dword1; unsigned int dword2_base_addr; union { struct { unsigned int pad:1; unsigned int mipmap_layout:1; unsigned int lod:4; unsigned int width:13; unsigned int height:13; } bits; unsigned int dword; } dword3; union { struct { unsigned int pad:12; unsigned int min_array_element:9; unsigned int depth:11; } bits; unsigned int dword; } dword4; }; struct brw_drawrect { struct header header; unsigned int xmin:16; unsigned int ymin:16; unsigned int xmax:16; unsigned int ymax:16; unsigned int xorg:16; unsigned int yorg:16; }; struct brw_global_depth_offset_clamp { struct header header; float depth_offset_clamp; }; struct brw_indexbuffer { union { struct { unsigned int length:8; unsigned int index_format:2; unsigned int cut_index_enable:1; unsigned int pad:5; unsigned int opcode:16; } bits; unsigned int dword; } header; unsigned int buffer_start; unsigned int buffer_end; }; struct brw_line_stipple { struct header header; struct { unsigned int pattern:16; unsigned int pad:16; } bits0; struct { unsigned int repeat_count:9; unsigned int pad:7; unsigned int inverse_repeat_count:16; } bits1; }; struct brw_pipelined_state_pointers { struct header header; struct { unsigned int pad:5; unsigned int offset:27; } vs; struct { unsigned int enable:1; unsigned int pad:4; unsigned int offset:27; } gs; struct { unsigned int enable:1; unsigned int pad:4; unsigned int offset:27; } clp; struct { unsigned int pad:5; unsigned int offset:27; } sf; struct { unsigned int pad:5; unsigned int offset:27; } wm; struct { unsigned int pad:5; unsigned int offset:27; /* KW: check me! */ } cc; }; struct brw_polygon_stipple_offset { struct header header; struct { unsigned int y_offset:5; unsigned int pad:3; unsigned int x_offset:5; unsigned int pad0:19; } bits0; }; struct brw_polygon_stipple { struct header header; unsigned int stipple[32]; }; struct brw_pipeline_select { struct { unsigned int pipeline_select:1; unsigned int pad:15; unsigned int opcode:16; } header; }; struct brw_pipe_control { struct { unsigned int length:8; unsigned int notify_enable:1; unsigned int pad:2; unsigned int instruction_state_cache_flush_enable:1; unsigned int write_cache_flush_enable:1; unsigned int depth_stall_enable:1; unsigned int post_sync_operation:2; unsigned int opcode:16; } header; struct { unsigned int pad:2; unsigned int dest_addr_type:1; unsigned int dest_addr:29; } bits1; unsigned int data0; unsigned int data1; }; struct brw_urb_fence { struct { unsigned int length:8; unsigned int vs_realloc:1; unsigned int gs_realloc:1; unsigned int clp_realloc:1; unsigned int sf_realloc:1; unsigned int vfe_realloc:1; unsigned int cs_realloc:1; unsigned int pad:2; unsigned int opcode:16; } header; struct { unsigned int vs_fence:10; unsigned int gs_fence:10; unsigned int clp_fence:10; unsigned int pad:2; } bits0; struct { unsigned int sf_fence:10; unsigned int vf_fence:10; unsigned int cs_fence:10; unsigned int pad:2; } bits1; }; struct brw_constant_buffer_state /* previously brw_command_streamer */ { struct header header; struct { unsigned int nr_urb_entries:3; unsigned int pad:1; unsigned int urb_entry_size:5; unsigned int pad0:23; } bits0; }; struct brw_constant_buffer { struct { unsigned int length:8; unsigned int valid:1; unsigned int pad:7; unsigned int opcode:16; } header; struct { unsigned int buffer_length:6; unsigned int buffer_address:26; } bits0; }; struct brw_state_base_address { struct header header; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int general_state_address:27; } bits0; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int surface_state_address:27; } bits1; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int indirect_object_state_address:27; } bits2; struct { unsigned int modify_enable:1; unsigned int pad:11; unsigned int general_state_upper_bound:20; } bits3; struct { unsigned int modify_enable:1; unsigned int pad:11; unsigned int indirect_object_state_upper_bound:20; } bits4; }; struct brw_state_prefetch { struct header header; struct { unsigned int prefetch_count:3; unsigned int pad:3; unsigned int prefetch_pointer:26; } bits0; }; struct brw_system_instruction_pointer { struct header header; struct { unsigned int pad:4; unsigned int system_instruction_pointer:28; } bits0; }; /* State structs for the various fixed function units: */ struct thread0 { unsigned int pad0:1; unsigned int grf_reg_count:3; unsigned int pad1:2; unsigned int kernel_start_pointer:26; }; struct thread1 { unsigned int ext_halt_exception_enable:1; unsigned int sw_exception_enable:1; unsigned int mask_stack_exception_enable:1; unsigned int timeout_exception_enable:1; unsigned int illegal_op_exception_enable:1; unsigned int pad0:3; unsigned int depth_coef_urb_read_offset:6; /* WM only */ unsigned int pad1:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int binding_table_entry_count:8; unsigned int pad3:5; unsigned int single_program_flow:1; }; struct thread2 { unsigned int per_thread_scratch_space:4; unsigned int pad0:6; unsigned int scratch_space_base_pointer:22; }; struct thread3 { unsigned int dispatch_grf_start_reg:4; unsigned int urb_entry_read_offset:6; unsigned int pad0:1; unsigned int urb_entry_read_length:6; unsigned int pad1:1; unsigned int const_urb_entry_read_offset:6; unsigned int pad2:1; unsigned int const_urb_entry_read_length:6; unsigned int pad3:1; }; struct brw_clip_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:9; unsigned int gs_output_stats:1; /* not always */ unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:6; /* may be less */ unsigned int pad3:1; } thread4; struct { unsigned int pad0:13; unsigned int clip_mode:3; unsigned int userclip_enable_flags:8; unsigned int userclip_must_clip:1; unsigned int pad1:1; unsigned int guard_band_enable:1; unsigned int viewport_z_clip_enable:1; unsigned int viewport_xy_clip_enable:1; unsigned int vertex_position_space:1; unsigned int api_mode:1; unsigned int pad2:1; } clip5; struct { unsigned int pad0:5; unsigned int clipper_viewport_state_ptr:27; } clip6; float viewport_xmin; float viewport_xmax; float viewport_ymin; float viewport_ymax; }; struct brw_cc_unit_state { struct { unsigned int pad0:3; unsigned int bf_stencil_pass_depth_pass_op:3; unsigned int bf_stencil_pass_depth_fail_op:3; unsigned int bf_stencil_fail_op:3; unsigned int bf_stencil_func:3; unsigned int bf_stencil_enable:1; unsigned int pad1:2; unsigned int stencil_write_enable:1; unsigned int stencil_pass_depth_pass_op:3; unsigned int stencil_pass_depth_fail_op:3; unsigned int stencil_fail_op:3; unsigned int stencil_func:3; unsigned int stencil_enable:1; } cc0; struct { unsigned int bf_stencil_ref:8; unsigned int stencil_write_mask:8; unsigned int stencil_test_mask:8; unsigned int stencil_ref:8; } cc1; struct { unsigned int logicop_enable:1; unsigned int pad0:10; unsigned int depth_write_enable:1; unsigned int depth_test_function:3; unsigned int depth_test:1; unsigned int bf_stencil_write_mask:8; unsigned int bf_stencil_test_mask:8; } cc2; struct { unsigned int pad0:8; unsigned int alpha_test_func:3; unsigned int alpha_test:1; unsigned int blend_enable:1; unsigned int ia_blend_enable:1; unsigned int pad1:1; unsigned int alpha_test_format:1; unsigned int pad2:16; } cc3; struct { unsigned int pad0:5; unsigned int cc_viewport_state_offset:27; } cc4; struct { unsigned int pad0:2; unsigned int ia_dest_blend_factor:5; unsigned int ia_src_blend_factor:5; unsigned int ia_blend_function:3; unsigned int statistics_enable:1; unsigned int logicop_func:4; unsigned int pad1:11; unsigned int dither_enable:1; } cc5; struct { unsigned int clamp_post_alpha_blend:1; unsigned int clamp_pre_alpha_blend:1; unsigned int clamp_range:2; unsigned int pad0:11; unsigned int y_dither_offset:2; unsigned int x_dither_offset:2; unsigned int dest_blend_factor:5; unsigned int src_blend_factor:5; unsigned int blend_function:3; } cc6; struct { union { float f; unsigned char ub[4]; } alpha_ref; } cc7; }; struct brw_sf_unit_state { struct thread0 thread0; struct { unsigned int pad0:7; unsigned int sw_exception_enable:1; unsigned int pad1:3; unsigned int mask_stack_exception_enable:1; unsigned int pad2:1; unsigned int illegal_op_exception_enable:1; unsigned int pad3:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int binding_table_entry_count:8; unsigned int pad4:5; unsigned int single_program_flow:1; } sf1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:6; unsigned int pad3:1; } thread4; struct { unsigned int front_winding:1; unsigned int viewport_transform:1; unsigned int pad0:3; unsigned int sf_viewport_state_offset:27; } sf5; struct { unsigned int pad0:9; unsigned int dest_org_vbias:4; unsigned int dest_org_hbias:4; unsigned int scissor:1; unsigned int disable_2x2_trifilter:1; unsigned int disable_zero_pix_trifilter:1; unsigned int point_rast_rule:2; unsigned int line_endcap_aa_region_width:2; unsigned int line_width:4; unsigned int fast_scissor_disable:1; unsigned int cull_mode:2; unsigned int aa_enable:1; } sf6; struct { unsigned int point_size:11; unsigned int use_point_size_state:1; unsigned int subpixel_precision:1; unsigned int sprite_point:1; unsigned int pad0:11; unsigned int trifan_pv:2; unsigned int linestrip_pv:2; unsigned int tristrip_pv:2; unsigned int line_last_pixel_enable:1; } sf7; }; struct brw_gs_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:1; unsigned int pad3:6; } thread4; struct { unsigned int sampler_count:3; unsigned int pad0:2; unsigned int sampler_state_pointer:27; } gs5; struct { unsigned int max_vp_index:4; unsigned int pad0:26; unsigned int reorder_enable:1; unsigned int pad1:1; } gs6; }; struct brw_vs_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:4; unsigned int pad3:3; } thread4; struct { unsigned int sampler_count:3; unsigned int pad0:2; unsigned int sampler_state_pointer:27; } vs5; struct { unsigned int vs_enable:1; unsigned int vert_cache_disable:1; unsigned int pad0:30; } vs6; }; struct brw_wm_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int stats_enable:1; unsigned int pad0:1; unsigned int sampler_count:3; unsigned int sampler_state_pointer:27; } wm4; struct { unsigned int enable_8_pix:1; unsigned int enable_16_pix:1; unsigned int enable_32_pix:1; unsigned int pad0:7; unsigned int legacy_global_depth_bias:1; unsigned int line_stipple:1; unsigned int depth_offset:1; unsigned int polygon_stipple:1; unsigned int line_aa_region_width:2; unsigned int line_endcap_aa_region_width:2; unsigned int early_depth_test:1; unsigned int thread_dispatch_enable:1; unsigned int program_uses_depth:1; unsigned int program_computes_depth:1; unsigned int program_uses_killpixel:1; unsigned int legacy_line_rast: 1; unsigned int transposed_urb_read:1; unsigned int max_threads:7; } wm5; float global_depth_offset_constant; float global_depth_offset_scale; struct { unsigned int pad0:1; unsigned int grf_reg_count_1:3; unsigned int pad1:2; unsigned int kernel_start_pointer_1:26; } wm8; struct { unsigned int pad0:1; unsigned int grf_reg_count_2:3; unsigned int pad1:2; unsigned int kernel_start_pointer_2:26; } wm9; struct { unsigned int pad0:1; unsigned int grf_reg_count_3:3; unsigned int pad1:2; unsigned int kernel_start_pointer_3:26; } wm10; }; struct brw_wm_unit_state_padded { struct brw_wm_unit_state state; char pad[64 - sizeof(struct brw_wm_unit_state)]; }; /* The hardware supports two different modes for border color. The * default (OpenGL) mode uses floating-point color channels, while the * legacy mode uses 4 bytes. * * More significantly, the legacy mode respects the components of the * border color for channels not present in the source, (whereas the * default mode will ignore the border color's alpha channel and use * alpha==1 for an RGB source, for example). * * The legacy mode matches the semantics specified by the Render * extension. */ struct brw_sampler_default_border_color { float color[4]; }; struct brw_sampler_legacy_border_color { uint8_t color[4]; }; struct brw_sampler_state { struct { unsigned int shadow_function:3; unsigned int lod_bias:11; unsigned int min_filter:3; unsigned int mag_filter:3; unsigned int mip_filter:2; unsigned int base_level:5; unsigned int pad:1; unsigned int lod_preclamp:1; unsigned int border_color_mode:1; unsigned int pad0:1; unsigned int disable:1; } ss0; struct { unsigned int r_wrap_mode:3; unsigned int t_wrap_mode:3; unsigned int s_wrap_mode:3; unsigned int pad:3; unsigned int max_lod:10; unsigned int min_lod:10; } ss1; struct { unsigned int pad:5; unsigned int border_color_pointer:27; } ss2; struct { unsigned int pad:19; unsigned int max_aniso:3; unsigned int chroma_key_mode:1; unsigned int chroma_key_index:2; unsigned int chroma_key_enable:1; unsigned int monochrome_filter_width:3; unsigned int monochrome_filter_height:3; } ss3; }; struct brw_clipper_viewport { float xmin; float xmax; float ymin; float ymax; }; struct brw_cc_viewport { float min_depth; float max_depth; }; struct brw_sf_viewport { struct { float m00; float m11; float m22; float m30; float m31; float m32; } viewport; struct { short xmin; short ymin; short xmax; short ymax; } scissor; }; /* Documented in the subsystem/shared-functions/sampler chapter... */ struct brw_surface_state { struct { unsigned int cube_pos_z:1; unsigned int cube_neg_z:1; unsigned int cube_pos_y:1; unsigned int cube_neg_y:1; unsigned int cube_pos_x:1; unsigned int cube_neg_x:1; unsigned int pad:3; unsigned int render_cache_read_mode:1; unsigned int mipmap_layout_mode:1; unsigned int vert_line_stride_ofs:1; unsigned int vert_line_stride:1; unsigned int color_blend:1; unsigned int writedisable_blue:1; unsigned int writedisable_green:1; unsigned int writedisable_red:1; unsigned int writedisable_alpha:1; unsigned int surface_format:9; unsigned int data_return_format:1; unsigned int pad0:1; unsigned int surface_type:3; } ss0; struct { unsigned int base_addr; } ss1; struct { unsigned int render_target_rotation:2; unsigned int mip_count:4; unsigned int width:13; unsigned int height:13; } ss2; struct { unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int pad:1; unsigned int pitch:18; unsigned int depth:11; } ss3; struct { unsigned int pad:19; unsigned int min_array_elt:9; unsigned int min_lod:4; } ss4; struct { unsigned int pad:20; unsigned int y_offset:4; unsigned int pad2:1; unsigned int x_offset:7; } ss5; }; struct brw_vertex_buffer_state { struct { unsigned int pitch:11; unsigned int pad:15; unsigned int access_type:1; unsigned int vb_index:5; } vb0; unsigned int start_addr; unsigned int max_index; #if 1 unsigned int instance_data_step_rate; /* not included for sequential/random vertices? */ #endif }; #define BRW_VBP_MAX 17 struct brw_vb_array_state { struct header header; struct brw_vertex_buffer_state vb[BRW_VBP_MAX]; }; struct brw_vertex_element_state { struct { unsigned int src_offset:11; unsigned int pad:5; unsigned int src_format:9; unsigned int pad0:1; unsigned int valid:1; unsigned int vertex_buffer_index:5; } ve0; struct { unsigned int dst_offset:8; unsigned int pad:8; unsigned int vfcomponent3:4; unsigned int vfcomponent2:4; unsigned int vfcomponent1:4; unsigned int vfcomponent0:4; } ve1; }; #define BRW_VEP_MAX 18 struct brw_vertex_element_packet { struct header header; struct brw_vertex_element_state ve[BRW_VEP_MAX]; /* note: less than _TNL_ATTRIB_MAX */ }; struct brw_urb_immediate { unsigned int opcode:4; unsigned int offset:6; unsigned int swizzle_control:2; unsigned int pad:1; unsigned int allocate:1; unsigned int used:1; unsigned int complete:1; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; }; /* Instruction format for the execution units: */ struct brw_instruction { struct { unsigned int opcode:7; unsigned int pad:1; unsigned int access_mode:1; unsigned int mask_control:1; unsigned int dependency_control:2; unsigned int compression_control:2; unsigned int thread_control:2; unsigned int predicate_control:4; unsigned int predicate_inverse:1; unsigned int execution_size:3; unsigned int destreg__conditonalmod:4; /* destreg - send, conditionalmod - others */ unsigned int pad0:2; unsigned int debug_control:1; unsigned int saturate:1; } header; union { struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int src1_reg_file:2; unsigned int src1_reg_type:3; unsigned int pad:1; unsigned int dest_subreg_nr:5; unsigned int dest_reg_nr:8; unsigned int dest_horiz_stride:2; unsigned int dest_address_mode:1; } da1; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int pad:6; int dest_indirect_offset:10; /* offset against the deref'd address reg */ unsigned int dest_subreg_nr:3; /* subnr for the address reg a0.x */ unsigned int dest_horiz_stride:2; unsigned int dest_address_mode:1; } ia1; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int src1_reg_file:2; unsigned int src1_reg_type:3; unsigned int pad0:1; unsigned int dest_writemask:4; unsigned int dest_subreg_nr:1; unsigned int dest_reg_nr:8; unsigned int pad1:2; unsigned int dest_address_mode:1; } da16; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int pad0:6; unsigned int dest_writemask:4; int dest_indirect_offset:6; unsigned int dest_subreg_nr:3; unsigned int pad1:2; unsigned int dest_address_mode:1; } ia16; } bits1; union { struct { unsigned int src0_subreg_nr:5; unsigned int src0_reg_nr:8; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_horiz_stride:2; unsigned int src0_width:3; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad:6; } da1; struct { int src0_indirect_offset:10; unsigned int src0_subreg_nr:3; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_horiz_stride:2; unsigned int src0_width:3; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad:6; } ia1; struct { unsigned int src0_swz_x:2; unsigned int src0_swz_y:2; unsigned int src0_subreg_nr:1; unsigned int src0_reg_nr:8; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_swz_z:2; unsigned int src0_swz_w:2; unsigned int pad0:1; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } da16; struct { unsigned int src0_swz_x:2; unsigned int src0_swz_y:2; int src0_indirect_offset:6; unsigned int src0_subreg_nr:3; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_swz_z:2; unsigned int src0_swz_w:2; unsigned int pad0:1; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } ia16; } bits2; union { struct { unsigned int src1_subreg_nr:5; unsigned int src1_reg_nr:8; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad:1; unsigned int src1_horiz_stride:2; unsigned int src1_width:3; unsigned int src1_vert_stride:4; unsigned int pad0:7; } da1; struct { unsigned int src1_swz_x:2; unsigned int src1_swz_y:2; unsigned int src1_subreg_nr:1; unsigned int src1_reg_nr:8; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_swz_z:2; unsigned int src1_swz_w:2; unsigned int pad1:1; unsigned int src1_vert_stride:4; unsigned int pad2:7; } da16; struct { int src1_indirect_offset:10; unsigned int src1_subreg_nr:3; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_horiz_stride:2; unsigned int src1_width:3; unsigned int src1_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } ia1; struct { unsigned int src1_swz_x:2; unsigned int src1_swz_y:2; int src1_indirect_offset:6; unsigned int src1_subreg_nr:3; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_swz_z:2; unsigned int src1_swz_w:2; unsigned int pad1:1; unsigned int src1_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad2:6; } ia16; struct { int jump_count:16; /* note: signed */ unsigned int pop_count:4; unsigned int pad0:12; } if_else; struct { unsigned int function:4; unsigned int int_type:1; unsigned int precision:1; unsigned int saturate:1; unsigned int data_type:1; unsigned int pad0:8; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } math; struct { unsigned int binding_table_index:8; unsigned int sampler:4; unsigned int return_format:2; unsigned int msg_type:2; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } sampler; struct brw_urb_immediate urb; struct { unsigned int binding_table_index:8; unsigned int msg_control:4; unsigned int msg_type:2; unsigned int target_cache:2; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } dp_read; struct { unsigned int binding_table_index:8; unsigned int msg_control:3; unsigned int pixel_scoreboard_clear:1; unsigned int msg_type:3; unsigned int send_commit_msg:1; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } dp_write; struct { unsigned int pad:16; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } generic; unsigned int ud; } bits3; }; /* media pipeline */ struct brw_vfe_state { struct { unsigned int per_thread_scratch_space:4; unsigned int pad3:3; unsigned int extend_vfe_state_present:1; unsigned int pad2:2; unsigned int scratch_base:22; } vfe0; struct { unsigned int debug_counter_control:2; unsigned int children_present:1; unsigned int vfe_mode:4; unsigned int pad2:2; unsigned int num_urb_entries:7; unsigned int urb_entry_alloc_size:9; unsigned int max_threads:7; } vfe1; struct { unsigned int pad4:4; unsigned int interface_descriptor_base:28; } vfe2; }; struct brw_vld_state { struct { unsigned int pad6:6; unsigned int scan_order:1; unsigned int intra_vlc_format:1; unsigned int quantizer_scale_type:1; unsigned int concealment_motion_vector:1; unsigned int frame_predict_frame_dct:1; unsigned int top_field_first:1; unsigned int picture_structure:2; unsigned int intra_dc_precision:2; unsigned int f_code_0_0:4; unsigned int f_code_0_1:4; unsigned int f_code_1_0:4; unsigned int f_code_1_1:4; } vld0; struct { unsigned int pad2:9; unsigned int picture_coding_type:2; unsigned int pad:21; } vld1; struct { unsigned int index_0:4; unsigned int index_1:4; unsigned int index_2:4; unsigned int index_3:4; unsigned int index_4:4; unsigned int index_5:4; unsigned int index_6:4; unsigned int index_7:4; } desc_remap_table0; struct { unsigned int index_8:4; unsigned int index_9:4; unsigned int index_10:4; unsigned int index_11:4; unsigned int index_12:4; unsigned int index_13:4; unsigned int index_14:4; unsigned int index_15:4; } desc_remap_table1; }; struct brw_interface_descriptor { struct { unsigned int grf_reg_blocks:4; unsigned int pad:2; unsigned int kernel_start_pointer:26; } desc0; struct { unsigned int pad:7; unsigned int software_exception:1; unsigned int pad2:3; unsigned int maskstack_exception:1; unsigned int pad3:1; unsigned int illegal_opcode_exception:1; unsigned int pad4:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int single_program_flow:1; unsigned int pad5:1; unsigned int const_urb_entry_read_offset:6; unsigned int const_urb_entry_read_len:6; } desc1; struct { unsigned int pad:2; unsigned int sampler_count:3; unsigned int sampler_state_pointer:27; } desc2; struct { unsigned int binding_table_entry_count:5; unsigned int binding_table_pointer:27; } desc3; }; struct gen6_blend_state { struct { unsigned int dest_blend_factor:5; unsigned int source_blend_factor:5; unsigned int pad3:1; unsigned int blend_func:3; unsigned int pad2:1; unsigned int ia_dest_blend_factor:5; unsigned int ia_source_blend_factor:5; unsigned int pad1:1; unsigned int ia_blend_func:3; unsigned int pad0:1; unsigned int ia_blend_enable:1; unsigned int blend_enable:1; } blend0; struct { unsigned int post_blend_clamp_enable:1; unsigned int pre_blend_clamp_enable:1; unsigned int clamp_range:2; unsigned int pad0:4; unsigned int x_dither_offset:2; unsigned int y_dither_offset:2; unsigned int dither_enable:1; unsigned int alpha_test_func:3; unsigned int alpha_test_enable:1; unsigned int pad1:1; unsigned int logic_op_func:4; unsigned int logic_op_enable:1; unsigned int pad2:1; unsigned int write_disable_b:1; unsigned int write_disable_g:1; unsigned int write_disable_r:1; unsigned int write_disable_a:1; unsigned int pad3:1; unsigned int alpha_to_coverage_dither:1; unsigned int alpha_to_one:1; unsigned int alpha_to_coverage:1; } blend1; }; struct gen6_color_calc_state { struct { unsigned int alpha_test_format:1; unsigned int pad0:14; unsigned int round_disable:1; unsigned int bf_stencil_ref:8; unsigned int stencil_ref:8; } cc0; union { float alpha_ref_f; struct { unsigned int ui:8; unsigned int pad0:24; } alpha_ref_fi; } cc1; float constant_r; float constant_g; float constant_b; float constant_a; }; struct gen6_depth_stencil_state { struct { unsigned int pad0:3; unsigned int bf_stencil_pass_depth_pass_op:3; unsigned int bf_stencil_pass_depth_fail_op:3; unsigned int bf_stencil_fail_op:3; unsigned int bf_stencil_func:3; unsigned int bf_stencil_enable:1; unsigned int pad1:2; unsigned int stencil_write_enable:1; unsigned int stencil_pass_depth_pass_op:3; unsigned int stencil_pass_depth_fail_op:3; unsigned int stencil_fail_op:3; unsigned int stencil_func:3; unsigned int stencil_enable:1; } ds0; struct { unsigned int bf_stencil_write_mask:8; unsigned int bf_stencil_test_mask:8; unsigned int stencil_write_mask:8; unsigned int stencil_test_mask:8; } ds1; struct { unsigned int pad0:26; unsigned int depth_write_enable:1; unsigned int depth_test_func:3; unsigned int pad1:1; unsigned int depth_test_enable:1; } ds2; }; struct gen7_surface_state { struct { unsigned int cube_pos_z:1; unsigned int cube_neg_z:1; unsigned int cube_pos_y:1; unsigned int cube_neg_y:1; unsigned int cube_pos_x:1; unsigned int cube_neg_x:1; unsigned int pad2:2; unsigned int render_cache_read_write:1; unsigned int pad1:1; unsigned int surface_array_spacing:1; unsigned int vert_line_stride_ofs:1; unsigned int vert_line_stride:1; unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int horizontal_alignment:1; unsigned int vertical_alignment:2; unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */ unsigned int pad0:1; unsigned int is_array:1; unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ } ss0; struct { unsigned int base_addr; } ss1; struct { unsigned int width:14; unsigned int pad1:2; unsigned int height:14; unsigned int pad0:2; } ss2; struct { unsigned int pitch:18; unsigned int pad:3; unsigned int depth:11; } ss3; struct { unsigned int multisample_position_palette_index:3; unsigned int num_multisamples:3; unsigned int multisampled_surface_storage_format:1; unsigned int render_target_view_extent:11; unsigned int min_array_elt:11; unsigned int rotation:2; unsigned int pad0:1; } ss4; struct { unsigned int mip_count:4; unsigned int min_lod:4; unsigned int pad1:12; unsigned int y_offset:4; unsigned int pad0:1; unsigned int x_offset:7; } ss5; struct { unsigned int pad; /* Multisample Control Surface stuff */ } ss6; struct { unsigned int resource_min_lod:12; unsigned int pad0:4; unsigned int shader_chanel_select_a:3; unsigned int shader_chanel_select_b:3; unsigned int shader_chanel_select_g:3; unsigned int shader_chanel_select_r:3; unsigned int alpha_clear_color:1; unsigned int blue_clear_color:1; unsigned int green_clear_color:1; unsigned int red_clear_color:1; } ss7; }; struct gen7_sampler_state { struct { unsigned int aniso_algorithm:1; unsigned int lod_bias:13; unsigned int min_filter:3; unsigned int mag_filter:3; unsigned int mip_filter:2; unsigned int base_level:5; unsigned int pad1:1; unsigned int lod_preclamp:1; unsigned int default_color_mode:1; unsigned int pad0:1; unsigned int disable:1; } ss0; struct { unsigned int cube_control_mode:1; unsigned int shadow_function:3; unsigned int pad:4; unsigned int max_lod:12; unsigned int min_lod:12; } ss1; struct { unsigned int pad:5; unsigned int default_color_pointer:27; } ss2; struct { unsigned int r_wrap_mode:3; unsigned int t_wrap_mode:3; unsigned int s_wrap_mode:3; unsigned int pad:1; unsigned int non_normalized_coord:1; unsigned int trilinear_quality:2; unsigned int address_round:6; unsigned int max_aniso:3; unsigned int chroma_key_mode:1; unsigned int chroma_key_index:2; unsigned int chroma_key_enable:1; unsigned int pad0:6; } ss3; }; #endif xf86-video-intel-2.99.917/src/uxa/intel_uxa.h0000664000175000017500000002463312432737457015502 00000000000000/* * Copyright © 2014 Keith Packard * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that copyright * notice and this permission notice appear in supporting documentation, and * that the name of the copyright holders not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. The copyright holders make no representations * about the suitability of this software for any purpose. It is provided "as * is" without express or implied warranty. * * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE * OF THIS SOFTWARE. */ #ifndef _INTEL_UXA_H_ #define _INTEL_UXA_H_ #include "intel_video.h" #include "uxa.h" struct intel_uxa_pixmap { dri_bo *bo; struct list batch; uint8_t tiling; int8_t busy :2; uint8_t dirty :1; uint8_t offscreen :1; uint8_t pinned :5; #define PIN_SCANOUT 0x1 #define PIN_DRI2 0x2 #define PIN_DRI3 0x4 #define PIN_PRIME 0x8 }; #if HAS_DEVPRIVATEKEYREC extern DevPrivateKeyRec uxa_pixmap_index; #else extern int uxa_pixmap_index; #endif static inline struct intel_uxa_pixmap *intel_uxa_get_pixmap_private(PixmapPtr pixmap) { #if HAS_DEVPRIVATEKEYREC return dixGetPrivate(&pixmap->devPrivates, &uxa_pixmap_index); #else return dixLookupPrivate(&pixmap->devPrivates, &uxa_pixmap_index); #endif } static inline Bool intel_uxa_pixmap_is_busy(struct intel_uxa_pixmap *priv) { if (priv->busy == -1) priv->busy = drm_intel_bo_busy(priv->bo); return priv->busy; } static inline void intel_uxa_set_pixmap_private(PixmapPtr pixmap, struct intel_uxa_pixmap *intel) { dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, intel); } static inline Bool intel_uxa_pixmap_is_dirty(PixmapPtr pixmap) { return pixmap && intel_uxa_get_pixmap_private(pixmap)->dirty; } static inline Bool intel_uxa_pixmap_tiled(PixmapPtr pixmap) { return intel_uxa_get_pixmap_private(pixmap)->tiling != I915_TILING_NONE; } dri_bo *intel_uxa_get_pixmap_bo(PixmapPtr pixmap); void intel_uxa_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo); Bool intel_uxa_init(ScreenPtr pScreen); Bool intel_uxa_create_screen_resources(ScreenPtr pScreen); void intel_uxa_block_handler(intel_screen_private *intel); static inline Bool intel_uxa_pixmap_is_offscreen(PixmapPtr pixmap) { struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap); return priv && priv->offscreen; } /* Batchbuffer support macros and functions */ #include "intel_batchbuffer.h" /* I830 specific functions */ extern void IntelEmitInvarientState(ScrnInfoPtr scrn); extern void I830EmitInvarientState(ScrnInfoPtr scrn); extern void I915EmitInvarientState(ScrnInfoPtr scrn); extern void I830EmitFlush(ScrnInfoPtr scrn); /* i830_render.c */ Bool i830_check_composite(int op, PicturePtr sourcec, PicturePtr mask, PicturePtr dest, int width, int height); Bool i830_check_composite_target(PixmapPtr pixmap); Bool i830_check_composite_texture(ScreenPtr screen, PicturePtr picture); Bool i830_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask, PicturePtr dest, PixmapPtr sourcecPixmap, PixmapPtr maskPixmap, PixmapPtr destPixmap); void i830_composite(PixmapPtr dest, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h); void i830_vertex_flush(intel_screen_private *intel); /* i915_render.c */ Bool i915_check_composite(int op, PicturePtr sourcec, PicturePtr mask, PicturePtr dest, int width, int height); Bool i915_check_composite_target(PixmapPtr pixmap); Bool i915_check_composite_texture(ScreenPtr screen, PicturePtr picture); Bool i915_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask, PicturePtr dest, PixmapPtr sourcecPixmap, PixmapPtr maskPixmap, PixmapPtr destPixmap); void i915_composite(PixmapPtr dest, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h); void i915_vertex_flush(intel_screen_private *intel); void i915_batch_commit_notify(intel_screen_private *intel); void i830_batch_commit_notify(intel_screen_private *intel); /* i965_render.c */ unsigned int gen4_render_state_size(ScrnInfoPtr scrn); void gen4_render_state_init(ScrnInfoPtr scrn); void gen4_render_state_cleanup(ScrnInfoPtr scrn); Bool i965_check_composite(int op, PicturePtr sourcec, PicturePtr mask, PicturePtr dest, int width, int height); Bool i965_check_composite_texture(ScreenPtr screen, PicturePtr picture); Bool i965_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask, PicturePtr dest, PixmapPtr sourcecPixmap, PixmapPtr maskPixmap, PixmapPtr destPixmap); void i965_composite(PixmapPtr dest, int srcX, int srcY, int maskX, int maskY, int dstX, int dstY, int w, int h); void i965_vertex_flush(intel_screen_private *intel); void i965_batch_flush(intel_screen_private *intel); void i965_batch_commit_notify(intel_screen_private *intel); /* i965_3d.c */ void gen6_upload_invariant_states(intel_screen_private *intel); void gen6_upload_viewport_state_pointers(intel_screen_private *intel, drm_intel_bo *cc_vp_bo); void gen7_upload_viewport_state_pointers(intel_screen_private *intel, drm_intel_bo *cc_vp_bo); void gen6_upload_urb(intel_screen_private *intel); void gen7_upload_urb(intel_screen_private *intel); void gen6_upload_cc_state_pointers(intel_screen_private *intel, drm_intel_bo *blend_bo, drm_intel_bo *cc_bo, drm_intel_bo *depth_stencil_bo, uint32_t blend_offset); void gen7_upload_cc_state_pointers(intel_screen_private *intel, drm_intel_bo *blend_bo, drm_intel_bo *cc_bo, drm_intel_bo *depth_stencil_bo, uint32_t blend_offset); void gen6_upload_sampler_state_pointers(intel_screen_private *intel, drm_intel_bo *sampler_bo); void gen7_upload_sampler_state_pointers(intel_screen_private *intel, drm_intel_bo *sampler_bo); void gen7_upload_bypass_states(intel_screen_private *intel); void gen6_upload_gs_state(intel_screen_private *intel); void gen6_upload_vs_state(intel_screen_private *intel); void gen6_upload_clip_state(intel_screen_private *intel); void gen6_upload_sf_state(intel_screen_private *intel, int num_sf_outputs, int read_offset); void gen7_upload_sf_state(intel_screen_private *intel, int num_sf_outputs, int read_offset); void gen6_upload_binding_table(intel_screen_private *intel, uint32_t ps_binding_table_offset); void gen7_upload_binding_table(intel_screen_private *intel, uint32_t ps_binding_table_offset); void gen6_upload_depth_buffer_state(intel_screen_private *intel); void gen7_upload_depth_buffer_state(intel_screen_private *intel); Bool intel_uxa_transform_is_affine(PictTransformPtr t); Bool intel_uxa_get_transformed_coordinates(int x, int y, PictTransformPtr transform, float *x_out, float *y_out); Bool intel_uxa_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform, float *x_out, float *y_out, float *z_out); static inline void intel_uxa_debug_fallback(ScrnInfoPtr scrn, const char *format, ...) _X_ATTRIBUTE_PRINTF(2, 3); static inline void intel_uxa_debug_fallback(ScrnInfoPtr scrn, const char *format, ...) { intel_screen_private *intel = intel_get_screen_private(scrn); va_list ap; va_start(ap, format); if (intel->fallback_debug) { xf86DrvMsg(scrn->scrnIndex, X_INFO, "fallback: "); LogVMessageVerb(X_INFO, 1, format, ap); } va_end(ap); } static inline Bool intel_uxa_check_pitch_2d(PixmapPtr pixmap) { uint32_t pitch = intel_pixmap_pitch(pixmap); if (pitch > KB(32)) { ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen); intel_uxa_debug_fallback(scrn, "pitch exceeds 2d limit 32K\n"); return FALSE; } return TRUE; } /* For pre-965 chip only, as they have 8KB limit for 3D */ static inline Bool intel_uxa_check_pitch_3d(PixmapPtr pixmap) { uint32_t pitch = intel_pixmap_pitch(pixmap); if (pitch > KB(8)) { ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen); intel_uxa_debug_fallback(scrn, "pitch exceeds 3d limit 8K\n"); return FALSE; } return TRUE; } /** * Little wrapper around drm_intel_bo_reloc to return the initial value you * should stuff into the relocation entry. * * If only we'd done this before settling on the library API. */ static inline uint32_t intel_uxa_emit_reloc(drm_intel_bo * bo, uint32_t offset, drm_intel_bo * target_bo, uint32_t target_offset, uint32_t read_domains, uint32_t write_domain) { drm_intel_bo_emit_reloc(bo, offset, target_bo, target_offset, read_domains, write_domain); return target_bo->offset + target_offset; } static inline drm_intel_bo *intel_uxa_bo_alloc_for_data(intel_screen_private *intel, const void *data, unsigned int size, const char *name) { drm_intel_bo *bo; int ret; bo = drm_intel_bo_alloc(intel->bufmgr, name, size, 4096); assert(bo); ret = drm_intel_bo_subdata(bo, 0, size, data); assert(ret == 0); return bo; (void)ret; } void intel_uxa_debug_flush(ScrnInfoPtr scrn); Bool intel_uxa_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table, int num_bos); XF86VideoAdaptorPtr intel_uxa_video_setup_image_textured(ScreenPtr screen); void I915DisplayVideoTextured(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, int id, RegionPtr dstRegion, short width, short height, int video_pitch, int video_pitch2, short src_w, short src_h, short drw_w, short drw_h, PixmapPtr pixmap); void I965DisplayVideoTextured(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, int id, RegionPtr dstRegion, short width, short height, int video_pitch, int video_pitch2, short src_w, short src_h, short drw_w, short drw_h, PixmapPtr pixmap); void Gen6DisplayVideoTextured(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, int id, RegionPtr dstRegion, short width, short height, int video_pitch, int video_pitch2, short src_w, short src_h, short drw_w, short drw_h, PixmapPtr pixmap); void i965_free_video(ScrnInfoPtr scrn); #endif /* _INTEL_UXA_H_ */ xf86-video-intel-2.99.917/src/uxa/intel_uxa.c0000664000175000017500000011104112432737457015463 00000000000000/************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved. Copyright (c) 2005 Jesse Barnes Based on code from i830_xaa.c. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "xorg-server.h" #include #include #include #include #include #include #include "intel.h" #include "intel_uxa.h" #include "i830_reg.h" #include "i915_drm.h" #include "brw_defines.h" static const int I830CopyROP[16] = { ROP_0, /* GXclear */ ROP_DSa, /* GXand */ ROP_SDna, /* GXandReverse */ ROP_S, /* GXcopy */ ROP_DSna, /* GXandInverted */ ROP_D, /* GXnoop */ ROP_DSx, /* GXxor */ ROP_DSo, /* GXor */ ROP_DSon, /* GXnor */ ROP_DSxn, /* GXequiv */ ROP_Dn, /* GXinvert */ ROP_SDno, /* GXorReverse */ ROP_Sn, /* GXcopyInverted */ ROP_DSno, /* GXorInverted */ ROP_DSan, /* GXnand */ ROP_1 /* GXset */ }; static const int I830PatternROP[16] = { ROP_0, ROP_DPa, ROP_PDna, ROP_P, ROP_DPna, ROP_D, ROP_DPx, ROP_DPo, ROP_DPon, ROP_PDxn, ROP_Dn, ROP_PDno, ROP_Pn, ROP_DPno, ROP_DPan, ROP_1 }; #if HAS_DEVPRIVATEKEYREC DevPrivateKeyRec uxa_pixmap_index; #else int uxa_pixmap_index; #endif static void gen6_context_switch(intel_screen_private *intel, int new_mode) { intel_batch_submit(intel->scrn); } static void gen5_context_switch(intel_screen_private *intel, int new_mode) { /* Ironlake has a limitation that a 3D or Media command can't * be the first command after a BLT, unless it's * non-pipelined. Instead of trying to track it and emit a * command at the right time, we just emit a dummy * non-pipelined 3D instruction after each blit. */ if (new_mode == I915_EXEC_BLT) { OUT_BATCH(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH); } else { OUT_BATCH(CMD_POLY_STIPPLE_OFFSET << 16); OUT_BATCH(0); } } static void gen4_context_switch(intel_screen_private *intel, int new_mode) { if (new_mode == I915_EXEC_BLT) { OUT_BATCH(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH); } } Bool intel_uxa_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table, int num_bos) { intel_screen_private *intel = intel_get_screen_private(scrn); if (intel->batch_bo == NULL) { intel_uxa_debug_fallback(scrn, "VT inactive\n"); return FALSE; } bo_table[0] = intel->batch_bo; if (drm_intel_bufmgr_check_aperture_space(bo_table, num_bos) != 0) { intel_batch_submit(scrn); bo_table[0] = intel->batch_bo; if (drm_intel_bufmgr_check_aperture_space(bo_table, num_bos) != 0) { intel_uxa_debug_fallback(scrn, "Couldn't get aperture " "space for BOs\n"); return FALSE; } } return TRUE; } static Bool intel_uxa_check_solid(DrawablePtr drawable, int alu, Pixel planemask) { ScrnInfoPtr scrn = xf86ScreenToScrn(drawable->pScreen); if (!UXA_PM_IS_SOLID(drawable, planemask)) { intel_uxa_debug_fallback(scrn, "planemask is not solid\n"); return FALSE; } switch (drawable->bitsPerPixel) { case 8: case 16: case 32: break; default: return FALSE; } return TRUE; } /** * Sets up hardware state for a series of solid fills. */ static Bool intel_uxa_prepare_solid(PixmapPtr pixmap, int alu, Pixel planemask, Pixel fg) { ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); drm_intel_bo *bo_table[] = { NULL, /* batch_bo */ intel_uxa_get_pixmap_bo(pixmap), }; if (!intel_uxa_check_pitch_2d(pixmap)) return FALSE; if (!intel_uxa_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table))) return FALSE; intel->BR[13] = (I830PatternROP[alu] & 0xff) << 16; switch (pixmap->drawable.bitsPerPixel) { case 8: break; case 16: /* RGB565 */ intel->BR[13] |= (1 << 24); break; case 32: /* RGB8888 */ intel->BR[13] |= ((1 << 24) | (1 << 25)); break; } intel->BR[16] = fg; return TRUE; } static void intel_uxa_solid(PixmapPtr pixmap, int x1, int y1, int x2, int y2) { ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); unsigned long pitch; uint32_t cmd; if (x1 < 0) x1 = 0; if (y1 < 0) y1 = 0; if (x2 > pixmap->drawable.width) x2 = pixmap->drawable.width; if (y2 > pixmap->drawable.height) y2 = pixmap->drawable.height; if (x2 <= x1 || y2 <= y1) return; pitch = intel_pixmap_pitch(pixmap); { int len = INTEL_INFO(intel)->gen >= 0100 ? 7 : 6; BEGIN_BATCH_BLT(len); cmd = XY_COLOR_BLT_CMD | (len - 2); if (pixmap->drawable.bitsPerPixel == 32) cmd |= XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB; if (INTEL_INFO(intel)->gen >= 040 && intel_uxa_pixmap_tiled(pixmap)) { assert((pitch % 512) == 0); pitch >>= 2; cmd |= XY_COLOR_BLT_TILED; } OUT_BATCH(cmd); OUT_BATCH(intel->BR[13] | pitch); OUT_BATCH((y1 << 16) | (x1 & 0xffff)); OUT_BATCH((y2 << 16) | (x2 & 0xffff)); OUT_RELOC_PIXMAP_FENCED(pixmap, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH(intel->BR[16]); ADVANCE_BATCH(); } } /** * TODO: * - support planemask using FULL_BLT_CMD? */ static Bool intel_uxa_check_copy(PixmapPtr source, PixmapPtr dest, int alu, Pixel planemask) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest->drawable.pScreen); if (!UXA_PM_IS_SOLID(&source->drawable, planemask)) { intel_uxa_debug_fallback(scrn, "planemask is not solid"); return FALSE; } if (source->drawable.bitsPerPixel != dest->drawable.bitsPerPixel) { intel_uxa_debug_fallback(scrn, "mixed bpp copies unsupported\n"); return FALSE; } switch (source->drawable.bitsPerPixel) { case 8: case 16: case 32: break; default: return FALSE; } if (!intel_uxa_check_pitch_2d(source)) return FALSE; if (!intel_uxa_check_pitch_2d(dest)) return FALSE; return TRUE; } static Bool intel_uxa_prepare_copy(PixmapPtr source, PixmapPtr dest, int xdir, int ydir, int alu, Pixel planemask) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); drm_intel_bo *bo_table[] = { NULL, /* batch_bo */ intel_uxa_get_pixmap_bo(source), intel_uxa_get_pixmap_bo(dest), }; if (!intel_uxa_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table))) return FALSE; intel->render_source = source; intel->BR[13] = I830CopyROP[alu] << 16; switch (source->drawable.bitsPerPixel) { case 8: break; case 16: intel->BR[13] |= (1 << 24); break; case 32: intel->BR[13] |= ((1 << 25) | (1 << 24)); break; } return TRUE; } static void intel_uxa_copy(PixmapPtr dest, int src_x1, int src_y1, int dst_x1, int dst_y1, int w, int h) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); uint32_t cmd; int dst_x2, dst_y2, src_x2, src_y2; unsigned int dst_pitch, src_pitch; dst_x2 = dst_x1 + w; dst_y2 = dst_y1 + h; /* XXX Fixup extents as a lamentable workaround for missing * source clipping in the upper layers. */ if (dst_x1 < 0) src_x1 -= dst_x1, dst_x1 = 0; if (dst_y1 < 0) src_y1 -= dst_y1, dst_y1 = 0; if (dst_x2 > dest->drawable.width) dst_x2 = dest->drawable.width; if (dst_y2 > dest->drawable.height) dst_y2 = dest->drawable.height; src_x2 = src_x1 + (dst_x2 - dst_x1); src_y2 = src_y1 + (dst_y2 - dst_y1); if (src_x1 < 0) dst_x1 -= src_x1, src_x1 = 0; if (src_y1 < 0) dst_y1 -= src_y1, src_y1 = 0; if (src_x2 > intel->render_source->drawable.width) dst_x2 -= src_x2 - intel->render_source->drawable.width; if (src_y2 > intel->render_source->drawable.height) dst_y2 -= src_y2 - intel->render_source->drawable.height; if (dst_x2 <= dst_x1 || dst_y2 <= dst_y1) return; dst_pitch = intel_pixmap_pitch(dest); src_pitch = intel_pixmap_pitch(intel->render_source); { int len = INTEL_INFO(intel)->gen >= 0100 ? 10 : 8; BEGIN_BATCH_BLT(len); cmd = XY_SRC_COPY_BLT_CMD | (len - 2); if (dest->drawable.bitsPerPixel == 32) cmd |= XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB; if (INTEL_INFO(intel)->gen >= 040) { if (intel_uxa_pixmap_tiled(dest)) { assert((dst_pitch % 512) == 0); dst_pitch >>= 2; cmd |= XY_SRC_COPY_BLT_DST_TILED; } if (intel_uxa_pixmap_tiled(intel->render_source)) { assert((src_pitch % 512) == 0); src_pitch >>= 2; cmd |= XY_SRC_COPY_BLT_SRC_TILED; } } OUT_BATCH(cmd); OUT_BATCH(intel->BR[13] | dst_pitch); OUT_BATCH((dst_y1 << 16) | (dst_x1 & 0xffff)); OUT_BATCH((dst_y2 << 16) | (dst_x2 & 0xffff)); OUT_RELOC_PIXMAP_FENCED(dest, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0); OUT_BATCH((src_y1 << 16) | (src_x1 & 0xffff)); OUT_BATCH(src_pitch); OUT_RELOC_PIXMAP_FENCED(intel->render_source, I915_GEM_DOMAIN_RENDER, 0, 0); ADVANCE_BATCH(); } } static void intel_uxa_done(PixmapPtr pixmap) { ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); if (INTEL_INFO(intel)->gen >= 060) { /* workaround a random BLT hang */ BEGIN_BATCH_BLT(3); OUT_BATCH(XY_SETUP_CLIP_BLT_CMD | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); ADVANCE_BATCH(); } intel_uxa_debug_flush(scrn); } /** * Do any cleanup from the Composite operation. * * This is shared between i830 through i965. */ static void i830_done_composite(PixmapPtr dest) { ScrnInfoPtr scrn = xf86ScreenToScrn(dest->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); if (intel->vertex_flush) intel->vertex_flush(intel); intel_uxa_debug_flush(scrn); } #define xFixedToFloat(val) \ ((float)xFixedToInt(val) + ((float)xFixedFrac(val) / 65536.0)) static Bool _intel_transform_point(PictTransformPtr transform, float x, float y, float result[3]) { int j; for (j = 0; j < 3; j++) { result[j] = (xFixedToFloat(transform->matrix[j][0]) * x + xFixedToFloat(transform->matrix[j][1]) * y + xFixedToFloat(transform->matrix[j][2])); } if (!result[2]) return FALSE; return TRUE; } /** * Returns the floating-point coordinates transformed by the given transform. * * transform may be null. */ Bool intel_uxa_get_transformed_coordinates(int x, int y, PictTransformPtr transform, float *x_out, float *y_out) { if (transform == NULL) { *x_out = x; *y_out = y; } else { float result[3]; if (!_intel_transform_point(transform, x, y, result)) return FALSE; *x_out = result[0] / result[2]; *y_out = result[1] / result[2]; } return TRUE; } /** * Returns the un-normalized floating-point coordinates transformed by the given transform. * * transform may be null. */ Bool intel_uxa_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform, float *x_out, float *y_out, float *w_out) { if (transform == NULL) { *x_out = x; *y_out = y; *w_out = 1; } else { float result[3]; if (!_intel_transform_point(transform, x, y, result)) return FALSE; *x_out = result[0]; *y_out = result[1]; *w_out = result[2]; } return TRUE; } /** * Returns whether the provided transform is affine. * * transform may be null. */ Bool intel_uxa_transform_is_affine(PictTransformPtr t) { if (t == NULL) return TRUE; return t->matrix[2][0] == 0 && t->matrix[2][1] == 0; } dri_bo *intel_uxa_get_pixmap_bo(PixmapPtr pixmap) { struct intel_uxa_pixmap *intel; intel = intel_uxa_get_pixmap_private(pixmap); if (intel == NULL) return NULL; return intel->bo; } static unsigned intel_get_tile_width(intel_screen_private *intel, int tiling, int pitch) { unsigned long tile_width; if (tiling == I915_TILING_NONE) return 4; tile_width = (tiling == I915_TILING_Y) ? 128 : 512; if (INTEL_INFO(intel)->gen >= 040) return tile_width; while (tile_width < pitch) tile_width <<= 1; return tile_width; } void intel_uxa_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo) { ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_uxa_pixmap *priv; priv = intel_uxa_get_pixmap_private(pixmap); if (priv == NULL && bo == NULL) return; if (priv != NULL) { if (priv->bo == bo) return; free_priv: dri_bo_unreference(priv->bo); list_del(&priv->batch); free(priv); priv = NULL; } if (bo != NULL) { uint32_t tiling, swizzle_mode; unsigned tile_width; int size, stride; priv = calloc(1, sizeof (struct intel_uxa_pixmap)); if (priv == NULL) goto BAIL; list_init(&priv->batch); dri_bo_reference(bo); priv->bo = bo; if (drm_intel_bo_get_tiling(bo, &tiling, &swizzle_mode)) { bo = NULL; goto free_priv; } priv->tiling = tiling; priv->busy = -1; priv->offscreen = 1; stride = (pixmap->drawable.width * pixmap->drawable.bitsPerPixel + 7) / 8; tile_width = intel_get_tile_width(intel, tiling, stride); stride = ALIGN(stride, tile_width); if (intel_pixmap_pitch(pixmap) < stride || intel_pixmap_pitch(pixmap) & (tile_width - 1) || intel_pixmap_pitch(pixmap) >= KB(32)) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "%s: stride on buffer object does not match constraints: stride=%d, must be greater than %d, but less than %d, and have alignment at least %d\n", __FUNCTION__, intel_pixmap_pitch(pixmap), stride, KB(32), tile_width); bo = NULL; goto free_priv; } if (tiling != I915_TILING_NONE) { int height; if (IS_GEN2(intel)) height = 16; else if (tiling == I915_TILING_X) height = 8; else height = 32; height = ALIGN(pixmap->drawable.height, height); size = intel_get_fence_size(intel, intel_pixmap_pitch(pixmap) * height); } else size = intel_pixmap_pitch(pixmap) * pixmap->drawable.height; if (bo->size < size || bo->size > intel->max_bo_size) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "%s: size of buffer object does not match constraints: size=%ld, must be greater than %d, but less than %d\n", __FUNCTION__, (long)bo->size, size, intel->max_bo_size); bo = NULL; goto free_priv; } } BAIL: intel_uxa_set_pixmap_private(pixmap, priv); } static Bool intel_uxa_prepare_access(PixmapPtr pixmap, uxa_access_t access) { ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap); dri_bo *bo = priv->bo; int ret; /* When falling back to swrast, flush all pending operations */ if (access == UXA_ACCESS_RW || priv->dirty) intel_batch_submit(scrn); assert(bo->size <= intel->max_gtt_map_size); ret = drm_intel_gem_bo_map_gtt(bo); if (ret) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "%s: bo map (use gtt? %d, access %d) failed: %s\n", __FUNCTION__, priv->tiling || bo->size <= intel->max_gtt_map_size, access, strerror(-ret)); return FALSE; } pixmap->devPrivate.ptr = bo->virtual; priv->busy = 0; return TRUE; } static void intel_uxa_finish_access(PixmapPtr pixmap, uxa_access_t access) { struct intel_uxa_pixmap *priv; priv = intel_uxa_get_pixmap_private(pixmap); if (priv == NULL) return; drm_intel_gem_bo_unmap_gtt(priv->bo); pixmap->devPrivate.ptr = NULL; } static Bool intel_uxa_pixmap_put_image(PixmapPtr pixmap, char *src, int src_pitch, int x, int y, int w, int h) { struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap); int stride = intel_pixmap_pitch(pixmap); int cpp = pixmap->drawable.bitsPerPixel/8; int ret = FALSE; if (priv == NULL || priv->bo == NULL) return FALSE; if (priv->tiling == I915_TILING_NONE && (h == 1 || (src_pitch == stride && w == pixmap->drawable.width))) { return drm_intel_bo_subdata(priv->bo, y*stride + x*cpp, stride*(h-1) + w*cpp, src) == 0; } else if (drm_intel_gem_bo_map_gtt(priv->bo) == 0) { char *dst = priv->bo->virtual; int row_length = w * cpp; int num_rows = h; if (row_length == src_pitch && src_pitch == stride) num_rows = 1, row_length *= h; dst += y * stride + x * cpp; do { memcpy (dst, src, row_length); src += src_pitch; dst += stride; } while (--num_rows); drm_intel_gem_bo_unmap_gtt(priv->bo); ret = TRUE; } return ret; } static Bool intel_uxa_put_image(PixmapPtr pixmap, int x, int y, int w, int h, char *src, int src_pitch) { struct intel_uxa_pixmap *priv; priv = intel_uxa_get_pixmap_private(pixmap); if (!intel_uxa_pixmap_is_busy(priv)) { /* bo is not busy so can be replaced without a stall, upload in-place. */ return intel_uxa_pixmap_put_image(pixmap, src, src_pitch, x, y, w, h); } else { ScreenPtr screen = pixmap->drawable.pScreen; if (!priv->pinned && x == 0 && y == 0 && w == pixmap->drawable.width && h == pixmap->drawable.height) { intel_screen_private *intel = intel_get_screen_private(xf86ScreenToScrn(screen)); uint32_t tiling = priv->tiling; int size, stride; dri_bo *bo; /* Replace busy bo. */ size = intel_compute_size(intel, w, h, pixmap->drawable.bitsPerPixel, pixmap->usage_hint, &tiling, &stride); if (size > intel->max_gtt_map_size) return FALSE; bo = drm_intel_bo_alloc(intel->bufmgr, "pixmap", size, 0); if (bo == NULL) return FALSE; if (tiling != I915_TILING_NONE) drm_intel_bo_set_tiling(bo, &tiling, stride); priv->tiling = tiling; screen->ModifyPixmapHeader(pixmap, w, h, 0, 0, stride, NULL); intel_uxa_set_pixmap_bo(pixmap, bo); dri_bo_unreference(bo); return intel_uxa_pixmap_put_image(pixmap, src, src_pitch, 0, 0, w, h); } else { PixmapPtr scratch; Bool ret; /* Upload to a linear buffer and queue a blit. */ scratch = (*screen->CreatePixmap)(screen, w, h, pixmap->drawable.depth, UXA_CREATE_PIXMAP_FOR_MAP); if (!scratch) return FALSE; if (!intel_uxa_pixmap_is_offscreen(scratch)) { screen->DestroyPixmap(scratch); return FALSE; } ret = intel_uxa_pixmap_put_image(scratch, src, src_pitch, 0, 0, w, h); if (ret) { GCPtr gc = GetScratchGC(pixmap->drawable.depth, screen); if (gc) { ValidateGC(&pixmap->drawable, gc); (*gc->ops->CopyArea)(&scratch->drawable, &pixmap->drawable, gc, 0, 0, w, h, x, y); FreeScratchGC(gc); } else ret = FALSE; } (*screen->DestroyPixmap)(scratch); return ret; } } } static Bool intel_uxa_pixmap_get_image(PixmapPtr pixmap, int x, int y, int w, int h, char *dst, int dst_pitch) { struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap); int stride = intel_pixmap_pitch(pixmap); int cpp = pixmap->drawable.bitsPerPixel/8; /* assert(priv->tiling == I915_TILING_NONE); */ if (h == 1 || (dst_pitch == stride && w == pixmap->drawable.width)) { return drm_intel_bo_get_subdata(priv->bo, y*stride + x*cpp, (h-1)*stride + w*cpp, dst) == 0; } else { char *src; if (drm_intel_gem_bo_map_gtt(priv->bo)) return FALSE; src = (char *) priv->bo->virtual + y * stride + x * cpp; w *= cpp; do { memcpy(dst, src, w); src += stride; dst += dst_pitch; } while (--h); drm_intel_gem_bo_unmap_gtt(priv->bo); return TRUE; } } static Bool intel_uxa_get_image(PixmapPtr pixmap, int x, int y, int w, int h, char *dst, int dst_pitch) { struct intel_uxa_pixmap *priv; PixmapPtr scratch = NULL; Bool ret; /* The presumption is that we wish to keep the target hot, so * copy to a new bo and move that to the CPU in preference to * causing ping-pong of the original. * * Also the gpu is much faster at detiling. */ priv = intel_uxa_get_pixmap_private(pixmap); if (intel_uxa_pixmap_is_busy(priv) || priv->tiling != I915_TILING_NONE) { ScreenPtr screen = pixmap->drawable.pScreen; GCPtr gc; /* Copy to a linear buffer and pull. */ scratch = screen->CreatePixmap(screen, w, h, pixmap->drawable.depth, INTEL_CREATE_PIXMAP_TILING_NONE); if (!scratch) return FALSE; if (!intel_uxa_pixmap_is_offscreen(scratch)) { screen->DestroyPixmap(scratch); return FALSE; } gc = GetScratchGC(pixmap->drawable.depth, screen); if (!gc) { screen->DestroyPixmap(scratch); return FALSE; } ValidateGC(&pixmap->drawable, gc); gc->ops->CopyArea(&pixmap->drawable, &scratch->drawable, gc, x, y, w, h, 0, 0); FreeScratchGC(gc); intel_batch_submit(xf86ScreenToScrn(screen)); x = y = 0; pixmap = scratch; } ret = intel_uxa_pixmap_get_image(pixmap, x, y, w, h, dst, dst_pitch); if (scratch) scratch->drawable.pScreen->DestroyPixmap(scratch); return ret; } static CARD32 intel_cache_expire(OsTimerPtr timer, CARD32 now, pointer data) { intel_screen_private *intel = data; /* We just want to create and destroy a bo as this causes libdrm * to reap its caches. However, since we can't remove that buffer * from the cache due to its own activity, we want to use something * that we know we will reuse later. The most frequently reused buffer * we have is the batchbuffer, and the best way to trigger its * reallocation is to submit a flush. */ intel_batch_emit_flush(intel->scrn); intel_batch_submit(intel->scrn); return 0; } static void intel_flush_rendering(intel_screen_private *intel) { if (intel->needs_flush == 0) return; if (intel->has_kernel_flush) { intel_batch_submit(intel->scrn); drm_intel_bo_busy(intel->front_buffer); } else { intel_batch_emit_flush(intel->scrn); intel_batch_submit(intel->scrn); } intel->cache_expire = TimerSet(intel->cache_expire, 0, 3000, intel_cache_expire, intel); intel->needs_flush = 0; } static void intel_throttle(intel_screen_private *intel) { drmCommandNone(intel->drmSubFD, DRM_I915_GEM_THROTTLE); } void intel_uxa_block_handler(intel_screen_private *intel) { /* Emit a flush of the rendering cache, or on the 965 * and beyond rendering results may not hit the * framebuffer until significantly later. */ intel_flush_rendering(intel); intel_throttle(intel); } static PixmapPtr intel_uxa_create_pixmap(ScreenPtr screen, int w, int h, int depth, unsigned usage) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_uxa_pixmap *priv; PixmapPtr pixmap, new_pixmap = NULL; if (w > 32767 || h > 32767) return NullPixmap; if (depth == 1 || intel->force_fallback) return fbCreatePixmap(screen, w, h, depth, usage); if (usage == CREATE_PIXMAP_USAGE_GLYPH_PICTURE && w <= 32 && h <= 32) return fbCreatePixmap(screen, w, h, depth, usage); pixmap = fbCreatePixmap(screen, 0, 0, depth, usage); if (pixmap == NullPixmap) return pixmap; if (w && h) { unsigned int size, tiling; int stride; /* Always attempt to tile, compute_size() will remove the * tiling for pixmaps that are either too large or too small * to be effectively tiled. */ tiling = I915_TILING_X; if (usage & INTEL_CREATE_PIXMAP_TILING_Y) tiling = I915_TILING_Y; if (usage == UXA_CREATE_PIXMAP_FOR_MAP || usage & INTEL_CREATE_PIXMAP_TILING_NONE) tiling = I915_TILING_NONE; #ifdef CREATE_PIXMAP_USAGE_SHARED if (usage == CREATE_PIXMAP_USAGE_SHARED) tiling = I915_TILING_NONE; #endif /* if tiling is off force to none */ if (!intel->tiling) tiling = I915_TILING_NONE; if (tiling != I915_TILING_NONE && !(usage & INTEL_CREATE_PIXMAP_DRI2)) { if (h <= 4) tiling = I915_TILING_NONE; if (h <= 16 && tiling == I915_TILING_Y) tiling = I915_TILING_X; } size = intel_compute_size(intel, w, h, pixmap->drawable.bitsPerPixel, usage, &tiling, &stride); /* Fail very large allocations. Large BOs will tend to hit SW fallbacks * frequently, and also will tend to fail to successfully map when doing * SW fallbacks because we overcommit address space for BO access. */ if (size > intel->max_bo_size || stride >= KB(32)) goto fallback_pixmap; priv = calloc(1, sizeof (struct intel_uxa_pixmap)); if (priv == NULL) goto fallback_pixmap; if (usage == UXA_CREATE_PIXMAP_FOR_MAP) { priv->busy = 0; priv->bo = drm_intel_bo_alloc(intel->bufmgr, "pixmap", size, 0); } else { priv->busy = -1; priv->bo = drm_intel_bo_alloc_for_render(intel->bufmgr, "pixmap", size, 0); } if (!priv->bo) goto fallback_priv; if (tiling != I915_TILING_NONE) drm_intel_bo_set_tiling(priv->bo, &tiling, stride); priv->tiling = tiling; priv->offscreen = 1; list_init(&priv->batch); intel_uxa_set_pixmap_private(pixmap, priv); screen->ModifyPixmapHeader(pixmap, w, h, 0, 0, stride, NULL); } return pixmap; fallback_priv: free(priv); fallback_pixmap: fbDestroyPixmap(pixmap); if (new_pixmap) return new_pixmap; else return fbCreatePixmap(screen, w, h, depth, usage); } static Bool intel_uxa_destroy_pixmap(PixmapPtr pixmap) { if (pixmap->refcnt == 1) intel_uxa_set_pixmap_bo(pixmap, NULL); fbDestroyPixmap(pixmap); return TRUE; } Bool intel_uxa_create_screen_resources(ScreenPtr screen) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); PixmapPtr pixmap; intel_screen_private *intel = intel_get_screen_private(scrn); dri_bo *bo = intel->front_buffer; int old_width, old_height, old_pitch; if (!uxa_resources_init(screen)) return FALSE; if (drm_intel_gem_bo_map_gtt(bo)) return FALSE; pixmap = screen->GetScreenPixmap(screen); old_width = pixmap->drawable.width; old_height = pixmap->drawable.height; old_pitch = pixmap->devKind; if (!screen->ModifyPixmapHeader(pixmap, scrn->virtualX, scrn->virtualY, -1, -1, intel->front_pitch, NULL)) return FALSE; intel_uxa_set_pixmap_bo(pixmap, bo); if (intel_uxa_get_pixmap_private(pixmap) == NULL) goto err; intel_uxa_get_pixmap_private(pixmap)->pinned |= PIN_SCANOUT; scrn->displayWidth = intel->front_pitch / intel->cpp; return TRUE; err: screen->ModifyPixmapHeader(pixmap, old_width, old_height, -1, -1, old_pitch, NULL); return FALSE; } #ifdef CREATE_PIXMAP_USAGE_SHARED static Bool intel_uxa_share_pixmap_backing(PixmapPtr ppix, ScreenPtr slave, void **fd_handle) { ScrnInfoPtr scrn = xf86ScreenToScrn(ppix->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(ppix); unsigned int size, tiling, swizzle; dri_bo *bo = intel_uxa_get_pixmap_bo(ppix), *newbo; int stride; int handle; if (drm_intel_bo_references(intel->batch_bo, bo)) intel_batch_submit(intel->scrn); drm_intel_bo_get_tiling(bo, &tiling, &swizzle); if (tiling == I915_TILING_X) { if (priv->pinned) return FALSE; tiling = I915_TILING_NONE; size = intel_compute_size(intel, ppix->drawable.width, ppix->drawable.height, ppix->drawable.bitsPerPixel, INTEL_CREATE_PIXMAP_DRI2, &tiling, &stride); newbo = drm_intel_bo_alloc_for_render(intel->bufmgr, "pixmap", size, 0); if (tiling != I915_TILING_NONE) drm_intel_bo_set_tiling(newbo, &tiling, stride); priv->tiling = tiling; intel_uxa_set_pixmap_bo(ppix, newbo); ppix->drawable.pScreen->ModifyPixmapHeader(ppix, ppix->drawable.width, ppix->drawable.height, 0, 0, stride, NULL); bo = newbo; } drm_intel_bo_get_tiling(bo, &tiling, &swizzle); drm_intel_bo_gem_export_to_prime(bo, &handle); priv->pinned |= PIN_PRIME; *fd_handle = (void *)(long)handle; return TRUE; } static Bool intel_uxa_set_shared_pixmap_backing(PixmapPtr ppix, void *fd_handle) { ScrnInfoPtr scrn = xf86ScreenToScrn(ppix->drawable.pScreen); intel_screen_private *intel = intel_get_screen_private(scrn); dri_bo *bo; int ihandle = (int)(long)fd_handle; /* force untiled for now */ bo = drm_intel_bo_gem_create_from_prime(intel->bufmgr, ihandle, 0); if (!bo) return FALSE; intel_uxa_set_pixmap_bo(ppix, bo); close(ihandle); return TRUE; } #endif static void intel_limits_init(intel_screen_private *intel) { /* Limits are described in the BLT engine chapter under Graphics Data Size * Limitations, and the descriptions of SURFACE_STATE, 3DSTATE_BUFFER_INFO, * 3DSTATE_DRAWING_RECTANGLE, 3DSTATE_MAP_INFO, and 3DSTATE_MAP_INFO. * * i845 through i965 limits 2D rendering to 65536 lines and pitch of 32768. * * i965 limits 3D surface to (2*element size)-aligned offset if un-tiled. * i965 limits 3D surface to 4kB-aligned offset if tiled. * i965 limits 3D surfaces to w,h of ?,8192. * i965 limits 3D surface to pitch of 1B - 128kB. * i965 limits 3D surface pitch alignment to 1 or 2 times the element size. * i965 limits 3D surface pitch alignment to 512B if tiled. * i965 limits 3D destination drawing rect to w,h of 8192,8192. * * i915 limits 3D textures to 4B-aligned offset if un-tiled. * i915 limits 3D textures to ~4kB-aligned offset if tiled. * i915 limits 3D textures to width,height of 2048,2048. * i915 limits 3D textures to pitch of 16B - 8kB, in dwords. * i915 limits 3D destination to ~4kB-aligned offset if tiled. * i915 limits 3D destination to pitch of 16B - 8kB, in dwords, if un-tiled. * i915 limits 3D destination to pitch 64B-aligned if used with depth. * i915 limits 3D destination to pitch of 512B - 8kB, in tiles, if tiled. * i915 limits 3D destination to POT aligned pitch if tiled. * i915 limits 3D destination drawing rect to w,h of 2048,2048. * * i845 limits 3D textures to 4B-aligned offset if un-tiled. * i845 limits 3D textures to ~4kB-aligned offset if tiled. * i845 limits 3D textures to width,height of 2048,2048. * i845 limits 3D textures to pitch of 4B - 8kB, in dwords. * i845 limits 3D destination to 4B-aligned offset if un-tiled. * i845 limits 3D destination to ~4kB-aligned offset if tiled. * i845 limits 3D destination to pitch of 8B - 8kB, in dwords. * i845 limits 3D destination drawing rect to w,h of 2048,2048. * * For the tiled issues, the only tiled buffer we draw to should be * the front, which will have an appropriate pitch/offset already set up, * so UXA doesn't need to worry. */ if (INTEL_INFO(intel)->gen >= 040) { intel->accel_pixmap_offset_alignment = 4 * 2; intel->accel_max_x = 8192; intel->accel_max_y = 8192; } else { intel->accel_pixmap_offset_alignment = 4; intel->accel_max_x = 2048; intel->accel_max_y = 2048; } } static Bool intel_option_accel_none(intel_screen_private *intel) { const char *s; s = xf86GetOptValString(intel->Options, OPTION_ACCEL_METHOD); if (s == NULL) return IS_DEFAULT_ACCEL_METHOD(NOACCEL); return strcasecmp(s, "none") == 0; } static Bool intel_option_accel_blt(intel_screen_private *intel) { const char *s; s = xf86GetOptValString(intel->Options, OPTION_ACCEL_METHOD); if (s == NULL) return FALSE; return strcasecmp(s, "blt") == 0; } /** * Intialiazes the hardware for the 3D pipeline use in the 2D driver. * * Some state caching is performed to avoid redundant state emits. This * function is also responsible for marking the state as clobbered for DRI * clients. */ void IntelEmitInvarientState(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); /* If we've emitted our state since the last clobber by another client, * skip it. */ if (intel->last_3d != LAST_3D_OTHER) return; if (IS_GEN2(intel)) I830EmitInvarientState(scrn); else if IS_GEN3(intel) I915EmitInvarientState(scrn); } Bool intel_uxa_init(ScreenPtr screen) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); intel_screen_private *intel = intel_get_screen_private(scrn); intel_batch_init(scrn); if (INTEL_INFO(intel)->gen >= 040 && INTEL_INFO(intel)->gen < 0100) gen4_render_state_init(scrn); #if HAS_DIXREGISTERPRIVATEKEY if (!dixRegisterPrivateKey(&uxa_pixmap_index, PRIVATE_PIXMAP, 0)) #else if (!dixRequestPrivate(&uxa_pixmap_index, 0)) #endif return FALSE; intel_limits_init(intel); intel->uxa_driver = uxa_driver_alloc(); if (intel->uxa_driver == NULL) return FALSE; memset(intel->uxa_driver, 0, sizeof(*intel->uxa_driver)); intel->uxa_driver->uxa_major = 1; intel->uxa_driver->uxa_minor = 0; intel->prim_offset = 0; intel->vertex_count = 0; intel->vertex_offset = 0; intel->vertex_used = 0; intel->floats_per_vertex = 0; intel->last_floats_per_vertex = 0; intel->vertex_bo = NULL; intel->surface_used = 0; intel->surface_reloc = 0; /* Solid fill */ intel->uxa_driver->check_solid = intel_uxa_check_solid; intel->uxa_driver->prepare_solid = intel_uxa_prepare_solid; intel->uxa_driver->solid = intel_uxa_solid; intel->uxa_driver->done_solid = intel_uxa_done; /* Copy */ intel->uxa_driver->check_copy = intel_uxa_check_copy; intel->uxa_driver->prepare_copy = intel_uxa_prepare_copy; intel->uxa_driver->copy = intel_uxa_copy; intel->uxa_driver->done_copy = intel_uxa_done; /* Composite */ if (intel_option_accel_blt(intel)) { } else if (INTEL_INFO(intel)->gen < 030) { intel->uxa_driver->check_composite = i830_check_composite; intel->uxa_driver->check_composite_target = i830_check_composite_target; intel->uxa_driver->check_composite_texture = i830_check_composite_texture; intel->uxa_driver->prepare_composite = i830_prepare_composite; intel->uxa_driver->composite = i830_composite; intel->uxa_driver->done_composite = i830_done_composite; intel->vertex_flush = i830_vertex_flush; intel->batch_commit_notify = i830_batch_commit_notify; } else if (INTEL_INFO(intel)->gen < 040) { intel->uxa_driver->check_composite = i915_check_composite; intel->uxa_driver->check_composite_target = i915_check_composite_target; intel->uxa_driver->check_composite_texture = i915_check_composite_texture; intel->uxa_driver->prepare_composite = i915_prepare_composite; intel->uxa_driver->composite = i915_composite; intel->uxa_driver->done_composite = i830_done_composite; intel->vertex_flush = i915_vertex_flush; intel->batch_commit_notify = i915_batch_commit_notify; } else if (INTEL_INFO(intel)->gen < 0100) { intel->uxa_driver->check_composite = i965_check_composite; intel->uxa_driver->check_composite_texture = i965_check_composite_texture; intel->uxa_driver->prepare_composite = i965_prepare_composite; intel->uxa_driver->composite = i965_composite; intel->uxa_driver->done_composite = i830_done_composite; intel->vertex_flush = i965_vertex_flush; intel->batch_flush = i965_batch_flush; intel->batch_commit_notify = i965_batch_commit_notify; if (INTEL_INFO(intel)->gen < 050) { intel->context_switch = gen4_context_switch; } else if (INTEL_INFO(intel)->gen < 060) { intel->context_switch = gen5_context_switch; } else { intel->context_switch = gen6_context_switch; } } /* PutImage */ intel->uxa_driver->put_image = intel_uxa_put_image; intel->uxa_driver->get_image = intel_uxa_get_image; intel->uxa_driver->prepare_access = intel_uxa_prepare_access; intel->uxa_driver->finish_access = intel_uxa_finish_access; intel->uxa_driver->pixmap_is_offscreen = intel_uxa_pixmap_is_offscreen; screen->CreatePixmap = intel_uxa_create_pixmap; screen->DestroyPixmap = intel_uxa_destroy_pixmap; #ifdef CREATE_PIXMAP_USAGE_SHARED screen->SharePixmapBacking = intel_uxa_share_pixmap_backing; screen->SetSharedPixmapBacking = intel_uxa_set_shared_pixmap_backing; #endif if (!uxa_driver_init(screen, intel->uxa_driver)) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "UXA initialization failed\n"); free(intel->uxa_driver); return FALSE; } if (intel_option_accel_none(intel)) intel->force_fallback = 1; uxa_set_fallback_debug(screen, intel->fallback_debug); uxa_set_force_fallback(screen, intel->force_fallback); intel->flush_rendering = intel_flush_rendering; return TRUE; } xf86-video-intel-2.99.917/src/sna/0000775000175000017500000000000012445556131013365 500000000000000xf86-video-intel-2.99.917/src/sna/sna_video_sprite.c0000664000175000017500000004716012432737457017026 00000000000000/*************************************************************************** Copyright 2000-2011 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_video.h" #include "intel_options.h" #include #include #include #include #include #include #include #define fourcc_code(a,b,c,d) ((uint32_t)(a) | ((uint32_t)(b) << 8) | ((uint32_t)(c) << 16) | ((uint32_t)(d) << 24)) #define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6') /* [15:0] R:G:B 5:6:5 little endian */ #define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') /* [31:0] x:R:G:B 8:8:8:8 little endian */ #define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') /* [31:0] Cr0:Y1:Cb0:Y0 8:8:8:8 little endian */ #define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */ #define LOCAL_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct local_mode_set_plane) struct local_mode_set_plane { uint32_t plane_id; uint32_t crtc_id; uint32_t fb_id; /* fb object contains surface format type */ uint32_t flags; /* Signed dest location allows it to be partially off screen */ int32_t crtc_x, crtc_y; uint32_t crtc_w, crtc_h; /* Source values are 16.16 fixed point */ uint32_t src_x, src_y; uint32_t src_h, src_w; }; #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, true) static Atom xvColorKey, xvAlwaysOnTop, xvSyncToVblank; static XvFormatRec formats[] = { {15}, {16}, {24} }; static const XvImageRec images[] = { XVIMAGE_YUY2, XVIMAGE_UYVY, XVMC_RGB888, XVMC_RGB565 }; static const XvAttributeRec attribs[] = { { XvSettable | XvGettable, 0, 0xffffff, (char *)"XV_COLORKEY" }, { XvSettable | XvGettable, 0, 1, (char *)"XV_ALWAYS_ON_TOP" }, }; static int sna_video_sprite_stop(ddStopVideo_ARGS) { struct sna_video *video = port->devPriv.ptr; struct local_mode_set_plane s; xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(video->sna->scrn); int i; for (i = 0; i < config->num_crtc; i++) { xf86CrtcPtr crtc = config->crtc[i]; int pipe; if (sna_crtc_id(crtc) == 0) break; pipe = sna_crtc_to_pipe(crtc); if (video->bo[pipe] == NULL) continue; memset(&s, 0, sizeof(s)); s.plane_id = sna_crtc_to_sprite(crtc); if (drmIoctl(video->sna->kgem.fd, LOCAL_IOCTL_MODE_SETPLANE, &s)) xf86DrvMsg(video->sna->scrn->scrnIndex, X_ERROR, "failed to disable plane\n"); if (video->bo[pipe]) kgem_bo_destroy(&video->sna->kgem, video->bo[pipe]); video->bo[pipe] = NULL; } sna_window_set_port((WindowPtr)draw, NULL); return Success; } static int sna_video_sprite_set_attr(ddSetPortAttribute_ARGS) { struct sna_video *video = port->devPriv.ptr; if (attribute == xvColorKey) { video->color_key_changed = ~0; video->color_key = value; RegionEmpty(&video->clip); DBG(("COLORKEY = %ld\n", (long)value)); } else if (attribute == xvSyncToVblank) { DBG(("%s: SYNC_TO_VBLANK: %d -> %d\n", __FUNCTION__, video->SyncToVblank, !!value)); video->SyncToVblank = !!value; } else if (attribute == xvAlwaysOnTop) { DBG(("%s: ALWAYS_ON_TOP: %d -> %d\n", __FUNCTION__, video->AlwaysOnTop, !!value)); video->color_key_changed = ~0; video->AlwaysOnTop = !!value; } else return BadMatch; return Success; } static int sna_video_sprite_get_attr(ddGetPortAttribute_ARGS) { struct sna_video *video = port->devPriv.ptr; if (attribute == xvColorKey) *value = video->color_key; else if (attribute == xvAlwaysOnTop) *value = video->AlwaysOnTop; else if (attribute == xvSyncToVblank) *value = video->SyncToVblank; else return BadMatch; return Success; } static int sna_video_sprite_best_size(ddQueryBestSize_ARGS) { struct sna_video *video = port->devPriv.ptr; struct sna *sna = video->sna; if (sna->kgem.gen >= 075) { *p_w = vid_w; *p_h = vid_h; } else { *p_w = drw_w; *p_h = drw_h; } return Success; } static void update_dst_box_to_crtc_coords(struct sna *sna, xf86CrtcPtr crtc, BoxPtr dstBox) { ScrnInfoPtr scrn = sna->scrn; int tmp; switch (crtc->rotation & 0xf) { case RR_Rotate_0: dstBox->x1 -= crtc->x; dstBox->x2 -= crtc->x; dstBox->y1 -= crtc->y; dstBox->y2 -= crtc->y; break; case RR_Rotate_90: tmp = dstBox->x1; dstBox->x1 = dstBox->y1 - crtc->x; dstBox->y1 = scrn->virtualX - tmp - crtc->y; tmp = dstBox->x2; dstBox->x2 = dstBox->y2 - crtc->x; dstBox->y2 = scrn->virtualX - tmp - crtc->y; tmp = dstBox->y1; dstBox->y1 = dstBox->y2; dstBox->y2 = tmp; break; case RR_Rotate_180: tmp = dstBox->x1; dstBox->x1 = scrn->virtualX - dstBox->x2 - crtc->x; dstBox->x2 = scrn->virtualX - tmp - crtc->x; tmp = dstBox->y1; dstBox->y1 = scrn->virtualY - dstBox->y2 - crtc->y; dstBox->y2 = scrn->virtualY - tmp - crtc->y; break; case RR_Rotate_270: tmp = dstBox->x1; dstBox->x1 = scrn->virtualY - dstBox->y1 - crtc->x; dstBox->y1 = tmp - crtc->y; tmp = dstBox->x2; dstBox->x2 = scrn->virtualY - dstBox->y2 - crtc->x; dstBox->y2 = tmp - crtc->y; tmp = dstBox->x1; dstBox->x1 = dstBox->x2; dstBox->x2 = tmp; break; } } static bool sna_video_sprite_show(struct sna *sna, struct sna_video *video, struct sna_video_frame *frame, xf86CrtcPtr crtc, BoxPtr dstBox) { struct local_mode_set_plane s; int pipe = sna_crtc_to_pipe(crtc); /* XXX handle video spanning multiple CRTC */ VG_CLEAR(s); s.plane_id = sna_crtc_to_sprite(crtc); #define DRM_I915_SET_SPRITE_COLORKEY 0x2b #define LOCAL_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct local_intel_sprite_colorkey) #define LOCAL_IOCTL_MODE_ADDFB2 DRM_IOWR(0xb8, struct local_mode_fb_cmd2) if (video->color_key_changed & (1 << pipe) && video->has_color_key) { struct local_intel_sprite_colorkey { uint32_t plane_id; uint32_t min_value; uint32_t channel_mask; uint32_t max_value; uint32_t flags; } set; DBG(("%s: updating color key: %x\n", __FUNCTION__, video->color_key)); set.plane_id = s.plane_id; set.min_value = video->color_key; set.max_value = video->color_key; /* not used for destkey */ set.channel_mask = 0x7 << 24 | 0xff << 16 | 0xff << 8 | 0xff << 0; set.flags = 0; if (!video->AlwaysOnTop) set.flags |= 1 << 1; /* COLORKEY_DESTINATION */ if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_I915_SET_SPRITE_COLORKEY, &set)) { xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, "failed to update color key, disabling future updates\n"); video->has_color_key = false; } video->color_key_changed &= ~(1 << pipe); } if (video->bo[pipe] == frame->bo) return true; update_dst_box_to_crtc_coords(sna, crtc, dstBox); if (frame->rotation & (RR_Rotate_90 | RR_Rotate_270)) { int tmp = frame->width; frame->width = frame->height; frame->height = tmp; } if (frame->bo->delta == 0) { struct local_mode_fb_cmd2 { uint32_t fb_id; uint32_t width, height; uint32_t pixel_format; uint32_t flags; uint32_t handles[4]; uint32_t pitches[4]; /* pitch for each plane */ uint32_t offsets[4]; /* offset of each plane */ } f; bool purged = true; memset(&f, 0, sizeof(f)); f.width = frame->width; f.height = frame->height; f.handles[0] = frame->bo->handle; f.pitches[0] = frame->pitch[0]; switch (frame->id) { case FOURCC_RGB565: f.pixel_format = DRM_FORMAT_RGB565; purged = sna->scrn->depth != 16; break; case FOURCC_RGB888: f.pixel_format = DRM_FORMAT_XRGB8888; purged = sna->scrn->depth != 24; break; case FOURCC_UYVY: f.pixel_format = DRM_FORMAT_UYVY; break; case FOURCC_YUY2: default: f.pixel_format = DRM_FORMAT_YUYV; break; } DBG(("%s: creating new fb for handle=%d, width=%d, height=%d, stride=%d, format=%x\n", __FUNCTION__, frame->bo->handle, frame->width, frame->height, f.pitches[0], f.pixel_format)); if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_ADDFB2, &f)) { ERR(("%s: ADDFB2 failed, errno=%d\n", __FUNCTION__, errno)); xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, "failed to add fb, unable to update video\n"); return false; } frame->bo->delta = f.fb_id; frame->bo->scanout = true; /* Don't allow the scanout to be cached if not suitable for front */ frame->bo->purged = purged; } assert(frame->bo->scanout); assert(frame->bo->delta); s.crtc_id = sna_crtc_id(crtc); s.fb_id = frame->bo->delta; s.flags = 0; s.crtc_x = dstBox->x1; s.crtc_y = dstBox->y1; s.crtc_w = dstBox->x2 - dstBox->x1; s.crtc_h = dstBox->y2 - dstBox->y1; s.src_x = 0; s.src_y = 0; s.src_w = (frame->image.x2 - frame->image.x1) << 16; s.src_h = (frame->image.y2 - frame->image.y1) << 16; DBG(("%s: updating crtc=%d, plane=%d, handle=%d [fb %d], dst=(%d,%d)x(%d,%d), src=(%d,%d)x(%d,%d)\n", __FUNCTION__, s.crtc_id, s.plane_id, frame->bo->handle, s.fb_id, s.crtc_x, s.crtc_y, s.crtc_w, s.crtc_h, s.src_x >> 16, s.src_y >> 16, s.src_w >> 16, s.src_h >> 16)); if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_SETPLANE, &s)) { DBG(("SET_PLANE failed: ret=%d\n", errno)); memset(&s, 0, sizeof(s)); s.plane_id = video->plane; (void)drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_SETPLANE, &s); if (video->bo[pipe]) { kgem_bo_destroy(&sna->kgem, video->bo[pipe]); video->bo[pipe] = NULL; } return false; } frame->bo->domain = DOMAIN_NONE; if (video->bo[pipe]) kgem_bo_destroy(&sna->kgem, video->bo[pipe]); video->bo[pipe] = kgem_bo_reference(frame->bo); return true; } static int sna_video_sprite_put_image(ddPutImage_ARGS) { struct sna_video *video = port->devPriv.ptr; struct sna *sna = video->sna; xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); RegionRec clip; int ret, i; clip.extents.x1 = draw->x + drw_x; clip.extents.y1 = draw->y + drw_y; clip.extents.x2 = clip.extents.x1 + drw_w; clip.extents.y2 = clip.extents.y1 + drw_h; clip.data = NULL; DBG(("%s: always_on_top=%d\n", __FUNCTION__, video->AlwaysOnTop)); if (!video->AlwaysOnTop) RegionIntersect(&clip, &clip, gc->pCompositeClip); DBG(("%s: src=(%d, %d),(%d, %d), dst=(%d, %d),(%d, %d), id=%d, sizep=%dx%d, sync?=%d\n", __FUNCTION__, src_x, src_y, src_w, src_h, drw_x, drw_y, drw_w, drw_h, format->id, width, height, sync)); DBG(("%s: region %d:(%d, %d), (%d, %d)\n", __FUNCTION__, region_num_rects(&clip), clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2)); if (RegionNil(&clip)) { ret = Success; goto err; } for (i = 0; i < config->num_crtc; i++) { xf86CrtcPtr crtc = config->crtc[i]; struct sna_video_frame frame; int pipe; INT32 x1, x2, y1, y2; BoxRec dst; RegionRec reg; Rotation rotation; if (sna_crtc_id(crtc) == 0) break; pipe = sna_crtc_to_pipe(crtc); sna_video_frame_init(video, format->id, width, height, &frame); reg.extents = crtc->bounds; reg.data = NULL; RegionIntersect(®, ®, &clip); if (RegionNil(®)) { off: if (video->bo[pipe]) { struct local_mode_set_plane s; memset(&s, 0, sizeof(s)); s.plane_id = sna_crtc_to_sprite(crtc); if (drmIoctl(video->sna->kgem.fd, LOCAL_IOCTL_MODE_SETPLANE, &s)) xf86DrvMsg(video->sna->scrn->scrnIndex, X_ERROR, "failed to disable plane\n"); video->bo[pipe] = NULL; } continue; } x1 = src_x; x2 = src_x + src_w; y1 = src_y; y2 = src_y + src_h; dst = clip.extents; ret = xf86XVClipVideoHelper(&dst, &x1, &x2, &y1, &y2, ®, frame.width, frame.height); RegionUninit(®); if (!ret) goto off; frame.src.x1 = x1 >> 16; frame.src.y1 = y1 >> 16; frame.src.x2 = (x2 + 0xffff) >> 16; frame.src.y2 = (y2 + 0xffff) >> 16; frame.image.x1 = frame.src.x1 & ~1; frame.image.x2 = ALIGN(frame.src.x2, 2); if (is_planar_fourcc(frame.id)) { frame.image.y1 = frame.src.y1 & ~1; frame.image.y2 = ALIGN(frame.src.y2, 2); } else { frame.image.y1 = frame.src.y1; frame.image.y2 = frame.src.y2; } /* if sprite can't handle rotation natively, store it for the copy func */ rotation = RR_Rotate_0; if (!sna_crtc_set_sprite_rotation(crtc, crtc->rotation)) { sna_crtc_set_sprite_rotation(crtc, RR_Rotate_0); rotation = crtc->rotation; } sna_video_frame_set_rotation(video, &frame, rotation); if (xvmc_passthrough(format->id)) { DBG(("%s: using passthough, name=%d\n", __FUNCTION__, *(uint32_t *)buf)); if (*(uint32_t*)buf == 0) goto err; frame.bo = kgem_create_for_name(&sna->kgem, *(uint32_t*)buf); if (frame.bo == NULL) { ret = BadAlloc; goto err; } if (kgem_bo_size(frame.bo) < frame.size) { DBG(("%s: bo size=%d, expected=%d\n", __FUNCTION__, kgem_bo_size(frame.bo), frame.size)); kgem_bo_destroy(&sna->kgem, frame.bo); ret = BadAlloc; goto err; } frame.image.x1 = 0; frame.image.y1 = 0; frame.image.x2 = frame.width; frame.image.y2 = frame.height; } else { frame.bo = sna_video_buffer(video, &frame); if (frame.bo == NULL) { DBG(("%s: failed to allocate video bo\n", __FUNCTION__)); ret = BadAlloc; goto err; } if (!sna_video_copy_data(video, &frame, buf)) { DBG(("%s: failed to copy video data\n", __FUNCTION__)); ret = BadAlloc; goto err; } } ret = Success; if (!sna_video_sprite_show(sna, video, &frame, crtc, &dst)) { DBG(("%s: failed to show video frame\n", __FUNCTION__)); ret = BadAlloc; } frame.bo->domain = DOMAIN_NONE; if (xvmc_passthrough(format->id)) kgem_bo_destroy(&sna->kgem, frame.bo); else sna_video_buffer_fini(video); if (ret != Success) goto err; } if (!video->AlwaysOnTop && !RegionEqual(&video->clip, &clip) && sna_blt_fill_boxes(sna, GXcopy, __sna_pixmap_get_bo(sna->front), sna->front->drawable.bitsPerPixel, video->color_key, region_rects(&clip), region_num_rects(&clip))) RegionCopy(&video->clip, &clip); sna_window_set_port((WindowPtr)draw, port); return Success; err: #if XORG_XV_VERSION < 2 (void)sna_video_sprite_stop(client, port, draw); #else (void)sna_video_sprite_stop(port, draw); #endif return ret; } static int sna_video_sprite_query(ddQueryImageAttributes_ARGS) { struct sna_video *video = port->devPriv.ptr; struct sna_video_frame frame; int size; if (*w > video->sna->mode.max_crtc_width) *w = video->sna->mode.max_crtc_width; if (*h > video->sna->mode.max_crtc_height) *h = video->sna->mode.max_crtc_height; if (offsets) offsets[0] = 0; switch (format->id) { case FOURCC_RGB888: case FOURCC_RGB565: if (pitches) { sna_video_frame_init(video, format->id, *w, *h, &frame); sna_video_frame_set_rotation(video, &frame, RR_Rotate_0); pitches[0] = frame.pitch[0]; } size = 4; break; default: *w = (*w + 1) & ~1; *h = (*h + 1) & ~1; size = *w << 1; if (pitches) pitches[0] = size; size *= *h; break; } return size; } static int sna_video_sprite_color_key(struct sna *sna) { ScrnInfoPtr scrn = sna->scrn; int color_key; if (xf86GetOptValInteger(sna->Options, OPTION_VIDEO_KEY, &color_key)) { } else if (xf86GetOptValInteger(sna->Options, OPTION_COLOR_KEY, &color_key)) { } else { color_key = (1 << scrn->offset.red) | (1 << scrn->offset.green) | (((scrn->mask.blue >> scrn->offset.blue) - 1) << scrn->offset.blue); } return color_key & ((1 << scrn->depth) - 1); } static bool sna_video_has_sprites(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); int i; DBG(("%s: num_crtc=%d\n", __FUNCTION__, sna->mode.num_real_crtc)); if (sna->mode.num_real_crtc == 0) return false; for (i = 0; i < sna->mode.num_real_crtc; i++) { if (!sna_crtc_to_sprite(config->crtc[i])) { DBG(("%s: no sprite found on pipe %d\n", __FUNCTION__, sna_crtc_to_pipe(config->crtc[i]))); return false; } } DBG(("%s: yes\n", __FUNCTION__)); return true; } void sna_video_sprite_setup(struct sna *sna, ScreenPtr screen) { XvAdaptorPtr adaptor; struct sna_video *video; XvPortPtr port; if (!sna_video_has_sprites(sna)) return; adaptor = sna_xv_adaptor_alloc(sna); if (!adaptor) return; video = calloc(1, sizeof(*video)); port = calloc(1, sizeof(*port)); if (video == NULL || port == NULL) { free(video); free(port); sna->xv.num_adaptors--; return; } adaptor->type = XvInputMask | XvImageMask; adaptor->pScreen = screen; adaptor->name = (char *)"Intel(R) Video Sprite"; adaptor->nEncodings = 1; adaptor->pEncodings = xnfalloc(sizeof(XvEncodingRec)); adaptor->pEncodings[0].id = 0; adaptor->pEncodings[0].pScreen = screen; adaptor->pEncodings[0].name = (char *)"XV_IMAGE"; adaptor->pEncodings[0].width = sna->mode.max_crtc_width; adaptor->pEncodings[0].height = sna->mode.max_crtc_height; adaptor->pEncodings[0].rate.numerator = 1; adaptor->pEncodings[0].rate.denominator = 1; adaptor->pFormats = formats; adaptor->nFormats = sna_xv_fixup_formats(screen, formats, ARRAY_SIZE(formats)); adaptor->nAttributes = ARRAY_SIZE(attribs); adaptor->pAttributes = (XvAttributeRec *)attribs; adaptor->pImages = (XvImageRec *)images; adaptor->nImages = 3; if (sna->kgem.gen == 071) adaptor->nImages = 4; #if XORG_XV_VERSION < 2 adaptor->ddAllocatePort = sna_xv_alloc_port; adaptor->ddFreePort = sna_xv_free_port; #endif adaptor->ddPutVideo = NULL; adaptor->ddPutStill = NULL; adaptor->ddGetVideo = NULL; adaptor->ddGetStill = NULL; adaptor->ddStopVideo = sna_video_sprite_stop; adaptor->ddSetPortAttribute = sna_video_sprite_set_attr; adaptor->ddGetPortAttribute = sna_video_sprite_get_attr; adaptor->ddQueryBestSize = sna_video_sprite_best_size; adaptor->ddPutImage = sna_video_sprite_put_image; adaptor->ddQueryImageAttributes = sna_video_sprite_query; adaptor->nPorts = 1; adaptor->pPorts = port; adaptor->base_id = port->id = FakeClientID(0); AddResource(port->id, XvGetRTPort(), port); port->pAdaptor = adaptor; port->pNotify = NULL; port->pDraw = NULL; port->client = NULL; port->grab.client = NULL; port->time = currentTime; port->devPriv.ptr = video; video->sna = sna; video->alignment = 64; video->color_key = sna_video_sprite_color_key(sna); video->color_key_changed = ~0; video->has_color_key = true; video->brightness = -19; /* (255/219) * -16 */ video->contrast = 75; /* 255/219 * 64 */ video->saturation = 146; /* 128/112 * 128 */ video->desired_crtc = NULL; video->gamma5 = 0xc0c0c0; video->gamma4 = 0x808080; video->gamma3 = 0x404040; video->gamma2 = 0x202020; video->gamma1 = 0x101010; video->gamma0 = 0x080808; RegionNull(&video->clip); video->SyncToVblank = 1; xvColorKey = MAKE_ATOM("XV_COLORKEY"); xvAlwaysOnTop = MAKE_ATOM("XV_ALWAYS_ON_TOP"); xvSyncToVblank = MAKE_ATOM("XV_SYNC_TO_VBLANK"); DBG(("%s: '%s' initialized %d ports\n", __FUNCTION__, adaptor->name, adaptor->nPorts)); } xf86-video-intel-2.99.917/src/sna/sna_composite.c0000664000175000017500000010005612432737457016326 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "fb/fbpict.h" #include #define NO_COMPOSITE 0 #define NO_COMPOSITE_RECTANGLES 0 #define BOUND(v) (INT16) ((v) < MINSHORT ? MINSHORT : (v) > MAXSHORT ? MAXSHORT : (v)) bool sna_composite_create(struct sna *sna) { xRenderColor color = { 0 }; int error; sna->clear = CreateSolidPicture(0, &color, &error); return sna->clear != NULL; } void sna_composite_close(struct sna *sna) { DBG(("%s\n", __FUNCTION__)); if (sna->clear) { FreePicture(sna->clear, 0); sna->clear = NULL; } } static inline bool region_is_singular(pixman_region16_t *region) { return region->data == NULL; } static inline bool region_is_empty(pixman_region16_t *region) { return region->data && region->data->numRects == 0; } static inline pixman_bool_t clip_to_dst(pixman_region16_t *region, pixman_region16_t *clip, int dx, int dy) { DBG(("%s: region: %dx[(%d, %d), (%d, %d)], clip: %dx[(%d, %d), (%d, %d)]\n", __FUNCTION__, pixman_region_n_rects(region), region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, pixman_region_n_rects(clip), clip->extents.x1, clip->extents.y1, clip->extents.x2, clip->extents.y2)); if (region_is_singular(region) && region_is_singular(clip)) { pixman_box16_t *r = ®ion->extents; pixman_box16_t *c = &clip->extents; int v; if (r->x1 < (v = c->x1 + dx)) r->x1 = BOUND(v); if (r->x2 > (v = c->x2 + dx)) r->x2 = BOUND(v); if (r->y1 < (v = c->y1 + dy)) r->y1 = BOUND(v); if (r->y2 > (v = c->y2 + dy)) r->y2 = BOUND(v); if (r->x1 >= r->x2 || r->y1 >= r->y2) { pixman_region_init(region); return FALSE; } return true; } else if (region_is_empty(clip)) { return FALSE; } else { if (dx | dy) pixman_region_translate(region, -dx, -dy); if (!pixman_region_intersect(region, region, clip)) return FALSE; if (dx | dy) pixman_region_translate(region, dx, dy); return !region_is_empty(region); } } static inline bool picture_has_clip(PicturePtr p) { #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,16,99,1,0) return p->clientClip; #else return p->clientClipType != CT_NONE; #endif } static inline bool clip_to_src(RegionPtr region, PicturePtr p, int dx, int dy) { bool result; if (!picture_has_clip(p)) return true; pixman_region_translate(p->clientClip, p->clipOrigin.x + dx, p->clipOrigin.y + dy); result = RegionIntersect(region, region, p->clientClip); pixman_region_translate(p->clientClip, -(p->clipOrigin.x + dx), -(p->clipOrigin.y + dy)); return result && !region_is_empty(region); } bool sna_compute_composite_region(RegionPtr region, PicturePtr src, PicturePtr mask, PicturePtr dst, INT16 src_x, INT16 src_y, INT16 mask_x, INT16 mask_y, INT16 dst_x, INT16 dst_y, CARD16 width, CARD16 height) { int v; DBG(("%s: dst=(%d, %d)x(%d, %d)\n", __FUNCTION__, dst_x, dst_y, width, height)); region->extents.x1 = dst_x < 0 ? 0 : dst_x; v = dst_x + width; if (v > dst->pDrawable->width) v = dst->pDrawable->width; region->extents.x2 = v; region->extents.y1 = dst_y < 0 ? 0 : dst_y; v = dst_y + height; if (v > dst->pDrawable->height) v = dst->pDrawable->height; region->extents.y2 = v; region->data = 0; DBG(("%s: initial clip against dst->pDrawable: (%d, %d), (%d, %d)\n", __FUNCTION__, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); if (region->extents.x1 >= region->extents.x2 || region->extents.y1 >= region->extents.y2) return false; region->extents.x1 += dst->pDrawable->x; region->extents.x2 += dst->pDrawable->x; region->extents.y1 += dst->pDrawable->y; region->extents.y2 += dst->pDrawable->y; dst_x += dst->pDrawable->x; dst_y += dst->pDrawable->y; /* clip against dst */ if (!clip_to_dst(region, dst->pCompositeClip, 0, 0)) return false; DBG(("%s: clip against dst->pCompositeClip: (%d, %d), (%d, %d)\n", __FUNCTION__, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); if (dst->alphaMap) { if (!clip_to_dst(region, dst->alphaMap->pCompositeClip, -dst->alphaOrigin.x, -dst->alphaOrigin.y)) { pixman_region_fini (region); return false; } } /* clip against src */ if (src) { if (src->pDrawable) { src_x += src->pDrawable->x; src_y += src->pDrawable->y; } if (!clip_to_src(region, src, dst_x - src_x, dst_y - src_y)) { pixman_region_fini (region); return false; } DBG(("%s: clip against src (%dx%d clip=%d): (%d, %d), (%d, %d)\n", __FUNCTION__, src->pDrawable ? src->pDrawable->width : 0, src->pDrawable ? src->pDrawable->height : 0, picture_has_clip(src), region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); if (src->alphaMap) { if (!clip_to_src(region, src->alphaMap, dst_x - (src_x - src->alphaOrigin.x), dst_y - (src_y - src->alphaOrigin.y))) { pixman_region_fini(region); return false; } } } /* clip against mask */ if (mask) { if (mask->pDrawable) { mask_x += mask->pDrawable->x; mask_y += mask->pDrawable->y; } if (!clip_to_src(region, mask, dst_x - mask_x, dst_y - mask_y)) { pixman_region_fini(region); return false; } if (mask->alphaMap) { if (!clip_to_src(region, mask->alphaMap, dst_x - (mask_x - mask->alphaOrigin.x), dst_y - (mask_y - mask->alphaOrigin.y))) { pixman_region_fini(region); return false; } } DBG(("%s: clip against mask: (%d, %d), (%d, %d)\n", __FUNCTION__, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); } return !region_is_empty(region); } static void trim_extents(BoxPtr extents, const PicturePtr p, int dx, int dy) { const BoxPtr box = REGION_EXTENTS(NULL, p->pCompositeClip); DBG(("%s: trim((%d, %d), (%d, %d)) against ((%d, %d), (%d, %d)) + (%d, %d)\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2, box->x1, box->y1, box->x2, box->y2, dx, dy)); if (extents->x1 < box->x1 + dx) extents->x1 = box->x1 + dx; if (extents->x2 > box->x2 + dx) extents->x2 = box->x2 + dx; if (extents->y1 < box->y1 + dy) extents->y1 = box->y1 + dy; if (extents->y2 > box->y2 + dy) extents->y2 = box->y2 + dy; } static void _trim_source_extents(BoxPtr extents, const PicturePtr p, int dx, int dy) { if (picture_has_clip(p)) trim_extents(extents, p, dx, dy); } static void trim_source_extents(BoxPtr extents, const PicturePtr p, int dx, int dy) { if (p->pDrawable) { dx += p->pDrawable->x; dy += p->pDrawable->y; } _trim_source_extents(extents, p, dx, dy); if (p->alphaMap) _trim_source_extents(extents, p->alphaMap, dx - p->alphaOrigin.x, dy - p->alphaOrigin.y); DBG(("%s: -> (%d, %d), (%d, %d)\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2)); } bool sna_compute_composite_extents(BoxPtr extents, PicturePtr src, PicturePtr mask, PicturePtr dst, INT16 src_x, INT16 src_y, INT16 mask_x, INT16 mask_y, INT16 dst_x, INT16 dst_y, CARD16 width, CARD16 height) { int v; DBG(("%s: dst=(%d, %d)x(%d, %d)\n", __FUNCTION__, dst_x, dst_y, width, height)); extents->x1 = dst_x < 0 ? 0 : dst_x; v = dst_x + width; if (v > dst->pDrawable->width) v = dst->pDrawable->width; extents->x2 = v; extents->y1 = dst_y < 0 ? 0 : dst_y; v = dst_y + height; if (v > dst->pDrawable->height) v = dst->pDrawable->height; extents->y2 = v; DBG(("%s: initial clip against dst->pDrawable: (%d, %d), (%d, %d)\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2)); if (extents->x1 >= extents->x2 || extents->y1 >= extents->y2) return false; extents->x1 += dst->pDrawable->x; extents->x2 += dst->pDrawable->x; extents->y1 += dst->pDrawable->y; extents->y2 += dst->pDrawable->y; if (extents->x1 < dst->pCompositeClip->extents.x1) extents->x1 = dst->pCompositeClip->extents.x1; if (extents->x2 > dst->pCompositeClip->extents.x2) extents->x2 = dst->pCompositeClip->extents.x2; if (extents->y1 < dst->pCompositeClip->extents.y1) extents->y1 = dst->pCompositeClip->extents.y1; if (extents->y2 > dst->pCompositeClip->extents.y2) extents->y2 = dst->pCompositeClip->extents.y2; DBG(("%s: initial clip against dst->pCompositeClip: (%d, %d), (%d, %d)\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2)); if (extents->x1 >= extents->x2 || extents->y1 >= extents->y2) return false; dst_x += dst->pDrawable->x; dst_y += dst->pDrawable->y; /* clip against dst */ trim_extents(extents, dst, 0, 0); if (dst->alphaMap) trim_extents(extents, dst->alphaMap, -dst->alphaOrigin.x, -dst->alphaOrigin.y); DBG(("%s: clip against dst: (%d, %d), (%d, %d)\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2)); if (src) trim_source_extents(extents, src, dst_x - src_x, dst_y - src_y); if (mask) trim_source_extents(extents, mask, dst_x - mask_x, dst_y - mask_y); if (extents->x1 >= extents->x2 || extents->y1 >= extents->y2) return false; if (region_is_singular(dst->pCompositeClip)) return true; return pixman_region_contains_rectangle(dst->pCompositeClip, extents) != PIXMAN_REGION_OUT; } #if HAS_DEBUG_FULL static void _assert_pixmap_contains_box(PixmapPtr pixmap, BoxPtr box, const char *function) { if (box->x1 < 0 || box->y1 < 0 || box->x2 > pixmap->drawable.width || box->y2 > pixmap->drawable.height) { FatalError("%s: damage box is beyond the pixmap: box=(%d, %d), (%d, %d), pixmap=(%d, %d)\n", function, box->x1, box->y1, box->x2, box->y2, pixmap->drawable.width, pixmap->drawable.height); } } #define assert_pixmap_contains_box(p, b) _assert_pixmap_contains_box(p, b, __FUNCTION__) #else #define assert_pixmap_contains_box(p, b) #endif static void apply_damage(struct sna_composite_op *op, RegionPtr region) { DBG(("%s: damage=%p, region=%d [(%d, %d), (%d, %d) + (%d, %d)]\n", __FUNCTION__, op->damage, region_num_rects(region), region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, op->dst.x, op->dst.y)); if (op->damage == NULL) return; if (op->dst.x | op->dst.y) RegionTranslate(region, op->dst.x, op->dst.y); assert_pixmap_contains_box(op->dst.pixmap, RegionExtents(region)); if (region->data == NULL && region->extents.x2 - region->extents.x1 == op->dst.width && region->extents.y2 - region->extents.y1 == op->dst.height) { *op->damage = _sna_damage_all(*op->damage, op->dst.width, op->dst.height); op->damage = NULL; } else sna_damage_add(op->damage, region); } static inline bool use_cpu(PixmapPtr pixmap, struct sna_pixmap *priv, CARD8 op, INT16 width, INT16 height) { if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return false; if (DAMAGE_IS_ALL(priv->cpu_damage) && (op > PictOpSrc || width < pixmap->drawable.width || height < pixmap->drawable.height)) return true; if (priv->gpu_bo) return false; return (priv->create & KGEM_CAN_CREATE_GPU) == 0; } static void validate_source(PicturePtr picture) { #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,10,99,901,0) miCompositeSourceValidate(picture); #else miCompositeSourceValidate(picture, 0, 0, picture->pDrawable ? picture->pDrawable->width : 0, picture->pDrawable ? picture->pDrawable->height : 0); #endif } void sna_composite_fb(CARD8 op, PicturePtr src, PicturePtr mask, PicturePtr dst, RegionPtr region, INT16 src_x, INT16 src_y, INT16 msk_x, INT16 msk_y, INT16 dst_x, INT16 dst_y, CARD16 width, CARD16 height) { pixman_image_t *src_image, *mask_image, *dest_image; int src_xoff, src_yoff; int msk_xoff, msk_yoff; int dst_xoff, dst_yoff; int16_t tx, ty; unsigned flags; DBG(("%s -- op=%d, fallback dst=(%d, %d)+(%d, %d), size=(%d, %d): region=((%d,%d), (%d, %d))\n", __FUNCTION__, op, dst_x, dst_y, dst->pDrawable->x, dst->pDrawable->y, width, height, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); if (src->pDrawable) { DBG(("%s: fallback -- move src to cpu\n", __FUNCTION__)); if (!sna_drawable_move_to_cpu(src->pDrawable, MOVE_READ)) return; if (src->alphaMap && !sna_drawable_move_to_cpu(src->alphaMap->pDrawable, MOVE_READ)) return; } validate_source(src); if (mask) { if (mask->pDrawable) { DBG(("%s: fallback -- move mask to cpu\n", __FUNCTION__)); if (!sna_drawable_move_to_cpu(mask->pDrawable, MOVE_READ)) return; if (mask->alphaMap && !sna_drawable_move_to_cpu(mask->alphaMap->pDrawable, MOVE_READ)) return; } validate_source(mask); } DBG(("%s: fallback -- move dst to cpu\n", __FUNCTION__)); if (op <= PictOpSrc && !dst->alphaMap) flags = MOVE_WRITE | MOVE_INPLACE_HINT; else flags = MOVE_WRITE | MOVE_READ; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, region, flags)) return; if (dst->alphaMap && !sna_drawable_move_to_cpu(dst->alphaMap->pDrawable, flags)) return; if (mask == NULL && src->pDrawable && dst->pDrawable->bitsPerPixel >= 8 && src->filter != PictFilterConvolution && (op == PictOpSrc || (op == PictOpOver && !PICT_FORMAT_A(src->format))) && (dst->format == src->format || dst->format == alphaless(src->format)) && sna_transform_is_imprecise_integer_translation(src->transform, src->filter, dst->polyMode == PolyModePrecise, &tx, &ty)) { PixmapPtr dst_pixmap = get_drawable_pixmap(dst->pDrawable); PixmapPtr src_pixmap = get_drawable_pixmap(src->pDrawable); int16_t sx = src_x + tx - (dst->pDrawable->x + dst_x); int16_t sy = src_y + ty - (dst->pDrawable->y + dst_y); assert(src->pDrawable->bitsPerPixel == dst->pDrawable->bitsPerPixel); assert(src_pixmap->drawable.bitsPerPixel == dst_pixmap->drawable.bitsPerPixel); if (region->extents.x1 + sx >= 0 && region->extents.y1 + sy >= 0 && region->extents.x2 + sx <= src->pDrawable->width && region->extents.y2 + sy <= src->pDrawable->height) { if (sigtrap_get() == 0) { const BoxRec *box = region_rects(region); int nbox = region_num_rects(region); sx += src->pDrawable->x; sy += src->pDrawable->y; if (get_drawable_deltas(src->pDrawable, src_pixmap, &tx, &ty)) sx += tx, sy += ty; assert(region->extents.x1 + sx >= 0); assert(region->extents.x2 + sx <= src_pixmap->drawable.width); assert(region->extents.y1 + sy >= 0); assert(region->extents.y2 + sy <= src_pixmap->drawable.height); get_drawable_deltas(dst->pDrawable, dst_pixmap, &tx, &ty); assert(nbox); do { assert(box->x1 + sx >= 0); assert(box->x2 + sx <= src_pixmap->drawable.width); assert(box->y1 + sy >= 0); assert(box->y2 + sy <= src_pixmap->drawable.height); assert(box->x1 + tx >= 0); assert(box->x2 + tx <= dst_pixmap->drawable.width); assert(box->y1 + ty >= 0); assert(box->y2 + ty <= dst_pixmap->drawable.height); assert(box->x2 > box->x1 && box->y2 > box->y1); sigtrap_assert_active(); memcpy_blt(src_pixmap->devPrivate.ptr, dst_pixmap->devPrivate.ptr, dst_pixmap->drawable.bitsPerPixel, src_pixmap->devKind, dst_pixmap->devKind, box->x1 + sx, box->y1 + sy, box->x1 + tx, box->y1 + ty, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--nbox); sigtrap_put(); } return; } } src_image = image_from_pict(src, FALSE, &src_xoff, &src_yoff); mask_image = image_from_pict(mask, FALSE, &msk_xoff, &msk_yoff); dest_image = image_from_pict(dst, TRUE, &dst_xoff, &dst_yoff); if (src_image && dest_image && !(mask && !mask_image)) sna_image_composite(op, src_image, mask_image, dest_image, src_x + src_xoff, src_y + src_yoff, msk_x + msk_xoff, msk_y + msk_yoff, dst_x + dst_xoff, dst_y + dst_yoff, width, height); free_pixman_pict(src, src_image); free_pixman_pict(mask, mask_image); free_pixman_pict(dst, dest_image); } void sna_composite(CARD8 op, PicturePtr src, PicturePtr mask, PicturePtr dst, INT16 src_x, INT16 src_y, INT16 mask_x, INT16 mask_y, INT16 dst_x, INT16 dst_y, CARD16 width, CARD16 height) { PixmapPtr pixmap = get_drawable_pixmap(dst->pDrawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; struct sna_composite_op tmp; RegionRec region; int dx, dy; DBG(("%s(%d src=%ld+(%d, %d), mask=%ld+(%d, %d), dst=%ld+(%d, %d)+(%d, %d), size=(%d, %d)\n", __FUNCTION__, op, get_picture_id(src), src_x, src_y, get_picture_id(mask), mask_x, mask_y, get_picture_id(dst), dst_x, dst_y, dst->pDrawable->x, dst->pDrawable->y, width, height)); if (region_is_empty(dst->pCompositeClip)) { DBG(("%s: empty clip, skipping\n", __FUNCTION__)); return; } if (op == PictOpClear) { DBG(("%s: discarding source and mask for clear\n", __FUNCTION__)); mask = NULL; if (sna->clear) src = sna->clear; } if (mask && sna_composite_mask_is_opaque(mask)) { DBG(("%s: removing opaque %smask\n", __FUNCTION__, mask->componentAlpha && PICT_FORMAT_RGB(mask->format) ? "CA " : "")); mask = NULL; } if (!sna_compute_composite_region(®ion, src, mask, dst, src_x, src_y, mask_x, mask_y, dst_x, dst_y, width, height)) return; if (NO_COMPOSITE) goto fallback; if (wedged(sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } if (!can_render_to_picture(dst)) { DBG(("%s: fallback due to unhandled picture\n", __FUNCTION__)); goto fallback; } priv = sna_pixmap(pixmap); if (priv == NULL) { DBG(("%s: fallback as destination pixmap=%ld is unattached\n", __FUNCTION__, pixmap->drawable.serialNumber)); goto fallback; } if (use_cpu(pixmap, priv, op, width, height) && !picture_is_gpu(sna, src, PREFER_GPU_RENDER) && !picture_is_gpu(sna, mask, PREFER_GPU_RENDER)) { DBG(("%s: fallback, dst pixmap=%ld is too small (or completely damaged)\n", __FUNCTION__, pixmap->drawable.serialNumber)); goto fallback; } dx = region.extents.x1 - (dst_x + dst->pDrawable->x); dy = region.extents.y1 - (dst_y + dst->pDrawable->y); DBG(("%s: composite region extents:+(%d, %d) -> (%d, %d), (%d, %d) + (%d, %d)\n", __FUNCTION__, dx, dy, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2, get_drawable_dx(dst->pDrawable), get_drawable_dy(dst->pDrawable))); if (op <= PictOpSrc && priv->cpu_damage) { int16_t x, y; if (get_drawable_deltas(dst->pDrawable, pixmap, &x, &y)) pixman_region_translate(®ion, x, y); sna_damage_subtract(&priv->cpu_damage, ®ion); if (priv->cpu_damage == NULL) { list_del(&priv->flush_list); priv->cpu = false; } if (x|y) pixman_region_translate(®ion, -x, -y); } if (!sna->render.composite(sna, op, src, mask, dst, src_x + dx, src_y + dy, mask_x + dx, mask_y + dy, region.extents.x1, region.extents.y1, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1, region.data ? COMPOSITE_PARTIAL : 0, memset(&tmp, 0, sizeof(tmp)))) { DBG(("%s: fallback due unhandled composite op\n", __FUNCTION__)); goto fallback; } if (region.data == NULL) tmp.box(sna, &tmp, ®ion.extents); else tmp.boxes(sna, &tmp, RegionBoxptr(®ion), region_num_rects(®ion)); apply_damage(&tmp, ®ion); tmp.done(sna, &tmp); goto out; fallback: DBG(("%s: fallback -- fbComposite\n", __FUNCTION__)); sna_composite_fb(op, src, mask, dst, ®ion, src_x, src_y, mask_x, mask_y, dst_x, dst_y, width, height); out: REGION_UNINIT(NULL, ®ion); } void sna_composite_rectangles(CARD8 op, PicturePtr dst, xRenderColor *color, int num_rects, xRectangle *rects) { struct sna *sna = to_sna_from_drawable(dst->pDrawable); PixmapPtr pixmap; struct sna_pixmap *priv; struct kgem_bo *bo; struct sna_damage **damage; pixman_region16_t region; pixman_box16_t stack_boxes[64], *boxes = stack_boxes, *b; int16_t dst_x, dst_y; int i, num_boxes; unsigned hint; DBG(("%s(op=%d, %08x x %d [(%d, %d)x(%d, %d) ...])\n", __FUNCTION__, op, (color->alpha >> 8 << 24) | (color->red >> 8 << 16) | (color->green >> 8 << 8) | (color->blue >> 8 << 0), num_rects, rects[0].x, rects[0].y, rects[0].width, rects[0].height)); if (!num_rects) return; if (region_is_empty(dst->pCompositeClip)) { DBG(("%s: empty clip, skipping\n", __FUNCTION__)); return; } if ((color->red|color->green|color->blue|color->alpha) <= 0x00ff) { switch (op) { case PictOpOver: case PictOpOutReverse: case PictOpAdd: return; case PictOpInReverse: case PictOpSrc: op = PictOpClear; break; case PictOpAtopReverse: op = PictOpOut; break; case PictOpXor: op = PictOpOverReverse; break; } } if (color->alpha <= 0x00ff) { switch (op) { case PictOpOver: case PictOpOutReverse: return; case PictOpInReverse: op = PictOpClear; break; case PictOpAtopReverse: op = PictOpOut; break; case PictOpXor: op = PictOpOverReverse; break; } } else if (color->alpha >= 0xff00) { switch (op) { case PictOpOver: op = PictOpSrc; break; case PictOpInReverse: return; case PictOpOutReverse: op = PictOpClear; break; case PictOpAtopReverse: op = PictOpOverReverse; break; case PictOpXor: op = PictOpOut; break; } } /* Avoid reducing overlapping translucent rectangles */ if (op == PictOpOver && num_rects == 1 && sna_drawable_is_clear(dst->pDrawable)) op = PictOpSrc; DBG(("%s: converted to op %d\n", __FUNCTION__, op)); if (num_rects > ARRAY_SIZE(stack_boxes)) { boxes = malloc(sizeof(pixman_box16_t) * num_rects); if (boxes == NULL) return; } for (i = num_boxes = 0; i < num_rects; i++) { boxes[num_boxes].x1 = rects[i].x + dst->pDrawable->x; if (boxes[num_boxes].x1 < dst->pCompositeClip->extents.x1) boxes[num_boxes].x1 = dst->pCompositeClip->extents.x1; boxes[num_boxes].y1 = rects[i].y + dst->pDrawable->y; if (boxes[num_boxes].y1 < dst->pCompositeClip->extents.y1) boxes[num_boxes].y1 = dst->pCompositeClip->extents.y1; boxes[num_boxes].x2 = bound(rects[i].x + dst->pDrawable->x, rects[i].width); if (boxes[num_boxes].x2 > dst->pCompositeClip->extents.x2) boxes[num_boxes].x2 = dst->pCompositeClip->extents.x2; boxes[num_boxes].y2 = bound(rects[i].y + dst->pDrawable->y, rects[i].height); if (boxes[num_boxes].y2 > dst->pCompositeClip->extents.y2) boxes[num_boxes].y2 = dst->pCompositeClip->extents.y2; DBG(("%s[%d] (%d, %d)x(%d, %d) -> (%d, %d), (%d, %d)\n", __FUNCTION__, i, rects[i].x, rects[i].y, rects[i].width, rects[i].height, boxes[num_boxes].x1, boxes[num_boxes].y1, boxes[num_boxes].x2, boxes[num_boxes].y2)); if (boxes[num_boxes].x2 > boxes[num_boxes].x1 && boxes[num_boxes].y2 > boxes[num_boxes].y1) num_boxes++; } if (num_boxes == 0) goto cleanup_boxes; if (!pixman_region_init_rects(®ion, boxes, num_boxes)) goto cleanup_boxes; DBG(("%s: nrects=%d, region=(%d, %d), (%d, %d) x %d\n", __FUNCTION__, num_rects, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2, num_boxes)); if (dst->pCompositeClip->data && (!pixman_region_intersect(®ion, ®ion, dst->pCompositeClip) || region_is_empty(®ion))) { DBG(("%s: zero-intersection between rectangles and clip\n", __FUNCTION__)); goto cleanup_region; } DBG(("%s: clipped extents (%d, %d),(%d, %d) x %d\n", __FUNCTION__, RegionExtents(®ion)->x1, RegionExtents(®ion)->y1, RegionExtents(®ion)->x2, RegionExtents(®ion)->y2, region_num_rects(®ion))); /* XXX xserver-1.8: CompositeRects is not tracked by Damage, so we must * manually append the damaged regions ourselves. * * Note that DamageRegionAppend() will apply the drawable-deltas itself. */ DamageRegionAppend(dst->pDrawable, ®ion); pixmap = get_drawable_pixmap(dst->pDrawable); if (get_drawable_deltas(dst->pDrawable, pixmap, &dst_x, &dst_y)) pixman_region_translate(®ion, dst_x, dst_y); DBG(("%s: pixmap +(%d, %d) extents (%d, %d),(%d, %d)\n", __FUNCTION__, dst_x, dst_y, RegionExtents(®ion)->x1, RegionExtents(®ion)->y1, RegionExtents(®ion)->x2, RegionExtents(®ion)->y2)); assert_pixmap_contains_box(pixmap, RegionExtents(®ion)); if (NO_COMPOSITE_RECTANGLES) goto fallback; if (wedged(sna)) goto fallback; if (!can_render_to_picture(dst)) { DBG(("%s: fallback, dst has an incompatible picture\n", __FUNCTION__)); goto fallback; } priv = sna_pixmap(pixmap); if (priv == NULL || too_small(priv)) { DBG(("%s: fallback, dst pixmap=%ld too small or not attached\n", __FUNCTION__, pixmap->drawable.serialNumber)); goto fallback; } /* If we going to be overwriting any CPU damage with a subsequent * operation, then we may as well delete it without moving it * first to the GPU. */ hint = can_render(sna) ? PREFER_GPU : 0; if (op <= PictOpSrc) { if (priv->clear) { uint32_t pixel; bool ok; if (op == PictOpClear) { ok = sna_get_pixel_from_rgba(&pixel, 0, 0, 0, 0, dst->format); } else { ok = sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, dst->format); } if (ok && priv->clear_color == pixel) goto done; } if (region.data == NULL) { hint |= IGNORE_DAMAGE; if (region_subsumes_drawable(®ion, &pixmap->drawable)) hint |= REPLACES; if (priv->cpu_damage && (hint & REPLACES || region_subsumes_damage(®ion, priv->cpu_damage))) { DBG(("%s: discarding existing CPU damage\n", __FUNCTION__)); if (priv->gpu_bo && priv->gpu_bo->proxy) { assert(priv->gpu_damage == NULL); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = NULL; } sna_damage_destroy(&priv->cpu_damage); list_del(&priv->flush_list); } if (hint & REPLACES || box_inplace(pixmap, ®ion.extents)) { if (priv->gpu_bo && priv->cpu_damage == NULL) { DBG(("%s: promoting to full GPU\n", __FUNCTION__)); assert(priv->gpu_bo->proxy == NULL); sna_damage_all(&priv->gpu_damage, pixmap); } } } if (priv->cpu_damage == NULL) { DBG(("%s: dropping last-cpu hint\n", __FUNCTION__)); priv->cpu = false; } } bo = sna_drawable_use_bo(&pixmap->drawable, hint, ®ion.extents, &damage); if (bo == NULL) { DBG(("%s: fallback due to no GPU bo\n", __FUNCTION__)); goto fallback; } if (hint & REPLACES) kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); if (op <= PictOpSrc) { b = pixman_region_rectangles(®ion, &num_boxes); if (!sna->render.fill_boxes(sna, op, dst->format, color, &pixmap->drawable, bo, b, num_boxes)) { DBG(("%s: fallback - acceleration failed\n", __FUNCTION__)); goto fallback; } } else if (dst->pCompositeClip->data == NULL) { for (i = 0; i < num_boxes; i++) { boxes[i].x1 += dst_x; boxes[i].x2 += dst_x; boxes[i].y1 += dst_y; boxes[i].y2 += dst_y; } if (!sna->render.fill_boxes(sna, op, dst->format, color, &pixmap->drawable, bo, boxes, num_boxes)) { DBG(("%s: fallback - acceleration failed\n", __FUNCTION__)); goto fallback; } } else { for (i = 0; i < num_boxes; i++) { RegionRec tmp = { boxes[i] }; if (pixman_region_intersect(&tmp, &tmp, dst->pCompositeClip)) { int n = 0; b = pixman_region_rectangles(&tmp, &n); if (n) { if (dst_x | dst_y) pixman_region_translate(&tmp, dst_x, dst_y); n = !sna->render.fill_boxes(sna, op, dst->format, color, &pixmap->drawable, bo, b, n); } pixman_region_fini(&tmp); if (n) { DBG(("%s: fallback - acceleration failed\n", __FUNCTION__)); goto fallback; } } } } if (damage) sna_damage_add(damage, ®ion); /* Clearing a pixmap after creation is a common operation, so take * advantage and reduce further damage operations. */ if (region_subsumes_drawable(®ion, &pixmap->drawable)) { if (damage) { sna_damage_all(damage, pixmap); sna_damage_destroy(damage == &priv->gpu_damage ? &priv->cpu_damage : &priv->gpu_damage); } if (op <= PictOpSrc && bo == priv->gpu_bo) { bool ok; assert(DAMAGE_IS_ALL(priv->gpu_damage)); priv->clear_color = 0; ok = true; if (op == PictOpSrc) ok = sna_get_pixel_from_rgba(&priv->clear_color, color->red, color->green, color->blue, color->alpha, dst->format); priv->clear = ok; DBG(("%s: pixmap=%ld marking clear [%08x]? %d\n", __FUNCTION__, pixmap->drawable.serialNumber, priv->clear_color, ok)); } } goto done; fallback: DBG(("%s: fallback\n", __FUNCTION__)); if (op <= PictOpSrc) hint = MOVE_WRITE; else hint = MOVE_WRITE | MOVE_READ; if (!sna_drawable_move_region_to_cpu(&pixmap->drawable, ®ion, hint)) goto done; if (dst->alphaMap && !sna_drawable_move_to_cpu(dst->alphaMap->pDrawable, hint)) goto done; assert(pixmap->devPrivate.ptr); if (sigtrap_get() == 0) { if (op <= PictOpSrc) { int nbox = region_num_rects(®ion); const BoxRec *box = region_rects(®ion); uint32_t pixel; if (op == PictOpClear) pixel = 0; else if (!sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, dst->format)) goto fallback_composite; sigtrap_assert_active(); if (pixel == 0 && box->x2 - box->x1 == pixmap->drawable.width && box->y2 - box->y1 == pixmap->drawable.height) { memset(pixmap->devPrivate.ptr, 0, pixmap->devKind*pixmap->drawable.height); } else do { DBG(("%s: fallback fill: (%d, %d)x(%d, %d) %08x\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1, pixel)); pixman_fill(pixmap->devPrivate.ptr, pixmap->devKind/sizeof(uint32_t), pixmap->drawable.bitsPerPixel, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1, pixel); box++; } while (--nbox); } else { PicturePtr src; int error; fallback_composite: DBG(("%s: fallback -- fbComposite()\n", __FUNCTION__)); src = CreateSolidPicture(0, color, &error); if (src) { do { fbComposite(op, src, NULL, dst, 0, 0, 0, 0, rects->x, rects->y, rects->width, rects->height); rects++; } while (--num_rects); FreePicture(src, 0); } } sigtrap_put(); } done: DamageRegionProcessPending(dst->pDrawable); cleanup_region: pixman_region_fini(®ion); cleanup_boxes: if (boxes != stack_boxes) free(boxes); } xf86-video-intel-2.99.917/src/sna/kgem.h0000664000175000017500000005363712444634673014426 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifndef KGEM_H #define KGEM_H #include #include #include #include #include "compiler.h" #include "debug.h" struct kgem_bo { struct kgem_request *rq; #define RQ(rq) ((struct kgem_request *)((uintptr_t)(rq) & ~3)) #define RQ_RING(rq) ((uintptr_t)(rq) & 3) #define RQ_IS_BLT(rq) (RQ_RING(rq) == KGEM_BLT) #define MAKE_REQUEST(rq, ring) ((struct kgem_request *)((uintptr_t)(rq) | (ring))) struct drm_i915_gem_exec_object2 *exec; struct kgem_bo *proxy; struct list list; struct list request; struct list vma; void *map__cpu; void *map__gtt; void *map__wc; #define MAP(ptr) ((void*)((uintptr_t)(ptr) & ~3)) struct kgem_bo_binding { struct kgem_bo_binding *next; uint32_t format; uint16_t offset; } binding; uint64_t presumed_offset; uint32_t unique_id; uint32_t refcnt; uint32_t handle; uint32_t target_handle; uint32_t delta; uint32_t active_scanout; union { struct { uint32_t count:27; #define PAGE_SIZE 4096 uint32_t bucket:5; #define NUM_CACHE_BUCKETS 16 #define MAX_CACHE_SIZE (1 << (NUM_CACHE_BUCKETS+12)) } pages; uint32_t bytes; } size; uint32_t pitch : 18; /* max 128k */ uint32_t tiling : 2; uint32_t reusable : 1; uint32_t gpu_dirty : 1; uint32_t gtt_dirty : 1; uint32_t domain : 2; uint32_t needs_flush : 1; uint32_t snoop : 1; uint32_t io : 1; uint32_t flush : 1; uint32_t scanout : 1; uint32_t prime : 1; uint32_t purged : 1; }; #define DOMAIN_NONE 0 #define DOMAIN_CPU 1 #define DOMAIN_GTT 2 #define DOMAIN_GPU 3 struct kgem_request { struct list list; struct kgem_bo *bo; struct list buffers; int ring; }; enum { MAP_GTT = 0, MAP_CPU, NUM_MAP_TYPES, }; struct kgem { unsigned wedged; int fd; unsigned gen; uint32_t unique_id; uint16_t nbatch; uint16_t surface; uint16_t nexec; uint16_t nreloc; uint16_t nreloc__self; uint16_t nfence; uint16_t batch_size; uint32_t *batch; enum kgem_mode { /* order matches I915_EXEC_RING ordering */ KGEM_NONE = 0, KGEM_RENDER, KGEM_BSD, KGEM_BLT, } mode, ring; struct list flushing; struct list large; struct list large_inactive; struct list active[NUM_CACHE_BUCKETS][3]; struct list inactive[NUM_CACHE_BUCKETS]; struct list pinned_batches[2]; struct list snoop; struct list scanout; struct list batch_buffers, active_buffers; struct list requests[2]; struct kgem_request *fence[2]; struct kgem_request *next_request; struct kgem_request static_request; struct { struct list inactive[NUM_CACHE_BUCKETS]; int16_t count; } vma[NUM_MAP_TYPES]; uint32_t batch_flags; uint32_t batch_flags_base; #define I915_EXEC_SECURE (1<<9) #define LOCAL_EXEC_OBJECT_WRITE (1<<2) uint32_t flush:1; uint32_t need_expire:1; uint32_t need_purge:1; uint32_t need_retire:1; uint32_t need_throttle:1; uint32_t needs_semaphore:1; uint32_t needs_reservation:1; uint32_t scanout_busy:1; uint32_t busy:1; uint32_t has_create2 :1; uint32_t has_userptr :1; uint32_t has_blt :1; uint32_t has_relaxed_fencing :1; uint32_t has_relaxed_delta :1; uint32_t has_semaphores :1; uint32_t has_secure_batches :1; uint32_t has_pinned_batches :1; uint32_t has_caching :1; uint32_t has_llc :1; uint32_t has_wt :1; uint32_t has_no_reloc :1; uint32_t has_handle_lut :1; uint32_t has_wc_mmap :1; uint32_t can_blt_cpu :1; uint32_t can_render_y :1; uint16_t fence_max; uint16_t half_cpu_cache_pages; uint32_t aperture_total, aperture_high, aperture_low, aperture_mappable, aperture_fenceable; uint32_t aperture, aperture_fenced, aperture_max_fence; uint32_t max_upload_tile_size, max_copy_tile_size; uint32_t max_gpu_size, max_cpu_size; uint32_t large_object_size, max_object_size; uint32_t buffer_size; void (*context_switch)(struct kgem *kgem, int new_mode); void (*retire)(struct kgem *kgem); void (*expire)(struct kgem *kgem); void (*memcpy_to_tiled_x)(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height); void (*memcpy_from_tiled_x)(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height); struct kgem_bo *batch_bo; uint16_t reloc__self[256]; struct drm_i915_gem_exec_object2 exec[384] page_aligned; struct drm_i915_gem_relocation_entry reloc[8192] page_aligned; #ifdef DEBUG_MEMORY struct { int bo_allocs; size_t bo_bytes; } debug_memory; #endif }; #define KGEM_MAX_DEFERRED_VBO 16 #define KGEM_BATCH_RESERVED 1 #define KGEM_RELOC_RESERVED (KGEM_MAX_DEFERRED_VBO) #define KGEM_EXEC_RESERVED (1+KGEM_MAX_DEFERRED_VBO) #ifndef ARRAY_SIZE #define ARRAY_SIZE(a) (sizeof(a)/sizeof((a)[0])) #endif #define KGEM_BATCH_SIZE(K) ((K)->batch_size-KGEM_BATCH_RESERVED) #define KGEM_EXEC_SIZE(K) (int)(ARRAY_SIZE((K)->exec)-KGEM_EXEC_RESERVED) #define KGEM_RELOC_SIZE(K) (int)(ARRAY_SIZE((K)->reloc)-KGEM_RELOC_RESERVED) void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, unsigned gen); void kgem_reset(struct kgem *kgem); struct kgem_bo *kgem_create_map(struct kgem *kgem, void *ptr, uint32_t size, bool read_only); struct kgem_bo *kgem_create_for_name(struct kgem *kgem, uint32_t name); struct kgem_bo *kgem_create_for_prime(struct kgem *kgem, int name, uint32_t size); int kgem_bo_export_to_prime(struct kgem *kgem, struct kgem_bo *bo); struct kgem_bo *kgem_create_linear(struct kgem *kgem, int size, unsigned flags); struct kgem_bo *kgem_create_proxy(struct kgem *kgem, struct kgem_bo *target, int offset, int length); struct kgem_bo *kgem_upload_source_image(struct kgem *kgem, const void *data, const BoxRec *box, int stride, int bpp); void kgem_proxy_bo_attach(struct kgem_bo *bo, struct kgem_bo **ptr); int kgem_choose_tiling(struct kgem *kgem, int tiling, int width, int height, int bpp); unsigned kgem_can_create_2d(struct kgem *kgem, int width, int height, int depth); #define KGEM_CAN_CREATE_GPU 0x1 #define KGEM_CAN_CREATE_CPU 0x2 #define KGEM_CAN_CREATE_LARGE 0x4 #define KGEM_CAN_CREATE_GTT 0x8 #define KGEM_CAN_CREATE_TILED 0x10 bool kgem_check_surface_size(struct kgem *kgem, uint32_t width, uint32_t height, uint32_t bpp, uint32_t tiling, uint32_t pitch, uint32_t size); struct kgem_bo * kgem_replace_bo(struct kgem *kgem, struct kgem_bo *src, uint32_t width, uint32_t height, uint32_t pitch, uint32_t bpp); enum { CREATE_EXACT = 0x1, CREATE_INACTIVE = 0x2, CREATE_CPU_MAP = 0x4, CREATE_GTT_MAP = 0x8, CREATE_SCANOUT = 0x10, CREATE_PRIME = 0x20, CREATE_TEMPORARY = 0x40, CREATE_CACHED = 0x80, CREATE_UNCACHED = 0x100, CREATE_NO_RETIRE = 0x200, CREATE_NO_THROTTLE = 0x400, }; struct kgem_bo *kgem_create_2d(struct kgem *kgem, int width, int height, int bpp, int tiling, uint32_t flags); struct kgem_bo *kgem_create_cpu_2d(struct kgem *kgem, int width, int height, int bpp, uint32_t flags); bool kgem_bo_convert_to_gpu(struct kgem *kgem, struct kgem_bo *bo, unsigned flags); uint32_t kgem_bo_get_binding(struct kgem_bo *bo, uint32_t format); void kgem_bo_set_binding(struct kgem_bo *bo, uint32_t format, uint16_t offset); bool kgem_retire(struct kgem *kgem); void kgem_retire__buffers(struct kgem *kgem); static inline bool kgem_bo_discard_cache(struct kgem_bo *bo, bool force) { if (bo == NULL || bo->proxy == NULL) return false; if (force) return true; if (bo->proxy->rq) return false; return bo->snoop; } bool __kgem_ring_is_idle(struct kgem *kgem, int ring); static inline bool kgem_ring_is_idle(struct kgem *kgem, int ring) { ring = ring == KGEM_BLT; if (list_is_empty(&kgem->requests[ring])) return true; return __kgem_ring_is_idle(kgem, ring); } static inline bool kgem_is_idle(struct kgem *kgem) { if (!kgem->need_retire) return true; return kgem_ring_is_idle(kgem, kgem->ring); } static inline bool __kgem_ring_empty(struct kgem *kgem) { return list_is_empty(&kgem->requests[kgem->ring == KGEM_BLT]); } void _kgem_submit(struct kgem *kgem); static inline void kgem_submit(struct kgem *kgem) { if (kgem->nbatch) _kgem_submit(kgem); } static inline void kgem_bo_submit(struct kgem *kgem, struct kgem_bo *bo) { if (bo->exec == NULL) return; assert(bo->refcnt); _kgem_submit(kgem); } void kgem_scanout_flush(struct kgem *kgem, struct kgem_bo *bo); static inline struct kgem_bo *kgem_bo_reference(struct kgem_bo *bo) { assert(bo->refcnt); bo->refcnt++; return bo; } void _kgem_bo_destroy(struct kgem *kgem, struct kgem_bo *bo); static inline void kgem_bo_destroy(struct kgem *kgem, struct kgem_bo *bo) { assert(bo->refcnt); if (--bo->refcnt == 0) _kgem_bo_destroy(kgem, bo); } void kgem_clear_dirty(struct kgem *kgem); static inline void kgem_set_mode(struct kgem *kgem, enum kgem_mode mode, struct kgem_bo *bo) { assert(!kgem->wedged); #if DEBUG_FLUSH_BATCH kgem_submit(kgem); #endif if (kgem->nreloc && bo->exec == NULL && kgem_ring_is_idle(kgem, kgem->ring)) { DBG(("%s: flushing before new bo\n", __FUNCTION__)); _kgem_submit(kgem); } if (kgem->mode == mode) return; kgem->context_switch(kgem, mode); kgem->mode = mode; } static inline void _kgem_set_mode(struct kgem *kgem, enum kgem_mode mode) { assert(kgem->mode == KGEM_NONE); assert(kgem->nbatch == 0); assert(!kgem->wedged); kgem->context_switch(kgem, mode); kgem->mode = mode; } static inline int kgem_batch_space(struct kgem *kgem) { int rem = kgem->surface - kgem->nbatch; assert(rem > 0); return rem - KGEM_BATCH_RESERVED; } static inline bool kgem_check_batch(struct kgem *kgem, int num_dwords) { assert(num_dwords > 0); assert(kgem->nbatch < kgem->surface); assert(kgem->surface <= kgem->batch_size); return likely(kgem->nbatch + num_dwords + KGEM_BATCH_RESERVED <= kgem->surface); } static inline bool kgem_check_reloc(struct kgem *kgem, int n) { assert(kgem->nreloc <= KGEM_RELOC_SIZE(kgem)); return likely(kgem->nreloc + n <= KGEM_RELOC_SIZE(kgem)); } static inline bool kgem_check_exec(struct kgem *kgem, int n) { assert(kgem->nexec <= KGEM_EXEC_SIZE(kgem)); return likely(kgem->nexec + n <= KGEM_EXEC_SIZE(kgem)); } static inline bool kgem_check_reloc_and_exec(struct kgem *kgem, int n) { return kgem_check_reloc(kgem, n) && kgem_check_exec(kgem, n); } static inline bool kgem_check_batch_with_surfaces(struct kgem *kgem, int num_dwords, int num_surfaces) { return (int)(kgem->nbatch + num_dwords + KGEM_BATCH_RESERVED) <= (int)(kgem->surface - num_surfaces*8) && kgem_check_reloc(kgem, num_surfaces) && kgem_check_exec(kgem, num_surfaces); } static inline uint32_t *kgem_get_batch(struct kgem *kgem) { if (kgem->nreloc) { unsigned mode = kgem->mode; _kgem_submit(kgem); _kgem_set_mode(kgem, mode); } return kgem->batch + kgem->nbatch; } bool kgem_check_bo(struct kgem *kgem, ...) __attribute__((sentinel(0))); bool kgem_check_bo_fenced(struct kgem *kgem, struct kgem_bo *bo); bool kgem_check_many_bo_fenced(struct kgem *kgem, ...) __attribute__((sentinel(0))); #define KGEM_RELOC_FENCED 0x8000 uint32_t kgem_add_reloc(struct kgem *kgem, uint32_t pos, struct kgem_bo *bo, uint32_t read_write_domains, uint32_t delta); uint64_t kgem_add_reloc64(struct kgem *kgem, uint32_t pos, struct kgem_bo *bo, uint32_t read_write_domains, uint64_t delta); void *kgem_bo_map(struct kgem *kgem, struct kgem_bo *bo); void *kgem_bo_map__async(struct kgem *kgem, struct kgem_bo *bo); void *kgem_bo_map__gtt(struct kgem *kgem, struct kgem_bo *bo); void *kgem_bo_map__wc(struct kgem *kgem, struct kgem_bo *bo); void kgem_bo_sync__gtt(struct kgem *kgem, struct kgem_bo *bo); void *kgem_bo_map__debug(struct kgem *kgem, struct kgem_bo *bo); void *kgem_bo_map__cpu(struct kgem *kgem, struct kgem_bo *bo); void kgem_bo_sync__cpu(struct kgem *kgem, struct kgem_bo *bo); void kgem_bo_sync__cpu_full(struct kgem *kgem, struct kgem_bo *bo, bool write); uint32_t kgem_bo_flink(struct kgem *kgem, struct kgem_bo *bo); bool kgem_bo_write(struct kgem *kgem, struct kgem_bo *bo, const void *data, int length); int kgem_bo_fenced_size(struct kgem *kgem, struct kgem_bo *bo); void kgem_get_tile_size(struct kgem *kgem, int tiling, int pitch, int *tile_width, int *tile_height, int *tile_size); static inline int __kgem_buffer_size(struct kgem_bo *bo) { assert(bo->proxy != NULL); return bo->size.bytes; } static inline int __kgem_bo_size(struct kgem_bo *bo) { assert(bo->proxy == NULL); return PAGE_SIZE * bo->size.pages.count; } static inline int __kgem_bo_num_pages(struct kgem_bo *bo) { assert(bo->proxy == NULL); return bo->size.pages.count; } static inline int kgem_bo_size(struct kgem_bo *bo) { if (bo->proxy) return __kgem_buffer_size(bo); else return __kgem_bo_size(bo); } static inline bool kgem_bo_blt_pitch_is_ok(struct kgem *kgem, struct kgem_bo *bo) { int pitch = bo->pitch; if (kgem->gen >= 0100 && pitch & (1 << 4)) { /* bdw is broken */ DBG(("%s: can not blt to handle=%d, pitch=%d\n", __FUNCTION__, bo->handle, pitch)); return false; } if (kgem->gen >= 040 && bo->tiling) pitch /= 4; if (pitch > MAXSHORT) { DBG(("%s: can not blt to handle=%d, adjusted pitch=%d\n", __FUNCTION__, bo->handle, pitch)); return false; } return true; } static inline bool kgem_bo_can_blt(struct kgem *kgem, struct kgem_bo *bo) { assert(bo->refcnt); if (bo->tiling == I915_TILING_Y) { DBG(("%s: can not blt to handle=%d, tiling=Y\n", __FUNCTION__, bo->handle)); return false; } if (kgem->gen >= 0100 && bo->proxy && bo->delta & (1 << 4)) { DBG(("%s: can not blt to handle=%d, delta=%d\n", __FUNCTION__, bo->handle, bo->delta)); return false; } return kgem_bo_blt_pitch_is_ok(kgem, bo); } static inline bool kgem_bo_is_snoop(struct kgem_bo *bo) { assert(bo->refcnt); while (bo->proxy) bo = bo->proxy; return bo->snoop; } void kgem_bo_undo(struct kgem *kgem, struct kgem_bo *bo); void kgem_bo_pair_undo(struct kgem *kgem, struct kgem_bo *a, struct kgem_bo *b); bool __kgem_busy(struct kgem *kgem, int handle); static inline void kgem_bo_mark_busy(struct kgem *kgem, struct kgem_bo *bo, int ring) { assert(bo->refcnt); bo->needs_flush = true; if (bo->rq) { bo->rq = MAKE_REQUEST(RQ(bo->rq), ring); } else { bo->rq = MAKE_REQUEST(kgem, ring); list_add(&bo->request, &kgem->flushing); kgem->need_retire = true; } } inline static void __kgem_bo_clear_busy(struct kgem_bo *bo) { DBG(("%s: handle=%d\n", __FUNCTION__, bo->handle)); bo->rq = NULL; list_del(&bo->request); bo->domain = DOMAIN_NONE; bo->needs_flush = false; bo->gtt_dirty = false; } static inline bool kgem_bo_is_busy(struct kgem_bo *bo) { DBG(("%s: handle=%d, domain: %d exec? %d, rq? %d\n", __FUNCTION__, bo->handle, bo->domain, bo->exec != NULL, bo->rq != NULL)); assert(bo->refcnt); return bo->rq; } void __kgem_retire_requests_upto(struct kgem *kgem, struct kgem_bo *bo); static inline bool __kgem_bo_is_busy(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: handle=%d, domain: %d exec? %d, rq? %d\n", __FUNCTION__, bo->handle, bo->domain, bo->exec != NULL, bo->rq != NULL)); assert(bo->refcnt); if (bo->exec) return true; if (bo->rq && !__kgem_busy(kgem, bo->handle)) { __kgem_retire_requests_upto(kgem, bo); assert(list_is_empty(&bo->request)); assert(bo->rq == NULL); assert(bo->domain == DOMAIN_NONE); } return kgem_bo_is_busy(bo); } static inline bool kgem_bo_is_render(struct kgem_bo *bo) { DBG(("%s: handle=%d, rq? %d [%d]\n", __FUNCTION__, bo->handle, bo->rq != NULL, (int)RQ_RING(bo->rq))); assert(bo->refcnt); return bo->rq && RQ_RING(bo->rq) == I915_EXEC_RENDER; } static inline void kgem_bo_mark_unreusable(struct kgem_bo *bo) { assert(bo->refcnt); while (bo->proxy) { bo->flush = true; bo = bo->proxy; assert(bo->refcnt); } bo->flush = true; bo->reusable = false; } static inline bool kgem_bo_is_dirty(struct kgem_bo *bo) { if (bo == NULL) return false; assert(bo->refcnt); return bo->gpu_dirty; } static inline void kgem_bo_unclean(struct kgem *kgem, struct kgem_bo *bo) { /* The bo is outside of our control, so presume it is written to */ bo->needs_flush = true; if (bo->rq == NULL) bo->rq = (void *)kgem; if (bo->domain != DOMAIN_GPU) bo->domain = DOMAIN_NONE; } static inline void __kgem_bo_mark_dirty(struct kgem_bo *bo) { DBG(("%s: handle=%d (proxy? %d)\n", __FUNCTION__, bo->handle, bo->proxy != NULL)); assert(bo->refcnt); assert(bo->exec); assert(bo->rq); bo->exec->flags |= LOCAL_EXEC_OBJECT_WRITE; bo->needs_flush = bo->gpu_dirty = true; list_move(&bo->request, &RQ(bo->rq)->buffers); } static inline void kgem_bo_mark_dirty(struct kgem_bo *bo) { assert(bo->refcnt); do { assert(bo->exec); assert(bo->rq); if (bo->gpu_dirty) return; __kgem_bo_mark_dirty(bo); } while ((bo = bo->proxy)); } static inline bool kgem_bo_mapped(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: handle=%d, map=%p:%p, tiling=%d, domain=%d\n", __FUNCTION__, bo->handle, bo->map__gtt, bo->map__cpu, bo->tiling, bo->domain)); assert(bo->proxy == NULL); if (bo->tiling == I915_TILING_NONE && (bo->domain == DOMAIN_CPU || kgem->has_llc)) return bo->map__cpu != NULL; if (bo->tiling == I915_TILING_NONE && bo->map__wc) return true; return bo->map__gtt != NULL; } static inline bool kgem_bo_can_map(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: handle=%d, map=%p:%p:%p, tiling=%d, domain=%d, offset=%ld\n", __FUNCTION__, bo->handle, bo->map__gtt, bo->map__wc, bo->map__cpu, bo->tiling, bo->domain, (long)bo->presumed_offset)); if (!bo->tiling && (kgem->has_llc || bo->domain == DOMAIN_CPU)) return true; assert(bo->proxy == NULL); if (bo->map__gtt != NULL) return true; if (kgem->gen == 021 && bo->tiling == I915_TILING_Y) return false; if (!bo->tiling && kgem->has_wc_mmap) return true; return __kgem_bo_num_pages(bo) <= kgem->aperture_mappable / 4; } static inline bool kgem_bo_can_map__cpu(struct kgem *kgem, struct kgem_bo *bo, bool write) { DBG(("%s: handle=%d\n", __FUNCTION__, bo->handle)); assert(bo->refcnt); if (bo->purged || (bo->scanout && write)) { DBG(("%s: no, writing to scanout? %d, or is stolen [inaccessible via CPU]? %d\n", __FUNCTION__, bo->scanout && write, bo->purged)); return false; } if (kgem->has_llc) { DBG(("%s: yes, has LLC and target is in LLC\n", __FUNCTION__)); return true; } DBG(("%s: non-LLC - CPU domain? %d, clean? %d\n", __FUNCTION__, bo->domain == DOMAIN_CPU, !write || bo->exec == NULL)); if (bo->domain != DOMAIN_CPU) return false; return !write || bo->exec == NULL; } #define KGEM_BUFFER_WRITE 0x1 #define KGEM_BUFFER_INPLACE 0x2 #define KGEM_BUFFER_LAST 0x4 #define KGEM_BUFFER_WRITE_INPLACE (KGEM_BUFFER_WRITE | KGEM_BUFFER_INPLACE) struct kgem_bo *kgem_create_buffer(struct kgem *kgem, uint32_t size, uint32_t flags, void **ret); struct kgem_bo *kgem_create_buffer_2d(struct kgem *kgem, int width, int height, int bpp, uint32_t flags, void **ret); bool kgem_buffer_is_inplace(struct kgem_bo *bo); void kgem_buffer_read_sync(struct kgem *kgem, struct kgem_bo *bo); int kgem_is_wedged(struct kgem *kgem); void kgem_throttle(struct kgem *kgem); #define MAX_INACTIVE_TIME 10 bool kgem_expire_cache(struct kgem *kgem); bool kgem_cleanup_cache(struct kgem *kgem); void kgem_clean_scanout_cache(struct kgem *kgem); void kgem_clean_large_cache(struct kgem *kgem); #if HAS_DEBUG_FULL void __kgem_batch_debug(struct kgem *kgem, uint32_t nbatch); #else static inline void __kgem_batch_debug(struct kgem *kgem, uint32_t nbatch) { (void)kgem; (void)nbatch; } #endif static inline void memcpy_to_tiled_x(struct kgem *kgem, const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { assert(kgem->memcpy_to_tiled_x); assert(src_x >= 0 && src_y >= 0); assert(dst_x >= 0 && dst_y >= 0); assert(8*src_stride >= (src_x+width) * bpp); assert(8*dst_stride >= (dst_x+width) * bpp); return kgem->memcpy_to_tiled_x(src, dst, bpp, src_stride, dst_stride, src_x, src_y, dst_x, dst_y, width, height); } static inline void memcpy_from_tiled_x(struct kgem *kgem, const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { assert(kgem->memcpy_from_tiled_x); assert(src_x >= 0 && src_y >= 0); assert(dst_x >= 0 && dst_y >= 0); assert(8*src_stride >= (src_x+width) * bpp); assert(8*dst_stride >= (dst_x+width) * bpp); return kgem->memcpy_from_tiled_x(src, dst, bpp, src_stride, dst_stride, src_x, src_y, dst_x, dst_y, width, height); } void choose_memcpy_tiled_x(struct kgem *kgem, int swizzling); #endif /* KGEM_H */ xf86-video-intel-2.99.917/src/sna/sna_video_overlay.c0000664000175000017500000005537012432737457017203 00000000000000/*************************************************************************** Copyright 2000-2011 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_video.h" #include #include #include #include #include #include "intel_options.h" #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE) #define HAS_GAMMA(sna) ((sna)->kgem.gen >= 030) static Atom xvBrightness, xvContrast, xvSaturation, xvColorKey, xvPipe, xvAlwaysOnTop; static Atom xvGamma0, xvGamma1, xvGamma2, xvGamma3, xvGamma4, xvGamma5; /* Limits for the overlay/textured video source sizes. The documented hardware * limits are 2048x2048 or better for overlay and both of our textured video * implementations. Additionally, on the 830 and 845, larger sizes resulted in * the card hanging, so we keep the limits lower there. */ #define IMAGE_MAX_WIDTH 2048 #define IMAGE_MAX_HEIGHT 2048 #define IMAGE_MAX_WIDTH_LEGACY 1024 #define IMAGE_MAX_HEIGHT_LEGACY 1088 static XvFormatRec Formats[] = { {15}, {16}, {24} }; static const XvAttributeRec Attributes[] = { {XvSettable | XvGettable, 0, (1 << 24) - 1, (char *)"XV_COLORKEY"}, {XvSettable | XvGettable, 0, 1, (char *)"XV_ALWAYS_ON_TOP"}, {XvSettable | XvGettable, -128, 127, (char *)"XV_BRIGHTNESS"}, {XvSettable | XvGettable, 0, 255, (char *)"XV_CONTRAST"}, {XvSettable | XvGettable, 0, 1023, (char *)"XV_SATURATION"}, {XvSettable | XvGettable, -1, 1, (char *)"XV_PIPE"}, #define NUM_ATTRIBUTES 6 {XvSettable | XvGettable, 0, 0xffffff, (char *)"XV_GAMMA0"}, {XvSettable | XvGettable, 0, 0xffffff, (char *)"XV_GAMMA1"}, {XvSettable | XvGettable, 0, 0xffffff, (char *)"XV_GAMMA2"}, {XvSettable | XvGettable, 0, 0xffffff, (char *)"XV_GAMMA3"}, {XvSettable | XvGettable, 0, 0xffffff, (char *)"XV_GAMMA4"}, {XvSettable | XvGettable, 0, 0xffffff, (char *)"XV_GAMMA5"} #define GAMMA_ATTRIBUTES 6 }; static const XvImageRec Images[] = { XVIMAGE_YUY2, XVIMAGE_YV12, XVIMAGE_I420, XVIMAGE_UYVY, XVMC_YUV }; /* kernel modesetting overlay functions */ static bool sna_has_overlay(struct sna *sna) { struct drm_i915_getparam gp; int has_overlay = 0; int ret; VG_CLEAR(gp); gp.param = I915_PARAM_HAS_OVERLAY; gp.value = &has_overlay; ret = drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_GETPARAM, &gp); return ret == 0 && has_overlay; } static bool sna_video_overlay_update_attrs(struct sna_video *video) { struct drm_intel_overlay_attrs attrs; DBG(("%s()\n", __FUNCTION__)); attrs.flags = I915_OVERLAY_UPDATE_ATTRS; attrs.brightness = video->brightness; attrs.contrast = video->contrast; attrs.saturation = video->saturation; attrs.color_key = video->color_key; attrs.gamma0 = video->gamma0; attrs.gamma1 = video->gamma1; attrs.gamma2 = video->gamma2; attrs.gamma3 = video->gamma3; attrs.gamma4 = video->gamma4; attrs.gamma5 = video->gamma5; if (video->AlwaysOnTop) attrs.flags |= 1<<2; return drmIoctl(video->sna->kgem.fd, DRM_IOCTL_I915_OVERLAY_ATTRS, &attrs) == 0; } static int sna_video_overlay_stop(ddStopVideo_ARGS) { struct sna_video *video = port->devPriv.ptr; struct sna *sna = video->sna; struct drm_intel_overlay_put_image request; DBG(("%s()\n", __FUNCTION__)); REGION_EMPTY(scrn->pScreen, &video->clip); request.flags = 0; (void)drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_OVERLAY_PUT_IMAGE, &request); if (video->bo[0]) kgem_bo_destroy(&sna->kgem, video->bo[0]); video->bo[0] = NULL; sna_video_free_buffers(video); sna_window_set_port((WindowPtr)draw, NULL); return Success; } static int sna_video_overlay_set_attribute(ddSetPortAttribute_ARGS) { struct sna_video *video = port->devPriv.ptr; struct sna *sna = video->sna; DBG(("%s: set(%lx) to %d\n", __FUNCTION__, (long)attribute, (int)value)); if (attribute == xvBrightness) { if ((value < -128) || (value > 127)) return BadValue; DBG(("%s: BRIGHTNESS %d -> %d\n", __FUNCTION__, video->contrast, (int)value)); video->brightness = value; } else if (attribute == xvContrast) { if ((value < 0) || (value > 255)) return BadValue; DBG(("%s: CONTRAST %d -> %d\n", __FUNCTION__, video->contrast, (int)value)); video->contrast = value; } else if (attribute == xvSaturation) { if ((value < 0) || (value > 1023)) return BadValue; DBG(("%s: SATURATION %d -> %d\n", __FUNCTION__, video->saturation, (int)value)); video->saturation = value; } else if (attribute == xvPipe) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(sna->scrn); if ((value < -1) || (value >= xf86_config->num_crtc)) return BadValue; if (value < 0) video->desired_crtc = NULL; else video->desired_crtc = xf86_config->crtc[value]; } else if (attribute == xvAlwaysOnTop) { DBG(("%s: ALWAYS_ON_TOP: %d -> %d\n", __FUNCTION__, video->AlwaysOnTop, !!value)); video->AlwaysOnTop = !!value; } else if (attribute == xvGamma0 && HAS_GAMMA(sna)) { video->gamma0 = value; } else if (attribute == xvGamma1 && HAS_GAMMA(sna)) { video->gamma1 = value; } else if (attribute == xvGamma2 && HAS_GAMMA(sna)) { video->gamma2 = value; } else if (attribute == xvGamma3 && HAS_GAMMA(sna)) { video->gamma3 = value; } else if (attribute == xvGamma4 && HAS_GAMMA(sna)) { video->gamma4 = value; } else if (attribute == xvGamma5 && HAS_GAMMA(sna)) { video->gamma5 = value; } else if (attribute == xvColorKey) { video->color_key = value; RegionEmpty(&video->clip); DBG(("COLORKEY\n")); } else return BadMatch; if ((attribute == xvGamma0 || attribute == xvGamma1 || attribute == xvGamma2 || attribute == xvGamma3 || attribute == xvGamma4 || attribute == xvGamma5) && HAS_GAMMA(sna)) { DBG(("%s: GAMMA\n", __FUNCTION__)); } if (!sna_video_overlay_update_attrs(video)) return BadValue; return Success; } static int sna_video_overlay_get_attribute(ddGetPortAttribute_ARGS) { struct sna_video *video = port->devPriv.ptr; struct sna *sna = video->sna; if (attribute == xvBrightness) { *value = video->brightness; } else if (attribute == xvContrast) { *value = video->contrast; } else if (attribute == xvSaturation) { *value = video->saturation; } else if (attribute == xvPipe) { int c; xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(sna->scrn); for (c = 0; c < xf86_config->num_crtc; c++) if (xf86_config->crtc[c] == video->desired_crtc) break; if (c == xf86_config->num_crtc) c = -1; *value = c; } else if (attribute == xvAlwaysOnTop) { *value = video->AlwaysOnTop; } else if (attribute == xvGamma0 && HAS_GAMMA(sna)) { *value = video->gamma0; } else if (attribute == xvGamma1 && HAS_GAMMA(sna)) { *value = video->gamma1; } else if (attribute == xvGamma2 && HAS_GAMMA(sna)) { *value = video->gamma2; } else if (attribute == xvGamma3 && HAS_GAMMA(sna)) { *value = video->gamma3; } else if (attribute == xvGamma4 && HAS_GAMMA(sna)) { *value = video->gamma4; } else if (attribute == xvGamma5 && HAS_GAMMA(sna)) { *value = video->gamma5; } else if (attribute == xvColorKey) { *value = video->color_key; } else return BadMatch; return Success; } static int sna_video_overlay_best_size(ddQueryBestSize_ARGS) { struct sna_video *video = port->devPriv.ptr; struct sna *sna = video->sna; short max_w, max_h; if (vid_w > (drw_w << 1) || vid_h > (drw_h << 1)){ drw_w = vid_w >> 1; drw_h = vid_h >> 1; } if (sna->kgem.gen < 021) { max_w = IMAGE_MAX_WIDTH_LEGACY; max_h = IMAGE_MAX_HEIGHT_LEGACY; } else { max_w = IMAGE_MAX_WIDTH; max_h = IMAGE_MAX_HEIGHT; } while (drw_w > max_w || drw_h > max_h) { drw_w >>= 1; drw_h >>= 1; } *p_w = drw_w; *p_h = drw_h; return Success; } static void update_dst_box_to_crtc_coords(struct sna *sna, xf86CrtcPtr crtc, BoxPtr dstBox) { ScrnInfoPtr scrn = sna->scrn; int tmp; /* for overlay, we should take it from crtc's screen * coordinate to current crtc's display mode. * yeah, a bit confusing. */ switch (crtc->rotation & 0xf) { case RR_Rotate_0: dstBox->x1 -= crtc->x; dstBox->x2 -= crtc->x; dstBox->y1 -= crtc->y; dstBox->y2 -= crtc->y; break; case RR_Rotate_90: tmp = dstBox->x1; dstBox->x1 = dstBox->y1 - crtc->x; dstBox->y1 = scrn->virtualX - tmp - crtc->y; tmp = dstBox->x2; dstBox->x2 = dstBox->y2 - crtc->x; dstBox->y2 = scrn->virtualX - tmp - crtc->y; tmp = dstBox->y1; dstBox->y1 = dstBox->y2; dstBox->y2 = tmp; break; case RR_Rotate_180: tmp = dstBox->x1; dstBox->x1 = scrn->virtualX - dstBox->x2 - crtc->x; dstBox->x2 = scrn->virtualX - tmp - crtc->x; tmp = dstBox->y1; dstBox->y1 = scrn->virtualY - dstBox->y2 - crtc->y; dstBox->y2 = scrn->virtualY - tmp - crtc->y; break; case RR_Rotate_270: tmp = dstBox->x1; dstBox->x1 = scrn->virtualY - dstBox->y1 - crtc->x; dstBox->y1 = tmp - crtc->y; tmp = dstBox->x2; dstBox->x2 = scrn->virtualY - dstBox->y2 - crtc->x; dstBox->y2 = tmp - crtc->y; tmp = dstBox->x1; dstBox->x1 = dstBox->x2; dstBox->x2 = tmp; break; } return; } static bool sna_video_overlay_show(struct sna *sna, struct sna_video *video, struct sna_video_frame *frame, xf86CrtcPtr crtc, BoxPtr dstBox, short src_w, short src_h, short drw_w, short drw_h) { struct drm_intel_overlay_put_image request; bool planar = is_planar_fourcc(frame->id); float scale; DBG(("%s: src=(%dx%d), dst=(%dx%d)\n", __FUNCTION__, src_w, src_h, drw_w, drw_h)); update_dst_box_to_crtc_coords(sna, crtc, dstBox); if (crtc->rotation & (RR_Rotate_90 | RR_Rotate_270)) { int tmp; tmp = frame->width; frame->width = frame->height; frame->height = tmp; tmp = drw_w; drw_w = drw_h; drw_h = tmp; tmp = src_w; src_w = src_h; src_h = tmp; } memset(&request, 0, sizeof(request)); request.flags = I915_OVERLAY_ENABLE; request.bo_handle = frame->bo->handle; if (planar) { request.stride_Y = frame->pitch[1]; request.stride_UV = frame->pitch[0]; } else { request.stride_Y = frame->pitch[0]; request.stride_UV = 0; } request.offset_Y = 0; request.offset_U = frame->UBufOffset; request.offset_V = frame->VBufOffset; DBG(("%s: handle=%d, stride_Y=%d, stride_UV=%d, off_Y: %i, off_U: %i, off_V: %i\n", __FUNCTION__, request.bo_handle, request.stride_Y, request.stride_UV, request.offset_Y, request.offset_U, request.offset_V)); request.crtc_id = sna_crtc_id(crtc); request.dst_x = dstBox->x1; request.dst_y = dstBox->y1; request.dst_width = dstBox->x2 - dstBox->x1; request.dst_height = dstBox->y2 - dstBox->y1; DBG(("%s: crtc=%d, dst=(%d, %d)x(%d, %d)\n", __FUNCTION__, request.crtc_id, request.dst_x, request.dst_y, request.dst_width, request.dst_height)); request.src_width = frame->width; request.src_height = frame->height; /* adjust src dimensions */ if (request.dst_height > 1) { scale = ((float)request.dst_height - 1) / ((float)drw_h - 1); request.src_scan_height = src_h * scale; } else request.src_scan_height = 1; if (request.dst_width > 1) { scale = ((float)request.dst_width - 1) / ((float)drw_w - 1); request.src_scan_width = src_w * scale; } else request.src_scan_width = 1; DBG(("%s: src=(%d, %d) scan=(%d, %d)\n", __FUNCTION__, request.src_width, request.src_height, request.src_scan_width, request.src_scan_height)); if (planar) { request.flags |= I915_OVERLAY_YUV_PLANAR | I915_OVERLAY_YUV420; } else { request.flags |= I915_OVERLAY_YUV_PACKED | I915_OVERLAY_YUV422; if (frame->id == FOURCC_UYVY) request.flags |= I915_OVERLAY_Y_SWAP; } DBG(("%s: flags=%x\n", __FUNCTION__, request.flags)); if (drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_OVERLAY_PUT_IMAGE, &request)) { DBG(("%s: Putimage failed\n", __FUNCTION__)); return false; } if (video->bo[0] != frame->bo) { if (video->bo[0]) kgem_bo_destroy(&sna->kgem, video->bo[0]); video->bo[0] = kgem_bo_reference(frame->bo); } return true; } static int sna_video_overlay_put_image(ddPutImage_ARGS) { struct sna_video *video = port->devPriv.ptr; struct sna *sna = video->sna; struct sna_video_frame frame; xf86CrtcPtr crtc; BoxRec dstBox; RegionRec clip; int ret; DBG(("%s: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d), width %d, height %d\n", __FUNCTION__, src_x, src_y, src_w, src_h, drw_x, drw_y, drw_w, drw_h, width, height)); /* If dst width and height are less than 1/8th the src size, the * src/dst scale factor becomes larger than 8 and doesn't fit in * the scale register. */ if (src_w >= (drw_w * 8)) drw_w = src_w / 7; if (src_h >= (drw_h * 8)) drw_h = src_h / 7; clip.extents.x1 = draw->x + drw_x; clip.extents.y1 = draw->y + drw_y; clip.extents.x2 = clip.extents.x1 + drw_w; clip.extents.y2 = clip.extents.y1 + drw_h; clip.data = NULL; DBG(("%s: always_on_top=%d\n", __FUNCTION__, video->AlwaysOnTop)); if (!video->AlwaysOnTop) RegionIntersect(&clip, &clip, gc->pCompositeClip); if (box_empty(&clip.extents)) goto invisible; DBG(("%s: src=(%d, %d),(%d, %d), dst=(%d, %d),(%d, %d), id=%d, sizep=%dx%d, sync?=%d\n", __FUNCTION__, src_x, src_y, src_w, src_h, drw_x, drw_y, drw_w, drw_h, format->id, width, height, sync)); DBG(("%s: region %d:(%d, %d), (%d, %d)\n", __FUNCTION__, region_num_rects(&clip), clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2)); sna_video_frame_init(video, format->id, width, height, &frame); if (!sna_video_clip_helper(video, &frame, &crtc, &dstBox, src_x, src_y, draw->x + drw_x, draw->y + drw_y, src_w, src_h, drw_w, drw_h, &clip)) goto invisible; if (!crtc) goto invisible; /* overlay can't handle rotation natively, store it for the copy func */ sna_video_frame_set_rotation(video, &frame, crtc->rotation); if (xvmc_passthrough(format->id)) { DBG(("%s: using passthough, name=%d\n", __FUNCTION__, *(uint32_t *)buf)); if (*(uint32_t*)buf == 0) goto invisible; frame.bo = kgem_create_for_name(&sna->kgem, *(uint32_t*)buf); if (frame.bo == NULL) { DBG(("%s: failed to open bo\n", __FUNCTION__)); return BadAlloc; } if (kgem_bo_size(frame.bo) < frame.size) { DBG(("%s: bo size=%d, expected=%d\n", __FUNCTION__, kgem_bo_size(frame.bo), frame.size)); kgem_bo_destroy(&sna->kgem, frame.bo); return BadAlloc; } frame.image.x1 = 0; frame.image.y1 = 0; frame.image.x2 = frame.width; frame.image.y2 = frame.height; } else { frame.bo = sna_video_buffer(video, &frame); if (frame.bo == NULL) { DBG(("%s: failed to allocate video bo\n", __FUNCTION__)); return BadAlloc; } if (!sna_video_copy_data(video, &frame, buf)) { DBG(("%s: failed to copy video data\n", __FUNCTION__)); return BadAlloc; } } ret = Success; if (sna_video_overlay_show (sna, video, &frame, crtc, &dstBox, src_w, src_h, drw_w, drw_h)) { //xf86XVFillKeyHelperDrawable(draw, video->color_key, &clip); if (!video->AlwaysOnTop && !RegionEqual(&video->clip, &clip) && sna_blt_fill_boxes(sna, GXcopy, __sna_pixmap_get_bo(sna->front), sna->front->drawable.bitsPerPixel, video->color_key, region_rects(&clip), region_num_rects(&clip))) RegionCopy(&video->clip, &clip); sna_window_set_port((WindowPtr)draw, port); } else { DBG(("%s: failed to show video frame\n", __FUNCTION__)); ret = BadAlloc; } frame.bo->domain = DOMAIN_NONE; if (xvmc_passthrough(format->id)) kgem_bo_destroy(&sna->kgem, frame.bo); else sna_video_buffer_fini(video); return ret; invisible: /* * If the video isn't visible on any CRTC, turn it off */ #if XORG_XV_VERSION < 2 sna_video_overlay_stop(client, port, draw); #else sna_video_overlay_stop(port, draw); #endif return Success; } static int sna_video_overlay_query(ddQueryImageAttributes_ARGS) { struct sna_video *video = port->devPriv.ptr; struct sna_video_frame frame; struct sna *sna = video->sna; int size, tmp; DBG(("%s: w is %d, h is %d\n", __FUNCTION__, *w, *h)); if (sna->kgem.gen < 021) { if (*w > IMAGE_MAX_WIDTH_LEGACY) *w = IMAGE_MAX_WIDTH_LEGACY; if (*h > IMAGE_MAX_HEIGHT_LEGACY) *h = IMAGE_MAX_HEIGHT_LEGACY; } else { if (*w > IMAGE_MAX_WIDTH) *w = IMAGE_MAX_WIDTH; if (*h > IMAGE_MAX_HEIGHT) *h = IMAGE_MAX_HEIGHT; } *w = (*w + 1) & ~1; if (offsets) offsets[0] = 0; switch (format->id) { case FOURCC_XVMC: *h = (*h + 1) & ~1; sna_video_frame_init(video, format->id, *w, *h, &frame); sna_video_frame_set_rotation(video, &frame, RR_Rotate_0); size = sizeof(uint32_t); if (pitches) { pitches[0] = frame.pitch[1]; pitches[1] = frame.pitch[0]; pitches[2] = frame.pitch[0]; } if (offsets) { offsets[1] = frame.UBufOffset; offsets[2] = frame.VBufOffset; } break; /* IA44 is for XvMC only */ case FOURCC_IA44: case FOURCC_AI44: if (pitches) pitches[0] = *w; size = *w * *h; break; case FOURCC_YV12: case FOURCC_I420: *h = (*h + 1) & ~1; size = (*w + 3) & ~3; if (pitches) pitches[0] = size; size *= *h; if (offsets) offsets[1] = size; tmp = ((*w >> 1) + 3) & ~3; if (pitches) pitches[1] = pitches[2] = tmp; tmp *= (*h >> 1); size += tmp; if (offsets) offsets[2] = size; size += tmp; #if 0 if (pitches) ErrorF("pitch 0 is %d, pitch 1 is %d, pitch 2 is %d\n", pitches[0], pitches[1], pitches[2]); if (offsets) ErrorF("offset 1 is %d, offset 2 is %d\n", offsets[1], offsets[2]); if (offsets) ErrorF("size is %d\n", size); #endif break; case FOURCC_UYVY: case FOURCC_YUY2: default: size = *w << 1; if (pitches) pitches[0] = size; size *= *h; break; } return size; } static int sna_video_overlay_color_key(struct sna *sna) { ScrnInfoPtr scrn = sna->scrn; int color_key; if (xf86GetOptValInteger(sna->Options, OPTION_VIDEO_KEY, &color_key)) { } else if (xf86GetOptValInteger(sna->Options, OPTION_COLOR_KEY, &color_key)) { } else { color_key = (1 << scrn->offset.red) | (1 << scrn->offset.green) | (((scrn->mask.blue >> scrn->offset.blue) - 1) << scrn->offset.blue); } return color_key & ((1 << scrn->depth) - 1); } void sna_video_overlay_setup(struct sna *sna, ScreenPtr screen) { XvAdaptorPtr adaptor; struct sna_video *video; XvPortPtr port; if (sna->flags & SNA_IS_HOSTED) return; if (!sna_has_overlay(sna)) return; DBG(("%s()\n", __FUNCTION__)); adaptor = sna_xv_adaptor_alloc(sna); if (adaptor == NULL) return; video = calloc(1, sizeof(*video)); port = calloc(1, sizeof(*port)); if (video == NULL || port == NULL) { free(video); free(port); sna->xv.num_adaptors--; return; } adaptor->type = XvInputMask | XvImageMask; adaptor->pScreen = screen; adaptor->name = (char *)"Intel(R) Video Overlay"; adaptor->nEncodings = 1; adaptor->pEncodings = xnfalloc(sizeof(XvEncodingRec)); adaptor->pEncodings[0].id = 0; adaptor->pEncodings[0].pScreen = screen; adaptor->pEncodings[0].name = (char *)"XV_IMAGE"; adaptor->pEncodings[0].width = sna->kgem.gen < 021 ? IMAGE_MAX_WIDTH_LEGACY : IMAGE_MAX_WIDTH; adaptor->pEncodings[0].height = sna->kgem.gen < 021 ? IMAGE_MAX_HEIGHT_LEGACY : IMAGE_MAX_HEIGHT; adaptor->pEncodings[0].rate.numerator = 1; adaptor->pEncodings[0].rate.denominator = 1; adaptor->pFormats = Formats; adaptor->nFormats = sna_xv_fixup_formats(screen, Formats, ARRAY_SIZE(Formats)); adaptor->nAttributes = NUM_ATTRIBUTES; if (HAS_GAMMA(sna)) adaptor->nAttributes += GAMMA_ATTRIBUTES; adaptor->pAttributes = (XvAttributeRec *)Attributes; adaptor->nImages = ARRAY_SIZE(Images); adaptor->pImages = (XvImageRec *)Images; #if XORG_XV_VERSION < 2 adaptor->ddAllocatePort = sna_xv_alloc_port; adaptor->ddFreePort = sna_xv_free_port; #endif adaptor->ddPutVideo = NULL; adaptor->ddPutStill = NULL; adaptor->ddGetVideo = NULL; adaptor->ddGetStill = NULL; adaptor->ddStopVideo = sna_video_overlay_stop; adaptor->ddSetPortAttribute = sna_video_overlay_set_attribute; adaptor->ddGetPortAttribute = sna_video_overlay_get_attribute; adaptor->ddQueryBestSize = sna_video_overlay_best_size; adaptor->ddPutImage = sna_video_overlay_put_image; adaptor->ddQueryImageAttributes = sna_video_overlay_query; adaptor->nPorts = 1; adaptor->pPorts = port; adaptor->base_id = port->id = FakeClientID(0); AddResource(port->id, XvGetRTPort(), port); port->pAdaptor = adaptor; port->pNotify = NULL; port->pDraw = NULL; port->client = NULL; port->grab.client = NULL; port->time = currentTime; port->devPriv.ptr = video; video->sna = sna; if (sna->kgem.gen >= 040) /* Actually the alignment is 64 bytes, too. But the * stride must be at least 512 bytes. Take the easy fix * and align on 512 bytes unconditionally. */ video->alignment = 512; else if (sna->kgem.gen < 021) /* Harsh, errata on these chipsets limit the stride * to be a multiple of 256 bytes. */ video->alignment = 256; else video->alignment = 64; video->color_key = sna_video_overlay_color_key(sna); video->brightness = -19; /* (255/219) * -16 */ video->contrast = 75; /* 255/219 * 64 */ video->saturation = 146; /* 128/112 * 128 */ video->desired_crtc = NULL; video->gamma5 = 0xc0c0c0; video->gamma4 = 0x808080; video->gamma3 = 0x404040; video->gamma2 = 0x202020; video->gamma1 = 0x101010; video->gamma0 = 0x080808; RegionNull(&video->clip); xvColorKey = MAKE_ATOM("XV_COLORKEY"); xvBrightness = MAKE_ATOM("XV_BRIGHTNESS"); xvContrast = MAKE_ATOM("XV_CONTRAST"); xvSaturation = MAKE_ATOM("XV_SATURATION"); /* Allow the pipe to be switched from pipe A to B when in clone mode */ xvPipe = MAKE_ATOM("XV_PIPE"); xvAlwaysOnTop = MAKE_ATOM("XV_ALWAYS_ON_TOP"); if (HAS_GAMMA(sna)) { xvGamma0 = MAKE_ATOM("XV_GAMMA0"); xvGamma1 = MAKE_ATOM("XV_GAMMA1"); xvGamma2 = MAKE_ATOM("XV_GAMMA2"); xvGamma3 = MAKE_ATOM("XV_GAMMA3"); xvGamma4 = MAKE_ATOM("XV_GAMMA4"); xvGamma5 = MAKE_ATOM("XV_GAMMA5"); } sna_video_overlay_update_attrs(video); DBG(("%s: '%s' initialized %d ports\n", __FUNCTION__, adaptor->name, adaptor->nPorts)); } xf86-video-intel-2.99.917/src/sna/gen4_vertex.h0000664000175000017500000000100212400044327015667 00000000000000#ifndef GEN4_VERTEX_H #define GEN4_VERTEX_H #include "compiler.h" #include "sna.h" #include "sna_render.h" void gen4_vertex_align(struct sna *sna, const struct sna_composite_op *op); void gen4_vertex_flush(struct sna *sna); int gen4_vertex_finish(struct sna *sna); void gen4_vertex_close(struct sna *sna); unsigned gen4_choose_composite_emitter(struct sna *sna, struct sna_composite_op *tmp); unsigned gen4_choose_spans_emitter(struct sna *sna, struct sna_composite_spans_op *tmp); #endif /* GEN4_VERTEX_H */ xf86-video-intel-2.99.917/src/sna/gen3_render.h0000664000175000017500000015611012244635610015652 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef _I915_REG_H_ #define _I915_REG_H_ #define CMD_3D (3 << 29) #define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value) #define PRIM3D (CMD_3D | (0x1f<<24)) #define PRIM3D_INDIRECT_SEQUENTIAL ((1<<23) | (0<<17)) #define PRIM3D_TRILIST (PRIM3D | (0x0<<18)) #define PRIM3D_TRISTRIP (PRIM3D | (0x1<<18)) #define PRIM3D_TRISTRIP_RVRSE (PRIM3D | (0x2<<18)) #define PRIM3D_TRIFAN (PRIM3D | (0x3<<18)) #define PRIM3D_POLY (PRIM3D | (0x4<<18)) #define PRIM3D_LINELIST (PRIM3D | (0x5<<18)) #define PRIM3D_LINESTRIP (PRIM3D | (0x6<<18)) #define PRIM3D_RECTLIST (PRIM3D | (0x7<<18)) #define PRIM3D_POINTLIST (PRIM3D | (0x8<<18)) #define PRIM3D_DIB (PRIM3D | (0x9<<18)) #define PRIM3D_CLEAR_RECT (PRIM3D | (0xa<<18)) #define PRIM3D_ZONE_INIT (PRIM3D | (0xd<<18)) #define PRIM3D_MASK (0x1f<<18) /* p137 */ #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) #define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) #define AA_LINE_ECAAR_WIDTH_0_5 0 #define AA_LINE_ECAAR_WIDTH_1_0 (1<<14) #define AA_LINE_ECAAR_WIDTH_2_0 (2<<14) #define AA_LINE_ECAAR_WIDTH_4_0 (3<<14) #define AA_LINE_REGION_WIDTH_ENABLE (1<<8) #define AA_LINE_REGION_WIDTH_0_5 0 #define AA_LINE_REGION_WIDTH_1_0 (1<<6) #define AA_LINE_REGION_WIDTH_2_0 (2<<6) #define AA_LINE_REGION_WIDTH_4_0 (3<<6) /* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/ #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24)) #define BFO_ENABLE_STENCIL_REF (1<<23) #define BFO_STENCIL_REF_SHIFT 15 #define BFO_STENCIL_REF_MASK (0xff<<15) #define BFO_ENABLE_STENCIL_FUNCS (1<<14) #define BFO_STENCIL_TEST_SHIFT 11 #define BFO_STENCIL_TEST_MASK (0x7<<11) #define BFO_STENCIL_FAIL_SHIFT 8 #define BFO_STENCIL_FAIL_MASK (0x7<<8) #define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5 #define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5) #define BFO_STENCIL_PASS_Z_PASS_SHIFT 2 #define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2) #define BFO_ENABLE_STENCIL_TWO_SIDE (1<<1) #define BFO_STENCIL_TWO_SIDE (1<<0) /* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */ #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24)) #define BFM_ENABLE_STENCIL_TEST_MASK (1<<17) #define BFM_ENABLE_STENCIL_WRITE_MASK (1<<16) #define BFM_STENCIL_TEST_MASK_SHIFT 8 #define BFM_STENCIL_TEST_MASK_MASK (0xff<<8) #define BFM_STENCIL_WRITE_MASK_SHIFT 0 #define BFM_STENCIL_WRITE_MASK_MASK (0xff<<0) /* 3DSTATE_BIN_CONTROL p141 */ /* p143 */ #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) /* Dword 1 */ #define BUF_3D_ID_COLOR_BACK (0x3<<24) #define BUF_3D_ID_DEPTH (0x7<<24) #define BUF_3D_USE_FENCE (1<<23) #define BUF_3D_TILED_SURFACE (1<<22) #define BUF_3D_TILE_WALK_X 0 #define BUF_3D_TILE_WALK_Y (1<<21) /* Dword 2 */ #define BUF_3D_ADDR(x) ((x) & ~0x3) /* 3DSTATE_CHROMA_KEY */ /* 3DSTATE_CLEAR_PARAMETERS, p150 */ #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5) /* Dword 1 */ #define CLEARPARAM_CLEAR_RECT (1 << 16) #define CLEARPARAM_ZONE_INIT (0 << 16) #define CLEARPARAM_WRITE_COLOR (1 << 2) #define CLEARPARAM_WRITE_DEPTH (1 << 1) #define CLEARPARAM_WRITE_STENCIL (1 << 0) /* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */ #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) /* 3DSTATE_COORD_SET_BINDINGS, p154 */ #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24)) #define CSB_TCB(iunit, eunit) ((eunit)<<(iunit*3)) /* p156 */ #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) /* p157 */ #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) /* p158 */ #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) /* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */ #define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16)) /* scale in dword 1 */ /* The depth subrectangle is not supported, but must be disabled. */ /* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */ #define _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<<19) | (1 << 1) | (0 << 0)) /* p161 */ #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) /* Dword 1 */ #define TEX_DEFAULT_COLOR_OGL (0<<30) #define TEX_DEFAULT_COLOR_D3D (1<<30) #define ZR_EARLY_DEPTH (1<<29) #define LOD_PRECLAMP_OGL (1<<28) #define LOD_PRECLAMP_D3D (0<<28) #define DITHER_FULL_ALWAYS (0<<26) #define DITHER_FULL_ON_FB_BLEND (1<<26) #define DITHER_CLAMPED_ALWAYS (2<<26) #define LINEAR_GAMMA_BLEND_32BPP (1<<25) #define DEBUG_DISABLE_ENH_DITHER (1<<24) #define DSTORG_HORT_BIAS(x) ((x)<<20) #define DSTORG_VERT_BIAS(x) ((x)<<16) #define COLOR_4_2_2_CHNL_WRT_ALL 0 #define COLOR_4_2_2_CHNL_WRT_Y (1<<12) #define COLOR_4_2_2_CHNL_WRT_CR (2<<12) #define COLOR_4_2_2_CHNL_WRT_CB (3<<12) #define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) #define COLR_BUF_8BIT 0 #define COLR_BUF_RGB555 (1<<8) #define COLR_BUF_RGB565 (2<<8) #define COLR_BUF_ARGB8888 (3<<8) #define COLR_BUF_ARGB4444 (8<<8) #define COLR_BUF_ARGB1555 (9<<8) #define COLR_BUF_ARGB2AAA (0xa<<8) #define DEPTH_IS_Z 0 #define DEPTH_IS_W (1<<6) #define DEPTH_FRMT_16_FIXED 0 #define DEPTH_FRMT_16_FLOAT (1<<2) #define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) #define DEPTH_FRMT_24_FLOAT_8_OTHER (3<<2) #define VERT_LINE_STRIDE_1 (1<<1) #define VERT_LINE_STRIDE_0 0 #define VERT_LINE_STRIDE_OFS_1 1 #define VERT_LINE_STRIDE_OFS_0 0 /* p166 */ #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) /* Dword 1 */ #define DRAW_RECT_DIS_DEPTH_OFS (1<<30) #define DRAW_DITHER_OFS_X(x) ((x)<<26) #define DRAW_DITHER_OFS_Y(x) ((x)<<24) /* Dword 2 */ #define DRAW_YMIN(x) ((uint16_t)(x)<<16) #define DRAW_XMIN(x) ((uint16_t)(x)) /* Dword 3 */ #define DRAW_YMAX(x) ((uint16_t)(x)<<16) #define DRAW_XMAX(x) ((uint16_t)(x)) /* Dword 4 */ #define DRAW_YORG(x) ((uint16_t)(x)<<16) #define DRAW_XORG(x) ((uint16_t)(x)) /* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */ /* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */ /* _3DSTATE_FOG_COLOR, p173 */ #define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) #define FOG_COLOR_RED(x) ((x)<<16) #define FOG_COLOR_GREEN(x) ((x)<<8) #define FOG_COLOR_BLUE(x) (x) /* _3DSTATE_FOG_MODE, p174 */ #define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) /* Dword 1 */ #define FMC1_FOGFUNC_MODIFY_ENABLE (1<<31) #define FMC1_FOGFUNC_VERTEX (0<<28) #define FMC1_FOGFUNC_PIXEL_EXP (1<<28) #define FMC1_FOGFUNC_PIXEL_EXP2 (2<<28) #define FMC1_FOGFUNC_PIXEL_LINEAR (3<<28) #define FMC1_FOGFUNC_MASK (3<<28) #define FMC1_FOGINDEX_MODIFY_ENABLE (1<<27) #define FMC1_FOGINDEX_Z (0<<25) #define FMC1_FOGINDEX_W (1<<25) #define FMC1_C1_C2_MODIFY_ENABLE (1<<24) #define FMC1_DENSITY_MODIFY_ENABLE (1<<23) #define FMC1_C1_ONE (1<<13) #define FMC1_C1_MASK (0xffff<<4) /* Dword 2 */ #define FMC2_C2_ONE (1<<16) /* Dword 3 */ #define FMC3_D_ONE (1<<16) /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */ #define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) #define IAB_MODIFY_ENABLE (1<<23) #define IAB_ENABLE (1<<22) #define IAB_MODIFY_FUNC (1<<21) #define IAB_FUNC_SHIFT 16 #define IAB_MODIFY_SRC_FACTOR (1<<11) #define IAB_SRC_FACTOR_SHIFT 6 #define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6) #define IAB_MODIFY_DST_FACTOR (1<<5) #define IAB_DST_FACTOR_SHIFT 0 #define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0) #define BLENDFACT_ZERO 0x01 #define BLENDFACT_ONE 0x02 #define BLENDFACT_SRC_COLR 0x03 #define BLENDFACT_INV_SRC_COLR 0x04 #define BLENDFACT_SRC_ALPHA 0x05 #define BLENDFACT_INV_SRC_ALPHA 0x06 #define BLENDFACT_DST_ALPHA 0x07 #define BLENDFACT_INV_DST_ALPHA 0x08 #define BLENDFACT_DST_COLR 0x09 #define BLENDFACT_INV_DST_COLR 0x0a #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b #define BLENDFACT_CONST_COLOR 0x0c #define BLENDFACT_INV_CONST_COLOR 0x0d #define BLENDFACT_CONST_ALPHA 0x0e #define BLENDFACT_INV_CONST_ALPHA 0x0f #define BLENDFACT_MASK 0x0f #define BLENDFUNC_ADD 0x0 #define BLENDFUNC_SUBTRACT 0x1 #define BLENDFUNC_REVERSE_SUBTRACT 0x2 #define BLENDFUNC_MIN 0x3 #define BLENDFUNC_MAX 0x4 #define BLENDFUNC_MASK 0x7 /* 3DSTATE_LOAD_INDIRECT, p180 */ #define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16)) #define LI0_STATE_STATIC_INDIRECT (0x01<<8) #define LI0_STATE_DYNAMIC_INDIRECT (0x02<<8) #define LI0_STATE_SAMPLER (0x04<<8) #define LI0_STATE_MAP (0x08<<8) #define LI0_STATE_PROGRAM (0x10<<8) #define LI0_STATE_CONSTANTS (0x20<<8) #define SIS0_BUFFER_ADDRESS(x) ((x)&~0x3) #define SIS0_FORCE_LOAD (1<<1) #define SIS0_BUFFER_VALID (1<<0) #define SIS1_BUFFER_LENGTH(x) ((x)&0xff) #define DIS0_BUFFER_ADDRESS(x) ((x)&~0x3) #define DIS0_BUFFER_RESET (1<<1) #define DIS0_BUFFER_VALID (1<<0) #define SSB0_BUFFER_ADDRESS(x) ((x)&~0x3) #define SSB0_FORCE_LOAD (1<<1) #define SSB0_BUFFER_VALID (1<<0) #define SSB1_BUFFER_LENGTH(x) ((x)&0xff) #define MSB0_BUFFER_ADDRESS(x) ((x)&~0x3) #define MSB0_FORCE_LOAD (1<<1) #define MSB0_BUFFER_VALID (1<<0) #define MSB1_BUFFER_LENGTH(x) ((x)&0xff) #define PSP0_BUFFER_ADDRESS(x) ((x)&~0x3) #define PSP0_FORCE_LOAD (1<<1) #define PSP0_BUFFER_VALID (1<<0) #define PSP1_BUFFER_LENGTH(x) ((x)&0xff) #define PSC0_BUFFER_ADDRESS(x) ((x)&~0x3) #define PSC0_FORCE_LOAD (1<<1) #define PSC0_BUFFER_VALID (1<<0) #define PSC1_BUFFER_LENGTH(x) ((x)&0xff) /* _3DSTATE_RASTERIZATION_RULES */ #define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) #define ENABLE_POINT_RASTER_RULE (1<<15) #define OGL_POINT_RASTER_RULE (1<<13) #define ENABLE_TEXKILL_3D_4D (1<<10) #define TEXKILL_3D (0<<9) #define TEXKILL_4D (1<<9) #define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) #define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) #define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) #define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) /* _3DSTATE_SCISSOR_ENABLE, p256 */ #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) #define ENABLE_SCISSOR_RECT ((1<<1) | 1) #define DISABLE_SCISSOR_RECT (1<<1) /* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */ #define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) /* Dword 1 */ #define SCISSOR_RECT_0_YMIN(x) ((x)<<16) #define SCISSOR_RECT_0_XMIN(x) (x) /* Dword 2 */ #define SCISSOR_RECT_0_YMAX(x) ((x)<<16) #define SCISSOR_RECT_0_XMAX(x) (x) /* p189 */ #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16)) #define I1_LOAD_S(n) (1<<(4+n)) #define S0_VB_OFFSET_MASK 0xffffffc #define S0_AUTO_CACHE_INV_DISABLE (1<<0) #define S1_VERTEX_WIDTH_SHIFT 24 #define S1_VERTEX_WIDTH_MASK (0x3f<<24) #define S1_VERTEX_PITCH_SHIFT 16 #define S1_VERTEX_PITCH_MASK (0x3f<<16) #define TEXCOORDFMT_2D 0x0 #define TEXCOORDFMT_3D 0x1 #define TEXCOORDFMT_4D 0x2 #define TEXCOORDFMT_1D 0x3 #define TEXCOORDFMT_2D_16 0x4 #define TEXCOORDFMT_4D_16 0x5 #define TEXCOORDFMT_NOT_PRESENT 0xf #define S2_TEXCOORD_FMT0_MASK 0xf #define S2_TEXCOORD_FMT1_SHIFT 4 #define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4)) #define S2_TEXCOORD_NONE (~0) #define TEXCOORD_WRAP_SHORTEST_TCX 8 #define TEXCOORD_WRAP_SHORTEST_TCY 4 #define TEXCOORD_WRAP_SHORTEST_TCZ 2 #define TEXCOORD_PERSPECTIVE_DISABLE 1 #define S3_WRAP_SHORTEST_TCX(unit) (TEXCOORD_WRAP_SHORTEST_TCX << ((unit) * 4)) #define S3_WRAP_SHORTEST_TCY(unit) (TEXCOORD_WRAP_SHORTEST_TCY << ((unit) * 4)) #define S3_WRAP_SHORTEST_TCZ(unit) (TEXCOORD_WRAP_SHORTEST_TCZ << ((unit) * 4)) #define S3_PERSPECTIVE_DISABLE(unit) (TEXCOORD_PERSPECTIVE_DISABLE << ((unit) * 4)) /* S3 not interesting */ #define S4_POINT_WIDTH_SHIFT 23 #define S4_POINT_WIDTH_MASK (0x1ff<<23) #define S4_LINE_WIDTH_SHIFT 19 #define S4_LINE_WIDTH_ONE (0x2<<19) #define S4_LINE_WIDTH_MASK (0xf<<19) #define S4_FLATSHADE_ALPHA (1<<18) #define S4_FLATSHADE_FOG (1<<17) #define S4_FLATSHADE_SPECULAR (1<<16) #define S4_FLATSHADE_COLOR (1<<15) #define S4_CULLMODE_BOTH (0<<13) #define S4_CULLMODE_NONE (1<<13) #define S4_CULLMODE_CW (2<<13) #define S4_CULLMODE_CCW (3<<13) #define S4_CULLMODE_MASK (3<<13) #define S4_VFMT_POINT_WIDTH (1<<12) #define S4_VFMT_SPEC_FOG (1<<11) #define S4_VFMT_COLOR (1<<10) #define S4_VFMT_DEPTH_OFFSET (1<<9) #define S4_VFMT_XYZ (1<<6) #define S4_VFMT_XYZW (2<<6) #define S4_VFMT_XY (3<<6) #define S4_VFMT_XYW (4<<6) #define S4_VFMT_XYZW_MASK (7<<6) #define S4_FORCE_DEFAULT_DIFFUSE (1<<5) #define S4_FORCE_DEFAULT_SPECULAR (1<<4) #define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3) #define S4_VFMT_FOG_PARAM (1<<2) #define S4_SPRITE_POINT_ENABLE (1<<1) #define S4_LINE_ANTIALIAS_ENABLE (1<<0) #define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \ S4_VFMT_SPEC_FOG | \ S4_VFMT_COLOR | \ S4_VFMT_DEPTH_OFFSET | \ S4_VFMT_XYZW_MASK | \ S4_VFMT_FOG_PARAM) #define S5_WRITEDISABLE_ALPHA (1<<31) #define S5_WRITEDISABLE_RED (1<<30) #define S5_WRITEDISABLE_GREEN (1<<29) #define S5_WRITEDISABLE_BLUE (1<<28) #define S5_WRITEDISABLE_MASK (0xf<<28) #define S5_FORCE_DEFAULT_POINT_SIZE (1<<27) #define S5_LAST_PIXEL_ENABLE (1<<26) #define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25) #define S5_FOG_ENABLE (1<<24) #define S5_STENCIL_REF_SHIFT 16 #define S5_STENCIL_REF_MASK (0xff<<16) #define S5_STENCIL_TEST_FUNC_SHIFT 13 #define S5_STENCIL_TEST_FUNC_MASK (0x7<<13) #define S5_STENCIL_FAIL_SHIFT 10 #define S5_STENCIL_FAIL_MASK (0x7<<10) #define S5_STENCIL_PASS_Z_FAIL_SHIFT 7 #define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7) #define S5_STENCIL_PASS_Z_PASS_SHIFT 4 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) #define S5_STENCIL_WRITE_ENABLE (1<<3) #define S5_STENCIL_TEST_ENABLE (1<<2) #define S5_COLOR_DITHER_ENABLE (1<<1) #define S5_LOGICOP_ENABLE (1<<0) #define S6_ALPHA_TEST_ENABLE (1<<31) #define S6_ALPHA_TEST_FUNC_SHIFT 28 #define S6_ALPHA_TEST_FUNC_MASK (0x7<<28) #define S6_ALPHA_REF_SHIFT 20 #define S6_ALPHA_REF_MASK (0xff<<20) #define S6_DEPTH_TEST_ENABLE (1<<19) #define S6_DEPTH_TEST_FUNC_SHIFT 16 #define S6_DEPTH_TEST_FUNC_MASK (0x7<<16) #define S6_CBUF_BLEND_ENABLE (1<<15) #define S6_CBUF_BLEND_FUNC_SHIFT 12 #define S6_CBUF_BLEND_FUNC_MASK (0x7<<12) #define S6_CBUF_SRC_BLEND_FACT_SHIFT 8 #define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8) #define S6_CBUF_DST_BLEND_FACT_SHIFT 4 #define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4) #define S6_DEPTH_WRITE_ENABLE (1<<3) #define S6_COLOR_WRITE_ENABLE (1<<2) #define S6_TRISTRIP_PV_SHIFT 0 #define S6_TRISTRIP_PV_MASK (0x3<<0) #define S7_DEPTH_OFFSET_CONST_MASK ~0 /* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */ /* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */ /* _3DSTATE_MODES_4, p218 */ #define _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24)) #define ENABLE_LOGIC_OP_FUNC (1<<23) #define LOGIC_OP_FUNC(x) ((x)<<18) #define LOGICOP_MASK (0xf<<18) #define LOGICOP_COPY 0xc #define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) #define ENABLE_STENCIL_TEST_MASK (1<<17) #define STENCIL_TEST_MASK(x) ((x)<<8) #define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) #define ENABLE_STENCIL_WRITE_MASK (1<<16) #define STENCIL_WRITE_MASK(x) ((x)&0xff) /* _3DSTATE_MODES_5, p220 */ #define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) #define PIPELINE_FLUSH_RENDER_CACHE (1<<18) #define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16) /* p221 */ #define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16)) #define PS1_REG(n) (1<<(n)) #define PS2_CONST_X(n) (n) #define PS3_CONST_Y(n) (n) #define PS4_CONST_Z(n) (n) #define PS5_CONST_W(n) (n) /* p222 */ #define I915_MAX_TEX_INDIRECT 4 #define I915_MAX_TEX_INSN 32 #define I915_MAX_ALU_INSN 64 #define I915_MAX_DECL_INSN 27 #define I915_MAX_TEMPORARY 16 /* Each instruction is 3 dwords long, though most don't require all * this space. Maximum of 123 instructions. Smaller maxes per insn * type. */ #define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16)) #define REG_TYPE_R 0 /* temporary regs, no need to * dcl, must be written before * read -- Preserved between * phases. */ #define REG_TYPE_T 1 /* Interpolated values, must be * dcl'ed before use. * * 0..7: texture coord, * 8: diffuse spec, * 9: specular color, * 10: fog parameter in w. */ #define REG_TYPE_CONST 2 /* Restriction: only one const * can be referenced per * instruction, though it may be * selected for multiple inputs. * Constants not initialized * default to zero. */ #define REG_TYPE_S 3 /* sampler */ #define REG_TYPE_OC 4 /* output color (rgba) */ #define REG_TYPE_OD 5 /* output depth (w), xyz are * temporaries. If not written, * interpolated depth is used? */ #define REG_TYPE_U 6 /* unpreserved temporaries */ #define REG_TYPE_MASK 0x7 #define REG_NR_MASK 0xf /* REG_TYPE_T: */ #define T_TEX0 0 #define T_TEX1 1 #define T_TEX2 2 #define T_TEX3 3 #define T_TEX4 4 #define T_TEX5 5 #define T_TEX6 6 #define T_TEX7 7 #define T_DIFFUSE 8 #define T_SPECULAR 9 #define T_FOG_W 10 /* interpolated fog is in W coord */ /* Arithmetic instructions */ /* .replicate_swizzle == selection and replication of a particular * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww */ #define A0_NOP (0x0<<24) /* no operation */ #define A0_ADD (0x1<<24) /* dst = src0 + src1 */ #define A0_MOV (0x2<<24) /* dst = src0 */ #define A0_MUL (0x3<<24) /* dst = src0 * src1 */ #define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ #define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ #define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ #define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ #define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ #define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ #define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ #define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ #define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ #define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ #define A0_FLR (0x10<<24) /* dst = floor(src0) */ #define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ #define A0_TRC (0x12<<24) /* dst = int(src0) */ #define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ #define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ #define A0_DEST_SATURATE (1<<22) #define A0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ #define A0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define A0_DEST_CHANNEL_X (1<<10) #define A0_DEST_CHANNEL_Y (2<<10) #define A0_DEST_CHANNEL_Z (4<<10) #define A0_DEST_CHANNEL_W (8<<10) #define A0_DEST_CHANNEL_ALL (0xf<<10) #define A0_DEST_CHANNEL_SHIFT 10 #define A0_SRC0_TYPE_SHIFT 7 #define A0_SRC0_NR_SHIFT 2 #define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) #define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) #define SRC_X 0 #define SRC_Y 1 #define SRC_Z 2 #define SRC_W 3 #define SRC_ZERO 4 #define SRC_ONE 5 #define A1_SRC0_CHANNEL_X_NEGATE (1<<31) #define A1_SRC0_CHANNEL_X_SHIFT 28 #define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) #define A1_SRC0_CHANNEL_Y_SHIFT 24 #define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) #define A1_SRC0_CHANNEL_Z_SHIFT 20 #define A1_SRC0_CHANNEL_W_NEGATE (1<<19) #define A1_SRC0_CHANNEL_W_SHIFT 16 #define A1_SRC1_TYPE_SHIFT 13 #define A1_SRC1_NR_SHIFT 8 #define A1_SRC1_CHANNEL_X_NEGATE (1<<7) #define A1_SRC1_CHANNEL_X_SHIFT 4 #define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) #define A1_SRC1_CHANNEL_Y_SHIFT 0 #define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) #define A2_SRC1_CHANNEL_Z_SHIFT 28 #define A2_SRC1_CHANNEL_W_NEGATE (1<<27) #define A2_SRC1_CHANNEL_W_SHIFT 24 #define A2_SRC2_TYPE_SHIFT 21 #define A2_SRC2_NR_SHIFT 16 #define A2_SRC2_CHANNEL_X_NEGATE (1<<15) #define A2_SRC2_CHANNEL_X_SHIFT 12 #define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) #define A2_SRC2_CHANNEL_Y_SHIFT 8 #define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) #define A2_SRC2_CHANNEL_Z_SHIFT 4 #define A2_SRC2_CHANNEL_W_NEGATE (1<<3) #define A2_SRC2_CHANNEL_W_SHIFT 0 /* Texture instructions */ #define T0_TEXLD (0x15<<24) /* Sample texture using predeclared * sampler and address, and output * filtered texel data to destination * register */ #define T0_TEXLDP (0x16<<24) /* Same as texld but performs a * perspective divide of the texture * coordinate .xyz values by .w before * sampling. */ #define T0_TEXLDB (0x17<<24) /* Same as texld but biases the * computed LOD by w. Only S4.6 two's * comp is used. This implies that a * float to fixed conversion is * done. */ #define T0_TEXKILL (0x18<<24) /* Does not perform a sampling * operation. Simply kills the pixel * if any channel of the address * register is < 0.0. */ #define T0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ /* Note: U (unpreserved) regs do not retain their values between * phases (cannot be used for feedback) * * Note: oC and OD registers can only be used as the destination of a * texture instruction once per phase (this is an implementation * restriction). */ #define T0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ #define T0_SAMPLER_NR_MASK (0xf<<0) #define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ #define T1_ADDRESS_REG_NR_SHIFT 17 #define T2_MBZ 0 /* Declaration instructions */ #define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) * register or an s (sampler) * register. */ #define D0_SAMPLE_TYPE_SHIFT 22 #define D0_SAMPLE_TYPE_2D (0x0<<22) #define D0_SAMPLE_TYPE_CUBE (0x1<<22) #define D0_SAMPLE_TYPE_VOLUME (0x2<<22) #define D0_SAMPLE_TYPE_MASK (0x3<<22) #define D0_TYPE_SHIFT 19 /* Allow: T, S */ #define D0_NR_SHIFT 14 /* Allow T: 0..10, S: 0..15 */ #define D0_CHANNEL_X (1<<10) #define D0_CHANNEL_Y (2<<10) #define D0_CHANNEL_Z (4<<10) #define D0_CHANNEL_W (8<<10) #define D0_CHANNEL_ALL (0xf<<10) #define D0_CHANNEL_NONE (0<<10) #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse * or specular declarations. * * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) * * Must be zero for S (sampler) dcls */ #define D1_MBZ 0 #define D2_MBZ 0 /* p207. * The DWORD count is 3 times the number of bits set in MS1_MAPMASK_MASK */ #define _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16)) #define MS1_MAPMASK_SHIFT 0 #define MS1_MAPMASK_MASK (0x8fff<<0) #define MS2_UNTRUSTED_SURFACE (1<<31) #define MS2_ADDRESS_MASK 0xfffffffc #define MS2_VERTICAL_LINE_STRIDE (1<<1) #define MS2_VERTICAL_OFFSET (1<<1) #define MS3_HEIGHT_SHIFT 21 #define MS3_WIDTH_SHIFT 10 #define MS3_PALETTE_SELECT (1<<9) #define MS3_MAPSURF_FORMAT_SHIFT 7 #define MS3_MAPSURF_FORMAT_MASK (0x7<<7) #define MAPSURF_8BIT (1<<7) #define MAPSURF_16BIT (2<<7) #define MAPSURF_32BIT (3<<7) #define MAPSURF_422 (5<<7) #define MAPSURF_COMPRESSED (6<<7) #define MAPSURF_4BIT_INDEXED (7<<7) #define MS3_MT_FORMAT_MASK (0x7 << 3) #define MS3_MT_FORMAT_SHIFT 3 #define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */ #define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */ #define MT_8BIT_L8 (1<<3) #define MT_8BIT_A8 (4<<3) #define MT_8BIT_MONO8 (5<<3) #define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */ #define MT_16BIT_ARGB1555 (1<<3) #define MT_16BIT_ARGB4444 (2<<3) #define MT_16BIT_AY88 (3<<3) #define MT_16BIT_88DVDU (5<<3) #define MT_16BIT_BUMP_655LDVDU (6<<3) #define MT_16BIT_I16 (7<<3) #define MT_16BIT_L16 (8<<3) #define MT_16BIT_A16 (9<<3) #define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ #define MT_32BIT_ABGR8888 (1<<3) #define MT_32BIT_XRGB8888 (2<<3) #define MT_32BIT_XBGR8888 (3<<3) #define MT_32BIT_QWVU8888 (4<<3) #define MT_32BIT_AXVU8888 (5<<3) #define MT_32BIT_LXVU8888 (6<<3) #define MT_32BIT_XLVU8888 (7<<3) #define MT_32BIT_ARGB2101010 (8<<3) #define MT_32BIT_ABGR2101010 (9<<3) #define MT_32BIT_AWVU2101010 (0xA<<3) #define MT_32BIT_GR1616 (0xB<<3) #define MT_32BIT_VU1616 (0xC<<3) #define MT_32BIT_xI824 (0xD<<3) #define MT_32BIT_xA824 (0xE<<3) #define MT_32BIT_xL824 (0xF<<3) #define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */ #define MT_422_YCRCB_NORMAL (1<<3) #define MT_422_YCRCB_SWAPUV (2<<3) #define MT_422_YCRCB_SWAPUVY (3<<3) #define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */ #define MT_COMPRESS_DXT2_3 (1<<3) #define MT_COMPRESS_DXT4_5 (2<<3) #define MT_COMPRESS_FXT1 (3<<3) #define MT_COMPRESS_DXT1_RGB (4<<3) #define MS3_USE_FENCE_REGS (1<<2) #define MS3_TILED_SURFACE (1<<1) #define MS3_TILE_WALK (1<<0) /* The pitch is the pitch measured in DWORDS, minus 1 */ #define MS4_PITCH_SHIFT 21 #define MS4_CUBE_FACE_ENA_NEGX (1<<20) #define MS4_CUBE_FACE_ENA_POSX (1<<19) #define MS4_CUBE_FACE_ENA_NEGY (1<<18) #define MS4_CUBE_FACE_ENA_POSY (1<<17) #define MS4_CUBE_FACE_ENA_NEGZ (1<<16) #define MS4_CUBE_FACE_ENA_POSZ (1<<15) #define MS4_CUBE_FACE_ENA_MASK (0x3f<<15) #define MS4_MAX_LOD_SHIFT 9 #define MS4_MAX_LOD_MASK (0x3f<<9) #define MS4_MIP_LAYOUT_LEGACY (0<<8) #define MS4_MIP_LAYOUT_BELOW_LPT (0<<8) #define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8) #define MS4_VOLUME_DEPTH_SHIFT 0 #define MS4_VOLUME_DEPTH_MASK (0xff<<0) /* p244. * The DWORD count is 3 times the number of bits set in SS1_MAPMASK_MASK. */ #define _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16)) #define SS1_MAPMASK_SHIFT 0 #define SS1_MAPMASK_MASK (0x8fff<<0) #define SS2_REVERSE_GAMMA_ENABLE (1<<31) #define SS2_PACKED_TO_PLANAR_ENABLE (1<<30) #define SS2_COLORSPACE_CONVERSION (1<<29) #define SS2_CHROMAKEY_SHIFT 27 #define SS2_BASE_MIP_LEVEL_SHIFT 22 #define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22) #define SS2_MIP_FILTER_SHIFT 20 #define SS2_MIP_FILTER_MASK (0x3<<20) #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #define SS2_MAG_FILTER_SHIFT 17 #define SS2_MAG_FILTER_MASK (0x7<<17) #define FILTER_NEAREST 0 #define FILTER_LINEAR 1 #define FILTER_ANISOTROPIC 2 #define FILTER_4X4_1 3 #define FILTER_4X4_2 4 #define FILTER_4X4_FLAT 5 #define FILTER_6X5_MONO 6 /* XXX - check */ #define SS2_MIN_FILTER_SHIFT 14 #define SS2_MIN_FILTER_MASK (0x7<<14) #define SS2_LOD_BIAS_SHIFT 5 #define SS2_LOD_BIAS_ONE (0x10<<5) #define SS2_LOD_BIAS_MASK (0x1ff<<5) /* Shadow requires: * MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format * FILTER_4X4_x MIN and MAG filters */ #define SS2_SHADOW_ENABLE (1<<4) #define SS2_MAX_ANISO_MASK (1<<3) #define SS2_MAX_ANISO_2 (0<<3) #define SS2_MAX_ANISO_4 (1<<3) #define SS2_SHADOW_FUNC_SHIFT 0 #define SS2_SHADOW_FUNC_MASK (0x7<<0) /* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */ #define SS3_MIN_LOD_SHIFT 24 #define SS3_MIN_LOD_ONE (0x10<<24) #define SS3_MIN_LOD_MASK (0xff<<24) #define SS3_KILL_PIXEL_ENABLE (1<<17) #define SS3_TCX_ADDR_MODE_SHIFT 12 #define SS3_TCX_ADDR_MODE_MASK (0x7<<12) #define TEXCOORDMODE_WRAP 0 #define TEXCOORDMODE_MIRROR 1 #define TEXCOORDMODE_CLAMP_EDGE 2 #define TEXCOORDMODE_CUBE 3 #define TEXCOORDMODE_CLAMP_BORDER 4 #define TEXCOORDMODE_MIRROR_ONCE 5 #define SS3_TCY_ADDR_MODE_SHIFT 9 #define SS3_TCY_ADDR_MODE_MASK (0x7<<9) #define SS3_TCZ_ADDR_MODE_SHIFT 6 #define SS3_TCZ_ADDR_MODE_MASK (0x7<<6) #define SS3_NORMALIZED_COORDS (1<<5) #define SS3_TEXTUREMAP_INDEX_SHIFT 1 #define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1) #define SS3_DEINTERLACER_ENABLE (1<<0) #define SS4_BORDER_COLOR_MASK (~0) /* 3DSTATE_SPAN_STIPPLE, p258 */ #define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) #define ST1_ENABLE (1<<16) #define ST1_MASK (0xffff) #define FLUSH_MAP_CACHE (1<<0) #define FLUSH_RENDER_CACHE (1<<1) #endif /* -*- c-basic-offset: 4 -*- */ /* * Copyright © 2006,2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ /* Each instruction is 3 dwords long, though most don't require all * this space. Maximum of 123 instructions. Smaller maxes per insn * type. */ #define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16)) #define REG_TYPE_R 0 /* temporary regs, no need to * dcl, must be written before * read -- Preserved between * phases. */ #define REG_TYPE_T 1 /* Interpolated values, must be * dcl'ed before use. * * 0..7: texture coord, * 8: diffuse spec, * 9: specular color, * 10: fog parameter in w. */ #define REG_TYPE_CONST 2 /* Restriction: only one const * can be referenced per * instruction, though it may be * selected for multiple inputs. * Constants not initialized * default to zero. */ #define REG_TYPE_S 3 /* sampler */ #define REG_TYPE_OC 4 /* output color (rgba) */ #define REG_TYPE_OD 5 /* output depth (w), xyz are * temporaries. If not written, * interpolated depth is used? */ #define REG_TYPE_U 6 /* unpreserved temporaries */ #define REG_TYPE_MASK 0x7 #define REG_TYPE_SHIFT 4 #define REG_NR_MASK 0xf /* REG_TYPE_T: */ #define T_TEX0 0 #define T_TEX1 1 #define T_TEX2 2 #define T_TEX3 3 #define T_TEX4 4 #define T_TEX5 5 #define T_TEX6 6 #define T_TEX7 7 #define T_DIFFUSE 8 #define T_SPECULAR 9 #define T_FOG_W 10 /* interpolated fog is in W coord */ /* Arithmetic instructions */ /* .replicate_swizzle == selection and replication of a particular * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww */ #define A0_NOP (0x0<<24) /* no operation */ #define A0_ADD (0x1<<24) /* dst = src0 + src1 */ #define A0_MOV (0x2<<24) /* dst = src0 */ #define A0_MUL (0x3<<24) /* dst = src0 * src1 */ #define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ #define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ #define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ #define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ #define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ #define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ #define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ #define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ #define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ #define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ #define A0_FLR (0x10<<24) /* dst = floor(src0) */ #define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ #define A0_TRC (0x12<<24) /* dst = int(src0) */ #define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ #define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ #define A0_DEST_SATURATE (1<<22) #define A0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ #define A0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define A0_DEST_CHANNEL_X (1<<10) #define A0_DEST_CHANNEL_Y (2<<10) #define A0_DEST_CHANNEL_Z (4<<10) #define A0_DEST_CHANNEL_W (8<<10) #define A0_DEST_CHANNEL_ALL (0xf<<10) #define A0_DEST_CHANNEL_SHIFT 10 #define A0_SRC0_TYPE_SHIFT 7 #define A0_SRC0_NR_SHIFT 2 #define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) #define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) #define SRC_X 0 #define SRC_Y 1 #define SRC_Z 2 #define SRC_W 3 #define SRC_ZERO 4 #define SRC_ONE 5 #define A1_SRC0_CHANNEL_X_NEGATE (1<<31) #define A1_SRC0_CHANNEL_X_SHIFT 28 #define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) #define A1_SRC0_CHANNEL_Y_SHIFT 24 #define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) #define A1_SRC0_CHANNEL_Z_SHIFT 20 #define A1_SRC0_CHANNEL_W_NEGATE (1<<19) #define A1_SRC0_CHANNEL_W_SHIFT 16 #define A1_SRC1_TYPE_SHIFT 13 #define A1_SRC1_NR_SHIFT 8 #define A1_SRC1_CHANNEL_X_NEGATE (1<<7) #define A1_SRC1_CHANNEL_X_SHIFT 4 #define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) #define A1_SRC1_CHANNEL_Y_SHIFT 0 #define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) #define A2_SRC1_CHANNEL_Z_SHIFT 28 #define A2_SRC1_CHANNEL_W_NEGATE (1<<27) #define A2_SRC1_CHANNEL_W_SHIFT 24 #define A2_SRC2_TYPE_SHIFT 21 #define A2_SRC2_NR_SHIFT 16 #define A2_SRC2_CHANNEL_X_NEGATE (1<<15) #define A2_SRC2_CHANNEL_X_SHIFT 12 #define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) #define A2_SRC2_CHANNEL_Y_SHIFT 8 #define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) #define A2_SRC2_CHANNEL_Z_SHIFT 4 #define A2_SRC2_CHANNEL_W_NEGATE (1<<3) #define A2_SRC2_CHANNEL_W_SHIFT 0 /* Texture instructions */ #define T0_TEXLD (0x15<<24) /* Sample texture using predeclared * sampler and address, and output * filtered texel data to destination * register */ #define T0_TEXLDP (0x16<<24) /* Same as texld but performs a * perspective divide of the texture * coordinate .xyz values by .w before * sampling. */ #define T0_TEXLDB (0x17<<24) /* Same as texld but biases the * computed LOD by w. Only S4.6 two's * comp is used. This implies that a * float to fixed conversion is * done. */ #define T0_TEXKILL (0x18<<24) /* Does not perform a sampling * operation. Simply kills the pixel * if any channel of the address * register is < 0.0. */ #define T0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ /* Note: U (unpreserved) regs do not retain their values between * phases (cannot be used for feedback) * * Note: oC and OD registers can only be used as the destination of a * texture instruction once per phase (this is an implementation * restriction). */ #define T0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ #define T0_SAMPLER_NR_MASK (0xf<<0) #define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ #define T1_ADDRESS_REG_NR_SHIFT 17 #define T2_MBZ 0 /* Declaration instructions */ #define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) * register or an s (sampler) * register. */ #define D0_SAMPLE_TYPE_SHIFT 22 #define D0_SAMPLE_TYPE_2D (0x0<<22) #define D0_SAMPLE_TYPE_CUBE (0x1<<22) #define D0_SAMPLE_TYPE_VOLUME (0x2<<22) #define D0_SAMPLE_TYPE_MASK (0x3<<22) #define D0_TYPE_SHIFT 19 /* Allow: T, S */ #define D0_NR_SHIFT 14 /* Allow T: 0..10, S: 0..15 */ #define D0_CHANNEL_X (1<<10) #define D0_CHANNEL_Y (2<<10) #define D0_CHANNEL_Z (4<<10) #define D0_CHANNEL_W (8<<10) #define D0_CHANNEL_ALL (0xf<<10) #define D0_CHANNEL_NONE (0<<10) #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse * or specular declarations. * * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) * * Must be zero for S (sampler) dcls */ #define D1_MBZ 0 #define D2_MBZ 0 /* MASK_* are the unshifted bitmasks of the destination mask in arithmetic * operations */ #define MASK_X 0x1 #define MASK_Y 0x2 #define MASK_Z 0x4 #define MASK_W 0x8 #define MASK_XYZ (MASK_X | MASK_Y | MASK_Z) #define MASK_XYZW (MASK_XYZ | MASK_W) #define MASK_SATURATE 0x10 /* Temporary, undeclared regs. Preserved between phases */ #define FS_R0 ((REG_TYPE_R << REG_TYPE_SHIFT) | 0) #define FS_R1 ((REG_TYPE_R << REG_TYPE_SHIFT) | 1) #define FS_R2 ((REG_TYPE_R << REG_TYPE_SHIFT) | 2) #define FS_R3 ((REG_TYPE_R << REG_TYPE_SHIFT) | 3) /* Texture coordinate regs. Must be declared. */ #define FS_T0 ((REG_TYPE_T << REG_TYPE_SHIFT) | 0) #define FS_T1 ((REG_TYPE_T << REG_TYPE_SHIFT) | 1) #define FS_T2 ((REG_TYPE_T << REG_TYPE_SHIFT) | 2) #define FS_T3 ((REG_TYPE_T << REG_TYPE_SHIFT) | 3) #define FS_T4 ((REG_TYPE_T << REG_TYPE_SHIFT) | 4) #define FS_T5 ((REG_TYPE_T << REG_TYPE_SHIFT) | 5) #define FS_T6 ((REG_TYPE_T << REG_TYPE_SHIFT) | 6) #define FS_T7 ((REG_TYPE_T << REG_TYPE_SHIFT) | 7) #define FS_T8 ((REG_TYPE_T << REG_TYPE_SHIFT) | 8) #define FS_T9 ((REG_TYPE_T << REG_TYPE_SHIFT) | 9) #define FS_T10 ((REG_TYPE_T << REG_TYPE_SHIFT) | 10) /* Constant values */ #define FS_C0 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 0) #define FS_C1 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 1) #define FS_C2 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 2) #define FS_C3 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 3) #define FS_C4 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 4) #define FS_C5 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 5) #define FS_C6 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 6) #define FS_C7 ((REG_TYPE_CONST << REG_TYPE_SHIFT) | 7) /* Sampler regs */ #define FS_S0 ((REG_TYPE_S << REG_TYPE_SHIFT) | 0) #define FS_S1 ((REG_TYPE_S << REG_TYPE_SHIFT) | 1) #define FS_S2 ((REG_TYPE_S << REG_TYPE_SHIFT) | 2) #define FS_S3 ((REG_TYPE_S << REG_TYPE_SHIFT) | 3) /* Output color */ #define FS_OC ((REG_TYPE_OC << REG_TYPE_SHIFT) | 0) /* Output depth */ #define FS_OD ((REG_TYPE_OD << REG_TYPE_SHIFT) | 0) /* Unpreserved temporary regs */ #define FS_U0 ((REG_TYPE_U << REG_TYPE_SHIFT) | 0) #define FS_U1 ((REG_TYPE_U << REG_TYPE_SHIFT) | 1) #define FS_U2 ((REG_TYPE_U << REG_TYPE_SHIFT) | 2) #define FS_U3 ((REG_TYPE_U << REG_TYPE_SHIFT) | 3) #define X_CHANNEL_SHIFT (REG_TYPE_SHIFT + 3) #define Y_CHANNEL_SHIFT (X_CHANNEL_SHIFT + 4) #define Z_CHANNEL_SHIFT (Y_CHANNEL_SHIFT + 4) #define W_CHANNEL_SHIFT (Z_CHANNEL_SHIFT + 4) #define REG_CHANNEL_MASK 0xf #define REG_NR(reg) ((reg) & REG_NR_MASK) #define REG_TYPE(reg) (((reg) >> REG_TYPE_SHIFT) & REG_TYPE_MASK) #define REG_X(reg) (((reg) >> X_CHANNEL_SHIFT) & REG_CHANNEL_MASK) #define REG_Y(reg) (((reg) >> Y_CHANNEL_SHIFT) & REG_CHANNEL_MASK) #define REG_Z(reg) (((reg) >> Z_CHANNEL_SHIFT) & REG_CHANNEL_MASK) #define REG_W(reg) (((reg) >> W_CHANNEL_SHIFT) & REG_CHANNEL_MASK) enum gen3_fs_channel { X_CHANNEL_VAL = 0, Y_CHANNEL_VAL, Z_CHANNEL_VAL, W_CHANNEL_VAL, ZERO_CHANNEL_VAL, ONE_CHANNEL_VAL, NEG_X_CHANNEL_VAL = X_CHANNEL_VAL | 0x8, NEG_Y_CHANNEL_VAL = Y_CHANNEL_VAL | 0x8, NEG_Z_CHANNEL_VAL = Z_CHANNEL_VAL | 0x8, NEG_W_CHANNEL_VAL = W_CHANNEL_VAL | 0x8, NEG_ONE_CHANNEL_VAL = ONE_CHANNEL_VAL | 0x8 }; #define gen3_fs_operand(reg, x, y, z, w) \ (reg) | \ (x##_CHANNEL_VAL << X_CHANNEL_SHIFT) | \ (y##_CHANNEL_VAL << Y_CHANNEL_SHIFT) | \ (z##_CHANNEL_VAL << Z_CHANNEL_SHIFT) | \ (w##_CHANNEL_VAL << W_CHANNEL_SHIFT) /** * Construct an operand description for using a register with no swizzling */ #define gen3_fs_operand_reg(reg) \ gen3_fs_operand(reg, X, Y, Z, W) #define gen3_fs_operand_reg_negate(reg) \ gen3_fs_operand(reg, NEG_X, NEG_Y, NEG_Z, NEG_W) /** * Returns an operand containing (0.0, 0.0, 0.0, 0.0). */ #define gen3_fs_operand_zero() gen3_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO) /** * Returns an unused operand */ #define gen3_fs_operand_none() gen3_fs_operand_zero() /** * Returns an operand containing (1.0, 1.0, 1.0, 1.0). */ #define gen3_fs_operand_one() gen3_fs_operand(FS_R0, ONE, ONE, ONE, ONE) #define gen3_get_hardware_channel_val(val, shift, negate) \ (((val & 0x7) << shift) | ((val & 0x8) ? negate : 0)) /** * Outputs a fragment shader command to declare a sampler or texture register. */ #define gen3_fs_dcl(reg) \ do { \ OUT_BATCH(D0_DCL | \ (REG_TYPE(reg) << D0_TYPE_SHIFT) | \ (REG_NR(reg) << D0_NR_SHIFT) | \ ((REG_TYPE(reg) != REG_TYPE_S) ? D0_CHANNEL_ALL : 0)); \ OUT_BATCH(0); \ OUT_BATCH(0); \ } while (0) #define gen3_fs_texld(dest_reg, sampler_reg, address_reg) \ do { \ OUT_BATCH(T0_TEXLD | \ (REG_TYPE(dest_reg) << T0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << T0_DEST_NR_SHIFT) | \ (REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT)); \ OUT_BATCH((REG_TYPE(address_reg) << T1_ADDRESS_REG_TYPE_SHIFT) | \ (REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT)); \ OUT_BATCH(0); \ } while (0) #define gen3_fs_texldp(dest_reg, sampler_reg, address_reg) \ do { \ OUT_BATCH(T0_TEXLDP | \ (REG_TYPE(dest_reg) << T0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << T0_DEST_NR_SHIFT) | \ (REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT)); \ OUT_BATCH((REG_TYPE(address_reg) << T1_ADDRESS_REG_TYPE_SHIFT) | \ (REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT)); \ OUT_BATCH(0); \ } while (0) #define gen3_fs_arith_masked(op, dest_reg, dest_mask, operand0, operand1, operand2) \ _gen3_fs_arith_masked(A0_##op, dest_reg, dest_mask, operand0, operand1, operand2) #define gen3_fs_arith(op, dest_reg, operand0, operand1, operand2) \ _gen3_fs_arith(A0_##op, dest_reg, operand0, operand1, operand2) #define _gen3_fs_arith_masked(cmd, dest_reg, dest_mask, operand0, operand1, operand2) \ do { \ /* Set up destination register and write mask */ \ OUT_BATCH(cmd | \ (REG_TYPE(dest_reg) << A0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << A0_DEST_NR_SHIFT) | \ (((dest_mask) & ~MASK_SATURATE) << A0_DEST_CHANNEL_SHIFT) | \ (((dest_mask) & MASK_SATURATE) ? A0_DEST_SATURATE : 0) | \ /* Set up operand 0 */ \ (REG_TYPE(operand0) << A0_SRC0_TYPE_SHIFT) | \ (REG_NR(operand0) << A0_SRC0_NR_SHIFT)); \ OUT_BATCH(gen3_get_hardware_channel_val(REG_X(operand0), \ A1_SRC0_CHANNEL_X_SHIFT, \ A1_SRC0_CHANNEL_X_NEGATE) | \ gen3_get_hardware_channel_val(REG_Y(operand0), \ A1_SRC0_CHANNEL_Y_SHIFT, \ A1_SRC0_CHANNEL_Y_NEGATE) | \ gen3_get_hardware_channel_val(REG_Z(operand0), \ A1_SRC0_CHANNEL_Z_SHIFT, \ A1_SRC0_CHANNEL_Z_NEGATE) | \ gen3_get_hardware_channel_val(REG_W(operand0), \ A1_SRC0_CHANNEL_W_SHIFT, \ A1_SRC0_CHANNEL_W_NEGATE) | \ /* Set up operand 1 */ \ (REG_TYPE(operand1) << A1_SRC1_TYPE_SHIFT) | \ (REG_NR(operand1) << A1_SRC1_NR_SHIFT) | \ gen3_get_hardware_channel_val(REG_X(operand1), \ A1_SRC1_CHANNEL_X_SHIFT, \ A1_SRC1_CHANNEL_X_NEGATE) | \ gen3_get_hardware_channel_val(REG_Y(operand1), \ A1_SRC1_CHANNEL_Y_SHIFT, \ A1_SRC1_CHANNEL_Y_NEGATE)); \ OUT_BATCH(gen3_get_hardware_channel_val(REG_Z(operand1), \ A2_SRC1_CHANNEL_Z_SHIFT, \ A2_SRC1_CHANNEL_Z_NEGATE) | \ gen3_get_hardware_channel_val(REG_W(operand1), \ A2_SRC1_CHANNEL_W_SHIFT, \ A2_SRC1_CHANNEL_W_NEGATE) | \ /* Set up operand 2 */ \ (REG_TYPE(operand2) << A2_SRC2_TYPE_SHIFT) | \ (REG_NR(operand2) << A2_SRC2_NR_SHIFT) | \ gen3_get_hardware_channel_val(REG_X(operand2), \ A2_SRC2_CHANNEL_X_SHIFT, \ A2_SRC2_CHANNEL_X_NEGATE) | \ gen3_get_hardware_channel_val(REG_Y(operand2), \ A2_SRC2_CHANNEL_Y_SHIFT, \ A2_SRC2_CHANNEL_Y_NEGATE) | \ gen3_get_hardware_channel_val(REG_Z(operand2), \ A2_SRC2_CHANNEL_Z_SHIFT, \ A2_SRC2_CHANNEL_Z_NEGATE) | \ gen3_get_hardware_channel_val(REG_W(operand2), \ A2_SRC2_CHANNEL_W_SHIFT, \ A2_SRC2_CHANNEL_W_NEGATE)); \ } while (0) #define _gen3_fs_arith(cmd, dest_reg, operand0, operand1, operand2) do {\ /* Set up destination register and write mask */ \ OUT_BATCH(cmd | \ (REG_TYPE(dest_reg) << A0_DEST_TYPE_SHIFT) | \ (REG_NR(dest_reg) << A0_DEST_NR_SHIFT) | \ (A0_DEST_CHANNEL_ALL) | \ /* Set up operand 0 */ \ (REG_TYPE(operand0) << A0_SRC0_TYPE_SHIFT) | \ (REG_NR(operand0) << A0_SRC0_NR_SHIFT)); \ OUT_BATCH(gen3_get_hardware_channel_val(REG_X(operand0), \ A1_SRC0_CHANNEL_X_SHIFT, \ A1_SRC0_CHANNEL_X_NEGATE) | \ gen3_get_hardware_channel_val(REG_Y(operand0), \ A1_SRC0_CHANNEL_Y_SHIFT, \ A1_SRC0_CHANNEL_Y_NEGATE) | \ gen3_get_hardware_channel_val(REG_Z(operand0), \ A1_SRC0_CHANNEL_Z_SHIFT, \ A1_SRC0_CHANNEL_Z_NEGATE) | \ gen3_get_hardware_channel_val(REG_W(operand0), \ A1_SRC0_CHANNEL_W_SHIFT, \ A1_SRC0_CHANNEL_W_NEGATE) | \ /* Set up operand 1 */ \ (REG_TYPE(operand1) << A1_SRC1_TYPE_SHIFT) | \ (REG_NR(operand1) << A1_SRC1_NR_SHIFT) | \ gen3_get_hardware_channel_val(REG_X(operand1), \ A1_SRC1_CHANNEL_X_SHIFT, \ A1_SRC1_CHANNEL_X_NEGATE) | \ gen3_get_hardware_channel_val(REG_Y(operand1), \ A1_SRC1_CHANNEL_Y_SHIFT, \ A1_SRC1_CHANNEL_Y_NEGATE)); \ OUT_BATCH(gen3_get_hardware_channel_val(REG_Z(operand1), \ A2_SRC1_CHANNEL_Z_SHIFT, \ A2_SRC1_CHANNEL_Z_NEGATE) | \ gen3_get_hardware_channel_val(REG_W(operand1), \ A2_SRC1_CHANNEL_W_SHIFT, \ A2_SRC1_CHANNEL_W_NEGATE) | \ /* Set up operand 2 */ \ (REG_TYPE(operand2) << A2_SRC2_TYPE_SHIFT) | \ (REG_NR(operand2) << A2_SRC2_NR_SHIFT) | \ gen3_get_hardware_channel_val(REG_X(operand2), \ A2_SRC2_CHANNEL_X_SHIFT, \ A2_SRC2_CHANNEL_X_NEGATE) | \ gen3_get_hardware_channel_val(REG_Y(operand2), \ A2_SRC2_CHANNEL_Y_SHIFT, \ A2_SRC2_CHANNEL_Y_NEGATE) | \ gen3_get_hardware_channel_val(REG_Z(operand2), \ A2_SRC2_CHANNEL_Z_SHIFT, \ A2_SRC2_CHANNEL_Z_NEGATE) | \ gen3_get_hardware_channel_val(REG_W(operand2), \ A2_SRC2_CHANNEL_W_SHIFT, \ A2_SRC2_CHANNEL_W_NEGATE)); \ } while (0) #define gen3_fs_mov(dest_reg, operand0) \ gen3_fs_arith(MOV, dest_reg, \ operand0, \ gen3_fs_operand_none(), \ gen3_fs_operand_none()) #define gen3_fs_mov_masked(dest_reg, dest_mask, operand0) \ gen3_fs_arith_masked (MOV, dest_reg, dest_mask, \ operand0, \ gen3_fs_operand_none(), \ gen3_fs_operand_none()) #define gen3_fs_frc(dest_reg, operand0) \ gen3_fs_arith (FRC, dest_reg, \ operand0, \ gen3_fs_operand_none(), \ gen3_fs_operand_none()) /** Add operand0 and operand1 and put the result in dest_reg */ #define gen3_fs_add(dest_reg, operand0, operand1) \ gen3_fs_arith (ADD, dest_reg, \ operand0, operand1, \ gen3_fs_operand_none()) /** Multiply operand0 and operand1 and put the result in dest_reg */ #define gen3_fs_mul(dest_reg, operand0, operand1) \ gen3_fs_arith (MUL, dest_reg, \ operand0, operand1, \ gen3_fs_operand_none()) /** Computes 1/(operand0.replicate_swizzle) puts the result in dest_reg */ #define gen3_fs_rcp(dest_reg, dest_mask, operand0) \ do { \ if (dest_mask) { \ gen3_fs_arith_masked (RCP, dest_reg, dest_mask, \ operand0, \ gen3_fs_operand_none (), \ gen3_fs_operand_none ()); \ } else { \ gen3_fs_arith (RCP, dest_reg, \ operand0, \ gen3_fs_operand_none (), \ gen3_fs_operand_none ()); \ } \ } while (0) /** Computes 1/sqrt(operand0.replicate_swizzle) puts the result in dest_reg */ #define gen3_fs_rsq(dest_reg, dest_mask, operand0) \ do { \ if (dest_mask) { \ gen3_fs_arith_masked (RSQ, dest_reg, dest_mask, \ operand0, \ gen3_fs_operand_none (), \ gen3_fs_operand_none ()); \ } else { \ gen3_fs_arith (RSQ, dest_reg, \ operand0, \ gen3_fs_operand_none (), \ gen3_fs_operand_none ()); \ } \ } while (0) /** Puts the minimum of operand0 and operand1 in dest_reg */ #define gen3_fs_min(dest_reg, operand0, operand1) \ gen3_fs_arith (MIN, dest_reg, \ operand0, operand1, \ gen3_fs_operand_none()) /** Puts the maximum of operand0 and operand1 in dest_reg */ #define gen3_fs_max(dest_reg, operand0, operand1) \ gen3_fs_arith (MAX, dest_reg, \ operand0, operand1, \ gen3_fs_operand_none()) #define gen3_fs_cmp(dest_reg, operand0, operand1, operand2) \ gen3_fs_arith (CMP, dest_reg, operand0, operand1, operand2) /** Perform operand0 * operand1 + operand2 and put the result in dest_reg */ #define gen3_fs_mad(dest_reg, dest_mask, op0, op1, op2) \ do { \ if (dest_mask) { \ gen3_fs_arith_masked (MAD, dest_reg, dest_mask, op0, op1, op2); \ } else { \ gen3_fs_arith (MAD, dest_reg, op0, op1, op2); \ } \ } while (0) #define gen3_fs_dp2add(dest_reg, dest_mask, op0, op1, op2) \ do { \ if (dest_mask) { \ gen3_fs_arith_masked (DP2ADD, dest_reg, dest_mask, op0, op1, op2); \ } else { \ gen3_fs_arith (DP2ADD, dest_reg, op0, op1, op2); \ } \ } while (0) /** * Perform a 3-component dot-product of operand0 and operand1 and put the * resulting scalar in the channels of dest_reg specified by the dest_mask. */ #define gen3_fs_dp3(dest_reg, dest_mask, op0, op1) \ do { \ if (dest_mask) { \ gen3_fs_arith_masked (DP3, dest_reg, dest_mask, \ op0, op1,\ gen3_fs_operand_none()); \ } else { \ gen3_fs_arith (DP3, dest_reg, op0, op1,\ gen3_fs_operand_none()); \ } \ } while (0) /** * Perform a 4-component dot-product of operand0 and operand1 and put the * resulting scalar in the channels of dest_reg specified by the dest_mask. */ #define gen3_fs_dp4(dest_reg, dest_mask, op0, op1) \ do { \ if (dest_mask) { \ gen3_fs_arith_masked (DP4, dest_reg, dest_mask, \ op0, op1,\ gen3_fs_operand_none()); \ } else { \ gen3_fs_arith (DP4, dest_reg, op0, op1,\ gen3_fs_operand_none()); \ } \ } while (0) #define SHADER_TRAPEZOIDS (1 << 24) xf86-video-intel-2.99.917/src/sna/gen6_common.h0000664000175000017500000001106412400044327015655 00000000000000/* * Copyright © 2011-2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifndef GEN6_COMMON_H #define GEN6_COMMON_H #include "sna.h" #define NO_RING_SWITCH 0 #define PREFER_RENDER 0 static inline bool is_uncached(struct sna *sna, struct kgem_bo *bo) { return bo->io || (bo->scanout && !sna->kgem.has_wt); } inline static bool can_switch_to_blt(struct sna *sna, struct kgem_bo *bo, unsigned flags) { if (sna->kgem.ring != KGEM_RENDER) return true; if (NO_RING_SWITCH) return false; if (!sna->kgem.has_semaphores) return false; if (flags & COPY_LAST) return true; if (bo && RQ_IS_BLT(bo->rq)) return true; if (sna->render_state.gt < 2) return true; return kgem_ring_is_idle(&sna->kgem, KGEM_BLT); } inline static bool can_switch_to_render(struct sna *sna, struct kgem_bo *bo) { if (sna->kgem.ring == KGEM_RENDER) return true; if (NO_RING_SWITCH) return false; if (!sna->kgem.has_semaphores) return false; if (bo && !RQ_IS_BLT(bo->rq) && !is_uncached(sna, bo)) return true; return !kgem_ring_is_idle(&sna->kgem, KGEM_RENDER); } static inline bool untiled_tlb_miss(struct kgem_bo *bo) { if (kgem_bo_is_render(bo)) return false; return bo->tiling == I915_TILING_NONE && bo->pitch >= 4096; } static int prefer_blt_bo(struct sna *sna, struct kgem_bo *bo) { if (PREFER_RENDER) return PREFER_RENDER < 0; if (bo->rq) return RQ_IS_BLT(bo->rq); if (sna->flags & SNA_POWERSAVE) return true; return bo->tiling == I915_TILING_NONE || is_uncached(sna, bo); } inline static bool force_blt_ring(struct sna *sna) { if (sna->flags & SNA_POWERSAVE) return true; if (sna->kgem.mode == KGEM_RENDER) return false; if (sna->render_state.gt < 2) return true; return false; } inline static bool prefer_blt_ring(struct sna *sna, struct kgem_bo *bo, unsigned flags) { if (PREFER_RENDER) return PREFER_RENDER < 0; assert(!force_blt_ring(sna)); assert(!kgem_bo_is_render(bo)); return can_switch_to_blt(sna, bo, flags); } inline static bool prefer_render_ring(struct sna *sna, struct kgem_bo *bo) { if (sna->flags & SNA_POWERSAVE) return false; if (sna->render_state.gt < 2) return false; return can_switch_to_render(sna, bo); } inline static bool prefer_blt_composite(struct sna *sna, struct sna_composite_op *tmp) { if (PREFER_RENDER) return PREFER_RENDER < 0; if (untiled_tlb_miss(tmp->dst.bo) || untiled_tlb_miss(tmp->src.bo)) return true; if (force_blt_ring(sna)) return true; if (kgem_bo_is_render(tmp->dst.bo) || kgem_bo_is_render(tmp->src.bo)) return false; if (prefer_render_ring(sna, tmp->dst.bo)) return false; if (!prefer_blt_ring(sna, tmp->dst.bo, 0)) return false; return prefer_blt_bo(sna, tmp->dst.bo) || prefer_blt_bo(sna, tmp->src.bo); } static inline bool prefer_blt_fill(struct sna *sna, struct kgem_bo *bo, unsigned flags) { if (PREFER_RENDER) return PREFER_RENDER < 0; if (untiled_tlb_miss(bo)) return true; if (force_blt_ring(sna)) return true; if ((flags & (FILL_POINTS | FILL_SPANS)) == 0) { if (kgem_bo_is_render(bo)) return false; if (prefer_render_ring(sna, bo)) return false; if (!prefer_blt_ring(sna, bo, 0)) return false; } else { if (can_switch_to_blt(sna, bo, 0)) return true; } return prefer_blt_bo(sna, bo); } void gen6_render_context_switch(struct kgem *kgem, int new_mode); void gen6_render_retire(struct kgem *kgem); #endif /* GEN6_COMMON_H */ xf86-video-intel-2.99.917/src/sna/gen4_render.c0000664000175000017500000025453012432737457015666 00000000000000/* * Copyright © 2006,2008,2011 Intel Corporation * Copyright © 2007 Red Hat, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Wang Zhenyu * Eric Anholt * Carl Worth * Keith Packard * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_reg.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_video.h" #include "brw/brw.h" #include "gen4_common.h" #include "gen4_render.h" #include "gen4_source.h" #include "gen4_vertex.h" /* gen4 has a serious issue with its shaders that we need to flush * after every rectangle... So until that is resolved, prefer * the BLT engine. */ #define FORCE_SPANS 0 #define FORCE_NONRECTILINEAR_SPANS -1 #define FORCE_FLUSH 1 /* https://bugs.freedesktop.org/show_bug.cgi?id=55500 */ #define ALWAYS_FLUSH 1 #define NO_COMPOSITE 0 #define NO_COMPOSITE_SPANS 0 #define NO_COPY 0 #define NO_COPY_BOXES 0 #define NO_FILL 0 #define NO_FILL_ONE 0 #define NO_FILL_BOXES 0 #define NO_VIDEO 0 #define MAX_FLUSH_VERTICES 1 /* was 6, https://bugs.freedesktop.org/show_bug.cgi?id=55500 */ #define GEN4_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1) /* Set up a default static partitioning of the URB, which is supposed to * allow anything we would want to do, at potentially lower performance. */ #define URB_CS_ENTRY_SIZE 1 #define URB_CS_ENTRIES 0 #define URB_VS_ENTRY_SIZE 1 #define URB_VS_ENTRIES 32 #define URB_GS_ENTRY_SIZE 0 #define URB_GS_ENTRIES 0 #define URB_CL_ENTRY_SIZE 0 #define URB_CL_ENTRIES 0 #define URB_SF_ENTRY_SIZE 2 #define URB_SF_ENTRIES 64 /* * this program computes dA/dx and dA/dy for the texture coordinates along * with the base texture coordinate. It was extracted from the Mesa driver */ #define SF_KERNEL_NUM_GRF 16 #define PS_KERNEL_NUM_GRF 32 #define GEN4_MAX_SF_THREADS 24 #define GEN4_MAX_WM_THREADS 32 #define G4X_MAX_WM_THREADS 50 static const uint32_t ps_kernel_packed_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_yuv_rgb.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_planar_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_planar.g4b" #include "exa_wm_yuv_rgb.g4b" #include "exa_wm_write.g4b" }; #define NOKERNEL(kernel_enum, func, masked) \ [kernel_enum] = {func, 0, masked} #define KERNEL(kernel_enum, kernel, masked) \ [kernel_enum] = {&kernel, sizeof(kernel), masked} static const struct wm_kernel_info { const void *data; unsigned int size; bool has_mask; } wm_kernels[] = { NOKERNEL(WM_KERNEL, brw_wm_kernel__affine, false), NOKERNEL(WM_KERNEL_P, brw_wm_kernel__projective, false), NOKERNEL(WM_KERNEL_MASK, brw_wm_kernel__affine_mask, true), NOKERNEL(WM_KERNEL_MASK_P, brw_wm_kernel__projective_mask, true), NOKERNEL(WM_KERNEL_MASKCA, brw_wm_kernel__affine_mask_ca, true), NOKERNEL(WM_KERNEL_MASKCA_P, brw_wm_kernel__projective_mask_ca, true), NOKERNEL(WM_KERNEL_MASKSA, brw_wm_kernel__affine_mask_sa, true), NOKERNEL(WM_KERNEL_MASKSA_P, brw_wm_kernel__projective_mask_sa, true), NOKERNEL(WM_KERNEL_OPACITY, brw_wm_kernel__affine_opacity, true), NOKERNEL(WM_KERNEL_OPACITY_P, brw_wm_kernel__projective_opacity, true), KERNEL(WM_KERNEL_VIDEO_PLANAR, ps_kernel_planar_static, false), KERNEL(WM_KERNEL_VIDEO_PACKED, ps_kernel_packed_static, false), }; #undef KERNEL static const struct blendinfo { bool src_alpha; uint32_t src_blend; uint32_t dst_blend; } gen4_blend_op[] = { /* Clear */ {0, GEN4_BLENDFACTOR_ZERO, GEN4_BLENDFACTOR_ZERO}, /* Src */ {0, GEN4_BLENDFACTOR_ONE, GEN4_BLENDFACTOR_ZERO}, /* Dst */ {0, GEN4_BLENDFACTOR_ZERO, GEN4_BLENDFACTOR_ONE}, /* Over */ {1, GEN4_BLENDFACTOR_ONE, GEN4_BLENDFACTOR_INV_SRC_ALPHA}, /* OverReverse */ {0, GEN4_BLENDFACTOR_INV_DST_ALPHA, GEN4_BLENDFACTOR_ONE}, /* In */ {0, GEN4_BLENDFACTOR_DST_ALPHA, GEN4_BLENDFACTOR_ZERO}, /* InReverse */ {1, GEN4_BLENDFACTOR_ZERO, GEN4_BLENDFACTOR_SRC_ALPHA}, /* Out */ {0, GEN4_BLENDFACTOR_INV_DST_ALPHA, GEN4_BLENDFACTOR_ZERO}, /* OutReverse */ {1, GEN4_BLENDFACTOR_ZERO, GEN4_BLENDFACTOR_INV_SRC_ALPHA}, /* Atop */ {1, GEN4_BLENDFACTOR_DST_ALPHA, GEN4_BLENDFACTOR_INV_SRC_ALPHA}, /* AtopReverse */ {1, GEN4_BLENDFACTOR_INV_DST_ALPHA, GEN4_BLENDFACTOR_SRC_ALPHA}, /* Xor */ {1, GEN4_BLENDFACTOR_INV_DST_ALPHA, GEN4_BLENDFACTOR_INV_SRC_ALPHA}, /* Add */ {0, GEN4_BLENDFACTOR_ONE, GEN4_BLENDFACTOR_ONE}, }; /** * Highest-valued BLENDFACTOR used in gen4_blend_op. * * This leaves out GEN4_BLENDFACTOR_INV_DST_COLOR, * GEN4_BLENDFACTOR_INV_CONST_{COLOR,ALPHA}, * GEN4_BLENDFACTOR_INV_SRC1_{COLOR,ALPHA} */ #define GEN4_BLENDFACTOR_COUNT (GEN4_BLENDFACTOR_INV_DST_ALPHA + 1) #define BLEND_OFFSET(s, d) \ (((s) * GEN4_BLENDFACTOR_COUNT + (d)) * 64) #define SAMPLER_OFFSET(sf, se, mf, me, k) \ ((((((sf) * EXTEND_COUNT + (se)) * FILTER_COUNT + (mf)) * EXTEND_COUNT + (me)) * KERNEL_COUNT + (k)) * 64) static void gen4_emit_pipelined_pointers(struct sna *sna, const struct sna_composite_op *op, int blend, int kernel); #define OUT_BATCH(v) batch_emit(sna, v) #define OUT_VERTEX(x,y) vertex_emit_2s(sna, x,y) #define OUT_VERTEX_F(v) vertex_emit(sna, v) #define GEN4_MAX_3D_SIZE 8192 static inline bool too_large(int width, int height) { return width > GEN4_MAX_3D_SIZE || height > GEN4_MAX_3D_SIZE; } static int gen4_choose_composite_kernel(int op, bool has_mask, bool is_ca, bool is_affine) { int base; if (has_mask) { if (is_ca) { if (gen4_blend_op[op].src_alpha) base = WM_KERNEL_MASKSA; else base = WM_KERNEL_MASKCA; } else base = WM_KERNEL_MASK; } else base = WM_KERNEL; return base + !is_affine; } static bool gen4_magic_ca_pass(struct sna *sna, const struct sna_composite_op *op) { struct gen4_render_state *state = &sna->render_state.gen4; if (!op->need_magic_ca_pass) return false; assert(sna->render.vertex_index > sna->render.vertex_start); DBG(("%s: CA fixup\n", __FUNCTION__)); assert(op->mask.bo != NULL); assert(op->has_component_alpha); gen4_emit_pipelined_pointers(sna, op, PictOpAdd, gen4_choose_composite_kernel(PictOpAdd, true, true, op->is_affine)); OUT_BATCH(GEN4_3DPRIMITIVE | GEN4_3DPRIMITIVE_VERTEX_SEQUENTIAL | (_3DPRIM_RECTLIST << GEN4_3DPRIMITIVE_TOPOLOGY_SHIFT) | (0 << 9) | 4); OUT_BATCH(sna->render.vertex_index - sna->render.vertex_start); OUT_BATCH(sna->render.vertex_start); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ state->last_primitive = sna->kgem.nbatch; return true; } static uint32_t gen4_get_blend(int op, bool has_component_alpha, uint32_t dst_format) { uint32_t src, dst; src = gen4_blend_op[op].src_blend; dst = gen4_blend_op[op].dst_blend; /* If there's no dst alpha channel, adjust the blend op so that we'll treat * it as always 1. */ if (PICT_FORMAT_A(dst_format) == 0) { if (src == GEN4_BLENDFACTOR_DST_ALPHA) src = GEN4_BLENDFACTOR_ONE; else if (src == GEN4_BLENDFACTOR_INV_DST_ALPHA) src = GEN4_BLENDFACTOR_ZERO; } /* If the source alpha is being used, then we should only be in a * case where the source blend factor is 0, and the source blend * value is the mask channels multiplied by the source picture's alpha. */ if (has_component_alpha && gen4_blend_op[op].src_alpha) { if (dst == GEN4_BLENDFACTOR_SRC_ALPHA) dst = GEN4_BLENDFACTOR_SRC_COLOR; else if (dst == GEN4_BLENDFACTOR_INV_SRC_ALPHA) dst = GEN4_BLENDFACTOR_INV_SRC_COLOR; } DBG(("blend op=%d, dst=%x [A=%d] => src=%d, dst=%d => offset=%x\n", op, dst_format, PICT_FORMAT_A(dst_format), src, dst, BLEND_OFFSET(src, dst))); return BLEND_OFFSET(src, dst); } static uint32_t gen4_get_card_format(PictFormat format) { switch (format) { default: return -1; case PICT_a8r8g8b8: return GEN4_SURFACEFORMAT_B8G8R8A8_UNORM; case PICT_x8r8g8b8: return GEN4_SURFACEFORMAT_B8G8R8X8_UNORM; case PICT_a8b8g8r8: return GEN4_SURFACEFORMAT_R8G8B8A8_UNORM; case PICT_x8b8g8r8: return GEN4_SURFACEFORMAT_R8G8B8X8_UNORM; #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: return GEN4_SURFACEFORMAT_B10G10R10A2_UNORM; case PICT_x2r10g10b10: return GEN4_SURFACEFORMAT_B10G10R10X2_UNORM; #endif case PICT_r8g8b8: return GEN4_SURFACEFORMAT_R8G8B8_UNORM; case PICT_r5g6b5: return GEN4_SURFACEFORMAT_B5G6R5_UNORM; case PICT_a1r5g5b5: return GEN4_SURFACEFORMAT_B5G5R5A1_UNORM; case PICT_a8: return GEN4_SURFACEFORMAT_A8_UNORM; case PICT_a4r4g4b4: return GEN4_SURFACEFORMAT_B4G4R4A4_UNORM; } } static uint32_t gen4_get_dest_format(PictFormat format) { switch (format) { default: return -1; case PICT_a8r8g8b8: case PICT_x8r8g8b8: return GEN4_SURFACEFORMAT_B8G8R8A8_UNORM; case PICT_a8b8g8r8: case PICT_x8b8g8r8: return GEN4_SURFACEFORMAT_R8G8B8A8_UNORM; #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: case PICT_x2r10g10b10: return GEN4_SURFACEFORMAT_B10G10R10A2_UNORM; #endif case PICT_r5g6b5: return GEN4_SURFACEFORMAT_B5G6R5_UNORM; case PICT_x1r5g5b5: case PICT_a1r5g5b5: return GEN4_SURFACEFORMAT_B5G5R5A1_UNORM; case PICT_a8: return GEN4_SURFACEFORMAT_A8_UNORM; case PICT_a4r4g4b4: case PICT_x4r4g4b4: return GEN4_SURFACEFORMAT_B4G4R4A4_UNORM; } } static bool gen4_check_dst_format(PictFormat format) { if (gen4_get_dest_format(format) != -1) return true; DBG(("%s: unhandled format: %x\n", __FUNCTION__, (int)format)); return false; } static bool gen4_check_format(uint32_t format) { if (gen4_get_card_format(format) != -1) return true; DBG(("%s: unhandled format: %x\n", __FUNCTION__, (int)format)); return false; } typedef struct gen4_surface_state_padded { struct gen4_surface_state state; char pad[32 - sizeof(struct gen4_surface_state)]; } gen4_surface_state_padded; static void null_create(struct sna_static_stream *stream) { /* A bunch of zeros useful for legacy border color and depth-stencil */ sna_static_stream_map(stream, 64, 64); } static void sampler_state_init(struct gen4_sampler_state *sampler_state, sampler_filter_t filter, sampler_extend_t extend) { sampler_state->ss0.lod_preclamp = 1; /* GL mode */ /* We use the legacy mode to get the semantics specified by * the Render extension. */ sampler_state->ss0.border_color_mode = GEN4_BORDER_COLOR_MODE_LEGACY; switch (filter) { default: case SAMPLER_FILTER_NEAREST: sampler_state->ss0.min_filter = GEN4_MAPFILTER_NEAREST; sampler_state->ss0.mag_filter = GEN4_MAPFILTER_NEAREST; break; case SAMPLER_FILTER_BILINEAR: sampler_state->ss0.min_filter = GEN4_MAPFILTER_LINEAR; sampler_state->ss0.mag_filter = GEN4_MAPFILTER_LINEAR; break; } switch (extend) { default: case SAMPLER_EXTEND_NONE: sampler_state->ss1.r_wrap_mode = GEN4_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss1.s_wrap_mode = GEN4_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss1.t_wrap_mode = GEN4_TEXCOORDMODE_CLAMP_BORDER; break; case SAMPLER_EXTEND_REPEAT: sampler_state->ss1.r_wrap_mode = GEN4_TEXCOORDMODE_WRAP; sampler_state->ss1.s_wrap_mode = GEN4_TEXCOORDMODE_WRAP; sampler_state->ss1.t_wrap_mode = GEN4_TEXCOORDMODE_WRAP; break; case SAMPLER_EXTEND_PAD: sampler_state->ss1.r_wrap_mode = GEN4_TEXCOORDMODE_CLAMP; sampler_state->ss1.s_wrap_mode = GEN4_TEXCOORDMODE_CLAMP; sampler_state->ss1.t_wrap_mode = GEN4_TEXCOORDMODE_CLAMP; break; case SAMPLER_EXTEND_REFLECT: sampler_state->ss1.r_wrap_mode = GEN4_TEXCOORDMODE_MIRROR; sampler_state->ss1.s_wrap_mode = GEN4_TEXCOORDMODE_MIRROR; sampler_state->ss1.t_wrap_mode = GEN4_TEXCOORDMODE_MIRROR; break; } } static uint32_t gen4_filter(uint32_t filter) { switch (filter) { default: assert(0); case PictFilterNearest: return SAMPLER_FILTER_NEAREST; case PictFilterBilinear: return SAMPLER_FILTER_BILINEAR; } } static uint32_t gen4_check_filter(PicturePtr picture) { switch (picture->filter) { case PictFilterNearest: case PictFilterBilinear: return true; default: DBG(("%s: unknown filter: %s [%d]\n", __FUNCTION__, PictureGetFilterName(picture->filter), picture->filter)); return false; } } static uint32_t gen4_repeat(uint32_t repeat) { switch (repeat) { default: assert(0); case RepeatNone: return SAMPLER_EXTEND_NONE; case RepeatNormal: return SAMPLER_EXTEND_REPEAT; case RepeatPad: return SAMPLER_EXTEND_PAD; case RepeatReflect: return SAMPLER_EXTEND_REFLECT; } } static bool gen4_check_repeat(PicturePtr picture) { if (!picture->repeat) return true; switch (picture->repeatType) { case RepeatNone: case RepeatNormal: case RepeatPad: case RepeatReflect: return true; default: DBG(("%s: unknown repeat: %d\n", __FUNCTION__, picture->repeatType)); return false; } } static uint32_t gen4_tiling_bits(uint32_t tiling) { switch (tiling) { default: assert(0); case I915_TILING_NONE: return 0; case I915_TILING_X: return GEN4_SURFACE_TILED; case I915_TILING_Y: return GEN4_SURFACE_TILED | GEN4_SURFACE_TILED_Y; } } /** * Sets up the common fields for a surface state buffer for the given * picture in the given surface state buffer. */ static uint32_t gen4_bind_bo(struct sna *sna, struct kgem_bo *bo, uint32_t width, uint32_t height, uint32_t format, bool is_dst) { uint32_t domains; uint16_t offset; uint32_t *ss; assert(sna->kgem.gen != 040 || !kgem_bo_is_snoop(bo)); /* After the first bind, we manage the cache domains within the batch */ offset = kgem_bo_get_binding(bo, format | is_dst << 31); if (offset) { assert(offset >= sna->kgem.surface); if (is_dst) kgem_bo_mark_dirty(bo); return offset * sizeof(uint32_t); } offset = sna->kgem.surface -= sizeof(struct gen4_surface_state_padded) / sizeof(uint32_t); ss = sna->kgem.batch + offset; ss[0] = (GEN4_SURFACE_2D << GEN4_SURFACE_TYPE_SHIFT | GEN4_SURFACE_BLEND_ENABLED | format << GEN4_SURFACE_FORMAT_SHIFT); if (is_dst) { ss[0] |= GEN4_SURFACE_RC_READ_WRITE; domains = I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER; } else domains = I915_GEM_DOMAIN_SAMPLER << 16; ss[1] = kgem_add_reloc(&sna->kgem, offset + 1, bo, domains, 0); ss[2] = ((width - 1) << GEN4_SURFACE_WIDTH_SHIFT | (height - 1) << GEN4_SURFACE_HEIGHT_SHIFT); ss[3] = (gen4_tiling_bits(bo->tiling) | (bo->pitch - 1) << GEN4_SURFACE_PITCH_SHIFT); ss[4] = 0; ss[5] = 0; kgem_bo_set_binding(bo, format | is_dst << 31, offset); DBG(("[%x] bind bo(handle=%d, addr=%d), format=%d, width=%d, height=%d, pitch=%d, tiling=%d -> %s\n", offset, bo->handle, ss[1], format, width, height, bo->pitch, bo->tiling, domains & 0xffff ? "render" : "sampler")); return offset * sizeof(uint32_t); } static void gen4_emit_vertex_buffer(struct sna *sna, const struct sna_composite_op *op) { int id = op->u.gen4.ve_id; assert((sna->render.vb_id & (1 << id)) == 0); OUT_BATCH(GEN4_3DSTATE_VERTEX_BUFFERS | 3); OUT_BATCH((id << VB0_BUFFER_INDEX_SHIFT) | VB0_VERTEXDATA | (4*op->floats_per_vertex << VB0_BUFFER_PITCH_SHIFT)); assert(sna->render.nvertex_reloc < ARRAY_SIZE(sna->render.vertex_reloc)); sna->render.vertex_reloc[sna->render.nvertex_reloc++] = sna->kgem.nbatch; OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); sna->render.vb_id |= 1 << id; } inline static void gen4_emit_pipe_flush(struct sna *sna) { #if 1 OUT_BATCH(GEN4_PIPE_CONTROL | GEN4_PIPE_CONTROL_WC_FLUSH | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); #else OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH); #endif } inline static void gen4_emit_pipe_break(struct sna *sna) { #if !ALWAYS_FLUSH OUT_BATCH(GEN4_PIPE_CONTROL | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); #else OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH); #endif } inline static void gen4_emit_pipe_invalidate(struct sna *sna) { #if 0 OUT_BATCH(GEN4_PIPE_CONTROL | GEN4_PIPE_CONTROL_WC_FLUSH | (sna->kgem.gen >= 045 ? GEN4_PIPE_CONTROL_TC_FLUSH : 0) | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); #else OUT_BATCH(MI_FLUSH); #endif } static void gen4_emit_primitive(struct sna *sna) { if (sna->kgem.nbatch == sna->render_state.gen4.last_primitive) { sna->render.vertex_offset = sna->kgem.nbatch - 5; return; } OUT_BATCH(GEN4_3DPRIMITIVE | GEN4_3DPRIMITIVE_VERTEX_SEQUENTIAL | (_3DPRIM_RECTLIST << GEN4_3DPRIMITIVE_TOPOLOGY_SHIFT) | (0 << 9) | 4); sna->render.vertex_offset = sna->kgem.nbatch; OUT_BATCH(0); /* vertex count, to be filled in later */ OUT_BATCH(sna->render.vertex_index); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ sna->render.vertex_start = sna->render.vertex_index; sna->render_state.gen4.last_primitive = sna->kgem.nbatch; } static bool gen4_rectangle_begin(struct sna *sna, const struct sna_composite_op *op) { unsigned int id = 1 << op->u.gen4.ve_id; int ndwords; if (sna_vertex_wait__locked(&sna->render) && sna->render.vertex_offset) return true; /* 7xpipelined pointers + 6xprimitive + 1xflush */ ndwords = op->need_magic_ca_pass? 19 : 6; if ((sna->render.vb_id & id) == 0) ndwords += 5; ndwords += 8*FORCE_FLUSH; if (!kgem_check_batch(&sna->kgem, ndwords)) return false; if ((sna->render.vb_id & id) == 0) gen4_emit_vertex_buffer(sna, op); if (sna->render.vertex_offset == 0) gen4_emit_primitive(sna); return true; } static int gen4_get_rectangles__flush(struct sna *sna, const struct sna_composite_op *op) { /* Preventing discarding new vbo after lock contention */ if (sna_vertex_wait__locked(&sna->render)) { int rem = vertex_space(sna); if (rem > op->floats_per_rect) return rem; } if (!kgem_check_batch(&sna->kgem, 8*FORCE_FLUSH + (op->need_magic_ca_pass ? 2*19+6 : 6))) return 0; if (!kgem_check_reloc_and_exec(&sna->kgem, 2)) return 0; if (sna->render.vertex_offset) { gen4_vertex_flush(sna); if (gen4_magic_ca_pass(sna, op)) gen4_emit_pipelined_pointers(sna, op, op->op, op->u.gen4.wm_kernel); } return gen4_vertex_finish(sna); } inline static int gen4_get_rectangles(struct sna *sna, const struct sna_composite_op *op, int want, void (*emit_state)(struct sna *sna, const struct sna_composite_op *op)) { int rem; assert(want); #if FORCE_FLUSH rem = sna->render.vertex_offset; if (sna->kgem.nbatch == sna->render_state.gen4.last_primitive) rem = sna->kgem.nbatch - 5; if (rem) { rem = MAX_FLUSH_VERTICES - (sna->render.vertex_index - sna->render.vertex_start) / 3; if (rem <= 0) { if (sna->render.vertex_offset) { gen4_vertex_flush(sna); if (gen4_magic_ca_pass(sna, op)) { if (kgem_check_batch(&sna->kgem, 19+6)) gen4_emit_pipelined_pointers(sna, op, op->op, op->u.gen4.wm_kernel); } } gen4_emit_pipe_break(sna); rem = MAX_FLUSH_VERTICES; } } else rem = MAX_FLUSH_VERTICES; if (want > rem) want = rem; #endif start: rem = vertex_space(sna); if (unlikely(rem < op->floats_per_rect)) { DBG(("flushing vbo for %s: %d < %d\n", __FUNCTION__, rem, op->floats_per_rect)); rem = gen4_get_rectangles__flush(sna, op); if (unlikely(rem == 0)) goto flush; } if (unlikely(sna->render.vertex_offset == 0)) { if (!gen4_rectangle_begin(sna, op)) goto flush; else goto start; } assert(rem <= vertex_space(sna)); assert(op->floats_per_rect <= rem); if (want > 1 && want * op->floats_per_rect > rem) want = rem / op->floats_per_rect; sna->render.vertex_index += 3*want; return want; flush: if (sna->render.vertex_offset) { gen4_vertex_flush(sna); gen4_magic_ca_pass(sna, op); } sna_vertex_wait__locked(&sna->render); _kgem_submit(&sna->kgem); emit_state(sna, op); goto start; } static uint32_t * gen4_composite_get_binding_table(struct sna *sna, uint16_t *offset) { sna->kgem.surface -= sizeof(struct gen4_surface_state_padded) / sizeof(uint32_t); DBG(("%s(%x)\n", __FUNCTION__, 4*sna->kgem.surface)); /* Clear all surplus entries to zero in case of prefetch */ *offset = sna->kgem.surface; return memset(sna->kgem.batch + sna->kgem.surface, 0, sizeof(struct gen4_surface_state_padded)); } static void gen4_emit_urb(struct sna *sna) { int urb_vs_end; int urb_gs_end; int urb_cl_end; int urb_sf_end; int urb_cs_end; if (!sna->render_state.gen4.needs_urb) return; urb_vs_end = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE; urb_gs_end = urb_vs_end + URB_GS_ENTRIES * URB_GS_ENTRY_SIZE; urb_cl_end = urb_gs_end + URB_CL_ENTRIES * URB_CL_ENTRY_SIZE; urb_sf_end = urb_cl_end + URB_SF_ENTRIES * URB_SF_ENTRY_SIZE; urb_cs_end = urb_sf_end + URB_CS_ENTRIES * URB_CS_ENTRY_SIZE; assert(urb_cs_end <= 256); while ((sna->kgem.nbatch & 15) > 12) OUT_BATCH(MI_NOOP); OUT_BATCH(GEN4_URB_FENCE | UF0_CS_REALLOC | UF0_SF_REALLOC | UF0_CLIP_REALLOC | UF0_GS_REALLOC | UF0_VS_REALLOC | 1); OUT_BATCH(urb_cl_end << UF1_CLIP_FENCE_SHIFT | urb_gs_end << UF1_GS_FENCE_SHIFT | urb_vs_end << UF1_VS_FENCE_SHIFT); OUT_BATCH(urb_cs_end << UF2_CS_FENCE_SHIFT | urb_sf_end << UF2_SF_FENCE_SHIFT); /* Constant buffer state */ OUT_BATCH(GEN4_CS_URB_STATE | 0); OUT_BATCH((URB_CS_ENTRY_SIZE - 1) << 4 | URB_CS_ENTRIES << 0); sna->render_state.gen4.needs_urb = false; } static void gen4_emit_state_base_address(struct sna *sna) { assert(sna->render_state.gen4.general_bo->proxy == NULL); OUT_BATCH(GEN4_STATE_BASE_ADDRESS | 4); OUT_BATCH(kgem_add_reloc(&sna->kgem, /* general */ sna->kgem.nbatch, sna->render_state.gen4.general_bo, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); OUT_BATCH(kgem_add_reloc(&sna->kgem, /* surface */ sna->kgem.nbatch, NULL, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); OUT_BATCH(0); /* media */ /* upper bounds, all disabled */ OUT_BATCH(BASE_ADDRESS_MODIFY); OUT_BATCH(0); } static void gen4_emit_invariant(struct sna *sna) { assert(sna->kgem.surface == sna->kgem.batch_size); if (sna->kgem.gen >= 045) OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D); else OUT_BATCH(GEN4_PIPELINE_SELECT | PIPELINE_SELECT_3D); gen4_emit_state_base_address(sna); sna->render_state.gen4.needs_invariant = false; } static void gen4_get_batch(struct sna *sna, const struct sna_composite_op *op) { kgem_set_mode(&sna->kgem, KGEM_RENDER, op->dst.bo); if (!kgem_check_batch_with_surfaces(&sna->kgem, 150 + 50*FORCE_FLUSH, 4)) { DBG(("%s: flushing batch: %d < %d+%d\n", __FUNCTION__, sna->kgem.surface - sna->kgem.nbatch, 150, 4*8)); kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } if (sna->render_state.gen4.needs_invariant) gen4_emit_invariant(sna); } static void gen4_align_vertex(struct sna *sna, const struct sna_composite_op *op) { assert(op->floats_per_rect == 3*op->floats_per_vertex); if (op->floats_per_vertex != sna->render_state.gen4.floats_per_vertex) { DBG(("aligning vertex: was %d, now %d floats per vertex\n", sna->render_state.gen4.floats_per_vertex, op->floats_per_vertex)); gen4_vertex_align(sna, op); sna->render_state.gen4.floats_per_vertex = op->floats_per_vertex; } } static void gen4_emit_binding_table(struct sna *sna, uint16_t offset) { if (sna->render_state.gen4.surface_table == offset) return; sna->render_state.gen4.surface_table = offset; /* Binding table pointers */ OUT_BATCH(GEN4_3DSTATE_BINDING_TABLE_POINTERS | 4); OUT_BATCH(0); /* vs */ OUT_BATCH(0); /* gs */ OUT_BATCH(0); /* clip */ OUT_BATCH(0); /* sf */ /* Only the PS uses the binding table */ OUT_BATCH(offset*4); } static void gen4_emit_pipelined_pointers(struct sna *sna, const struct sna_composite_op *op, int blend, int kernel) { uint16_t sp, bp; uint32_t key; DBG(("%s: has_mask=%d, src=(%d, %d), mask=(%d, %d),kernel=%d, blend=%d, ca=%d, format=%x\n", __FUNCTION__, op->u.gen4.ve_id & 2, op->src.filter, op->src.repeat, op->mask.filter, op->mask.repeat, kernel, blend, op->has_component_alpha, (int)op->dst.format)); sp = SAMPLER_OFFSET(op->src.filter, op->src.repeat, op->mask.filter, op->mask.repeat, kernel); bp = gen4_get_blend(blend, op->has_component_alpha, op->dst.format); DBG(("%s: sp=%d, bp=%d\n", __FUNCTION__, sp, bp)); key = sp | (uint32_t)bp << 16; if (key == sna->render_state.gen4.last_pipelined_pointers) return; OUT_BATCH(GEN4_3DSTATE_PIPELINED_POINTERS | 5); OUT_BATCH(sna->render_state.gen4.vs); OUT_BATCH(GEN4_GS_DISABLE); /* passthrough */ OUT_BATCH(GEN4_CLIP_DISABLE); /* passthrough */ OUT_BATCH(sna->render_state.gen4.sf); OUT_BATCH(sna->render_state.gen4.wm + sp); OUT_BATCH(sna->render_state.gen4.cc + bp); sna->render_state.gen4.last_pipelined_pointers = key; gen4_emit_urb(sna); } static bool gen4_emit_drawing_rectangle(struct sna *sna, const struct sna_composite_op *op) { uint32_t limit = (op->dst.height - 1) << 16 | (op->dst.width - 1); uint32_t offset = (uint16_t)op->dst.y << 16 | (uint16_t)op->dst.x; assert(!too_large(abs(op->dst.x), abs(op->dst.y))); assert(!too_large(op->dst.width, op->dst.height)); if (sna->render_state.gen4.drawrect_limit == limit && sna->render_state.gen4.drawrect_offset == offset) return true; sna->render_state.gen4.drawrect_offset = offset; sna->render_state.gen4.drawrect_limit = limit; OUT_BATCH(GEN4_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); OUT_BATCH(limit); OUT_BATCH(offset); return false; } static void gen4_emit_vertex_elements(struct sna *sna, const struct sna_composite_op *op) { /* * vertex data in vertex buffer * position: (x, y) * texture coordinate 0: (u0, v0) if (is_affine is true) else (u0, v0, w0) * texture coordinate 1 if (has_mask is true): same as above */ struct gen4_render_state *render = &sna->render_state.gen4; uint32_t src_format, dw; int id = op->u.gen4.ve_id; if (render->ve_id == id) return; render->ve_id = id; /* The VUE layout * dword 0-3: position (x, y, 1.0, 1.0), * dword 4-7: texture coordinate 0 (u0, v0, w0, 1.0) * [optional] dword 8-11: texture coordinate 1 (u1, v1, w1, 1.0) */ OUT_BATCH(GEN4_3DSTATE_VERTEX_ELEMENTS | (2 * (1 + 2) - 1)); /* x,y */ OUT_BATCH(id << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN4_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); OUT_BATCH(VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT | VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT | (1*4) << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT); /* u0, v0, w0 */ /* u0, v0, w0 */ DBG(("%s: first channel %d floats, offset=4b\n", __FUNCTION__, id & 3)); dw = VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT; switch (id & 3) { default: assert(0); case 0: src_format = GEN4_SURFACEFORMAT_R16G16_SSCALED; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT; break; case 1: src_format = GEN4_SURFACEFORMAT_R32_FLOAT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT; break; case 2: src_format = GEN4_SURFACEFORMAT_R32G32_FLOAT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT; break; case 3: src_format = GEN4_SURFACEFORMAT_R32G32B32_FLOAT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_2_SHIFT; break; } OUT_BATCH(id << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | src_format << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); OUT_BATCH(dw | 8 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT); /* u1, v1, w1 */ if (id >> 2) { unsigned src_offset = 4 + ((id & 3) ?: 1) * sizeof(float); DBG(("%s: second channel %d floats, offset=%db\n", __FUNCTION__, id >> 2, src_offset)); dw = VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT; switch (id >> 2) { case 1: src_format = GEN4_SURFACEFORMAT_R32_FLOAT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT; break; default: assert(0); case 2: src_format = GEN4_SURFACEFORMAT_R32G32_FLOAT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT; break; case 3: src_format = GEN4_SURFACEFORMAT_R32G32B32_FLOAT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_2_SHIFT; break; } OUT_BATCH(id << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | src_format << VE0_FORMAT_SHIFT | src_offset << VE0_OFFSET_SHIFT); OUT_BATCH(dw | 12 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT); } else { OUT_BATCH(id << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN4_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); OUT_BATCH(VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT | 12 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT); } } static void gen4_emit_state(struct sna *sna, const struct sna_composite_op *op, uint16_t wm_binding_table) { bool flush; assert(op->dst.bo->exec); flush = wm_binding_table & 1; wm_binding_table &= ~1; if (ALWAYS_FLUSH || kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo)) { DBG(("%s: flushing dirty (%d, %d), forced? %d\n", __FUNCTION__, kgem_bo_is_dirty(op->src.bo), kgem_bo_is_dirty(op->mask.bo), flush)); gen4_emit_pipe_invalidate(sna); kgem_clear_dirty(&sna->kgem); kgem_bo_mark_dirty(op->dst.bo); flush = false; } flush &= gen4_emit_drawing_rectangle(sna, op); if (flush && op->op > PictOpSrc) gen4_emit_pipe_flush(sna); gen4_emit_binding_table(sna, wm_binding_table); gen4_emit_pipelined_pointers(sna, op, op->op, op->u.gen4.wm_kernel); gen4_emit_vertex_elements(sna, op); } static void gen4_bind_surfaces(struct sna *sna, const struct sna_composite_op *op) { uint32_t *binding_table; uint16_t offset, dirty; gen4_get_batch(sna, op); dirty = kgem_bo_is_dirty(op->dst.bo); binding_table = gen4_composite_get_binding_table(sna, &offset); binding_table[0] = gen4_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen4_get_dest_format(op->dst.format), true); binding_table[1] = gen4_bind_bo(sna, op->src.bo, op->src.width, op->src.height, op->src.card_format, false); if (op->mask.bo) { assert(op->u.gen4.ve_id >> 2); binding_table[2] = gen4_bind_bo(sna, op->mask.bo, op->mask.width, op->mask.height, op->mask.card_format, false); } if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen4.surface_table) == *(uint64_t*)binding_table && (op->mask.bo == NULL || sna->kgem.batch[sna->render_state.gen4.surface_table+2] == binding_table[2])) { sna->kgem.surface += sizeof(struct gen4_surface_state_padded) / sizeof(uint32_t); offset = sna->render_state.gen4.surface_table; } if (!ALWAYS_FLUSH && sna->kgem.batch[sna->render_state.gen4.surface_table] == binding_table[0]) dirty = 0; gen4_emit_state(sna, op, offset | dirty); } fastcall static void gen4_render_composite_blt(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { DBG(("%s: src=(%d, %d)+(%d, %d), mask=(%d, %d)+(%d, %d), dst=(%d, %d)+(%d, %d), size=(%d, %d)\n", __FUNCTION__, r->src.x, r->src.y, op->src.offset[0], op->src.offset[1], r->mask.x, r->mask.y, op->mask.offset[0], op->mask.offset[1], r->dst.x, r->dst.y, op->dst.x, op->dst.y, r->width, r->height)); gen4_get_rectangles(sna, op, 1, gen4_bind_surfaces); op->prim_emit(sna, op, r); } fastcall static void gen4_render_composite_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { struct sna_composite_rectangles r; DBG((" %s: (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); gen4_get_rectangles(sna, op, 1, gen4_bind_surfaces); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.mask = r.src = r.dst; op->prim_emit(sna, op, &r); } static void gen4_render_composite_boxes__blt(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s(%d) delta=(%d, %d), src=(%d, %d)/(%d, %d), mask=(%d, %d)/(%d, %d)\n", __FUNCTION__, nbox, op->dst.x, op->dst.y, op->src.offset[0], op->src.offset[1], op->src.width, op->src.height, op->mask.offset[0], op->mask.offset[1], op->mask.width, op->mask.height)); do { int nbox_this_time; nbox_this_time = gen4_get_rectangles(sna, op, nbox, gen4_bind_surfaces); nbox -= nbox_this_time; do { struct sna_composite_rectangles r; DBG((" %s: (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.mask = r.src = r.dst; op->prim_emit(sna, op, &r); box++; } while (--nbox_this_time); } while (nbox); } static void gen4_render_composite_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); do { int nbox_this_time; float *v; nbox_this_time = gen4_get_rectangles(sna, op, nbox, gen4_bind_surfaces); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; } while (nbox); } #if !FORCE_FLUSH static void gen4_render_composite_boxes__thread(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen4_get_rectangles(sna, op, nbox, gen4_bind_surfaces); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } #endif #ifndef MAX #define MAX(a,b) ((a) > (b) ? (a) : (b)) #endif static uint32_t gen4_bind_video_source(struct sna *sna, struct kgem_bo *src_bo, uint32_t src_offset, int src_width, int src_height, int src_pitch, uint32_t src_surf_format) { struct gen4_surface_state *ss; sna->kgem.surface -= sizeof(struct gen4_surface_state_padded) / sizeof(uint32_t); ss = memset(sna->kgem.batch + sna->kgem.surface, 0, sizeof(*ss)); ss->ss0.surface_type = GEN4_SURFACE_2D; ss->ss0.surface_format = src_surf_format; ss->ss0.color_blend = 1; ss->ss1.base_addr = kgem_add_reloc(&sna->kgem, sna->kgem.surface + 1, src_bo, I915_GEM_DOMAIN_SAMPLER << 16, src_offset); ss->ss2.width = src_width - 1; ss->ss2.height = src_height - 1; ss->ss3.pitch = src_pitch - 1; return sna->kgem.surface * sizeof(uint32_t); } static void gen4_video_bind_surfaces(struct sna *sna, const struct sna_composite_op *op) { struct sna_video_frame *frame = op->priv; uint32_t src_surf_format; uint32_t src_surf_base[6]; int src_width[6]; int src_height[6]; int src_pitch[6]; uint32_t *binding_table; uint16_t offset, dirty; int n_src, n; src_surf_base[0] = 0; src_surf_base[1] = 0; src_surf_base[2] = frame->VBufOffset; src_surf_base[3] = frame->VBufOffset; src_surf_base[4] = frame->UBufOffset; src_surf_base[5] = frame->UBufOffset; if (is_planar_fourcc(frame->id)) { src_surf_format = GEN4_SURFACEFORMAT_R8_UNORM; src_width[1] = src_width[0] = frame->width; src_height[1] = src_height[0] = frame->height; src_pitch[1] = src_pitch[0] = frame->pitch[1]; src_width[4] = src_width[5] = src_width[2] = src_width[3] = frame->width / 2; src_height[4] = src_height[5] = src_height[2] = src_height[3] = frame->height / 2; src_pitch[4] = src_pitch[5] = src_pitch[2] = src_pitch[3] = frame->pitch[0]; n_src = 6; } else { if (frame->id == FOURCC_UYVY) src_surf_format = GEN4_SURFACEFORMAT_YCRCB_SWAPY; else src_surf_format = GEN4_SURFACEFORMAT_YCRCB_NORMAL; src_width[0] = frame->width; src_height[0] = frame->height; src_pitch[0] = frame->pitch[0]; n_src = 1; } gen4_get_batch(sna, op); dirty = kgem_bo_is_dirty(op->dst.bo); binding_table = gen4_composite_get_binding_table(sna, &offset); binding_table[0] = gen4_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen4_get_dest_format(op->dst.format), true); for (n = 0; n < n_src; n++) { binding_table[1+n] = gen4_bind_video_source(sna, frame->bo, src_surf_base[n], src_width[n], src_height[n], src_pitch[n], src_surf_format); } if (!ALWAYS_FLUSH && sna->kgem.batch[sna->render_state.gen4.surface_table] == binding_table[0]) dirty = 0; gen4_emit_state(sna, op, offset | dirty); } static bool gen4_render_video(struct sna *sna, struct sna_video *video, struct sna_video_frame *frame, RegionPtr dstRegion, PixmapPtr pixmap) { struct sna_composite_op tmp; struct sna_pixmap *priv = sna_pixmap(pixmap); int dst_width = dstRegion->extents.x2 - dstRegion->extents.x1; int dst_height = dstRegion->extents.y2 - dstRegion->extents.y1; int src_width = frame->src.x2 - frame->src.x1; int src_height = frame->src.y2 - frame->src.y1; float src_offset_x, src_offset_y; float src_scale_x, src_scale_y; int nbox, pix_xoff, pix_yoff; const BoxRec *box; DBG(("%s: %dx%d -> %dx%d\n", __FUNCTION__, src_width, src_height, dst_width, dst_height)); assert(priv->gpu_bo); memset(&tmp, 0, sizeof(tmp)); tmp.op = PictOpSrc; tmp.dst.pixmap = pixmap; tmp.dst.width = pixmap->drawable.width; tmp.dst.height = pixmap->drawable.height; tmp.dst.format = sna_format_for_depth(pixmap->drawable.depth); tmp.dst.bo = priv->gpu_bo; if (src_width == dst_width && src_height == dst_height) tmp.src.filter = SAMPLER_FILTER_NEAREST; else tmp.src.filter = SAMPLER_FILTER_BILINEAR; tmp.src.repeat = SAMPLER_EXTEND_PAD; tmp.src.bo = frame->bo; tmp.mask.bo = NULL; tmp.u.gen4.wm_kernel = is_planar_fourcc(frame->id) ? WM_KERNEL_VIDEO_PLANAR : WM_KERNEL_VIDEO_PACKED; tmp.u.gen4.ve_id = 2; tmp.is_affine = true; tmp.floats_per_vertex = 3; tmp.floats_per_rect = 9; tmp.priv = frame; if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, frame->bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, frame->bo, NULL)) return false; } gen4_align_vertex(sna, &tmp); gen4_video_bind_surfaces(sna, &tmp); /* Set up the offset for translating from the given region (in screen * coordinates) to the backing pixmap. */ #ifdef COMPOSITE pix_xoff = -pixmap->screen_x + pixmap->drawable.x; pix_yoff = -pixmap->screen_y + pixmap->drawable.y; #else pix_xoff = 0; pix_yoff = 0; #endif src_scale_x = (float)src_width / dst_width / frame->width; src_offset_x = (float)frame->src.x1 / frame->width - dstRegion->extents.x1 * src_scale_x; src_scale_y = (float)src_height / dst_height / frame->height; src_offset_y = (float)frame->src.y1 / frame->height - dstRegion->extents.y1 * src_scale_y; box = region_rects(dstRegion); nbox = region_num_rects(dstRegion); do { int n; n = gen4_get_rectangles(sna, &tmp, nbox, gen4_video_bind_surfaces); assert(n); nbox -= n; do { BoxRec r; r.x1 = box->x1 + pix_xoff; r.x2 = box->x2 + pix_xoff; r.y1 = box->y1 + pix_yoff; r.y2 = box->y2 + pix_yoff; OUT_VERTEX(r.x2, r.y2); OUT_VERTEX_F(box->x2 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y); OUT_VERTEX(r.x1, r.y2); OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y); OUT_VERTEX(r.x1, r.y1); OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y1 * src_scale_y + src_offset_y); if (!DAMAGE_IS_ALL(priv->gpu_damage)) { sna_damage_add_box(&priv->gpu_damage, &r); sna_damage_subtract_box(&priv->cpu_damage, &r); } box++; } while (--n); } while (nbox); gen4_vertex_flush(sna); return true; } static int gen4_composite_picture(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int x, int y, int w, int h, int dst_x, int dst_y, bool precise) { PixmapPtr pixmap; uint32_t color; int16_t dx, dy; DBG(("%s: (%d, %d)x(%d, %d), dst=(%d, %d)\n", __FUNCTION__, x, y, w, h, dst_x, dst_y)); channel->is_solid = false; channel->card_format = -1; if (sna_picture_is_solid(picture, &color)) return gen4_channel_init_solid(sna, channel, color); if (picture->pDrawable == NULL) { int ret; if (picture->pSourcePict->type == SourcePictTypeLinear) return gen4_channel_init_linear(sna, picture, channel, x, y, w, h, dst_x, dst_y); DBG(("%s -- fixup, gradient\n", __FUNCTION__)); ret = -1; if (!precise) ret = sna_render_picture_approximate_gradient(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (ret == -1) ret = sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); return ret; } if (picture->alphaMap) { DBG(("%s -- fallback, alphamap\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } if (!gen4_check_repeat(picture)) { DBG(("%s: unknown repeat mode fixup\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } if (!gen4_check_filter(picture)) { DBG(("%s: unhandled filter fixup\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } channel->repeat = picture->repeat ? picture->repeatType : RepeatNone; channel->filter = picture->filter; pixmap = get_drawable_pixmap(picture->pDrawable); get_drawable_deltas(picture->pDrawable, pixmap, &dx, &dy); x += dx + picture->pDrawable->x; y += dy + picture->pDrawable->y; channel->is_affine = sna_transform_is_affine(picture->transform); if (sna_transform_is_imprecise_integer_translation(picture->transform, picture->filter, precise, &dx, &dy)) { DBG(("%s: integer translation (%d, %d), removing\n", __FUNCTION__, dx, dy)); x += dx; y += dy; channel->transform = NULL; channel->filter = PictFilterNearest; if (channel->repeat && (x >= 0 && y >= 0 && x + w < pixmap->drawable.width && y + h < pixmap->drawable.height)) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv && priv->clear) { DBG(("%s: converting large pixmap source into solid [%08x]\n", __FUNCTION__, priv->clear_color)); return gen4_channel_init_solid(sna, channel, priv->clear_color); } } } else channel->transform = picture->transform; channel->pict_format = picture->format; channel->card_format = gen4_get_card_format(picture->format); if (channel->card_format == -1) return sna_render_picture_convert(sna, picture, channel, pixmap, x, y, w, h, dst_x, dst_y, false); if (too_large(pixmap->drawable.width, pixmap->drawable.height)) return sna_render_picture_extract(sna, picture, channel, x, y, w, h, dst_x, dst_y); return sna_render_pixmap_bo(sna, channel, pixmap, x, y, w, h, dst_x, dst_y); } static void gen4_composite_channel_convert(struct sna_composite_channel *channel) { DBG(("%s: repeat %d -> %d, filter %d -> %d\n", __FUNCTION__, channel->repeat, gen4_repeat(channel->repeat), channel->filter, gen4_repeat(channel->filter))); channel->repeat = gen4_repeat(channel->repeat); channel->filter = gen4_filter(channel->filter); if (channel->card_format == (unsigned)-1) channel->card_format = gen4_get_card_format(channel->pict_format); } static void gen4_render_composite_done(struct sna *sna, const struct sna_composite_op *op) { DBG(("%s()\n", __FUNCTION__)); if (sna->render.vertex_offset) { gen4_vertex_flush(sna); gen4_magic_ca_pass(sna, op); } if (op->mask.bo) kgem_bo_destroy(&sna->kgem, op->mask.bo); if (op->src.bo) kgem_bo_destroy(&sna->kgem, op->src.bo); sna_render_composite_redirect_done(sna, op); } static bool gen4_composite_set_target(struct sna *sna, struct sna_composite_op *op, PicturePtr dst, int x, int y, int w, int h, bool partial) { BoxRec box; unsigned hint; op->dst.pixmap = get_drawable_pixmap(dst->pDrawable); op->dst.width = op->dst.pixmap->drawable.width; op->dst.height = op->dst.pixmap->drawable.height; op->dst.format = dst->format; if (w && h) { box.x1 = x; box.y1 = y; box.x2 = x + w; box.y2 = y + h; } else sna_render_picture_extents(dst, &box); hint = PREFER_GPU | FORCE_GPU | RENDER_GPU; if (!partial) { hint |= IGNORE_DAMAGE; if (w == op->dst.width && h == op->dst.height) hint |= REPLACES; } op->dst.bo = sna_drawable_use_bo(dst->pDrawable, hint, &box, &op->damage); if (op->dst.bo == NULL) return false; if (hint & REPLACES) { struct sna_pixmap *priv = sna_pixmap(op->dst.pixmap); kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); } get_drawable_deltas(dst->pDrawable, op->dst.pixmap, &op->dst.x, &op->dst.y); DBG(("%s: pixmap=%ld, format=%08x, size=%dx%d, pitch=%d, delta=(%d,%d),damage=%p\n", __FUNCTION__, op->dst.pixmap->drawable.serialNumber, (int)op->dst.format, op->dst.width, op->dst.height, op->dst.bo->pitch, op->dst.x, op->dst.y, op->damage ? *op->damage : (void *)-1)); assert(op->dst.bo->proxy == NULL); if (too_large(op->dst.width, op->dst.height) && !sna_render_composite_redirect(sna, op, x, y, w, h, partial)) return false; return true; } static bool check_gradient(PicturePtr picture, bool precise) { switch (picture->pSourcePict->type) { case SourcePictTypeSolidFill: case SourcePictTypeLinear: return false; default: return precise; } } static bool has_alphamap(PicturePtr p) { return p->alphaMap != NULL; } static bool need_upload(struct sna *sna, PicturePtr p) { return p->pDrawable && untransformed(p) && !is_gpu(sna, p->pDrawable, PREFER_GPU_RENDER); } static bool source_is_busy(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv == NULL) return false; if (priv->clear) return false; if (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo)) return true; if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; return priv->gpu_damage && !priv->cpu_damage; } static bool source_fallback(struct sna *sna, PicturePtr p, PixmapPtr pixmap, bool precise) { if (sna_picture_is_solid(p, NULL)) return false; if (p->pSourcePict) return check_gradient(p, precise); if (!gen4_check_repeat(p) || !gen4_check_format(p->format)) return true; /* soft errors: perfer to upload/compute rather than readback */ if (pixmap && source_is_busy(pixmap)) return false; return has_alphamap(p) || !gen4_check_filter(p) || need_upload(sna, p); } static bool gen4_composite_fallback(struct sna *sna, PicturePtr src, PicturePtr mask, PicturePtr dst) { PixmapPtr src_pixmap; PixmapPtr mask_pixmap; PixmapPtr dst_pixmap; bool src_fallback, mask_fallback; if (!gen4_check_dst_format(dst->format)) { DBG(("%s: unknown destination format: %d\n", __FUNCTION__, dst->format)); return true; } dst_pixmap = get_drawable_pixmap(dst->pDrawable); src_pixmap = src->pDrawable ? get_drawable_pixmap(src->pDrawable) : NULL; src_fallback = source_fallback(sna, src, src_pixmap, dst->polyMode == PolyModePrecise); if (mask) { mask_pixmap = mask->pDrawable ? get_drawable_pixmap(mask->pDrawable) : NULL; mask_fallback = source_fallback(sna, mask, mask_pixmap, dst->polyMode == PolyModePrecise); } else { mask_pixmap = NULL; mask_fallback = false; } /* If we are using the destination as a source and need to * readback in order to upload the source, do it all * on the cpu. */ if (src_pixmap == dst_pixmap && src_fallback) { DBG(("%s: src is dst and will fallback\n",__FUNCTION__)); return true; } if (mask_pixmap == dst_pixmap && mask_fallback) { DBG(("%s: mask is dst and will fallback\n",__FUNCTION__)); return true; } /* If anything is on the GPU, push everything out to the GPU */ if (dst_use_gpu(dst_pixmap)) { DBG(("%s: dst is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (src_pixmap && !src_fallback) { DBG(("%s: src is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (mask_pixmap && !mask_fallback) { DBG(("%s: mask is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } /* However if the dst is not on the GPU and we need to * render one of the sources using the CPU, we may * as well do the entire operation in place onthe CPU. */ if (src_fallback) { DBG(("%s: dst is on the CPU and src will fallback\n", __FUNCTION__)); return true; } if (mask_fallback) { DBG(("%s: dst is on the CPU and mask will fallback\n", __FUNCTION__)); return true; } if (too_large(dst_pixmap->drawable.width, dst_pixmap->drawable.height) && dst_is_cpu(dst_pixmap)) { DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__)); return true; } DBG(("%s: dst is not on the GPU and the operation should not fallback\n", __FUNCTION__)); return dst_use_cpu(dst_pixmap); } static int reuse_source(struct sna *sna, PicturePtr src, struct sna_composite_channel *sc, int src_x, int src_y, PicturePtr mask, struct sna_composite_channel *mc, int msk_x, int msk_y) { uint32_t color; if (src_x != msk_x || src_y != msk_y) return false; if (src == mask) { DBG(("%s: mask is source\n", __FUNCTION__)); *mc = *sc; mc->bo = kgem_bo_reference(mc->bo); return true; } if (sna_picture_is_solid(mask, &color)) return gen4_channel_init_solid(sna, mc, color); if (sc->is_solid) return false; if (src->pDrawable == NULL || mask->pDrawable != src->pDrawable) return false; DBG(("%s: mask reuses source drawable\n", __FUNCTION__)); if (!sna_transform_equal(src->transform, mask->transform)) return false; if (!sna_picture_alphamap_equal(src, mask)) return false; if (!gen4_check_repeat(mask)) return false; if (!gen4_check_filter(mask)) return false; if (!gen4_check_format(mask->format)) return false; DBG(("%s: reusing source channel for mask with a twist\n", __FUNCTION__)); *mc = *sc; mc->repeat = gen4_repeat(mask->repeat ? mask->repeatType : RepeatNone); mc->filter = gen4_filter(mask->filter); mc->pict_format = mask->format; mc->card_format = gen4_get_card_format(mask->format); mc->bo = kgem_bo_reference(mc->bo); return true; } static bool gen4_render_composite(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr mask, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t msk_x, int16_t msk_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_op *tmp) { DBG(("%s: %dx%d, current mode=%d\n", __FUNCTION__, width, height, sna->kgem.mode)); if (op >= ARRAY_SIZE(gen4_blend_op)) return false; if (mask == NULL && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp)) return true; if (gen4_composite_fallback(sna, src, mask, dst)) goto fallback; if (need_tiling(sna, width, height)) return sna_tiling_composite(op, src, mask, dst, src_x, src_y, msk_x, msk_y, dst_x, dst_y, width, height, tmp); if (!gen4_composite_set_target(sna, tmp, dst, dst_x, dst_y, width, height, flags & COMPOSITE_PARTIAL || op > PictOpSrc)) { DBG(("%s: failed to set composite target\n", __FUNCTION__)); goto fallback; } tmp->op = op; switch (gen4_composite_picture(sna, src, &tmp->src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: DBG(("%s: failed to prepare source\n", __FUNCTION__)); goto cleanup_dst; case 0: if (!gen4_channel_init_solid(sna, &tmp->src, 0)) goto cleanup_dst; /* fall through to fixup */ case 1: if (mask == NULL && sna_blt_composite__convert(sna, dst_x, dst_y, width, height, tmp)) return true; gen4_composite_channel_convert(&tmp->src); break; } tmp->is_affine = tmp->src.is_affine; tmp->has_component_alpha = false; tmp->need_magic_ca_pass = false; if (mask) { if (mask->componentAlpha && PICT_FORMAT_RGB(mask->format)) { tmp->has_component_alpha = true; /* Check if it's component alpha that relies on a source alpha and on * the source value. We can only get one of those into the single * source value that we get to blend with. */ if (gen4_blend_op[op].src_alpha && (gen4_blend_op[op].src_blend != GEN4_BLENDFACTOR_ZERO)) { if (op != PictOpOver) { DBG(("%s -- fallback: unhandled component alpha blend\n", __FUNCTION__)); goto cleanup_src; } tmp->need_magic_ca_pass = true; tmp->op = PictOpOutReverse; } } if (!reuse_source(sna, src, &tmp->src, src_x, src_y, mask, &tmp->mask, msk_x, msk_y)) { switch (gen4_composite_picture(sna, mask, &tmp->mask, msk_x, msk_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: DBG(("%s: failed to prepare mask\n", __FUNCTION__)); goto cleanup_src; case 0: if (!gen4_channel_init_solid(sna, &tmp->mask, 0)) goto cleanup_src; /* fall through to fixup */ case 1: gen4_composite_channel_convert(&tmp->mask); break; } } tmp->is_affine &= tmp->mask.is_affine; } tmp->u.gen4.wm_kernel = gen4_choose_composite_kernel(tmp->op, tmp->mask.bo != NULL, tmp->has_component_alpha, tmp->is_affine); tmp->u.gen4.ve_id = gen4_choose_composite_emitter(sna, tmp); tmp->blt = gen4_render_composite_blt; tmp->box = gen4_render_composite_box; tmp->boxes = gen4_render_composite_boxes__blt; if (tmp->emit_boxes) { tmp->boxes = gen4_render_composite_boxes; #if !FORCE_FLUSH tmp->thread_boxes = gen4_render_composite_boxes__thread; #endif } tmp->done = gen4_render_composite_done; if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) goto cleanup_mask; } gen4_align_vertex(sna, tmp); gen4_bind_surfaces(sna, tmp); return true; cleanup_mask: if (tmp->mask.bo) { kgem_bo_destroy(&sna->kgem, tmp->mask.bo); tmp->mask.bo = NULL; } cleanup_src: if (tmp->src.bo) { kgem_bo_destroy(&sna->kgem, tmp->src.bo); tmp->src.bo = NULL; } cleanup_dst: if (tmp->redirect.real_bo) { kgem_bo_destroy(&sna->kgem, tmp->dst.bo); tmp->redirect.real_bo = NULL; } fallback: return (mask == NULL && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags | COMPOSITE_FALLBACK, tmp)); } #if !NO_COMPOSITE_SPANS fastcall static void gen4_render_composite_spans_box(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { DBG(("%s: src=+(%d, %d), opacity=%f, dst=+(%d, %d), box=(%d, %d) x (%d, %d)\n", __FUNCTION__, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); gen4_get_rectangles(sna, &op->base, 1, gen4_bind_surfaces); op->prim_emit(sna, op, box, opacity); } static void gen4_render_composite_spans_boxes(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, int nbox, float opacity) { DBG(("%s: nbox=%d, src=+(%d, %d), opacity=%f, dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y)); do { int nbox_this_time; nbox_this_time = gen4_get_rectangles(sna, &op->base, nbox, gen4_bind_surfaces); nbox -= nbox_this_time; do { DBG((" %s: (%d, %d) x (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); op->prim_emit(sna, op, box++, opacity); } while (--nbox_this_time); } while (nbox); } fastcall static void gen4_render_composite_spans_boxes__thread(struct sna *sna, const struct sna_composite_spans_op *op, const struct sna_opacity_box *box, int nbox) { DBG(("%s: nbox=%d, src=+(%d, %d), dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], op->base.dst.x, op->base.dst.y)); assert(nbox); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen4_get_rectangles(sna, &op->base, nbox, gen4_bind_surfaces); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->base.floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } fastcall static void gen4_render_composite_spans_done(struct sna *sna, const struct sna_composite_spans_op *op) { if (sna->render.vertex_offset) gen4_vertex_flush(sna); DBG(("%s()\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, op->base.src.bo); sna_render_composite_redirect_done(sna, &op->base); } static bool gen4_check_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t width, int16_t height, unsigned flags) { DBG(("%s: op=%d, width=%d, height=%d, flags=%x\n", __FUNCTION__, op, width, height, flags)); if (op >= ARRAY_SIZE(gen4_blend_op)) return false; if (gen4_composite_fallback(sna, src, NULL, dst)) { DBG(("%s: operation would fallback\n", __FUNCTION__)); return false; } if (need_tiling(sna, width, height) && !is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS)) { DBG(("%s: fallback, tiled operation not on GPU\n", __FUNCTION__)); return false; } if (FORCE_SPANS) return FORCE_SPANS > 0; if ((flags & COMPOSITE_SPANS_RECTILINEAR) == 0) { struct sna_pixmap *priv; if (FORCE_NONRECTILINEAR_SPANS) return FORCE_NONRECTILINEAR_SPANS > 0; if ((sna->render.prefer_gpu & PREFER_GPU_SPANS) == 0) return false; priv = sna_pixmap_from_drawable(dst->pDrawable); assert(priv); if (priv->cpu_bo && __kgem_bo_is_busy(&sna->kgem, priv->cpu_bo)) return true; if (flags & COMPOSITE_SPANS_INPLACE_HINT) return false; return priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo); } return true; } static bool gen4_render_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_spans_op *tmp) { DBG(("%s: %dx%d with flags=%x, current mode=%d\n", __FUNCTION__, width, height, flags, sna->kgem.ring)); assert(gen4_check_composite_spans(sna, op, src, dst, width, height, flags)); if (need_tiling(sna, width, height)) { DBG(("%s: tiling, operation (%dx%d) too wide for pipeline\n", __FUNCTION__, width, height)); return sna_tiling_composite_spans(op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp); } tmp->base.op = op; if (!gen4_composite_set_target(sna, &tmp->base, dst, dst_x, dst_y, width, height, true)) return false; switch (gen4_composite_picture(sna, src, &tmp->base.src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_dst; case 0: if (!gen4_channel_init_solid(sna, &tmp->base.src, 0)) goto cleanup_dst; /* fall through to fixup */ case 1: gen4_composite_channel_convert(&tmp->base.src); break; } tmp->base.mask.bo = NULL; tmp->base.mask.filter = SAMPLER_FILTER_NEAREST; tmp->base.mask.repeat = SAMPLER_EXTEND_NONE; tmp->base.is_affine = tmp->base.src.is_affine; tmp->base.has_component_alpha = false; tmp->base.need_magic_ca_pass = false; tmp->base.u.gen4.ve_id = gen4_choose_spans_emitter(sna, tmp); tmp->base.u.gen4.wm_kernel = WM_KERNEL_OPACITY | !tmp->base.is_affine; tmp->box = gen4_render_composite_spans_box; tmp->boxes = gen4_render_composite_spans_boxes; if (tmp->emit_boxes) tmp->thread_boxes = gen4_render_composite_spans_boxes__thread; tmp->done = gen4_render_composite_spans_done; if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) goto cleanup_src; } gen4_align_vertex(sna, &tmp->base); gen4_bind_surfaces(sna, &tmp->base); return true; cleanup_src: if (tmp->base.src.bo) kgem_bo_destroy(&sna->kgem, tmp->base.src.bo); cleanup_dst: if (tmp->base.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp->base.dst.bo); return false; } #endif static void gen4_copy_bind_surfaces(struct sna *sna, const struct sna_composite_op *op) { uint32_t *binding_table; uint16_t offset, dirty; gen4_get_batch(sna, op); dirty = kgem_bo_is_dirty(op->dst.bo); binding_table = gen4_composite_get_binding_table(sna, &offset); binding_table[0] = gen4_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen4_get_dest_format(op->dst.format), true); binding_table[1] = gen4_bind_bo(sna, op->src.bo, op->src.width, op->src.height, op->src.card_format, false); if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen4.surface_table) == *(uint64_t*)binding_table) { sna->kgem.surface += sizeof(struct gen4_surface_state_padded) / sizeof(uint32_t); offset = sna->render_state.gen4.surface_table; } if (!ALWAYS_FLUSH && sna->kgem.batch[sna->render_state.gen4.surface_table] == binding_table[0]) dirty = 0; gen4_emit_state(sna, op, offset | dirty); } static void gen4_render_copy_one(struct sna *sna, const struct sna_composite_op *op, int sx, int sy, int w, int h, int dx, int dy) { gen4_get_rectangles(sna, op, 1, gen4_copy_bind_surfaces); OUT_VERTEX(dx+w, dy+h); OUT_VERTEX_F((sx+w)*op->src.scale[0]); OUT_VERTEX_F((sy+h)*op->src.scale[1]); OUT_VERTEX(dx, dy+h); OUT_VERTEX_F(sx*op->src.scale[0]); OUT_VERTEX_F((sy+h)*op->src.scale[1]); OUT_VERTEX(dx, dy); OUT_VERTEX_F(sx*op->src.scale[0]); OUT_VERTEX_F(sy*op->src.scale[1]); } static bool gen4_render_copy_boxes(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, unsigned flags) { struct sna_composite_op tmp; DBG(("%s x %d\n", __FUNCTION__, n)); if (sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; if (!(alu == GXcopy || alu == GXclear) || src_bo == dst_bo) { fallback_blt: if (!sna_blt_compare_depth(src, dst)) return false; return sna_blt_copy_boxes_fallback(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } memset(&tmp, 0, sizeof(tmp)); DBG(("%s (%d, %d)->(%d, %d) x %d\n", __FUNCTION__, src_dx, src_dy, dst_dx, dst_dy, n)); if (dst->depth == src->depth) { tmp.dst.format = sna_render_format_for_depth(dst->depth); tmp.src.pict_format = tmp.dst.format; } else { tmp.dst.format = sna_format_for_depth(dst->depth); tmp.src.pict_format = sna_format_for_depth(src->depth); } if (!gen4_check_format(tmp.src.pict_format)) goto fallback_blt; tmp.op = alu == GXcopy ? PictOpSrc : PictOpClear; tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.x = tmp.dst.y = 0; tmp.dst.bo = dst_bo; tmp.damage = NULL; sna_render_composite_redirect_init(&tmp); if (too_large(tmp.dst.width, tmp.dst.height)) { BoxRec extents = box[0]; int i; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_composite_redirect(sna, &tmp, extents.x1 + dst_dx, extents.y1 + dst_dy, extents.x2 - extents.x1, extents.y2 - extents.y1, n > 1)) goto fallback_tiled; } tmp.src.filter = SAMPLER_FILTER_NEAREST; tmp.src.repeat = SAMPLER_EXTEND_NONE; tmp.src.card_format = gen4_get_card_format(tmp.src.pict_format); if (too_large(src->width, src->height)) { BoxRec extents = box[0]; int i; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_pixmap_partial(sna, src, src_bo, &tmp.src, extents.x1 + src_dx, extents.y1 + src_dy, extents.x2 - extents.x1, extents.y2 - extents.y1)) goto fallback_tiled_dst; } else { tmp.src.bo = kgem_bo_reference(src_bo); tmp.src.width = src->width; tmp.src.height = src->height; tmp.src.offset[0] = tmp.src.offset[1] = 0; tmp.src.scale[0] = 1.f/src->width; tmp.src.scale[1] = 1.f/src->height; } tmp.is_affine = true; tmp.floats_per_vertex = 3; tmp.floats_per_rect = 9; tmp.u.gen4.wm_kernel = WM_KERNEL; tmp.u.gen4.ve_id = 2; if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); if (tmp.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp.dst.bo); goto fallback_blt; } } dst_dx += tmp.dst.x; dst_dy += tmp.dst.y; tmp.dst.x = tmp.dst.y = 0; src_dx += tmp.src.offset[0]; src_dy += tmp.src.offset[1]; gen4_align_vertex(sna, &tmp); gen4_copy_bind_surfaces(sna, &tmp); do { gen4_render_copy_one(sna, &tmp, box->x1 + src_dx, box->y1 + src_dy, box->x2 - box->x1, box->y2 - box->y1, box->x1 + dst_dx, box->y1 + dst_dy); box++; } while (--n); gen4_vertex_flush(sna); sna_render_composite_redirect_done(sna, &tmp); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; fallback_tiled_dst: if (tmp.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp.dst.bo); fallback_tiled: if (sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; return sna_tiling_copy_boxes(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } static void gen4_render_copy_blt(struct sna *sna, const struct sna_copy_op *op, int16_t sx, int16_t sy, int16_t w, int16_t h, int16_t dx, int16_t dy) { gen4_render_copy_one(sna, &op->base, sx, sy, w, h, dx, dy); } static void gen4_render_copy_done(struct sna *sna, const struct sna_copy_op *op) { if (sna->render.vertex_offset) gen4_vertex_flush(sna); } static bool gen4_render_copy(struct sna *sna, uint8_t alu, PixmapPtr src, struct kgem_bo *src_bo, PixmapPtr dst, struct kgem_bo *dst_bo, struct sna_copy_op *op) { DBG(("%s: src=%ld, dst=%ld, alu=%d\n", __FUNCTION__, src->drawable.serialNumber, dst->drawable.serialNumber, alu)); if (sna_blt_compare_depth(&src->drawable, &dst->drawable) && sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op)) return true; if (!(alu == GXcopy || alu == GXclear) || src_bo == dst_bo || too_large(src->drawable.width, src->drawable.height) || too_large(dst->drawable.width, dst->drawable.height)) { fallback: if (!sna_blt_compare_depth(&src->drawable, &dst->drawable)) return false; return sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op); } if (dst->drawable.depth == src->drawable.depth) { op->base.dst.format = sna_render_format_for_depth(dst->drawable.depth); op->base.src.pict_format = op->base.dst.format; } else { op->base.dst.format = sna_format_for_depth(dst->drawable.depth); op->base.src.pict_format = sna_format_for_depth(src->drawable.depth); } if (!gen4_check_format(op->base.src.pict_format)) goto fallback; op->base.op = alu == GXcopy ? PictOpSrc : PictOpClear; op->base.dst.pixmap = dst; op->base.dst.width = dst->drawable.width; op->base.dst.height = dst->drawable.height; op->base.dst.bo = dst_bo; op->base.src.bo = src_bo; op->base.src.card_format = gen4_get_card_format(op->base.src.pict_format); op->base.src.width = src->drawable.width; op->base.src.height = src->drawable.height; op->base.src.scale[0] = 1.f/src->drawable.width; op->base.src.scale[1] = 1.f/src->drawable.height; op->base.src.filter = SAMPLER_FILTER_NEAREST; op->base.src.repeat = SAMPLER_EXTEND_NONE; op->base.is_affine = true; op->base.floats_per_vertex = 3; op->base.floats_per_rect = 9; op->base.u.gen4.wm_kernel = WM_KERNEL; op->base.u.gen4.ve_id = 2; if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) goto fallback; } if (kgem_bo_is_dirty(src_bo)) { if (sna_blt_compare_depth(&src->drawable, &dst->drawable) && sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op)) return true; } gen4_align_vertex(sna, &op->base); gen4_copy_bind_surfaces(sna, &op->base); op->blt = gen4_render_copy_blt; op->done = gen4_render_copy_done; return true; } static void gen4_render_fill_rectangle(struct sna *sna, const struct sna_composite_op *op, int x, int y, int w, int h) { gen4_get_rectangles(sna, op, 1, gen4_bind_surfaces); OUT_VERTEX(x+w, y+h); OUT_VERTEX_F(.5); OUT_VERTEX(x, y+h); OUT_VERTEX_F(.5); OUT_VERTEX(x, y); OUT_VERTEX_F(.5); } static bool gen4_render_fill_boxes(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n) { struct sna_composite_op tmp; uint32_t pixel; if (op >= ARRAY_SIZE(gen4_blend_op)) { DBG(("%s: fallback due to unhandled blend op: %d\n", __FUNCTION__, op)); return false; } if (op <= PictOpSrc) { uint8_t alu = GXinvalid; pixel = 0; if (op == PictOpClear) alu = GXclear; else if (sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, format)) alu = GXcopy; if (alu != GXinvalid && sna_blt_fill_boxes(sna, alu, dst_bo, dst->bitsPerPixel, pixel, box, n)) return true; if (!gen4_check_dst_format(format)) return false; if (too_large(dst->width, dst->height)) return sna_tiling_fill_boxes(sna, op, format, color, dst, dst_bo, box, n); } if (op == PictOpClear) { pixel = 0; op = PictOpSrc; } else if (!sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, PICT_a8r8g8b8)) return false; DBG(("%s(%08x x %d)\n", __FUNCTION__, pixel, n)); memset(&tmp, 0, sizeof(tmp)); tmp.op = op; tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.format = format; tmp.dst.bo = dst_bo; gen4_channel_init_solid(sna, &tmp.src, pixel); tmp.is_affine = true; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.u.gen4.wm_kernel = WM_KERNEL; tmp.u.gen4.ve_id = 1; if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) return false; } gen4_align_vertex(sna, &tmp); gen4_bind_surfaces(sna, &tmp); do { gen4_render_fill_rectangle(sna, &tmp, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; } static void gen4_render_fill_op_blt(struct sna *sna, const struct sna_fill_op *op, int16_t x, int16_t y, int16_t w, int16_t h) { gen4_render_fill_rectangle(sna, &op->base, x, y, w, h); } fastcall static void gen4_render_fill_op_box(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box) { gen4_render_fill_rectangle(sna, &op->base, box->x1, box->y1, box->x2-box->x1, box->y2-box->y1); } fastcall static void gen4_render_fill_op_boxes(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box, int nbox) { do { gen4_render_fill_rectangle(sna, &op->base, box->x1, box->y1, box->x2-box->x1, box->y2-box->y1); box++; } while (--nbox); } static void gen4_render_fill_op_done(struct sna *sna, const struct sna_fill_op *op) { if (sna->render.vertex_offset) gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, op->base.src.bo); } static bool gen4_render_fill(struct sna *sna, uint8_t alu, PixmapPtr dst, struct kgem_bo *dst_bo, uint32_t color, unsigned flags, struct sna_fill_op *op) { if (sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, op)) return true; if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height)) return sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, op); if (alu == GXclear) color = 0; op->base.op = color == 0 ? PictOpClear : PictOpSrc; op->base.dst.pixmap = dst; op->base.dst.width = dst->drawable.width; op->base.dst.height = dst->drawable.height; op->base.dst.format = sna_format_for_depth(dst->drawable.depth); op->base.dst.bo = dst_bo; op->base.dst.x = op->base.dst.y = 0; op->base.need_magic_ca_pass = 0; op->base.has_component_alpha = 0; gen4_channel_init_solid(sna, &op->base.src, sna_rgba_for_color(color, dst->drawable.depth)); op->base.mask.bo = NULL; op->base.is_affine = true; op->base.floats_per_vertex = 2; op->base.floats_per_rect = 6; op->base.u.gen4.wm_kernel = WM_KERNEL; op->base.u.gen4.ve_id = 1; if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_bo_destroy(&sna->kgem, op->base.src.bo); return false; } } gen4_align_vertex(sna, &op->base); gen4_bind_surfaces(sna, &op->base); op->blt = gen4_render_fill_op_blt; op->box = gen4_render_fill_op_box; op->boxes = gen4_render_fill_op_boxes; op->points = NULL; op->done = gen4_render_fill_op_done; return true; } static bool gen4_render_fill_one_try_blt(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { BoxRec box; box.x1 = x1; box.y1 = y1; box.x2 = x2; box.y2 = y2; return sna_blt_fill_boxes(sna, alu, bo, dst->drawable.bitsPerPixel, color, &box, 1); } static bool gen4_render_fill_one(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { struct sna_composite_op tmp; DBG(("%s: color=%08x\n", __FUNCTION__, color)); if (gen4_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu)) return true; /* Must use the BLT if we can't RENDER... */ if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height)) return false; if (alu == GXclear) color = 0; tmp.op = color == 0 ? PictOpClear : PictOpSrc; tmp.dst.pixmap = dst; tmp.dst.width = dst->drawable.width; tmp.dst.height = dst->drawable.height; tmp.dst.format = sna_format_for_depth(dst->drawable.depth); tmp.dst.bo = bo; tmp.dst.x = tmp.dst.y = 0; gen4_channel_init_solid(sna, &tmp.src, sna_rgba_for_color(color, dst->drawable.depth)); tmp.mask.bo = NULL; tmp.mask.filter = SAMPLER_FILTER_NEAREST; tmp.mask.repeat = SAMPLER_EXTEND_NONE; tmp.is_affine = true; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.has_component_alpha = false; tmp.need_magic_ca_pass = false; tmp.u.gen4.wm_kernel = WM_KERNEL; tmp.u.gen4.ve_id = 1; if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); return false; } } gen4_align_vertex(sna, &tmp); gen4_bind_surfaces(sna, &tmp); gen4_render_fill_rectangle(sna, &tmp, x1, y1, x2 - x1, y2 - y1); gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; } static void gen4_render_reset(struct sna *sna) { sna->render_state.gen4.needs_invariant = true; sna->render_state.gen4.needs_urb = true; sna->render_state.gen4.ve_id = -1; sna->render_state.gen4.last_primitive = -1; sna->render_state.gen4.last_pipelined_pointers = -1; sna->render_state.gen4.drawrect_offset = -1; sna->render_state.gen4.drawrect_limit = -1; sna->render_state.gen4.surface_table = 0; if (sna->render.vbo && !kgem_bo_can_map(&sna->kgem, sna->render.vbo)) { DBG(("%s: discarding unmappable vbo\n", __FUNCTION__)); discard_vbo(sna); } sna->render.vertex_offset = 0; sna->render.nvertex_reloc = 0; sna->render.vb_id = 0; } static void gen4_render_fini(struct sna *sna) { kgem_bo_destroy(&sna->kgem, sna->render_state.gen4.general_bo); } static uint32_t gen4_create_vs_unit_state(struct sna_static_stream *stream) { struct gen4_vs_unit_state *vs = sna_static_stream_map(stream, sizeof(*vs), 32); /* Set up the vertex shader to be disabled (passthrough) */ vs->thread4.nr_urb_entries = URB_VS_ENTRIES; vs->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1; vs->vs6.vs_enable = 0; vs->vs6.vert_cache_disable = 1; return sna_static_stream_offsetof(stream, vs); } static uint32_t gen4_create_sf_state(struct sna_static_stream *stream, uint32_t kernel) { struct gen4_sf_unit_state *sf; sf = sna_static_stream_map(stream, sizeof(*sf), 32); sf->thread0.grf_reg_count = GEN4_GRF_BLOCKS(SF_KERNEL_NUM_GRF); sf->thread0.kernel_start_pointer = kernel >> 6; sf->thread3.const_urb_entry_read_length = 0; /* no const URBs */ sf->thread3.const_urb_entry_read_offset = 0; /* no const URBs */ sf->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */ /* don't smash vertex header, read start from dw8 */ sf->thread3.urb_entry_read_offset = 1; sf->thread3.dispatch_grf_start_reg = 3; sf->thread4.max_threads = GEN4_MAX_SF_THREADS - 1; sf->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1; sf->thread4.nr_urb_entries = URB_SF_ENTRIES; sf->sf5.viewport_transform = false; /* skip viewport */ sf->sf6.cull_mode = GEN4_CULLMODE_NONE; sf->sf6.scissor = 0; sf->sf7.trifan_pv = 2; sf->sf6.dest_org_vbias = 0x8; sf->sf6.dest_org_hbias = 0x8; return sna_static_stream_offsetof(stream, sf); } static uint32_t gen4_create_sampler_state(struct sna_static_stream *stream, sampler_filter_t src_filter, sampler_extend_t src_extend, sampler_filter_t mask_filter, sampler_extend_t mask_extend) { struct gen4_sampler_state *sampler_state; sampler_state = sna_static_stream_map(stream, sizeof(struct gen4_sampler_state) * 2, 32); sampler_state_init(&sampler_state[0], src_filter, src_extend); sampler_state_init(&sampler_state[1], mask_filter, mask_extend); return sna_static_stream_offsetof(stream, sampler_state); } static void gen4_init_wm_state(struct gen4_wm_unit_state *wm, int gen, bool has_mask, uint32_t kernel, uint32_t sampler) { assert((kernel & 63) == 0); wm->thread0.kernel_start_pointer = kernel >> 6; wm->thread0.grf_reg_count = GEN4_GRF_BLOCKS(PS_KERNEL_NUM_GRF); wm->thread1.single_program_flow = 0; wm->thread3.const_urb_entry_read_length = 0; wm->thread3.const_urb_entry_read_offset = 0; wm->thread3.urb_entry_read_offset = 0; wm->thread3.dispatch_grf_start_reg = 3; assert((sampler & 31) == 0); wm->wm4.sampler_state_pointer = sampler >> 5; wm->wm4.sampler_count = 1; wm->wm5.max_threads = gen >= 045 ? G4X_MAX_WM_THREADS - 1 : GEN4_MAX_WM_THREADS - 1; wm->wm5.transposed_urb_read = 0; wm->wm5.thread_dispatch_enable = 1; /* just use 16-pixel dispatch (4 subspans), don't need to change kernel * start point */ wm->wm5.enable_16_pix = 1; wm->wm5.enable_8_pix = 0; wm->wm5.early_depth_test = 1; /* Each pair of attributes (src/mask coords) is two URB entries */ if (has_mask) { wm->thread1.binding_table_entry_count = 3; wm->thread3.urb_entry_read_length = 4; } else { wm->thread1.binding_table_entry_count = 2; wm->thread3.urb_entry_read_length = 2; } } static uint32_t gen4_create_cc_unit_state(struct sna_static_stream *stream) { uint8_t *ptr, *base; int i, j; base = ptr = sna_static_stream_map(stream, GEN4_BLENDFACTOR_COUNT*GEN4_BLENDFACTOR_COUNT*64, 64); for (i = 0; i < GEN4_BLENDFACTOR_COUNT; i++) { for (j = 0; j < GEN4_BLENDFACTOR_COUNT; j++) { struct gen4_cc_unit_state *state = (struct gen4_cc_unit_state *)ptr; state->cc3.blend_enable = !(j == GEN4_BLENDFACTOR_ZERO && i == GEN4_BLENDFACTOR_ONE); state->cc5.logicop_func = 0xc; /* COPY */ state->cc5.ia_blend_function = GEN4_BLENDFUNCTION_ADD; /* Fill in alpha blend factors same as color, for the future. */ state->cc5.ia_src_blend_factor = i; state->cc5.ia_dest_blend_factor = j; state->cc6.blend_function = GEN4_BLENDFUNCTION_ADD; state->cc6.clamp_post_alpha_blend = 1; state->cc6.clamp_pre_alpha_blend = 1; state->cc6.src_blend_factor = i; state->cc6.dest_blend_factor = j; ptr += 64; } } return sna_static_stream_offsetof(stream, base); } static bool gen4_render_setup(struct sna *sna) { struct gen4_render_state *state = &sna->render_state.gen4; struct sna_static_stream general; struct gen4_wm_unit_state_padded *wm_state; uint32_t sf, wm[KERNEL_COUNT]; int i, j, k, l, m; sna_static_stream_init(&general); /* Zero pad the start. If you see an offset of 0x0 in the batchbuffer * dumps, you know it points to zero. */ null_create(&general); sf = sna_static_stream_compile_sf(sna, &general, brw_sf_kernel__mask); for (m = 0; m < KERNEL_COUNT; m++) { if (wm_kernels[m].size) { wm[m] = sna_static_stream_add(&general, wm_kernels[m].data, wm_kernels[m].size, 64); } else { wm[m] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 16); } } state->vs = gen4_create_vs_unit_state(&general); state->sf = gen4_create_sf_state(&general, sf); wm_state = sna_static_stream_map(&general, sizeof(*wm_state) * KERNEL_COUNT * FILTER_COUNT * EXTEND_COUNT * FILTER_COUNT * EXTEND_COUNT, 64); state->wm = sna_static_stream_offsetof(&general, wm_state); for (i = 0; i < FILTER_COUNT; i++) { for (j = 0; j < EXTEND_COUNT; j++) { for (k = 0; k < FILTER_COUNT; k++) { for (l = 0; l < EXTEND_COUNT; l++) { uint32_t sampler_state; sampler_state = gen4_create_sampler_state(&general, i, j, k, l); for (m = 0; m < KERNEL_COUNT; m++) { gen4_init_wm_state(&wm_state->state, sna->kgem.gen, wm_kernels[m].has_mask, wm[m], sampler_state); wm_state++; } } } } } state->cc = gen4_create_cc_unit_state(&general); state->general_bo = sna_static_stream_fini(sna, &general); return state->general_bo != NULL; } const char *gen4_render_init(struct sna *sna, const char *backend) { if (!gen4_render_setup(sna)) return backend; sna->kgem.retire = gen4_render_retire; sna->kgem.expire = gen4_render_expire; #if !NO_COMPOSITE sna->render.composite = gen4_render_composite; sna->render.prefer_gpu |= PREFER_GPU_RENDER; #endif #if !NO_COMPOSITE_SPANS sna->render.check_composite_spans = gen4_check_composite_spans; sna->render.composite_spans = gen4_render_composite_spans; if (0) sna->render.prefer_gpu |= PREFER_GPU_SPANS; #endif #if !NO_VIDEO sna->render.video = gen4_render_video; #endif #if !NO_COPY_BOXES sna->render.copy_boxes = gen4_render_copy_boxes; #endif #if !NO_COPY sna->render.copy = gen4_render_copy; #endif #if !NO_FILL_BOXES sna->render.fill_boxes = gen4_render_fill_boxes; #endif #if !NO_FILL sna->render.fill = gen4_render_fill; #endif #if !NO_FILL_ONE sna->render.fill_one = gen4_render_fill_one; #endif sna->render.flush = gen4_render_flush; sna->render.reset = gen4_render_reset; sna->render.fini = gen4_render_fini; sna->render.max_3d_size = GEN4_MAX_3D_SIZE; sna->render.max_3d_pitch = 1 << 18; return sna->kgem.gen >= 045 ? "Eaglelake (gen4.5)" : "Broadwater (gen4)"; } xf86-video-intel-2.99.917/src/sna/gen4_common.h0000664000175000017500000000332212400044327015651 00000000000000/* * Copyright © 2011-2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifndef GEN4_COMMON_H #define GEN4_COMMON_H #include "sna.h" inline static void discard_vbo(struct sna *sna) { kgem_bo_destroy(&sna->kgem, sna->render.vbo); sna->render.vbo = NULL; sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); sna->render.vertex_used = 0; sna->render.vertex_index = 0; } void gen4_render_flush(struct sna *sna); void gen4_render_retire(struct kgem *kgem); void gen4_render_expire(struct kgem *kgem); #endif /* GEN4_COMMON_H */ xf86-video-intel-2.99.917/src/sna/gen4_source.h0000664000175000017500000000065012244635610015671 00000000000000#ifndef GEN4_SOURCE_H #define GEN4_SOURCE_H #include "compiler.h" #include "sna.h" #include "sna_render.h" bool gen4_channel_init_solid(struct sna *sna, struct sna_composite_channel *channel, uint32_t color); bool gen4_channel_init_linear(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int x, int y, int w, int h, int dst_x, int dst_y); #endif /* GEN4_SOURCE_H */ xf86-video-intel-2.99.917/src/sna/sna_render.c0000664000175000017500000017260712437074566015616 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "fb/fbpict.h" #define NO_REDIRECT 0 #define NO_CONVERT 0 #define NO_FIXUP 0 #define NO_EXTRACT 0 #define DBG_FORCE_UPLOAD 0 #define DBG_NO_CPU_BO 0 #define alphaless(format) PICT_FORMAT(PICT_FORMAT_BPP(format), \ PICT_FORMAT_TYPE(format), \ 0, \ PICT_FORMAT_R(format), \ PICT_FORMAT_G(format), \ PICT_FORMAT_B(format)) CARD32 sna_format_for_depth(int depth) { switch (depth) { case 1: return PICT_a1; case 4: return PICT_a4; case 8: return PICT_a8; case 15: return PICT_x1r5g5b5; case 16: return PICT_r5g6b5; default: assert(0); case 24: return PICT_x8r8g8b8; #ifdef PICT_x2r10g10b10 case 30: return PICT_x2r10g10b10; #endif case 32: return PICT_a8r8g8b8; } } CARD32 sna_render_format_for_depth(int depth) { switch (depth) { case 1: return PIXMAN_a1; case 4: return PIXMAN_a4; case 8: return PIXMAN_a8; case 15: return PIXMAN_a1r5g5b5; case 16: return PIXMAN_r5g6b5; case 30: return PIXMAN_a2r10g10b10; default: assert(0); case 24: case 32: return PIXMAN_a8r8g8b8; } } static bool no_render_composite(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr mask, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t mask_x, int16_t mask_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_op *tmp) { DBG(("%s (op=%d, mask? %d)\n", __FUNCTION__, op, mask != NULL)); if (mask) return false; if (!is_gpu(sna, dst->pDrawable, PREFER_GPU_BLT) && (src->pDrawable == NULL || !is_gpu(sna, src->pDrawable, PREFER_GPU_BLT))) return false; return sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags | COMPOSITE_FALLBACK, tmp); (void)mask_x; (void)mask_y; } static bool no_render_check_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t width, int16_t height, unsigned flags) { return false; } static bool no_render_copy_boxes(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, unsigned flags) { DBG(("%s (n=%d)\n", __FUNCTION__, n)); if (!sna_blt_compare_depth(src, dst)) return false; return sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n); } static bool no_render_copy(struct sna *sna, uint8_t alu, PixmapPtr src, struct kgem_bo *src_bo, PixmapPtr dst, struct kgem_bo *dst_bo, struct sna_copy_op *tmp) { DBG(("%s ()\n", __FUNCTION__)); if (sna_blt_compare_depth(&src->drawable, &dst->drawable) && sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, tmp)) return true; return false; } static bool no_render_fill_boxes(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n) { uint8_t alu = GXcopy; uint32_t pixel; DBG(("%s (op=%d, color=(%04x,%04x,%04x, %04x))\n", __FUNCTION__, op, color->red, color->green, color->blue, color->alpha)); if (op == PictOpClear) { pixel = 0; alu = GXclear; op = PictOpSrc; } if (op == PictOpOver) { if ((color->alpha >= 0xff00)) op = PictOpSrc; } if (op != PictOpSrc) return false; if (alu == GXcopy && !sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, format)) return false; return sna_blt_fill_boxes(sna, alu, dst_bo, dst->bitsPerPixel, pixel, box, n); } static bool no_render_fill(struct sna *sna, uint8_t alu, PixmapPtr dst, struct kgem_bo *dst_bo, uint32_t color, unsigned flags, struct sna_fill_op *tmp) { DBG(("%s (alu=%d, color=%08x)\n", __FUNCTION__, alu, color)); return sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, tmp); } static bool no_render_fill_one(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { BoxRec box; box.x1 = x1; box.y1 = y1; box.x2 = x2; box.y2 = y2; DBG(("%s (alu=%d, color=%08x) (%d,%d), (%d, %d)\n", __FUNCTION__, alu, color, x1, y1, x2, y2)); return sna_blt_fill_boxes(sna, alu, bo, dst->drawable.bitsPerPixel, color, &box, 1); } static bool no_render_clear(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo) { DBG(("%s: pixmap=%ld %dx%d\n", __FUNCTION__, dst->drawable.serialNumber, dst->drawable.width, dst->drawable.height)); return sna->render.fill_one(sna, dst, bo, 0, 0, 0, dst->drawable.width, dst->drawable.height, GXclear); } static void no_render_reset(struct sna *sna) { (void)sna; } static void no_render_flush(struct sna *sna) { (void)sna; } static void no_render_context_switch(struct kgem *kgem, int new_mode) { if (!kgem->nbatch) return; if (kgem_ring_is_idle(kgem, kgem->ring)) { DBG(("%s: GPU idle, flushing\n", __FUNCTION__)); _kgem_submit(kgem); } (void)new_mode; } static void no_render_retire(struct kgem *kgem) { (void)kgem; } static void no_render_expire(struct kgem *kgem) { (void)kgem; } static void no_render_fini(struct sna *sna) { (void)sna; } const char *no_render_init(struct sna *sna) { struct sna_render *render = &sna->render; memset (render, 0, sizeof (*render)); render->prefer_gpu = PREFER_GPU_BLT; render->vertices = render->vertex_data; render->vertex_size = ARRAY_SIZE(render->vertex_data); render->composite = no_render_composite; render->check_composite_spans = no_render_check_composite_spans; render->copy_boxes = no_render_copy_boxes; render->copy = no_render_copy; render->fill_boxes = no_render_fill_boxes; render->fill = no_render_fill; render->fill_one = no_render_fill_one; render->clear = no_render_clear; render->reset = no_render_reset; render->flush = no_render_flush; render->fini = no_render_fini; sna->kgem.context_switch = no_render_context_switch; sna->kgem.retire = no_render_retire; sna->kgem.expire = no_render_expire; if (sna->kgem.has_blt) sna->kgem.ring = KGEM_BLT; sna_vertex_init(sna); return "generic"; } static struct kgem_bo * use_cpu_bo(struct sna *sna, PixmapPtr pixmap, const BoxRec *box, bool blt) { struct sna_pixmap *priv; if (DBG_NO_CPU_BO) return NULL; priv = sna_pixmap(pixmap); if (priv == NULL || priv->cpu_bo == NULL) { DBG(("%s: no cpu bo\n", __FUNCTION__)); return NULL; } if (!blt && priv->cpu_bo->snoop && priv->source_count > SOURCE_BIAS) { DBG(("%s: promoting snooped CPU bo due to reuse\n", __FUNCTION__)); return NULL; } if (priv->gpu_bo) { switch (sna_damage_contains_box(&priv->cpu_damage, box)) { case PIXMAN_REGION_OUT: DBG(("%s: has GPU bo and no damage to upload\n", __FUNCTION__)); return NULL; case PIXMAN_REGION_IN: DBG(("%s: has GPU bo but box is completely on CPU\n", __FUNCTION__)); break; default: if (kgem_bo_is_busy(priv->gpu_bo)){ DBG(("%s: box is partially damaged on the CPU, and the GPU is busy\n", __FUNCTION__)); return NULL; } if (sna_damage_contains_box(&priv->gpu_damage, box) != PIXMAN_REGION_OUT) { DBG(("%s: box is damaged on the GPU\n", __FUNCTION__)); return NULL; } break; } } if (!blt) { int w = box->x2 - box->x1; int h = box->y2 - box->y1; if (w < pixmap->drawable.width || h < pixmap->drawable.height || priv->source_count != SOURCE_BIAS) { bool want_tiling; if (priv->cpu_bo->pitch >= 4096) { DBG(("%s: size=%dx%d, promoting reused (%d) CPU bo due to TLB miss (%dx%d, pitch=%d)\n", __FUNCTION__, w, h, priv->source_count, pixmap->drawable.width, pixmap->drawable.height, priv->cpu_bo->pitch)); return NULL; } if (priv->gpu_bo) want_tiling = priv->gpu_bo->tiling != I915_TILING_NONE; else want_tiling = kgem_choose_tiling(&sna->kgem, I915_TILING_Y, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel) != I915_TILING_NONE; if (want_tiling && priv->source_count*w*h >= (int)pixmap->drawable.width * pixmap->drawable.height) { DBG(("%s: pitch (%d) requires tiling\n", __FUNCTION__, priv->cpu_bo->pitch)); return NULL; } } } if (priv->shm) { assert(!priv->flush); sna_add_flush_pixmap(sna, priv, priv->cpu_bo); } DBG(("%s for box=(%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); ++priv->source_count; return priv->cpu_bo; } static struct kgem_bo * move_to_gpu(PixmapPtr pixmap, const BoxRec *box, bool blt) { struct sna_pixmap *priv; int count, w, h; bool migrate = false; if (DBG_FORCE_UPLOAD > 0) return NULL; priv = sna_pixmap(pixmap); if (priv == NULL) { DBG(("%s: not migrating unattached pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); return NULL; } if (priv->shm) blt = true; if (priv->gpu_bo) { if (priv->cpu_damage && sna_damage_contains_box(&priv->cpu_damage, box) != PIXMAN_REGION_OUT) goto upload; return priv->gpu_bo; } if (priv->cpu_damage == NULL) { DBG(("%s: not migrating uninitialised pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); return NULL; } if (pixmap->usage_hint) { DBG(("%s: not migrating pixmap=%ld due to usage_hint=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->usage_hint)); return NULL; } if (DBG_FORCE_UPLOAD < 0) { if (!sna_pixmap_force_to_gpu(pixmap, blt ? MOVE_READ : MOVE_SOURCE_HINT | MOVE_ASYNC_HINT | MOVE_READ)) return NULL; return priv->gpu_bo; } w = box->x2 - box->x1; h = box->y2 - box->y1; if (priv->cpu_bo && !priv->cpu_bo->flush) { migrate = true; } else if (w == pixmap->drawable.width && h == pixmap->drawable.height) { migrate = priv->source_count++ > SOURCE_BIAS; DBG(("%s: migrating whole pixmap (%dx%d) for source (%d,%d),(%d,%d), count %d? %d\n", __FUNCTION__, pixmap->drawable.width, pixmap->drawable.height, box->x1, box->y1, box->x2, box->y2, priv->source_count, migrate)); } else if (kgem_choose_tiling(&to_sna_from_pixmap(pixmap)->kgem, blt ? I915_TILING_X : I915_TILING_Y, w, h, pixmap->drawable.bitsPerPixel) != I915_TILING_NONE) { count = priv->source_count++; if ((priv->create & KGEM_CAN_CREATE_GPU) == 0) count -= SOURCE_BIAS; DBG(("%s: migrate box (%d, %d), (%d, %d)? source count=%d, fraction=%d/%d [%d]\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, count, w*h, pixmap->drawable.width * pixmap->drawable.height, pixmap->drawable.width * pixmap->drawable.height / (w*h))); migrate = count*w*h > pixmap->drawable.width * pixmap->drawable.height; } if (!migrate) return NULL; upload: if (blt) { if (!sna_pixmap_move_area_to_gpu(pixmap, box, __MOVE_FORCE | MOVE_READ)) return NULL; } else { if (!sna_pixmap_move_to_gpu(pixmap, __MOVE_FORCE | MOVE_ASYNC_HINT | MOVE_SOURCE_HINT | MOVE_READ)) return NULL; } return priv->gpu_bo; } static struct kgem_bo *upload(struct sna *sna, struct sna_composite_channel *channel, PixmapPtr pixmap, const BoxRec *box) { struct sna_pixmap *priv; struct kgem_bo *bo; DBG(("%s: box=(%d, %d), (%d, %d), pixmap=%dx%d\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, pixmap->drawable.width, pixmap->drawable.height)); assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->x2 <= pixmap->drawable.width); assert(box->y2 <= pixmap->drawable.height); priv = sna_pixmap(pixmap); if (priv) { RegionRec region; if (priv->cpu_damage == NULL) return NULL; /* uninitialised */ region.extents = *box; region.data = NULL; if (!sna_drawable_move_region_to_cpu(&pixmap->drawable, ®ion, MOVE_READ)) return NULL; assert(!priv->mapped); if (pixmap->devPrivate.ptr == NULL) return NULL; /* uninitialised */ } bo = kgem_upload_source_image(&sna->kgem, pixmap->devPrivate.ptr, box, pixmap->devKind, pixmap->drawable.bitsPerPixel); if (channel && bo) { channel->width = box->x2 - box->x1; channel->height = box->y2 - box->y1; channel->offset[0] -= box->x1; channel->offset[1] -= box->y1; if (priv && pixmap->usage_hint == 0 && channel->width == pixmap->drawable.width && channel->height == pixmap->drawable.height) { DBG(("%s: adding upload cache to pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); assert(priv->gpu_damage == NULL); assert(priv->gpu_bo == NULL); assert(bo->proxy != NULL); kgem_proxy_bo_attach(bo, &priv->gpu_bo); } } return bo; } struct kgem_bo * __sna_render_pixmap_bo(struct sna *sna, PixmapPtr pixmap, const BoxRec *box, bool blt) { struct kgem_bo *bo; bo = use_cpu_bo(sna, pixmap, box, blt); if (bo == NULL) { bo = move_to_gpu(pixmap, box, blt); if (bo == NULL) return NULL; } return bo; } int sna_render_pixmap_bo(struct sna *sna, struct sna_composite_channel *channel, PixmapPtr pixmap, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y) { struct sna_pixmap *priv; BoxRec box; DBG(("%s pixmap=%ld, (%d, %d)x(%d, %d)/(%d, %d)\n", __FUNCTION__, pixmap->drawable.serialNumber, x, y, w,h, pixmap->drawable.width, pixmap->drawable.height)); channel->width = pixmap->drawable.width; channel->height = pixmap->drawable.height; channel->offset[0] = x - dst_x; channel->offset[1] = y - dst_y; priv = sna_pixmap(pixmap); if (priv) { if (priv->gpu_bo && (DAMAGE_IS_ALL(priv->gpu_damage) || !priv->cpu_damage || priv->gpu_bo->proxy)) { DBG(("%s: GPU all damaged\n", __FUNCTION__)); channel->bo = priv->gpu_bo; goto done; } if (priv->cpu_bo && (DAMAGE_IS_ALL(priv->cpu_damage) || !priv->gpu_damage) && !priv->cpu_bo->snoop && priv->cpu_bo->pitch < 4096) { DBG(("%s: CPU all damaged\n", __FUNCTION__)); channel->bo = priv->cpu_bo; if (priv->shm) { assert(!priv->flush); sna_add_flush_pixmap(sna, priv, priv->cpu_bo); } goto done; } } /* XXX handle transformed repeat */ if (w == 0 || h == 0 || channel->transform) { box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; } else { box.x1 = x; box.y1 = y; box.x2 = bound(x, w); box.y2 = bound(y, h); if (channel->repeat == RepeatNone || channel->repeat == RepeatPad) { if (box.x1 < 0) box.x1 = 0; if (box.y1 < 0) box.y1 = 0; if (box.x2 > pixmap->drawable.width) box.x2 = pixmap->drawable.width; if (box.y2 > pixmap->drawable.height) box.y2 = pixmap->drawable.height; } else { if (box.x1 < 0 || box.x2 > pixmap->drawable.width) box.x1 = 0, box.x2 = pixmap->drawable.width; if (box.y1 < 0 || box.y2 > pixmap->drawable.height) box.y1 = 0, box.y2 = pixmap->drawable.height; } } w = box.x2 - box.x1; h = box.y2 - box.y1; DBG(("%s box=(%d, %d), (%d, %d): (%d, %d)/(%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2, w, h, pixmap->drawable.width, pixmap->drawable.height)); if (w <= 0 || h <= 0) { DBG(("%s: sample extents outside of texture -> clear\n", __FUNCTION__)); return 0; } DBG(("%s: offset=(%d, %d), size=(%d, %d)\n", __FUNCTION__, channel->offset[0], channel->offset[1], pixmap->drawable.width, pixmap->drawable.height)); channel->bo = __sna_render_pixmap_bo(sna, pixmap, &box, false); if (channel->bo == NULL) { DBG(("%s: uploading CPU box (%d, %d), (%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2)); channel->bo = upload(sna, channel, pixmap, &box); if (channel->bo == NULL) return 0; } else { done: kgem_bo_reference(channel->bo); } channel->scale[0] = 1.f / channel->width; channel->scale[1] = 1.f / channel->height; return 1; } static int sna_render_picture_downsample(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, const int16_t x, const int16_t y, const int16_t w, const int16_t h, const int16_t dst_x, const int16_t dst_y) { PixmapPtr pixmap = get_drawable_pixmap(picture->pDrawable); ScreenPtr screen = pixmap->drawable.pScreen; PicturePtr tmp_src, tmp_dst; PictFormatPtr format; struct sna_pixmap *priv; pixman_transform_t t; PixmapPtr tmp; int width, height, size, max_size; int sx, sy, sw, sh; int error, ret = 0; BoxRec box, b; box.x1 = x; box.y1 = y; box.x2 = bound(x, w); box.y2 = bound(y, h); if (channel->transform) { pixman_vector_t v; pixman_transform_bounds(channel->transform, &box); v.vector[0] = x << 16; v.vector[1] = y << 16; v.vector[2] = 1 << 16; pixman_transform_point(channel->transform, &v); } if (channel->repeat == RepeatNone || channel->repeat == RepeatPad) { if (box.x1 < 0) box.x1 = 0; if (box.y1 < 0) box.y1 = 0; if (box.x2 > pixmap->drawable.width) box.x2 = pixmap->drawable.width; if (box.y2 > pixmap->drawable.height) box.y2 = pixmap->drawable.height; } else { /* XXX tiled repeats? */ if (box.x1 < 0 || box.x2 > pixmap->drawable.width) box.x1 = 0, box.x2 = pixmap->drawable.width; if (box.y1 < 0 || box.y2 > pixmap->drawable.height) box.y1 = 0, box.y2 = pixmap->drawable.height; } sw = box.x2 - box.x1; sh = box.y2 - box.y1; DBG(("%s: sample (%d, %d), (%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2)); sx = (sw + sna->render.max_3d_size - 1) / sna->render.max_3d_size; sy = (sh + sna->render.max_3d_size - 1) / sna->render.max_3d_size; DBG(("%s: scaling (%d, %d) down by %dx%d\n", __FUNCTION__, sw, sh, sx, sy)); width = sw / sx; height = sh / sy; DBG(("%s: creating temporary GPU bo %dx%d\n", __FUNCTION__, width, height)); tmp = screen->CreatePixmap(screen, width, height, pixmap->drawable.depth, SNA_CREATE_SCRATCH); if (tmp == NULL) goto fixup; priv = sna_pixmap(tmp); assert(priv && priv->gpu_bo); if (!sna_pixmap_move_to_gpu(pixmap, MOVE_ASYNC_HINT | MOVE_SOURCE_HINT | MOVE_READ)) { fixup: DBG(("%s: unable to create GPU bo for target or temporary pixmaps\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } format = PictureMatchFormat(screen, pixmap->drawable.depth, picture->format); if (format == NULL) { DBG(("%s: invalid depth=%d, format=%08x\n", __FUNCTION__, pixmap->drawable.depth, picture->format)); goto fixup; } tmp_dst = CreatePicture(0, &tmp->drawable, format, 0, NULL, serverClient, &error); if (!tmp_dst) goto cleanup_tmp; tmp_src = CreatePicture(0, &pixmap->drawable, format, 0, NULL, serverClient, &error); if (!tmp_src) goto cleanup_dst; tmp_src->repeat = 1; tmp_src->repeatType = RepeatPad; /* Prefer to use nearest as it helps reduce artefacts from * interpolating and filtering twice. */ tmp_src->filter = PictFilterNearest; memset(&t, 0, sizeof(t)); t.matrix[0][0] = (sw << 16) / width; t.matrix[0][2] = box.x1 << 16; t.matrix[1][1] = (sh << 16) / height; t.matrix[1][2] = box.y1 << 16; t.matrix[2][2] = 1 << 16; tmp_src->transform = &t; ValidatePicture(tmp_dst); ValidatePicture(tmp_src); /* Use a small size to accommodate enlargement through tile alignment */ max_size = sna_max_tile_copy_size(sna, sna_pixmap(pixmap)->gpu_bo, priv->gpu_bo); if (max_size == 0) goto cleanup_dst; size = sna->render.max_3d_size - 4096 / pixmap->drawable.bitsPerPixel; while (size * size * 4 > max_size) size /= 2; DBG(("%s: size=%d (max=%d), scale %dx%d\n", __FUNCTION__, size, max_size, sx, sy)); sw = size / sx - 2 * sx; if (sw < 1) sw = 1; sh = size / sy - 2 * sy; if (sh < 1) sh = 1; DBG(("%s %d:%d downsampling using %dx%d GPU tiles\n", __FUNCTION__, (width + sw-1)/sw, (height + sh-1)/sh, sw, sh)); for (b.y1 = 0; b.y1 < height; b.y1 = b.y2) { b.y2 = b.y1 + sh; if (b.y2 > height) b.y2 = height; for (b.x1 = 0; b.x1 < width; b.x1 = b.x2) { struct sna_composite_op op; b.x2 = b.x1 + sw; if (b.x2 > width) b.x2 = width; DBG(("%s: tile (%d, %d), (%d, %d)\n", __FUNCTION__, b.x1, b.y1, b.x2, b.y2)); memset(&op, 0, sizeof(op)); if (!sna->render.composite(sna, PictOpSrc, tmp_src, NULL, tmp_dst, b.x1, b.y1, 0, 0, b.x1, b.y1, b.x2 - b.x1, b.y2 - b.y1, 0, &op)) goto cleanup_src; op.box(sna, &op, &b); op.done(sna, &op); } } pixman_transform_invert(&channel->embedded_transform, &t); if (channel->transform) pixman_transform_multiply(&channel->embedded_transform, &channel->embedded_transform, channel->transform); channel->transform = &channel->embedded_transform; channel->offset[0] = x - dst_x; channel->offset[1] = y - dst_y; channel->scale[0] = 1.f/width; channel->scale[1] = 1.f/height; channel->width = width; channel->height = height; channel->bo = kgem_bo_reference(priv->gpu_bo); ret = 1; cleanup_src: tmp_src->transform = NULL; FreePicture(tmp_src, 0); cleanup_dst: FreePicture(tmp_dst, 0); cleanup_tmp: screen->DestroyPixmap(tmp); return ret; } bool sna_render_pixmap_partial(struct sna *sna, const DrawableRec *draw, struct kgem_bo *bo, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h) { BoxRec box; int offset; DBG(("%s (%d, %d)x(%d, %d), pitch %d, max %d\n", __FUNCTION__, x, y, w, h, bo->pitch, sna->render.max_3d_pitch)); if (bo->pitch > sna->render.max_3d_pitch) { DBG(("%s: pitch too great %d > %d\n", __FUNCTION__, bo->pitch, sna->render.max_3d_pitch)); return false; } box.x1 = x; box.y1 = y; box.x2 = bound(x, w); box.y2 = bound(y, h); DBG(("%s: unaligned box (%d, %d), (%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2)); if (box.x1 < 0) box.x1 = 0; if (box.y1 < 0) box.y1 = 0; if (bo->tiling) { int tile_width, tile_height, tile_size; kgem_get_tile_size(&sna->kgem, bo->tiling, bo->pitch, &tile_width, &tile_height, &tile_size); DBG(("%s: tile size for tiling %d: %dx%d, size=%d\n", __FUNCTION__, bo->tiling, tile_width, tile_height, tile_size)); /* Ensure we align to an even tile row */ box.y1 = box.y1 & ~(2*tile_height - 1); box.y2 = ALIGN(box.y2, 2*tile_height); assert(tile_width * 8 >= draw->bitsPerPixel); box.x1 = box.x1 & ~(tile_width * 8 / draw->bitsPerPixel - 1); box.x2 = ALIGN(box.x2, tile_width * 8 / draw->bitsPerPixel); offset = box.x1 * draw->bitsPerPixel / 8 / tile_width * tile_size; } else { box.y1 = box.y1 & ~1; box.y2 = ALIGN(box.y2, 2); box.x1 = box.x1 & ~1; box.x2 = ALIGN(box.x2, 2); offset = box.x1 * draw->bitsPerPixel / 8; } if (box.x2 > draw->width) box.x2 = draw->width; if (box.y2 > draw->height) box.y2 = draw->height; w = box.x2 - box.x1; h = box.y2 - box.y1; DBG(("%s box=(%d, %d), (%d, %d): (%d, %d)/(%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2, w, h, draw->width, draw->height)); if (w <= 0 || h <= 0 || w > sna->render.max_3d_size || h > sna->render.max_3d_size) { DBG(("%s: box too large (%dx%d) for 3D pipeline (max %d)\n", __FUNCTION__, w, h, sna->render.max_3d_size)); return false; } /* How many tiles across are we? */ channel->bo = kgem_create_proxy(&sna->kgem, bo, box.y1 * bo->pitch + offset, h * bo->pitch); if (channel->bo == NULL) { DBG(("%s: failed to create proxy for partial (offset=%d, size=%d)\n", __FUNCTION__, box.y1 * bo->pitch + offset, h * bo->pitch)); return false; } channel->bo->pitch = bo->pitch; channel->offset[0] = -box.x1; channel->offset[1] = -box.y1; channel->scale[0] = 1.f/w; channel->scale[1] = 1.f/h; channel->width = w; channel->height = h; return true; } static bool sna_render_picture_partial(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y) { struct kgem_bo *bo = NULL; PixmapPtr pixmap = get_drawable_pixmap(picture->pDrawable); BoxRec box; int offset; DBG(("%s (%d, %d)x(%d, %d) [dst=(%d, %d)]\n", __FUNCTION__, x, y, w, h, dst_x, dst_y)); box.x1 = x; box.y1 = y; box.x2 = bound(x, w); box.y2 = bound(y, h); if (channel->transform) pixman_transform_bounds(channel->transform, &box); DBG(("%s sample=(%d, %d), (%d, %d): (%d, %d)/(%d, %d), repeat=%d\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2, w, h, pixmap->drawable.width, pixmap->drawable.height, channel->repeat)); if (channel->repeat == RepeatNone || channel->repeat == RepeatPad) { if (box.x1 < 0) box.x1 = 0; if (box.y1 < 0) box.y1 = 0; if (box.x2 > pixmap->drawable.width) box.x2 = pixmap->drawable.width; if (box.y2 > pixmap->drawable.height) box.y2 = pixmap->drawable.height; } else { if (box.x1 < 0 || box.x2 > pixmap->drawable.width) box.x1 = 0, box.x2 = pixmap->drawable.width; if (box.y1 < 0 || box.y2 > pixmap->drawable.height) box.y1 = 0, box.y2 = pixmap->drawable.height; } if (use_cpu_bo(sna, pixmap, &box, false)) { bo = sna_pixmap(pixmap)->cpu_bo; } else { struct sna_pixmap *priv; priv = sna_pixmap_force_to_gpu(pixmap, MOVE_READ | MOVE_ASYNC_HINT | MOVE_SOURCE_HINT); if (priv == NULL) return false; bo = priv->gpu_bo; } if (bo->pitch > sna->render.max_3d_pitch) { DBG(("%s: pitch too great %d > %d\n", __FUNCTION__, bo->pitch, sna->render.max_3d_pitch)); return false; } if (bo->tiling) { int tile_width, tile_height, tile_size; kgem_get_tile_size(&sna->kgem, bo->tiling, bo->pitch, &tile_width, &tile_height, &tile_size); DBG(("%s: tiling=%d, size=%dx%d, chunk=%d\n", __FUNCTION__, bo->tiling, tile_width, tile_height, tile_size)); /* Ensure we align to an even tile row */ box.y1 = box.y1 & ~(2*tile_height - 1); box.y2 = ALIGN(box.y2, 2*tile_height); if (box.y2 > pixmap->drawable.height) box.y2 = pixmap->drawable.height; box.x1 = box.x1 & ~(tile_width * 8 / pixmap->drawable.bitsPerPixel - 1); box.x2 = ALIGN(box.x2, tile_width * 8 / pixmap->drawable.bitsPerPixel); if (box.x2 > pixmap->drawable.width) box.x2 = pixmap->drawable.width; offset = box.x1 * pixmap->drawable.bitsPerPixel / 8 / tile_width * tile_size; } else offset = box.x1 * pixmap->drawable.bitsPerPixel / 8; w = box.x2 - box.x1; h = box.y2 - box.y1; DBG(("%s box=(%d, %d), (%d, %d): (%d, %d)/(%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2, w, h, pixmap->drawable.width, pixmap->drawable.height)); if (w <= 0 || h <= 0 || w > sna->render.max_3d_size || h > sna->render.max_3d_size) return false; /* How many tiles across are we? */ channel->bo = kgem_create_proxy(&sna->kgem, bo, box.y1 * bo->pitch + offset, h * bo->pitch); if (channel->bo == NULL) return false; if (channel->transform) { memset(&channel->embedded_transform, 0, sizeof(channel->embedded_transform)); channel->embedded_transform.matrix[0][0] = 1 << 16; channel->embedded_transform.matrix[0][2] = -box.x1 << 16; channel->embedded_transform.matrix[1][1] = 1 << 16; channel->embedded_transform.matrix[1][2] = -box.y1 << 16; channel->embedded_transform.matrix[2][2] = 1 << 16; pixman_transform_multiply(&channel->embedded_transform, &channel->embedded_transform, channel->transform); channel->transform = &channel->embedded_transform; } else { x -= box.x1; y -= box.y1; } channel->offset[0] = x - dst_x; channel->offset[1] = y - dst_y; channel->scale[0] = 1.f/w; channel->scale[1] = 1.f/h; channel->width = w; channel->height = h; return true; } int sna_render_picture_extract(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y) { struct kgem_bo *bo = NULL, *src_bo; PixmapPtr pixmap = get_drawable_pixmap(picture->pDrawable); int16_t ox, oy, ow, oh; BoxRec box; #if NO_EXTRACT return -1; #endif DBG(("%s (%d, %d)x(%d, %d) [dst=(%d, %d)]\n", __FUNCTION__, x, y, w, h, dst_x, dst_y)); if (w == 0 || h == 0) { DBG(("%s: fallback -- unknown bounds\n", __FUNCTION__)); return -1; } if (sna_render_picture_partial(sna, picture, channel, x, y, w, h, dst_x, dst_y)) return 1; ow = w; oh = h; ox = box.x1 = x; oy = box.y1 = y; box.x2 = bound(x, w); box.y2 = bound(y, h); if (channel->transform) { pixman_vector_t v; pixman_transform_bounds(channel->transform, &box); v.vector[0] = ox << 16; v.vector[1] = oy << 16; v.vector[2] = 1 << 16; pixman_transform_point(channel->transform, &v); ox = v.vector[0] / v.vector[2]; oy = v.vector[1] / v.vector[2]; } DBG(("%s sample=(%d, %d), (%d, %d): (%d, %d)/(%d, %d), repeat=%d\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2, w, h, pixmap->drawable.width, pixmap->drawable.height, channel->repeat)); if (channel->repeat == RepeatNone || channel->repeat == RepeatPad) { if (box.x1 < 0) box.x1 = 0; if (box.y1 < 0) box.y1 = 0; if (box.x2 > pixmap->drawable.width) box.x2 = pixmap->drawable.width; if (box.y2 > pixmap->drawable.height) box.y2 = pixmap->drawable.height; } else { /* XXX tiled repeats? */ if (box.x1 < 0 || box.x2 > pixmap->drawable.width) box.x1 = 0, box.x2 = pixmap->drawable.width; if (box.y1 < 0 || box.y2 > pixmap->drawable.height) box.y1 = 0, box.y2 = pixmap->drawable.height; } w = box.x2 - box.x1; h = box.y2 - box.y1; DBG(("%s box=(%d, %d), (%d, %d): (%d, %d)/(%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2, w, h, pixmap->drawable.width, pixmap->drawable.height)); if (w <= 0 || h <= 0) { DBG(("%s: sample extents outside of texture -> clear\n", __FUNCTION__)); return 0; } if (w > sna->render.max_3d_size || h > sna->render.max_3d_size) { DBG(("%s: fallback -- sample too large for texture (%d, %d)x(%d, %d)\n", __FUNCTION__, box.x1, box.y1, w, h)); return sna_render_picture_downsample(sna, picture, channel, x, y, ow, oh, dst_x, dst_y); } src_bo = use_cpu_bo(sna, pixmap, &box, true); if (src_bo == NULL) src_bo = move_to_gpu(pixmap, &box, false); if (src_bo) { bo = kgem_create_2d(&sna->kgem, w, h, pixmap->drawable.bitsPerPixel, kgem_choose_tiling(&sna->kgem, I915_TILING_X, w, h, pixmap->drawable.bitsPerPixel), CREATE_TEMPORARY); if (bo) { DrawableRec tmp; tmp.width = w; tmp.height = h; tmp.depth = pixmap->drawable.depth; tmp.bitsPerPixel = pixmap->drawable.bitsPerPixel; assert(tmp.width); assert(tmp.height); if (!sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, src_bo, 0, 0, &tmp, bo, -box.x1, -box.y1, &box, 1, 0)) { kgem_bo_destroy(&sna->kgem, bo); bo = NULL; } } } else { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv) { RegionRec region; region.extents = box; region.data = NULL; if (!sna_drawable_move_region_to_cpu(&pixmap->drawable, ®ion, MOVE_READ)) return 0; assert(!priv->mapped); if (pixmap->devPrivate.ptr == NULL) return 0; /* uninitialised */ } bo = kgem_upload_source_image(&sna->kgem, pixmap->devPrivate.ptr, &box, pixmap->devKind, pixmap->drawable.bitsPerPixel); if (priv != NULL && bo != NULL && box.x2 - box.x1 == pixmap->drawable.width && box.y2 - box.y1 == pixmap->drawable.height) { DBG(("%s: adding upload cache to pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); assert(priv->gpu_damage == NULL); assert(priv->gpu_bo == NULL); assert(bo->proxy != NULL); kgem_proxy_bo_attach(bo, &priv->gpu_bo); } } if (bo == NULL) { DBG(("%s: falback -- pixmap is not on the GPU\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, ow, oh, dst_x, dst_y); } if (ox == x && oy == y) { x = y = 0; } else if (channel->transform) { pixman_vector_t v; pixman_transform_t m; v.vector[0] = (ox - box.x1) << 16; v.vector[1] = (oy - box.y1) << 16; v.vector[2] = 1 << 16; pixman_transform_invert(&m, channel->transform); pixman_transform_point(&m, &v); x = v.vector[0] / v.vector[2]; y = v.vector[1] / v.vector[2]; } else { x = ox - box.x1; y = oy - box.y1; } channel->offset[0] = x - dst_x; channel->offset[1] = y - dst_y; channel->scale[0] = 1.f/w; channel->scale[1] = 1.f/h; channel->width = w; channel->height = h; channel->bo = bo; return 1; } static int sna_render_picture_convolve(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y) { ScreenPtr screen = picture->pDrawable->pScreen; PixmapPtr pixmap; PicturePtr tmp; pixman_fixed_t *params = picture->filter_params; int x_off = -pixman_fixed_to_int((params[0] - pixman_fixed_1) >> 1); int y_off = -pixman_fixed_to_int((params[1] - pixman_fixed_1) >> 1); int cw = pixman_fixed_to_int(params[0]); int ch = pixman_fixed_to_int(params[1]); int i, j, error, depth; struct kgem_bo *bo; /* Lame multi-pass accumulation implementation of a general convolution * that works everywhere. */ DBG(("%s: origin=(%d,%d) kernel=%dx%d, size=%dx%d\n", __FUNCTION__, x_off, y_off, cw, ch, w, h)); assert(picture->pDrawable); assert(picture->filter == PictFilterConvolution); assert(w <= sna->render.max_3d_size && h <= sna->render.max_3d_size); if (PICT_FORMAT_RGB(picture->format) == 0) { channel->pict_format = PIXMAN_a8; depth = 8; } else { channel->pict_format = PIXMAN_a8r8g8b8; depth = 32; } pixmap = screen->CreatePixmap(screen, w, h, depth, SNA_CREATE_SCRATCH); if (pixmap == NullPixmap) { DBG(("%s: pixmap allocation failed\n", __FUNCTION__)); return -1; } tmp = NULL; bo = __sna_pixmap_get_bo(pixmap); assert(bo); if (sna->render.clear(sna, pixmap, bo)) tmp = CreatePicture(0, &pixmap->drawable, PictureMatchFormat(screen, depth, channel->pict_format), 0, NULL, serverClient, &error); screen->DestroyPixmap(pixmap); if (tmp == NULL) return -1; ValidatePicture(tmp); picture->filter = PictFilterBilinear; params += 2; for (j = 0; j < ch; j++) { for (i = 0; i < cw; i++) { xRenderColor color; PicturePtr alpha; color.alpha = *params++; color.red = color.green = color.blue = 0; DBG(("%s: (%d, %d), alpha=%x\n", __FUNCTION__, i,j, color.alpha)); if (color.alpha <= 0x00ff) continue; alpha = CreateSolidPicture(0, &color, &error); if (alpha) { sna_composite(PictOpAdd, picture, alpha, tmp, x, y, 0, 0, x_off+i, y_off+j, w, h); FreePicture(alpha, 0); } } } picture->filter = PictFilterConvolution; channel->height = h; channel->width = w; channel->filter = PictFilterNearest; channel->repeat = RepeatNone; channel->is_affine = true; channel->transform = NULL; channel->scale[0] = 1.f / w; channel->scale[1] = 1.f / h; channel->offset[0] = -dst_x; channel->offset[1] = -dst_y; channel->bo = kgem_bo_reference(bo); /* transfer ownership */ FreePicture(tmp, 0); return 1; } static bool sna_render_picture_flatten(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y) { ScreenPtr screen = picture->pDrawable->pScreen; PixmapPtr pixmap; PicturePtr tmp, alpha; int old_format, error; assert(picture->pDrawable); assert(picture->alphaMap); assert(w <= sna->render.max_3d_size && h <= sna->render.max_3d_size); /* XXX shortcut a8? */ DBG(("%s: %dx%d\n", __FUNCTION__, w, h)); pixmap = screen->CreatePixmap(screen, w, h, 32, SNA_CREATE_SCRATCH); if (pixmap == NullPixmap) { DBG(("%s: pixmap allocation failed\n", __FUNCTION__)); return false; } assert(__sna_pixmap_get_bo(pixmap)); tmp = CreatePicture(0, &pixmap->drawable, PictureMatchFormat(screen, 32, PICT_a8r8g8b8), 0, NULL, serverClient, &error); screen->DestroyPixmap(pixmap); if (tmp == NULL) return false; ValidatePicture(tmp); old_format = picture->format; picture->format = PICT_FORMAT(PICT_FORMAT_BPP(picture->format), PICT_FORMAT_TYPE(picture->format), 0, PICT_FORMAT_R(picture->format), PICT_FORMAT_G(picture->format), PICT_FORMAT_B(picture->format)); alpha = picture->alphaMap; picture->alphaMap = NULL; sna_composite(PictOpSrc, picture, alpha, tmp, x, y, x + picture->alphaOrigin.x, y + picture->alphaOrigin.y, 0, 0, w, h); picture->format = old_format; picture->alphaMap = alpha; channel->height = h; channel->width = w; channel->filter = PictFilterNearest; channel->repeat = RepeatNone; channel->pict_format = PIXMAN_a8r8g8b8; channel->is_affine = true; channel->transform = NULL; channel->scale[0] = 1.f / w; channel->scale[1] = 1.f / h; channel->offset[0] = -dst_x; channel->offset[1] = -dst_y; channel->bo = kgem_bo_reference(__sna_pixmap_get_bo(pixmap)); FreePicture(tmp, 0); return true; } int sna_render_picture_approximate_gradient(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y) { pixman_image_t *dst, *src; pixman_transform_t t; int w2 = w/2, h2 = h/2; int dx, dy; void *ptr; #if NO_FIXUP return -1; #endif DBG(("%s: (%d, %d)x(%d, %d), dst=(%d, %d)\n", __FUNCTION__, x, y, w, h, dst_x, dst_y)); if (w2 == 0 || h2 == 0) { DBG(("%s: fallback - unknown bounds\n", __FUNCTION__)); return -1; } if (w2 > sna->render.max_3d_size || h2 > sna->render.max_3d_size) { DBG(("%s: fallback - too large (%dx%d)\n", __FUNCTION__, w, h)); return -1; } channel->is_opaque = sna_gradient_is_opaque((PictGradient*)picture->pSourcePict); channel->pict_format = channel->is_opaque ? PIXMAN_x8r8g8b8 : PIXMAN_a8r8g8b8; DBG(("%s: gradient is opaque? %d, selecting format %08x\n", __FUNCTION__, channel->is_opaque, channel->pict_format)); assert(channel->card_format == -1); channel->bo = kgem_create_buffer_2d(&sna->kgem, w2, h2, 32, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!channel->bo) { DBG(("%s: failed to create upload buffer, using clear\n", __FUNCTION__)); return 0; } dst = pixman_image_create_bits(channel->pict_format, w2, h2, ptr, channel->bo->pitch); if (!dst) { kgem_bo_destroy(&sna->kgem, channel->bo); channel->bo = NULL; return 0; } src = image_from_pict(picture, false, &dx, &dy); if (src == NULL) { pixman_image_unref(dst); kgem_bo_destroy(&sna->kgem, channel->bo); channel->bo = NULL; return 0; } DBG(("%s: source offset (%d, %d)\n", __FUNCTION__, dx, dy)); memset(&t, 0, sizeof(t)); t.matrix[0][0] = (w << 16) / w2; t.matrix[0][2] = (x + dx) << 16; t.matrix[1][1] = (h << 16) / h2; t.matrix[1][2] = (y + dy) << 16; t.matrix[2][2] = 1 << 16; if (picture->transform) pixman_transform_multiply(&t, picture->transform, &t); DBG(("%s: applying transform [(%f, %f, %f), (%f, %f, %f), (%f, %f, %f)]\n", __FUNCTION__, pixman_fixed_to_double(t.matrix[0][0]), pixman_fixed_to_double(t.matrix[0][1]), pixman_fixed_to_double(t.matrix[0][2]), pixman_fixed_to_double(t.matrix[1][0]), pixman_fixed_to_double(t.matrix[1][1]), pixman_fixed_to_double(t.matrix[1][2]), pixman_fixed_to_double(t.matrix[2][0]), pixman_fixed_to_double(t.matrix[2][1]), pixman_fixed_to_double(t.matrix[2][2]))); pixman_image_set_transform(src, &t); sna_image_composite(PictOpSrc, src, NULL, dst, 0, 0, 0, 0, 0, 0, w2, h2); free_pixman_pict(picture, src); pixman_image_unref(dst); channel->width = w2; channel->height = h2; channel->filter = PictFilterNearest; channel->repeat = RepeatNone; channel->is_affine = true; channel->scale[0] = 1.f/w; channel->scale[1] = 1.f/h; channel->offset[0] = -dst_x; channel->offset[1] = -dst_y; channel->transform = NULL; return 1; } int sna_render_picture_fixup(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y) { pixman_image_t *dst, *src; int dx, dy; void *ptr; #if NO_FIXUP return -1; #endif DBG(("%s: (%d, %d)x(%d, %d)\n", __FUNCTION__, x, y, w, h)); if (w == 0 || h == 0) { DBG(("%s: fallback - unknown bounds\n", __FUNCTION__)); return -1; } if (w > sna->render.max_3d_size || h > sna->render.max_3d_size) { DBG(("%s: fallback - too large (%dx%d)\n", __FUNCTION__, w, h)); return -1; } if (picture->alphaMap) { DBG(("%s: alphamap\n", __FUNCTION__)); if (is_gpu(sna, picture->pDrawable, PREFER_GPU_RENDER) || is_gpu(sna, picture->alphaMap->pDrawable, PREFER_GPU_RENDER)) { if (sna_render_picture_flatten(sna, picture, channel, x, y, w, h, dst_x, dst_y)) return 1; } goto do_fixup; } if (picture->filter == PictFilterConvolution) { DBG(("%s: convolution\n", __FUNCTION__)); if (is_gpu(sna, picture->pDrawable, PREFER_GPU_RENDER)) { return sna_render_picture_convolve(sna, picture, channel, x, y, w, h, dst_x, dst_y); } goto do_fixup; } do_fixup: if (PICT_FORMAT_RGB(picture->format) == 0) channel->pict_format = PIXMAN_a8; else channel->pict_format = PIXMAN_a8r8g8b8; if (picture->pDrawable && !sna_drawable_move_to_cpu(picture->pDrawable, MOVE_READ)) return 0; channel->bo = kgem_create_buffer_2d(&sna->kgem, w, h, PIXMAN_FORMAT_BPP(channel->pict_format), KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!channel->bo) { DBG(("%s: failed to create upload buffer, using clear\n", __FUNCTION__)); return 0; } /* Composite in the original format to preserve idiosyncracies */ if (!kgem_buffer_is_inplace(channel->bo) && (picture->pDrawable == NULL || alphaless(picture->format) == alphaless(channel->pict_format))) dst = pixman_image_create_bits(channel->pict_format, w, h, ptr, channel->bo->pitch); else dst = pixman_image_create_bits((pixman_format_code_t)picture->format, w, h, NULL, 0); if (!dst) { kgem_bo_destroy(&sna->kgem, channel->bo); return 0; } src = image_from_pict(picture, false, &dx, &dy); if (src == NULL) { pixman_image_unref(dst); kgem_bo_destroy(&sna->kgem, channel->bo); return 0; } DBG(("%s: compositing tmp=(%d+%d, %d+%d)x(%d, %d)\n", __FUNCTION__, x, dx, y, dy, w, h)); sna_image_composite(PictOpSrc, src, NULL, dst, x + dx, y + dy, 0, 0, 0, 0, w, h); free_pixman_pict(picture, src); /* Then convert to card format */ if (pixman_image_get_data(dst) != ptr) { DBG(("%s: performing post-conversion %08x->%08x (%d, %d)\n", __FUNCTION__, picture->format, channel->pict_format, w, h)); src = dst; dst = pixman_image_create_bits(channel->pict_format, w, h, ptr, channel->bo->pitch); if (dst) { sna_image_composite(PictOpSrc, src, NULL, dst, 0, 0, 0, 0, 0, 0, w, h); pixman_image_unref(src); } else { memset(ptr, 0, __kgem_buffer_size(channel->bo)); dst = src; } } pixman_image_unref(dst); channel->width = w; channel->height = h; channel->filter = PictFilterNearest; channel->repeat = RepeatNone; channel->is_affine = true; channel->scale[0] = 1.f/w; channel->scale[1] = 1.f/h; channel->offset[0] = -dst_x; channel->offset[1] = -dst_y; channel->transform = NULL; return 1; } int sna_render_picture_convert(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, PixmapPtr pixmap, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y, bool fixup_alpha) { BoxRec box; #if NO_CONVERT return -1; #endif if (w != 0 && h != 0) { box.x1 = x; box.y1 = y; box.x2 = bound(x, w); box.y2 = bound(y, h); if (channel->transform) { DBG(("%s: has transform, converting whole surface\n", __FUNCTION__)); box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; } if (box.x1 < 0) box.x1 = 0; if (box.y1 < 0) box.y1 = 0; if (box.x2 > pixmap->drawable.width) box.x2 = pixmap->drawable.width; if (box.y2 > pixmap->drawable.height) box.y2 = pixmap->drawable.height; } else { DBG(("%s: op no bounds, converting whole surface\n", __FUNCTION__)); box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; } w = box.x2 - box.x1; h = box.y2 - box.y1; DBG(("%s: convert (%d, %d)x(%d, %d), source size %dx%d\n", __FUNCTION__, box.x1, box.y1, w, h, pixmap->drawable.width, pixmap->drawable.height)); if (w <= 0 || h <= 0) { DBG(("%s: sample extents lie outside of source, using clear\n", __FUNCTION__)); return 0; } if (fixup_alpha && is_gpu(sna, &pixmap->drawable, PREFER_GPU_RENDER)) { ScreenPtr screen = pixmap->drawable.pScreen; PixmapPtr tmp; PicturePtr src, dst; int error; assert(PICT_FORMAT_BPP(picture->format) == pixmap->drawable.bitsPerPixel); channel->pict_format = PICT_FORMAT(PICT_FORMAT_BPP(picture->format), PICT_FORMAT_TYPE(picture->format), PICT_FORMAT_BPP(picture->format) - PIXMAN_FORMAT_DEPTH(picture->format), PICT_FORMAT_R(picture->format), PICT_FORMAT_G(picture->format), PICT_FORMAT_B(picture->format)); DBG(("%s: converting to %08x from %08x using composite alpha-fixup\n", __FUNCTION__, (unsigned)channel->pict_format, (unsigned)picture->format)); tmp = screen->CreatePixmap(screen, w, h, pixmap->drawable.bitsPerPixel, SNA_CREATE_SCRATCH); if (tmp == NULL) return -1; assert(__sna_pixmap_get_bo(tmp)); dst = CreatePicture(0, &tmp->drawable, PictureMatchFormat(screen, pixmap->drawable.bitsPerPixel, channel->pict_format), 0, NULL, serverClient, &error); if (dst == NULL) { screen->DestroyPixmap(tmp); return 0; } src = CreatePicture(0, &pixmap->drawable, PictureMatchFormat(screen, pixmap->drawable.depth, picture->format), 0, NULL, serverClient, &error); if (src == NULL) { FreePicture(dst, 0); screen->DestroyPixmap(tmp); return 0; } ValidatePicture(src); ValidatePicture(dst); sna_composite(PictOpSrc, src, NULL, dst, box.x1, box.y1, 0, 0, 0, 0, w, h); FreePicture(dst, 0); FreePicture(src, 0); channel->bo = __sna_pixmap_get_bo(tmp); kgem_bo_reference(channel->bo); screen->DestroyPixmap(tmp); } else { pixman_image_t *src, *dst; void *ptr; if (!sna_pixmap_move_to_cpu(pixmap, MOVE_READ)) return 0; src = pixman_image_create_bits((pixman_format_code_t)picture->format, pixmap->drawable.width, pixmap->drawable.height, pixmap->devPrivate.ptr, pixmap->devKind); if (!src) return 0; if (PICT_FORMAT_RGB(picture->format) == 0) { channel->pict_format = PIXMAN_a8; DBG(("%s: converting to a8 from %08x\n", __FUNCTION__, picture->format)); } else { channel->pict_format = PIXMAN_a8r8g8b8; DBG(("%s: converting to a8r8g8b8 from %08x\n", __FUNCTION__, picture->format)); } channel->bo = kgem_create_buffer_2d(&sna->kgem, w, h, PIXMAN_FORMAT_BPP(channel->pict_format), KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!channel->bo) { pixman_image_unref(src); return 0; } dst = pixman_image_create_bits(channel->pict_format, w, h, ptr, channel->bo->pitch); if (!dst) { kgem_bo_destroy(&sna->kgem, channel->bo); pixman_image_unref(src); return 0; } if (sigtrap_get() == 0) { sna_image_composite(PictOpSrc, src, NULL, dst, box.x1, box.y1, 0, 0, 0, 0, w, h); sigtrap_put(); } pixman_image_unref(dst); pixman_image_unref(src); } channel->width = w; channel->height = h; channel->scale[0] = 1.f/w; channel->scale[1] = 1.f/h; channel->offset[0] = x - dst_x - box.x1; channel->offset[1] = y - dst_y - box.y1; DBG(("%s: offset=(%d, %d), size=(%d, %d)\n", __FUNCTION__, channel->offset[0], channel->offset[1], channel->width, channel->height)); return 1; } bool sna_render_composite_redirect(struct sna *sna, struct sna_composite_op *op, int x, int y, int width, int height, bool partial) { struct sna_composite_redirect *t = &op->redirect; int bpp = op->dst.pixmap->drawable.bitsPerPixel; struct kgem_bo *bo; assert(t->real_bo == NULL); #if NO_REDIRECT return false; #endif DBG(("%s: target too large (%dx%d), copying to temporary %dx%d, max %d / %d\n", __FUNCTION__, op->dst.width, op->dst.height, width, height, sna->render.max_3d_size, sna->render.max_3d_pitch)); if (!width || !height) return false; if (width > sna->render.max_3d_size || height > sna->render.max_3d_size) return false; if (op->dst.bo->pitch <= sna->render.max_3d_pitch) { BoxRec box; int w, h, offset; DBG(("%s: dst pitch (%d) fits within render pipeline (%d)\n", __FUNCTION__, op->dst.bo->pitch, sna->render.max_3d_pitch)); box.x1 = x + op->dst.x; box.x2 = bound(box.x1, width); box.y1 = y + op->dst.y; box.y2 = bound(box.y1, height); if (box.x1 < 0) box.x1 = 0; if (box.y1 < 0) box.y1 = 0; /* Ensure we align to an even tile row */ if (op->dst.bo->tiling) { int tile_width, tile_height, tile_size; kgem_get_tile_size(&sna->kgem, op->dst.bo->tiling, op->dst.bo->pitch, &tile_width, &tile_height, &tile_size); box.y1 = box.y1 & ~(2*tile_height - 1); box.y2 = ALIGN(box.y2, 2*tile_height); box.x1 = box.x1 & ~(tile_width * 8 / op->dst.pixmap->drawable.bitsPerPixel - 1); box.x2 = ALIGN(box.x2, tile_width * 8 / op->dst.pixmap->drawable.bitsPerPixel); if (box.x1 > sna->render.max_3d_size && box.x2 <= 2*sna->render.max_3d_size) box.x1 = sna->render.max_3d_size; if (box.y1 > sna->render.max_3d_size && box.y2 <= 2*sna->render.max_3d_size) box.y1 = sna->render.max_3d_size; offset = box.x1 * op->dst.pixmap->drawable.bitsPerPixel / 8 / tile_width * tile_size; } else { if (sna->kgem.gen < 040) { box.y1 = box.y1 & ~3; box.y2 = ALIGN(box.y2, 4); box.x1 = box.x1 & ~3; box.x2 = ALIGN(box.x2, 4); } else { box.y1 = box.y1 & ~1; box.y2 = ALIGN(box.y2, 2); box.x1 = box.x1 & ~1; box.x2 = ALIGN(box.x2, 2); } if (box.x1 > sna->render.max_3d_size && box.x2 <= 2*sna->render.max_3d_size) box.x1 = sna->render.max_3d_size; if (box.y1 > sna->render.max_3d_size && box.y2 <= 2*sna->render.max_3d_size) box.y1 = sna->render.max_3d_size; offset = box.x1 * op->dst.pixmap->drawable.bitsPerPixel / 8; } if (box.y2 > op->dst.pixmap->drawable.height) box.y2 = op->dst.pixmap->drawable.height; if (box.x2 > op->dst.pixmap->drawable.width) box.x2 = op->dst.pixmap->drawable.width; w = box.x2 - box.x1; h = box.y2 - box.y1; DBG(("%s box=(%d, %d), (%d, %d): (%d, %d)/(%d, %d), max %d\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2, w, h, op->dst.pixmap->drawable.width, op->dst.pixmap->drawable.height, sna->render.max_3d_size)); if (w <= sna->render.max_3d_size && h <= sna->render.max_3d_size) { t->box.x2 = t->box.x1 = op->dst.x; t->box.y2 = t->box.y1 = op->dst.y; t->real_bo = op->dst.bo; t->real_damage = op->damage; if (op->damage) { assert(!DAMAGE_IS_ALL(op->damage)); t->damage = sna_damage_create(); op->damage = &t->damage; } /* How many tiles across are we? */ op->dst.bo = kgem_create_proxy(&sna->kgem, op->dst.bo, box.y1 * op->dst.bo->pitch + offset, h * op->dst.bo->pitch); if (!op->dst.bo) { t->real_bo = NULL; if (t->damage) __sna_damage_destroy(t->damage); return false; } assert(op->dst.bo != t->real_bo); op->dst.bo->pitch = t->real_bo->pitch; op->dst.x -= box.x1; op->dst.y -= box.y1; op->dst.width = w; op->dst.height = h; return true; } } /* We can process the operation in a single pass, * but the target is too large for the 3D pipeline. * Copy into a smaller surface and replace afterwards. */ bo = kgem_create_2d(&sna->kgem, width, height, bpp, kgem_choose_tiling(&sna->kgem, I915_TILING_X, width, height, bpp), CREATE_TEMPORARY); if (!bo) return false; t->box.x1 = x + op->dst.x; t->box.y1 = y + op->dst.y; t->box.x2 = bound(t->box.x1, width); t->box.y2 = bound(t->box.y1, height); DBG(("%s: original box (%d, %d), (%d, %d)\n", __FUNCTION__, t->box.x1, t->box.y1, t->box.x2, t->box.y2)); if (partial && !sna_blt_copy_boxes(sna, GXcopy, op->dst.bo, 0, 0, bo, -t->box.x1, -t->box.y1, bpp, &t->box, 1)) { kgem_bo_destroy(&sna->kgem, bo); return false; } t->real_bo = op->dst.bo; t->real_damage = op->damage; if (op->damage) { assert(!DAMAGE_IS_ALL(op->damage)); t->damage = sna_damage_create(); op->damage = &t->damage; } op->dst.bo = bo; op->dst.x = -x; op->dst.y = -y; op->dst.width = width; op->dst.height = height; return true; } void sna_render_composite_redirect_done(struct sna *sna, const struct sna_composite_op *op) { const struct sna_composite_redirect *t = &op->redirect; if (t->real_bo) { assert(op->dst.bo != t->real_bo); if (t->box.x2 > t->box.x1) { bool ok; DBG(("%s: copying temporary to dst\n", __FUNCTION__)); ok = sna_blt_copy_boxes(sna, GXcopy, op->dst.bo, -t->box.x1, -t->box.y1, t->real_bo, 0, 0, op->dst.pixmap->drawable.bitsPerPixel, &t->box, 1); assert(ok); (void)ok; } if (t->damage) { DBG(("%s: combining damage (all? %d), offset=(%d, %d)\n", __FUNCTION__, (int)DAMAGE_IS_ALL(t->damage), t->box.x1, t->box.y1)); sna_damage_combine(t->real_damage, DAMAGE_PTR(t->damage), t->box.x1, t->box.y1); __sna_damage_destroy(DAMAGE_PTR(t->damage)); } kgem_bo_destroy(&sna->kgem, op->dst.bo); } } static bool copy_overlap(struct sna *sna, uint8_t alu, const DrawableRec *draw, struct kgem_bo *bo, int16_t src_dx, int16_t src_dy, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, const BoxRec *extents) { ScreenPtr screen = draw->pScreen; struct kgem_bo *tmp_bo; PixmapPtr tmp; bool ret = false; if (n == 0) return true; DBG(("%s: %d x %dx%d src=(%d, %d), dst=(%d, %d)\n", __FUNCTION__, n, extents->x2 - extents->x1, extents->y2 - extents->y1, src_dx, src_dy, dst_dx, dst_dy)); tmp = screen->CreatePixmap(screen, extents->x2 - extents->x1, extents->y2 - extents->y1, draw->depth, SNA_CREATE_SCRATCH); if (tmp == NULL) return false; tmp_bo = __sna_pixmap_get_bo(tmp); assert(tmp_bo); ret = (sna->render.copy_boxes(sna, GXcopy, draw, bo, src_dx, src_dy, &tmp->drawable, tmp_bo, -extents->x1, -extents->y1, box, n , 0) && sna->render.copy_boxes(sna, alu, &tmp->drawable, tmp_bo, -extents->x1, -extents->y1, draw, bo, dst_dx, dst_dy, box, n , 0)); screen->DestroyPixmap(tmp); return ret; } bool sna_render_copy_boxes__overlap(struct sna *sna, uint8_t alu, const DrawableRec *draw, struct kgem_bo *bo, int16_t src_dx, int16_t src_dy, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, const BoxRec *extents) { bool ret = false; RegionRec overlap, non_overlap; pixman_region16_t region; pixman_box16_t stack_boxes[64], *boxes = stack_boxes; int num_boxes, i; DBG(("%s: pixmap=%ld, handle=%d, %d x [(%d, %d), (%d, %d)], dst=(%d, %d), src=(%d, %d)\n", __FUNCTION__, draw->serialNumber, bo->handle, n, extents->x1, extents->y1, extents->x2, extents->y2, src_dx, src_dy, dst_dx, dst_dy)); if ((dst_dx - src_dx < 4 && src_dx - dst_dx < 4) && (dst_dy - src_dy < 4 && src_dy - dst_dy < 4)) return copy_overlap(sna, alu, draw, bo, src_dx, src_dy, dst_dx, dst_dy, box, n, extents); if (n > ARRAY_SIZE(stack_boxes)) { boxes = malloc(sizeof(pixman_box16_t) * n); if (boxes == NULL) return copy_overlap(sna, alu, draw, bo, src_dx, src_dy, dst_dx, dst_dy, box, n, extents); } region.extents.x1 = extents->x1 + dst_dx; region.extents.x2 = extents->x2 + dst_dx; region.extents.y1 = extents->y1 + dst_dy; region.extents.y2 = extents->y2 + dst_dy; for (i = num_boxes = 0; i < n; i++) { boxes[num_boxes].x1 = box[i].x1 + dst_dx; if (boxes[num_boxes].x1 < region.extents.x1) boxes[num_boxes].x1 = region.extents.x1; boxes[num_boxes].y1 = box[i].y1 + dst_dy; if (boxes[num_boxes].y1 < region.extents.y1) boxes[num_boxes].y1 = region.extents.y1; boxes[num_boxes].x2 = box[i].x2 + dst_dx; if (boxes[num_boxes].x2 > region.extents.x2) boxes[num_boxes].x2 = region.extents.x2; boxes[num_boxes].y2 = box[i].y2 + dst_dy; if (boxes[num_boxes].y2 > region.extents.y2) boxes[num_boxes].y2 = region.extents.y2; if (boxes[num_boxes].x2 > boxes[num_boxes].x1 && boxes[num_boxes].y2 > boxes[num_boxes].y1) num_boxes++; } if (num_boxes == 0) { ret = true; goto cleanup_boxes; } if (!pixman_region_init_rects(®ion, boxes, num_boxes)) goto cleanup_boxes; overlap.extents.x1 = extents->x1 + src_dx; overlap.extents.x2 = extents->x2 + src_dx; overlap.extents.y1 = extents->y1 + src_dy; overlap.extents.y2 = extents->y2 + src_dy; overlap.data = NULL; RegionIntersect(&overlap, &overlap, ®ion); DBG(("%s: overlapping extents: (%d, %d), (%d, %d) x %d\n", __FUNCTION__, overlap.extents.x1, overlap.extents.y1, overlap.extents.x2, overlap.extents.y2, region_num_rects(&overlap))); RegionNull(&non_overlap); RegionSubtract(&non_overlap, ®ion, &overlap); DBG(("%s: non-overlapping extents: (%d, %d), (%d, %d) x %d\n", __FUNCTION__, non_overlap.extents.x1, non_overlap.extents.y1, non_overlap.extents.x2, non_overlap.extents.y2, region_num_rects(&non_overlap))); n = region_num_rects(&non_overlap); box = region_rects(&non_overlap); if (n && !sna->render.copy_boxes(sna, alu, draw, bo, -dst_dx + src_dx, -dst_dy + src_dy, draw, bo, 0, 0, box, n , COPY_NO_OVERLAP)) goto cleanup_boxes; n = region_num_rects(&overlap); box = region_rects(&overlap); ret = copy_overlap(sna, alu, draw, bo, -dst_dx + src_dx, -dst_dy + src_dy, 0, 0, box, n, &overlap.extents); cleanup_boxes: if (boxes != stack_boxes) free(boxes); return ret; } static bool can_copy_cpu(struct sna *sna, struct kgem_bo *src, struct kgem_bo *dst) { if (src->tiling != dst->tiling) return false; if (src->pitch != dst->pitch) return false; if (!kgem_bo_can_map__cpu(&sna->kgem, src, false)) return false; if (!kgem_bo_can_map__cpu(&sna->kgem, dst, true)) return false; DBG(("%s -- yes, src handle=%d, dst handle=%d\n", __FUNCTION__, src->handle, dst->handle)); return true; } bool memcpy_copy_boxes(struct sna *sna, uint8_t op, const DrawableRec *src_draw, struct kgem_bo *src_bo, int16_t sx, int16_t sy, const DrawableRec *dst_draw, struct kgem_bo *dst_bo, int16_t dx, int16_t dy, const BoxRec *box, int n, unsigned flags) { void *dst, *src; bool clipped; if (op != GXcopy) return false; clipped = (n > 1 || box->x1 + dx > 0 || box->y1 + dy > 0 || box->x2 + dx < dst_draw->width || box->y2 + dy < dst_draw->height); dst = src = NULL; if (!clipped && can_copy_cpu(sna, src_bo, dst_bo)) { dst = kgem_bo_map__cpu(&sna->kgem, dst_bo); src = kgem_bo_map__cpu(&sna->kgem, src_bo); } if (dst == NULL || src == NULL) { dst = kgem_bo_map__gtt(&sna->kgem, dst_bo); src = kgem_bo_map__gtt(&sna->kgem, src_bo); if (dst == NULL || src == NULL) return false; } else { kgem_bo_sync__cpu_full(&sna->kgem, dst_bo, true); kgem_bo_sync__cpu_full(&sna->kgem, src_bo, false); } DBG(("%s: src(%d, %d), dst(%d, %d) x %d\n", __FUNCTION__, sx, sy, dx, dy, n)); if (sigtrap_get() == 0) { do { memcpy_blt(src, dst, dst_draw->bitsPerPixel, src_bo->pitch, dst_bo->pitch, box->x1 + sx, box->y1 + sy, box->x1 + dx, box->y1 + dy, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); sigtrap_put(); } return true; } void sna_render_mark_wedged(struct sna *sna) { sna->render.copy_boxes = memcpy_copy_boxes; } xf86-video-intel-2.99.917/src/sna/Makefile.am0000664000175000017500000000720612444634673015355 00000000000000# Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL # ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER # IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. SUBDIRS = brw fb AM_CFLAGS = \ @CWARNFLAGS@ \ -I$(top_srcdir)/src \ -I$(top_srcdir)/src/render_program \ $(XORG_CFLAGS) \ $(UDEV_CFLAGS) \ $(DRM_CFLAGS) \ $(NULL) if VALGRIND AM_CFLAGS += $(VALGRIND_CFLAGS) endif noinst_LTLIBRARIES = libsna.la libsna_la_LDFLAGS = -pthread libsna_la_LIBADD = $(UDEV_LIBS) -lm $(DRM_LIBS) brw/libbrw.la fb/libfb.la ../../libobj/libcompat.la libsna_la_SOURCES = \ atomic.h \ blt.c \ compiler.h \ debug.h \ kgem.c \ kgem.h \ rop.h \ sna.h \ sna_accel.c \ sna_acpi.c \ sna_blt.c \ sna_composite.c \ sna_cpu.c \ sna_cpuid.h \ sna_damage.c \ sna_damage.h \ sna_display.c \ sna_display_fake.c \ sna_driver.c \ sna_glyphs.c \ sna_gradient.c \ sna_io.c \ sna_module.h \ sna_render.c \ sna_render.h \ sna_render_inline.h \ sna_reg.h \ sna_stream.c \ sna_trapezoids.h \ sna_trapezoids.c \ sna_trapezoids_boxes.c \ sna_trapezoids_imprecise.c \ sna_trapezoids_mono.c \ sna_trapezoids_precise.c \ sna_tiling.c \ sna_transform.c \ sna_threads.c \ sna_vertex.c \ sna_video.c \ sna_video.h \ sna_video_overlay.c \ sna_video_sprite.c \ sna_video_textured.c \ gen2_render.c \ gen2_render.h \ gen3_render.c \ gen3_render.h \ gen4_common.c \ gen4_common.h \ gen4_render.c \ gen4_render.h \ gen4_source.c \ gen4_source.h \ gen4_vertex.c \ gen4_vertex.h \ gen5_render.c \ gen5_render.h \ gen6_common.c \ gen6_common.h \ gen6_render.c \ gen6_render.h \ gen7_render.c \ gen7_render.h \ gen8_eu.c \ gen8_eu.h \ gen8_render.c \ gen8_render.h \ gen8_vertex.c \ gen8_vertex.h \ xassert.h \ $(NULL) if DRI2 AM_CFLAGS += $(DRI2_CFLAGS) libsna_la_SOURCES += sna_dri2.c libsna_la_LIBADD += $(DRI2_LIBS) @CLOCK_GETTIME_LIBS@ endif if DRI3 AM_CFLAGS += $(DRI3_CFLAGS) libsna_la_SOURCES += sna_dri3.c libsna_la_LIBADD += $(DRI3_LIBS) endif if PRESENT AM_CFLAGS += $(PRESENT_CFLAGS) libsna_la_SOURCES += sna_present.c libsna_la_LIBADD += $(PRESENT_LIBS) endif if XVMC libsna_la_SOURCES += \ sna_video_hwmc.h \ sna_video_hwmc.c \ $(NULL) endif if FULL_DEBUG libsna_la_SOURCES += \ kgem_debug.c \ kgem_debug.h \ kgem_debug_gen2.c \ kgem_debug_gen3.c \ kgem_debug_gen4.c \ kgem_debug_gen5.c \ kgem_debug_gen6.c \ kgem_debug_gen7.c \ $(NULL) endif if HAVE_DOT_GIT git_version.h: $(top_srcdir)/.git/HEAD $(shell sed -e '/ref:/!d' -e 's#ref: *#$(top_srcdir)/.git/#' < $(top_srcdir)/.git/HEAD) @echo "Recording git-tree used for compilation: `git describe`" @V=`git describe`; echo "static const char git_version[] = \"$$V\";" > git_version.h sna_driver.c: git_version.h endif AM_CFLAGS += @NOWARNFLAGS@ xf86-video-intel-2.99.917/src/sna/sna_module.h0000664000175000017500000000006612244635610015603 00000000000000Bool sna_init_scrn(ScrnInfoPtr scrn, int entity_num); xf86-video-intel-2.99.917/src/sna/gen6_common.c0000664000175000017500000000423112400044327015646 00000000000000/* * Copyright © 2011-2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "gen6_common.h" #include "gen4_vertex.h" void gen6_render_context_switch(struct kgem *kgem, int new_mode) { if (kgem->nbatch) { DBG(("%s: from %d to %d, submit batch\n", __FUNCTION__, kgem->mode, new_mode)); _kgem_submit(kgem); } if (kgem->nexec) { DBG(("%s: from %d to %d, reset incomplete batch\n", __FUNCTION__, kgem->mode, new_mode)); kgem_reset(kgem); } assert(kgem->nbatch == 0); assert(kgem->nreloc == 0); assert(kgem->nexec == 0); kgem->ring = new_mode; } void gen6_render_retire(struct kgem *kgem) { struct sna *sna; if (kgem->ring && (kgem->has_semaphores || !kgem->need_retire)) kgem->ring = kgem->mode; sna = container_of(kgem, struct sna, kgem); if (sna->render.nvertex_reloc == 0 && sna->render.vbo && !kgem_bo_is_busy(sna->render.vbo)) { DBG(("%s: resetting idle vbo\n", __FUNCTION__)); sna->render.vertex_used = 0; sna->render.vertex_index = 0; } } xf86-video-intel-2.99.917/src/sna/gen8_eu.h0000664000175000017500000000156612400044327015006 00000000000000#ifndef GEN8_EU_H #define GEN8_EU_H #include "brw/brw_eu.h" bool gen8_wm_kernel__affine(struct brw_compile *p, int dispatch_width); bool gen8_wm_kernel__affine_mask(struct brw_compile *p, int dispatch_width); bool gen8_wm_kernel__affine_mask_ca(struct brw_compile *p, int dispatch_width); bool gen8_wm_kernel__affine_mask_sa(struct brw_compile *p, int dispatch_width); bool gen8_wm_kernel__projective(struct brw_compile *p, int dispatch_width); bool gen8_wm_kernel__projective_mask(struct brw_compile *p, int dispatch_width); bool gen8_wm_kernel__projective_mask_ca(struct brw_compile *p, int dispatch_width); bool gen8_wm_kernel__projective_mask_sa(struct brw_compile *p, int dispatch_width); bool gen8_wm_kernel__affine_opacity(struct brw_compile *p, int dispatch_width); bool gen8_wm_kernel__projective_opacity(struct brw_compile *p, int dispatch_width); #endif /* GEN8_EU_H */ xf86-video-intel-2.99.917/src/sna/sna_acpi.c0000664000175000017500000001176712400044327015230 00000000000000/* * Copyright (c) 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include "sna.h" #define ACPI_SOCKET "/var/run/acpid.socket" int sna_acpi_open(void) { struct sockaddr_un addr; int fd, ret; DBG(("%s\n", __FUNCTION__)); fd = socket(AF_UNIX, SOCK_STREAM, 0); if (fd < 0) return -1; memset(&addr, 0, sizeof(addr)); addr.sun_family = AF_UNIX; strcpy(addr.sun_path, ACPI_SOCKET); ret = connect(fd, (struct sockaddr *)&addr, sizeof(addr)); if (ret < 0) { close(fd); return -1; } DBG(("%s: opened socket to APCI daemon, fd=%d\n", __FUNCTION__, fd)); return fd; } void _sna_acpi_wakeup(struct sna *sna) { char *eol; int n; n = read(sna->acpi.fd, sna->acpi.event + sna->acpi.offset, sna->acpi.remain); DBG(("%s: read %d bytes from acpid\n", __FUNCTION__, n)); if (n <= 0) { /* We will get '0' if we run out of space whilst reading * one event - that should never happen, so treat it as * an error and give up. */ if (n < 0) n = errno; switch (n) { case EAGAIN: case EINTR: return; } DBG(("%s: error [%d], detaching from acpid\n", __FUNCTION__, n)); /* XXX reattach later? */ RemoveGeneralSocket(sna->acpi.fd); sna_acpi_fini(sna); return; } sna->acpi.event[sna->acpi.offset + n] = '\0'; sna->acpi.offset += n; sna->acpi.remain -= n; DBG(("%s: event string [%d]: '%s'\n", __FUNCTION__, sna->acpi.offset, sna->acpi.event)); do { eol = strchr(sna->acpi.event, '\n'); if (eol == NULL) return; if (strncmp(sna->acpi.event, "ac_adapter", 10) == 0) { char *space = sna->acpi.event; int state = -1; /* ac_adapter ACAD 00000080 00000001 */ space = strchr(space, ' '); if (space) space = strchr(space + 1, ' '); if (space) space = strchr(space + 1, ' '); if (space) state = atoi(space + 1); DBG(("%s: ac_adapter event new state=%d\n", __FUNCTION__, state)); if (state) sna->flags &= ~SNA_POWERSAVE; else sna->flags |= SNA_POWERSAVE; } n = (sna->acpi.event + sna->acpi.offset) - ++eol; memmove(sna->acpi.event, eol, n+1); sna->acpi.offset = n; sna->acpi.remain = sizeof(sna->acpi.event) - 1 - n; } while (n); } static int read_power_state(const char *path) { DIR *dir; struct dirent *de; int i = -1; DBG(("%s: searching '%s'\n", __FUNCTION__, path)); dir = opendir(path); if (dir == NULL) return -1; while ((de = readdir(dir))) { char buf[1024]; int fd; if (*de->d_name == '.') continue; DBG(("%s: checking '%s'\n", __FUNCTION__, de->d_name)); snprintf(buf, sizeof(buf), "%s/%s/type", path, de->d_name); fd = open(buf, 0); if (fd < 0) continue; i = read(fd, buf, sizeof(buf)); buf[i > 0 ? i - 1: 0] = '\0'; close(fd); DBG(("%s: %s is of type '%s'\n", __FUNCTION__, de->d_name, buf)); if (strcmp(buf, "Mains")) continue; snprintf(buf, sizeof(buf), "%s/%s/online", path, de->d_name); fd = open(buf, 0); if (fd < 0) continue; i = read(fd, buf, sizeof(buf)); buf[i > 0 ? i - 1: 0] = '\0'; if (i > 0) i = atoi(buf); DBG(("%s: %s is online? '%s'\n", __FUNCTION__, de->d_name, buf)); close(fd); break; } closedir(dir); return i; } void sna_acpi_init(struct sna *sna) { if (sna->acpi.fd < 0) return; if (sna->flags & SNA_PERFORMANCE) return; DBG(("%s: attaching to acpid\n", __FUNCTION__)); AddGeneralSocket(sna->acpi.fd); sna->acpi.remain = sizeof(sna->acpi.event) - 1; sna->acpi.offset = 0; /* Read initial states */ if (read_power_state("/sys/class/power_supply") == 0) { DBG(("%s: AC adapter is currently offline\n", __FUNCTION__)); sna->flags |= SNA_POWERSAVE; } } void sna_acpi_fini(struct sna *sna) { if (sna->acpi.fd < 0) return; close(sna->acpi.fd); sna->acpi.fd = -1; sna->flags &= ~SNA_POWERSAVE; } xf86-video-intel-2.99.917/src/sna/gen4_source.c0000664000175000017500000001311612244635610015665 00000000000000/* * Copyright © 2011,2012,2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "gen4_source.h" #include "gen4_render.h" bool gen4_channel_init_solid(struct sna *sna, struct sna_composite_channel *channel, uint32_t color) { channel->filter = PictFilterNearest; channel->repeat = RepeatNormal; channel->is_affine = true; channel->is_solid = true; channel->is_opaque = (color >> 24) == 0xff; channel->transform = NULL; channel->width = 1; channel->height = 1; channel->pict_format = PICT_a8r8g8b8; channel->card_format = GEN4_SURFACEFORMAT_B8G8R8A8_UNORM; channel->bo = sna_render_get_solid(sna, color); channel->scale[0] = channel->scale[1] = 1; channel->offset[0] = channel->offset[1] = 0; return channel->bo != NULL; } bool gen4_channel_init_linear(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int x, int y, int w, int h, int dst_x, int dst_y) { PictLinearGradient *linear = (PictLinearGradient *)picture->pSourcePict; pixman_fixed_t tx, ty; float x0, y0, sf; float dx, dy; DBG(("%s: p1=(%f, %f), p2=(%f, %f), src=(%d, %d), dst=(%d, %d), size=(%d, %d)\n", __FUNCTION__, pixman_fixed_to_double(linear->p1.x), pixman_fixed_to_double(linear->p1.y), pixman_fixed_to_double(linear->p2.x), pixman_fixed_to_double(linear->p2.y), x, y, dst_x, dst_y, w, h)); if (linear->p2.x == linear->p1.x && linear->p2.y == linear->p1.y) return 0; if (!sna_transform_is_affine(picture->transform)) { DBG(("%s: fallback due to projective transform\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } channel->bo = sna_render_get_gradient(sna, (PictGradient *)linear); if (!channel->bo) return 0; channel->filter = PictFilterNearest; channel->repeat = picture->repeat ? picture->repeatType : RepeatNone; channel->width = channel->bo->pitch / 4; channel->height = 1; channel->pict_format = PICT_a8r8g8b8; channel->card_format = GEN4_SURFACEFORMAT_B8G8R8A8_UNORM; channel->is_linear = 1; channel->is_affine = 1; channel->scale[0] = channel->scale[1] = 1; channel->offset[0] = channel->offset[1] = 0; if (sna_transform_is_translation(picture->transform, &tx, &ty)) { dx = pixman_fixed_to_double(linear->p2.x - linear->p1.x); dy = pixman_fixed_to_double(linear->p2.y - linear->p1.y); x0 = pixman_fixed_to_double(linear->p1.x); y0 = pixman_fixed_to_double(linear->p1.y); if (tx | ty) { x0 -= pixman_fixed_to_double(tx); y0 -= pixman_fixed_to_double(ty); } } else { struct pixman_f_vector p1, p2; struct pixman_f_transform m, inv; pixman_f_transform_from_pixman_transform(&m, picture->transform); DBG(("%s: transform = [%f %f %f, %f %f %f, %f %f %f]\n", __FUNCTION__, m.m[0][0], m.m[0][1], m.m[0][2], m.m[1][0], m.m[1][1], m.m[1][2], m.m[2][0], m.m[2][1], m.m[2][2])); if (!pixman_f_transform_invert(&inv, &m)) return 0; p1.v[0] = pixman_fixed_to_double(linear->p1.x); p1.v[1] = pixman_fixed_to_double(linear->p1.y); p1.v[2] = 1.; pixman_f_transform_point(&inv, &p1); p2.v[0] = pixman_fixed_to_double(linear->p2.x); p2.v[1] = pixman_fixed_to_double(linear->p2.y); p2.v[2] = 1.; pixman_f_transform_point(&inv, &p2); DBG(("%s: untransformed: p1=(%f, %f, %f), p2=(%f, %f, %f)\n", __FUNCTION__, p1.v[0], p1.v[1], p1.v[2], p2.v[0], p2.v[1], p2.v[2])); dx = p2.v[0] - p1.v[0]; dy = p2.v[1] - p1.v[1]; x0 = p1.v[0]; y0 = p1.v[1]; } sf = dx*dx + dy*dy; dx /= sf; dy /= sf; channel->u.linear.dx = dx; channel->u.linear.dy = dy; channel->u.linear.offset = -dx*(x0+dst_x-x) + -dy*(y0+dst_y-y); channel->embedded_transform.matrix[0][0] = pixman_double_to_fixed(dx); channel->embedded_transform.matrix[0][1] = pixman_double_to_fixed(dy); channel->embedded_transform.matrix[0][2] = pixman_double_to_fixed(channel->u.linear.offset); channel->embedded_transform.matrix[1][0] = 0; channel->embedded_transform.matrix[1][1] = 0; channel->embedded_transform.matrix[1][2] = pixman_double_to_fixed(.5); channel->embedded_transform.matrix[2][0] = 0; channel->embedded_transform.matrix[2][1] = 0; channel->embedded_transform.matrix[2][2] = pixman_fixed_1; channel->transform = &channel->embedded_transform; DBG(("%s: dx=%f, dy=%f, offset=%f\n", __FUNCTION__, dx, dy, channel->u.linear.offset)); return channel->bo != NULL; } xf86-video-intel-2.99.917/src/sna/sna_blt.c0000664000175000017500000034360212433116260015073 00000000000000/* * Based on code from intel_uxa.c and i830_xaa.c * Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. * Copyright (c) 2005 Jesse Barnes * Copyright (c) 2009-2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_reg.h" #include "rop.h" #define NO_BLT_COMPOSITE 0 #define NO_BLT_COPY 0 #define NO_BLT_COPY_BOXES 0 #define NO_BLT_FILL 0 #define NO_BLT_FILL_BOXES 0 #ifndef PICT_TYPE_BGRA #define PICT_TYPE_BGRA 8 #endif static const uint8_t copy_ROP[] = { ROP_0, /* GXclear */ ROP_DSa, /* GXand */ ROP_SDna, /* GXandReverse */ ROP_S, /* GXcopy */ ROP_DSna, /* GXandInverted */ ROP_D, /* GXnoop */ ROP_DSx, /* GXxor */ ROP_DSo, /* GXor */ ROP_DSon, /* GXnor */ ROP_DSxn, /* GXequiv */ ROP_Dn, /* GXinvert */ ROP_SDno, /* GXorReverse */ ROP_Sn, /* GXcopyInverted */ ROP_DSno, /* GXorInverted */ ROP_DSan, /* GXnand */ ROP_1 /* GXset */ }; static const uint8_t fill_ROP[] = { ROP_0, ROP_DPa, ROP_PDna, ROP_P, ROP_DPna, ROP_D, ROP_DPx, ROP_DPo, ROP_DPon, ROP_PDxn, ROP_Dn, ROP_PDno, ROP_Pn, ROP_DPno, ROP_DPan, ROP_1 }; static void nop_done(struct sna *sna, const struct sna_composite_op *op) { assert(sna->kgem.nbatch <= KGEM_BATCH_SIZE(&sna->kgem)); if (sna->kgem.nexec > 1 && __kgem_ring_empty(&sna->kgem)) { DBG(("%s: flushing BLT operation on empty ring\n", __FUNCTION__)); _kgem_submit(&sna->kgem); } (void)op; } static void gen6_blt_copy_done(struct sna *sna, const struct sna_composite_op *op) { struct kgem *kgem = &sna->kgem; assert(kgem->nbatch <= KGEM_BATCH_SIZE(kgem)); if (kgem->nexec > 1 && __kgem_ring_empty(kgem)) { DBG(("%s: flushing BLT operation on empty ring\n", __FUNCTION__)); _kgem_submit(kgem); return; } if (kgem_check_batch(kgem, 3)) { uint32_t *b = kgem->batch + kgem->nbatch; assert(sna->kgem.mode == KGEM_BLT); b[0] = XY_SETUP_CLIP; b[1] = b[2] = 0; kgem->nbatch += 3; assert(kgem->nbatch < kgem->surface); } assert(sna->kgem.nbatch <= KGEM_BATCH_SIZE(&sna->kgem)); (void)op; } static bool sna_blt_fill_init(struct sna *sna, struct sna_blt_state *blt, struct kgem_bo *bo, int bpp, uint8_t alu, uint32_t pixel) { struct kgem *kgem = &sna->kgem; assert(kgem_bo_can_blt (kgem, bo)); assert(bo->tiling != I915_TILING_Y); blt->bo[0] = bo; blt->br13 = bo->pitch; blt->cmd = XY_SCANLINE_BLT; if (kgem->gen >= 040 && bo->tiling) { blt->cmd |= BLT_DST_TILED; blt->br13 >>= 2; } assert(blt->br13 <= MAXSHORT); if (alu == GXclear) pixel = 0; else if (alu == GXcopy) { if (pixel == 0) alu = GXclear; else if (pixel == -1) alu = GXset; } blt->br13 |= 1<<31 | (fill_ROP[alu] << 16); switch (bpp) { default: assert(0); case 32: blt->br13 |= 1 << 25; /* RGB8888 */ case 16: blt->br13 |= 1 << 24; /* RGB565 */ case 8: break; } blt->pixel = pixel; blt->bpp = bpp; blt->alu = alu; kgem_set_mode(kgem, KGEM_BLT, bo); if (!kgem_check_batch(kgem, 14) || !kgem_check_bo_fenced(kgem, bo)) { kgem_submit(kgem); if (!kgem_check_bo_fenced(kgem, bo)) return false; _kgem_set_mode(kgem, KGEM_BLT); } if (sna->blt_state.fill_bo != bo->unique_id || sna->blt_state.fill_pixel != pixel || sna->blt_state.fill_alu != alu) { uint32_t *b; if (!kgem_check_batch(kgem, 24) || !kgem_check_reloc(kgem, 1)) { _kgem_submit(kgem); if (!kgem_check_bo_fenced(kgem, bo)) return false; _kgem_set_mode(kgem, KGEM_BLT); } assert(sna->kgem.mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 8; if (bpp == 32) b[0] |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (bo->tiling) b[0] |= BLT_DST_TILED; b[1] = blt->br13; b[2] = 0; b[3] = 0; *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = pixel; b[7] = pixel; b[8] = 0; b[9] = 0; kgem->nbatch += 10; } else { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 7; if (bpp == 32) b[0] |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (bo->tiling && kgem->gen >= 040) b[0] |= BLT_DST_TILED; b[1] = blt->br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = pixel; b[6] = pixel; b[7] = 0; b[8] = 0; kgem->nbatch += 9; } assert(kgem->nbatch < kgem->surface); sna->blt_state.fill_bo = bo->unique_id; sna->blt_state.fill_pixel = pixel; sna->blt_state.fill_alu = alu; } assert(sna->kgem.mode == KGEM_BLT); return true; } noinline static void sna_blt_fill_begin(struct sna *sna, const struct sna_blt_state *blt) { struct kgem *kgem = &sna->kgem; uint32_t *b; if (kgem->nreloc) { _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); assert(kgem->nbatch == 0); } assert(kgem->mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 8; if (blt->bpp == 32) b[0] |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (blt->bo[0]->tiling) b[0] |= BLT_DST_TILED; b[1] = blt->br13; b[2] = 0; b[3] = 0; *(uint32_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, blt->bo[0], I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = blt->pixel; b[7] = blt->pixel; b[8] = 0; b[9] = 0; kgem->nbatch += 10; } else { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 7; if (blt->bpp == 32) b[0] |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (blt->bo[0]->tiling && kgem->gen >= 040) b[0] |= BLT_DST_TILED; b[1] = blt->br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, blt->bo[0], I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = blt->pixel; b[6] = blt->pixel; b[7] = 0; b[8] = 0; kgem->nbatch += 9; } } inline static void sna_blt_fill_one(struct sna *sna, const struct sna_blt_state *blt, int16_t x, int16_t y, int16_t width, int16_t height) { struct kgem *kgem = &sna->kgem; uint32_t *b; DBG(("%s: (%d, %d) x (%d, %d): %08x\n", __FUNCTION__, x, y, width, height, blt->pixel)); assert(x >= 0); assert(y >= 0); assert((y+height) * blt->bo[0]->pitch <= kgem_bo_size(blt->bo[0])); if (!kgem_check_batch(kgem, 3)) sna_blt_fill_begin(sna, blt); assert(sna->kgem.mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; kgem->nbatch += 3; assert(kgem->nbatch < kgem->surface); b[0] = blt->cmd; b[1] = y << 16 | x; b[2] = b[1] + (height << 16 | width); } static bool sna_blt_copy_init(struct sna *sna, struct sna_blt_state *blt, struct kgem_bo *src, struct kgem_bo *dst, int bpp, uint8_t alu) { struct kgem *kgem = &sna->kgem; assert(kgem_bo_can_blt (kgem, src)); assert(kgem_bo_can_blt (kgem, dst)); blt->bo[0] = src; blt->bo[1] = dst; blt->cmd = XY_SRC_COPY_BLT_CMD | (kgem->gen >= 0100 ? 8 : 6); if (bpp == 32) blt->cmd |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; blt->pitch[0] = src->pitch; if (kgem->gen >= 040 && src->tiling) { blt->cmd |= BLT_SRC_TILED; blt->pitch[0] >>= 2; } assert(blt->pitch[0] <= MAXSHORT); blt->pitch[1] = dst->pitch; if (kgem->gen >= 040 && dst->tiling) { blt->cmd |= BLT_DST_TILED; blt->pitch[1] >>= 2; } assert(blt->pitch[1] <= MAXSHORT); blt->overwrites = alu == GXcopy || alu == GXclear || alu == GXset; blt->br13 = (copy_ROP[alu] << 16) | blt->pitch[1]; switch (bpp) { default: assert(0); case 32: blt->br13 |= 1 << 25; /* RGB8888 */ case 16: blt->br13 |= 1 << 24; /* RGB565 */ case 8: break; } kgem_set_mode(kgem, KGEM_BLT, dst); if (!kgem_check_many_bo_fenced(kgem, src, dst, NULL)) { kgem_submit(kgem); if (!kgem_check_many_bo_fenced(kgem, src, dst, NULL)) return false; _kgem_set_mode(kgem, KGEM_BLT); } sna->blt_state.fill_bo = 0; return true; } static bool sna_blt_alpha_fixup_init(struct sna *sna, struct sna_blt_state *blt, struct kgem_bo *src, struct kgem_bo *dst, int bpp, uint32_t alpha) { struct kgem *kgem = &sna->kgem; DBG(("%s: dst handle=%d, src handle=%d, bpp=%d, fixup=%08x\n", __FUNCTION__, dst->handle, src->handle, bpp, alpha)); assert(kgem_bo_can_blt(kgem, src)); assert(kgem_bo_can_blt(kgem, dst)); blt->bo[0] = src; blt->bo[1] = dst; blt->cmd = XY_FULL_MONO_PATTERN_BLT | (kgem->gen >= 0100 ? 12 : 10); blt->pitch[0] = src->pitch; if (kgem->gen >= 040 && src->tiling) { blt->cmd |= BLT_SRC_TILED; blt->pitch[0] >>= 2; } assert(blt->pitch[0] <= MAXSHORT); blt->pitch[1] = dst->pitch; if (kgem->gen >= 040 && dst->tiling) { blt->cmd |= BLT_DST_TILED; blt->pitch[1] >>= 2; } assert(blt->pitch[1] <= MAXSHORT); blt->overwrites = 1; blt->br13 = (0xfc << 16) | blt->pitch[1]; switch (bpp) { default: assert(0); case 32: blt->cmd |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; blt->br13 |= 1 << 25; /* RGB8888 */ case 16: blt->br13 |= 1 << 24; /* RGB565 */ case 8: break; } blt->pixel = alpha; kgem_set_mode(kgem, KGEM_BLT, dst); if (!kgem_check_many_bo_fenced(kgem, src, dst, NULL)) { kgem_submit(kgem); if (!kgem_check_many_bo_fenced(kgem, src, dst, NULL)) return false; _kgem_set_mode(kgem, KGEM_BLT); } sna->blt_state.fill_bo = 0; return true; } static void sna_blt_alpha_fixup_one(struct sna *sna, const struct sna_blt_state *blt, int src_x, int src_y, int width, int height, int dst_x, int dst_y) { struct kgem *kgem = &sna->kgem; uint32_t *b; DBG(("%s: (%d, %d) -> (%d, %d) x (%d, %d)\n", __FUNCTION__, src_x, src_y, dst_x, dst_y, width, height)); assert(src_x >= 0); assert(src_y >= 0); assert((src_y + height) * blt->bo[0]->pitch <= kgem_bo_size(blt->bo[0])); assert(dst_x >= 0); assert(dst_y >= 0); assert((dst_y + height) * blt->bo[1]->pitch <= kgem_bo_size(blt->bo[1])); assert(width > 0); assert(height > 0); if (!kgem_check_batch(kgem, 14) || !kgem_check_reloc(kgem, 2)) { _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } assert(sna->kgem.mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; b[0] = blt->cmd; b[1] = blt->br13; b[2] = (dst_y << 16) | dst_x; b[3] = ((dst_y + height) << 16) | (dst_x + width); if (sna->kgem.gen >= 0100) { *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, blt->bo[1], I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = blt->pitch[0]; b[7] = (src_y << 16) | src_x; *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, blt->bo[0], I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[10] = blt->pixel; b[11] = blt->pixel; b[12] = 0; b[13] = 0; kgem->nbatch += 14; } else { b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, blt->bo[1], I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = blt->pitch[0]; b[6] = (src_y << 16) | src_x; b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7, blt->bo[0], I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[8] = blt->pixel; b[9] = blt->pixel; b[10] = 0; b[11] = 0; kgem->nbatch += 12; } assert(kgem->nbatch < kgem->surface); } static void sna_blt_copy_one(struct sna *sna, const struct sna_blt_state *blt, int src_x, int src_y, int width, int height, int dst_x, int dst_y) { struct kgem *kgem = &sna->kgem; uint32_t *b; DBG(("%s: (%d, %d) -> (%d, %d) x (%d, %d)\n", __FUNCTION__, src_x, src_y, dst_x, dst_y, width, height)); assert(src_x >= 0); assert(src_y >= 0); assert((src_y + height) * blt->bo[0]->pitch <= kgem_bo_size(blt->bo[0])); assert(dst_x >= 0); assert(dst_y >= 0); assert((dst_y + height) * blt->bo[1]->pitch <= kgem_bo_size(blt->bo[1])); assert(width > 0); assert(height > 0); /* Compare against a previous fill */ if (blt->overwrites && kgem->reloc[kgem->nreloc-1].target_handle == blt->bo[1]->target_handle) { if (sna->kgem.gen >= 0100) { if (kgem->nbatch >= 7 && kgem->batch[kgem->nbatch-7] == (XY_COLOR_BLT | (blt->cmd & (BLT_DST_TILED | BLT_WRITE_ALPHA | BLT_WRITE_RGB)) | 5) && kgem->batch[kgem->nbatch-5] == ((uint32_t)dst_y << 16 | (uint16_t)dst_x) && kgem->batch[kgem->nbatch-4] == ((uint32_t)(dst_y+height) << 16 | (uint16_t)(dst_x+width))) { DBG(("%s: replacing last fill\n", __FUNCTION__)); if (kgem_check_batch(kgem, 3)) { assert(kgem->mode == KGEM_BLT); b = kgem->batch + kgem->nbatch - 7; b[0] = blt->cmd; b[1] = blt->br13; b[6] = (src_y << 16) | src_x; b[7] = blt->pitch[0]; *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8 - 7, blt->bo[0], I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 3; assert(kgem->nbatch < kgem->surface); return; } kgem->nbatch -= 7; kgem->nreloc--; } } else { if (kgem->nbatch >= 6 && kgem->batch[kgem->nbatch-6] == (XY_COLOR_BLT | (blt->cmd & (BLT_DST_TILED | BLT_WRITE_ALPHA | BLT_WRITE_RGB)) | 4) && kgem->batch[kgem->nbatch-4] == ((uint32_t)dst_y << 16 | (uint16_t)dst_x) && kgem->batch[kgem->nbatch-3] == ((uint32_t)(dst_y+height) << 16 | (uint16_t)(dst_x+width))) { DBG(("%s: replacing last fill\n", __FUNCTION__)); if (kgem_check_batch(kgem, 8-6)) { assert(kgem->mode == KGEM_BLT); b = kgem->batch + kgem->nbatch - 6; b[0] = blt->cmd; b[1] = blt->br13; b[5] = (src_y << 16) | src_x; b[6] = blt->pitch[0]; b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7 - 6, blt->bo[0], I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 8 - 6; assert(kgem->nbatch < kgem->surface); return; } kgem->nbatch -= 6; kgem->nreloc--; } } } if (!kgem_check_batch(kgem, 10) || !kgem_check_reloc(kgem, 2)) { _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } assert(sna->kgem.mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; b[0] = blt->cmd; b[1] = blt->br13; b[2] = (dst_y << 16) | dst_x; b[3] = ((dst_y + height) << 16) | (dst_x + width); if (kgem->gen >= 0100) { *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, blt->bo[1], I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = (src_y << 16) | src_x; b[7] = blt->pitch[0]; *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, blt->bo[0], I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 10; } else { b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, blt->bo[1], I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = (src_y << 16) | src_x; b[6] = blt->pitch[0]; b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7, blt->bo[0], I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 8; } assert(kgem->nbatch < kgem->surface); } bool sna_get_rgba_from_pixel(uint32_t pixel, uint16_t *red, uint16_t *green, uint16_t *blue, uint16_t *alpha, uint32_t format) { int rbits, bbits, gbits, abits; int rshift, bshift, gshift, ashift; rbits = PICT_FORMAT_R(format); gbits = PICT_FORMAT_G(format); bbits = PICT_FORMAT_B(format); abits = PICT_FORMAT_A(format); if (PICT_FORMAT_TYPE(format) == PICT_TYPE_A) { rshift = gshift = bshift = ashift = 0; } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_ARGB) { bshift = 0; gshift = bbits; rshift = gshift + gbits; ashift = rshift + rbits; } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_ABGR) { rshift = 0; gshift = rbits; bshift = gshift + gbits; ashift = bshift + bbits; } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_BGRA) { ashift = 0; rshift = abits; if (abits == 0) rshift = PICT_FORMAT_BPP(format) - (rbits+gbits+bbits); gshift = rshift + rbits; bshift = gshift + gbits; } else { return false; } if (rbits) { *red = ((pixel >> rshift) & ((1 << rbits) - 1)) << (16 - rbits); while (rbits < 16) { *red |= *red >> rbits; rbits <<= 1; } } else *red = 0; if (gbits) { *green = ((pixel >> gshift) & ((1 << gbits) - 1)) << (16 - gbits); while (gbits < 16) { *green |= *green >> gbits; gbits <<= 1; } } else *green = 0; if (bbits) { *blue = ((pixel >> bshift) & ((1 << bbits) - 1)) << (16 - bbits); while (bbits < 16) { *blue |= *blue >> bbits; bbits <<= 1; } } else *blue = 0; if (abits) { *alpha = ((pixel >> ashift) & ((1 << abits) - 1)) << (16 - abits); while (abits < 16) { *alpha |= *alpha >> abits; abits <<= 1; } } else *alpha = 0xffff; return true; } bool _sna_get_pixel_from_rgba(uint32_t * pixel, uint16_t red, uint16_t green, uint16_t blue, uint16_t alpha, uint32_t format) { int rbits, bbits, gbits, abits; int rshift, bshift, gshift, ashift; rbits = PICT_FORMAT_R(format); gbits = PICT_FORMAT_G(format); bbits = PICT_FORMAT_B(format); abits = PICT_FORMAT_A(format); if (abits == 0) abits = PICT_FORMAT_BPP(format) - (rbits+gbits+bbits); if (PICT_FORMAT_TYPE(format) == PICT_TYPE_A) { *pixel = alpha >> (16 - abits); return true; } if (!PICT_FORMAT_COLOR(format)) return false; if (PICT_FORMAT_TYPE(format) == PICT_TYPE_ARGB) { bshift = 0; gshift = bbits; rshift = gshift + gbits; ashift = rshift + rbits; } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_ABGR) { rshift = 0; gshift = rbits; bshift = gshift + gbits; ashift = bshift + bbits; } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_BGRA) { ashift = 0; rshift = abits; gshift = rshift + rbits; bshift = gshift + gbits; } else return false; *pixel = 0; *pixel |= (blue >> (16 - bbits)) << bshift; *pixel |= (green >> (16 - gbits)) << gshift; *pixel |= (red >> (16 - rbits)) << rshift; *pixel |= (alpha >> (16 - abits)) << ashift; return true; } uint32_t sna_rgba_for_color(uint32_t color, int depth) { return color_convert(color, sna_format_for_depth(depth), PICT_a8r8g8b8); } uint32_t sna_rgba_to_color(uint32_t rgba, uint32_t format) { return color_convert(rgba, PICT_a8r8g8b8, format); } static uint32_t get_pixel(PicturePtr picture) { PixmapPtr pixmap = get_drawable_pixmap(picture->pDrawable); DBG(("%s: %p\n", __FUNCTION__, pixmap)); if (!sna_pixmap_move_to_cpu(pixmap, MOVE_READ)) return 0; switch (pixmap->drawable.bitsPerPixel) { case 32: return *(uint32_t *)pixmap->devPrivate.ptr; case 16: return *(uint16_t *)pixmap->devPrivate.ptr; default: return *(uint8_t *)pixmap->devPrivate.ptr; } } static uint32_t get_solid_color(PicturePtr picture, uint32_t format) { if (picture->pSourcePict) { PictSolidFill *fill = (PictSolidFill *)picture->pSourcePict; return color_convert(fill->color, PICT_a8r8g8b8, format); } else return color_convert(get_pixel(picture), picture->format, format); } static bool is_solid(PicturePtr picture) { if (picture->pSourcePict) { if (picture->pSourcePict->type == SourcePictTypeSolidFill) return true; } if (picture->pDrawable) { if (picture->pDrawable->width == 1 && picture->pDrawable->height == 1 && picture->repeat) return true; } return false; } bool sna_picture_is_solid(PicturePtr picture, uint32_t *color) { if (!is_solid(picture)) return false; if (color) *color = get_solid_color(picture, PICT_a8r8g8b8); return true; } static bool pixel_is_transparent(uint32_t pixel, uint32_t format) { unsigned int abits; abits = PICT_FORMAT_A(format); if (!abits) return false; if (PICT_FORMAT_TYPE(format) == PICT_TYPE_A || PICT_FORMAT_TYPE(format) == PICT_TYPE_BGRA) { return (pixel & ((1 << abits) - 1)) == 0; } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_ARGB || PICT_FORMAT_TYPE(format) == PICT_TYPE_ABGR) { unsigned int ashift = PICT_FORMAT_BPP(format) - abits; return (pixel >> ashift) == 0; } else return false; } static bool pixel_is_opaque(uint32_t pixel, uint32_t format) { unsigned int abits; abits = PICT_FORMAT_A(format); if (!abits) return true; if (PICT_FORMAT_TYPE(format) == PICT_TYPE_A || PICT_FORMAT_TYPE(format) == PICT_TYPE_BGRA) { return (pixel & ((1 << abits) - 1)) == (unsigned)((1 << abits) - 1); } else if (PICT_FORMAT_TYPE(format) == PICT_TYPE_ARGB || PICT_FORMAT_TYPE(format) == PICT_TYPE_ABGR) { unsigned int ashift = PICT_FORMAT_BPP(format) - abits; return (pixel >> ashift) == (unsigned)((1 << abits) - 1); } else return false; } static bool pixel_is_white(uint32_t pixel, uint32_t format) { switch (PICT_FORMAT_TYPE(format)) { case PICT_TYPE_A: case PICT_TYPE_ARGB: case PICT_TYPE_ABGR: case PICT_TYPE_BGRA: return pixel == ((1U << PICT_FORMAT_BPP(format)) - 1); default: return false; } } static bool is_opaque_solid(PicturePtr picture) { if (picture->pSourcePict) { PictSolidFill *fill = (PictSolidFill *) picture->pSourcePict; return (fill->color >> 24) == 0xff; } else return pixel_is_opaque(get_pixel(picture), picture->format); } static bool is_white(PicturePtr picture) { if (picture->pSourcePict) { PictSolidFill *fill = (PictSolidFill *) picture->pSourcePict; return fill->color == 0xffffffff; } else return pixel_is_white(get_pixel(picture), picture->format); } static bool is_transparent(PicturePtr picture) { if (picture->pSourcePict) { PictSolidFill *fill = (PictSolidFill *) picture->pSourcePict; return fill->color == 0; } else return pixel_is_transparent(get_pixel(picture), picture->format); } bool sna_composite_mask_is_opaque(PicturePtr mask) { if (mask->componentAlpha && PICT_FORMAT_RGB(mask->format)) return is_solid(mask) && is_white(mask); else if (!PICT_FORMAT_A(mask->format)) return true; else return is_solid(mask) && is_opaque_solid(mask); } fastcall static void blt_composite_fill(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int x1, x2, y1, y2; x1 = r->dst.x + op->dst.x; y1 = r->dst.y + op->dst.y; x2 = x1 + r->width; y2 = y1 + r->height; if (x1 < 0) x1 = 0; if (y1 < 0) y1 = 0; if (x2 > op->dst.width) x2 = op->dst.width; if (y2 > op->dst.height) y2 = op->dst.height; if (x2 <= x1 || y2 <= y1) return; sna_blt_fill_one(sna, &op->u.blt, x1, y1, x2-x1, y2-y1); } fastcall static void blt_composite_fill__cpu(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int x1, x2, y1, y2; x1 = r->dst.x + op->dst.x; y1 = r->dst.y + op->dst.y; x2 = x1 + r->width; y2 = y1 + r->height; if (x1 < 0) x1 = 0; if (y1 < 0) y1 = 0; if (x2 > op->dst.width) x2 = op->dst.width; if (y2 > op->dst.height) y2 = op->dst.height; if (x2 <= x1 || y2 <= y1) return; assert(op->dst.pixmap->devPrivate.ptr); assert(op->dst.pixmap->devKind); pixman_fill(op->dst.pixmap->devPrivate.ptr, op->dst.pixmap->devKind / sizeof(uint32_t), op->dst.pixmap->drawable.bitsPerPixel, x1, y1, x2-x1, y2-y1, op->u.blt.pixel); } fastcall static void blt_composite_fill_box_no_offset__cpu(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->x2 <= op->dst.pixmap->drawable.width); assert(box->y2 <= op->dst.pixmap->drawable.height); assert(op->dst.pixmap->devPrivate.ptr); assert(op->dst.pixmap->devKind); pixman_fill(op->dst.pixmap->devPrivate.ptr, op->dst.pixmap->devKind / sizeof(uint32_t), op->dst.pixmap->drawable.bitsPerPixel, box->x1, box->y1, box->x2-box->x1, box->y2-box->y1, op->u.blt.pixel); } static void blt_composite_fill_boxes_no_offset__cpu(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int n) { do { assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->x2 <= op->dst.pixmap->drawable.width); assert(box->y2 <= op->dst.pixmap->drawable.height); assert(op->dst.pixmap->devPrivate.ptr); assert(op->dst.pixmap->devKind); pixman_fill(op->dst.pixmap->devPrivate.ptr, op->dst.pixmap->devKind / sizeof(uint32_t), op->dst.pixmap->drawable.bitsPerPixel, box->x1, box->y1, box->x2-box->x1, box->y2-box->y1, op->u.blt.pixel); box++; } while (--n); } fastcall static void blt_composite_fill_box__cpu(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { assert(box->x1 + op->dst.x >= 0); assert(box->y1 + op->dst.y >= 0); assert(box->x2 + op->dst.x <= op->dst.pixmap->drawable.width); assert(box->y2 + op->dst.y <= op->dst.pixmap->drawable.height); assert(op->dst.pixmap->devPrivate.ptr); assert(op->dst.pixmap->devKind); pixman_fill(op->dst.pixmap->devPrivate.ptr, op->dst.pixmap->devKind / sizeof(uint32_t), op->dst.pixmap->drawable.bitsPerPixel, box->x1 + op->dst.x, box->y1 + op->dst.y, box->x2 - box->x1, box->y2 - box->y1, op->u.blt.pixel); } static void blt_composite_fill_boxes__cpu(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int n) { do { assert(box->x1 + op->dst.x >= 0); assert(box->y1 + op->dst.y >= 0); assert(box->x2 + op->dst.x <= op->dst.pixmap->drawable.width); assert(box->y2 + op->dst.y <= op->dst.pixmap->drawable.height); assert(op->dst.pixmap->devPrivate.ptr); assert(op->dst.pixmap->devKind); pixman_fill(op->dst.pixmap->devPrivate.ptr, op->dst.pixmap->devKind / sizeof(uint32_t), op->dst.pixmap->drawable.bitsPerPixel, box->x1 + op->dst.x, box->y1 + op->dst.y, box->x2 - box->x1, box->y2 - box->y1, op->u.blt.pixel); box++; } while (--n); } inline static void _sna_blt_fill_box(struct sna *sna, const struct sna_blt_state *blt, const BoxRec *box) { struct kgem *kgem = &sna->kgem; uint32_t *b; DBG(("%s: (%d, %d), (%d, %d): %08x\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, blt->pixel)); assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->y2 * blt->bo[0]->pitch <= kgem_bo_size(blt->bo[0])); if (!kgem_check_batch(kgem, 3)) sna_blt_fill_begin(sna, blt); assert(sna->kgem.mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; kgem->nbatch += 3; assert(kgem->nbatch < kgem->surface); b[0] = blt->cmd; *(uint64_t *)(b+1) = *(const uint64_t *)box; } inline static void _sna_blt_fill_boxes(struct sna *sna, const struct sna_blt_state *blt, const BoxRec *box, int nbox) { struct kgem *kgem = &sna->kgem; uint32_t cmd = blt->cmd; DBG(("%s: %08x x %d\n", __FUNCTION__, blt->pixel, nbox)); if (!kgem_check_batch(kgem, 3)) sna_blt_fill_begin(sna, blt); do { uint32_t *b = kgem->batch + kgem->nbatch; int nbox_this_time, rem; assert(sna->kgem.mode == KGEM_BLT); nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (3*nbox_this_time > rem) nbox_this_time = rem / 3; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; kgem->nbatch += 3 * nbox_this_time; assert(kgem->nbatch < kgem->surface); while (nbox_this_time >= 8) { b[0] = cmd; *(uint64_t *)(b+1) = *(const uint64_t *)box++; b[3] = cmd; *(uint64_t *)(b+4) = *(const uint64_t *)box++; b[6] = cmd; *(uint64_t *)(b+7) = *(const uint64_t *)box++; b[9] = cmd; *(uint64_t *)(b+10) = *(const uint64_t *)box++; b[12] = cmd; *(uint64_t *)(b+13) = *(const uint64_t *)box++; b[15] = cmd; *(uint64_t *)(b+16) = *(const uint64_t *)box++; b[18] = cmd; *(uint64_t *)(b+19) = *(const uint64_t *)box++; b[21] = cmd; *(uint64_t *)(b+22) = *(const uint64_t *)box++; b += 24; nbox_this_time -= 8; } if (nbox_this_time & 4) { b[0] = cmd; *(uint64_t *)(b+1) = *(const uint64_t *)box++; b[3] = cmd; *(uint64_t *)(b+4) = *(const uint64_t *)box++; b[6] = cmd; *(uint64_t *)(b+7) = *(const uint64_t *)box++; b[9] = cmd; *(uint64_t *)(b+10) = *(const uint64_t *)box++; b += 12; } if (nbox_this_time & 2) { b[0] = cmd; *(uint64_t *)(b+1) = *(const uint64_t *)box++; b[3] = cmd; *(uint64_t *)(b+4) = *(const uint64_t *)box++; b += 6; } if (nbox_this_time & 1) { b[0] = cmd; *(uint64_t *)(b+1) = *(const uint64_t *)box++; } if (!nbox) return; sna_blt_fill_begin(sna, blt); } while (1); } static inline void _sna_blt_maybe_clear(const struct sna_composite_op *op, const BoxRec *box) { if (box->x2 - box->x1 >= op->dst.width && box->y2 - box->y1 >= op->dst.height) { struct sna_pixmap *priv = sna_pixmap(op->dst.pixmap); if (op->dst.bo == priv->gpu_bo) { priv->clear = true; priv->clear_color = op->u.blt.pixel; DBG(("%s: pixmap=%ld marking clear [%08x]\n", __FUNCTION__, op->dst.pixmap->drawable.serialNumber, op->u.blt.pixel)); } } } fastcall static void blt_composite_fill_box_no_offset(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { _sna_blt_fill_box(sna, &op->u.blt, box); _sna_blt_maybe_clear(op, box); } static void blt_composite_fill_boxes_no_offset(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int n) { _sna_blt_fill_boxes(sna, &op->u.blt, box, n); } static void blt_composite_fill_boxes_no_offset__thread(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { struct kgem *kgem = &sna->kgem; const struct sna_blt_state *blt = &op->u.blt; uint32_t cmd = blt->cmd; DBG(("%s: %08x x %d\n", __FUNCTION__, blt->pixel, nbox)); sna_vertex_lock(&sna->render); assert(kgem->mode == KGEM_BLT); if (!kgem_check_batch(kgem, 3)) { sna_vertex_wait__locked(&sna->render); sna_blt_fill_begin(sna, blt); } do { uint32_t *b = kgem->batch + kgem->nbatch; int nbox_this_time, rem; assert(sna->kgem.mode == KGEM_BLT); nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (3*nbox_this_time > rem) nbox_this_time = rem / 3; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; kgem->nbatch += 3 * nbox_this_time; assert(kgem->nbatch < kgem->surface); sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); while (nbox_this_time >= 8) { b[0] = cmd; *(uint64_t *)(b+1) = *(const uint64_t *)box++; b[3] = cmd; *(uint64_t *)(b+4) = *(const uint64_t *)box++; b[6] = cmd; *(uint64_t *)(b+7) = *(const uint64_t *)box++; b[9] = cmd; *(uint64_t *)(b+10) = *(const uint64_t *)box++; b[12] = cmd; *(uint64_t *)(b+13) = *(const uint64_t *)box++; b[15] = cmd; *(uint64_t *)(b+16) = *(const uint64_t *)box++; b[18] = cmd; *(uint64_t *)(b+19) = *(const uint64_t *)box++; b[21] = cmd; *(uint64_t *)(b+22) = *(const uint64_t *)box++; b += 24; nbox_this_time -= 8; } if (nbox_this_time & 4) { b[0] = cmd; *(uint64_t *)(b+1) = *(const uint64_t *)box++; b[3] = cmd; *(uint64_t *)(b+4) = *(const uint64_t *)box++; b[6] = cmd; *(uint64_t *)(b+7) = *(const uint64_t *)box++; b[9] = cmd; *(uint64_t *)(b+10) = *(const uint64_t *)box++; b += 12; } if (nbox_this_time & 2) { b[0] = cmd; *(uint64_t *)(b+1) = *(const uint64_t *)box++; b[3] = cmd; *(uint64_t *)(b+4) = *(const uint64_t *)box++; b += 6; } if (nbox_this_time & 1) { b[0] = cmd; *(uint64_t *)(b+1) = *(const uint64_t *)box++; } sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); if (!nbox) break; sna_vertex_wait__locked(&sna->render); sna_blt_fill_begin(sna, blt); } while (1); sna_vertex_unlock(&sna->render); } fastcall static void blt_composite_fill_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { sna_blt_fill_one(sna, &op->u.blt, box->x1 + op->dst.x, box->y1 + op->dst.y, box->x2 - box->x1, box->y2 - box->y1); _sna_blt_maybe_clear(op, box); } static void blt_composite_fill_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int n) { do { sna_blt_fill_one(sna, &op->u.blt, box->x1 + op->dst.x, box->y1 + op->dst.y, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); } static inline uint64_t add4(const BoxRec *b, int16_t x, int16_t y) { union { uint64_t v; int16_t i[4]; } vi; vi.v = *(uint64_t *)b; vi.i[0] += x; vi.i[1] += y; vi.i[2] += x; vi.i[3] += y; return vi.v; } static void blt_composite_fill_boxes__thread(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { struct kgem *kgem = &sna->kgem; const struct sna_blt_state *blt = &op->u.blt; uint32_t cmd = blt->cmd; int16_t dx = op->dst.x; int16_t dy = op->dst.y; DBG(("%s: %08x x %d\n", __FUNCTION__, blt->pixel, nbox)); sna_vertex_lock(&sna->render); assert(kgem->mode == KGEM_BLT); if (!kgem_check_batch(kgem, 3)) { sna_vertex_wait__locked(&sna->render); sna_blt_fill_begin(sna, blt); } do { uint32_t *b = kgem->batch + kgem->nbatch; int nbox_this_time, rem; assert(sna->kgem.mode == KGEM_BLT); nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (3*nbox_this_time > rem) nbox_this_time = rem / 3; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; kgem->nbatch += 3 * nbox_this_time; assert(kgem->nbatch < kgem->surface); sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); while (nbox_this_time >= 8) { b[0] = cmd; *(uint64_t *)(b+1) = add4(box++, dx, dy); b[3] = cmd; *(uint64_t *)(b+4) = add4(box++, dx, dy); b[6] = cmd; *(uint64_t *)(b+7) = add4(box++, dx, dy); b[9] = cmd; *(uint64_t *)(b+10) = add4(box++, dx, dy); b[12] = cmd; *(uint64_t *)(b+13) = add4(box++, dx, dy); b[15] = cmd; *(uint64_t *)(b+16) = add4(box++, dx, dy); b[18] = cmd; *(uint64_t *)(b+19) = add4(box++, dx, dy); b[21] = cmd; *(uint64_t *)(b+22) = add4(box++, dx, dy); b += 24; nbox_this_time -= 8; } if (nbox_this_time & 4) { b[0] = cmd; *(uint64_t *)(b+1) = add4(box++, dx, dy); b[3] = cmd; *(uint64_t *)(b+4) = add4(box++, dx, dy); b[6] = cmd; *(uint64_t *)(b+7) = add4(box++, dx, dy); b[9] = cmd; *(uint64_t *)(b+10) = add4(box++, dx, dy); b += 12; } if (nbox_this_time & 2) { b[0] = cmd; *(uint64_t *)(b+1) = add4(box++, dx, dy); b[3] = cmd; *(uint64_t *)(b+4) = add4(box++, dx, dy); b += 6; } if (nbox_this_time & 1) { b[0] = cmd; *(uint64_t *)(b+1) = add4(box++, dx, dy); } sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); if (!nbox) break; sna_vertex_wait__locked(&sna->render); sna_blt_fill_begin(sna, blt); } while (1); sna_vertex_unlock(&sna->render); } fastcall static void blt_composite_nop(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { } fastcall static void blt_composite_nop_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { } static void blt_composite_nop_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int n) { } static bool begin_blt(struct sna *sna, struct sna_composite_op *op) { assert(sna->kgem.mode == KGEM_BLT); if (!kgem_check_bo_fenced(&sna->kgem, op->dst.bo)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, op->dst.bo)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } return true; } static bool prepare_blt_nop(struct sna *sna, struct sna_composite_op *op) { DBG(("%s\n", __FUNCTION__)); op->blt = blt_composite_nop; op->box = blt_composite_nop_box; op->boxes = blt_composite_nop_boxes; op->done = nop_done; return true; } static bool prepare_blt_clear(struct sna *sna, struct sna_composite_op *op) { DBG(("%s\n", __FUNCTION__)); if (op->dst.bo == NULL) { op->blt = blt_composite_fill__cpu; if (op->dst.x|op->dst.y) { op->box = blt_composite_fill_box__cpu; op->boxes = blt_composite_fill_boxes__cpu; op->thread_boxes = blt_composite_fill_boxes__cpu; } else { op->box = blt_composite_fill_box_no_offset__cpu; op->boxes = blt_composite_fill_boxes_no_offset__cpu; op->thread_boxes = blt_composite_fill_boxes_no_offset__cpu; } op->done = nop_done; op->u.blt.pixel = 0; return true; } op->blt = blt_composite_fill; if (op->dst.x|op->dst.y) { op->box = blt_composite_fill_box; op->boxes = blt_composite_fill_boxes; op->thread_boxes = blt_composite_fill_boxes__thread; } else { op->box = blt_composite_fill_box_no_offset; op->boxes = blt_composite_fill_boxes_no_offset; op->thread_boxes = blt_composite_fill_boxes_no_offset__thread; } op->done = nop_done; if (!sna_blt_fill_init(sna, &op->u.blt, op->dst.bo, op->dst.pixmap->drawable.bitsPerPixel, GXclear, 0)) return false; return begin_blt(sna, op); } static bool prepare_blt_fill(struct sna *sna, struct sna_composite_op *op, uint32_t pixel) { DBG(("%s\n", __FUNCTION__)); if (op->dst.bo == NULL) { op->u.blt.pixel = pixel; op->blt = blt_composite_fill__cpu; if (op->dst.x|op->dst.y) { op->box = blt_composite_fill_box__cpu; op->boxes = blt_composite_fill_boxes__cpu; op->thread_boxes = blt_composite_fill_boxes__cpu; } else { op->box = blt_composite_fill_box_no_offset__cpu; op->boxes = blt_composite_fill_boxes_no_offset__cpu; op->thread_boxes = blt_composite_fill_boxes_no_offset__cpu; } op->done = nop_done; return true; } op->blt = blt_composite_fill; if (op->dst.x|op->dst.y) { op->box = blt_composite_fill_box; op->boxes = blt_composite_fill_boxes; op->thread_boxes = blt_composite_fill_boxes__thread; } else { op->box = blt_composite_fill_box_no_offset; op->boxes = blt_composite_fill_boxes_no_offset; op->thread_boxes = blt_composite_fill_boxes_no_offset__thread; } op->done = nop_done; if (!sna_blt_fill_init(sna, &op->u.blt, op->dst.bo, op->dst.pixmap->drawable.bitsPerPixel, GXcopy, pixel)) return false; return begin_blt(sna, op); } fastcall static void blt_composite_copy(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int x1, x2, y1, y2; int src_x, src_y; DBG(("%s: src=(%d, %d), dst=(%d, %d), size=(%d, %d)\n", __FUNCTION__, r->src.x, r->src.y, r->dst.x, r->dst.y, r->width, r->height)); /* XXX higher layer should have clipped? */ x1 = r->dst.x + op->dst.x; y1 = r->dst.y + op->dst.y; x2 = x1 + r->width; y2 = y1 + r->height; src_x = r->src.x - x1 + op->u.blt.sx; src_y = r->src.y - y1 + op->u.blt.sy; /* clip against dst */ if (x1 < 0) x1 = 0; if (y1 < 0) y1 = 0; if (x2 > op->dst.width) x2 = op->dst.width; if (y2 > op->dst.height) y2 = op->dst.height; DBG(("%s: box=(%d, %d), (%d, %d)\n", __FUNCTION__, x1, y1, x2, y2)); if (x2 <= x1 || y2 <= y1) return; sna_blt_copy_one(sna, &op->u.blt, x1 + src_x, y1 + src_y, x2 - x1, y2 - y1, x1, y1); } fastcall static void blt_composite_copy_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { DBG(("%s: box (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); sna_blt_copy_one(sna, &op->u.blt, box->x1 + op->u.blt.sx, box->y1 + op->u.blt.sy, box->x2 - box->x1, box->y2 - box->y1, box->x1 + op->dst.x, box->y1 + op->dst.y); } static void blt_composite_copy_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); do { DBG(("%s: box (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); sna_blt_copy_one(sna, &op->u.blt, box->x1 + op->u.blt.sx, box->y1 + op->u.blt.sy, box->x2 - box->x1, box->y2 - box->y1, box->x1 + op->dst.x, box->y1 + op->dst.y); box++; } while(--nbox); } static inline uint32_t add2(uint32_t v, int16_t x, int16_t y) { x += v & 0xffff; y += v >> 16; return (uint16_t)y << 16 | x; } static void blt_composite_copy_boxes__thread(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { struct kgem *kgem = &sna->kgem; int dst_dx = op->dst.x; int dst_dy = op->dst.y; int src_dx = op->src.offset[0]; int src_dy = op->src.offset[1]; uint32_t cmd = op->u.blt.cmd; uint32_t br13 = op->u.blt.br13; struct kgem_bo *src_bo = op->u.blt.bo[0]; struct kgem_bo *dst_bo = op->u.blt.bo[1]; int src_pitch = op->u.blt.pitch[0]; DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); sna_vertex_lock(&sna->render); if ((dst_dx | dst_dy) == 0) { uint64_t hdr = (uint64_t)br13 << 32 | cmd; do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (8*nbox_this_time > rem) nbox_this_time = rem / 8; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc)/2; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; assert(sna->kgem.mode == KGEM_BLT); do { uint32_t *b = kgem->batch + kgem->nbatch; DBG((" %s: box=(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x1 + src_dx >= 0); assert(box->y1 + src_dy >= 0); assert(box->x1 + src_dx <= INT16_MAX); assert(box->y1 + src_dy <= INT16_MAX); assert(box->x1 >= 0); assert(box->y1 >= 0); *(uint64_t *)&b[0] = hdr; *(uint64_t *)&b[2] = *(const uint64_t *)box; b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = add2(b[2], src_dx, src_dy); b[6] = src_pitch; b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 8; assert(kgem->nbatch < kgem->surface); box++; } while (--nbox_this_time); if (!nbox) break; _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } while (1); } else { do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (8*nbox_this_time > rem) nbox_this_time = rem / 8; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc)/2; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; assert(sna->kgem.mode == KGEM_BLT); do { uint32_t *b = kgem->batch + kgem->nbatch; DBG((" %s: box=(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x1 + src_dx >= 0); assert(box->y1 + src_dy >= 0); assert(box->x1 + dst_dx >= 0); assert(box->y1 + dst_dy >= 0); b[0] = cmd; b[1] = br13; b[2] = ((box->y1 + dst_dy) << 16) | (box->x1 + dst_dx); b[3] = ((box->y2 + dst_dy) << 16) | (box->x2 + dst_dx); b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = ((box->y1 + src_dy) << 16) | (box->x1 + src_dx); b[6] = src_pitch; b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 8; assert(kgem->nbatch < kgem->surface); box++; } while (--nbox_this_time); if (!nbox) break; _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } while (1); } sna_vertex_unlock(&sna->render); } static void blt_composite_copy_boxes__thread64(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { struct kgem *kgem = &sna->kgem; int dst_dx = op->dst.x; int dst_dy = op->dst.y; int src_dx = op->src.offset[0]; int src_dy = op->src.offset[1]; uint32_t cmd = op->u.blt.cmd; uint32_t br13 = op->u.blt.br13; struct kgem_bo *src_bo = op->u.blt.bo[0]; struct kgem_bo *dst_bo = op->u.blt.bo[1]; int src_pitch = op->u.blt.pitch[0]; DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); sna_vertex_lock(&sna->render); if ((dst_dx | dst_dy) == 0) { uint64_t hdr = (uint64_t)br13 << 32 | cmd; do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (10*nbox_this_time > rem) nbox_this_time = rem / 10; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc)/2; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; assert(kgem->mode == KGEM_BLT); do { uint32_t *b = kgem->batch + kgem->nbatch; DBG((" %s: box=(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x1 + src_dx >= 0); assert(box->y1 + src_dy >= 0); assert(box->x1 + src_dx <= INT16_MAX); assert(box->y1 + src_dy <= INT16_MAX); assert(box->x1 >= 0); assert(box->y1 >= 0); *(uint64_t *)&b[0] = hdr; *(uint64_t *)&b[2] = *(const uint64_t *)box; *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = add2(b[2], src_dx, src_dy); b[7] = src_pitch; *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 10; assert(kgem->nbatch < kgem->surface); box++; } while (--nbox_this_time); if (!nbox) break; _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } while (1); } else { do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (10*nbox_this_time > rem) nbox_this_time = rem / 10; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc)/2; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; assert(kgem->mode == KGEM_BLT); do { uint32_t *b = kgem->batch + kgem->nbatch; DBG((" %s: box=(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x1 + src_dx >= 0); assert(box->y1 + src_dy >= 0); assert(box->x1 + dst_dx >= 0); assert(box->y1 + dst_dy >= 0); b[0] = cmd; b[1] = br13; b[2] = ((box->y1 + dst_dy) << 16) | (box->x1 + dst_dx); b[3] = ((box->y2 + dst_dy) << 16) | (box->x2 + dst_dx); *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = ((box->y1 + src_dy) << 16) | (box->x1 + src_dx); b[7] = src_pitch; *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 10; assert(kgem->nbatch < kgem->surface); box++; } while (--nbox_this_time); if (!nbox) break; _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } while (1); } sna_vertex_unlock(&sna->render); } fastcall static void blt_composite_copy_with_alpha(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int x1, x2, y1, y2; int src_x, src_y; DBG(("%s: src=(%d, %d), dst=(%d, %d), size=(%d, %d)\n", __FUNCTION__, r->src.x, r->src.y, r->dst.x, r->dst.y, r->width, r->height)); /* XXX higher layer should have clipped? */ x1 = r->dst.x + op->dst.x; y1 = r->dst.y + op->dst.y; x2 = x1 + r->width; y2 = y1 + r->height; src_x = r->src.x - x1 + op->u.blt.sx; src_y = r->src.y - y1 + op->u.blt.sy; /* clip against dst */ if (x1 < 0) x1 = 0; if (y1 < 0) y1 = 0; if (x2 > op->dst.width) x2 = op->dst.width; if (y2 > op->dst.height) y2 = op->dst.height; DBG(("%s: box=(%d, %d), (%d, %d)\n", __FUNCTION__, x1, y1, x2, y2)); if (x2 <= x1 || y2 <= y1) return; sna_blt_alpha_fixup_one(sna, &op->u.blt, x1 + src_x, y1 + src_y, x2 - x1, y2 - y1, x1, y1); } fastcall static void blt_composite_copy_box_with_alpha(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { DBG(("%s: box (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); sna_blt_alpha_fixup_one(sna, &op->u.blt, box->x1 + op->u.blt.sx, box->y1 + op->u.blt.sy, box->x2 - box->x1, box->y2 - box->y1, box->x1 + op->dst.x, box->y1 + op->dst.y); } static void blt_composite_copy_boxes_with_alpha(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); do { DBG(("%s: box (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); sna_blt_alpha_fixup_one(sna, &op->u.blt, box->x1 + op->u.blt.sx, box->y1 + op->u.blt.sy, box->x2 - box->x1, box->y2 - box->y1, box->x1 + op->dst.x, box->y1 + op->dst.y); box++; } while(--nbox); } static bool prepare_blt_copy(struct sna *sna, struct sna_composite_op *op, struct kgem_bo *bo, uint32_t alpha_fixup) { PixmapPtr src = op->u.blt.src_pixmap; assert(op->dst.bo); assert(kgem_bo_can_blt(&sna->kgem, op->dst.bo)); assert(kgem_bo_can_blt(&sna->kgem, bo)); kgem_set_mode(&sna->kgem, KGEM_BLT, op->dst.bo); if (!kgem_check_many_bo_fenced(&sna->kgem, op->dst.bo, bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_many_bo_fenced(&sna->kgem, op->dst.bo, bo, NULL)) { DBG(("%s: fallback -- no room in aperture\n", __FUNCTION__)); return sna_tiling_blt_composite(sna, op, bo, src->drawable.bitsPerPixel, alpha_fixup); } _kgem_set_mode(&sna->kgem, KGEM_BLT); } DBG(("%s\n", __FUNCTION__)); if (sna->kgem.gen >= 060 && op->dst.bo == bo) op->done = gen6_blt_copy_done; else op->done = nop_done; if (alpha_fixup) { op->blt = blt_composite_copy_with_alpha; op->box = blt_composite_copy_box_with_alpha; op->boxes = blt_composite_copy_boxes_with_alpha; if (!sna_blt_alpha_fixup_init(sna, &op->u.blt, bo, op->dst.bo, src->drawable.bitsPerPixel, alpha_fixup)) return false; } else { op->blt = blt_composite_copy; op->box = blt_composite_copy_box; op->boxes = blt_composite_copy_boxes; if (sna->kgem.gen >= 0100) op->thread_boxes = blt_composite_copy_boxes__thread64; else op->thread_boxes = blt_composite_copy_boxes__thread; if (!sna_blt_copy_init(sna, &op->u.blt, bo, op->dst.bo, src->drawable.bitsPerPixel, GXcopy)) return false; } return true; } fastcall static void blt_put_composite__cpu(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { PixmapPtr dst = op->dst.pixmap; PixmapPtr src = op->u.blt.src_pixmap; assert(src->devPrivate.ptr); assert(src->devKind); assert(dst->devPrivate.ptr); assert(dst->devKind); memcpy_blt(src->devPrivate.ptr, dst->devPrivate.ptr, src->drawable.bitsPerPixel, src->devKind, dst->devKind, r->src.x + op->u.blt.sx, r->src.y + op->u.blt.sy, r->dst.x + op->dst.x, r->dst.y + op->dst.y, r->width, r->height); } fastcall static void blt_put_composite_box__cpu(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { PixmapPtr dst = op->dst.pixmap; PixmapPtr src = op->u.blt.src_pixmap; assert(src->devPrivate.ptr); assert(src->devKind); assert(dst->devPrivate.ptr); assert(dst->devKind); memcpy_blt(src->devPrivate.ptr, dst->devPrivate.ptr, src->drawable.bitsPerPixel, src->devKind, dst->devKind, box->x1 + op->u.blt.sx, box->y1 + op->u.blt.sy, box->x1 + op->dst.x, box->y1 + op->dst.y, box->x2-box->x1, box->y2-box->y1); } static void blt_put_composite_boxes__cpu(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int n) { PixmapPtr dst = op->dst.pixmap; PixmapPtr src = op->u.blt.src_pixmap; assert(src->devPrivate.ptr); assert(src->devKind); assert(dst->devPrivate.ptr); assert(dst->devKind); do { memcpy_blt(src->devPrivate.ptr, dst->devPrivate.ptr, src->drawable.bitsPerPixel, src->devKind, dst->devKind, box->x1 + op->u.blt.sx, box->y1 + op->u.blt.sy, box->x1 + op->dst.x, box->y1 + op->dst.y, box->x2-box->x1, box->y2-box->y1); box++; } while (--n); } fastcall static void blt_put_composite_with_alpha__cpu(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { PixmapPtr dst = op->dst.pixmap; PixmapPtr src = op->u.blt.src_pixmap; assert(src->devPrivate.ptr); assert(src->devKind); assert(dst->devPrivate.ptr); assert(dst->devKind); memcpy_xor(src->devPrivate.ptr, dst->devPrivate.ptr, src->drawable.bitsPerPixel, src->devKind, dst->devKind, r->src.x + op->u.blt.sx, r->src.y + op->u.blt.sy, r->dst.x + op->dst.x, r->dst.y + op->dst.y, r->width, r->height, 0xffffffff, op->u.blt.pixel); } fastcall static void blt_put_composite_box_with_alpha__cpu(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { PixmapPtr dst = op->dst.pixmap; PixmapPtr src = op->u.blt.src_pixmap; assert(src->devPrivate.ptr); assert(src->devKind); assert(dst->devPrivate.ptr); assert(dst->devKind); memcpy_xor(src->devPrivate.ptr, dst->devPrivate.ptr, src->drawable.bitsPerPixel, src->devKind, dst->devKind, box->x1 + op->u.blt.sx, box->y1 + op->u.blt.sy, box->x1 + op->dst.x, box->y1 + op->dst.y, box->x2-box->x1, box->y2-box->y1, 0xffffffff, op->u.blt.pixel); } static void blt_put_composite_boxes_with_alpha__cpu(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int n) { PixmapPtr dst = op->dst.pixmap; PixmapPtr src = op->u.blt.src_pixmap; assert(src->devPrivate.ptr); assert(src->devKind); assert(dst->devPrivate.ptr); assert(dst->devKind); do { memcpy_xor(src->devPrivate.ptr, dst->devPrivate.ptr, src->drawable.bitsPerPixel, src->devKind, dst->devKind, box->x1 + op->u.blt.sx, box->y1 + op->u.blt.sy, box->x1 + op->dst.x, box->y1 + op->dst.y, box->x2-box->x1, box->y2-box->y1, 0xffffffff, op->u.blt.pixel); box++; } while (--n); } fastcall static void blt_put_composite(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { PixmapPtr dst = op->dst.pixmap; PixmapPtr src = op->u.blt.src_pixmap; struct sna_pixmap *dst_priv = sna_pixmap(dst); int pitch = src->devKind; char *data = src->devPrivate.ptr; int bpp = src->drawable.bitsPerPixel; int16_t dst_x = r->dst.x + op->dst.x; int16_t dst_y = r->dst.y + op->dst.y; int16_t src_x = r->src.x + op->u.blt.sx; int16_t src_y = r->src.y + op->u.blt.sy; if (!dst_priv->pinned && dst_x <= 0 && dst_y <= 0 && dst_x + r->width >= op->dst.width && dst_y + r->height >= op->dst.height) { data += (src_x - dst_x) * bpp / 8; data += (src_y - dst_y) * pitch; assert(op->dst.bo == dst_priv->gpu_bo); sna_replace(sna, op->dst.pixmap, data, pitch); } else { BoxRec box; bool ok; box.x1 = dst_x; box.y1 = dst_y; box.x2 = dst_x + r->width; box.y2 = dst_y + r->height; ok = sna_write_boxes(sna, dst, dst_priv->gpu_bo, 0, 0, data, pitch, src_x, src_y, &box, 1); assert(ok); (void)ok; } } fastcall static void blt_put_composite_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { PixmapPtr src = op->u.blt.src_pixmap; struct sna_pixmap *dst_priv = sna_pixmap(op->dst.pixmap); DBG(("%s: src=(%d, %d), dst=(%d, %d)\n", __FUNCTION__, op->u.blt.sx, op->u.blt.sy, op->dst.x, op->dst.y)); assert(src->devPrivate.ptr); assert(src->devKind); if (!dst_priv->pinned && box->x2 - box->x1 == op->dst.width && box->y2 - box->y1 == op->dst.height) { int pitch = src->devKind; int bpp = src->drawable.bitsPerPixel / 8; char *data = src->devPrivate.ptr; data += (box->y1 + op->u.blt.sy) * pitch; data += (box->x1 + op->u.blt.sx) * bpp; assert(op->dst.bo == dst_priv->gpu_bo); sna_replace(sna, op->dst.pixmap, data, pitch); } else { bool ok; ok = sna_write_boxes(sna, op->dst.pixmap, op->dst.bo, op->dst.x, op->dst.y, src->devPrivate.ptr, src->devKind, op->u.blt.sx, op->u.blt.sy, box, 1); assert(ok); (void)ok; } } static void blt_put_composite_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int n) { PixmapPtr src = op->u.blt.src_pixmap; struct sna_pixmap *dst_priv = sna_pixmap(op->dst.pixmap); DBG(("%s: src=(%d, %d), dst=(%d, %d), [(%d, %d), (%d, %d) x %d]\n", __FUNCTION__, op->u.blt.sx, op->u.blt.sy, op->dst.x, op->dst.y, box->x1, box->y1, box->x2, box->y2, n)); assert(src->devPrivate.ptr); assert(src->devKind); if (n == 1 && !dst_priv->pinned && box->x2 - box->x1 == op->dst.width && box->y2 - box->y1 == op->dst.height) { int pitch = src->devKind; int bpp = src->drawable.bitsPerPixel / 8; char *data = src->devPrivate.ptr; data += (box->y1 + op->u.blt.sy) * pitch; data += (box->x1 + op->u.blt.sx) * bpp; assert(op->dst.bo == dst_priv->gpu_bo); sna_replace(sna, op->dst.pixmap, data, pitch); } else { bool ok; ok = sna_write_boxes(sna, op->dst.pixmap, op->dst.bo, op->dst.x, op->dst.y, src->devPrivate.ptr, src->devKind, op->u.blt.sx, op->u.blt.sy, box, n); assert(ok); (void)ok; } } fastcall static void blt_put_composite_with_alpha(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { PixmapPtr dst = op->dst.pixmap; PixmapPtr src = op->u.blt.src_pixmap; struct sna_pixmap *dst_priv = sna_pixmap(dst); int pitch = src->devKind; char *data = src->devPrivate.ptr; int16_t dst_x = r->dst.x + op->dst.x; int16_t dst_y = r->dst.y + op->dst.y; int16_t src_x = r->src.x + op->u.blt.sx; int16_t src_y = r->src.y + op->u.blt.sy; assert(src->devPrivate.ptr); assert(src->devKind); if (!dst_priv->pinned && dst_x <= 0 && dst_y <= 0 && dst_x + r->width >= op->dst.width && dst_y + r->height >= op->dst.height) { int bpp = dst->drawable.bitsPerPixel / 8; data += (src_x - dst_x) * bpp; data += (src_y - dst_y) * pitch; assert(op->dst.bo == dst_priv->gpu_bo); sna_replace__xor(sna, op->dst.pixmap, data, pitch, 0xffffffff, op->u.blt.pixel); } else { BoxRec box; box.x1 = dst_x; box.y1 = dst_y; box.x2 = dst_x + r->width; box.y2 = dst_y + r->height; sna_write_boxes__xor(sna, dst, dst_priv->gpu_bo, 0, 0, data, pitch, src_x, src_y, &box, 1, 0xffffffff, op->u.blt.pixel); } } fastcall static void blt_put_composite_box_with_alpha(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { PixmapPtr src = op->u.blt.src_pixmap; struct sna_pixmap *dst_priv = sna_pixmap(op->dst.pixmap); DBG(("%s: src=(%d, %d), dst=(%d, %d)\n", __FUNCTION__, op->u.blt.sx, op->u.blt.sy, op->dst.x, op->dst.y)); assert(src->devPrivate.ptr); assert(src->devKind); if (!dst_priv->pinned && box->x2 - box->x1 == op->dst.width && box->y2 - box->y1 == op->dst.height) { int pitch = src->devKind; int bpp = src->drawable.bitsPerPixel / 8; char *data = src->devPrivate.ptr; data += (box->y1 + op->u.blt.sy) * pitch; data += (box->x1 + op->u.blt.sx) * bpp; assert(op->dst.bo == dst_priv->gpu_bo); sna_replace__xor(sna, op->dst.pixmap, data, pitch, 0xffffffff, op->u.blt.pixel); } else { sna_write_boxes__xor(sna, op->dst.pixmap, op->dst.bo, op->dst.x, op->dst.y, src->devPrivate.ptr, src->devKind, op->u.blt.sx, op->u.blt.sy, box, 1, 0xffffffff, op->u.blt.pixel); } } static void blt_put_composite_boxes_with_alpha(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int n) { PixmapPtr src = op->u.blt.src_pixmap; struct sna_pixmap *dst_priv = sna_pixmap(op->dst.pixmap); DBG(("%s: src=(%d, %d), dst=(%d, %d), [(%d, %d), (%d, %d) x %d]\n", __FUNCTION__, op->u.blt.sx, op->u.blt.sy, op->dst.x, op->dst.y, box->x1, box->y1, box->x2, box->y2, n)); assert(src->devPrivate.ptr); assert(src->devKind); if (n == 1 && !dst_priv->pinned && box->x2 - box->x1 == op->dst.width && box->y2 - box->y1 == op->dst.height) { int pitch = src->devKind; int bpp = src->drawable.bitsPerPixel / 8; char *data = src->devPrivate.ptr; data += (box->y1 + op->u.blt.sy) * pitch; data += (box->x1 + op->u.blt.sx) * bpp; assert(dst_priv->gpu_bo == op->dst.bo); sna_replace__xor(sna, op->dst.pixmap, data, pitch, 0xffffffff, op->u.blt.pixel); } else { sna_write_boxes__xor(sna, op->dst.pixmap, op->dst.bo, op->dst.x, op->dst.y, src->devPrivate.ptr, src->devKind, op->u.blt.sx, op->u.blt.sy, box, n, 0xffffffff, op->u.blt.pixel); } } static bool prepare_blt_put(struct sna *sna, struct sna_composite_op *op, uint32_t alpha_fixup) { DBG(("%s\n", __FUNCTION__)); assert(!sna_pixmap(op->dst.pixmap)->clear); if (op->dst.bo) { assert(op->dst.bo == sna_pixmap(op->dst.pixmap)->gpu_bo); if (alpha_fixup) { op->u.blt.pixel = alpha_fixup; op->blt = blt_put_composite_with_alpha; op->box = blt_put_composite_box_with_alpha; op->boxes = blt_put_composite_boxes_with_alpha; } else { op->blt = blt_put_composite; op->box = blt_put_composite_box; op->boxes = blt_put_composite_boxes; } } else { if (alpha_fixup) { op->u.blt.pixel = alpha_fixup; op->blt = blt_put_composite_with_alpha__cpu; op->box = blt_put_composite_box_with_alpha__cpu; op->boxes = blt_put_composite_boxes_with_alpha__cpu; } else { op->blt = blt_put_composite__cpu; op->box = blt_put_composite_box__cpu; op->boxes = blt_put_composite_boxes__cpu; } } op->done = nop_done; return true; } static bool is_clear(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); return priv && priv->clear; } static inline uint32_t over(uint32_t src, uint32_t dst) { uint32_t a = ~src >> 24; #define G_SHIFT 8 #define RB_MASK 0xff00ff #define RB_ONE_HALF 0x800080 #define RB_MASK_PLUS_ONE 0x10000100 #define UN8_rb_MUL_UN8(x, a, t) do { \ t = ((x) & RB_MASK) * (a); \ t += RB_ONE_HALF; \ x = (t + ((t >> G_SHIFT) & RB_MASK)) >> G_SHIFT; \ x &= RB_MASK; \ } while (0) #define UN8_rb_ADD_UN8_rb(x, y, t) do { \ t = ((x) + (y)); \ t |= RB_MASK_PLUS_ONE - ((t >> G_SHIFT) & RB_MASK); \ x = (t & RB_MASK); \ } while (0) #define UN8x4_MUL_UN8_ADD_UN8x4(x, a, y) do { \ uint32_t r1__, r2__, r3__, t__; \ \ r1__ = (x); \ r2__ = (y) & RB_MASK; \ UN8_rb_MUL_UN8(r1__, (a), t__); \ UN8_rb_ADD_UN8_rb(r1__, r2__, t__); \ \ r2__ = (x) >> G_SHIFT; \ r3__ = ((y) >> G_SHIFT) & RB_MASK; \ UN8_rb_MUL_UN8(r2__, (a), t__); \ UN8_rb_ADD_UN8_rb(r2__, r3__, t__); \ \ (x) = r1__ | (r2__ << G_SHIFT); \ } while (0) UN8x4_MUL_UN8_ADD_UN8x4(dst, a, src); return dst; } static inline uint32_t add(uint32_t src, uint32_t dst) { #define UN8x4_ADD_UN8x4(x, y) do { \ uint32_t r1__, r2__, r3__, t__; \ \ r1__ = (x) & RB_MASK; \ r2__ = (y) & RB_MASK; \ UN8_rb_ADD_UN8_rb(r1__, r2__, t__); \ \ r2__ = ((x) >> G_SHIFT) & RB_MASK; \ r3__ = ((y) >> G_SHIFT) & RB_MASK; \ UN8_rb_ADD_UN8_rb(r2__, r3__, t__); \ \ x = r1__ | (r2__ << G_SHIFT); \ } while (0) UN8x4_ADD_UN8x4(src, dst); return src; } bool sna_blt_composite(struct sna *sna, uint32_t op, PicturePtr src, PicturePtr dst, int16_t x, int16_t y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_op *tmp) { PictFormat src_format = src->format; PixmapPtr src_pixmap; struct kgem_bo *bo; int16_t tx, ty; BoxRec dst_box, src_box; uint32_t alpha_fixup; uint32_t color, hint; bool was_clear; bool ret; #if DEBUG_NO_BLT || NO_BLT_COMPOSITE return false; #endif DBG(("%s (%d, %d), (%d, %d), %dx%d\n", __FUNCTION__, x, y, dst_x, dst_y, width, height)); switch (dst->pDrawable->bitsPerPixel) { case 8: case 16: case 32: break; default: DBG(("%s: unhandled bpp: %d\n", __FUNCTION__, dst->pDrawable->bitsPerPixel)); return false; } tmp->dst.pixmap = get_drawable_pixmap(dst->pDrawable); was_clear = is_clear(tmp->dst.pixmap); if (width | height) { dst_box.x1 = dst_x; dst_box.x2 = bound(dst_x, width); dst_box.y1 = dst_y; dst_box.y2 = bound(dst_y, height); } else sna_render_picture_extents(dst, &dst_box); tmp->dst.format = dst->format; tmp->dst.width = tmp->dst.pixmap->drawable.width; tmp->dst.height = tmp->dst.pixmap->drawable.height; get_drawable_deltas(dst->pDrawable, tmp->dst.pixmap, &tmp->dst.x, &tmp->dst.y); if (op == PictOpClear) { clear: if (was_clear && sna_pixmap(tmp->dst.pixmap)->clear_color == 0) { sna_pixmap(tmp->dst.pixmap)->clear = true; return prepare_blt_nop(sna, tmp); } hint = 0; if (can_render(sna)) { hint |= PREFER_GPU; if ((flags & COMPOSITE_PARTIAL) == 0) { hint |= IGNORE_DAMAGE; if (width == tmp->dst.pixmap->drawable.width && height == tmp->dst.pixmap->drawable.height) hint |= REPLACES; } } tmp->dst.bo = sna_drawable_use_bo(dst->pDrawable, hint, &dst_box, &tmp->damage); if (tmp->dst.bo) { if (!kgem_bo_can_blt(&sna->kgem, tmp->dst.bo)) { DBG(("%s: can not blit to dst, tiling? %d, pitch? %d\n", __FUNCTION__, tmp->dst.bo->tiling, tmp->dst.bo->pitch)); return false; } if (hint & REPLACES) kgem_bo_undo(&sna->kgem, tmp->dst.bo); } else { RegionRec region; region.extents = dst_box; region.data = NULL; hint = MOVE_WRITE | MOVE_INPLACE_HINT; if (flags & COMPOSITE_PARTIAL) hint |= MOVE_READ; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, ®ion, hint)) return false; } return prepare_blt_clear(sna, tmp); } if (is_solid(src)) { if ((op == PictOpOver || op == PictOpAdd) && is_transparent(src)) { sna_pixmap(tmp->dst.pixmap)->clear = was_clear; return prepare_blt_nop(sna, tmp); } if (op == PictOpOver && is_opaque_solid(src)) op = PictOpSrc; if (op == PictOpAdd && is_white(src)) op = PictOpSrc; if (was_clear && (op == PictOpAdd || op == PictOpOver)) { if (sna_pixmap(tmp->dst.pixmap)->clear_color == 0) op = PictOpSrc; if (op == PictOpOver) { color = over(get_solid_color(src, PICT_a8r8g8b8), color_convert(sna_pixmap(tmp->dst.pixmap)->clear_color, dst->format, PICT_a8r8g8b8)); op = PictOpSrc; DBG(("%s: precomputing solid OVER (%08x, %08x) -> %08x\n", __FUNCTION__, get_solid_color(src, PICT_a8r8g8b8), color_convert(sna_pixmap(tmp->dst.pixmap)->clear_color, dst->format, PICT_a8r8g8b8), color)); } if (op == PictOpAdd) { color = add(get_solid_color(src, PICT_a8r8g8b8), color_convert(sna_pixmap(tmp->dst.pixmap)->clear_color, dst->format, PICT_a8r8g8b8)); op = PictOpSrc; DBG(("%s: precomputing solid ADD (%08x, %08x) -> %08x\n", __FUNCTION__, get_solid_color(src, PICT_a8r8g8b8), color_convert(sna_pixmap(tmp->dst.pixmap)->clear_color, dst->format, PICT_a8r8g8b8), color)); } } if (op == PictOpOutReverse && is_opaque_solid(src)) goto clear; if (op != PictOpSrc) { DBG(("%s: unsupported op [%d] for blitting\n", __FUNCTION__, op)); return false; } color = get_solid_color(src, tmp->dst.format); fill: if (color == 0) goto clear; if (was_clear && sna_pixmap(tmp->dst.pixmap)->clear_color == color) { sna_pixmap(tmp->dst.pixmap)->clear = true; return prepare_blt_nop(sna, tmp); } hint = 0; if (can_render(sna)) { hint |= PREFER_GPU; if ((flags & COMPOSITE_PARTIAL) == 0) { hint |= IGNORE_DAMAGE; if (width == tmp->dst.pixmap->drawable.width && height == tmp->dst.pixmap->drawable.height) hint |= REPLACES; } } tmp->dst.bo = sna_drawable_use_bo(dst->pDrawable, hint, &dst_box, &tmp->damage); if (tmp->dst.bo) { if (!kgem_bo_can_blt(&sna->kgem, tmp->dst.bo)) { DBG(("%s: can not blit to dst, tiling? %d, pitch? %d\n", __FUNCTION__, tmp->dst.bo->tiling, tmp->dst.bo->pitch)); return false; } if (hint & REPLACES) kgem_bo_undo(&sna->kgem, tmp->dst.bo); } else { RegionRec region; region.extents = dst_box; region.data = NULL; hint = MOVE_WRITE | MOVE_INPLACE_HINT; if (flags & COMPOSITE_PARTIAL) hint |= MOVE_READ; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, ®ion, hint)) return false; } return prepare_blt_fill(sna, tmp, color); } if (!src->pDrawable) { DBG(("%s: unsupported procedural source\n", __FUNCTION__)); return false; } if (src->filter == PictFilterConvolution) { DBG(("%s: convolutions filters not handled\n", __FUNCTION__)); return false; } if (op == PictOpOver && PICT_FORMAT_A(src_format) == 0) op = PictOpSrc; if (op != PictOpSrc) { DBG(("%s: unsupported op [%d] for blitting\n", __FUNCTION__, op)); return false; } if (!sna_transform_is_imprecise_integer_translation(src->transform, src->filter, dst->polyMode == PolyModePrecise, &tx, &ty)) { DBG(("%s: source transform is not an integer translation\n", __FUNCTION__)); return false; } DBG(("%s: converting transform to integer translation? (%d, %d)\n", __FUNCTION__, src->transform != NULL, tx, ty)); x += tx; y += ty; if ((x >= src->pDrawable->width || y >= src->pDrawable->height || x + width <= 0 || y + height <= 0) && (!src->repeat || src->repeatType == RepeatNone)) { DBG(("%s: source is outside of valid area, converting to clear\n", __FUNCTION__)); goto clear; } src_pixmap = get_drawable_pixmap(src->pDrawable); if (is_clear(src_pixmap)) { if (src->repeat || (x >= 0 && y >= 0 && x + width < src_pixmap->drawable.width && y + height < src_pixmap->drawable.height)) { color = color_convert(sna_pixmap(src_pixmap)->clear_color, src->format, tmp->dst.format); goto fill; } } alpha_fixup = 0; if (!(dst->format == src_format || dst->format == alphaless(src_format) || (alphaless(dst->format) == alphaless(src_format) && sna_get_pixel_from_rgba(&alpha_fixup, 0, 0, 0, 0xffff, dst->format)))) { DBG(("%s: incompatible src/dst formats src=%08x, dst=%08x\n", __FUNCTION__, (unsigned)src_format, dst->format)); return false; } /* XXX tiling? fixup extend none? */ if (x < 0 || y < 0 || x + width > src->pDrawable->width || y + height > src->pDrawable->height) { DBG(("%s: source extends outside (%d, %d), (%d, %d) of valid drawable %dx%d, repeat=%d\n", __FUNCTION__, x, y, x+width, y+width, src->pDrawable->width, src->pDrawable->height, src->repeatType)); if (src->repeat && src->repeatType == RepeatNormal) { x = x % src->pDrawable->width; y = y % src->pDrawable->height; if (x < 0) x += src->pDrawable->width; if (y < 0) y += src->pDrawable->height; if (x + width > src->pDrawable->width || y + height > src->pDrawable->height) return false; } else return false; } get_drawable_deltas(src->pDrawable, src_pixmap, &tx, &ty); x += tx + src->pDrawable->x; y += ty + src->pDrawable->y; if (x < 0 || y < 0 || x + width > src_pixmap->drawable.width || y + height > src_pixmap->drawable.height) { DBG(("%s: source extends outside (%d, %d), (%d, %d) of valid pixmap %dx%d\n", __FUNCTION__, x, y, x+width, y+width, src_pixmap->drawable.width, src_pixmap->drawable.height)); return false; } tmp->u.blt.src_pixmap = src_pixmap; tmp->u.blt.sx = x - dst_x; tmp->u.blt.sy = y - dst_y; DBG(("%s: blt dst offset (%d, %d), source offset (%d, %d), with alpha fixup? %x\n", __FUNCTION__, tmp->dst.x, tmp->dst.y, tmp->u.blt.sx, tmp->u.blt.sy, alpha_fixup)); src_box.x1 = x; src_box.y1 = y; src_box.x2 = x + width; src_box.y2 = y + height; bo = __sna_render_pixmap_bo(sna, src_pixmap, &src_box, true); if (bo && !kgem_bo_can_blt(&sna->kgem, bo)) { DBG(("%s: can not blit from src size=%dx%d, tiling? %d, pitch? %d\n", __FUNCTION__, src_pixmap->drawable.width < sna->render.max_3d_size, src_pixmap->drawable.height < sna->render.max_3d_size, bo->tiling, bo->pitch)); if (src_pixmap->drawable.width <= sna->render.max_3d_size && src_pixmap->drawable.height <= sna->render.max_3d_size && bo->pitch <= sna->render.max_3d_pitch && (flags & COMPOSITE_FALLBACK) == 0) { return false; } bo = NULL; } hint = 0; if (bo || can_render(sna)) { hint |= PREFER_GPU; if ((flags & COMPOSITE_PARTIAL) == 0) { hint |= IGNORE_DAMAGE; if (width == tmp->dst.pixmap->drawable.width && height == tmp->dst.pixmap->drawable.height) hint |= REPLACES; } if (bo) hint |= FORCE_GPU; } tmp->dst.bo = sna_drawable_use_bo(dst->pDrawable, hint, &dst_box, &tmp->damage); if (tmp->dst.bo && hint & REPLACES) { struct sna_pixmap *priv = sna_pixmap(tmp->dst.pixmap); kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); } if (tmp->dst.pixmap == src_pixmap) bo = __sna_render_pixmap_bo(sna, src_pixmap, &src_box, true); ret = false; if (bo) { if (!tmp->dst.bo) { DBG(("%s: fallback -- unaccelerated read back\n", __FUNCTION__)); fallback: if (flags & COMPOSITE_FALLBACK || !kgem_bo_is_busy(bo)) goto put; } else if (!kgem_bo_can_blt(&sna->kgem, bo)) { DBG(("%s: fallback -- cannot blit from source\n", __FUNCTION__)); goto fallback; } else if (bo->snoop && tmp->dst.bo->snoop) { DBG(("%s: fallback -- can not copy between snooped bo\n", __FUNCTION__)); goto put; } else if (!kgem_bo_can_blt(&sna->kgem, tmp->dst.bo)) { DBG(("%s: fallback -- unaccelerated upload\n", __FUNCTION__)); goto fallback; } else { ret = prepare_blt_copy(sna, tmp, bo, alpha_fixup); if (!ret) goto fallback; } } else { RegionRec region; put: if (tmp->dst.bo == sna_pixmap(tmp->dst.pixmap)->cpu_bo) { DBG(("%s: dropping upload into CPU bo\n", __FUNCTION__)); tmp->dst.bo = NULL; tmp->damage = NULL; } if (tmp->dst.bo == NULL) { hint = MOVE_INPLACE_HINT | MOVE_WRITE; if (flags & COMPOSITE_PARTIAL) hint |= MOVE_READ; region.extents = dst_box; region.data = NULL; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, ®ion, hint)) return false; assert(tmp->damage == NULL); } region.extents = src_box; region.data = NULL; if (!sna_drawable_move_region_to_cpu(&src_pixmap->drawable, ®ion, MOVE_READ)) return false; ret = prepare_blt_put(sna, tmp, alpha_fixup); } return ret; } static void convert_done(struct sna *sna, const struct sna_composite_op *op) { struct kgem *kgem = &sna->kgem; assert(kgem->nbatch <= KGEM_BATCH_SIZE(kgem)); if (kgem->nexec > 1 && __kgem_ring_empty(kgem)) { DBG(("%s: flushing BLT operation on empty ring\n", __FUNCTION__)); _kgem_submit(kgem); } kgem_bo_destroy(kgem, op->src.bo); sna_render_composite_redirect_done(sna, op); } static void gen6_convert_done(struct sna *sna, const struct sna_composite_op *op) { struct kgem *kgem = &sna->kgem; if (kgem_check_batch(kgem, 3)) { uint32_t *b = kgem->batch + kgem->nbatch; assert(sna->kgem.mode == KGEM_BLT); b[0] = XY_SETUP_CLIP; b[1] = b[2] = 0; kgem->nbatch += 3; assert(kgem->nbatch < kgem->surface); } convert_done(sna, op); } bool sna_blt_composite__convert(struct sna *sna, int x, int y, int width, int height, struct sna_composite_op *tmp) { uint32_t alpha_fixup; int sx, sy; uint8_t op; #if DEBUG_NO_BLT || NO_BLT_COMPOSITE return false; #endif DBG(("%s src=%d, dst=%d (redirect? %d)\n", __FUNCTION__, tmp->src.bo->handle, tmp->dst.bo->handle, tmp->redirect.real_bo ? tmp->redirect.real_bo->handle : 0)); if (!kgem_bo_can_blt(&sna->kgem, tmp->dst.bo) || !kgem_bo_can_blt(&sna->kgem, tmp->src.bo)) { DBG(("%s: cannot blt from src or to dst\n", __FUNCTION__)); return false; } if (tmp->src.transform) { DBG(("%s: transforms not handled by the BLT\n", __FUNCTION__)); return false; } if (tmp->src.filter == PictFilterConvolution) { DBG(("%s: convolutions filters not handled\n", __FUNCTION__)); return false; } op = tmp->op; if (op == PictOpOver && PICT_FORMAT_A(tmp->src.pict_format) == 0) op = PictOpSrc; if (op != PictOpSrc) { DBG(("%s: unsupported op [%d] for blitting\n", __FUNCTION__, op)); return false; } alpha_fixup = 0; if (!(tmp->dst.format == tmp->src.pict_format || tmp->dst.format == alphaless(tmp->src.pict_format) || (alphaless(tmp->dst.format) == alphaless(tmp->src.pict_format) && sna_get_pixel_from_rgba(&alpha_fixup, 0, 0, 0, 0xffff, tmp->dst.format)))) { DBG(("%s: incompatible src/dst formats src=%08x, dst=%08x\n", __FUNCTION__, (unsigned)tmp->src.pict_format, (unsigned)tmp->dst.format)); return false; } sx = tmp->src.offset[0]; sy = tmp->src.offset[1]; x += sx; y += sy; if (x < 0 || y < 0 || x + width > tmp->src.width || y + height > tmp->src.height) { DBG(("%s: source extends outside (%d, %d), (%d, %d) of valid drawable %dx%d\n", __FUNCTION__, x, y, x+width, y+width, tmp->src.width, tmp->src.height)); if (tmp->src.repeat == RepeatNormal) { int xx = x % tmp->src.width; int yy = y % tmp->src.height; if (xx < 0) xx += tmp->src.width; if (yy < 0) yy += tmp->src.height; if (xx + width > tmp->src.width || yy + height > tmp->src.height) return false; sx += xx - x; sy += yy - y; } else return false; } DBG(("%s: blt dst offset (%d, %d), source offset (%d, %d), with alpha fixup? %x\n", __FUNCTION__, tmp->dst.x, tmp->dst.y, sx, sy, alpha_fixup)); tmp->u.blt.src_pixmap = NULL; tmp->u.blt.sx = sx; tmp->u.blt.sy = sy; kgem_set_mode(&sna->kgem, KGEM_BLT, tmp->dst.bo); if (!kgem_check_many_bo_fenced(&sna->kgem, tmp->dst.bo, tmp->src.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_many_bo_fenced(&sna->kgem, tmp->dst.bo, tmp->src.bo, NULL)) { DBG(("%s: fallback -- no room in aperture\n", __FUNCTION__)); return sna_tiling_blt_composite(sna, tmp, tmp->src.bo, PICT_FORMAT_BPP(tmp->src.pict_format), alpha_fixup); } _kgem_set_mode(&sna->kgem, KGEM_BLT); } if (alpha_fixup) { tmp->blt = blt_composite_copy_with_alpha; tmp->box = blt_composite_copy_box_with_alpha; tmp->boxes = blt_composite_copy_boxes_with_alpha; if (!sna_blt_alpha_fixup_init(sna, &tmp->u.blt, tmp->src.bo, tmp->dst.bo, PICT_FORMAT_BPP(tmp->src.pict_format), alpha_fixup)) return false; } else { tmp->blt = blt_composite_copy; tmp->box = blt_composite_copy_box; tmp->boxes = blt_composite_copy_boxes; tmp->thread_boxes = blt_composite_copy_boxes__thread; if (!sna_blt_copy_init(sna, &tmp->u.blt, tmp->src.bo, tmp->dst.bo, PICT_FORMAT_BPP(tmp->src.pict_format), GXcopy)) return false; } tmp->done = convert_done; if (sna->kgem.gen >= 060 && tmp->src.bo == tmp->dst.bo) tmp->done = gen6_convert_done; return true; } static void sna_blt_fill_op_blt(struct sna *sna, const struct sna_fill_op *op, int16_t x, int16_t y, int16_t width, int16_t height) { if (sna->blt_state.fill_bo != op->base.u.blt.bo[0]->unique_id) { const struct sna_blt_state *blt = &op->base.u.blt; sna_blt_fill_begin(sna, blt); sna->blt_state.fill_bo = blt->bo[0]->unique_id; sna->blt_state.fill_pixel = blt->pixel; sna->blt_state.fill_alu = blt->alu; } sna_blt_fill_one(sna, &op->base.u.blt, x, y, width, height); } fastcall static void sna_blt_fill_op_box(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box) { if (sna->blt_state.fill_bo != op->base.u.blt.bo[0]->unique_id) { const struct sna_blt_state *blt = &op->base.u.blt; sna_blt_fill_begin(sna, blt); sna->blt_state.fill_bo = blt->bo[0]->unique_id; sna->blt_state.fill_pixel = blt->pixel; sna->blt_state.fill_alu = blt->alu; } _sna_blt_fill_box(sna, &op->base.u.blt, box); } fastcall static void sna_blt_fill_op_boxes(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box, int nbox) { if (sna->blt_state.fill_bo != op->base.u.blt.bo[0]->unique_id) { const struct sna_blt_state *blt = &op->base.u.blt; sna_blt_fill_begin(sna, blt); sna->blt_state.fill_bo = blt->bo[0]->unique_id; sna->blt_state.fill_pixel = blt->pixel; sna->blt_state.fill_alu = blt->alu; } _sna_blt_fill_boxes(sna, &op->base.u.blt, box, nbox); } static inline uint64_t pt_add(uint32_t cmd, const DDXPointRec *pt, int16_t dx, int16_t dy) { union { DDXPointRec pt; uint32_t i; } u; u.pt.x = pt->x + dx; u.pt.y = pt->y + dy; return cmd | (uint64_t)u.i<<32; } fastcall static void sna_blt_fill_op_points(struct sna *sna, const struct sna_fill_op *op, int16_t dx, int16_t dy, const DDXPointRec *p, int n) { const struct sna_blt_state *blt = &op->base.u.blt; struct kgem *kgem = &sna->kgem; uint32_t cmd; DBG(("%s: %08x x %d\n", __FUNCTION__, blt->pixel, n)); if (sna->blt_state.fill_bo != op->base.u.blt.bo[0]->unique_id) { sna_blt_fill_begin(sna, blt); sna->blt_state.fill_bo = blt->bo[0]->unique_id; sna->blt_state.fill_pixel = blt->pixel; sna->blt_state.fill_alu = blt->alu; } if (!kgem_check_batch(kgem, 2)) sna_blt_fill_begin(sna, blt); cmd = XY_PIXEL_BLT; if (kgem->gen >= 040 && op->base.u.blt.bo[0]->tiling) cmd |= BLT_DST_TILED; do { uint32_t *b = kgem->batch + kgem->nbatch; int n_this_time, rem; assert(sna->kgem.mode == KGEM_BLT); n_this_time = n; rem = kgem_batch_space(kgem); if (2*n_this_time > rem) n_this_time = rem / 2; assert(n_this_time); n -= n_this_time; kgem->nbatch += 2 * n_this_time; assert(kgem->nbatch < kgem->surface); if ((dx|dy) == 0) { while (n_this_time >= 8) { *((uint64_t *)b + 0) = pt_add(cmd, p+0, 0, 0); *((uint64_t *)b + 1) = pt_add(cmd, p+1, 0, 0); *((uint64_t *)b + 2) = pt_add(cmd, p+2, 0, 0); *((uint64_t *)b + 3) = pt_add(cmd, p+3, 0, 0); *((uint64_t *)b + 4) = pt_add(cmd, p+4, 0, 0); *((uint64_t *)b + 5) = pt_add(cmd, p+5, 0, 0); *((uint64_t *)b + 6) = pt_add(cmd, p+6, 0, 0); *((uint64_t *)b + 7) = pt_add(cmd, p+7, 0, 0); b += 16; n_this_time -= 8; p += 8; } if (n_this_time & 4) { *((uint64_t *)b + 0) = pt_add(cmd, p+0, 0, 0); *((uint64_t *)b + 1) = pt_add(cmd, p+1, 0, 0); *((uint64_t *)b + 2) = pt_add(cmd, p+2, 0, 0); *((uint64_t *)b + 3) = pt_add(cmd, p+3, 0, 0); b += 8; p += 4; } if (n_this_time & 2) { *((uint64_t *)b + 0) = pt_add(cmd, p+0, 0, 0); *((uint64_t *)b + 1) = pt_add(cmd, p+1, 0, 0); b += 4; p += 2; } if (n_this_time & 1) *((uint64_t *)b + 0) = pt_add(cmd, p++, 0, 0); } else { while (n_this_time >= 8) { *((uint64_t *)b + 0) = pt_add(cmd, p+0, dx, dy); *((uint64_t *)b + 1) = pt_add(cmd, p+1, dx, dy); *((uint64_t *)b + 2) = pt_add(cmd, p+2, dx, dy); *((uint64_t *)b + 3) = pt_add(cmd, p+3, dx, dy); *((uint64_t *)b + 4) = pt_add(cmd, p+4, dx, dy); *((uint64_t *)b + 5) = pt_add(cmd, p+5, dx, dy); *((uint64_t *)b + 6) = pt_add(cmd, p+6, dx, dy); *((uint64_t *)b + 7) = pt_add(cmd, p+7, dx, dy); b += 16; n_this_time -= 8; p += 8; } if (n_this_time & 4) { *((uint64_t *)b + 0) = pt_add(cmd, p+0, dx, dy); *((uint64_t *)b + 1) = pt_add(cmd, p+1, dx, dy); *((uint64_t *)b + 2) = pt_add(cmd, p+2, dx, dy); *((uint64_t *)b + 3) = pt_add(cmd, p+3, dx, dy); b += 8; p += 8; } if (n_this_time & 2) { *((uint64_t *)b + 0) = pt_add(cmd, p+0, dx, dy); *((uint64_t *)b + 1) = pt_add(cmd, p+1, dx, dy); b += 4; p += 2; } if (n_this_time & 1) *((uint64_t *)b + 0) = pt_add(cmd, p++, dx, dy); } if (!n) return; sna_blt_fill_begin(sna, blt); } while (1); } bool sna_blt_fill(struct sna *sna, uint8_t alu, struct kgem_bo *bo, int bpp, uint32_t pixel, struct sna_fill_op *fill) { #if DEBUG_NO_BLT || NO_BLT_FILL return false; #endif DBG(("%s(alu=%d, pixel=%x, bpp=%d)\n", __FUNCTION__, alu, pixel, bpp)); if (!kgem_bo_can_blt(&sna->kgem, bo)) { DBG(("%s: rejected due to incompatible Y-tiling\n", __FUNCTION__)); return false; } if (!sna_blt_fill_init(sna, &fill->base.u.blt, bo, bpp, alu, pixel)) return false; assert(sna->kgem.mode == KGEM_BLT); fill->blt = sna_blt_fill_op_blt; fill->box = sna_blt_fill_op_box; fill->boxes = sna_blt_fill_op_boxes; fill->points = sna_blt_fill_op_points; fill->done = (void (*)(struct sna *, const struct sna_fill_op *))nop_done; return true; } static void sna_blt_copy_op_blt(struct sna *sna, const struct sna_copy_op *op, int16_t src_x, int16_t src_y, int16_t width, int16_t height, int16_t dst_x, int16_t dst_y) { sna_blt_copy_one(sna, &op->base.u.blt, src_x, src_y, width, height, dst_x, dst_y); } bool sna_blt_copy(struct sna *sna, uint8_t alu, struct kgem_bo *src, struct kgem_bo *dst, int bpp, struct sna_copy_op *op) { #if DEBUG_NO_BLT || NO_BLT_COPY return false; #endif if (!kgem_bo_can_blt(&sna->kgem, src)) return false; if (!kgem_bo_can_blt(&sna->kgem, dst)) return false; if (!sna_blt_copy_init(sna, &op->base.u.blt, src, dst, bpp, alu)) return false; op->blt = sna_blt_copy_op_blt; if (sna->kgem.gen >= 060 && src == dst) op->done = (void (*)(struct sna *, const struct sna_copy_op *)) gen6_blt_copy_done; else op->done = (void (*)(struct sna *, const struct sna_copy_op *)) nop_done; return true; } static bool sna_blt_fill_box(struct sna *sna, uint8_t alu, struct kgem_bo *bo, int bpp, uint32_t color, const BoxRec *box) { struct kgem *kgem = &sna->kgem; uint32_t br13, cmd, *b; bool overwrites; assert(kgem_bo_can_blt (kgem, bo)); DBG(("%s: box=((%d, %d), (%d, %d))\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); assert(box->x1 >= 0); assert(box->y1 >= 0); cmd = XY_COLOR_BLT | (kgem->gen >= 0100 ? 5 : 4); br13 = bo->pitch; if (kgem->gen >= 040 && bo->tiling) { cmd |= BLT_DST_TILED; br13 >>= 2; } assert(br13 <= MAXSHORT); br13 |= fill_ROP[alu] << 16; switch (bpp) { default: assert(0); case 32: cmd |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; br13 |= 1 << 25; /* RGB8888 */ case 16: br13 |= 1 << 24; /* RGB565 */ case 8: break; } /* All too frequently one blt completely overwrites the previous */ overwrites = alu == GXcopy || alu == GXclear || alu == GXset; if (overwrites) { if (sna->kgem.gen >= 0100) { if (kgem->nbatch >= 7 && kgem->batch[kgem->nbatch-7] == cmd && *(uint64_t *)&kgem->batch[kgem->nbatch-5] == *(const uint64_t *)box && kgem->reloc[kgem->nreloc-1].target_handle == bo->target_handle) { DBG(("%s: replacing last fill\n", __FUNCTION__)); kgem->batch[kgem->nbatch-6] = br13; kgem->batch[kgem->nbatch-1] = color; return true; } if (kgem->nbatch >= 10 && (kgem->batch[kgem->nbatch-10] & 0xffc00000) == XY_SRC_COPY_BLT_CMD && *(uint64_t *)&kgem->batch[kgem->nbatch-8] == *(const uint64_t *)box && kgem->reloc[kgem->nreloc-2].target_handle == bo->target_handle) { DBG(("%s: replacing last copy\n", __FUNCTION__)); kgem->batch[kgem->nbatch-10] = cmd; kgem->batch[kgem->nbatch-8] = br13; kgem->batch[kgem->nbatch-4] = color; /* Keep the src bo as part of the execlist, just remove * its relocation entry. */ kgem->nreloc--; kgem->nbatch -= 3; return true; } } else { if (kgem->nbatch >= 6 && kgem->batch[kgem->nbatch-6] == cmd && *(uint64_t *)&kgem->batch[kgem->nbatch-4] == *(const uint64_t *)box && kgem->reloc[kgem->nreloc-1].target_handle == bo->target_handle) { DBG(("%s: replacing last fill\n", __FUNCTION__)); kgem->batch[kgem->nbatch-5] = br13; kgem->batch[kgem->nbatch-1] = color; return true; } if (kgem->nbatch >= 8 && (kgem->batch[kgem->nbatch-8] & 0xffc00000) == XY_SRC_COPY_BLT_CMD && *(uint64_t *)&kgem->batch[kgem->nbatch-6] == *(const uint64_t *)box && kgem->reloc[kgem->nreloc-2].target_handle == bo->target_handle) { DBG(("%s: replacing last copy\n", __FUNCTION__)); kgem->batch[kgem->nbatch-8] = cmd; kgem->batch[kgem->nbatch-7] = br13; kgem->batch[kgem->nbatch-3] = color; /* Keep the src bo as part of the execlist, just remove * its relocation entry. */ kgem->nreloc--; kgem->nbatch -= 2; return true; } } } /* If we are currently emitting SCANLINES, keep doing so */ if (sna->blt_state.fill_bo == bo->unique_id && sna->blt_state.fill_pixel == color && (sna->blt_state.fill_alu == alu || sna->blt_state.fill_alu == ~alu)) { DBG(("%s: matching last fill, converting to scanlines\n", __FUNCTION__)); return false; } kgem_set_mode(kgem, KGEM_BLT, bo); if (!kgem_check_batch(kgem, 7) || !kgem_check_reloc(kgem, 1) || !kgem_check_bo_fenced(kgem, bo)) { kgem_submit(kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(kgem, KGEM_BLT); } assert(kgem_check_batch(kgem, 6)); assert(kgem_check_reloc(kgem, 1)); assert(sna->kgem.mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; b[0] = cmd; b[1] = br13; *(uint64_t *)(b+2) = *(const uint64_t *)box; if (kgem->gen >= 0100) { *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = color; kgem->nbatch += 7; } else { b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = color; kgem->nbatch += 6; } assert(kgem->nbatch < kgem->surface); sna->blt_state.fill_bo = bo->unique_id; sna->blt_state.fill_pixel = color; sna->blt_state.fill_alu = ~alu; return true; } bool sna_blt_fill_boxes(struct sna *sna, uint8_t alu, struct kgem_bo *bo, int bpp, uint32_t pixel, const BoxRec *box, int nbox) { struct kgem *kgem = &sna->kgem; uint32_t br13, cmd; #if DEBUG_NO_BLT || NO_BLT_FILL_BOXES return false; #endif DBG(("%s (%d, %08x, %d) x %d\n", __FUNCTION__, bpp, pixel, alu, nbox)); if (!kgem_bo_can_blt(kgem, bo)) { DBG(("%s: fallback -- cannot blt to dst\n", __FUNCTION__)); return false; } if (alu == GXclear) pixel = 0; else if (alu == GXcopy) { if (pixel == 0) alu = GXclear; else if (pixel == -1) alu = GXset; } if (nbox == 1 && sna_blt_fill_box(sna, alu, bo, bpp, pixel, box)) return true; br13 = bo->pitch; cmd = XY_SCANLINE_BLT; if (kgem->gen >= 040 && bo->tiling) { cmd |= 1 << 11; br13 >>= 2; } assert(br13 <= MAXSHORT); br13 |= 1<<31 | fill_ROP[alu] << 16; switch (bpp) { default: assert(0); case 32: br13 |= 1 << 25; /* RGB8888 */ case 16: br13 |= 1 << 24; /* RGB565 */ case 8: break; } kgem_set_mode(kgem, KGEM_BLT, bo); if (!kgem_check_batch(kgem, 14) || !kgem_check_bo_fenced(kgem, bo)) { kgem_submit(kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(kgem, KGEM_BLT); } if (sna->blt_state.fill_bo != bo->unique_id || sna->blt_state.fill_pixel != pixel || sna->blt_state.fill_alu != alu) { uint32_t *b; if (!kgem_check_batch(kgem, 24) || !kgem_check_reloc(kgem, 1)) { _kgem_submit(kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(kgem, KGEM_BLT); } assert(sna->kgem.mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; if (kgem->gen >= 0100) { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 8; if (bpp == 32) b[0] |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (bo->tiling) b[0] |= BLT_DST_TILED; b[1] = br13; b[2] = 0; b[3] = 0; *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = pixel; b[7] = pixel; b[8] = 0; b[9] = 0; kgem->nbatch += 10; } else { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 7; if (bpp == 32) b[0] |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (bo->tiling && kgem->gen >= 040) b[0] |= BLT_DST_TILED; b[1] = br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = pixel; b[6] = pixel; b[7] = 0; b[8] = 0; kgem->nbatch += 9; } assert(kgem->nbatch < kgem->surface); sna->blt_state.fill_bo = bo->unique_id; sna->blt_state.fill_pixel = pixel; sna->blt_state.fill_alu = alu; } do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (3*nbox_this_time > rem) nbox_this_time = rem / 3; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; assert(sna->kgem.mode == KGEM_BLT); do { uint32_t *b; DBG(("%s: (%d, %d), (%d, %d): %08x\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, pixel)); assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->y2 * bo->pitch <= kgem_bo_size(bo)); b = kgem->batch + kgem->nbatch; kgem->nbatch += 3; assert(kgem->nbatch < kgem->surface); b[0] = cmd; *(uint64_t *)(b+1) = *(const uint64_t *)box; box++; } while (--nbox_this_time); if (nbox) { uint32_t *b; _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); assert(sna->kgem.mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; if (kgem->gen >= 0100) { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 8; if (bpp == 32) b[0] |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (bo->tiling) b[0] |= BLT_DST_TILED; b[1] = br13; b[2] = 0; b[3] = 0; *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = pixel; b[7] = pixel; b[8] = 0; b[9] = 0; kgem->nbatch += 10; } else { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 7; if (bpp == 32) b[0] |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; if (bo->tiling && kgem->gen >= 040) b[0] |= BLT_DST_TILED; b[1] = br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = pixel; b[6] = pixel; b[7] = 0; b[8] = 0; kgem->nbatch += 9; } assert(kgem->nbatch < kgem->surface); assert(kgem_check_batch(kgem, 3)); } } while (nbox); if (kgem->nexec > 1 && __kgem_ring_empty(kgem)) { DBG(("%s: flushing BLT operation on empty ring\n", __FUNCTION__)); _kgem_submit(kgem); } return true; } bool sna_blt_copy_boxes(struct sna *sna, uint8_t alu, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, int bpp, const BoxRec *box, int nbox) { struct kgem *kgem = &sna->kgem; unsigned src_pitch, br13, cmd; #if DEBUG_NO_BLT || NO_BLT_COPY_BOXES return false; #endif DBG(("%s src=(%d, %d) -> (%d, %d) x %d, tiling=(%d, %d), pitch=(%d, %d)\n", __FUNCTION__, src_dx, src_dy, dst_dx, dst_dy, nbox, src_bo->tiling, dst_bo->tiling, src_bo->pitch, dst_bo->pitch)); assert(nbox); if (wedged(sna) || !kgem_bo_can_blt(kgem, src_bo) || !kgem_bo_can_blt(kgem, dst_bo)) { DBG(("%s: cannot blt to src? %d or dst? %d\n", __FUNCTION__, kgem_bo_can_blt(kgem, src_bo), kgem_bo_can_blt(kgem, dst_bo))); return false; } cmd = XY_SRC_COPY_BLT_CMD; if (bpp == 32) cmd |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; src_pitch = src_bo->pitch; if (kgem->gen >= 040 && src_bo->tiling) { cmd |= BLT_SRC_TILED; src_pitch >>= 2; } assert(src_pitch <= MAXSHORT); br13 = dst_bo->pitch; if (kgem->gen >= 040 && dst_bo->tiling) { cmd |= BLT_DST_TILED; br13 >>= 2; } assert(br13 <= MAXSHORT); br13 |= copy_ROP[alu] << 16; switch (bpp) { default: assert(0); case 32: br13 |= 1 << 25; /* RGB8888 */ case 16: br13 |= 1 << 24; /* RGB565 */ case 8: break; } /* Compare first box against a previous fill */ if ((alu == GXcopy || alu == GXclear || alu == GXset) && kgem->reloc[kgem->nreloc-1].target_handle == dst_bo->target_handle) { if (kgem->gen >= 0100) { if (kgem->nbatch >= 7 && kgem->batch[kgem->nbatch-7] == (XY_COLOR_BLT | (cmd & (BLT_DST_TILED | BLT_WRITE_ALPHA | BLT_WRITE_RGB)) | 5) && kgem->batch[kgem->nbatch-5] == ((uint32_t)(box->y1 + dst_dy) << 16 | (uint16_t)(box->x1 + dst_dx)) && kgem->batch[kgem->nbatch-4] == ((uint32_t)(box->y2 + dst_dy) << 16 | (uint16_t)(box->x2 + dst_dx))) { DBG(("%s: deleting last fill\n", __FUNCTION__)); kgem->nbatch -= 7; kgem->nreloc--; } } else { if (kgem->nbatch >= 6 && kgem->batch[kgem->nbatch-6] == (XY_COLOR_BLT | (cmd & (BLT_DST_TILED | BLT_WRITE_ALPHA | BLT_WRITE_RGB)) | 4) && kgem->batch[kgem->nbatch-4] == ((uint32_t)(box->y1 + dst_dy) << 16 | (uint16_t)(box->x1 + dst_dx)) && kgem->batch[kgem->nbatch-3] == ((uint32_t)(box->y2 + dst_dy) << 16 | (uint16_t)(box->x2 + dst_dx))) { DBG(("%s: deleting last fill\n", __FUNCTION__)); kgem->nbatch -= 6; kgem->nreloc--; } } } kgem_set_mode(kgem, KGEM_BLT, dst_bo); if (!kgem_check_batch(kgem, 10) || !kgem_check_reloc(kgem, 2) || !kgem_check_many_bo_fenced(kgem, dst_bo, src_bo, NULL)) { kgem_submit(kgem); if (!kgem_check_many_bo_fenced(kgem, dst_bo, src_bo, NULL)) { DBG(("%s: not enough room in aperture, fallback to tiling copy\n", __FUNCTION__)); return sna_tiling_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, bpp, box, nbox); } _kgem_set_mode(kgem, KGEM_BLT); } if ((dst_dx | dst_dy) == 0) { if (kgem->gen >= 0100) { uint64_t hdr = (uint64_t)br13 << 32 | cmd | 8; do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (10*nbox_this_time > rem) nbox_this_time = rem / 10; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc)/2; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; assert(sna->kgem.mode == KGEM_BLT); do { uint32_t *b = kgem->batch + kgem->nbatch; DBG((" %s: box=(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x1 + src_dx >= 0); assert(box->y1 + src_dy >= 0); assert(box->x1 + src_dx <= INT16_MAX); assert(box->y1 + src_dy <= INT16_MAX); assert(box->x1 >= 0); assert(box->y1 >= 0); *(uint64_t *)&b[0] = hdr; *(uint64_t *)&b[2] = *(const uint64_t *)box; *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = add2(b[2], src_dx, src_dy); b[7] = src_pitch; *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 10; assert(kgem->nbatch < kgem->surface); box++; } while (--nbox_this_time); if (!nbox) break; _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } while (1); } else { uint64_t hdr = (uint64_t)br13 << 32 | cmd | 6; do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (8*nbox_this_time > rem) nbox_this_time = rem / 8; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc)/2; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; assert(sna->kgem.mode == KGEM_BLT); do { uint32_t *b = kgem->batch + kgem->nbatch; DBG((" %s: box=(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x1 + src_dx >= 0); assert(box->y1 + src_dy >= 0); assert(box->x1 + src_dx <= INT16_MAX); assert(box->y1 + src_dy <= INT16_MAX); assert(box->x1 >= 0); assert(box->y1 >= 0); *(uint64_t *)&b[0] = hdr; *(uint64_t *)&b[2] = *(const uint64_t *)box; b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = add2(b[2], src_dx, src_dy); b[6] = src_pitch; b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 8; assert(kgem->nbatch < kgem->surface); box++; } while (--nbox_this_time); if (!nbox) break; _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } while (1); } } else { if (kgem->gen >= 0100) { cmd |= 8; do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (10*nbox_this_time > rem) nbox_this_time = rem / 10; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc)/2; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; assert(sna->kgem.mode == KGEM_BLT); do { uint32_t *b = kgem->batch + kgem->nbatch; DBG((" %s: box=(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x1 + src_dx >= 0); assert(box->y1 + src_dy >= 0); assert(box->x1 + dst_dx >= 0); assert(box->y1 + dst_dy >= 0); b[0] = cmd; b[1] = br13; b[2] = ((box->y1 + dst_dy) << 16) | (box->x1 + dst_dx); b[3] = ((box->y2 + dst_dy) << 16) | (box->x2 + dst_dx); *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = ((box->y1 + src_dy) << 16) | (box->x1 + src_dx); b[7] = src_pitch; *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 10; assert(kgem->nbatch < kgem->surface); box++; } while (--nbox_this_time); if (!nbox) break; _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } while (1); } else { cmd |= 6; do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (8*nbox_this_time > rem) nbox_this_time = rem / 8; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc)/2; DBG(("%s: emitting %d boxes out of %d (batch space %d)\n", __FUNCTION__, nbox_this_time, nbox, rem)); assert(nbox_this_time > 0); nbox -= nbox_this_time; assert(sna->kgem.mode == KGEM_BLT); do { uint32_t *b = kgem->batch + kgem->nbatch; DBG((" %s: box=(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x1 + src_dx >= 0); assert(box->y1 + src_dy >= 0); assert(box->x1 + dst_dx >= 0); assert(box->y1 + dst_dy >= 0); b[0] = cmd; b[1] = br13; b[2] = ((box->y1 + dst_dy) << 16) | (box->x1 + dst_dx); b[3] = ((box->y2 + dst_dy) << 16) | (box->x2 + dst_dx); b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = ((box->y1 + src_dy) << 16) | (box->x1 + src_dx); b[6] = src_pitch; b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 8; assert(kgem->nbatch < kgem->surface); box++; } while (--nbox_this_time); if (!nbox) break; _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } while (1); } } if (kgem->nexec > 1 && __kgem_ring_empty(kgem)) { DBG(("%s: flushing BLT operation on empty ring\n", __FUNCTION__)); _kgem_submit(kgem); } else if (kgem->gen >= 060 && src_bo == dst_bo && kgem_check_batch(kgem, 3)) { uint32_t *b = kgem->batch + kgem->nbatch; assert(sna->kgem.mode == KGEM_BLT); b[0] = XY_SETUP_CLIP; b[1] = b[2] = 0; kgem->nbatch += 3; assert(kgem->nbatch < kgem->surface); } sna->blt_state.fill_bo = 0; return true; } bool sna_blt_copy_boxes__with_alpha(struct sna *sna, uint8_t alu, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, int bpp, int alpha_fixup, const BoxRec *box, int nbox) { struct kgem *kgem = &sna->kgem; unsigned src_pitch, br13, cmd; #if DEBUG_NO_BLT || NO_BLT_COPY_BOXES return false; #endif DBG(("%s src=(%d, %d) -> (%d, %d) x %d, tiling=(%d, %d), pitch=(%d, %d)\n", __FUNCTION__, src_dx, src_dy, dst_dx, dst_dy, nbox, src_bo->tiling, dst_bo->tiling, src_bo->pitch, dst_bo->pitch)); if (wedged(sna) || !kgem_bo_can_blt(kgem, src_bo) || !kgem_bo_can_blt(kgem, dst_bo)) { DBG(("%s: cannot blt to src? %d or dst? %d\n", __FUNCTION__, kgem_bo_can_blt(kgem, src_bo), kgem_bo_can_blt(kgem, dst_bo))); return false; } cmd = XY_FULL_MONO_PATTERN_BLT | (kgem->gen >= 0100 ? 12 : 10); src_pitch = src_bo->pitch; if (kgem->gen >= 040 && src_bo->tiling) { cmd |= BLT_SRC_TILED; src_pitch >>= 2; } assert(src_pitch <= MAXSHORT); br13 = dst_bo->pitch; if (kgem->gen >= 040 && dst_bo->tiling) { cmd |= BLT_DST_TILED; br13 >>= 2; } assert(br13 <= MAXSHORT); br13 |= copy_ROP[alu] << 16; switch (bpp) { default: assert(0); case 32: br13 |= 1 << 25; /* RGB8888 */ case 16: br13 |= 1 << 24; /* RGB565 */ case 8: break; } kgem_set_mode(kgem, KGEM_BLT, dst_bo); if (!kgem_check_many_bo_fenced(kgem, dst_bo, src_bo, NULL)) { DBG(("%s: cannot fit src+dst into aperture\n", __FUNCTION__)); return false; } /* Compare first box against a previous fill */ if ((alu == GXcopy || alu == GXclear || alu == GXset) && kgem->reloc[kgem->nreloc-1].target_handle == dst_bo->target_handle) { if (kgem->gen >= 0100) { if (kgem->nbatch >= 7 && kgem->batch[kgem->nbatch-7] == (XY_COLOR_BLT | (cmd & (BLT_WRITE_ALPHA | BLT_WRITE_RGB)) | 5) && kgem->batch[kgem->nbatch-5] == ((uint32_t)(box->y1 + dst_dy) << 16 | (uint16_t)(box->x1 + dst_dx)) && kgem->batch[kgem->nbatch-4] == ((uint32_t)(box->y2 + dst_dy) << 16 | (uint16_t)(box->x2 + dst_dx))) { DBG(("%s: deleting last fill\n", __FUNCTION__)); kgem->nbatch -= 7; kgem->nreloc--; } } else { if (kgem->nbatch >= 6 && kgem->batch[kgem->nbatch-6] == (XY_COLOR_BLT | (cmd & (BLT_WRITE_ALPHA | BLT_WRITE_RGB)) | 4) && kgem->batch[kgem->nbatch-4] == ((uint32_t)(box->y1 + dst_dy) << 16 | (uint16_t)(box->x1 + dst_dx)) && kgem->batch[kgem->nbatch-3] == ((uint32_t)(box->y2 + dst_dy) << 16 | (uint16_t)(box->x2 + dst_dx))) { DBG(("%s: deleting last fill\n", __FUNCTION__)); kgem->nbatch -= 6; kgem->nreloc--; } } } while (nbox--) { uint32_t *b; if (!kgem_check_batch(kgem, 14) || !kgem_check_reloc(kgem, 2)) { _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } assert(sna->kgem.mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; b[0] = cmd; b[1] = br13; b[2] = (box->y1 + dst_dy) << 16 | (box->x1 + dst_dx); b[3] = (box->y2 + dst_dy) << 16 | (box->x2 + dst_dx); if (sna->kgem.gen >= 0100) { *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = src_pitch; b[7] = (box->y1 + src_dy) << 16 | (box->x1 + src_dx); *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[10] = alpha_fixup; b[11] = alpha_fixup; b[12] = 0; b[13] = 0; kgem->nbatch += 14; } else { b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = src_pitch; b[6] = (box->y1 + src_dy) << 16 | (box->x1 + src_dx); b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[8] = alpha_fixup; b[9] = alpha_fixup; b[10] = 0; b[11] = 0; kgem->nbatch += 12; } assert(kgem->nbatch < kgem->surface); box++; } if (kgem->nexec > 1 && __kgem_ring_empty(kgem)) { DBG(("%s: flushing BLT operation on empty ring\n", __FUNCTION__)); _kgem_submit(kgem); } sna->blt_state.fill_bo = 0; return true; } static void box_extents(const BoxRec *box, int n, BoxRec *extents) { *extents = *box; while (--n) { box++; if (box->x1 < extents->x1) extents->x1 = box->x1; if (box->y1 < extents->y1) extents->y1 = box->y1; if (box->x2 > extents->x2) extents->x2 = box->x2; if (box->y2 > extents->y2) extents->y2 = box->y2; } } bool sna_blt_copy_boxes_fallback(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int nbox) { struct kgem_bo *free_bo = NULL; bool ret; DBG(("%s: alu=%d, n=%d\n", __FUNCTION__, alu, nbox)); if (!sna_blt_compare_depth(src, dst)) { DBG(("%s: mismatching depths %d -> %d\n", __FUNCTION__, src->depth, dst->depth)); return false; } if (src_bo == dst_bo) { DBG(("%s: dst == src\n", __FUNCTION__)); if (src_bo->tiling == I915_TILING_Y && kgem_bo_blt_pitch_is_ok(&sna->kgem, src_bo)) { struct kgem_bo *bo; DBG(("%s: src is Y-tiled\n", __FUNCTION__)); if (src->type != DRAWABLE_PIXMAP) return false; assert(sna_pixmap((PixmapPtr)src)->gpu_bo == src_bo); bo = sna_pixmap_change_tiling((PixmapPtr)src, I915_TILING_X); if (bo == NULL) { BoxRec extents; DBG(("%s: y-tiling conversion failed\n", __FUNCTION__)); box_extents(box, nbox, &extents); free_bo = kgem_create_2d(&sna->kgem, extents.x2 - extents.x1, extents.y2 - extents.y1, src->bitsPerPixel, I915_TILING_X, 0); if (free_bo == NULL) { DBG(("%s: fallback -- temp allocation failed\n", __FUNCTION__)); return false; } if (!sna_blt_copy_boxes(sna, GXcopy, src_bo, src_dx, src_dy, free_bo, -extents.x1, -extents.y1, src->bitsPerPixel, box, nbox)) { DBG(("%s: fallback -- temp copy failed\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, free_bo); return false; } src_dx = -extents.x1; src_dy = -extents.y1; src_bo = free_bo; } else dst_bo = src_bo = bo; } } else { if (src_bo->tiling == I915_TILING_Y && kgem_bo_blt_pitch_is_ok(&sna->kgem, src_bo)) { DBG(("%s: src is y-tiled\n", __FUNCTION__)); if (src->type != DRAWABLE_PIXMAP) return false; assert(sna_pixmap((PixmapPtr)src)->gpu_bo == src_bo); src_bo = sna_pixmap_change_tiling((PixmapPtr)src, I915_TILING_X); if (src_bo == NULL) { DBG(("%s: fallback -- src y-tiling conversion failed\n", __FUNCTION__)); return false; } } if (dst_bo->tiling == I915_TILING_Y && kgem_bo_blt_pitch_is_ok(&sna->kgem, dst_bo)) { DBG(("%s: dst is y-tiled\n", __FUNCTION__)); if (dst->type != DRAWABLE_PIXMAP) return false; assert(sna_pixmap((PixmapPtr)dst)->gpu_bo == dst_bo); dst_bo = sna_pixmap_change_tiling((PixmapPtr)dst, I915_TILING_X); if (dst_bo == NULL) { DBG(("%s: fallback -- dst y-tiling conversion failed\n", __FUNCTION__)); return false; } } } ret = sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, nbox); if (free_bo) kgem_bo_destroy(&sna->kgem, free_bo); return ret; } xf86-video-intel-2.99.917/src/sna/kgem_debug.h0000664000175000017500000000203012244635610015537 00000000000000#ifndef KGEM_DEBUG_H #define KGEM_DEBUG_H void kgem_debug_print(const uint32_t *data, uint32_t offset, unsigned int index, const char *fmt, ...); struct drm_i915_gem_relocation_entry * kgem_debug_get_reloc_entry(struct kgem *kgem, uint32_t offset); struct kgem_bo * kgem_debug_get_bo_for_reloc_entry(struct kgem *kgem, struct drm_i915_gem_relocation_entry *reloc); int kgem_gen7_decode_3d(struct kgem *kgem, uint32_t offset); void kgem_gen7_finish_state(struct kgem *kgem); int kgem_gen6_decode_3d(struct kgem *kgem, uint32_t offset); void kgem_gen6_finish_state(struct kgem *kgem); int kgem_gen5_decode_3d(struct kgem *kgem, uint32_t offset); void kgem_gen5_finish_state(struct kgem *kgem); int kgem_gen4_decode_3d(struct kgem *kgem, uint32_t offset); void kgem_gen4_finish_state(struct kgem *kgem); int kgem_gen3_decode_3d(struct kgem *kgem, uint32_t offset); void kgem_gen3_finish_state(struct kgem *kgem); int kgem_gen2_decode_3d(struct kgem *kgem, uint32_t offset); void kgem_gen2_finish_state(struct kgem *kgem); #endif xf86-video-intel-2.99.917/src/sna/sna_render.h0000664000175000017500000005155512432737457015621 00000000000000#ifndef SNA_RENDER_H #define SNA_RENDER_H #include "compiler.h" #include #include #include #include #include "atomic.h" #define GRADIENT_CACHE_SIZE 16 #define GXinvalid 0xff struct sna; struct sna_glyph; struct sna_video; struct sna_video_frame; struct brw_compile; struct sna_composite_rectangles { struct sna_coordinate { int16_t x, y; } src, mask, dst; int16_t width, height; }; struct sna_composite_op { fastcall void (*blt)(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r); fastcall void (*box)(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box); void (*boxes)(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox); void (*thread_boxes)(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox); void (*done)(struct sna *sna, const struct sna_composite_op *op); struct sna_damage **damage; uint32_t op; struct { PixmapPtr pixmap; /* XXX */ CARD32 format; struct kgem_bo *bo; int16_t x, y; uint16_t width, height; } dst; struct sna_composite_channel { struct kgem_bo *bo; PictTransform *transform; uint16_t width; uint16_t height; uint32_t pict_format; uint32_t card_format; uint32_t filter; uint32_t repeat; uint32_t is_affine : 1; uint32_t is_solid : 1; uint32_t is_linear : 1; uint32_t is_opaque : 1; uint32_t alpha_fixup : 1; uint32_t rb_reversed : 1; int16_t offset[2]; float scale[2]; pixman_transform_t embedded_transform; union { struct { float dx, dy, offset; } linear; struct { uint32_t pixel; } gen2; struct gen3_shader_channel { int type; uint32_t mode; uint32_t constants; } gen3; } u; } src, mask; uint32_t is_affine : 1; uint32_t has_component_alpha : 1; uint32_t need_magic_ca_pass : 1; uint32_t rb_reversed : 1; int16_t floats_per_vertex; int16_t floats_per_rect; fastcall void (*prim_emit)(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r); fastcall void (*emit_boxes)(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v); struct sna_composite_redirect { struct kgem_bo *real_bo; struct sna_damage **real_damage, *damage; BoxRec box; } redirect; union { struct sna_blt_state { PixmapPtr src_pixmap; int16_t sx, sy; uint32_t inplace :1; uint32_t overwrites:1; uint32_t bpp : 6; uint32_t alu : 4; uint32_t cmd; uint32_t br13; uint32_t pitch[2]; uint32_t pixel; struct kgem_bo *bo[2]; } blt; struct { float constants[8]; uint32_t num_constants; } gen3; struct { int wm_kernel; int ve_id; } gen4; struct { int16_t wm_kernel; int16_t ve_id; } gen5; struct { uint32_t flags; } gen6; struct { uint32_t flags; } gen7; struct { uint32_t flags; } gen8; } u; void *priv; }; struct sna_opacity_box { BoxRec box; float alpha; } tightly_packed; struct sna_composite_spans_op { struct sna_composite_op base; fastcall void (*box)(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity); void (*boxes)(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, int nbox, float opacity); fastcall void (*thread_boxes)(struct sna *sna, const struct sna_composite_spans_op *op, const struct sna_opacity_box *box, int nbox); fastcall void (*done)(struct sna *sna, const struct sna_composite_spans_op *op); fastcall void (*prim_emit)(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity); fastcall void (*emit_boxes)(const struct sna_composite_spans_op *op, const struct sna_opacity_box *box, int nbox, float *v); }; struct sna_fill_op { struct sna_composite_op base; void (*blt)(struct sna *sna, const struct sna_fill_op *op, int16_t x, int16_t y, int16_t w, int16_t h); fastcall void (*box)(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box); fastcall void (*boxes)(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box, int count); fastcall void (*points)(struct sna *sna, const struct sna_fill_op *op, int16_t dx, int16_t dy, const DDXPointRec *points, int count); void (*done)(struct sna *sna, const struct sna_fill_op *op); }; struct sna_copy_op { struct sna_composite_op base; void (*blt)(struct sna *sna, const struct sna_copy_op *op, int16_t sx, int16_t sy, int16_t w, int16_t h, int16_t dx, int16_t dy); void (*done)(struct sna *sna, const struct sna_copy_op *op); }; struct sna_render { pthread_mutex_t lock; pthread_cond_t wait; int active; int max_3d_size; int max_3d_pitch; unsigned prefer_gpu; #define PREFER_GPU_BLT 0x1 #define PREFER_GPU_RENDER 0x2 #define PREFER_GPU_SPANS 0x4 bool (*composite)(struct sna *sna, uint8_t op, PicturePtr dst, PicturePtr src, PicturePtr mask, int16_t src_x, int16_t src_y, int16_t msk_x, int16_t msk_y, int16_t dst_x, int16_t dst_y, int16_t w, int16_t h, unsigned flags, struct sna_composite_op *tmp); #define COMPOSITE_PARTIAL 0x1 #define COMPOSITE_FALLBACK 0x80000000 bool (*check_composite_spans)(struct sna *sna, uint8_t op, PicturePtr dst, PicturePtr src, int16_t w, int16_t h, unsigned flags); bool (*composite_spans)(struct sna *sna, uint8_t op, PicturePtr dst, PicturePtr src, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, int16_t w, int16_t h, unsigned flags, struct sna_composite_spans_op *tmp); #define COMPOSITE_SPANS_RECTILINEAR 0x1 #define COMPOSITE_SPANS_INPLACE_HINT 0x2 bool (*video)(struct sna *sna, struct sna_video *video, struct sna_video_frame *frame, RegionPtr dstRegion, PixmapPtr pixmap); bool (*fill_boxes)(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n); bool (*fill)(struct sna *sna, uint8_t alu, PixmapPtr dst, struct kgem_bo *dst_bo, uint32_t color, unsigned flags, struct sna_fill_op *tmp); #define FILL_BOXES 0x1 #define FILL_POINTS 0x2 #define FILL_SPANS 0x4 bool (*fill_one)(struct sna *sna, PixmapPtr dst, struct kgem_bo *dst_bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu); bool (*clear)(struct sna *sna, PixmapPtr dst, struct kgem_bo *dst_bo); bool (*copy_boxes)(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, unsigned flags); #define COPY_LAST 0x1 #define COPY_SYNC 0x2 #define COPY_NO_OVERLAP 0x4 bool (*copy)(struct sna *sna, uint8_t alu, PixmapPtr src, struct kgem_bo *src_bo, PixmapPtr dst, struct kgem_bo *dst_bo, struct sna_copy_op *op); void (*flush)(struct sna *sna); void (*reset)(struct sna *sna); void (*fini)(struct sna *sna); struct sna_alpha_cache { struct kgem_bo *cache_bo; struct kgem_bo *bo[256+7]; } alpha_cache; struct sna_solid_cache { struct kgem_bo *cache_bo; struct kgem_bo *bo[1024]; uint32_t color[1024]; int last; int size; int dirty; } solid_cache; struct { struct sna_gradient_cache { struct kgem_bo *bo; int nstops; PictGradientStop *stops; } cache[GRADIENT_CACHE_SIZE]; int size; } gradient_cache; struct sna_glyph_cache{ PicturePtr picture; struct sna_glyph **glyphs; uint16_t count; uint16_t evict; } glyph[2]; pixman_image_t *white_image; PicturePtr white_picture; uint16_t vb_id; uint16_t vertex_offset; uint16_t vertex_start; uint16_t vertex_index; uint16_t vertex_used; uint16_t vertex_size; uint16_t vertex_reloc[16]; int nvertex_reloc; struct kgem_bo *vbo; float *vertices; float vertex_data[1024]; }; struct gen2_render_state { uint32_t target; bool need_invariant; uint32_t logic_op_enabled; uint32_t ls1, ls2, vft; uint32_t diffuse; uint32_t specular; }; struct gen3_render_state { uint32_t current_dst; bool need_invariant; uint32_t tex_count; uint32_t last_drawrect_limit; uint32_t last_target; uint32_t last_blend; uint32_t last_constants; uint32_t last_sampler; uint32_t last_shader; uint32_t last_diffuse; uint32_t last_specular; uint16_t last_vertex_offset; uint16_t floats_per_vertex; uint16_t last_floats_per_vertex; uint32_t tex_map[4]; uint32_t tex_handle[2]; uint32_t tex_delta[2]; }; struct gen4_render_state { struct kgem_bo *general_bo; uint32_t vs; uint32_t sf; uint32_t wm; uint32_t cc; int ve_id; uint32_t drawrect_offset; uint32_t drawrect_limit; uint32_t last_pipelined_pointers; uint16_t last_primitive; int16_t floats_per_vertex; uint16_t surface_table; bool needs_invariant; bool needs_urb; }; struct gen5_render_state { struct kgem_bo *general_bo; uint32_t vs; uint32_t sf[2]; uint32_t wm; uint32_t cc; int ve_id; uint32_t drawrect_offset; uint32_t drawrect_limit; uint32_t last_pipelined_pointers; uint16_t last_primitive; int16_t floats_per_vertex; uint16_t surface_table; bool needs_invariant; }; enum { GEN6_WM_KERNEL_NOMASK = 0, GEN6_WM_KERNEL_NOMASK_P, GEN6_WM_KERNEL_MASK, GEN6_WM_KERNEL_MASK_P, GEN6_WM_KERNEL_MASKCA, GEN6_WM_KERNEL_MASKCA_P, GEN6_WM_KERNEL_MASKSA, GEN6_WM_KERNEL_MASKSA_P, GEN6_WM_KERNEL_OPACITY, GEN6_WM_KERNEL_OPACITY_P, GEN6_WM_KERNEL_VIDEO_PLANAR, GEN6_WM_KERNEL_VIDEO_PACKED, GEN6_KERNEL_COUNT }; struct gen6_render_state { unsigned gt; const struct gt_info *info; struct kgem_bo *general_bo; uint32_t vs_state; uint32_t sf_state; uint32_t sf_mask_state; uint32_t wm_state; uint32_t wm_kernel[GEN6_KERNEL_COUNT][3]; uint32_t cc_blend; uint32_t drawrect_offset; uint32_t drawrect_limit; uint32_t blend; uint32_t samplers; uint32_t kernel; uint16_t num_sf_outputs; uint16_t ve_id; uint16_t last_primitive; int16_t floats_per_vertex; uint16_t surface_table; bool needs_invariant; bool first_state_packet; }; enum { GEN7_WM_KERNEL_NOMASK = 0, GEN7_WM_KERNEL_NOMASK_P, GEN7_WM_KERNEL_MASK, GEN7_WM_KERNEL_MASK_P, GEN7_WM_KERNEL_MASKCA, GEN7_WM_KERNEL_MASKCA_P, GEN7_WM_KERNEL_MASKSA, GEN7_WM_KERNEL_MASKSA_P, GEN7_WM_KERNEL_OPACITY, GEN7_WM_KERNEL_OPACITY_P, GEN7_WM_KERNEL_VIDEO_PLANAR, GEN7_WM_KERNEL_VIDEO_PACKED, GEN7_WM_KERNEL_COUNT }; struct gen7_render_state { unsigned gt; const struct gt_info *info; struct kgem_bo *general_bo; uint32_t vs_state; uint32_t sf_state; uint32_t sf_mask_state; uint32_t wm_state; uint32_t wm_kernel[GEN7_WM_KERNEL_COUNT][3]; uint32_t cc_blend; uint32_t drawrect_offset; uint32_t drawrect_limit; uint32_t blend; uint32_t samplers; uint32_t kernel; uint16_t num_sf_outputs; uint16_t ve_id; uint16_t last_primitive; int16_t floats_per_vertex; uint16_t surface_table; uint16_t pipe_controls_since_stall; bool needs_invariant; bool emit_flush; }; enum { GEN8_WM_KERNEL_NOMASK = 0, GEN8_WM_KERNEL_NOMASK_P, GEN8_WM_KERNEL_MASK, GEN8_WM_KERNEL_MASK_P, GEN8_WM_KERNEL_MASKCA, GEN8_WM_KERNEL_MASKCA_P, GEN8_WM_KERNEL_MASKSA, GEN8_WM_KERNEL_MASKSA_P, GEN8_WM_KERNEL_OPACITY, GEN8_WM_KERNEL_OPACITY_P, GEN8_WM_KERNEL_VIDEO_PLANAR, GEN8_WM_KERNEL_VIDEO_PACKED, GEN8_WM_KERNEL_COUNT }; struct gen8_render_state { unsigned gt; struct kgem_bo *general_bo; uint32_t vs_state; uint32_t sf_state; uint32_t sf_mask_state; uint32_t wm_state; uint32_t wm_kernel[GEN8_WM_KERNEL_COUNT][3]; uint32_t cc_blend; uint32_t drawrect_offset; uint32_t drawrect_limit; uint32_t blend; uint32_t samplers; uint32_t kernel; uint16_t num_sf_outputs; uint16_t ve_id; uint16_t last_primitive; int16_t floats_per_vertex; uint16_t surface_table; bool needs_invariant; bool emit_flush; }; struct sna_static_stream { uint32_t size, used; uint8_t *data; }; int sna_static_stream_init(struct sna_static_stream *stream); uint32_t sna_static_stream_add(struct sna_static_stream *stream, const void *data, uint32_t len, uint32_t align); void *sna_static_stream_map(struct sna_static_stream *stream, uint32_t len, uint32_t align); uint32_t sna_static_stream_offsetof(struct sna_static_stream *stream, void *ptr); unsigned sna_static_stream_compile_sf(struct sna *sna, struct sna_static_stream *stream, bool (*compile)(struct brw_compile *)); unsigned sna_static_stream_compile_wm(struct sna *sna, struct sna_static_stream *stream, bool (*compile)(struct brw_compile *, int), int width); struct kgem_bo *sna_static_stream_fini(struct sna *sna, struct sna_static_stream *stream); struct kgem_bo * sna_render_get_solid(struct sna *sna, uint32_t color); void sna_render_flush_solid(struct sna *sna); struct kgem_bo * sna_render_get_gradient(struct sna *sna, PictGradient *pattern); bool sna_gradient_is_opaque(const PictGradient *gradient); uint32_t sna_rgba_for_color(uint32_t color, int depth); uint32_t sna_rgba_to_color(uint32_t rgba, uint32_t format); bool sna_get_rgba_from_pixel(uint32_t pixel, uint16_t *red, uint16_t *green, uint16_t *blue, uint16_t *alpha, uint32_t format); bool sna_picture_is_solid(PicturePtr picture, uint32_t *color); const char *no_render_init(struct sna *sna); const char *gen2_render_init(struct sna *sna, const char *backend); const char *gen3_render_init(struct sna *sna, const char *backend); const char *gen4_render_init(struct sna *sna, const char *backend); const char *gen5_render_init(struct sna *sna, const char *backend); const char *gen6_render_init(struct sna *sna, const char *backend); const char *gen7_render_init(struct sna *sna, const char *backend); const char *gen8_render_init(struct sna *sna, const char *backend); void sna_render_mark_wedged(struct sna *sna); bool sna_tiling_composite(uint32_t op, PicturePtr src, PicturePtr mask, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t mask_x, int16_t mask_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, struct sna_composite_op *tmp); bool sna_tiling_composite_spans(uint32_t op, PicturePtr src, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_spans_op *tmp); bool sna_tiling_fill_boxes(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n); bool sna_tiling_copy_boxes(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n); bool sna_tiling_blt_copy_boxes(struct sna *sna, uint8_t alu, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, int bpp, const BoxRec *box, int nbox); bool sna_tiling_blt_composite(struct sna *sna, struct sna_composite_op *op, struct kgem_bo *bo, int bpp, uint32_t alpha_fixup); bool sna_blt_composite(struct sna *sna, uint32_t op, PicturePtr src, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_op *tmp); bool sna_blt_composite__convert(struct sna *sna, int x, int y, int width, int height, struct sna_composite_op *tmp); bool sna_blt_fill(struct sna *sna, uint8_t alu, struct kgem_bo *bo, int bpp, uint32_t pixel, struct sna_fill_op *fill); bool sna_blt_copy(struct sna *sna, uint8_t alu, struct kgem_bo *src, struct kgem_bo *dst, int bpp, struct sna_copy_op *copy); bool sna_blt_fill_boxes(struct sna *sna, uint8_t alu, struct kgem_bo *bo, int bpp, uint32_t pixel, const BoxRec *box, int n); bool sna_blt_copy_boxes(struct sna *sna, uint8_t alu, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, int bpp, const BoxRec *box, int n); bool sna_blt_copy_boxes__with_alpha(struct sna *sna, uint8_t alu, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, int bpp, int alpha_fixup, const BoxRec *box, int nbox); bool sna_blt_copy_boxes_fallback(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int nbox); bool memcpy_copy_boxes(struct sna *sna, uint8_t op, const DrawableRec *src_draw, struct kgem_bo *src_bo, int16_t sx, int16_t sy, const DrawableRec *dst_draw, struct kgem_bo *dst_bo, int16_t dx, int16_t dy, const BoxRec *box, int n, unsigned flags); bool _sna_get_pixel_from_rgba(uint32_t *pixel, uint16_t red, uint16_t green, uint16_t blue, uint16_t alpha, uint32_t format); static inline bool sna_get_pixel_from_rgba(uint32_t * pixel, uint16_t red, uint16_t green, uint16_t blue, uint16_t alpha, uint32_t format) { switch (format) { case PICT_x8r8g8b8: alpha = 0xffff; /* fall through to re-use a8r8g8b8 expansion */ case PICT_a8r8g8b8: *pixel = ((alpha >> 8 << 24) | (red >> 8 << 16) | (green & 0xff00) | (blue >> 8)); return TRUE; case PICT_a8: *pixel = alpha >> 8; return TRUE; } return _sna_get_pixel_from_rgba(pixel, red, green, blue, alpha, format); } struct kgem_bo * __sna_render_pixmap_bo(struct sna *sna, PixmapPtr pixmap, const BoxRec *box, bool blt); int sna_render_pixmap_bo(struct sna *sna, struct sna_composite_channel *channel, PixmapPtr pixmap, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y); bool sna_render_pixmap_partial(struct sna *sna, const DrawableRec *draw, struct kgem_bo *bo, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h); int sna_render_picture_extract(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y); int sna_render_picture_approximate_gradient(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y); int sna_render_picture_fixup(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y); int sna_render_picture_convert(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, PixmapPtr pixmap, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y, bool fixup_alpha); inline static void sna_render_composite_redirect_init(struct sna_composite_op *op) { struct sna_composite_redirect *t = &op->redirect; t->real_bo = NULL; t->damage = NULL; } bool sna_render_composite_redirect(struct sna *sna, struct sna_composite_op *op, int x, int y, int width, int height, bool partial); void sna_render_composite_redirect_done(struct sna *sna, const struct sna_composite_op *op); bool sna_render_copy_boxes__overlap(struct sna *sna, uint8_t alu, const DrawableRec *draw, struct kgem_bo *bo, int16_t src_dx, int16_t src_dy, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, const BoxRec *extents); bool sna_composite_mask_is_opaque(PicturePtr mask); void sna_vertex_init(struct sna *sna); static inline void sna_vertex_lock(struct sna_render *r) { pthread_mutex_lock(&r->lock); } static inline void sna_vertex_acquire__locked(struct sna_render *r) { r->active++; } static inline void sna_vertex_unlock(struct sna_render *r) { pthread_mutex_unlock(&r->lock); } static inline void sna_vertex_release__locked(struct sna_render *r) { assert(r->active > 0); if (--r->active == 0) pthread_cond_signal(&r->wait); } static inline bool sna_vertex_wait__locked(struct sna_render *r) { bool was_active = r->active; while (r->active) pthread_cond_wait(&r->wait, &r->lock); return was_active; } #define alphaless(format) PICT_FORMAT(PICT_FORMAT_BPP(format), \ PICT_FORMAT_TYPE(format), \ 0, \ PICT_FORMAT_R(format), \ PICT_FORMAT_G(format), \ PICT_FORMAT_B(format)) #endif /* SNA_RENDER_H */ xf86-video-intel-2.99.917/src/sna/kgem_debug_gen4.c0000664000175000017500000004440412244635610016462 00000000000000/* * Copyright © 2007-2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include "sna.h" #include "sna_reg.h" #include "gen4_render.h" #include "kgem_debug.h" static struct state { struct vertex_buffer { int handle; void *base; const char *ptr; int pitch; struct kgem_bo *current; } vb[33]; struct vertex_elements { int buffer; int offset; bool valid; uint32_t type; uint8_t swizzle[4]; } ve[33]; int num_ve; struct dynamic_state { struct kgem_bo *current; void *base, *ptr; } dynamic_state; } state; static void gen4_update_vertex_buffer(struct kgem *kgem, const uint32_t *data) { uint32_t reloc = sizeof(uint32_t) * (&data[1] - kgem->batch); struct kgem_bo *bo = NULL; void *base, *ptr; int i; for (i = 0; i < kgem->nreloc; i++) if (kgem->reloc[i].offset == reloc) break; assert(i < kgem->nreloc); reloc = kgem->reloc[i].target_handle; if (reloc == 0) { base = kgem->batch; } else { list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->handle == reloc) break; assert(&bo->request != &kgem->next_request->buffers); base = kgem_bo_map__debug(kgem, bo); } ptr = (char *)base + kgem->reloc[i].delta; i = data[0] >> 27; state.vb[i].current = bo; state.vb[i].base = base; state.vb[i].ptr = ptr; state.vb[i].pitch = data[0] & 0x7ff; } static uint32_t get_ve_component(uint32_t data, int component) { return (data >> (16 + (3 - component) * 4)) & 0x7; } static void gen4_update_vertex_elements(struct kgem *kgem, int id, const uint32_t *data) { state.ve[id].buffer = data[0] >> 27; state.ve[id].valid = !!(data[0] & (1 << 26)); state.ve[id].type = (data[0] >> 16) & 0x1ff; state.ve[id].offset = data[0] & 0x7ff; state.ve[id].swizzle[0] = get_ve_component(data[1], 0); state.ve[id].swizzle[1] = get_ve_component(data[1], 1); state.ve[id].swizzle[2] = get_ve_component(data[1], 2); state.ve[id].swizzle[3] = get_ve_component(data[1], 3); } static void vertices_sint16_out(const struct vertex_elements *ve, const int16_t *v, int max) { int c; ErrorF("("); for (c = 0; c < max; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("%d", v[c]); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } for (; c < 4; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("1.0"); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } ErrorF(")"); } static void vertices_float_out(const struct vertex_elements *ve, const float *f, int max) { int c, o; ErrorF("("); for (c = o = 0; c < 4 && o < max; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("%f", f[o++]); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } for (; c < 4; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("1.0"); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } ErrorF(")"); } static void ve_out(const struct vertex_elements *ve, const void *ptr) { switch (ve->type) { case GEN4_SURFACEFORMAT_R32_FLOAT: vertices_float_out(ve, ptr, 1); break; case GEN4_SURFACEFORMAT_R32G32_FLOAT: vertices_float_out(ve, ptr, 2); break; case GEN4_SURFACEFORMAT_R32G32B32_FLOAT: vertices_float_out(ve, ptr, 3); break; case GEN4_SURFACEFORMAT_R32G32B32A32_FLOAT: vertices_float_out(ve, ptr, 4); break; case GEN4_SURFACEFORMAT_R16_SINT: vertices_sint16_out(ve, ptr, 1); break; case GEN4_SURFACEFORMAT_R16G16_SINT: vertices_sint16_out(ve, ptr, 2); break; case GEN4_SURFACEFORMAT_R16G16B16A16_SINT: vertices_sint16_out(ve, ptr, 4); break; case GEN4_SURFACEFORMAT_R16_SSCALED: vertices_sint16_out(ve, ptr, 1); break; case GEN4_SURFACEFORMAT_R16G16_SSCALED: vertices_sint16_out(ve, ptr, 2); break; case GEN4_SURFACEFORMAT_R16G16B16A16_SSCALED: vertices_sint16_out(ve, ptr, 4); break; } } static void indirect_vertex_out(struct kgem *kgem, uint32_t v) { int i = 0; do { const struct vertex_elements *ve = &state.ve[i]; const struct vertex_buffer *vb = &state.vb[ve->buffer]; const void *ptr = vb->ptr + v * vb->pitch + ve->offset; if (!ve->valid) continue; ve_out(ve, ptr); while (++i <= state.num_ve && !state.ve[i].valid) ; if (i <= state.num_ve) ErrorF(", "); } while (i <= state.num_ve); } static void primitive_out(struct kgem *kgem, uint32_t *data) { int n; assert((data[0] & (1<<15)) == 0); /* XXX index buffers */ for (n = 0; n < data[1]; n++) { int v = data[2] + n; ErrorF(" [%d:%d] = ", n, v); indirect_vertex_out(kgem, v); ErrorF("\n"); } } static void state_base_out(uint32_t *data, uint32_t offset, unsigned int index, const char *name) { if (data[index] & 1) kgem_debug_print(data, offset, index, "%s state base address 0x%08x\n", name, data[index] & ~1); else kgem_debug_print(data, offset, index, "%s state base not updated\n", name); } static void state_max_out(uint32_t *data, uint32_t offset, unsigned int index, const char *name) { if (data[index] == 1) kgem_debug_print(data, offset, index, "%s state upper bound disabled\n", name); else if (data[index] & 1) kgem_debug_print(data, offset, index, "%s state upper bound 0x%08x\n", name, data[index] & ~1); else kgem_debug_print(data, offset, index, "%s state upper bound not updated\n", name); } static const char * get_965_surfacetype(unsigned int surfacetype) { switch (surfacetype) { case 0: return "1D"; case 1: return "2D"; case 2: return "3D"; case 3: return "CUBE"; case 4: return "BUFFER"; case 7: return "NULL"; default: return "unknown"; } } static const char * get_965_depthformat(unsigned int depthformat) { switch (depthformat) { case 0: return "s8_z24float"; case 1: return "z32float"; case 2: return "z24s8"; case 5: return "z16"; default: return "unknown"; } } static const char * get_965_element_component(uint32_t data, int component) { uint32_t component_control = (data >> (16 + (3 - component) * 4)) & 0x7; switch (component_control) { case 0: return "nostore"; case 1: switch (component) { case 0: return "X"; case 1: return "Y"; case 2: return "Z"; case 3: return "W"; default: return "fail"; } case 2: return "0.0"; case 3: return "1.0"; case 4: return "0x1"; case 5: return "VID"; default: return "fail"; } } static const char * get_965_prim_type(uint32_t data) { uint32_t primtype = (data >> 10) & 0x1f; switch (primtype) { case 0x01: return "point list"; case 0x02: return "line list"; case 0x03: return "line strip"; case 0x04: return "tri list"; case 0x05: return "tri strip"; case 0x06: return "tri fan"; case 0x07: return "quad list"; case 0x08: return "quad strip"; case 0x09: return "line list adj"; case 0x0a: return "line strip adj"; case 0x0b: return "tri list adj"; case 0x0c: return "tri strip adj"; case 0x0d: return "tri strip reverse"; case 0x0e: return "polygon"; case 0x0f: return "rect list"; case 0x10: return "line loop"; case 0x11: return "point list bf"; case 0x12: return "line strip cont"; case 0x13: return "line strip bf"; case 0x14: return "line strip cont bf"; case 0x15: return "tri fan no stipple"; default: return "fail"; } } #if 0 struct reloc { struct kgem_bo *bo; void *base; }; static void * get_reloc(struct kgem *kgem, void *base, const uint32_t *reloc, struct reloc *r) { uint32_t delta = *reloc; memset(r, 0, sizeof(*r)); if (base == 0) { uint32_t handle = sizeof(uint32_t) * (reloc - kgem->batch); struct kgem_bo *bo = NULL; int i; for (i = 0; i < kgem->nreloc; i++) if (kgem->reloc[i].offset == handle) break; assert(i < kgem->nreloc); handle = kgem->reloc[i].target_handle; delta = kgem->reloc[i].delta; if (handle == 0) { base = kgem->batch; } else { list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->handle == handle) break; assert(&bo->request != &kgem->next_request->buffers); base = kgem_bo_map__debug(kgem, bo); r->bo = bo; r->base = base; } } return (char *)base + delta; } #endif int kgem_gen4_decode_3d(struct kgem *kgem, uint32_t offset) { static const struct { uint32_t opcode; int min_len; int max_len; const char *name; } opcodes[] = { { 0x6000, 3, 3, "URB_FENCE" }, { 0x6001, 2, 2, "CS_URB_FENCE" }, { 0x6002, 2, 2, "CONSTANT_BUFFER" }, { 0x6101, 6, 6, "STATE_BASE_ADDRESS" }, { 0x6102, 2, 2 , "STATE_SIP" }, { 0x6104, 1, 1, "3DSTATE_PIPELINE_SELECT" }, { 0x680b, 1, 1, "3DSTATE_VF_STATISTICS" }, { 0x6904, 1, 1, "3DSTATE_PIPELINE_SELECT" }, { 0x7800, 7, 7, "3DSTATE_PIPELINED_POINTERS" }, { 0x7801, 6, 6, "3DSTATE_BINDING_TABLE_POINTERS" }, { 0x7808, 5, 257, "3DSTATE_VERTEX_BUFFERS" }, { 0x7809, 3, 256, "3DSTATE_VERTEX_ELEMENTS" }, { 0x780a, 3, 3, "3DSTATE_INDEX_BUFFER" }, { 0x780b, 1, 1, "3DSTATE_VF_STATISTICS" }, { 0x7900, 4, 4, "3DSTATE_DRAWING_RECTANGLE" }, { 0x7901, 5, 5, "3DSTATE_CONSTANT_COLOR" }, { 0x7905, 5, 7, "3DSTATE_DEPTH_BUFFER" }, { 0x7906, 2, 2, "3DSTATE_POLY_STIPPLE_OFFSET" }, { 0x7907, 33, 33, "3DSTATE_POLY_STIPPLE_PATTERN" }, { 0x7908, 3, 3, "3DSTATE_LINE_STIPPLE" }, { 0x7909, 2, 2, "3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP" }, { 0x7909, 2, 2, "3DSTATE_CLEAR_PARAMS" }, { 0x790a, 3, 3, "3DSTATE_AA_LINE_PARAMETERS" }, { 0x790b, 4, 4, "3DSTATE_GS_SVB_INDEX" }, { 0x790d, 3, 3, "3DSTATE_MULTISAMPLE" }, { 0x7910, 2, 2, "3DSTATE_CLEAR_PARAMS" }, { 0x7b00, 6, 6, "3DPRIMITIVE" }, { 0x7805, 3, 3, "3DSTATE_URB" }, { 0x7815, 5, 5, "3DSTATE_CONSTANT_VS_STATE" }, { 0x7816, 5, 5, "3DSTATE_CONSTANT_GS_STATE" }, { 0x7817, 5, 5, "3DSTATE_CONSTANT_PS_STATE" }, { 0x7818, 2, 2, "3DSTATE_SAMPLE_MASK" }, }; uint32_t *data = kgem->batch + offset; uint32_t op; unsigned int len; int i; const char *desc1 = NULL; len = (data[0] & 0xff) + 2; op = (data[0] & 0xffff0000) >> 16; switch (op) { case 0x6000: assert(len == 3); kgem_debug_print(data, offset, 0, "URB_FENCE: %s%s%s%s%s%s\n", (data[0] >> 13) & 1 ? "cs " : "", (data[0] >> 12) & 1 ? "vfe " : "", (data[0] >> 11) & 1 ? "sf " : "", (data[0] >> 10) & 1 ? "clip " : "", (data[0] >> 9) & 1 ? "gs " : "", (data[0] >> 8) & 1 ? "vs " : ""); kgem_debug_print(data, offset, 1, "vs fence: %d, gs_fence: %d, clip_fence: %d\n", data[1] & 0x3ff, (data[1] >> 10) & 0x3ff, (data[1] >> 20) & 0x3ff); kgem_debug_print(data, offset, 2, "sf fence: %d, vfe_fence: %d, cs_fence: %d\n", data[2] & 0x3ff, (data[2] >> 10) & 0x3ff, (data[2] >> 20) & 0x7ff); return len; case 0x6001: kgem_debug_print(data, offset, 0, "CS_URB_STATE\n"); kgem_debug_print(data, offset, 1, "entry_size: %d [%d bytes], n_entries: %d\n", (data[1] >> 4) & 0x1f, (((data[1] >> 4) & 0x1f) + 1) * 64, data[1] & 0x7); return len; case 0x6002: kgem_debug_print(data, offset, 0, "CONSTANT_BUFFER: %s\n", (data[0] >> 8) & 1 ? "valid" : "invalid"); kgem_debug_print(data, offset, 1, "offset: 0x%08x, length: %d bytes\n", data[1] & ~0x3f, ((data[1] & 0x3f) + 1) * 64); return len; case 0x6101: i = 0; kgem_debug_print(data, offset, i++, "STATE_BASE_ADDRESS\n"); assert(len == 6); state_base_out(data, offset, i++, "general"); state_base_out(data, offset, i++, "surface"); state_base_out(data, offset, i++, "media"); state_max_out(data, offset, i++, "general"); state_max_out(data, offset, i++, "media"); return len; case 0x7801: assert(len == 6); kgem_debug_print(data, offset, 0, "3DSTATE_BINDING_TABLE_POINTERS\n"); kgem_debug_print(data, offset, 1, "VS binding table\n"); kgem_debug_print(data, offset, 2, "GS binding table\n"); kgem_debug_print(data, offset, 3, "CLIP binding table\n"); kgem_debug_print(data, offset, 4, "SF binding table\n"); kgem_debug_print(data, offset, 5, "WM binding table\n"); return len; case 0x7808: assert((len - 1) % 4 == 0); kgem_debug_print(data, offset, 0, "3DSTATE_VERTEX_BUFFERS\n"); for (i = 1; i < len;) { gen4_update_vertex_buffer(kgem, data + i); kgem_debug_print(data, offset, i, "buffer %d: %s, pitch %db\n", data[i] >> 27, data[i] & (1 << 20) ? "random" : "sequential", data[i] & 0x07ff); i++; kgem_debug_print(data, offset, i++, "buffer address\n"); kgem_debug_print(data, offset, i++, "max index\n"); kgem_debug_print(data, offset, i++, "mbz\n"); } return len; case 0x7809: assert((len + 1) % 2 == 0); kgem_debug_print(data, offset, 0, "3DSTATE_VERTEX_ELEMENTS\n"); memset(state.ve, 0, sizeof(state.ve)); /* XXX? */ for (i = 1; i < len;) { gen4_update_vertex_elements(kgem, (i - 1)/2, data + i); kgem_debug_print(data, offset, i, "buffer %d: %svalid, type 0x%04x, " "src offset 0x%04x bytes\n", data[i] >> 27, data[i] & (1 << 26) ? "" : "in", (data[i] >> 16) & 0x1ff, data[i] & 0x07ff); i++; kgem_debug_print(data, offset, i, "(%s, %s, %s, %s), " "dst offset 0x%02x bytes\n", get_965_element_component(data[i], 0), get_965_element_component(data[i], 1), get_965_element_component(data[i], 2), get_965_element_component(data[i], 3), (data[i] & 0xff) * 4); i++; } state.num_ve = (len - 1) / 2; /* XXX? */ return len; case 0x780a: assert(len == 3); kgem_debug_print(data, offset, 0, "3DSTATE_INDEX_BUFFER\n"); kgem_debug_print(data, offset, 1, "beginning buffer address\n"); kgem_debug_print(data, offset, 2, "ending buffer address\n"); return len; case 0x7900: assert(len == 4); kgem_debug_print(data, offset, 0, "3DSTATE_DRAWING_RECTANGLE\n"); kgem_debug_print(data, offset, 1, "top left: %d,%d\n", data[1] & 0xffff, (data[1] >> 16) & 0xffff); kgem_debug_print(data, offset, 2, "bottom right: %d,%d\n", data[2] & 0xffff, (data[2] >> 16) & 0xffff); kgem_debug_print(data, offset, 3, "origin: %d,%d\n", (int)data[3] & 0xffff, ((int)data[3] >> 16) & 0xffff); return len; case 0x7905: assert(len == 7); kgem_debug_print(data, offset, 0, "3DSTATE_DEPTH_BUFFER\n"); kgem_debug_print(data, offset, 1, "%s, %s, pitch = %d bytes, %stiled, HiZ %d, Seperate Stencil %d\n", get_965_surfacetype(data[1] >> 29), get_965_depthformat((data[1] >> 18) & 0x7), (data[1] & 0x0001ffff) + 1, data[1] & (1 << 27) ? "" : "not ", (data[1] & (1 << 22)) != 0, (data[1] & (1 << 21)) != 0); kgem_debug_print(data, offset, 2, "depth offset\n"); kgem_debug_print(data, offset, 3, "%dx%d\n", ((data[3] & 0x0007ffc0) >> 6) + 1, ((data[3] & 0xfff80000) >> 19) + 1); kgem_debug_print(data, offset, 4, "volume depth\n"); kgem_debug_print(data, offset, 5, "\n"); kgem_debug_print(data, offset, 6, "\n"); return len; case 0x7a00: assert(len == 4 || len == 5); switch ((data[1] >> 14) & 0x3) { case 0: desc1 = "no write"; break; case 1: desc1 = "qword write"; break; case 2: desc1 = "PS_DEPTH_COUNT write"; break; case 3: desc1 = "TIMESTAMP write"; break; } kgem_debug_print(data, offset, 0, "PIPE_CONTROL\n"); kgem_debug_print(data, offset, 1, "%s, %scs stall, %stlb invalidate, " "%ssync gfdt, %sdepth stall, %sRC write flush, " "%sinst flush, %sTC flush\n", desc1, data[1] & (1 << 20) ? "" : "no ", data[1] & (1 << 18) ? "" : "no ", data[1] & (1 << 17) ? "" : "no ", data[1] & (1 << 13) ? "" : "no ", data[1] & (1 << 12) ? "" : "no ", data[1] & (1 << 11) ? "" : "no ", data[1] & (1 << 10) ? "" : "no "); if (len == 5) { kgem_debug_print(data, offset, 2, "destination address\n"); kgem_debug_print(data, offset, 3, "immediate dword low\n"); kgem_debug_print(data, offset, 4, "immediate dword high\n"); } else { for (i = 2; i < len; i++) { kgem_debug_print(data, offset, i, "\n"); } } return len; case 0x7b00: assert(len == 6); kgem_debug_print(data, offset, 0, "3DPRIMITIVE: %s %s\n", get_965_prim_type(data[0]), (data[0] & (1 << 15)) ? "random" : "sequential"); kgem_debug_print(data, offset, 1, "vertex count\n"); kgem_debug_print(data, offset, 2, "start vertex\n"); kgem_debug_print(data, offset, 3, "instance count\n"); kgem_debug_print(data, offset, 4, "start instance\n"); kgem_debug_print(data, offset, 5, "index bias\n"); primitive_out(kgem, data); return len; } /* For the rest, just dump the bytes */ for (i = 0; i < ARRAY_SIZE(opcodes); i++) if (op == opcodes[i].opcode) break; assert(i < ARRAY_SIZE(opcodes)); len = 1; kgem_debug_print(data, offset, 0, "%s\n", opcodes[i].name); if (opcodes[i].max_len > 1) { len = (data[0] & 0xff) + 2; assert(len >= opcodes[i].min_len && len <= opcodes[i].max_len); } for (i = 1; i < len; i++) kgem_debug_print(data, offset, i, "dword %d\n", i); return len; } void kgem_gen4_finish_state(struct kgem *kgem) { memset(&state, 0, sizeof(state)); } xf86-video-intel-2.99.917/src/sna/kgem_debug_gen5.c0000664000175000017500000004345512244635610016470 00000000000000/* * Copyright © 2007-2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include "sna.h" #include "sna_reg.h" #include "gen5_render.h" #include "kgem_debug.h" static struct state { struct vertex_buffer { int handle; void *base; int size; const char *ptr; int pitch; struct kgem_bo *current; } vb[17]; struct vertex_elements { int buffer; int offset; bool valid; uint32_t type; uint8_t swizzle[4]; } ve[17]; int num_ve; struct dynamic_state { struct kgem_bo *current; void *base, *ptr; } dynamic_state; } state; static void gen5_update_vertex_buffer(struct kgem *kgem, const uint32_t *data) { struct drm_i915_gem_relocation_entry *reloc; struct kgem_bo *bo = NULL; void *base, *ptr; int i, size; reloc = kgem_debug_get_reloc_entry(kgem, &data[1] - kgem->batch); if (reloc->target_handle == -1) { base = kgem->batch; size = kgem->nbatch * sizeof(uint32_t); } else { bo = kgem_debug_get_bo_for_reloc_entry(kgem, reloc); base = kgem_bo_map__debug(kgem, bo); size = kgem_bo_size(bo); } ptr = (char *)base + reloc->delta; i = data[0] >> 27; state.vb[i].handle = reloc->target_handle; state.vb[i].current = bo; state.vb[i].base = base; state.vb[i].ptr = ptr; state.vb[i].pitch = data[0] & 0x7ff; state.vb[i].size = size; } static uint32_t get_ve_component(uint32_t data, int component) { return (data >> (16 + (3 - component) * 4)) & 0x7; } static void gen5_update_vertex_elements(struct kgem *kgem, int id, const uint32_t *data) { state.ve[id].buffer = data[0] >> 27; state.ve[id].valid = !!(data[0] & (1 << 26)); state.ve[id].type = (data[0] >> 16) & 0x1ff; state.ve[id].offset = data[0] & 0x7ff; state.ve[id].swizzle[0] = get_ve_component(data[1], 0); state.ve[id].swizzle[1] = get_ve_component(data[1], 1); state.ve[id].swizzle[2] = get_ve_component(data[1], 2); state.ve[id].swizzle[3] = get_ve_component(data[1], 3); } static void vertices_sint16_out(const struct vertex_elements *ve, const int16_t *v, int max) { int c, o; ErrorF("("); for (c = o = 0; c < 4 && o < max; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("%d", v[o++]); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (o < max) ErrorF(", "); } ErrorF(")"); } static void vertices_float_out(const struct vertex_elements *ve, const float *f, int max) { int c, o; ErrorF("("); for (c = o = 0; c < 4 && o < max; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("%f", f[o++]); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (o < max) ErrorF(", "); } ErrorF(")"); } static void ve_out(const struct vertex_elements *ve, const void *ptr) { switch (ve->type) { case GEN5_SURFACEFORMAT_R32_FLOAT: vertices_float_out(ve, ptr, 1); break; case GEN5_SURFACEFORMAT_R32G32_FLOAT: vertices_float_out(ve, ptr, 2); break; case GEN5_SURFACEFORMAT_R32G32B32_FLOAT: vertices_float_out(ve, ptr, 3); break; case GEN5_SURFACEFORMAT_R32G32B32A32_FLOAT: vertices_float_out(ve, ptr, 4); break; case GEN5_SURFACEFORMAT_R16_SINT: vertices_sint16_out(ve, ptr, 1); break; case GEN5_SURFACEFORMAT_R16G16_SINT: vertices_sint16_out(ve, ptr, 2); break; case GEN5_SURFACEFORMAT_R16G16B16A16_SINT: vertices_sint16_out(ve, ptr, 4); break; case GEN5_SURFACEFORMAT_R16_SSCALED: vertices_sint16_out(ve, ptr, 1); break; case GEN5_SURFACEFORMAT_R16G16_SSCALED: vertices_sint16_out(ve, ptr, 2); break; case GEN5_SURFACEFORMAT_R16G16B16A16_SSCALED: vertices_sint16_out(ve, ptr, 4); break; } } static void indirect_vertex_out(struct kgem *kgem, uint32_t v) { int i = 1; do { const struct vertex_elements *ve = &state.ve[i]; const struct vertex_buffer *vb = &state.vb[ve->buffer]; const void *ptr = vb->ptr + v * vb->pitch + ve->offset; if (!ve->valid) continue; assert(vb->pitch); assert(ve->offset + v*vb->pitch < vb->size); ve_out(ve, ptr); while (++i <= state.num_ve && !state.ve[i].valid) ; if (i <= state.num_ve) ErrorF(", "); } while (i <= state.num_ve); } static void primitive_out(struct kgem *kgem, uint32_t *data) { int n; assert((data[0] & (1<<15)) == 0); /* XXX index buffers */ for (n = 0; n < data[1]; n++) { int v = data[2] + n; ErrorF(" [%d:%d] = ", n, v); indirect_vertex_out(kgem, v); ErrorF("\n"); } } static void state_base_out(uint32_t *data, uint32_t offset, unsigned int index, const char *name) { if (data[index] & 1) kgem_debug_print(data, offset, index, "%s state base address 0x%08x\n", name, data[index] & ~1); else kgem_debug_print(data, offset, index, "%s state base not updated\n", name); } static void state_max_out(uint32_t *data, uint32_t offset, unsigned int index, const char *name) { if (data[index] == 1) kgem_debug_print(data, offset, index, "%s state upper bound disabled\n", name); else if (data[index] & 1) kgem_debug_print(data, offset, index, "%s state upper bound 0x%08x\n", name, data[index] & ~1); else kgem_debug_print(data, offset, index, "%s state upper bound not updated\n", name); } static const char * get_965_surfacetype(unsigned int surfacetype) { switch (surfacetype) { case 0: return "1D"; case 1: return "2D"; case 2: return "3D"; case 3: return "CUBE"; case 4: return "BUFFER"; case 7: return "NULL"; default: return "unknown"; } } static const char * get_965_depthformat(unsigned int depthformat) { switch (depthformat) { case 0: return "s8_z24float"; case 1: return "z32float"; case 2: return "z24s8"; case 5: return "z16"; default: return "unknown"; } } static const char * get_965_element_component(uint32_t data, int component) { uint32_t component_control = (data >> (16 + (3 - component) * 4)) & 0x7; switch (component_control) { case 0: return "nostore"; case 1: switch (component) { case 0: return "X"; case 1: return "Y"; case 2: return "Z"; case 3: return "W"; default: return "fail"; } case 2: return "0.0"; case 3: return "1.0"; case 4: return "0x1"; case 5: return "VID"; default: return "fail"; } } static const char * get_965_prim_type(uint32_t data) { uint32_t primtype = (data >> 10) & 0x1f; switch (primtype) { case 0x01: return "point list"; case 0x02: return "line list"; case 0x03: return "line strip"; case 0x04: return "tri list"; case 0x05: return "tri strip"; case 0x06: return "tri fan"; case 0x07: return "quad list"; case 0x08: return "quad strip"; case 0x09: return "line list adj"; case 0x0a: return "line strip adj"; case 0x0b: return "tri list adj"; case 0x0c: return "tri strip adj"; case 0x0d: return "tri strip reverse"; case 0x0e: return "polygon"; case 0x0f: return "rect list"; case 0x10: return "line loop"; case 0x11: return "point list bf"; case 0x12: return "line strip cont"; case 0x13: return "line strip bf"; case 0x14: return "line strip cont bf"; case 0x15: return "tri fan no stipple"; default: return "fail"; } } #if 0 struct reloc { struct kgem_bo *bo; void *base; }; static void * get_reloc(struct kgem *kgem, void *base, const uint32_t *reloc, struct reloc *r) { uint32_t delta = *reloc; memset(r, 0, sizeof(*r)); if (base == 0) { uint32_t handle = sizeof(uint32_t) * (reloc - kgem->batch); struct kgem_bo *bo = NULL; int i; for (i = 0; i < kgem->nreloc; i++) if (kgem->reloc[i].offset == handle) break; assert(i < kgem->nreloc); handle = kgem->reloc[i].target_handle; delta = kgem->reloc[i].delta; if (handle == 0) { base = kgem->batch; } else { list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->handle == handle) break; assert(&bo->request != &kgem->next_request->buffers); base = kgem_bo_map(kgem, bo, PROT_READ); r->bo = bo; r->base = base; } } return (char *)base + delta; } #endif int kgem_gen5_decode_3d(struct kgem *kgem, uint32_t offset) { static const struct { uint32_t opcode; int min_len; int max_len; const char *name; } opcodes[] = { { 0x6000, 3, 3, "URB_FENCE" }, { 0x6001, 2, 2, "CS_URB_FENCE" }, { 0x6002, 2, 2, "CONSTANT_BUFFER" }, { 0x6101, 6, 6, "STATE_BASE_ADDRESS" }, { 0x6102, 2, 2 , "STATE_SIP" }, { 0x6104, 1, 1, "3DSTATE_PIPELINE_SELECT" }, { 0x680b, 1, 1, "3DSTATE_VF_STATISTICS" }, { 0x6904, 1, 1, "3DSTATE_PIPELINE_SELECT" }, { 0x7800, 7, 7, "3DSTATE_PIPELINED_POINTERS" }, { 0x7801, 6, 6, "3DSTATE_BINDING_TABLE_POINTERS" }, { 0x7808, 5, 257, "3DSTATE_VERTEX_BUFFERS" }, { 0x7809, 3, 256, "3DSTATE_VERTEX_ELEMENTS" }, { 0x780a, 3, 3, "3DSTATE_INDEX_BUFFER" }, { 0x780b, 1, 1, "3DSTATE_VF_STATISTICS" }, { 0x7900, 4, 4, "3DSTATE_DRAWING_RECTANGLE" }, { 0x7901, 5, 5, "3DSTATE_CONSTANT_COLOR" }, { 0x7905, 5, 7, "3DSTATE_DEPTH_BUFFER" }, { 0x7906, 2, 2, "3DSTATE_POLY_STIPPLE_OFFSET" }, { 0x7907, 33, 33, "3DSTATE_POLY_STIPPLE_PATTERN" }, { 0x7908, 3, 3, "3DSTATE_LINE_STIPPLE" }, { 0x7909, 2, 2, "3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP" }, { 0x7909, 2, 2, "3DSTATE_CLEAR_PARAMS" }, { 0x790a, 3, 3, "3DSTATE_AA_LINE_PARAMETERS" }, { 0x790b, 4, 4, "3DSTATE_GS_SVB_INDEX" }, { 0x790d, 3, 3, "3DSTATE_MULTISAMPLE" }, { 0x7910, 2, 2, "3DSTATE_CLEAR_PARAMS" }, { 0x7b00, 6, 6, "3DPRIMITIVE" }, { 0x7805, 3, 3, "3DSTATE_URB" }, { 0x7815, 5, 5, "3DSTATE_CONSTANT_VS_STATE" }, { 0x7816, 5, 5, "3DSTATE_CONSTANT_GS_STATE" }, { 0x7817, 5, 5, "3DSTATE_CONSTANT_PS_STATE" }, { 0x7818, 2, 2, "3DSTATE_SAMPLE_MASK" }, }; uint32_t *data = kgem->batch + offset; uint32_t op; unsigned int len; int i; const char *desc1 = NULL; len = (data[0] & 0xff) + 2; op = (data[0] & 0xffff0000) >> 16; switch (op) { case 0x6000: assert(len == 3); kgem_debug_print(data, offset, 0, "URB_FENCE: %s%s%s%s%s%s\n", (data[0] >> 13) & 1 ? "cs " : "", (data[0] >> 12) & 1 ? "vfe " : "", (data[0] >> 11) & 1 ? "sf " : "", (data[0] >> 10) & 1 ? "clip " : "", (data[0] >> 9) & 1 ? "gs " : "", (data[0] >> 8) & 1 ? "vs " : ""); kgem_debug_print(data, offset, 1, "vs fence: %d, gs_fence: %d, clip_fence: %d\n", data[1] & 0x3ff, (data[1] >> 10) & 0x3ff, (data[1] >> 20) & 0x3ff); kgem_debug_print(data, offset, 2, "sf fence: %d, vfe_fence: %d, cs_fence: %d\n", data[2] & 0x3ff, (data[2] >> 10) & 0x3ff, (data[2] >> 20) & 0x7ff); return len; case 0x6001: kgem_debug_print(data, offset, 0, "CS_URB_STATE\n"); kgem_debug_print(data, offset, 1, "entry_size: %d [%d bytes], n_entries: %d\n", (data[1] >> 4) & 0x1f, (((data[1] >> 4) & 0x1f) + 1) * 64, data[1] & 0x7); return len; case 0x6002: kgem_debug_print(data, offset, 0, "CONSTANT_BUFFER: %s\n", (data[0] >> 8) & 1 ? "valid" : "invalid"); kgem_debug_print(data, offset, 1, "offset: 0x%08x, length: %d bytes\n", data[1] & ~0x3f, ((data[1] & 0x3f) + 1) * 64); return len; case 0x6101: i = 0; kgem_debug_print(data, offset, i++, "STATE_BASE_ADDRESS\n"); assert(len == 8); state_base_out(data, offset, i++, "general"); state_base_out(data, offset, i++, "surface"); state_base_out(data, offset, i++, "media"); state_base_out(data, offset, i++, "instruction"); state_max_out(data, offset, i++, "general"); state_max_out(data, offset, i++, "media"); state_max_out(data, offset, i++, "instruction"); return len; case 0x7801: assert(len == 6); kgem_debug_print(data, offset, 0, "3DSTATE_BINDING_TABLE_POINTERS\n"); kgem_debug_print(data, offset, 1, "VS binding table\n"); kgem_debug_print(data, offset, 2, "GS binding table\n"); kgem_debug_print(data, offset, 3, "CLIP binding table\n"); kgem_debug_print(data, offset, 4, "SF binding table\n"); kgem_debug_print(data, offset, 5, "WM binding table\n"); return len; case 0x7808: assert((len - 1) % 4 == 0); kgem_debug_print(data, offset, 0, "3DSTATE_VERTEX_BUFFERS\n"); for (i = 1; i < len;) { gen5_update_vertex_buffer(kgem, data + i); kgem_debug_print(data, offset, i, "buffer %d: %s, pitch %db\n", data[i] >> 27, data[i] & (1 << 20) ? "random" : "sequential", data[i] & 0x07ff); i++; kgem_debug_print(data, offset, i++, "buffer address\n"); kgem_debug_print(data, offset, i++, "max index\n"); kgem_debug_print(data, offset, i++, "mbz\n"); } return len; case 0x7809: assert((len + 1) % 2 == 0); kgem_debug_print(data, offset, 0, "3DSTATE_VERTEX_ELEMENTS\n"); memset(state.ve, 0, sizeof(state.ve)); /* XXX? */ for (i = 1; i < len;) { gen5_update_vertex_elements(kgem, (i - 1)/2, data + i); kgem_debug_print(data, offset, i, "buffer %d: %svalid, type 0x%04x, " "src offset 0x%04x bytes\n", data[i] >> 27, data[i] & (1 << 26) ? "" : "in", (data[i] >> 16) & 0x1ff, data[i] & 0x07ff); i++; kgem_debug_print(data, offset, i, "(%s, %s, %s, %s)\n", get_965_element_component(data[i], 0), get_965_element_component(data[i], 1), get_965_element_component(data[i], 2), get_965_element_component(data[i], 3)); i++; } state.num_ve = (len - 1) / 2; /* XXX? */ return len; case 0x780a: assert(len == 3); kgem_debug_print(data, offset, 0, "3DSTATE_INDEX_BUFFER\n"); kgem_debug_print(data, offset, 1, "beginning buffer address\n"); kgem_debug_print(data, offset, 2, "ending buffer address\n"); return len; case 0x7900: assert(len == 4); kgem_debug_print(data, offset, 0, "3DSTATE_DRAWING_RECTANGLE\n"); kgem_debug_print(data, offset, 1, "top left: %d,%d\n", data[1] & 0xffff, (data[1] >> 16) & 0xffff); kgem_debug_print(data, offset, 2, "bottom right: %d,%d\n", data[2] & 0xffff, (data[2] >> 16) & 0xffff); kgem_debug_print(data, offset, 3, "origin: %d,%d\n", (int)data[3] & 0xffff, ((int)data[3] >> 16) & 0xffff); return len; case 0x7905: assert(len == 7); kgem_debug_print(data, offset, 0, "3DSTATE_DEPTH_BUFFER\n"); kgem_debug_print(data, offset, 1, "%s, %s, pitch = %d bytes, %stiled, HiZ %d, Seperate Stencil %d\n", get_965_surfacetype(data[1] >> 29), get_965_depthformat((data[1] >> 18) & 0x7), (data[1] & 0x0001ffff) + 1, data[1] & (1 << 27) ? "" : "not ", (data[1] & (1 << 22)) != 0, (data[1] & (1 << 21)) != 0); kgem_debug_print(data, offset, 2, "depth offset\n"); kgem_debug_print(data, offset, 3, "%dx%d\n", ((data[3] & 0x0007ffc0) >> 6) + 1, ((data[3] & 0xfff80000) >> 19) + 1); kgem_debug_print(data, offset, 4, "volume depth\n"); kgem_debug_print(data, offset, 5, "\n"); kgem_debug_print(data, offset, 6, "\n"); return len; case 0x7a00: assert(len == 4 || len == 5); switch ((data[1] >> 14) & 0x3) { case 0: desc1 = "no write"; break; case 1: desc1 = "qword write"; break; case 2: desc1 = "PS_DEPTH_COUNT write"; break; case 3: desc1 = "TIMESTAMP write"; break; } kgem_debug_print(data, offset, 0, "PIPE_CONTROL\n"); kgem_debug_print(data, offset, 1, "%s, %scs stall, %stlb invalidate, " "%ssync gfdt, %sdepth stall, %sRC write flush, " "%sinst flush, %sTC flush\n", desc1, data[1] & (1 << 20) ? "" : "no ", data[1] & (1 << 18) ? "" : "no ", data[1] & (1 << 17) ? "" : "no ", data[1] & (1 << 13) ? "" : "no ", data[1] & (1 << 12) ? "" : "no ", data[1] & (1 << 11) ? "" : "no ", data[1] & (1 << 10) ? "" : "no "); if (len == 5) { kgem_debug_print(data, offset, 2, "destination address\n"); kgem_debug_print(data, offset, 3, "immediate dword low\n"); kgem_debug_print(data, offset, 4, "immediate dword high\n"); } else { for (i = 2; i < len; i++) { kgem_debug_print(data, offset, i, "\n"); } } return len; case 0x7b00: assert(len == 6); kgem_debug_print(data, offset, 0, "3DPRIMITIVE: %s %s\n", get_965_prim_type(data[0]), (data[0] & (1 << 15)) ? "random" : "sequential"); kgem_debug_print(data, offset, 1, "vertex count\n"); kgem_debug_print(data, offset, 2, "start vertex\n"); kgem_debug_print(data, offset, 3, "instance count\n"); kgem_debug_print(data, offset, 4, "start instance\n"); kgem_debug_print(data, offset, 5, "index bias\n"); primitive_out(kgem, data); return len; } /* For the rest, just dump the bytes */ for (i = 0; i < ARRAY_SIZE(opcodes); i++) if (op == opcodes[i].opcode) break; assert(i < ARRAY_SIZE(opcodes)); len = 1; kgem_debug_print(data, offset, 0, "%s\n", opcodes[i].name); if (opcodes[i].max_len > 1) { len = (data[0] & 0xff) + 2; assert(len >= opcodes[i].min_len && len <= opcodes[i].max_len); } for (i = 1; i < len; i++) kgem_debug_print(data, offset, i, "dword %d\n", i); return len; } void kgem_gen5_finish_state(struct kgem *kgem) { memset(&state, 0, sizeof(state)); } xf86-video-intel-2.99.917/src/sna/gen8_vertex.c0000664000175000017500000002236112400044327015701 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "gen8_vertex.h" void gen8_vertex_align(struct sna *sna, const struct sna_composite_op *op) { int vertex_index; assert(op->floats_per_rect == 3*op->floats_per_vertex); vertex_index = (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex; if ((int)sna->render.vertex_size - vertex_index * op->floats_per_vertex < 2*op->floats_per_rect) { DBG(("%s: flushing vertex buffer: new index=%d, max=%d\n", __FUNCTION__, vertex_index, sna->render.vertex_size / op->floats_per_vertex)); if (gen8_vertex_finish(sna) < 2*op->floats_per_rect) { kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } vertex_index = (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex; assert(vertex_index * op->floats_per_vertex <= sna->render.vertex_size); } sna->render.vertex_index = vertex_index; sna->render.vertex_used = vertex_index * op->floats_per_vertex; } void gen8_vertex_flush(struct sna *sna) { DBG(("%s[%x] = %d\n", __FUNCTION__, 4*sna->render.vertex_offset, sna->render.vertex_index - sna->render.vertex_start)); assert(sna->render.vertex_offset); assert(sna->render.vertex_offset <= sna->kgem.nbatch); assert(sna->render.vertex_index > sna->render.vertex_start); assert(sna->render.vertex_used <= sna->render.vertex_size); sna->kgem.batch[sna->render.vertex_offset] = sna->render.vertex_index - sna->render.vertex_start; sna->render.vertex_offset = 0; } int gen8_vertex_finish(struct sna *sna) { struct kgem_bo *bo; unsigned int i; unsigned hint, size; DBG(("%s: used=%d / %d\n", __FUNCTION__, sna->render.vertex_used, sna->render.vertex_size)); assert(sna->render.vertex_offset == 0); assert(sna->render.vertex_used); assert(sna->render.vertex_used <= sna->render.vertex_size); sna_vertex_wait__locked(&sna->render); /* Note: we only need dword alignment (currently) */ hint = CREATE_GTT_MAP; bo = sna->render.vbo; if (bo) { for (i = 0; i < sna->render.nvertex_reloc; i++) { DBG(("%s: reloc[%d] = %d\n", __FUNCTION__, i, sna->render.vertex_reloc[i])); *(uint64_t *)(sna->kgem.batch+sna->render.vertex_reloc[i]) = kgem_add_reloc64(&sna->kgem, sna->render.vertex_reloc[i], bo, I915_GEM_DOMAIN_VERTEX << 16, 0); } assert(!sna->render.active); sna->render.nvertex_reloc = 0; sna->render.vertex_used = 0; sna->render.vertex_index = 0; sna->render.vbo = NULL; sna->render.vb_id = 0; kgem_bo_destroy(&sna->kgem, bo); hint |= CREATE_CACHED | CREATE_NO_THROTTLE; } else { if (kgem_is_idle(&sna->kgem)) { sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); return 0; } } size = 256*1024; assert(!sna->render.active); sna->render.vertices = NULL; sna->render.vbo = kgem_create_linear(&sna->kgem, size, hint); while (sna->render.vbo == NULL && size > 16*1024) { size /= 2; sna->render.vbo = kgem_create_linear(&sna->kgem, size, hint); } if (sna->render.vbo == NULL) sna->render.vbo = kgem_create_linear(&sna->kgem, 256*1024, CREATE_GTT_MAP); if (sna->render.vbo) sna->render.vertices = kgem_bo_map(&sna->kgem, sna->render.vbo); if (sna->render.vertices == NULL) { if (sna->render.vbo) { kgem_bo_destroy(&sna->kgem, sna->render.vbo); sna->render.vbo = NULL; } sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); return 0; } if (sna->render.vertex_used) { DBG(("%s: copying initial buffer x %d to handle=%d\n", __FUNCTION__, sna->render.vertex_used, sna->render.vbo->handle)); assert(sizeof(float)*sna->render.vertex_used <= __kgem_bo_size(sna->render.vbo)); memcpy(sna->render.vertices, sna->render.vertex_data, sizeof(float)*sna->render.vertex_used); } size = __kgem_bo_size(sna->render.vbo)/4; if (size >= UINT16_MAX) size = UINT16_MAX - 1; DBG(("%s: create vbo handle=%d, size=%d\n", __FUNCTION__, sna->render.vbo->handle, size)); sna->render.vertex_size = size; return sna->render.vertex_size - sna->render.vertex_used; } void gen8_vertex_close(struct sna *sna) { struct kgem_bo *bo, *free_bo = NULL; unsigned int i, delta = 0; assert(sna->render.vertex_offset == 0); if (!sna->render.vb_id) return; DBG(("%s: used=%d, vbo active? %d, vb=%x, nreloc=%d\n", __FUNCTION__, sna->render.vertex_used, sna->render.vbo ? sna->render.vbo->handle : 0, sna->render.vb_id, sna->render.nvertex_reloc)); assert(!sna->render.active); bo = sna->render.vbo; if (bo) { if (sna->render.vertex_size - sna->render.vertex_used < 64) { DBG(("%s: discarding vbo (full), handle=%d\n", __FUNCTION__, sna->render.vbo->handle)); sna->render.vbo = NULL; sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); free_bo = bo; } else if (!sna->kgem.has_llc && sna->render.vertices == MAP(bo->map__cpu)) { DBG(("%s: converting CPU map to GTT\n", __FUNCTION__)); sna->render.vertices = kgem_bo_map__gtt(&sna->kgem, sna->render.vbo); if (sna->render.vertices == NULL) { sna->render.vbo = NULL; sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); free_bo = bo; } } } else { int size; size = sna->kgem.nbatch; size += sna->kgem.batch_size - sna->kgem.surface; size += sna->render.vertex_used; if (size <= 1024) { DBG(("%s: copy to batch: %d @ %d\n", __FUNCTION__, sna->render.vertex_used, sna->kgem.nbatch)); assert(sna->kgem.nbatch + sna->render.vertex_used <= sna->kgem.surface); memcpy(sna->kgem.batch + sna->kgem.nbatch, sna->render.vertex_data, sna->render.vertex_used * 4); delta = sna->kgem.nbatch * 4; bo = NULL; sna->kgem.nbatch += sna->render.vertex_used; } else { size = 256 * 1024; do { bo = kgem_create_linear(&sna->kgem, size, CREATE_GTT_MAP | CREATE_NO_RETIRE | CREATE_NO_THROTTLE | CREATE_CACHED); } while (bo == NULL && (size>>=1) > sizeof(float)*sna->render.vertex_used); sna->render.vertices = NULL; if (bo) sna->render.vertices = kgem_bo_map(&sna->kgem, bo); if (sna->render.vertices != NULL) { DBG(("%s: new vbo: %d / %d\n", __FUNCTION__, sna->render.vertex_used, __kgem_bo_size(bo)/4)); assert(sizeof(float)*sna->render.vertex_used <= __kgem_bo_size(bo)); memcpy(sna->render.vertices, sna->render.vertex_data, sizeof(float)*sna->render.vertex_used); size = __kgem_bo_size(bo)/4; if (size >= UINT16_MAX) size = UINT16_MAX - 1; sna->render.vbo = bo; sna->render.vertex_size = size; } else { DBG(("%s: tmp vbo: %d\n", __FUNCTION__, sna->render.vertex_used)); if (bo) kgem_bo_destroy(&sna->kgem, bo); bo = kgem_create_linear(&sna->kgem, 4*sna->render.vertex_used, CREATE_NO_THROTTLE); if (bo && !kgem_bo_write(&sna->kgem, bo, sna->render.vertex_data, 4*sna->render.vertex_used)) { kgem_bo_destroy(&sna->kgem, bo); bo = NULL; } assert(sna->render.vbo == NULL); sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); free_bo = bo; } } } assert(sna->render.nvertex_reloc); for (i = 0; i < sna->render.nvertex_reloc; i++) { DBG(("%s: reloc[%d] = %d\n", __FUNCTION__, i, sna->render.vertex_reloc[i])); *(uint64_t *)(sna->kgem.batch+sna->render.vertex_reloc[i]) = kgem_add_reloc64(&sna->kgem, sna->render.vertex_reloc[i], bo, I915_GEM_DOMAIN_VERTEX << 16, delta); } sna->render.nvertex_reloc = 0; sna->render.vb_id = 0; if (sna->render.vbo == NULL) { assert(!sna->render.active); sna->render.vertex_used = 0; sna->render.vertex_index = 0; assert(sna->render.vertices == sna->render.vertex_data); assert(sna->render.vertex_size == ARRAY_SIZE(sna->render.vertex_data)); } if (free_bo) kgem_bo_destroy(&sna->kgem, free_bo); } xf86-video-intel-2.99.917/src/sna/sna_transform.c0000664000175000017500000001256712433626012016331 00000000000000/* * Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved. * Copyright (c) 2005 Jesse Barnes * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Jesse Barns * Chris Wilson */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" /** * Returns whether the provided transform is affine. * * transform may be null. */ bool sna_transform_is_affine(const PictTransform *t) { if (t == NULL) return true; return t->matrix[2][0] == 0 && t->matrix[2][1] == 0; } bool sna_transform_is_translation(const PictTransform *t, pixman_fixed_t *tx, pixman_fixed_t *ty) { if (t == NULL) { *tx = *ty = 0; return true; } if (t->matrix[0][0] != IntToxFixed(1) || t->matrix[0][1] != 0 || t->matrix[1][0] != 0 || t->matrix[1][1] != IntToxFixed(1) || t->matrix[2][0] != 0 || t->matrix[2][1] != 0 || t->matrix[2][2] != IntToxFixed(1)) return false; *tx = t->matrix[0][2]; *ty = t->matrix[1][2]; return true; } bool sna_transform_is_integer_translation(const PictTransform *t, int16_t *tx, int16_t *ty) { if (t == NULL) { *tx = *ty = 0; return true; } if (t->matrix[0][0] != IntToxFixed(1) || t->matrix[0][1] != 0 || t->matrix[1][0] != 0 || t->matrix[1][1] != IntToxFixed(1) || t->matrix[2][0] != 0 || t->matrix[2][1] != 0 || t->matrix[2][2] != IntToxFixed(1)) return false; if (pixman_fixed_fraction(t->matrix[0][2]) || pixman_fixed_fraction(t->matrix[1][2])) return false; *tx = pixman_fixed_to_int(t->matrix[0][2]); *ty = pixman_fixed_to_int(t->matrix[1][2]); return true; } bool sna_transform_is_imprecise_integer_translation(const PictTransform *t, int filter, bool precise, int16_t *tx, int16_t *ty) { if (t == NULL) { DBG(("%s: no transform\n", __FUNCTION__)); *tx = *ty = 0; return true; } DBG(("%s: FilterNearest?=%d, precise?=%d, transform=[%f %f %f, %f %f %f, %f %f %f]\n", __FUNCTION__, filter==PictFilterNearest, precise, t->matrix[0][0]/65536., t->matrix[0][1]/65536., t->matrix[0][2]/65536., t->matrix[1][0]/65536., t->matrix[1][1]/65536., t->matrix[1][2]/65536., t->matrix[2][0]/65536., t->matrix[2][1]/65536., t->matrix[2][2]/65536.)); if (t->matrix[0][0] != IntToxFixed(1) || t->matrix[0][1] != 0 || t->matrix[1][0] != 0 || t->matrix[1][1] != IntToxFixed(1) || t->matrix[2][0] != 0 || t->matrix[2][1] != 0 || t->matrix[2][2] != IntToxFixed(1)) { DBG(("%s: not unity scaling\n", __FUNCTION__)); return false; } if (filter != PictFilterNearest) { if (precise) { if (pixman_fixed_fraction(t->matrix[0][2]) || pixman_fixed_fraction(t->matrix[1][2])) { DBG(("%s: precise, fractional translation\n", __FUNCTION__)); return false; } } else { int f; f = pixman_fixed_fraction(t->matrix[0][2]); if (f > IntToxFixed(1)/4 && f < IntToxFixed(3)/4) { DBG(("%s: imprecise, fractional translation X: %x\n", __FUNCTION__, f)); return false; } f = pixman_fixed_fraction(t->matrix[1][2]); if (f > IntToxFixed(1)/4 && f < IntToxFixed(3)/4) { DBG(("%s: imprecise, fractional translation Y: %x\n", __FUNCTION__, f)); return false; } } } *tx = pixman_fixed_to_int(t->matrix[0][2] + IntToxFixed(1)/2); *ty = pixman_fixed_to_int(t->matrix[1][2] + IntToxFixed(1)/2); return true; } /** * Returns the floating-point coordinates transformed by the given transform. */ void sna_get_transformed_coordinates(int x, int y, const PictTransform *transform, float *x_out, float *y_out) { if (transform == NULL) { *x_out = x; *y_out = y; } else _sna_get_transformed_coordinates(x, y, transform, x_out, y_out); } /** * Returns the un-normalized floating-point coordinates transformed by the given transform. */ void sna_get_transformed_coordinates_3d(int x, int y, const PictTransform *transform, float *x_out, float *y_out, float *w_out) { if (transform == NULL) { *x_out = x; *y_out = y; *w_out = 1; } else { int64_t result[3]; if (_sna_transform_point(transform, x, y, result)) { *x_out = result[0] / 65536.; *y_out = result[1] / 65536.; *w_out = result[2] / 65536.; } else { *x_out = *y_out = 0; *w_out = 1.; } } } xf86-video-intel-2.99.917/src/sna/sna_trapezoids_mono.c0000664000175000017500000011612312432737457017542 00000000000000/* * Copyright (c) 2007 David Turner * Copyright (c) 2008 M Joonas Pihlaja * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_trapezoids.h" #include "fb/fbpict.h" #include struct quorem { int32_t quo; int64_t rem; }; struct mono_edge { struct mono_edge *next, *prev; int32_t height_left; int32_t dir; int64_t dy; struct quorem x; struct quorem dxdy; }; struct mono_polygon { int num_edges; struct mono_edge *edges; struct mono_edge **y_buckets; struct mono_edge *y_buckets_embedded[64]; struct mono_edge edges_embedded[32]; }; struct mono { /* Leftmost edge on the current scan line. */ struct mono_edge head, tail; int is_vertical; struct sna *sna; struct sna_composite_op op; pixman_region16_t clip; fastcall void (*span)(struct mono *, int, int, BoxPtr); struct mono_polygon polygon; }; #define I(x) pixman_fixed_to_int ((x) + pixman_fixed_1_minus_e/2) static struct quorem floored_muldivrem(int32_t x, int32_t a, int32_t b) { struct quorem qr; int64_t xa = (int64_t)x*a; qr.quo = xa/b; qr.rem = xa%b; if (qr.rem < 0) { qr.quo -= 1; qr.rem += b; } return qr; } #if HAS_DEBUG_FULL static void _assert_pixmap_contains_box(PixmapPtr pixmap, BoxPtr box, const char *function) { if (box->x1 < 0 || box->y1 < 0 || box->x2 > pixmap->drawable.width || box->y2 > pixmap->drawable.height) FatalError("%s: damage box is beyond the pixmap: box=(%d, %d), (%d, %d), pixmap=(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, pixmap->drawable.width, pixmap->drawable.height); } #define assert_pixmap_contains_box(p, b) _assert_pixmap_contains_box(p, b, __FUNCTION__) #else #define assert_pixmap_contains_box(p, b) #endif static void apply_damage(struct sna_composite_op *op, RegionPtr region) { DBG(("%s: damage=%p, region=%dx[(%d, %d), (%d, %d)]\n", __FUNCTION__, op->damage, region_num_rects(region), region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); if (op->damage == NULL) return; RegionTranslate(region, op->dst.x, op->dst.y); assert_pixmap_contains_box(op->dst.pixmap, RegionExtents(region)); sna_damage_add(op->damage, region); } static void _apply_damage_box(struct sna_composite_op *op, const BoxRec *box) { BoxRec r; r.x1 = box->x1 + op->dst.x; r.x2 = box->x2 + op->dst.x; r.y1 = box->y1 + op->dst.y; r.y2 = box->y2 + op->dst.y; assert_pixmap_contains_box(op->dst.pixmap, &r); sna_damage_add_box(op->damage, &r); } inline static void apply_damage_box(struct sna_composite_op *op, const BoxRec *box) { if (op->damage) _apply_damage_box(op, box); } static bool mono_polygon_init(struct mono_polygon *polygon, BoxPtr box, int num_edges) { unsigned h = box->y2 - box->y1; polygon->y_buckets = polygon->y_buckets_embedded; if (h > ARRAY_SIZE (polygon->y_buckets_embedded)) { polygon->y_buckets = malloc (h * sizeof (struct mono_edge *)); if (unlikely (NULL == polygon->y_buckets)) return false; } polygon->num_edges = 0; polygon->edges = polygon->edges_embedded; if (num_edges > (int)ARRAY_SIZE (polygon->edges_embedded)) { polygon->edges = malloc (num_edges * sizeof (struct mono_edge)); if (unlikely (polygon->edges == NULL)) { if (polygon->y_buckets != polygon->y_buckets_embedded) free(polygon->y_buckets); return false; } } memset(polygon->y_buckets, 0, h * sizeof (struct edge *)); return true; } static void mono_polygon_fini(struct mono_polygon *polygon) { if (polygon->y_buckets != polygon->y_buckets_embedded) free(polygon->y_buckets); if (polygon->edges != polygon->edges_embedded) free(polygon->edges); } static void mono_add_line(struct mono *mono, int dst_x, int dst_y, xFixed top, xFixed bottom, const xPointFixed *p1, const xPointFixed *p2, int dir) { struct mono_polygon *polygon = &mono->polygon; struct mono_edge *e; int y, ytop, ybot; __DBG(("%s: top=%d, bottom=%d, line=(%d, %d), (%d, %d) delta=%dx%d, dir=%d\n", __FUNCTION__, (int)top, (int)bottom, (int)p1->x, (int)p1->y, (int)p2->x, (int)p2->y, dst_x, dst_y, dir)); if (top > bottom) { const xPointFixed *t; y = top; top = bottom; bottom = y; t = p1; p1 = p2; p2 = t; dir = -dir; } y = I(top) + dst_y; ytop = MAX(y, mono->clip.extents.y1); y = I(bottom) + dst_y; ybot = MIN(y, mono->clip.extents.y2); __DBG(("%s: edge height [%d, %d] = %d\n", __FUNCTION__, ytop, ybot, ybot - ytop)); if (ybot <= ytop) { __DBG(("discard clipped line\n")); return; } e = polygon->edges + polygon->num_edges++; e->height_left = ybot - ytop; e->dir = dir; if (I(p1->x) == I(p2->x)) { __DBG(("%s: vertical edge x:%d\n", __FUNCTION__, I(p1->x))); e->x.quo = p1->x; e->x.rem = 0; e->dxdy.quo = 0; e->dxdy.rem = 0; e->dy = 0; } else { int64_t dx = (int64_t)p2->x - p1->x; int64_t dy = (int64_t)p2->y - p1->y; __DBG(("%s: diagonal edge (%d, %d), x:[%d, %d]\n", __FUNCTION__, dx, dy, I(p1->x), I(p2->x))); assert(dy > 0); e->dxdy = floored_muldivrem(dx, pixman_fixed_1, dy); e->x = floored_muldivrem((ytop - dst_y) * pixman_fixed_1 + pixman_fixed_1_minus_e/2 - p1->y, dx, dy); e->x.quo += p1->x; e->x.rem -= dy; e->dy = dy; __DBG(("%s: initial x=%d [%d.%d/%d] + dxdy=%d.%d/%d\n", __FUNCTION__, I(e->x.quo), e->x.quo, e->x.rem, e->dy, e->dxdy.quo, e->dxdy.rem, e->dy)); } e->x.quo += dst_x*pixman_fixed_1; { struct mono_edge **ptail = &polygon->y_buckets[ytop - mono->clip.extents.y1]; if (*ptail) (*ptail)->prev = e; e->next = *ptail; e->prev = NULL; *ptail = e; } } static struct mono_edge * mono_merge_sorted_edges(struct mono_edge *head_a, struct mono_edge *head_b) { struct mono_edge *head, **next, *prev; int32_t x; if (head_b == NULL) return head_a; prev = head_a->prev; next = &head; if (head_a->x.quo <= head_b->x.quo) { head = head_a; } else { head = head_b; head_b->prev = prev; goto start_with_b; } do { x = head_b->x.quo; while (head_a != NULL && head_a->x.quo <= x) { prev = head_a; next = &head_a->next; head_a = head_a->next; } head_b->prev = prev; *next = head_b; if (head_a == NULL) return head; start_with_b: x = head_a->x.quo; while (head_b != NULL && head_b->x.quo <= x) { prev = head_b; next = &head_b->next; head_b = head_b->next; } head_a->prev = prev; *next = head_a; if (head_b == NULL) return head; } while (1); } static struct mono_edge * mono_sort_edges(struct mono_edge *list, unsigned int level, struct mono_edge **head_out) { struct mono_edge *head_other, *remaining; unsigned int i; head_other = list->next; if (head_other == NULL) { *head_out = list; return NULL; } remaining = head_other->next; if (list->x.quo <= head_other->x.quo) { *head_out = list; head_other->next = NULL; } else { *head_out = head_other; head_other->prev = list->prev; head_other->next = list; list->prev = head_other; list->next = NULL; } for (i = 0; i < level && remaining; i++) { remaining = mono_sort_edges(remaining, i, &head_other); *head_out = mono_merge_sorted_edges(*head_out, head_other); } return remaining; } static struct mono_edge *mono_filter(struct mono_edge *edges) { struct mono_edge *e; e = edges; while (e->next) { struct mono_edge *n = e->next; if (e->dir == -n->dir && e->height_left == n->height_left && e->x.quo == n->x.quo && e->x.rem == n->x.rem && e->dxdy.quo == n->dxdy.quo && e->dxdy.rem == n->dxdy.rem) { if (e->prev) e->prev->next = n->next; else edges = n->next; if (n->next) n->next->prev = e->prev; else break; e = n->next; } else e = n; } return edges; } static struct mono_edge * mono_merge_unsorted_edges(struct mono_edge *head, struct mono_edge *unsorted) { mono_sort_edges(unsorted, UINT_MAX, &unsorted); return mono_merge_sorted_edges(head, mono_filter(unsorted)); } #if 0 static inline void __dbg_mono_edges(const char *function, struct mono_edge *edges) { DBG(("%s: ", function)); while (edges) { if (edges->x.quo < INT16_MAX << 16) { DBG(("(%d.%06d)+(%d.%06d)x%d, ", edges->x.quo, edges->x.rem, edges->dxdy.quo, edges->dxdy.rem, edges->dy*edges->dir)); } edges = edges->next; } DBG(("\n")); } #define DBG_MONO_EDGES(x) __dbg_mono_edges(__FUNCTION__, x) static inline void VALIDATE_MONO_EDGES(struct mono_edge *edges) { int prev_x = edges->x.quo; while ((edges = edges->next)) { assert(edges->x.quo >= prev_x); prev_x = edges->x.quo; } } #else #define DBG_MONO_EDGES(x) #define VALIDATE_MONO_EDGES(x) #endif inline static void mono_merge_edges(struct mono *c, struct mono_edge *edges) { struct mono_edge *e; DBG_MONO_EDGES(edges); for (e = edges; c->is_vertical && e; e = e->next) c->is_vertical = e->dy == 0; c->head.next = mono_merge_unsorted_edges(c->head.next, edges); } fastcall static void mono_span(struct mono *c, int x1, int x2, BoxPtr box) { __DBG(("%s [%d, %d]\n", __FUNCTION__, x1, x2)); box->x1 = x1; box->x2 = x2; if (c->clip.data) { pixman_region16_t region; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, &c->clip); if (region_num_rects(®ion)) { c->op.boxes(c->sna, &c->op, region_rects(®ion), region_num_rects(®ion)); apply_damage(&c->op, ®ion); } pixman_region_fini(®ion); } else { c->op.box(c->sna, &c->op, box); apply_damage_box(&c->op, box); } } fastcall static void mono_span__fast(struct mono *c, int x1, int x2, BoxPtr box) { __DBG(("%s [%d, %d]\n", __FUNCTION__, x1, x2)); box->x1 = x1; box->x2 = x2; c->op.box(c->sna, &c->op, box); } struct mono_span_thread_boxes { const struct sna_composite_op *op; #define MONO_SPAN_MAX_BOXES (8192/sizeof(BoxRec)) BoxRec boxes[MONO_SPAN_MAX_BOXES]; int num_boxes; }; inline static void thread_mono_span_add_boxes(struct mono *c, const BoxRec *box, int count) { struct mono_span_thread_boxes *b = c->op.priv; assert(count > 0 && count <= MONO_SPAN_MAX_BOXES); if (unlikely(b->num_boxes + count > MONO_SPAN_MAX_BOXES)) { b->op->thread_boxes(c->sna, b->op, b->boxes, b->num_boxes); b->num_boxes = 0; } memcpy(b->boxes + b->num_boxes, box, count*sizeof(BoxRec)); b->num_boxes += count; assert(b->num_boxes <= MONO_SPAN_MAX_BOXES); } fastcall static void thread_mono_span_clipped(struct mono *c, int x1, int x2, BoxPtr box) { pixman_region16_t region; __DBG(("%s [%d, %d]\n", __FUNCTION__, x1, x2)); box->x1 = x1; box->x2 = x2; assert(c->clip.data); pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, &c->clip); if (region_num_rects(®ion)) thread_mono_span_add_boxes(c, region_rects(®ion), region_num_rects(®ion)); pixman_region_fini(®ion); } fastcall static void thread_mono_span(struct mono *c, int x1, int x2, BoxPtr box) { __DBG(("%s [%d, %d]\n", __FUNCTION__, x1, x2)); box->x1 = x1; box->x2 = x2; thread_mono_span_add_boxes(c, box, 1); } inline static void mono_row(struct mono *c, int16_t y, int16_t h) { struct mono_edge *edge = c->head.next; int prev_x = INT_MIN; int16_t xstart = INT16_MIN; int winding = 0; BoxRec box; DBG_MONO_EDGES(edge); VALIDATE_MONO_EDGES(&c->head); box.y1 = c->clip.extents.y1 + y; box.y2 = box.y1 + h; while (&c->tail != edge) { struct mono_edge *next = edge->next; int16_t xend = I(edge->x.quo); if (--edge->height_left) { if (edge->dy) { edge->x.quo += edge->dxdy.quo; edge->x.rem += edge->dxdy.rem; if (edge->x.rem >= 0) { ++edge->x.quo; edge->x.rem -= edge->dy; } } if (edge->x.quo < prev_x) { struct mono_edge *pos = edge->prev; pos->next = next; next->prev = pos; do { pos = pos->prev; } while (edge->x.quo < pos->x.quo); pos->next->prev = edge; edge->next = pos->next; edge->prev = pos; pos->next = edge; } else prev_x = edge->x.quo; } else { edge->prev->next = next; next->prev = edge->prev; } winding += edge->dir; if (winding == 0) { assert(I(next->x.quo) >= xend); if (I(next->x.quo) > xend + 1) { if (xstart < c->clip.extents.x1) xstart = c->clip.extents.x1; if (xend > c->clip.extents.x2) xend = c->clip.extents.x2; if (xend > xstart) c->span(c, xstart, xend, &box); xstart = INT16_MIN; } } else if (xstart == INT16_MIN) xstart = xend; edge = next; } DBG_MONO_EDGES(c->head.next); VALIDATE_MONO_EDGES(&c->head); } static bool mono_init(struct mono *c, int num_edges) { if (!mono_polygon_init(&c->polygon, &c->clip.extents, num_edges)) return false; c->head.dy = 0; c->head.height_left = INT_MAX; c->head.x.quo = INT16_MIN << 16; c->head.prev = NULL; c->head.next = &c->tail; c->tail.prev = &c->head; c->tail.next = NULL; c->tail.x.quo = INT16_MAX << 16; c->tail.height_left = INT_MAX; c->tail.dy = 0; c->is_vertical = 1; return true; } static void mono_fini(struct mono *mono) { mono_polygon_fini(&mono->polygon); } static void mono_step_edges(struct mono *c, int count) { struct mono_edge *edge; for (edge = c->head.next; edge != &c->tail; edge = edge->next) { edge->height_left -= count; if (! edge->height_left) { edge->prev->next = edge->next; edge->next->prev = edge->prev; } } } flatten static void mono_render(struct mono *mono) { struct mono_polygon *polygon = &mono->polygon; int i, j, h = mono->clip.extents.y2 - mono->clip.extents.y1; assert(mono->span); for (i = 0; i < h; i = j) { j = i + 1; if (polygon->y_buckets[i]) mono_merge_edges(mono, polygon->y_buckets[i]); if (mono->is_vertical) { struct mono_edge *e = mono->head.next; int min_height = h - i; while (e != &mono->tail) { if (e->height_left < min_height) min_height = e->height_left; e = e->next; } while (--min_height >= 1 && polygon->y_buckets[j] == NULL) j++; if (j != i + 1) mono_step_edges(mono, j - (i + 1)); } mono_row(mono, i, j-i); /* XXX recompute after dropping edges? */ if (mono->head.next == &mono->tail) mono->is_vertical = 1; } } static int operator_is_bounded(uint8_t op) { switch (op) { case PictOpOver: case PictOpOutReverse: case PictOpAdd: return true; default: return false; } } struct mono_span_thread { struct sna *sna; const xTrapezoid *traps; const struct sna_composite_op *op; RegionPtr clip; int ntrap; BoxRec extents; int dx, dy; }; static void mono_span_thread(void *arg) { struct mono_span_thread *thread = arg; struct mono mono; struct mono_span_thread_boxes boxes; const xTrapezoid *t; int n; mono.sna = thread->sna; mono.clip.extents = thread->extents; mono.clip.data = NULL; if (thread->clip->data) { RegionIntersect(&mono.clip, &mono.clip, thread->clip); if (RegionNil(&mono.clip)) return; } boxes.op = thread->op; boxes.num_boxes = 0; mono.op.priv = &boxes; if (!mono_init(&mono, 2*thread->ntrap)) { RegionUninit(&mono.clip); return; } for (n = thread->ntrap, t = thread->traps; n--; t++) { if (!xTrapezoidValid(t)) continue; if (pixman_fixed_to_int(t->top) + thread->dy >= thread->extents.y2 || pixman_fixed_to_int(t->bottom) + thread->dy <= thread->extents.y1) continue; mono_add_line(&mono, thread->dx, thread->dy, t->top, t->bottom, &t->left.p1, &t->left.p2, 1); mono_add_line(&mono, thread->dx, thread->dy, t->top, t->bottom, &t->right.p1, &t->right.p2, -1); } if (mono.clip.data == NULL) mono.span = thread_mono_span; else mono.span = thread_mono_span_clipped; mono_render(&mono); mono_fini(&mono); if (boxes.num_boxes) thread->op->thread_boxes(thread->sna, thread->op, boxes.boxes, boxes.num_boxes); RegionUninit(&mono.clip); } bool mono_trapezoids_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps) { struct mono mono; BoxRec extents; int16_t dst_x, dst_y; int16_t dx, dy; bool unbounded; int num_threads, n; if (NO_SCAN_CONVERTER) return false; trapezoid_origin(&traps[0].left, &dst_x, &dst_y); if (!trapezoids_bounds(ntrap, traps, &extents)) return true; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); if (!sna_compute_composite_region(&mono.clip, src, NULL, dst, src_x + extents.x1 - dst_x, src_y + extents.y1 - dst_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) { DBG(("%s: trapezoids do not intersect drawable clips\n", __FUNCTION__)) ; return true; } dx = dst->pDrawable->x; dy = dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d) src -> (%d, %d)\n", __FUNCTION__, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2, mono.clip.extents.y2, dx, dy, src_x + mono.clip.extents.x1 - dst_x - dx, src_y + mono.clip.extents.y1 - dst_y - dy)); unbounded = (!sna_drawable_is_clear(dst->pDrawable) && !operator_is_bounded(op)); if (op == PictOpClear && sna->clear) src = sna->clear; mono.sna = sna; if (!mono.sna->render.composite(mono.sna, op, src, NULL, dst, src_x + mono.clip.extents.x1 - dst_x - dx, src_y + mono.clip.extents.y1 - dst_y - dy, 0, 0, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2 - mono.clip.extents.x1, mono.clip.extents.y2 - mono.clip.extents.y1, COMPOSITE_PARTIAL, memset(&mono.op, 0, sizeof(mono.op)))) return false; num_threads = 1; if (!NO_GPU_THREADS && mono.op.thread_boxes && mono.op.damage == NULL && !unbounded) num_threads = sna_use_threads(mono.clip.extents.x2 - mono.clip.extents.x1, mono.clip.extents.y2 - mono.clip.extents.y1, 32); if (num_threads > 1) { struct mono_span_thread threads[num_threads]; int y, h; DBG(("%s: using %d threads for mono span compositing %dx%d\n", __FUNCTION__, num_threads, mono.clip.extents.x2 - mono.clip.extents.x1, mono.clip.extents.y2 - mono.clip.extents.y1)); threads[0].sna = mono.sna; threads[0].op = &mono.op; threads[0].traps = traps; threads[0].ntrap = ntrap; threads[0].extents = mono.clip.extents; threads[0].clip = &mono.clip; threads[0].dx = dx; threads[0].dy = dy; y = extents.y1; h = extents.y2 - extents.y1; h = (h + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * h >= extents.y2 - extents.y1; for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].extents.y1 = y; threads[n].extents.y2 = y += h; sna_threads_run(n, mono_span_thread, &threads[n]); } threads[0].extents.y1 = y; threads[0].extents.y2 = extents.y2; mono_span_thread(&threads[0]); sna_threads_wait(); mono.op.done(mono.sna, &mono.op); return true; } if (!mono_init(&mono, 2*ntrap)) return false; for (n = 0; n < ntrap; n++) { if (!xTrapezoidValid(&traps[n])) continue; if (pixman_fixed_integer_floor(traps[n].top) + dy >= mono.clip.extents.y2 || pixman_fixed_integer_ceil(traps[n].bottom) + dy <= mono.clip.extents.y1) continue; mono_add_line(&mono, dx, dy, traps[n].top, traps[n].bottom, &traps[n].left.p1, &traps[n].left.p2, 1); mono_add_line(&mono, dx, dy, traps[n].top, traps[n].bottom, &traps[n].right.p1, &traps[n].right.p2, -1); } if (mono.clip.data == NULL && mono.op.damage == NULL) mono.span = mono_span__fast; else mono.span = mono_span; mono_render(&mono); mono.op.done(mono.sna, &mono.op); mono_fini(&mono); if (unbounded) { xPointFixed p1, p2; if (!mono_init(&mono, 2+2*ntrap)) return false; p1.y = mono.clip.extents.y1 * pixman_fixed_1; p2.y = mono.clip.extents.y2 * pixman_fixed_1; p1.x = mono.clip.extents.x1 * pixman_fixed_1; p2.x = mono.clip.extents.x1 * pixman_fixed_1; mono_add_line(&mono, 0, 0, p1.y, p2.y, &p1, &p2, -1); p1.x = mono.clip.extents.x2 * pixman_fixed_1; p2.x = mono.clip.extents.x2 * pixman_fixed_1; mono_add_line(&mono, 0, 0, p1.y, p2.y, &p1, &p2, 1); for (n = 0; n < ntrap; n++) { if (!xTrapezoidValid(&traps[n])) continue; if (pixman_fixed_to_int(traps[n].top) + dy >= mono.clip.extents.y2 || pixman_fixed_to_int(traps[n].bottom) + dy < mono.clip.extents.y1) continue; mono_add_line(&mono, dx, dy, traps[n].top, traps[n].bottom, &traps[n].left.p1, &traps[n].left.p2, 1); mono_add_line(&mono, dx, dy, traps[n].top, traps[n].bottom, &traps[n].right.p1, &traps[n].right.p2, -1); } if (mono.sna->render.composite(mono.sna, PictOpClear, mono.sna->clear, NULL, dst, 0, 0, 0, 0, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2 - mono.clip.extents.x1, mono.clip.extents.y2 - mono.clip.extents.y1, COMPOSITE_PARTIAL, memset(&mono.op, 0, sizeof(mono.op)))) { mono_render(&mono); mono.op.done(mono.sna, &mono.op); } mono_fini(&mono); } REGION_UNINIT(NULL, &mono.clip); return true; } struct mono_inplace_composite { pixman_image_t *src, *dst; int dx, dy; int sx, sy; int op; }; struct mono_inplace_fill { uint32_t *data, stride; uint32_t color; int bpp; }; fastcall static void mono_inplace_fill_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { struct mono_inplace_fill *fill = op->priv; DBG(("(%s: (%d, %d)x(%d, %d):%08x\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1, fill->color)); pixman_fill(fill->data, fill->stride, fill->bpp, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1, fill->color); } static void mono_inplace_fill_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { struct mono_inplace_fill *fill = op->priv; do { DBG(("(%s: (%d, %d)x(%d, %d):%08x\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1, fill->color)); pixman_fill(fill->data, fill->stride, fill->bpp, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1, fill->color); box++; } while (--nbox); } fastcall static void mono_inplace_composite_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { struct mono_inplace_composite *c = op->priv; pixman_image_composite(c->op, c->src, NULL, c->dst, box->x1 + c->sx, box->y1 + c->sy, 0, 0, box->x1 + c->dx, box->y1 + c->dy, box->x2 - box->x1, box->y2 - box->y1); } static void mono_inplace_composite_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { struct mono_inplace_composite *c = op->priv; do { pixman_image_composite(c->op, c->src, NULL, c->dst, box->x1 + c->sx, box->y1 + c->sy, 0, 0, box->x1 + c->dx, box->y1 + c->dy, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--nbox); } bool mono_trapezoid_span_inplace(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps) { struct mono mono; union { struct mono_inplace_fill fill; struct mono_inplace_composite composite; } inplace; int was_clear; int x, y, n; if (!trapezoids_bounds(ntrap, traps, &mono.clip.extents)) return true; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2, mono.clip.extents.y2)); if (!sna_compute_composite_region(&mono.clip, src, NULL, dst, src_x, src_y, 0, 0, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2 - mono.clip.extents.x1, mono.clip.extents.y2 - mono.clip.extents.y1)) { DBG(("%s: trapezoids do not intersect drawable clips\n", __FUNCTION__)) ; return true; } DBG(("%s: clipped extents (%d, %d), (%d, %d)\n", __FUNCTION__, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2, mono.clip.extents.y2)); was_clear = sna_drawable_is_clear(dst->pDrawable); if (!sna_drawable_move_region_to_cpu(dst->pDrawable, &mono.clip, MOVE_WRITE | MOVE_READ)) return true; mono.sna = sna; if (!mono_init(&mono, 2*ntrap)) return false; mono.op.damage = NULL; x = dst->pDrawable->x; y = dst->pDrawable->y; for (n = 0; n < ntrap; n++) { if (!xTrapezoidValid(&traps[n])) continue; if (pixman_fixed_to_int(traps[n].top) + y >= mono.clip.extents.y2 || pixman_fixed_to_int(traps[n].bottom) + y < mono.clip.extents.y1) continue; mono_add_line(&mono, x, y, traps[n].top, traps[n].bottom, &traps[n].left.p1, &traps[n].left.p2, 1); mono_add_line(&mono, x, y, traps[n].top, traps[n].bottom, &traps[n].right.p1, &traps[n].right.p2, -1); } if (sna_picture_is_solid(src, &inplace.fill.color) && (op == PictOpSrc || op == PictOpClear || (was_clear && (op == PictOpOver || op == PictOpAdd)) || (op == PictOpOver && inplace.fill.color >> 24 == 0xff))) { PixmapPtr pixmap; int16_t dx, dy; uint8_t *ptr; unbounded_pass: pixmap = get_drawable_pixmap(dst->pDrawable); ptr = pixmap->devPrivate.ptr; if (get_drawable_deltas(dst->pDrawable, pixmap, &dx, &dy)) ptr += dy * pixmap->devKind + dx * pixmap->drawable.bitsPerPixel / 8; inplace.fill.data = (uint32_t *)ptr; inplace.fill.stride = pixmap->devKind / sizeof(uint32_t); inplace.fill.bpp = pixmap->drawable.bitsPerPixel; if (op == PictOpClear) inplace.fill.color = 0; else if (dst->format != PICT_a8r8g8b8) inplace.fill.color = sna_rgba_to_color(inplace.fill.color, dst->format); DBG(("%s: fill %x\n", __FUNCTION__, inplace.fill.color)); mono.op.priv = &inplace.fill; mono.op.box = mono_inplace_fill_box; mono.op.boxes = mono_inplace_fill_boxes; op = 0; } else { if (src->pDrawable) { if (!sna_drawable_move_to_cpu(src->pDrawable, MOVE_READ)) { mono_fini(&mono); return false; } if (src->alphaMap && !sna_drawable_move_to_cpu(src->alphaMap->pDrawable, MOVE_READ)) { mono_fini(&mono); return false; } } inplace.composite.dst = image_from_pict(dst, false, &inplace.composite.dx, &inplace.composite.dy); inplace.composite.src = image_from_pict(src, false, &inplace.composite.sx, &inplace.composite.sy); inplace.composite.sx += src_x - pixman_fixed_to_int(traps[0].left.p1.x), inplace.composite.sy += src_y - pixman_fixed_to_int(traps[0].left.p1.y), inplace.composite.op = op; mono.op.priv = &inplace.composite; mono.op.box = mono_inplace_composite_box; mono.op.boxes = mono_inplace_composite_boxes; } if (mono.clip.data == NULL && mono.op.damage == NULL) mono.span = mono_span__fast; else mono.span = mono_span; if (sigtrap_get() == 0) { mono_render(&mono); sigtrap_put(); } mono_fini(&mono); if (op) { free_pixman_pict(src, inplace.composite.src); free_pixman_pict(dst, inplace.composite.dst); if (!was_clear && !operator_is_bounded(op)) { xPointFixed p1, p2; DBG(("%s: unbounded fixup\n", __FUNCTION__)); if (!mono_init(&mono, 2+2*ntrap)) return false; p1.y = mono.clip.extents.y1 * pixman_fixed_1; p2.y = mono.clip.extents.y2 * pixman_fixed_1; p1.x = mono.clip.extents.x1 * pixman_fixed_1; p2.x = mono.clip.extents.x1 * pixman_fixed_1; mono_add_line(&mono, 0, 0, p1.y, p2.y, &p1, &p2, -1); p1.x = mono.clip.extents.x2 * pixman_fixed_1; p2.x = mono.clip.extents.x2 * pixman_fixed_1; mono_add_line(&mono, 0, 0, p1.y, p2.y, &p1, &p2, 1); for (n = 0; n < ntrap; n++) { if (!xTrapezoidValid(&traps[n])) continue; if (pixman_fixed_to_int(traps[n].top) + x >= mono.clip.extents.y2 || pixman_fixed_to_int(traps[n].bottom) + y < mono.clip.extents.y1) continue; mono_add_line(&mono, x, y, traps[n].top, traps[n].bottom, &traps[n].left.p1, &traps[n].left.p2, 1); mono_add_line(&mono, x, y, traps[n].top, traps[n].bottom, &traps[n].right.p1, &traps[n].right.p2, -1); } op = PictOpClear; goto unbounded_pass; } } return true; } bool mono_trap_span_converter(struct sna *sna, PicturePtr dst, INT16 x, INT16 y, int ntrap, xTrap *traps) { struct mono mono; xRenderColor white; PicturePtr src; int error; int n; white.red = white.green = white.blue = white.alpha = 0xffff; src = CreateSolidPicture(0, &white, &error); if (src == NULL) return true; mono.clip = *dst->pCompositeClip; x += dst->pDrawable->x; y += dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d)\n", __FUNCTION__, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2, mono.clip.extents.y2, x, y)); mono.sna = sna; if (!mono_init(&mono, 2*ntrap)) return false; for (n = 0; n < ntrap; n++) { xPointFixed p1, p2; if (pixman_fixed_to_int(traps[n].top.y) + y >= mono.clip.extents.y2 || pixman_fixed_to_int(traps[n].bot.y) + y < mono.clip.extents.y1) continue; p1.y = traps[n].top.y; p2.y = traps[n].bot.y; p1.x = traps[n].top.l; p2.x = traps[n].bot.l; mono_add_line(&mono, x, y, traps[n].top.y, traps[n].bot.y, &p1, &p2, 1); p1.x = traps[n].top.r; p2.x = traps[n].bot.r; mono_add_line(&mono, x, y, traps[n].top.y, traps[n].bot.y, &p1, &p2, -1); } if (mono.sna->render.composite(mono.sna, PictOpAdd, src, NULL, dst, 0, 0, 0, 0, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2 - mono.clip.extents.x1, mono.clip.extents.y2 - mono.clip.extents.y1, COMPOSITE_PARTIAL, memset(&mono.op, 0, sizeof(mono.op)))) { if (mono.clip.data == NULL && mono.op.damage == NULL) mono.span = mono_span__fast; else mono.span = mono_span; mono_render(&mono); mono.op.done(mono.sna, &mono.op); } mono_fini(&mono); FreePicture(src, 0); return true; } bool mono_triangles_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int count, xTriangle *tri) { struct mono mono; BoxRec extents; int16_t dst_x, dst_y; int16_t dx, dy; bool was_clear; int n; mono.sna = sna; dst_x = pixman_fixed_to_int(tri[0].p1.x); dst_y = pixman_fixed_to_int(tri[0].p1.y); miTriangleBounds(count, tri, &extents); DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); if (extents.y1 >= extents.y2 || extents.x1 >= extents.x2) return true; if (!sna_compute_composite_region(&mono.clip, src, NULL, dst, src_x + extents.x1 - dst_x, src_y + extents.y1 - dst_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) { DBG(("%s: triangles do not intersect drawable clips\n", __FUNCTION__)) ; return true; } dx = dst->pDrawable->x; dy = dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d) src -> (%d, %d)\n", __FUNCTION__, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2, mono.clip.extents.y2, dx, dy, src_x + mono.clip.extents.x1 - dst_x - dx, src_y + mono.clip.extents.y1 - dst_y - dy)); was_clear = sna_drawable_is_clear(dst->pDrawable); if (!mono_init(&mono, 3*count)) return false; for (n = 0; n < count; n++) { mono_add_line(&mono, dx, dy, tri[n].p1.y, tri[n].p2.y, &tri[n].p1, &tri[n].p2, 1); mono_add_line(&mono, dx, dy, tri[n].p2.y, tri[n].p3.y, &tri[n].p2, &tri[n].p3, 1); mono_add_line(&mono, dx, dy, tri[n].p3.y, tri[n].p1.y, &tri[n].p3, &tri[n].p1, 1); } if (mono.sna->render.composite(mono.sna, op, src, NULL, dst, src_x + mono.clip.extents.x1 - dst_x - dx, src_y + mono.clip.extents.y1 - dst_y - dy, 0, 0, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2 - mono.clip.extents.x1, mono.clip.extents.y2 - mono.clip.extents.y1, COMPOSITE_PARTIAL, memset(&mono.op, 0, sizeof(mono.op)))) { if (mono.clip.data == NULL && mono.op.damage == NULL) mono.span = mono_span__fast; else mono.span = mono_span; mono_render(&mono); mono.op.done(mono.sna, &mono.op); } if (!was_clear && !operator_is_bounded(op)) { xPointFixed p1, p2; if (!mono_init(&mono, 2+3*count)) return false; p1.y = mono.clip.extents.y1 * pixman_fixed_1; p2.y = mono.clip.extents.y2 * pixman_fixed_1; p1.x = mono.clip.extents.x1 * pixman_fixed_1; p2.x = mono.clip.extents.x1 * pixman_fixed_1; mono_add_line(&mono, 0, 0, p1.y, p2.y, &p1, &p2, -1); p1.x = mono.clip.extents.x2 * pixman_fixed_1; p2.x = mono.clip.extents.x2 * pixman_fixed_1; mono_add_line(&mono, 0, 0, p1.y, p2.y, &p1, &p2, 1); for (n = 0; n < count; n++) { mono_add_line(&mono, dx, dy, tri[n].p1.y, tri[n].p2.y, &tri[n].p1, &tri[n].p2, 1); mono_add_line(&mono, dx, dy, tri[n].p2.y, tri[n].p3.y, &tri[n].p2, &tri[n].p3, 1); mono_add_line(&mono, dx, dy, tri[n].p3.y, tri[n].p1.y, &tri[n].p3, &tri[n].p1, 1); } if (mono.sna->render.composite(mono.sna, PictOpClear, mono.sna->clear, NULL, dst, 0, 0, 0, 0, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2 - mono.clip.extents.x1, mono.clip.extents.y2 - mono.clip.extents.y1, COMPOSITE_PARTIAL, memset(&mono.op, 0, sizeof(mono.op)))) { if (mono.clip.data == NULL && mono.op.damage == NULL) mono.span = mono_span__fast; else mono.span = mono_span; mono_render(&mono); mono.op.done(mono.sna, &mono.op); } mono_fini(&mono); } mono_fini(&mono); REGION_UNINIT(NULL, &mono.clip); return true; } bool mono_tristrip_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int count, xPointFixed *points) { struct mono mono; BoxRec extents; int16_t dst_x, dst_y; int16_t dx, dy; bool was_clear; int n; mono.sna = sna; dst_x = pixman_fixed_to_int(points[0].x); dst_y = pixman_fixed_to_int(points[0].y); miPointFixedBounds(count, points, &extents); DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); if (extents.y1 >= extents.y2 || extents.x1 >= extents.x2) return true; if (!sna_compute_composite_region(&mono.clip, src, NULL, dst, src_x + extents.x1 - dst_x, src_y + extents.y1 - dst_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) { DBG(("%s: triangles do not intersect drawable clips\n", __FUNCTION__)) ; return true; } dx = dst->pDrawable->x; dy = dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d) src -> (%d, %d)\n", __FUNCTION__, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2, mono.clip.extents.y2, dx, dy, src_x + mono.clip.extents.x1 - dst_x - dx, src_y + mono.clip.extents.y1 - dst_y - dy)); was_clear = sna_drawable_is_clear(dst->pDrawable); if (!mono_init(&mono, 2*count)) return false; mono_add_line(&mono, dx, dy, points[0].y, points[1].y, &points[0], &points[1], -1); n = 2; do { mono_add_line(&mono, dx, dy, points[n-2].y, points[n].y, &points[n-2], &points[n], 1); if (++n == count) break; mono_add_line(&mono, dx, dy, points[n-2].y, points[n].y, &points[n-2], &points[n], -1); if (++n == count) break; } while (1); mono_add_line(&mono, dx, dy, points[n-2].y, points[n-1].y, &points[n-2], &points[n-1], 1); if (mono.sna->render.composite(mono.sna, op, src, NULL, dst, src_x + mono.clip.extents.x1 - dst_x - dx, src_y + mono.clip.extents.y1 - dst_y - dy, 0, 0, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2 - mono.clip.extents.x1, mono.clip.extents.y2 - mono.clip.extents.y1, COMPOSITE_PARTIAL, memset(&mono.op, 0, sizeof(mono.op)))) { if (mono.clip.data == NULL && mono.op.damage == NULL) mono.span = mono_span__fast; else mono.span = mono_span; mono_render(&mono); mono.op.done(mono.sna, &mono.op); } if (!was_clear && !operator_is_bounded(op)) { xPointFixed p1, p2; if (!mono_init(&mono, 2+2*count)) return false; p1.y = mono.clip.extents.y1 * pixman_fixed_1; p2.y = mono.clip.extents.y2 * pixman_fixed_1; p1.x = mono.clip.extents.x1 * pixman_fixed_1; p2.x = mono.clip.extents.x1 * pixman_fixed_1; mono_add_line(&mono, 0, 0, p1.y, p2.y, &p1, &p2, -1); p1.x = mono.clip.extents.x2 * pixman_fixed_1; p2.x = mono.clip.extents.x2 * pixman_fixed_1; mono_add_line(&mono, 0, 0, p1.y, p2.y, &p1, &p2, 1); mono_add_line(&mono, dx, dy, points[0].y, points[1].y, &points[0], &points[1], -1); n = 2; do { mono_add_line(&mono, dx, dy, points[n-2].y, points[n].y, &points[n-2], &points[n], 1); if (++n == count) break; mono_add_line(&mono, dx, dy, points[n-2].y, points[n].y, &points[n-2], &points[n], -1); if (++n == count) break; } while (1); mono_add_line(&mono, dx, dy, points[n-2].y, points[n-1].y, &points[n-2], &points[n-1], 1); if (mono.sna->render.composite(mono.sna, PictOpClear, mono.sna->clear, NULL, dst, 0, 0, 0, 0, mono.clip.extents.x1, mono.clip.extents.y1, mono.clip.extents.x2 - mono.clip.extents.x1, mono.clip.extents.y2 - mono.clip.extents.y1, COMPOSITE_PARTIAL, memset(&mono.op, 0, sizeof(mono.op)))) { if (mono.clip.data == NULL && mono.op.damage == NULL) mono.span = mono_span__fast; else mono.span = mono_span; mono_render(&mono); mono.op.done(mono.sna, &mono.op); } mono_fini(&mono); } mono_fini(&mono); REGION_UNINIT(NULL, &mono.clip); return true; } xf86-video-intel-2.99.917/src/sna/sna_accel.c0000664000175000017500000163456112445274667015414 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_reg.h" #include "sna_video.h" #include "rop.h" #include "intel_options.h" #include #include #include #include #include #include #include #ifdef RENDER #include #endif #include #include #include #include #ifdef HAVE_VALGRIND #include #include #endif #define FAULT_INJECTION 0 #define FORCE_INPLACE 0 #define FORCE_FALLBACK 0 #define FORCE_FLUSH 0 #define FORCE_FULL_SYNC 0 /* https://bugs.freedesktop.org/show_bug.cgi?id=61628 */ #define DEFAULT_TILING I915_TILING_X #define USE_INPLACE 1 #define USE_SPANS 0 /* -1 force CPU, 1 force GPU */ #define USE_CPU_BO 1 #define USE_USERPTR_UPLOADS 1 #define USE_USERPTR_DOWNLOADS 1 #define USE_COW 1 #define UNDO 1 #define MIGRATE_ALL 0 #define DBG_NO_PARTIAL_MOVE_TO_CPU 0 #define DBG_NO_CPU_UPLOAD 0 #define DBG_NO_CPU_DOWNLOAD 0 #define ACCEL_FILL_SPANS 1 #define ACCEL_SET_SPANS 1 #define ACCEL_PUT_IMAGE 1 #define ACCEL_GET_IMAGE 1 #define ACCEL_COPY_AREA 1 #define ACCEL_COPY_PLANE 1 #define ACCEL_COPY_WINDOW 1 #define ACCEL_POLY_POINT 1 #define ACCEL_POLY_LINE 1 #define ACCEL_POLY_SEGMENT 1 #define ACCEL_POLY_RECTANGLE 1 #define ACCEL_POLY_ARC 1 #define ACCEL_POLY_FILL_POLYGON 1 #define ACCEL_POLY_FILL_RECT 1 #define ACCEL_POLY_FILL_ARC 1 #define ACCEL_POLY_TEXT8 1 #define ACCEL_POLY_TEXT16 1 #define ACCEL_POLY_GLYPH 1 #define ACCEL_IMAGE_TEXT8 1 #define ACCEL_IMAGE_TEXT16 1 #define ACCEL_IMAGE_GLYPH 1 #define ACCEL_PUSH_PIXELS 1 #define NO_TILE_8x8 0 #define NO_STIPPLE_8x8 0 #define IS_COW_OWNER(ptr) ((uintptr_t)(ptr) & 1) #define MAKE_COW_OWNER(ptr) ((void*)((uintptr_t)(ptr) | 1)) #define COW(ptr) (void *)((uintptr_t)(ptr) & ~1) #define IS_CLIPPED 0x2 #define RECTILINEAR 0x4 #define OVERWRITES 0x8 #if 0 static void __sna_fallback_flush(DrawablePtr d) { PixmapPtr pixmap = get_drawable_pixmap(d); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; BoxRec box; PixmapPtr tmp; int i, j; char *src, *dst; DBG(("%s: uploading CPU damage...\n", __FUNCTION__)); priv = sna_pixmap_move_to_gpu(pixmap, MOVE_READ); if (priv == NULL) return; DBG(("%s: downloading GPU damage...\n", __FUNCTION__)); if (!sna_pixmap_move_to_cpu(pixmap, MOVE_READ)) return; box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; tmp = sna_pixmap_create_unattached(pixmap->drawable.pScreen, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.depth, 0); DBG(("%s: comparing with direct read...\n", __FUNCTION__)); sna_read_boxes(sna, tmp, priv->gpu_bo, &box, 1); src = pixmap->devPrivate.ptr; dst = tmp->devPrivate.ptr; for (i = 0; i < tmp->drawable.height; i++) { if (memcmp(src, dst, tmp->drawable.width * tmp->drawable.bitsPerPixel >> 3)) { for (j = 0; src[j] == dst[j]; j++) ; ERR(("mismatch at (%d, %d)\n", 8*j / tmp->drawable.bitsPerPixel, i)); abort(); } src += pixmap->devKind; dst += tmp->devKind; } tmp->drawable.pScreen->DestroyPixmap(tmp); } #define FALLBACK_FLUSH(d) __sna_fallback_flush(d) #else #define FALLBACK_FLUSH(d) #endif static int sna_font_key; static const uint8_t copy_ROP[] = { ROP_0, /* GXclear */ ROP_DSa, /* GXand */ ROP_SDna, /* GXandReverse */ ROP_S, /* GXcopy */ ROP_DSna, /* GXandInverted */ ROP_D, /* GXnoop */ ROP_DSx, /* GXxor */ ROP_DSo, /* GXor */ ROP_DSon, /* GXnor */ ROP_DSxn, /* GXequiv */ ROP_Dn, /* GXinvert */ ROP_SDno, /* GXorReverse */ ROP_Sn, /* GXcopyInverted */ ROP_DSno, /* GXorInverted */ ROP_DSan, /* GXnand */ ROP_1 /* GXset */ }; static const uint8_t fill_ROP[] = { ROP_0, ROP_DPa, ROP_PDna, ROP_P, ROP_DPna, ROP_D, ROP_DPx, ROP_DPo, ROP_DPon, ROP_PDxn, ROP_Dn, ROP_PDno, ROP_Pn, ROP_DPno, ROP_DPan, ROP_1 }; static const GCOps sna_gc_ops; static const GCOps sna_gc_ops__cpu; static GCOps sna_gc_ops__tmp; static const GCFuncs sna_gc_funcs; static const GCFuncs sna_gc_funcs__cpu; static void sna_poly_fill_rect__gpu(DrawablePtr draw, GCPtr gc, int n, xRectangle *rect); static inline void region_set(RegionRec *r, const BoxRec *b) { r->extents = *b; r->data = NULL; } static inline bool region_maybe_clip(RegionRec *r, RegionRec *clip) { if (clip->data && !RegionIntersect(r, r, clip)) return false; return !box_empty(&r->extents); } static inline bool region_is_singular(const RegionRec *r) { return r->data == NULL; } static inline bool region_is_unclipped(const RegionRec *r, int w, int h) { return (region_is_singular(r) && w == r->extents.x2 - r->extents.x1 && h == r->extents.y2 - r->extents.y1); } typedef struct box32 { int32_t x1, y1, x2, y2; } Box32Rec; #define PM_IS_SOLID(_draw, _pm) \ (((_pm) & FbFullMask((_draw)->depth)) == FbFullMask((_draw)->depth)) #ifndef NDEBUG static void _assert_pixmap_contains_box(PixmapPtr pixmap, const BoxRec *box, const char *function) { if (box->x1 < 0 || box->y1 < 0 || box->x2 > pixmap->drawable.width || box->y2 > pixmap->drawable.height) { FatalError("%s: damage box [(%d, %d), (%d, %d)] is beyond the pixmap=%ld size=%dx%d\n", function, box->x1, box->y1, box->x2, box->y2, pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height); } } static void _assert_pixmap_contains_damage(PixmapPtr pixmap, struct sna_damage *damage, const char *function) { if (damage == NULL) return; _assert_pixmap_contains_box(pixmap, &DAMAGE_PTR(damage)->extents, function); } #define assert_pixmap_contains_damage(p,d) _assert_pixmap_contains_damage(p, d, __FUNCTION__) #else #define assert_pixmap_contains_damage(p,d) #endif #define __assert_pixmap_damage(p) do { \ struct sna_pixmap *priv__ = sna_pixmap(p); \ if (priv__) { \ assert(priv__->gpu_damage == NULL || priv__->gpu_bo); \ assert(priv__->gpu_bo == NULL || priv__->gpu_bo->refcnt); \ assert(priv__->cpu_bo == NULL || priv__->cpu_bo->refcnt); \ assert_pixmap_contains_damage(p, priv__->gpu_damage); \ assert_pixmap_contains_damage(p, priv__->cpu_damage); \ assert_pixmap_map(p, priv__); \ } \ } while (0) #ifdef DEBUG_PIXMAP static void _assert_pixmap_contains_box_with_offset(PixmapPtr pixmap, const BoxRec *box, int dx, int dy, const char *function) { BoxRec b = *box; b.x1 += dx; b.x2 += dx; b.y1 += dy; b.y2 += dy; _assert_pixmap_contains_box(pixmap, &b, function); } static void _assert_pixmap_contains_boxes(PixmapPtr pixmap, const BoxRec *box, int n, int dx, int dy, const char *function) { BoxRec extents; extents = *box; while (--n) { ++box; if (box->x1 < extents.x1) extents.x1 = box->x1; if (box->x2 > extents.x2) extents.x2 = box->x2; if (box->y1 < extents.y1) extents.y1 = box->y1; if (box->y2 > extents.y2) extents.y2 = box->y2; } extents.x1 += dx; extents.x2 += dx; extents.y1 += dy; extents.y2 += dy; _assert_pixmap_contains_box(pixmap, &extents, function); } static void _assert_pixmap_contains_points(PixmapPtr pixmap, const DDXPointRec *pt, int n, int dx, int dy, const char *function) { BoxRec extents; extents.x2 = extents.x1 = pt->x; extents.y2 = extents.y1 = pt->y; while (--n) { ++pt; if (pt->x < extents.x1) extents.x1 = pt->x; else if (pt->x > extents.x2) extents.x2 = pt->x; if (pt->y < extents.y1) extents.y1 = pt->y; else if (pt->y > extents.y2) extents.y2 = pt->y; } extents.x1 += dx; extents.x2 += dx + 1; extents.y1 += dy; extents.y2 += dy + 1; _assert_pixmap_contains_box(pixmap, &extents, function); } static void _assert_drawable_contains_box(DrawablePtr drawable, const BoxRec *box, const char *function) { if (box->x1 < drawable->x || box->y1 < drawable->y || box->x2 > drawable->x + drawable->width || box->y2 > drawable->y + drawable->height) { FatalError("%s: damage box is beyond the drawable: box=(%d, %d), (%d, %d), drawable=(%d, %d)x(%d, %d)\n", function, box->x1, box->y1, box->x2, box->y2, drawable->x, drawable->y, drawable->width, drawable->height); } } static void assert_pixmap_damage(PixmapPtr p) { struct sna_pixmap *priv; RegionRec reg, cpu, gpu; priv = sna_pixmap(p); if (priv == NULL) return; __assert_pixmap_damage(p); if (priv->clear) { assert(DAMAGE_IS_ALL(priv->gpu_damage)); assert(priv->cpu_damage == NULL); } if (DAMAGE_IS_ALL(priv->gpu_damage) && DAMAGE_IS_ALL(priv->cpu_damage)) { /* special upload buffer */ assert(priv->gpu_bo && priv->gpu_bo->proxy); assert(priv->cpu_bo == NULL); return; } assert(!DAMAGE_IS_ALL(priv->gpu_damage) || priv->cpu_damage == NULL); assert(!DAMAGE_IS_ALL(priv->cpu_damage) || priv->gpu_damage == NULL); /* Avoid reducing damage to minimise interferrence */ RegionNull(®); RegionNull(&gpu); RegionNull(&cpu); if (priv->gpu_damage) _sna_damage_debug_get_region(DAMAGE_PTR(priv->gpu_damage), &gpu); if (priv->cpu_damage) _sna_damage_debug_get_region(DAMAGE_PTR(priv->cpu_damage), &cpu); RegionIntersect(®, &cpu, &gpu); assert(RegionNil(®)); RegionUninit(®); RegionUninit(&gpu); RegionUninit(&cpu); } #define assert_pixmap_contains_box(p, b) _assert_pixmap_contains_box(p, b, __FUNCTION__) #define assert_pixmap_contains_box_with_offset(p, b, dx, dy) _assert_pixmap_contains_box_with_offset(p, b, dx, dy, __FUNCTION__) #define assert_drawable_contains_box(d, b) _assert_drawable_contains_box(d, b, __FUNCTION__) #define assert_pixmap_contains_boxes(p, b, n, x, y) _assert_pixmap_contains_boxes(p, b, n, x, y, __FUNCTION__) #define assert_pixmap_contains_points(p, pt, n, x, y) _assert_pixmap_contains_points(p, pt, n, x, y, __FUNCTION__) #else #define assert_pixmap_contains_box(p, b) #define assert_pixmap_contains_box_with_offset(p, b, dx, dy) #define assert_pixmap_contains_boxes(p, b, n, x, y) #define assert_pixmap_contains_points(p, pt, n, x, y) #define assert_drawable_contains_box(d, b) #ifndef NDEBUG #define assert_pixmap_damage(p) __assert_pixmap_damage(p) #else #define assert_pixmap_damage(p) #endif #endif jmp_buf sigjmp[4]; volatile sig_atomic_t sigtrap; static int sigtrap_handler(int sig) { /* XXX rate-limited squawk? */ DBG(("%s(sig=%d) sigtrap=%d\n", __FUNCTION__, sig, sigtrap)); sna_threads_trap(sig); if (sigtrap) siglongjmp(sigjmp[--sigtrap], sig); return -1; } static void sigtrap_init(void) { #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) OsRegisterSigWrapper(sigtrap_handler); #endif } inline static bool sna_fill_init_blt(struct sna_fill_op *fill, struct sna *sna, PixmapPtr pixmap, struct kgem_bo *bo, uint8_t alu, uint32_t pixel, unsigned flags) { return sna->render.fill(sna, alu, pixmap, bo, pixel, flags, fill); } static bool sna_copy_init_blt(struct sna_copy_op *copy, struct sna *sna, PixmapPtr src, struct kgem_bo *src_bo, PixmapPtr dst, struct kgem_bo *dst_bo, uint8_t alu) { memset(copy, 0, sizeof(*copy)); return sna->render.copy(sna, alu, src, src_bo, dst, dst_bo, copy); } static void sna_pixmap_free_gpu(struct sna *sna, struct sna_pixmap *priv) { DBG(("%s: handle=%d (pinned? %d)\n", __FUNCTION__, priv->gpu_bo ? priv->gpu_bo->handle : 0, priv->pinned)); assert(priv->gpu_damage == NULL || priv->gpu_bo); if (priv->cow) sna_pixmap_undo_cow(sna, priv, MOVE_WRITE); assert(priv->cow == NULL); if (priv->move_to_gpu) { sna_pixmap_discard_shadow_damage(priv, NULL); priv->move_to_gpu(sna, priv, MOVE_WRITE); } sna_damage_destroy(&priv->gpu_damage); priv->clear = false; if (priv->gpu_bo) { if (!priv->pinned) { assert(!priv->flush); assert(!priv->move_to_gpu); sna_pixmap_unmap(priv->pixmap, priv); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = NULL; } else kgem_bo_undo(&sna->kgem, priv->gpu_bo); } /* and reset the upload counter */ priv->source_count = SOURCE_BIAS; } static bool must_check sna_pixmap_alloc_cpu(struct sna *sna, PixmapPtr pixmap, struct sna_pixmap *priv, unsigned flags) { /* Restore after a GTT mapping? */ assert(priv->gpu_damage == NULL || priv->gpu_bo); assert(!priv->shm); if (priv->ptr) goto done; DBG(("%s: pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); assert(priv->stride); if (priv->create & KGEM_CAN_CREATE_CPU) { unsigned hint; DBG(("%s: allocating CPU buffer (%dx%d)\n", __FUNCTION__, pixmap->drawable.width, pixmap->drawable.height)); hint = 0; if ((flags & MOVE_ASYNC_HINT) == 0 && ((flags & MOVE_READ) == 0 || (priv->gpu_damage && !priv->clear && !sna->kgem.has_llc))) hint = CREATE_CPU_MAP | CREATE_INACTIVE | CREATE_NO_THROTTLE; priv->cpu_bo = kgem_create_cpu_2d(&sna->kgem, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, hint); if (priv->cpu_bo) { priv->ptr = kgem_bo_map__cpu(&sna->kgem, priv->cpu_bo); if (priv->ptr) { DBG(("%s: allocated CPU handle=%d (snooped? %d)\n", __FUNCTION__, priv->cpu_bo->handle, priv->cpu_bo->snoop)); priv->stride = priv->cpu_bo->pitch; #ifdef DEBUG_MEMORY sna->debug_memory.cpu_bo_allocs++; sna->debug_memory.cpu_bo_bytes += kgem_bo_size(priv->cpu_bo); #endif } else { kgem_bo_destroy(&sna->kgem, priv->cpu_bo); priv->cpu_bo = NULL; } } } if (priv->ptr == NULL) { DBG(("%s: allocating ordinary memory for shadow pixels [%d bytes]\n", __FUNCTION__, priv->stride * pixmap->drawable.height)); priv->ptr = malloc(priv->stride * pixmap->drawable.height); } done: assert(priv->stride); assert(!priv->mapped); pixmap->devPrivate.ptr = PTR(priv->ptr); pixmap->devKind = priv->stride; return priv->ptr != NULL; } static void __sna_pixmap_free_cpu(struct sna *sna, struct sna_pixmap *priv) { if (priv->cpu_bo) { DBG(("%s: discarding CPU buffer, handle=%d, size=%d\n", __FUNCTION__, priv->cpu_bo->handle, kgem_bo_size(priv->cpu_bo))); #ifdef DEBUG_MEMORY sna->debug_memory.cpu_bo_allocs--; sna->debug_memory.cpu_bo_bytes -= kgem_bo_size(priv->cpu_bo); #endif if (priv->cpu_bo->flush) { assert(!priv->cpu_bo->reusable); kgem_bo_sync__cpu(&sna->kgem, priv->cpu_bo); sna_accel_watch_flush(sna, -1); } kgem_bo_destroy(&sna->kgem, priv->cpu_bo); } else if (!IS_STATIC_PTR(priv->ptr)) free(priv->ptr); } static bool sna_pixmap_free_cpu(struct sna *sna, struct sna_pixmap *priv, bool active) { if (active) return false; if (IS_STATIC_PTR(priv->ptr)) return false; if (priv->ptr == NULL) return true; DBG(("%s(pixmap=%ld)\n", __FUNCTION__, priv->pixmap->drawable.serialNumber)); __sna_pixmap_free_cpu(sna, priv); priv->cpu_bo = NULL; priv->ptr = NULL; if (priv->mapped == MAPPED_NONE) priv->pixmap->devPrivate.ptr = NULL; return true; } static inline uint32_t default_tiling(struct sna *sna, PixmapPtr pixmap) { #if DEFAULT_TILING == I915_TILING_NONE return I915_TILING_NONE; #elif DEFAULT_TILING == I915_TILING_X return I915_TILING_X; #else /* Try to avoid hitting the Y-tiling GTT mapping bug on 855GM */ if (sna->kgem.gen == 021) return I915_TILING_X; /* Only on later generations was the render pipeline * more flexible than the BLT. So on gen2/3, prefer to * keep large objects accessible through the BLT. */ if (sna->kgem.gen < 040 && (pixmap->drawable.width > sna->render.max_3d_size || pixmap->drawable.height > sna->render.max_3d_size)) return I915_TILING_X; if (sna_damage_is_all(&sna_pixmap(pixmap)->cpu_damage, pixmap->drawable.width, pixmap->drawable.height)) { DBG(("%s: entire source is damaged, using Y-tiling\n", __FUNCTION__)); sna_damage_destroy(&sna_pixmap(priv)->gpu_damage); return I915_TILING_Y; } return I915_TILING_Y; #endif } pure static uint32_t sna_pixmap_default_tiling(struct sna *sna, PixmapPtr pixmap) { /* Also adjust tiling if it is not supported or likely to * slow us down, */ return kgem_choose_tiling(&sna->kgem, default_tiling(sna, pixmap), pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel); } struct kgem_bo *sna_pixmap_change_tiling(PixmapPtr pixmap, uint32_t tiling) { struct sna_pixmap *priv = sna_pixmap(pixmap); struct sna *sna = to_sna_from_pixmap(pixmap); struct kgem_bo *bo; BoxRec box; DBG(("%s: changing tiling %d -> %d for %dx%d pixmap\n", __FUNCTION__, priv->gpu_bo->tiling, tiling, pixmap->drawable.width, pixmap->drawable.height)); assert(priv->gpu_damage == NULL || priv->gpu_bo); if (priv->pinned) { DBG(("%s: can't convert pinned bo\n", __FUNCTION__)); return NULL; } if (wedged(sna)) { DBG(("%s: can't convert bo, wedged\n", __FUNCTION__)); return NULL; } assert_pixmap_damage(pixmap); assert(!priv->move_to_gpu); bo = kgem_create_2d(&sna->kgem, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, tiling, 0); if (bo == NULL) { DBG(("%s: allocation failed\n", __FUNCTION__)); return NULL; } box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; if (!sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, priv->gpu_bo, 0, 0, &pixmap->drawable, bo, 0, 0, &box, 1, 0)) { DBG(("%s: copy failed\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, bo); return NULL; } sna_pixmap_unmap(pixmap, priv); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); return priv->gpu_bo = bo; } static inline void sna_set_pixmap(PixmapPtr pixmap, struct sna_pixmap *sna) { ((void **)__get_private(pixmap, sna_pixmap_key))[1] = sna; assert(sna_pixmap(pixmap) == sna); } static struct sna_pixmap * _sna_pixmap_init(struct sna_pixmap *priv, PixmapPtr pixmap) { list_init(&priv->flush_list); list_init(&priv->cow_list); priv->source_count = SOURCE_BIAS; priv->pixmap = pixmap; return priv; } static struct sna_pixmap * _sna_pixmap_reset(PixmapPtr pixmap) { struct sna_pixmap *priv; assert(pixmap->drawable.type == DRAWABLE_PIXMAP); assert(pixmap->drawable.class == 0); assert(pixmap->drawable.x == 0); assert(pixmap->drawable.y == 0); priv = sna_pixmap(pixmap); assert(priv != NULL); memset(priv, 0, sizeof(*priv)); return _sna_pixmap_init(priv, pixmap); } static struct sna_pixmap *sna_pixmap_attach(PixmapPtr pixmap) { struct sna_pixmap *priv; priv = calloc(1, sizeof(*priv)); if (!priv) return NULL; sna_set_pixmap(pixmap, priv); return _sna_pixmap_init(priv, pixmap); } struct sna_pixmap *sna_pixmap_attach_to_bo(PixmapPtr pixmap, struct kgem_bo *bo) { struct sna_pixmap *priv; assert(bo); assert(bo->proxy == NULL); assert(bo->unique_id); priv = sna_pixmap_attach(pixmap); if (!priv) return NULL; DBG(("%s: attaching %s handle=%d to pixmap=%ld\n", __FUNCTION__, bo->snoop ? "CPU" : "GPU", bo->handle, pixmap->drawable.serialNumber)); assert(!priv->mapped); assert(!priv->move_to_gpu); if (bo->snoop) { priv->cpu_bo = bo; sna_damage_all(&priv->cpu_damage, pixmap); } else { priv->gpu_bo = bo; sna_damage_all(&priv->gpu_damage, pixmap); } return priv; } static int bits_per_pixel(int depth) { switch (depth) { case 1: return 1; case 4: case 8: return 8; case 15: case 16: return 16; case 24: case 30: case 32: return 32; default: return 0; } } static PixmapPtr create_pixmap(struct sna *sna, ScreenPtr screen, int width, int height, int depth, unsigned usage_hint) { PixmapPtr pixmap; size_t datasize; size_t stride; int base, bpp; bpp = bits_per_pixel(depth); if (bpp == 0) return NullPixmap; stride = ((width * bpp + FB_MASK) >> FB_SHIFT) * sizeof(FbBits); if (stride / 4 > 32767 || height > 32767) return NullPixmap; datasize = height * stride; base = screen->totalPixmapSize; if (datasize && base & 15) { int adjust = 16 - (base & 15); base += adjust; datasize += adjust; } DBG(("%s: allocating pixmap %dx%d, depth=%d, size=%ld\n", __FUNCTION__, width, height, depth, (long)datasize)); pixmap = AllocatePixmap(screen, datasize); if (!pixmap) return NullPixmap; ((void **)__get_private(pixmap, sna_pixmap_key))[0] = sna; assert(to_sna_from_pixmap(pixmap) == sna); pixmap->drawable.type = DRAWABLE_PIXMAP; pixmap->drawable.class = 0; pixmap->drawable.pScreen = screen; pixmap->drawable.depth = depth; pixmap->drawable.bitsPerPixel = bpp; pixmap->drawable.id = 0; pixmap->drawable.serialNumber = NEXT_SERIAL_NUMBER; pixmap->drawable.x = 0; pixmap->drawable.y = 0; pixmap->drawable.width = width; pixmap->drawable.height = height; pixmap->devKind = stride; pixmap->refcnt = 1; pixmap->devPrivate.ptr = datasize ? (char *)pixmap + base : NULL; #ifdef COMPOSITE pixmap->screen_x = 0; pixmap->screen_y = 0; #endif pixmap->usage_hint = usage_hint; #if DEBUG_MEMORY sna->debug_memory.pixmap_allocs++; #endif DBG(("%s: serial=%ld, usage=%d, %dx%d\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->usage_hint, pixmap->drawable.width, pixmap->drawable.height)); return pixmap; } static PixmapPtr __pop_freed_pixmap(struct sna *sna) { PixmapPtr pixmap; assert(sna->freed_pixmap); pixmap = sna->freed_pixmap; sna->freed_pixmap = pixmap->devPrivate.ptr; assert(pixmap->refcnt == 0); assert(sna_pixmap(pixmap)); assert(sna_pixmap(pixmap)->header); #if DEBUG_MEMORY sna->debug_memory.pixmap_cached--; #endif return pixmap; } inline static PixmapPtr create_pixmap_hdr(struct sna *sna, ScreenPtr screen, int width, int height, int depth, int usage, struct sna_pixmap **priv) { PixmapPtr pixmap; if (sna->freed_pixmap == NULL) { pixmap = create_pixmap(sna, screen, 0, 0, depth, usage); if (pixmap == NullPixmap) return NullPixmap; *priv = sna_pixmap_attach(pixmap); if (!*priv) { FreePixmap(pixmap); return NullPixmap; } } else { pixmap = __pop_freed_pixmap(sna); *priv = _sna_pixmap_reset(pixmap); assert(pixmap->drawable.type == DRAWABLE_PIXMAP); assert(pixmap->drawable.class == 0); assert(pixmap->drawable.pScreen == screen); assert(pixmap->drawable.x == 0); assert(pixmap->drawable.y == 0); pixmap->drawable.id = 0; pixmap->drawable.depth = depth; pixmap->drawable.bitsPerPixel = bits_per_pixel(depth); pixmap->drawable.serialNumber = NEXT_SERIAL_NUMBER; pixmap->devKind = 0; pixmap->devPrivate.ptr = NULL; #ifdef COMPOSITE pixmap->screen_x = 0; pixmap->screen_y = 0; #endif #if DEBUG_MEMORY sna->debug_memory.pixmap_allocs++; #endif pixmap->refcnt = 1; } DBG(("%s: pixmap=%ld, width=%d, height=%d, usage=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, width, height, usage)); pixmap->drawable.width = width; pixmap->drawable.height = height; pixmap->usage_hint = usage; (*priv)->header = true; return pixmap; } static PixmapPtr sna_pixmap_create_shm(ScreenPtr screen, int width, int height, int depth, char *addr) { struct sna *sna = to_sna_from_screen(screen); int bpp = bits_per_pixel(depth); int pitch = PixmapBytePad(width, depth); struct sna_pixmap *priv; PixmapPtr pixmap; DBG(("%s(%dx%d, depth=%d, bpp=%d, pitch=%d)\n", __FUNCTION__, width, height, depth, bpp, pitch)); if (wedged(sna) || bpp == 0 || pitch*height < 4096) { fallback: pixmap = sna_pixmap_create_unattached(screen, 0, 0, depth); if (pixmap == NULL) return NULL; if (!screen->ModifyPixmapHeader(pixmap, width, height, depth, bpp, pitch, addr)) { screen->DestroyPixmap(pixmap); return NULL; } return pixmap; } pixmap = create_pixmap_hdr(sna, screen, width, height, depth, 0, &priv); if (pixmap == NullPixmap) { DBG(("%s: allocation failed\n", __FUNCTION__)); goto fallback; } priv->cpu_bo = kgem_create_map(&sna->kgem, addr, pitch*height, false); if (priv->cpu_bo == NULL) { DBG(("%s: mapping SHM segment failed\n", __FUNCTION__)); sna_pixmap_destroy(pixmap); goto fallback; } priv->cpu_bo->pitch = pitch; kgem_bo_mark_unreusable(priv->cpu_bo); sna_accel_watch_flush(sna, 1); #ifdef DEBUG_MEMORY sna->debug_memory.cpu_bo_allocs++; sna->debug_memory.cpu_bo_bytes += kgem_bo_size(priv->cpu_bo); #endif /* Be wary as we cannot cache SHM Pixmap in our freed cache */ priv->header = false; priv->cpu = true; priv->shm = true; priv->stride = pitch; priv->ptr = MAKE_STATIC_PTR(addr); sna_damage_all(&priv->cpu_damage, pixmap); pixmap->devKind = pitch; pixmap->devPrivate.ptr = addr; DBG(("%s: serial=%ld, %dx%d, usage=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height, pixmap->usage_hint)); return pixmap; } PixmapPtr sna_pixmap_create_unattached(ScreenPtr screen, int width, int height, int depth) { return create_pixmap(to_sna_from_screen(screen), screen, width, height, depth, -1); } static PixmapPtr sna_pixmap_create_scratch(ScreenPtr screen, int width, int height, int depth, uint32_t tiling) { struct sna *sna = to_sna_from_screen(screen); struct sna_pixmap *priv; PixmapPtr pixmap; int bpp; DBG(("%s(%d, %d, %d, tiling=%d)\n", __FUNCTION__, width, height, depth, tiling)); bpp = bits_per_pixel(depth); if (tiling == I915_TILING_Y && (sna->render.prefer_gpu & PREFER_GPU_RENDER) == 0) tiling = I915_TILING_X; if (tiling == I915_TILING_Y && (width > sna->render.max_3d_size || height > sna->render.max_3d_size)) tiling = I915_TILING_X; tiling = kgem_choose_tiling(&sna->kgem, tiling, width, height, bpp); /* you promise never to access this via the cpu... */ pixmap = create_pixmap_hdr(sna, screen, width, height, depth, CREATE_PIXMAP_USAGE_SCRATCH, &priv); if (pixmap == NullPixmap) return NullPixmap; priv->stride = PixmapBytePad(width, depth); priv->gpu_bo = kgem_create_2d(&sna->kgem, width, height, bpp, tiling, CREATE_TEMPORARY); if (priv->gpu_bo == NULL) { free(priv); FreePixmap(pixmap); return NullPixmap; } sna_damage_all(&priv->gpu_damage, pixmap); assert(to_sna_from_pixmap(pixmap) == sna); assert(pixmap->drawable.pScreen == screen); assert(pixmap->refcnt == 1); DBG(("%s: serial=%ld, %dx%d, usage=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height, pixmap->usage_hint)); return pixmap; } #ifdef CREATE_PIXMAP_USAGE_SHARED static Bool sna_share_pixmap_backing(PixmapPtr pixmap, ScreenPtr slave, void **fd_handle) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; int fd; DBG(("%s: pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); priv = sna_pixmap_move_to_gpu(pixmap, MOVE_READ | MOVE_WRITE | __MOVE_DRI | __MOVE_PRIME | __MOVE_FORCE); if (priv == NULL) return FALSE; assert(!priv->shm); assert(priv->gpu_bo); assert(priv->stride); /* XXX negotiate format and stride restrictions */ if (priv->gpu_bo->tiling != I915_TILING_NONE || priv->gpu_bo->pitch & 255) { struct kgem_bo *bo; BoxRec box; DBG(("%s: removing tiling %d, and aligning pitch %d for %dx%d pixmap=%ld\n", __FUNCTION__, priv->gpu_bo->tiling, priv->gpu_bo->pitch, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.serialNumber)); if (priv->pinned) { DBG(("%s: can't convert pinned %x bo\n", __FUNCTION__, priv->pinned)); return FALSE; } assert_pixmap_damage(pixmap); bo = kgem_create_2d(&sna->kgem, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, I915_TILING_NONE, CREATE_GTT_MAP | CREATE_PRIME | CREATE_EXACT); if (bo == NULL) { DBG(("%s: allocation failed\n", __FUNCTION__)); return FALSE; } box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; assert(!wedged(sna)); /* XXX */ if (!sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, priv->gpu_bo, 0, 0, &pixmap->drawable, bo, 0, 0, &box, 1, 0)) { DBG(("%s: copy failed\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, bo); return FALSE; } sna_pixmap_unmap(pixmap, priv); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = bo; } assert(priv->gpu_bo->tiling == I915_TILING_NONE); assert((priv->gpu_bo->pitch & 255) == 0); /* And export the bo->pitch via pixmap->devKind */ if (!priv->mapped) { void *ptr; ptr = kgem_bo_map__async(&sna->kgem, priv->gpu_bo); if (ptr == NULL) return FALSE; pixmap->devPrivate.ptr = ptr; pixmap->devKind = priv->gpu_bo->pitch; priv->mapped = ptr == MAP(priv->gpu_bo->map__cpu) ? MAPPED_CPU : MAPPED_GTT; } assert_pixmap_map(pixmap, priv); fd = kgem_bo_export_to_prime(&sna->kgem, priv->gpu_bo); if (fd == -1) return FALSE; priv->pinned |= PIN_PRIME; *fd_handle = (void *)(intptr_t)fd; return TRUE; } static Bool sna_set_shared_pixmap_backing(PixmapPtr pixmap, void *fd_handle) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; struct kgem_bo *bo; DBG(("%s: pixmap=%ld, size=%dx%d, depth=%d/%d, stride=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.depth, pixmap->drawable.bitsPerPixel, pixmap->devKind)); priv = sna_pixmap(pixmap); if (priv == NULL) return FALSE; assert(!priv->pinned); assert(priv->gpu_bo == NULL); assert(priv->cpu_bo == NULL); assert(priv->cpu_damage == NULL); assert(priv->gpu_damage == NULL); bo = kgem_create_for_prime(&sna->kgem, (intptr_t)fd_handle, pixmap->devKind * pixmap->drawable.height); if (bo == NULL) return FALSE; sna_damage_all(&priv->gpu_damage, pixmap); bo->pitch = pixmap->devKind; priv->stride = pixmap->devKind; assert(!priv->mapped); priv->gpu_bo = bo; priv->pinned |= PIN_PRIME; close((intptr_t)fd_handle); return TRUE; } static PixmapPtr sna_create_pixmap_shared(struct sna *sna, ScreenPtr screen, int width, int height, int depth) { PixmapPtr pixmap; struct sna_pixmap *priv; DBG(("%s: width=%d, height=%d, depth=%d\n", __FUNCTION__, width, height, depth)); /* Create a stub to be attached later */ pixmap = create_pixmap_hdr(sna, screen, width, height, depth, 0, &priv); if (pixmap == NullPixmap) return NullPixmap; assert(!priv->mapped); priv->stride = 0; priv->create = 0; if (width|height) { priv->gpu_bo = kgem_create_2d(&sna->kgem, width, height, pixmap->drawable.bitsPerPixel, I915_TILING_NONE, CREATE_GTT_MAP | CREATE_PRIME | CREATE_EXACT); if (priv->gpu_bo == NULL) { free(priv); FreePixmap(pixmap); return NullPixmap; } /* minimal interface for sharing is linear, 256 byte pitch */ assert(priv->gpu_bo->tiling == I915_TILING_NONE); assert((priv->gpu_bo->pitch & 255) == 0); pixmap->devPrivate.ptr = kgem_bo_map__async(&sna->kgem, priv->gpu_bo); if (pixmap->devPrivate.ptr == NULL) { kgem_bo_destroy(&sna->kgem, priv->gpu_bo); free(priv); FreePixmap(pixmap); return FALSE; } pixmap->devKind = priv->gpu_bo->pitch; priv->stride = priv->gpu_bo->pitch; priv->mapped = pixmap->devPrivate.ptr == MAP(priv->gpu_bo->map__cpu) ? MAPPED_CPU : MAPPED_GTT; assert_pixmap_map(pixmap, priv); sna_damage_all(&priv->gpu_damage, pixmap); } return pixmap; } #endif static PixmapPtr sna_create_pixmap(ScreenPtr screen, int width, int height, int depth, unsigned int usage) { struct sna *sna = to_sna_from_screen(screen); PixmapPtr pixmap; struct sna_pixmap *priv; unsigned flags; int pad; void *ptr; DBG(("%s(%d, %d, %d, usage=%x)\n", __FUNCTION__, width, height, depth, usage)); #ifdef CREATE_PIXMAP_USAGE_SHARED if (usage == CREATE_PIXMAP_USAGE_SHARED) return sna_create_pixmap_shared(sna, screen, width, height, depth); #endif if ((width|height) == 0) { usage = -1; goto fallback; } assert(width && height); flags = kgem_can_create_2d(&sna->kgem, width, height, depth); if (flags == 0) { DBG(("%s: can not use GPU, just creating shadow\n", __FUNCTION__)); goto fallback; } if (unlikely((sna->render.prefer_gpu & PREFER_GPU_RENDER) == 0)) flags &= ~KGEM_CAN_CREATE_GPU; if (wedged(sna)) flags &= ~KGEM_CAN_CREATE_GTT; DBG(("%s: usage=%d, flags=%x\n", __FUNCTION__, usage, flags)); switch (usage) { case CREATE_PIXMAP_USAGE_SCRATCH: if (flags & KGEM_CAN_CREATE_GPU) return sna_pixmap_create_scratch(screen, width, height, depth, I915_TILING_X); else goto fallback; case SNA_CREATE_SCRATCH: if (flags & (KGEM_CAN_CREATE_CPU | KGEM_CAN_CREATE_GPU)) return sna_pixmap_create_scratch(screen, width, height, depth, I915_TILING_Y); else return NullPixmap; } if (usage == CREATE_PIXMAP_USAGE_GLYPH_PICTURE) flags &= ~KGEM_CAN_CREATE_GPU; if (usage == CREATE_PIXMAP_USAGE_BACKING_PIXMAP) usage = 0; pad = PixmapBytePad(width, depth); if (pad * height < 4096) { DBG(("%s: small buffer [%d], attaching to shadow pixmap\n", __FUNCTION__, pad * height)); pixmap = create_pixmap(sna, screen, width, height, depth, usage); if (pixmap == NullPixmap) return NullPixmap; ptr = MAKE_STATIC_PTR(pixmap->devPrivate.ptr); pad = pixmap->devKind; flags &= ~(KGEM_CAN_CREATE_GPU | KGEM_CAN_CREATE_CPU); priv = sna_pixmap_attach(pixmap); if (priv == NULL) { free(pixmap); goto fallback; } } else { DBG(("%s: creating GPU pixmap %dx%d, stride=%d, flags=%x\n", __FUNCTION__, width, height, pad, flags)); pixmap = create_pixmap_hdr(sna, screen, width, height, depth, usage, &priv); if (pixmap == NullPixmap) return NullPixmap; ptr = NULL; } priv->stride = pad; priv->create = flags; priv->ptr = ptr; assert(to_sna_from_pixmap(pixmap) == sna); assert(pixmap->drawable.pScreen == screen); assert(pixmap->refcnt == 1); DBG(("%s: serial=%ld, %dx%d, usage=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height, pixmap->usage_hint)); return pixmap; fallback: return create_pixmap(sna, screen, width, height, depth, usage); } void sna_add_flush_pixmap(struct sna *sna, struct sna_pixmap *priv, struct kgem_bo *bo) { DBG(("%s: marking pixmap=%ld for flushing\n", __FUNCTION__, priv->pixmap->drawable.serialNumber)); assert(bo); assert(bo->flush); assert(priv->gpu_damage == NULL || priv->gpu_bo); list_move(&priv->flush_list, &sna->flush_pixmaps); if (bo->exec == NULL && sna->kgem.nbatch && kgem_is_idle(&sna->kgem)) { DBG(("%s: new flush bo, flushing before\n", __FUNCTION__)); _kgem_submit(&sna->kgem); } } static void __sna_free_pixmap(struct sna *sna, PixmapPtr pixmap, struct sna_pixmap *priv) { DBG(("%s(pixmap=%ld)\n", __FUNCTION__, pixmap->drawable.serialNumber)); list_del(&priv->flush_list); assert(priv->gpu_damage == NULL); assert(priv->cpu_damage == NULL); __sna_pixmap_free_cpu(sna, priv); if (priv->flush) sna_accel_watch_flush(sna, -1); if (priv->header) { assert(pixmap->drawable.pScreen == sna->scrn->pScreen); assert(!priv->shm); pixmap->devPrivate.ptr = sna->freed_pixmap; sna->freed_pixmap = pixmap; #if DEBUG_MEMORY sna->debug_memory.pixmap_cached++; #endif } else { free(priv); FreePixmap(pixmap); } } static Bool sna_destroy_pixmap(PixmapPtr pixmap) { struct sna *sna; struct sna_pixmap *priv; assert(pixmap->refcnt > 0); if (--pixmap->refcnt) return TRUE; #if DEBUG_MEMORY to_sna_from_pixmap(pixmap)->debug_memory.pixmap_allocs--; #endif priv = sna_pixmap(pixmap); DBG(("%s: pixmap=%ld, attached?=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, priv != NULL)); if (priv == NULL) { FreePixmap(pixmap); return TRUE; } assert_pixmap_damage(pixmap); sna = to_sna_from_pixmap(pixmap); sna_damage_destroy(&priv->gpu_damage); sna_damage_destroy(&priv->cpu_damage); list_del(&priv->cow_list); if (priv->cow) { struct sna_cow *cow = COW(priv->cow); DBG(("%s: pixmap=%ld discarding cow, refcnt=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, cow->refcnt)); assert(cow->refcnt); if (!--cow->refcnt) free(cow); priv->cow = NULL; } else kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); if (priv->move_to_gpu) (void)priv->move_to_gpu(sna, priv, 0); /* Always release the gpu bo back to the lower levels of caching */ if (priv->gpu_bo) { sna_pixmap_unmap(pixmap, priv); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = NULL; } if (priv->shm && kgem_bo_is_busy(priv->cpu_bo)) { DBG(("%s: deferring release of active SHM pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); sna_add_flush_pixmap(sna, priv, priv->cpu_bo); kgem_bo_submit(&sna->kgem, priv->cpu_bo); /* XXX ShmDetach */ } else __sna_free_pixmap(sna, pixmap, priv); return TRUE; } void sna_pixmap_destroy(PixmapPtr pixmap) { assert(pixmap->refcnt == 1); assert(sna_pixmap(pixmap) == NULL || sna_pixmap(pixmap)->header == true); sna_destroy_pixmap(pixmap); } static inline bool has_coherent_map(struct sna *sna, struct kgem_bo *bo, unsigned flags) { assert(bo); if (kgem_bo_mapped(&sna->kgem, bo)) return true; if (bo->tiling == I915_TILING_Y) return false; return kgem_bo_can_map__cpu(&sna->kgem, bo, flags & MOVE_WRITE); } static inline bool has_coherent_ptr(struct sna *sna, struct sna_pixmap *priv, unsigned flags) { if (priv == NULL) return true; if (flags & MOVE_ASYNC_HINT) { /* Not referencing the pointer itself, so do not care */ return true; } if (!priv->mapped) { if (!priv->cpu_bo) return true; assert(!priv->cpu_bo->needs_flush); assert(priv->pixmap->devKind == priv->cpu_bo->pitch); return priv->pixmap->devPrivate.ptr == MAP(priv->cpu_bo->map__cpu); } assert(!priv->move_to_gpu || (flags & MOVE_WRITE) == 0); assert_pixmap_map(priv->pixmap, priv); assert(priv->pixmap->devKind == priv->gpu_bo->pitch); if (priv->pixmap->devPrivate.ptr == MAP(priv->gpu_bo->map__cpu)) { assert(priv->mapped == MAPPED_CPU); if (priv->gpu_bo->tiling != I915_TILING_NONE) return false; return flags & MOVE_READ || kgem_bo_can_map__cpu(&sna->kgem, priv->gpu_bo, flags & MOVE_WRITE); } if (priv->pixmap->devPrivate.ptr == MAP(priv->gpu_bo->map__gtt)) { assert(priv->mapped == MAPPED_GTT); if (priv->gpu_bo->tiling == I915_TILING_Y && sna->kgem.gen == 0x21) return false; return true; } return false; } static inline bool pixmap_inplace(struct sna *sna, PixmapPtr pixmap, struct sna_pixmap *priv, unsigned flags) { if (FORCE_INPLACE) return FORCE_INPLACE > 0; if (wedged(sna) && !priv->pinned) { DBG(("%s: no, wedged and unpinned; pull pixmap back to CPU\n", __FUNCTION__)); return false; } if (priv->move_to_gpu && flags & MOVE_WRITE) return false; if (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo)) { if ((flags & (MOVE_WRITE | MOVE_READ)) == (MOVE_WRITE | MOVE_READ)) { DBG(("%s: no, GPU bo is busy\n", __FUNCTION__)); return false; } if ((flags & MOVE_READ) == 0) { DBG(("%s: %s, GPU bo is busy, but not reading\n", __FUNCTION__, priv->pinned ? "no" : "yes")); return !priv->pinned; } } if (priv->mapped) { DBG(("%s: %s, already mapped\n", __FUNCTION__, has_coherent_map(sna, priv->gpu_bo, flags) ? "yes" : "no")); return has_coherent_map(sna, priv->gpu_bo, flags); } if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) { DBG(("%s: yes, has CPU bo and is active on CPU\n", __FUNCTION__)); return true; } if (priv->cpu_bo && priv->cpu) { DBG(("%s: no, has CPU bo and was last active on CPU, presume future CPU activity\n", __FUNCTION__)); return false; } if (flags & MOVE_READ && (priv->cpu || priv->cpu_damage || priv->gpu_damage == NULL)) { DBG(("%s:, no, reading and has CPU damage\n", __FUNCTION__)); return false; } return (priv->stride * pixmap->drawable.height >> 12) > sna->kgem.half_cpu_cache_pages; } static bool sna_pixmap_alloc_gpu(struct sna *sna, PixmapPtr pixmap, struct sna_pixmap *priv, unsigned flags) { uint32_t tiling; /* Use tiling by default, but disable per user request */ if (pixmap->usage_hint == SNA_CREATE_FB && (sna->flags & SNA_LINEAR_FB) == 0) { flags |= CREATE_SCANOUT; tiling = kgem_choose_tiling(&sna->kgem, -I915_TILING_X, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel); } else tiling = sna_pixmap_default_tiling(sna, pixmap); DBG(("%s: pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); priv->gpu_bo = kgem_create_2d(&sna->kgem, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, tiling, flags); return priv->gpu_bo != NULL; } static bool sna_pixmap_create_mappable_gpu(PixmapPtr pixmap, bool can_replace) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv = sna_pixmap(pixmap); if (wedged(sna)) goto out; if ((priv->create & KGEM_CAN_CREATE_GTT) == 0) goto out; assert_pixmap_damage(pixmap); if (can_replace && priv->gpu_bo && (!kgem_bo_can_map(&sna->kgem, priv->gpu_bo) || __kgem_bo_is_busy(&sna->kgem, priv->gpu_bo))) { if (priv->pinned) return false; DBG(("%s: discard busy GPU bo\n", __FUNCTION__)); sna_pixmap_free_gpu(sna, priv); } if (priv->gpu_bo == NULL) { assert_pixmap_damage(pixmap); assert(priv->gpu_damage == NULL); sna_pixmap_alloc_gpu(sna, pixmap, priv, CREATE_GTT_MAP | CREATE_INACTIVE); } out: if (priv->gpu_bo == NULL) return false; return (kgem_bo_can_map(&sna->kgem, priv->gpu_bo) && !kgem_bo_is_busy(priv->gpu_bo)); } static inline bool gpu_bo_download(struct sna *sna, struct sna_pixmap *priv, int n, const BoxRec *box, bool idle) { char *src; if (!USE_INPLACE) return false; switch (priv->gpu_bo->tiling) { case I915_TILING_Y: return false; case I915_TILING_X: if (!sna->kgem.memcpy_from_tiled_x) return false; default: break; } if (!kgem_bo_can_map__cpu(&sna->kgem, priv->gpu_bo, FORCE_FULL_SYNC)) return false; if (idle) { if (__kgem_bo_is_busy(&sna->kgem, priv->gpu_bo)) return false; if (priv->cpu_bo && __kgem_bo_is_busy(&sna->kgem, priv->cpu_bo)) return false; } src = kgem_bo_map__cpu(&sna->kgem, priv->gpu_bo); if (src == NULL) return false; kgem_bo_sync__cpu_full(&sna->kgem, priv->gpu_bo, FORCE_FULL_SYNC); if (priv->cpu_bo) kgem_bo_sync__cpu(&sna->kgem, priv->cpu_bo); assert(has_coherent_ptr(sna, priv, MOVE_WRITE)); if (sigtrap_get()) return false; if (priv->gpu_bo->tiling) { int bpp = priv->pixmap->drawable.bitsPerPixel; void *dst = priv->pixmap->devPrivate.ptr; int dst_pitch = priv->pixmap->devKind; DBG(("%s: download through a tiled CPU map\n", __FUNCTION__)); do { DBG(("%s: box (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); memcpy_from_tiled_x(&sna->kgem, src, dst, bpp, priv->gpu_bo->pitch, dst_pitch, box->x1, box->y1, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); } else { int bpp = priv->pixmap->drawable.bitsPerPixel; void *dst = priv->pixmap->devPrivate.ptr; int dst_pitch = priv->pixmap->devKind; DBG(("%s: download through a linear CPU map\n", __FUNCTION__)); do { DBG(("%s: box (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); memcpy_blt(src, dst, bpp, priv->gpu_bo->pitch, dst_pitch, box->x1, box->y1, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); } sigtrap_put(); return true; } static inline bool cpu_bo_download(struct sna *sna, struct sna_pixmap *priv, int n, const BoxRec *box) { if (DBG_NO_CPU_DOWNLOAD) return false; if (wedged(sna)) return false; if (priv->cpu_bo == NULL || !sna->kgem.can_blt_cpu) return false; if (!kgem_bo_is_busy(priv->gpu_bo) && !kgem_bo_is_busy(priv->cpu_bo)) { /* Is it worth detiling? */ assert(box[0].y1 < box[n-1].y2); if (kgem_bo_can_map(&sna->kgem, priv->gpu_bo) && (box[n-1].y2 - box[0].y1 - 1) * priv->gpu_bo->pitch < 4096) { DBG(("%s: no, tiny transfer (height=%d, pitch=%d) expect to read inplace\n", __FUNCTION__, box[n-1].y2-box[0].y1, priv->gpu_bo->pitch)); return false; } } DBG(("%s: using GPU write to CPU bo for download from GPU\n", __FUNCTION__)); return sna->render.copy_boxes(sna, GXcopy, &priv->pixmap->drawable, priv->gpu_bo, 0, 0, &priv->pixmap->drawable, priv->cpu_bo, 0, 0, box, n, COPY_LAST); } static void download_boxes(struct sna *sna, struct sna_pixmap *priv, int n, const BoxRec *box) { bool ok; DBG(("%s: nbox=%d\n", __FUNCTION__, n)); ok = gpu_bo_download(sna, priv, n, box, true); if (!ok) ok = cpu_bo_download(sna, priv, n, box); if (!ok) ok = gpu_bo_download(sna, priv, n, box, false); if (!ok) { if (priv->cpu_bo) kgem_bo_sync__cpu(&sna->kgem, priv->cpu_bo); assert(priv->mapped == MAPPED_NONE); assert(has_coherent_ptr(sna, priv, MOVE_WRITE)); sna_read_boxes(sna, priv->pixmap, priv->gpu_bo, box, n); } } static inline bool use_cpu_bo_for_upload(struct sna *sna, struct sna_pixmap *priv, unsigned flags) { if (DBG_NO_CPU_UPLOAD) return false; if (wedged(sna)) return false; if (priv->cpu_bo == NULL) return false; DBG(("%s? flags=%x, gpu busy?=%d, cpu busy?=%d\n", __FUNCTION__, flags, kgem_bo_is_busy(priv->gpu_bo), kgem_bo_is_busy(priv->cpu_bo))); if (!priv->cpu) return true; if (flags & (MOVE_WRITE | MOVE_ASYNC_HINT)) return true; if (priv->gpu_bo->tiling) return true; return kgem_bo_is_busy(priv->gpu_bo) || kgem_bo_is_busy(priv->cpu_bo); } bool sna_pixmap_undo_cow(struct sna *sna, struct sna_pixmap *priv, unsigned flags) { struct sna_cow *cow = COW(priv->cow); DBG(("%s: pixmap=%ld, handle=%d [refcnt=%d], cow refcnt=%d, flags=%x\n", __FUNCTION__, priv->pixmap->drawable.serialNumber, priv->gpu_bo->handle, priv->gpu_bo->refcnt, cow->refcnt, flags)); assert(priv->gpu_bo == cow->bo); assert(cow->refcnt); if (flags && (flags & MOVE_WRITE) == 0 && IS_COW_OWNER(priv->cow)) return true; if (!IS_COW_OWNER(priv->cow)) list_del(&priv->cow_list); if (!--cow->refcnt) { DBG(("%s: freeing cow\n", __FUNCTION__)); assert(list_is_empty(&cow->list)); free(cow); } else if (IS_COW_OWNER(priv->cow) && priv->pinned) { PixmapPtr pixmap = priv->pixmap; struct kgem_bo *bo; BoxRec box; DBG(("%s: copying the Holy cow\n", __FUNCTION__)); box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; bo = kgem_create_2d(&sna->kgem, box.x2, box.y2, pixmap->drawable.bitsPerPixel, sna_pixmap_default_tiling(sna, pixmap), 0); if (bo == NULL) { cow->refcnt++; DBG(("%s: allocation failed\n", __FUNCTION__)); return false; } if (!sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, priv->gpu_bo, 0, 0, &pixmap->drawable, bo, 0, 0, &box, 1, 0)) { DBG(("%s: copy failed\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, bo); cow->refcnt++; return false; } assert(!list_is_empty(&cow->list)); while (!list_is_empty(&cow->list)) { struct sna_pixmap *clone; clone = list_first_entry(&cow->list, struct sna_pixmap, cow_list); list_del(&clone->cow_list); assert(clone->gpu_bo == cow->bo); sna_pixmap_unmap(clone->pixmap, clone); kgem_bo_destroy(&sna->kgem, clone->gpu_bo); clone->gpu_bo = kgem_bo_reference(bo); } cow->bo = bo; kgem_bo_destroy(&sna->kgem, bo); } else { struct kgem_bo *bo = NULL; if (flags & MOVE_READ) { PixmapPtr pixmap = priv->pixmap; unsigned create, tiling; BoxRec box; DBG(("%s: copying cow\n", __FUNCTION__)); box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; if (flags & __MOVE_PRIME) { create = CREATE_GTT_MAP | CREATE_PRIME | CREATE_EXACT; tiling = I915_TILING_NONE; } else { create = 0; tiling = sna_pixmap_default_tiling(sna, pixmap); } bo = kgem_create_2d(&sna->kgem, box.x2, box.y2, pixmap->drawable.bitsPerPixel, tiling, create); if (bo == NULL) { cow->refcnt++; DBG(("%s: allocation failed\n", __FUNCTION__)); return false; } if (!sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, priv->gpu_bo, 0, 0, &pixmap->drawable, bo, 0, 0, &box, 1, 0)) { DBG(("%s: copy failed\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, bo); cow->refcnt++; return false; } } assert(priv->gpu_bo); sna_pixmap_unmap(priv->pixmap, priv); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = bo; } priv->cow = NULL; return true; } static bool sna_pixmap_make_cow(struct sna *sna, struct sna_pixmap *src_priv, struct sna_pixmap *dst_priv) { struct sna_cow *cow; assert(src_priv->gpu_bo); if (!USE_COW) return false; if (src_priv->gpu_bo->proxy) return false; DBG(("%s: make cow src=%ld, dst=%ld, handle=%d (already cow? src=%d, dst=%d)\n", __FUNCTION__, src_priv->pixmap->drawable.serialNumber, dst_priv->pixmap->drawable.serialNumber, src_priv->gpu_bo->handle, src_priv->cow ? IS_COW_OWNER(src_priv->cow) ? 1 : -1 : 0, dst_priv->cow ? IS_COW_OWNER(dst_priv->cow) ? 1 : -1 : 0)); if (dst_priv->pinned) { DBG(("%s: can't cow, dst_pinned=%x\n", __FUNCTION__, dst_priv->pinned)); return false; } assert(dst_priv->move_to_gpu == NULL); assert(!dst_priv->flush); assert(list_is_empty(&dst_priv->cow_list)); cow = COW(src_priv->cow); if (cow == NULL) { cow = malloc(sizeof(*cow)); if (cow == NULL) return false; list_init(&cow->list); cow->bo = src_priv->gpu_bo; cow->refcnt = 1; DBG(("%s: moo! attaching source cow to pixmap=%ld, handle=%d\n", __FUNCTION__, src_priv->pixmap->drawable.serialNumber, cow->bo->handle)); src_priv->cow = MAKE_COW_OWNER(cow); } if (cow == COW(dst_priv->cow)) { assert(dst_priv->gpu_bo == cow->bo); return true; } if (dst_priv->cow) sna_pixmap_undo_cow(sna, dst_priv, 0); if (dst_priv->gpu_bo) { sna_pixmap_unmap(dst_priv->pixmap, dst_priv); kgem_bo_destroy(&sna->kgem, dst_priv->gpu_bo); } assert(!dst_priv->mapped); dst_priv->gpu_bo = kgem_bo_reference(cow->bo); dst_priv->cow = cow; list_add(&dst_priv->cow_list, &cow->list); cow->refcnt++; DBG(("%s: moo! attaching clone to pixmap=%ld (source=%ld, handle=%d)\n", __FUNCTION__, dst_priv->pixmap->drawable.serialNumber, src_priv->pixmap->drawable.serialNumber, cow->bo->handle)); return true; } static inline bool operate_inplace(struct sna_pixmap *priv, unsigned flags) { if (!USE_INPLACE) return false; if ((flags & MOVE_INPLACE_HINT) == 0) { DBG(("%s: no, inplace operation not suitable\n", __FUNCTION__)); return false; } assert((flags & MOVE_ASYNC_HINT) == 0 || (priv->create & KGEM_CAN_CREATE_LARGE)); if (priv->move_to_gpu && flags & MOVE_WRITE) { DBG(("%s: no, has pending move-to-gpu\n", __FUNCTION__)); return false; } if (priv->cow && flags & MOVE_WRITE) { DBG(("%s: no, has COW\n", __FUNCTION__)); return false; } if ((priv->create & KGEM_CAN_CREATE_GTT) == 0) { DBG(("%s: no, not accessible via GTT\n", __FUNCTION__)); return false; } if ((priv->gpu_damage == NULL || priv->cpu_damage) && flags & MOVE_READ) { DBG(("%s: no, has CPU damage and requires readback\n", __FUNCTION__)); return false; } if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) { DBG(("%s: yes, CPU is busy\n", __FUNCTION__)); return true; } if (priv->create & KGEM_CAN_CREATE_LARGE) { DBG(("%s: large object, has GPU? %d\n", __FUNCTION__, priv->gpu_bo ? priv->gpu_bo->handle : 0)); return priv->gpu_bo != NULL; } if (flags & MOVE_WRITE && priv->gpu_bo&&kgem_bo_is_busy(priv->gpu_bo)) { DBG(("%s: no, GPU is busy, so stage write\n", __FUNCTION__)); return false; } return true; } bool _sna_pixmap_move_to_cpu(PixmapPtr pixmap, unsigned int flags) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; DBG(("%s(pixmap=%ld, %dx%d, flags=%x)\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height, flags)); assert(flags & (MOVE_READ | MOVE_WRITE)); assert_pixmap_damage(pixmap); priv = sna_pixmap(pixmap); if (priv == NULL) { DBG(("%s: not attached\n", __FUNCTION__)); return true; } DBG(("%s: gpu_bo=%d, gpu_damage=%p, cpu_damage=%p, is-clear?=%d\n", __FUNCTION__, priv->gpu_bo ? priv->gpu_bo->handle : 0, priv->gpu_damage, priv->cpu_damage, priv->clear)); assert(priv->gpu_damage == NULL || priv->gpu_bo); if ((flags & MOVE_READ) == 0 && UNDO) { kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); if (priv->move_to_gpu) sna_pixmap_discard_shadow_damage(priv, NULL); } if (kgem_bo_discard_cache(priv->gpu_bo, flags & MOVE_WRITE)) { assert(DAMAGE_IS_ALL(priv->cpu_damage)); if (DAMAGE_IS_ALL(priv->gpu_damage)) { DBG(("%s: using magical upload buffer\n", __FUNCTION__)); goto skip; } DBG(("%s: discarding cached upload buffer\n", __FUNCTION__)); assert(priv->gpu_damage == NULL); assert(!priv->pinned); assert(!priv->mapped); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = NULL; } if (DAMAGE_IS_ALL(priv->cpu_damage)) { DBG(("%s: CPU all-damaged\n", __FUNCTION__)); assert(priv->gpu_damage == NULL || DAMAGE_IS_ALL(priv->gpu_damage)); assert(priv->gpu_damage == NULL || (flags & MOVE_WRITE) == 0); goto done; } if (USE_INPLACE && (flags & MOVE_READ) == 0 && !(priv->cow || priv->move_to_gpu)) { assert(flags & MOVE_WRITE); DBG(("%s: no readback, discarding gpu damage [%d], pending clear[%d]\n", __FUNCTION__, priv->gpu_damage != NULL, priv->clear)); if ((priv->gpu_bo || priv->create & KGEM_CAN_CREATE_GPU) && pixmap_inplace(sna, pixmap, priv, flags) && sna_pixmap_create_mappable_gpu(pixmap, true)) { void *ptr; DBG(("%s: write inplace\n", __FUNCTION__)); assert(!priv->shm); assert(priv->cow == NULL); assert(priv->move_to_gpu == NULL); assert(priv->gpu_bo->exec == NULL); assert((flags & MOVE_READ) == 0 || priv->cpu_damage == NULL); ptr = kgem_bo_map(&sna->kgem, priv->gpu_bo); if (ptr == NULL) goto skip_inplace_map; pixmap->devPrivate.ptr = ptr; pixmap->devKind = priv->gpu_bo->pitch; priv->mapped = ptr == MAP(priv->gpu_bo->map__cpu) ? MAPPED_CPU : MAPPED_GTT; assert(has_coherent_ptr(sna, priv, flags)); assert(priv->gpu_bo->proxy == NULL); sna_damage_all(&priv->gpu_damage, pixmap); sna_damage_destroy(&priv->cpu_damage); priv->clear = false; list_del(&priv->flush_list); assert(!priv->shm); assert(priv->cpu_bo == NULL || !priv->cpu_bo->flush); sna_pixmap_free_cpu(sna, priv, priv->cpu); priv->cpu &= priv->mapped == MAPPED_CPU; assert_pixmap_damage(pixmap); return true; } skip_inplace_map: sna_damage_destroy(&priv->gpu_damage); priv->clear = false; if ((flags & MOVE_ASYNC_HINT) == 0 && priv->cpu_bo && !priv->cpu_bo->flush && __kgem_bo_is_busy(&sna->kgem, priv->cpu_bo)) { DBG(("%s: discarding busy CPU bo\n", __FUNCTION__)); assert(!priv->shm); assert(priv->gpu_bo == NULL || priv->gpu_damage == NULL); sna_damage_destroy(&priv->cpu_damage); sna_pixmap_free_cpu(sna, priv, false); assert(priv->mapped == MAPPED_NONE); if (!sna_pixmap_alloc_cpu(sna, pixmap, priv, 0)) return false; assert(priv->mapped == MAPPED_NONE); assert(pixmap->devPrivate.ptr == PTR(priv->ptr)); goto mark_damage; } } assert(priv->gpu_bo == NULL || priv->gpu_bo->proxy == NULL || (flags & MOVE_WRITE) == 0); if (operate_inplace(priv, flags) && pixmap_inplace(sna, pixmap, priv, flags) && sna_pixmap_create_mappable_gpu(pixmap, (flags & MOVE_READ) == 0)) { void *ptr; DBG(("%s: try to operate inplace (GTT)\n", __FUNCTION__)); assert(priv->gpu_bo); assert(priv->cow == NULL || (flags & MOVE_WRITE) == 0); assert(!priv->move_to_gpu); assert(priv->gpu_bo->proxy == NULL || (flags & MOVE_WRITE) == 0); assert((flags & MOVE_READ) == 0 || priv->cpu_damage == NULL); /* XXX only sync for writes? */ kgem_bo_submit(&sna->kgem, priv->gpu_bo); assert(priv->gpu_bo->exec == NULL); ptr = kgem_bo_map(&sna->kgem, priv->gpu_bo); if (ptr != NULL) { pixmap->devPrivate.ptr = ptr; pixmap->devKind = priv->gpu_bo->pitch; priv->mapped = ptr == MAP(priv->gpu_bo->map__cpu) ? MAPPED_CPU : MAPPED_GTT; assert(has_coherent_ptr(sna, priv, flags)); if (flags & MOVE_WRITE) { assert(priv->gpu_bo->proxy == NULL); sna_damage_all(&priv->gpu_damage, pixmap); sna_damage_destroy(&priv->cpu_damage); sna_pixmap_free_cpu(sna, priv, priv->cpu); list_del(&priv->flush_list); priv->clear = false; } priv->cpu &= priv->mapped == MAPPED_CPU; assert_pixmap_damage(pixmap); DBG(("%s: operate inplace (GTT)\n", __FUNCTION__)); return true; } } sna_pixmap_unmap(pixmap, priv); if (USE_INPLACE && (flags & MOVE_WRITE ? (void *)priv->gpu_bo : (void *)priv->gpu_damage) && priv->cpu_damage == NULL && priv->gpu_bo->tiling == I915_TILING_NONE && (flags & MOVE_READ || kgem_bo_can_map__cpu(&sna->kgem, priv->gpu_bo, flags & MOVE_WRITE)) && ((flags & (MOVE_WRITE | MOVE_ASYNC_HINT)) == 0 || (!priv->cow && !priv->move_to_gpu && !__kgem_bo_is_busy(&sna->kgem, priv->gpu_bo)))) { void *ptr; DBG(("%s: try to operate inplace (CPU)\n", __FUNCTION__)); assert(priv->gpu_bo); assert(priv->cow == NULL || (flags & MOVE_WRITE) == 0); assert(priv->move_to_gpu == NULL || (flags & MOVE_WRITE) == 0); assert(priv->gpu_bo->proxy == NULL || (flags & MOVE_WRITE) == 0); assert(!priv->mapped); assert(priv->gpu_bo->tiling == I915_TILING_NONE); ptr = kgem_bo_map__cpu(&sna->kgem, priv->gpu_bo); if (ptr != NULL) { pixmap->devPrivate.ptr = ptr; pixmap->devKind = priv->gpu_bo->pitch; priv->mapped = MAPPED_CPU; assert(has_coherent_ptr(sna, priv, flags)); if (flags & MOVE_WRITE) { assert(priv->gpu_bo->proxy == NULL); sna_damage_all(&priv->gpu_damage, pixmap); sna_damage_destroy(&priv->cpu_damage); sna_pixmap_free_cpu(sna, priv, priv->cpu); list_del(&priv->flush_list); priv->clear = false; priv->cpu = true; } assert(pixmap->devPrivate.ptr == MAP(priv->gpu_bo->map__cpu)); kgem_bo_sync__cpu_full(&sna->kgem, priv->gpu_bo, FORCE_FULL_SYNC || flags & MOVE_WRITE); assert((flags & MOVE_WRITE) == 0 || !kgem_bo_is_busy(priv->gpu_bo)); assert_pixmap_damage(pixmap); assert(has_coherent_ptr(sna, priv, flags)); DBG(("%s: operate inplace (CPU)\n", __FUNCTION__)); return true; } } assert(priv->mapped == MAPPED_NONE); if (((flags & MOVE_READ) == 0 || priv->clear) && priv->cpu_bo && !priv->cpu_bo->flush && __kgem_bo_is_busy(&sna->kgem, priv->cpu_bo)) { assert(!priv->shm); sna_pixmap_free_cpu(sna, priv, false); } assert(priv->mapped == MAPPED_NONE); if (pixmap->devPrivate.ptr == NULL && !sna_pixmap_alloc_cpu(sna, pixmap, priv, flags)) return false; assert(priv->mapped == MAPPED_NONE); assert(pixmap->devPrivate.ptr == PTR(priv->ptr)); if (flags & MOVE_READ) { if (priv->clear) { DBG(("%s: applying clear [%08x] size=%dx%d, stride=%d (total=%d)\n", __FUNCTION__, priv->clear_color, pixmap->drawable.width, pixmap->drawable.height, pixmap->devKind, pixmap->devKind * pixmap->drawable.height)); if (priv->cpu_bo) { if ((flags & MOVE_ASYNC_HINT || priv->cpu_bo->exec) && sna->render.fill_one(sna, pixmap, priv->cpu_bo, priv->clear_color, 0, 0, pixmap->drawable.width, pixmap->drawable.height, GXcopy)) goto clear_done; DBG(("%s: syncing CPU bo\n", __FUNCTION__)); kgem_bo_sync__cpu(&sna->kgem, priv->cpu_bo); assert(pixmap->devPrivate.ptr == MAP(priv->cpu_bo->map__cpu)); } assert(pixmap->devKind); if (priv->clear_color == 0 || pixmap->drawable.bitsPerPixel == 8 || priv->clear_color == (1 << pixmap->drawable.depth) - 1) { memset(pixmap->devPrivate.ptr, priv->clear_color, (size_t)pixmap->devKind * pixmap->drawable.height); } else { pixman_fill(pixmap->devPrivate.ptr, pixmap->devKind/sizeof(uint32_t), pixmap->drawable.bitsPerPixel, 0, 0, pixmap->drawable.width, pixmap->drawable.height, priv->clear_color); } clear_done: sna_damage_all(&priv->cpu_damage, pixmap); sna_pixmap_free_gpu(sna, priv); assert(priv->gpu_damage == NULL); assert(priv->clear == false); } if (priv->gpu_damage) { const BoxRec *box; int n; DBG(("%s: flushing GPU damage\n", __FUNCTION__)); assert(priv->gpu_bo); n = sna_damage_get_boxes(priv->gpu_damage, &box); if (n) { if (priv->move_to_gpu && !priv->move_to_gpu(sna, priv, MOVE_READ)) { DBG(("%s: move-to-gpu override failed\n", __FUNCTION__)); return false; } download_boxes(sna, priv, n, box); } __sna_damage_destroy(DAMAGE_PTR(priv->gpu_damage)); priv->gpu_damage = NULL; } } if (flags & MOVE_WRITE || priv->create & KGEM_CAN_CREATE_LARGE) { mark_damage: DBG(("%s: marking as damaged\n", __FUNCTION__)); sna_damage_all(&priv->cpu_damage, pixmap); sna_pixmap_free_gpu(sna, priv); assert(priv->gpu_damage == NULL); assert(priv->clear == false); if (priv->flush) { assert(!priv->shm); sna_add_flush_pixmap(sna, priv, priv->gpu_bo); } } done: if (flags & MOVE_WRITE) { assert(DAMAGE_IS_ALL(priv->cpu_damage)); assert(priv->gpu_damage == NULL); assert(priv->gpu_bo == NULL || priv->gpu_bo->proxy == NULL); if (priv->cow) sna_pixmap_undo_cow(sna, priv, 0); if (priv->gpu_bo && priv->gpu_bo->rq == NULL) { DBG(("%s: discarding idle GPU bo\n", __FUNCTION__)); sna_pixmap_free_gpu(sna, priv); } priv->source_count = SOURCE_BIAS; } if (priv->cpu_bo) { if ((flags & MOVE_ASYNC_HINT) == 0) { DBG(("%s: syncing CPU bo\n", __FUNCTION__)); assert(pixmap->devPrivate.ptr == MAP(priv->cpu_bo->map__cpu)); kgem_bo_sync__cpu_full(&sna->kgem, priv->cpu_bo, FORCE_FULL_SYNC || flags & MOVE_WRITE); assert((flags & MOVE_WRITE) == 0 || !kgem_bo_is_busy(priv->cpu_bo)); } } skip: priv->cpu |= (flags & (MOVE_WRITE | MOVE_ASYNC_HINT)) == MOVE_WRITE; assert(pixmap->devPrivate.ptr == PTR(priv->ptr)); assert(pixmap->devKind); assert_pixmap_damage(pixmap); assert(has_coherent_ptr(sna, sna_pixmap(pixmap), flags)); return true; } static bool region_overlaps_damage(const RegionRec *region, struct sna_damage *damage, int dx, int dy) { const BoxRec *re, *de; DBG(("%s?\n", __FUNCTION__)); if (damage == NULL) return false; if (DAMAGE_IS_ALL(damage)) return true; re = ®ion->extents; de = &DAMAGE_PTR(damage)->extents; DBG(("%s: region (%d, %d), (%d, %d), damage (%d, %d), (%d, %d)\n", __FUNCTION__, re->x1, re->y1, re->x2, re->y2, de->x1, de->y1, de->x2, de->y2)); return (re->x1 + dx < de->x2 && re->x2 + dx > de->x1 && re->y1 + dy < de->y2 && re->y2 + dy > de->y1); } static inline bool region_inplace(struct sna *sna, PixmapPtr pixmap, RegionPtr region, struct sna_pixmap *priv, unsigned flags) { assert_pixmap_damage(pixmap); if (FORCE_INPLACE) return FORCE_INPLACE > 0; if (wedged(sna) && !priv->pinned) return false; if (priv->gpu_damage && (priv->clear || (flags & MOVE_READ) == 0) && kgem_bo_is_busy(priv->gpu_bo)) return false; if (flags & MOVE_READ && (priv->cpu || priv->gpu_damage == NULL || region_overlaps_damage(region, priv->cpu_damage, 0, 0))) { DBG(("%s: no, uncovered CPU damage pending\n", __FUNCTION__)); return false; } if (priv->mapped) { DBG(("%s: %s, already mapped, continuing\n", __FUNCTION__, has_coherent_map(sna, priv->gpu_bo, flags) ? "yes" : "no")); return has_coherent_map(sna, priv->gpu_bo, flags); } if (priv->flush) { DBG(("%s: yes, exported via dri, will flush\n", __FUNCTION__)); return true; } if (DAMAGE_IS_ALL(priv->gpu_damage)) { DBG(("%s: yes, already wholly damaged on the GPU\n", __FUNCTION__)); assert(priv->gpu_bo); return true; } if (priv->cpu_bo && priv->cpu) { DBG(("%s: no, has CPU bo and was last active on CPU, presume future CPU activity\n", __FUNCTION__)); return false; } DBG(("%s: (%dx%d), inplace? %d\n", __FUNCTION__, region->extents.x2 - region->extents.x1, region->extents.y2 - region->extents.y1, ((int)(region->extents.x2 - region->extents.x1) * (int)(region->extents.y2 - region->extents.y1) * pixmap->drawable.bitsPerPixel >> 12) >= sna->kgem.half_cpu_cache_pages)); return ((int)(region->extents.x2 - region->extents.x1) * (int)(region->extents.y2 - region->extents.y1) * pixmap->drawable.bitsPerPixel >> 12) >= sna->kgem.half_cpu_cache_pages; } static bool cpu_clear_boxes(struct sna *sna, PixmapPtr pixmap, struct sna_pixmap *priv, const BoxRec *box, int n) { struct sna_fill_op fill; if (!sna_fill_init_blt(&fill, sna, pixmap, priv->cpu_bo, GXcopy, priv->clear_color, FILL_BOXES)) { DBG(("%s: unsupported fill\n", __FUNCTION__)); return false; } fill.boxes(sna, &fill, box, n); fill.done(sna, &fill); return true; } bool sna_drawable_move_region_to_cpu(DrawablePtr drawable, RegionPtr region, unsigned flags) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; int16_t dx, dy; DBG(("%s(pixmap=%ld (%dx%d), [(%d, %d), (%d, %d)], flags=%x)\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height, RegionExtents(region)->x1, RegionExtents(region)->y1, RegionExtents(region)->x2, RegionExtents(region)->y2, flags)); assert_pixmap_damage(pixmap); if (flags & MOVE_WRITE) { assert_drawable_contains_box(drawable, ®ion->extents); } assert(flags & (MOVE_WRITE | MOVE_READ)); if (box_empty(®ion->extents)) return true; if (MIGRATE_ALL || DBG_NO_PARTIAL_MOVE_TO_CPU) { if (!region_subsumes_pixmap(region, pixmap)) flags |= MOVE_READ; return _sna_pixmap_move_to_cpu(pixmap, flags); } priv = sna_pixmap(pixmap); if (priv == NULL) { DBG(("%s: not attached to pixmap %ld (depth %d)\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->drawable.depth)); return true; } assert(priv->gpu_damage == NULL || priv->gpu_bo); if (kgem_bo_discard_cache(priv->gpu_bo, flags & MOVE_WRITE)) { assert(DAMAGE_IS_ALL(priv->cpu_damage)); if (DAMAGE_IS_ALL(priv->gpu_damage)) { DBG(("%s: using magical upload buffer\n", __FUNCTION__)); goto skip; } DBG(("%s: discarding cached upload buffer\n", __FUNCTION__)); assert(priv->gpu_damage == NULL); assert(!priv->pinned); assert(!priv->mapped); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = NULL; } if (sna_damage_is_all(&priv->cpu_damage, pixmap->drawable.width, pixmap->drawable.height)) { bool discard_gpu = priv->cpu; DBG(("%s: pixmap=%ld all damaged on CPU\n", __FUNCTION__, pixmap->drawable.serialNumber)); assert(!priv->clear); sna_damage_destroy(&priv->gpu_damage); if ((flags & (MOVE_READ | MOVE_ASYNC_HINT)) == 0 && priv->cpu_bo && !priv->cpu_bo->flush && __kgem_bo_is_busy(&sna->kgem, priv->cpu_bo)) { DBG(("%s: active CPU bo replacing\n", __FUNCTION__)); assert(!priv->shm); assert(!IS_STATIC_PTR(priv->ptr)); if (!region_subsumes_pixmap(region, pixmap)) { DBG(("%s: partial replacement\n", __FUNCTION__)); if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) RegionTranslate(region, dx, dy); if (sna->kgem.has_llc && !priv->pinned && sna_pixmap_default_tiling(sna, pixmap) == I915_TILING_NONE) { #ifdef DEBUG_MEMORY sna->debug_memory.cpu_bo_allocs--; sna->debug_memory.cpu_bo_bytes -= kgem_bo_size(priv->cpu_bo); #endif DBG(("%s: promoting CPU bo to GPU bo\n", __FUNCTION__)); if (priv->gpu_bo) sna_pixmap_free_gpu(sna, priv); priv->gpu_bo = priv->cpu_bo; priv->cpu_bo = NULL; priv->ptr = NULL; pixmap->devPrivate.ptr = NULL; priv->gpu_damage = priv->cpu_damage; priv->cpu_damage = NULL; sna_damage_subtract(&priv->gpu_damage, region); discard_gpu = false; } else { DBG(("%s: pushing surrounding damage to GPU bo\n", __FUNCTION__)); sna_damage_subtract(&priv->cpu_damage, region); assert(priv->cpu_damage); if (sna_pixmap_move_to_gpu(pixmap, MOVE_READ | MOVE_ASYNC_HINT)) { sna_pixmap_free_cpu(sna, priv, false); if (priv->flush) sna_add_flush_pixmap(sna, priv, priv->gpu_bo); assert(priv->cpu_damage == NULL); sna_damage_all(&priv->gpu_damage, pixmap); sna_damage_subtract(&priv->gpu_damage, region); discard_gpu = false; } } sna_damage_add_to_pixmap(&priv->cpu_damage, region, pixmap); if (dx | dy) RegionTranslate(region, -dx, -dy); } else sna_pixmap_free_cpu(sna, priv, false); } if (flags & MOVE_WRITE && discard_gpu) sna_pixmap_free_gpu(sna, priv); sna_pixmap_unmap(pixmap, priv); assert(priv->mapped == MAPPED_NONE); if (pixmap->devPrivate.ptr == NULL && !sna_pixmap_alloc_cpu(sna, pixmap, priv, flags)) return false; assert(priv->mapped == MAPPED_NONE); assert(pixmap->devPrivate.ptr == PTR(priv->ptr)); goto out; } if (USE_INPLACE && (priv->create & KGEM_CAN_CREATE_LARGE || ((flags & (MOVE_READ | MOVE_ASYNC_HINT)) == 0 && (priv->flush || (flags & MOVE_WHOLE_HINT && whole_pixmap_inplace(pixmap)) || box_inplace(pixmap, ®ion->extents))))) { DBG(("%s: marking for inplace hint (%d, %d)\n", __FUNCTION__, priv->flush, box_inplace(pixmap, ®ion->extents))); flags |= MOVE_INPLACE_HINT; } if (region_subsumes_pixmap(region, pixmap)) { DBG(("%s: region (%d, %d), (%d, %d) + (%d, %d) subsumes pixmap (%dx%d)\n", __FUNCTION__, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, get_drawable_dx(drawable), get_drawable_dy(drawable), pixmap->drawable.width, pixmap->drawable.height)); return _sna_pixmap_move_to_cpu(pixmap, flags); } assert(priv->gpu_bo == NULL || priv->gpu_bo->proxy == NULL || (flags & MOVE_WRITE) == 0); if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) { DBG(("%s: delta=(%d, %d)\n", __FUNCTION__, dx, dy)); RegionTranslate(region, dx, dy); } if (priv->move_to_gpu) { DBG(("%s: applying move-to-gpu override\n", __FUNCTION__)); if ((flags & MOVE_READ) == 0) sna_pixmap_discard_shadow_damage(priv, region); if (!priv->move_to_gpu(sna, priv, MOVE_READ)) { DBG(("%s: move-to-gpu override failed\n", __FUNCTION__)); return NULL; } } if (operate_inplace(priv, flags) && region_inplace(sna, pixmap, region, priv, flags) && sna_pixmap_create_mappable_gpu(pixmap, false)) { void *ptr; DBG(("%s: try to operate inplace\n", __FUNCTION__)); assert(priv->gpu_bo); assert(priv->cow == NULL || (flags & MOVE_WRITE) == 0); assert(priv->move_to_gpu == NULL || (flags & MOVE_WRITE) == 0); assert(priv->gpu_bo->proxy == NULL || (flags & MOVE_WRITE) == 0); /* XXX only sync for writes? */ kgem_bo_submit(&sna->kgem, priv->gpu_bo); assert(priv->gpu_bo->exec == NULL); ptr = kgem_bo_map(&sna->kgem, priv->gpu_bo); if (ptr != NULL) { pixmap->devPrivate.ptr = ptr; pixmap->devKind = priv->gpu_bo->pitch; priv->mapped = ptr == MAP(priv->gpu_bo->map__cpu) ? MAPPED_CPU : MAPPED_GTT; assert(has_coherent_ptr(sna, priv, flags)); if (flags & MOVE_WRITE) { if (!DAMAGE_IS_ALL(priv->gpu_damage)) { assert(!priv->clear); sna_damage_add_to_pixmap(&priv->gpu_damage, region, pixmap); if (sna_damage_is_all(&priv->gpu_damage, pixmap->drawable.width, pixmap->drawable.height)) { DBG(("%s: replaced entire pixmap, destroying CPU shadow\n", __FUNCTION__)); sna_damage_destroy(&priv->cpu_damage); list_del(&priv->flush_list); } else sna_damage_subtract(&priv->cpu_damage, region); } priv->clear = false; } priv->cpu &= priv->mapped == MAPPED_CPU; assert_pixmap_damage(pixmap); if (dx | dy) RegionTranslate(region, -dx, -dy); DBG(("%s: operate inplace\n", __FUNCTION__)); return true; } } if (priv->clear && flags & MOVE_WRITE) { DBG(("%s: pending clear, moving whole pixmap for partial write\n", __FUNCTION__)); demote_to_cpu: if (dx | dy) RegionTranslate(region, -dx, -dy); return _sna_pixmap_move_to_cpu(pixmap, flags | MOVE_READ); } if (flags & MOVE_WHOLE_HINT) { DBG(("%s: region (%d, %d), (%d, %d) marked with WHOLE hint, pixmap %dx%d\n", __FUNCTION__, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, pixmap->drawable.width, pixmap->drawable.height)); move_to_cpu: if ((flags & MOVE_READ) == 0) sna_damage_subtract(&priv->gpu_damage, region); goto demote_to_cpu; } sna_pixmap_unmap(pixmap, priv); if (USE_INPLACE && priv->gpu_damage && priv->gpu_bo->tiling == I915_TILING_NONE && ((priv->cow == NULL && priv->move_to_gpu == NULL) || (flags & MOVE_WRITE) == 0) && (DAMAGE_IS_ALL(priv->gpu_damage) || sna_damage_contains_box__no_reduce(priv->gpu_damage, ®ion->extents)) && kgem_bo_can_map__cpu(&sna->kgem, priv->gpu_bo, flags & MOVE_WRITE) && ((flags & (MOVE_WRITE | MOVE_ASYNC_HINT)) == 0 || !__kgem_bo_is_busy(&sna->kgem, priv->gpu_bo))) { void *ptr; DBG(("%s: try to operate inplace (CPU), read? %d, write? %d\n", __FUNCTION__, !!(flags & MOVE_READ), !!(flags & MOVE_WRITE))); assert(priv->gpu_bo); assert(priv->gpu_bo->proxy == NULL || (flags & MOVE_WRITE) == 0); assert(sna_damage_contains_box(&priv->gpu_damage, ®ion->extents) == PIXMAN_REGION_IN); assert(sna_damage_contains_box(&priv->cpu_damage, ®ion->extents) == PIXMAN_REGION_OUT); ptr = kgem_bo_map__cpu(&sna->kgem, priv->gpu_bo); if (ptr != NULL) { pixmap->devPrivate.ptr = ptr; pixmap->devKind = priv->gpu_bo->pitch; priv->mapped = MAPPED_CPU; assert(has_coherent_ptr(sna, priv, flags)); if (flags & MOVE_WRITE) { if (!DAMAGE_IS_ALL(priv->gpu_damage)) { assert(!priv->clear); sna_damage_add_to_pixmap(&priv->gpu_damage, region, pixmap); if (sna_damage_is_all(&priv->gpu_damage, pixmap->drawable.width, pixmap->drawable.height)) { DBG(("%s: replaced entire pixmap, destroying CPU shadow\n", __FUNCTION__)); sna_damage_destroy(&priv->cpu_damage); list_del(&priv->flush_list); } else sna_damage_subtract(&priv->cpu_damage, region); } priv->clear = false; } assert_pixmap_damage(pixmap); kgem_bo_sync__cpu_full(&sna->kgem, priv->gpu_bo, FORCE_FULL_SYNC || flags & MOVE_WRITE); priv->cpu = true; assert_pixmap_map(pixmap, priv); assert((flags & MOVE_WRITE) == 0 || !kgem_bo_is_busy(priv->gpu_bo)); if (dx | dy) RegionTranslate(region, -dx, -dy); DBG(("%s: operate inplace (CPU)\n", __FUNCTION__)); return true; } } if ((priv->clear || (flags & MOVE_READ) == 0) && priv->cpu_bo && !priv->cpu_bo->flush && __kgem_bo_is_busy(&sna->kgem, priv->cpu_bo)) { sna_damage_subtract(&priv->cpu_damage, region); if (sna_pixmap_move_to_gpu(pixmap, MOVE_READ | MOVE_ASYNC_HINT)) { assert(priv->gpu_bo); sna_damage_all(&priv->gpu_damage, pixmap); sna_pixmap_free_cpu(sna, priv, false); } } assert(priv->mapped == MAPPED_NONE); if (pixmap->devPrivate.ptr == NULL && !sna_pixmap_alloc_cpu(sna, pixmap, priv, flags)) { DBG(("%s: CPU bo allocation failed, trying full move-to-cpu\n", __FUNCTION__)); goto move_to_cpu; } assert(priv->mapped == MAPPED_NONE); assert(pixmap->devPrivate.ptr == PTR(priv->ptr)); if (priv->gpu_bo == NULL) { assert(priv->gpu_damage == NULL); goto done; } assert(priv->gpu_bo->proxy == NULL); if ((flags & MOVE_READ) == 0) { assert(flags & MOVE_WRITE); sna_damage_subtract(&priv->gpu_damage, region); priv->clear = false; goto done; } if (priv->clear) { int n = region_num_rects(region); const BoxRec *box = region_rects(region); assert(DAMAGE_IS_ALL(priv->gpu_damage)); assert(priv->cpu_damage == NULL); DBG(("%s: pending clear, doing partial fill\n", __FUNCTION__)); if (priv->cpu_bo) { if ((flags & MOVE_ASYNC_HINT || priv->cpu_bo->exec) && cpu_clear_boxes(sna, pixmap, priv, box, n)) goto clear_done; DBG(("%s: syncing CPU bo\n", __FUNCTION__)); kgem_bo_sync__cpu(&sna->kgem, priv->cpu_bo); assert(pixmap->devPrivate.ptr == MAP(priv->cpu_bo->map__cpu)); } assert(pixmap->devKind); do { pixman_fill(pixmap->devPrivate.ptr, pixmap->devKind/sizeof(uint32_t), pixmap->drawable.bitsPerPixel, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1, priv->clear_color); box++; } while (--n); clear_done: if (flags & MOVE_WRITE || region->extents.x2 - region->extents.x1 > 1 || region->extents.y2 - region->extents.y1 > 1) { sna_damage_subtract(&priv->gpu_damage, region); priv->clear = false; } goto done; } if (priv->gpu_damage && (DAMAGE_IS_ALL(priv->gpu_damage) || sna_damage_overlaps_box(priv->gpu_damage, ®ion->extents))) { DBG(("%s: region (%dx%d) overlaps gpu damage\n", __FUNCTION__, region->extents.x2 - region->extents.x1, region->extents.y2 - region->extents.y1)); assert(priv->gpu_bo); if (priv->cpu_damage == NULL) { if ((flags & MOVE_WRITE) == 0 && region->extents.x2 - region->extents.x1 == 1 && region->extents.y2 - region->extents.y1 == 1) { /* Often associated with synchronisation, KISS */ DBG(("%s: single pixel read\n", __FUNCTION__)); sna_read_boxes(sna, pixmap, priv->gpu_bo, ®ion->extents, 1); goto done; } } else { if (DAMAGE_IS_ALL(priv->cpu_damage) || sna_damage_contains_box__no_reduce(priv->cpu_damage, ®ion->extents)) { assert(sna_damage_contains_box(&priv->gpu_damage, ®ion->extents) == PIXMAN_REGION_OUT); assert(sna_damage_contains_box(&priv->cpu_damage, ®ion->extents) == PIXMAN_REGION_IN); DBG(("%s: region already in CPU damage\n", __FUNCTION__)); goto already_damaged; } } if (sna_damage_contains_box(&priv->gpu_damage, ®ion->extents) != PIXMAN_REGION_OUT) { RegionRec want, *r = region; DBG(("%s: region (%dx%d) intersects gpu damage\n", __FUNCTION__, region->extents.x2 - region->extents.x1, region->extents.y2 - region->extents.y1)); if ((flags & MOVE_WRITE) == 0 && region->extents.x2 - region->extents.x1 == 1 && region->extents.y2 - region->extents.y1 == 1) { sna_read_boxes(sna, pixmap, priv->gpu_bo, ®ion->extents, 1); goto done; } /* Expand the region to move 32x32 pixel blocks at a * time, as we assume that we will continue writing * afterwards and so aim to coallesce subsequent * reads. */ if (flags & MOVE_WRITE) { int n = region_num_rects(region), i; const BoxRec *boxes = region_rects(region); BoxPtr blocks; blocks = NULL; if (priv->cpu_damage == NULL) blocks = malloc(sizeof(BoxRec) * n); if (blocks) { for (i = 0; i < n; i++) { blocks[i].x1 = boxes[i].x1 & ~31; if (blocks[i].x1 < 0) blocks[i].x1 = 0; blocks[i].x2 = (boxes[i].x2 + 31) & ~31; if (blocks[i].x2 > pixmap->drawable.width) blocks[i].x2 = pixmap->drawable.width; blocks[i].y1 = boxes[i].y1 & ~31; if (blocks[i].y1 < 0) blocks[i].y1 = 0; blocks[i].y2 = (boxes[i].y2 + 31) & ~31; if (blocks[i].y2 > pixmap->drawable.height) blocks[i].y2 = pixmap->drawable.height; } if (pixman_region_init_rects(&want, blocks, i)) r = &want; free(blocks); } } if (region_subsumes_damage(r, priv->gpu_damage)) { const BoxRec *box; int n; DBG(("%s: region wholly contains damage\n", __FUNCTION__)); n = sna_damage_get_boxes(priv->gpu_damage, &box); if (n) download_boxes(sna, priv, n, box); sna_damage_destroy(&priv->gpu_damage); } else if (DAMAGE_IS_ALL(priv->gpu_damage) || sna_damage_contains_box__no_reduce(priv->gpu_damage, &r->extents)) { DBG(("%s: region wholly inside damage\n", __FUNCTION__)); assert(sna_damage_contains_box(&priv->gpu_damage, &r->extents) == PIXMAN_REGION_IN); assert(sna_damage_contains_box(&priv->cpu_damage, &r->extents) == PIXMAN_REGION_OUT); download_boxes(sna, priv, region_num_rects(r), region_rects(r)); sna_damage_subtract(&priv->gpu_damage, r); } else { RegionRec need; pixman_region_init(&need); if (sna_damage_intersect(priv->gpu_damage, r, &need)) { DBG(("%s: region intersects damage\n", __FUNCTION__)); download_boxes(sna, priv, region_num_rects(&need), region_rects(&need)); sna_damage_subtract(&priv->gpu_damage, r); RegionUninit(&need); } } if (r == &want) pixman_region_fini(&want); } } done: if ((flags & (MOVE_WRITE | MOVE_ASYNC_HINT)) == MOVE_WRITE) { DBG(("%s: applying cpu damage\n", __FUNCTION__)); assert(!DAMAGE_IS_ALL(priv->cpu_damage)); assert_pixmap_contains_box(pixmap, RegionExtents(region)); sna_damage_add_to_pixmap(&priv->cpu_damage, region, pixmap); sna_damage_reduce_all(&priv->cpu_damage, pixmap); if (DAMAGE_IS_ALL(priv->cpu_damage)) { DBG(("%s: replaced entire pixmap\n", __FUNCTION__)); sna_pixmap_free_gpu(sna, priv); } if (priv->flush) { assert(!priv->shm); sna_add_flush_pixmap(sna, priv, priv->gpu_bo); } } already_damaged: if (dx | dy) RegionTranslate(region, -dx, -dy); out: if (flags & MOVE_WRITE) { assert(!DAMAGE_IS_ALL(priv->gpu_damage)); priv->source_count = SOURCE_BIAS; assert(priv->gpu_bo == NULL || priv->gpu_bo->proxy == NULL); assert(priv->gpu_bo || priv->gpu_damage == NULL); assert(!priv->flush || !list_is_empty(&priv->flush_list)); assert(!priv->clear); } if ((flags & MOVE_ASYNC_HINT) == 0 && priv->cpu_bo) { DBG(("%s: syncing cpu bo\n", __FUNCTION__)); assert(pixmap->devPrivate.ptr == MAP(priv->cpu_bo->map__cpu)); kgem_bo_sync__cpu_full(&sna->kgem, priv->cpu_bo, FORCE_FULL_SYNC || flags & MOVE_WRITE); assert((flags & MOVE_WRITE) == 0 || !kgem_bo_is_busy(priv->cpu_bo)); } skip: priv->cpu |= (flags & (MOVE_WRITE | MOVE_ASYNC_HINT)) == MOVE_WRITE; assert(pixmap->devPrivate.ptr == PTR(priv->ptr)); assert(pixmap->devKind); assert_pixmap_damage(pixmap); assert(has_coherent_ptr(sna, priv, flags)); return true; } bool sna_drawable_move_to_cpu(DrawablePtr drawable, unsigned flags) { RegionRec region; PixmapPtr pixmap; int16_t dx, dy; if (drawable->type == DRAWABLE_PIXMAP) return sna_pixmap_move_to_cpu((PixmapPtr)drawable, flags); pixmap = get_window_pixmap((WindowPtr)drawable); get_drawable_deltas(drawable, pixmap, &dx, &dy); DBG(("%s: (%d, %d)x(%d, %d) + (%d, %d), flags=%x\n", __FUNCTION__, drawable->x, drawable->y, drawable->width, drawable->height, dx, dy, flags)); region.extents.x1 = drawable->x + dx; region.extents.y1 = drawable->y + dy; region.extents.x2 = region.extents.x1 + drawable->width; region.extents.y2 = region.extents.y1 + drawable->height; region.data = NULL; if (region.extents.x1 < 0) region.extents.x1 = 0; if (region.extents.y1 < 0) region.extents.y1 = 0; if (region.extents.x2 > pixmap->drawable.width) region.extents.x2 = pixmap->drawable.width; if (region.extents.y2 > pixmap->drawable.height) region.extents.y2 = pixmap->drawable.height; if (box_empty(®ion.extents)) return true; return sna_drawable_move_region_to_cpu(&pixmap->drawable, ®ion, flags); } pure static bool alu_overwrites(uint8_t alu) { switch (alu) { case GXclear: case GXcopy: case GXcopyInverted: case GXset: return true; default: return false; } } inline static bool drawable_gc_inplace_hint(DrawablePtr draw, GCPtr gc) { if (!alu_overwrites(gc->alu)) return false; if (!PM_IS_SOLID(draw, gc->planemask)) return false; if (gc->fillStyle == FillStippled) return false; return true; } inline static unsigned drawable_gc_flags(DrawablePtr draw, GCPtr gc, bool partial) { assert(sna_gc(gc)->changes == 0); if (gc->fillStyle == FillStippled) { DBG(("%s: read due to fill %d\n", __FUNCTION__, gc->fillStyle)); return MOVE_READ | MOVE_WRITE; } if (fb_gc(gc)->and | fb_gc(gc)->bgand) { DBG(("%s: read due to rrop %d:%x\n", __FUNCTION__, gc->alu, (unsigned)fb_gc(gc)->and)); return MOVE_READ | MOVE_WRITE; } DBG(("%s: try operating on drawable inplace [hint? %d]\n", __FUNCTION__, drawable_gc_inplace_hint(draw, gc))); return (partial ? MOVE_READ : 0) | MOVE_WRITE | MOVE_INPLACE_HINT; } static inline struct sna_pixmap * sna_pixmap_mark_active(struct sna *sna, struct sna_pixmap *priv) { assert(priv->gpu_bo); DBG(("%s: pixmap=%ld, handle=%u\n", __FUNCTION__, priv->pixmap->drawable.serialNumber, priv->gpu_bo->handle)); return priv; } inline static struct sna_pixmap * __sna_pixmap_for_gpu(struct sna *sna, PixmapPtr pixmap, unsigned flags) { struct sna_pixmap *priv; if ((flags & __MOVE_FORCE) == 0 && wedged(sna)) return NULL; priv = sna_pixmap(pixmap); if (priv == NULL) { DBG(("%s: not attached\n", __FUNCTION__)); if ((flags & __MOVE_DRI) == 0) return NULL; if (pixmap->usage_hint == -1) { DBG(("%s: not promoting SHM Pixmap for DRI\n", __FUNCTION__)); return NULL; } DBG(("%s: forcing the creation on the GPU\n", __FUNCTION__)); priv = sna_pixmap_attach(pixmap); if (priv == NULL) return NULL; sna_damage_all(&priv->cpu_damage, pixmap); assert(priv->gpu_bo == NULL); assert(priv->gpu_damage == NULL); } return priv; } struct sna_pixmap * sna_pixmap_move_area_to_gpu(PixmapPtr pixmap, const BoxRec *box, unsigned int flags) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; RegionRec i, r; DBG(("%s: pixmap=%ld box=(%d, %d), (%d, %d), flags=%x\n", __FUNCTION__, pixmap->drawable.serialNumber, box->x1, box->y1, box->x2, box->y2, flags)); priv = __sna_pixmap_for_gpu(sna, pixmap, flags); if (priv == NULL) return NULL; assert(box->x2 > box->x1 && box->y2 > box->y1); assert_pixmap_damage(pixmap); assert_pixmap_contains_box(pixmap, box); assert(priv->gpu_damage == NULL || priv->gpu_bo); if ((flags & MOVE_READ) == 0) sna_damage_subtract_box(&priv->cpu_damage, box); if (priv->move_to_gpu) { unsigned int hint; DBG(("%s: applying move-to-gpu override\n", __FUNCTION__)); hint = flags | MOVE_READ; if ((flags & MOVE_READ) == 0) { RegionRec region; region.extents = *box; region.data = NULL; sna_pixmap_discard_shadow_damage(priv, ®ion); if (region_subsumes_pixmap(®ion, pixmap)) hint &= ~MOVE_READ; } else { if (priv->cpu_damage) hint |= MOVE_WRITE; } if (!priv->move_to_gpu(sna, priv, hint)) { DBG(("%s: move-to-gpu override failed\n", __FUNCTION__)); return NULL; } } if (priv->cow) { unsigned cow = flags & (MOVE_READ | MOVE_WRITE | __MOVE_FORCE); if ((flags & MOVE_READ) == 0) { if (priv->gpu_damage) { r.extents = *box; r.data = NULL; if (!region_subsumes_damage(&r, priv->gpu_damage)) cow |= MOVE_READ; } } else { if (priv->cpu_damage) { r.extents = *box; r.data = NULL; if (region_overlaps_damage(&r, priv->cpu_damage, 0, 0)) cow |= MOVE_WRITE; } } if (cow) { if (!sna_pixmap_undo_cow(sna, priv, cow)) return NULL; if (priv->gpu_bo == NULL) sna_damage_destroy(&priv->gpu_damage); } } if (sna_damage_is_all(&priv->gpu_damage, pixmap->drawable.width, pixmap->drawable.height)) { assert(priv->gpu_bo); assert(priv->gpu_bo->proxy == NULL); sna_damage_destroy(&priv->cpu_damage); list_del(&priv->flush_list); goto done; } if (kgem_bo_discard_cache(priv->gpu_bo, flags & (MOVE_WRITE | __MOVE_FORCE))) { DBG(("%s: discarding cached upload buffer\n", __FUNCTION__)); assert(DAMAGE_IS_ALL(priv->cpu_damage)); assert(priv->gpu_damage == NULL || DAMAGE_IS_ALL(priv->gpu_damage)); /* magical upload buffer */ assert(!priv->pinned); assert(!priv->mapped); sna_damage_destroy(&priv->gpu_damage); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = NULL; } sna_damage_reduce(&priv->cpu_damage); assert_pixmap_damage(pixmap); if (priv->cpu_damage == NULL) { list_del(&priv->flush_list); return sna_pixmap_move_to_gpu(pixmap, MOVE_READ | flags); } if (priv->gpu_bo == NULL) { assert(priv->gpu_damage == NULL); if (flags & __MOVE_FORCE || priv->create & KGEM_CAN_CREATE_GPU) sna_pixmap_alloc_gpu(sna, pixmap, priv, CREATE_INACTIVE); if (priv->gpu_bo == NULL) return NULL; DBG(("%s: created gpu bo\n", __FUNCTION__)); } if (priv->gpu_bo->proxy) { DBG(("%s: reusing cached upload\n", __FUNCTION__)); assert((flags & MOVE_WRITE) == 0); assert(priv->gpu_damage == NULL); return priv; } if (priv->shm) { assert(!priv->flush); sna_add_flush_pixmap(sna, priv, priv->cpu_bo); } assert(priv->cpu_damage); region_set(&r, box); if (MIGRATE_ALL || region_subsumes_damage(&r, priv->cpu_damage)) { bool ok = false; int n; n = sna_damage_get_boxes(priv->cpu_damage, &box); assert(n); if (use_cpu_bo_for_upload(sna, priv, 0)) { DBG(("%s: using CPU bo for upload to GPU\n", __FUNCTION__)); ok = sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, priv->cpu_bo, 0, 0, &pixmap->drawable, priv->gpu_bo, 0, 0, box, n, 0); } if (!ok) { sna_pixmap_unmap(pixmap, priv); if (pixmap->devPrivate.ptr == NULL) return NULL; assert(pixmap->devKind); if (n == 1 && !priv->pinned && box->x1 <= 0 && box->y1 <= 0 && box->x2 >= pixmap->drawable.width && box->y2 >= pixmap->drawable.height) { ok = sna_replace(sna, pixmap, pixmap->devPrivate.ptr, pixmap->devKind); } else { ok = sna_write_boxes(sna, pixmap, priv->gpu_bo, 0, 0, pixmap->devPrivate.ptr, pixmap->devKind, 0, 0, box, n); } if (!ok) return NULL; } sna_damage_destroy(&priv->cpu_damage); } else if (DAMAGE_IS_ALL(priv->cpu_damage) || sna_damage_contains_box__no_reduce(priv->cpu_damage, box)) { bool ok = false; assert(sna_damage_contains_box(&priv->gpu_damage, box) == PIXMAN_REGION_OUT); assert(sna_damage_contains_box(&priv->cpu_damage, box) == PIXMAN_REGION_IN); if (use_cpu_bo_for_upload(sna, priv, 0)) { DBG(("%s: using CPU bo for upload to GPU\n", __FUNCTION__)); ok = sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, priv->cpu_bo, 0, 0, &pixmap->drawable, priv->gpu_bo, 0, 0, box, 1, 0); } if (!ok) { sna_pixmap_unmap(pixmap, priv); if (pixmap->devPrivate.ptr != NULL) { assert(pixmap->devKind); ok = sna_write_boxes(sna, pixmap, priv->gpu_bo, 0, 0, pixmap->devPrivate.ptr, pixmap->devKind, 0, 0, box, 1); } } if (!ok) return NULL; sna_damage_subtract(&priv->cpu_damage, &r); } else if (sna_damage_intersect(priv->cpu_damage, &r, &i)) { int n = region_num_rects(&i); bool ok; box = region_rects(&i); ok = false; if (use_cpu_bo_for_upload(sna, priv, 0)) { DBG(("%s: using CPU bo for upload to GPU, %d boxes\n", __FUNCTION__, n)); ok = sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, priv->cpu_bo, 0, 0, &pixmap->drawable, priv->gpu_bo, 0, 0, box, n, 0); } if (!ok) { sna_pixmap_unmap(pixmap, priv); if (pixmap->devPrivate.ptr != NULL) { assert(pixmap->devKind); ok = sna_write_boxes(sna, pixmap, priv->gpu_bo, 0, 0, pixmap->devPrivate.ptr, pixmap->devKind, 0, 0, box, n); } } if (!ok) return NULL; sna_damage_subtract(&priv->cpu_damage, &r); RegionUninit(&i); } done: if (priv->cpu_damage == NULL && priv->flush) list_del(&priv->flush_list); if (flags & MOVE_WRITE) { priv->clear = false; if (!DAMAGE_IS_ALL(priv->gpu_damage) && priv->cpu_damage == NULL && (box_covers_pixmap(pixmap, &r.extents) || box_inplace(pixmap, &r.extents))) { DBG(("%s: large operation on undamaged, discarding CPU shadow\n", __FUNCTION__)); assert(priv->gpu_bo); assert(priv->gpu_bo->proxy == NULL); if (sna_pixmap_free_cpu(sna, priv, priv->cpu)) { DBG(("%s: large operation on undamaged, promoting to full GPU\n", __FUNCTION__)); sna_damage_all(&priv->gpu_damage, pixmap); } } if (DAMAGE_IS_ALL(priv->gpu_damage)) { sna_pixmap_free_cpu(sna, priv, priv->cpu); sna_damage_destroy(&priv->cpu_damage); list_del(&priv->flush_list); } priv->cpu = false; } assert(!priv->gpu_bo->proxy || (flags & MOVE_WRITE) == 0); return sna_pixmap_mark_active(sna, priv); } struct kgem_bo * sna_drawable_use_bo(DrawablePtr drawable, unsigned flags, const BoxRec *box, struct sna_damage ***damage) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna_pixmap *priv = sna_pixmap(pixmap); struct sna *sna; RegionRec region; int16_t dx, dy; int ret; DBG(("%s pixmap=%ld, box=((%d, %d), (%d, %d)), flags=%x...\n", __FUNCTION__, pixmap->drawable.serialNumber, box->x1, box->y1, box->x2, box->y2, flags)); assert(box->x2 > box->x1 && box->y2 > box->y1); assert(pixmap->refcnt); assert_pixmap_damage(pixmap); assert_drawable_contains_box(drawable, box); if (priv == NULL) { DBG(("%s: not attached\n", __FUNCTION__)); return NULL; } if (priv->cow) { unsigned cow = MOVE_WRITE | MOVE_READ; if (flags & IGNORE_DAMAGE) { if (priv->gpu_damage) { region.extents = *box; if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) { region.extents.x1 += dx; region.extents.x2 += dx; region.extents.y1 += dy; region.extents.y2 += dy; } region.data = NULL; if (region_subsumes_damage(®ion, priv->gpu_damage)) cow &= ~MOVE_READ; } else cow &= ~MOVE_READ; } if (!sna_pixmap_undo_cow(to_sna_from_pixmap(pixmap), priv, cow)) return NULL; if (priv->gpu_bo == NULL) sna_damage_destroy(&priv->gpu_damage); } if (kgem_bo_discard_cache(priv->gpu_bo, true)) { DBG(("%s: cached upload proxy, discard and revert to GPU\n", __FUNCTION__)); assert(DAMAGE_IS_ALL(priv->cpu_damage)); assert(priv->gpu_damage == NULL || DAMAGE_IS_ALL(priv->gpu_damage)); /* magical upload buffer */ assert(!priv->pinned); assert(!priv->mapped); sna_damage_destroy(&priv->gpu_damage); kgem_bo_destroy(&to_sna_from_pixmap(pixmap)->kgem, priv->gpu_bo); priv->gpu_bo = NULL; goto use_cpu_bo; } if (priv->flush) { DBG(("%s: exported target, set PREFER_GPU\n", __FUNCTION__)); flags |= PREFER_GPU; } if (priv->shm) { DBG(("%s: shm target, discard PREFER_GPU\n", __FUNCTION__)); flags &= ~PREFER_GPU; } if (priv->pinned) { DBG(("%s: pinned, never REPLACES\n", __FUNCTION__)); flags &= ~REPLACES; } if (priv->cpu && (flags & (FORCE_GPU | IGNORE_DAMAGE)) == 0) { DBG(("%s: last on cpu and needs damage, discard PREFER_GPU\n", __FUNCTION__)); flags &= ~PREFER_GPU; } if ((flags & (PREFER_GPU | IGNORE_DAMAGE)) == IGNORE_DAMAGE) { if (priv->gpu_bo && (box_covers_pixmap(pixmap, box) || box_inplace(pixmap, box))) { DBG(("%s: not reading damage and large, set PREFER_GPU\n", __FUNCTION__)); flags |= PREFER_GPU; } } DBG(("%s: flush=%d, shm=%d, cpu=%d => flags=%x\n", __FUNCTION__, priv->flush, priv->shm, priv->cpu, flags)); if ((flags & PREFER_GPU) == 0 && (flags & (REPLACES | IGNORE_DAMAGE) || !priv->gpu_damage || !kgem_bo_is_busy(priv->gpu_bo))) { DBG(("%s: try cpu as GPU bo is idle\n", __FUNCTION__)); goto use_cpu_bo; } if (DAMAGE_IS_ALL(priv->gpu_damage)) { DBG(("%s: use GPU fast path (all-damaged)\n", __FUNCTION__)); assert(priv->cpu_damage == NULL); assert(priv->gpu_bo); assert(priv->gpu_bo->proxy == NULL); goto use_gpu_bo; } if (DAMAGE_IS_ALL(priv->cpu_damage)) { assert(priv->gpu_damage == NULL); if ((flags & FORCE_GPU) == 0 || priv->cpu_bo) { DBG(("%s: use CPU fast path (all-damaged), and not forced-gpu\n", __FUNCTION__)); goto use_cpu_bo; } } DBG(("%s: gpu? %d, damaged? %d; cpu? %d, damaged? %d\n", __FUNCTION__, priv->gpu_bo ? priv->gpu_bo->handle : 0, priv->gpu_damage != NULL, priv->cpu_bo ? priv->cpu_bo->handle : 0, priv->cpu_damage != NULL)); if (priv->gpu_bo == NULL) { unsigned int move; if ((flags & FORCE_GPU) == 0 && (priv->create & KGEM_CAN_CREATE_GPU) == 0) { DBG(("%s: untiled, will not force allocation\n", __FUNCTION__)); goto use_cpu_bo; } if ((flags & IGNORE_DAMAGE) == 0) { if (priv->cpu_bo) { if (to_sna_from_pixmap(pixmap)->kgem.can_blt_cpu) { if (kgem_bo_is_busy(priv->cpu_bo)) { DBG(("%s: already using CPU bo, will not force allocation\n", __FUNCTION__)); goto use_cpu_bo; } if ((flags & RENDER_GPU) == 0) { DBG(("%s: prefer cpu", __FUNCTION__)); goto use_cpu_bo; } } else { if (kgem_bo_is_busy(priv->cpu_bo)) { DBG(("%s: CPU bo active, must force allocation\n", __FUNCTION__)); goto create_gpu_bo; } } } if ((flags & FORCE_GPU) == 0 && priv->cpu_damage) { if ((flags & PREFER_GPU) == 0) { DBG(("%s: already damaged and prefer cpu", __FUNCTION__)); goto use_cpu_bo; } if (!box_inplace(pixmap, box)) { DBG(("%s: damaged with a small operation, will not force allocation\n", __FUNCTION__)); goto use_cpu_bo; } } } else if (priv->cpu_damage) { region.extents = *box; if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) { region.extents.x1 += dx; region.extents.x2 += dx; region.extents.y1 += dy; region.extents.y2 += dy; } region.data = NULL; sna_damage_subtract(&priv->cpu_damage, ®ion); if (priv->cpu_damage == NULL) { list_del(&priv->flush_list); priv->cpu = false; } } create_gpu_bo: move = MOVE_WRITE | MOVE_READ | MOVE_ASYNC_HINT; if (flags & FORCE_GPU) move |= __MOVE_FORCE; if (!sna_pixmap_move_to_gpu(pixmap, move)) goto use_cpu_bo; DBG(("%s: allocated GPU bo for operation\n", __FUNCTION__)); goto done; } region.extents = *box; if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) { region.extents.x1 += dx; region.extents.x2 += dx; region.extents.y1 += dy; region.extents.y2 += dy; } region.data = NULL; DBG(("%s extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (priv->gpu_damage) { assert(priv->gpu_bo); if (!priv->cpu_damage || flags & IGNORE_DAMAGE) { if (flags & REPLACES || box_covers_pixmap(pixmap, ®ion.extents)) { unsigned int move; if (flags & IGNORE_DAMAGE) move = MOVE_WRITE; else move = MOVE_WRITE | MOVE_READ | MOVE_ASYNC_HINT; if (sna_pixmap_move_to_gpu(pixmap, move)) goto use_gpu_bo; } if (DAMAGE_IS_ALL(priv->gpu_damage) || sna_damage_contains_box__no_reduce(priv->gpu_damage, ®ion.extents)) { DBG(("%s: region wholly contained within GPU damage\n", __FUNCTION__)); assert(sna_damage_contains_box(&priv->gpu_damage, ®ion.extents) == PIXMAN_REGION_IN); assert(sna_damage_contains_box(&priv->cpu_damage, ®ion.extents) == PIXMAN_REGION_OUT); goto use_gpu_bo; } else { DBG(("%s: partial GPU damage with no CPU damage, continuing to use GPU\n", __FUNCTION__)); goto move_to_gpu; } } ret = sna_damage_contains_box(&priv->gpu_damage, ®ion.extents); if (ret == PIXMAN_REGION_IN) { DBG(("%s: region wholly contained within GPU damage\n", __FUNCTION__)); goto use_gpu_bo; } if (ret != PIXMAN_REGION_OUT) { DBG(("%s: region partially contained within GPU damage\n", __FUNCTION__)); goto move_to_gpu; } } if ((flags & IGNORE_DAMAGE) == 0 && priv->cpu_damage) { ret = sna_damage_contains_box(&priv->cpu_damage, ®ion.extents); if (ret == PIXMAN_REGION_IN) { DBG(("%s: region wholly contained within CPU damage\n", __FUNCTION__)); goto use_cpu_bo; } if (box_inplace(pixmap, box)) { DBG(("%s: forcing inplace\n", __FUNCTION__)); goto move_to_gpu; } if (ret != PIXMAN_REGION_OUT) { DBG(("%s: region partially contained within CPU damage\n", __FUNCTION__)); goto use_cpu_bo; } } move_to_gpu: if (!sna_pixmap_move_area_to_gpu(pixmap, ®ion.extents, flags & IGNORE_DAMAGE ? MOVE_WRITE : MOVE_READ | MOVE_WRITE)) { DBG(("%s: failed to move-to-gpu, fallback\n", __FUNCTION__)); assert(priv->gpu_bo == NULL); goto use_cpu_bo; } done: assert(priv->move_to_gpu == NULL); assert(priv->gpu_bo != NULL); assert(priv->gpu_bo->refcnt); if (sna_damage_is_all(&priv->gpu_damage, pixmap->drawable.width, pixmap->drawable.height)) { sna_damage_destroy(&priv->cpu_damage); list_del(&priv->flush_list); *damage = NULL; } else *damage = &priv->gpu_damage; DBG(("%s: using GPU bo with damage? %d\n", __FUNCTION__, *damage != NULL)); assert(*damage == NULL || !DAMAGE_IS_ALL(*damage)); assert(priv->gpu_bo->proxy == NULL); assert(priv->clear == false); assert(priv->cpu == false); assert(!priv->shm); return priv->gpu_bo; use_gpu_bo: if (priv->move_to_gpu) { unsigned hint = MOVE_READ | MOVE_WRITE; sna = to_sna_from_pixmap(pixmap); DBG(("%s: applying move-to-gpu override\n", __FUNCTION__)); if (flags & IGNORE_DAMAGE) { region.extents = *box; region.data = NULL; if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) { region.extents.x1 += dx; region.extents.x2 += dx; region.extents.y1 += dy; region.extents.y2 += dy; } sna_pixmap_discard_shadow_damage(priv, ®ion); if (region_subsumes_pixmap(®ion, pixmap)) { DBG(("%s: discarding move-to-gpu READ for subsumed pixmap\n", __FUNCTION__)); hint = MOVE_WRITE; } } if (!priv->move_to_gpu(sna, priv, hint)) { DBG(("%s: move-to-gpu override failed\n", __FUNCTION__)); goto use_cpu_bo; } } if (priv->shm) { assert(!priv->flush); list_move(&priv->flush_list, &sna->flush_pixmaps); } DBG(("%s: using whole GPU bo\n", __FUNCTION__)); assert(priv->gpu_bo != NULL); assert(priv->gpu_bo->refcnt); assert(priv->gpu_bo->proxy == NULL); assert(priv->gpu_damage); priv->cpu = false; priv->clear = false; *damage = NULL; return priv->gpu_bo; use_cpu_bo: if (!USE_CPU_BO || priv->cpu_bo == NULL) { if ((flags & FORCE_GPU) == 0) { DBG(("%s: no CPU bo, and GPU not forced\n", __FUNCTION__)); return NULL; } flags &= ~FORCE_GPU; region.extents = *box; if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) { region.extents.x1 += dx; region.extents.x2 += dx; region.extents.y1 += dy; region.extents.y2 += dy; } region.data = NULL; if (!sna_drawable_move_region_to_cpu(&pixmap->drawable, ®ion, (flags & IGNORE_DAMAGE ? 0 : MOVE_READ) | MOVE_WRITE | MOVE_ASYNC_HINT) || priv->cpu_bo == NULL) { DBG(("%s: did not create CPU bo\n", __FUNCTION__)); cpu_fail: if (priv->gpu_bo) goto move_to_gpu; return NULL; } } assert(priv->cpu_bo->refcnt); sna = to_sna_from_pixmap(pixmap); if ((flags & FORCE_GPU) == 0 && !__kgem_bo_is_busy(&sna->kgem, priv->cpu_bo)) { DBG(("%s: has CPU bo, but is idle and acceleration not forced\n", __FUNCTION__)); return NULL; } region.extents = *box; if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) { region.extents.x1 += dx; region.extents.x2 += dx; region.extents.y1 += dy; region.extents.y2 += dy; } region.data = NULL; if (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo)) { DBG(("%s: both CPU and GPU are busy, prefer to use the GPU\n", __FUNCTION__)); goto move_to_gpu; } assert(priv->gpu_bo == NULL || priv->gpu_bo->proxy == NULL); if (flags & RENDER_GPU) { flags &= ~RENDER_GPU; if ((flags & IGNORE_DAMAGE) == 0 && priv->gpu_damage) { DBG(("%s: prefer to use GPU bo for rendering whilst reading from GPU damage\n", __FUNCTION__)); prefer_gpu_bo: if (priv->gpu_bo == NULL) { if ((flags & FORCE_GPU) == 0) { DBG(("%s: untiled, will not force allocation\n", __FUNCTION__)); return NULL; } if (flags & IGNORE_DAMAGE) { sna_damage_subtract(&priv->cpu_damage, ®ion); if (priv->cpu_damage == NULL) { list_del(&priv->flush_list); priv->cpu = false; } } if (!sna_pixmap_move_to_gpu(pixmap, MOVE_WRITE | MOVE_READ | MOVE_ASYNC_HINT | __MOVE_FORCE)) return NULL; sna_damage_all(&priv->gpu_damage, pixmap); DBG(("%s: allocated GPU bo for operation\n", __FUNCTION__)); goto done; } goto move_to_gpu; } if ((priv->cpu_damage == NULL || flags & IGNORE_DAMAGE)) { if (priv->gpu_bo && priv->gpu_bo->tiling) { DBG(("%s: prefer to use GPU bo for rendering large pixmaps\n", __FUNCTION__)); goto prefer_gpu_bo; } if (priv->cpu_bo->pitch >= 4096) { DBG(("%s: prefer to use GPU bo for rendering wide pixmaps\n", __FUNCTION__)); goto prefer_gpu_bo; } } if ((flags & IGNORE_DAMAGE) == 0 && priv->cpu_bo->snoop) { DBG(("%s: prefer to use GPU bo for reading from snooped target bo\n", __FUNCTION__)); goto prefer_gpu_bo; } if (!sna->kgem.can_blt_cpu) { DBG(("%s: can't render to CPU bo, try to use GPU bo\n", __FUNCTION__)); goto prefer_gpu_bo; } } if (!sna->kgem.can_blt_cpu) goto cpu_fail; if (!sna_drawable_move_region_to_cpu(&pixmap->drawable, ®ion, (flags & IGNORE_DAMAGE ? 0 : MOVE_READ) | MOVE_WRITE | MOVE_ASYNC_HINT)) { DBG(("%s: failed to move-to-cpu, fallback\n", __FUNCTION__)); goto cpu_fail; } if (priv->shm) { assert(!priv->flush); sna_add_flush_pixmap(sna, priv, priv->cpu_bo); /* As we may have flushed and retired,, recheck for busy bo */ if ((flags & FORCE_GPU) == 0 && !kgem_bo_is_busy(priv->cpu_bo)) return NULL; } if (priv->flush) { assert(!priv->shm); sna_add_flush_pixmap(sna, priv, priv->gpu_bo); } if (sna_damage_is_all(&priv->cpu_damage, pixmap->drawable.width, pixmap->drawable.height)) { sna_damage_destroy(&priv->gpu_damage); *damage = NULL; } else { assert(!DAMAGE_IS_ALL(priv->cpu_damage)); if (priv->cpu_damage && sna_damage_contains_box__no_reduce(priv->cpu_damage, ®ion.extents)) { assert(sna_damage_contains_box(&priv->gpu_damage, ®ion.extents) == PIXMAN_REGION_OUT); assert(sna_damage_contains_box(&priv->cpu_damage, ®ion.extents) == PIXMAN_REGION_IN); *damage = NULL; } else *damage = &priv->cpu_damage; } DBG(("%s: using CPU bo with damage? %d\n", __FUNCTION__, *damage != NULL)); assert(damage == NULL || !DAMAGE_IS_ALL(*damage)); assert(priv->clear == false); priv->cpu = false; return priv->cpu_bo; } PixmapPtr sna_pixmap_create_upload(ScreenPtr screen, int width, int height, int depth, unsigned flags) { struct sna *sna = to_sna_from_screen(screen); PixmapPtr pixmap; struct sna_pixmap *priv; void *ptr; DBG(("%s(%d, %d, %d, flags=%x)\n", __FUNCTION__, width, height, depth, flags)); assert(width); assert(height); if (depth == 1) return create_pixmap(sna, screen, width, height, depth, CREATE_PIXMAP_USAGE_SCRATCH); pixmap = create_pixmap_hdr(sna, screen, width, height, depth, CREATE_PIXMAP_USAGE_SCRATCH, &priv); if (!pixmap) return NullPixmap; priv->gpu_bo = kgem_create_buffer_2d(&sna->kgem, width, height, pixmap->drawable.bitsPerPixel, flags, &ptr); if (!priv->gpu_bo) { free(priv); FreePixmap(pixmap); return NullPixmap; } /* Marking both the shadow and the GPU bo is a little dubious, * but will work so long as we always check before doing the * transfer. */ sna_damage_all(&priv->gpu_damage, pixmap); sna_damage_all(&priv->cpu_damage, pixmap); pixmap->devKind = priv->gpu_bo->pitch; pixmap->devPrivate.ptr = ptr; priv->ptr = MAKE_STATIC_PTR(ptr); priv->stride = priv->gpu_bo->pitch; priv->create = 0; pixmap->usage_hint = 0; if (!kgem_buffer_is_inplace(priv->gpu_bo)) pixmap->usage_hint = 1; DBG(("%s: serial=%ld, %dx%d, usage=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height, pixmap->usage_hint)); return pixmap; } static bool can_convert_to_gpu(struct sna_pixmap *priv, unsigned flags) { assert(priv->gpu_bo == NULL); if (priv->cpu_bo == NULL) return false; if (priv->shm) return false; /* Linear scanout have a restriction that their pitch must be * 64 byte aligned. Force the creation of a proper GPU bo if * this CPU bo is not suitable for scanout. */ if (priv->pixmap->usage_hint == SNA_CREATE_FB || flags & __MOVE_SCANOUT) if (priv->cpu_bo->pitch & 63) return false; if (flags & __MOVE_PRIME) if (priv->cpu_bo->pitch & 255) return false; return true; } struct sna_pixmap * sna_pixmap_move_to_gpu(PixmapPtr pixmap, unsigned flags) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; const BoxRec *box; int n; DBG(("%s(pixmap=%ld, usage=%d), flags=%x\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->usage_hint, flags)); priv = __sna_pixmap_for_gpu(sna, pixmap, flags); if (priv == NULL) return NULL; assert_pixmap_damage(pixmap); if (priv->move_to_gpu && !priv->move_to_gpu(sna, priv, flags | ((priv->cpu_damage && (flags & MOVE_READ)) ? MOVE_WRITE : 0))) { DBG(("%s: move-to-gpu override failed\n", __FUNCTION__)); return NULL; } if ((flags & MOVE_READ) == 0 && UNDO) kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); if (priv->cow) { unsigned cow = flags & (MOVE_READ | MOVE_WRITE | __MOVE_FORCE); if (flags & MOVE_READ && priv->cpu_damage) cow |= MOVE_WRITE; if (cow) { if (!sna_pixmap_undo_cow(sna, priv, cow)) return NULL; if (priv->gpu_bo == NULL) sna_damage_destroy(&priv->gpu_damage); } } if (sna_damage_is_all(&priv->gpu_damage, pixmap->drawable.width, pixmap->drawable.height)) { DBG(("%s: already all-damaged\n", __FUNCTION__)); assert(DAMAGE_IS_ALL(priv->gpu_damage)); assert(priv->gpu_bo); assert(priv->gpu_bo->proxy == NULL); assert_pixmap_map(pixmap, priv); sna_damage_destroy(&priv->cpu_damage); list_del(&priv->flush_list); goto active; } if ((flags & MOVE_READ) == 0) sna_damage_destroy(&priv->cpu_damage); sna_damage_reduce(&priv->cpu_damage); assert_pixmap_damage(pixmap); DBG(("%s: CPU damage? %d\n", __FUNCTION__, priv->cpu_damage != NULL)); if (priv->gpu_bo == NULL || kgem_bo_discard_cache(priv->gpu_bo, flags & (MOVE_WRITE | __MOVE_FORCE))) { struct kgem_bo *proxy; proxy = priv->gpu_bo; priv->gpu_bo = NULL; DBG(("%s: creating GPU bo (%dx%d@%d), create=%x\n", __FUNCTION__, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, priv->create)); assert(!priv->mapped); assert(list_is_empty(&priv->flush_list)); if (flags & __MOVE_FORCE || priv->create & KGEM_CAN_CREATE_GPU) { bool is_linear; assert(pixmap->drawable.width > 0); assert(pixmap->drawable.height > 0); assert(pixmap->drawable.bitsPerPixel >= 8); if (flags & __MOVE_PRIME) { assert((flags & __MOVE_TILED) == 0); is_linear = true; } else { is_linear = sna_pixmap_default_tiling(sna, pixmap) == I915_TILING_NONE; if (is_linear && flags & __MOVE_TILED) { DBG(("%s: not creating linear GPU bo\n", __FUNCTION__)); return NULL; } } if (is_linear && can_convert_to_gpu(priv, flags) && kgem_bo_convert_to_gpu(&sna->kgem, priv->cpu_bo, flags)) { assert(!priv->mapped); assert(!IS_STATIC_PTR(priv->ptr)); #ifdef DEBUG_MEMORY sna->debug_memory.cpu_bo_allocs--; sna->debug_memory.cpu_bo_bytes -= kgem_bo_size(priv->cpu_bo); #endif priv->gpu_bo = priv->cpu_bo; priv->cpu_bo = NULL; priv->ptr = NULL; pixmap->devPrivate.ptr = NULL; sna_damage_all(&priv->gpu_damage, pixmap); sna_damage_destroy(&priv->cpu_damage); } else { unsigned create = 0; if (flags & MOVE_INPLACE_HINT || (priv->cpu_damage && priv->cpu_bo == NULL)) create = CREATE_GTT_MAP | CREATE_INACTIVE; if (flags & __MOVE_PRIME) create |= CREATE_GTT_MAP | CREATE_PRIME | CREATE_EXACT; sna_pixmap_alloc_gpu(sna, pixmap, priv, create); } } if (priv->gpu_bo == NULL) { DBG(("%s: not creating GPU bo\n", __FUNCTION__)); assert(priv->gpu_damage == NULL); priv->gpu_bo = proxy; if (proxy) sna_damage_all(&priv->cpu_damage, pixmap); return NULL; } if (proxy) { DBG(("%s: promoting upload proxy handle=%d to GPU\n", __FUNCTION__, proxy->handle)); if (priv->cpu_damage && sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, proxy, 0, 0, &pixmap->drawable, priv->gpu_bo, 0, 0, region_rects(DAMAGE_REGION(priv->cpu_damage)), region_num_rects(DAMAGE_REGION(priv->cpu_damage)), 0)) sna_damage_destroy(&priv->cpu_damage); kgem_bo_destroy(&sna->kgem, proxy); } if (flags & MOVE_WRITE && priv->cpu_damage == NULL) { /* Presume that we will only ever write to the GPU * bo. Readbacks are expensive but fairly constant * in cost for all sizes i.e. it is the act of * synchronisation that takes the most time. This is * mitigated by avoiding fallbacks in the first place. */ assert(priv->gpu_bo); assert(priv->gpu_bo->proxy == NULL); sna_damage_all(&priv->gpu_damage, pixmap); DBG(("%s: marking as all-damaged for GPU\n", __FUNCTION__)); goto active; } } if (priv->gpu_bo->proxy) { DBG(("%s: reusing cached upload\n", __FUNCTION__)); assert((flags & MOVE_WRITE) == 0); assert(priv->gpu_damage == NULL); return priv; } if (priv->cpu_damage == NULL) goto done; if (DAMAGE_IS_ALL(priv->cpu_damage) && priv->cpu_bo && !priv->pinned && !priv->shm && priv->gpu_bo->tiling == I915_TILING_NONE && kgem_bo_convert_to_gpu(&sna->kgem, priv->cpu_bo, flags)) { assert(!priv->mapped); assert(!IS_STATIC_PTR(priv->ptr)); #ifdef DEBUG_MEMORY sna->debug_memory.cpu_bo_allocs--; sna->debug_memory.cpu_bo_bytes -= kgem_bo_size(priv->cpu_bo); #endif sna_pixmap_free_gpu(sna, priv); priv->gpu_bo = priv->cpu_bo; priv->cpu_bo = NULL; priv->ptr = NULL; pixmap->devPrivate.ptr = NULL; sna_damage_all(&priv->gpu_damage, pixmap); sna_damage_destroy(&priv->cpu_damage); goto done; } if (priv->shm) { assert(!priv->flush); sna_add_flush_pixmap(sna, priv, priv->cpu_bo); } n = sna_damage_get_boxes(priv->cpu_damage, &box); assert(n); if (n) { bool ok; assert_pixmap_contains_damage(pixmap, priv->cpu_damage); DBG(("%s: uploading %d damage boxes\n", __FUNCTION__, n)); ok = false; if (use_cpu_bo_for_upload(sna, priv, flags)) { DBG(("%s: using CPU bo for upload to GPU\n", __FUNCTION__)); ok = sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, priv->cpu_bo, 0, 0, &pixmap->drawable, priv->gpu_bo, 0, 0, box, n, 0); } if (!ok) { sna_pixmap_unmap(pixmap, priv); if (pixmap->devPrivate.ptr == NULL) return NULL; assert(pixmap->devKind); if (n == 1 && !priv->pinned && (box->x2 - box->x1) >= pixmap->drawable.width && (box->y2 - box->y1) >= pixmap->drawable.height) { ok = sna_replace(sna, pixmap, pixmap->devPrivate.ptr, pixmap->devKind); } else { ok = sna_write_boxes(sna, pixmap, priv->gpu_bo, 0, 0, pixmap->devPrivate.ptr, pixmap->devKind, 0, 0, box, n); } if (!ok) return NULL; } } __sna_damage_destroy(DAMAGE_PTR(priv->cpu_damage)); priv->cpu_damage = NULL; /* For large bo, try to keep only a single copy around */ if (priv->create & KGEM_CAN_CREATE_LARGE || flags & MOVE_SOURCE_HINT) { DBG(("%s: disposing of system copy for large/source\n", __FUNCTION__)); assert(!priv->shm); assert(priv->gpu_bo); assert(priv->gpu_bo->proxy == NULL); sna_damage_all(&priv->gpu_damage, pixmap); sna_pixmap_free_cpu(sna, priv, (priv->create & KGEM_CAN_CREATE_LARGE) ? false : priv->cpu); } done: list_del(&priv->flush_list); sna_damage_reduce_all(&priv->gpu_damage, pixmap); if (DAMAGE_IS_ALL(priv->gpu_damage)) sna_pixmap_free_cpu(sna, priv, priv->cpu); active: if (flags & MOVE_WRITE) { priv->clear = false; priv->cpu = false; } assert(!priv->gpu_bo->proxy || (flags & MOVE_WRITE) == 0); return sna_pixmap_mark_active(sna, priv); } static bool must_check sna_validate_pixmap(DrawablePtr draw, PixmapPtr pixmap) { DBG(("%s: target bpp=%d, source bpp=%d\n", __FUNCTION__, draw->bitsPerPixel, pixmap->drawable.bitsPerPixel)); if (draw->bitsPerPixel == pixmap->drawable.bitsPerPixel && FbEvenTile(pixmap->drawable.width * pixmap->drawable.bitsPerPixel)) { DBG(("%s: flushing pixmap\n", __FUNCTION__)); if (!sna_pixmap_move_to_cpu(pixmap, MOVE_READ)) return false; fbPadPixmap(pixmap); } return true; } static bool must_check sna_gc_move_to_cpu(GCPtr gc, DrawablePtr drawable, RegionPtr region) { struct sna_gc *sgc = sna_gc(gc); long changes = sgc->changes; DBG(("%s(%p) changes=%lx\n", __FUNCTION__, gc, changes)); assert(drawable); assert(region); assert(gc->ops == (GCOps *)&sna_gc_ops); gc->ops = (GCOps *)&sna_gc_ops__cpu; assert(gc->funcs); sgc->old_funcs = gc->funcs; gc->funcs = (GCFuncs *)&sna_gc_funcs__cpu; assert(gc->pCompositeClip); sgc->priv = gc->pCompositeClip; gc->pCompositeClip = region; #if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(1,16,99,901,0) if (gc->clientClipType == CT_PIXMAP) { PixmapPtr clip = gc->clientClip; gc->clientClip = region_from_bitmap(gc->pScreen, clip); gc->pScreen->DestroyPixmap(clip); gc->clientClipType = gc->clientClip ? CT_REGION : CT_NONE; changes |= GCClipMask; } else changes &= ~GCClipMask; #else changes &= ~GCClipMask; #endif if (changes || drawable->serialNumber != (sgc->serial & DRAWABLE_SERIAL_BITS)) { long tmp = gc->serialNumber; gc->serialNumber = sgc->serial; if (fb_gc(gc)->bpp != drawable->bitsPerPixel) { changes |= GCStipple | GCForeground | GCBackground | GCPlaneMask; fb_gc(gc)->bpp = drawable->bitsPerPixel; } if (changes & GCTile && !gc->tileIsPixel) { DBG(("%s: flushing tile pixmap\n", __FUNCTION__)); if (!sna_validate_pixmap(drawable, gc->tile.pixmap)) return false; } if (changes & GCStipple && gc->stipple) { DBG(("%s: flushing stipple pixmap\n", __FUNCTION__)); if (!sna_validate_pixmap(drawable, gc->stipple)) return false; } fbValidateGC(gc, changes, drawable); gc->serialNumber = tmp; } sgc->changes = 0; switch (gc->fillStyle) { case FillTiled: DBG(("%s: moving tile to cpu\n", __FUNCTION__)); return sna_drawable_move_to_cpu(&gc->tile.pixmap->drawable, MOVE_READ); case FillStippled: case FillOpaqueStippled: DBG(("%s: moving stipple to cpu\n", __FUNCTION__)); return sna_drawable_move_to_cpu(&gc->stipple->drawable, MOVE_READ); default: return true; } } static void sna_gc_move_to_gpu(GCPtr gc) { DBG(("%s(%p)\n", __FUNCTION__, gc)); assert(gc->ops == (GCOps *)&sna_gc_ops__cpu); assert(gc->funcs == (GCFuncs *)&sna_gc_funcs__cpu); gc->ops = (GCOps *)&sna_gc_ops; gc->funcs = (GCFuncs *)sna_gc(gc)->old_funcs; assert(gc->funcs); gc->pCompositeClip = sna_gc(gc)->priv; assert(gc->pCompositeClip); } static inline bool clip_box(BoxPtr box, GCPtr gc) { const BoxRec *clip; bool clipped; assert(gc->pCompositeClip); clip = &gc->pCompositeClip->extents; clipped = !region_is_singular(gc->pCompositeClip); if (box->x1 < clip->x1) box->x1 = clip->x1, clipped = true; if (box->x2 > clip->x2) box->x2 = clip->x2, clipped = true; if (box->y1 < clip->y1) box->y1 = clip->y1, clipped = true; if (box->y2 > clip->y2) box->y2 = clip->y2, clipped = true; return clipped; } static inline void translate_box(BoxPtr box, DrawablePtr d) { box->x1 += d->x; box->x2 += d->x; box->y1 += d->y; box->y2 += d->y; } static inline bool trim_and_translate_box(BoxPtr box, DrawablePtr d, GCPtr gc) { translate_box(box, d); return clip_box(box, gc); } static inline bool box32_clip(Box32Rec *box, GCPtr gc) { bool clipped = !region_is_singular(gc->pCompositeClip); const BoxRec *clip = &gc->pCompositeClip->extents; if (box->x1 < clip->x1) box->x1 = clip->x1, clipped = true; if (box->x2 > clip->x2) box->x2 = clip->x2, clipped = true; if (box->y1 < clip->y1) box->y1 = clip->y1, clipped = true; if (box->y2 > clip->y2) box->y2 = clip->y2, clipped = true; return clipped; } static inline void box32_translate(Box32Rec *box, DrawablePtr d) { box->x1 += d->x; box->x2 += d->x; box->y1 += d->y; box->y2 += d->y; } static inline bool box32_trim_and_translate(Box32Rec *box, DrawablePtr d, GCPtr gc) { box32_translate(box, d); return box32_clip(box, gc); } static inline void box_add_pt(BoxPtr box, int16_t x, int16_t y) { if (box->x1 > x) box->x1 = x; else if (box->x2 < x) box->x2 = x; if (box->y1 > y) box->y1 = y; else if (box->y2 < y) box->y2 = y; } static inline bool box32_to_box16(const Box32Rec *b32, BoxRec *b16) { b16->x1 = b32->x1; b16->y1 = b32->y1; b16->x2 = b32->x2; b16->y2 = b32->y2; return b16->x2 > b16->x1 && b16->y2 > b16->y1; } static inline void box32_add_rect(Box32Rec *box, const xRectangle *r) { int32_t v; v = r->x; if (box->x1 > v) box->x1 = v; v += r->width; if (box->x2 < v) box->x2 = v; v = r->y; if (box->y1 > v) box->y1 = v; v += r->height; if (box->y2 < v) box->y2 = v; } static bool can_create_upload_tiled_x(struct sna *sna, PixmapPtr pixmap, struct sna_pixmap *priv, bool replaces) { if (priv->shm || (priv->cpu && !replaces)) return false; if ((priv->create & KGEM_CAN_CREATE_GPU) == 0) return false; if (sna->kgem.has_llc) return true; if (!sna->kgem.has_wc_mmap && sna_pixmap_default_tiling(sna, pixmap)) return false; return true; } static bool create_upload_tiled_x(struct sna *sna, PixmapPtr pixmap, struct sna_pixmap *priv, bool replaces) { unsigned create; if (!can_create_upload_tiled_x(sna, pixmap, priv, replaces)) return false; assert(priv->gpu_bo == NULL); assert(priv->gpu_damage == NULL); if (sna->kgem.has_llc) create = CREATE_CPU_MAP | CREATE_INACTIVE; else if (sna->kgem.has_wc_mmap) create = CREATE_GTT_MAP | CREATE_INACTIVE; else create = CREATE_CPU_MAP | CREATE_INACTIVE | CREATE_CACHED; return sna_pixmap_alloc_gpu(sna, pixmap, priv, create); } static bool can_upload__tiled_x(struct kgem *kgem, struct kgem_bo *bo) { return kgem_bo_can_map__cpu(kgem, bo, true) || kgem->has_wc_mmap; } static bool try_upload__tiled_x(PixmapPtr pixmap, RegionRec *region, int x, int y, int w, int h, char *bits, int stride) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv = sna_pixmap(pixmap); const BoxRec *box; uint8_t *dst; int n; if (!can_upload__tiled_x(&sna->kgem, priv->gpu_bo)) { DBG(("%s: no, cannot map through the CPU\n", __FUNCTION__)); return false; } if (!sna_pixmap_move_area_to_gpu(pixmap, ®ion->extents, MOVE_WRITE | (region->data ? MOVE_READ : 0))) return false; if ((priv->create & KGEM_CAN_CREATE_LARGE) == 0 && __kgem_bo_is_busy(&sna->kgem, priv->gpu_bo)) return false; if (kgem_bo_can_map__cpu(&sna->kgem, priv->gpu_bo, true)) { dst = kgem_bo_map__cpu(&sna->kgem, priv->gpu_bo); if (dst == NULL) return false; kgem_bo_sync__cpu(&sna->kgem, priv->gpu_bo); } else { dst = kgem_bo_map__wc(&sna->kgem, priv->gpu_bo); if (dst == NULL) return false; kgem_bo_sync__gtt(&sna->kgem, priv->gpu_bo); } box = region_rects(region); n = region_num_rects(region); DBG(("%s: upload(%d, %d, %d, %d) x %d\n", __FUNCTION__, x, y, w, h, n)); if (sigtrap_get()) return false; if (priv->gpu_bo->tiling) { do { DBG(("%s: copy tiled box (%d, %d)->(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1 - x, box->y1 - y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x2 > box->x1); assert(box->y2 > box->y1); assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->x2 <= pixmap->drawable.width); assert(box->y2 <= pixmap->drawable.height); assert(box->x1 - x >= 0); assert(box->y1 - y >= 0); assert(box->x2 - x <= w); assert(box->y2 - y <= h); memcpy_to_tiled_x(&sna->kgem, bits, dst, pixmap->drawable.bitsPerPixel, stride, priv->gpu_bo->pitch, box->x1 - x, box->y1 - y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); } else { do { DBG(("%s: copy lined box (%d, %d)->(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1 - x, box->y1 - y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x2 > box->x1); assert(box->y2 > box->y1); assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->x2 <= pixmap->drawable.width); assert(box->y2 <= pixmap->drawable.height); assert(box->x1 - x >= 0); assert(box->y1 - y >= 0); assert(box->x2 - x <= w); assert(box->y2 - y <= h); memcpy_blt(bits, dst, pixmap->drawable.bitsPerPixel, stride, priv->gpu_bo->pitch, box->x1 - x, box->y1 - y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); if (!priv->shm) { pixmap->devPrivate.ptr = dst; pixmap->devKind = priv->gpu_bo->pitch; if (dst == MAP(priv->gpu_bo->map__cpu)) { priv->mapped = MAPPED_CPU; priv->cpu = true; } else priv->mapped = MAPPED_GTT; assert_pixmap_map(pixmap, priv); } } sigtrap_put(); return true; } static bool try_upload__inplace(PixmapPtr pixmap, RegionRec *region, int x, int y, int w, int h, char *bits, int stride) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv = sna_pixmap(pixmap); bool ignore_cpu = false; bool replaces; const BoxRec *box; uint8_t *dst; int n; if (!USE_INPLACE) return false; assert(priv); if (priv->shm && priv->gpu_damage == NULL) return false; replaces = region_subsumes_pixmap(region, pixmap); DBG(("%s: bo? %d, can map? %d, replaces? %d\n", __FUNCTION__, priv->gpu_bo != NULL, priv->gpu_bo ? kgem_bo_can_map__cpu(&sna->kgem, priv->gpu_bo, true) : 0, replaces)); if (kgem_bo_discard_cache(priv->gpu_bo, true)) { DBG(("%s: discarding cached upload buffer\n", __FUNCTION__)); assert(DAMAGE_IS_ALL(priv->cpu_damage)); assert(priv->gpu_damage == NULL || DAMAGE_IS_ALL(priv->gpu_damage)); /* magical upload buffer */ assert(!priv->pinned); assert(!priv->mapped); sna_damage_destroy(&priv->gpu_damage); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = NULL; } if (priv->gpu_bo && replaces) { if (UNDO) kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); if (can_create_upload_tiled_x(sna, pixmap, priv, true) && (priv->cow || __kgem_bo_is_busy(&sna->kgem, priv->gpu_bo) || !kgem_bo_can_map__cpu(&sna->kgem, priv->gpu_bo, true))) { DBG(("%s: discarding unusable target bo (busy? %d, mappable? %d)\n", __FUNCTION__, kgem_bo_is_busy(priv->gpu_bo), kgem_bo_can_map__cpu(&sna->kgem, priv->gpu_bo, true))); sna_pixmap_free_gpu(sna, priv); ignore_cpu = true; } } assert(priv->gpu_bo == NULL || priv->gpu_bo->proxy == NULL); if (priv->cow || (priv->move_to_gpu && !sna_pixmap_discard_shadow_damage(priv, replaces ? NULL : region))) { DBG(("%s: no, has pending COW? %d or move-to-gpu? %d\n", __FUNCTION__, priv->cow != NULL, priv->move_to_gpu != NULL)); return false; } if (priv->gpu_damage && region_subsumes_damage(region, priv->gpu_damage)) { if (UNDO) kgem_bo_undo(&sna->kgem, priv->gpu_bo); if (can_create_upload_tiled_x(sna, pixmap, priv, priv->cpu_damage == NULL) && (__kgem_bo_is_busy(&sna->kgem, priv->gpu_bo) || !kgem_bo_can_map__cpu(&sna->kgem, priv->gpu_bo, true))) { DBG(("%s: discarding unusable partial target bo (busy? %d, mappable? %d)\n", __FUNCTION__, kgem_bo_is_busy(priv->gpu_bo), kgem_bo_can_map__cpu(&sna->kgem, priv->gpu_bo, true))); sna_pixmap_free_gpu(sna, priv); ignore_cpu = priv->cpu_damage == NULL; if (priv->ptr) sna_damage_all(&priv->cpu_damage, pixmap); } } if (priv->gpu_bo == NULL && !create_upload_tiled_x(sna, pixmap, priv, ignore_cpu)) return false; DBG(("%s: tiling=%d\n", __FUNCTION__, priv->gpu_bo->tiling)); switch (priv->gpu_bo->tiling) { case I915_TILING_Y: break; case I915_TILING_X: if (!sna->kgem.memcpy_to_tiled_x) break; default: if (try_upload__tiled_x(pixmap, region, x, y, w, h, bits, stride)) goto done; break; } if (priv->gpu_damage == NULL && !box_inplace(pixmap, ®ion->extents)) { DBG(("%s: no, too small to bother with using the GTT\n", __FUNCTION__)); return false; } if (!kgem_bo_can_map(&sna->kgem, priv->gpu_bo)) { DBG(("%s: no, cannot map through the CPU\n", __FUNCTION__)); return false; } if (!sna_pixmap_move_area_to_gpu(pixmap, ®ion->extents, MOVE_WRITE | (region->data ? MOVE_READ : 0))) return false; if ((priv->create & KGEM_CAN_CREATE_LARGE) == 0 && __kgem_bo_is_busy(&sna->kgem, priv->gpu_bo)) return false; dst = kgem_bo_map(&sna->kgem, priv->gpu_bo); if (dst == NULL) return false; pixmap->devPrivate.ptr = dst; pixmap->devKind = priv->gpu_bo->pitch; priv->mapped = dst == MAP(priv->gpu_bo->map__cpu) ? MAPPED_CPU : MAPPED_GTT; assert(has_coherent_ptr(sna, priv, MOVE_WRITE)); box = region_rects(region); n = region_num_rects(region); DBG(("%s: upload(%d, %d, %d, %d) x %d\n", __FUNCTION__, x, y, w, h, n)); if (sigtrap_get()) return false; do { DBG(("%s: copy lined box (%d, %d)->(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1 - x, box->y1 - y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x2 > box->x1); assert(box->y2 > box->y1); assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->x2 <= pixmap->drawable.width); assert(box->y2 <= pixmap->drawable.height); assert(box->x1 - x >= 0); assert(box->y1 - y >= 0); assert(box->x2 - x <= w); assert(box->y2 - y <= h); memcpy_blt(bits, dst, pixmap->drawable.bitsPerPixel, stride, priv->gpu_bo->pitch, box->x1 - x, box->y1 - y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); sigtrap_put(); done: if (!DAMAGE_IS_ALL(priv->gpu_damage)) { if (replaces) { sna_damage_all(&priv->gpu_damage, pixmap); } else { sna_damage_add_to_pixmap(&priv->gpu_damage, region, pixmap); sna_damage_reduce_all(&priv->gpu_damage, pixmap); } if (DAMAGE_IS_ALL(priv->gpu_damage)) sna_damage_destroy(&priv->cpu_damage); else sna_damage_subtract(&priv->cpu_damage, region); if (priv->cpu_damage == NULL) { list_del(&priv->flush_list); sna_damage_all(&priv->gpu_damage, pixmap); } if (priv->shm) sna_add_flush_pixmap(sna, priv, priv->cpu_bo); } assert(!priv->clear); return true; } static bool try_upload__blt(PixmapPtr pixmap, RegionRec *region, int x, int y, int w, int h, char *bits, int stride) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; struct kgem_bo *src_bo; bool ok; if (!sna->kgem.has_userptr || !USE_USERPTR_UPLOADS) return false; priv = sna_pixmap(pixmap); assert(priv); assert(priv->gpu_bo); assert(priv->gpu_bo->proxy == NULL); if (priv->cpu_damage && (DAMAGE_IS_ALL(priv->cpu_damage) || sna_damage_contains_box__no_reduce(priv->cpu_damage, ®ion->extents)) && !box_inplace(pixmap, ®ion->extents)) { DBG(("%s: no, damage on CPU and too small\n", __FUNCTION__)); return false; } src_bo = kgem_create_map(&sna->kgem, bits, stride * h, true); if (src_bo == NULL) return false; src_bo->pitch = stride; kgem_bo_mark_unreusable(src_bo); if (!sna_pixmap_move_area_to_gpu(pixmap, ®ion->extents, MOVE_WRITE | MOVE_ASYNC_HINT | (region->data ? MOVE_READ : 0))) { kgem_bo_destroy(&sna->kgem, src_bo); return false; } DBG(("%s: upload(%d, %d, %d, %d) x %d through a temporary map\n", __FUNCTION__, x, y, w, h, region_num_rects(region))); if (sigtrap_get() == 0) { ok = sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, src_bo, -x, -y, &pixmap->drawable, priv->gpu_bo, 0, 0, region_rects(region), region_num_rects(region), COPY_LAST); sigtrap_put(); } else ok = false; kgem_bo_sync__cpu(&sna->kgem, src_bo); assert(src_bo->rq == NULL); kgem_bo_destroy(&sna->kgem, src_bo); if (!ok) { DBG(("%s: copy failed!\n", __FUNCTION__)); return false; } if (!DAMAGE_IS_ALL(priv->gpu_damage)) { assert(!priv->clear); if (region_subsumes_drawable(region, &pixmap->drawable)) { sna_damage_all(&priv->gpu_damage, pixmap); } else { sna_damage_add_to_pixmap(&priv->gpu_damage, region, pixmap); sna_damage_reduce_all(&priv->gpu_damage, pixmap); } if (DAMAGE_IS_ALL(priv->gpu_damage)) sna_damage_destroy(&priv->cpu_damage); else sna_damage_subtract(&priv->cpu_damage, region); if (priv->cpu_damage == NULL) { list_del(&priv->flush_list); if (sna_pixmap_free_cpu(sna, priv, priv->cpu)) sna_damage_all(&priv->gpu_damage, pixmap); } } priv->cpu = false; priv->clear = false; return true; } static bool ignore_cpu_damage(struct sna *sna, struct sna_pixmap *priv, const RegionRec *region) { if (region_subsumes_pixmap(region, priv->pixmap)) return true; if (priv->cpu_damage != NULL) { if (DAMAGE_IS_ALL(priv->cpu_damage)) return false; if (!box_inplace(priv->pixmap, ®ion->extents)) return false; if (sna_damage_contains_box__no_reduce(priv->cpu_damage, ®ion->extents)) return false; } return priv->gpu_bo == NULL || !__kgem_bo_is_busy(&sna->kgem, priv->gpu_bo); } static bool try_upload__fast(PixmapPtr pixmap, RegionRec *region, int x, int y, int w, int h, char *bits, int stride) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; if (wedged(sna)) return false; priv = sna_pixmap(pixmap); if (priv == NULL) return false; if (ignore_cpu_damage(sna, priv, region)) { DBG(("%s: ignore existing cpu damage (if any)\n", __FUNCTION__)); if (try_upload__inplace(pixmap, region, x, y, w, h, bits, stride)) return true; } if (DAMAGE_IS_ALL(priv->cpu_damage) || priv->gpu_damage == NULL || priv->cpu) { DBG(("%s: no, no gpu damage\n", __FUNCTION__)); return false; } assert(priv->gpu_bo); assert(priv->gpu_bo->proxy == NULL); if (try_upload__blt(pixmap, region, x, y, w, h, bits, stride)) return true; if (try_upload__inplace(pixmap, region, x, y, w, h, bits, stride)) return true; return false; } static bool sna_put_zpixmap_blt(DrawablePtr drawable, GCPtr gc, RegionPtr region, int x, int y, int w, int h, char *bits, int stride) { PixmapPtr pixmap = get_drawable_pixmap(drawable); unsigned int hint; const BoxRec *box; int16_t dx, dy; int n; assert_pixmap_contains_box(pixmap, RegionExtents(region)); if (gc->alu != GXcopy) return false; if (drawable->depth < 8) return false; get_drawable_deltas(drawable, pixmap, &dx, &dy); x += dx + drawable->x; y += dy + drawable->y; assert(region->extents.x1 >= x); assert(region->extents.y1 >= y); assert(region->extents.x2 <= x + w); assert(region->extents.y2 <= y + h); if (try_upload__fast(pixmap, region, x, y, w, h, bits, stride)) return true; hint = MOVE_WRITE; if (region_is_unclipped(region, pixmap->drawable.width, h) && (h+1)*stride > 65536) { DBG(("%s: segmented, unclipped large upload (%d bytes), marking WHOLE_HINT\n", __FUNCTION__, h*stride)); hint |= MOVE_WHOLE_HINT; } if (!sna_drawable_move_region_to_cpu(&pixmap->drawable, region, hint)) return false; if (sigtrap_get()) return false; /* Region is pre-clipped and translated into pixmap space */ box = region_rects(region); n = region_num_rects(region); DBG(("%s: upload(%d, %d, %d, %d) x %d boxes\n", __FUNCTION__, x, y, w, h, n)); do { DBG(("%s: copy box (%d, %d)->(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1 - x, box->y1 - y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x2 > box->x1); assert(box->y2 > box->y1); assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->x2 <= pixmap->drawable.width); assert(box->y2 <= pixmap->drawable.height); assert(box->x1 - x >= 0); assert(box->y1 - y >= 0); assert(box->x2 - x <= w); assert(box->y2 - y <= h); assert(has_coherent_ptr(to_sna_from_pixmap(pixmap), sna_pixmap(pixmap), MOVE_WRITE)); assert(pixmap->devKind); memcpy_blt(bits, pixmap->devPrivate.ptr, pixmap->drawable.bitsPerPixel, stride, pixmap->devKind, box->x1 - x, box->y1 - y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); sigtrap_put(); assert_pixmap_damage(pixmap); return true; } static inline uint8_t byte_reverse(uint8_t b) { return ((b * 0x80200802ULL) & 0x0884422110ULL) * 0x0101010101ULL >> 32; } static inline uint8_t blt_depth(int depth) { switch (depth) { case 8: return 0; case 15: return 0x2; case 16: return 0x1; default: return 0x3; } } static bool sna_put_xybitmap_blt(DrawablePtr drawable, GCPtr gc, RegionPtr region, int x, int y, int w, int h, char *bits) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_damage **damage; struct kgem_bo *bo; const BoxRec *box; int16_t dx, dy; int n; uint8_t rop = copy_ROP[gc->alu]; bo = sna_drawable_use_bo(&pixmap->drawable, PREFER_GPU, ®ion->extents, &damage); if (bo == NULL) return false; if (bo->tiling == I915_TILING_Y) { DBG(("%s: converting bo from Y-tiling\n", __FUNCTION__)); assert(bo == __sna_pixmap_get_bo(pixmap)); bo = sna_pixmap_change_tiling(pixmap, I915_TILING_X); if (bo == NULL) { DBG(("%s: fallback -- unable to change tiling\n", __FUNCTION__)); return false; } } if (!kgem_bo_can_blt(&sna->kgem, bo)) return false; assert_pixmap_contains_box(pixmap, RegionExtents(region)); if (damage) sna_damage_add_to_pixmap(damage, region, pixmap); assert_pixmap_damage(pixmap); DBG(("%s: upload(%d, %d, %d, %d)\n", __FUNCTION__, x, y, w, h)); get_drawable_deltas(drawable, pixmap, &dx, &dy); x += dx + drawable->x; y += dy + drawable->y; kgem_set_mode(&sna->kgem, KGEM_BLT, bo); assert(kgem_bo_can_blt(&sna->kgem, bo)); /* Region is pre-clipped and translated into pixmap space */ box = region_rects(region); n = region_num_rects(region); do { int bx1 = (box->x1 - x) & ~7; int bx2 = (box->x2 - x + 7) & ~7; int bw = (bx2 - bx1)/8; int bh = box->y2 - box->y1; int bstride = ALIGN(bw, 2); struct kgem_bo *upload; void *ptr; if (!kgem_check_batch(&sna->kgem, 10) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc_and_exec(&sna->kgem, 2)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } upload = kgem_create_buffer(&sna->kgem, bstride*bh, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!upload) break; if (sigtrap_get() == 0) { int src_stride = BitmapBytePad(w); uint8_t *dst = ptr; uint8_t *src = (uint8_t*)bits + (box->y1 - y) * src_stride + bx1/8; uint32_t *b; bstride -= bw; src_stride -= bw; do { int i = bw; assert(src >= (uint8_t *)bits); do { *dst++ = byte_reverse(*src++); } while (--i); assert(src <= (uint8_t *)bits + BitmapBytePad(w) * h); assert(dst <= (uint8_t *)ptr + kgem_bo_size(upload)); dst += bstride; src += src_stride; } while (--bh); assert(sna->kgem.mode == KGEM_BLT); if (sna->kgem.gen >= 0100) { b = sna->kgem.batch + sna->kgem.nbatch; b[0] = XY_MONO_SRC_COPY | 3 << 20 | 8; b[0] |= ((box->x1 - x) & 7) << 17; b[1] = bo->pitch; if (bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= blt_depth(drawable->depth) << 24; b[1] |= rop << 16; b[2] = box->y1 << 16 | box->x1; b[3] = box->y2 << 16 | box->x2; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); *(uint64_t *)(b+6) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 6, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[8] = gc->bgPixel; b[9] = gc->fgPixel; sna->kgem.nbatch += 10; } else { b = sna->kgem.batch + sna->kgem.nbatch; b[0] = XY_MONO_SRC_COPY | 3 << 20 | 6; b[0] |= ((box->x1 - x) & 7) << 17; b[1] = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= blt_depth(drawable->depth) << 24; b[1] |= rop << 16; b[2] = box->y1 << 16 | box->x1; b[3] = box->y2 << 16 | box->x2; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; sna->kgem.nbatch += 8; } sigtrap_put(); } kgem_bo_destroy(&sna->kgem, upload); box++; } while (--n); sna->blt_state.fill_bo = 0; return true; } static bool sna_put_xypixmap_blt(DrawablePtr drawable, GCPtr gc, RegionPtr region, int x, int y, int w, int h, int left,char *bits) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_damage **damage; struct kgem_bo *bo; int16_t dx, dy; unsigned i, skip; if (gc->alu != GXcopy) return false; bo = sna_drawable_use_bo(&pixmap->drawable, PREFER_GPU, ®ion->extents, &damage); if (bo == NULL) return false; if (bo->tiling == I915_TILING_Y) { DBG(("%s: converting bo from Y-tiling\n", __FUNCTION__)); assert(bo == __sna_pixmap_get_bo(pixmap)); bo = sna_pixmap_change_tiling(pixmap, I915_TILING_X); if (bo == NULL) { DBG(("%s: fallback -- unable to change tiling\n", __FUNCTION__)); return false; } } if (!kgem_bo_can_blt(&sna->kgem, bo)) return false; assert_pixmap_contains_box(pixmap, RegionExtents(region)); if (damage) sna_damage_add_to_pixmap(damage, region, pixmap); assert_pixmap_damage(pixmap); DBG(("%s: upload(%d, %d, %d, %d)\n", __FUNCTION__, x, y, w, h)); get_drawable_deltas(drawable, pixmap, &dx, &dy); x += dx + drawable->x; y += dy + drawable->y; kgem_set_mode(&sna->kgem, KGEM_BLT, bo); assert(kgem_bo_can_blt(&sna->kgem, bo)); skip = h * BitmapBytePad(w + left); for (i = 1 << (gc->depth-1); i; i >>= 1, bits += skip) { const BoxRec *box = region_rects(region); int n = region_num_rects(region); if ((gc->planemask & i) == 0) continue; /* Region is pre-clipped and translated into pixmap space */ do { int bx1 = (box->x1 - x) & ~7; int bx2 = (box->x2 - x + 7) & ~7; int bw = (bx2 - bx1)/8; int bh = box->y2 - box->y1; int bstride = ALIGN(bw, 2); struct kgem_bo *upload; void *ptr; if (!kgem_check_batch(&sna->kgem, 14) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc_and_exec(&sna->kgem, 2)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } upload = kgem_create_buffer(&sna->kgem, bstride*bh, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!upload) break; if (sigtrap_get() == 0) { int src_stride = BitmapBytePad(w); uint8_t *src = (uint8_t*)bits + (box->y1 - y) * src_stride + bx1/8; uint8_t *dst = ptr; uint32_t *b; bstride -= bw; src_stride -= bw; do { int j = bw; assert(src >= (uint8_t *)bits); do { *dst++ = byte_reverse(*src++); } while (--j); assert(src <= (uint8_t *)bits + BitmapBytePad(w) * h); assert(dst <= (uint8_t *)ptr + kgem_bo_size(upload)); dst += bstride; src += src_stride; } while (--bh); assert(sna->kgem.mode == KGEM_BLT); if (sna->kgem.gen >= 0100) { assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; b[0] = XY_FULL_MONO_PATTERN_MONO_SRC_BLT | 3 << 20 | 12; b[0] |= ((box->x1 - x) & 7) << 17; b[1] = bo->pitch; if (bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 31; /* solid pattern */ b[1] |= blt_depth(drawable->depth) << 24; b[1] |= 0xce << 16; /* S or (D and !P) */ b[2] = box->y1 << 16 | box->x1; b[3] = box->y2 << 16 | box->x2; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); *(uint64_t *)(b+6) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 6, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[8] = 0; b[9] = i; b[10] = i; b[11] = i; b[12] = -1; b[13] = -1; sna->kgem.nbatch += 14; } else { b = sna->kgem.batch + sna->kgem.nbatch; b[0] = XY_FULL_MONO_PATTERN_MONO_SRC_BLT | 3 << 20 | 10; b[0] |= ((box->x1 - x) & 7) << 17; b[1] = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 31; /* solid pattern */ b[1] |= blt_depth(drawable->depth) << 24; b[1] |= 0xce << 16; /* S or (D and !P) */ b[2] = box->y1 << 16 | box->x1; b[3] = box->y2 << 16 | box->x2; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[6] = 0; b[7] = i; b[8] = i; b[9] = i; b[10] = -1; b[11] = -1; sna->kgem.nbatch += 12; } sigtrap_put(); } kgem_bo_destroy(&sna->kgem, upload); box++; } while (--n); } sna->blt_state.fill_bo = 0; return true; } static void sna_put_image(DrawablePtr drawable, GCPtr gc, int depth, int x, int y, int w, int h, int left, int format, char *bits) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv = sna_pixmap(pixmap); RegionRec region; int16_t dx, dy; DBG(("%s((%d, %d)x(%d, %d), depth=%d, format=%d)\n", __FUNCTION__, x, y, w, h, depth, format)); if (w == 0 || h == 0) return; region.extents.x1 = x + drawable->x; region.extents.y1 = y + drawable->y; region.extents.x2 = region.extents.x1 + w; region.extents.y2 = region.extents.y1 + h; region.data = NULL; if (!region_is_singular(gc->pCompositeClip) || gc->pCompositeClip->extents.x1 > region.extents.x1 || gc->pCompositeClip->extents.y1 > region.extents.y1 || gc->pCompositeClip->extents.x2 < region.extents.x2 || gc->pCompositeClip->extents.y2 < region.extents.y2) { if (!RegionIntersect(®ion, ®ion, gc->pCompositeClip) || box_empty(®ion.extents)) return; } if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) RegionTranslate(®ion, dx, dy); if (priv == NULL) { DBG(("%s: fallback -- unattached(%d, %d, %d, %d)\n", __FUNCTION__, x, y, w, h)); goto fallback; } if (FORCE_FALLBACK) goto fallback; if (wedged(sna)) goto fallback; if (!ACCEL_PUT_IMAGE) goto fallback; switch (format) { case ZPixmap: if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; if (sna_put_zpixmap_blt(drawable, gc, ®ion, x, y, w, h, bits, PixmapBytePad(w, depth))) return; break; case XYBitmap: if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; if (sna_put_xybitmap_blt(drawable, gc, ®ion, x, y, w, h, bits)) return; break; case XYPixmap: if (sna_put_xypixmap_blt(drawable, gc, ®ion, x, y, w, h, left, bits)) return; break; default: return; } fallback: DBG(("%s: fallback\n", __FUNCTION__)); RegionTranslate(®ion, -dx, -dy); if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, format == XYPixmap ? MOVE_READ | MOVE_WRITE : drawable_gc_flags(drawable, gc, false))) goto out; if (sigtrap_get() == 0) { DBG(("%s: fbPutImage(%d, %d, %d, %d)\n", __FUNCTION__, x, y, w, h)); fbPutImage(drawable, gc, depth, x, y, w, h, left, format, bits); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(®ion); } static bool source_contains_region(struct sna_damage *damage, const RegionRec *region, int16_t dx, int16_t dy) { BoxRec box; if (DAMAGE_IS_ALL(damage)) return true; if (damage == NULL) return false; box = region->extents; box.x1 += dx; box.x2 += dx; box.y1 += dy; box.y2 += dy; return sna_damage_contains_box__no_reduce(damage, &box); } static bool move_to_gpu(PixmapPtr pixmap, struct sna_pixmap *priv, RegionRec *region, int16_t dx, int16_t dy, uint8_t alu, bool dst_is_gpu) { int w = region->extents.x2 - region->extents.x1; int h = region->extents.y2 - region->extents.y1; int count; assert_pixmap_map(pixmap, priv); if (DAMAGE_IS_ALL(priv->gpu_damage)) { assert(priv->gpu_bo); return true; } if (dst_is_gpu && priv->cpu_bo && priv->cpu_damage) { DBG(("%s: can use CPU bo? cpu_damage=%d, gpu_damage=%d, cpu hint=%d\n", __FUNCTION__, priv->cpu_damage ? DAMAGE_IS_ALL(priv->cpu_damage) ? -1 : 1 : 0, priv->gpu_damage ? DAMAGE_IS_ALL(priv->gpu_damage) ? -1 : 1 : 0, priv->cpu)); if (DAMAGE_IS_ALL(priv->cpu_damage) || priv->gpu_damage == NULL) return false; if (priv->cpu && source_contains_region(priv->cpu_damage, region, dx, dy)) return false; } if (priv->gpu_bo) { DBG(("%s: has gpu bo (cpu damage?=%d, cpu=%d, gpu tiling=%d)\n", __FUNCTION__, priv->cpu_damage ? DAMAGE_IS_ALL(priv->cpu_damage) ? -1 : 1 : 0, priv->cpu, priv->gpu_bo->tiling)); if (priv->cpu_damage == NULL) return true; if (alu != GXcopy) return true; if (!priv->cpu) return true; if (priv->gpu_bo->tiling) return true; RegionTranslate(region, dx, dy); count = region_subsumes_damage(region, priv->cpu_damage); RegionTranslate(region, -dx, -dy); if (count) return true; } else { if ((priv->create & KGEM_CAN_CREATE_GPU) == 0) return false; if (priv->shm) return false; } count = priv->source_count++; if (priv->cpu_bo) { if (priv->cpu_bo->flush && count > SOURCE_BIAS) return true; if (sna_pixmap_default_tiling(to_sna_from_pixmap(pixmap), pixmap) == I915_TILING_NONE) return false; if (priv->cpu) return false; return count > SOURCE_BIAS; } else { if (w == pixmap->drawable.width && h == pixmap->drawable.height) return count > SOURCE_BIAS; return count * w*h >= (SOURCE_BIAS+2) * (int)pixmap->drawable.width * pixmap->drawable.height; } } static const BoxRec * reorder_boxes(const BoxRec *box, int n, int dx, int dy) { const BoxRec *next, *base; BoxRec *new; DBG(("%s x %d dx=%d, dy=%d\n", __FUNCTION__, n, dx, dy)); if (dy <= 0 && dx <= 0) { BoxRec *tmp; new = malloc(sizeof(BoxRec) * n); if (new == NULL) return NULL; tmp = new; next = box + n; do { *tmp++ = *--next; } while (next != box); } else if (dy < 0) { new = malloc(sizeof(BoxRec) * n); if (new == NULL) return NULL; base = next = box + n - 1; while (base >= box) { const BoxRec *tmp; while (next >= box && base->y1 == next->y1) next--; tmp = next + 1; while (tmp <= base) *new++ = *tmp++; base = next; } new -= n; } else { new = malloc(sizeof(BoxRec) * n); if (!new) return NULL; base = next = box; while (base < box + n) { const BoxRec *tmp; while (next < box + n && next->y1 == base->y1) next++; tmp = next; while (tmp != base) *new++ = *--tmp; base = next; } new -= n; } return new; } static void sna_self_copy_boxes(DrawablePtr src, DrawablePtr dst, GCPtr gc, RegionPtr region,int dx, int dy, Pixel bitplane, void *closure) { PixmapPtr pixmap = get_drawable_pixmap(src); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv = sna_pixmap(pixmap); const BoxRec *box = region_rects(region); int n = region_num_rects(region); int alu = gc ? gc->alu : GXcopy; int16_t tx, ty, sx, sy; assert(pixmap == get_drawable_pixmap(dst)); assert(region_num_rects(region)); if (((dx | dy) == 0 && alu == GXcopy)) return; if (n > 1 && (dx | dy) < 0) { box = reorder_boxes(box, n, dx, dy); if (box == NULL) return; } DBG(("%s (boxes=%dx[(%d, %d), (%d, %d)...], src=+(%d, %d), alu=%d, pix.size=%dx%d)\n", __FUNCTION__, n, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, dx, dy, alu, pixmap->drawable.width, pixmap->drawable.height)); get_drawable_deltas(dst, pixmap, &tx, &ty); get_drawable_deltas(src, pixmap, &sx, &sy); sx += dx; sy += dy; if (priv == NULL || DAMAGE_IS_ALL(priv->cpu_damage)) { DBG(("%s: unattached, or all damaged on CPU\n", __FUNCTION__)); goto fallback; } if (priv->gpu_damage || (priv->cpu_damage == NULL && priv->gpu_bo)) { assert(priv->gpu_bo); if (alu == GXcopy && priv->clear) goto free_boxes; assert(priv->gpu_bo->proxy == NULL); if (!sna_pixmap_move_to_gpu(pixmap, MOVE_WRITE | MOVE_READ | MOVE_ASYNC_HINT)) { DBG(("%s: fallback - not a pure copy and failed to move dst to GPU\n", __FUNCTION__)); goto fallback; } assert(priv->cpu_damage == NULL); if (!sna->render.copy_boxes(sna, alu, &pixmap->drawable, priv->gpu_bo, sx, sy, &pixmap->drawable, priv->gpu_bo, tx, ty, box, n, 0)) { DBG(("%s: fallback - accelerated copy boxes failed\n", __FUNCTION__)); goto fallback; } if (!DAMAGE_IS_ALL(priv->gpu_damage)) { assert(!priv->clear); if (sna_pixmap_free_cpu(sna, priv, false)) { sna_damage_all(&priv->gpu_damage, pixmap); } else { RegionTranslate(region, tx, ty); sna_damage_add_to_pixmap(&priv->gpu_damage, region, pixmap); } } assert_pixmap_damage(pixmap); } else { fallback: DBG(("%s: fallback\n", __FUNCTION__)); if (!sna_pixmap_move_to_cpu(pixmap, MOVE_READ | MOVE_WRITE)) goto free_boxes; if (alu == GXcopy && pixmap->drawable.bitsPerPixel >= 8) { assert(pixmap->devKind); if (sigtrap_get() == 0) { FbBits *dst_bits, *src_bits; int stride = pixmap->devKind; int bpp = pixmap->drawable.bitsPerPixel; int i; dst_bits = (FbBits *) ((char *)pixmap->devPrivate.ptr + ty * stride + tx * bpp / 8); src_bits = (FbBits *) ((char *)pixmap->devPrivate.ptr + sy * stride + sx * bpp / 8); for (i = 0; i < n; i++) memmove_box(src_bits, dst_bits, bpp, stride, box+i, dx, dy); sigtrap_put(); } } else { if (gc && !sna_gc_move_to_cpu(gc, dst, region)) goto out; if (sigtrap_get() == 0) { miCopyRegion(src, dst, gc, region, dx, dy, fbCopyNtoN, 0, NULL); sigtrap_put(); } if (gc) out: sna_gc_move_to_gpu(gc); } } free_boxes: if (box != region_rects(region)) free((void *)box); } static inline bool sna_pixmap_is_gpu(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv == NULL || priv->clear) return false; if (DAMAGE_IS_ALL(priv->gpu_damage) || (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo) && !priv->gpu_bo->proxy)) return true; return priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo); } static int copy_prefer_gpu(struct sna *sna, struct sna_pixmap *dst_priv, struct sna_pixmap *src_priv, RegionRec *region, int16_t dx, int16_t dy) { assert(dst_priv); if (wedged(sna) && !dst_priv->pinned) return 0; if (src_priv == NULL) { DBG(("%s: source unattached, use cpu\n", __FUNCTION__)); return 0; } if (src_priv->clear) { DBG(("%s: source is clear, don't force use of GPU\n", __FUNCTION__)); return 0; } if (src_priv->gpu_damage && !source_contains_region(src_priv->cpu_damage, region, dx, dy)) { DBG(("%s: source has gpu damage, force gpu? %d\n", __FUNCTION__, src_priv->cpu_damage == NULL)); assert(src_priv->gpu_bo); return src_priv->cpu_damage ? PREFER_GPU : PREFER_GPU | FORCE_GPU; } if (src_priv->cpu_bo && kgem_bo_is_busy(src_priv->cpu_bo)) { DBG(("%s: source has busy CPU bo, force gpu\n", __FUNCTION__)); return PREFER_GPU | FORCE_GPU; } if (source_contains_region(src_priv->cpu_damage, region, dx, dy)) return src_priv->cpu_bo && kgem_is_idle(&sna->kgem); DBG(("%s: source has GPU bo? %d\n", __FUNCTION__, src_priv->gpu_bo != NULL)); return src_priv->gpu_bo != NULL; } static bool use_shm_bo(struct sna *sna, struct kgem_bo *bo, struct sna_pixmap *priv, int alu, bool replaces) { if (priv == NULL || priv->cpu_bo == NULL) { DBG(("%s: no, not attached\n", __FUNCTION__)); return false; } if (!priv->shm && !priv->cpu) { DBG(("%s: yes, ordinary CPU bo\n", __FUNCTION__)); return true; } if (alu != GXcopy) { DBG(("%s: yes, complex alu=%d\n", __FUNCTION__, alu)); return true; } if (!replaces && __kgem_bo_is_busy(&sna->kgem, bo)) { DBG(("%s: yes, dst is busy\n", __FUNCTION__)); return true; } if (priv->cpu_bo->needs_flush && __kgem_bo_is_busy(&sna->kgem, priv->cpu_bo)) { DBG(("%s: yes, src is busy\n", __FUNCTION__)); return true; } return false; } static bool sna_damage_contains_box__no_reduce__offset(struct sna_damage *damage, const BoxRec *extents, int16_t dx, int16_t dy) { BoxRec _extents; if (dx | dy) { _extents.x1 = extents->x1 + dx; _extents.x2 = extents->x2 + dx; _extents.y1 = extents->y1 + dy; _extents.y2 = extents->y2 + dy; extents = &_extents; } return sna_damage_contains_box__no_reduce(damage, extents); } static bool sna_copy_boxes__inplace(struct sna *sna, RegionPtr region, int alu, PixmapPtr src_pixmap, struct sna_pixmap *src_priv, int dx, int dy, PixmapPtr dst_pixmap, struct sna_pixmap *dst_priv, bool replaces) { const BoxRec *box; char *ptr; int n; assert(src_pixmap->drawable.bitsPerPixel == dst_pixmap->drawable.bitsPerPixel); if (alu != GXcopy) { DBG(("%s - no, complex alu [%d]\n", __FUNCTION__, alu)); return false; } if (!USE_INPLACE) { DBG(("%s - no, compile time disabled\n", __FUNCTION__)); return false; } if (dst_priv == src_priv) { DBG(("%s - no, dst == src\n", __FUNCTION__)); return false; } if (src_priv == NULL || src_priv->gpu_bo == NULL) { if (dst_priv && dst_priv->gpu_bo) goto upload_inplace; DBG(("%s - no, no src or dst GPU bo\n", __FUNCTION__)); return false; } switch (src_priv->gpu_bo->tiling) { case I915_TILING_Y: DBG(("%s - no, bad src tiling [Y]\n", __FUNCTION__)); return false; case I915_TILING_X: if (!sna->kgem.memcpy_from_tiled_x) { DBG(("%s - no, bad src tiling [X]\n", __FUNCTION__)); return false; } default: break; } if (src_priv->move_to_gpu && !src_priv->move_to_gpu(sna, src_priv, MOVE_READ)) { DBG(("%s - no, pending src move-to-gpu failed\n", __FUNCTION__)); return false; } if (!kgem_bo_can_map__cpu(&sna->kgem, src_priv->gpu_bo, FORCE_FULL_SYNC)) { DBG(("%s - no, cannot map src for reads into the CPU\n", __FUNCTION__)); return false; } if (src_priv->gpu_damage == NULL || !(DAMAGE_IS_ALL(src_priv->gpu_damage) || sna_damage_contains_box__no_reduce__offset(src_priv->gpu_damage, ®ion->extents, dx, dy))) { DBG(("%s - no, src is not damaged on the GPU\n", __FUNCTION__)); return false; } assert(sna_damage_contains_box__offset(&src_priv->gpu_damage, ®ion->extents, dx, dy) == PIXMAN_REGION_IN); assert(sna_damage_contains_box__offset(&src_priv->cpu_damage, ®ion->extents, dx, dy) == PIXMAN_REGION_OUT); ptr = kgem_bo_map__cpu(&sna->kgem, src_priv->gpu_bo); if (ptr == NULL) { DBG(("%s - no, map failed\n", __FUNCTION__)); return false; } if (dst_priv && !sna_drawable_move_region_to_cpu(&dst_pixmap->drawable, region, MOVE_WRITE | MOVE_INPLACE_HINT)) { DBG(("%s - no, dst sync failed\n", __FUNCTION__)); return false; } kgem_bo_sync__cpu_full(&sna->kgem, src_priv->gpu_bo, FORCE_FULL_SYNC); box = region_rects(region); n = region_num_rects(region); if (src_priv->gpu_bo->tiling) { DBG(("%s: copy from a tiled CPU map\n", __FUNCTION__)); assert(dst_pixmap->devKind); do { memcpy_from_tiled_x(&sna->kgem, ptr, dst_pixmap->devPrivate.ptr, src_pixmap->drawable.bitsPerPixel, src_priv->gpu_bo->pitch, dst_pixmap->devKind, box->x1 + dx, box->y1 + dy, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); } else { DBG(("%s: copy from a linear CPU map\n", __FUNCTION__)); assert(dst_pixmap->devKind); do { memcpy_blt(ptr, dst_pixmap->devPrivate.ptr, src_pixmap->drawable.bitsPerPixel, src_priv->gpu_bo->pitch, dst_pixmap->devKind, box->x1 + dx, box->y1 + dy, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); if (!src_priv->shm) { assert(ptr == MAP(src_priv->gpu_bo->map__cpu)); src_pixmap->devPrivate.ptr = ptr; src_pixmap->devKind = src_priv->gpu_bo->pitch; src_priv->mapped = MAPPED_CPU; assert_pixmap_map(src_pixmap, src_priv); src_priv->cpu = true; } } return true; upload_inplace: switch (dst_priv->gpu_bo->tiling) { case I915_TILING_Y: DBG(("%s - no, bad dst tiling [Y]\n", __FUNCTION__)); return false; case I915_TILING_X: if (!sna->kgem.memcpy_to_tiled_x) { DBG(("%s - no, bad dst tiling [X]\n", __FUNCTION__)); return false; } default: break; } if (dst_priv->move_to_gpu) { DBG(("%s - no, pending dst move-to-gpu\n", __FUNCTION__)); return false; } if (!can_upload__tiled_x(&sna->kgem, dst_priv->gpu_bo) || __kgem_bo_is_busy(&sna->kgem, dst_priv->gpu_bo)) { if (replaces && !dst_priv->pinned) { unsigned create; struct kgem_bo *bo; create = CREATE_CPU_MAP | CREATE_INACTIVE; if (dst_priv->gpu_bo->scanout) create |= CREATE_SCANOUT; bo = kgem_create_2d(&sna->kgem, dst_pixmap->drawable.width, dst_pixmap->drawable.height, dst_pixmap->drawable.bitsPerPixel, dst_priv->gpu_bo->tiling, create); if (bo == NULL) return false; sna_pixmap_unmap(dst_pixmap, dst_priv); kgem_bo_destroy(&sna->kgem, dst_priv->gpu_bo); dst_priv->gpu_bo = bo; } else { DBG(("%s - no, dst is busy\n", __FUNCTION__)); return false; } if (!can_upload__tiled_x(&sna->kgem, dst_priv->gpu_bo)) { DBG(("%s - no, cannot map dst for reads into the CPU\n", __FUNCTION__)); return false; } } if (src_priv && !sna_drawable_move_region_to_cpu(&src_pixmap->drawable, region, MOVE_READ)) { DBG(("%s - no, src sync failed\n", __FUNCTION__)); return false; } if (kgem_bo_can_map__cpu(&sna->kgem, dst_priv->gpu_bo, true)) { ptr = kgem_bo_map__cpu(&sna->kgem, dst_priv->gpu_bo); if (ptr == NULL) { DBG(("%s - no, map failed\n", __FUNCTION__)); return false; } kgem_bo_sync__cpu(&sna->kgem, dst_priv->gpu_bo); } else { ptr = kgem_bo_map__wc(&sna->kgem, dst_priv->gpu_bo); if (ptr == NULL) { DBG(("%s - no, map failed\n", __FUNCTION__)); return false; } kgem_bo_sync__gtt(&sna->kgem, dst_priv->gpu_bo); } if (!DAMAGE_IS_ALL(dst_priv->gpu_damage)) { assert(!dst_priv->clear); sna_damage_add_to_pixmap(&dst_priv->gpu_damage, region, dst_pixmap); if (sna_damage_is_all(&dst_priv->gpu_damage, dst_pixmap->drawable.width, dst_pixmap->drawable.height)) { DBG(("%s: replaced entire pixmap, destroying CPU shadow\n", __FUNCTION__)); sna_damage_destroy(&dst_priv->cpu_damage); list_del(&dst_priv->flush_list); } else sna_damage_subtract(&dst_priv->cpu_damage, region); } dst_priv->clear = false; assert(has_coherent_ptr(sna, src_priv, MOVE_READ)); box = region_rects(region); n = region_num_rects(region); if (dst_priv->gpu_bo->tiling) { DBG(("%s: copy to a tiled CPU map\n", __FUNCTION__)); assert(dst_priv->gpu_bo->tiling == I915_TILING_X); assert(src_pixmap->devKind); do { memcpy_to_tiled_x(&sna->kgem, src_pixmap->devPrivate.ptr, ptr, src_pixmap->drawable.bitsPerPixel, src_pixmap->devKind, dst_priv->gpu_bo->pitch, box->x1 + dx, box->y1 + dy, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); } else { DBG(("%s: copy to a linear CPU map\n", __FUNCTION__)); assert(src_pixmap->devKind); do { memcpy_blt(src_pixmap->devPrivate.ptr, ptr, src_pixmap->drawable.bitsPerPixel, src_pixmap->devKind, dst_priv->gpu_bo->pitch, box->x1 + dx, box->y1 + dy, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); if (!dst_priv->shm) { assert(ptr == MAP(dst_priv->gpu_bo->map__cpu)); dst_pixmap->devPrivate.ptr = ptr; dst_pixmap->devKind = dst_priv->gpu_bo->pitch; dst_priv->mapped = MAPPED_CPU; assert_pixmap_map(dst_pixmap, dst_priv); dst_priv->cpu = true; } } return true; } static void discard_cpu_damage(struct sna *sna, struct sna_pixmap *priv) { if (priv->cpu_damage == NULL && !priv->shm) return; DBG(("%s: discarding existing CPU damage\n", __FUNCTION__)); if (kgem_bo_discard_cache(priv->gpu_bo, true)) { DBG(("%s: discarding cached upload buffer\n", __FUNCTION__)); assert(DAMAGE_IS_ALL(priv->cpu_damage)); assert(priv->gpu_damage == NULL || DAMAGE_IS_ALL(priv->gpu_damage)); /* magical upload buffer */ assert(!priv->pinned); assert(!priv->mapped); sna_damage_destroy(&priv->gpu_damage); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = NULL; } sna_damage_destroy(&priv->cpu_damage); list_del(&priv->flush_list); if (priv->gpu_bo && sna_pixmap_free_cpu(sna, priv, priv->cpu)) sna_damage_all(&priv->gpu_damage, priv->pixmap); priv->cpu = false; } static void sna_copy_boxes(DrawablePtr src, DrawablePtr dst, GCPtr gc, RegionPtr region, int dx, int dy, Pixel bitplane, void *closure) { PixmapPtr src_pixmap = get_drawable_pixmap(src); struct sna_pixmap *src_priv = sna_pixmap(src_pixmap); PixmapPtr dst_pixmap = get_drawable_pixmap(dst); struct sna_pixmap *dst_priv = sna_pixmap(dst_pixmap); struct sna *sna = to_sna_from_pixmap(src_pixmap); struct sna_damage **damage; struct kgem_bo *bo; int16_t src_dx, src_dy; int16_t dst_dx, dst_dy; const BoxRec *box = region_rects(region); int n = region_num_rects(region); int alu = gc->alu; int stride, bpp; char *bits; bool replaces; assert(region_num_rects(region)); if (src_pixmap == dst_pixmap) return sna_self_copy_boxes(src, dst, gc, region, dx, dy, bitplane, closure); DBG(("%s (boxes=%dx[(%d, %d), (%d, %d)...], src pixmap=%ld+(%d, %d), dst pixmap=%ld+(%d, %d), alu=%d, src.size=%dx%d, dst.size=%dx%d)\n", __FUNCTION__, n, box[0].x1, box[0].y1, box[0].x2, box[0].y2, src_pixmap->drawable.serialNumber, dx, dy, dst_pixmap->drawable.serialNumber, get_drawable_dx(dst), get_drawable_dy(dst), alu, src_pixmap->drawable.width, src_pixmap->drawable.height, dst_pixmap->drawable.width, dst_pixmap->drawable.height)); assert_pixmap_damage(dst_pixmap); assert_pixmap_damage(src_pixmap); bpp = dst_pixmap->drawable.bitsPerPixel; if (get_drawable_deltas(dst, dst_pixmap, &dst_dx, &dst_dy)) RegionTranslate(region, dst_dx, dst_dy); get_drawable_deltas(src, src_pixmap, &src_dx, &src_dy); src_dx += dx - dst_dx; src_dy += dy - dst_dy; assert_pixmap_contains_box(dst_pixmap, RegionExtents(region)); assert_pixmap_contains_box_with_offset(src_pixmap, RegionExtents(region), src_dx, src_dy); replaces = n == 1 && alu_overwrites(alu) && box->x1 <= 0 && box->y1 <= 0 && box->x2 >= dst_pixmap->drawable.width && box->y2 >= dst_pixmap->drawable.height; DBG(("%s: dst=(priv=%p, gpu_bo=%d, cpu_bo=%d), src=(priv=%p, gpu_bo=%d, cpu_bo=%d), replaces=%d\n", __FUNCTION__, dst_priv, dst_priv && dst_priv->gpu_bo ? dst_priv->gpu_bo->handle : 0, dst_priv && dst_priv->cpu_bo ? dst_priv->cpu_bo->handle : 0, src_priv, src_priv && src_priv->gpu_bo ? src_priv->gpu_bo->handle : 0, src_priv && src_priv->cpu_bo ? src_priv->cpu_bo->handle : 0, replaces)); if (dst_priv == NULL) { DBG(("%s: unattached dst failed, fallback\n", __FUNCTION__)); goto fallback; } if (alu == GXcopy && src_priv && src_priv->cow && COW(src_priv->cow) == COW(dst_priv->cow)) { if ((dx | dy) == 0) { DBG(("%s: ignoring cow for no op\n", __FUNCTION__)); return; } else if (IS_COW_OWNER(dst_priv->cow)) { /* XXX hack for firefox -- subsequent uses of src will be corrupt! */ DBG(("%s: ignoring cow reference for cousin copy\n", __FUNCTION__)); assert(src_priv->cpu_damage == NULL); assert(dst_priv->move_to_gpu == NULL); bo = dst_priv->gpu_bo; damage = NULL; } else goto discard_cow; } else { unsigned hint; discard_cow: hint = copy_prefer_gpu(sna, dst_priv, src_priv, region, src_dx, src_dy); if (replaces) { discard_cpu_damage(sna, dst_priv); hint |= REPLACES | IGNORE_DAMAGE; } else if (alu_overwrites(alu)) { if (region->data == NULL) hint |= IGNORE_DAMAGE; if (dst_priv->cpu_damage && region_subsumes_damage(region, dst_priv->cpu_damage)) discard_cpu_damage(sna, dst_priv); } bo = sna_drawable_use_bo(&dst_pixmap->drawable, hint, ®ion->extents, &damage); } if (bo) { if (alu == GXset || alu == GXclear || (src_priv && src_priv->clear)) { uint32_t color; if (alu == GXset) color = (1 << dst_pixmap->drawable.depth) - 1; else if (alu == GXclear) color = 0; else color = src_priv->clear_color; DBG(("%s: applying src clear [%08x] to dst\n", __FUNCTION__, src_priv->clear_color)); if (n == 1) { if (replaces && UNDO) kgem_bo_pair_undo(&sna->kgem, dst_priv->gpu_bo, dst_priv->cpu_bo); if (!sna->render.fill_one(sna, dst_pixmap, bo, color, box->x1, box->y1, box->x2, box->y2, alu)) { DBG(("%s: unsupported fill\n", __FUNCTION__)); goto fallback; } if (replaces && bo == dst_priv->gpu_bo) { DBG(("%s: marking dst handle=%d as all clear [%08x]\n", __FUNCTION__, dst_priv->gpu_bo->handle, src_priv->clear_color)); dst_priv->clear = true; dst_priv->clear_color = color; sna_damage_all(&dst_priv->gpu_damage, dst_pixmap); sna_damage_destroy(&dst_priv->cpu_damage); list_del(&dst_priv->flush_list); return; } } else { struct sna_fill_op fill; if (!sna_fill_init_blt(&fill, sna, dst_pixmap, bo, alu, color, FILL_BOXES)) { DBG(("%s: unsupported fill\n", __FUNCTION__)); goto fallback; } fill.boxes(sna, &fill, box, n); fill.done(sna, &fill); } if (damage) sna_damage_add_to_pixmap(damage, region, dst_pixmap); return; } if (src_priv && move_to_gpu(src_pixmap, src_priv, region, src_dx, src_dy, alu, bo == dst_priv->gpu_bo) && sna_pixmap_move_to_gpu(src_pixmap, MOVE_READ | MOVE_ASYNC_HINT)) { DBG(("%s: move whole src_pixmap to GPU and copy\n", __FUNCTION__)); if (replaces && UNDO) kgem_bo_pair_undo(&sna->kgem, dst_priv->gpu_bo, dst_priv->cpu_bo); if (replaces && src_pixmap->drawable.width == dst_pixmap->drawable.width && src_pixmap->drawable.height == dst_pixmap->drawable.height) { assert(src_pixmap->drawable.depth == dst_pixmap->drawable.depth); assert(src_pixmap->drawable.bitsPerPixel == dst_pixmap->drawable.bitsPerPixel); if (sna_pixmap_make_cow(sna, src_priv, dst_priv)) { assert(dst_priv->gpu_bo == src_priv->gpu_bo); sna_damage_all(&dst_priv->gpu_damage, dst_pixmap); sna_damage_destroy(&dst_priv->cpu_damage); list_del(&dst_priv->flush_list); if (dst_priv->shm) sna_add_flush_pixmap(sna, dst_priv, dst_priv->cpu_bo); return; } } if (!sna->render.copy_boxes(sna, alu, &src_pixmap->drawable, src_priv->gpu_bo, src_dx, src_dy, &dst_pixmap->drawable, bo, 0, 0, box, n, 0)) { DBG(("%s: fallback - accelerated copy boxes failed\n", __FUNCTION__)); goto fallback; } if (damage) sna_damage_add_to_pixmap(damage, region, dst_pixmap); return; } if (src_priv && region_overlaps_damage(region, src_priv->gpu_damage, src_dx, src_dy)) { BoxRec area; DBG(("%s: region overlaps GPU damage, upload and copy\n", __FUNCTION__)); area = region->extents; area.x1 += src_dx; area.x2 += src_dx; area.y1 += src_dy; area.y2 += src_dy; if (!sna_pixmap_move_area_to_gpu(src_pixmap, &area, MOVE_READ | MOVE_ASYNC_HINT)) { DBG(("%s: move-to-gpu(src) failed, fallback\n", __FUNCTION__)); goto fallback; } if (replaces && UNDO) kgem_bo_pair_undo(&sna->kgem, dst_priv->gpu_bo, dst_priv->cpu_bo); if (!sna->render.copy_boxes(sna, alu, &src_pixmap->drawable, src_priv->gpu_bo, src_dx, src_dy, &dst_pixmap->drawable, bo, 0, 0, box, n, 0)) { DBG(("%s: fallback - accelerated copy boxes failed\n", __FUNCTION__)); goto fallback; } if (damage) sna_damage_add_to_pixmap(damage, region, dst_pixmap); return; } if (bo != dst_priv->gpu_bo) goto fallback; if (use_shm_bo(sna, bo, src_priv, alu, replaces && !dst_priv->pinned)) { bool ret; DBG(("%s: region overlaps CPU damage, copy from CPU bo (shm? %d)\n", __FUNCTION__, src_priv->shm)); assert(bo != dst_priv->cpu_bo); RegionTranslate(region, src_dx, src_dy); ret = sna_drawable_move_region_to_cpu(&src_pixmap->drawable, region, MOVE_READ | MOVE_ASYNC_HINT); RegionTranslate(region, -src_dx, -src_dy); if (!ret) { DBG(("%s: move-to-cpu(src) failed, fallback\n", __FUNCTION__)); goto fallback; } if (replaces && UNDO) kgem_bo_pair_undo(&sna->kgem, dst_priv->gpu_bo, dst_priv->cpu_bo); if (src_priv->shm) { assert(!src_priv->flush); sna_add_flush_pixmap(sna, src_priv, src_priv->cpu_bo); } if (!sna->render.copy_boxes(sna, alu, &src_pixmap->drawable, src_priv->cpu_bo, src_dx, src_dy, &dst_pixmap->drawable, bo, 0, 0, box, n, src_priv->shm ? COPY_LAST : 0)) { DBG(("%s: fallback - accelerated copy boxes failed\n", __FUNCTION__)); goto fallback; } if (damage) sna_damage_add_to_pixmap(damage, region, dst_pixmap); return; } if (src_priv) { bool ret; RegionTranslate(region, src_dx, src_dy); ret = sna_drawable_move_region_to_cpu(&src_pixmap->drawable, region, MOVE_READ); RegionTranslate(region, -src_dx, -src_dy); if (!ret) { DBG(("%s: move-to-cpu(src) failed, fallback\n", __FUNCTION__)); goto fallback; } assert(!src_priv->mapped); if (src_pixmap->devPrivate.ptr == NULL) /* uninitialised!*/ return; } if (USE_USERPTR_UPLOADS && sna->kgem.has_userptr && (alu != GXcopy || (box_inplace(src_pixmap, ®ion->extents) && __kgem_bo_is_busy(&sna->kgem, bo)))) { struct kgem_bo *src_bo; bool ok = false; DBG(("%s: upload through a temporary map\n", __FUNCTION__)); assert(src_pixmap->devKind); src_bo = kgem_create_map(&sna->kgem, src_pixmap->devPrivate.ptr, src_pixmap->devKind * src_pixmap->drawable.height, true); if (src_bo) { src_bo->pitch = src_pixmap->devKind; kgem_bo_mark_unreusable(src_bo); ok = sna->render.copy_boxes(sna, alu, &src_pixmap->drawable, src_bo, src_dx, src_dy, &dst_pixmap->drawable, bo, 0, 0, box, n, COPY_LAST); kgem_bo_sync__cpu(&sna->kgem, src_bo); assert(src_bo->rq == NULL); kgem_bo_destroy(&sna->kgem, src_bo); } if (ok) { if (damage) sna_damage_add_to_pixmap(damage, region, dst_pixmap); return; } } if (alu != GXcopy) { PixmapPtr tmp; struct kgem_bo *src_bo; int i; assert(src_pixmap->drawable.depth != 1); DBG(("%s: creating temporary source upload for non-copy alu [%d]\n", __FUNCTION__, alu)); tmp = sna_pixmap_create_upload(src->pScreen, region->extents.x2 - region->extents.x1, region->extents.y2 - region->extents.y1, src->depth, KGEM_BUFFER_WRITE_INPLACE); if (tmp == NullPixmap) return; src_bo = __sna_pixmap_get_bo(tmp); assert(src_bo != NULL); dx = -region->extents.x1; dy = -region->extents.y1; for (i = 0; i < n; i++) { assert(box[i].x1 + src_dx >= 0); assert(box[i].y1 + src_dy >= 0); assert(box[i].x2 + src_dx <= src_pixmap->drawable.width); assert(box[i].y2 + src_dy <= src_pixmap->drawable.height); assert(box[i].x1 + dx >= 0); assert(box[i].y1 + dy >= 0); assert(box[i].x2 + dx <= tmp->drawable.width); assert(box[i].y2 + dy <= tmp->drawable.height); assert(has_coherent_ptr(sna, sna_pixmap(src_pixmap), MOVE_READ)); assert(has_coherent_ptr(sna, sna_pixmap(tmp), MOVE_WRITE)); assert(src_pixmap->devKind); assert(tmp->devKind); memcpy_blt(src_pixmap->devPrivate.ptr, tmp->devPrivate.ptr, src_pixmap->drawable.bitsPerPixel, src_pixmap->devKind, tmp->devKind, box[i].x1 + src_dx, box[i].y1 + src_dy, box[i].x1 + dx, box[i].y1 + dy, box[i].x2 - box[i].x1, box[i].y2 - box[i].y1); } if (n == 1 && tmp->drawable.width == src_pixmap->drawable.width && tmp->drawable.height == src_pixmap->drawable.height) { DBG(("%s: caching upload for src bo\n", __FUNCTION__)); assert(src_priv->gpu_damage == NULL); assert(src_priv->gpu_bo == NULL); kgem_proxy_bo_attach(src_bo, &src_priv->gpu_bo); } if (!sna->render.copy_boxes(sna, alu, &tmp->drawable, src_bo, dx, dy, &dst_pixmap->drawable, bo, 0, 0, box, n, 0)) { DBG(("%s: fallback - accelerated copy boxes failed\n", __FUNCTION__)); tmp->drawable.pScreen->DestroyPixmap(tmp); goto fallback; } tmp->drawable.pScreen->DestroyPixmap(tmp); if (damage) sna_damage_add_to_pixmap(damage, region, dst_pixmap); return; } else { DBG(("%s: dst is on the GPU, src is on the CPU, uploading into dst\n", __FUNCTION__)); assert(src_pixmap->devKind); if (!dst_priv->pinned && replaces) { stride = src_pixmap->devKind; bits = src_pixmap->devPrivate.ptr; bits += (src_dy + box->y1) * stride + (src_dx + box->x1) * bpp / 8; if (!sna_replace(sna, dst_pixmap, bits, stride)) { DBG(("%s: replace failed, fallback\n", __FUNCTION__)); goto fallback; } } else { assert(!DAMAGE_IS_ALL(dst_priv->cpu_damage)); if (!sna_write_boxes(sna, dst_pixmap, dst_priv->gpu_bo, 0, 0, src_pixmap->devPrivate.ptr, src_pixmap->devKind, src_dx, src_dy, box, n)) { DBG(("%s: write failed, fallback\n", __FUNCTION__)); goto fallback; } } assert(dst_priv->clear == false); dst_priv->cpu = false; if (damage) { assert(!dst_priv->clear); assert(dst_priv->gpu_bo); assert(dst_priv->gpu_bo->proxy == NULL); assert(*damage == dst_priv->gpu_damage); if (replaces) { sna_damage_destroy(&dst_priv->cpu_damage); sna_damage_all(&dst_priv->gpu_damage, dst_pixmap); list_del(&dst_priv->flush_list); } else sna_damage_add(&dst_priv->gpu_damage, region); assert_pixmap_damage(dst_pixmap); } } return; } fallback: if (alu == GXcopy && src_priv && src_priv->clear) { DBG(("%s: copying clear [%08x]\n", __FUNCTION__, src_priv->clear_color)); if (dst_priv) { if (!sna_drawable_move_region_to_cpu(&dst_pixmap->drawable, region, MOVE_WRITE | MOVE_INPLACE_HINT)) return; } assert(dst_pixmap->devPrivate.ptr); assert(dst_pixmap->devKind); do { pixman_fill(dst_pixmap->devPrivate.ptr, dst_pixmap->devKind/sizeof(uint32_t), dst_pixmap->drawable.bitsPerPixel, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1, src_priv->clear_color); box++; } while (--n); } else if (!sna_copy_boxes__inplace(sna, region, alu, src_pixmap, src_priv, src_dx, src_dy, dst_pixmap, dst_priv, replaces)) { FbBits *dst_bits, *src_bits; int dst_stride, src_stride; DBG(("%s: fallback -- src=(%d, %d), dst=(%d, %d)\n", __FUNCTION__, src_dx, src_dy, dst_dx, dst_dy)); if (src_priv) { unsigned mode; RegionTranslate(region, src_dx, src_dy); assert_pixmap_contains_box(src_pixmap, RegionExtents(region)); mode = MOVE_READ; if (!sna->kgem.can_blt_cpu || (src_priv->cpu_bo == NULL && (src_priv->create & KGEM_CAN_CREATE_CPU) == 0)) mode |= MOVE_INPLACE_HINT; if (!sna_drawable_move_region_to_cpu(&src_pixmap->drawable, region, mode)) return; RegionTranslate(region, -src_dx, -src_dy); } assert(src_priv == sna_pixmap(src_pixmap)); if (dst_priv) { unsigned mode; if (alu_overwrites(alu)) mode = MOVE_WRITE | MOVE_INPLACE_HINT; else mode = MOVE_WRITE | MOVE_READ; if (!sna_drawable_move_region_to_cpu(&dst_pixmap->drawable, region, mode)) return; } assert(dst_priv == sna_pixmap(dst_pixmap)); assert(dst_pixmap->devKind); assert(src_pixmap->devKind); dst_stride = dst_pixmap->devKind; src_stride = src_pixmap->devKind; if (alu == GXcopy && bpp >= 8) { dst_bits = (FbBits *)dst_pixmap->devPrivate.ptr; src_bits = (FbBits *) ((char *)src_pixmap->devPrivate.ptr + src_dy * src_stride + src_dx * bpp / 8); do { DBG(("%s: memcpy_blt(box=(%d, %d), (%d, %d), src=(%d, %d), pitches=(%d, %d))\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1, src_dx, src_dy, src_stride, dst_stride)); assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->x2 <= dst_pixmap->drawable.width); assert(box->y2 <= dst_pixmap->drawable.height); assert(box->x1 + src_dx >= 0); assert(box->y1 + src_dy >= 0); assert(box->x2 + src_dx <= src_pixmap->drawable.width); assert(box->y2 + src_dy <= src_pixmap->drawable.height); assert(has_coherent_ptr(sna, src_priv, MOVE_READ)); assert(has_coherent_ptr(sna, dst_priv, MOVE_WRITE)); assert(src_stride); assert(dst_stride); memcpy_blt(src_bits, dst_bits, bpp, src_stride, dst_stride, box->x1, box->y1, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); } else { DBG(("%s: fallback -- miCopyRegion\n", __FUNCTION__)); RegionTranslate(region, -dst_dx, -dst_dy); if (sna_gc_move_to_cpu(gc, dst, region) && sigtrap_get() == 0) { miCopyRegion(src, dst, gc, region, dx, dy, fbCopyNtoN, 0, NULL); sigtrap_put(); } sna_gc_move_to_gpu(gc); } } } typedef void (*sna_copy_func)(DrawablePtr src, DrawablePtr dst, GCPtr gc, RegionPtr region, int dx, int dy, Pixel bitPlane, void *closure); static inline bool box_equal(const BoxRec *a, const BoxRec *b) { return *(const uint64_t *)a == *(const uint64_t *)b; } static inline bool has_clip(GCPtr gc) { #if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(1,16,99,901,0) return gc->clientClipType != CT_NONE; #else return gc->clientClip != NULL; #endif } static RegionPtr sna_do_copy(DrawablePtr src, DrawablePtr dst, GCPtr gc, int sx, int sy, int width, int height, int dx, int dy, sna_copy_func copy, Pixel bitPlane, void *closure) { RegionPtr clip; RegionRec region; BoxRec src_extents; bool expose; DBG(("%s: src=(%d, %d), dst=(%d, %d), size=(%dx%d)\n", __FUNCTION__, sx, sy, dx, dy, width, height)); /* Short cut for unmapped windows */ if (dst->type == DRAWABLE_WINDOW && !((WindowPtr)dst)->realized) { DBG(("%s: unmapped\n", __FUNCTION__)); return NULL; } SourceValidate(src, sx, sy, width, height, gc->subWindowMode); sx += src->x; sy += src->y; dx += dst->x; dy += dst->y; DBG(("%s: after drawable: src=(%d, %d), dst=(%d, %d), size=(%dx%d)\n", __FUNCTION__, sx, sy, dx, dy, width, height)); region.extents.x1 = dx; region.extents.y1 = dy; region.extents.x2 = bound(dx, width); region.extents.y2 = bound(dy, height); region.data = NULL; DBG(("%s: dst extents (%d, %d), (%d, %d), dst clip extents (%d, %d), (%d, %d), dst size=%dx%d\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2, gc->pCompositeClip->extents.x1, gc->pCompositeClip->extents.y1, gc->pCompositeClip->extents.x2, gc->pCompositeClip->extents.y2, dst->width, dst->height)); if (!box_intersect(®ion.extents, &gc->pCompositeClip->extents)) { DBG(("%s: dst clipped out\n", __FUNCTION__)); return NULL; } DBG(("%s: clipped dst extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); assert_drawable_contains_box(dst, ®ion.extents); region.extents.x1 = clamp(region.extents.x1, sx - dx); region.extents.x2 = clamp(region.extents.x2, sx - dx); region.extents.y1 = clamp(region.extents.y1, sy - dy); region.extents.y2 = clamp(region.extents.y2, sy - dy); src_extents = region.extents; expose = true; DBG(("%s: unclipped src extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (region.extents.x1 < src->x) region.extents.x1 = src->x; if (region.extents.y1 < src->y) region.extents.y1 = src->y; if (region.extents.x2 > src->x + (int) src->width) region.extents.x2 = src->x + (int) src->width; if (region.extents.y2 > src->y + (int) src->height) region.extents.y2 = src->y + (int) src->height; DBG(("%s: clipped src extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (box_empty(®ion.extents)) { DBG(("%s: src clipped out\n", __FUNCTION__)); return NULL; } /* Compute source clip region */ if (src->type == DRAWABLE_PIXMAP) { if (src == dst && !has_clip(gc)) { DBG(("%s: pixmap -- using gc clip\n", __FUNCTION__)); clip = gc->pCompositeClip; } else { DBG(("%s: pixmap -- no source clipping\n", __FUNCTION__)); expose = false; clip = NULL; } } else { WindowPtr w = (WindowPtr)src; if (gc->subWindowMode == IncludeInferiors) { DBG(("%s: window -- include inferiors\n", __FUNCTION__)); if (w->winSize.data) RegionIntersect(®ion, ®ion, &w->winSize); else box_intersect(®ion.extents, &w->winSize.extents); clip = &w->borderClip; } else { DBG(("%s: window -- clip by children\n", __FUNCTION__)); clip = &w->clipList; } } if (clip != NULL) { if (clip->data == NULL) { box_intersect(®ion.extents, &clip->extents); if (box_equal(&src_extents, ®ion.extents)) expose = false; } else RegionIntersect(®ion, ®ion, clip); } DBG(("%s: src extents (%d, %d), (%d, %d) x %d\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2, region_num_rects(®ion))); RegionTranslate(®ion, dx-sx, dy-sy); if (gc->pCompositeClip->data) RegionIntersect(®ion, ®ion, gc->pCompositeClip); DBG(("%s: copy region (%d, %d), (%d, %d) x %d + (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2, region_num_rects(®ion), sx-dx, sy-dy)); if (!box_empty(®ion.extents)) copy(src, dst, gc, ®ion, sx-dx, sy-dy, bitPlane, closure); assert(gc->pCompositeClip != ®ion); RegionUninit(®ion); /* Pixmap sources generate a NoExposed (we return NULL to do this) */ clip = NULL; if (expose && gc->fExpose) clip = miHandleExposures(src, dst, gc, sx - src->x, sy - src->y, width, height, dx - dst->x, dy - dst->y, (unsigned long) bitPlane); return clip; } static void sna_fallback_copy_boxes(DrawablePtr src, DrawablePtr dst, GCPtr gc, RegionPtr region, int dx, int dy, Pixel bitplane, void *closure) { DBG(("%s (boxes=%dx[(%d, %d), (%d, %d)...], src=+(%d, %d), alu=%d\n", __FUNCTION__, region_num_rects(region), region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, dx, dy, gc->alu)); if (!sna_gc_move_to_cpu(gc, dst, region)) goto out; RegionTranslate(region, dx, dy); if (!sna_drawable_move_region_to_cpu(src, region, MOVE_READ)) goto out; RegionTranslate(region, -dx, -dy); if (src == dst || get_drawable_pixmap(src) == get_drawable_pixmap(dst)) { DBG(("%s: self-copy\n", __FUNCTION__)); if (!sna_drawable_move_to_cpu(dst, MOVE_WRITE | MOVE_READ)) goto out; } else { if (!sna_drawable_move_region_to_cpu(dst, region, drawable_gc_flags(dst, gc, false))) goto out; } if (sigtrap_get() == 0) { miCopyRegion(src, dst, gc, region, dx, dy, fbCopyNtoN, 0, NULL); FALLBACK_FLUSH(dst); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); } static RegionPtr sna_copy_area(DrawablePtr src, DrawablePtr dst, GCPtr gc, int src_x, int src_y, int width, int height, int dst_x, int dst_y) { struct sna *sna = to_sna_from_drawable(dst); sna_copy_func copy; if (gc->planemask == 0) return NULL; DBG(("%s: src=(%d, %d)x(%d, %d)+(%d, %d) -> dst=(%d, %d)+(%d, %d); alu=%d, pm=%lx, depth=%d\n", __FUNCTION__, src_x, src_y, width, height, src->x, src->y, dst_x, dst_y, dst->x, dst->y, gc->alu, gc->planemask, gc->depth)); if (FORCE_FALLBACK || !ACCEL_COPY_AREA || wedged(sna) || !PM_IS_SOLID(dst, gc->planemask) || gc->depth < 8) copy = sna_fallback_copy_boxes; else if (src == dst) copy = sna_self_copy_boxes; else copy = sna_copy_boxes; return sna_do_copy(src, dst, gc, src_x, src_y, width, height, dst_x, dst_y, copy, 0, NULL); } static const BoxRec * find_clip_box_for_y(const BoxRec *begin, const BoxRec *end, int16_t y) { const BoxRec *mid; if (end == begin) return end; if (end - begin == 1) { if (begin->y2 > y) return begin; else return end; } mid = begin + (end - begin) / 2; if (mid->y2 > y) /* If no box is found in [begin, mid], the function * will return @mid, which is then known to be the * correct answer. */ return find_clip_box_for_y(begin, mid, y); else return find_clip_box_for_y(mid, end, y); } struct sna_fill_spans { struct sna *sna; PixmapPtr pixmap; RegionRec region; unsigned flags; uint32_t phase; struct kgem_bo *bo; struct sna_damage **damage; int16_t dx, dy; void *op; }; static void sna_poly_point__cpu(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { fbPolyPoint(drawable, gc, mode, n, pt, -1); } static void sna_poly_point__fill(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { struct sna_fill_spans *data = sna_gc(gc)->priv; struct sna_fill_op *op = data->op; BoxRec box[512]; DDXPointRec last; DBG(("%s: count=%d\n", __FUNCTION__, n)); if (n == 0) return; last.x = drawable->x + data->dx; last.y = drawable->y + data->dy; if (op->points && mode != CoordModePrevious) { op->points(data->sna, op, last.x, last.y, pt, n); } else do { BoxRec *b = box; unsigned nbox = n; if (nbox > ARRAY_SIZE(box)) nbox = ARRAY_SIZE(box); n -= nbox; do { *(DDXPointRec *)b = *pt++; b->x1 += last.x; b->y1 += last.y; if (mode == CoordModePrevious) last = *(DDXPointRec *)b; b->x2 = b->x1 + 1; b->y2 = b->y1 + 1; b++; } while (--nbox); op->boxes(data->sna, op, box, b - box); } while (n); } static void sna_poly_point__gpu(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { struct sna_fill_spans *data = sna_gc(gc)->priv; struct sna_fill_op fill; BoxRec box[512]; DDXPointRec last; if (!sna_fill_init_blt(&fill, data->sna, data->pixmap, data->bo, gc->alu, gc->fgPixel, FILL_POINTS)) return; DBG(("%s: count=%d\n", __FUNCTION__, n)); last.x = drawable->x; last.y = drawable->y; while (n) { BoxRec *b = box; unsigned nbox = n; if (nbox > ARRAY_SIZE(box)) nbox = ARRAY_SIZE(box); n -= nbox; do { *(DDXPointRec *)b = *pt++; b->x1 += last.x; b->y1 += last.y; if (mode == CoordModePrevious) last = *(DDXPointRec *)b; if (RegionContainsPoint(&data->region, b->x1, b->y1, NULL)) { b->x1 += data->dx; b->y1 += data->dy; b->x2 = b->x1 + 1; b->y2 = b->y1 + 1; b++; } } while (--nbox); if (b != box) fill.boxes(data->sna, &fill, box, b - box); } fill.done(data->sna, &fill); } static void sna_poly_point__fill_clip_extents(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { struct sna_fill_spans *data = sna_gc(gc)->priv; struct sna_fill_op *op = data->op; const BoxRec *extents = &data->region.extents; BoxRec box[512], *b = box; const BoxRec *const last_box = b + ARRAY_SIZE(box); DDXPointRec last; DBG(("%s: count=%d\n", __FUNCTION__, n)); last.x = drawable->x + data->dx; last.y = drawable->y + data->dy; while (n--) { *(DDXPointRec *)b = *pt++; b->x1 += last.x; b->y1 += last.y; if (mode == CoordModePrevious) last = *(DDXPointRec *)b; if (b->x1 >= extents->x1 && b->x1 < extents->x2 && b->y1 >= extents->y1 && b->y1 < extents->y2) { b->x2 = b->x1 + 1; b->y2 = b->y1 + 1; if (++b == last_box) { op->boxes(data->sna, op, box, last_box - box); b = box; } } } if (b != box) op->boxes(data->sna, op, box, b - box); } static void sna_poly_point__fill_clip_boxes(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { struct sna_fill_spans *data = sna_gc(gc)->priv; struct sna_fill_op *op = data->op; RegionRec *clip = &data->region; BoxRec box[512], *b = box; const BoxRec *const last_box = b + ARRAY_SIZE(box); DDXPointRec last; DBG(("%s: count=%d\n", __FUNCTION__, n)); last.x = drawable->x + data->dx; last.y = drawable->y + data->dy; while (n--) { *(DDXPointRec *)b = *pt++; b->x1 += last.x; b->y1 += last.y; if (mode == CoordModePrevious) last = *(DDXPointRec *)b; if (RegionContainsPoint(clip, b->x1, b->y1, NULL)) { b->x2 = b->x1 + 1; b->y2 = b->y1 + 1; if (++b == last_box) { op->boxes(data->sna, op, box, last_box - box); b = box; } } } if (b != box) op->boxes(data->sna, op, box, b - box); } static void sna_poly_point__dash(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { struct sna_fill_spans *data = sna_gc(gc)->priv; if (data->phase == gc->fgPixel) sna_poly_point__fill(drawable, gc, mode, n, pt); } static void sna_poly_point__dash_clip_extents(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { struct sna_fill_spans *data = sna_gc(gc)->priv; if (data->phase == gc->fgPixel) sna_poly_point__fill_clip_extents(drawable, gc, mode, n, pt); } static void sna_poly_point__dash_clip_boxes(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { struct sna_fill_spans *data = sna_gc(gc)->priv; if (data->phase == gc->fgPixel) sna_poly_point__fill_clip_boxes(drawable, gc, mode, n, pt); } static void sna_fill_spans__fill(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int sorted) { struct sna_fill_spans *data = sna_gc(gc)->priv; struct sna_fill_op *op = data->op; BoxRec box[512]; DBG(("%s: alu=%d, fg=%08lx, count=%d\n", __FUNCTION__, gc->alu, gc->fgPixel, n)); while (n) { BoxRec *b = box; int nbox = n; if (nbox > ARRAY_SIZE(box)) nbox = ARRAY_SIZE(box); n -= nbox; do { *(DDXPointRec *)b = *pt++; b->x2 = b->x1 + (int)*width++; b->y2 = b->y1 + 1; DBG(("%s: (%d, %d), (%d, %d)\n", __FUNCTION__, b->x1, b->y1, b->x2, b->y2)); assert(b->x1 >= drawable->x); assert(b->x2 <= drawable->x + drawable->width); assert(b->y1 >= drawable->y); assert(b->y2 <= drawable->y + drawable->height); if (b->x2 > b->x1) { if (b != box && b->y1 == b[-1].y2 && b->x1 == b[-1].x1 && b->x2 == b[-1].x2) b[-1].y2 = b->y2; else b++; } } while (--nbox); if (b != box) op->boxes(data->sna, op, box, b - box); } } static void sna_fill_spans__dash(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int sorted) { struct sna_fill_spans *data = sna_gc(gc)->priv; if (data->phase == gc->fgPixel) sna_fill_spans__fill(drawable, gc, n, pt, width, sorted); } static void sna_fill_spans__fill_offset(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int sorted) { struct sna_fill_spans *data = sna_gc(gc)->priv; struct sna_fill_op *op = data->op; BoxRec box[512]; DBG(("%s: alu=%d, fg=%08lx\n", __FUNCTION__, gc->alu, gc->fgPixel)); while (n) { BoxRec *b = box; int nbox = n; if (nbox > ARRAY_SIZE(box)) nbox = ARRAY_SIZE(box); n -= nbox; do { *(DDXPointRec *)b = *pt++; b->x1 += data->dx; b->y1 += data->dy; b->x2 = b->x1 + (int)*width++; b->y2 = b->y1 + 1; if (b->x2 > b->x1) b++; } while (--nbox); if (b != box) op->boxes(data->sna, op, box, b - box); } } static void sna_fill_spans__dash_offset(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int sorted) { struct sna_fill_spans *data = sna_gc(gc)->priv; if (data->phase == gc->fgPixel) sna_fill_spans__fill_offset(drawable, gc, n, pt, width, sorted); } static void sna_fill_spans__fill_clip_extents(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int sorted) { struct sna_fill_spans *data = sna_gc(gc)->priv; struct sna_fill_op *op = data->op; const BoxRec *extents = &data->region.extents; BoxRec box[512], *b = box, *const last_box = box + ARRAY_SIZE(box); DBG(("%s: alu=%d, fg=%08lx, count=%d, extents=(%d, %d), (%d, %d)\n", __FUNCTION__, gc->alu, gc->fgPixel, n, extents->x1, extents->y1, extents->x2, extents->y2)); while (n--) { DBG(("%s: [%d] pt=(%d, %d), width=%d\n", __FUNCTION__, n, pt->x, pt->y, *width)); *(DDXPointRec *)b = *pt++; b->x2 = b->x1 + (int)*width++; b->y2 = b->y1 + 1; if (box_intersect(b, extents)) { DBG(("%s: [%d] clipped=(%d, %d), (%d, %d)\n", __FUNCTION__, n, b->x1, b->y1, b->x2, b->y2)); if (data->dx|data->dy) { b->x1 += data->dx; b->x2 += data->dx; b->y1 += data->dy; b->y2 += data->dy; } if (b != box && b->y1 == b[-1].y2 && b->x1 == b[-1].x1 && b->x2 == b[-1].x2) { b[-1].y2 = b->y2; } else if (++b == last_box) { op->boxes(data->sna, op, box, last_box - box); b = box; } } } if (b != box) op->boxes(data->sna, op, box, b - box); } static void sna_fill_spans__dash_clip_extents(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int sorted) { struct sna_fill_spans *data = sna_gc(gc)->priv; if (data->phase == gc->fgPixel) sna_fill_spans__fill_clip_extents(drawable, gc, n, pt, width, sorted); } static void sna_fill_spans__fill_clip_boxes(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int sorted) { struct sna_fill_spans *data = sna_gc(gc)->priv; struct sna_fill_op *op = data->op; BoxRec box[512], *b = box, *const last_box = box + ARRAY_SIZE(box); const BoxRec * const clip_start = RegionBoxptr(&data->region); const BoxRec * const clip_end = clip_start + data->region.data->numRects; DBG(("%s: alu=%d, fg=%08lx, count=%d, extents=(%d, %d), (%d, %d)\n", __FUNCTION__, gc->alu, gc->fgPixel, n, data->region.extents.x1, data->region.extents.y1, data->region.extents.x2, data->region.extents.y2)); while (n--) { int16_t X1 = pt->x; int16_t y = pt->y; int16_t X2 = X1 + (int)*width; const BoxRec *c; pt++; width++; if (y < data->region.extents.y1 || data->region.extents.y2 <= y) continue; if (X1 < data->region.extents.x1) X1 = data->region.extents.x1; if (X2 > data->region.extents.x2) X2 = data->region.extents.x2; if (X1 >= X2) continue; c = find_clip_box_for_y(clip_start, clip_end, y); while (c != clip_end) { if (y + 1 <= c->y1 || X2 <= c->x1) break; if (X1 >= c->x2) { c++; continue; } b->x1 = c->x1; b->x2 = c->x2; c++; if (b->x1 < X1) b->x1 = X1; if (b->x2 > X2) b->x2 = X2; if (b->x2 <= b->x1) continue; b->x1 += data->dx; b->x2 += data->dx; b->y1 = y + data->dy; b->y2 = b->y1 + 1; if (++b == last_box) { op->boxes(data->sna, op, box, last_box - box); b = box; } } } if (b != box) op->boxes(data->sna, op, box, b - box); } static void sna_fill_spans__dash_clip_boxes(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int sorted) { struct sna_fill_spans *data = sna_gc(gc)->priv; if (data->phase == gc->fgPixel) sna_fill_spans__fill_clip_boxes(drawable, gc, n, pt, width, sorted); } static bool sna_fill_spans_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, uint32_t pixel, int n, DDXPointPtr pt, int *width, int sorted, const BoxRec *extents, unsigned clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); int16_t dx, dy; struct sna_fill_op fill; BoxRec box[512], *b = box, *const last_box = box + ARRAY_SIZE(box); static void * const jump[] = { &&no_damage, &&damage, &&no_damage_clipped, &&damage_clipped, }; unsigned v; DBG(("%s: alu=%d, fg=%08lx, damge=%p, clipped?=%d\n", __FUNCTION__, gc->alu, gc->fgPixel, damage, clipped)); if (!sna_fill_init_blt(&fill, sna, pixmap, bo, gc->alu, pixel, FILL_SPANS)) return false; get_drawable_deltas(drawable, pixmap, &dx, &dy); v = (damage != NULL) | clipped; goto *jump[v]; no_damage: if (dx|dy) { do { int nbox = n; if (nbox > last_box - box) nbox = last_box - box; n -= nbox; do { *(DDXPointRec *)b = *pt++; b->x1 += dx; b->y1 += dy; b->x2 = b->x1 + (int)*width++; b->y2 = b->y1 + 1; b++; } while (--nbox); fill.boxes(sna, &fill, box, b - box); b = box; } while (n); } else { do { int nbox = n; if (nbox > last_box - box) nbox = last_box - box; n -= nbox; do { *(DDXPointRec *)b = *pt++; b->x2 = b->x1 + (int)*width++; b->y2 = b->y1 + 1; b++; } while (--nbox); fill.boxes(sna, &fill, box, b - box); b = box; } while (n); } goto done; damage: do { *(DDXPointRec *)b = *pt++; b->x1 += dx; b->y1 += dy; b->x2 = b->x1 + (int)*width++; b->y2 = b->y1 + 1; if (++b == last_box) { assert_pixmap_contains_boxes(pixmap, box, last_box-box, 0, 0); fill.boxes(sna, &fill, box, last_box - box); sna_damage_add_boxes(damage, box, last_box - box, 0, 0); b = box; } } while (--n); if (b != box) { assert_pixmap_contains_boxes(pixmap, box, b-box, 0, 0); fill.boxes(sna, &fill, box, b - box); sna_damage_add_boxes(damage, box, b - box, 0, 0); } goto done; no_damage_clipped: { RegionRec clip; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) return true; assert(dx + clip.extents.x1 >= 0); assert(dy + clip.extents.y1 >= 0); assert(dx + clip.extents.x2 <= pixmap->drawable.width); assert(dy + clip.extents.y2 <= pixmap->drawable.height); DBG(("%s: clip %d x [(%d, %d), (%d, %d)] x %d [(%d, %d)...]\n", __FUNCTION__, region_num_rects(&clip), clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2, n, pt->x, pt->y)); if (clip.data == NULL) { do { *(DDXPointRec *)b = *pt++; b->x2 = b->x1 + (int)*width++; b->y2 = b->y1 + 1; if (box_intersect(b, &clip.extents)) { if (dx|dy) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; } if (++b == last_box) { fill.boxes(sna, &fill, box, last_box - box); b = box; } } } while (--n); } else { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; do { int16_t X1 = pt->x; int16_t y = pt->y; int16_t X2 = X1 + (int)*width; const BoxRec *c; pt++; width++; if (y < extents->y1 || extents->y2 <= y) continue; if (X1 < extents->x1) X1 = extents->x1; if (X2 > extents->x2) X2 = extents->x2; if (X1 >= X2) continue; c = find_clip_box_for_y(clip_start, clip_end, y); while (c != clip_end) { if (y + 1 <= c->y1 || X2 <= c->x1) break; if (X1 >= c->x2) { c++; continue; } b->x1 = c->x1; b->x2 = c->x2; c++; if (b->x1 < X1) b->x1 = X1; if (b->x2 > X2) b->x2 = X2; if (b->x2 <= b->x1) continue; b->x1 += dx; b->x2 += dx; b->y1 = y + dy; b->y2 = b->y1 + 1; if (++b == last_box) { fill.boxes(sna, &fill, box, last_box - box); b = box; } } } while (--n); RegionUninit(&clip); } if (b != box) fill.boxes(sna, &fill, box, b - box); goto done; } damage_clipped: { RegionRec clip; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) return true; assert(dx + clip.extents.x1 >= 0); assert(dy + clip.extents.y1 >= 0); assert(dx + clip.extents.x2 <= pixmap->drawable.width); assert(dy + clip.extents.y2 <= pixmap->drawable.height); DBG(("%s: clip %d x [(%d, %d), (%d, %d)] x %d [(%d, %d)...]\n", __FUNCTION__, region_num_rects(&clip), clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2, n, pt->x, pt->y)); if (clip.data == NULL) { do { *(DDXPointRec *)b = *pt++; b->x2 = b->x1 + (int)*width++; b->y2 = b->y1 + 1; if (box_intersect(b, &clip.extents)) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; if (++b == last_box) { assert_pixmap_contains_boxes(pixmap, box, b-box, 0, 0); fill.boxes(sna, &fill, box, last_box - box); sna_damage_add_boxes(damage, box, b - box, 0, 0); b = box; } } } while (--n); } else { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; do { int16_t X1 = pt->x; int16_t y = pt->y; int16_t X2 = X1 + (int)*width; const BoxRec *c; pt++; width++; if (y < extents->y1 || extents->y2 <= y) continue; if (X1 < extents->x1) X1 = extents->x1; if (X2 > extents->x2) X2 = extents->x2; if (X1 >= X2) continue; c = find_clip_box_for_y(clip_start, clip_end, y); while (c != clip_end) { if (y + 1 <= c->y1 || X2 <= c->x1) break; if (X1 >= c->x2) { c++; continue; } b->x1 = c->x1; b->x2 = c->x2; c++; if (b->x1 < X1) b->x1 = X1; if (b->x2 > X2) b->x2 = X2; if (b->x2 <= b->x1) continue; b->x1 += dx; b->x2 += dx; b->y1 = y + dy; b->y2 = b->y1 + 1; if (++b == last_box) { assert_pixmap_contains_boxes(pixmap, box, last_box-box, 0, 0); fill.boxes(sna, &fill, box, last_box - box); sna_damage_add_boxes(damage, box, last_box - box, 0, 0); b = box; } } } while (--n); RegionUninit(&clip); } if (b != box) { assert_pixmap_contains_boxes(pixmap, box, b-box, 0, 0); fill.boxes(sna, &fill, box, b - box); sna_damage_add_boxes(damage, box, b - box, 0, 0); } goto done; } done: fill.done(sna, &fill); assert_pixmap_damage(pixmap); return true; } static bool sna_poly_fill_rect_tiled_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int n, xRectangle *rect, const BoxRec *extents, unsigned clipped); static bool sna_poly_fill_rect_stippled_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int n, xRectangle *rect, const BoxRec *extents, unsigned clipped); static inline bool gc_is_solid(GCPtr gc, uint32_t *color) { assert(FbFullMask(gc->depth) == (FbFullMask(gc->depth) & gc->planemask)); if (gc->alu == GXclear) { *color = 0; return true; } if (gc->alu == GXset) { *color = (1 << gc->depth) - 1; return true; } if (gc->fillStyle == FillSolid || (gc->fillStyle == FillTiled && gc->tileIsPixel) || (gc->fillStyle == FillOpaqueStippled && gc->bgPixel == gc->fgPixel)) { *color = gc->fillStyle == FillTiled ? gc->tile.pixel : gc->fgPixel; return true; } return false; } static void sna_fill_spans__gpu(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int sorted) { struct sna_fill_spans *data = sna_gc(gc)->priv; uint32_t color; DBG(("%s(n=%d, pt[0]=(%d, %d)+%d, sorted=%d\n", __FUNCTION__, n, pt[0].x, pt[0].y, width[0], sorted)); assert(PM_IS_SOLID(drawable, gc->planemask)); if (n == 0) return; /* The mi routines do not attempt to keep the spans it generates * within the clip, so we must run them through the clipper. */ if (gc_is_solid(gc, &color)) { sna_fill_spans_blt(drawable, data->bo, NULL, gc, color, n, pt, width, sorted, &data->region.extents, 2); } else { /* Try converting these to a set of rectangles instead */ xRectangle *rect; int i; DBG(("%s: converting to rectagnles\n", __FUNCTION__)); rect = malloc (n * sizeof (xRectangle)); if (rect == NULL) return; for (i = 0; i < n; i++) { rect[i].x = pt[i].x - drawable->x; rect[i].width = width[i]; rect[i].y = pt[i].y - drawable->y; rect[i].height = 1; } if (gc->fillStyle == FillTiled) { (void)sna_poly_fill_rect_tiled_blt(drawable, data->bo, NULL, gc, n, rect, &data->region.extents, 2); } else { (void)sna_poly_fill_rect_stippled_blt(drawable, data->bo, NULL, gc, n, rect, &data->region.extents, 2); } free (rect); } } static unsigned sna_spans_extents(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, BoxPtr out) { BoxRec box; bool clipped = false; if (n == 0) return 0; box.x1 = pt->x; box.x2 = box.x1 + *width; box.y2 = box.y1 = pt->y; while (--n) { pt++; width++; if (box.x1 > pt->x) box.x1 = pt->x; if (box.x2 < pt->x + *width) box.x2 = pt->x + *width; if (box.y1 > pt->y) box.y1 = pt->y; else if (box.y2 < pt->y) box.y2 = pt->y; } box.y2++; if (gc) clipped = clip_box(&box, gc); if (box_empty(&box)) return 0; *out = box; return 1 | clipped << 1; } static void sna_fill_spans(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int sorted) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_damage **damage; struct kgem_bo *bo; RegionRec region; unsigned flags; uint32_t color; DBG(("%s(n=%d, pt[0]=(%d, %d)+%d, sorted=%d\n", __FUNCTION__, n, pt[0].x, pt[0].y, width[0], sorted)); flags = sna_spans_extents(drawable, gc, n, pt, width, ®ion.extents); if (flags == 0) return; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (FORCE_FALLBACK) goto fallback; if (!ACCEL_FILL_SPANS) goto fallback; if (wedged(sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } DBG(("%s: fillStyle=%x [%d], mask=%lx [%d]\n", __FUNCTION__, gc->fillStyle, gc->fillStyle == FillSolid, gc->planemask, PM_IS_SOLID(drawable, gc->planemask))); if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; bo = sna_drawable_use_bo(drawable, PREFER_GPU, ®ion.extents, &damage); if (bo) { if (gc_is_solid(gc, &color)) { DBG(("%s: trying solid fill [alu=%d, pixel=%08lx] blt paths\n", __FUNCTION__, gc->alu, gc->fgPixel)); sna_fill_spans_blt(drawable, bo, damage, gc, color, n, pt, width, sorted, ®ion.extents, flags & IS_CLIPPED); } else { /* Try converting these to a set of rectangles instead */ xRectangle *rect; int i; DBG(("%s: converting to rectagnles\n", __FUNCTION__)); rect = malloc (n * sizeof (xRectangle)); if (rect == NULL) return; for (i = 0; i < n; i++) { rect[i].x = pt[i].x - drawable->x; rect[i].width = width[i]; rect[i].y = pt[i].y - drawable->y; rect[i].height = 1; } if (gc->fillStyle == FillTiled) { i = sna_poly_fill_rect_tiled_blt(drawable, bo, damage, gc, n, rect, ®ion.extents, flags & IS_CLIPPED); } else { i = sna_poly_fill_rect_stippled_blt(drawable, bo, damage, gc, n, rect, ®ion.extents, flags & IS_CLIPPED); } free (rect); if (i) return; } } fallback: DBG(("%s: fallback\n", __FUNCTION__)); region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) return; if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, drawable_gc_flags(drawable, gc, n > 1))) goto out; if (sigtrap_get() == 0) { DBG(("%s: fbFillSpans\n", __FUNCTION__)); fbFillSpans(drawable, gc, n, pt, width, sorted); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(®ion); } static void sna_set_spans(DrawablePtr drawable, GCPtr gc, char *src, DDXPointPtr pt, int *width, int n, int sorted) { RegionRec region; if (sna_spans_extents(drawable, gc, n, pt, width, ®ion.extents) == 0) return; DBG(("%s: extents=(%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (FORCE_FALLBACK) goto fallback; if (!ACCEL_SET_SPANS) goto fallback; fallback: region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) return; if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, drawable_gc_flags(drawable, gc, n > 1))) goto out; if (sigtrap_get() == 0) { DBG(("%s: fbSetSpans\n", __FUNCTION__)); fbSetSpans(drawable, gc, src, pt, width, n, sorted); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(®ion); } struct sna_copy_plane { struct sna_damage **damage; struct kgem_bo *bo; }; static void sna_copy_bitmap_blt(DrawablePtr _bitmap, DrawablePtr drawable, GCPtr gc, RegionRec *region, int sx, int sy, Pixel bitplane, void *closure) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_copy_plane *arg = closure; PixmapPtr bitmap = (PixmapPtr)_bitmap; uint32_t br00, br13; int16_t dx, dy; const BoxRec *box; int n; DBG(("%s: plane=%x (%d,%d),(%d,%d)xld\n", __FUNCTION__, (unsigned)bitplane, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, region_num_rects(region))); box = region_rects(region); n = region_num_rects(region); assert(n); get_drawable_deltas(drawable, pixmap, &dx, &dy); assert_pixmap_contains_boxes(pixmap, box, n, dx, dy); br00 = 3 << 20; br13 = arg->bo->pitch; if (sna->kgem.gen >= 040 && arg->bo->tiling) { br00 |= BLT_DST_TILED; br13 >>= 2; } br13 |= blt_depth(drawable->depth) << 24; br13 |= copy_ROP[gc->alu] << 16; kgem_set_mode(&sna->kgem, KGEM_BLT, arg->bo); assert(kgem_bo_can_blt(&sna->kgem, arg->bo)); do { int bx1 = (box->x1 + sx) & ~7; int bx2 = (box->x2 + sx + 7) & ~7; int bw = (bx2 - bx1)/8; int bh = box->y2 - box->y1; int bstride = ALIGN(bw, 2); int src_stride; uint8_t *dst, *src; uint32_t *b; DBG(("%s: box(%d, %d), (%d, %d), sx=(%d,%d) bx=[%d, %d]\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, sx, sy, bx1, bx2)); src_stride = bstride*bh; assert(src_stride > 0); if (src_stride <= 128) { src_stride = ALIGN(src_stride, 8) / 4; assert(src_stride <= 32); if (!kgem_check_batch(&sna->kgem, 8+src_stride) || !kgem_check_bo_fenced(&sna->kgem, arg->bo) || !kgem_check_reloc(&sna->kgem, 1)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, arg->bo)) return; /* XXX fallback? */ _kgem_set_mode(&sna->kgem, KGEM_BLT); } assert(sna->kgem.mode == KGEM_BLT); if (sna->kgem.gen >= 0100) { b = sna->kgem.batch + sna->kgem.nbatch; b[0] = XY_MONO_SRC_COPY_IMM | (6 + src_stride) | br00; b[0] |= ((box->x1 + sx) & 7) << 17; b[1] = br13; b[2] = (box->y1 + dy) << 16 | (box->x1 + dx); b[3] = (box->y2 + dy) << 16 | (box->x2 + dx); *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, arg->bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; dst = (uint8_t *)&b[8]; sna->kgem.nbatch += 8 + src_stride; } else { b = sna->kgem.batch + sna->kgem.nbatch; b[0] = XY_MONO_SRC_COPY_IMM | (5 + src_stride) | br00; b[0] |= ((box->x1 + sx) & 7) << 17; b[1] = br13; b[2] = (box->y1 + dy) << 16 | (box->x1 + dx); b[3] = (box->y2 + dy) << 16 | (box->x2 + dx); b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, arg->bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; dst = (uint8_t *)&b[7]; sna->kgem.nbatch += 7 + src_stride; } assert(bitmap->devKind); src_stride = bitmap->devKind; src = bitmap->devPrivate.ptr; src += (box->y1 + sy) * src_stride + bx1/8; src_stride -= bstride; do { int i = bstride; assert(src >= (uint8_t *)bitmap->devPrivate.ptr); do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); assert(src <= (uint8_t *)bitmap->devPrivate.ptr + bitmap->devKind * bitmap->drawable.height); src += src_stride; } while (--bh); } else { struct kgem_bo *upload; void *ptr; if (!kgem_check_batch(&sna->kgem, 10) || !kgem_check_bo_fenced(&sna->kgem, arg->bo) || !kgem_check_reloc_and_exec(&sna->kgem, 2)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, arg->bo)) return; /* XXX fallback? */ _kgem_set_mode(&sna->kgem, KGEM_BLT); } upload = kgem_create_buffer(&sna->kgem, bstride*bh, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!upload) break; if (sigtrap_get() == 0) { assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_MONO_SRC_COPY | br00 | 8; b[0] |= ((box->x1 + sx) & 7) << 17; b[1] = br13; b[2] = (box->y1 + dy) << 16 | (box->x1 + dx); b[3] = (box->y2 + dy) << 16 | (box->x2 + dx); *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, arg->bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); *(uint64_t *)(b+6) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 6, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[8] = gc->bgPixel; b[9] = gc->fgPixel; sna->kgem.nbatch += 10; } else { b[0] = XY_MONO_SRC_COPY | br00 | 6; b[0] |= ((box->x1 + sx) & 7) << 17; b[1] = br13; b[2] = (box->y1 + dy) << 16 | (box->x1 + dx); b[3] = (box->y2 + dy) << 16 | (box->x2 + dx); b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, arg->bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; sna->kgem.nbatch += 8; } dst = ptr; assert(bitmap->devKind); src_stride = bitmap->devKind; src = bitmap->devPrivate.ptr; src += (box->y1 + sy) * src_stride + bx1/8; src_stride -= bstride; do { int i = bstride; assert(src >= (uint8_t *)bitmap->devPrivate.ptr); do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); assert(src <= (uint8_t *)bitmap->devPrivate.ptr + bitmap->devKind * bitmap->drawable.height); assert(dst <= (uint8_t *)ptr + kgem_bo_size(upload)); src += src_stride; } while (--bh); sigtrap_put(); } kgem_bo_destroy(&sna->kgem, upload); } box++; } while (--n); if (arg->damage) { RegionTranslate(region, dx, dy); sna_damage_add_to_pixmap(arg->damage, region, pixmap); } assert_pixmap_damage(pixmap); sna->blt_state.fill_bo = 0; } static void sna_copy_plane_blt(DrawablePtr source, DrawablePtr drawable, GCPtr gc, RegionPtr region, int sx, int sy, Pixel bitplane, void *closure) { PixmapPtr dst_pixmap = get_drawable_pixmap(drawable); PixmapPtr src_pixmap = get_drawable_pixmap(source); struct sna *sna = to_sna_from_pixmap(dst_pixmap); struct sna_copy_plane *arg = closure; int16_t dx, dy; int bit = ffs(bitplane) - 1; uint32_t br00, br13; const BoxRec *box = region_rects(region); int n = region_num_rects(region); DBG(("%s: plane=%x [%d] x%d\n", __FUNCTION__, (unsigned)bitplane, bit, n)); if (n == 0) return; if (get_drawable_deltas(source, src_pixmap, &dx, &dy)) sx += dx, sy += dy; get_drawable_deltas(drawable, dst_pixmap, &dx, &dy); assert_pixmap_contains_boxes(dst_pixmap, box, n, dx, dy); br00 = XY_MONO_SRC_COPY | 3 << 20; br13 = arg->bo->pitch; if (sna->kgem.gen >= 040 && arg->bo->tiling) { br00 |= BLT_DST_TILED; br13 >>= 2; } br13 |= blt_depth(drawable->depth) << 24; br13 |= copy_ROP[gc->alu] << 16; kgem_set_mode(&sna->kgem, KGEM_BLT, arg->bo); assert(kgem_bo_can_blt(&sna->kgem, arg->bo)); do { int bx1 = (box->x1 + sx) & ~7; int bx2 = (box->x2 + sx + 7) & ~7; int bw = (bx2 - bx1)/8; int bh = box->y2 - box->y1; int bstride = ALIGN(bw, 2); struct kgem_bo *upload; void *ptr; DBG(("%s: box(%d, %d), (%d, %d), sx=(%d,%d) bx=[%d, %d]\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, sx, sy, bx1, bx2)); if (!kgem_check_batch(&sna->kgem, 10) || !kgem_check_bo_fenced(&sna->kgem, arg->bo) || !kgem_check_reloc_and_exec(&sna->kgem, 2)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, arg->bo)) return; /* XXX fallback? */ _kgem_set_mode(&sna->kgem, KGEM_BLT); } upload = kgem_create_buffer(&sna->kgem, bstride*bh, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!upload) break; if (sigtrap_get() == 0) { uint32_t *b; assert(src_pixmap->devKind); switch (source->bitsPerPixel) { case 32: { uint32_t *src = src_pixmap->devPrivate.ptr; int src_stride = src_pixmap->devKind/sizeof(uint32_t); uint8_t *dst = ptr; src += (box->y1 + sy) * src_stride; src += bx1; src_stride -= bw * 8; bstride -= bw; do { int i = bw; do { uint8_t v = 0; v |= ((*src++ >> bit) & 1) << 7; v |= ((*src++ >> bit) & 1) << 6; v |= ((*src++ >> bit) & 1) << 5; v |= ((*src++ >> bit) & 1) << 4; v |= ((*src++ >> bit) & 1) << 3; v |= ((*src++ >> bit) & 1) << 2; v |= ((*src++ >> bit) & 1) << 1; v |= ((*src++ >> bit) & 1) << 0; *dst++ = v; } while (--i); dst += bstride; src += src_stride; } while (--bh); break; } case 16: { uint16_t *src = src_pixmap->devPrivate.ptr; int src_stride = src_pixmap->devKind/sizeof(uint16_t); uint8_t *dst = ptr; src += (box->y1 + sy) * src_stride; src += bx1; src_stride -= bw * 8; bstride -= bw; do { int i = bw; do { uint8_t v = 0; v |= ((*src++ >> bit) & 1) << 7; v |= ((*src++ >> bit) & 1) << 6; v |= ((*src++ >> bit) & 1) << 5; v |= ((*src++ >> bit) & 1) << 4; v |= ((*src++ >> bit) & 1) << 3; v |= ((*src++ >> bit) & 1) << 2; v |= ((*src++ >> bit) & 1) << 1; v |= ((*src++ >> bit) & 1) << 0; *dst++ = v; } while (--i); dst += bstride; src += src_stride; } while (--bh); break; } default: assert(0); case 8: { uint8_t *src = src_pixmap->devPrivate.ptr; int src_stride = src_pixmap->devKind/sizeof(uint8_t); uint8_t *dst = ptr; src += (box->y1 + sy) * src_stride; src += bx1; src_stride -= bw * 8; bstride -= bw; do { int i = bw; do { uint8_t v = 0; v |= ((*src++ >> bit) & 1) << 7; v |= ((*src++ >> bit) & 1) << 6; v |= ((*src++ >> bit) & 1) << 5; v |= ((*src++ >> bit) & 1) << 4; v |= ((*src++ >> bit) & 1) << 3; v |= ((*src++ >> bit) & 1) << 2; v |= ((*src++ >> bit) & 1) << 1; v |= ((*src++ >> bit) & 1) << 0; *dst++ = v; } while (--i); dst += bstride; src += src_stride; } while (--bh); break; } } assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = br00 | ((box->x1 + sx) & 7) << 17 | 8; b[1] = br13; b[2] = (box->y1 + dy) << 16 | (box->x1 + dx); b[3] = (box->y2 + dy) << 16 | (box->x2 + dx); *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, arg->bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); *(uint64_t *)(b+6) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 6, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[8] = gc->bgPixel; b[9] = gc->fgPixel; sna->kgem.nbatch += 10; } else { b[0] = br00 | ((box->x1 + sx) & 7) << 17 | 6; b[1] = br13; b[2] = (box->y1 + dy) << 16 | (box->x1 + dx); b[3] = (box->y2 + dy) << 16 | (box->x2 + dx); b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, arg->bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; sna->kgem.nbatch += 8; } sigtrap_put(); } kgem_bo_destroy(&sna->kgem, upload); box++; } while (--n); if (arg->damage) { RegionTranslate(region, dx, dy); sna_damage_add_to_pixmap(arg->damage, region, dst_pixmap); } assert_pixmap_damage(dst_pixmap); sna->blt_state.fill_bo = 0; } static RegionPtr sna_copy_plane(DrawablePtr src, DrawablePtr dst, GCPtr gc, int src_x, int src_y, int w, int h, int dst_x, int dst_y, unsigned long bit) { PixmapPtr pixmap = get_drawable_pixmap(dst); struct sna *sna = to_sna_from_pixmap(pixmap); RegionRec region, *ret = NULL; struct sna_copy_plane arg; DBG(("%s: src=(%d, %d), dst=(%d, %d), size=%dx%d\n", __FUNCTION__, src_x, src_y, dst_x, dst_y, w, h)); if (gc->planemask == 0) goto empty; if (src->bitsPerPixel == 1 && (bit&1) == 0) goto empty; region.extents.x1 = dst_x + dst->x; region.extents.y1 = dst_y + dst->y; region.extents.x2 = region.extents.x1 + w; region.extents.y2 = region.extents.y1 + h; region.data = NULL; RegionIntersect(®ion, ®ion, gc->pCompositeClip); DBG(("%s: dst extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); { RegionRec clip; clip.extents.x1 = src->x - (src->x + src_x) + (dst->x + dst_x); clip.extents.y1 = src->y - (src->y + src_y) + (dst->y + dst_y); clip.extents.x2 = clip.extents.x1 + src->width; clip.extents.y2 = clip.extents.y1 + src->height; clip.data = NULL; DBG(("%s: src extents (%d, %d), (%d, %d)\n", __FUNCTION__, clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2)); RegionIntersect(®ion, ®ion, &clip); } DBG(("%s: dst^src extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (box_empty(®ion.extents)) goto empty; RegionTranslate(®ion, src_x - dst_x - dst->x + src->x, src_y - dst_y - dst->y + src->y); if (!sna_drawable_move_region_to_cpu(src, ®ion, MOVE_READ)) goto out; RegionTranslate(®ion, -(src_x - dst_x - dst->x + src->x), -(src_y - dst_y - dst->y + src->y)); if (FORCE_FALLBACK) goto fallback; if (!ACCEL_COPY_PLANE) goto fallback; if (wedged(sna)) goto fallback; if (!PM_IS_SOLID(dst, gc->planemask)) goto fallback; arg.bo = sna_drawable_use_bo(dst, PREFER_GPU, ®ion.extents, &arg.damage); if (arg.bo) { if (arg.bo->tiling == I915_TILING_Y) { assert(arg.bo == __sna_pixmap_get_bo(pixmap)); arg.bo = sna_pixmap_change_tiling(pixmap, I915_TILING_X); if (arg.bo == NULL) { DBG(("%s: fallback -- unable to change tiling\n", __FUNCTION__)); goto fallback; } } if (!kgem_bo_can_blt(&sna->kgem, arg.bo)) return false; RegionUninit(®ion); return sna_do_copy(src, dst, gc, src_x, src_y, w, h, dst_x, dst_y, src->depth == 1 ? sna_copy_bitmap_blt : sna_copy_plane_blt, (Pixel)bit, &arg); } fallback: DBG(("%s: fallback\n", __FUNCTION__)); if (!sna_gc_move_to_cpu(gc, dst, ®ion)) goto out; if (!sna_drawable_move_region_to_cpu(dst, ®ion, drawable_gc_flags(dst, gc, false))) goto out; if (sigtrap_get() == 0) { DBG(("%s: fbCopyPlane(%d, %d, %d, %d, %d,%d) %x\n", __FUNCTION__, src_x, src_y, w, h, dst_x, dst_y, (unsigned)bit)); ret = miDoCopy(src, dst, gc, src_x, src_y, w, h, dst_x, dst_y, src->bitsPerPixel > 1 ? fbCopyNto1 : fbCopy1toN, bit, 0); FALLBACK_FLUSH(dst); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(®ion); return ret; empty: return miHandleExposures(src, dst, gc, src_x, src_y, w, h, dst_x, dst_y, bit); } static bool sna_poly_point_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int mode, int n, DDXPointPtr pt, bool clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); BoxRec box[512], *b = box, * const last_box = box + ARRAY_SIZE(box); struct sna_fill_op fill; DDXPointRec last; int16_t dx, dy; DBG(("%s: alu=%d, pixel=%08lx, clipped?=%d\n", __FUNCTION__, gc->alu, gc->fgPixel, clipped)); if (!sna_fill_init_blt(&fill, sna, pixmap, bo, gc->alu, gc->fgPixel, FILL_POINTS)) return false; get_drawable_deltas(drawable, pixmap, &dx, &dy); last.x = drawable->x; last.y = drawable->y; if (!clipped) { last.x += dx; last.y += dy; assert_pixmap_contains_points(pixmap, pt, n, last.x, last.y); sna_damage_add_points(damage, pt, n, last.x, last.y); if (fill.points && mode != CoordModePrevious) { fill.points(sna, &fill, last.x, last.y, pt, n); } else { do { unsigned nbox = n; if (nbox > ARRAY_SIZE(box)) nbox = ARRAY_SIZE(box); n -= nbox; do { *(DDXPointRec *)b = *pt++; b->x1 += last.x; b->y1 += last.y; if (mode == CoordModePrevious) last = *(DDXPointRec *)b; b->x2 = b->x1 + 1; b->y2 = b->y1 + 1; b++; } while (--nbox); fill.boxes(sna, &fill, box, b - box); b = box; } while (n); } } else { RegionPtr clip = gc->pCompositeClip; while (n--) { int x, y; x = pt->x; y = pt->y; pt++; if (mode == CoordModePrevious) { x += last.x; y += last.y; last.x = x; last.y = y; } else { x += drawable->x; y += drawable->y; } if (RegionContainsPoint(clip, x, y, NULL)) { b->x1 = x + dx; b->y1 = y + dy; b->x2 = b->x1 + 1; b->y2 = b->y1 + 1; if (++b == last_box){ assert_pixmap_contains_boxes(pixmap, box, last_box-box, 0, 0); fill.boxes(sna, &fill, box, last_box - box); if (damage) sna_damage_add_boxes(damage, box, last_box-box, 0, 0); b = box; } } } if (b != box){ assert_pixmap_contains_boxes(pixmap, box, b-box, 0, 0); fill.boxes(sna, &fill, box, b - box); if (damage) sna_damage_add_boxes(damage, box, b-box, 0, 0); } } fill.done(sna, &fill); assert_pixmap_damage(pixmap); return true; } static unsigned sna_poly_point_extents(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt, BoxPtr out) { BoxRec box; bool clipped; if (n == 0) return 0; box.x2 = box.x1 = pt->x; box.y2 = box.y1 = pt->y; if (mode == CoordModePrevious) { DDXPointRec last = *pt++; while (--n) { last.x += pt->x; last.y += pt->y; pt++; box_add_pt(&box, last.x, last.y); } } else { --n; ++pt; while (n >= 8) { box_add_pt(&box, pt[0].x, pt[0].y); box_add_pt(&box, pt[1].x, pt[1].y); box_add_pt(&box, pt[2].x, pt[2].y); box_add_pt(&box, pt[3].x, pt[3].y); box_add_pt(&box, pt[4].x, pt[4].y); box_add_pt(&box, pt[5].x, pt[5].y); box_add_pt(&box, pt[6].x, pt[6].y); box_add_pt(&box, pt[7].x, pt[7].y); pt += 8; n -= 8; } if (n & 4) { box_add_pt(&box, pt[0].x, pt[0].y); box_add_pt(&box, pt[1].x, pt[1].y); box_add_pt(&box, pt[2].x, pt[2].y); box_add_pt(&box, pt[3].x, pt[3].y); pt += 4; } if (n & 2) { box_add_pt(&box, pt[0].x, pt[0].y); box_add_pt(&box, pt[1].x, pt[1].y); pt += 2; } if (n & 1) box_add_pt(&box, pt[0].x, pt[0].y); } box.x2++; box.y2++; clipped = trim_and_translate_box(&box, drawable, gc); if (box_empty(&box)) return 0; *out = box; return 1 | clipped << 1; } static void sna_poly_point(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); RegionRec region; unsigned flags; DBG(("%s(mode=%d, n=%d, pt[0]=(%d, %d)\n", __FUNCTION__, mode, n, pt[0].x, pt[0].y)); flags = sna_poly_point_extents(drawable, gc, mode, n, pt, ®ion.extents); if (flags == 0) return; DBG(("%s: extents (%d, %d), (%d, %d), flags=%x\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2, flags)); if (FORCE_FALLBACK) goto fallback; if (!ACCEL_POLY_POINT) goto fallback; if (wedged(sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } if (PM_IS_SOLID(drawable, gc->planemask)) { struct sna_damage **damage; struct kgem_bo *bo; DBG(("%s: trying solid fill [%08lx] blt paths\n", __FUNCTION__, gc->fgPixel)); if ((bo = sna_drawable_use_bo(drawable, PREFER_GPU, ®ion.extents, &damage)) && sna_poly_point_blt(drawable, bo, damage, gc, mode, n, pt, flags & IS_CLIPPED)) return; } fallback: DBG(("%s: fallback\n", __FUNCTION__)); region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) return; if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, MOVE_READ | MOVE_WRITE)) goto out; if (sigtrap_get() == 0) { DBG(("%s: fbPolyPoint\n", __FUNCTION__)); fbPolyPoint(drawable, gc, mode, n, pt, flags); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(®ion); } static bool sna_poly_zero_line_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int mode, const int _n, const DDXPointRec * const _pt, const BoxRec *extents, unsigned clipped) { static void * const _jump[] = { &&no_damage, &&damage, &&no_damage_offset, &&damage_offset, }; PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); int x2, y2, xstart, ystart, oc2; unsigned int bias = miGetZeroLineBias(drawable->pScreen); bool degenerate = true; struct sna_fill_op fill; RegionRec clip; BoxRec box[512], *b, * const last_box = box + ARRAY_SIZE(box); const BoxRec *last_extents; int16_t dx, dy; void *jump, *ret; DBG(("%s: alu=%d, pixel=%lx, n=%d, clipped=%d, damage=%p\n", __FUNCTION__, gc->alu, gc->fgPixel, _n, clipped, damage)); if (!sna_fill_init_blt(&fill, sna, pixmap, bo, gc->alu, gc->fgPixel, FILL_SPANS)) return false; get_drawable_deltas(drawable, pixmap, &dx, &dy); region_set(&clip, extents); if (clipped) { if (!region_maybe_clip(&clip, gc->pCompositeClip)) return true; } jump = _jump[(damage != NULL) | !!(dx|dy) << 1]; DBG(("%s: [clipped=%x] extents=(%d, %d), (%d, %d), delta=(%d, %d), damage=%p\n", __FUNCTION__, clipped, clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2, dx, dy, damage)); extents = region_rects(&clip); last_extents = extents + region_num_rects(&clip); b = box; do { int n = _n; const DDXPointRec *pt = _pt; xstart = pt->x + drawable->x; ystart = pt->y + drawable->y; x2 = xstart; y2 = ystart; oc2 = 0; OUTCODES(oc2, x2, y2, extents); while (--n) { int16_t sdx, sdy; int adx, ady, length; int e, e1, e2, e3; int x1 = x2, x; int y1 = y2, y; int oc1 = oc2; int octant; ++pt; x2 = pt->x; y2 = pt->y; if (mode == CoordModePrevious) { x2 += x1; y2 += y1; } else { x2 += drawable->x; y2 += drawable->y; } DBG(("%s: segment (%d, %d) to (%d, %d)\n", __FUNCTION__, x1, y1, x2, y2)); if (x2 == x1 && y2 == y1) continue; degenerate = false; oc2 = 0; OUTCODES(oc2, x2, y2, extents); if (oc1 & oc2) continue; CalcLineDeltas(x1, y1, x2, y2, adx, ady, sdx, sdy, 1, 1, octant); DBG(("%s: adx=(%d, %d), sdx=(%d, %d), oc1=%x, oc2=%x\n", __FUNCTION__, adx, ady, sdx, sdy, oc1, oc2)); if (adx == 0 || ady == 0) { if (x1 <= x2) { b->x1 = x1; b->x2 = x2; } else { b->x1 = x2; b->x2 = x1; } if (y1 <= y2) { b->y1 = y1; b->y2 = y2; } else { b->y1 = y2; b->y2 = y1; } b->x2++; b->y2++; if (oc1 | oc2) { bool intersects; intersects = box_intersect(b, extents); assert(intersects); } if (++b == last_box) { ret = &&rectangle_continue; goto *jump; rectangle_continue: b = box; } } else if (adx >= ady) { int x2_clipped = x2, y2_clipped = y2; bool dirty; /* X-major segment */ e1 = ady << 1; e2 = e1 - (adx << 1); e = e1 - adx; length = adx; FIXUP_ERROR(e, octant, bias); x = x1; y = y1; if (oc1 | oc2) { int pt1_clipped, pt2_clipped; if (miZeroClipLine(extents->x1, extents->y1, extents->x2-1, extents->y2-1, &x, &y, &x2_clipped, &y2_clipped, adx, ady, &pt1_clipped, &pt2_clipped, octant, bias, oc1, oc2) == -1) continue; length = abs(x2_clipped - x); if (length == 0) continue; if (pt1_clipped) { int clipdx = abs(x - x1); int clipdy = abs(y - y1); e += clipdy * e2 + (clipdx - clipdy) * e1; } } e3 = e2 - e1; e = e - e1; b->x1 = x; b->y1 = y; dirty = false; while (length--) { e += e1; dirty = true; if (e >= 0) { e += e3; if (sdx < 0) { b->x2 = b->x1 + 1; b->x1 = x; } else b->x2 = x + 1; b->y2 = b->y1 + 1; if (++b == last_box) { ret = &&X_continue; goto *jump; X_continue: b = box; } b->x1 = x + sdx; b->y1 = y += sdy; dirty = false; } x += sdx; } if (dirty) { x -= sdx; if (sdx < 0) { b->x2 = b->x1 + 1; b->x1 = x; } else b->x2 = x + 1; b->y2 = b->y1 + 1; if (++b == last_box) { ret = &&X2_continue; goto *jump; X2_continue: b = box; } } } else { int x2_clipped = x2, y2_clipped = y2; bool dirty; /* Y-major segment */ e1 = adx << 1; e2 = e1 - (ady << 1); e = e1 - ady; length = ady; SetYMajorOctant(octant); FIXUP_ERROR(e, octant, bias); x = x1; y = y1; if (oc1 | oc2) { int pt1_clipped, pt2_clipped; if (miZeroClipLine(extents->x1, extents->y1, extents->x2-1, extents->y2-1, &x, &y, &x2_clipped, &y2_clipped, adx, ady, &pt1_clipped, &pt2_clipped, octant, bias, oc1, oc2) == -1) continue; length = abs(y2_clipped - y); if (length == 0) continue; if (pt1_clipped) { int clipdx = abs(x - x1); int clipdy = abs(y - y1); e += clipdx * e2 + (clipdy - clipdx) * e1; } } e3 = e2 - e1; e = e - e1; b->x1 = x; b->y1 = y; dirty = false; while (length--) { e += e1; dirty = true; if (e >= 0) { e += e3; if (sdy < 0) { b->y2 = b->y1 + 1; b->y1 = y; } else b->y2 = y + 1; b->x2 = x + 1; if (++b == last_box) { ret = &&Y_continue; goto *jump; Y_continue: b = box; } b->x1 = x += sdx; b->y1 = y + sdy; dirty = false; } y += sdy; } if (dirty) { y -= sdy; if (sdy < 0) { b->y2 = b->y1 + 1; b->y1 = y; } else b->y2 = y + 1; b->x2 = x + 1; if (++b == last_box) { ret = &&Y2_continue; goto *jump; Y2_continue: b = box; } } } } #if 0 /* Only do the CapNotLast check on the last segment * and only if the endpoint wasn't clipped. And then, if the last * point is the same as the first point, do not draw it, unless the * line is degenerate */ if (!pt2_clipped && gc->capStyle != CapNotLast && !(xstart == x2 && ystart == y2 && !degenerate)) { b->x2 = x2; b->y2 = y2; if (b->x2 < b->x1) { int16_t t = b->x1; b->x1 = b->x2; b->x2 = t; } if (b->y2 < b->y1) { int16_t t = b->y1; b->y1 = b->y2; b->y2 = t; } b->x2++; b->y2++; b++; } #endif } while (++extents != last_extents); if (b != box) { ret = &&done; goto *jump; } done: fill.done(sna, &fill); assert_pixmap_damage(pixmap); RegionUninit(&clip); return true; damage: assert_pixmap_contains_boxes(pixmap, box, b-box, 0, 0); sna_damage_add_boxes(damage, box, b-box, 0, 0); no_damage: fill.boxes(sna, &fill, box, b-box); goto *ret; no_damage_offset: { BoxRec *bb = box; do { bb->x1 += dx; bb->x2 += dx; bb->y1 += dy; bb->y2 += dy; } while (++bb != b); assert_pixmap_contains_boxes(pixmap, box, b-box, 0, 0); fill.boxes(sna, &fill, box, b - box); } goto *ret; damage_offset: { BoxRec *bb = box; do { bb->x1 += dx; bb->x2 += dx; bb->y1 += dy; bb->y2 += dy; } while (++bb != b); assert_pixmap_contains_boxes(pixmap, box, b-box, 0, 0); fill.boxes(sna, &fill, box, b - box); sna_damage_add_boxes(damage, box, b - box, 0, 0); } goto *ret; } static bool sna_poly_line_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, uint32_t pixel, int mode, int n, DDXPointPtr pt, const BoxRec *extents, bool clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); BoxRec boxes[512], *b = boxes, * const last_box = boxes + ARRAY_SIZE(boxes); struct sna_fill_op fill; DDXPointRec last; int16_t dx, dy; DBG(("%s: alu=%d, fg=%08x, clipped=%d\n", __FUNCTION__, gc->alu, (unsigned)pixel, clipped)); if (!sna_fill_init_blt(&fill, sna, pixmap, bo, gc->alu, pixel, FILL_BOXES)) return false; get_drawable_deltas(drawable, pixmap, &dx, &dy); if (!clipped) { dx += drawable->x; dy += drawable->y; last.x = pt->x + dx; last.y = pt->y + dy; pt++; while (--n) { DDXPointRec p; p = *pt++; if (mode == CoordModePrevious) { p.x += last.x; p.y += last.y; } else { p.x += dx; p.y += dy; } DBG(("%s: line (%d, %d) -> (%d, %d)\n", __FUNCTION__, last.x, last.y, p.x, p.y)); if (last.x == p.x) { b->x1 = last.x; b->x2 = last.x + 1; } else if (last.x < p.x) { b->x1 = last.x; b->x2 = p.x; } else { b->x1 = p.x; b->x2 = last.x; } if (last.y == p.y) { b->y1 = last.y; b->y2 = last.y + 1; } else if (last.y < p.y) { b->y1 = last.y; b->y2 = p.y; } else { b->y1 = p.y; b->y2 = last.y; } b->y2 += last.x == p.x && last.y != p.y; b->x2 += last.y == p.y && last.x != p.x; DBG(("%s: blt (%d, %d), (%d, %d)\n", __FUNCTION__, b->x1, b->y1, b->x2, b->y2)); if (++b == last_box) { assert_pixmap_contains_boxes(pixmap, boxes, last_box-boxes, 0, 0); fill.boxes(sna, &fill, boxes, last_box - boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box - boxes, 0, 0); b = boxes; } last = p; } } else { RegionRec clip; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) return true; last.x = pt->x + drawable->x; last.y = pt->y + drawable->y; pt++; if (clip.data == NULL) { while (--n) { DDXPointRec p; p = *pt++; if (mode == CoordModePrevious) { p.x += last.x; p.y += last.y; } else { p.x += drawable->x; p.y += drawable->y; } if (last.x == p.x) { b->x1 = last.x; b->x2 = last.x + 1; } else if (last.x < p.x) { b->x1 = last.x; b->x2 = p.x; } else { b->x1 = p.x; b->x2 = last.x; } if (last.y == p.y) { b->y1 = last.y; b->y2 = last.y + 1; } else if (last.y < p.y) { b->y1 = last.y; b->y2 = p.y; } else { b->y1 = p.y; b->y2 = last.y; } b->y2 += last.x == p.x && last.y != p.y; b->x2 += last.y == p.y && last.x != p.x; DBG(("%s: blt (%d, %d), (%d, %d)\n", __FUNCTION__, b->x1, b->y1, b->x2, b->y2)); if (box_intersect(b, &clip.extents)) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; if (++b == last_box) { assert_pixmap_contains_boxes(pixmap, boxes, last_box-boxes, 0, 0); fill.boxes(sna, &fill, boxes, last_box - boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box - boxes, 0, 0); b = boxes; } } last = p; } } else { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; const BoxRec *c; while (--n) { DDXPointRec p; BoxRec box; p = *pt++; if (mode == CoordModePrevious) { p.x += last.x; p.y += last.y; } else { p.x += drawable->x; p.y += drawable->y; } if (last.x == p.x) { box.x1 = last.x; box.x2 = last.x + 1; } else if (last.x < p.x) { box.x1 = last.x; box.x2 = p.x; } else { box.x1 = p.x; box.x2 = last.x; } if (last.y == p.y) { box.y1 = last.y; box.y2 = last.y + 1; } else if (last.y < p.y) { box.y1 = last.y; box.y2 = p.y; } else { box.y1 = p.y; box.y2 = last.y; } b->y2 += last.x == p.x && last.y != p.y; b->x2 += last.y == p.y && last.x != p.x; DBG(("%s: blt (%d, %d), (%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2)); c = find_clip_box_for_y(clip_start, clip_end, box.y1); while (c != clip_end) { if (box.y2 <= c->y1) break; *b = box; if (box_intersect(b, c++)) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; if (++b == last_box) { assert_pixmap_contains_boxes(pixmap, boxes, last_box-boxes, 0, 0); fill.boxes(sna, &fill, boxes, last_box-boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box-boxes, 0, 0); b = boxes; } } } last = p; } } RegionUninit(&clip); } if (b != boxes) { assert_pixmap_contains_boxes(pixmap, boxes, b-boxes, 0, 0); fill.boxes(sna, &fill, boxes, b - boxes); if (damage) sna_damage_add_boxes(damage, boxes, b - boxes, 0, 0); } fill.done(sna, &fill); assert_pixmap_damage(pixmap); return true; } static unsigned sna_poly_line_extents(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt, BoxPtr out) { BoxRec box; bool clip, blt = true; if (n == 0) return 0; box.x2 = box.x1 = pt->x; box.y2 = box.y1 = pt->y; if (mode == CoordModePrevious) { int x = box.x1; int y = box.y1; while (--n) { pt++; x += pt->x; y += pt->y; if (blt) blt &= pt->x == 0 || pt->y == 0; box_add_pt(&box, x, y); } } else { int x = box.x1; int y = box.y1; while (--n) { pt++; if (blt) { blt &= pt->x == x || pt->y == y; x = pt->x; y = pt->y; } box_add_pt(&box, pt->x, pt->y); } } box.x2++; box.y2++; if (gc->lineWidth) { int extra = gc->lineWidth >> 1; if (n > 1) { if (gc->joinStyle == JoinMiter) extra = 6 * gc->lineWidth; else if (gc->capStyle == CapProjecting) extra = gc->lineWidth; } if (extra) { box.x1 -= extra; box.x2 += extra; box.y1 -= extra; box.y2 += extra; } } clip = trim_and_translate_box(&box, drawable, gc); if (box_empty(&box)) return 0; *out = box; return 1 | blt << 2 | clip << 1; } inline static int _use_line_spans(DrawablePtr drawable, GCPtr gc, const BoxRec *extents, unsigned flags) { uint32_t ignored; if (USE_SPANS) return USE_SPANS > 0; if (flags & RECTILINEAR) return PREFER_GPU; if (gc->lineStyle != LineSolid && gc->lineWidth == 0) return 0; if (gc_is_solid(gc, &ignored)) return PREFER_GPU; return !drawable_gc_inplace_hint(drawable, gc); } inline static int use_line_spans(DrawablePtr drawable, GCPtr gc, const BoxRec *extents, unsigned flags) { int ret = _use_line_spans(drawable, gc, extents, flags); DBG(("%s? %d\n", __FUNCTION__, ret)); return ret; } static void sna_poly_line(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { struct sna_pixmap *priv; struct sna_fill_spans data; uint32_t color; DBG(("%s(mode=%d, n=%d, pt[0]=(%d, %d), lineWidth=%d\n", __FUNCTION__, mode, n, pt[0].x, pt[0].y, gc->lineWidth)); data.flags = sna_poly_line_extents(drawable, gc, mode, n, pt, &data.region.extents); if (data.flags == 0) return; DBG(("%s: extents (%d, %d), (%d, %d), flags=%x\n", __FUNCTION__, data.region.extents.x1, data.region.extents.y1, data.region.extents.x2, data.region.extents.y2, data.flags)); data.region.data = NULL; if (FORCE_FALLBACK) goto fallback; if (!ACCEL_POLY_LINE) goto fallback; data.pixmap = get_drawable_pixmap(drawable); data.sna = to_sna_from_pixmap(data.pixmap); if (wedged(data.sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } DBG(("%s: fill=%d [%d], line=%d [%d], width=%d, mask=%lx [%d], rectlinear=%d\n", __FUNCTION__, gc->fillStyle, gc->fillStyle == FillSolid, gc->lineStyle, gc->lineStyle == LineSolid, gc->lineWidth, gc->planemask, PM_IS_SOLID(drawable, gc->planemask), data.flags & RECTILINEAR)); if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; priv = sna_pixmap(data.pixmap); if (!priv) { DBG(("%s: not attached to pixmap %ld\n", __FUNCTION__, data.pixmap->drawable.serialNumber)); goto fallback; } if (gc->lineStyle != LineSolid) { DBG(("%s: lineStyle, %d, is not solid\n", __FUNCTION__, gc->lineStyle)); goto spans_fallback; } if (!(gc->lineWidth == 0 || (gc->lineWidth == 1 && (n == 1 || gc->alu == GXcopy)))) { DBG(("%s: non-zero lineWidth %d\n", __FUNCTION__, gc->lineWidth)); goto spans_fallback; } data.bo = sna_drawable_use_bo(drawable, PREFER_GPU, &data.region.extents, &data.damage); if (data.bo == NULL) goto fallback; if (gc_is_solid(gc, &color)) { DBG(("%s: trying solid fill [%08x]\n", __FUNCTION__, (unsigned)color)); if (data.flags & RECTILINEAR) { if (sna_poly_line_blt(drawable, data.bo, data.damage, gc, color, mode, n, pt, &data.region.extents, data.flags & IS_CLIPPED)) return; } else { /* !rectilinear */ if (sna_poly_zero_line_blt(drawable, data.bo, data.damage, gc, mode, n, pt, &data.region.extents, data.flags & IS_CLIPPED)) return; } } else if (data.flags & RECTILINEAR) { /* Try converting these to a set of rectangles instead */ DDXPointRec p1, p2; xRectangle *rect; int i; DBG(("%s: converting to rectagnles\n", __FUNCTION__)); rect = malloc (n * sizeof (xRectangle)); if (rect == NULL) return; p1 = pt[0]; for (i = 1; i < n; i++) { if (mode == CoordModePrevious) { p2.x = p1.x + pt[i].x; p2.y = p1.y + pt[i].y; } else p2 = pt[i]; if (p1.x < p2.x) { rect[i].x = p1.x; rect[i].width = p2.x - p1.x + 1; } else if (p1.x > p2.x) { rect[i].x = p2.x; rect[i].width = p1.x - p2.x + 1; } else { rect[i].x = p1.x; rect[i].width = 1; } if (p1.y < p2.y) { rect[i].y = p1.y; rect[i].height = p2.y - p1.y + 1; } else if (p1.y > p2.y) { rect[i].y = p2.y; rect[i].height = p1.y - p2.y + 1; } else { rect[i].y = p1.y; rect[i].height = 1; } /* don't paint last pixel */ if (gc->capStyle == CapNotLast) { if (p1.x == p2.x) rect[i].height--; else rect[i].width--; } p1 = p2; } if (gc->fillStyle == FillTiled) { i = sna_poly_fill_rect_tiled_blt(drawable, data.bo, data.damage, gc, n - 1, rect + 1, &data.region.extents, data.flags & IS_CLIPPED); } else { i = sna_poly_fill_rect_stippled_blt(drawable, data.bo, data.damage, gc, n - 1, rect + 1, &data.region.extents, data.flags & IS_CLIPPED); } free (rect); if (i) return; } spans_fallback: if ((data.bo = sna_drawable_use_bo(drawable, use_line_spans(drawable, gc, &data.region.extents, data.flags), &data.region.extents, &data.damage))) { DBG(("%s: converting line into spans\n", __FUNCTION__)); get_drawable_deltas(drawable, data.pixmap, &data.dx, &data.dy); sna_gc(gc)->priv = &data; if (gc->lineWidth == 0 && gc_is_solid(gc, &color)) { struct sna_fill_op fill; if (gc->lineStyle == LineSolid) { if (!sna_fill_init_blt(&fill, data.sna, data.pixmap, data.bo, gc->alu, color, FILL_POINTS | FILL_SPANS)) goto fallback; data.op = &fill; if ((data.flags & IS_CLIPPED) == 0) { if (data.dx | data.dy) sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_offset; else sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill; sna_gc_ops__tmp.PolyPoint = sna_poly_point__fill; } else { if (!region_maybe_clip(&data.region, gc->pCompositeClip)) return; if (region_is_singular(&data.region)) { sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_clip_extents; sna_gc_ops__tmp.PolyPoint = sna_poly_point__fill_clip_extents; } else { sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_clip_boxes; sna_gc_ops__tmp.PolyPoint = sna_poly_point__fill_clip_boxes; } } assert(gc->miTranslate); gc->ops = &sna_gc_ops__tmp; DBG(("%s: miZeroLine (solid fill)\n", __FUNCTION__)); miZeroLine(drawable, gc, mode, n, pt); fill.done(data.sna, &fill); } else { data.op = &fill; if ((data.flags & IS_CLIPPED) == 0) { if (data.dx | data.dy) sna_gc_ops__tmp.FillSpans = sna_fill_spans__dash_offset; else sna_gc_ops__tmp.FillSpans = sna_fill_spans__dash; sna_gc_ops__tmp.PolyPoint = sna_poly_point__dash; } else { if (!region_maybe_clip(&data.region, gc->pCompositeClip)) return; if (region_is_singular(&data.region)) { sna_gc_ops__tmp.FillSpans = sna_fill_spans__dash_clip_extents; sna_gc_ops__tmp.PolyPoint = sna_poly_point__dash_clip_extents; } else { sna_gc_ops__tmp.FillSpans = sna_fill_spans__dash_clip_boxes; sna_gc_ops__tmp.PolyPoint = sna_poly_point__dash_clip_boxes; } } assert(gc->miTranslate); DBG(("%s: miZeroLine (solid dash, clipped? %d (complex? %d)), fg pass [%08x]\n", __FUNCTION__, !!(data.flags & IS_CLIPPED), data.flags & IS_CLIPPED && !region_is_singular(&data.region), gc->fgPixel)); if (!sna_fill_init_blt(&fill, data.sna, data.pixmap, data.bo, gc->alu, color, FILL_POINTS | FILL_SPANS)) goto fallback; gc->ops = &sna_gc_ops__tmp; data.phase = gc->fgPixel; miZeroDashLine(drawable, gc, mode, n, pt); fill.done(data.sna, &fill); DBG(("%s: miZeroLine (solid dash, clipped? %d (complex? %d)), bg pass [%08x]\n", __FUNCTION__, !!(data.flags & IS_CLIPPED), data.flags & IS_CLIPPED && !region_is_singular(&data.region), gc->bgPixel)); if (sna_fill_init_blt(&fill, data.sna, data.pixmap, data.bo, gc->alu, gc->bgPixel, FILL_POINTS | FILL_SPANS)) { data.phase = gc->bgPixel; miZeroDashLine(drawable, gc, mode, n, pt); fill.done(data.sna, &fill); } } } else { /* Note that the WideDash functions alternate * between filling using fgPixel and bgPixel * so we need to reset state between FillSpans and * cannot use the fill fast paths. */ sna_gc_ops__tmp.FillSpans = sna_fill_spans__gpu; sna_gc_ops__tmp.PolyFillRect = sna_poly_fill_rect__gpu; sna_gc_ops__tmp.PolyPoint = sna_poly_point__gpu; gc->ops = &sna_gc_ops__tmp; switch (gc->lineStyle) { default: assert(0); case LineSolid: if (gc->lineWidth == 0) { DBG(("%s: miZeroLine\n", __FUNCTION__)); miZeroLine(drawable, gc, mode, n, pt); } else { DBG(("%s: miWideLine\n", __FUNCTION__)); miWideLine(drawable, gc, mode, n, pt); } break; case LineOnOffDash: case LineDoubleDash: if (gc->lineWidth == 0) { DBG(("%s: miZeroDashLine\n", __FUNCTION__)); miZeroDashLine(drawable, gc, mode, n, pt); } else { DBG(("%s: miWideDash\n", __FUNCTION__)); miWideDash(drawable, gc, mode, n, pt); } break; } } gc->ops = (GCOps *)&sna_gc_ops; if (data.damage) { if (data.dx | data.dy) pixman_region_translate(&data.region, data.dx, data.dy); assert_pixmap_contains_box(data.pixmap, &data.region.extents); sna_damage_add_to_pixmap(data.damage, &data.region, data.pixmap); assert_pixmap_damage(data.pixmap); } RegionUninit(&data.region); return; } fallback: DBG(("%s: fallback\n", __FUNCTION__)); if (!region_maybe_clip(&data.region, gc->pCompositeClip)) return; if (!sna_gc_move_to_cpu(gc, drawable, &data.region)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, &data.region, drawable_gc_flags(drawable, gc, !(data.flags & RECTILINEAR && n == 2)))) goto out; if (sigtrap_get() == 0) { DBG(("%s: fbPolyLine\n", __FUNCTION__)); fbPolyLine(drawable, gc, mode, n, pt); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(&data.region); } static inline void box_from_seg(BoxPtr b, const xSegment *seg, GCPtr gc) { if (seg->x1 == seg->x2) { if (seg->y1 > seg->y2) { b->y2 = seg->y1 + 1; b->y1 = seg->y2 + 1; if (gc->capStyle != CapNotLast) b->y1--; } else { b->y1 = seg->y1; b->y2 = seg->y2; if (gc->capStyle != CapNotLast) b->y2++; } b->x1 = seg->x1; b->x2 = seg->x1 + 1; } else { if (seg->x1 > seg->x2) { b->x2 = seg->x1 + 1; b->x1 = seg->x2 + 1; if (gc->capStyle != CapNotLast) b->x1--; } else { b->x1 = seg->x1; b->x2 = seg->x2; if (gc->capStyle != CapNotLast) b->x2++; } b->y1 = seg->y1; b->y2 = seg->y1 + 1; } DBG(("%s: seg=(%d,%d),(%d,%d); box=(%d,%d),(%d,%d)\n", __FUNCTION__, seg->x1, seg->y1, seg->x2, seg->y2, b->x1, b->y1, b->x2, b->y2)); } static bool sna_poly_segment_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, uint32_t pixel, int n, xSegment *seg, const BoxRec *extents, unsigned clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); BoxRec boxes[512], *b = boxes, * const last_box = boxes + ARRAY_SIZE(boxes); struct sna_fill_op fill; int16_t dx, dy; DBG(("%s: n=%d, alu=%d, fg=%08lx, clipped=%d\n", __FUNCTION__, n, gc->alu, gc->fgPixel, clipped)); if (!sna_fill_init_blt(&fill, sna, pixmap, bo, gc->alu, pixel, FILL_SPANS)) return false; get_drawable_deltas(drawable, pixmap, &dx, &dy); if (!clipped) { dx += drawable->x; dy += drawable->y; if (dx|dy) { do { unsigned nbox = n; if (nbox > ARRAY_SIZE(boxes)) nbox = ARRAY_SIZE(boxes); n -= nbox; do { box_from_seg(b, seg++, gc); if (b->y2 > b->y1 && b->x2 > b->x1) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; b++; } } while (--nbox); if (b != boxes) { fill.boxes(sna, &fill, boxes, b-boxes); if (damage) sna_damage_add_boxes(damage, boxes, b-boxes, 0, 0); b = boxes; } } while (n); } else { do { unsigned nbox = n; if (nbox > ARRAY_SIZE(boxes)) nbox = ARRAY_SIZE(boxes); n -= nbox; do { box_from_seg(b++, seg++, gc); } while (--nbox); if (b != boxes) { fill.boxes(sna, &fill, boxes, b-boxes); if (damage) sna_damage_add_boxes(damage, boxes, b-boxes, 0, 0); b = boxes; } } while (n); } } else { RegionRec clip; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) goto done; if (clip.data) { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; const BoxRec *c; do { BoxRec box; box_from_seg(&box, seg++, gc); box.x1 += drawable->x; box.x2 += drawable->x; box.y1 += drawable->y; box.y2 += drawable->y; c = find_clip_box_for_y(clip_start, clip_end, box.y1); while (c != clip_end) { if (box.y2 <= c->y1) break; *b = box; if (box_intersect(b, c++)) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; if (++b == last_box) { fill.boxes(sna, &fill, boxes, last_box-boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box-boxes, 0, 0); b = boxes; } } } } while (--n); } else { do { box_from_seg(b, seg++, gc); b->x1 += drawable->x; b->x2 += drawable->x; b->y1 += drawable->y; b->y2 += drawable->y; if (box_intersect(b, &clip.extents)) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; if (++b == last_box) { fill.boxes(sna, &fill, boxes, last_box-boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box-boxes, 0, 0); b = boxes; } } } while (--n); } RegionUninit(&clip); } if (b != boxes) { fill.boxes(sna, &fill, boxes, b - boxes); if (damage) sna_damage_add_boxes(damage, boxes, b - boxes, 0, 0); } done: fill.done(sna, &fill); assert_pixmap_damage(pixmap); return true; } static bool sna_poly_zero_segment_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, const int _n, const xSegment *_s, const BoxRec *extents, unsigned clipped) { static void * const _jump[] = { &&no_damage, &&damage, &&no_damage_offset, &&damage_offset, }; PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); unsigned int bias = miGetZeroLineBias(drawable->pScreen); struct sna_fill_op fill; RegionRec clip; const BoxRec *last_extents; BoxRec box[512], *b; BoxRec *const last_box = box + ARRAY_SIZE(box); int16_t dx, dy; void *jump, *ret; DBG(("%s: alu=%d, pixel=%lx, n=%d, clipped=%d, damage=%p\n", __FUNCTION__, gc->alu, gc->fgPixel, _n, clipped, damage)); if (!sna_fill_init_blt(&fill, sna, pixmap, bo, gc->alu, gc->fgPixel, FILL_BOXES)) return false; get_drawable_deltas(drawable, pixmap, &dx, &dy); region_set(&clip, extents); if (clipped) { if (!region_maybe_clip(&clip, gc->pCompositeClip)) return true; } DBG(("%s: [clipped] extents=(%d, %d), (%d, %d), delta=(%d, %d)\n", __FUNCTION__, clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2, dx, dy)); jump = _jump[(damage != NULL) | !!(dx|dy) << 1]; b = box; extents = region_rects(&clip); last_extents = extents + region_num_rects(&clip); do { int n = _n; const xSegment *s = _s; do { int16_t sdx, sdy; int adx, ady, length; int e, e1, e2, e3; int x1, x2; int y1, y2; int oc1, oc2; int octant; x1 = s->x1 + drawable->x; y1 = s->y1 + drawable->y; x2 = s->x2 + drawable->x; y2 = s->y2 + drawable->y; s++; DBG(("%s: segment (%d, %d) to (%d, %d)\n", __FUNCTION__, x1, y1, x2, y2)); if (x2 == x1 && y2 == y1) continue; oc1 = 0; OUTCODES(oc1, x1, y1, extents); oc2 = 0; OUTCODES(oc2, x2, y2, extents); if (oc1 & oc2) continue; CalcLineDeltas(x1, y1, x2, y2, adx, ady, sdx, sdy, 1, 1, octant); DBG(("%s: adx=(%d, %d), sdx=(%d, %d)\n", __FUNCTION__, adx, ady, sdx, sdy)); if (adx == 0 || ady == 0) { if (x1 <= x2) { b->x1 = x1; b->x2 = x2; } else { b->x1 = x2; b->x2 = x1; } if (y1 <= y2) { b->y1 = y1; b->y2 = y2; } else { b->y1 = y2; b->y2 = y1; } b->x2++; b->y2++; if (oc1 | oc2) box_intersect(b, extents); if (++b == last_box) { ret = &&rectangle_continue; goto *jump; rectangle_continue: b = box; } } else if (adx >= ady) { bool dirty; /* X-major segment */ e1 = ady << 1; e2 = e1 - (adx << 1); e = e1 - adx; length = adx; /* don't draw endpoint in main loop */ FIXUP_ERROR(e, octant, bias); if (oc1 | oc2) { int pt1_clipped, pt2_clipped; int x = x1, y = y1; if (miZeroClipLine(extents->x1, extents->y1, extents->x2-1, extents->y2-1, &x1, &y1, &x2, &y2, adx, ady, &pt1_clipped, &pt2_clipped, octant, bias, oc1, oc2) == -1) continue; length = abs(x2 - x1); if (length == 0) continue; if (pt1_clipped) { int clipdx = abs(x1 - x); int clipdy = abs(y1 - y); e += clipdy * e2 + (clipdx - clipdy) * e1; } } e3 = e2 - e1; e = e - e1; b->x1 = x1; b->y1 = y1; dirty = false; while (length--) { dirty = true; e += e1; if (e >= 0) { e += e3; if (sdx < 0) { b->x2 = b->x1 + 1; b->x1 = x1; } else b->x2 = x1 + 1; b->y2 = b->y1 + 1; DBG(("%s: horizontal step: (%d, %d), box: (%d, %d), (%d, %d)\n", __FUNCTION__, x1, y1, b->x1, b->y1, b->x2, b->y2)); if (++b == last_box) { ret = &&X_continue; goto *jump; X_continue: b = box; } b->x1 = x1 + sdx; b->y1 = y1 += sdy; dirty = false; } x1 += sdx; } if (dirty) { x1 -= sdx; DBG(("%s: horizontal tail: (%d, %d)\n", __FUNCTION__, x1, y1)); if (sdx < 0) { b->x2 = b->x1 + 1; b->x1 = x1; } else b->x2 = x1 + 1; b->y2 = b->y1 + 1; if (++b == last_box) { ret = &&X2_continue; goto *jump; X2_continue: b = box; } } } else { bool dirty; /* Y-major segment */ e1 = adx << 1; e2 = e1 - (ady << 1); e = e1 - ady; length = ady; /* don't draw endpoint in main loop */ SetYMajorOctant(octant); FIXUP_ERROR(e, octant, bias); if (oc1 | oc2) { int pt1_clipped, pt2_clipped; int x = x1, y = y1; if (miZeroClipLine(extents->x1, extents->y1, extents->x2-1, extents->y2-1, &x1, &y1, &x2, &y2, adx, ady, &pt1_clipped, &pt2_clipped, octant, bias, oc1, oc2) == -1) continue; length = abs(y2 - y1); if (length == 0) continue; if (pt1_clipped) { int clipdx = abs(x1 - x); int clipdy = abs(y1 - y); e += clipdx * e2 + (clipdy - clipdx) * e1; } } e3 = e2 - e1; e = e - e1; b->x1 = x1; b->y1 = y1; dirty = false; while (length--) { e += e1; dirty = true; if (e >= 0) { e += e3; if (sdy < 0) { b->y2 = b->y1 + 1; b->y1 = y1; } else b->y2 = y1 + 1; b->x2 = x1 + 1; if (++b == last_box) { ret = &&Y_continue; goto *jump; Y_continue: b = box; } b->x1 = x1 += sdx; b->y1 = y1 + sdy; dirty = false; } y1 += sdy; } if (dirty) { y1 -= sdy; if (sdy < 0) { b->y2 = b->y1 + 1; b->y1 = y1; } else b->y2 = y1 + 1; b->x2 = x1 + 1; if (++b == last_box) { ret = &&Y2_continue; goto *jump; Y2_continue: b = box; } } } } while (--n); } while (++extents != last_extents); if (b != box) { ret = &&done; goto *jump; } done: fill.done(sna, &fill); assert_pixmap_damage(pixmap); RegionUninit(&clip); return true; damage: sna_damage_add_boxes(damage, box, b-box, 0, 0); no_damage: fill.boxes(sna, &fill, box, b-box); goto *ret; no_damage_offset: { BoxRec *bb = box; do { bb->x1 += dx; bb->x2 += dx; bb->y1 += dy; bb->y2 += dy; } while (++bb != b); fill.boxes(sna, &fill, box, b - box); } goto *ret; damage_offset: { BoxRec *bb = box; do { bb->x1 += dx; bb->x2 += dx; bb->y1 += dy; bb->y2 += dy; } while (++bb != b); fill.boxes(sna, &fill, box, b - box); sna_damage_add_boxes(damage, box, b - box, 0, 0); } goto *ret; } static unsigned sna_poly_segment_extents(DrawablePtr drawable, GCPtr gc, int n, xSegment *seg, BoxPtr out) { BoxRec box; bool clipped, can_blit; if (n == 0) return 0; if (seg->x2 >= seg->x1) { box.x1 = seg->x1; box.x2 = seg->x2; } else { box.x2 = seg->x1; box.x1 = seg->x2; } if (seg->y2 >= seg->y1) { box.y1 = seg->y1; box.y2 = seg->y2; } else { box.y2 = seg->y1; box.y1 = seg->y2; } can_blit = seg->x1 == seg->x2 || seg->y1 == seg->y2; while (--n) { seg++; if (seg->x2 > seg->x1) { if (seg->x1 < box.x1) box.x1 = seg->x1; if (seg->x2 > box.x2) box.x2 = seg->x2; } else { if (seg->x2 < box.x1) box.x1 = seg->x2; if (seg->x1 > box.x2) box.x2 = seg->x1; } if (seg->y2 > seg->y1) { if (seg->y1 < box.y1) box.y1 = seg->y1; if (seg->y2 > box.y2) box.y2 = seg->y2; } else { if (seg->y2 < box.y1) box.y1 = seg->y2; if (seg->y1 > box.y2) box.y2 = seg->y1; } if (can_blit && !(seg->x1 == seg->x2 || seg->y1 == seg->y2)) can_blit = false; } box.x2++; box.y2++; if (gc->lineWidth) { int extra = gc->lineWidth; if (gc->capStyle != CapProjecting) extra >>= 1; if (extra) { box.x1 -= extra; box.x2 += extra; box.y1 -= extra; box.y2 += extra; } } DBG(("%s: unclipped, untranslated extents (%d, %d), (%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2)); clipped = trim_and_translate_box(&box, drawable, gc); if (box_empty(&box)) return 0; *out = box; return 1 | clipped << 1 | can_blit << 2; } static void sna_poly_segment(DrawablePtr drawable, GCPtr gc, int n, xSegment *seg) { struct sna_pixmap *priv; struct sna_fill_spans data; uint32_t color; DBG(("%s(n=%d, first=((%d, %d), (%d, %d)), lineWidth=%d\n", __FUNCTION__, n, seg->x1, seg->y1, seg->x2, seg->y2, gc->lineWidth)); data.flags = sna_poly_segment_extents(drawable, gc, n, seg, &data.region.extents); if (data.flags == 0) return; DBG(("%s: extents=(%d, %d), (%d, %d)\n", __FUNCTION__, data.region.extents.x1, data.region.extents.y1, data.region.extents.x2, data.region.extents.y2)); data.region.data = NULL; if (FORCE_FALLBACK) goto fallback; if (!ACCEL_POLY_SEGMENT) goto fallback; data.pixmap = get_drawable_pixmap(drawable); data.sna = to_sna_from_pixmap(data.pixmap); priv = sna_pixmap(data.pixmap); if (priv == NULL) { DBG(("%s: fallback -- unattached\n", __FUNCTION__)); goto fallback; } if (wedged(data.sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } DBG(("%s: fill=%d [%d], line=%d [%d], width=%d, mask=%lu [%d], rectlinear=%d\n", __FUNCTION__, gc->fillStyle, gc->fillStyle == FillSolid, gc->lineStyle, gc->lineStyle == LineSolid, gc->lineWidth, gc->planemask, PM_IS_SOLID(drawable, gc->planemask), data.flags & RECTILINEAR)); if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; if (gc->lineStyle != LineSolid || gc->lineWidth > 1) goto spans_fallback; data.bo = sna_drawable_use_bo(drawable, PREFER_GPU, &data.region.extents, &data.damage); if (data.bo == NULL) goto fallback; if (gc_is_solid(gc, &color)) { DBG(("%s: trying blt solid fill [%08x, flags=%x] paths\n", __FUNCTION__, (unsigned)color, data.flags)); if (data.flags & RECTILINEAR) { if (sna_poly_segment_blt(drawable, data.bo, data.damage, gc, color, n, seg, &data.region.extents, data.flags & IS_CLIPPED)) return; } else { if (sna_poly_zero_segment_blt(drawable, data.bo, data.damage, gc, n, seg, &data.region.extents, data.flags & IS_CLIPPED)) return; } } else if (data.flags & RECTILINEAR) { /* Try converting these to a set of rectangles instead */ xRectangle *rect; int i; DBG(("%s: converting to rectangles\n", __FUNCTION__)); rect = malloc (n * sizeof (xRectangle)); if (rect == NULL) return; for (i = 0; i < n; i++) { if (seg[i].x1 < seg[i].x2) { rect[i].x = seg[i].x1; rect[i].width = seg[i].x2 - seg[i].x1 + 1; } else if (seg[i].x1 > seg[i].x2) { rect[i].x = seg[i].x2; rect[i].width = seg[i].x1 - seg[i].x2 + 1; } else { rect[i].x = seg[i].x1; rect[i].width = 1; } if (seg[i].y1 < seg[i].y2) { rect[i].y = seg[i].y1; rect[i].height = seg[i].y2 - seg[i].y1 + 1; } else if (seg[i].y1 > seg[i].y2) { rect[i].y = seg[i].y2; rect[i].height = seg[i].y1 - seg[i].y2 + 1; } else { rect[i].y = seg[i].y1; rect[i].height = 1; } /* don't paint last pixel */ if (gc->capStyle == CapNotLast) { if (seg[i].x1 == seg[i].x2) rect[i].height--; else rect[i].width--; } } if (gc->fillStyle == FillTiled) { i = sna_poly_fill_rect_tiled_blt(drawable, data.bo, data.damage, gc, n, rect, &data.region.extents, data.flags); } else { i = sna_poly_fill_rect_stippled_blt(drawable, data.bo, data.damage, gc, n, rect, &data.region.extents, data.flags); } free (rect); if (i) return; } spans_fallback: if ((data.bo = sna_drawable_use_bo(drawable, use_line_spans(drawable, gc, &data.region.extents, data.flags), &data.region.extents, &data.damage))) { void (*line)(DrawablePtr, GCPtr, int, int, DDXPointPtr); int i; DBG(("%s: converting segments into spans\n", __FUNCTION__)); switch (gc->lineStyle) { default: case LineSolid: if (gc->lineWidth == 0) line = miZeroLine; else line = miWideLine; break; case LineOnOffDash: case LineDoubleDash: if (gc->lineWidth == 0) line = miZeroDashLine; else line = miWideDash; break; } get_drawable_deltas(drawable, data.pixmap, &data.dx, &data.dy); sna_gc(gc)->priv = &data; if (gc->lineWidth == 0 && gc->lineStyle == LineSolid && gc_is_solid(gc, &color)) { struct sna_fill_op fill; if (!sna_fill_init_blt(&fill, data.sna, data.pixmap, data.bo, gc->alu, color, FILL_POINTS | FILL_SPANS)) goto fallback; data.op = &fill; if ((data.flags & IS_CLIPPED) == 0) { if (data.dx | data.dy) sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_offset; else sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill; sna_gc_ops__tmp.PolyPoint = sna_poly_point__fill; } else { if (!region_maybe_clip(&data.region, gc->pCompositeClip)) return; if (region_is_singular(&data.region)) { sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_clip_extents; sna_gc_ops__tmp.PolyPoint = sna_poly_point__fill_clip_extents; } else { sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_clip_boxes; sna_gc_ops__tmp.PolyPoint = sna_poly_point__fill_clip_boxes; } } assert(gc->miTranslate); gc->ops = &sna_gc_ops__tmp; for (i = 0; i < n; i++) line(drawable, gc, CoordModeOrigin, 2, (DDXPointPtr)&seg[i]); fill.done(data.sna, &fill); } else { sna_gc_ops__tmp.FillSpans = sna_fill_spans__gpu; sna_gc_ops__tmp.PolyFillRect = sna_poly_fill_rect__gpu; sna_gc_ops__tmp.PolyPoint = sna_poly_point__gpu; gc->ops = &sna_gc_ops__tmp; for (i = 0; i < n; i++) line(drawable, gc, CoordModeOrigin, 2, (DDXPointPtr)&seg[i]); } gc->ops = (GCOps *)&sna_gc_ops; if (data.damage) { if (data.dx | data.dy) pixman_region_translate(&data.region, data.dx, data.dy); assert_pixmap_contains_box(data.pixmap, &data.region.extents); sna_damage_add_to_pixmap(data.damage, &data.region, data.pixmap); } assert_pixmap_damage(data.pixmap); RegionUninit(&data.region); return; } fallback: DBG(("%s: fallback\n", __FUNCTION__)); if (!region_maybe_clip(&data.region, gc->pCompositeClip)) return; if (!sna_gc_move_to_cpu(gc, drawable, &data.region)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, &data.region, drawable_gc_flags(drawable, gc, !(data.flags & RECTILINEAR && n == 1)))) goto out; if (sigtrap_get() == 0) { DBG(("%s: fbPolySegment\n", __FUNCTION__)); fbPolySegment(drawable, gc, n, seg); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(&data.region); } static unsigned sna_poly_rectangle_extents(DrawablePtr drawable, GCPtr gc, int n, xRectangle *r, BoxPtr out) { Box32Rec box; int extra = gc->lineWidth >> 1; bool clipped; bool zero = false; if (n == 0) return 0; box.x1 = r->x; box.y1 = r->y; box.x2 = box.x1 + r->width; box.y2 = box.y1 + r->height; zero |= (r->width | r->height) == 0; while (--n) { r++; zero |= (r->width | r->height) == 0; box32_add_rect(&box, r); } box.x2++; box.y2++; if (extra) { box.x1 -= extra; box.x2 += extra; box.y1 -= extra; box.y2 += extra; zero = !zero; } else zero = true; DBG(("%s: unclipped original extents: (%d, %d), (%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2)); clipped = box32_trim_and_translate(&box, drawable, gc); if (!box32_to_box16(&box, out)) return 0; DBG(("%s: extents: (%d, %d), (%d, %d), clipped? %d\n", __FUNCTION__, out->x1, out->y1, out->x2, out->y2, clipped)); return 1 | clipped << 1 | zero << 2; } static bool sna_poly_rectangle_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int n, xRectangle *r, const BoxRec *extents, unsigned clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_fill_op fill; BoxRec boxes[512], *b = boxes, *const last_box = boxes+ARRAY_SIZE(boxes); int16_t dx, dy; static void * const jump[] = { &&wide, &&zero, &&wide_clipped, &&zero_clipped, }; DBG(("%s: n=%d, alu=%d, width=%d, fg=%08lx, damge=%p, clipped?=%d\n", __FUNCTION__, n, gc->alu, gc->lineWidth, gc->fgPixel, damage, clipped)); if (!sna_fill_init_blt(&fill, sna, pixmap, bo, gc->alu, gc->fgPixel, FILL_BOXES)) return false; get_drawable_deltas(drawable, pixmap, &dx, &dy); goto *jump[(gc->lineWidth <= 1) | clipped]; zero: dx += drawable->x; dy += drawable->y; do { xRectangle rr = *r++; if ((rr.width | rr.height) == 0) continue; /* XXX -> PolyLine */ DBG(("%s - zero : r[%d] = (%d, %d) x (%d, %d)\n", __FUNCTION__, n, rr.x, rr.y, rr.width, rr.height)); rr.x += dx; rr.y += dy; if (b+4 > last_box) { fill.boxes(sna, &fill, boxes, b-boxes); if (damage) sna_damage_add_boxes(damage, boxes, b-boxes, 0, 0); b = boxes; } if (rr.width <= 1 || rr.height <= 1) { b->x1 = rr.x; b->y1 = rr.y; b->x2 = rr.x + rr.width + (rr.height != 0); b->y2 = rr.y + rr.height + (rr.width != 0); DBG(("%s: blt (%d, %d), (%d, %d)\n", __FUNCTION__, b->x1, b->y1, b->x2,b->y2)); b++; } else { b[0].x1 = rr.x; b[0].y1 = rr.y; b[0].x2 = rr.x + rr.width + 1; b[0].y2 = rr.y + 1; b[1] = b[0]; b[1].y1 += rr.height; b[1].y2 += rr.height; b[2].y1 = rr.y + 1; b[2].y2 = rr.y + rr.height; b[2].x1 = rr.x; b[2].x2 = rr.x + 1; b[3] = b[2]; b[3].x1 += rr.width; b[3].x2 += rr.width; b += 4; } } while (--n); goto done; zero_clipped: { RegionRec clip; BoxRec box[4]; int count; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) goto done; if (clip.data) { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; const BoxRec *c; do { xRectangle rr = *r++; DBG(("%s - zero, clipped complex: r[%d] = (%d, %d) x (%d, %d)\n", __FUNCTION__, n, rr.x, rr.y, rr.width, rr.height)); if ((rr.width | rr.height) == 0) continue; /* XXX -> PolyLine */ rr.x += drawable->x; rr.y += drawable->y; if (rr.width <= 1 || rr.height <= 1) { box[0].x1 = rr.x; box[0].y1 = rr.y; box[0].x2 = rr.x + rr.width + (rr.height != 0); box[0].y2 = rr.y + rr.height + (rr.width != 0); count = 1; } else { box[0].x1 = rr.x; box[0].y1 = rr.y; box[0].x2 = rr.x + rr.width + 1; box[0].y2 = rr.y + 1; box[1] = box[0]; box[1].y1 += rr.height; box[1].y2 += rr.height; box[2].y1 = rr.y + 1; box[2].y2 = rr.y + rr.height; box[2].x1 = rr.x; box[2].x2 = rr.x + 1; box[3] = box[2]; box[3].x1 += rr.width; box[3].x2 += rr.width; count = 4; } while (count--) { c = find_clip_box_for_y(clip_start, clip_end, box[count].y1); while (c != clip_end) { if (box[count].y2 <= c->y1) break; *b = box[count]; if (box_intersect(b, c++)) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; if (++b == last_box) { fill.boxes(sna, &fill, boxes, last_box-boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box-boxes, 0, 0); b = boxes; } } } } } while (--n); } else { do { xRectangle rr = *r++; DBG(("%s - zero, clip: r[%d] = (%d, %d) x (%d, %d)\n", __FUNCTION__, n, rr.x, rr.y, rr.width, rr.height)); if ((rr.width | rr.height) == 0) continue; /* XXX -> PolyLine */ rr.x += drawable->x; rr.y += drawable->y; if (rr.width <= 1 || rr.height <= 1) { box[0].x1 = rr.x; box[0].y1 = rr.y; box[0].x2 = rr.x + rr.width + (rr.height != 0); box[0].y2 = rr.y + rr.height + (rr.width != 0); count = 1; } else { box[0].x1 = rr.x; box[0].y1 = rr.y; box[0].x2 = rr.x + rr.width + 1; box[0].y2 = rr.y + 1; box[1] = box[0]; box[1].y1 += rr.height; box[1].y2 += rr.height; box[2].y1 = rr.y + 1; box[2].y2 = rr.y + rr.height; box[2].x1 = rr.x; box[2].x2 = rr.x + 1; box[3] = box[2]; box[3].x1 += rr.width; box[3].x2 += rr.width; count = 4; } while (count--) { *b = box[count]; if (box_intersect(b, &clip.extents)) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; if (++b == last_box) { fill.boxes(sna, &fill, boxes, last_box-boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box-boxes, 0, 0); b = boxes; } } } } while (--n); } RegionUninit(&clip); } goto done; wide_clipped: { RegionRec clip; BoxRec box[4]; int16_t offset2 = gc->lineWidth; int16_t offset1 = offset2 >> 1; int16_t offset3 = offset2 - offset1; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) goto done; DBG(("%s: wide clipped: extents=((%d, %d), (%d, %d))\n", __FUNCTION__, clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2)); if (clip.data) { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; const BoxRec *c; do { xRectangle rr = *r++; int count; if ((rr.width | rr.height) == 0) continue; /* XXX -> PolyLine */ rr.x += drawable->x; rr.y += drawable->y; if (rr.height <= offset2 || rr.width <= offset2) { if (rr.height == 0) { box[0].x1 = rr.x; box[0].x2 = rr.x + rr.width; } else { box[0].x1 = rr.x - offset1; box[0].x2 = rr.x + rr.width + offset3; } if (rr.width == 0) { box[0].y1 = rr.y; box[0].y2 = rr.y + rr.height; } else { box[0].y1 = rr.y - offset1; box[0].y2 = rr.y + rr.height + offset3; } count = 1; } else { box[0].x1 = rr.x - offset1; box[0].x2 = box[0].x1 + rr.width + offset2; box[0].y1 = rr.y - offset1; box[0].y2 = box[0].y1 + offset2; box[1].x1 = rr.x - offset1; box[1].x2 = box[1].x1 + offset2; box[1].y1 = rr.y + offset3; box[1].y2 = rr.y + rr.height - offset1; box[2] = box[1]; box[2].x1 += rr.width; box[2].x2 += rr.width; box[3] = box[0]; box[3].y1 += rr.height; box[3].y2 += rr.height; count = 4; } while (count--) { c = find_clip_box_for_y(clip_start, clip_end, box[count].y1); while (c != clip_end) { if (box[count].y2 <= c->y1) break; *b = box[count]; if (box_intersect(b, c++)) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; if (++b == last_box) { fill.boxes(sna, &fill, boxes, last_box-boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box-boxes, 0, 0); b = boxes; } } } } } while (--n); } else { DBG(("%s: singular clip offset1=%d, offset2=%d, offset3=%d\n", __FUNCTION__, offset1, offset2, offset3)); do { xRectangle rr = *r++; int count; rr.x += drawable->x; rr.y += drawable->y; DBG(("%s: r=(%d, %d)x(%d, %d)\n", __FUNCTION__, rr.x, rr.y, rr.width, rr.height)); if (rr.height <= offset2 || rr.width <= offset2) { if (rr.height == 0) { box[0].x1 = rr.x; box[0].x2 = rr.x + rr.width; } else { box[0].x1 = rr.x - offset1; box[0].x2 = box[0].x1 + rr.width + offset2; } if (rr.width == 0) { box[0].y1 = rr.y; box[0].y2 = rr.y + rr.height; } else { box[0].y1 = rr.y - offset1; box[0].y2 = box[0].y1 + rr.height + offset2; } count = 1; } else { box[0].x1 = rr.x - offset1; box[0].x2 = box[0].x1 + rr.width + offset2; box[0].y1 = rr.y - offset1; box[0].y2 = box[0].y1 + offset2; DBG(("%s: box[0]=(%d, %d), (%d, %d)\n", __FUNCTION__, box[0].x1, box[0].y1, box[0].x2, box[0].y2)); box[1].x1 = rr.x - offset1; box[1].x2 = box[1].x1 + offset2; box[1].y1 = rr.y + offset3; box[1].y2 = rr.y + rr.height - offset1; DBG(("%s: box[1]=(%d, %d), (%d, %d)\n", __FUNCTION__, box[1].x1, box[1].y1, box[1].x2, box[1].y2)); box[2] = box[1]; box[2].x1 += rr.width; box[2].x2 += rr.width; DBG(("%s: box[2]=(%d, %d), (%d, %d)\n", __FUNCTION__, box[2].x1, box[2].y1, box[2].x2, box[2].y2)); box[3] = box[0]; box[3].y1 += rr.height; box[3].y2 += rr.height; DBG(("%s: box[3]=(%d, %d), (%d, %d)\n", __FUNCTION__, box[3].x1, box[3].y1, box[3].x2, box[3].y2)); count = 4; } while (count--) { *b = box[count]; if (box_intersect(b, &clip.extents)) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; if (++b == last_box) { fill.boxes(sna, &fill, boxes, last_box-boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box-boxes, 0, 0); b = boxes; } } } } while (--n); } RegionUninit(&clip); } goto done; wide: { int offset2 = gc->lineWidth; int offset1 = offset2 >> 1; int offset3 = offset2 - offset1; dx += drawable->x; dy += drawable->y; do { xRectangle rr = *r++; if ((rr.width | rr.height) == 0) continue; /* XXX -> PolyLine */ rr.x += dx; rr.y += dy; if (b+4 > last_box) { fill.boxes(sna, &fill, boxes, last_box-boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box-boxes, 0, 0); b = boxes; } if (rr.height <= offset2 || rr.width <= offset2) { if (rr.height == 0) { b->x1 = rr.x; b->x2 = rr.x + rr.width; } else { b->x1 = rr.x - offset1; b->x2 = rr.x + rr.width + offset3; } if (rr.width == 0) { b->y1 = rr.y; b->y2 = rr.y + rr.height; } else { b->y1 = rr.y - offset1; b->y2 = rr.y + rr.height + offset3; } b++; } else { b[0].x1 = rr.x - offset1; b[0].x2 = b[0].x1 + rr.width + offset2; b[0].y1 = rr.y - offset1; b[0].y2 = b[0].y1 + offset2; b[1].x1 = rr.x - offset1; b[1].x2 = b[1].x1 + offset2; b[1].y1 = rr.y + offset3; b[1].y2 = rr.y + rr.height - offset1; b[2] = b[1]; b[2].x1 += rr.width; b[2].x2 += rr.width; b[3] = b[0]; b[3].y1 += rr.height; b[3].y2 += rr.height; b += 4; } } while (--n); } goto done; done: if (b != boxes) { fill.boxes(sna, &fill, boxes, b-boxes); if (damage) sna_damage_add_boxes(damage, boxes, b-boxes, 0, 0); } fill.done(sna, &fill); assert_pixmap_damage(pixmap); return true; } static void sna_poly_rectangle(DrawablePtr drawable, GCPtr gc, int n, xRectangle *r) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_damage **damage; struct kgem_bo *bo; RegionRec region; unsigned flags; DBG(("%s(n=%d, first=((%d, %d)x(%d, %d)), lineWidth=%d\n", __FUNCTION__, n, r->x, r->y, r->width, r->height, gc->lineWidth)); flags = sna_poly_rectangle_extents(drawable, gc, n, r, ®ion.extents); if (flags == 0) return; DBG(("%s: extents=(%d, %d), (%d, %d), flags=%x\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2, flags)); if (FORCE_FALLBACK) goto fallback; if (!ACCEL_POLY_RECTANGLE) goto fallback; if (wedged(sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } DBG(("%s: fill=%d [%d], line=%d [%d], join=%d [%d], mask=%lu [%d]\n", __FUNCTION__, gc->fillStyle, gc->fillStyle == FillSolid, gc->lineStyle, gc->lineStyle == LineSolid, gc->joinStyle, gc->joinStyle == JoinMiter, gc->planemask, PM_IS_SOLID(drawable, gc->planemask))); if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; if (flags & RECTILINEAR && gc->fillStyle == FillSolid && gc->lineStyle == LineSolid && gc->joinStyle == JoinMiter) { DBG(("%s: trying blt solid fill [%08lx] paths\n", __FUNCTION__, gc->fgPixel)); if ((bo = sna_drawable_use_bo(drawable, PREFER_GPU, ®ion.extents, &damage)) && sna_poly_rectangle_blt(drawable, bo, damage, gc, n, r, ®ion.extents, flags&2)) return; } else { /* Not a trivial outline, but we still maybe able to break it * down into simpler operations that we can accelerate. */ if (sna_drawable_use_bo(drawable, PREFER_GPU, ®ion.extents, &damage)) { miPolyRectangle(drawable, gc, n, r); return; } } fallback: DBG(("%s: fallback, clip=%dx[(%d, %d), (%d, %d)]\n", __FUNCTION__, region_num_rects(gc->pCompositeClip), gc->pCompositeClip->extents.x1, gc->pCompositeClip->extents.y1, gc->pCompositeClip->extents.x2, gc->pCompositeClip->extents.y2)); region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) return; DBG(("%s: CPU region=%dx[(%d, %d), (%d, %d)]\n", __FUNCTION__, region_num_rects(®ion), region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, drawable_gc_flags(drawable, gc, true))) goto out; if (sigtrap_get() == 0) { DBG(("%s: miPolyRectangle\n", __FUNCTION__)); miPolyRectangle(drawable, gc, n, r); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(®ion); } static unsigned sna_poly_arc_extents(DrawablePtr drawable, GCPtr gc, int n, xArc *arc, BoxPtr out) { BoxRec box; bool clipped; int v; if (n == 0) return 0; box.x1 = arc->x; box.x2 = bound(box.x1, arc->width); box.y1 = arc->y; box.y2 = bound(box.y1, arc->height); while (--n) { arc++; if (box.x1 > arc->x) box.x1 = arc->x; v = bound(arc->x, arc->width); if (box.x2 < v) box.x2 = v; if (box.y1 > arc->y) box.y1 = arc->y; v = bound(arc->y, arc->height); if (box.y2 < v) box.y2 = v; } v = gc->lineWidth >> 1; if (v) { box.x1 -= v; box.x2 += v; box.y1 -= v; box.y2 += v; } box.x2++; box.y2++; clipped = trim_and_translate_box(&box, drawable, gc); if (box_empty(&box)) return 0; *out = box; return 1 | clipped << 1; } static void sna_poly_arc(DrawablePtr drawable, GCPtr gc, int n, xArc *arc) { struct sna_fill_spans data; struct sna_pixmap *priv; DBG(("%s(n=%d, lineWidth=%d\n", __FUNCTION__, n, gc->lineWidth)); data.flags = sna_poly_arc_extents(drawable, gc, n, arc, &data.region.extents); if (data.flags == 0) return; DBG(("%s: extents=(%d, %d), (%d, %d), flags=%x\n", __FUNCTION__, data.region.extents.x1, data.region.extents.y1, data.region.extents.x2, data.region.extents.y2, data.flags)); data.region.data = NULL; if (FORCE_FALLBACK) goto fallback; if (!ACCEL_POLY_ARC) goto fallback; data.pixmap = get_drawable_pixmap(drawable); data.sna = to_sna_from_pixmap(data.pixmap); priv = sna_pixmap(data.pixmap); if (priv == NULL) { DBG(("%s: fallback -- unattached\n", __FUNCTION__)); goto fallback; } if (wedged(data.sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; if ((data.bo = sna_drawable_use_bo(drawable, PREFER_GPU, &data.region.extents, &data.damage))) { uint32_t color; DBG(("%s: converting arcs into spans\n", __FUNCTION__)); get_drawable_deltas(drawable, data.pixmap, &data.dx, &data.dy); if (gc_is_solid(gc, &color)) { sna_gc(gc)->priv = &data; assert(gc->miTranslate); if (gc->lineStyle == LineSolid) { struct sna_fill_op fill; if (!sna_fill_init_blt(&fill, data.sna, data.pixmap, data.bo, gc->alu, color, FILL_POINTS | FILL_SPANS)) goto fallback; if ((data.flags & IS_CLIPPED) == 0) { if (data.dx | data.dy) sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_offset; else sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill; sna_gc_ops__tmp.PolyPoint = sna_poly_point__fill; } else { if (!region_maybe_clip(&data.region, gc->pCompositeClip)) return; if (region_is_singular(&data.region)) { sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_clip_extents; sna_gc_ops__tmp.PolyPoint = sna_poly_point__fill_clip_extents; } else { sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_clip_boxes; sna_gc_ops__tmp.PolyPoint = sna_poly_point__fill_clip_boxes; } } data.op = &fill; gc->ops = &sna_gc_ops__tmp; if (gc->lineWidth == 0) miZeroPolyArc(drawable, gc, n, arc); else miPolyArc(drawable, gc, n, arc); gc->ops = (GCOps *)&sna_gc_ops; fill.done(data.sna, &fill); } else { if (!region_maybe_clip(&data.region, gc->pCompositeClip)) return; sna_gc_ops__tmp.FillSpans = sna_fill_spans__gpu; sna_gc_ops__tmp.PolyPoint = sna_poly_point__gpu; gc->ops = &sna_gc_ops__tmp; if (gc->lineWidth == 0) miZeroPolyArc(drawable, gc, n, arc); else miPolyArc(drawable, gc, n, arc); gc->ops = (GCOps *)&sna_gc_ops; } if (data.damage) { if (data.dx | data.dy) pixman_region_translate(&data.region, data.dx, data.dy); assert_pixmap_contains_box(data.pixmap, &data.region.extents); sna_damage_add_to_pixmap(data.damage, &data.region, data.pixmap); } assert_pixmap_damage(data.pixmap); RegionUninit(&data.region); return; } /* XXX still around 10x slower for x11perf -ellipse */ if (gc->lineWidth == 0) miZeroPolyArc(drawable, gc, n, arc); else miPolyArc(drawable, gc, n, arc); return; } fallback: DBG(("%s -- fallback\n", __FUNCTION__)); if (!region_maybe_clip(&data.region, gc->pCompositeClip)) return; if (!sna_gc_move_to_cpu(gc, drawable, &data.region)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, &data.region, drawable_gc_flags(drawable, gc, true))) goto out; if (sigtrap_get() == 0) { DBG(("%s -- fbPolyArc\n", __FUNCTION__)); fbPolyArc(drawable, gc, n, arc); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(&data.region); } static bool sna_poly_fill_rect_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, uint32_t pixel, int n, const xRectangle *rect, const BoxRec *extents, unsigned flags) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_fill_op fill; BoxRec boxes[512], *b = boxes, *const last_box = boxes+ARRAY_SIZE(boxes); int16_t dx, dy; DBG(("%s pixmap=%ld x %d [(%d, %d)x(%d, %d)...]+(%d,%d), clipped?=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, n, rect->x, rect->y, rect->width, rect->height, drawable->x, drawable->y, flags&2)); if (n == 1 && region_is_singular(gc->pCompositeClip)) { BoxRec r; bool success = true; r.x1 = rect->x + drawable->x; r.y1 = rect->y + drawable->y; r.x2 = bound(r.x1, rect->width); r.y2 = bound(r.y1, rect->height); if (box_intersect(&r, &gc->pCompositeClip->extents)) { if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) { r.x1 += dx; r.y1 += dy; r.x2 += dx; r.y2 += dy; } DBG(("%s: using fill_one() fast path: (%d, %d), (%d, %d). alu=%d, pixel=%08x, damage?=%d\n", __FUNCTION__, r.x1, r.y1, r.x2, r.y2, gc->alu, pixel, damage != NULL)); assert_pixmap_contains_box(pixmap, &r); if (sna->render.fill_one(sna, pixmap, bo, pixel, r.x1, r.y1, r.x2, r.y2, gc->alu)) { if (r.x2 - r.x1 == pixmap->drawable.width && r.y2 - r.y1 == pixmap->drawable.height) { if (damage) { sna_damage_all(damage, pixmap); damage = NULL; } if (flags & OVERWRITES) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (bo == priv->gpu_bo) { assert(damage == NULL || damage == &priv->gpu_damage); assert(priv->gpu_bo->proxy == NULL); sna_damage_destroy(&priv->cpu_damage); list_del(&priv->flush_list); priv->clear = true; priv->clear_color = gc->alu == GXcopyInverted ? ~pixel & ((1 << gc->depth) - 1) : pixel; DBG(("%s: pixmap=%ld, marking clear [%08x]\n", __FUNCTION__, pixmap->drawable.serialNumber, priv->clear_color)); } } } if (damage) sna_damage_add_box(damage, &r); assert_pixmap_damage(pixmap); } else success = false; } return success; } if (!sna_fill_init_blt(&fill, sna, pixmap, bo, gc->alu, pixel, FILL_BOXES)) { DBG(("%s: unsupported blt\n", __FUNCTION__)); return false; } get_drawable_deltas(drawable, pixmap, &dx, &dy); if ((flags & IS_CLIPPED) == 0) { dx += drawable->x; dy += drawable->y; sna_damage_add_rectangles(damage, rect, n, dx, dy); if (dx|dy) { do { unsigned nbox = n; if (nbox > ARRAY_SIZE(boxes)) nbox = ARRAY_SIZE(boxes); n -= nbox; do { b->x1 = rect->x + dx; b->y1 = rect->y + dy; b->x2 = b->x1 + rect->width; b->y2 = b->y1 + rect->height; b++; rect++; } while (--nbox); fill.boxes(sna, &fill, boxes, b-boxes); b = boxes; } while (n); } else { do { unsigned nbox = n; if (nbox > ARRAY_SIZE(boxes)) nbox = ARRAY_SIZE(boxes); n -= nbox; do { b->x1 = rect->x; b->y1 = rect->y; b->x2 = b->x1 + rect->width; b->y2 = b->y1 + rect->height; b++; rect++; } while (--nbox); fill.boxes(sna, &fill, boxes, b-boxes); b = boxes; } while (n); } } else { RegionRec clip; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) goto done; if (clip.data == NULL) { do { b->x1 = rect->x + drawable->x; b->y1 = rect->y + drawable->y; b->x2 = bound(b->x1, rect->width); b->y2 = bound(b->y1, rect->height); rect++; if (box_intersect(b, &clip.extents)) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; if (++b == last_box) { fill.boxes(sna, &fill, boxes, last_box-boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box-boxes, 0, 0); b = boxes; } } } while (--n); } else { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; const BoxRec *c; do { BoxRec box; box.x1 = rect->x + drawable->x; box.y1 = rect->y + drawable->y; box.x2 = bound(box.x1, rect->width); box.y2 = bound(box.y1, rect->height); rect++; c = find_clip_box_for_y(clip_start, clip_end, box.y1); while (c != clip_end) { if (box.y2 <= c->y1) break; *b = box; if (box_intersect(b, c++)) { b->x1 += dx; b->x2 += dx; b->y1 += dy; b->y2 += dy; if (++b == last_box) { fill.boxes(sna, &fill, boxes, last_box-boxes); if (damage) sna_damage_add_boxes(damage, boxes, last_box-boxes, 0, 0); b = boxes; } } } } while (--n); } RegionUninit(&clip); if (b != boxes) { fill.boxes(sna, &fill, boxes, b-boxes); if (damage) sna_damage_add_boxes(damage, boxes, b-boxes, 0, 0); } } done: fill.done(sna, &fill); assert_pixmap_damage(pixmap); return true; } static uint32_t get_pixel(PixmapPtr pixmap) { DBG(("%s(pixmap=%ld)\n", __FUNCTION__, pixmap->drawable.serialNumber)); if (!sna_pixmap_move_to_cpu(pixmap, MOVE_READ)) return 0; switch (pixmap->drawable.bitsPerPixel) { case 32: return *(uint32_t *)pixmap->devPrivate.ptr; case 16: return *(uint16_t *)pixmap->devPrivate.ptr; default: return *(uint8_t *)pixmap->devPrivate.ptr; } } inline static int _use_fill_spans(DrawablePtr drawable, GCPtr gc, const BoxRec *extents, unsigned flags) { if (USE_SPANS) return USE_SPANS > 0; if (gc->fillStyle == FillTiled && !gc->tileIsPixel && sna_pixmap_is_gpu(gc->tile.pixmap)) { DBG(("%s: source is already on the gpu\n", __FUNCTION__)); return PREFER_GPU | FORCE_GPU; } return PREFER_GPU; } static int use_fill_spans(DrawablePtr drawable, GCPtr gc, const BoxRec *extents, unsigned flags) { int ret = _use_fill_spans(drawable, gc, extents, flags); DBG(("%s? %d\n", __FUNCTION__, ret)); return ret; } static void sna_poly_fill_polygon(DrawablePtr draw, GCPtr gc, int shape, int mode, int n, DDXPointPtr pt) { struct sna_fill_spans data; struct sna_pixmap *priv; DBG(("%s(n=%d, PlaneMask: %lx (solid %d), solid fill: %d [style=%d, tileIsPixel=%d], alu=%d)\n", __FUNCTION__, n, gc->planemask, !!PM_IS_SOLID(draw, gc->planemask), (gc->fillStyle == FillSolid || (gc->fillStyle == FillTiled && gc->tileIsPixel)), gc->fillStyle, gc->tileIsPixel, gc->alu)); DBG(("%s: draw=%ld, offset=(%d, %d), size=%dx%d\n", __FUNCTION__, draw->serialNumber, draw->x, draw->y, draw->width, draw->height)); data.flags = sna_poly_point_extents(draw, gc, mode, n, pt, &data.region.extents); if (data.flags == 0) { DBG(("%s, nothing to do\n", __FUNCTION__)); return; } DBG(("%s: extents(%d, %d), (%d, %d), flags=%x\n", __FUNCTION__, data.region.extents.x1, data.region.extents.y1, data.region.extents.x2, data.region.extents.y2, data.flags)); data.region.data = NULL; if (FORCE_FALLBACK) goto fallback; if (!ACCEL_POLY_FILL_POLYGON) goto fallback; data.pixmap = get_drawable_pixmap(draw); data.sna = to_sna_from_pixmap(data.pixmap); priv = sna_pixmap(data.pixmap); if (priv == NULL) { DBG(("%s: fallback -- unattached\n", __FUNCTION__)); goto fallback; } if (wedged(data.sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } if (!PM_IS_SOLID(draw, gc->planemask)) goto fallback; if ((data.bo = sna_drawable_use_bo(draw, use_fill_spans(draw, gc, &data.region.extents, data.flags), &data.region.extents, &data.damage))) { uint32_t color; sna_gc(gc)->priv = &data; get_drawable_deltas(draw, data.pixmap, &data.dx, &data.dy); if (gc_is_solid(gc, &color)) { struct sna_fill_op fill; if (!sna_fill_init_blt(&fill, data.sna, data.pixmap, data.bo, gc->alu, color, FILL_SPANS)) goto fallback; data.op = &fill; if ((data.flags & IS_CLIPPED) == 0) { if (data.dx | data.dy) sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_offset; else sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill; } else { if (!region_maybe_clip(&data.region, gc->pCompositeClip)) return; if (region_is_singular(&data.region)) sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_clip_extents; else sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_clip_boxes; } assert(gc->miTranslate); gc->ops = &sna_gc_ops__tmp; miFillPolygon(draw, gc, shape, mode, n, pt); fill.done(data.sna, &fill); } else { sna_gc_ops__tmp.FillSpans = sna_fill_spans__gpu; gc->ops = &sna_gc_ops__tmp; miFillPolygon(draw, gc, shape, mode, n, pt); } gc->ops = (GCOps *)&sna_gc_ops; if (data.damage) { if (data.dx | data.dy) pixman_region_translate(&data.region, data.dx, data.dy); assert_pixmap_contains_box(data.pixmap, &data.region.extents); sna_damage_add_to_pixmap(data.damage, &data.region, data.pixmap); } assert_pixmap_damage(data.pixmap); RegionUninit(&data.region); return; } fallback: DBG(("%s: fallback (%d, %d), (%d, %d)\n", __FUNCTION__, data.region.extents.x1, data.region.extents.y1, data.region.extents.x2, data.region.extents.y2)); if (!region_maybe_clip(&data.region, gc->pCompositeClip)) { DBG(("%s: nothing to do, all clipped\n", __FUNCTION__)); return; } if (!sna_gc_move_to_cpu(gc, draw, &data.region)) goto out; if (!sna_drawable_move_region_to_cpu(draw, &data.region, drawable_gc_flags(draw, gc, true))) goto out; if (sigtrap_get() == 0) { DBG(("%s: fallback -- miFillPolygon -> sna_fill_spans__cpu\n", __FUNCTION__)); miFillPolygon(draw, gc, shape, mode, n, pt); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(&data.region); } static struct kgem_bo * sna_pixmap_get_source_bo(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); unsigned flags; BoxRec box; box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; DBG(("%s(pixmap=%ld, size=%dx%d)\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height)); if (priv == NULL) { DBG(("%s: unattached, uploading data into temporary\n", __FUNCTION__)); return kgem_upload_source_image(&to_sna_from_pixmap(pixmap)->kgem, pixmap->devPrivate.ptr, &box, pixmap->devKind, pixmap->drawable.bitsPerPixel); } if (priv->gpu_damage) { if (sna_pixmap_move_to_gpu(pixmap, MOVE_READ | MOVE_ASYNC_HINT)) return kgem_bo_reference(priv->gpu_bo); } else if (priv->cpu_damage) { if (priv->cpu_bo) return kgem_bo_reference(priv->cpu_bo); } else { if (priv->gpu_bo) return kgem_bo_reference(priv->gpu_bo); if (priv->cpu_bo) return kgem_bo_reference(priv->cpu_bo); } flags = MOVE_READ | MOVE_ASYNC_HINT; if (priv->gpu_bo && priv->gpu_bo->proxy) { struct kgem_bo *bo = priv->gpu_bo; if (bo->rq == NULL && (bo->snoop || bo->pitch >= 4096)) flags |= __MOVE_FORCE; } if (priv->gpu_bo == NULL) { if (++priv->source_count > SOURCE_BIAS) flags |= __MOVE_FORCE; } if (!sna_pixmap_move_to_gpu(pixmap, flags)) { struct kgem_bo *upload; if (!sna_pixmap_move_to_cpu(pixmap, MOVE_READ)) return NULL; upload = kgem_upload_source_image(&to_sna_from_pixmap(pixmap)->kgem, pixmap->devPrivate.ptr, &box, pixmap->devKind, pixmap->drawable.bitsPerPixel); if (upload == NULL) return NULL; if (priv->gpu_bo == NULL) { DBG(("%s: adding upload cache to pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); assert(upload->proxy != NULL); kgem_proxy_bo_attach(upload, &priv->gpu_bo); } return upload; } return kgem_bo_reference(priv->gpu_bo); } /* static bool tile(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, PixmapPtr tile, const DDXPointRec * const origin, int alu, int n, xRectangle *rect, const BoxRec *extents, unsigned clipped) */ static bool sna_poly_fill_rect_tiled_8x8_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, struct kgem_bo *tile_bo, GCPtr gc, int n, const xRectangle *r, const BoxRec *extents, unsigned clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); const DDXPointRec * const origin = &gc->patOrg; uint32_t br00, br13; int tx, ty; int16_t dx, dy; uint32_t *b; if (NO_TILE_8x8) return false; DBG(("%s x %d [(%d, %d)x(%d, %d)...], clipped=%x, origin=(%d, %d)\n", __FUNCTION__, n, r->x, r->y, r->width, r->height, clipped, origin->x, origin->y)); DBG(("%s: tile_bo tiling=%d, pitch=%d\n", __FUNCTION__, tile_bo->tiling, tile_bo->pitch)); if (tile_bo->tiling) return false; if (!kgem_bo_can_blt(&sna->kgem, bo) || !kgem_bo_can_blt(&sna->kgem, tile_bo)) return false; assert(tile_bo->pitch == 8 * drawable->bitsPerPixel >> 3); kgem_set_mode(&sna->kgem, KGEM_BLT, bo); assert(kgem_bo_can_blt(&sna->kgem, bo)); if (!kgem_check_batch(&sna->kgem, 10+2*3) || !kgem_check_reloc(&sna->kgem, 2) || !kgem_check_many_bo_fenced(&sna->kgem, bo, tile_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_many_bo_fenced(&sna->kgem, bo, tile_bo, NULL)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } get_drawable_deltas(drawable, pixmap, &dx, &dy); assert(extents->x1 + dx >= 0); assert(extents->y1 + dy >= 0); assert(extents->x2 + dx <= pixmap->drawable.width); assert(extents->y2 + dy <= pixmap->drawable.height); br00 = XY_SCANLINE_BLT; tx = (-drawable->x - dx - origin->x) % 8; if (tx < 0) tx += 8; ty = (-drawable->y - dy - origin->y) % 8; if (ty < 0) ty += 8; br00 |= tx << 12 | ty << 8; br13 = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { br00 |= BLT_DST_TILED; br13 >>= 2; } br13 |= blt_depth(drawable->depth) << 24; br13 |= fill_ROP[gc->alu] << 16; if (!clipped) { dx += drawable->x; dy += drawable->y; sna_damage_add_rectangles(damage, r, n, dx, dy); if (n == 1) { DBG(("%s: rect=(%d, %d)x(%d, %d) + (%d, %d), tile=(%d, %d)\n", __FUNCTION__, r->x, r->y, r->width, r->height, dx, dy, tx, ty)); assert(r->x + dx >= 0); assert(r->y + dy >= 0); assert(r->x + dx + r->width <= pixmap->drawable.width); assert(r->y + dy + r->height <= pixmap->drawable.height); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_PAT_BLT | 3 << 20 | (br00 & 0x7f00) | 6; b[1] = br13; b[2] = (r->y + dy) << 16 | (r->x + dx); b[3] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx); *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); *(uint64_t *)(b+6) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 6, tile_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); sna->kgem.nbatch += 8; } else { b[0] = XY_PAT_BLT | 3 << 20 | (br00 & 0x7f00) | 4; b[1] = br13; b[2] = (r->y + dy) << 16 | (r->x + dx); b[3] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx); b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5, tile_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); sna->kgem.nbatch += 6; } } else do { int n_this_time, rem; assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 8; b[1] = br13; b[2] = 0; b[3] = 0; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; *(uint64_t *)(b+8) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 8, tile_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 6; b[1] = br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; b[7] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 7, tile_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); sna->kgem.nbatch += 8; } n_this_time = n; rem = kgem_batch_space(&sna->kgem); if (3*n_this_time > rem) n_this_time = rem / 3; assert(n_this_time); n -= n_this_time; assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 3*n_this_time; do { assert(r->x + dx >= 0); assert(r->y + dy >= 0); assert(r->x + dx + r->width <= pixmap->drawable.width); assert(r->y + dy + r->height <= pixmap->drawable.height); b[0] = br00; b[1] = (r->y + dy) << 16 | (r->x + dx); b[2] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx); b += 3; r++; } while (--n_this_time); if (!n) break; _kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_BLT); } while (1); } else { RegionRec clip; uint16_t unwind_batch, unwind_reloc; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) goto done; unwind_batch = sna->kgem.nbatch; unwind_reloc = sna->kgem.nreloc; assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 8; b[1] = br13; b[2] = 0; b[3] = 0; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; *(uint64_t *)(b+8) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 8, tile_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 6; b[1] = br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; b[7] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 7, tile_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); sna->kgem.nbatch += 8; } if (clip.data == NULL) { const BoxRec *c = &clip.extents; DBG(("%s: simple clip, %d boxes\n", __FUNCTION__, n)); while (n--) { BoxRec box; box.x1 = r->x + drawable->x; box.y1 = r->y + drawable->y; box.x2 = bound(box.x1, r->width); box.y2 = bound(box.y1, r->height); r++; if (box_intersect(&box, c)) { if (!kgem_check_batch(&sna->kgem, 3)) { _kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_BLT); unwind_batch = sna->kgem.nbatch; unwind_reloc = sna->kgem.nreloc; assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 8; b[1] = br13; b[2] = 0; b[3] = 0; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; *(uint64_t *)(b+8) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 8, tile_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 6; b[1] = br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; b[7] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 7, tile_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); sna->kgem.nbatch += 8; } } assert(box.x1 + dx >= 0); assert(box.y1 + dy >= 0); assert(box.x2 + dx <= pixmap->drawable.width); assert(box.y2 + dy <= pixmap->drawable.height); DBG(("%s: box=(%d, %d),(%d, %d) + (%d, %d), tile=(%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2, dx, dy, tx, ty)); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; b[0] = br00; b[1] = (box.y1 + dy) << 16 | (box.x1 + dx); b[2] = (box.y2 + dy) << 16 | (box.x2 + dx); sna->kgem.nbatch += 3; } } } else { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; const BoxRec *c; DBG(("%s: complex clip (%ld cliprects), %d boxes\n", __FUNCTION__, (long)clip.data->numRects, n)); do { BoxRec box; box.x1 = r->x + drawable->x; box.y1 = r->y + drawable->y; box.x2 = bound(box.x1, r->width); box.y2 = bound(box.y1, r->height); DBG(("%s: rect=(%d, %d), (%d, %d), box=(%d, %d), (%d, %d)\n", __FUNCTION__, r->x, r->y, r->width, r->height, box.x1, box.y1, box.x2, box.y2)); r++; c = find_clip_box_for_y(clip_start, clip_end, box.y1); while (c != clip_end) { BoxRec bb; DBG(("%s: clip=(%d, %d), (%d, %d)\n", __FUNCTION__, c->x1, c->y1, c->x2, c->y2)); if (box.y2 <= c->y1) break; bb = box; if (box_intersect(&bb, c++)) { if (!kgem_check_batch(&sna->kgem, 3)) { DBG(("%s: emitting split batch\n", __FUNCTION__)); _kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_BLT); unwind_batch = sna->kgem.nbatch; unwind_reloc = sna->kgem.nreloc; assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 8; b[1] = br13; b[2] = 0; b[3] = 0; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; *(uint64_t *)(b+8) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 8, tile_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 6; b[1] = br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; b[7] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 7, tile_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); sna->kgem.nbatch += 8; } } assert(bb.x1 + dx >= 0); assert(bb.y1 + dy >= 0); assert(bb.x2 + dx <= pixmap->drawable.width); assert(bb.y2 + dy <= pixmap->drawable.height); DBG(("%s: emit box=(%d, %d),(%d, %d) + (%d, %d), tile=(%d, %d) [relative to drawable: (%d, %d)]\n", __FUNCTION__, bb.x1, bb.y1, bb.x2, bb.y2, dx, dy, tx, ty, bb.x1 - drawable->x, bb.y1 - drawable->y)); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; b[0] = br00; b[1] = (bb.y1 + dy) << 16 | (bb.x1 + dx); b[2] = (bb.y2 + dy) << 16 | (bb.x2 + dx); sna->kgem.nbatch += 3; } } } while (--n); } if (sna->kgem.nbatch == unwind_batch + (sna->kgem.gen >= 0100 ? 10 : 8)) { sna->kgem.nbatch = unwind_batch; sna->kgem.nreloc = unwind_reloc; if (sna->kgem.nbatch == 0) kgem_bo_pair_undo(&sna->kgem, bo, tile_bo); } } done: assert_pixmap_damage(pixmap); sna->blt_state.fill_bo = 0; return true; } static bool tile8(int x) { switch(x) { case 1: case 2: case 4: case 8: return true; default: return false; } } static int next8(int x, int max) { if (x > 2 && x <= 4) x = 4; else if (x < 8) x = 8; return MIN(x, max); } static bool sna_poly_fill_rect_tiled_nxm_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int n, const xRectangle *rect, const BoxRec *extents, unsigned clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); PixmapPtr tile = gc->tile.pixmap; int w, h, tx, ty, tw, th, bpp = tile->drawable.bitsPerPixel; const DDXPointRec origin = gc->patOrg; struct kgem_bo *upload; bool ret = false; uint8_t *src; void *ptr; tx = 0, tw = tile->drawable.width; if (!tile8(tw) && tw > extents->x2 - extents->x1) { tx = (extents->x1 - gc->patOrg.x - drawable->x) % tw; if (tx < 0) tx += tw; tw = next8(extents->x2 - extents->x1, tw); gc->patOrg.x = extents->x1 - drawable->x; } ty = 0, th = tile->drawable.height; if (!tile8(th) && th > extents->y2 - extents->y1) { ty = (extents->y1 - gc->patOrg.y - drawable->y) % th; if (ty < 0) ty += th; th = next8(extents->y2 - extents->y1, th); gc->patOrg.y = extents->y1 - drawable->y; } DBG(("%s: %dx%d+%d+%d (full tile size %dx%d)\n", __FUNCTION__, tw, th, tx, ty, tile->drawable.width, tile->drawable.height)); assert(tx < tile->drawable.width && tx >= 0); assert(ty < tile->drawable.height && ty >= 0); assert(tw && tw <= 8 && tw <= tile->drawable.width); assert(is_power_of_two(tw)); assert(th && th <= 8 && th <= tile->drawable.height); assert(is_power_of_two(th)); if (!sna_pixmap_move_to_cpu(tile, MOVE_READ)) goto out_gc; assert(tile->devKind); assert(has_coherent_ptr(sna, sna_pixmap(tile), MOVE_READ)); src = tile->devPrivate.ptr; src += tile->devKind * ty; src += tx * bpp/8; if ((tw | th) == 1) { uint32_t pixel; switch (bpp) { case 32: pixel = *(uint32_t *)src; break; case 16: pixel = *(uint16_t *)src; break; default: pixel = *(uint8_t *)src; break; } return sna_poly_fill_rect_blt(drawable, bo, damage, gc, pixel, n, rect, extents, clipped); } upload = kgem_create_buffer(&sna->kgem, 8*bpp, KGEM_BUFFER_WRITE, &ptr); if (upload == NULL) goto out_gc; upload->pitch = bpp; /* for sanity checks */ if (sigtrap_get() == 0) { uint8_t *dst = ptr; if (tx + tw > tile->drawable.width || ty + th > tile->drawable.height) { int sy = ty; src = tile->devPrivate.ptr; for (h = 0; h < th; h++) { int sx = tx; for (w = 0; w < tw; w++) { memcpy(dst + w*bpp/8, src + sy * tile->devKind + sx*bpp/8, bpp/8); if (++sx == tile->drawable.width) sx = 0; } w *= bpp/8; while (w < bpp) { memcpy(dst+w, dst, w); w *= 2; } if (++sy == tile->drawable.height) sy = 0; dst += bpp; } while (h < 8) { memcpy(dst, ptr, bpp*h); dst += bpp * h; h *= 2; } } else { for (h = 0; h < th; h++) { w = tw*bpp/8; memcpy(dst, src, w); while (w < bpp) { memcpy(dst+w, dst, w); w *= 2; } assert(w == bpp); src += tile->devKind; dst += bpp; } while (h < 8) { memcpy(dst, ptr, bpp*h); dst += bpp * h; h *= 2; } assert(h == 8); } ret = sna_poly_fill_rect_tiled_8x8_blt(drawable, bo, damage, upload, gc, n, rect, extents, clipped); sigtrap_put(); } kgem_bo_destroy(&sna->kgem, upload); out_gc: gc->patOrg = origin; return ret; } inline static bool tile_is_solid(GCPtr gc, uint32_t *pixel) { PixmapPtr tile = gc->tile.pixmap; struct sna_pixmap *priv; if ((tile->drawable.width | tile->drawable.height) == 1) { DBG(("%s: single pixel tile pixmap, converting to solid fill\n", __FUNCTION__)); *pixel = get_pixel(tile); return true; } priv = sna_pixmap(tile); if (priv == NULL || !priv->clear) return false; DBG(("%s: tile is clear, converting to solid fill\n", __FUNCTION__)); *pixel = priv->clear_color; return true; } static bool sna_poly_fill_rect_tiled_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int n, xRectangle *rect, const BoxRec *extents, unsigned clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); PixmapPtr tile = gc->tile.pixmap; struct kgem_bo *tile_bo; const DDXPointRec * const origin = &gc->patOrg; struct sna_copy_op copy; CARD32 alu = gc->alu; int tile_width, tile_height; int16_t dx, dy; uint32_t pixel; DBG(("%s pixmap=%ld, x %d [(%d, %d)x(%d, %d)...], clipped? %d\n", __FUNCTION__, pixmap->drawable.serialNumber, n, rect->x, rect->y, rect->width, rect->height, clipped)); assert(tile->drawable.depth == drawable->depth); assert(bo); if (tile_is_solid(gc, &pixel)) return sna_poly_fill_rect_blt(drawable, bo, damage, gc, pixel, n, rect, extents, clipped); /* XXX [248]x[238] tiling can be reduced to a pattern fill. * Also we can do the lg2 reduction for BLT and use repeat modes for * RENDER. */ tile_width = tile->drawable.width; tile_height = tile->drawable.height; if ((tile_width | tile_height) == 8) { bool ret; DBG(("%s: have 8x8 tile, using BLT fast path\n", __FUNCTION__)); tile_bo = sna_pixmap_get_source_bo(tile); if (tile_bo == NULL) { DBG(("%s: unable to move tile go GPU, fallback\n", __FUNCTION__)); return false; } ret = sna_poly_fill_rect_tiled_8x8_blt(drawable, bo, damage, tile_bo, gc, n, rect, extents, clipped); if (ret) { kgem_bo_destroy(&sna->kgem, tile_bo); return true; } } else { int w = tile_width, h = tile_height; struct sna_pixmap *priv = sna_pixmap(tile); if (priv == NULL || priv->gpu_damage == NULL) { w = next8(extents->x2 - extents->x1, w); h = next8(extents->y2 - extents->y1, h); } DBG(("%s: not 8x8, triming size for tile: %dx%d from %dx%d (area %dx%d)\n", __FUNCTION__, w, h, tile_width, tile_height, extents->x2-extents->x1, extents->y2-extents->y1)); if ((w|h) < 0x10 && is_power_of_two(w) && is_power_of_two(h) && sna_poly_fill_rect_tiled_nxm_blt(drawable, bo, damage, gc, n, rect, extents, clipped)) return true; tile_bo = sna_pixmap_get_source_bo(tile); if (tile_bo == NULL) { DBG(("%s: unable to move tile go GPU, fallback\n", __FUNCTION__)); return false; } } if (!sna_copy_init_blt(©, sna, tile, tile_bo, pixmap, bo, alu)) { DBG(("%s: unsupported blt\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, tile_bo); return false; } get_drawable_deltas(drawable, pixmap, &dx, &dy); DBG(("%s: drawable offset into pixmap(%ld) = (%d, %d)\n", __FUNCTION__, pixmap->drawable.serialNumber, dx, dy)); if (!clipped) { dx += drawable->x; dy += drawable->y; sna_damage_add_rectangles(damage, rect, n, dx, dy); do { xRectangle r = *rect++; int16_t tile_y = (r.y - origin->y) % tile_height; if (tile_y < 0) tile_y += tile_height; assert(r.x + dx >= 0); assert(r.y + dy >= 0); assert(r.x + dx + r.width <= pixmap->drawable.width); assert(r.y + dy + r.height <= pixmap->drawable.height); r.y += dy; do { int16_t width = r.width; int16_t x = r.x + dx, tile_x; int16_t h = tile_height - tile_y; if (h > r.height) h = r.height; r.height -= h; tile_x = (r.x - origin->x) % tile_width; if (tile_x < 0) tile_x += tile_width; do { int16_t w = tile_width - tile_x; if (w > width) w = width; width -= w; copy.blt(sna, ©, tile_x, tile_y, w, h, x, r.y); x += w; tile_x = 0; } while (width); r.y += h; tile_y = 0; } while (r.height); } while (--n); } else { RegionRec clip; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) goto done; if (clip.data == NULL) { const BoxRec *box = &clip.extents; DBG(("%s: single clip box [(%d, %d), (%d, %d)]\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); while (n--) { BoxRec r; r.x1 = rect->x + drawable->x; r.y1 = rect->y + drawable->y; r.x2 = bound(r.x1, rect->width); r.y2 = bound(r.y1, rect->height); rect++; DBG(("%s: rectangle [(%d, %d), (%d, %d)]\n", __FUNCTION__, r.x1, r.y1, r.x2, r.y2)); if (box_intersect(&r, box)) { int height = r.y2 - r.y1; int dst_y = r.y1; int tile_y = (r.y1 - drawable->y - origin->y) % tile_height; if (tile_y < 0) tile_y += tile_height; assert(r.x1 + dx >= 0); assert(r.y1 + dy >= 0); assert(r.x2 + dx <= pixmap->drawable.width); assert(r.y2 + dy <= pixmap->drawable.height); while (height) { int width = r.x2 - r.x1; int dst_x = r.x1, tile_x; int h = tile_height - tile_y; if (h > height) h = height; height -= h; tile_x = (r.x1 - drawable->x - origin->x) % tile_width; if (tile_x < 0) tile_x += tile_width; while (width > 0) { int w = tile_width - tile_x; if (w > width) w = width; width -= w; copy.blt(sna, ©, tile_x, tile_y, w, h, dst_x + dx, dst_y + dy); if (damage) { BoxRec b; b.x1 = dst_x + dx; b.y1 = dst_y + dy; b.x2 = b.x1 + w; b.y2 = b.y1 + h; assert_pixmap_contains_box(pixmap, &b); sna_damage_add_box(damage, &b); } dst_x += w; tile_x = 0; } dst_y += h; tile_y = 0; } } } } else { while (n--) { RegionRec region; const BoxRec *box; int nbox; region.extents.x1 = rect->x + drawable->x; region.extents.y1 = rect->y + drawable->y; region.extents.x2 = bound(region.extents.x1, rect->width); region.extents.y2 = bound(region.extents.y1, rect->height); rect++; DBG(("%s: rectangle [(%d, %d), (%d, %d)]\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); region.data = NULL; RegionIntersect(®ion, ®ion, &clip); assert(region.extents.x1 + dx >= 0); assert(region.extents.y1 + dy >= 0); assert(region.extents.x2 + dx <= pixmap->drawable.width); assert(region.extents.y2 + dy <= pixmap->drawable.height); nbox = region_num_rects(®ion); box = region_rects(®ion); DBG(("%s: split into %d boxes after clipping\n", __FUNCTION__, nbox)); while (nbox--) { int height = box->y2 - box->y1; int dst_y = box->y1; int tile_y = (box->y1 - drawable->y - origin->y) % tile_height; if (tile_y < 0) tile_y += tile_height; while (height) { int width = box->x2 - box->x1; int dst_x = box->x1, tile_x; int h = tile_height - tile_y; if (h > height) h = height; height -= h; tile_x = (box->x1 - drawable->x - origin->x) % tile_width; if (tile_x < 0) tile_x += tile_width; while (width > 0) { int w = tile_width - tile_x; if (w > width) w = width; width -= w; copy.blt(sna, ©, tile_x, tile_y, w, h, dst_x + dx, dst_y + dy); if (damage) { BoxRec b; b.x1 = dst_x + dx; b.y1 = dst_y + dy; b.x2 = b.x1 + w; b.y2 = b.y1 + h; assert_pixmap_contains_box(pixmap, &b); sna_damage_add_box(damage, &b); } dst_x += w; tile_x = 0; } dst_y += h; tile_y = 0; } box++; } RegionUninit(®ion); } } RegionUninit(&clip); } done: copy.done(sna, ©); assert_pixmap_damage(pixmap); kgem_bo_destroy(&sna->kgem, tile_bo); return true; } static bool sna_poly_fill_rect_stippled_8x8_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int n, xRectangle *r, const BoxRec *extents, unsigned clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); uint32_t pat[2] = {0, 0}, br00, br13; int16_t dx, dy; uint32_t *b; if (NO_STIPPLE_8x8) return false; DBG(("%s: alu=%d, upload (%d, %d), (%d, %d), origin (%d, %d)\n", __FUNCTION__, gc->alu, extents->x1, extents->y1, extents->x2, extents->y2, gc->patOrg.x, gc->patOrg.y)); get_drawable_deltas(drawable, pixmap, &dx, &dy); { int px, py; px = (0 - gc->patOrg.x - drawable->x - dx) % 8; if (px < 0) px += 8; py = (0 - gc->patOrg.y - drawable->y - dy) % 8; if (py < 0) py += 8; DBG(("%s: pat offset (%d, %d)\n", __FUNCTION__ ,px, py)); br00 = XY_SCANLINE_BLT | px << 12 | py << 8 | 3 << 20; br13 = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { br00 |= BLT_DST_TILED; br13 >>= 2; } br13 |= (gc->fillStyle == FillStippled) << 28; br13 |= blt_depth(drawable->depth) << 24; br13 |= fill_ROP[gc->alu] << 16; } assert(gc->stipple->devKind); { uint8_t *dst = (uint8_t *)pat; const uint8_t *src = gc->stipple->devPrivate.ptr; int stride = gc->stipple->devKind; int j = gc->stipple->drawable.height; do { *dst++ = byte_reverse(*src); src += stride; } while (--j); } kgem_set_mode(&sna->kgem, KGEM_BLT, bo); assert(kgem_bo_can_blt(&sna->kgem, bo)); if (!kgem_check_batch(&sna->kgem, 10 + 2*3) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc(&sna->kgem, 1)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } if (!clipped) { dx += drawable->x; dy += drawable->y; sna_damage_add_rectangles(damage, r, n, dx, dy); if (n == 1) { DBG(("%s: single unclipped rect (%d, %d)x(%d, %d)\n", __FUNCTION__, r->x + dx, r->y + dy, r->width, r->height)); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_MONO_PAT | (br00 & 0x7f00) | 3<<20 | 8; b[1] = br13; b[2] = (r->y + dy) << 16 | (r->x + dx); b[3] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx); *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; b[8] = pat[0]; b[9] = pat[1]; sna->kgem.nbatch += 10; } else { b[0] = XY_MONO_PAT | (br00 & 0x7f00) | 3<<20 | 7; b[1] = br13; b[2] = (r->y + dy) << 16 | (r->x + dx); b[3] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx); b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; b[7] = pat[0]; b[8] = pat[1]; sna->kgem.nbatch += 9; } } else do { int n_this_time, rem; assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 8; b[1] = br13; b[2] = 0; b[3] = 0; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; b[8] = pat[0]; b[9] = pat[1]; sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 7; b[1] = br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; b[7] = pat[0]; b[8] = pat[1]; sna->kgem.nbatch += 9; } n_this_time = n; rem = kgem_batch_space(&sna->kgem); if (3*n_this_time > rem) n_this_time = rem / 3; assert(n_this_time); n -= n_this_time; assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 3 * n_this_time; do { DBG(("%s: rect (%d, %d)x(%d, %d)\n", __FUNCTION__, r->x + dx, r->y + dy, r->width, r->height)); assert(r->x + dx >= 0); assert(r->y + dy >= 0); assert(r->x + dx + r->width <= pixmap->drawable.width); assert(r->y + dy + r->height <= pixmap->drawable.height); b[0] = br00; b[1] = (r->y + dy) << 16 | (r->x + dx); b[2] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx); b += 3; r++; } while(--n_this_time); if (!n) break; _kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_BLT); } while (1); } else { RegionRec clip; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) return true; assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 8; b[1] = br13; b[2] = 0; b[3] = 0; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; b[8] = pat[0]; b[9] = pat[1]; sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 7; b[1] = br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; b[7] = pat[0]; b[8] = pat[1]; sna->kgem.nbatch += 9; } if (clip.data == NULL) { do { BoxRec box; box.x1 = r->x + drawable->x; box.y1 = r->y + drawable->y; box.x2 = bound(box.x1, r->width); box.y2 = bound(box.y1, r->height); r++; if (box_intersect(&box, &clip.extents)) { if (!kgem_check_batch(&sna->kgem, 3)) { _kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_BLT); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 8; b[1] = br13; b[2] = 0; b[3] = 0; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; b[8] = pat[0]; b[9] = pat[1]; sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 7; b[1] = br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; b[7] = pat[0]; b[8] = pat[1]; sna->kgem.nbatch += 9; } } assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 3; b[0] = br00; b[1] = (box.y1 + dy) << 16 | (box.x1 + dx); b[2] = (box.y2 + dy) << 16 | (box.x2 + dx); } } while (--n); } else { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; const BoxRec *c; do { BoxRec box; box.x1 = r->x + drawable->x; box.y1 = r->y + drawable->y; box.x2 = bound(box.x1, r->width); box.y2 = bound(box.y1, r->height); r++; c = find_clip_box_for_y(clip_start, clip_end, box.y1); while (c != clip_end) { BoxRec bb; if (box.y2 <= c->y1) break; bb = box; if (box_intersect(&bb, c++)) { if (!kgem_check_batch(&sna->kgem, 3)) { _kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_BLT); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 8; b[1] = br13; b[2] = 0; b[3] = 0; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; b[8] = pat[0]; b[9] = pat[1]; sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_MONO_PATTERN_SL_BLT | 3 << 20 | (br00 & BLT_DST_TILED) | 7; b[1] = br13; b[2] = 0; b[3] = 0; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; b[7] = pat[0]; b[8] = pat[1]; sna->kgem.nbatch += 9; } } assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 3; b[0] = br00; b[1] = (bb.y1 + dy) << 16 | (bb.x1 + dx); b[2] = (bb.y2 + dy) << 16 | (bb.x2 + dx); } } } while (--n); } } assert_pixmap_damage(pixmap); sna->blt_state.fill_bo = 0; return true; } static bool sna_poly_fill_rect_stippled_nxm_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int n, xRectangle *r, const BoxRec *extents, unsigned clipped) { PixmapPtr scratch, stipple; uint8_t bytes[8], *dst = bytes; const uint8_t *src, *end; int j, stride; bool ret; DBG(("%s: expanding %dx%d stipple to 8x8\n", __FUNCTION__, gc->stipple->drawable.width, gc->stipple->drawable.height)); scratch = GetScratchPixmapHeader(drawable->pScreen, 8, 8, 1, 1, 1, bytes); if (scratch == NullPixmap) return false; stipple = gc->stipple; gc->stipple = scratch; assert(stipple->devKind); stride = stipple->devKind; src = stipple->devPrivate.ptr; end = src + stride * stipple->drawable.height; for(j = 0; j < 8; j++) { switch (stipple->drawable.width) { case 1: *dst = (*src & 1) * 0xff; break; case 2: *dst = (*src & 3) * 0x55; break; case 4: *dst = (*src & 15) * 0x11; break; case 8: *dst = *src; break; default: assert(0); break; } dst++; src += stride; if (src == end) src = stipple->devPrivate.ptr; } ret = sna_poly_fill_rect_stippled_8x8_blt(drawable, bo, damage, gc, n, r, extents, clipped); gc->stipple = stipple; FreeScratchPixmapHeader(scratch); return ret; } static bool sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int n, xRectangle *r, const BoxRec *extents, unsigned clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); PixmapPtr stipple = gc->stipple; const DDXPointRec *origin = &gc->patOrg; int16_t dx, dy; uint32_t br00, br13; DBG(("%s: upload (%d, %d), (%d, %d), origin (%d, %d), clipped=%x\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2, origin->x, origin->y, clipped)); get_drawable_deltas(drawable, pixmap, &dx, &dy); kgem_set_mode(&sna->kgem, KGEM_BLT, bo); assert(kgem_bo_can_blt(&sna->kgem, bo)); br00 = 3 << 20; br13 = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { br00 |= BLT_DST_TILED; br13 >>= 2; } br13 |= (gc->fillStyle == FillStippled) << 29; br13 |= blt_depth(drawable->depth) << 24; br13 |= copy_ROP[gc->alu] << 16; if (!clipped) { dx += drawable->x; dy += drawable->y; sna_damage_add_rectangles(damage, r, n, dx, dy); do { int bx1 = (r->x - origin->x) & ~7; int bx2 = (r->x + r->width - origin->x + 7) & ~7; int bw = (bx2 - bx1)/8; int bh = r->height; int bstride = ALIGN(bw, 2); int src_stride; uint8_t *dst, *src; uint32_t *b; DBG(("%s: rect (%d, %d)x(%d, %d) stipple [%d,%d]\n", __FUNCTION__, r->x, r->y, r->width, r->height, bx1, bx2)); src_stride = bstride*bh; assert(src_stride > 0); if (src_stride <= 128) { src_stride = ALIGN(src_stride, 8) / 4; assert(src_stride <= 32); if (!kgem_check_batch(&sna->kgem, 8+src_stride) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc(&sna->kgem, 1)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_MONO_SRC_COPY_IMM | (6 + src_stride) | br00; b[0] |= ((r->x - origin->x) & 7) << 17; b[1] = br13; b[2] = (r->y + dy) << 16 | (r->x + dx); b[3] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx); *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; dst = (uint8_t *)&b[8]; sna->kgem.nbatch += 8 + src_stride; } else { b[0] = XY_MONO_SRC_COPY_IMM | (5 + src_stride) | br00; b[0] |= ((r->x - origin->x) & 7) << 17; b[1] = br13; b[2] = (r->y + dy) << 16 | (r->x + dx); b[3] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx); b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; dst = (uint8_t *)&b[7]; sna->kgem.nbatch += 7 + src_stride; } assert(stipple->devKind); src_stride = stipple->devKind; src = stipple->devPrivate.ptr; src += (r->y - origin->y) * src_stride + bx1/8; src_stride -= bstride; do { int i = bstride; do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); src += src_stride; } while (--bh); } else { struct kgem_bo *upload; void *ptr; if (!kgem_check_batch(&sna->kgem, 10) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc_and_exec(&sna->kgem, 2)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } upload = kgem_create_buffer(&sna->kgem, bstride*bh, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!upload) break; if (sigtrap_get() == 0) { dst = ptr; assert(stipple->devKind); src_stride = stipple->devKind; src = stipple->devPrivate.ptr; src += (r->y - origin->y) * src_stride + bx1/8; src_stride -= bstride; do { int i = bstride; do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); src += src_stride; } while (--bh); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_MONO_SRC_COPY | br00 | 8; b[0] |= ((r->x - origin->x) & 7) << 17; b[1] = br13; b[2] = (r->y + dy) << 16 | (r->x + dx); b[3] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx); *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); *(uint64_t *)(b+6) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 6, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[8] = gc->bgPixel; b[9] = gc->fgPixel; sna->kgem.nbatch += 10; } else { b[0] = XY_MONO_SRC_COPY | br00 | 6; b[0] |= ((r->x - origin->x) & 7) << 17; b[1] = br13; b[2] = (r->y + dy) << 16 | (r->x + dx); b[3] = (r->y + r->height + dy) << 16 | (r->x + r->width + dx); b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; sna->kgem.nbatch += 8; } sigtrap_put(); } kgem_bo_destroy(&sna->kgem, upload); } r++; } while (--n); } else { RegionRec clip; DDXPointRec pat; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) return true; pat.x = origin->x + drawable->x; pat.y = origin->y + drawable->y; if (clip.data == NULL) { do { BoxRec box; int bx1, bx2, bw, bh, bstride; int src_stride; uint8_t *dst, *src; uint32_t *b; struct kgem_bo *upload; void *ptr; box.x1 = r->x + drawable->x; box.x2 = bound(box.x1, r->width); box.y1 = r->y + drawable->y; box.y2 = bound(box.y1, r->height); r++; if (!box_intersect(&box, &clip.extents)) continue; bx1 = (box.x1 - pat.x) & ~7; bx2 = (box.x2 - pat.x + 7) & ~7; bw = (bx2 - bx1)/8; bh = box.y2 - box.y1; bstride = ALIGN(bw, 2); DBG(("%s: rect (%d, %d)x(%d, %d), box (%d,%d),(%d,%d) stipple [%d,%d], pitch=%d, stride=%d\n", __FUNCTION__, r->x, r->y, r->width, r->height, box.x1, box.y1, box.x2, box.y2, bx1, bx2, bw, bstride)); src_stride = bstride*bh; assert(src_stride > 0); if (src_stride <= 128) { src_stride = ALIGN(src_stride, 8) / 4; assert(src_stride <= 32); if (!kgem_check_batch(&sna->kgem, 8+src_stride) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc(&sna->kgem, 1)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_MONO_SRC_COPY_IMM | (6 + src_stride) | br00; b[0] |= ((box.x1 - pat.x) & 7) << 17; b[1] = br13; b[2] = (box.y1 + dy) << 16 | (box.x1 + dx); b[3] = (box.y2 + dy) << 16 | (box.x2 + dx); *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; dst = (uint8_t *)&b[8]; sna->kgem.nbatch += 8 + src_stride; } else { b[0] = XY_MONO_SRC_COPY_IMM | (5 + src_stride) | br00; b[0] |= ((box.x1 - pat.x) & 7) << 17; b[1] = br13; b[2] = (box.y1 + dy) << 16 | (box.x1 + dx); b[3] = (box.y2 + dy) << 16 | (box.x2 + dx); b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; dst = (uint8_t *)&b[7]; sna->kgem.nbatch += 7 + src_stride; } assert(stipple->devKind); src_stride = stipple->devKind; src = stipple->devPrivate.ptr; src += (box.y1 - pat.y) * src_stride + bx1/8; src_stride -= bstride; do { int i = bstride; do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); src += src_stride; } while (--bh); } else { if (!kgem_check_batch(&sna->kgem, 10) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc_and_exec(&sna->kgem, 2)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } upload = kgem_create_buffer(&sna->kgem, bstride*bh, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!upload) break; if (sigtrap_get() == 0) { dst = ptr; assert(stipple->devKind); src_stride = stipple->devKind; src = stipple->devPrivate.ptr; src += (box.y1 - pat.y) * src_stride + bx1/8; src_stride -= bstride; do { int i = bstride; do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); src += src_stride; } while (--bh); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_MONO_SRC_COPY | br00 | 8; b[0] |= ((box.x1 - pat.x) & 7) << 17; b[1] = br13; b[2] = (box.y1 + dy) << 16 | (box.x1 + dx); b[3] = (box.y2 + dy) << 16 | (box.x2 + dx); *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); *(uint64_t *)(b+5) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 6, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[8] = gc->bgPixel; b[9] = gc->fgPixel; sna->kgem.nbatch += 10; } else { b[0] = XY_MONO_SRC_COPY | br00 | 6; b[0] |= ((box.x1 - pat.x) & 7) << 17; b[1] = br13; b[2] = (box.y1 + dy) << 16 | (box.x1 + dx); b[3] = (box.y2 + dy) << 16 | (box.x2 + dx); b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; sna->kgem.nbatch += 8; } sigtrap_put(); } kgem_bo_destroy(&sna->kgem, upload); } } while (--n); } else { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; const BoxRec *c; do { BoxRec unclipped; int bx1, bx2, bw, bh, bstride; int src_stride; uint8_t *dst, *src; uint32_t *b; struct kgem_bo *upload; void *ptr; unclipped.x1 = r->x + drawable->x; unclipped.x2 = bound(unclipped.x1, r->width); unclipped.y1 = r->y + drawable->y; unclipped.y2 = bound(unclipped.y1, r->height); r++; c = find_clip_box_for_y(clip_start, clip_end, unclipped.y1); while (c != clip_end) { BoxRec box; if (unclipped.y2 <= c->y1) break; box = unclipped; if (!box_intersect(&box, c++)) continue; bx1 = (box.x1 - pat.x) & ~7; bx2 = (box.x2 - pat.x + 7) & ~7; bw = (bx2 - bx1)/8; bh = box.y2 - box.y1; bstride = ALIGN(bw, 2); DBG(("%s: rect (%d, %d)x(%d, %d), box (%d,%d),(%d,%d) stipple [%d,%d]\n", __FUNCTION__, r->x, r->y, r->width, r->height, box.x1, box.y1, box.x2, box.y2, bx1, bx2)); src_stride = bstride*bh; assert(src_stride > 0); if (src_stride <= 128) { src_stride = ALIGN(src_stride, 8) / 4; assert(src_stride <= 32); if (!kgem_check_batch(&sna->kgem, 8+src_stride) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc(&sna->kgem, 1)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_MONO_SRC_COPY_IMM | (6 + src_stride) | br00; b[0] |= ((box.x1 - pat.x) & 7) << 17; b[1] = br13; b[2] = (box.y1 + dy) << 16 | (box.x1 + dx); b[3] = (box.y2 + dy) << 16 | (box.x2 + dx); *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; dst = (uint8_t *)&b[8]; sna->kgem.nbatch += 8 + src_stride; } else { b[0] = XY_MONO_SRC_COPY_IMM | (5 + src_stride) | br00; b[0] |= ((box.x1 - pat.x) & 7) << 17; b[1] = br13; b[2] = (box.y1 + dy) << 16 | (box.x1 + dx); b[3] = (box.y2 + dy) << 16 | (box.x2 + dx); b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; dst = (uint8_t *)&b[7]; sna->kgem.nbatch += 7 + src_stride; } assert(stipple->devKind); src_stride = stipple->devKind; src = stipple->devPrivate.ptr; src += (box.y1 - pat.y) * src_stride + bx1/8; src_stride -= bstride; do { int i = bstride; do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); src += src_stride; } while (--bh); } else { if (!kgem_check_batch(&sna->kgem, 10) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc_and_exec(&sna->kgem, 2)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } upload = kgem_create_buffer(&sna->kgem, bstride*bh, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!upload) break; if (sigtrap_get() == 0) { dst = ptr; assert(stipple->devKind); src_stride = stipple->devKind; src = stipple->devPrivate.ptr; src += (box.y1 - pat.y) * src_stride + bx1/8; src_stride -= bstride; do { int i = bstride; do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); src += src_stride; } while (--bh); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_MONO_SRC_COPY | br00 | 8; b[0] |= ((box.x1 - pat.x) & 7) << 17; b[1] = br13; b[2] = (box.y1 + dy) << 16 | (box.x1 + dx); b[3] = (box.y2 + dy) << 16 | (box.x2 + dx); *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); *(uint64_t *)(b+6) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 6, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[8] = gc->bgPixel; b[9] = gc->fgPixel; sna->kgem.nbatch += 10; } else { b[0] = XY_MONO_SRC_COPY | br00 | 6; b[0] |= ((box.x1 - pat.x) & 7) << 17; b[1] = br13; b[2] = (box.y1 + dy) << 16 | (box.x1 + dx); b[3] = (box.y2 + dy) << 16 | (box.x2 + dx); b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; sna->kgem.nbatch += 8; } sigtrap_put(); } kgem_bo_destroy(&sna->kgem, upload); } } } while (--n); } } sna->blt_state.fill_bo = 0; return true; } static void sna_poly_fill_rect_stippled_n_box__imm(struct sna *sna, struct kgem_bo *bo, uint32_t br00, uint32_t br13, const GC *gc, const BoxRec *box, const DDXPointRec *origin) { int x1, x2, y1, y2; uint32_t *b; for (y1 = box->y1; y1 < box->y2; y1 = y2) { int oy = (y1 - origin->y) % gc->stipple->drawable.height; if (oy < 0) oy += gc->stipple->drawable.height; y2 = box->y2; if (y2 - y1 > gc->stipple->drawable.height - oy) y2 = y1 + gc->stipple->drawable.height - oy; for (x1 = box->x1; x1 < box->x2; x1 = x2) { int bx1, bx2, bw, bh, len, ox; uint8_t *dst, *src; x2 = box->x2; ox = (x1 - origin->x) % gc->stipple->drawable.width; if (ox < 0) ox += gc->stipple->drawable.width; bx1 = ox & ~7; bx2 = ox + (x2 - x1); if (bx2 > gc->stipple->drawable.width) { bx2 = gc->stipple->drawable.width; x2 = x1 + bx2-ox; } bw = (bx2 - bx1 + 7)/8; bw = ALIGN(bw, 2); bh = y2 - y1; DBG(("%s: box((%d, %d)x(%d, %d)) origin=(%d, %d), pat=(%d, %d), up=(%d, %d), stipple=%dx%d\n", __FUNCTION__, x1, y1, x2-x1, y2-y1, origin->x, origin->y, ox, oy, bx1, bx2, gc->stipple->drawable.width, gc->stipple->drawable.height)); len = bw*bh; len = ALIGN(len, 8) / 4; assert(len > 0); assert(len <= 32); if (!kgem_check_batch(&sna->kgem, 8+len) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc(&sna->kgem, 1)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return; /* XXX fallback? */ _kgem_set_mode(&sna->kgem, KGEM_BLT); } assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = br00 | (6 + len) | (ox & 7) << 17; b[1] = br13; b[2] = y1 << 16 | x1; b[3] = y2 << 16 | x2; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; dst = (uint8_t *)&b[8]; sna->kgem.nbatch += 8 + len; } else { b[0] = br00 | (5 + len) | (ox & 7) << 17; b[1] = br13; b[2] = y1 << 16 | x1; b[3] = y2 << 16 | x2; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; dst = (uint8_t *)&b[7]; sna->kgem.nbatch += 7 + len; } assert(gc->stipple->devKind); len = gc->stipple->devKind; src = gc->stipple->devPrivate.ptr; src += oy*len + ox/8; len -= bw; do { int i = bw; do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); src += len; } while (--bh); } } } static void sna_poly_fill_rect_stippled_n_box(struct sna *sna, struct kgem_bo *bo, struct kgem_bo **tile, uint32_t br00, uint32_t br13, const GC *gc, const BoxRec *box, const DDXPointRec *origin) { int x1, x2, y1, y2; int w = gc->stipple->drawable.width; int h = gc->stipple->drawable.height; int stride = gc->stipple->devKind; uint32_t *b; assert(stride); if ((((box->y2-box->y1) | (box->x2-box->x1)) & ~31) == 0) { br00 = XY_MONO_SRC_COPY_IMM |(br00 & (BLT_DST_TILED | 3 << 20)); sna_poly_fill_rect_stippled_n_box__imm(sna, bo, br00, br13, gc, box, origin); return; } for (y1 = box->y1; y1 < box->y2; y1 = y2) { int row, oy = (y1 - origin->y) % gc->stipple->drawable.height; if (oy < 0) oy += h; y2 = box->y2; if (y2 - y1 > h - oy) y2 = y1 + h - oy; row = oy * stride; for (x1 = box->x1; x1 < box->x2; x1 = x2) { int bx1, bx2, bw, bh, len, ox; bool use_tile; x2 = box->x2; ox = (x1 - origin->x) % w; if (ox < 0) ox += w; bx1 = ox & ~7; bx2 = ox + (x2 - x1); if (bx2 > w) { bx2 = w; x2 = x1 + bx2-ox; } use_tile = y2-y1 == h && x2-x1 == w; DBG(("%s: box((%d, %d)x(%d, %d)) origin=(%d, %d), pat=(%d, %d), up=(%d, %d), stipple=%dx%d, full tile?=%d\n", __FUNCTION__, x1, y1, x2-x1, y2-y1, origin->x, origin->y, ox, oy, bx1, bx2, w, h, use_tile)); bw = (bx2 - bx1 + 7)/8; bw = ALIGN(bw, 2); bh = y2 - y1; len = bw*bh; len = ALIGN(len, 8) / 4; assert(len > 0); if (!kgem_check_batch(&sna->kgem, 8+len) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc(&sna->kgem, 2)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return; /* XXX fallback? */ _kgem_set_mode(&sna->kgem, KGEM_BLT); } assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (!use_tile && len <= 32) { uint8_t *dst, *src; if (sna->kgem.gen >= 0100) { b[0] = XY_MONO_SRC_COPY_IMM; b[0] |= (br00 & (BLT_DST_TILED | 3 << 20)); b[0] |= (ox & 7) << 17; b[0] |= (6 + len); b[1] = br13; b[2] = y1 << 16 | x1; b[3] = y2 << 16 | x2; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; dst = (uint8_t *)&b[8]; sna->kgem.nbatch += 8 + len; } else { b[0] = XY_MONO_SRC_COPY_IMM; b[0] |= (br00 & (BLT_DST_TILED | 3 << 20)); b[0] |= (ox & 7) << 17; b[0] |= (5 + len); b[1] = br13; b[2] = y1 << 16 | x1; b[3] = y2 << 16 | x2; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = gc->bgPixel; b[6] = gc->fgPixel; dst = (uint8_t *)&b[7]; sna->kgem.nbatch += 7 + len; } assert(gc->stipple->devKind); len = gc->stipple->devKind; src = gc->stipple->devPrivate.ptr; src += oy*len + ox/8; len -= bw; do { int i = bw; do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); src += len; } while (--bh); } else { bool has_tile = use_tile && *tile; struct kgem_bo *upload; uint8_t *dst, *src; void *ptr; if (has_tile) { upload = kgem_bo_reference(*tile); } else { upload = kgem_create_buffer(&sna->kgem, bw*bh, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!upload) return; } assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = br00 | (ox & 7) << 17 | 8; b[1] = br13; b[2] = y1 << 16 | x1; b[3] = y2 << 16 | x2; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); *(uint64_t *)(b+6) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 6, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[8] = gc->bgPixel; b[9] = gc->fgPixel; sna->kgem.nbatch += 10; } else { b[0] = br00 | (ox & 7) << 17 | 6; b[1] = br13; b[2] = y1 << 16 | x1; b[3] = y2 << 16 | x2; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; sna->kgem.nbatch += 8; } if (!has_tile) { dst = ptr; len = stride; src = gc->stipple->devPrivate.ptr; src += row + (ox >> 3); len -= bw; do { int i = bw; do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); src += len; } while (--bh); if (use_tile) *tile = kgem_bo_reference(upload); } kgem_bo_destroy(&sna->kgem, upload); } } } } static bool sna_poly_fill_rect_stippled_n_blt__imm(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int n, xRectangle *r, const BoxRec *extents, unsigned clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); DDXPointRec origin = gc->patOrg; int16_t dx, dy; uint32_t br00, br13; DBG(("%s: upload (%d, %d), (%d, %d), origin (%d, %d), clipped=%d, alu=%d, opaque=%d\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2, origin.x, origin.y, clipped, gc->alu, gc->fillStyle == FillOpaqueStippled)); get_drawable_deltas(drawable, pixmap, &dx, &dy); kgem_set_mode(&sna->kgem, KGEM_BLT, bo); assert(kgem_bo_can_blt(&sna->kgem, bo)); br00 = XY_MONO_SRC_COPY_IMM | 3 << 20; br13 = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { br00 |= BLT_DST_TILED; br13 >>= 2; } br13 |= (gc->fillStyle == FillStippled) << 29; br13 |= blt_depth(drawable->depth) << 24; br13 |= copy_ROP[gc->alu] << 16; origin.x += dx + drawable->x; origin.y += dy + drawable->y; if (!clipped) { dx += drawable->x; dy += drawable->y; sna_damage_add_rectangles(damage, r, n, dx, dy); do { BoxRec box; box.x1 = r->x + dx; box.y1 = r->y + dy; box.x2 = box.x1 + r->width; box.y2 = box.y1 + r->height; sna_poly_fill_rect_stippled_n_box__imm(sna, bo, br00, br13, gc, &box, &origin); r++; } while (--n); } else { RegionRec clip; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) { DBG(("%s: all clipped\n", __FUNCTION__)); return true; } if (clip.data == NULL) { DBG(("%s: clipped to extents ((%d, %d), (%d, %d))\n", __FUNCTION__, clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2)); do { BoxRec box; box.x1 = r->x + drawable->x; box.x2 = bound(box.x1, r->width); box.y1 = r->y + drawable->y; box.y2 = bound(box.y1, r->height); r++; DBG(("%s: box (%d, %d), (%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2)); if (!box_intersect(&box, &clip.extents)) continue; box.x1 += dx; box.x2 += dx; box.y1 += dy; box.y2 += dy; sna_poly_fill_rect_stippled_n_box__imm(sna, bo, br00, br13, gc, &box, &origin); } while (--n); } else { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; const BoxRec *c; DBG(("%s: clipped to boxes: start((%d, %d), (%d, %d)); end=((%d, %d), (%d, %d))\n", __FUNCTION__, clip_start->x1, clip_start->y1, clip_start->x2, clip_start->y2, clip_end->x1, clip_end->y1, clip_end->x2, clip_end->y2)); do { BoxRec unclipped; unclipped.x1 = r->x + drawable->x; unclipped.x2 = bound(unclipped.x1, r->width); unclipped.y1 = r->y + drawable->y; unclipped.y2 = bound(unclipped.y1, r->height); r++; c = find_clip_box_for_y(clip_start, clip_end, unclipped.y1); while (c != clip_end) { BoxRec box; if (unclipped.y2 <= c->y1) break; box = unclipped; if (!box_intersect(&box, c++)) continue; box.x1 += dx; box.x2 += dx; box.y1 += dy; box.y2 += dy; sna_poly_fill_rect_stippled_n_box__imm(sna, bo, br00, br13, gc, &box, &origin); } } while (--n); } } assert_pixmap_damage(pixmap); sna->blt_state.fill_bo = 0; return true; } static bool sna_poly_fill_rect_stippled_n_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int n, xRectangle *r, const BoxRec *extents, unsigned clipped) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); DDXPointRec origin = gc->patOrg; struct kgem_bo *tile = NULL; int16_t dx, dy; uint32_t br00, br13; DBG(("%s: upload (%d, %d), (%d, %d), origin (%d, %d), clipped=%d, alu=%d, opaque=%d\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2, origin.x, origin.y, clipped, gc->alu, gc->fillStyle == FillOpaqueStippled)); if (((gc->stipple->drawable.width | gc->stipple->drawable.height) & ~31) == 0) return sna_poly_fill_rect_stippled_n_blt__imm(drawable, bo, damage, gc, n, r, extents, clipped); get_drawable_deltas(drawable, pixmap, &dx, &dy); kgem_set_mode(&sna->kgem, KGEM_BLT, bo); assert(kgem_bo_can_blt(&sna->kgem, bo)); br00 = XY_MONO_SRC_COPY | 3 << 20; br13 = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { br00 |= BLT_DST_TILED; br13 >>= 2; } br13 |= (gc->fillStyle == FillStippled) << 29; br13 |= blt_depth(drawable->depth) << 24; br13 |= copy_ROP[gc->alu] << 16; origin.x += dx + drawable->x; origin.y += dy + drawable->y; if (!clipped) { dx += drawable->x; dy += drawable->y; sna_damage_add_rectangles(damage, r, n, dx, dy); do { BoxRec box; box.x1 = r->x + dx; box.y1 = r->y + dy; box.x2 = box.x1 + r->width; box.y2 = box.y1 + r->height; sna_poly_fill_rect_stippled_n_box(sna, bo, &tile, br00, br13, gc, &box, &origin); r++; } while (--n); } else { RegionRec clip; region_set(&clip, extents); if (!region_maybe_clip(&clip, gc->pCompositeClip)) { DBG(("%s: all clipped\n", __FUNCTION__)); return true; } if (clip.data == NULL) { DBG(("%s: clipped to extents ((%d, %d), (%d, %d))\n", __FUNCTION__, clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2)); do { BoxRec box; box.x1 = r->x + drawable->x; box.x2 = bound(box.x1, r->width); box.y1 = r->y + drawable->y; box.y2 = bound(box.y1, r->height); r++; DBG(("%s: box (%d, %d), (%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2)); if (!box_intersect(&box, &clip.extents)) continue; box.x1 += dx; box.x2 += dx; box.y1 += dy; box.y2 += dy; sna_poly_fill_rect_stippled_n_box(sna, bo, &tile, br00, br13, gc, &box, &origin); } while (--n); } else { const BoxRec * const clip_start = RegionBoxptr(&clip); const BoxRec * const clip_end = clip_start + clip.data->numRects; const BoxRec *c; DBG(("%s: clipped to boxes: start((%d, %d), (%d, %d)); end=((%d, %d), (%d, %d))\n", __FUNCTION__, clip_start->x1, clip_start->y1, clip_start->x2, clip_start->y2, clip_end->x1, clip_end->y1, clip_end->x2, clip_end->y2)); do { BoxRec unclipped; unclipped.x1 = r->x + drawable->x; unclipped.x2 = bound(unclipped.x1, r->width); unclipped.y1 = r->y + drawable->y; unclipped.y2 = bound(unclipped.y1, r->height); r++; c = find_clip_box_for_y(clip_start, clip_end, unclipped.y1); while (c != clip_end) { BoxRec box; if (unclipped.y2 <= c->y1) break; box = unclipped; if (!box_intersect(&box, c++)) continue; box.x1 += dx; box.x2 += dx; box.y1 += dy; box.y2 += dy; sna_poly_fill_rect_stippled_n_box(sna, bo, &tile, br00, br13, gc, &box, &origin); } } while (--n); } } assert_pixmap_damage(pixmap); if (tile) kgem_bo_destroy(&sna->kgem, tile); sna->blt_state.fill_bo = 0; return true; } static bool sna_poly_fill_rect_stippled_blt(DrawablePtr drawable, struct kgem_bo *bo, struct sna_damage **damage, GCPtr gc, int n, xRectangle *rect, const BoxRec *extents, unsigned clipped) { PixmapPtr stipple = gc->stipple; PixmapPtr pixmap = get_drawable_pixmap(drawable); if (bo->tiling == I915_TILING_Y) { DBG(("%s: converting bo from Y-tiling\n", __FUNCTION__)); /* This is cheating, but only the gpu_bo can be tiled */ assert(bo == __sna_pixmap_get_bo(pixmap)); bo = sna_pixmap_change_tiling(pixmap, I915_TILING_X); if (bo == NULL) { DBG(("%s: fallback -- unable to change tiling\n", __FUNCTION__)); return false; } } if (!kgem_bo_can_blt(&to_sna_from_pixmap(pixmap)->kgem, bo)) return false; if (!sna_drawable_move_to_cpu(&stipple->drawable, MOVE_READ)) return false; DBG(("%s: origin (%d, %d), extents (stipple): (%d, %d), stipple size %dx%d\n", __FUNCTION__, gc->patOrg.x, gc->patOrg.y, extents->x2 - gc->patOrg.x - drawable->x, extents->y2 - gc->patOrg.y - drawable->y, stipple->drawable.width, stipple->drawable.height)); if ((stipple->drawable.width | stipple->drawable.height) == 8) return sna_poly_fill_rect_stippled_8x8_blt(drawable, bo, damage, gc, n, rect, extents, clipped); if ((stipple->drawable.width | stipple->drawable.height) <= 0xc && is_power_of_two(stipple->drawable.width) && is_power_of_two(stipple->drawable.height)) return sna_poly_fill_rect_stippled_nxm_blt(drawable, bo, damage, gc, n, rect, extents, clipped); if (extents->x1 - gc->patOrg.x - drawable->x >= 0 && extents->x2 - gc->patOrg.x - drawable->x <= stipple->drawable.width && extents->y1 - gc->patOrg.y - drawable->y >= 0 && extents->y2 - gc->patOrg.y - drawable->y <= stipple->drawable.height) { if (stipple->drawable.width <= 8 && stipple->drawable.height <= 8) return sna_poly_fill_rect_stippled_8x8_blt(drawable, bo, damage, gc, n, rect, extents, clipped); else return sna_poly_fill_rect_stippled_1_blt(drawable, bo, damage, gc, n, rect, extents, clipped); } else { return sna_poly_fill_rect_stippled_n_blt(drawable, bo, damage, gc, n, rect, extents, clipped); } } static unsigned sna_poly_fill_rect_extents(DrawablePtr drawable, GCPtr gc, int *_n, xRectangle **_r, BoxPtr out) { int n; xRectangle *r; Box32Rec box; bool clipped; if (*_n == 0) return 0; DBG(("%s: [0] = (%d, %d)x(%d, %d)\n", __FUNCTION__, (*_r)->x, (*_r)->y, (*_r)->width, (*_r)->height)); /* Remove any zero-size rectangles from the array */ while (*_n && ((*_r)->width == 0 || (*_r)->height == 0)) --*_n, ++*_r; if (*_n == 0) return 0; n = *_n; r = *_r; box.x1 = r->x; box.x2 = box.x1 + r->width; box.y1 = r->y; box.y2 = box.y1 + r->height; r++; while (--n) { if (r->width == 0 || r->height == 0) goto slow; box32_add_rect(&box, r++); } goto done; slow: { xRectangle *rr = r; do { do { --*_n, r++; } while (--n && (r->width == 0 || r->height == 0)); while (n && r->width && r->height) { box32_add_rect(&box, r); *rr++ = *r++; n--; } } while (n); } done: clipped = box32_trim_and_translate(&box, drawable, gc); if (!box32_to_box16(&box, out)) return 0; return 1 | clipped << 1; } static void sna_poly_fill_rect(DrawablePtr draw, GCPtr gc, int n, xRectangle *rect) { PixmapPtr pixmap = get_drawable_pixmap(draw); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv = sna_pixmap(pixmap); struct sna_damage **damage; struct kgem_bo *bo; RegionRec region; unsigned flags, hint; uint32_t color; DBG(("%s(n=%d, PlaneMask: %lx (solid %d), solid fill: %d [style=%d, tileIsPixel=%d], alu=%d)\n", __FUNCTION__, n, gc->planemask, !!PM_IS_SOLID(draw, gc->planemask), (gc->fillStyle == FillSolid || (gc->fillStyle == FillTiled && gc->tileIsPixel)), gc->fillStyle, gc->tileIsPixel, gc->alu)); flags = sna_poly_fill_rect_extents(draw, gc, &n, &rect, ®ion.extents); if (flags == 0) { DBG(("%s, nothing to do\n", __FUNCTION__)); return; } DBG(("%s: extents(%d, %d), (%d, %d), flags=%x\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2, flags)); if (FORCE_FALLBACK || !ACCEL_POLY_FILL_RECT) { DBG(("%s: fallback forced\n", __FUNCTION__)); goto fallback; } if (priv == NULL) { DBG(("%s: fallback -- unattached\n", __FUNCTION__)); goto fallback; } if (wedged(sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } if (!PM_IS_SOLID(draw, gc->planemask)) { DBG(("%s: fallback -- planemask=0x%lx (not-solid)\n", __FUNCTION__, gc->planemask)); goto fallback; } if (alu_overwrites(gc->alu)) flags |= OVERWRITES; /* Clear the cpu damage so that we refresh the GPU status of the * pixmap upon a redraw after a period of inactivity. */ hint = PREFER_GPU; if (n == 1 && gc->fillStyle != FillStippled && flags & OVERWRITES) { int16_t dx, dy; region.data = NULL; if (get_drawable_deltas(draw, pixmap, &dx, &dy)) { DBG(("%s: delta=(%d, %d)\n", __FUNCTION__, dx, dy)); RegionTranslate(®ion, dx, dy); } if ((flags & IS_CLIPPED) == 0) { hint |= IGNORE_DAMAGE; if (region_subsumes_drawable(®ion, &pixmap->drawable)) { discard_cpu_damage(sna, priv); hint |= REPLACES; } else { if (priv->cpu_damage && region_subsumes_damage(®ion, priv->cpu_damage)) discard_cpu_damage(sna, priv); } } if (priv->cpu_damage == NULL) { if (priv->gpu_bo && (hint & REPLACES || box_covers_pixmap(pixmap, ®ion.extents) || box_inplace(pixmap, ®ion.extents))) { DBG(("%s: promoting to full GPU\n", __FUNCTION__)); assert(priv->gpu_bo->proxy == NULL); sna_damage_all(&priv->gpu_damage, pixmap); } DBG(("%s: dropping last-cpu hint\n", __FUNCTION__)); priv->cpu = false; } if (dx | dy) RegionTranslate(®ion, -dx, -dy); } /* If the source is already on the GPU, keep the operation on the GPU */ if (gc->fillStyle == FillTiled && !gc->tileIsPixel && sna_pixmap_is_gpu(gc->tile.pixmap)) { DBG(("%s: source is already on the gpu\n", __FUNCTION__)); hint |= FORCE_GPU; } bo = sna_drawable_use_bo(draw, hint, ®ion.extents, &damage); if (bo == NULL) { DBG(("%s: not using GPU, hint=%x\n", __FUNCTION__, hint)); goto fallback; } if (hint & REPLACES && UNDO) kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); if (gc_is_solid(gc, &color)) { DBG(("%s: solid fill [%08x], testing for blt\n", __FUNCTION__, color)); if (sna_poly_fill_rect_blt(draw, bo, damage, gc, color, n, rect, ®ion.extents, flags)) return; } else if (gc->fillStyle == FillTiled) { DBG(("%s: tiled fill, testing for blt\n", __FUNCTION__)); if (sna_poly_fill_rect_tiled_blt(draw, bo, damage, gc, n, rect, ®ion.extents, flags)) return; } else { DBG(("%s: stippled fill, testing for blt\n", __FUNCTION__)); if (sna_poly_fill_rect_stippled_blt(draw, bo, damage, gc, n, rect, ®ion.extents, flags)) return; } fallback: DBG(("%s: fallback (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) { DBG(("%s: nothing to do, all clipped\n", __FUNCTION__)); return; } if (!sna_gc_move_to_cpu(gc, draw, ®ion)) goto out; if (!sna_drawable_move_region_to_cpu(draw, ®ion, drawable_gc_flags(draw, gc, n > 1))) goto out; if (sigtrap_get() == 0) { DBG(("%s: fallback - fbPolyFillRect\n", __FUNCTION__)); fbPolyFillRect(draw, gc, n, rect); FALLBACK_FLUSH(draw); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(®ion); } static void sna_poly_fill_rect__gpu(DrawablePtr draw, GCPtr gc, int n, xRectangle *r) { struct sna_fill_spans *data = sna_gc(gc)->priv; uint32_t color; DBG(("%s(n=%d, PlaneMask: %lx (solid %d), solid fill: %d [style=%d, tileIsPixel=%d], alu=%d)\n", __FUNCTION__, n, gc->planemask, !!PM_IS_SOLID(draw, gc->planemask), (gc->fillStyle == FillSolid || (gc->fillStyle == FillTiled && gc->tileIsPixel)), gc->fillStyle, gc->tileIsPixel, gc->alu)); assert(PM_IS_SOLID(draw, gc->planemask)); if (n == 0) return; /* The mi routines do not attempt to keep the spans it generates * within the clip, so we must run them through the clipper. */ if (gc_is_solid(gc, &color)) { (void)sna_poly_fill_rect_blt(draw, data->bo, NULL, gc, color, n, r, &data->region.extents, IS_CLIPPED); } else if (gc->fillStyle == FillTiled) { (void)sna_poly_fill_rect_tiled_blt(draw, data->bo, NULL, gc, n, r, &data->region.extents, IS_CLIPPED); } else { (void)sna_poly_fill_rect_stippled_blt(draw, data->bo, NULL, gc, n, r, &data->region.extents, IS_CLIPPED); } } static void sna_poly_fill_arc(DrawablePtr draw, GCPtr gc, int n, xArc *arc) { struct sna_fill_spans data; struct sna_pixmap *priv; DBG(("%s(n=%d, PlaneMask: %lx (solid %d), solid fill: %d [style=%d, tileIsPixel=%d], alu=%d)\n", __FUNCTION__, n, gc->planemask, !!PM_IS_SOLID(draw, gc->planemask), (gc->fillStyle == FillSolid || (gc->fillStyle == FillTiled && gc->tileIsPixel)), gc->fillStyle, gc->tileIsPixel, gc->alu)); data.flags = sna_poly_arc_extents(draw, gc, n, arc, &data.region.extents); if (data.flags == 0) return; DBG(("%s: extents(%d, %d), (%d, %d), flags=%x\n", __FUNCTION__, data.region.extents.x1, data.region.extents.y1, data.region.extents.x2, data.region.extents.y2, data.flags)); data.region.data = NULL; if (FORCE_FALLBACK) goto fallback; if (!ACCEL_POLY_FILL_ARC) goto fallback; data.pixmap = get_drawable_pixmap(draw); data.sna = to_sna_from_pixmap(data.pixmap); priv = sna_pixmap(data.pixmap); if (priv == NULL) { DBG(("%s: fallback -- unattached\n", __FUNCTION__)); goto fallback; } if (wedged(data.sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } if (!PM_IS_SOLID(draw, gc->planemask)) goto fallback; if ((data.bo = sna_drawable_use_bo(draw, use_fill_spans(draw, gc, &data.region.extents, data.flags), &data.region.extents, &data.damage))) { uint32_t color; get_drawable_deltas(draw, data.pixmap, &data.dx, &data.dy); sna_gc(gc)->priv = &data; if (gc_is_solid(gc, &color)) { struct sna_fill_op fill; if (!sna_fill_init_blt(&fill, data.sna, data.pixmap, data.bo, gc->alu, color, FILL_SPANS)) goto fallback; data.op = &fill; if ((data.flags & IS_CLIPPED) == 0) { if (data.dx | data.dy) sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_offset; else sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill; } else { if (!region_maybe_clip(&data.region, gc->pCompositeClip)) return; if (region_is_singular(&data.region)) sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_clip_extents; else sna_gc_ops__tmp.FillSpans = sna_fill_spans__fill_clip_boxes; } assert(gc->miTranslate); gc->ops = &sna_gc_ops__tmp; miPolyFillArc(draw, gc, n, arc); fill.done(data.sna, &fill); } else { sna_gc_ops__tmp.FillSpans = sna_fill_spans__gpu; gc->ops = &sna_gc_ops__tmp; miPolyFillArc(draw, gc, n, arc); } gc->ops = (GCOps *)&sna_gc_ops; if (data.damage) { if (data.dx | data.dy) pixman_region_translate(&data.region, data.dx, data.dy); assert_pixmap_contains_box(data.pixmap, &data.region.extents); sna_damage_add_to_pixmap(data.damage, &data.region, data.pixmap); } assert_pixmap_damage(data.pixmap); RegionUninit(&data.region); return; } fallback: DBG(("%s: fallback (%d, %d), (%d, %d)\n", __FUNCTION__, data.region.extents.x1, data.region.extents.y1, data.region.extents.x2, data.region.extents.y2)); if (!region_maybe_clip(&data.region, gc->pCompositeClip)) { DBG(("%s: nothing to do, all clipped\n", __FUNCTION__)); return; } if (!sna_gc_move_to_cpu(gc, draw, &data.region)) goto out; if (!sna_drawable_move_region_to_cpu(draw, &data.region, drawable_gc_flags(draw, gc, true))) goto out; if (sigtrap_get() == 0) { DBG(("%s: fallback -- miPolyFillArc -> sna_fill_spans__cpu\n", __FUNCTION__)); miPolyFillArc(draw, gc, n, arc); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(&data.region); } struct sna_font { CharInfoRec glyphs8[256]; CharInfoRec *glyphs16[256]; }; #define GLYPH_INVALID (void *)1 #define GLYPH_EMPTY (void *)2 static Bool sna_realize_font(ScreenPtr screen, FontPtr font) { struct sna_font *priv; DBG(("%s (key=%d)\n", __FUNCTION__, sna_font_key)); priv = calloc(1, sizeof(struct sna_font)); if (priv == NULL) return FALSE; if (!FontSetPrivate(font, sna_font_key, priv)) { free(priv); return FALSE; } return TRUE; } static Bool sna_unrealize_font(ScreenPtr screen, FontPtr font) { struct sna_font *priv = FontGetPrivate(font, sna_font_key); int i, j; DBG(("%s (key=%d)\n", __FUNCTION__, sna_font_key)); if (priv == NULL) return TRUE; for (i = 0; i < 256; i++) { if ((uintptr_t)priv->glyphs8[i].bits & ~3) free(priv->glyphs8[i].bits); } for (j = 0; j < 256; j++) { if (priv->glyphs16[j] == NULL) continue; for (i = 0; i < 256; i++) { if ((uintptr_t)priv->glyphs16[j][i].bits & ~3) free(priv->glyphs16[j][i].bits); } free(priv->glyphs16[j]); } free(priv); FontSetPrivate(font, sna_font_key, NULL); return TRUE; } static bool sna_glyph_blt(DrawablePtr drawable, GCPtr gc, int _x, int _y, unsigned int _n, CharInfoPtr *_info, RegionRec *clip, uint32_t fg, uint32_t bg, bool transparent) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct kgem_bo *bo; struct sna_damage **damage; const BoxRec *extents, *last_extents; uint32_t *b; int16_t dx, dy; uint32_t br00; uint16_t unwind_batch, unwind_reloc; unsigned hint; uint8_t rop = transparent ? copy_ROP[gc->alu] : ROP_S; DBG(("%s (%d, %d) x %d, fg=%08x, bg=%08x alu=%02x\n", __FUNCTION__, _x, _y, _n, fg, bg, rop)); if (wedged(sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); return false; } if (!transparent && clip->data == NULL) hint = PREFER_GPU | IGNORE_DAMAGE; else hint = PREFER_GPU; bo = sna_drawable_use_bo(drawable, hint, &clip->extents, &damage); if (bo == NULL) return false; if (bo->tiling == I915_TILING_Y) { DBG(("%s: converting bo from Y-tiling\n", __FUNCTION__)); assert(bo == __sna_pixmap_get_bo(pixmap)); bo = sna_pixmap_change_tiling(pixmap, I915_TILING_X); if (bo == NULL) { DBG(("%s: fallback -- unable to change tiling\n", __FUNCTION__)); return false; } } if (!kgem_bo_can_blt(&sna->kgem, bo)) return false; if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) RegionTranslate(clip, dx, dy); _x += drawable->x + dx; _y += drawable->y + dy; extents = region_rects(clip); last_extents = extents + region_num_rects(clip); if (!transparent) { /* emulate miImageGlyphBlt */ if (!sna_blt_fill_boxes(sna, GXcopy, bo, drawable->bitsPerPixel, bg, extents, last_extents - extents)) { RegionTranslate(clip, -dx, -dy); return false; } } kgem_set_mode(&sna->kgem, KGEM_BLT, bo); assert(kgem_bo_can_blt(&sna->kgem, bo)); if (!kgem_check_batch(&sna->kgem, 20) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc(&sna->kgem, 1)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) { RegionTranslate(clip, -dx, -dy); return false; } _kgem_set_mode(&sna->kgem, KGEM_BLT); } DBG(("%s: glyph clip box (%d, %d), (%d, %d)\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2)); unwind_batch = sna->kgem.nbatch; unwind_reloc = sna->kgem.nreloc; assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_BLT | 3 << 20 | 8; b[1] = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 30 | transparent << 29 | blt_depth(drawable->depth) << 24 | rop << 16; b[2] = extents->y1 << 16 | extents->x1; b[3] = extents->y2 << 16 | extents->x2; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = bg; b[7] = fg; b[8] = 0; b[9] = 0; sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_BLT | 3 << 20 | 6; b[1] = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 30 | transparent << 29 | blt_depth(drawable->depth) << 24 | rop << 16; b[2] = extents->y1 << 16 | extents->x1; b[3] = extents->y2 << 16 | extents->x2; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = bg; b[6] = fg; b[7] = 0; sna->kgem.nbatch += 8; } br00 = XY_TEXT_IMMEDIATE_BLT; if (bo->tiling && sna->kgem.gen >= 040) br00 |= BLT_DST_TILED; do { CharInfoPtr *info = _info; int x = _x, y = _y, n = _n; do { CharInfoPtr c = *info++; int w = GLYPHWIDTHPIXELS(c); int h = GLYPHHEIGHTPIXELS(c); int w8 = (w + 7) >> 3; int x1, y1, len; if (c->bits == GLYPH_EMPTY) goto skip; len = (w8 * h + 7) >> 3 << 1; x1 = x + c->metrics.leftSideBearing; y1 = y - c->metrics.ascent; DBG(("%s glyph: (%d, %d) -> (%d, %d) x (%d[%d], %d), len=%d\n" ,__FUNCTION__, x,y, x1, y1, w, w8, h, len)); if (x1 >= extents->x2 || y1 >= extents->y2) goto skip; if (x1 + w <= extents->x1 || y1 + h <= extents->y1) goto skip; assert(len > 0); if (!kgem_check_batch(&sna->kgem, 3+len)) { _kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_BLT); DBG(("%s: new batch, glyph clip box (%d, %d), (%d, %d)\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2)); unwind_batch = sna->kgem.nbatch; unwind_reloc = sna->kgem.nreloc; assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_BLT | 3 << 20 | 8; b[1] = bo->pitch; if (bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 30 | transparent << 29 | blt_depth(drawable->depth) << 24 | rop << 16; b[2] = extents->y1 << 16 | extents->x1; b[3] = extents->y2 << 16 | extents->x2; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = bg; b[7] = fg; b[8] = 0; b[9] = 0; sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_BLT | 3 << 20 | 6; b[1] = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 30 | transparent << 29 | blt_depth(drawable->depth) << 24 | rop << 16; b[2] = extents->y1 << 16 | extents->x1; b[3] = extents->y2 << 16 | extents->x2; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = bg; b[6] = fg; b[7] = 0; sna->kgem.nbatch += 8; } } assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 3 + len; b[0] = br00 | (1 + len); b[1] = (uint16_t)y1 << 16 | (uint16_t)x1; b[2] = (uint16_t)(y1+h) << 16 | (uint16_t)(x1+w); { uint64_t *src = (uint64_t *)c->bits; uint64_t *dst = (uint64_t *)(b + 3); do { *dst++ = *src++; len -= 2; } while (len); } if (damage) { BoxRec r; r.x1 = x1; r.y1 = y1; r.x2 = x1 + w; r.y2 = y1 + h; if (box_intersect(&r, extents)) sna_damage_add_box(damage, &r); } skip: x += c->metrics.characterWidth; } while (--n); if (++extents == last_extents) break; if (kgem_check_batch(&sna->kgem, 3)) { assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 3; DBG(("%s: glyph clip box (%d, %d), (%d, %d)\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2)); b[0] = XY_SETUP_CLIP; b[1] = extents->y1 << 16 | extents->x1; b[2] = extents->y2 << 16 | extents->x2; } } while (1); if (sna->kgem.nbatch == unwind_batch + (sna->kgem.gen >= 0100 ? 10 : 8)) { sna->kgem.nbatch = unwind_batch; sna->kgem.nreloc = unwind_reloc; if (sna->kgem.nbatch == 0) kgem_bo_undo(&sna->kgem, bo); } assert_pixmap_damage(pixmap); sna->blt_state.fill_bo = 0; return true; } static void sna_glyph_extents(FontPtr font, CharInfoPtr *info, unsigned long count, ExtentInfoRec *extents) { extents->drawDirection = font->info.drawDirection; extents->fontAscent = font->info.fontAscent; extents->fontDescent = font->info.fontDescent; extents->overallAscent = info[0]->metrics.ascent; extents->overallDescent = info[0]->metrics.descent; extents->overallLeft = info[0]->metrics.leftSideBearing; extents->overallRight = info[0]->metrics.rightSideBearing; extents->overallWidth = info[0]->metrics.characterWidth; while (--count) { CharInfoPtr p =*++info; int v; if (p->metrics.ascent > extents->overallAscent) extents->overallAscent = p->metrics.ascent; if (p->metrics.descent > extents->overallDescent) extents->overallDescent = p->metrics.descent; v = extents->overallWidth + p->metrics.leftSideBearing; if (v < extents->overallLeft) extents->overallLeft = v; v = extents->overallWidth + p->metrics.rightSideBearing; if (v > extents->overallRight) extents->overallRight = v; extents->overallWidth += p->metrics.characterWidth; } } static bool sna_set_glyph(CharInfoPtr in, CharInfoPtr out) { int w = GLYPHWIDTHPIXELS(in); int h = GLYPHHEIGHTPIXELS(in); int stride = GLYPHWIDTHBYTESPADDED(in); uint8_t *dst, *src; int clear = 1; out->metrics = in->metrics; /* Skip empty glyphs */ if (w == 0 || h == 0 || ((w|h) == 1 && (in->bits[0] & 1) == 0)) { out->bits = GLYPH_EMPTY; return true; } w = (w + 7) >> 3; out->bits = malloc((w*h + 7) & ~7); if (out->bits == NULL) return false; VG(memset(out->bits, 0, (w*h + 7) & ~7)); src = (uint8_t *)in->bits; dst = (uint8_t *)out->bits; stride -= w; do { int i = w; do { clear &= *src == 0; *dst++ = byte_reverse(*src++); } while (--i); src += stride; } while (--h); if (clear) { free(out->bits); out->bits = GLYPH_EMPTY; } return true; } inline static bool sna_get_glyph8(FontPtr font, struct sna_font *priv, uint8_t g, CharInfoPtr *out) { unsigned long n; CharInfoPtr p, ret; p = &priv->glyphs8[g]; if (p->bits) { *out = p; return p->bits != GLYPH_INVALID; } font->get_glyphs(font, 1, &g, Linear8Bit, &n, &ret); if (n == 0) { p->bits = GLYPH_INVALID; return false; } return sna_set_glyph(ret, *out = p); } inline static bool sna_get_glyph16(FontPtr font, struct sna_font *priv, uint16_t g, CharInfoPtr *out) { unsigned long n; CharInfoPtr page, p, ret; page = priv->glyphs16[g>>8]; if (page == NULL) page = priv->glyphs16[g>>8] = calloc(256, sizeof(CharInfoRec)); p = &page[g&0xff]; if (p->bits) { *out = p; return p->bits != GLYPH_INVALID; } font->get_glyphs(font, 1, (unsigned char *)&g, FONTLASTROW(font) ? TwoD16Bit : Linear16Bit, &n, &ret); if (n == 0) { p->bits = GLYPH_INVALID; return false; } return sna_set_glyph(ret, *out = p); } static inline bool sna_font_too_large(FontPtr font) { int top = max(FONTMAXBOUNDS(font, ascent), FONTASCENT(font)); int bot = max(FONTMAXBOUNDS(font, descent), FONTDESCENT(font)); int width = max(FONTMAXBOUNDS(font, characterWidth), -FONTMINBOUNDS(font, characterWidth)); DBG(("%s? (%d + %d) x %d: %d > 124\n", __FUNCTION__, top, bot, width, (top + bot) * (width + 7)/8)); return (top + bot) * (width + 7)/8 > 124; } static int sna_poly_text8(DrawablePtr drawable, GCPtr gc, int x, int y, int count, char *chars) { struct sna_font *priv = gc->font->devPrivates[sna_font_key]; CharInfoPtr info[255]; ExtentInfoRec extents; RegionRec region; long unsigned i, n; uint32_t fg; for (i = n = 0; i < count; i++) { if (sna_get_glyph8(gc->font, priv, chars[i], &info[n])) n++; } if (n == 0) return x; sna_glyph_extents(gc->font, info, n, &extents); region.extents.x1 = x + extents.overallLeft; region.extents.y1 = y - extents.overallAscent; region.extents.x2 = x + extents.overallRight; region.extents.y2 = y + extents.overallDescent; translate_box(®ion.extents, drawable); clip_box(®ion.extents, gc); if (box_empty(®ion.extents)) return x + extents.overallRight; region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) return x + extents.overallRight; if (FORCE_FALLBACK) goto fallback; if (!ACCEL_POLY_TEXT8) goto fallback; if (sna_font_too_large(gc->font)) goto fallback; if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; if (!gc_is_solid(gc, &fg)) goto fallback; if (!sna_glyph_blt(drawable, gc, x, y, n, info, ®ion, fg, -1, true)) { fallback: DBG(("%s: fallback\n", __FUNCTION__)); gc->font->get_glyphs(gc->font, count, (unsigned char *)chars, Linear8Bit, &n, info); if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, MOVE_READ | MOVE_WRITE)) goto out; if (sigtrap_get() == 0) { DBG(("%s: fallback -- fbPolyGlyphBlt\n", __FUNCTION__)); fbPolyGlyphBlt(drawable, gc, x, y, n, info, FONTGLYPHS(gc->font)); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); } RegionUninit(®ion); return x + extents.overallRight; } static int sna_poly_text16(DrawablePtr drawable, GCPtr gc, int x, int y, int count, unsigned short *chars) { struct sna_font *priv = gc->font->devPrivates[sna_font_key]; CharInfoPtr info[255]; ExtentInfoRec extents; RegionRec region; long unsigned i, n; uint32_t fg; for (i = n = 0; i < count; i++) { if (sna_get_glyph16(gc->font, priv, chars[i], &info[n])) n++; } if (n == 0) return x; sna_glyph_extents(gc->font, info, n, &extents); region.extents.x1 = x + extents.overallLeft; region.extents.y1 = y - extents.overallAscent; region.extents.x2 = x + extents.overallRight; region.extents.y2 = y + extents.overallDescent; translate_box(®ion.extents, drawable); clip_box(®ion.extents, gc); if (box_empty(®ion.extents)) return x + extents.overallRight; region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) return x + extents.overallRight; if (FORCE_FALLBACK) goto fallback; if (!ACCEL_POLY_TEXT16) goto fallback; if (sna_font_too_large(gc->font)) goto fallback; if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; if (!gc_is_solid(gc, &fg)) goto fallback; if (!sna_glyph_blt(drawable, gc, x, y, n, info, ®ion, fg, -1, true)) { fallback: DBG(("%s: fallback\n", __FUNCTION__)); gc->font->get_glyphs(gc->font, count, (unsigned char *)chars, FONTLASTROW(gc->font) ? TwoD16Bit : Linear16Bit, &n, info); if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, MOVE_READ | MOVE_WRITE)) goto out; if (sigtrap_get() == 0) { DBG(("%s: fallback -- fbPolyGlyphBlt\n", __FUNCTION__)); fbPolyGlyphBlt(drawable, gc, x, y, n, info, FONTGLYPHS(gc->font)); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); } RegionUninit(®ion); return x + extents.overallRight; } static void sna_image_text8(DrawablePtr drawable, GCPtr gc, int x, int y, int count, char *chars) { struct sna_font *priv = gc->font->devPrivates[sna_font_key]; CharInfoPtr info[255]; ExtentInfoRec extents; RegionRec region; long unsigned i, n; for (i = n = 0; i < count; i++) { if (sna_get_glyph8(gc->font, priv, chars[i], &info[n])) n++; } if (n == 0) return; sna_glyph_extents(gc->font, info, n, &extents); region.extents.x1 = x + MIN(0, extents.overallLeft); region.extents.y1 = y - extents.fontAscent; region.extents.x2 = x + MAX(extents.overallWidth, extents.overallRight); region.extents.y2 = y + extents.fontDescent; DBG(("%s: count=%ld/%d, extents=(left=%d, right=%d, width=%d, ascent=%d, descent=%d), box=(%d, %d), (%d, %d)\n", __FUNCTION__, n, count, extents.overallLeft, extents.overallRight, extents.overallWidth, extents.fontAscent, extents.fontDescent, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); translate_box(®ion.extents, drawable); clip_box(®ion.extents, gc); if (box_empty(®ion.extents)) return; region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) return; DBG(("%s: clipped extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (FORCE_FALLBACK) goto fallback; if (!ACCEL_IMAGE_TEXT8) goto fallback; if (sna_font_too_large(gc->font)) goto fallback; if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; if (!sna_glyph_blt(drawable, gc, x, y, n, info, ®ion, gc->fgPixel, gc->bgPixel, false)) { fallback: DBG(("%s: fallback\n", __FUNCTION__)); gc->font->get_glyphs(gc->font, count, (unsigned char *)chars, Linear8Bit, &n, info); if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, MOVE_WRITE)) goto out; if (sigtrap_get() == 0) { DBG(("%s: fallback -- fbImageGlyphBlt\n", __FUNCTION__)); fbImageGlyphBlt(drawable, gc, x, y, n, info, FONTGLYPHS(gc->font)); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); } RegionUninit(®ion); } static void sna_image_text16(DrawablePtr drawable, GCPtr gc, int x, int y, int count, unsigned short *chars) { struct sna_font *priv = gc->font->devPrivates[sna_font_key]; CharInfoPtr info[255]; ExtentInfoRec extents; RegionRec region; long unsigned i, n; for (i = n = 0; i < count; i++) { if (sna_get_glyph16(gc->font, priv, chars[i], &info[n])) n++; } if (n == 0) return; sna_glyph_extents(gc->font, info, n, &extents); region.extents.x1 = x + MIN(0, extents.overallLeft); region.extents.y1 = y - extents.fontAscent; region.extents.x2 = x + MAX(extents.overallWidth, extents.overallRight); region.extents.y2 = y + extents.fontDescent; DBG(("%s: count=%ld/%d, extents=(left=%d, right=%d, width=%d, ascent=%d, descent=%d), box=(%d, %d), (%d, %d)\n", __FUNCTION__, n, count, extents.overallLeft, extents.overallRight, extents.overallWidth, extents.fontAscent, extents.fontDescent, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); translate_box(®ion.extents, drawable); clip_box(®ion.extents, gc); if (box_empty(®ion.extents)) return; region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) return; DBG(("%s: clipped extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (FORCE_FALLBACK) goto fallback; if (!ACCEL_IMAGE_TEXT16) goto fallback; if (sna_font_too_large(gc->font)) goto fallback; if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; if (!sna_glyph_blt(drawable, gc, x, y, n, info, ®ion, gc->fgPixel, gc->bgPixel, false)) { fallback: DBG(("%s: fallback\n", __FUNCTION__)); gc->font->get_glyphs(gc->font, count, (unsigned char *)chars, FONTLASTROW(gc->font) ? TwoD16Bit : Linear16Bit, &n, info); if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, MOVE_WRITE)) goto out; if (sigtrap_get() == 0) { DBG(("%s: fallback -- fbImageGlyphBlt\n", __FUNCTION__)); fbImageGlyphBlt(drawable, gc, x, y, n, info, FONTGLYPHS(gc->font)); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); } RegionUninit(®ion); } /* XXX Damage bypasses the Text interface and so we lose our custom gluphs */ static bool sna_reversed_glyph_blt(DrawablePtr drawable, GCPtr gc, int _x, int _y, unsigned int _n, CharInfoPtr *_info, pointer _base, struct kgem_bo *bo, struct sna_damage **damage, RegionPtr clip, uint32_t fg, uint32_t bg, bool transparent) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); const BoxRec *extents, *last_extents; uint32_t *b; int16_t dx, dy; uint8_t rop = transparent ? copy_ROP[gc->alu] : ROP_S; uint16_t unwind_batch, unwind_reloc; DBG(("%s: pixmap=%ld, bo=%d, damage=%p, fg=%08x, bg=%08x\n", __FUNCTION__, pixmap->drawable.serialNumber, bo->handle, damage, fg, bg)); if (bo->tiling == I915_TILING_Y) { DBG(("%s: converting bo from Y-tiling\n", __FUNCTION__)); assert(bo == __sna_pixmap_get_bo(pixmap)); bo = sna_pixmap_change_tiling(pixmap, I915_TILING_X); if (bo == NULL) { DBG(("%s: fallback -- unable to change tiling\n", __FUNCTION__)); return false; } } if (!kgem_bo_can_blt(&sna->kgem, bo)) return false; if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) RegionTranslate(clip, dx, dy); _x += drawable->x + dx; _y += drawable->y + dy; extents = region_rects(clip); last_extents = extents + region_num_rects(clip); if (!transparent) { /* emulate miImageGlyphBlt */ if (!sna_blt_fill_boxes(sna, GXcopy, bo, drawable->bitsPerPixel, bg, extents, last_extents - extents)) { RegionTranslate(clip, -dx, -dy); return false; } } kgem_set_mode(&sna->kgem, KGEM_BLT, bo); assert(kgem_bo_can_blt(&sna->kgem, bo)); if (!kgem_check_batch(&sna->kgem, 20) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc(&sna->kgem, 1)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) { RegionTranslate(clip, -dx, -dy); return false; } _kgem_set_mode(&sna->kgem, KGEM_BLT); } unwind_batch = sna->kgem.nbatch; unwind_reloc = sna->kgem.nreloc; DBG(("%s: glyph clip box (%d, %d), (%d, %d)\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2)); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_BLT | 1 << 20 | 8; b[1] = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 30 | transparent << 29 | blt_depth(drawable->depth) << 24 | rop << 16; b[2] = extents->y1 << 16 | extents->x1; b[3] = extents->y2 << 16 | extents->x2; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = bg; b[7] = fg; b[8] = 0; b[9] = 0; sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_BLT | 1 << 20 | 6; b[1] = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 30 | transparent << 29 | blt_depth(drawable->depth) << 24 | rop << 16; b[2] = extents->y1 << 16 | extents->x1; b[3] = extents->y2 << 16 | extents->x2; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = bg; b[6] = fg; b[7] = 0; sna->kgem.nbatch += 8; } do { CharInfoPtr *info = _info; int x = _x, y = _y, n = _n; do { CharInfoPtr c = *info++; uint8_t *glyph = FONTGLYPHBITS(base, c); int w = GLYPHWIDTHPIXELS(c); int h = GLYPHHEIGHTPIXELS(c); int stride = GLYPHWIDTHBYTESPADDED(c); int w8 = (w + 7) >> 3; int x1, y1, len, i; uint8_t *byte; if (w == 0 || h == 0) goto skip; len = (w8 * h + 7) >> 3 << 1; x1 = x + c->metrics.leftSideBearing; y1 = y - c->metrics.ascent; DBG(("%s glyph: (%d, %d) -> (%d, %d) x (%d[%d], %d), len=%d\n" ,__FUNCTION__, x,y, x1, y1, w, w8, h, len)); if (x1 >= extents->x2 || y1 >= extents->y2 || x1 + w <= extents->x1 || y1 + h <= extents->y1) { DBG(("%s: glyph is clipped (%d, %d)x(%d,%d) against extents (%d, %d), (%d, %d)\n", __FUNCTION__, x1, y1, w, h, extents->x1, extents->y1, extents->x2, extents->y2)); goto skip; } { int clear = 1, j = h; uint8_t *g = glyph; do { i = w8; do { clear = *g++ == 0; } while (clear && --i); g += stride - w8; } while (clear && --j); if (clear) { DBG(("%s: skipping clear glyph for ImageGlyph\n", __FUNCTION__)); goto skip; } } assert(len > 0); if (!kgem_check_batch(&sna->kgem, 3+len)) { _kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_BLT); unwind_batch = sna->kgem.nbatch; unwind_reloc = sna->kgem.nreloc; DBG(("%s: new batch, glyph clip box (%d, %d), (%d, %d)\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2)); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_SETUP_BLT | 1 << 20 | 8; b[1] = bo->pitch; if (bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 30 | transparent << 29 | blt_depth(drawable->depth) << 24 | rop << 16; b[2] = extents->y1 << 16 | extents->x1; b[3] = extents->y2 << 16 | extents->x2; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = bg; b[7] = fg; b[8] = 0; b[9] = 0; sna->kgem.nbatch += 10; } else { b[0] = XY_SETUP_BLT | 1 << 20 | 6; b[1] = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 30 | transparent << 29 | blt_depth(drawable->depth) << 24 | rop << 16; b[2] = extents->y1 << 16 | extents->x1; b[3] = extents->y2 << 16 | extents->x2; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = bg; b[6] = fg; b[7] = 0; sna->kgem.nbatch += 8; } } assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 3 + len; b[0] = XY_TEXT_IMMEDIATE_BLT | (1 + len); if (bo->tiling && sna->kgem.gen >= 040) b[0] |= BLT_DST_TILED; b[1] = (uint16_t)y1 << 16 | (uint16_t)x1; b[2] = (uint16_t)(y1+h) << 16 | (uint16_t)(x1+w); byte = (uint8_t *)&b[3]; stride -= w8; do { i = w8; do { *byte++ = byte_reverse(*glyph++); } while (--i); glyph += stride; } while (--h); while ((byte - (uint8_t *)&b[3]) & 7) *byte++ = 0; assert((uint32_t *)byte == sna->kgem.batch + sna->kgem.nbatch); if (damage) { BoxRec r; r.x1 = x1; r.y1 = y1; r.x2 = x1 + w; r.y2 = y1 + h; if (box_intersect(&r, extents)) sna_damage_add_box(damage, &r); } skip: x += c->metrics.characterWidth; } while (--n); if (++extents == last_extents) break; if (kgem_check_batch(&sna->kgem, 3 + 5)) { assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 3; DBG(("%s: glyph clip box (%d, %d), (%d, %d)\n", __FUNCTION__, extents->x1, extents->y1, extents->x2, extents->y2)); b[0] = XY_SETUP_CLIP; b[1] = extents->y1 << 16 | extents->x1; b[2] = extents->y2 << 16 | extents->x2; } } while (1); if (sna->kgem.nbatch == unwind_batch + (sna->kgem.gen >= 0100 ? 10 : 8)) { sna->kgem.nbatch = unwind_batch; sna->kgem.nreloc = unwind_reloc; if (sna->kgem.nbatch == 0) kgem_bo_undo(&sna->kgem, bo); } assert_pixmap_damage(pixmap); sna->blt_state.fill_bo = 0; return true; } static void sna_image_glyph(DrawablePtr drawable, GCPtr gc, int x, int y, unsigned int n, CharInfoPtr *info, pointer base) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); ExtentInfoRec extents; RegionRec region; struct sna_damage **damage; struct kgem_bo *bo; unsigned hint; if (n == 0) return; sna_glyph_extents(gc->font, info, n, &extents); region.extents.x1 = x + MIN(0, extents.overallLeft); region.extents.y1 = y - extents.fontAscent; region.extents.x2 = x + MAX(extents.overallWidth, extents.overallRight); region.extents.y2 = y + extents.fontDescent; DBG(("%s: count=%d, extents=(left=%d, right=%d, width=%d, ascent=%d, descent=%d), box=(%d, %d), (%d, %d)\n", __FUNCTION__, n, extents.overallLeft, extents.overallRight, extents.overallWidth, extents.fontAscent, extents.fontDescent, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); translate_box(®ion.extents, drawable); clip_box(®ion.extents, gc); if (box_empty(®ion.extents)) return; DBG(("%s: extents(%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) return; if (FORCE_FALLBACK) goto fallback; if (!ACCEL_IMAGE_GLYPH) goto fallback; if (wedged(sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; if (sna_font_too_large(gc->font)) goto fallback; if (region.data == NULL) hint = IGNORE_DAMAGE | PREFER_GPU; else hint = PREFER_GPU; if ((bo = sna_drawable_use_bo(drawable, hint, ®ion.extents, &damage)) && sna_reversed_glyph_blt(drawable, gc, x, y, n, info, base, bo, damage, ®ion, gc->fgPixel, gc->bgPixel, false)) goto out; fallback: DBG(("%s: fallback\n", __FUNCTION__)); if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out_gc; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, MOVE_WRITE)) goto out_gc; if (sigtrap_get() == 0) { DBG(("%s: fallback -- fbImageGlyphBlt\n", __FUNCTION__)); fbImageGlyphBlt(drawable, gc, x, y, n, info, base); FALLBACK_FLUSH(drawable); sigtrap_put(); } out_gc: sna_gc_move_to_gpu(gc); out: RegionUninit(®ion); } static void sna_poly_glyph(DrawablePtr drawable, GCPtr gc, int x, int y, unsigned int n, CharInfoPtr *info, pointer base) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); ExtentInfoRec extents; RegionRec region; struct sna_damage **damage; struct kgem_bo *bo; uint32_t fg; if (n == 0) return; sna_glyph_extents(gc->font, info, n, &extents); region.extents.x1 = x + extents.overallLeft; region.extents.y1 = y - extents.overallAscent; region.extents.x2 = x + extents.overallRight; region.extents.y2 = y + extents.overallDescent; translate_box(®ion.extents, drawable); clip_box(®ion.extents, gc); if (box_empty(®ion.extents)) return; DBG(("%s: extents(%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) return; if (FORCE_FALLBACK) goto fallback; if (!ACCEL_POLY_GLYPH) goto fallback; if (wedged(sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto fallback; } if (!PM_IS_SOLID(drawable, gc->planemask)) goto fallback; if (!gc_is_solid(gc, &fg)) goto fallback; if (sna_font_too_large(gc->font)) goto fallback; if ((bo = sna_drawable_use_bo(drawable, PREFER_GPU, ®ion.extents, &damage)) && sna_reversed_glyph_blt(drawable, gc, x, y, n, info, base, bo, damage, ®ion, fg, -1, true)) goto out; fallback: DBG(("%s: fallback\n", __FUNCTION__)); if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out_gc; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, MOVE_READ | MOVE_WRITE)) goto out_gc; if (sigtrap_get() == 0) { DBG(("%s: fallback -- fbPolyGlyphBlt\n", __FUNCTION__)); fbPolyGlyphBlt(drawable, gc, x, y, n, info, base); FALLBACK_FLUSH(drawable); sigtrap_put(); } out_gc: sna_gc_move_to_gpu(gc); out: RegionUninit(®ion); } static bool sna_push_pixels_solid_blt(GCPtr gc, PixmapPtr bitmap, DrawablePtr drawable, RegionPtr region) { PixmapPtr pixmap = get_drawable_pixmap(drawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_damage **damage; struct kgem_bo *bo; const BoxRec *box; int16_t dx, dy; int n; uint8_t rop = copy_ROP[gc->alu]; bo = sna_drawable_use_bo(drawable, PREFER_GPU, ®ion->extents, &damage); if (bo == NULL) return false; if (bo->tiling == I915_TILING_Y) { DBG(("%s: converting bo from Y-tiling\n", __FUNCTION__)); assert(bo == __sna_pixmap_get_bo(pixmap)); bo = sna_pixmap_change_tiling(pixmap, I915_TILING_X); if (bo == NULL) { DBG(("%s: fallback -- unable to change tiling\n", __FUNCTION__)); return false; } } if (!kgem_bo_can_blt(&sna->kgem, bo)) return false; if (get_drawable_deltas(drawable, pixmap, &dx, &dy)) RegionTranslate(region, dx, dy); assert_pixmap_contains_box(pixmap, RegionExtents(region)); if (damage) sna_damage_add_to_pixmap(damage, region, pixmap); assert_pixmap_damage(pixmap); DBG(("%s: upload(%d, %d, %d, %d)\n", __FUNCTION__, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); kgem_set_mode(&sna->kgem, KGEM_BLT, bo); assert(kgem_bo_can_blt(&sna->kgem, bo)); /* Region is pre-clipped and translated into pixmap space */ box = region_rects(region); n = region_num_rects(region); do { int bx1 = (box->x1 - region->extents.x1) & ~7; int bx2 = (box->x2 - region->extents.x1 + 7) & ~7; int bw = (bx2 - bx1)/8; int bh = box->y2 - box->y1; int bstride = ALIGN(bw, 2); struct kgem_bo *upload; void *ptr; if (!kgem_check_batch(&sna->kgem, 10) || !kgem_check_bo_fenced(&sna->kgem, bo) || !kgem_check_reloc_and_exec(&sna->kgem, 2)) { kgem_submit(&sna->kgem); if (!kgem_check_bo_fenced(&sna->kgem, bo)) return false; _kgem_set_mode(&sna->kgem, KGEM_BLT); } upload = kgem_create_buffer(&sna->kgem, bstride*bh, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!upload) break; if (sigtrap_get() == 0) { uint8_t *dst = ptr; int src_stride = bitmap->devKind; uint8_t *src; uint32_t *b; assert(src_stride); src = (uint8_t*)bitmap->devPrivate.ptr; src += (box->y1 - region->extents.y1) * src_stride + bx1/8; src_stride -= bstride; do { int i = bstride; do { *dst++ = byte_reverse(*src++); *dst++ = byte_reverse(*src++); i -= 2; } while (i); src += src_stride; } while (--bh); assert(sna->kgem.mode == KGEM_BLT); b = sna->kgem.batch + sna->kgem.nbatch; if (sna->kgem.gen >= 0100) { b[0] = XY_MONO_SRC_COPY | 3 << 20 | 8; b[0] |= ((box->x1 - region->extents.x1) & 7) << 17; b[1] = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 29; b[1] |= blt_depth(drawable->depth) << 24; b[1] |= rop << 16; b[2] = box->y1 << 16 | box->x1; b[3] = box->y2 << 16 | box->x2; *(uint64_t *)(b+4) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); *(uint64_t *)(b+6) = kgem_add_reloc64(&sna->kgem, sna->kgem.nbatch + 6, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[8] = gc->bgPixel; b[9] = gc->fgPixel; sna->kgem.nbatch += 10; } else { b[0] = XY_MONO_SRC_COPY | 3 << 20 | 6; b[0] |= ((box->x1 - region->extents.x1) & 7) << 17; b[1] = bo->pitch; if (sna->kgem.gen >= 040 && bo->tiling) { b[0] |= BLT_DST_TILED; b[1] >>= 2; } b[1] |= 1 << 29; b[1] |= blt_depth(drawable->depth) << 24; b[1] |= rop << 16; b[2] = box->y1 << 16 | box->x1; b[3] = box->y2 << 16 | box->x2; b[4] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 4, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = kgem_add_reloc(&sna->kgem, sna->kgem.nbatch + 5, upload, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); b[6] = gc->bgPixel; b[7] = gc->fgPixel; sna->kgem.nbatch += 8; } sigtrap_put(); } kgem_bo_destroy(&sna->kgem, upload); box++; } while (--n); sna->blt_state.fill_bo = 0; return true; } static void sna_push_pixels(GCPtr gc, PixmapPtr bitmap, DrawablePtr drawable, int w, int h, int x, int y) { RegionRec region; if (w == 0 || h == 0) return; DBG(("%s (%d, %d)x(%d, %d)\n", __FUNCTION__, x, y, w, h)); region.extents.x1 = x; region.extents.y1 = y; region.extents.x2 = region.extents.x1 + w; region.extents.y2 = region.extents.y1 + h; clip_box(®ion.extents, gc); if (box_empty(®ion.extents)) return; DBG(("%s: extents(%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); region.data = NULL; if (!region_maybe_clip(®ion, gc->pCompositeClip)) return; switch (gc->fillStyle) { case FillSolid: if (sna_push_pixels_solid_blt(gc, bitmap, drawable, ®ion)) return; break; default: break; } DBG(("%s: fallback\n", __FUNCTION__)); if (!sna_gc_move_to_cpu(gc, drawable, ®ion)) goto out; if (!sna_pixmap_move_to_cpu(bitmap, MOVE_READ)) goto out; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, drawable_gc_flags(drawable, gc, false))) goto out; if (sigtrap_get() == 0) { DBG(("%s: fallback, fbPushPixels(%d, %d, %d %d)\n", __FUNCTION__, w, h, x, y)); fbPushPixels(gc, bitmap, drawable, w, h, x, y); FALLBACK_FLUSH(drawable); sigtrap_put(); } out: sna_gc_move_to_gpu(gc); RegionUninit(®ion); } static const GCOps sna_gc_ops = { sna_fill_spans, sna_set_spans, sna_put_image, sna_copy_area, sna_copy_plane, sna_poly_point, sna_poly_line, sna_poly_segment, sna_poly_rectangle, sna_poly_arc, sna_poly_fill_polygon, sna_poly_fill_rect, sna_poly_fill_arc, sna_poly_text8, sna_poly_text16, sna_image_text8, sna_image_text16, sna_image_glyph, sna_poly_glyph, sna_push_pixels, }; static const GCOps sna_gc_ops__cpu = { fbFillSpans, fbSetSpans, fbPutImage, fbCopyArea, fbCopyPlane, sna_poly_point__cpu, fbPolyLine, fbPolySegment, miPolyRectangle, fbPolyArc, miFillPolygon, fbPolyFillRect, miPolyFillArc, miPolyText8, miPolyText16, miImageText8, miImageText16, fbImageGlyphBlt, fbPolyGlyphBlt, fbPushPixels }; static GCOps sna_gc_ops__tmp = { sna_fill_spans, sna_set_spans, sna_put_image, sna_copy_area, sna_copy_plane, sna_poly_point, sna_poly_line, sna_poly_segment, sna_poly_rectangle, sna_poly_arc, sna_poly_fill_polygon, sna_poly_fill_rect, sna_poly_fill_arc, sna_poly_text8, sna_poly_text16, sna_image_text8, sna_image_text16, sna_image_glyph, sna_poly_glyph, sna_push_pixels, }; static void sna_validate_gc(GCPtr gc, unsigned long changes, DrawablePtr drawable) { DBG(("%s(%p) changes=%lx, previous serial=%lx, drawable=%lx\n", __FUNCTION__, gc, changes, gc->serialNumber, drawable->serialNumber)); if (changes & (GCClipMask|GCSubwindowMode) || drawable->serialNumber != (gc->serialNumber & DRAWABLE_SERIAL_BITS) || (has_clip(gc) && (changes & (GCClipXOrigin | GCClipYOrigin)))) { DBG(("%s: recomputing clip\n", __FUNCTION__)); miComputeCompositeClip(gc, drawable); DBG(("%s: composite clip=%dx[(%d, %d), (%d, %d)] [%p]\n", __FUNCTION__, region_num_rects(gc->pCompositeClip), gc->pCompositeClip->extents.x1, gc->pCompositeClip->extents.y1, gc->pCompositeClip->extents.x2, gc->pCompositeClip->extents.y2, gc->pCompositeClip)); } assert(gc->pCompositeClip); assert(RegionNil(gc->pCompositeClip) || gc->pCompositeClip->extents.x1 >= drawable->x); assert(RegionNil(gc->pCompositeClip) || gc->pCompositeClip->extents.y1 >= drawable->y); assert(RegionNil(gc->pCompositeClip) || gc->pCompositeClip->extents.x2 - drawable->x <= drawable->width); assert(RegionNil(gc->pCompositeClip) || gc->pCompositeClip->extents.y2 - drawable->y <= drawable->height); sna_gc(gc)->changes |= changes; sna_gc(gc)->serial = gc->serialNumber; } static const GCFuncs sna_gc_funcs = { sna_validate_gc, miChangeGC, miCopyGC, miDestroyGC, miChangeClip, miDestroyClip, miCopyClip }; static const GCFuncs sna_gc_funcs__cpu = { fbValidateGC, miChangeGC, miCopyGC, miDestroyGC, miChangeClip, miDestroyClip, miCopyClip }; static int sna_create_gc(GCPtr gc) { gc->miTranslate = 1; gc->fExpose = 1; gc->freeCompClip = 0; gc->pCompositeClip = 0; gc->pRotatedPixmap = 0; fb_gc(gc)->bpp = bits_per_pixel(gc->depth); gc->funcs = (GCFuncs *)&sna_gc_funcs; gc->ops = (GCOps *)&sna_gc_ops; return true; } static bool sna_get_image__inplace(PixmapPtr pixmap, RegionPtr region, char *dst, unsigned flags, bool idle) { struct sna_pixmap *priv = sna_pixmap(pixmap); struct sna *sna = to_sna_from_pixmap(pixmap); char *src; if (!USE_INPLACE) return false; assert(priv && priv->gpu_bo); switch (priv->gpu_bo->tiling) { case I915_TILING_Y: return false; case I915_TILING_X: if (!sna->kgem.memcpy_from_tiled_x) return false; default: break; } if (!kgem_bo_can_map__cpu(&sna->kgem, priv->gpu_bo, FORCE_FULL_SYNC)) return false; if (idle && __kgem_bo_is_busy(&sna->kgem, priv->gpu_bo)) return false; if (priv->move_to_gpu && !priv->move_to_gpu(sna, priv, MOVE_READ)) return false; assert(sna_damage_contains_box(&priv->gpu_damage, ®ion->extents) == PIXMAN_REGION_IN); assert(sna_damage_contains_box(&priv->cpu_damage, ®ion->extents) == PIXMAN_REGION_OUT); src = kgem_bo_map__cpu(&sna->kgem, priv->gpu_bo); if (src == NULL) return false; kgem_bo_sync__cpu_full(&sna->kgem, priv->gpu_bo, FORCE_FULL_SYNC); if (sigtrap_get()) return false; if (priv->gpu_bo->tiling) { DBG(("%s: download through a tiled CPU map\n", __FUNCTION__)); memcpy_from_tiled_x(&sna->kgem, src, dst, pixmap->drawable.bitsPerPixel, priv->gpu_bo->pitch, PixmapBytePad(region->extents.x2 - region->extents.x1, pixmap->drawable.depth), region->extents.x1, region->extents.y1, 0, 0, region->extents.x2 - region->extents.x1, region->extents.y2 - region->extents.y1); } else { DBG(("%s: download through a linear CPU map\n", __FUNCTION__)); memcpy_blt(src, dst, pixmap->drawable.bitsPerPixel, priv->gpu_bo->pitch, PixmapBytePad(region->extents.x2 - region->extents.x1, pixmap->drawable.depth), region->extents.x1, region->extents.y1, 0, 0, region->extents.x2 - region->extents.x1, region->extents.y2 - region->extents.y1); if (!priv->shm) { assert(src == MAP(priv->gpu_bo->map__cpu)); pixmap->devPrivate.ptr = src; pixmap->devKind = priv->gpu_bo->pitch; priv->mapped = MAPPED_CPU; assert_pixmap_map(pixmap, priv); priv->cpu = true; } } sigtrap_put(); return true; } static bool sna_get_image__blt(PixmapPtr pixmap, RegionPtr region, char *dst, unsigned flags) { struct sna_pixmap *priv = sna_pixmap(pixmap); struct sna *sna = to_sna_from_pixmap(pixmap); struct kgem_bo *dst_bo; bool ok = false; int pitch; assert(priv && priv->gpu_bo); if (!sna->kgem.has_userptr || !USE_USERPTR_DOWNLOADS) return false; if (!sna->kgem.can_blt_cpu) return false; if ((priv->create & (KGEM_CAN_CREATE_GTT | KGEM_CAN_CREATE_LARGE)) == KGEM_CAN_CREATE_GTT && kgem_bo_can_map(&sna->kgem, priv->gpu_bo)) { if (flags & (MOVE_WHOLE_HINT | MOVE_INPLACE_HINT)) return false; if (priv->gpu_damage == NULL) return false; assert(priv->gpu_bo); if (!__kgem_bo_is_busy(&sna->kgem, priv->gpu_bo)) return false; } else { if (priv->gpu_damage == NULL) return false; assert(priv->gpu_bo); } if (priv->move_to_gpu && !priv->move_to_gpu(sna, priv, MOVE_READ)) return false; DBG(("%s: download through a temporary map\n", __FUNCTION__)); assert(sna_damage_contains_box(&priv->gpu_damage, ®ion->extents) == PIXMAN_REGION_IN); assert(sna_damage_contains_box(&priv->cpu_damage, ®ion->extents) == PIXMAN_REGION_OUT); pitch = PixmapBytePad(region->extents.x2 - region->extents.x1, pixmap->drawable.depth); dst_bo = kgem_create_map(&sna->kgem, dst, pitch * (region->extents.y2 - region->extents.y1), false); if (dst_bo) { dst_bo->pitch = pitch; kgem_bo_mark_unreusable(dst_bo); ok = sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, priv->gpu_bo, 0, 0, &pixmap->drawable, dst_bo, -region->extents.x1, -region->extents.y1, ®ion->extents, 1, COPY_LAST); kgem_bo_sync__cpu(&sna->kgem, dst_bo); assert(dst_bo->rq == NULL); kgem_bo_destroy(&sna->kgem, dst_bo); } return ok; } static bool sna_get_image__fast(PixmapPtr pixmap, RegionPtr region, char *dst, unsigned flags) { struct sna_pixmap *priv = sna_pixmap(pixmap); DBG(("%s: attached?=%d, has gpu damage?=%d\n", __FUNCTION__, priv != NULL, priv && priv->gpu_damage)); if (priv == NULL || priv->gpu_damage == NULL) return false; if (priv->clear) { int w = region->extents.x2 - region->extents.x1; int h = region->extents.y2 - region->extents.y1; int pitch = PixmapBytePad(w, pixmap->drawable.depth); DBG(("%s: applying clear [%08x]\n", __FUNCTION__, priv->clear_color)); assert(DAMAGE_IS_ALL(priv->gpu_damage)); assert(priv->cpu_damage == NULL); if (priv->clear_color == 0 || pixmap->drawable.bitsPerPixel == 8 || priv->clear_color == (1U << pixmap->drawable.depth) - 1) { DBG(("%s: memset clear [%02x]\n", __FUNCTION__, priv->clear_color & 0xff)); memset(dst, priv->clear_color, pitch * h); } else { pixman_fill((uint32_t *)dst, pitch/sizeof(uint32_t), pixmap->drawable.bitsPerPixel, 0, 0, w, h, priv->clear_color); } return true; } if (!DAMAGE_IS_ALL(priv->gpu_damage) && !sna_damage_contains_box__no_reduce(priv->gpu_damage, ®ion->extents)) return false; if (sna_get_image__inplace(pixmap, region, dst, flags, true)) return true; if (sna_get_image__blt(pixmap, region, dst, flags)) return true; if (sna_get_image__inplace(pixmap, region, dst, flags, false)) return true; return false; } static void sna_get_image(DrawablePtr drawable, int x, int y, int w, int h, unsigned int format, unsigned long mask, char *dst) { RegionRec region; unsigned int flags; if (!fbDrawableEnabled(drawable)) return; DBG(("%s: pixmap=%ld (%d, %d)x(%d, %d), format=%d, mask=%lx, depth=%d\n", __FUNCTION__, (long)get_drawable_pixmap(drawable)->drawable.serialNumber, x, y, w, h, format, mask, drawable->depth)); flags = MOVE_READ; if ((w | h) == 1) flags |= MOVE_INPLACE_HINT; if (w == drawable->width) flags |= MOVE_WHOLE_HINT; if (ACCEL_GET_IMAGE && !FORCE_FALLBACK && format == ZPixmap && drawable->bitsPerPixel >= 8 && PM_IS_SOLID(drawable, mask)) { PixmapPtr pixmap = get_drawable_pixmap(drawable); int16_t dx, dy; get_drawable_deltas(drawable, pixmap, &dx, &dy); region.extents.x1 = x + drawable->x + dx; region.extents.y1 = y + drawable->y + dy; region.extents.x2 = region.extents.x1 + w; region.extents.y2 = region.extents.y1 + h; region.data = NULL; if (sna_get_image__fast(pixmap, ®ion, dst, flags)) return; if (!sna_drawable_move_region_to_cpu(&pixmap->drawable, ®ion, flags)) return; DBG(("%s: copy box (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); assert(has_coherent_ptr(to_sna_from_pixmap(pixmap), sna_pixmap(pixmap), MOVE_READ)); if (sigtrap_get() == 0) { assert(pixmap->devKind); memcpy_blt(pixmap->devPrivate.ptr, dst, drawable->bitsPerPixel, pixmap->devKind, PixmapBytePad(w, drawable->depth), region.extents.x1, region.extents.y1, 0, 0, w, h); sigtrap_put(); } } else { region.extents.x1 = x + drawable->x; region.extents.y1 = y + drawable->y; region.extents.x2 = region.extents.x1 + w; region.extents.y2 = region.extents.y1 + h; region.data = NULL; if (sna_drawable_move_region_to_cpu(drawable, ®ion, flags)) fbGetImage(drawable, x, y, w, h, format, mask, dst); } } static void sna_get_spans(DrawablePtr drawable, int wMax, DDXPointPtr pt, int *width, int n, char *start) { RegionRec region; if (!fbDrawableEnabled(drawable)) return; if (sna_spans_extents(drawable, NULL, n, pt, width, ®ion.extents) == 0) return; region.data = NULL; if (!sna_drawable_move_region_to_cpu(drawable, ®ion, MOVE_READ)) return; fbGetSpans(drawable, wMax, pt, width, n, start); } static void sna_copy_window(WindowPtr win, DDXPointRec origin, RegionPtr src) { PixmapPtr pixmap = get_window_pixmap(win); struct sna *sna = to_sna_from_pixmap(pixmap); RegionRec dst; int dx, dy; DBG(("%s origin=(%d, %d)\n", __FUNCTION__, origin.x, origin.y)); if (!fbWindowEnabled(win)) return; dx = origin.x - win->drawable.x; dy = origin.y - win->drawable.y; RegionTranslate(src, -dx, -dy); RegionNull(&dst); RegionIntersect(&dst, &win->borderClip, src); if (box_empty(&dst.extents)) return; #ifdef COMPOSITE if (pixmap->screen_x | pixmap->screen_y) RegionTranslate(&dst, -pixmap->screen_x, -pixmap->screen_y); #endif if (wedged(sna) || FORCE_FALLBACK || !ACCEL_COPY_WINDOW) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); if (!sna_pixmap_move_to_cpu(pixmap, MOVE_READ | MOVE_WRITE)) return; if (sigtrap_get() == 0) { miCopyRegion(&pixmap->drawable, &pixmap->drawable, 0, &dst, dx, dy, fbCopyNtoN, 0, NULL); sigtrap_put(); } } else { sna_self_copy_boxes(&pixmap->drawable, &pixmap->drawable, NULL, &dst, dx, dy, 0, NULL); } RegionUninit(&dst); } static Bool sna_change_window_attributes(WindowPtr win, unsigned long mask) { bool ret = true; DBG(("%s\n", __FUNCTION__)); /* Check if the fb layer wishes to modify the attached pixmaps, * to fix up mismatches between the window and pixmap depths. */ if (mask & CWBackPixmap && win->backgroundState == BackgroundPixmap) { DBG(("%s: flushing background pixmap\n", __FUNCTION__)); ret &= sna_validate_pixmap(&win->drawable, win->background.pixmap); } if (mask & CWBorderPixmap && win->borderIsPixel == false) { DBG(("%s: flushing border pixmap\n", __FUNCTION__)); ret &= sna_validate_pixmap(&win->drawable, win->border.pixmap); } return ret; } void sna_accel_flush(struct sna *sna) { struct sna_pixmap *priv; /* XXX we should be able to reduce the frequency of flushes further * by checking for outgoing damage events or sync replies. Tricky, * and doesn't appear to mitigate the performance loss. */ DBG(("%s: flush?=%d, dirty?=%d\n", __FUNCTION__, sna->kgem.flush, !list_is_empty(&sna->flush_pixmaps))); /* flush any pending damage from shadow copies to tfp clients */ while (!list_is_empty(&sna->flush_pixmaps)) { bool ret; priv = list_first_entry(&sna->flush_pixmaps, struct sna_pixmap, flush_list); list_del(&priv->flush_list); if (priv->shm) { DBG(("%s: syncing SHM pixmap=%ld (refcnt=%d)\n", __FUNCTION__, priv->pixmap->drawable.serialNumber, priv->pixmap->refcnt)); assert(!priv->flush); ret = sna_pixmap_move_to_cpu(priv->pixmap, MOVE_READ | MOVE_WRITE); assert(!ret || priv->gpu_bo == NULL); if (priv->pixmap->refcnt == 0) { sna_damage_destroy(&priv->cpu_damage); __sna_free_pixmap(sna, priv->pixmap, priv); } } else { DBG(("%s: flushing DRI pixmap=%ld\n", __FUNCTION__, priv->pixmap->drawable.serialNumber)); assert(priv->flush); if (sna_pixmap_move_to_gpu(priv->pixmap, MOVE_READ | __MOVE_FORCE)) { if (priv->flush & IS_CLIPPED) { kgem_bo_unclean(&sna->kgem, priv->gpu_bo); sna_damage_all(&priv->gpu_damage, priv->pixmap); assert(priv->cpu_damage == NULL); priv->clear = false; priv->cpu = false; } } } (void)ret; } if (sna->kgem.flush) kgem_submit(&sna->kgem); } static void sna_accel_flush_callback(CallbackListPtr *list, pointer user_data, pointer call_data) { sna_accel_flush(user_data); } static struct sna_pixmap *sna_accel_scanout(struct sna *sna) { struct sna_pixmap *priv; if (sna->mode.front_active == 0) return NULL; assert(sna->vblank_interval); assert(sna->front); priv = sna_pixmap(sna->front); if (priv->gpu_bo == NULL) return NULL; return priv; } #define TIME currentTime.milliseconds static void sna_accel_disarm_timer(struct sna *sna, int id) { DBG(("%s[%d] (time=%ld)\n", __FUNCTION__, id, (long)TIME)); sna->timer_active &= ~(1<scrn->pScreen; PixmapDirtyUpdatePtr dirty; xorg_list_for_each_entry(dirty, &screen->pixmap_dirty_list, ent) { assert(dirty->src == sna->front); if (RegionNotEmpty(DamageRegion(dirty->damage))) return true; } #endif return false; } static bool has_shadow(struct sna *sna) { DamagePtr damage = sna->mode.shadow_damage; if (damage == NULL) return false; DBG(("%s: has pending damage? %d, outstanding flips: %d\n", __FUNCTION__, RegionNotEmpty(DamageRegion(damage)), sna->mode.flip_active)); return RegionNotEmpty(DamageRegion(damage)); } static bool start_flush(struct sna *sna) { struct sna_pixmap *scanout; if (has_offload_slaves(sna)) { DBG(("%s: has offload slaves\n", __FUNCTION__)); return true; } if (has_shadow(sna)) { DBG(("%s: has dirty shadow\n", __FUNCTION__)); return true; } scanout = sna_accel_scanout(sna); if (!scanout) return false; if (sna->flags & SNA_FLUSH_GTT && scanout->gpu_bo->gtt_dirty) { scanout->gpu_bo->needs_flush = true; return true; } if (scanout->cpu_damage || scanout->gpu_bo->needs_flush) return true; kgem_scanout_flush(&sna->kgem, scanout->gpu_bo); return false; } static bool stop_flush(struct sna *sna, struct sna_pixmap *scanout) { DBG(("%s: scanout=%d shadow?=%d, slaves?=%d, (cpu?=%d || gpu?=%d))\n", __FUNCTION__, scanout && scanout->gpu_bo ? scanout->gpu_bo->handle : 0, has_shadow(sna), has_offload_slaves(sna), scanout && scanout->cpu_damage != NULL, scanout && scanout->gpu_bo && scanout->gpu_bo->rq != NULL)); if (has_offload_slaves(sna)) return true; if (has_shadow(sna)) return true; if (!scanout) return false; if (sna->flags & SNA_FLUSH_GTT && scanout->gpu_bo->gtt_dirty) { scanout->gpu_bo->needs_flush = true; return true; } return scanout->cpu_damage || scanout->gpu_bo->needs_flush; } static void timer_enable(struct sna *sna, int whom, int interval) { if (!sna->timer_active) UpdateCurrentTimeIf(); sna->timer_active |= 1 << whom; sna->timer_expire[whom] = TIME + interval; DBG(("%s (time=%ld), starting timer %d\n", __FUNCTION__, (long)TIME, whom)); } static bool sna_scanout_do_flush(struct sna *sna) { int interval = sna->vblank_interval ?: 50; if (sna->timer_active & (1<<(FLUSH_TIMER))) { int32_t delta = sna->timer_expire[FLUSH_TIMER] - TIME; DBG(("%s: flush timer active: delta=%d\n", __FUNCTION__, delta)); if (delta <= 3) { DBG(("%s (time=%ld), triggered\n", __FUNCTION__, (long)TIME)); sna->timer_expire[FLUSH_TIMER] = TIME + interval; return true; } } else { if (start_flush(sna)) timer_enable(sna, FLUSH_TIMER, interval/2); } return false; } static bool sna_accel_do_throttle(struct sna *sna) { if (sna->timer_active & (1<<(THROTTLE_TIMER))) { int32_t delta = sna->timer_expire[THROTTLE_TIMER] - TIME; if (delta <= 3) { DBG(("%s (time=%ld), triggered\n", __FUNCTION__, (long)TIME)); sna->timer_expire[THROTTLE_TIMER] = TIME + 20; return true; } } else if (!sna->kgem.need_retire) { DBG(("%s -- no pending activity\n", __FUNCTION__)); } else timer_enable(sna, THROTTLE_TIMER, 20); return false; } static bool sna_accel_do_expire(struct sna *sna) { if (sna->timer_active & (1<<(EXPIRE_TIMER))) { int32_t delta = sna->timer_expire[EXPIRE_TIMER] - TIME; if (delta <= 3) { DBG(("%s (time=%ld), triggered\n", __FUNCTION__, (long)TIME)); sna->timer_expire[EXPIRE_TIMER] = TIME + MAX_INACTIVE_TIME * 1000; return true; } } else if (sna->kgem.need_expire) timer_enable(sna, EXPIRE_TIMER, MAX_INACTIVE_TIME * 1000); return false; } static void sna_accel_post_damage(struct sna *sna) { #if HAS_PIXMAP_SHARING ScreenPtr screen = sna->scrn->pScreen; PixmapDirtyUpdatePtr dirty; bool flush = false; xorg_list_for_each_entry(dirty, &screen->pixmap_dirty_list, ent) { RegionRec region, *damage; PixmapPtr src, dst; const BoxRec *box; int16_t dx, dy; int n; assert(dirty->src == sna->front); damage = DamageRegion(dirty->damage); if (RegionNil(damage)) continue; src = dirty->src; dst = dirty->slave_dst->master_pixmap; region.extents.x1 = dirty->x; region.extents.x2 = dirty->x + dst->drawable.width; region.extents.y1 = dirty->y; region.extents.y2 = dirty->y + dst->drawable.height; region.data = NULL; DBG(("%s: pushing damage ((%d, %d), (%d, %d))x%d to slave pixmap=%d, ((%d, %d), (%d, %d))\n", __FUNCTION__, damage->extents.x1, damage->extents.y1, damage->extents.x2, damage->extents.y2, region_num_rects(damage), dst->drawable.serialNumber, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); RegionIntersect(®ion, ®ion, damage); if (RegionNil(®ion)) goto skip; dx = -dirty->x; dy = -dirty->y; #if HAS_DIRTYTRACKING2 dx += dirty->dst_x; dy += dirty->dst_y; #endif RegionTranslate(®ion, dx, dy); DamageRegionAppend(&dirty->slave_dst->drawable, ®ion); DBG(("%s: slave: ((%d, %d), (%d, %d))x%d\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2, region_num_rects(®ion))); box = region_rects(®ion); n = region_num_rects(®ion); if (wedged(sna)) { fallback: if (!sna_pixmap_move_to_cpu(src, MOVE_READ)) goto skip; if (!sna_pixmap_move_to_cpu(dst, MOVE_READ | MOVE_WRITE | MOVE_INPLACE_HINT)) goto skip; if (sigtrap_get() == 0) { assert(src->drawable.bitsPerPixel == dst->drawable.bitsPerPixel); do { DBG(("%s: copy box (%d, %d)->(%d, %d)x(%d, %d)\n", __FUNCTION__, box->x1 - dx, box->y1 - dy, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); assert(box->x2 > box->x1); assert(box->y2 > box->y1); assert(box->x1 - dx >= 0); assert(box->y1 - dy >= 0); assert(box->x2 - dx <= src->drawable.width); assert(box->y2 - dy <= src->drawable.height); assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->x2 <= src->drawable.width); assert(box->y2 <= src->drawable.height); assert(has_coherent_ptr(sna, sna_pixmap(src), MOVE_READ)); assert(has_coherent_ptr(sna, sna_pixmap(dst), MOVE_WRITE)); assert(src->devKind); assert(dst->devKind); memcpy_blt(src->devPrivate.ptr, dst->devPrivate.ptr, src->drawable.bitsPerPixel, src->devKind, dst->devKind, box->x1 - dx, box->y1 - dy, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); sigtrap_put(); } } else { if (!sna_pixmap_move_to_gpu(src, MOVE_READ | MOVE_ASYNC_HINT | __MOVE_FORCE)) goto fallback; if (!sna_pixmap_move_to_gpu(dst, MOVE_READ | MOVE_WRITE | MOVE_ASYNC_HINT | __MOVE_FORCE)) goto fallback; if (!sna->render.copy_boxes(sna, GXcopy, &src->drawable, __sna_pixmap_get_bo(src), -dx, -dy, &dst->drawable, __sna_pixmap_get_bo(dst), 0, 0, box, n, COPY_LAST)) goto fallback; flush = true; } DamageRegionProcessPending(&dirty->slave_dst->drawable); skip: RegionUninit(®ion); DamageEmpty(dirty->damage); } if (flush) kgem_submit(&sna->kgem); #endif } static void sna_scanout_flush(struct sna *sna) { struct sna_pixmap *priv = sna_accel_scanout(sna); bool busy; DBG(("%s (time=%ld), cpu damage? %d, exec? %d nbatch=%d, busy? %d\n", __FUNCTION__, (long)TIME, priv && priv->cpu_damage, priv && priv->gpu_bo->exec != NULL, sna->kgem.nbatch, sna->kgem.busy)); busy = stop_flush(sna, priv); if (!sna->kgem.busy && !busy) sna_accel_disarm_timer(sna, FLUSH_TIMER); sna->kgem.busy = busy; if (priv && sna->mode.shadow_damage == NULL && sna_pixmap_force_to_gpu(priv->pixmap, MOVE_READ | MOVE_ASYNC_HINT | __MOVE_SCANOUT)) kgem_scanout_flush(&sna->kgem, priv->gpu_bo); sna_mode_redisplay(sna); sna_accel_post_damage(sna); } static void sna_accel_throttle(struct sna *sna) { DBG(("%s (time=%ld)\n", __FUNCTION__, (long)TIME)); if (sna->kgem.need_throttle) { kgem_submit(&sna->kgem); kgem_throttle(&sna->kgem); } if (!sna->kgem.need_retire) sna_accel_disarm_timer(sna, THROTTLE_TIMER); } static void sna_pixmap_expire(struct sna *sna) { while (sna->freed_pixmap) { PixmapPtr pixmap = __pop_freed_pixmap(sna); free(sna_pixmap(pixmap)); FreePixmap(pixmap); } } static void sna_accel_expire(struct sna *sna) { DBG(("%s (time=%ld)\n", __FUNCTION__, (long)TIME)); kgem_expire_cache(&sna->kgem); sna_pixmap_expire(sna); if (!sna->kgem.need_expire) sna_accel_disarm_timer(sna, EXPIRE_TIMER); } #ifdef DEBUG_MEMORY static bool sna_accel_do_debug_memory(struct sna *sna) { int32_t delta = sna->timer_expire[DEBUG_MEMORY_TIMER] - TIME; if (delta <= 3) { sna->timer_expire[DEBUG_MEMORY_TIMER] = TIME + 10 * 1000; return true; } else return false; } static void sna_accel_debug_memory(struct sna *sna) { ErrorF("Allocated pixmaps: %d (cached: %d), bo: %d, %lu bytes (CPU bo: %d, %lu bytes)\n", sna->debug_memory.pixmap_allocs, sna->debug_memory.pixmap_cached, sna->kgem.debug_memory.bo_allocs, (unsigned long)sna->kgem.debug_memory.bo_bytes, sna->debug_memory.cpu_bo_allocs, (unsigned long)sna->debug_memory.cpu_bo_bytes); #ifdef VALGRIND_DO_ADDED_LEAK_CHECK VG(VALGRIND_DO_ADDED_LEAK_CHECK); #endif } #else #define sna_accel_do_debug_memory(x) 0 static void sna_accel_debug_memory(struct sna *sna) { } #endif static ShmFuncs shm_funcs = { sna_pixmap_create_shm, NULL }; static PixmapPtr sna_get_window_pixmap(WindowPtr window) { return get_window_pixmap(window); } static void sna_set_window_pixmap(WindowPtr window, PixmapPtr pixmap) { DBG(("%s: window=%ld, old pixmap=%ld new pixmap=%ld\n", __FUNCTION__, window->drawable.id, get_window_pixmap(window) ? get_window_pixmap(window)->drawable.serialNumber : 0, pixmap->drawable.serialNumber)); sna_dri2_decouple_window(window); *(PixmapPtr *)__get_private(window, sna_window_key) = pixmap; } struct sna_visit_set_pixmap_window { PixmapPtr old, new; }; static int sna_visit_set_window_pixmap(WindowPtr window, pointer data) { struct sna_visit_set_pixmap_window *visit = data; if (sna_get_window_pixmap(window) == visit->old) { window->drawable.pScreen->SetWindowPixmap(window, visit->new); return WT_WALKCHILDREN; } return WT_DONTWALKCHILDREN; } static void migrate_dirty_tracking(PixmapPtr old_front, PixmapPtr new_front) { #if HAS_PIXMAP_SHARING ScreenPtr screen = old_front->drawable.pScreen; PixmapDirtyUpdatePtr dirty, safe; xorg_list_for_each_entry_safe(dirty, safe, &screen->pixmap_dirty_list, ent) { assert(dirty->src == old_front); if (dirty->src != old_front) continue; DamageUnregister(&dirty->src->drawable, dirty->damage); DamageDestroy(dirty->damage); dirty->damage = DamageCreate(NULL, NULL, DamageReportNone, TRUE, screen, screen); if (!dirty->damage) { xorg_list_del(&dirty->ent); free(dirty); continue; } DamageRegister(&new_front->drawable, dirty->damage); dirty->src = new_front; } #endif } static void sna_set_screen_pixmap(PixmapPtr pixmap) { ScreenPtr screen = pixmap->drawable.pScreen; PixmapPtr old_front = screen->devPrivate; WindowPtr root; DBG(("%s: changing from pixmap=%ld to pixmap=%ld, (sna->front=%ld)\n", __FUNCTION__, old_front ? (long)old_front->drawable.serialNumber : 0, pixmap ? (long)pixmap->drawable.serialNumber : 0, to_sna_from_pixmap(pixmap)->front ? (long)to_sna_from_pixmap(pixmap)->front->drawable.serialNumber : 0)); assert(to_sna_from_pixmap(pixmap) == to_sna_from_screen(screen)); assert(to_sna_from_pixmap(pixmap)->front == old_front); if (old_front) { assert(to_sna_from_pixmap(old_front)->front == old_front); migrate_dirty_tracking(old_front, pixmap); } root = get_root_window(screen); if (root) { struct sna_visit_set_pixmap_window visit = { old_front, pixmap }; TraverseTree(root, sna_visit_set_window_pixmap, &visit); assert(fbGetWindowPixmap(root) == pixmap); } to_sna_from_pixmap(pixmap)->front = pixmap; screen->devPrivate = pixmap; pixmap->refcnt++; if (old_front) screen->DestroyPixmap(old_front); } static Bool sna_create_window(WindowPtr win) { sna_set_window_pixmap(win, win->drawable.pScreen->devPrivate); return TRUE; } static Bool sna_map_window(WindowPtr win) { return TRUE; } static Bool sna_position_window(WindowPtr win, int x, int y) { return TRUE; } static Bool sna_unmap_window(WindowPtr win) { return TRUE; } static Bool sna_destroy_window(WindowPtr win) { sna_video_destroy_window(win); sna_dri2_destroy_window(win); return TRUE; } static void sna_query_best_size(int class, unsigned short *width, unsigned short *height, ScreenPtr screen) { unsigned short w; switch (class) { case CursorShape: if (*width > screen->width) *width = screen->width; if (*height > screen->height) *height = screen->height; break; case TileShape: case StippleShape: w = *width; if ((w & (w - 1)) && w < FB_UNIT) { for (w = 1; w < *width; w <<= 1) ; *width = w; } break; } } static void sna_store_colors(ColormapPtr cmap, int n, xColorItem *def) { } static bool sna_picture_init(ScreenPtr screen) { PictureScreenPtr ps; DBG(("%s\n", __FUNCTION__)); if (!miPictureInit(screen, NULL, 0)) return false; ps = GetPictureScreen(screen); assert(ps != NULL); assert(ps->CreatePicture != NULL); assert(ps->DestroyPicture != NULL); ps->Composite = sna_composite; ps->CompositeRects = sna_composite_rectangles; ps->Glyphs = sna_glyphs; if (xf86IsEntityShared(xf86ScreenToScrn(screen)->entityList[0])) ps->Glyphs = sna_glyphs__shared; ps->UnrealizeGlyph = sna_glyph_unrealize; ps->AddTraps = sna_add_traps; ps->Trapezoids = sna_composite_trapezoids; #if HAS_PIXMAN_TRIANGLES ps->Triangles = sna_composite_triangles; #if PICTURE_SCREEN_VERSION >= 2 ps->TriStrip = sna_composite_tristrip; ps->TriFan = sna_composite_trifan; #endif #endif return true; } static bool sna_option_accel_none(struct sna *sna) { const char *s; if (wedged(sna)) return true; if (xf86ReturnOptValBool(sna->Options, OPTION_ACCEL_DISABLE, FALSE)) return true; s = xf86GetOptValString(sna->Options, OPTION_ACCEL_METHOD); if (s == NULL) return IS_DEFAULT_ACCEL_METHOD(NOACCEL); return strcasecmp(s, "none") == 0; } static bool sna_option_accel_blt(struct sna *sna) { const char *s; s = xf86GetOptValString(sna->Options, OPTION_ACCEL_METHOD); if (s == NULL) return false; return strcasecmp(s, "blt") == 0; } bool sna_accel_init(ScreenPtr screen, struct sna *sna) { const char *backend; DBG(("%s\n", __FUNCTION__)); sna_font_key = AllocateFontPrivateIndex(); list_init(&sna->flush_pixmaps); list_init(&sna->active_pixmaps); AddGeneralSocket(sna->kgem.fd); #ifdef DEBUG_MEMORY sna->timer_expire[DEBUG_MEMORY_TIMER] = GetTimeInMillis()+ 10 * 1000; #endif screen->defColormap = FakeClientID(0); /* let CreateDefColormap do whatever it wants for pixels */ screen->blackPixel = screen->whitePixel = (Pixel) 0; screen->QueryBestSize = sna_query_best_size; assert(screen->GetImage == NULL); screen->GetImage = sna_get_image; assert(screen->GetSpans == NULL); screen->GetSpans = sna_get_spans; assert(screen->CreateWindow == NULL); screen->CreateWindow = sna_create_window; assert(screen->DestroyWindow == NULL); screen->DestroyWindow = sna_destroy_window; screen->PositionWindow = sna_position_window; screen->ChangeWindowAttributes = sna_change_window_attributes; screen->RealizeWindow = sna_map_window; screen->UnrealizeWindow = sna_unmap_window; screen->CopyWindow = sna_copy_window; assert(screen->CreatePixmap == NULL); screen->CreatePixmap = sna_create_pixmap; assert(screen->DestroyPixmap == NULL); screen->DestroyPixmap = sna_destroy_pixmap; #ifdef CREATE_PIXMAP_USAGE_SHARED screen->SharePixmapBacking = sna_share_pixmap_backing; screen->SetSharedPixmapBacking = sna_set_shared_pixmap_backing; #endif screen->RealizeFont = sna_realize_font; screen->UnrealizeFont = sna_unrealize_font; assert(screen->CreateGC == NULL); screen->CreateGC = sna_create_gc; screen->CreateColormap = miInitializeColormap; screen->DestroyColormap = (void (*)(ColormapPtr)) NoopDDA; screen->InstallColormap = miInstallColormap; screen->UninstallColormap = miUninstallColormap; screen->ListInstalledColormaps = miListInstalledColormaps; screen->ResolveColor = miResolveColor; assert(screen->StoreColors == NULL); screen->StoreColors = sna_store_colors; screen->BitmapToRegion = fbBitmapToRegion; #if HAS_PIXMAP_SHARING screen->StartPixmapTracking = PixmapStartDirtyTracking; screen->StopPixmapTracking = PixmapStopDirtyTracking; #endif assert(screen->GetWindowPixmap == NULL); screen->GetWindowPixmap = sna_get_window_pixmap; assert(screen->SetWindowPixmap == NULL); screen->SetWindowPixmap = sna_set_window_pixmap; screen->SetScreenPixmap = sna_set_screen_pixmap; if (sna->kgem.has_userptr) ShmRegisterFuncs(screen, &shm_funcs); else ShmRegisterFbFuncs(screen); if (!sna_picture_init(screen)) return false; backend = no_render_init(sna); if (sna_option_accel_none(sna)) { backend = "disabled"; sna->kgem.wedged = true; sna_render_mark_wedged(sna); } else if (sna_option_accel_blt(sna) || sna->info->gen >= 0110) (void)backend; else if (sna->info->gen >= 0100) backend = gen8_render_init(sna, backend); else if (sna->info->gen >= 070) backend = gen7_render_init(sna, backend); else if (sna->info->gen >= 060) backend = gen6_render_init(sna, backend); else if (sna->info->gen >= 050) backend = gen5_render_init(sna, backend); else if (sna->info->gen >= 040) backend = gen4_render_init(sna, backend); else if (sna->info->gen >= 030) backend = gen3_render_init(sna, backend); else if (sna->info->gen >= 020) backend = gen2_render_init(sna, backend); DBG(("%s(backend=%s, prefer_gpu=%x)\n", __FUNCTION__, backend, sna->render.prefer_gpu)); kgem_reset(&sna->kgem); sigtrap_init(); xf86DrvMsg(sna->scrn->scrnIndex, X_INFO, "SNA initialized with %s backend\n", backend); return true; } void sna_accel_create(struct sna *sna) { DBG(("%s\n", __FUNCTION__)); if (!sna_glyphs_create(sna)) goto fail; if (!sna_gradients_create(sna)) goto fail; if (!sna_composite_create(sna)) goto fail; return; fail: xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, "Failed to allocate caches, disabling RENDER acceleration\n"); no_render_init(sna); } void sna_accel_watch_flush(struct sna *sna, int enable) { DBG(("%s: enable=%d\n", __FUNCTION__, enable)); assert(enable); if (sna->watch_flush == 0) { DBG(("%s: installing watchers\n", __FUNCTION__)); assert(enable > 0); if (!AddCallback(&FlushCallback, sna_accel_flush_callback, sna)) { xf86DrvMsg(sna->scrn->scrnIndex, X_Error, "Failed to attach ourselves to the flush callbacks, expect missing synchronisation with DRI clients (e.g a compositor)\n"); } sna->watch_flush++; } sna->watch_flush += enable; } void sna_accel_leave(struct sna *sna) { DBG(("%s\n", __FUNCTION__)); /* as root we always have permission to render */ if (geteuid() == 0) return; /* as a user, we can only render now if we have a rendernode */ if (intel_has_render_node(sna->dev)) return; /* no longer authorized to use our fd */ DBG(("%s: dropping render privileges\n", __FUNCTION__)); kgem_submit(&sna->kgem); sna->kgem.wedged |= 2; } void sna_accel_enter(struct sna *sna) { DBG(("%s\n", __FUNCTION__)); sna->kgem.wedged &= kgem_is_wedged(&sna->kgem); kgem_throttle(&sna->kgem); } void sna_accel_close(struct sna *sna) { DBG(("%s\n", __FUNCTION__)); sna_composite_close(sna); sna_gradients_close(sna); sna_glyphs_close(sna); sna_pixmap_expire(sna); DeleteCallback(&FlushCallback, sna_accel_flush_callback, sna); RemoveGeneralSocket(sna->kgem.fd); kgem_cleanup_cache(&sna->kgem); } void sna_accel_block_handler(struct sna *sna, struct timeval **tv) { sigtrap_assert_inactive(); if (sna->kgem.need_retire) kgem_retire(&sna->kgem); kgem_retire__buffers(&sna->kgem); if (sna->timer_active) UpdateCurrentTimeIf(); if (sna->kgem.nbatch && (sna->kgem.scanout_busy || kgem_ring_is_idle(&sna->kgem, sna->kgem.ring))) { DBG(("%s: GPU idle, flushing\n", __FUNCTION__)); _kgem_submit(&sna->kgem); } if (sna->mode.dirty) sna_crtc_config_notify(xf86ScrnToScreen(sna->scrn)); restart: if (sna_scanout_do_flush(sna)) sna_scanout_flush(sna); assert(sna_accel_scanout(sna) == NULL || !sna_accel_scanout(sna)->gpu_bo->needs_flush || sna->timer_active & (1<<(FLUSH_TIMER))); if (sna_accel_do_throttle(sna)) sna_accel_throttle(sna); assert(!sna->kgem.need_retire || sna->timer_active & (1<<(THROTTLE_TIMER))); if (sna_accel_do_expire(sna)) sna_accel_expire(sna); assert(!sna->kgem.need_expire || sna->timer_active & (1<<(EXPIRE_TIMER))); if (sna_accel_do_debug_memory(sna)) sna_accel_debug_memory(sna); if (sna->watch_flush == 1) { DBG(("%s: removing watchers\n", __FUNCTION__)); DeleteCallback(&FlushCallback, sna_accel_flush_callback, sna); sna->watch_flush = 0; } if (sna->timer_active & 1) { int32_t timeout; DBG(("%s: evaluating timers, active=%x\n", __FUNCTION__, sna->timer_active)); timeout = sna->timer_expire[FLUSH_TIMER] - TIME; DBG(("%s: flush timer expires in %d [%d]\n", __FUNCTION__, timeout, sna->timer_expire[FLUSH_TIMER])); if (timeout < 3) goto restart; if (*tv == NULL) { *tv = &sna->timer_tv; goto set_tv; } if ((*tv)->tv_sec * 1000 + (*tv)->tv_usec / 1000 > timeout) { set_tv: (*tv)->tv_sec = timeout / 1000; (*tv)->tv_usec = timeout % 1000 * 1000; } } sna->kgem.scanout_busy = false; if (FAULT_INJECTION && (rand() % FAULT_INJECTION) == 0) { DBG(("%s hardware acceleration\n", sna->kgem.wedged ? "Re-enabling" : "Disabling")); kgem_submit(&sna->kgem); sna->kgem.wedged = !sna->kgem.wedged; } } void sna_accel_wakeup_handler(struct sna *sna) { DBG(("%s: nbatch=%d, need_retire=%d, need_purge=%d\n", __FUNCTION__, sna->kgem.nbatch, sna->kgem.need_retire, sna->kgem.need_purge)); if (!sna->kgem.nbatch) return; if (kgem_is_idle(&sna->kgem)) { DBG(("%s: GPU idle, flushing\n", __FUNCTION__)); _kgem_submit(&sna->kgem); } sigtrap_assert_inactive(); } void sna_accel_free(struct sna *sna) { DBG(("%s\n", __FUNCTION__)); sigtrap_assert_inactive(); } xf86-video-intel-2.99.917/src/sna/gen8_eu.c0000664000175000017500000010367112432737457015023 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include "compiler.h" #include "brw/brw.h" #include "gen8_eu.h" #ifndef ARRAY_SIZE #define ARRAY_SIZE(a) (sizeof(a)/sizeof(a[0])) #endif /* EU ISA */ #define MRF_HACK_START 111 struct gen8_instruction { uint32_t data[4]; }; static inline unsigned __gen8_mask(unsigned high, unsigned low) { assert(high >= low); return (1 << (high - low + 1)) - 1; } /** * Fetch a set of contiguous bits from the instruction. * * Bits indexes range from 0..127; fields may not cross 32-bit boundaries. */ static inline unsigned __gen8_bits(struct gen8_instruction *insn, unsigned high, unsigned low) { /* We assume the field doesn't cross 32-bit boundaries. */ const unsigned word = high / 32; assert(word == low / 32); high %= 32; low %= 32; return (insn->data[word] >> low) & __gen8_mask(high, low); } /** * Set bits in the instruction, with proper shifting and masking. * * Bits indexes range from 0..127; fields may not cross 32-bit boundaries. */ static inline void __gen8_set_bits(struct gen8_instruction *insn, unsigned high, unsigned low, unsigned value) { const unsigned word = high / 32; unsigned mask; assert(word == low / 32); high %= 32; low %= 32; assert(value < __gen8_mask(high, low) + 1); mask = __gen8_mask(high, low) << low; insn->data[word] &= ~mask; insn->data[word] |= (value << low) & mask; assert(__gen8_bits(insn, 32*word+high, 32*word+low) == value); } #define F(name, high, low) \ static inline void __gen8_set_##name(struct gen8_instruction *insn, unsigned v) \ { \ __gen8_set_bits(insn, high, low, v); \ } \ static inline unsigned __gen8_##name(struct gen8_instruction *insn) \ { \ return __gen8_bits(insn, high, low); \ } /** * Direct addressing only: * @{ */ F(src1_da_reg_nr, 108, 101); F(src0_da_reg_nr, 76, 69); F(dst_da1_hstride, 62, 61); F(dst_da_reg_nr, 60, 53); F(dst_da16_subreg_nr, 52, 52); F(dst_da1_subreg_nr, 52, 48); F(da16_writemask, 51, 48); /* Dst.ChanEn */ /** @} */ F(src1_vert_stride, 120, 117) F(src1_da1_width, 116, 114) F(src1_da16_swiz_w, 115, 114) F(src1_da16_swiz_z, 113, 112) F(src1_da1_hstride, 113, 112) F(src1_address_mode, 111, 111) /** Src1.SrcMod @{ */ F(src1_negate, 110, 110) F(src1_abs, 109, 109) /** @} */ F(src1_da16_subreg_nr, 100, 100) F(src1_da1_subreg_nr, 100, 96) F(src1_da16_swiz_y, 99, 98) F(src1_da16_swiz_x, 97, 96) F(src1_reg_type, 94, 91) F(src1_reg_file, 90, 89) F(src0_vert_stride, 88, 85) F(src0_da1_width, 84, 82) F(src0_da16_swiz_w, 83, 82) F(src0_da16_swiz_z, 81, 80) F(src0_da1_hstride, 81, 80) F(src0_address_mode, 79, 79) /** Src0.SrcMod @{ */ F(src0_negate, 78, 78) F(src0_abs, 77, 77) /** @} */ F(src0_da16_subreg_nr, 68, 68) F(src0_da1_subreg_nr, 68, 64) F(src0_da16_swiz_y, 67, 66) F(src0_da16_swiz_x, 65, 64) F(dst_address_mode, 63, 63) F(src0_reg_type, 46, 43) F(src0_reg_file, 42, 41) F(dst_reg_type, 40, 37) F(dst_reg_file, 36, 35) F(mask_control, 34, 34) F(flag_reg_nr, 33, 33) F(flag_subreg_nr, 32, 32) F(saturate, 31, 31) F(branch_control, 30, 30) F(debug_control, 30, 30) F(cmpt_control, 29, 29) F(acc_wr_control, 28, 28) F(cond_modifier, 27, 24) F(exec_size, 23, 21) F(pred_inv, 20, 20) F(pred_control, 19, 16) F(thread_control, 15, 14) F(qtr_control, 13, 12) F(nib_control, 11, 11) F(dep_control, 10, 9) F(access_mode, 8, 8) /* Bit 7 is Reserved (for future Opcode expansion) */ F(opcode, 6, 0) /** * Three-source instructions: * @{ */ F(src2_3src_reg_nr, 125, 118) F(src2_3src_subreg_nr, 117, 115) F(src2_3src_swizzle, 114, 107) F(src2_3src_rep_ctrl, 106, 106) F(src1_3src_reg_nr, 104, 97) F(src1_3src_subreg_hi, 96, 96) F(src1_3src_subreg_lo, 95, 94) F(src1_3src_swizzle, 93, 86) F(src1_3src_rep_ctrl, 85, 85) F(src0_3src_reg_nr, 83, 76) F(src0_3src_subreg_nr, 75, 73) F(src0_3src_swizzle, 72, 65) F(src0_3src_rep_ctrl, 64, 64) F(dst_3src_reg_nr, 63, 56) F(dst_3src_subreg_nr, 55, 53) F(dst_3src_writemask, 52, 49) F(dst_3src_type, 48, 46) F(src_3src_type, 45, 43) F(src2_3src_negate, 42, 42) F(src2_3src_abs, 41, 41) F(src1_3src_negate, 40, 40) F(src1_3src_abs, 39, 39) F(src0_3src_negate, 38, 38) F(src0_3src_abs, 37, 37) /** @} */ /** * Fields for SEND messages: * @{ */ F(eot, 127, 127) F(mlen, 124, 121) F(rlen, 120, 116) F(header_present, 115, 115) F(function_control, 114, 96) F(sfid, 27, 24) F(math_function, 27, 24) /** @} */ /** * URB message function control bits: * @{ */ F(urb_per_slot_offset, 113, 113) F(urb_interleave, 111, 111) F(urb_global_offset, 110, 100) F(urb_opcode, 99, 96) /** @} */ /** * Sampler message function control bits: * @{ */ F(sampler_simd_mode, 114, 113) F(sampler_msg_type, 112, 108) F(sampler, 107, 104) F(binding_table_index, 103, 96) /** @} */ /** * Data port message function control bits: * @ { */ F(dp_category, 114, 114) F(dp_message_type, 113, 110) F(dp_message_control, 109, 104) F(dp_binding_table_index, 103, 96) /** @} */ /** * Thread Spawn message function control bits: * @ { */ F(ts_resource_select, 100, 100) F(ts_request_type, 97, 97) F(ts_opcode, 96, 96) /** @} */ /** * Video Motion Estimation message function control bits: * @ { */ F(vme_message_type, 110, 109) F(vme_binding_table_index, 103, 96) /** @} */ /** * Check & Refinement Engine message function control bits: * @ { */ F(cre_message_type, 110, 109) F(cre_binding_table_index, 103, 96) /** @} */ #undef F /** * Flow control instruction bits: * @{ */ static inline unsigned __gen8_uip(struct gen8_instruction *insn) { return insn->data[2]; } static inline void __gen8_set_uip(struct gen8_instruction *insn, unsigned uip) { insn->data[2] = uip; } static inline unsigned __gen8_jip(struct gen8_instruction *insn) { return insn->data[3]; } static inline void __gen8_set_jip(struct gen8_instruction *insn, unsigned jip) { insn->data[3] = jip; } /** @} */ static inline int __gen8_src1_imm_d(struct gen8_instruction *insn) { return insn->data[3]; } static inline unsigned __gen8_src1_imm_ud(struct gen8_instruction *insn) { return insn->data[3]; } static inline float __gen8_src1_imm_f(struct gen8_instruction *insn) { union { uint32_t u; float f; } ft = { insn->data[3] }; return ft.f; } static void __gen8_set_dst(struct brw_compile *p, struct gen8_instruction *inst, struct brw_reg reg) { /* MRFs haven't existed since Gen7, so we better not be using them. */ if (reg.file == BRW_MESSAGE_REGISTER_FILE) { reg.file = BRW_GENERAL_REGISTER_FILE; reg.nr += MRF_HACK_START; } assert(reg.file != BRW_MESSAGE_REGISTER_FILE); if (reg.file == BRW_GENERAL_REGISTER_FILE) assert(reg.nr < BRW_MAX_GRF); __gen8_set_dst_reg_file(inst, reg.file); __gen8_set_dst_reg_type(inst, reg.type); assert(reg.address_mode == BRW_ADDRESS_DIRECT); __gen8_set_dst_da_reg_nr(inst, reg.nr); if (__gen8_access_mode(inst) == BRW_ALIGN_1) { /* Set Dst.SubRegNum[4:0] */ __gen8_set_dst_da1_subreg_nr(inst, reg.subnr); /* Set Dst.HorzStride */ if (reg.hstride == BRW_HORIZONTAL_STRIDE_0) reg.hstride = BRW_HORIZONTAL_STRIDE_1; __gen8_set_dst_da1_hstride(inst, reg.hstride); } else { /* Align16 SubRegNum only has a single bit (bit 4; bits 3:0 MBZ). */ assert(reg.subnr == 0 || reg.subnr == 16); __gen8_set_dst_da16_subreg_nr(inst, reg.subnr >> 4); __gen8_set_da16_writemask(inst, reg.dw1.bits.writemask); } #if 1 if (reg.width == BRW_WIDTH_8 && p->compressed) __gen8_set_exec_size(inst, BRW_EXECUTE_16); else __gen8_set_exec_size(inst, reg.width); #else if (reg.width < BRW_EXECUTE_8) __gen8_set_exec_size(inst, reg.width); #endif } static void __gen8_validate_reg(struct gen8_instruction *inst, struct brw_reg reg) { int hstride_for_reg[] = {0, 1, 2, 4}; int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256}; int width_for_reg[] = {1, 2, 4, 8, 16}; int execsize_for_reg[] = {1, 2, 4, 8, 16}; int width, hstride, vstride, execsize; if (reg.file == BRW_IMMEDIATE_VALUE) { /* TODO: check immediate vectors */ return; } if (reg.file == BRW_ARCHITECTURE_REGISTER_FILE) return; assert(reg.hstride >= 0 && reg.hstride < ARRAY_SIZE(hstride_for_reg)); hstride = hstride_for_reg[reg.hstride]; if (reg.vstride == 0xf) { vstride = -1; } else { assert(reg.vstride >= 0 && reg.vstride < ARRAY_SIZE(vstride_for_reg)); vstride = vstride_for_reg[reg.vstride]; } assert(reg.width >= 0 && reg.width < ARRAY_SIZE(width_for_reg)); width = width_for_reg[reg.width]; assert(__gen8_exec_size(inst) >= 0 && __gen8_exec_size(inst) < ARRAY_SIZE(execsize_for_reg)); execsize = execsize_for_reg[__gen8_exec_size(inst)]; /* Restrictions from 3.3.10: Register Region Restrictions. */ /* 3. */ assert(execsize >= width); /* 4. */ if (execsize == width && hstride != 0) { assert(vstride == -1 || vstride == width * hstride); } /* 5. */ if (execsize == width && hstride == 0) { /* no restriction on vstride. */ } /* 6. */ if (width == 1) { assert(hstride == 0); } /* 7. */ if (execsize == 1 && width == 1) { assert(hstride == 0); assert(vstride == 0); } /* 8. */ if (vstride == 0 && hstride == 0) { assert(width == 1); } /* 10. Check destination issues. */ } static void __gen8_set_src0(struct gen8_instruction *inst, struct brw_reg reg) { /* MRFs haven't existed since Gen7, so we better not be using them. */ if (reg.file == BRW_MESSAGE_REGISTER_FILE) { reg.file = BRW_GENERAL_REGISTER_FILE; reg.nr += MRF_HACK_START; } if (reg.file == BRW_GENERAL_REGISTER_FILE) assert(reg.nr < BRW_MAX_GRF); __gen8_validate_reg(inst, reg); __gen8_set_src0_reg_file(inst, reg.file); __gen8_set_src0_reg_type(inst, reg.type); __gen8_set_src0_abs(inst, reg.abs); __gen8_set_src0_negate(inst, reg.negate); assert(reg.address_mode == BRW_ADDRESS_DIRECT); if (reg.file == BRW_IMMEDIATE_VALUE) { inst->data[3] = reg.dw1.ud; /* Required to set some fields in src1 as well: */ __gen8_set_src1_reg_file(inst, 0); /* arf */ __gen8_set_src1_reg_type(inst, reg.type); } else { __gen8_set_src0_da_reg_nr(inst, reg.nr); if (__gen8_access_mode(inst) == BRW_ALIGN_1) { /* Set Src0.SubRegNum[4:0] */ __gen8_set_src0_da1_subreg_nr(inst, reg.subnr); if (reg.width == BRW_WIDTH_1 && __gen8_exec_size(inst) == BRW_EXECUTE_1) { __gen8_set_src0_da1_hstride(inst, BRW_HORIZONTAL_STRIDE_0); __gen8_set_src0_vert_stride(inst, BRW_VERTICAL_STRIDE_0); } else { __gen8_set_src0_da1_hstride(inst, reg.hstride); __gen8_set_src0_vert_stride(inst, reg.vstride); } __gen8_set_src0_da1_width(inst, reg.width); } else { /* Align16 SubRegNum only has a single bit (bit 4; bits 3:0 MBZ). */ assert(reg.subnr == 0 || reg.subnr == 16); __gen8_set_src0_da16_subreg_nr(inst, reg.subnr >> 4); __gen8_set_src0_da16_swiz_x(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X)); __gen8_set_src0_da16_swiz_y(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y)); __gen8_set_src0_da16_swiz_z(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z)); __gen8_set_src0_da16_swiz_w(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W)); /* This is an oddity of the fact that we're using the same * descriptions for registers in both Align16 and Align1 modes. */ if (reg.vstride == BRW_VERTICAL_STRIDE_8) __gen8_set_src0_vert_stride(inst, BRW_VERTICAL_STRIDE_4); else __gen8_set_src0_vert_stride(inst, reg.vstride); } } } static void __gen8_set_src1(struct gen8_instruction *inst, struct brw_reg reg) { /* MRFs haven't existed since Gen7, so we better not be using them. */ if (reg.file == BRW_MESSAGE_REGISTER_FILE) { reg.file = BRW_GENERAL_REGISTER_FILE; reg.nr += MRF_HACK_START; } if (reg.file == BRW_GENERAL_REGISTER_FILE) assert(reg.nr < BRW_MAX_GRF); __gen8_validate_reg(inst, reg); __gen8_set_src1_reg_file(inst, reg.file); __gen8_set_src1_reg_type(inst, reg.type); __gen8_set_src1_abs(inst, reg.abs); __gen8_set_src1_negate(inst, reg.negate); /* Only src1 can be an immediate in two-argument instructions. */ assert(__gen8_src0_reg_file(inst) != BRW_IMMEDIATE_VALUE); assert(reg.address_mode == BRW_ADDRESS_DIRECT); if (reg.file == BRW_IMMEDIATE_VALUE) { inst->data[3] = reg.dw1.ud; } else { __gen8_set_src1_da_reg_nr(inst, reg.nr); if (__gen8_access_mode(inst) == BRW_ALIGN_1) { /* Set Src0.SubRegNum[4:0] */ __gen8_set_src1_da1_subreg_nr(inst, reg.subnr); if (reg.width == BRW_WIDTH_1 && __gen8_exec_size(inst) == BRW_EXECUTE_1) { __gen8_set_src1_da1_hstride(inst, BRW_HORIZONTAL_STRIDE_0); __gen8_set_src1_vert_stride(inst, BRW_VERTICAL_STRIDE_0); } else { __gen8_set_src1_da1_hstride(inst, reg.hstride); __gen8_set_src1_vert_stride(inst, reg.vstride); } __gen8_set_src1_da1_width(inst, reg.width); } else { /* Align16 SubRegNum only has a single bit (bit 4; bits 3:0 MBZ). */ assert(reg.subnr == 0 || reg.subnr == 16); __gen8_set_src1_da16_subreg_nr(inst, reg.subnr >> 4); __gen8_set_src1_da16_swiz_x(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X)); __gen8_set_src1_da16_swiz_y(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y)); __gen8_set_src1_da16_swiz_z(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z)); __gen8_set_src1_da16_swiz_w(inst, BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W)); /* This is an oddity of the fact that we're using the same * descriptions for registers in both Align16 and Align1 modes. */ if (reg.vstride == BRW_VERTICAL_STRIDE_8) __gen8_set_src1_vert_stride(inst, BRW_VERTICAL_STRIDE_4); else __gen8_set_src1_vert_stride(inst, reg.vstride); } } } /** * Set the Message Descriptor and Extended Message Descriptor fields * for SEND messages. * * \note This zeroes out the Function Control bits, so it must be called * \b before filling out any message-specific data. Callers can * choose not to fill in irrelevant bits; they will be zero. */ static void __gen8_set_message_descriptor(struct gen8_instruction *inst, enum brw_message_target sfid, unsigned msg_length, unsigned response_length, bool header_present, bool end_of_thread) { __gen8_set_src1(inst, brw_imm_d(0)); __gen8_set_sfid(inst, sfid); __gen8_set_mlen(inst, msg_length); __gen8_set_rlen(inst, response_length); __gen8_set_header_present(inst, header_present); __gen8_set_eot(inst, end_of_thread); } #if 0 static void __gen8_set_urb_message(struct gen8_instruction *inst, unsigned opcode, unsigned msg_length, unsigned response_length, bool end_of_thread, unsigned offset, bool interleave) { __gen8_set_message_descriptor(inst, BRW_SFID_URB, msg_length, response_length, true, end_of_thread); __gen8_set_src0(inst, brw_vec8_grf(MRF_HACK_START + 1, 0)); __gen8_set_urb_opcode(inst, 0); /* URB_WRITE_HWORD */ __gen8_set_urb_global_offset(inst, offset); __gen8_set_urb_interleave(inst, interleave); /* per_slot_offset = 0 makes it ignore offsets in message header */ __gen8_set_urb_per_slot_offset(inst, 0); } #endif static void __gen8_set_sampler_message(struct gen8_instruction *inst, unsigned binding_table_index, unsigned sampler, unsigned msg_type, unsigned response_length, unsigned msg_length, bool header_present, unsigned simd_mode) { __gen8_set_message_descriptor(inst, BRW_SFID_SAMPLER, msg_length, response_length, header_present, false); __gen8_set_binding_table_index(inst, binding_table_index); __gen8_set_sampler(inst, sampler); __gen8_set_sampler_msg_type(inst, msg_type); __gen8_set_sampler_simd_mode(inst, simd_mode); } static void __gen8_set_dp_message(struct gen8_instruction *inst, enum brw_message_target sfid, unsigned binding_table_index, unsigned msg_type, unsigned msg_control, unsigned mlen, unsigned rlen, bool header_present, bool end_of_thread) { /* Binding table index is from 0..255 */ assert((binding_table_index & 0xff) == binding_table_index); /* Message Type is only 5 bits */ assert((msg_type & 0x1f) == msg_type); /* Message Control is only 6 bits */ assert((msg_control & 0x3f) == msg_control); __gen8_set_message_descriptor(inst, sfid, mlen, rlen, header_present, end_of_thread); __gen8_set_function_control(inst, binding_table_index | msg_type << 14 | msg_control << 8); } static inline struct gen8_instruction * gen8_next_insn(struct brw_compile *p, int opcode) { struct gen8_instruction *insn; assert(p->nr_insn + 1 < BRW_EU_MAX_INSN); insn = memcpy(&p->store[p->nr_insn++], p->current, sizeof(*insn)); __gen8_set_opcode(insn, opcode); return insn; } static void gen8_math(struct brw_compile *p, struct brw_reg dst, unsigned function, unsigned saturate, unsigned msg_reg_nr, struct brw_reg src, unsigned data_type, unsigned precision) { struct gen8_instruction *insn = gen8_next_insn(p, BRW_OPCODE_MATH); assert(dst.file == BRW_GENERAL_REGISTER_FILE); assert(src.file == BRW_GENERAL_REGISTER_FILE); assert(dst.hstride == BRW_HORIZONTAL_STRIDE_1); assert(src.hstride == BRW_HORIZONTAL_STRIDE_1); /* Source modifiers are ignored for extended math instructions. */ assert(!src.negate); assert(!src.abs); if (function != BRW_MATH_FUNCTION_INT_DIV_QUOTIENT && function != BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER) { assert(src.type == BRW_REGISTER_TYPE_F); } /* Math is the same ISA format as other opcodes, except that CondModifier * becomes FC[3:0] and ThreadCtrl becomes FC[5:4]. */ __gen8_set_cond_modifier(insn, function); __gen8_set_saturate(insn, saturate); __gen8_set_dst(p, insn, dst); __gen8_set_src0(insn, src); __gen8_set_src1(insn, brw_null_reg()); } static inline void gen8_math_invert(struct brw_compile *p, struct brw_reg dst, struct brw_reg src) { gen8_math(p, dst, BRW_MATH_FUNCTION_INV, BRW_MATH_SATURATE_NONE, 0, src, BRW_MATH_PRECISION_FULL, BRW_MATH_DATA_VECTOR); } /* Helpers for regular instructions: */ static inline struct gen8_instruction *gen8_alu1(struct brw_compile *p, unsigned opcode, struct brw_reg dst, struct brw_reg src) { struct gen8_instruction *insn = gen8_next_insn(p, opcode); __gen8_set_dst(p, insn, dst); __gen8_set_src0(insn, src); return insn; } static inline struct gen8_instruction *gen8_alu2(struct brw_compile *p, unsigned opcode, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) { struct gen8_instruction *insn = gen8_next_insn(p, opcode); __gen8_set_dst(p, insn, dst); __gen8_set_src0(insn, src0); __gen8_set_src1(insn, src1); return insn; } #define ALU1(OP) \ static inline struct gen8_instruction *gen8_##OP(struct brw_compile *p, \ struct brw_reg dst, \ struct brw_reg src0) \ { \ return gen8_alu1(p, BRW_OPCODE_##OP, dst, src0); \ } #define ALU2(OP) \ static inline struct gen8_instruction *gen8_##OP(struct brw_compile *p, \ struct brw_reg dst, \ struct brw_reg src0, \ struct brw_reg src1) \ { \ return gen8_alu2(p, BRW_OPCODE_##OP, dst, src0, src1); \ } static inline struct gen8_instruction *gen8_ADD(struct brw_compile *p, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) { /* 6.2.2: add */ if (src0.type == BRW_REGISTER_TYPE_F || (src0.file == BRW_IMMEDIATE_VALUE && src0.type == BRW_REGISTER_TYPE_VF)) { assert(src1.type != BRW_REGISTER_TYPE_UD); assert(src1.type != BRW_REGISTER_TYPE_D); } if (src1.type == BRW_REGISTER_TYPE_F || (src1.file == BRW_IMMEDIATE_VALUE && src1.type == BRW_REGISTER_TYPE_VF)) { assert(src0.type != BRW_REGISTER_TYPE_UD); assert(src0.type != BRW_REGISTER_TYPE_D); } return gen8_alu2(p, BRW_OPCODE_ADD, dst, src0, src1); } static inline struct gen8_instruction *gen8_MUL(struct brw_compile *p, struct brw_reg dst, struct brw_reg src0, struct brw_reg src1) { /* 6.32.38: mul */ if (src0.type == BRW_REGISTER_TYPE_D || src0.type == BRW_REGISTER_TYPE_UD || src1.type == BRW_REGISTER_TYPE_D || src1.type == BRW_REGISTER_TYPE_UD) { assert(dst.type != BRW_REGISTER_TYPE_F); } if (src0.type == BRW_REGISTER_TYPE_F || (src0.file == BRW_IMMEDIATE_VALUE && src0.type == BRW_REGISTER_TYPE_VF)) { assert(src1.type != BRW_REGISTER_TYPE_UD); assert(src1.type != BRW_REGISTER_TYPE_D); } if (src1.type == BRW_REGISTER_TYPE_F || (src1.file == BRW_IMMEDIATE_VALUE && src1.type == BRW_REGISTER_TYPE_VF)) { assert(src0.type != BRW_REGISTER_TYPE_UD); assert(src0.type != BRW_REGISTER_TYPE_D); } assert(src0.file != BRW_ARCHITECTURE_REGISTER_FILE || src0.nr != BRW_ARF_ACCUMULATOR); assert(src1.file != BRW_ARCHITECTURE_REGISTER_FILE || src1.nr != BRW_ARF_ACCUMULATOR); return gen8_alu2(p, BRW_OPCODE_MUL, dst, src0, src1); } ALU1(MOV); ALU2(SEL); ALU1(NOT); ALU2(AND); ALU2(OR); ALU2(XOR); ALU2(SHR); ALU2(SHL); ALU2(RSR); ALU2(RSL); ALU2(ASR); ALU1(FRC); ALU1(RNDD); ALU2(MAC); ALU2(MACH); ALU1(LZD); ALU2(DP4); ALU2(DPH); ALU2(DP3); ALU2(DP2); ALU2(LINE); ALU2(PLN); ALU1(RNDZ); ALU1(RNDE); #undef ALU1 #undef ALU2 static void gen8_set_compression_control(struct brw_compile *p, enum brw_compression compression_control) { unsigned v; p->compressed = compression_control == BRW_COMPRESSION_COMPRESSED; switch (compression_control) { default: assert(0); case BRW_COMPRESSION_NONE: v = GEN6_COMPRESSION_1Q; break; case BRW_COMPRESSION_2NDHALF: v = GEN6_COMPRESSION_2Q; break; case BRW_COMPRESSION_COMPRESSED: v = GEN6_COMPRESSION_1H; break; } __gen8_set_cmpt_control((struct gen8_instruction *)p->current, v); } static inline void gen8_set_mask_control(struct brw_compile *p, unsigned value) { __gen8_set_mask_control((struct gen8_instruction *)p->current, value); } static inline void gen8_set_saturate(struct brw_compile *p, unsigned value) { __gen8_set_saturate((struct gen8_instruction *)p->current, value); } static inline void gen8_set_acc_write_control(struct brw_compile *p, unsigned value) { __gen8_set_acc_wr_control((struct gen8_instruction *)p->current, value); } static void gen8_SAMPLE(struct brw_compile *p, struct brw_reg dst, unsigned msg_reg_nr, unsigned binding_table_index, unsigned sampler, unsigned writemask, unsigned msg_type, unsigned response_length, unsigned msg_length, bool header_present, unsigned simd_mode) { struct brw_reg src0 = brw_message_reg(msg_reg_nr); assert(writemask); if (writemask != WRITEMASK_XYZW) { writemask = ~writemask & WRITEMASK_XYZW; brw_push_insn_state(p); gen8_set_compression_control(p, BRW_COMPRESSION_NONE); gen8_set_mask_control(p, BRW_MASK_DISABLE); gen8_MOV(p, __retype_ud(src0), __retype_ud(brw_vec8_grf(0,0))); gen8_MOV(p, get_element_ud(src0, 2), brw_imm_ud(writemask << 12)); brw_pop_insn_state(p); } { struct gen8_instruction *insn; insn = gen8_next_insn(p, BRW_OPCODE_SEND); __gen8_set_pred_control(insn, 0); /* XXX */ __gen8_set_cmpt_control(insn, GEN6_COMPRESSION_1Q); __gen8_set_dst(p, insn, dst); __gen8_set_src0(insn, src0); __gen8_set_sampler_message(insn, binding_table_index, sampler, msg_type, response_length, msg_length, header_present, simd_mode); } } /* shader logic */ static void wm_affine_st(struct brw_compile *p, int dw, int channel, int msg) { int uv; if (dw == 16) { gen8_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); uv = 6; } else { gen8_set_compression_control(p, BRW_COMPRESSION_NONE); uv = 4; } uv += 2*channel; msg++; gen8_PLN(p, brw_message_reg(msg), brw_vec1_grf(uv, 0), brw_vec8_grf(2, 0)); msg += dw/8; gen8_PLN(p, brw_message_reg(msg), brw_vec1_grf(uv, 4), brw_vec8_grf(2, 0)); } static inline unsigned simd(int dw) { return dw == 16 ? BRW_SAMPLER_SIMD_MODE_SIMD16 : BRW_SAMPLER_SIMD_MODE_SIMD8; } static inline struct brw_reg sample_result(int dw, int result) { return brw_reg(BRW_GENERAL_REGISTER_FILE, result, 0, BRW_REGISTER_TYPE_UW, dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8, dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); } static int wm_sample(struct brw_compile *p, int dw, int channel, int msg, int result) { int len = dw == 16 ? 4 : 2; gen8_SAMPLE(p, sample_result(dw, result), ++msg, channel+1, channel, WRITEMASK_XYZW, 0, 2*len, len, false, simd(dw)); return result; } static int wm_sample__alpha(struct brw_compile *p, int dw, int channel, int msg, int result) { int mlen, rlen; if (dw == 8) { mlen = 3; rlen = 1; } else { mlen = 5; rlen = 2; } gen8_SAMPLE(p, sample_result(dw, result), msg, channel+1, channel, WRITEMASK_W, 0, rlen, mlen, true, simd(dw)); return result; } static int wm_affine(struct brw_compile *p, int dw, int channel, int msg, int result) { wm_affine_st(p, dw, channel, msg); return wm_sample(p, dw, channel, msg, result); } static int wm_affine__alpha(struct brw_compile *p, int dw, int channel, int msg, int result) { wm_affine_st(p, dw, channel, msg); return wm_sample__alpha(p, dw, channel, msg, result); } static inline struct brw_reg null_result(int dw) { return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_NULL, 0, BRW_REGISTER_TYPE_UW, dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8, dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); } static void fb_write(struct brw_compile *p, int dw) { struct gen8_instruction *insn; unsigned msg_control, msg_len; struct brw_reg src0; if (dw == 16) { msg_control = BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE; msg_len = 8; } else { msg_control = BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01; msg_len = 4; } msg_control |= 1 << 4; /* Last Render Target */ /* The execution mask is ignored for render target writes. */ insn = gen8_next_insn(p, BRW_OPCODE_SEND); __gen8_set_pred_control(insn, 0); __gen8_set_cmpt_control(insn, GEN6_COMPRESSION_1Q); src0 = brw_message_reg(2); __gen8_set_dst(p, insn, null_result(dw)); __gen8_set_src0(insn, src0); __gen8_set_dp_message(insn, GEN6_SFID_DATAPORT_RENDER_CACHE, 0, GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE, msg_control, msg_len, 0, false, true); } static void wm_write__mask(struct brw_compile *p, int dw, int src, int mask) { int n; if (dw == 8) { gen8_set_compression_control(p, BRW_COMPRESSION_NONE); for (n = 0; n < 4; n++) gen8_MUL(p, brw_message_reg(2 + n), brw_vec8_grf(src + n, 0), brw_vec8_grf(mask, 0)); } else { gen8_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); for (n = 0; n < 4; n++) gen8_MUL(p, brw_message_reg(2 + 2*n), brw_vec8_grf(src + 2*n, 0), brw_vec8_grf(mask, 0)); } fb_write(p, dw); } static void wm_write__opacity(struct brw_compile *p, int dw, int src, int mask) { int n; if (dw == 8) { gen8_set_compression_control(p, BRW_COMPRESSION_NONE); for (n = 0; n < 4; n++) gen8_MUL(p, brw_message_reg(2 + n), brw_vec8_grf(src + n, 0), brw_vec1_grf(mask, 3)); } else { gen8_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); for (n = 0; n < 4; n++) gen8_MUL(p, brw_message_reg(2 + 2*n), brw_vec8_grf(src + 2*n, 0), brw_vec1_grf(mask, 3)); } fb_write(p, dw); } static void wm_write__mask_ca(struct brw_compile *p, int dw, int src, int mask) { int n; if (dw == 8) { gen8_set_compression_control(p, BRW_COMPRESSION_NONE); for (n = 0; n < 4; n++) gen8_MUL(p, brw_message_reg(2 + n), brw_vec8_grf(src + n, 0), brw_vec8_grf(mask + n, 0)); } else { gen8_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); for (n = 0; n < 4; n++) gen8_MUL(p, brw_message_reg(2 + 2*n), brw_vec8_grf(src + 2*n, 0), brw_vec8_grf(mask + 2*n, 0)); } fb_write(p, dw); } static void gen8_compile_init(struct brw_compile *p) { struct gen8_instruction *insn = memset(p->current, 0, sizeof(*insn)); COMPILE_TIME_ASSERT(sizeof(*insn) == sizeof(*p->current)); __gen8_set_mask_control(insn, BRW_MASK_ENABLE); __gen8_set_saturate(insn, 0); __gen8_set_cmpt_control(insn, GEN6_COMPRESSION_1Q); //__gen8_set_pred_control(insn, 0xf); } bool gen8_wm_kernel__affine(struct brw_compile *p, int dispatch) { gen8_compile_init(p); wm_affine(p, dispatch, 0, 10, MRF_HACK_START+2); fb_write(p, dispatch); return true; } bool gen8_wm_kernel__affine_mask(struct brw_compile *p, int dispatch) { int src, mask; gen8_compile_init(p); src = wm_affine(p, dispatch, 0, 1, 12); mask = wm_affine__alpha(p, dispatch, 1, 6, 20); wm_write__mask(p, dispatch, src, mask); return true; } bool gen8_wm_kernel__affine_mask_ca(struct brw_compile *p, int dispatch) { int src, mask; gen8_compile_init(p); src = wm_affine(p, dispatch, 0, 1, 12); mask = wm_affine(p, dispatch, 1, 6, 20); wm_write__mask_ca(p, dispatch, src, mask); return true; } bool gen8_wm_kernel__affine_mask_sa(struct brw_compile *p, int dispatch) { int src, mask; gen8_compile_init(p); src = wm_affine__alpha(p, dispatch, 0, 1, 12); mask = wm_affine(p, dispatch, 1, 6, 16); wm_write__mask(p, dispatch, mask, src); return true; } /* Projective variants */ static void wm_projective_st(struct brw_compile *p, int dw, int channel, int msg) { int uv; gen8_compile_init(p); if (dw == 16) { gen8_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); uv = 6; } else { gen8_set_compression_control(p, BRW_COMPRESSION_NONE); uv = 4; } uv += 2*channel; msg++; /* First compute 1/z */ gen8_PLN(p, brw_vec8_grf(30, 0), brw_vec1_grf(uv+1, 0), brw_vec8_grf(2, 0)); if (dw == 16) { gen8_set_compression_control(p, BRW_COMPRESSION_NONE); gen8_math_invert(p, brw_vec8_grf(30, 0), brw_vec8_grf(30, 0)); gen8_math_invert(p, brw_vec8_grf(31, 0), brw_vec8_grf(31, 0)); gen8_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); } else gen8_math_invert(p, brw_vec8_grf(30, 0), brw_vec8_grf(30, 0)); gen8_PLN(p, brw_vec8_grf(26, 0), brw_vec1_grf(uv, 0), brw_vec8_grf(2, 0)); gen8_PLN(p, brw_vec8_grf(28, 0), brw_vec1_grf(uv, 4), brw_vec8_grf(2, 0)); gen8_MUL(p, brw_message_reg(msg), brw_vec8_grf(26, 0), brw_vec8_grf(30, 0)); gen8_MUL(p, brw_message_reg(msg + dw/8), brw_vec8_grf(28, 0), brw_vec8_grf(30, 0)); } static int wm_projective(struct brw_compile *p, int dw, int channel, int msg, int result) { gen8_compile_init(p); wm_projective_st(p, dw, channel, msg); return wm_sample(p, dw, channel, msg, result); } static int wm_projective__alpha(struct brw_compile *p, int dw, int channel, int msg, int result) { gen8_compile_init(p); wm_projective_st(p, dw, channel, msg); return wm_sample__alpha(p, dw, channel, msg, result); } bool gen8_wm_kernel__projective(struct brw_compile *p, int dispatch) { gen8_compile_init(p); wm_projective(p, dispatch, 0, 10, MRF_HACK_START+2); fb_write(p, dispatch); return true; } bool gen8_wm_kernel__projective_mask(struct brw_compile *p, int dispatch) { int src, mask; gen8_compile_init(p); src = wm_projective(p, dispatch, 0, 1, 12); mask = wm_projective__alpha(p, dispatch, 1, 6, 20); wm_write__mask(p, dispatch, src, mask); return true; } bool gen8_wm_kernel__projective_mask_ca(struct brw_compile *p, int dispatch) { int src, mask; gen8_compile_init(p); src = wm_projective(p, dispatch, 0, 1, 12); mask = wm_projective(p, dispatch, 1, 6, 20); wm_write__mask_ca(p, dispatch, src, mask); return true; } bool gen8_wm_kernel__projective_mask_sa(struct brw_compile *p, int dispatch) { int src, mask; gen8_compile_init(p); src = wm_projective__alpha(p, dispatch, 0, 1, 12); mask = wm_projective(p, dispatch, 1, 6, 16); wm_write__mask(p, dispatch, mask, src); return true; } bool gen8_wm_kernel__affine_opacity(struct brw_compile *p, int dispatch) { int src, mask; gen8_compile_init(p); src = wm_affine(p, dispatch, 0, 1, 12); mask = dispatch == 16 ? 8 : 6; wm_write__opacity(p, dispatch, src, mask); return true; } bool gen8_wm_kernel__projective_opacity(struct brw_compile *p, int dispatch) { int src, mask; gen8_compile_init(p); mask = dispatch == 16 ? 8 : 6; src = wm_projective(p, dispatch, 0, 1, 12); wm_write__opacity(p, dispatch, src, mask); return true; } xf86-video-intel-2.99.917/src/sna/gen2_render.h0000664000175000017500000007015412244635610015654 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef GEN2_RENDER_H #define GEN2_RENDER_H #define CMD_3D (0x3<<29) #define PRIM3D_INLINE (CMD_3D | (0x1f<<24)) #define PRIM3D_TRILIST (0x0<<18) #define PRIM3D_TRISTRIP (0x1<<18) #define PRIM3D_TRISTRIP_RVRSE (0x2<<18) #define PRIM3D_TRIFAN (0x3<<18) #define PRIM3D_POLY (0x4<<18) #define PRIM3D_LINELIST (0x5<<18) #define PRIM3D_LINESTRIP (0x6<<18) #define PRIM3D_RECTLIST (0x7<<18) #define PRIM3D_POINTLIST (0x8<<18) #define PRIM3D_DIB (0x9<<18) #define PRIM3D_CLEAR_RECT (0xa<<18) #define PRIM3D_ZONE_INIT (0xd<<18) #define PRIM3D_MASK (0x1f<<18) #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) #define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) #define AA_LINE_ECAAR_WIDTH_0_5 0 #define AA_LINE_ECAAR_WIDTH_1_0 (1<<14) #define AA_LINE_ECAAR_WIDTH_2_0 (2<<14) #define AA_LINE_ECAAR_WIDTH_4_0 (3<<14) #define AA_LINE_REGION_WIDTH_ENABLE (1<<8) #define AA_LINE_REGION_WIDTH_0_5 0 #define AA_LINE_REGION_WIDTH_1_0 (1<<6) #define AA_LINE_REGION_WIDTH_2_0 (2<<6) #define AA_LINE_REGION_WIDTH_4_0 (3<<6) #define AA_LINE_ENABLE ((1<<1) | 1) #define AA_LINE_DISABLE (1<<1) #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) /* Dword 1 */ #define BUF_3D_ID_COLOR_BACK (0x3<<24) #define BUF_3D_ID_DEPTH (0x7<<24) #define BUF_3D_USE_FENCE (1<<23) #define BUF_3D_TILED_SURFACE (1<<22) #define BUF_3D_TILE_WALK_X 0 #define BUF_3D_TILE_WALK_Y (1<<21) #define BUF_3D_PITCH(x) (((x)/4)<<2) /* Dword 2 */ #define BUF_3D_ADDR(x) ((x) & ~0x3) #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16)) #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \ ((0x90+(stage))<<16)) #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) #define _3DSTATE_DFLT_SPECULAR_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) /* Dword 1 */ #define DSTORG_HORT_BIAS(x) ((x)<<20) #define DSTORG_VERT_BIAS(x) ((x)<<16) #define COLOR_4_2_2_CHNL_WRT_ALL 0 #define COLOR_4_2_2_CHNL_WRT_Y (1<<12) #define COLOR_4_2_2_CHNL_WRT_CR (2<<12) #define COLOR_4_2_2_CHNL_WRT_CB (3<<12) #define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) #define COLR_BUF_8BIT 0 #define COLR_BUF_RGB555 (1<<8) #define COLR_BUF_RGB565 (2<<8) #define COLR_BUF_ARGB8888 (3<<8) #define COLR_BUF_ARGB4444 (8<<8) #define COLR_BUF_ARGB1555 (9<<8) #define DEPTH_IS_Z 0 #define DEPTH_IS_W (1<<6) #define DEPTH_FRMT_16_FIXED 0 #define DEPTH_FRMT_16_FLOAT (1<<2) #define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) #define DEPTH_FRMT_24_FLOAT_8_OTHER (3<<2) #define VERT_LINE_STRIDE_1 (1<<1) #define VERT_LINE_STRIDE_0 0 #define VERT_LINE_STRIDE_OFS_1 1 #define VERT_LINE_STRIDE_OFS_0 0 #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) /* Dword 1 */ #define DRAW_RECT_DIS_DEPTH_OFS (1<<30) #define DRAW_DITHER_OFS_X(x) ((x)<<26) #define DRAW_DITHER_OFS_Y(x) ((x)<<24) /* Dword 2 */ #define DRAW_YMIN(x) ((x)<<16) #define DRAW_XMIN(x) (x) /* Dword 3 */ #define DRAW_YMAX(x) ((x)<<16) #define DRAW_XMAX(x) (x) /* Dword 4 */ #define DRAW_YORG(x) ((x)<<16) #define DRAW_XORG(x) (x) #define _3DSTATE_ENABLES_1_CMD (CMD_3D|(0x3<<24)) #define ENABLE_LOGIC_OP_MASK ((1<<23)|(1<<22)) #define ENABLE_LOGIC_OP ((1<<23)|(1<<22)) #define DISABLE_LOGIC_OP (1<<23) #define ENABLE_STENCIL_TEST ((1<<21)|(1<<20)) #define DISABLE_STENCIL_TEST (1<<21) #define ENABLE_DEPTH_BIAS ((1<<11)|(1<<10)) #define DISABLE_DEPTH_BIAS (1<<11) #define ENABLE_SPEC_ADD_MASK ((1<<9)|(1<<8)) #define ENABLE_SPEC_ADD ((1<<9)|(1<<8)) #define DISABLE_SPEC_ADD (1<<9) #define ENABLE_DIS_FOG_MASK ((1<<7)|(1<<6)) #define ENABLE_FOG ((1<<7)|(1<<6)) #define DISABLE_FOG (1<<7) #define ENABLE_DIS_ALPHA_TEST_MASK ((1<<5)|(1<<4)) #define ENABLE_ALPHA_TEST ((1<<5)|(1<<4)) #define DISABLE_ALPHA_TEST (1<<5) #define ENABLE_DIS_CBLEND_MASK ((1<<3)|(1<<2)) #define ENABLE_COLOR_BLEND ((1<<3)|(1<<2)) #define DISABLE_COLOR_BLEND (1<<3) #define ENABLE_DIS_DEPTH_TEST_MASK ((1<<1)|1) #define ENABLE_DEPTH_TEST ((1<<1)|1) #define DISABLE_DEPTH_TEST (1<<1) /* _3DSTATE_ENABLES_2, p138 */ #define _3DSTATE_ENABLES_2_CMD (CMD_3D|(0x4<<24)) #define ENABLE_STENCIL_WRITE ((1<<21)|(1<<20)) #define DISABLE_STENCIL_WRITE (1<<21) #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) #define DISABLE_TEX_CACHE (1<<17) #define ENABLE_DITHER ((1<<9)|(1<<8)) #define DISABLE_DITHER (1<<9) #define ENABLE_COLOR_MASK (1<<10) #define WRITEMASK_ALPHA (1<<7) #define WRITEMASK_ALPHA_SHIFT 7 #define WRITEMASK_RED (1<<6) #define WRITEMASK_RED_SHIFT 6 #define WRITEMASK_GREEN (1<<5) #define WRITEMASK_GREEN_SHIFT 5 #define WRITEMASK_BLUE (1<<4) #define WRITEMASK_BLUE_SHIFT 4 #define WRITEMASK_MASK ((1<<4)|(1<<5)|(1<<6)|(1<<7)) #define ENABLE_COLOR_WRITE ((1<<3)|(1<<2)) #define DISABLE_COLOR_WRITE (1<<3) #define ENABLE_DIS_DEPTH_WRITE_MASK 0x3 #define ENABLE_DEPTH_WRITE ((1<<1)|1) #define DISABLE_DEPTH_WRITE (1<<1) /* _3DSTATE_FOG_COLOR, p139 */ #define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) #define FOG_COLOR_RED(x) ((x)<<16) #define FOG_COLOR_GREEN(x) ((x)<<8) #define FOG_COLOR_BLUE(x) (x) /* _3DSTATE_FOG_MODE, p140 */ #define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) /* Dword 1 */ #define FOGFUNC_ENABLE (1<<31) #define FOGFUNC_VERTEX 0 #define FOGFUNC_PIXEL_EXP (1<<28) #define FOGFUNC_PIXEL_EXP2 (2<<28) #define FOGFUNC_PIXEL_LINEAR (3<<28) #define FOGSRC_INDEX_Z (1<<27) #define FOGSRC_INDEX_W ((1<<27)|(1<<25)) #define FOG_LINEAR_CONST (1<<24) #define FOG_CONST_1(x) ((x)<<4) #define ENABLE_FOG_DENSITY (1<<23) /* Dword 2 */ #define FOG_CONST_2(x) (x) /* Dword 3 */ #define FOG_DENSITY(x) (x) /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p142 */ #define _3DSTATE_INDPT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) #define ENABLE_INDPT_ALPHA_BLEND ((1<<23)|(1<<22)) #define DISABLE_INDPT_ALPHA_BLEND (1<<23) #define ALPHA_BLENDFUNC_MASK 0x3f0000 #define ENABLE_ALPHA_BLENDFUNC (1<<21) #define ABLENDFUNC_ADD 0 #define ABLENDFUNC_SUB (1<<16) #define ABLENDFUNC_RVSE_SUB (2<<16) #define ABLENDFUNC_MIN (3<<16) #define ABLENDFUNC_MAX (4<<16) #define SRC_DST_ABLEND_MASK 0xfff #define ENABLE_SRC_ABLEND_FACTOR (1<<11) #define SRC_ABLEND_FACT(x) ((x)<<6) #define ENABLE_DST_ABLEND_FACTOR (1<<5) #define DST_ABLEND_FACT(x) (x) #define BLENDFACTOR_ZERO 0x01 #define BLENDFACTOR_ONE 0x02 #define BLENDFACTOR_SRC_COLR 0x03 #define BLENDFACTOR_INV_SRC_COLR 0x04 #define BLENDFACTOR_SRC_ALPHA 0x05 #define BLENDFACTOR_INV_SRC_ALPHA 0x06 #define BLENDFACTOR_DST_ALPHA 0x07 #define BLENDFACTOR_INV_DST_ALPHA 0x08 #define BLENDFACTOR_DST_COLR 0x09 #define BLENDFACTOR_INV_DST_COLR 0x0a #define BLENDFACTOR_SRC_ALPHA_SATURATE 0x0b #define BLENDFACTOR_CONST_COLOR 0x0c #define BLENDFACTOR_INV_CONST_COLOR 0x0d #define BLENDFACTOR_CONST_ALPHA 0x0e #define BLENDFACTOR_INV_CONST_ALPHA 0x0f #define BLENDFACTOR_MASK 0x0f /* _3DSTATE_MAP_BLEND_ARG, p152 */ #define _3DSTATE_MAP_BLEND_ARG_CMD(stage) (CMD_3D|(0x0e<<24)|((stage)<<20)) #define TEXPIPE_COLOR 0 #define TEXPIPE_ALPHA (1<<18) #define TEXPIPE_KILL (2<<18) #define TEXBLEND_ARG0 0 #define TEXBLEND_ARG1 (1<<15) #define TEXBLEND_ARG2 (2<<15) #define TEXBLEND_ARG3 (3<<15) #define TEXBLENDARG_MODIFY_PARMS (1<<6) #define TEXBLENDARG_REPLICATE_ALPHA (1<<5) #define TEXBLENDARG_INV_ARG (1<<4) #define TEXBLENDARG_ONE 0 #define TEXBLENDARG_FACTOR 0x01 #define TEXBLENDARG_ACCUM 0x02 #define TEXBLENDARG_DIFFUSE 0x03 #define TEXBLENDARG_SPEC 0x04 #define TEXBLENDARG_CURRENT 0x05 #define TEXBLENDARG_TEXEL0 0x06 #define TEXBLENDARG_TEXEL1 0x07 #define TEXBLENDARG_TEXEL2 0x08 #define TEXBLENDARG_TEXEL3 0x09 #define TEXBLENDARG_FACTOR_N 0x0e /* _3DSTATE_MAP_BLEND_OP, p155 */ #define _3DSTATE_MAP_BLEND_OP_CMD(stage) (CMD_3D|(0x0d<<24)|((stage)<<20)) #if 0 # define TEXPIPE_COLOR 0 # define TEXPIPE_ALPHA (1<<18) # define TEXPIPE_KILL (2<<18) #endif #define ENABLE_TEXOUTPUT_WRT_SEL (1<<17) #define TEXOP_OUTPUT_CURRENT 0 #define TEXOP_OUTPUT_ACCUM (1<<15) #define ENABLE_TEX_CNTRL_STAGE ((1<<12)|(1<<11)) #define DISABLE_TEX_CNTRL_STAGE (1<<12) #define TEXOP_SCALE_SHIFT 9 #define TEXOP_SCALE_1X (0 << TEXOP_SCALE_SHIFT) #define TEXOP_SCALE_2X (1 << TEXOP_SCALE_SHIFT) #define TEXOP_SCALE_4X (2 << TEXOP_SCALE_SHIFT) #define TEXOP_MODIFY_PARMS (1<<8) #define TEXOP_LAST_STAGE (1<<7) #define TEXBLENDOP_KILLPIXEL 0x02 #define TEXBLENDOP_ARG1 0x01 #define TEXBLENDOP_ARG2 0x02 #define TEXBLENDOP_MODULATE 0x03 #define TEXBLENDOP_ADD 0x06 #define TEXBLENDOP_ADDSIGNED 0x07 #define TEXBLENDOP_BLEND 0x08 #define TEXBLENDOP_BLEND_AND_ADD 0x09 #define TEXBLENDOP_SUBTRACT 0x0a #define TEXBLENDOP_DOT3 0x0b #define TEXBLENDOP_DOT4 0x0c #define TEXBLENDOP_MODULATE_AND_ADD 0x0d #define TEXBLENDOP_MODULATE_2X_AND_ADD 0x0e #define TEXBLENDOP_MODULATE_4X_AND_ADD 0x0f /* _3DSTATE_MAP_BUMP_TABLE, p160 TODO */ /* _3DSTATE_MAP_COLOR_CHROMA_KEY, p161 TODO */ #define _3DSTATE_MAP_COORD_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8c<<16)) #define DISABLE_TEX_TRANSFORM (1<<28) #define TEXTURE_SET(x) (x<<29) #define _3DSTATE_VERTEX_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8b<<16)) #define DISABLE_VIEWPORT_TRANSFORM (1<<31) #define DISABLE_PERSPECTIVE_DIVIDE (1<<29) /* _3DSTATE_MAP_COORD_SET_BINDINGS, p162 */ #define _3DSTATE_MAP_COORD_SETBIND_CMD (CMD_3D|(0x1d<<24)|(0x02<<16)) #define TEXBIND_MASK3 ((1<<15)|(1<<14)|(1<<13)|(1<<12)) #define TEXBIND_MASK2 ((1<<11)|(1<<10)|(1<<9)|(1<<8)) #define TEXBIND_MASK1 ((1<<7)|(1<<6)|(1<<5)|(1<<4)) #define TEXBIND_MASK0 ((1<<3)|(1<<2)|(1<<1)|1) #define TEXBIND_SET3(x) ((x)<<12) #define TEXBIND_SET2(x) ((x)<<8) #define TEXBIND_SET1(x) ((x)<<4) #define TEXBIND_SET0(x) (x) #define TEXCOORDSRC_KEEP 0 #define TEXCOORDSRC_DEFAULT 0x01 #define TEXCOORDSRC_VTXSET_0 0x08 #define TEXCOORDSRC_VTXSET_1 0x09 #define TEXCOORDSRC_VTXSET_2 0x0a #define TEXCOORDSRC_VTXSET_3 0x0b #define TEXCOORDSRC_VTXSET_4 0x0c #define TEXCOORDSRC_VTXSET_5 0x0d #define TEXCOORDSRC_VTXSET_6 0x0e #define TEXCOORDSRC_VTXSET_7 0x0f #define MAP_UNIT(unit) ((unit)<<16) #define MAP_UNIT_MASK (0x7<<16) /* _3DSTATE_MAP_COORD_SETS, p164 */ #define _3DSTATE_MAP_COORD_SET_CMD (CMD_3D|(0x1c<<24)|(0x01<<19)) #define TEXCOORD_SET(n) ((n)<<16) #define ENABLE_TEXCOORD_PARAMS (1<<15) #define TEXCOORDS_ARE_NORMAL (1<<14) #define TEXCOORDS_ARE_IN_TEXELUNITS 0 #define TEXCOORDTYPE_CARTESIAN 0 #define TEXCOORDTYPE_HOMOGENEOUS (1<<11) #define TEXCOORDTYPE_VECTOR (2<<11) #define TEXCOORDTYPE_MASK (0x7<<11) #define ENABLE_ADDR_V_CNTL (1<<7) #define ENABLE_ADDR_U_CNTL (1<<3) #define TEXCOORD_ADDR_V_MODE(x) ((x)<<4) #define TEXCOORD_ADDR_U_MODE(x) (x) #define TEXCOORDMODE_WRAP 0 #define TEXCOORDMODE_MIRROR 1 #define TEXCOORDMODE_CLAMP 2 #define TEXCOORDMODE_WRAP_SHORTEST 3 #define TEXCOORDMODE_CLAMP_BORDER 4 #define TEXCOORD_ADDR_V_MASK 0x70 #define TEXCOORD_ADDR_U_MASK 0x7 /* _3DSTATE_MAP_CUBE, p168 TODO */ #define _3DSTATE_MAP_CUBE (CMD_3D|(0x1c<<24)|(0x0a<<19)) #define CUBE_NEGX_ENABLE (1<<5) #define CUBE_POSX_ENABLE (1<<4) #define CUBE_NEGY_ENABLE (1<<3) #define CUBE_POSY_ENABLE (1<<2) #define CUBE_NEGZ_ENABLE (1<<1) #define CUBE_POSZ_ENABLE (1<<0) #define _3DSTATE_MAP_INFO_CMD (CMD_3D|(0x1d<<24)|(0x0<<16)|3) #define TEXMAP_INDEX(x) ((x)<<28) #define MAP_SURFACE_8BIT (1<<24) #define MAP_SURFACE_16BIT (2<<24) #define MAP_SURFACE_32BIT (3<<24) #define MAP_FORMAT_2D (0) #define MAP_FORMAT_3D_CUBE (1<<11) /* _3DSTATE_MODES_1, p190 */ #define _3DSTATE_MODES_1_CMD (CMD_3D|(0x08<<24)) #define BLENDFUNC_MASK 0x3f0000 #define ENABLE_COLR_BLND_FUNC (1<<21) #define BLENDFUNC_ADD 0 #define BLENDFUNC_SUB (1<<16) #define BLENDFUNC_RVRSE_SUB (2<<16) #define BLENDFUNC_MIN (3<<16) #define BLENDFUNC_MAX (4<<16) #define SRC_DST_BLND_MASK 0xfff #define ENABLE_SRC_BLND_FACTOR (1<<11) #define ENABLE_DST_BLND_FACTOR (1<<5) #define SRC_BLND_FACT(x) ((x)<<6) #define DST_BLND_FACT(x) (x) /* _3DSTATE_MODES_2, p192 */ #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) #define ENABLE_GLOBAL_DEPTH_BIAS (1<<22) #define GLOBAL_DEPTH_BIAS(x) ((x)<<14) #define ENABLE_ALPHA_TEST_FUNC (1<<13) #define ENABLE_ALPHA_REF_VALUE (1<<8) #define ALPHA_TEST_FUNC(x) ((x)<<9) #define ALPHA_REF_VALUE(x) (x) #define ALPHA_TEST_REF_MASK 0x3fff /* _3DSTATE_MODES_3, p193 */ #define _3DSTATE_MODES_3_CMD (CMD_3D|(0x02<<24)) #define DEPTH_TEST_FUNC_MASK 0x1f0000 #define ENABLE_DEPTH_TEST_FUNC (1<<20) /* Uses COMPAREFUNC */ #define DEPTH_TEST_FUNC(x) ((x)<<16) #define ENABLE_ALPHA_SHADE_MODE (1<<11) #define ENABLE_FOG_SHADE_MODE (1<<9) #define ENABLE_SPEC_SHADE_MODE (1<<7) #define ENABLE_COLOR_SHADE_MODE (1<<5) #define ALPHA_SHADE_MODE(x) ((x)<<10) #define FOG_SHADE_MODE(x) ((x)<<8) #define SPEC_SHADE_MODE(x) ((x)<<6) #define COLOR_SHADE_MODE(x) ((x)<<4) #define CULLMODE_MASK 0xf #define ENABLE_CULL_MODE (1<<3) #define CULLMODE_BOTH 0 #define CULLMODE_NONE 1 #define CULLMODE_CW 2 #define CULLMODE_CCW 3 #define SHADE_MODE_LINEAR 0 #define SHADE_MODE_FLAT 0x1 /* _3DSTATE_MODES_4, p195 */ #define _3DSTATE_MODES_4_CMD (CMD_3D|(0x16<<24)) #define ENABLE_LOGIC_OP_FUNC (1<<23) #define LOGIC_OP_FUNC(x) ((x)<<18) #define LOGICOP_MASK ((1<<18)|(1<<19)|(1<<20)|(1<<21)) #define LOGICOP_CLEAR 0 #define LOGICOP_NOR 0x1 #define LOGICOP_AND_INV 0x2 #define LOGICOP_COPY_INV 0x3 #define LOGICOP_AND_RVRSE 0x4 #define LOGICOP_INV 0x5 #define LOGICOP_XOR 0x6 #define LOGICOP_NAND 0x7 #define LOGICOP_AND 0x8 #define LOGICOP_EQUIV 0x9 #define LOGICOP_NOOP 0xa #define LOGICOP_OR_INV 0xb #define LOGICOP_COPY 0xc #define LOGICOP_OR_RVRSE 0xd #define LOGICOP_OR 0xe #define LOGICOP_SET 0xf #define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) #define ENABLE_STENCIL_TEST_MASK (1<<17) #define STENCIL_TEST_MASK(x) ((x)<<8) #define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) #define ENABLE_STENCIL_WRITE_MASK (1<<16) #define STENCIL_WRITE_MASK(x) ((x)&0xff) /* _3DSTATE_MODES_5, p196 */ #define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) #define ENABLE_SPRITE_POINT_TEX (1<<23) #define SPRITE_POINT_TEX_ON (1<<22) #define PIPELINE_FLUSH_RENDER_CACHE (1<<18) #define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16) #define FIXED_LINE_WIDTH_MASK 0xfc00 #define ENABLE_FIXED_LINE_WIDTH (1<<15) #define FIXED_LINE_WIDTH(x) ((x)<<10) #define FIXED_POINT_WIDTH_MASK 0x3ff #define ENABLE_FIXED_POINT_WIDTH (1<<9) #define FIXED_POINT_WIDTH(x) (x) /* _3DSTATE_RASTERIZATION_RULES, p198 */ #define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) #define ENABLE_POINT_RASTER_RULE (1<<15) #define OGL_POINT_RASTER_RULE (1<<13) #define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) #define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) #define ENABLE_TRI_STRIP_PROVOKE_VRTX (1<<2) #define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) #define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) #define TRI_STRIP_PROVOKE_VRTX(x) (x) /* _3DSTATE_SCISSOR_ENABLE, p200 */ #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) #define ENABLE_SCISSOR_RECT ((1<<1) | 1) #define DISABLE_SCISSOR_RECT (1<<1) /* _3DSTATE_SCISSOR_RECTANGLE_0, p201 */ #define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) /* Dword 1 */ #define SCISSOR_RECT_0_YMIN(x) ((x)<<16) #define SCISSOR_RECT_0_XMIN(x) (x) /* Dword 2 */ #define SCISSOR_RECT_0_YMAX(x) ((x)<<16) #define SCISSOR_RECT_0_XMAX(x) (x) /* _3DSTATE_STENCIL_TEST, p202 */ #define _3DSTATE_STENCIL_TEST_CMD (CMD_3D|(0x09<<24)) #define ENABLE_STENCIL_PARMS (1<<23) #define STENCIL_OPS_MASK (0xffc000) #define STENCIL_FAIL_OP(x) ((x)<<20) #define STENCIL_PASS_DEPTH_FAIL_OP(x) ((x)<<17) #define STENCIL_PASS_DEPTH_PASS_OP(x) ((x)<<14) #define ENABLE_STENCIL_TEST_FUNC_MASK ((1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)) #define ENABLE_STENCIL_TEST_FUNC (1<<13) /* Uses COMPAREFUNC */ #define STENCIL_TEST_FUNC(x) ((x)<<9) #define STENCIL_REF_VALUE_MASK ((1<<8)|0xff) #define ENABLE_STENCIL_REF_VALUE (1<<8) #define STENCIL_REF_VALUE(x) (x) /* _3DSTATE_VERTEX_FORMAT, p204 */ #define _3DSTATE_VFT0_CMD (CMD_3D|(0x05<<24)) #define VFT0_POINT_WIDTH (1<<12) #define VFT0_TEX_COUNT_MASK (7<<8) #define VFT0_TEX_COUNT_SHIFT 8 #define VFT0_TEX_COUNT(x) ((x)<<8) #define VFT0_SPEC (1<<7) #define VFT0_DIFFUSE (1<<6) #define VFT0_DEPTH_OFFSET (1<<5) #define VFT0_XYZ (1<<1) #define VFT0_XYZW (2<<1) #define VFT0_XY (3<<1) #define VFT0_XYW (4<<1) #define VFT0_XYZW_MASK (7<<1) /* _3DSTATE_VERTEX_FORMAT_2, p206 */ #define _3DSTATE_VERTEX_FORMAT_2_CMD (CMD_3D|(0x0a<<24)) #define VFT1_TEX7_FMT(x) ((x)<<14) #define VFT1_TEX6_FMT(x) ((x)<<12) #define VFT1_TEX5_FMT(x) ((x)<<10) #define VFT1_TEX4_FMT(x) ((x)<<8) #define VFT1_TEX3_FMT(x) ((x)<<6) #define VFT1_TEX2_FMT(x) ((x)<<4) #define VFT1_TEX1_FMT(x) ((x)<<2) #define VFT1_TEX0_FMT(x) (x) #define VFT1_TEX0_MASK 3 #define VFT1_TEX1_SHIFT 2 #define TEXCOORDFMT_2D 0 #define TEXCOORDFMT_3D 1 #define TEXCOORDFMT_4D 2 #define TEXCOORDFMT_1D 3 /*New stuff picked up along the way */ #define MLC_LOD_BIAS_MASK ((1<<7)-1) /* _3DSTATE_VERTEX_TRANSFORM, p207 */ #define _3DSTATE_VERTEX_TRANS_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|0) #define _3DSTATE_VERTEX_TRANS_MTX_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|6) /* Dword 1 */ #define ENABLE_VIEWPORT_TRANSFORM ((1<<31)|(1<<30)) #define DISABLE_VIEWPORT_TRANSFORM (1<<31) #define ENABLE_PERSP_DIVIDE ((1<<29)|(1<<28)) #define DISABLE_PERSP_DIVIDE (1<<29) #define VRTX_TRANS_LOAD_MATRICES 0x7421 #define VRTX_TRANS_NO_LOAD_MATRICES 0x0000 /* Dword 2 -> 7 are matrix elements */ /* _3DSTATE_W_STATE, p209 */ #define _3DSTATE_W_STATE_CMD (CMD_3D|(0x1d<<24)|(0x8d<<16)|1) /* Dword 1 */ #define MAGIC_W_STATE_DWORD1 0x00000008 /* Dword 2 */ #define WFAR_VALUE(x) (x) /* Stipple command, carried over from the i810, apparently: */ #define _3DSTATE_STIPPLE (CMD_3D|(0x1d<<24)|(0x83<<16)) #define ST1_ENABLE (1<<16) #define ST1_MASK (0xffff) #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D|(0x1d<<24)|(0x04<<16)) #define I1_LOAD_S(n) (1<<((n)+4)) #define S3_POINT_WIDTH_SHIFT 23 #define S3_LINE_WIDTH_SHIFT 19 #define S3_ALPHA_SHADE_MODE_SHIFT 18 #define S3_FOG_SHADE_MODE_SHIFT 17 #define S3_SPEC_SHADE_MODE_SHIFT 16 #define S3_COLOR_SHADE_MODE_SHIFT 15 #define S3_CULL_MODE_SHIFT 13 #define S3_CULLMODE_BOTH (0) #define S3_CULLMODE_NONE (1<<13) #define S3_CULLMODE_CW (2<<13) #define S3_CULLMODE_CCW (3<<13) #define S3_POINT_WIDTH_PRESENT (1<<12) #define S3_SPEC_FOG_PRESENT (1<<11) #define S3_DIFFUSE_PRESENT (1<<10) #define S3_DEPTH_OFFSET_PRESENT (1<<9) #define S3_POSITION_SHIFT 6 #define S3_VERTEXHAS_XYZ (1<<6) #define S3_VERTEXHAS_XYZW (2<<6) #define S3_VERTEXHAS_XY (3<<6) #define S3_VERTEXHAS_XYW (4<<6) #define S3_ENABLE_SPEC_ADD (1<<5) #define S3_ENABLE_FOG (1<<4) #define S3_ENABLE_LOCAL_DEPTH_BIAS (1<<3) #define S3_ENABLE_SPRITE_POINT (1<<1) #define S3_ENABLE_ANTIALIASING 1 #define S7_ENABLE_LOGIC_OP (1<<0) #define S8_ENABLE_ALPHA_TEST (1<<31) #define S8_ALPHA_TEST_FUNC_SHIFT 28 #define S8_ALPHA_REFVALUE_SHIFT 20 #define S8_ENABLE_DEPTH_TEST (1<<19) #define S8_DEPTH_TEST_FUNC_SHIFT 16 #define S8_ENABLE_COLOR_BLEND (1<<15) #define S8_COLOR_BLEND_FUNC_SHIFT 12 #define S8_BLENDFUNC_ADD (0) #define S8_BLENDFUNC_SUB (1<<12) #define S8_BLENDFUNC_RVRSE_SUB (2<<12) #define S8_BLENDFUNC_MIN (3<<12) #define S8_BLENDFUNC_MAX (4<<12) #define S8_SRC_BLEND_FACTOR_SHIFT 8 #define S8_DST_BLEND_FACTOR_SHIFT 4 #define S8_ENABLE_DEPTH_BUFFER_WRITE (1<<3) #define S8_ENABLE_COLOR_BUFFER_WRITE (1<<2) #define _3DSTATE_LOAD_STATE_IMMEDIATE_2 (CMD_3D|(0x1d<<24)|(0x03<<16)) #define LOAD_TEXTURE_MAP(x) (1<<((x)+11)) #define LOAD_TEXTURE_BLEND_STAGE(x) (1<<((x)+7)) #define LOAD_GLOBAL_COLOR_FACTOR (1<<6) #define TM0S0_ADDRESS_MASK 0xfffffffc #define TM0S0_USE_FENCE (1<<1) #define TM0S1_HEIGHT_SHIFT 21 #define TM0S1_WIDTH_SHIFT 10 #define TM0S1_PALETTE_SELECT (1<<9) #define TM0S1_MAPSURF_FORMAT_MASK (0x7 << 6) #define TM0S1_MAPSURF_FORMAT_SHIFT 6 #define MAPSURF_8BIT_INDEXED (0<<6) #define MAPSURF_8BIT (1<<6) #define MAPSURF_16BIT (2<<6) #define MAPSURF_32BIT (3<<6) #define MAPSURF_411 (4<<6) #define MAPSURF_422 (5<<6) #define MAPSURF_COMPRESSED (6<<6) #define MAPSURF_4BIT_INDEXED (7<<6) #define TM0S1_MT_FORMAT_MASK (0x7 << 3) #define TM0S1_MT_FORMAT_SHIFT 3 #define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */ #define MT_8BIT_IDX_RGB565 (0<<3) /* SURFACE_8BIT_INDEXED */ #define MT_8BIT_IDX_ARGB1555 (1<<3) #define MT_8BIT_IDX_ARGB4444 (2<<3) #define MT_8BIT_IDX_AY88 (3<<3) #define MT_8BIT_IDX_ABGR8888 (4<<3) #define MT_8BIT_IDX_BUMP_88DVDU (5<<3) #define MT_8BIT_IDX_BUMP_655LDVDU (6<<3) #define MT_8BIT_IDX_ARGB8888 (7<<3) #define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */ #define MT_8BIT_L8 (1<<3) #define MT_8BIT_A8 (4<<3) #define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */ #define MT_16BIT_ARGB1555 (1<<3) #define MT_16BIT_ARGB4444 (2<<3) #define MT_16BIT_AY88 (3<<3) #define MT_16BIT_DIB_ARGB1555_8888 (4<<3) #define MT_16BIT_BUMP_88DVDU (5<<3) #define MT_16BIT_BUMP_655LDVDU (6<<3) #define MT_16BIT_DIB_RGB565_8888 (7<<3) #define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ #define MT_32BIT_ABGR8888 (1<<3) #define MT_32BIT_XRGB8888 (2<<3) #define MT_32BIT_XBGR8888 (3<<3) #define MT_32BIT_BUMP_XLDVDU_8888 (6<<3) #define MT_32BIT_DIB_8888 (7<<3) #define MT_411_YUV411 (0<<3) /* SURFACE_411 */ #define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */ #define MT_422_YCRCB_NORMAL (1<<3) #define MT_422_YCRCB_SWAPUV (2<<3) #define MT_422_YCRCB_SWAPUVY (3<<3) #define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */ #define MT_COMPRESS_DXT2_3 (1<<3) #define MT_COMPRESS_DXT4_5 (2<<3) #define MT_COMPRESS_FXT1 (3<<3) #define TM0S1_COLORSPACE_CONVERSION (1 << 2) #define TM0S1_TILED_SURFACE (1 << 1) #define TM0S1_TILE_WALK (1 << 0) #define TM0S2_PITCH_SHIFT 21 #define TM0S2_CUBE_FACE_ENA_SHIFT 15 #define TM0S2_CUBE_FACE_ENA_MASK (1<<15) #define TM0S2_MAP_FORMAT (1<<14) #define TM0S2_MAP_2D (0<<14) #define TM0S2_MAP_3D_CUBE (1<<14) #define TM0S2_VERTICAL_LINE_STRIDE (1<<13) #define TM0S2_VERITCAL_LINE_STRIDE_OFF (1<<12) #define TM0S2_OUTPUT_CHAN_SHIFT 10 #define TM0S2_OUTPUT_CHAN_MASK (3<<10) #define TM0S3_MIP_FILTER_MASK (0x3<<30) #define TM0S3_MIP_FILTER_SHIFT 30 #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #define TM0S3_MAG_FILTER_MASK (0x3<<28) #define TM0S3_MAG_FILTER_SHIFT 28 #define TM0S3_MIN_FILTER_MASK (0x3<<26) #define TM0S3_MIN_FILTER_SHIFT 26 #define FILTER_NEAREST 0 #define FILTER_LINEAR 1 #define FILTER_ANISOTROPIC 2 #define TM0S3_LOD_BIAS_SHIFT 17 #define TM0S3_LOD_BIAS_MASK (0x1ff<<17) #define TM0S3_MAX_MIP_SHIFT 9 #define TM0S3_MAX_MIP_MASK (0xff<<9) #define TM0S3_MIN_MIP_SHIFT 3 #define TM0S3_MIN_MIP_MASK (0x3f<<3) #define TM0S3_KILL_PIXEL (1<<2) #define TM0S3_KEYED_FILTER (1<<1) #define TM0S3_CHROMA_KEY (1<<0) /* _3DSTATE_MAP_TEXEL_STREAM, p188 */ #define _3DSTATE_MAP_TEX_STREAM_CMD (CMD_3D|(0x1c<<24)|(0x05<<19)) #define DISABLE_TEX_STREAM_BUMP (1<<12) #define ENABLE_TEX_STREAM_BUMP ((1<<12)|(1<<11)) #define TEX_MODIFY_UNIT_0 0 #define TEX_MODIFY_UNIT_1 (1<<8) #define ENABLE_TEX_STREAM_COORD_SET (1<<7) #define TEX_STREAM_COORD_SET(x) ((x)<<4) #define ENABLE_TEX_STREAM_MAP_IDX (1<<3) #define TEX_STREAM_MAP_IDX(x) (x) #define FLUSH_MAP_CACHE (1<<0) #define _3DSTATE_MAP_FILTER_CMD (CMD_3D|(0x1c<<24)|(0x02<<19)) #define FILTER_TEXMAP_INDEX(x) ((x) << 16) #define MAG_MODE_FILTER_ENABLE (1 << 5) #define MIN_MODE_FILTER_ENABLE (1 << 2) #define MAG_MAPFILTER_NEAREST (0 << 3) #define MAG_MAPFILTER_LINEAR (1 << 3) #define MAG_MAPFILTER_ANISOTROPIC (2 << 3) #define MIN_MAPFILTER_NEAREST (0) #define MIN_MAPFILTER_LINEAR (1) #define MIN_MAPFILTER_ANISOTROPIC (2) #define ENABLE_KEYS (1<<15) #define DISABLE_COLOR_KEY 0 #define DISABLE_CHROMA_KEY 0 #define DISABLE_KILL_PIXEL 0 #define ENABLE_MIP_MODE_FILTER (1 << 9) #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #define TB0C_LAST_STAGE (1 << 31) #define TB0C_RESULT_SCALE_1X (0 << 29) #define TB0C_RESULT_SCALE_2X (1 << 29) #define TB0C_RESULT_SCALE_4X (2 << 29) #define TB0C_OP_ARG1 (1 << 25) #define TB0C_OP_MODULATE (3 << 25) #define TB0C_OUTPUT_WRITE_CURRENT (0 << 24) #define TB0C_OUTPUT_WRITE_ACCUM (1 << 24) #define TB0C_ARG3_REPLICATE_ALPHA (1<<23) #define TB0C_ARG3_INVERT (1<<22) #define TB0C_ARG3_SEL_XXX #define TB0C_ARG2_REPLICATE_ALPHA (1<<17) #define TB0C_ARG2_INVERT (1<<16) #define TB0C_ARG2_SEL_ONE (0 << 12) #define TB0C_ARG2_SEL_DIFFUSE (3 << 12) #define TB0C_ARG2_SEL_SPECULAR (4 << 12) #define TB0C_ARG2_SEL_FACTOR (1 << 12) #define TB0C_ARG2_SEL_TEXEL0 (6 << 12) #define TB0C_ARG2_SEL_TEXEL1 (7 << 12) #define TB0C_ARG2_SEL_TEXEL2 (8 << 12) #define TB0C_ARG2_SEL_TEXEL3 (9 << 12) #define TB0C_ARG1_REPLICATE_ALPHA (1<<11) #define TB0C_ARG1_INVERT (1<<10) #define TB0C_ARG1_SEL_ONE (0 << 6) #define TB0C_ARG1_SEL_DIFFUSE (3 << 6) #define TB0C_ARG1_SEL_SPECULAR (4 << 6) #define TB0C_ARG1_SEL_TEXEL0 (6 << 6) #define TB0C_ARG1_SEL_TEXEL1 (7 << 6) #define TB0C_ARG1_SEL_TEXEL2 (8 << 6) #define TB0C_ARG1_SEL_TEXEL3 (9 << 6) #define TB0C_ARG0_REPLICATE_ALPHA (1<<5) #define TB0C_ARG0_SEL_XXX #define TB0A_CTR_STAGE_ENABLE (1<<31) #define TB0A_RESULT_SCALE_1X (0 << 29) #define TB0A_RESULT_SCALE_2X (1 << 29) #define TB0A_RESULT_SCALE_4X (2 << 29) #define TB0A_OP_ARG1 (1 << 25) #define TB0A_OP_MODULATE (3 << 25) #define TB0A_OUTPUT_WRITE_CURRENT (0<<24) #define TB0A_OUTPUT_WRITE_ACCUM (1<<24) #define TB0A_CTR_STAGE_SEL_BITS_XXX #define TB0A_ARG3_SEL_XXX #define TB0A_ARG3_INVERT (1<<17) #define TB0A_ARG2_INVERT (1<<16) #define TB0A_ARG2_SEL_ONE (0 << 12) #define TB0A_ARG2_SEL_DIFFUSE (3 << 12) #define TB0A_ARG2_SEL_SPECULAR (4 << 12) #define TB0A_ARG2_SEL_TEXEL0 (6 << 12) #define TB0A_ARG2_SEL_TEXEL1 (7 << 12) #define TB0A_ARG2_SEL_TEXEL2 (8 << 12) #define TB0A_ARG2_SEL_TEXEL3 (9 << 12) #define TB0A_ARG1_INVERT (1<<10) #define TB0A_ARG1_SEL_ONE (0 << 6) #define TB0A_ARG1_SEL_DIFFUSE (3 << 6) #define TB0A_ARG1_SEL_SPECULAR (4 << 6) #define TB0A_ARG1_SEL_TEXEL0 (6 << 6) #define TB0A_ARG1_SEL_TEXEL1 (7 << 6) #define TB0A_ARG1_SEL_TEXEL2 (8 << 6) #define TB0A_ARG1_SEL_TEXEL3 (9 << 6) #endif /* GEN2_RENDER_H */ xf86-video-intel-2.99.917/src/sna/sna.h0000664000175000017500000007642612445274641014261 00000000000000/************************************************************************** Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. Copyright © 2002 David Dawes All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * Authors: * Keith Whitwell * David Dawes * */ #ifndef _SNA_H_ #define _SNA_H_ #include #include #include #include #if XF86_CRTC_VERSION >= 5 #define HAS_PIXMAP_SHARING 1 #endif #include #include #include #include #include #include #include #include "../compat-api.h" #include #include #if HAVE_DRI2 #include #endif #if HAVE_DRI3 #include #endif #if HAVE_UDEV #include #endif #include #include #include "xassert.h" #include "compiler.h" #include "debug.h" #define DEBUG_NO_BLT 0 #define DEBUG_FLUSH_BATCH 0 #define TEST_ALL 0 #define TEST_ACCEL (TEST_ALL || 0) #define TEST_BATCH (TEST_ALL || 0) #define TEST_BLT (TEST_ALL || 0) #define TEST_COMPOSITE (TEST_ALL || 0) #define TEST_DAMAGE (TEST_ALL || 0) #define TEST_GRADIENT (TEST_ALL || 0) #define TEST_GLYPHS (TEST_ALL || 0) #define TEST_IO (TEST_ALL || 0) #define TEST_KGEM (TEST_ALL || 0) #define TEST_RENDER (TEST_ALL || 0) #include "intel_driver.h" #include "intel_list.h" #include "kgem.h" #include "sna_damage.h" #include "sna_render.h" #include "fb/fb.h" struct sna_cursor; struct sna_crtc; struct sna_client { struct list events; int is_compositor; /* only 4 bits used */ }; extern DevPrivateKeyRec sna_client_key; pure static inline struct sna_client *sna_client(ClientPtr client) { return __get_private(client, sna_client_key); } struct sna_cow { struct kgem_bo *bo; struct list list; int refcnt; }; struct sna_pixmap { PixmapPtr pixmap; struct kgem_bo *gpu_bo, *cpu_bo; struct sna_damage *gpu_damage, *cpu_damage; struct sna_cow *cow; void *ptr; #define PTR(ptr) ((void*)((uintptr_t)(ptr) & ~1)) bool (*move_to_gpu)(struct sna *, struct sna_pixmap *, unsigned); void *move_to_gpu_data; struct list flush_list; struct list cow_list; uint32_t stride; uint32_t clear_color; #define SOURCE_BIAS 4 uint8_t source_count; uint8_t pinned :4; #define PIN_SCANOUT 0x1 #define PIN_DRI2 0x2 #define PIN_DRI3 0x4 #define PIN_PRIME 0x8 uint8_t create :4; uint8_t mapped :2; #define MAPPED_NONE 0 #define MAPPED_GTT 1 #define MAPPED_CPU 2 uint8_t flush :2; uint8_t shm :1; uint8_t clear :1; uint8_t header :1; uint8_t cpu :1; }; #define IS_STATIC_PTR(ptr) ((uintptr_t)(ptr) & 1) #define MAKE_STATIC_PTR(ptr) ((void*)((uintptr_t)(ptr) | 1)) struct sna_glyph { PicturePtr atlas; struct sna_coordinate coordinate; uint16_t size, pos; pixman_image_t *image; }; static inline WindowPtr get_root_window(ScreenPtr screen) { #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,10,0,0,0) return screen->root; #else return WindowTable[screen->myNum]; #endif } static inline PixmapPtr get_window_pixmap(WindowPtr window) { assert(window); assert(window->drawable.type != DRAWABLE_PIXMAP); return fbGetWindowPixmap(window); } static inline PixmapPtr get_drawable_pixmap(DrawablePtr drawable) { assert(drawable); if (drawable->type == DRAWABLE_PIXMAP) return (PixmapPtr)drawable; else return get_window_pixmap((WindowPtr)drawable); } extern DevPrivateKeyRec sna_pixmap_key; pure static inline struct sna_pixmap *sna_pixmap(PixmapPtr pixmap) { return ((void **)__get_private(pixmap, sna_pixmap_key))[1]; } static inline struct sna_pixmap *sna_pixmap_from_drawable(DrawablePtr drawable) { return sna_pixmap(get_drawable_pixmap(drawable)); } struct sna_gc { long changes; long serial; const GCFuncs *old_funcs; void *priv; }; static inline struct sna_gc *sna_gc(GCPtr gc) { return (struct sna_gc *)__get_private(gc, sna_gc_key); } enum { FLUSH_TIMER = 0, THROTTLE_TIMER, EXPIRE_TIMER, #if DEBUG_MEMORY DEBUG_MEMORY_TIMER, #endif NUM_TIMERS }; struct sna { struct kgem kgem; ScrnInfoPtr scrn; struct intel_device *dev; unsigned flags; #define SNA_IS_SLAVED 0x1 #define SNA_IS_HOSTED 0x2 #define SNA_NO_WAIT 0x10 #define SNA_NO_FLIP 0x20 #define SNA_NO_VSYNC 0x40 #define SNA_TRIPLE_BUFFER 0x80 #define SNA_TEAR_FREE 0x100 #define SNA_FORCE_SHADOW 0x200 #define SNA_FLUSH_GTT 0x400 #define SNA_PERFORMANCE 0x1000 #define SNA_POWERSAVE 0x2000 #define SNA_REMOVE_OUTPUTS 0x4000 #define SNA_HAS_FLIP 0x10000 #define SNA_HAS_ASYNC_FLIP 0x20000 #define SNA_LINEAR_FB 0x40000 #define SNA_REPROBE 0x80000000 unsigned cpu_features; #define MMX 0x1 #define SSE 0x2 #define SSE2 0x4 #define SSE3 0x8 #define SSSE3 0x10 #define SSE4_1 0x20 #define SSE4_2 0x40 #define AVX 0x80 #define AVX2 0x100 unsigned watch_flush; struct timeval timer_tv; uint32_t timer_expire[NUM_TIMERS]; uint16_t timer_active; int vblank_interval; struct list flush_pixmaps; struct list active_pixmaps; PixmapPtr front; PixmapPtr freed_pixmap; struct sna_mode { DamagePtr shadow_damage; struct kgem_bo *shadow; unsigned front_active; unsigned shadow_active; unsigned flip_active; bool dirty; int max_crtc_width, max_crtc_height; RegionRec shadow_region; RegionRec shadow_cancel; struct list shadow_crtc; bool shadow_dirty; unsigned num_real_crtc; unsigned num_real_output; unsigned num_real_encoder; unsigned num_fake; unsigned serial; uint32_t *encoders; #if HAVE_UDEV struct udev_monitor *backlight_monitor; pointer backlight_handler; #endif Bool (*rrGetInfo)(ScreenPtr, Rotation *); } mode; struct { struct sna_cursor *cursors; xf86CursorInfoPtr info; CursorPtr ref; unsigned serial; uint32_t fg, bg; int size; int active; int last_x; int last_y; unsigned max_size; bool use_gtt; int num_stash; struct sna_cursor *stash; void *scratch; } cursor; struct sna_dri2 { bool available; bool open; #if HAVE_DRI2 void *flip_pending; unsigned client_count; #endif } dri2; struct sna_dri3 { bool available; bool open; #if HAVE_DRI3 SyncScreenCreateFenceFunc create_fence; struct list pixmaps; #endif } dri3; struct sna_present { bool available; bool open; #if HAVE_PRESENT #endif } present; struct sna_xv { XvAdaptorPtr adaptors; int num_adaptors; } xv; EntityInfoPtr pEnt; const struct intel_device_info *info; ScreenBlockHandlerProcPtr BlockHandler; ScreenWakeupHandlerProcPtr WakeupHandler; CloseScreenProcPtr CloseScreen; PicturePtr clear; struct { uint32_t fill_bo; uint32_t fill_pixel; uint32_t fill_alu; } blt_state; union { unsigned gt; struct gen2_render_state gen2; struct gen3_render_state gen3; struct gen4_render_state gen4; struct gen5_render_state gen5; struct gen6_render_state gen6; struct gen7_render_state gen7; struct gen8_render_state gen8; } render_state; /* Broken-out options. */ OptionInfoPtr Options; /* Driver phase/state information */ bool suspended; #if HAVE_UDEV struct udev_monitor *uevent_monitor; pointer uevent_handler; #endif struct { int fd; uint8_t offset; uint8_t remain; char event[256]; } acpi; struct sna_render render; #if DEBUG_MEMORY struct { int pixmap_allocs; int pixmap_cached; int cpu_bo_allocs; size_t shadow_pixels_bytes; size_t cpu_bo_bytes; } debug_memory; #endif }; bool sna_mode_pre_init(ScrnInfoPtr scrn, struct sna *sna); bool sna_mode_fake_init(struct sna *sna, int num_fake); bool sna_mode_wants_tear_free(struct sna *sna); void sna_mode_adjust_frame(struct sna *sna, int x, int y); extern void sna_mode_discover(struct sna *sna); extern void sna_mode_check(struct sna *sna); extern bool sna_mode_disable(struct sna *sna); extern void sna_mode_enable(struct sna *sna); extern void sna_mode_reset(struct sna *sna); extern int sna_mode_wakeup(struct sna *sna); extern void sna_mode_redisplay(struct sna *sna); extern void sna_shadow_set_crtc(struct sna *sna, xf86CrtcPtr crtc, struct kgem_bo *bo); extern void sna_shadow_steal_crtcs(struct sna *sna, struct list *list); extern void sna_shadow_unsteal_crtcs(struct sna *sna, struct list *list); extern void sna_shadow_unset_crtc(struct sna *sna, xf86CrtcPtr crtc); extern bool sna_pixmap_discard_shadow_damage(struct sna_pixmap *priv, const RegionRec *region); extern void sna_mode_set_primary(struct sna *sna); extern void sna_mode_close(struct sna *sna); extern void sna_mode_fini(struct sna *sna); extern void sna_crtc_config_notify(ScreenPtr screen); extern bool sna_cursors_init(ScreenPtr screen, struct sna *sna); typedef void (*sna_flip_handler_t)(struct drm_event_vblank *e, void *data); extern int sna_page_flip(struct sna *sna, struct kgem_bo *bo, sna_flip_handler_t handler, void *data); pure static inline struct sna * to_sna(ScrnInfoPtr scrn) { return (struct sna *)(scrn->driverPrivate); } pure static inline struct sna * to_sna_from_screen(ScreenPtr screen) { return to_sna(xf86ScreenToScrn(screen)); } pure static inline struct sna * to_sna_from_pixmap(PixmapPtr pixmap) { return ((void **)__get_private(pixmap, sna_pixmap_key))[0]; } pure static inline struct sna * to_sna_from_drawable(DrawablePtr drawable) { return to_sna_from_screen(drawable->pScreen); } static inline struct sna * to_sna_from_kgem(struct kgem *kgem) { return container_of(kgem, struct sna, kgem); } #ifndef ARRAY_SIZE #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) #endif #ifndef ALIGN #define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) #endif #ifndef MIN #define MIN(a,b) ((a) <= (b) ? (a) : (b)) #endif #ifndef MAX #define MAX(a,b) ((a) >= (b) ? (a) : (b)) #endif extern xf86CrtcPtr sna_covering_crtc(struct sna *sna, const BoxRec *box, xf86CrtcPtr desired); extern bool sna_wait_for_scanline(struct sna *sna, PixmapPtr pixmap, xf86CrtcPtr crtc, const BoxRec *clip); xf86CrtcPtr sna_mode_first_crtc(struct sna *sna); const struct ust_msc { uint64_t msc; int tv_sec; int tv_usec; } *sna_crtc_last_swap(xf86CrtcPtr crtc); uint64_t sna_crtc_record_swap(xf86CrtcPtr crtc, int tv_sec, int tv_usec, unsigned seq); static inline uint64_t sna_crtc_record_vblank(xf86CrtcPtr crtc, const union drm_wait_vblank *vbl) { return sna_crtc_record_swap(crtc, vbl->reply.tval_sec, vbl->reply.tval_usec, vbl->reply.sequence); } static inline uint64_t sna_crtc_record_event(xf86CrtcPtr crtc, struct drm_event_vblank *event) { return sna_crtc_record_swap(crtc, event->tv_sec, event->tv_usec, event->sequence); } static inline uint64_t ust64(int tv_sec, int tv_usec) { return (uint64_t)tv_sec * 1000000 + tv_usec; } #if HAVE_DRI2 bool sna_dri2_open(struct sna *sna, ScreenPtr pScreen); void sna_dri2_page_flip_handler(struct sna *sna, struct drm_event_vblank *event); void sna_dri2_vblank_handler(struct drm_event_vblank *event); void sna_dri2_pixmap_update_bo(struct sna *sna, PixmapPtr pixmap, struct kgem_bo *bo); void sna_dri2_decouple_window(WindowPtr win); void sna_dri2_destroy_window(WindowPtr win); void sna_dri2_close(struct sna *sna, ScreenPtr pScreen); #else static inline bool sna_dri2_open(struct sna *sna, ScreenPtr pScreen) { return false; } static inline void sna_dri2_page_flip_handler(struct sna *sna, struct drm_event_vblank *event) { } static inline void sna_dri2_vblank_handler(struct drm_event_vblank *event) { } static inline void sna_dri2_pixmap_update_bo(struct sna *sna, PixmapPtr pixmap, struct kgem_bo *bo) { } static inline void sna_dri2_decouple_window(WindowPtr win) { } static inline void sna_dri2_destroy_window(WindowPtr win) { } static inline void sna_dri2_close(struct sna *sna, ScreenPtr pScreen) { } #endif #if HAVE_DRI3 bool sna_dri3_open(struct sna *sna, ScreenPtr pScreen); void sna_dri3_close(struct sna *sna, ScreenPtr pScreen); #else static inline bool sna_dri3_open(struct sna *sna, ScreenPtr pScreen) { return false; } static inline void sna_dri3_close(struct sna *sna, ScreenPtr pScreen) { } #endif #if HAVE_PRESENT bool sna_present_open(struct sna *sna, ScreenPtr pScreen); void sna_present_update(struct sna *sna); void sna_present_close(struct sna *sna, ScreenPtr pScreen); void sna_present_vblank_handler(struct drm_event_vblank *event); #else static inline bool sna_present_open(struct sna *sna, ScreenPtr pScreen) { return false; } static inline void sna_present_update(struct sna *sna) { } static inline void sna_present_close(struct sna *sna, ScreenPtr pScreen) { } static inline void sna_present_vblank_handler(struct drm_event_vblank *event) { } #endif extern bool sna_crtc_set_sprite_rotation(xf86CrtcPtr crtc, uint32_t rotation); extern int sna_crtc_to_pipe(xf86CrtcPtr crtc); extern uint32_t sna_crtc_to_sprite(xf86CrtcPtr crtc); extern uint32_t sna_crtc_id(xf86CrtcPtr crtc); extern bool sna_crtc_is_on(xf86CrtcPtr crtc); extern bool sna_crtc_is_transformed(xf86CrtcPtr crtc); CARD32 sna_format_for_depth(int depth); CARD32 sna_render_format_for_depth(int depth); void sna_debug_flush(struct sna *sna); static inline bool get_window_deltas(PixmapPtr pixmap, int16_t *x, int16_t *y) { #ifdef COMPOSITE *x = -pixmap->screen_x; *y = -pixmap->screen_y; return pixmap->screen_x | pixmap->screen_y; #else *x = *y = 0; return false; #endif } static inline bool get_drawable_deltas(DrawablePtr drawable, PixmapPtr pixmap, int16_t *x, int16_t *y) { #ifdef COMPOSITE if (drawable->type == DRAWABLE_WINDOW) return get_window_deltas(pixmap, x, y); #endif *x = *y = 0; return false; } static inline int get_drawable_dx(DrawablePtr drawable) { #ifdef COMPOSITE if (drawable->type == DRAWABLE_WINDOW) return -get_drawable_pixmap(drawable)->screen_x; #endif return 0; } static inline int get_drawable_dy(DrawablePtr drawable) { #ifdef COMPOSITE if (drawable->type == DRAWABLE_WINDOW) return -get_drawable_pixmap(drawable)->screen_y; #endif return 0; } struct sna_pixmap *sna_pixmap_attach_to_bo(PixmapPtr pixmap, struct kgem_bo *bo); static inline bool sna_pixmap_is_scanout(struct sna *sna, PixmapPtr pixmap) { return (pixmap == sna->front && !sna->mode.shadow_active && (sna->flags & SNA_NO_WAIT) == 0); } static inline int sna_max_tile_copy_size(struct sna *sna, struct kgem_bo *src, struct kgem_bo *dst) { int min_object; int max_size; max_size = sna->kgem.aperture_high * PAGE_SIZE; max_size -= MAX(kgem_bo_size(src), kgem_bo_size(dst)); if (max_size <= 0) { DBG(("%s: tiles cannot fit into aperture\n", __FUNCTION__)); return 0; } if (max_size > sna->kgem.max_copy_tile_size) max_size = sna->kgem.max_copy_tile_size; min_object = MIN(kgem_bo_size(src), kgem_bo_size(dst)) / 2; if (max_size > min_object) max_size = min_object; if (max_size <= 4096) max_size = 0; DBG(("%s: using max tile size of %d\n", __FUNCTION__, max_size)); return max_size; } PixmapPtr sna_pixmap_create_upload(ScreenPtr screen, int width, int height, int depth, unsigned flags); PixmapPtr sna_pixmap_create_unattached(ScreenPtr screen, int width, int height, int depth); void sna_pixmap_destroy(PixmapPtr pixmap); #define assert_pixmap_map(pixmap, priv) do { \ assert(priv->mapped != MAPPED_NONE || pixmap->devPrivate.ptr == PTR(priv->ptr)); \ assert(priv->mapped != MAPPED_CPU || pixmap->devPrivate.ptr == MAP(priv->gpu_bo->map__cpu)); \ assert(priv->mapped != MAPPED_GTT || pixmap->devPrivate.ptr == priv->gpu_bo->map__gtt || pixmap->devPrivate.ptr == priv->gpu_bo->map__wc); \ } while (0) static inline void sna_pixmap_unmap(PixmapPtr pixmap, struct sna_pixmap *priv) { if (priv->mapped == MAPPED_NONE) { assert(pixmap->devPrivate.ptr == PTR(priv->ptr)); return; } DBG(("%s: pixmap=%ld dropping %s mapping\n", __FUNCTION__, pixmap->drawable.serialNumber, priv->mapped == MAPPED_CPU ? "cpu" : "gtt")); assert_pixmap_map(pixmap, priv); pixmap->devPrivate.ptr = PTR(priv->ptr); pixmap->devKind = priv->stride; priv->mapped = MAPPED_NONE; } bool sna_pixmap_undo_cow(struct sna *sna, struct sna_pixmap *priv, unsigned flags); #define MOVE_WRITE 0x1 #define MOVE_READ 0x2 #define MOVE_INPLACE_HINT 0x4 #define MOVE_ASYNC_HINT 0x8 #define MOVE_SOURCE_HINT 0x10 #define MOVE_WHOLE_HINT 0x20 #define __MOVE_FORCE 0x40 #define __MOVE_DRI 0x80 #define __MOVE_SCANOUT 0x100 #define __MOVE_TILED 0x200 #define __MOVE_PRIME 0x400 struct sna_pixmap * sna_pixmap_move_area_to_gpu(PixmapPtr pixmap, const BoxRec *box, unsigned int flags); struct sna_pixmap *sna_pixmap_move_to_gpu(PixmapPtr pixmap, unsigned flags); static inline struct sna_pixmap * sna_pixmap_force_to_gpu(PixmapPtr pixmap, unsigned flags) { /* Unlike move-to-gpu, we ignore wedged and always create the GPU bo */ DBG(("%s(pixmap=%ld, flags=%x)\n", __FUNCTION__, pixmap->drawable.serialNumber, flags)); return sna_pixmap_move_to_gpu(pixmap, flags | __MOVE_FORCE); } bool must_check _sna_pixmap_move_to_cpu(PixmapPtr pixmap, unsigned flags); static inline bool must_check sna_pixmap_move_to_cpu(PixmapPtr pixmap, unsigned flags) { if (flags == MOVE_READ) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv == NULL) return true; } return _sna_pixmap_move_to_cpu(pixmap, flags); } bool must_check sna_drawable_move_region_to_cpu(DrawablePtr drawable, RegionPtr region, unsigned flags); bool must_check sna_drawable_move_to_cpu(DrawablePtr drawable, unsigned flags); static inline bool must_check sna_drawable_move_to_gpu(DrawablePtr drawable, unsigned flags) { return sna_pixmap_move_to_gpu(get_drawable_pixmap(drawable), flags) != NULL; } void sna_add_flush_pixmap(struct sna *sna, struct sna_pixmap *priv, struct kgem_bo *bo); struct kgem_bo *sna_pixmap_change_tiling(PixmapPtr pixmap, uint32_t tiling); #define PREFER_GPU 0x1 #define FORCE_GPU 0x2 #define RENDER_GPU 0x4 #define IGNORE_DAMAGE 0x8 #define REPLACES 0x10 struct kgem_bo * sna_drawable_use_bo(DrawablePtr drawable, unsigned flags, const BoxRec *box, struct sna_damage ***damage); inline static int16_t bound(int16_t a, uint16_t b) { int v = (int)a + (int)b; if (v > MAXSHORT) return MAXSHORT; return v; } inline static int16_t clamp(int16_t a, int16_t b) { int v = (int)a + (int)b; if (v > MAXSHORT) return MAXSHORT; if (v < MINSHORT) return MINSHORT; return v; } static inline bool box_empty(const BoxRec *box) { return box->x2 <= box->x1 || box->y2 <= box->y1; } static inline bool box_covers_pixmap(PixmapPtr pixmap, const BoxRec *box) { int w = box->x2 - box->x1; int h = box->y2 - box->y1; return pixmap->drawable.width <= w && pixmap->drawable.height <= h; } static inline bool box_inplace(PixmapPtr pixmap, const BoxRec *box) { struct sna *sna = to_sna_from_pixmap(pixmap); return ((int)(box->x2 - box->x1) * (int)(box->y2 - box->y1) * pixmap->drawable.bitsPerPixel >> 12) >= sna->kgem.half_cpu_cache_pages; } static inline bool whole_pixmap_inplace(PixmapPtr pixmap) { struct sna *sna = to_sna_from_pixmap(pixmap); return ((int)pixmap->drawable.width * (int)pixmap->drawable.height * pixmap->drawable.bitsPerPixel >> 12) >= sna->kgem.half_cpu_cache_pages; } static inline bool region_subsumes_drawable(RegionPtr region, DrawablePtr drawable) { const BoxRec *extents; if (region->data) return false; extents = RegionExtents(region); return extents->x1 <= 0 && extents->y1 <= 0 && extents->x2 >= drawable->width && extents->y2 >= drawable->height; } static inline bool region_subsumes_pixmap(const RegionRec *region, PixmapPtr pixmap) { if (region->data) return false; return (region->extents.x2 - region->extents.x1 >= pixmap->drawable.width && region->extents.y2 - region->extents.y1 >= pixmap->drawable.height); } static inline bool region_subsumes_damage(const RegionRec *region, struct sna_damage *damage) { const BoxRec *re, *de; DBG(("%s?\n", __FUNCTION__)); assert(damage); re = ®ion->extents; de = &DAMAGE_PTR(damage)->extents; DBG(("%s: region (%d, %d), (%d, %d), damage (%d, %d), (%d, %d)\n", __FUNCTION__, re->x1, re->y1, re->x2, re->y2, de->x1, de->y1, de->x2, de->y2)); if (re->x2 < de->x2 || re->x1 > de->x1 || re->y2 < de->y2 || re->y1 > de->y1) { DBG(("%s: not contained\n", __FUNCTION__)); return false; } if (region->data == NULL) { DBG(("%s: singular region contains damage\n", __FUNCTION__)); return true; } return pixman_region_contains_rectangle((RegionPtr)region, (BoxPtr)de) == PIXMAN_REGION_IN; } static inline bool sna_drawable_is_clear(DrawablePtr d) { struct sna_pixmap *priv = sna_pixmap(get_drawable_pixmap(d)); return priv && priv->clear && priv->clear_color == 0; } static inline struct kgem_bo *__sna_pixmap_get_bo(PixmapPtr pixmap) { return sna_pixmap(pixmap)->gpu_bo; } static inline struct kgem_bo *__sna_drawable_peek_bo(DrawablePtr d) { struct sna_pixmap *priv = sna_pixmap(get_drawable_pixmap(d)); return priv ? priv->gpu_bo : NULL; } static inline struct kgem_bo *sna_pixmap_pin(PixmapPtr pixmap, unsigned flags) { struct sna_pixmap *priv; priv = sna_pixmap_force_to_gpu(pixmap, MOVE_READ); if (!priv) return NULL; priv->pinned |= flags; return priv->gpu_bo; } static inline bool _sna_transform_point(const PictTransform *transform, int64_t x, int64_t y, int64_t result[3]) { int j; for (j = 0; j < 3; j++) result[j] = (transform->matrix[j][0] * x + transform->matrix[j][1] * y + transform->matrix[j][2]); return result[2] != 0; } static inline void _sna_get_transformed_coordinates(int x, int y, const PictTransform *transform, float *x_out, float *y_out) { int64_t result[3]; _sna_transform_point(transform, x, y, result); *x_out = result[0] / (double)result[2]; *y_out = result[1] / (double)result[2]; } static inline void _sna_get_transformed_scaled(int x, int y, const PictTransform *transform, const float *sf, float *x_out, float *y_out) { *x_out = sf[0] * (transform->matrix[0][0] * x + transform->matrix[0][1] * y + transform->matrix[0][2]); *y_out = sf[1] * (transform->matrix[1][0] * x + transform->matrix[1][1] * y + transform->matrix[1][2]); } void sna_get_transformed_coordinates(int x, int y, const PictTransform *transform, float *x_out, float *y_out); void sna_get_transformed_coordinates_3d(int x, int y, const PictTransform *transform, float *x_out, float *y_out, float *z_out); bool sna_transform_is_affine(const PictTransform *t); bool sna_transform_is_translation(const PictTransform *t, pixman_fixed_t *tx, pixman_fixed_t *ty); bool sna_transform_is_integer_translation(const PictTransform *t, int16_t *tx, int16_t *ty); bool sna_transform_is_imprecise_integer_translation(const PictTransform *t, int filter, bool precise, int16_t *tx, int16_t *ty); static inline bool sna_affine_transform_is_rotation(const PictTransform *t) { assert(sna_transform_is_affine(t)); return t->matrix[0][1] | t->matrix[1][0]; } static inline bool sna_transform_equal(const PictTransform *a, const PictTransform *b) { if (a == b) return true; if (a == NULL || b == NULL) return false; return memcmp(a, b, sizeof(*a)) == 0; } static inline bool sna_picture_alphamap_equal(PicturePtr a, PicturePtr b) { if (a->alphaMap != b->alphaMap) return false; if (a->alphaMap) return false; return (a->alphaOrigin.x == b->alphaOrigin.x && a->alphaOrigin.y == b->alphaOrigin.y); } static inline bool wedged(struct sna *sna) { return unlikely(sna->kgem.wedged); } static inline bool can_render(struct sna *sna) { return likely(!sna->kgem.wedged && sna->render.prefer_gpu & PREFER_GPU_RENDER); } static inline uint32_t pixmap_size(PixmapPtr pixmap) { return (pixmap->drawable.height - 1) * pixmap->devKind + pixmap->drawable.width * pixmap->drawable.bitsPerPixel/8; } bool sna_accel_init(ScreenPtr sreen, struct sna *sna); void sna_accel_create(struct sna *sna); void sna_accel_block_handler(struct sna *sna, struct timeval **tv); void sna_accel_wakeup_handler(struct sna *sna); void sna_accel_watch_flush(struct sna *sna, int enable); void sna_accel_flush(struct sna *sna); void sna_accel_enter(struct sna *sna); void sna_accel_leave(struct sna *sna); void sna_accel_close(struct sna *sna); void sna_accel_free(struct sna *sna); void sna_copy_fbcon(struct sna *sna); bool sna_composite_create(struct sna *sna); void sna_composite_close(struct sna *sna); void sna_composite(CARD8 op, PicturePtr src, PicturePtr mask, PicturePtr dst, INT16 src_x, INT16 src_y, INT16 mask_x, INT16 mask_y, INT16 dst_x, INT16 dst_y, CARD16 width, CARD16 height); void sna_composite_fb(CARD8 op, PicturePtr src, PicturePtr mask, PicturePtr dst, RegionPtr region, INT16 src_x, INT16 src_y, INT16 mask_x, INT16 mask_y, INT16 dst_x, INT16 dst_y, CARD16 width, CARD16 height); void sna_composite_rectangles(CARD8 op, PicturePtr dst, xRenderColor *color, int num_rects, xRectangle *rects); void sna_composite_trapezoids(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int ntrap, xTrapezoid *traps); void sna_add_traps(PicturePtr picture, INT16 x, INT16 y, int n, xTrap *t); void sna_composite_triangles(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int ntri, xTriangle *tri); void sna_composite_tristrip(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int npoints, xPointFixed *points); void sna_composite_trifan(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int npoints, xPointFixed *points); bool sna_gradients_create(struct sna *sna); void sna_gradients_close(struct sna *sna); bool sna_glyphs_create(struct sna *sna); void sna_glyphs(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr mask, INT16 xSrc, INT16 ySrc, int nlist, GlyphListPtr list, GlyphPtr *glyphs); void sna_glyphs__shared(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr mask, INT16 src_x, INT16 src_y, int nlist, GlyphListPtr list, GlyphPtr *glyphs); void sna_glyph_unrealize(ScreenPtr screen, GlyphPtr glyph); void sna_glyphs_close(struct sna *sna); void sna_read_boxes(struct sna *sna, PixmapPtr dst, struct kgem_bo *src_bo, const BoxRec *box, int n); bool sna_write_boxes(struct sna *sna, PixmapPtr dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const void *src, int stride, int16_t src_dx, int16_t src_dy, const BoxRec *box, int n); bool sna_write_boxes__xor(struct sna *sna, PixmapPtr dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const void *src, int stride, int16_t src_dx, int16_t src_dy, const BoxRec *box, int nbox, uint32_t and, uint32_t or); bool sna_replace(struct sna *sna, PixmapPtr pixmap, const void *src, int stride); bool sna_replace__xor(struct sna *sna, PixmapPtr pixmap, const void *src, int stride, uint32_t and, uint32_t or); bool sna_compute_composite_extents(BoxPtr extents, PicturePtr src, PicturePtr mask, PicturePtr dst, INT16 src_x, INT16 src_y, INT16 mask_x, INT16 mask_y, INT16 dst_x, INT16 dst_y, CARD16 width, CARD16 height); bool sna_compute_composite_region(RegionPtr region, PicturePtr src, PicturePtr mask, PicturePtr dst, INT16 src_x, INT16 src_y, INT16 mask_x, INT16 mask_y, INT16 dst_x, INT16 dst_y, CARD16 width, CARD16 height); void memcpy_blt(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height); void memmove_box(const void *src, void *dst, int bpp, int32_t stride, const BoxRec *box, int dx, int dy); void memcpy_xor(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height, uint32_t and, uint32_t or); #define SNA_CREATE_FB 0x10 #define SNA_CREATE_SCRATCH 0x11 inline static bool is_power_of_two(unsigned x) { return (x & (x-1)) == 0; } inline static bool is_clipped(const RegionRec *r, const DrawableRec *d) { DBG(("%s: region[%d]x(%d, %d),(%d, %d) against drawable %dx%d\n", __FUNCTION__, region_num_rects(r), r->extents.x1, r->extents.y1, r->extents.x2, r->extents.y2, d->width, d->height)); return (r->data || r->extents.x2 - r->extents.x1 != d->width || r->extents.y2 - r->extents.y1 != d->height); } inline static bool box_intersect(BoxPtr a, const BoxRec *b) { if (a->x1 < b->x1) a->x1 = b->x1; if (a->x2 > b->x2) a->x2 = b->x2; if (a->x1 >= a->x2) return false; if (a->y1 < b->y1) a->y1 = b->y1; if (a->y2 > b->y2) a->y2 = b->y2; if (a->y1 >= a->y2) return false; return true; } unsigned sna_cpu_detect(void); char *sna_cpu_features_to_string(unsigned features, char *line); /* sna_acpi.c */ int sna_acpi_open(void); void sna_acpi_init(struct sna *sna); void _sna_acpi_wakeup(struct sna *sna); static inline void sna_acpi_wakeup(struct sna *sna, void *read_mask) { if (sna->acpi.fd >= 0 && FD_ISSET(sna->acpi.fd, (fd_set*)read_mask)) _sna_acpi_wakeup(sna); } void sna_acpi_fini(struct sna *sna); void sna_threads_init(void); int sna_use_threads (int width, int height, int threshold); void sna_threads_run(int id, void (*func)(void *arg), void *arg); void sna_threads_trap(int sig); void sna_threads_wait(void); void sna_threads_kill(void); void sna_image_composite(pixman_op_t op, pixman_image_t *src, pixman_image_t *mask, pixman_image_t *dst, int16_t src_x, int16_t src_y, int16_t mask_x, int16_t mask_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height); extern jmp_buf sigjmp[4]; extern volatile sig_atomic_t sigtrap; #define sigtrap_assert_inactive() assert(sigtrap == 0) #define sigtrap_assert_active() assert(sigtrap > 0 && sigtrap <= ARRAY_SIZE(sigjmp)) #define sigtrap_get() sigsetjmp(sigjmp[sigtrap++], 1) static inline void sigtrap_put(void) { sigtrap_assert_active(); --sigtrap; } #define RR_Rotate_All (RR_Rotate_0 | RR_Rotate_90 | RR_Rotate_180 | RR_Rotate_270) #define RR_Reflect_All (RR_Reflect_X | RR_Reflect_Y) #ifndef HAVE_GETLINE #include extern int getline(char **line, size_t *len, FILE *file); #endif #endif /* _SNA_H */ xf86-video-intel-2.99.917/src/sna/gen8_vertex.h0000664000175000017500000000052112400044327015700 00000000000000#ifndef GEN8_VERTEX_H #define GEN8_VERTEX_H #include "compiler.h" #include "sna.h" #include "sna_render.h" void gen8_vertex_align(struct sna *sna, const struct sna_composite_op *op); void gen8_vertex_flush(struct sna *sna); int gen8_vertex_finish(struct sna *sna); void gen8_vertex_close(struct sna *sna); #endif /* GEN8_VERTEX_H */ xf86-video-intel-2.99.917/src/sna/sna_damage.h0000664000175000017500000002171112432737457015547 00000000000000#ifndef SNA_DAMAGE_H #define SNA_DAMAGE_H #include #include "compiler.h" struct sna_damage { BoxRec extents; pixman_region16_t region; enum sna_damage_mode { DAMAGE_ADD = 0, DAMAGE_SUBTRACT, DAMAGE_ALL, } mode; int remain, dirty; BoxPtr box; struct { struct list list; int size; BoxRec box[8]; } embedded_box; }; #define DAMAGE_IS_ALL(ptr) (((uintptr_t)(ptr))&1) #define DAMAGE_MARK_ALL(ptr) ((struct sna_damage *)(((uintptr_t)(ptr))|1)) #define DAMAGE_PTR(ptr) ((struct sna_damage *)(((uintptr_t)(ptr))&~1)) #define DAMAGE_REGION(ptr) (&DAMAGE_PTR(ptr)->region) struct sna_damage *sna_damage_create(void); struct sna_damage *__sna_damage_all(struct sna_damage *damage, int width, int height); static inline struct sna_damage * _sna_damage_all(struct sna_damage *damage, int width, int height) { damage = __sna_damage_all(damage, width, height); return DAMAGE_MARK_ALL(damage); } static inline void sna_damage_all(struct sna_damage **damage, PixmapPtr pixmap) { if (!DAMAGE_IS_ALL(*damage)) *damage = _sna_damage_all(*damage, pixmap->drawable.width, pixmap->drawable.height); } struct sna_damage *_sna_damage_combine(struct sna_damage *l, struct sna_damage *r, int dx, int dy); static inline void sna_damage_combine(struct sna_damage **l, struct sna_damage *r, int dx, int dy) { assert(!DAMAGE_IS_ALL(*l)); *l = _sna_damage_combine(*l, DAMAGE_PTR(r), dx, dy); } fastcall struct sna_damage *_sna_damage_add(struct sna_damage *damage, RegionPtr region); static inline void sna_damage_add(struct sna_damage **damage, RegionPtr region) { assert(!DAMAGE_IS_ALL(*damage)); *damage = _sna_damage_add(*damage, region); } static inline bool sna_damage_add_to_pixmap(struct sna_damage **damage, RegionPtr region, PixmapPtr pixmap) { assert(!DAMAGE_IS_ALL(*damage)); if (region->data == NULL && region->extents.x2 - region->extents.x1 >= pixmap->drawable.width && region->extents.y2 - region->extents.y1 >= pixmap->drawable.height) { *damage = _sna_damage_all(*damage, pixmap->drawable.width, pixmap->drawable.height); return true; } else { *damage = _sna_damage_add(*damage, region); return false; } } fastcall struct sna_damage *_sna_damage_add_box(struct sna_damage *damage, const BoxRec *box); static inline void sna_damage_add_box(struct sna_damage **damage, const BoxRec *box) { assert(!DAMAGE_IS_ALL(*damage)); *damage = _sna_damage_add_box(*damage, box); } struct sna_damage *_sna_damage_add_boxes(struct sna_damage *damage, const BoxRec *box, int n, int16_t dx, int16_t dy); static inline void sna_damage_add_boxes(struct sna_damage **damage, const BoxRec *box, int n, int16_t dx, int16_t dy) { assert(!DAMAGE_IS_ALL(*damage)); *damage = _sna_damage_add_boxes(*damage, box, n, dx, dy); } struct sna_damage *_sna_damage_add_rectangles(struct sna_damage *damage, const xRectangle *r, int n, int16_t dx, int16_t dy); static inline void sna_damage_add_rectangles(struct sna_damage **damage, const xRectangle *r, int n, int16_t dx, int16_t dy) { if (damage) { assert(!DAMAGE_IS_ALL(*damage)); *damage = _sna_damage_add_rectangles(*damage, r, n, dx, dy); } } struct sna_damage *_sna_damage_add_points(struct sna_damage *damage, const DDXPointRec *p, int n, int16_t dx, int16_t dy); static inline void sna_damage_add_points(struct sna_damage **damage, const DDXPointRec *p, int n, int16_t dx, int16_t dy) { if (damage) { assert(!DAMAGE_IS_ALL(*damage)); *damage = _sna_damage_add_points(*damage, p, n, dx, dy); } } struct sna_damage *_sna_damage_is_all(struct sna_damage *damage, int width, int height); static inline bool sna_damage_is_all(struct sna_damage **_damage, int width, int height) { struct sna_damage *damage = *_damage; if (damage == NULL) return false; if (DAMAGE_IS_ALL(damage)) return true; switch (damage->mode) { case DAMAGE_ALL: assert(0); return true; case DAMAGE_SUBTRACT: return false; default: assert(0); case DAMAGE_ADD: if (damage->extents.x2 < width || damage->extents.x1 > 0) return false; if (damage->extents.y2 < height || damage->extents.y1 > 0) return false; damage = _sna_damage_is_all(damage, width, height); if (damage->mode == DAMAGE_ALL) { *_damage = DAMAGE_MARK_ALL(damage); return true; } else { *_damage = damage; return false; } } } fastcall struct sna_damage *_sna_damage_subtract(struct sna_damage *damage, RegionPtr region); static inline void sna_damage_subtract(struct sna_damage **damage, RegionPtr region) { *damage = _sna_damage_subtract(DAMAGE_PTR(*damage), region); assert(*damage == NULL || (*damage)->mode != DAMAGE_ALL); } fastcall struct sna_damage *_sna_damage_subtract_box(struct sna_damage *damage, const BoxRec *box); static inline void sna_damage_subtract_box(struct sna_damage **damage, const BoxRec *box) { *damage = _sna_damage_subtract_box(DAMAGE_PTR(*damage), box); assert(*damage == NULL || (*damage)->mode != DAMAGE_ALL); } fastcall struct sna_damage *_sna_damage_subtract_boxes(struct sna_damage *damage, const BoxRec *box, int n, int dx, int dy); static inline void sna_damage_subtract_boxes(struct sna_damage **damage, const BoxRec *box, int n, int dx, int dy) { *damage = _sna_damage_subtract_boxes(DAMAGE_PTR(*damage), box, n, dx, dy); assert(*damage == NULL || (*damage)->mode != DAMAGE_ALL); } bool _sna_damage_intersect(struct sna_damage *damage, RegionPtr region, RegionPtr result); static inline bool sna_damage_intersect(struct sna_damage *damage, RegionPtr region, RegionPtr result) { assert(damage); assert(RegionNotEmpty(region)); assert(!DAMAGE_IS_ALL(damage)); return _sna_damage_intersect(damage, region, result); } static inline bool sna_damage_overlaps_box(const struct sna_damage *damage, const BoxRec *box) { if (box->x2 <= damage->extents.x1 || box->x1 >= damage->extents.x2) return false; if (box->y2 <= damage->extents.y1 || box->y1 >= damage->extents.y2) return false; return true; } int _sna_damage_contains_box(struct sna_damage **damage, const BoxRec *box); static inline int sna_damage_contains_box(struct sna_damage **damage, const BoxRec *box) { if (DAMAGE_IS_ALL(*damage)) return PIXMAN_REGION_IN; if (*damage == NULL) return PIXMAN_REGION_OUT; return _sna_damage_contains_box(damage, box); } static inline int sna_damage_contains_box__offset(struct sna_damage **damage, const BoxRec *box, int dx, int dy) { BoxRec b; if (DAMAGE_IS_ALL(*damage)) return PIXMAN_REGION_IN; if (*damage == NULL) return PIXMAN_REGION_OUT; b = *box; b.x1 += dx; b.x2 += dx; b.y1 += dy; b.y2 += dy; return _sna_damage_contains_box(damage, &b); } bool _sna_damage_contains_box__no_reduce(const struct sna_damage *damage, const BoxRec *box); static inline bool sna_damage_contains_box__no_reduce(const struct sna_damage *damage, const BoxRec *box) { assert(!DAMAGE_IS_ALL(damage)); return _sna_damage_contains_box__no_reduce(damage, box); } int _sna_damage_get_boxes(struct sna_damage *damage, const BoxRec **boxes); static inline int sna_damage_get_boxes(struct sna_damage *damage, const BoxRec **boxes) { assert(damage); if (DAMAGE_IS_ALL(damage)) { *boxes = &DAMAGE_PTR(damage)->extents; return 1; } else return _sna_damage_get_boxes(damage, boxes); } struct sna_damage *_sna_damage_reduce(struct sna_damage *damage); static inline void sna_damage_reduce(struct sna_damage **damage) { if (*damage == NULL) return; if (!DAMAGE_IS_ALL(*damage) && (*damage)->dirty) *damage = _sna_damage_reduce(*damage); } static inline void sna_damage_reduce_all(struct sna_damage **_damage, PixmapPtr pixmap) { struct sna_damage *damage = *_damage; if (damage == NULL || DAMAGE_IS_ALL(damage)) return; DBG(("%s(width=%d, height=%d)\n", __FUNCTION__, pixmap->drawable.width, pixmap->drawable.height)); if (damage->mode == DAMAGE_ADD) { if (damage->extents.x1 <= 0 && damage->extents.y1 <= 0 && damage->extents.x2 >= pixmap->drawable.width && damage->extents.y2 >= pixmap->drawable.height) { if (damage->dirty) { damage = *_damage = _sna_damage_reduce(damage); if (damage == NULL) return; } if (damage->region.data == NULL) *_damage = _sna_damage_all(damage, pixmap->drawable.width, pixmap->drawable.height); } } else *_damage = _sna_damage_reduce(damage); } void __sna_damage_destroy(struct sna_damage *damage); static inline void sna_damage_destroy(struct sna_damage **damage) { if (*damage == NULL) return; __sna_damage_destroy(DAMAGE_PTR(*damage)); *damage = NULL; } void _sna_damage_debug_get_region(struct sna_damage *damage, RegionRec *r); #if HAS_DEBUG_FULL && TEST_DAMAGE void sna_damage_selftest(void); #else static inline void sna_damage_selftest(void) {} #endif #endif /* SNA_DAMAGE_H */ xf86-video-intel-2.99.917/src/sna/atomic.h0000664000175000017500000000622612244635610014735 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Chris Wilson * */ #ifndef ATOMIC_H #define ATOMIC_H #if HAVE_ATOMIC_PRIMITIVES #define HAS_ATOMIC_OPS 1 typedef struct { int atomic; } atomic_t; # define atomic_read(x) ((x)->atomic) # define atomic_set(x, val) ((x)->atomic = (val)) # define atomic_inc(x) ((void) __sync_fetch_and_add (&(x)->atomic, 1)) # define atomic_dec_and_test(x) (__sync_fetch_and_add (&(x)->atomic, -1) == 1) # define atomic_add(x, v) ((void) __sync_add_and_fetch(&(x)->atomic, (v))) # define atomic_dec(x, v) ((void) __sync_sub_and_fetch(&(x)->atomic, (v))) # define atomic_cmpxchg(x, oldv, newv) __sync_val_compare_and_swap (&(x)->atomic, oldv, newv) #endif #if HAVE_LIB_ATOMIC_OPS #include #define HAS_ATOMIC_OPS 1 typedef struct { AO_t atomic; } atomic_t; # define atomic_read(x) AO_load_full(&(x)->atomic) # define atomic_set(x, val) AO_store_full(&(x)->atomic, (val)) # define atomic_inc(x) ((void) AO_fetch_and_add1_full(&(x)->atomic)) # define atomic_add(x, v) ((void) AO_fetch_and_add_full(&(x)->atomic, (v))) # define atomic_dec(x, v) ((void) AO_fetch_and_add_full(&(x)->atomic, -(v))) # define atomic_dec_and_test(x) (AO_fetch_and_sub1_full(&(x)->atomic) == 1) # define atomic_cmpxchg(x, oldv, newv) AO_compare_and_swap_full(&(x)->atomic, oldv, newv) #endif #if defined(__sun) && !defined(HAS_ATOMIC_OPS) /* Solaris & OpenSolaris */ #include #define HAS_ATOMIC_OPS 1 typedef struct { uint_t atomic; } atomic_t; # define atomic_read(x) (int) ((x)->atomic) # define atomic_set(x, val) ((x)->atomic = (uint_t)(val)) # define atomic_inc(x) (atomic_inc_uint (&(x)->atomic)) # define atomic_dec_and_test(x) (atomic_dec_uint_nv(&(x)->atomic) == 1) # define atomic_add(x, v) (atomic_add_int(&(x)->atomic, (v))) # define atomic_dec(x, v) (atomic_add_int(&(x)->atomic, -(v))) # define atomic_cmpxchg(x, oldv, newv) atomic_cas_uint (&(x)->atomic, oldv, newv) #endif #if ! HAS_ATOMIC_OPS #error xf86-video-intel requires atomic operations, please define them for your CPU/compiler. #endif #endif xf86-video-intel-2.99.917/src/sna/sna_cpu.c0000664000175000017500000000562012400577050015076 00000000000000/* * Copyright (c) 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_cpuid.h" #define xgetbv(index,eax,edx) \ __asm__ ("xgetbv" : "=a"(eax), "=d"(edx) : "c" (index)) #define has_YMM 0x1 unsigned sna_cpu_detect(void) { unsigned max = __get_cpuid_max(BASIC_CPUID, NULL); unsigned eax, ebx, ecx, edx; unsigned features = 0; unsigned extra = 0; if (max >= 1) { __cpuid(1, eax, ebx, ecx, edx); if (ecx & bit_SSE3) features |= SSE3; if (ecx & bit_SSSE3) features |= SSSE3; if (ecx & bit_SSE4_1) features |= SSE4_1; if (ecx & bit_SSE4_2) features |= SSE4_2; if (ecx & bit_OSXSAVE) { unsigned int bv_eax, bv_ecx; xgetbv(0, bv_eax, bv_ecx); if ((bv_eax & 6) == 6) extra |= has_YMM; } if ((extra & has_YMM) && (ecx & bit_AVX)) features |= AVX; if (edx & bit_MMX) features |= MMX; if (edx & bit_SSE) features |= SSE; if (edx & bit_SSE2) features |= SSE2; } if (max >= 7) { __cpuid_count(7, 0, eax, ebx, ecx, edx); if ((extra & has_YMM) && (ebx & bit_AVX2)) features |= AVX2; } return features; } char *sna_cpu_features_to_string(unsigned features, char *line) { char *ret = line; #ifdef __x86_64__ line += sprintf (line, "x86-64"); #else line += sprintf (line, "x86"); #endif if (features & SSE2) line += sprintf (line, ", sse2"); if (features & SSE3) line += sprintf (line, ", sse3"); if (features & SSSE3) line += sprintf (line, ", ssse3"); if (features & SSE4_1) line += sprintf (line, ", sse4.1"); if (features & SSE4_2) line += sprintf (line, ", sse4.2"); if (features & AVX) line += sprintf (line, ", avx"); if (features & AVX2) line += sprintf (line, ", avx2"); return ret; } xf86-video-intel-2.99.917/src/sna/gen3_render.c0000664000175000017500000051254312432737457015666 00000000000000/* * Copyright © 2010-2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_reg.h" #include "sna_video.h" #include "gen3_render.h" #define NO_COMPOSITE 0 #define NO_COMPOSITE_SPANS 0 #define NO_COPY 0 #define NO_COPY_BOXES 0 #define NO_FILL 0 #define NO_FILL_ONE 0 #define NO_FILL_BOXES 0 #define PREFER_BLT_FILL 1 enum { SHADER_NONE = 0, SHADER_ZERO, SHADER_BLACK, SHADER_WHITE, SHADER_CONSTANT, SHADER_LINEAR, SHADER_RADIAL, SHADER_TEXTURE, SHADER_OPACITY, }; #define MAX_3D_SIZE 2048 #define MAX_3D_PITCH 8192 #define OUT_BATCH(v) batch_emit(sna, v) #define OUT_BATCH_F(v) batch_emit_float(sna, v) #define OUT_VERTEX(v) vertex_emit(sna, v) enum gen3_radial_mode { RADIAL_ONE, RADIAL_TWO }; static const struct blendinfo { bool dst_alpha; bool src_alpha; uint32_t src_blend; uint32_t dst_blend; } gen3_blend_op[] = { /* Clear */ {0, 0, BLENDFACT_ZERO, BLENDFACT_ZERO}, /* Src */ {0, 0, BLENDFACT_ONE, BLENDFACT_ZERO}, /* Dst */ {0, 0, BLENDFACT_ZERO, BLENDFACT_ONE}, /* Over */ {0, 1, BLENDFACT_ONE, BLENDFACT_INV_SRC_ALPHA}, /* OverReverse */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE}, /* In */ {1, 0, BLENDFACT_DST_ALPHA, BLENDFACT_ZERO}, /* InReverse */ {0, 1, BLENDFACT_ZERO, BLENDFACT_SRC_ALPHA}, /* Out */ {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO}, /* OutReverse */ {0, 1, BLENDFACT_ZERO, BLENDFACT_INV_SRC_ALPHA}, /* Atop */ {1, 1, BLENDFACT_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, /* AtopReverse */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA}, /* Xor */ {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA}, /* Add */ {0, 0, BLENDFACT_ONE, BLENDFACT_ONE}, }; #define S6_COLOR_WRITE_ONLY \ (S6_COLOR_WRITE_ENABLE | \ BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | \ BLENDFACT_ONE << S6_CBUF_SRC_BLEND_FACT_SHIFT | \ BLENDFACT_ZERO << S6_CBUF_DST_BLEND_FACT_SHIFT) static const struct formatinfo { unsigned int fmt, xfmt; uint32_t card_fmt; bool rb_reversed; } gen3_tex_formats[] = { {PICT_a8, 0, MAPSURF_8BIT | MT_8BIT_A8, false}, {PICT_a8r8g8b8, 0, MAPSURF_32BIT | MT_32BIT_ARGB8888, false}, {PICT_x8r8g8b8, 0, MAPSURF_32BIT | MT_32BIT_XRGB8888, false}, {PICT_a8b8g8r8, 0, MAPSURF_32BIT | MT_32BIT_ABGR8888, false}, {PICT_x8b8g8r8, 0, MAPSURF_32BIT | MT_32BIT_XBGR8888, false}, #ifdef PICT_a2r10g10b10 {PICT_a2r10g10b10, PICT_x2r10g10b10, MAPSURF_32BIT | MT_32BIT_ARGB2101010, false}, {PICT_a2b10g10r10, PICT_x2b10g10r10, MAPSURF_32BIT | MT_32BIT_ABGR2101010, false}, #endif {PICT_r5g6b5, 0, MAPSURF_16BIT | MT_16BIT_RGB565, false}, {PICT_b5g6r5, 0, MAPSURF_16BIT | MT_16BIT_RGB565, true}, {PICT_a1r5g5b5, PICT_x1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555, false}, {PICT_a1b5g5r5, PICT_x1b5g5r5, MAPSURF_16BIT | MT_16BIT_ARGB1555, true}, {PICT_a4r4g4b4, PICT_x4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444, false}, {PICT_a4b4g4r4, PICT_x4b4g4r4, MAPSURF_16BIT | MT_16BIT_ARGB4444, true}, }; #define xFixedToDouble(f) pixman_fixed_to_double(f) static inline bool too_large(int width, int height) { return width > MAX_3D_SIZE || height > MAX_3D_SIZE; } static inline uint32_t gen3_buf_tiling(uint32_t tiling) { uint32_t v = 0; switch (tiling) { case I915_TILING_Y: v |= BUF_3D_TILE_WALK_Y; case I915_TILING_X: v |= BUF_3D_TILED_SURFACE; case I915_TILING_NONE: break; } return v; } static inline bool gen3_check_pitch_3d(struct kgem_bo *bo) { return bo->pitch <= MAX_3D_PITCH; } static uint32_t gen3_get_blend_cntl(int op, bool has_component_alpha, uint32_t dst_format) { uint32_t sblend = gen3_blend_op[op].src_blend; uint32_t dblend = gen3_blend_op[op].dst_blend; if (op <= PictOpSrc) /* for clear and src disable blending */ return S6_COLOR_WRITE_ONLY; /* If there's no dst alpha channel, adjust the blend op so that we'll * treat it as always 1. */ if (gen3_blend_op[op].dst_alpha) { if (PICT_FORMAT_A(dst_format) == 0) { if (sblend == BLENDFACT_DST_ALPHA) sblend = BLENDFACT_ONE; else if (sblend == BLENDFACT_INV_DST_ALPHA) sblend = BLENDFACT_ZERO; } /* gen3 engine reads 8bit color buffer into green channel * in cases like color buffer blending etc., and also writes * back green channel. So with dst_alpha blend we should use * color factor. See spec on "8-bit rendering". */ if (dst_format == PICT_a8) { if (sblend == BLENDFACT_DST_ALPHA) sblend = BLENDFACT_DST_COLR; else if (sblend == BLENDFACT_INV_DST_ALPHA) sblend = BLENDFACT_INV_DST_COLR; } } /* If the source alpha is being used, then we should only be in a case * where the source blend factor is 0, and the source blend value is the * mask channels multiplied by the source picture's alpha. */ if (has_component_alpha && gen3_blend_op[op].src_alpha) { if (dblend == BLENDFACT_SRC_ALPHA) dblend = BLENDFACT_SRC_COLR; else if (dblend == BLENDFACT_INV_SRC_ALPHA) dblend = BLENDFACT_INV_SRC_COLR; } return (S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE | BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT | sblend << S6_CBUF_SRC_BLEND_FACT_SHIFT | dblend << S6_CBUF_DST_BLEND_FACT_SHIFT); } static bool gen3_check_dst_format(uint32_t format) { switch (format) { case PICT_a8r8g8b8: case PICT_x8r8g8b8: case PICT_a8b8g8r8: case PICT_x8b8g8r8: case PICT_r5g6b5: case PICT_b5g6r5: case PICT_a1r5g5b5: case PICT_x1r5g5b5: case PICT_a1b5g5r5: case PICT_x1b5g5r5: #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: case PICT_x2r10g10b10: case PICT_a2b10g10r10: case PICT_x2b10g10r10: #endif case PICT_a8: case PICT_a4r4g4b4: case PICT_x4r4g4b4: case PICT_a4b4g4r4: case PICT_x4b4g4r4: return true; default: return false; } } static bool gen3_dst_rb_reversed(uint32_t format) { switch (format) { case PICT_a8r8g8b8: case PICT_x8r8g8b8: case PICT_r5g6b5: case PICT_a1r5g5b5: case PICT_x1r5g5b5: #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: case PICT_x2r10g10b10: #endif case PICT_a8: case PICT_a4r4g4b4: case PICT_x4r4g4b4: return false; default: return true; } } #define DSTORG_HORT_BIAS(x) ((x)<<20) #define DSTORG_VERT_BIAS(x) ((x)<<16) static uint32_t gen3_get_dst_format(uint32_t format) { #define BIAS (DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8)) switch (format) { default: case PICT_a8r8g8b8: case PICT_x8r8g8b8: case PICT_a8b8g8r8: case PICT_x8b8g8r8: return BIAS | COLR_BUF_ARGB8888; case PICT_r5g6b5: case PICT_b5g6r5: return BIAS | COLR_BUF_RGB565; case PICT_a1r5g5b5: case PICT_x1r5g5b5: case PICT_a1b5g5r5: case PICT_x1b5g5r5: return BIAS | COLR_BUF_ARGB1555; #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: case PICT_x2r10g10b10: case PICT_a2b10g10r10: case PICT_x2b10g10r10: return BIAS | COLR_BUF_ARGB2AAA; #endif case PICT_a8: return BIAS | COLR_BUF_8BIT; case PICT_a4r4g4b4: case PICT_x4r4g4b4: case PICT_a4b4g4r4: case PICT_x4b4g4r4: return BIAS | COLR_BUF_ARGB4444; } #undef BIAS } static bool gen3_check_format(PicturePtr p) { switch (p->format) { case PICT_a8: case PICT_a8r8g8b8: case PICT_x8r8g8b8: case PICT_a8b8g8r8: case PICT_x8b8g8r8: #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: case PICT_a2b10g10r10: #endif case PICT_r5g6b5: case PICT_b5g6r5: case PICT_a1r5g5b5: case PICT_a1b5g5r5: case PICT_a4r4g4b4: case PICT_a4b4g4r4: return true; default: return false; } } static bool gen3_check_xformat(PicturePtr p) { switch (p->format) { case PICT_a8r8g8b8: case PICT_x8r8g8b8: case PICT_a8b8g8r8: case PICT_x8b8g8r8: case PICT_r5g6b5: case PICT_b5g6r5: case PICT_a1r5g5b5: case PICT_x1r5g5b5: case PICT_a1b5g5r5: case PICT_x1b5g5r5: #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: case PICT_x2r10g10b10: case PICT_a2b10g10r10: case PICT_x2b10g10r10: #endif case PICT_a8: case PICT_a4r4g4b4: case PICT_x4r4g4b4: case PICT_a4b4g4r4: case PICT_x4b4g4r4: return true; default: return false; } } static uint32_t gen3_texture_repeat(uint32_t repeat) { #define REPEAT(x) \ (SS3_NORMALIZED_COORDS | \ TEXCOORDMODE_##x << SS3_TCX_ADDR_MODE_SHIFT | \ TEXCOORDMODE_##x << SS3_TCY_ADDR_MODE_SHIFT) switch (repeat) { default: case RepeatNone: return REPEAT(CLAMP_BORDER); case RepeatNormal: return REPEAT(WRAP); case RepeatPad: return REPEAT(CLAMP_EDGE); case RepeatReflect: return REPEAT(MIRROR); } #undef REPEAT } static uint32_t gen3_gradient_repeat(uint32_t repeat) { #define REPEAT(x) \ (SS3_NORMALIZED_COORDS | \ TEXCOORDMODE_##x << SS3_TCX_ADDR_MODE_SHIFT | \ TEXCOORDMODE_WRAP << SS3_TCY_ADDR_MODE_SHIFT) switch (repeat) { default: case RepeatNone: return REPEAT(CLAMP_BORDER); case RepeatNormal: return REPEAT(WRAP); case RepeatPad: return REPEAT(CLAMP_EDGE); case RepeatReflect: return REPEAT(MIRROR); } #undef REPEAT } static bool gen3_check_repeat(PicturePtr p) { if (!p->repeat) return true; switch (p->repeatType) { case RepeatNone: case RepeatNormal: case RepeatPad: case RepeatReflect: return true; default: return false; } } static uint32_t gen3_filter(uint32_t filter) { switch (filter) { default: assert(0); case PictFilterNearest: return (FILTER_NEAREST << SS2_MAG_FILTER_SHIFT | FILTER_NEAREST << SS2_MIN_FILTER_SHIFT | MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT); case PictFilterBilinear: return (FILTER_LINEAR << SS2_MAG_FILTER_SHIFT | FILTER_LINEAR << SS2_MIN_FILTER_SHIFT | MIPFILTER_NONE << SS2_MIP_FILTER_SHIFT); } } static bool gen3_check_filter(PicturePtr p) { switch (p->filter) { case PictFilterNearest: case PictFilterBilinear: return true; default: return false; } } static inline void gen3_emit_composite_dstcoord(struct sna *sna, int16_t dstX, int16_t dstY) { OUT_VERTEX(dstX); OUT_VERTEX(dstY); } fastcall static void gen3_emit_composite_primitive_constant(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int16_t dst_x = r->dst.x + op->dst.x; int16_t dst_y = r->dst.y + op->dst.y; gen3_emit_composite_dstcoord(sna, dst_x + r->width, dst_y + r->height); gen3_emit_composite_dstcoord(sna, dst_x, dst_y + r->height); gen3_emit_composite_dstcoord(sna, dst_x, dst_y); } fastcall static void gen3_emit_composite_boxes_constant(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { v[0] = box->x2; v[1] = box->y2; v[2] = box->x1; v[3] = box->y2; v[4] = box->x1; v[5] = box->y1; box++; v += 6; } while (--nbox); } fastcall static void gen3_emit_composite_primitive_identity_gradient(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int16_t dst_x, dst_y; int16_t src_x, src_y; dst_x = r->dst.x + op->dst.x; dst_y = r->dst.y + op->dst.y; src_x = r->src.x + op->src.offset[0]; src_y = r->src.y + op->src.offset[1]; gen3_emit_composite_dstcoord(sna, dst_x + r->width, dst_y + r->height); OUT_VERTEX(src_x + r->width); OUT_VERTEX(src_y + r->height); gen3_emit_composite_dstcoord(sna, dst_x, dst_y + r->height); OUT_VERTEX(src_x); OUT_VERTEX(src_y + r->height); gen3_emit_composite_dstcoord(sna, dst_x, dst_y); OUT_VERTEX(src_x); OUT_VERTEX(src_y); } fastcall static void gen3_emit_composite_boxes_identity_gradient(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { v[0] = box->x2; v[1] = box->y2; v[2] = box->x2 + op->src.offset[0]; v[3] = box->y2 + op->src.offset[1]; v[4] = box->x1; v[5] = box->y2; v[6] = box->x1 + op->src.offset[0]; v[7] = box->y2 + op->src.offset[1]; v[8] = box->x1; v[9] = box->y1; v[10] = box->x1 + op->src.offset[0]; v[11] = box->y1 + op->src.offset[1]; v += 12; box++; } while (--nbox); } fastcall static void gen3_emit_composite_primitive_affine_gradient(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { PictTransform *transform = op->src.transform; int16_t dst_x, dst_y; int16_t src_x, src_y; float *v; dst_x = r->dst.x + op->dst.x; dst_y = r->dst.y + op->dst.y; src_x = r->src.x + op->src.offset[0]; src_y = r->src.y + op->src.offset[1]; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[0] = dst_x + r->width; v[1] = dst_y + r->height; _sna_get_transformed_scaled(src_x + r->width, src_y + r->height, transform, op->src.scale, &v[2], &v[3]); v[4] = dst_x; v[5] = dst_y + r->height; _sna_get_transformed_scaled(src_x, src_y + r->height, transform, op->src.scale, &v[6], &v[7]); v[8] = dst_x; v[9] = dst_y; _sna_get_transformed_scaled(src_x, src_y, transform, op->src.scale, &v[10], &v[11]); } fastcall static void gen3_emit_composite_boxes_affine_gradient(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { const PictTransform *transform = op->src.transform; do { v[0] = box->x2; v[1] = box->y2; _sna_get_transformed_scaled(box->x2 + op->src.offset[0], box->y2 + op->src.offset[1], transform, op->src.scale, &v[2], &v[3]); v[4] = box->x1; v[5] = box->y2; _sna_get_transformed_scaled(box->x1 + op->src.offset[0], box->y2 + op->src.offset[1], transform, op->src.scale, &v[6], &v[7]); v[8] = box->x1; v[9] = box->y1; _sna_get_transformed_scaled(box->x1 + op->src.offset[0], box->y1 + op->src.offset[1], transform, op->src.scale, &v[10], &v[11]); box++; v += 12; } while (--nbox); } fastcall static void gen3_emit_composite_primitive_identity_source(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[8] = v[4] = r->dst.x + op->dst.x; v[0] = v[4] + w; v[9] = r->dst.y + op->dst.y; v[5] = v[1] = v[9] + h; v[10] = v[6] = (r->src.x + op->src.offset[0]) * op->src.scale[0]; v[2] = v[6] + w * op->src.scale[0]; v[11] = (r->src.y + op->src.offset[1]) * op->src.scale[1]; v[7] = v[3] = v[11] + h * op->src.scale[1]; } fastcall static void gen3_emit_composite_boxes_identity_source(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { v[0] = box->x2 + op->dst.x; v[8] = v[4] = box->x1 + op->dst.x; v[5] = v[1] = box->y2 + op->dst.y; v[9] = box->y1 + op->dst.y; v[10] = v[6] = (box->x1 + op->src.offset[0]) * op->src.scale[0]; v[2] = (box->x2 + op->src.offset[0]) * op->src.scale[0]; v[11] = (box->y1 + op->src.offset[1]) * op->src.scale[1]; v[7] = v[3] = (box->y2 + op->src.offset[1]) * op->src.scale[1]; v += 12; box++; } while (--nbox); } fastcall static void gen3_emit_composite_primitive_identity_source_no_offset(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[8] = v[4] = r->dst.x; v[9] = r->dst.y; v[0] = v[4] + w; v[5] = v[1] = v[9] + h; v[10] = v[6] = r->src.x * op->src.scale[0]; v[11] = r->src.y * op->src.scale[1]; v[2] = v[6] + w * op->src.scale[0]; v[7] = v[3] = v[11] + h * op->src.scale[1]; } fastcall static void gen3_emit_composite_boxes_identity_source_no_offset(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { v[0] = box->x2; v[8] = v[4] = box->x1; v[5] = v[1] = box->y2; v[9] = box->y1; v[10] = v[6] = box->x1 * op->src.scale[0]; v[2] = box->x2 * op->src.scale[0]; v[11] = box->y1 * op->src.scale[1]; v[7] = v[3] = box->y2 * op->src.scale[1]; v += 12; box++; } while (--nbox); } fastcall static void gen3_emit_composite_primitive_affine_source(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { PictTransform *transform = op->src.transform; int16_t dst_x = r->dst.x + op->dst.x; int16_t dst_y = r->dst.y + op->dst.y; int src_x = r->src.x + (int)op->src.offset[0]; int src_y = r->src.y + (int)op->src.offset[1]; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[0] = dst_x + r->width; v[5] = v[1] = dst_y + r->height; v[8] = v[4] = dst_x; v[9] = dst_y; _sna_get_transformed_scaled(src_x + r->width, src_y + r->height, transform, op->src.scale, &v[2], &v[3]); _sna_get_transformed_scaled(src_x, src_y + r->height, transform, op->src.scale, &v[6], &v[7]); _sna_get_transformed_scaled(src_x, src_y, transform, op->src.scale, &v[10], &v[11]); } fastcall static void gen3_emit_composite_boxes_affine_source(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { const PictTransform *transform = op->src.transform; do { v[0] = box->x2; v[5] = v[1] = box->y2; v[8] = v[4] = box->x1; v[9] = box->y1; _sna_get_transformed_scaled(box->x2 + op->src.offset[0], box->y2 + op->src.offset[1], transform, op->src.scale, &v[2], &v[3]); _sna_get_transformed_scaled(box->x1 + op->src.offset[0], box->y2 + op->src.offset[1], transform, op->src.scale, &v[6], &v[7]); _sna_get_transformed_scaled(box->x1 + op->src.offset[0], box->y1 + op->src.offset[1], transform, op->src.scale, &v[10], &v[11]); v += 12; box++; } while (--nbox); } fastcall static void gen3_emit_composite_primitive_constant_identity_mask(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[8] = v[4] = r->dst.x + op->dst.x; v[0] = v[4] + w; v[9] = r->dst.y + op->dst.y; v[5] = v[1] = v[9] + h; v[10] = v[6] = (r->mask.x + op->mask.offset[0]) * op->mask.scale[0]; v[2] = v[6] + w * op->mask.scale[0]; v[11] = (r->mask.y + op->mask.offset[1]) * op->mask.scale[1]; v[7] = v[3] = v[11] + h * op->mask.scale[1]; } fastcall static void gen3_emit_composite_primitive_constant_identity_mask_no_offset(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[8] = v[4] = r->dst.x; v[9] = r->dst.y; v[0] = v[4] + w; v[5] = v[1] = v[9] + h; v[10] = v[6] = r->mask.x * op->mask.scale[0]; v[11] = r->mask.y * op->mask.scale[1]; v[2] = v[6] + w * op->mask.scale[0]; v[7] = v[3] = v[11] + h * op->mask.scale[1]; } fastcall static void gen3_emit_composite_primitive_identity_source_mask(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float dst_x, dst_y; float src_x, src_y; float msk_x, msk_y; float w, h; float *v; dst_x = r->dst.x + op->dst.x; dst_y = r->dst.y + op->dst.y; src_x = r->src.x + op->src.offset[0]; src_y = r->src.y + op->src.offset[1]; msk_x = r->mask.x + op->mask.offset[0]; msk_y = r->mask.y + op->mask.offset[1]; w = r->width; h = r->height; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 18; v[0] = dst_x + w; v[1] = dst_y + h; v[2] = (src_x + w) * op->src.scale[0]; v[3] = (src_y + h) * op->src.scale[1]; v[4] = (msk_x + w) * op->mask.scale[0]; v[5] = (msk_y + h) * op->mask.scale[1]; v[6] = dst_x; v[7] = v[1]; v[8] = src_x * op->src.scale[0]; v[9] = v[3]; v[10] = msk_x * op->mask.scale[0]; v[11] =v[5]; v[12] = v[6]; v[13] = dst_y; v[14] = v[8]; v[15] = src_y * op->src.scale[1]; v[16] = v[10]; v[17] = msk_y * op->mask.scale[1]; } fastcall static void gen3_emit_composite_primitive_affine_source_mask(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int16_t src_x, src_y; float dst_x, dst_y; float msk_x, msk_y; float w, h; float *v; dst_x = r->dst.x + op->dst.x; dst_y = r->dst.y + op->dst.y; src_x = r->src.x + op->src.offset[0]; src_y = r->src.y + op->src.offset[1]; msk_x = r->mask.x + op->mask.offset[0]; msk_y = r->mask.y + op->mask.offset[1]; w = r->width; h = r->height; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 18; v[0] = dst_x + w; v[1] = dst_y + h; _sna_get_transformed_scaled(src_x + r->width, src_y + r->height, op->src.transform, op->src.scale, &v[2], &v[3]); v[4] = (msk_x + w) * op->mask.scale[0]; v[5] = (msk_y + h) * op->mask.scale[1]; v[6] = dst_x; v[7] = v[1]; _sna_get_transformed_scaled(src_x, src_y + r->height, op->src.transform, op->src.scale, &v[8], &v[9]); v[10] = msk_x * op->mask.scale[0]; v[11] =v[5]; v[12] = v[6]; v[13] = dst_y; _sna_get_transformed_scaled(src_x, src_y, op->src.transform, op->src.scale, &v[14], &v[15]); v[16] = v[10]; v[17] = msk_y * op->mask.scale[1]; } static void gen3_emit_composite_texcoord(struct sna *sna, const struct sna_composite_channel *channel, int16_t x, int16_t y) { float s = 0, t = 0, w = 1; switch (channel->u.gen3.type) { case SHADER_OPACITY: case SHADER_NONE: case SHADER_ZERO: case SHADER_BLACK: case SHADER_WHITE: case SHADER_CONSTANT: break; case SHADER_LINEAR: case SHADER_RADIAL: case SHADER_TEXTURE: x += channel->offset[0]; y += channel->offset[1]; if (channel->is_affine) { sna_get_transformed_coordinates(x, y, channel->transform, &s, &t); OUT_VERTEX(s * channel->scale[0]); OUT_VERTEX(t * channel->scale[1]); } else { sna_get_transformed_coordinates_3d(x, y, channel->transform, &s, &t, &w); OUT_VERTEX(s * channel->scale[0]); OUT_VERTEX(t * channel->scale[1]); OUT_VERTEX(0); OUT_VERTEX(w); } break; } } static void gen3_emit_composite_vertex(struct sna *sna, const struct sna_composite_op *op, int16_t srcX, int16_t srcY, int16_t maskX, int16_t maskY, int16_t dstX, int16_t dstY) { gen3_emit_composite_dstcoord(sna, dstX, dstY); gen3_emit_composite_texcoord(sna, &op->src, srcX, srcY); gen3_emit_composite_texcoord(sna, &op->mask, maskX, maskY); } fastcall static void gen3_emit_composite_primitive(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { gen3_emit_composite_vertex(sna, op, r->src.x + r->width, r->src.y + r->height, r->mask.x + r->width, r->mask.y + r->height, op->dst.x + r->dst.x + r->width, op->dst.y + r->dst.y + r->height); gen3_emit_composite_vertex(sna, op, r->src.x, r->src.y + r->height, r->mask.x, r->mask.y + r->height, op->dst.x + r->dst.x, op->dst.y + r->dst.y + r->height); gen3_emit_composite_vertex(sna, op, r->src.x, r->src.y, r->mask.x, r->mask.y, op->dst.x + r->dst.x, op->dst.y + r->dst.y); } #if defined(sse2) && !defined(__x86_64__) sse2 fastcall static void gen3_emit_composite_primitive_constant__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 6; v[4] = v[2] = r->dst.x + op->dst.x; v[5] = r->dst.y + op->dst.y; v[0] = v[2] + r->width; v[3] = v[1] = v[5] + r->height; } sse2 fastcall static void gen3_emit_composite_boxes_constant__sse2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { v[0] = box->x2; v[3] = v[1] = box->y2; v[4] = v[2] = box->x1; v[5] = box->y1; box++; v += 6; } while (--nbox); } sse2 fastcall static void gen3_emit_composite_primitive_identity_gradient__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int16_t x, y; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; x = r->dst.x + op->dst.x; y = r->dst.y + op->dst.y; v[0] = x + r->width; v[5] = v[1] = y + r->height; v[8] = v[4] = x; v[9] = y; x = r->src.x + op->src.offset[0]; y = r->src.y + op->src.offset[1]; v[2] = x + r->width; v[7] = v[3] = y + r->height; v[10] = v[6] = x; v[11] = y; } sse2 fastcall static void gen3_emit_composite_boxes_identity_gradient__sse2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { v[0] = box->x2; v[5] = v[1] = box->y2; v[8] = v[4] = box->x1; v[9] = box->y1; v[2] = box->x2 + op->src.offset[0]; v[7] = v[3] = box->y2 + op->src.offset[1]; v[10] = v[6] = box->x1 + op->src.offset[0]; v[11] = box->y1 + op->src.offset[1]; v += 12; box++; } while (--nbox); } sse2 fastcall static void gen3_emit_composite_primitive_affine_gradient__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { PictTransform *transform = op->src.transform; int16_t dst_x, dst_y; int16_t src_x, src_y; float *v; dst_x = r->dst.x + op->dst.x; dst_y = r->dst.y + op->dst.y; src_x = r->src.x + op->src.offset[0]; src_y = r->src.y + op->src.offset[1]; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[0] = dst_x + r->width; v[1] = dst_y + r->height; _sna_get_transformed_scaled(src_x + r->width, src_y + r->height, transform, op->src.scale, &v[2], &v[3]); v[4] = dst_x; v[5] = dst_y + r->height; _sna_get_transformed_scaled(src_x, src_y + r->height, transform, op->src.scale, &v[6], &v[7]); v[8] = dst_x; v[9] = dst_y; _sna_get_transformed_scaled(src_x, src_y, transform, op->src.scale, &v[10], &v[11]); } sse2 fastcall static void gen3_emit_composite_boxes_affine_gradient__sse2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { const PictTransform *transform = op->src.transform; do { v[0] = box->x2; v[1] = box->y2; _sna_get_transformed_scaled(box->x2 + op->src.offset[0], box->y2 + op->src.offset[1], transform, op->src.scale, &v[2], &v[3]); v[4] = box->x1; v[5] = box->y2; _sna_get_transformed_scaled(box->x1 + op->src.offset[0], box->y2 + op->src.offset[1], transform, op->src.scale, &v[6], &v[7]); v[8] = box->x1; v[9] = box->y1; _sna_get_transformed_scaled(box->x1 + op->src.offset[0], box->y1 + op->src.offset[1], transform, op->src.scale, &v[10], &v[11]); box++; v += 12; } while (--nbox); } sse2 fastcall static void gen3_emit_composite_primitive_identity_source__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[8] = v[4] = r->dst.x + op->dst.x; v[0] = v[4] + w; v[9] = r->dst.y + op->dst.y; v[5] = v[1] = v[9] + h; v[10] = v[6] = (r->src.x + op->src.offset[0]) * op->src.scale[0]; v[2] = v[6] + w * op->src.scale[0]; v[11] = (r->src.y + op->src.offset[1]) * op->src.scale[1]; v[7] = v[3] = v[11] + h * op->src.scale[1]; } sse2 fastcall static void gen3_emit_composite_boxes_identity_source__sse2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { v[0] = box->x2 + op->dst.x; v[8] = v[4] = box->x1 + op->dst.x; v[5] = v[1] = box->y2 + op->dst.y; v[9] = box->y1 + op->dst.y; v[10] = v[6] = (box->x1 + op->src.offset[0]) * op->src.scale[0]; v[2] = (box->x2 + op->src.offset[0]) * op->src.scale[0]; v[11] = (box->y1 + op->src.offset[1]) * op->src.scale[1]; v[7] = v[3] = (box->y2 + op->src.offset[1]) * op->src.scale[1]; v += 12; box++; } while (--nbox); } sse2 fastcall static void gen3_emit_composite_primitive_identity_source_no_offset__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[8] = v[4] = r->dst.x; v[9] = r->dst.y; v[0] = v[4] + w; v[5] = v[1] = v[9] + h; v[10] = v[6] = r->src.x * op->src.scale[0]; v[11] = r->src.y * op->src.scale[1]; v[2] = v[6] + w * op->src.scale[0]; v[7] = v[3] = v[11] + h * op->src.scale[1]; } sse2 fastcall static void gen3_emit_composite_boxes_identity_source_no_offset__sse2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { v[0] = box->x2; v[8] = v[4] = box->x1; v[5] = v[1] = box->y2; v[9] = box->y1; v[10] = v[6] = box->x1 * op->src.scale[0]; v[2] = box->x2 * op->src.scale[0]; v[11] = box->y1 * op->src.scale[1]; v[7] = v[3] = box->y2 * op->src.scale[1]; v += 12; box++; } while (--nbox); } sse2 fastcall static void gen3_emit_composite_primitive_affine_source__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { PictTransform *transform = op->src.transform; int16_t dst_x = r->dst.x + op->dst.x; int16_t dst_y = r->dst.y + op->dst.y; int src_x = r->src.x + (int)op->src.offset[0]; int src_y = r->src.y + (int)op->src.offset[1]; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[0] = dst_x + r->width; v[5] = v[1] = dst_y + r->height; v[8] = v[4] = dst_x; v[9] = dst_y; _sna_get_transformed_scaled(src_x + r->width, src_y + r->height, transform, op->src.scale, &v[2], &v[3]); _sna_get_transformed_scaled(src_x, src_y + r->height, transform, op->src.scale, &v[6], &v[7]); _sna_get_transformed_scaled(src_x, src_y, transform, op->src.scale, &v[10], &v[11]); } sse2 fastcall static void gen3_emit_composite_boxes_affine_source__sse2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { const PictTransform *transform = op->src.transform; do { v[0] = box->x2; v[5] = v[1] = box->y2; v[8] = v[4] = box->x1; v[9] = box->y1; _sna_get_transformed_scaled(box->x2 + op->src.offset[0], box->y2 + op->src.offset[1], transform, op->src.scale, &v[2], &v[3]); _sna_get_transformed_scaled(box->x1 + op->src.offset[0], box->y2 + op->src.offset[1], transform, op->src.scale, &v[6], &v[7]); _sna_get_transformed_scaled(box->x1 + op->src.offset[0], box->y1 + op->src.offset[1], transform, op->src.scale, &v[10], &v[11]); v += 12; box++; } while (--nbox); } sse2 fastcall static void gen3_emit_composite_primitive_constant_identity_mask__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[8] = v[4] = r->dst.x + op->dst.x; v[0] = v[4] + w; v[9] = r->dst.y + op->dst.y; v[5] = v[1] = v[9] + h; v[10] = v[6] = (r->mask.x + op->mask.offset[0]) * op->mask.scale[0]; v[2] = v[6] + w * op->mask.scale[0]; v[11] = (r->mask.y + op->mask.offset[1]) * op->mask.scale[1]; v[7] = v[3] = v[11] + h * op->mask.scale[1]; } sse2 fastcall static void gen3_emit_composite_primitive_constant_identity_mask_no_offset__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; v[8] = v[4] = r->dst.x; v[9] = r->dst.y; v[0] = v[4] + w; v[5] = v[1] = v[9] + h; v[10] = v[6] = r->mask.x * op->mask.scale[0]; v[11] = r->mask.y * op->mask.scale[1]; v[2] = v[6] + w * op->mask.scale[0]; v[7] = v[3] = v[11] + h * op->mask.scale[1]; } sse2 fastcall static void gen3_emit_composite_primitive_identity_source_mask__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float dst_x, dst_y; float src_x, src_y; float msk_x, msk_y; float w, h; float *v; dst_x = r->dst.x + op->dst.x; dst_y = r->dst.y + op->dst.y; src_x = r->src.x + op->src.offset[0]; src_y = r->src.y + op->src.offset[1]; msk_x = r->mask.x + op->mask.offset[0]; msk_y = r->mask.y + op->mask.offset[1]; w = r->width; h = r->height; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 18; v[0] = dst_x + w; v[1] = dst_y + h; v[2] = (src_x + w) * op->src.scale[0]; v[3] = (src_y + h) * op->src.scale[1]; v[4] = (msk_x + w) * op->mask.scale[0]; v[5] = (msk_y + h) * op->mask.scale[1]; v[6] = dst_x; v[7] = v[1]; v[8] = src_x * op->src.scale[0]; v[9] = v[3]; v[10] = msk_x * op->mask.scale[0]; v[11] =v[5]; v[12] = v[6]; v[13] = dst_y; v[14] = v[8]; v[15] = src_y * op->src.scale[1]; v[16] = v[10]; v[17] = msk_y * op->mask.scale[1]; } sse2 fastcall static void gen3_emit_composite_primitive_affine_source_mask__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int16_t src_x, src_y; float dst_x, dst_y; float msk_x, msk_y; float w, h; float *v; dst_x = r->dst.x + op->dst.x; dst_y = r->dst.y + op->dst.y; src_x = r->src.x + op->src.offset[0]; src_y = r->src.y + op->src.offset[1]; msk_x = r->mask.x + op->mask.offset[0]; msk_y = r->mask.y + op->mask.offset[1]; w = r->width; h = r->height; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 18; v[0] = dst_x + w; v[1] = dst_y + h; _sna_get_transformed_scaled(src_x + r->width, src_y + r->height, op->src.transform, op->src.scale, &v[2], &v[3]); v[4] = (msk_x + w) * op->mask.scale[0]; v[5] = (msk_y + h) * op->mask.scale[1]; v[6] = dst_x; v[7] = v[1]; _sna_get_transformed_scaled(src_x, src_y + r->height, op->src.transform, op->src.scale, &v[8], &v[9]); v[10] = msk_x * op->mask.scale[0]; v[11] =v[5]; v[12] = v[6]; v[13] = dst_y; _sna_get_transformed_scaled(src_x, src_y, op->src.transform, op->src.scale, &v[14], &v[15]); v[16] = v[10]; v[17] = msk_y * op->mask.scale[1]; } #endif static inline void gen3_2d_perspective(struct sna *sna, int in, int out) { gen3_fs_rcp(out, 0, gen3_fs_operand(in, W, W, W, W)); gen3_fs_mul(out, gen3_fs_operand(in, X, Y, ZERO, ONE), gen3_fs_operand_reg(out)); } static inline void gen3_linear_coord(struct sna *sna, const struct sna_composite_channel *channel, int in, int out) { int c = channel->u.gen3.constants; if (!channel->is_affine) { gen3_2d_perspective(sna, in, FS_U0); in = FS_U0; } gen3_fs_mov(out, gen3_fs_operand_zero()); gen3_fs_dp3(out, MASK_X, gen3_fs_operand(in, X, Y, ONE, ZERO), gen3_fs_operand_reg(c)); } static void gen3_radial_coord(struct sna *sna, const struct sna_composite_channel *channel, int in, int out) { int c = channel->u.gen3.constants; if (!channel->is_affine) { gen3_2d_perspective(sna, in, FS_U0); in = FS_U0; } switch (channel->u.gen3.mode) { case RADIAL_ONE: /* pdx = (x - c1x) / dr, pdy = (y - c1y) / dr; r² = pdx*pdx + pdy*pdy t = r²/sqrt(r²) - r1/dr; */ gen3_fs_mad(FS_U0, MASK_X | MASK_Y, gen3_fs_operand(in, X, Y, ZERO, ZERO), gen3_fs_operand(c, Z, Z, ZERO, ZERO), gen3_fs_operand(c, NEG_X, NEG_Y, ZERO, ZERO)); gen3_fs_dp2add(FS_U0, MASK_X, gen3_fs_operand(FS_U0, X, Y, ZERO, ZERO), gen3_fs_operand(FS_U0, X, Y, ZERO, ZERO), gen3_fs_operand_zero()); gen3_fs_rsq(out, MASK_X, gen3_fs_operand(FS_U0, X, X, X, X)); gen3_fs_mad(out, 0, gen3_fs_operand(FS_U0, X, ZERO, ZERO, ZERO), gen3_fs_operand(out, X, ZERO, ZERO, ZERO), gen3_fs_operand(c, W, ZERO, ZERO, ZERO)); break; case RADIAL_TWO: /* pdx = x - c1x, pdy = y - c1y; A = dx² + dy² - dr² B = -2*(pdx*dx + pdy*dy + r1*dr); C = pdx² + pdy² - r1²; det = B*B - 4*A*C; t = (-B + sqrt (det)) / (2 * A) */ /* u0.x = pdx, u0.y = pdy, u[0].z = r1; */ gen3_fs_add(FS_U0, gen3_fs_operand(in, X, Y, ZERO, ZERO), gen3_fs_operand(c, X, Y, Z, ZERO)); /* u0.x = pdx, u0.y = pdy, u[0].z = r1, u[0].w = B; */ gen3_fs_dp3(FS_U0, MASK_W, gen3_fs_operand(FS_U0, X, Y, ONE, ZERO), gen3_fs_operand(c+1, X, Y, Z, ZERO)); /* u1.x = pdx² + pdy² - r1²; [C] */ gen3_fs_dp3(FS_U1, MASK_X, gen3_fs_operand(FS_U0, X, Y, Z, ZERO), gen3_fs_operand(FS_U0, X, Y, NEG_Z, ZERO)); /* u1.x = C, u1.y = B, u1.z=-4*A; */ gen3_fs_mov_masked(FS_U1, MASK_Y, gen3_fs_operand(FS_U0, W, W, W, W)); gen3_fs_mov_masked(FS_U1, MASK_Z, gen3_fs_operand(c, W, W, W, W)); /* u1.x = B² - 4*A*C */ gen3_fs_dp2add(FS_U1, MASK_X, gen3_fs_operand(FS_U1, X, Y, ZERO, ZERO), gen3_fs_operand(FS_U1, Z, Y, ZERO, ZERO), gen3_fs_operand_zero()); /* out.x = -B + sqrt (B² - 4*A*C), */ gen3_fs_rsq(out, MASK_X, gen3_fs_operand(FS_U1, X, X, X, X)); gen3_fs_mad(out, MASK_X, gen3_fs_operand(out, X, ZERO, ZERO, ZERO), gen3_fs_operand(FS_U1, X, ZERO, ZERO, ZERO), gen3_fs_operand(FS_U0, NEG_W, ZERO, ZERO, ZERO)); /* out.x = (-B + sqrt (B² - 4*A*C)) / (2 * A), */ gen3_fs_mul(out, gen3_fs_operand(out, X, ZERO, ZERO, ZERO), gen3_fs_operand(c+1, W, ZERO, ZERO, ZERO)); break; } } static void gen3_composite_emit_shader(struct sna *sna, const struct sna_composite_op *op, uint8_t blend) { bool dst_is_alpha = PIXMAN_FORMAT_RGB(op->dst.format) == 0; const struct sna_composite_channel *src, *mask; struct gen3_render_state *state = &sna->render_state.gen3; uint32_t shader_offset, id; int src_reg, mask_reg; int t, length; src = &op->src; mask = &op->mask; if (mask->u.gen3.type == SHADER_NONE) mask = NULL; id = (src->u.gen3.type | src->is_affine << 4 | src->alpha_fixup << 5 | src->rb_reversed << 6); if (mask) { id |= (mask->u.gen3.type << 8 | mask->is_affine << 12 | gen3_blend_op[blend].src_alpha << 13 | op->has_component_alpha << 14 | mask->alpha_fixup << 15 | mask->rb_reversed << 16); } id |= dst_is_alpha << 24; id |= op->rb_reversed << 25; if (id == state->last_shader) return; state->last_shader = id; shader_offset = sna->kgem.nbatch++; t = 0; switch (src->u.gen3.type) { case SHADER_NONE: case SHADER_OPACITY: assert(0); case SHADER_ZERO: case SHADER_BLACK: case SHADER_WHITE: break; case SHADER_CONSTANT: gen3_fs_dcl(FS_T8); src_reg = FS_T8; break; case SHADER_TEXTURE: case SHADER_RADIAL: case SHADER_LINEAR: gen3_fs_dcl(FS_S0); gen3_fs_dcl(FS_T0); t++; break; } if (mask == NULL) { switch (src->u.gen3.type) { case SHADER_ZERO: gen3_fs_mov(FS_OC, gen3_fs_operand_zero()); goto done; case SHADER_BLACK: if (dst_is_alpha) gen3_fs_mov(FS_OC, gen3_fs_operand_one()); else gen3_fs_mov(FS_OC, gen3_fs_operand(FS_R0, ZERO, ZERO, ZERO, ONE)); goto done; case SHADER_WHITE: gen3_fs_mov(FS_OC, gen3_fs_operand_one()); goto done; } if (src->alpha_fixup && dst_is_alpha) { gen3_fs_mov(FS_OC, gen3_fs_operand_one()); goto done; } /* No mask, so load directly to output color */ if (src->u.gen3.type != SHADER_CONSTANT) { if (dst_is_alpha || src->rb_reversed ^ op->rb_reversed) src_reg = FS_R0; else src_reg = FS_OC; } switch (src->u.gen3.type) { case SHADER_LINEAR: gen3_linear_coord(sna, src, FS_T0, FS_R0); gen3_fs_texld(src_reg, FS_S0, FS_R0); break; case SHADER_RADIAL: gen3_radial_coord(sna, src, FS_T0, FS_R0); gen3_fs_texld(src_reg, FS_S0, FS_R0); break; case SHADER_TEXTURE: if (src->is_affine) gen3_fs_texld(src_reg, FS_S0, FS_T0); else gen3_fs_texldp(src_reg, FS_S0, FS_T0); break; case SHADER_NONE: case SHADER_WHITE: case SHADER_BLACK: case SHADER_ZERO: assert(0); case SHADER_CONSTANT: break; } if (src_reg != FS_OC) { if (src->alpha_fixup) gen3_fs_mov(FS_OC, src->rb_reversed ^ op->rb_reversed ? gen3_fs_operand(src_reg, Z, Y, X, ONE) : gen3_fs_operand(src_reg, X, Y, Z, ONE)); else if (dst_is_alpha) gen3_fs_mov(FS_OC, gen3_fs_operand(src_reg, W, W, W, W)); else if (src->rb_reversed ^ op->rb_reversed) gen3_fs_mov(FS_OC, gen3_fs_operand(src_reg, Z, Y, X, W)); else gen3_fs_mov(FS_OC, gen3_fs_operand_reg(src_reg)); } else if (src->alpha_fixup) gen3_fs_mov_masked(FS_OC, MASK_W, gen3_fs_operand_one()); } else { int out_reg = FS_OC; if (op->rb_reversed) out_reg = FS_U0; switch (mask->u.gen3.type) { case SHADER_CONSTANT: gen3_fs_dcl(FS_T9); mask_reg = FS_T9; break; case SHADER_TEXTURE: case SHADER_LINEAR: case SHADER_RADIAL: gen3_fs_dcl(FS_S0 + t); /* fall through */ case SHADER_OPACITY: gen3_fs_dcl(FS_T0 + t); break; case SHADER_ZERO: case SHADER_BLACK: assert(0); case SHADER_NONE: case SHADER_WHITE: break; } t = 0; switch (src->u.gen3.type) { case SHADER_LINEAR: gen3_linear_coord(sna, src, FS_T0, FS_R0); gen3_fs_texld(FS_R0, FS_S0, FS_R0); src_reg = FS_R0; t++; break; case SHADER_RADIAL: gen3_radial_coord(sna, src, FS_T0, FS_R0); gen3_fs_texld(FS_R0, FS_S0, FS_R0); src_reg = FS_R0; t++; break; case SHADER_TEXTURE: if (src->is_affine) gen3_fs_texld(FS_R0, FS_S0, FS_T0); else gen3_fs_texldp(FS_R0, FS_S0, FS_T0); src_reg = FS_R0; t++; break; case SHADER_CONSTANT: case SHADER_NONE: case SHADER_ZERO: case SHADER_BLACK: case SHADER_WHITE: break; } if (src->alpha_fixup) gen3_fs_mov_masked(src_reg, MASK_W, gen3_fs_operand_one()); if (src->rb_reversed) gen3_fs_mov(src_reg, gen3_fs_operand(src_reg, Z, Y, X, W)); switch (mask->u.gen3.type) { case SHADER_LINEAR: gen3_linear_coord(sna, mask, FS_T0 + t, FS_R1); gen3_fs_texld(FS_R1, FS_S0 + t, FS_R1); mask_reg = FS_R1; break; case SHADER_RADIAL: gen3_radial_coord(sna, mask, FS_T0 + t, FS_R1); gen3_fs_texld(FS_R1, FS_S0 + t, FS_R1); mask_reg = FS_R1; break; case SHADER_TEXTURE: if (mask->is_affine) gen3_fs_texld(FS_R1, FS_S0 + t, FS_T0 + t); else gen3_fs_texldp(FS_R1, FS_S0 + t, FS_T0 + t); mask_reg = FS_R1; break; case SHADER_OPACITY: switch (src->u.gen3.type) { case SHADER_BLACK: case SHADER_WHITE: if (dst_is_alpha || src->u.gen3.type == SHADER_WHITE) { gen3_fs_mov(out_reg, gen3_fs_operand(FS_T0 + t, X, X, X, X)); } else { gen3_fs_mov(out_reg, gen3_fs_operand(FS_T0 + t, ZERO, ZERO, ZERO, X)); } break; default: if (dst_is_alpha) { gen3_fs_mul(out_reg, gen3_fs_operand(src_reg, W, W, W, W), gen3_fs_operand(FS_T0 + t, X, X, X, X)); } else { gen3_fs_mul(out_reg, gen3_fs_operand(src_reg, X, Y, Z, W), gen3_fs_operand(FS_T0 + t, X, X, X, X)); } } goto mask_done; case SHADER_CONSTANT: case SHADER_ZERO: case SHADER_BLACK: case SHADER_WHITE: case SHADER_NONE: break; } if (mask->alpha_fixup) gen3_fs_mov_masked(mask_reg, MASK_W, gen3_fs_operand_one()); if (mask->rb_reversed) gen3_fs_mov(mask_reg, gen3_fs_operand(mask_reg, Z, Y, X, W)); if (dst_is_alpha) { switch (src->u.gen3.type) { case SHADER_BLACK: case SHADER_WHITE: gen3_fs_mov(out_reg, gen3_fs_operand(mask_reg, W, W, W, W)); break; default: gen3_fs_mul(out_reg, gen3_fs_operand(src_reg, W, W, W, W), gen3_fs_operand(mask_reg, W, W, W, W)); break; } } else { /* If component alpha is active in the mask and the blend * operation uses the source alpha, then we know we don't * need the source value (otherwise we would have hit a * fallback earlier), so we provide the source alpha (src.A * * mask.X) as output color. * Conversely, if CA is set and we don't need the source alpha, * then we produce the source value (src.X * mask.X) and the * source alpha is unused. Otherwise, we provide the non-CA * source value (src.X * mask.A). */ if (op->has_component_alpha) { switch (src->u.gen3.type) { case SHADER_BLACK: if (gen3_blend_op[blend].src_alpha) gen3_fs_mov(out_reg, gen3_fs_operand_reg(mask_reg)); else gen3_fs_mov(out_reg, gen3_fs_operand(mask_reg, ZERO, ZERO, ZERO, W)); break; case SHADER_WHITE: gen3_fs_mov(out_reg, gen3_fs_operand_reg(mask_reg)); break; default: if (gen3_blend_op[blend].src_alpha) gen3_fs_mul(out_reg, gen3_fs_operand(src_reg, W, W, W, W), gen3_fs_operand_reg(mask_reg)); else gen3_fs_mul(out_reg, gen3_fs_operand_reg(src_reg), gen3_fs_operand_reg(mask_reg)); break; } } else { switch (src->u.gen3.type) { case SHADER_WHITE: gen3_fs_mov(out_reg, gen3_fs_operand(mask_reg, W, W, W, W)); break; case SHADER_BLACK: gen3_fs_mov(out_reg, gen3_fs_operand(mask_reg, ZERO, ZERO, ZERO, W)); break; default: gen3_fs_mul(out_reg, gen3_fs_operand_reg(src_reg), gen3_fs_operand(mask_reg, W, W, W, W)); break; } } } mask_done: if (op->rb_reversed) gen3_fs_mov(FS_OC, gen3_fs_operand(FS_U0, Z, Y, X, W)); } done: length = sna->kgem.nbatch - shader_offset; sna->kgem.batch[shader_offset] = _3DSTATE_PIXEL_SHADER_PROGRAM | (length - 2); } static uint32_t gen3_ms_tiling(uint32_t tiling) { uint32_t v = 0; switch (tiling) { case I915_TILING_Y: v |= MS3_TILE_WALK; case I915_TILING_X: v |= MS3_TILED_SURFACE; case I915_TILING_NONE: break; } return v; } static void gen3_emit_invariant(struct sna *sna) { /* Disable independent alpha blend */ OUT_BATCH(_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE | IAB_MODIFY_FUNC | BLENDFUNC_ADD << IAB_FUNC_SHIFT | IAB_MODIFY_SRC_FACTOR | BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT | IAB_MODIFY_DST_FACTOR | BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT); OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) | CSB_TCB(2, 2) | CSB_TCB(3, 3) | CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7)); OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3); OUT_BATCH(0); /* Disable texture coordinate wrap-shortest */ OUT_BATCH((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE | S4_CULLMODE_NONE | S4_VFMT_XY); OUT_BATCH(0); /* Disable fog/stencil. *Enable* write mask. */ OUT_BATCH(S6_COLOR_WRITE_ONLY); /* Disable blending, depth */ OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE); OUT_BATCH(_3DSTATE_LOAD_INDIRECT); OUT_BATCH(0x00000000); OUT_BATCH(_3DSTATE_STIPPLE); OUT_BATCH(0x00000000); sna->render_state.gen3.need_invariant = false; } #define MAX_OBJECTS 3 /* worst case: dst + src + mask */ static void gen3_get_batch(struct sna *sna, const struct sna_composite_op *op) { kgem_set_mode(&sna->kgem, KGEM_RENDER, op->dst.bo); if (!kgem_check_batch(&sna->kgem, 200)) { DBG(("%s: flushing batch: size %d > %d\n", __FUNCTION__, 200, sna->kgem.surface-sna->kgem.nbatch)); kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } if (!kgem_check_reloc(&sna->kgem, MAX_OBJECTS)) { DBG(("%s: flushing batch: reloc %d >= %d\n", __FUNCTION__, sna->kgem.nreloc, (int)KGEM_RELOC_SIZE(&sna->kgem) - MAX_OBJECTS)); kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } if (!kgem_check_exec(&sna->kgem, MAX_OBJECTS)) { DBG(("%s: flushing batch: exec %d >= %d\n", __FUNCTION__, sna->kgem.nexec, (int)KGEM_EXEC_SIZE(&sna->kgem) - MAX_OBJECTS - 1)); kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } if (sna->render_state.gen3.need_invariant) gen3_emit_invariant(sna); #undef MAX_OBJECTS } static void gen3_emit_target(struct sna *sna, struct kgem_bo *bo, int width, int height, int format) { struct gen3_render_state *state = &sna->render_state.gen3; assert(!too_large(width, height)); /* BUF_INFO is an implicit flush, so skip if the target is unchanged. */ assert(bo->unique_id != 0); if (bo->unique_id != state->current_dst) { uint32_t v; DBG(("%s: setting new target id=%d, handle=%d\n", __FUNCTION__, bo->unique_id, bo->handle)); OUT_BATCH(_3DSTATE_BUF_INFO_CMD); OUT_BATCH(BUF_3D_ID_COLOR_BACK | gen3_buf_tiling(bo->tiling) | bo->pitch); OUT_BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER, 0)); OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD); OUT_BATCH(gen3_get_dst_format(format)); v = DRAW_YMAX(height - 1) | DRAW_XMAX(width - 1); if (v != state->last_drawrect_limit) { OUT_BATCH(_3DSTATE_DRAW_RECT_CMD); OUT_BATCH(0); /* XXX dither origin? */ OUT_BATCH(0); OUT_BATCH(v); OUT_BATCH(0); state->last_drawrect_limit = v; } state->current_dst = bo->unique_id; } assert(bo->exec); kgem_bo_mark_dirty(bo); } static void gen3_emit_composite_state(struct sna *sna, const struct sna_composite_op *op) { struct gen3_render_state *state = &sna->render_state.gen3; uint32_t map[4]; uint32_t sampler[4]; struct kgem_bo *bo[2]; unsigned int tex_count, n; uint32_t ss2; gen3_get_batch(sna, op); if (kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo)) { if (op->src.bo == op->dst.bo || op->mask.bo == op->dst.bo) OUT_BATCH(MI_FLUSH | MI_INVALIDATE_MAP_CACHE); else OUT_BATCH(_3DSTATE_MODES_5_CMD | PIPELINE_FLUSH_RENDER_CACHE | PIPELINE_FLUSH_TEXTURE_CACHE); kgem_clear_dirty(&sna->kgem); } gen3_emit_target(sna, op->dst.bo, op->dst.width, op->dst.height, op->dst.format); ss2 = ~0; tex_count = 0; switch (op->src.u.gen3.type) { case SHADER_OPACITY: case SHADER_NONE: assert(0); case SHADER_ZERO: case SHADER_BLACK: case SHADER_WHITE: break; case SHADER_CONSTANT: if (op->src.u.gen3.mode != state->last_diffuse) { OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); OUT_BATCH(op->src.u.gen3.mode); state->last_diffuse = op->src.u.gen3.mode; } break; case SHADER_LINEAR: case SHADER_RADIAL: case SHADER_TEXTURE: ss2 &= ~S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_NOT_PRESENT); ss2 |= S2_TEXCOORD_FMT(tex_count, op->src.is_affine ? TEXCOORDFMT_2D : TEXCOORDFMT_4D); assert(op->src.card_format); map[tex_count * 2 + 0] = op->src.card_format | gen3_ms_tiling(op->src.bo->tiling) | (op->src.height - 1) << MS3_HEIGHT_SHIFT | (op->src.width - 1) << MS3_WIDTH_SHIFT; map[tex_count * 2 + 1] = (op->src.bo->pitch / 4 - 1) << MS4_PITCH_SHIFT; sampler[tex_count * 2 + 0] = op->src.filter; sampler[tex_count * 2 + 1] = op->src.repeat | tex_count << SS3_TEXTUREMAP_INDEX_SHIFT; bo[tex_count] = op->src.bo; tex_count++; break; } switch (op->mask.u.gen3.type) { case SHADER_NONE: case SHADER_ZERO: case SHADER_BLACK: case SHADER_WHITE: break; case SHADER_CONSTANT: if (op->mask.u.gen3.mode != state->last_specular) { OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD); OUT_BATCH(op->mask.u.gen3.mode); state->last_specular = op->mask.u.gen3.mode; } break; case SHADER_LINEAR: case SHADER_RADIAL: case SHADER_TEXTURE: ss2 &= ~S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_NOT_PRESENT); ss2 |= S2_TEXCOORD_FMT(tex_count, op->mask.is_affine ? TEXCOORDFMT_2D : TEXCOORDFMT_4D); assert(op->mask.card_format); map[tex_count * 2 + 0] = op->mask.card_format | gen3_ms_tiling(op->mask.bo->tiling) | (op->mask.height - 1) << MS3_HEIGHT_SHIFT | (op->mask.width - 1) << MS3_WIDTH_SHIFT; map[tex_count * 2 + 1] = (op->mask.bo->pitch / 4 - 1) << MS4_PITCH_SHIFT; sampler[tex_count * 2 + 0] = op->mask.filter; sampler[tex_count * 2 + 1] = op->mask.repeat | tex_count << SS3_TEXTUREMAP_INDEX_SHIFT; bo[tex_count] = op->mask.bo; tex_count++; break; case SHADER_OPACITY: ss2 &= ~S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_NOT_PRESENT); ss2 |= S2_TEXCOORD_FMT(tex_count, TEXCOORDFMT_1D); break; } { uint32_t blend_offset = sna->kgem.nbatch; OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(6) | 1); OUT_BATCH(ss2); OUT_BATCH(gen3_get_blend_cntl(op->op, op->has_component_alpha, op->dst.format)); if (memcmp(sna->kgem.batch + state->last_blend + 1, sna->kgem.batch + blend_offset + 1, 2 * 4) == 0) sna->kgem.nbatch = blend_offset; else state->last_blend = blend_offset; } if (op->u.gen3.num_constants) { int count = op->u.gen3.num_constants; if (state->last_constants) { int last = sna->kgem.batch[state->last_constants+1]; if (last == (1 << (count >> 2)) - 1 && memcmp(&sna->kgem.batch[state->last_constants+2], op->u.gen3.constants, count * sizeof(uint32_t)) == 0) count = 0; } if (count) { state->last_constants = sna->kgem.nbatch; OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | count); OUT_BATCH((1 << (count >> 2)) - 1); memcpy(sna->kgem.batch + sna->kgem.nbatch, op->u.gen3.constants, count * sizeof(uint32_t)); sna->kgem.nbatch += count; } } if (tex_count != 0) { uint32_t rewind; n = 0; if (tex_count == state->tex_count) { for (; n < tex_count; n++) { if (map[2*n+0] != state->tex_map[2*n+0] || map[2*n+1] != state->tex_map[2*n+1] || state->tex_handle[n] != bo[n]->handle || state->tex_delta[n] != bo[n]->delta) break; } } if (n < tex_count) { OUT_BATCH(_3DSTATE_MAP_STATE | (3 * tex_count)); OUT_BATCH((1 << tex_count) - 1); for (n = 0; n < tex_count; n++) { OUT_BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, bo[n], I915_GEM_DOMAIN_SAMPLER<< 16, 0)); OUT_BATCH(map[2*n + 0]); OUT_BATCH(map[2*n + 1]); state->tex_map[2*n+0] = map[2*n+0]; state->tex_map[2*n+1] = map[2*n+1]; state->tex_handle[n] = bo[n]->handle; state->tex_delta[n] = bo[n]->delta; } state->tex_count = n; } rewind = sna->kgem.nbatch; OUT_BATCH(_3DSTATE_SAMPLER_STATE | (3 * tex_count)); OUT_BATCH((1 << tex_count) - 1); for (n = 0; n < tex_count; n++) { OUT_BATCH(sampler[2*n + 0]); OUT_BATCH(sampler[2*n + 1]); OUT_BATCH(0); } if (state->last_sampler && memcmp(&sna->kgem.batch[state->last_sampler+1], &sna->kgem.batch[rewind + 1], (3*tex_count + 1)*sizeof(uint32_t)) == 0) sna->kgem.nbatch = rewind; else state->last_sampler = rewind; } gen3_composite_emit_shader(sna, op, op->op); } static bool gen3_magic_ca_pass(struct sna *sna, const struct sna_composite_op *op) { if (!op->need_magic_ca_pass) return false; DBG(("%s(%d)\n", __FUNCTION__, sna->render.vertex_index - sna->render.vertex_start)); OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(6) | 0); OUT_BATCH(gen3_get_blend_cntl(PictOpAdd, true, op->dst.format)); gen3_composite_emit_shader(sna, op, PictOpAdd); OUT_BATCH(PRIM3D_RECTLIST | PRIM3D_INDIRECT_SEQUENTIAL | (sna->render.vertex_index - sna->render.vertex_start)); OUT_BATCH(sna->render.vertex_start); sna->render_state.gen3.last_blend = 0; return true; } static void gen3_vertex_flush(struct sna *sna) { assert(sna->render.vertex_offset); DBG(("%s[%x] = %d\n", __FUNCTION__, 4*sna->render.vertex_offset, sna->render.vertex_index - sna->render.vertex_start)); sna->kgem.batch[sna->render.vertex_offset] = PRIM3D_RECTLIST | PRIM3D_INDIRECT_SEQUENTIAL | (sna->render.vertex_index - sna->render.vertex_start); sna->kgem.batch[sna->render.vertex_offset + 1] = sna->render.vertex_start; sna->render.vertex_offset = 0; } static int gen3_vertex_finish(struct sna *sna) { struct kgem_bo *bo; DBG(("%s: used=%d/%d, vbo active? %d\n", __FUNCTION__, sna->render.vertex_used, sna->render.vertex_size, sna->render.vbo ? sna->render.vbo->handle : 0)); assert(sna->render.vertex_offset == 0); assert(sna->render.vertex_used); assert(sna->render.vertex_used <= sna->render.vertex_size); sna_vertex_wait__locked(&sna->render); bo = sna->render.vbo; if (bo) { DBG(("%s: reloc = %d\n", __FUNCTION__, sna->render.vertex_reloc[0])); if (sna->render.vertex_reloc[0]) { sna->kgem.batch[sna->render.vertex_reloc[0]] = kgem_add_reloc(&sna->kgem, sna->render.vertex_reloc[0], bo, I915_GEM_DOMAIN_VERTEX << 16, 0); sna->render.vertex_reloc[0] = 0; } sna->render.vertex_used = 0; sna->render.vertex_index = 0; sna->render.vbo = NULL; kgem_bo_destroy(&sna->kgem, bo); } sna->render.vertices = NULL; sna->render.vbo = kgem_create_linear(&sna->kgem, 256*1024, CREATE_GTT_MAP); if (sna->render.vbo) sna->render.vertices = kgem_bo_map(&sna->kgem, sna->render.vbo); if (sna->render.vertices == NULL) { if (sna->render.vbo) kgem_bo_destroy(&sna->kgem, sna->render.vbo); sna->render.vbo = NULL; return 0; } assert(sna->render.vbo->snoop == false); if (sna->render.vertex_used) { memcpy(sna->render.vertices, sna->render.vertex_data, sizeof(float)*sna->render.vertex_used); } sna->render.vertex_size = 64 * 1024 - 1; return sna->render.vertex_size - sna->render.vertex_used; } static void gen3_vertex_close(struct sna *sna) { struct kgem_bo *bo, *free_bo = NULL; unsigned int delta = 0; assert(sna->render.vertex_offset == 0); if (sna->render.vertex_reloc[0] == 0) return; DBG(("%s: used=%d/%d, vbo active? %d\n", __FUNCTION__, sna->render.vertex_used, sna->render.vertex_size, sna->render.vbo ? sna->render.vbo->handle : 0)); bo = sna->render.vbo; if (bo) { if (sna->render.vertex_size - sna->render.vertex_used < 64) { DBG(("%s: discarding full vbo\n", __FUNCTION__)); sna->render.vbo = NULL; sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); free_bo = bo; } else if (sna->render.vertices == MAP(bo->map__cpu)) { DBG(("%s: converting CPU map to GTT\n", __FUNCTION__)); sna->render.vertices = kgem_bo_map__gtt(&sna->kgem, bo); if (sna->render.vertices == NULL) { DBG(("%s: discarding non-mappable vertices\n",__FUNCTION__)); sna->render.vbo = NULL; sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); free_bo = bo; } } } else { if (sna->kgem.nbatch + sna->render.vertex_used <= sna->kgem.surface) { DBG(("%s: copy to batch: %d @ %d\n", __FUNCTION__, sna->render.vertex_used, sna->kgem.nbatch)); memcpy(sna->kgem.batch + sna->kgem.nbatch, sna->render.vertex_data, sna->render.vertex_used * 4); delta = sna->kgem.nbatch * 4; bo = NULL; sna->kgem.nbatch += sna->render.vertex_used; } else { DBG(("%s: new vbo: %d\n", __FUNCTION__, sna->render.vertex_used)); bo = kgem_create_linear(&sna->kgem, 4*sna->render.vertex_used, CREATE_NO_THROTTLE); if (bo) { assert(bo->snoop == false); kgem_bo_write(&sna->kgem, bo, sna->render.vertex_data, 4*sna->render.vertex_used); } free_bo = bo; } } DBG(("%s: reloc = %d\n", __FUNCTION__, sna->render.vertex_reloc[0])); sna->kgem.batch[sna->render.vertex_reloc[0]] = kgem_add_reloc(&sna->kgem, sna->render.vertex_reloc[0], bo, I915_GEM_DOMAIN_VERTEX << 16, delta); sna->render.vertex_reloc[0] = 0; if (sna->render.vbo == NULL) { DBG(("%s: resetting vbo\n", __FUNCTION__)); sna->render.vertex_used = 0; sna->render.vertex_index = 0; assert(sna->render.vertices == sna->render.vertex_data); assert(sna->render.vertex_size == ARRAY_SIZE(sna->render.vertex_data)); } if (free_bo) kgem_bo_destroy(&sna->kgem, free_bo); } static bool gen3_rectangle_begin(struct sna *sna, const struct sna_composite_op *op) { struct gen3_render_state *state = &sna->render_state.gen3; int ndwords, i1_cmd = 0, i1_len = 0; if (sna_vertex_wait__locked(&sna->render) && sna->render.vertex_offset) return true; ndwords = 2; if (op->need_magic_ca_pass) ndwords += 100; if (sna->render.vertex_reloc[0] == 0) i1_len++, i1_cmd |= I1_LOAD_S(0), ndwords++; if (state->floats_per_vertex != op->floats_per_vertex) i1_len++, i1_cmd |= I1_LOAD_S(1), ndwords++; if (!kgem_check_batch(&sna->kgem, ndwords+1)) return false; if (i1_cmd) { OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | i1_cmd | (i1_len - 1)); if (sna->render.vertex_reloc[0] == 0) sna->render.vertex_reloc[0] = sna->kgem.nbatch++; if (state->floats_per_vertex != op->floats_per_vertex) { state->floats_per_vertex = op->floats_per_vertex; OUT_BATCH(state->floats_per_vertex << S1_VERTEX_WIDTH_SHIFT | state->floats_per_vertex << S1_VERTEX_PITCH_SHIFT); } } if (sna->kgem.nbatch == 2 + state->last_vertex_offset && !op->need_magic_ca_pass) { sna->render.vertex_offset = state->last_vertex_offset; } else { sna->render.vertex_offset = sna->kgem.nbatch; OUT_BATCH(MI_NOOP); /* to be filled later */ OUT_BATCH(MI_NOOP); sna->render.vertex_start = sna->render.vertex_index; state->last_vertex_offset = sna->render.vertex_offset; } return true; } static int gen3_get_rectangles__flush(struct sna *sna, const struct sna_composite_op *op) { /* Preventing discarding new vbo after lock contention */ if (sna_vertex_wait__locked(&sna->render)) { int rem = vertex_space(sna); if (rem > op->floats_per_rect) return rem; } if (!kgem_check_batch(&sna->kgem, op->need_magic_ca_pass ? 105: 5)) return 0; if (!kgem_check_reloc_and_exec(&sna->kgem, 1)) return 0; if (sna->render.vertex_offset) { gen3_vertex_flush(sna); if (gen3_magic_ca_pass(sna, op)) { OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(6) | 0); OUT_BATCH(gen3_get_blend_cntl(op->op, op->has_component_alpha, op->dst.format)); gen3_composite_emit_shader(sna, op, op->op); } } return gen3_vertex_finish(sna); } inline static int gen3_get_rectangles(struct sna *sna, const struct sna_composite_op *op, int want) { int rem; DBG(("%s: want=%d, rem=%d\n", __FUNCTION__, want*op->floats_per_rect, vertex_space(sna))); assert(want); assert(sna->render.vertex_index * op->floats_per_vertex == sna->render.vertex_used); start: rem = vertex_space(sna); if (unlikely(op->floats_per_rect > rem)) { DBG(("flushing vbo for %s: %d < %d\n", __FUNCTION__, rem, op->floats_per_rect)); rem = gen3_get_rectangles__flush(sna, op); if (unlikely(rem == 0)) goto flush; } if (unlikely(sna->render.vertex_offset == 0)) { if (!gen3_rectangle_begin(sna, op)) goto flush; else goto start; } assert(rem <= vertex_space(sna)); assert(op->floats_per_rect <= rem); if (want > 1 && want * op->floats_per_rect > rem) want = rem / op->floats_per_rect; sna->render.vertex_index += 3*want; assert(want); assert(sna->render.vertex_index * op->floats_per_vertex <= sna->render.vertex_size); return want; flush: DBG(("%s: flushing batch\n", __FUNCTION__)); if (sna->render.vertex_offset) { gen3_vertex_flush(sna); gen3_magic_ca_pass(sna, op); } sna_vertex_wait__locked(&sna->render); _kgem_submit(&sna->kgem); gen3_emit_composite_state(sna, op); assert(sna->render.vertex_offset == 0); assert(sna->render.vertex_reloc[0] == 0); goto start; } fastcall static void gen3_render_composite_blt(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { DBG(("%s: src=(%d, %d)+(%d, %d), mask=(%d, %d)+(%d, %d), dst=(%d, %d)+(%d, %d), size=(%d, %d)\n", __FUNCTION__, r->src.x, r->src.y, op->src.offset[0], op->src.offset[1], r->mask.x, r->mask.y, op->mask.offset[0], op->mask.offset[1], r->dst.x, r->dst.y, op->dst.x, op->dst.y, r->width, r->height)); gen3_get_rectangles(sna, op, 1); op->prim_emit(sna, op, r); } fastcall static void gen3_render_composite_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { struct sna_composite_rectangles r; DBG(("%s: src=+(%d, %d), mask=+(%d, %d), dst=+(%d, %d)\n", __FUNCTION__, op->src.offset[0], op->src.offset[1], op->mask.offset[0], op->mask.offset[1], op->dst.x, op->dst.y)); gen3_get_rectangles(sna, op, 1); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.src = r.mask = r.dst; op->prim_emit(sna, op, &r); } static void gen3_render_composite_boxes__blt(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d, src=+(%d, %d), mask=+(%d, %d), dst=+(%d, %d)\n", __FUNCTION__, nbox, op->src.offset[0], op->src.offset[1], op->mask.offset[0], op->mask.offset[1], op->dst.x, op->dst.y)); do { int nbox_this_time; nbox_this_time = gen3_get_rectangles(sna, op, nbox); nbox -= nbox_this_time; do { struct sna_composite_rectangles r; DBG((" %s: (%d, %d) x (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.src = r.mask = r.dst; op->prim_emit(sna, op, &r); box++; } while (--nbox_this_time); } while (nbox); } static void gen3_render_composite_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); do { int nbox_this_time; float *v; nbox_this_time = gen3_get_rectangles(sna, op, nbox); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; } while (nbox); } static void gen3_render_composite_boxes__thread(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen3_get_rectangles(sna, op, nbox); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } static void gen3_render_composite_done(struct sna *sna, const struct sna_composite_op *op) { DBG(("%s()\n", __FUNCTION__)); if (sna->render.vertex_offset) { gen3_vertex_flush(sna); gen3_magic_ca_pass(sna, op); } if (op->mask.bo) kgem_bo_destroy(&sna->kgem, op->mask.bo); if (op->src.bo) kgem_bo_destroy(&sna->kgem, op->src.bo); sna_render_composite_redirect_done(sna, op); } static void discard_vbo(struct sna *sna) { kgem_bo_destroy(&sna->kgem, sna->render.vbo); sna->render.vbo = NULL; sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); sna->render.vertex_used = 0; sna->render.vertex_index = 0; } static void gen3_render_reset(struct sna *sna) { struct gen3_render_state *state = &sna->render_state.gen3; state->need_invariant = true; state->current_dst = 0; state->tex_count = 0; state->last_drawrect_limit = ~0U; state->last_target = 0; state->last_blend = 0; state->last_constants = 0; state->last_sampler = 0; state->last_shader = 0x7fffffff; state->last_diffuse = 0xcc00ffee; state->last_specular = 0xcc00ffee; state->floats_per_vertex = 0; state->last_floats_per_vertex = 0; state->last_vertex_offset = 0; if (sna->render.vbo && !kgem_bo_can_map(&sna->kgem, sna->render.vbo)) { DBG(("%s: discarding vbo as next access will stall: %lx\n", __FUNCTION__, (long)sna->render.vbo->presumed_offset)); discard_vbo(sna); } sna->render.vertex_reloc[0] = 0; sna->render.vertex_offset = 0; } static void gen3_render_retire(struct kgem *kgem) { struct sna *sna; sna = container_of(kgem, struct sna, kgem); if (sna->render.vertex_reloc[0] == 0 && sna->render.vbo && !kgem_bo_is_busy(sna->render.vbo)) { DBG(("%s: resetting idle vbo\n", __FUNCTION__)); sna->render.vertex_used = 0; sna->render.vertex_index = 0; } } static void gen3_render_expire(struct kgem *kgem) { struct sna *sna; sna = container_of(kgem, struct sna, kgem); if (sna->render.vbo && !sna->render.vertex_used) { DBG(("%s: discarding vbo\n", __FUNCTION__)); discard_vbo(sna); } } static bool gen3_composite_channel_set_format(struct sna_composite_channel *channel, CARD32 format) { unsigned int i; for (i = 0; i < ARRAY_SIZE(gen3_tex_formats); i++) { if (gen3_tex_formats[i].fmt == format) { channel->card_format = gen3_tex_formats[i].card_fmt; channel->rb_reversed = gen3_tex_formats[i].rb_reversed; return true; } } return false; } static bool source_is_covered(PicturePtr picture, int x, int y, int width, int height) { int x1, y1, x2, y2; if (picture->repeat && picture->repeatType != RepeatNone) return true; if (picture->pDrawable == NULL) return false; if (picture->transform) { pixman_box16_t sample; sample.x1 = x; sample.y1 = y; sample.x2 = x + width; sample.y2 = y + height; pixman_transform_bounds(picture->transform, &sample); x1 = sample.x1; x2 = sample.x2; y1 = sample.y1; y2 = sample.y2; } else { x1 = x; y1 = y; x2 = x + width; y2 = y + height; } return x1 >= 0 && y1 >= 0 && x2 <= picture->pDrawable->width && y2 <= picture->pDrawable->height; } static bool gen3_composite_channel_set_xformat(PicturePtr picture, struct sna_composite_channel *channel, int x, int y, int width, int height) { unsigned int i; if (PICT_FORMAT_A(picture->format) != 0) return false; if (width == 0 || height == 0) return false; if (!source_is_covered(picture, x, y, width, height)) return false; for (i = 0; i < ARRAY_SIZE(gen3_tex_formats); i++) { if (gen3_tex_formats[i].xfmt == picture->format) { channel->card_format = gen3_tex_formats[i].card_fmt; channel->rb_reversed = gen3_tex_formats[i].rb_reversed; channel->alpha_fixup = true; return true; } } return false; } static int gen3_init_solid(struct sna_composite_channel *channel, uint32_t color) { channel->u.gen3.mode = color; channel->u.gen3.type = SHADER_CONSTANT; if (color == 0) channel->u.gen3.type = SHADER_ZERO; else if (color == 0xff000000) channel->u.gen3.type = SHADER_BLACK; else if (color == 0xffffffff) channel->u.gen3.type = SHADER_WHITE; channel->bo = NULL; channel->is_opaque = (color >> 24) == 0xff; channel->is_affine = 1; channel->alpha_fixup = 0; channel->rb_reversed = 0; DBG(("%s: color=%08x, is_opaque=%d, type=%d\n", __FUNCTION__, color, channel->is_opaque, channel->u.gen3.type)); /* for consistency */ channel->repeat = RepeatNormal; channel->filter = PictFilterNearest; channel->pict_format = PICT_a8r8g8b8; channel->card_format = MAPSURF_32BIT | MT_32BIT_ARGB8888; return 1; } static void gen3_composite_channel_convert(struct sna_composite_channel *channel) { if (channel->u.gen3.type == SHADER_TEXTURE) channel->repeat = gen3_texture_repeat(channel->repeat); else channel->repeat = gen3_gradient_repeat(channel->repeat); channel->filter = gen3_filter(channel->filter); if (channel->card_format == 0) gen3_composite_channel_set_format(channel, channel->pict_format); assert(channel->card_format); } static bool gen3_gradient_setup(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int16_t ox, int16_t oy) { int16_t dx, dy; if (picture->repeat == 0) { channel->repeat = RepeatNone; } else switch (picture->repeatType) { case RepeatNone: case RepeatNormal: case RepeatPad: case RepeatReflect: channel->repeat = picture->repeatType; break; default: return false; } channel->bo = sna_render_get_gradient(sna, (PictGradient *)picture->pSourcePict); if (channel->bo == NULL) return false; channel->pict_format = PICT_a8r8g8b8; channel->card_format = MAPSURF_32BIT | MT_32BIT_ARGB8888; channel->filter = PictFilterNearest; channel->is_affine = sna_transform_is_affine(picture->transform); if (sna_transform_is_imprecise_integer_translation(picture->transform, PictFilterNearest, false, &dx, &dy)) { DBG(("%s: integer translation (%d, %d), removing\n", __FUNCTION__, dx, dy)); ox += dx; oy += dy; channel->transform = NULL; } else channel->transform = picture->transform; channel->width = channel->bo->pitch / 4; channel->height = 1; channel->offset[0] = ox; channel->offset[1] = oy; channel->scale[0] = channel->scale[1] = 1; return true; } static int gen3_init_linear(struct sna *sna, PicturePtr picture, struct sna_composite_op *op, struct sna_composite_channel *channel, int ox, int oy) { PictLinearGradient *linear = (PictLinearGradient *)picture->pSourcePict; float x0, y0, sf; float dx, dy, offset; int n; DBG(("%s: p1=(%f, %f), p2=(%f, %f)\n", __FUNCTION__, xFixedToDouble(linear->p1.x), xFixedToDouble(linear->p1.y), xFixedToDouble(linear->p2.x), xFixedToDouble(linear->p2.y))); if (linear->p2.x == linear->p1.x && linear->p2.y == linear->p1.y) return 0; dx = xFixedToDouble(linear->p2.x - linear->p1.x); dy = xFixedToDouble(linear->p2.y - linear->p1.y); sf = dx*dx + dy*dy; dx /= sf; dy /= sf; x0 = xFixedToDouble(linear->p1.x); y0 = xFixedToDouble(linear->p1.y); offset = dx*x0 + dy*y0; n = op->u.gen3.num_constants; channel->u.gen3.constants = FS_C0 + n / 4; op->u.gen3.constants[n++] = dx; op->u.gen3.constants[n++] = dy; op->u.gen3.constants[n++] = -offset; op->u.gen3.constants[n++] = 0; if (!gen3_gradient_setup(sna, picture, channel, ox, oy)) return -1; channel->u.gen3.type = SHADER_LINEAR; op->u.gen3.num_constants = n; DBG(("%s: dx=%f, dy=%f, offset=%f, constants=%d\n", __FUNCTION__, dx, dy, -offset, channel->u.gen3.constants - FS_C0)); return 1; } static int gen3_init_radial(struct sna *sna, PicturePtr picture, struct sna_composite_op *op, struct sna_composite_channel *channel, int ox, int oy) { PictRadialGradient *radial = (PictRadialGradient *)picture->pSourcePict; double dx, dy, dr, r1; int n; dx = xFixedToDouble(radial->c2.x - radial->c1.x); dy = xFixedToDouble(radial->c2.y - radial->c1.y); dr = xFixedToDouble(radial->c2.radius - radial->c1.radius); r1 = xFixedToDouble(radial->c1.radius); n = op->u.gen3.num_constants; channel->u.gen3.constants = FS_C0 + n / 4; if (radial->c2.x == radial->c1.x && radial->c2.y == radial->c1.y) { if (radial->c2.radius == radial->c1.radius) { channel->u.gen3.type = SHADER_ZERO; return 1; } op->u.gen3.constants[n++] = xFixedToDouble(radial->c1.x) / dr; op->u.gen3.constants[n++] = xFixedToDouble(radial->c1.y) / dr; op->u.gen3.constants[n++] = 1. / dr; op->u.gen3.constants[n++] = -r1 / dr; channel->u.gen3.mode = RADIAL_ONE; } else { op->u.gen3.constants[n++] = -xFixedToDouble(radial->c1.x); op->u.gen3.constants[n++] = -xFixedToDouble(radial->c1.y); op->u.gen3.constants[n++] = r1; op->u.gen3.constants[n++] = -4 * (dx*dx + dy*dy - dr*dr); op->u.gen3.constants[n++] = -2 * dx; op->u.gen3.constants[n++] = -2 * dy; op->u.gen3.constants[n++] = -2 * r1 * dr; op->u.gen3.constants[n++] = 1 / (2 * (dx*dx + dy*dy - dr*dr)); channel->u.gen3.mode = RADIAL_TWO; } if (!gen3_gradient_setup(sna, picture, channel, ox, oy)) return -1; channel->u.gen3.type = SHADER_RADIAL; op->u.gen3.num_constants = n; return 1; } static bool sna_picture_is_clear(PicturePtr picture, int x, int y, int w, int h, uint32_t *color) { struct sna_pixmap *priv; if (!picture->pDrawable) return false; priv = sna_pixmap(get_drawable_pixmap(picture->pDrawable)); if (priv == NULL || !priv->clear) return false; if (!source_is_covered(picture, x, y, w, h)) return false; *color = priv->clear_color; return true; } static int gen3_composite_picture(struct sna *sna, PicturePtr picture, struct sna_composite_op *op, struct sna_composite_channel *channel, int16_t x, int16_t y, int16_t w, int16_t h, int16_t dst_x, int16_t dst_y, bool precise) { PixmapPtr pixmap; uint32_t color; int16_t dx, dy; DBG(("%s: (%d, %d)x(%d, %d), dst=(%d, %d)\n", __FUNCTION__, x, y, w, h, dst_x, dst_y)); channel->card_format = 0; if (picture->pDrawable == NULL) { SourcePict *source = picture->pSourcePict; int ret = -1; switch (source->type) { case SourcePictTypeSolidFill: DBG(("%s: solid fill [%08x], format %08x\n", __FUNCTION__, (unsigned)source->solidFill.color, (unsigned)picture->format)); ret = gen3_init_solid(channel, source->solidFill.color); break; case SourcePictTypeLinear: ret = gen3_init_linear(sna, picture, op, channel, x - dst_x, y - dst_y); break; case SourcePictTypeRadial: ret = gen3_init_radial(sna, picture, op, channel, x - dst_x, y - dst_y); break; } if (ret == -1) { if (!precise) ret = sna_render_picture_approximate_gradient(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (ret == -1) ret = sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } return ret; } if (picture->alphaMap) { DBG(("%s -- fallback, alphamap\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } if (sna_picture_is_solid(picture, &color)) { DBG(("%s: solid drawable [%08x]\n", __FUNCTION__, color)); return gen3_init_solid(channel, color); } if (sna_picture_is_clear(picture, x, y, w, h, &color)) { DBG(("%s: clear drawable [%08x]\n", __FUNCTION__, color)); return gen3_init_solid(channel, color_convert(color, picture->format, PICT_a8r8g8b8)); } if (!gen3_check_repeat(picture)) return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (!gen3_check_filter(picture)) return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); channel->repeat = picture->repeat ? picture->repeatType : RepeatNone; channel->filter = picture->filter; channel->pict_format = picture->format; pixmap = get_drawable_pixmap(picture->pDrawable); get_drawable_deltas(picture->pDrawable, pixmap, &dx, &dy); x += dx + picture->pDrawable->x; y += dy + picture->pDrawable->y; if (sna_transform_is_imprecise_integer_translation(picture->transform, picture->filter, precise, &dx, &dy)) { DBG(("%s: integer translation (%d, %d), removing\n", __FUNCTION__, dx, dy)); x += dx; y += dy; channel->transform = NULL; channel->filter = PictFilterNearest; if (channel->repeat || (x >= 0 && y >= 0 && x + w < pixmap->drawable.width && y + h < pixmap->drawable.height)) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv && priv->clear) { DBG(("%s: converting large pixmap source into solid [%08x]\n", __FUNCTION__, priv->clear_color)); return gen3_init_solid(channel, priv->clear_color); } } } else { channel->transform = picture->transform; channel->is_affine = sna_transform_is_affine(picture->transform); } if (!gen3_composite_channel_set_format(channel, picture->format) && !gen3_composite_channel_set_xformat(picture, channel, x, y, w, h)) return sna_render_picture_convert(sna, picture, channel, pixmap, x, y, w, h, dst_x, dst_y, false); assert(channel->card_format); if (too_large(pixmap->drawable.width, pixmap->drawable.height)) { DBG(("%s: pixmap too large (%dx%d), extracting (%d, %d)x(%d,%d)\n", __FUNCTION__, pixmap->drawable.width, pixmap->drawable.height, x, y, w, h)); return sna_render_picture_extract(sna, picture, channel, x, y, w, h, dst_x, dst_y); } return sna_render_pixmap_bo(sna, channel, pixmap, x, y, w, h, dst_x, dst_y); } static void gen3_align_vertex(struct sna *sna, const struct sna_composite_op *op) { int vertex_index; if (op->floats_per_vertex == sna->render_state.gen3.last_floats_per_vertex) return; DBG(("aligning vertex: was %d, now %d floats per vertex\n", sna->render_state.gen3.last_floats_per_vertex, op->floats_per_vertex)); assert(op->floats_per_rect == 3*op->floats_per_vertex); vertex_index = (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex; if ((int)sna->render.vertex_size - vertex_index * op->floats_per_vertex < 2*op->floats_per_rect) { DBG(("%s: flushing vertex buffer: new index=%d, max=%d\n", __FUNCTION__, vertex_index, sna->render.vertex_size / op->floats_per_vertex)); if (gen3_vertex_finish(sna) < 2*op->floats_per_vertex) kgem_submit(&sna->kgem); vertex_index = (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex; } sna->render.vertex_index = vertex_index; sna->render.vertex_used = vertex_index * op->floats_per_vertex; } static bool gen3_composite_set_target(struct sna *sna, struct sna_composite_op *op, PicturePtr dst, int x, int y, int w, int h, bool partial) { BoxRec box; unsigned hint; op->dst.pixmap = get_drawable_pixmap(dst->pDrawable); op->dst.format = dst->format; op->dst.width = op->dst.pixmap->drawable.width; op->dst.height = op->dst.pixmap->drawable.height; if (w && h) { box.x1 = x; box.y1 = y; box.x2 = x + w; box.y2 = y + h; } else sna_render_picture_extents(dst, &box); hint = PREFER_GPU | FORCE_GPU | RENDER_GPU; if (!partial) { hint |= IGNORE_DAMAGE; if (w == op->dst.width && h == op->dst.height) hint |= REPLACES; } op->dst.bo = sna_drawable_use_bo(dst->pDrawable, hint, &box, &op->damage); if (op->dst.bo == NULL) return false; if (hint & REPLACES) { struct sna_pixmap *priv = sna_pixmap(op->dst.pixmap); kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); } assert(op->dst.bo->unique_id); /* For single-stream mode there should be no minimum alignment * required, except that the width must be at least 2 elements. * Furthermore, it appears that the pitch must be a multiple of * 2 elements. */ if (op->dst.bo->pitch & ((2*op->dst.pixmap->drawable.bitsPerPixel >> 3) - 1)) return false; get_drawable_deltas(dst->pDrawable, op->dst.pixmap, &op->dst.x, &op->dst.y); DBG(("%s: pixmap=%ld, format=%08x, size=%dx%d, pitch=%d, delta=(%d,%d),damage=%p\n", __FUNCTION__, op->dst.pixmap->drawable.serialNumber, (int)op->dst.format, op->dst.width, op->dst.height, op->dst.bo->pitch, op->dst.x, op->dst.y, op->damage ? *op->damage : (void *)-1)); assert(op->dst.bo->proxy == NULL); if ((too_large(op->dst.width, op->dst.height) || !gen3_check_pitch_3d(op->dst.bo)) && !sna_render_composite_redirect(sna, op, x, y, w, h, partial)) return false; return true; } static inline uint8_t mul_8_8(uint8_t a, uint8_t b) { uint16_t t = a * (uint16_t)b + 0x7f; return ((t >> 8) + t) >> 8; } static inline uint32_t multa(uint32_t s, uint32_t m, int shift) { return mul_8_8((s >> shift) & 0xff, m >> 24) << shift; } static inline bool is_constant_ps(uint32_t type) { switch (type) { case SHADER_NONE: /* be warned! */ case SHADER_ZERO: case SHADER_BLACK: case SHADER_WHITE: case SHADER_CONSTANT: return true; default: return false; } } static bool has_alphamap(PicturePtr p) { return p->alphaMap != NULL; } static bool need_upload(PicturePtr p) { return p->pDrawable && unattached(p->pDrawable) && untransformed(p); } static bool source_is_busy(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv == NULL) return false; if (priv->clear) return false; if (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo)) return true; if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; return priv->gpu_damage && !priv->cpu_damage; } static bool is_unhandled_gradient(PicturePtr picture, bool precise) { if (picture->pDrawable) return false; switch (picture->pSourcePict->type) { case SourcePictTypeSolidFill: case SourcePictTypeLinear: case SourcePictTypeRadial: return false; default: return precise; } } static bool source_fallback(PicturePtr p, PixmapPtr pixmap, bool precise) { if (sna_picture_is_solid(p, NULL)) return false; if (is_unhandled_gradient(p, precise)) return true; if (!gen3_check_xformat(p) || !gen3_check_repeat(p)) return true; if (pixmap && source_is_busy(pixmap)) return false; return has_alphamap(p) || !gen3_check_filter(p) || need_upload(p); } static bool gen3_composite_fallback(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr mask, PicturePtr dst) { PixmapPtr src_pixmap; PixmapPtr mask_pixmap; PixmapPtr dst_pixmap; bool src_fallback, mask_fallback; if (!gen3_check_dst_format(dst->format)) { DBG(("%s: unknown destination format: %d\n", __FUNCTION__, dst->format)); return true; } dst_pixmap = get_drawable_pixmap(dst->pDrawable); src_pixmap = src->pDrawable ? get_drawable_pixmap(src->pDrawable) : NULL; src_fallback = source_fallback(src, src_pixmap, dst->polyMode == PolyModePrecise); if (mask) { mask_pixmap = mask->pDrawable ? get_drawable_pixmap(mask->pDrawable) : NULL; mask_fallback = source_fallback(mask, mask_pixmap, dst->polyMode == PolyModePrecise); } else { mask_pixmap = NULL; mask_fallback = false; } /* If we are using the destination as a source and need to * readback in order to upload the source, do it all * on the cpu. */ if (src_pixmap == dst_pixmap && src_fallback) { DBG(("%s: src is dst and will fallback\n",__FUNCTION__)); return true; } if (mask_pixmap == dst_pixmap && mask_fallback) { DBG(("%s: mask is dst and will fallback\n",__FUNCTION__)); return true; } if (mask && mask->componentAlpha && PICT_FORMAT_RGB(mask->format) && gen3_blend_op[op].src_alpha && gen3_blend_op[op].src_blend != BLENDFACT_ZERO && op != PictOpOver) { DBG(("%s: component-alpha mask with op=%d, should fallback\n", __FUNCTION__, op)); return true; } /* If anything is on the GPU, push everything out to the GPU */ if (dst_use_gpu(dst_pixmap)) { DBG(("%s: dst is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (src_pixmap && !src_fallback) { DBG(("%s: src is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (mask_pixmap && !mask_fallback) { DBG(("%s: mask is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } /* However if the dst is not on the GPU and we need to * render one of the sources using the CPU, we may * as well do the entire operation in place onthe CPU. */ if (src_fallback) { DBG(("%s: dst is on the CPU and src will fallback\n", __FUNCTION__)); return true; } if (mask && mask_fallback) { DBG(("%s: dst is on the CPU and mask will fallback\n", __FUNCTION__)); return true; } if (too_large(dst_pixmap->drawable.width, dst_pixmap->drawable.height) && dst_is_cpu(dst_pixmap)) { DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__)); return true; } DBG(("%s: dst is not on the GPU and the operation should not fallback: use-cpu? %d\n", __FUNCTION__, dst_use_cpu(dst_pixmap))); return dst_use_cpu(dst_pixmap); } static int reuse_source(struct sna *sna, PicturePtr src, struct sna_composite_channel *sc, int src_x, int src_y, PicturePtr mask, struct sna_composite_channel *mc, int msk_x, int msk_y) { if (src_x != msk_x || src_y != msk_y) return false; if (mask == src) { *mc = *sc; if (mc->bo) kgem_bo_reference(mc->bo); return true; } if ((src->pDrawable == NULL || mask->pDrawable != src->pDrawable)) return false; if (sc->is_solid) return false; DBG(("%s: mask reuses source drawable\n", __FUNCTION__)); if (!sna_transform_equal(src->transform, mask->transform)) return false; if (!sna_picture_alphamap_equal(src, mask)) return false; if (!gen3_check_repeat(mask)) return false; if (!gen3_check_filter(mask)) return false; if (!gen3_check_format(mask)) return false; DBG(("%s: reusing source channel for mask with a twist\n", __FUNCTION__)); *mc = *sc; mc->repeat = gen3_texture_repeat(mask->repeat ? mask->repeatType : RepeatNone); mc->filter = gen3_filter(mask->filter); mc->pict_format = mask->format; gen3_composite_channel_set_format(mc, mask->format); assert(mc->card_format); if (mc->bo) kgem_bo_reference(mc->bo); return true; } static bool gen3_render_composite(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr mask, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t mask_x, int16_t mask_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_op *tmp) { DBG(("%s()\n", __FUNCTION__)); if (op >= ARRAY_SIZE(gen3_blend_op)) { DBG(("%s: fallback due to unhandled blend op: %d\n", __FUNCTION__, op)); return false; } /* Try to use the BLT engine unless it implies a * 3D -> 2D context switch. */ if (mask == NULL && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp)) return true; if (gen3_composite_fallback(sna, op, src, mask, dst)) goto fallback; if (need_tiling(sna, width, height)) return sna_tiling_composite(op, src, mask, dst, src_x, src_y, mask_x, mask_y, dst_x, dst_y, width, height, tmp); if (!gen3_composite_set_target(sna, tmp, dst, dst_x, dst_y, width, height, flags & COMPOSITE_PARTIAL || op > PictOpSrc)) { DBG(("%s: unable to set render target\n", __FUNCTION__)); goto fallback; } tmp->op = op; tmp->rb_reversed = gen3_dst_rb_reversed(tmp->dst.format); tmp->u.gen3.num_constants = 0; tmp->src.u.gen3.type = SHADER_TEXTURE; tmp->src.is_affine = true; DBG(("%s: preparing source\n", __FUNCTION__)); switch (gen3_composite_picture(sna, src, tmp, &tmp->src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_dst; case 0: tmp->src.u.gen3.type = SHADER_ZERO; break; case 1: if (mask == NULL && tmp->src.bo && sna_blt_composite__convert(sna, dst_x, dst_y, width, height, tmp)) return true; gen3_composite_channel_convert(&tmp->src); break; } DBG(("%s: source type=%d\n", __FUNCTION__, tmp->src.u.gen3.type)); tmp->mask.u.gen3.type = SHADER_NONE; tmp->mask.is_affine = true; tmp->need_magic_ca_pass = false; tmp->has_component_alpha = false; if (mask && tmp->src.u.gen3.type != SHADER_ZERO) { if (!reuse_source(sna, src, &tmp->src, src_x, src_y, mask, &tmp->mask, mask_x, mask_y)) { tmp->mask.u.gen3.type = SHADER_TEXTURE; DBG(("%s: preparing mask\n", __FUNCTION__)); switch (gen3_composite_picture(sna, mask, tmp, &tmp->mask, mask_x, mask_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_src; case 0: tmp->mask.u.gen3.type = SHADER_ZERO; break; case 1: gen3_composite_channel_convert(&tmp->mask); break; } } DBG(("%s: mask type=%d\n", __FUNCTION__, tmp->mask.u.gen3.type)); if (tmp->mask.u.gen3.type == SHADER_ZERO) { if (tmp->src.bo) { kgem_bo_destroy(&sna->kgem, tmp->src.bo); tmp->src.bo = NULL; } tmp->src.u.gen3.type = SHADER_ZERO; tmp->mask.u.gen3.type = SHADER_NONE; } if (tmp->mask.u.gen3.type != SHADER_NONE) { if (mask->componentAlpha && PICT_FORMAT_RGB(mask->format)) { /* Check if it's component alpha that relies on a source alpha * and on the source value. We can only get one of those * into the single source value that we get to blend with. */ DBG(("%s: component-alpha mask: %d\n", __FUNCTION__, tmp->mask.u.gen3.type)); tmp->has_component_alpha = true; if (tmp->mask.u.gen3.type == SHADER_WHITE) { tmp->mask.u.gen3.type = SHADER_NONE; tmp->has_component_alpha = false; } else if (gen3_blend_op[op].src_alpha && gen3_blend_op[op].src_blend != BLENDFACT_ZERO) { if (op != PictOpOver) goto cleanup_mask; tmp->need_magic_ca_pass = true; tmp->op = PictOpOutReverse; } } else { if (tmp->mask.is_opaque) { tmp->mask.u.gen3.type = SHADER_NONE; } else if (is_constant_ps(tmp->src.u.gen3.type) && is_constant_ps(tmp->mask.u.gen3.type)) { uint32_t v; v = multa(tmp->src.u.gen3.mode, tmp->mask.u.gen3.mode, 24); v |= multa(tmp->src.u.gen3.mode, tmp->mask.u.gen3.mode, 16); v |= multa(tmp->src.u.gen3.mode, tmp->mask.u.gen3.mode, 8); v |= multa(tmp->src.u.gen3.mode, tmp->mask.u.gen3.mode, 0); DBG(("%s: combining constant source/mask: %x x %x -> %x\n", __FUNCTION__, tmp->src.u.gen3.mode, tmp->mask.u.gen3.mode, v)); tmp->src.u.gen3.type = SHADER_CONSTANT; tmp->src.u.gen3.mode = v; tmp->src.is_opaque = false; tmp->mask.u.gen3.type = SHADER_NONE; } } } } DBG(("%s: final src/mask type=%d/%d, affine=%d/%d\n", __FUNCTION__, tmp->src.u.gen3.type, tmp->mask.u.gen3.type, tmp->src.is_affine, tmp->mask.is_affine)); tmp->prim_emit = gen3_emit_composite_primitive; if (is_constant_ps(tmp->mask.u.gen3.type)) { switch (tmp->src.u.gen3.type) { case SHADER_NONE: case SHADER_ZERO: case SHADER_BLACK: case SHADER_WHITE: case SHADER_CONSTANT: #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_primitive_constant__sse2; tmp->emit_boxes = gen3_emit_composite_boxes_constant__sse2; } else #endif { tmp->prim_emit = gen3_emit_composite_primitive_constant; tmp->emit_boxes = gen3_emit_composite_boxes_constant; } break; case SHADER_LINEAR: case SHADER_RADIAL: if (tmp->src.transform == NULL) { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_primitive_identity_gradient__sse2; tmp->emit_boxes = gen3_emit_composite_boxes_identity_gradient__sse2; } else #endif { tmp->prim_emit = gen3_emit_composite_primitive_identity_gradient; tmp->emit_boxes = gen3_emit_composite_boxes_identity_gradient; } } else if (tmp->src.is_affine) { tmp->src.scale[1] = tmp->src.scale[0] = 1. / tmp->src.transform->matrix[2][2]; #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_primitive_affine_gradient__sse2; tmp->emit_boxes = gen3_emit_composite_boxes_affine_gradient__sse2; } else #endif { tmp->prim_emit = gen3_emit_composite_primitive_affine_gradient; tmp->emit_boxes = gen3_emit_composite_boxes_affine_gradient; } } break; case SHADER_TEXTURE: if (tmp->src.transform == NULL) { if ((tmp->src.offset[0]|tmp->src.offset[1]|tmp->dst.x|tmp->dst.y) == 0) { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_primitive_identity_source_no_offset__sse2; tmp->emit_boxes = gen3_emit_composite_boxes_identity_source_no_offset__sse2; } else #endif { tmp->prim_emit = gen3_emit_composite_primitive_identity_source_no_offset; tmp->emit_boxes = gen3_emit_composite_boxes_identity_source_no_offset; } } else { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_primitive_identity_source__sse2; tmp->emit_boxes = gen3_emit_composite_boxes_identity_source__sse2; } else #endif { tmp->prim_emit = gen3_emit_composite_primitive_identity_source; tmp->emit_boxes = gen3_emit_composite_boxes_identity_source; } } } else if (tmp->src.is_affine) { tmp->src.scale[0] /= tmp->src.transform->matrix[2][2]; tmp->src.scale[1] /= tmp->src.transform->matrix[2][2]; #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_primitive_affine_source__sse2; tmp->emit_boxes = gen3_emit_composite_boxes_affine_source__sse2; } else #endif { tmp->prim_emit = gen3_emit_composite_primitive_affine_source; tmp->emit_boxes = gen3_emit_composite_boxes_affine_source; } } break; } } else if (tmp->mask.u.gen3.type == SHADER_TEXTURE) { if (tmp->mask.transform == NULL) { if (is_constant_ps(tmp->src.u.gen3.type)) { if ((tmp->mask.offset[0]|tmp->mask.offset[1]|tmp->dst.x|tmp->dst.y) == 0) { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_primitive_constant_identity_mask_no_offset__sse2; } else #endif { tmp->prim_emit = gen3_emit_composite_primitive_constant_identity_mask_no_offset; } } else { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_primitive_constant_identity_mask__sse2; } else #endif { tmp->prim_emit = gen3_emit_composite_primitive_constant_identity_mask; } } } else if (tmp->src.transform == NULL) { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_primitive_identity_source_mask__sse2; } else #endif { tmp->prim_emit = gen3_emit_composite_primitive_identity_source_mask; } } else if (tmp->src.is_affine) { tmp->src.scale[0] /= tmp->src.transform->matrix[2][2]; tmp->src.scale[1] /= tmp->src.transform->matrix[2][2]; #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_primitive_affine_source_mask__sse2; } else #endif { tmp->prim_emit = gen3_emit_composite_primitive_affine_source_mask; } } } } tmp->floats_per_vertex = 2; if (!is_constant_ps(tmp->src.u.gen3.type)) tmp->floats_per_vertex += tmp->src.is_affine ? 2 : 4; if (!is_constant_ps(tmp->mask.u.gen3.type)) tmp->floats_per_vertex += tmp->mask.is_affine ? 2 : 4; DBG(("%s: floats_per_vertex = 2 + %d + %d = %d [specialised emitter? %d]\n", __FUNCTION__, !is_constant_ps(tmp->src.u.gen3.type) ? tmp->src.is_affine ? 2 : 4 : 0, !is_constant_ps(tmp->mask.u.gen3.type) ? tmp->mask.is_affine ? 2 : 4 : 0, tmp->floats_per_vertex, tmp->prim_emit != gen3_emit_composite_primitive)); tmp->floats_per_rect = 3 * tmp->floats_per_vertex; tmp->blt = gen3_render_composite_blt; tmp->box = gen3_render_composite_box; tmp->boxes = gen3_render_composite_boxes__blt; if (tmp->emit_boxes) { tmp->boxes = gen3_render_composite_boxes; tmp->thread_boxes = gen3_render_composite_boxes__thread; } tmp->done = gen3_render_composite_done; if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) goto cleanup_mask; } gen3_align_vertex(sna, tmp); gen3_emit_composite_state(sna, tmp); return true; cleanup_mask: if (tmp->mask.bo) { kgem_bo_destroy(&sna->kgem, tmp->mask.bo); tmp->mask.bo = NULL; } cleanup_src: if (tmp->src.bo) { kgem_bo_destroy(&sna->kgem, tmp->src.bo); tmp->src.bo = NULL; } cleanup_dst: if (tmp->redirect.real_bo) { kgem_bo_destroy(&sna->kgem, tmp->dst.bo); tmp->redirect.real_bo = NULL; } fallback: return (mask == NULL && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags | COMPOSITE_FALLBACK, tmp)); } static void gen3_emit_composite_spans_vertex(struct sna *sna, const struct sna_composite_spans_op *op, int16_t x, int16_t y, float opacity) { gen3_emit_composite_dstcoord(sna, x + op->base.dst.x, y + op->base.dst.y); gen3_emit_composite_texcoord(sna, &op->base.src, x, y); OUT_VERTEX(opacity); } fastcall static void gen3_emit_composite_spans_primitive_zero(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 6; v[0] = op->base.dst.x + box->x2; v[1] = op->base.dst.y + box->y2; v[2] = op->base.dst.x + box->x1; v[3] = v[1]; v[4] = v[2]; v[5] = op->base.dst.x + box->y1; } fastcall static void gen3_emit_composite_spans_primitive_zero__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { v[0] = op->base.dst.x + b->box.x2; v[1] = op->base.dst.y + b->box.y2; v[2] = op->base.dst.x + b->box.x1; v[3] = v[1]; v[4] = v[2]; v[5] = op->base.dst.x + b->box.y1; v += 6; b++; } while (--nbox); } fastcall static void gen3_emit_composite_spans_primitive_zero_no_offset(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 6; v[0] = box->x2; v[3] = v[1] = box->y2; v[4] = v[2] = box->x1; v[5] = box->y1; } fastcall static void gen3_emit_composite_spans_primitive_zero_no_offset__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { v[0] = b->box.x2; v[3] = v[1] = b->box.y2; v[4] = v[2] = b->box.x1; v[5] = b->box.y1; b++; v += 6; } while (--nbox); } fastcall static void gen3_emit_composite_spans_primitive_constant(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; v[0] = op->base.dst.x + box->x2; v[6] = v[3] = op->base.dst.x + box->x1; v[4] = v[1] = op->base.dst.y + box->y2; v[7] = op->base.dst.y + box->y1; v[8] = v[5] = v[2] = opacity; } fastcall static void gen3_emit_composite_spans_primitive_constant__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { v[0] = op->base.dst.x + b->box.x2; v[6] = v[3] = op->base.dst.x + b->box.x1; v[4] = v[1] = op->base.dst.y + b->box.y2; v[7] = op->base.dst.y + b->box.y1; v[8] = v[5] = v[2] = b->alpha; v += 9; b++; } while (--nbox); } fastcall static void gen3_emit_composite_spans_primitive_constant_no_offset(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; v[0] = box->x2; v[6] = v[3] = box->x1; v[4] = v[1] = box->y2; v[7] = box->y1; v[8] = v[5] = v[2] = opacity; } fastcall static void gen3_emit_composite_spans_primitive_constant_no_offset__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { v[0] = b->box.x2; v[6] = v[3] = b->box.x1; v[4] = v[1] = b->box.y2; v[7] = b->box.y1; v[8] = v[5] = v[2] = b->alpha; v += 9; b++; } while (--nbox); } fastcall static void gen3_emit_composite_spans_primitive_identity_source(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 15; v[0] = op->base.dst.x + box->x2; v[1] = op->base.dst.y + box->y2; v[2] = (op->base.src.offset[0] + box->x2) * op->base.src.scale[0]; v[3] = (op->base.src.offset[1] + box->y2) * op->base.src.scale[1]; v[4] = opacity; v[5] = op->base.dst.x + box->x1; v[6] = v[1]; v[7] = (op->base.src.offset[0] + box->x1) * op->base.src.scale[0]; v[8] = v[3]; v[9] = opacity; v[10] = v[5]; v[11] = op->base.dst.y + box->y1; v[12] = v[7]; v[13] = (op->base.src.offset[1] + box->y1) * op->base.src.scale[1]; v[14] = opacity; } fastcall static void gen3_emit_composite_spans_primitive_identity_source__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { v[0] = op->base.dst.x + b->box.x2; v[1] = op->base.dst.y + b->box.y2; v[2] = (op->base.src.offset[0] + b->box.x2) * op->base.src.scale[0]; v[3] = (op->base.src.offset[1] + b->box.y2) * op->base.src.scale[1]; v[4] = b->alpha; v[5] = op->base.dst.x + b->box.x1; v[6] = v[1]; v[7] = (op->base.src.offset[0] + b->box.x1) * op->base.src.scale[0]; v[8] = v[3]; v[9] = b->alpha; v[10] = v[5]; v[11] = op->base.dst.y + b->box.y1; v[12] = v[7]; v[13] = (op->base.src.offset[1] + b->box.y1) * op->base.src.scale[1]; v[14] = b->alpha; v += 15; b++; } while (--nbox); } fastcall static void gen3_emit_composite_spans_primitive_affine_source(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { PictTransform *transform = op->base.src.transform; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 15; v[0] = op->base.dst.x + box->x2; v[6] = v[1] = op->base.dst.y + box->y2; v[10] = v[5] = op->base.dst.x + box->x1; v[11] = op->base.dst.y + box->y1; v[14] = v[9] = v[4] = opacity; _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x2, (int)op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[2], &v[3]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x1, (int)op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[7], &v[8]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x1, (int)op->base.src.offset[1] + box->y1, transform, op->base.src.scale, &v[12], &v[13]); } fastcall static void gen3_emit_composite_spans_primitive_affine_source__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { PictTransform *transform = op->base.src.transform; do { v[0] = op->base.dst.x + b->box.x2; v[6] = v[1] = op->base.dst.y + b->box.y2; v[10] = v[5] = op->base.dst.x + b->box.x1; v[11] = op->base.dst.y + b->box.y1; v[14] = v[9] = v[4] = b->alpha; _sna_get_transformed_scaled((int)op->base.src.offset[0] + b->box.x2, (int)op->base.src.offset[1] + b->box.y2, transform, op->base.src.scale, &v[2], &v[3]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + b->box.x1, (int)op->base.src.offset[1] + b->box.y2, transform, op->base.src.scale, &v[7], &v[8]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + b->box.x1, (int)op->base.src.offset[1] + b->box.y1, transform, op->base.src.scale, &v[12], &v[13]); v += 15; b++; } while (--nbox); } fastcall static void gen3_emit_composite_spans_primitive_identity_gradient(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 15; v[0] = op->base.dst.x + box->x2; v[1] = op->base.dst.y + box->y2; v[2] = op->base.src.offset[0] + box->x2; v[3] = op->base.src.offset[1] + box->y2; v[4] = opacity; v[5] = op->base.dst.x + box->x1; v[6] = v[1]; v[7] = op->base.src.offset[0] + box->x1; v[8] = v[3]; v[9] = opacity; v[10] = v[5]; v[11] = op->base.dst.y + box->y1; v[12] = v[7]; v[13] = op->base.src.offset[1] + box->y1; v[14] = opacity; } fastcall static void gen3_emit_composite_spans_primitive_identity_gradient__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { v[0] = op->base.dst.x + b->box.x2; v[1] = op->base.dst.y + b->box.y2; v[2] = op->base.src.offset[0] + b->box.x2; v[3] = op->base.src.offset[1] + b->box.y2; v[4] = b->alpha; v[5] = op->base.dst.x + b->box.x1; v[6] = v[1]; v[7] = op->base.src.offset[0] + b->box.x1; v[8] = v[3]; v[9] = b->alpha; v[10] = v[5]; v[11] = op->base.dst.y + b->box.y1; v[12] = v[7]; v[13] = op->base.src.offset[1] + b->box.y1; v[14] = b->alpha; v += 15; b++; } while (--nbox); } #if defined(sse2) && !defined(__x86_64__) sse2 fastcall static void gen3_emit_composite_spans_primitive_constant__sse2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; v[0] = op->base.dst.x + box->x2; v[6] = v[3] = op->base.dst.x + box->x1; v[4] = v[1] = op->base.dst.y + box->y2; v[7] = op->base.dst.y + box->y1; v[8] = v[5] = v[2] = opacity; } sse2 fastcall static void gen3_emit_composite_spans_primitive_constant__sse2__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { v[0] = op->base.dst.x + b->box.x2; v[6] = v[3] = op->base.dst.x + b->box.x1; v[4] = v[1] = op->base.dst.y + b->box.y2; v[7] = op->base.dst.y + b->box.y1; v[8] = v[5] = v[2] = b->alpha; v += 9; b++; } while (--nbox); } sse2 fastcall static void gen3_render_composite_spans_constant_box__sse2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v; DBG(("%s: src=+(%d, %d), opacity=%f, dst=+(%d, %d), box=(%d, %d) x (%d, %d)\n", __FUNCTION__, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); gen3_get_rectangles(sna, &op->base, 1); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; v[0] = box->x2; v[6] = v[3] = box->x1; v[4] = v[1] = box->y2; v[7] = box->y1; v[8] = v[5] = v[2] = opacity; } sse2 fastcall static void gen3_render_composite_spans_constant_thread__sse2__boxes(struct sna *sna, const struct sna_composite_spans_op *op, const struct sna_opacity_box *box, int nbox) { DBG(("%s: nbox=%d, src=+(%d, %d), dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], op->base.dst.x, op->base.dst.y)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen3_get_rectangles(sna, &op->base, nbox); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * 9; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); do { v[0] = box->box.x2; v[6] = v[3] = box->box.x1; v[4] = v[1] = box->box.y2; v[7] = box->box.y1; v[8] = v[5] = v[2] = box->alpha; v += 9; box++; } while (--nbox_this_time); sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } sse2 fastcall static void gen3_emit_composite_spans_primitive_constant__sse2__no_offset(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; v[0] = box->x2; v[6] = v[3] = box->x1; v[4] = v[1] = box->y2; v[7] = box->y1; v[8] = v[5] = v[2] = opacity; } sse2 fastcall static void gen3_emit_composite_spans_primitive_constant__sse2__no_offset__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { v[0] = b->box.x2; v[6] = v[3] = b->box.x1; v[4] = v[1] = b->box.y2; v[7] = b->box.y1; v[8] = v[5] = v[2] = b->alpha; v += 9; b++; } while (--nbox); } sse2 fastcall static void gen3_emit_composite_spans_primitive_identity_source__sse2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 15; v[0] = op->base.dst.x + box->x2; v[1] = op->base.dst.y + box->y2; v[2] = (op->base.src.offset[0] + box->x2) * op->base.src.scale[0]; v[3] = (op->base.src.offset[1] + box->y2) * op->base.src.scale[1]; v[4] = opacity; v[5] = op->base.dst.x + box->x1; v[6] = v[1]; v[7] = (op->base.src.offset[0] + box->x1) * op->base.src.scale[0]; v[8] = v[3]; v[9] = opacity; v[10] = v[5]; v[11] = op->base.dst.y + box->y1; v[12] = v[7]; v[13] = (op->base.src.offset[1] + box->y1) * op->base.src.scale[1]; v[14] = opacity; } sse2 fastcall static void gen3_emit_composite_spans_primitive_identity_source__sse2__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { v[0] = op->base.dst.x + b->box.x2; v[1] = op->base.dst.y + b->box.y2; v[2] = (op->base.src.offset[0] + b->box.x2) * op->base.src.scale[0]; v[3] = (op->base.src.offset[1] + b->box.y2) * op->base.src.scale[1]; v[4] = b->alpha; v[5] = op->base.dst.x + b->box.x1; v[6] = v[1]; v[7] = (op->base.src.offset[0] + b->box.x1) * op->base.src.scale[0]; v[8] = v[3]; v[9] = b->alpha; v[10] = v[5]; v[11] = op->base.dst.y + b->box.y1; v[12] = v[7]; v[13] = (op->base.src.offset[1] + b->box.y1) * op->base.src.scale[1]; v[14] = b->alpha; v += 15; b++; } while (--nbox); } sse2 fastcall static void gen3_emit_composite_spans_primitive_affine_source__sse2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { PictTransform *transform = op->base.src.transform; float *v; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 15; v[0] = op->base.dst.x + box->x2; v[6] = v[1] = op->base.dst.y + box->y2; v[10] = v[5] = op->base.dst.x + box->x1; v[11] = op->base.dst.y + box->y1; v[14] = v[9] = v[4] = opacity; _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x2, (int)op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[2], &v[3]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x1, (int)op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[7], &v[8]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x1, (int)op->base.src.offset[1] + box->y1, transform, op->base.src.scale, &v[12], &v[13]); } sse2 fastcall static void gen3_emit_composite_spans_primitive_affine_source__sse2__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { PictTransform *transform = op->base.src.transform; do { v[0] = op->base.dst.x + b->box.x2; v[6] = v[1] = op->base.dst.y + b->box.y2; v[10] = v[5] = op->base.dst.x + b->box.x1; v[11] = op->base.dst.y + b->box.y1; v[14] = v[9] = v[4] = b->alpha; _sna_get_transformed_scaled((int)op->base.src.offset[0] + b->box.x2, (int)op->base.src.offset[1] + b->box.y2, transform, op->base.src.scale, &v[2], &v[3]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + b->box.x1, (int)op->base.src.offset[1] + b->box.y2, transform, op->base.src.scale, &v[7], &v[8]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + b->box.x1, (int)op->base.src.offset[1] + b->box.y1, transform, op->base.src.scale, &v[12], &v[13]); v += 15; b++; } while (--nbox); } sse2 fastcall static void gen3_emit_composite_spans_primitive_identity_gradient__sse2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 15; v[0] = op->base.dst.x + box->x2; v[1] = op->base.dst.y + box->y2; v[2] = op->base.src.offset[0] + box->x2; v[3] = op->base.src.offset[1] + box->y2; v[4] = opacity; v[5] = op->base.dst.x + box->x1; v[6] = v[1]; v[7] = op->base.src.offset[0] + box->x1; v[8] = v[3]; v[9] = opacity; v[10] = v[5]; v[11] = op->base.dst.y + box->y1; v[12] = v[7]; v[13] = op->base.src.offset[1] + box->y1; v[14] = opacity; } sse2 fastcall static void gen3_emit_composite_spans_primitive_identity_gradient__sse2__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { v[0] = op->base.dst.x + b->box.x2; v[1] = op->base.dst.y + b->box.y2; v[2] = op->base.src.offset[0] + b->box.x2; v[3] = op->base.src.offset[1] + b->box.y2; v[4] = b->alpha; v[5] = op->base.dst.x + b->box.x1; v[6] = v[1]; v[7] = op->base.src.offset[0] + b->box.x1; v[8] = v[3]; v[9] = b->alpha; v[10] = v[5]; v[11] = op->base.dst.y + b->box.y1; v[12] = v[7]; v[13] = op->base.src.offset[1] + b->box.y1; v[14] = b->alpha; v += 15; b++; } while (--nbox); } sse2 fastcall static void gen3_emit_composite_spans_primitive_affine_gradient__sse2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { PictTransform *transform = op->base.src.transform; float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 15; v[0] = op->base.dst.x + box->x2; v[1] = op->base.dst.y + box->y2; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x2, op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[2], &v[3]); v[4] = opacity; v[5] = op->base.dst.x + box->x1; v[6] = v[1]; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x1, op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[7], &v[8]); v[9] = opacity; v[10] = v[5]; v[11] = op->base.dst.y + box->y1; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x1, op->base.src.offset[1] + box->y1, transform, op->base.src.scale, &v[12], &v[13]); v[14] = opacity; } sse2 fastcall static void gen3_emit_composite_spans_primitive_affine_gradient__sse2__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { PictTransform *transform = op->base.src.transform; do { v[0] = op->base.dst.x + b->box.x2; v[1] = op->base.dst.y + b->box.y2; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x2, op->base.src.offset[1] + b->box.y2, transform, op->base.src.scale, &v[2], &v[3]); v[4] = b->alpha; v[5] = op->base.dst.x + b->box.x1; v[6] = v[1]; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x1, op->base.src.offset[1] + b->box.y2, transform, op->base.src.scale, &v[7], &v[8]); v[9] = b->alpha; v[10] = v[5]; v[11] = op->base.dst.y + b->box.y1; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x1, op->base.src.offset[1] + b->box.y1, transform, op->base.src.scale, &v[12], &v[13]); v[14] = b->alpha; v += 15; b++; } while (--nbox); } #endif fastcall static void gen3_emit_composite_spans_primitive_affine_gradient(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { PictTransform *transform = op->base.src.transform; float *v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 15; v[0] = op->base.dst.x + box->x2; v[1] = op->base.dst.y + box->y2; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x2, op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[2], &v[3]); v[4] = opacity; v[5] = op->base.dst.x + box->x1; v[6] = v[1]; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x1, op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[7], &v[8]); v[9] = opacity; v[10] = v[5]; v[11] = op->base.dst.y + box->y1; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x1, op->base.src.offset[1] + box->y1, transform, op->base.src.scale, &v[12], &v[13]); v[14] = opacity; } fastcall static void gen3_emit_composite_spans_primitive_affine_gradient__boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { PictTransform *transform = op->base.src.transform; do { v[0] = op->base.dst.x + b->box.x2; v[1] = op->base.dst.y + b->box.y2; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x2, op->base.src.offset[1] + b->box.y2, transform, op->base.src.scale, &v[2], &v[3]); v[4] = b->alpha; v[5] = op->base.dst.x + b->box.x1; v[6] = v[1]; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x1, op->base.src.offset[1] + b->box.y2, transform, op->base.src.scale, &v[7], &v[8]); v[9] = b->alpha; v[10] = v[5]; v[11] = op->base.dst.y + b->box.y1; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x1, op->base.src.offset[1] + b->box.y1, transform, op->base.src.scale, &v[12], &v[13]); v[14] = b->alpha; v += 15; b++; } while (--nbox); } fastcall static void gen3_emit_composite_spans_primitive(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { gen3_emit_composite_spans_vertex(sna, op, box->x2, box->y2, opacity); gen3_emit_composite_spans_vertex(sna, op, box->x1, box->y2, opacity); gen3_emit_composite_spans_vertex(sna, op, box->x1, box->y1, opacity); } fastcall static void gen3_render_composite_spans_constant_box(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v; DBG(("%s: src=+(%d, %d), opacity=%f, dst=+(%d, %d), box=(%d, %d) x (%d, %d)\n", __FUNCTION__, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); gen3_get_rectangles(sna, &op->base, 1); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; v[0] = box->x2; v[6] = v[3] = box->x1; v[4] = v[1] = box->y2; v[7] = box->y1; v[8] = v[5] = v[2] = opacity; } fastcall static void gen3_render_composite_spans_constant_thread_boxes(struct sna *sna, const struct sna_composite_spans_op *op, const struct sna_opacity_box *box, int nbox) { DBG(("%s: nbox=%d, src=+(%d, %d), dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], op->base.dst.x, op->base.dst.y)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen3_get_rectangles(sna, &op->base, nbox); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * 9; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); do { v[0] = box->box.x2; v[6] = v[3] = box->box.x1; v[4] = v[1] = box->box.y2; v[7] = box->box.y1; v[8] = v[5] = v[2] = box->alpha; v += 9; box++; } while (--nbox_this_time); sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } fastcall static void gen3_render_composite_spans_box(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { DBG(("%s: src=+(%d, %d), opacity=%f, dst=+(%d, %d), box=(%d, %d) x (%d, %d)\n", __FUNCTION__, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); gen3_get_rectangles(sna, &op->base, 1); op->prim_emit(sna, op, box, opacity); } static void gen3_render_composite_spans_boxes(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, int nbox, float opacity) { DBG(("%s: nbox=%d, src=+(%d, %d), opacity=%f, dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y)); do { int nbox_this_time; nbox_this_time = gen3_get_rectangles(sna, &op->base, nbox); nbox -= nbox_this_time; do { DBG((" %s: (%d, %d) x (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); op->prim_emit(sna, op, box++, opacity); } while (--nbox_this_time); } while (nbox); } fastcall static void gen3_render_composite_spans_boxes__thread(struct sna *sna, const struct sna_composite_spans_op *op, const struct sna_opacity_box *box, int nbox) { DBG(("%s: nbox=%d, src=+(%d, %d), dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], op->base.dst.x, op->base.dst.y)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen3_get_rectangles(sna, &op->base, nbox); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->base.floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } fastcall static void gen3_render_composite_spans_done(struct sna *sna, const struct sna_composite_spans_op *op) { if (sna->render.vertex_offset) gen3_vertex_flush(sna); DBG(("%s()\n", __FUNCTION__)); if (op->base.src.bo) kgem_bo_destroy(&sna->kgem, op->base.src.bo); sna_render_composite_redirect_done(sna, &op->base); } static bool gen3_check_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t width, int16_t height, unsigned flags) { if (op >= ARRAY_SIZE(gen3_blend_op)) return false; if (gen3_composite_fallback(sna, op, src, NULL, dst)) return false; if (need_tiling(sna, width, height) && !is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS)) { DBG(("%s: fallback, tiled operation not on GPU\n", __FUNCTION__)); return false; } return true; } static bool gen3_render_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_spans_op *tmp) { bool no_offset; DBG(("%s(src=(%d, %d), dst=(%d, %d), size=(%d, %d))\n", __FUNCTION__, src_x, src_y, dst_x, dst_y, width, height)); assert(gen3_check_composite_spans(sna, op, src, dst, width, height, flags)); if (need_tiling(sna, width, height)) { DBG(("%s: tiling, operation (%dx%d) too wide for pipeline\n", __FUNCTION__, width, height)); return sna_tiling_composite_spans(op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp); } if (!gen3_composite_set_target(sna, &tmp->base, dst, dst_x, dst_y, width, height, true)) { DBG(("%s: unable to set render target\n", __FUNCTION__)); return false; } tmp->base.op = op; tmp->base.rb_reversed = gen3_dst_rb_reversed(tmp->base.dst.format); tmp->base.src.u.gen3.type = SHADER_TEXTURE; tmp->base.src.is_affine = true; DBG(("%s: preparing source\n", __FUNCTION__)); switch (gen3_composite_picture(sna, src, &tmp->base, &tmp->base.src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_dst; case 0: tmp->base.src.u.gen3.type = SHADER_ZERO; break; case 1: gen3_composite_channel_convert(&tmp->base.src); break; } DBG(("%s: source type=%d\n", __FUNCTION__, tmp->base.src.u.gen3.type)); if (tmp->base.src.u.gen3.type != SHADER_ZERO) tmp->base.mask.u.gen3.type = SHADER_OPACITY; no_offset = tmp->base.dst.x == 0 && tmp->base.dst.y == 0; tmp->box = gen3_render_composite_spans_box; tmp->boxes = gen3_render_composite_spans_boxes; tmp->thread_boxes = gen3_render_composite_spans_boxes__thread; tmp->done = gen3_render_composite_spans_done; tmp->prim_emit = gen3_emit_composite_spans_primitive; switch (tmp->base.src.u.gen3.type) { case SHADER_NONE: assert(0); case SHADER_ZERO: if (no_offset) { tmp->prim_emit = gen3_emit_composite_spans_primitive_zero_no_offset; tmp->emit_boxes = gen3_emit_composite_spans_primitive_zero_no_offset__boxes; } else { tmp->prim_emit = gen3_emit_composite_spans_primitive_zero; tmp->emit_boxes = gen3_emit_composite_spans_primitive_zero__boxes; } break; case SHADER_BLACK: case SHADER_WHITE: case SHADER_CONSTANT: if (no_offset) { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->box = gen3_render_composite_spans_constant_box__sse2; tmp->thread_boxes = gen3_render_composite_spans_constant_thread__sse2__boxes; tmp->prim_emit = gen3_emit_composite_spans_primitive_constant__sse2__no_offset; tmp->emit_boxes = gen3_emit_composite_spans_primitive_constant__sse2__no_offset__boxes; } else #endif { tmp->box = gen3_render_composite_spans_constant_box; tmp->thread_boxes = gen3_render_composite_spans_constant_thread_boxes; tmp->prim_emit = gen3_emit_composite_spans_primitive_constant_no_offset; tmp->emit_boxes = gen3_emit_composite_spans_primitive_constant_no_offset__boxes; } } else { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_spans_primitive_constant__sse2; tmp->emit_boxes = gen3_emit_composite_spans_primitive_constant__sse2__boxes; } else #endif { tmp->prim_emit = gen3_emit_composite_spans_primitive_constant; tmp->emit_boxes = gen3_emit_composite_spans_primitive_constant__boxes; } } break; case SHADER_LINEAR: case SHADER_RADIAL: if (tmp->base.src.transform == NULL) { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_spans_primitive_identity_gradient__sse2; tmp->emit_boxes = gen3_emit_composite_spans_primitive_identity_gradient__sse2__boxes; } else #endif { tmp->prim_emit = gen3_emit_composite_spans_primitive_identity_gradient; tmp->emit_boxes = gen3_emit_composite_spans_primitive_identity_gradient__boxes; } } else if (tmp->base.src.is_affine) { tmp->base.src.scale[1] = tmp->base.src.scale[0] = 1. / tmp->base.src.transform->matrix[2][2]; #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_spans_primitive_affine_gradient__sse2; tmp->emit_boxes = gen3_emit_composite_spans_primitive_affine_gradient__sse2__boxes; } else #endif { tmp->prim_emit = gen3_emit_composite_spans_primitive_affine_gradient; tmp->emit_boxes = gen3_emit_composite_spans_primitive_affine_gradient__boxes; } } break; case SHADER_TEXTURE: if (tmp->base.src.transform == NULL) { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_spans_primitive_identity_source__sse2; tmp->emit_boxes = gen3_emit_composite_spans_primitive_identity_source__sse2__boxes; } else #endif { tmp->prim_emit = gen3_emit_composite_spans_primitive_identity_source; tmp->emit_boxes = gen3_emit_composite_spans_primitive_identity_source__boxes; } } else if (tmp->base.src.is_affine) { tmp->base.src.scale[0] /= tmp->base.src.transform->matrix[2][2]; tmp->base.src.scale[1] /= tmp->base.src.transform->matrix[2][2]; #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen3_emit_composite_spans_primitive_affine_source__sse2; tmp->emit_boxes = gen3_emit_composite_spans_primitive_affine_source__sse2__boxes; } else #endif { tmp->prim_emit = gen3_emit_composite_spans_primitive_affine_source; tmp->emit_boxes = gen3_emit_composite_spans_primitive_affine_source__boxes; } } break; } if (tmp->emit_boxes == NULL) tmp->thread_boxes = NULL; tmp->base.mask.bo = NULL; tmp->base.floats_per_vertex = 2; if (!is_constant_ps(tmp->base.src.u.gen3.type)) tmp->base.floats_per_vertex += tmp->base.src.is_affine ? 2 : 3; tmp->base.floats_per_vertex += tmp->base.mask.u.gen3.type == SHADER_OPACITY; tmp->base.floats_per_rect = 3 * tmp->base.floats_per_vertex; if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) goto cleanup_src; } gen3_align_vertex(sna, &tmp->base); gen3_emit_composite_state(sna, &tmp->base); return true; cleanup_src: if (tmp->base.src.bo) kgem_bo_destroy(&sna->kgem, tmp->base.src.bo); cleanup_dst: if (tmp->base.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp->base.dst.bo); return false; } static void gen3_emit_video_state(struct sna *sna, struct sna_video *video, struct sna_video_frame *frame, PixmapPtr pixmap, struct kgem_bo *dst_bo, int width, int height, bool bilinear) { struct gen3_render_state *state = &sna->render_state.gen3; uint32_t id, ms3, rewind; gen3_emit_target(sna, dst_bo, width, height, sna_format_for_depth(pixmap->drawable.depth)); /* XXX share with composite? Is it worth the effort? */ if ((state->last_shader & (1<<31)) == 0) { OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(1) | I1_LOAD_S(2) | I1_LOAD_S(6) | 2); OUT_BATCH((4 << S1_VERTEX_WIDTH_SHIFT) | (4 << S1_VERTEX_PITCH_SHIFT)); OUT_BATCH(S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D) | S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) | S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT)); OUT_BATCH((2 << S6_CBUF_SRC_BLEND_FACT_SHIFT) | (1 << S6_CBUF_DST_BLEND_FACT_SHIFT) | S6_COLOR_WRITE_ENABLE); state->last_blend = 0; state->floats_per_vertex = 4; } if (!is_planar_fourcc(frame->id)) { rewind = sna->kgem.nbatch; OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | 4); OUT_BATCH(0x0000001); /* constant 0 */ /* constant 0: brightness/contrast */ OUT_BATCH_F(video->brightness / 128.0); OUT_BATCH_F(video->contrast / 255.0); OUT_BATCH_F(0.0); OUT_BATCH_F(0.0); if (state->last_constants && memcmp(&sna->kgem.batch[state->last_constants], &sna->kgem.batch[rewind], 6*sizeof(uint32_t)) == 0) sna->kgem.nbatch = rewind; else state->last_constants = rewind; rewind = sna->kgem.nbatch; OUT_BATCH(_3DSTATE_SAMPLER_STATE | 3); OUT_BATCH(0x00000001); OUT_BATCH(SS2_COLORSPACE_CONVERSION | (FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) | (0 << SS3_TEXTUREMAP_INDEX_SHIFT) | SS3_NORMALIZED_COORDS); OUT_BATCH(0x00000000); if (state->last_sampler && memcmp(&sna->kgem.batch[state->last_sampler], &sna->kgem.batch[rewind], 5*sizeof(uint32_t)) == 0) sna->kgem.nbatch = rewind; else state->last_sampler = rewind; OUT_BATCH(_3DSTATE_MAP_STATE | 3); OUT_BATCH(0x00000001); /* texture map #1 */ OUT_BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, frame->bo, I915_GEM_DOMAIN_SAMPLER << 16, 0)); ms3 = MAPSURF_422; switch (frame->id) { case FOURCC_YUY2: ms3 |= MT_422_YCRCB_NORMAL; break; case FOURCC_UYVY: ms3 |= MT_422_YCRCB_SWAPY; break; } ms3 |= (frame->height - 1) << MS3_HEIGHT_SHIFT; ms3 |= (frame->width - 1) << MS3_WIDTH_SHIFT; OUT_BATCH(ms3); OUT_BATCH(((frame->pitch[0] / 4) - 1) << MS4_PITCH_SHIFT); id = 1<<31 | 1<<1 | !!video->brightness; if (state->last_shader != id) { state->last_shader = id; id = sna->kgem.nbatch++; gen3_fs_dcl(FS_S0); gen3_fs_dcl(FS_T0); gen3_fs_texld(FS_OC, FS_S0, FS_T0); if (video->brightness != 0) { gen3_fs_add(FS_OC, gen3_fs_operand_reg(FS_OC), gen3_fs_operand(FS_C0, X, X, X, ZERO)); } sna->kgem.batch[id] = _3DSTATE_PIXEL_SHADER_PROGRAM | (sna->kgem.nbatch - id - 2); } } else { /* For the planar formats, we set up three samplers -- * one for each plane, in a Y8 format. Because I * couldn't get the special PLANAR_TO_PACKED * shader setup to work, I did the manual pixel shader: * * y' = y - .0625 * u' = u - .5 * v' = v - .5; * * r = 1.1643 * y' + 0.0 * u' + 1.5958 * v' * g = 1.1643 * y' - 0.39173 * u' - 0.81290 * v' * b = 1.1643 * y' + 2.017 * u' + 0.0 * v' * * register assignment: * r0 = (y',u',v',0) * r1 = (y,y,y,y) * r2 = (u,u,u,u) * r3 = (v,v,v,v) * OC = (r,g,b,1) */ rewind = sna->kgem.nbatch; OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | (22 - 2)); OUT_BATCH(0x000001f); /* constants 0-4 */ /* constant 0: normalization offsets */ OUT_BATCH_F(-0.0625); OUT_BATCH_F(-0.5); OUT_BATCH_F(-0.5); OUT_BATCH_F(0.0); /* constant 1: r coefficients */ OUT_BATCH_F(1.1643); OUT_BATCH_F(0.0); OUT_BATCH_F(1.5958); OUT_BATCH_F(0.0); /* constant 2: g coefficients */ OUT_BATCH_F(1.1643); OUT_BATCH_F(-0.39173); OUT_BATCH_F(-0.81290); OUT_BATCH_F(0.0); /* constant 3: b coefficients */ OUT_BATCH_F(1.1643); OUT_BATCH_F(2.017); OUT_BATCH_F(0.0); OUT_BATCH_F(0.0); /* constant 4: brightness/contrast */ OUT_BATCH_F(video->brightness / 128.0); OUT_BATCH_F(video->contrast / 255.0); OUT_BATCH_F(0.0); OUT_BATCH_F(0.0); if (state->last_constants && memcmp(&sna->kgem.batch[state->last_constants], &sna->kgem.batch[rewind], 22*sizeof(uint32_t)) == 0) sna->kgem.nbatch = rewind; else state->last_constants = rewind; rewind = sna->kgem.nbatch; OUT_BATCH(_3DSTATE_SAMPLER_STATE | 9); OUT_BATCH(0x00000007); /* sampler 0 */ OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) | (0 << SS3_TEXTUREMAP_INDEX_SHIFT) | SS3_NORMALIZED_COORDS); OUT_BATCH(0x00000000); /* sampler 1 */ OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) | (1 << SS3_TEXTUREMAP_INDEX_SHIFT) | SS3_NORMALIZED_COORDS); OUT_BATCH(0x00000000); /* sampler 2 */ OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) | (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT)); OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) | (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) | (2 << SS3_TEXTUREMAP_INDEX_SHIFT) | SS3_NORMALIZED_COORDS); OUT_BATCH(0x00000000); if (state->last_sampler && memcmp(&sna->kgem.batch[state->last_sampler], &sna->kgem.batch[rewind], 11*sizeof(uint32_t)) == 0) sna->kgem.nbatch = rewind; else state->last_sampler = rewind; OUT_BATCH(_3DSTATE_MAP_STATE | 9); OUT_BATCH(0x00000007); OUT_BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, frame->bo, I915_GEM_DOMAIN_SAMPLER << 16, 0)); ms3 = MAPSURF_8BIT | MT_8BIT_I8; ms3 |= (frame->height - 1) << MS3_HEIGHT_SHIFT; ms3 |= (frame->width - 1) << MS3_WIDTH_SHIFT; OUT_BATCH(ms3); /* check to see if Y has special pitch than normal * double u/v pitch, e.g i915 XvMC hw requires at * least 1K alignment, so Y pitch might * be same as U/V's.*/ if (frame->pitch[1]) OUT_BATCH(((frame->pitch[1] / 4) - 1) << MS4_PITCH_SHIFT); else OUT_BATCH(((frame->pitch[0] * 2 / 4) - 1) << MS4_PITCH_SHIFT); OUT_BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, frame->bo, I915_GEM_DOMAIN_SAMPLER << 16, frame->UBufOffset)); ms3 = MAPSURF_8BIT | MT_8BIT_I8; ms3 |= (frame->height / 2 - 1) << MS3_HEIGHT_SHIFT; ms3 |= (frame->width / 2 - 1) << MS3_WIDTH_SHIFT; OUT_BATCH(ms3); OUT_BATCH(((frame->pitch[0] / 4) - 1) << MS4_PITCH_SHIFT); OUT_BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, frame->bo, I915_GEM_DOMAIN_SAMPLER << 16, frame->VBufOffset)); ms3 = MAPSURF_8BIT | MT_8BIT_I8; ms3 |= (frame->height / 2 - 1) << MS3_HEIGHT_SHIFT; ms3 |= (frame->width / 2 - 1) << MS3_WIDTH_SHIFT; OUT_BATCH(ms3); OUT_BATCH(((frame->pitch[0] / 4) - 1) << MS4_PITCH_SHIFT); id = 1<<31 | 2<<1 | !!video->brightness; if (state->last_shader != id) { state->last_shader = id; id = sna->kgem.nbatch++; /* Declare samplers */ gen3_fs_dcl(FS_S0); /* Y */ gen3_fs_dcl(FS_S1); /* U */ gen3_fs_dcl(FS_S2); /* V */ gen3_fs_dcl(FS_T0); /* normalized coords */ /* Load samplers to temporaries. */ gen3_fs_texld(FS_R1, FS_S0, FS_T0); gen3_fs_texld(FS_R2, FS_S1, FS_T0); gen3_fs_texld(FS_R3, FS_S2, FS_T0); /* Move the sampled YUV data in R[123] to the first * 3 channels of R0. */ gen3_fs_mov_masked(FS_R0, MASK_X, gen3_fs_operand_reg(FS_R1)); gen3_fs_mov_masked(FS_R0, MASK_Y, gen3_fs_operand_reg(FS_R2)); gen3_fs_mov_masked(FS_R0, MASK_Z, gen3_fs_operand_reg(FS_R3)); /* Normalize the YUV data */ gen3_fs_add(FS_R0, gen3_fs_operand_reg(FS_R0), gen3_fs_operand_reg(FS_C0)); /* dot-product the YUV data in R0 by the vectors of * coefficients for calculating R, G, and B, storing * the results in the R, G, or B channels of the output * color. The OC results are implicitly clamped * at the end of the program. */ gen3_fs_dp3(FS_OC, MASK_X, gen3_fs_operand_reg(FS_R0), gen3_fs_operand_reg(FS_C1)); gen3_fs_dp3(FS_OC, MASK_Y, gen3_fs_operand_reg(FS_R0), gen3_fs_operand_reg(FS_C2)); gen3_fs_dp3(FS_OC, MASK_Z, gen3_fs_operand_reg(FS_R0), gen3_fs_operand_reg(FS_C3)); /* Set alpha of the output to 1.0, by wiring W to 1 * and not actually using the source. */ gen3_fs_mov_masked(FS_OC, MASK_W, gen3_fs_operand_one()); if (video->brightness != 0) { gen3_fs_add(FS_OC, gen3_fs_operand_reg(FS_OC), gen3_fs_operand(FS_C4, X, X, X, ZERO)); } sna->kgem.batch[id] = _3DSTATE_PIXEL_SHADER_PROGRAM | (sna->kgem.nbatch - id - 2); } } } static void gen3_video_get_batch(struct sna *sna, struct kgem_bo *bo) { kgem_set_mode(&sna->kgem, KGEM_RENDER, bo); if (!kgem_check_batch(&sna->kgem, 120) || !kgem_check_reloc(&sna->kgem, 4) || !kgem_check_exec(&sna->kgem, 2)) { _kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } if (sna->render_state.gen3.need_invariant) gen3_emit_invariant(sna); } static int gen3_get_inline_rectangles(struct sna *sna, int want, int floats_per_vertex) { int size = floats_per_vertex * 3; int rem = batch_space(sna) - 1; if (size * want > rem) want = rem / size; return want; } static bool gen3_render_video(struct sna *sna, struct sna_video *video, struct sna_video_frame *frame, RegionPtr dstRegion, PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); const BoxRec *pbox = region_rects(dstRegion); int nbox = region_num_rects(dstRegion); int dst_width = dstRegion->extents.x2 - dstRegion->extents.x1; int dst_height = dstRegion->extents.y2 - dstRegion->extents.y1; int src_width = frame->src.x2 - frame->src.x1; int src_height = frame->src.y2 - frame->src.y1; float src_offset_x, src_offset_y; float src_scale_x, src_scale_y; int pix_xoff, pix_yoff; struct kgem_bo *dst_bo; bool bilinear; int copy = 0; DBG(("%s: src:%dx%d (frame:%dx%d) -> dst:%dx%d\n", __FUNCTION__, src_width, src_height, frame->width, frame->height, dst_width, dst_height)); assert(priv->gpu_bo); dst_bo = priv->gpu_bo; bilinear = src_width != dst_width || src_height != dst_height; src_scale_x = (float)src_width / dst_width / frame->width; src_offset_x = (float)frame->src.x1 / frame->width - dstRegion->extents.x1 * src_scale_x; src_scale_y = (float)src_height / dst_height / frame->height; src_offset_y = (float)frame->src.y1 / frame->height - dstRegion->extents.y1 * src_scale_y; DBG(("%s: src offset (%f, %f), scale (%f, %f)\n", __FUNCTION__, src_offset_x, src_offset_y, src_scale_x, src_scale_y)); if (too_large(pixmap->drawable.width, pixmap->drawable.height) || !gen3_check_pitch_3d(dst_bo)) { int bpp = pixmap->drawable.bitsPerPixel; if (too_large(dst_width, dst_height)) return false; dst_bo = kgem_create_2d(&sna->kgem, dst_width, dst_height, bpp, kgem_choose_tiling(&sna->kgem, I915_TILING_X, dst_width, dst_height, bpp), 0); if (!dst_bo) return false; pix_xoff = -dstRegion->extents.x1; pix_yoff = -dstRegion->extents.y1; copy = 1; } else { /* Set up the offset for translating from the given region * (in screen coordinates) to the backing pixmap. */ #ifdef COMPOSITE pix_xoff = -pixmap->screen_x + pixmap->drawable.x; pix_yoff = -pixmap->screen_y + pixmap->drawable.y; #else pix_xoff = 0; pix_yoff = 0; #endif dst_width = pixmap->drawable.width; dst_height = pixmap->drawable.height; } gen3_video_get_batch(sna, dst_bo); gen3_emit_video_state(sna, video, frame, pixmap, dst_bo, dst_width, dst_height, bilinear); do { int nbox_this_time = gen3_get_inline_rectangles(sna, nbox, 4); if (nbox_this_time == 0) { gen3_video_get_batch(sna, dst_bo); gen3_emit_video_state(sna, video, frame, pixmap, dst_bo, dst_width, dst_height, bilinear); nbox_this_time = gen3_get_inline_rectangles(sna, nbox, 4); assert(nbox_this_time); } nbox -= nbox_this_time; OUT_BATCH(PRIM3D_RECTLIST | (12 * nbox_this_time - 1)); do { int box_x1 = pbox->x1; int box_y1 = pbox->y1; int box_x2 = pbox->x2; int box_y2 = pbox->y2; pbox++; DBG(("%s: dst (%d, %d), (%d, %d) + (%d, %d); src (%f, %f), (%f, %f)\n", __FUNCTION__, box_x1, box_y1, box_x2, box_y2, pix_xoff, pix_yoff, box_x1 * src_scale_x + src_offset_x, box_y1 * src_scale_y + src_offset_y, box_x2 * src_scale_x + src_offset_x, box_y2 * src_scale_y + src_offset_y)); /* bottom right */ OUT_BATCH_F(box_x2 + pix_xoff); OUT_BATCH_F(box_y2 + pix_yoff); OUT_BATCH_F(box_x2 * src_scale_x + src_offset_x); OUT_BATCH_F(box_y2 * src_scale_y + src_offset_y); /* bottom left */ OUT_BATCH_F(box_x1 + pix_xoff); OUT_BATCH_F(box_y2 + pix_yoff); OUT_BATCH_F(box_x1 * src_scale_x + src_offset_x); OUT_BATCH_F(box_y2 * src_scale_y + src_offset_y); /* top left */ OUT_BATCH_F(box_x1 + pix_xoff); OUT_BATCH_F(box_y1 + pix_yoff); OUT_BATCH_F(box_x1 * src_scale_x + src_offset_x); OUT_BATCH_F(box_y1 * src_scale_y + src_offset_y); } while (--nbox_this_time); } while (nbox); if (copy) { #ifdef COMPOSITE pix_xoff = -pixmap->screen_x + pixmap->drawable.x; pix_yoff = -pixmap->screen_y + pixmap->drawable.y; #else pix_xoff = 0; pix_yoff = 0; #endif sna_blt_copy_boxes(sna, GXcopy, dst_bo, -dstRegion->extents.x1, -dstRegion->extents.y1, priv->gpu_bo, pix_xoff, pix_yoff, pixmap->drawable.bitsPerPixel, region_rects(dstRegion), region_num_rects(dstRegion)); kgem_bo_destroy(&sna->kgem, dst_bo); } if (!DAMAGE_IS_ALL(priv->gpu_damage)) { if ((pix_xoff | pix_yoff) == 0) { sna_damage_add(&priv->gpu_damage, dstRegion); sna_damage_subtract(&priv->cpu_damage, dstRegion); } else { sna_damage_add_boxes(&priv->gpu_damage, region_rects(dstRegion), region_num_rects(dstRegion), pix_xoff, pix_yoff); sna_damage_subtract_boxes(&priv->cpu_damage, region_rects(dstRegion), region_num_rects(dstRegion), pix_xoff, pix_yoff); } } return true; } static void gen3_render_copy_setup_source(struct sna_composite_channel *channel, const DrawableRec *draw, struct kgem_bo *bo) { int i; channel->u.gen3.type = SHADER_TEXTURE; channel->filter = gen3_filter(PictFilterNearest); channel->repeat = gen3_texture_repeat(RepeatNone); channel->width = draw->width; channel->height = draw->height; channel->scale[0] = 1.f/draw->width; channel->scale[1] = 1.f/draw->height; channel->offset[0] = 0; channel->offset[1] = 0; channel->pict_format = sna_format_for_depth(draw->depth); if (!gen3_composite_channel_set_format(channel, channel->pict_format)) { for (i = 0; i < ARRAY_SIZE(gen3_tex_formats); i++) { if (gen3_tex_formats[i].xfmt == channel->pict_format) { channel->card_format = gen3_tex_formats[i].card_fmt; channel->rb_reversed = gen3_tex_formats[i].rb_reversed; channel->alpha_fixup = true; break; } } } assert(channel->card_format); channel->bo = bo; channel->is_affine = 1; } static bool gen3_render_copy_boxes(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, unsigned flags) { struct sna_composite_op tmp; #if NO_COPY_BOXES if (!sna_blt_compare_depth(src, dst)) return false; return sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n); #endif DBG(("%s (%d, %d)->(%d, %d) x %d\n", __FUNCTION__, src_dx, src_dy, dst_dx, dst_dy, n)); if (sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; if (!(alu == GXcopy || alu == GXclear) || src_bo == dst_bo || /* XXX handle overlap using 3D ? */ src_bo->pitch > MAX_3D_PITCH || too_large(src->width, src->height)) { fallback_blt: if (!kgem_bo_can_blt(&sna->kgem, src_bo) || !kgem_bo_can_blt(&sna->kgem, dst_bo)) return false; return sna_blt_copy_boxes_fallback(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) goto fallback_blt; } memset(&tmp, 0, sizeof(tmp)); tmp.op = alu == GXcopy ? PictOpSrc : PictOpClear; tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.format = sna_format_for_depth(dst->depth); tmp.dst.bo = dst_bo; tmp.dst.x = tmp.dst.y = 0; tmp.damage = NULL; sna_render_composite_redirect_init(&tmp); if (too_large(tmp.dst.width, tmp.dst.height) || dst_bo->pitch > MAX_3D_PITCH) { BoxRec extents = box[0]; int i; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_composite_redirect(sna, &tmp, extents.x1 + dst_dx, extents.y1 + dst_dy, extents.x2 - extents.x1, extents.y2 - extents.y1, n > 1)) goto fallback_tiled; } gen3_render_copy_setup_source(&tmp.src, src, src_bo); tmp.floats_per_vertex = 4; tmp.floats_per_rect = 12; tmp.mask.bo = NULL; tmp.mask.u.gen3.type = SHADER_NONE; dst_dx += tmp.dst.x; dst_dy += tmp.dst.y; tmp.dst.x = tmp.dst.y = 0; gen3_align_vertex(sna, &tmp); gen3_emit_composite_state(sna, &tmp); do { int n_this_time; n_this_time = gen3_get_rectangles(sna, &tmp, n); n -= n_this_time; do { DBG((" (%d, %d) -> (%d, %d) + (%d, %d)\n", box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1)); OUT_VERTEX(box->x2 + dst_dx); OUT_VERTEX(box->y2 + dst_dy); OUT_VERTEX((box->x2 + src_dx) * tmp.src.scale[0]); OUT_VERTEX((box->y2 + src_dy) * tmp.src.scale[1]); OUT_VERTEX(box->x1 + dst_dx); OUT_VERTEX(box->y2 + dst_dy); OUT_VERTEX((box->x1 + src_dx) * tmp.src.scale[0]); OUT_VERTEX((box->y2 + src_dy) * tmp.src.scale[1]); OUT_VERTEX(box->x1 + dst_dx); OUT_VERTEX(box->y1 + dst_dy); OUT_VERTEX((box->x1 + src_dx) * tmp.src.scale[0]); OUT_VERTEX((box->y1 + src_dy) * tmp.src.scale[1]); box++; } while (--n_this_time); } while (n); gen3_vertex_flush(sna); sna_render_composite_redirect_done(sna, &tmp); return true; fallback_tiled: return sna_tiling_copy_boxes(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } static void gen3_render_copy_blt(struct sna *sna, const struct sna_copy_op *op, int16_t sx, int16_t sy, int16_t w, int16_t h, int16_t dx, int16_t dy) { gen3_get_rectangles(sna, &op->base, 1); OUT_VERTEX(dx+w); OUT_VERTEX(dy+h); OUT_VERTEX((sx+w)*op->base.src.scale[0]); OUT_VERTEX((sy+h)*op->base.src.scale[1]); OUT_VERTEX(dx); OUT_VERTEX(dy+h); OUT_VERTEX(sx*op->base.src.scale[0]); OUT_VERTEX((sy+h)*op->base.src.scale[1]); OUT_VERTEX(dx); OUT_VERTEX(dy); OUT_VERTEX(sx*op->base.src.scale[0]); OUT_VERTEX(sy*op->base.src.scale[1]); } static void gen3_render_copy_done(struct sna *sna, const struct sna_copy_op *op) { if (sna->render.vertex_offset) gen3_vertex_flush(sna); } static bool gen3_render_copy(struct sna *sna, uint8_t alu, PixmapPtr src, struct kgem_bo *src_bo, PixmapPtr dst, struct kgem_bo *dst_bo, struct sna_copy_op *tmp) { #if NO_COPY if (!sna_blt_compare_depth(&src->drawable, &dst->drawable)) return false; return sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, tmp); #endif /* Prefer to use the BLT */ if (sna_blt_compare_depth(&src->drawable, &dst->drawable) && sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, tmp)) return true; /* Must use the BLT if we can't RENDER... */ if (!(alu == GXcopy || alu == GXclear) || too_large(src->drawable.width, src->drawable.height) || too_large(dst->drawable.width, dst->drawable.height) || src_bo->pitch > MAX_3D_PITCH || dst_bo->pitch > MAX_3D_PITCH) { fallback: if (!sna_blt_compare_depth(&src->drawable, &dst->drawable)) return false; return sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, tmp); } tmp->base.op = alu == GXcopy ? PictOpSrc : PictOpClear; tmp->base.dst.pixmap = dst; tmp->base.dst.width = dst->drawable.width; tmp->base.dst.height = dst->drawable.height; tmp->base.dst.format = sna_format_for_depth(dst->drawable.depth); tmp->base.dst.bo = dst_bo; gen3_render_copy_setup_source(&tmp->base.src, &src->drawable, src_bo); tmp->base.floats_per_vertex = 4; tmp->base.floats_per_rect = 12; tmp->base.mask.bo = NULL; tmp->base.mask.u.gen3.type = SHADER_NONE; if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) goto fallback; } tmp->blt = gen3_render_copy_blt; tmp->done = gen3_render_copy_done; gen3_align_vertex(sna, &tmp->base); gen3_emit_composite_state(sna, &tmp->base); return true; } static bool gen3_render_fill_boxes_try_blt(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n) { uint8_t alu; uint32_t pixel; if (dst_bo->tiling == I915_TILING_Y) { DBG(("%s: y-tiling, can't blit\n", __FUNCTION__)); assert(!too_large(dst->width, dst->height)); return false; } if (op > PictOpSrc) return false; if (op == PictOpClear) { alu = GXclear; pixel = 0; } else if (!sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, format)) return false; else alu = GXcopy; return sna_blt_fill_boxes(sna, alu, dst_bo, dst->bitsPerPixel, pixel, box, n); } static inline bool prefer_fill_blt(struct sna *sna) { #if PREFER_BLT_FILL return true; #else return sna->kgem.mode != KGEM_RENDER; #endif } static bool gen3_render_fill_boxes(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n) { struct sna_composite_op tmp; uint32_t pixel; if (op >= ARRAY_SIZE(gen3_blend_op)) { DBG(("%s: fallback due to unhandled blend op: %d\n", __FUNCTION__, op)); return false; } #if NO_FILL_BOXES return gen3_render_fill_boxes_try_blt(sna, op, format, color, dst, dst_bo, box, n); #endif DBG(("%s (op=%d, format=%x, color=(%04x,%04x,%04x, %04x))\n", __FUNCTION__, op, (int)format, color->red, color->green, color->blue, color->alpha)); if (too_large(dst->width, dst->height) || dst_bo->pitch > MAX_3D_PITCH || !gen3_check_dst_format(format)) { DBG(("%s: try blt, too large or incompatible destination\n", __FUNCTION__)); if (gen3_render_fill_boxes_try_blt(sna, op, format, color, dst, dst_bo, box, n)) return true; if (!gen3_check_dst_format(format)) return false; return sna_tiling_fill_boxes(sna, op, format, color, dst, dst_bo, box, n); } if (prefer_fill_blt(sna) && gen3_render_fill_boxes_try_blt(sna, op, format, color, dst, dst_bo, box, n)) return true; if (op == PictOpClear) { pixel = 0; } else { if (!sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, PICT_a8r8g8b8)) { assert(0); return false; } } DBG(("%s: using shader for op=%d, format=%08x, pixel=%08x\n", __FUNCTION__, op, (int)format, pixel)); tmp.op = op; tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.format = format; tmp.dst.bo = dst_bo; tmp.damage = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.rb_reversed = 0; tmp.has_component_alpha = 0; tmp.need_magic_ca_pass = false; gen3_init_solid(&tmp.src, pixel); tmp.mask.bo = NULL; tmp.mask.u.gen3.type = SHADER_NONE; tmp.u.gen3.num_constants = 0; if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) return false; } gen3_align_vertex(sna, &tmp); gen3_emit_composite_state(sna, &tmp); do { int n_this_time; n_this_time = gen3_get_rectangles(sna, &tmp, n); n -= n_this_time; do { DBG((" (%d, %d), (%d, %d): %x\n", box->x1, box->y1, box->x2, box->y2, pixel)); OUT_VERTEX(box->x2); OUT_VERTEX(box->y2); OUT_VERTEX(box->x1); OUT_VERTEX(box->y2); OUT_VERTEX(box->x1); OUT_VERTEX(box->y1); box++; } while (--n_this_time); } while (n); gen3_vertex_flush(sna); return true; } static void gen3_render_fill_op_blt(struct sna *sna, const struct sna_fill_op *op, int16_t x, int16_t y, int16_t w, int16_t h) { gen3_get_rectangles(sna, &op->base, 1); OUT_VERTEX(x+w); OUT_VERTEX(y+h); OUT_VERTEX(x); OUT_VERTEX(y+h); OUT_VERTEX(x); OUT_VERTEX(y); } fastcall static void gen3_render_fill_op_box(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box) { gen3_get_rectangles(sna, &op->base, 1); OUT_VERTEX(box->x2); OUT_VERTEX(box->y2); OUT_VERTEX(box->x1); OUT_VERTEX(box->y2); OUT_VERTEX(box->x1); OUT_VERTEX(box->y1); } fastcall static void gen3_render_fill_op_boxes(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box, int nbox) { DBG(("%s: (%d, %d),(%d, %d)... x %d\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, nbox)); do { int nbox_this_time; nbox_this_time = gen3_get_rectangles(sna, &op->base, nbox); nbox -= nbox_this_time; do { OUT_VERTEX(box->x2); OUT_VERTEX(box->y2); OUT_VERTEX(box->x1); OUT_VERTEX(box->y2); OUT_VERTEX(box->x1); OUT_VERTEX(box->y1); box++; } while (--nbox_this_time); } while (nbox); } static void gen3_render_fill_op_done(struct sna *sna, const struct sna_fill_op *op) { if (sna->render.vertex_offset) gen3_vertex_flush(sna); } static bool gen3_render_fill(struct sna *sna, uint8_t alu, PixmapPtr dst, struct kgem_bo *dst_bo, uint32_t color, unsigned flags, struct sna_fill_op *tmp) { #if NO_FILL return sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, tmp); #endif /* Prefer to use the BLT if already engaged */ if (prefer_fill_blt(sna) && sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, tmp)) return true; /* Must use the BLT if we can't RENDER... */ if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height) || dst_bo->pitch > MAX_3D_PITCH) return sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, tmp); if (alu == GXclear) color = 0; tmp->base.op = color == 0 ? PictOpClear : PictOpSrc; tmp->base.dst.pixmap = dst; tmp->base.dst.width = dst->drawable.width; tmp->base.dst.height = dst->drawable.height; tmp->base.dst.format = sna_format_for_depth(dst->drawable.depth); tmp->base.dst.bo = dst_bo; tmp->base.floats_per_vertex = 2; tmp->base.floats_per_rect = 6; tmp->base.need_magic_ca_pass = 0; tmp->base.has_component_alpha = 0; tmp->base.rb_reversed = 0; gen3_init_solid(&tmp->base.src, sna_rgba_for_color(color, dst->drawable.depth)); tmp->base.mask.bo = NULL; tmp->base.mask.u.gen3.type = SHADER_NONE; tmp->base.u.gen3.num_constants = 0; if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) return false; } tmp->blt = gen3_render_fill_op_blt; tmp->box = gen3_render_fill_op_box; tmp->boxes = gen3_render_fill_op_boxes; tmp->points = NULL; tmp->done = gen3_render_fill_op_done; gen3_align_vertex(sna, &tmp->base); gen3_emit_composite_state(sna, &tmp->base); return true; } static bool gen3_render_fill_one_try_blt(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { BoxRec box; box.x1 = x1; box.y1 = y1; box.x2 = x2; box.y2 = y2; return sna_blt_fill_boxes(sna, alu, bo, dst->drawable.bitsPerPixel, color, &box, 1); } static bool gen3_render_fill_one(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { struct sna_composite_op tmp; #if NO_FILL_ONE return gen3_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu); #endif /* Prefer to use the BLT if already engaged */ if (prefer_fill_blt(sna) && gen3_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu)) return true; /* Must use the BLT if we can't RENDER... */ if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height) || bo->pitch > MAX_3D_PITCH) return gen3_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu); if (alu == GXclear) color = 0; tmp.op = color == 0 ? PictOpClear : PictOpSrc; tmp.dst.pixmap = dst; tmp.dst.width = dst->drawable.width; tmp.dst.height = dst->drawable.height; tmp.dst.format = sna_format_for_depth(dst->drawable.depth); tmp.dst.bo = bo; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = 0; tmp.has_component_alpha = 0; tmp.rb_reversed = 0; gen3_init_solid(&tmp.src, sna_rgba_for_color(color, dst->drawable.depth)); tmp.mask.bo = NULL; tmp.mask.u.gen3.type = SHADER_NONE; tmp.u.gen3.num_constants = 0; if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_submit(&sna->kgem); if (gen3_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu)) return true; if (!kgem_check_bo(&sna->kgem, bo, NULL)) return false; } gen3_align_vertex(sna, &tmp); gen3_emit_composite_state(sna, &tmp); gen3_get_rectangles(sna, &tmp, 1); DBG((" (%d, %d), (%d, %d): %x\n", x1, y1, x2, y2, color)); OUT_VERTEX(x2); OUT_VERTEX(y2); OUT_VERTEX(x1); OUT_VERTEX(y2); OUT_VERTEX(x1); OUT_VERTEX(y1); gen3_vertex_flush(sna); return true; } static void gen3_render_flush(struct sna *sna) { gen3_vertex_close(sna); assert(sna->render.vertex_reloc[0] == 0); assert(sna->render.vertex_offset == 0); } static void gen3_render_fini(struct sna *sna) { } const char *gen3_render_init(struct sna *sna, const char *backend) { struct sna_render *render = &sna->render; #if !NO_COMPOSITE render->composite = gen3_render_composite; render->prefer_gpu |= PREFER_GPU_RENDER; #endif #if !NO_COMPOSITE_SPANS render->check_composite_spans = gen3_check_composite_spans; render->composite_spans = gen3_render_composite_spans; render->prefer_gpu |= PREFER_GPU_SPANS; #endif render->video = gen3_render_video; render->copy_boxes = gen3_render_copy_boxes; render->copy = gen3_render_copy; render->fill_boxes = gen3_render_fill_boxes; render->fill = gen3_render_fill; render->fill_one = gen3_render_fill_one; render->reset = gen3_render_reset; render->flush = gen3_render_flush; render->fini = gen3_render_fini; render->max_3d_size = MAX_3D_SIZE; render->max_3d_pitch = MAX_3D_PITCH; sna->kgem.retire = gen3_render_retire; sna->kgem.expire = gen3_render_expire; return "Alviso (gen3)"; } xf86-video-intel-2.99.917/src/sna/debug.h0000664000175000017500000000271712444634673014562 00000000000000/* * Copyright (c) 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifndef _SNA_DEBUG_H_ #define _SNA_DEBUG_H_ #if HAS_DEBUG_FULL void LogF(const char *f, ...); #define DBG(x) LogF x #else #define DBG(x) #endif #if HAS_DEBUG_FULL || !defined(NDEBUG) #define ERR(x) ErrorF x #else #define ERR(x) #endif #endif /* _SNA_DEBUG_H_ */ xf86-video-intel-2.99.917/src/sna/gen5_render.c0000664000175000017500000026600312432737457015665 00000000000000/* * Copyright © 2006,2008,2011 Intel Corporation * Copyright © 2007 Red Hat, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Wang Zhenyu * Eric Anholt * Carl Worth * Keith Packard * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_reg.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_video.h" #include "brw/brw.h" #include "gen5_render.h" #include "gen4_common.h" #include "gen4_source.h" #include "gen4_vertex.h" #define NO_COMPOSITE 0 #define NO_COMPOSITE_SPANS 0 #define PREFER_BLT_FILL 1 #define DBG_NO_STATE_CACHE 0 #define DBG_NO_SURFACE_CACHE 0 #define ALWAYS_FLUSH 0 #define MAX_3D_SIZE 8192 #define GEN5_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1) /* Set up a default static partitioning of the URB, which is supposed to * allow anything we would want to do, at potentially lower performance. */ #define URB_CS_ENTRY_SIZE 1 #define URB_CS_ENTRIES 0 #define URB_VS_ENTRY_SIZE 1 #define URB_VS_ENTRIES 256 /* minimum of 8 */ #define URB_GS_ENTRY_SIZE 0 #define URB_GS_ENTRIES 0 #define URB_CLIP_ENTRY_SIZE 0 #define URB_CLIP_ENTRIES 0 #define URB_SF_ENTRY_SIZE 2 #define URB_SF_ENTRIES 64 /* * this program computes dA/dx and dA/dy for the texture coordinates along * with the base texture coordinate. It was extracted from the Mesa driver */ #define SF_KERNEL_NUM_GRF 16 #define SF_MAX_THREADS 48 #define PS_KERNEL_NUM_GRF 32 #define PS_MAX_THREADS 72 static const uint32_t ps_kernel_packed_static[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_argb.g5b" #include "exa_wm_yuv_rgb.g5b" #include "exa_wm_write.g5b" }; static const uint32_t ps_kernel_planar_static[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_planar.g5b" #include "exa_wm_yuv_rgb.g5b" #include "exa_wm_write.g5b" }; #define NOKERNEL(kernel_enum, func, masked) \ [kernel_enum] = {func, 0, masked} #define KERNEL(kernel_enum, kernel, masked) \ [kernel_enum] = {&kernel, sizeof(kernel), masked} static const struct wm_kernel_info { const void *data; unsigned int size; bool has_mask; } wm_kernels[] = { NOKERNEL(WM_KERNEL, brw_wm_kernel__affine, false), NOKERNEL(WM_KERNEL_P, brw_wm_kernel__projective, false), NOKERNEL(WM_KERNEL_MASK, brw_wm_kernel__affine_mask, true), NOKERNEL(WM_KERNEL_MASK_P, brw_wm_kernel__projective_mask, true), NOKERNEL(WM_KERNEL_MASKCA, brw_wm_kernel__affine_mask_ca, true), NOKERNEL(WM_KERNEL_MASKCA_P, brw_wm_kernel__projective_mask_ca, true), NOKERNEL(WM_KERNEL_MASKSA, brw_wm_kernel__affine_mask_sa, true), NOKERNEL(WM_KERNEL_MASKSA_P, brw_wm_kernel__projective_mask_sa, true), NOKERNEL(WM_KERNEL_OPACITY, brw_wm_kernel__affine_opacity, true), NOKERNEL(WM_KERNEL_OPACITY_P, brw_wm_kernel__projective_opacity, true), KERNEL(WM_KERNEL_VIDEO_PLANAR, ps_kernel_planar_static, false), KERNEL(WM_KERNEL_VIDEO_PACKED, ps_kernel_packed_static, false), }; #undef KERNEL static const struct blendinfo { bool src_alpha; uint32_t src_blend; uint32_t dst_blend; } gen5_blend_op[] = { /* Clear */ {0, GEN5_BLENDFACTOR_ZERO, GEN5_BLENDFACTOR_ZERO}, /* Src */ {0, GEN5_BLENDFACTOR_ONE, GEN5_BLENDFACTOR_ZERO}, /* Dst */ {0, GEN5_BLENDFACTOR_ZERO, GEN5_BLENDFACTOR_ONE}, /* Over */ {1, GEN5_BLENDFACTOR_ONE, GEN5_BLENDFACTOR_INV_SRC_ALPHA}, /* OverReverse */ {0, GEN5_BLENDFACTOR_INV_DST_ALPHA, GEN5_BLENDFACTOR_ONE}, /* In */ {0, GEN5_BLENDFACTOR_DST_ALPHA, GEN5_BLENDFACTOR_ZERO}, /* InReverse */ {1, GEN5_BLENDFACTOR_ZERO, GEN5_BLENDFACTOR_SRC_ALPHA}, /* Out */ {0, GEN5_BLENDFACTOR_INV_DST_ALPHA, GEN5_BLENDFACTOR_ZERO}, /* OutReverse */ {1, GEN5_BLENDFACTOR_ZERO, GEN5_BLENDFACTOR_INV_SRC_ALPHA}, /* Atop */ {1, GEN5_BLENDFACTOR_DST_ALPHA, GEN5_BLENDFACTOR_INV_SRC_ALPHA}, /* AtopReverse */ {1, GEN5_BLENDFACTOR_INV_DST_ALPHA, GEN5_BLENDFACTOR_SRC_ALPHA}, /* Xor */ {1, GEN5_BLENDFACTOR_INV_DST_ALPHA, GEN5_BLENDFACTOR_INV_SRC_ALPHA}, /* Add */ {0, GEN5_BLENDFACTOR_ONE, GEN5_BLENDFACTOR_ONE}, }; /** * Highest-valued BLENDFACTOR used in gen5_blend_op. * * This leaves out GEN5_BLENDFACTOR_INV_DST_COLOR, * GEN5_BLENDFACTOR_INV_CONST_{COLOR,ALPHA}, * GEN5_BLENDFACTOR_INV_SRC1_{COLOR,ALPHA} */ #define GEN5_BLENDFACTOR_COUNT (GEN5_BLENDFACTOR_INV_DST_ALPHA + 1) #define BLEND_OFFSET(s, d) \ (((s) * GEN5_BLENDFACTOR_COUNT + (d)) * 64) #define SAMPLER_OFFSET(sf, se, mf, me, k) \ ((((((sf) * EXTEND_COUNT + (se)) * FILTER_COUNT + (mf)) * EXTEND_COUNT + (me)) * KERNEL_COUNT + (k)) * 64) static bool gen5_emit_pipelined_pointers(struct sna *sna, const struct sna_composite_op *op, int blend, int kernel); #define OUT_BATCH(v) batch_emit(sna, v) #define OUT_VERTEX(x,y) vertex_emit_2s(sna, x,y) #define OUT_VERTEX_F(v) vertex_emit(sna, v) static inline bool too_large(int width, int height) { return width > MAX_3D_SIZE || height > MAX_3D_SIZE; } static int gen5_choose_composite_kernel(int op, bool has_mask, bool is_ca, bool is_affine) { int base; if (has_mask) { if (is_ca) { if (gen5_blend_op[op].src_alpha) base = WM_KERNEL_MASKSA; else base = WM_KERNEL_MASKCA; } else base = WM_KERNEL_MASK; } else base = WM_KERNEL; return base + !is_affine; } static bool gen5_magic_ca_pass(struct sna *sna, const struct sna_composite_op *op) { struct gen5_render_state *state = &sna->render_state.gen5; if (!op->need_magic_ca_pass) return false; assert(sna->render.vertex_index > sna->render.vertex_start); DBG(("%s: CA fixup\n", __FUNCTION__)); assert(op->mask.bo != NULL); assert(op->has_component_alpha); gen5_emit_pipelined_pointers (sna, op, PictOpAdd, gen5_choose_composite_kernel(PictOpAdd, true, true, op->is_affine)); OUT_BATCH(GEN5_3DPRIMITIVE | GEN5_3DPRIMITIVE_VERTEX_SEQUENTIAL | (_3DPRIM_RECTLIST << GEN5_3DPRIMITIVE_TOPOLOGY_SHIFT) | (0 << 9) | 4); OUT_BATCH(sna->render.vertex_index - sna->render.vertex_start); OUT_BATCH(sna->render.vertex_start); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ state->last_primitive = sna->kgem.nbatch; return true; } static uint32_t gen5_get_blend(int op, bool has_component_alpha, uint32_t dst_format) { uint32_t src, dst; src = gen5_blend_op[op].src_blend; dst = gen5_blend_op[op].dst_blend; /* If there's no dst alpha channel, adjust the blend op so that we'll treat * it as always 1. */ if (PICT_FORMAT_A(dst_format) == 0) { if (src == GEN5_BLENDFACTOR_DST_ALPHA) src = GEN5_BLENDFACTOR_ONE; else if (src == GEN5_BLENDFACTOR_INV_DST_ALPHA) src = GEN5_BLENDFACTOR_ZERO; } /* If the source alpha is being used, then we should only be in a * case where the source blend factor is 0, and the source blend * value is the mask channels multiplied by the source picture's alpha. */ if (has_component_alpha && gen5_blend_op[op].src_alpha) { if (dst == GEN5_BLENDFACTOR_SRC_ALPHA) dst = GEN5_BLENDFACTOR_SRC_COLOR; else if (dst == GEN5_BLENDFACTOR_INV_SRC_ALPHA) dst = GEN5_BLENDFACTOR_INV_SRC_COLOR; } DBG(("blend op=%d, dst=%x [A=%d] => src=%d, dst=%d => offset=%x\n", op, dst_format, PICT_FORMAT_A(dst_format), src, dst, BLEND_OFFSET(src, dst))); return BLEND_OFFSET(src, dst); } static uint32_t gen5_get_card_format(PictFormat format) { switch (format) { default: return -1; case PICT_a8r8g8b8: return GEN5_SURFACEFORMAT_B8G8R8A8_UNORM; case PICT_x8r8g8b8: return GEN5_SURFACEFORMAT_B8G8R8X8_UNORM; case PICT_a8b8g8r8: return GEN5_SURFACEFORMAT_R8G8B8A8_UNORM; case PICT_x8b8g8r8: return GEN5_SURFACEFORMAT_R8G8B8X8_UNORM; #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: return GEN5_SURFACEFORMAT_B10G10R10A2_UNORM; case PICT_x2r10g10b10: return GEN5_SURFACEFORMAT_B10G10R10X2_UNORM; #endif case PICT_r8g8b8: return GEN5_SURFACEFORMAT_R8G8B8_UNORM; case PICT_r5g6b5: return GEN5_SURFACEFORMAT_B5G6R5_UNORM; case PICT_a1r5g5b5: return GEN5_SURFACEFORMAT_B5G5R5A1_UNORM; case PICT_a8: return GEN5_SURFACEFORMAT_A8_UNORM; case PICT_a4r4g4b4: return GEN5_SURFACEFORMAT_B4G4R4A4_UNORM; } } static uint32_t gen5_get_dest_format(PictFormat format) { switch (format) { default: return -1; case PICT_a8r8g8b8: case PICT_x8r8g8b8: return GEN5_SURFACEFORMAT_B8G8R8A8_UNORM; case PICT_a8b8g8r8: case PICT_x8b8g8r8: return GEN5_SURFACEFORMAT_R8G8B8A8_UNORM; #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: case PICT_x2r10g10b10: return GEN5_SURFACEFORMAT_B10G10R10A2_UNORM; #endif case PICT_r5g6b5: return GEN5_SURFACEFORMAT_B5G6R5_UNORM; case PICT_x1r5g5b5: case PICT_a1r5g5b5: return GEN5_SURFACEFORMAT_B5G5R5A1_UNORM; case PICT_a8: return GEN5_SURFACEFORMAT_A8_UNORM; case PICT_a4r4g4b4: case PICT_x4r4g4b4: return GEN5_SURFACEFORMAT_B4G4R4A4_UNORM; } } static bool gen5_check_dst_format(PictFormat format) { if (gen5_get_dest_format(format) != -1) return true; DBG(("%s: unhandled format: %x\n", __FUNCTION__, (int)format)); return false; } static bool gen5_check_format(uint32_t format) { if (gen5_get_card_format(format) != -1) return true; DBG(("%s: unhandled format: %x\n", __FUNCTION__, (int)format)); return false; } typedef struct gen5_surface_state_padded { struct gen5_surface_state state; char pad[32 - sizeof(struct gen5_surface_state)]; } gen5_surface_state_padded; static void null_create(struct sna_static_stream *stream) { /* A bunch of zeros useful for legacy border color and depth-stencil */ sna_static_stream_map(stream, 64, 64); } static void sampler_state_init(struct gen5_sampler_state *sampler_state, sampler_filter_t filter, sampler_extend_t extend) { sampler_state->ss0.lod_preclamp = 1; /* GL mode */ /* We use the legacy mode to get the semantics specified by * the Render extension. */ sampler_state->ss0.border_color_mode = GEN5_BORDER_COLOR_MODE_LEGACY; switch (filter) { default: case SAMPLER_FILTER_NEAREST: sampler_state->ss0.min_filter = GEN5_MAPFILTER_NEAREST; sampler_state->ss0.mag_filter = GEN5_MAPFILTER_NEAREST; break; case SAMPLER_FILTER_BILINEAR: sampler_state->ss0.min_filter = GEN5_MAPFILTER_LINEAR; sampler_state->ss0.mag_filter = GEN5_MAPFILTER_LINEAR; break; } switch (extend) { default: case SAMPLER_EXTEND_NONE: sampler_state->ss1.r_wrap_mode = GEN5_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss1.s_wrap_mode = GEN5_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss1.t_wrap_mode = GEN5_TEXCOORDMODE_CLAMP_BORDER; break; case SAMPLER_EXTEND_REPEAT: sampler_state->ss1.r_wrap_mode = GEN5_TEXCOORDMODE_WRAP; sampler_state->ss1.s_wrap_mode = GEN5_TEXCOORDMODE_WRAP; sampler_state->ss1.t_wrap_mode = GEN5_TEXCOORDMODE_WRAP; break; case SAMPLER_EXTEND_PAD: sampler_state->ss1.r_wrap_mode = GEN5_TEXCOORDMODE_CLAMP; sampler_state->ss1.s_wrap_mode = GEN5_TEXCOORDMODE_CLAMP; sampler_state->ss1.t_wrap_mode = GEN5_TEXCOORDMODE_CLAMP; break; case SAMPLER_EXTEND_REFLECT: sampler_state->ss1.r_wrap_mode = GEN5_TEXCOORDMODE_MIRROR; sampler_state->ss1.s_wrap_mode = GEN5_TEXCOORDMODE_MIRROR; sampler_state->ss1.t_wrap_mode = GEN5_TEXCOORDMODE_MIRROR; break; } } static uint32_t gen5_filter(uint32_t filter) { switch (filter) { default: assert(0); case PictFilterNearest: return SAMPLER_FILTER_NEAREST; case PictFilterBilinear: return SAMPLER_FILTER_BILINEAR; } } static uint32_t gen5_check_filter(PicturePtr picture) { switch (picture->filter) { case PictFilterNearest: case PictFilterBilinear: return true; default: DBG(("%s: unknown filter: %x\n", __FUNCTION__, picture->filter)); return false; } } static uint32_t gen5_repeat(uint32_t repeat) { switch (repeat) { default: assert(0); case RepeatNone: return SAMPLER_EXTEND_NONE; case RepeatNormal: return SAMPLER_EXTEND_REPEAT; case RepeatPad: return SAMPLER_EXTEND_PAD; case RepeatReflect: return SAMPLER_EXTEND_REFLECT; } } static bool gen5_check_repeat(PicturePtr picture) { if (!picture->repeat) return true; switch (picture->repeatType) { case RepeatNone: case RepeatNormal: case RepeatPad: case RepeatReflect: return true; default: DBG(("%s: unknown repeat: %x\n", __FUNCTION__, picture->repeatType)); return false; } } static uint32_t gen5_tiling_bits(uint32_t tiling) { switch (tiling) { default: assert(0); case I915_TILING_NONE: return 0; case I915_TILING_X: return GEN5_SURFACE_TILED; case I915_TILING_Y: return GEN5_SURFACE_TILED | GEN5_SURFACE_TILED_Y; } } /** * Sets up the common fields for a surface state buffer for the given * picture in the given surface state buffer. */ static uint32_t gen5_bind_bo(struct sna *sna, struct kgem_bo *bo, uint32_t width, uint32_t height, uint32_t format, bool is_dst) { uint32_t domains; uint16_t offset; uint32_t *ss; /* After the first bind, we manage the cache domains within the batch */ if (!DBG_NO_SURFACE_CACHE) { offset = kgem_bo_get_binding(bo, format | is_dst << 31); if (offset) { if (is_dst) kgem_bo_mark_dirty(bo); assert(offset >= sna->kgem.surface); return offset * sizeof(uint32_t); } } offset = sna->kgem.surface -= sizeof(struct gen5_surface_state_padded) / sizeof(uint32_t); ss = sna->kgem.batch + offset; ss[0] = (GEN5_SURFACE_2D << GEN5_SURFACE_TYPE_SHIFT | GEN5_SURFACE_BLEND_ENABLED | format << GEN5_SURFACE_FORMAT_SHIFT); if (is_dst) { ss[0] |= GEN5_SURFACE_RC_READ_WRITE; domains = I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER; } else domains = I915_GEM_DOMAIN_SAMPLER << 16; ss[1] = kgem_add_reloc(&sna->kgem, offset + 1, bo, domains, 0); ss[2] = ((width - 1) << GEN5_SURFACE_WIDTH_SHIFT | (height - 1) << GEN5_SURFACE_HEIGHT_SHIFT); ss[3] = (gen5_tiling_bits(bo->tiling) | (bo->pitch - 1) << GEN5_SURFACE_PITCH_SHIFT); ss[4] = 0; ss[5] = 0; kgem_bo_set_binding(bo, format | is_dst << 31, offset); DBG(("[%x] bind bo(handle=%d, addr=%d), format=%d, width=%d, height=%d, pitch=%d, tiling=%d -> %s\n", offset, bo->handle, ss[1], format, width, height, bo->pitch, bo->tiling, domains & 0xffff ? "render" : "sampler")); return offset * sizeof(uint32_t); } static void gen5_emit_vertex_buffer(struct sna *sna, const struct sna_composite_op *op) { int id = op->u.gen5.ve_id; assert((sna->render.vb_id & (1 << id)) == 0); OUT_BATCH(GEN5_3DSTATE_VERTEX_BUFFERS | 3); OUT_BATCH(id << VB0_BUFFER_INDEX_SHIFT | VB0_VERTEXDATA | (4*op->floats_per_vertex << VB0_BUFFER_PITCH_SHIFT)); assert(sna->render.nvertex_reloc < ARRAY_SIZE(sna->render.vertex_reloc)); sna->render.vertex_reloc[sna->render.nvertex_reloc++] = sna->kgem.nbatch; OUT_BATCH(0); OUT_BATCH(~0); /* max address: disabled */ OUT_BATCH(0); sna->render.vb_id |= 1 << id; } static void gen5_emit_primitive(struct sna *sna) { if (sna->kgem.nbatch == sna->render_state.gen5.last_primitive) { sna->render.vertex_offset = sna->kgem.nbatch - 5; return; } OUT_BATCH(GEN5_3DPRIMITIVE | GEN5_3DPRIMITIVE_VERTEX_SEQUENTIAL | (_3DPRIM_RECTLIST << GEN5_3DPRIMITIVE_TOPOLOGY_SHIFT) | (0 << 9) | 4); sna->render.vertex_offset = sna->kgem.nbatch; OUT_BATCH(0); /* vertex count, to be filled in later */ OUT_BATCH(sna->render.vertex_index); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ sna->render.vertex_start = sna->render.vertex_index; sna->render_state.gen5.last_primitive = sna->kgem.nbatch; } static bool gen5_rectangle_begin(struct sna *sna, const struct sna_composite_op *op) { int id = op->u.gen5.ve_id; int ndwords; if (sna_vertex_wait__locked(&sna->render) && sna->render.vertex_offset) return true; ndwords = op->need_magic_ca_pass ? 20 : 6; if ((sna->render.vb_id & (1 << id)) == 0) ndwords += 5; if (!kgem_check_batch(&sna->kgem, ndwords)) return false; if ((sna->render.vb_id & (1 << id)) == 0) gen5_emit_vertex_buffer(sna, op); if (sna->render.vertex_offset == 0) gen5_emit_primitive(sna); return true; } static int gen5_get_rectangles__flush(struct sna *sna, const struct sna_composite_op *op) { /* Preventing discarding new vbo after lock contention */ if (sna_vertex_wait__locked(&sna->render)) { int rem = vertex_space(sna); if (rem > op->floats_per_rect) return rem; } if (!kgem_check_batch(&sna->kgem, op->need_magic_ca_pass ? 40 : 6)) return 0; if (!kgem_check_reloc_and_exec(&sna->kgem, 2)) return 0; if (sna->render.vertex_offset) { gen4_vertex_flush(sna); if (gen5_magic_ca_pass(sna, op)) gen5_emit_pipelined_pointers(sna, op, op->op, op->u.gen5.wm_kernel); } return gen4_vertex_finish(sna); } inline static int gen5_get_rectangles(struct sna *sna, const struct sna_composite_op *op, int want, void (*emit_state)(struct sna *sna, const struct sna_composite_op *op)) { int rem; assert(want); start: rem = vertex_space(sna); if (unlikely(rem < op->floats_per_rect)) { DBG(("flushing vbo for %s: %d < %d\n", __FUNCTION__, rem, op->floats_per_rect)); rem = gen5_get_rectangles__flush(sna, op); if (unlikely (rem == 0)) goto flush; } if (unlikely(sna->render.vertex_offset == 0)) { if (!gen5_rectangle_begin(sna, op)) goto flush; else goto start; } assert(rem <= vertex_space(sna)); assert(op->floats_per_rect <= rem); if (want > 1 && want * op->floats_per_rect > rem) want = rem / op->floats_per_rect; sna->render.vertex_index += 3*want; return want; flush: if (sna->render.vertex_offset) { gen4_vertex_flush(sna); gen5_magic_ca_pass(sna, op); } sna_vertex_wait__locked(&sna->render); _kgem_submit(&sna->kgem); emit_state(sna, op); goto start; } static uint32_t * gen5_composite_get_binding_table(struct sna *sna, uint16_t *offset) { sna->kgem.surface -= sizeof(struct gen5_surface_state_padded) / sizeof(uint32_t); DBG(("%s(%x)\n", __FUNCTION__, 4*sna->kgem.surface)); /* Clear all surplus entries to zero in case of prefetch */ *offset = sna->kgem.surface; return memset(sna->kgem.batch + sna->kgem.surface, 0, sizeof(struct gen5_surface_state_padded)); } static void gen5_emit_urb(struct sna *sna) { int urb_vs_start, urb_vs_size; int urb_gs_start, urb_gs_size; int urb_clip_start, urb_clip_size; int urb_sf_start, urb_sf_size; int urb_cs_start, urb_cs_size; urb_vs_start = 0; urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE; urb_gs_start = urb_vs_start + urb_vs_size; urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE; urb_clip_start = urb_gs_start + urb_gs_size; urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE; urb_sf_start = urb_clip_start + urb_clip_size; urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE; urb_cs_start = urb_sf_start + urb_sf_size; urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE; OUT_BATCH(GEN5_URB_FENCE | UF0_CS_REALLOC | UF0_SF_REALLOC | UF0_CLIP_REALLOC | UF0_GS_REALLOC | UF0_VS_REALLOC | 1); OUT_BATCH(((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) | ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) | ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT)); OUT_BATCH(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) | ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT)); /* Constant buffer state */ OUT_BATCH(GEN5_CS_URB_STATE | 0); OUT_BATCH((URB_CS_ENTRY_SIZE - 1) << 4 | URB_CS_ENTRIES << 0); } static void gen5_emit_state_base_address(struct sna *sna) { assert(sna->render_state.gen5.general_bo->proxy == NULL); OUT_BATCH(GEN5_STATE_BASE_ADDRESS | 6); OUT_BATCH(kgem_add_reloc(&sna->kgem, /* general */ sna->kgem.nbatch, sna->render_state.gen5.general_bo, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); OUT_BATCH(kgem_add_reloc(&sna->kgem, /* surface */ sna->kgem.nbatch, NULL, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); OUT_BATCH(0); /* media */ OUT_BATCH(kgem_add_reloc(&sna->kgem, /* instruction */ sna->kgem.nbatch, sna->render_state.gen5.general_bo, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); /* upper bounds, all disabled */ OUT_BATCH(BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(BASE_ADDRESS_MODIFY); } static void gen5_emit_invariant(struct sna *sna) { /* Ironlake errata workaround: Before disabling the clipper, * you have to MI_FLUSH to get the pipeline idle. * * However, the kernel flushes the pipeline between batches, * so we should be safe.... * * On the other hand, after using BLT we must use a non-pipelined * operation... */ if (sna->kgem.nreloc) OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH); OUT_BATCH(GEN5_PIPELINE_SELECT | PIPELINE_SELECT_3D); gen5_emit_state_base_address(sna); sna->render_state.gen5.needs_invariant = false; } static void gen5_get_batch(struct sna *sna, const struct sna_composite_op *op) { kgem_set_mode(&sna->kgem, KGEM_RENDER, op->dst.bo); if (!kgem_check_batch_with_surfaces(&sna->kgem, 150, 4)) { DBG(("%s: flushing batch: %d < %d+%d\n", __FUNCTION__, sna->kgem.surface - sna->kgem.nbatch, 150, 4*8)); kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } if (sna->render_state.gen5.needs_invariant) gen5_emit_invariant(sna); } static void gen5_align_vertex(struct sna *sna, const struct sna_composite_op *op) { assert(op->floats_per_rect == 3*op->floats_per_vertex); if (op->floats_per_vertex != sna->render_state.gen5.floats_per_vertex) { DBG(("aligning vertex: was %d, now %d floats per vertex\n", sna->render_state.gen5.floats_per_vertex, op->floats_per_vertex)); gen4_vertex_align(sna, op); sna->render_state.gen5.floats_per_vertex = op->floats_per_vertex; } } static void gen5_emit_binding_table(struct sna *sna, uint16_t offset) { if (!DBG_NO_STATE_CACHE && sna->render_state.gen5.surface_table == offset) return; sna->render_state.gen5.surface_table = offset; /* Binding table pointers */ OUT_BATCH(GEN5_3DSTATE_BINDING_TABLE_POINTERS | 4); OUT_BATCH(0); /* vs */ OUT_BATCH(0); /* gs */ OUT_BATCH(0); /* clip */ OUT_BATCH(0); /* sf */ /* Only the PS uses the binding table */ OUT_BATCH(offset*4); } static bool gen5_emit_pipelined_pointers(struct sna *sna, const struct sna_composite_op *op, int blend, int kernel) { uint16_t sp, bp; uint32_t key; DBG(("%s: has_mask=%d, src=(%d, %d), mask=(%d, %d),kernel=%d, blend=%d, ca=%d, format=%x\n", __FUNCTION__, op->u.gen5.ve_id & 2, op->src.filter, op->src.repeat, op->mask.filter, op->mask.repeat, kernel, blend, op->has_component_alpha, (int)op->dst.format)); sp = SAMPLER_OFFSET(op->src.filter, op->src.repeat, op->mask.filter, op->mask.repeat, kernel); bp = gen5_get_blend(blend, op->has_component_alpha, op->dst.format); key = sp | (uint32_t)bp << 16 | (op->mask.bo != NULL) << 31; DBG(("%s: sp=%d, bp=%d, key=%08x (current sp=%d, bp=%d, key=%08x)\n", __FUNCTION__, sp, bp, key, sna->render_state.gen5.last_pipelined_pointers & 0xffff, (sna->render_state.gen5.last_pipelined_pointers >> 16) & 0x7fff, sna->render_state.gen5.last_pipelined_pointers)); if (key == sna->render_state.gen5.last_pipelined_pointers) return false; OUT_BATCH(GEN5_3DSTATE_PIPELINED_POINTERS | 5); OUT_BATCH(sna->render_state.gen5.vs); OUT_BATCH(GEN5_GS_DISABLE); /* passthrough */ OUT_BATCH(GEN5_CLIP_DISABLE); /* passthrough */ OUT_BATCH(sna->render_state.gen5.sf[op->mask.bo != NULL]); OUT_BATCH(sna->render_state.gen5.wm + sp); OUT_BATCH(sna->render_state.gen5.cc + bp); bp = (sna->render_state.gen5.last_pipelined_pointers & 0x7fff0000) != ((uint32_t)bp << 16); sna->render_state.gen5.last_pipelined_pointers = key; gen5_emit_urb(sna); return bp; } static bool gen5_emit_drawing_rectangle(struct sna *sna, const struct sna_composite_op *op) { uint32_t limit = (op->dst.height - 1) << 16 | (op->dst.width - 1); uint32_t offset = (uint16_t)op->dst.y << 16 | (uint16_t)op->dst.x; assert(!too_large(abs(op->dst.x), abs(op->dst.y))); assert(!too_large(op->dst.width, op->dst.height)); if (!DBG_NO_STATE_CACHE && sna->render_state.gen5.drawrect_limit == limit && sna->render_state.gen5.drawrect_offset == offset) return false; sna->render_state.gen5.drawrect_offset = offset; sna->render_state.gen5.drawrect_limit = limit; OUT_BATCH(GEN5_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0x00000000); OUT_BATCH(limit); OUT_BATCH(offset); return true; } static void gen5_emit_vertex_elements(struct sna *sna, const struct sna_composite_op *op) { /* * vertex data in vertex buffer * position: (x, y) * texture coordinate 0: (u0, v0) if (is_affine is true) else (u0, v0, w0) * texture coordinate 1 if (has_mask is true): same as above */ struct gen5_render_state *render = &sna->render_state.gen5; int id = op->u.gen5.ve_id; bool has_mask = id >> 2; uint32_t format, dw; if (!DBG_NO_STATE_CACHE && render->ve_id == id) return; DBG(("%s: changing %d -> %d\n", __FUNCTION__, render->ve_id, id)); render->ve_id = id; /* The VUE layout * dword 0-3: pad (0.0, 0.0, 0.0. 0.0) * dword 4-7: position (x, y, 1.0, 1.0), * dword 8-11: texture coordinate 0 (u0, v0, w0, 1.0) * dword 12-15: texture coordinate 1 (u1, v1, w1, 1.0) * * dword 4-15 are fetched from vertex buffer */ OUT_BATCH(GEN5_3DSTATE_VERTEX_ELEMENTS | ((2 * (has_mask ? 4 : 3)) + 1 - 2)); OUT_BATCH((id << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (GEN5_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT) | (0 << VE0_OFFSET_SHIFT)); OUT_BATCH((VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT) | (VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT) | (VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT) | (VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT)); /* x,y */ OUT_BATCH(id << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN5_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); OUT_BATCH(VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT | VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT); /* u0, v0, w0 */ DBG(("%s: id=%d, first channel %d floats, offset=4b\n", __FUNCTION__, id, id & 3)); dw = VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT; switch (id & 3) { default: assert(0); case 0: format = GEN5_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT; break; case 1: format = GEN5_SURFACEFORMAT_R32_FLOAT << VE0_FORMAT_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT; break; case 2: format = GEN5_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT; break; case 3: format = GEN5_SURFACEFORMAT_R32G32B32_FLOAT << VE0_FORMAT_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_2_SHIFT; break; } OUT_BATCH(id << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | format | 4 << VE0_OFFSET_SHIFT); OUT_BATCH(dw); /* u1, v1, w1 */ if (has_mask) { unsigned offset = 4 + ((id & 3) ?: 1) * sizeof(float); DBG(("%s: id=%x, second channel %d floats, offset=%db\n", __FUNCTION__, id, id >> 2, offset)); dw = VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT; switch (id >> 2) { case 1: format = GEN5_SURFACEFORMAT_R32_FLOAT << VE0_FORMAT_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT; break; default: assert(0); case 2: format = GEN5_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT; break; case 3: format = GEN5_SURFACEFORMAT_R32G32B32_FLOAT << VE0_FORMAT_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_2_SHIFT; break; } OUT_BATCH(id << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | format | offset << VE0_OFFSET_SHIFT); OUT_BATCH(dw); } } inline static void gen5_emit_pipe_flush(struct sna *sna) { #if 1 OUT_BATCH(GEN5_PIPE_CONTROL | GEN5_PIPE_CONTROL_WC_FLUSH | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); #else OUT_BATCH(MI_FLUSH | MI_INHIBIT_RENDER_CACHE_FLUSH); #endif } static void gen5_emit_state(struct sna *sna, const struct sna_composite_op *op, uint16_t offset) { bool flush = false; assert(op->dst.bo->exec); /* drawrect must be first for Ironlake BLT workaround */ if (gen5_emit_drawing_rectangle(sna, op)) offset &= ~1; gen5_emit_binding_table(sna, offset & ~1); if (gen5_emit_pipelined_pointers(sna, op, op->op, op->u.gen5.wm_kernel)){ DBG(("%s: changed blend state, flush required? %d\n", __FUNCTION__, (offset & 1) && op->op > PictOpSrc)); flush = (offset & 1) && op->op > PictOpSrc; } gen5_emit_vertex_elements(sna, op); if (ALWAYS_FLUSH || kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo)) { DBG(("%s: flushing dirty (%d, %d)\n", __FUNCTION__, kgem_bo_is_dirty(op->src.bo), kgem_bo_is_dirty(op->mask.bo))); OUT_BATCH(MI_FLUSH); kgem_clear_dirty(&sna->kgem); kgem_bo_mark_dirty(op->dst.bo); flush = false; } if (flush) { DBG(("%s: forcing flush\n", __FUNCTION__)); gen5_emit_pipe_flush(sna); } } static void gen5_bind_surfaces(struct sna *sna, const struct sna_composite_op *op) { bool dirty = kgem_bo_is_dirty(op->dst.bo); uint32_t *binding_table; uint16_t offset; gen5_get_batch(sna, op); binding_table = gen5_composite_get_binding_table(sna, &offset); binding_table[0] = gen5_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen5_get_dest_format(op->dst.format), true); binding_table[1] = gen5_bind_bo(sna, op->src.bo, op->src.width, op->src.height, op->src.card_format, false); if (op->mask.bo) { assert(op->u.gen5.ve_id >> 2); binding_table[2] = gen5_bind_bo(sna, op->mask.bo, op->mask.width, op->mask.height, op->mask.card_format, false); } if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen5.surface_table) == *(uint64_t*)binding_table && (op->mask.bo == NULL || sna->kgem.batch[sna->render_state.gen5.surface_table+2] == binding_table[2])) { sna->kgem.surface += sizeof(struct gen5_surface_state_padded) / sizeof(uint32_t); offset = sna->render_state.gen5.surface_table; } gen5_emit_state(sna, op, offset | dirty); } fastcall static void gen5_render_composite_blt(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { DBG(("%s: src=(%d, %d)+(%d, %d), mask=(%d, %d)+(%d, %d), dst=(%d, %d)+(%d, %d), size=(%d, %d)\n", __FUNCTION__, r->src.x, r->src.y, op->src.offset[0], op->src.offset[1], r->mask.x, r->mask.y, op->mask.offset[0], op->mask.offset[1], r->dst.x, r->dst.y, op->dst.x, op->dst.y, r->width, r->height)); gen5_get_rectangles(sna, op, 1, gen5_bind_surfaces); op->prim_emit(sna, op, r); } fastcall static void gen5_render_composite_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { struct sna_composite_rectangles r; DBG((" %s: (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); gen5_get_rectangles(sna, op, 1, gen5_bind_surfaces); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.mask = r.src = r.dst; op->prim_emit(sna, op, &r); } static void gen5_render_composite_boxes__blt(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s(%d) delta=(%d, %d), src=(%d, %d)/(%d, %d), mask=(%d, %d)/(%d, %d)\n", __FUNCTION__, nbox, op->dst.x, op->dst.y, op->src.offset[0], op->src.offset[1], op->src.width, op->src.height, op->mask.offset[0], op->mask.offset[1], op->mask.width, op->mask.height)); do { int nbox_this_time; nbox_this_time = gen5_get_rectangles(sna, op, nbox, gen5_bind_surfaces); nbox -= nbox_this_time; do { struct sna_composite_rectangles r; DBG((" %s: (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.mask = r.src = r.dst; op->prim_emit(sna, op, &r); box++; } while (--nbox_this_time); } while (nbox); } static void gen5_render_composite_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); do { int nbox_this_time; float *v; nbox_this_time = gen5_get_rectangles(sna, op, nbox, gen5_bind_surfaces); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; } while (nbox); } static void gen5_render_composite_boxes__thread(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen5_get_rectangles(sna, op, nbox, gen5_bind_surfaces); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } #ifndef MAX #define MAX(a,b) ((a) > (b) ? (a) : (b)) #endif static uint32_t gen5_bind_video_source(struct sna *sna, struct kgem_bo *src_bo, uint32_t src_offset, int src_width, int src_height, int src_pitch, uint32_t src_surf_format) { struct gen5_surface_state *ss; sna->kgem.surface -= sizeof(struct gen5_surface_state_padded) / sizeof(uint32_t); ss = memset(sna->kgem.batch + sna->kgem.surface, 0, sizeof(*ss)); ss->ss0.surface_type = GEN5_SURFACE_2D; ss->ss0.surface_format = src_surf_format; ss->ss0.color_blend = 1; ss->ss1.base_addr = kgem_add_reloc(&sna->kgem, sna->kgem.surface + 1, src_bo, I915_GEM_DOMAIN_SAMPLER << 16, src_offset); ss->ss2.width = src_width - 1; ss->ss2.height = src_height - 1; ss->ss3.pitch = src_pitch - 1; return sna->kgem.surface * sizeof(uint32_t); } static void gen5_video_bind_surfaces(struct sna *sna, const struct sna_composite_op *op) { bool dirty = kgem_bo_is_dirty(op->dst.bo); struct sna_video_frame *frame = op->priv; uint32_t src_surf_format; uint32_t src_surf_base[6]; int src_width[6]; int src_height[6]; int src_pitch[6]; uint32_t *binding_table; uint16_t offset; int n_src, n; src_surf_base[0] = 0; src_surf_base[1] = 0; src_surf_base[2] = frame->VBufOffset; src_surf_base[3] = frame->VBufOffset; src_surf_base[4] = frame->UBufOffset; src_surf_base[5] = frame->UBufOffset; if (is_planar_fourcc(frame->id)) { src_surf_format = GEN5_SURFACEFORMAT_R8_UNORM; src_width[1] = src_width[0] = frame->width; src_height[1] = src_height[0] = frame->height; src_pitch[1] = src_pitch[0] = frame->pitch[1]; src_width[4] = src_width[5] = src_width[2] = src_width[3] = frame->width / 2; src_height[4] = src_height[5] = src_height[2] = src_height[3] = frame->height / 2; src_pitch[4] = src_pitch[5] = src_pitch[2] = src_pitch[3] = frame->pitch[0]; n_src = 6; } else { if (frame->id == FOURCC_UYVY) src_surf_format = GEN5_SURFACEFORMAT_YCRCB_SWAPY; else src_surf_format = GEN5_SURFACEFORMAT_YCRCB_NORMAL; src_width[0] = frame->width; src_height[0] = frame->height; src_pitch[0] = frame->pitch[0]; n_src = 1; } gen5_get_batch(sna, op); binding_table = gen5_composite_get_binding_table(sna, &offset); binding_table[0] = gen5_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen5_get_dest_format(op->dst.format), true); for (n = 0; n < n_src; n++) { binding_table[1+n] = gen5_bind_video_source(sna, frame->bo, src_surf_base[n], src_width[n], src_height[n], src_pitch[n], src_surf_format); } gen5_emit_state(sna, op, offset | dirty); } static bool gen5_render_video(struct sna *sna, struct sna_video *video, struct sna_video_frame *frame, RegionPtr dstRegion, PixmapPtr pixmap) { struct sna_composite_op tmp; struct sna_pixmap *priv = sna_pixmap(pixmap); int dst_width = dstRegion->extents.x2 - dstRegion->extents.x1; int dst_height = dstRegion->extents.y2 - dstRegion->extents.y1; int src_width = frame->src.x2 - frame->src.x1; int src_height = frame->src.y2 - frame->src.y1; float src_offset_x, src_offset_y; float src_scale_x, src_scale_y; int nbox, pix_xoff, pix_yoff; const BoxRec *box; DBG(("%s: %dx%d -> %dx%d\n", __FUNCTION__, src_width, src_height, dst_width, dst_height)); assert(priv->gpu_bo); memset(&tmp, 0, sizeof(tmp)); tmp.op = PictOpSrc; tmp.dst.pixmap = pixmap; tmp.dst.width = pixmap->drawable.width; tmp.dst.height = pixmap->drawable.height; tmp.dst.format = sna_format_for_depth(pixmap->drawable.depth); tmp.dst.bo = priv->gpu_bo; if (src_width == dst_width && src_height == dst_height) tmp.src.filter = SAMPLER_FILTER_NEAREST; else tmp.src.filter = SAMPLER_FILTER_BILINEAR; tmp.src.repeat = SAMPLER_EXTEND_PAD; tmp.src.bo = frame->bo; tmp.mask.bo = NULL; tmp.u.gen5.wm_kernel = is_planar_fourcc(frame->id) ? WM_KERNEL_VIDEO_PLANAR : WM_KERNEL_VIDEO_PACKED; tmp.u.gen5.ve_id = 2; tmp.is_affine = true; tmp.floats_per_vertex = 3; tmp.floats_per_rect = 9; tmp.priv = frame; if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, frame->bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, frame->bo, NULL)) return false; } gen5_align_vertex(sna, &tmp); gen5_video_bind_surfaces(sna, &tmp); /* Set up the offset for translating from the given region (in screen * coordinates) to the backing pixmap. */ #ifdef COMPOSITE pix_xoff = -pixmap->screen_x + pixmap->drawable.x; pix_yoff = -pixmap->screen_y + pixmap->drawable.y; #else pix_xoff = 0; pix_yoff = 0; #endif src_scale_x = (float)src_width / dst_width / frame->width; src_offset_x = (float)frame->src.x1 / frame->width - dstRegion->extents.x1 * src_scale_x; src_scale_y = (float)src_height / dst_height / frame->height; src_offset_y = (float)frame->src.y1 / frame->height - dstRegion->extents.y1 * src_scale_y; box = region_rects(dstRegion); nbox = region_num_rects(dstRegion); while (nbox--) { BoxRec r; r.x1 = box->x1 + pix_xoff; r.x2 = box->x2 + pix_xoff; r.y1 = box->y1 + pix_yoff; r.y2 = box->y2 + pix_yoff; gen5_get_rectangles(sna, &tmp, 1, gen5_video_bind_surfaces); OUT_VERTEX(r.x2, r.y2); OUT_VERTEX_F(box->x2 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y); OUT_VERTEX(r.x1, r.y2); OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y); OUT_VERTEX(r.x1, r.y1); OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y1 * src_scale_y + src_offset_y); if (!DAMAGE_IS_ALL(priv->gpu_damage)) { sna_damage_add_box(&priv->gpu_damage, &r); sna_damage_subtract_box(&priv->cpu_damage, &r); } box++; } gen4_vertex_flush(sna); return true; } static int gen5_composite_picture(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int x, int y, int w, int h, int dst_x, int dst_y, bool precise) { PixmapPtr pixmap; uint32_t color; int16_t dx, dy; DBG(("%s: (%d, %d)x(%d, %d), dst=(%d, %d)\n", __FUNCTION__, x, y, w, h, dst_x, dst_y)); channel->is_solid = false; channel->card_format = -1; if (sna_picture_is_solid(picture, &color)) return gen4_channel_init_solid(sna, channel, color); if (picture->pDrawable == NULL) { int ret; if (picture->pSourcePict->type == SourcePictTypeLinear) return gen4_channel_init_linear(sna, picture, channel, x, y, w, h, dst_x, dst_y); DBG(("%s -- fixup, gradient\n", __FUNCTION__)); ret = -1; if (!precise) ret = sna_render_picture_approximate_gradient(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (ret == -1) ret = sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); return ret; } if (picture->alphaMap) { DBG(("%s -- fallback, alphamap\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } if (!gen5_check_repeat(picture)) return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (!gen5_check_filter(picture)) return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); channel->repeat = picture->repeat ? picture->repeatType : RepeatNone; channel->filter = picture->filter; pixmap = get_drawable_pixmap(picture->pDrawable); get_drawable_deltas(picture->pDrawable, pixmap, &dx, &dy); x += dx + picture->pDrawable->x; y += dy + picture->pDrawable->y; channel->is_affine = sna_transform_is_affine(picture->transform); if (sna_transform_is_imprecise_integer_translation(picture->transform, picture->filter, precise, &dx, &dy)) { DBG(("%s: integer translation (%d, %d), removing\n", __FUNCTION__, dx, dy)); x += dx; y += dy; channel->transform = NULL; channel->filter = PictFilterNearest; if (channel->repeat || (x >= 0 && y >= 0 && x + w < pixmap->drawable.width && y + h < pixmap->drawable.height)) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv && priv->clear) { DBG(("%s: converting large pixmap source into solid [%08x]\n", __FUNCTION__, priv->clear_color)); return gen4_channel_init_solid(sna, channel, priv->clear_color); } } } else channel->transform = picture->transform; channel->pict_format = picture->format; channel->card_format = gen5_get_card_format(picture->format); if (channel->card_format == -1) return sna_render_picture_convert(sna, picture, channel, pixmap, x, y, w, h, dst_x, dst_y, false); if (too_large(pixmap->drawable.width, pixmap->drawable.height)) return sna_render_picture_extract(sna, picture, channel, x, y, w, h, dst_x, dst_y); DBG(("%s: pixmap, repeat=%d, filter=%d, transform?=%d [affine? %d], format=%08x\n", __FUNCTION__, channel->repeat, channel->filter, channel->transform != NULL, channel->is_affine, channel->pict_format)); if (channel->transform) { DBG(("%s: transform=[%f %f %f, %f %f %f, %f %f %f]\n", __FUNCTION__, channel->transform->matrix[0][0] / 65536., channel->transform->matrix[0][1] / 65536., channel->transform->matrix[0][2] / 65536., channel->transform->matrix[1][0] / 65536., channel->transform->matrix[1][1] / 65536., channel->transform->matrix[1][2] / 65536., channel->transform->matrix[2][0] / 65536., channel->transform->matrix[2][1] / 65536., channel->transform->matrix[2][2] / 65536.)); } return sna_render_pixmap_bo(sna, channel, pixmap, x, y, w, h, dst_x, dst_y); } static void gen5_composite_channel_convert(struct sna_composite_channel *channel) { channel->repeat = gen5_repeat(channel->repeat); channel->filter = gen5_filter(channel->filter); if (channel->card_format == (unsigned)-1) channel->card_format = gen5_get_card_format(channel->pict_format); } static void gen5_render_composite_done(struct sna *sna, const struct sna_composite_op *op) { if (sna->render.vertex_offset) { gen4_vertex_flush(sna); gen5_magic_ca_pass(sna,op); } DBG(("%s()\n", __FUNCTION__)); if (op->mask.bo) kgem_bo_destroy(&sna->kgem, op->mask.bo); if (op->src.bo) kgem_bo_destroy(&sna->kgem, op->src.bo); sna_render_composite_redirect_done(sna, op); } static bool gen5_composite_set_target(struct sna *sna, struct sna_composite_op *op, PicturePtr dst, int x, int y, int w, int h, bool partial) { BoxRec box; unsigned hint; op->dst.pixmap = get_drawable_pixmap(dst->pDrawable); op->dst.width = op->dst.pixmap->drawable.width; op->dst.height = op->dst.pixmap->drawable.height; op->dst.format = dst->format; if (w && h) { box.x1 = x; box.y1 = y; box.x2 = x + w; box.y2 = y + h; } else sna_render_picture_extents(dst, &box); hint = PREFER_GPU | FORCE_GPU | RENDER_GPU; if (!partial) { hint |= IGNORE_DAMAGE; if (w == op->dst.width && h == op->dst.height) hint |= REPLACES; } op->dst.bo = sna_drawable_use_bo(dst->pDrawable, hint, &box, &op->damage); if (op->dst.bo == NULL) return false; if (hint & REPLACES) { struct sna_pixmap *priv = sna_pixmap(op->dst.pixmap); kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); } get_drawable_deltas(dst->pDrawable, op->dst.pixmap, &op->dst.x, &op->dst.y); DBG(("%s: pixmap=%ld, format=%08x, size=%dx%d, pitch=%d, delta=(%d,%d),damage=%p\n", __FUNCTION__, op->dst.pixmap->drawable.serialNumber, (int)op->dst.format, op->dst.width, op->dst.height, op->dst.bo->pitch, op->dst.x, op->dst.y, op->damage ? *op->damage : (void *)-1)); assert(op->dst.bo->proxy == NULL); if (too_large(op->dst.width, op->dst.height) && !sna_render_composite_redirect(sna, op, x, y, w, h, partial)) return false; return true; } static bool is_gradient(PicturePtr picture, bool precise) { if (picture->pDrawable) return false; switch (picture->pSourcePict->type) { case SourcePictTypeSolidFill: case SourcePictTypeLinear: return false; default: return precise; } } static bool has_alphamap(PicturePtr p) { return p->alphaMap != NULL; } static bool need_upload(struct sna *sna, PicturePtr p) { return p->pDrawable && untransformed(p) && !is_gpu(sna, p->pDrawable, PREFER_GPU_RENDER); } static bool source_is_busy(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv == NULL) return false; if (priv->clear) return false; if (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo)) return true; if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; return priv->gpu_damage && !priv->cpu_damage; } static bool source_fallback(struct sna *sna, PicturePtr p, PixmapPtr pixmap, bool precise) { if (sna_picture_is_solid(p, NULL)) return false; if (is_gradient(p, precise) || !gen5_check_repeat(p) || !gen5_check_format(p->format)) return true; if (pixmap && source_is_busy(pixmap)) return false; return has_alphamap(p) || !gen5_check_filter(p) || need_upload(sna, p); } static bool gen5_composite_fallback(struct sna *sna, PicturePtr src, PicturePtr mask, PicturePtr dst) { PixmapPtr src_pixmap; PixmapPtr mask_pixmap; PixmapPtr dst_pixmap; bool src_fallback, mask_fallback; if (!gen5_check_dst_format(dst->format)) { DBG(("%s: unknown destination format: %d\n", __FUNCTION__, dst->format)); return true; } dst_pixmap = get_drawable_pixmap(dst->pDrawable); src_pixmap = src->pDrawable ? get_drawable_pixmap(src->pDrawable) : NULL; src_fallback = source_fallback(sna, src, src_pixmap, dst->polyMode == PolyModePrecise); if (mask) { mask_pixmap = mask->pDrawable ? get_drawable_pixmap(mask->pDrawable) : NULL; mask_fallback = source_fallback(sna, mask, mask_pixmap, dst->polyMode == PolyModePrecise); } else { mask_pixmap = NULL; mask_fallback = false; } /* If we are using the destination as a source and need to * readback in order to upload the source, do it all * on the cpu. */ if (src_pixmap == dst_pixmap && src_fallback) { DBG(("%s: src is dst and will fallback\n",__FUNCTION__)); return true; } if (mask_pixmap == dst_pixmap && mask_fallback) { DBG(("%s: mask is dst and will fallback\n",__FUNCTION__)); return true; } /* If anything is on the GPU, push everything out to the GPU */ if (dst_use_gpu(dst_pixmap)) { DBG(("%s: dst is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (src_pixmap && !src_fallback) { DBG(("%s: src is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (mask_pixmap && !mask_fallback) { DBG(("%s: mask is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } /* However if the dst is not on the GPU and we need to * render one of the sources using the CPU, we may * as well do the entire operation in place onthe CPU. */ if (src_fallback) { DBG(("%s: dst is on the CPU and src will fallback\n", __FUNCTION__)); return true; } if (mask_fallback) { DBG(("%s: dst is on the CPU and mask will fallback\n", __FUNCTION__)); return true; } if (too_large(dst_pixmap->drawable.width, dst_pixmap->drawable.height) && dst_is_cpu(dst_pixmap)) { DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__)); return true; } DBG(("%s: dst is not on the GPU and the operation should not fallback\n", __FUNCTION__)); return dst_use_cpu(dst_pixmap); } static int reuse_source(struct sna *sna, PicturePtr src, struct sna_composite_channel *sc, int src_x, int src_y, PicturePtr mask, struct sna_composite_channel *mc, int msk_x, int msk_y) { uint32_t color; if (src_x != msk_x || src_y != msk_y) return false; if (src == mask) { DBG(("%s: mask is source\n", __FUNCTION__)); *mc = *sc; mc->bo = kgem_bo_reference(mc->bo); return true; } if (sna_picture_is_solid(mask, &color)) return gen4_channel_init_solid(sna, mc, color); if (sc->is_solid) return false; if (src->pDrawable == NULL || mask->pDrawable != src->pDrawable) return false; DBG(("%s: mask reuses source drawable\n", __FUNCTION__)); if (!sna_transform_equal(src->transform, mask->transform)) return false; if (!sna_picture_alphamap_equal(src, mask)) return false; if (!gen5_check_repeat(mask)) return false; if (!gen5_check_filter(mask)) return false; if (!gen5_check_format(mask->format)) return false; DBG(("%s: reusing source channel for mask with a twist\n", __FUNCTION__)); *mc = *sc; mc->repeat = gen5_repeat(mask->repeat ? mask->repeatType : RepeatNone); mc->filter = gen5_filter(mask->filter); mc->pict_format = mask->format; mc->card_format = gen5_get_card_format(mask->format); mc->bo = kgem_bo_reference(mc->bo); return true; } static bool gen5_render_composite(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr mask, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t msk_x, int16_t msk_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_op *tmp) { DBG(("%s: %dx%d, current mode=%d\n", __FUNCTION__, width, height, sna->kgem.mode)); if (op >= ARRAY_SIZE(gen5_blend_op)) { DBG(("%s: unhandled blend op %d\n", __FUNCTION__, op)); return false; } if (mask == NULL && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp)) return true; if (gen5_composite_fallback(sna, src, mask, dst)) goto fallback; if (need_tiling(sna, width, height)) return sna_tiling_composite(op, src, mask, dst, src_x, src_y, msk_x, msk_y, dst_x, dst_y, width, height, tmp); if (!gen5_composite_set_target(sna, tmp, dst, dst_x, dst_y, width, height, flags & COMPOSITE_PARTIAL || op > PictOpSrc)) { DBG(("%s: failed to set composite target\n", __FUNCTION__)); goto fallback; } DBG(("%s: preparing source\n", __FUNCTION__)); tmp->op = op; switch (gen5_composite_picture(sna, src, &tmp->src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: DBG(("%s: failed to prepare source picture\n", __FUNCTION__)); goto cleanup_dst; case 0: if (!gen4_channel_init_solid(sna, &tmp->src, 0)) goto cleanup_dst; /* fall through to fixup */ case 1: if (mask == NULL && sna_blt_composite__convert(sna, dst_x, dst_y, width, height, tmp)) return true; gen5_composite_channel_convert(&tmp->src); break; } tmp->is_affine = tmp->src.is_affine; tmp->has_component_alpha = false; tmp->need_magic_ca_pass = false; if (mask) { if (mask->componentAlpha && PICT_FORMAT_RGB(mask->format)) { tmp->has_component_alpha = true; /* Check if it's component alpha that relies on a source alpha and on * the source value. We can only get one of those into the single * source value that we get to blend with. */ if (gen5_blend_op[op].src_alpha && (gen5_blend_op[op].src_blend != GEN5_BLENDFACTOR_ZERO)) { if (op != PictOpOver) { DBG(("%s: unhandled CA blend op %d\n", __FUNCTION__, op)); goto cleanup_src; } tmp->need_magic_ca_pass = true; tmp->op = PictOpOutReverse; } } if (!reuse_source(sna, src, &tmp->src, src_x, src_y, mask, &tmp->mask, msk_x, msk_y)) { DBG(("%s: preparing mask\n", __FUNCTION__)); switch (gen5_composite_picture(sna, mask, &tmp->mask, msk_x, msk_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: DBG(("%s: failed to prepare mask picture\n", __FUNCTION__)); goto cleanup_src; case 0: if (!gen4_channel_init_solid(sna, &tmp->mask, 0)) goto cleanup_src; /* fall through to fixup */ case 1: gen5_composite_channel_convert(&tmp->mask); break; } } tmp->is_affine &= tmp->mask.is_affine; } tmp->u.gen5.wm_kernel = gen5_choose_composite_kernel(tmp->op, tmp->mask.bo != NULL, tmp->has_component_alpha, tmp->is_affine); tmp->u.gen5.ve_id = gen4_choose_composite_emitter(sna, tmp); tmp->blt = gen5_render_composite_blt; tmp->box = gen5_render_composite_box; tmp->boxes = gen5_render_composite_boxes__blt; if (tmp->emit_boxes) { tmp->boxes = gen5_render_composite_boxes; tmp->thread_boxes = gen5_render_composite_boxes__thread; } tmp->done = gen5_render_composite_done; if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) goto cleanup_mask; } gen5_align_vertex(sna, tmp); gen5_bind_surfaces(sna, tmp); return true; cleanup_mask: if (tmp->mask.bo) { kgem_bo_destroy(&sna->kgem, tmp->mask.bo); tmp->mask.bo = NULL; } cleanup_src: if (tmp->src.bo) { kgem_bo_destroy(&sna->kgem, tmp->src.bo); tmp->src.bo = NULL; } cleanup_dst: if (tmp->redirect.real_bo) { kgem_bo_destroy(&sna->kgem, tmp->dst.bo); tmp->redirect.real_bo = NULL; } fallback: return (mask == NULL && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags | COMPOSITE_FALLBACK, tmp)); } #if !NO_COMPOSITE_SPANS fastcall static void gen5_render_composite_spans_box(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { DBG(("%s: src=+(%d, %d), opacity=%f, dst=+(%d, %d), box=(%d, %d) x (%d, %d)\n", __FUNCTION__, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); gen5_get_rectangles(sna, &op->base, 1, gen5_bind_surfaces); op->prim_emit(sna, op, box, opacity); } static void gen5_render_composite_spans_boxes(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, int nbox, float opacity) { DBG(("%s: nbox=%d, src=+(%d, %d), opacity=%f, dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y)); do { int nbox_this_time; nbox_this_time = gen5_get_rectangles(sna, &op->base, nbox, gen5_bind_surfaces); nbox -= nbox_this_time; do { DBG((" %s: (%d, %d) x (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); op->prim_emit(sna, op, box++, opacity); } while (--nbox_this_time); } while (nbox); } fastcall static void gen5_render_composite_spans_boxes__thread(struct sna *sna, const struct sna_composite_spans_op *op, const struct sna_opacity_box *box, int nbox) { DBG(("%s: nbox=%d, src=+(%d, %d), dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], op->base.dst.x, op->base.dst.y)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen5_get_rectangles(sna, &op->base, nbox, gen5_bind_surfaces); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->base.floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } fastcall static void gen5_render_composite_spans_done(struct sna *sna, const struct sna_composite_spans_op *op) { if (sna->render.vertex_offset) gen4_vertex_flush(sna); DBG(("%s()\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, op->base.src.bo); sna_render_composite_redirect_done(sna, &op->base); } static bool gen5_check_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t width, int16_t height, unsigned flags) { DBG(("%s: op=%d, width=%d, height=%d, flags=%x\n", __FUNCTION__, op, width, height, flags)); if (op >= ARRAY_SIZE(gen5_blend_op)) return false; if (gen5_composite_fallback(sna, src, NULL, dst)) { DBG(("%s: operation would fallback\n", __FUNCTION__)); return false; } if (need_tiling(sna, width, height) && !is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS)) { DBG(("%s: fallback, tiled operation not on GPU\n", __FUNCTION__)); return false; } if ((flags & COMPOSITE_SPANS_RECTILINEAR) == 0) { struct sna_pixmap *priv = sna_pixmap_from_drawable(dst->pDrawable); assert(priv); if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; if (flags & COMPOSITE_SPANS_INPLACE_HINT) return false; if ((sna->render.prefer_gpu & PREFER_GPU_SPANS) == 0 && dst->format == PICT_a8) return false; return priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo); } return true; } static bool gen5_render_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_spans_op *tmp) { DBG(("%s: %dx%d with flags=%x, current mode=%d\n", __FUNCTION__, width, height, flags, sna->kgem.ring)); assert(gen5_check_composite_spans(sna, op, src, dst, width, height, flags)); if (need_tiling(sna, width, height)) { DBG(("%s: tiling, operation (%dx%d) too wide for pipeline\n", __FUNCTION__, width, height)); return sna_tiling_composite_spans(op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp); } tmp->base.op = op; if (!gen5_composite_set_target(sna, &tmp->base, dst, dst_x, dst_y, width, height, true)) return false; switch (gen5_composite_picture(sna, src, &tmp->base.src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_dst; case 0: if (!gen4_channel_init_solid(sna, &tmp->base.src, 0)) goto cleanup_dst; /* fall through to fixup */ case 1: gen5_composite_channel_convert(&tmp->base.src); break; } tmp->base.mask.bo = NULL; tmp->base.is_affine = tmp->base.src.is_affine; tmp->base.has_component_alpha = false; tmp->base.need_magic_ca_pass = false; tmp->base.u.gen5.ve_id = gen4_choose_spans_emitter(sna, tmp); tmp->base.u.gen5.wm_kernel = WM_KERNEL_OPACITY | !tmp->base.is_affine; tmp->box = gen5_render_composite_spans_box; tmp->boxes = gen5_render_composite_spans_boxes; if (tmp->emit_boxes) tmp->thread_boxes = gen5_render_composite_spans_boxes__thread; tmp->done = gen5_render_composite_spans_done; if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) goto cleanup_src; } gen5_align_vertex(sna, &tmp->base); gen5_bind_surfaces(sna, &tmp->base); return true; cleanup_src: if (tmp->base.src.bo) kgem_bo_destroy(&sna->kgem, tmp->base.src.bo); cleanup_dst: if (tmp->base.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp->base.dst.bo); return false; } #endif static void gen5_copy_bind_surfaces(struct sna *sna, const struct sna_composite_op *op) { bool dirty = kgem_bo_is_dirty(op->dst.bo); uint32_t *binding_table; uint16_t offset; gen5_get_batch(sna, op); binding_table = gen5_composite_get_binding_table(sna, &offset); binding_table[0] = gen5_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen5_get_dest_format(op->dst.format), true); binding_table[1] = gen5_bind_bo(sna, op->src.bo, op->src.width, op->src.height, op->src.card_format, false); if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen5.surface_table) == *(uint64_t*)binding_table) { sna->kgem.surface += sizeof(struct gen5_surface_state_padded) / sizeof(uint32_t); offset = sna->render_state.gen5.surface_table; } gen5_emit_state(sna, op, offset | dirty); } static bool gen5_render_copy_boxes(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, unsigned flags) { struct sna_composite_op tmp; DBG(("%s alu=%d, src=%ld:handle=%d, dst=%ld:handle=%d boxes=%d x [((%d, %d), (%d, %d))...], flags=%x\n", __FUNCTION__, alu, src->serialNumber, src_bo->handle, dst->serialNumber, dst_bo->handle, n, box->x1, box->y1, box->x2, box->y2, flags)); if (sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; if (!(alu == GXcopy || alu == GXclear) || src_bo == dst_bo) { fallback_blt: if (!sna_blt_compare_depth(src, dst)) return false; return sna_blt_copy_boxes_fallback(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } memset(&tmp, 0, sizeof(tmp)); if (dst->depth == src->depth) { tmp.dst.format = sna_render_format_for_depth(dst->depth); tmp.src.pict_format = tmp.dst.format; } else { tmp.dst.format = sna_format_for_depth(dst->depth); tmp.src.pict_format = sna_format_for_depth(src->depth); } if (!gen5_check_format(tmp.src.pict_format)) { DBG(("%s: unsupported source format, %x, use BLT\n", __FUNCTION__, tmp.src.pict_format)); goto fallback_blt; } DBG(("%s (%d, %d)->(%d, %d) x %d\n", __FUNCTION__, src_dx, src_dy, dst_dx, dst_dy, n)); tmp.op = alu == GXcopy ? PictOpSrc : PictOpClear; tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.x = tmp.dst.y = 0; tmp.dst.bo = dst_bo; tmp.damage = NULL; sna_render_composite_redirect_init(&tmp); if (too_large(tmp.dst.width, tmp.dst.height)) { BoxRec extents = box[0]; int i; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_composite_redirect(sna, &tmp, extents.x1 + dst_dx, extents.y1 + dst_dy, extents.x2 - extents.x1, extents.y2 - extents.y1, n > 1)) goto fallback_tiled; } tmp.src.filter = SAMPLER_FILTER_NEAREST; tmp.src.repeat = SAMPLER_EXTEND_NONE; tmp.src.card_format = gen5_get_card_format(tmp.src.pict_format); if (too_large(src->width, src->height)) { BoxRec extents = box[0]; int i; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_pixmap_partial(sna, src, src_bo, &tmp.src, extents.x1 + src_dx, extents.y1 + src_dy, extents.x2 - extents.x1, extents.y2 - extents.y1)) goto fallback_tiled_dst; } else { tmp.src.bo = kgem_bo_reference(src_bo); tmp.src.width = src->width; tmp.src.height = src->height; tmp.src.offset[0] = tmp.src.offset[1] = 0; tmp.src.scale[0] = 1.f/src->width; tmp.src.scale[1] = 1.f/src->height; } tmp.is_affine = true; tmp.floats_per_vertex = 3; tmp.floats_per_rect = 9; tmp.u.gen5.wm_kernel = WM_KERNEL; tmp.u.gen5.ve_id = 2; if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { DBG(("%s: aperture check failed\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, tmp.src.bo); if (tmp.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp.dst.bo); goto fallback_blt; } } dst_dx += tmp.dst.x; dst_dy += tmp.dst.y; tmp.dst.x = tmp.dst.y = 0; src_dx += tmp.src.offset[0]; src_dy += tmp.src.offset[1]; gen5_align_vertex(sna, &tmp); gen5_copy_bind_surfaces(sna, &tmp); do { int n_this_time; n_this_time = gen5_get_rectangles(sna, &tmp, n, gen5_copy_bind_surfaces); n -= n_this_time; do { DBG((" (%d, %d) -> (%d, %d) + (%d, %d)\n", box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1)); OUT_VERTEX(box->x2 + dst_dx, box->y2 + dst_dy); OUT_VERTEX_F((box->x2 + src_dx) * tmp.src.scale[0]); OUT_VERTEX_F((box->y2 + src_dy) * tmp.src.scale[1]); OUT_VERTEX(box->x1 + dst_dx, box->y2 + dst_dy); OUT_VERTEX_F((box->x1 + src_dx) * tmp.src.scale[0]); OUT_VERTEX_F((box->y2 + src_dy) * tmp.src.scale[1]); OUT_VERTEX(box->x1 + dst_dx, box->y1 + dst_dy); OUT_VERTEX_F((box->x1 + src_dx) * tmp.src.scale[0]); OUT_VERTEX_F((box->y1 + src_dy) * tmp.src.scale[1]); box++; } while (--n_this_time); } while (n); gen4_vertex_flush(sna); sna_render_composite_redirect_done(sna, &tmp); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; fallback_tiled_dst: if (tmp.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp.dst.bo); fallback_tiled: if (sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; DBG(("%s: tiled fallback\n", __FUNCTION__)); return sna_tiling_copy_boxes(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } static void gen5_render_copy_blt(struct sna *sna, const struct sna_copy_op *op, int16_t sx, int16_t sy, int16_t w, int16_t h, int16_t dx, int16_t dy) { DBG(("%s: src=(%d, %d), dst=(%d, %d), size=(%d, %d)\n", __FUNCTION__, sx, sy, dx, dy, w, h)); gen5_get_rectangles(sna, &op->base, 1, gen5_copy_bind_surfaces); OUT_VERTEX(dx+w, dy+h); OUT_VERTEX_F((sx+w)*op->base.src.scale[0]); OUT_VERTEX_F((sy+h)*op->base.src.scale[1]); OUT_VERTEX(dx, dy+h); OUT_VERTEX_F(sx*op->base.src.scale[0]); OUT_VERTEX_F((sy+h)*op->base.src.scale[1]); OUT_VERTEX(dx, dy); OUT_VERTEX_F(sx*op->base.src.scale[0]); OUT_VERTEX_F(sy*op->base.src.scale[1]); } static void gen5_render_copy_done(struct sna *sna, const struct sna_copy_op *op) { if (sna->render.vertex_offset) gen4_vertex_flush(sna); DBG(("%s()\n", __FUNCTION__)); } static bool gen5_render_copy(struct sna *sna, uint8_t alu, PixmapPtr src, struct kgem_bo *src_bo, PixmapPtr dst, struct kgem_bo *dst_bo, struct sna_copy_op *op) { DBG(("%s (alu=%d)\n", __FUNCTION__, alu)); if (sna_blt_compare_depth(&src->drawable, &dst->drawable) && sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op)) return true; if (!(alu == GXcopy || alu == GXclear) || src_bo == dst_bo || too_large(src->drawable.width, src->drawable.height) || too_large(dst->drawable.width, dst->drawable.height)) { fallback: if (!sna_blt_compare_depth(&src->drawable, &dst->drawable)) return false; return sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op); } if (dst->drawable.depth == src->drawable.depth) { op->base.dst.format = sna_render_format_for_depth(dst->drawable.depth); op->base.src.pict_format = op->base.dst.format; } else { op->base.dst.format = sna_format_for_depth(dst->drawable.depth); op->base.src.pict_format = sna_format_for_depth(src->drawable.depth); } if (!gen5_check_format(op->base.src.pict_format)) goto fallback; op->base.op = alu == GXcopy ? PictOpSrc : PictOpClear; op->base.dst.pixmap = dst; op->base.dst.width = dst->drawable.width; op->base.dst.height = dst->drawable.height; op->base.dst.bo = dst_bo; op->base.src.bo = src_bo; op->base.src.card_format = gen5_get_card_format(op->base.src.pict_format); op->base.src.width = src->drawable.width; op->base.src.height = src->drawable.height; op->base.src.scale[0] = 1.f/src->drawable.width; op->base.src.scale[1] = 1.f/src->drawable.height; op->base.src.filter = SAMPLER_FILTER_NEAREST; op->base.src.repeat = SAMPLER_EXTEND_NONE; op->base.is_affine = true; op->base.floats_per_vertex = 3; op->base.floats_per_rect = 9; op->base.u.gen5.wm_kernel = WM_KERNEL; op->base.u.gen5.ve_id = 2; if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) goto fallback; } if (kgem_bo_is_dirty(src_bo)) { if (sna_blt_compare_depth(&src->drawable, &dst->drawable) && sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op)) return true; } gen5_align_vertex(sna, &op->base); gen5_copy_bind_surfaces(sna, &op->base); op->blt = gen5_render_copy_blt; op->done = gen5_render_copy_done; return true; } static void gen5_fill_bind_surfaces(struct sna *sna, const struct sna_composite_op *op) { bool dirty = kgem_bo_is_dirty(op->dst.bo); uint32_t *binding_table; uint16_t offset; gen5_get_batch(sna, op); binding_table = gen5_composite_get_binding_table(sna, &offset); binding_table[0] = gen5_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen5_get_dest_format(op->dst.format), true); binding_table[1] = gen5_bind_bo(sna, op->src.bo, 1, 1, GEN5_SURFACEFORMAT_B8G8R8A8_UNORM, false); if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen5.surface_table) == *(uint64_t*)binding_table) { sna->kgem.surface += sizeof(struct gen5_surface_state_padded)/sizeof(uint32_t); offset = sna->render_state.gen5.surface_table; } gen5_emit_state(sna, op, offset | dirty); } static inline bool prefer_blt_fill(struct sna *sna) { #if PREFER_BLT_FILL return true; #else return sna->kgem.mode != KGEM_RENDER; #endif } static bool gen5_render_fill_boxes(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n) { struct sna_composite_op tmp; uint32_t pixel; DBG(("%s op=%x, color=(%04x,%04x,%04x,%04x), boxes=%d x [((%d, %d), (%d, %d))...]\n", __FUNCTION__, op, color->red, color->green, color->blue, color->alpha, n, box->x1, box->y1, box->x2, box->y2)); if (op >= ARRAY_SIZE(gen5_blend_op)) { DBG(("%s: fallback due to unhandled blend op: %d\n", __FUNCTION__, op)); return false; } if (op <= PictOpSrc && (prefer_blt_fill(sna) || too_large(dst->width, dst->height) || !gen5_check_dst_format(format))) { uint8_t alu = GXinvalid; pixel = 0; if (op == PictOpClear) alu = GXclear; else if (sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, format)) alu = GXcopy; if (alu != GXinvalid && sna_blt_fill_boxes(sna, alu, dst_bo, dst->bitsPerPixel, pixel, box, n)) return true; if (!gen5_check_dst_format(format)) return false; if (too_large(dst->width, dst->height)) return sna_tiling_fill_boxes(sna, op, format, color, dst, dst_bo, box, n); } if (op == PictOpClear) { pixel = 0; op = PictOpSrc; } else if (!sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, PICT_a8r8g8b8)) return false; DBG(("%s(%08x x %d)\n", __FUNCTION__, pixel, n)); memset(&tmp, 0, sizeof(tmp)); tmp.op = op; tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.format = format; tmp.dst.bo = dst_bo; tmp.src.bo = sna_render_get_solid(sna, pixel); tmp.src.filter = SAMPLER_FILTER_NEAREST; tmp.src.repeat = SAMPLER_EXTEND_REPEAT; tmp.is_affine = true; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.u.gen5.wm_kernel = WM_KERNEL; tmp.u.gen5.ve_id = 1; if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); return false; } } gen5_align_vertex(sna, &tmp); gen5_fill_bind_surfaces(sna, &tmp); do { int n_this_time; n_this_time = gen5_get_rectangles(sna, &tmp, n, gen5_fill_bind_surfaces); n -= n_this_time; do { DBG((" (%d, %d), (%d, %d)\n", box->x1, box->y1, box->x2, box->y2)); OUT_VERTEX(box->x2, box->y2); OUT_VERTEX_F(.5); OUT_VERTEX(box->x1, box->y2); OUT_VERTEX_F(.5); OUT_VERTEX(box->x1, box->y1); OUT_VERTEX_F(.5); box++; } while (--n_this_time); } while (n); gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; } static void gen5_render_fill_op_blt(struct sna *sna, const struct sna_fill_op *op, int16_t x, int16_t y, int16_t w, int16_t h) { DBG(("%s (%d, %d)x(%d, %d)\n", __FUNCTION__, x,y,w,h)); gen5_get_rectangles(sna, &op->base, 1, gen5_fill_bind_surfaces); OUT_VERTEX(x+w, y+h); OUT_VERTEX_F(.5); OUT_VERTEX(x, y+h); OUT_VERTEX_F(.5); OUT_VERTEX(x, y); OUT_VERTEX_F(.5); } fastcall static void gen5_render_fill_op_box(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box) { DBG(("%s: (%d, %d),(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); gen5_get_rectangles(sna, &op->base, 1, gen5_fill_bind_surfaces); OUT_VERTEX(box->x2, box->y2); OUT_VERTEX_F(.5); OUT_VERTEX(box->x1, box->y2); OUT_VERTEX_F(.5); OUT_VERTEX(box->x1, box->y1); OUT_VERTEX_F(.5); } fastcall static void gen5_render_fill_op_boxes(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box, int nbox) { DBG(("%s: (%d, %d),(%d, %d)... x %d\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, nbox)); do { int nbox_this_time; nbox_this_time = gen5_get_rectangles(sna, &op->base, nbox, gen5_fill_bind_surfaces); nbox -= nbox_this_time; do { OUT_VERTEX(box->x2, box->y2); OUT_VERTEX_F(.5); OUT_VERTEX(box->x1, box->y2); OUT_VERTEX_F(.5); OUT_VERTEX(box->x1, box->y1); OUT_VERTEX_F(.5); box++; } while (--nbox_this_time); } while (nbox); } static void gen5_render_fill_op_done(struct sna *sna, const struct sna_fill_op *op) { if (sna->render.vertex_offset) gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, op->base.src.bo); DBG(("%s()\n", __FUNCTION__)); } static bool gen5_render_fill(struct sna *sna, uint8_t alu, PixmapPtr dst, struct kgem_bo *dst_bo, uint32_t color, unsigned flags, struct sna_fill_op *op) { DBG(("%s(alu=%d, color=%08x)\n", __FUNCTION__, alu, color)); if (prefer_blt_fill(sna) && sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, op)) return true; if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height)) return sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, op); if (alu == GXclear) color = 0; op->base.op = color == 0 ? PictOpClear : PictOpSrc; op->base.dst.pixmap = dst; op->base.dst.width = dst->drawable.width; op->base.dst.height = dst->drawable.height; op->base.dst.format = sna_format_for_depth(dst->drawable.depth); op->base.dst.bo = dst_bo; op->base.dst.x = op->base.dst.y = 0; op->base.need_magic_ca_pass = 0; op->base.has_component_alpha = 0; op->base.src.bo = sna_render_get_solid(sna, sna_rgba_for_color(color, dst->drawable.depth)); op->base.src.filter = SAMPLER_FILTER_NEAREST; op->base.src.repeat = SAMPLER_EXTEND_REPEAT; op->base.mask.bo = NULL; op->base.mask.filter = SAMPLER_FILTER_NEAREST; op->base.mask.repeat = SAMPLER_EXTEND_NONE; op->base.is_affine = true; op->base.floats_per_vertex = 2; op->base.floats_per_rect = 6; op->base.u.gen5.wm_kernel = WM_KERNEL; op->base.u.gen5.ve_id = 1; if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_bo_destroy(&sna->kgem, op->base.src.bo); return false; } } gen5_align_vertex(sna, &op->base); gen5_fill_bind_surfaces(sna, &op->base); op->blt = gen5_render_fill_op_blt; op->box = gen5_render_fill_op_box; op->boxes = gen5_render_fill_op_boxes; op->points = NULL; op->done = gen5_render_fill_op_done; return true; } static bool gen5_render_fill_one_try_blt(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { BoxRec box; box.x1 = x1; box.y1 = y1; box.x2 = x2; box.y2 = y2; return sna_blt_fill_boxes(sna, alu, bo, dst->drawable.bitsPerPixel, color, &box, 1); } static bool gen5_render_fill_one(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { struct sna_composite_op tmp; #if NO_FILL_ONE return gen5_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu); #endif /* Prefer to use the BLT if already engaged */ if (prefer_blt_fill(sna) && gen5_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu)) return true; /* Must use the BLT if we can't RENDER... */ if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height)) return gen5_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu); if (alu == GXclear) color = 0; tmp.op = color == 0 ? PictOpClear : PictOpSrc; tmp.dst.pixmap = dst; tmp.dst.width = dst->drawable.width; tmp.dst.height = dst->drawable.height; tmp.dst.format = sna_format_for_depth(dst->drawable.depth); tmp.dst.bo = bo; tmp.dst.x = tmp.dst.y = 0; tmp.src.bo = sna_render_get_solid(sna, sna_rgba_for_color(color, dst->drawable.depth)); tmp.src.filter = SAMPLER_FILTER_NEAREST; tmp.src.repeat = SAMPLER_EXTEND_REPEAT; tmp.mask.bo = NULL; tmp.mask.filter = SAMPLER_FILTER_NEAREST; tmp.mask.repeat = SAMPLER_EXTEND_NONE; tmp.is_affine = true; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.has_component_alpha = 0; tmp.need_magic_ca_pass = false; tmp.u.gen5.wm_kernel = WM_KERNEL; tmp.u.gen5.ve_id = 1; if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); return false; } } gen5_align_vertex(sna, &tmp); gen5_fill_bind_surfaces(sna, &tmp); gen5_get_rectangles(sna, &tmp, 1, gen5_fill_bind_surfaces); DBG((" (%d, %d), (%d, %d)\n", x1, y1, x2, y2)); OUT_VERTEX(x2, y2); OUT_VERTEX_F(.5); OUT_VERTEX(x1, y2); OUT_VERTEX_F(.5); OUT_VERTEX(x1, y1); OUT_VERTEX_F(.5); gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; } static void gen5_render_context_switch(struct kgem *kgem, int new_mode) { if (!kgem->nbatch) return; /* WaNonPipelinedStateCommandFlush * * Ironlake has a limitation that a 3D or Media command can't * be the first command after a BLT, unless it's * non-pipelined. * * We do this by ensuring that the non-pipelined drawrect * is always emitted first following a switch from BLT. */ if (kgem->mode == KGEM_BLT) { struct sna *sna = to_sna_from_kgem(kgem); DBG(("%s: forcing drawrect on next state emission\n", __FUNCTION__)); sna->render_state.gen5.drawrect_limit = -1; } if (kgem_ring_is_idle(kgem, kgem->ring)) { DBG(("%s: GPU idle, flushing\n", __FUNCTION__)); _kgem_submit(kgem); } } static void gen5_render_reset(struct sna *sna) { sna->render_state.gen5.needs_invariant = true; sna->render_state.gen5.ve_id = -1; sna->render_state.gen5.last_primitive = -1; sna->render_state.gen5.last_pipelined_pointers = 0; sna->render_state.gen5.drawrect_offset = -1; sna->render_state.gen5.drawrect_limit = -1; sna->render_state.gen5.surface_table = -1; if (sna->render.vbo && !kgem_bo_can_map(&sna->kgem, sna->render.vbo)) { DBG(("%s: discarding unmappable vbo\n", __FUNCTION__)); discard_vbo(sna); } sna->render.vertex_offset = 0; sna->render.nvertex_reloc = 0; sna->render.vb_id = 0; } static void gen5_render_fini(struct sna *sna) { kgem_bo_destroy(&sna->kgem, sna->render_state.gen5.general_bo); } static uint32_t gen5_create_vs_unit_state(struct sna_static_stream *stream) { struct gen5_vs_unit_state *vs = sna_static_stream_map(stream, sizeof(*vs), 32); /* Set up the vertex shader to be disabled (passthrough) */ vs->thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; vs->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1; vs->vs6.vs_enable = 0; vs->vs6.vert_cache_disable = 1; return sna_static_stream_offsetof(stream, vs); } static uint32_t gen5_create_sf_state(struct sna_static_stream *stream, uint32_t kernel) { struct gen5_sf_unit_state *sf_state; sf_state = sna_static_stream_map(stream, sizeof(*sf_state), 32); sf_state->thread0.grf_reg_count = GEN5_GRF_BLOCKS(SF_KERNEL_NUM_GRF); sf_state->thread0.kernel_start_pointer = kernel >> 6; sf_state->thread3.const_urb_entry_read_length = 0; /* no const URBs */ sf_state->thread3.const_urb_entry_read_offset = 0; /* no const URBs */ sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */ /* don't smash vertex header, read start from dw8 */ sf_state->thread3.urb_entry_read_offset = 1; sf_state->thread3.dispatch_grf_start_reg = 3; sf_state->thread4.max_threads = SF_MAX_THREADS - 1; sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1; sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES; sf_state->sf5.viewport_transform = false; /* skip viewport */ sf_state->sf6.cull_mode = GEN5_CULLMODE_NONE; sf_state->sf6.scissor = 0; sf_state->sf7.trifan_pv = 2; sf_state->sf6.dest_org_vbias = 0x8; sf_state->sf6.dest_org_hbias = 0x8; return sna_static_stream_offsetof(stream, sf_state); } static uint32_t gen5_create_sampler_state(struct sna_static_stream *stream, sampler_filter_t src_filter, sampler_extend_t src_extend, sampler_filter_t mask_filter, sampler_extend_t mask_extend) { struct gen5_sampler_state *sampler_state; sampler_state = sna_static_stream_map(stream, sizeof(struct gen5_sampler_state) * 2, 32); sampler_state_init(&sampler_state[0], src_filter, src_extend); sampler_state_init(&sampler_state[1], mask_filter, mask_extend); return sna_static_stream_offsetof(stream, sampler_state); } static void gen5_init_wm_state(struct gen5_wm_unit_state *state, bool has_mask, uint32_t kernel, uint32_t sampler) { state->thread0.grf_reg_count = GEN5_GRF_BLOCKS(PS_KERNEL_NUM_GRF); state->thread0.kernel_start_pointer = kernel >> 6; state->thread1.single_program_flow = 0; /* scratch space is not used in our kernel */ state->thread2.scratch_space_base_pointer = 0; state->thread2.per_thread_scratch_space = 0; state->thread3.const_urb_entry_read_length = 0; state->thread3.const_urb_entry_read_offset = 0; state->thread3.urb_entry_read_offset = 0; /* wm kernel use urb from 3, see wm_program in compiler module */ state->thread3.dispatch_grf_start_reg = 3; /* must match kernel */ state->wm4.sampler_count = 0; /* hardware requirement */ state->wm4.sampler_state_pointer = sampler >> 5; state->wm5.max_threads = PS_MAX_THREADS - 1; state->wm5.transposed_urb_read = 0; state->wm5.thread_dispatch_enable = 1; /* just use 16-pixel dispatch (4 subspans), don't need to change kernel * start point */ state->wm5.enable_16_pix = 1; state->wm5.enable_8_pix = 0; state->wm5.early_depth_test = 1; /* Each pair of attributes (src/mask coords) is two URB entries */ if (has_mask) { state->thread1.binding_table_entry_count = 3; /* 2 tex and fb */ state->thread3.urb_entry_read_length = 4; } else { state->thread1.binding_table_entry_count = 2; /* 1 tex and fb */ state->thread3.urb_entry_read_length = 2; } /* binding table entry count is only used for prefetching, * and it has to be set 0 for Ironlake */ state->thread1.binding_table_entry_count = 0; } static uint32_t gen5_create_cc_unit_state(struct sna_static_stream *stream) { uint8_t *ptr, *base; int i, j; base = ptr = sna_static_stream_map(stream, GEN5_BLENDFACTOR_COUNT*GEN5_BLENDFACTOR_COUNT*64, 64); for (i = 0; i < GEN5_BLENDFACTOR_COUNT; i++) { for (j = 0; j < GEN5_BLENDFACTOR_COUNT; j++) { struct gen5_cc_unit_state *state = (struct gen5_cc_unit_state *)ptr; state->cc3.blend_enable = !(j == GEN5_BLENDFACTOR_ZERO && i == GEN5_BLENDFACTOR_ONE); state->cc5.logicop_func = 0xc; /* COPY */ state->cc5.ia_blend_function = GEN5_BLENDFUNCTION_ADD; /* Fill in alpha blend factors same as color, for the future. */ state->cc5.ia_src_blend_factor = i; state->cc5.ia_dest_blend_factor = j; state->cc6.blend_function = GEN5_BLENDFUNCTION_ADD; state->cc6.clamp_post_alpha_blend = 1; state->cc6.clamp_pre_alpha_blend = 1; state->cc6.src_blend_factor = i; state->cc6.dest_blend_factor = j; ptr += 64; } } return sna_static_stream_offsetof(stream, base); } static bool gen5_render_setup(struct sna *sna) { struct gen5_render_state *state = &sna->render_state.gen5; struct sna_static_stream general; struct gen5_wm_unit_state_padded *wm_state; uint32_t sf[2], wm[KERNEL_COUNT]; int i, j, k, l, m; sna_static_stream_init(&general); /* Zero pad the start. If you see an offset of 0x0 in the batchbuffer * dumps, you know it points to zero. */ null_create(&general); /* Set up the two SF states (one for blending with a mask, one without) */ sf[0] = sna_static_stream_compile_sf(sna, &general, brw_sf_kernel__nomask); sf[1] = sna_static_stream_compile_sf(sna, &general, brw_sf_kernel__mask); for (m = 0; m < KERNEL_COUNT; m++) { if (wm_kernels[m].size) { wm[m] = sna_static_stream_add(&general, wm_kernels[m].data, wm_kernels[m].size, 64); } else { wm[m] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 16); } assert(wm[m]); } state->vs = gen5_create_vs_unit_state(&general); state->sf[0] = gen5_create_sf_state(&general, sf[0]); state->sf[1] = gen5_create_sf_state(&general, sf[1]); /* Set up the WM states: each filter/extend type for source and mask, per * kernel. */ wm_state = sna_static_stream_map(&general, sizeof(*wm_state) * KERNEL_COUNT * FILTER_COUNT * EXTEND_COUNT * FILTER_COUNT * EXTEND_COUNT, 64); state->wm = sna_static_stream_offsetof(&general, wm_state); for (i = 0; i < FILTER_COUNT; i++) { for (j = 0; j < EXTEND_COUNT; j++) { for (k = 0; k < FILTER_COUNT; k++) { for (l = 0; l < EXTEND_COUNT; l++) { uint32_t sampler_state; sampler_state = gen5_create_sampler_state(&general, i, j, k, l); for (m = 0; m < KERNEL_COUNT; m++) { gen5_init_wm_state(&wm_state->state, wm_kernels[m].has_mask, wm[m], sampler_state); wm_state++; } } } } } state->cc = gen5_create_cc_unit_state(&general); state->general_bo = sna_static_stream_fini(sna, &general); return state->general_bo != NULL; } const char *gen5_render_init(struct sna *sna, const char *backend) { if (!gen5_render_setup(sna)) return backend; sna->kgem.context_switch = gen5_render_context_switch; sna->kgem.retire = gen4_render_retire; sna->kgem.expire = gen4_render_expire; #if !NO_COMPOSITE sna->render.composite = gen5_render_composite; sna->render.prefer_gpu |= PREFER_GPU_RENDER; #endif #if !NO_COMPOSITE_SPANS sna->render.check_composite_spans = gen5_check_composite_spans; sna->render.composite_spans = gen5_render_composite_spans; if (intel_get_device_id(sna->dev) == 0x0044) sna->render.prefer_gpu |= PREFER_GPU_SPANS; #endif sna->render.video = gen5_render_video; sna->render.copy_boxes = gen5_render_copy_boxes; sna->render.copy = gen5_render_copy; sna->render.fill_boxes = gen5_render_fill_boxes; sna->render.fill = gen5_render_fill; sna->render.fill_one = gen5_render_fill_one; sna->render.flush = gen4_render_flush; sna->render.reset = gen5_render_reset; sna->render.fini = gen5_render_fini; sna->render.max_3d_size = MAX_3D_SIZE; sna->render.max_3d_pitch = 1 << 18; return "Ironlake (gen5)"; } xf86-video-intel-2.99.917/src/sna/sna_present.c0000664000175000017500000003077612432737457016017 00000000000000/* * Copyright © 2014 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that copyright * notice and this permission notice appear in supporting documentation, and * that the name of the copyright holders not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. The copyright holders make no representations * about the suitability of this software for any purpose. It is provided "as * is" without express or implied warranty. * * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE * OF THIS SOFTWARE. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include "sna.h" #include #include static present_screen_info_rec present_info; struct sna_present_event { uint64_t event_id; xf86CrtcPtr crtc; }; static inline struct sna_present_event * to_present_event(uintptr_t data) { return (struct sna_present_event *)(data & ~3); } #define MARK_PRESENT(x) ((void *)((uintptr_t)(x) | 2)) static int pipe_from_crtc(RRCrtcPtr crtc) { return crtc ? sna_crtc_to_pipe(crtc->devPrivate) : -1; } static uint32_t pipe_select(int pipe) { if (pipe > 1) return pipe << DRM_VBLANK_HIGH_CRTC_SHIFT; else if (pipe > 0) return DRM_VBLANK_SECONDARY; else return 0; } static inline int sna_wait_vblank(struct sna *sna, union drm_wait_vblank *vbl, int pipe) { DBG(("%s(pipe=%d, waiting until seq=%u%s)\n", __FUNCTION__, pipe, vbl->request.sequence, vbl->request.type & DRM_VBLANK_RELATIVE ? " [relative]" : "")); vbl->request.type |= pipe_select(pipe); return drmIoctl(sna->kgem.fd, DRM_IOCTL_WAIT_VBLANK, vbl); } static RRCrtcPtr sna_present_get_crtc(WindowPtr window) { struct sna *sna = to_sna_from_drawable(&window->drawable); BoxRec box; xf86CrtcPtr crtc; DBG(("%s\n", __FUNCTION__)); box.x1 = window->drawable.x; box.y1 = window->drawable.y; box.x2 = box.x1 + window->drawable.width; box.y2 = box.y1 + window->drawable.height; crtc = sna_covering_crtc(sna, &box, NULL); if (crtc) return crtc->randr_crtc; return NULL; } static int sna_present_get_ust_msc(RRCrtcPtr crtc, CARD64 *ust, CARD64 *msc) { struct sna *sna = to_sna_from_screen(crtc->pScreen); int pipe = pipe_from_crtc(crtc); union drm_wait_vblank vbl; DBG(("%s(pipe=%d)\n", __FUNCTION__, pipe)); VG_CLEAR(vbl); vbl.request.type = DRM_VBLANK_RELATIVE; vbl.request.sequence = 0; if (sna_wait_vblank(sna, &vbl, pipe) == 0) { *ust = ust64(vbl.reply.tval_sec, vbl.reply.tval_usec); *msc = sna_crtc_record_vblank(crtc->devPrivate, &vbl); } else { const struct ust_msc *swap = sna_crtc_last_swap(crtc->devPrivate); *ust = ust64(swap->tv_sec, swap->tv_usec); *msc = swap->msc; } DBG(("%s: pipe=%d, tv=%d.%06d msc=%lld\n", __FUNCTION__, pipe, (int)(*ust / 1000000), (int)(*ust % 1000000), (long long)*msc)); return Success; } void sna_present_vblank_handler(struct drm_event_vblank *event) { struct sna_present_event *info = to_present_event(event->user_data); DBG(("%s: pipe=%d tv=%d.%06d msc=%d, event %lld complete\n", __FUNCTION__, sna_crtc_to_pipe(info->crtc), event->tv_sec, event->tv_usec, event->sequence, (long long)info->event_id)); present_event_notify(info->event_id, ust64(event->tv_sec, event->tv_usec), sna_crtc_record_event(info->crtc, event)); free(info); } static int sna_present_queue_vblank(RRCrtcPtr crtc, uint64_t event_id, uint64_t msc) { struct sna *sna = to_sna_from_screen(crtc->pScreen); struct sna_present_event *event; union drm_wait_vblank vbl; DBG(("%s(pipe=%d, event=%lld, msc=%lld)\n", __FUNCTION__, pipe_from_crtc(crtc), (long long)event_id, (long long)msc)); event = malloc(sizeof(struct sna_present_event)); if (event == NULL) return BadAlloc; event->event_id = event_id; event->crtc = crtc->devPrivate; VG_CLEAR(vbl); vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT; vbl.request.sequence = msc; vbl.request.signal = (uintptr_t)MARK_PRESENT(event); if (sna_wait_vblank(sna, &vbl, sna_crtc_to_pipe(event->crtc))) { DBG(("%s: vblank enqueue failed\n", __FUNCTION__)); free(event); return BadMatch; } return Success; } static void sna_present_abort_vblank(RRCrtcPtr crtc, uint64_t event_id, uint64_t msc) { DBG(("%s(pipe=%d, event=%lld, msc=%lld)\n", __FUNCTION__, pipe_from_crtc(crtc), (long long)event_id, (long long)msc)); } static void sna_present_flush(WindowPtr window) { PixmapPtr pixmap = get_window_pixmap(window); struct sna_pixmap *priv; DBG(("%s(pixmap=%ld)\n", __FUNCTION__, pixmap->drawable.serialNumber)); priv = sna_pixmap_move_to_gpu(pixmap, MOVE_READ | MOVE_ASYNC_HINT | __MOVE_FORCE); if (priv && priv->gpu_bo) kgem_scanout_flush(&to_sna_from_pixmap(pixmap)->kgem, priv->gpu_bo); } static bool check_flip__crtc(struct sna *sna, RRCrtcPtr crtc) { if (!sna_crtc_is_on(crtc->devPrivate)) { DBG(("%s: CRTC off\n", __FUNCTION__)); return false; } assert(sna->scrn->vtSema); if (sna->mode.shadow_active) { DBG(("%s: shadow buffer active\n", __FUNCTION__)); return false; } return true; } static Bool sna_present_check_flip(RRCrtcPtr crtc, WindowPtr window, PixmapPtr pixmap, Bool sync_flip) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *flip; DBG(("%s(pipe=%d, pixmap=%ld, sync_flip=%d)\n", __FUNCTION__, pipe_from_crtc(crtc), pixmap->drawable.serialNumber, sync_flip)); if (sna->flags & SNA_NO_FLIP) { DBG(("%s: flips not suported\n", __FUNCTION__)); return FALSE; } if (sync_flip) { if ((sna->flags & SNA_HAS_FLIP) == 0) { DBG(("%s: async flips not suported\n", __FUNCTION__)); return FALSE; } } else { if ((sna->flags & SNA_HAS_ASYNC_FLIP) == 0) { DBG(("%s: async flips not suported\n", __FUNCTION__)); return FALSE; } } if (!check_flip__crtc(sna, crtc)) { DBG(("%s: flip invalid for CRTC\n", __FUNCTION__)); return FALSE; } flip = sna_pixmap(pixmap); if (flip == NULL) { DBG(("%s: unattached pixmap\n", __FUNCTION__)); return FALSE; } if (flip->cpu_bo && IS_STATIC_PTR(flip->ptr)) { DBG(("%s: SHM pixmap\n", __FUNCTION__)); return FALSE; } return TRUE; } static uint64_t gettime_ust64(void) { struct timespec tv; if (clock_gettime(CLOCK_MONOTONIC, &tv)) return 0; return ust64(tv.tv_sec, tv.tv_nsec / 1000); } static Bool page_flip__async(RRCrtcPtr crtc, uint64_t event_id, uint64_t target_msc, struct kgem_bo *bo) { DBG(("%s(pipe=%d, event=%lld, handle=%d)\n", __FUNCTION__, pipe_from_crtc(crtc), (long long)event_id, bo->handle)); if (!sna_page_flip(to_sna_from_screen(crtc->pScreen), bo, NULL, NULL)) { DBG(("%s: async pageflip failed\n", __FUNCTION__)); present_info.capabilities &= ~PresentCapabilityAsync; return FALSE; } DBG(("%s: pipe=%d tv=%d.%06d msc=%d, event %lld complete\n", __FUNCTION__, pipe_from_crtc(crtc), gettime_ust64() / 1000000, gettime_ust64() % 1000000, sna_crtc_last_swap(crtc->devPrivate)->msc, (long long)event_id)); present_event_notify(event_id, gettime_ust64(), target_msc); return TRUE; } static void present_flip_handler(struct drm_event_vblank *event, void *data) { struct sna_present_event *info = data; struct ust_msc swap; DBG(("%s(sequence=%d)\n", __FUNCTION__, event->sequence)); if (info->crtc == NULL) { swap.tv_sec = event->tv_sec; swap.tv_usec = event->tv_usec; swap.msc = event->sequence; } else swap = *sna_crtc_last_swap(info->crtc); DBG(("%s: pipe=%d, tv=%d.%06d msc %lld, event %lld complete\n", __FUNCTION__, info->crtc ? sna_crtc_to_pipe(info->crtc) : -1, swap.tv_sec, swap.tv_usec, (long long)swap.msc, (long long)info->event_id)); present_event_notify(info->event_id, ust64(swap.tv_sec, swap.tv_usec), swap.msc); free(info); } static Bool page_flip(ScreenPtr screen, RRCrtcPtr crtc, uint64_t event_id, struct kgem_bo *bo) { struct sna *sna = to_sna_from_screen(screen); struct sna_present_event *event; DBG(("%s(pipe=%d, event=%lld, handle=%d)\n", __FUNCTION__, pipe_from_crtc(crtc), (long long)event_id, bo->handle)); event = malloc(sizeof(struct sna_present_event)); if (event == NULL) return FALSE; event->event_id = event_id; event->crtc = crtc ? crtc->devPrivate : NULL; if (!sna_page_flip(sna, bo, present_flip_handler, event)) { DBG(("%s: pageflip failed\n", __FUNCTION__)); free(event); return FALSE; } return TRUE; } static struct kgem_bo * get_flip_bo(PixmapPtr pixmap) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; DBG(("%s(pixmap=%ld)\n", __FUNCTION__, pixmap->drawable.serialNumber)); priv = sna_pixmap_move_to_gpu(pixmap, MOVE_READ | __MOVE_FORCE); if (priv == NULL) { DBG(("%s: cannot force pixmap to the GPU\n", __FUNCTION__)); return NULL; } if (sna->flags & SNA_LINEAR_FB && priv->gpu_bo->tiling && !sna_pixmap_change_tiling(pixmap, I915_TILING_NONE)) { DBG(("%s: invalid tiling for scanout, user requires linear\n", __FUNCTION__)); return NULL; } if (priv->gpu_bo->tiling == I915_TILING_Y && !sna_pixmap_change_tiling(pixmap, I915_TILING_X)) { DBG(("%s: invalid Y-tiling, cannot convert\n", __FUNCTION__)); return NULL; } priv->pinned |= PIN_SCANOUT; return priv->gpu_bo; } static Bool sna_present_flip(RRCrtcPtr crtc, uint64_t event_id, uint64_t target_msc, PixmapPtr pixmap, Bool sync_flip) { struct kgem_bo *bo; DBG(("%s(pipe=%d, event=%lld, msc=%lld, pixmap=%ld, sync?=%d)\n", __FUNCTION__, pipe_from_crtc(crtc), (long long)event_id, (long long)target_msc, pixmap->drawable.serialNumber, sync_flip)); if (!check_flip__crtc(to_sna_from_pixmap(pixmap), crtc)) { DBG(("%s: flip invalid for CRTC\n", __FUNCTION__)); return FALSE; } bo = get_flip_bo(pixmap); if (bo == NULL) { DBG(("%s: flip invalid bo\n", __FUNCTION__)); return FALSE; } if (sync_flip) return page_flip(crtc->pScreen, crtc, event_id, bo); else return page_flip__async(crtc, event_id, target_msc, bo); } static void sna_present_unflip(ScreenPtr screen, uint64_t event_id) { struct sna *sna = to_sna_from_screen(screen); struct kgem_bo *bo; DBG(("%s(event=%lld)\n", __FUNCTION__, (long long)event_id)); if (sna->mode.front_active == 0 || sna->mode.shadow_active) { const struct ust_msc *swap; DBG(("%s: no CRTC active, perform no-op flip\n", __FUNCTION__)); notify: swap = sna_crtc_last_swap(sna_mode_first_crtc(sna)); DBG(("%s: pipe=%d, tv=%d.%06d msc %lld, event %lld complete\n", __FUNCTION__, -1, swap->tv_sec, swap->tv_usec, (long long)swap->msc, (long long)event_id)); present_event_notify(event_id, ust64(swap->tv_sec, swap->tv_usec), swap->msc); return; } bo = get_flip_bo(screen->GetScreenPixmap(screen)); if (bo == NULL || !page_flip(screen, NULL, event_id, bo)) { DBG(("%s: failed, trying to restore original mode\n", __FUNCTION__)); xf86SetDesiredModes(sna->scrn); goto notify; } } static present_screen_info_rec present_info = { .version = PRESENT_SCREEN_INFO_VERSION, .get_crtc = sna_present_get_crtc, .get_ust_msc = sna_present_get_ust_msc, .queue_vblank = sna_present_queue_vblank, .abort_vblank = sna_present_abort_vblank, .flush = sna_present_flush, .capabilities = PresentCapabilityNone, .check_flip = sna_present_check_flip, .flip = sna_present_flip, .unflip = sna_present_unflip, }; bool sna_present_open(struct sna *sna, ScreenPtr screen) { if (sna->mode.num_real_crtc == 0) return false; sna_present_update(sna); return present_screen_init(screen, &present_info); } void sna_present_update(struct sna *sna) { if (sna->flags & SNA_HAS_ASYNC_FLIP) present_info.capabilities |= PresentCapabilityAsync; else present_info.capabilities &= ~PresentCapabilityAsync; DBG(("%s: has_async_flip? %d\n", __FUNCTION__, !!(present_info.capabilities & PresentCapabilityAsync))); } void sna_present_close(struct sna *sna, ScreenPtr screen) { DBG(("%s()\n", __FUNCTION__)); } xf86-video-intel-2.99.917/src/sna/README0000664000175000017500000000330612244635610014164 00000000000000SandyBridge's New Acceleration ------------------------------ The guiding principle behind the design is to avoid GPU context switches. On SandyBridge (and beyond), these are especially pernicious because the RENDER and BLT engine are now on different rings and require synchronisation of the various execution units when switching contexts. They were not cheap on early generation, but with the increasing complexity of the GPU, avoiding such serialisations is important. Furthermore, we try very hard to avoid migrating between the CPU and GPU. Every pixmap (apart from temporary "scratch" surfaces which we intend to use on the GPU) is created in system memory. All operations are then done upon this shadow copy until we are forced to move it onto the GPU. Such migration can only be first triggered by: setting the pixmap as the scanout (we obviously need a GPU buffer here), using the pixmap as a DRI buffer (the client expects to perform hardware acceleration and we do not want to disappoint) and lastly using the pixmap as a RENDER target. This last is chosen because when we know we are going to perform hardware acceleration and will continue to do so without fallbacks, using the GPU is much, much faster than the CPU. The heuristic I chose therefore was that if the application uses RENDER, i.e. cairo, then it will only be using those paths and not intermixing core drawing operations and so unlikely to trigger a fallback. The complicating case is front-buffer rendering. So in order to accommodate using RENDER on an application whilst running xterm without a composite manager redirecting all the pixmaps to backing surfaces, we have to perform damage tracking to avoid excess migration of portions of the buffer. xf86-video-intel-2.99.917/src/sna/gen8_render.h0000664000175000017500000013223712432737457015676 00000000000000#ifndef GEN8_RENDER_H #define GEN8_RENDER_H #define INTEL_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low)) #define GEN8_3D(pipeline,op,sub) \ ((3 << 29) | ((pipeline) << 27) | ((op) << 24) | ((sub) << 16)) #define GEN8_STATE_BASE_ADDRESS GEN8_3D(0, 1, 1) # define BASE_ADDRESS_MODIFY (1 << 0) #define GEN8_STATE_SIP GEN8_3D(0, 1, 2) #define GEN8_3DSTATE_VF_STATISTICS GEN8_3D(1, 0, 0xb) #define GEN8_PIPELINE_SELECT GEN8_3D(1, 1, 4) # define PIPELINE_SELECT_3D 0 # define PIPELINE_SELECT_MEDIA 1 #define GEN8_MEDIA_STATE_POINTERS GEN8_3D(2, 0, 0) #define GEN8_MEDIA_OBJECT GEN8_3D(2, 1, 0) #define GEN8_3DSTATE_CLEAR_PARAMS GEN8_3D(3, 0, 0x04) #define GEN8_3DSTATE_DEPTH_BUFFER GEN8_3D(3, 0, 0x05) # define DEPTH_BUFFER_TYPE_SHIFT 29 # define DEPTH_BUFFER_FORMAT_SHIFT 18 #define GEN8_3DSTATE_STENCIL_BUFFER GEN8_3D(3, 0, 0x06) #define GEN8_3DSTATE_HIER_DEPTH_BUFFER GEN8_3D(3, 0, 0x07) #define GEN8_3DSTATE_VERTEX_BUFFERS GEN8_3D(3, 0, 0x08) # define VB_INDEX_SHIFT 26 # define VB_MODIFY_ENABLE (1 << 14) #define GEN8_3DSTATE_VERTEX_ELEMENTS GEN8_3D(3, 0, 0x09) # define VE_INDEX_SHIFT 26 # define VE_VALID (1 << 25) # define VE_FORMAT_SHIFT 16 # define VE_OFFSET_SHIFT 0 # define VE_COMPONENT_0_SHIFT 28 # define VE_COMPONENT_1_SHIFT 24 # define VE_COMPONENT_2_SHIFT 20 # define VE_COMPONENT_3_SHIFT 16 #define GEN8_3DSTATE_INDEX_BUFFER GEN8_3D(3, 0, 0x0a) #define GEN8_3DSTATE_VF GEN8_3D(3, 0, 0x0c) #define GEN8_3DSTATE_MULTISAMPLE GEN8_3D(3, 0, 0x0d) /* DW1 */ # define MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) # define MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define MULTISAMPLE_NUMSAMPLES_1 (0 << 1) # define MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define MULTISAMPLE_NUMSAMPLES_8 (3 << 1) #define GEN8_3DSTATE_CC_STATE_POINTERS GEN8_3D(3, 0, 0x0e) #define GEN8_3DSTATE_SCISSOR_STATE_POINTERS GEN8_3D(3, 0, 0x0f) #define GEN8_3DSTATE_VS GEN8_3D(3, 0, 0x10) #define GEN8_3DSTATE_GS GEN8_3D(3, 0, 0x11) #define GEN8_3DSTATE_CLIP GEN8_3D(3, 0, 0x12) #define GEN8_3DSTATE_SF GEN8_3D(3, 0, 0x13) # define SF_TRI_PROVOKE_SHIFT 29 # define SF_LINE_PROVOKE_SHIFT 27 # define SF_FAN_PROVOKE_SHIFT 25 #define GEN8_3DSTATE_WM GEN8_3D(3, 0, 0x14) /* DW1 */ # define WM_STATISTICS_ENABLE (1 << 31) # define WM_DEPTH_CLEAR (1 << 30) # define WM_DEPTH_RESOLVE (1 << 28) # define WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) # define WM_KILL_ENABLE (1 << 25) # define WM_POSITION_ZW_PIXEL (0 << 17) # define WM_POSITION_ZW_CENTROID (2 << 17) # define WM_POSITION_ZW_SAMPLE (3 << 17) # define WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 16) # define WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 15) # define WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 14) # define WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 13) # define WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 12) # define WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11) # define WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8) # define WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8) # define WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8) # define WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8) # define WM_LINE_AA_WIDTH_0_5 (0 << 6) # define WM_LINE_AA_WIDTH_1_0 (1 << 6) # define WM_LINE_AA_WIDTH_2_0 (2 << 6) # define WM_LINE_AA_WIDTH_4_0 (3 << 6) # define WM_POLYGON_STIPPLE_ENABLE (1 << 4) # define WM_LINE_STIPPLE_ENABLE (1 << 3) # define WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2) # define WM_MSRAST_OFF_PIXEL (0 << 0) # define WM_MSRAST_OFF_PATTERN (1 << 0) # define WM_MSRAST_ON_PIXEL (2 << 0) # define WM_MSRAST_ON_PATTERN (3 << 0) #define GEN8_3DSTATE_CONSTANT_VS GEN8_3D(3, 0, 0x15) #define GEN8_3DSTATE_CONSTANT_GS GEN8_3D(3, 0, 0x16) #define GEN8_3DSTATE_CONSTANT_PS GEN8_3D(3, 0, 0x17) #define GEN8_3DSTATE_SAMPLE_MASK GEN8_3D(3, 0, 0x18) #define GEN8_3DSTATE_CONSTANT_HS GEN8_3D(3, 0, 0x19) #define GEN8_3DSTATE_CONSTANT_DS GEN8_3D(3, 0, 0x1a) #define GEN8_3DSTATE_HS GEN8_3D(3, 0, 0x1b) #define GEN8_3DSTATE_TE GEN8_3D(3, 0, 0x1c) #define GEN8_3DSTATE_DS GEN8_3D(3, 0, 0x1d) #define GEN8_3DSTATE_STREAMOUT GEN8_3D(3, 0, 0x1e) #define GEN8_3DSTATE_SBE GEN8_3D(3, 0, 0x1f) /* DW1 */ # define SBE_FORCE_VERTEX_URB_READ_LENGTH (1<<29) # define SBE_FORCE_VERTEX_URB_READ_OFFSET (1<<28) # define SBE_NUM_OUTPUTS_SHIFT 22 # define SBE_SWIZZLE_ENABLE (1 << 21) # define SBE_POINT_SPRITE_LOWERLEFT (1 << 20) # define SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 # define SBE_URB_ENTRY_READ_OFFSET_SHIFT 5 #define GEN8_3DSTATE_PS GEN8_3D(3, 0, 0x20) /* DW1:DW2 kernel pointer */ /* DW3 */ # define PS_SPF_MODE (1 << 31) # define PS_VECTOR_MASK_ENABLE (1 << 30) # define PS_SAMPLER_COUNT_SHIFT 27 # define PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 # define PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) # define PS_FLOATING_POINT_MODE_ALT (1 << 16) /* DW4:DW5: scratch space */ /* DW6 */ # define PS_MAX_THREADS_SHIFT 23 # define PS_MAX_THREADS (62 << PS_MAX_THREADS_SHIFT) # define PS_PUSH_CONSTANT_ENABLE (1 << 11) # define PS_RENDER_TARGET_CLEAR (1 << 8) # define PS_RENDER_TARGET_RESOLVE (1 << 6) # define PS_POSOFFSET_NONE (0 << 3) # define PS_POSOFFSET_CENTROID (2 << 3) # define PS_POSOFFSET_SAMPLE (3 << 3) # define PS_32_DISPATCH_ENABLE (1 << 2) # define PS_16_DISPATCH_ENABLE (1 << 1) # define PS_8_DISPATCH_ENABLE (1 << 0) /* DW7 */ # define PS_DISPATCH_START_GRF_SHIFT_0 16 # define PS_DISPATCH_START_GRF_SHIFT_1 8 # define PS_DISPATCH_START_GRF_SHIFT_2 0 /* DW8:D9: kernel 1 pointer */ /* DW10:D11: kernel 2 pointer */ #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP GEN8_3D(3, 0, 0x21) #define GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC GEN8_3D(3, 0, 0x23) #define GEN8_3DSTATE_BLEND_STATE_POINTERS GEN8_3D(3, 0, 0x24) #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS GEN8_3D(3, 0, 0x26) #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS GEN8_3D(3, 0, 0x27) #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS GEN8_3D(3, 0, 0x28) #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS GEN8_3D(3, 0, 0x29) #define GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS GEN8_3D(3, 0, 0x2a) #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS GEN8_3D(3, 0, 0x2b) #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS GEN8_3D(3, 0, 0x2c) #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS GEN8_3D(3, 0, 0x2d) #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS GEN8_3D(3, 0, 0x2e) #define GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS GEN8_3D(3, 0, 0x2f) #define GEN8_3DSTATE_URB_VS GEN8_3D(3, 0, 0x30) #define GEN8_3DSTATE_URB_HS GEN8_3D(3, 0, 0x31) #define GEN8_3DSTATE_URB_DS GEN8_3D(3, 0, 0x32) #define GEN8_3DSTATE_URB_GS GEN8_3D(3, 0, 0x33) /* DW1 */ # define URB_ENTRY_NUMBER_SHIFT 0 # define URB_ENTRY_SIZE_SHIFT 16 # define URB_STARTING_ADDRESS_SHIFT 25 #define GEN8_3DSTATE_GATHER_CONSTANT_VS GEN8_3D(3, 0, 0x34) #define GEN8_3DSTATE_GATHER_CONSTANT_GS GEN8_3D(3, 0, 0x35) #define GEN8_3DSTATE_GATHER_CONSTANT_HS GEN8_3D(3, 0, 0x36) #define GEN8_3DSTATE_GATHER_CONSTANT_DS GEN8_3D(3, 0, 0x37) #define GEN8_3DSTATE_GATHER_CONSTANT_PS GEN8_3D(3, 0, 0x38) #define GEN8_3DSTATE_DX9_CONSTANTF_VS GEN8_3D(3, 0, 0x39) #define GEN8_3DSTATE_DX9_CONSTANTF_PS GEN8_3D(3, 0, 0x3a) #define GEN8_3DSTATE_DX9_CONSTANTI_VS GEN8_3D(3, 0, 0x3b) #define GEN8_3DSTATE_DX9_CONSTANTI_PS GEN8_3D(3, 0, 0x3c) #define GEN8_3DSTATE_DX9_CONSTANTB_VS GEN8_3D(3, 0, 0x3d) #define GEN8_3DSTATE_DX9_CONSTANTB_PS GEN8_3D(3, 0, 0x3e) #define GEN8_3DSTATE_DX9_LOCAL_VALID_VS GEN8_3D(3, 0, 0x3f) #define GEN8_3DSTATE_DX9_LOCAL_VALID_PS GEN8_3D(3, 0, 0x40) #define GEN8_3DSTATE_DX9_GENERATE_ACTIVE_VS GEN8_3D(3, 0, 0x41) #define GEN8_3DSTATE_DX9_GENERATE_ACTIVE_PS GEN8_3D(3, 0, 0x42) #define GEN8_3DSTATE_BINDING_TABLE_EDIT_VS GEN8_3D(3, 0, 0x43) #define GEN8_3DSTATE_BINDING_TABLE_EDIT_GS GEN8_3D(3, 0, 0x44) #define GEN8_3DSTATE_BINDING_TABLE_EDIT_HS GEN8_3D(3, 0, 0x45) #define GEN8_3DSTATE_BINDING_TABLE_EDIT_DS GEN8_3D(3, 0, 0x46) #define GEN8_3DSTATE_BINDING_TABLE_EDIT_PS GEN8_3D(3, 0, 0x47) #define GEN8_3DSTATE_VF_INSTANCING GEN8_3D(3, 0, 0x49) #define GEN8_3DSTATE_VF_SGVS GEN8_3D(3, 0, 0x4a) # define SGVS_ENABLE_INSTANCE_ID (1 << 31) # define SGVS_INSTANCE_ID_COMPONENT_SHIFT 29 # define SGVS_INSTANCE_ID_ELEMENT_OFFSET_SHIFT 16 # define SGVS_ENABLE_VERTEX_ID (1 << 15) # define SGVS_VERTEX_ID_COMPONENT_SHIFT 13 # define SGVS_VERTEX_ID_ELEMENT_OFFSET_SHIFT 0 #define GEN8_3DSTATE_VF_TOPOLOGY GEN8_3D(3, 0, 0x4b) # define POINTLIST 0x01 # define LINELIST 0x02 # define LINESTRIP 0x03 # define TRILIST 0x04 # define TRISTRIP 0x05 # define TRIFAN 0x06 # define QUADLIST 0x07 # define QUADSTRIP 0x08 # define LINELIST_ADJ 0x09 # define LINESTRIP_ADJ 0x0A # define TRILIST_ADJ 0x0B # define TRISTRIP_ADJ 0x0C # define TRISTRIP_REVERSE 0x0D # define POLYGON 0x0E # define RECTLIST 0x0F # define LINELOOP 0x10 # define POINTLIST_BF 0x11 # define LINESTRIP_CONT 0x12 # define LINESTRIP_BF 0x13 # define LINESTRIP_CONT_BF 0x14 # define TRIFAN_NOSTIPPLE 0x15 #define GEN8_3DSTATE_WM_CHROMAKEY GEN8_3D(3, 0, 0x4c) #define GEN8_3DSTATE_PS_BLEND GEN8_3D(3, 0, 0x4d) # define PS_BLEND_ALPHA_TO_COVERAGE_ENABLE (1 << 31) # define PS_BLEND_HAS_WRITEABLE_RT (1 << 30) # define PS_BLEND_COLOR_BLEND_ENABLE (1 << 29) # define PS_BLEND_SRC_ALPHA_SHIFT 24 # define PS_BLEND_DST_ALPHA_SHIFT 19 # define PS_BLEND_SRC_SHIFT 14 # define PS_BLEND_DST_SHIFT 9 # define PS_BLEND_ALPHA_TEST_ENABLE (1 << 8) # define PS_BLEND_INDEPENDENT_ALPHA_BLEND_ENABLE (1 << 7) #define GEN8_3DSTATE_WM_DEPTH_STENCIL GEN8_3D(3, 0, 0x4e) /* DW1 */ # define WM_DS_STENCIL_TEST_MASK_MASK INTEL_MASK(31, 24) # define WM_DS_STENCIL_TEST_MASK_SHIFT 24 # define WM_DS_STENCIL_WRITE_MASK_MASK INTEL_MASK(23, 16) # define WM_DS_STENCIL_WRITE_MASK_SHIFT 16 # define WM_DS_BF_STENCIL_TEST_MASK_MASK INTEL_MASK(15, 8) # define WM_DS_BF_STENCIL_TEST_MASK_SHIFT 8 # define WM_DS_BF_STENCIL_WRITE_MASK_MASK INTEL_MASK(7, 0) # define WM_DS_DEPTH_FUNC_SHIFT 5 # define WM_DS_DOUBLE_SIDED_STENCIL_ENABLE (1 << 4) # define WM_DS_STENCIL_TEST_ENABLE (1 << 3) # define WM_DS_STENCIL_BUFFER_WRITE_ENABLE (1 << 2) # define WM_DS_DEPTH_TEST_ENABLE (1 << 1) # define WM_DS_DEPTH_BUFFER_WRITE_ENABLE (1 << 0) /* DW2 */ # define WM_DS_STENCIL_TEST_MASK_MASK INTEL_MASK(31, 24) # define WM_DS_STENCIL_TEST_MASK_SHIFT 24 # define WM_DS_STENCIL_WRITE_MASK_MASK INTEL_MASK(23, 16) # define WM_DS_STENCIL_WRITE_MASK_SHIFT 16 # define WM_DS_BF_STENCIL_TEST_MASK_MASK INTEL_MASK(15, 8) # define WM_DS_BF_STENCIL_TEST_MASK_SHIFT 8 # define WM_DS_BF_STENCIL_WRITE_MASK_MASK INTEL_MASK(7, 0) # define WM_DS_BF_STENCIL_WRITE_MASK_SHIFT 0 #define GEN8_3DSTATE_PS_EXTRA GEN8_3D(3, 0, 0x4f) # define PSX_PIXEL_SHADER_VALID (1 << 31) # define PSX_PIXEL_SHADER_NO_RT_WRITE (1 << 30) # define PSX_OMASK_TO_RENDER_TARGET (1 << 29) # define PSX_KILL_ENABLE (1 << 28) # define PSX_PSCDEPTH_OFF (0 << 26) # define PSX_PSCDEPTH_ON (1 << 26) # define PSX_PSCDEPTH_ON_GE (2 << 26) # define PSX_PSCDEPTH_ON_LE (3 << 26) # define PSX_FORCE_COMPUTED_DEPTH (1 << 25) # define PSX_USES_SOURCE_DEPTH (1 << 24) # define PSX_USES_SOURCE_W (1 << 23) # define PSX_ATTRIBUTE_ENABLE (1 << 8) # define PSX_SHADER_DISABLES_ALPHA_TO_COVERAGE (1 << 7) # define PSX_SHADER_IS_PER_SAMPLE (1 << 6) # define PSX_SHADER_HAS_UAV (1 << 2) # define PSX_SHADER_USES_INPUT_COVERAGE_MASK (1 << 1) #define GEN8_3DSTATE_RASTER GEN8_3D(3, 0, 0x50) /* DW1 */ # define RASTER_FRONT_WINDING_CCW (1 << 21) # define RASTER_CULL_BOTH (0 << 16) # define RASTER_CULL_NONE (1 << 16) # define RASTER_CULL_FRONT (2 << 16) # define RASTER_CULL_BACK (3 << 16) # define RASTER_SMOOTH_POINT_ENABLE (1 << 13) # define RASTER_LINE_AA_ENABLE (1 << 2) # define RASTER_VIEWPORT_Z_CLIP_TEST_ENABLE (1 << 0) #define GEN8_3DSTATE_SBE_SWIZ GEN8_3D(3, 0, 0x51) #define GEN8_3DSTATE_WM_HZ_OP GEN8_3D(3, 0, 0x52) #define GEN8_3DSTATE_DRAWING_RECTANGLE GEN8_3D(3, 1, 0x00) #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD GEN8_3D(3, 1, 0x02) #define GEN8_3DSTATE_CHROMA_KEY GEN8_3D(3, 1, 0x04) #define GEN8_3DSTATE_POLY_STIPPLE_OFFSET GEN8_3D(3, 1, 0x06) #define GEN8_3DSTATE_POLY_STIPPLE_PATTERN GEN8_3D(3, 1, 0x07) #define GEN8_3DSTATE_LINE_STIPPLE GEN8_3D(3, 1, 0x08) #define GEN8_3DSTATE_AA_LINE_PARAMS GEN8_3D(3, 1, 0x0a) #define GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1 GEN8_3D(3, 1, 0x0c) #define GEN8_3DSTATE_MONOFILTER_SIZE GEN8_3D(3, 1, 0x11) #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS GEN8_3D(3, 1, 0x12) #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS GEN8_3D(3, 1, 0x13) #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS GEN8_3D(3, 1, 0x14) #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS GEN8_3D(3, 1, 0x15) #define GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS GEN8_3D(3, 1, 0x16) /* DW1 */ # define PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 # define PUSH_CONSTANT_BUFFER_SIZE_SHIFT 0 #define GEN8_3DSTATE_SO_DECL_LIST GEN8_3D(3, 1, 0x17) #define GEN8_3DSTATE_SO_BUFFER GEN8_3D(3, 1, 0x18) #define GEN8_3DSTATE_BINDING_TABLE_POOL_ALLOC GEN8_3D(3, 1, 0x19) #define GEN8_3DSTATE_GATHER_BUFFER_POOL_ALLOC GEN8_3D(3, 1, 0x1a) #define GEN8_3DSTATE_DX9_CONSTANT_BUFFER_POOL_ALLOC GEN8_3D(3, 1, 0x1b) #define GEN8_3DSTATE_SAMPLE_PATTERN GEN8_3D(3, 1, 0x1c) /* for GEN8_PIPE_CONTROL */ #define GEN8_PIPE_CONTROL GEN8_3D(3, 2, 0) #define PIPE_CONTROL_CS_STALL (1 << 20) #define PIPE_CONTROL_NOWRITE (0 << 14) #define PIPE_CONTROL_WRITE_QWORD (1 << 14) #define PIPE_CONTROL_WRITE_DEPTH (2 << 14) #define PIPE_CONTROL_WRITE_TIME (3 << 14) #define PIPE_CONTROL_DEPTH_STALL (1 << 13) #define PIPE_CONTROL_WC_FLUSH (1 << 12) #define PIPE_CONTROL_IS_FLUSH (1 << 11) #define PIPE_CONTROL_TC_FLUSH (1 << 10) #define PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) #define PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) #define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) #define GEN8_3DPRIMITIVE GEN8_3D(3, 3, 0) /* 3DPRIMITIVE bits */ #define VERTEX_SEQUENTIAL (0 << 15) #define VERTEX_RANDOM (1 << 15) #define ANISORATIO_2 0 #define ANISORATIO_4 1 #define ANISORATIO_6 2 #define ANISORATIO_8 3 #define ANISORATIO_10 4 #define ANISORATIO_12 5 #define ANISORATIO_14 6 #define ANISORATIO_16 7 #define BLENDFACTOR_ONE 0x1 #define BLENDFACTOR_SRC_COLOR 0x2 #define BLENDFACTOR_SRC_ALPHA 0x3 #define BLENDFACTOR_DST_ALPHA 0x4 #define BLENDFACTOR_DST_COLOR 0x5 #define BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 #define BLENDFACTOR_CONST_COLOR 0x7 #define BLENDFACTOR_CONST_ALPHA 0x8 #define BLENDFACTOR_SRC1_COLOR 0x9 #define BLENDFACTOR_SRC1_ALPHA 0x0A #define BLENDFACTOR_ZERO 0x11 #define BLENDFACTOR_INV_SRC_COLOR 0x12 #define BLENDFACTOR_INV_SRC_ALPHA 0x13 #define BLENDFACTOR_INV_DST_ALPHA 0x14 #define BLENDFACTOR_INV_DST_COLOR 0x15 #define BLENDFACTOR_INV_CONST_COLOR 0x17 #define BLENDFACTOR_INV_CONST_ALPHA 0x18 #define BLENDFACTOR_INV_SRC1_COLOR 0x19 #define BLENDFACTOR_INV_SRC1_ALPHA 0x1A #define BLENDFUNCTION_ADD 0 #define BLENDFUNCTION_SUBTRACT 1 #define BLENDFUNCTION_REVERSE_SUBTRACT 2 #define GEN8_BLENDFUNCTION_MIN 3 #define BLENDFUNCTION_MAX 4 #define ALPHATEST_FORMAT_UNORM8 0 #define ALPHATEST_FORMAT_FLOAT32 1 #define CHROMAKEY_KILL_ON_ANY_MATCH 0 #define CHROMAKEY_REPLACE_BLACK 1 #define CLIP_API_OGL 0 #define CLIP_API_DX 1 #define CLIPMODE_NORMAL 0 #define CLIPMODE_CLIP_ALL 1 #define CLIPMODE_CLIP_NON_REJECTED 2 #define CLIPMODE_REJECT_ALL 3 #define CLIPMODE_ACCEPT_ALL 4 #define CLIP_NDCSPACE 0 #define CLIP_SCREENSPACE 1 #define COMPAREFUNCTION_ALWAYS 0 #define COMPAREFUNCTION_NEVER 1 #define COMPAREFUNCTION_LESS 2 #define COMPAREFUNCTION_EQUAL 3 #define COMPAREFUNCTION_LEQUAL 4 #define COMPAREFUNCTION_GREATER 5 #define COMPAREFUNCTION_NOTEQUAL 6 #define COMPAREFUNCTION_GEQUAL 7 #define COVERAGE_PIXELS_HALF 0 #define COVERAGE_PIXELS_1 1 #define COVERAGE_PIXELS_2 2 #define COVERAGE_PIXELS_4 3 #define DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 #define DEPTHFORMAT_D32_FLOAT 1 #define DEPTHFORMAT_D24_UNORM_S8_UINT 2 #define DEPTHFORMAT_D16_UNORM 5 #define FLOATING_POINT_IEEE_754 0 #define FLOATING_POINT_NON_IEEE_754 1 #define INDEX_BYTE 0 #define INDEX_WORD 1 #define INDEX_DWORD 2 #define LOGICOPFUNCTION_CLEAR 0 #define LOGICOPFUNCTION_NOR 1 #define LOGICOPFUNCTION_AND_INVERTED 2 #define LOGICOPFUNCTION_COPY_INVERTED 3 #define LOGICOPFUNCTION_AND_REVERSE 4 #define LOGICOPFUNCTION_INVERT 5 #define LOGICOPFUNCTION_XOR 6 #define LOGICOPFUNCTION_NAND 7 #define LOGICOPFUNCTION_AND 8 #define LOGICOPFUNCTION_EQUIV 9 #define LOGICOPFUNCTION_NOOP 10 #define LOGICOPFUNCTION_OR_INVERTED 11 #define LOGICOPFUNCTION_COPY 12 #define LOGICOPFUNCTION_OR_REVERSE 13 #define LOGICOPFUNCTION_OR 14 #define LOGICOPFUNCTION_SET 15 #define MAPFILTER_NEAREST 0x0 #define MAPFILTER_LINEAR 0x1 #define MAPFILTER_ANISOTROPIC 0x2 #define MAPFILTER_FLEXIBLE 0x3 #define MAPFILTER_MONO 0x6 #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #define POLYGON_FRONT_FACING 0 #define POLYGON_BACK_FACING 1 #define PREFILTER_ALWAYS 0x0 #define PREFILTER_NEVER 0x1 #define PREFILTER_LESS 0x2 #define PREFILTER_EQUAL 0x3 #define PREFILTER_LEQUAL 0x4 #define PREFILTER_GREATER 0x5 #define PREFILTER_NOTEQUAL 0x6 #define PREFILTER_GEQUAL 0x7 #define RASTRULE_UPPER_LEFT 0 #define RASTRULE_UPPER_RIGHT 1 #define STENCILOP_KEEP 0 #define STENCILOP_ZERO 1 #define STENCILOP_REPLACE 2 #define STENCILOP_INCRSAT 3 #define STENCILOP_DECRSAT 4 #define STENCILOP_INCR 5 #define STENCILOP_DECR 6 #define STENCILOP_INVERT 7 #define SURFACE_MIPMAPLAYOUT_BELOW 0 #define SURFACE_MIPMAPLAYOUT_RIGHT 1 #define SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define SURFACEFORMAT_R64G64_FLOAT 0x005 #define SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define SURFACEFORMAT_R32G32B32_SINT 0x041 #define SURFACEFORMAT_R32G32B32_UINT 0x042 #define SURFACEFORMAT_R32G32B32_UNORM 0x043 #define SURFACEFORMAT_R32G32B32_SNORM 0x044 #define SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define SURFACEFORMAT_R32G32B32_USCALED 0x046 #define SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define SURFACEFORMAT_R32G32_FLOAT 0x085 #define SURFACEFORMAT_R32G32_SINT 0x086 #define SURFACEFORMAT_R32G32_UINT 0x087 #define SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define SURFACEFORMAT_L32A32_FLOAT 0x08A #define SURFACEFORMAT_R32G32_UNORM 0x08B #define SURFACEFORMAT_R32G32_SNORM 0x08C #define SURFACEFORMAT_R64_FLOAT 0x08D #define SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define SURFACEFORMAT_A32X32_FLOAT 0x090 #define SURFACEFORMAT_L32X32_FLOAT 0x091 #define SURFACEFORMAT_I32X32_FLOAT 0x092 #define SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define SURFACEFORMAT_R32G32_SSCALED 0x095 #define SURFACEFORMAT_R32G32_USCALED 0x096 #define SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define SURFACEFORMAT_R16G16_UNORM 0x0CC #define SURFACEFORMAT_R16G16_SNORM 0x0CD #define SURFACEFORMAT_R16G16_SINT 0x0CE #define SURFACEFORMAT_R16G16_UINT 0x0CF #define SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define SURFACEFORMAT_R32_SINT 0x0D6 #define SURFACEFORMAT_R32_UINT 0x0D7 #define SURFACEFORMAT_R32_FLOAT 0x0D8 #define SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define SURFACEFORMAT_L16A16_UNORM 0x0DF #define SURFACEFORMAT_I24X8_UNORM 0x0E0 #define SURFACEFORMAT_L24X8_UNORM 0x0E1 #define SURFACEFORMAT_A24X8_UNORM 0x0E2 #define SURFACEFORMAT_I32_FLOAT 0x0E3 #define SURFACEFORMAT_L32_FLOAT 0x0E4 #define SURFACEFORMAT_A32_FLOAT 0x0E5 #define SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define SURFACEFORMAT_R32_UNORM 0x0F1 #define SURFACEFORMAT_R32_SNORM 0x0F2 #define SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define SURFACEFORMAT_R16G16_USCALED 0x0F7 #define SURFACEFORMAT_R32_SSCALED 0x0F8 #define SURFACEFORMAT_R32_USCALED 0x0F9 #define SURFACEFORMAT_B5G6R5_UNORM 0x100 #define SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define SURFACEFORMAT_R8G8_UNORM 0x106 #define SURFACEFORMAT_R8G8_SNORM 0x107 #define SURFACEFORMAT_R8G8_SINT 0x108 #define SURFACEFORMAT_R8G8_UINT 0x109 #define SURFACEFORMAT_R16_UNORM 0x10A #define SURFACEFORMAT_R16_SNORM 0x10B #define SURFACEFORMAT_R16_SINT 0x10C #define SURFACEFORMAT_R16_UINT 0x10D #define SURFACEFORMAT_R16_FLOAT 0x10E #define SURFACEFORMAT_I16_UNORM 0x111 #define SURFACEFORMAT_L16_UNORM 0x112 #define SURFACEFORMAT_A16_UNORM 0x113 #define SURFACEFORMAT_L8A8_UNORM 0x114 #define SURFACEFORMAT_I16_FLOAT 0x115 #define SURFACEFORMAT_L16_FLOAT 0x116 #define SURFACEFORMAT_A16_FLOAT 0x117 #define SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define SURFACEFORMAT_R8G8_SSCALED 0x11C #define SURFACEFORMAT_R8G8_USCALED 0x11D #define SURFACEFORMAT_R16_SSCALED 0x11E #define SURFACEFORMAT_R16_USCALED 0x11F #define SURFACEFORMAT_R8_UNORM 0x140 #define SURFACEFORMAT_R8_SNORM 0x141 #define SURFACEFORMAT_R8_SINT 0x142 #define SURFACEFORMAT_R8_UINT 0x143 #define SURFACEFORMAT_A8_UNORM 0x144 #define SURFACEFORMAT_I8_UNORM 0x145 #define SURFACEFORMAT_L8_UNORM 0x146 #define SURFACEFORMAT_P4A4_UNORM 0x147 #define SURFACEFORMAT_A4P4_UNORM 0x148 #define SURFACEFORMAT_R8_SSCALED 0x149 #define SURFACEFORMAT_R8_USCALED 0x14A #define SURFACEFORMAT_R1_UINT 0x181 #define SURFACEFORMAT_YCRCB_NORMAL 0x182 #define SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define SURFACEFORMAT_BC1_UNORM 0x186 #define SURFACEFORMAT_BC2_UNORM 0x187 #define SURFACEFORMAT_BC3_UNORM 0x188 #define SURFACEFORMAT_BC4_UNORM 0x189 #define SURFACEFORMAT_BC5_UNORM 0x18A #define SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define SURFACEFORMAT_MONO8 0x18E #define SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define SURFACEFORMAT_YCRCB_SWAPY 0x190 #define SURFACEFORMAT_DXT1_RGB 0x191 #define SURFACEFORMAT_FXT1 0x192 #define SURFACEFORMAT_R8G8B8_UNORM 0x193 #define SURFACEFORMAT_R8G8B8_SNORM 0x194 #define SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define SURFACEFORMAT_R8G8B8_USCALED 0x196 #define SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define SURFACEFORMAT_BC4_SNORM 0x199 #define SURFACEFORMAT_BC5_SNORM 0x19A #define SURFACEFORMAT_R16G16B16_UNORM 0x19C #define SURFACEFORMAT_R16G16B16_SNORM 0x19D #define SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define SURFACEFORMAT_R16G16B16_USCALED 0x19F #define SURFACE_1D 0 #define SURFACE_2D 1 #define SURFACE_3D 2 #define SURFACE_CUBE 3 #define SURFACE_BUFFER 4 #define SURFACE_NULL 7 #define TEXCOORDMODE_WRAP 0 #define TEXCOORDMODE_MIRROR 1 #define TEXCOORDMODE_CLAMP 2 #define TEXCOORDMODE_CUBE 3 #define TEXCOORDMODE_CLAMP_BORDER 4 #define TEXCOORDMODE_MIRROR_ONCE 5 #define THREAD_PRIORITY_NORMAL 0 #define THREAD_PRIORITY_HIGH 1 #define VERTEX_SUBPIXEL_PRECISION_8BITS 0 #define VERTEX_SUBPIXEL_PRECISION_4BITS 1 #define COMPONENT_NOSTORE 0 #define COMPONENT_STORE_SRC 1 #define COMPONENT_STORE_0 2 #define COMPONENT_STORE_1_FLT 3 #define COMPONENT_STORE_1_INT 4 #define COMPONENT_STORE_VID 5 #define COMPONENT_STORE_IID 6 #define COMPONENT_STORE_PID 7 /* Execution Unit (EU) defines */ #define GEN8_ALIGN_1 0 #define GEN8_ALIGN_16 1 #define GEN8_ADDRESS_DIRECT 0 #define GEN8_ADDRESS_REGISTER_INDIRECT_REGISTER 1 #define GEN8_CHANNEL_X 0 #define GEN8_CHANNEL_Y 1 #define GEN8_CHANNEL_Z 2 #define GEN8_CHANNEL_W 3 #define GEN8_COMPRESSION_NONE 0 #define GEN8_COMPRESSION_2NDHALF 1 #define GEN8_COMPRESSION_COMPRESSED 2 #define GEN8_CONDITIONAL_NONE 0 #define GEN8_CONDITIONAL_Z 1 #define GEN8_CONDITIONAL_NZ 2 #define GEN8_CONDITIONAL_EQ 1 /* Z */ #define GEN8_CONDITIONAL_NEQ 2 /* NZ */ #define GEN8_CONDITIONAL_G 3 #define GEN8_CONDITIONAL_GE 4 #define GEN8_CONDITIONAL_L 5 #define GEN8_CONDITIONAL_LE 6 #define GEN8_CONDITIONAL_C 7 #define GEN8_CONDITIONAL_O 8 #define GEN8_DEBUG_NONE 0 #define GEN8_DEBUG_BREAKPOINT 1 #define GEN8_DEPENDENCY_NORMAL 0 #define GEN8_DEPENDENCY_NOTCLEARED 1 #define GEN8_DEPENDENCY_NOTCHECKED 2 #define GEN8_DEPENDENCY_DISABLE 3 #define GEN8_EXECUTE_1 0 #define GEN8_EXECUTE_2 1 #define GEN8_EXECUTE_4 2 #define GEN8_EXECUTE_8 3 #define GEN8_EXECUTE_16 4 #define GEN8_EXECUTE_32 5 #define GEN8_HORIZONTAL_STRIDE_0 0 #define GEN8_HORIZONTAL_STRIDE_1 1 #define GEN8_HORIZONTAL_STRIDE_2 2 #define GEN8_HORIZONTAL_STRIDE_4 3 #define GEN8_INSTRUCTION_NORMAL 0 #define GEN8_INSTRUCTION_SATURATE 1 #define GEN8_OPCODE_MOV 1 #define GEN8_OPCODE_SEL 2 #define GEN8_OPCODE_NOT 4 #define GEN8_OPCODE_AND 5 #define GEN8_OPCODE_OR 6 #define GEN8_OPCODE_XOR 7 #define GEN8_OPCODE_SHR 8 #define GEN8_OPCODE_SHL 9 #define GEN8_OPCODE_RSR 10 #define GEN8_OPCODE_RSL 11 #define GEN8_OPCODE_ASR 12 #define GEN8_OPCODE_CMP 16 #define GEN8_OPCODE_JMPI 32 #define GEN8_OPCODE_IF 34 #define GEN8_OPCODE_IFF 35 #define GEN8_OPCODE_ELSE 36 #define GEN8_OPCODE_ENDIF 37 #define GEN8_OPCODE_DO 38 #define GEN8_OPCODE_WHILE 39 #define GEN8_OPCODE_BREAK 40 #define GEN8_OPCODE_CONTINUE 41 #define GEN8_OPCODE_HALT 42 #define GEN8_OPCODE_MSAVE 44 #define GEN8_OPCODE_MRESTORE 45 #define GEN8_OPCODE_PUSH 46 #define GEN8_OPCODE_POP 47 #define GEN8_OPCODE_WAIT 48 #define GEN8_OPCODE_SEND 49 #define GEN8_OPCODE_ADD 64 #define GEN8_OPCODE_MUL 65 #define GEN8_OPCODE_AVG 66 #define GEN8_OPCODE_FRC 67 #define GEN8_OPCODE_RNDU 68 #define GEN8_OPCODE_RNDD 69 #define GEN8_OPCODE_RNDE 70 #define GEN8_OPCODE_RNDZ 71 #define GEN8_OPCODE_MAC 72 #define GEN8_OPCODE_MACH 73 #define GEN8_OPCODE_LZD 74 #define GEN8_OPCODE_SAD2 80 #define GEN8_OPCODE_SADA2 81 #define GEN8_OPCODE_DP4 84 #define GEN8_OPCODE_DPH 85 #define GEN8_OPCODE_DP3 86 #define GEN8_OPCODE_DP2 87 #define GEN8_OPCODE_DPA2 88 #define GEN8_OPCODE_LINE 89 #define GEN8_OPCODE_NOP 126 #define GEN8_PREDICATE_NONE 0 #define GEN8_PREDICATE_NORMAL 1 #define GEN8_PREDICATE_ALIGN1_ANYV 2 #define GEN8_PREDICATE_ALIGN1_ALLV 3 #define GEN8_PREDICATE_ALIGN1_ANY2H 4 #define GEN8_PREDICATE_ALIGN1_ALL2H 5 #define GEN8_PREDICATE_ALIGN1_ANY4H 6 #define GEN8_PREDICATE_ALIGN1_ALL4H 7 #define GEN8_PREDICATE_ALIGN1_ANY8H 8 #define GEN8_PREDICATE_ALIGN1_ALL8H 9 #define GEN8_PREDICATE_ALIGN1_ANY16H 10 #define GEN8_PREDICATE_ALIGN1_ALL16H 11 #define GEN8_PREDICATE_ALIGN16_REPLICATE_X 2 #define GEN8_PREDICATE_ALIGN16_REPLICATE_Y 3 #define GEN8_PREDICATE_ALIGN16_REPLICATE_Z 4 #define GEN8_PREDICATE_ALIGN16_REPLICATE_W 5 #define GEN8_PREDICATE_ALIGN16_ANY4H 6 #define GEN8_PREDICATE_ALIGN16_ALL4H 7 #define GEN8_ARCHITECTURE_REGISTER_FILE 0 #define GEN8_GENERAL_REGISTER_FILE 1 #define GEN8_MESSAGE_REGISTER_FILE 2 #define GEN8_IMMEDIATE_VALUE 3 #define GEN8_REGISTER_TYPE_UD 0 #define GEN8_REGISTER_TYPE_D 1 #define GEN8_REGISTER_TYPE_UW 2 #define GEN8_REGISTER_TYPE_W 3 #define GEN8_REGISTER_TYPE_UB 4 #define GEN8_REGISTER_TYPE_B 5 #define GEN8_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ #define GEN8_REGISTER_TYPE_HF 6 #define GEN8_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ #define GEN8_REGISTER_TYPE_F 7 #define GEN8_ARF_NULL 0x00 #define GEN8_ARF_ADDRESS 0x10 #define GEN8_ARF_ACCUMULATOR 0x20 #define GEN8_ARF_FLAG 0x30 #define GEN8_ARF_MASK 0x40 #define GEN8_ARF_MASK_STACK 0x50 #define GEN8_ARF_MASK_STACK_DEPTH 0x60 #define GEN8_ARF_STATE 0x70 #define GEN8_ARF_CONTROL 0x80 #define GEN8_ARF_NOTIFICATION_COUNT 0x90 #define GEN8_ARF_IP 0xA0 #define GEN8_AMASK 0 #define GEN8_IMASK 1 #define GEN8_LMASK 2 #define GEN8_CMASK 3 #define GEN8_THREAD_NORMAL 0 #define GEN8_THREAD_ATOMIC 1 #define GEN8_THREAD_SWITCH 2 #define GEN8_VERTICAL_STRIDE_0 0 #define GEN8_VERTICAL_STRIDE_1 1 #define GEN8_VERTICAL_STRIDE_2 2 #define GEN8_VERTICAL_STRIDE_4 3 #define GEN8_VERTICAL_STRIDE_8 4 #define GEN8_VERTICAL_STRIDE_16 5 #define GEN8_VERTICAL_STRIDE_32 6 #define GEN8_VERTICAL_STRIDE_64 7 #define GEN8_VERTICAL_STRIDE_128 8 #define GEN8_VERTICAL_STRIDE_256 9 #define GEN8_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF #define GEN8_WIDTH_1 0 #define GEN8_WIDTH_2 1 #define GEN8_WIDTH_4 2 #define GEN8_WIDTH_8 3 #define GEN8_WIDTH_16 4 #define GEN8_STATELESS_BUFFER_BOUNDARY_1K 0 #define GEN8_STATELESS_BUFFER_BOUNDARY_2K 1 #define GEN8_STATELESS_BUFFER_BOUNDARY_4K 2 #define GEN8_STATELESS_BUFFER_BOUNDARY_8K 3 #define GEN8_STATELESS_BUFFER_BOUNDARY_16K 4 #define GEN8_STATELESS_BUFFER_BOUNDARY_32K 5 #define GEN8_STATELESS_BUFFER_BOUNDARY_64K 6 #define GEN8_STATELESS_BUFFER_BOUNDARY_128K 7 #define GEN8_STATELESS_BUFFER_BOUNDARY_256K 8 #define GEN8_STATELESS_BUFFER_BOUNDARY_512K 9 #define GEN8_STATELESS_BUFFER_BOUNDARY_1M 10 #define GEN8_STATELESS_BUFFER_BOUNDARY_2M 11 #define GEN8_POLYGON_FACING_FRONT 0 #define GEN8_POLYGON_FACING_BACK 1 #define GEN8_MESSAGE_TARGET_NULL 0 #define GEN8_MESSAGE_TARGET_MATH 1 #define GEN8_MESSAGE_TARGET_SAMPLER 2 #define GEN8_MESSAGE_TARGET_GATEWAY 3 #define GEN8_MESSAGE_TARGET_DATAPORT_READ 4 #define GEN8_MESSAGE_TARGET_DATAPORT_WRITE 5 #define GEN8_MESSAGE_TARGET_URB 6 #define GEN8_MESSAGE_TARGET_THREAD_SPAWNER 7 #define GEN8_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define GEN8_SAMPLER_RETURN_FORMAT_UINT32 2 #define GEN8_SAMPLER_RETURN_FORMAT_SINT32 3 #define GEN8_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define GEN8_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define GEN8_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 #define GEN8_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 #define GEN8_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 #define GEN8_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 #define GEN8_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 #define GEN8_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 #define GEN8_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 #define GEN8_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 #define GEN8_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 #define GEN8_SAMPLER_MESSAGE_SIMD8_RESINFO 2 #define GEN8_SAMPLER_MESSAGE_SIMD16_RESINFO 2 #define GEN8_SAMPLER_MESSAGE_SIMD4X2_LD 3 #define GEN8_SAMPLER_MESSAGE_SIMD8_LD 3 #define GEN8_SAMPLER_MESSAGE_SIMD16_LD 3 #define GEN8_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 #define GEN8_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 #define GEN8_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define GEN8_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define GEN8_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define GEN8_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define GEN8_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 #define GEN8_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define GEN8_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 #define GEN8_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 #define GEN8_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 #define GEN8_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2 #define GEN8_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 #define GEN8_DATAPORT_READ_TARGET_DATA_CACHE 0 #define GEN8_DATAPORT_READ_TARGET_RENDER_CACHE 1 #define GEN8_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 #define GEN8_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 #define GEN8_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 #define GEN8_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 #define GEN8_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 #define GEN8_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 #define GEN8_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 #define GEN8_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 #define GEN8_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2 #define GEN8_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 #define GEN8_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 #define GEN8_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 #define GEN8_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 #define GEN8_MATH_FUNCTION_INV 1 #define GEN8_MATH_FUNCTION_LOG 2 #define GEN8_MATH_FUNCTION_EXP 3 #define GEN8_MATH_FUNCTION_SQRT 4 #define GEN8_MATH_FUNCTION_RSQ 5 #define GEN8_MATH_FUNCTION_SIN 6 /* was 7 */ #define GEN8_MATH_FUNCTION_COS 7 /* was 8 */ #define GEN8_MATH_FUNCTION_SINCOS 8 /* was 6 */ #define GEN8_MATH_FUNCTION_TAN 9 #define GEN8_MATH_FUNCTION_POW 10 #define GEN8_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 #define GEN8_MATH_FUNCTION_INT_DIV_QUOTIENT 12 #define GEN8_MATH_FUNCTION_INT_DIV_REMAINDER 13 #define GEN8_MATH_INTEGER_UNSIGNED 0 #define GEN8_MATH_INTEGER_SIGNED 1 #define GEN8_MATH_PRECISION_FULL 0 #define GEN8_MATH_PRECISION_PARTIAL 1 #define GEN8_MATH_SATURATE_NONE 0 #define GEN8_MATH_SATURATE_SATURATE 1 #define GEN8_MATH_DATA_VECTOR 0 #define GEN8_MATH_DATA_SCALAR 1 #define GEN8_URB_OPCODE_WRITE 0 #define GEN8_URB_SWIZZLE_NONE 0 #define GEN8_URB_SWIZZLE_INTERLEAVE 1 #define GEN8_URB_SWIZZLE_TRANSPOSE 2 #define GEN8_SCRATCH_SPACE_SIZE_1K 0 #define GEN8_SCRATCH_SPACE_SIZE_2K 1 #define GEN8_SCRATCH_SPACE_SIZE_4K 2 #define GEN8_SCRATCH_SPACE_SIZE_8K 3 #define GEN8_SCRATCH_SPACE_SIZE_16K 4 #define GEN8_SCRATCH_SPACE_SIZE_32K 5 #define GEN8_SCRATCH_SPACE_SIZE_64K 6 #define GEN8_SCRATCH_SPACE_SIZE_128K 7 #define GEN8_SCRATCH_SPACE_SIZE_256K 8 #define GEN8_SCRATCH_SPACE_SIZE_512K 9 #define GEN8_SCRATCH_SPACE_SIZE_1M 10 #define GEN8_SCRATCH_SPACE_SIZE_2M 11 struct gen8_blend_state { struct { /* 00 */ uint32_t pad:19; /* 19 */ uint32_t y_dither_offset:2; /* 21 */ uint32_t x_dither_offset:2; /* 23 */ uint32_t color_dither_enable:1; /* 24 */ uint32_t alpha_test_function:3; /* 27 */ uint32_t alpha_test:1; /* 28 */ uint32_t alpha_to_coverage_dither:1; /* 29 */ uint32_t alpha_to_one:1; /* 30 */ uint32_t ia_blend:1; /* 31 */ uint32_t alpha_to_coverage:1; } common; struct { /* 00 */ uint32_t write_disable_blue:1; /* 01 */ uint32_t write_disable_green:1; /* 02 */ uint32_t write_disable_red:1; /* 03 */ uint32_t write_disable_alpha:1; /* 04 */ uint32_t pad0:1; /* 05 */ uint32_t alpha_blend_function:3; /* 08 */ uint32_t dest_alpha_blend_factor:5; /* 13 */ uint32_t source_alpha_blend_factor:5; /* 18 */ uint32_t color_blend_function:3; /* 21 */ uint32_t dest_blend_factor:5; /* 26 */ uint32_t source_blend_factor:5; /* 31 */ uint32_t color_blend:1; /* 32 */ uint32_t post_blend_clamp:1; /* 33 */ uint32_t pre_blend_clamp:1; /* 34 */ uint32_t color_clamp_range:2; /* 36 */ uint32_t pre_blend_source_only_clamp:1; /* 37 */ uint32_t pad1:22; /* 59 */ uint32_t logic_op_function:4; /* 63 */ uint32_t logic_op:1; } rt; }; struct gen8_color_calc_state { struct { /* 00 */ uint32_t alpha_test_format:1; /* 01 */ uint32_t pad0:14; /* 15 */ uint32_t round_disable:1; /* 16 */ uint32_t bf_stencil_ref:8; /* 24 */ uint32_t stencil_ref:8; } cc0; union { float alpha_ref_f; struct { uint32_t ui:8; uint32_t pad0:24; } alpha_ref_fi; } cc1; float constant_r; float constant_g; float constant_b; float constant_a; }; struct gen8_sampler_state { struct { /* 00 */ unsigned int aniso_algorithm:1; /* 01 */ unsigned int lod_bias:13; /* 14 */ unsigned int min_filter:3; /* 17 */ unsigned int mag_filter:3; /* 20 */ unsigned int mip_filter:2; /* 22 */ unsigned int base_level:5; /* 27 */ unsigned int lod_preclamp:2; /* 29 */ unsigned int default_color_mode:1; /* 30 */ unsigned int flexible_filter_clamp:1; /* 31 */ unsigned int disable:1; } ss0; struct { /* 00 */ unsigned int cube_control_mode:1; /* 01 */ unsigned int shadow_function:3; /* 04 */ unsigned int chroma_key_mode:1; /* 05 */ unsigned int chroma_key_index:2; /* 07 */ unsigned int chroma_key_enable:1; /* 08 */ unsigned int max_lod:12; /* 20 */ unsigned int min_lod:12; } ss1; struct { unsigned int pad:6; unsigned int default_color_pointer:26; } ss2; struct { /* 00 */ unsigned int r_wrap_mode:3; /* 03 */ unsigned int t_wrap_mode:3; /* 06 */ unsigned int s_wrap_mode:3; /* 09 */ unsigned int pad:1; /* 10 */ unsigned int non_normalized_coord:1; /* 11 */ unsigned int trilinear_quality:2; /* 13 */ unsigned int address_round:6; /* 19 */ unsigned int max_aniso:3; /* 22 */ unsigned int pad0:2; /* 24 */ unsigned int non_separable_filter:8; } ss3; }; /* Surface state DW0 */ #define SURFACE_RC_READ_WRITE (1 << 8) #define SURFACE_TILED (1 << 13) #define SURFACE_TILED_Y (1 << 12) #define SURFACE_FORMAT_SHIFT 18 #define SURFACE_VALIGN_1 (0 << 16) /* reserved! */ #define SURFACE_VALIGN_4 (1 << 16) #define SURFACE_VALIGN_8 (2 << 16) #define SURFACE_VALIGN_16 (3 << 16) #define SURFACE_HALIGN_1 (0 << 14) /* reserved! */ #define SURFACE_HALIGN_4 (1 << 14) #define SURFACE_HALIGN_8 (2 << 14) #define SURFACE_HALIGN_16 (3 << 14) #define SURFACE_TYPE_SHIFT 29 /* Surface state DW2 */ #define SURFACE_HEIGHT_SHIFT 16 #define SURFACE_WIDTH_SHIFT 0 /* Surface state DW3 */ #define SURFACE_DEPTH_SHIFT 21 #define SURFACE_PITCH_SHIFT 0 #define SWIZZLE_ZERO 0 #define SWIZZLE_ONE 1 #define SWIZZLE_RED 4 #define SWIZZLE_GREEN 5 #define SWIZZLE_BLUE 6 #define SWIZZLE_ALPHA 7 #define __SURFACE_SWIZZLE(r,g,b,a) \ ((a) << 16 | (b) << 19 | (g) << 22 | (r) << 25) #define SURFACE_SWIZZLE(r,g,b,a) \ __SURFACE_SWIZZLE(SWIZZLE_##r, SWIZZLE_##g, SWIZZLE_##b, SWIZZLE_##a) typedef enum { SAMPLER_FILTER_NEAREST = 0, SAMPLER_FILTER_BILINEAR, FILTER_COUNT } sampler_filter_t; typedef enum { SAMPLER_EXTEND_NONE = 0, SAMPLER_EXTEND_REPEAT, SAMPLER_EXTEND_PAD, SAMPLER_EXTEND_REFLECT, EXTEND_COUNT } sampler_extend_t; #endif xf86-video-intel-2.99.917/src/sna/sna_video_hwmc.h0000664000175000017500000000320312400044327016427 00000000000000/* * Copyright © 2007 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Zhenyu Wang * */ #ifndef SNA_VIDEO_HWMC_H #define SNA_VIDEO_HWMC_H #define SNA_XVMC_LIBNAME "IntelXvMC" #define SNA_XVMC_MAJOR 0 #define SNA_XVMC_MINOR 1 #define SNA_XVMC_PATCHLEVEL 0 /* hw xvmc support type */ #define XVMC_I915_MPEG2_MC 0x01 #define XVMC_I965_MPEG2_MC 0x02 #define XVMC_I945_MPEG2_VLD 0x04 #define XVMC_I965_MPEG2_VLD 0x08 #ifdef _SNA_XVMC_SERVER_ #include void sna_video_xvmc_setup(struct sna *sna, ScreenPtr screen); #endif #endif xf86-video-intel-2.99.917/src/sna/kgem_debug_gen3.c0000664000175000017500000012645012244635610016463 00000000000000/* * Copyright © 2007-2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include "sna.h" #include "sna_reg.h" #include "gen3_render.h" #include "kgem_debug.h" enum type { T_FLOAT32, T_FLOAT16, }; static struct state { struct vertex_buffer { int handle; void *base; const char *ptr; int pitch; struct kgem_bo *current; } vb; struct vertex_elements { int offset; bool valid; enum type type; int size; uint8_t swizzle[4]; } ve[33]; int num_ve; } state; static float int_as_float(int i) { union { float f; int i; } x; x.i = i; return x.f; } static void gen3_update_vertex_buffer_addr(struct kgem *kgem, uint32_t offset) { uint32_t handle; struct kgem_bo *bo = NULL; void *base, *ptr; int i; offset *= sizeof(uint32_t); for (i = 0; i < kgem->nreloc; i++) if (kgem->reloc[i].offset == offset) break; assert(i < kgem->nreloc); handle = kgem->reloc[i].target_handle; if (handle == 0) { base = kgem->batch; } else { list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->handle == handle) break; assert(&bo->request != &kgem->next_request->buffers); base = kgem_bo_map__debug(kgem, bo); } ptr = (char *)base + kgem->reloc[i].delta; state.vb.current = bo; state.vb.base = base; state.vb.ptr = ptr; } static void gen3_update_vertex_buffer_pitch(struct kgem *kgem, uint32_t offset) { state.vb.pitch = kgem->batch[offset] >> 16 & 0x3f; state.vb.pitch *= sizeof(uint32_t); } static void gen3_update_vertex_elements(struct kgem *kgem, uint32_t data) { state.ve[1].valid = 1; switch ((data >> 6) & 7) { case 1: state.ve[1].type = T_FLOAT32; state.ve[1].size = 3; state.ve[1].swizzle[0] = 1; state.ve[1].swizzle[1] = 1; state.ve[1].swizzle[2] = 1; state.ve[1].swizzle[3] = 3; break; case 2: state.ve[1].type = T_FLOAT32; state.ve[1].size = 4; state.ve[1].swizzle[0] = 1; state.ve[1].swizzle[1] = 1; state.ve[1].swizzle[2] = 1; state.ve[1].swizzle[3] = 1; break; case 3: state.ve[1].type = T_FLOAT32; state.ve[1].size = 2; state.ve[1].swizzle[0] = 1; state.ve[1].swizzle[1] = 1; state.ve[1].swizzle[2] = 2; state.ve[1].swizzle[3] = 3; break; case 4: state.ve[1].type = T_FLOAT32; state.ve[1].size = 3; state.ve[1].swizzle[0] = 1; state.ve[1].swizzle[1] = 1; state.ve[1].swizzle[2] = 3; state.ve[1].swizzle[3] = 1; break; } state.ve[2].valid = 0; state.ve[3].valid = 0; } static void gen3_update_vertex_texcoords(struct kgem *kgem, uint32_t data) { int id; for (id = 0; id < 8; id++) { uint32_t fmt = (data >> (id*4)) & 0xf; int width; state.ve[id+4].valid = fmt != 0xf; width = 0; switch (fmt) { case 0: state.ve[id+4].type = T_FLOAT32; width = state.ve[id+4].size = 2; break; case 1: state.ve[id+4].type = T_FLOAT32; width = state.ve[id+4].size = 3; break; case 2: state.ve[id+4].type = T_FLOAT32; width = state.ve[id+4].size = 4; break; case 3: state.ve[id+4].type = T_FLOAT32; width = state.ve[id+4].size = 1; break; case 4: state.ve[id+4].type = T_FLOAT16; width = state.ve[id+4].size = 2; break; case 5: state.ve[id+4].type = T_FLOAT16; width = state.ve[id+4].size = 4; break; } state.ve[id+4].swizzle[0] = width > 0 ? 1 : 2; state.ve[id+4].swizzle[1] = width > 1 ? 1 : 2; state.ve[id+4].swizzle[2] = width > 2 ? 1 : 2; state.ve[id+4].swizzle[3] = width > 3 ? 1 : 2; } } static void gen3_update_vertex_elements_offsets(struct kgem *kgem) { int i, offset; for (i = offset = 0; i < ARRAY_SIZE(state.ve); i++) { if (!state.ve[i].valid) continue; state.ve[i].offset = offset; offset += 4 * state.ve[i].size; state.num_ve = i; } } static void vertices_float32_out(const struct vertex_elements *ve, const float *f, int max) { int c; ErrorF("("); for (c = 0; c < max; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("%f", f[c]); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < max-1) ErrorF(", "); } ErrorF(")"); } static void ve_out(const struct vertex_elements *ve, const void *ptr) { switch (ve->type) { case T_FLOAT32: vertices_float32_out(ve, ptr, ve->size); break; case T_FLOAT16: //vertices_float16_out(ve, ptr, ve->size); break; } } static void indirect_vertex_out(struct kgem *kgem, uint32_t v) { const struct vertex_buffer *vb = &state.vb; int i = 1; do { const struct vertex_elements *ve = &state.ve[i]; const void *ptr = vb->ptr + v * vb->pitch + ve->offset; if (!ve->valid) continue; ve_out(ve, ptr); while (++i <= state.num_ve && !state.ve[i].valid) ; if (i <= state.num_ve) ErrorF(", "); } while (i <= state.num_ve); } static int inline_vertex_out(struct kgem *kgem, void *base) { const struct vertex_buffer *vb = &state.vb; int i = 1; do { const struct vertex_elements *ve = &state.ve[i]; const void *ptr = (char *)base + ve->offset; if (!ve->valid) continue; ve_out(ve, ptr); while (++i <= state.num_ve && !state.ve[i].valid) ; if (i <= state.num_ve) ErrorF(", "); } while (i <= state.num_ve); return vb->pitch; } static int gen3_decode_3d_1c(struct kgem *kgem, uint32_t offset) { uint32_t *data = kgem->batch + offset; uint32_t opcode; opcode = (data[0] & 0x00f80000) >> 19; switch (opcode) { case 0x11: kgem_debug_print(data, offset, 0, "3DSTATE_DEPTH_SUBRECTANGLE_DISABLE\n"); return 1; case 0x10: kgem_debug_print(data, offset, 0, "3DSTATE_SCISSOR_ENABLE %s\n", data[0]&1?"enabled":"disabled"); return 1; case 0x01: kgem_debug_print(data, offset, 0, "3DSTATE_MAP_COORD_SET_I830\n"); return 1; case 0x0a: kgem_debug_print(data, offset, 0, "3DSTATE_MAP_CUBE_I830\n"); return 1; case 0x05: kgem_debug_print(data, offset, 0, "3DSTATE_MAP_TEX_STREAM_I830\n"); return 1; } kgem_debug_print(data, offset, 0, "3D UNKNOWN: 3d_1c opcode = 0x%x\n", opcode); assert(0); return 1; } /** Sets the string dstname to describe the destination of the PS instruction */ static void gen3_get_instruction_dst(uint32_t *data, int i, char *dstname, int do_mask) { uint32_t a0 = data[i]; int dst_nr = (a0 >> 14) & 0xf; char dstmask[8]; const char *sat; if (do_mask) { if (((a0 >> 10) & 0xf) == 0xf) { dstmask[0] = 0; } else { int dstmask_index = 0; dstmask[dstmask_index++] = '.'; if (a0 & (1 << 10)) dstmask[dstmask_index++] = 'x'; if (a0 & (1 << 11)) dstmask[dstmask_index++] = 'y'; if (a0 & (1 << 12)) dstmask[dstmask_index++] = 'z'; if (a0 & (1 << 13)) dstmask[dstmask_index++] = 'w'; dstmask[dstmask_index++] = 0; } if (a0 & (1 << 22)) sat = ".sat"; else sat = ""; } else { dstmask[0] = 0; sat = ""; } switch ((a0 >> 19) & 0x7) { case 0: assert(dst_nr <= 15); sprintf(dstname, "R%d%s%s", dst_nr, dstmask, sat); break; case 4: assert(dst_nr == 0); sprintf(dstname, "oC%s%s", dstmask, sat); break; case 5: assert(dst_nr == 0); sprintf(dstname, "oD%s%s", dstmask, sat); break; case 6: assert(dst_nr <= 3); sprintf(dstname, "U%d%s%s", dst_nr, dstmask, sat); break; default: sprintf(dstname, "RESERVED"); break; } } static const char * gen3_get_channel_swizzle(uint32_t select) { switch (select & 0x7) { case 0: return (select & 8) ? "-x" : "x"; case 1: return (select & 8) ? "-y" : "y"; case 2: return (select & 8) ? "-z" : "z"; case 3: return (select & 8) ? "-w" : "w"; case 4: return (select & 8) ? "-0" : "0"; case 5: return (select & 8) ? "-1" : "1"; default: return (select & 8) ? "-bad" : "bad"; } } static void gen3_get_instruction_src_name(uint32_t src_type, uint32_t src_nr, char *name) { switch (src_type) { case 0: sprintf(name, "R%d", src_nr); assert(src_nr <= 15); break; case 1: if (src_nr < 8) sprintf(name, "T%d", src_nr); else if (src_nr == 8) sprintf(name, "DIFFUSE"); else if (src_nr == 9) sprintf(name, "SPECULAR"); else if (src_nr == 10) sprintf(name, "FOG"); else { assert(0); sprintf(name, "RESERVED"); } break; case 2: sprintf(name, "C%d", src_nr); assert(src_nr <= 31); break; case 4: sprintf(name, "oC"); assert(src_nr == 0); break; case 5: sprintf(name, "oD"); assert(src_nr == 0); break; case 6: sprintf(name, "U%d", src_nr); assert(src_nr <= 3); break; default: sprintf(name, "RESERVED"); assert(0); break; } } static void gen3_get_instruction_src0(uint32_t *data, int i, char *srcname) { uint32_t a0 = data[i]; uint32_t a1 = data[i + 1]; int src_nr = (a0 >> 2) & 0x1f; const char *swizzle_x = gen3_get_channel_swizzle((a1 >> 28) & 0xf); const char *swizzle_y = gen3_get_channel_swizzle((a1 >> 24) & 0xf); const char *swizzle_z = gen3_get_channel_swizzle((a1 >> 20) & 0xf); const char *swizzle_w = gen3_get_channel_swizzle((a1 >> 16) & 0xf); char swizzle[100]; gen3_get_instruction_src_name((a0 >> 7) & 0x7, src_nr, srcname); sprintf(swizzle, ".%s%s%s%s", swizzle_x, swizzle_y, swizzle_z, swizzle_w); if (strcmp(swizzle, ".xyzw") != 0) strcat(srcname, swizzle); } static void gen3_get_instruction_src1(uint32_t *data, int i, char *srcname) { uint32_t a1 = data[i + 1]; uint32_t a2 = data[i + 2]; int src_nr = (a1 >> 8) & 0x1f; const char *swizzle_x = gen3_get_channel_swizzle((a1 >> 4) & 0xf); const char *swizzle_y = gen3_get_channel_swizzle((a1 >> 0) & 0xf); const char *swizzle_z = gen3_get_channel_swizzle((a2 >> 28) & 0xf); const char *swizzle_w = gen3_get_channel_swizzle((a2 >> 24) & 0xf); char swizzle[100]; gen3_get_instruction_src_name((a1 >> 13) & 0x7, src_nr, srcname); sprintf(swizzle, ".%s%s%s%s", swizzle_x, swizzle_y, swizzle_z, swizzle_w); if (strcmp(swizzle, ".xyzw") != 0) strcat(srcname, swizzle); } static void gen3_get_instruction_src2(uint32_t *data, int i, char *srcname) { uint32_t a2 = data[i + 2]; int src_nr = (a2 >> 16) & 0x1f; const char *swizzle_x = gen3_get_channel_swizzle((a2 >> 12) & 0xf); const char *swizzle_y = gen3_get_channel_swizzle((a2 >> 8) & 0xf); const char *swizzle_z = gen3_get_channel_swizzle((a2 >> 4) & 0xf); const char *swizzle_w = gen3_get_channel_swizzle((a2 >> 0) & 0xf); char swizzle[100]; gen3_get_instruction_src_name((a2 >> 21) & 0x7, src_nr, srcname); sprintf(swizzle, ".%s%s%s%s", swizzle_x, swizzle_y, swizzle_z, swizzle_w); if (strcmp(swizzle, ".xyzw") != 0) strcat(srcname, swizzle); } static void gen3_get_instruction_addr(uint32_t src_type, uint32_t src_nr, char *name) { switch (src_type) { case 0: sprintf(name, "R%d", src_nr); assert(src_nr <= 15); break; case 1: if (src_nr < 8) sprintf(name, "T%d", src_nr); else if (src_nr == 8) sprintf(name, "DIFFUSE"); else if (src_nr == 9) sprintf(name, "SPECULAR"); else if (src_nr == 10) sprintf(name, "FOG"); else { assert(0); sprintf(name, "RESERVED"); } break; case 4: sprintf(name, "oC"); assert(src_nr == 0); break; case 5: sprintf(name, "oD"); assert(src_nr == 0); break; default: assert(0); sprintf(name, "RESERVED"); break; } } static void gen3_decode_alu1(uint32_t *data, uint32_t offset, int i, char *instr_prefix, const char *op_name) { char dst[100], src0[100]; gen3_get_instruction_dst(data, i, dst, 1); gen3_get_instruction_src0(data, i, src0); kgem_debug_print(data, offset, i++, "%s: %s %s, %s\n", instr_prefix, op_name, dst, src0); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); } static void gen3_decode_alu2(uint32_t *data, uint32_t offset, int i, char *instr_prefix, const char *op_name) { char dst[100], src0[100], src1[100]; gen3_get_instruction_dst(data, i, dst, 1); gen3_get_instruction_src0(data, i, src0); gen3_get_instruction_src1(data, i, src1); kgem_debug_print(data, offset, i++, "%s: %s %s, %s, %s\n", instr_prefix, op_name, dst, src0, src1); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); } static void gen3_decode_alu3(uint32_t *data, uint32_t offset, int i, char *instr_prefix, const char *op_name) { char dst[100], src0[100], src1[100], src2[100]; gen3_get_instruction_dst(data, i, dst, 1); gen3_get_instruction_src0(data, i, src0); gen3_get_instruction_src1(data, i, src1); gen3_get_instruction_src2(data, i, src2); kgem_debug_print(data, offset, i++, "%s: %s %s, %s, %s, %s\n", instr_prefix, op_name, dst, src0, src1, src2); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); } static void gen3_decode_tex(uint32_t *data, uint32_t offset, int i, char *instr_prefix, const char *tex_name) { uint32_t t0 = data[i]; uint32_t t1 = data[i + 1]; char dst_name[100]; char addr_name[100]; int sampler_nr; gen3_get_instruction_dst(data, i, dst_name, 0); gen3_get_instruction_addr((t1 >> 24) & 0x7, (t1 >> 17) & 0xf, addr_name); sampler_nr = t0 & 0xf; kgem_debug_print(data, offset, i++, "%s: %s %s, S%d, %s\n", instr_prefix, tex_name, dst_name, sampler_nr, addr_name); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); } static void gen3_decode_dcl(uint32_t *data, uint32_t offset, int i, char *instr_prefix) { uint32_t d0 = data[i]; const char *sampletype; int dcl_nr = (d0 >> 14) & 0xf; const char *dcl_x = d0 & (1 << 10) ? "x" : ""; const char *dcl_y = d0 & (1 << 11) ? "y" : ""; const char *dcl_z = d0 & (1 << 12) ? "z" : ""; const char *dcl_w = d0 & (1 << 13) ? "w" : ""; char dcl_mask[10]; switch ((d0 >> 19) & 0x3) { case 1: sprintf(dcl_mask, ".%s%s%s%s", dcl_x, dcl_y, dcl_z, dcl_w); assert (strcmp(dcl_mask, ".")); assert(dcl_nr <= 10); if (dcl_nr < 8) { if (strcmp(dcl_mask, ".x") != 0 && strcmp(dcl_mask, ".xy") != 0 && strcmp(dcl_mask, ".xz") != 0 && strcmp(dcl_mask, ".w") != 0 && strcmp(dcl_mask, ".xyzw") != 0) { assert(0); } kgem_debug_print(data, offset, i++, "%s: DCL T%d%s\n", instr_prefix, dcl_nr, dcl_mask); } else { if (strcmp(dcl_mask, ".xz") == 0) assert(0); else if (strcmp(dcl_mask, ".xw") == 0) assert(0); else if (strcmp(dcl_mask, ".xzw") == 0) assert(0); if (dcl_nr == 8) { kgem_debug_print(data, offset, i++, "%s: DCL DIFFUSE%s\n", instr_prefix, dcl_mask); } else if (dcl_nr == 9) { kgem_debug_print(data, offset, i++, "%s: DCL SPECULAR%s\n", instr_prefix, dcl_mask); } else if (dcl_nr == 10) { kgem_debug_print(data, offset, i++, "%s: DCL FOG%s\n", instr_prefix, dcl_mask); } } kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); break; case 3: switch ((d0 >> 22) & 0x3) { case 0: sampletype = "2D"; break; case 1: sampletype = "CUBE"; break; case 2: sampletype = "3D"; break; default: sampletype = "RESERVED"; break; } assert(dcl_nr <= 15); kgem_debug_print(data, offset, i++, "%s: DCL S%d %s\n", instr_prefix, dcl_nr, sampletype); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); break; default: kgem_debug_print(data, offset, i++, "%s: DCL RESERVED%d\n", instr_prefix, dcl_nr); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); } } static void gen3_decode_instruction(uint32_t *data, uint32_t offset, int i, char *instr_prefix) { switch ((data[i] >> 24) & 0x1f) { case 0x0: kgem_debug_print(data, offset, i++, "%s: NOP\n", instr_prefix); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); break; case 0x01: gen3_decode_alu2(data, offset, i, instr_prefix, "ADD"); break; case 0x02: gen3_decode_alu1(data, offset, i, instr_prefix, "MOV"); break; case 0x03: gen3_decode_alu2(data, offset, i, instr_prefix, "MUL"); break; case 0x04: gen3_decode_alu3(data, offset, i, instr_prefix, "MAD"); break; case 0x05: gen3_decode_alu3(data, offset, i, instr_prefix, "DP2ADD"); break; case 0x06: gen3_decode_alu2(data, offset, i, instr_prefix, "DP3"); break; case 0x07: gen3_decode_alu2(data, offset, i, instr_prefix, "DP4"); break; case 0x08: gen3_decode_alu1(data, offset, i, instr_prefix, "FRC"); break; case 0x09: gen3_decode_alu1(data, offset, i, instr_prefix, "RCP"); break; case 0x0a: gen3_decode_alu1(data, offset, i, instr_prefix, "RSQ"); break; case 0x0b: gen3_decode_alu1(data, offset, i, instr_prefix, "EXP"); break; case 0x0c: gen3_decode_alu1(data, offset, i, instr_prefix, "LOG"); break; case 0x0d: gen3_decode_alu2(data, offset, i, instr_prefix, "CMP"); break; case 0x0e: gen3_decode_alu2(data, offset, i, instr_prefix, "MIN"); break; case 0x0f: gen3_decode_alu2(data, offset, i, instr_prefix, "MAX"); break; case 0x10: gen3_decode_alu1(data, offset, i, instr_prefix, "FLR"); break; case 0x11: gen3_decode_alu1(data, offset, i, instr_prefix, "MOD"); break; case 0x12: gen3_decode_alu1(data, offset, i, instr_prefix, "TRC"); break; case 0x13: gen3_decode_alu2(data, offset, i, instr_prefix, "SGE"); break; case 0x14: gen3_decode_alu2(data, offset, i, instr_prefix, "SLT"); break; case 0x15: gen3_decode_tex(data, offset, i, instr_prefix, "TEXLD"); break; case 0x16: gen3_decode_tex(data, offset, i, instr_prefix, "TEXLDP"); break; case 0x17: gen3_decode_tex(data, offset, i, instr_prefix, "TEXLDB"); break; case 0x19: gen3_decode_dcl(data, offset, i, instr_prefix); break; default: kgem_debug_print(data, offset, i++, "%s: unknown\n", instr_prefix); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); kgem_debug_print(data, offset, i++, "%s\n", instr_prefix); break; } } static const char * gen3_decode_compare_func(uint32_t op) { switch (op&0x7) { case 0: return "always"; case 1: return "never"; case 2: return "less"; case 3: return "equal"; case 4: return "lequal"; case 5: return "greater"; case 6: return "notequal"; case 7: return "gequal"; } return ""; } static const char * gen3_decode_stencil_op(uint32_t op) { switch (op&0x7) { case 0: return "keep"; case 1: return "zero"; case 2: return "replace"; case 3: return "incr_sat"; case 4: return "decr_sat"; case 5: return "greater"; case 6: return "incr"; case 7: return "decr"; } return ""; } #if 0 /* part of MODES_4 */ static const char * gen3_decode_logic_op(uint32_t op) { switch (op&0xf) { case 0: return "clear"; case 1: return "nor"; case 2: return "and_inv"; case 3: return "copy_inv"; case 4: return "and_rvrse"; case 5: return "inv"; case 6: return "xor"; case 7: return "nand"; case 8: return "and"; case 9: return "equiv"; case 10: return "noop"; case 11: return "or_inv"; case 12: return "copy"; case 13: return "or_rvrse"; case 14: return "or"; case 15: return "set"; } return ""; } #endif static const char * gen3_decode_blend_fact(uint32_t op) { switch (op&0xf) { case 1: return "zero"; case 2: return "one"; case 3: return "src_colr"; case 4: return "inv_src_colr"; case 5: return "src_alpha"; case 6: return "inv_src_alpha"; case 7: return "dst_alpha"; case 8: return "inv_dst_alpha"; case 9: return "dst_colr"; case 10: return "inv_dst_colr"; case 11: return "src_alpha_sat"; case 12: return "cnst_colr"; case 13: return "inv_cnst_colr"; case 14: return "cnst_alpha"; case 15: return "inv_const_alpha"; } return ""; } static const char * decode_tex_coord_mode(uint32_t mode) { switch (mode&0x7) { case 0: return "wrap"; case 1: return "mirror"; case 2: return "clamp_edge"; case 3: return "cube"; case 4: return "clamp_border"; case 5: return "mirror_once"; } return ""; } static const char * gen3_decode_sample_filter(uint32_t mode) { switch (mode&0x7) { case 0: return "nearest"; case 1: return "linear"; case 2: return "anisotropic"; case 3: return "4x4_1"; case 4: return "4x4_2"; case 5: return "4x4_flat"; case 6: return "6x5_mono"; } return ""; } static int gen3_decode_load_state_immediate_1(struct kgem *kgem, uint32_t offset) { const uint32_t *data = kgem->batch + offset; int len, i, word; kgem_debug_print(data, offset, 0, "3DSTATE_LOAD_STATE_IMMEDIATE_1\n"); len = (data[0] & 0x0000000f) + 2; i = 1; for (word = 0; word <= 8; word++) { if (data[0] & (1 << (4 + word))) { switch (word) { case 0: kgem_debug_print(data, offset, i, "S0: vbo offset: 0x%08x%s\n", data[i]&(~1),data[i]&1?", auto cache invalidate disabled":""); gen3_update_vertex_buffer_addr(kgem, offset + i); break; case 1: kgem_debug_print(data, offset, i, "S1: vertex width: %i, vertex pitch: %i\n", (data[i]>>24)&0x3f,(data[i]>>16)&0x3f); gen3_update_vertex_buffer_pitch(kgem, offset + i); break; case 2: { char buf[200]; int len = 0; int tex_num; for (tex_num = 0; tex_num < 8; tex_num++) { switch((data[i]>>tex_num*4)&0xf) { case 0: len += sprintf(buf + len, "%i=2D ", tex_num); break; case 1: len += sprintf(buf + len, "%i=3D ", tex_num); break; case 2: len += sprintf(buf + len, "%i=4D ", tex_num); break; case 3: len += sprintf(buf + len, "%i=1D ", tex_num); break; case 4: len += sprintf(buf + len, "%i=2D_16 ", tex_num); break; case 5: len += sprintf(buf + len, "%i=4D_16 ", tex_num); break; case 0xf: len += sprintf(buf + len, "%i=NP ", tex_num); break; } } kgem_debug_print(data, offset, i, "S2: texcoord formats: %s\n", buf); gen3_update_vertex_texcoords(kgem, data[i]); } break; case 3: kgem_debug_print(data, offset, i, "S3: not documented\n"); break; case 4: { const char *cullmode = ""; const char *vfmt_xyzw = ""; switch((data[i]>>13)&0x3) { case 0: cullmode = "both"; break; case 1: cullmode = "none"; break; case 2: cullmode = "cw"; break; case 3: cullmode = "ccw"; break; } switch(data[i] & (7<<6 | 1<<2)) { case 1<<6: vfmt_xyzw = "XYZ,"; break; case 2<<6: vfmt_xyzw = "XYZW,"; break; case 3<<6: vfmt_xyzw = "XY,"; break; case 4<<6: vfmt_xyzw = "XYW,"; break; case 1<<6 | 1<<2: vfmt_xyzw = "XYZF,"; break; case 2<<6 | 1<<2: vfmt_xyzw = "XYZWF,"; break; case 3<<6 | 1<<2: vfmt_xyzw = "XYF,"; break; case 4<<6 | 1<<2: vfmt_xyzw = "XYWF,"; break; } kgem_debug_print(data, offset, i, "S4: point_width=%i, line_width=%.1f," "%s%s%s%s%s cullmode=%s, vfmt=%s%s%s%s%s%s%s%s " "%s%s%s\n", (data[i]>>23)&0x1ff, ((data[i]>>19)&0xf) / 2.0, data[i]&(0xf<<15)?" flatshade=":"", data[i]&(1<<18)?"Alpha,":"", data[i]&(1<<17)?"Fog,":"", data[i]&(1<<16)?"Specular,":"", data[i]&(1<<15)?"Color,":"", cullmode, data[i]&(1<<12)?"PointWidth,":"", data[i]&(1<<11)?"SpecFog,":"", data[i]&(1<<10)?"Color,":"", data[i]&(1<<9)?"DepthOfs,":"", vfmt_xyzw, data[i]&(1<<9)?"FogParam,":"", data[i]&(1<<5)?"force default diffuse, ":"", data[i]&(1<<4)?"force default specular, ":"", data[i]&(1<<3)?"local depth ofs enable, ":"", data[i]&(1<<1)?"point sprite enable, ":"", data[i]&(1<<0)?"line AA enable, ":""); gen3_update_vertex_elements(kgem, data[i]); break; } case 5: { kgem_debug_print(data, offset, i, "S5:%s%s%s%s%s" "%s%s%s%s stencil_ref=0x%x, stencil_test=%s, " "stencil_fail=%s, stencil_pass_z_fail=%s, " "stencil_pass_z_pass=%s, %s%s%s%s\n", data[i]&(0xf<<28)?" write_disable=":"", data[i]&(1<<31)?"Alpha,":"", data[i]&(1<<30)?"Red,":"", data[i]&(1<<29)?"Green,":"", data[i]&(1<<28)?"Blue,":"", data[i]&(1<<27)?" force default point size,":"", data[i]&(1<<26)?" last pixel enable,":"", data[i]&(1<<25)?" global depth ofs enable,":"", data[i]&(1<<24)?" fog enable,":"", (data[i]>>16)&0xff, gen3_decode_compare_func(data[i]>>13), gen3_decode_stencil_op(data[i]>>10), gen3_decode_stencil_op(data[i]>>7), gen3_decode_stencil_op(data[i]>>4), data[i]&(1<<3)?"stencil write enable, ":"", data[i]&(1<<2)?"stencil test enable, ":"", data[i]&(1<<1)?"color dither enable, ":"", data[i]&(1<<0)?"logicop enable, ":""); } break; case 6: kgem_debug_print(data, offset, i, "S6: %salpha_test=%s, alpha_ref=0x%x, " "depth_test=%s, %ssrc_blnd_fct=%s, dst_blnd_fct=%s, " "%s%stristrip_provoking_vertex=%i\n", data[i]&(1<<31)?"alpha test enable, ":"", gen3_decode_compare_func(data[i]>>28), data[i]&(0xff<<20), gen3_decode_compare_func(data[i]>>16), data[i]&(1<<15)?"cbuf blend enable, ":"", gen3_decode_blend_fact(data[i]>>8), gen3_decode_blend_fact(data[i]>>4), data[i]&(1<<3)?"depth write enable, ":"", data[i]&(1<<2)?"cbuf write enable, ":"", data[i]&(0x3)); break; case 7: kgem_debug_print(data, offset, i, "S7: depth offset constant: 0x%08x\n", data[i]); break; } i++; } } assert(len == i); return len; } static int gen3_decode_3d_1d(struct kgem *kgem, uint32_t offset) { uint32_t *data = kgem->batch + offset; unsigned int len, i, c, idx, word, map, sampler, instr; const char *format, *zformat, *type; uint32_t opcode; static const struct { uint32_t opcode; int min_len; int max_len; const char *name; } opcodes_3d_1d[] = { { 0x86, 4, 4, "3DSTATE_CHROMA_KEY" }, { 0x88, 2, 2, "3DSTATE_CONSTANT_BLEND_COLOR" }, { 0x99, 2, 2, "3DSTATE_DEFAULT_DIFFUSE" }, { 0x9a, 2, 2, "3DSTATE_DEFAULT_SPECULAR" }, { 0x98, 2, 2, "3DSTATE_DEFAULT_Z" }, { 0x97, 2, 2, "3DSTATE_DEPTH_OFFSET_SCALE" }, { 0x9d, 65, 65, "3DSTATE_FILTER_COEFFICIENTS_4X4" }, { 0x9e, 4, 4, "3DSTATE_MONO_FILTER" }, { 0x89, 4, 4, "3DSTATE_FOG_MODE" }, { 0x8f, 2, 16, "3DSTATE_MAP_PALLETE_LOAD_32" }, { 0x83, 2, 2, "3DSTATE_SPAN_STIPPLE" }, }, *opcode_3d_1d; opcode = (data[0] & 0x00ff0000) >> 16; switch (opcode) { case 0x07: /* This instruction is unusual. A 0 length means just 1 DWORD instead of * 2. The 0 length is specified in one place to be unsupported, but * stated to be required in another, and 0 length LOAD_INDIRECTs appear * to cause no harm at least. */ kgem_debug_print(data, offset, 0, "3DSTATE_LOAD_INDIRECT\n"); len = (data[0] & 0x000000ff) + 1; i = 1; if (data[0] & (0x01 << 8)) { kgem_debug_print(data, offset, i++, "SIS.0\n"); kgem_debug_print(data, offset, i++, "SIS.1\n"); } if (data[0] & (0x02 << 8)) { kgem_debug_print(data, offset, i++, "DIS.0\n"); } if (data[0] & (0x04 << 8)) { kgem_debug_print(data, offset, i++, "SSB.0\n"); kgem_debug_print(data, offset, i++, "SSB.1\n"); } if (data[0] & (0x08 << 8)) { kgem_debug_print(data, offset, i++, "MSB.0\n"); kgem_debug_print(data, offset, i++, "MSB.1\n"); } if (data[0] & (0x10 << 8)) { kgem_debug_print(data, offset, i++, "PSP.0\n"); kgem_debug_print(data, offset, i++, "PSP.1\n"); } if (data[0] & (0x20 << 8)) { kgem_debug_print(data, offset, i++, "PSC.0\n"); kgem_debug_print(data, offset, i++, "PSC.1\n"); } assert(len == i); return len; case 0x04: return gen3_decode_load_state_immediate_1(kgem, offset); case 0x03: kgem_debug_print(data, offset, 0, "3DSTATE_LOAD_STATE_IMMEDIATE_2\n"); len = (data[0] & 0x0000000f) + 2; i = 1; for (word = 6; word <= 14; word++) { if (data[0] & (1 << word)) { if (word == 6) kgem_debug_print(data, offset, i++, "TBCF\n"); else if (word >= 7 && word <= 10) { kgem_debug_print(data, offset, i++, "TB%dC\n", word - 7); kgem_debug_print(data, offset, i++, "TB%dA\n", word - 7); } else if (word >= 11 && word <= 14) { kgem_debug_print(data, offset, i, "TM%dS0: offset=0x%08x, %s\n", word - 11, data[i]&0xfffffffe, data[i]&1?"use fence":""); i++; kgem_debug_print(data, offset, i, "TM%dS1: height=%i, width=%i, %s\n", word - 11, data[i]>>21, (data[i]>>10)&0x3ff, data[i]&2?(data[i]&1?"y-tiled":"x-tiled"):""); i++; kgem_debug_print(data, offset, i, "TM%dS2: pitch=%i, \n", word - 11, ((data[i]>>21) + 1)*4); i++; kgem_debug_print(data, offset, i++, "TM%dS3\n", word - 11); kgem_debug_print(data, offset, i++, "TM%dS4: dflt color\n", word - 11); } } } assert(len == i); return len; case 0x00: kgem_debug_print(data, offset, 0, "3DSTATE_MAP_STATE\n"); len = (data[0] & 0x0000003f) + 2; kgem_debug_print(data, offset, 1, "mask\n"); i = 2; for (map = 0; map <= 15; map++) { if (data[1] & (1 << map)) { int width, height, pitch, dword; struct drm_i915_gem_relocation_entry *reloc; const char *tiling; reloc = kgem_debug_get_reloc_entry(kgem, &data[i] - kgem->batch); assert(reloc->target_handle); dword = data[i]; kgem_debug_print(data, offset, i++, "map %d MS2 %s%s%s, handle=%d\n", map, dword&(1<<31)?"untrusted surface, ":"", dword&(1<<1)?"vertical line stride enable, ":"", dword&(1<<0)?"vertical ofs enable, ":"", reloc->target_handle); dword = data[i]; width = ((dword >> 10) & ((1 << 11) - 1))+1; height = ((dword >> 21) & ((1 << 11) - 1))+1; tiling = "none"; if (dword & (1 << 2)) tiling = "fenced"; else if (dword & (1 << 1)) tiling = dword & (1 << 0) ? "Y" : "X"; type = " BAD"; format = " (invalid)"; switch ((dword>>7) & 0x7) { case 1: type = "8"; switch ((dword>>3) & 0xf) { case 0: format = "I"; break; case 1: format = "L"; break; case 4: format = "A"; break; case 5: format = " mono"; break; } break; case 2: type = "16"; switch ((dword>>3) & 0xf) { case 0: format = " rgb565"; break; case 1: format = " argb1555"; break; case 2: format = " argb4444"; break; case 3: format = " ay88"; break; case 5: format = " 88dvdu"; break; case 6: format = " bump655"; break; case 7: format = "I"; break; case 8: format = "L"; break; case 9: format = "A"; break; } break; case 3: type = "32"; switch ((dword>>3) & 0xf) { case 0: format = " argb8888"; break; case 1: format = " abgr8888"; break; case 2: format = " xrgb8888"; break; case 3: format = " xbgr8888"; break; case 4: format = " qwvu8888"; break; case 5: format = " axvu8888"; break; case 6: format = " lxvu8888"; break; case 7: format = " xlvu8888"; break; case 8: format = " argb2101010"; break; case 9: format = " abgr2101010"; break; case 10: format = " awvu2101010"; break; case 11: format = " gr1616"; break; case 12: format = " vu1616"; break; case 13: format = " xI824"; break; case 14: format = " xA824"; break; case 15: format = " xL824"; break; } break; case 5: type = "422"; switch ((dword>>3) & 0xf) { case 0: format = " yuv_swapy"; break; case 1: format = " yuv"; break; case 2: format = " yuv_swapuv"; break; case 3: format = " yuv_swapuvy"; break; } break; case 6: type = "compressed"; switch ((dword>>3) & 0x7) { case 0: format = " dxt1"; break; case 1: format = " dxt2_3"; break; case 2: format = " dxt4_5"; break; case 3: format = " fxt1"; break; case 4: format = " dxt1_rb"; break; } break; case 7: type = "4b indexed"; switch ((dword>>3) & 0xf) { case 7: format = " argb8888"; break; } break; default: format = "BAD"; break; } dword = data[i]; kgem_debug_print(data, offset, i++, "map %d MS3 [width=%d, height=%d, format=%s%s, tiling=%s%s]\n", map, width, height, type, format, tiling, dword&(1<<9)?" palette select":""); dword = data[i]; pitch = 4*(((dword >> 21) & ((1 << 11) - 1))+1); kgem_debug_print(data, offset, i++, "map %d MS4 [pitch=%d, max_lod=%i, vol_depth=%i, cube_face_ena=%x, %s]\n", map, pitch, (dword>>9)&0x3f, dword&0xff, (dword>>15)&0x3f, dword&(1<<8)?"miplayout legacy":"miplayout right"); } } assert(len == i); return len; case 0x06: kgem_debug_print(data, offset, 0, "3DSTATE_PIXEL_SHADER_CONSTANTS\n"); len = (data[0] & 0x000000ff) + 2; i = 2; for (c = 0; c <= 31; c++) { if (data[1] & (1 << c)) { kgem_debug_print(data, offset, i, "C%d.X = %f\n", c, int_as_float(data[i])); i++; kgem_debug_print(data, offset, i, "C%d.Y = %f\n", c, int_as_float(data[i])); i++; kgem_debug_print(data, offset, i, "C%d.Z = %f\n", c, int_as_float(data[i])); i++; kgem_debug_print(data, offset, i, "C%d.W = %f\n", c, int_as_float(data[i])); i++; } } assert(len == i); return len; case 0x05: kgem_debug_print(data, offset, 0, "3DSTATE_PIXEL_SHADER_PROGRAM\n"); len = (data[0] & 0x000000ff) + 2; assert(((len-1) % 3) == 0); assert(len <= 370); i = 1; for (instr = 0; instr < (len - 1) / 3; instr++) { char instr_prefix[10]; sprintf(instr_prefix, "PS%03d", instr); gen3_decode_instruction(data, offset, i, instr_prefix); i += 3; } return len; case 0x01: kgem_debug_print(data, offset, 0, "3DSTATE_SAMPLER_STATE\n"); kgem_debug_print(data, offset, 1, "mask\n"); len = (data[0] & 0x0000003f) + 2; i = 2; for (sampler = 0; sampler <= 15; sampler++) { if (data[1] & (1 << sampler)) { uint32_t dword; const char *mip_filter = ""; dword = data[i]; switch ((dword>>20)&0x3) { case 0: mip_filter = "none"; break; case 1: mip_filter = "nearest"; break; case 3: mip_filter = "linear"; break; } kgem_debug_print(data, offset, i++, "sampler %d SS2:%s%s%s " "base_mip_level=%i, mip_filter=%s, mag_filter=%s, min_filter=%s " "lod_bias=%.2f,%s max_aniso=%i, shadow_func=%s\n", sampler, dword&(1<<31)?" reverse gamma,":"", dword&(1<<30)?" packed2planar,":"", dword&(1<<29)?" colorspace conversion,":"", (dword>>22)&0x1f, mip_filter, gen3_decode_sample_filter(dword>>17), gen3_decode_sample_filter(dword>>14), ((dword>>5)&0x1ff)/(0x10*1.0), dword&(1<<4)?" shadow,":"", dword&(1<<3)?4:2, gen3_decode_compare_func(dword)); dword = data[i]; kgem_debug_print(data, offset, i++, "sampler %d SS3: min_lod=%.2f,%s " "tcmode_x=%s, tcmode_y=%s, tcmode_z=%s,%s texmap_idx=%i,%s\n", sampler, ((dword>>24)&0xff)/(0x10*1.0), dword&(1<<17)?" kill pixel enable,":"", decode_tex_coord_mode(dword>>12), decode_tex_coord_mode(dword>>9), decode_tex_coord_mode(dword>>6), dword&(1<<5)?" normalized coords,":"", (dword>>1)&0xf, dword&(1<<0)?" deinterlacer,":""); kgem_debug_print(data, offset, i++, "sampler %d SS4: border color\n", sampler); } } assert(len == i); return len; case 0x85: len = (data[0] & 0x0000000f) + 2; assert(len == 2); kgem_debug_print(data, offset, 0, "3DSTATE_DEST_BUFFER_VARIABLES\n"); switch ((data[1] >> 8) & 0xf) { case 0x0: format = "g8"; break; case 0x1: format = "x1r5g5b5"; break; case 0x2: format = "r5g6b5"; break; case 0x3: format = "a8r8g8b8"; break; case 0x4: format = "ycrcb_swapy"; break; case 0x5: format = "ycrcb_normal"; break; case 0x6: format = "ycrcb_swapuv"; break; case 0x7: format = "ycrcb_swapuvy"; break; case 0x8: format = "a4r4g4b4"; break; case 0x9: format = "a1r5g5b5"; break; case 0xa: format = "a2r10g10b10"; break; default: format = "BAD"; break; } switch ((data[1] >> 2) & 0x3) { case 0x0: zformat = "u16"; break; case 0x1: zformat = "f16"; break; case 0x2: zformat = "u24x8"; break; default: zformat = "BAD"; break; } kgem_debug_print(data, offset, 1, "%s format, %s depth format, early Z %sabled\n", format, zformat, (data[1] & (1 << 31)) ? "en" : "dis"); return len; case 0x8e: { const char *name, *tiling; len = (data[0] & 0x0000000f) + 2; assert(len == 3); switch((data[1] >> 24) & 0x7) { case 0x3: name = "color"; break; case 0x7: name = "depth"; break; default: name = "unknown"; break; } tiling = "none"; if (data[1] & (1 << 23)) tiling = "fenced"; else if (data[1] & (1 << 22)) tiling = data[1] & (1 << 21) ? "Y" : "X"; kgem_debug_print(data, offset, 0, "3DSTATE_BUFFER_INFO\n"); kgem_debug_print(data, offset, 1, "%s, tiling = %s, pitch=%d\n", name, tiling, data[1]&0xffff); kgem_debug_print(data, offset, 2, "address\n"); return len; } case 0x81: len = (data[0] & 0x0000000f) + 2; assert(len == 3); kgem_debug_print(data, offset, 0, "3DSTATE_SCISSOR_RECTANGLE\n"); kgem_debug_print(data, offset, 1, "(%d,%d)\n", data[1] & 0xffff, data[1] >> 16); kgem_debug_print(data, offset, 2, "(%d,%d)\n", data[2] & 0xffff, data[2] >> 16); return len; case 0x80: len = (data[0] & 0x0000000f) + 2; assert(len == 5); kgem_debug_print(data, offset, 0, "3DSTATE_DRAWING_RECTANGLE\n"); kgem_debug_print(data, offset, 1, "%s\n", data[1]&(1<<30)?"depth ofs disabled ":""); kgem_debug_print(data, offset, 2, "(%d,%d)\n", data[2] & 0xffff, data[2] >> 16); kgem_debug_print(data, offset, 3, "(%d,%d)\n", data[3] & 0xffff, data[3] >> 16); kgem_debug_print(data, offset, 4, "(%d,%d)\n", (int16_t)(data[4] & 0xffff), (int16_t)(data[4] >> 16)); return len; case 0x9c: len = (data[0] & 0x0000000f) + 2; assert(len == 7); kgem_debug_print(data, offset, 0, "3DSTATE_CLEAR_PARAMETERS\n"); kgem_debug_print(data, offset, 1, "prim_type=%s, clear=%s%s%s\n", data[1]&(1<<16)?"CLEAR_RECT":"ZONE_INIT", data[1]&(1<<2)?"color,":"", data[1]&(1<<1)?"depth,":"", data[1]&(1<<0)?"stencil,":""); kgem_debug_print(data, offset, 2, "clear color\n"); kgem_debug_print(data, offset, 3, "clear depth/stencil\n"); kgem_debug_print(data, offset, 4, "color value (rgba8888)\n"); kgem_debug_print(data, offset, 5, "depth value %f\n", int_as_float(data[5])); kgem_debug_print(data, offset, 6, "clear stencil\n"); return len; } for (idx = 0; idx < ARRAY_SIZE(opcodes_3d_1d); idx++) { opcode_3d_1d = &opcodes_3d_1d[idx]; if (((data[0] & 0x00ff0000) >> 16) == opcode_3d_1d->opcode) { len = (data[0] & 0xf) + 2; kgem_debug_print(data, offset, 0, "%s\n", opcode_3d_1d->name); for (i = 1; i < len; i++) kgem_debug_print(data, offset, i, "dword %d\n", i); return len; } } kgem_debug_print(data, offset, 0, "3D UNKNOWN: 3d_1d opcode = 0x%x\n", opcode); assert(0); return 1; } #define VERTEX_OUT(fmt, ...) do { \ kgem_debug_print(data, offset, i, " V%d."fmt"\n", vertex, __VA_ARGS__); \ i++; \ } while (0) static int gen3_decode_3d_primitive(struct kgem *kgem, uint32_t offset) { uint32_t *data = kgem->batch + offset; char immediate = (data[0] & (1 << 23)) == 0; unsigned int len, i, ret; const char *primtype; unsigned int vertex = 0; switch ((data[0] >> 18) & 0xf) { case 0x0: primtype = "TRILIST"; break; case 0x1: primtype = "TRISTRIP"; break; case 0x2: primtype = "TRISTRIP_REVERSE"; break; case 0x3: primtype = "TRIFAN"; break; case 0x4: primtype = "POLYGON"; break; case 0x5: primtype = "LINELIST"; break; case 0x6: primtype = "LINESTRIP"; break; case 0x7: primtype = "RECTLIST"; break; case 0x8: primtype = "POINTLIST"; break; case 0x9: primtype = "DIB"; break; case 0xa: primtype = "CLEAR_RECT"; assert(0); break; default: primtype = "unknown"; break; } gen3_update_vertex_elements_offsets(kgem); /* XXX: 3DPRIM_DIB not supported */ if (immediate) { len = (data[0] & 0x0003ffff) + 2; kgem_debug_print(data, offset, 0, "3DPRIMITIVE inline %s\n", primtype); for (i = 1; i < len; ) { ErrorF(" [%d]: ", vertex); i += inline_vertex_out(kgem, data + i) / sizeof(uint32_t); ErrorF("\n"); vertex++; } ret = len; } else { /* indirect vertices */ len = data[0] & 0x0000ffff; /* index count */ if (data[0] & (1 << 17)) { /* random vertex access */ kgem_debug_print(data, offset, 0, "3DPRIMITIVE random indirect %s (%d)\n", primtype, len); assert(0); if (len == 0) { /* vertex indices continue until 0xffff is found */ } else { /* fixed size vertex index buffer */ } ret = (len + 1) / 2 + 1; goto out; } else { /* sequential vertex access */ vertex = data[1] & 0xffff; kgem_debug_print(data, offset, 0, "3DPRIMITIVE sequential indirect %s, %d starting from " "%d\n", primtype, len, vertex); kgem_debug_print(data, offset, 1, " start\n"); for (i = 0; i < len; i++) { ErrorF(" [%d]: ", vertex); indirect_vertex_out(kgem, vertex++); ErrorF("\n"); } ret = 2; goto out; } } out: return ret; } int kgem_gen3_decode_3d(struct kgem *kgem, uint32_t offset) { static const struct { uint32_t opcode; int min_len; int max_len; const char *name; } opcodes[] = { { 0x06, 1, 1, "3DSTATE_ANTI_ALIASING" }, { 0x08, 1, 1, "3DSTATE_BACKFACE_STENCIL_OPS" }, { 0x09, 1, 1, "3DSTATE_BACKFACE_STENCIL_MASKS" }, { 0x16, 1, 1, "3DSTATE_COORD_SET_BINDINGS" }, { 0x15, 1, 1, "3DSTATE_FOG_COLOR" }, { 0x0b, 1, 1, "3DSTATE_INDEPENDENT_ALPHA_BLEND" }, { 0x0d, 1, 1, "3DSTATE_MODES_4" }, { 0x0c, 1, 1, "3DSTATE_MODES_5" }, { 0x07, 1, 1, "3DSTATE_RASTERIZATION_RULES" }, }; uint32_t *data = kgem->batch + offset; uint32_t opcode; unsigned int idx; opcode = (data[0] & 0x1f000000) >> 24; switch (opcode) { case 0x1f: return gen3_decode_3d_primitive(kgem, offset); case 0x1d: return gen3_decode_3d_1d(kgem, offset); case 0x1c: return gen3_decode_3d_1c(kgem, offset); } for (idx = 0; idx < ARRAY_SIZE(opcodes); idx++) { if (opcode == opcodes[idx].opcode) { unsigned int len = 1, i; kgem_debug_print(data, offset, 0, "%s\n", opcodes[idx].name); if (opcodes[idx].max_len > 1) { len = (data[0] & 0xff) + 2; assert(len >= opcodes[idx].min_len || len <= opcodes[idx].max_len); } for (i = 1; i < len; i++) kgem_debug_print(data, offset, i, "dword %d\n", i); return len; } } kgem_debug_print(data, offset, 0, "3D UNKNOWN: 3d opcode = 0x%x\n", opcode); return 1; } void kgem_gen3_finish_state(struct kgem *kgem) { memset(&state, 0, sizeof(state)); } xf86-video-intel-2.99.917/src/sna/gen8_render.c0000664000175000017500000031623012432737457015666 00000000000000/* * Copyright © 2012,2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_reg.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_video.h" #include "gen8_render.h" #include "gen8_eu.h" #include "gen4_common.h" #include "gen4_source.h" #include "gen4_vertex.h" #include "gen6_common.h" #include "gen8_vertex.h" #define SIM 1 #define ALWAYS_INVALIDATE 0 #define ALWAYS_FLUSH 0 #define ALWAYS_STALL 0 #define NO_COMPOSITE 0 #define NO_COMPOSITE_SPANS 0 #define NO_COPY 0 #define NO_COPY_BOXES 0 #define NO_FILL 0 #define NO_FILL_BOXES 0 #define NO_FILL_ONE 0 #define NO_FILL_CLEAR 0 #define NO_VIDEO 0 #define USE_8_PIXEL_DISPATCH 1 #define USE_16_PIXEL_DISPATCH 1 #define USE_32_PIXEL_DISPATCH 0 #if !USE_8_PIXEL_DISPATCH && !USE_16_PIXEL_DISPATCH && !USE_32_PIXEL_DISPATCH #error "Must select at least 8, 16 or 32 pixel dispatch" #endif #define GEN8_MAX_SIZE 16384 /* XXX Todo * * STR (software tiled rendering) mode. No, really. * 64x32 pixel blocks align with the rendering cache. Worth considering. */ #define is_aligned(x, y) (((x) & ((y) - 1)) == 0) /* Pipeline stages: * 1. Command Streamer (CS) * 2. Vertex Fetch (VF) * 3. Vertex Shader (VS) * 4. Hull Shader (HS) * 5. Tesselation Engine (TE) * 6. Domain Shader (DS) * 7. Geometry Shader (GS) * 8. Stream Output Logic (SOL) * 9. Clipper (CLIP) * 10. Strip/Fan (SF) * 11. Windower/Masker (WM) * 12. Color Calculator (CC) */ #if !NO_VIDEO static const uint32_t ps_kernel_packed[][4] = { #include "exa_wm_src_affine.g8b" #include "exa_wm_src_sample_argb.g8b" #include "exa_wm_yuv_rgb.g8b" #include "exa_wm_write.g8b" }; static const uint32_t ps_kernel_planar[][4] = { #include "exa_wm_src_affine.g8b" #include "exa_wm_src_sample_planar.g8b" #include "exa_wm_yuv_rgb.g8b" #include "exa_wm_write.g8b" }; #endif #define SURFACE_DW (64 / sizeof(uint32_t)); #define KERNEL(kernel_enum, kernel, num_surfaces) \ [GEN8_WM_KERNEL_##kernel_enum] = {#kernel_enum, kernel, sizeof(kernel), num_surfaces} #define NOKERNEL(kernel_enum, func, num_surfaces) \ [GEN8_WM_KERNEL_##kernel_enum] = {#kernel_enum, (void *)func, 0, num_surfaces} static const struct wm_kernel_info { const char *name; const void *data; unsigned int size; int num_surfaces; } wm_kernels[] = { NOKERNEL(NOMASK, gen8_wm_kernel__affine, 2), NOKERNEL(NOMASK_P, gen8_wm_kernel__projective, 2), NOKERNEL(MASK, gen8_wm_kernel__affine_mask, 3), NOKERNEL(MASK_P, gen8_wm_kernel__projective_mask, 3), NOKERNEL(MASKCA, gen8_wm_kernel__affine_mask_ca, 3), NOKERNEL(MASKCA_P, gen8_wm_kernel__projective_mask_ca, 3), NOKERNEL(MASKSA, gen8_wm_kernel__affine_mask_sa, 3), NOKERNEL(MASKSA_P, gen8_wm_kernel__projective_mask_sa, 3), NOKERNEL(OPACITY, gen8_wm_kernel__affine_opacity, 2), NOKERNEL(OPACITY_P, gen8_wm_kernel__projective_opacity, 2), #if !NO_VIDEO KERNEL(VIDEO_PLANAR, ps_kernel_planar, 7), KERNEL(VIDEO_PACKED, ps_kernel_packed, 2), #endif }; #undef KERNEL static const struct blendinfo { uint8_t src_alpha; uint8_t src_blend; uint8_t dst_blend; } gen8_blend_op[] = { /* Clear */ {0, BLENDFACTOR_ZERO, BLENDFACTOR_ZERO}, /* Src */ {0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO}, /* Dst */ {0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE}, /* Over */ {1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA}, /* OverReverse */ {0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE}, /* In */ {0, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_ZERO}, /* InReverse */ {1, BLENDFACTOR_ZERO, BLENDFACTOR_SRC_ALPHA}, /* Out */ {0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ZERO}, /* OutReverse */ {1, BLENDFACTOR_ZERO, BLENDFACTOR_INV_SRC_ALPHA}, /* Atop */ {1, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA}, /* AtopReverse */ {1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_SRC_ALPHA}, /* Xor */ {1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA}, /* Add */ {0, BLENDFACTOR_ONE, BLENDFACTOR_ONE}, }; /** * Highest-valued BLENDFACTOR used in gen8_blend_op. * * This leaves out GEN8_BLENDFACTOR_INV_DST_COLOR, * GEN8_BLENDFACTOR_INV_CONST_{COLOR,ALPHA}, * GEN8_BLENDFACTOR_INV_SRC1_{COLOR,ALPHA} */ #define GEN8_BLENDFACTOR_COUNT (BLENDFACTOR_INV_DST_ALPHA + 1) #define GEN8_BLEND_STATE_PADDED_SIZE ALIGN(sizeof(struct gen8_blend_state), 64) #define BLEND_OFFSET(s, d) \ ((d != BLENDFACTOR_ZERO) << 15 | ((s) * GEN8_BLENDFACTOR_COUNT + (d)) << 4) #define NO_BLEND BLEND_OFFSET(BLENDFACTOR_ONE, BLENDFACTOR_ZERO) #define CLEAR BLEND_OFFSET(BLENDFACTOR_ZERO, BLENDFACTOR_ZERO) #define SAMPLER_OFFSET(sf, se, mf, me) \ (((((sf) * EXTEND_COUNT + (se)) * FILTER_COUNT + (mf)) * EXTEND_COUNT + (me)) + 2) #define VERTEX_2s2s 0 #define COPY_SAMPLER 0 #define COPY_VERTEX VERTEX_2s2s #define COPY_FLAGS(a) GEN8_SET_FLAGS(COPY_SAMPLER, (a) == GXcopy ? NO_BLEND : CLEAR, GEN8_WM_KERNEL_NOMASK, COPY_VERTEX) #define FILL_SAMPLER 1 #define FILL_VERTEX VERTEX_2s2s #define FILL_FLAGS(op, format) GEN8_SET_FLAGS(FILL_SAMPLER, gen8_get_blend((op), false, (format)), GEN8_WM_KERNEL_NOMASK, FILL_VERTEX) #define FILL_FLAGS_NOBLEND GEN8_SET_FLAGS(FILL_SAMPLER, NO_BLEND, GEN8_WM_KERNEL_NOMASK, FILL_VERTEX) #define GEN8_SAMPLER(f) (((f) >> 20) & 0xfff) #define GEN8_BLEND(f) (((f) >> 4) & 0x7ff) #define GEN8_READS_DST(f) (((f) >> 15) & 1) #define GEN8_KERNEL(f) (((f) >> 16) & 0xf) #define GEN8_VERTEX(f) (((f) >> 0) & 0xf) #define GEN8_SET_FLAGS(S, B, K, V) ((S) << 20 | (K) << 16 | (B) | (V)) #define OUT_BATCH(v) batch_emit(sna, v) #define OUT_BATCH64(v) batch_emit64(sna, v) #define OUT_VERTEX(x,y) vertex_emit_2s(sna, x,y) #define OUT_VERTEX_F(v) vertex_emit(sna, v) static inline bool too_large(int width, int height) { return width > GEN8_MAX_SIZE || height > GEN8_MAX_SIZE; } static inline bool unaligned(struct kgem_bo *bo, int bpp) { /* XXX What exactly do we need to meet H_ALIGN and V_ALIGN? */ #if 0 int x, y; if (bo->proxy == NULL) return false; /* Assume that all tiled proxies are constructed correctly. */ if (bo->tiling) return false; DBG(("%s: checking alignment of a linear proxy, offset=%d, pitch=%d, bpp=%d: => (%d, %d)\n", __FUNCTION__, bo->delta, bo->pitch, bpp, 8 * (bo->delta % bo->pitch) / bpp, bo->delta / bo->pitch)); /* This may be a random userptr map, check that it meets the * render alignment of SURFACE_VALIGN_4 | SURFACE_HALIGN_4. */ y = bo->delta / bo->pitch; if (y & 3) return true; x = 8 * (bo->delta - y * bo->pitch); if (x & (4*bpp - 1)) return true; return false; #else return false; #endif } static uint32_t gen8_get_blend(int op, bool has_component_alpha, uint32_t dst_format) { uint32_t src, dst; COMPILE_TIME_ASSERT(BLENDFACTOR_INV_DST_ALPHA*GEN8_BLENDFACTOR_COUNT + BLENDFACTOR_INV_DST_ALPHA <= 0x7ff); src = gen8_blend_op[op].src_blend; dst = gen8_blend_op[op].dst_blend; /* If there's no dst alpha channel, adjust the blend op so that * we'll treat it always as 1. */ if (PICT_FORMAT_A(dst_format) == 0) { if (src == BLENDFACTOR_DST_ALPHA) src = BLENDFACTOR_ONE; else if (src == BLENDFACTOR_INV_DST_ALPHA) src = BLENDFACTOR_ZERO; } /* If the source alpha is being used, then we should only be in a * case where the source blend factor is 0, and the source blend * value is the mask channels multiplied by the source picture's alpha. */ if (has_component_alpha && gen8_blend_op[op].src_alpha) { if (dst == BLENDFACTOR_SRC_ALPHA) dst = BLENDFACTOR_SRC_COLOR; else if (dst == BLENDFACTOR_INV_SRC_ALPHA) dst = BLENDFACTOR_INV_SRC_COLOR; } DBG(("blend op=%d, dst=%x [A=%d] => src=%d, dst=%d => offset=%x\n", op, dst_format, PICT_FORMAT_A(dst_format), src, dst, (int)(BLEND_OFFSET(src, dst)>>4))); assert(BLEND_OFFSET(src, dst) >> 4 <= 0xfff); return BLEND_OFFSET(src, dst); } static uint32_t gen8_get_card_format(PictFormat format) { switch (format) { default: return -1; case PICT_a8r8g8b8: return SURFACEFORMAT_B8G8R8A8_UNORM; case PICT_x8r8g8b8: return SURFACEFORMAT_B8G8R8X8_UNORM; case PICT_a8b8g8r8: return SURFACEFORMAT_R8G8B8A8_UNORM; case PICT_x8b8g8r8: return SURFACEFORMAT_R8G8B8X8_UNORM; #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: return SURFACEFORMAT_B10G10R10A2_UNORM; case PICT_x2r10g10b10: return SURFACEFORMAT_B10G10R10X2_UNORM; #endif case PICT_r8g8b8: return SURFACEFORMAT_R8G8B8_UNORM; case PICT_r5g6b5: return SURFACEFORMAT_B5G6R5_UNORM; case PICT_a1r5g5b5: return SURFACEFORMAT_B5G5R5A1_UNORM; case PICT_a8: return SURFACEFORMAT_A8_UNORM; case PICT_a4r4g4b4: return SURFACEFORMAT_B4G4R4A4_UNORM; } } static uint32_t gen8_get_dest_format(PictFormat format) { switch (format) { default: return -1; case PICT_a8r8g8b8: case PICT_x8r8g8b8: return SURFACEFORMAT_B8G8R8A8_UNORM; case PICT_a8b8g8r8: case PICT_x8b8g8r8: return SURFACEFORMAT_R8G8B8A8_UNORM; #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: case PICT_x2r10g10b10: return SURFACEFORMAT_B10G10R10A2_UNORM; #endif case PICT_r5g6b5: return SURFACEFORMAT_B5G6R5_UNORM; case PICT_x1r5g5b5: case PICT_a1r5g5b5: return SURFACEFORMAT_B5G5R5A1_UNORM; case PICT_a8: return SURFACEFORMAT_A8_UNORM; case PICT_a4r4g4b4: case PICT_x4r4g4b4: return SURFACEFORMAT_B4G4R4A4_UNORM; } } static bool gen8_check_dst_format(PictFormat format) { if (gen8_get_dest_format(format) != -1) return true; DBG(("%s: unhandled format: %x\n", __FUNCTION__, (int)format)); return false; } static bool gen8_check_format(uint32_t format) { if (gen8_get_card_format(format) != -1) return true; DBG(("%s: unhandled format: %x\n", __FUNCTION__, (int)format)); return false; } static uint32_t gen8_filter(uint32_t filter) { switch (filter) { default: assert(0); case PictFilterNearest: return SAMPLER_FILTER_NEAREST; case PictFilterBilinear: return SAMPLER_FILTER_BILINEAR; } } static uint32_t gen8_check_filter(PicturePtr picture) { switch (picture->filter) { case PictFilterNearest: case PictFilterBilinear: return true; default: return false; } } static uint32_t gen8_repeat(uint32_t repeat) { switch (repeat) { default: assert(0); case RepeatNone: return SAMPLER_EXTEND_NONE; case RepeatNormal: return SAMPLER_EXTEND_REPEAT; case RepeatPad: return SAMPLER_EXTEND_PAD; case RepeatReflect: return SAMPLER_EXTEND_REFLECT; } } static bool gen8_check_repeat(PicturePtr picture) { if (!picture->repeat) return true; switch (picture->repeatType) { case RepeatNone: case RepeatNormal: case RepeatPad: case RepeatReflect: return true; default: return false; } } static int gen8_choose_composite_kernel(int op, bool has_mask, bool is_ca, bool is_affine) { int base; if (has_mask) { if (is_ca) { if (gen8_blend_op[op].src_alpha) base = GEN8_WM_KERNEL_MASKSA; else base = GEN8_WM_KERNEL_MASKCA; } else base = GEN8_WM_KERNEL_MASK; } else base = GEN8_WM_KERNEL_NOMASK; return base + !is_affine; } static void gen8_emit_push_constants(struct sna *sna) { #if SIM OUT_BATCH(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_HS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_DS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2)); OUT_BATCH(0); #endif } static void gen8_emit_urb(struct sna *sna) { /* num of VS entries must be divisible by 8 if size < 9 */ OUT_BATCH(GEN8_3DSTATE_URB_VS | (2 - 2)); OUT_BATCH(960 << URB_ENTRY_NUMBER_SHIFT | (2 - 1) << URB_ENTRY_SIZE_SHIFT | 4 << URB_STARTING_ADDRESS_SHIFT); OUT_BATCH(GEN8_3DSTATE_URB_HS | (2 - 2)); OUT_BATCH(0 << URB_ENTRY_SIZE_SHIFT | 4 << URB_STARTING_ADDRESS_SHIFT); OUT_BATCH(GEN8_3DSTATE_URB_DS | (2 - 2)); OUT_BATCH(0 << URB_ENTRY_SIZE_SHIFT | 4 << URB_STARTING_ADDRESS_SHIFT); OUT_BATCH(GEN8_3DSTATE_URB_GS | (2 - 2)); OUT_BATCH(0 << URB_ENTRY_SIZE_SHIFT | 4 << URB_STARTING_ADDRESS_SHIFT); } static void gen8_emit_state_base_address(struct sna *sna) { uint32_t num_pages; assert(sna->kgem.surface - sna->kgem.nbatch <= 16384); OUT_BATCH(GEN8_STATE_BASE_ADDRESS | (16 - 2)); OUT_BATCH64(0); /* general */ OUT_BATCH(0); /* stateless dataport */ OUT_BATCH64(kgem_add_reloc64(&sna->kgem, /* surface */ sna->kgem.nbatch, NULL, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); OUT_BATCH64(kgem_add_reloc64(&sna->kgem, /* dynamic */ sna->kgem.nbatch, sna->render_state.gen8.general_bo, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); OUT_BATCH64(0); /* indirect */ OUT_BATCH64(kgem_add_reloc64(&sna->kgem, /* instruction */ sna->kgem.nbatch, sna->render_state.gen8.general_bo, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); /* upper bounds */ num_pages = sna->render_state.gen8.general_bo->size.pages.count; OUT_BATCH(0); /* general */ OUT_BATCH(num_pages << 12 | 1); /* dynamic */ OUT_BATCH(0); /* indirect */ OUT_BATCH(num_pages << 12 | 1); /* instruction */ } static void gen8_emit_vs_invariant(struct sna *sna) { OUT_BATCH(GEN8_3DSTATE_VS | (9 - 2)); OUT_BATCH64(0); /* no VS kernel */ OUT_BATCH(0); OUT_BATCH64(0); /* scratch */ OUT_BATCH(0); OUT_BATCH(1 << 1); /* pass-through */ OUT_BATCH(1 << 16 | 1 << 21); /* urb write to SBE */ #if SIM OUT_BATCH(GEN8_3DSTATE_CONSTANT_VS | (11 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH64(0); OUT_BATCH64(0); OUT_BATCH64(0); OUT_BATCH64(0); OUT_BATCH(GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS | (2 - 2)); OUT_BATCH(0); #endif } static void gen8_emit_hs_invariant(struct sna *sna) { OUT_BATCH(GEN8_3DSTATE_HS | (9 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH64(0); /* no HS kernel */ OUT_BATCH64(0); /* scratch */ OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ #if SIM OUT_BATCH(GEN8_3DSTATE_CONSTANT_HS | (11 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH64(0); OUT_BATCH64(0); OUT_BATCH64(0); OUT_BATCH64(0); #if 1 OUT_BATCH(GEN8_3DSTATE_BINDING_TABLE_POINTERS_HS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_HS | (2 - 2)); OUT_BATCH(0); #endif #endif } static void gen8_emit_te_invariant(struct sna *sna) { OUT_BATCH(GEN8_3DSTATE_TE | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_ds_invariant(struct sna *sna) { OUT_BATCH(GEN8_3DSTATE_DS | (9 - 2)); OUT_BATCH64(0); /* no kernel */ OUT_BATCH(0); OUT_BATCH64(0); /* scratch */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); #if SIM OUT_BATCH(GEN8_3DSTATE_CONSTANT_DS | (11 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH64(0); OUT_BATCH64(0); OUT_BATCH64(0); OUT_BATCH64(0); #if 1 OUT_BATCH(GEN8_3DSTATE_BINDING_TABLE_POINTERS_DS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_DS | (2 - 2)); OUT_BATCH(0); #endif #endif } static void gen8_emit_gs_invariant(struct sna *sna) { OUT_BATCH(GEN8_3DSTATE_GS | (10 - 2)); OUT_BATCH64(0); /* no GS kernel */ OUT_BATCH(0); OUT_BATCH64(0); /* scratch */ OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(0); OUT_BATCH(0); #if SIM OUT_BATCH(GEN8_3DSTATE_CONSTANT_GS | (11 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH64(0); OUT_BATCH64(0); OUT_BATCH64(0); OUT_BATCH64(0); #if 1 OUT_BATCH(GEN8_3DSTATE_BINDING_TABLE_POINTERS_GS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_GS | (2 - 2)); OUT_BATCH(0); #endif #endif } static void gen8_emit_sol_invariant(struct sna *sna) { OUT_BATCH(GEN8_3DSTATE_STREAMOUT | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_sf_invariant(struct sna *sna) { OUT_BATCH(GEN8_3DSTATE_SF | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_clip_invariant(struct sna *sna) { OUT_BATCH(GEN8_3DSTATE_CLIP | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); OUT_BATCH(0); } static void gen8_emit_null_depth_buffer(struct sna *sna) { OUT_BATCH(GEN8_3DSTATE_DEPTH_BUFFER | (8 - 2)); #if 0 OUT_BATCH(SURFACE_NULL << DEPTH_BUFFER_TYPE_SHIFT | DEPTHFORMAT_D32_FLOAT << DEPTH_BUFFER_FORMAT_SHIFT); #else OUT_BATCH(SURFACE_2D << DEPTH_BUFFER_TYPE_SHIFT | DEPTHFORMAT_D16_UNORM << DEPTH_BUFFER_FORMAT_SHIFT); #endif OUT_BATCH64(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); #if SIM OUT_BATCH(GEN8_3DSTATE_HIER_DEPTH_BUFFER | (5 - 2)); OUT_BATCH(0); OUT_BATCH64(0); OUT_BATCH(0); #endif #if SIM OUT_BATCH(GEN8_3DSTATE_STENCIL_BUFFER | (5 - 2)); OUT_BATCH(0); OUT_BATCH64(0); OUT_BATCH(0); #endif #if SIM OUT_BATCH(GEN8_3DSTATE_WM_DEPTH_STENCIL | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); #endif #if SIM OUT_BATCH(GEN8_3DSTATE_CLEAR_PARAMS | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); #endif } static void gen8_emit_wm_invariant(struct sna *sna) { gen8_emit_null_depth_buffer(sna); #if SIM OUT_BATCH(GEN8_3DSTATE_SCISSOR_STATE_POINTERS | (2 - 2)); OUT_BATCH(0); #endif OUT_BATCH(GEN8_3DSTATE_WM | (2 - 2)); //OUT_BATCH(WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC); /* XXX */ OUT_BATCH(WM_PERSPECTIVE_PIXEL_BARYCENTRIC); #if SIM OUT_BATCH(GEN8_3DSTATE_WM_CHROMAKEY | (2 - 2)); OUT_BATCH(0); #endif #if 0 OUT_BATCH(GEN8_3DSTATE_WM_HZ_OP | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); #endif OUT_BATCH(GEN8_3DSTATE_PS_EXTRA | (2 - 2)); OUT_BATCH(PSX_PIXEL_SHADER_VALID | PSX_ATTRIBUTE_ENABLE); OUT_BATCH(GEN8_3DSTATE_RASTER | (5 - 2)); OUT_BATCH(RASTER_FRONT_WINDING_CCW | RASTER_CULL_NONE); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_SBE_SWIZ | (11 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); #if SIM OUT_BATCH(GEN8_3DSTATE_CONSTANT_PS | (11 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH64(0); OUT_BATCH64(0); OUT_BATCH64(0); OUT_BATCH64(0); #endif } static void gen8_emit_cc_invariant(struct sna *sna) { } static void gen8_emit_vf_invariant(struct sna *sna) { int n; #if 1 OUT_BATCH(GEN8_3DSTATE_VF | (2 - 2)); OUT_BATCH(0); #endif OUT_BATCH(GEN8_3DSTATE_VF_SGVS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN8_3DSTATE_VF_TOPOLOGY | (2 - 2)); OUT_BATCH(RECTLIST); OUT_BATCH(GEN8_3DSTATE_VF_STATISTICS | 0); for (n = 1; n <= 3; n++) { OUT_BATCH(GEN8_3DSTATE_VF_INSTANCING | (3 - 2)); OUT_BATCH(n); OUT_BATCH(0); } } static void gen8_emit_invariant(struct sna *sna) { OUT_BATCH(GEN8_PIPELINE_SELECT | PIPELINE_SELECT_3D); #if SIM OUT_BATCH(GEN8_STATE_SIP | (3 - 2)); OUT_BATCH64(0); #endif OUT_BATCH(GEN8_3DSTATE_MULTISAMPLE | (2 - 2)); OUT_BATCH(MULTISAMPLE_PIXEL_LOCATION_CENTER | MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ OUT_BATCH(GEN8_3DSTATE_SAMPLE_MASK | (2 - 2)); OUT_BATCH(1); #if SIM OUT_BATCH(GEN8_3DSTATE_SAMPLE_PATTERN | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); //OUT_BATCH(8<<20 | 8<<16); OUT_BATCH(0); #endif gen8_emit_push_constants(sna); gen8_emit_urb(sna); gen8_emit_state_base_address(sna); gen8_emit_vf_invariant(sna); gen8_emit_vs_invariant(sna); gen8_emit_hs_invariant(sna); gen8_emit_te_invariant(sna); gen8_emit_ds_invariant(sna); gen8_emit_gs_invariant(sna); gen8_emit_sol_invariant(sna); gen8_emit_clip_invariant(sna); gen8_emit_sf_invariant(sna); gen8_emit_wm_invariant(sna); gen8_emit_cc_invariant(sna); sna->render_state.gen8.needs_invariant = false; } static void gen8_emit_cc(struct sna *sna, uint32_t blend) { struct gen8_render_state *render = &sna->render_state.gen8; if (render->blend == blend) return; DBG(("%s: blend=%x (current=%x), src=%d, dst=%d\n", __FUNCTION__, blend, render->blend, blend / GEN8_BLENDFACTOR_COUNT, blend % GEN8_BLENDFACTOR_COUNT)); assert(blend < GEN8_BLENDFACTOR_COUNT * GEN8_BLENDFACTOR_COUNT); assert(blend / GEN8_BLENDFACTOR_COUNT > 0); assert(blend % GEN8_BLENDFACTOR_COUNT > 0); /* XXX can have upto 8 blend states preload, selectable via * Render Target Index. What other side-effects of Render Target Index? */ OUT_BATCH(GEN8_3DSTATE_PS_BLEND | (2 - 2)); if (blend != GEN8_BLEND(NO_BLEND)) { uint32_t src = blend / GEN8_BLENDFACTOR_COUNT; uint32_t dst = blend % GEN8_BLENDFACTOR_COUNT; OUT_BATCH(PS_BLEND_HAS_WRITEABLE_RT | PS_BLEND_COLOR_BLEND_ENABLE | src << PS_BLEND_SRC_ALPHA_SHIFT | dst << PS_BLEND_DST_ALPHA_SHIFT | src << PS_BLEND_SRC_SHIFT | dst << PS_BLEND_DST_SHIFT); } else OUT_BATCH(PS_BLEND_HAS_WRITEABLE_RT); assert(is_aligned(render->cc_blend + blend * GEN8_BLEND_STATE_PADDED_SIZE, 64)); OUT_BATCH(GEN8_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); OUT_BATCH((render->cc_blend + blend * GEN8_BLEND_STATE_PADDED_SIZE) | 1); /* Force a CC_STATE pointer change to improve blend performance */ OUT_BATCH(GEN8_3DSTATE_CC_STATE_POINTERS | (2 - 2)); OUT_BATCH(0); render->blend = blend; } static void gen8_emit_sampler(struct sna *sna, uint32_t state) { if (sna->render_state.gen8.samplers == state) return; sna->render_state.gen8.samplers = state; DBG(("%s: sampler = %x\n", __FUNCTION__, state)); assert(2 * sizeof(struct gen8_sampler_state) == 32); OUT_BATCH(GEN8_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2)); OUT_BATCH(sna->render_state.gen8.wm_state + state * 2 * sizeof(struct gen8_sampler_state)); } static void gen8_emit_sf(struct sna *sna, bool has_mask) { int num_sf_outputs = has_mask ? 2 : 1; if (sna->render_state.gen8.num_sf_outputs == num_sf_outputs) return; DBG(("%s: num_sf_outputs=%d\n", __FUNCTION__, num_sf_outputs)); sna->render_state.gen8.num_sf_outputs = num_sf_outputs; OUT_BATCH(GEN8_3DSTATE_SBE | (4 - 2)); OUT_BATCH(num_sf_outputs << SBE_NUM_OUTPUTS_SHIFT | SBE_FORCE_VERTEX_URB_READ_LENGTH | /* forced is faster */ SBE_FORCE_VERTEX_URB_READ_OFFSET | 1 << SBE_URB_ENTRY_READ_LENGTH_SHIFT | 1 << SBE_URB_ENTRY_READ_OFFSET_SHIFT); OUT_BATCH(0); OUT_BATCH(0); } static void gen8_emit_wm(struct sna *sna, int kernel) { const uint32_t *kernels; assert(kernel < ARRAY_SIZE(wm_kernels)); if (sna->render_state.gen8.kernel == kernel) return; sna->render_state.gen8.kernel = kernel; kernels = sna->render_state.gen8.wm_kernel[kernel]; DBG(("%s: switching to %s, num_surfaces=%d (8-wide? %d, 16-wide? %d, 32-wide? %d)\n", __FUNCTION__, wm_kernels[kernel].name, wm_kernels[kernel].num_surfaces, kernels[0], kernels[1], kernels[2])); assert(is_aligned(kernels[0], 64)); assert(is_aligned(kernels[1], 64)); assert(is_aligned(kernels[2], 64)); OUT_BATCH(GEN8_3DSTATE_PS | (12 - 2)); OUT_BATCH64(kernels[0] ?: kernels[1] ?: kernels[2]); OUT_BATCH(1 << PS_SAMPLER_COUNT_SHIFT | PS_VECTOR_MASK_ENABLE | wm_kernels[kernel].num_surfaces << PS_BINDING_TABLE_ENTRY_COUNT_SHIFT); OUT_BATCH64(0); /* scratch address */ OUT_BATCH(PS_MAX_THREADS | (kernels[0] ? PS_8_DISPATCH_ENABLE : 0) | (kernels[1] ? PS_16_DISPATCH_ENABLE : 0) | (kernels[2] ? PS_32_DISPATCH_ENABLE : 0)); OUT_BATCH((kernels[0] ? 4 : kernels[1] ? 6 : 8) << PS_DISPATCH_START_GRF_SHIFT_0 | 8 << PS_DISPATCH_START_GRF_SHIFT_1 | 6 << PS_DISPATCH_START_GRF_SHIFT_2); OUT_BATCH64(kernels[2]); OUT_BATCH64(kernels[1]); } static bool gen8_emit_binding_table(struct sna *sna, uint16_t offset) { if (sna->render_state.gen8.surface_table == offset) return false; /* Binding table pointers */ assert(is_aligned(4*offset, 32)); OUT_BATCH(GEN8_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2)); OUT_BATCH(offset*4); sna->render_state.gen8.surface_table = offset; return true; } static bool gen8_emit_drawing_rectangle(struct sna *sna, const struct sna_composite_op *op) { uint32_t limit = (op->dst.height - 1) << 16 | (op->dst.width - 1); uint32_t offset = (uint16_t)op->dst.y << 16 | (uint16_t)op->dst.x; assert(!too_large(abs(op->dst.x), abs(op->dst.y))); assert(!too_large(op->dst.width, op->dst.height)); if (sna->render_state.gen8.drawrect_limit == limit && sna->render_state.gen8.drawrect_offset == offset) return true; sna->render_state.gen8.drawrect_offset = offset; sna->render_state.gen8.drawrect_limit = limit; OUT_BATCH(GEN8_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); OUT_BATCH(limit); OUT_BATCH(offset); return false; } static void gen8_emit_vertex_elements(struct sna *sna, const struct sna_composite_op *op) { /* * vertex data in vertex buffer * position: (x, y) * texture coordinate 0: (u0, v0) if (is_affine is true) else (u0, v0, w0) * texture coordinate 1 if (has_mask is true): same as above */ struct gen8_render_state *render = &sna->render_state.gen8; uint32_t src_format, dw; int id = GEN8_VERTEX(op->u.gen8.flags); bool has_mask; DBG(("%s: setup id=%d\n", __FUNCTION__, id)); if (render->ve_id == id) return; render->ve_id = id; /* The VUE layout * dword 0-3: pad (0.0, 0.0, 0.0. 0.0) * dword 4-7: position (x, y, 1.0, 1.0), * dword 8-11: texture coordinate 0 (u0, v0, w0, 1.0) * dword 12-15: texture coordinate 1 (u1, v1, w1, 1.0) * * dword 4-15 are fetched from vertex buffer */ has_mask = (id >> 2) != 0; OUT_BATCH(GEN8_3DSTATE_VERTEX_ELEMENTS | ((2 * (3 + has_mask)) + 1 - 2)); OUT_BATCH(id << VE_INDEX_SHIFT | VE_VALID | SURFACEFORMAT_R32G32B32A32_FLOAT << VE_FORMAT_SHIFT | 0 << VE_OFFSET_SHIFT); OUT_BATCH(COMPONENT_STORE_0 << VE_COMPONENT_0_SHIFT | COMPONENT_STORE_0 << VE_COMPONENT_1_SHIFT | COMPONENT_STORE_0 << VE_COMPONENT_2_SHIFT | COMPONENT_STORE_0 << VE_COMPONENT_3_SHIFT); /* x,y */ OUT_BATCH(id << VE_INDEX_SHIFT | VE_VALID | SURFACEFORMAT_R16G16_SSCALED << VE_FORMAT_SHIFT | 0 << VE_OFFSET_SHIFT); OUT_BATCH(COMPONENT_STORE_SRC << VE_COMPONENT_0_SHIFT | COMPONENT_STORE_SRC << VE_COMPONENT_1_SHIFT | COMPONENT_STORE_0 << VE_COMPONENT_2_SHIFT | COMPONENT_STORE_1_FLT << VE_COMPONENT_3_SHIFT); /* u0, v0, w0 */ DBG(("%s: first channel %d floats, offset=4\n", __FUNCTION__, id & 3)); dw = COMPONENT_STORE_1_FLT << VE_COMPONENT_3_SHIFT; switch (id & 3) { default: assert(0); case 0: src_format = SURFACEFORMAT_R16G16_SSCALED; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_0_SHIFT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_1_SHIFT; dw |= COMPONENT_STORE_0 << VE_COMPONENT_2_SHIFT; break; case 1: src_format = SURFACEFORMAT_R32_FLOAT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_0_SHIFT; dw |= COMPONENT_STORE_0 << VE_COMPONENT_1_SHIFT; dw |= COMPONENT_STORE_0 << VE_COMPONENT_2_SHIFT; break; case 2: src_format = SURFACEFORMAT_R32G32_FLOAT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_0_SHIFT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_1_SHIFT; dw |= COMPONENT_STORE_0 << VE_COMPONENT_2_SHIFT; break; case 3: src_format = SURFACEFORMAT_R32G32B32_FLOAT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_0_SHIFT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_1_SHIFT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_2_SHIFT; break; } OUT_BATCH(id << VE_INDEX_SHIFT | VE_VALID | src_format << VE_FORMAT_SHIFT | 4 << VE_OFFSET_SHIFT); OUT_BATCH(dw); /* u1, v1, w1 */ if (has_mask) { unsigned offset = 4 + ((id & 3) ?: 1) * sizeof(float); DBG(("%s: second channel %d floats, offset=%d\n", __FUNCTION__, (id >> 2) & 3, offset)); dw = COMPONENT_STORE_1_FLT << VE_COMPONENT_3_SHIFT; switch (id >> 2) { case 1: src_format = SURFACEFORMAT_R32_FLOAT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_0_SHIFT; dw |= COMPONENT_STORE_0 << VE_COMPONENT_1_SHIFT; dw |= COMPONENT_STORE_0 << VE_COMPONENT_2_SHIFT; break; default: assert(0); case 2: src_format = SURFACEFORMAT_R32G32_FLOAT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_0_SHIFT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_1_SHIFT; dw |= COMPONENT_STORE_0 << VE_COMPONENT_2_SHIFT; break; case 3: src_format = SURFACEFORMAT_R32G32B32_FLOAT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_0_SHIFT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_1_SHIFT; dw |= COMPONENT_STORE_SRC << VE_COMPONENT_2_SHIFT; break; } OUT_BATCH(id << VE_INDEX_SHIFT | VE_VALID | src_format << VE_FORMAT_SHIFT | offset << VE_OFFSET_SHIFT); OUT_BATCH(dw); } } inline static void gen8_emit_pipe_invalidate(struct sna *sna) { OUT_BATCH(GEN8_PIPE_CONTROL | (6 - 2)); OUT_BATCH(PIPE_CONTROL_WC_FLUSH | PIPE_CONTROL_TC_FLUSH | PIPE_CONTROL_CS_STALL); OUT_BATCH64(0); OUT_BATCH64(0); } inline static void gen8_emit_pipe_flush(struct sna *sna, bool need_stall) { unsigned stall; stall = 0; if (need_stall) stall = (PIPE_CONTROL_CS_STALL | PIPE_CONTROL_STALL_AT_SCOREBOARD); OUT_BATCH(GEN8_PIPE_CONTROL | (6 - 2)); OUT_BATCH(PIPE_CONTROL_WC_FLUSH | stall); OUT_BATCH64(0); OUT_BATCH64(0); } inline static void gen8_emit_pipe_stall(struct sna *sna) { OUT_BATCH(GEN8_PIPE_CONTROL | (6 - 2)); OUT_BATCH(PIPE_CONTROL_CS_STALL | PIPE_CONTROL_STALL_AT_SCOREBOARD); OUT_BATCH64(0); OUT_BATCH64(0); } static void gen8_emit_state(struct sna *sna, const struct sna_composite_op *op, uint16_t wm_binding_table) { bool need_invalidate; bool need_flush; bool need_stall; assert(op->dst.bo->exec); need_flush = wm_binding_table & 1 || (sna->render_state.gen8.emit_flush && GEN8_READS_DST(op->u.gen8.flags)); if (ALWAYS_FLUSH) need_flush = true; wm_binding_table &= ~1; need_stall = sna->render_state.gen8.surface_table != wm_binding_table; need_invalidate = kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo); if (ALWAYS_INVALIDATE) need_invalidate = true; need_stall &= gen8_emit_drawing_rectangle(sna, op); if (ALWAYS_STALL) need_stall = true; if (need_invalidate) { gen8_emit_pipe_invalidate(sna); kgem_clear_dirty(&sna->kgem); assert(op->dst.bo->exec); kgem_bo_mark_dirty(op->dst.bo); need_flush = false; need_stall = false; } if (need_flush) { gen8_emit_pipe_flush(sna, need_stall); need_stall = false; } if (need_stall) gen8_emit_pipe_stall(sna); gen8_emit_cc(sna, GEN8_BLEND(op->u.gen8.flags)); gen8_emit_sampler(sna, GEN8_SAMPLER(op->u.gen8.flags)); gen8_emit_sf(sna, GEN8_VERTEX(op->u.gen8.flags) >> 2); gen8_emit_wm(sna, GEN8_KERNEL(op->u.gen8.flags)); gen8_emit_vertex_elements(sna, op); gen8_emit_binding_table(sna, wm_binding_table); sna->render_state.gen8.emit_flush = GEN8_READS_DST(op->u.gen8.flags); } static bool gen8_magic_ca_pass(struct sna *sna, const struct sna_composite_op *op) { struct gen8_render_state *state = &sna->render_state.gen8; if (!op->need_magic_ca_pass) return false; DBG(("%s: CA fixup (%d -> %d)\n", __FUNCTION__, sna->render.vertex_start, sna->render.vertex_index)); gen8_emit_pipe_stall(sna); gen8_emit_cc(sna, GEN8_BLEND(gen8_get_blend(PictOpAdd, true, op->dst.format))); gen8_emit_wm(sna, gen8_choose_composite_kernel(PictOpAdd, true, true, op->is_affine)); OUT_BATCH(GEN8_3DPRIMITIVE | (7 - 2)); OUT_BATCH(0); /* ignored, see VF_TOPOLOGY */ OUT_BATCH(sna->render.vertex_index - sna->render.vertex_start); OUT_BATCH(sna->render.vertex_start); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ state->last_primitive = sna->kgem.nbatch; return true; } static void null_create(struct sna_static_stream *stream) { /* A bunch of zeros useful for legacy border color and depth-stencil */ sna_static_stream_map(stream, 64, 64); } static void sampler_state_init(struct gen8_sampler_state *sampler_state, sampler_filter_t filter, sampler_extend_t extend) { COMPILE_TIME_ASSERT(sizeof(*sampler_state) == 4*sizeof(uint32_t)); sampler_state->ss0.lod_preclamp = 2; /* GL mode */ sampler_state->ss0.default_color_mode = 1; switch (filter) { default: case SAMPLER_FILTER_NEAREST: sampler_state->ss0.min_filter = MAPFILTER_NEAREST; sampler_state->ss0.mag_filter = MAPFILTER_NEAREST; break; case SAMPLER_FILTER_BILINEAR: sampler_state->ss0.min_filter = MAPFILTER_LINEAR; sampler_state->ss0.mag_filter = MAPFILTER_LINEAR; break; } /* XXX bicubic filter using MAPFILTER_FLEXIBLE */ switch (extend) { default: case SAMPLER_EXTEND_NONE: sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_CLAMP_BORDER; break; case SAMPLER_EXTEND_REPEAT: sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_WRAP; sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_WRAP; sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_WRAP; break; case SAMPLER_EXTEND_PAD: sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_CLAMP; sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_CLAMP; sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_CLAMP; break; case SAMPLER_EXTEND_REFLECT: sampler_state->ss3.r_wrap_mode = TEXCOORDMODE_MIRROR; sampler_state->ss3.s_wrap_mode = TEXCOORDMODE_MIRROR; sampler_state->ss3.t_wrap_mode = TEXCOORDMODE_MIRROR; break; } } static void sampler_copy_init(struct gen8_sampler_state *ss) { sampler_state_init(ss, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE); ss->ss3.non_normalized_coord = 1; sampler_state_init(ss+1, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE); } static void sampler_fill_init(struct gen8_sampler_state *ss) { sampler_state_init(ss, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_REPEAT); ss->ss3.non_normalized_coord = 1; sampler_state_init(ss+1, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE); } static uint32_t gen8_tiling_bits(uint32_t tiling) { switch (tiling) { default: assert(0); case I915_TILING_NONE: return 0; case I915_TILING_X: return SURFACE_TILED; case I915_TILING_Y: return SURFACE_TILED | SURFACE_TILED_Y; } } #define MOCS_WT (2 << 5) #define MOCS_WB (3 << 5) #define MOCS_eLLC_ONLY (0 << 3) #define MOCS_LLC_ONLY (1 << 3) #define MOCS_eLLC_LLC (2 << 3) #define MOCS_ALL_CACHES (3 << 3) /** * Sets up the common fields for a surface state buffer for the given * picture in the given surface state buffer. */ static uint32_t gen8_bind_bo(struct sna *sna, struct kgem_bo *bo, uint32_t width, uint32_t height, uint32_t format, bool is_dst) { uint32_t *ss; uint32_t domains; int offset; uint32_t is_scanout = is_dst && bo->scanout; /* After the first bind, we manage the cache domains within the batch */ offset = kgem_bo_get_binding(bo, format | is_dst << 30 | is_scanout << 31); if (offset) { if (is_dst) kgem_bo_mark_dirty(bo); assert(offset >= sna->kgem.surface); return offset * sizeof(uint32_t); } offset = sna->kgem.surface -= SURFACE_DW; ss = sna->kgem.batch + offset; ss[0] = (SURFACE_2D << SURFACE_TYPE_SHIFT | gen8_tiling_bits(bo->tiling) | format << SURFACE_FORMAT_SHIFT | SURFACE_VALIGN_4 | SURFACE_HALIGN_4); if (is_dst) { ss[0] |= SURFACE_RC_READ_WRITE; domains = I915_GEM_DOMAIN_RENDER << 16 |I915_GEM_DOMAIN_RENDER; } else domains = I915_GEM_DOMAIN_SAMPLER << 16; ss[1] = (is_dst && is_uncached(sna, bo)) ? 0 : is_scanout ? (MOCS_WT | MOCS_ALL_CACHES) << 24 : (MOCS_WB | MOCS_ALL_CACHES) << 24; ss[2] = ((width - 1) << SURFACE_WIDTH_SHIFT | (height - 1) << SURFACE_HEIGHT_SHIFT); ss[3] = (bo->pitch - 1) << SURFACE_PITCH_SHIFT; ss[4] = 0; ss[5] = 0; ss[6] = 0; ss[7] = SURFACE_SWIZZLE(RED, GREEN, BLUE, ALPHA); *(uint64_t *)(ss+8) = kgem_add_reloc64(&sna->kgem, offset + 8, bo, domains, 0); ss[10] = 0; ss[11] = 0; ss[12] = 0; ss[13] = 0; ss[14] = 0; ss[15] = 0; kgem_bo_set_binding(bo, format | is_dst << 30 | is_scanout << 31, offset); DBG(("[%x] bind bo(handle=%d, addr=%lx), format=%d, width=%d, height=%d, pitch=%d, tiling=%d -> %s\n", offset, bo->handle, *(uint64_t *)(ss+8), format, width, height, bo->pitch, bo->tiling, domains & 0xffff ? "render" : "sampler")); return offset * sizeof(uint32_t); } static void gen8_emit_vertex_buffer(struct sna *sna, const struct sna_composite_op *op) { int id = GEN8_VERTEX(op->u.gen8.flags); OUT_BATCH(GEN8_3DSTATE_VERTEX_BUFFERS | (5 - 2)); OUT_BATCH(id << VB_INDEX_SHIFT | VB_MODIFY_ENABLE | 4*op->floats_per_vertex); sna->render.vertex_reloc[sna->render.nvertex_reloc++] = sna->kgem.nbatch; OUT_BATCH64(0); OUT_BATCH(~0); /* buffer size: disabled */ sna->render.vb_id |= 1 << id; } static void gen8_emit_primitive(struct sna *sna) { if (sna->kgem.nbatch == sna->render_state.gen8.last_primitive) { sna->render.vertex_offset = sna->kgem.nbatch - 5; return; } OUT_BATCH(GEN8_3DPRIMITIVE | (7 - 2)); OUT_BATCH(0); /* ignored, see VF_TOPOLOGY */ sna->render.vertex_offset = sna->kgem.nbatch; OUT_BATCH(0); /* vertex count, to be filled in later */ OUT_BATCH(sna->render.vertex_index); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ sna->render.vertex_start = sna->render.vertex_index; sna->render_state.gen8.last_primitive = sna->kgem.nbatch; } static bool gen8_rectangle_begin(struct sna *sna, const struct sna_composite_op *op) { int id = 1 << GEN8_VERTEX(op->u.gen8.flags); int ndwords; if (sna_vertex_wait__locked(&sna->render) && sna->render.vertex_offset) return true; ndwords = op->need_magic_ca_pass ? 60 : 6; if ((sna->render.vb_id & id) == 0) ndwords += 5; if (!kgem_check_batch(&sna->kgem, ndwords)) return false; if ((sna->render.vb_id & id) == 0) gen8_emit_vertex_buffer(sna, op); gen8_emit_primitive(sna); return true; } static int gen8_get_rectangles__flush(struct sna *sna, const struct sna_composite_op *op) { /* Preventing discarding new vbo after lock contention */ if (sna_vertex_wait__locked(&sna->render)) { int rem = vertex_space(sna); if (rem > op->floats_per_rect) return rem; } if (!kgem_check_batch(&sna->kgem, op->need_magic_ca_pass ? 65 : 6)) return 0; if (!kgem_check_reloc_and_exec(&sna->kgem, 2)) return 0; if (sna->render.vertex_offset) { gen8_vertex_flush(sna); if (gen8_magic_ca_pass(sna, op)) { gen8_emit_pipe_invalidate(sna); gen8_emit_cc(sna, GEN8_BLEND(op->u.gen8.flags)); gen8_emit_wm(sna, GEN8_KERNEL(op->u.gen8.flags)); } } return gen8_vertex_finish(sna); } inline static int gen8_get_rectangles(struct sna *sna, const struct sna_composite_op *op, int want, void (*emit_state)(struct sna *sna, const struct sna_composite_op *op)) { int rem; assert(want); start: rem = vertex_space(sna); if (unlikely(rem < op->floats_per_rect)) { DBG(("flushing vbo for %s: %d < %d\n", __FUNCTION__, rem, op->floats_per_rect)); rem = gen8_get_rectangles__flush(sna, op); if (unlikely(rem == 0)) goto flush; } if (unlikely(sna->render.vertex_offset == 0)) { if (!gen8_rectangle_begin(sna, op)) goto flush; else goto start; } assert(rem <= vertex_space(sna)); assert(op->floats_per_rect <= rem); if (want > 1 && want * op->floats_per_rect > rem) want = rem / op->floats_per_rect; assert(want > 0); sna->render.vertex_index += 3*want; return want; flush: if (sna->render.vertex_offset) { gen8_vertex_flush(sna); gen8_magic_ca_pass(sna, op); } sna_vertex_wait__locked(&sna->render); _kgem_submit(&sna->kgem); emit_state(sna, op); goto start; } inline static uint32_t *gen8_composite_get_binding_table(struct sna *sna, uint16_t *offset) { uint32_t *table; assert(sna->kgem.surface <= 16384); sna->kgem.surface -= SURFACE_DW; /* Clear all surplus entries to zero in case of prefetch */ table = memset(sna->kgem.batch + sna->kgem.surface, 0, 64); DBG(("%s(%x)\n", __FUNCTION__, 4*sna->kgem.surface)); *offset = sna->kgem.surface; return table; } static void gen8_get_batch(struct sna *sna, const struct sna_composite_op *op) { kgem_set_mode(&sna->kgem, KGEM_RENDER, op->dst.bo); if (!kgem_check_batch_with_surfaces(&sna->kgem, 150, 2*(1+3))) { DBG(("%s: flushing batch: %d < %d+%d\n", __FUNCTION__, sna->kgem.surface - sna->kgem.nbatch, 150, 4*8*2)); _kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } assert(sna->kgem.mode == KGEM_RENDER); assert(sna->kgem.ring == KGEM_RENDER); if (sna->render_state.gen8.needs_invariant) gen8_emit_invariant(sna); } static void gen8_emit_composite_state(struct sna *sna, const struct sna_composite_op *op) { uint32_t *binding_table; uint16_t offset, dirty; gen8_get_batch(sna, op); binding_table = gen8_composite_get_binding_table(sna, &offset); dirty = kgem_bo_is_dirty(op->dst.bo); binding_table[0] = gen8_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen8_get_dest_format(op->dst.format), true); binding_table[1] = gen8_bind_bo(sna, op->src.bo, op->src.width, op->src.height, op->src.card_format, false); if (op->mask.bo) { binding_table[2] = gen8_bind_bo(sna, op->mask.bo, op->mask.width, op->mask.height, op->mask.card_format, false); } if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen8.surface_table) == *(uint64_t*)binding_table && (op->mask.bo == NULL || sna->kgem.batch[sna->render_state.gen8.surface_table+2] == binding_table[2])) { sna->kgem.surface += SURFACE_DW; offset = sna->render_state.gen8.surface_table; } if (sna->kgem.batch[sna->render_state.gen8.surface_table] == binding_table[0]) dirty = 0; gen8_emit_state(sna, op, offset | dirty); } static void gen8_align_vertex(struct sna *sna, const struct sna_composite_op *op) { if (op->floats_per_vertex != sna->render_state.gen8.floats_per_vertex) { DBG(("aligning vertex: was %d, now %d floats per vertex\n", sna->render_state.gen8.floats_per_vertex, op->floats_per_vertex)); gen8_vertex_align(sna, op); sna->render_state.gen8.floats_per_vertex = op->floats_per_vertex; } } fastcall static void gen8_render_composite_blt(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { gen8_get_rectangles(sna, op, 1, gen8_emit_composite_state); op->prim_emit(sna, op, r); } fastcall static void gen8_render_composite_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { struct sna_composite_rectangles r; gen8_get_rectangles(sna, op, 1, gen8_emit_composite_state); DBG((" %s: (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.src = r.mask = r.dst; op->prim_emit(sna, op, &r); } static void gen8_render_composite_boxes__blt(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("composite_boxes(%d)\n", nbox)); do { int nbox_this_time; nbox_this_time = gen8_get_rectangles(sna, op, nbox, gen8_emit_composite_state); nbox -= nbox_this_time; do { struct sna_composite_rectangles r; DBG((" %s: (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.src = r.mask = r.dst; op->prim_emit(sna, op, &r); box++; } while (--nbox_this_time); } while (nbox); } static void gen8_render_composite_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); do { int nbox_this_time; float *v; nbox_this_time = gen8_get_rectangles(sna, op, nbox, gen8_emit_composite_state); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; } while (nbox); } static void gen8_render_composite_boxes__thread(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen8_get_rectangles(sna, op, nbox, gen8_emit_composite_state); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } static uint32_t gen8_create_blend_state(struct sna_static_stream *stream) { char *base, *ptr; int src, dst; COMPILE_TIME_ASSERT(((GEN8_BLENDFACTOR_COUNT * GEN8_BLENDFACTOR_COUNT << 4) & (1 << 15)) == 0); base = sna_static_stream_map(stream, GEN8_BLENDFACTOR_COUNT * GEN8_BLENDFACTOR_COUNT * GEN8_BLEND_STATE_PADDED_SIZE, 64); ptr = base; for (src = 0; src < GEN8_BLENDFACTOR_COUNT; src++) { for (dst = 0; dst < GEN8_BLENDFACTOR_COUNT; dst++) { struct gen8_blend_state *blend = (struct gen8_blend_state *)ptr; assert(((ptr - base) & 63) == 0); COMPILE_TIME_ASSERT(sizeof(blend->common) == 4); COMPILE_TIME_ASSERT(sizeof(blend->rt) == 8); COMPILE_TIME_ASSERT((char *)&blend->rt - (char *)blend == 4); blend->rt.post_blend_clamp = 1; blend->rt.pre_blend_clamp = 1; blend->rt.color_blend = !(dst == BLENDFACTOR_ZERO && src == BLENDFACTOR_ONE); blend->rt.dest_blend_factor = dst; blend->rt.source_blend_factor = src; blend->rt.color_blend_function = BLENDFUNCTION_ADD; blend->rt.dest_alpha_blend_factor = dst; blend->rt.source_alpha_blend_factor = src; blend->rt.alpha_blend_function = BLENDFUNCTION_ADD; ptr += GEN8_BLEND_STATE_PADDED_SIZE; } } return sna_static_stream_offsetof(stream, base); } static int gen8_composite_picture(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int x, int y, int w, int h, int dst_x, int dst_y, bool precise) { PixmapPtr pixmap; uint32_t color; int16_t dx, dy; DBG(("%s: (%d, %d)x(%d, %d), dst=(%d, %d)\n", __FUNCTION__, x, y, w, h, dst_x, dst_y)); channel->is_solid = false; channel->card_format = -1; if (sna_picture_is_solid(picture, &color)) return gen4_channel_init_solid(sna, channel, color); if (picture->pDrawable == NULL) { int ret; if (picture->pSourcePict->type == SourcePictTypeLinear) return gen4_channel_init_linear(sna, picture, channel, x, y, w, h, dst_x, dst_y); DBG(("%s -- fixup, gradient\n", __FUNCTION__)); ret = -1; if (!precise) ret = sna_render_picture_approximate_gradient(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (ret == -1) ret = sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); return ret; } if (picture->alphaMap) { DBG(("%s -- fallback, alphamap\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } if (!gen8_check_repeat(picture)) return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (!gen8_check_filter(picture)) return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); channel->repeat = picture->repeat ? picture->repeatType : RepeatNone; channel->filter = picture->filter; pixmap = get_drawable_pixmap(picture->pDrawable); get_drawable_deltas(picture->pDrawable, pixmap, &dx, &dy); x += dx + picture->pDrawable->x; y += dy + picture->pDrawable->y; channel->is_affine = sna_transform_is_affine(picture->transform); if (sna_transform_is_imprecise_integer_translation(picture->transform, picture->filter, precise, &dx, &dy)) { DBG(("%s: integer translation (%d, %d), removing\n", __FUNCTION__, dx, dy)); x += dx; y += dy; channel->transform = NULL; channel->filter = PictFilterNearest; if (channel->repeat || (x >= 0 && y >= 0 && x + w < pixmap->drawable.width && y + h < pixmap->drawable.height)) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv && priv->clear) { DBG(("%s: converting large pixmap source into solid [%08x]\n", __FUNCTION__, priv->clear_color)); return gen4_channel_init_solid(sna, channel, priv->clear_color); } } } else channel->transform = picture->transform; channel->pict_format = picture->format; channel->card_format = gen8_get_card_format(picture->format); if (channel->card_format == (unsigned)-1) return sna_render_picture_convert(sna, picture, channel, pixmap, x, y, w, h, dst_x, dst_y, false); if (too_large(pixmap->drawable.width, pixmap->drawable.height)) { DBG(("%s: extracting from pixmap %dx%d\n", __FUNCTION__, pixmap->drawable.width, pixmap->drawable.height)); return sna_render_picture_extract(sna, picture, channel, x, y, w, h, dst_x, dst_y); } return sna_render_pixmap_bo(sna, channel, pixmap, x, y, w, h, dst_x, dst_y); } inline static bool gen8_composite_channel_convert(struct sna_composite_channel *channel) { if (unaligned(channel->bo, PICT_FORMAT_BPP(channel->pict_format))) return false; channel->repeat = gen8_repeat(channel->repeat); channel->filter = gen8_filter(channel->filter); if (channel->card_format == (unsigned)-1) channel->card_format = gen8_get_card_format(channel->pict_format); assert(channel->card_format != (unsigned)-1); return true; } static void gen8_render_composite_done(struct sna *sna, const struct sna_composite_op *op) { if (sna->render.vertex_offset) { gen8_vertex_flush(sna); gen8_magic_ca_pass(sna, op); } if (op->mask.bo) kgem_bo_destroy(&sna->kgem, op->mask.bo); if (op->src.bo) kgem_bo_destroy(&sna->kgem, op->src.bo); sna_render_composite_redirect_done(sna, op); } inline static bool gen8_composite_set_target(struct sna *sna, struct sna_composite_op *op, PicturePtr dst, int x, int y, int w, int h, bool partial) { BoxRec box; unsigned int hint; DBG(("%s: (%d, %d)x(%d, %d), partial?=%d\n", __FUNCTION__, x, y, w, h, partial)); op->dst.pixmap = get_drawable_pixmap(dst->pDrawable); op->dst.format = dst->format; op->dst.width = op->dst.pixmap->drawable.width; op->dst.height = op->dst.pixmap->drawable.height; if (w | h) { assert(w && h); box.x1 = x; box.y1 = y; box.x2 = x + w; box.y2 = y + h; } else sna_render_picture_extents(dst, &box); hint = PREFER_GPU | FORCE_GPU | RENDER_GPU; if (!partial) { hint |= IGNORE_DAMAGE; if (w == op->dst.width && h == op->dst.height) hint |= REPLACES; } op->dst.bo = sna_drawable_use_bo(dst->pDrawable, hint, &box, &op->damage); if (op->dst.bo == NULL) return false; if (unaligned(op->dst.bo, dst->pDrawable->bitsPerPixel)) return false; if (hint & REPLACES) { struct sna_pixmap *priv = sna_pixmap(op->dst.pixmap); kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); } get_drawable_deltas(dst->pDrawable, op->dst.pixmap, &op->dst.x, &op->dst.y); DBG(("%s: pixmap=%ld, format=%08x, size=%dx%d, pitch=%d, delta=(%d,%d),damage=%p\n", __FUNCTION__, op->dst.pixmap->drawable.serialNumber, (int)op->dst.format, op->dst.width, op->dst.height, op->dst.bo->pitch, op->dst.x, op->dst.y, op->damage ? *op->damage : (void *)-1)); assert(op->dst.bo->proxy == NULL); if (too_large(op->dst.width, op->dst.height) && !sna_render_composite_redirect(sna, op, x, y, w, h, partial)) return false; return true; } static bool try_blt(struct sna *sna, PicturePtr dst, PicturePtr src, int width, int height) { struct kgem_bo *bo; if (sna->kgem.mode == KGEM_BLT) { DBG(("%s: already performing BLT\n", __FUNCTION__)); return true; } if (too_large(width, height)) { DBG(("%s: operation too large for 3D pipe (%d, %d)\n", __FUNCTION__, width, height)); return true; } bo = __sna_drawable_peek_bo(dst->pDrawable); if (bo == NULL) return true; if (bo->rq) return RQ_IS_BLT(bo->rq); if (sna_picture_is_solid(src, NULL) && can_switch_to_blt(sna, bo, 0)) return true; if (src->pDrawable) { bo = __sna_drawable_peek_bo(src->pDrawable); if (bo == NULL) return true; if (prefer_blt_bo(sna, bo)) return RQ_IS_BLT(bo->rq); } if (sna->kgem.ring == KGEM_BLT) { DBG(("%s: already performing BLT\n", __FUNCTION__)); return true; } return false; } static bool check_gradient(PicturePtr picture, bool precise) { if (picture->pDrawable) return false; switch (picture->pSourcePict->type) { case SourcePictTypeSolidFill: case SourcePictTypeLinear: return false; default: return precise; } } static bool has_alphamap(PicturePtr p) { return p->alphaMap != NULL; } static bool need_upload(PicturePtr p) { return p->pDrawable && unattached(p->pDrawable) && untransformed(p); } static bool source_is_busy(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv == NULL || priv->clear) return false; if (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo)) return true; if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; return priv->gpu_damage && !priv->cpu_damage; } static bool source_fallback(PicturePtr p, PixmapPtr pixmap, bool precise) { if (sna_picture_is_solid(p, NULL)) return false; if (p->pSourcePict) return check_gradient(p, precise); if (!gen8_check_repeat(p) || !gen8_check_format(p->format)) return true; if (pixmap && source_is_busy(pixmap)) return false; return has_alphamap(p) || !gen8_check_filter(p) || need_upload(p); } static bool gen8_composite_fallback(struct sna *sna, PicturePtr src, PicturePtr mask, PicturePtr dst) { PixmapPtr src_pixmap; PixmapPtr mask_pixmap; PixmapPtr dst_pixmap; bool src_fallback, mask_fallback; if (!gen8_check_dst_format(dst->format)) { DBG(("%s: unknown destination format: %d\n", __FUNCTION__, dst->format)); return true; } dst_pixmap = get_drawable_pixmap(dst->pDrawable); src_pixmap = src->pDrawable ? get_drawable_pixmap(src->pDrawable) : NULL; src_fallback = source_fallback(src, src_pixmap, dst->polyMode == PolyModePrecise); if (mask) { mask_pixmap = mask->pDrawable ? get_drawable_pixmap(mask->pDrawable) : NULL; mask_fallback = source_fallback(mask, mask_pixmap, dst->polyMode == PolyModePrecise); } else { mask_pixmap = NULL; mask_fallback = false; } /* If we are using the destination as a source and need to * readback in order to upload the source, do it all * on the cpu. */ if (src_pixmap == dst_pixmap && src_fallback) { DBG(("%s: src is dst and will fallback\n",__FUNCTION__)); return true; } if (mask_pixmap == dst_pixmap && mask_fallback) { DBG(("%s: mask is dst and will fallback\n",__FUNCTION__)); return true; } /* If anything is on the GPU, push everything out to the GPU */ if (dst_use_gpu(dst_pixmap)) { DBG(("%s: dst is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (src_pixmap && !src_fallback) { DBG(("%s: src is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (mask_pixmap && !mask_fallback) { DBG(("%s: mask is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } /* However if the dst is not on the GPU and we need to * render one of the sources using the CPU, we may * as well do the entire operation in place onthe CPU. */ if (src_fallback) { DBG(("%s: dst is on the CPU and src will fallback\n", __FUNCTION__)); return true; } if (mask && mask_fallback) { DBG(("%s: dst is on the CPU and mask will fallback\n", __FUNCTION__)); return true; } if (too_large(dst_pixmap->drawable.width, dst_pixmap->drawable.height) && dst_is_cpu(dst_pixmap)) { DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__)); return true; } DBG(("%s: dst is not on the GPU and the operation should not fallback\n", __FUNCTION__)); return dst_use_cpu(dst_pixmap); } static int reuse_source(struct sna *sna, PicturePtr src, struct sna_composite_channel *sc, int src_x, int src_y, PicturePtr mask, struct sna_composite_channel *mc, int msk_x, int msk_y) { uint32_t color; if (src_x != msk_x || src_y != msk_y) return false; if (src == mask) { DBG(("%s: mask is source\n", __FUNCTION__)); *mc = *sc; mc->bo = kgem_bo_reference(mc->bo); return true; } if (sna_picture_is_solid(mask, &color)) return gen4_channel_init_solid(sna, mc, color); if (sc->is_solid) return false; if (src->pDrawable == NULL || mask->pDrawable != src->pDrawable) return false; DBG(("%s: mask reuses source drawable\n", __FUNCTION__)); if (!sna_transform_equal(src->transform, mask->transform)) return false; if (!sna_picture_alphamap_equal(src, mask)) return false; if (!gen8_check_repeat(mask)) return false; if (!gen8_check_filter(mask)) return false; if (!gen8_check_format(mask->format)) return false; DBG(("%s: reusing source channel for mask with a twist\n", __FUNCTION__)); *mc = *sc; mc->repeat = gen8_repeat(mask->repeat ? mask->repeatType : RepeatNone); mc->filter = gen8_filter(mask->filter); mc->pict_format = mask->format; mc->card_format = gen8_get_card_format(mask->format); mc->bo = kgem_bo_reference(mc->bo); return true; } static bool gen8_render_composite(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr mask, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t msk_x, int16_t msk_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_op *tmp) { if (op >= ARRAY_SIZE(gen8_blend_op)) return false; DBG(("%s: %dx%d, current mode=%d/%d\n", __FUNCTION__, width, height, sna->kgem.mode, sna->kgem.ring)); if (mask == NULL && try_blt(sna, dst, src, width, height) && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp)) return true; if (gen8_composite_fallback(sna, src, mask, dst)) goto fallback; if (need_tiling(sna, width, height)) return sna_tiling_composite(op, src, mask, dst, src_x, src_y, msk_x, msk_y, dst_x, dst_y, width, height, tmp); if (op == PictOpClear && src == sna->clear) op = PictOpSrc; tmp->op = op; if (!gen8_composite_set_target(sna, tmp, dst, dst_x, dst_y, width, height, flags & COMPOSITE_PARTIAL || op > PictOpSrc)) goto fallback; switch (gen8_composite_picture(sna, src, &tmp->src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_dst; case 0: if (!gen4_channel_init_solid(sna, &tmp->src, 0)) goto cleanup_dst; /* fall through to fixup */ case 1: /* Did we just switch rings to prepare the source? */ if (mask == NULL && (prefer_blt_composite(sna, tmp) || unaligned(tmp->src.bo, PICT_FORMAT_BPP(tmp->src.pict_format))) && sna_blt_composite__convert(sna, dst_x, dst_y, width, height, tmp)) return true; if (!gen8_composite_channel_convert(&tmp->src)) goto cleanup_src; break; } tmp->is_affine = tmp->src.is_affine; tmp->has_component_alpha = false; tmp->need_magic_ca_pass = false; tmp->mask.bo = NULL; tmp->mask.filter = SAMPLER_FILTER_NEAREST; tmp->mask.repeat = SAMPLER_EXTEND_NONE; if (mask) { if (mask->componentAlpha && PICT_FORMAT_RGB(mask->format)) { tmp->has_component_alpha = true; /* Check if it's component alpha that relies on a source alpha and on * the source value. We can only get one of those into the single * source value that we get to blend with. */ if (gen8_blend_op[op].src_alpha && (gen8_blend_op[op].src_blend != BLENDFACTOR_ZERO)) { if (op != PictOpOver) goto cleanup_src; tmp->need_magic_ca_pass = true; tmp->op = PictOpOutReverse; } } if (!reuse_source(sna, src, &tmp->src, src_x, src_y, mask, &tmp->mask, msk_x, msk_y)) { switch (gen8_composite_picture(sna, mask, &tmp->mask, msk_x, msk_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_src; case 0: if (!gen4_channel_init_solid(sna, &tmp->mask, 0)) goto cleanup_src; /* fall through to fixup */ case 1: if (!gen8_composite_channel_convert(&tmp->mask)) goto cleanup_mask; break; } } tmp->is_affine &= tmp->mask.is_affine; } tmp->u.gen8.flags = GEN8_SET_FLAGS(SAMPLER_OFFSET(tmp->src.filter, tmp->src.repeat, tmp->mask.filter, tmp->mask.repeat), gen8_get_blend(tmp->op, tmp->has_component_alpha, tmp->dst.format), gen8_choose_composite_kernel(tmp->op, tmp->mask.bo != NULL, tmp->has_component_alpha, tmp->is_affine), gen4_choose_composite_emitter(sna, tmp)); tmp->blt = gen8_render_composite_blt; tmp->box = gen8_render_composite_box; tmp->boxes = gen8_render_composite_boxes__blt; if (tmp->emit_boxes){ tmp->boxes = gen8_render_composite_boxes; tmp->thread_boxes = gen8_render_composite_boxes__thread; } tmp->done = gen8_render_composite_done; kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp->dst.bo); if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) goto cleanup_mask; _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen8_align_vertex(sna, tmp); gen8_emit_composite_state(sna, tmp); return true; cleanup_mask: if (tmp->mask.bo) { kgem_bo_destroy(&sna->kgem, tmp->mask.bo); tmp->mask.bo = NULL; } cleanup_src: if (tmp->src.bo) { kgem_bo_destroy(&sna->kgem, tmp->src.bo); tmp->src.bo = NULL; } cleanup_dst: if (tmp->redirect.real_bo) { kgem_bo_destroy(&sna->kgem, tmp->dst.bo); tmp->redirect.real_bo = NULL; } fallback: return (mask == NULL && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags | COMPOSITE_FALLBACK, tmp)); } #if !NO_COMPOSITE_SPANS fastcall static void gen8_render_composite_spans_box(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { DBG(("%s: src=+(%d, %d), opacity=%f, dst=+(%d, %d), box=(%d, %d) x (%d, %d)\n", __FUNCTION__, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); gen8_get_rectangles(sna, &op->base, 1, gen8_emit_composite_state); op->prim_emit(sna, op, box, opacity); } static void gen8_render_composite_spans_boxes(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, int nbox, float opacity) { DBG(("%s: nbox=%d, src=+(%d, %d), opacity=%f, dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y)); do { int nbox_this_time; nbox_this_time = gen8_get_rectangles(sna, &op->base, nbox, gen8_emit_composite_state); nbox -= nbox_this_time; do { DBG((" %s: (%d, %d) x (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); op->prim_emit(sna, op, box++, opacity); } while (--nbox_this_time); } while (nbox); } fastcall static void gen8_render_composite_spans_boxes__thread(struct sna *sna, const struct sna_composite_spans_op *op, const struct sna_opacity_box *box, int nbox) { DBG(("%s: nbox=%d, src=+(%d, %d), dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], op->base.dst.x, op->base.dst.y)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen8_get_rectangles(sna, &op->base, nbox, gen8_emit_composite_state); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->base.floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } fastcall static void gen8_render_composite_spans_done(struct sna *sna, const struct sna_composite_spans_op *op) { if (sna->render.vertex_offset) gen8_vertex_flush(sna); DBG(("%s()\n", __FUNCTION__)); if (op->base.src.bo) kgem_bo_destroy(&sna->kgem, op->base.src.bo); sna_render_composite_redirect_done(sna, &op->base); } static bool gen8_check_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t width, int16_t height, unsigned flags) { if (op >= ARRAY_SIZE(gen8_blend_op)) return false; if (gen8_composite_fallback(sna, src, NULL, dst)) return false; if (need_tiling(sna, width, height) && !is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS)) { DBG(("%s: fallback, tiled operation not on GPU\n", __FUNCTION__)); return false; } return true; } static bool gen8_render_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_spans_op *tmp) { DBG(("%s: %dx%d with flags=%x, current mode=%d\n", __FUNCTION__, width, height, flags, sna->kgem.ring)); assert(gen8_check_composite_spans(sna, op, src, dst, width, height, flags)); if (need_tiling(sna, width, height)) { DBG(("%s: tiling, operation (%dx%d) too wide for pipeline\n", __FUNCTION__, width, height)); return sna_tiling_composite_spans(op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp); } tmp->base.op = op; if (!gen8_composite_set_target(sna, &tmp->base, dst, dst_x, dst_y, width, height, true)) return false; switch (gen8_composite_picture(sna, src, &tmp->base.src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_dst; case 0: if (!gen4_channel_init_solid(sna, &tmp->base.src, 0)) goto cleanup_dst; /* fall through to fixup */ case 1: if (!gen8_composite_channel_convert(&tmp->base.src)) goto cleanup_src; break; } tmp->base.mask.bo = NULL; tmp->base.is_affine = tmp->base.src.is_affine; tmp->base.need_magic_ca_pass = false; tmp->base.u.gen8.flags = GEN8_SET_FLAGS(SAMPLER_OFFSET(tmp->base.src.filter, tmp->base.src.repeat, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_PAD), gen8_get_blend(tmp->base.op, false, tmp->base.dst.format), GEN8_WM_KERNEL_OPACITY | !tmp->base.is_affine, gen4_choose_spans_emitter(sna, tmp)); tmp->box = gen8_render_composite_spans_box; tmp->boxes = gen8_render_composite_spans_boxes; if (tmp->emit_boxes) tmp->thread_boxes = gen8_render_composite_spans_boxes__thread; tmp->done = gen8_render_composite_spans_done; kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp->base.dst.bo); if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) goto cleanup_src; _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen8_align_vertex(sna, &tmp->base); gen8_emit_composite_state(sna, &tmp->base); return true; cleanup_src: if (tmp->base.src.bo) kgem_bo_destroy(&sna->kgem, tmp->base.src.bo); cleanup_dst: if (tmp->base.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp->base.dst.bo); return false; } #endif static void gen8_emit_copy_state(struct sna *sna, const struct sna_composite_op *op) { uint32_t *binding_table; uint16_t offset, dirty; gen8_get_batch(sna, op); binding_table = gen8_composite_get_binding_table(sna, &offset); dirty = kgem_bo_is_dirty(op->dst.bo); binding_table[0] = gen8_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen8_get_dest_format(op->dst.format), true); binding_table[1] = gen8_bind_bo(sna, op->src.bo, op->src.width, op->src.height, op->src.card_format, false); if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen8.surface_table) == *(uint64_t*)binding_table) { sna->kgem.surface += SURFACE_DW; offset = sna->render_state.gen8.surface_table; } if (sna->kgem.batch[sna->render_state.gen8.surface_table] == binding_table[0]) dirty = 0; assert(!GEN8_READS_DST(op->u.gen8.flags)); gen8_emit_state(sna, op, offset | dirty); } static inline bool prefer_blt_copy(struct sna *sna, struct kgem_bo *src_bo, struct kgem_bo *dst_bo, unsigned flags) { if (sna->kgem.mode == KGEM_BLT) return true; assert((flags & COPY_SYNC) == 0); if (src_bo == dst_bo && can_switch_to_blt(sna, dst_bo, flags)) return true; if (untiled_tlb_miss(src_bo) || untiled_tlb_miss(dst_bo)) return true; if (force_blt_ring(sna)) return true; if (kgem_bo_is_render(dst_bo) || kgem_bo_is_render(src_bo)) return false; if (prefer_render_ring(sna, dst_bo)) return false; if (!prefer_blt_ring(sna, dst_bo, flags)) return false; return prefer_blt_bo(sna, src_bo) || prefer_blt_bo(sna, dst_bo); } static bool gen8_render_copy_boxes(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, unsigned flags) { struct sna_composite_op tmp; BoxRec extents; DBG(("%s (%d, %d)->(%d, %d) x %d, alu=%x, flags=%x, self-copy=%d, overlaps? %d\n", __FUNCTION__, src_dx, src_dy, dst_dx, dst_dy, n, alu, flags, src_bo == dst_bo, overlaps(sna, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, box, n, flags, &extents))); if (prefer_blt_copy(sna, src_bo, dst_bo, flags) && sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; if (!(alu == GXcopy || alu == GXclear) || unaligned(src_bo, src->bitsPerPixel) || unaligned(dst_bo, dst->bitsPerPixel)) { fallback_blt: DBG(("%s: fallback blt\n", __FUNCTION__)); if (!sna_blt_compare_depth(src, dst)) return false; return sna_blt_copy_boxes_fallback(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } if (overlaps(sna, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, box, n, flags, &extents)) { bool big = too_large(extents.x2-extents.x1, extents.y2-extents.y1); if ((big || can_switch_to_blt(sna, dst_bo, flags)) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; if (big) goto fallback_blt; assert(src_bo == dst_bo); assert(src->depth == dst->depth); assert(src->width == dst->width); assert(src->height == dst->height); return sna_render_copy_boxes__overlap(sna, alu, src, src_bo, src_dx, src_dy, dst_dx, dst_dy, box, n, &extents); } if (dst->depth == src->depth) { tmp.dst.format = sna_render_format_for_depth(dst->depth); tmp.src.pict_format = tmp.dst.format; } else { tmp.dst.format = sna_format_for_depth(dst->depth); tmp.src.pict_format = sna_format_for_depth(src->depth); } if (!gen8_check_format(tmp.src.pict_format)) goto fallback_blt; tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.bo = dst_bo; tmp.dst.x = tmp.dst.y = 0; tmp.damage = NULL; sna_render_composite_redirect_init(&tmp); if (too_large(tmp.dst.width, tmp.dst.height)) { int i; extents = box[0]; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_composite_redirect(sna, &tmp, extents.x1 + dst_dx, extents.y1 + dst_dy, extents.x2 - extents.x1, extents.y2 - extents.y1, n > 1)) goto fallback_tiled; } tmp.src.card_format = gen8_get_card_format(tmp.src.pict_format); if (too_large(src->width, src->height)) { int i; extents = box[0]; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_pixmap_partial(sna, src, src_bo, &tmp.src, extents.x1 + src_dx, extents.y1 + src_dy, extents.x2 - extents.x1, extents.y2 - extents.y1)) goto fallback_tiled_dst; } else { tmp.src.bo = src_bo; tmp.src.width = src->width; tmp.src.height = src->height; tmp.src.offset[0] = tmp.src.offset[1] = 0; } tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = 0; tmp.u.gen8.flags = COPY_FLAGS(alu); kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp.dst.bo); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, tmp.src.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, tmp.src.bo, NULL)) { if (tmp.src.bo != src_bo) kgem_bo_destroy(&sna->kgem, tmp.src.bo); if (tmp.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp.dst.bo); goto fallback_blt; } _kgem_set_mode(&sna->kgem, KGEM_RENDER); } src_dx += tmp.src.offset[0]; src_dy += tmp.src.offset[1]; dst_dx += tmp.dst.x; dst_dy += tmp.dst.y; tmp.dst.x = tmp.dst.y = 0; gen8_align_vertex(sna, &tmp); gen8_emit_copy_state(sna, &tmp); do { int16_t *v; int n_this_time; n_this_time = gen8_get_rectangles(sna, &tmp, n, gen8_emit_copy_state); n -= n_this_time; v = (int16_t *)(sna->render.vertices + sna->render.vertex_used); sna->render.vertex_used += 6 * n_this_time; assert(sna->render.vertex_used <= sna->render.vertex_size); do { DBG((" (%d, %d) -> (%d, %d) + (%d, %d)\n", box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1)); v[0] = box->x2 + dst_dx; v[2] = box->x2 + src_dx; v[1] = v[5] = box->y2 + dst_dy; v[3] = v[7] = box->y2 + src_dy; v[8] = v[4] = box->x1 + dst_dx; v[10] = v[6] = box->x1 + src_dx; v[9] = box->y1 + dst_dy; v[11] = box->y1 + src_dy; v += 12; box++; } while (--n_this_time); } while (n); gen8_vertex_flush(sna); sna_render_composite_redirect_done(sna, &tmp); if (tmp.src.bo != src_bo) kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; fallback_tiled_dst: if (tmp.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp.dst.bo); fallback_tiled: DBG(("%s: fallback tiled\n", __FUNCTION__)); if (sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; return sna_tiling_copy_boxes(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } static void gen8_render_copy_blt(struct sna *sna, const struct sna_copy_op *op, int16_t sx, int16_t sy, int16_t w, int16_t h, int16_t dx, int16_t dy) { int16_t *v; gen8_get_rectangles(sna, &op->base, 1, gen8_emit_copy_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = dx+w; v[1] = dy+h; v[2] = sx+w; v[3] = sy+h; v[4] = dx; v[5] = dy+h; v[6] = sx; v[7] = sy+h; v[8] = dx; v[9] = dy; v[10] = sx; v[11] = sy; } static void gen8_render_copy_done(struct sna *sna, const struct sna_copy_op *op) { if (sna->render.vertex_offset) gen8_vertex_flush(sna); } static bool gen8_render_copy(struct sna *sna, uint8_t alu, PixmapPtr src, struct kgem_bo *src_bo, PixmapPtr dst, struct kgem_bo *dst_bo, struct sna_copy_op *op) { DBG(("%s (alu=%d, src=(%dx%d), dst=(%dx%d))\n", __FUNCTION__, alu, src->drawable.width, src->drawable.height, dst->drawable.width, dst->drawable.height)); if (prefer_blt_copy(sna, src_bo, dst_bo, 0) && sna_blt_compare_depth(&src->drawable, &dst->drawable) && sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op)) return true; if (!(alu == GXcopy || alu == GXclear) || src_bo == dst_bo || too_large(src->drawable.width, src->drawable.height) || too_large(dst->drawable.width, dst->drawable.height) || unaligned(src_bo, src->drawable.bitsPerPixel) || unaligned(dst_bo, dst->drawable.bitsPerPixel)) { fallback: if (!sna_blt_compare_depth(&src->drawable, &dst->drawable)) return false; return sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op); } if (dst->drawable.depth == src->drawable.depth) { op->base.dst.format = sna_render_format_for_depth(dst->drawable.depth); op->base.src.pict_format = op->base.dst.format; } else { op->base.dst.format = sna_format_for_depth(dst->drawable.depth); op->base.src.pict_format = sna_format_for_depth(src->drawable.depth); } if (!gen8_check_format(op->base.src.pict_format)) goto fallback; op->base.dst.pixmap = dst; op->base.dst.width = dst->drawable.width; op->base.dst.height = dst->drawable.height; op->base.dst.bo = dst_bo; op->base.src.bo = src_bo; op->base.src.card_format = gen8_get_card_format(op->base.src.pict_format); op->base.src.width = src->drawable.width; op->base.src.height = src->drawable.height; op->base.mask.bo = NULL; op->base.floats_per_vertex = 2; op->base.floats_per_rect = 6; op->base.u.gen8.flags = COPY_FLAGS(alu); kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) goto fallback; _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen8_align_vertex(sna, &op->base); gen8_emit_copy_state(sna, &op->base); op->blt = gen8_render_copy_blt; op->done = gen8_render_copy_done; return true; } static void gen8_emit_fill_state(struct sna *sna, const struct sna_composite_op *op) { uint32_t *binding_table; uint16_t offset, dirty; /* XXX Render Target Fast Clear * Set RTFC Enable in PS and render a rectangle. * Limited to a clearing the full MSC surface only with a * specific kernel. */ gen8_get_batch(sna, op); binding_table = gen8_composite_get_binding_table(sna, &offset); dirty = kgem_bo_is_dirty(op->dst.bo); binding_table[0] = gen8_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen8_get_dest_format(op->dst.format), true); binding_table[1] = gen8_bind_bo(sna, op->src.bo, 1, 1, SURFACEFORMAT_B8G8R8A8_UNORM, false); if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen8.surface_table) == *(uint64_t*)binding_table) { sna->kgem.surface += SURFACE_DW; offset = sna->render_state.gen8.surface_table; } if (sna->kgem.batch[sna->render_state.gen8.surface_table] == binding_table[0]) dirty = 0; gen8_emit_state(sna, op, offset | dirty); } static bool gen8_render_fill_boxes(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n) { struct sna_composite_op tmp; uint32_t pixel; DBG(("%s (op=%d, color=(%04x, %04x, %04x, %04x) [%08x])\n", __FUNCTION__, op, color->red, color->green, color->blue, color->alpha, (int)format)); if (op >= ARRAY_SIZE(gen8_blend_op)) { DBG(("%s: fallback due to unhandled blend op: %d\n", __FUNCTION__, op)); return false; } if (prefer_blt_fill(sna, dst_bo, FILL_BOXES) || !gen8_check_dst_format(format) || unaligned(dst_bo, PICT_FORMAT_BPP(format))) { uint8_t alu = GXinvalid; if (op <= PictOpSrc) { pixel = 0; if (op == PictOpClear) alu = GXclear; else if (sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, format)) alu = GXcopy; } if (alu != GXinvalid && sna_blt_fill_boxes(sna, alu, dst_bo, dst->bitsPerPixel, pixel, box, n)) return true; if (!gen8_check_dst_format(format)) return false; } if (op == PictOpClear) { pixel = 0; op = PictOpSrc; } else if (!sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, PICT_a8r8g8b8)) return false; DBG(("%s(%08x x %d [(%d, %d), (%d, %d) ...])\n", __FUNCTION__, pixel, n, box[0].x1, box[0].y1, box[0].x2, box[0].y2)); tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.format = format; tmp.dst.bo = dst_bo; tmp.dst.x = tmp.dst.y = 0; tmp.damage = NULL; sna_render_composite_redirect_init(&tmp); if (too_large(dst->width, dst->height)) { BoxRec extents; boxes_extents(box, n, &extents); if (!sna_render_composite_redirect(sna, &tmp, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1, n > 1)) return sna_tiling_fill_boxes(sna, op, format, color, dst, dst_bo, box, n); } tmp.src.bo = sna_render_get_solid(sna, pixel); tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = false; tmp.u.gen8.flags = FILL_FLAGS(op, format); kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); tmp.src.bo = NULL; if (tmp.redirect.real_bo) { kgem_bo_destroy(&sna->kgem, tmp.dst.bo); tmp.redirect.real_bo = NULL; } return false; } _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen8_align_vertex(sna, &tmp); gen8_emit_fill_state(sna, &tmp); do { int n_this_time; int16_t *v; n_this_time = gen8_get_rectangles(sna, &tmp, n, gen8_emit_fill_state); n -= n_this_time; v = (int16_t *)(sna->render.vertices + sna->render.vertex_used); sna->render.vertex_used += 6 * n_this_time; assert(sna->render.vertex_used <= sna->render.vertex_size); do { DBG((" (%d, %d), (%d, %d)\n", box->x1, box->y1, box->x2, box->y2)); v[0] = box->x2; v[5] = v[1] = box->y2; v[8] = v[4] = box->x1; v[9] = box->y1; v[2] = v[3] = v[7] = 1; v[6] = v[10] = v[11] = 0; v += 12; box++; } while (--n_this_time); } while (n); gen8_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); sna_render_composite_redirect_done(sna, &tmp); return true; } static void gen8_render_fill_op_blt(struct sna *sna, const struct sna_fill_op *op, int16_t x, int16_t y, int16_t w, int16_t h) { int16_t *v; DBG(("%s: (%d, %d)x(%d, %d)\n", __FUNCTION__, x, y, w, h)); gen8_get_rectangles(sna, &op->base, 1, gen8_emit_fill_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = x+w; v[4] = v[8] = x; v[1] = v[5] = y+h; v[9] = y; v[2] = v[3] = v[7] = 1; v[6] = v[10] = v[11] = 0; } fastcall static void gen8_render_fill_op_box(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box) { int16_t *v; DBG(("%s: (%d, %d),(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); gen8_get_rectangles(sna, &op->base, 1, gen8_emit_fill_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = box->x2; v[8] = v[4] = box->x1; v[5] = v[1] = box->y2; v[9] = box->y1; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; } fastcall static void gen8_render_fill_op_boxes(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box, int nbox) { DBG(("%s: (%d, %d),(%d, %d)... x %d\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, nbox)); do { int nbox_this_time; int16_t *v; nbox_this_time = gen8_get_rectangles(sna, &op->base, nbox, gen8_emit_fill_state); nbox -= nbox_this_time; v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6 * nbox_this_time; assert(sna->render.vertex_used <= sna->render.vertex_size); do { v[0] = box->x2; v[8] = v[4] = box->x1; v[5] = v[1] = box->y2; v[9] = box->y1; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; box++; v += 12; } while (--nbox_this_time); } while (nbox); } static void gen8_render_fill_op_done(struct sna *sna, const struct sna_fill_op *op) { if (sna->render.vertex_offset) gen8_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, op->base.src.bo); } static bool gen8_render_fill(struct sna *sna, uint8_t alu, PixmapPtr dst, struct kgem_bo *dst_bo, uint32_t color, unsigned flags, struct sna_fill_op *op) { DBG(("%s: (alu=%d, color=%x)\n", __FUNCTION__, alu, color)); if (prefer_blt_fill(sna, dst_bo, flags) && sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, op)) return true; if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height) || unaligned(dst_bo, dst->drawable.bitsPerPixel)) return sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, op); if (alu == GXclear) color = 0; op->base.dst.pixmap = dst; op->base.dst.width = dst->drawable.width; op->base.dst.height = dst->drawable.height; op->base.dst.format = sna_format_for_depth(dst->drawable.depth); op->base.dst.bo = dst_bo; op->base.dst.x = op->base.dst.y = 0; op->base.src.bo = sna_render_get_solid(sna, sna_rgba_for_color(color, dst->drawable.depth)); op->base.mask.bo = NULL; op->base.need_magic_ca_pass = false; op->base.floats_per_vertex = 2; op->base.floats_per_rect = 6; op->base.u.gen8.flags = FILL_FLAGS_NOBLEND; kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_bo_destroy(&sna->kgem, op->base.src.bo); return false; } _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen8_align_vertex(sna, &op->base); gen8_emit_fill_state(sna, &op->base); op->blt = gen8_render_fill_op_blt; op->box = gen8_render_fill_op_box; op->boxes = gen8_render_fill_op_boxes; op->points = NULL; op->done = gen8_render_fill_op_done; return true; } static bool gen8_render_fill_one_try_blt(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { BoxRec box; box.x1 = x1; box.y1 = y1; box.x2 = x2; box.y2 = y2; return sna_blt_fill_boxes(sna, alu, bo, dst->drawable.bitsPerPixel, color, &box, 1); } static bool gen8_render_fill_one(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { struct sna_composite_op tmp; int16_t *v; /* Prefer to use the BLT if already engaged */ if (prefer_blt_fill(sna, bo, FILL_BOXES) && gen8_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu)) return true; /* Must use the BLT if we can't RENDER... */ if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height) || unaligned(bo, dst->drawable.bitsPerPixel)) return gen8_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu); if (alu == GXclear) color = 0; tmp.dst.pixmap = dst; tmp.dst.width = dst->drawable.width; tmp.dst.height = dst->drawable.height; tmp.dst.format = sna_format_for_depth(dst->drawable.depth); tmp.dst.bo = bo; tmp.dst.x = tmp.dst.y = 0; tmp.src.bo = sna_render_get_solid(sna, sna_rgba_for_color(color, dst->drawable.depth)); tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = false; tmp.u.gen8.flags = FILL_FLAGS_NOBLEND; kgem_set_mode(&sna->kgem, KGEM_RENDER, bo); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_submit(&sna->kgem); if (kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); return false; } _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen8_align_vertex(sna, &tmp); gen8_emit_fill_state(sna, &tmp); gen8_get_rectangles(sna, &tmp, 1, gen8_emit_fill_state); DBG((" (%d, %d), (%d, %d)\n", x1, y1, x2, y2)); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = x2; v[8] = v[4] = x1; v[5] = v[1] = y2; v[9] = y1; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; gen8_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; } static bool gen8_render_clear_try_blt(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo) { BoxRec box; box.x1 = 0; box.y1 = 0; box.x2 = dst->drawable.width; box.y2 = dst->drawable.height; return sna_blt_fill_boxes(sna, GXclear, bo, dst->drawable.bitsPerPixel, 0, &box, 1); } static bool gen8_render_clear(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo) { struct sna_composite_op tmp; int16_t *v; DBG(("%s: %dx%d\n", __FUNCTION__, dst->drawable.width, dst->drawable.height)); /* Prefer to use the BLT if already engaged */ if (sna->kgem.mode == KGEM_BLT && gen8_render_clear_try_blt(sna, dst, bo)) return true; /* Must use the BLT if we can't RENDER... */ if (too_large(dst->drawable.width, dst->drawable.height) || unaligned(bo, dst->drawable.bitsPerPixel)) return gen8_render_clear_try_blt(sna, dst, bo); tmp.dst.pixmap = dst; tmp.dst.width = dst->drawable.width; tmp.dst.height = dst->drawable.height; tmp.dst.format = sna_format_for_depth(dst->drawable.depth); tmp.dst.bo = bo; tmp.dst.x = tmp.dst.y = 0; tmp.src.bo = sna_render_get_solid(sna, 0); tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = false; tmp.u.gen8.flags = FILL_FLAGS_NOBLEND; kgem_set_mode(&sna->kgem, KGEM_RENDER, bo); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); return false; } _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen8_align_vertex(sna, &tmp); gen8_emit_fill_state(sna, &tmp); gen8_get_rectangles(sna, &tmp, 1, gen8_emit_fill_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = dst->drawable.width; v[5] = v[1] = dst->drawable.height; v[8] = v[4] = 0; v[9] = 0; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; gen8_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; } #if !NO_VIDEO static uint32_t gen8_bind_video_source(struct sna *sna, struct kgem_bo *bo, uint32_t delta, int width, int height, int pitch, uint32_t format) { uint32_t *ss; int offset; offset = sna->kgem.surface -= SURFACE_DW; ss = sna->kgem.batch + offset; ss[0] = (SURFACE_2D << SURFACE_TYPE_SHIFT | gen8_tiling_bits(bo->tiling) | format << SURFACE_FORMAT_SHIFT | SURFACE_VALIGN_4 | SURFACE_HALIGN_4); ss[1] = 0; ss[2] = ((width - 1) << SURFACE_WIDTH_SHIFT | (height - 1) << SURFACE_HEIGHT_SHIFT); ss[3] = (pitch - 1) << SURFACE_PITCH_SHIFT; ss[4] = 0; ss[5] = 0; ss[6] = 0; ss[7] = SURFACE_SWIZZLE(RED, GREEN, BLUE, ALPHA); *(uint64_t *)(ss+8) = kgem_add_reloc64(&sna->kgem, offset + 8, bo, I915_GEM_DOMAIN_SAMPLER << 16, delta); ss[10] = 0; ss[11] = 0; ss[12] = 0; ss[13] = 0; ss[14] = 0; ss[15] = 0; DBG(("[%x] bind bo(handle=%d, addr=%d), format=%d, width=%d, height=%d, pitch=%d, tiling=%d -> sampler\n", offset, bo->handle, ss[1], format, width, height, bo->pitch, bo->tiling)); return offset * sizeof(uint32_t); } static void gen8_emit_video_state(struct sna *sna, const struct sna_composite_op *op) { struct sna_video_frame *frame = op->priv; uint32_t src_surf_format; uint32_t src_surf_base[6]; int src_width[6]; int src_height[6]; int src_pitch[6]; uint32_t *binding_table; uint16_t offset; int n_src, n; /* XXX VeBox, bicubic */ gen8_get_batch(sna, op); src_surf_base[0] = 0; src_surf_base[1] = 0; src_surf_base[2] = frame->VBufOffset; src_surf_base[3] = frame->VBufOffset; src_surf_base[4] = frame->UBufOffset; src_surf_base[5] = frame->UBufOffset; if (is_planar_fourcc(frame->id)) { src_surf_format = SURFACEFORMAT_R8_UNORM; src_width[1] = src_width[0] = frame->width; src_height[1] = src_height[0] = frame->height; src_pitch[1] = src_pitch[0] = frame->pitch[1]; src_width[4] = src_width[5] = src_width[2] = src_width[3] = frame->width / 2; src_height[4] = src_height[5] = src_height[2] = src_height[3] = frame->height / 2; src_pitch[4] = src_pitch[5] = src_pitch[2] = src_pitch[3] = frame->pitch[0]; n_src = 6; } else { if (frame->id == FOURCC_UYVY) src_surf_format = SURFACEFORMAT_YCRCB_SWAPY; else src_surf_format = SURFACEFORMAT_YCRCB_NORMAL; src_width[0] = frame->width; src_height[0] = frame->height; src_pitch[0] = frame->pitch[0]; n_src = 1; } binding_table = gen8_composite_get_binding_table(sna, &offset); binding_table[0] = gen8_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen8_get_dest_format(op->dst.format), true); for (n = 0; n < n_src; n++) { binding_table[1+n] = gen8_bind_video_source(sna, frame->bo, src_surf_base[n], src_width[n], src_height[n], src_pitch[n], src_surf_format); } gen8_emit_state(sna, op, offset); } static bool gen8_render_video(struct sna *sna, struct sna_video *video, struct sna_video_frame *frame, RegionPtr dstRegion, PixmapPtr pixmap) { struct sna_composite_op tmp; struct sna_pixmap *priv = sna_pixmap(pixmap); int dst_width = dstRegion->extents.x2 - dstRegion->extents.x1; int dst_height = dstRegion->extents.y2 - dstRegion->extents.y1; int src_width = frame->src.x2 - frame->src.x1; int src_height = frame->src.y2 - frame->src.y1; float src_offset_x, src_offset_y; float src_scale_x, src_scale_y; int nbox, pix_xoff, pix_yoff; unsigned filter; const BoxRec *box; DBG(("%s: src=(%d, %d), dst=(%d, %d), %dx[(%d, %d), (%d, %d)...]\n", __FUNCTION__, src_width, src_height, dst_width, dst_height, region_num_rects(dstRegion), REGION_EXTENTS(NULL, dstRegion)->x1, REGION_EXTENTS(NULL, dstRegion)->y1, REGION_EXTENTS(NULL, dstRegion)->x2, REGION_EXTENTS(NULL, dstRegion)->y2)); assert(priv->gpu_bo); assert(!too_large(pixmap->drawable.width, pixmap->drawable.height)); assert(!unaligned(priv->gpu_bo, pixmap->drawable.bitsPerPixel)); memset(&tmp, 0, sizeof(tmp)); tmp.dst.pixmap = pixmap; tmp.dst.width = pixmap->drawable.width; tmp.dst.height = pixmap->drawable.height; tmp.dst.format = sna_render_format_for_depth(pixmap->drawable.depth); tmp.dst.bo = priv->gpu_bo; tmp.src.bo = frame->bo; tmp.mask.bo = NULL; tmp.floats_per_vertex = 3; tmp.floats_per_rect = 9; if (src_width == dst_width && src_height == dst_height) filter = SAMPLER_FILTER_NEAREST; else filter = SAMPLER_FILTER_BILINEAR; tmp.u.gen8.flags = GEN8_SET_FLAGS(SAMPLER_OFFSET(filter, SAMPLER_EXTEND_PAD, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE), NO_BLEND, is_planar_fourcc(frame->id) ? GEN8_WM_KERNEL_VIDEO_PLANAR : GEN8_WM_KERNEL_VIDEO_PACKED, 2); tmp.priv = frame; kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp.dst.bo); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, frame->bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, frame->bo, NULL)) return false; _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen8_align_vertex(sna, &tmp); gen8_emit_video_state(sna, &tmp); /* Set up the offset for translating from the given region (in screen * coordinates) to the backing pixmap. */ #ifdef COMPOSITE pix_xoff = -pixmap->screen_x + pixmap->drawable.x; pix_yoff = -pixmap->screen_y + pixmap->drawable.y; #else pix_xoff = 0; pix_yoff = 0; #endif DBG(("%s: src=(%d, %d)x(%d, %d); frame=(%dx%d), dst=(%dx%d)\n", __FUNCTION__, frame->src.x1, frame->src.y1, src_width, src_height, dst_width, dst_height, frame->width, frame->height)); src_scale_x = (float)src_width / dst_width / frame->width; src_offset_x = (float)frame->src.x1 / frame->width - dstRegion->extents.x1 * src_scale_x; src_scale_y = (float)src_height / dst_height / frame->height; src_offset_y = (float)frame->src.y1 / frame->height - dstRegion->extents.y1 * src_scale_y; DBG(("%s: scale=(%f, %f), offset=(%f, %f)\n", __FUNCTION__, src_scale_x, src_scale_y, src_offset_x, src_offset_y)); box = region_rects(dstRegion); nbox = region_num_rects(dstRegion); while (nbox--) { BoxRec r; DBG(("%s: dst=(%d, %d), (%d, %d) + (%d, %d); src=(%f, %f), (%f, %f)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, pix_xoff, pix_yoff, box->x1 * src_scale_x + src_offset_x, box->y1 * src_scale_y + src_offset_y, box->x2 * src_scale_x + src_offset_x, box->y2 * src_scale_y + src_offset_y)); r.x1 = box->x1 + pix_xoff; r.x2 = box->x2 + pix_xoff; r.y1 = box->y1 + pix_yoff; r.y2 = box->y2 + pix_yoff; gen8_get_rectangles(sna, &tmp, 1, gen8_emit_video_state); OUT_VERTEX(r.x2, r.y2); OUT_VERTEX_F(box->x2 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y); OUT_VERTEX(r.x1, r.y2); OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y); OUT_VERTEX(r.x1, r.y1); OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y1 * src_scale_y + src_offset_y); if (!DAMAGE_IS_ALL(priv->gpu_damage)) { sna_damage_add_box(&priv->gpu_damage, &r); sna_damage_subtract_box(&priv->cpu_damage, &r); } box++; } gen8_vertex_flush(sna); return true; } #endif static void gen8_render_flush(struct sna *sna) { gen8_vertex_close(sna); assert(sna->render.vb_id == 0); assert(sna->render.vertex_offset == 0); } static void gen8_render_reset(struct sna *sna) { sna->render_state.gen8.emit_flush = false; sna->render_state.gen8.needs_invariant = true; sna->render_state.gen8.ve_id = 3 << 2; sna->render_state.gen8.last_primitive = -1; sna->render_state.gen8.num_sf_outputs = 0; sna->render_state.gen8.samplers = -1; sna->render_state.gen8.blend = -1; sna->render_state.gen8.kernel = -1; sna->render_state.gen8.drawrect_offset = -1; sna->render_state.gen8.drawrect_limit = -1; sna->render_state.gen8.surface_table = 0; if (sna->render.vbo && !kgem_bo_can_map(&sna->kgem, sna->render.vbo)) { DBG(("%s: discarding unmappable vbo\n", __FUNCTION__)); discard_vbo(sna); } sna->render.vertex_offset = 0; sna->render.nvertex_reloc = 0; sna->render.vb_id = 0; } static void gen8_render_fini(struct sna *sna) { kgem_bo_destroy(&sna->kgem, sna->render_state.gen8.general_bo); } static bool gen8_render_setup(struct sna *sna) { struct gen8_render_state *state = &sna->render_state.gen8; struct sna_static_stream general; struct gen8_sampler_state *ss; int i, j, k, l, m; uint32_t devid; devid = intel_get_device_id(sna->dev); if (devid & 0xf) state->gt = ((devid >> 4) & 0xf) + 1; DBG(("%s: gt=%d\n", __FUNCTION__, state->gt)); sna_static_stream_init(&general); /* Zero pad the start. If you see an offset of 0x0 in the batchbuffer * dumps, you know it points to zero. */ null_create(&general); for (m = 0; m < ARRAY_SIZE(wm_kernels); m++) { if (wm_kernels[m].size) { state->wm_kernel[m][1] = sna_static_stream_add(&general, wm_kernels[m].data, wm_kernels[m].size, 64); } else { if (USE_8_PIXEL_DISPATCH) { state->wm_kernel[m][0] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 8); } if (USE_16_PIXEL_DISPATCH) { state->wm_kernel[m][1] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 16); } if (USE_32_PIXEL_DISPATCH) { state->wm_kernel[m][2] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 32); } } assert(state->wm_kernel[m][0]|state->wm_kernel[m][1]|state->wm_kernel[m][2]); } COMPILE_TIME_ASSERT(SAMPLER_OFFSET(FILTER_COUNT, EXTEND_COUNT, FILTER_COUNT, EXTEND_COUNT) <= 0x7ff); ss = sna_static_stream_map(&general, 2 * sizeof(*ss) * (2 + FILTER_COUNT * EXTEND_COUNT * FILTER_COUNT * EXTEND_COUNT), 32); state->wm_state = sna_static_stream_offsetof(&general, ss); sampler_copy_init(ss); ss += 2; sampler_fill_init(ss); ss += 2; for (i = 0; i < FILTER_COUNT; i++) { for (j = 0; j < EXTEND_COUNT; j++) { for (k = 0; k < FILTER_COUNT; k++) { for (l = 0; l < EXTEND_COUNT; l++) { sampler_state_init(ss++, i, j); sampler_state_init(ss++, k, l); } } } } state->cc_blend = gen8_create_blend_state(&general); state->general_bo = sna_static_stream_fini(sna, &general); return state->general_bo != NULL; } const char *gen8_render_init(struct sna *sna, const char *backend) { if (!gen8_render_setup(sna)) return backend; sna->kgem.context_switch = gen6_render_context_switch; sna->kgem.retire = gen6_render_retire; sna->kgem.expire = gen4_render_expire; #if !NO_COMPOSITE sna->render.composite = gen8_render_composite; sna->render.prefer_gpu |= PREFER_GPU_RENDER; #endif #if !NO_COMPOSITE_SPANS sna->render.check_composite_spans = gen8_check_composite_spans; sna->render.composite_spans = gen8_render_composite_spans; sna->render.prefer_gpu |= PREFER_GPU_SPANS; #endif #if !NO_VIDEO sna->render.video = gen8_render_video; #endif #if !NO_COPY_BOXES sna->render.copy_boxes = gen8_render_copy_boxes; #endif #if !NO_COPY sna->render.copy = gen8_render_copy; #endif #if !NO_FILL_BOXES sna->render.fill_boxes = gen8_render_fill_boxes; #endif #if !NO_FILL sna->render.fill = gen8_render_fill; #endif #if !NO_FILL_ONE sna->render.fill_one = gen8_render_fill_one; #endif #if !NO_FILL_CLEAR sna->render.clear = gen8_render_clear; #endif sna->render.flush = gen8_render_flush; sna->render.reset = gen8_render_reset; sna->render.fini = gen8_render_fini; sna->render.max_3d_size = GEN8_MAX_SIZE; sna->render.max_3d_pitch = 1 << 18; return "Broadwell"; } xf86-video-intel-2.99.917/src/sna/sna_video_hwmc.c0000664000175000017500000001457512432737457016462 00000000000000/* * Copyright © 2007 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Zhenyu Wang * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #define _SNA_XVMC_SERVER_ #include "sna.h" #include "sna_video_hwmc.h" #include #include #include extern DevPrivateKey XF86XvScreenKey; static int create_subpicture(XvMCSubpicturePtr sub, int *size, CARD32 **priv) { return Success; } static void destroy_subpicture(XvMCSubpicturePtr sub) { } static int create_surface(XvMCSurfacePtr surface, int *size, CARD32 **priv) { return Success; } static void destroy_surface(XvMCSurfacePtr surface) { } static int create_context(XvPortPtr port, XvMCContextPtr ctx, int *size, CARD32 **out) { struct sna *sna = to_sna_from_screen(ctx->pScreen); struct intel_xvmc_hw_context { unsigned int type; union { struct { unsigned int use_phys_addr : 1; } i915; struct { unsigned int is_g4x:1; unsigned int is_965_q:1; unsigned int is_igdng:1; } i965; }; } *priv; ctx->port_priv = port->devPriv.ptr; priv = calloc(1, sizeof(*priv)); if (priv == NULL) return BadAlloc; if (sna->kgem.gen >= 040) { int devid = intel_get_device_id(sna->dev); if (sna->kgem.gen >= 045) priv->type = XVMC_I965_MPEG2_VLD; else priv->type = XVMC_I965_MPEG2_MC; priv->i965.is_g4x = sna->kgem.gen == 045; priv->i965.is_965_q = devid == PCI_CHIP_I965_Q; priv->i965.is_igdng = sna->kgem.gen == 050; } else priv->type = XVMC_I915_MPEG2_MC; *size = sizeof(*priv) >> 2; *out = (CARD32 *)priv; return Success; } static void destroy_context(XvMCContextPtr ctx) { } /* i915 hwmc support */ static XvMCSurfaceInfoRec i915_YV12_mpg2_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 720, 576, 720, 576, XVMC_MPEG_2, /* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING, */ 0, /* &yv12_subpicture_list */ NULL, }; static XvMCSurfaceInfoRec i915_YV12_mpg1_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 720, 576, 720, 576, XVMC_MPEG_1, /* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING, */ 0, NULL, }; static XvMCSurfaceInfoPtr surface_info_i915[2] = { &i915_YV12_mpg2_surface, &i915_YV12_mpg1_surface }; /* i965 and later hwmc support */ #ifndef XVMC_VLD #define XVMC_VLD 0x00020000 #endif static XvMCSurfaceInfoRec yv12_mpeg2_vld_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 1936, 1096, 1920, 1080, XVMC_MPEG_2 | XVMC_VLD, XVMC_INTRA_UNSIGNED, NULL }; static XvMCSurfaceInfoRec yv12_mpeg2_i965_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 1936, 1096, 1920, 1080, XVMC_MPEG_2 | XVMC_MOCOMP, /* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING, */ XVMC_INTRA_UNSIGNED, /* &yv12_subpicture_list */ NULL }; static XvMCSurfaceInfoRec yv12_mpeg1_i965_surface = { FOURCC_YV12, XVMC_CHROMA_FORMAT_420, 0, 1920, 1080, 1920, 1080, XVMC_MPEG_1 | XVMC_MOCOMP, /*XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING | XVMC_INTRA_UNSIGNED, */ XVMC_INTRA_UNSIGNED, /*&yv12_subpicture_list */ NULL }; static XvMCSurfaceInfoPtr surface_info_i965[] = { &yv12_mpeg2_i965_surface, &yv12_mpeg1_i965_surface }; static XvMCSurfaceInfoPtr surface_info_vld[] = { &yv12_mpeg2_vld_surface, &yv12_mpeg2_i965_surface, }; /* check chip type and load xvmc driver */ void sna_video_xvmc_setup(struct sna *sna, ScreenPtr screen) { XvMCAdaptorRec *adaptors; struct pci_device *pci; const char *name; char bus[64]; int i; pci = xf86GetPciInfoForEntity(sna->pEnt->index); if (pci == NULL) return; if (!sna->xv.num_adaptors) return; if (!xf86LoaderCheckSymbol("XvMCScreenInit")) return; /* Needs KMS support. */ if (sna->kgem.gen < 031) return; /* Not implemented */ if (sna->kgem.gen >= 060) return; adaptors = calloc(sna->xv.num_adaptors, sizeof(XvMCAdaptorRec)); if (adaptors == NULL) return; for (i = 0; i< sna->xv.num_adaptors; i++) { adaptors[i].xv_adaptor = &sna->xv.adaptors[i]; adaptors[i].num_subpictures = 0; adaptors[i].subpictures = NULL; adaptors[i].CreateContext = create_context; adaptors[i].DestroyContext = destroy_context; adaptors[i].CreateSurface = create_surface; adaptors[i].DestroySurface = destroy_surface; adaptors[i].CreateSubpicture = create_subpicture; adaptors[i].DestroySubpicture = destroy_subpicture; if (sna->kgem.gen >= 045) { adaptors[i].num_surfaces = ARRAY_SIZE(surface_info_vld); adaptors[i].surfaces = surface_info_vld; } else if (sna->kgem.gen >= 040) { adaptors[i].num_surfaces = ARRAY_SIZE(surface_info_i965); adaptors[i].surfaces = surface_info_i965; } else { adaptors[i].num_surfaces = ARRAY_SIZE(surface_info_i915); adaptors[i].surfaces = surface_info_i915; } } if (XvMCScreenInit(screen, i, adaptors) != Success) { xf86DrvMsg(sna->scrn->scrnIndex, X_INFO, "[XvMC] Failed to initialize XvMC.\n"); free(adaptors); return; } sprintf(bus, "pci:%04x:%02x:%02x.%d", pci->domain, pci->bus, pci->dev, pci->func); xf86XvMCRegisterDRInfo(screen, (char *)SNA_XVMC_LIBNAME, bus, SNA_XVMC_MAJOR, SNA_XVMC_MINOR, SNA_XVMC_PATCHLEVEL); if (sna->kgem.gen >= 045) name = "xvmc_vld"; else if (sna->kgem.gen >= 040) name = "i965_xvmc"; else name = "i915_xvmc"; xf86DrvMsg(sna->scrn->scrnIndex, X_INFO, "[XvMC] %s driver initialized.\n", name); } xf86-video-intel-2.99.917/src/sna/kgem.c0000664000175000017500000056605312441617165014414 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_reg.h" #include #include #include #include #include #include #include #include #include #ifdef HAVE_VALGRIND #include #include #endif #ifdef HAVE_STRUCT_SYSINFO_TOTALRAM #include #endif #include "sna_cpuid.h" static struct kgem_bo * search_linear_cache(struct kgem *kgem, unsigned int num_pages, unsigned flags); static struct kgem_bo * search_snoop_cache(struct kgem *kgem, unsigned int num_pages, unsigned flags); #define DBG_NO_HW 0 #define DBG_NO_EXEC 0 #define DBG_NO_TILING 0 #define DBG_NO_CACHE 0 #define DBG_NO_SNOOP_CACHE 0 #define DBG_NO_CACHE_LEVEL 0 #define DBG_NO_CPU 0 #define DBG_NO_CREATE2 0 #define DBG_NO_USERPTR 0 #define DBG_NO_UNSYNCHRONIZED_USERPTR 0 #define DBG_NO_LLC 0 #define DBG_NO_SEMAPHORES 0 #define DBG_NO_MADV 0 #define DBG_NO_UPLOAD_CACHE 0 #define DBG_NO_UPLOAD_ACTIVE 0 #define DBG_NO_MAP_UPLOAD 0 #define DBG_NO_RELAXED_FENCING 0 #define DBG_NO_SECURE_BATCHES 0 #define DBG_NO_PINNED_BATCHES 0 #define DBG_NO_SHRINK_BATCHES 0 #define DBG_NO_FAST_RELOC 0 #define DBG_NO_HANDLE_LUT 0 #define DBG_NO_WT 0 #define DBG_NO_WC_MMAP 0 #define DBG_DUMP 0 #define DBG_NO_MALLOC_CACHE 0 #define FORCE_MMAP_SYNC 0 /* ((1 << DOMAIN_CPU) | (1 << DOMAIN_GTT)) */ #ifndef DEBUG_SYNC #define DEBUG_SYNC 0 #endif #define SHOW_BATCH_BEFORE 0 #define SHOW_BATCH_AFTER 0 #if !USE_WC_MMAP #undef DBG_NO_WC_MMAP #define DBG_NO_WC_MMAP 1 #endif #if 0 #define ASSERT_IDLE(kgem__, handle__) assert(!__kgem_busy(kgem__, handle__)) #define ASSERT_MAYBE_IDLE(kgem__, handle__, expect__) assert(!(expect__) || !__kgem_busy(kgem__, handle__)) #else #define ASSERT_IDLE(kgem__, handle__) #define ASSERT_MAYBE_IDLE(kgem__, handle__, expect__) #endif /* Worst case seems to be 965gm where we cannot write within a cacheline that * is being simultaneously being read by the GPU, or within the sampler * prefetch. In general, the chipsets seem to have a requirement that sampler * offsets be aligned to a cacheline (64 bytes). * * Actually, it turns out the BLT color pattern (BR15) has the most severe * alignment restrictions, 64 bytes for 8-bpp, 128 bytes for 16-bpp and 256 * bytes for 32-bpp. */ #define UPLOAD_ALIGNMENT 256 #define PAGE_ALIGN(x) ALIGN(x, PAGE_SIZE) #define NUM_PAGES(x) (((x) + PAGE_SIZE-1) / PAGE_SIZE) #define MAX_GTT_VMA_CACHE 512 #define MAX_CPU_VMA_CACHE INT16_MAX #define MAP_PRESERVE_TIME 10 #define MAKE_USER_MAP(ptr) ((void*)((uintptr_t)(ptr) | 1)) #define IS_USER_MAP(ptr) ((uintptr_t)(ptr) & 1) #define LOCAL_I915_PARAM_HAS_BLT 11 #define LOCAL_I915_PARAM_HAS_RELAXED_FENCING 12 #define LOCAL_I915_PARAM_HAS_RELAXED_DELTA 15 #define LOCAL_I915_PARAM_HAS_LLC 17 #define LOCAL_I915_PARAM_HAS_SEMAPHORES 20 #define LOCAL_I915_PARAM_HAS_SECURE_BATCHES 23 #define LOCAL_I915_PARAM_HAS_PINNED_BATCHES 24 #define LOCAL_I915_PARAM_HAS_NO_RELOC 25 #define LOCAL_I915_PARAM_HAS_HANDLE_LUT 26 #define LOCAL_I915_PARAM_HAS_WT 27 #define LOCAL_I915_PARAM_MMAP_VERSION 30 #define LOCAL_I915_EXEC_IS_PINNED (1<<10) #define LOCAL_I915_EXEC_NO_RELOC (1<<11) #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12) #define LOCAL_I915_GEM_CREATE2 0x34 #define LOCAL_IOCTL_I915_GEM_CREATE2 DRM_IOWR (DRM_COMMAND_BASE + LOCAL_I915_GEM_CREATE2, struct local_i915_gem_create2) struct local_i915_gem_create2 { uint64_t size; uint32_t placement; #define LOCAL_I915_CREATE_PLACEMENT_SYSTEM 0 #define LOCAL_I915_CREATE_PLACEMENT_STOLEN 1 /* Cannot use CPU mmaps or pread/pwrite */ uint32_t domain; uint32_t caching; uint32_t tiling_mode; uint32_t stride; uint32_t flags; uint32_t pad; uint32_t handle; }; #define LOCAL_I915_GEM_USERPTR 0x33 #define LOCAL_IOCTL_I915_GEM_USERPTR DRM_IOWR (DRM_COMMAND_BASE + LOCAL_I915_GEM_USERPTR, struct local_i915_gem_userptr) struct local_i915_gem_userptr { uint64_t user_ptr; uint64_t user_size; uint32_t flags; #define I915_USERPTR_READ_ONLY 0x1 #define I915_USERPTR_UNSYNCHRONIZED 0x80000000 uint32_t handle; }; #define UNCACHED 0 #define SNOOPED 1 #define DISPLAY 2 struct local_i915_gem_caching { uint32_t handle; uint32_t caching; }; #define LOCAL_I915_GEM_SET_CACHING 0x2f #define LOCAL_I915_GEM_GET_CACHING 0x30 #define LOCAL_IOCTL_I915_GEM_SET_CACHING DRM_IOW(DRM_COMMAND_BASE + LOCAL_I915_GEM_SET_CACHING, struct local_i915_gem_caching) #define LOCAL_IOCTL_I915_GEM_GET_CACHING DRM_IOW(DRM_COMMAND_BASE + LOCAL_I915_GEM_GET_CACHING, struct local_i915_gem_caching) struct local_i915_gem_mmap2 { uint32_t handle; uint32_t pad; uint64_t offset; uint64_t size; uint64_t addr_ptr; uint64_t flags; #define I915_MMAP_WC 0x1 }; #define LOCAL_IOCTL_I915_GEM_MMAP_v2 DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct local_i915_gem_mmap2) struct kgem_buffer { struct kgem_bo base; void *mem; uint32_t used; uint32_t need_io : 1; uint32_t write : 2; uint32_t mmapped : 2; }; enum { MMAPPED_NONE, MMAPPED_GTT, MMAPPED_CPU }; static struct kgem_bo *__kgem_freed_bo; static struct kgem_request *__kgem_freed_request; static struct drm_i915_gem_exec_object2 _kgem_dummy_exec; static inline int bytes(struct kgem_bo *bo) { return __kgem_bo_size(bo); } #define bucket(B) (B)->size.pages.bucket #define num_pages(B) (B)->size.pages.count static int do_ioctl(int fd, unsigned long req, void *arg) { int err; restart: if (ioctl(fd, req, arg) == 0) return 0; err = errno; if (err == EINTR) goto restart; if (err == EAGAIN) { sched_yield(); goto restart; } return -err; } #ifdef DEBUG_MEMORY static void debug_alloc(struct kgem *kgem, size_t size) { kgem->debug_memory.bo_allocs++; kgem->debug_memory.bo_bytes += size; } static void debug_alloc__bo(struct kgem *kgem, struct kgem_bo *bo) { debug_alloc(kgem, bytes(bo)); } #else #define debug_alloc__bo(k, b) #endif #ifndef NDEBUG static void assert_tiling(struct kgem *kgem, struct kgem_bo *bo) { struct drm_i915_gem_get_tiling tiling; assert(bo); VG_CLEAR(tiling); tiling.handle = bo->handle; tiling.tiling_mode = bo->tiling; (void)do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_GET_TILING, &tiling); assert(tiling.tiling_mode == bo->tiling); } static void assert_cacheing(struct kgem *kgem, struct kgem_bo *bo) { struct local_i915_gem_caching arg; int expect = kgem->has_llc ? SNOOPED : UNCACHED; VG_CLEAR(arg); arg.handle = bo->handle; arg.caching = expect; (void)do_ioctl(kgem->fd, LOCAL_IOCTL_I915_GEM_GET_CACHING, &arg); assert(arg.caching == expect); } static void assert_bo_retired(struct kgem_bo *bo) { DBG(("%s: handle=%d, domain: %d exec? %d, rq? %d\n", __FUNCTION__, bo->handle, bo->domain, bo->exec != NULL, bo->rq != NULL)); assert(bo->refcnt); assert(bo->rq == NULL); assert(bo->exec == NULL); assert(list_is_empty(&bo->request)); } #else #define assert_tiling(kgem, bo) #define assert_cacheing(kgem, bo) #define assert_bo_retired(bo) #endif static void __kgem_set_wedged(struct kgem *kgem) { kgem->wedged = true; sna_render_mark_wedged(container_of(kgem, struct sna, kgem)); } static void kgem_sna_reset(struct kgem *kgem) { struct sna *sna = container_of(kgem, struct sna, kgem); sna->render.reset(sna); sna->blt_state.fill_bo = 0; } static void kgem_sna_flush(struct kgem *kgem) { struct sna *sna = container_of(kgem, struct sna, kgem); sna->render.flush(sna); if (sna->render.solid_cache.dirty) sna_render_flush_solid(sna); } static bool gem_set_tiling(int fd, uint32_t handle, int tiling, int stride) { struct drm_i915_gem_set_tiling set_tiling; int err; if (DBG_NO_TILING) return false; VG_CLEAR(set_tiling); restart: set_tiling.handle = handle; set_tiling.tiling_mode = tiling; set_tiling.stride = stride; if (ioctl(fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling) == 0) return true; err = errno; if (err == EINTR) goto restart; if (err == EAGAIN) { sched_yield(); goto restart; } return false; } static bool gem_set_caching(int fd, uint32_t handle, int caching) { struct local_i915_gem_caching arg; VG_CLEAR(arg); arg.handle = handle; arg.caching = caching; return do_ioctl(fd, LOCAL_IOCTL_I915_GEM_SET_CACHING, &arg) == 0; } static uint32_t gem_userptr(int fd, void *ptr, int size, int read_only) { struct local_i915_gem_userptr arg; VG_CLEAR(arg); arg.user_ptr = (uintptr_t)ptr; arg.user_size = size; arg.flags = I915_USERPTR_UNSYNCHRONIZED; if (read_only) arg.flags |= I915_USERPTR_READ_ONLY; if (DBG_NO_UNSYNCHRONIZED_USERPTR || do_ioctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &arg)) { arg.flags &= ~I915_USERPTR_UNSYNCHRONIZED; if (do_ioctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &arg)) { DBG(("%s: failed to map %p + %d bytes: %d\n", __FUNCTION__, ptr, size, errno)); return 0; } } return arg.handle; } static bool __kgem_throttle(struct kgem *kgem, bool harder) { /* Let this be woken up by sigtimer so that we don't block here * too much and completely starve X. We will sleep again shortly, * and so catch up or detect the hang. */ do { if (ioctl(kgem->fd, DRM_IOCTL_I915_GEM_THROTTLE) == 0) { kgem->need_throttle = 0; return false; } if (errno == EIO) return true; } while (harder); return false; } static bool __kgem_throttle_retire(struct kgem *kgem, unsigned flags) { if (flags & CREATE_NO_RETIRE || !kgem->need_retire) { DBG(("%s: not retiring\n", __FUNCTION__)); return false; } if (kgem_retire(kgem)) return true; if (flags & CREATE_NO_THROTTLE || !kgem->need_throttle) { DBG(("%s: not throttling\n", __FUNCTION__)); return false; } __kgem_throttle(kgem, false); return kgem_retire(kgem); } static void *__kgem_bo_map__gtt(struct kgem *kgem, struct kgem_bo *bo) { struct drm_i915_gem_mmap_gtt gtt; void *ptr; int err; DBG(("%s(handle=%d, size=%d)\n", __FUNCTION__, bo->handle, bytes(bo))); VG_CLEAR(gtt); retry_gtt: gtt.handle = bo->handle; if ((err = do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_MMAP_GTT, >t))) { assert(err != EINVAL); (void)__kgem_throttle_retire(kgem, 0); if (kgem_expire_cache(kgem)) goto retry_gtt; if (kgem_cleanup_cache(kgem)) goto retry_gtt; ERR(("%s: failed to retrieve GTT offset for handle=%d: %d\n", __FUNCTION__, bo->handle, -err)); return NULL; } retry_mmap: ptr = mmap(0, bytes(bo), PROT_READ | PROT_WRITE, MAP_SHARED, kgem->fd, gtt.offset); if (ptr == MAP_FAILED) { err = errno; assert(err != EINVAL); if (__kgem_throttle_retire(kgem, 0)) goto retry_mmap; if (kgem_cleanup_cache(kgem)) goto retry_mmap; ERR(("%s: failed to mmap handle=%d, %d bytes, into GTT domain: %d\n", __FUNCTION__, bo->handle, bytes(bo), err)); ptr = NULL; } /* Cache this mapping to avoid the overhead of an * excruciatingly slow GTT pagefault. This is more an * issue with compositing managers which need to * frequently flush CPU damage to their GPU bo. */ return bo->map__gtt = ptr; } static void *__kgem_bo_map__wc(struct kgem *kgem, struct kgem_bo *bo) { struct local_i915_gem_mmap2 wc; int err; DBG(("%s(handle=%d, size=%d)\n", __FUNCTION__, bo->handle, bytes(bo))); assert(kgem->has_wc_mmap); VG_CLEAR(wc); retry_wc: wc.handle = bo->handle; wc.offset = 0; wc.size = bytes(bo); wc.flags = I915_MMAP_WC; if ((err = do_ioctl(kgem->fd, LOCAL_IOCTL_I915_GEM_MMAP_v2, &wc))) { assert(err != EINVAL); if (__kgem_throttle_retire(kgem, 0)) goto retry_wc; if (kgem_cleanup_cache(kgem)) goto retry_wc; ERR(("%s: failed to mmap handle=%d, %d bytes, into CPU(wc) domain: %d\n", __FUNCTION__, bo->handle, bytes(bo), -err)); return NULL; } VG(VALGRIND_MAKE_MEM_DEFINED(wc.addr_ptr, bytes(bo))); DBG(("%s: caching CPU(wc) vma for %d\n", __FUNCTION__, bo->handle)); return bo->map__wc = (void *)(uintptr_t)wc.addr_ptr; } static void *__kgem_bo_map__cpu(struct kgem *kgem, struct kgem_bo *bo) { struct drm_i915_gem_mmap mmap_arg; int err; retry: VG_CLEAR(mmap_arg); mmap_arg.handle = bo->handle; mmap_arg.offset = 0; mmap_arg.size = bytes(bo); if ((err = do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_MMAP, &mmap_arg))) { assert(err != EINVAL); if (__kgem_throttle_retire(kgem, 0)) goto retry; if (kgem_cleanup_cache(kgem)) goto retry; ERR(("%s: failed to mmap handle=%d, %d bytes, into CPU domain: %d\n", __FUNCTION__, bo->handle, bytes(bo), -err)); return NULL; } VG(VALGRIND_MAKE_MEM_DEFINED(mmap_arg.addr_ptr, bytes(bo))); DBG(("%s: caching CPU vma for %d\n", __FUNCTION__, bo->handle)); return bo->map__cpu = (void *)(uintptr_t)mmap_arg.addr_ptr; } static int gem_write(int fd, uint32_t handle, int offset, int length, const void *src) { struct drm_i915_gem_pwrite pwrite; DBG(("%s(handle=%d, offset=%d, len=%d)\n", __FUNCTION__, handle, offset, length)); VG_CLEAR(pwrite); pwrite.handle = handle; pwrite.offset = offset; pwrite.size = length; pwrite.data_ptr = (uintptr_t)src; return do_ioctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &pwrite); } static int gem_write__cachealigned(int fd, uint32_t handle, int offset, int length, const void *src) { struct drm_i915_gem_pwrite pwrite; DBG(("%s(handle=%d, offset=%d, len=%d)\n", __FUNCTION__, handle, offset, length)); VG_CLEAR(pwrite); pwrite.handle = handle; /* align the transfer to cachelines; fortuitously this is safe! */ if ((offset | length) & 63) { pwrite.offset = offset & ~63; pwrite.size = ALIGN(offset+length, 64) - pwrite.offset; pwrite.data_ptr = (uintptr_t)src + pwrite.offset - offset; } else { pwrite.offset = offset; pwrite.size = length; pwrite.data_ptr = (uintptr_t)src; } return do_ioctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &pwrite); } static int gem_read(int fd, uint32_t handle, const void *dst, int offset, int length) { struct drm_i915_gem_pread pread; int ret; DBG(("%s(handle=%d, len=%d)\n", __FUNCTION__, handle, length)); VG_CLEAR(pread); pread.handle = handle; pread.offset = offset; pread.size = length; pread.data_ptr = (uintptr_t)dst; ret = do_ioctl(fd, DRM_IOCTL_I915_GEM_PREAD, &pread); if (ret) { DBG(("%s: failed, errno=%d\n", __FUNCTION__, -ret)); return ret; } VG(VALGRIND_MAKE_MEM_DEFINED(dst, length)); return 0; } bool __kgem_busy(struct kgem *kgem, int handle) { struct drm_i915_gem_busy busy; VG_CLEAR(busy); busy.handle = handle; busy.busy = !kgem->wedged; (void)do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_BUSY, &busy); DBG(("%s: handle=%d, busy=%d, wedged=%d\n", __FUNCTION__, handle, busy.busy, kgem->wedged)); return busy.busy; } static void kgem_bo_retire(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: retiring bo handle=%d (needed flush? %d), rq? %d [busy?=%d]\n", __FUNCTION__, bo->handle, bo->needs_flush, bo->rq != NULL, __kgem_busy(kgem, bo->handle))); assert(bo->exec == NULL); assert(list_is_empty(&bo->vma)); if (bo->rq) { __kgem_bo_clear_busy(bo); kgem_retire(kgem); assert_bo_retired(bo); } else { assert(bo->exec == NULL); assert(list_is_empty(&bo->request)); assert(!bo->needs_flush); ASSERT_IDLE(kgem, bo->handle); } } static void kgem_bo_maybe_retire(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: retiring bo handle=%d (needed flush? %d), rq? %d [busy?=%d]\n", __FUNCTION__, bo->handle, bo->needs_flush, bo->rq != NULL, __kgem_busy(kgem, bo->handle))); assert(bo->exec == NULL); assert(list_is_empty(&bo->vma)); if (bo->rq) { if (!__kgem_busy(kgem, bo->handle)) { __kgem_bo_clear_busy(bo); kgem_retire(kgem); } } else { assert(!bo->needs_flush); ASSERT_IDLE(kgem, bo->handle); } } bool kgem_bo_write(struct kgem *kgem, struct kgem_bo *bo, const void *data, int length) { void *ptr; int err; assert(bo->refcnt); assert(bo->proxy == NULL); ASSERT_IDLE(kgem, bo->handle); assert(length <= bytes(bo)); retry: ptr = NULL; if (bo->domain == DOMAIN_CPU || (kgem->has_llc && !bo->scanout)) { ptr = bo->map__cpu; if (ptr == NULL) ptr = __kgem_bo_map__cpu(kgem, bo); } else if (kgem->has_wc_mmap) { ptr = bo->map__wc; if (ptr == NULL) ptr = __kgem_bo_map__wc(kgem, bo); } if (ptr) { /* XXX unsynchronized? */ memcpy(ptr, data, length); return true; } if ((err = gem_write(kgem->fd, bo->handle, 0, length, data))) { assert(err != EINVAL); (void)__kgem_throttle_retire(kgem, 0); if (kgem_expire_cache(kgem)) goto retry; if (kgem_cleanup_cache(kgem)) goto retry; ERR(("%s: failed to write %d bytes into BO handle=%d: %d\n", __FUNCTION__, length, bo->handle, -err)); return false; } DBG(("%s: flush=%d, domain=%d\n", __FUNCTION__, bo->flush, bo->domain)); if (bo->exec == NULL) kgem_bo_maybe_retire(kgem, bo); bo->domain = DOMAIN_NONE; bo->gtt_dirty = true; return true; } static uint32_t gem_create(int fd, int num_pages) { struct drm_i915_gem_create create; VG_CLEAR(create); create.handle = 0; create.size = PAGE_SIZE * num_pages; (void)do_ioctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); return create.handle; } static bool kgem_bo_set_purgeable(struct kgem *kgem, struct kgem_bo *bo) { #if DBG_NO_MADV return true; #else struct drm_i915_gem_madvise madv; assert(bo->exec == NULL); assert(!bo->purged); VG_CLEAR(madv); madv.handle = bo->handle; madv.madv = I915_MADV_DONTNEED; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_MADVISE, &madv) == 0) { bo->purged = 1; kgem->need_purge |= !madv.retained && bo->domain == DOMAIN_GPU; return madv.retained; } return true; #endif } static bool kgem_bo_is_retained(struct kgem *kgem, struct kgem_bo *bo) { #if DBG_NO_MADV return true; #else struct drm_i915_gem_madvise madv; if (!bo->purged) return true; VG_CLEAR(madv); madv.handle = bo->handle; madv.madv = I915_MADV_DONTNEED; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_MADVISE, &madv) == 0) return madv.retained; return false; #endif } static bool kgem_bo_clear_purgeable(struct kgem *kgem, struct kgem_bo *bo) { #if DBG_NO_MADV return true; #else struct drm_i915_gem_madvise madv; assert(bo->purged); VG_CLEAR(madv); madv.handle = bo->handle; madv.madv = I915_MADV_WILLNEED; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_MADVISE, &madv) == 0) { bo->purged = !madv.retained; kgem->need_purge |= !madv.retained && bo->domain == DOMAIN_GPU; return madv.retained; } return false; #endif } static void gem_close(int fd, uint32_t handle) { struct drm_gem_close close; VG_CLEAR(close); close.handle = handle; (void)do_ioctl(fd, DRM_IOCTL_GEM_CLOSE, &close); } constant inline static unsigned long __fls(unsigned long word) { #if defined(__GNUC__) && (defined(__i386__) || defined(__x86__) || defined(__x86_64__)) asm("bsr %1,%0" : "=r" (word) : "rm" (word)); return word; #else unsigned int v = 0; while (word >>= 1) v++; return v; #endif } constant inline static int cache_bucket(int num_pages) { return __fls(num_pages); } static struct kgem_bo *__kgem_bo_init(struct kgem_bo *bo, int handle, int num_pages) { DBG(("%s(handle=%d, num_pages=%d)\n", __FUNCTION__, handle, num_pages)); assert(num_pages); memset(bo, 0, sizeof(*bo)); bo->refcnt = 1; bo->handle = handle; bo->target_handle = -1; num_pages(bo) = num_pages; bucket(bo) = cache_bucket(num_pages); bo->reusable = true; bo->domain = DOMAIN_CPU; list_init(&bo->request); list_init(&bo->list); list_init(&bo->vma); return bo; } static struct kgem_bo *__kgem_bo_alloc(int handle, int num_pages) { struct kgem_bo *bo; if (__kgem_freed_bo) { bo = __kgem_freed_bo; __kgem_freed_bo = *(struct kgem_bo **)bo; } else { bo = malloc(sizeof(*bo)); if (bo == NULL) return NULL; } return __kgem_bo_init(bo, handle, num_pages); } static struct kgem_request *__kgem_request_alloc(struct kgem *kgem) { struct kgem_request *rq; rq = __kgem_freed_request; if (rq) { __kgem_freed_request = *(struct kgem_request **)rq; } else { rq = malloc(sizeof(*rq)); if (rq == NULL) rq = &kgem->static_request; } list_init(&rq->buffers); rq->bo = NULL; rq->ring = 0; return rq; } static void __kgem_request_free(struct kgem_request *rq) { _list_del(&rq->list); if (DBG_NO_MALLOC_CACHE) { free(rq); } else { *(struct kgem_request **)rq = __kgem_freed_request; __kgem_freed_request = rq; } } static struct list *inactive(struct kgem *kgem, int num_pages) { assert(num_pages < MAX_CACHE_SIZE / PAGE_SIZE); assert(cache_bucket(num_pages) < NUM_CACHE_BUCKETS); return &kgem->inactive[cache_bucket(num_pages)]; } static struct list *active(struct kgem *kgem, int num_pages, int tiling) { assert(num_pages < MAX_CACHE_SIZE / PAGE_SIZE); assert(cache_bucket(num_pages) < NUM_CACHE_BUCKETS); return &kgem->active[cache_bucket(num_pages)][tiling]; } static size_t agp_aperture_size(struct pci_device *dev, unsigned gen) { /* XXX assume that only future chipsets are unknown and follow * the post gen2 PCI layout. */ return dev->regions[gen < 030 ? 0 : 2].size; } static size_t total_ram_size(void) { #ifdef HAVE_STRUCT_SYSINFO_TOTALRAM struct sysinfo info; if (sysinfo(&info) == 0) return info.totalram * info.mem_unit; #endif #ifdef _SC_PHYS_PAGES return sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGE_SIZE); #endif return 0; } static unsigned cpu_cache_size__cpuid4(void) { /* Deterministic Cache Parameters (Function 04h)": * When EAX is initialized to a value of 4, the CPUID instruction * returns deterministic cache information in the EAX, EBX, ECX * and EDX registers. This function requires ECX be initialized * with an index which indicates which cache to return information * about. The OS is expected to call this function (CPUID.4) with * ECX = 0, 1, 2, until EAX[4:0] == 0, indicating no more caches. * The order in which the caches are returned is not specified * and may change at Intel's discretion. * * Calculating the Cache Size in bytes: * = (Ways +1) * (Partitions +1) * (Line Size +1) * (Sets +1) */ unsigned int eax, ebx, ecx, edx; unsigned int llc_size = 0; int cnt; if (__get_cpuid_max(BASIC_CPUID, NULL) < 4) return 0; cnt = 0; do { unsigned associativity, line_partitions, line_size, sets; __cpuid_count(4, cnt++, eax, ebx, ecx, edx); if ((eax & 0x1f) == 0) break; associativity = ((ebx >> 22) & 0x3ff) + 1; line_partitions = ((ebx >> 12) & 0x3ff) + 1; line_size = (ebx & 0xfff) + 1; sets = ecx + 1; llc_size = associativity * line_partitions * line_size * sets; } while (1); return llc_size; } static unsigned cpu_cache_size(void) { unsigned size; FILE *file; size = cpu_cache_size__cpuid4(); if (size) return size; file = fopen("/proc/cpuinfo", "r"); if (file) { size_t len = 0; char *line = NULL; while (getline(&line, &len, file) != -1) { int kb; if (sscanf(line, "cache size : %d KB", &kb) == 1) { /* Paranoid check against gargantuan caches */ if (kb <= 1<<20) size = kb * 1024; break; } } free(line); fclose(file); } if (size == 0) size = 64 * 1024; return size; } static int gem_param(struct kgem *kgem, int name) { drm_i915_getparam_t gp; int v = -1; /* No param uses the sign bit, reserve it for errors */ VG_CLEAR(gp); gp.param = name; gp.value = &v; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GETPARAM, &gp)) return -1; VG(VALGRIND_MAKE_MEM_DEFINED(&v, sizeof(v))); return v; } static bool test_has_execbuffer2(struct kgem *kgem) { struct drm_i915_gem_execbuffer2 execbuf; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffer_count = 1; return do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf) == -EFAULT; } static bool test_has_no_reloc(struct kgem *kgem) { if (DBG_NO_FAST_RELOC) return false; return gem_param(kgem, LOCAL_I915_PARAM_HAS_NO_RELOC) > 0; } static bool test_has_handle_lut(struct kgem *kgem) { if (DBG_NO_HANDLE_LUT) return false; return gem_param(kgem, LOCAL_I915_PARAM_HAS_HANDLE_LUT) > 0; } static bool test_has_wt(struct kgem *kgem) { if (DBG_NO_WT) return false; return gem_param(kgem, LOCAL_I915_PARAM_HAS_WT) > 0; } static bool test_has_semaphores_enabled(struct kgem *kgem) { FILE *file; bool detected = false; int ret; if (DBG_NO_SEMAPHORES) return false; ret = gem_param(kgem, LOCAL_I915_PARAM_HAS_SEMAPHORES); if (ret != -1) return ret > 0; file = fopen("/sys/module/i915/parameters/semaphores", "r"); if (file) { int value; if (fscanf(file, "%d", &value) == 1) detected = value != 0; fclose(file); } return detected; } static bool is_hw_supported(struct kgem *kgem, struct pci_device *dev) { if (DBG_NO_HW) return false; if (!test_has_execbuffer2(kgem)) return false; if (kgem->gen == (unsigned)-1) /* unknown chipset, assume future gen */ return kgem->has_blt; /* Although pre-855gm the GMCH is fubar, it works mostly. So * let the user decide through "NoAccel" whether or not to risk * hw acceleration. */ if (kgem->gen == 060 && dev && dev->revision < 8) { /* pre-production SNB with dysfunctional BLT */ return false; } if (kgem->gen >= 060) /* Only if the kernel supports the BLT ring */ return kgem->has_blt; return true; } static bool test_has_relaxed_fencing(struct kgem *kgem) { if (kgem->gen < 040) { if (DBG_NO_RELAXED_FENCING) return false; return gem_param(kgem, LOCAL_I915_PARAM_HAS_RELAXED_FENCING) > 0; } else return true; } static bool test_has_llc(struct kgem *kgem) { int has_llc = -1; if (DBG_NO_LLC) return false; has_llc = gem_param(kgem, LOCAL_I915_PARAM_HAS_LLC); if (has_llc == -1) { DBG(("%s: no kernel/drm support for HAS_LLC, assuming support for LLC based on GPU generation\n", __FUNCTION__)); has_llc = kgem->gen >= 060; } return has_llc; } static bool test_has_wc_mmap(struct kgem *kgem) { struct local_i915_gem_mmap2 wc; bool ret; if (DBG_NO_WC_MMAP) return false; if (gem_param(kgem, LOCAL_I915_PARAM_MMAP_VERSION) < 1) return false; VG_CLEAR(wc); wc.handle = gem_create(kgem->fd, 1); wc.offset = 0; wc.size = 4096; wc.flags = I915_MMAP_WC; ret = do_ioctl(kgem->fd, LOCAL_IOCTL_I915_GEM_MMAP_v2, &wc) == 0; gem_close(kgem->fd, wc.handle); return ret; } static bool test_has_caching(struct kgem *kgem) { uint32_t handle; bool ret; if (DBG_NO_CACHE_LEVEL) return false; /* Incoherent blt and sampler hangs the GPU */ if (kgem->gen == 040) return false; handle = gem_create(kgem->fd, 1); if (handle == 0) return false; ret = gem_set_caching(kgem->fd, handle, UNCACHED); gem_close(kgem->fd, handle); return ret; } static bool test_has_userptr(struct kgem *kgem) { uint32_t handle; void *ptr; if (DBG_NO_USERPTR) return false; /* Incoherent blt and sampler hangs the GPU */ if (kgem->gen == 040) return false; if (posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE)) return false; handle = gem_userptr(kgem->fd, ptr, PAGE_SIZE, false); gem_close(kgem->fd, handle); free(ptr); return handle != 0; } static bool test_has_create2(struct kgem *kgem) { #if defined(USE_CREATE2) struct local_i915_gem_create2 args; if (DBG_NO_CREATE2) return false; memset(&args, 0, sizeof(args)); args.size = PAGE_SIZE; args.caching = DISPLAY; if (do_ioctl(kgem->fd, LOCAL_IOCTL_I915_GEM_CREATE2, &args) == 0) gem_close(kgem->fd, args.handle); return args.handle != 0; #else return false; #endif } static bool test_has_secure_batches(struct kgem *kgem) { if (DBG_NO_SECURE_BATCHES) return false; return gem_param(kgem, LOCAL_I915_PARAM_HAS_SECURE_BATCHES) > 0; } static bool test_has_pinned_batches(struct kgem *kgem) { if (DBG_NO_PINNED_BATCHES) return false; return gem_param(kgem, LOCAL_I915_PARAM_HAS_PINNED_BATCHES) > 0; } static int kgem_get_screen_index(struct kgem *kgem) { struct sna *sna = container_of(kgem, struct sna, kgem); return sna->scrn->scrnIndex; } static int __find_debugfs(struct kgem *kgem) { int i; for (i = 0; i < DRM_MAX_MINOR; i++) { char path[80]; sprintf(path, "/sys/kernel/debug/dri/%d/i915_wedged", i); if (access(path, R_OK) == 0) return i; sprintf(path, "/debug/dri/%d/i915_wedged", i); if (access(path, R_OK) == 0) return i; } return -1; } static int kgem_get_minor(struct kgem *kgem) { struct stat st; if (fstat(kgem->fd, &st)) return __find_debugfs(kgem); if (!S_ISCHR(st.st_mode)) return __find_debugfs(kgem); return st.st_rdev & 0x63; } static bool kgem_init_pinned_batches(struct kgem *kgem) { int count[2] = { 16, 4 }; int size[2] = { 1, 4 }; int n, i; if (kgem->wedged) return true; for (n = 0; n < ARRAY_SIZE(count); n++) { for (i = 0; i < count[n]; i++) { struct drm_i915_gem_pin pin; struct kgem_bo *bo; VG_CLEAR(pin); pin.handle = gem_create(kgem->fd, size[n]); if (pin.handle == 0) goto err; DBG(("%s: new handle=%d, num_pages=%d\n", __FUNCTION__, pin.handle, size[n])); bo = __kgem_bo_alloc(pin.handle, size[n]); if (bo == NULL) { gem_close(kgem->fd, pin.handle); goto err; } pin.alignment = 0; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_PIN, &pin)) { gem_close(kgem->fd, pin.handle); free(bo); goto err; } bo->presumed_offset = pin.offset; debug_alloc__bo(kgem, bo); list_add(&bo->list, &kgem->pinned_batches[n]); } } return true; err: for (n = 0; n < ARRAY_SIZE(kgem->pinned_batches); n++) { while (!list_is_empty(&kgem->pinned_batches[n])) { kgem_bo_destroy(kgem, list_first_entry(&kgem->pinned_batches[n], struct kgem_bo, list)); } } /* For simplicity populate the lists with a single unpinned bo */ for (n = 0; n < ARRAY_SIZE(count); n++) { struct kgem_bo *bo; uint32_t handle; handle = gem_create(kgem->fd, size[n]); if (handle == 0) break; bo = __kgem_bo_alloc(handle, size[n]); if (bo == NULL) { gem_close(kgem->fd, handle); break; } debug_alloc__bo(kgem, bo); list_add(&bo->list, &kgem->pinned_batches[n]); } return false; } static void kgem_init_swizzling(struct kgem *kgem) { struct local_i915_gem_get_tiling_v2 { uint32_t handle; uint32_t tiling_mode; uint32_t swizzle_mode; uint32_t phys_swizzle_mode; } tiling; #define LOCAL_IOCTL_I915_GEM_GET_TILING DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_GET_TILING, struct local_i915_gem_get_tiling_v2) VG_CLEAR(tiling); tiling.handle = gem_create(kgem->fd, 1); if (!tiling.handle) return; if (!gem_set_tiling(kgem->fd, tiling.handle, I915_TILING_X, 512)) goto out; if (do_ioctl(kgem->fd, LOCAL_IOCTL_I915_GEM_GET_TILING, &tiling)) goto out; if (kgem->gen < 50 && tiling.phys_swizzle_mode != tiling.swizzle_mode) goto out; choose_memcpy_tiled_x(kgem, tiling.swizzle_mode); out: gem_close(kgem->fd, tiling.handle); } static void kgem_fixup_relocs(struct kgem *kgem, struct kgem_bo *bo, int shrink) { int n; bo->target_handle = kgem->has_handle_lut ? kgem->nexec : bo->handle; assert(kgem->nreloc__self <= 256); if (kgem->nreloc__self == 0) return; DBG(("%s: fixing up %d%s self-relocations to handle=%p, presumed-offset=%llx\n", __FUNCTION__, kgem->nreloc__self, kgem->nreloc__self == 256 ? "+" : "", bo->handle, (long long)bo->presumed_offset)); for (n = 0; n < kgem->nreloc__self; n++) { int i = kgem->reloc__self[n]; assert(kgem->reloc[i].target_handle == ~0U); kgem->reloc[i].target_handle = bo->target_handle; kgem->reloc[i].presumed_offset = bo->presumed_offset; if (kgem->reloc[i].read_domains == I915_GEM_DOMAIN_INSTRUCTION) { DBG(("%s: moving base of self-reloc[%d:%d] %d -> %d\n", __FUNCTION__, n, i, kgem->reloc[i].delta, kgem->reloc[i].delta - shrink)); kgem->reloc[i].delta -= shrink; } kgem->batch[kgem->reloc[i].offset/sizeof(uint32_t)] = kgem->reloc[i].delta + bo->presumed_offset; } if (n == 256) { for (n = kgem->reloc__self[255]; n < kgem->nreloc; n++) { if (kgem->reloc[n].target_handle == ~0U) { kgem->reloc[n].target_handle = bo->target_handle; kgem->reloc[n].presumed_offset = bo->presumed_offset; if (kgem->reloc[n].read_domains == I915_GEM_DOMAIN_INSTRUCTION) { DBG(("%s: moving base of reloc[%d] %d -> %d\n", __FUNCTION__, n, kgem->reloc[n].delta, kgem->reloc[n].delta - shrink)); kgem->reloc[n].delta -= shrink; } kgem->batch[kgem->reloc[n].offset/sizeof(uint32_t)] = kgem->reloc[n].delta + bo->presumed_offset; } } } if (shrink) { DBG(("%s: shrinking by %d\n", __FUNCTION__, shrink)); for (n = 0; n < kgem->nreloc; n++) { if (kgem->reloc[n].offset >= sizeof(uint32_t)*kgem->nbatch) kgem->reloc[n].offset -= shrink; } } } static struct kgem_bo *kgem_new_batch(struct kgem *kgem) { struct kgem_bo *last; unsigned flags; last = kgem->batch_bo; if (last) { kgem_fixup_relocs(kgem, last, 0); kgem->batch = NULL; } if (kgem->batch) { assert(last == NULL); return NULL; } flags = CREATE_CPU_MAP | CREATE_NO_THROTTLE; if (!kgem->has_llc) flags |= CREATE_UNCACHED; kgem->batch_bo = kgem_create_linear(kgem, sizeof(uint32_t)*kgem->batch_size, flags); if (kgem->batch_bo) kgem->batch = kgem_bo_map__cpu(kgem, kgem->batch_bo); if (kgem->batch == NULL) { DBG(("%s: unable to map batch bo, mallocing(size=%d)\n", __FUNCTION__, sizeof(uint32_t)*kgem->batch_size)); if (kgem->batch_bo) { kgem_bo_destroy(kgem, kgem->batch_bo); kgem->batch_bo = NULL; } if (posix_memalign((void **)&kgem->batch, PAGE_SIZE, ALIGN(sizeof(uint32_t) * kgem->batch_size, PAGE_SIZE))) { ERR(("%s: batch allocation failed, disabling acceleration\n", __FUNCTION__)); __kgem_set_wedged(kgem); } } else { DBG(("%s: allocated and mapped batch handle=%d [size=%d]\n", __FUNCTION__, kgem->batch_bo->handle, sizeof(uint32_t)*kgem->batch_size)); kgem_bo_sync__cpu(kgem, kgem->batch_bo); } DBG(("%s: using last batch handle=%d\n", __FUNCTION__, last ? last->handle : 0)); return last; } void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, unsigned gen) { struct drm_i915_gem_get_aperture aperture; size_t totalram; unsigned half_gpu_max; unsigned int i, j; DBG(("%s: fd=%d, gen=%d\n", __FUNCTION__, fd, gen)); kgem->fd = fd; kgem->gen = gen; list_init(&kgem->requests[0]); list_init(&kgem->requests[1]); list_init(&kgem->batch_buffers); list_init(&kgem->active_buffers); list_init(&kgem->flushing); list_init(&kgem->large); list_init(&kgem->large_inactive); list_init(&kgem->snoop); list_init(&kgem->scanout); for (i = 0; i < ARRAY_SIZE(kgem->pinned_batches); i++) list_init(&kgem->pinned_batches[i]); for (i = 0; i < ARRAY_SIZE(kgem->inactive); i++) list_init(&kgem->inactive[i]); for (i = 0; i < ARRAY_SIZE(kgem->active); i++) { for (j = 0; j < ARRAY_SIZE(kgem->active[i]); j++) list_init(&kgem->active[i][j]); } for (i = 0; i < ARRAY_SIZE(kgem->vma); i++) { for (j = 0; j < ARRAY_SIZE(kgem->vma[i].inactive); j++) list_init(&kgem->vma[i].inactive[j]); } kgem->vma[MAP_GTT].count = -MAX_GTT_VMA_CACHE; kgem->vma[MAP_CPU].count = -MAX_CPU_VMA_CACHE; kgem->has_blt = gem_param(kgem, LOCAL_I915_PARAM_HAS_BLT) > 0; DBG(("%s: has BLT ring? %d\n", __FUNCTION__, kgem->has_blt)); kgem->has_relaxed_delta = gem_param(kgem, LOCAL_I915_PARAM_HAS_RELAXED_DELTA) > 0; DBG(("%s: has relaxed delta? %d\n", __FUNCTION__, kgem->has_relaxed_delta)); kgem->has_relaxed_fencing = test_has_relaxed_fencing(kgem); DBG(("%s: has relaxed fencing? %d\n", __FUNCTION__, kgem->has_relaxed_fencing)); kgem->has_llc = test_has_llc(kgem); DBG(("%s: has shared last-level-cache? %d\n", __FUNCTION__, kgem->has_llc)); kgem->has_wt = test_has_wt(kgem); DBG(("%s: has write-through caching for scanouts? %d\n", __FUNCTION__, kgem->has_wt)); kgem->has_wc_mmap = test_has_wc_mmap(kgem); DBG(("%s: has wc-mmapping? %d\n", __FUNCTION__, kgem->has_wc_mmap)); kgem->has_caching = test_has_caching(kgem); DBG(("%s: has set-cache-level? %d\n", __FUNCTION__, kgem->has_caching)); kgem->has_userptr = test_has_userptr(kgem); DBG(("%s: has userptr? %d\n", __FUNCTION__, kgem->has_userptr)); kgem->has_create2 = test_has_create2(kgem); DBG(("%s: has create2? %d\n", __FUNCTION__, kgem->has_create2)); kgem->has_no_reloc = test_has_no_reloc(kgem); DBG(("%s: has no-reloc? %d\n", __FUNCTION__, kgem->has_no_reloc)); kgem->has_handle_lut = test_has_handle_lut(kgem); DBG(("%s: has handle-lut? %d\n", __FUNCTION__, kgem->has_handle_lut)); kgem->has_semaphores = false; if (kgem->has_blt && test_has_semaphores_enabled(kgem)) kgem->has_semaphores = true; DBG(("%s: semaphores enabled? %d\n", __FUNCTION__, kgem->has_semaphores)); kgem->can_blt_cpu = gen >= 030; DBG(("%s: can blt to cpu? %d\n", __FUNCTION__, kgem->can_blt_cpu)); kgem->can_render_y = gen != 021 && (gen >> 3) != 4; DBG(("%s: can render to Y-tiled surfaces? %d\n", __FUNCTION__, kgem->can_render_y)); kgem->has_secure_batches = test_has_secure_batches(kgem); DBG(("%s: can use privileged batchbuffers? %d\n", __FUNCTION__, kgem->has_secure_batches)); kgem->has_pinned_batches = test_has_pinned_batches(kgem); DBG(("%s: can use pinned batchbuffers (to avoid CS w/a)? %d\n", __FUNCTION__, kgem->has_pinned_batches)); if (!is_hw_supported(kgem, dev)) { xf86DrvMsg(kgem_get_screen_index(kgem), X_WARNING, "Detected unsupported/dysfunctional hardware, disabling acceleration.\n"); __kgem_set_wedged(kgem); } else if (__kgem_throttle(kgem, false)) { xf86DrvMsg(kgem_get_screen_index(kgem), X_WARNING, "Detected a hung GPU, disabling acceleration.\n"); __kgem_set_wedged(kgem); } kgem->batch_size = UINT16_MAX & ~7; if (gen == 020 && !kgem->has_pinned_batches) /* Limited to what we can pin */ kgem->batch_size = 4*1024; if (gen == 022) /* 865g cannot handle a batch spanning multiple pages */ kgem->batch_size = PAGE_SIZE / sizeof(uint32_t); if (gen >= 070) kgem->batch_size = 16*1024; if (!kgem->has_relaxed_delta && kgem->batch_size > 4*1024) kgem->batch_size = 4*1024; if (!kgem_init_pinned_batches(kgem) && gen == 020) { xf86DrvMsg(kgem_get_screen_index(kgem), X_WARNING, "Unable to reserve memory for GPU, disabling acceleration.\n"); __kgem_set_wedged(kgem); } DBG(("%s: maximum batch size? %d\n", __FUNCTION__, kgem->batch_size)); kgem_new_batch(kgem); kgem->half_cpu_cache_pages = cpu_cache_size() >> 13; DBG(("%s: last-level cache size: %d bytes, threshold in pages: %d\n", __FUNCTION__, cpu_cache_size(), kgem->half_cpu_cache_pages)); kgem->next_request = __kgem_request_alloc(kgem); DBG(("%s: cpu bo enabled %d: llc? %d, set-cache-level? %d, userptr? %d\n", __FUNCTION__, !DBG_NO_CPU && (kgem->has_llc | kgem->has_userptr | kgem->has_caching), kgem->has_llc, kgem->has_caching, kgem->has_userptr)); VG_CLEAR(aperture); aperture.aper_size = 0; (void)do_ioctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture); if (aperture.aper_size == 0) aperture.aper_size = 64*1024*1024; DBG(("%s: aperture size %lld, available now %lld\n", __FUNCTION__, (long long)aperture.aper_size, (long long)aperture.aper_available_size)); kgem->aperture_total = aperture.aper_size; kgem->aperture_high = aperture.aper_size * 3/4; kgem->aperture_low = aperture.aper_size * 1/3; if (gen < 033) { /* Severe alignment penalties */ kgem->aperture_high /= 2; kgem->aperture_low /= 2; } DBG(("%s: aperture low=%d [%d], high=%d [%d]\n", __FUNCTION__, kgem->aperture_low, kgem->aperture_low / (1024*1024), kgem->aperture_high, kgem->aperture_high / (1024*1024))); kgem->aperture_mappable = 256 * 1024 * 1024; if (dev != NULL) kgem->aperture_mappable = agp_aperture_size(dev, gen); if (kgem->aperture_mappable == 0 || kgem->aperture_mappable > aperture.aper_size) kgem->aperture_mappable = aperture.aper_size; DBG(("%s: aperture mappable=%d [%d MiB]\n", __FUNCTION__, kgem->aperture_mappable, kgem->aperture_mappable / (1024*1024))); kgem->aperture_fenceable = MIN(256*1024*1024, kgem->aperture_mappable); DBG(("%s: aperture fenceable=%d [%d MiB]\n", __FUNCTION__, kgem->aperture_fenceable, kgem->aperture_fenceable / (1024*1024))); kgem->buffer_size = 64 * 1024; while (kgem->buffer_size < kgem->aperture_mappable >> 10) kgem->buffer_size *= 2; if (kgem->buffer_size >> 12 > kgem->half_cpu_cache_pages) kgem->buffer_size = kgem->half_cpu_cache_pages << 12; kgem->buffer_size = 1 << __fls(kgem->buffer_size); DBG(("%s: buffer size=%d [%d KiB]\n", __FUNCTION__, kgem->buffer_size, kgem->buffer_size / 1024)); assert(kgem->buffer_size); kgem->max_object_size = 3 * (kgem->aperture_high >> 12) << 10; kgem->max_gpu_size = kgem->max_object_size; if (!kgem->has_llc && kgem->max_gpu_size > MAX_CACHE_SIZE) kgem->max_gpu_size = MAX_CACHE_SIZE; totalram = total_ram_size(); if (totalram == 0) { DBG(("%s: total ram size unknown, assuming maximum of total aperture\n", __FUNCTION__)); totalram = kgem->aperture_total; } DBG(("%s: total ram=%ld\n", __FUNCTION__, (long)totalram)); if (kgem->max_object_size > totalram / 2) kgem->max_object_size = totalram / 2; if (kgem->max_gpu_size > totalram / 4) kgem->max_gpu_size = totalram / 4; if (kgem->aperture_high > totalram / 2) { kgem->aperture_high = totalram / 2; kgem->aperture_low = kgem->aperture_high / 4; DBG(("%s: reduced aperture watermaks to fit into ram; low=%d [%d], high=%d [%d]\n", __FUNCTION__, kgem->aperture_low, kgem->aperture_low / (1024*1024), kgem->aperture_high, kgem->aperture_high / (1024*1024))); } kgem->max_cpu_size = kgem->max_object_size; half_gpu_max = kgem->max_gpu_size / 2; kgem->max_copy_tile_size = (MAX_CACHE_SIZE + 1)/2; if (kgem->max_copy_tile_size > half_gpu_max) kgem->max_copy_tile_size = half_gpu_max; if (kgem->has_llc) kgem->max_upload_tile_size = kgem->max_copy_tile_size; else kgem->max_upload_tile_size = kgem->aperture_fenceable / 4; if (kgem->max_upload_tile_size > half_gpu_max) kgem->max_upload_tile_size = half_gpu_max; if (kgem->max_upload_tile_size > kgem->aperture_high/2) kgem->max_upload_tile_size = kgem->aperture_high/2; if (kgem->max_upload_tile_size > kgem->aperture_low) kgem->max_upload_tile_size = kgem->aperture_low; if (kgem->max_upload_tile_size < 16*PAGE_SIZE) kgem->max_upload_tile_size = 16*PAGE_SIZE; kgem->large_object_size = MAX_CACHE_SIZE; if (kgem->large_object_size > half_gpu_max) kgem->large_object_size = half_gpu_max; if (kgem->max_copy_tile_size > kgem->aperture_high/2) kgem->max_copy_tile_size = kgem->aperture_high/2; if (kgem->max_copy_tile_size > kgem->aperture_low) kgem->max_copy_tile_size = kgem->aperture_low; if (kgem->max_copy_tile_size < 16*PAGE_SIZE) kgem->max_copy_tile_size = 16*PAGE_SIZE; if (kgem->has_llc | kgem->has_caching | kgem->has_userptr) { if (kgem->large_object_size > kgem->max_cpu_size) kgem->large_object_size = kgem->max_cpu_size; } else kgem->max_cpu_size = 0; if (DBG_NO_CPU) kgem->max_cpu_size = 0; DBG(("%s: maximum object size=%d\n", __FUNCTION__, kgem->max_object_size)); DBG(("%s: large object thresold=%d\n", __FUNCTION__, kgem->large_object_size)); DBG(("%s: max object sizes (gpu=%d, cpu=%d, tile upload=%d, copy=%d)\n", __FUNCTION__, kgem->max_gpu_size, kgem->max_cpu_size, kgem->max_upload_tile_size, kgem->max_copy_tile_size)); /* Convert the aperture thresholds to pages */ kgem->aperture_mappable /= PAGE_SIZE; kgem->aperture_fenceable /= PAGE_SIZE; kgem->aperture_low /= PAGE_SIZE; kgem->aperture_high /= PAGE_SIZE; kgem->aperture_total /= PAGE_SIZE; kgem->fence_max = gem_param(kgem, I915_PARAM_NUM_FENCES_AVAIL) - 2; if ((int)kgem->fence_max < 0) kgem->fence_max = 5; /* minimum safe value for all hw */ DBG(("%s: max fences=%d\n", __FUNCTION__, kgem->fence_max)); kgem->batch_flags_base = 0; if (kgem->has_no_reloc) kgem->batch_flags_base |= LOCAL_I915_EXEC_NO_RELOC; if (kgem->has_handle_lut) kgem->batch_flags_base |= LOCAL_I915_EXEC_HANDLE_LUT; if (kgem->has_pinned_batches) kgem->batch_flags_base |= LOCAL_I915_EXEC_IS_PINNED; kgem_init_swizzling(kgem); } /* XXX hopefully a good approximation */ static uint32_t kgem_get_unique_id(struct kgem *kgem) { uint32_t id; id = ++kgem->unique_id; if (id == 0) id = ++kgem->unique_id; return id; } inline static uint32_t kgem_pitch_alignment(struct kgem *kgem, unsigned flags) { if (flags & CREATE_PRIME) return 256; if (flags & CREATE_SCANOUT) return 64; if (kgem->gen >= 0100) return 32; return 8; } void kgem_get_tile_size(struct kgem *kgem, int tiling, int pitch, int *tile_width, int *tile_height, int *tile_size) { if (kgem->gen <= 030) { if (tiling) { if (kgem->gen < 030) { *tile_width = 128; *tile_height = 16; *tile_size = 2048; } else { *tile_width = 512; *tile_height = 8; *tile_size = 4096; } } else { *tile_width = 1; *tile_height = 1; *tile_size = 1; } } else switch (tiling) { default: case I915_TILING_NONE: *tile_width = 1; *tile_height = 1; *tile_size = 1; break; case I915_TILING_X: *tile_width = 512; *tile_height = 8; *tile_size = 4096; break; case I915_TILING_Y: *tile_width = 128; *tile_height = 32; *tile_size = 4096; break; } /* Force offset alignment to tile-row */ if (tiling && kgem->gen < 033) *tile_width = pitch; } static uint32_t kgem_surface_size(struct kgem *kgem, bool relaxed_fencing, unsigned flags, uint32_t width, uint32_t height, uint32_t bpp, uint32_t tiling, uint32_t *pitch) { uint32_t tile_width, tile_height; uint32_t size; assert(width <= MAXSHORT); assert(height <= MAXSHORT); assert(bpp >= 8); if (kgem->gen <= 030) { if (tiling) { if (kgem->gen < 030) { tile_width = 128; tile_height = 16; } else { tile_width = 512; tile_height = 8; } } else { tile_width = 2 * bpp >> 3; tile_width = ALIGN(tile_width, kgem_pitch_alignment(kgem, flags)); tile_height = 1; } } else switch (tiling) { default: case I915_TILING_NONE: tile_width = 2 * bpp >> 3; tile_width = ALIGN(tile_width, kgem_pitch_alignment(kgem, flags)); tile_height = 1; break; case I915_TILING_X: tile_width = 512; tile_height = 8; break; case I915_TILING_Y: tile_width = 128; tile_height = 32; break; } /* XXX align to an even tile row */ if (!kgem->has_relaxed_fencing) tile_height *= 2; *pitch = ALIGN(width * bpp / 8, tile_width); height = ALIGN(height, tile_height); DBG(("%s: tile_width=%d, tile_height=%d => aligned pitch=%d, height=%d\n", __FUNCTION__, tile_width, tile_height, *pitch, height)); if (kgem->gen >= 040) return PAGE_ALIGN(*pitch * height); /* If it is too wide for the blitter, don't even bother. */ if (tiling != I915_TILING_NONE) { if (*pitch > 8192) { DBG(("%s: too wide for tiled surface (pitch=%d, limit=%d)\n", __FUNCTION__, *pitch, 8192)); return 0; } for (size = tile_width; size < *pitch; size <<= 1) ; *pitch = size; } else { if (*pitch >= 32768) { DBG(("%s: too wide for linear surface (pitch=%d, limit=%d)\n", __FUNCTION__, *pitch, 32767)); return 0; } } size = *pitch * height; if (relaxed_fencing || tiling == I915_TILING_NONE) return PAGE_ALIGN(size); /* We need to allocate a pot fence region for a tiled buffer. */ if (kgem->gen < 030) tile_width = 512 * 1024; else tile_width = 1024 * 1024; while (tile_width < size) tile_width *= 2; return tile_width; } bool kgem_check_surface_size(struct kgem *kgem, uint32_t width, uint32_t height, uint32_t bpp, uint32_t tiling, uint32_t pitch, uint32_t size) { uint32_t min_size, min_pitch; int tile_width, tile_height, tile_size; DBG(("%s(width=%d, height=%d, bpp=%d, tiling=%d, pitch=%d, size=%d)\n", __FUNCTION__, width, height, bpp, tiling, pitch, size)); if (pitch & 3) return false; min_size = kgem_surface_size(kgem, kgem->has_relaxed_fencing, 0, width, height, bpp, tiling, &min_pitch); DBG(("%s: min_pitch=%d, min_size=%d\n", __FUNCTION__, min_pitch, min_size)); if (size < min_size) return false; if (pitch < min_pitch) return false; kgem_get_tile_size(kgem, tiling, min_pitch, &tile_width, &tile_height, &tile_size); DBG(("%s: tile_width=%d, tile_size=%d\n", __FUNCTION__, tile_width, tile_size)); if (pitch & (tile_width - 1)) return false; if (size & (tile_size - 1)) return false; return true; } static uint32_t kgem_aligned_height(struct kgem *kgem, uint32_t height, uint32_t tiling) { uint32_t tile_height; if (kgem->gen <= 030) { tile_height = tiling ? kgem->gen < 030 ? 16 : 8 : 1; } else switch (tiling) { /* XXX align to an even tile row */ default: case I915_TILING_NONE: tile_height = 1; break; case I915_TILING_X: tile_height = 8; break; case I915_TILING_Y: tile_height = 32; break; } /* XXX align to an even tile row */ if (!kgem->has_relaxed_fencing) tile_height *= 2; return ALIGN(height, tile_height); } static struct drm_i915_gem_exec_object2 * kgem_add_handle(struct kgem *kgem, struct kgem_bo *bo) { struct drm_i915_gem_exec_object2 *exec; DBG(("%s: handle=%d, index=%d\n", __FUNCTION__, bo->handle, kgem->nexec)); assert(kgem->nexec < ARRAY_SIZE(kgem->exec)); bo->target_handle = kgem->has_handle_lut ? kgem->nexec : bo->handle; exec = memset(&kgem->exec[kgem->nexec++], 0, sizeof(*exec)); exec->handle = bo->handle; exec->offset = bo->presumed_offset; kgem->aperture += num_pages(bo); return exec; } static void kgem_add_bo(struct kgem *kgem, struct kgem_bo *bo) { assert(bo->refcnt); assert(bo->proxy == NULL); bo->exec = kgem_add_handle(kgem, bo); bo->rq = MAKE_REQUEST(kgem->next_request, kgem->ring); list_move_tail(&bo->request, &kgem->next_request->buffers); if (bo->io && !list_is_empty(&bo->list)) list_move(&bo->list, &kgem->batch_buffers); /* XXX is it worth working around gcc here? */ kgem->flush |= bo->flush; } static uint32_t kgem_end_batch(struct kgem *kgem) { kgem->batch[kgem->nbatch++] = MI_BATCH_BUFFER_END; if (kgem->nbatch & 1) kgem->batch[kgem->nbatch++] = MI_NOOP; return kgem->nbatch; } static void kgem_bo_binding_free(struct kgem *kgem, struct kgem_bo *bo) { struct kgem_bo_binding *b; b = bo->binding.next; while (b) { struct kgem_bo_binding *next = b->next; free(b); b = next; } } static void kgem_bo_rmfb(struct kgem *kgem, struct kgem_bo *bo) { if (bo->scanout && bo->delta) { DBG(("%s: releasing fb=%d for handle=%d\n", __FUNCTION__, bo->delta, bo->handle)); /* XXX will leak if we are not DRM_MASTER. *shrug* */ do_ioctl(kgem->fd, DRM_IOCTL_MODE_RMFB, &bo->delta); bo->delta = 0; } } static void kgem_bo_free(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: handle=%d, size=%d\n", __FUNCTION__, bo->handle, bytes(bo))); assert(bo->refcnt == 0); assert(bo->proxy == NULL); assert(bo->exec == NULL); assert(!bo->snoop || bo->rq == NULL); #ifdef DEBUG_MEMORY kgem->debug_memory.bo_allocs--; kgem->debug_memory.bo_bytes -= bytes(bo); #endif kgem_bo_binding_free(kgem, bo); kgem_bo_rmfb(kgem, bo); if (IS_USER_MAP(bo->map__cpu)) { assert(bo->rq == NULL); assert(!__kgem_busy(kgem, bo->handle)); assert(MAP(bo->map__cpu) != bo || bo->io || bo->flush); if (!(bo->io || bo->flush)) { DBG(("%s: freeing snooped base\n", __FUNCTION__)); assert(bo != MAP(bo->map__cpu)); free(MAP(bo->map__cpu)); } bo->map__cpu = NULL; } DBG(("%s: releasing %p:%p vma for handle=%d, count=%d\n", __FUNCTION__, bo->map__gtt, bo->map__cpu, bo->handle, list_is_empty(&bo->vma) ? 0 : kgem->vma[bo->map__gtt == NULL && bo->map__wc == NULL].count)); if (!list_is_empty(&bo->vma)) { _list_del(&bo->vma); kgem->vma[bo->map__gtt == NULL && bo->map__wc == NULL].count--; } if (bo->map__gtt) munmap(bo->map__gtt, bytes(bo)); if (bo->map__wc) { VG(VALGRIND_MAKE_MEM_NOACCESS(bo->map__wc, bytes(bo))); munmap(bo->map__wc, bytes(bo)); } if (bo->map__cpu) { VG(VALGRIND_MAKE_MEM_NOACCESS(MAP(bo->map__cpu), bytes(bo))); munmap(MAP(bo->map__cpu), bytes(bo)); } _list_del(&bo->list); _list_del(&bo->request); gem_close(kgem->fd, bo->handle); if (!bo->io && !DBG_NO_MALLOC_CACHE) { *(struct kgem_bo **)bo = __kgem_freed_bo; __kgem_freed_bo = bo; } else free(bo); } inline static void kgem_bo_move_to_inactive(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: moving handle=%d to inactive\n", __FUNCTION__, bo->handle)); assert(bo->refcnt == 0); assert(bo->reusable); assert(bo->rq == NULL); assert(bo->exec == NULL); assert(bo->domain != DOMAIN_GPU); assert(!bo->proxy); assert(!bo->io); assert(!bo->scanout); assert(!bo->snoop); assert(!bo->flush); assert(!bo->needs_flush); assert(list_is_empty(&bo->vma)); assert_tiling(kgem, bo); assert_cacheing(kgem, bo); ASSERT_IDLE(kgem, bo->handle); if (bucket(bo) >= NUM_CACHE_BUCKETS) { if (bo->map__gtt) { munmap(bo->map__gtt, bytes(bo)); bo->map__gtt = NULL; } list_move(&bo->list, &kgem->large_inactive); } else { assert(bo->flush == false); assert(list_is_empty(&bo->vma)); list_move(&bo->list, &kgem->inactive[bucket(bo)]); if (bo->map__gtt && !kgem_bo_can_map(kgem, bo)) { munmap(bo->map__gtt, bytes(bo)); bo->map__gtt = NULL; } if (bo->map__gtt || (bo->map__wc && !bo->tiling)) { list_add(&bo->vma, &kgem->vma[0].inactive[bucket(bo)]); kgem->vma[0].count++; } if (bo->map__cpu && list_is_empty(&bo->vma)) { list_add(&bo->vma, &kgem->vma[1].inactive[bucket(bo)]); kgem->vma[1].count++; } } kgem->need_expire = true; } static struct kgem_bo *kgem_bo_replace_io(struct kgem_bo *bo) { struct kgem_bo *base; if (!bo->io) return bo; assert(!bo->snoop); if (__kgem_freed_bo) { base = __kgem_freed_bo; __kgem_freed_bo = *(struct kgem_bo **)base; } else base = malloc(sizeof(*base)); if (base) { DBG(("%s: transferring io handle=%d to bo\n", __FUNCTION__, bo->handle)); /* transfer the handle to a minimum bo */ memcpy(base, bo, sizeof(*base)); base->io = false; list_init(&base->list); list_replace(&bo->request, &base->request); list_replace(&bo->vma, &base->vma); free(bo); bo = base; } else bo->reusable = false; return bo; } inline static void kgem_bo_remove_from_inactive(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: removing handle=%d from inactive\n", __FUNCTION__, bo->handle)); list_del(&bo->list); assert(bo->rq == NULL); assert(bo->exec == NULL); if (!list_is_empty(&bo->vma)) { assert(bo->map__gtt || bo->map__wc || bo->map__cpu); list_del(&bo->vma); kgem->vma[bo->map__gtt == NULL && bo->map__wc == NULL].count--; } } inline static void kgem_bo_remove_from_active(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: removing handle=%d from active\n", __FUNCTION__, bo->handle)); list_del(&bo->list); assert(bo->rq != NULL); if (RQ(bo->rq) == (void *)kgem) { assert(bo->exec == NULL); list_del(&bo->request); } assert(list_is_empty(&bo->vma)); } static void _kgem_bo_delete_buffer(struct kgem *kgem, struct kgem_bo *bo) { struct kgem_buffer *io = (struct kgem_buffer *)bo->proxy; DBG(("%s: size=%d, offset=%d, parent used=%d\n", __FUNCTION__, bo->size.bytes, bo->delta, io->used)); if (ALIGN(bo->delta + bo->size.bytes, UPLOAD_ALIGNMENT) == io->used) io->used = bo->delta; } static bool check_scanout_size(struct kgem *kgem, struct kgem_bo *bo, int width, int height) { struct drm_mode_fb_cmd info; assert(bo->scanout); VG_CLEAR(info); info.fb_id = bo->delta; if (do_ioctl(kgem->fd, DRM_IOCTL_MODE_GETFB, &info)) return false; gem_close(kgem->fd, info.handle); if (width != info.width || height != info.height) { DBG(("%s: not using scanout %d (%dx%d), want (%dx%d)\n", __FUNCTION__, info.fb_id, info.width, info.height, width, height)); return false; } return true; } static void kgem_bo_move_to_scanout(struct kgem *kgem, struct kgem_bo *bo) { assert(bo->refcnt == 0); assert(bo->scanout); assert(!bo->flush); assert(!bo->snoop); assert(!bo->io); if (bo->purged) { /* for stolen fb */ if (!bo->exec) { DBG(("%s: discarding purged scanout - stolen?\n", __FUNCTION__)); kgem_bo_free(kgem, bo); } return; } DBG(("%s: moving %d [fb %d] to scanout cache, active? %d\n", __FUNCTION__, bo->handle, bo->delta, bo->rq != NULL)); if (bo->rq) list_move_tail(&bo->list, &kgem->scanout); else list_move(&bo->list, &kgem->scanout); kgem->need_expire = true; } static void kgem_bo_move_to_snoop(struct kgem *kgem, struct kgem_bo *bo) { assert(bo->reusable); assert(!bo->scanout); assert(!bo->flush); assert(!bo->needs_flush); assert(bo->refcnt == 0); assert(bo->exec == NULL); if (DBG_NO_SNOOP_CACHE) { kgem_bo_free(kgem, bo); return; } if (num_pages(bo) > kgem->max_cpu_size >> 13) { DBG(("%s handle=%d discarding large CPU buffer (%d >%d pages)\n", __FUNCTION__, bo->handle, num_pages(bo), kgem->max_cpu_size >> 13)); kgem_bo_free(kgem, bo); return; } assert(bo->tiling == I915_TILING_NONE); assert(bo->rq == NULL); DBG(("%s: moving %d to snoop cachee\n", __FUNCTION__, bo->handle)); list_add(&bo->list, &kgem->snoop); kgem->need_expire = true; } static bool kgem_bo_move_to_cache(struct kgem *kgem, struct kgem_bo *bo) { bool retired = false; DBG(("%s: release handle=%d\n", __FUNCTION__, bo->handle)); if (bo->prime) { DBG(("%s: discarding imported prime handle=%d\n", __FUNCTION__, bo->handle)); kgem_bo_free(kgem, bo); } else if (bo->snoop) { kgem_bo_move_to_snoop(kgem, bo); } else if (bo->scanout) { kgem_bo_move_to_scanout(kgem, bo); } else if ((bo = kgem_bo_replace_io(bo))->reusable && kgem_bo_set_purgeable(kgem, bo)) { kgem_bo_move_to_inactive(kgem, bo); retired = true; } else kgem_bo_free(kgem, bo); return retired; } static struct kgem_bo * search_snoop_cache(struct kgem *kgem, unsigned int num_pages, unsigned flags) { struct kgem_bo *bo, *first = NULL; DBG(("%s: num_pages=%d, flags=%x\n", __FUNCTION__, num_pages, flags)); if ((kgem->has_caching | kgem->has_userptr) == 0) return NULL; if (list_is_empty(&kgem->snoop)) { DBG(("%s: inactive and cache empty\n", __FUNCTION__)); if (!__kgem_throttle_retire(kgem, flags)) { DBG(("%s: nothing retired\n", __FUNCTION__)); return NULL; } } list_for_each_entry(bo, &kgem->snoop, list) { assert(bo->refcnt == 0); assert(bo->snoop); assert(!bo->scanout); assert(!bo->purged); assert(bo->proxy == NULL); assert(bo->tiling == I915_TILING_NONE); assert(bo->rq == NULL); assert(bo->exec == NULL); if (num_pages > num_pages(bo)) continue; if (num_pages(bo) > 2*num_pages) { if (first == NULL) first = bo; continue; } list_del(&bo->list); bo->pitch = 0; bo->delta = 0; DBG((" %s: found handle=%d (num_pages=%d) in snoop cache\n", __FUNCTION__, bo->handle, num_pages(bo))); return bo; } if (first) { list_del(&first->list); first->pitch = 0; first->delta = 0; DBG((" %s: found handle=%d (num_pages=%d) in snoop cache\n", __FUNCTION__, first->handle, num_pages(first))); return first; } return NULL; } void kgem_bo_undo(struct kgem *kgem, struct kgem_bo *bo) { if (kgem->nexec != 1 || bo->exec == NULL) return; assert(bo); DBG(("%s: only handle in batch, discarding last operations for handle=%d\n", __FUNCTION__, bo->handle)); assert(bo->exec == &kgem->exec[0]); assert(kgem->exec[0].handle == bo->handle); assert(RQ(bo->rq) == kgem->next_request); bo->refcnt++; kgem_reset(kgem); bo->refcnt--; assert(kgem->nreloc == 0); assert(kgem->nexec == 0); assert(bo->exec == NULL); } void kgem_bo_pair_undo(struct kgem *kgem, struct kgem_bo *a, struct kgem_bo *b) { if (kgem->nexec > 2) return; if (kgem->nexec == 1) { if (a) kgem_bo_undo(kgem, a); if (b) kgem_bo_undo(kgem, b); return; } if (a == NULL || b == NULL) return; if (a->exec == NULL || b->exec == NULL) return; DBG(("%s: only handles in batch, discarding last operations for handle=%d and handle=%d\n", __FUNCTION__, a->handle, b->handle)); assert(a->exec == &kgem->exec[0] || a->exec == &kgem->exec[1]); assert(a->handle == kgem->exec[0].handle || a->handle == kgem->exec[1].handle); assert(RQ(a->rq) == kgem->next_request); assert(b->exec == &kgem->exec[0] || b->exec == &kgem->exec[1]); assert(b->handle == kgem->exec[0].handle || b->handle == kgem->exec[1].handle); assert(RQ(b->rq) == kgem->next_request); a->refcnt++; b->refcnt++; kgem_reset(kgem); b->refcnt--; a->refcnt--; assert(kgem->nreloc == 0); assert(kgem->nexec == 0); assert(a->exec == NULL); assert(b->exec == NULL); } static void __kgem_bo_destroy(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: handle=%d, size=%d\n", __FUNCTION__, bo->handle, bytes(bo))); assert(list_is_empty(&bo->list)); assert(bo->refcnt == 0); assert(bo->proxy == NULL); assert(bo->active_scanout == 0); assert_tiling(kgem, bo); bo->binding.offset = 0; if (DBG_NO_CACHE) goto destroy; if (bo->prime) goto destroy; if (bo->snoop && !bo->flush) { DBG(("%s: handle=%d is snooped\n", __FUNCTION__, bo->handle)); assert(bo->reusable); assert(list_is_empty(&bo->list)); if (bo->exec == NULL && bo->rq && !__kgem_busy(kgem, bo->handle)) __kgem_bo_clear_busy(bo); if (bo->rq == NULL) kgem_bo_move_to_snoop(kgem, bo); return; } if (!IS_USER_MAP(bo->map__cpu)) bo->flush = false; if (bo->scanout) { kgem_bo_move_to_scanout(kgem, bo); return; } if (bo->io) bo = kgem_bo_replace_io(bo); if (!bo->reusable) { DBG(("%s: handle=%d, not reusable\n", __FUNCTION__, bo->handle)); goto destroy; } assert(list_is_empty(&bo->vma)); assert(list_is_empty(&bo->list)); assert(bo->flush == false); assert(bo->snoop == false); assert(bo->io == false); assert(bo->scanout == false); assert_cacheing(kgem, bo); kgem_bo_undo(kgem, bo); assert(bo->refcnt == 0); if (bo->rq && bo->exec == NULL && !__kgem_busy(kgem, bo->handle)) __kgem_bo_clear_busy(bo); if (bo->rq) { struct list *cache; DBG(("%s: handle=%d -> active\n", __FUNCTION__, bo->handle)); if (bucket(bo) < NUM_CACHE_BUCKETS) cache = &kgem->active[bucket(bo)][bo->tiling]; else cache = &kgem->large; list_add(&bo->list, cache); return; } assert(bo->exec == NULL); assert(list_is_empty(&bo->request)); if (bo->map__cpu == NULL || bucket(bo) >= NUM_CACHE_BUCKETS) { if (!kgem_bo_set_purgeable(kgem, bo)) goto destroy; if (!kgem->has_llc && bo->domain == DOMAIN_CPU) goto destroy; DBG(("%s: handle=%d, purged\n", __FUNCTION__, bo->handle)); } kgem_bo_move_to_inactive(kgem, bo); return; destroy: if (!bo->exec) kgem_bo_free(kgem, bo); } static void kgem_bo_unref(struct kgem *kgem, struct kgem_bo *bo) { assert(bo->refcnt); if (--bo->refcnt == 0) __kgem_bo_destroy(kgem, bo); } static void kgem_buffer_release(struct kgem *kgem, struct kgem_buffer *bo) { assert(bo->base.io); while (!list_is_empty(&bo->base.vma)) { struct kgem_bo *cached; cached = list_first_entry(&bo->base.vma, struct kgem_bo, vma); assert(cached->proxy == &bo->base); assert(cached != &bo->base); list_del(&cached->vma); assert(*(struct kgem_bo **)cached->map__gtt == cached); *(struct kgem_bo **)cached->map__gtt = NULL; cached->map__gtt = NULL; kgem_bo_destroy(kgem, cached); } } void kgem_retire__buffers(struct kgem *kgem) { while (!list_is_empty(&kgem->active_buffers)) { struct kgem_buffer *bo = list_last_entry(&kgem->active_buffers, struct kgem_buffer, base.list); DBG(("%s: handle=%d, busy? %d [%d]\n", __FUNCTION__, bo->base.handle, bo->base.rq != NULL, bo->base.exec != NULL)); assert(bo->base.exec == NULL || RQ(bo->base.rq) == kgem->next_request); if (bo->base.rq) break; DBG(("%s: releasing upload cache for handle=%d? %d\n", __FUNCTION__, bo->base.handle, !list_is_empty(&bo->base.vma))); list_del(&bo->base.list); kgem_buffer_release(kgem, bo); kgem_bo_unref(kgem, &bo->base); } } static bool kgem_retire__flushing(struct kgem *kgem) { struct kgem_bo *bo, *next; bool retired = false; list_for_each_entry_safe(bo, next, &kgem->flushing, request) { assert(RQ(bo->rq) == (void *)kgem); assert(bo->exec == NULL); if (__kgem_busy(kgem, bo->handle)) break; __kgem_bo_clear_busy(bo); if (bo->refcnt) continue; retired |= kgem_bo_move_to_cache(kgem, bo); } #if HAS_DEBUG_FULL { int count = 0; list_for_each_entry(bo, &kgem->flushing, request) count++; DBG(("%s: %d bo on flushing list\n", __FUNCTION__, count)); } #endif kgem->need_retire |= !list_is_empty(&kgem->flushing); return retired; } static bool __kgem_retire_rq(struct kgem *kgem, struct kgem_request *rq) { bool retired = false; DBG(("%s: request %d complete\n", __FUNCTION__, rq->bo->handle)); assert(RQ(rq->bo->rq) == rq); if (rq == kgem->fence[rq->ring]) kgem->fence[rq->ring] = NULL; while (!list_is_empty(&rq->buffers)) { struct kgem_bo *bo; bo = list_first_entry(&rq->buffers, struct kgem_bo, request); assert(RQ(bo->rq) == rq); assert(bo->exec == NULL); assert(bo->domain == DOMAIN_GPU || bo->domain == DOMAIN_NONE); list_del(&bo->request); if (bo->needs_flush) bo->needs_flush = __kgem_busy(kgem, bo->handle); if (bo->needs_flush) { DBG(("%s: moving %d to flushing\n", __FUNCTION__, bo->handle)); list_add(&bo->request, &kgem->flushing); bo->rq = MAKE_REQUEST(kgem, RQ_RING(bo->rq)); kgem->need_retire = true; continue; } bo->domain = DOMAIN_NONE; bo->gtt_dirty = false; bo->rq = NULL; if (bo->refcnt) continue; retired |= kgem_bo_move_to_cache(kgem, bo); } assert(rq->bo->rq == NULL); assert(rq->bo->exec == NULL); assert(list_is_empty(&rq->bo->request)); assert(rq->bo->refcnt > 0); if (--rq->bo->refcnt == 0) { if (kgem_bo_set_purgeable(kgem, rq->bo)) { kgem_bo_move_to_inactive(kgem, rq->bo); retired = true; } else { DBG(("%s: closing %d\n", __FUNCTION__, rq->bo->handle)); kgem_bo_free(kgem, rq->bo); } } __kgem_request_free(rq); return retired; } static bool kgem_retire__requests_ring(struct kgem *kgem, int ring) { bool retired = false; while (!list_is_empty(&kgem->requests[ring])) { struct kgem_request *rq; rq = list_first_entry(&kgem->requests[ring], struct kgem_request, list); assert(rq->ring == ring); if (__kgem_busy(kgem, rq->bo->handle)) break; retired |= __kgem_retire_rq(kgem, rq); } #if HAS_DEBUG_FULL { struct kgem_bo *bo; int count = 0; list_for_each_entry(bo, &kgem->requests[ring], request) count++; bo = NULL; if (!list_is_empty(&kgem->requests[ring])) bo = list_first_entry(&kgem->requests[ring], struct kgem_request, list)->bo; DBG(("%s: ring=%d, %d outstanding requests, oldest=%d\n", __FUNCTION__, ring, count, bo ? bo->handle : 0)); } #endif return retired; } static bool kgem_retire__requests(struct kgem *kgem) { bool retired = false; int n; for (n = 0; n < ARRAY_SIZE(kgem->requests); n++) { retired |= kgem_retire__requests_ring(kgem, n); kgem->need_retire |= !list_is_empty(&kgem->requests[n]); } return retired; } bool kgem_retire(struct kgem *kgem) { bool retired = false; DBG(("%s, need_retire?=%d\n", __FUNCTION__, kgem->need_retire)); kgem->need_retire = false; retired |= kgem_retire__flushing(kgem); retired |= kgem_retire__requests(kgem); DBG(("%s -- retired=%d, need_retire=%d\n", __FUNCTION__, retired, kgem->need_retire)); kgem->retire(kgem); return retired; } bool __kgem_ring_is_idle(struct kgem *kgem, int ring) { struct kgem_request *rq; assert(ring < ARRAY_SIZE(kgem->requests)); assert(!list_is_empty(&kgem->requests[ring])); rq = kgem->fence[ring]; if (rq) { struct kgem_request *tmp; if (__kgem_busy(kgem, rq->bo->handle)) { DBG(("%s: last fence handle=%d still busy\n", __FUNCTION__, rq->bo->handle)); return false; } do { tmp = list_first_entry(&kgem->requests[ring], struct kgem_request, list); assert(tmp->ring == ring); __kgem_retire_rq(kgem, tmp); } while (tmp != rq); assert(kgem->fence[ring] == NULL); if (list_is_empty(&kgem->requests[ring])) return true; } rq = list_last_entry(&kgem->requests[ring], struct kgem_request, list); assert(rq->ring == ring); if (__kgem_busy(kgem, rq->bo->handle)) { DBG(("%s: last requests handle=%d still busy\n", __FUNCTION__, rq->bo->handle)); kgem->fence[ring] = rq; return false; } DBG(("%s: ring=%d idle (handle=%d)\n", __FUNCTION__, ring, rq->bo->handle)); while (!list_is_empty(&kgem->requests[ring])) { rq = list_first_entry(&kgem->requests[ring], struct kgem_request, list); assert(rq->ring == ring); __kgem_retire_rq(kgem, rq); } return true; } void __kgem_retire_requests_upto(struct kgem *kgem, struct kgem_bo *bo) { struct kgem_request *rq = bo->rq, *tmp; struct list *requests = &kgem->requests[RQ_RING(rq) == I915_EXEC_BLT]; rq = RQ(rq); assert(rq != &kgem->static_request); if (rq == (struct kgem_request *)kgem) { __kgem_bo_clear_busy(bo); return; } do { tmp = list_first_entry(requests, struct kgem_request, list); assert(tmp->ring == rq->ring); __kgem_retire_rq(kgem, tmp); } while (tmp != rq); } #if 0 static void kgem_commit__check_reloc(struct kgem *kgem) { struct kgem_request *rq = kgem->next_request; struct kgem_bo *bo; bool has_64bit = kgem->gen >= 0100; int i; for (i = 0; i < kgem->nreloc; i++) { list_for_each_entry(bo, &rq->buffers, request) { if (bo->target_handle == kgem->reloc[i].target_handle) { uint64_t value = 0; gem_read(kgem->fd, rq->bo->handle, &value, kgem->reloc[i].offset, has_64bit ? 8 : 4); assert(bo->exec->offset == -1 || value == bo->exec->offset + (int)kgem->reloc[i].delta); break; } } } } #else #define kgem_commit__check_reloc(kgem) #endif #ifndef NDEBUG static void kgem_commit__check_buffers(struct kgem *kgem) { struct kgem_buffer *bo; list_for_each_entry(bo, &kgem->active_buffers, base.list) assert(bo->base.exec == NULL); } #else #define kgem_commit__check_buffers(kgem) #endif static void kgem_commit(struct kgem *kgem) { struct kgem_request *rq = kgem->next_request; struct kgem_bo *bo, *next; kgem_commit__check_reloc(kgem); list_for_each_entry_safe(bo, next, &rq->buffers, request) { assert(next->request.prev == &bo->request); DBG(("%s: release handle=%d (proxy? %d), dirty? %d flush? %d, snoop? %d -> offset=%x\n", __FUNCTION__, bo->handle, bo->proxy != NULL, bo->gpu_dirty, bo->needs_flush, bo->snoop, (unsigned)bo->exec->offset)); assert(bo->exec); assert(bo->proxy == NULL || bo->exec == &_kgem_dummy_exec); assert(RQ(bo->rq) == rq || (RQ(bo->proxy->rq) == rq)); bo->presumed_offset = bo->exec->offset; bo->exec = NULL; bo->target_handle = -1; if (!bo->refcnt && !bo->reusable) { assert(!bo->snoop); assert(!bo->proxy); kgem_bo_free(kgem, bo); continue; } bo->binding.offset = 0; bo->domain = DOMAIN_GPU; bo->gpu_dirty = false; if (bo->proxy) { /* proxies are not used for domain tracking */ __kgem_bo_clear_busy(bo); } kgem->scanout_busy |= bo->scanout && bo->needs_flush; } if (rq == &kgem->static_request) { struct drm_i915_gem_set_domain set_domain; DBG(("%s: syncing due to allocation failure\n", __FUNCTION__)); VG_CLEAR(set_domain); set_domain.handle = rq->bo->handle; set_domain.read_domains = I915_GEM_DOMAIN_GTT; set_domain.write_domain = I915_GEM_DOMAIN_GTT; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain)) { DBG(("%s: sync: GPU hang detected\n", __FUNCTION__)); kgem_throttle(kgem); } kgem_retire(kgem); assert(list_is_empty(&rq->buffers)); assert(rq->bo->map__gtt == NULL); assert(rq->bo->map__wc == NULL); assert(rq->bo->map__cpu == NULL); gem_close(kgem->fd, rq->bo->handle); kgem_cleanup_cache(kgem); } else { assert(rq->ring < ARRAY_SIZE(kgem->requests)); list_add_tail(&rq->list, &kgem->requests[rq->ring]); kgem->need_throttle = kgem->need_retire = 1; if (kgem->fence[rq->ring] == NULL && __kgem_busy(kgem, rq->bo->handle)) kgem->fence[rq->ring] = rq; } kgem->next_request = NULL; kgem_commit__check_buffers(kgem); } static void kgem_close_list(struct kgem *kgem, struct list *head) { while (!list_is_empty(head)) kgem_bo_free(kgem, list_first_entry(head, struct kgem_bo, list)); } static void kgem_close_inactive(struct kgem *kgem) { unsigned int i; for (i = 0; i < ARRAY_SIZE(kgem->inactive); i++) kgem_close_list(kgem, &kgem->inactive[i]); } static void kgem_finish_buffers(struct kgem *kgem) { struct kgem_buffer *bo, *next; list_for_each_entry_safe(bo, next, &kgem->batch_buffers, base.list) { DBG(("%s: buffer handle=%d, used=%d, exec?=%d, write=%d, mmapped=%s, refcnt=%d\n", __FUNCTION__, bo->base.handle, bo->used, bo->base.exec!=NULL, bo->write, bo->mmapped == MMAPPED_CPU ? "cpu" : bo->mmapped == MMAPPED_GTT ? "gtt" : "no", bo->base.refcnt)); assert(next->base.list.prev == &bo->base.list); assert(bo->base.io); assert(bo->base.refcnt >= 1); if (bo->base.refcnt > 1 && !bo->base.exec) { DBG(("%s: skipping unattached handle=%d, used=%d, refcnt=%d\n", __FUNCTION__, bo->base.handle, bo->used, bo->base.refcnt)); continue; } if (!bo->write) { assert(bo->base.exec || bo->base.refcnt > 1); goto decouple; } if (bo->mmapped) { uint32_t used; assert(!bo->need_io); used = ALIGN(bo->used, PAGE_SIZE); if (!DBG_NO_UPLOAD_ACTIVE && used + PAGE_SIZE <= bytes(&bo->base) && (kgem->has_llc || bo->mmapped == MMAPPED_GTT || bo->base.snoop)) { DBG(("%s: retaining upload buffer (%d/%d): used=%d, refcnt=%d\n", __FUNCTION__, bo->used, bytes(&bo->base), used, bo->base.refcnt)); bo->used = used; list_move(&bo->base.list, &kgem->active_buffers); kgem->need_retire = true; continue; } DBG(("%s: discarding mmapped buffer, used=%d, map type=%d\n", __FUNCTION__, bo->used, bo->mmapped)); goto decouple; } if (!bo->used || !bo->base.exec) { /* Unless we replace the handle in the execbuffer, * then this bo will become active. So decouple it * from the buffer list and track it in the normal * manner. */ goto decouple; } assert(bo->need_io); assert(bo->base.rq == MAKE_REQUEST(kgem->next_request, kgem->ring)); assert(bo->base.domain != DOMAIN_GPU); if (bo->base.refcnt == 1 && bo->base.size.pages.count > 1 && bo->used < bytes(&bo->base) / 2) { struct kgem_bo *shrink; unsigned alloc = NUM_PAGES(bo->used); shrink = search_snoop_cache(kgem, alloc, CREATE_INACTIVE | CREATE_NO_RETIRE); if (shrink) { void *map; int n; DBG(("%s: used=%d, shrinking %d to %d, handle %d to %d\n", __FUNCTION__, bo->used, bytes(&bo->base), bytes(shrink), bo->base.handle, shrink->handle)); assert(bo->used <= bytes(shrink)); map = kgem_bo_map__cpu(kgem, shrink); if (map) { kgem_bo_sync__cpu(kgem, shrink); memcpy(map, bo->mem, bo->used); shrink->target_handle = kgem->has_handle_lut ? bo->base.target_handle : shrink->handle; for (n = 0; n < kgem->nreloc; n++) { if (kgem->reloc[n].target_handle == bo->base.target_handle) { kgem->reloc[n].target_handle = shrink->target_handle; kgem->reloc[n].presumed_offset = shrink->presumed_offset; kgem->batch[kgem->reloc[n].offset/sizeof(kgem->batch[0])] = kgem->reloc[n].delta + shrink->presumed_offset; } } bo->base.exec->handle = shrink->handle; bo->base.exec->offset = shrink->presumed_offset; shrink->exec = bo->base.exec; shrink->rq = bo->base.rq; list_replace(&bo->base.request, &shrink->request); list_init(&bo->base.request); shrink->needs_flush = bo->base.gpu_dirty; bo->base.exec = NULL; bo->base.rq = NULL; bo->base.gpu_dirty = false; bo->base.needs_flush = false; bo->used = 0; goto decouple; } __kgem_bo_destroy(kgem, shrink); } shrink = search_linear_cache(kgem, alloc, CREATE_INACTIVE | CREATE_NO_RETIRE); if (shrink) { int n; DBG(("%s: used=%d, shrinking %d to %d, handle %d to %d\n", __FUNCTION__, bo->used, bytes(&bo->base), bytes(shrink), bo->base.handle, shrink->handle)); assert(bo->used <= bytes(shrink)); if (gem_write__cachealigned(kgem->fd, shrink->handle, 0, bo->used, bo->mem) == 0) { shrink->target_handle = kgem->has_handle_lut ? bo->base.target_handle : shrink->handle; for (n = 0; n < kgem->nreloc; n++) { if (kgem->reloc[n].target_handle == bo->base.target_handle) { kgem->reloc[n].target_handle = shrink->target_handle; kgem->reloc[n].presumed_offset = shrink->presumed_offset; kgem->batch[kgem->reloc[n].offset/sizeof(kgem->batch[0])] = kgem->reloc[n].delta + shrink->presumed_offset; } } bo->base.exec->handle = shrink->handle; bo->base.exec->offset = shrink->presumed_offset; shrink->exec = bo->base.exec; shrink->rq = bo->base.rq; list_replace(&bo->base.request, &shrink->request); list_init(&bo->base.request); shrink->needs_flush = bo->base.gpu_dirty; bo->base.exec = NULL; bo->base.rq = NULL; bo->base.gpu_dirty = false; bo->base.needs_flush = false; bo->used = 0; goto decouple; } __kgem_bo_destroy(kgem, shrink); } } DBG(("%s: handle=%d, uploading %d/%d\n", __FUNCTION__, bo->base.handle, bo->used, bytes(&bo->base))); ASSERT_IDLE(kgem, bo->base.handle); assert(bo->used <= bytes(&bo->base)); gem_write__cachealigned(kgem->fd, bo->base.handle, 0, bo->used, bo->mem); bo->need_io = 0; decouple: DBG(("%s: releasing handle=%d\n", __FUNCTION__, bo->base.handle)); list_del(&bo->base.list); kgem_bo_unref(kgem, &bo->base); } } static void kgem_cleanup(struct kgem *kgem) { int n; for (n = 0; n < ARRAY_SIZE(kgem->requests); n++) { while (!list_is_empty(&kgem->requests[n])) { struct kgem_request *rq; rq = list_first_entry(&kgem->requests[n], struct kgem_request, list); assert(rq->ring == n); while (!list_is_empty(&rq->buffers)) { struct kgem_bo *bo; bo = list_first_entry(&rq->buffers, struct kgem_bo, request); bo->exec = NULL; bo->gpu_dirty = false; __kgem_bo_clear_busy(bo); if (bo->refcnt == 0) kgem_bo_free(kgem, bo); } __kgem_request_free(rq); } } kgem_close_inactive(kgem); } static int kgem_batch_write(struct kgem *kgem, struct kgem_bo *bo, uint32_t size) { char *ptr; int ret; ASSERT_IDLE(kgem, bo->handle); #if DBG_NO_EXEC { uint32_t batch[] = { MI_BATCH_BUFFER_END, 0}; return gem_write(kgem->fd, bo->handle, 0, sizeof(batch), batch); } #endif assert(!bo->scanout); retry: ptr = NULL; if (bo->domain == DOMAIN_CPU || kgem->has_llc) { ptr = bo->map__cpu; if (ptr == NULL) ptr = __kgem_bo_map__cpu(kgem, bo); } else if (kgem->has_wc_mmap) { ptr = bo->map__wc; if (ptr == NULL) ptr = __kgem_bo_map__wc(kgem, bo); } if (ptr) { memcpy(ptr, kgem->batch, sizeof(uint32_t)*kgem->nbatch); if (kgem->surface != kgem->batch_size) { ret = PAGE_ALIGN(sizeof(uint32_t) * kgem->batch_size); ret -= sizeof(uint32_t) * kgem->surface; ptr += size - ret; memcpy(ptr, kgem->batch + kgem->surface, (kgem->batch_size - kgem->surface)*sizeof(uint32_t)); } return 0; } /* If there is no surface data, just upload the batch */ if (kgem->surface == kgem->batch_size) { if ((ret = gem_write__cachealigned(kgem->fd, bo->handle, 0, sizeof(uint32_t)*kgem->nbatch, kgem->batch)) == 0) return 0; goto expire; } /* Are the batch pages conjoint with the surface pages? */ if (kgem->surface < kgem->nbatch + PAGE_SIZE/sizeof(uint32_t)) { assert(size == PAGE_ALIGN(kgem->batch_size*sizeof(uint32_t))); if ((ret = gem_write__cachealigned(kgem->fd, bo->handle, 0, kgem->batch_size*sizeof(uint32_t), kgem->batch)) == 0) return 0; goto expire; } /* Disjoint surface/batch, upload separately */ if ((ret = gem_write__cachealigned(kgem->fd, bo->handle, 0, sizeof(uint32_t)*kgem->nbatch, kgem->batch))) goto expire; ret = PAGE_ALIGN(sizeof(uint32_t) * kgem->batch_size); ret -= sizeof(uint32_t) * kgem->surface; assert(size-ret >= kgem->nbatch*sizeof(uint32_t)); if (gem_write(kgem->fd, bo->handle, size - ret, (kgem->batch_size - kgem->surface)*sizeof(uint32_t), kgem->batch + kgem->surface)) goto expire; return 0; expire: assert(ret != EINVAL); (void)__kgem_throttle_retire(kgem, 0); if (kgem_expire_cache(kgem)) goto retry; if (kgem_cleanup_cache(kgem)) goto retry; ERR(("%s: failed to write batch (handle=%d): %d\n", __FUNCTION__, bo->handle, -ret)); return ret; } void kgem_reset(struct kgem *kgem) { if (kgem->next_request) { struct kgem_request *rq = kgem->next_request; while (!list_is_empty(&rq->buffers)) { struct kgem_bo *bo = list_first_entry(&rq->buffers, struct kgem_bo, request); list_del(&bo->request); assert(RQ(bo->rq) == rq); bo->binding.offset = 0; bo->exec = NULL; bo->target_handle = -1; bo->gpu_dirty = false; if (bo->needs_flush && __kgem_busy(kgem, bo->handle)) { assert(bo->domain == DOMAIN_GPU || bo->domain == DOMAIN_NONE); list_add(&bo->request, &kgem->flushing); bo->rq = (void *)kgem; kgem->need_retire = true; } else __kgem_bo_clear_busy(bo); if (bo->refcnt || bo->rq) continue; kgem_bo_move_to_cache(kgem, bo); } if (rq != &kgem->static_request) { list_init(&rq->list); __kgem_request_free(rq); } } kgem->nfence = 0; kgem->nexec = 0; kgem->nreloc = 0; kgem->nreloc__self = 0; kgem->aperture = 0; kgem->aperture_fenced = 0; kgem->aperture_max_fence = 0; kgem->nbatch = 0; kgem->surface = kgem->batch_size; kgem->mode = KGEM_NONE; kgem->needs_semaphore = false; kgem->needs_reservation = false; kgem->flush = 0; kgem->batch_flags = kgem->batch_flags_base; assert(kgem->batch); kgem->next_request = __kgem_request_alloc(kgem); kgem_sna_reset(kgem); } static int compact_batch_surface(struct kgem *kgem, int *shrink) { int size, n; if (!kgem->has_relaxed_delta) return kgem->batch_size * sizeof(uint32_t); /* See if we can pack the contents into one or two pages */ n = ALIGN(kgem->batch_size, 1024); size = n - kgem->surface + kgem->nbatch; size = ALIGN(size, 1024); *shrink = (n - size) * sizeof(uint32_t); return size * sizeof(uint32_t); } static struct kgem_bo * kgem_create_batch(struct kgem *kgem) { #if !DBG_NO_SHRINK_BATCHES struct drm_i915_gem_set_domain set_domain; struct kgem_bo *bo; int shrink = 0; int size; if (kgem->surface != kgem->batch_size) size = compact_batch_surface(kgem, &shrink); else size = kgem->nbatch * sizeof(uint32_t); if (size <= 4096) { bo = list_first_entry(&kgem->pinned_batches[0], struct kgem_bo, list); if (!bo->rq) { out_4096: assert(bo->refcnt > 0); list_move_tail(&bo->list, &kgem->pinned_batches[0]); bo = kgem_bo_reference(bo); goto write; } if (!__kgem_busy(kgem, bo->handle)) { assert(RQ(bo->rq)->bo == bo); __kgem_retire_rq(kgem, RQ(bo->rq)); goto out_4096; } } if (size <= 16384) { bo = list_first_entry(&kgem->pinned_batches[1], struct kgem_bo, list); if (!bo->rq) { out_16384: assert(bo->refcnt > 0); list_move_tail(&bo->list, &kgem->pinned_batches[1]); bo = kgem_bo_reference(bo); goto write; } if (!__kgem_busy(kgem, bo->handle)) { __kgem_retire_rq(kgem, RQ(bo->rq)); goto out_16384; } } if (kgem->gen == 020) { bo = kgem_create_linear(kgem, size, CREATE_CACHED | CREATE_TEMPORARY); if (bo) goto write; /* Nothing available for reuse, rely on the kernel wa */ if (kgem->has_pinned_batches) { bo = kgem_create_linear(kgem, size, CREATE_CACHED | CREATE_TEMPORARY); if (bo) { kgem->batch_flags &= ~LOCAL_I915_EXEC_IS_PINNED; goto write; } } if (size < 16384) { bo = list_first_entry(&kgem->pinned_batches[size > 4096], struct kgem_bo, list); list_move_tail(&bo->list, &kgem->pinned_batches[size > 4096]); DBG(("%s: syncing due to busy batches\n", __FUNCTION__)); VG_CLEAR(set_domain); set_domain.handle = bo->handle; set_domain.read_domains = I915_GEM_DOMAIN_GTT; set_domain.write_domain = I915_GEM_DOMAIN_GTT; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain)) { DBG(("%s: sync: GPU hang detected\n", __FUNCTION__)); kgem_throttle(kgem); return NULL; } kgem_retire(kgem); assert(bo->rq == NULL); bo = kgem_bo_reference(bo); goto write; } } bo = NULL; if (!kgem->has_llc) { bo = kgem_create_linear(kgem, size, CREATE_NO_THROTTLE); if (bo) { write: kgem_fixup_relocs(kgem, bo, shrink); if (kgem_batch_write(kgem, bo, size)) { kgem_bo_destroy(kgem, bo); return NULL; } } } if (bo == NULL) bo = kgem_new_batch(kgem); return bo; #else return kgem_new_batch(kgem); #endif } #if !NDEBUG static bool dump_file(const char *path) { FILE *file; size_t len = 0; char *line = NULL; file = fopen(path, "r"); if (file == NULL) return false; while (getline(&line, &len, file) != -1) ErrorF("%s", line); free(line); fclose(file); return true; } static void dump_debugfs(struct kgem *kgem, const char *name) { char path[80]; int minor = kgem_get_minor(kgem); if (minor < 0) return; sprintf(path, "/sys/kernel/debug/dri/%d/%s", minor, name); if (dump_file(path)) return; sprintf(path, "/debug/dri/%d/%s", minor, name); if (dump_file(path)) return; } static void dump_gtt_info(struct kgem *kgem) { dump_debugfs(kgem, "i915_gem_gtt"); } static void dump_fence_regs(struct kgem *kgem) { dump_debugfs(kgem, "i915_gem_fence_regs"); } #endif static int do_execbuf(struct kgem *kgem, struct drm_i915_gem_execbuffer2 *execbuf) { int ret, err; retry: ret = do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf); if (ret == 0) return 0; DBG(("%s: failed ret=%d, throttling and discarding cache\n", __FUNCTION__, ret)); (void)__kgem_throttle_retire(kgem, 0); if (kgem_expire_cache(kgem)) goto retry; if (kgem_cleanup_cache(kgem)) goto retry; /* last gasp */ ret = do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf); if (ret == 0) return 0; xf86DrvMsg(kgem_get_screen_index(kgem), X_WARNING, "Failed to submit rendering commands, trying again with outputs disabled.\n"); /* One last trick up our sleeve for when we run out of space. * We turn everything off to free up our pinned framebuffers, * sprites and cursors, and try one last time. */ err = errno; if (sna_mode_disable(container_of(kgem, struct sna, kgem))) { kgem_cleanup_cache(kgem); ret = do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf); DBG(("%s: last_gasp ret=%d\n", __FUNCTION__, ret)); sna_mode_enable(container_of(kgem, struct sna, kgem)); } errno = err; return ret; } void _kgem_submit(struct kgem *kgem) { struct kgem_request *rq; uint32_t batch_end; assert(!DBG_NO_HW); assert(!kgem->wedged); assert(kgem->nbatch); assert(kgem->nbatch <= KGEM_BATCH_SIZE(kgem)); assert(kgem->nbatch <= kgem->surface); batch_end = kgem_end_batch(kgem); kgem_sna_flush(kgem); DBG(("batch[%d/%d, flags=%x]: %d %d %d %d, nreloc=%d, nexec=%d, nfence=%d, aperture=%d [fenced=%d]\n", kgem->mode, kgem->ring, kgem->batch_flags, batch_end, kgem->nbatch, kgem->surface, kgem->batch_size, kgem->nreloc, kgem->nexec, kgem->nfence, kgem->aperture, kgem->aperture_fenced)); assert(kgem->nbatch <= kgem->batch_size); assert(kgem->nbatch <= kgem->surface); assert(kgem->nreloc <= ARRAY_SIZE(kgem->reloc)); assert(kgem->nexec < ARRAY_SIZE(kgem->exec)); assert(kgem->nfence <= kgem->fence_max); kgem_finish_buffers(kgem); #if SHOW_BATCH_BEFORE __kgem_batch_debug(kgem, batch_end); #endif rq = kgem->next_request; assert(rq->bo == NULL); rq->bo = kgem_create_batch(kgem); if (rq->bo) { struct drm_i915_gem_execbuffer2 execbuf; int i, ret; assert(!rq->bo->needs_flush); i = kgem->nexec++; kgem->exec[i].handle = rq->bo->handle; kgem->exec[i].relocation_count = kgem->nreloc; kgem->exec[i].relocs_ptr = (uintptr_t)kgem->reloc; kgem->exec[i].alignment = 0; kgem->exec[i].offset = rq->bo->presumed_offset; kgem->exec[i].flags = 0; kgem->exec[i].rsvd1 = 0; kgem->exec[i].rsvd2 = 0; rq->bo->exec = &kgem->exec[i]; rq->bo->rq = MAKE_REQUEST(rq, kgem->ring); /* useful sanity check */ list_add(&rq->bo->request, &rq->buffers); rq->ring = kgem->ring == KGEM_BLT; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)kgem->exec; execbuf.buffer_count = kgem->nexec; execbuf.batch_len = batch_end*sizeof(uint32_t); execbuf.flags = kgem->ring | kgem->batch_flags; if (DBG_DUMP) { int fd = open("/tmp/i915-batchbuffers.dump", O_WRONLY | O_CREAT | O_APPEND, 0666); if (fd != -1) { ret = write(fd, kgem->batch, batch_end*sizeof(uint32_t)); fd = close(fd); } } ret = do_execbuf(kgem, &execbuf); if (DEBUG_SYNC && ret == 0) { struct drm_i915_gem_set_domain set_domain; VG_CLEAR(set_domain); set_domain.handle = rq->bo->handle; set_domain.read_domains = I915_GEM_DOMAIN_GTT; set_domain.write_domain = I915_GEM_DOMAIN_GTT; ret = do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain); } if (ret < 0) { kgem_throttle(kgem); if (!kgem->wedged) { xf86DrvMsg(kgem_get_screen_index(kgem), X_ERROR, "Failed to submit rendering commands, disabling acceleration.\n"); __kgem_set_wedged(kgem); } #if !NDEBUG ErrorF("batch[%d/%d]: %d %d %d, nreloc=%d, nexec=%d, nfence=%d, aperture=%d, fenced=%d, high=%d,%d: errno=%d\n", kgem->mode, kgem->ring, batch_end, kgem->nbatch, kgem->surface, kgem->nreloc, kgem->nexec, kgem->nfence, kgem->aperture, kgem->aperture_fenced, kgem->aperture_high, kgem->aperture_total, -ret); for (i = 0; i < kgem->nexec; i++) { struct kgem_bo *bo, *found = NULL; list_for_each_entry(bo, &kgem->next_request->buffers, request) { if (bo->handle == kgem->exec[i].handle) { found = bo; break; } } ErrorF("exec[%d] = handle:%d, presumed offset: %x, size: %d, tiling %d, fenced %d, snooped %d, deleted %d\n", i, kgem->exec[i].handle, (int)kgem->exec[i].offset, found ? kgem_bo_size(found) : -1, found ? found->tiling : -1, (int)(kgem->exec[i].flags & EXEC_OBJECT_NEEDS_FENCE), found ? found->snoop : -1, found ? found->purged : -1); } for (i = 0; i < kgem->nreloc; i++) { ErrorF("reloc[%d] = pos:%d, target:%d, delta:%d, read:%x, write:%x, offset:%x\n", i, (int)kgem->reloc[i].offset, kgem->reloc[i].target_handle, kgem->reloc[i].delta, kgem->reloc[i].read_domains, kgem->reloc[i].write_domain, (int)kgem->reloc[i].presumed_offset); } { struct drm_i915_gem_get_aperture aperture; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture) == 0) ErrorF("Aperture size %lld, available %lld\n", (long long)aperture.aper_size, (long long)aperture.aper_available_size); } if (ret == -ENOSPC) dump_gtt_info(kgem); if (ret == -EDEADLK) dump_fence_regs(kgem); if (DEBUG_SYNC) { int fd = open("/tmp/batchbuffer", O_WRONLY | O_CREAT | O_APPEND, 0666); if (fd != -1) { int ignored = write(fd, kgem->batch, batch_end*sizeof(uint32_t)); assert(ignored == batch_end*sizeof(uint32_t)); close(fd); } FatalError("SNA: failed to submit batchbuffer, errno=%d\n", -ret); } #endif } } #if SHOW_BATCH_AFTER if (gem_read(kgem->fd, rq->bo->handle, kgem->batch, 0, batch_end*sizeof(uint32_t)) == 0) __kgem_batch_debug(kgem, batch_end); #endif kgem_commit(kgem); if (kgem->wedged) kgem_cleanup(kgem); kgem_reset(kgem); assert(kgem->next_request != NULL); } static bool find_hang_state(struct kgem *kgem, char *path, int maxlen) { int minor = kgem_get_minor(kgem); /* Search for our hang state in a few canonical locations. * In the unlikely event of having multiple devices, we * will need to check which minor actually corresponds to ours. */ snprintf(path, maxlen, "/sys/class/drm/card%d/error", minor); if (access(path, R_OK) == 0) return true; snprintf(path, maxlen, "/sys/kernel/debug/dri/%d/i915_error_state", minor); if (access(path, R_OK) == 0) return true; snprintf(path, maxlen, "/debug/dri/%d/i915_error_state", minor); if (access(path, R_OK) == 0) return true; path[0] = '\0'; return false; } void kgem_throttle(struct kgem *kgem) { if (kgem->wedged) return; if (__kgem_throttle(kgem, true)) { static int once; char path[128]; xf86DrvMsg(kgem_get_screen_index(kgem), X_ERROR, "Detected a hung GPU, disabling acceleration.\n"); if (!once && find_hang_state(kgem, path, sizeof(path))) { xf86DrvMsg(kgem_get_screen_index(kgem), X_ERROR, "When reporting this, please include %s and the full dmesg.\n", path); once = 1; } __kgem_set_wedged(kgem); kgem->need_throttle = false; } } int kgem_is_wedged(struct kgem *kgem) { return __kgem_throttle(kgem, true); } static void kgem_purge_cache(struct kgem *kgem) { struct kgem_bo *bo, *next; int i; for (i = 0; i < ARRAY_SIZE(kgem->inactive); i++) { list_for_each_entry_safe(bo, next, &kgem->inactive[i], list) { if (!kgem_bo_is_retained(kgem, bo)) { DBG(("%s: purging %d\n", __FUNCTION__, bo->handle)); kgem_bo_free(kgem, bo); } } } kgem->need_purge = false; } void kgem_clean_scanout_cache(struct kgem *kgem) { while (!list_is_empty(&kgem->scanout)) { struct kgem_bo *bo; bo = list_first_entry(&kgem->scanout, struct kgem_bo, list); assert(bo->scanout); assert(!bo->refcnt); assert(!bo->prime); assert(bo->proxy == NULL); if (bo->exec || __kgem_busy(kgem, bo->handle)) break; DBG(("%s: handle=%d, fb=%d (reusable=%d)\n", __FUNCTION__, bo->handle, bo->delta, bo->reusable)); list_del(&bo->list); kgem_bo_rmfb(kgem, bo); bo->scanout = false; if (!bo->purged) { bo->reusable = true; if (kgem->has_llc && !gem_set_caching(kgem->fd, bo->handle, SNOOPED)) bo->reusable = false; } __kgem_bo_destroy(kgem, bo); } } void kgem_clean_large_cache(struct kgem *kgem) { while (!list_is_empty(&kgem->large_inactive)) { kgem_bo_free(kgem, list_first_entry(&kgem->large_inactive, struct kgem_bo, list)); } } bool kgem_expire_cache(struct kgem *kgem) { time_t now, expire; struct kgem_bo *bo; unsigned int size = 0, count = 0; bool idle; unsigned int i; time(&now); while (__kgem_freed_bo) { bo = __kgem_freed_bo; __kgem_freed_bo = *(struct kgem_bo **)bo; free(bo); } while (__kgem_freed_request) { struct kgem_request *rq = __kgem_freed_request; __kgem_freed_request = *(struct kgem_request **)rq; free(rq); } kgem_clean_large_cache(kgem); if (container_of(kgem, struct sna, kgem)->scrn->vtSema) kgem_clean_scanout_cache(kgem); expire = 0; list_for_each_entry(bo, &kgem->snoop, list) { if (bo->delta) { expire = now - MAX_INACTIVE_TIME/2; break; } bo->delta = now; } if (expire) { while (!list_is_empty(&kgem->snoop)) { bo = list_last_entry(&kgem->snoop, struct kgem_bo, list); if (bo->delta > expire) break; kgem_bo_free(kgem, bo); } } #ifdef DEBUG_MEMORY { long snoop_size = 0; int snoop_count = 0; list_for_each_entry(bo, &kgem->snoop, list) snoop_count++, snoop_size += bytes(bo); DBG(("%s: still allocated %d bo, %ld bytes, in snoop cache\n", __FUNCTION__, snoop_count, snoop_size)); } #endif kgem_retire(kgem); if (kgem->wedged) kgem_cleanup(kgem); kgem->expire(kgem); if (kgem->need_purge) kgem_purge_cache(kgem); if (kgem->need_retire) kgem_retire(kgem); expire = 0; idle = true; for (i = 0; i < ARRAY_SIZE(kgem->inactive); i++) { idle &= list_is_empty(&kgem->inactive[i]); list_for_each_entry(bo, &kgem->inactive[i], list) { if (bo->delta) { expire = now - MAX_INACTIVE_TIME; break; } bo->delta = now; } } if (expire == 0) { DBG(("%s: idle? %d\n", __FUNCTION__, idle)); kgem->need_expire = !idle; return false; } idle = true; for (i = 0; i < ARRAY_SIZE(kgem->inactive); i++) { struct list preserve; list_init(&preserve); while (!list_is_empty(&kgem->inactive[i])) { bo = list_last_entry(&kgem->inactive[i], struct kgem_bo, list); if (bo->delta > expire) { idle = false; break; } if (bo->map__cpu && bo->delta + MAP_PRESERVE_TIME > expire) { idle = false; list_move_tail(&bo->list, &preserve); } else { count++; size += bytes(bo); kgem_bo_free(kgem, bo); DBG(("%s: expiring %d\n", __FUNCTION__, bo->handle)); } } if (!list_is_empty(&preserve)) { preserve.prev->next = kgem->inactive[i].next; kgem->inactive[i].next->prev = preserve.prev; kgem->inactive[i].next = preserve.next; preserve.next->prev = &kgem->inactive[i]; } } #ifdef DEBUG_MEMORY { long inactive_size = 0; int inactive_count = 0; for (i = 0; i < ARRAY_SIZE(kgem->inactive); i++) list_for_each_entry(bo, &kgem->inactive[i], list) inactive_count++, inactive_size += bytes(bo); DBG(("%s: still allocated %d bo, %ld bytes, in inactive cache\n", __FUNCTION__, inactive_count, inactive_size)); } #endif DBG(("%s: expired %d objects, %d bytes, idle? %d\n", __FUNCTION__, count, size, idle)); kgem->need_expire = !idle; return count; (void)count; (void)size; } bool kgem_cleanup_cache(struct kgem *kgem) { unsigned int i; int n; /* sync to the most recent request */ for (n = 0; n < ARRAY_SIZE(kgem->requests); n++) { if (!list_is_empty(&kgem->requests[n])) { struct kgem_request *rq; struct drm_i915_gem_set_domain set_domain; rq = list_first_entry(&kgem->requests[n], struct kgem_request, list); DBG(("%s: sync on cleanup\n", __FUNCTION__)); VG_CLEAR(set_domain); set_domain.handle = rq->bo->handle; set_domain.read_domains = I915_GEM_DOMAIN_GTT; set_domain.write_domain = I915_GEM_DOMAIN_GTT; (void)do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain); } } kgem_retire(kgem); kgem_cleanup(kgem); if (!kgem->need_expire) return false; for (i = 0; i < ARRAY_SIZE(kgem->inactive); i++) { while (!list_is_empty(&kgem->inactive[i])) kgem_bo_free(kgem, list_last_entry(&kgem->inactive[i], struct kgem_bo, list)); } kgem_clean_large_cache(kgem); kgem_clean_scanout_cache(kgem); while (!list_is_empty(&kgem->snoop)) kgem_bo_free(kgem, list_last_entry(&kgem->snoop, struct kgem_bo, list)); while (__kgem_freed_bo) { struct kgem_bo *bo = __kgem_freed_bo; __kgem_freed_bo = *(struct kgem_bo **)bo; free(bo); } kgem->need_purge = false; kgem->need_expire = false; return true; } static struct kgem_bo * search_linear_cache(struct kgem *kgem, unsigned int num_pages, unsigned flags) { struct kgem_bo *bo, *first = NULL; bool use_active = (flags & CREATE_INACTIVE) == 0; struct list *cache; DBG(("%s: num_pages=%d, flags=%x, use_active? %d, use_large=%d [max=%d]\n", __FUNCTION__, num_pages, flags, use_active, num_pages >= MAX_CACHE_SIZE / PAGE_SIZE, MAX_CACHE_SIZE / PAGE_SIZE)); assert(num_pages); if (num_pages >= MAX_CACHE_SIZE / PAGE_SIZE) { DBG(("%s: searching large buffers\n", __FUNCTION__)); retry_large: cache = use_active ? &kgem->large : &kgem->large_inactive; list_for_each_entry_safe(bo, first, cache, list) { assert(bo->refcnt == 0); assert(bo->reusable); assert(!bo->scanout); if (num_pages > num_pages(bo)) goto discard; if (bo->tiling != I915_TILING_NONE) { if (use_active) goto discard; if (!gem_set_tiling(kgem->fd, bo->handle, I915_TILING_NONE, 0)) goto discard; bo->tiling = I915_TILING_NONE; bo->pitch = 0; } if (bo->purged && !kgem_bo_clear_purgeable(kgem, bo)) goto discard; list_del(&bo->list); if (RQ(bo->rq) == (void *)kgem) { assert(bo->exec == NULL); list_del(&bo->request); } bo->delta = 0; assert_tiling(kgem, bo); return bo; discard: if (!use_active) kgem_bo_free(kgem, bo); } if (use_active) { use_active = false; goto retry_large; } if (__kgem_throttle_retire(kgem, flags)) goto retry_large; return NULL; } if (!use_active && list_is_empty(inactive(kgem, num_pages))) { DBG(("%s: inactive and cache bucket empty\n", __FUNCTION__)); if (flags & CREATE_NO_RETIRE) { DBG(("%s: can not retire\n", __FUNCTION__)); return NULL; } if (list_is_empty(active(kgem, num_pages, I915_TILING_NONE))) { DBG(("%s: active cache bucket empty\n", __FUNCTION__)); return NULL; } if (!__kgem_throttle_retire(kgem, flags)) { DBG(("%s: nothing retired\n", __FUNCTION__)); return NULL; } if (list_is_empty(inactive(kgem, num_pages))) { DBG(("%s: active cache bucket still empty after retire\n", __FUNCTION__)); return NULL; } } if (!use_active && flags & (CREATE_CPU_MAP | CREATE_GTT_MAP)) { int for_cpu = !!(flags & CREATE_CPU_MAP); DBG(("%s: searching for inactive %s map\n", __FUNCTION__, for_cpu ? "cpu" : "gtt")); cache = &kgem->vma[for_cpu].inactive[cache_bucket(num_pages)]; list_for_each_entry(bo, cache, vma) { assert(for_cpu ? !!bo->map__cpu : (bo->map__gtt || bo->map__wc)); assert(bucket(bo) == cache_bucket(num_pages)); assert(bo->proxy == NULL); assert(bo->rq == NULL); assert(bo->exec == NULL); assert(!bo->scanout); if (num_pages > num_pages(bo)) { DBG(("inactive too small: %d < %d\n", num_pages(bo), num_pages)); continue; } if (bo->purged && !kgem_bo_clear_purgeable(kgem, bo)) { kgem_bo_free(kgem, bo); break; } if (I915_TILING_NONE != bo->tiling && !gem_set_tiling(kgem->fd, bo->handle, I915_TILING_NONE, 0)) continue; kgem_bo_remove_from_inactive(kgem, bo); assert(list_is_empty(&bo->vma)); assert(list_is_empty(&bo->list)); bo->tiling = I915_TILING_NONE; bo->pitch = 0; bo->delta = 0; DBG((" %s: found handle=%d (num_pages=%d) in linear vma cache\n", __FUNCTION__, bo->handle, num_pages(bo))); assert(use_active || bo->domain != DOMAIN_GPU); assert(!bo->needs_flush); assert_tiling(kgem, bo); ASSERT_MAYBE_IDLE(kgem, bo->handle, !use_active); return bo; } if (flags & CREATE_EXACT) return NULL; if (flags & CREATE_CPU_MAP && !kgem->has_llc) return NULL; } cache = use_active ? active(kgem, num_pages, I915_TILING_NONE) : inactive(kgem, num_pages); list_for_each_entry(bo, cache, list) { assert(bo->refcnt == 0); assert(bo->reusable); assert(!!bo->rq == !!use_active); assert(bo->proxy == NULL); assert(!bo->scanout); if (num_pages > num_pages(bo)) continue; if (use_active && kgem->gen <= 040 && bo->tiling != I915_TILING_NONE) continue; if (bo->purged && !kgem_bo_clear_purgeable(kgem, bo)) { kgem_bo_free(kgem, bo); break; } if (I915_TILING_NONE != bo->tiling) { if (flags & (CREATE_CPU_MAP | CREATE_GTT_MAP)) continue; if (first) continue; if (!gem_set_tiling(kgem->fd, bo->handle, I915_TILING_NONE, 0)) continue; bo->tiling = I915_TILING_NONE; bo->pitch = 0; } if (bo->map__gtt || bo->map__wc || bo->map__cpu) { if (flags & (CREATE_CPU_MAP | CREATE_GTT_MAP)) { int for_cpu = !!(flags & CREATE_CPU_MAP); if (for_cpu ? !!bo->map__cpu : (bo->map__gtt || bo->map__wc)){ if (first != NULL) break; first = bo; continue; } } else { if (first != NULL) break; first = bo; continue; } } else { if (flags & CREATE_GTT_MAP && !kgem_bo_can_map(kgem, bo)) continue; if (flags & (CREATE_CPU_MAP | CREATE_GTT_MAP)) { if (first != NULL) break; first = bo; continue; } } if (use_active) kgem_bo_remove_from_active(kgem, bo); else kgem_bo_remove_from_inactive(kgem, bo); assert(bo->tiling == I915_TILING_NONE); bo->pitch = 0; bo->delta = 0; DBG((" %s: found handle=%d (num_pages=%d) in linear %s cache\n", __FUNCTION__, bo->handle, num_pages(bo), use_active ? "active" : "inactive")); assert(list_is_empty(&bo->list)); assert(list_is_empty(&bo->vma)); assert(use_active || bo->domain != DOMAIN_GPU); assert(!bo->needs_flush || use_active); assert_tiling(kgem, bo); ASSERT_MAYBE_IDLE(kgem, bo->handle, !use_active); return bo; } if (first) { assert(first->tiling == I915_TILING_NONE); if (use_active) kgem_bo_remove_from_active(kgem, first); else kgem_bo_remove_from_inactive(kgem, first); first->pitch = 0; first->delta = 0; DBG((" %s: found handle=%d (near-miss) (num_pages=%d) in linear %s cache\n", __FUNCTION__, first->handle, num_pages(first), use_active ? "active" : "inactive")); assert(list_is_empty(&first->list)); assert(list_is_empty(&first->vma)); assert(use_active || first->domain != DOMAIN_GPU); assert(!first->needs_flush || use_active); ASSERT_MAYBE_IDLE(kgem, first->handle, !use_active); return first; } return NULL; } struct kgem_bo *kgem_create_for_name(struct kgem *kgem, uint32_t name) { struct drm_gem_open open_arg; struct drm_i915_gem_get_tiling tiling; struct kgem_bo *bo; DBG(("%s(name=%d)\n", __FUNCTION__, name)); VG_CLEAR(open_arg); open_arg.name = name; if (do_ioctl(kgem->fd, DRM_IOCTL_GEM_OPEN, &open_arg)) return NULL; DBG(("%s: new handle=%d\n", __FUNCTION__, open_arg.handle)); VG_CLEAR(tiling); tiling.handle = open_arg.handle; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_GET_TILING, &tiling)) { DBG(("%s(name=%d) get-tiling failed, ret=%d\n", __FUNCTION__, name, errno)); gem_close(kgem->fd, open_arg.handle); return NULL; } DBG(("%s: handle=%d, tiling=%d\n", __FUNCTION__, tiling.handle, tiling.tiling_mode)); bo = __kgem_bo_alloc(open_arg.handle, open_arg.size / PAGE_SIZE); if (bo == NULL) { gem_close(kgem->fd, open_arg.handle); return NULL; } bo->unique_id = kgem_get_unique_id(kgem); bo->tiling = tiling.tiling_mode; bo->reusable = false; bo->prime = true; bo->purged = true; /* no coherency guarantees */ debug_alloc__bo(kgem, bo); return bo; } struct kgem_bo *kgem_create_for_prime(struct kgem *kgem, int name, uint32_t size) { #ifdef DRM_IOCTL_PRIME_FD_TO_HANDLE struct drm_prime_handle args; struct drm_i915_gem_get_tiling tiling; struct local_i915_gem_caching caching; struct kgem_bo *bo; off_t seek; DBG(("%s(name=%d)\n", __FUNCTION__, name)); VG_CLEAR(args); args.fd = name; args.flags = 0; if (do_ioctl(kgem->fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &args)) { DBG(("%s(name=%d) fd-to-handle failed, ret=%d\n", __FUNCTION__, name, errno)); return NULL; } VG_CLEAR(tiling); tiling.handle = args.handle; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_GET_TILING, &tiling)) { DBG(("%s(name=%d) get-tiling failed, ret=%d\n", __FUNCTION__, name, errno)); gem_close(kgem->fd, args.handle); return NULL; } /* Query actual size, overriding specified if available */ seek = lseek(args.fd, 0, SEEK_END); DBG(("%s: estimated size=%ld, actual=%lld\n", __FUNCTION__, (long)size, (long long)seek)); if (seek != -1) { if (size > seek) { DBG(("%s(name=%d) estimated required size [%d] is larger than actual [%ld]\n", __FUNCTION__, name, size, (long)seek)); gem_close(kgem->fd, args.handle); return NULL; } size = seek; } DBG(("%s: new handle=%d, tiling=%d\n", __FUNCTION__, args.handle, tiling.tiling_mode)); bo = __kgem_bo_alloc(args.handle, NUM_PAGES(size)); if (bo == NULL) { gem_close(kgem->fd, args.handle); return NULL; } bo->unique_id = kgem_get_unique_id(kgem); bo->tiling = tiling.tiling_mode; bo->reusable = false; bo->prime = true; bo->domain = DOMAIN_NONE; /* is this a special bo (e.g. scanout or CPU coherent)? */ VG_CLEAR(caching); caching.handle = args.handle; caching.caching = kgem->has_llc; (void)drmIoctl(kgem->fd, LOCAL_IOCTL_I915_GEM_GET_CACHING, &caching); DBG(("%s: imported handle=%d has caching %d\n", __FUNCTION__, args.handle, caching.caching)); switch (caching.caching) { case 0: if (kgem->has_llc) { DBG(("%s: interpreting handle=%d as a foreign scanout\n", __FUNCTION__, args.handle)); bo->scanout = true; } break; case 1: if (!kgem->has_llc) { DBG(("%s: interpreting handle=%d as a foreign snooped buffer\n", __FUNCTION__, args.handle)); bo->snoop = true; if (bo->tiling) { DBG(("%s: illegal snooped tiled buffer\n", __FUNCTION__)); kgem_bo_free(kgem, bo); return NULL; } } break; case 2: DBG(("%s: interpreting handle=%d as a foreign scanout\n", __FUNCTION__, args.handle)); bo->scanout = true; break; } debug_alloc__bo(kgem, bo); return bo; #else return NULL; #endif } int kgem_bo_export_to_prime(struct kgem *kgem, struct kgem_bo *bo) { #if defined(DRM_IOCTL_PRIME_HANDLE_TO_FD) && defined(O_CLOEXEC) struct drm_prime_handle args; VG_CLEAR(args); args.handle = bo->handle; args.flags = O_CLOEXEC; if (do_ioctl(kgem->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args)) return -1; bo->reusable = false; return args.fd; #else return -1; #endif } struct kgem_bo *kgem_create_linear(struct kgem *kgem, int size, unsigned flags) { struct kgem_bo *bo; uint32_t handle; DBG(("%s(%d)\n", __FUNCTION__, size)); assert(size); if (flags & CREATE_GTT_MAP && kgem->has_llc) { flags &= ~CREATE_GTT_MAP; flags |= CREATE_CPU_MAP; } size = NUM_PAGES(size); if ((flags & CREATE_UNCACHED) == 0) { bo = search_linear_cache(kgem, size, CREATE_INACTIVE | flags); if (bo) { assert(bo->domain != DOMAIN_GPU); ASSERT_IDLE(kgem, bo->handle); bo->refcnt = 1; return bo; } if (flags & CREATE_CACHED) return NULL; } handle = gem_create(kgem->fd, size); if (handle == 0) return NULL; DBG(("%s: new handle=%d, num_pages=%d\n", __FUNCTION__, handle, size)); bo = __kgem_bo_alloc(handle, size); if (bo == NULL) { gem_close(kgem->fd, handle); return NULL; } debug_alloc__bo(kgem, bo); return bo; } int kgem_choose_tiling(struct kgem *kgem, int tiling, int width, int height, int bpp) { if (DBG_NO_TILING) return tiling < 0 ? tiling : I915_TILING_NONE; if (kgem->gen < 040) { if (tiling && width * bpp > 8192 * 8) { DBG(("%s: pitch too large for tliing [%d]\n", __FUNCTION__, width*bpp/8)); tiling = I915_TILING_NONE; goto done; } } else { if (width*bpp > (MAXSHORT-512) * 8) { if (tiling > 0) tiling = -tiling; else if (tiling == 0) tiling = -I915_TILING_X; DBG(("%s: large pitch [%d], forcing TILING [%d]\n", __FUNCTION__, width*bpp/8, tiling)); } else if (tiling && (width|height) > 8192) { DBG(("%s: large tiled buffer [%dx%d], forcing TILING_X\n", __FUNCTION__, width, height)); tiling = -I915_TILING_X; } /* fences limited to 128k (256k on ivb) */ assert(width * bpp <= 128 * 1024 * 8); } if (tiling < 0) return tiling; if (tiling == I915_TILING_Y && !kgem->can_render_y) tiling = I915_TILING_X; if (tiling && (height == 1 || width == 1)) { DBG(("%s: disabling tiling [%dx%d] for single row/col\n", __FUNCTION__,width, height)); tiling = I915_TILING_NONE; goto done; } if (tiling == I915_TILING_Y && height <= 16) { DBG(("%s: too short [%d] for TILING_Y\n", __FUNCTION__,height)); tiling = I915_TILING_X; } if (tiling && width * bpp > 8 * (4096 - 64)) { DBG(("%s: TLB miss between lines %dx%d (pitch=%d), forcing tiling %d\n", __FUNCTION__, width, height, width*bpp/8, tiling)); return -tiling; } if (tiling == I915_TILING_X && height < 4) { DBG(("%s: too short [%d] for TILING_X\n", __FUNCTION__, height)); tiling = I915_TILING_NONE; goto done; } if (tiling == I915_TILING_X && width * bpp <= 8*512) { DBG(("%s: too thin [width %d, %d bpp] for TILING_X\n", __FUNCTION__, width, bpp)); tiling = I915_TILING_NONE; goto done; } if (tiling == I915_TILING_Y && width * bpp < 8*128) { DBG(("%s: too thin [%d] for TILING_Y\n", __FUNCTION__, width)); tiling = I915_TILING_NONE; goto done; } if (tiling && ALIGN(height, 2) * ALIGN(width*bpp, 8*64) <= 4096 * 8) { DBG(("%s: too small [%d bytes] for TILING_%c\n", __FUNCTION__, ALIGN(height, 2) * ALIGN(width*bpp, 8*64) / 8, tiling == I915_TILING_X ? 'X' : 'Y')); tiling = I915_TILING_NONE; goto done; } if (tiling && width * bpp >= 8 * 4096 / 2) { DBG(("%s: TLB near-miss between lines %dx%d (pitch=%d), forcing tiling %d\n", __FUNCTION__, width, height, width*bpp/8, tiling)); return -tiling; } done: DBG(("%s: %dx%d -> %d\n", __FUNCTION__, width, height, tiling)); return tiling; } static int bits_per_pixel(int depth) { switch (depth) { case 8: return 8; case 15: case 16: return 16; case 24: case 30: case 32: return 32; default: return 0; } } unsigned kgem_can_create_2d(struct kgem *kgem, int width, int height, int depth) { uint32_t pitch, size; unsigned flags = 0; int tiling; int bpp; DBG(("%s: %dx%d @ %d\n", __FUNCTION__, width, height, depth)); bpp = bits_per_pixel(depth); if (bpp == 0) { DBG(("%s: unhandled depth %d\n", __FUNCTION__, depth)); return 0; } if (width > MAXSHORT || height > MAXSHORT) { DBG(("%s: unhandled size %dx%d\n", __FUNCTION__, width, height)); return 0; } size = kgem_surface_size(kgem, false, 0, width, height, bpp, I915_TILING_NONE, &pitch); DBG(("%s: untiled size=%d\n", __FUNCTION__, size)); if (size > 0) { if (size <= kgem->max_cpu_size) flags |= KGEM_CAN_CREATE_CPU; if (size > 4096 && size <= kgem->max_gpu_size) flags |= KGEM_CAN_CREATE_GPU; if (size <= PAGE_SIZE*kgem->aperture_mappable/4 || kgem->has_wc_mmap) flags |= KGEM_CAN_CREATE_GTT; if (size > kgem->large_object_size) flags |= KGEM_CAN_CREATE_LARGE; if (size > kgem->max_object_size) { DBG(("%s: too large (untiled) %d > %d\n", __FUNCTION__, size, kgem->max_object_size)); return 0; } } tiling = kgem_choose_tiling(kgem, I915_TILING_X, width, height, bpp); if (tiling != I915_TILING_NONE) { size = kgem_surface_size(kgem, false, 0, width, height, bpp, tiling, &pitch); DBG(("%s: tiled[%d] size=%d\n", __FUNCTION__, tiling, size)); if (size > 0 && size <= kgem->max_gpu_size) flags |= KGEM_CAN_CREATE_GPU | KGEM_CAN_CREATE_TILED; if (size > 0 && size <= PAGE_SIZE*kgem->aperture_mappable/4) flags |= KGEM_CAN_CREATE_GTT; if (size > PAGE_SIZE*kgem->aperture_mappable/4) flags &= ~KGEM_CAN_CREATE_GTT; if (size > kgem->large_object_size) flags |= KGEM_CAN_CREATE_LARGE; if (size > kgem->max_object_size) { DBG(("%s: too large (tiled) %d > %d\n", __FUNCTION__, size, kgem->max_object_size)); return 0; } if (kgem->gen < 040) { int fence_size = 1024 * 1024; while (fence_size < size) fence_size <<= 1; if (fence_size > kgem->max_gpu_size) flags &= ~KGEM_CAN_CREATE_GPU | KGEM_CAN_CREATE_TILED; if (fence_size > PAGE_SIZE*kgem->aperture_fenceable/4) flags &= ~KGEM_CAN_CREATE_GTT; } } return flags; } inline int kgem_bo_fenced_size(struct kgem *kgem, struct kgem_bo *bo) { unsigned int size; assert(bo->tiling); assert_tiling(kgem, bo); assert(kgem->gen < 040); if (kgem->gen < 030) size = 512 * 1024 / PAGE_SIZE; else size = 1024 * 1024 / PAGE_SIZE; while (size < num_pages(bo)) size <<= 1; return size; } static struct kgem_bo * __kgem_bo_create_as_display(struct kgem *kgem, int size, int tiling, int pitch) { struct local_i915_gem_create2 args; struct kgem_bo *bo; if (!kgem->has_create2) return NULL; memset(&args, 0, sizeof(args)); args.size = size * PAGE_SIZE; args.placement = LOCAL_I915_CREATE_PLACEMENT_STOLEN; args.caching = DISPLAY; args.tiling_mode = tiling; args.stride = pitch; if (do_ioctl(kgem->fd, LOCAL_IOCTL_I915_GEM_CREATE2, &args)) { args.placement = LOCAL_I915_CREATE_PLACEMENT_SYSTEM; if (do_ioctl(kgem->fd, LOCAL_IOCTL_I915_GEM_CREATE2, &args)) return NULL; } bo = __kgem_bo_alloc(args.handle, size); if (bo == NULL) { gem_close(kgem->fd, args.handle); return NULL; } bo->unique_id = kgem_get_unique_id(kgem); bo->tiling = tiling; bo->pitch = pitch; if (args.placement == LOCAL_I915_CREATE_PLACEMENT_STOLEN) { bo->purged = true; /* for asserts against CPU access */ } bo->reusable = false; /* so that unclaimed scanouts are freed */ bo->domain = DOMAIN_NONE; if (__kgem_busy(kgem, bo->handle)) { assert(bo->exec == NULL); list_add(&bo->request, &kgem->flushing); bo->rq = (void *)kgem; kgem->need_retire = true; } assert_tiling(kgem, bo); debug_alloc__bo(kgem, bo); return bo; } static void __kgem_bo_make_scanout(struct kgem *kgem, struct kgem_bo *bo, int width, int height) { ScrnInfoPtr scrn = container_of(kgem, struct sna, kgem)->scrn; struct drm_mode_fb_cmd arg; assert(bo->proxy == NULL); if (!scrn->vtSema) return; DBG(("%s: create fb %dx%d@%d/%d\n", __FUNCTION__, width, height, scrn->depth, scrn->bitsPerPixel)); VG_CLEAR(arg); arg.width = width; arg.height = height; arg.pitch = bo->pitch; arg.bpp = scrn->bitsPerPixel; arg.depth = scrn->depth; arg.handle = bo->handle; /* First move the scanout out of cached memory */ if (kgem->has_llc) { if (!gem_set_caching(kgem->fd, bo->handle, DISPLAY) && !gem_set_caching(kgem->fd, bo->handle, UNCACHED)) return; } bo->scanout = true; /* Then pre-emptively move the object into the mappable * portion to avoid rebinding later when busy. */ if (bo->map__gtt == NULL) bo->map__gtt = __kgem_bo_map__gtt(kgem, bo); if (bo->map__gtt) { if (sigtrap_get() == 0) { *(uint32_t *)bo->map__gtt = 0; sigtrap_put(); } bo->domain = DOMAIN_GTT; } if (do_ioctl(kgem->fd, DRM_IOCTL_MODE_ADDFB, &arg) == 0) { DBG(("%s: attached fb=%d to handle=%d\n", __FUNCTION__, arg.fb_id, arg.handle)); bo->delta = arg.fb_id; } } struct kgem_bo *kgem_create_2d(struct kgem *kgem, int width, int height, int bpp, int tiling, uint32_t flags) { struct list *cache; struct kgem_bo *bo; uint32_t pitch, tiled_height, size; uint32_t handle; int i, bucket, retry; bool exact = flags & (CREATE_EXACT | CREATE_SCANOUT); if (tiling < 0) exact = true, tiling = -tiling; DBG(("%s(%dx%d, bpp=%d, tiling=%d, exact=%d, inactive=%d, cpu-mapping=%d, gtt-mapping=%d, scanout?=%d, prime?=%d, temp?=%d)\n", __FUNCTION__, width, height, bpp, tiling, exact, !!(flags & CREATE_INACTIVE), !!(flags & CREATE_CPU_MAP), !!(flags & CREATE_GTT_MAP), !!(flags & CREATE_SCANOUT), !!(flags & CREATE_PRIME), !!(flags & CREATE_TEMPORARY))); size = kgem_surface_size(kgem, kgem->has_relaxed_fencing, flags, width, height, bpp, tiling, &pitch); if (size == 0) { DBG(("%s: invalid surface size (too large?)\n", __FUNCTION__)); return NULL; } size /= PAGE_SIZE; bucket = cache_bucket(size); if (flags & CREATE_SCANOUT) { struct kgem_bo *last = NULL; list_for_each_entry_reverse(bo, &kgem->scanout, list) { assert(bo->scanout); assert(!bo->flush); assert(!bo->refcnt); assert_tiling(kgem, bo); if (size > num_pages(bo) || num_pages(bo) > 2*size) continue; if (bo->tiling != tiling || bo->pitch != pitch) /* No tiling/pitch without recreating fb */ continue; if (bo->delta && !check_scanout_size(kgem, bo, width, height)) continue; if (flags & CREATE_INACTIVE && bo->rq) { last = bo; continue; } list_del(&bo->list); bo->unique_id = kgem_get_unique_id(kgem); DBG((" 1:from scanout: pitch=%d, tiling=%d, handle=%d, id=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id)); assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo)); assert_tiling(kgem, bo); bo->refcnt = 1; return bo; } if (last) { list_del(&last->list); last->unique_id = kgem_get_unique_id(kgem); DBG((" 1:from scanout: pitch=%d, tiling=%d, handle=%d, id=%d\n", last->pitch, last->tiling, last->handle, last->unique_id)); assert(last->pitch*kgem_aligned_height(kgem, height, last->tiling) <= kgem_bo_size(last)); assert_tiling(kgem, last); last->refcnt = 1; return last; } if (container_of(kgem, struct sna, kgem)->scrn->vtSema) { ScrnInfoPtr scrn = container_of(kgem, struct sna, kgem)->scrn; list_for_each_entry_reverse(bo, &kgem->scanout, list) { struct drm_mode_fb_cmd arg; assert(bo->scanout); assert(!bo->refcnt); if (size > num_pages(bo) || num_pages(bo) > 2*size) continue; if (flags & CREATE_INACTIVE && bo->rq) continue; list_del(&bo->list); if (bo->tiling != tiling || bo->pitch != pitch) { if (bo->delta) { kgem_bo_rmfb(kgem, bo); bo->delta = 0; } if (gem_set_tiling(kgem->fd, bo->handle, tiling, pitch)) { bo->tiling = tiling; bo->pitch = pitch; } else { kgem_bo_free(kgem, bo); break; } } VG_CLEAR(arg); arg.width = width; arg.height = height; arg.pitch = bo->pitch; arg.bpp = scrn->bitsPerPixel; arg.depth = scrn->depth; arg.handle = bo->handle; if (do_ioctl(kgem->fd, DRM_IOCTL_MODE_ADDFB, &arg)) { kgem_bo_free(kgem, bo); break; } bo->delta = arg.fb_id; bo->unique_id = kgem_get_unique_id(kgem); DBG((" 2:from scanout: pitch=%d, tiling=%d, handle=%d, id=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id)); assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo)); assert_tiling(kgem, bo); bo->refcnt = 1; return bo; } } bo = __kgem_bo_create_as_display(kgem, size, tiling, pitch); if (bo) return bo; flags |= CREATE_INACTIVE; } if (bucket >= NUM_CACHE_BUCKETS) { DBG(("%s: large bo num pages=%d, bucket=%d\n", __FUNCTION__, size, bucket)); if (flags & CREATE_INACTIVE) goto large_inactive; tiled_height = kgem_aligned_height(kgem, height, tiling); list_for_each_entry(bo, &kgem->large, list) { assert(!bo->purged); assert(!bo->scanout); assert(bo->refcnt == 0); assert(bo->reusable); assert_tiling(kgem, bo); if (kgem->gen < 040) { if (bo->pitch < pitch) { DBG(("tiled and pitch too small: tiling=%d, (want %d), pitch=%d, need %d\n", bo->tiling, tiling, bo->pitch, pitch)); continue; } if (bo->pitch * tiled_height > bytes(bo)) continue; } else { if (num_pages(bo) < size) continue; if (bo->pitch != pitch || bo->tiling != tiling) { if (!gem_set_tiling(kgem->fd, bo->handle, tiling, pitch)) continue; bo->pitch = pitch; bo->tiling = tiling; } } kgem_bo_remove_from_active(kgem, bo); bo->unique_id = kgem_get_unique_id(kgem); bo->delta = 0; DBG((" 1:from active: pitch=%d, tiling=%d, handle=%d, id=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id)); assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo)); assert_tiling(kgem, bo); bo->refcnt = 1; return bo; } large_inactive: __kgem_throttle_retire(kgem, flags); list_for_each_entry(bo, &kgem->large_inactive, list) { assert(bo->refcnt == 0); assert(bo->reusable); assert(!bo->scanout); assert_tiling(kgem, bo); if (size > num_pages(bo)) continue; if (bo->tiling != tiling || (tiling != I915_TILING_NONE && bo->pitch != pitch)) { if (!gem_set_tiling(kgem->fd, bo->handle, tiling, pitch)) continue; bo->tiling = tiling; bo->pitch = pitch; } if (bo->purged && !kgem_bo_clear_purgeable(kgem, bo)) { kgem_bo_free(kgem, bo); break; } list_del(&bo->list); assert(bo->domain != DOMAIN_GPU); bo->unique_id = kgem_get_unique_id(kgem); bo->pitch = pitch; bo->delta = 0; DBG((" 1:from large inactive: pitch=%d, tiling=%d, handle=%d, id=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id)); assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo)); assert_tiling(kgem, bo); bo->refcnt = 1; if (flags & CREATE_SCANOUT) __kgem_bo_make_scanout(kgem, bo, width, height); return bo; } goto create; } if (flags & (CREATE_CPU_MAP | CREATE_GTT_MAP)) { int for_cpu = !!(flags & CREATE_CPU_MAP); if (kgem->has_llc && tiling == I915_TILING_NONE) for_cpu = 1; /* We presume that we will need to upload to this bo, * and so would prefer to have an active VMA. */ cache = &kgem->vma[for_cpu].inactive[bucket]; do { list_for_each_entry(bo, cache, vma) { assert(bucket(bo) == bucket); assert(bo->refcnt == 0); assert(!bo->scanout); assert(for_cpu ? !!bo->map__cpu : (bo->map__gtt || bo->map__wc)); assert(bo->rq == NULL); assert(bo->exec == NULL); assert(list_is_empty(&bo->request)); assert(bo->flush == false); assert_tiling(kgem, bo); if (size > num_pages(bo)) { DBG(("inactive too small: %d < %d\n", num_pages(bo), size)); continue; } if (flags & UNCACHED && !kgem->has_llc && bo->domain != DOMAIN_CPU) continue; if (bo->tiling != tiling || (tiling != I915_TILING_NONE && bo->pitch != pitch)) { if (bo->map__gtt || !gem_set_tiling(kgem->fd, bo->handle, tiling, pitch)) { DBG(("inactive GTT vma with wrong tiling: %d < %d\n", bo->tiling, tiling)); continue; } bo->tiling = tiling; bo->pitch = pitch; } if (bo->purged && !kgem_bo_clear_purgeable(kgem, bo)) { kgem_bo_free(kgem, bo); break; } assert(bo->tiling == tiling); bo->pitch = pitch; bo->delta = 0; bo->unique_id = kgem_get_unique_id(kgem); kgem_bo_remove_from_inactive(kgem, bo); assert(list_is_empty(&bo->list)); assert(list_is_empty(&bo->vma)); DBG((" from inactive vma: pitch=%d, tiling=%d: handle=%d, id=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id)); assert(bo->reusable); assert(bo->domain != DOMAIN_GPU); ASSERT_IDLE(kgem, bo->handle); assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo)); assert_tiling(kgem, bo); bo->refcnt = 1; return bo; } } while (!list_is_empty(cache) && __kgem_throttle_retire(kgem, flags)); if (flags & CREATE_CPU_MAP && !kgem->has_llc) { if (list_is_empty(&kgem->active[bucket][tiling]) && list_is_empty(&kgem->inactive[bucket])) flags &= ~CREATE_CACHED; goto create; } } if (flags & CREATE_INACTIVE) goto skip_active_search; /* Best active match */ retry = NUM_CACHE_BUCKETS - bucket; if (retry > 3 && (flags & CREATE_TEMPORARY) == 0) retry = 3; search_active: assert(bucket < NUM_CACHE_BUCKETS); cache = &kgem->active[bucket][tiling]; if (tiling) { tiled_height = kgem_aligned_height(kgem, height, tiling); list_for_each_entry(bo, cache, list) { assert(!bo->purged); assert(bo->refcnt == 0); assert(bucket(bo) == bucket); assert(bo->reusable); assert(bo->tiling == tiling); assert(bo->flush == false); assert(!bo->scanout); assert_tiling(kgem, bo); if (kgem->gen < 040) { if (bo->pitch < pitch) { DBG(("tiled and pitch too small: tiling=%d, (want %d), pitch=%d, need %d\n", bo->tiling, tiling, bo->pitch, pitch)); continue; } if (bo->pitch * tiled_height > bytes(bo)) continue; } else { if (num_pages(bo) < size) continue; if (bo->pitch != pitch) { if (!gem_set_tiling(kgem->fd, bo->handle, tiling, pitch)) continue; bo->pitch = pitch; } } kgem_bo_remove_from_active(kgem, bo); bo->unique_id = kgem_get_unique_id(kgem); bo->delta = 0; DBG((" 1:from active: pitch=%d, tiling=%d, handle=%d, id=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id)); assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo)); assert_tiling(kgem, bo); bo->refcnt = 1; return bo; } } else { list_for_each_entry(bo, cache, list) { assert(bucket(bo) == bucket); assert(!bo->purged); assert(bo->refcnt == 0); assert(bo->reusable); assert(!bo->scanout); assert(bo->tiling == tiling); assert(bo->flush == false); assert_tiling(kgem, bo); if (num_pages(bo) < size) continue; kgem_bo_remove_from_active(kgem, bo); bo->pitch = pitch; bo->unique_id = kgem_get_unique_id(kgem); bo->delta = 0; DBG((" 1:from active: pitch=%d, tiling=%d, handle=%d, id=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id)); assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo)); assert_tiling(kgem, bo); bo->refcnt = 1; return bo; } } if (kgem->gen >= 040) { for (i = I915_TILING_Y; i >= I915_TILING_NONE; i--) { cache = &kgem->active[bucket][i]; list_for_each_entry(bo, cache, list) { assert(!bo->purged); assert(bo->refcnt == 0); assert(bo->reusable); assert(!bo->scanout); assert(bo->flush == false); assert_tiling(kgem, bo); if (num_pages(bo) < size) continue; if (bo->tiling != tiling || (tiling != I915_TILING_NONE && bo->pitch != pitch)) { if (!gem_set_tiling(kgem->fd, bo->handle, tiling, pitch)) continue; } kgem_bo_remove_from_active(kgem, bo); bo->unique_id = kgem_get_unique_id(kgem); bo->pitch = pitch; bo->tiling = tiling; bo->delta = 0; DBG((" 1:from active: pitch=%d, tiling=%d, handle=%d, id=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id)); assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo)); assert_tiling(kgem, bo); bo->refcnt = 1; return bo; } } } else if (!exact) { /* allow an active near-miss? */ for (i = tiling; i >= I915_TILING_NONE; i--) { tiled_height = kgem_surface_size(kgem, kgem->has_relaxed_fencing, flags, width, height, bpp, tiling, &pitch); cache = active(kgem, tiled_height / PAGE_SIZE, i); tiled_height = kgem_aligned_height(kgem, height, i); list_for_each_entry(bo, cache, list) { assert(!bo->purged); assert(bo->refcnt == 0); assert(bo->reusable); assert(!bo->scanout); assert(bo->flush == false); assert_tiling(kgem, bo); if (bo->tiling) { if (bo->pitch < pitch) { DBG(("tiled and pitch too small: tiling=%d, (want %d), pitch=%d, need %d\n", bo->tiling, tiling, bo->pitch, pitch)); continue; } } else bo->pitch = pitch; if (bo->pitch * tiled_height > bytes(bo)) continue; kgem_bo_remove_from_active(kgem, bo); bo->unique_id = kgem_get_unique_id(kgem); bo->delta = 0; DBG((" 1:from active: pitch=%d, tiling=%d, handle=%d, id=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id)); assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo)); assert_tiling(kgem, bo); bo->refcnt = 1; return bo; } } } if (--retry) { bucket++; goto search_active; } skip_active_search: bucket = cache_bucket(size); retry = NUM_CACHE_BUCKETS - bucket; if (retry > 3) retry = 3; search_inactive: /* Now just look for a close match and prefer any currently active */ assert(bucket < NUM_CACHE_BUCKETS); cache = &kgem->inactive[bucket]; list_for_each_entry(bo, cache, list) { assert(bucket(bo) == bucket); assert(bo->reusable); assert(!bo->scanout); assert(bo->flush == false); assert_tiling(kgem, bo); if (size > num_pages(bo)) { DBG(("inactive too small: %d < %d\n", num_pages(bo), size)); continue; } if (bo->tiling != tiling || (tiling != I915_TILING_NONE && bo->pitch != pitch)) { if (!gem_set_tiling(kgem->fd, bo->handle, tiling, pitch)) continue; } if (bo->purged && !kgem_bo_clear_purgeable(kgem, bo)) { kgem_bo_free(kgem, bo); break; } kgem_bo_remove_from_inactive(kgem, bo); assert(list_is_empty(&bo->list)); assert(list_is_empty(&bo->vma)); bo->pitch = pitch; bo->tiling = tiling; bo->delta = 0; bo->unique_id = kgem_get_unique_id(kgem); assert(bo->pitch); DBG((" from inactive: pitch=%d, tiling=%d: handle=%d, id=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id)); assert(bo->refcnt == 0); assert(bo->reusable); assert((flags & CREATE_INACTIVE) == 0 || bo->domain != DOMAIN_GPU); ASSERT_MAYBE_IDLE(kgem, bo->handle, flags & CREATE_INACTIVE); assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo)); assert_tiling(kgem, bo); bo->refcnt = 1; if (flags & CREATE_SCANOUT) __kgem_bo_make_scanout(kgem, bo, width, height); return bo; } if ((flags & CREATE_NO_RETIRE) == 0) { list_for_each_entry_reverse(bo, &kgem->active[bucket][tiling], list) { if (bo->exec) break; if (size > num_pages(bo)) continue; if (__kgem_busy(kgem, bo->handle)) { if (flags & CREATE_NO_THROTTLE) goto no_retire; do { if (!kgem->need_throttle) { DBG(("%s: not throttling for active handle=%d\n", __FUNCTION__, bo->handle)); goto no_retire; } __kgem_throttle(kgem, false); } while (__kgem_busy(kgem, bo->handle)); } DBG(("%s: flushed active handle=%d\n", __FUNCTION__, bo->handle)); kgem_bo_remove_from_active(kgem, bo); __kgem_bo_clear_busy(bo); if (tiling != I915_TILING_NONE && bo->pitch != pitch) { if (!gem_set_tiling(kgem->fd, bo->handle, tiling, pitch)) { kgem_bo_free(kgem, bo); goto no_retire; } } bo->pitch = pitch; bo->unique_id = kgem_get_unique_id(kgem); bo->delta = 0; DBG((" 2:from active: pitch=%d, tiling=%d, handle=%d, id=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id)); assert(bo->pitch*kgem_aligned_height(kgem, height, bo->tiling) <= kgem_bo_size(bo)); assert_tiling(kgem, bo); bo->refcnt = 1; if (flags & CREATE_SCANOUT) __kgem_bo_make_scanout(kgem, bo, width, height); return bo; } no_retire: flags |= CREATE_NO_RETIRE; } if (--retry) { bucket++; goto search_inactive; } create: if (flags & CREATE_CACHED) { DBG(("%s: no cached bo found, requested not to create a new bo\n", __FUNCTION__)); return NULL; } if (bucket >= NUM_CACHE_BUCKETS) size = ALIGN(size, 1024); handle = gem_create(kgem->fd, size); if (handle == 0) { DBG(("%s: kernel allocation (gem_create) failure\n", __FUNCTION__)); return NULL; } bo = __kgem_bo_alloc(handle, size); if (!bo) { DBG(("%s: malloc failed\n", __FUNCTION__)); gem_close(kgem->fd, handle); return NULL; } bo->unique_id = kgem_get_unique_id(kgem); if (tiling == I915_TILING_NONE || gem_set_tiling(kgem->fd, handle, tiling, pitch)) { bo->tiling = tiling; bo->pitch = pitch; if (flags & CREATE_SCANOUT) __kgem_bo_make_scanout(kgem, bo, width, height); } else { if (flags & CREATE_EXACT) { DBG(("%s: failed to set exact tiling (gem_set_tiling)\n", __FUNCTION__)); gem_close(kgem->fd, handle); free(bo); return NULL; } } assert(bytes(bo) >= bo->pitch * kgem_aligned_height(kgem, height, bo->tiling)); assert_tiling(kgem, bo); debug_alloc__bo(kgem, bo); DBG((" new pitch=%d, tiling=%d, handle=%d, id=%d, num_pages=%d [%d], bucket=%d\n", bo->pitch, bo->tiling, bo->handle, bo->unique_id, size, num_pages(bo), bucket(bo))); return bo; } struct kgem_bo *kgem_create_cpu_2d(struct kgem *kgem, int width, int height, int bpp, uint32_t flags) { struct kgem_bo *bo; int stride, size; if (DBG_NO_CPU) return NULL; DBG(("%s(%dx%d, bpp=%d)\n", __FUNCTION__, width, height, bpp)); if (kgem->has_llc) { bo = kgem_create_2d(kgem, width, height, bpp, I915_TILING_NONE, flags); if (bo == NULL) return bo; assert(bo->tiling == I915_TILING_NONE); assert_tiling(kgem, bo); if (kgem_bo_map__cpu(kgem, bo) == NULL) { kgem_bo_destroy(kgem, bo); return NULL; } return bo; } assert(width > 0 && height > 0); stride = ALIGN(width, 2) * bpp >> 3; stride = ALIGN(stride, 4); size = stride * ALIGN(height, 2); assert(size >= PAGE_SIZE); DBG(("%s: %dx%d, %d bpp, stride=%d\n", __FUNCTION__, width, height, bpp, stride)); bo = search_snoop_cache(kgem, NUM_PAGES(size), 0); if (bo) { assert(bo->tiling == I915_TILING_NONE); assert_tiling(kgem, bo); assert(bo->snoop); bo->refcnt = 1; bo->pitch = stride; bo->unique_id = kgem_get_unique_id(kgem); return bo; } if (kgem->has_caching) { bo = kgem_create_linear(kgem, size, flags); if (bo == NULL) return NULL; assert(bo->tiling == I915_TILING_NONE); assert_tiling(kgem, bo); assert(!__kgem_busy(kgem, bo->handle)); if (!gem_set_caching(kgem->fd, bo->handle, SNOOPED)) { kgem_bo_destroy(kgem, bo); return NULL; } bo->snoop = true; if (kgem_bo_map__cpu(kgem, bo) == NULL) { kgem_bo_destroy(kgem, bo); return NULL; } bo->pitch = stride; bo->unique_id = kgem_get_unique_id(kgem); return bo; } if (kgem->has_userptr) { void *ptr; /* XXX */ //if (posix_memalign(&ptr, 64, ALIGN(size, 64))) if (posix_memalign(&ptr, PAGE_SIZE, ALIGN(size, PAGE_SIZE))) return NULL; bo = kgem_create_map(kgem, ptr, size, false); if (bo == NULL) { free(ptr); return NULL; } bo->pitch = stride; bo->unique_id = kgem_get_unique_id(kgem); return bo; } return NULL; } void _kgem_bo_destroy(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: handle=%d, proxy? %d\n", __FUNCTION__, bo->handle, bo->proxy != NULL)); if (bo->proxy) { assert(!bo->reusable); kgem_bo_binding_free(kgem, bo); assert(list_is_empty(&bo->list)); _list_del(&bo->vma); _list_del(&bo->request); if (bo->io && bo->domain == DOMAIN_CPU) _kgem_bo_delete_buffer(kgem, bo); kgem_bo_unref(kgem, bo->proxy); if (DBG_NO_MALLOC_CACHE) { free(bo); } else { *(struct kgem_bo **)bo = __kgem_freed_bo; __kgem_freed_bo = bo; } } else __kgem_bo_destroy(kgem, bo); } static void __kgem_flush(struct kgem *kgem, struct kgem_bo *bo) { assert(bo->rq); assert(bo->exec == NULL); assert(bo->needs_flush); /* The kernel will emit a flush *and* update its own flushing lists. */ if (!__kgem_busy(kgem, bo->handle)) __kgem_bo_clear_busy(bo); DBG(("%s: handle=%d, busy?=%d\n", __FUNCTION__, bo->handle, bo->rq != NULL)); } void kgem_scanout_flush(struct kgem *kgem, struct kgem_bo *bo) { if (!bo->needs_flush) return; kgem_bo_submit(kgem, bo); /* If the kernel fails to emit the flush, then it will be forced when * we assume direct access. And as the usual failure is EIO, we do * not actually care. */ assert(bo->exec == NULL); if (bo->rq) __kgem_flush(kgem, bo); /* Whatever actually happens, we can regard the GTT write domain * as being flushed. */ bo->gtt_dirty = false; bo->needs_flush = false; bo->domain = DOMAIN_NONE; } inline static bool nearly_idle(struct kgem *kgem) { int ring = kgem->ring == KGEM_BLT; if (list_is_singular(&kgem->requests[ring])) return true; return __kgem_ring_is_idle(kgem, ring); } inline static bool needs_semaphore(struct kgem *kgem, struct kgem_bo *bo) { if (kgem->needs_semaphore) return false; if (bo->rq == NULL || RQ_RING(bo->rq) == kgem->ring) return false; kgem->needs_semaphore = true; return true; } inline static bool needs_reservation(struct kgem *kgem, struct kgem_bo *bo) { if (kgem->needs_reservation) return false; if (bo->presumed_offset) return false; kgem->needs_reservation = true; return nearly_idle(kgem); } inline static bool needs_batch_flush(struct kgem *kgem, struct kgem_bo *bo) { bool flush = false; if (needs_semaphore(kgem, bo)) { DBG(("%s: flushing before handle=%d for required semaphore\n", __FUNCTION__, bo->handle)); flush = true; } if (needs_reservation(kgem, bo)) { DBG(("%s: flushing before handle=%d for new reservation\n", __FUNCTION__, bo->handle)); flush = true; } return kgem->nreloc ? flush : false; } static bool aperture_check(struct kgem *kgem, unsigned num_pages) { struct drm_i915_gem_get_aperture aperture; int reserve; if (kgem->aperture) return false; /* Leave some space in case of alignment issues */ reserve = kgem->aperture_mappable / 2; if (kgem->gen < 033 && reserve < kgem->aperture_max_fence) reserve = kgem->aperture_max_fence; if (!kgem->has_llc) reserve += kgem->nexec * PAGE_SIZE * 2; DBG(("%s: num_pages=%d, holding %d pages in reserve, total aperture %d\n", __FUNCTION__, num_pages, reserve, kgem->aperture_total)); num_pages += reserve; VG_CLEAR(aperture); aperture.aper_available_size = kgem->aperture_total; aperture.aper_available_size *= PAGE_SIZE; (void)do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture); DBG(("%s: aperture required %ld bytes, available %ld bytes\n", __FUNCTION__, (long)num_pages * PAGE_SIZE, (long)aperture.aper_available_size)); return num_pages <= aperture.aper_available_size / PAGE_SIZE; } static inline bool kgem_flush(struct kgem *kgem, bool flush) { if (unlikely(kgem->wedged)) return false; if (kgem->nreloc == 0) return true; if (container_of(kgem, struct sna, kgem)->flags & SNA_POWERSAVE) return true; if (kgem->flush == flush && kgem->aperture < kgem->aperture_low) return true; DBG(("%s: opportunistic flushing? flush=%d,%d, aperture=%d/%d, idle?=%d\n", __FUNCTION__, kgem->flush, flush, kgem->aperture, kgem->aperture_low, kgem_ring_is_idle(kgem, kgem->ring))); return !kgem_ring_is_idle(kgem, kgem->ring); } bool kgem_check_bo(struct kgem *kgem, ...) { va_list ap; struct kgem_bo *bo; int num_exec = 0; int num_pages = 0; bool flush = false; bool busy = true; va_start(ap, kgem); while ((bo = va_arg(ap, struct kgem_bo *))) { while (bo->proxy) bo = bo->proxy; if (bo->exec) continue; if (needs_batch_flush(kgem, bo)) { va_end(ap); return false; } num_pages += num_pages(bo); num_exec++; flush |= bo->flush; busy &= bo->rq != NULL; } va_end(ap); DBG(("%s: num_pages=+%d, num_exec=+%d\n", __FUNCTION__, num_pages, num_exec)); if (!num_pages) return true; if (kgem->nexec + num_exec >= KGEM_EXEC_SIZE(kgem)) { DBG(("%s: out of exec slots (%d + %d / %d)\n", __FUNCTION__, kgem->nexec, num_exec, KGEM_EXEC_SIZE(kgem))); return false; } if (num_pages + kgem->aperture > kgem->aperture_high) { DBG(("%s: final aperture usage (%d + %d) is greater than high water mark (%d)\n", __FUNCTION__, kgem->aperture, num_pages, kgem->aperture_high)); return aperture_check(kgem, num_pages); } if (busy) return true; return kgem_flush(kgem, flush); } bool kgem_check_bo_fenced(struct kgem *kgem, struct kgem_bo *bo) { assert(bo->refcnt); while (bo->proxy) bo = bo->proxy; assert(bo->refcnt); if (bo->exec) { if (kgem->gen < 040 && bo->tiling != I915_TILING_NONE && (bo->exec->flags & EXEC_OBJECT_NEEDS_FENCE) == 0) { uint32_t size; assert(bo->tiling == I915_TILING_X); if (kgem->nfence >= kgem->fence_max) return false; if (kgem->aperture_fenced) { size = 3*kgem->aperture_fenced; if (kgem->aperture_total == kgem->aperture_mappable) size += kgem->aperture; if (size > kgem->aperture_fenceable && kgem_ring_is_idle(kgem, kgem->ring)) { DBG(("%s: opportunistic fence flush\n", __FUNCTION__)); return false; } } size = kgem_bo_fenced_size(kgem, bo); if (size > kgem->aperture_max_fence) kgem->aperture_max_fence = size; size += kgem->aperture_fenced; if (kgem->gen < 033 && size < 2 * kgem->aperture_max_fence) size = 2 * kgem->aperture_max_fence; if (kgem->aperture_total == kgem->aperture_mappable) size += kgem->aperture; if (size > kgem->aperture_fenceable) { DBG(("%s: estimated fence space required %d (fenced=%d, max_fence=%d, aperture=%d) exceeds fenceable aperture %d\n", __FUNCTION__, size, kgem->aperture_fenced, kgem->aperture_max_fence, kgem->aperture, kgem->aperture_fenceable)); return false; } } return true; } if (kgem->nexec >= KGEM_EXEC_SIZE(kgem) - 1) return false; if (needs_batch_flush(kgem, bo)) return false; assert_tiling(kgem, bo); if (kgem->gen < 040 && bo->tiling != I915_TILING_NONE) { uint32_t size; assert(bo->tiling == I915_TILING_X); if (kgem->nfence >= kgem->fence_max) return false; if (kgem->aperture_fenced) { size = 3*kgem->aperture_fenced; if (kgem->aperture_total == kgem->aperture_mappable) size += kgem->aperture; if (size > kgem->aperture_fenceable && kgem_ring_is_idle(kgem, kgem->ring)) { DBG(("%s: opportunistic fence flush\n", __FUNCTION__)); return false; } } size = kgem_bo_fenced_size(kgem, bo); if (size > kgem->aperture_max_fence) kgem->aperture_max_fence = size; size += kgem->aperture_fenced; if (kgem->gen < 033 && size < 2 * kgem->aperture_max_fence) size = 2 * kgem->aperture_max_fence; if (kgem->aperture_total == kgem->aperture_mappable) size += kgem->aperture; if (size > kgem->aperture_fenceable) { DBG(("%s: estimated fence space required %d (fenced=%d, max_fence=%d, aperture=%d) exceeds fenceable aperture %d\n", __FUNCTION__, size, kgem->aperture_fenced, kgem->aperture_max_fence, kgem->aperture, kgem->aperture_fenceable)); return false; } } if (kgem->aperture + kgem->aperture_fenced + num_pages(bo) > kgem->aperture_high) { DBG(("%s: final aperture usage (%d + %d) is greater than high water mark (%d)\n", __FUNCTION__, kgem->aperture, num_pages(bo), kgem->aperture_high)); return aperture_check(kgem, num_pages(bo)); } if (bo->rq) return true; return kgem_flush(kgem, bo->flush); } bool kgem_check_many_bo_fenced(struct kgem *kgem, ...) { va_list ap; struct kgem_bo *bo; int num_fence = 0; int num_exec = 0; int num_pages = 0; int fenced_size = 0; bool flush = false; bool busy = true; va_start(ap, kgem); while ((bo = va_arg(ap, struct kgem_bo *))) { assert(bo->refcnt); while (bo->proxy) bo = bo->proxy; assert(bo->refcnt); if (bo->exec) { if (kgem->gen >= 040 || bo->tiling == I915_TILING_NONE) continue; if ((bo->exec->flags & EXEC_OBJECT_NEEDS_FENCE) == 0) { fenced_size += kgem_bo_fenced_size(kgem, bo); num_fence++; } continue; } if (needs_batch_flush(kgem, bo)) { va_end(ap); return false; } assert_tiling(kgem, bo); num_pages += num_pages(bo); num_exec++; if (kgem->gen < 040 && bo->tiling) { uint32_t size = kgem_bo_fenced_size(kgem, bo); if (size > kgem->aperture_max_fence) kgem->aperture_max_fence = size; fenced_size += size; num_fence++; } flush |= bo->flush; busy &= bo->rq != NULL; } va_end(ap); if (num_fence) { uint32_t size; if (kgem->nfence + num_fence > kgem->fence_max) return false; if (kgem->aperture_fenced) { size = 3*kgem->aperture_fenced; if (kgem->aperture_total == kgem->aperture_mappable) size += kgem->aperture; if (size > kgem->aperture_fenceable && kgem_ring_is_idle(kgem, kgem->ring)) { DBG(("%s: opportunistic fence flush\n", __FUNCTION__)); return false; } } size = kgem->aperture_fenced; size += fenced_size; if (kgem->gen < 033 && size < 2 * kgem->aperture_max_fence) size = 2 * kgem->aperture_max_fence; if (kgem->aperture_total == kgem->aperture_mappable) size += kgem->aperture; if (size > kgem->aperture_fenceable) { DBG(("%s: estimated fence space required %d (fenced=%d, max_fence=%d, aperture=%d) exceeds fenceable aperture %d\n", __FUNCTION__, size, kgem->aperture_fenced, kgem->aperture_max_fence, kgem->aperture, kgem->aperture_fenceable)); return false; } } if (num_pages == 0) return true; if (kgem->nexec + num_exec >= KGEM_EXEC_SIZE(kgem)) return false; if (num_pages + kgem->aperture > kgem->aperture_high - kgem->aperture_fenced) { DBG(("%s: final aperture usage (%d + %d + %d) is greater than high water mark (%d)\n", __FUNCTION__, kgem->aperture, kgem->aperture_fenced, num_pages, kgem->aperture_high)); return aperture_check(kgem, num_pages); } if (busy) return true; return kgem_flush(kgem, flush); } uint32_t kgem_add_reloc(struct kgem *kgem, uint32_t pos, struct kgem_bo *bo, uint32_t read_write_domain, uint32_t delta) { int index; DBG(("%s: handle=%d, pos=%d, delta=%d, domains=%08x\n", __FUNCTION__, bo ? bo->handle : 0, pos, delta, read_write_domain)); assert(kgem->gen < 0100); assert((read_write_domain & 0x7fff) == 0 || bo != NULL); index = kgem->nreloc++; assert(index < ARRAY_SIZE(kgem->reloc)); kgem->reloc[index].offset = pos * sizeof(kgem->batch[0]); if (bo) { assert(kgem->mode != KGEM_NONE); assert(bo->refcnt); while (bo->proxy) { DBG(("%s: adding proxy [delta=%d] for handle=%d\n", __FUNCTION__, bo->delta, bo->handle)); delta += bo->delta; assert(bo->handle == bo->proxy->handle); /* need to release the cache upon batch submit */ if (bo->exec == NULL) { list_move_tail(&bo->request, &kgem->next_request->buffers); bo->rq = MAKE_REQUEST(kgem->next_request, kgem->ring); bo->exec = &_kgem_dummy_exec; bo->domain = DOMAIN_GPU; } if (read_write_domain & 0x7fff && !bo->gpu_dirty) __kgem_bo_mark_dirty(bo); bo = bo->proxy; assert(bo->refcnt); } assert(bo->refcnt); if (bo->exec == NULL) kgem_add_bo(kgem, bo); assert(bo->rq == MAKE_REQUEST(kgem->next_request, kgem->ring)); assert(RQ_RING(bo->rq) == kgem->ring); if (kgem->gen < 040 && read_write_domain & KGEM_RELOC_FENCED) { if (bo->tiling && (bo->exec->flags & EXEC_OBJECT_NEEDS_FENCE) == 0) { assert(bo->tiling == I915_TILING_X); assert(kgem->nfence < kgem->fence_max); kgem->aperture_fenced += kgem_bo_fenced_size(kgem, bo); kgem->nfence++; } bo->exec->flags |= EXEC_OBJECT_NEEDS_FENCE; } kgem->reloc[index].delta = delta; kgem->reloc[index].target_handle = bo->target_handle; kgem->reloc[index].presumed_offset = bo->presumed_offset; if (read_write_domain & 0x7fff && !bo->gpu_dirty) { assert(!bo->snoop || kgem->can_blt_cpu); __kgem_bo_mark_dirty(bo); } delta += bo->presumed_offset; } else { kgem->reloc[index].delta = delta; kgem->reloc[index].target_handle = ~0U; kgem->reloc[index].presumed_offset = 0; if (kgem->nreloc__self < 256) kgem->reloc__self[kgem->nreloc__self++] = index; } kgem->reloc[index].read_domains = read_write_domain >> 16; kgem->reloc[index].write_domain = read_write_domain & 0x7fff; return delta; } uint64_t kgem_add_reloc64(struct kgem *kgem, uint32_t pos, struct kgem_bo *bo, uint32_t read_write_domain, uint64_t delta) { int index; DBG(("%s: handle=%d, pos=%d, delta=%ld, domains=%08x\n", __FUNCTION__, bo ? bo->handle : 0, pos, (long)delta, read_write_domain)); assert(kgem->gen >= 0100); assert((read_write_domain & 0x7fff) == 0 || bo != NULL); index = kgem->nreloc++; assert(index < ARRAY_SIZE(kgem->reloc)); kgem->reloc[index].offset = pos * sizeof(kgem->batch[0]); if (bo) { assert(kgem->mode != KGEM_NONE); assert(bo->refcnt); while (bo->proxy) { DBG(("%s: adding proxy [delta=%ld] for handle=%d\n", __FUNCTION__, (long)bo->delta, bo->handle)); delta += bo->delta; assert(bo->handle == bo->proxy->handle); /* need to release the cache upon batch submit */ if (bo->exec == NULL) { list_move_tail(&bo->request, &kgem->next_request->buffers); bo->rq = MAKE_REQUEST(kgem->next_request, kgem->ring); bo->exec = &_kgem_dummy_exec; bo->domain = DOMAIN_GPU; } if (read_write_domain & 0x7fff && !bo->gpu_dirty) __kgem_bo_mark_dirty(bo); bo = bo->proxy; assert(bo->refcnt); } assert(bo->refcnt); if (bo->exec == NULL) kgem_add_bo(kgem, bo); assert(bo->rq == MAKE_REQUEST(kgem->next_request, kgem->ring)); assert(RQ_RING(bo->rq) == kgem->ring); DBG(("%s[%d] = (delta=%d, target handle=%d, presumed=%llx)\n", __FUNCTION__, index, delta, bo->target_handle, (long long)bo->presumed_offset)); kgem->reloc[index].delta = delta; kgem->reloc[index].target_handle = bo->target_handle; kgem->reloc[index].presumed_offset = bo->presumed_offset; if (read_write_domain & 0x7fff && !bo->gpu_dirty) { assert(!bo->snoop || kgem->can_blt_cpu); __kgem_bo_mark_dirty(bo); } delta += bo->presumed_offset; } else { DBG(("%s[%d] = (delta=%d, target handle=batch)\n", __FUNCTION__, index, delta)); kgem->reloc[index].delta = delta; kgem->reloc[index].target_handle = ~0U; kgem->reloc[index].presumed_offset = 0; if (kgem->nreloc__self < 256) kgem->reloc__self[kgem->nreloc__self++] = index; } kgem->reloc[index].read_domains = read_write_domain >> 16; kgem->reloc[index].write_domain = read_write_domain & 0x7fff; return delta; } static void kgem_trim_vma_cache(struct kgem *kgem, int type, int bucket) { int i, j; DBG(("%s: type=%d, count=%d (bucket: %d)\n", __FUNCTION__, type, kgem->vma[type].count, bucket)); if (kgem->vma[type].count <= 0) return; if (kgem->need_purge) kgem_purge_cache(kgem); /* vma are limited on a per-process basis to around 64k. * This includes all malloc arenas as well as other file * mappings. In order to be fair and not hog the cache, * and more importantly not to exhaust that limit and to * start failing mappings, we keep our own number of open * vma to within a conservative value. */ i = 0; while (kgem->vma[type].count > 0) { struct kgem_bo *bo = NULL; for (j = 0; bo == NULL && j < ARRAY_SIZE(kgem->vma[type].inactive); j++) { struct list *head = &kgem->vma[type].inactive[i++%ARRAY_SIZE(kgem->vma[type].inactive)]; if (!list_is_empty(head)) bo = list_last_entry(head, struct kgem_bo, vma); } if (bo == NULL) break; DBG(("%s: discarding inactive %s vma cache for %d\n", __FUNCTION__, type ? "CPU" : "GTT", bo->handle)); assert(bo->rq == NULL); if (type) { VG(VALGRIND_MAKE_MEM_NOACCESS(MAP(bo->map__cpu), bytes(bo))); munmap(MAP(bo->map__cpu), bytes(bo)); bo->map__cpu = NULL; } else { if (bo->map__wc) { VG(VALGRIND_MAKE_MEM_NOACCESS(bo->map__wc, bytes(bo))); munmap(bo->map__wc, bytes(bo)); bo->map__wc = NULL; } if (bo->map__gtt) { munmap(bo->map__gtt, bytes(bo)); bo->map__gtt = NULL; } } list_del(&bo->vma); kgem->vma[type].count--; if (!bo->purged && !kgem_bo_set_purgeable(kgem, bo)) { DBG(("%s: freeing unpurgeable old mapping\n", __FUNCTION__)); kgem_bo_free(kgem, bo); } } } static void *__kgem_bo_map__gtt_or_wc(struct kgem *kgem, struct kgem_bo *bo) { void *ptr; DBG(("%s: handle=%d\n", __FUNCTION__, bo->handle)); assert(bo->proxy == NULL); assert(!bo->snoop); kgem_trim_vma_cache(kgem, MAP_GTT, bucket(bo)); if (bo->tiling || !kgem->has_wc_mmap) { assert(num_pages(bo) <= kgem->aperture_mappable / 2); assert(kgem->gen != 021 || bo->tiling != I915_TILING_Y); ptr = bo->map__gtt; if (ptr == NULL) ptr = __kgem_bo_map__gtt(kgem, bo); } else { ptr = bo->map__wc; if (ptr == NULL) ptr = __kgem_bo_map__wc(kgem, bo); } return ptr; } void *kgem_bo_map__async(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: handle=%d, offset=%ld, tiling=%d, map=%p:%p, domain=%d\n", __FUNCTION__, bo->handle, (long)bo->presumed_offset, bo->tiling, bo->map__gtt, bo->map__cpu, bo->domain)); assert(bo->proxy == NULL); assert(list_is_empty(&bo->list)); assert_tiling(kgem, bo); assert(!bo->purged || bo->reusable); if (bo->tiling == I915_TILING_NONE && !bo->scanout && kgem->has_llc) { DBG(("%s: converting request for GTT map into CPU map\n", __FUNCTION__)); return kgem_bo_map__cpu(kgem, bo); } return __kgem_bo_map__gtt_or_wc(kgem, bo); } void *kgem_bo_map(struct kgem *kgem, struct kgem_bo *bo) { void *ptr; DBG(("%s: handle=%d, offset=%ld, tiling=%d, map=%p:%p, domain=%d\n", __FUNCTION__, bo->handle, (long)bo->presumed_offset, bo->tiling, bo->map__gtt, bo->map__cpu, bo->domain)); assert(bo->proxy == NULL); assert(list_is_empty(&bo->list)); assert(bo->exec == NULL); assert_tiling(kgem, bo); assert(!bo->purged || bo->reusable); if (bo->tiling == I915_TILING_NONE && !bo->scanout && (kgem->has_llc || bo->domain == DOMAIN_CPU)) { DBG(("%s: converting request for GTT map into CPU map\n", __FUNCTION__)); ptr = kgem_bo_map__cpu(kgem, bo); if (ptr) kgem_bo_sync__cpu(kgem, bo); return ptr; } ptr = __kgem_bo_map__gtt_or_wc(kgem, bo); if (bo->domain != DOMAIN_GTT || FORCE_MMAP_SYNC & (1 << DOMAIN_GTT)) { struct drm_i915_gem_set_domain set_domain; DBG(("%s: sync: needs_flush? %d, domain? %d, busy? %d\n", __FUNCTION__, bo->needs_flush, bo->domain, __kgem_busy(kgem, bo->handle))); /* XXX use PROT_READ to avoid the write flush? */ VG_CLEAR(set_domain); set_domain.handle = bo->handle; set_domain.read_domains = I915_GEM_DOMAIN_GTT; set_domain.write_domain = I915_GEM_DOMAIN_GTT; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain)) { DBG(("%s: sync: GPU hang detected\n", __FUNCTION__)); kgem_throttle(kgem); } kgem_bo_retire(kgem, bo); bo->domain = DOMAIN_GTT; bo->gtt_dirty = true; } return ptr; } void *kgem_bo_map__gtt(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: handle=%d, offset=%ld, tiling=%d, map=%p:%p, domain=%d\n", __FUNCTION__, bo->handle, (long)bo->presumed_offset, bo->tiling, bo->map__gtt, bo->map__cpu, bo->domain)); assert(bo->proxy == NULL); assert(bo->exec == NULL); assert(list_is_empty(&bo->list)); assert_tiling(kgem, bo); assert(!bo->purged || bo->reusable); return __kgem_bo_map__gtt_or_wc(kgem, bo); } void *kgem_bo_map__wc(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: handle=%d, offset=%ld, tiling=%d, map=%p:%p, domain=%d\n", __FUNCTION__, bo->handle, (long)bo->presumed_offset, bo->tiling, bo->map__gtt, bo->map__cpu, bo->domain)); assert(bo->proxy == NULL); assert(bo->exec == NULL); assert(list_is_empty(&bo->list)); assert_tiling(kgem, bo); assert(!bo->purged || bo->reusable); if (bo->map__wc) return bo->map__wc; return __kgem_bo_map__wc(kgem, bo); } void *kgem_bo_map__cpu(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s(handle=%d, size=%d, map=%p:%p)\n", __FUNCTION__, bo->handle, bytes(bo), bo->map__gtt, bo->map__cpu)); assert(!bo->purged); assert(list_is_empty(&bo->list)); assert(bo->proxy == NULL); assert_tiling(kgem, bo); if (bo->map__cpu) return MAP(bo->map__cpu); kgem_trim_vma_cache(kgem, MAP_CPU, bucket(bo)); return __kgem_bo_map__cpu(kgem, bo); } void *kgem_bo_map__debug(struct kgem *kgem, struct kgem_bo *bo) { void *ptr; if (bo->tiling == I915_TILING_NONE && kgem->has_llc) { ptr = MAP(bo->map__cpu); if (ptr == NULL) ptr = __kgem_bo_map__cpu(kgem, bo); } else if (bo->tiling || !kgem->has_wc_mmap) { ptr = bo->map__gtt; if (ptr == NULL) ptr = __kgem_bo_map__gtt(kgem, bo); } else { ptr = bo->map__wc; if (ptr == NULL) ptr = __kgem_bo_map__wc(kgem, bo); } return ptr; } uint32_t kgem_bo_flink(struct kgem *kgem, struct kgem_bo *bo) { struct drm_gem_flink flink; VG_CLEAR(flink); flink.handle = bo->handle; if (do_ioctl(kgem->fd, DRM_IOCTL_GEM_FLINK, &flink)) return 0; DBG(("%s: flinked handle=%d to name=%d, marking non-reusable\n", __FUNCTION__, flink.handle, flink.name)); /* Ordinarily giving the name aware makes the buffer non-reusable. * However, we track the lifetime of all clients and their hold * on the buffer, and *presuming* they do not pass it on to a third * party, we track the lifetime accurately. */ bo->reusable = false; kgem_bo_unclean(kgem, bo); return flink.name; } struct kgem_bo *kgem_create_map(struct kgem *kgem, void *ptr, uint32_t size, bool read_only) { struct kgem_bo *bo; uintptr_t first_page, last_page; uint32_t handle; assert(MAP(ptr) == ptr); DBG(("%s(%p size=%d, read-only?=%d) - has_userptr?=%d\n", __FUNCTION__, ptr, size, read_only, kgem->has_userptr)); if (!kgem->has_userptr) return NULL; first_page = (uintptr_t)ptr; last_page = first_page + size + PAGE_SIZE - 1; first_page &= ~(PAGE_SIZE-1); last_page &= ~(PAGE_SIZE-1); assert(last_page > first_page); handle = gem_userptr(kgem->fd, (void *)first_page, last_page-first_page, read_only); if (handle == 0) { DBG(("%s: import failed, errno=%d\n", __FUNCTION__, errno)); return NULL; } bo = __kgem_bo_alloc(handle, (last_page - first_page) / PAGE_SIZE); if (bo == NULL) { gem_close(kgem->fd, handle); return NULL; } bo->unique_id = kgem_get_unique_id(kgem); bo->snoop = !kgem->has_llc; debug_alloc__bo(kgem, bo); if (first_page != (uintptr_t)ptr) { struct kgem_bo *proxy; proxy = kgem_create_proxy(kgem, bo, (uintptr_t)ptr - first_page, size); kgem_bo_destroy(kgem, bo); if (proxy == NULL) return NULL; bo = proxy; } bo->map__cpu = MAKE_USER_MAP(ptr); DBG(("%s(ptr=%p, size=%d, pages=%d, read_only=%d) => handle=%d (proxy? %d)\n", __FUNCTION__, ptr, size, NUM_PAGES(size), read_only, handle, bo->proxy != NULL)); return bo; } void kgem_bo_sync__cpu(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: handle=%d\n", __FUNCTION__, bo->handle)); assert(!bo->scanout); assert_tiling(kgem, bo); kgem_bo_submit(kgem, bo); /* SHM pixmaps use proxies for subpage offsets */ assert(!bo->purged); while (bo->proxy) bo = bo->proxy; assert(!bo->purged); if (bo->domain != DOMAIN_CPU || FORCE_MMAP_SYNC & (1 << DOMAIN_CPU)) { struct drm_i915_gem_set_domain set_domain; DBG(("%s: SYNC: handle=%d, needs_flush? %d, domain? %d, busy? %d\n", __FUNCTION__, bo->handle, bo->needs_flush, bo->domain, __kgem_busy(kgem, bo->handle))); VG_CLEAR(set_domain); set_domain.handle = bo->handle; set_domain.read_domains = I915_GEM_DOMAIN_CPU; set_domain.write_domain = I915_GEM_DOMAIN_CPU; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain)) { DBG(("%s: sync: GPU hang detected\n", __FUNCTION__)); kgem_throttle(kgem); } kgem_bo_retire(kgem, bo); bo->domain = DOMAIN_CPU; } } void kgem_bo_sync__cpu_full(struct kgem *kgem, struct kgem_bo *bo, bool write) { DBG(("%s: handle=%d\n", __FUNCTION__, bo->handle)); assert(!bo->scanout || !write); assert_tiling(kgem, bo); if (write || bo->needs_flush) kgem_bo_submit(kgem, bo); /* SHM pixmaps use proxies for subpage offsets */ assert(!bo->purged); assert(bo->refcnt); while (bo->proxy) bo = bo->proxy; assert(bo->refcnt); assert(!bo->purged); if (bo->domain != DOMAIN_CPU || FORCE_MMAP_SYNC & (1 << DOMAIN_CPU)) { struct drm_i915_gem_set_domain set_domain; DBG(("%s: SYNC: handle=%d, needs_flush? %d, domain? %d, busy? %d\n", __FUNCTION__, bo->handle, bo->needs_flush, bo->domain, __kgem_busy(kgem, bo->handle))); VG_CLEAR(set_domain); set_domain.handle = bo->handle; set_domain.read_domains = I915_GEM_DOMAIN_CPU; set_domain.write_domain = write ? I915_GEM_DOMAIN_CPU : 0; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain)) { DBG(("%s: sync: GPU hang detected\n", __FUNCTION__)); kgem_throttle(kgem); } if (write) { kgem_bo_retire(kgem, bo); bo->domain = DOMAIN_CPU; } else { if (bo->exec == NULL) kgem_bo_maybe_retire(kgem, bo); bo->domain = DOMAIN_NONE; } } } void kgem_bo_sync__gtt(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: handle=%d\n", __FUNCTION__, bo->handle)); assert(bo->refcnt); assert(bo->proxy == NULL); assert_tiling(kgem, bo); kgem_bo_submit(kgem, bo); if (bo->domain != DOMAIN_GTT || FORCE_MMAP_SYNC & (1 << DOMAIN_GTT)) { struct drm_i915_gem_set_domain set_domain; DBG(("%s: SYNC: handle=%d, needs_flush? %d, domain? %d, busy? %d\n", __FUNCTION__, bo->handle, bo->needs_flush, bo->domain, __kgem_busy(kgem, bo->handle))); VG_CLEAR(set_domain); set_domain.handle = bo->handle; set_domain.read_domains = I915_GEM_DOMAIN_GTT; set_domain.write_domain = I915_GEM_DOMAIN_GTT; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain)) { DBG(("%s: sync: GPU hang detected\n", __FUNCTION__)); kgem_throttle(kgem); } kgem_bo_retire(kgem, bo); bo->domain = DOMAIN_GTT; bo->gtt_dirty = true; } } void kgem_clear_dirty(struct kgem *kgem) { struct list * const buffers = &kgem->next_request->buffers; struct kgem_bo *bo; list_for_each_entry(bo, buffers, request) { if (!bo->gpu_dirty) break; bo->gpu_dirty = false; } } struct kgem_bo *kgem_create_proxy(struct kgem *kgem, struct kgem_bo *target, int offset, int length) { struct kgem_bo *bo; DBG(("%s: target handle=%d [proxy? %d], offset=%d, length=%d, io=%d\n", __FUNCTION__, target->handle, target->proxy ? target->proxy->delta : -1, offset, length, target->io)); bo = __kgem_bo_alloc(target->handle, length); if (bo == NULL) return NULL; bo->unique_id = kgem_get_unique_id(kgem); bo->reusable = false; bo->size.bytes = length; bo->io = target->io && target->proxy == NULL; bo->gpu_dirty = target->gpu_dirty; bo->tiling = target->tiling; bo->pitch = target->pitch; bo->flush = target->flush; bo->snoop = target->snoop; assert(!bo->scanout); bo->proxy = kgem_bo_reference(target); bo->delta = offset; /* Proxies are only tracked for busyness on the current rq */ if (target->exec && !bo->io) { assert(RQ(target->rq) == kgem->next_request); list_move_tail(&bo->request, &kgem->next_request->buffers); bo->exec = &_kgem_dummy_exec; bo->rq = target->rq; } return bo; } static struct kgem_buffer * buffer_alloc(void) { struct kgem_buffer *bo; bo = malloc(sizeof(*bo)); if (bo == NULL) return NULL; bo->mem = NULL; bo->need_io = false; bo->mmapped = MMAPPED_CPU; return bo; } static struct kgem_buffer * buffer_alloc_with_data(int num_pages) { struct kgem_buffer *bo; bo = malloc(sizeof(*bo) + 2*UPLOAD_ALIGNMENT + num_pages * PAGE_SIZE); if (bo == NULL) return NULL; bo->mem = (void *)ALIGN((uintptr_t)bo + sizeof(*bo), UPLOAD_ALIGNMENT); bo->mmapped = false; return bo; } static inline bool use_snoopable_buffer(struct kgem *kgem, uint32_t flags) { if ((flags & KGEM_BUFFER_WRITE) == 0) return kgem->gen >= 030; return true; } static void init_buffer_from_bo(struct kgem_buffer *bo, struct kgem_bo *old) { DBG(("%s: reusing handle=%d for buffer\n", __FUNCTION__, old->handle)); assert(old->proxy == NULL); assert(list_is_empty(&old->list)); memcpy(&bo->base, old, sizeof(*old)); if (old->rq) list_replace(&old->request, &bo->base.request); else list_init(&bo->base.request); list_replace(&old->vma, &bo->base.vma); list_init(&bo->base.list); free(old); assert(bo->base.tiling == I915_TILING_NONE); bo->base.refcnt = 1; } static struct kgem_buffer * search_snoopable_buffer(struct kgem *kgem, unsigned alloc) { struct kgem_buffer *bo; struct kgem_bo *old; old = search_snoop_cache(kgem, alloc, 0); if (old) { if (!old->io) { bo = buffer_alloc(); if (bo == NULL) return NULL; init_buffer_from_bo(bo, old); } else { bo = (struct kgem_buffer *)old; bo->base.refcnt = 1; } DBG(("%s: created CPU handle=%d for buffer, size %d\n", __FUNCTION__, bo->base.handle, num_pages(&bo->base))); assert(bo->base.snoop); assert(bo->base.tiling == I915_TILING_NONE); assert(num_pages(&bo->base) >= alloc); assert(bo->mmapped == MMAPPED_CPU); assert(bo->need_io == false); bo->mem = kgem_bo_map__cpu(kgem, &bo->base); if (bo->mem == NULL) { bo->base.refcnt = 0; kgem_bo_free(kgem, &bo->base); bo = NULL; } return bo; } return NULL; } static struct kgem_buffer * create_snoopable_buffer(struct kgem *kgem, unsigned alloc) { struct kgem_buffer *bo; uint32_t handle; if (kgem->has_llc) { struct kgem_bo *old; bo = buffer_alloc(); if (bo == NULL) return NULL; old = search_linear_cache(kgem, alloc, CREATE_INACTIVE | CREATE_CPU_MAP | CREATE_EXACT); if (old) { init_buffer_from_bo(bo, old); } else { handle = gem_create(kgem->fd, alloc); if (handle == 0) { free(bo); return NULL; } __kgem_bo_init(&bo->base, handle, alloc); debug_alloc__bo(kgem, &bo->base); DBG(("%s: created CPU (LLC) handle=%d for buffer, size %d\n", __FUNCTION__, bo->base.handle, alloc)); } assert(bo->base.refcnt == 1); assert(bo->mmapped == MMAPPED_CPU); assert(bo->need_io == false); bo->mem = kgem_bo_map__cpu(kgem, &bo->base); if (bo->mem != NULL) return bo; bo->base.refcnt = 0; /* for valgrind */ kgem_bo_free(kgem, &bo->base); } if (kgem->has_caching) { struct kgem_bo *old; bo = buffer_alloc(); if (bo == NULL) return NULL; old = search_linear_cache(kgem, alloc, CREATE_INACTIVE | CREATE_CPU_MAP | CREATE_EXACT); if (old) { init_buffer_from_bo(bo, old); } else { handle = gem_create(kgem->fd, alloc); if (handle == 0) { free(bo); return NULL; } __kgem_bo_init(&bo->base, handle, alloc); debug_alloc__bo(kgem, &bo->base); DBG(("%s: created CPU handle=%d for buffer, size %d\n", __FUNCTION__, bo->base.handle, alloc)); } assert(bo->base.refcnt == 1); assert(bo->mmapped == MMAPPED_CPU); assert(bo->need_io == false); assert(!__kgem_busy(kgem, bo->base.handle)); if (!gem_set_caching(kgem->fd, bo->base.handle, SNOOPED)) goto free_caching; bo->base.snoop = true; bo->mem = kgem_bo_map__cpu(kgem, &bo->base); if (bo->mem == NULL) goto free_caching; return bo; free_caching: bo->base.refcnt = 0; /* for valgrind */ kgem_bo_free(kgem, &bo->base); } if (kgem->has_userptr) { bo = buffer_alloc(); if (bo == NULL) return NULL; //if (posix_memalign(&ptr, 64, ALIGN(size, 64))) if (posix_memalign(&bo->mem, PAGE_SIZE, alloc * PAGE_SIZE)) { free(bo); return NULL; } handle = gem_userptr(kgem->fd, bo->mem, alloc * PAGE_SIZE, false); if (handle == 0) { free(bo->mem); free(bo); return NULL; } __kgem_bo_init(&bo->base, handle, alloc); debug_alloc__bo(kgem, &bo->base); DBG(("%s: created snoop handle=%d for buffer\n", __FUNCTION__, bo->base.handle)); assert(bo->mmapped == MMAPPED_CPU); assert(bo->need_io == false); bo->base.refcnt = 1; bo->base.snoop = true; bo->base.map__cpu = MAKE_USER_MAP(bo->mem); return bo; } return NULL; } struct kgem_bo *kgem_create_buffer(struct kgem *kgem, uint32_t size, uint32_t flags, void **ret) { struct kgem_buffer *bo; unsigned offset, alloc; struct kgem_bo *old; DBG(("%s: size=%d, flags=%x [write?=%d, inplace?=%d, last?=%d]\n", __FUNCTION__, size, flags, !!(flags & KGEM_BUFFER_WRITE), !!(flags & KGEM_BUFFER_INPLACE), !!(flags & KGEM_BUFFER_LAST))); assert(size); /* we should never be asked to create anything TOO large */ assert(size <= kgem->max_object_size); #if !DBG_NO_UPLOAD_CACHE list_for_each_entry(bo, &kgem->batch_buffers, base.list) { assert(bo->base.io); assert(bo->base.refcnt >= 1); /* We can reuse any write buffer which we can fit */ if (flags == KGEM_BUFFER_LAST && bo->write == KGEM_BUFFER_WRITE && bo->base.refcnt == 1 && bo->mmapped == MMAPPED_NONE && size <= bytes(&bo->base)) { DBG(("%s: reusing write buffer for read of %d bytes? used=%d, total=%d\n", __FUNCTION__, size, bo->used, bytes(&bo->base))); gem_write__cachealigned(kgem->fd, bo->base.handle, 0, bo->used, bo->mem); assert(list_is_empty(&bo->base.vma)); bo->need_io = 0; bo->write = 0; offset = 0; bo->used = size; goto done; } if (flags & KGEM_BUFFER_WRITE) { if ((bo->write & KGEM_BUFFER_WRITE) == 0 || (((bo->write & ~flags) & KGEM_BUFFER_INPLACE) && !bo->base.snoop)) { DBG(("%s: skip write %x buffer, need %x\n", __FUNCTION__, bo->write, flags)); continue; } assert(bo->mmapped || bo->need_io); } else { if (bo->write & KGEM_BUFFER_WRITE) { DBG(("%s: skip write %x buffer, need %x\n", __FUNCTION__, bo->write, flags)); continue; } } if (bo->used + size <= bytes(&bo->base)) { DBG(("%s: reusing buffer? used=%d + size=%d, total=%d\n", __FUNCTION__, bo->used, size, bytes(&bo->base))); offset = bo->used; bo->used += size; goto done; } } if (flags & KGEM_BUFFER_WRITE) { list_for_each_entry(bo, &kgem->active_buffers, base.list) { assert(bo->base.io); assert(bo->base.refcnt >= 1); assert(bo->base.exec == NULL); assert(bo->mmapped); assert(bo->mmapped == MMAPPED_GTT || kgem->has_llc || bo->base.snoop); if ((bo->write & ~flags) & KGEM_BUFFER_INPLACE && !bo->base.snoop) { DBG(("%s: skip write %x buffer, need %x\n", __FUNCTION__, bo->write, flags)); continue; } if (bo->used + size <= bytes(&bo->base)) { DBG(("%s: reusing buffer? used=%d + size=%d, total=%d\n", __FUNCTION__, bo->used, size, bytes(&bo->base))); offset = bo->used; bo->used += size; list_move(&bo->base.list, &kgem->batch_buffers); goto done; } if (bo->base.refcnt == 1 && size <= bytes(&bo->base) && (bo->base.rq == NULL || !__kgem_busy(kgem, bo->base.handle))) { DBG(("%s: reusing whole buffer? size=%d, total=%d\n", __FUNCTION__, size, bytes(&bo->base))); __kgem_bo_clear_busy(&bo->base); assert(list_is_empty(&bo->base.vma)); switch (bo->mmapped) { case MMAPPED_CPU: kgem_bo_sync__cpu(kgem, &bo->base); break; case MMAPPED_GTT: kgem_bo_sync__gtt(kgem, &bo->base); break; } offset = 0; bo->used = size; list_move(&bo->base.list, &kgem->batch_buffers); goto done; } } } #endif #if !DBG_NO_MAP_UPLOAD /* Be a little more generous and hope to hold fewer mmappings */ alloc = ALIGN(2*size, kgem->buffer_size); if (alloc > MAX_CACHE_SIZE) alloc = ALIGN(size, kgem->buffer_size); if (alloc > MAX_CACHE_SIZE) alloc = PAGE_ALIGN(size); assert(alloc); alloc /= PAGE_SIZE; if (alloc > kgem->aperture_mappable / 4 && !kgem->has_wc_mmap) flags &= ~KGEM_BUFFER_INPLACE; if (kgem->has_llc && (flags & KGEM_BUFFER_WRITE_INPLACE) != KGEM_BUFFER_WRITE_INPLACE) { bo = buffer_alloc(); if (bo == NULL) goto skip_llc; old = NULL; if ((flags & KGEM_BUFFER_WRITE) == 0) old = search_linear_cache(kgem, alloc, CREATE_CPU_MAP); if (old == NULL) old = search_linear_cache(kgem, alloc, CREATE_INACTIVE | CREATE_CPU_MAP); if (old == NULL) old = search_linear_cache(kgem, NUM_PAGES(size), CREATE_INACTIVE | CREATE_CPU_MAP); if (old) { DBG(("%s: found LLC handle=%d for buffer\n", __FUNCTION__, old->handle)); init_buffer_from_bo(bo, old); } else { uint32_t handle = gem_create(kgem->fd, alloc); if (handle == 0) { free(bo); goto skip_llc; } __kgem_bo_init(&bo->base, handle, alloc); debug_alloc__bo(kgem, &bo->base); DBG(("%s: created LLC handle=%d for buffer\n", __FUNCTION__, bo->base.handle)); } assert(bo->mmapped); assert(!bo->need_io); bo->mem = kgem_bo_map__cpu(kgem, &bo->base); if (bo->mem) { if (flags & KGEM_BUFFER_WRITE) kgem_bo_sync__cpu(kgem, &bo->base); flags &= ~KGEM_BUFFER_INPLACE; goto init; } else { bo->base.refcnt = 0; /* for valgrind */ kgem_bo_free(kgem, &bo->base); } } skip_llc: if ((flags & KGEM_BUFFER_WRITE_INPLACE) == KGEM_BUFFER_WRITE_INPLACE) { /* The issue with using a GTT upload buffer is that we may * cause eviction-stalls in order to free up some GTT space. * An is-mappable? ioctl could help us detect when we are * about to block, or some per-page magic in the kernel. * * XXX This is especially noticeable on memory constrained * devices like gen2 or with relatively slow gpu like i3. */ DBG(("%s: searching for an inactive GTT map for upload\n", __FUNCTION__)); old = search_linear_cache(kgem, alloc, CREATE_EXACT | CREATE_INACTIVE | CREATE_GTT_MAP); #if HAVE_I915_GEM_BUFFER_INFO if (old) { struct drm_i915_gem_buffer_info info; /* An example of such a non-blocking ioctl might work */ VG_CLEAR(info); info.handle = handle; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_BUFFER_INFO, &fino) == 0) { old->presumed_offset = info.addr; if ((info.flags & I915_GEM_MAPPABLE) == 0) { kgem_bo_move_to_inactive(kgem, old); old = NULL; } } } #endif if (old == NULL) old = search_linear_cache(kgem, NUM_PAGES(size), CREATE_EXACT | CREATE_INACTIVE | CREATE_GTT_MAP); if (old == NULL) { old = search_linear_cache(kgem, alloc, CREATE_INACTIVE); if (old && !kgem_bo_can_map(kgem, old)) { _kgem_bo_destroy(kgem, old); old = NULL; } } if (old) { DBG(("%s: reusing handle=%d for buffer\n", __FUNCTION__, old->handle)); assert(kgem_bo_can_map(kgem, old)); assert(!old->snoop); assert(old->rq == NULL); bo = buffer_alloc(); if (bo == NULL) return NULL; init_buffer_from_bo(bo, old); assert(num_pages(&bo->base) >= NUM_PAGES(size)); assert(bo->mmapped); assert(bo->base.refcnt == 1); bo->mem = kgem_bo_map(kgem, &bo->base); if (bo->mem) { if (bo->mem == MAP(bo->base.map__cpu)) flags &= ~KGEM_BUFFER_INPLACE; else bo->mmapped = MMAPPED_GTT; goto init; } else { bo->base.refcnt = 0; kgem_bo_free(kgem, &bo->base); } } } #else flags &= ~KGEM_BUFFER_INPLACE; #endif /* Be more parsimonious with pwrite/pread/cacheable buffers */ if ((flags & KGEM_BUFFER_INPLACE) == 0) alloc = NUM_PAGES(size); if (use_snoopable_buffer(kgem, flags)) { bo = search_snoopable_buffer(kgem, alloc); if (bo) { if (flags & KGEM_BUFFER_WRITE) kgem_bo_sync__cpu(kgem, &bo->base); flags &= ~KGEM_BUFFER_INPLACE; goto init; } if ((flags & KGEM_BUFFER_INPLACE) == 0) { bo = create_snoopable_buffer(kgem, alloc); if (bo) goto init; } } flags &= ~KGEM_BUFFER_INPLACE; old = NULL; if ((flags & KGEM_BUFFER_WRITE) == 0) old = search_linear_cache(kgem, alloc, 0); if (old == NULL) old = search_linear_cache(kgem, alloc, CREATE_INACTIVE); if (old) { DBG(("%s: reusing ordinary handle %d for io\n", __FUNCTION__, old->handle)); bo = buffer_alloc_with_data(num_pages(old)); if (bo == NULL) return NULL; init_buffer_from_bo(bo, old); bo->need_io = flags & KGEM_BUFFER_WRITE; } else { unsigned hint; if (use_snoopable_buffer(kgem, flags)) { bo = create_snoopable_buffer(kgem, alloc); if (bo) goto init; } bo = buffer_alloc(); if (bo == NULL) return NULL; hint = CREATE_INACTIVE; if (flags & KGEM_BUFFER_WRITE) hint |= CREATE_CPU_MAP; old = search_linear_cache(kgem, alloc, hint); if (old) { DBG(("%s: reusing handle=%d for buffer\n", __FUNCTION__, old->handle)); init_buffer_from_bo(bo, old); } else { uint32_t handle = gem_create(kgem->fd, alloc); if (handle == 0) { free(bo); return NULL; } DBG(("%s: created handle=%d for buffer\n", __FUNCTION__, handle)); __kgem_bo_init(&bo->base, handle, alloc); debug_alloc__bo(kgem, &bo->base); } assert(bo->mmapped); assert(!bo->need_io); assert(bo->base.refcnt == 1); if (flags & KGEM_BUFFER_WRITE) { bo->mem = kgem_bo_map__cpu(kgem, &bo->base); if (bo->mem != NULL) { kgem_bo_sync__cpu(kgem, &bo->base); goto init; } } DBG(("%s: failing back to new pwrite buffer\n", __FUNCTION__)); old = &bo->base; bo = buffer_alloc_with_data(num_pages(old)); if (bo == NULL) { old->refcnt= 0; kgem_bo_free(kgem, old); return NULL; } init_buffer_from_bo(bo, old); assert(bo->mem); assert(!bo->mmapped); assert(bo->base.refcnt == 1); bo->need_io = flags & KGEM_BUFFER_WRITE; } init: bo->base.io = true; assert(bo->base.refcnt == 1); assert(num_pages(&bo->base) >= NUM_PAGES(size)); assert(!bo->need_io || !bo->base.needs_flush); assert(!bo->need_io || bo->base.domain != DOMAIN_GPU); assert(bo->mem); assert(bo->mmapped != MMAPPED_GTT || bo->base.map__gtt == bo->mem || bo->base.map__wc == bo->mem); assert(bo->mmapped != MMAPPED_CPU || MAP(bo->base.map__cpu) == bo->mem); bo->used = size; bo->write = flags & KGEM_BUFFER_WRITE_INPLACE; offset = 0; assert(list_is_empty(&bo->base.list)); list_add(&bo->base.list, &kgem->batch_buffers); DBG(("%s(pages=%d [%d]) new handle=%d, used=%d, write=%d\n", __FUNCTION__, num_pages(&bo->base), alloc, bo->base.handle, bo->used, bo->write)); done: bo->used = ALIGN(bo->used, UPLOAD_ALIGNMENT); assert(bo->used && bo->used <= bytes(&bo->base)); assert(bo->mem); *ret = (char *)bo->mem + offset; return kgem_create_proxy(kgem, &bo->base, offset, size); } bool kgem_buffer_is_inplace(struct kgem_bo *_bo) { struct kgem_buffer *bo = (struct kgem_buffer *)_bo->proxy; return bo->write & KGEM_BUFFER_WRITE_INPLACE; } struct kgem_bo *kgem_create_buffer_2d(struct kgem *kgem, int width, int height, int bpp, uint32_t flags, void **ret) { struct kgem_bo *bo; int stride; assert(width > 0 && height > 0); assert(ret != NULL); stride = ALIGN(width, 2) * bpp >> 3; stride = ALIGN(stride, kgem->gen >= 0100 ? 32 : 4); DBG(("%s: %dx%d, %d bpp, stride=%d\n", __FUNCTION__, width, height, bpp, stride)); bo = kgem_create_buffer(kgem, stride * ALIGN(height, 2), flags, ret); if (bo == NULL) { DBG(("%s: allocation failure for upload buffer\n", __FUNCTION__)); return NULL; } assert(*ret != NULL); assert(bo->proxy != NULL); if (height & 1) { struct kgem_buffer *io = (struct kgem_buffer *)bo->proxy; int min; assert(io->used); /* Having padded this surface to ensure that accesses to * the last pair of rows is valid, remove the padding so * that it can be allocated to other pixmaps. */ min = bo->delta + height * stride; min = ALIGN(min, UPLOAD_ALIGNMENT); if (io->used != min) { DBG(("%s: trimming buffer from %d to %d\n", __FUNCTION__, io->used, min)); io->used = min; } bo->size.bytes -= stride; } bo->map__cpu = *ret; bo->pitch = stride; bo->unique_id = kgem_get_unique_id(kgem); return bo; } struct kgem_bo *kgem_upload_source_image(struct kgem *kgem, const void *data, const BoxRec *box, int stride, int bpp) { int width = box->x2 - box->x1; int height = box->y2 - box->y1; struct kgem_bo *bo; void *dst; if (!kgem_can_create_2d(kgem, width, height, bpp)) return NULL; DBG(("%s : (%d, %d), (%d, %d), stride=%d, bpp=%d\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, stride, bpp)); assert(data); assert(width > 0); assert(height > 0); assert(stride); assert(bpp); bo = kgem_create_buffer_2d(kgem, width, height, bpp, KGEM_BUFFER_WRITE_INPLACE, &dst); if (bo == NULL) return NULL; if (sigtrap_get()) { kgem_bo_destroy(kgem, bo); return NULL; } memcpy_blt(data, dst, bpp, stride, bo->pitch, box->x1, box->y1, 0, 0, width, height); sigtrap_put(); return bo; } void kgem_proxy_bo_attach(struct kgem_bo *bo, struct kgem_bo **ptr) { DBG(("%s: handle=%d\n", __FUNCTION__, bo->handle)); assert(bo->map__gtt == NULL); assert(bo->proxy); list_add(&bo->vma, &bo->proxy->vma); bo->map__gtt = ptr; *ptr = kgem_bo_reference(bo); } void kgem_buffer_read_sync(struct kgem *kgem, struct kgem_bo *_bo) { struct kgem_buffer *bo; uint32_t offset = _bo->delta, length = _bo->size.bytes; /* We expect the caller to have already submitted the batch */ assert(_bo->io); assert(_bo->exec == NULL); assert(_bo->rq == NULL); assert(_bo->proxy); _bo = _bo->proxy; assert(_bo->proxy == NULL); assert(_bo->exec == NULL); bo = (struct kgem_buffer *)_bo; DBG(("%s(offset=%d, length=%d, snooped=%d)\n", __FUNCTION__, offset, length, bo->base.snoop)); if (bo->mmapped) { struct drm_i915_gem_set_domain set_domain; DBG(("%s: sync: needs_flush? %d, domain? %d, busy? %d\n", __FUNCTION__, bo->base.needs_flush, bo->base.domain, __kgem_busy(kgem, bo->base.handle))); assert(bo->mmapped == MMAPPED_GTT || bo->base.snoop || kgem->has_llc); VG_CLEAR(set_domain); set_domain.handle = bo->base.handle; set_domain.write_domain = 0; set_domain.read_domains = bo->mmapped == MMAPPED_CPU ? I915_GEM_DOMAIN_CPU : I915_GEM_DOMAIN_GTT; if (do_ioctl(kgem->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain)) { DBG(("%s: sync: GPU hang detected\n", __FUNCTION__)); kgem_throttle(kgem); } } else { if (gem_read(kgem->fd, bo->base.handle, (char *)bo->mem+offset, offset, length)) return; } kgem_bo_maybe_retire(kgem, &bo->base); bo->base.domain = DOMAIN_NONE; } uint32_t kgem_bo_get_binding(struct kgem_bo *bo, uint32_t format) { struct kgem_bo_binding *b; assert(bo->refcnt); for (b = &bo->binding; b && b->offset; b = b->next) if (format == b->format) return b->offset; return 0; } void kgem_bo_set_binding(struct kgem_bo *bo, uint32_t format, uint16_t offset) { struct kgem_bo_binding *b; assert(bo->refcnt); for (b = &bo->binding; b; b = b->next) { if (b->offset) continue; b->offset = offset; b->format = format; if (b->next) b->next->offset = 0; return; } b = malloc(sizeof(*b)); if (b) { b->next = bo->binding.next; b->format = format; b->offset = offset; bo->binding.next = b; } } struct kgem_bo * kgem_replace_bo(struct kgem *kgem, struct kgem_bo *src, uint32_t width, uint32_t height, uint32_t pitch, uint32_t bpp) { struct kgem_bo *dst; uint32_t br00, br13; uint32_t handle; uint32_t size; uint32_t *b; DBG(("%s: replacing bo handle=%d, size=%dx%d pitch=%d, with pitch=%d\n", __FUNCTION__, src->handle, width, height, src->pitch, pitch)); /* We only expect to be called to fixup small buffers, hence why * we only attempt to allocate a linear bo. */ assert(src->tiling == I915_TILING_NONE); assert(kgem_bo_can_blt(kgem, src)); size = height * pitch; size = NUM_PAGES(size); dst = search_linear_cache(kgem, size, 0); if (dst == NULL) dst = search_linear_cache(kgem, size, CREATE_INACTIVE); if (dst == NULL) { handle = gem_create(kgem->fd, size); if (handle == 0) return NULL; dst = __kgem_bo_alloc(handle, size); if (dst == NULL) { gem_close(kgem->fd, handle); return NULL; } debug_alloc__bo(kgem, dst); } dst->pitch = pitch; dst->unique_id = kgem_get_unique_id(kgem); dst->refcnt = 1; assert(dst->tiling == I915_TILING_NONE); assert(kgem_bo_can_blt(kgem, dst)); kgem_set_mode(kgem, KGEM_BLT, dst); if (!kgem_check_batch(kgem, 10) || !kgem_check_reloc(kgem, 2) || !kgem_check_many_bo_fenced(kgem, src, dst, NULL)) { kgem_submit(kgem); if (!kgem_check_many_bo_fenced(kgem, src, dst, NULL)) { kgem_bo_destroy(kgem, dst); return NULL; } _kgem_set_mode(kgem, KGEM_BLT); } br00 = XY_SRC_COPY_BLT_CMD; br13 = pitch; pitch = src->pitch; if (kgem->gen >= 040 && src->tiling) { br00 |= BLT_SRC_TILED; pitch >>= 2; } br13 |= 0xcc << 16; switch (bpp) { default: case 32: br00 |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; br13 |= 1 << 25; /* RGB8888 */ case 16: br13 |= 1 << 24; /* RGB565 */ case 8: break; } b = kgem->batch + kgem->nbatch; if (kgem->gen >= 0100) { b[0] = br00 | 8; b[1] = br13; b[2] = 0; b[3] = height << 16 | width; *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, dst, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = 0; b[7] = pitch; *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, src, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 10; } else { b[0] = br00 | 6; b[1] = br13; b[2] = 0; b[3] = height << 16 | width; b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, dst, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = 0; b[6] = pitch; b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7, src, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 8; } return dst; } bool kgem_bo_convert_to_gpu(struct kgem *kgem, struct kgem_bo *bo, unsigned flags) { DBG(("%s: converting handle=%d from CPU to GPU, flags=%x, busy?=%d\n", __FUNCTION__, bo->handle, flags, __kgem_bo_is_busy(kgem, bo))); assert(bo->tiling == I915_TILING_NONE); if (kgem->has_llc) return true; if (flags & MOVE_ASYNC_HINT && __kgem_bo_is_busy(kgem, bo)) return false; assert(bo->snoop); kgem_bo_submit(kgem, bo); if (!gem_set_caching(kgem->fd, bo->handle, UNCACHED)) return false; bo->snoop = false; return true; } xf86-video-intel-2.99.917/src/sna/sna_glyphs.c0000664000175000017500000016744412432737457015650 00000000000000/* * Copyright © 2010 Intel Corporation * Partly based on code Copyright © 2008 Red Hat, Inc. * Partly based on code Copyright © 2000 SuSE, Inc. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Intel not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. Intel makes no representations about the * suitability of this software for any purpose. It is provided "as is" * without express or implied warranty. * * INTEL DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL INTEL * BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Red Hat not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. Red Hat makes no representations about the * suitability of this software for any purpose. It is provided "as is" * without express or implied warranty. * * Red Hat DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL Red Hat * BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of SuSE not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. SuSE makes no representations about the * suitability of this software for any purpose. It is provided "as is" * without express or implied warranty. * * SuSE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL SuSE * BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * Author: Chris Wilson * Based on code by: Keith Packard and Owen Taylor */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "fb/fbpict.h" #define FALLBACK 0 #define NO_GLYPH_CACHE 0 #define NO_GLYPHS_TO_DST 0 #define FORCE_GLYPHS_TO_DST 0 #define NO_GLYPHS_VIA_MASK 0 #define FORCE_SMALL_MASK 0 /* -1 = never, 1 = always */ #define NO_GLYPHS_SLOW 0 #define NO_DISCARD_MASK 0 #define CACHE_PICTURE_SIZE 1024 #define GLYPH_MIN_SIZE 8 #define GLYPH_MAX_SIZE 64 #define GLYPH_CACHE_SIZE (CACHE_PICTURE_SIZE * CACHE_PICTURE_SIZE / (GLYPH_MIN_SIZE * GLYPH_MIN_SIZE)) #define N_STACK_GLYPHS 512 #define NO_ATLAS ((PicturePtr)-1) #define GLYPH_TOLERANCE 3 #define glyph_valid(g) *((uint32_t *)&(g)->info.width) #define glyph_copy_size(r, g) *(uint32_t *)&(r)->width = *(uint32_t *)&g->info.width #if HAS_PIXMAN_GLYPHS static pixman_glyph_cache_t *__global_glyph_cache; #endif #if HAS_DEBUG_FULL static void _assert_pixmap_contains_box(PixmapPtr pixmap, BoxPtr box, const char *function) { if (box->x1 < 0 || box->y1 < 0 || box->x2 > pixmap->drawable.width || box->y2 > pixmap->drawable.height) { FatalError("%s: damage box is beyond the pixmap: box=(%d, %d), (%d, %d), pixmap=(%d, %d)\n", function, box->x1, box->y1, box->x2, box->y2, pixmap->drawable.width, pixmap->drawable.height); } } #define assert_pixmap_contains_box(p, b) _assert_pixmap_contains_box(p, b, __FUNCTION__) #else #define assert_pixmap_contains_box(p, b) #endif extern DevPrivateKeyRec sna_glyph_key; static inline struct sna_glyph *sna_glyph(GlyphPtr glyph) { return __get_private(glyph, sna_glyph_key); } static inline struct sna_glyph *sna_glyph0(GlyphPtr glyph) { return (struct sna_glyph *)glyph->devPrivates; } static inline bool can_use_glyph0(void) { #if HAS_DEVPRIVATEKEYREC return sna_glyph_key.offset == 0; #else return 0; #endif } #define NeedsComponent(f) (PICT_FORMAT_A(f) != 0 && PICT_FORMAT_RGB(f) != 0) static bool op_is_bounded(uint8_t op) { switch (op) { case PictOpOver: case PictOpOutReverse: case PictOpAdd: case PictOpXor: return true; default: return false; } } void sna_glyphs_close(struct sna *sna) { struct sna_render *render = &sna->render; unsigned int i; DBG(("%s\n", __FUNCTION__)); for (i = 0; i < ARRAY_SIZE(render->glyph); i++) { struct sna_glyph_cache *cache = &render->glyph[i]; if (cache->picture) FreePicture(cache->picture, 0); free(cache->glyphs); } memset(render->glyph, 0, sizeof(render->glyph)); if (render->white_image) { pixman_image_unref(render->white_image); render->white_image = NULL; } if (render->white_picture) { FreePicture(render->white_picture, 0); render->white_picture = NULL; } } /* All caches for a single format share a single pixmap for glyph storage, * allowing mixing glyphs of different sizes without paying a penalty * for switching between source pixmaps. (Note that for a size of font * right at the border between two sizes, we might be switching for almost * every glyph.) * * This function allocates the storage pixmap, and then fills in the * rest of the allocated structures for all caches with the given format. */ bool sna_glyphs_create(struct sna *sna) { ScreenPtr screen = sna->scrn->pScreen; pixman_color_t white = { 0xffff, 0xffff, 0xffff, 0xffff }; unsigned int formats[] = { PIXMAN_a8, PIXMAN_a8r8g8b8, }; unsigned int i; int error; DBG(("%s\n", __FUNCTION__)); #if HAS_PIXMAN_GLYPHS if (__global_glyph_cache == NULL) { __global_glyph_cache = pixman_glyph_cache_create(); if (__global_glyph_cache == NULL) goto bail; } #endif sna->render.white_image = pixman_image_create_solid_fill(&white); if (sna->render.white_image == NULL) goto bail; if (!can_render(sna)) { DBG(("%s: no render acceleration, no render glyph caches\n", __FUNCTION__)); return true; } if (xf86IsEntityShared(sna->scrn->entityList[0])) { DBG(("%s: shared GlyphPictures, no render glyph caches\n", __FUNCTION__)); return true; } for (i = 0; i < ARRAY_SIZE(formats); i++) { struct sna_glyph_cache *cache = &sna->render.glyph[i]; struct sna_pixmap *priv; PixmapPtr pixmap; PicturePtr picture = NULL; PictFormatPtr pPictFormat; CARD32 component_alpha; int depth = PIXMAN_FORMAT_DEPTH(formats[i]); pPictFormat = PictureMatchFormat(screen, depth, formats[i]); if (!pPictFormat) goto bail; /* Now allocate the pixmap and picture */ pixmap = screen->CreatePixmap(screen, CACHE_PICTURE_SIZE, CACHE_PICTURE_SIZE, depth, SNA_CREATE_SCRATCH); if (!pixmap) { DBG(("%s: failed to allocate pixmap for Glyph cache\n", __FUNCTION__)); goto bail; } priv = sna_pixmap(pixmap); if (priv != NULL) { /* Prevent the cache from ever being paged out */ assert(priv->gpu_bo); priv->pinned = PIN_SCANOUT; component_alpha = NeedsComponent(pPictFormat->format); picture = CreatePicture(0, &pixmap->drawable, pPictFormat, CPComponentAlpha, &component_alpha, serverClient, &error); } screen->DestroyPixmap(pixmap); if (!picture) goto bail; ValidatePicture(picture); assert(picture->pDrawable == &pixmap->drawable); cache->count = cache->evict = 0; cache->picture = picture; cache->glyphs = calloc(sizeof(struct sna_glyph *), GLYPH_CACHE_SIZE); if (!cache->glyphs) goto bail; cache->evict = rand() % GLYPH_CACHE_SIZE; } sna->render.white_picture = CreateSolidPicture(0, (xRenderColor *)&white, &error); if (sna->render.white_picture == NULL) goto bail; return true; bail: sna_glyphs_close(sna); return false; } static void glyph_cache_upload(struct sna_glyph_cache *cache, GlyphPtr glyph, PicturePtr glyph_picture, int16_t x, int16_t y) { DBG(("%s: upload glyph %p to cache (%d, %d)x(%d, %d)\n", __FUNCTION__, glyph, x, y, glyph_picture->pDrawable->width, glyph_picture->pDrawable->height)); sna_composite(PictOpSrc, glyph_picture, 0, cache->picture, 0, 0, 0, 0, x, y, glyph_picture->pDrawable->width, glyph_picture->pDrawable->height); } static void glyph_extents(int nlist, GlyphListPtr list, GlyphPtr *glyphs, BoxPtr extents) { int x1, x2, y1, y2; int x, y; x1 = y1 = MAXSHORT; x2 = y2 = MINSHORT; x = y = 0; while (nlist--) { int n = list->len; x += list->xOff; y += list->yOff; list++; while (n--) { GlyphPtr glyph = *glyphs++; if (glyph_valid(glyph)) { int v; v = x - glyph->info.x; if (v < x1) x1 = v; v += glyph->info.width; if (v > x2) x2 = v; v = y - glyph->info.y; if (v < y1) y1 = v; v += glyph->info.height; if (v > y2) y2 = v; } x += glyph->info.xOff; y += glyph->info.yOff; } } extents->x1 = x1 > MINSHORT ? x1 : MINSHORT; extents->y1 = y1 > MINSHORT ? y1 : MINSHORT; extents->x2 = x2 < MAXSHORT ? x2 : MAXSHORT; extents->y2 = y2 < MAXSHORT ? y2 : MAXSHORT; } #if HAS_DEBUG_FULL static int glyph_count(int nlist, GlyphListPtr list) { int count = 0; while (nlist--) { count += list->len; list++; } return count; } #endif static inline unsigned int glyph_size_to_count(int size) { size /= GLYPH_MIN_SIZE; return size * size; } static inline unsigned int glyph_count_to_mask(int count) { return ~(count - 1); } static inline unsigned int glyph_size_to_mask(int size) { return glyph_count_to_mask(glyph_size_to_count(size)); } static int glyph_cache(ScreenPtr screen, struct sna_render *render, GlyphPtr glyph) { PicturePtr glyph_picture; struct sna_glyph_cache *cache; struct sna_glyph *p; int size, mask, pos, s; assert(glyph_valid(glyph)); glyph_picture = GetGlyphPicture(glyph, screen); if (unlikely(glyph_picture == NULL)) { glyph->info.width = glyph->info.height = 0; return false; } if (NO_GLYPH_CACHE || glyph->info.width > GLYPH_MAX_SIZE || glyph->info.height > GLYPH_MAX_SIZE) { PixmapPtr pixmap = (PixmapPtr)glyph_picture->pDrawable; assert(glyph_picture->pDrawable->type == DRAWABLE_PIXMAP); if (pixmap->drawable.depth >= 8) { pixmap->usage_hint = 0; sna_pixmap_force_to_gpu(pixmap, MOVE_READ); } /* no cache for this glyph */ p = sna_glyph(glyph); p->atlas = glyph_picture; p->coordinate.x = p->coordinate.y = 0; return true; } for (size = GLYPH_MIN_SIZE; size <= GLYPH_MAX_SIZE; size *= 2) if (glyph->info.width <= size && glyph->info.height <= size) break; cache = &render->glyph[PICT_FORMAT_RGB(glyph_picture->format) != 0]; s = glyph_size_to_count(size); mask = glyph_count_to_mask(s); pos = (cache->count + s - 1) & mask; if (pos < GLYPH_CACHE_SIZE) { cache->count = pos + s; } else { p = NULL; for (s = size; s <= GLYPH_MAX_SIZE; s *= 2) { int i = cache->evict & glyph_size_to_mask(s); p = cache->glyphs[i]; if (p == NULL) continue; if (p->size >= s) { cache->glyphs[i] = NULL; p->atlas = NULL; pos = i; } else p = NULL; break; } if (p == NULL) { int count = glyph_size_to_count(size); pos = cache->evict & glyph_count_to_mask(count); for (s = 0; s < count; s++) { p = cache->glyphs[pos + s]; if (p != NULL) { p->atlas =NULL; cache->glyphs[pos + s] = NULL; } } } /* And pick a new eviction position */ cache->evict = rand() % GLYPH_CACHE_SIZE; } assert(cache->glyphs[pos] == NULL); p = sna_glyph(glyph); DBG(("%s(%d): adding glyph to cache %d, pos %d\n", __FUNCTION__, screen->myNum, PICT_FORMAT_RGB(glyph_picture->format) != 0, pos)); cache->glyphs[pos] = p; p->atlas = cache->picture; p->size = size; p->pos = pos << 1 | (PICT_FORMAT_RGB(glyph_picture->format) != 0); s = pos / ((GLYPH_MAX_SIZE / GLYPH_MIN_SIZE) * (GLYPH_MAX_SIZE / GLYPH_MIN_SIZE)); p->coordinate.x = s % (CACHE_PICTURE_SIZE / GLYPH_MAX_SIZE) * GLYPH_MAX_SIZE; p->coordinate.y = (s / (CACHE_PICTURE_SIZE / GLYPH_MAX_SIZE)) * GLYPH_MAX_SIZE; for (s = GLYPH_MIN_SIZE; s < GLYPH_MAX_SIZE; s *= 2) { if (pos & 1) p->coordinate.x += s; if (pos & 2) p->coordinate.y += s; pos >>= 2; } glyph_cache_upload(cache, glyph, glyph_picture, p->coordinate.x, p->coordinate.y); return true; } static void apply_damage(struct sna_composite_op *op, const struct sna_composite_rectangles *r) { BoxRec box; if (op->damage == NULL) return; box.x1 = r->dst.x + op->dst.x; box.y1 = r->dst.y + op->dst.y; box.x2 = box.x1 + r->width; box.y2 = box.y1 + r->height; assert_pixmap_contains_box(op->dst.pixmap, &box); sna_damage_add_box(op->damage, &box); } static void apply_damage_clipped_to_dst(struct sna_composite_op *op, const struct sna_composite_rectangles *r, DrawablePtr dst) { BoxRec box; if (op->damage == NULL) return; box.x1 = r->dst.x + op->dst.x; box.y1 = r->dst.y + op->dst.y; box.x2 = box.x1 + r->width; box.y2 = box.y1 + r->height; if (box.x1 < dst->x) box.x1 = dst->x; if (box.x2 > op->dst.width) box.x2 = op->dst.width; if (box.y1 < dst->y) box.y1 = dst->y; if (box.y2 > op->dst.height) box.y2 = op->dst.height; assert_pixmap_contains_box(op->dst.pixmap, &box); sna_damage_add_box(op->damage, &box); } static inline bool region_matches_pixmap(const RegionRec *r, PixmapPtr pixmap) { return (r->extents.x2 - r->extents.x1 >= pixmap->drawable.width && r->extents.y2 - r->extents.y1 >= pixmap->drawable.height); } static inline bool clipped_glyphs(PicturePtr dst, int nlist, GlyphListPtr list, GlyphPtr *glyphs) { BoxRec box; if (dst->pCompositeClip->data == NULL && region_matches_pixmap(dst->pCompositeClip, get_drawable_pixmap(dst->pDrawable))) { DBG(("%s: no, clip region (%d, %d), (%d, %d) matches drawable pixmap=%ld size=%dx%d\n", __FUNCTION__, dst->pCompositeClip->extents.x1, dst->pCompositeClip->extents.y1, dst->pCompositeClip->extents.x2, dst->pCompositeClip->extents.y2, get_drawable_pixmap(dst->pDrawable), get_drawable_pixmap(dst->pDrawable)->drawable.width, get_drawable_pixmap(dst->pDrawable)->drawable.height)); return false; } glyph_extents(nlist, list, glyphs, &box); box.x1 += dst->pDrawable->x; box.x2 += dst->pDrawable->x; box.y1 += dst->pDrawable->y; box.y2 += dst->pDrawable->y; DBG(("%s? %d glyph in %d lists extents (%d, %d), (%d, %d), region (%d, %d), (%d, %d): %s\n", __FUNCTION__, glyph_count(nlist, list), nlist, box.x1, box.y1, box.x2, box.y2, dst->pCompositeClip->extents.x1, dst->pCompositeClip->extents.y1, dst->pCompositeClip->extents.x2, dst->pCompositeClip->extents.y2, pixman_region_contains_rectangle(dst->pCompositeClip, &box) != PIXMAN_REGION_IN ? "yes" : "no")); return pixman_region_contains_rectangle(dst->pCompositeClip, &box) != PIXMAN_REGION_IN; } flatten static bool glyphs_to_dst(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int nlist, GlyphListPtr list, GlyphPtr *glyphs) { struct sna_composite_op tmp; ScreenPtr screen = dst->pDrawable->pScreen; PicturePtr glyph_atlas; const BoxRec *rects; int nrect; int16_t x, y; if (NO_GLYPHS_TO_DST) return false; memset(&tmp, 0, sizeof(tmp)); DBG(("%s(op=%d, src=(%d, %d), nlist=%d, dst=(%d, %d)+(%d, %d))\n", __FUNCTION__, op, src_x, src_y, nlist, list->xOff, list->yOff, dst->pDrawable->x, dst->pDrawable->y)); if (clipped_glyphs(dst, nlist, list, glyphs)) { rects = region_rects(dst->pCompositeClip); nrect = region_num_rects(dst->pCompositeClip); } else nrect = 0; x = dst->pDrawable->x; y = dst->pDrawable->y; src_x -= list->xOff + x; src_y -= list->yOff + y; glyph_atlas = NO_ATLAS; while (nlist--) { int n = list->len; x += list->xOff; y += list->yOff; while (n--) { GlyphPtr glyph = *glyphs++; struct sna_glyph *p; int i; p = sna_glyph(glyph); if (unlikely(p->atlas != glyph_atlas)) { if (unlikely(!glyph_valid(glyph))) goto next_glyph; if (glyph_atlas != NO_ATLAS) { tmp.done(sna, &tmp); glyph_atlas = NO_ATLAS; } if (p->atlas == NULL && !glyph_cache(screen, &sna->render, glyph)) goto next_glyph; if (!sna->render.composite(sna, op, src, p->atlas, dst, 0, 0, 0, 0, 0, 0, 0, 0, COMPOSITE_PARTIAL, &tmp)) return false; glyph_atlas = p->atlas; } if (nrect) { int xi = x - glyph->info.x; int yi = y - glyph->info.y; if (xi < dst->pCompositeClip->extents.x2 && yi < dst->pCompositeClip->extents.y2 && xi + glyph->info.width > dst->pCompositeClip->extents.x1 && yi + glyph->info.height > dst->pCompositeClip->extents.y1) { for (i = 0; i < nrect; i++) { struct sna_composite_rectangles r; int16_t dx, dy; int16_t x2, y2; r.dst.x = xi; r.dst.y = yi; x2 = xi + glyph->info.width; y2 = yi + glyph->info.height; dx = dy = 0; DBG(("%s: glyph=(%d, %d), (%d, %d), clip=(%d, %d), (%d, %d)\n", __FUNCTION__, r.dst.x, r.dst.y, x2, y2, rects[i].x1, rects[i].y1, rects[i].x2, rects[i].y2)); if (rects[i].y1 >= y2) break; if (r.dst.x < rects[i].x1) dx = rects[i].x1 - r.dst.x, r.dst.x = rects[i].x1; if (x2 > rects[i].x2) x2 = rects[i].x2; if (r.dst.y < rects[i].y1) dy = rects[i].y1 - r.dst.y, r.dst.y = rects[i].y1; if (y2 > rects[i].y2) y2 = rects[i].y2; assert(dx >= 0 && dy >= 0); if (r.dst.x < x2 && r.dst.y < y2) { DBG(("%s: blt=(%d, %d), (%d, %d)\n", __FUNCTION__, r.dst.x, r.dst.y, x2, y2)); r.src.x = r.dst.x + src_x; r.src.y = r.dst.y + src_y; r.mask.x = dx + p->coordinate.x; r.mask.y = dy + p->coordinate.y; r.width = x2 - r.dst.x; r.height = y2 - r.dst.y; tmp.blt(sna, &tmp, &r); apply_damage(&tmp, &r); } } } } else { struct sna_composite_rectangles r; r.dst.x = x - glyph->info.x; r.dst.y = y - glyph->info.y; r.src.x = r.dst.x + src_x; r.src.y = r.dst.y + src_y; r.mask = p->coordinate; glyph_copy_size(&r, glyph); DBG(("%s: glyph=(%d, %d)x(%d, %d), unclipped\n", __FUNCTION__, r.dst.x, r.dst.y, r.width, r.height)); tmp.blt(sna, &tmp, &r); apply_damage_clipped_to_dst(&tmp, &r, dst->pDrawable); } next_glyph: x += glyph->info.xOff; y += glyph->info.yOff; } list++; } if (glyph_atlas != NO_ATLAS) tmp.done(sna, &tmp); return true; } flatten static bool glyphs0_to_dst(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int nlist, GlyphListPtr list, GlyphPtr *glyphs) { struct sna_composite_op tmp; ScreenPtr screen = dst->pDrawable->pScreen; PicturePtr glyph_atlas = NO_ATLAS; int x, y; if (NO_GLYPHS_TO_DST) return false; memset(&tmp, 0, sizeof(tmp)); DBG(("%s(op=%d, src=(%d, %d), nlist=%d, dst=(%d, %d)+(%d, %d))\n", __FUNCTION__, op, src_x, src_y, nlist, list->xOff, list->yOff, dst->pDrawable->x, dst->pDrawable->y)); x = dst->pDrawable->x; y = dst->pDrawable->y; src_x -= list->xOff + x; src_y -= list->yOff + y; if (clipped_glyphs(dst, nlist, list, glyphs)) { const BoxRec *rects = region_rects(dst->pCompositeClip); int nrect = region_num_rects(dst->pCompositeClip); if (nrect == 0) return true; while (nlist--) { int n = list->len; x += list->xOff; y += list->yOff; while (n--) { GlyphPtr glyph = *glyphs++; struct sna_glyph *p = sna_glyph0(glyph); int i, xi, yi; if (unlikely(p->atlas != glyph_atlas)) { if (unlikely(!glyph_valid(glyph))) goto next_glyph_N; if (glyph_atlas != NO_ATLAS) { tmp.done(sna, &tmp); glyph_atlas = NO_ATLAS; } if (unlikely(p->atlas == NULL)) { if (!glyph_cache(screen, &sna->render, glyph)) goto next_glyph_N; } if (!sna->render.composite(sna, op, src, p->atlas, dst, 0, 0, 0, 0, 0, 0, 0, 0, COMPOSITE_PARTIAL, &tmp)) return false; glyph_atlas = p->atlas; } xi = x - glyph->info.x; yi = y - glyph->info.y; if (xi < dst->pCompositeClip->extents.x2 && yi < dst->pCompositeClip->extents.y2 && xi + glyph->info.width > dst->pCompositeClip->extents.x1 && yi + glyph->info.height > dst->pCompositeClip->extents.y1) { for (i = 0; i < nrect; i++) { struct sna_composite_rectangles r; int16_t dx, dy; int16_t x2, y2; r.dst.x = xi; r.dst.y = yi; x2 = xi + glyph->info.width; y2 = yi + glyph->info.height; dx = dy = 0; DBG(("%s: glyph=(%d, %d), (%d, %d), clip=(%d, %d), (%d, %d)\n", __FUNCTION__, r.dst.x, r.dst.y, x2, y2, rects[i].x1, rects[i].y1, rects[i].x2, rects[i].y2)); if (rects[i].y1 >= y2) break; if (r.dst.x < rects[i].x1) dx = rects[i].x1 - r.dst.x, r.dst.x = rects[i].x1; if (x2 > rects[i].x2) x2 = rects[i].x2; if (r.dst.y < rects[i].y1) dy = rects[i].y1 - r.dst.y, r.dst.y = rects[i].y1; if (y2 > rects[i].y2) y2 = rects[i].y2; assert(dx >= 0 && dy >= 0); if (r.dst.x < x2 && r.dst.y < y2) { DBG(("%s: blt=(%d, %d), (%d, %d)\n", __FUNCTION__, r.dst.x, r.dst.y, x2, y2)); r.src.x = r.dst.x + src_x; r.src.y = r.dst.y + src_y; r.mask.x = dx + p->coordinate.x; r.mask.y = dy + p->coordinate.y; r.width = x2 - r.dst.x; r.height = y2 - r.dst.y; tmp.blt(sna, &tmp, &r); apply_damage(&tmp, &r); } } } next_glyph_N: x += glyph->info.xOff; y += glyph->info.yOff; } list++; } } else while (nlist--) { int n = list->len; x += list->xOff; y += list->yOff; while (n--) { GlyphPtr glyph = *glyphs++; struct sna_glyph *p = sna_glyph0(glyph); struct sna_composite_rectangles r; if (unlikely(p->atlas != glyph_atlas)) { if (unlikely(!glyph_valid(glyph))) goto next_glyph_0; if (glyph_atlas != NO_ATLAS) { tmp.done(sna, &tmp); glyph_atlas = NO_ATLAS; } if (unlikely(p->atlas == NULL)) { if (!glyph_cache(screen, &sna->render, glyph)) goto next_glyph_0; } if (!sna->render.composite(sna, op, src, p->atlas, dst, 0, 0, 0, 0, 0, 0, 0, 0, COMPOSITE_PARTIAL, &tmp)) return false; glyph_atlas = p->atlas; } r.dst.x = x - glyph->info.x; r.dst.y = y - glyph->info.y; r.src.x = r.dst.x + src_x; r.src.y = r.dst.y + src_y; r.mask = p->coordinate; glyph_copy_size(&r, glyph); DBG(("%s: glyph=(%d, %d)x(%d, %d), unclipped\n", __FUNCTION__, r.dst.x, r.dst.y, r.width, r.height)); tmp.blt(sna, &tmp, &r); apply_damage_clipped_to_dst(&tmp, &r, dst->pDrawable); next_glyph_0: x += glyph->info.xOff; y += glyph->info.yOff; } list++; } if (glyph_atlas != NO_ATLAS) tmp.done(sna, &tmp); return true; } static bool glyphs_slow(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int nlist, GlyphListPtr list, GlyphPtr *glyphs) { struct sna_composite_op tmp; ScreenPtr screen = dst->pDrawable->pScreen; int16_t x, y; if (NO_GLYPHS_SLOW) return false; DBG(("%s(op=%d, src=(%d, %d), nlist=%d, dst=(%d, %d)+(%d, %d))\n", __FUNCTION__, op, src_x, src_y, nlist, list->xOff, list->yOff, dst->pDrawable->x, dst->pDrawable->y)); x = dst->pDrawable->x; y = dst->pDrawable->y; src_x -= list->xOff + x; src_y -= list->yOff + y; while (nlist--) { int n = list->len; x += list->xOff; y += list->yOff; while (n--) { GlyphPtr glyph = *glyphs++; struct sna_glyph *p; const BoxRec *rects; BoxRec box; int nrect; box.x1 = x - glyph->info.x; box.y1 = y - glyph->info.y; box.x2 = bound(box.x1, glyph->info.width); box.y2 = bound(box.y1, glyph->info.height); if (!box_intersect(&box, &dst->pCompositeClip->extents)) goto next_glyph; p = sna_glyph(glyph); if (unlikely(p->atlas == NULL)) { if (unlikely(!glyph_valid(glyph))) goto next_glyph; if (!glyph_cache(screen, &sna->render, glyph)) goto next_glyph; } DBG(("%s: glyph=(%d, %d)x(%d, %d), src=(%d, %d), mask=(%d, %d)\n", __FUNCTION__, x - glyph->info.x, y - glyph->info.y, glyph->info.width, glyph->info.height, src_x + x - glyph->info.x, src_y + y - glyph->info.y, p->coordinate.x, p->coordinate.y)); if (!sna->render.composite(sna, op, src, p->atlas, dst, src_x + x - glyph->info.x, src_y + y - glyph->info.y, p->coordinate.x, p->coordinate.y, x - glyph->info.x, y - glyph->info.y, glyph->info.width, glyph->info.height, COMPOSITE_PARTIAL, memset(&tmp, 0, sizeof(tmp)))) return false; rects = region_rects(dst->pCompositeClip); nrect = region_num_rects(dst->pCompositeClip); do { struct sna_composite_rectangles r; int16_t x2, y2; r.dst.x = x - glyph->info.x; r.dst.y = y - glyph->info.y; x2 = r.dst.x + glyph->info.width; y2 = r.dst.y + glyph->info.height; DBG(("%s: glyph=(%d, %d), (%d, %d), clip=(%d, %d), (%d, %d)\n", __FUNCTION__, r.dst.x, r.dst.y, x2, y2, rects->x1, rects->y1, rects->x2, rects->y2)); if (rects->y1 >= y2) break; if (r.dst.x < rects->x1) r.dst.x = rects->x1; if (x2 > rects->x2) x2 = rects->x2; if (r.dst.y < rects->y1) r.dst.y = rects->y1; if (y2 > rects->y2) y2 = rects->y2; if (r.dst.x < x2 && r.dst.y < y2) { DBG(("%s: blt=(%d, %d), (%d, %d)\n", __FUNCTION__, r.dst.x, r.dst.y, x2, y2)); r.width = x2 - r.dst.x; r.height = y2 - r.dst.y; r.src = r.mask = r .dst; tmp.blt(sna, &tmp, &r); apply_damage(&tmp, &r); } rects++; } while (--nrect); tmp.done(sna, &tmp); next_glyph: x += glyph->info.xOff; y += glyph->info.yOff; } list++; } return true; } static bool clear_pixmap(struct sna *sna, PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); return sna->render.clear(sna, pixmap, priv->gpu_bo); } static bool too_large(struct sna *sna, int width, int height) { return (width > sna->render.max_3d_size || height > sna->render.max_3d_size); } static pixman_image_t * __sna_glyph_get_image(GlyphPtr g, ScreenPtr s) { pixman_image_t *image; PicturePtr p; int dx, dy; DBG(("%s: creating image cache for glyph %p (on screen %d)\n", __FUNCTION__, g, s->myNum)); p = GetGlyphPicture(g, s); if (unlikely(p == NULL)) return NULL; image = image_from_pict(p, FALSE, &dx, &dy); if (!image) return NULL; assert(dx == 0 && dy == 0); return sna_glyph(g)->image = image; } static inline pixman_image_t * sna_glyph_get_image(GlyphPtr g, ScreenPtr s) { pixman_image_t *image; image = sna_glyph(g)->image; if (image == NULL) image = __sna_glyph_get_image(g, s); return image; } static inline bool use_small_mask(struct sna *sna, int16_t width, int16_t height, int depth) { if (FORCE_SMALL_MASK) return FORCE_SMALL_MASK > 0; if (depth * width * height < 8 * 4096) return true; return too_large(sna, width, height); } flatten static bool glyphs_via_mask(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr format, INT16 src_x, INT16 src_y, int nlist, GlyphListPtr list, GlyphPtr *glyphs) { ScreenPtr screen = dst->pDrawable->pScreen; CARD32 component_alpha; PixmapPtr pixmap; PicturePtr mask; int16_t x, y, width, height; int error; bool ret = false; BoxRec box; if (NO_GLYPHS_VIA_MASK) return false; DBG(("%s(op=%d, src=(%d, %d), nlist=%d, dst=(%d, %d)+(%d, %d))\n", __FUNCTION__, op, src_x, src_y, nlist, list->xOff, list->yOff, dst->pDrawable->x, dst->pDrawable->y)); glyph_extents(nlist, list, glyphs, &box); if (box.x2 <= box.x1 || box.y2 <= box.y1) return true; DBG(("%s: nlist=%d, count=%d, bounds=((%d, %d), (%d, %d))\n", __FUNCTION__, nlist, glyph_count(nlist, list), box.x1, box.y1, box.x2, box.y2)); if (!sna_compute_composite_extents(&box, src, NULL, dst, src_x, src_y, 0, 0, box.x1, box.y1, box.x2 - box.x1, box.y2 - box.y1)) return true; DBG(("%s: extents=((%d, %d), (%d, %d))\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2)); width = box.x2 - box.x1; height = box.y2 - box.y1; box.x1 -= dst->pDrawable->x; box.y1 -= dst->pDrawable->y; x = -box.x1; y = -box.y1; src_x += box.x1 - list->xOff; src_y += box.y1 - list->yOff; if (format->depth < 8) { format = PictureMatchFormat(screen, 8, PICT_a8); if (!format) return false; } component_alpha = NeedsComponent(format->format); if (use_small_mask(sna, width, height, format->depth)) { pixman_image_t *mask_image; use_small_mask: DBG(("%s: small mask [format=%lx, depth=%d, size=%d], rendering glyphs to upload buffer\n", __FUNCTION__, (unsigned long)format->format, format->depth, (uint32_t)width*height*format->depth)); pixmap = sna_pixmap_create_upload(screen, width, height, format->depth, KGEM_BUFFER_WRITE); if (!pixmap) return false; mask_image = pixman_image_create_bits(format->depth << 24 | format->format, width, height, pixmap->devPrivate.ptr, pixmap->devKind); if (mask_image == NULL) goto err_pixmap; if (sigtrap_get()) { pixman_image_unref(mask_image); goto err_pixmap; } memset(pixmap->devPrivate.ptr, 0, pixmap->devKind*height); #if HAS_PIXMAN_GLYPHS if (__global_glyph_cache) { pixman_glyph_t stack_glyphs[N_STACK_GLYPHS]; pixman_glyph_t *pglyphs = stack_glyphs; int count, n; count = 0; for (n = 0; n < nlist; ++n) count += list[n].len; if (count > N_STACK_GLYPHS) { pglyphs = malloc (count * sizeof(pixman_glyph_t)); if (pglyphs == NULL) goto err_pixmap; } pixman_glyph_cache_freeze(__global_glyph_cache); count = 0; do { n = list->len; x += list->xOff; y += list->yOff; while (n--) { GlyphPtr g = *glyphs++; const void *ptr; if (!glyph_valid(g)) goto next_pglyph; ptr = pixman_glyph_cache_lookup(__global_glyph_cache, g, NULL); if (ptr == NULL) { pixman_image_t *glyph_image; glyph_image = sna_glyph_get_image(g, screen); if (glyph_image == NULL) goto next_pglyph; DBG(("%s: inserting glyph %p into pixman cache\n", __FUNCTION__, g)); ptr = pixman_glyph_cache_insert(__global_glyph_cache, g, NULL, g->info.x, g->info.y, glyph_image); if (ptr == NULL) goto next_pglyph; } assert(sna_glyph_get_image(g, screen) != NULL); pglyphs[count].x = x; pglyphs[count].y = y; pglyphs[count].glyph = ptr; count++; next_pglyph: x += g->info.xOff; y += g->info.yOff; } list++; } while (--nlist); pixman_composite_glyphs_no_mask(PIXMAN_OP_ADD, sna->render.white_image, mask_image, 0, 0, 0, 0, __global_glyph_cache, count, pglyphs); pixman_glyph_cache_thaw(__global_glyph_cache); if (pglyphs != stack_glyphs) free(pglyphs); } else #endif do { int n = list->len; x += list->xOff; y += list->yOff; while (n--) { GlyphPtr g = *glyphs++; pixman_image_t *glyph_image; int16_t xi, yi; if (!glyph_valid(g)) goto next_image; /* If the mask has been cropped, it is likely * that some of the glyphs fall outside. */ xi = x - g->info.x; yi = y - g->info.y; if (xi >= width || yi >= height) goto next_image; if (xi + g->info.width <= 0 || yi + g->info.height <= 0) goto next_image; glyph_image = sna_glyph_get_image(g, dst->pDrawable->pScreen); if (glyph_image == NULL) goto next_image; DBG(("%s: glyph to mask (%d, %d)x(%d, %d)\n", __FUNCTION__, xi, yi, g->info.width, g->info.height)); if (list->format == format) { assert(pixman_image_get_format(glyph_image) == pixman_image_get_format(mask_image)); pixman_image_composite(PictOpAdd, glyph_image, NULL, mask_image, 0, 0, 0, 0, xi, yi, g->info.width, g->info.height); } else { pixman_image_composite(PictOpAdd, sna->render.white_image, glyph_image, mask_image, 0, 0, 0, 0, xi, yi, g->info.width, g->info.height); } next_image: x += g->info.xOff; y += g->info.yOff; } list++; } while (--nlist); pixman_image_unref(mask_image); sigtrap_put(); mask = CreatePicture(0, &pixmap->drawable, format, CPComponentAlpha, &component_alpha, serverClient, &error); if (!mask) goto err_pixmap; ValidatePicture(mask); } else { struct sna_composite_op tmp; PicturePtr glyph_atlas = NO_ATLAS; pixmap = screen->CreatePixmap(screen, width, height, format->depth, SNA_CREATE_SCRATCH); if (!pixmap) goto use_small_mask; assert(__sna_pixmap_get_bo(pixmap)); mask = CreatePicture(0, &pixmap->drawable, format, CPComponentAlpha, &component_alpha, serverClient, &error); if (!mask) goto err_pixmap; ValidatePicture(mask); if (!clear_pixmap(sna, pixmap)) goto err_mask; do { int n = list->len; x += list->xOff; y += list->yOff; while (n--) { GlyphPtr glyph = *glyphs++; struct sna_glyph *p = sna_glyph(glyph); struct sna_composite_rectangles r; if (unlikely(p->atlas != glyph_atlas)) { bool ok; if (unlikely(!glyph_valid(glyph))) goto next_glyph; if (glyph_atlas != NO_ATLAS) { tmp.done(sna, &tmp); glyph_atlas = NO_ATLAS; } if (unlikely(p->atlas == NULL)) { if (!glyph_cache(screen, &sna->render, glyph)) goto next_glyph; } DBG(("%s: atlas format=%08x, mask format=%08x\n", __FUNCTION__, (int)p->atlas->format, (int)(format->depth << 24 | format->format))); memset(&tmp, 0, sizeof(tmp)); if (p->atlas->format == (format->depth << 24 | format->format)) { ok = sna->render.composite(sna, PictOpAdd, p->atlas, NULL, mask, 0, 0, 0, 0, 0, 0, 0, 0, COMPOSITE_PARTIAL, &tmp); } else { ok = sna->render.composite(sna, PictOpAdd, sna->render.white_picture, p->atlas, mask, 0, 0, 0, 0, 0, 0, 0, 0, COMPOSITE_PARTIAL, &tmp); } if (!ok) { DBG(("%s: fallback -- can not handle PictOpAdd of glyph onto mask!\n", __FUNCTION__)); goto err_mask; } glyph_atlas = p->atlas; } DBG(("%s: blt glyph origin (%d, %d), offset (%d, %d), src (%d, %d), size (%d, %d)\n", __FUNCTION__, x, y, glyph->info.x, glyph->info.y, p->coordinate.x, p->coordinate.y, glyph->info.width, glyph->info.height)); r.mask = r.src = p->coordinate; r.dst.x = x - glyph->info.x; r.dst.y = y - glyph->info.y; glyph_copy_size(&r, glyph); tmp.blt(sna, &tmp, &r); next_glyph: x += glyph->info.xOff; y += glyph->info.yOff; } list++; } while (--nlist); if (glyph_atlas != NO_ATLAS) tmp.done(sna, &tmp); } sna_composite(op, src, mask, dst, src_x, src_y, 0, 0, box.x1, box.y1, width, height); ret = true; err_mask: FreePicture(mask, 0); err_pixmap: sna_pixmap_destroy(pixmap); return ret; } static PictFormatPtr glyphs_format(int nlist, GlyphListPtr list, GlyphPtr * glyphs) { PictFormatPtr format = list[0].format; int16_t x1, x2, y1, y2; int16_t x, y; BoxRec stack_extents[64], *list_extents = stack_extents; int i, j; if (nlist > ARRAY_SIZE(stack_extents)) { list_extents = malloc(sizeof(BoxRec) * nlist); if (list_extents == NULL) return NULL; } x = y = 0; i = 0; while (nlist--) { BoxRec extents; bool first = true; int n = list->len; /* Check the intersection of each glyph within the list and * then each list against the previous lists. * * If we overlap then we cannot substitute a mask as the * rendering will be altered. */ if (format->format != list->format->format) { DBG(("%s: switching formats from %x to %x\n", __FUNCTION__, (unsigned)format->format, (unsigned)list->format->format)); format = NULL; goto out; } x += list->xOff; y += list->yOff; list++; while (n--) { GlyphPtr glyph = *glyphs++; if (!glyph_valid(glyph)) goto skip_glyph; x1 = x - glyph->info.x; y1 = y - glyph->info.y; x2 = x1 + glyph->info.width; y2 = y1 + glyph->info.height; if (first) { extents.x1 = x1; extents.y1 = y1; extents.x2 = x2; extents.y2 = y2; first = false; } else { /* Potential overlap? * We cheat and ignore the boundary pixels, as * the likelihood of an actual overlap of * inkedk pixels being noticeable in the * boundary is small, yet glyphs frequently * overlap on the boundaries. */ if (x1 < extents.x2-GLYPH_TOLERANCE && x2 > extents.x1+GLYPH_TOLERANCE && y1 < extents.y2-GLYPH_TOLERANCE && y2 > extents.y1+GLYPH_TOLERANCE) { DBG(("%s: overlapping glyph inside line, current bbox (%d, %d), (%d, %d), glyph (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2, x1, y1, x2, y2)); format = NULL; goto out; } if (x1 < extents.x1) extents.x1 = x1; if (x2 > extents.x2) extents.x2 = x2; if (y1 < extents.y1) extents.y1 = y1; if (y2 > extents.y2) extents.y2 = y2; } skip_glyph: x += glyph->info.xOff; y += glyph->info.yOff; } /* Incrementally building a region is expensive. We expect * the number of lists to be small, so just keep a list * of the previous boxes and walk those. */ if (!first) { for (j = 0; j < i; j++) { if (extents.x1 < list_extents[j].x2-GLYPH_TOLERANCE && extents.x2 > list_extents[j].x1+GLYPH_TOLERANCE && extents.y1 < list_extents[j].y2-GLYPH_TOLERANCE && extents.y2 > list_extents[j].y1+GLYPH_TOLERANCE) { DBG(("%s: overlapping lines, current bbox (%d, %d), (%d, %d), previous line (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2, list_extents[j].x1, list_extents[j].y1, list_extents[j].x2, list_extents[j].y2)); format = NULL; goto out; } } list_extents[i++] = extents; } } out: if (list_extents != stack_extents) free(list_extents); return format; } static bool can_discard_mask(uint8_t op, PicturePtr src, PictFormatPtr mask, int nlist, GlyphListPtr list, GlyphPtr *glyphs) { PictFormatPtr g; uint32_t color; if (NO_DISCARD_MASK) return false; DBG(("%s: nlist=%d, mask=%08x, depth %d, op=%d (bounded? %d)\n", __FUNCTION__, nlist, mask ? (unsigned)mask->format : 0, mask ? mask->depth : 0, op, op_is_bounded(op))); if (nlist == 1 && list->len == 1) return true; if (!op_is_bounded(op)) return false; /* No glyphs overlap and we are not performing a mask conversion. */ g = glyphs_format(nlist, list, glyphs); if (mask == g) return true; DBG(("%s: preferred mask format %08x, depth %d\n", __FUNCTION__, g ? (unsigned)g->format : 0, g ? g->depth : 0)); /* Otherwise if the glyphs are all bitmaps and we have an * opaque source we can also render directly to the dst. */ if (g == NULL) { while (nlist--) { if (list->format->depth != 1) return false; list++; } } else { if (PICT_FORMAT_A(mask->format) >= PICT_FORMAT_A(g->format)) return true; if (g->depth != 1) return false; } if (!sna_picture_is_solid(src, &color)) return false; return color >> 24 == 0xff; } static void glyphs_fallback(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr mask_format, int src_x, int src_y, int nlist, GlyphListPtr list, GlyphPtr *glyphs) { struct sna *sna = to_sna_from_drawable(dst->pDrawable); pixman_image_t *src_image, *dst_image; int src_dx, src_dy; ScreenPtr screen = dst->pDrawable->pScreen; RegionRec region; int x, y, n; glyph_extents(nlist, list, glyphs, ®ion.extents); DBG(("%s: nlist=%d, count=%d, extents (%d, %d), (%d, %d)\n", __FUNCTION__, nlist, glyph_count(nlist, list), region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (region.extents.x2 <= region.extents.x1 || region.extents.y2 <= region.extents.y1) return; region.data = NULL; RegionTranslate(®ion, dst->pDrawable->x, dst->pDrawable->y); RegionIntersect(®ion, ®ion, dst->pCompositeClip); DBG(("%s: clipped extents (%d, %d), (%d, %d)\n", __FUNCTION__, RegionExtents(®ion)->x1, RegionExtents(®ion)->y1, RegionExtents(®ion)->x2, RegionExtents(®ion)->y2)); if (RegionNil(®ion)) return; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, ®ion, MOVE_READ | MOVE_WRITE)) return; if (dst->alphaMap && !sna_drawable_move_to_cpu(dst->alphaMap->pDrawable, MOVE_READ | MOVE_WRITE)) return; if (src->pDrawable) { if (!sna_drawable_move_to_cpu(src->pDrawable, MOVE_READ)) return; if (src->alphaMap && !sna_drawable_move_to_cpu(src->alphaMap->pDrawable, MOVE_READ)) return; } RegionTranslate(®ion, -dst->pDrawable->x, -dst->pDrawable->y); if (mask_format && can_discard_mask(op, src, mask_format, nlist, list, glyphs)) { DBG(("%s: discarding mask\n", __FUNCTION__)); mask_format = NULL; } #if HAS_PIXMAN_GLYPHS if (__global_glyph_cache) { pixman_glyph_t stack_glyphs[N_STACK_GLYPHS]; pixman_glyph_t *pglyphs = stack_glyphs; int dst_x = list->xOff, dst_y = list->yOff; int dst_dx, dst_dy, count; pixman_glyph_cache_freeze(__global_glyph_cache); count = 0; for (n = 0; n < nlist; ++n) count += list[n].len; if (count > N_STACK_GLYPHS) { pglyphs = malloc(count * sizeof(pixman_glyph_t)); if (pglyphs == NULL) goto out; } count = 0; x = y = 0; while (nlist--) { n = list->len; x += list->xOff; y += list->yOff; while (n--) { GlyphPtr g = *glyphs++; const void *ptr; if (!glyph_valid(g)) goto next; ptr = pixman_glyph_cache_lookup(__global_glyph_cache, g, NULL); if (ptr == NULL) { pixman_image_t *glyph_image; glyph_image = sna_glyph_get_image(g, screen); if (glyph_image == NULL) goto next; DBG(("%s: inserting glyph %p into pixman cache\n", __FUNCTION__, g)); ptr = pixman_glyph_cache_insert(__global_glyph_cache, g, NULL, g->info.x, g->info.y, glyph_image); if (ptr == NULL) goto next; } assert(sna_glyph_get_image(g, screen) != NULL); pglyphs[count].x = x; pglyphs[count].y = y; pglyphs[count].glyph = ptr; count++; next: x += g->info.xOff; y += g->info.yOff; } list++; } if (count == 0) goto out; src_image = image_from_pict(src, FALSE, &src_dx, &src_dy); if (src_image == NULL) goto out; dst_image = image_from_pict(dst, TRUE, &dst_dx, &dst_dy); if (dst_image == NULL) goto out_free_src; if (sigtrap_get() == 0) { if (mask_format) { pixman_composite_glyphs(op, src_image, dst_image, mask_format->format | (mask_format->depth << 24), src_x + src_dx + region.extents.x1 - dst_x, src_y + src_dy + region.extents.y1 - dst_y, region.extents.x1, region.extents.y1, region.extents.x1 + dst_dx, region.extents.y1 + dst_dy, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1, __global_glyph_cache, count, pglyphs); } else { pixman_composite_glyphs_no_mask(op, src_image, dst_image, src_x + src_dx - dst_x, src_y + src_dy - dst_y, dst_dx, dst_dy, __global_glyph_cache, count, pglyphs); } sigtrap_put(); } free_pixman_pict(dst, dst_image); out_free_src: free_pixman_pict(src, src_image); out: pixman_glyph_cache_thaw(__global_glyph_cache); if (pglyphs != stack_glyphs) free(pglyphs); } else #endif { pixman_image_t *mask_image; dst_image = image_from_pict(dst, TRUE, &x, &y); if (dst_image == NULL) goto cleanup_region; DBG(("%s: dst offset (%d, %d)\n", __FUNCTION__, x, y)); if (x | y) { region.extents.x1 += x; region.extents.x2 += x; region.extents.y1 += y; region.extents.y2 += y; } src_image = image_from_pict(src, FALSE, &src_dx, &src_dy); if (src_image == NULL) goto cleanup_dst; DBG(("%s: src offset (%d, %d)\n", __FUNCTION__, src_dx, src_dy)); src_x += src_dx - list->xOff; src_y += src_dy - list->yOff; if (mask_format) { DBG(("%s: create mask (%d, %d)x(%d,%d) + (%d,%d) + (%d,%d), depth=%d, format=%lx [%lx], ca? %d\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1, dst->pDrawable->x, dst->pDrawable->y, x, y, mask_format->depth, (long)mask_format->format, (long)(mask_format->depth << 24 | mask_format->format), NeedsComponent(mask_format->format))); mask_image = pixman_image_create_bits(mask_format->depth << 24 | mask_format->format, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1, NULL, 0); if (mask_image == NULL) goto cleanup_src; if (NeedsComponent(mask_format->format)) pixman_image_set_component_alpha(mask_image, TRUE); x -= region.extents.x1; y -= region.extents.y1; } else { mask_image = dst_image; src_x -= x - dst->pDrawable->x; src_y -= y - dst->pDrawable->y; } if (sigtrap_get() == 0) { do { n = list->len; x += list->xOff; y += list->yOff; while (n--) { GlyphPtr g = *glyphs++; pixman_image_t *glyph_image; if (!glyph_valid(g)) goto next_glyph; glyph_image = sna_glyph_get_image(g, screen); if (glyph_image == NULL) goto next_glyph; if (mask_format) { DBG(("%s: glyph to mask (%d, %d)x(%d, %d)\n", __FUNCTION__, x - g->info.x, y - g->info.y, g->info.width, g->info.height)); if (list->format == mask_format) { assert(pixman_image_get_format(glyph_image) == pixman_image_get_format(mask_image)); pixman_image_composite(PictOpAdd, glyph_image, NULL, mask_image, 0, 0, 0, 0, x - g->info.x, y - g->info.y, g->info.width, g->info.height); } else { pixman_image_composite(PictOpAdd, sna->render.white_image, glyph_image, mask_image, 0, 0, 0, 0, x - g->info.x, y - g->info.y, g->info.width, g->info.height); } } else { int xi = x - g->info.x; int yi = y - g->info.y; DBG(("%s: glyph to dst (%d, %d)x(%d, %d)/[(%d, %d)x(%d, %d)], src (%d, %d) [op=%d]\n", __FUNCTION__, xi, yi, g->info.width, g->info.height, dst->pDrawable->x, dst->pDrawable->y, dst->pDrawable->width, dst->pDrawable->height, src_x + xi, src_y + yi, op)); pixman_image_composite(op, src_image, glyph_image, dst_image, src_x + xi, src_y + yi, 0, 0, xi, yi, g->info.width, g->info.height); } next_glyph: x += g->info.xOff; y += g->info.yOff; } list++; } while (--nlist); sigtrap_put(); } if (mask_format) { DBG(("%s: glyph mask composite src=(%d+%d,%d+%d) dst=(%d, %d)x(%d, %d)\n", __FUNCTION__, src_x, region.extents.x1, src_y, region.extents.y1, region.extents.x1, region.extents.y1, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1)); pixman_image_composite(op, src_image, mask_image, dst_image, src_x, src_y, 0, 0, region.extents.x1, region.extents.y1, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1); pixman_image_unref(mask_image); } cleanup_src: free_pixman_pict(src, src_image); cleanup_dst: free_pixman_pict(dst, dst_image); } cleanup_region: RegionUninit(®ion); } void sna_glyphs(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr mask, INT16 src_x, INT16 src_y, int nlist, GlyphListPtr list, GlyphPtr *glyphs) { PixmapPtr pixmap = get_drawable_pixmap(dst->pDrawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; DBG(("%s(op=%d, nlist=%d, src=(%d, %d))\n", __FUNCTION__, op, nlist, src_x, src_y)); if (RegionNil(dst->pCompositeClip)) return; if (FALLBACK) goto fallback; if (!can_render(sna)) { DBG(("%s: wedged\n", __FUNCTION__)); goto fallback; } if (!can_render_to_picture(dst)) { DBG(("%s: fallback -- dst incompatible picture\n", __FUNCTION__)); goto fallback; } priv = sna_pixmap(pixmap); if (priv == NULL) { DBG(("%s: fallback -- destination unattached\n", __FUNCTION__)); goto fallback; } if (!is_gpu_dst(priv) && !picture_is_gpu(sna, src, 0)) { DBG(("%s: fallback -- too small (%dx%d)\n", __FUNCTION__, dst->pDrawable->width, dst->pDrawable->height)); goto fallback; } /* Try to discard the mask for non-overlapping glyphs */ if (FORCE_GLYPHS_TO_DST || mask == NULL || (dst->pCompositeClip->data == NULL && can_discard_mask(op, src, mask, nlist, list, glyphs))) { DBG(("%s: discarding mask\n", __FUNCTION__)); if (can_use_glyph0()) { if (glyphs0_to_dst(sna, op, src, dst, src_x, src_y, nlist, list, glyphs)) return; } else { if (glyphs_to_dst(sna, op, src, dst, src_x, src_y, nlist, list, glyphs)) return; } } /* Otherwise see if we can substitute a mask */ if (!mask) { mask = glyphs_format(nlist, list, glyphs); DBG(("%s: substituting mask? %d\n", __FUNCTION__, mask!=NULL)); } if (mask) { if (glyphs_via_mask(sna, op, src, dst, mask, src_x, src_y, nlist, list, glyphs)) return; } else { if (glyphs_slow(sna, op, src, dst, src_x, src_y, nlist, list, glyphs)) return; } fallback: glyphs_fallback(op, src, dst, mask, src_x, src_y, nlist, list, glyphs); } static bool glyphs_via_image(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr format, INT16 src_x, INT16 src_y, int nlist, GlyphListPtr list, GlyphPtr *glyphs) { ScreenPtr screen = dst->pDrawable->pScreen; CARD32 component_alpha; PixmapPtr pixmap; PicturePtr mask; int16_t x, y, width, height; pixman_image_t *mask_image; int error; bool ret = false; BoxRec box; if (NO_GLYPHS_VIA_MASK) return false; DBG(("%s(op=%d, src=(%d, %d), nlist=%d, dst=(%d, %d)+(%d, %d))\n", __FUNCTION__, op, src_x, src_y, nlist, list->xOff, list->yOff, dst->pDrawable->x, dst->pDrawable->y)); glyph_extents(nlist, list, glyphs, &box); if (box.x2 <= box.x1 || box.y2 <= box.y1) return true; DBG(("%s: nlist=%d, count=%d, bounds=((%d, %d), (%d, %d))\n", __FUNCTION__, nlist, glyph_count(nlist, list), box.x1, box.y1, box.x2, box.y2)); if (!sna_compute_composite_extents(&box, src, NULL, dst, src_x, src_y, 0, 0, box.x1, box.y1, box.x2 - box.x1, box.y2 - box.y1)) return true; DBG(("%s: extents=((%d, %d), (%d, %d))\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2)); width = box.x2 - box.x1; height = box.y2 - box.y1; box.x1 -= dst->pDrawable->x; box.y1 -= dst->pDrawable->y; x = -box.x1; y = -box.y1; src_x += box.x1 - list->xOff; src_y += box.y1 - list->yOff; if (format->depth < 8) { format = PictureMatchFormat(screen, 8, PICT_a8); if (!format) return false; } DBG(("%s: small mask [format=%lx, depth=%d, size=%d], rendering glyphs to upload buffer\n", __FUNCTION__, (unsigned long)format->format, format->depth, (uint32_t)width*height*format->depth)); pixmap = sna_pixmap_create_upload(screen, width, height, format->depth, KGEM_BUFFER_WRITE); if (!pixmap) return false; mask_image = pixman_image_create_bits(format->depth << 24 | format->format, width, height, pixmap->devPrivate.ptr, pixmap->devKind); if (mask_image == NULL) goto err_pixmap; if (sigtrap_get()) { pixman_image_unref(mask_image); goto err_pixmap; } memset(pixmap->devPrivate.ptr, 0, pixmap->devKind*height); #if HAS_PIXMAN_GLYPHS if (__global_glyph_cache) { pixman_glyph_t stack_glyphs[N_STACK_GLYPHS]; pixman_glyph_t *pglyphs = stack_glyphs; int count, n; count = 0; for (n = 0; n < nlist; ++n) count += list[n].len; if (count > N_STACK_GLYPHS) { pglyphs = malloc(count * sizeof(pixman_glyph_t)); if (pglyphs == NULL) goto err_pixmap; } pixman_glyph_cache_freeze(__global_glyph_cache); count = 0; do { n = list->len; x += list->xOff; y += list->yOff; while (n--) { GlyphPtr g = *glyphs++; const void *ptr; if (!glyph_valid(g)) goto next_pglyph; ptr = pixman_glyph_cache_lookup(__global_glyph_cache, g, NULL); if (ptr == NULL) { pixman_image_t *glyph_image; glyph_image = sna_glyph_get_image(g, screen); if (glyph_image == NULL) goto next_pglyph; DBG(("%s: inserting glyph %p into pixman cache\n", __FUNCTION__, g)); ptr = pixman_glyph_cache_insert(__global_glyph_cache, g, NULL, g->info.x, g->info.y, glyph_image); if (ptr == NULL) goto next_pglyph; } assert(sna_glyph_get_image(g, screen) != NULL); pglyphs[count].x = x; pglyphs[count].y = y; pglyphs[count].glyph = ptr; count++; next_pglyph: x += g->info.xOff; y += g->info.yOff; } list++; } while (--nlist); pixman_composite_glyphs_no_mask(PIXMAN_OP_ADD, sna->render.white_image, mask_image, 0, 0, 0, 0, __global_glyph_cache, count, pglyphs); pixman_glyph_cache_thaw(__global_glyph_cache); if (pglyphs != stack_glyphs) free(pglyphs); } else #endif do { int n = list->len; x += list->xOff; y += list->yOff; while (n--) { GlyphPtr g = *glyphs++; pixman_image_t *glyph_image; int16_t xi, yi; if (!glyph_valid(g)) goto next_image; /* If the mask has been cropped, it is likely * that some of the glyphs fall outside. */ xi = x - g->info.x; yi = y - g->info.y; if (xi >= width || yi >= height) goto next_image; if (xi + g->info.width <= 0 || yi + g->info.height <= 0) goto next_image; glyph_image = sna_glyph_get_image(g, screen); if (glyph_image == NULL) goto next_image; DBG(("%s: glyph to mask (%d, %d)x(%d, %d)\n", __FUNCTION__, xi, yi, g->info.width, g->info.height)); if (list->format == format) { assert(pixman_image_get_format(glyph_image) == pixman_image_get_format(mask_image)); pixman_image_composite(PictOpAdd, glyph_image, NULL, mask_image, 0, 0, 0, 0, xi, yi, g->info.width, g->info.height); } else { pixman_image_composite(PictOpAdd, sna->render.white_image, glyph_image, mask_image, 0, 0, 0, 0, xi, yi, g->info.width, g->info.height); } next_image: x += g->info.xOff; y += g->info.yOff; } list++; } while (--nlist); pixman_image_unref(mask_image); sigtrap_put(); component_alpha = NeedsComponent(format->format); mask = CreatePicture(0, &pixmap->drawable, format, CPComponentAlpha, &component_alpha, serverClient, &error); if (!mask) goto err_pixmap; ValidatePicture(mask); sna_composite(op, src, mask, dst, src_x, src_y, 0, 0, box.x1, box.y1, width, height); FreePicture(mask, 0); ret = true; err_pixmap: sna_pixmap_destroy(pixmap); return ret; } void sna_glyphs__shared(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr mask, INT16 src_x, INT16 src_y, int nlist, GlyphListPtr list, GlyphPtr *glyphs) { PixmapPtr pixmap = get_drawable_pixmap(dst->pDrawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; DBG(("%s(op=%d, nlist=%d, src=(%d, %d))\n", __FUNCTION__, op, nlist, src_x, src_y)); if (RegionNil(dst->pCompositeClip)) return; if (FALLBACK) goto fallback; if (!can_render(sna)) { DBG(("%s: wedged\n", __FUNCTION__)); goto fallback; } if (!can_render_to_picture(dst)) { DBG(("%s: fallback -- incompatible picture\n", __FUNCTION__)); goto fallback; } priv = sna_pixmap(pixmap); if (priv == NULL) { DBG(("%s: fallback -- destination unattached\n", __FUNCTION__)); goto fallback; } if (!is_gpu_dst(priv) && !picture_is_gpu(sna, src, 0)) { DBG(("%s: fallback -- too small (%dx%d)\n", __FUNCTION__, dst->pDrawable->width, dst->pDrawable->height)); goto fallback; } if (!mask) { mask = glyphs_format(nlist, list, glyphs); DBG(("%s: substituting mask? %d\n", __FUNCTION__, mask!=NULL)); } if (mask) { if (glyphs_via_image(sna, op, src, dst, mask, src_x, src_y, nlist, list, glyphs)) return; } fallback: glyphs_fallback(op, src, dst, mask, src_x, src_y, nlist, list, glyphs); } void sna_glyph_unrealize(ScreenPtr screen, GlyphPtr glyph) { struct sna_glyph *p = sna_glyph(glyph); DBG(("%s: screen=%d, glyph=%p (image?=%d, atlas?=%d)\n", __FUNCTION__, screen->myNum, glyph, !!p->image, p->atlas && p->atlas != GetGlyphPicture(glyph, screen))); if (p->image) { #if HAS_PIXMAN_GLYPHS if (__global_glyph_cache) { DBG(("%s: removing glyph %p from pixman cache\n", __FUNCTION__, glyph)); pixman_glyph_cache_remove(__global_glyph_cache, glyph, NULL); } #endif pixman_image_unref(p->image); p->image = NULL; } if (p->atlas && p->atlas != GetGlyphPicture(glyph, screen)) { struct sna *sna = to_sna_from_screen(screen); struct sna_glyph_cache *cache = &sna->render.glyph[p->pos&1]; DBG(("%s: releasing glyph pos %d from cache %d\n", __FUNCTION__, p->pos >> 1, p->pos & 1)); assert(cache->glyphs[p->pos >> 1] == p); cache->glyphs[p->pos >> 1] = NULL; p->atlas = NULL; } #if HAS_PIXMAN_GLYPHS assert(__global_glyph_cache == NULL || pixman_glyph_cache_lookup(__global_glyph_cache, glyph, NULL) == NULL); #endif } xf86-video-intel-2.99.917/src/sna/blt.c0000664000175000017500000007044612400044327014233 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #if __x86_64__ #define USE_SSE2 1 #endif #if USE_SSE2 #include #if __x86_64__ #define have_sse2() 1 #else enum { MMX = 0x1, MMX_EXTENSIONS = 0x2, SSE = 0x6, SSE2 = 0x8, CMOV = 0x10 }; #ifdef __GNUC__ static unsigned int detect_cpu_features(void) { unsigned int features; unsigned int result = 0; char vendor[13]; vendor[0] = 0; vendor[12] = 0; asm ( "pushf\n" "pop %%eax\n" "mov %%eax, %%ecx\n" "xor $0x00200000, %%eax\n" "push %%eax\n" "popf\n" "pushf\n" "pop %%eax\n" "mov $0x0, %%edx\n" "xor %%ecx, %%eax\n" "jz 1f\n" "mov $0x00000000, %%eax\n" "push %%ebx\n" "cpuid\n" "mov %%ebx, %%eax\n" "pop %%ebx\n" "mov %%eax, %1\n" "mov %%edx, %2\n" "mov %%ecx, %3\n" "mov $0x00000001, %%eax\n" "push %%ebx\n" "cpuid\n" "pop %%ebx\n" "1:\n" "mov %%edx, %0\n" : "=r" (result), "=m" (vendor[0]), "=m" (vendor[4]), "=m" (vendor[8]) :: "%eax", "%ecx", "%edx"); features = 0; if (result) { /* result now contains the standard feature bits */ if (result & (1 << 15)) features |= CMOV; if (result & (1 << 23)) features |= MMX; if (result & (1 << 25)) features |= SSE; if (result & (1 << 26)) features |= SSE2; } return features; } #else static unsigned int detect_cpu_features(void) { return 0; } #endif static bool have_sse2(void) { static int sse2_present = -1; if (sse2_present == -1) sse2_present = detect_cpu_features() & SSE2; return sse2_present; } #endif static inline __m128i xmm_create_mask_32(uint32_t mask) { return _mm_set_epi32(mask, mask, mask, mask); } static inline __m128i xmm_load_128u(const __m128i *src) { return _mm_loadu_si128(src); } static inline void xmm_save_128(__m128i *dst, __m128i data) { _mm_store_si128(dst, data); } #endif fast void memcpy_blt(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { const uint8_t *src_bytes; uint8_t *dst_bytes; int byte_width; assert(src); assert(dst); assert(width && height); assert(bpp >= 8); assert(width*bpp <= 8*src_stride); assert(width*bpp <= 8*dst_stride); DBG(("%s: src=(%d, %d), dst=(%d, %d), size=%dx%d, pitch=%d/%d\n", __FUNCTION__, src_x, src_y, dst_x, dst_y, width, height, src_stride, dst_stride)); bpp /= 8; src_bytes = (const uint8_t *)src + src_stride * src_y + src_x * bpp; dst_bytes = (uint8_t *)dst + dst_stride * dst_y + dst_x * bpp; byte_width = width * bpp; if (byte_width == src_stride && byte_width == dst_stride) { byte_width *= height; height = 1; } switch (byte_width) { case 1: do { *dst_bytes = *src_bytes; src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); break; case 2: do { *(uint16_t *)dst_bytes = *(const uint16_t *)src_bytes; src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); break; case 4: do { *(uint32_t *)dst_bytes = *(const uint32_t *)src_bytes; src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); break; case 8: do { *(uint64_t *)dst_bytes = *(const uint64_t *)src_bytes; src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); break; case 16: do { ((uint64_t *)dst_bytes)[0] = ((const uint64_t *)src_bytes)[0]; ((uint64_t *)dst_bytes)[1] = ((const uint64_t *)src_bytes)[1]; src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); break; default: do { memcpy(dst_bytes, src_bytes, byte_width); src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); break; } } static fast_memcpy void memcpy_to_tiled_x__swizzle_0(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { const unsigned tile_width = 512; const unsigned tile_height = 8; const unsigned tile_size = 4096; const unsigned cpp = bpp / 8; const unsigned tile_pixels = tile_width / cpp; const unsigned tile_shift = ffs(tile_pixels) - 1; const unsigned tile_mask = tile_pixels - 1; DBG(("%s(bpp=%d): src=(%d, %d), dst=(%d, %d), size=%dx%d, pitch=%d/%d\n", __FUNCTION__, bpp, src_x, src_y, dst_x, dst_y, width, height, src_stride, dst_stride)); assert(src != dst); if (src_x | src_y) src = (const uint8_t *)src + src_y * src_stride + src_x * cpp; assert(src_stride >= width * cpp); src_stride -= width * cpp; while (height--) { unsigned w = width * cpp; uint8_t *tile_row = dst; tile_row += dst_y / tile_height * dst_stride * tile_height; tile_row += (dst_y & (tile_height-1)) * tile_width; if (dst_x) { tile_row += (dst_x >> tile_shift) * tile_size; if (dst_x & tile_mask) { const unsigned x = (dst_x & tile_mask) * cpp; const unsigned len = min(tile_width - x, w); memcpy(tile_row + x, src, len); tile_row += tile_size; src = (const uint8_t *)src + len; w -= len; } } while (w >= tile_width) { memcpy(tile_row, src, tile_width); tile_row += tile_size; src = (const uint8_t *)src + tile_width; w -= tile_width; } memcpy(tile_row, src, w); src = (const uint8_t *)src + src_stride + w; dst_y++; } } static fast_memcpy void memcpy_from_tiled_x__swizzle_0(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { const unsigned tile_width = 512; const unsigned tile_height = 8; const unsigned tile_size = 4096; const unsigned cpp = bpp / 8; const unsigned tile_pixels = tile_width / cpp; const unsigned tile_shift = ffs(tile_pixels) - 1; const unsigned tile_mask = tile_pixels - 1; DBG(("%s(bpp=%d): src=(%d, %d), dst=(%d, %d), size=%dx%d, pitch=%d/%d\n", __FUNCTION__, bpp, src_x, src_y, dst_x, dst_y, width, height, src_stride, dst_stride)); assert(src != dst); if (dst_x | dst_y) dst = (uint8_t *)dst + dst_y * dst_stride + dst_x * cpp; assert(dst_stride >= width * cpp); dst_stride -= width * cpp; while (height--) { unsigned w = width * cpp; const uint8_t *tile_row = src; tile_row += src_y / tile_height * src_stride * tile_height; tile_row += (src_y & (tile_height-1)) * tile_width; if (src_x) { tile_row += (src_x >> tile_shift) * tile_size; if (src_x & tile_mask) { const unsigned x = (src_x & tile_mask) * cpp; const unsigned len = min(tile_width - x, w); memcpy(dst, tile_row + x, len); tile_row += tile_size; dst = (uint8_t *)dst + len; w -= len; } } while (w >= tile_width) { memcpy(dst, tile_row, tile_width); tile_row += tile_size; dst = (uint8_t *)dst + tile_width; w -= tile_width; } memcpy(dst, tile_row, w); dst = (uint8_t *)dst + dst_stride + w; src_y++; } } fast_memcpy static void memcpy_to_tiled_x__swizzle_9(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { const unsigned tile_width = 512; const unsigned tile_height = 8; const unsigned tile_size = 4096; const unsigned cpp = bpp / 8; const unsigned stride_tiles = dst_stride / tile_width; const unsigned swizzle_pixels = 64 / cpp; const unsigned tile_pixels = ffs(tile_width / cpp) - 1; const unsigned tile_mask = (1 << tile_pixels) - 1; unsigned x, y; DBG(("%s(bpp=%d): src=(%d, %d), dst=(%d, %d), size=%dx%d, pitch=%d/%d\n", __FUNCTION__, bpp, src_x, src_y, dst_x, dst_y, width, height, src_stride, dst_stride)); src = (const uint8_t *)src + src_y * src_stride + src_x * cpp; for (y = 0; y < height; ++y) { const uint32_t dy = y + dst_y; const uint32_t tile_row = (dy / tile_height * stride_tiles * tile_size + (dy & (tile_height-1)) * tile_width); const uint8_t *src_row = (const uint8_t *)src + src_stride * y; uint32_t dx = dst_x, offset; x = width * cpp; if (dx & (swizzle_pixels - 1)) { const uint32_t swizzle_bound_pixels = ALIGN(dx + 1, swizzle_pixels); const uint32_t length = min(dst_x + width, swizzle_bound_pixels) - dx; offset = tile_row + (dx >> tile_pixels) * tile_size + (dx & tile_mask) * cpp; offset ^= (offset >> 3) & 64; memcpy((char *)dst + offset, src_row, length * cpp); src_row += length * cpp; x -= length * cpp; dx += length; } while (x >= 64) { offset = tile_row + (dx >> tile_pixels) * tile_size + (dx & tile_mask) * cpp; offset ^= (offset >> 3) & 64; memcpy((char *)dst + offset, src_row, 64); src_row += 64; x -= 64; dx += swizzle_pixels; } if (x) { offset = tile_row + (dx >> tile_pixels) * tile_size + (dx & tile_mask) * cpp; offset ^= (offset >> 3) & 64; memcpy((char *)dst + offset, src_row, x); } } } fast_memcpy static void memcpy_from_tiled_x__swizzle_9(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { const unsigned tile_width = 512; const unsigned tile_height = 8; const unsigned tile_size = 4096; const unsigned cpp = bpp / 8; const unsigned stride_tiles = src_stride / tile_width; const unsigned swizzle_pixels = 64 / cpp; const unsigned tile_pixels = ffs(tile_width / cpp) - 1; const unsigned tile_mask = (1 << tile_pixels) - 1; unsigned x, y; DBG(("%s(bpp=%d): src=(%d, %d), dst=(%d, %d), size=%dx%d, pitch=%d/%d\n", __FUNCTION__, bpp, src_x, src_y, dst_x, dst_y, width, height, src_stride, dst_stride)); dst = (uint8_t *)dst + dst_y * dst_stride + dst_x * cpp; for (y = 0; y < height; ++y) { const uint32_t sy = y + src_y; const uint32_t tile_row = (sy / tile_height * stride_tiles * tile_size + (sy & (tile_height-1)) * tile_width); uint8_t *dst_row = (uint8_t *)dst + dst_stride * y; uint32_t sx = src_x, offset; x = width * cpp; if (sx & (swizzle_pixels - 1)) { const uint32_t swizzle_bound_pixels = ALIGN(sx + 1, swizzle_pixels); const uint32_t length = min(src_x + width, swizzle_bound_pixels) - sx; offset = tile_row + (sx >> tile_pixels) * tile_size + (sx & tile_mask) * cpp; offset ^= (offset >> 3) & 64; memcpy(dst_row, (const char *)src + offset, length * cpp); dst_row += length * cpp; x -= length * cpp; sx += length; } while (x >= 64) { offset = tile_row + (sx >> tile_pixels) * tile_size + (sx & tile_mask) * cpp; offset ^= (offset >> 3) & 64; memcpy(dst_row, (const char *)src + offset, 64); dst_row += 64; x -= 64; sx += swizzle_pixels; } if (x) { offset = tile_row + (sx >> tile_pixels) * tile_size + (sx & tile_mask) * cpp; offset ^= (offset >> 3) & 64; memcpy(dst_row, (const char *)src + offset, x); } } } fast_memcpy static void memcpy_to_tiled_x__swizzle_9_10(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { const unsigned tile_width = 512; const unsigned tile_height = 8; const unsigned tile_size = 4096; const unsigned cpp = bpp / 8; const unsigned stride_tiles = dst_stride / tile_width; const unsigned swizzle_pixels = 64 / cpp; const unsigned tile_pixels = ffs(tile_width / cpp) - 1; const unsigned tile_mask = (1 << tile_pixels) - 1; unsigned x, y; DBG(("%s(bpp=%d): src=(%d, %d), dst=(%d, %d), size=%dx%d, pitch=%d/%d\n", __FUNCTION__, bpp, src_x, src_y, dst_x, dst_y, width, height, src_stride, dst_stride)); src = (const uint8_t *)src + src_y * src_stride + src_x * cpp; for (y = 0; y < height; ++y) { const uint32_t dy = y + dst_y; const uint32_t tile_row = (dy / tile_height * stride_tiles * tile_size + (dy & (tile_height-1)) * tile_width); const uint8_t *src_row = (const uint8_t *)src + src_stride * y; uint32_t dx = dst_x, offset; x = width * cpp; if (dx & (swizzle_pixels - 1)) { const uint32_t swizzle_bound_pixels = ALIGN(dx + 1, swizzle_pixels); const uint32_t length = min(dst_x + width, swizzle_bound_pixels) - dx; offset = tile_row + (dx >> tile_pixels) * tile_size + (dx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 1)) >> 3) & 64; memcpy((char *)dst + offset, src_row, length * cpp); src_row += length * cpp; x -= length * cpp; dx += length; } while (x >= 64) { offset = tile_row + (dx >> tile_pixels) * tile_size + (dx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 1)) >> 3) & 64; memcpy((char *)dst + offset, src_row, 64); src_row += 64; x -= 64; dx += swizzle_pixels; } if (x) { offset = tile_row + (dx >> tile_pixels) * tile_size + (dx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 1)) >> 3) & 64; memcpy((char *)dst + offset, src_row, x); } } } fast_memcpy static void memcpy_from_tiled_x__swizzle_9_10(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { const unsigned tile_width = 512; const unsigned tile_height = 8; const unsigned tile_size = 4096; const unsigned cpp = bpp / 8; const unsigned stride_tiles = src_stride / tile_width; const unsigned swizzle_pixels = 64 / cpp; const unsigned tile_pixels = ffs(tile_width / cpp) - 1; const unsigned tile_mask = (1 << tile_pixels) - 1; unsigned x, y; DBG(("%s(bpp=%d): src=(%d, %d), dst=(%d, %d), size=%dx%d, pitch=%d/%d\n", __FUNCTION__, bpp, src_x, src_y, dst_x, dst_y, width, height, src_stride, dst_stride)); dst = (uint8_t *)dst + dst_y * dst_stride + dst_x * cpp; for (y = 0; y < height; ++y) { const uint32_t sy = y + src_y; const uint32_t tile_row = (sy / tile_height * stride_tiles * tile_size + (sy & (tile_height-1)) * tile_width); uint8_t *dst_row = (uint8_t *)dst + dst_stride * y; uint32_t sx = src_x, offset; x = width * cpp; if (sx & (swizzle_pixels - 1)) { const uint32_t swizzle_bound_pixels = ALIGN(sx + 1, swizzle_pixels); const uint32_t length = min(src_x + width, swizzle_bound_pixels) - sx; offset = tile_row + (sx >> tile_pixels) * tile_size + (sx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 1)) >> 3) & 64; memcpy(dst_row, (const char *)src + offset, length * cpp); dst_row += length * cpp; x -= length * cpp; sx += length; } while (x >= 64) { offset = tile_row + (sx >> tile_pixels) * tile_size + (sx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 1)) >> 3) & 64; memcpy(dst_row, (const char *)src + offset, 64); dst_row += 64; x -= 64; sx += swizzle_pixels; } if (x) { offset = tile_row + (sx >> tile_pixels) * tile_size + (sx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 1)) >> 3) & 64; memcpy(dst_row, (const char *)src + offset, x); } } } fast_memcpy static void memcpy_to_tiled_x__swizzle_9_11(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { const unsigned tile_width = 512; const unsigned tile_height = 8; const unsigned tile_size = 4096; const unsigned cpp = bpp / 8; const unsigned stride_tiles = dst_stride / tile_width; const unsigned swizzle_pixels = 64 / cpp; const unsigned tile_pixels = ffs(tile_width / cpp) - 1; const unsigned tile_mask = (1 << tile_pixels) - 1; unsigned x, y; DBG(("%s(bpp=%d): src=(%d, %d), dst=(%d, %d), size=%dx%d, pitch=%d/%d\n", __FUNCTION__, bpp, src_x, src_y, dst_x, dst_y, width, height, src_stride, dst_stride)); src = (const uint8_t *)src + src_y * src_stride + src_x * cpp; for (y = 0; y < height; ++y) { const uint32_t dy = y + dst_y; const uint32_t tile_row = (dy / tile_height * stride_tiles * tile_size + (dy & (tile_height-1)) * tile_width); const uint8_t *src_row = (const uint8_t *)src + src_stride * y; uint32_t dx = dst_x, offset; x = width * cpp; if (dx & (swizzle_pixels - 1)) { const uint32_t swizzle_bound_pixels = ALIGN(dx + 1, swizzle_pixels); const uint32_t length = min(dst_x + width, swizzle_bound_pixels) - dx; offset = tile_row + (dx >> tile_pixels) * tile_size + (dx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 2)) >> 3) & 64; memcpy((char *)dst + offset, src_row, length * cpp); src_row += length * cpp; x -= length * cpp; dx += length; } while (x >= 64) { offset = tile_row + (dx >> tile_pixels) * tile_size + (dx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 2)) >> 3) & 64; memcpy((char *)dst + offset, src_row, 64); src_row += 64; x -= 64; dx += swizzle_pixels; } if (x) { offset = tile_row + (dx >> tile_pixels) * tile_size + (dx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 2)) >> 3) & 64; memcpy((char *)dst + offset, src_row, x); } } } fast_memcpy static void memcpy_from_tiled_x__swizzle_9_11(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { const unsigned tile_width = 512; const unsigned tile_height = 8; const unsigned tile_size = 4096; const unsigned cpp = bpp / 8; const unsigned stride_tiles = src_stride / tile_width; const unsigned swizzle_pixels = 64 / cpp; const unsigned tile_pixels = ffs(tile_width / cpp) - 1; const unsigned tile_mask = (1 << tile_pixels) - 1; unsigned x, y; DBG(("%s(bpp=%d): src=(%d, %d), dst=(%d, %d), size=%dx%d, pitch=%d/%d\n", __FUNCTION__, bpp, src_x, src_y, dst_x, dst_y, width, height, src_stride, dst_stride)); dst = (uint8_t *)dst + dst_y * dst_stride + dst_x * cpp; for (y = 0; y < height; ++y) { const uint32_t sy = y + src_y; const uint32_t tile_row = (sy / tile_height * stride_tiles * tile_size + (sy & (tile_height-1)) * tile_width); uint8_t *dst_row = (uint8_t *)dst + dst_stride * y; uint32_t sx = src_x, offset; x = width * cpp; if (sx & (swizzle_pixels - 1)) { const uint32_t swizzle_bound_pixels = ALIGN(sx + 1, swizzle_pixels); const uint32_t length = min(src_x + width, swizzle_bound_pixels) - sx; offset = tile_row + (sx >> tile_pixels) * tile_size + (sx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 2)) >> 3) & 64; memcpy(dst_row, (const char *)src + offset, length * cpp); dst_row += length * cpp; x -= length * cpp; sx += length; } while (x >= 64) { offset = tile_row + (sx >> tile_pixels) * tile_size + (sx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 2)) >> 3) & 64; memcpy(dst_row, (const char *)src + offset, 64); dst_row += 64; x -= 64; sx += swizzle_pixels; } if (x) { offset = tile_row + (sx >> tile_pixels) * tile_size + (sx & tile_mask) * cpp; offset ^= ((offset ^ (offset >> 2)) >> 3) & 64; memcpy(dst_row, (const char *)src + offset, x); } } } void choose_memcpy_tiled_x(struct kgem *kgem, int swizzling) { switch (swizzling) { default: DBG(("%s: unknown swizzling, %d\n", __FUNCTION__, swizzling)); break; case I915_BIT_6_SWIZZLE_NONE: DBG(("%s: no swizzling\n", __FUNCTION__)); kgem->memcpy_to_tiled_x = memcpy_to_tiled_x__swizzle_0; kgem->memcpy_from_tiled_x = memcpy_from_tiled_x__swizzle_0; break; case I915_BIT_6_SWIZZLE_9: DBG(("%s: 6^9 swizzling\n", __FUNCTION__)); kgem->memcpy_to_tiled_x = memcpy_to_tiled_x__swizzle_9; kgem->memcpy_from_tiled_x = memcpy_from_tiled_x__swizzle_9; break; case I915_BIT_6_SWIZZLE_9_10: DBG(("%s: 6^9^10 swizzling\n", __FUNCTION__)); kgem->memcpy_to_tiled_x = memcpy_to_tiled_x__swizzle_9_10; kgem->memcpy_from_tiled_x = memcpy_from_tiled_x__swizzle_9_10; break; case I915_BIT_6_SWIZZLE_9_11: DBG(("%s: 6^9^11 swizzling\n", __FUNCTION__)); kgem->memcpy_to_tiled_x = memcpy_to_tiled_x__swizzle_9_11; kgem->memcpy_from_tiled_x = memcpy_from_tiled_x__swizzle_9_11; break; } } void memmove_box(const void *src, void *dst, int bpp, int32_t stride, const BoxRec *box, int dx, int dy) { #define FORCE_MEMMOVE 0 union { uint8_t u8; uint16_t u16; uint32_t u32; uint64_t u64; } tmp; const uint8_t *src_bytes; uint8_t *dst_bytes; int width, height; assert(src); assert(dst); assert(src != dst); assert(bpp >= 8); assert(box->x2 > box->x1); assert(box->y2 > box->y1); DBG(("%s: box=(%d, %d), (%d, %d), pitch=%d, bpp=%d, dx=%d, dy=%d\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, stride, bpp, dx, dy)); bpp /= 8; width = box->y1 * stride + box->x1 * bpp; src_bytes = (const uint8_t *)src + width; dst_bytes = (uint8_t *)dst + width; assert(dst_bytes != src_bytes); width = (box->x2 - box->x1) * bpp; height = (box->y2 - box->y1); assert(width <= stride); if (width == stride) { width *= height; height = 1; } if (dy >= 0) { switch (width) { case 1: do { *dst_bytes = tmp.u8 = *src_bytes; src_bytes += stride; dst_bytes += stride; } while (--height); break; case 2: do { *(uint16_t *)dst_bytes = tmp.u16 = *(const uint16_t *)src_bytes; src_bytes += stride; dst_bytes += stride; } while (--height); break; case 4: do { *(uint32_t *)dst_bytes = tmp.u32 = *(const uint32_t *)src_bytes; src_bytes += stride; dst_bytes += stride; } while (--height); break; case 8: do { *(uint64_t *)dst_bytes = tmp.u64 = *(const uint64_t *)src_bytes; src_bytes += stride; dst_bytes += stride; } while (--height); break; default: if (FORCE_MEMMOVE || (dst_bytes < src_bytes + width && src_bytes < dst_bytes + width)) { do { memmove(dst_bytes, src_bytes, width); src_bytes += stride; dst_bytes += stride; } while (--height); } else { do { memcpy(dst_bytes, src_bytes, width); src_bytes += stride; dst_bytes += stride; } while (--height); } break; } } else { src_bytes += (height-1) * stride; dst_bytes += (height-1) * stride; switch (width) { case 1: do { *dst_bytes = tmp.u8 = *src_bytes; src_bytes -= stride; dst_bytes -= stride; } while (--height); break; case 2: do { *(uint16_t *)dst_bytes = tmp.u16 = *(const uint16_t *)src_bytes; src_bytes -= stride; dst_bytes -= stride; } while (--height); break; case 4: do { *(uint32_t *)dst_bytes = tmp.u32 = *(const uint32_t *)src_bytes; src_bytes -= stride; dst_bytes -= stride; } while (--height); break; case 8: do { *(uint64_t *)dst_bytes = tmp.u64 = *(const uint64_t *)src_bytes; src_bytes -= stride; dst_bytes -= stride; } while (--height); break; default: if (FORCE_MEMMOVE || (dst_bytes < src_bytes + width && src_bytes < dst_bytes + width)) { do { memmove(dst_bytes, src_bytes, width); src_bytes -= stride; dst_bytes -= stride; } while (--height); } else { do { memcpy(dst_bytes, src_bytes, width); src_bytes -= stride; dst_bytes -= stride; } while (--height); } break; } } } void memcpy_xor(const void *src, void *dst, int bpp, int32_t src_stride, int32_t dst_stride, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height, uint32_t and, uint32_t or) { const uint8_t *src_bytes; uint8_t *dst_bytes; int i, w; assert(width && height); assert(bpp >= 8); assert(width*bpp <= 8*src_stride); assert(width*bpp <= 8*dst_stride); DBG(("%s: src=(%d, %d), dst=(%d, %d), size=%dx%d, pitch=%d/%d, bpp=%d, and=%x, xor=%x\n", __FUNCTION__, src_x, src_y, dst_x, dst_y, width, height, src_stride, dst_stride, bpp, and, or)); bpp /= 8; src_bytes = (const uint8_t *)src + src_stride * src_y + src_x * bpp; dst_bytes = (uint8_t *)dst + dst_stride * dst_y + dst_x * bpp; if (and == 0xffffffff) { switch (bpp) { case 1: if (width & 1) { do { for (i = 0; i < width; i++) dst_bytes[i] = src_bytes[i] | or; src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); break; } else { width /= 2; or |= or << 8; } case 2: if (width & 1) { do { uint16_t *d = (uint16_t *)dst_bytes; const uint16_t *s = (const uint16_t *)src_bytes; for (i = 0; i < width; i++) d[i] = s[i] | or; src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); break; } else { width /= 2; or |= or << 16; } case 4: w = width; if (w * 4 == dst_stride && dst_stride == src_stride) { w *= height; height = 1; } #if USE_SSE2 if (have_sse2()) { do { uint32_t *d = (uint32_t *)dst_bytes; const uint32_t *s = (const uint32_t *)src_bytes; __m128i mask = xmm_create_mask_32(or); i = w; while (i && (uintptr_t)d & 15) { *d++ = *s++ | or; i--; } while (i >= 16) { __m128i xmm1, xmm2, xmm3, xmm4; xmm1 = xmm_load_128u((const __m128i*)s + 0); xmm2 = xmm_load_128u((const __m128i*)s + 1); xmm3 = xmm_load_128u((const __m128i*)s + 2); xmm4 = xmm_load_128u((const __m128i*)s + 3); xmm_save_128((__m128i*)d + 0, _mm_or_si128(xmm1, mask)); xmm_save_128((__m128i*)d + 1, _mm_or_si128(xmm2, mask)); xmm_save_128((__m128i*)d + 2, _mm_or_si128(xmm3, mask)); xmm_save_128((__m128i*)d + 3, _mm_or_si128(xmm4, mask)); d += 16; s += 16; i -= 16; } if (i & 8) { __m128i xmm1, xmm2; xmm1 = xmm_load_128u((const __m128i*)s + 0); xmm2 = xmm_load_128u((const __m128i*)s + 1); xmm_save_128((__m128i*)d + 0, _mm_or_si128(xmm1, mask)); xmm_save_128((__m128i*)d + 1, _mm_or_si128(xmm2, mask)); d += 8; s += 8; i -= 8; } if (i & 4) { xmm_save_128((__m128i*)d, _mm_or_si128(xmm_load_128u((const __m128i*)s), mask)); d += 4; s += 4; i -= 4; } while (i) { *d++ = *s++ | or; i--; } src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); } else #else do { uint32_t *d = (uint32_t *)dst_bytes; uint32_t *s = (uint32_t *)src_bytes; for (i = 0; i < w; i++) d[i] = s[i] | or; src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); #endif break; } } else { switch (bpp) { case 1: do { for (i = 0; i < width; i++) dst_bytes[i] = (src_bytes[i] & and) | or; src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); break; case 2: do { uint16_t *d = (uint16_t *)dst_bytes; const uint16_t *s = (const uint16_t *)src_bytes; for (i = 0; i < width; i++) d[i] = (s[i] & and) | or; src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); break; case 4: do { uint32_t *d = (uint32_t *)dst_bytes; const uint32_t *s = (const uint32_t *)src_bytes; for (i = 0; i < width; i++) d[i] = (s[i] & and) | or; src_bytes += src_stride; dst_bytes += dst_stride; } while (--height); break; } } } xf86-video-intel-2.99.917/src/sna/gen7_render.c0000664000175000017500000031655612432737457015700 00000000000000/* * Copyright © 2006,2008,2011 Intel Corporation * Copyright © 2007 Red Hat, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Wang Zhenyu * Eric Anholt * Carl Worth * Keith Packard * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_reg.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_video.h" #include "brw/brw.h" #include "gen7_render.h" #include "gen4_common.h" #include "gen4_source.h" #include "gen4_vertex.h" #include "gen6_common.h" #define ALWAYS_INVALIDATE 0 #define ALWAYS_FLUSH 0 #define ALWAYS_STALL 0 #define NO_COMPOSITE 0 #define NO_COMPOSITE_SPANS 0 #define NO_COPY 0 #define NO_COPY_BOXES 0 #define NO_FILL 0 #define NO_FILL_BOXES 0 #define NO_FILL_ONE 0 #define NO_FILL_CLEAR 0 #define NO_RING_SWITCH 0 #define USE_8_PIXEL_DISPATCH 1 #define USE_16_PIXEL_DISPATCH 1 #define USE_32_PIXEL_DISPATCH 0 #if !USE_8_PIXEL_DISPATCH && !USE_16_PIXEL_DISPATCH && !USE_32_PIXEL_DISPATCH #error "Must select at least 8, 16 or 32 pixel dispatch" #endif #define GEN7_MAX_SIZE 16384 /* XXX Todo * * STR (software tiled rendering) mode. No, really. * 64x32 pixel blocks align with the rendering cache. Worth considering. */ #define is_aligned(x, y) (((x) & ((y) - 1)) == 0) struct gt_info { const char *name; uint32_t max_vs_threads; uint32_t max_gs_threads; uint32_t max_wm_threads; struct { int size; int max_vs_entries; int max_gs_entries; int push_ps_size; /* in 1KBs */ } urb; int gt; uint32_t mocs; }; static const struct gt_info ivb_gt_info = { .name = "Ivybridge (gen7)", .max_vs_threads = 16, .max_gs_threads = 16, .max_wm_threads = (16-1) << IVB_PS_MAX_THREADS_SHIFT, .urb = { 128, 64, 64, 8 }, .gt = 0, }; static const struct gt_info ivb_gt1_info = { .name = "Ivybridge (gen7, gt1)", .max_vs_threads = 36, .max_gs_threads = 36, .max_wm_threads = (48-1) << IVB_PS_MAX_THREADS_SHIFT, .urb = { 128, 512, 192, 8 }, .gt = 1, .mocs = 3, }; static const struct gt_info ivb_gt2_info = { .name = "Ivybridge (gen7, gt2)", .max_vs_threads = 128, .max_gs_threads = 128, .max_wm_threads = (172-1) << IVB_PS_MAX_THREADS_SHIFT, .urb = { 256, 704, 320, 8 }, .gt = 2, .mocs = 3, }; static const struct gt_info byt_gt_info = { .name = "Baytrail (gen7)", .max_vs_threads = 36, .max_gs_threads = 36, .max_wm_threads = (48-1) << IVB_PS_MAX_THREADS_SHIFT, .urb = { 128, 512, 192, 8 }, .gt = 1, }; static const struct gt_info hsw_gt_info = { .name = "Haswell (gen7.5)", .max_vs_threads = 8, .max_gs_threads = 8, .max_wm_threads = (8 - 1) << HSW_PS_MAX_THREADS_SHIFT | 1 << HSW_PS_SAMPLE_MASK_SHIFT, .urb = { 128, 64, 64, 8 }, .gt = 0, }; static const struct gt_info hsw_gt1_info = { .name = "Haswell (gen7.5, gt1)", .max_vs_threads = 70, .max_gs_threads = 70, .max_wm_threads = (102 - 1) << HSW_PS_MAX_THREADS_SHIFT | 1 << HSW_PS_SAMPLE_MASK_SHIFT, .urb = { 128, 640, 256, 8 }, .gt = 1, .mocs = 5, }; static const struct gt_info hsw_gt2_info = { .name = "Haswell (gen7.5, gt2)", .max_vs_threads = 140, .max_gs_threads = 140, .max_wm_threads = (140 - 1) << HSW_PS_MAX_THREADS_SHIFT | 1 << HSW_PS_SAMPLE_MASK_SHIFT, .urb = { 256, 1664, 640, 8 }, .gt = 2, .mocs = 5, }; static const struct gt_info hsw_gt3_info = { .name = "Haswell (gen7.5, gt3)", .max_vs_threads = 280, .max_gs_threads = 280, .max_wm_threads = (280 - 1) << HSW_PS_MAX_THREADS_SHIFT | 1 << HSW_PS_SAMPLE_MASK_SHIFT, .urb = { 512, 3328, 1280, 16 }, .gt = 3, .mocs = 5, }; inline static bool is_ivb(struct sna *sna) { return sna->kgem.gen == 070; } inline static bool is_byt(struct sna *sna) { return sna->kgem.gen == 071; } inline static bool is_hsw(struct sna *sna) { return sna->kgem.gen == 075; } static const uint32_t ps_kernel_packed[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_yuv_rgb.g7b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_planar[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_planar.g7b" #include "exa_wm_yuv_rgb.g7b" #include "exa_wm_write.g7b" }; #define KERNEL(kernel_enum, kernel, num_surfaces) \ [GEN7_WM_KERNEL_##kernel_enum] = {#kernel_enum, kernel, sizeof(kernel), num_surfaces} #define NOKERNEL(kernel_enum, func, num_surfaces) \ [GEN7_WM_KERNEL_##kernel_enum] = {#kernel_enum, (void *)func, 0, num_surfaces} static const struct wm_kernel_info { const char *name; const void *data; unsigned int size; int num_surfaces; } wm_kernels[] = { NOKERNEL(NOMASK, brw_wm_kernel__affine, 2), NOKERNEL(NOMASK_P, brw_wm_kernel__projective, 2), NOKERNEL(MASK, brw_wm_kernel__affine_mask, 3), NOKERNEL(MASK_P, brw_wm_kernel__projective_mask, 3), NOKERNEL(MASKCA, brw_wm_kernel__affine_mask_ca, 3), NOKERNEL(MASKCA_P, brw_wm_kernel__projective_mask_ca, 3), NOKERNEL(MASKSA, brw_wm_kernel__affine_mask_sa, 3), NOKERNEL(MASKSA_P, brw_wm_kernel__projective_mask_sa, 3), NOKERNEL(OPACITY, brw_wm_kernel__affine_opacity, 2), NOKERNEL(OPACITY_P, brw_wm_kernel__projective_opacity, 2), KERNEL(VIDEO_PLANAR, ps_kernel_planar, 7), KERNEL(VIDEO_PACKED, ps_kernel_packed, 2), }; #undef KERNEL static const struct blendinfo { bool src_alpha; uint32_t src_blend; uint32_t dst_blend; } gen7_blend_op[] = { /* Clear */ {0, GEN7_BLENDFACTOR_ZERO, GEN7_BLENDFACTOR_ZERO}, /* Src */ {0, GEN7_BLENDFACTOR_ONE, GEN7_BLENDFACTOR_ZERO}, /* Dst */ {0, GEN7_BLENDFACTOR_ZERO, GEN7_BLENDFACTOR_ONE}, /* Over */ {1, GEN7_BLENDFACTOR_ONE, GEN7_BLENDFACTOR_INV_SRC_ALPHA}, /* OverReverse */ {0, GEN7_BLENDFACTOR_INV_DST_ALPHA, GEN7_BLENDFACTOR_ONE}, /* In */ {0, GEN7_BLENDFACTOR_DST_ALPHA, GEN7_BLENDFACTOR_ZERO}, /* InReverse */ {1, GEN7_BLENDFACTOR_ZERO, GEN7_BLENDFACTOR_SRC_ALPHA}, /* Out */ {0, GEN7_BLENDFACTOR_INV_DST_ALPHA, GEN7_BLENDFACTOR_ZERO}, /* OutReverse */ {1, GEN7_BLENDFACTOR_ZERO, GEN7_BLENDFACTOR_INV_SRC_ALPHA}, /* Atop */ {1, GEN7_BLENDFACTOR_DST_ALPHA, GEN7_BLENDFACTOR_INV_SRC_ALPHA}, /* AtopReverse */ {1, GEN7_BLENDFACTOR_INV_DST_ALPHA, GEN7_BLENDFACTOR_SRC_ALPHA}, /* Xor */ {1, GEN7_BLENDFACTOR_INV_DST_ALPHA, GEN7_BLENDFACTOR_INV_SRC_ALPHA}, /* Add */ {0, GEN7_BLENDFACTOR_ONE, GEN7_BLENDFACTOR_ONE}, }; /** * Highest-valued BLENDFACTOR used in gen7_blend_op. * * This leaves out GEN7_BLENDFACTOR_INV_DST_COLOR, * GEN7_BLENDFACTOR_INV_CONST_{COLOR,ALPHA}, * GEN7_BLENDFACTOR_INV_SRC1_{COLOR,ALPHA} */ #define GEN7_BLENDFACTOR_COUNT (GEN7_BLENDFACTOR_INV_DST_ALPHA + 1) #define GEN7_BLEND_STATE_PADDED_SIZE ALIGN(sizeof(struct gen7_blend_state), 64) #define BLEND_OFFSET(s, d) \ ((d != GEN7_BLENDFACTOR_ZERO) << 15 | \ (((s) * GEN7_BLENDFACTOR_COUNT + (d)) * GEN7_BLEND_STATE_PADDED_SIZE)) #define NO_BLEND BLEND_OFFSET(GEN7_BLENDFACTOR_ONE, GEN7_BLENDFACTOR_ZERO) #define CLEAR BLEND_OFFSET(GEN7_BLENDFACTOR_ZERO, GEN7_BLENDFACTOR_ZERO) #define SAMPLER_OFFSET(sf, se, mf, me) \ ((((((sf) * EXTEND_COUNT + (se)) * FILTER_COUNT + (mf)) * EXTEND_COUNT + (me)) + 2) * 2 * sizeof(struct gen7_sampler_state)) #define VERTEX_2s2s 0 #define COPY_SAMPLER 0 #define COPY_VERTEX VERTEX_2s2s #define COPY_FLAGS(a) GEN7_SET_FLAGS(COPY_SAMPLER, (a) == GXcopy ? NO_BLEND : CLEAR, GEN7_WM_KERNEL_NOMASK, COPY_VERTEX) #define FILL_SAMPLER (2 * sizeof(struct gen7_sampler_state)) #define FILL_VERTEX VERTEX_2s2s #define FILL_FLAGS(op, format) GEN7_SET_FLAGS(FILL_SAMPLER, gen7_get_blend((op), false, (format)), GEN7_WM_KERNEL_NOMASK, FILL_VERTEX) #define FILL_FLAGS_NOBLEND GEN7_SET_FLAGS(FILL_SAMPLER, NO_BLEND, GEN7_WM_KERNEL_NOMASK, FILL_VERTEX) #define GEN7_SAMPLER(f) (((f) >> 16) & 0xfff0) #define GEN7_BLEND(f) (((f) >> 0) & 0x7ff0) #define GEN7_READS_DST(f) (((f) >> 15) & 1) #define GEN7_KERNEL(f) (((f) >> 16) & 0xf) #define GEN7_VERTEX(f) (((f) >> 0) & 0xf) #define GEN7_SET_FLAGS(S, B, K, V) (((S) | (K)) << 16 | ((B) | (V))) #define OUT_BATCH(v) batch_emit(sna, v) #define OUT_VERTEX(x,y) vertex_emit_2s(sna, x,y) #define OUT_VERTEX_F(v) vertex_emit(sna, v) static inline bool too_large(int width, int height) { return width > GEN7_MAX_SIZE || height > GEN7_MAX_SIZE; } static uint32_t gen7_get_blend(int op, bool has_component_alpha, uint32_t dst_format) { uint32_t src, dst; src = gen7_blend_op[op].src_blend; dst = gen7_blend_op[op].dst_blend; /* If there's no dst alpha channel, adjust the blend op so that * we'll treat it always as 1. */ if (PICT_FORMAT_A(dst_format) == 0) { if (src == GEN7_BLENDFACTOR_DST_ALPHA) src = GEN7_BLENDFACTOR_ONE; else if (src == GEN7_BLENDFACTOR_INV_DST_ALPHA) src = GEN7_BLENDFACTOR_ZERO; } /* If the source alpha is being used, then we should only be in a * case where the source blend factor is 0, and the source blend * value is the mask channels multiplied by the source picture's alpha. */ if (has_component_alpha && gen7_blend_op[op].src_alpha) { if (dst == GEN7_BLENDFACTOR_SRC_ALPHA) dst = GEN7_BLENDFACTOR_SRC_COLOR; else if (dst == GEN7_BLENDFACTOR_INV_SRC_ALPHA) dst = GEN7_BLENDFACTOR_INV_SRC_COLOR; } DBG(("blend op=%d, dst=%x [A=%d] => src=%d, dst=%d => offset=%x\n", op, dst_format, PICT_FORMAT_A(dst_format), src, dst, (int)BLEND_OFFSET(src, dst))); return BLEND_OFFSET(src, dst); } static uint32_t gen7_get_card_format(PictFormat format) { switch (format) { default: return -1; case PICT_a8r8g8b8: return GEN7_SURFACEFORMAT_B8G8R8A8_UNORM; case PICT_x8r8g8b8: return GEN7_SURFACEFORMAT_B8G8R8X8_UNORM; case PICT_a8b8g8r8: return GEN7_SURFACEFORMAT_R8G8B8A8_UNORM; case PICT_x8b8g8r8: return GEN7_SURFACEFORMAT_R8G8B8X8_UNORM; #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: return GEN7_SURFACEFORMAT_B10G10R10A2_UNORM; case PICT_x2r10g10b10: return GEN7_SURFACEFORMAT_B10G10R10X2_UNORM; #endif case PICT_r8g8b8: return GEN7_SURFACEFORMAT_R8G8B8_UNORM; case PICT_r5g6b5: return GEN7_SURFACEFORMAT_B5G6R5_UNORM; case PICT_a1r5g5b5: return GEN7_SURFACEFORMAT_B5G5R5A1_UNORM; case PICT_a8: return GEN7_SURFACEFORMAT_A8_UNORM; case PICT_a4r4g4b4: return GEN7_SURFACEFORMAT_B4G4R4A4_UNORM; } } static uint32_t gen7_get_dest_format(PictFormat format) { switch (format) { default: return -1; case PICT_a8r8g8b8: case PICT_x8r8g8b8: return GEN7_SURFACEFORMAT_B8G8R8A8_UNORM; case PICT_a8b8g8r8: case PICT_x8b8g8r8: return GEN7_SURFACEFORMAT_R8G8B8A8_UNORM; #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: case PICT_x2r10g10b10: return GEN7_SURFACEFORMAT_B10G10R10A2_UNORM; #endif case PICT_r5g6b5: return GEN7_SURFACEFORMAT_B5G6R5_UNORM; case PICT_x1r5g5b5: case PICT_a1r5g5b5: return GEN7_SURFACEFORMAT_B5G5R5A1_UNORM; case PICT_a8: return GEN7_SURFACEFORMAT_A8_UNORM; case PICT_a4r4g4b4: case PICT_x4r4g4b4: return GEN7_SURFACEFORMAT_B4G4R4A4_UNORM; } } static bool gen7_check_dst_format(PictFormat format) { if (gen7_get_dest_format(format) != -1) return true; DBG(("%s: unhandled format: %x\n", __FUNCTION__, (int)format)); return false; } static bool gen7_check_format(uint32_t format) { if (gen7_get_card_format(format) != -1) return true; DBG(("%s: unhandled format: %x\n", __FUNCTION__, (int)format)); return false; } static uint32_t gen7_filter(uint32_t filter) { switch (filter) { default: assert(0); case PictFilterNearest: return SAMPLER_FILTER_NEAREST; case PictFilterBilinear: return SAMPLER_FILTER_BILINEAR; } } static uint32_t gen7_check_filter(PicturePtr picture) { switch (picture->filter) { case PictFilterNearest: case PictFilterBilinear: return true; default: return false; } } static uint32_t gen7_repeat(uint32_t repeat) { switch (repeat) { default: assert(0); case RepeatNone: return SAMPLER_EXTEND_NONE; case RepeatNormal: return SAMPLER_EXTEND_REPEAT; case RepeatPad: return SAMPLER_EXTEND_PAD; case RepeatReflect: return SAMPLER_EXTEND_REFLECT; } } static bool gen7_check_repeat(PicturePtr picture) { if (!picture->repeat) return true; switch (picture->repeatType) { case RepeatNone: case RepeatNormal: case RepeatPad: case RepeatReflect: return true; default: return false; } } static int gen7_choose_composite_kernel(int op, bool has_mask, bool is_ca, bool is_affine) { int base; if (has_mask) { if (is_ca) { if (gen7_blend_op[op].src_alpha) base = GEN7_WM_KERNEL_MASKSA; else base = GEN7_WM_KERNEL_MASKCA; } else base = GEN7_WM_KERNEL_MASK; } else base = GEN7_WM_KERNEL_NOMASK; return base + !is_affine; } static void gen7_emit_urb(struct sna *sna) { OUT_BATCH(GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS | (2 - 2)); OUT_BATCH(sna->render_state.gen7.info->urb.push_ps_size); /* num of VS entries must be divisible by 8 if size < 9 */ OUT_BATCH(GEN7_3DSTATE_URB_VS | (2 - 2)); OUT_BATCH((sna->render_state.gen7.info->urb.max_vs_entries << GEN7_URB_ENTRY_NUMBER_SHIFT) | (2 - 1) << GEN7_URB_ENTRY_SIZE_SHIFT | (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_HS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_DS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (2 << GEN7_URB_STARTING_ADDRESS_SHIFT)); OUT_BATCH(GEN7_3DSTATE_URB_GS | (2 - 2)); OUT_BATCH((0 << GEN7_URB_ENTRY_SIZE_SHIFT) | (1 << GEN7_URB_STARTING_ADDRESS_SHIFT)); } static void gen7_emit_state_base_address(struct sna *sna) { uint32_t mocs = sna->render_state.gen7.info->mocs << 8; OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2)); OUT_BATCH(0); /* general */ OUT_BATCH(kgem_add_reloc(&sna->kgem, /* surface */ sna->kgem.nbatch, NULL, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); OUT_BATCH(kgem_add_reloc(&sna->kgem, /* dynamic */ sna->kgem.nbatch, sna->render_state.gen7.general_bo, I915_GEM_DOMAIN_INSTRUCTION << 16, mocs | BASE_ADDRESS_MODIFY)); OUT_BATCH(0); /* indirect */ OUT_BATCH(kgem_add_reloc(&sna->kgem, /* instruction */ sna->kgem.nbatch, sna->render_state.gen7.general_bo, I915_GEM_DOMAIN_INSTRUCTION << 16, mocs | BASE_ADDRESS_MODIFY)); /* upper bounds, disable */ OUT_BATCH(0); OUT_BATCH(BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(BASE_ADDRESS_MODIFY); } static void gen7_disable_vs(struct sna *sna) { /* For future reference: * A PIPE_CONTROL with post-sync op set to 1 and a depth stall needs * to be emitted just prior to change VS state, i.e. 3DSTATE_VS, * 3DSTATE_URB_VS, 3DSTATE_CONSTANT_VS, * 3DSTATE_BINDING_TABLE_POINTER_VS, 3DSTATE_SAMPLER_STATE_POINTER_VS. * * Here we saved by the full-flush incurred when emitting * the batchbuffer. */ OUT_BATCH(GEN7_3DSTATE_VS | (6 - 2)); OUT_BATCH(0); /* no VS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ #if 0 OUT_BATCH(GEN7_3DSTATE_CONSTANT_VS | (7 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS | (2 - 2)); OUT_BATCH(0); #endif } static void gen7_disable_hs(struct sna *sna) { OUT_BATCH(GEN7_3DSTATE_HS | (7 - 2)); OUT_BATCH(0); /* no HS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ #if 0 OUT_BATCH(GEN7_3DSTATE_CONSTANT_HS | (7 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_HS | (2 - 2)); OUT_BATCH(0); #endif } static void gen7_disable_te(struct sna *sna) { OUT_BATCH(GEN7_3DSTATE_TE | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_disable_ds(struct sna *sna) { OUT_BATCH(GEN7_3DSTATE_DS | (6 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); #if 0 OUT_BATCH(GEN7_3DSTATE_CONSTANT_DS | (7 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_DS | (2 - 2)); OUT_BATCH(0); #endif } static void gen7_disable_gs(struct sna *sna) { OUT_BATCH(GEN7_3DSTATE_GS | (7 - 2)); OUT_BATCH(0); /* no GS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ #if 0 OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (7 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS | (2 - 2)); OUT_BATCH(0); #endif } static void gen7_disable_streamout(struct sna *sna) { OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_sf_invariant(struct sna *sna) { OUT_BATCH(GEN7_3DSTATE_SF | (7 - 2)); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SF_CULL_NONE); OUT_BATCH(2 << GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_cc_invariant(struct sna *sna) { #if 0 /* unused, no change */ OUT_BATCH(GEN7_3DSTATE_CC_STATE_POINTERS | (2 - 2)); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS | (2 - 2)); OUT_BATCH(0); #endif /* XXX clear to be safe */ OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC | (2 - 2)); OUT_BATCH(0); } static void gen7_disable_clip(struct sna *sna) { OUT_BATCH(GEN7_3DSTATE_CLIP | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL | (2 - 2)); OUT_BATCH(0); } static void gen7_emit_wm_invariant(struct sna *sna) { OUT_BATCH(GEN7_3DSTATE_WM | (3 - 2)); OUT_BATCH(GEN7_WM_DISPATCH_ENABLE | GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(0); #if 0 /* XXX length bias of 7 in old spec? */ OUT_BATCH(GEN7_3DSTATE_CONSTANT_PS | (7 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); #endif } static void gen7_emit_null_depth_buffer(struct sna *sna) { OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7 - 2)); OUT_BATCH(GEN7_SURFACE_NULL << GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | GEN7_DEPTHFORMAT_D32_FLOAT << GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); OUT_BATCH(0); /* disable depth, stencil and hiz */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); #if 0 OUT_BATCH(GEN7_3DSTATE_CLEAR_PARAMS | (3 - 2)); OUT_BATCH(0); OUT_BATCH(0); #endif } static void gen7_emit_invariant(struct sna *sna) { OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_3D); OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE | (4 - 2)); OUT_BATCH(GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN7_3DSTATE_SAMPLE_MASK | (2 - 2)); OUT_BATCH(1); gen7_emit_urb(sna); gen7_emit_state_base_address(sna); gen7_disable_vs(sna); gen7_disable_hs(sna); gen7_disable_te(sna); gen7_disable_ds(sna); gen7_disable_gs(sna); gen7_disable_clip(sna); gen7_emit_sf_invariant(sna); gen7_emit_wm_invariant(sna); gen7_emit_cc_invariant(sna); gen7_disable_streamout(sna); gen7_emit_null_depth_buffer(sna); sna->render_state.gen7.needs_invariant = false; } static void gen7_emit_cc(struct sna *sna, uint32_t blend_offset) { struct gen7_render_state *render = &sna->render_state.gen7; if (render->blend == blend_offset) return; DBG(("%s: blend = %x\n", __FUNCTION__, blend_offset)); /* XXX can have upto 8 blend states preload, selectable via * Render Target Index. What other side-effects of Render Target Index? */ assert (is_aligned(render->cc_blend + blend_offset, 64)); OUT_BATCH(GEN7_3DSTATE_BLEND_STATE_POINTERS | (2 - 2)); OUT_BATCH((render->cc_blend + blend_offset) | 1); render->blend = blend_offset; } static void gen7_emit_sampler(struct sna *sna, uint32_t state) { if (sna->render_state.gen7.samplers == state) return; sna->render_state.gen7.samplers = state; DBG(("%s: sampler = %x\n", __FUNCTION__, state)); assert (is_aligned(sna->render_state.gen7.wm_state + state, 32)); OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS | (2 - 2)); OUT_BATCH(sna->render_state.gen7.wm_state + state); } static void gen7_emit_sf(struct sna *sna, bool has_mask) { int num_sf_outputs = has_mask ? 2 : 1; if (sna->render_state.gen7.num_sf_outputs == num_sf_outputs) return; DBG(("%s: num_sf_outputs=%d, read_length=%d, read_offset=%d\n", __FUNCTION__, num_sf_outputs, 1, 0)); sna->render_state.gen7.num_sf_outputs = num_sf_outputs; OUT_BATCH(GEN7_3DSTATE_SBE | (14 - 2)); OUT_BATCH(num_sf_outputs << GEN7_SBE_NUM_OUTPUTS_SHIFT | 1 << GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT | 1 << GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT); OUT_BATCH(0); OUT_BATCH(0); /* dw4 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* dw8 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* dw12 */ OUT_BATCH(0); OUT_BATCH(0); } static void gen7_emit_wm(struct sna *sna, int kernel) { const uint32_t *kernels; if (sna->render_state.gen7.kernel == kernel) return; sna->render_state.gen7.kernel = kernel; kernels = sna->render_state.gen7.wm_kernel[kernel]; DBG(("%s: switching to %s, num_surfaces=%d (8-wide? %d, 16-wide? %d, 32-wide? %d)\n", __FUNCTION__, wm_kernels[kernel].name, wm_kernels[kernel].num_surfaces, kernels[0], kernels[1], kernels[2])); OUT_BATCH(GEN7_3DSTATE_PS | (8 - 2)); OUT_BATCH(kernels[0] ?: kernels[1] ?: kernels[2]); OUT_BATCH(1 << GEN7_PS_SAMPLER_COUNT_SHIFT | wm_kernels[kernel].num_surfaces << GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT); OUT_BATCH(0); /* scratch address */ OUT_BATCH(sna->render_state.gen7.info->max_wm_threads | (kernels[0] ? GEN7_PS_8_DISPATCH_ENABLE : 0) | (kernels[1] ? GEN7_PS_16_DISPATCH_ENABLE : 0) | (kernels[2] ? GEN7_PS_32_DISPATCH_ENABLE : 0) | GEN7_PS_ATTRIBUTE_ENABLE); OUT_BATCH((kernels[0] ? 4 : kernels[1] ? 6 : 8) << GEN7_PS_DISPATCH_START_GRF_SHIFT_0 | 8 << GEN7_PS_DISPATCH_START_GRF_SHIFT_1 | 6 << GEN7_PS_DISPATCH_START_GRF_SHIFT_2); OUT_BATCH(kernels[2]); OUT_BATCH(kernels[1]); } static bool gen7_emit_binding_table(struct sna *sna, uint16_t offset) { if (sna->render_state.gen7.surface_table == offset) return false; /* Binding table pointers */ assert(is_aligned(4*offset, 32)); OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS | (2 - 2)); OUT_BATCH(offset*4); sna->render_state.gen7.surface_table = offset; return true; } static bool gen7_emit_drawing_rectangle(struct sna *sna, const struct sna_composite_op *op) { uint32_t limit = (op->dst.height - 1) << 16 | (op->dst.width - 1); uint32_t offset = (uint16_t)op->dst.y << 16 | (uint16_t)op->dst.x; assert(!too_large(abs(op->dst.x), abs(op->dst.y))); assert(!too_large(op->dst.width, op->dst.height)); if (sna->render_state.gen7.drawrect_limit == limit && sna->render_state.gen7.drawrect_offset == offset) return true; sna->render_state.gen7.drawrect_offset = offset; sna->render_state.gen7.drawrect_limit = limit; OUT_BATCH(GEN7_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); OUT_BATCH(limit); OUT_BATCH(offset); return false; } static void gen7_emit_vertex_elements(struct sna *sna, const struct sna_composite_op *op) { /* * vertex data in vertex buffer * position: (x, y) * texture coordinate 0: (u0, v0) if (is_affine is true) else (u0, v0, w0) * texture coordinate 1 if (has_mask is true): same as above */ struct gen7_render_state *render = &sna->render_state.gen7; uint32_t src_format, dw; int id = GEN7_VERTEX(op->u.gen7.flags); bool has_mask; DBG(("%s: setup id=%d\n", __FUNCTION__, id)); if (render->ve_id == id) return; render->ve_id = id; /* The VUE layout * dword 0-3: pad (0.0, 0.0, 0.0. 0.0) * dword 4-7: position (x, y, 1.0, 1.0), * dword 8-11: texture coordinate 0 (u0, v0, w0, 1.0) * dword 12-15: texture coordinate 1 (u1, v1, w1, 1.0) * * dword 4-15 are fetched from vertex buffer */ has_mask = (id >> 2) != 0; OUT_BATCH(GEN7_3DSTATE_VERTEX_ELEMENTS | ((2 * (3 + has_mask)) + 1 - 2)); OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT << GEN7_VE0_FORMAT_SHIFT | 0 << GEN7_VE0_OFFSET_SHIFT); OUT_BATCH(GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_1_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_3_SHIFT); /* x,y */ OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | GEN7_SURFACEFORMAT_R16G16_SSCALED << GEN7_VE0_FORMAT_SHIFT | 0 << GEN7_VE0_OFFSET_SHIFT); OUT_BATCH(GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT | GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT | GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT | GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT); /* u0, v0, w0 */ DBG(("%s: first channel %d floats, offset=4b\n", __FUNCTION__, id & 3)); dw = GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT; switch (id & 3) { default: assert(0); case 0: src_format = GEN7_SURFACEFORMAT_R16G16_SSCALED; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT; break; case 1: src_format = GEN7_SURFACEFORMAT_R32_FLOAT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_1_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT; break; case 2: src_format = GEN7_SURFACEFORMAT_R32G32_FLOAT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT; break; case 3: src_format = GEN7_SURFACEFORMAT_R32G32B32_FLOAT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_2_SHIFT; break; } OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | src_format << GEN7_VE0_FORMAT_SHIFT | 4 << GEN7_VE0_OFFSET_SHIFT); OUT_BATCH(dw); /* u1, v1, w1 */ if (has_mask) { unsigned offset = 4 + ((id & 3) ?: 1) * sizeof(float); DBG(("%s: second channel %d floats, offset=%db\n", __FUNCTION__, id >> 2, offset)); dw = GEN7_VFCOMPONENT_STORE_1_FLT << GEN7_VE1_VFCOMPONENT_3_SHIFT; switch (id >> 2) { case 1: src_format = GEN7_SURFACEFORMAT_R32_FLOAT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_1_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT; break; default: assert(0); case 2: src_format = GEN7_SURFACEFORMAT_R32G32_FLOAT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_0 << GEN7_VE1_VFCOMPONENT_2_SHIFT; break; case 3: src_format = GEN7_SURFACEFORMAT_R32G32B32_FLOAT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_0_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_1_SHIFT; dw |= GEN7_VFCOMPONENT_STORE_SRC << GEN7_VE1_VFCOMPONENT_2_SHIFT; break; } OUT_BATCH(id << GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT | GEN7_VE0_VALID | src_format << GEN7_VE0_FORMAT_SHIFT | offset << GEN7_VE0_OFFSET_SHIFT); OUT_BATCH(dw); } } inline static void gen7_emit_pipe_invalidate(struct sna *sna) { OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2)); OUT_BATCH(GEN7_PIPE_CONTROL_WC_FLUSH | GEN7_PIPE_CONTROL_TC_FLUSH | GEN7_PIPE_CONTROL_CS_STALL); OUT_BATCH(0); OUT_BATCH(0); sna->render_state.gen7.pipe_controls_since_stall = 0; } inline static void gen7_emit_pipe_flush(struct sna *sna, bool need_stall) { unsigned stall; stall = 0; if (need_stall) { stall = GEN7_PIPE_CONTROL_CS_STALL; sna->render_state.gen7.pipe_controls_since_stall = 0; } else sna->render_state.gen7.pipe_controls_since_stall++; OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2)); OUT_BATCH(GEN7_PIPE_CONTROL_WC_FLUSH | stall); OUT_BATCH(0); OUT_BATCH(0); } inline static void gen7_emit_pipe_stall(struct sna *sna) { OUT_BATCH(GEN7_PIPE_CONTROL | (4 - 2)); OUT_BATCH(GEN7_PIPE_CONTROL_CS_STALL | GEN7_PIPE_CONTROL_STALL_AT_SCOREBOARD); OUT_BATCH(0); OUT_BATCH(0); sna->render_state.gen7.pipe_controls_since_stall = 0; } static void gen7_emit_state(struct sna *sna, const struct sna_composite_op *op, uint16_t wm_binding_table) { bool need_invalidate; bool need_flush; bool need_stall; assert(op->dst.bo->exec); need_flush = wm_binding_table & 1 || (sna->render_state.gen7.emit_flush && GEN7_READS_DST(op->u.gen7.flags)); if (ALWAYS_FLUSH) need_flush = true; wm_binding_table &= ~1; need_stall = sna->render_state.gen7.surface_table != wm_binding_table; need_invalidate = kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo); if (ALWAYS_INVALIDATE) need_invalidate = true; need_stall &= gen7_emit_drawing_rectangle(sna, op); if (ALWAYS_STALL) need_stall = true; if (sna->kgem.gen < 075 && sna->render_state.gen7.pipe_controls_since_stall >= 3) need_stall = true; if (need_invalidate) { gen7_emit_pipe_invalidate(sna); kgem_clear_dirty(&sna->kgem); assert(op->dst.bo->exec); kgem_bo_mark_dirty(op->dst.bo); need_flush = false; need_stall = false; } if (need_flush) { gen7_emit_pipe_flush(sna, need_stall); need_stall = false; } if (need_stall) gen7_emit_pipe_stall(sna); gen7_emit_cc(sna, GEN7_BLEND(op->u.gen7.flags)); gen7_emit_sampler(sna, GEN7_SAMPLER(op->u.gen7.flags)); gen7_emit_sf(sna, GEN7_VERTEX(op->u.gen7.flags) >> 2); gen7_emit_wm(sna, GEN7_KERNEL(op->u.gen7.flags)); gen7_emit_vertex_elements(sna, op); gen7_emit_binding_table(sna, wm_binding_table); sna->render_state.gen7.emit_flush = GEN7_READS_DST(op->u.gen7.flags); } static bool gen7_magic_ca_pass(struct sna *sna, const struct sna_composite_op *op) { struct gen7_render_state *state = &sna->render_state.gen7; if (!op->need_magic_ca_pass) return false; DBG(("%s: CA fixup (%d -> %d)\n", __FUNCTION__, sna->render.vertex_start, sna->render.vertex_index)); gen7_emit_pipe_stall(sna); gen7_emit_cc(sna, GEN7_BLEND(gen7_get_blend(PictOpAdd, true, op->dst.format))); gen7_emit_wm(sna, gen7_choose_composite_kernel(PictOpAdd, true, true, op->is_affine)); OUT_BATCH(GEN7_3DPRIMITIVE | (7- 2)); OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST); OUT_BATCH(sna->render.vertex_index - sna->render.vertex_start); OUT_BATCH(sna->render.vertex_start); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ state->last_primitive = sna->kgem.nbatch; return true; } static void null_create(struct sna_static_stream *stream) { /* A bunch of zeros useful for legacy border color and depth-stencil */ sna_static_stream_map(stream, 64, 64); } static void sampler_state_init(struct gen7_sampler_state *sampler_state, sampler_filter_t filter, sampler_extend_t extend) { sampler_state->ss0.lod_preclamp = 1; /* GL mode */ /* We use the legacy mode to get the semantics specified by * the Render extension. */ sampler_state->ss0.default_color_mode = GEN7_BORDER_COLOR_MODE_LEGACY; switch (filter) { default: case SAMPLER_FILTER_NEAREST: sampler_state->ss0.min_filter = GEN7_MAPFILTER_NEAREST; sampler_state->ss0.mag_filter = GEN7_MAPFILTER_NEAREST; break; case SAMPLER_FILTER_BILINEAR: sampler_state->ss0.min_filter = GEN7_MAPFILTER_LINEAR; sampler_state->ss0.mag_filter = GEN7_MAPFILTER_LINEAR; break; } switch (extend) { default: case SAMPLER_EXTEND_NONE: sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP_BORDER; break; case SAMPLER_EXTEND_REPEAT: sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_WRAP; sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_WRAP; sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_WRAP; break; case SAMPLER_EXTEND_PAD: sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_CLAMP; break; case SAMPLER_EXTEND_REFLECT: sampler_state->ss3.r_wrap_mode = GEN7_TEXCOORDMODE_MIRROR; sampler_state->ss3.s_wrap_mode = GEN7_TEXCOORDMODE_MIRROR; sampler_state->ss3.t_wrap_mode = GEN7_TEXCOORDMODE_MIRROR; break; } } static void sampler_copy_init(struct gen7_sampler_state *ss) { sampler_state_init(ss, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE); ss->ss3.non_normalized_coord = 1; sampler_state_init(ss+1, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE); } static void sampler_fill_init(struct gen7_sampler_state *ss) { sampler_state_init(ss, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_REPEAT); ss->ss3.non_normalized_coord = 1; sampler_state_init(ss+1, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE); } static uint32_t gen7_tiling_bits(uint32_t tiling) { switch (tiling) { default: assert(0); case I915_TILING_NONE: return 0; case I915_TILING_X: return GEN7_SURFACE_TILED; case I915_TILING_Y: return GEN7_SURFACE_TILED | GEN7_SURFACE_TILED_Y; } } /** * Sets up the common fields for a surface state buffer for the given * picture in the given surface state buffer. */ static uint32_t gen7_bind_bo(struct sna *sna, struct kgem_bo *bo, uint32_t width, uint32_t height, uint32_t format, bool is_dst) { uint32_t *ss; uint32_t domains; int offset; uint32_t is_scanout = is_dst && bo->scanout; COMPILE_TIME_ASSERT(sizeof(struct gen7_surface_state) == 32); /* After the first bind, we manage the cache domains within the batch */ offset = kgem_bo_get_binding(bo, format | is_dst << 30 | is_scanout << 31); if (offset) { assert(offset >= sna->kgem.surface); if (is_dst) kgem_bo_mark_dirty(bo); return offset * sizeof(uint32_t); } offset = sna->kgem.surface -= sizeof(struct gen7_surface_state) / sizeof(uint32_t); ss = sna->kgem.batch + offset; ss[0] = (GEN7_SURFACE_2D << GEN7_SURFACE_TYPE_SHIFT | gen7_tiling_bits(bo->tiling) | format << GEN7_SURFACE_FORMAT_SHIFT); if (bo->tiling == I915_TILING_Y) ss[0] |= GEN7_SURFACE_VALIGN_4; if (is_dst) { ss[0] |= GEN7_SURFACE_RC_READ_WRITE; domains = I915_GEM_DOMAIN_RENDER << 16 |I915_GEM_DOMAIN_RENDER; } else domains = I915_GEM_DOMAIN_SAMPLER << 16; ss[1] = kgem_add_reloc(&sna->kgem, offset + 1, bo, domains, 0); ss[2] = ((width - 1) << GEN7_SURFACE_WIDTH_SHIFT | (height - 1) << GEN7_SURFACE_HEIGHT_SHIFT); ss[3] = (bo->pitch - 1) << GEN7_SURFACE_PITCH_SHIFT; ss[4] = 0; ss[5] = (is_scanout || bo->io) ? 0 : sna->render_state.gen7.info->mocs << 16; ss[6] = 0; ss[7] = 0; if (is_hsw(sna)) ss[7] |= HSW_SURFACE_SWIZZLE(RED, GREEN, BLUE, ALPHA); kgem_bo_set_binding(bo, format | is_dst << 30 | is_scanout << 31, offset); DBG(("[%x] bind bo(handle=%d, addr=%d), format=%d, width=%d, height=%d, pitch=%d, tiling=%d -> %s\n", offset, bo->handle, ss[1], format, width, height, bo->pitch, bo->tiling, domains & 0xffff ? "render" : "sampler")); return offset * sizeof(uint32_t); } static void gen7_emit_vertex_buffer(struct sna *sna, const struct sna_composite_op *op) { int id = GEN7_VERTEX(op->u.gen7.flags); OUT_BATCH(GEN7_3DSTATE_VERTEX_BUFFERS | (5 - 2)); OUT_BATCH(id << GEN7_VB0_BUFFER_INDEX_SHIFT | GEN7_VB0_VERTEXDATA | GEN7_VB0_ADDRESS_MODIFY_ENABLE | 4*op->floats_per_vertex << GEN7_VB0_BUFFER_PITCH_SHIFT); sna->render.vertex_reloc[sna->render.nvertex_reloc++] = sna->kgem.nbatch; OUT_BATCH(0); OUT_BATCH(~0); /* max address: disabled */ OUT_BATCH(0); sna->render.vb_id |= 1 << id; } static void gen7_emit_primitive(struct sna *sna) { if (sna->kgem.nbatch == sna->render_state.gen7.last_primitive) { sna->render.vertex_offset = sna->kgem.nbatch - 5; return; } OUT_BATCH(GEN7_3DPRIMITIVE | (7- 2)); OUT_BATCH(GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST); sna->render.vertex_offset = sna->kgem.nbatch; OUT_BATCH(0); /* vertex count, to be filled in later */ OUT_BATCH(sna->render.vertex_index); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ sna->render.vertex_start = sna->render.vertex_index; sna->render_state.gen7.last_primitive = sna->kgem.nbatch; } static bool gen7_rectangle_begin(struct sna *sna, const struct sna_composite_op *op) { int id = 1 << GEN7_VERTEX(op->u.gen7.flags); int ndwords; if (sna_vertex_wait__locked(&sna->render) && sna->render.vertex_offset) return true; ndwords = op->need_magic_ca_pass ? 60 : 6; if ((sna->render.vb_id & id) == 0) ndwords += 5; if (!kgem_check_batch(&sna->kgem, ndwords)) return false; if ((sna->render.vb_id & id) == 0) gen7_emit_vertex_buffer(sna, op); gen7_emit_primitive(sna); return true; } static int gen7_get_rectangles__flush(struct sna *sna, const struct sna_composite_op *op) { /* Preventing discarding new vbo after lock contention */ if (sna_vertex_wait__locked(&sna->render)) { int rem = vertex_space(sna); if (rem > op->floats_per_rect) return rem; } if (!kgem_check_batch(&sna->kgem, op->need_magic_ca_pass ? 65 : 6)) return 0; if (!kgem_check_reloc_and_exec(&sna->kgem, 2)) return 0; if (sna->render.vertex_offset) { gen4_vertex_flush(sna); if (gen7_magic_ca_pass(sna, op)) { gen7_emit_pipe_stall(sna); gen7_emit_cc(sna, GEN7_BLEND(op->u.gen7.flags)); gen7_emit_wm(sna, GEN7_KERNEL(op->u.gen7.flags)); } } return gen4_vertex_finish(sna); } inline static int gen7_get_rectangles(struct sna *sna, const struct sna_composite_op *op, int want, void (*emit_state)(struct sna *sna, const struct sna_composite_op *op)) { int rem; assert(want); start: rem = vertex_space(sna); if (unlikely(rem < op->floats_per_rect)) { DBG(("flushing vbo for %s: %d < %d\n", __FUNCTION__, rem, op->floats_per_rect)); rem = gen7_get_rectangles__flush(sna, op); if (unlikely(rem == 0)) goto flush; } if (unlikely(sna->render.vertex_offset == 0)) { if (!gen7_rectangle_begin(sna, op)) goto flush; else goto start; } assert(rem <= vertex_space(sna)); assert(op->floats_per_rect <= rem); if (want > 1 && want * op->floats_per_rect > rem) want = rem / op->floats_per_rect; assert(want > 0); sna->render.vertex_index += 3*want; return want; flush: if (sna->render.vertex_offset) { gen4_vertex_flush(sna); gen7_magic_ca_pass(sna, op); } sna_vertex_wait__locked(&sna->render); _kgem_submit(&sna->kgem); emit_state(sna, op); goto start; } inline static uint32_t *gen7_composite_get_binding_table(struct sna *sna, uint16_t *offset) { uint32_t *table; sna->kgem.surface -= sizeof(struct gen7_surface_state) / sizeof(uint32_t); /* Clear all surplus entries to zero in case of prefetch */ table = memset(sna->kgem.batch + sna->kgem.surface, 0, sizeof(struct gen7_surface_state)); DBG(("%s(%x)\n", __FUNCTION__, 4*sna->kgem.surface)); *offset = sna->kgem.surface; return table; } static void gen7_get_batch(struct sna *sna, const struct sna_composite_op *op) { kgem_set_mode(&sna->kgem, KGEM_RENDER, op->dst.bo); if (!kgem_check_batch_with_surfaces(&sna->kgem, 150, 4)) { DBG(("%s: flushing batch: %d < %d+%d\n", __FUNCTION__, sna->kgem.surface - sna->kgem.nbatch, 150, 4*8)); _kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } assert(sna->kgem.mode == KGEM_RENDER); assert(sna->kgem.ring == KGEM_RENDER); if (sna->render_state.gen7.needs_invariant) gen7_emit_invariant(sna); } static void gen7_emit_composite_state(struct sna *sna, const struct sna_composite_op *op) { uint32_t *binding_table; uint16_t offset, dirty; gen7_get_batch(sna, op); binding_table = gen7_composite_get_binding_table(sna, &offset); dirty = kgem_bo_is_dirty(op->dst.bo); binding_table[0] = gen7_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen7_get_dest_format(op->dst.format), true); binding_table[1] = gen7_bind_bo(sna, op->src.bo, op->src.width, op->src.height, op->src.card_format, false); if (op->mask.bo) { binding_table[2] = gen7_bind_bo(sna, op->mask.bo, op->mask.width, op->mask.height, op->mask.card_format, false); } if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table && (op->mask.bo == NULL || sna->kgem.batch[sna->render_state.gen7.surface_table+2] == binding_table[2])) { sna->kgem.surface += sizeof(struct gen7_surface_state) / sizeof(uint32_t); offset = sna->render_state.gen7.surface_table; } if (sna->kgem.batch[sna->render_state.gen7.surface_table] == binding_table[0]) dirty = 0; gen7_emit_state(sna, op, offset | dirty); } static void gen7_align_vertex(struct sna *sna, const struct sna_composite_op *op) { if (op->floats_per_vertex != sna->render_state.gen7.floats_per_vertex) { DBG(("aligning vertex: was %d, now %d floats per vertex\n", sna->render_state.gen7.floats_per_vertex, op->floats_per_vertex)); gen4_vertex_align(sna, op); sna->render_state.gen7.floats_per_vertex = op->floats_per_vertex; } } fastcall static void gen7_render_composite_blt(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { gen7_get_rectangles(sna, op, 1, gen7_emit_composite_state); op->prim_emit(sna, op, r); } fastcall static void gen7_render_composite_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { struct sna_composite_rectangles r; gen7_get_rectangles(sna, op, 1, gen7_emit_composite_state); DBG((" %s: (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.src = r.mask = r.dst; op->prim_emit(sna, op, &r); } static void gen7_render_composite_boxes__blt(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("composite_boxes(%d)\n", nbox)); do { int nbox_this_time; nbox_this_time = gen7_get_rectangles(sna, op, nbox, gen7_emit_composite_state); nbox -= nbox_this_time; do { struct sna_composite_rectangles r; DBG((" %s: (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.src = r.mask = r.dst; op->prim_emit(sna, op, &r); box++; } while (--nbox_this_time); } while (nbox); } static void gen7_render_composite_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); do { int nbox_this_time; float *v; nbox_this_time = gen7_get_rectangles(sna, op, nbox, gen7_emit_composite_state); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; } while (nbox); } static void gen7_render_composite_boxes__thread(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen7_get_rectangles(sna, op, nbox, gen7_emit_composite_state); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } #ifndef MAX #define MAX(a,b) ((a) > (b) ? (a) : (b)) #endif static uint32_t gen7_composite_create_blend_state(struct sna_static_stream *stream) { char *base, *ptr; int src, dst; base = sna_static_stream_map(stream, GEN7_BLENDFACTOR_COUNT * GEN7_BLENDFACTOR_COUNT * GEN7_BLEND_STATE_PADDED_SIZE, 64); ptr = base; for (src = 0; src < GEN7_BLENDFACTOR_COUNT; src++) { for (dst= 0; dst < GEN7_BLENDFACTOR_COUNT; dst++) { struct gen7_blend_state *blend = (struct gen7_blend_state *)ptr; blend->blend0.dest_blend_factor = dst; blend->blend0.source_blend_factor = src; blend->blend0.blend_func = GEN7_BLENDFUNCTION_ADD; blend->blend0.blend_enable = !(dst == GEN7_BLENDFACTOR_ZERO && src == GEN7_BLENDFACTOR_ONE); blend->blend1.post_blend_clamp_enable = 1; blend->blend1.pre_blend_clamp_enable = 1; ptr += GEN7_BLEND_STATE_PADDED_SIZE; } } return sna_static_stream_offsetof(stream, base); } static uint32_t gen7_bind_video_source(struct sna *sna, struct kgem_bo *bo, uint32_t offset, int width, int height, int pitch, uint32_t format) { uint32_t *ss, bind; bind = sna->kgem.surface -= sizeof(struct gen7_surface_state) / sizeof(uint32_t); assert(bo->tiling == I915_TILING_NONE); ss = sna->kgem.batch + bind; ss[0] = (GEN7_SURFACE_2D << GEN7_SURFACE_TYPE_SHIFT | format << GEN7_SURFACE_FORMAT_SHIFT); ss[1] = kgem_add_reloc(&sna->kgem, bind + 1, bo, I915_GEM_DOMAIN_SAMPLER << 16, offset); ss[2] = ((width - 1) << GEN7_SURFACE_WIDTH_SHIFT | (height - 1) << GEN7_SURFACE_HEIGHT_SHIFT); ss[3] = (pitch - 1) << GEN7_SURFACE_PITCH_SHIFT; ss[4] = 0; ss[5] = 0; ss[6] = 0; ss[7] = 0; if (is_hsw(sna)) ss[7] |= HSW_SURFACE_SWIZZLE(RED, GREEN, BLUE, ALPHA); DBG(("[%x] bind bo(handle=%d, addr=%d), format=%d, width=%d, height=%d, pitch=%d, offset=%d\n", bind, bo->handle, ss[1], format, width, height, pitch, offset)); return bind * sizeof(uint32_t); } static void gen7_emit_video_state(struct sna *sna, const struct sna_composite_op *op) { struct sna_video_frame *frame = op->priv; uint32_t src_surf_format; uint32_t src_surf_base[6]; int src_width[6]; int src_height[6]; int src_pitch[6]; uint32_t *binding_table; uint16_t offset, dirty; int n_src, n; gen7_get_batch(sna, op); src_surf_base[0] = 0; src_surf_base[1] = 0; src_surf_base[2] = frame->VBufOffset; src_surf_base[3] = frame->VBufOffset; src_surf_base[4] = frame->UBufOffset; src_surf_base[5] = frame->UBufOffset; if (is_planar_fourcc(frame->id)) { src_surf_format = GEN7_SURFACEFORMAT_R8_UNORM; src_width[1] = src_width[0] = frame->width; src_height[1] = src_height[0] = frame->height; src_pitch[1] = src_pitch[0] = frame->pitch[1]; src_width[4] = src_width[5] = src_width[2] = src_width[3] = frame->width / 2; src_height[4] = src_height[5] = src_height[2] = src_height[3] = frame->height / 2; src_pitch[4] = src_pitch[5] = src_pitch[2] = src_pitch[3] = frame->pitch[0]; n_src = 6; } else { if (frame->id == FOURCC_UYVY) src_surf_format = GEN7_SURFACEFORMAT_YCRCB_SWAPY; else src_surf_format = GEN7_SURFACEFORMAT_YCRCB_NORMAL; src_width[0] = frame->width; src_height[0] = frame->height; src_pitch[0] = frame->pitch[0]; n_src = 1; } binding_table = gen7_composite_get_binding_table(sna, &offset); dirty = kgem_bo_is_dirty(op->dst.bo); binding_table[0] = gen7_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen7_get_dest_format(op->dst.format), true); for (n = 0; n < n_src; n++) { binding_table[1+n] = gen7_bind_video_source(sna, frame->bo, src_surf_base[n], src_width[n], src_height[n], src_pitch[n], src_surf_format); } gen7_emit_state(sna, op, offset | dirty); } static bool gen7_render_video(struct sna *sna, struct sna_video *video, struct sna_video_frame *frame, RegionPtr dstRegion, PixmapPtr pixmap) { struct sna_composite_op tmp; struct sna_pixmap *priv = sna_pixmap(pixmap); int dst_width = dstRegion->extents.x2 - dstRegion->extents.x1; int dst_height = dstRegion->extents.y2 - dstRegion->extents.y1; int src_width = frame->src.x2 - frame->src.x1; int src_height = frame->src.y2 - frame->src.y1; float src_offset_x, src_offset_y; float src_scale_x, src_scale_y; int nbox, pix_xoff, pix_yoff; unsigned filter; const BoxRec *box; DBG(("%s: src=(%d, %d), dst=(%d, %d), %dx[(%d, %d), (%d, %d)...]\n", __FUNCTION__, src_width, src_height, dst_width, dst_height, region_num_rects(dstRegion), REGION_EXTENTS(NULL, dstRegion)->x1, REGION_EXTENTS(NULL, dstRegion)->y1, REGION_EXTENTS(NULL, dstRegion)->x2, REGION_EXTENTS(NULL, dstRegion)->y2)); assert(priv->gpu_bo); memset(&tmp, 0, sizeof(tmp)); tmp.dst.pixmap = pixmap; tmp.dst.width = pixmap->drawable.width; tmp.dst.height = pixmap->drawable.height; tmp.dst.format = sna_render_format_for_depth(pixmap->drawable.depth); tmp.dst.bo = priv->gpu_bo; tmp.src.bo = frame->bo; tmp.mask.bo = NULL; tmp.floats_per_vertex = 3; tmp.floats_per_rect = 9; if (src_width == dst_width && src_height == dst_height) filter = SAMPLER_FILTER_NEAREST; else filter = SAMPLER_FILTER_BILINEAR; tmp.u.gen7.flags = GEN7_SET_FLAGS(SAMPLER_OFFSET(filter, SAMPLER_EXTEND_PAD, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE), NO_BLEND, is_planar_fourcc(frame->id) ? GEN7_WM_KERNEL_VIDEO_PLANAR : GEN7_WM_KERNEL_VIDEO_PACKED, 2); tmp.priv = frame; kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp.dst.bo); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, frame->bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, frame->bo, NULL)) return false; _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen7_align_vertex(sna, &tmp); gen7_emit_video_state(sna, &tmp); /* Set up the offset for translating from the given region (in screen * coordinates) to the backing pixmap. */ #ifdef COMPOSITE pix_xoff = -pixmap->screen_x + pixmap->drawable.x; pix_yoff = -pixmap->screen_y + pixmap->drawable.y; #else pix_xoff = 0; pix_yoff = 0; #endif DBG(("%s: src=(%d, %d)x(%d, %d); frame=(%dx%d), dst=(%dx%d)\n", __FUNCTION__, frame->src.x1, frame->src.y1, src_width, src_height, dst_width, dst_height, frame->width, frame->height)); src_scale_x = (float)src_width / dst_width / frame->width; src_offset_x = (float)frame->src.x1 / frame->width - dstRegion->extents.x1 * src_scale_x; src_scale_y = (float)src_height / dst_height / frame->height; src_offset_y = (float)frame->src.y1 / frame->height - dstRegion->extents.y1 * src_scale_y; DBG(("%s: scale=(%f, %f), offset=(%f, %f)\n", __FUNCTION__, src_scale_x, src_scale_y, src_offset_x, src_offset_y)); box = region_rects(dstRegion); nbox = region_num_rects(dstRegion); while (nbox--) { BoxRec r; DBG(("%s: dst=(%d, %d), (%d, %d) + (%d, %d); src=(%f, %f), (%f, %f)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, pix_xoff, pix_yoff, box->x1 * src_scale_x + src_offset_x, box->y1 * src_scale_y + src_offset_y, box->x2 * src_scale_x + src_offset_x, box->y2 * src_scale_y + src_offset_y)); r.x1 = box->x1 + pix_xoff; r.x2 = box->x2 + pix_xoff; r.y1 = box->y1 + pix_yoff; r.y2 = box->y2 + pix_yoff; gen7_get_rectangles(sna, &tmp, 1, gen7_emit_video_state); OUT_VERTEX(r.x2, r.y2); OUT_VERTEX_F(box->x2 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y); OUT_VERTEX(r.x1, r.y2); OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y); OUT_VERTEX(r.x1, r.y1); OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y1 * src_scale_y + src_offset_y); if (!DAMAGE_IS_ALL(priv->gpu_damage)) { sna_damage_add_box(&priv->gpu_damage, &r); sna_damage_subtract_box(&priv->cpu_damage, &r); } box++; } gen4_vertex_flush(sna); return true; } static int gen7_composite_picture(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int x, int y, int w, int h, int dst_x, int dst_y, bool precise) { PixmapPtr pixmap; uint32_t color; int16_t dx, dy; DBG(("%s: (%d, %d)x(%d, %d), dst=(%d, %d)\n", __FUNCTION__, x, y, w, h, dst_x, dst_y)); channel->is_solid = false; channel->card_format = -1; if (sna_picture_is_solid(picture, &color)) return gen4_channel_init_solid(sna, channel, color); if (picture->pDrawable == NULL) { int ret; if (picture->pSourcePict->type == SourcePictTypeLinear) return gen4_channel_init_linear(sna, picture, channel, x, y, w, h, dst_x, dst_y); DBG(("%s -- fixup, gradient\n", __FUNCTION__)); ret = -1; if (!precise) ret = sna_render_picture_approximate_gradient(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (ret == -1) ret = sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); return ret; } if (picture->alphaMap) { DBG(("%s -- fallback, alphamap\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } if (!gen7_check_repeat(picture)) return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (!gen7_check_filter(picture)) return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); channel->repeat = picture->repeat ? picture->repeatType : RepeatNone; channel->filter = picture->filter; assert(picture->pDrawable); pixmap = get_drawable_pixmap(picture->pDrawable); get_drawable_deltas(picture->pDrawable, pixmap, &dx, &dy); x += dx + picture->pDrawable->x; y += dy + picture->pDrawable->y; channel->is_affine = sna_transform_is_affine(picture->transform); if (sna_transform_is_imprecise_integer_translation(picture->transform, picture->filter, precise, &dx, &dy)) { DBG(("%s: integer translation (%d, %d), removing\n", __FUNCTION__, dx, dy)); x += dx; y += dy; channel->transform = NULL; channel->filter = PictFilterNearest; if (channel->repeat || (x >= 0 && y >= 0 && x + w < pixmap->drawable.width && y + h < pixmap->drawable.height)) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv && priv->clear) { DBG(("%s: converting large pixmap source into solid [%08x]\n", __FUNCTION__, priv->clear_color)); return gen4_channel_init_solid(sna, channel, priv->clear_color); } } } else channel->transform = picture->transform; channel->pict_format = picture->format; channel->card_format = gen7_get_card_format(picture->format); if (channel->card_format == (unsigned)-1) return sna_render_picture_convert(sna, picture, channel, pixmap, x, y, w, h, dst_x, dst_y, false); if (too_large(pixmap->drawable.width, pixmap->drawable.height)) { DBG(("%s: extracting from pixmap %dx%d\n", __FUNCTION__, pixmap->drawable.width, pixmap->drawable.height)); return sna_render_picture_extract(sna, picture, channel, x, y, w, h, dst_x, dst_y); } DBG(("%s: pixmap, repeat=%d, filter=%d, transform?=%d [affine? %d], format=%08x\n", __FUNCTION__, channel->repeat, channel->filter, channel->transform != NULL, channel->is_affine, channel->pict_format)); if (channel->transform) { DBG(("%s: transform=[%f %f %f, %f %f %f, %f %f %f]\n", __FUNCTION__, channel->transform->matrix[0][0] / 65536., channel->transform->matrix[0][1] / 65536., channel->transform->matrix[0][2] / 65536., channel->transform->matrix[1][0] / 65536., channel->transform->matrix[1][1] / 65536., channel->transform->matrix[1][2] / 65536., channel->transform->matrix[2][0] / 65536., channel->transform->matrix[2][1] / 65536., channel->transform->matrix[2][2] / 65536.)); } return sna_render_pixmap_bo(sna, channel, pixmap, x, y, w, h, dst_x, dst_y); } inline static void gen7_composite_channel_convert(struct sna_composite_channel *channel) { channel->repeat = gen7_repeat(channel->repeat); channel->filter = gen7_filter(channel->filter); if (channel->card_format == (unsigned)-1) channel->card_format = gen7_get_card_format(channel->pict_format); assert(channel->card_format != (unsigned)-1); } static void gen7_render_composite_done(struct sna *sna, const struct sna_composite_op *op) { if (sna->render.vertex_offset) { gen4_vertex_flush(sna); gen7_magic_ca_pass(sna, op); } if (op->mask.bo) kgem_bo_destroy(&sna->kgem, op->mask.bo); if (op->src.bo) kgem_bo_destroy(&sna->kgem, op->src.bo); sna_render_composite_redirect_done(sna, op); } inline static bool gen7_composite_set_target(struct sna *sna, struct sna_composite_op *op, PicturePtr dst, int x, int y, int w, int h, bool partial) { BoxRec box; unsigned int hint; DBG(("%s: (%d, %d)x(%d, %d), partial?=%d\n", __FUNCTION__, x, y, w, h, partial)); op->dst.pixmap = get_drawable_pixmap(dst->pDrawable); op->dst.format = dst->format; op->dst.width = op->dst.pixmap->drawable.width; op->dst.height = op->dst.pixmap->drawable.height; if (w | h) { assert(w && h); box.x1 = x; box.y1 = y; box.x2 = x + w; box.y2 = y + h; } else sna_render_picture_extents(dst, &box); hint = PREFER_GPU | FORCE_GPU | RENDER_GPU; if (!partial) { hint |= IGNORE_DAMAGE; if (w == op->dst.width && h == op->dst.height) hint |= REPLACES; } op->dst.bo = sna_drawable_use_bo(dst->pDrawable, hint, &box, &op->damage); if (op->dst.bo == NULL) return false; if (hint & REPLACES) { struct sna_pixmap *priv = sna_pixmap(op->dst.pixmap); kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); } get_drawable_deltas(dst->pDrawable, op->dst.pixmap, &op->dst.x, &op->dst.y); DBG(("%s: pixmap=%ld, format=%08x, size=%dx%d, pitch=%d, delta=(%d,%d),damage=%p\n", __FUNCTION__, op->dst.pixmap->drawable.serialNumber, (int)op->dst.format, op->dst.width, op->dst.height, op->dst.bo->pitch, op->dst.x, op->dst.y, op->damage ? *op->damage : (void *)-1)); assert(op->dst.bo->proxy == NULL); if (too_large(op->dst.width, op->dst.height) && !sna_render_composite_redirect(sna, op, x, y, w, h, partial)) return false; return true; } static bool try_blt(struct sna *sna, PicturePtr dst, PicturePtr src, int width, int height) { struct kgem_bo *bo; if (sna->kgem.mode == KGEM_BLT) { DBG(("%s: already performing BLT\n", __FUNCTION__)); return true; } if (too_large(width, height)) { DBG(("%s: operation too large for 3D pipe (%d, %d)\n", __FUNCTION__, width, height)); return true; } bo = __sna_drawable_peek_bo(dst->pDrawable); if (bo == NULL) return true; if (bo->rq) return RQ_IS_BLT(bo->rq); if (sna_picture_is_solid(src, NULL) && can_switch_to_blt(sna, bo, 0)) return true; if (src->pDrawable) { bo = __sna_drawable_peek_bo(src->pDrawable); if (bo == NULL) return true; if (prefer_blt_bo(sna, bo)) return true; } if (sna->kgem.ring == KGEM_BLT) { DBG(("%s: already performing BLT\n", __FUNCTION__)); return true; } return false; } static bool check_gradient(PicturePtr picture, bool precise) { if (picture->pDrawable) return false; switch (picture->pSourcePict->type) { case SourcePictTypeSolidFill: case SourcePictTypeLinear: return false; default: return precise; } } static bool has_alphamap(PicturePtr p) { return p->alphaMap != NULL; } static bool need_upload(PicturePtr p) { return p->pDrawable && unattached(p->pDrawable) && untransformed(p); } static bool source_is_busy(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv == NULL || priv->clear) return false; if (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo)) return true; if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; return priv->gpu_damage && !priv->cpu_damage; } static bool source_fallback(PicturePtr p, PixmapPtr pixmap, bool precise) { if (sna_picture_is_solid(p, NULL)) return false; if (p->pSourcePict) return check_gradient(p, precise); if (!gen7_check_repeat(p) || !gen7_check_format(p->format)) return true; if (pixmap && source_is_busy(pixmap)) return false; return has_alphamap(p) || !gen7_check_filter(p) || need_upload(p); } static bool gen7_composite_fallback(struct sna *sna, PicturePtr src, PicturePtr mask, PicturePtr dst) { PixmapPtr src_pixmap; PixmapPtr mask_pixmap; PixmapPtr dst_pixmap; bool src_fallback, mask_fallback; if (!gen7_check_dst_format(dst->format)) { DBG(("%s: unknown destination format: %d\n", __FUNCTION__, dst->format)); return true; } dst_pixmap = get_drawable_pixmap(dst->pDrawable); src_pixmap = src->pDrawable ? get_drawable_pixmap(src->pDrawable) : NULL; src_fallback = source_fallback(src, src_pixmap, dst->polyMode == PolyModePrecise); if (mask) { mask_pixmap = mask->pDrawable ? get_drawable_pixmap(mask->pDrawable) : NULL; mask_fallback = source_fallback(mask, mask_pixmap, dst->polyMode == PolyModePrecise); } else { mask_pixmap = NULL; mask_fallback = false; } /* If we are using the destination as a source and need to * readback in order to upload the source, do it all * on the cpu. */ if (src_pixmap == dst_pixmap && src_fallback) { DBG(("%s: src is dst and will fallback\n",__FUNCTION__)); return true; } if (mask_pixmap == dst_pixmap && mask_fallback) { DBG(("%s: mask is dst and will fallback\n",__FUNCTION__)); return true; } /* If anything is on the GPU, push everything out to the GPU */ if (dst_use_gpu(dst_pixmap)) { DBG(("%s: dst is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (src_pixmap && !src_fallback) { DBG(("%s: src is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (mask_pixmap && !mask_fallback) { DBG(("%s: mask is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } /* However if the dst is not on the GPU and we need to * render one of the sources using the CPU, we may * as well do the entire operation in place onthe CPU. */ if (src_fallback) { DBG(("%s: dst is on the CPU and src will fallback\n", __FUNCTION__)); return true; } if (mask && mask_fallback) { DBG(("%s: dst is on the CPU and mask will fallback\n", __FUNCTION__)); return true; } if (too_large(dst_pixmap->drawable.width, dst_pixmap->drawable.height) && dst_is_cpu(dst_pixmap)) { DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__)); return true; } DBG(("%s: dst is not on the GPU and the operation should not fallback\n", __FUNCTION__)); return dst_use_cpu(dst_pixmap); } static int reuse_source(struct sna *sna, PicturePtr src, struct sna_composite_channel *sc, int src_x, int src_y, PicturePtr mask, struct sna_composite_channel *mc, int msk_x, int msk_y) { uint32_t color; if (src_x != msk_x || src_y != msk_y) return false; if (src == mask) { DBG(("%s: mask is source\n", __FUNCTION__)); *mc = *sc; mc->bo = kgem_bo_reference(mc->bo); return true; } if (sna_picture_is_solid(mask, &color)) return gen4_channel_init_solid(sna, mc, color); if (sc->is_solid) return false; if (src->pDrawable == NULL || mask->pDrawable != src->pDrawable) return false; DBG(("%s: mask reuses source drawable\n", __FUNCTION__)); if (!sna_transform_equal(src->transform, mask->transform)) return false; if (!sna_picture_alphamap_equal(src, mask)) return false; if (!gen7_check_repeat(mask)) return false; if (!gen7_check_filter(mask)) return false; if (!gen7_check_format(mask->format)) return false; DBG(("%s: reusing source channel for mask with a twist\n", __FUNCTION__)); *mc = *sc; mc->repeat = gen7_repeat(mask->repeat ? mask->repeatType : RepeatNone); mc->filter = gen7_filter(mask->filter); mc->pict_format = mask->format; mc->card_format = gen7_get_card_format(mask->format); mc->bo = kgem_bo_reference(mc->bo); return true; } static bool gen7_render_composite(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr mask, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t msk_x, int16_t msk_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_op *tmp) { if (op >= ARRAY_SIZE(gen7_blend_op)) return false; DBG(("%s: %dx%d, current mode=%d/%d\n", __FUNCTION__, width, height, sna->kgem.mode, sna->kgem.ring)); if (mask == NULL && try_blt(sna, dst, src, width, height) && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp)) return true; if (gen7_composite_fallback(sna, src, mask, dst)) goto fallback; if (need_tiling(sna, width, height)) return sna_tiling_composite(op, src, mask, dst, src_x, src_y, msk_x, msk_y, dst_x, dst_y, width, height, tmp); if (op == PictOpClear && src == sna->clear) op = PictOpSrc; tmp->op = op; if (!gen7_composite_set_target(sna, tmp, dst, dst_x, dst_y, width, height, flags & COMPOSITE_PARTIAL || op > PictOpSrc)) goto fallback; switch (gen7_composite_picture(sna, src, &tmp->src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_dst; case 0: if (!gen4_channel_init_solid(sna, &tmp->src, 0)) goto cleanup_dst; /* fall through to fixup */ case 1: /* Did we just switch rings to prepare the source? */ if (mask == NULL && prefer_blt_composite(sna, tmp) && sna_blt_composite__convert(sna, dst_x, dst_y, width, height, tmp)) return true; gen7_composite_channel_convert(&tmp->src); break; } tmp->is_affine = tmp->src.is_affine; tmp->has_component_alpha = false; tmp->need_magic_ca_pass = false; tmp->mask.bo = NULL; tmp->mask.filter = SAMPLER_FILTER_NEAREST; tmp->mask.repeat = SAMPLER_EXTEND_NONE; if (mask) { if (mask->componentAlpha && PICT_FORMAT_RGB(mask->format)) { tmp->has_component_alpha = true; /* Check if it's component alpha that relies on a source alpha and on * the source value. We can only get one of those into the single * source value that we get to blend with. */ if (gen7_blend_op[op].src_alpha && (gen7_blend_op[op].src_blend != GEN7_BLENDFACTOR_ZERO)) { if (op != PictOpOver) goto cleanup_src; tmp->need_magic_ca_pass = true; tmp->op = PictOpOutReverse; } } if (!reuse_source(sna, src, &tmp->src, src_x, src_y, mask, &tmp->mask, msk_x, msk_y)) { switch (gen7_composite_picture(sna, mask, &tmp->mask, msk_x, msk_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_src; case 0: if (!gen4_channel_init_solid(sna, &tmp->mask, 0)) goto cleanup_src; /* fall through to fixup */ case 1: gen7_composite_channel_convert(&tmp->mask); break; } } tmp->is_affine &= tmp->mask.is_affine; } tmp->u.gen7.flags = GEN7_SET_FLAGS(SAMPLER_OFFSET(tmp->src.filter, tmp->src.repeat, tmp->mask.filter, tmp->mask.repeat), gen7_get_blend(tmp->op, tmp->has_component_alpha, tmp->dst.format), gen7_choose_composite_kernel(tmp->op, tmp->mask.bo != NULL, tmp->has_component_alpha, tmp->is_affine), gen4_choose_composite_emitter(sna, tmp)); tmp->blt = gen7_render_composite_blt; tmp->box = gen7_render_composite_box; tmp->boxes = gen7_render_composite_boxes__blt; if (tmp->emit_boxes){ tmp->boxes = gen7_render_composite_boxes; tmp->thread_boxes = gen7_render_composite_boxes__thread; } tmp->done = gen7_render_composite_done; kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp->dst.bo); if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) goto cleanup_mask; _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen7_align_vertex(sna, tmp); gen7_emit_composite_state(sna, tmp); return true; cleanup_mask: if (tmp->mask.bo) { kgem_bo_destroy(&sna->kgem, tmp->mask.bo); tmp->mask.bo = NULL; } cleanup_src: if (tmp->src.bo) { kgem_bo_destroy(&sna->kgem, tmp->src.bo); tmp->src.bo = NULL; } cleanup_dst: if (tmp->redirect.real_bo) { kgem_bo_destroy(&sna->kgem, tmp->dst.bo); tmp->redirect.real_bo = NULL; } fallback: return (mask == NULL && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags | COMPOSITE_FALLBACK, tmp)); } #if !NO_COMPOSITE_SPANS fastcall static void gen7_render_composite_spans_box(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { DBG(("%s: src=+(%d, %d), opacity=%f, dst=+(%d, %d), box=(%d, %d) x (%d, %d)\n", __FUNCTION__, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); gen7_get_rectangles(sna, &op->base, 1, gen7_emit_composite_state); op->prim_emit(sna, op, box, opacity); } static void gen7_render_composite_spans_boxes(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, int nbox, float opacity) { DBG(("%s: nbox=%d, src=+(%d, %d), opacity=%f, dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y)); do { int nbox_this_time; nbox_this_time = gen7_get_rectangles(sna, &op->base, nbox, gen7_emit_composite_state); nbox -= nbox_this_time; do { DBG((" %s: (%d, %d) x (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); op->prim_emit(sna, op, box++, opacity); } while (--nbox_this_time); } while (nbox); } fastcall static void gen7_render_composite_spans_boxes__thread(struct sna *sna, const struct sna_composite_spans_op *op, const struct sna_opacity_box *box, int nbox) { DBG(("%s: nbox=%d, src=+(%d, %d), dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], op->base.dst.x, op->base.dst.y)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen7_get_rectangles(sna, &op->base, nbox, gen7_emit_composite_state); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->base.floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } fastcall static void gen7_render_composite_spans_done(struct sna *sna, const struct sna_composite_spans_op *op) { if (sna->render.vertex_offset) gen4_vertex_flush(sna); DBG(("%s()\n", __FUNCTION__)); if (op->base.src.bo) kgem_bo_destroy(&sna->kgem, op->base.src.bo); sna_render_composite_redirect_done(sna, &op->base); } static bool gen7_check_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t width, int16_t height, unsigned flags) { if (op >= ARRAY_SIZE(gen7_blend_op)) return false; if (gen7_composite_fallback(sna, src, NULL, dst)) return false; if (need_tiling(sna, width, height) && !is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS)) { DBG(("%s: fallback, tiled operation not on GPU\n", __FUNCTION__)); return false; } return true; } static bool gen7_render_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_spans_op *tmp) { DBG(("%s: %dx%d with flags=%x, current mode=%d/%d\n", __FUNCTION__, width, height, flags, sna->kgem.mode, sna->kgem.ring)); assert(gen7_check_composite_spans(sna, op, src, dst, width, height, flags)); if (need_tiling(sna, width, height)) { DBG(("%s: tiling, operation (%dx%d) too wide for pipeline\n", __FUNCTION__, width, height)); return sna_tiling_composite_spans(op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp); } tmp->base.op = op; if (!gen7_composite_set_target(sna, &tmp->base, dst, dst_x, dst_y, width, height, true)) return false; switch (gen7_composite_picture(sna, src, &tmp->base.src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_dst; case 0: if (!gen4_channel_init_solid(sna, &tmp->base.src, 0)) goto cleanup_dst; /* fall through to fixup */ case 1: gen7_composite_channel_convert(&tmp->base.src); break; } tmp->base.mask.bo = NULL; tmp->base.is_affine = tmp->base.src.is_affine; tmp->base.need_magic_ca_pass = false; tmp->base.u.gen7.flags = GEN7_SET_FLAGS(SAMPLER_OFFSET(tmp->base.src.filter, tmp->base.src.repeat, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_PAD), gen7_get_blend(tmp->base.op, false, tmp->base.dst.format), GEN7_WM_KERNEL_OPACITY | !tmp->base.is_affine, gen4_choose_spans_emitter(sna, tmp)); tmp->box = gen7_render_composite_spans_box; tmp->boxes = gen7_render_composite_spans_boxes; if (tmp->emit_boxes) tmp->thread_boxes = gen7_render_composite_spans_boxes__thread; tmp->done = gen7_render_composite_spans_done; kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp->base.dst.bo); if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) goto cleanup_src; _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen7_align_vertex(sna, &tmp->base); gen7_emit_composite_state(sna, &tmp->base); return true; cleanup_src: if (tmp->base.src.bo) kgem_bo_destroy(&sna->kgem, tmp->base.src.bo); cleanup_dst: if (tmp->base.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp->base.dst.bo); return false; } #endif static void gen7_emit_copy_state(struct sna *sna, const struct sna_composite_op *op) { uint32_t *binding_table; uint16_t offset, dirty; gen7_get_batch(sna, op); binding_table = gen7_composite_get_binding_table(sna, &offset); dirty = kgem_bo_is_dirty(op->dst.bo); binding_table[0] = gen7_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen7_get_dest_format(op->dst.format), true); binding_table[1] = gen7_bind_bo(sna, op->src.bo, op->src.width, op->src.height, op->src.card_format, false); if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table) { sna->kgem.surface += sizeof(struct gen7_surface_state) / sizeof(uint32_t); offset = sna->render_state.gen7.surface_table; } if (sna->kgem.batch[sna->render_state.gen7.surface_table] == binding_table[0]) dirty = 0; assert(!GEN7_READS_DST(op->u.gen7.flags)); gen7_emit_state(sna, op, offset | dirty); } static inline bool prefer_blt_copy(struct sna *sna, struct kgem_bo *src_bo, struct kgem_bo *dst_bo, unsigned flags) { if (sna->kgem.mode == KGEM_BLT) return true; assert((flags & COPY_SYNC) == 0); if (src_bo == dst_bo && can_switch_to_blt(sna, dst_bo, flags)) return true; if (untiled_tlb_miss(src_bo) || untiled_tlb_miss(dst_bo)) return true; if (force_blt_ring(sna)) return true; if (kgem_bo_is_render(dst_bo) || kgem_bo_is_render(src_bo)) return false; if (prefer_render_ring(sna, dst_bo)) return false; if (!prefer_blt_ring(sna, dst_bo, flags)) return false; return prefer_blt_bo(sna, src_bo) || prefer_blt_bo(sna, dst_bo); } static bool gen7_render_copy_boxes(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, unsigned flags) { struct sna_composite_op tmp; BoxRec extents; DBG(("%s (%d, %d)->(%d, %d) x %d, alu=%x, flags=%x, self-copy=%d, overlaps? %d\n", __FUNCTION__, src_dx, src_dy, dst_dx, dst_dy, n, alu, flags, src_bo == dst_bo, overlaps(sna, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, box, n, flags, &extents))); if (prefer_blt_copy(sna, src_bo, dst_bo, flags) && sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; if (!(alu == GXcopy || alu == GXclear)) { fallback_blt: DBG(("%s: fallback blt\n", __FUNCTION__)); if (!sna_blt_compare_depth(src, dst)) return false; return sna_blt_copy_boxes_fallback(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } if (overlaps(sna, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, box, n, flags, &extents)) { bool big = too_large(extents.x2-extents.x1, extents.y2-extents.y1); if ((big || can_switch_to_blt(sna, dst_bo, flags)) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; if (big) goto fallback_blt; assert(src_bo == dst_bo); assert(src->depth == dst->depth); assert(src->width == dst->width); assert(src->height == dst->height); return sna_render_copy_boxes__overlap(sna, alu, src, src_bo, src_dx, src_dy, dst_dx, dst_dy, box, n, &extents); } if (dst->depth == src->depth) { tmp.dst.format = sna_render_format_for_depth(dst->depth); tmp.src.pict_format = tmp.dst.format; } else { tmp.dst.format = sna_format_for_depth(dst->depth); tmp.src.pict_format = sna_format_for_depth(src->depth); } if (!gen7_check_format(tmp.src.pict_format)) goto fallback_blt; tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.bo = dst_bo; tmp.dst.x = tmp.dst.y = 0; tmp.damage = NULL; sna_render_composite_redirect_init(&tmp); if (too_large(tmp.dst.width, tmp.dst.height)) { int i; extents = box[0]; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_composite_redirect(sna, &tmp, extents.x1 + dst_dx, extents.y1 + dst_dy, extents.x2 - extents.x1, extents.y2 - extents.y1, n > 1)) goto fallback_tiled; } tmp.src.card_format = gen7_get_card_format(tmp.src.pict_format); if (too_large(src->width, src->height)) { int i; extents = box[0]; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_pixmap_partial(sna, src, src_bo, &tmp.src, extents.x1 + src_dx, extents.y1 + src_dy, extents.x2 - extents.x1, extents.y2 - extents.y1)) goto fallback_tiled_dst; } else { tmp.src.bo = src_bo; tmp.src.width = src->width; tmp.src.height = src->height; tmp.src.offset[0] = tmp.src.offset[1] = 0; } tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = 0; tmp.u.gen7.flags = COPY_FLAGS(alu); kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp.dst.bo); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, tmp.src.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, tmp.src.bo, NULL)) { if (tmp.src.bo != src_bo) kgem_bo_destroy(&sna->kgem, tmp.src.bo); if (tmp.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp.dst.bo); goto fallback_blt; } _kgem_set_mode(&sna->kgem, KGEM_RENDER); } src_dx += tmp.src.offset[0]; src_dy += tmp.src.offset[1]; dst_dx += tmp.dst.x; dst_dy += tmp.dst.y; tmp.dst.x = tmp.dst.y = 0; gen7_align_vertex(sna, &tmp); gen7_emit_copy_state(sna, &tmp); do { int16_t *v; int n_this_time; n_this_time = gen7_get_rectangles(sna, &tmp, n, gen7_emit_copy_state); n -= n_this_time; v = (int16_t *)(sna->render.vertices + sna->render.vertex_used); sna->render.vertex_used += 6 * n_this_time; assert(sna->render.vertex_used <= sna->render.vertex_size); do { DBG((" (%d, %d) -> (%d, %d) + (%d, %d)\n", box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1)); v[0] = box->x2 + dst_dx; v[2] = box->x2 + src_dx; v[1] = v[5] = box->y2 + dst_dy; v[3] = v[7] = box->y2 + src_dy; v[8] = v[4] = box->x1 + dst_dx; v[10] = v[6] = box->x1 + src_dx; v[9] = box->y1 + dst_dy; v[11] = box->y1 + src_dy; v += 12; box++; } while (--n_this_time); } while (n); gen4_vertex_flush(sna); sna_render_composite_redirect_done(sna, &tmp); if (tmp.src.bo != src_bo) kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; fallback_tiled_dst: if (tmp.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp.dst.bo); fallback_tiled: DBG(("%s: fallback tiled\n", __FUNCTION__)); if (sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; return sna_tiling_copy_boxes(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } static void gen7_render_copy_blt(struct sna *sna, const struct sna_copy_op *op, int16_t sx, int16_t sy, int16_t w, int16_t h, int16_t dx, int16_t dy) { int16_t *v; gen7_get_rectangles(sna, &op->base, 1, gen7_emit_copy_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = dx+w; v[1] = dy+h; v[2] = sx+w; v[3] = sy+h; v[4] = dx; v[5] = dy+h; v[6] = sx; v[7] = sy+h; v[8] = dx; v[9] = dy; v[10] = sx; v[11] = sy; } static void gen7_render_copy_done(struct sna *sna, const struct sna_copy_op *op) { if (sna->render.vertex_offset) gen4_vertex_flush(sna); } static bool gen7_render_copy(struct sna *sna, uint8_t alu, PixmapPtr src, struct kgem_bo *src_bo, PixmapPtr dst, struct kgem_bo *dst_bo, struct sna_copy_op *op) { DBG(("%s (alu=%d, src=(%dx%d), dst=(%dx%d))\n", __FUNCTION__, alu, src->drawable.width, src->drawable.height, dst->drawable.width, dst->drawable.height)); if (prefer_blt_copy(sna, src_bo, dst_bo, 0) && sna_blt_compare_depth(&src->drawable, &dst->drawable) && sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op)) return true; if (!(alu == GXcopy || alu == GXclear) || src_bo == dst_bo || too_large(src->drawable.width, src->drawable.height) || too_large(dst->drawable.width, dst->drawable.height)) { fallback: if (!sna_blt_compare_depth(&src->drawable, &dst->drawable)) return false; return sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op); } if (dst->drawable.depth == src->drawable.depth) { op->base.dst.format = sna_render_format_for_depth(dst->drawable.depth); op->base.src.pict_format = op->base.dst.format; } else { op->base.dst.format = sna_format_for_depth(dst->drawable.depth); op->base.src.pict_format = sna_format_for_depth(src->drawable.depth); } if (!gen7_check_format(op->base.src.pict_format)) goto fallback; op->base.dst.pixmap = dst; op->base.dst.width = dst->drawable.width; op->base.dst.height = dst->drawable.height; op->base.dst.bo = dst_bo; op->base.src.bo = src_bo; op->base.src.card_format = gen7_get_card_format(op->base.src.pict_format); op->base.src.width = src->drawable.width; op->base.src.height = src->drawable.height; op->base.mask.bo = NULL; op->base.floats_per_vertex = 2; op->base.floats_per_rect = 6; op->base.u.gen7.flags = COPY_FLAGS(alu); kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) goto fallback; _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen7_align_vertex(sna, &op->base); gen7_emit_copy_state(sna, &op->base); op->blt = gen7_render_copy_blt; op->done = gen7_render_copy_done; return true; } static void gen7_emit_fill_state(struct sna *sna, const struct sna_composite_op *op) { uint16_t dirty; uint32_t *binding_table; uint16_t offset; /* XXX Render Target Fast Clear * Set RTFC Enable in PS and render a rectangle. * Limited to a clearing the full MSC surface only with a * specific kernel. */ gen7_get_batch(sna, op); binding_table = gen7_composite_get_binding_table(sna, &offset); dirty = kgem_bo_is_dirty(op->dst.bo); binding_table[0] = gen7_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen7_get_dest_format(op->dst.format), true); binding_table[1] = gen7_bind_bo(sna, op->src.bo, 1, 1, GEN7_SURFACEFORMAT_B8G8R8A8_UNORM, false); if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen7.surface_table) == *(uint64_t*)binding_table) { sna->kgem.surface += sizeof(struct gen7_surface_state)/sizeof(uint32_t); offset = sna->render_state.gen7.surface_table; } if (sna->kgem.batch[sna->render_state.gen7.surface_table] == binding_table[0]) dirty = 0; gen7_emit_state(sna, op, offset | dirty); } static bool gen7_render_fill_boxes(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n) { struct sna_composite_op tmp; uint32_t pixel; DBG(("%s (op=%d, color=(%04x, %04x, %04x, %04x) [%08x])\n", __FUNCTION__, op, color->red, color->green, color->blue, color->alpha, (int)format)); if (op >= ARRAY_SIZE(gen7_blend_op)) { DBG(("%s: fallback due to unhandled blend op: %d\n", __FUNCTION__, op)); return false; } if (prefer_blt_fill(sna, dst_bo, FILL_BOXES) || !gen7_check_dst_format(format)) { uint8_t alu = GXinvalid; if (op <= PictOpSrc) { pixel = 0; if (op == PictOpClear) alu = GXclear; else if (sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, format)) alu = GXcopy; } if (alu != GXinvalid && sna_blt_fill_boxes(sna, alu, dst_bo, dst->bitsPerPixel, pixel, box, n)) return true; if (!gen7_check_dst_format(format)) return false; } if (op == PictOpClear) { pixel = 0; op = PictOpSrc; } else if (!sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, PICT_a8r8g8b8)) return false; DBG(("%s(%08x x %d [(%d, %d), (%d, %d) ...])\n", __FUNCTION__, pixel, n, box[0].x1, box[0].y1, box[0].x2, box[0].y2)); tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.format = format; tmp.dst.bo = dst_bo; tmp.dst.x = tmp.dst.y = 0; tmp.damage = NULL; sna_render_composite_redirect_init(&tmp); if (too_large(dst->width, dst->height)) { BoxRec extents; boxes_extents(box, n, &extents); if (!sna_render_composite_redirect(sna, &tmp, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1, n > 1)) return sna_tiling_fill_boxes(sna, op, format, color, dst, dst_bo, box, n); } tmp.src.bo = sna_render_get_solid(sna, pixel); tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = false; tmp.u.gen7.flags = FILL_FLAGS(op, format); kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); if (tmp.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp.dst.bo); return false; } _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen7_align_vertex(sna, &tmp); gen7_emit_fill_state(sna, &tmp); do { int n_this_time; int16_t *v; n_this_time = gen7_get_rectangles(sna, &tmp, n, gen7_emit_fill_state); n -= n_this_time; v = (int16_t *)(sna->render.vertices + sna->render.vertex_used); sna->render.vertex_used += 6 * n_this_time; assert(sna->render.vertex_used <= sna->render.vertex_size); do { DBG((" (%d, %d), (%d, %d)\n", box->x1, box->y1, box->x2, box->y2)); v[0] = box->x2; v[5] = v[1] = box->y2; v[8] = v[4] = box->x1; v[9] = box->y1; v[2] = v[3] = v[7] = 1; v[6] = v[10] = v[11] = 0; v += 12; box++; } while (--n_this_time); } while (n); gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); sna_render_composite_redirect_done(sna, &tmp); return true; } static void gen7_render_fill_op_blt(struct sna *sna, const struct sna_fill_op *op, int16_t x, int16_t y, int16_t w, int16_t h) { int16_t *v; DBG(("%s: (%d, %d)x(%d, %d)\n", __FUNCTION__, x, y, w, h)); gen7_get_rectangles(sna, &op->base, 1, gen7_emit_fill_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = x+w; v[4] = v[8] = x; v[1] = v[5] = y+h; v[9] = y; v[2] = v[3] = v[7] = 1; v[6] = v[10] = v[11] = 0; } fastcall static void gen7_render_fill_op_box(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box) { int16_t *v; DBG(("%s: (%d, %d),(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); gen7_get_rectangles(sna, &op->base, 1, gen7_emit_fill_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = box->x2; v[8] = v[4] = box->x1; v[5] = v[1] = box->y2; v[9] = box->y1; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; } fastcall static void gen7_render_fill_op_boxes(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box, int nbox) { DBG(("%s: (%d, %d),(%d, %d)... x %d\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, nbox)); do { int nbox_this_time; int16_t *v; nbox_this_time = gen7_get_rectangles(sna, &op->base, nbox, gen7_emit_fill_state); nbox -= nbox_this_time; v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6 * nbox_this_time; assert(sna->render.vertex_used <= sna->render.vertex_size); do { v[0] = box->x2; v[8] = v[4] = box->x1; v[5] = v[1] = box->y2; v[9] = box->y1; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; box++; v += 12; } while (--nbox_this_time); } while (nbox); } static void gen7_render_fill_op_done(struct sna *sna, const struct sna_fill_op *op) { if (sna->render.vertex_offset) gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, op->base.src.bo); } static bool gen7_render_fill(struct sna *sna, uint8_t alu, PixmapPtr dst, struct kgem_bo *dst_bo, uint32_t color, unsigned flags, struct sna_fill_op *op) { DBG(("%s: (alu=%d, color=%x)\n", __FUNCTION__, alu, color)); if (prefer_blt_fill(sna, dst_bo, flags) && sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, op)) return true; if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height)) return sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, op); if (alu == GXclear) color = 0; op->base.dst.pixmap = dst; op->base.dst.width = dst->drawable.width; op->base.dst.height = dst->drawable.height; op->base.dst.format = sna_format_for_depth(dst->drawable.depth); op->base.dst.bo = dst_bo; op->base.dst.x = op->base.dst.y = 0; op->base.src.bo = sna_render_get_solid(sna, sna_rgba_for_color(color, dst->drawable.depth)); op->base.mask.bo = NULL; op->base.need_magic_ca_pass = false; op->base.floats_per_vertex = 2; op->base.floats_per_rect = 6; op->base.u.gen7.flags = FILL_FLAGS_NOBLEND; kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_bo_destroy(&sna->kgem, op->base.src.bo); return false; } _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen7_align_vertex(sna, &op->base); gen7_emit_fill_state(sna, &op->base); op->blt = gen7_render_fill_op_blt; op->box = gen7_render_fill_op_box; op->boxes = gen7_render_fill_op_boxes; op->points = NULL; op->done = gen7_render_fill_op_done; return true; } static bool gen7_render_fill_one_try_blt(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { BoxRec box; box.x1 = x1; box.y1 = y1; box.x2 = x2; box.y2 = y2; return sna_blt_fill_boxes(sna, alu, bo, dst->drawable.bitsPerPixel, color, &box, 1); } static bool gen7_render_fill_one(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { struct sna_composite_op tmp; int16_t *v; /* Prefer to use the BLT if already engaged */ if (prefer_blt_fill(sna, bo, FILL_BOXES) && gen7_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu)) return true; /* Must use the BLT if we can't RENDER... */ if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height)) return gen7_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu); if (alu == GXclear) color = 0; tmp.dst.pixmap = dst; tmp.dst.width = dst->drawable.width; tmp.dst.height = dst->drawable.height; tmp.dst.format = sna_format_for_depth(dst->drawable.depth); tmp.dst.bo = bo; tmp.dst.x = tmp.dst.y = 0; tmp.src.bo = sna_render_get_solid(sna, sna_rgba_for_color(color, dst->drawable.depth)); tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = false; tmp.u.gen7.flags = FILL_FLAGS_NOBLEND; kgem_set_mode(&sna->kgem, KGEM_RENDER, bo); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); return false; } _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen7_align_vertex(sna, &tmp); gen7_emit_fill_state(sna, &tmp); gen7_get_rectangles(sna, &tmp, 1, gen7_emit_fill_state); DBG((" (%d, %d), (%d, %d)\n", x1, y1, x2, y2)); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = x2; v[8] = v[4] = x1; v[5] = v[1] = y2; v[9] = y1; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; } static bool gen7_render_clear_try_blt(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo) { BoxRec box; box.x1 = 0; box.y1 = 0; box.x2 = dst->drawable.width; box.y2 = dst->drawable.height; return sna_blt_fill_boxes(sna, GXclear, bo, dst->drawable.bitsPerPixel, 0, &box, 1); } static bool gen7_render_clear(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo) { struct sna_composite_op tmp; int16_t *v; DBG(("%s: %dx%d\n", __FUNCTION__, dst->drawable.width, dst->drawable.height)); /* Prefer to use the BLT if already engaged */ if (sna->kgem.mode == KGEM_BLT && gen7_render_clear_try_blt(sna, dst, bo)) return true; /* Must use the BLT if we can't RENDER... */ if (too_large(dst->drawable.width, dst->drawable.height)) return gen7_render_clear_try_blt(sna, dst, bo); tmp.dst.pixmap = dst; tmp.dst.width = dst->drawable.width; tmp.dst.height = dst->drawable.height; tmp.dst.format = sna_format_for_depth(dst->drawable.depth); tmp.dst.bo = bo; tmp.dst.x = tmp.dst.y = 0; tmp.src.bo = sna_render_get_solid(sna, 0); tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = false; tmp.u.gen7.flags = FILL_FLAGS_NOBLEND; kgem_set_mode(&sna->kgem, KGEM_RENDER, bo); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); return false; } _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen7_align_vertex(sna, &tmp); gen7_emit_fill_state(sna, &tmp); gen7_get_rectangles(sna, &tmp, 1, gen7_emit_fill_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = dst->drawable.width; v[5] = v[1] = dst->drawable.height; v[8] = v[4] = 0; v[9] = 0; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; } static void gen7_render_reset(struct sna *sna) { sna->render_state.gen7.pipe_controls_since_stall = 0; sna->render_state.gen7.emit_flush = false; sna->render_state.gen7.needs_invariant = true; sna->render_state.gen7.ve_id = 3 << 2; sna->render_state.gen7.last_primitive = -1; sna->render_state.gen7.num_sf_outputs = 0; sna->render_state.gen7.samplers = -1; sna->render_state.gen7.blend = -1; sna->render_state.gen7.kernel = -1; sna->render_state.gen7.drawrect_offset = -1; sna->render_state.gen7.drawrect_limit = -1; sna->render_state.gen7.surface_table = 0; if (sna->render.vbo && !kgem_bo_can_map(&sna->kgem, sna->render.vbo)) { DBG(("%s: discarding unmappable vbo\n", __FUNCTION__)); discard_vbo(sna); } sna->render.vertex_offset = 0; sna->render.nvertex_reloc = 0; sna->render.vb_id = 0; } static void gen7_render_fini(struct sna *sna) { kgem_bo_destroy(&sna->kgem, sna->render_state.gen7.general_bo); } static bool is_gt3(struct sna *sna, int devid) { assert(sna->kgem.gen == 075); return devid & 0x20; } static bool is_gt2(struct sna *sna, int devid) { return devid & (is_hsw(sna)? 0x30 : 0x20); } static bool is_mobile(struct sna *sna, int devid) { return (devid & 0xf) == 0x6; } static bool gen7_render_setup(struct sna *sna, int devid) { struct gen7_render_state *state = &sna->render_state.gen7; struct sna_static_stream general; struct gen7_sampler_state *ss; int i, j, k, l, m; if (is_ivb(sna)) { state->info = &ivb_gt_info; if (devid & 0xf) { state->info = &ivb_gt1_info; if (is_gt2(sna, devid)) state->info = &ivb_gt2_info; /* XXX requires GT_MODE WiZ disabled */ } } else if (is_byt(sna)) { state->info = &byt_gt_info; } else if (is_hsw(sna)) { state->info = &hsw_gt_info; if (devid & 0xf) { if (is_gt3(sna, devid)) state->info = &hsw_gt3_info; else if (is_gt2(sna, devid)) state->info = &hsw_gt2_info; else state->info = &hsw_gt1_info; } } else return false; state->gt = state->info->gt; sna_static_stream_init(&general); /* Zero pad the start. If you see an offset of 0x0 in the batchbuffer * dumps, you know it points to zero. */ null_create(&general); for (m = 0; m < GEN7_WM_KERNEL_COUNT; m++) { if (wm_kernels[m].size) { state->wm_kernel[m][1] = sna_static_stream_add(&general, wm_kernels[m].data, wm_kernels[m].size, 64); } else { if (USE_8_PIXEL_DISPATCH) { state->wm_kernel[m][0] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 8); } if (USE_16_PIXEL_DISPATCH) { state->wm_kernel[m][1] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 16); } if (USE_32_PIXEL_DISPATCH) { state->wm_kernel[m][2] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 32); } } assert(state->wm_kernel[m][0]|state->wm_kernel[m][1]|state->wm_kernel[m][2]); } ss = sna_static_stream_map(&general, 2 * sizeof(*ss) * (2 + FILTER_COUNT * EXTEND_COUNT * FILTER_COUNT * EXTEND_COUNT), 32); state->wm_state = sna_static_stream_offsetof(&general, ss); sampler_copy_init(ss); ss += 2; sampler_fill_init(ss); ss += 2; for (i = 0; i < FILTER_COUNT; i++) { for (j = 0; j < EXTEND_COUNT; j++) { for (k = 0; k < FILTER_COUNT; k++) { for (l = 0; l < EXTEND_COUNT; l++) { sampler_state_init(ss++, i, j); sampler_state_init(ss++, k, l); } } } } state->cc_blend = gen7_composite_create_blend_state(&general); state->general_bo = sna_static_stream_fini(sna, &general); return state->general_bo != NULL; } const char *gen7_render_init(struct sna *sna, const char *backend) { int devid = intel_get_device_id(sna->dev); if (!gen7_render_setup(sna, devid)) return backend; sna->kgem.context_switch = gen6_render_context_switch; sna->kgem.retire = gen6_render_retire; sna->kgem.expire = gen4_render_expire; #if !NO_COMPOSITE sna->render.composite = gen7_render_composite; sna->render.prefer_gpu |= PREFER_GPU_RENDER; #endif #if !NO_COMPOSITE_SPANS sna->render.check_composite_spans = gen7_check_composite_spans; sna->render.composite_spans = gen7_render_composite_spans; if (is_mobile(sna, devid) || is_gt2(sna, devid) || is_byt(sna)) sna->render.prefer_gpu |= PREFER_GPU_SPANS; #endif sna->render.video = gen7_render_video; #if !NO_COPY_BOXES sna->render.copy_boxes = gen7_render_copy_boxes; #endif #if !NO_COPY sna->render.copy = gen7_render_copy; #endif #if !NO_FILL_BOXES sna->render.fill_boxes = gen7_render_fill_boxes; #endif #if !NO_FILL sna->render.fill = gen7_render_fill; #endif #if !NO_FILL_ONE sna->render.fill_one = gen7_render_fill_one; #endif #if !NO_FILL_CLEAR sna->render.clear = gen7_render_clear; #endif sna->render.flush = gen4_render_flush; sna->render.reset = gen7_render_reset; sna->render.fini = gen7_render_fini; sna->render.max_3d_size = GEN7_MAX_SIZE; sna->render.max_3d_pitch = 1 << 18; return sna->render_state.gen7.info->name; } xf86-video-intel-2.99.917/src/sna/sna_gradient.c0000664000175000017500000003003312400044327016074 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #define xFixedToDouble(f) pixman_fixed_to_double(f) bool sna_gradient_is_opaque(const PictGradient *gradient) { int n; for (n = 0; n < gradient->nstops; n++) { if (gradient->stops[n].color.alpha < 0xff00) return false; } return true; } static int sna_gradient_sample_width(PictGradient *gradient) { int n, width; width = 0; for (n = 1; n < gradient->nstops; n++) { xFixed dx = gradient->stops[n].x - gradient->stops[n-1].x; int delta, max, ramp; if (dx == 0) return 1024; max = gradient->stops[n].color.red - gradient->stops[n-1].color.red; if (max < 0) max = -max; delta = gradient->stops[n].color.green - gradient->stops[n-1].color.green; if (delta < 0) delta = -delta; if (delta > max) max = delta; delta = gradient->stops[n].color.blue - gradient->stops[n-1].color.blue; if (delta < 0) delta = -delta; if (delta > max) max = delta; delta = gradient->stops[n].color.alpha - gradient->stops[n-1].color.alpha; if (delta < 0) delta = -delta; if (delta > max) max = delta; ramp = 256 * max / dx; if (ramp > width) width = ramp; } if (width == 0) return 1; width = (width + 7) & -8; return min(width, 1024); } static bool _gradient_color_stops_equal(PictGradient *pattern, struct sna_gradient_cache *cache) { if (cache->nstops != pattern->nstops) return false; return memcmp(cache->stops, pattern->stops, sizeof(PictGradientStop)*cache->nstops) == 0; } struct kgem_bo * sna_render_get_gradient(struct sna *sna, PictGradient *pattern) { struct sna_render *render = &sna->render; struct sna_gradient_cache *cache; pixman_image_t *gradient, *image; pixman_point_fixed_t p1, p2; int i, width; struct kgem_bo *bo; DBG(("%s: %dx[%f:%x ... %f:%x ... %f:%x]\n", __FUNCTION__, pattern->nstops, pattern->stops[0].x / 65536., pattern->stops[0].color.alpha >> 8 << 24 | pattern->stops[0].color.red >> 8 << 16 | pattern->stops[0].color.green >> 8 << 8 | pattern->stops[0].color.blue >> 8 << 0, pattern->stops[pattern->nstops/2].x / 65536., pattern->stops[pattern->nstops/2].color.alpha >> 8 << 24 | pattern->stops[pattern->nstops/2].color.red >> 8 << 16 | pattern->stops[pattern->nstops/2].color.green >> 8 << 8 | pattern->stops[pattern->nstops/2].color.blue >> 8 << 0, pattern->stops[pattern->nstops-1].x / 65536., pattern->stops[pattern->nstops-1].color.alpha >> 8 << 24 | pattern->stops[pattern->nstops-1].color.red >> 8 << 16 | pattern->stops[pattern->nstops-1].color.green >> 8 << 8 | pattern->stops[pattern->nstops-1].color.blue >> 8 << 0)); for (i = 0; i < render->gradient_cache.size; i++) { cache = &render->gradient_cache.cache[i]; if (_gradient_color_stops_equal(pattern, cache)) { DBG(("%s: old --> %d\n", __FUNCTION__, i)); return kgem_bo_reference(cache->bo); } } width = sna_gradient_sample_width(pattern); DBG(("%s: sample width = %d\n", __FUNCTION__, width)); if (width == 0) return NULL; p1.x = 0; p1.y = 0; p2.x = width << 16; p2.y = 0; gradient = pixman_image_create_linear_gradient(&p1, &p2, (pixman_gradient_stop_t *)pattern->stops, pattern->nstops); if (gradient == NULL) return NULL; pixman_image_set_filter(gradient, PIXMAN_FILTER_BILINEAR, NULL, 0); pixman_image_set_repeat(gradient, PIXMAN_REPEAT_PAD); image = pixman_image_create_bits(PIXMAN_a8r8g8b8, width, 1, NULL, 0); if (image == NULL) { pixman_image_unref(gradient); return NULL; } pixman_image_composite(PIXMAN_OP_SRC, gradient, NULL, image, 0, 0, 0, 0, 0, 0, width, 1); pixman_image_unref(gradient); DBG(("%s: [0]=%x, [%d]=%x [%d]=%x\n", __FUNCTION__, pixman_image_get_data(image)[0], width/2, pixman_image_get_data(image)[width/2], width-1, pixman_image_get_data(image)[width-1])); bo = kgem_create_linear(&sna->kgem, width*4, 0); if (!bo) { pixman_image_unref(image); return NULL; } bo->pitch = 4*width; kgem_bo_write(&sna->kgem, bo, pixman_image_get_data(image), 4*width); pixman_image_unref(image); if (render->gradient_cache.size < GRADIENT_CACHE_SIZE) i = render->gradient_cache.size++; else i = rand () % GRADIENT_CACHE_SIZE; cache = &render->gradient_cache.cache[i]; if (cache->nstops < pattern->nstops) { PictGradientStop *newstops; newstops = malloc(sizeof(PictGradientStop) * pattern->nstops); if (newstops == NULL) return bo; free(cache->stops); cache->stops = newstops; } memcpy(cache->stops, pattern->stops, sizeof(PictGradientStop) * pattern->nstops); cache->nstops = pattern->nstops; if (cache->bo) kgem_bo_destroy(&sna->kgem, cache->bo); cache->bo = kgem_bo_reference(bo); return bo; } void sna_render_flush_solid(struct sna *sna) { struct sna_solid_cache *cache = &sna->render.solid_cache; DBG(("sna_render_flush_solid(size=%d)\n", cache->size)); assert(cache->dirty); assert(cache->size); assert(cache->size <= 1024); kgem_bo_write(&sna->kgem, cache->cache_bo, cache->color, cache->size*sizeof(uint32_t)); cache->dirty = 0; } static void sna_render_finish_solid(struct sna *sna, bool force) { struct sna_solid_cache *cache = &sna->render.solid_cache; struct kgem_bo *old; int i; DBG(("sna_render_finish_solid(force=%d, domain=%d, busy=%d, dirty=%d, size=%d)\n", force, cache->cache_bo->domain, cache->cache_bo->rq != NULL, cache->dirty, cache->size)); if (!force && cache->cache_bo->domain != DOMAIN_GPU) return; if (cache->dirty) sna_render_flush_solid(sna); for (i = 0; i < cache->size; i++) { if (cache->bo[i] == NULL) continue; kgem_bo_destroy(&sna->kgem, cache->bo[i]); cache->bo[i] = NULL; } DBG(("sna_render_finish_solid reset\n")); old = cache->cache_bo; cache->cache_bo = kgem_create_linear(&sna->kgem, sizeof(cache->color), 0); if (cache->cache_bo == NULL) { cache->cache_bo = old; old = NULL; } if (force) cache->size = 0; if (cache->last < cache->size) { cache->bo[cache->last] = kgem_create_proxy(&sna->kgem, cache->cache_bo, cache->last*sizeof(uint32_t), sizeof(uint32_t)); if (cache->bo[cache->last]) cache->bo[cache->last]->pitch = 4; else cache->last = 1024; } if (old) kgem_bo_destroy(&sna->kgem, old); } struct kgem_bo * sna_render_get_solid(struct sna *sna, uint32_t color) { struct sna_solid_cache *cache = &sna->render.solid_cache; int i; DBG(("%s: %08x\n", __FUNCTION__, color)); if ((color & 0xffffff) == 0) /* alpha only */ return kgem_bo_reference(sna->render.alpha_cache.bo[color>>24]); if (color == 0xffffffff) { DBG(("%s(white)\n", __FUNCTION__)); return kgem_bo_reference(sna->render.alpha_cache.bo[255+7]); } if ((color >> 24) == 0xff) { int v = 0; if (((color >> 16) & 0xff) == 0) v |= 0; else if (((color >> 16) & 0xff) == 0xff) v |= 1 << 2; else v = -1; if (((color >> 8) & 0xff) == 0) v |= 0; else if (((color >> 8) & 0xff) == 0xff) v |= 1 << 1; else v = -1; if (((color >> 0) & 0xff) == 0) v |= 0; else if (((color >> 0) & 0xff) == 0xff) v |= 1 << 0; else v = -1; if (v >= 0) { DBG(("%s(primary (%d,%d,%d): %d)\n", __FUNCTION__, v & 4, v & 2, v & 1, v)); return kgem_bo_reference(sna->render.alpha_cache.bo[255+v]); } } if (cache->color[cache->last] == color) { DBG(("sna_render_get_solid(%d) = %x (last)\n", cache->last, color)); return kgem_bo_reference(cache->bo[cache->last]); } for (i = 0; i < cache->size; i++) { if (cache->color[i] == color) { if (cache->bo[i] == NULL) { DBG(("sna_render_get_solid(%d) = %x (recreate)\n", i, color)); goto create; } else { DBG(("sna_render_get_solid(%d) = %x (old)\n", i, color)); goto done; } } } sna_render_finish_solid(sna, i == ARRAY_SIZE(cache->color)); i = cache->size++; assert(i < ARRAY_SIZE(cache->color)); cache->color[i] = color; cache->dirty = 1; DBG(("sna_render_get_solid(%d) = %x (new)\n", i, color)); create: cache->bo[i] = kgem_create_proxy(&sna->kgem, cache->cache_bo, i*sizeof(uint32_t), sizeof(uint32_t)); cache->bo[i]->pitch = 4; done: cache->last = i; return kgem_bo_reference(cache->bo[i]); } static bool sna_alpha_cache_init(struct sna *sna) { struct sna_alpha_cache *cache = &sna->render.alpha_cache; uint32_t color[256 + 7]; int i; DBG(("%s\n", __FUNCTION__)); cache->cache_bo = kgem_create_linear(&sna->kgem, sizeof(color), 0); if (!cache->cache_bo) return false; for (i = 0; i < 256; i++) { color[i] = i << 24; cache->bo[i] = kgem_create_proxy(&sna->kgem, cache->cache_bo, sizeof(uint32_t)*i, sizeof(uint32_t)); if (cache->bo[i] == NULL) return false; cache->bo[i]->pitch = 4; } /* primary */ for (i = 1; i < 8; i++) { int j = 255+i; color[j] = 0xff << 24; if (i & 1) color[j] |= 0xff << 0; if (i & 2) color[j] |= 0xff << 8; if (i & 4) color[j] |= 0xff << 16; cache->bo[j] = kgem_create_proxy(&sna->kgem, cache->cache_bo, sizeof(uint32_t)*j, sizeof(uint32_t)); if (cache->bo[j] == NULL) return false; cache->bo[j]->pitch = 4; } return kgem_bo_write(&sna->kgem, cache->cache_bo, color, sizeof(color)); } static bool sna_solid_cache_init(struct sna *sna) { struct sna_solid_cache *cache = &sna->render.solid_cache; DBG(("%s\n", __FUNCTION__)); cache->cache_bo = kgem_create_linear(&sna->kgem, 4096, 0); if (!cache->cache_bo) return false; cache->last = 0; cache->color[cache->last] = 0; cache->dirty = 0; cache->size = 0; return true; } bool sna_gradients_create(struct sna *sna) { DBG(("%s\n", __FUNCTION__)); if (unlikely(sna->kgem.wedged)) return true; if (!sna_alpha_cache_init(sna)) return false; if (!sna_solid_cache_init(sna)) return false; return true; } void sna_gradients_close(struct sna *sna) { int i; DBG(("%s\n", __FUNCTION__)); for (i = 0; i < 256; i++) { if (sna->render.alpha_cache.bo[i]) { kgem_bo_destroy(&sna->kgem, sna->render.alpha_cache.bo[i]); sna->render.alpha_cache.bo[i] = NULL; } } if (sna->render.alpha_cache.cache_bo) { kgem_bo_destroy(&sna->kgem, sna->render.alpha_cache.cache_bo); sna->render.alpha_cache.cache_bo = NULL; } if (sna->render.solid_cache.cache_bo) kgem_bo_destroy(&sna->kgem, sna->render.solid_cache.cache_bo); for (i = 0; i < sna->render.solid_cache.size; i++) { if (sna->render.solid_cache.bo[i]) kgem_bo_destroy(&sna->kgem, sna->render.solid_cache.bo[i]); } sna->render.solid_cache.cache_bo = 0; sna->render.solid_cache.size = 0; sna->render.solid_cache.dirty = 0; for (i = 0; i < sna->render.gradient_cache.size; i++) { struct sna_gradient_cache *cache = &sna->render.gradient_cache.cache[i]; if (cache->bo) kgem_bo_destroy(&sna->kgem, cache->bo); free(cache->stops); cache->stops = NULL; cache->nstops = 0; } sna->render.gradient_cache.size = 0; } xf86-video-intel-2.99.917/src/sna/sna_trapezoids.h0000664000175000017500000002545612432737457016527 00000000000000#include #ifndef SNA_TRAPEZOIDS_H #define SNA_TRAPEZOIDS_H #define NO_ACCEL 0 #define FORCE_FALLBACK 0 #define NO_ALIGNED_BOXES 0 #define NO_UNALIGNED_BOXES 0 #define NO_SCAN_CONVERTER 0 #define NO_GPU_THREADS 0 #define NO_IMPRECISE 0 #define NO_PRECISE 0 #if 0 #define __DBG DBG #else #define __DBG(x) #endif bool composite_aligned_boxes(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int ntrap, const xTrapezoid *traps, bool force_fallback); bool composite_unaligned_boxes(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int ntrap, const xTrapezoid *traps, bool force_fallback); bool mono_trapezoids_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps); bool mono_trapezoid_span_inplace(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps); bool mono_triangles_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int count, xTriangle *tri); bool imprecise_trapezoid_span_inplace(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps, bool fallback); bool imprecise_trapezoid_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned int flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps); bool imprecise_trapezoid_mask_converter(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps); bool imprecise_trapezoid_span_fallback(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps); bool precise_trapezoid_span_inplace(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps, bool fallback); bool precise_trapezoid_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned int flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps); bool precise_trapezoid_mask_converter(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps); bool precise_trapezoid_span_fallback(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps); static inline bool is_mono(PicturePtr dst, PictFormatPtr mask) { return mask ? mask->depth < 8 : dst->polyEdge==PolyEdgeSharp; } static inline bool is_precise(PicturePtr dst, PictFormatPtr mask) { return dst->polyMode == PolyModePrecise && !is_mono(dst, mask); } static inline bool trapezoid_span_inplace(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps, bool fallback) { if (NO_SCAN_CONVERTER) return false; if (dst->alphaMap) { DBG(("%s: fallback -- dst alphamap\n", __FUNCTION__)); return false; } if (!fallback && is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS)) { DBG(("%s: fallback -- can not perform operation in place, destination busy\n", __FUNCTION__)); return false; } if (is_mono(dst, maskFormat)) return mono_trapezoid_span_inplace(sna, op, src, dst, src_x, src_y, ntrap, traps); else if (is_precise(dst, maskFormat)) return precise_trapezoid_span_inplace(sna, op, src, dst, maskFormat, flags, src_x, src_y, ntrap, traps, fallback); else return imprecise_trapezoid_span_inplace(sna, op, src, dst, maskFormat, flags, src_x, src_y, ntrap, traps, fallback); } static inline bool trapezoid_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned int flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps) { if (NO_SCAN_CONVERTER) return false; if (is_mono(dst, maskFormat)) return mono_trapezoids_span_converter(sna, op, src, dst, src_x, src_y, ntrap, traps); else if (is_precise(dst, maskFormat)) return precise_trapezoid_span_converter(sna, op, src, dst, maskFormat, flags, src_x, src_y, ntrap, traps); else return imprecise_trapezoid_span_converter(sna, op, src, dst, maskFormat, flags, src_x, src_y, ntrap, traps); } static inline bool trapezoid_mask_converter(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps) { if (NO_SCAN_CONVERTER) return false; if (is_precise(dst, maskFormat)) return precise_trapezoid_mask_converter(op, src, dst, maskFormat, flags, src_x, src_y, ntrap, traps); else return imprecise_trapezoid_mask_converter(op, src, dst, maskFormat, flags, src_x, src_y, ntrap, traps); } static inline bool trapezoid_span_fallback(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps) { if (NO_SCAN_CONVERTER) return false; if (is_precise(dst, maskFormat)) return precise_trapezoid_span_fallback(op, src, dst, maskFormat, flags, src_x, src_y, ntrap, traps); else return imprecise_trapezoid_span_fallback(op, src, dst, maskFormat, flags, src_x, src_y, ntrap, traps); } bool mono_trap_span_converter(struct sna *sna, PicturePtr dst, INT16 x, INT16 y, int ntrap, xTrap *traps); bool precise_trap_span_converter(struct sna *sna, PicturePtr dst, INT16 src_x, INT16 src_y, int ntrap, xTrap *trap); bool imprecise_trap_span_converter(struct sna *sna, PicturePtr dst, INT16 src_x, INT16 src_y, int ntrap, xTrap *trap); static inline bool trap_span_converter(struct sna *sna, PicturePtr dst, INT16 src_x, INT16 src_y, int ntrap, xTrap *trap) { if (NO_SCAN_CONVERTER) return false; if (dst->polyEdge == PolyEdgeSharp || dst->pDrawable->depth < 8) return mono_trap_span_converter(sna, dst, src_x, src_y, ntrap, trap); else if (dst->polyMode == PolyModePrecise) return precise_trap_span_converter(sna, dst, src_x, src_y, ntrap, trap); else return imprecise_trap_span_converter(sna, dst, src_x, src_y, ntrap, trap); } bool trap_mask_converter(struct sna *sna, PicturePtr picture, INT16 x, INT16 y, int ntrap, xTrap *trap); bool triangles_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int count, xTriangle *tri); bool triangles_mask_converter(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int count, xTriangle *tri); bool mono_tristrip_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int count, xPointFixed *points); bool imprecise_tristrip_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int count, xPointFixed *points); bool precise_tristrip_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int count, xPointFixed *points); static inline bool tristrip_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int count, xPointFixed *points) { if (NO_SCAN_CONVERTER) return false; if (is_mono(dst, maskFormat)) return mono_tristrip_span_converter(sna, op, src, dst, src_x, src_y, count, points); else if (is_precise(dst, maskFormat)) return precise_tristrip_span_converter(sna, op, src, dst, maskFormat, src_x, src_y, count, points); else return imprecise_tristrip_span_converter(sna, op, src, dst, maskFormat, src_x, src_y, count, points); } inline static void trapezoid_origin(const xLineFixed *l, int16_t *x, int16_t *y) { if (l->p1.y < l->p2.y) { *x = pixman_fixed_to_int(l->p1.x); *y = pixman_fixed_to_int(l->p1.y); } else { *x = pixman_fixed_to_int(l->p2.x); *y = pixman_fixed_to_int(l->p2.y); } } #define ONE_HALF 0x7f #define RB_MASK 0x00ff00ff #define RB_ONE_HALF 0x007f007f #define RB_MASK_PLUS_ONE 0x01000100 #define G_SHIFT 8 static force_inline uint32_t mul8x2_8 (uint32_t a, uint8_t b) { uint32_t t = (a & RB_MASK) * b + RB_ONE_HALF; return ((t + ((t >> G_SHIFT) & RB_MASK)) >> G_SHIFT) & RB_MASK; } static force_inline uint32_t add8x2_8x2(uint32_t a, uint32_t b) { uint32_t t = a + b; t |= RB_MASK_PLUS_ONE - ((t >> G_SHIFT) & RB_MASK); return t & RB_MASK; } static force_inline uint32_t lerp8x4(uint32_t src, uint8_t a, uint32_t dst) { return (add8x2_8x2(mul8x2_8(src, a), mul8x2_8(dst, ~a)) | add8x2_8x2(mul8x2_8(src >> G_SHIFT, a), mul8x2_8(dst >> G_SHIFT, ~a)) << G_SHIFT); } static force_inline uint8_t mul_8_8(uint8_t a, uint8_t b) { uint16_t t = a * (uint16_t)b + 0x7f; return ((t >> 8) + t) >> 8; } static inline uint32_t multa(uint32_t s, uint8_t a, int shift) { return mul_8_8((s >> shift) & 0xff, a) << shift; } static inline uint32_t mul_4x8_8(uint32_t color, uint8_t alpha) { uint32_t v; v = 0; v |= multa(color, alpha, 24); v |= multa(color, alpha, 16); v |= multa(color, alpha, 8); v |= multa(color, alpha, 0); return v; } static inline bool xTriangleValid(const xTriangle *t) { xPointFixed v1, v2; v1.x = t->p2.x - t->p1.x; v1.y = t->p2.y - t->p1.y; v2.x = t->p3.x - t->p1.x; v2.y = t->p3.y - t->p1.y; /* if the length of any edge is zero, the area must be zero */ if (v1.x == 0 && v1.y == 0) return false; if (v2.x == 0 && v2.y == 0) return false; /* if the cross-product is zero, so it the size */ return v2.y * v1.x != v1.y * v2.x; } #define SAMPLES_X 17 #define SAMPLES_Y 15 #define FAST_SAMPLES_shift 2 #define FAST_SAMPLES_X (1<> (16 - FAST_SAMPLES_shift); } bool trapezoids_bounds(int n, const xTrapezoid *t, BoxPtr box); #define TOR_INPLACE_SIZE 128 #endif /* SNA_TRAPEZOIDS_H */ xf86-video-intel-2.99.917/src/sna/sna_render_inline.h0000664000175000017500000002151312432737457017146 00000000000000#ifndef SNA_RENDER_INLINE_H #define SNA_RENDER_INLINE_H static inline bool need_tiling(struct sna *sna, int16_t width, int16_t height) { /* Is the damage area too large to fit in 3D pipeline, * and so do we need to split the operation up into tiles? */ return (width > sna->render.max_3d_size || height > sna->render.max_3d_size); } static inline bool need_redirect(struct sna *sna, PixmapPtr dst) { /* Is the pixmap too large to render to? */ return (dst->drawable.width > sna->render.max_3d_size || dst->drawable.height > sna->render.max_3d_size); } static force_inline float pack_2s(int16_t x, int16_t y) { union { struct sna_coordinate p; float f; } u; u.p.x = x; u.p.y = y; return u.f; } static force_inline int vertex_space(struct sna *sna) { return sna->render.vertex_size - sna->render.vertex_used; } static force_inline void vertex_emit(struct sna *sna, float v) { assert(sna->render.vertex_used < sna->render.vertex_size); sna->render.vertices[sna->render.vertex_used++] = v; } static force_inline void vertex_emit_2s(struct sna *sna, int16_t x, int16_t y) { vertex_emit(sna, pack_2s(x, y)); } static force_inline int batch_space(struct sna *sna) { assert(sna->kgem.nbatch <= KGEM_BATCH_SIZE(&sna->kgem)); assert(sna->kgem.nbatch + KGEM_BATCH_RESERVED <= sna->kgem.surface); return sna->kgem.surface - sna->kgem.nbatch - KGEM_BATCH_RESERVED; } static force_inline void batch_emit(struct sna *sna, uint32_t dword) { assert(sna->kgem.mode != KGEM_NONE); assert(sna->kgem.nbatch + KGEM_BATCH_RESERVED < sna->kgem.surface); sna->kgem.batch[sna->kgem.nbatch++] = dword; } static force_inline void batch_emit64(struct sna *sna, uint64_t qword) { assert(sna->kgem.mode != KGEM_NONE); assert(sna->kgem.nbatch + 2 + KGEM_BATCH_RESERVED < sna->kgem.surface); *(uint64_t *)(sna->kgem.batch+sna->kgem.nbatch) = qword; sna->kgem.nbatch += 2; } static force_inline void batch_emit_float(struct sna *sna, float f) { union { uint32_t dw; float f; } u; u.f = f; batch_emit(sna, u.dw); } static inline bool is_gpu(struct sna *sna, DrawablePtr drawable, unsigned prefer) { struct sna_pixmap *priv = sna_pixmap_from_drawable(drawable); if (priv == NULL || priv->clear || priv->cpu) return false; if (priv->cpu_damage == NULL) return true; if (priv->gpu_damage && !priv->gpu_bo->proxy && (sna->render.prefer_gpu & prefer)) return true; if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; if (DAMAGE_IS_ALL(priv->cpu_damage)) return false; return priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo); } static inline bool too_small(struct sna_pixmap *priv) { assert(priv); if (priv->gpu_bo) return false; if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return false; return (priv->create & KGEM_CAN_CREATE_GPU) == 0; } static inline bool can_render_to_picture(PicturePtr dst) { if (dst->alphaMap) { DBG(("%s(pixmap=%ld) -- no, has alphamap\n", __FUNCTION__, get_drawable_pixmap(dst->pDrawable)->drawable.serialNumber)); return false; } switch (PICT_FORMAT_TYPE(dst->format)) { case PICT_TYPE_COLOR: case PICT_TYPE_GRAY: case PICT_TYPE_OTHER: DBG(("%s(pixmap=%ld) -- no, has palette\n", __FUNCTION__, get_drawable_pixmap(dst->pDrawable)->drawable.serialNumber)); return false; default: break; } return true; } static inline bool is_gpu_dst(struct sna_pixmap *priv) { assert(priv); if (too_small(priv)) return false; if (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo)) return true; if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; if (DAMAGE_IS_ALL(priv->cpu_damage)) return false; return priv->gpu_damage != NULL || !priv->cpu; } static inline bool unattached(DrawablePtr drawable) { struct sna_pixmap *priv = sna_pixmap_from_drawable(drawable); return priv == NULL || (priv->gpu_damage == NULL && priv->cpu_damage && !priv->cpu_bo); } static inline bool picture_is_gpu(struct sna *sna, PicturePtr picture, unsigned flags) { if (!picture) return false; if (!picture->pDrawable) { switch (flags) { case PREFER_GPU_RENDER: switch (picture->pSourcePict->type) { case SourcePictTypeSolidFill: case SourcePictTypeLinear: return false; default: return true; } case PREFER_GPU_SPANS: return true; default: return false; } } else { if (picture->repeat && (picture->pDrawable->width | picture->pDrawable->height) == 1) return flags == PREFER_GPU_SPANS; } return is_gpu(sna, picture->pDrawable, flags); } static inline bool picture_is_cpu(struct sna *sna, PicturePtr picture) { if (!picture->pDrawable) return false; return !is_gpu(sna, picture->pDrawable, PREFER_GPU_RENDER); } static inline bool sna_blt_compare_depth(const DrawableRec *src, const DrawableRec *dst) { if (src->depth == dst->depth) return true; /* Also allow for the alpha to be discarded on a copy */ if (src->bitsPerPixel != dst->bitsPerPixel) return false; if (dst->depth == 24 && src->depth == 32) return true; /* Note that a depth-16 pixmap is r5g6b5, not x1r5g5b5. */ return false; } static inline struct kgem_bo * sna_render_get_alpha_gradient(struct sna *sna) { return kgem_bo_reference(sna->render.alpha_cache.cache_bo); } static inline void sna_render_picture_extents(PicturePtr p, BoxRec *box) { box->x1 = p->pDrawable->x; box->y1 = p->pDrawable->y; box->x2 = bound(box->x1, p->pDrawable->width); box->y2 = bound(box->y1, p->pDrawable->height); if (box->x1 < p->pCompositeClip->extents.x1) box->x1 = p->pCompositeClip->extents.x1; if (box->y1 < p->pCompositeClip->extents.y1) box->y1 = p->pCompositeClip->extents.y1; if (box->x2 > p->pCompositeClip->extents.x2) box->x2 = p->pCompositeClip->extents.x2; if (box->y2 > p->pCompositeClip->extents.y2) box->y2 = p->pCompositeClip->extents.y2; assert(box->x2 > box->x1 && box->y2 > box->y1); } static inline void sna_render_reduce_damage(struct sna_composite_op *op, int dst_x, int dst_y, int width, int height) { BoxRec r; if (op->damage == NULL || *op->damage == NULL) return; if (DAMAGE_IS_ALL(*op->damage)) { DBG(("%s: damage-all, dicarding damage\n", __FUNCTION__)); op->damage = NULL; return; } if (width == 0 || height == 0) return; r.x1 = dst_x + op->dst.x; r.x2 = r.x1 + width; r.y1 = dst_y + op->dst.y; r.y2 = r.y1 + height; if (sna_damage_contains_box__no_reduce(*op->damage, &r)) { DBG(("%s: damage contains render extents, dicarding damage\n", __FUNCTION__)); op->damage = NULL; } } inline static uint32_t color_convert(uint32_t pixel, uint32_t src_format, uint32_t dst_format) { DBG(("%s: src=%08x [%08x]\n", __FUNCTION__, pixel, src_format)); if (src_format != dst_format) { uint16_t red, green, blue, alpha; if (!sna_get_rgba_from_pixel(pixel, &red, &green, &blue, &alpha, src_format)) return 0; if (!sna_get_pixel_from_rgba(&pixel, red, green, blue, alpha, dst_format)) return 0; } DBG(("%s: dst=%08x [%08x]\n", __FUNCTION__, pixel, dst_format)); return pixel; } inline static bool dst_use_gpu(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv == NULL) return false; if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; if (priv->clear) return false; if (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo)) return true; return priv->gpu_damage && (!priv->cpu || !priv->cpu_damage); } inline static bool dst_use_cpu(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv == NULL || priv->shm) return true; return priv->cpu_damage && priv->cpu; } inline static bool dst_is_cpu(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); return priv == NULL || DAMAGE_IS_ALL(priv->cpu_damage); } inline static bool untransformed(PicturePtr p) { return !p->transform || pixman_transform_is_int_translate(p->transform); } inline static void boxes_extents(const BoxRec *box, int n, BoxRec *extents) { *extents = box[0]; while (--n) { box++; if (box->x1 < extents->x1) extents->x1 = box->x1; if (box->x2 > extents->x2) extents->x2 = box->x2; if (box->y1 < extents->y1) extents->y1 = box->y1; if (box->y2 > extents->y2) extents->y2 = box->y2; } } inline static bool overlaps(struct sna *sna, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, unsigned flags, BoxRec *extents) { if (src_bo != dst_bo) return false; if (flags & COPY_NO_OVERLAP) return false; boxes_extents(box, n, extents); return (extents->x2 + src_dx > extents->x1 + dst_dx && extents->x1 + src_dx < extents->x2 + dst_dx && extents->y2 + src_dy > extents->y1 + dst_dy && extents->y1 + src_dy < extents->y2 + dst_dy); } static inline long get_picture_id(PicturePtr picture) { return picture && picture->pDrawable ? get_drawable_pixmap(picture->pDrawable)->drawable.serialNumber : 0; } #endif /* SNA_RENDER_INLINE_H */ xf86-video-intel-2.99.917/src/sna/sna_video.c0000664000175000017500000004543112432737457015437 00000000000000/*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * i830_video.c: i830/i845 Xv driver. * * Copyright © 2002 by Alan Hourihane and David Dawes * * Authors: * Alan Hourihane * David Dawes * * Derived from i810 Xv driver: * * Authors of i810 code: * Jonathan Bian * Offscreen Images: * Matt Sottek */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include "sna.h" #include "sna_reg.h" #include "sna_video.h" #include "intel_options.h" #include #ifdef SNA_XVMC #define _SNA_XVMC_SERVER_ #include "sna_video_hwmc.h" #else static inline void sna_video_xvmc_setup(struct sna *sna, ScreenPtr ptr) { DBG(("%s: XvMC not compiled in\n", __FUNCTION__)); } #endif void sna_video_free_buffers(struct sna_video *video) { unsigned int i; for (i = 0; i < ARRAY_SIZE(video->old_buf); i++) { if (video->old_buf[i]) { kgem_bo_destroy(&video->sna->kgem, video->old_buf[i]); video->old_buf[i] = NULL; } } if (video->buf) { kgem_bo_destroy(&video->sna->kgem, video->buf); video->buf = NULL; } } struct kgem_bo * sna_video_buffer(struct sna_video *video, struct sna_video_frame *frame) { /* Free the current buffer if we're going to have to reallocate */ if (video->buf && __kgem_bo_size(video->buf) < frame->size) sna_video_free_buffers(video); if (video->buf && video->buf->scanout) { if (frame->width != video->width || frame->height != video->height || frame->id != video->format) sna_video_free_buffers(video); } if (video->buf == NULL) { if (video->tiled) { video->buf = kgem_create_2d(&video->sna->kgem, frame->width, frame->height, 32, I915_TILING_X, CREATE_EXACT); } else { video->buf = kgem_create_linear(&video->sna->kgem, frame->size, CREATE_GTT_MAP); } } video->width = frame->width; video->height = frame->height; video->format = frame->id; return video->buf; } void sna_video_buffer_fini(struct sna_video *video) { struct kgem_bo *bo; bo = video->old_buf[1]; video->old_buf[1] = video->old_buf[0]; video->old_buf[0] = video->buf; video->buf = bo; } bool sna_video_clip_helper(struct sna_video *video, struct sna_video_frame *frame, xf86CrtcPtr *crtc_ret, BoxPtr dst, short src_x, short src_y, short drw_x, short drw_y, short src_w, short src_h, short drw_w, short drw_h, RegionPtr reg) { bool ret; RegionRec crtc_region_local; RegionPtr crtc_region = reg; INT32 x1, x2, y1, y2; xf86CrtcPtr crtc; x1 = src_x; x2 = src_x + src_w; y1 = src_y; y2 = src_y + src_h; dst->x1 = drw_x; dst->x2 = drw_x + drw_w; dst->y1 = drw_y; dst->y2 = drw_y + drw_h; /* * For overlay video, compute the relevant CRTC and * clip video to that */ crtc = sna_covering_crtc(video->sna, dst, video->desired_crtc); /* For textured video, we don't actually want to clip at all. */ if (crtc && !video->textured) { crtc_region_local.extents = crtc->bounds; crtc_region_local.data = NULL; crtc_region = &crtc_region_local; RegionIntersect(crtc_region, crtc_region, reg); } *crtc_ret = crtc; ret = xf86XVClipVideoHelper(dst, &x1, &x2, &y1, &y2, crtc_region, frame->width, frame->height); if (crtc_region != reg) RegionUninit(crtc_region); frame->src.x1 = x1 >> 16; frame->src.y1 = y1 >> 16; frame->src.x2 = (x2 + 0xffff) >> 16; frame->src.y2 = (y2 + 0xffff) >> 16; frame->image.x1 = frame->src.x1 & ~1; frame->image.x2 = ALIGN(frame->src.x2, 2); if (is_planar_fourcc(frame->id)) { frame->image.y1 = frame->src.y1 & ~1; frame->image.y2 = ALIGN(frame->src.y2, 2); } else { frame->image.y1 = frame->src.y1; frame->image.y2 = frame->src.y2; } return ret; } void sna_video_frame_init(struct sna_video *video, int id, short width, short height, struct sna_video_frame *frame) { DBG(("%s: id=%d [planar? %d], width=%d, height=%d, align=%d\n", __FUNCTION__, id, is_planar_fourcc(id), width, height, video->alignment)); assert(width && height); frame->bo = NULL; frame->id = id; frame->width = width; frame->height = height; frame->rotation = 0; } void sna_video_frame_set_rotation(struct sna_video *video, struct sna_video_frame *frame, Rotation rotation) { unsigned width = frame->width; unsigned height = frame->height; unsigned align; DBG(("%s: rotation=%d\n", __FUNCTION__, rotation)); frame->rotation = rotation; align = video->alignment; #if SNA_XVMC /* for i915 xvmc, hw requires 1kb aligned surfaces */ if (frame->id == FOURCC_XVMC && video->sna->kgem.gen < 040 && align < 1024) align = 1024; #endif /* Determine the desired destination pitch (representing the * chroma's pitch in the planar case). */ if (is_planar_fourcc(frame->id)) { assert((width & 1) == 0); assert((height & 1) == 0); if (rotation & (RR_Rotate_90 | RR_Rotate_270)) { frame->pitch[0] = ALIGN((height / 2), align); frame->pitch[1] = ALIGN(height, align); frame->size = width; } else { frame->pitch[0] = ALIGN((width / 2), align); frame->pitch[1] = ALIGN(width, align); frame->size = height; } frame->size *= frame->pitch[0] + frame->pitch[1]; if (rotation & (RR_Rotate_90 | RR_Rotate_270)) { frame->UBufOffset = (int)frame->pitch[1] * width; frame->VBufOffset = frame->UBufOffset + (int)frame->pitch[0] * width / 2; } else { frame->UBufOffset = (int)frame->pitch[1] * height; frame->VBufOffset = frame->UBufOffset + (int)frame->pitch[0] * height / 2; } } else { switch (frame->id) { case FOURCC_RGB888: if (rotation & (RR_Rotate_90 | RR_Rotate_270)) { frame->pitch[0] = ALIGN((height << 2), align); frame->size = (int)frame->pitch[0] * width; } else { frame->pitch[0] = ALIGN((width << 2), align); frame->size = (int)frame->pitch[0] * height; } frame->UBufOffset = frame->VBufOffset = 0; break; case FOURCC_RGB565: if (rotation & (RR_Rotate_90 | RR_Rotate_270)) { frame->pitch[0] = ALIGN((height << 1), align); frame->size = (int)frame->pitch[0] * width; } else { frame->pitch[0] = ALIGN((width << 1), align); frame->size = (int)frame->pitch[0] * height; } frame->UBufOffset = frame->VBufOffset = 0; break; default: if (rotation & (RR_Rotate_90 | RR_Rotate_270)) { frame->pitch[0] = ALIGN((height << 1), align); frame->size = (int)frame->pitch[0] * width; } else { frame->pitch[0] = ALIGN((width << 1), align); frame->size = (int)frame->pitch[0] * height; } break; } frame->pitch[1] = 0; frame->UBufOffset = 0; frame->VBufOffset = 0; } assert(frame->size); } static void sna_memcpy_plane(struct sna_video *video, uint8_t *dst, const uint8_t *src, const struct sna_video_frame *frame, int sub) { int dstPitch = frame->pitch[!sub], srcPitch; const uint8_t *s; int i, j = 0; int x, y, w, h; x = frame->image.x1; y = frame->image.y1; w = frame->image.x2 - frame->image.x1; h = frame->image.y2 - frame->image.y1; if (sub) { x >>= 1; w >>= 1; y >>= 1; h >>= 1; srcPitch = ALIGN((frame->width >> 1), 4); } else srcPitch = ALIGN(frame->width, 4); src += y * srcPitch + x; if (!video->textured) x = y = 0; switch (frame->rotation) { case RR_Rotate_0: dst += y * dstPitch + x; if (srcPitch == dstPitch && srcPitch == w) memcpy(dst, src, srcPitch * h); else while (h--) { memcpy(dst, src, w); src += srcPitch; dst += dstPitch; } break; case RR_Rotate_90: for (i = 0; i < h; i++) { s = src; for (j = 0; j < w; j++) dst[i + ((x + w - j - 1) * dstPitch)] = *s++; src += srcPitch; } break; case RR_Rotate_180: for (i = 0; i < h; i++) { s = src; for (j = 0; j < w; j++) { dst[(x + w - j - 1) + ((h - i - 1) * dstPitch)] = *s++; } src += srcPitch; } break; case RR_Rotate_270: for (i = 0; i < h; i++) { s = src; for (j = 0; j < w; j++) { dst[(h - i - 1) + (x + j * dstPitch)] = *s++; } src += srcPitch; } break; } } static void sna_copy_planar_data(struct sna_video *video, const struct sna_video_frame *frame, const uint8_t *src, uint8_t *dst) { uint8_t *d; sna_memcpy_plane(video, dst, src, frame, 0); src += frame->height * ALIGN(frame->width, 4); if (frame->id == FOURCC_I420) d = dst + frame->UBufOffset; else d = dst + frame->VBufOffset; sna_memcpy_plane(video, d, src, frame, 1); src += (frame->height >> 1) * ALIGN(frame->width >> 1, 4); if (frame->id == FOURCC_I420) d = dst + frame->VBufOffset; else d = dst + frame->UBufOffset; sna_memcpy_plane(video, d, src, frame, 1); } static void sna_copy_packed_data(struct sna_video *video, const struct sna_video_frame *frame, const uint8_t *buf, uint8_t *dst) { int pitch = frame->width << 1; const uint8_t *src, *s; int x, y, w, h; int i, j; if (video->textured) { /* XXX support copying cropped extents */ x = y = 0; w = frame->width; h = frame->height; } else { x = frame->image.x1; y = frame->image.y1; w = frame->image.x2 - frame->image.x1; h = frame->image.y2 - frame->image.y1; } src = buf + (y * pitch) + (x << 1); switch (frame->rotation) { case RR_Rotate_0: w <<= 1; for (i = 0; i < h; i++) { memcpy(dst, src, w); src += pitch; dst += frame->pitch[0]; } break; case RR_Rotate_90: h <<= 1; for (i = 0; i < h; i += 2) { s = src; for (j = 0; j < w; j++) { /* Copy Y */ dst[(i + 0) + ((w - j - 1) * frame->pitch[0])] = *s; s += 2; } src += pitch; } h >>= 1; src = buf + (y * pitch) + (x << 1); for (i = 0; i < h; i += 2) { for (j = 0; j < w; j += 2) { /* Copy U */ dst[((i * 2) + 1) + ((w - j - 1) * frame->pitch[0])] = src[(j * 2) + 1 + (i * pitch)]; dst[((i * 2) + 1) + ((w - j - 2) * frame->pitch[0])] = src[(j * 2) + 1 + ((i + 1) * pitch)]; /* Copy V */ dst[((i * 2) + 3) + ((w - j - 1) * frame->pitch[0])] = src[(j * 2) + 3 + (i * pitch)]; dst[((i * 2) + 3) + ((w - j - 2) * frame->pitch[0])] = src[(j * 2) + 3 + ((i + 1) * pitch)]; } } break; case RR_Rotate_180: w <<= 1; for (i = 0; i < h; i++) { s = src; for (j = 0; j < w; j += 4) { dst[(w - j - 4) + ((h - i - 1) * frame->pitch[0])] = *s++; dst[(w - j - 3) + ((h - i - 1) * frame->pitch[0])] = *s++; dst[(w - j - 2) + ((h - i - 1) * frame->pitch[0])] = *s++; dst[(w - j - 1) + ((h - i - 1) * frame->pitch[0])] = *s++; } src += pitch; } break; case RR_Rotate_270: h <<= 1; for (i = 0; i < h; i += 2) { s = src; for (j = 0; j < w; j++) { /* Copy Y */ dst[(h - i - 2) + (j * frame->pitch[0])] = *s; s += 2; } src += pitch; } h >>= 1; src = buf + (y * pitch) + (x << 1); for (i = 0; i < h; i += 2) { for (j = 0; j < w; j += 2) { /* Copy U */ dst[(((h - i) * 2) - 3) + (j * frame->pitch[0])] = src[(j * 2) + 1 + (i * pitch)]; dst[(((h - i) * 2) - 3) + ((j + 1) * frame->pitch[0])] = src[(j * 2) + 1 + ((i + 1) * pitch)]; /* Copy V */ dst[(((h - i) * 2) - 1) + (j * frame->pitch[0])] = src[(j * 2) + 3 + (i * pitch)]; dst[(((h - i) * 2) - 1) + ((j + 1) * frame->pitch[0])] = src[(j * 2) + 3 + ((i + 1) * pitch)]; } } break; } } bool sna_video_copy_data(struct sna_video *video, struct sna_video_frame *frame, const uint8_t *buf) { uint8_t *dst; DBG(("%s: handle=%d, size=%dx%d [%d], pitch=[%d,%d] rotation=%d, is-texture=%d\n", __FUNCTION__, frame->bo ? frame->bo->handle : 0, frame->width, frame->height, frame->size, frame->pitch[0], frame->pitch[1], frame->rotation, video->textured)); DBG(("%s: image=(%d, %d), (%d, %d), source=(%d, %d), (%d, %d)\n", __FUNCTION__, frame->image.x1, frame->image.y1, frame->image.x2, frame->image.y2, frame->src.x1, frame->src.y1, frame->src.x2, frame->src.y2)); assert(frame->width && frame->height); assert(frame->rotation); assert(frame->size); /* In the common case, we can simply the upload in a single pwrite */ if (frame->rotation == RR_Rotate_0 && !video->tiled) { DBG(("%s: unrotated, untiled fast paths: is-planar?=%d\n", __FUNCTION__, is_planar_fourcc(frame->id))); if (is_planar_fourcc(frame->id)) { int w = frame->image.x2 - frame->image.x1; int h = frame->image.y2 - frame->image.y1; if (ALIGN(h, 2) == frame->height && ALIGN(w >> 1, 4) == frame->pitch[0] && ALIGN(w, 4) == frame->pitch[1]) { if (frame->bo) { if (!kgem_bo_write(&video->sna->kgem, frame->bo, buf, frame->size)) goto use_gtt; } else { frame->bo = kgem_create_buffer(&video->sna->kgem, frame->size, KGEM_BUFFER_WRITE | KGEM_BUFFER_WRITE_INPLACE, (void **)&dst); if (frame->bo == NULL) return false; memcpy(dst, buf, frame->size); } if (frame->id != FOURCC_I420) { uint32_t tmp; tmp = frame->VBufOffset; frame->VBufOffset = frame->UBufOffset; frame->UBufOffset = tmp; } return true; } } else { int x, y, w, h; if (video->textured) { /* XXX support copying cropped extents */ x = y = 0; w = frame->width; h = frame->height; } else { x = frame->image.x1; y = frame->image.y1; w = frame->image.x2 - frame->image.x1; h = frame->image.y2 - frame->image.y1; } if (w*2 == frame->pitch[0]) { buf += (2U*y * frame->width) + (x << 1); if (frame->bo) { if (!kgem_bo_write(&video->sna->kgem, frame->bo, buf, 2U*h*frame->width)) goto use_gtt; } else { frame->bo = kgem_create_buffer(&video->sna->kgem, frame->size, KGEM_BUFFER_WRITE | KGEM_BUFFER_WRITE_INPLACE, (void **)&dst); if (frame->bo == NULL) return false; memcpy(dst, buf, 2U*h*frame->width); } return true; } } DBG(("%s: source cropped, fallback\n", __FUNCTION__)); } use_gtt: /* copy data, must use GTT so that we keep the overlay uncached */ if (frame->bo) { dst = kgem_bo_map__gtt(&video->sna->kgem, frame->bo); if (dst == NULL) return false; } else { frame->bo = kgem_create_buffer(&video->sna->kgem, frame->size, KGEM_BUFFER_WRITE | KGEM_BUFFER_WRITE_INPLACE, (void **)&dst); if (frame->bo == NULL) return false; } if (is_planar_fourcc(frame->id)) sna_copy_planar_data(video, frame, buf, dst); else sna_copy_packed_data(video, frame, buf, dst); return true; } XvAdaptorPtr sna_xv_adaptor_alloc(struct sna *sna) { XvAdaptorPtr new_adaptors; new_adaptors = realloc(sna->xv.adaptors, (sna->xv.num_adaptors+1)*sizeof(XvAdaptorRec)); if (new_adaptors == NULL) return NULL; if (sna->xv.num_adaptors && new_adaptors != sna->xv.adaptors) { XvAdaptorPtr adaptor = new_adaptors; int i = sna->xv.num_adaptors, j; while (i--) { for (j = 0; j < adaptor->nPorts; j++) adaptor->pPorts[j].pAdaptor = adaptor; adaptor++; } } sna->xv.adaptors = new_adaptors; return &sna->xv.adaptors[sna->xv.num_adaptors++]; } int sna_xv_alloc_port(unsigned long port, XvPortPtr in, XvPortPtr *out) { *out = in; return Success; } int sna_xv_free_port(XvPortPtr port) { return Success; } int sna_xv_fixup_formats(ScreenPtr screen, XvFormatPtr formats, int num_formats) { XvFormatPtr out = formats; int count = 0; while (num_formats--) { int num_visuals = screen->numVisuals; VisualPtr v = screen->visuals; while (num_visuals--) { if (v->class == TrueColor && v->nplanes == formats->depth) { int tmp = out[count].depth; out[count].depth = formats->depth; out[count].visual = v->vid; formats->depth = tmp; count++; break; } v++; } formats++; } return count; } #if XORG_XV_VERSION < 2 static int sna_xv_query_adaptors(ScreenPtr screen, XvAdaptorPtr *adaptors, int *num_adaptors) { struct sna *sna = to_sna_from_screen(screen); *num_adaptors = sna->xv.num_adaptors; *adaptors = sna->xv.adaptors; return Success; } static Bool sna_xv_close_screen(CLOSE_SCREEN_ARGS_DECL) { struct sna *sna = to_sna_from_screen(screen); sna_video_close(sna); return TRUE; } #endif void sna_video_init(struct sna *sna, ScreenPtr screen) { XvScreenPtr xv; if (noXvExtension) return; if (xf86LoaderCheckSymbol("xf86XVListGenericAdaptors")) { XF86VideoAdaptorPtr *adaptors = NULL; int num_adaptors = xf86XVListGenericAdaptors(sna->scrn, &adaptors); if (num_adaptors) xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, "Ignoring generic xf86XV adaptors"); free(adaptors); } if (XvScreenInit(screen) != Success) return; xv = to_xv(screen); #if XORG_XV_VERSION < 2 xv->ddCloseScreen = sna_xv_close_screen; xv->ddQueryAdaptors = sna_xv_query_adaptors; #endif sna_video_textured_setup(sna, screen); sna_video_sprite_setup(sna, screen); sna_video_overlay_setup(sna, screen); if (sna->xv.num_adaptors >= 2 && xf86ReturnOptValBool(sna->Options, OPTION_PREFER_OVERLAY, false)) { XvAdaptorRec tmp; tmp = sna->xv.adaptors[0]; sna->xv.adaptors[0] = sna->xv.adaptors[1]; sna->xv.adaptors[1] = tmp; } xv->nAdaptors = sna->xv.num_adaptors; xv->pAdaptors = sna->xv.adaptors; sna_video_xvmc_setup(sna, screen); } void sna_video_destroy_window(WindowPtr win) { XvPortPtr port; port = sna_window_get_port(win); if (port) { #if XORG_XV_VERSION < 2 port->pAdaptor->ddStopVideo(NULL, port, &win->drawable); #else port->pAdaptor->ddStopVideo(port, &win->drawable); #endif } assert(sna_window_get_port(win) == NULL); } void sna_video_close(struct sna *sna) { int i; for (i = 0; i < sna->xv.num_adaptors; i++) { free(sna->xv.adaptors[i].pPorts->devPriv.ptr); free(sna->xv.adaptors[i].pPorts); free(sna->xv.adaptors[i].pEncodings); } free(sna->xv.adaptors); sna->xv.adaptors = NULL; sna->xv.num_adaptors = 0; } xf86-video-intel-2.99.917/src/sna/sna_vertex.c0000664000175000017500000000267312400044327015625 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include void sna_vertex_init(struct sna *sna) { pthread_mutex_init(&sna->render.lock, NULL); pthread_cond_init(&sna->render.wait, NULL); sna->render.active = 0; } xf86-video-intel-2.99.917/src/sna/gen2_render.c0000664000175000017500000026740312432737457015667 00000000000000/* * Copyright © 2006,2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Wang Zhenyu * Eric Anholt * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_reg.h" #include "sna_render.h" #include "sna_render_inline.h" #include "gen2_render.h" #define NO_COMPOSITE 0 #define NO_COMPOSITE_SPANS 0 #define NO_COPY 0 #define NO_COPY_BOXES 0 #define NO_FILL 0 #define NO_FILL_ONE 0 #define NO_FILL_BOXES 0 #define MAX_3D_SIZE 2048 #define MAX_3D_PITCH 8192 #define BATCH(v) batch_emit(sna, v) #define BATCH_F(v) batch_emit_float(sna, v) #define VERTEX(v) batch_emit_float(sna, v) static const struct blendinfo { bool dst_alpha; bool src_alpha; uint32_t src_blend; uint32_t dst_blend; } gen2_blend_op[] = { /* Clear */ {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ZERO}, /* Src */ {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO}, /* Dst */ {0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE}, /* Over */ {0, 1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA}, /* OverReverse */ {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE}, /* In */ {1, 0, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_ZERO}, /* InReverse */ {0, 1, BLENDFACTOR_ZERO, BLENDFACTOR_SRC_ALPHA}, /* Out */ {1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ZERO}, /* OutReverse */ {0, 1, BLENDFACTOR_ZERO, BLENDFACTOR_INV_SRC_ALPHA}, /* Atop */ {1, 1, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA}, /* AtopReverse */ {1, 1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_SRC_ALPHA}, /* Xor */ {1, 1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA}, /* Add */ {0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ONE}, }; static const struct formatinfo { unsigned int fmt; uint32_t card_fmt; } i8xx_tex_formats[] = { {PICT_a8, MAPSURF_8BIT | MT_8BIT_A8}, {PICT_a8r8g8b8, MAPSURF_32BIT | MT_32BIT_ARGB8888}, {PICT_a8b8g8r8, MAPSURF_32BIT | MT_32BIT_ABGR8888}, {PICT_r5g6b5, MAPSURF_16BIT | MT_16BIT_RGB565}, {PICT_a1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555}, {PICT_a4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444}, }, i85x_tex_formats[] = { {PICT_x8r8g8b8, MAPSURF_32BIT | MT_32BIT_XRGB8888}, {PICT_x8b8g8r8, MAPSURF_32BIT | MT_32BIT_XBGR8888}, }; static inline bool too_large(int width, int height) { return width > MAX_3D_SIZE || height > MAX_3D_SIZE; } static inline uint32_t gen2_buf_tiling(uint32_t tiling) { uint32_t v = 0; switch (tiling) { default: assert(0); case I915_TILING_Y: v |= BUF_3D_TILE_WALK_Y; case I915_TILING_X: v |= BUF_3D_TILED_SURFACE; case I915_TILING_NONE: break; } return v; } static uint32_t gen2_get_dst_format(uint32_t format) { #define BIAS DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8) switch (format) { default: assert(0); case PICT_a8r8g8b8: case PICT_x8r8g8b8: return COLR_BUF_ARGB8888 | BIAS; case PICT_r5g6b5: return COLR_BUF_RGB565 | BIAS; case PICT_a1r5g5b5: case PICT_x1r5g5b5: return COLR_BUF_ARGB1555 | BIAS; case PICT_a8: return COLR_BUF_8BIT | BIAS; case PICT_a4r4g4b4: case PICT_x4r4g4b4: return COLR_BUF_ARGB4444 | BIAS; } #undef BIAS } static bool gen2_check_dst_format(uint32_t format) { switch (format) { case PICT_a8r8g8b8: case PICT_x8r8g8b8: case PICT_r5g6b5: case PICT_a1r5g5b5: case PICT_x1r5g5b5: case PICT_a8: case PICT_a4r4g4b4: case PICT_x4r4g4b4: return true; default: return false; } } static uint32_t gen2_get_card_format(struct sna *sna, uint32_t format) { unsigned int i; for (i = 0; i < ARRAY_SIZE(i8xx_tex_formats); i++) if (i8xx_tex_formats[i].fmt == format) return i8xx_tex_formats[i].card_fmt; if (sna->kgem.gen < 021) { /* Whilst these are not directly supported on 830/845, * we only enable them when we can implicitly convert * them to a supported variant through the texture * combiners. */ for (i = 0; i < ARRAY_SIZE(i85x_tex_formats); i++) if (i85x_tex_formats[i].fmt == format) return i8xx_tex_formats[1+i].card_fmt; } else { for (i = 0; i < ARRAY_SIZE(i85x_tex_formats); i++) if (i85x_tex_formats[i].fmt == format) return i85x_tex_formats[i].card_fmt; } assert(0); return 0; } static uint32_t gen2_check_format(struct sna *sna, PicturePtr p) { unsigned int i; for (i = 0; i < ARRAY_SIZE(i8xx_tex_formats); i++) if (i8xx_tex_formats[i].fmt == p->format) return true; if (sna->kgem.gen > 021) { for (i = 0; i < ARRAY_SIZE(i85x_tex_formats); i++) if (i85x_tex_formats[i].fmt == p->format) return true; } return false; } static uint32_t gen2_sampler_tiling_bits(uint32_t tiling) { uint32_t bits = 0; switch (tiling) { default: assert(0); case I915_TILING_Y: bits |= TM0S1_TILE_WALK; case I915_TILING_X: bits |= TM0S1_TILED_SURFACE; case I915_TILING_NONE: break; } return bits; } static bool gen2_check_filter(PicturePtr picture) { switch (picture->filter) { case PictFilterNearest: case PictFilterBilinear: return true; default: return false; } } static bool gen2_check_repeat(PicturePtr picture) { if (!picture->repeat) return true; switch (picture->repeatType) { case RepeatNone: case RepeatNormal: case RepeatPad: case RepeatReflect: return true; default: return false; } } static void gen2_emit_texture(struct sna *sna, const struct sna_composite_channel *channel, int unit) { uint32_t wrap_mode_u, wrap_mode_v; uint32_t texcoordtype; uint32_t filter; assert(channel->bo); if (channel->is_affine) texcoordtype = TEXCOORDTYPE_CARTESIAN; else texcoordtype = TEXCOORDTYPE_HOMOGENEOUS; switch (channel->repeat) { default: assert(0); case RepeatNone: wrap_mode_u = TEXCOORDMODE_CLAMP_BORDER; break; case RepeatNormal: wrap_mode_u = TEXCOORDMODE_WRAP; break; case RepeatPad: wrap_mode_u = TEXCOORDMODE_CLAMP; break; case RepeatReflect: wrap_mode_u = TEXCOORDMODE_MIRROR; break; } if (channel->is_linear) wrap_mode_v = TEXCOORDMODE_WRAP; else wrap_mode_v = wrap_mode_u; switch (channel->filter) { default: assert(0); case PictFilterNearest: filter = (FILTER_NEAREST << TM0S3_MAG_FILTER_SHIFT | FILTER_NEAREST << TM0S3_MIN_FILTER_SHIFT | MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT); break; case PictFilterBilinear: filter = (FILTER_LINEAR << TM0S3_MAG_FILTER_SHIFT | FILTER_LINEAR << TM0S3_MIN_FILTER_SHIFT | MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT); break; } BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_MAP(unit) | 4); BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, channel->bo, I915_GEM_DOMAIN_SAMPLER << 16, 0)); BATCH(((channel->height - 1) << TM0S1_HEIGHT_SHIFT) | ((channel->width - 1) << TM0S1_WIDTH_SHIFT) | gen2_get_card_format(sna, channel->pict_format) | gen2_sampler_tiling_bits(channel->bo->tiling)); BATCH((channel->bo->pitch / 4 - 1) << TM0S2_PITCH_SHIFT | TM0S2_MAP_2D); BATCH(filter); BATCH(0); /* default color */ BATCH(_3DSTATE_MAP_COORD_SET_CMD | TEXCOORD_SET(unit) | ENABLE_TEXCOORD_PARAMS | TEXCOORDS_ARE_NORMAL | texcoordtype | ENABLE_ADDR_V_CNTL | TEXCOORD_ADDR_V_MODE(wrap_mode_v) | ENABLE_ADDR_U_CNTL | TEXCOORD_ADDR_U_MODE(wrap_mode_u)); } static void gen2_get_blend_factors(const struct sna_composite_op *op, int blend, uint32_t *c_out, uint32_t *a_out) { uint32_t cblend, ablend; /* If component alpha is active in the mask and the blend operation * uses the source alpha, then we know we don't need the source * value (otherwise we would have hit a fallback earlier), so we * provide the source alpha (src.A * mask.X) as output color. * Conversely, if CA is set and we don't need the source alpha, then * we produce the source value (src.X * mask.X) and the source alpha * is unused.. Otherwise, we provide the non-CA source value * (src.X * mask.A). * * The PICT_FORMAT_RGB(pict) == 0 fixups are not needed on 855+'s a8 * pictures, but we need to implement it for 830/845 and there's no * harm done in leaving it in. */ cblend = TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OUTPUT_WRITE_CURRENT; ablend = TB0A_RESULT_SCALE_1X | TB0A_OUTPUT_WRITE_CURRENT; /* Get the source picture's channels into TBx_ARG1 */ if ((op->has_component_alpha && gen2_blend_op[blend].src_alpha) || op->dst.format == PICT_a8) { /* Producing source alpha value, so the first set of channels * is src.A instead of src.X. We also do this if the destination * is a8, in which case src.G is what's written, and the other * channels are ignored. */ if (op->src.is_opaque) { ablend |= TB0C_ARG1_SEL_ONE; cblend |= TB0C_ARG1_SEL_ONE; } else if (op->src.is_solid) { ablend |= TB0C_ARG1_SEL_DIFFUSE; cblend |= TB0C_ARG1_SEL_DIFFUSE | TB0C_ARG1_REPLICATE_ALPHA; } else { ablend |= TB0C_ARG1_SEL_TEXEL0; cblend |= TB0C_ARG1_SEL_TEXEL0 | TB0C_ARG1_REPLICATE_ALPHA; } } else { if (op->src.is_solid) cblend |= TB0C_ARG1_SEL_DIFFUSE; else if (PICT_FORMAT_RGB(op->src.pict_format) != 0) cblend |= TB0C_ARG1_SEL_TEXEL0; else cblend |= TB0C_ARG1_SEL_ONE | TB0C_ARG1_INVERT; /* 0.0 */ if (op->src.is_opaque) ablend |= TB0A_ARG1_SEL_ONE; else if (op->src.is_solid) ablend |= TB0A_ARG1_SEL_DIFFUSE; else ablend |= TB0A_ARG1_SEL_TEXEL0; } if (op->mask.bo) { if (op->src.is_solid) { cblend |= TB0C_ARG2_SEL_TEXEL0; ablend |= TB0A_ARG2_SEL_TEXEL0; } else { cblend |= TB0C_ARG2_SEL_TEXEL1; ablend |= TB0A_ARG2_SEL_TEXEL1; } if (op->dst.format == PICT_a8 || !op->has_component_alpha) cblend |= TB0C_ARG2_REPLICATE_ALPHA; cblend |= TB0C_OP_MODULATE; ablend |= TB0A_OP_MODULATE; } else if (op->mask.is_solid) { cblend |= TB0C_ARG2_SEL_DIFFUSE; ablend |= TB0A_ARG2_SEL_DIFFUSE; if (op->dst.format == PICT_a8 || !op->has_component_alpha) cblend |= TB0C_ARG2_REPLICATE_ALPHA; cblend |= TB0C_OP_MODULATE; ablend |= TB0A_OP_MODULATE; } else { cblend |= TB0C_OP_ARG1; ablend |= TB0A_OP_ARG1; } *c_out = cblend; *a_out = ablend; } static uint32_t gen2_get_blend_cntl(int op, bool has_component_alpha, uint32_t dst_format) { uint32_t sblend, dblend; if (op <= PictOpSrc) return S8_ENABLE_COLOR_BUFFER_WRITE; sblend = gen2_blend_op[op].src_blend; dblend = gen2_blend_op[op].dst_blend; if (gen2_blend_op[op].dst_alpha) { /* If there's no dst alpha channel, adjust the blend op so that * we'll treat it as always 1. */ if (PICT_FORMAT_A(dst_format) == 0) { if (sblend == BLENDFACTOR_DST_ALPHA) sblend = BLENDFACTOR_ONE; else if (sblend == BLENDFACTOR_INV_DST_ALPHA) sblend = BLENDFACTOR_ZERO; } /* gen2 engine reads 8bit color buffer into green channel * in cases like color buffer blending etc., and also writes * back green channel. So with dst_alpha blend we should use * color factor. */ if (dst_format == PICT_a8) { if (sblend == BLENDFACTOR_DST_ALPHA) sblend = BLENDFACTOR_DST_COLR; else if (sblend == BLENDFACTOR_INV_DST_ALPHA) sblend = BLENDFACTOR_INV_DST_COLR; } } /* If the source alpha is being used, then we should only be in a case * where the source blend factor is 0, and the source blend value is * the mask channels multiplied by the source picture's alpha. */ if (has_component_alpha && gen2_blend_op[op].src_alpha) { if (dblend == BLENDFACTOR_SRC_ALPHA) dblend = BLENDFACTOR_SRC_COLR; else if (dblend == BLENDFACTOR_INV_SRC_ALPHA) dblend = BLENDFACTOR_INV_SRC_COLR; } return (sblend << S8_SRC_BLEND_FACTOR_SHIFT | dblend << S8_DST_BLEND_FACTOR_SHIFT | S8_ENABLE_COLOR_BLEND | S8_BLENDFUNC_ADD | S8_ENABLE_COLOR_BUFFER_WRITE); } static void gen2_emit_invariant(struct sna *sna) { int i; for (i = 0; i < 4; i++) { BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(i)); BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | MAP_UNIT(i) | DISABLE_TEX_STREAM_BUMP | ENABLE_TEX_STREAM_COORD_SET | TEX_STREAM_COORD_SET(i) | ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(i)); BATCH(_3DSTATE_MAP_COORD_TRANSFORM); BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(i)); } BATCH(_3DSTATE_MAP_COORD_SETBIND_CMD); BATCH(TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) | TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) | TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) | TEXBIND_SET0(TEXCOORDSRC_VTXSET_0)); BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); BATCH(_3DSTATE_VERTEX_TRANSFORM); BATCH(DISABLE_VIEWPORT_TRANSFORM | DISABLE_PERSPECTIVE_DIVIDE); BATCH(_3DSTATE_W_STATE_CMD); BATCH(MAGIC_W_STATE_DWORD1); BATCH_F(1.0); BATCH(_3DSTATE_INDPT_ALPHA_BLEND_CMD | DISABLE_INDPT_ALPHA_BLEND | ENABLE_ALPHA_BLENDFUNC | ABLENDFUNC_ADD); BATCH(_3DSTATE_CONST_BLEND_COLOR_CMD); BATCH(0); BATCH(_3DSTATE_MODES_1_CMD | ENABLE_COLR_BLND_FUNC | BLENDFUNC_ADD | ENABLE_SRC_BLND_FACTOR | SRC_BLND_FACT(BLENDFACTOR_ONE) | ENABLE_DST_BLND_FACTOR | DST_BLND_FACT(BLENDFACTOR_ZERO)); BATCH(_3DSTATE_ENABLES_1_CMD | DISABLE_LOGIC_OP | DISABLE_STENCIL_TEST | DISABLE_DEPTH_BIAS | DISABLE_SPEC_ADD | DISABLE_FOG | DISABLE_ALPHA_TEST | DISABLE_DEPTH_TEST | ENABLE_COLOR_BLEND); BATCH(_3DSTATE_ENABLES_2_CMD | DISABLE_STENCIL_WRITE | DISABLE_DITHER | DISABLE_DEPTH_WRITE | ENABLE_COLOR_MASK | ENABLE_COLOR_WRITE | ENABLE_TEX_CACHE); BATCH(_3DSTATE_STIPPLE); BATCH(0); BATCH(_3DSTATE_MAP_BLEND_OP_CMD(0) | TEXPIPE_COLOR | ENABLE_TEXOUTPUT_WRT_SEL | TEXOP_OUTPUT_CURRENT | DISABLE_TEX_CNTRL_STAGE | TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXOP_LAST_STAGE | TEXBLENDOP_ARG1); BATCH(_3DSTATE_MAP_BLEND_OP_CMD(0) | TEXPIPE_ALPHA | ENABLE_TEXOUTPUT_WRT_SEL | TEXOP_OUTPUT_CURRENT | TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1); BATCH(_3DSTATE_MAP_BLEND_ARG_CMD(0) | TEXPIPE_COLOR | TEXBLEND_ARG1 | TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE); BATCH(_3DSTATE_MAP_BLEND_ARG_CMD(0) | TEXPIPE_ALPHA | TEXBLEND_ARG1 | TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE); #define INVARIANT_SIZE 35 sna->render_state.gen2.need_invariant = false; } static void gen2_get_batch(struct sna *sna, const struct sna_composite_op *op) { kgem_set_mode(&sna->kgem, KGEM_RENDER, op->dst.bo); if (!kgem_check_batch(&sna->kgem, INVARIANT_SIZE+40)) { DBG(("%s: flushing batch: size %d > %d\n", __FUNCTION__, INVARIANT_SIZE+40, sna->kgem.surface-sna->kgem.nbatch)); kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } if (!kgem_check_reloc(&sna->kgem, 3)) { DBG(("%s: flushing batch: reloc %d >= %d\n", __FUNCTION__, sna->kgem.nreloc + 3, (int)KGEM_RELOC_SIZE(&sna->kgem))); kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } if (!kgem_check_exec(&sna->kgem, 3)) { DBG(("%s: flushing batch: exec %d >= %d\n", __FUNCTION__, sna->kgem.nexec + 1, (int)KGEM_EXEC_SIZE(&sna->kgem))); kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } if (sna->render_state.gen2.need_invariant) gen2_emit_invariant(sna); } static void gen2_emit_target(struct sna *sna, const struct sna_composite_op *op) { assert(!too_large(op->dst.width, op->dst.height)); assert(op->dst.bo->pitch >= 8 && op->dst.bo->pitch <= MAX_3D_PITCH); assert(sna->render.vertex_offset == 0); assert(op->dst.bo->unique_id); if (sna->render_state.gen2.target == op->dst.bo->unique_id) { kgem_bo_mark_dirty(op->dst.bo); return; } BATCH(_3DSTATE_BUF_INFO_CMD); BATCH(BUF_3D_ID_COLOR_BACK | gen2_buf_tiling(op->dst.bo->tiling) | BUF_3D_PITCH(op->dst.bo->pitch)); BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, op->dst.bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER, 0)); BATCH(_3DSTATE_DST_BUF_VARS_CMD); BATCH(gen2_get_dst_format(op->dst.format)); BATCH(_3DSTATE_DRAW_RECT_CMD); BATCH(0); BATCH(0); /* ymin, xmin */ BATCH(DRAW_YMAX(op->dst.height - 1) | DRAW_XMAX(op->dst.width - 1)); BATCH(0); /* yorig, xorig */ sna->render_state.gen2.target = op->dst.bo->unique_id; } static void gen2_disable_logic_op(struct sna *sna) { if (!sna->render_state.gen2.logic_op_enabled) return; DBG(("%s\n", __FUNCTION__)); BATCH(_3DSTATE_ENABLES_1_CMD | DISABLE_LOGIC_OP | ENABLE_COLOR_BLEND); sna->render_state.gen2.logic_op_enabled = 0; } static void gen2_enable_logic_op(struct sna *sna, int op) { static const uint8_t logic_op[] = { LOGICOP_CLEAR, /* GXclear */ LOGICOP_AND, /* GXand */ LOGICOP_AND_RVRSE, /* GXandReverse */ LOGICOP_COPY, /* GXcopy */ LOGICOP_AND_INV, /* GXandInverted */ LOGICOP_NOOP, /* GXnoop */ LOGICOP_XOR, /* GXxor */ LOGICOP_OR, /* GXor */ LOGICOP_NOR, /* GXnor */ LOGICOP_EQUIV, /* GXequiv */ LOGICOP_INV, /* GXinvert */ LOGICOP_OR_RVRSE, /* GXorReverse */ LOGICOP_COPY_INV, /* GXcopyInverted */ LOGICOP_OR_INV, /* GXorInverted */ LOGICOP_NAND, /* GXnand */ LOGICOP_SET /* GXset */ }; if (sna->render_state.gen2.logic_op_enabled != op+1) { if (!sna->render_state.gen2.logic_op_enabled) { if (op == GXclear || op == GXcopy) return; DBG(("%s\n", __FUNCTION__)); BATCH(_3DSTATE_ENABLES_1_CMD | ENABLE_LOGIC_OP | DISABLE_COLOR_BLEND); } BATCH(_3DSTATE_MODES_4_CMD | ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(logic_op[op])); sna->render_state.gen2.logic_op_enabled = op+1; } } static void gen2_emit_composite_state(struct sna *sna, const struct sna_composite_op *op) { uint32_t texcoordfmt, v, unwind; uint32_t cblend, ablend; int tex; gen2_get_batch(sna, op); if (kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo)) { if (op->src.bo == op->dst.bo || op->mask.bo == op->dst.bo) BATCH(MI_FLUSH | MI_INVALIDATE_MAP_CACHE); else BATCH(_3DSTATE_MODES_5_CMD | PIPELINE_FLUSH_RENDER_CACHE | PIPELINE_FLUSH_TEXTURE_CACHE); kgem_clear_dirty(&sna->kgem); } gen2_emit_target(sna, op); unwind = sna->kgem.nbatch; BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2); BATCH((!op->src.is_solid + (op->mask.bo != NULL)) << 12); BATCH(S3_CULLMODE_NONE | S3_VERTEXHAS_XY); BATCH(gen2_get_blend_cntl(op->op, op->has_component_alpha, op->dst.format)); if (memcmp(sna->kgem.batch + sna->render_state.gen2.ls1 + 1, sna->kgem.batch + unwind + 1, 3 * sizeof(uint32_t)) == 0) sna->kgem.nbatch = unwind; else sna->render_state.gen2.ls1 = unwind; gen2_disable_logic_op(sna); gen2_get_blend_factors(op, op->op, &cblend, &ablend); unwind = sna->kgem.nbatch; BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_BLEND_STAGE(0) | 1); BATCH(cblend); BATCH(ablend); if (memcmp(sna->kgem.batch + sna->render_state.gen2.ls2 + 1, sna->kgem.batch + unwind + 1, 2 * sizeof(uint32_t)) == 0) sna->kgem.nbatch = unwind; else sna->render_state.gen2.ls2 = unwind; tex = texcoordfmt = 0; if (!op->src.is_solid) { if (op->src.is_affine) texcoordfmt |= TEXCOORDFMT_2D << (2*tex); else texcoordfmt |= TEXCOORDFMT_3D << (2*tex); gen2_emit_texture(sna, &op->src, tex++); } else { if (op->src.u.gen2.pixel != sna->render_state.gen2.diffuse) { BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); BATCH(op->src.u.gen2.pixel); sna->render_state.gen2.diffuse = op->src.u.gen2.pixel; } } if (op->mask.bo) { if (op->mask.is_affine) texcoordfmt |= TEXCOORDFMT_2D << (2*tex); else texcoordfmt |= TEXCOORDFMT_3D << (2*tex); gen2_emit_texture(sna, &op->mask, tex++); } else if (op->mask.is_solid) { if (op->mask.u.gen2.pixel != sna->render_state.gen2.diffuse) { BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); BATCH(op->mask.u.gen2.pixel); sna->render_state.gen2.diffuse = op->mask.u.gen2.pixel; } } v = _3DSTATE_VERTEX_FORMAT_2_CMD | texcoordfmt; if (sna->render_state.gen2.vft != v) { BATCH(v); sna->render_state.gen2.vft = v; } } static inline void gen2_emit_composite_dstcoord(struct sna *sna, int dstX, int dstY) { VERTEX(dstX); VERTEX(dstY); } inline static void gen2_emit_composite_linear(struct sna *sna, const struct sna_composite_channel *channel, int16_t x, int16_t y) { float v; v = (x * channel->u.linear.dx + y * channel->u.linear.dy + channel->u.linear.offset); DBG(("%s: (%d, %d) -> %f\n", __FUNCTION__, x, y, v)); VERTEX(v); VERTEX(v); } static void gen2_emit_composite_texcoord(struct sna *sna, const struct sna_composite_channel *channel, int16_t x, int16_t y) { float s = 0, t = 0, w = 1; x += channel->offset[0]; y += channel->offset[1]; if (channel->is_affine) { sna_get_transformed_coordinates(x, y, channel->transform, &s, &t); VERTEX(s * channel->scale[0]); VERTEX(t * channel->scale[1]); } else { sna_get_transformed_coordinates_3d(x, y, channel->transform, &s, &t, &w); VERTEX(s * channel->scale[0]); VERTEX(t * channel->scale[1]); VERTEX(w); } } static void gen2_emit_composite_vertex(struct sna *sna, const struct sna_composite_op *op, int16_t srcX, int16_t srcY, int16_t mskX, int16_t mskY, int16_t dstX, int16_t dstY) { gen2_emit_composite_dstcoord(sna, dstX, dstY); if (op->src.is_linear) gen2_emit_composite_linear(sna, &op->src, srcX, srcY); else if (!op->src.is_solid) gen2_emit_composite_texcoord(sna, &op->src, srcX, srcY); if (op->mask.is_linear) gen2_emit_composite_linear(sna, &op->mask, mskX, mskY); else if (op->mask.bo) gen2_emit_composite_texcoord(sna, &op->mask, mskX, mskY); } fastcall static void gen2_emit_composite_primitive(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { gen2_emit_composite_vertex(sna, op, r->src.x + r->width, r->src.y + r->height, r->mask.x + r->width, r->mask.y + r->height, op->dst.x + r->dst.x + r->width, op->dst.y + r->dst.y + r->height); gen2_emit_composite_vertex(sna, op, r->src.x, r->src.y + r->height, r->mask.x, r->mask.y + r->height, op->dst.x + r->dst.x, op->dst.y + r->dst.y + r->height); gen2_emit_composite_vertex(sna, op, r->src.x, r->src.y, r->mask.x, r->mask.y, op->dst.x + r->dst.x, op->dst.y + r->dst.y); } fastcall static void gen2_emit_composite_primitive_constant(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int16_t dst_x = r->dst.x + op->dst.x; int16_t dst_y = r->dst.y + op->dst.y; gen2_emit_composite_dstcoord(sna, dst_x + r->width, dst_y + r->height); gen2_emit_composite_dstcoord(sna, dst_x, dst_y + r->height); gen2_emit_composite_dstcoord(sna, dst_x, dst_y); } fastcall static void gen2_emit_composite_primitive_linear(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int16_t dst_x = r->dst.x + op->dst.x; int16_t dst_y = r->dst.y + op->dst.y; gen2_emit_composite_dstcoord(sna, dst_x + r->width, dst_y + r->height); gen2_emit_composite_linear(sna, &op->src, r->src.x + r->width, r->src.y + r->height); gen2_emit_composite_dstcoord(sna, dst_x, dst_y + r->height); gen2_emit_composite_linear(sna, &op->src, r->src.x, r->src.y + r->height); gen2_emit_composite_dstcoord(sna, dst_x, dst_y); gen2_emit_composite_linear(sna, &op->src, r->src.x, r->src.y); } fastcall static void gen2_emit_composite_primitive_identity(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = (float *)sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 12; v[8] = v[4] = r->dst.x + op->dst.x; v[0] = v[4] + w; v[9] = r->dst.y + op->dst.y; v[5] = v[1] = v[9] + h; v[10] = v[6] = (r->src.x + op->src.offset[0]) * op->src.scale[0]; v[2] = v[6] + w * op->src.scale[0]; v[11] = (r->src.y + op->src.offset[1]) * op->src.scale[1]; v[7] = v[3] = v[11] + h * op->src.scale[1]; } fastcall static void gen2_emit_composite_primitive_affine(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { PictTransform *transform = op->src.transform; int src_x = r->src.x + (int)op->src.offset[0]; int src_y = r->src.y + (int)op->src.offset[1]; float *v; v = (float *)sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 12; v[8] = v[4] = r->dst.x + op->dst.x; v[0] = v[4] + r->width; v[9] = r->dst.y + op->dst.y; v[5] = v[1] = v[9] + r->height; _sna_get_transformed_scaled(src_x + r->width, src_y + r->height, transform, op->src.scale, &v[2], &v[3]); _sna_get_transformed_scaled(src_x, src_y + r->height, transform, op->src.scale, &v[6], &v[7]); _sna_get_transformed_scaled(src_x, src_y, transform, op->src.scale, &v[10], &v[11]); } fastcall static void gen2_emit_composite_primitive_constant_identity_mask(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = (float *)sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 12; v[8] = v[4] = r->dst.x + op->dst.x; v[0] = v[4] + w; v[9] = r->dst.y + op->dst.y; v[5] = v[1] = v[9] + h; v[10] = v[6] = (r->mask.x + op->mask.offset[0]) * op->mask.scale[0]; v[2] = v[6] + w * op->mask.scale[0]; v[11] = (r->mask.y + op->mask.offset[1]) * op->mask.scale[1]; v[7] = v[3] = v[11] + h * op->mask.scale[1]; } #if defined(sse2) && !defined(__x86_64__) sse2 fastcall static void gen2_emit_composite_primitive_constant__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int16_t dst_x = r->dst.x + op->dst.x; int16_t dst_y = r->dst.y + op->dst.y; gen2_emit_composite_dstcoord(sna, dst_x + r->width, dst_y + r->height); gen2_emit_composite_dstcoord(sna, dst_x, dst_y + r->height); gen2_emit_composite_dstcoord(sna, dst_x, dst_y); } sse2 fastcall static void gen2_emit_composite_primitive_linear__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int16_t dst_x = r->dst.x + op->dst.x; int16_t dst_y = r->dst.y + op->dst.y; gen2_emit_composite_dstcoord(sna, dst_x + r->width, dst_y + r->height); gen2_emit_composite_linear(sna, &op->src, r->src.x + r->width, r->src.y + r->height); gen2_emit_composite_dstcoord(sna, dst_x, dst_y + r->height); gen2_emit_composite_linear(sna, &op->src, r->src.x, r->src.y + r->height); gen2_emit_composite_dstcoord(sna, dst_x, dst_y); gen2_emit_composite_linear(sna, &op->src, r->src.x, r->src.y); } sse2 fastcall static void gen2_emit_composite_primitive_identity__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = (float *)sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 12; v[8] = v[4] = r->dst.x + op->dst.x; v[0] = v[4] + w; v[9] = r->dst.y + op->dst.y; v[5] = v[1] = v[9] + h; v[10] = v[6] = (r->src.x + op->src.offset[0]) * op->src.scale[0]; v[2] = v[6] + w * op->src.scale[0]; v[11] = (r->src.y + op->src.offset[1]) * op->src.scale[1]; v[7] = v[3] = v[11] + h * op->src.scale[1]; } sse2 fastcall static void gen2_emit_composite_primitive_affine__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { PictTransform *transform = op->src.transform; int src_x = r->src.x + (int)op->src.offset[0]; int src_y = r->src.y + (int)op->src.offset[1]; float *v; v = (float *)sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 12; v[8] = v[4] = r->dst.x + op->dst.x; v[0] = v[4] + r->width; v[9] = r->dst.y + op->dst.y; v[5] = v[1] = v[9] + r->height; _sna_get_transformed_scaled(src_x + r->width, src_y + r->height, transform, op->src.scale, &v[2], &v[3]); _sna_get_transformed_scaled(src_x, src_y + r->height, transform, op->src.scale, &v[6], &v[7]); _sna_get_transformed_scaled(src_x, src_y, transform, op->src.scale, &v[10], &v[11]); } sse2 fastcall static void gen2_emit_composite_primitive_constant_identity_mask__sse2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float w = r->width; float h = r->height; float *v; v = (float *)sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 12; v[8] = v[4] = r->dst.x + op->dst.x; v[0] = v[4] + w; v[9] = r->dst.y + op->dst.y; v[5] = v[1] = v[9] + h; v[10] = v[6] = (r->mask.x + op->mask.offset[0]) * op->mask.scale[0]; v[2] = v[6] + w * op->mask.scale[0]; v[11] = (r->mask.y + op->mask.offset[1]) * op->mask.scale[1]; v[7] = v[3] = v[11] + h * op->mask.scale[1]; } #endif static void gen2_magic_ca_pass(struct sna *sna, const struct sna_composite_op *op) { uint32_t ablend, cblend, *src, *dst; int n; if (!op->need_magic_ca_pass) return; DBG(("%s: batch=%x, vertex=%x\n", __FUNCTION__, sna->kgem.nbatch, sna->render.vertex_offset)); assert(op->mask.bo); assert(op->has_component_alpha); BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(8) | 0); BATCH(BLENDFACTOR_ONE << S8_SRC_BLEND_FACTOR_SHIFT | BLENDFACTOR_ONE << S8_DST_BLEND_FACTOR_SHIFT | S8_ENABLE_COLOR_BLEND | S8_BLENDFUNC_ADD | S8_ENABLE_COLOR_BUFFER_WRITE); sna->render_state.gen2.ls1 = 0; gen2_get_blend_factors(op, PictOpAdd, &cblend, &ablend); BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_BLEND_STAGE(0) | 1); BATCH(cblend); BATCH(ablend); sna->render_state.gen2.ls2 = 0; src = sna->kgem.batch + sna->render.vertex_offset; dst = sna->kgem.batch + sna->kgem.nbatch; n = 1 + sna->render.vertex_index; sna->kgem.nbatch += n; assert(sna->kgem.nbatch <= KGEM_BATCH_SIZE(&sna->kgem)); while (n--) *dst++ = *src++; } static void gen2_vertex_flush(struct sna *sna, const struct sna_composite_op *op) { if (sna->render.vertex_index == 0) return; sna->kgem.batch[sna->render.vertex_offset] |= sna->render.vertex_index - 1; gen2_magic_ca_pass(sna, op); sna->render.vertex_offset = 0; sna->render.vertex_index = 0; } inline static int gen2_get_rectangles(struct sna *sna, const struct sna_composite_op *op, int want) { int rem = batch_space(sna), size, need; DBG(("%s: want=%d, floats_per_vertex=%d, rem=%d\n", __FUNCTION__, want, op->floats_per_vertex, rem)); assert(op->floats_per_vertex); assert(op->floats_per_rect == 3 * op->floats_per_vertex); need = 1; size = op->floats_per_rect; if (op->need_magic_ca_pass) need += 6 + size*sna->render.vertex_index, size *= 2; DBG(("%s: want=%d, need=%d,size=%d, rem=%d\n", __FUNCTION__, want, need, size, rem)); if (rem < need + size) { gen2_vertex_flush(sna, op); kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); return 0; } rem -= need; if (sna->render.vertex_offset == 0) { if ((sna->kgem.batch[sna->kgem.nbatch-1] & ~0xffff) == (PRIM3D_INLINE | PRIM3D_RECTLIST)) { uint32_t *b = &sna->kgem.batch[sna->kgem.nbatch-1]; assert(*b & 0xffff); sna->render.vertex_index = 1 + (*b & 0xffff); *b = PRIM3D_INLINE | PRIM3D_RECTLIST; sna->render.vertex_offset = sna->kgem.nbatch - 1; assert(!op->need_magic_ca_pass); } else { sna->render.vertex_offset = sna->kgem.nbatch; BATCH(PRIM3D_INLINE | PRIM3D_RECTLIST); } } if (want > 1 && want * size > rem) want = rem / size; assert(want); sna->render.vertex_index += want*op->floats_per_rect; return want; } fastcall static void gen2_render_composite_blt(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { if (!gen2_get_rectangles(sna, op, 1)) { gen2_emit_composite_state(sna, op); gen2_get_rectangles(sna, op, 1); } op->prim_emit(sna, op, r); } fastcall static void gen2_render_composite_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { struct sna_composite_rectangles r; if (!gen2_get_rectangles(sna, op, 1)) { gen2_emit_composite_state(sna, op); gen2_get_rectangles(sna, op, 1); } DBG((" %s: (%d, %d) x (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.src = r.mask = r.dst; op->prim_emit(sna, op, &r); } static void gen2_render_composite_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { do { int nbox_this_time; nbox_this_time = gen2_get_rectangles(sna, op, nbox); if (nbox_this_time == 0) { gen2_emit_composite_state(sna, op); nbox_this_time = gen2_get_rectangles(sna, op, nbox); } nbox -= nbox_this_time; do { struct sna_composite_rectangles r; DBG((" %s: (%d, %d) x (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.src = r.mask = r.dst; op->prim_emit(sna, op, &r); box++; } while (--nbox_this_time); } while (nbox); } static void gen2_render_composite_done(struct sna *sna, const struct sna_composite_op *op) { gen2_vertex_flush(sna, op); if (op->mask.bo) kgem_bo_destroy(&sna->kgem, op->mask.bo); if (op->src.bo) kgem_bo_destroy(&sna->kgem, op->src.bo); sna_render_composite_redirect_done(sna, op); } static bool gen2_composite_solid_init(struct sna *sna, struct sna_composite_channel *channel, uint32_t color) { channel->filter = PictFilterNearest; channel->repeat = RepeatNormal; channel->is_solid = true; channel->is_affine = true; channel->width = 1; channel->height = 1; channel->pict_format = PICT_a8r8g8b8; channel->bo = NULL; channel->u.gen2.pixel = color; channel->scale[0] = channel->scale[1] = 1; channel->offset[0] = channel->offset[1] = 0; return true; } #define xFixedToDouble(f) pixman_fixed_to_double(f) static bool gen2_composite_linear_init(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int x, int y, int w, int h, int dst_x, int dst_y) { PictLinearGradient *linear = (PictLinearGradient *)picture->pSourcePict; pixman_fixed_t tx, ty; float x0, y0, sf; float dx, dy; DBG(("%s: p1=(%f, %f), p2=(%f, %f)\n", __FUNCTION__, xFixedToDouble(linear->p1.x), xFixedToDouble(linear->p1.y), xFixedToDouble(linear->p2.x), xFixedToDouble(linear->p2.y))); if (linear->p2.x == linear->p1.x && linear->p2.y == linear->p1.y) return 0; if (!sna_transform_is_affine(picture->transform)) { DBG(("%s: fallback due to projective transform\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } channel->bo = sna_render_get_gradient(sna, (PictGradient *)linear); if (!channel->bo) return 0; channel->filter = PictFilterNearest; channel->repeat = picture->repeat ? picture->repeatType : RepeatNone; channel->is_linear = true; channel->width = channel->bo->pitch / 4; channel->height = 1; channel->pict_format = PICT_a8r8g8b8; channel->scale[0] = channel->scale[1] = 1; channel->offset[0] = channel->offset[1] = 0; if (sna_transform_is_translation(picture->transform, &tx, &ty)) { dx = xFixedToDouble(linear->p2.x - linear->p1.x); dy = xFixedToDouble(linear->p2.y - linear->p1.y); x0 = xFixedToDouble(linear->p1.x); y0 = xFixedToDouble(linear->p1.y); if (tx | ty) { x0 -= pixman_fixed_to_double(tx); y0 -= pixman_fixed_to_double(ty); } } else { struct pixman_f_vector p1, p2; struct pixman_f_transform m, inv; pixman_f_transform_from_pixman_transform(&m, picture->transform); DBG(("%s: transform = [%f %f %f, %f %f %f, %f %f %f]\n", __FUNCTION__, m.m[0][0], m.m[0][1], m.m[0][2], m.m[1][0], m.m[1][1], m.m[1][2], m.m[2][0], m.m[2][1], m.m[2][2])); if (!pixman_f_transform_invert(&inv, &m)) return 0; p1.v[0] = pixman_fixed_to_double(linear->p1.x); p1.v[1] = pixman_fixed_to_double(linear->p1.y); p1.v[2] = 1.; pixman_f_transform_point(&inv, &p1); p2.v[0] = pixman_fixed_to_double(linear->p2.x); p2.v[1] = pixman_fixed_to_double(linear->p2.y); p2.v[2] = 1.; pixman_f_transform_point(&inv, &p2); DBG(("%s: untransformed: p1=(%f, %f, %f), p2=(%f, %f, %f)\n", __FUNCTION__, p1.v[0], p1.v[1], p1.v[2], p2.v[0], p2.v[1], p2.v[2])); dx = p2.v[0] - p1.v[0]; dy = p2.v[1] - p1.v[1]; x0 = p1.v[0]; y0 = p1.v[1]; } sf = dx*dx + dy*dy; dx /= sf; dy /= sf; channel->u.linear.dx = dx; channel->u.linear.dy = dy; channel->u.linear.offset = -dx*(x0+dst_x-x) + -dy*(y0+dst_y-y); DBG(("%s: dx=%f, dy=%f, offset=%f\n", __FUNCTION__, dx, dy, channel->u.linear.offset)); return channel->bo != NULL; } static bool source_is_covered(PicturePtr picture, int x, int y, int width, int height) { int x1, y1, x2, y2; if (picture->repeat && picture->repeatType != RepeatNone) return true; if (picture->pDrawable == NULL) return false; if (picture->transform) { pixman_box16_t sample; sample.x1 = x; sample.y1 = y; sample.x2 = x + width; sample.y2 = y + height; pixman_transform_bounds(picture->transform, &sample); x1 = sample.x1; x2 = sample.x2; y1 = sample.y1; y2 = sample.y2; } else { x1 = x; y1 = y; x2 = x + width; y2 = y + height; } return x1 >= 0 && y1 >= 0 && x2 <= picture->pDrawable->width && y2 <= picture->pDrawable->height; } static bool gen2_check_card_format(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int x, int y, int w, int h, bool *fixup_alpha) { uint32_t format = picture->format; unsigned int i; for (i = 0; i < ARRAY_SIZE(i8xx_tex_formats); i++) { if (i8xx_tex_formats[i].fmt == format) return true; } for (i = 0; i < ARRAY_SIZE(i85x_tex_formats); i++) { if (i85x_tex_formats[i].fmt == format) { if (sna->kgem.gen >= 021) return true; if (source_is_covered(picture, x, y, w,h)) { channel->is_opaque = true; return true; } *fixup_alpha = true; return false; } } *fixup_alpha = false; return false; } static int gen2_composite_picture(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int x, int y, int w, int h, int dst_x, int dst_y, bool precise) { PixmapPtr pixmap; uint32_t color; int16_t dx, dy; bool fixup_alpha; DBG(("%s: (%d, %d)x(%d, %d), dst=(%d, %d)\n", __FUNCTION__, x, y, w, h, dst_x, dst_y)); channel->is_solid = false; channel->is_linear = false; channel->is_opaque = false; channel->is_affine = true; channel->transform = NULL; channel->card_format = -1; if (sna_picture_is_solid(picture, &color)) return gen2_composite_solid_init(sna, channel, color); if (!gen2_check_repeat(picture)) { DBG(("%s -- fallback, unhandled repeat %d\n", __FUNCTION__, picture->repeat)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } if (!gen2_check_filter(picture)) { DBG(("%s -- fallback, unhandled filter %d\n", __FUNCTION__, picture->filter)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } if (picture->pDrawable == NULL) { int ret; if (picture->pSourcePict->type == SourcePictTypeLinear) return gen2_composite_linear_init(sna, picture, channel, x, y, w, h, dst_x, dst_y); DBG(("%s -- fallback, unhandled source %d\n", __FUNCTION__, picture->pSourcePict->type)); ret = -1; if (!precise) ret = sna_render_picture_approximate_gradient(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (ret == -1) ret = sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); return ret; } if (picture->alphaMap) { DBG(("%s -- fallback, alphamap\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } channel->repeat = picture->repeat ? picture->repeatType : RepeatNone; channel->filter = picture->filter; pixmap = get_drawable_pixmap(picture->pDrawable); get_drawable_deltas(picture->pDrawable, pixmap, &dx, &dy); x += dx + picture->pDrawable->x; y += dy + picture->pDrawable->y; channel->is_affine = sna_transform_is_affine(picture->transform); if (sna_transform_is_imprecise_integer_translation(picture->transform, picture->filter, precise, &dx, &dy)) { DBG(("%s: integer translation (%d, %d), removing\n", __FUNCTION__, dx, dy)); x += dx; y += dy; channel->transform = NULL; channel->filter = PictFilterNearest; if (channel->repeat && (x >= 0 && y >= 0 && x + w < pixmap->drawable.width && y + h < pixmap->drawable.height)) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv && priv->clear) { DBG(("%s: converting large pixmap source into solid [%08x]\n", __FUNCTION__, priv->clear_color)); return gen2_composite_solid_init(sna, channel, priv->clear_color); } } } else channel->transform = picture->transform; if (!gen2_check_card_format(sna, picture, channel, x, y, w ,h, &fixup_alpha)) return sna_render_picture_convert(sna, picture, channel, pixmap, x, y, w, h, dst_x, dst_y, fixup_alpha); channel->pict_format = picture->format; if (too_large(pixmap->drawable.width, pixmap->drawable.height)) return sna_render_picture_extract(sna, picture, channel, x, y, w, h, dst_x, dst_y); return sna_render_pixmap_bo(sna, channel, pixmap, x, y, w, h, dst_x, dst_y); } static bool gen2_composite_set_target(struct sna *sna, struct sna_composite_op *op, PicturePtr dst, int x, int y, int w, int h, bool partial) { BoxRec box; unsigned hint; op->dst.pixmap = get_drawable_pixmap(dst->pDrawable); op->dst.format = dst->format; op->dst.width = op->dst.pixmap->drawable.width; op->dst.height = op->dst.pixmap->drawable.height; if (w && h) { box.x1 = x; box.y1 = y; box.x2 = x + w; box.y2 = y + h; } else sna_render_picture_extents(dst, &box); hint = PREFER_GPU | FORCE_GPU | RENDER_GPU; if (!partial) { hint |= IGNORE_DAMAGE; if (w == op->dst.width && h == op->dst.height) hint |= REPLACES; } op->dst.bo = sna_drawable_use_bo(dst->pDrawable, hint, &box, &op->damage); if (op->dst.bo == NULL) return false; if (hint & REPLACES) { struct sna_pixmap *priv = sna_pixmap(op->dst.pixmap); kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); } assert((op->dst.bo->pitch & 7) == 0); get_drawable_deltas(dst->pDrawable, op->dst.pixmap, &op->dst.x, &op->dst.y); DBG(("%s: pixmap=%ld, format=%08x, size=%dx%d, pitch=%d, delta=(%d,%d),damage=%p\n", __FUNCTION__, op->dst.pixmap->drawable.serialNumber, (int)op->dst.format, op->dst.width, op->dst.height, op->dst.bo->pitch, op->dst.x, op->dst.y, op->damage ? *op->damage : (void *)-1)); assert(op->dst.bo->proxy == NULL); if (((too_large(op->dst.width, op->dst.height) || op->dst.bo->pitch > MAX_3D_PITCH)) && !sna_render_composite_redirect(sna, op, x, y, w, h, partial)) return false; return true; } static bool is_unhandled_gradient(PicturePtr picture, bool precise) { if (picture->pDrawable) return false; switch (picture->pSourcePict->type) { case SourcePictTypeSolidFill: case SourcePictTypeLinear: return false; default: return precise; } } static bool has_alphamap(PicturePtr p) { return p->alphaMap != NULL; } static bool need_upload(PicturePtr p) { return p->pDrawable && unattached(p->pDrawable) && untransformed(p); } static bool source_is_busy(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv == NULL) return false; if (priv->clear) return false; if (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo)) return true; if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; return priv->gpu_damage && !priv->cpu_damage; } static bool source_fallback(PicturePtr p, PixmapPtr pixmap, bool precise) { if (sna_picture_is_solid(p, NULL)) return false; if (is_unhandled_gradient(p, precise) || !gen2_check_repeat(p)) return true; if (pixmap && source_is_busy(pixmap)) return false; return has_alphamap(p) || !gen2_check_filter(p) || need_upload(p); } static bool gen2_composite_fallback(struct sna *sna, PicturePtr src, PicturePtr mask, PicturePtr dst) { PixmapPtr src_pixmap; PixmapPtr mask_pixmap; PixmapPtr dst_pixmap; bool src_fallback, mask_fallback; if (!gen2_check_dst_format(dst->format)) { DBG(("%s: unknown destination format: %d\n", __FUNCTION__, dst->format)); return true; } dst_pixmap = get_drawable_pixmap(dst->pDrawable); src_pixmap = src->pDrawable ? get_drawable_pixmap(src->pDrawable) : NULL; src_fallback = source_fallback(src, src_pixmap, dst->polyMode == PolyModePrecise); if (mask) { mask_pixmap = mask->pDrawable ? get_drawable_pixmap(mask->pDrawable) : NULL; mask_fallback = source_fallback(mask, mask_pixmap, dst->polyMode == PolyModePrecise); } else { mask_pixmap = NULL; mask_fallback = NULL; } /* If we are using the destination as a source and need to * readback in order to upload the source, do it all * on the cpu. */ if (src_pixmap == dst_pixmap && src_fallback) { DBG(("%s: src is dst and will fallback\n",__FUNCTION__)); return true; } if (mask_pixmap == dst_pixmap && mask_fallback) { DBG(("%s: mask is dst and will fallback\n",__FUNCTION__)); return true; } /* If anything is on the GPU, push everything out to the GPU */ if (dst_use_gpu(dst_pixmap)) { DBG(("%s: dst is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (src_pixmap && !src_fallback) { DBG(("%s: src is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (mask_pixmap && !mask_fallback) { DBG(("%s: mask is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } /* However if the dst is not on the GPU and we need to * render one of the sources using the CPU, we may * as well do the entire operation in place onthe CPU. */ if (src_fallback) { DBG(("%s: dst is on the CPU and src will fallback\n", __FUNCTION__)); return true; } if (mask && mask_fallback) { DBG(("%s: dst is on the CPU and mask will fallback\n", __FUNCTION__)); return true; } if (too_large(dst_pixmap->drawable.width, dst_pixmap->drawable.height) && dst_is_cpu(dst_pixmap)) { DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__)); return true; } DBG(("%s: dst is not on the GPU and the operation should not fallback\n", __FUNCTION__)); return dst_use_cpu(dst_pixmap); } static int reuse_source(struct sna *sna, PicturePtr src, struct sna_composite_channel *sc, int src_x, int src_y, PicturePtr mask, struct sna_composite_channel *mc, int msk_x, int msk_y) { uint32_t color; if (src_x != msk_x || src_y != msk_y) return false; if (sna_picture_is_solid(mask, &color)) return gen2_composite_solid_init(sna, mc, color); if (sc->is_solid) return false; if (src == mask) { DBG(("%s: mask is source\n", __FUNCTION__)); *mc = *sc; mc->bo = kgem_bo_reference(mc->bo); return true; } if (src->pDrawable == NULL || mask->pDrawable != src->pDrawable) return false; DBG(("%s: mask reuses source drawable\n", __FUNCTION__)); if (!sna_transform_equal(src->transform, mask->transform)) return false; if (!sna_picture_alphamap_equal(src, mask)) return false; if (!gen2_check_repeat(mask)) return false; if (!gen2_check_filter(mask)) return false; if (!gen2_check_format(sna, mask)) return false; DBG(("%s: reusing source channel for mask with a twist\n", __FUNCTION__)); *mc = *sc; mc->repeat = mask->repeat ? mask->repeatType : RepeatNone; mc->filter = mask->filter; mc->pict_format = mask->format; mc->bo = kgem_bo_reference(mc->bo); return true; } static bool gen2_render_composite(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr mask, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t mask_x, int16_t mask_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_op *tmp) { DBG(("%s()\n", __FUNCTION__)); if (op >= ARRAY_SIZE(gen2_blend_op)) { DBG(("%s: fallback due to unhandled blend op: %d\n", __FUNCTION__, op)); return false; } if (mask == NULL && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp)) return true; if (gen2_composite_fallback(sna, src, mask, dst)) goto fallback; if (need_tiling(sna, width, height)) return sna_tiling_composite(op, src, mask, dst, src_x, src_y, mask_x, mask_y, dst_x, dst_y, width, height, tmp); tmp->op = op; sna_render_composite_redirect_init(tmp); if (!gen2_composite_set_target(sna, tmp, dst, dst_x, dst_y, width, height, flags & COMPOSITE_PARTIAL || op > PictOpSrc)) { DBG(("%s: unable to set render target\n", __FUNCTION__)); goto fallback; } switch (gen2_composite_picture(sna, src, &tmp->src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: DBG(("%s: fallback -- unable to prepare source\n", __FUNCTION__)); goto cleanup_dst; case 0: gen2_composite_solid_init(sna, &tmp->src, 0); break; case 1: if (mask == NULL && tmp->src.bo && sna_blt_composite__convert(sna, dst_x, dst_y, width, height, tmp)) return true; break; } if (mask) { if (!reuse_source(sna, src, &tmp->src, src_x, src_y, mask, &tmp->mask, mask_x, mask_y)) { switch (gen2_composite_picture(sna, mask, &tmp->mask, mask_x, mask_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: DBG(("%s: fallback -- unable to prepare mask\n", __FUNCTION__)); goto cleanup_src; case 0: gen2_composite_solid_init(sna, &tmp->mask, 0); case 1: break; } } if (mask->componentAlpha && PICT_FORMAT_RGB(mask->format)) { /* Check if it's component alpha that relies on a source alpha * and on the source value. We can only get one of those * into the single source value that we get to blend with. */ tmp->has_component_alpha = true; if (gen2_blend_op[op].src_alpha && (gen2_blend_op[op].src_blend != BLENDFACTOR_ZERO)) { if (op != PictOpOver) { DBG(("%s: fallback -- unsupported CA blend (src_blend=%d)\n", __FUNCTION__, gen2_blend_op[op].src_blend)); goto cleanup_src; } tmp->need_magic_ca_pass = true; tmp->op = PictOpOutReverse; } } /* convert solid to a texture (pure convenience) */ if (tmp->mask.is_solid && tmp->src.is_solid) { assert(tmp->mask.is_affine); tmp->mask.bo = sna_render_get_solid(sna, tmp->mask.u.gen2.pixel); if (!tmp->mask.bo) goto cleanup_src; } } tmp->floats_per_vertex = 2; if (!tmp->src.is_solid) tmp->floats_per_vertex += tmp->src.is_affine ? 2 : 3; if (tmp->mask.bo) tmp->floats_per_vertex += tmp->mask.is_affine ? 2 : 3; tmp->floats_per_rect = 3*tmp->floats_per_vertex; tmp->prim_emit = gen2_emit_composite_primitive; if (tmp->mask.bo) { if (tmp->mask.transform == NULL) { if (tmp->src.is_solid) { assert(tmp->floats_per_rect == 12); #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen2_emit_composite_primitive_constant_identity_mask__sse2; } else #endif { tmp->prim_emit = gen2_emit_composite_primitive_constant_identity_mask; } } } } else { if (tmp->src.is_solid) { assert(tmp->floats_per_rect == 6); #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen2_emit_composite_primitive_constant__sse2; } else #endif { tmp->prim_emit = gen2_emit_composite_primitive_constant; } } else if (tmp->src.is_linear) { assert(tmp->floats_per_rect == 12); #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen2_emit_composite_primitive_linear__sse2; } else #endif { tmp->prim_emit = gen2_emit_composite_primitive_linear; } } else if (tmp->src.transform == NULL) { assert(tmp->floats_per_rect == 12); #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen2_emit_composite_primitive_identity__sse2; } else #endif { tmp->prim_emit = gen2_emit_composite_primitive_identity; } } else if (tmp->src.is_affine) { assert(tmp->floats_per_rect == 12); tmp->src.scale[0] /= tmp->src.transform->matrix[2][2]; tmp->src.scale[1] /= tmp->src.transform->matrix[2][2]; #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen2_emit_composite_primitive_affine__sse2; } else #endif { tmp->prim_emit = gen2_emit_composite_primitive_affine; } } } tmp->blt = gen2_render_composite_blt; tmp->box = gen2_render_composite_box; tmp->boxes = gen2_render_composite_boxes; tmp->done = gen2_render_composite_done; if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) { DBG(("%s: fallback, operation does not fit into GTT\n", __FUNCTION__)); goto cleanup_mask; } } gen2_emit_composite_state(sna, tmp); return true; cleanup_mask: if (tmp->mask.bo) { kgem_bo_destroy(&sna->kgem, tmp->mask.bo); tmp->mask.bo = NULL; } cleanup_src: if (tmp->src.bo) { kgem_bo_destroy(&sna->kgem, tmp->src.bo); tmp->src.bo = NULL; } cleanup_dst: if (tmp->redirect.real_bo) { kgem_bo_destroy(&sna->kgem, tmp->dst.bo); tmp->redirect.real_bo = NULL; } fallback: return (mask == NULL && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags | COMPOSITE_FALLBACK, tmp)); } fastcall static void gen2_emit_composite_spans_primitive_constant(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = (float *)sna->kgem.batch + sna->kgem.nbatch; uint32_t alpha = (uint8_t)(255 * opacity) << 24; sna->kgem.nbatch += 9; v[0] = op->base.dst.x + box->x2; v[1] = op->base.dst.y + box->y2; *((uint32_t *)v + 2) = alpha; v[3] = op->base.dst.x + box->x1; v[4] = v[1]; *((uint32_t *)v + 5) = alpha; v[6] = v[3]; v[7] = op->base.dst.y + box->y1; *((uint32_t *)v + 8) = alpha; } fastcall static void gen2_emit_composite_spans_primitive_linear(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { union { float f; uint32_t u; } alpha; alpha.u = (uint8_t)(255 * opacity) << 24; gen2_emit_composite_dstcoord(sna, op->base.dst.x + box->x2, op->base.dst.y + box->y2); VERTEX(alpha.f); gen2_emit_composite_linear(sna, &op->base.src, box->x2, box->y2); gen2_emit_composite_dstcoord(sna, op->base.dst.x + box->x1, op->base.dst.y + box->y2); VERTEX(alpha.f); gen2_emit_composite_linear(sna, &op->base.src, box->x1, box->y2); gen2_emit_composite_dstcoord(sna, op->base.dst.x + box->x1, op->base.dst.y + box->y1); VERTEX(alpha.f); gen2_emit_composite_linear(sna, &op->base.src, box->x1, box->y1); } fastcall static void gen2_emit_composite_spans_primitive_identity_source(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = (float *)sna->kgem.batch + sna->kgem.nbatch; uint32_t alpha = (uint8_t)(255 * opacity) << 24; sna->kgem.nbatch += 15; v[0] = op->base.dst.x + box->x2; v[1] = op->base.dst.y + box->y2; *((uint32_t *)v + 2) = alpha; v[3] = (op->base.src.offset[0] + box->x2) * op->base.src.scale[0]; v[4] = (op->base.src.offset[1] + box->y2) * op->base.src.scale[1]; v[5] = op->base.dst.x + box->x1; v[6] = v[1]; *((uint32_t *)v + 7) = alpha; v[8] = (op->base.src.offset[0] + box->x1) * op->base.src.scale[0]; v[9] = v[4]; v[10] = v[5]; v[11] = op->base.dst.y + box->y1; *((uint32_t *)v + 12) = alpha; v[13] = v[8]; v[14] = (op->base.src.offset[1] + box->y1) * op->base.src.scale[1]; } fastcall static void gen2_emit_composite_spans_primitive_affine_source(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { PictTransform *transform = op->base.src.transform; uint32_t alpha = (uint8_t)(255 * opacity) << 24; float *v; v = (float *)sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 15; v[0] = op->base.dst.x + box->x2; v[6] = v[1] = op->base.dst.y + box->y2; v[10] = v[5] = op->base.dst.x + box->x1; v[11] = op->base.dst.y + box->y1; *((uint32_t *)v + 2) = alpha; *((uint32_t *)v + 7) = alpha; *((uint32_t *)v + 12) = alpha; _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x2, (int)op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[3], &v[4]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x1, (int)op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[8], &v[9]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x1, (int)op->base.src.offset[1] + box->y1, transform, op->base.src.scale, &v[13], &v[14]); } #if defined(sse2) && !defined(__x86_64__) sse2 fastcall static void gen2_emit_composite_spans_primitive_constant__sse2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = (float *)sna->kgem.batch + sna->kgem.nbatch; uint32_t alpha = (uint8_t)(255 * opacity) << 24; sna->kgem.nbatch += 9; v[0] = op->base.dst.x + box->x2; v[1] = op->base.dst.y + box->y2; *((uint32_t *)v + 2) = alpha; v[3] = op->base.dst.x + box->x1; v[4] = v[1]; *((uint32_t *)v + 5) = alpha; v[6] = v[3]; v[7] = op->base.dst.y + box->y1; *((uint32_t *)v + 8) = alpha; } sse2 fastcall static void gen2_emit_composite_spans_primitive_linear__sse2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { union { float f; uint32_t u; } alpha; alpha.u = (uint8_t)(255 * opacity) << 24; gen2_emit_composite_dstcoord(sna, op->base.dst.x + box->x2, op->base.dst.y + box->y2); VERTEX(alpha.f); gen2_emit_composite_linear(sna, &op->base.src, box->x2, box->y2); gen2_emit_composite_dstcoord(sna, op->base.dst.x + box->x1, op->base.dst.y + box->y2); VERTEX(alpha.f); gen2_emit_composite_linear(sna, &op->base.src, box->x1, box->y2); gen2_emit_composite_dstcoord(sna, op->base.dst.x + box->x1, op->base.dst.y + box->y1); VERTEX(alpha.f); gen2_emit_composite_linear(sna, &op->base.src, box->x1, box->y1); } sse2 fastcall static void gen2_emit_composite_spans_primitive_identity_source__sse2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v = (float *)sna->kgem.batch + sna->kgem.nbatch; uint32_t alpha = (uint8_t)(255 * opacity) << 24; sna->kgem.nbatch += 15; v[0] = op->base.dst.x + box->x2; v[1] = op->base.dst.y + box->y2; *((uint32_t *)v + 2) = alpha; v[3] = (op->base.src.offset[0] + box->x2) * op->base.src.scale[0]; v[4] = (op->base.src.offset[1] + box->y2) * op->base.src.scale[1]; v[5] = op->base.dst.x + box->x1; v[6] = v[1]; *((uint32_t *)v + 7) = alpha; v[8] = (op->base.src.offset[0] + box->x1) * op->base.src.scale[0]; v[9] = v[4]; v[10] = v[5]; v[11] = op->base.dst.y + box->y1; *((uint32_t *)v + 12) = alpha; v[13] = v[8]; v[14] = (op->base.src.offset[1] + box->y1) * op->base.src.scale[1]; } sse2 fastcall static void gen2_emit_composite_spans_primitive_affine_source__sse2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { PictTransform *transform = op->base.src.transform; uint32_t alpha = (uint8_t)(255 * opacity) << 24; float *v; v = (float *)sna->kgem.batch + sna->kgem.nbatch; sna->kgem.nbatch += 15; v[0] = op->base.dst.x + box->x2; v[6] = v[1] = op->base.dst.y + box->y2; v[10] = v[5] = op->base.dst.x + box->x1; v[11] = op->base.dst.y + box->y1; *((uint32_t *)v + 2) = alpha; *((uint32_t *)v + 7) = alpha; *((uint32_t *)v + 12) = alpha; _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x2, (int)op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[3], &v[4]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x1, (int)op->base.src.offset[1] + box->y2, transform, op->base.src.scale, &v[8], &v[9]); _sna_get_transformed_scaled((int)op->base.src.offset[0] + box->x1, (int)op->base.src.offset[1] + box->y1, transform, op->base.src.scale, &v[13], &v[14]); } #endif static void gen2_emit_composite_spans_vertex(struct sna *sna, const struct sna_composite_spans_op *op, int16_t x, int16_t y, float opacity) { gen2_emit_composite_dstcoord(sna, x + op->base.dst.x, y + op->base.dst.y); BATCH((uint8_t)(opacity * 255) << 24); assert(!op->base.src.is_solid); if (op->base.src.is_linear) gen2_emit_composite_linear(sna, &op->base.src, x, y); else gen2_emit_composite_texcoord(sna, &op->base.src, x, y); } fastcall static void gen2_emit_composite_spans_primitive(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { gen2_emit_composite_spans_vertex(sna, op, box->x2, box->y2, opacity); gen2_emit_composite_spans_vertex(sna, op, box->x1, box->y2, opacity); gen2_emit_composite_spans_vertex(sna, op, box->x1, box->y1, opacity); } static void gen2_emit_spans_pipeline(struct sna *sna, const struct sna_composite_spans_op *op) { uint32_t cblend, ablend; uint32_t unwind; cblend = TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OP_MODULATE | TB0C_ARG1_SEL_DIFFUSE | TB0C_ARG1_REPLICATE_ALPHA | TB0C_OUTPUT_WRITE_CURRENT; ablend = TB0A_RESULT_SCALE_1X | TB0A_OP_MODULATE | TB0A_ARG1_SEL_DIFFUSE | TB0A_OUTPUT_WRITE_CURRENT; if (op->base.src.is_solid) { ablend |= TB0A_ARG2_SEL_SPECULAR; cblend |= TB0C_ARG2_SEL_SPECULAR; if (op->base.dst.format == PICT_a8) cblend |= TB0C_ARG2_REPLICATE_ALPHA; } else if (op->base.dst.format == PICT_a8) { ablend |= TB0A_ARG2_SEL_TEXEL0; cblend |= TB0C_ARG2_SEL_TEXEL0 | TB0C_ARG2_REPLICATE_ALPHA; } else { if (PICT_FORMAT_RGB(op->base.src.pict_format) != 0) cblend |= TB0C_ARG2_SEL_TEXEL0; else cblend |= TB0C_ARG2_SEL_ONE | TB0C_ARG2_INVERT; if (op->base.src.is_opaque) ablend |= TB0A_ARG2_SEL_ONE; else ablend |= TB0A_ARG2_SEL_TEXEL0; } unwind = sna->kgem.nbatch; BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_BLEND_STAGE(0) | 1); BATCH(cblend); BATCH(ablend); if (memcmp(sna->kgem.batch + sna->render_state.gen2.ls2 + 1, sna->kgem.batch + unwind + 1, 2 * sizeof(uint32_t)) == 0) sna->kgem.nbatch = unwind; else sna->render_state.gen2.ls2 = unwind; } static void gen2_emit_composite_spans_state(struct sna *sna, const struct sna_composite_spans_op *op) { uint32_t unwind; gen2_get_batch(sna, &op->base); gen2_emit_target(sna, &op->base); unwind = sna->kgem.nbatch; BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2); BATCH(!op->base.src.is_solid << 12); BATCH(S3_CULLMODE_NONE | S3_VERTEXHAS_XY | S3_DIFFUSE_PRESENT); BATCH(gen2_get_blend_cntl(op->base.op, false, op->base.dst.format)); if (memcmp(sna->kgem.batch + sna->render_state.gen2.ls1 + 1, sna->kgem.batch + unwind + 1, 3 * sizeof(uint32_t)) == 0) sna->kgem.nbatch = unwind; else sna->render_state.gen2.ls1 = unwind; gen2_disable_logic_op(sna); gen2_emit_spans_pipeline(sna, op); if (op->base.src.is_solid) { if (op->base.src.u.gen2.pixel != sna->render_state.gen2.specular) { BATCH(_3DSTATE_DFLT_SPECULAR_CMD); BATCH(op->base.src.u.gen2.pixel); sna->render_state.gen2.specular = op->base.src.u.gen2.pixel; } } else { uint32_t v =_3DSTATE_VERTEX_FORMAT_2_CMD | (op->base.src.is_affine ? TEXCOORDFMT_2D : TEXCOORDFMT_3D); if (sna->render_state.gen2.vft != v) { BATCH(v); sna->render_state.gen2.vft = v; } gen2_emit_texture(sna, &op->base.src, 0); } } fastcall static void gen2_render_composite_spans_box(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { DBG(("%s: src=+(%d, %d), opacity=%f, dst=+(%d, %d), box=(%d, %d) x (%d, %d)\n", __FUNCTION__, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); if (gen2_get_rectangles(sna, &op->base, 1) == 0) { gen2_emit_composite_spans_state(sna, op); gen2_get_rectangles(sna, &op->base, 1); } op->prim_emit(sna, op, box, opacity); } static void gen2_render_composite_spans_boxes(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, int nbox, float opacity) { DBG(("%s: nbox=%d, src=+(%d, %d), opacity=%f, dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y)); do { int nbox_this_time; nbox_this_time = gen2_get_rectangles(sna, &op->base, nbox); if (nbox_this_time == 0) { gen2_emit_composite_spans_state(sna, op); nbox_this_time = gen2_get_rectangles(sna, &op->base, nbox); } nbox -= nbox_this_time; do { DBG((" %s: (%d, %d) x (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); op->prim_emit(sna, op, box++, opacity); } while (--nbox_this_time); } while (nbox); } fastcall static void gen2_render_composite_spans_done(struct sna *sna, const struct sna_composite_spans_op *op) { DBG(("%s()\n", __FUNCTION__)); gen2_vertex_flush(sna, &op->base); if (op->base.src.bo) kgem_bo_destroy(&sna->kgem, op->base.src.bo); sna_render_composite_redirect_done(sna, &op->base); } static bool gen2_check_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t width, int16_t height, unsigned flags) { if (op >= ARRAY_SIZE(gen2_blend_op)) return false; if (gen2_composite_fallback(sna, src, NULL, dst)) return false; if (need_tiling(sna, width, height)) { if (!is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS)) { DBG(("%s: fallback, tiled operation not on GPU\n", __FUNCTION__)); return false; } } return true; } static bool gen2_render_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_spans_op *tmp) { DBG(("%s(src=(%d, %d), dst=(%d, %d), size=(%d, %d))\n", __FUNCTION__, src_x, src_y, dst_x, dst_y, width, height)); assert(gen2_check_composite_spans(sna, op, src, dst, width, height, flags)); if (need_tiling(sna, width, height)) { DBG(("%s: tiling, operation (%dx%d) too wide for pipeline\n", __FUNCTION__, width, height)); return sna_tiling_composite_spans(op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp); } tmp->base.op = op; sna_render_composite_redirect_init(&tmp->base); if (!gen2_composite_set_target(sna, &tmp->base, dst, dst_x, dst_y, width, height, true)) { DBG(("%s: unable to set render target\n", __FUNCTION__)); return false; } switch (gen2_composite_picture(sna, src, &tmp->base.src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_dst; case 0: gen2_composite_solid_init(sna, &tmp->base.src, 0); case 1: break; } assert(tmp->base.src.bo || tmp->base.src.is_solid); tmp->prim_emit = gen2_emit_composite_spans_primitive; tmp->base.floats_per_vertex = 3; if (tmp->base.src.is_solid) { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen2_emit_composite_spans_primitive_constant__sse2; } else #endif { tmp->prim_emit = gen2_emit_composite_spans_primitive_constant; } } else if (tmp->base.src.is_linear) { tmp->base.floats_per_vertex += 2; #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen2_emit_composite_spans_primitive_linear__sse2; } else #endif { tmp->prim_emit = gen2_emit_composite_spans_primitive_linear; } } else { assert(tmp->base.src.bo); tmp->base.floats_per_vertex += tmp->base.src.is_affine ? 2 : 3; if (tmp->base.src.transform == NULL) { #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen2_emit_composite_spans_primitive_identity_source__sse2; } else #endif { tmp->prim_emit = gen2_emit_composite_spans_primitive_identity_source; } } else if (tmp->base.src.is_affine) { tmp->base.src.scale[0] /= tmp->base.src.transform->matrix[2][2]; tmp->base.src.scale[1] /= tmp->base.src.transform->matrix[2][2]; #if defined(sse2) && !defined(__x86_64__) if (sna->cpu_features & SSE2) { tmp->prim_emit = gen2_emit_composite_spans_primitive_affine_source__sse2; } else #endif { tmp->prim_emit = gen2_emit_composite_spans_primitive_affine_source; } } } tmp->base.mask.bo = NULL; tmp->base.floats_per_rect = 3*tmp->base.floats_per_vertex; tmp->box = gen2_render_composite_spans_box; tmp->boxes = gen2_render_composite_spans_boxes; tmp->done = gen2_render_composite_spans_done; if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) goto cleanup_src; } gen2_emit_composite_spans_state(sna, tmp); return true; cleanup_src: if (tmp->base.src.bo) kgem_bo_destroy(&sna->kgem, tmp->base.src.bo); cleanup_dst: if (tmp->base.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp->base.dst.bo); return false; } static void gen2_emit_fill_pipeline(struct sna *sna, const struct sna_composite_op *op) { uint32_t blend, unwind; unwind = sna->kgem.nbatch; BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_BLEND_STAGE(0) | 1); blend = TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OP_ARG1 | TB0C_ARG1_SEL_DIFFUSE | TB0C_OUTPUT_WRITE_CURRENT; if (op->dst.format == PICT_a8) blend |= TB0C_ARG1_REPLICATE_ALPHA; BATCH(blend); BATCH(TB0A_RESULT_SCALE_1X | TB0A_OP_ARG1 | TB0A_ARG1_SEL_DIFFUSE | TB0A_OUTPUT_WRITE_CURRENT); if (memcmp(sna->kgem.batch + sna->render_state.gen2.ls2 + 1, sna->kgem.batch + unwind + 1, 2 * sizeof(uint32_t)) == 0) sna->kgem.nbatch = unwind; else sna->render_state.gen2.ls2 = unwind; } static void gen2_emit_fill_composite_state(struct sna *sna, const struct sna_composite_op *op, uint32_t pixel) { uint32_t ls1; gen2_get_batch(sna, op); gen2_emit_target(sna, op); ls1 = sna->kgem.nbatch; BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2); BATCH(0); BATCH(S3_CULLMODE_NONE | S3_VERTEXHAS_XY); BATCH(gen2_get_blend_cntl(op->op, false, op->dst.format)); if (memcmp(sna->kgem.batch + sna->render_state.gen2.ls1 + 1, sna->kgem.batch + ls1 + 1, 3 * sizeof(uint32_t)) == 0) sna->kgem.nbatch = ls1; else sna->render_state.gen2.ls1 = ls1; gen2_emit_fill_pipeline(sna, op); if (pixel != sna->render_state.gen2.diffuse) { BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); BATCH(pixel); sna->render_state.gen2.diffuse = pixel; } } static bool gen2_render_fill_boxes_try_blt(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n) { uint8_t alu; uint32_t pixel; if (op > PictOpSrc) return false; if (op == PictOpClear) { alu = GXclear; pixel = 0; } else if (!sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, format)) return false; else alu = GXcopy; return sna_blt_fill_boxes(sna, alu, dst_bo, dst->bitsPerPixel, pixel, box, n); } static bool gen2_render_fill_boxes(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n) { struct sna_composite_op tmp; uint32_t pixel; if (op >= ARRAY_SIZE(gen2_blend_op)) { DBG(("%s: fallback due to unhandled blend op: %d\n", __FUNCTION__, op)); return false; } #if NO_FILL_BOXES return gen2_render_fill_boxes_try_blt(sna, op, format, color, dst, dst_bo, box, n); #endif if (gen2_render_fill_boxes_try_blt(sna, op, format, color, dst, dst_bo, box, n)) return true; DBG(("%s (op=%d, format=%x, color=(%04x,%04x,%04x, %04x))\n", __FUNCTION__, op, (int)format, color->red, color->green, color->blue, color->alpha)); if (too_large(dst->width, dst->height) || dst_bo->pitch < 8 || dst_bo->pitch > MAX_3D_PITCH || !gen2_check_dst_format(format)) { DBG(("%s: try blt, too large or incompatible destination\n", __FUNCTION__)); if (!gen2_check_dst_format(format)) return false; assert(dst_bo->pitch >= 8); return sna_tiling_fill_boxes(sna, op, format, color, dst, dst_bo, box, n); } if (op == PictOpClear) pixel = 0; else if (!sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, PICT_a8r8g8b8)) return false; DBG(("%s: using shader for op=%d, format=%x, pixel=%x\n", __FUNCTION__, op, (int)format, pixel)); memset(&tmp, 0, sizeof(tmp)); tmp.op = op; tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.format = format; tmp.dst.bo = dst_bo; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) return false; } gen2_emit_fill_composite_state(sna, &tmp, pixel); do { int n_this_time = gen2_get_rectangles(sna, &tmp, n); if (n_this_time == 0) { gen2_emit_fill_composite_state(sna, &tmp, pixel); n_this_time = gen2_get_rectangles(sna, &tmp, n); } n -= n_this_time; do { DBG((" (%d, %d), (%d, %d): %x\n", box->x1, box->y1, box->x2, box->y2, pixel)); VERTEX(box->x2); VERTEX(box->y2); VERTEX(box->x1); VERTEX(box->y2); VERTEX(box->x1); VERTEX(box->y1); box++; } while (--n_this_time); } while (n); gen2_vertex_flush(sna, &tmp); return true; } static void gen2_emit_fill_state(struct sna *sna, const struct sna_composite_op *op) { uint32_t ls1; gen2_get_batch(sna, op); gen2_emit_target(sna, op); ls1 = sna->kgem.nbatch; BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2); BATCH(0); BATCH(S3_CULLMODE_NONE | S3_VERTEXHAS_XY); BATCH(S8_ENABLE_COLOR_BUFFER_WRITE); if (memcmp(sna->kgem.batch + sna->render_state.gen2.ls1 + 1, sna->kgem.batch + ls1 + 1, 3 * sizeof(uint32_t)) == 0) sna->kgem.nbatch = ls1; else sna->render_state.gen2.ls1 = ls1; gen2_enable_logic_op(sna, op->op); gen2_emit_fill_pipeline(sna, op); if (op->src.u.gen2.pixel != sna->render_state.gen2.diffuse) { BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); BATCH(op->src.u.gen2.pixel); sna->render_state.gen2.diffuse = op->src.u.gen2.pixel; } } static void gen2_render_fill_op_blt(struct sna *sna, const struct sna_fill_op *op, int16_t x, int16_t y, int16_t w, int16_t h) { if (!gen2_get_rectangles(sna, &op->base, 1)) { gen2_emit_fill_state(sna, &op->base); gen2_get_rectangles(sna, &op->base, 1); } VERTEX(x+w); VERTEX(y+h); VERTEX(x); VERTEX(y+h); VERTEX(x); VERTEX(y); } fastcall static void gen2_render_fill_op_box(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box) { if (!gen2_get_rectangles(sna, &op->base, 1)) { gen2_emit_fill_state(sna, &op->base); gen2_get_rectangles(sna, &op->base, 1); } VERTEX(box->x2); VERTEX(box->y2); VERTEX(box->x1); VERTEX(box->y2); VERTEX(box->x1); VERTEX(box->y1); } fastcall static void gen2_render_fill_op_boxes(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box, int nbox) { DBG(("%s: (%d, %d),(%d, %d)... x %d\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, nbox)); do { int nbox_this_time = gen2_get_rectangles(sna, &op->base, nbox); if (nbox_this_time == 0) { gen2_emit_fill_state(sna, &op->base); nbox_this_time = gen2_get_rectangles(sna, &op->base, nbox); } nbox -= nbox_this_time; do { VERTEX(box->x2); VERTEX(box->y2); VERTEX(box->x1); VERTEX(box->y2); VERTEX(box->x1); VERTEX(box->y1); box++; } while (--nbox_this_time); } while (nbox); } static void gen2_render_fill_op_done(struct sna *sna, const struct sna_fill_op *op) { gen2_vertex_flush(sna, &op->base); } static bool gen2_render_fill(struct sna *sna, uint8_t alu, PixmapPtr dst, struct kgem_bo *dst_bo, uint32_t color, unsigned flags, struct sna_fill_op *tmp) { #if NO_FILL return sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, tmp); #endif /* Prefer to use the BLT if already engaged */ if (sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, tmp)) return true; /* Must use the BLT if we can't RENDER... */ if (too_large(dst->drawable.width, dst->drawable.height) || dst_bo->pitch < 8 || dst_bo->pitch > MAX_3D_PITCH) return false; tmp->base.op = alu; tmp->base.dst.pixmap = dst; tmp->base.dst.width = dst->drawable.width; tmp->base.dst.height = dst->drawable.height; tmp->base.dst.format = sna_format_for_depth(dst->drawable.depth); tmp->base.dst.bo = dst_bo; tmp->base.dst.x = tmp->base.dst.y = 0; tmp->base.floats_per_vertex = 2; tmp->base.floats_per_rect = 6; tmp->base.src.u.gen2.pixel = sna_rgba_for_color(color, dst->drawable.depth); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); return sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, tmp); } tmp->blt = gen2_render_fill_op_blt; tmp->box = gen2_render_fill_op_box; tmp->boxes = gen2_render_fill_op_boxes; tmp->points = NULL; tmp->done = gen2_render_fill_op_done; gen2_emit_fill_state(sna, &tmp->base); return true; } static bool gen2_render_fill_one_try_blt(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { BoxRec box; box.x1 = x1; box.y1 = y1; box.x2 = x2; box.y2 = y2; return sna_blt_fill_boxes(sna, alu, bo, dst->drawable.bitsPerPixel, color, &box, 1); } static bool gen2_render_fill_one(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { struct sna_composite_op tmp; #if NO_FILL_ONE return gen2_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu); #endif /* Prefer to use the BLT if already engaged */ if (gen2_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu)) return true; /* Must use the BLT if we can't RENDER... */ if (too_large(dst->drawable.width, dst->drawable.height) || bo->pitch < 8 || bo->pitch > MAX_3D_PITCH) return false; if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_submit(&sna->kgem); if (gen2_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu)) return true; if (!kgem_check_bo(&sna->kgem, bo, NULL)) return false; } tmp.op = alu; tmp.dst.pixmap = dst; tmp.dst.width = dst->drawable.width; tmp.dst.height = dst->drawable.height; tmp.dst.format = sna_format_for_depth(dst->drawable.depth); tmp.dst.bo = bo; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = false; tmp.src.u.gen2.pixel = sna_rgba_for_color(color, dst->drawable.depth); gen2_emit_fill_state(sna, &tmp); gen2_get_rectangles(sna, &tmp, 1); DBG(("%s: (%d, %d), (%d, %d): %x\n", __FUNCTION__, x1, y1, x2, y2, tmp.src.u.gen2.pixel)); VERTEX(x2); VERTEX(y2); VERTEX(x1); VERTEX(y2); VERTEX(x1); VERTEX(y1); gen2_vertex_flush(sna, &tmp); return true; } static void gen2_render_copy_setup_source(struct sna_composite_channel *channel, const DrawableRec *draw, struct kgem_bo *bo) { assert(draw->width && draw->height); channel->filter = PictFilterNearest; channel->repeat = RepeatNone; channel->width = draw->width; channel->height = draw->height; channel->scale[0] = 1.f/draw->width; channel->scale[1] = 1.f/draw->height; channel->offset[0] = 0; channel->offset[1] = 0; channel->pict_format = sna_format_for_depth(draw->depth); channel->bo = bo; channel->is_affine = 1; DBG(("%s: source=%d, (%dx%d), format=%08x\n", __FUNCTION__, bo->handle, channel->width, channel->height, channel->pict_format)); } static void gen2_emit_copy_pipeline(struct sna *sna, const struct sna_composite_op *op) { uint32_t blend, unwind; unwind = sna->kgem.nbatch; BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_BLEND_STAGE(0) | 1); blend = TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OP_ARG1 | TB0C_OUTPUT_WRITE_CURRENT; if (op->dst.format == PICT_a8) blend |= TB0C_ARG1_REPLICATE_ALPHA | TB0C_ARG1_SEL_TEXEL0; else if (PICT_FORMAT_RGB(op->src.pict_format) != 0) blend |= TB0C_ARG1_SEL_TEXEL0; else blend |= TB0C_ARG1_SEL_ONE | TB0C_ARG1_INVERT; /* 0.0 */ BATCH(blend); blend = TB0A_RESULT_SCALE_1X | TB0A_OP_ARG1 | TB0A_OUTPUT_WRITE_CURRENT; if (PICT_FORMAT_A(op->src.pict_format) == 0) blend |= TB0A_ARG1_SEL_ONE; else blend |= TB0A_ARG1_SEL_TEXEL0; BATCH(blend); if (memcmp(sna->kgem.batch + sna->render_state.gen2.ls2 + 1, sna->kgem.batch + unwind + 1, 2 * sizeof(uint32_t)) == 0) sna->kgem.nbatch = unwind; else sna->render_state.gen2.ls2 = unwind; } static void gen2_emit_copy_state(struct sna *sna, const struct sna_composite_op *op) { uint32_t ls1, v; gen2_get_batch(sna, op); if (kgem_bo_is_dirty(op->src.bo)) { if (op->src.bo == op->dst.bo) BATCH(MI_FLUSH | MI_INVALIDATE_MAP_CACHE); else BATCH(_3DSTATE_MODES_5_CMD | PIPELINE_FLUSH_RENDER_CACHE | PIPELINE_FLUSH_TEXTURE_CACHE); kgem_clear_dirty(&sna->kgem); } gen2_emit_target(sna, op); ls1 = sna->kgem.nbatch; BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2); BATCH(1<<12); BATCH(S3_CULLMODE_NONE | S3_VERTEXHAS_XY); BATCH(S8_ENABLE_COLOR_BUFFER_WRITE); if (memcmp(sna->kgem.batch + sna->render_state.gen2.ls1 + 1, sna->kgem.batch + ls1 + 1, 3 * sizeof(uint32_t)) == 0) sna->kgem.nbatch = ls1; else sna->render_state.gen2.ls1 = ls1; gen2_enable_logic_op(sna, op->op); gen2_emit_copy_pipeline(sna, op); v = _3DSTATE_VERTEX_FORMAT_2_CMD | TEXCOORDFMT_2D; if (sna->render_state.gen2.vft != v) { BATCH(v); sna->render_state.gen2.vft = v; } gen2_emit_texture(sna, &op->src, 0); } static bool gen2_render_copy_boxes(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, unsigned flags) { struct sna_composite_op tmp; #if NO_COPY_BOXES if (!sna_blt_compare_depth(&src->drawable, &dst->drawable)) return false; return sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->drawable.bitsPerPixel, box, n); #endif DBG(("%s (%d, %d)->(%d, %d) x %d\n", __FUNCTION__, src_dx, src_dy, dst_dx, dst_dy, n)); if (sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; if (src_bo == dst_bo || /* XXX handle overlap using 3D ? */ too_large(src->width, src->height) || src_bo->pitch > MAX_3D_PITCH || dst_bo->pitch < 8) { fallback: return sna_blt_copy_boxes_fallback(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) goto fallback; } assert(dst_bo->pitch >= 8); memset(&tmp, 0, sizeof(tmp)); tmp.op = alu; tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.format = sna_format_for_depth(dst->depth); tmp.dst.bo = dst_bo; tmp.dst.x = tmp.dst.y = 0; tmp.damage = NULL; DBG(("%s: target=%d, format=%08x, size=%dx%d\n", __FUNCTION__, dst_bo->handle, (unsigned)tmp.dst.format, tmp.dst.width, tmp.dst.height)); sna_render_composite_redirect_init(&tmp); if (too_large(tmp.dst.width, tmp.dst.height) || dst_bo->pitch > MAX_3D_PITCH) { BoxRec extents = box[0]; int i; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_composite_redirect(sna, &tmp, extents.x1 + dst_dx, extents.y1 + dst_dy, extents.x2 - extents.x1, extents.y2 - extents.y1, alu != GXcopy || n > 1)) goto fallback_tiled; } tmp.floats_per_vertex = 4; tmp.floats_per_rect = 12; dst_dx += tmp.dst.x; dst_dy += tmp.dst.y; tmp.dst.x = tmp.dst.y = 0; gen2_render_copy_setup_source(&tmp.src, src, src_bo); gen2_emit_copy_state(sna, &tmp); do { int n_this_time; n_this_time = gen2_get_rectangles(sna, &tmp, n); if (n_this_time == 0) { gen2_emit_copy_state(sna, &tmp); n_this_time = gen2_get_rectangles(sna, &tmp, n); } n -= n_this_time; do { DBG((" (%d, %d) -> (%d, %d) + (%d, %d)\n", box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1)); VERTEX(box->x2 + dst_dx); VERTEX(box->y2 + dst_dy); VERTEX((box->x2 + src_dx) * tmp.src.scale[0]); VERTEX((box->y2 + src_dy) * tmp.src.scale[1]); VERTEX(box->x1 + dst_dx); VERTEX(box->y2 + dst_dy); VERTEX((box->x1 + src_dx) * tmp.src.scale[0]); VERTEX((box->y2 + src_dy) * tmp.src.scale[1]); VERTEX(box->x1 + dst_dx); VERTEX(box->y1 + dst_dy); VERTEX((box->x1 + src_dx) * tmp.src.scale[0]); VERTEX((box->y1 + src_dy) * tmp.src.scale[1]); box++; } while (--n_this_time); } while (n); gen2_vertex_flush(sna, &tmp); sna_render_composite_redirect_done(sna, &tmp); return true; fallback_tiled: return sna_tiling_copy_boxes(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } static void gen2_render_copy_blt(struct sna *sna, const struct sna_copy_op *op, int16_t sx, int16_t sy, int16_t w, int16_t h, int16_t dx, int16_t dy) { if (!gen2_get_rectangles(sna, &op->base, 1)) { gen2_emit_copy_state(sna, &op->base); gen2_get_rectangles(sna, &op->base, 1); } VERTEX(dx+w); VERTEX(dy+h); VERTEX((sx+w)*op->base.src.scale[0]); VERTEX((sy+h)*op->base.src.scale[1]); VERTEX(dx); VERTEX(dy+h); VERTEX(sx*op->base.src.scale[0]); VERTEX((sy+h)*op->base.src.scale[1]); VERTEX(dx); VERTEX(dy); VERTEX(sx*op->base.src.scale[0]); VERTEX(sy*op->base.src.scale[1]); } static void gen2_render_copy_done(struct sna *sna, const struct sna_copy_op *op) { gen2_vertex_flush(sna, &op->base); } static bool gen2_render_copy(struct sna *sna, uint8_t alu, PixmapPtr src, struct kgem_bo *src_bo, PixmapPtr dst, struct kgem_bo *dst_bo, struct sna_copy_op *tmp) { #if NO_COPY if (!sna_blt_compare_depth(&src->drawable, &dst->drawable)) return false; return sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, tmp); #endif /* Prefer to use the BLT */ if (sna_blt_compare_depth(&src->drawable, &dst->drawable) && sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, tmp)) return true; /* Must use the BLT if we can't RENDER... */ if (too_large(src->drawable.width, src->drawable.height) || too_large(dst->drawable.width, dst->drawable.height) || src_bo->pitch > MAX_3D_PITCH || dst_bo->pitch < 8 || dst_bo->pitch > MAX_3D_PITCH) { fallback: if (!sna_blt_compare_depth(&src->drawable, &dst->drawable)) return false; return sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, tmp); } tmp->base.op = alu; tmp->base.dst.pixmap = dst; tmp->base.dst.width = dst->drawable.width; tmp->base.dst.height = dst->drawable.height; tmp->base.dst.format = sna_format_for_depth(dst->drawable.depth); tmp->base.dst.bo = dst_bo; gen2_render_copy_setup_source(&tmp->base.src, &src->drawable, src_bo); tmp->base.mask.bo = NULL; tmp->base.floats_per_vertex = 4; tmp->base.floats_per_rect = 12; if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) goto fallback; } tmp->blt = gen2_render_copy_blt; tmp->done = gen2_render_copy_done; gen2_emit_composite_state(sna, &tmp->base); return true; } static void gen2_render_reset(struct sna *sna) { sna->render_state.gen2.need_invariant = true; sna->render_state.gen2.logic_op_enabled = 0; sna->render_state.gen2.target = 0; sna->render_state.gen2.ls1 = 0; sna->render_state.gen2.ls2 = 0; sna->render_state.gen2.vft = 0; sna->render_state.gen2.diffuse = 0x0c0ffee0; sna->render_state.gen2.specular = 0x0c0ffee0; } static void gen2_render_flush(struct sna *sna) { assert(sna->render.vertex_index == 0); assert(sna->render.vertex_offset == 0); } static void gen2_render_context_switch(struct kgem *kgem, int new_mode) { struct sna *sna = container_of(kgem, struct sna, kgem); if (!kgem->nbatch) return; /* Reload BLT registers following a lost context */ sna->blt_state.fill_bo = 0; if (kgem_ring_is_idle(kgem, kgem->ring)) { DBG(("%s: GPU idle, flushing\n", __FUNCTION__)); _kgem_submit(kgem); } } const char *gen2_render_init(struct sna *sna, const char *backend) { struct sna_render *render = &sna->render; sna->kgem.context_switch = gen2_render_context_switch; /* Use the BLT (and overlay) for everything except when forced to * use the texture combiners. */ #if !NO_COMPOSITE render->composite = gen2_render_composite; render->prefer_gpu |= PREFER_GPU_RENDER; #endif #if !NO_COMPOSITE_SPANS render->check_composite_spans = gen2_check_composite_spans; render->composite_spans = gen2_render_composite_spans; render->prefer_gpu |= PREFER_GPU_SPANS; #endif render->fill_boxes = gen2_render_fill_boxes; render->fill = gen2_render_fill; render->fill_one = gen2_render_fill_one; render->copy = gen2_render_copy; render->copy_boxes = gen2_render_copy_boxes; /* XXX YUV color space conversion for video? */ render->reset = gen2_render_reset; render->flush = gen2_render_flush; render->max_3d_size = MAX_3D_SIZE; render->max_3d_pitch = MAX_3D_PITCH; return "Almador (gen2)"; } xf86-video-intel-2.99.917/src/sna/gen4_vertex.c0000664000175000017500000023353412432737457015725 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "gen4_vertex.h" #ifndef sse2 #define sse2 #endif void gen4_vertex_align(struct sna *sna, const struct sna_composite_op *op) { int vertex_index; assert(op->floats_per_vertex); assert(op->floats_per_rect == 3*op->floats_per_vertex); assert(sna->render.vertex_used <= sna->render.vertex_size); vertex_index = (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex; if ((int)sna->render.vertex_size - vertex_index * op->floats_per_vertex < 2*op->floats_per_rect) { DBG(("%s: flushing vertex buffer: new index=%d, max=%d\n", __FUNCTION__, vertex_index, sna->render.vertex_size / op->floats_per_vertex)); if (gen4_vertex_finish(sna) < 2*op->floats_per_rect) { kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } assert(sna->render.vertex_used < sna->render.vertex_size); vertex_index = (sna->render.vertex_used + op->floats_per_vertex - 1) / op->floats_per_vertex; assert(vertex_index * op->floats_per_vertex <= sna->render.vertex_size); } sna->render.vertex_index = vertex_index; sna->render.vertex_used = vertex_index * op->floats_per_vertex; } void gen4_vertex_flush(struct sna *sna) { DBG(("%s[%x] = %d\n", __FUNCTION__, 4*sna->render.vertex_offset, sna->render.vertex_index - sna->render.vertex_start)); assert(sna->render.vertex_offset); assert(sna->render.vertex_offset <= sna->kgem.nbatch); assert(sna->render.vertex_index > sna->render.vertex_start); assert(sna->render.vertex_used <= sna->render.vertex_size); sna->kgem.batch[sna->render.vertex_offset] = sna->render.vertex_index - sna->render.vertex_start; sna->render.vertex_offset = 0; } int gen4_vertex_finish(struct sna *sna) { struct kgem_bo *bo; unsigned int i; unsigned hint, size; DBG(("%s: used=%d / %d\n", __FUNCTION__, sna->render.vertex_used, sna->render.vertex_size)); assert(sna->render.vertex_offset == 0); assert(sna->render.vertex_used); assert(sna->render.vertex_used <= sna->render.vertex_size); sna_vertex_wait__locked(&sna->render); /* Note: we only need dword alignment (currently) */ hint = CREATE_GTT_MAP; bo = sna->render.vbo; if (bo) { for (i = 0; i < sna->render.nvertex_reloc; i++) { DBG(("%s: reloc[%d] = %d\n", __FUNCTION__, i, sna->render.vertex_reloc[i])); sna->kgem.batch[sna->render.vertex_reloc[i]] = kgem_add_reloc(&sna->kgem, sna->render.vertex_reloc[i], bo, I915_GEM_DOMAIN_VERTEX << 16, 0); } assert(!sna->render.active); sna->render.nvertex_reloc = 0; sna->render.vertex_used = 0; sna->render.vertex_index = 0; sna->render.vbo = NULL; sna->render.vb_id = 0; kgem_bo_destroy(&sna->kgem, bo); hint |= CREATE_CACHED | CREATE_NO_THROTTLE; } else { assert(sna->render.vertex_size == ARRAY_SIZE(sna->render.vertex_data)); assert(sna->render.vertices == sna->render.vertex_data); if (kgem_is_idle(&sna->kgem)) return 0; } size = 256*1024; assert(!sna->render.active); sna->render.vertices = NULL; sna->render.vbo = kgem_create_linear(&sna->kgem, size, hint); while (sna->render.vbo == NULL && size > sizeof(sna->render.vertex_data)) { size /= 2; sna->render.vbo = kgem_create_linear(&sna->kgem, size, hint); } if (sna->render.vbo == NULL) sna->render.vbo = kgem_create_linear(&sna->kgem, 256*1024, CREATE_GTT_MAP); if (sna->render.vbo && kgem_check_bo(&sna->kgem, sna->render.vbo, NULL)) sna->render.vertices = kgem_bo_map(&sna->kgem, sna->render.vbo); if (sna->render.vertices == NULL) { if (sna->render.vbo) { kgem_bo_destroy(&sna->kgem, sna->render.vbo); sna->render.vbo = NULL; } sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); return 0; } if (sna->render.vertex_used) { DBG(("%s: copying initial buffer x %d to handle=%d\n", __FUNCTION__, sna->render.vertex_used, sna->render.vbo->handle)); assert(sizeof(float)*sna->render.vertex_used <= __kgem_bo_size(sna->render.vbo)); memcpy(sna->render.vertices, sna->render.vertex_data, sizeof(float)*sna->render.vertex_used); } size = __kgem_bo_size(sna->render.vbo)/4; if (size >= UINT16_MAX) size = UINT16_MAX - 1; DBG(("%s: create vbo handle=%d, size=%d floats [%d bytes]\n", __FUNCTION__, sna->render.vbo->handle, size, __kgem_bo_size(sna->render.vbo))); assert(size > sna->render.vertex_used); sna->render.vertex_size = size; return size - sna->render.vertex_used; } void gen4_vertex_close(struct sna *sna) { struct kgem_bo *bo, *free_bo = NULL; unsigned int i, delta = 0; assert(sna->render.vertex_offset == 0); if (!sna->render.vb_id) return; DBG(("%s: used=%d, vbo active? %d, vb=%x, nreloc=%d\n", __FUNCTION__, sna->render.vertex_used, sna->render.vbo ? sna->render.vbo->handle : 0, sna->render.vb_id, sna->render.nvertex_reloc)); assert(!sna->render.active); bo = sna->render.vbo; if (bo) { if (sna->render.vertex_size - sna->render.vertex_used < 64) { DBG(("%s: discarding vbo (full), handle=%d\n", __FUNCTION__, sna->render.vbo->handle)); sna->render.vbo = NULL; sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); free_bo = bo; } else if (!sna->kgem.has_llc && sna->render.vertices == MAP(bo->map__cpu)) { DBG(("%s: converting CPU map to GTT\n", __FUNCTION__)); sna->render.vertices = kgem_bo_map__gtt(&sna->kgem, sna->render.vbo); if (sna->render.vertices == NULL) { sna->render.vbo = NULL; sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); free_bo = bo; } } } else { int size; size = sna->kgem.nbatch; size += sna->kgem.batch_size - sna->kgem.surface; size += sna->render.vertex_used; if (size <= 1024) { DBG(("%s: copy to batch: %d @ %d\n", __FUNCTION__, sna->render.vertex_used, sna->kgem.nbatch)); assert(sna->kgem.nbatch + sna->render.vertex_used <= sna->kgem.surface); memcpy(sna->kgem.batch + sna->kgem.nbatch, sna->render.vertex_data, sna->render.vertex_used * 4); delta = sna->kgem.nbatch * 4; bo = NULL; sna->kgem.nbatch += sna->render.vertex_used; } else { size = 256 * 1024; do { bo = kgem_create_linear(&sna->kgem, size, CREATE_GTT_MAP | CREATE_NO_RETIRE | CREATE_NO_THROTTLE | CREATE_CACHED); } while (bo == NULL && (size>>=1) > sizeof(float)*sna->render.vertex_used); sna->render.vertices = NULL; if (bo) sna->render.vertices = kgem_bo_map(&sna->kgem, bo); if (sna->render.vertices != NULL) { DBG(("%s: new vbo: %d / %d\n", __FUNCTION__, sna->render.vertex_used, __kgem_bo_size(bo)/4)); assert(sizeof(float)*sna->render.vertex_used <= __kgem_bo_size(bo)); memcpy(sna->render.vertices, sna->render.vertex_data, sizeof(float)*sna->render.vertex_used); size = __kgem_bo_size(bo)/4; if (size >= UINT16_MAX) size = UINT16_MAX - 1; sna->render.vbo = bo; sna->render.vertex_size = size; } else { DBG(("%s: tmp vbo: %d\n", __FUNCTION__, sna->render.vertex_used)); if (bo) kgem_bo_destroy(&sna->kgem, bo); bo = kgem_create_linear(&sna->kgem, 4*sna->render.vertex_used, CREATE_NO_THROTTLE); if (bo && !kgem_bo_write(&sna->kgem, bo, sna->render.vertex_data, 4*sna->render.vertex_used)) { kgem_bo_destroy(&sna->kgem, bo); bo = NULL; } assert(sna->render.vbo == NULL); sna->render.vertices = sna->render.vertex_data; sna->render.vertex_size = ARRAY_SIZE(sna->render.vertex_data); free_bo = bo; } } } assert(sna->render.nvertex_reloc); for (i = 0; i < sna->render.nvertex_reloc; i++) { DBG(("%s: reloc[%d] = %d\n", __FUNCTION__, i, sna->render.vertex_reloc[i])); sna->kgem.batch[sna->render.vertex_reloc[i]] = kgem_add_reloc(&sna->kgem, sna->render.vertex_reloc[i], bo, I915_GEM_DOMAIN_VERTEX << 16, delta); } sna->render.nvertex_reloc = 0; sna->render.vb_id = 0; if (sna->render.vbo == NULL) { assert(!sna->render.active); sna->render.vertex_used = 0; sna->render.vertex_index = 0; assert(sna->render.vertices == sna->render.vertex_data); assert(sna->render.vertex_size == ARRAY_SIZE(sna->render.vertex_data)); } if (free_bo) kgem_bo_destroy(&sna->kgem, free_bo); } /* specialised vertex emission routines */ #define OUT_VERTEX(x,y) vertex_emit_2s(sna, x,y) /* XXX assert(!too_large(x, y)); */ #define OUT_VERTEX_F(v) vertex_emit(sna, v) force_inline static float compute_linear(const struct sna_composite_channel *channel, int16_t x, int16_t y) { return ((x+channel->offset[0]) * channel->u.linear.dx + (y+channel->offset[1]) * channel->u.linear.dy + channel->u.linear.offset); } sse2 inline static void emit_texcoord(struct sna *sna, const struct sna_composite_channel *channel, int16_t x, int16_t y) { if (channel->is_solid) { OUT_VERTEX_F(0.5); return; } x += channel->offset[0]; y += channel->offset[1]; if (channel->is_affine) { float s, t; sna_get_transformed_coordinates(x, y, channel->transform, &s, &t); OUT_VERTEX_F(s * channel->scale[0]); OUT_VERTEX_F(t * channel->scale[1]); } else { float s, t, w; sna_get_transformed_coordinates_3d(x, y, channel->transform, &s, &t, &w); OUT_VERTEX_F(s * channel->scale[0]); OUT_VERTEX_F(t * channel->scale[1]); OUT_VERTEX_F(w); } } sse2 force_inline static void emit_vertex(struct sna *sna, const struct sna_composite_op *op, int16_t srcX, int16_t srcY, int16_t mskX, int16_t mskY, int16_t dstX, int16_t dstY) { OUT_VERTEX(dstX, dstY); emit_texcoord(sna, &op->src, srcX, srcY); } sse2 fastcall static void emit_primitive(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { emit_vertex(sna, op, r->src.x + r->width, r->src.y + r->height, r->mask.x + r->width, r->mask.y + r->height, r->dst.x + r->width, r->dst.y + r->height); emit_vertex(sna, op, r->src.x, r->src.y + r->height, r->mask.x, r->mask.y + r->height, r->dst.x, r->dst.y + r->height); emit_vertex(sna, op, r->src.x, r->src.y, r->mask.x, r->mask.y, r->dst.x, r->dst.y); } sse2 inline static float * vemit_texcoord(float *v, const struct sna_composite_channel *channel, int16_t x, int16_t y) { if (channel->is_solid) { *v++ = 0.5; } else { x += channel->offset[0]; y += channel->offset[1]; if (channel->is_affine) { float s, t; sna_get_transformed_coordinates(x, y, channel->transform, &s, &t); *v++ = s * channel->scale[0]; *v++ = t * channel->scale[1]; } else { float s, t, w; sna_get_transformed_coordinates_3d(x, y, channel->transform, &s, &t, &w); *v++ = s * channel->scale[0]; *v++ = t * channel->scale[1]; *v++ = w; } } return v; } sse2 force_inline static float * vemit_vertex(float *v, const struct sna_composite_op *op, int16_t x, int16_t y) { *v++ = pack_2s(x, y); return vemit_texcoord(v, &op->src, x, y); } sse2 fastcall static void emit_boxes(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { v = vemit_vertex(v, op, box->x2, box->y2); v = vemit_vertex(v, op, box->x1, box->y2); v = vemit_vertex(v, op, box->x1, box->y1); box++; } while (--nbox); } sse2 force_inline static void emit_vertex_mask(struct sna *sna, const struct sna_composite_op *op, int16_t srcX, int16_t srcY, int16_t mskX, int16_t mskY, int16_t dstX, int16_t dstY) { OUT_VERTEX(dstX, dstY); emit_texcoord(sna, &op->src, srcX, srcY); emit_texcoord(sna, &op->mask, mskX, mskY); } sse2 fastcall static void emit_primitive_mask(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { emit_vertex_mask(sna, op, r->src.x + r->width, r->src.y + r->height, r->mask.x + r->width, r->mask.y + r->height, r->dst.x + r->width, r->dst.y + r->height); emit_vertex_mask(sna, op, r->src.x, r->src.y + r->height, r->mask.x, r->mask.y + r->height, r->dst.x, r->dst.y + r->height); emit_vertex_mask(sna, op, r->src.x, r->src.y, r->mask.x, r->mask.y, r->dst.x, r->dst.y); } sse2 force_inline static float * vemit_vertex_mask(float *v, const struct sna_composite_op *op, int16_t x, int16_t y) { *v++ = pack_2s(x, y); v = vemit_texcoord(v, &op->src, x, y); v = vemit_texcoord(v, &op->mask, x, y); return v; } sse2 fastcall static void emit_boxes_mask(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { v = vemit_vertex_mask(v, op, box->x2, box->y2); v = vemit_vertex_mask(v, op, box->x1, box->y2); v = vemit_vertex_mask(v, op, box->x1, box->y1); box++; } while (--nbox); } sse2 fastcall static void emit_primitive_solid(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float *v; union { struct sna_coordinate p; float f; } dst; assert(op->floats_per_rect == 6); assert((sna->render.vertex_used % 2) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; dst.p.x = r->dst.x; v[2] = dst.f; dst.p.y = r->dst.y; v[4] = dst.f; v[5] = v[3] = v[1] = .5; } sse2 fastcall static void emit_boxes_solid(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; dst.p.x = box->x1; v[2] = dst.f; dst.p.y = box->y1; v[4] = dst.f; v[5] = v[3] = v[1] = .5; box++; v += 6; } while (--nbox); } sse2 fastcall static void emit_primitive_linear(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float *v; union { struct sna_coordinate p; float f; } dst; assert(op->floats_per_rect == 6); assert((sna->render.vertex_used % 2) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; dst.p.x = r->dst.x; v[2] = dst.f; dst.p.y = r->dst.y; v[4] = dst.f; v[1] = compute_linear(&op->src, r->src.x+r->width, r->src.y+r->height); v[3] = compute_linear(&op->src, r->src.x, r->src.y+r->height); v[5] = compute_linear(&op->src, r->src.x, r->src.y); } sse2 fastcall static void emit_boxes_linear(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { union { struct sna_coordinate p; float f; } dst; do { dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; dst.p.x = box->x1; v[2] = dst.f; dst.p.y = box->y1; v[4] = dst.f; v[1] = compute_linear(&op->src, box->x2, box->y2); v[3] = compute_linear(&op->src, box->x1, box->y2); v[5] = compute_linear(&op->src, box->x1, box->y1); v += 6; box++; } while (--nbox); } sse2 fastcall static void emit_primitive_identity_source(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { union { struct sna_coordinate p; float f; } dst; float *v; assert(op->floats_per_rect == 9); assert((sna->render.vertex_used % 3) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; dst.p.x = r->dst.x; v[3] = dst.f; dst.p.y = r->dst.y; v[6] = dst.f; v[7] = v[4] = (r->src.x + op->src.offset[0]) * op->src.scale[0]; v[1] = v[4] + r->width * op->src.scale[0]; v[8] = (r->src.y + op->src.offset[1]) * op->src.scale[1]; v[5] = v[2] = v[8] + r->height * op->src.scale[1]; } sse2 fastcall static void emit_boxes_identity_source(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; dst.p.x = box->x1; v[3] = dst.f; dst.p.y = box->y1; v[6] = dst.f; v[7] = v[4] = (box->x1 + op->src.offset[0]) * op->src.scale[0]; v[1] = (box->x2 + op->src.offset[0]) * op->src.scale[0]; v[8] = (box->y1 + op->src.offset[1]) * op->src.scale[1]; v[2] = v[5] = (box->y2 + op->src.offset[1]) * op->src.scale[1]; v += 9; box++; } while (--nbox); } sse2 fastcall static void emit_primitive_simple_source(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float *v; union { struct sna_coordinate p; float f; } dst; float xx = op->src.transform->matrix[0][0]; float x0 = op->src.transform->matrix[0][2]; float yy = op->src.transform->matrix[1][1]; float y0 = op->src.transform->matrix[1][2]; float sx = op->src.scale[0]; float sy = op->src.scale[1]; int16_t tx = op->src.offset[0]; int16_t ty = op->src.offset[1]; assert(op->floats_per_rect == 9); assert((sna->render.vertex_used % 3) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*3; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; v[1] = ((r->src.x + r->width + tx) * xx + x0) * sx; v[5] = v[2] = ((r->src.y + r->height + ty) * yy + y0) * sy; dst.p.x = r->dst.x; v[3] = dst.f; v[7] = v[4] = ((r->src.x + tx) * xx + x0) * sx; dst.p.y = r->dst.y; v[6] = dst.f; v[8] = ((r->src.y + ty) * yy + y0) * sy; } sse2 fastcall static void emit_boxes_simple_source(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { float xx = op->src.transform->matrix[0][0]; float x0 = op->src.transform->matrix[0][2]; float yy = op->src.transform->matrix[1][1]; float y0 = op->src.transform->matrix[1][2]; float sx = op->src.scale[0]; float sy = op->src.scale[1]; int16_t tx = op->src.offset[0]; int16_t ty = op->src.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[1] = ((box->x2 + tx) * xx + x0) * sx; v[5] = v[2] = ((box->y2 + ty) * yy + y0) * sy; dst.p.x = box->x1; v[3] = dst.f; v[7] = v[4] = ((box->x1 + tx) * xx + x0) * sx; dst.p.y = box->y1; v[6] = dst.f; v[8] = ((box->y1 + ty) * yy + y0) * sy; v += 9; box++; } while (--nbox); } sse2 fastcall static void emit_primitive_affine_source(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { union { struct sna_coordinate p; float f; } dst; float *v; assert(op->floats_per_rect == 9); assert((sna->render.vertex_used % 3) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; _sna_get_transformed_scaled(op->src.offset[0] + r->src.x + r->width, op->src.offset[1] + r->src.y + r->height, op->src.transform, op->src.scale, &v[1], &v[2]); dst.p.x = r->dst.x; v[3] = dst.f; _sna_get_transformed_scaled(op->src.offset[0] + r->src.x, op->src.offset[1] + r->src.y + r->height, op->src.transform, op->src.scale, &v[4], &v[5]); dst.p.y = r->dst.y; v[6] = dst.f; _sna_get_transformed_scaled(op->src.offset[0] + r->src.x, op->src.offset[1] + r->src.y, op->src.transform, op->src.scale, &v[7], &v[8]); } sse2 fastcall static void emit_boxes_affine_source(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; _sna_get_transformed_scaled(op->src.offset[0] + box->x2, op->src.offset[1] + box->y2, op->src.transform, op->src.scale, &v[1], &v[2]); dst.p.x = box->x1; v[3] = dst.f; _sna_get_transformed_scaled(op->src.offset[0] + box->x1, op->src.offset[1] + box->y2, op->src.transform, op->src.scale, &v[4], &v[5]); dst.p.y = box->y1; v[6] = dst.f; _sna_get_transformed_scaled(op->src.offset[0] + box->x1, op->src.offset[1] + box->y1, op->src.transform, op->src.scale, &v[7], &v[8]); box++; v += 9; } while (--nbox); } sse2 fastcall static void emit_primitive_identity_mask(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { union { struct sna_coordinate p; float f; } dst; float msk_x, msk_y; float w, h; float *v; msk_x = r->mask.x + op->mask.offset[0]; msk_y = r->mask.y + op->mask.offset[1]; w = r->width; h = r->height; DBG(("%s: dst=(%d, %d), mask=(%f, %f) x (%f, %f)\n", __FUNCTION__, r->dst.x, r->dst.y, msk_x, msk_y, w, h)); assert(op->floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; v[2] = (msk_x + w) * op->mask.scale[0]; v[7] = v[3] = (msk_y + h) * op->mask.scale[1]; dst.p.x = r->dst.x; v[4] = dst.f; v[10] = v[6] = msk_x * op->mask.scale[0]; dst.p.y = r->dst.y; v[8] = dst.f; v[11] = msk_y * op->mask.scale[1]; v[9] = v[5] = v[1] = .5; } sse2 fastcall static void emit_boxes_identity_mask(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { float msk_x = op->mask.offset[0]; float msk_y = op->mask.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[2] = (msk_x + box->x2) * op->mask.scale[0]; v[7] = v[3] = (msk_y + box->y2) * op->mask.scale[1]; dst.p.x = box->x1; v[4] = dst.f; v[10] = v[6] = (msk_x + box->x1) * op->mask.scale[0]; dst.p.y = box->y1; v[8] = dst.f; v[11] = (msk_y + box->y1) * op->mask.scale[1]; v[9] = v[5] = v[1] = .5; v += 12; box++; } while (--nbox); } sse2 fastcall static void emit_primitive_linear_identity_mask(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { union { struct sna_coordinate p; float f; } dst; float msk_x, msk_y; float w, h; float *v; msk_x = r->mask.x + op->mask.offset[0]; msk_y = r->mask.y + op->mask.offset[1]; w = r->width; h = r->height; DBG(("%s: dst=(%d, %d), mask=(%f, %f) x (%f, %f)\n", __FUNCTION__, r->dst.x, r->dst.y, msk_x, msk_y, w, h)); assert(op->floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; v[2] = (msk_x + w) * op->mask.scale[0]; v[7] = v[3] = (msk_y + h) * op->mask.scale[1]; dst.p.x = r->dst.x; v[4] = dst.f; v[10] = v[6] = msk_x * op->mask.scale[0]; dst.p.y = r->dst.y; v[8] = dst.f; v[11] = msk_y * op->mask.scale[1]; v[1] = compute_linear(&op->src, r->src.x+r->width, r->src.y+r->height); v[5] = compute_linear(&op->src, r->src.x, r->src.y+r->height); v[9] = compute_linear(&op->src, r->src.x, r->src.y); } sse2 fastcall static void emit_boxes_linear_identity_mask(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { float msk_x = op->mask.offset[0]; float msk_y = op->mask.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[2] = (msk_x + box->x2) * op->mask.scale[0]; v[7] = v[3] = (msk_y + box->y2) * op->mask.scale[1]; dst.p.x = box->x1; v[4] = dst.f; v[10] = v[6] = (msk_x + box->x1) * op->mask.scale[0]; dst.p.y = box->y1; v[8] = dst.f; v[11] = (msk_y + box->y1) * op->mask.scale[1]; v[1] = compute_linear(&op->src, box->x2, box->y2); v[5] = compute_linear(&op->src, box->x1, box->y2); v[9] = compute_linear(&op->src, box->x1, box->y1); v += 12; box++; } while (--nbox); } sse2 fastcall static void emit_primitive_identity_source_mask(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { union { struct sna_coordinate p; float f; } dst; float src_x, src_y; float msk_x, msk_y; float w, h; float *v; src_x = r->src.x + op->src.offset[0]; src_y = r->src.y + op->src.offset[1]; msk_x = r->mask.x + op->mask.offset[0]; msk_y = r->mask.y + op->mask.offset[1]; w = r->width; h = r->height; assert(op->floats_per_rect == 15); assert((sna->render.vertex_used % 5) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 15; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; v[1] = (src_x + w) * op->src.scale[0]; v[2] = (src_y + h) * op->src.scale[1]; v[3] = (msk_x + w) * op->mask.scale[0]; v[4] = (msk_y + h) * op->mask.scale[1]; dst.p.x = r->dst.x; v[5] = dst.f; v[6] = src_x * op->src.scale[0]; v[7] = v[2]; v[8] = msk_x * op->mask.scale[0]; v[9] = v[4]; dst.p.y = r->dst.y; v[10] = dst.f; v[11] = v[6]; v[12] = src_y * op->src.scale[1]; v[13] = v[8]; v[14] = msk_y * op->mask.scale[1]; } sse2 fastcall static void emit_primitive_simple_source_identity(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float *v; union { struct sna_coordinate p; float f; } dst; float xx = op->src.transform->matrix[0][0]; float x0 = op->src.transform->matrix[0][2]; float yy = op->src.transform->matrix[1][1]; float y0 = op->src.transform->matrix[1][2]; float sx = op->src.scale[0]; float sy = op->src.scale[1]; int16_t tx = op->src.offset[0]; int16_t ty = op->src.offset[1]; float msk_x = r->mask.x + op->mask.offset[0]; float msk_y = r->mask.y + op->mask.offset[1]; float w = r->width, h = r->height; assert(op->floats_per_rect == 15); assert((sna->render.vertex_used % 5) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*5; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; v[1] = ((r->src.x + r->width + tx) * xx + x0) * sx; v[2] = ((r->src.y + r->height + ty) * yy + y0) * sy; v[3] = (msk_x + w) * op->mask.scale[0]; v[4] = (msk_y + h) * op->mask.scale[1]; dst.p.x = r->dst.x; v[5] = dst.f; v[6] = ((r->src.x + tx) * xx + x0) * sx; v[7] = v[2]; v[8] = msk_x * op->mask.scale[0]; v[9] = v[4]; dst.p.y = r->dst.y; v[10] = dst.f; v[11] = v[6]; v[12] = ((r->src.y + ty) * yy + y0) * sy; v[13] = v[8]; v[14] = msk_y * op->mask.scale[1]; } sse2 fastcall static void emit_primitive_affine_source_identity(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float *v; union { struct sna_coordinate p; float f; } dst; float msk_x = r->mask.x + op->mask.offset[0]; float msk_y = r->mask.y + op->mask.offset[1]; float w = r->width, h = r->height; assert(op->floats_per_rect == 15); assert((sna->render.vertex_used % 5) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*5; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; _sna_get_transformed_scaled(op->src.offset[0] + r->src.x + r->width, op->src.offset[1] + r->src.y + r->height, op->src.transform, op->src.scale, &v[1], &v[2]); v[3] = (msk_x + w) * op->mask.scale[0]; v[4] = (msk_y + h) * op->mask.scale[1]; dst.p.x = r->dst.x; v[5] = dst.f; _sna_get_transformed_scaled(op->src.offset[0] + r->src.x, op->src.offset[1] + r->src.y + r->height, op->src.transform, op->src.scale, &v[6], &v[7]); v[8] = msk_x * op->mask.scale[0]; v[9] = v[4]; dst.p.y = r->dst.y; v[10] = dst.f; _sna_get_transformed_scaled(op->src.offset[0] + r->src.x, op->src.offset[1] + r->src.y, op->src.transform, op->src.scale, &v[11], &v[12]); v[13] = v[8]; v[14] = msk_y * op->mask.scale[1]; } /* SSE4_2 */ #if defined(sse4_2) sse4_2 fastcall static void emit_primitive_linear__sse4_2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float *v; union { struct sna_coordinate p; float f; } dst; assert(op->floats_per_rect == 6); assert((sna->render.vertex_used % 2) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; dst.p.x = r->dst.x; v[2] = dst.f; dst.p.y = r->dst.y; v[4] = dst.f; v[1] = compute_linear(&op->src, r->src.x+r->width, r->src.y+r->height); v[3] = compute_linear(&op->src, r->src.x, r->src.y+r->height); v[5] = compute_linear(&op->src, r->src.x, r->src.y); } sse4_2 fastcall static void emit_boxes_linear__sse4_2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { union { struct sna_coordinate p; float f; } dst; do { dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; dst.p.x = box->x1; v[2] = dst.f; dst.p.y = box->y1; v[4] = dst.f; v[1] = compute_linear(&op->src, box->x2, box->y2); v[3] = compute_linear(&op->src, box->x1, box->y2); v[5] = compute_linear(&op->src, box->x1, box->y1); v += 6; box++; } while (--nbox); } sse4_2 fastcall static void emit_primitive_identity_source__sse4_2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { union { struct sna_coordinate p; float f; } dst; float *v; assert(op->floats_per_rect == 9); assert((sna->render.vertex_used % 3) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; dst.p.x = r->dst.x; v[3] = dst.f; dst.p.y = r->dst.y; v[6] = dst.f; v[7] = v[4] = (r->src.x + op->src.offset[0]) * op->src.scale[0]; v[1] = v[4] + r->width * op->src.scale[0]; v[8] = (r->src.y + op->src.offset[1]) * op->src.scale[1]; v[5] = v[2] = v[8] + r->height * op->src.scale[1]; } sse4_2 fastcall static void emit_boxes_identity_source__sse4_2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; dst.p.x = box->x1; v[3] = dst.f; dst.p.y = box->y1; v[6] = dst.f; v[7] = v[4] = (box->x1 + op->src.offset[0]) * op->src.scale[0]; v[1] = (box->x2 + op->src.offset[0]) * op->src.scale[0]; v[8] = (box->y1 + op->src.offset[1]) * op->src.scale[1]; v[2] = v[5] = (box->y2 + op->src.offset[1]) * op->src.scale[1]; v += 9; box++; } while (--nbox); } sse4_2 fastcall static void emit_primitive_simple_source__sse4_2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float *v; union { struct sna_coordinate p; float f; } dst; float xx = op->src.transform->matrix[0][0]; float x0 = op->src.transform->matrix[0][2]; float yy = op->src.transform->matrix[1][1]; float y0 = op->src.transform->matrix[1][2]; float sx = op->src.scale[0]; float sy = op->src.scale[1]; int16_t tx = op->src.offset[0]; int16_t ty = op->src.offset[1]; assert(op->floats_per_rect == 9); assert((sna->render.vertex_used % 3) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*3; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; v[1] = ((r->src.x + r->width + tx) * xx + x0) * sx; v[5] = v[2] = ((r->src.y + r->height + ty) * yy + y0) * sy; dst.p.x = r->dst.x; v[3] = dst.f; v[7] = v[4] = ((r->src.x + tx) * xx + x0) * sx; dst.p.y = r->dst.y; v[6] = dst.f; v[8] = ((r->src.y + ty) * yy + y0) * sy; } sse4_2 fastcall static void emit_boxes_simple_source__sse4_2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { float xx = op->src.transform->matrix[0][0]; float x0 = op->src.transform->matrix[0][2]; float yy = op->src.transform->matrix[1][1]; float y0 = op->src.transform->matrix[1][2]; float sx = op->src.scale[0]; float sy = op->src.scale[1]; int16_t tx = op->src.offset[0]; int16_t ty = op->src.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[1] = ((box->x2 + tx) * xx + x0) * sx; v[5] = v[2] = ((box->y2 + ty) * yy + y0) * sy; dst.p.x = box->x1; v[3] = dst.f; v[7] = v[4] = ((box->x1 + tx) * xx + x0) * sx; dst.p.y = box->y1; v[6] = dst.f; v[8] = ((box->y1 + ty) * yy + y0) * sy; v += 9; box++; } while (--nbox); } sse4_2 fastcall static void emit_primitive_identity_mask__sse4_2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { union { struct sna_coordinate p; float f; } dst; float msk_x, msk_y; float w, h; float *v; msk_x = r->mask.x + op->mask.offset[0]; msk_y = r->mask.y + op->mask.offset[1]; w = r->width; h = r->height; DBG(("%s: dst=(%d, %d), mask=(%f, %f) x (%f, %f)\n", __FUNCTION__, r->dst.x, r->dst.y, msk_x, msk_y, w, h)); assert(op->floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; v[2] = (msk_x + w) * op->mask.scale[0]; v[7] = v[3] = (msk_y + h) * op->mask.scale[1]; dst.p.x = r->dst.x; v[4] = dst.f; v[10] = v[6] = msk_x * op->mask.scale[0]; dst.p.y = r->dst.y; v[8] = dst.f; v[11] = msk_y * op->mask.scale[1]; v[9] = v[5] = v[1] = .5; } sse4_2 fastcall static void emit_boxes_identity_mask__sse4_2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { float msk_x = op->mask.offset[0]; float msk_y = op->mask.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[2] = (msk_x + box->x2) * op->mask.scale[0]; v[7] = v[3] = (msk_y + box->y2) * op->mask.scale[1]; dst.p.x = box->x1; v[4] = dst.f; v[10] = v[6] = (msk_x + box->x1) * op->mask.scale[0]; dst.p.y = box->y1; v[8] = dst.f; v[11] = (msk_y + box->y1) * op->mask.scale[1]; v[9] = v[5] = v[1] = .5; v += 12; box++; } while (--nbox); } sse4_2 fastcall static void emit_primitive_linear_identity_mask__sse4_2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { union { struct sna_coordinate p; float f; } dst; float msk_x, msk_y; float w, h; float *v; msk_x = r->mask.x + op->mask.offset[0]; msk_y = r->mask.y + op->mask.offset[1]; w = r->width; h = r->height; DBG(("%s: dst=(%d, %d), mask=(%f, %f) x (%f, %f)\n", __FUNCTION__, r->dst.x, r->dst.y, msk_x, msk_y, w, h)); assert(op->floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; v[2] = (msk_x + w) * op->mask.scale[0]; v[7] = v[3] = (msk_y + h) * op->mask.scale[1]; dst.p.x = r->dst.x; v[4] = dst.f; v[10] = v[6] = msk_x * op->mask.scale[0]; dst.p.y = r->dst.y; v[8] = dst.f; v[11] = msk_y * op->mask.scale[1]; v[1] = compute_linear(&op->src, r->src.x+r->width, r->src.y+r->height); v[5] = compute_linear(&op->src, r->src.x, r->src.y+r->height); v[9] = compute_linear(&op->src, r->src.x, r->src.y); } sse4_2 fastcall static void emit_boxes_linear_identity_mask__sse4_2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { float msk_x = op->mask.offset[0]; float msk_y = op->mask.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[2] = (msk_x + box->x2) * op->mask.scale[0]; v[7] = v[3] = (msk_y + box->y2) * op->mask.scale[1]; dst.p.x = box->x1; v[4] = dst.f; v[10] = v[6] = (msk_x + box->x1) * op->mask.scale[0]; dst.p.y = box->y1; v[8] = dst.f; v[11] = (msk_y + box->y1) * op->mask.scale[1]; v[1] = compute_linear(&op->src, box->x2, box->y2); v[5] = compute_linear(&op->src, box->x1, box->y2); v[9] = compute_linear(&op->src, box->x1, box->y1); v += 12; box++; } while (--nbox); } #endif /* AVX2 */ #if defined(avx2) avx2 fastcall static void emit_primitive_linear__avx2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float *v; union { struct sna_coordinate p; float f; } dst; assert(op->floats_per_rect == 6); assert((sna->render.vertex_used % 2) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; dst.p.x = r->dst.x; v[2] = dst.f; dst.p.y = r->dst.y; v[4] = dst.f; v[1] = compute_linear(&op->src, r->src.x+r->width, r->src.y+r->height); v[3] = compute_linear(&op->src, r->src.x, r->src.y+r->height); v[5] = compute_linear(&op->src, r->src.x, r->src.y); } avx2 fastcall static void emit_boxes_linear__avx2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { union { struct sna_coordinate p; float f; } dst; do { dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; dst.p.x = box->x1; v[2] = dst.f; dst.p.y = box->y1; v[4] = dst.f; v[1] = compute_linear(&op->src, box->x2, box->y2); v[3] = compute_linear(&op->src, box->x1, box->y2); v[5] = compute_linear(&op->src, box->x1, box->y1); v += 6; box++; } while (--nbox); } avx2 fastcall static void emit_primitive_identity_source__avx2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { union { struct sna_coordinate p; float f; } dst; float *v; assert(op->floats_per_rect == 9); assert((sna->render.vertex_used % 3) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; dst.p.x = r->dst.x; v[3] = dst.f; dst.p.y = r->dst.y; v[6] = dst.f; v[7] = v[4] = (r->src.x + op->src.offset[0]) * op->src.scale[0]; v[1] = v[4] + r->width * op->src.scale[0]; v[8] = (r->src.y + op->src.offset[1]) * op->src.scale[1]; v[5] = v[2] = v[8] + r->height * op->src.scale[1]; } avx2 fastcall static void emit_boxes_identity_source__avx2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; dst.p.x = box->x1; v[3] = dst.f; dst.p.y = box->y1; v[6] = dst.f; v[7] = v[4] = (box->x1 + op->src.offset[0]) * op->src.scale[0]; v[1] = (box->x2 + op->src.offset[0]) * op->src.scale[0]; v[8] = (box->y1 + op->src.offset[1]) * op->src.scale[1]; v[2] = v[5] = (box->y2 + op->src.offset[1]) * op->src.scale[1]; v += 9; box++; } while (--nbox); } avx2 fastcall static void emit_primitive_simple_source__avx2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { float *v; union { struct sna_coordinate p; float f; } dst; float xx = op->src.transform->matrix[0][0]; float x0 = op->src.transform->matrix[0][2]; float yy = op->src.transform->matrix[1][1]; float y0 = op->src.transform->matrix[1][2]; float sx = op->src.scale[0]; float sy = op->src.scale[1]; int16_t tx = op->src.offset[0]; int16_t ty = op->src.offset[1]; assert(op->floats_per_rect == 9); assert((sna->render.vertex_used % 3) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*3; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; v[1] = ((r->src.x + r->width + tx) * xx + x0) * sx; v[5] = v[2] = ((r->src.y + r->height + ty) * yy + y0) * sy; dst.p.x = r->dst.x; v[3] = dst.f; v[7] = v[4] = ((r->src.x + tx) * xx + x0) * sx; dst.p.y = r->dst.y; v[6] = dst.f; v[8] = ((r->src.y + ty) * yy + y0) * sy; } avx2 fastcall static void emit_boxes_simple_source__avx2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { float xx = op->src.transform->matrix[0][0]; float x0 = op->src.transform->matrix[0][2]; float yy = op->src.transform->matrix[1][1]; float y0 = op->src.transform->matrix[1][2]; float sx = op->src.scale[0]; float sy = op->src.scale[1]; int16_t tx = op->src.offset[0]; int16_t ty = op->src.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[1] = ((box->x2 + tx) * xx + x0) * sx; v[5] = v[2] = ((box->y2 + ty) * yy + y0) * sy; dst.p.x = box->x1; v[3] = dst.f; v[7] = v[4] = ((box->x1 + tx) * xx + x0) * sx; dst.p.y = box->y1; v[6] = dst.f; v[8] = ((box->y1 + ty) * yy + y0) * sy; v += 9; box++; } while (--nbox); } avx2 fastcall static void emit_primitive_identity_mask__avx2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { union { struct sna_coordinate p; float f; } dst; float msk_x, msk_y; float w, h; float *v; msk_x = r->mask.x + op->mask.offset[0]; msk_y = r->mask.y + op->mask.offset[1]; w = r->width; h = r->height; DBG(("%s: dst=(%d, %d), mask=(%f, %f) x (%f, %f)\n", __FUNCTION__, r->dst.x, r->dst.y, msk_x, msk_y, w, h)); assert(op->floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; v[2] = (msk_x + w) * op->mask.scale[0]; v[7] = v[3] = (msk_y + h) * op->mask.scale[1]; dst.p.x = r->dst.x; v[4] = dst.f; v[10] = v[6] = msk_x * op->mask.scale[0]; dst.p.y = r->dst.y; v[8] = dst.f; v[11] = msk_y * op->mask.scale[1]; v[9] = v[5] = v[1] = .5; } avx2 fastcall static void emit_boxes_identity_mask__avx2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { float msk_x = op->mask.offset[0]; float msk_y = op->mask.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[2] = (msk_x + box->x2) * op->mask.scale[0]; v[7] = v[3] = (msk_y + box->y2) * op->mask.scale[1]; dst.p.x = box->x1; v[4] = dst.f; v[10] = v[6] = (msk_x + box->x1) * op->mask.scale[0]; dst.p.y = box->y1; v[8] = dst.f; v[11] = (msk_y + box->y1) * op->mask.scale[1]; v[9] = v[5] = v[1] = .5; v += 12; box++; } while (--nbox); } avx2 fastcall static void emit_primitive_linear_identity_mask__avx2(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { union { struct sna_coordinate p; float f; } dst; float msk_x, msk_y; float w, h; float *v; msk_x = r->mask.x + op->mask.offset[0]; msk_y = r->mask.y + op->mask.offset[1]; w = r->width; h = r->height; DBG(("%s: dst=(%d, %d), mask=(%f, %f) x (%f, %f)\n", __FUNCTION__, r->dst.x, r->dst.y, msk_x, msk_y, w, h)); assert(op->floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; dst.p.x = r->dst.x + r->width; dst.p.y = r->dst.y + r->height; v[0] = dst.f; v[2] = (msk_x + w) * op->mask.scale[0]; v[7] = v[3] = (msk_y + h) * op->mask.scale[1]; dst.p.x = r->dst.x; v[4] = dst.f; v[10] = v[6] = msk_x * op->mask.scale[0]; dst.p.y = r->dst.y; v[8] = dst.f; v[11] = msk_y * op->mask.scale[1]; v[1] = compute_linear(&op->src, r->src.x+r->width, r->src.y+r->height); v[5] = compute_linear(&op->src, r->src.x, r->src.y+r->height); v[9] = compute_linear(&op->src, r->src.x, r->src.y); } avx2 fastcall static void emit_boxes_linear_identity_mask__avx2(const struct sna_composite_op *op, const BoxRec *box, int nbox, float *v) { float msk_x = op->mask.offset[0]; float msk_y = op->mask.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[2] = (msk_x + box->x2) * op->mask.scale[0]; v[7] = v[3] = (msk_y + box->y2) * op->mask.scale[1]; dst.p.x = box->x1; v[4] = dst.f; v[10] = v[6] = (msk_x + box->x1) * op->mask.scale[0]; dst.p.y = box->y1; v[8] = dst.f; v[11] = (msk_y + box->y1) * op->mask.scale[1]; v[1] = compute_linear(&op->src, box->x2, box->y2); v[5] = compute_linear(&op->src, box->x1, box->y2); v[9] = compute_linear(&op->src, box->x1, box->y1); v += 12; box++; } while (--nbox); } #endif unsigned gen4_choose_composite_emitter(struct sna *sna, struct sna_composite_op *tmp) { unsigned vb; if (tmp->mask.bo) { if (tmp->mask.transform == NULL) { if (tmp->src.is_solid) { DBG(("%s: solid, identity mask\n", __FUNCTION__)); #if defined(avx2) if (sna->cpu_features & AVX2) { tmp->prim_emit = emit_primitive_identity_mask__avx2; tmp->emit_boxes = emit_boxes_identity_mask__avx2; } else #endif #if defined(sse4_2) if (sna->cpu_features & SSE4_2) { tmp->prim_emit = emit_primitive_identity_mask__sse4_2; tmp->emit_boxes = emit_boxes_identity_mask__sse4_2; } else #endif { tmp->prim_emit = emit_primitive_identity_mask; tmp->emit_boxes = emit_boxes_identity_mask; } tmp->floats_per_vertex = 4; vb = 1 | 2 << 2; } else if (tmp->src.is_linear) { DBG(("%s: linear, identity mask\n", __FUNCTION__)); #if defined(avx2) if (sna->cpu_features & AVX2) { tmp->prim_emit = emit_primitive_linear_identity_mask__avx2; tmp->emit_boxes = emit_boxes_linear_identity_mask__avx2; } else #endif #if defined(sse4_2) if (sna->cpu_features & SSE4_2) { tmp->prim_emit = emit_primitive_linear_identity_mask__sse4_2; tmp->emit_boxes = emit_boxes_linear_identity_mask__sse4_2; } else #endif { tmp->prim_emit = emit_primitive_linear_identity_mask; tmp->emit_boxes = emit_boxes_linear_identity_mask; } tmp->floats_per_vertex = 4; vb = 1 | 2 << 2; } else if (tmp->src.transform == NULL) { DBG(("%s: identity source, identity mask\n", __FUNCTION__)); tmp->prim_emit = emit_primitive_identity_source_mask; tmp->floats_per_vertex = 5; vb = 2 << 2 | 2; } else if (tmp->src.is_affine) { tmp->src.scale[0] /= tmp->src.transform->matrix[2][2]; tmp->src.scale[1] /= tmp->src.transform->matrix[2][2]; if (!sna_affine_transform_is_rotation(tmp->src.transform)) { DBG(("%s: simple src, identity mask\n", __FUNCTION__)); tmp->prim_emit = emit_primitive_simple_source_identity; } else { DBG(("%s: affine src, identity mask\n", __FUNCTION__)); tmp->prim_emit = emit_primitive_affine_source_identity; } tmp->floats_per_vertex = 5; vb = 2 << 2 | 2; } else { DBG(("%s: projective source, identity mask\n", __FUNCTION__)); tmp->prim_emit = emit_primitive_mask; tmp->floats_per_vertex = 6; vb = 2 << 2 | 3; } } else { tmp->prim_emit = emit_primitive_mask; tmp->emit_boxes = emit_boxes_mask; tmp->floats_per_vertex = 1; vb = 0; if (tmp->mask.is_solid) { tmp->floats_per_vertex += 1; vb |= 1 << 2; } else if (tmp->mask.is_affine) { tmp->floats_per_vertex += 2; vb |= 2 << 2; }else { tmp->floats_per_vertex += 3; vb |= 3 << 2; } if (tmp->src.is_solid) { tmp->floats_per_vertex += 1; vb |= 1; } else if (tmp->src.is_affine) { tmp->floats_per_vertex += 2; vb |= 2 ; }else { tmp->floats_per_vertex += 3; vb |= 3; } DBG(("%s: general mask: floats-per-vertex=%d, vb=%x\n", __FUNCTION__,tmp->floats_per_vertex, vb)); } } else { if (tmp->src.is_solid) { DBG(("%s: solid, no mask\n", __FUNCTION__)); tmp->prim_emit = emit_primitive_solid; tmp->emit_boxes = emit_boxes_solid; if (tmp->src.is_opaque && tmp->op == PictOpOver) tmp->op = PictOpSrc; tmp->floats_per_vertex = 2; vb = 1; } else if (tmp->src.is_linear) { DBG(("%s: linear, no mask\n", __FUNCTION__)); #if defined(avx2) if (sna->cpu_features & AVX2) { tmp->prim_emit = emit_primitive_linear__avx2; tmp->emit_boxes = emit_boxes_linear__avx2; } else #endif #if defined(sse4_2) if (sna->cpu_features & SSE4_2) { tmp->prim_emit = emit_primitive_linear__sse4_2; tmp->emit_boxes = emit_boxes_linear__sse4_2; } else #endif { tmp->prim_emit = emit_primitive_linear; tmp->emit_boxes = emit_boxes_linear; } tmp->floats_per_vertex = 2; vb = 1; } else if (tmp->src.transform == NULL) { DBG(("%s: identity src, no mask\n", __FUNCTION__)); #if defined(avx2) if (sna->cpu_features & AVX2) { tmp->prim_emit = emit_primitive_identity_source__avx2; tmp->emit_boxes = emit_boxes_identity_source__avx2; } else #endif #if defined(sse4_2) if (sna->cpu_features & SSE4_2) { tmp->prim_emit = emit_primitive_identity_source__sse4_2; tmp->emit_boxes = emit_boxes_identity_source__sse4_2; } else #endif { tmp->prim_emit = emit_primitive_identity_source; tmp->emit_boxes = emit_boxes_identity_source; } tmp->floats_per_vertex = 3; vb = 2; } else if (tmp->src.is_affine) { tmp->src.scale[0] /= tmp->src.transform->matrix[2][2]; tmp->src.scale[1] /= tmp->src.transform->matrix[2][2]; if (!sna_affine_transform_is_rotation(tmp->src.transform)) { DBG(("%s: simple src, no mask\n", __FUNCTION__)); #if defined(avx2) if (sna->cpu_features & AVX2) { tmp->prim_emit = emit_primitive_simple_source__avx2; tmp->emit_boxes = emit_boxes_simple_source__avx2; } else #endif #if defined(sse4_2) if (sna->cpu_features & SSE4_2) { tmp->prim_emit = emit_primitive_simple_source__sse4_2; tmp->emit_boxes = emit_boxes_simple_source__sse4_2; } else #endif { tmp->prim_emit = emit_primitive_simple_source; tmp->emit_boxes = emit_boxes_simple_source; } } else { DBG(("%s: affine src, no mask\n", __FUNCTION__)); tmp->prim_emit = emit_primitive_affine_source; tmp->emit_boxes = emit_boxes_affine_source; } tmp->floats_per_vertex = 3; vb = 2; } else { DBG(("%s: projective src, no mask\n", __FUNCTION__)); assert(!tmp->src.is_solid); tmp->prim_emit = emit_primitive; tmp->emit_boxes = emit_boxes; tmp->floats_per_vertex = 4; vb = 3; } } tmp->floats_per_rect = 3 * tmp->floats_per_vertex; return vb; } sse2 force_inline static void emit_span_vertex(struct sna *sna, const struct sna_composite_spans_op *op, int16_t x, int16_t y) { OUT_VERTEX(x, y); emit_texcoord(sna, &op->base.src, x, y); } sse2 fastcall static void emit_span_primitive(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { emit_span_vertex(sna, op, box->x2, box->y2); OUT_VERTEX_F(opacity); emit_span_vertex(sna, op, box->x1, box->y2); OUT_VERTEX_F(opacity); emit_span_vertex(sna, op, box->x1, box->y1); OUT_VERTEX_F(opacity); } sse2 fastcall static void emit_span_boxes(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { v = vemit_vertex(v, &op->base, b->box.x2, b->box.y2); *v++ = b->alpha; v = vemit_vertex(v, &op->base, b->box.x1, b->box.y2); *v++ = b->alpha; v = vemit_vertex(v, &op->base, b->box.x1, b->box.y1); *v++ = b->alpha; b++; } while (--nbox); } sse2 fastcall static void emit_span_solid(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v; union { struct sna_coordinate p; float f; } dst; assert(op->base.floats_per_rect == 9); assert((sna->render.vertex_used % 3) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*3; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; dst.p.x = box->x1; v[3] = dst.f; dst.p.y = box->y1; v[6] = dst.f; v[7] = v[4] = v[1] = .5; v[8] = v[5] = v[2] = opacity; } sse2 fastcall static void emit_span_boxes_solid(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; dst.p.x = b->box.x1; v[3] = dst.f; dst.p.y = b->box.y1; v[6] = dst.f; v[7] = v[4] = v[1] = .5; v[8] = v[5] = v[2] = b->alpha; v += 9; b++; } while (--nbox); } sse2 fastcall static void emit_span_identity(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v; union { struct sna_coordinate p; float f; } dst; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; assert(op->base.floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*4; assert(sna->render.vertex_used <= sna->render.vertex_size); dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[1] = (box->x2 + tx) * sx; v[6] = v[2] = (box->y2 + ty) * sy; dst.p.x = box->x1; v[4] = dst.f; v[9] = v[5] = (box->x1 + tx) * sx; dst.p.y = box->y1; v[8] = dst.f; v[10] = (box->y1 + ty) * sy; v[11] = v[7] = v[3] = opacity; } sse2 fastcall static void emit_span_boxes_identity(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; v[1] = (b->box.x2 + tx) * sx; v[6] = v[2] = (b->box.y2 + ty) * sy; dst.p.x = b->box.x1; v[4] = dst.f; v[9] = v[5] = (b->box.x1 + tx) * sx; dst.p.y = b->box.y1; v[8] = dst.f; v[10] = (b->box.y1 + ty) * sy; v[11] = v[7] = v[3] = b->alpha; v += 12; b++; } while (--nbox); } sse2 fastcall static void emit_span_simple(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v; union { struct sna_coordinate p; float f; } dst; float xx = op->base.src.transform->matrix[0][0]; float x0 = op->base.src.transform->matrix[0][2]; float yy = op->base.src.transform->matrix[1][1]; float y0 = op->base.src.transform->matrix[1][2]; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; assert(op->base.floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*4; assert(sna->render.vertex_used <= sna->render.vertex_size); dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[1] = ((box->x2 + tx) * xx + x0) * sx; v[6] = v[2] = ((box->y2 + ty) * yy + y0) * sy; dst.p.x = box->x1; v[4] = dst.f; v[9] = v[5] = ((box->x1 + tx) * xx + x0) * sx; dst.p.y = box->y1; v[8] = dst.f; v[10] = ((box->y1 + ty) * yy + y0) * sy; v[11] = v[7] = v[3] = opacity; } sse2 fastcall static void emit_span_boxes_simple(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { float xx = op->base.src.transform->matrix[0][0]; float x0 = op->base.src.transform->matrix[0][2]; float yy = op->base.src.transform->matrix[1][1]; float y0 = op->base.src.transform->matrix[1][2]; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; v[1] = ((b->box.x2 + tx) * xx + x0) * sx; v[6] = v[2] = ((b->box.y2 + ty) * yy + y0) * sy; dst.p.x = b->box.x1; v[4] = dst.f; v[9] = v[5] = ((b->box.x1 + tx) * xx + x0) * sx; dst.p.y = b->box.y1; v[8] = dst.f; v[10] = ((b->box.y1 + ty) * yy + y0) * sy; v[11] = v[7] = v[3] = b->alpha; v += 12; b++; } while (--nbox); } sse2 fastcall static void emit_span_affine(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { union { struct sna_coordinate p; float f; } dst; float *v; assert(op->base.floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x2, op->base.src.offset[1] + box->y2, op->base.src.transform, op->base.src.scale, &v[1], &v[2]); dst.p.x = box->x1; v[4] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x1, op->base.src.offset[1] + box->y2, op->base.src.transform, op->base.src.scale, &v[5], &v[6]); dst.p.y = box->y1; v[8] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x1, op->base.src.offset[1] + box->y1, op->base.src.transform, op->base.src.scale, &v[9], &v[10]); v[11] = v[7] = v[3] = opacity; } sse2 fastcall static void emit_span_boxes_affine(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x2, op->base.src.offset[1] + b->box.y2, op->base.src.transform, op->base.src.scale, &v[1], &v[2]); dst.p.x = b->box.x1; v[4] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x1, op->base.src.offset[1] + b->box.y2, op->base.src.transform, op->base.src.scale, &v[5], &v[6]); dst.p.y = b->box.y1; v[8] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x1, op->base.src.offset[1] + b->box.y1, op->base.src.transform, op->base.src.scale, &v[9], &v[10]); v[11] = v[7] = v[3] = b->alpha; v += 12; b++; } while (--nbox); } sse2 fastcall static void emit_span_linear(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { union { struct sna_coordinate p; float f; } dst; float *v; assert(op->base.floats_per_rect == 9); assert((sna->render.vertex_used % 3) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; dst.p.x = box->x1; v[3] = dst.f; dst.p.y = box->y1; v[6] = dst.f; v[1] = compute_linear(&op->base.src, box->x2, box->y2); v[4] = compute_linear(&op->base.src, box->x1, box->y2); v[7] = compute_linear(&op->base.src, box->x1, box->y1); v[8] = v[5] = v[2] = opacity; } sse2 fastcall static void emit_span_boxes_linear(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; dst.p.x = b->box.x1; v[3] = dst.f; dst.p.y = b->box.y1; v[6] = dst.f; v[1] = compute_linear(&op->base.src, b->box.x2, b->box.y2); v[4] = compute_linear(&op->base.src, b->box.x1, b->box.y2); v[7] = compute_linear(&op->base.src, b->box.x1, b->box.y1); v[8] = v[5] = v[2] = b->alpha; v += 9; b++; } while (--nbox); } /* SSE4_2 */ #if defined(sse4_2) sse4_2 fastcall static void emit_span_identity__sse4_2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v; union { struct sna_coordinate p; float f; } dst; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; assert(op->base.floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*4; assert(sna->render.vertex_used <= sna->render.vertex_size); dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[1] = (box->x2 + tx) * sx; v[6] = v[2] = (box->y2 + ty) * sy; dst.p.x = box->x1; v[4] = dst.f; v[9] = v[5] = (box->x1 + tx) * sx; dst.p.y = box->y1; v[8] = dst.f; v[10] = (box->y1 + ty) * sy; v[11] = v[7] = v[3] = opacity; } sse4_2 fastcall static void emit_span_boxes_identity__sse4_2(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; v[1] = (b->box.x2 + tx) * sx; v[6] = v[2] = (b->box.y2 + ty) * sy; dst.p.x = b->box.x1; v[4] = dst.f; v[9] = v[5] = (b->box.x1 + tx) * sx; dst.p.y = b->box.y1; v[8] = dst.f; v[10] = (b->box.y1 + ty) * sy; v[11] = v[7] = v[3] = b->alpha; v += 12; b++; } while (--nbox); } sse4_2 fastcall static void emit_span_simple__sse4_2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v; union { struct sna_coordinate p; float f; } dst; float xx = op->base.src.transform->matrix[0][0]; float x0 = op->base.src.transform->matrix[0][2]; float yy = op->base.src.transform->matrix[1][1]; float y0 = op->base.src.transform->matrix[1][2]; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; assert(op->base.floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*4; assert(sna->render.vertex_used <= sna->render.vertex_size); dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[1] = ((box->x2 + tx) * xx + x0) * sx; v[6] = v[2] = ((box->y2 + ty) * yy + y0) * sy; dst.p.x = box->x1; v[4] = dst.f; v[9] = v[5] = ((box->x1 + tx) * xx + x0) * sx; dst.p.y = box->y1; v[8] = dst.f; v[10] = ((box->y1 + ty) * yy + y0) * sy; v[11] = v[7] = v[3] = opacity; } sse4_2 fastcall static void emit_span_boxes_simple__sse4_2(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { float xx = op->base.src.transform->matrix[0][0]; float x0 = op->base.src.transform->matrix[0][2]; float yy = op->base.src.transform->matrix[1][1]; float y0 = op->base.src.transform->matrix[1][2]; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; v[1] = ((b->box.x2 + tx) * xx + x0) * sx; v[6] = v[2] = ((b->box.y2 + ty) * yy + y0) * sy; dst.p.x = b->box.x1; v[4] = dst.f; v[9] = v[5] = ((b->box.x1 + tx) * xx + x0) * sx; dst.p.y = b->box.y1; v[8] = dst.f; v[10] = ((b->box.y1 + ty) * yy + y0) * sy; v[11] = v[7] = v[3] = b->alpha; v += 12; b++; } while (--nbox); } sse4_2 fastcall static void emit_span_affine__sse4_2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { union { struct sna_coordinate p; float f; } dst; float *v; assert(op->base.floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x2, op->base.src.offset[1] + box->y2, op->base.src.transform, op->base.src.scale, &v[1], &v[2]); dst.p.x = box->x1; v[4] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x1, op->base.src.offset[1] + box->y2, op->base.src.transform, op->base.src.scale, &v[5], &v[6]); dst.p.y = box->y1; v[8] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x1, op->base.src.offset[1] + box->y1, op->base.src.transform, op->base.src.scale, &v[9], &v[10]); v[11] = v[7] = v[3] = opacity; } sse4_2 fastcall static void emit_span_boxes_affine__sse4_2(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x2, op->base.src.offset[1] + b->box.y2, op->base.src.transform, op->base.src.scale, &v[1], &v[2]); dst.p.x = b->box.x1; v[4] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x1, op->base.src.offset[1] + b->box.y2, op->base.src.transform, op->base.src.scale, &v[5], &v[6]); dst.p.y = b->box.y1; v[8] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x1, op->base.src.offset[1] + b->box.y1, op->base.src.transform, op->base.src.scale, &v[9], &v[10]); v[11] = v[7] = v[3] = b->alpha; v += 12; b++; } while (--nbox); } sse4_2 fastcall static void emit_span_linear__sse4_2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { union { struct sna_coordinate p; float f; } dst; float *v; assert(op->base.floats_per_rect == 9); assert((sna->render.vertex_used % 3) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; dst.p.x = box->x1; v[3] = dst.f; dst.p.y = box->y1; v[6] = dst.f; v[1] = compute_linear(&op->base.src, box->x2, box->y2); v[4] = compute_linear(&op->base.src, box->x1, box->y2); v[7] = compute_linear(&op->base.src, box->x1, box->y1); v[8] = v[5] = v[2] = opacity; } sse4_2 fastcall static void emit_span_boxes_linear__sse4_2(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; dst.p.x = b->box.x1; v[3] = dst.f; dst.p.y = b->box.y1; v[6] = dst.f; v[1] = compute_linear(&op->base.src, b->box.x2, b->box.y2); v[4] = compute_linear(&op->base.src, b->box.x1, b->box.y2); v[7] = compute_linear(&op->base.src, b->box.x1, b->box.y1); v[8] = v[5] = v[2] = b->alpha; v += 9; b++; } while (--nbox); } #endif /* AVX2 */ #if defined(avx2) avx2 fastcall static void emit_span_identity__avx2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v; union { struct sna_coordinate p; float f; } dst; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; assert(op->base.floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*4; assert(sna->render.vertex_used <= sna->render.vertex_size); dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[1] = (box->x2 + tx) * sx; v[6] = v[2] = (box->y2 + ty) * sy; dst.p.x = box->x1; v[4] = dst.f; v[9] = v[5] = (box->x1 + tx) * sx; dst.p.y = box->y1; v[8] = dst.f; v[10] = (box->y1 + ty) * sy; v[11] = v[7] = v[3] = opacity; } avx2 fastcall static void emit_span_boxes_identity__avx2(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; v[1] = (b->box.x2 + tx) * sx; v[6] = v[2] = (b->box.y2 + ty) * sy; dst.p.x = b->box.x1; v[4] = dst.f; v[9] = v[5] = (b->box.x1 + tx) * sx; dst.p.y = b->box.y1; v[8] = dst.f; v[10] = (b->box.y1 + ty) * sy; v[11] = v[7] = v[3] = b->alpha; v += 12; b++; } while (--nbox); } avx2 fastcall static void emit_span_simple__avx2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { float *v; union { struct sna_coordinate p; float f; } dst; float xx = op->base.src.transform->matrix[0][0]; float x0 = op->base.src.transform->matrix[0][2]; float yy = op->base.src.transform->matrix[1][1]; float y0 = op->base.src.transform->matrix[1][2]; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; assert(op->base.floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 3*4; assert(sna->render.vertex_used <= sna->render.vertex_size); dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; v[1] = ((box->x2 + tx) * xx + x0) * sx; v[6] = v[2] = ((box->y2 + ty) * yy + y0) * sy; dst.p.x = box->x1; v[4] = dst.f; v[9] = v[5] = ((box->x1 + tx) * xx + x0) * sx; dst.p.y = box->y1; v[8] = dst.f; v[10] = ((box->y1 + ty) * yy + y0) * sy; v[11] = v[7] = v[3] = opacity; } avx2 fastcall static void emit_span_boxes_simple__avx2(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { float xx = op->base.src.transform->matrix[0][0]; float x0 = op->base.src.transform->matrix[0][2]; float yy = op->base.src.transform->matrix[1][1]; float y0 = op->base.src.transform->matrix[1][2]; float sx = op->base.src.scale[0]; float sy = op->base.src.scale[1]; int16_t tx = op->base.src.offset[0]; int16_t ty = op->base.src.offset[1]; do { union { struct sna_coordinate p; float f; } dst; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; v[1] = ((b->box.x2 + tx) * xx + x0) * sx; v[6] = v[2] = ((b->box.y2 + ty) * yy + y0) * sy; dst.p.x = b->box.x1; v[4] = dst.f; v[9] = v[5] = ((b->box.x1 + tx) * xx + x0) * sx; dst.p.y = b->box.y1; v[8] = dst.f; v[10] = ((b->box.y1 + ty) * yy + y0) * sy; v[11] = v[7] = v[3] = b->alpha; v += 12; b++; } while (--nbox); } avx2 fastcall static void emit_span_affine__avx2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { union { struct sna_coordinate p; float f; } dst; float *v; assert(op->base.floats_per_rect == 12); assert((sna->render.vertex_used % 4) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 12; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x2, op->base.src.offset[1] + box->y2, op->base.src.transform, op->base.src.scale, &v[1], &v[2]); dst.p.x = box->x1; v[4] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x1, op->base.src.offset[1] + box->y2, op->base.src.transform, op->base.src.scale, &v[5], &v[6]); dst.p.y = box->y1; v[8] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + box->x1, op->base.src.offset[1] + box->y1, op->base.src.transform, op->base.src.scale, &v[9], &v[10]); v[11] = v[7] = v[3] = opacity; } avx2 fastcall static void emit_span_boxes_affine__avx2(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x2, op->base.src.offset[1] + b->box.y2, op->base.src.transform, op->base.src.scale, &v[1], &v[2]); dst.p.x = b->box.x1; v[4] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x1, op->base.src.offset[1] + b->box.y2, op->base.src.transform, op->base.src.scale, &v[5], &v[6]); dst.p.y = b->box.y1; v[8] = dst.f; _sna_get_transformed_scaled(op->base.src.offset[0] + b->box.x1, op->base.src.offset[1] + b->box.y1, op->base.src.transform, op->base.src.scale, &v[9], &v[10]); v[11] = v[7] = v[3] = b->alpha; v += 12; b++; } while (--nbox); } avx2 fastcall static void emit_span_linear__avx2(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { union { struct sna_coordinate p; float f; } dst; float *v; assert(op->base.floats_per_rect == 9); assert((sna->render.vertex_used % 3) == 0); v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += 9; dst.p.x = box->x2; dst.p.y = box->y2; v[0] = dst.f; dst.p.x = box->x1; v[3] = dst.f; dst.p.y = box->y1; v[6] = dst.f; v[1] = compute_linear(&op->base.src, box->x2, box->y2); v[4] = compute_linear(&op->base.src, box->x1, box->y2); v[7] = compute_linear(&op->base.src, box->x1, box->y1); v[8] = v[5] = v[2] = opacity; } avx2 fastcall static void emit_span_boxes_linear__avx2(const struct sna_composite_spans_op *op, const struct sna_opacity_box *b, int nbox, float *v) { do { union { struct sna_coordinate p; float f; } dst; dst.p.x = b->box.x2; dst.p.y = b->box.y2; v[0] = dst.f; dst.p.x = b->box.x1; v[3] = dst.f; dst.p.y = b->box.y1; v[6] = dst.f; v[1] = compute_linear(&op->base.src, b->box.x2, b->box.y2); v[4] = compute_linear(&op->base.src, b->box.x1, b->box.y2); v[7] = compute_linear(&op->base.src, b->box.x1, b->box.y1); v[8] = v[5] = v[2] = b->alpha; v += 9; b++; } while (--nbox); } #endif unsigned gen4_choose_spans_emitter(struct sna *sna, struct sna_composite_spans_op *tmp) { unsigned vb; if (tmp->base.src.is_solid) { DBG(("%s: solid source\n", __FUNCTION__)); tmp->prim_emit = emit_span_solid; tmp->emit_boxes = emit_span_boxes_solid; tmp->base.floats_per_vertex = 3; vb = 1 << 2 | 1; } else if (tmp->base.src.is_linear) { DBG(("%s: linear source\n", __FUNCTION__)); #if defined(avx2) if (sna->cpu_features & AVX2) { tmp->prim_emit = emit_span_linear__avx2; tmp->emit_boxes = emit_span_boxes_linear__avx2; } else #endif #if defined(sse4_2) if (sna->cpu_features & SSE4_2) { tmp->prim_emit = emit_span_linear__sse4_2; tmp->emit_boxes = emit_span_boxes_linear__sse4_2; } else #endif { tmp->prim_emit = emit_span_linear; tmp->emit_boxes = emit_span_boxes_linear; } tmp->base.floats_per_vertex = 3; vb = 1 << 2 | 1; } else if (tmp->base.src.transform == NULL) { DBG(("%s: identity transform\n", __FUNCTION__)); #if defined(avx2) if (sna->cpu_features & AVX2) { tmp->prim_emit = emit_span_identity__avx2; tmp->emit_boxes = emit_span_boxes_identity__avx2; } else #endif #if defined(sse4_2) if (sna->cpu_features & SSE4_2) { tmp->prim_emit = emit_span_identity__sse4_2; tmp->emit_boxes = emit_span_boxes_identity__sse4_2; } else #endif { tmp->prim_emit = emit_span_identity; tmp->emit_boxes = emit_span_boxes_identity; } tmp->base.floats_per_vertex = 4; vb = 1 << 2 | 2; } else if (tmp->base.is_affine) { tmp->base.src.scale[0] /= tmp->base.src.transform->matrix[2][2]; tmp->base.src.scale[1] /= tmp->base.src.transform->matrix[2][2]; if (!sna_affine_transform_is_rotation(tmp->base.src.transform)) { DBG(("%s: simple (unrotated affine) transform\n", __FUNCTION__)); #if defined(avx2) if (sna->cpu_features & AVX2) { tmp->prim_emit = emit_span_simple__avx2; tmp->emit_boxes = emit_span_boxes_simple__avx2; } else #endif #if defined(sse4_2) if (sna->cpu_features & SSE4_2) { tmp->prim_emit = emit_span_simple__sse4_2; tmp->emit_boxes = emit_span_boxes_simple__sse4_2; } else #endif { tmp->prim_emit = emit_span_simple; tmp->emit_boxes = emit_span_boxes_simple; } } else { DBG(("%s: affine transform\n", __FUNCTION__)); #if defined(avx2) if (sna->cpu_features & AVX2) { tmp->prim_emit = emit_span_affine__avx2; tmp->emit_boxes = emit_span_boxes_affine__avx2; } else #endif #if defined(sse4_2) if (sna->cpu_features & SSE4_2) { tmp->prim_emit = emit_span_affine__sse4_2; tmp->emit_boxes = emit_span_boxes_affine__sse4_2; } else #endif { tmp->prim_emit = emit_span_affine; tmp->emit_boxes = emit_span_boxes_affine; } } tmp->base.floats_per_vertex = 4; vb = 1 << 2 | 2; } else { DBG(("%s: projective transform\n", __FUNCTION__)); tmp->prim_emit = emit_span_primitive; tmp->emit_boxes = emit_span_boxes; tmp->base.floats_per_vertex = 5; vb = 1 << 2 | 3; } tmp->base.floats_per_rect = 3 * tmp->base.floats_per_vertex; return vb; } xf86-video-intel-2.99.917/src/sna/gen5_render.h0000664000175000017500000024335312244635610015662 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef GEN5_RENDER_H #define GEN5_RENDER_H #define GEN5_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define GEN5_URB_FENCE GEN5_3D(0, 0, 0) #define GEN5_CS_URB_STATE GEN5_3D(0, 0, 1) #define GEN5_CONSTANT_BUFFER GEN5_3D(0, 0, 2) #define GEN5_STATE_PREFETCH GEN5_3D(0, 0, 3) #define GEN5_STATE_BASE_ADDRESS GEN5_3D(0, 1, 1) #define GEN5_STATE_SIP GEN5_3D(0, 1, 2) #define GEN5_PIPELINE_SELECT GEN5_3D(1, 1, 4) #define GEN5_MEDIA_STATE_POINTERS GEN5_3D(2, 0, 0) #define GEN5_MEDIA_OBJECT GEN5_3D(2, 1, 0) #define GEN5_3DSTATE_PIPELINED_POINTERS GEN5_3D(3, 0, 0) #define GEN5_3DSTATE_BINDING_TABLE_POINTERS GEN5_3D(3, 0, 1) # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN6 */ #define GEN5_3DSTATE_VERTEX_BUFFERS GEN5_3D(3, 0, 8) #define GEN5_3DSTATE_VERTEX_ELEMENTS GEN5_3D(3, 0, 9) #define GEN5_3DSTATE_INDEX_BUFFER GEN5_3D(3, 0, 0xa) #define GEN5_3DSTATE_VF_STATISTICS GEN5_3D(3, 0, 0xb) #define GEN5_3DSTATE_DRAWING_RECTANGLE GEN5_3D(3, 1, 0) #define GEN5_3DSTATE_CONSTANT_COLOR GEN5_3D(3, 1, 1) #define GEN5_3DSTATE_SAMPLER_PALETTE_LOAD GEN5_3D(3, 1, 2) #define GEN5_3DSTATE_CHROMA_KEY GEN5_3D(3, 1, 4) #define GEN5_3DSTATE_DEPTH_BUFFER GEN5_3D(3, 1, 5) # define GEN5_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 # define GEN5_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 #define GEN5_3DSTATE_POLY_STIPPLE_OFFSET GEN5_3D(3, 1, 6) #define GEN5_3DSTATE_POLY_STIPPLE_PATTERN GEN5_3D(3, 1, 7) #define GEN5_3DSTATE_LINE_STIPPLE GEN5_3D(3, 1, 8) #define GEN5_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN5_3D(3, 1, 9) /* These two are BLC and CTG only, not BW or CL */ #define GEN5_3DSTATE_AA_LINE_PARAMS GEN5_3D(3, 1, 0xa) #define GEN5_3DSTATE_GS_SVB_INDEX GEN5_3D(3, 1, 0xb) #define GEN5_PIPE_CONTROL GEN5_3D(3, 2, 0) #define GEN5_3DPRIMITIVE GEN5_3D(3, 3, 0) #define GEN5_3DSTATE_CLEAR_PARAMS GEN5_3D(3, 1, 0x10) /* DW1 */ # define GEN5_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) /* for GEN6+ */ #define GEN6_3DSTATE_SAMPLER_STATE_POINTERS GEN5_3D(3, 0, 0x02) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) #define GEN6_3DSTATE_URB GEN5_3D(3, 0, 0x05) /* DW1 */ # define GEN6_3DSTATE_URB_VS_SIZE_SHIFT 16 # define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT 0 /* DW2 */ # define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT 8 # define GEN6_3DSTATE_URB_GS_SIZE_SHIFT 0 #define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS GEN5_3D(3, 0, 0x0d) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) #define GEN6_3DSTATE_CC_STATE_POINTERS GEN5_3D(3, 0, 0x0e) #define GEN6_3DSTATE_VS GEN5_3D(3, 0, 0x10) #define GEN6_3DSTATE_GS GEN5_3D(3, 0, 0x11) /* DW4 */ # define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 #define GEN6_3DSTATE_CLIP GEN5_3D(3, 0, 0x12) #define GEN6_3DSTATE_SF GEN5_3D(3, 0, 0x13) /* DW1 */ # define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW2 */ /* DW3 */ # define GEN6_3DSTATE_SF_CULL_BOTH (0 << 29) # define GEN6_3DSTATE_SF_CULL_NONE (1 << 29) # define GEN6_3DSTATE_SF_CULL_FRONT (2 << 29) # define GEN6_3DSTATE_SF_CULL_BACK (3 << 29) /* DW4 */ # define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 # define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 # define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 #define GEN6_3DSTATE_WM GEN5_3D(3, 0, 0x14) /* DW2 */ # define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF 27 # define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 /* DW4 */ # define GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT 16 /* DW5 */ # define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT 25 # define GEN6_3DSTATE_WM_DISPATCH_ENABLE (1 << 19) # define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1) # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) /* DW6 */ # define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20 # define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) # define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) # define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) # define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) #define GEN6_3DSTATE_CONSTANT_VS GEN5_3D(3, 0, 0x15) #define GEN6_3DSTATE_CONSTANT_GS GEN5_3D(3, 0, 0x16) #define GEN6_3DSTATE_CONSTANT_PS GEN5_3D(3, 0, 0x17) #define GEN6_3DSTATE_SAMPLE_MASK GEN5_3D(3, 0, 0x18) #define GEN6_3DSTATE_MULTISAMPLE GEN5_3D(3, 1, 0x0d) /* DW1 */ # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) #define PIPELINE_SELECT_3D 0 #define PIPELINE_SELECT_MEDIA 1 #define UF0_CS_REALLOC (1 << 13) #define UF0_VFE_REALLOC (1 << 12) #define UF0_SF_REALLOC (1 << 11) #define UF0_CLIP_REALLOC (1 << 10) #define UF0_GS_REALLOC (1 << 9) #define UF0_VS_REALLOC (1 << 8) #define UF1_CLIP_FENCE_SHIFT 20 #define UF1_GS_FENCE_SHIFT 10 #define UF1_VS_FENCE_SHIFT 0 #define UF2_CS_FENCE_SHIFT 20 #define UF2_VFE_FENCE_SHIFT 10 #define UF2_SF_FENCE_SHIFT 0 /* for GEN5_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) /* for GEN5_3DSTATE_PIPELINED_POINTERS */ #define GEN5_GS_DISABLE 0 #define GEN5_GS_ENABLE 1 #define GEN5_CLIP_DISABLE 0 #define GEN5_CLIP_ENABLE 1 /* for GEN5_PIPE_CONTROL */ #define GEN5_PIPE_CONTROL_NOWRITE (0 << 14) #define GEN5_PIPE_CONTROL_WRITE_QWORD (1 << 14) #define GEN5_PIPE_CONTROL_WRITE_DEPTH (2 << 14) #define GEN5_PIPE_CONTROL_WRITE_TIME (3 << 14) #define GEN5_PIPE_CONTROL_DEPTH_STALL (1 << 13) #define GEN5_PIPE_CONTROL_WC_FLUSH (1 << 12) #define GEN5_PIPE_CONTROL_IS_FLUSH (1 << 11) #define GEN5_PIPE_CONTROL_TC_FLUSH (1 << 10) #define GEN5_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) #define GEN5_PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define GEN5_PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define GEN5_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) /* VERTEX_BUFFER_STATE Structure */ #define VB0_BUFFER_INDEX_SHIFT 27 #define GEN6_VB0_BUFFER_INDEX_SHIFT 26 #define VB0_VERTEXDATA (0 << 26) #define VB0_INSTANCEDATA (1 << 26) #define GEN6_VB0_VERTEXDATA (0 << 20) #define GEN6_VB0_INSTANCEDATA (1 << 20) #define VB0_BUFFER_PITCH_SHIFT 0 /* VERTEX_ELEMENT_STATE Structure */ #define VE0_VERTEX_BUFFER_INDEX_SHIFT 27 #define GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT 26 /* for GEN6 */ #define VE0_VALID (1 << 26) #define GEN6_VE0_VALID (1 << 25) /* for GEN6 */ #define VE0_FORMAT_SHIFT 16 #define VE0_OFFSET_SHIFT 0 #define VE1_VFCOMPONENT_0_SHIFT 28 #define VE1_VFCOMPONENT_1_SHIFT 24 #define VE1_VFCOMPONENT_2_SHIFT 20 #define VE1_VFCOMPONENT_3_SHIFT 16 #define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 /* 3DPRIMITIVE bits */ #define GEN5_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) #define GEN5_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) /* Primitive types are in gen5_defines.h */ #define GEN5_3DPRIMITIVE_TOPOLOGY_SHIFT 10 #define GEN5_SVG_CTL 0x7400 #define GEN5_SVG_CTL_GS_BA (0 << 8) #define GEN5_SVG_CTL_SS_BA (1 << 8) #define GEN5_SVG_CTL_IO_BA (2 << 8) #define GEN5_SVG_CTL_GS_AUB (3 << 8) #define GEN5_SVG_CTL_IO_AUB (4 << 8) #define GEN5_SVG_CTL_SIP (5 << 8) #define GEN5_SVG_RDATA 0x7404 #define GEN5_SVG_WORK_CTL 0x7408 #define GEN5_VF_CTL 0x7500 #define GEN5_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN5_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) #define GEN5_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) #define GEN5_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) #define GEN5_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) #define GEN5_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) #define GEN5_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) #define GEN5_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) #define GEN5_VF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN5_VF_STRG_VAL 0x7504 #define GEN5_VF_STR_VL_OVR 0x7508 #define GEN5_VF_VC_OVR 0x750c #define GEN5_VF_STR_PSKIP 0x7510 #define GEN5_VF_MAX_PRIM 0x7514 #define GEN5_VF_RDATA 0x7518 #define GEN5_VS_CTL 0x7600 #define GEN5_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN5_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) #define GEN5_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) #define GEN5_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) #define GEN5_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) #define GEN5_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN5_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN5_VS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN5_VS_STRG_VAL 0x7604 #define GEN5_VS_RDATA 0x7608 #define GEN5_SF_CTL 0x7b00 #define GEN5_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN5_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) #define GEN5_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) #define GEN5_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) #define GEN5_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) #define GEN5_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) #define GEN5_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) #define GEN5_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) #define GEN5_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) #define GEN5_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) #define GEN5_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) #define GEN5_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN5_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN5_SF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN5_SF_STRG_VAL 0x7b04 #define GEN5_SF_RDATA 0x7b18 #define GEN5_WIZ_CTL 0x7c00 #define GEN5_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN5_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 #define GEN5_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) #define GEN5_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) #define GEN5_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) #define GEN5_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) #define GEN5_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) #define GEN5_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) #define GEN5_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) #define GEN5_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN5_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN5_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN5_WIZ_STRG_VAL 0x7c04 #define GEN5_WIZ_RDATA 0x7c18 #define GEN5_TS_CTL 0x7e00 #define GEN5_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN5_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) #define GEN5_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) #define GEN5_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) #define GEN5_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) #define GEN5_TS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN5_TS_STRG_VAL 0x7e04 #define GEN5_TS_RDATA 0x7e08 #define GEN5_TD_CTL 0x8000 #define GEN5_TD_CTL_MUX_SHIFT 8 #define GEN5_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define GEN5_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) #define GEN5_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) #define GEN5_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) #define GEN5_TD_CTL_BREAKPOINT_ENABLE (1 << 2) #define GEN5_TD_CTL2 0x8004 #define GEN5_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) #define GEN5_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) #define GEN5_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) #define GEN5_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 #define GEN5_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) #define GEN5_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) #define GEN5_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) #define GEN5_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) #define GEN5_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) #define GEN5_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) #define GEN5_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) #define GEN5_TD_VF_VS_EMSK 0x8008 #define GEN5_TD_GS_EMSK 0x800c #define GEN5_TD_CLIP_EMSK 0x8010 #define GEN5_TD_SF_EMSK 0x8014 #define GEN5_TD_WIZ_EMSK 0x8018 #define GEN5_TD_0_6_EHTRG_VAL 0x801c #define GEN5_TD_0_7_EHTRG_VAL 0x8020 #define GEN5_TD_0_6_EHTRG_MSK 0x8024 #define GEN5_TD_0_7_EHTRG_MSK 0x8028 #define GEN5_TD_RDATA 0x802c #define GEN5_TD_TS_EMSK 0x8030 #define GEN5_EU_CTL 0x8800 #define GEN5_EU_CTL_SELECT_SHIFT 16 #define GEN5_EU_CTL_DATA_MUX_SHIFT 8 #define GEN5_EU_ATT_0 0x8810 #define GEN5_EU_ATT_1 0x8814 #define GEN5_EU_ATT_DATA_0 0x8820 #define GEN5_EU_ATT_DATA_1 0x8824 #define GEN5_EU_ATT_CLR_0 0x8830 #define GEN5_EU_ATT_CLR_1 0x8834 #define GEN5_EU_RDATA 0x8840 /* 3D state: */ #define _3DOP_3DSTATE_PIPELINED 0x0 #define _3DOP_3DSTATE_NONPIPELINED 0x1 #define _3DOP_3DCONTROL 0x2 #define _3DOP_3DPRIMITIVE 0x3 #define _3DSTATE_PIPELINED_POINTERS 0x00 #define _3DSTATE_BINDING_TABLE_POINTERS 0x01 #define _3DSTATE_VERTEX_BUFFERS 0x08 #define _3DSTATE_VERTEX_ELEMENTS 0x09 #define _3DSTATE_INDEX_BUFFER 0x0A #define _3DSTATE_VF_STATISTICS 0x0B #define _3DSTATE_DRAWING_RECTANGLE 0x00 #define _3DSTATE_CONSTANT_COLOR 0x01 #define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02 #define _3DSTATE_CHROMA_KEY 0x04 #define _3DSTATE_DEPTH_BUFFER 0x05 #define _3DSTATE_POLY_STIPPLE_OFFSET 0x06 #define _3DSTATE_POLY_STIPPLE_PATTERN 0x07 #define _3DSTATE_LINE_STIPPLE 0x08 #define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09 #define _3DCONTROL 0x00 #define _3DPRIMITIVE 0x00 #define _3DPRIM_POINTLIST 0x01 #define _3DPRIM_LINELIST 0x02 #define _3DPRIM_LINESTRIP 0x03 #define _3DPRIM_TRILIST 0x04 #define _3DPRIM_TRISTRIP 0x05 #define _3DPRIM_TRIFAN 0x06 #define _3DPRIM_QUADLIST 0x07 #define _3DPRIM_QUADSTRIP 0x08 #define _3DPRIM_LINELIST_ADJ 0x09 #define _3DPRIM_LINESTRIP_ADJ 0x0A #define _3DPRIM_TRILIST_ADJ 0x0B #define _3DPRIM_TRISTRIP_ADJ 0x0C #define _3DPRIM_TRISTRIP_REVERSE 0x0D #define _3DPRIM_POLYGON 0x0E #define _3DPRIM_RECTLIST 0x0F #define _3DPRIM_LINELOOP 0x10 #define _3DPRIM_POINTLIST_BF 0x11 #define _3DPRIM_LINESTRIP_CONT 0x12 #define _3DPRIM_LINESTRIP_BF 0x13 #define _3DPRIM_LINESTRIP_CONT_BF 0x14 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 #define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 #define GEN5_ANISORATIO_2 0 #define GEN5_ANISORATIO_4 1 #define GEN5_ANISORATIO_6 2 #define GEN5_ANISORATIO_8 3 #define GEN5_ANISORATIO_10 4 #define GEN5_ANISORATIO_12 5 #define GEN5_ANISORATIO_14 6 #define GEN5_ANISORATIO_16 7 #define GEN5_BLENDFACTOR_ONE 0x1 #define GEN5_BLENDFACTOR_SRC_COLOR 0x2 #define GEN5_BLENDFACTOR_SRC_ALPHA 0x3 #define GEN5_BLENDFACTOR_DST_ALPHA 0x4 #define GEN5_BLENDFACTOR_DST_COLOR 0x5 #define GEN5_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 #define GEN5_BLENDFACTOR_CONST_COLOR 0x7 #define GEN5_BLENDFACTOR_CONST_ALPHA 0x8 #define GEN5_BLENDFACTOR_SRC1_COLOR 0x9 #define GEN5_BLENDFACTOR_SRC1_ALPHA 0x0A #define GEN5_BLENDFACTOR_ZERO 0x11 #define GEN5_BLENDFACTOR_INV_SRC_COLOR 0x12 #define GEN5_BLENDFACTOR_INV_SRC_ALPHA 0x13 #define GEN5_BLENDFACTOR_INV_DST_ALPHA 0x14 #define GEN5_BLENDFACTOR_INV_DST_COLOR 0x15 #define GEN5_BLENDFACTOR_INV_CONST_COLOR 0x17 #define GEN5_BLENDFACTOR_INV_CONST_ALPHA 0x18 #define GEN5_BLENDFACTOR_INV_SRC1_COLOR 0x19 #define GEN5_BLENDFACTOR_INV_SRC1_ALPHA 0x1A #define GEN5_BLENDFUNCTION_ADD 0 #define GEN5_BLENDFUNCTION_SUBTRACT 1 #define GEN5_BLENDFUNCTION_REVERSE_SUBTRACT 2 #define GEN5_BLENDFUNCTION_MIN 3 #define GEN5_BLENDFUNCTION_MAX 4 #define GEN5_ALPHATEST_FORMAT_UNORM8 0 #define GEN5_ALPHATEST_FORMAT_FLOAT32 1 #define GEN5_CHROMAKEY_KILL_ON_ANY_MATCH 0 #define GEN5_CHROMAKEY_REPLACE_BLACK 1 #define GEN5_CLIP_API_OGL 0 #define GEN5_CLIP_API_DX 1 #define GEN5_CLIPMODE_NORMAL 0 #define GEN5_CLIPMODE_CLIP_ALL 1 #define GEN5_CLIPMODE_CLIP_NON_REJECTED 2 #define GEN5_CLIPMODE_REJECT_ALL 3 #define GEN5_CLIPMODE_ACCEPT_ALL 4 #define GEN5_CLIP_NDCSPACE 0 #define GEN5_CLIP_SCREENSPACE 1 #define GEN5_COMPAREFUNCTION_ALWAYS 0 #define GEN5_COMPAREFUNCTION_NEVER 1 #define GEN5_COMPAREFUNCTION_LESS 2 #define GEN5_COMPAREFUNCTION_EQUAL 3 #define GEN5_COMPAREFUNCTION_LEQUAL 4 #define GEN5_COMPAREFUNCTION_GREATER 5 #define GEN5_COMPAREFUNCTION_NOTEQUAL 6 #define GEN5_COMPAREFUNCTION_GEQUAL 7 #define GEN5_COVERAGE_PIXELS_HALF 0 #define GEN5_COVERAGE_PIXELS_1 1 #define GEN5_COVERAGE_PIXELS_2 2 #define GEN5_COVERAGE_PIXELS_4 3 #define GEN5_CULLMODE_BOTH 0 #define GEN5_CULLMODE_NONE 1 #define GEN5_CULLMODE_FRONT 2 #define GEN5_CULLMODE_BACK 3 #define GEN5_DEFAULTCOLOR_R8G8B8A8_UNORM 0 #define GEN5_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 #define GEN5_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 #define GEN5_DEPTHFORMAT_D32_FLOAT 1 #define GEN5_DEPTHFORMAT_D24_UNORM_S8_UINT 2 #define GEN5_DEPTHFORMAT_D16_UNORM 5 #define GEN5_FLOATING_POINT_IEEE_754 0 #define GEN5_FLOATING_POINT_NON_IEEE_754 1 #define GEN5_FRONTWINDING_CW 0 #define GEN5_FRONTWINDING_CCW 1 #define GEN5_INDEX_BYTE 0 #define GEN5_INDEX_WORD 1 #define GEN5_INDEX_DWORD 2 #define GEN5_LOGICOPFUNCTION_CLEAR 0 #define GEN5_LOGICOPFUNCTION_NOR 1 #define GEN5_LOGICOPFUNCTION_AND_INVERTED 2 #define GEN5_LOGICOPFUNCTION_COPY_INVERTED 3 #define GEN5_LOGICOPFUNCTION_AND_REVERSE 4 #define GEN5_LOGICOPFUNCTION_INVERT 5 #define GEN5_LOGICOPFUNCTION_XOR 6 #define GEN5_LOGICOPFUNCTION_NAND 7 #define GEN5_LOGICOPFUNCTION_AND 8 #define GEN5_LOGICOPFUNCTION_EQUIV 9 #define GEN5_LOGICOPFUNCTION_NOOP 10 #define GEN5_LOGICOPFUNCTION_OR_INVERTED 11 #define GEN5_LOGICOPFUNCTION_COPY 12 #define GEN5_LOGICOPFUNCTION_OR_REVERSE 13 #define GEN5_LOGICOPFUNCTION_OR 14 #define GEN5_LOGICOPFUNCTION_SET 15 #define GEN5_MAPFILTER_NEAREST 0x0 #define GEN5_MAPFILTER_LINEAR 0x1 #define GEN5_MAPFILTER_ANISOTROPIC 0x2 #define GEN5_MIPFILTER_NONE 0 #define GEN5_MIPFILTER_NEAREST 1 #define GEN5_MIPFILTER_LINEAR 3 #define GEN5_POLYGON_FRONT_FACING 0 #define GEN5_POLYGON_BACK_FACING 1 #define GEN5_PREFILTER_ALWAYS 0x0 #define GEN5_PREFILTER_NEVER 0x1 #define GEN5_PREFILTER_LESS 0x2 #define GEN5_PREFILTER_EQUAL 0x3 #define GEN5_PREFILTER_LEQUAL 0x4 #define GEN5_PREFILTER_GREATER 0x5 #define GEN5_PREFILTER_NOTEQUAL 0x6 #define GEN5_PREFILTER_GEQUAL 0x7 #define GEN5_PROVOKING_VERTEX_0 0 #define GEN5_PROVOKING_VERTEX_1 1 #define GEN5_PROVOKING_VERTEX_2 2 #define GEN5_RASTRULE_UPPER_LEFT 0 #define GEN5_RASTRULE_UPPER_RIGHT 1 #define GEN5_RENDERTARGET_CLAMPRANGE_UNORM 0 #define GEN5_RENDERTARGET_CLAMPRANGE_SNORM 1 #define GEN5_RENDERTARGET_CLAMPRANGE_FORMAT 2 #define GEN5_STENCILOP_KEEP 0 #define GEN5_STENCILOP_ZERO 1 #define GEN5_STENCILOP_REPLACE 2 #define GEN5_STENCILOP_INCRSAT 3 #define GEN5_STENCILOP_DECRSAT 4 #define GEN5_STENCILOP_INCR 5 #define GEN5_STENCILOP_DECR 6 #define GEN5_STENCILOP_INVERT 7 #define GEN5_SURFACE_MIPMAPLAYOUT_BELOW 0 #define GEN5_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define GEN5_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define GEN5_SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define GEN5_SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define GEN5_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define GEN5_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define GEN5_SURFACEFORMAT_R64G64_FLOAT 0x005 #define GEN5_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define GEN5_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define GEN5_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define GEN5_SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define GEN5_SURFACEFORMAT_R32G32B32_SINT 0x041 #define GEN5_SURFACEFORMAT_R32G32B32_UINT 0x042 #define GEN5_SURFACEFORMAT_R32G32B32_UNORM 0x043 #define GEN5_SURFACEFORMAT_R32G32B32_SNORM 0x044 #define GEN5_SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define GEN5_SURFACEFORMAT_R32G32B32_USCALED 0x046 #define GEN5_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define GEN5_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define GEN5_SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define GEN5_SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define GEN5_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define GEN5_SURFACEFORMAT_R32G32_FLOAT 0x085 #define GEN5_SURFACEFORMAT_R32G32_SINT 0x086 #define GEN5_SURFACEFORMAT_R32G32_UINT 0x087 #define GEN5_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define GEN5_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define GEN5_SURFACEFORMAT_L32A32_FLOAT 0x08A #define GEN5_SURFACEFORMAT_R32G32_UNORM 0x08B #define GEN5_SURFACEFORMAT_R32G32_SNORM 0x08C #define GEN5_SURFACEFORMAT_R64_FLOAT 0x08D #define GEN5_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define GEN5_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define GEN5_SURFACEFORMAT_A32X32_FLOAT 0x090 #define GEN5_SURFACEFORMAT_L32X32_FLOAT 0x091 #define GEN5_SURFACEFORMAT_I32X32_FLOAT 0x092 #define GEN5_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define GEN5_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define GEN5_SURFACEFORMAT_R32G32_SSCALED 0x095 #define GEN5_SURFACEFORMAT_R32G32_USCALED 0x096 #define GEN5_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define GEN5_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define GEN5_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define GEN5_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define GEN5_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define GEN5_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define GEN5_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define GEN5_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define GEN5_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define GEN5_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define GEN5_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define GEN5_SURFACEFORMAT_R16G16_UNORM 0x0CC #define GEN5_SURFACEFORMAT_R16G16_SNORM 0x0CD #define GEN5_SURFACEFORMAT_R16G16_SINT 0x0CE #define GEN5_SURFACEFORMAT_R16G16_UINT 0x0CF #define GEN5_SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define GEN5_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define GEN5_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define GEN5_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define GEN5_SURFACEFORMAT_R32_SINT 0x0D6 #define GEN5_SURFACEFORMAT_R32_UINT 0x0D7 #define GEN5_SURFACEFORMAT_R32_FLOAT 0x0D8 #define GEN5_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define GEN5_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define GEN5_SURFACEFORMAT_L16A16_UNORM 0x0DF #define GEN5_SURFACEFORMAT_I24X8_UNORM 0x0E0 #define GEN5_SURFACEFORMAT_L24X8_UNORM 0x0E1 #define GEN5_SURFACEFORMAT_A24X8_UNORM 0x0E2 #define GEN5_SURFACEFORMAT_I32_FLOAT 0x0E3 #define GEN5_SURFACEFORMAT_L32_FLOAT 0x0E4 #define GEN5_SURFACEFORMAT_A32_FLOAT 0x0E5 #define GEN5_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define GEN5_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define GEN5_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define GEN5_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define GEN5_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define GEN5_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define GEN5_SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define GEN5_SURFACEFORMAT_R32_UNORM 0x0F1 #define GEN5_SURFACEFORMAT_R32_SNORM 0x0F2 #define GEN5_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define GEN5_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define GEN5_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define GEN5_SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define GEN5_SURFACEFORMAT_R16G16_USCALED 0x0F7 #define GEN5_SURFACEFORMAT_R32_SSCALED 0x0F8 #define GEN5_SURFACEFORMAT_R32_USCALED 0x0F9 #define GEN5_SURFACEFORMAT_B5G6R5_UNORM 0x100 #define GEN5_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define GEN5_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define GEN5_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define GEN5_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define GEN5_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define GEN5_SURFACEFORMAT_R8G8_UNORM 0x106 #define GEN5_SURFACEFORMAT_R8G8_SNORM 0x107 #define GEN5_SURFACEFORMAT_R8G8_SINT 0x108 #define GEN5_SURFACEFORMAT_R8G8_UINT 0x109 #define GEN5_SURFACEFORMAT_R16_UNORM 0x10A #define GEN5_SURFACEFORMAT_R16_SNORM 0x10B #define GEN5_SURFACEFORMAT_R16_SINT 0x10C #define GEN5_SURFACEFORMAT_R16_UINT 0x10D #define GEN5_SURFACEFORMAT_R16_FLOAT 0x10E #define GEN5_SURFACEFORMAT_I16_UNORM 0x111 #define GEN5_SURFACEFORMAT_L16_UNORM 0x112 #define GEN5_SURFACEFORMAT_A16_UNORM 0x113 #define GEN5_SURFACEFORMAT_L8A8_UNORM 0x114 #define GEN5_SURFACEFORMAT_I16_FLOAT 0x115 #define GEN5_SURFACEFORMAT_L16_FLOAT 0x116 #define GEN5_SURFACEFORMAT_A16_FLOAT 0x117 #define GEN5_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define GEN5_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define GEN5_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define GEN5_SURFACEFORMAT_R8G8_SSCALED 0x11C #define GEN5_SURFACEFORMAT_R8G8_USCALED 0x11D #define GEN5_SURFACEFORMAT_R16_SSCALED 0x11E #define GEN5_SURFACEFORMAT_R16_USCALED 0x11F #define GEN5_SURFACEFORMAT_R8_UNORM 0x140 #define GEN5_SURFACEFORMAT_R8_SNORM 0x141 #define GEN5_SURFACEFORMAT_R8_SINT 0x142 #define GEN5_SURFACEFORMAT_R8_UINT 0x143 #define GEN5_SURFACEFORMAT_A8_UNORM 0x144 #define GEN5_SURFACEFORMAT_I8_UNORM 0x145 #define GEN5_SURFACEFORMAT_L8_UNORM 0x146 #define GEN5_SURFACEFORMAT_P4A4_UNORM 0x147 #define GEN5_SURFACEFORMAT_A4P4_UNORM 0x148 #define GEN5_SURFACEFORMAT_R8_SSCALED 0x149 #define GEN5_SURFACEFORMAT_R8_USCALED 0x14A #define GEN5_SURFACEFORMAT_R1_UINT 0x181 #define GEN5_SURFACEFORMAT_YCRCB_NORMAL 0x182 #define GEN5_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define GEN5_SURFACEFORMAT_BC1_UNORM 0x186 #define GEN5_SURFACEFORMAT_BC2_UNORM 0x187 #define GEN5_SURFACEFORMAT_BC3_UNORM 0x188 #define GEN5_SURFACEFORMAT_BC4_UNORM 0x189 #define GEN5_SURFACEFORMAT_BC5_UNORM 0x18A #define GEN5_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define GEN5_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define GEN5_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define GEN5_SURFACEFORMAT_MONO8 0x18E #define GEN5_SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define GEN5_SURFACEFORMAT_YCRCB_SWAPY 0x190 #define GEN5_SURFACEFORMAT_DXT1_RGB 0x191 #define GEN5_SURFACEFORMAT_FXT1 0x192 #define GEN5_SURFACEFORMAT_R8G8B8_UNORM 0x193 #define GEN5_SURFACEFORMAT_R8G8B8_SNORM 0x194 #define GEN5_SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define GEN5_SURFACEFORMAT_R8G8B8_USCALED 0x196 #define GEN5_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define GEN5_SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define GEN5_SURFACEFORMAT_BC4_SNORM 0x199 #define GEN5_SURFACEFORMAT_BC5_SNORM 0x19A #define GEN5_SURFACEFORMAT_R16G16B16_UNORM 0x19C #define GEN5_SURFACEFORMAT_R16G16B16_SNORM 0x19D #define GEN5_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define GEN5_SURFACEFORMAT_R16G16B16_USCALED 0x19F #define GEN5_SURFACERETURNFORMAT_FLOAT32 0 #define GEN5_SURFACERETURNFORMAT_S1 1 #define GEN5_SURFACE_1D 0 #define GEN5_SURFACE_2D 1 #define GEN5_SURFACE_3D 2 #define GEN5_SURFACE_CUBE 3 #define GEN5_SURFACE_BUFFER 4 #define GEN5_SURFACE_NULL 7 #define GEN5_BORDER_COLOR_MODE_DEFAULT 0 #define GEN5_BORDER_COLOR_MODE_LEGACY 1 #define GEN5_TEXCOORDMODE_WRAP 0 #define GEN5_TEXCOORDMODE_MIRROR 1 #define GEN5_TEXCOORDMODE_CLAMP 2 #define GEN5_TEXCOORDMODE_CUBE 3 #define GEN5_TEXCOORDMODE_CLAMP_BORDER 4 #define GEN5_TEXCOORDMODE_MIRROR_ONCE 5 #define GEN5_THREAD_PRIORITY_NORMAL 0 #define GEN5_THREAD_PRIORITY_HIGH 1 #define GEN5_TILEWALK_XMAJOR 0 #define GEN5_TILEWALK_YMAJOR 1 #define GEN5_VERTEX_SUBPIXEL_PRECISION_8BITS 0 #define GEN5_VERTEX_SUBPIXEL_PRECISION_4BITS 1 #define GEN5_VERTEXBUFFER_ACCESS_VERTEXDATA 0 #define GEN5_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 #define VFCOMPONENT_NOSTORE 0 #define VFCOMPONENT_STORE_SRC 1 #define VFCOMPONENT_STORE_0 2 #define VFCOMPONENT_STORE_1_FLT 3 #define VFCOMPONENT_STORE_1_INT 4 #define VFCOMPONENT_STORE_VID 5 #define VFCOMPONENT_STORE_IID 6 #define VFCOMPONENT_STORE_PID 7 /* Execution Unit (EU) defines */ #define GEN5_ALIGN_1 0 #define GEN5_ALIGN_16 1 #define GEN5_ADDRESS_DIRECT 0 #define GEN5_ADDRESS_REGISTER_INDIRECT_REGISTER 1 #define GEN5_CHANNEL_X 0 #define GEN5_CHANNEL_Y 1 #define GEN5_CHANNEL_Z 2 #define GEN5_CHANNEL_W 3 #define GEN5_COMPRESSION_NONE 0 #define GEN5_COMPRESSION_2NDHALF 1 #define GEN5_COMPRESSION_COMPRESSED 2 #define GEN5_CONDITIONAL_NONE 0 #define GEN5_CONDITIONAL_Z 1 #define GEN5_CONDITIONAL_NZ 2 #define GEN5_CONDITIONAL_EQ 1 /* Z */ #define GEN5_CONDITIONAL_NEQ 2 /* NZ */ #define GEN5_CONDITIONAL_G 3 #define GEN5_CONDITIONAL_GE 4 #define GEN5_CONDITIONAL_L 5 #define GEN5_CONDITIONAL_LE 6 #define GEN5_CONDITIONAL_C 7 #define GEN5_CONDITIONAL_O 8 #define GEN5_DEBUG_NONE 0 #define GEN5_DEBUG_BREAKPOINT 1 #define GEN5_DEPENDENCY_NORMAL 0 #define GEN5_DEPENDENCY_NOTCLEARED 1 #define GEN5_DEPENDENCY_NOTCHECKED 2 #define GEN5_DEPENDENCY_DISABLE 3 #define GEN5_EXECUTE_1 0 #define GEN5_EXECUTE_2 1 #define GEN5_EXECUTE_4 2 #define GEN5_EXECUTE_8 3 #define GEN5_EXECUTE_16 4 #define GEN5_EXECUTE_32 5 #define GEN5_HORIZONTAL_STRIDE_0 0 #define GEN5_HORIZONTAL_STRIDE_1 1 #define GEN5_HORIZONTAL_STRIDE_2 2 #define GEN5_HORIZONTAL_STRIDE_4 3 #define GEN5_INSTRUCTION_NORMAL 0 #define GEN5_INSTRUCTION_SATURATE 1 #define GEN5_MASK_ENABLE 0 #define GEN5_MASK_DISABLE 1 #define GEN5_OPCODE_MOV 1 #define GEN5_OPCODE_SEL 2 #define GEN5_OPCODE_NOT 4 #define GEN5_OPCODE_AND 5 #define GEN5_OPCODE_OR 6 #define GEN5_OPCODE_XOR 7 #define GEN5_OPCODE_SHR 8 #define GEN5_OPCODE_SHL 9 #define GEN5_OPCODE_RSR 10 #define GEN5_OPCODE_RSL 11 #define GEN5_OPCODE_ASR 12 #define GEN5_OPCODE_CMP 16 #define GEN5_OPCODE_JMPI 32 #define GEN5_OPCODE_IF 34 #define GEN5_OPCODE_IFF 35 #define GEN5_OPCODE_ELSE 36 #define GEN5_OPCODE_ENDIF 37 #define GEN5_OPCODE_DO 38 #define GEN5_OPCODE_WHILE 39 #define GEN5_OPCODE_BREAK 40 #define GEN5_OPCODE_CONTINUE 41 #define GEN5_OPCODE_HALT 42 #define GEN5_OPCODE_MSAVE 44 #define GEN5_OPCODE_MRESTORE 45 #define GEN5_OPCODE_PUSH 46 #define GEN5_OPCODE_POP 47 #define GEN5_OPCODE_WAIT 48 #define GEN5_OPCODE_SEND 49 #define GEN5_OPCODE_ADD 64 #define GEN5_OPCODE_MUL 65 #define GEN5_OPCODE_AVG 66 #define GEN5_OPCODE_FRC 67 #define GEN5_OPCODE_RNDU 68 #define GEN5_OPCODE_RNDD 69 #define GEN5_OPCODE_RNDE 70 #define GEN5_OPCODE_RNDZ 71 #define GEN5_OPCODE_MAC 72 #define GEN5_OPCODE_MACH 73 #define GEN5_OPCODE_LZD 74 #define GEN5_OPCODE_SAD2 80 #define GEN5_OPCODE_SADA2 81 #define GEN5_OPCODE_DP4 84 #define GEN5_OPCODE_DPH 85 #define GEN5_OPCODE_DP3 86 #define GEN5_OPCODE_DP2 87 #define GEN5_OPCODE_DPA2 88 #define GEN5_OPCODE_LINE 89 #define GEN5_OPCODE_NOP 126 #define GEN5_PREDICATE_NONE 0 #define GEN5_PREDICATE_NORMAL 1 #define GEN5_PREDICATE_ALIGN1_ANYV 2 #define GEN5_PREDICATE_ALIGN1_ALLV 3 #define GEN5_PREDICATE_ALIGN1_ANY2H 4 #define GEN5_PREDICATE_ALIGN1_ALL2H 5 #define GEN5_PREDICATE_ALIGN1_ANY4H 6 #define GEN5_PREDICATE_ALIGN1_ALL4H 7 #define GEN5_PREDICATE_ALIGN1_ANY8H 8 #define GEN5_PREDICATE_ALIGN1_ALL8H 9 #define GEN5_PREDICATE_ALIGN1_ANY16H 10 #define GEN5_PREDICATE_ALIGN1_ALL16H 11 #define GEN5_PREDICATE_ALIGN16_REPLICATE_X 2 #define GEN5_PREDICATE_ALIGN16_REPLICATE_Y 3 #define GEN5_PREDICATE_ALIGN16_REPLICATE_Z 4 #define GEN5_PREDICATE_ALIGN16_REPLICATE_W 5 #define GEN5_PREDICATE_ALIGN16_ANY4H 6 #define GEN5_PREDICATE_ALIGN16_ALL4H 7 #define GEN5_ARCHITECTURE_REGISTER_FILE 0 #define GEN5_GENERAL_REGISTER_FILE 1 #define GEN5_MESSAGE_REGISTER_FILE 2 #define GEN5_IMMEDIATE_VALUE 3 #define GEN5_REGISTER_TYPE_UD 0 #define GEN5_REGISTER_TYPE_D 1 #define GEN5_REGISTER_TYPE_UW 2 #define GEN5_REGISTER_TYPE_W 3 #define GEN5_REGISTER_TYPE_UB 4 #define GEN5_REGISTER_TYPE_B 5 #define GEN5_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ #define GEN5_REGISTER_TYPE_HF 6 #define GEN5_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ #define GEN5_REGISTER_TYPE_F 7 #define GEN5_ARF_NULL 0x00 #define GEN5_ARF_ADDRESS 0x10 #define GEN5_ARF_ACCUMULATOR 0x20 #define GEN5_ARF_FLAG 0x30 #define GEN5_ARF_MASK 0x40 #define GEN5_ARF_MASK_STACK 0x50 #define GEN5_ARF_MASK_STACK_DEPTH 0x60 #define GEN5_ARF_STATE 0x70 #define GEN5_ARF_CONTROL 0x80 #define GEN5_ARF_NOTIFICATION_COUNT 0x90 #define GEN5_ARF_IP 0xA0 #define GEN5_AMASK 0 #define GEN5_IMASK 1 #define GEN5_LMASK 2 #define GEN5_CMASK 3 #define GEN5_THREAD_NORMAL 0 #define GEN5_THREAD_ATOMIC 1 #define GEN5_THREAD_SWITCH 2 #define GEN5_VERTICAL_STRIDE_0 0 #define GEN5_VERTICAL_STRIDE_1 1 #define GEN5_VERTICAL_STRIDE_2 2 #define GEN5_VERTICAL_STRIDE_4 3 #define GEN5_VERTICAL_STRIDE_8 4 #define GEN5_VERTICAL_STRIDE_16 5 #define GEN5_VERTICAL_STRIDE_32 6 #define GEN5_VERTICAL_STRIDE_64 7 #define GEN5_VERTICAL_STRIDE_128 8 #define GEN5_VERTICAL_STRIDE_256 9 #define GEN5_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF #define GEN5_WIDTH_1 0 #define GEN5_WIDTH_2 1 #define GEN5_WIDTH_4 2 #define GEN5_WIDTH_8 3 #define GEN5_WIDTH_16 4 #define GEN5_STATELESS_BUFFER_BOUNDARY_1K 0 #define GEN5_STATELESS_BUFFER_BOUNDARY_2K 1 #define GEN5_STATELESS_BUFFER_BOUNDARY_4K 2 #define GEN5_STATELESS_BUFFER_BOUNDARY_8K 3 #define GEN5_STATELESS_BUFFER_BOUNDARY_16K 4 #define GEN5_STATELESS_BUFFER_BOUNDARY_32K 5 #define GEN5_STATELESS_BUFFER_BOUNDARY_64K 6 #define GEN5_STATELESS_BUFFER_BOUNDARY_128K 7 #define GEN5_STATELESS_BUFFER_BOUNDARY_256K 8 #define GEN5_STATELESS_BUFFER_BOUNDARY_512K 9 #define GEN5_STATELESS_BUFFER_BOUNDARY_1M 10 #define GEN5_STATELESS_BUFFER_BOUNDARY_2M 11 #define GEN5_POLYGON_FACING_FRONT 0 #define GEN5_POLYGON_FACING_BACK 1 #define GEN5_MESSAGE_TARGET_NULL 0 #define GEN5_MESSAGE_TARGET_MATH 1 #define GEN5_MESSAGE_TARGET_SAMPLER 2 #define GEN5_MESSAGE_TARGET_GATEWAY 3 #define GEN5_MESSAGE_TARGET_DATAPORT_READ 4 #define GEN5_MESSAGE_TARGET_DATAPORT_WRITE 5 #define GEN5_MESSAGE_TARGET_URB 6 #define GEN5_MESSAGE_TARGET_THREAD_SPAWNER 7 #define GEN5_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define GEN5_SAMPLER_RETURN_FORMAT_UINT32 2 #define GEN5_SAMPLER_RETURN_FORMAT_SINT32 3 #define GEN5_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define GEN5_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define GEN5_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 #define GEN5_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 #define GEN5_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 #define GEN5_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 #define GEN5_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 #define GEN5_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 #define GEN5_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 #define GEN5_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 #define GEN5_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 #define GEN5_SAMPLER_MESSAGE_SIMD8_RESINFO 2 #define GEN5_SAMPLER_MESSAGE_SIMD16_RESINFO 2 #define GEN5_SAMPLER_MESSAGE_SIMD4X2_LD 3 #define GEN5_SAMPLER_MESSAGE_SIMD8_LD 3 #define GEN5_SAMPLER_MESSAGE_SIMD16_LD 3 #define GEN5_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 #define GEN5_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 #define GEN5_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define GEN5_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define GEN5_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define GEN5_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define GEN5_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 #define GEN5_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define GEN5_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 #define GEN5_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 #define GEN5_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 #define GEN5_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2 #define GEN5_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 #define GEN5_DATAPORT_READ_TARGET_DATA_CACHE 0 #define GEN5_DATAPORT_READ_TARGET_RENDER_CACHE 1 #define GEN5_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 #define GEN5_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 #define GEN5_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 #define GEN5_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 #define GEN5_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 #define GEN5_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 #define GEN5_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 #define GEN5_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 #define GEN5_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2 #define GEN5_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 #define GEN5_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 #define GEN5_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 #define GEN5_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 #define GEN5_MATH_FUNCTION_INV 1 #define GEN5_MATH_FUNCTION_LOG 2 #define GEN5_MATH_FUNCTION_EXP 3 #define GEN5_MATH_FUNCTION_SQRT 4 #define GEN5_MATH_FUNCTION_RSQ 5 #define GEN5_MATH_FUNCTION_SIN 6 /* was 7 */ #define GEN5_MATH_FUNCTION_COS 7 /* was 8 */ #define GEN5_MATH_FUNCTION_SINCOS 8 /* was 6 */ #define GEN5_MATH_FUNCTION_TAN 9 #define GEN5_MATH_FUNCTION_POW 10 #define GEN5_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 #define GEN5_MATH_FUNCTION_INT_DIV_QUOTIENT 12 #define GEN5_MATH_FUNCTION_INT_DIV_REMAINDER 13 #define GEN5_MATH_INTEGER_UNSIGNED 0 #define GEN5_MATH_INTEGER_SIGNED 1 #define GEN5_MATH_PRECISION_FULL 0 #define GEN5_MATH_PRECISION_PARTIAL 1 #define GEN5_MATH_SATURATE_NONE 0 #define GEN5_MATH_SATURATE_SATURATE 1 #define GEN5_MATH_DATA_VECTOR 0 #define GEN5_MATH_DATA_SCALAR 1 #define GEN5_URB_OPCODE_WRITE 0 #define GEN5_URB_SWIZZLE_NONE 0 #define GEN5_URB_SWIZZLE_INTERLEAVE 1 #define GEN5_URB_SWIZZLE_TRANSPOSE 2 #define GEN5_SCRATCH_SPACE_SIZE_1K 0 #define GEN5_SCRATCH_SPACE_SIZE_2K 1 #define GEN5_SCRATCH_SPACE_SIZE_4K 2 #define GEN5_SCRATCH_SPACE_SIZE_8K 3 #define GEN5_SCRATCH_SPACE_SIZE_16K 4 #define GEN5_SCRATCH_SPACE_SIZE_32K 5 #define GEN5_SCRATCH_SPACE_SIZE_64K 6 #define GEN5_SCRATCH_SPACE_SIZE_128K 7 #define GEN5_SCRATCH_SPACE_SIZE_256K 8 #define GEN5_SCRATCH_SPACE_SIZE_512K 9 #define GEN5_SCRATCH_SPACE_SIZE_1M 10 #define GEN5_SCRATCH_SPACE_SIZE_2M 11 #define CMD_URB_FENCE 0x6000 #define CMD_CONST_BUFFER_STATE 0x6001 #define CMD_CONST_BUFFER 0x6002 #define CMD_STATE_BASE_ADDRESS 0x6101 #define CMD_STATE_INSN_POINTER 0x6102 #define CMD_PIPELINE_SELECT 0x6104 #define CMD_PIPELINED_STATE_POINTERS 0x7800 #define CMD_BINDING_TABLE_PTRS 0x7801 #define CMD_VERTEX_BUFFER 0x7808 #define CMD_VERTEX_ELEMENT 0x7809 #define CMD_INDEX_BUFFER 0x780a #define CMD_VF_STATISTICS 0x780b #define CMD_DRAW_RECT 0x7900 #define CMD_BLEND_CONSTANT_COLOR 0x7901 #define CMD_CHROMA_KEY 0x7904 #define CMD_DEPTH_BUFFER 0x7905 #define CMD_POLY_STIPPLE_OFFSET 0x7906 #define CMD_POLY_STIPPLE_PATTERN 0x7907 #define CMD_LINE_STIPPLE_PATTERN 0x7908 #define CMD_GLOBAL_DEPTH_OFFSET_CLAMP 0x7908 #define CMD_PIPE_CONTROL 0x7a00 #define CMD_3D_PRIM 0x7b00 #define CMD_MI_FLUSH 0x0200 /* Various values from the R0 vertex header: */ #define R02_PRIM_END 0x1 #define R02_PRIM_START 0x2 /* media pipeline */ #define GEN5_VFE_MODE_GENERIC 0x0 #define GEN5_VFE_MODE_VLD_MPEG2 0x1 #define GEN5_VFE_MODE_IS 0x2 #define GEN5_VFE_MODE_AVC_MC 0x4 #define GEN5_VFE_MODE_AVC_IT 0x7 #define GEN5_VFE_MODE_VC1_IT 0xB #define GEN5_VFE_DEBUG_COUNTER_FREE 0 #define GEN5_VFE_DEBUG_COUNTER_FROZEN 1 #define GEN5_VFE_DEBUG_COUNTER_ONCE 2 #define GEN5_VFE_DEBUG_COUNTER_ALWAYS 3 /* VLD_STATE */ #define GEN5_MPEG_TOP_FIELD 1 #define GEN5_MPEG_BOTTOM_FIELD 2 #define GEN5_MPEG_FRAME 3 #define GEN5_MPEG_QSCALE_LINEAR 0 #define GEN5_MPEG_QSCALE_NONLINEAR 1 #define GEN5_MPEG_ZIGZAG_SCAN 0 #define GEN5_MPEG_ALTER_VERTICAL_SCAN 1 #define GEN5_MPEG_I_PICTURE 1 #define GEN5_MPEG_P_PICTURE 2 #define GEN5_MPEG_B_PICTURE 3 /* Command packets: */ struct header { unsigned int length:16; unsigned int opcode:16; }; union header_union { struct header bits; unsigned int dword; }; struct gen5_3d_control { struct { unsigned int length:8; unsigned int notify_enable:1; unsigned int pad:3; unsigned int wc_flush_enable:1; unsigned int depth_stall_enable:1; unsigned int operation:2; unsigned int opcode:16; } header; struct { unsigned int pad:2; unsigned int dest_addr_type:1; unsigned int dest_addr:29; } dest; unsigned int dword2; unsigned int dword3; }; struct gen5_3d_primitive { struct { unsigned int length:8; unsigned int pad:2; unsigned int topology:5; unsigned int indexed:1; unsigned int opcode:16; } header; unsigned int verts_per_instance; unsigned int start_vert_location; unsigned int instance_count; unsigned int start_instance_location; unsigned int base_vert_location; }; /* These seem to be passed around as function args, so it works out * better to keep them as #defines: */ #define GEN5_FLUSH_READ_CACHE 0x1 #define GEN5_FLUSH_STATE_CACHE 0x2 #define GEN5_INHIBIT_FLUSH_RENDER_CACHE 0x4 #define GEN5_FLUSH_SNAPSHOT_COUNTERS 0x8 struct gen5_mi_flush { unsigned int flags:4; unsigned int pad:12; unsigned int opcode:16; }; struct gen5_vf_statistics { unsigned int statistics_enable:1; unsigned int pad:15; unsigned int opcode:16; }; struct gen5_binding_table_pointers { struct header header; unsigned int vs; unsigned int gs; unsigned int clp; unsigned int sf; unsigned int wm; }; struct gen5_blend_constant_color { struct header header; float blend_constant_color[4]; }; struct gen5_depthbuffer { union header_union header; union { struct { unsigned int pitch:18; unsigned int format:3; unsigned int pad:4; unsigned int depth_offset_disable:1; unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int pad2:1; unsigned int surface_type:3; } bits; unsigned int dword; } dword1; unsigned int dword2_base_addr; union { struct { unsigned int pad:1; unsigned int mipmap_layout:1; unsigned int lod:4; unsigned int width:13; unsigned int height:13; } bits; unsigned int dword; } dword3; union { struct { unsigned int pad:12; unsigned int min_array_element:9; unsigned int depth:11; } bits; unsigned int dword; } dword4; }; struct gen5_drawrect { struct header header; unsigned int xmin:16; unsigned int ymin:16; unsigned int xmax:16; unsigned int ymax:16; unsigned int xorg:16; unsigned int yorg:16; }; struct gen5_global_depth_offset_clamp { struct header header; float depth_offset_clamp; }; struct gen5_indexbuffer { union { struct { unsigned int length:8; unsigned int index_format:2; unsigned int cut_index_enable:1; unsigned int pad:5; unsigned int opcode:16; } bits; unsigned int dword; } header; unsigned int buffer_start; unsigned int buffer_end; }; struct gen5_line_stipple { struct header header; struct { unsigned int pattern:16; unsigned int pad:16; } bits0; struct { unsigned int repeat_count:9; unsigned int pad:7; unsigned int inverse_repeat_count:16; } bits1; }; struct gen5_pipelined_state_pointers { struct header header; struct { unsigned int pad:5; unsigned int offset:27; } vs; struct { unsigned int enable:1; unsigned int pad:4; unsigned int offset:27; } gs; struct { unsigned int enable:1; unsigned int pad:4; unsigned int offset:27; } clp; struct { unsigned int pad:5; unsigned int offset:27; } sf; struct { unsigned int pad:5; unsigned int offset:27; } wm; struct { unsigned int pad:5; unsigned int offset:27; /* KW: check me! */ } cc; }; struct gen5_polygon_stipple_offset { struct header header; struct { unsigned int y_offset:5; unsigned int pad:3; unsigned int x_offset:5; unsigned int pad0:19; } bits0; }; struct gen5_polygon_stipple { struct header header; unsigned int stipple[32]; }; struct gen5_pipeline_select { struct { unsigned int pipeline_select:1; unsigned int pad:15; unsigned int opcode:16; } header; }; struct gen5_pipe_control { struct { unsigned int length:8; unsigned int notify_enable:1; unsigned int pad:2; unsigned int instruction_state_cache_flush_enable:1; unsigned int write_cache_flush_enable:1; unsigned int depth_stall_enable:1; unsigned int post_sync_operation:2; unsigned int opcode:16; } header; struct { unsigned int pad:2; unsigned int dest_addr_type:1; unsigned int dest_addr:29; } bits1; unsigned int data0; unsigned int data1; }; struct gen5_urb_fence { struct { unsigned int length:8; unsigned int vs_realloc:1; unsigned int gs_realloc:1; unsigned int clp_realloc:1; unsigned int sf_realloc:1; unsigned int vfe_realloc:1; unsigned int cs_realloc:1; unsigned int pad:2; unsigned int opcode:16; } header; struct { unsigned int vs_fence:10; unsigned int gs_fence:10; unsigned int clp_fence:10; unsigned int pad:2; } bits0; struct { unsigned int sf_fence:10; unsigned int vf_fence:10; unsigned int cs_fence:10; unsigned int pad:2; } bits1; }; struct gen5_constant_buffer_state /* previously gen5_command_streamer */ { struct header header; struct { unsigned int nr_urb_entries:3; unsigned int pad:1; unsigned int urb_entry_size:5; unsigned int pad0:23; } bits0; }; struct gen5_constant_buffer { struct { unsigned int length:8; unsigned int valid:1; unsigned int pad:7; unsigned int opcode:16; } header; struct { unsigned int buffer_length:6; unsigned int buffer_address:26; } bits0; }; struct gen5_state_base_address { struct header header; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int general_state_address:27; } bits0; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int surface_state_address:27; } bits1; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int indirect_object_state_address:27; } bits2; struct { unsigned int modify_enable:1; unsigned int pad:11; unsigned int general_state_upper_bound:20; } bits3; struct { unsigned int modify_enable:1; unsigned int pad:11; unsigned int indirect_object_state_upper_bound:20; } bits4; }; struct gen5_state_prefetch { struct header header; struct { unsigned int prefetch_count:3; unsigned int pad:3; unsigned int prefetch_pointer:26; } bits0; }; struct gen5_system_instruction_pointer { struct header header; struct { unsigned int pad:4; unsigned int system_instruction_pointer:28; } bits0; }; /* State structs for the various fixed function units: */ struct thread0 { unsigned int pad0:1; unsigned int grf_reg_count:3; unsigned int pad1:2; unsigned int kernel_start_pointer:26; }; struct thread1 { unsigned int ext_halt_exception_enable:1; unsigned int sw_exception_enable:1; unsigned int mask_stack_exception_enable:1; unsigned int timeout_exception_enable:1; unsigned int illegal_op_exception_enable:1; unsigned int pad0:3; unsigned int depth_coef_urb_read_offset:6; /* WM only */ unsigned int pad1:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int binding_table_entry_count:8; unsigned int pad3:5; unsigned int single_program_flow:1; }; struct thread2 { unsigned int per_thread_scratch_space:4; unsigned int pad0:6; unsigned int scratch_space_base_pointer:22; }; struct thread3 { unsigned int dispatch_grf_start_reg:4; unsigned int urb_entry_read_offset:6; unsigned int pad0:1; unsigned int urb_entry_read_length:6; unsigned int pad1:1; unsigned int const_urb_entry_read_offset:6; unsigned int pad2:1; unsigned int const_urb_entry_read_length:6; unsigned int pad3:1; }; struct gen5_clip_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:9; unsigned int gs_output_stats:1; /* not always */ unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:6; /* may be less */ unsigned int pad3:1; } thread4; struct { unsigned int pad0:13; unsigned int clip_mode:3; unsigned int userclip_enable_flags:8; unsigned int userclip_must_clip:1; unsigned int pad1:1; unsigned int guard_band_enable:1; unsigned int viewport_z_clip_enable:1; unsigned int viewport_xy_clip_enable:1; unsigned int vertex_position_space:1; unsigned int api_mode:1; unsigned int pad2:1; } clip5; struct { unsigned int pad0:5; unsigned int clipper_viewport_state_ptr:27; } clip6; float viewport_xmin; float viewport_xmax; float viewport_ymin; float viewport_ymax; }; struct gen5_cc_unit_state { struct { unsigned int pad0:3; unsigned int bf_stencil_pass_depth_pass_op:3; unsigned int bf_stencil_pass_depth_fail_op:3; unsigned int bf_stencil_fail_op:3; unsigned int bf_stencil_func:3; unsigned int bf_stencil_enable:1; unsigned int pad1:2; unsigned int stencil_write_enable:1; unsigned int stencil_pass_depth_pass_op:3; unsigned int stencil_pass_depth_fail_op:3; unsigned int stencil_fail_op:3; unsigned int stencil_func:3; unsigned int stencil_enable:1; } cc0; struct { unsigned int bf_stencil_ref:8; unsigned int stencil_write_mask:8; unsigned int stencil_test_mask:8; unsigned int stencil_ref:8; } cc1; struct { unsigned int logicop_enable:1; unsigned int pad0:10; unsigned int depth_write_enable:1; unsigned int depth_test_function:3; unsigned int depth_test:1; unsigned int bf_stencil_write_mask:8; unsigned int bf_stencil_test_mask:8; } cc2; struct { unsigned int pad0:8; unsigned int alpha_test_func:3; unsigned int alpha_test:1; unsigned int blend_enable:1; unsigned int ia_blend_enable:1; unsigned int pad1:1; unsigned int alpha_test_format:1; unsigned int pad2:16; } cc3; struct { unsigned int pad0:5; unsigned int cc_viewport_state_offset:27; } cc4; struct { unsigned int pad0:2; unsigned int ia_dest_blend_factor:5; unsigned int ia_src_blend_factor:5; unsigned int ia_blend_function:3; unsigned int statistics_enable:1; unsigned int logicop_func:4; unsigned int pad1:11; unsigned int dither_enable:1; } cc5; struct { unsigned int clamp_post_alpha_blend:1; unsigned int clamp_pre_alpha_blend:1; unsigned int clamp_range:2; unsigned int pad0:11; unsigned int y_dither_offset:2; unsigned int x_dither_offset:2; unsigned int dest_blend_factor:5; unsigned int src_blend_factor:5; unsigned int blend_function:3; } cc6; struct { union { float f; unsigned char ub[4]; } alpha_ref; } cc7; }; struct gen5_sf_unit_state { struct thread0 thread0; struct { unsigned int pad0:7; unsigned int sw_exception_enable:1; unsigned int pad1:3; unsigned int mask_stack_exception_enable:1; unsigned int pad2:1; unsigned int illegal_op_exception_enable:1; unsigned int pad3:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int binding_table_entry_count:8; unsigned int pad4:5; unsigned int single_program_flow:1; } sf1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:6; unsigned int pad3:1; } thread4; struct { unsigned int front_winding:1; unsigned int viewport_transform:1; unsigned int pad0:3; unsigned int sf_viewport_state_offset:27; } sf5; struct { unsigned int pad0:9; unsigned int dest_org_vbias:4; unsigned int dest_org_hbias:4; unsigned int scissor:1; unsigned int disable_2x2_trifilter:1; unsigned int disable_zero_pix_trifilter:1; unsigned int point_rast_rule:2; unsigned int line_endcap_aa_region_width:2; unsigned int line_width:4; unsigned int fast_scissor_disable:1; unsigned int cull_mode:2; unsigned int aa_enable:1; } sf6; struct { unsigned int point_size:11; unsigned int use_point_size_state:1; unsigned int subpixel_precision:1; unsigned int sprite_point:1; unsigned int pad0:11; unsigned int trifan_pv:2; unsigned int linestrip_pv:2; unsigned int tristrip_pv:2; unsigned int line_last_pixel_enable:1; } sf7; }; struct gen5_gs_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:1; unsigned int pad3:6; } thread4; struct { unsigned int sampler_count:3; unsigned int pad0:2; unsigned int sampler_state_pointer:27; } gs5; struct { unsigned int max_vp_index:4; unsigned int pad0:26; unsigned int reorder_enable:1; unsigned int pad1:1; } gs6; }; struct gen5_vs_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:4; unsigned int pad3:3; } thread4; struct { unsigned int sampler_count:3; unsigned int pad0:2; unsigned int sampler_state_pointer:27; } vs5; struct { unsigned int vs_enable:1; unsigned int vert_cache_disable:1; unsigned int pad0:30; } vs6; }; struct gen5_wm_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int stats_enable:1; unsigned int pad0:1; unsigned int sampler_count:3; unsigned int sampler_state_pointer:27; } wm4; struct { unsigned int enable_8_pix:1; unsigned int enable_16_pix:1; unsigned int enable_32_pix:1; unsigned int pad0:7; unsigned int legacy_global_depth_bias:1; unsigned int line_stipple:1; unsigned int depth_offset:1; unsigned int polygon_stipple:1; unsigned int line_aa_region_width:2; unsigned int line_endcap_aa_region_width:2; unsigned int early_depth_test:1; unsigned int thread_dispatch_enable:1; unsigned int program_uses_depth:1; unsigned int program_computes_depth:1; unsigned int program_uses_killpixel:1; unsigned int legacy_line_rast: 1; unsigned int transposed_urb_read:1; unsigned int max_threads:7; } wm5; float global_depth_offset_constant; float global_depth_offset_scale; struct { unsigned int pad0:1; unsigned int grf_reg_count_1:3; unsigned int pad1:2; unsigned int kernel_start_pointer_1:26; } wm8; struct { unsigned int pad0:1; unsigned int grf_reg_count_2:3; unsigned int pad1:2; unsigned int kernel_start_pointer_2:26; } wm9; struct { unsigned int pad0:1; unsigned int grf_reg_count_3:3; unsigned int pad1:2; unsigned int kernel_start_pointer_3:26; } wm10; }; struct gen5_wm_unit_state_padded { struct gen5_wm_unit_state state; char pad[64 - sizeof(struct gen5_wm_unit_state)]; }; /* The hardware supports two different modes for border color. The * default (OpenGL) mode uses floating-point color channels, while the * legacy mode uses 4 bytes. * * More significantly, the legacy mode respects the components of the * border color for channels not present in the source, (whereas the * default mode will ignore the border color's alpha channel and use * alpha==1 for an RGB source, for example). * * The legacy mode matches the semantics specified by the Render * extension. */ struct gen5_sampler_default_border_color { float color[4]; }; struct gen5_sampler_legacy_border_color { uint8_t color[4]; }; struct gen5_sampler_state { struct { unsigned int shadow_function:3; unsigned int lod_bias:11; unsigned int min_filter:3; unsigned int mag_filter:3; unsigned int mip_filter:2; unsigned int base_level:5; unsigned int pad:1; unsigned int lod_preclamp:1; unsigned int border_color_mode:1; unsigned int pad0:1; unsigned int disable:1; } ss0; struct { unsigned int r_wrap_mode:3; unsigned int t_wrap_mode:3; unsigned int s_wrap_mode:3; unsigned int pad:3; unsigned int max_lod:10; unsigned int min_lod:10; } ss1; struct { unsigned int pad:5; unsigned int border_color_pointer:27; } ss2; struct { uint32_t pad:13; uint32_t address_round:6; uint32_t max_aniso:3; uint32_t chroma_key_mode:1; uint32_t chroma_key_index:2; uint32_t chroma_key_enable:1; uint32_t mbz:6; } ss3; }; struct gen5_clipper_viewport { float xmin; float xmax; float ymin; float ymax; }; struct gen5_cc_viewport { float min_depth; float max_depth; }; struct gen5_sf_viewport { struct { float m00; float m11; float m22; float m30; float m31; float m32; } viewport; struct { short xmin; short ymin; short xmax; short ymax; } scissor; }; /* Documented in the subsystem/shared-functions/sampler chapter... */ struct gen5_surface_state { struct { unsigned int cube_pos_z:1; unsigned int cube_neg_z:1; unsigned int cube_pos_y:1; unsigned int cube_neg_y:1; unsigned int cube_pos_x:1; unsigned int cube_neg_x:1; unsigned int pad:3; unsigned int render_cache_read_mode:1; unsigned int mipmap_layout_mode:1; unsigned int vert_line_stride_ofs:1; unsigned int vert_line_stride:1; unsigned int color_blend:1; unsigned int writedisable_blue:1; unsigned int writedisable_green:1; unsigned int writedisable_red:1; unsigned int writedisable_alpha:1; unsigned int surface_format:9; unsigned int data_return_format:1; unsigned int pad0:1; unsigned int surface_type:3; } ss0; struct { unsigned int base_addr; } ss1; struct { unsigned int render_target_rotation:2; unsigned int mip_count:4; unsigned int width:13; unsigned int height:13; } ss2; struct { unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int pad:1; unsigned int pitch:18; unsigned int depth:11; } ss3; struct { unsigned int pad:19; unsigned int min_array_elt:9; unsigned int min_lod:4; } ss4; struct { unsigned int pad:20; unsigned int y_offset:4; unsigned int pad2:1; unsigned int x_offset:7; } ss5; }; /* Surface state DW0 */ #define GEN5_SURFACE_RC_READ_WRITE (1 << 8) #define GEN5_SURFACE_MIPLAYOUT_SHIFT 10 #define GEN5_SURFACE_MIPMAPLAYOUT_BELOW 0 #define GEN5_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define GEN5_SURFACE_CUBEFACE_ENABLES 0x3f #define GEN5_SURFACE_BLEND_ENABLED (1 << 13) #define GEN5_SURFACE_WRITEDISABLE_B_SHIFT 14 #define GEN5_SURFACE_WRITEDISABLE_G_SHIFT 15 #define GEN5_SURFACE_WRITEDISABLE_R_SHIFT 16 #define GEN5_SURFACE_WRITEDISABLE_A_SHIFT 17 #define GEN5_SURFACE_FORMAT_SHIFT 18 #define GEN5_SURFACE_FORMAT_MASK INTEL_MASK(26, 18) #define GEN5_SURFACE_TYPE_SHIFT 29 #define GEN5_SURFACE_TYPE_MASK GEN5_MASK(31, 29) #define GEN5_SURFACE_1D 0 #define GEN5_SURFACE_2D 1 #define GEN5_SURFACE_3D 2 #define GEN5_SURFACE_CUBE 3 #define GEN5_SURFACE_BUFFER 4 #define GEN5_SURFACE_NULL 7 /* Surface state DW2 */ #define GEN5_SURFACE_HEIGHT_SHIFT 19 #define GEN5_SURFACE_HEIGHT_MASK GEN5_MASK(31, 19) #define GEN5_SURFACE_WIDTH_SHIFT 6 #define GEN5_SURFACE_WIDTH_MASK GEN5_MASK(18, 6) #define GEN5_SURFACE_LOD_SHIFT 2 #define GEN5_SURFACE_LOD_MASK GEN5_MASK(5, 2) /* Surface state DW3 */ #define GEN5_SURFACE_DEPTH_SHIFT 21 #define GEN5_SURFACE_DEPTH_MASK GEN5_MASK(31, 21) #define GEN5_SURFACE_PITCH_SHIFT 3 #define GEN5_SURFACE_PITCH_MASK GEN5_MASK(19, 3) #define GEN5_SURFACE_TILED (1 << 1) #define GEN5_SURFACE_TILED_Y (1 << 0) /* Surface state DW4 */ #define GEN5_SURFACE_MIN_LOD_SHIFT 28 #define GEN5_SURFACE_MIN_LOD_MASK GEN5_MASK(31, 28) /* Surface state DW5 */ #define GEN5_SURFACE_X_OFFSET_SHIFT 25 #define GEN5_SURFACE_X_OFFSET_MASK GEN5_MASK(31, 25) #define GEN5_SURFACE_Y_OFFSET_SHIFT 20 #define GEN5_SURFACE_Y_OFFSET_MASK GEN5_MASK(23, 20) struct gen5_vertex_buffer_state { struct { unsigned int pitch:11; unsigned int pad:15; unsigned int access_type:1; unsigned int vb_index:5; } vb0; unsigned int start_addr; unsigned int max_index; #if 1 unsigned int instance_data_step_rate; /* not included for sequential/random vertices? */ #endif }; #define GEN5_VBP_MAX 17 struct gen5_vb_array_state { struct header header; struct gen5_vertex_buffer_state vb[GEN5_VBP_MAX]; }; struct gen5_vertex_element_state { struct { unsigned int src_offset:11; unsigned int pad:5; unsigned int src_format:9; unsigned int pad0:1; unsigned int valid:1; unsigned int vertex_buffer_index:5; } ve0; struct { unsigned int dst_offset:8; unsigned int pad:8; unsigned int vfcomponent3:4; unsigned int vfcomponent2:4; unsigned int vfcomponent1:4; unsigned int vfcomponent0:4; } ve1; }; #define GEN5_VEP_MAX 18 struct gen5_vertex_element_packet { struct header header; struct gen5_vertex_element_state ve[GEN5_VEP_MAX]; /* note: less than _TNL_ATTRIB_MAX */ }; struct gen5_urb_immediate { unsigned int opcode:4; unsigned int offset:6; unsigned int swizzle_control:2; unsigned int pad:1; unsigned int allocate:1; unsigned int used:1; unsigned int complete:1; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; }; /* Instruction format for the execution units: */ struct gen5_instruction { struct { unsigned int opcode:7; unsigned int pad:1; unsigned int access_mode:1; unsigned int mask_control:1; unsigned int dependency_control:2; unsigned int compression_control:2; unsigned int thread_control:2; unsigned int predicate_control:4; unsigned int predicate_inverse:1; unsigned int execution_size:3; unsigned int destreg__conditonalmod:4; /* destreg - send, conditionalmod - others */ unsigned int pad0:2; unsigned int debug_control:1; unsigned int saturate:1; } header; union { struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int src1_reg_file:2; unsigned int src1_reg_type:3; unsigned int pad:1; unsigned int dest_subreg_nr:5; unsigned int dest_reg_nr:8; unsigned int dest_horiz_stride:2; unsigned int dest_address_mode:1; } da1; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int pad:6; int dest_indirect_offset:10; /* offset against the deref'd address reg */ unsigned int dest_subreg_nr:3; /* subnr for the address reg a0.x */ unsigned int dest_horiz_stride:2; unsigned int dest_address_mode:1; } ia1; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int src1_reg_file:2; unsigned int src1_reg_type:3; unsigned int pad0:1; unsigned int dest_writemask:4; unsigned int dest_subreg_nr:1; unsigned int dest_reg_nr:8; unsigned int pad1:2; unsigned int dest_address_mode:1; } da16; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int pad0:6; unsigned int dest_writemask:4; int dest_indirect_offset:6; unsigned int dest_subreg_nr:3; unsigned int pad1:2; unsigned int dest_address_mode:1; } ia16; } bits1; union { struct { unsigned int src0_subreg_nr:5; unsigned int src0_reg_nr:8; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_horiz_stride:2; unsigned int src0_width:3; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad:6; } da1; struct { int src0_indirect_offset:10; unsigned int src0_subreg_nr:3; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_horiz_stride:2; unsigned int src0_width:3; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad:6; } ia1; struct { unsigned int src0_swz_x:2; unsigned int src0_swz_y:2; unsigned int src0_subreg_nr:1; unsigned int src0_reg_nr:8; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_swz_z:2; unsigned int src0_swz_w:2; unsigned int pad0:1; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } da16; struct { unsigned int src0_swz_x:2; unsigned int src0_swz_y:2; int src0_indirect_offset:6; unsigned int src0_subreg_nr:3; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_swz_z:2; unsigned int src0_swz_w:2; unsigned int pad0:1; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } ia16; } bits2; union { struct { unsigned int src1_subreg_nr:5; unsigned int src1_reg_nr:8; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad:1; unsigned int src1_horiz_stride:2; unsigned int src1_width:3; unsigned int src1_vert_stride:4; unsigned int pad0:7; } da1; struct { unsigned int src1_swz_x:2; unsigned int src1_swz_y:2; unsigned int src1_subreg_nr:1; unsigned int src1_reg_nr:8; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_swz_z:2; unsigned int src1_swz_w:2; unsigned int pad1:1; unsigned int src1_vert_stride:4; unsigned int pad2:7; } da16; struct { int src1_indirect_offset:10; unsigned int src1_subreg_nr:3; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_horiz_stride:2; unsigned int src1_width:3; unsigned int src1_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } ia1; struct { unsigned int src1_swz_x:2; unsigned int src1_swz_y:2; int src1_indirect_offset:6; unsigned int src1_subreg_nr:3; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_swz_z:2; unsigned int src1_swz_w:2; unsigned int pad1:1; unsigned int src1_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad2:6; } ia16; struct { int jump_count:16; /* note: signed */ unsigned int pop_count:4; unsigned int pad0:12; } if_else; struct { unsigned int function:4; unsigned int int_type:1; unsigned int precision:1; unsigned int saturate:1; unsigned int data_type:1; unsigned int pad0:8; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } math; struct { unsigned int binding_table_index:8; unsigned int sampler:4; unsigned int return_format:2; unsigned int msg_type:2; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } sampler; struct gen5_urb_immediate urb; struct { unsigned int binding_table_index:8; unsigned int msg_control:4; unsigned int msg_type:2; unsigned int target_cache:2; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } dp_read; struct { unsigned int binding_table_index:8; unsigned int msg_control:3; unsigned int pixel_scoreboard_clear:1; unsigned int msg_type:3; unsigned int send_commit_msg:1; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } dp_write; struct { unsigned int pad:16; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } generic; unsigned int ud; } bits3; }; /* media pipeline */ struct gen5_vfe_state { struct { unsigned int per_thread_scratch_space:4; unsigned int pad3:3; unsigned int extend_vfe_state_present:1; unsigned int pad2:2; unsigned int scratch_base:22; } vfe0; struct { unsigned int debug_counter_control:2; unsigned int children_present:1; unsigned int vfe_mode:4; unsigned int pad2:2; unsigned int num_urb_entries:7; unsigned int urb_entry_alloc_size:9; unsigned int max_threads:7; } vfe1; struct { unsigned int pad4:4; unsigned int interface_descriptor_base:28; } vfe2; }; struct gen5_vld_state { struct { unsigned int pad6:6; unsigned int scan_order:1; unsigned int intra_vlc_format:1; unsigned int quantizer_scale_type:1; unsigned int concealment_motion_vector:1; unsigned int frame_predict_frame_dct:1; unsigned int top_field_first:1; unsigned int picture_structure:2; unsigned int intra_dc_precision:2; unsigned int f_code_0_0:4; unsigned int f_code_0_1:4; unsigned int f_code_1_0:4; unsigned int f_code_1_1:4; } vld0; struct { unsigned int pad2:9; unsigned int picture_coding_type:2; unsigned int pad:21; } vld1; struct { unsigned int index_0:4; unsigned int index_1:4; unsigned int index_2:4; unsigned int index_3:4; unsigned int index_4:4; unsigned int index_5:4; unsigned int index_6:4; unsigned int index_7:4; } desc_remap_table0; struct { unsigned int index_8:4; unsigned int index_9:4; unsigned int index_10:4; unsigned int index_11:4; unsigned int index_12:4; unsigned int index_13:4; unsigned int index_14:4; unsigned int index_15:4; } desc_remap_table1; }; struct gen5_interface_descriptor { struct { unsigned int grf_reg_blocks:4; unsigned int pad:2; unsigned int kernel_start_pointer:26; } desc0; struct { unsigned int pad:7; unsigned int software_exception:1; unsigned int pad2:3; unsigned int maskstack_exception:1; unsigned int pad3:1; unsigned int illegal_opcode_exception:1; unsigned int pad4:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int single_program_flow:1; unsigned int pad5:1; unsigned int const_urb_entry_read_offset:6; unsigned int const_urb_entry_read_len:6; } desc1; struct { unsigned int pad:2; unsigned int sampler_count:3; unsigned int sampler_state_pointer:27; } desc2; struct { unsigned int binding_table_entry_count:5; unsigned int binding_table_pointer:27; } desc3; }; struct gen6_blend_state { struct { unsigned int dest_blend_factor:5; unsigned int source_blend_factor:5; unsigned int pad3:1; unsigned int blend_func:3; unsigned int pad2:1; unsigned int ia_dest_blend_factor:5; unsigned int ia_source_blend_factor:5; unsigned int pad1:1; unsigned int ia_blend_func:3; unsigned int pad0:1; unsigned int ia_blend_enable:1; unsigned int blend_enable:1; } blend0; struct { unsigned int post_blend_clamp_enable:1; unsigned int pre_blend_clamp_enable:1; unsigned int clamp_range:2; unsigned int pad0:4; unsigned int x_dither_offset:2; unsigned int y_dither_offset:2; unsigned int dither_enable:1; unsigned int alpha_test_func:3; unsigned int alpha_test_enable:1; unsigned int pad1:1; unsigned int logic_op_func:4; unsigned int logic_op_enable:1; unsigned int pad2:1; unsigned int write_disable_b:1; unsigned int write_disable_g:1; unsigned int write_disable_r:1; unsigned int write_disable_a:1; unsigned int pad3:1; unsigned int alpha_to_coverage_dither:1; unsigned int alpha_to_one:1; unsigned int alpha_to_coverage:1; } blend1; }; struct gen6_color_calc_state { struct { unsigned int alpha_test_format:1; unsigned int pad0:14; unsigned int round_disable:1; unsigned int bf_stencil_ref:8; unsigned int stencil_ref:8; } cc0; union { float alpha_ref_f; struct { unsigned int ui:8; unsigned int pad0:24; } alpha_ref_fi; } cc1; float constant_r; float constant_g; float constant_b; float constant_a; }; struct gen6_depth_stencil_state { struct { unsigned int pad0:3; unsigned int bf_stencil_pass_depth_pass_op:3; unsigned int bf_stencil_pass_depth_fail_op:3; unsigned int bf_stencil_fail_op:3; unsigned int bf_stencil_func:3; unsigned int bf_stencil_enable:1; unsigned int pad1:2; unsigned int stencil_write_enable:1; unsigned int stencil_pass_depth_pass_op:3; unsigned int stencil_pass_depth_fail_op:3; unsigned int stencil_fail_op:3; unsigned int stencil_func:3; unsigned int stencil_enable:1; } ds0; struct { unsigned int bf_stencil_write_mask:8; unsigned int bf_stencil_test_mask:8; unsigned int stencil_write_mask:8; unsigned int stencil_test_mask:8; } ds1; struct { unsigned int pad0:26; unsigned int depth_write_enable:1; unsigned int depth_test_func:3; unsigned int pad1:1; unsigned int depth_test_enable:1; } ds2; }; typedef enum { SAMPLER_FILTER_NEAREST = 0, SAMPLER_FILTER_BILINEAR, FILTER_COUNT } sampler_filter_t; typedef enum { SAMPLER_EXTEND_NONE = 0, SAMPLER_EXTEND_REPEAT, SAMPLER_EXTEND_PAD, SAMPLER_EXTEND_REFLECT, EXTEND_COUNT } sampler_extend_t; typedef enum { WM_KERNEL = 0, WM_KERNEL_P, WM_KERNEL_MASK, WM_KERNEL_MASK_P, WM_KERNEL_MASKCA, WM_KERNEL_MASKCA_P, WM_KERNEL_MASKSA, WM_KERNEL_MASKSA_P, WM_KERNEL_OPACITY, WM_KERNEL_OPACITY_P, WM_KERNEL_VIDEO_PLANAR, WM_KERNEL_VIDEO_PACKED, KERNEL_COUNT } wm_kernel_t; #endif xf86-video-intel-2.99.917/src/sna/sna_driver.c0000664000175000017500000010413512442320613015600 00000000000000/************************************************************************** Copyright 2001 VA Linux Systems Inc., Fremont, California. Copyright © 2002 by David Dawes All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation on the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * Authors: Jeff Hartmann * Abraham van der Merwe * David Dawes * Alan Hourihane */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include "sna.h" #include "sna_module.h" #include "sna_video.h" #include "intel_driver.h" #include "intel_options.h" #include #include #include #include #include #include #include #include #include "i915_drm.h" #ifdef HAVE_VALGRIND #include #include #endif #if HAVE_DOT_GIT #include "git_version.h" #endif #ifdef TEARFREE #define ENABLE_TEAR_FREE TRUE #else #define ENABLE_TEAR_FREE FALSE #endif DevPrivateKeyRec sna_pixmap_key; DevPrivateKeyRec sna_gc_key; DevPrivateKeyRec sna_window_key; DevPrivateKeyRec sna_glyph_key; DevPrivateKeyRec sna_client_key; static void sna_load_palette(ScrnInfoPtr scrn, int numColors, int *indices, LOCO * colors, VisualPtr pVisual) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); int p, n, i, j; uint16_t lut_r[256], lut_g[256], lut_b[256]; DBG(("%s\n", __FUNCTION__)); for (p = 0; p < xf86_config->num_crtc; p++) { xf86CrtcPtr crtc = xf86_config->crtc[p]; #define C(I,RGB) (colors[I].RGB << 8 | colors[I].RGB) switch (scrn->depth) { case 15: for (n = 0; n < numColors; n++) { i = indices[n]; for (j = 0; j < 8; j++) { lut_r[8*i + j] = C(i, red); lut_g[8*i + j] = C(i, green); lut_b[8*i + j] = C(i, blue); } } break; case 16: for (n = 0; n < numColors; n++) { i = indices[n]; if (i <= 31) { for (j = 0; j < 8; j++) { lut_r[8*i + j] = C(i, red); lut_b[8*i + j] = C(i, blue); } } for (j = 0; j < 4; j++) lut_g[4*i + j] = C(i, green); } break; default: for (n = 0; n < numColors; n++) { i = indices[n]; lut_r[i] = C(i, red); lut_g[i] = C(i, green); lut_b[i] = C(i, blue); } break; } #undef C /* Make the change through RandR */ #ifdef RANDR_12_INTERFACE RRCrtcGammaSet(crtc->randr_crtc, lut_r, lut_g, lut_b); #else crtc->funcs->gamma_set(crtc, lut_r, lut_g, lut_b, 256); #endif } } static void sna_set_fallback_mode(ScrnInfoPtr scrn) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn); xf86OutputPtr output = NULL; xf86CrtcPtr crtc = NULL; int n; if ((unsigned)config->compat_output < config->num_output) { output = config->output[config->compat_output]; crtc = output->crtc; } for (n = 0; n < config->num_output; n++) config->output[n]->crtc = NULL; for (n = 0; n < config->num_crtc; n++) config->crtc[n]->enabled = FALSE; if (output && crtc) { DisplayModePtr mode; output->crtc = crtc; mode = xf86OutputFindClosestMode(output, scrn->currentMode); if (mode && xf86CrtcSetModeTransform(crtc, mode, RR_Rotate_0, NULL, 0, 0)) { crtc->desiredMode = *mode; crtc->desiredMode.prev = crtc->desiredMode.next = NULL; crtc->desiredMode.name = NULL; crtc->desiredMode.PrivSize = 0; crtc->desiredMode.PrivFlags = 0; crtc->desiredMode.Private = NULL; crtc->desiredRotation = RR_Rotate_0; crtc->desiredTransformPresent = FALSE; crtc->desiredX = 0; crtc->desiredY = 0; crtc->enabled = TRUE; } } xf86DisableUnusedFunctions(scrn); #ifdef RANDR_12_INTERFACE if (get_root_window(scrn->pScreen)) xf86RandR12TellChanged(scrn->pScreen); #endif } static Bool sna_set_desired_mode(struct sna *sna) { ScrnInfoPtr scrn = sna->scrn; DBG(("%s\n", __FUNCTION__)); if (!xf86SetDesiredModes(scrn)) { xf86DrvMsg(scrn->scrnIndex, X_WARNING, "failed to restore desired modes on VT switch\n"); sna_set_fallback_mode(scrn); } sna_mode_check(sna); return TRUE; } /** * Adjust the screen pixmap for the current location of the front buffer. * This is done at EnterVT when buffers are bound as long as the resources * have already been created, but the first EnterVT happens before * CreateScreenResources. */ static Bool sna_create_screen_resources(ScreenPtr screen) { struct sna *sna = to_sna_from_screen(screen); PixmapPtr new_front; unsigned hint; DBG(("%s(%dx%d@%d)\n", __FUNCTION__, screen->width, screen->height, screen->rootDepth)); assert(sna->scrn == xf86ScreenToScrn(screen)); assert(sna->scrn->pScreen == screen); /* free the data used during miInitScreen */ free(screen->devPrivate); screen->devPrivate = NULL; sna_accel_create(sna); hint = SNA_CREATE_FB; if (sna->flags & SNA_IS_HOSTED) hint = 0; new_front = screen->CreatePixmap(screen, screen->width, screen->height, screen->rootDepth, hint); if (!new_front) { xf86DrvMsg(screen->myNum, X_ERROR, "[intel] Unable to create front buffer %dx%d at depth %d\n", screen->width, screen->height, screen->rootDepth); return FALSE; } /* Prefer to use the GPU for rendering into the eventual scanout * bo so that we do not unduly stall when it is time to attach * it to the CRTCs. */ (void)sna_pixmap_force_to_gpu(new_front, MOVE_READ | __MOVE_SCANOUT); screen->SetScreenPixmap(new_front); assert(screen->GetScreenPixmap(screen) == new_front); assert(sna->front == new_front); screen->DestroyPixmap(new_front); /* transfer ownership to screen */ sna_mode_set_primary(sna); /* Try to become master and copy the current fbcon before the * actual VT switch. If we fail here, we will try to reset the * mode in the eventual VT switch. This can fail if systemd has * already revoked our KMS privileges, so just carry on regardless, * and hope that everything is sorted after the VT switch. */ if (intel_get_master(sna->dev) == 0) { /* Only preserve the fbcon, not any subsequent server regens */ if (serverGeneration == 1 && (sna->flags & SNA_IS_HOSTED) == 0) sna_copy_fbcon(sna); (void)sna_set_desired_mode(sna); } return TRUE; } static Bool sna_save_screen(ScreenPtr screen, int mode) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); DBG(("%s(mode=%d)\n", __FUNCTION__, mode)); if (!scrn->vtSema) return FALSE; xf86SaveScreen(screen, mode); sna_crtc_config_notify(screen); return TRUE; } static void sna_dpms_set(ScrnInfoPtr scrn, int mode, int flags) { DBG(("%s(mode=%d, flags=%d)\n", __FUNCTION__, mode)); if (!scrn->vtSema) return; xf86DPMSSet(scrn, mode, flags); sna_crtc_config_notify(xf86ScrnToScreen(scrn)); } static void sna_selftest(void) { sna_damage_selftest(); } static bool has_vsync(struct sna *sna) { if (sna->flags & SNA_IS_HOSTED) return false; return true; } static void sna_setup_capabilities(ScrnInfoPtr scrn, int fd) { #if HAS_PIXMAP_SHARING && defined(DRM_CAP_PRIME) uint64_t value; scrn->capabilities = 0; if (drmGetCap(fd, DRM_CAP_PRIME, &value) == 0) { if (value & DRM_PRIME_CAP_EXPORT) scrn->capabilities |= RR_Capability_SourceOutput | RR_Capability_SinkOffload; if (value & DRM_PRIME_CAP_IMPORT) scrn->capabilities |= RR_Capability_SinkOutput; } #endif } static int namecmp(const char *s1, const char *s2) { char c1, c2; if (!s1 || *s1 == 0) { if (!s2 || *s2 == 0) return 0; else return 1; } while (*s1 == '_' || *s1 == ' ' || *s1 == '\t') s1++; while (*s2 == '_' || *s2 == ' ' || *s2 == '\t') s2++; c1 = isupper(*s1) ? tolower(*s1) : *s1; c2 = isupper(*s2) ? tolower(*s2) : *s2; while (c1 == c2) { if (c1 == '\0') return 0; s1++; while (*s1 == '_' || *s1 == ' ' || *s1 == '\t') s1++; s2++; while (*s2 == '_' || *s2 == ' ' || *s2 == '\t') s2++; c1 = isupper(*s1) ? tolower(*s1) : *s1; c2 = isupper(*s2) ? tolower(*s2) : *s2; } return c1 - c2; } static Bool sna_option_cast_to_bool(struct sna *sna, int id, Bool val) { const char *str = xf86GetOptValString(sna->Options, id); if (str == NULL) return val; if (*str == '\0') return TRUE; if (namecmp(str, "1") == 0) return TRUE; if (namecmp(str, "on") == 0) return TRUE; if (namecmp(str, "true") == 0) return TRUE; if (namecmp(str, "yes") == 0) return TRUE; if (namecmp(str, "0") == 0) return FALSE; if (namecmp(str, "off") == 0) return FALSE; if (namecmp(str, "false") == 0) return FALSE; if (namecmp(str, "no") == 0) return FALSE; return val; } static unsigned sna_option_cast_to_unsigned(struct sna *sna, int id, unsigned val) { const char *str = xf86GetOptValString(sna->Options, id); unsigned v; if (str == NULL || *str == '\0') return val; if (namecmp(str, "on") == 0) return val; if (namecmp(str, "true") == 0) return val; if (namecmp(str, "yes") == 0) return val; if (namecmp(str, "0") == 0) return 0; if (namecmp(str, "off") == 0) return 0; if (namecmp(str, "false") == 0) return 0; if (namecmp(str, "no") == 0) return 0; v = atoi(str); if (v) return v; return val; } static Bool fb_supports_depth(int fd, int depth) { struct drm_i915_gem_create create; struct drm_mode_fb_cmd fb; struct drm_mode_card_res res; Bool ret; memset(&res, 0, sizeof(res)); (void)drmIoctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res); if (res.count_crtcs == 0) return TRUE; VG_CLEAR(create); create.handle = 0; create.size = 4096; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create)) return FALSE; VG_CLEAR(fb); fb.width = 64; fb.height = 16; fb.pitch = 256; fb.bpp = depth <= 8 ? 8 : depth <= 16 ? 16 : 32; fb.depth = depth; fb.handle = create.handle; ret = drmIoctl(fd, DRM_IOCTL_MODE_ADDFB, &fb) == 0; drmModeRmFB(fd, fb.fb_id); (void)drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &create.handle); return ret; } static void setup_dri(struct sna *sna) { unsigned level; sna->dri2.available = false; sna->dri3.available = false; level = sna_option_cast_to_unsigned(sna, OPTION_DRI, ~0); #if HAVE_DRI3 if (level >= 3) sna->dri3.available = !!xf86LoadSubModule(sna->scrn, "dri3"); #endif #if HAVE_DRI2 if (level >= 2) sna->dri2.available = !!xf86LoadSubModule(sna->scrn, "dri2"); #endif } static bool enable_tear_free(struct sna *sna) { if (sna->flags & SNA_LINEAR_FB) return false; /* Under certain conditions, we should enable TearFree by default, * for example when the hardware requires pageflipping to run within * its power/performance budget. */ if (sna_mode_wants_tear_free(sna)) return true; return ENABLE_TEAR_FREE; } static void setup_tear_free(struct sna *sna) { MessageType from; Bool enable; if (sna->flags & SNA_LINEAR_FB) return; if ((sna->flags & SNA_HAS_FLIP) == 0) { from = X_PROBED; goto done; } if (!xf86GetOptValBool(sna->Options, OPTION_TEAR_FREE, &enable)) { enable = enable_tear_free(sna); from = X_DEFAULT; } else from = X_CONFIG; if (enable) sna->flags |= SNA_TEAR_FREE; done: xf86DrvMsg(sna->scrn->scrnIndex, from, "TearFree %sabled\n", sna->flags & SNA_TEAR_FREE ? "en" : "dis"); } /** * This is called before ScreenInit to do any require probing of screen * configuration. * * This code generally covers probing, module loading, option handling * card mapping, and RandR setup. * * Since xf86InitialConfiguration ends up requiring that we set video modes * in order to detect configuration, we end up having to do a lot of driver * setup (talking to the DRM, mapping the device, etc.) in this function. * As a result, we want to set up that server initialization once rather * that doing it per generation. */ static Bool sna_pre_init(ScrnInfoPtr scrn, int probe) { struct sna *sna; char buf[1024]; rgb defaultWeight = { 0, 0, 0 }; EntityInfoPtr pEnt; Gamma zeros = { 0.0, 0.0, 0.0 }; int fd; DBG(("%s flags=%x, numEntities=%d\n", __FUNCTION__, probe, scrn->numEntities)); if (scrn->numEntities != 1) return FALSE; pEnt = xf86GetEntityInfo(scrn->entityList[0]); if (pEnt == NULL) { ERR(("%s: no EntityInfo found for scrn\n", __FUNCTION__)); return FALSE; } if (pEnt->location.type != BUS_PCI #ifdef XSERVER_PLATFORM_BUS && pEnt->location.type != BUS_PLATFORM #endif ) { ERR(("%s: invalid EntityInfo found for scrn, location=%d\n", __FUNCTION__, pEnt->location.type)); return FALSE; } if (probe & PROBE_DETECT) return TRUE; sna_selftest(); probe = 0; if (((uintptr_t)scrn->driverPrivate) & 3) { if (posix_memalign((void **)&sna, 4096, sizeof(*sna))) return FALSE; memset(sna, 0, sizeof(*sna)); /* should be unnecessary */ probe = (uintptr_t)scrn->driverPrivate & 1; sna->info = (void *)((uintptr_t)scrn->driverPrivate & ~3); scrn->driverPrivate = sna; sna->cpu_features = sna_cpu_detect(); sna->acpi.fd = sna_acpi_open(); } sna = to_sna(scrn); sna->scrn = scrn; sna->pEnt = pEnt; sna->flags = probe; scrn->displayWidth = 640; /* default it */ scrn->monitor = scrn->confScreen->monitor; scrn->progClock = TRUE; scrn->rgbBits = 8; sna->dev = intel_get_device(scrn, &fd); if (sna->dev == NULL) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Failed to claim DRM device.\n"); goto cleanup; } /* Sanity check */ if (hosted() && (sna->flags & SNA_IS_HOSTED) == 0) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Failed to setup hosted device.\n"); goto cleanup; } intel_detect_chipset(scrn, sna->dev); xf86DrvMsg(scrn->scrnIndex, X_PROBED, "CPU: %s\n", sna_cpu_features_to_string(sna->cpu_features, buf)); if (!xf86SetDepthBpp(scrn, 24, 0, 0, Support32bppFb | SupportConvert24to32 | PreferConvert24to32)) goto cleanup; switch (scrn->depth) { case 8: case 15: case 16: case 24: case 30: if ((sna->flags & SNA_IS_HOSTED) || fb_supports_depth(fd, scrn->depth)) break; default: xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Given depth (%d) is not supported by the Intel driver and this chipset.\n", scrn->depth); goto cleanup; } xf86PrintDepthBpp(scrn); if (!xf86SetWeight(scrn, defaultWeight, defaultWeight)) goto cleanup; if (!xf86SetDefaultVisual(scrn, -1)) goto cleanup; sna->Options = intel_options_get(scrn); if (sna->Options == NULL) goto cleanup; sna_setup_capabilities(scrn, fd); kgem_init(&sna->kgem, fd, xf86GetPciInfoForEntity(pEnt->index), sna->info->gen); if (xf86ReturnOptValBool(sna->Options, OPTION_ACCEL_DISABLE, FALSE) || !sna_option_cast_to_bool(sna, OPTION_ACCEL_METHOD, TRUE)) { xf86DrvMsg(sna->scrn->scrnIndex, X_CONFIG, "Disabling hardware acceleration.\n"); sna->kgem.wedged = true; } if (xf86ReturnOptValBool(sna->Options, OPTION_TILING_FB, FALSE)) sna->flags |= SNA_LINEAR_FB; if (xf86ReturnOptValBool(sna->Options, OPTION_DELETE_DP12, FALSE)) sna->flags |= SNA_REMOVE_OUTPUTS; if (!xf86ReturnOptValBool(sna->Options, OPTION_SWAPBUFFERS_WAIT, TRUE)) sna->flags |= SNA_NO_WAIT; DBG(("%s: swapbuffer wait? %s\n", __FUNCTION__, sna->flags & SNA_NO_WAIT ? "disabled" : "enabled")); if (!has_vsync(sna) || !xf86ReturnOptValBool(sna->Options, OPTION_VSYNC, TRUE)) sna->flags |= SNA_NO_VSYNC; DBG(("%s: vsync? %s\n", __FUNCTION__, sna->flags & SNA_NO_VSYNC ? "disabled" : "enabled")); if (sna->flags & SNA_IS_HOSTED || !xf86ReturnOptValBool(sna->Options, OPTION_PAGEFLIP, TRUE)) sna->flags |= SNA_NO_FLIP; DBG(("%s: page flips? %s\n", __FUNCTION__, sna->flags & SNA_NO_FLIP ? "disabled" : "enabled")); if ((sna->flags & (SNA_NO_VSYNC | SNA_NO_FLIP | SNA_NO_WAIT)) == 0 && xf86ReturnOptValBool(sna->Options, OPTION_TRIPLE_BUFFER, TRUE)) sna->flags |= SNA_TRIPLE_BUFFER; DBG(("%s: triple buffer? %s\n", __FUNCTION__, sna->flags & SNA_TRIPLE_BUFFER ? "enabled" : "disabled")); if (xf86ReturnOptValBool(sna->Options, OPTION_CRTC_PIXMAPS, FALSE)) { xf86DrvMsg(scrn->scrnIndex, X_CONFIG, "Forcing per-crtc-pixmaps.\n"); sna->flags |= SNA_FORCE_SHADOW; } if (!sna_mode_pre_init(scrn, sna)) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "No outputs and no modes.\n"); goto cleanup; } scrn->currentMode = scrn->modes; setup_tear_free(sna); xf86SetGamma(scrn, zeros); xf86SetDpi(scrn, 0, 0); setup_dri(sna); sna->present.available = false; if (xf86ReturnOptValBool(sna->Options, OPTION_PRESENT, TRUE)) { #if HAVE_PRESENT sna->present.available = !!xf86LoadSubModule(scrn, "present"); #endif } sna_acpi_init(sna); return TRUE; cleanup: scrn->driverPrivate = (void *)((uintptr_t)sna->info | (sna->flags & SNA_IS_SLAVED) | 2); if (sna->dev) intel_put_device(sna->dev); free(sna); return FALSE; } static bool has_shadow(struct sna *sna) { if (!sna->mode.shadow_damage) return false; if (RegionNil(DamageRegion(sna->mode.shadow_damage))) return false; return sna->mode.flip_active == 0; } static void sna_block_handler(BLOCKHANDLER_ARGS_DECL) { #ifndef XF86_SCRN_INTERFACE struct sna *sna = to_sna(xf86Screens[arg]); #else struct sna *sna = to_sna_from_screen(arg); #endif struct timeval **tv = timeout; DBG(("%s (tv=%ld.%06ld)\n", __FUNCTION__, *tv ? (*tv)->tv_sec : -1, *tv ? (*tv)->tv_usec : 0)); sna->BlockHandler(BLOCKHANDLER_ARGS); if (*tv == NULL || ((*tv)->tv_usec | (*tv)->tv_sec) || has_shadow(sna)) sna_accel_block_handler(sna, tv); } static void sna_wakeup_handler(WAKEUPHANDLER_ARGS_DECL) { #ifndef XF86_SCRN_INTERFACE struct sna *sna = to_sna(xf86Screens[arg]); #else struct sna *sna = to_sna_from_screen(arg); #endif DBG(("%s\n", __FUNCTION__)); /* despite all appearances, result is just a signed int */ if ((int)result < 0) return; sna_acpi_wakeup(sna, read_mask); sna->WakeupHandler(WAKEUPHANDLER_ARGS); sna_accel_wakeup_handler(sna); if (FD_ISSET(sna->kgem.fd, (fd_set*)read_mask)) { sna_mode_wakeup(sna); /* Clear the flag so that subsequent ZaphodHeads don't block */ FD_CLR(sna->kgem.fd, (fd_set*)read_mask); } } #if HAVE_UDEV static void sna_handle_uevents(int fd, void *closure) { struct sna *sna = closure; struct udev_device *dev; const char *str; struct stat s; dev_t udev_devnum; DBG(("%s\n", __FUNCTION__)); dev = udev_monitor_receive_device(sna->uevent_monitor); if (!dev) return; udev_devnum = udev_device_get_devnum(dev); if (fstat(sna->kgem.fd, &s) || memcmp(&s.st_rdev, &udev_devnum, sizeof (dev_t))) { udev_device_unref(dev); return; } str = udev_device_get_property_value(dev, "HOTPLUG"); if (str && atoi(str) == 1) { ScrnInfoPtr scrn = sna->scrn; DBG(("%s: hotplug event (vtSema?=%d)\n", __FUNCTION__, scrn->vtSema)); if (scrn->vtSema) { sna_mode_discover(sna); sna_mode_check(sna); RRGetInfo(xf86ScrnToScreen(scrn), TRUE); } else sna->flags |= SNA_REPROBE; } udev_device_unref(dev); } static void sna_uevent_init(struct sna *sna) { struct udev *u; struct udev_monitor *mon; MessageType from = X_CONFIG; if (sna->flags & SNA_IS_HOSTED) return; DBG(("%s\n", __FUNCTION__)); /* RandR will be disabled if Xinerama is active, and so generating * RR hotplug events is then verboten. */ if (!dixPrivateKeyRegistered(rrPrivKey)) goto out; u = NULL; if (xf86ReturnOptValBool(sna->Options, OPTION_HOTPLUG, TRUE)) u = udev_new(); if (!u) goto out; from = X_DEFAULT; mon = udev_monitor_new_from_netlink(u, "udev"); if (!mon) goto err_dev; if (udev_monitor_filter_add_match_subsystem_devtype(mon, "drm", "drm_minor") < 0) goto err_monitor; if (udev_monitor_enable_receiving(mon) < 0) goto err_monitor; sna->uevent_handler = xf86AddGeneralHandler(udev_monitor_get_fd(mon), sna_handle_uevents, sna); if (!sna->uevent_handler) goto err_monitor; sna->uevent_monitor = mon; out: xf86DrvMsg(sna->scrn->scrnIndex, from, "display hotplug detection %s\n", sna->uevent_monitor ? "enabled" : "disabled"); return; err_monitor: udev_monitor_unref(mon); err_dev: udev_unref(u); goto out; } static bool sna_uevent_poll(struct sna *sna) { struct pollfd pfd; if (sna->uevent_monitor == NULL) return false; pfd.fd = udev_monitor_get_fd(sna->uevent_monitor); pfd.events = POLLIN; while (poll(&pfd, 1, 0) > 0) sna_handle_uevents(pfd.fd, sna); return true; } static void sna_uevent_fini(struct sna *sna) { struct udev *u; if (sna->uevent_handler == NULL) return; xf86RemoveGeneralHandler(sna->uevent_handler); u = udev_monitor_get_udev(sna->uevent_monitor); udev_monitor_unref(sna->uevent_monitor); udev_unref(u); sna->uevent_handler = NULL; sna->uevent_monitor = NULL; DBG(("%s: removed uvent handler\n", __FUNCTION__)); } #else static void sna_uevent_init(struct sna *sna) { } static bool sna_uevent_poll(struct sna *sna) { return false; } static void sna_uevent_fini(struct sna *sna) { } #endif /* HAVE_UDEV */ static Bool sna_randr_getinfo(ScreenPtr screen, Rotation *rotations) { struct sna *sna = to_sna_from_screen(screen); if (!sna_uevent_poll(sna)) sna_mode_discover(sna); return sna->mode.rrGetInfo(screen, rotations); } static void sna_leave_vt(VT_FUNC_ARGS_DECL) { SCRN_INFO_PTR(arg); struct sna *sna = to_sna(scrn); DBG(("%s\n", __FUNCTION__)); sna_accel_leave(sna); sna_mode_reset(sna); if (intel_put_master(sna->dev)) xf86DrvMsg(scrn->scrnIndex, X_WARNING, "drmDropMaster failed: %s\n", strerror(errno)); } static Bool sna_early_close_screen(CLOSE_SCREEN_ARGS_DECL) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); struct sna *sna = to_sna(scrn); DBG(("%s\n", __FUNCTION__)); /* XXX Note that we will leak kernel resources if !vtSema */ sna_uevent_fini(sna); sna_mode_close(sna); if (sna->present.open) { sna_present_close(sna, screen); sna->present.open = false; } if (sna->dri3.open) { sna_dri3_close(sna, screen); sna->dri3.open = false; } if (sna->dri2.open) { sna_dri2_close(sna, screen); sna->dri2.open = false; } if (sna->front) { screen->DestroyPixmap(sna->front); sna->front = NULL; } if (scrn->vtSema) { intel_put_master(sna->dev); scrn->vtSema = FALSE; } return sna->CloseScreen(CLOSE_SCREEN_ARGS); } static Bool sna_late_close_screen(CLOSE_SCREEN_ARGS_DECL) { struct sna *sna = to_sna_from_screen(screen); DepthPtr depths; int d; DBG(("%s\n", __FUNCTION__)); sna_accel_close(sna); sna_video_close(sna); depths = screen->allowedDepths; for (d = 0; d < screen->numDepths; d++) free(depths[d].vids); free(depths); free(screen->visuals); return TRUE; } static Bool sna_register_all_privates(void) { #if HAS_DIXREGISTERPRIVATEKEY if (!dixRegisterPrivateKey(&sna_pixmap_key, PRIVATE_PIXMAP, 3*sizeof(void *))) return FALSE; if (!dixRegisterPrivateKey(&sna_gc_key, PRIVATE_GC, sizeof(FbGCPrivate))) return FALSE; if (!dixRegisterPrivateKey(&sna_glyph_key, PRIVATE_GLYPH, sizeof(struct sna_glyph))) return FALSE; if (!dixRegisterPrivateKey(&sna_window_key, PRIVATE_WINDOW, 3*sizeof(void *))) return FALSE; if (!dixRegisterPrivateKey(&sna_client_key, PRIVATE_CLIENT, sizeof(struct sna_client))) return FALSE; #else if (!dixRequestPrivate(&sna_pixmap_key, 3*sizeof(void *))) return FALSE; if (!dixRequestPrivate(&sna_gc_key, sizeof(FbGCPrivate))) return FALSE; if (!dixRequestPrivate(&sna_glyph_key, sizeof(struct sna_glyph))) return FALSE; if (!dixRequestPrivate(&sna_window_key, 3*sizeof(void *))) return FALSE; if (!dixRequestPrivate(&sna_client_key, sizeof(struct sna_client))) return FALSE; #endif return TRUE; } static void sna_dri_init(struct sna *sna, ScreenPtr screen) { char str[128] = ""; if (sna->dri2.available) sna->dri2.open = sna_dri2_open(sna, screen); if (sna->dri2.open) strcat(str, "DRI2 "); if (sna->dri3.available) sna->dri3.open = sna_dri3_open(sna, screen); if (sna->dri3.open) strcat(str, "DRI3 "); if (*str) xf86DrvMsg(sna->scrn->scrnIndex, X_INFO, "direct rendering: %senabled\n", str); } static Bool sna_mode_init(struct sna *sna, ScreenPtr screen) { rrScrPrivPtr rp; if (!xf86CrtcScreenInit(screen)) return FALSE; xf86RandR12SetRotations(screen, RR_Rotate_All | RR_Reflect_All); xf86RandR12SetTransformSupport(screen, TRUE); /* Wrap RR queries to catch pending MST topology changes */ rp = rrGetScrPriv(screen); if (rp) { sna->mode.rrGetInfo = rp->rrGetInfo; rp->rrGetInfo = sna_randr_getinfo; } return TRUE; } static Bool sna_screen_init(SCREEN_INIT_ARGS_DECL) { ScrnInfoPtr scrn = xf86ScreenToScrn(screen); struct sna *sna = to_sna(scrn); VisualPtr visuals; DepthPtr depths; int nvisuals; int ndepths; int rootdepth; VisualID defaultVisual; DBG(("%s\n", __FUNCTION__)); assert(sna->scrn == scrn); assert(scrn->pScreen == NULL); /* set afterwards */ assert(sna->freed_pixmap == NULL); if (!sna_register_all_privates()) return FALSE; scrn->videoRam = sna->kgem.aperture_mappable * 4; /* Page to KiB */ miClearVisualTypes(); if (!miSetVisualTypes(scrn->depth, miGetDefaultVisualMask(scrn->depth), scrn->rgbBits, scrn->defaultVisual)) return FALSE; if (!miSetPixmapDepths()) return FALSE; rootdepth = 0; if (!miInitVisuals(&visuals, &depths, &nvisuals, &ndepths, &rootdepth, &defaultVisual, ((unsigned long)1 << (scrn->bitsPerPixel - 1)), 8, -1)) return FALSE; if (!miScreenInit(screen, NULL, scrn->virtualX, scrn->virtualY, scrn->xDpi, scrn->yDpi, 0, rootdepth, ndepths, depths, defaultVisual, nvisuals, visuals)) return FALSE; if (scrn->bitsPerPixel > 8) { /* Fixup RGB ordering */ VisualPtr visual = screen->visuals + screen->numVisuals; while (--visual >= screen->visuals) { if ((visual->class | DynamicClass) == DirectColor) { visual->offsetRed = scrn->offset.red; visual->offsetGreen = scrn->offset.green; visual->offsetBlue = scrn->offset.blue; visual->redMask = scrn->mask.red; visual->greenMask = scrn->mask.green; visual->blueMask = scrn->mask.blue; } } } assert(screen->CloseScreen == NULL); screen->CloseScreen = sna_late_close_screen; if (!sna_accel_init(screen, sna)) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "Hardware acceleration initialization failed\n"); return FALSE; } xf86SetBlackWhitePixels(screen); xf86SetBackingStore(screen); xf86SetSilkenMouse(screen); if (!miDCInitialize(screen, xf86GetPointerScreenFuncs())) return FALSE; if (sna_cursors_init(screen, sna)) xf86DrvMsg(scrn->scrnIndex, X_INFO, "HW Cursor enabled\n"); /* Must force it before EnterVT, so we are in control of VT and * later memory should be bound when allocating, e.g rotate_mem */ scrn->vtSema = TRUE; sna->BlockHandler = screen->BlockHandler; screen->BlockHandler = sna_block_handler; sna->WakeupHandler = screen->WakeupHandler; screen->WakeupHandler = sna_wakeup_handler; screen->SaveScreen = sna_save_screen; screen->CreateScreenResources = sna_create_screen_resources; sna->CloseScreen = screen->CloseScreen; screen->CloseScreen = sna_early_close_screen; if (!sna_mode_init(sna, screen)) return FALSE; if (!miCreateDefColormap(screen)) return FALSE; if (sna->mode.num_real_crtc && !xf86HandleColormaps(screen, 256, 8, sna_load_palette, NULL, CMAP_RELOAD_ON_MODE_SWITCH | CMAP_PALETTED_TRUECOLOR)) return FALSE; xf86DPMSInit(screen, sna_dpms_set, 0); sna_uevent_init(sna); sna_video_init(sna, screen); sna_dri_init(sna, screen); if (sna->present.available) sna->present.open = sna_present_open(sna, screen); if (sna->present.open) xf86DrvMsg(sna->scrn->scrnIndex, X_INFO, "hardware support for Present enabled\n"); if (serverGeneration == 1) xf86ShowUnusedOptions(scrn->scrnIndex, scrn->options); sna->suspended = FALSE; return TRUE; } static void sna_adjust_frame(ADJUST_FRAME_ARGS_DECL) { SCRN_INFO_PTR(arg); DBG(("%s(%d, %d)\n", __FUNCTION__, x, y)); sna_mode_adjust_frame(to_sna(scrn), x, y); } static void sna_free_screen(FREE_SCREEN_ARGS_DECL) { SCRN_INFO_PTR(arg); struct sna *sna = to_sna(scrn); DBG(("%s [scrn=%p, sna=%p]\n", __FUNCTION__, scrn, sna)); if (sna == NULL || (uintptr_t)sna & 3) /* beware thieves */ return; scrn->driverPrivate = (void *)((uintptr_t)sna->info | (sna->flags & SNA_IS_SLAVED) | 2); sna_mode_fini(sna); sna_acpi_fini(sna); intel_put_device(sna->dev); free(sna); } static Bool sna_enter_vt(VT_FUNC_ARGS_DECL) { SCRN_INFO_PTR(arg); struct sna *sna = to_sna(scrn); DBG(("%s\n", __FUNCTION__)); if (intel_get_master(sna->dev)) return FALSE; if (sna->flags & SNA_REPROBE) { DBG(("%s: reporting deferred hotplug event\n", __FUNCTION__)); sna_mode_discover(sna); RRGetInfo(xf86ScrnToScreen(scrn), TRUE); sna->flags &= ~SNA_REPROBE; } if (!sna_set_desired_mode(sna)) { intel_put_master(sna->dev); return FALSE; } sna_accel_enter(sna); return TRUE; } static Bool sna_switch_mode(SWITCH_MODE_ARGS_DECL) { SCRN_INFO_PTR(arg); DBG(("%s\n", __FUNCTION__)); return xf86SetSingleMode(scrn, mode, RR_Rotate_0); } static ModeStatus sna_valid_mode(SCRN_ARG_TYPE arg, DisplayModePtr mode, Bool verbose, int flags) { return MODE_OK; } #ifndef SUSPEND_SLEEP #define SUSPEND_SLEEP 0 #endif #ifndef RESUME_SLEEP #define RESUME_SLEEP 0 #endif /* * This function is only required if we need to do anything differently from * DoApmEvent() in common/xf86PM.c, including if we want to see events other * than suspend/resume. */ static Bool sna_pm_event(SCRN_ARG_TYPE arg, pmEvent event, Bool undo) { SCRN_INFO_PTR(arg); struct sna *sna = to_sna(scrn); DBG(("%s\n", __FUNCTION__)); switch (event) { case XF86_APM_SYS_SUSPEND: case XF86_APM_CRITICAL_SUSPEND: /*do we want to delay a critical suspend? */ case XF86_APM_USER_SUSPEND: case XF86_APM_SYS_STANDBY: case XF86_APM_USER_STANDBY: if (!undo && !sna->suspended) { scrn->LeaveVT(VT_FUNC_ARGS(0)); sna->suspended = TRUE; sleep(SUSPEND_SLEEP); } else if (undo && sna->suspended) { sleep(RESUME_SLEEP); scrn->EnterVT(VT_FUNC_ARGS(0)); sna->suspended = FALSE; } break; case XF86_APM_STANDBY_RESUME: case XF86_APM_NORMAL_RESUME: case XF86_APM_CRITICAL_RESUME: if (sna->suspended) { sleep(RESUME_SLEEP); scrn->EnterVT(VT_FUNC_ARGS(0)); sna->suspended = FALSE; /* * Turn the screen saver off when resuming. This seems to be * needed to stop xscreensaver kicking in (when used). * * XXX DoApmEvent() should probably call this just like * xf86VTSwitch() does. Maybe do it here only in 4.2 * compatibility mode. */ SaveScreens(SCREEN_SAVER_FORCER, ScreenSaverReset); } break; /* This is currently used for ACPI */ case XF86_APM_CAPABILITY_CHANGED: SaveScreens(SCREEN_SAVER_FORCER, ScreenSaverReset); break; default: ERR(("sna_pm_event: received APM event %d\n", event)); } return TRUE; } static Bool sna_enter_vt__hosted(VT_FUNC_ARGS_DECL) { return TRUE; } static void sna_leave_vt__hosted(VT_FUNC_ARGS_DECL) { } static void describe_kms(ScrnInfoPtr scrn) { int fd = __intel_peek_fd(scrn); drm_version_t version; char name[128] = ""; char date[128] = ""; memset(&version, 0, sizeof(version)); version.name_len = sizeof(name) - 1; version.name = name; version.date_len = sizeof(date) - 1; version.date = date; if (drmIoctl(fd, DRM_IOCTL_VERSION, &version)) return; xf86DrvMsg(scrn->scrnIndex, X_INFO, "Using Kernel Mode Setting driver: %s, version %d.%d.%d %s\n", version.name, version.version_major, version.version_minor, version.version_patchlevel, version.date); } static void describe_sna(ScrnInfoPtr scrn) { #if defined(USE_GIT_DESCRIBE) xf86DrvMsg(scrn->scrnIndex, X_INFO, "SNA compiled from %s\n", git_version); #elif defined(BUILDER_DESCRIPTION) xf86DrvMsg(scrn->scrnIndex, X_INFO, "SNA compiled: %s\n", BUILDER_DESCRIPTION); #endif #if !NDEBUG xf86DrvMsg(scrn->scrnIndex, X_INFO, "SNA compiled with assertions enabled\n"); #endif #if DEBUG_SYNC xf86DrvMsg(scrn->scrnIndex, X_INFO, "SNA compiled with synchronous rendering\n"); #endif #if DEBUG_MEMORY xf86DrvMsg(scrn->scrnIndex, X_INFO, "SNA compiled with memory allocation reporting enabled\n"); #endif #if DEBUG_PIXMAP xf86DrvMsg(scrn->scrnIndex, X_INFO, "SNA compiled with extra pixmap/damage validation\n"); #endif #ifdef HAVE_VALGRIND xf86DrvMsg(scrn->scrnIndex, X_INFO, "SNA compiled for use with valgrind\n"); VALGRIND_PRINTF("SNA compiled for use with valgrind\n"); #endif DBG(("pixman version: %s\n", pixman_version_string())); } Bool sna_init_scrn(ScrnInfoPtr scrn, int entity_num) { DBG(("%s: entity_num=%d\n", __FUNCTION__, entity_num)); describe_kms(scrn); describe_sna(scrn); scrn->PreInit = sna_pre_init; scrn->ScreenInit = sna_screen_init; if (!hosted()) { scrn->SwitchMode = sna_switch_mode; scrn->AdjustFrame = sna_adjust_frame; scrn->EnterVT = sna_enter_vt; scrn->LeaveVT = sna_leave_vt; scrn->ValidMode = sna_valid_mode; scrn->PMEvent = sna_pm_event; } else { scrn->EnterVT = sna_enter_vt__hosted; scrn->LeaveVT = sna_leave_vt__hosted; } scrn->FreeScreen = sna_free_screen; xf86SetEntitySharable(entity_num); xf86SetEntityInstanceForScreen(scrn, entity_num, xf86GetNumEntityInstances(entity_num)-1); sna_threads_init(); return TRUE; } #if HAS_DEBUG_FULL _X_ATTRIBUTE_PRINTF(1, 0) void LogF(const char *f, ...) { va_list ap; /* As we not only may be called from any context, we may also * be called from a thread whilst the main thread is handling * signals, therefore we have to use the signal-safe variants * or else we trip over false positive assertions. */ va_start(ap, f); #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,12,99,901,0) LogVMessageVerbSigSafe(X_NONE, 1, f, ap); #else LogVMessageVerb(X_NONE, 1, f, ap); #endif va_end(ap); } #endif xf86-video-intel-2.99.917/src/sna/sna_video.h0000664000175000017500000001337512432737457015446 00000000000000/*************************************************************************** Copyright 2000 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifndef SNA_VIDEO_H #define SNA_VIDEO_H #include #include #include #if defined(XvMCExtension) && defined(ENABLE_XVMC) #define SNA_XVMC 1 #endif #define FOURCC_XVMC (('C' << 24) + ('M' << 16) + ('V' << 8) + 'X') #define FOURCC_RGB565 ((16 << 24) + ('B' << 16) + ('G' << 8) + 'R') #define FOURCC_RGB888 ((24 << 24) + ('B' << 16) + ('G' << 8) + 'R') /* * Below, a dummy picture type that is used in XvPutImage * only to do an overlay update. * Introduced for the XvMC client lib. * Defined to have a zero data size. */ #define XVMC_YUV { \ FOURCC_XVMC, XvYUV, LSBFirst, \ {'X', 'V', 'M', 'C', 0x00, 0x00, 0x00, 0x10, 0x80, 0x00, 0x00, 0xAA, 0x00, 0x38, 0x9B, 0x71}, \ 12, XvPlanar, 3, 0, 0, 0, 0, 8, 8, 8, 1, 2, 2, 1, 2, 2, \ {'Y', 'V', 'U', 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \ XvTopToBottom \ } #define XVMC_RGB565 { \ FOURCC_RGB565, XvRGB, LSBFirst, \ {'P', 'A', 'S', 'S', 'T', 'H', 'R', 'O', 'U', 'G', 'H', 'R', 'G', 'B', '1', '6'}, \ 16, XvPacked, 1, 16, 0x1f<<11, 0x3f<<5, 0x1f<<0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ {'B', 'G', 'R', 'X', 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \ XvTopToBottom \ } #define XVMC_RGB888 { \ FOURCC_RGB888, XvRGB, LSBFirst, \ {'P', 'A', 'S', 'S', 'T', 'H', 'R', 'O', 'U', 'G', 'H', 'R', 'G', 'B', '2', '4'}, \ 32, XvPacked, 1, 24, 0xff<<16, 0xff<<8, 0xff<<0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ {'B', 'G', 'R', 'X', 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, \ XvTopToBottom \ } struct sna_video { struct sna *sna; int brightness; int contrast; int saturation; xf86CrtcPtr desired_crtc; uint32_t gamma0; uint32_t gamma1; uint32_t gamma2; uint32_t gamma3; uint32_t gamma4; uint32_t gamma5; unsigned color_key; unsigned color_key_changed; bool has_color_key; /** YUV data buffers */ struct kgem_bo *old_buf[2]; struct kgem_bo *buf; int width, height, format; int alignment; bool tiled; bool textured; int plane; struct kgem_bo *bo[4]; RegionRec clip; int SyncToVblank; /* -1: auto, 0: off, 1: on */ int AlwaysOnTop; }; struct sna_video_frame { struct kgem_bo *bo; uint32_t id; uint32_t size; uint32_t UBufOffset; uint32_t VBufOffset; Rotation rotation; uint16_t width, height; uint16_t pitch[2]; /* extents */ BoxRec image; BoxRec src; }; static inline XvScreenPtr to_xv(ScreenPtr screen) { return dixLookupPrivate(&screen->devPrivates, XvGetScreenKey()); } void sna_video_init(struct sna *sna, ScreenPtr screen); void sna_video_overlay_setup(struct sna *sna, ScreenPtr screen); void sna_video_sprite_setup(struct sna *sna, ScreenPtr screen); void sna_video_textured_setup(struct sna *sna, ScreenPtr screen); void sna_video_destroy_window(WindowPtr win); void sna_video_close(struct sna *sna); XvAdaptorPtr sna_xv_adaptor_alloc(struct sna *sna); int sna_xv_fixup_formats(ScreenPtr screen, XvFormatPtr formats, int num_formats); int sna_xv_alloc_port(unsigned long port, XvPortPtr in, XvPortPtr *out); int sna_xv_free_port(XvPortPtr port); static inline int xvmc_passthrough(int id) { switch (id) { case FOURCC_XVMC: case FOURCC_RGB565: case FOURCC_RGB888: return true; default: return false; } } static inline int is_planar_fourcc(int id) { switch (id) { case FOURCC_YV12: case FOURCC_I420: case FOURCC_XVMC: return 1; default: return 0; } } bool sna_video_clip_helper(struct sna_video *video, struct sna_video_frame *frame, xf86CrtcPtr *crtc_ret, BoxPtr dst, short src_x, short src_y, short drw_x, short drw_y, short src_w, short src_h, short drw_w, short drw_h, RegionPtr reg); void sna_video_frame_init(struct sna_video *video, int id, short width, short height, struct sna_video_frame *frame); void sna_video_frame_set_rotation(struct sna_video *video, struct sna_video_frame *frame, Rotation rotation); struct kgem_bo * sna_video_buffer(struct sna_video *video, struct sna_video_frame *frame); bool sna_video_copy_data(struct sna_video *video, struct sna_video_frame *frame, const uint8_t *buf); void sna_video_buffer_fini(struct sna_video *video); void sna_video_free_buffers(struct sna_video *video); static inline XvPortPtr sna_window_get_port(WindowPtr window) { return ((void **)__get_private(window, sna_window_key))[2]; } static inline void sna_window_set_port(WindowPtr window, XvPortPtr port) { ((void **)__get_private(window, sna_window_key))[2] = port; } #endif /* SNA_VIDEO_H */ xf86-video-intel-2.99.917/src/sna/kgem_debug_gen6.c0000664000175000017500000007573212244635610016474 00000000000000/* * Copyright © 2007-2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include "sna.h" #include "sna_reg.h" #include "gen6_render.h" #include "kgem_debug.h" static struct state { struct vertex_buffer { int handle; const char *ptr; int pitch; struct kgem_bo *current; } vb[33]; struct vertex_elements { int buffer; int offset; bool valid; uint32_t type; uint8_t swizzle[4]; } ve[33]; int num_ve; struct dynamic_state { struct kgem_bo *current; void *base, *ptr; } dynamic_state; } state; static void gen6_update_vertex_buffer(struct kgem *kgem, const uint32_t *data) { uint32_t reloc = sizeof(uint32_t) * (&data[1] - kgem->batch); struct kgem_bo *bo = NULL; void *base; int i; for (i = 0; i < kgem->nreloc; i++) if (kgem->reloc[i].offset == reloc) break; assert(i < kgem->nreloc); reloc = kgem->reloc[i].target_handle; if (reloc == -1) { base = kgem->batch; } else { list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->target_handle == reloc) break; assert(&bo->request != &kgem->next_request->buffers); base = kgem_bo_map__debug(kgem, bo); } base = (char *)base + kgem->reloc[i].delta; i = data[0] >> 26; state.vb[i].current = bo; state.vb[i].ptr = base; state.vb[i].pitch = data[0] & 0x7ff; } static void gen6_update_dynamic_buffer(struct kgem *kgem, const uint32_t offset) { uint32_t reloc = sizeof(uint32_t) * offset; struct kgem_bo *bo = NULL; void *base, *ptr; int i; if ((kgem->batch[offset] & 1) == 0) return; for (i = 0; i < kgem->nreloc; i++) if (kgem->reloc[i].offset == reloc) break; if(i < kgem->nreloc) { reloc = kgem->reloc[i].target_handle; if (reloc == 0) { base = kgem->batch; } else { list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->handle == reloc) break; assert(&bo->request != &kgem->next_request->buffers); base = kgem_bo_map__debug(kgem, bo); } ptr = (char *)base + (kgem->reloc[i].delta & ~1); } else { bo = NULL; base = NULL; ptr = NULL; } state.dynamic_state.current = bo; state.dynamic_state.base = base; state.dynamic_state.ptr = ptr; } static uint32_t get_ve_component(uint32_t data, int component) { return (data >> (16 + (3 - component) * 4)) & 0x7; } static void gen6_update_vertex_elements(struct kgem *kgem, int id, const uint32_t *data) { state.ve[id].buffer = data[0] >> 26; state.ve[id].valid = !!(data[0] & (1 << 25)); state.ve[id].type = (data[0] >> 16) & 0x1ff; state.ve[id].offset = data[0] & 0x7ff; state.ve[id].swizzle[0] = get_ve_component(data[1], 0); state.ve[id].swizzle[1] = get_ve_component(data[1], 1); state.ve[id].swizzle[2] = get_ve_component(data[1], 2); state.ve[id].swizzle[3] = get_ve_component(data[1], 3); } static void gen6_update_sf_state(struct kgem *kgem, uint32_t *data) { state.num_ve = 1 + ((data[1] >> 22) & 0x3f); } static void vertices_sint16_out(const struct vertex_elements *ve, const int16_t *v, int max) { int c; ErrorF("("); for (c = 0; c < max; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("%d", v[c]); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } for (; c < 4; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("1.0"); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } ErrorF(")"); } static void vertices_float_out(const struct vertex_elements *ve, const float *f, int max) { int c, o; ErrorF("("); for (c = o = 0; c < 4 && o < max; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("%f", f[o++]); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } for (; c < 4; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("1.0"); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } ErrorF(")"); } static void ve_out(const struct vertex_elements *ve, const void *ptr) { switch (ve->type) { case GEN6_SURFACEFORMAT_R32_FLOAT: vertices_float_out(ve, ptr, 1); break; case GEN6_SURFACEFORMAT_R32G32_FLOAT: vertices_float_out(ve, ptr, 2); break; case GEN6_SURFACEFORMAT_R32G32B32_FLOAT: vertices_float_out(ve, ptr, 3); break; case GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT: vertices_float_out(ve, ptr, 4); break; case GEN6_SURFACEFORMAT_R16_SINT: vertices_sint16_out(ve, ptr, 1); break; case GEN6_SURFACEFORMAT_R16G16_SINT: vertices_sint16_out(ve, ptr, 2); break; case GEN6_SURFACEFORMAT_R16G16B16A16_SINT: vertices_sint16_out(ve, ptr, 4); break; case GEN6_SURFACEFORMAT_R16_SSCALED: vertices_sint16_out(ve, ptr, 1); break; case GEN6_SURFACEFORMAT_R16G16_SSCALED: vertices_sint16_out(ve, ptr, 2); break; case GEN6_SURFACEFORMAT_R16G16B16A16_SSCALED: vertices_sint16_out(ve, ptr, 4); break; } } static void indirect_vertex_out(struct kgem *kgem, uint32_t v) { int i = 1; do { const struct vertex_elements *ve = &state.ve[i]; const struct vertex_buffer *vb = &state.vb[ve->buffer]; const void *ptr = vb->ptr + v * vb->pitch + ve->offset; if (ve->valid) ve_out(ve, ptr); while (++i <= state.num_ve && !state.ve[i].valid) ; if (i <= state.num_ve) ErrorF(", "); } while (i <= state.num_ve); } static void primitive_out(struct kgem *kgem, uint32_t *data) { int n; assert((data[0] & (1<<15)) == 0); /* XXX index buffers */ for (n = 0; n < data[1]; n++) { int v = data[2] + n; ErrorF(" [%d:%d] = ", n, v); indirect_vertex_out(kgem, v); ErrorF("\n"); } } static void finish_state(struct kgem *kgem) { memset(&state, 0, sizeof(state)); } static void state_base_out(uint32_t *data, uint32_t offset, unsigned int index, const char *name) { if (data[index] & 1) kgem_debug_print(data, offset, index, "%s state base address 0x%08x\n", name, data[index] & ~1); else kgem_debug_print(data, offset, index, "%s state base not updated\n", name); } static void state_max_out(uint32_t *data, uint32_t offset, unsigned int index, const char *name) { if (data[index] == 1) kgem_debug_print(data, offset, index, "%s state upper bound disabled\n", name); else if (data[index] & 1) kgem_debug_print(data, offset, index, "%s state upper bound 0x%08x\n", name, data[index] & ~1); else kgem_debug_print(data, offset, index, "%s state upper bound not updated\n", name); } static const char * get_965_surfacetype(unsigned int surfacetype) { switch (surfacetype) { case 0: return "1D"; case 1: return "2D"; case 2: return "3D"; case 3: return "CUBE"; case 4: return "BUFFER"; case 7: return "NULL"; default: return "unknown"; } } static const char * get_965_depthformat(unsigned int depthformat) { switch (depthformat) { case 0: return "s8_z24float"; case 1: return "z32float"; case 2: return "z24s8"; case 5: return "z16"; default: return "unknown"; } } static const char * get_965_element_component(uint32_t data, int component) { uint32_t component_control = (data >> (16 + (3 - component) * 4)) & 0x7; switch (component_control) { case 0: return "nostore"; case 1: switch (component) { case 0: return "X"; case 1: return "Y"; case 2: return "Z"; case 3: return "W"; default: return "fail"; } case 2: return "0.0"; case 3: return "1.0"; case 4: return "0x1"; case 5: return "VID"; default: return "fail"; } } static const char * get_965_prim_type(uint32_t data) { uint32_t primtype = (data >> 10) & 0x1f; switch (primtype) { case 0x01: return "point list"; case 0x02: return "line list"; case 0x03: return "line strip"; case 0x04: return "tri list"; case 0x05: return "tri strip"; case 0x06: return "tri fan"; case 0x07: return "quad list"; case 0x08: return "quad strip"; case 0x09: return "line list adj"; case 0x0a: return "line strip adj"; case 0x0b: return "tri list adj"; case 0x0c: return "tri strip adj"; case 0x0d: return "tri strip reverse"; case 0x0e: return "polygon"; case 0x0f: return "rect list"; case 0x10: return "line loop"; case 0x11: return "point list bf"; case 0x12: return "line strip cont"; case 0x13: return "line strip bf"; case 0x14: return "line strip cont bf"; case 0x15: return "tri fan no stipple"; default: return "fail"; } } struct reloc { struct kgem_bo *bo; void *base; }; static void * get_reloc(struct kgem *kgem, void *base, const uint32_t *reloc, struct reloc *r) { uint32_t delta = *reloc; memset(r, 0, sizeof(*r)); if (base == 0) { uint32_t handle = sizeof(uint32_t) * (reloc - kgem->batch); struct kgem_bo *bo = NULL; int i; for (i = 0; i < kgem->nreloc; i++) if (kgem->reloc[i].offset == handle) break; assert(i < kgem->nreloc); handle = kgem->reloc[i].target_handle; delta = kgem->reloc[i].delta; if (handle == 0) { base = kgem->batch; } else { list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->handle == handle) break; assert(&bo->request != &kgem->next_request->buffers); base = kgem_bo_map__debug(kgem, bo); r->bo = bo; r->base = base; } } return (char *)base + (delta & ~3); } static const char * gen6_filter_to_string(uint32_t filter) { switch (filter) { default: case GEN6_MAPFILTER_NEAREST: return "nearest"; case GEN6_MAPFILTER_LINEAR: return "linear"; } } static const char * gen6_repeat_to_string(uint32_t repeat) { switch (repeat) { default: case GEN6_TEXCOORDMODE_CLAMP_BORDER: return "border"; case GEN6_TEXCOORDMODE_WRAP: return "wrap"; case GEN6_TEXCOORDMODE_CLAMP: return "clamp"; case GEN6_TEXCOORDMODE_MIRROR: return "mirror"; } } static void gen6_decode_sampler_state(struct kgem *kgem, const uint32_t *reloc) { const struct gen6_sampler_state *ss; struct reloc r; const char *min, *mag; const char *s_wrap, *t_wrap, *r_wrap; ss = get_reloc(kgem, state.dynamic_state.ptr, reloc, &r); min = gen6_filter_to_string(ss->ss0.min_filter); mag = gen6_filter_to_string(ss->ss0.mag_filter); s_wrap = gen6_repeat_to_string(ss->ss1.s_wrap_mode); t_wrap = gen6_repeat_to_string(ss->ss1.t_wrap_mode); r_wrap = gen6_repeat_to_string(ss->ss1.r_wrap_mode); ErrorF(" Sampler 0:\n"); ErrorF(" filter: min=%s, mag=%s\n", min, mag); ErrorF(" wrap: s=%s, t=%s, r=%s\n", s_wrap, t_wrap, r_wrap); ss++; min = gen6_filter_to_string(ss->ss0.min_filter); mag = gen6_filter_to_string(ss->ss0.mag_filter); s_wrap = gen6_repeat_to_string(ss->ss1.s_wrap_mode); t_wrap = gen6_repeat_to_string(ss->ss1.t_wrap_mode); r_wrap = gen6_repeat_to_string(ss->ss1.r_wrap_mode); ErrorF(" Sampler 1:\n"); ErrorF(" filter: min=%s, mag=%s\n", min, mag); ErrorF(" wrap: s=%s, t=%s, r=%s\n", s_wrap, t_wrap, r_wrap); } static const char * gen6_blend_factor_to_string(uint32_t v) { switch (v) { #define C(x) case GEN6_BLENDFACTOR_##x: return #x; C(ONE); C(SRC_COLOR); C(SRC_ALPHA); C(DST_ALPHA); C(DST_COLOR); C(SRC_ALPHA_SATURATE); C(CONST_COLOR); C(CONST_ALPHA); C(SRC1_COLOR); C(SRC1_ALPHA); C(ZERO); C(INV_SRC_COLOR); C(INV_SRC_ALPHA); C(INV_DST_ALPHA); C(INV_DST_COLOR); C(INV_CONST_COLOR); C(INV_CONST_ALPHA); C(INV_SRC1_COLOR); C(INV_SRC1_ALPHA); #undef C default: return "???"; } } static const char * gen6_blend_function_to_string(uint32_t v) { switch (v) { #define C(x) case GEN6_BLENDFUNCTION_##x: return #x; C(ADD); C(SUBTRACT); C(REVERSE_SUBTRACT); C(MIN); C(MAX); #undef C default: return "???"; } } static float unpack_float(uint32_t dw) { union { float f; uint32_t dw; } u; u.dw = dw; return u.f; } static void gen6_decode_blend(struct kgem *kgem, const uint32_t *reloc) { const struct gen6_blend_state *blend; struct reloc r; const char *dst, *src; const char *func; blend = get_reloc(kgem, state.dynamic_state.ptr, reloc, &r); dst = gen6_blend_factor_to_string(blend->blend0.dest_blend_factor); src = gen6_blend_factor_to_string(blend->blend0.source_blend_factor); func = gen6_blend_function_to_string(blend->blend0.blend_func); ErrorF(" Blend (%s): function %s, src=%s, dst=%s\n", blend->blend0.blend_enable ? "enabled" : "disabled", func, src, dst); } int kgem_gen6_decode_3d(struct kgem *kgem, uint32_t offset) { static const struct { uint32_t opcode; int min_len; int max_len; const char *name; } opcodes[] = { { 0x6101, 6, 6, "STATE_BASE_ADDRESS" }, { 0x6102, 2, 2 , "STATE_SIP" }, { 0x6104, 1, 1, "3DSTATE_PIPELINE_SELECT" }, { 0x680b, 1, 1, "3DSTATE_VF_STATISTICS" }, { 0x6904, 1, 1, "3DSTATE_PIPELINE_SELECT" }, { 0x7800, 7, 7, "3DSTATE_PIPELINED_POINTERS" }, { 0x7801, 6, 6, "3DSTATE_BINDING_TABLE_POINTERS" }, { 0x7808, 5, 257, "3DSTATE_VERTEX_BUFFERS" }, { 0x7809, 3, 256, "3DSTATE_VERTEX_ELEMENTS" }, { 0x780a, 3, 3, "3DSTATE_INDEX_BUFFER" }, { 0x780b, 1, 1, "3DSTATE_VF_STATISTICS" }, { 0x7900, 4, 4, "3DSTATE_DRAWING_RECTANGLE" }, { 0x7901, 5, 5, "3DSTATE_CONSTANT_COLOR" }, { 0x7905, 5, 7, "3DSTATE_DEPTH_BUFFER" }, { 0x7906, 2, 2, "3DSTATE_POLY_STIPPLE_OFFSET" }, { 0x7907, 33, 33, "3DSTATE_POLY_STIPPLE_PATTERN" }, { 0x7908, 3, 3, "3DSTATE_LINE_STIPPLE" }, { 0x7909, 2, 2, "3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP" }, { 0x7909, 2, 2, "3DSTATE_CLEAR_PARAMS" }, { 0x790a, 3, 3, "3DSTATE_AA_LINE_PARAMETERS" }, { 0x790b, 4, 4, "3DSTATE_GS_SVB_INDEX" }, { 0x790d, 3, 3, "3DSTATE_MULTISAMPLE" }, { 0x7910, 2, 2, "3DSTATE_CLEAR_PARAMS" }, { 0x7b00, 6, 6, "3DPRIMITIVE" }, { 0x7802, 4, 4, "3DSTATE_SAMPLER_STATE_POINTERS" }, { 0x7805, 3, 3, "3DSTATE_URB" }, { 0x780d, 4, 4, "3DSTATE_VIEWPORT_STATE_POINTERS" }, { 0x780e, 4, 4, "3DSTATE_CC_STATE_POINTERS" }, { 0x780f, 2, 2, "3DSTATE_SCISSOR_STATE_POINTERS" }, { 0x7810, 6, 6, "3DSTATE_VS_STATE" }, { 0x7811, 7, 7, "3DSTATE_GS_STATE" }, { 0x7812, 4, 4, "3DSTATE_CLIP_STATE" }, { 0x7813, 20, 20, "3DSTATE_SF_STATE" }, { 0x7814, 9, 9, "3DSTATE_WM_STATE" }, { 0x7815, 5, 5, "3DSTATE_CONSTANT_VS_STATE" }, { 0x7816, 5, 5, "3DSTATE_CONSTANT_GS_STATE" }, { 0x7817, 5, 5, "3DSTATE_CONSTANT_WM_STATE" }, { 0x7818, 2, 2, "3DSTATE_SAMPLE_MASK" }, }; uint32_t *data = kgem->batch + offset; uint32_t op; unsigned int len; int i, j; const char *desc1 = NULL; len = (data[0] & 0xff) + 2; op = (data[0] & 0xffff0000) >> 16; switch (op) { case 0x6101: i = 0; kgem_debug_print(data, offset, i++, "STATE_BASE_ADDRESS\n"); if (kgem->gen >= 060) { assert(len == 10); state_base_out(data, offset, i++, "general"); state_base_out(data, offset, i++, "surface"); state_base_out(data, offset, i++, "dynamic"); state_base_out(data, offset, i++, "indirect"); state_base_out(data, offset, i++, "instruction"); state_max_out(data, offset, i++, "general"); state_max_out(data, offset, i++, "dynamic"); state_max_out(data, offset, i++, "indirect"); state_max_out(data, offset, i++, "instruction"); gen6_update_dynamic_buffer(kgem, offset + 3); } else if (kgem->gen >= 050) { assert(len == 8); state_base_out(data, offset, i++, "general"); state_base_out(data, offset, i++, "surface"); state_base_out(data, offset, i++, "media"); state_base_out(data, offset, i++, "instruction"); state_max_out(data, offset, i++, "general"); state_max_out(data, offset, i++, "media"); state_max_out(data, offset, i++, "instruction"); } return len; case 0x7801: if (kgem->gen >= 060) { assert(len == 4); kgem_debug_print(data, offset, 0, "3DSTATE_BINDING_TABLE_POINTERS: VS mod %d, " "GS mod %d, WM mod %d\n", (data[0] & (1 << 8)) != 0, (data[0] & (1 << 9)) != 0, (data[0] & (1 << 12)) != 0); kgem_debug_print(data, offset, 1, "VS binding table\n"); kgem_debug_print(data, offset, 2, "GS binding table\n"); kgem_debug_print(data, offset, 3, "WM binding table\n"); } else if (kgem->gen >= 040) { assert(len == 6); kgem_debug_print(data, offset, 0, "3DSTATE_BINDING_TABLE_POINTERS\n"); kgem_debug_print(data, offset, 1, "VS binding table\n"); kgem_debug_print(data, offset, 2, "GS binding table\n"); kgem_debug_print(data, offset, 3, "CLIP binding table\n"); kgem_debug_print(data, offset, 4, "SF binding table\n"); kgem_debug_print(data, offset, 5, "WM binding table\n"); } return len; case 0x7802: assert(len == 4); kgem_debug_print(data, offset, 0, "3DSTATE_SAMPLER_STATE_POINTERS: VS mod %d, " "GS mod %d, WM mod %d\n", (data[0] & (1 << 8)) != 0, (data[0] & (1 << 9)) != 0, (data[0] & (1 << 12)) != 0); kgem_debug_print(data, offset, 1, "VS sampler state\n"); kgem_debug_print(data, offset, 2, "GS sampler state\n"); kgem_debug_print(data, offset, 3, "WM sampler state\n"); gen6_decode_sampler_state(kgem, &data[3]); return len; case 0x7808: assert((len - 1) % 4 == 0); kgem_debug_print(data, offset, 0, "3DSTATE_VERTEX_BUFFERS\n"); for (i = 1; i < len;) { gen6_update_vertex_buffer(kgem, data + i); kgem_debug_print(data, offset, i, "buffer %d: %s, pitch %db\n", data[i] >> 26, data[i] & (1 << 20) ? "random" : "sequential", data[i] & 0x07ff); i++; kgem_debug_print(data, offset, i++, "buffer address\n"); kgem_debug_print(data, offset, i++, "max index\n"); kgem_debug_print(data, offset, i++, "mbz\n"); } return len; case 0x7809: assert((len + 1) % 2 == 0); kgem_debug_print(data, offset, 0, "3DSTATE_VERTEX_ELEMENTS\n"); for (i = 1; i < len;) { gen6_update_vertex_elements(kgem, (i - 1)/2, data + i); kgem_debug_print(data, offset, i, "buffer %d: %svalid, type 0x%04x, " "src offset 0x%04x bytes\n", data[i] >> 26, data[i] & (1 << 25) ? "" : "in", (data[i] >> 16) & 0x1ff, data[i] & 0x07ff); i++; kgem_debug_print(data, offset, i, "(%s, %s, %s, %s), " "dst offset 0x%02x bytes\n", get_965_element_component(data[i], 0), get_965_element_component(data[i], 1), get_965_element_component(data[i], 2), get_965_element_component(data[i], 3), (data[i] & 0xff) * 4); i++; } return len; case 0x780d: assert(len == 4); kgem_debug_print(data, offset, 0, "3DSTATE_VIEWPORT_STATE_POINTERS\n"); kgem_debug_print(data, offset, 1, "clip\n"); kgem_debug_print(data, offset, 2, "sf\n"); kgem_debug_print(data, offset, 3, "cc\n"); return len; case 0x780a: assert(len == 3); kgem_debug_print(data, offset, 0, "3DSTATE_INDEX_BUFFER\n"); kgem_debug_print(data, offset, 1, "beginning buffer address\n"); kgem_debug_print(data, offset, 2, "ending buffer address\n"); return len; case 0x780e: assert(len == 4); kgem_debug_print(data, offset, 0, "3DSTATE_CC_STATE_POINTERS\n"); kgem_debug_print(data, offset, 1, "blend%s\n", data[1] & 1 ? " update" : ""); if (data[1] & 1) gen6_decode_blend(kgem, data+1); kgem_debug_print(data, offset, 2, "depth+stencil%s\n", data[2] & 1 ? " update" : ""); kgem_debug_print(data, offset, 3, "cc%s\n", data[3] & 1 ? " update" : ""); return len; case 0x780f: assert(len == 2); kgem_debug_print(data, offset, 0, "3DSTATE_SCISSOR_POINTERS\n"); kgem_debug_print(data, offset, 1, "scissor rect offset\n"); return len; case 0x7810: assert(len == 6); kgem_debug_print(data, offset, 0, "3DSTATE_VS\n"); kgem_debug_print(data, offset, 1, "kernel pointer\n"); kgem_debug_print(data, offset, 2, "SPF=%d, VME=%d, Sampler Count %d, " "Binding table count %d\n", (data[2] >> 31) & 1, (data[2] >> 30) & 1, (data[2] >> 27) & 7, (data[2] >> 18) & 0xff); kgem_debug_print(data, offset, 3, "scratch offset\n"); kgem_debug_print(data, offset, 4, "Dispatch GRF start %d, VUE read length %d, " "VUE read offset %d\n", (data[4] >> 20) & 0x1f, (data[4] >> 11) & 0x3f, (data[4] >> 4) & 0x3f); kgem_debug_print(data, offset, 5, "Max Threads %d, Vertex Cache %sable, " "VS func %sable\n", ((data[5] >> 25) & 0x7f) + 1, (data[5] & (1 << 1)) != 0 ? "dis" : "en", (data[5] & 1) != 0 ? "en" : "dis"); return len; case 0x7811: assert(len == 7); kgem_debug_print(data, offset, 0, "3DSTATE_GS\n"); kgem_debug_print(data, offset, 1, "kernel pointer\n"); kgem_debug_print(data, offset, 2, "SPF=%d, VME=%d, Sampler Count %d, " "Binding table count %d\n", (data[2] >> 31) & 1, (data[2] >> 30) & 1, (data[2] >> 27) & 7, (data[2] >> 18) & 0xff); kgem_debug_print(data, offset, 3, "scratch offset\n"); kgem_debug_print(data, offset, 4, "Dispatch GRF start %d, VUE read length %d, " "VUE read offset %d\n", (data[4] & 0xf), (data[4] >> 11) & 0x3f, (data[4] >> 4) & 0x3f); kgem_debug_print(data, offset, 5, "Max Threads %d, Rendering %sable\n", ((data[5] >> 25) & 0x7f) + 1, (data[5] & (1 << 8)) != 0 ? "en" : "dis"); kgem_debug_print(data, offset, 6, "Reorder %sable, Discard Adjaceny %sable, " "GS %sable\n", (data[6] & (1 << 30)) != 0 ? "en" : "dis", (data[6] & (1 << 29)) != 0 ? "en" : "dis", (data[6] & (1 << 15)) != 0 ? "en" : "dis"); return len; case 0x7812: assert(len == 4); kgem_debug_print(data, offset, 0, "3DSTATE_CLIP\n"); kgem_debug_print(data, offset, 1, "UserClip distance cull test mask 0x%x\n", data[1] & 0xff); kgem_debug_print(data, offset, 2, "Clip %sable, API mode %s, Viewport XY test %sable, " "Viewport Z test %sable, Guardband test %sable, Clip mode %d, " "Perspective Divide %sable, Non-Perspective Barycentric %sable, " "Tri Provoking %d, Line Provoking %d, Trifan Provoking %d\n", (data[2] & (1 << 31)) != 0 ? "en" : "dis", (data[2] & (1 << 30)) != 0 ? "D3D" : "OGL", (data[2] & (1 << 28)) != 0 ? "en" : "dis", (data[2] & (1 << 27)) != 0 ? "en" : "dis", (data[2] & (1 << 26)) != 0 ? "en" : "dis", (data[2] >> 13) & 7, (data[2] & (1 << 9)) != 0 ? "dis" : "en", (data[2] & (1 << 8)) != 0 ? "en" : "dis", (data[2] >> 4) & 3, (data[2] >> 2) & 3, (data[2] & 3)); kgem_debug_print(data, offset, 3, "Min PointWidth %d, Max PointWidth %d, " "Force Zero RTAIndex %sable, Max VPIndex %d\n", (data[3] >> 17) & 0x7ff, (data[3] >> 6) & 0x7ff, (data[3] & (1 << 5)) != 0 ? "en" : "dis", (data[3] & 0xf)); return len; case 0x7813: gen6_update_sf_state(kgem, data); assert(len == 20); kgem_debug_print(data, offset, 0, "3DSTATE_SF\n"); kgem_debug_print(data, offset, 1, "Attrib Out %d, Attrib Swizzle %sable, VUE read length %d, " "VUE read offset %d\n", (data[1] >> 22) & 0x3f, (data[1] & (1 << 21)) != 0 ? "en" : "dis", (data[1] >> 11) & 0x1f, (data[1] >> 4) & 0x3f); kgem_debug_print(data, offset, 2, "Legacy Global DepthBias %sable, FrontFace fill %d, BF fill %d, " "VP transform %sable, FrontWinding_%s\n", (data[2] & (1 << 11)) != 0 ? "en" : "dis", (data[2] >> 5) & 3, (data[2] >> 3) & 3, (data[2] & (1 << 1)) != 0 ? "en" : "dis", (data[2] & 1) != 0 ? "CCW" : "CW"); kgem_debug_print(data, offset, 3, "AA %sable, CullMode %d, Scissor %sable, Multisample m ode %d\n", (data[3] & (1 << 31)) != 0 ? "en" : "dis", (data[3] >> 29) & 3, (data[3] & (1 << 11)) != 0 ? "en" : "dis", (data[3] >> 8) & 3); kgem_debug_print(data, offset, 4, "Last Pixel %sable, SubPixel Precision %d, Use PixelWidth %d\n", (data[4] & (1 << 31)) != 0 ? "en" : "dis", (data[4] & (1 << 12)) != 0 ? 4 : 8, (data[4] & (1 << 11)) != 0); kgem_debug_print(data, offset, 5, "Global Depth Offset Constant %f\n", unpack_float(data[5])); kgem_debug_print(data, offset, 6, "Global Depth Offset Scale %f\n", unpack_float(data[6])); kgem_debug_print(data, offset, 7, "Global Depth Offset Clamp %f\n", unpack_float(data[7])); for (i = 0, j = 0; i < 8; i++, j+=2) kgem_debug_print(data, offset, i+8, "Attrib %d (Override %s%s%s%s, Const Source %d, Swizzle Select %d, " "Source %d); Attrib %d (Override %s%s%s%s, Const Source %d, Swizzle Select %d, Source %d)\n", j+1, (data[8+i] & (1 << 31)) != 0 ? "W":"", (data[8+i] & (1 << 30)) != 0 ? "Z":"", (data[8+i] & (1 << 29)) != 0 ? "Y":"", (data[8+i] & (1 << 28)) != 0 ? "X":"", (data[8+i] >> 25) & 3, (data[8+i] >> 22) & 3, (data[8+i] >> 16) & 0x1f, j, (data[8+i] & (1 << 15)) != 0 ? "W":"", (data[8+i] & (1 << 14)) != 0 ? "Z":"", (data[8+i] & (1 << 13)) != 0 ? "Y":"", (data[8+i] & (1 << 12)) != 0 ? "X":"", (data[8+i] >> 9) & 3, (data[8+i] >> 6) & 3, (data[8+i] & 0x1f)); kgem_debug_print(data, offset, 16, "Point Sprite TexCoord Enable\n"); kgem_debug_print(data, offset, 17, "Const Interp Enable\n"); kgem_debug_print(data, offset, 18, "Attrib 7-0 WrapShortest Enable\n"); kgem_debug_print(data, offset, 19, "Attrib 15-8 WrapShortest Enable\n"); return len; case 0x7814: assert(len == 9); kgem_debug_print(data, offset, 0, "3DSTATE_WM\n"); kgem_debug_print(data, offset, 1, "kernel start pointer 0\n"); kgem_debug_print(data, offset, 2, "SPF=%d, VME=%d, Sampler Count %d, " "Binding table count %d\n", (data[2] >> 31) & 1, (data[2] >> 30) & 1, (data[2] >> 27) & 7, (data[2] >> 18) & 0xff); kgem_debug_print(data, offset, 3, "scratch offset\n"); kgem_debug_print(data, offset, 4, "Depth Clear %d, Depth Resolve %d, HiZ Resolve %d, " "Dispatch GRF start[0] %d, start[1] %d, start[2] %d\n", (data[4] & (1 << 30)) != 0, (data[4] & (1 << 28)) != 0, (data[4] & (1 << 27)) != 0, (data[4] >> 16) & 0x7f, (data[4] >> 8) & 0x7f, (data[4] & 0x7f)); kgem_debug_print(data, offset, 5, "MaxThreads %d, PS KillPixel %d, PS computed Z %d, " "PS use sourceZ %d, Thread Dispatch %d, PS use sourceW %d, Dispatch32 %d, " "Dispatch16 %d, Dispatch8 %d\n", ((data[5] >> 25) & 0x7f) + 1, (data[5] & (1 << 22)) != 0, (data[5] & (1 << 21)) != 0, (data[5] & (1 << 20)) != 0, (data[5] & (1 << 19)) != 0, (data[5] & (1 << 8)) != 0, (data[5] & (1 << 2)) != 0, (data[5] & (1 << 1)) != 0, (data[5] & (1 << 0)) != 0); kgem_debug_print(data, offset, 6, "Num SF output %d, Pos XY offset %d, ZW interp mode %d , " "Barycentric interp mode 0x%x, Point raster rule %d, Multisample mode %d, " "Multisample Dispatch mode %d\n", (data[6] >> 20) & 0x3f, (data[6] >> 18) & 3, (data[6] >> 16) & 3, (data[6] >> 10) & 0x3f, (data[6] & (1 << 9)) != 0, (data[6] >> 1) & 3, (data[6] & 1)); kgem_debug_print(data, offset, 7, "kernel start pointer 1\n"); kgem_debug_print(data, offset, 8, "kernel start pointer 2\n"); return len; case 0x7900: assert(len == 4); kgem_debug_print(data, offset, 0, "3DSTATE_DRAWING_RECTANGLE\n"); kgem_debug_print(data, offset, 1, "top left: %d, %d\n", (uint16_t)(data[1] & 0xffff), (uint16_t)(data[1] >> 16)); kgem_debug_print(data, offset, 2, "bottom right: %d, %d\n", (uint16_t)(data[2] & 0xffff), (uint16_t)(data[2] >> 16)); kgem_debug_print(data, offset, 3, "origin: %d, %d\n", (int16_t)(data[3] & 0xffff), (int16_t)(data[3] >> 16)); return len; case 0x7905: assert(len == 7); kgem_debug_print(data, offset, 0, "3DSTATE_DEPTH_BUFFER\n"); kgem_debug_print(data, offset, 1, "%s, %s, pitch = %d bytes, %stiled, HiZ %d, Seperate Stencil %d\n", get_965_surfacetype(data[1] >> 29), get_965_depthformat((data[1] >> 18) & 0x7), (data[1] & 0x0001ffff) + 1, data[1] & (1 << 27) ? "" : "not ", (data[1] & (1 << 22)) != 0, (data[1] & (1 << 21)) != 0); kgem_debug_print(data, offset, 2, "depth offset\n"); kgem_debug_print(data, offset, 3, "%dx%d\n", ((data[3] & 0x0007ffc0) >> 6) + 1, ((data[3] & 0xfff80000) >> 19) + 1); kgem_debug_print(data, offset, 4, "volume depth\n"); kgem_debug_print(data, offset, 5, "\n"); kgem_debug_print(data, offset, 6, "\n"); return len; case 0x7a00: assert(len == 4 || len == 5); switch ((data[1] >> 14) & 0x3) { case 0: desc1 = "no write"; break; case 1: desc1 = "qword write"; break; case 2: desc1 = "PS_DEPTH_COUNT write"; break; case 3: desc1 = "TIMESTAMP write"; break; } kgem_debug_print(data, offset, 0, "PIPE_CONTROL\n"); kgem_debug_print(data, offset, 1, "%s, %scs stall, %stlb invalidate, " "%ssync gfdt, %sdepth stall, %sRC write flush, " "%sinst flush, %sTC flush\n", desc1, data[1] & (1 << 20) ? "" : "no ", data[1] & (1 << 18) ? "" : "no ", data[1] & (1 << 17) ? "" : "no ", data[1] & (1 << 13) ? "" : "no ", data[1] & (1 << 12) ? "" : "no ", data[1] & (1 << 11) ? "" : "no ", data[1] & (1 << 10) ? "" : "no "); if (len == 5) { kgem_debug_print(data, offset, 2, "destination address\n"); kgem_debug_print(data, offset, 3, "immediate dword low\n"); kgem_debug_print(data, offset, 4, "immediate dword high\n"); } else { for (i = 2; i < len; i++) { kgem_debug_print(data, offset, i, "\n"); } } return len; case 0x7b00: assert(len == 6); kgem_debug_print(data, offset, 0, "3DPRIMITIVE: %s %s\n", get_965_prim_type(data[0]), (data[0] & (1 << 15)) ? "random" : "sequential"); kgem_debug_print(data, offset, 1, "vertex count\n"); kgem_debug_print(data, offset, 2, "start vertex\n"); kgem_debug_print(data, offset, 3, "instance count\n"); kgem_debug_print(data, offset, 4, "start instance\n"); kgem_debug_print(data, offset, 5, "index bias\n"); primitive_out(kgem, data); return len; } /* For the rest, just dump the bytes */ for (i = 0; i < ARRAY_SIZE(opcodes); i++) if (op == opcodes[i].opcode) break; assert(i < ARRAY_SIZE(opcodes)); len = 1; kgem_debug_print(data, offset, 0, "%s\n", opcodes[i].name); if (opcodes[i].max_len > 1) { len = (data[0] & 0xff) + 2; assert(len >= opcodes[i].min_len && len <= opcodes[i].max_len); } for (i = 1; i < len; i++) kgem_debug_print(data, offset, i, "dword %d\n", i); return len; } void kgem_gen6_finish_state(struct kgem *kgem) { finish_state(kgem); } xf86-video-intel-2.99.917/src/sna/rop.h0000664000175000017500000001445612244635610014265 00000000000000#ifndef ROP_H #define ROP_H #define ROP_0 0x00 #define ROP_DPSoon 0x01 #define ROP_DPSona 0x02 #define ROP_PSon 0x03 #define ROP_SDPona 0x04 #define ROP_DPon 0x05 #define ROP_PDSxnon 0x06 #define ROP_PDSaon 0x07 #define ROP_SDPnaa 0x08 #define ROP_PDSxon 0x09 #define ROP_DPna 0x0A #define ROP_PSDnaon 0x0B #define ROP_SPna 0x0C #define ROP_PDSnaon 0x0D #define ROP_PDSonon 0x0E #define ROP_Pn 0x0F #define ROP_PDSona 0x10 #define ROP_DSon 0x11 #define ROP_SDPxnon 0x12 #define ROP_SDPaon 0x13 #define ROP_DPSxnon 0x14 #define ROP_DPSaon 0x15 #define ROP_PSDPSanaxx 0x16 #define ROP_SSPxDSxaxn 0x17 #define ROP_SPxPDxa 0x18 #define ROP_SDPSanaxn 0x19 #define ROP_PDSPaox 0x1A #define ROP_SDPSxaxn 0x1B #define ROP_PSDPaox 0x1C #define ROP_DSPDxaxn 0x1D #define ROP_PDSox 0x1E #define ROP_PDSoan 0x1F #define ROP_DPSnaa 0x20 #define ROP_SDPxon 0x21 #define ROP_DSna 0x22 #define ROP_SPDnaon 0x23 #define ROP_SPxDSxa 0x24 #define ROP_PDSPanaxn 0x25 #define ROP_SDPSaox 0x26 #define ROP_SDPSxnox 0x27 #define ROP_DPSxa 0x28 #define ROP_PSDPSaoxxn 0x29 #define ROP_DPSana 0x2A #define ROP_SSPxPDxaxn 0x2B #define ROP_SPDSoax 0x2C #define ROP_PSDnox 0x2D #define ROP_PSDPxox 0x2E #define ROP_PSDnoan 0x2F #define ROP_PSna 0x30 #define ROP_SDPnaon 0x31 #define ROP_SDPSoox 0x32 #define ROP_Sn 0x33 #define ROP_SPDSaox 0x34 #define ROP_SPDSxnox 0x35 #define ROP_SDPox 0x36 #define ROP_SDPoan 0x37 #define ROP_PSDPoax 0x38 #define ROP_SPDnox 0x39 #define ROP_SPDSxox 0x3A #define ROP_SPDnoan 0x3B #define ROP_PSx 0x3C #define ROP_SPDSonox 0x3D #define ROP_SPDSnaox 0x3E #define ROP_PSan 0x3F #define ROP_PSDnaa 0x40 #define ROP_DPSxon 0x41 #define ROP_SDxPDxa 0x42 #define ROP_SPDSanaxn 0x43 #define ROP_SDna 0x44 #define ROP_DPSnaon 0x45 #define ROP_DSPDaox 0x46 #define ROP_PSDPxaxn 0x47 #define ROP_SDPxa 0x48 #define ROP_PDSPDaoxxn 0x49 #define ROP_DPSDoax 0x4A #define ROP_PDSnox 0x4B #define ROP_SDPana 0x4C #define ROP_SSPxDSxoxn 0x4D #define ROP_PDSPxox 0x4E #define ROP_PDSnoan 0x4F #define ROP_PDna 0x50 #define ROP_DSPnaon 0x51 #define ROP_DPSDaox 0x52 #define ROP_SPDSxaxn 0x53 #define ROP_DPSonon 0x54 #define ROP_Dn 0x55 #define ROP_DPSox 0x56 #define ROP_DPSoan 0x57 #define ROP_PDSPoax 0x58 #define ROP_DPSnox 0x59 #define ROP_DPx 0x5A #define ROP_DPSDonox 0x5B #define ROP_DPSDxox 0x5C #define ROP_DPSnoan 0x5D #define ROP_DPSDnaox 0x5E #define ROP_DPan 0x5F #define ROP_PDSxa 0x60 #define ROP_DSPDSaoxxn 0x61 #define ROP_DSPDoax 0x62 #define ROP_SDPnox 0x63 #define ROP_SDPSoax 0x64 #define ROP_DSPnox 0x65 #define ROP_DSx 0x66 #define ROP_SDPSonox 0x67 #define ROP_DSPDSonoxxn 0x68 #define ROP_PDSxxn 0x69 #define ROP_DPSax 0x6A #define ROP_PSDPSoaxxn 0x6B #define ROP_SDPax 0x6C #define ROP_PDSPDoaxxn 0x6D #define ROP_SDPSnoax 0x6E #define ROP_PDSxnan 0x6F #define ROP_PDSana 0x70 #define ROP_SSDxPDxaxn 0x71 #define ROP_SDPSxox 0x72 #define ROP_SDPnoan 0x73 #define ROP_DSPDxox 0x74 #define ROP_DSPnoan 0x75 #define ROP_SDPSnaox 0x76 #define ROP_DSan 0x77 #define ROP_PDSax 0x78 #define ROP_DSPDSoaxxn 0x79 #define ROP_DPSDnoax 0x7A #define ROP_SDPxnan 0x7B #define ROP_SPDSnoax 0x7C #define ROP_DPSxnan 0x7D #define ROP_SPxDSxo 0x7E #define ROP_DPSaan 0x7F #define ROP_DPSaa 0x80 #define ROP_SPxDSxon 0x81 #define ROP_DPSxna 0x82 #define ROP_SPDSnoaxn 0x83 #define ROP_SDPxna 0x84 #define ROP_PDSPnoaxn 0x85 #define ROP_DSPDSoaxx 0x86 #define ROP_PDSaxn 0x87 #define ROP_DSa 0x88 #define ROP_SDPSnaoxn 0x89 #define ROP_DSPnoa 0x8A #define ROP_DSPDxoxn 0x8B #define ROP_SDPnoa 0x8C #define ROP_SDPSxoxn 0x8D #define ROP_SSDxPDxax 0x8E #define ROP_PDSanan 0x8F #define ROP_PDSxna 0x90 #define ROP_SDPSnoaxn 0x91 #define ROP_DPSDPoaxx 0x92 #define ROP_SPDaxn 0x93 #define ROP_PSDPSoaxx 0x94 #define ROP_DPSaxn 0x95 #define ROP_DPSxx 0x96 #define ROP_PSDPSonoxx 0x97 #define ROP_SDPSonoxn 0x98 #define ROP_DSxn 0x99 #define ROP_DPSnax 0x9A #define ROP_SDPSoaxn 0x9B #define ROP_SPDnax 0x9C #define ROP_DSPDoaxn 0x9D #define ROP_DSPDSaoxx 0x9E #define ROP_PDSxan 0x9F #define ROP_DPa 0xA0 #define ROP_PDSPnaoxn 0xA1 #define ROP_DPSnoa 0xA2 #define ROP_DPSDxoxn 0xA3 #define ROP_PDSPonoxn 0xA4 #define ROP_PDxn 0xA5 #define ROP_DSPnax 0xA6 #define ROP_PDSPoaxn 0xA7 #define ROP_DPSoa 0xA8 #define ROP_DPSoxn 0xA9 #define ROP_D 0xAA #define ROP_DPSono 0xAB #define ROP_SPDSxax 0xAC #define ROP_DPSDaoxn 0xAD #define ROP_DSPnao 0xAE #define ROP_DPno 0xAF #define ROP_PDSnoa 0xB0 #define ROP_PDSPxoxn 0xB1 #define ROP_SSPxDSxox 0xB2 #define ROP_SDPanan 0xB3 #define ROP_PSDnax 0xB4 #define ROP_DPSDoaxn 0xB5 #define ROP_DPSDPaoxx 0xB6 #define ROP_SDPxan 0xB7 #define ROP_PSDPxax 0xB8 #define ROP_DSPDaoxn 0xB9 #define ROP_DPSnao 0xBA #define ROP_DSno 0xBB #define ROP_SPDSanax 0xBC #define ROP_SDxPDxan 0xBD #define ROP_DPSxo 0xBE #define ROP_DPSano 0xBF #define ROP_Psa 0xC0 #define ROP_SPDSnaoxn 0xC1 #define ROP_SPDSonoxn 0xC2 #define ROP_PSxn 0xC3 #define ROP_SPDnoa 0xC4 #define ROP_SPDSxoxn 0xC5 #define ROP_SDPnax 0xC6 #define ROP_PSDPoaxn 0xC7 #define ROP_SDPoa 0xC8 #define ROP_SPDoxn 0xC9 #define ROP_DPSDxax 0xCA #define ROP_SPDSaoxn 0xCB #define ROP_S 0xCC #define ROP_SDPono 0xCD #define ROP_SDPnao 0xCE #define ROP_SPno 0xCF #define ROP_PSDnoa 0xD0 #define ROP_PSDPxoxn 0xD1 #define ROP_PDSnax 0xD2 #define ROP_SPDSoaxn 0xD3 #define ROP_SSPxPDxax 0xD4 #define ROP_DPSanan 0xD5 #define ROP_PSDPSaoxx 0xD6 #define ROP_DPSxan 0xD7 #define ROP_PDSPxax 0xD8 #define ROP_SDPSaoxn 0xD9 #define ROP_DPSDanax 0xDA #define ROP_SPxDSxan 0xDB #define ROP_SPDnao 0xDC #define ROP_SDno 0xDD #define ROP_SDPxo 0xDE #define ROP_SDPano 0xDF #define ROP_PDSoa 0xE0 #define ROP_PDSoxn 0xE1 #define ROP_DSPDxax 0xE2 #define ROP_PSDPaoxn 0xE3 #define ROP_SDPSxax 0xE4 #define ROP_PDSPaoxn 0xE5 #define ROP_SDPSanax 0xE6 #define ROP_SPxPDxan 0xE7 #define ROP_SSPxDSxax 0xE8 #define ROP_DSPDSanaxxn 0xE9 #define ROP_DPSao 0xEA #define ROP_DPSxno 0xEB #define ROP_SDPao 0xEC #define ROP_SDPxno 0xED #define ROP_DSo 0xEE #define ROP_SDPnoo 0xEF #define ROP_P 0xF0 #define ROP_PDSono 0xF1 #define ROP_PDSnao 0xF2 #define ROP_PSno 0xF3 #define ROP_PSDnao 0xF4 #define ROP_PDno 0xF5 #define ROP_PDSxo 0xF6 #define ROP_PDSano 0xF7 #define ROP_PDSao 0xF8 #define ROP_PDSxno 0xF9 #define ROP_DPo 0xFA #define ROP_DPSnoo 0xFB #define ROP_PSo 0xFC #define ROP_PSDnoo 0xFD #define ROP_DPSoo 0xFE #define ROP_1 0xFF #define NO_SRC_ROP(rop) \ ((rop == GXnoop) || (rop == GXset) || (rop == GXclear) || (rop == GXinvert)) #endif /* ROP_H */ xf86-video-intel-2.99.917/src/sna/sna_tiling.c0000664000175000017500000007651312400044327015602 00000000000000/* * Copyright © 2010 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "fb/fbpict.h" struct sna_tile_span { BoxRec box; float opacity; }; struct sna_tile_state { int op; PicturePtr src, mask, dst; PixmapPtr dst_pixmap; uint32_t dst_format; int16_t src_x, src_y; int16_t mask_x, mask_y; int16_t dst_x, dst_y; int16_t width, height; unsigned flags; int rect_count; int rect_size; struct sna_composite_rectangles rects_embedded[16], *rects; }; static void sna_tiling_composite_add_rect(struct sna_tile_state *tile, const struct sna_composite_rectangles *r) { if (tile->rect_count == tile->rect_size) { struct sna_composite_rectangles *a; int newsize = tile->rect_size * 2; if (tile->rects == tile->rects_embedded) { a = malloc (sizeof(struct sna_composite_rectangles) * newsize); if (a == NULL) return; memcpy(a, tile->rects_embedded, sizeof(struct sna_composite_rectangles) * tile->rect_count); } else { a = realloc(tile->rects, sizeof(struct sna_composite_rectangles) * newsize); if (a == NULL) return; } tile->rects = a; tile->rect_size = newsize; } tile->rects[tile->rect_count++] = *r; } fastcall static void sna_tiling_composite_blt(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { sna_tiling_composite_add_rect(op->priv, r); (void)sna; } fastcall static void sna_tiling_composite_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { struct sna_composite_rectangles r; r.dst.x = box->x1; r.dst.y = box->y1; r.mask = r.src = r.dst; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; sna_tiling_composite_add_rect(op->priv, &r); (void)sna; } static void sna_tiling_composite_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { while (nbox--) { struct sna_composite_rectangles r; r.dst.x = box->x1; r.dst.y = box->y1; r.mask = r.src = r.dst; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; sna_tiling_composite_add_rect(op->priv, &r); box++; } (void)sna; } static void sna_tiling_composite_done(struct sna *sna, const struct sna_composite_op *op) { struct sna_tile_state *tile = op->priv; struct sna_composite_op tmp; int x, y, n, step, max_size; /* Use a small step to accommodate enlargement through tile alignment */ step = sna->render.max_3d_size; if (tile->dst_x & (8*512 / tile->dst->pDrawable->bitsPerPixel - 1) || tile->dst_y & 63) step /= 2; max_size = sna_max_tile_copy_size(sna, op->dst.bo, op->dst.bo); if (max_size == 0) goto done; while (step * step * 4 > max_size) step /= 2; DBG(("%s -- %dx%d, count=%d, step size=%d\n", __FUNCTION__, tile->width, tile->height, tile->rect_count, step)); if (tile->rect_count == 0) goto done; for (y = 0; y < tile->height; y += step) { int height = step; if (y + height > tile->height) height = tile->height - y; for (x = 0; x < tile->width; x += step) { int width = step; if (x + width > tile->width) width = tile->width - x; if (sna->render.composite(sna, tile->op, tile->src, tile->mask, tile->dst, tile->src_x + x, tile->src_y + y, tile->mask_x + x, tile->mask_y + y, tile->dst_x + x, tile->dst_y + y, width, height, COMPOSITE_PARTIAL, memset(&tmp, 0, sizeof(tmp)))) { for (n = 0; n < tile->rect_count; n++) { const struct sna_composite_rectangles *r = &tile->rects[n]; int x1, x2, dx, y1, y2, dy; x1 = r->dst.x - tile->dst_x, dx = 0; if (x1 < x) dx = x - x1, x1 = x; y1 = r->dst.y - tile->dst_y, dy = 0; if (y1 < y) dy = y - y1, y1 = y; x2 = r->dst.x + r->width - tile->dst_x; if (x2 > x + width) x2 = x + width; y2 = r->dst.y + r->height - tile->dst_y; if (y2 > y + height) y2 = y + height; DBG(("%s: rect[%d] = (%d, %d)x(%d,%d), tile=(%d,%d)x(%d, %d), blt=(%d,%d),(%d,%d), delta=(%d,%d)\n", __FUNCTION__, n, r->dst.x, r->dst.y, r->width, r->height, x, y, width, height, x1, y1, x2, y2, dx, dy)); if (y2 > y1 && x2 > x1) { struct sna_composite_rectangles rr; rr.src.x = dx + r->src.x; rr.src.y = dy + r->src.y; rr.mask.x = dx + r->mask.x; rr.mask.y = dy + r->mask.y; rr.dst.x = dx + r->dst.x; rr.dst.y = dy + r->dst.y; rr.width = x2 - x1; rr.height = y2 - y1; tmp.blt(sna, &tmp, &rr); } } tmp.done(sna, &tmp); } else { unsigned int flags; DBG(("%s -- falback\n", __FUNCTION__)); if (tile->op <= PictOpSrc) flags = MOVE_WRITE; else flags = MOVE_WRITE | MOVE_READ; if (!sna_drawable_move_to_cpu(tile->dst->pDrawable, flags)) goto done; if (tile->dst->alphaMap && !sna_drawable_move_to_cpu(tile->dst->alphaMap->pDrawable, flags)) goto done; if (tile->src->pDrawable && !sna_drawable_move_to_cpu(tile->src->pDrawable, MOVE_READ)) goto done; if (tile->src->alphaMap && !sna_drawable_move_to_cpu(tile->src->alphaMap->pDrawable, MOVE_READ)) goto done; if (tile->mask && tile->mask->pDrawable && !sna_drawable_move_to_cpu(tile->mask->pDrawable, MOVE_READ)) goto done; if (tile->mask && tile->mask->alphaMap && !sna_drawable_move_to_cpu(tile->mask->alphaMap->pDrawable, MOVE_READ)) goto done; if (sigtrap_get() == 0) { fbComposite(tile->op, tile->src, tile->mask, tile->dst, tile->src_x + x, tile->src_y + y, tile->mask_x + x, tile->mask_y + y, tile->dst_x + x, tile->dst_y + y, width, height); sigtrap_put(); } } } } done: if (tile->rects != tile->rects_embedded) free(tile->rects); free(tile); } bool sna_tiling_composite(uint32_t op, PicturePtr src, PicturePtr mask, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t mask_x, int16_t mask_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, struct sna_composite_op *tmp) { struct sna_tile_state *tile; struct sna_pixmap *priv; DBG(("%s size=(%d, %d), tile=%d\n", __FUNCTION__, width, height, to_sna_from_drawable(dst->pDrawable)->render.max_3d_size)); priv = sna_pixmap(get_drawable_pixmap(dst->pDrawable)); if (priv == NULL || priv->gpu_bo == NULL) return false; tile = malloc(sizeof(*tile)); if (!tile) return false; tile->op = op; tile->src = src; tile->mask = mask; tile->dst = dst; tile->src_x = src_x; tile->src_y = src_y; tile->mask_x = mask_x; tile->mask_y = mask_y; tile->dst_x = dst_x; tile->dst_y = dst_y; tile->width = width; tile->height = height; tile->rects = tile->rects_embedded; tile->rect_count = 0; tile->rect_size = ARRAY_SIZE(tile->rects_embedded); tmp->blt = sna_tiling_composite_blt; tmp->box = sna_tiling_composite_box; tmp->boxes = sna_tiling_composite_boxes; tmp->done = sna_tiling_composite_done; tmp->priv = tile; tmp->dst.bo = priv->gpu_bo; return true; } fastcall static void sna_tiling_composite_spans_box(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { struct sna_tile_state *tile = op->base.priv; struct sna_tile_span *a; if (tile->rect_count == tile->rect_size) { int newsize = tile->rect_size * 2; if (tile->rects == tile->rects_embedded) { a = malloc (sizeof(struct sna_tile_span) * newsize); if (a == NULL) return; memcpy(a, tile->rects_embedded, sizeof(struct sna_tile_span) * tile->rect_count); } else { a = realloc(tile->rects, sizeof(struct sna_tile_span) * newsize); if (a == NULL) return; } tile->rects = (void *)a; tile->rect_size = newsize; } else a = (void *)tile->rects; a[tile->rect_count].box = *box; a[tile->rect_count].opacity = opacity; tile->rect_count++; (void)sna; } static void sna_tiling_composite_spans_boxes(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, int nbox, float opacity) { while (nbox--) sna_tiling_composite_spans_box(sna, op->base.priv, box++, opacity); (void)sna; } fastcall static void sna_tiling_composite_spans_done(struct sna *sna, const struct sna_composite_spans_op *op) { struct sna_tile_state *tile = op->base.priv; struct sna_composite_spans_op tmp; int x, y, n, step, max_size; bool force_fallback = false; /* Use a small step to accommodate enlargement through tile alignment */ step = sna->render.max_3d_size; if (tile->dst_x & (8*512 / tile->dst->pDrawable->bitsPerPixel - 1) || tile->dst_y & 63) step /= 2; max_size = sna_max_tile_copy_size(sna, op->base.dst.bo, op->base.dst.bo); if (max_size == 0) goto done; while (step * step * 4 > max_size) step /= 2; DBG(("%s -- %dx%d, count=%d, step size=%d\n", __FUNCTION__, tile->width, tile->height, tile->rect_count, step)); if (tile->rect_count == 0) goto done; for (y = 0; y < tile->height; y += step) { int height = step; if (y + height > tile->height) height = tile->height - y; for (x = 0; x < tile->width; x += step) { const struct sna_tile_span *r = (void *)tile->rects; int width = step; if (x + width > tile->width) width = tile->width - x; if (!force_fallback && sna->render.composite_spans(sna, tile->op, tile->src, tile->dst, tile->src_x + x, tile->src_y + y, tile->dst_x + x, tile->dst_y + y, width, height, tile->flags, memset(&tmp, 0, sizeof(tmp)))) { for (n = 0; n < tile->rect_count; n++) { BoxRec b; b.x1 = r->box.x1 - tile->dst_x; if (b.x1 < x) b.x1 = x; b.y1 = r->box.y1 - tile->dst_y; if (b.y1 < y) b.y1 = y; b.x2 = r->box.x2 - tile->dst_x; if (b.x2 > x + width) b.x2 = x + width; b.y2 = r->box.y2 - tile->dst_y; if (b.y2 > y + height) b.y2 = y + height; DBG(("%s: rect[%d] = (%d, %d)x(%d,%d), tile=(%d,%d)x(%d, %d), blt=(%d,%d),(%d,%d)\n", __FUNCTION__, n, r->box.x1, r->box.y1, r->box.x2-r->box.x1, r->box.y2-r->box.y1, x, y, width, height, b.x1, b.y1, b.x2, b.y2)); if (b.y2 > b.y1 && b.x2 > b.x1) tmp.box(sna, &tmp, &b, r->opacity); r++; } tmp.done(sna, &tmp); } else { unsigned int flags; DBG(("%s -- falback\n", __FUNCTION__)); if (tile->op <= PictOpSrc) flags = MOVE_WRITE; else flags = MOVE_WRITE | MOVE_READ; if (!sna_drawable_move_to_cpu(tile->dst->pDrawable, flags)) goto done; if (tile->dst->alphaMap && !sna_drawable_move_to_cpu(tile->dst->alphaMap->pDrawable, flags)) goto done; if (tile->src->pDrawable && !sna_drawable_move_to_cpu(tile->src->pDrawable, MOVE_READ)) goto done; if (tile->src->alphaMap && !sna_drawable_move_to_cpu(tile->src->alphaMap->pDrawable, MOVE_READ)) goto done; for (n = 0; n < tile->rect_count; n++) { BoxRec b; b.x1 = r->box.x1 - tile->dst_x; if (b.x1 < x) b.x1 = x; b.y1 = r->box.y1 - tile->dst_y; if (b.y1 < y) b.y1 = y; b.x2 = r->box.x2 - tile->dst_x; if (b.x2 > x + width) b.x2 = x + width; b.y2 = r->box.y2 - tile->dst_y; if (b.y2 > y + height) b.y2 = y + height; DBG(("%s: rect[%d] = (%d, %d)x(%d,%d), tile=(%d,%d)x(%d, %d), blt=(%d,%d),(%d,%d)\n", __FUNCTION__, n, r->box.x1, r->box.y1, r->box.x2-r->box.x1, r->box.y2-r->box.y1, x, y, width, height, b.x1, b.y1, b.x2, b.y2)); if (b.y2 > b.y1 && b.x2 > b.x1) { xRenderColor alpha; PicturePtr mask; int error; alpha.red = alpha.green = alpha.blue = 0; alpha.alpha = r->opacity * 0xffff; mask = CreateSolidPicture(0, &alpha, &error); if (!mask) goto done; if (sigtrap_get() == 0) { fbComposite(tile->op, tile->src, mask, tile->dst, tile->src_x + x, tile->src_y + y, 0, 0, tile->dst_x + x, tile->dst_y + y, width, height); sigtrap_put(); } FreePicture(mask, 0); } r++; } force_fallback = true; } } } done: if (tile->rects != tile->rects_embedded) free(tile->rects); free(tile); } bool sna_tiling_composite_spans(uint32_t op, PicturePtr src, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_spans_op *tmp) { struct sna_tile_state *tile; struct sna_pixmap *priv; DBG(("%s size=(%d, %d), tile=%d\n", __FUNCTION__, width, height, to_sna_from_drawable(dst->pDrawable)->render.max_3d_size)); priv = sna_pixmap(get_drawable_pixmap(dst->pDrawable)); if (priv == NULL || priv->gpu_bo == NULL) return false; tile = malloc(sizeof(*tile)); if (!tile) return false; tile->op = op; tile->flags = flags; tile->src = src; tile->mask = NULL; tile->dst = dst; tile->src_x = src_x; tile->src_y = src_y; tile->mask_x = 0; tile->mask_y = 0; tile->dst_x = dst_x; tile->dst_y = dst_y; tile->width = width; tile->height = height; tile->rects = tile->rects_embedded; tile->rect_count = 0; tile->rect_size = ARRAY_SIZE(tile->rects_embedded); tmp->box = sna_tiling_composite_spans_box; tmp->boxes = sna_tiling_composite_spans_boxes; tmp->done = sna_tiling_composite_spans_done; tmp->base.priv = tile; tmp->base.dst.bo = priv->gpu_bo; return true; } bool sna_tiling_fill_boxes(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n) { RegionRec region, tile, this; struct kgem_bo *bo; int step, max_size; bool ret = false; pixman_region_init_rects(®ion, box, n); /* Use a small step to accommodate enlargement through tile alignment */ step = sna->render.max_3d_size; if (region.extents.x1 & (8*512 / dst->bitsPerPixel - 1) || region.extents.y1 & 63) step /= 2; max_size = sna_max_tile_copy_size(sna, dst_bo, dst_bo); if (max_size == 0) goto done; while (step * step * 4 > max_size) step /= 2; DBG(("%s (op=%d, format=%x, color=(%04x,%04x,%04x, %04x), tile.size=%d, box=%dx[(%d, %d), (%d, %d)])\n", __FUNCTION__, op, (int)format, color->red, color->green, color->blue, color->alpha, step, n, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); for (tile.extents.y1 = tile.extents.y2 = region.extents.y1; tile.extents.y2 < region.extents.y2; tile.extents.y1 = tile.extents.y2) { int y2 = tile.extents.y1 + step; if (y2 > region.extents.y2) y2 = region.extents.y2; tile.extents.y2 = y2; for (tile.extents.x1 = tile.extents.x2 = region.extents.x1; tile.extents.x2 < region.extents.x2; tile.extents.x1 = tile.extents.x2) { DrawableRec tmp; int x2 = tile.extents.x1 + step; if (x2 > region.extents.x2) x2 = region.extents.x2; tile.extents.x2 = x2; tile.data = NULL; RegionNull(&this); RegionIntersect(&this, ®ion, &tile); if (RegionNil(&this)) continue; tmp.width = this.extents.x2 - this.extents.x1; tmp.height = this.extents.y2 - this.extents.y1; tmp.depth = dst->depth; tmp.bitsPerPixel = dst->bitsPerPixel; bo = kgem_create_2d(&sna->kgem, tmp.width, tmp.height, dst->bitsPerPixel, kgem_choose_tiling(&sna->kgem, I915_TILING_X, tmp.width, tmp.height, dst->bitsPerPixel), CREATE_TEMPORARY); if (bo) { int16_t dx = this.extents.x1; int16_t dy = this.extents.y1; assert(kgem_bo_can_blt(&sna->kgem, bo)); if (op > PictOpSrc && !sna->render.copy_boxes(sna, GXcopy, dst, dst_bo, 0, 0, &tmp, bo, -dx, -dy, region_rects(&this), region_num_rects(&this), 0)) goto err; RegionTranslate(&this, -dx, -dy); if (!sna->render.fill_boxes(sna, op, format, color, &tmp, bo, region_rects(&this), region_num_rects(&this))) goto err; if (!sna->render.copy_boxes(sna, GXcopy, &tmp, bo, 0, 0, dst, dst_bo, dx, dy, region_rects(&this), region_num_rects(&this), 0)) goto err; kgem_bo_destroy(&sna->kgem, bo); } RegionUninit(&this); } } ret = true; goto done; err: kgem_bo_destroy(&sna->kgem, bo); RegionUninit(&this); done: pixman_region_fini(®ion); return ret; } fastcall static void tiling_blt(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int x1, x2, y1, y2; int src_x, src_y; BoxRec box; DBG(("%s: src=(%d, %d), dst=(%d, %d), size=(%d, %d)\n", __FUNCTION__, r->src.x, r->src.y, r->dst.x, r->dst.y, r->width, r->height)); /* XXX higher layer should have clipped? */ x1 = r->dst.x + op->dst.x; y1 = r->dst.y + op->dst.y; x2 = x1 + r->width; y2 = y1 + r->height; src_x = r->src.x - x1 + op->u.blt.sx; src_y = r->src.y - y1 + op->u.blt.sy; /* clip against dst */ if (x1 < 0) x1 = 0; if (y1 < 0) y1 = 0; if (x2 > op->dst.width) x2 = op->dst.width; if (y2 > op->dst.height) y2 = op->dst.height; DBG(("%s: box=(%d, %d), (%d, %d)\n", __FUNCTION__, x1, y1, x2, y2)); if (x2 <= x1 || y2 <= y1) return; box.x1 = x1; box.y1 = y1; box.x2 = x2; box.y2 = y2; sna_tiling_blt_copy_boxes(sna, GXcopy, op->src.bo, src_x, src_y, op->dst.bo, 0, 0, op->u.blt.bpp, &box, 1); } fastcall static void tiling_blt_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { DBG(("%s: box (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); sna_tiling_blt_copy_boxes(sna, GXcopy, op->src.bo, op->u.blt.sx, op->u.blt.sy, op->dst.bo, op->dst.x, op->dst.y, op->u.blt.bpp, box, 1); } static void tiling_blt_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); sna_tiling_blt_copy_boxes(sna, GXcopy, op->src.bo, op->u.blt.sx, op->u.blt.sy, op->dst.bo, op->dst.x, op->dst.y, op->u.blt.bpp, box, nbox); } static bool sna_tiling_blt_copy_boxes__with_alpha(struct sna *sna, uint8_t alu, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, int bpp, int alpha_fixup, const BoxRec *box, int nbox) { RegionRec region, tile, this; struct kgem_bo *bo; int max_size, step; bool ret = false; if (wedged(sna) || !kgem_bo_can_blt(&sna->kgem, src_bo) || !kgem_bo_can_blt(&sna->kgem, dst_bo)) { /* XXX */ DBG(("%s: tiling blt fail: src?=%d, dst?=%d\n", __FUNCTION__, kgem_bo_can_blt(&sna->kgem, src_bo), kgem_bo_can_blt(&sna->kgem, dst_bo))); return false; } max_size = sna_max_tile_copy_size(sna, src_bo, dst_bo); if (max_size == 0) return false; pixman_region_init_rects(®ion, box, nbox); /* Use a small step to accommodate enlargement through tile alignment */ step = sna->render.max_3d_size; if (region.extents.x1 & (8*512 / bpp - 1) || region.extents.y1 & 63) step /= 2; while (step * step * 4 > max_size) step /= 2; if (sna->kgem.gen < 033) step /= 2; /* accommodate severe fence restrictions */ if (step == 0) { DBG(("%s: tiles cannot fit into aperture\n", __FUNCTION__)); return false; } DBG(("%s (alu=%d), tile.size=%d, box=%dx[(%d, %d), (%d, %d)])\n", __FUNCTION__, alu, step, nbox, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); for (tile.extents.y1 = tile.extents.y2 = region.extents.y1; tile.extents.y2 < region.extents.y2; tile.extents.y1 = tile.extents.y2) { int y2 = tile.extents.y1 + step; if (y2 > region.extents.y2) y2 = region.extents.y2; tile.extents.y2 = y2; for (tile.extents.x1 = tile.extents.x2 = region.extents.x1; tile.extents.x2 < region.extents.x2; tile.extents.x1 = tile.extents.x2) { int w, h; int x2 = tile.extents.x1 + step; if (x2 > region.extents.x2) x2 = region.extents.x2; tile.extents.x2 = x2; tile.data = NULL; RegionNull(&this); RegionIntersect(&this, ®ion, &tile); if (RegionNil(&this)) continue; w = this.extents.x2 - this.extents.x1; h = this.extents.y2 - this.extents.y1; bo = kgem_create_2d(&sna->kgem, w, h, bpp, kgem_choose_tiling(&sna->kgem, I915_TILING_X, w, h, bpp), CREATE_TEMPORARY); if (bo) { int16_t dx = this.extents.x1; int16_t dy = this.extents.y1; assert(kgem_bo_can_blt(&sna->kgem, bo)); if (!sna_blt_copy_boxes(sna, GXcopy, src_bo, src_dx, src_dy, bo, -dx, -dy, bpp, region_rects(&this), region_num_rects(&this))) goto err; if (!sna_blt_copy_boxes__with_alpha(sna, alu, bo, -dx, -dy, dst_bo, dst_dx, dst_dy, bpp, alpha_fixup, region_rects(&this), region_num_rects(&this))) goto err; kgem_bo_destroy(&sna->kgem, bo); } RegionUninit(&this); } } ret = true; goto done; err: kgem_bo_destroy(&sna->kgem, bo); RegionUninit(&this); done: pixman_region_fini(®ion); return ret; } fastcall static void tiling_blt__with_alpha(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { int x1, x2, y1, y2; int src_x, src_y; BoxRec box; DBG(("%s: src=(%d, %d), dst=(%d, %d), size=(%d, %d)\n", __FUNCTION__, r->src.x, r->src.y, r->dst.x, r->dst.y, r->width, r->height)); /* XXX higher layer should have clipped? */ x1 = r->dst.x + op->dst.x; y1 = r->dst.y + op->dst.y; x2 = x1 + r->width; y2 = y1 + r->height; src_x = r->src.x - x1 + op->u.blt.sx; src_y = r->src.y - y1 + op->u.blt.sy; /* clip against dst */ if (x1 < 0) x1 = 0; if (y1 < 0) y1 = 0; if (x2 > op->dst.width) x2 = op->dst.width; if (y2 > op->dst.height) y2 = op->dst.height; DBG(("%s: box=(%d, %d), (%d, %d)\n", __FUNCTION__, x1, y1, x2, y2)); if (x2 <= x1 || y2 <= y1) return; box.x1 = x1; box.y1 = y1; box.x2 = x2; box.y2 = y2; sna_tiling_blt_copy_boxes__with_alpha(sna, GXcopy, op->src.bo, src_x, src_y, op->dst.bo, 0, 0, op->u.blt.bpp, op->u.blt.pixel, &box, 1); } fastcall static void tiling_blt_box__with_alpha(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { DBG(("%s: box (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); sna_tiling_blt_copy_boxes__with_alpha(sna, GXcopy, op->src.bo, op->u.blt.sx, op->u.blt.sy, op->dst.bo, op->dst.x, op->dst.y, op->u.blt.bpp, op->u.blt.pixel, box, 1); } static void tiling_blt_boxes__with_alpha(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); sna_tiling_blt_copy_boxes__with_alpha(sna, GXcopy, op->src.bo, op->u.blt.sx, op->u.blt.sy, op->dst.bo, op->dst.x, op->dst.y, op->u.blt.bpp, op->u.blt.pixel, box, nbox); } static void nop_done(struct sna *sna, const struct sna_composite_op *op) { assert(sna->kgem.nbatch <= KGEM_BATCH_SIZE(&sna->kgem)); (void)op; } bool sna_tiling_blt_composite(struct sna *sna, struct sna_composite_op *op, struct kgem_bo *bo, int bpp, uint32_t alpha_fixup) { assert(op->dst.bo); assert(kgem_bo_can_blt(&sna->kgem, op->dst.bo)); assert(kgem_bo_can_blt(&sna->kgem, bo)); op->src.bo = bo; op->u.blt.bpp = bpp; op->u.blt.pixel = alpha_fixup; if (alpha_fixup) { op->blt = tiling_blt__with_alpha; op->box = tiling_blt_box__with_alpha; op->boxes = tiling_blt_boxes__with_alpha; } else { op->blt = tiling_blt; op->box = tiling_blt_box; op->boxes = tiling_blt_boxes; } op->done = nop_done; return true; } bool sna_tiling_blt_copy_boxes(struct sna *sna, uint8_t alu, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, int bpp, const BoxRec *box, int nbox) { RegionRec region, tile, this; struct kgem_bo *bo; int max_size, step; bool ret = false; DBG(("%s: alu=%d, src size=%d, dst size=%d\n", __FUNCTION__, alu, kgem_bo_size(src_bo), kgem_bo_size(dst_bo))); if (wedged(sna) || !kgem_bo_can_blt(&sna->kgem, src_bo) || !kgem_bo_can_blt(&sna->kgem, dst_bo)) { /* XXX */ DBG(("%s: tiling blt fail: src?=%d, dst?=%d\n", __FUNCTION__, kgem_bo_can_blt(&sna->kgem, src_bo), kgem_bo_can_blt(&sna->kgem, dst_bo))); return false; } max_size = sna_max_tile_copy_size(sna, src_bo, dst_bo); if (max_size == 0) return false; pixman_region_init_rects(®ion, box, nbox); /* Use a small step to accommodate enlargement through tile alignment */ step = sna->render.max_3d_size; if (region.extents.x1 & (8*512 / bpp - 1) || region.extents.y1 & 63) step /= 2; while (step * step * 4 > max_size) step /= 2; if (sna->kgem.gen < 033) step /= 2; /* accommodate severe fence restrictions */ if (step == 0) { DBG(("%s: tiles cannot fit into aperture\n", __FUNCTION__)); return false; } DBG(("%s (alu=%d), tile.size=%d, box=%dx[(%d, %d), (%d, %d)])\n", __FUNCTION__, alu, step, nbox, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); for (tile.extents.y1 = tile.extents.y2 = region.extents.y1; tile.extents.y2 < region.extents.y2; tile.extents.y1 = tile.extents.y2) { int y2 = tile.extents.y1 + step; if (y2 > region.extents.y2) y2 = region.extents.y2; tile.extents.y2 = y2; for (tile.extents.x1 = tile.extents.x2 = region.extents.x1; tile.extents.x2 < region.extents.x2; tile.extents.x1 = tile.extents.x2) { int w, h; int x2 = tile.extents.x1 + step; if (x2 > region.extents.x2) x2 = region.extents.x2; tile.extents.x2 = x2; tile.data = NULL; RegionNull(&this); RegionIntersect(&this, ®ion, &tile); if (RegionNil(&this)) continue; w = this.extents.x2 - this.extents.x1; h = this.extents.y2 - this.extents.y1; bo = kgem_create_2d(&sna->kgem, w, h, bpp, kgem_choose_tiling(&sna->kgem, I915_TILING_X, w, h, bpp), CREATE_TEMPORARY); if (bo) { int16_t dx = this.extents.x1; int16_t dy = this.extents.y1; assert(kgem_bo_can_blt(&sna->kgem, bo)); if (!sna_blt_copy_boxes(sna, GXcopy, src_bo, src_dx, src_dy, bo, -dx, -dy, bpp, region_rects(&this), region_num_rects(&this))) goto err; if (!sna_blt_copy_boxes(sna, alu, bo, -dx, -dy, dst_bo, dst_dx, dst_dy, bpp, region_rects(&this), region_num_rects(&this))) goto err; kgem_bo_destroy(&sna->kgem, bo); } RegionUninit(&this); } } ret = true; goto done; err: kgem_bo_destroy(&sna->kgem, bo); RegionUninit(&this); done: pixman_region_fini(®ion); return ret; } bool sna_tiling_copy_boxes(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n) { BoxRec extents, tile, stack[64], *clipped, *c; DrawableRec p; int i, step, tiling; bool create = true; bool ret = false; extents = box[0]; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } tiling = I915_TILING_X; if (!kgem_bo_can_blt(&sna->kgem, src_bo) || !kgem_bo_can_blt(&sna->kgem, dst_bo)) tiling = I915_TILING_Y; create = (src_bo->pitch > sna->render.max_3d_pitch || dst_bo->pitch > sna->render.max_3d_pitch); step = sna->render.max_3d_size / 2; if (create) { while (step * step * 4 > sna->kgem.max_upload_tile_size) step /= 2; } DBG(("%s: tiling copy %dx%d, %s %dx%d %c tiles\n", __FUNCTION__, extents.x2-extents.x1, extents.y2-extents.y1, create ? "creating" : "using", step, step, tiling == I915_TILING_X ? 'X' : 'Y')); if (n > ARRAY_SIZE(stack)) { clipped = malloc(sizeof(BoxRec) * n); if (clipped == NULL) goto tiled_error; } else clipped = stack; p.depth = src->depth; p.bitsPerPixel = src->bitsPerPixel; for (tile.y1 = extents.y1; tile.y1 < extents.y2; tile.y1 = tile.y2) { int y2 = tile.y1 + step; if (y2 > extents.y2) y2 = extents.y2; tile.y2 = y2; for (tile.x1 = extents.x1; tile.x1 < extents.x2; tile.x1 = tile.x2) { struct kgem_bo *tmp_bo; int x2 = tile.x1 + step; if (x2 > extents.x2) x2 = extents.x2; tile.x2 = x2; c = clipped; for (i = 0; i < n; i++) { *c = box[i]; if (!box_intersect(c, &tile)) continue; DBG(("%s: box(%d, %d), (%d, %d), src=(%d, %d), dst=(%d, %d)\n", __FUNCTION__, c->x1, c->y1, c->x2, c->y2, src_dx, src_dy, c->x1 - tile.x1, c->y1 - tile.y1)); c++; } if (c == clipped) continue; p.width = tile.x2 - tile.x1; p.height = tile.y2 - tile.y1; DBG(("%s: tile (%d, %d), (%d, %d)\n", __FUNCTION__, tile.x1, tile.y1, tile.x2, tile.y2)); if (create) { tmp_bo = kgem_create_2d(&sna->kgem, p.width, p.height, p.bitsPerPixel, tiling, CREATE_TEMPORARY); if (!tmp_bo) goto tiled_error; i = (sna->render.copy_boxes(sna, GXcopy, src, src_bo, src_dx, src_dy, &p, tmp_bo, -tile.x1, -tile.y1, clipped, c - clipped, 0) && sna->render.copy_boxes(sna, alu, &p, tmp_bo, -tile.x1, -tile.y1, dst, dst_bo, dst_dx, dst_dy, clipped, c - clipped, 0)); kgem_bo_destroy(&sna->kgem, tmp_bo); } else { i = sna->render.copy_boxes(sna, GXcopy, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, clipped, c - clipped, 0); } if (!i) goto tiled_error; } } ret = true; tiled_error: if (clipped != stack) free(clipped); return ret; } xf86-video-intel-2.99.917/src/sna/sna_display_fake.c0000664000175000017500000002073712432737457016766 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" static bool add_fake_output(struct sna *sna, bool late); static void sna_crtc_dpms(xf86CrtcPtr crtc, int mode) { } static char *outputs_for_crtc(xf86CrtcPtr crtc, char *outputs, int max) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(crtc->scrn); int len, i; for (i = len = 0; i < config->num_output; i++) { xf86OutputPtr output = config->output[i]; if (output->crtc != crtc) continue; len += snprintf(outputs+len, max-len, "%s, ", output->name); } assert(len >= 2); outputs[len-2] = '\0'; return outputs; } static const char *rotation_to_str(Rotation rotation) { switch (rotation & RR_Rotate_All) { case 0: case RR_Rotate_0: return "normal"; case RR_Rotate_90: return "left"; case RR_Rotate_180: return "inverted"; case RR_Rotate_270: return "right"; default: return "unknown"; } } static const char *reflection_to_str(Rotation rotation) { switch (rotation & RR_Reflect_All) { case 0: return "none"; case RR_Reflect_X: return "X axis"; case RR_Reflect_Y: return "Y axis"; case RR_Reflect_X | RR_Reflect_Y: return "X and Y axes"; default: return "invalid"; } } static Bool sna_crtc_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode, Rotation rotation, int x, int y) { char outputs[256]; xf86DrvMsg(crtc->scrn->scrnIndex, X_INFO, "switch to mode %dx%d on %s, position (%d, %d), rotation %s, reflection %s\n", mode->HDisplay, mode->VDisplay, outputs_for_crtc(crtc, outputs, sizeof(outputs)), x, y, rotation_to_str(rotation), reflection_to_str(rotation)); return TRUE; } static void sna_crtc_gamma_set(xf86CrtcPtr crtc, CARD16 *red, CARD16 *green, CARD16 *blue, int size) { } static void sna_crtc_destroy(xf86CrtcPtr crtc) { } static const xf86CrtcFuncsRec sna_crtc_funcs = { .dpms = sna_crtc_dpms, .set_mode_major = sna_crtc_set_mode_major, .gamma_set = sna_crtc_gamma_set, .destroy = sna_crtc_destroy, }; static void sna_output_create_resources(xf86OutputPtr output) { } static Bool sna_output_set_property(xf86OutputPtr output, Atom property, RRPropertyValuePtr value) { return TRUE; } static Bool sna_output_get_property(xf86OutputPtr output, Atom property) { return FALSE; } static void sna_output_dpms(xf86OutputPtr output, int dpms) { } static xf86OutputStatus sna_output_detect(xf86OutputPtr output) { DBG(("%s(%s) has user modes? %d\n", __FUNCTION__, output->name, output->randr_output && output->randr_output->numUserModes)); if (output->randr_output && output->randr_output->numUserModes) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(output->scrn); if (xf86_config->output[xf86_config->num_output-1] == output) add_fake_output(to_sna(output->scrn), true); return XF86OutputStatusConnected; } return XF86OutputStatusDisconnected; } static Bool sna_output_mode_valid(xf86OutputPtr output, DisplayModePtr mode) { if (mode->type & M_T_DEFAULT) return MODE_BAD; return MODE_OK; } static DisplayModePtr sna_output_get_modes(xf86OutputPtr output) { return NULL; } static void sna_output_destroy(xf86OutputPtr output) { } static const xf86OutputFuncsRec sna_output_funcs = { .create_resources = sna_output_create_resources, #ifdef RANDR_12_INTERFACE .set_property = sna_output_set_property, .get_property = sna_output_get_property, #endif .dpms = sna_output_dpms, .detect = sna_output_detect, .mode_valid = sna_output_mode_valid, .get_modes = sna_output_get_modes, .destroy = sna_output_destroy }; static Bool sna_mode_resize(ScrnInfoPtr scrn, int width, int height) { ScreenPtr screen = scrn->pScreen; PixmapPtr new_front; DBG(("%s (%d, %d) -> (%d, %d)\n", __FUNCTION__, scrn->virtualX, scrn->virtualY, width, height)); if (scrn->virtualX == width && scrn->virtualY == height) return TRUE; assert(to_sna_from_screen(screen)->front); assert(screen->GetScreenPixmap(screen) == to_sna_from_screen(screen)->front); DBG(("%s: creating new framebuffer %dx%d\n", __FUNCTION__, width, height)); new_front = screen->CreatePixmap(screen, width, height, scrn->depth, 0); if (!new_front) return FALSE; scrn->virtualX = width; scrn->virtualY = height; scrn->displayWidth = width; screen->SetScreenPixmap(new_front); assert(screen->GetScreenPixmap(screen) == new_front); assert(to_sna_from_screen(screen)->front == new_front); screen->DestroyPixmap(new_front); return TRUE; } static const xf86CrtcConfigFuncsRec sna_mode_funcs = { sna_mode_resize }; static bool add_fake_output(struct sna *sna, bool late) { ScrnInfoPtr scrn = sna->scrn; xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); xf86OutputPtr output; xf86CrtcPtr crtc; RROutputPtr clones[32]; RRCrtcPtr crtcs[32]; char buf[80]; int i, len; if (sna->mode.num_fake >= 32) return false; DBG(("%s(late=%d, num_fake=%d)\n", __FUNCTION__, late, sna->mode.num_fake+1)); crtc = xf86CrtcCreate(scrn, &sna_crtc_funcs); if (crtc == NULL) return false; len = sprintf(buf, "VIRTUAL%d", sna->mode.num_fake+1); output = xf86OutputCreate(scrn, &sna_output_funcs, buf); if (!output) { xf86CrtcDestroy(crtc); return false; } output->mm_width = 0; output->mm_height = 0; output->interlaceAllowed = FALSE; output->subpixel_order = SubPixelNone; output->possible_crtcs = ~((1 << sna->mode.num_real_crtc) - 1); output->possible_clones = ~((1 << sna->mode.num_real_output) - 1); if (late) { ScreenPtr screen = xf86ScrnToScreen(scrn); crtc->randr_crtc = RRCrtcCreate(screen, crtc); output->randr_output = RROutputCreate(screen, buf, len, output); if (crtc->randr_crtc == NULL || output->randr_output == NULL) { xf86OutputDestroy(output); xf86CrtcDestroy(crtc); return false; } RRPostPendingProperties(output->randr_output); for (i = sna->mode.num_real_output; i < xf86_config->num_output; i++) clones[i - sna->mode.num_real_output] = xf86_config->output[i]->randr_output; assert(i - sna->mode.num_real_output == sna->mode.num_fake + 1); for (i = sna->mode.num_real_crtc; i < xf86_config->num_crtc; i++) crtcs[i - sna->mode.num_real_crtc] = xf86_config->crtc[i]->randr_crtc; assert(i - sna->mode.num_real_crtc == sna->mode.num_fake + 1); for (i = sna->mode.num_real_output; i < xf86_config->num_output; i++) { RROutputPtr rr_output = xf86_config->output[i]->randr_output; if (!RROutputSetCrtcs(rr_output, crtcs, sna->mode.num_fake + 1) || !RROutputSetClones(rr_output, clones, sna->mode.num_fake + 1)) goto err; } RRCrtcSetRotations(crtc->randr_crtc, RR_Rotate_All | RR_Reflect_All); } sna->mode.num_fake++; xf86DrvMsg(scrn->scrnIndex, X_INFO, "Enabled output %s\n", output->name); return true; err: for (i = 0; i < xf86_config->num_output; i++) { output = xf86_config->output[i]; if (output->driver_private) continue; xf86OutputDestroy(output); } for (i = 0; i < xf86_config->num_crtc; i++) { crtc = xf86_config->crtc[i]; if (crtc->driver_private) continue; xf86CrtcDestroy(crtc); } sna->mode.num_fake = -1; return false; } bool sna_mode_fake_init(struct sna *sna, int num_fake) { bool ret; if (num_fake == 0) return true; if (sna->mode.num_real_crtc == 0) { xf86CrtcConfigInit(sna->scrn, &sna_mode_funcs); xf86CrtcSetSizeRange(sna->scrn, 1, 1, INT16_MAX, INT16_MAX); } ret = true; while (ret && num_fake--) ret = add_fake_output(sna, false); return ret; } xf86-video-intel-2.99.917/src/sna/sna_trapezoids.c0000664000175000017500000007770612442533616016517 00000000000000/* * Copyright (c) 2007 David Turner * Copyright (c) 2008 M Joonas Pihlaja * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_trapezoids.h" #include "fb/fbpict.h" #include /* TODO: Emit unantialiased and MSAA triangles. */ #ifndef MAX #define MAX(x,y) ((x) >= (y) ? (x) : (y)) #endif #ifndef MIN #define MIN(x,y) ((x) <= (y) ? (x) : (y)) #endif #define region_count(r) ((r)->data ? (r)->data->numRects : 1) #define region_boxes(r) ((r)->data ? (BoxPtr)((r)->data + 1) : &(r)->extents) inline static xFixed line_x_for_y(const xLineFixed *l, xFixed y, bool ceil) { xFixed_32_32 ex = (xFixed_32_32)(y - l->p1.y) * (l->p2.x - l->p1.x); xFixed d = l->p2.y - l->p1.y; if (ceil) ex += (d - 1); return l->p1.x + (xFixed) (ex / d); } bool trapezoids_bounds(int n, const xTrapezoid *t, BoxPtr box) { xFixed x1, y1, x2, y2; /* XXX need 33 bits... */ x1 = y1 = INT_MAX / 2; x2 = y2 = INT_MIN / 2; do { xFixed fx1, fx2, v; if (!xTrapezoidValid(t)) { __DBG(("%s: skipping invalid trapezoid: top=%d, bottom=%d, left=(%d, %d), (%d, %d), right=(%d, %d), (%d, %d)\n", __FUNCTION__, t->top, t->bottom, t->left.p1.x, t->left.p1.y, t->left.p2.x, t->left.p2.y, t->right.p1.x, t->right.p1.y, t->right.p2.x, t->right.p2.y)); continue; } if (t->top < y1) y1 = t->top; if (t->bottom > y2) y2 = t->bottom; if (((t->left.p1.x - x1) | (t->left.p2.x - x1)) < 0) { if (pixman_fixed_floor(t->left.p1.x) == pixman_fixed_floor(t->left.p2.x)) { x1 = pixman_fixed_floor(t->left.p1.x); } else { if (t->left.p1.y == t->top) fx1 = t->left.p1.x; else fx1 = line_x_for_y(&t->left, t->top, false); if (t->left.p2.y == t->bottom) fx2 = t->left.p2.x; else fx2 = line_x_for_y(&t->left, t->bottom, false); v = min(fx1, fx2); if (v < x1) x1 = pixman_fixed_floor(v); } } if (((x2 - t->right.p1.x) | (x2 - t->right.p2.x)) < 0) { if (pixman_fixed_ceil(t->right.p1.x) == pixman_fixed_ceil(t->right.p2.x)) { x2 = pixman_fixed_ceil(t->right.p1.x); } else { if (t->right.p1.y == t->top) fx1 = t->right.p1.x; else fx1 = line_x_for_y(&t->right, t->top, true); if (t->right.p2.y == t->bottom) fx2 = t->right.p2.x; else fx2 = line_x_for_y(&t->right, t->bottom, true); v = max(fx1, fx2); if (v > x2) x2 = pixman_fixed_ceil(v); } } } while (t++, --n); box->x1 = pixman_fixed_to_int(x1); box->x2 = pixman_fixed_to_int(x2); box->y1 = pixman_fixed_integer_floor(y1); box->y2 = pixman_fixed_integer_ceil(y2); return box->x2 > box->x1 && box->y2 > box->y1; } static bool trapezoids_inplace_fallback(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr mask, int ntrap, xTrapezoid *traps) { pixman_image_t *image; BoxRec box; uint32_t color; int dx, dy; if (op != PictOpAdd) return false; if (is_mono(dst, mask)) { if (dst->format != PICT_a1) return false; } else { if (dst->format != PICT_a8) return false; } if (!sna_picture_is_solid(src, &color) || (color >> 24) != 0xff) { DBG(("%s: not an opaque solid source\n", __FUNCTION__)); return false; } box.x1 = dst->pDrawable->x; box.y1 = dst->pDrawable->y; box.x2 = dst->pDrawable->width; box.y2 = dst->pDrawable->height; if (pixman_region_contains_rectangle(dst->pCompositeClip, &box) != PIXMAN_REGION_IN) { DBG(("%s: requires clipping, drawable (%d,%d), (%d, %d), clip (%d, %d), (%d, %d)\n", __FUNCTION__, box.x1, box.y1, box.x2, box.y2, dst->pCompositeClip->extents.x1, dst->pCompositeClip->extents.y1, dst->pCompositeClip->extents.x2, dst->pCompositeClip->extents.y2)); return false; } if (is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS)) { DBG(("%s: not performing inplace as dst is already on the GPU\n", __FUNCTION__)); return false; } DBG(("%s\n", __FUNCTION__)); image = NULL; if (sna_drawable_move_to_cpu(dst->pDrawable, MOVE_READ | MOVE_WRITE)) image = image_from_pict(dst, false, &dx, &dy); if (image) { dx += dst->pDrawable->x; dy += dst->pDrawable->y; if (sigtrap_get() == 0) { for (; ntrap; ntrap--, traps++) if (xTrapezoidValid(traps)) pixman_rasterize_trapezoid(image, (pixman_trapezoid_t *)traps, dx, dy); sigtrap_put(); } pixman_image_unref(image); } return true; } struct rasterize_traps_thread { xTrapezoid *traps; char *ptr; int stride; BoxRec bounds; pixman_format_code_t format; int ntrap; }; static void rasterize_traps_thread(void *arg) { struct rasterize_traps_thread *thread = arg; pixman_image_t *image; int width, height, n; width = thread->bounds.x2 - thread->bounds.x1; height = thread->bounds.y2 - thread->bounds.y1; memset(thread->ptr, 0, thread->stride*height); if (PIXMAN_FORMAT_DEPTH(thread->format) < 8) image = pixman_image_create_bits(thread->format, width, height, NULL, 0); else image = pixman_image_create_bits(thread->format, width, height, (uint32_t *)thread->ptr, thread->stride); if (image == NULL) return; for (n = 0; n < thread->ntrap; n++) if (xTrapezoidValid(&thread->traps[n])) pixman_rasterize_trapezoid(image, (pixman_trapezoid_t *)&thread->traps[n], -thread->bounds.x1, -thread->bounds.y1); if (PIXMAN_FORMAT_DEPTH(thread->format) < 8) { pixman_image_t *a8; a8 = pixman_image_create_bits(PIXMAN_a8, width, height, (uint32_t *)thread->ptr, thread->stride); if (a8) { pixman_image_composite(PIXMAN_OP_SRC, image, NULL, a8, 0, 0, 0, 0, 0, 0, width, height); pixman_image_unref(a8); } } pixman_image_unref(image); } static void trapezoids_fallback(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int ntrap, xTrapezoid * traps) { ScreenPtr screen = dst->pDrawable->pScreen; if (maskFormat) { PixmapPtr scratch; PicturePtr mask; INT16 dst_x, dst_y; BoxRec bounds; int width, height, depth; pixman_image_t *image; pixman_format_code_t format; int error; trapezoid_origin(&traps[0].left, &dst_x, &dst_y); if (!trapezoids_bounds(ntrap, traps, &bounds)) return; DBG(("%s: bounds (%d, %d), (%d, %d)\n", __FUNCTION__, bounds.x1, bounds.y1, bounds.x2, bounds.y2)); if (!sna_compute_composite_extents(&bounds, src, NULL, dst, xSrc, ySrc, 0, 0, bounds.x1, bounds.y1, bounds.x2 - bounds.x1, bounds.y2 - bounds.y1)) return; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, bounds.x1, bounds.y1, bounds.x2, bounds.y2)); width = bounds.x2 - bounds.x1; height = bounds.y2 - bounds.y1; bounds.x1 -= dst->pDrawable->x; bounds.y1 -= dst->pDrawable->y; bounds.x2 -= dst->pDrawable->x; bounds.y2 -= dst->pDrawable->y; depth = maskFormat->depth; if (depth == 1) { format = PIXMAN_a1; } else if (depth <= 4) { format = PIXMAN_a4; depth = 4; } else format = PIXMAN_a8; DBG(("%s: mask (%dx%d) depth=%d, format=%08x\n", __FUNCTION__, width, height, depth, format)); if (is_gpu(sna, dst->pDrawable, PREFER_GPU_RENDER) || picture_is_gpu(sna, src, PREFER_GPU_RENDER)) { int num_threads; scratch = sna_pixmap_create_upload(screen, width, height, 8, KGEM_BUFFER_WRITE); if (!scratch) return; num_threads = sna_use_threads(width, height, 8); if (num_threads == 1) { if (depth < 8) { image = pixman_image_create_bits(format, width, height, NULL, 0); } else { memset(scratch->devPrivate.ptr, 0, scratch->devKind*height); image = pixman_image_create_bits(format, width, height, scratch->devPrivate.ptr, scratch->devKind); } if (image) { for (; ntrap; ntrap--, traps++) if (xTrapezoidValid(traps)) pixman_rasterize_trapezoid(image, (pixman_trapezoid_t *)traps, -bounds.x1, -bounds.y1); if (depth < 8) { pixman_image_t *a8; a8 = pixman_image_create_bits(PIXMAN_a8, width, height, scratch->devPrivate.ptr, scratch->devKind); if (a8) { pixman_image_composite(PIXMAN_OP_SRC, image, NULL, a8, 0, 0, 0, 0, 0, 0, width, height); format = PIXMAN_a8; depth = 8; pixman_image_unref(a8); } } pixman_image_unref(image); } if (format != PIXMAN_a8) { sna_pixmap_destroy(scratch); return; } } else { struct rasterize_traps_thread threads[num_threads]; int y, dy, n; threads[0].ptr = scratch->devPrivate.ptr; threads[0].stride = scratch->devKind; threads[0].traps = traps; threads[0].ntrap = ntrap; threads[0].bounds = bounds; threads[0].format = format; y = bounds.y1; dy = (height + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * dy >= bounds.y2 - bounds.y1; if (sigtrap_get() == 0) { for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].ptr += (y - bounds.y1) * threads[n].stride; threads[n].bounds.y1 = y; threads[n].bounds.y2 = y += dy; sna_threads_run(n, rasterize_traps_thread, &threads[n]); } assert(y < threads[0].bounds.y2); threads[0].ptr += (y - bounds.y1) * threads[0].stride; threads[0].bounds.y1 = y; rasterize_traps_thread(&threads[0]); sna_threads_wait(); sigtrap_put(); } else sna_threads_kill(); format = PIXMAN_a8; depth = 8; } } else { scratch = sna_pixmap_create_unattached(screen, width, height, depth); if (!scratch) return; memset(scratch->devPrivate.ptr, 0, scratch->devKind*height); image = pixman_image_create_bits(format, width, height, scratch->devPrivate.ptr, scratch->devKind); if (image) { for (; ntrap; ntrap--, traps++) if (xTrapezoidValid(traps)) pixman_rasterize_trapezoid(image, (pixman_trapezoid_t *)traps, -bounds.x1, -bounds.y1); pixman_image_unref(image); } } mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, depth, format), 0, 0, serverClient, &error); if (mask) { CompositePicture(op, src, mask, dst, xSrc + bounds.x1 - dst_x, ySrc + bounds.y1 - dst_y, 0, 0, bounds.x1, bounds.y1, width, height); FreePicture(mask, 0); } sna_pixmap_destroy(scratch); } else { if (dst->polyEdge == PolyEdgeSharp) maskFormat = PictureMatchFormat(screen, 1, PICT_a1); else maskFormat = PictureMatchFormat(screen, 8, PICT_a8); for (; ntrap; ntrap--, traps++) trapezoids_fallback(sna, op, src, dst, maskFormat, xSrc, ySrc, 1, traps); } } static bool trapezoid_spans_maybe_inplace(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat) { struct sna_pixmap *priv; if (NO_SCAN_CONVERTER) return false; if (dst->alphaMap) return false; if (is_mono(dst, maskFormat)) goto out; switch ((int)dst->format) { case PICT_a8: if (!sna_picture_is_solid(src, NULL)) return false; switch (op) { case PictOpIn: case PictOpAdd: case PictOpSrc: break; default: return false; } break; case PICT_x8r8g8b8: case PICT_a8r8g8b8: if (picture_is_gpu(sna, src, 0)) return false; switch (op) { case PictOpOver: case PictOpAdd: case PictOpOutReverse: break; case PictOpSrc: if (sna_picture_is_solid(src, NULL)) break; if (!sna_drawable_is_clear(dst->pDrawable)) return false; break; default: return false; } break; default: return false; } out: priv = sna_pixmap_from_drawable(dst->pDrawable); if (priv == NULL) { DBG(("%s? yes -- unattached\n", __FUNCTION__)); return true; } if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) { DBG(("%s? no -- CPU bo is busy\n", __FUNCTION__)); return false; } if (DAMAGE_IS_ALL(priv->cpu_damage) || priv->gpu_damage == NULL) { DBG(("%s? yes -- damaged on CPU only (all? %d)\n", __FUNCTION__, DAMAGE_IS_ALL(priv->cpu_damage))); return true; } if (priv->clear) { DBG(("%s? clear, %s\n", __FUNCTION__, dst->pDrawable->width <= TOR_INPLACE_SIZE ? "yes" : "no")); return dst->pDrawable->width <= TOR_INPLACE_SIZE; } if (kgem_bo_is_busy(priv->gpu_bo)) { DBG(("%s? no, GPU bo is busy\n", __FUNCTION__)); return false; } if (priv->cpu_damage) { DBG(("%s? yes, idle GPU bo and damage on idle CPU\n", __FUNCTION__)); return true; } DBG(("%s? small enough? %s\n", __FUNCTION__, dst->pDrawable->width <= TOR_INPLACE_SIZE ? "yes" : "no")); return dst->pDrawable->width <= TOR_INPLACE_SIZE; } void sna_composite_trapezoids(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int ntrap, xTrapezoid *traps) { PixmapPtr pixmap = get_drawable_pixmap(dst->pDrawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv; bool force_fallback = false; bool rectilinear, pixel_aligned; unsigned flags; int n; DBG(("%s(op=%d, src=(%d, %d), mask=%08x, ntrap=%d)\n", __FUNCTION__, op, xSrc, ySrc, maskFormat ? (int)maskFormat->format : 0, ntrap)); if (ntrap == 0) return; if (NO_ACCEL) goto force_fallback; if (FORCE_FALLBACK > 0) goto force_fallback; if (wedged(sna)) { DBG(("%s: fallback -- wedged\n", __FUNCTION__)); goto force_fallback; } if (dst->alphaMap) { DBG(("%s: fallback -- dst alpha map\n", __FUNCTION__)); goto force_fallback; } priv = sna_pixmap(pixmap); if (priv == NULL) { DBG(("%s: fallback -- dst is unattached\n", __FUNCTION__)); goto force_fallback; } if (FORCE_FALLBACK == 0 && !is_gpu_dst(priv) && !picture_is_gpu(sna, src, 0) && untransformed(src)) { DBG(("%s: force fallbacks -- (!gpu dst, %dx%d? %d) && (src-is-cpu? %d && untransformed? %d)\n", __FUNCTION__, dst->pDrawable->width, dst->pDrawable->height, !is_gpu_dst(priv), !picture_is_gpu(sna, src, 0), untransformed(src))); force_fallback: force_fallback = true; } /* scan through for fast rectangles */ rectilinear = pixel_aligned = true; if (is_mono(dst, maskFormat)) { for (n = 0; n < ntrap && rectilinear; n++) { int lx1 = pixman_fixed_to_int(traps[n].left.p1.x + pixman_fixed_1_minus_e/2); int lx2 = pixman_fixed_to_int(traps[n].left.p2.x + pixman_fixed_1_minus_e/2); int rx1 = pixman_fixed_to_int(traps[n].right.p1.x + pixman_fixed_1_minus_e/2); int rx2 = pixman_fixed_to_int(traps[n].right.p2.x + pixman_fixed_1_minus_e/2); rectilinear &= lx1 == lx2 && rx1 == rx2; } } else if (dst->polyMode != PolyModePrecise) { for (n = 0; n < ntrap && rectilinear; n++) { int lx1 = pixman_fixed_to_fast(traps[n].left.p1.x); int lx2 = pixman_fixed_to_fast(traps[n].left.p2.x); int rx1 = pixman_fixed_to_fast(traps[n].right.p1.x); int rx2 = pixman_fixed_to_fast(traps[n].right.p2.x); int top = pixman_fixed_to_fast(traps[n].top); int bot = pixman_fixed_to_fast(traps[n].bottom); rectilinear &= lx1 == lx2 && rx1 == rx2; pixel_aligned &= ((top | bot | lx1 | lx2 | rx1 | rx2) & FAST_SAMPLES_mask) == 0; } } else { for (n = 0; n < ntrap && rectilinear; n++) { rectilinear &= traps[n].left.p1.x == traps[n].left.p2.x && traps[n].right.p1.x == traps[n].right.p2.x; pixel_aligned &= ((traps[n].top | traps[n].bottom | traps[n].left.p1.x | traps[n].left.p2.x | traps[n].right.p1.x | traps[n].right.p2.x) & pixman_fixed_1_minus_e) == 0; } } DBG(("%s: rectilinear? %d, pixel-aligned? %d, mono? %d precise? %d\n", __FUNCTION__, rectilinear, pixel_aligned, is_mono(dst, maskFormat), is_precise(dst, maskFormat))); flags = 0; if (rectilinear) { if (pixel_aligned) { if (composite_aligned_boxes(sna, op, src, dst, maskFormat, xSrc, ySrc, ntrap, traps, force_fallback)) return; } else { if (composite_unaligned_boxes(sna, op, src, dst, maskFormat, xSrc, ySrc, ntrap, traps, force_fallback)) return; } flags |= COMPOSITE_SPANS_RECTILINEAR; } if (force_fallback) goto fallback; if (is_mono(dst, maskFormat) && mono_trapezoids_span_converter(sna, op, src, dst, xSrc, ySrc, ntrap, traps)) return; if (trapezoid_spans_maybe_inplace(sna, op, src, dst, maskFormat)) { flags |= COMPOSITE_SPANS_INPLACE_HINT; if (trapezoid_span_inplace(sna, op, src, dst, maskFormat, flags, xSrc, ySrc, ntrap, traps, false)) return; } if (trapezoid_span_converter(sna, op, src, dst, maskFormat, flags, xSrc, ySrc, ntrap, traps)) return; if (trapezoid_span_inplace(sna, op, src, dst, maskFormat, flags, xSrc, ySrc, ntrap, traps, false)) return; if (trapezoid_mask_converter(op, src, dst, maskFormat, flags, xSrc, ySrc, ntrap, traps)) return; fallback: if (trapezoid_span_inplace(sna, op, src, dst, maskFormat, flags, xSrc, ySrc, ntrap, traps, true)) return; if (trapezoid_span_fallback(op, src, dst, maskFormat, flags, xSrc, ySrc, ntrap, traps)) return; if (trapezoids_inplace_fallback(sna, op, src, dst, maskFormat, ntrap, traps)) return; DBG(("%s: fallback mask=%08x, ntrap=%d\n", __FUNCTION__, maskFormat ? (unsigned)maskFormat->format : 0, ntrap)); trapezoids_fallback(sna, op, src, dst, maskFormat, xSrc, ySrc, ntrap, traps); } static void mark_damaged(PixmapPtr pixmap, struct sna_pixmap *priv, BoxPtr box, int16_t x, int16_t y) { box->x1 += x; box->x2 += x; box->y1 += y; box->y2 += y; if (box->x1 <= 0 && box->y1 <= 0 && box->x2 >= pixmap->drawable.width && box->y2 >= pixmap->drawable.height) { sna_damage_destroy(&priv->cpu_damage); sna_damage_all(&priv->gpu_damage, pixmap); list_del(&priv->flush_list); } else { sna_damage_add_box(&priv->gpu_damage, box); sna_damage_subtract_box(&priv->cpu_damage, box); } } static bool trap_upload(PicturePtr picture, INT16 x, INT16 y, int ntrap, xTrap *trap) { ScreenPtr screen = picture->pDrawable->pScreen; struct sna *sna = to_sna_from_screen(screen); PixmapPtr pixmap = get_drawable_pixmap(picture->pDrawable); PixmapPtr scratch; struct sna_pixmap *priv; BoxRec extents; pixman_image_t *image; int width, height, depth; int n; priv = sna_pixmap_move_to_gpu(pixmap, MOVE_READ | MOVE_WRITE); if (priv == NULL) return false; extents = *RegionExtents(picture->pCompositeClip); for (n = 0; n < ntrap; n++) { int v; v = x + pixman_fixed_integer_floor (MIN(trap[n].top.l, trap[n].bot.l)); if (v < extents.x1) extents.x1 = v; v = x + pixman_fixed_integer_ceil (MAX(trap[n].top.r, trap[n].bot.r)); if (v > extents.x2) extents.x2 = v; v = y + pixman_fixed_integer_floor (trap[n].top.y); if (v < extents.y1) extents.y1 = v; v = y + pixman_fixed_integer_ceil (trap[n].bot.y); if (v > extents.y2) extents.y2 = v; } DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); width = extents.x2 - extents.x1; height = extents.y2 - extents.y1; depth = picture->pDrawable->depth; DBG(("%s: tmp (%dx%d) depth=%d\n", __FUNCTION__, width, height, depth)); scratch = sna_pixmap_create_upload(screen, width, height, depth, KGEM_BUFFER_WRITE); if (!scratch) return true; memset(scratch->devPrivate.ptr, 0, scratch->devKind*height); image = pixman_image_create_bits((pixman_format_code_t)picture->format, width, height, scratch->devPrivate.ptr, scratch->devKind); if (image) { pixman_add_traps (image, -extents.x1, -extents.y1, ntrap, (pixman_trap_t *)trap); pixman_image_unref(image); } /* XXX clip boxes */ get_drawable_deltas(picture->pDrawable, pixmap, &x, &y); sna->render.copy_boxes(sna, GXcopy, &scratch->drawable, __sna_pixmap_get_bo(scratch), -extents.x1, -extents.x1, &pixmap->drawable, priv->gpu_bo, x, y, &extents, 1, 0); mark_damaged(pixmap, priv, &extents, x, y); sna_pixmap_destroy(scratch); return true; } void sna_add_traps(PicturePtr picture, INT16 x, INT16 y, int n, xTrap *t) { PixmapPtr pixmap = get_drawable_pixmap(picture->pDrawable); struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv = sna_pixmap(pixmap); DBG(("%s (%d, %d) x %d\n", __FUNCTION__, x, y, n)); if (priv && is_gpu_dst(priv)) { if (trap_span_converter(sna, picture, x, y, n, t)) return; } if (is_gpu(sna, picture->pDrawable, PREFER_GPU_RENDER)) { if (trap_mask_converter(sna, picture, x, y, n, t)) return; if (trap_upload(picture, x, y, n, t)) return; } DBG(("%s -- fallback\n", __FUNCTION__)); if (sna_pixmap_move_to_cpu(pixmap, MOVE_READ | MOVE_WRITE)) { pixman_image_t *image; int dx, dy; if (!(image = image_from_pict(picture, false, &dx, &dy))) return; if (sigtrap_get() == 0) { pixman_add_traps(image, x + dx, y + dy, n, (pixman_trap_t *)t); sigtrap_put(); } free_pixman_pict(picture, image); } } #if HAS_PIXMAN_TRIANGLES static void triangles_fallback(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int n, xTriangle *tri) { ScreenPtr screen = dst->pDrawable->pScreen; DBG(("%s op=%d, count=%d\n", __FUNCTION__, op, n)); if (maskFormat) { PixmapPtr scratch; PicturePtr mask; INT16 dst_x, dst_y; BoxRec bounds; int width, height, depth; pixman_image_t *image; pixman_format_code_t format; int error; dst_x = pixman_fixed_to_int(tri[0].p1.x); dst_y = pixman_fixed_to_int(tri[0].p1.y); miTriangleBounds(n, tri, &bounds); DBG(("%s: bounds (%d, %d), (%d, %d)\n", __FUNCTION__, bounds.x1, bounds.y1, bounds.x2, bounds.y2)); if (bounds.y1 >= bounds.y2 || bounds.x1 >= bounds.x2) return; if (!sna_compute_composite_extents(&bounds, src, NULL, dst, xSrc, ySrc, 0, 0, bounds.x1, bounds.y1, bounds.x2 - bounds.x1, bounds.y2 - bounds.y1)) return; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, bounds.x1, bounds.y1, bounds.x2, bounds.y2)); width = bounds.x2 - bounds.x1; height = bounds.y2 - bounds.y1; bounds.x1 -= dst->pDrawable->x; bounds.y1 -= dst->pDrawable->y; depth = maskFormat->depth; format = maskFormat->format | (BitsPerPixel(depth) << 24); DBG(("%s: mask (%dx%d) depth=%d, format=%08x\n", __FUNCTION__, width, height, depth, format)); scratch = sna_pixmap_create_upload(screen, width, height, depth, KGEM_BUFFER_WRITE); if (!scratch) return; memset(scratch->devPrivate.ptr, 0, (size_t)scratch->devKind*height); image = pixman_image_create_bits(format, width, height, scratch->devPrivate.ptr, scratch->devKind); if (image) { pixman_add_triangles(image, -bounds.x1, -bounds.y1, n, (pixman_triangle_t *)tri); pixman_image_unref(image); } mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, depth, format), 0, 0, serverClient, &error); if (mask) { CompositePicture(op, src, mask, dst, xSrc + bounds.x1 - dst_x, ySrc + bounds.y1 - dst_y, 0, 0, bounds.x1, bounds.y1, width, height); FreePicture(mask, 0); } sna_pixmap_destroy(scratch); } else { if (dst->polyEdge == PolyEdgeSharp) maskFormat = PictureMatchFormat(screen, 1, PICT_a1); else maskFormat = PictureMatchFormat(screen, 8, PICT_a8); for (; n--; tri++) triangles_fallback(op, src, dst, maskFormat, xSrc, ySrc, 1, tri); } } void sna_composite_triangles(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int n, xTriangle *tri) { struct sna *sna = to_sna_from_drawable(dst->pDrawable); if (triangles_span_converter(sna, op, src, dst, maskFormat, xSrc, ySrc, n, tri)) return; if (triangles_mask_converter(op, src, dst, maskFormat, xSrc, ySrc, n, tri)) return; triangles_fallback(op, src, dst, maskFormat, xSrc, ySrc, n, tri); } static void tristrip_fallback(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int n, xPointFixed *points) { ScreenPtr screen = dst->pDrawable->pScreen; if (maskFormat) { PixmapPtr scratch; PicturePtr mask; INT16 dst_x, dst_y; BoxRec bounds; int width, height, depth; pixman_image_t *image; pixman_format_code_t format; int error; dst_x = pixman_fixed_to_int(points->x); dst_y = pixman_fixed_to_int(points->y); miPointFixedBounds(n, points, &bounds); DBG(("%s: bounds (%d, %d), (%d, %d)\n", __FUNCTION__, bounds.x1, bounds.y1, bounds.x2, bounds.y2)); if (bounds.y1 >= bounds.y2 || bounds.x1 >= bounds.x2) return; if (!sna_compute_composite_extents(&bounds, src, NULL, dst, xSrc, ySrc, 0, 0, bounds.x1, bounds.y1, bounds.x2 - bounds.x1, bounds.y2 - bounds.y1)) return; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, bounds.x1, bounds.y1, bounds.x2, bounds.y2)); width = bounds.x2 - bounds.x1; height = bounds.y2 - bounds.y1; bounds.x1 -= dst->pDrawable->x; bounds.y1 -= dst->pDrawable->y; depth = maskFormat->depth; format = maskFormat->format | (BitsPerPixel(depth) << 24); DBG(("%s: mask (%dx%d) depth=%d, format=%08x\n", __FUNCTION__, width, height, depth, format)); scratch = sna_pixmap_create_upload(screen, width, height, depth, KGEM_BUFFER_WRITE); if (!scratch) return; memset(scratch->devPrivate.ptr, 0, scratch->devKind*height); image = pixman_image_create_bits(format, width, height, scratch->devPrivate.ptr, scratch->devKind); if (image) { xTriangle tri; xPointFixed *p[3] = { &tri.p1, &tri.p2, &tri.p3 }; int i; *p[0] = points[0]; *p[1] = points[1]; *p[2] = points[2]; pixman_add_triangles(image, -bounds.x1, -bounds.y1, 1, (pixman_triangle_t *)&tri); for (i = 3; i < n; i++) { *p[i%3] = points[i]; pixman_add_triangles(image, -bounds.x1, -bounds.y1, 1, (pixman_triangle_t *)&tri); } pixman_image_unref(image); } mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, depth, format), 0, 0, serverClient, &error); if (mask) { CompositePicture(op, src, mask, dst, xSrc + bounds.x1 - dst_x, ySrc + bounds.y1 - dst_y, 0, 0, bounds.x1, bounds.y1, width, height); FreePicture(mask, 0); } sna_pixmap_destroy(scratch); } else { xTriangle tri; xPointFixed *p[3] = { &tri.p1, &tri.p2, &tri.p3 }; int i; if (dst->polyEdge == PolyEdgeSharp) maskFormat = PictureMatchFormat(screen, 1, PICT_a1); else maskFormat = PictureMatchFormat(screen, 8, PICT_a8); *p[0] = points[0]; *p[1] = points[1]; *p[2] = points[2]; triangles_fallback(op, src, dst, maskFormat, xSrc, ySrc, 1, &tri); for (i = 3; i < n; i++) { *p[i%3] = points[i]; /* Should xSrc,ySrc be updated? */ triangles_fallback(op, src, dst, maskFormat, xSrc, ySrc, 1, &tri); } } } void sna_composite_tristrip(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int n, xPointFixed *points) { struct sna *sna = to_sna_from_drawable(dst->pDrawable); if (tristrip_span_converter(sna, op, src, dst, maskFormat, xSrc, ySrc, n, points)) return; tristrip_fallback(op, src, dst, maskFormat, xSrc, ySrc, n, points); } static void trifan_fallback(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int n, xPointFixed *points) { ScreenPtr screen = dst->pDrawable->pScreen; if (maskFormat) { PixmapPtr scratch; PicturePtr mask; INT16 dst_x, dst_y; BoxRec bounds; int width, height, depth; pixman_image_t *image; pixman_format_code_t format; int error; dst_x = pixman_fixed_to_int(points->x); dst_y = pixman_fixed_to_int(points->y); miPointFixedBounds(n, points, &bounds); DBG(("%s: bounds (%d, %d), (%d, %d)\n", __FUNCTION__, bounds.x1, bounds.y1, bounds.x2, bounds.y2)); if (bounds.y1 >= bounds.y2 || bounds.x1 >= bounds.x2) return; if (!sna_compute_composite_extents(&bounds, src, NULL, dst, xSrc, ySrc, 0, 0, bounds.x1, bounds.y1, bounds.x2 - bounds.x1, bounds.y2 - bounds.y1)) return; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, bounds.x1, bounds.y1, bounds.x2, bounds.y2)); width = bounds.x2 - bounds.x1; height = bounds.y2 - bounds.y1; bounds.x1 -= dst->pDrawable->x; bounds.y1 -= dst->pDrawable->y; depth = maskFormat->depth; format = maskFormat->format | (BitsPerPixel(depth) << 24); DBG(("%s: mask (%dx%d) depth=%d, format=%08x\n", __FUNCTION__, width, height, depth, format)); scratch = sna_pixmap_create_upload(screen, width, height, depth, KGEM_BUFFER_WRITE); if (!scratch) return; memset(scratch->devPrivate.ptr, 0, scratch->devKind*height); image = pixman_image_create_bits(format, width, height, scratch->devPrivate.ptr, scratch->devKind); if (image) { xTriangle tri; xPointFixed *p[3] = { &tri.p1, &tri.p2, &tri.p3 }; int i; *p[0] = points[0]; *p[1] = points[1]; *p[2] = points[2]; pixman_add_triangles(image, -bounds.x1, -bounds.y1, 1, (pixman_triangle_t *)&tri); for (i = 3; i < n; i++) { *p[2 - (i&1)] = points[i]; pixman_add_triangles(image, -bounds.x1, -bounds.y1, 1, (pixman_triangle_t *)&tri); } pixman_image_unref(image); } mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, depth, format), 0, 0, serverClient, &error); if (mask) { CompositePicture(op, src, mask, dst, xSrc + bounds.x1 - dst_x, ySrc + bounds.y1 - dst_y, 0, 0, bounds.x1, bounds.y1, width, height); FreePicture(mask, 0); } sna_pixmap_destroy(scratch); } else { xTriangle tri; xPointFixed *p[3] = { &tri.p1, &tri.p2, &tri.p3 }; int i; if (dst->polyEdge == PolyEdgeSharp) maskFormat = PictureMatchFormat(screen, 1, PICT_a1); else maskFormat = PictureMatchFormat(screen, 8, PICT_a8); *p[0] = points[0]; *p[1] = points[1]; *p[2] = points[2]; triangles_fallback(op, src, dst, maskFormat, xSrc, ySrc, 1, &tri); for (i = 3; i < n; i++) { *p[2 - (i&1)] = points[i]; /* Should xSrc,ySrc be updated? */ triangles_fallback(op, src, dst, maskFormat, xSrc, ySrc, 1, &tri); } } } void sna_composite_trifan(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 xSrc, INT16 ySrc, int n, xPointFixed *points) { trifan_fallback(op, src, dst, maskFormat, xSrc, ySrc, n, points); } #endif xf86-video-intel-2.99.917/src/sna/gen7_render.h0000664000175000017500000015224012400044327015647 00000000000000#ifndef GEN7_RENDER_H #define GEN7_RENDER_H #define INTEL_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low)) #define GEN7_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define GEN7_STATE_BASE_ADDRESS GEN7_3D(0, 1, 1) #define GEN7_STATE_SIP GEN7_3D(0, 1, 2) #define GEN7_PIPELINE_SELECT GEN7_3D(1, 1, 4) #define GEN7_MEDIA_STATE_POINTERS GEN7_3D(2, 0, 0) #define GEN7_MEDIA_OBJECT GEN7_3D(2, 1, 0) #define GEN7_3DSTATE_VERTEX_BUFFERS GEN7_3D(3, 0, 8) #define GEN7_3DSTATE_VERTEX_ELEMENTS GEN7_3D(3, 0, 9) #define GEN7_3DSTATE_INDEX_BUFFER GEN7_3D(3, 0, 0xa) #define GEN7_3DSTATE_VF_STATISTICS GEN7_3D(3, 0, 0xb) #define GEN7_3DSTATE_DRAWING_RECTANGLE GEN7_3D(3, 1, 0) #define GEN7_3DSTATE_CONSTANT_COLOR GEN7_3D(3, 1, 1) #define GEN7_3DSTATE_SAMPLER_PALETTE_LOAD GEN7_3D(3, 1, 2) #define GEN7_3DSTATE_CHROMA_KEY GEN7_3D(3, 1, 4) #define GEN7_3DSTATE_POLY_STIPPLE_OFFSET GEN7_3D(3, 1, 6) #define GEN7_3DSTATE_POLY_STIPPLE_PATTERN GEN7_3D(3, 1, 7) #define GEN7_3DSTATE_LINE_STIPPLE GEN7_3D(3, 1, 8) #define GEN7_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN7_3D(3, 1, 9) /* These two are BLC and CTG only, not BW or CL */ #define GEN7_3DSTATE_AA_LINE_PARAMS GEN7_3D(3, 1, 0xa) #define GEN7_3DSTATE_GS_SVB_INDEX GEN7_3D(3, 1, 0xb) #define GEN7_3DPRIMITIVE GEN7_3D(3, 3, 0) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS GEN7_3D(3, 0, 0x02) # define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) # define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) # define GEN7_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) #define GEN7_3DSTATE_URB GEN7_3D(3, 0, 0x05) /* DW1 */ # define GEN7_3DSTATE_URB_VS_SIZE_SHIFT 16 # define GEN7_3DSTATE_URB_VS_ENTRIES_SHIFT 0 /* DW2 */ # define GEN7_3DSTATE_URB_GS_ENTRIES_SHIFT 8 # define GEN7_3DSTATE_URB_GS_SIZE_SHIFT 0 #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS GEN7_3D(3, 0, 0x0d) # define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) # define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) # define GEN7_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) #define GEN7_3DSTATE_CC_STATE_POINTERS GEN7_3D(3, 0, 0x0e) #define GEN7_3DSTATE_VS GEN7_3D(3, 0, 0x10) #define GEN7_3DSTATE_GS GEN7_3D(3, 0, 0x11) /* DW4 */ # define GEN7_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 #define GEN7_3DSTATE_CLIP GEN7_3D(3, 0, 0x12) #define GEN7_3DSTATE_SF GEN7_3D(3, 0, 0x13) /* DW1 */ # define GEN7_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 # define GEN7_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN7_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW2 */ /* DW3 */ # define GEN7_3DSTATE_SF_CULL_BOTH (0 << 29) # define GEN7_3DSTATE_SF_CULL_NONE (1 << 29) # define GEN7_3DSTATE_SF_CULL_FRONT (2 << 29) # define GEN7_3DSTATE_SF_CULL_BACK (3 << 29) /* DW4 */ # define GEN7_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 # define GEN7_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 # define GEN7_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 #define GEN7_3DSTATE_WM GEN7_3D(3, 0, 0x14) /* DW1 */ # define GEN7_WM_STATISTICS_ENABLE (1 << 31) # define GEN7_WM_DEPTH_CLEAR (1 << 30) # define GEN7_WM_DISPATCH_ENABLE (1 << 29) # define GEN7_WM_DEPTH_RESOLVE (1 << 28) # define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) # define GEN7_WM_KILL_ENABLE (1 << 25) # define GEN7_WM_PSCDEPTH_OFF (0 << 23) # define GEN7_WM_PSCDEPTH_ON (1 << 23) # define GEN7_WM_PSCDEPTH_ON_GE (2 << 23) # define GEN7_WM_PSCDEPTH_ON_LE (3 << 23) # define GEN7_WM_USES_SOURCE_DEPTH (1 << 20) # define GEN7_WM_USES_SOURCE_W (1 << 19) # define GEN7_WM_POSITION_ZW_PIXEL (0 << 17) # define GEN7_WM_POSITION_ZW_CENTROID (2 << 17) # define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17) # define GEN7_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 16) # define GEN7_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 15) # define GEN7_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 14) # define GEN7_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 13) # define GEN7_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 12) # define GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11) # define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8) # define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6) # define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6) # define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6) # define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6) # define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4) # define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3) # define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2) # define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0) # define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0) # define GEN7_WM_MSRAST_ON_PIXEL (2 << 0) # define GEN7_WM_MSRAST_ON_PATTERN (3 << 0) /* DW2 */ # define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31) #define GEN7_3DSTATE_CONSTANT_VS GEN7_3D(3, 0, 0x15) #define GEN7_3DSTATE_CONSTANT_GS GEN7_3D(3, 0, 0x16) #define GEN7_3DSTATE_CONSTANT_PS GEN7_3D(3, 0, 0x17) #define GEN7_3DSTATE_SAMPLE_MASK GEN7_3D(3, 0, 0x18) #define GEN7_3DSTATE_MULTISAMPLE GEN7_3D(3, 1, 0x0d) /* DW1 */ # define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) # define GEN7_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) # define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define GEN7_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) #define PIPELINE_SELECT_3D 0 #define PIPELINE_SELECT_MEDIA 1 /* for GEN7_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) /* for GEN7_PIPE_CONTROL */ #define GEN7_PIPE_CONTROL GEN7_3D(3, 2, 0) #define GEN7_PIPE_CONTROL_CS_STALL (1 << 20) #define GEN7_PIPE_CONTROL_NOWRITE (0 << 14) #define GEN7_PIPE_CONTROL_WRITE_QWORD (1 << 14) #define GEN7_PIPE_CONTROL_WRITE_DEPTH (2 << 14) #define GEN7_PIPE_CONTROL_WRITE_TIME (3 << 14) #define GEN7_PIPE_CONTROL_DEPTH_STALL (1 << 13) #define GEN7_PIPE_CONTROL_WC_FLUSH (1 << 12) #define GEN7_PIPE_CONTROL_IS_FLUSH (1 << 11) #define GEN7_PIPE_CONTROL_TC_FLUSH (1 << 10) #define GEN7_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) #define GEN7_PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define GEN7_PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define GEN7_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) #define GEN7_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) /* VERTEX_BUFFER_STATE Structure */ #define GEN7_VB0_BUFFER_INDEX_SHIFT 26 #define GEN7_VB0_VERTEXDATA (0 << 20) #define GEN7_VB0_INSTANCEDATA (1 << 20) #define GEN7_VB0_BUFFER_PITCH_SHIFT 0 #define GEN7_VB0_ADDRESS_MODIFY_ENABLE (1 << 14) /* VERTEX_ELEMENT_STATE Structure */ #define GEN7_VE0_VERTEX_BUFFER_INDEX_SHIFT 26 #define GEN7_VE0_VALID (1 << 25) #define GEN7_VE0_FORMAT_SHIFT 16 #define GEN7_VE0_OFFSET_SHIFT 0 #define GEN7_VE1_VFCOMPONENT_0_SHIFT 28 #define GEN7_VE1_VFCOMPONENT_1_SHIFT 24 #define GEN7_VE1_VFCOMPONENT_2_SHIFT 20 #define GEN7_VE1_VFCOMPONENT_3_SHIFT 16 #define GEN7_VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 /* 3DPRIMITIVE bits */ #define GEN7_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) #define GEN7_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) #define GEN7_SVG_CTL 0x7400 #define GEN7_SVG_CTL_GS_BA (0 << 8) #define GEN7_SVG_CTL_SS_BA (1 << 8) #define GEN7_SVG_CTL_IO_BA (2 << 8) #define GEN7_SVG_CTL_GS_AUB (3 << 8) #define GEN7_SVG_CTL_IO_AUB (4 << 8) #define GEN7_SVG_CTL_SIP (5 << 8) #define GEN7_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) #define GEN7_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) #define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) #define GEN7_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) #define GEN7_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) #define GEN7_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) #define GEN7_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) #define GEN7_VF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN7_VF_STRG_VAL 0x7504 #define GEN7_VF_STR_VL_OVR 0x7508 #define GEN7_VF_VC_OVR 0x750c #define GEN7_VF_STR_PSKIP 0x7510 #define GEN7_VF_MAX_PRIM 0x7514 #define GEN7_VF_RDATA 0x7518 #define GEN7_VS_CTL 0x7600 #define GEN7_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) #define GEN7_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) #define GEN7_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) #define GEN7_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) #define GEN7_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN7_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN7_VS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN7_VS_STRG_VAL 0x7604 #define GEN7_VS_RDATA 0x7608 #define GEN7_SF_CTL 0x7b00 #define GEN7_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) #define GEN7_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) #define GEN7_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) #define GEN7_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) #define GEN7_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN7_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN7_SF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN7_SF_STRG_VAL 0x7b04 #define GEN7_SF_RDATA 0x7b18 #define GEN7_WIZ_CTL 0x7c00 #define GEN7_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN7_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 #define GEN7_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) #define GEN7_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) #define GEN7_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) #define GEN7_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) #define GEN7_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) #define GEN7_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) #define GEN7_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) #define GEN7_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN7_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN7_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN7_WIZ_STRG_VAL 0x7c04 #define GEN7_WIZ_RDATA 0x7c18 #define GEN7_TS_CTL 0x7e00 #define GEN7_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN7_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) #define GEN7_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) #define GEN7_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) #define GEN7_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) #define GEN7_TS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN7_TS_STRG_VAL 0x7e04 #define GEN7_TS_RDATA 0x7e08 #define GEN7_TD_CTL 0x8000 #define GEN7_TD_CTL_MUX_SHIFT 8 #define GEN7_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define GEN7_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) #define GEN7_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) #define GEN7_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) #define GEN7_TD_CTL_BREAKPOINT_ENABLE (1 << 2) #define GEN7_TD_CTL2 0x8004 #define GEN7_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) #define GEN7_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) #define GEN7_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) #define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 #define GEN7_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) #define GEN7_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) #define GEN7_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) #define GEN7_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) #define GEN7_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) #define GEN7_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) #define GEN7_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) #define GEN7_TD_VF_VS_EMSK 0x8008 #define GEN7_TD_GS_EMSK 0x800c #define GEN7_TD_CLIP_EMSK 0x8010 #define GEN7_TD_SF_EMSK 0x8014 #define GEN7_TD_WIZ_EMSK 0x8018 #define GEN7_TD_0_6_EHTRG_VAL 0x801c #define GEN7_TD_0_7_EHTRG_VAL 0x8020 #define GEN7_TD_0_6_EHTRG_MSK 0x8024 #define GEN7_TD_0_7_EHTRG_MSK 0x8028 #define GEN7_TD_RDATA 0x802c #define GEN7_TD_TS_EMSK 0x8030 #define GEN7_EU_CTL 0x8800 #define GEN7_EU_CTL_SELECT_SHIFT 16 #define GEN7_EU_CTL_DATA_MUX_SHIFT 8 #define GEN7_EU_ATT_0 0x8810 #define GEN7_EU_ATT_1 0x8814 #define GEN7_EU_ATT_DATA_0 0x8820 #define GEN7_EU_ATT_DATA_1 0x8824 #define GEN7_EU_ATT_CLR_0 0x8830 #define GEN7_EU_ATT_CLR_1 0x8834 #define GEN7_EU_RDATA 0x8840 #define _3DPRIM_POINTLIST 0x01 #define _3DPRIM_LINELIST 0x02 #define _3DPRIM_LINESTRIP 0x03 #define _3DPRIM_TRILIST 0x04 #define _3DPRIM_TRISTRIP 0x05 #define _3DPRIM_TRIFAN 0x06 #define _3DPRIM_QUADLIST 0x07 #define _3DPRIM_QUADSTRIP 0x08 #define _3DPRIM_LINELIST_ADJ 0x09 #define _3DPRIM_LINESTRIP_ADJ 0x0A #define _3DPRIM_TRILIST_ADJ 0x0B #define _3DPRIM_TRISTRIP_ADJ 0x0C #define _3DPRIM_TRISTRIP_REVERSE 0x0D #define _3DPRIM_POLYGON 0x0E #define _3DPRIM_RECTLIST 0x0F #define _3DPRIM_LINELOOP 0x10 #define _3DPRIM_POINTLIST_BF 0x11 #define _3DPRIM_LINESTRIP_CONT 0x12 #define _3DPRIM_LINESTRIP_BF 0x13 #define _3DPRIM_LINESTRIP_CONT_BF 0x14 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 #define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 #define GEN7_ANISORATIO_2 0 #define GEN7_ANISORATIO_4 1 #define GEN7_ANISORATIO_6 2 #define GEN7_ANISORATIO_8 3 #define GEN7_ANISORATIO_10 4 #define GEN7_ANISORATIO_12 5 #define GEN7_ANISORATIO_14 6 #define GEN7_ANISORATIO_16 7 #define GEN7_BLENDFACTOR_ONE 0x1 #define GEN7_BLENDFACTOR_SRC_COLOR 0x2 #define GEN7_BLENDFACTOR_SRC_ALPHA 0x3 #define GEN7_BLENDFACTOR_DST_ALPHA 0x4 #define GEN7_BLENDFACTOR_DST_COLOR 0x5 #define GEN7_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 #define GEN7_BLENDFACTOR_CONST_COLOR 0x7 #define GEN7_BLENDFACTOR_CONST_ALPHA 0x8 #define GEN7_BLENDFACTOR_SRC1_COLOR 0x9 #define GEN7_BLENDFACTOR_SRC1_ALPHA 0x0A #define GEN7_BLENDFACTOR_ZERO 0x11 #define GEN7_BLENDFACTOR_INV_SRC_COLOR 0x12 #define GEN7_BLENDFACTOR_INV_SRC_ALPHA 0x13 #define GEN7_BLENDFACTOR_INV_DST_ALPHA 0x14 #define GEN7_BLENDFACTOR_INV_DST_COLOR 0x15 #define GEN7_BLENDFACTOR_INV_CONST_COLOR 0x17 #define GEN7_BLENDFACTOR_INV_CONST_ALPHA 0x18 #define GEN7_BLENDFACTOR_INV_SRC1_COLOR 0x19 #define GEN7_BLENDFACTOR_INV_SRC1_ALPHA 0x1A #define GEN7_BLENDFUNCTION_ADD 0 #define GEN7_BLENDFUNCTION_SUBTRACT 1 #define GEN7_BLENDFUNCTION_REVERSE_SUBTRACT 2 #define GEN7_BLENDFUNCTION_MIN 3 #define GEN7_BLENDFUNCTION_MAX 4 #define GEN7_ALPHATEST_FORMAT_UNORM8 0 #define GEN7_ALPHATEST_FORMAT_FLOAT32 1 #define GEN7_CHROMAKEY_KILL_ON_ANY_MATCH 0 #define GEN7_CHROMAKEY_REPLACE_BLACK 1 #define GEN7_CLIP_API_OGL 0 #define GEN7_CLIP_API_DX 1 #define GEN7_CLIPMODE_NORMAL 0 #define GEN7_CLIPMODE_CLIP_ALL 1 #define GEN7_CLIPMODE_CLIP_NON_REJECTED 2 #define GEN7_CLIPMODE_REJECT_ALL 3 #define GEN7_CLIPMODE_ACCEPT_ALL 4 #define GEN7_CLIP_NDCSPACE 0 #define GEN7_CLIP_SCREENSPACE 1 #define GEN7_COMPAREFUNCTION_ALWAYS 0 #define GEN7_COMPAREFUNCTION_NEVER 1 #define GEN7_COMPAREFUNCTION_LESS 2 #define GEN7_COMPAREFUNCTION_EQUAL 3 #define GEN7_COMPAREFUNCTION_LEQUAL 4 #define GEN7_COMPAREFUNCTION_GREATER 5 #define GEN7_COMPAREFUNCTION_NOTEQUAL 6 #define GEN7_COMPAREFUNCTION_GEQUAL 7 #define GEN7_COVERAGE_PIXELS_HALF 0 #define GEN7_COVERAGE_PIXELS_1 1 #define GEN7_COVERAGE_PIXELS_2 2 #define GEN7_COVERAGE_PIXELS_4 3 #define GEN7_CULLMODE_BOTH 0 #define GEN7_CULLMODE_NONE 1 #define GEN7_CULLMODE_FRONT 2 #define GEN7_CULLMODE_BACK 3 #define GEN7_DEFAULTCOLOR_R8G8B8A8_UNORM 0 #define GEN7_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 #define GEN7_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 #define GEN7_DEPTHFORMAT_D32_FLOAT 1 #define GEN7_DEPTHFORMAT_D24_UNORM_S8_UINT 2 #define GEN7_DEPTHFORMAT_D16_UNORM 5 #define GEN7_FLOATING_POINT_IEEE_754 0 #define GEN7_FLOATING_POINT_NON_IEEE_754 1 #define GEN7_FRONTWINDING_CW 0 #define GEN7_FRONTWINDING_CCW 1 #define GEN7_INDEX_BYTE 0 #define GEN7_INDEX_WORD 1 #define GEN7_INDEX_DWORD 2 #define GEN7_LOGICOPFUNCTION_CLEAR 0 #define GEN7_LOGICOPFUNCTION_NOR 1 #define GEN7_LOGICOPFUNCTION_AND_INVERTED 2 #define GEN7_LOGICOPFUNCTION_COPY_INVERTED 3 #define GEN7_LOGICOPFUNCTION_AND_REVERSE 4 #define GEN7_LOGICOPFUNCTION_INVERT 5 #define GEN7_LOGICOPFUNCTION_XOR 6 #define GEN7_LOGICOPFUNCTION_NAND 7 #define GEN7_LOGICOPFUNCTION_AND 8 #define GEN7_LOGICOPFUNCTION_EQUIV 9 #define GEN7_LOGICOPFUNCTION_NOOP 10 #define GEN7_LOGICOPFUNCTION_OR_INVERTED 11 #define GEN7_LOGICOPFUNCTION_COPY 12 #define GEN7_LOGICOPFUNCTION_OR_REVERSE 13 #define GEN7_LOGICOPFUNCTION_OR 14 #define GEN7_LOGICOPFUNCTION_SET 15 #define GEN7_MAPFILTER_NEAREST 0x0 #define GEN7_MAPFILTER_LINEAR 0x1 #define GEN7_MAPFILTER_ANISOTROPIC 0x2 #define GEN7_MIPFILTER_NONE 0 #define GEN7_MIPFILTER_NEAREST 1 #define GEN7_MIPFILTER_LINEAR 3 #define GEN7_POLYGON_FRONT_FACING 0 #define GEN7_POLYGON_BACK_FACING 1 #define GEN7_PREFILTER_ALWAYS 0x0 #define GEN7_PREFILTER_NEVER 0x1 #define GEN7_PREFILTER_LESS 0x2 #define GEN7_PREFILTER_EQUAL 0x3 #define GEN7_PREFILTER_LEQUAL 0x4 #define GEN7_PREFILTER_GREATER 0x5 #define GEN7_PREFILTER_NOTEQUAL 0x6 #define GEN7_PREFILTER_GEQUAL 0x7 #define GEN7_PROVOKING_VERTEX_0 0 #define GEN7_PROVOKING_VERTEX_1 1 #define GEN7_PROVOKING_VERTEX_2 2 #define GEN7_RASTRULE_UPPER_LEFT 0 #define GEN7_RASTRULE_UPPER_RIGHT 1 #define GEN7_RENDERTARGET_CLAMPRANGE_UNORM 0 #define GEN7_RENDERTARGET_CLAMPRANGE_SNORM 1 #define GEN7_RENDERTARGET_CLAMPRANGE_FORMAT 2 #define GEN7_STENCILOP_KEEP 0 #define GEN7_STENCILOP_ZERO 1 #define GEN7_STENCILOP_REPLACE 2 #define GEN7_STENCILOP_INCRSAT 3 #define GEN7_STENCILOP_DECRSAT 4 #define GEN7_STENCILOP_INCR 5 #define GEN7_STENCILOP_DECR 6 #define GEN7_STENCILOP_INVERT 7 #define GEN7_SURFACE_MIPMAPLAYOUT_BELOW 0 #define GEN7_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define GEN7_SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define GEN7_SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define GEN7_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define GEN7_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define GEN7_SURFACEFORMAT_R64G64_FLOAT 0x005 #define GEN7_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define GEN7_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define GEN7_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define GEN7_SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define GEN7_SURFACEFORMAT_R32G32B32_SINT 0x041 #define GEN7_SURFACEFORMAT_R32G32B32_UINT 0x042 #define GEN7_SURFACEFORMAT_R32G32B32_UNORM 0x043 #define GEN7_SURFACEFORMAT_R32G32B32_SNORM 0x044 #define GEN7_SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define GEN7_SURFACEFORMAT_R32G32B32_USCALED 0x046 #define GEN7_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define GEN7_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define GEN7_SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define GEN7_SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define GEN7_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define GEN7_SURFACEFORMAT_R32G32_FLOAT 0x085 #define GEN7_SURFACEFORMAT_R32G32_SINT 0x086 #define GEN7_SURFACEFORMAT_R32G32_UINT 0x087 #define GEN7_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define GEN7_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define GEN7_SURFACEFORMAT_L32A32_FLOAT 0x08A #define GEN7_SURFACEFORMAT_R32G32_UNORM 0x08B #define GEN7_SURFACEFORMAT_R32G32_SNORM 0x08C #define GEN7_SURFACEFORMAT_R64_FLOAT 0x08D #define GEN7_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define GEN7_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define GEN7_SURFACEFORMAT_A32X32_FLOAT 0x090 #define GEN7_SURFACEFORMAT_L32X32_FLOAT 0x091 #define GEN7_SURFACEFORMAT_I32X32_FLOAT 0x092 #define GEN7_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define GEN7_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define GEN7_SURFACEFORMAT_R32G32_SSCALED 0x095 #define GEN7_SURFACEFORMAT_R32G32_USCALED 0x096 #define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define GEN7_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define GEN7_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define GEN7_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define GEN7_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define GEN7_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define GEN7_SURFACEFORMAT_R16G16_UNORM 0x0CC #define GEN7_SURFACEFORMAT_R16G16_SNORM 0x0CD #define GEN7_SURFACEFORMAT_R16G16_SINT 0x0CE #define GEN7_SURFACEFORMAT_R16G16_UINT 0x0CF #define GEN7_SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define GEN7_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define GEN7_SURFACEFORMAT_R32_SINT 0x0D6 #define GEN7_SURFACEFORMAT_R32_UINT 0x0D7 #define GEN7_SURFACEFORMAT_R32_FLOAT 0x0D8 #define GEN7_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define GEN7_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define GEN7_SURFACEFORMAT_L16A16_UNORM 0x0DF #define GEN7_SURFACEFORMAT_I24X8_UNORM 0x0E0 #define GEN7_SURFACEFORMAT_L24X8_UNORM 0x0E1 #define GEN7_SURFACEFORMAT_A24X8_UNORM 0x0E2 #define GEN7_SURFACEFORMAT_I32_FLOAT 0x0E3 #define GEN7_SURFACEFORMAT_L32_FLOAT 0x0E4 #define GEN7_SURFACEFORMAT_A32_FLOAT 0x0E5 #define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define GEN7_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define GEN7_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define GEN7_SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define GEN7_SURFACEFORMAT_R32_UNORM 0x0F1 #define GEN7_SURFACEFORMAT_R32_SNORM 0x0F2 #define GEN7_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define GEN7_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define GEN7_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define GEN7_SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define GEN7_SURFACEFORMAT_R16G16_USCALED 0x0F7 #define GEN7_SURFACEFORMAT_R32_SSCALED 0x0F8 #define GEN7_SURFACEFORMAT_R32_USCALED 0x0F9 #define GEN7_SURFACEFORMAT_B5G6R5_UNORM 0x100 #define GEN7_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define GEN7_SURFACEFORMAT_R8G8_UNORM 0x106 #define GEN7_SURFACEFORMAT_R8G8_SNORM 0x107 #define GEN7_SURFACEFORMAT_R8G8_SINT 0x108 #define GEN7_SURFACEFORMAT_R8G8_UINT 0x109 #define GEN7_SURFACEFORMAT_R16_UNORM 0x10A #define GEN7_SURFACEFORMAT_R16_SNORM 0x10B #define GEN7_SURFACEFORMAT_R16_SINT 0x10C #define GEN7_SURFACEFORMAT_R16_UINT 0x10D #define GEN7_SURFACEFORMAT_R16_FLOAT 0x10E #define GEN7_SURFACEFORMAT_I16_UNORM 0x111 #define GEN7_SURFACEFORMAT_L16_UNORM 0x112 #define GEN7_SURFACEFORMAT_A16_UNORM 0x113 #define GEN7_SURFACEFORMAT_L8A8_UNORM 0x114 #define GEN7_SURFACEFORMAT_I16_FLOAT 0x115 #define GEN7_SURFACEFORMAT_L16_FLOAT 0x116 #define GEN7_SURFACEFORMAT_A16_FLOAT 0x117 #define GEN7_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define GEN7_SURFACEFORMAT_R8G8_SSCALED 0x11C #define GEN7_SURFACEFORMAT_R8G8_USCALED 0x11D #define GEN7_SURFACEFORMAT_R16_SSCALED 0x11E #define GEN7_SURFACEFORMAT_R16_USCALED 0x11F #define GEN7_SURFACEFORMAT_R8_UNORM 0x140 #define GEN7_SURFACEFORMAT_R8_SNORM 0x141 #define GEN7_SURFACEFORMAT_R8_SINT 0x142 #define GEN7_SURFACEFORMAT_R8_UINT 0x143 #define GEN7_SURFACEFORMAT_A8_UNORM 0x144 #define GEN7_SURFACEFORMAT_I8_UNORM 0x145 #define GEN7_SURFACEFORMAT_L8_UNORM 0x146 #define GEN7_SURFACEFORMAT_P4A4_UNORM 0x147 #define GEN7_SURFACEFORMAT_A4P4_UNORM 0x148 #define GEN7_SURFACEFORMAT_R8_SSCALED 0x149 #define GEN7_SURFACEFORMAT_R8_USCALED 0x14A #define GEN7_SURFACEFORMAT_R1_UINT 0x181 #define GEN7_SURFACEFORMAT_YCRCB_NORMAL 0x182 #define GEN7_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define GEN7_SURFACEFORMAT_BC1_UNORM 0x186 #define GEN7_SURFACEFORMAT_BC2_UNORM 0x187 #define GEN7_SURFACEFORMAT_BC3_UNORM 0x188 #define GEN7_SURFACEFORMAT_BC4_UNORM 0x189 #define GEN7_SURFACEFORMAT_BC5_UNORM 0x18A #define GEN7_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define GEN7_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define GEN7_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define GEN7_SURFACEFORMAT_MONO8 0x18E #define GEN7_SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define GEN7_SURFACEFORMAT_YCRCB_SWAPY 0x190 #define GEN7_SURFACEFORMAT_DXT1_RGB 0x191 #define GEN7_SURFACEFORMAT_FXT1 0x192 #define GEN7_SURFACEFORMAT_R8G8B8_UNORM 0x193 #define GEN7_SURFACEFORMAT_R8G8B8_SNORM 0x194 #define GEN7_SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define GEN7_SURFACEFORMAT_R8G8B8_USCALED 0x196 #define GEN7_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define GEN7_SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define GEN7_SURFACEFORMAT_BC4_SNORM 0x199 #define GEN7_SURFACEFORMAT_BC5_SNORM 0x19A #define GEN7_SURFACEFORMAT_R16G16B16_UNORM 0x19C #define GEN7_SURFACEFORMAT_R16G16B16_SNORM 0x19D #define GEN7_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define GEN7_SURFACEFORMAT_R16G16B16_USCALED 0x19F #define GEN7_SURFACERETURNFORMAT_FLOAT32 0 #define GEN7_SURFACERETURNFORMAT_S1 1 #define GEN7_SURFACE_1D 0 #define GEN7_SURFACE_2D 1 #define GEN7_SURFACE_3D 2 #define GEN7_SURFACE_CUBE 3 #define GEN7_SURFACE_BUFFER 4 #define GEN7_SURFACE_NULL 7 #define GEN7_BORDER_COLOR_MODE_DEFAULT 0 #define GEN7_BORDER_COLOR_MODE_LEGACY 1 #define GEN7_TEXCOORDMODE_WRAP 0 #define GEN7_TEXCOORDMODE_MIRROR 1 #define GEN7_TEXCOORDMODE_CLAMP 2 #define GEN7_TEXCOORDMODE_CUBE 3 #define GEN7_TEXCOORDMODE_CLAMP_BORDER 4 #define GEN7_TEXCOORDMODE_MIRROR_ONCE 5 #define GEN7_THREAD_PRIORITY_NORMAL 0 #define GEN7_THREAD_PRIORITY_HIGH 1 #define GEN7_TILEWALK_XMAJOR 0 #define GEN7_TILEWALK_YMAJOR 1 #define GEN7_VERTEX_SUBPIXEL_PRECISION_8BITS 0 #define GEN7_VERTEX_SUBPIXEL_PRECISION_4BITS 1 #define GEN7_VERTEXBUFFER_ACCESS_VERTEXDATA 0 #define GEN7_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 #define GEN7_VFCOMPONENT_NOSTORE 0 #define GEN7_VFCOMPONENT_STORE_SRC 1 #define GEN7_VFCOMPONENT_STORE_0 2 #define GEN7_VFCOMPONENT_STORE_1_FLT 3 #define GEN7_VFCOMPONENT_STORE_1_INT 4 #define GEN7_VFCOMPONENT_STORE_VID 5 #define GEN7_VFCOMPONENT_STORE_IID 6 #define GEN7_VFCOMPONENT_STORE_PID 7 /* Execution Unit (EU) defines */ #define GEN7_ALIGN_1 0 #define GEN7_ALIGN_16 1 #define GEN7_ADDRESS_DIRECT 0 #define GEN7_ADDRESS_REGISTER_INDIRECT_REGISTER 1 #define GEN7_CHANNEL_X 0 #define GEN7_CHANNEL_Y 1 #define GEN7_CHANNEL_Z 2 #define GEN7_CHANNEL_W 3 #define GEN7_COMPRESSION_NONE 0 #define GEN7_COMPRESSION_2NDHALF 1 #define GEN7_COMPRESSION_COMPRESSED 2 #define GEN7_CONDITIONAL_NONE 0 #define GEN7_CONDITIONAL_Z 1 #define GEN7_CONDITIONAL_NZ 2 #define GEN7_CONDITIONAL_EQ 1 /* Z */ #define GEN7_CONDITIONAL_NEQ 2 /* NZ */ #define GEN7_CONDITIONAL_G 3 #define GEN7_CONDITIONAL_GE 4 #define GEN7_CONDITIONAL_L 5 #define GEN7_CONDITIONAL_LE 6 #define GEN7_CONDITIONAL_C 7 #define GEN7_CONDITIONAL_O 8 #define GEN7_DEBUG_NONE 0 #define GEN7_DEBUG_BREAKPOINT 1 #define GEN7_DEPENDENCY_NORMAL 0 #define GEN7_DEPENDENCY_NOTCLEARED 1 #define GEN7_DEPENDENCY_NOTCHECKED 2 #define GEN7_DEPENDENCY_DISABLE 3 #define GEN7_EXECUTE_1 0 #define GEN7_EXECUTE_2 1 #define GEN7_EXECUTE_4 2 #define GEN7_EXECUTE_8 3 #define GEN7_EXECUTE_16 4 #define GEN7_EXECUTE_32 5 #define GEN7_HORIZONTAL_STRIDE_0 0 #define GEN7_HORIZONTAL_STRIDE_1 1 #define GEN7_HORIZONTAL_STRIDE_2 2 #define GEN7_HORIZONTAL_STRIDE_4 3 #define GEN7_INSTRUCTION_NORMAL 0 #define GEN7_INSTRUCTION_SATURATE 1 #define INTEL_MASK_ENABLE 0 #define INTEL_MASK_DISABLE 1 #define GEN7_OPCODE_MOV 1 #define GEN7_OPCODE_SEL 2 #define GEN7_OPCODE_NOT 4 #define GEN7_OPCODE_AND 5 #define GEN7_OPCODE_OR 6 #define GEN7_OPCODE_XOR 7 #define GEN7_OPCODE_SHR 8 #define GEN7_OPCODE_SHL 9 #define GEN7_OPCODE_RSR 10 #define GEN7_OPCODE_RSL 11 #define GEN7_OPCODE_ASR 12 #define GEN7_OPCODE_CMP 16 #define GEN7_OPCODE_JMPI 32 #define GEN7_OPCODE_IF 34 #define GEN7_OPCODE_IFF 35 #define GEN7_OPCODE_ELSE 36 #define GEN7_OPCODE_ENDIF 37 #define GEN7_OPCODE_DO 38 #define GEN7_OPCODE_WHILE 39 #define GEN7_OPCODE_BREAK 40 #define GEN7_OPCODE_CONTINUE 41 #define GEN7_OPCODE_HALT 42 #define GEN7_OPCODE_MSAVE 44 #define GEN7_OPCODE_MRESTORE 45 #define GEN7_OPCODE_PUSH 46 #define GEN7_OPCODE_POP 47 #define GEN7_OPCODE_WAIT 48 #define GEN7_OPCODE_SEND 49 #define GEN7_OPCODE_ADD 64 #define GEN7_OPCODE_MUL 65 #define GEN7_OPCODE_AVG 66 #define GEN7_OPCODE_FRC 67 #define GEN7_OPCODE_RNDU 68 #define GEN7_OPCODE_RNDD 69 #define GEN7_OPCODE_RNDE 70 #define GEN7_OPCODE_RNDZ 71 #define GEN7_OPCODE_MAC 72 #define GEN7_OPCODE_MACH 73 #define GEN7_OPCODE_LZD 74 #define GEN7_OPCODE_SAD2 80 #define GEN7_OPCODE_SADA2 81 #define GEN7_OPCODE_DP4 84 #define GEN7_OPCODE_DPH 85 #define GEN7_OPCODE_DP3 86 #define GEN7_OPCODE_DP2 87 #define GEN7_OPCODE_DPA2 88 #define GEN7_OPCODE_LINE 89 #define GEN7_OPCODE_NOP 126 #define GEN7_PREDICATE_NONE 0 #define GEN7_PREDICATE_NORMAL 1 #define GEN7_PREDICATE_ALIGN1_ANYV 2 #define GEN7_PREDICATE_ALIGN1_ALLV 3 #define GEN7_PREDICATE_ALIGN1_ANY2H 4 #define GEN7_PREDICATE_ALIGN1_ALL2H 5 #define GEN7_PREDICATE_ALIGN1_ANY4H 6 #define GEN7_PREDICATE_ALIGN1_ALL4H 7 #define GEN7_PREDICATE_ALIGN1_ANY8H 8 #define GEN7_PREDICATE_ALIGN1_ALL8H 9 #define GEN7_PREDICATE_ALIGN1_ANY16H 10 #define GEN7_PREDICATE_ALIGN1_ALL16H 11 #define GEN7_PREDICATE_ALIGN16_REPLICATE_X 2 #define GEN7_PREDICATE_ALIGN16_REPLICATE_Y 3 #define GEN7_PREDICATE_ALIGN16_REPLICATE_Z 4 #define GEN7_PREDICATE_ALIGN16_REPLICATE_W 5 #define GEN7_PREDICATE_ALIGN16_ANY4H 6 #define GEN7_PREDICATE_ALIGN16_ALL4H 7 #define GEN7_ARCHITECTURE_REGISTER_FILE 0 #define GEN7_GENERAL_REGISTER_FILE 1 #define GEN7_MESSAGE_REGISTER_FILE 2 #define GEN7_IMMEDIATE_VALUE 3 #define GEN7_REGISTER_TYPE_UD 0 #define GEN7_REGISTER_TYPE_D 1 #define GEN7_REGISTER_TYPE_UW 2 #define GEN7_REGISTER_TYPE_W 3 #define GEN7_REGISTER_TYPE_UB 4 #define GEN7_REGISTER_TYPE_B 5 #define GEN7_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ #define GEN7_REGISTER_TYPE_HF 6 #define GEN7_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ #define GEN7_REGISTER_TYPE_F 7 #define GEN7_ARF_NULL 0x00 #define GEN7_ARF_ADDRESS 0x10 #define GEN7_ARF_ACCUMULATOR 0x20 #define GEN7_ARF_FLAG 0x30 #define GEN7_ARF_MASK 0x40 #define GEN7_ARF_MASK_STACK 0x50 #define GEN7_ARF_MASK_STACK_DEPTH 0x60 #define GEN7_ARF_STATE 0x70 #define GEN7_ARF_CONTROL 0x80 #define GEN7_ARF_NOTIFICATION_COUNT 0x90 #define GEN7_ARF_IP 0xA0 #define GEN7_AMASK 0 #define GEN7_IMASK 1 #define GEN7_LMASK 2 #define GEN7_CMASK 3 #define GEN7_THREAD_NORMAL 0 #define GEN7_THREAD_ATOMIC 1 #define GEN7_THREAD_SWITCH 2 #define GEN7_VERTICAL_STRIDE_0 0 #define GEN7_VERTICAL_STRIDE_1 1 #define GEN7_VERTICAL_STRIDE_2 2 #define GEN7_VERTICAL_STRIDE_4 3 #define GEN7_VERTICAL_STRIDE_8 4 #define GEN7_VERTICAL_STRIDE_16 5 #define GEN7_VERTICAL_STRIDE_32 6 #define GEN7_VERTICAL_STRIDE_64 7 #define GEN7_VERTICAL_STRIDE_128 8 #define GEN7_VERTICAL_STRIDE_256 9 #define GEN7_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF #define GEN7_WIDTH_1 0 #define GEN7_WIDTH_2 1 #define GEN7_WIDTH_4 2 #define GEN7_WIDTH_8 3 #define GEN7_WIDTH_16 4 #define GEN7_STATELESS_BUFFER_BOUNDARY_1K 0 #define GEN7_STATELESS_BUFFER_BOUNDARY_2K 1 #define GEN7_STATELESS_BUFFER_BOUNDARY_4K 2 #define GEN7_STATELESS_BUFFER_BOUNDARY_8K 3 #define GEN7_STATELESS_BUFFER_BOUNDARY_16K 4 #define GEN7_STATELESS_BUFFER_BOUNDARY_32K 5 #define GEN7_STATELESS_BUFFER_BOUNDARY_64K 6 #define GEN7_STATELESS_BUFFER_BOUNDARY_128K 7 #define GEN7_STATELESS_BUFFER_BOUNDARY_256K 8 #define GEN7_STATELESS_BUFFER_BOUNDARY_512K 9 #define GEN7_STATELESS_BUFFER_BOUNDARY_1M 10 #define GEN7_STATELESS_BUFFER_BOUNDARY_2M 11 #define GEN7_POLYGON_FACING_FRONT 0 #define GEN7_POLYGON_FACING_BACK 1 #define GEN7_MESSAGE_TARGET_NULL 0 #define GEN7_MESSAGE_TARGET_MATH 1 #define GEN7_MESSAGE_TARGET_SAMPLER 2 #define GEN7_MESSAGE_TARGET_GATEWAY 3 #define GEN7_MESSAGE_TARGET_DATAPORT_READ 4 #define GEN7_MESSAGE_TARGET_DATAPORT_WRITE 5 #define GEN7_MESSAGE_TARGET_URB 6 #define GEN7_MESSAGE_TARGET_THREAD_SPAWNER 7 #define GEN7_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define GEN7_SAMPLER_RETURN_FORMAT_UINT32 2 #define GEN7_SAMPLER_RETURN_FORMAT_SINT32 3 #define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 #define GEN7_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 #define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 #define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 #define GEN7_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 #define GEN7_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 #define GEN7_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 #define GEN7_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 #define GEN7_SAMPLER_MESSAGE_SIMD8_RESINFO 2 #define GEN7_SAMPLER_MESSAGE_SIMD16_RESINFO 2 #define GEN7_SAMPLER_MESSAGE_SIMD4X2_LD 3 #define GEN7_SAMPLER_MESSAGE_SIMD8_LD 3 #define GEN7_SAMPLER_MESSAGE_SIMD16_LD 3 #define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 #define GEN7_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 #define GEN7_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define GEN7_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define GEN7_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define GEN7_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define GEN7_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 #define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define GEN7_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 #define GEN7_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 #define GEN7_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 #define GEN7_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2 #define GEN7_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 #define GEN7_DATAPORT_READ_TARGET_DATA_CACHE 0 #define GEN7_DATAPORT_READ_TARGET_RENDER_CACHE 1 #define GEN7_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 #define GEN7_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 #define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 #define GEN7_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 #define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2 #define GEN7_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 #define GEN7_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 #define GEN7_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 #define GEN7_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 #define GEN7_MATH_FUNCTION_INV 1 #define GEN7_MATH_FUNCTION_LOG 2 #define GEN7_MATH_FUNCTION_EXP 3 #define GEN7_MATH_FUNCTION_SQRT 4 #define GEN7_MATH_FUNCTION_RSQ 5 #define GEN7_MATH_FUNCTION_SIN 6 /* was 7 */ #define GEN7_MATH_FUNCTION_COS 7 /* was 8 */ #define GEN7_MATH_FUNCTION_SINCOS 8 /* was 6 */ #define GEN7_MATH_FUNCTION_TAN 9 #define GEN7_MATH_FUNCTION_POW 10 #define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 #define GEN7_MATH_FUNCTION_INT_DIV_QUOTIENT 12 #define GEN7_MATH_FUNCTION_INT_DIV_REMAINDER 13 #define GEN7_MATH_INTEGER_UNSIGNED 0 #define GEN7_MATH_INTEGER_SIGNED 1 #define GEN7_MATH_PRECISION_FULL 0 #define GEN7_MATH_PRECISION_PARTIAL 1 #define GEN7_MATH_SATURATE_NONE 0 #define GEN7_MATH_SATURATE_SATURATE 1 #define GEN7_MATH_DATA_VECTOR 0 #define GEN7_MATH_DATA_SCALAR 1 #define GEN7_URB_OPCODE_WRITE 0 #define GEN7_URB_SWIZZLE_NONE 0 #define GEN7_URB_SWIZZLE_INTERLEAVE 1 #define GEN7_URB_SWIZZLE_TRANSPOSE 2 #define GEN7_SCRATCH_SPACE_SIZE_1K 0 #define GEN7_SCRATCH_SPACE_SIZE_2K 1 #define GEN7_SCRATCH_SPACE_SIZE_4K 2 #define GEN7_SCRATCH_SPACE_SIZE_8K 3 #define GEN7_SCRATCH_SPACE_SIZE_16K 4 #define GEN7_SCRATCH_SPACE_SIZE_32K 5 #define GEN7_SCRATCH_SPACE_SIZE_64K 6 #define GEN7_SCRATCH_SPACE_SIZE_128K 7 #define GEN7_SCRATCH_SPACE_SIZE_256K 8 #define GEN7_SCRATCH_SPACE_SIZE_512K 9 #define GEN7_SCRATCH_SPACE_SIZE_1M 10 #define GEN7_SCRATCH_SPACE_SIZE_2M 11 /* The hardware supports two different modes for border color. The * default (OpenGL) mode uses floating-point color channels, while the * legacy mode uses 4 bytes. * * More significantly, the legacy mode respects the components of the * border color for channels not present in the source, (whereas the * default mode will ignore the border color's alpha channel and use * alpha==1 for an RGB source, for example). * * The legacy mode matches the semantics specified by the Render * extension. */ struct gen7_sampler_default_border_color { float color[4]; }; struct gen7_sampler_legacy_border_color { uint8_t color[4]; }; struct gen7_blend_state { struct { uint32_t dest_blend_factor:5; uint32_t source_blend_factor:5; uint32_t pad3:1; uint32_t blend_func:3; uint32_t pad2:1; uint32_t ia_dest_blend_factor:5; uint32_t ia_source_blend_factor:5; uint32_t pad1:1; uint32_t ia_blend_func:3; uint32_t pad0:1; uint32_t ia_blend_enable:1; uint32_t blend_enable:1; } blend0; struct { uint32_t post_blend_clamp_enable:1; uint32_t pre_blend_clamp_enable:1; uint32_t clamp_range:2; uint32_t pad0:4; uint32_t x_dither_offset:2; uint32_t y_dither_offset:2; uint32_t dither_enable:1; uint32_t alpha_test_func:3; uint32_t alpha_test_enable:1; uint32_t pad1:1; uint32_t logic_op_func:4; uint32_t logic_op_enable:1; uint32_t pad2:1; uint32_t write_disable_b:1; uint32_t write_disable_g:1; uint32_t write_disable_r:1; uint32_t write_disable_a:1; uint32_t pad3:1; uint32_t alpha_to_coverage_dither:1; uint32_t alpha_to_one:1; uint32_t alpha_to_coverage:1; } blend1; }; struct gen7_color_calc_state { struct { uint32_t alpha_test_format:1; uint32_t pad0:14; uint32_t round_disable:1; uint32_t bf_stencil_ref:8; uint32_t stencil_ref:8; } cc0; union { float alpha_ref_f; struct { uint32_t ui:8; uint32_t pad0:24; } alpha_ref_fi; } cc1; float constant_r; float constant_g; float constant_b; float constant_a; }; struct gen7_depth_stencil_state { struct { uint32_t pad0:3; uint32_t bf_stencil_pass_depth_pass_op:3; uint32_t bf_stencil_pass_depth_fail_op:3; uint32_t bf_stencil_fail_op:3; uint32_t bf_stencil_func:3; uint32_t bf_stencil_enable:1; uint32_t pad1:2; uint32_t stencil_write_enable:1; uint32_t stencil_pass_depth_pass_op:3; uint32_t stencil_pass_depth_fail_op:3; uint32_t stencil_fail_op:3; uint32_t stencil_func:3; uint32_t stencil_enable:1; } ds0; struct { uint32_t bf_stencil_write_mask:8; uint32_t bf_stencil_test_mask:8; uint32_t stencil_write_mask:8; uint32_t stencil_test_mask:8; } ds1; struct { uint32_t pad0:26; uint32_t depth_write_enable:1; uint32_t depth_test_func:3; uint32_t pad1:1; uint32_t depth_test_enable:1; } ds2; }; struct gen7_surface_state { struct { unsigned int cube_pos_z:1; unsigned int cube_neg_z:1; unsigned int cube_pos_y:1; unsigned int cube_neg_y:1; unsigned int cube_pos_x:1; unsigned int cube_neg_x:1; unsigned int pad2:2; unsigned int render_cache_read_write:1; unsigned int pad1:1; unsigned int surface_array_spacing:1; unsigned int vert_line_stride_ofs:1; unsigned int vert_line_stride:1; unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int horizontal_alignment:1; unsigned int vertical_alignment:2; unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */ unsigned int pad0:1; unsigned int is_array:1; unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ } ss0; struct { unsigned int base_addr; } ss1; struct { unsigned int width:14; unsigned int pad1:2; unsigned int height:14; unsigned int pad0:2; } ss2; struct { unsigned int pitch:18; unsigned int pad:3; unsigned int depth:11; } ss3; struct { unsigned int multisample_position_palette_index:3; unsigned int num_multisamples:3; unsigned int multisampled_surface_storage_format:1; unsigned int render_target_view_extent:11; unsigned int min_array_elt:11; unsigned int rotation:2; unsigned int pad0:1; } ss4; struct { unsigned int mip_count:4; unsigned int min_lod:4; unsigned int pad1:12; unsigned int y_offset:4; unsigned int pad0:1; unsigned int x_offset:7; } ss5; struct { unsigned int pad; /* Multisample Control Surface stuff */ } ss6; struct { unsigned int resource_min_lod:12; unsigned int pad0:16; unsigned int alpha_clear_color:1; unsigned int blue_clear_color:1; unsigned int green_clear_color:1; unsigned int red_clear_color:1; } ss7; }; struct gen7_sampler_state { struct { unsigned int aniso_algorithm:1; unsigned int lod_bias:13; unsigned int min_filter:3; unsigned int mag_filter:3; unsigned int mip_filter:2; unsigned int base_level:5; unsigned int pad1:1; unsigned int lod_preclamp:1; unsigned int default_color_mode:1; unsigned int pad0:1; unsigned int disable:1; } ss0; struct { unsigned int cube_control_mode:1; unsigned int shadow_function:3; unsigned int pad:4; unsigned int max_lod:12; unsigned int min_lod:12; } ss1; struct { unsigned int pad:5; unsigned int default_color_pointer:27; } ss2; struct { unsigned int r_wrap_mode:3; unsigned int t_wrap_mode:3; unsigned int s_wrap_mode:3; unsigned int pad:1; unsigned int non_normalized_coord:1; unsigned int trilinear_quality:2; unsigned int address_round:6; unsigned int max_aniso:3; unsigned int chroma_key_mode:1; unsigned int chroma_key_index:2; unsigned int chroma_key_enable:1; unsigned int pad0:6; } ss3; }; /* Surface state DW0 */ #define GEN7_SURFACE_RC_READ_WRITE (1 << 8) #define GEN7_SURFACE_VALIGN_4 (1 << 16) #define GEN7_SURFACE_HALIGN_8 (1 << 15) #define GEN7_SURFACE_TILED (1 << 14) #define GEN7_SURFACE_TILED_Y (1 << 13) #define GEN7_SURFACE_FORMAT_SHIFT 18 #define GEN7_SURFACE_TYPE_SHIFT 29 /* Surface state DW2 */ #define GEN7_SURFACE_HEIGHT_SHIFT 16 #define GEN7_SURFACE_WIDTH_SHIFT 0 /* Surface state DW3 */ #define GEN7_SURFACE_DEPTH_SHIFT 21 #define GEN7_SURFACE_PITCH_SHIFT 0 #define HSW_SWIZZLE_ZERO 0 #define HSW_SWIZZLE_ONE 1 #define HSW_SWIZZLE_RED 4 #define HSW_SWIZZLE_GREEN 5 #define HSW_SWIZZLE_BLUE 6 #define HSW_SWIZZLE_ALPHA 7 #define __HSW_SURFACE_SWIZZLE(r,g,b,a) \ ((a) << 16 | (b) << 19 | (g) << 22 | (r) << 25) #define HSW_SURFACE_SWIZZLE(r,g,b,a) \ __HSW_SURFACE_SWIZZLE(HSW_SWIZZLE_##r, HSW_SWIZZLE_##g, HSW_SWIZZLE_##b, HSW_SWIZZLE_##a) /* _3DSTATE_VERTEX_BUFFERS on GEN7*/ /* DW1 */ #define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14) /* _3DPRIMITIVE on GEN7 */ /* DW1 */ # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8) # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8) #define GEN7_3DSTATE_CLEAR_PARAMS GEN7_3D(3, 0, 0x04) #define GEN7_3DSTATE_DEPTH_BUFFER GEN7_3D(3, 0, 0x05) # define GEN7_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 # define GEN7_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 /* DW1 */ # define GEN7_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) #define GEN7_3DSTATE_CONSTANT_HS GEN7_3D(3, 0, 0x19) #define GEN7_3DSTATE_CONSTANT_DS GEN7_3D(3, 0, 0x1a) #define GEN7_3DSTATE_HS GEN7_3D(3, 0, 0x1b) #define GEN7_3DSTATE_TE GEN7_3D(3, 0, 0x1c) #define GEN7_3DSTATE_DS GEN7_3D(3, 0, 0x1d) #define GEN7_3DSTATE_STREAMOUT GEN7_3D(3, 0, 0x1e) #define GEN7_3DSTATE_SBE GEN7_3D(3, 0, 0x1f) /* DW1 */ # define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28) # define GEN7_SBE_NUM_OUTPUTS_SHIFT 22 # define GEN7_SBE_SWIZZLE_ENABLE (1 << 21) # define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20) # define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4 #define GEN7_3DSTATE_PS GEN7_3D(3, 0, 0x20) /* DW1: kernel pointer */ /* DW2 */ # define GEN7_PS_SPF_MODE (1 << 31) # define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30) # define GEN7_PS_SAMPLER_COUNT_SHIFT 27 # define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 # define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) # define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) /* DW3: scratch space */ /* DW4 */ # define IVB_PS_MAX_THREADS_SHIFT 24 # define HSW_PS_MAX_THREADS_SHIFT 23 # define HSW_PS_SAMPLE_MASK_SHIFT 12 # define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) # define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) # define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) # define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7) # define GEN7_PS_POSOFFSET_NONE (0 << 3) # define GEN7_PS_POSOFFSET_CENTROID (2 << 3) # define GEN7_PS_POSOFFSET_SAMPLE (3 << 3) # define GEN7_PS_32_DISPATCH_ENABLE (1 << 2) # define GEN7_PS_16_DISPATCH_ENABLE (1 << 1) # define GEN7_PS_8_DISPATCH_ENABLE (1 << 0) /* DW5 */ # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0 /* DW6: kernel 1 pointer */ /* DW7: kernel 2 pointer */ #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL GEN7_3D(3, 0, 0x21) #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC GEN7_3D(3, 0, 0x23) #define GEN7_3DSTATE_BLEND_STATE_POINTERS GEN7_3D(3, 0, 0x24) #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS GEN7_3D(3, 0, 0x25) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS GEN7_3D(3, 0, 0x26) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS GEN7_3D(3, 0, 0x27) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS GEN7_3D(3, 0, 0x28) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS GEN7_3D(3, 0, 0x29) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS GEN7_3D(3, 0, 0x2a) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS GEN7_3D(3, 0, 0x2b) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS GEN7_3D(3, 0, 0x2e) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS GEN7_3D(3, 0, 0x2f) #define GEN7_3DSTATE_URB_VS GEN7_3D(3, 0, 0x30) #define GEN7_3DSTATE_URB_HS GEN7_3D(3, 0, 0x31) #define GEN7_3DSTATE_URB_DS GEN7_3D(3, 0, 0x32) #define GEN7_3DSTATE_URB_GS GEN7_3D(3, 0, 0x33) /* DW1 */ # define GEN7_URB_ENTRY_NUMBER_SHIFT 0 # define GEN7_URB_ENTRY_SIZE_SHIFT 16 # define GEN7_URB_STARTING_ADDRESS_SHIFT 25 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS GEN7_3D(3, 1, 0x12) #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS GEN7_3D(3, 1, 0x16) /* DW1 */ # define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 struct gen7_cc_viewport { float min_depth; float max_depth; }; typedef enum { SAMPLER_FILTER_NEAREST = 0, SAMPLER_FILTER_BILINEAR, FILTER_COUNT } sampler_filter_t; typedef enum { SAMPLER_EXTEND_NONE = 0, SAMPLER_EXTEND_REPEAT, SAMPLER_EXTEND_PAD, SAMPLER_EXTEND_REFLECT, EXTEND_COUNT } sampler_extend_t; #endif xf86-video-intel-2.99.917/src/sna/sna_io.c0000664000175000017500000014333312432737457014740 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_reg.h" #include #define PITCH(x, y) ALIGN((x)*(y), 4) #define FORCE_INPLACE 0 /* 1 upload directly, -1 force indirect */ /* XXX Need to avoid using GTT fenced access for I915_TILING_Y on 855GM */ static inline bool upload_too_large(struct sna *sna, int width, int height) { return width * height * 4 > sna->kgem.max_upload_tile_size; } static inline bool must_tile(struct sna *sna, int width, int height) { return (width > sna->render.max_3d_size || height > sna->render.max_3d_size || upload_too_large(sna, width, height)); } static bool download_inplace__cpu(struct kgem *kgem, PixmapPtr p, struct kgem_bo *bo, const BoxRec *box, int nbox) { BoxRec extents; switch (bo->tiling) { case I915_TILING_X: if (!kgem->memcpy_from_tiled_x) return false; case I915_TILING_NONE: break; default: return false; } if (!kgem_bo_can_map__cpu(kgem, bo, false)) return false; if (kgem->has_llc) return true; extents = *box; while (--nbox) { ++box; if (box->x1 < extents.x1) extents.x1 = box->x1; if (box->x2 > extents.x2) extents.x2 = box->x2; extents.y2 = box->y2; } if (extents.x2 - extents.x1 == p->drawable.width && extents.y2 - extents.y1 == p->drawable.height) return true; return __kgem_bo_size(bo) <= PAGE_SIZE; } static bool read_boxes_inplace__cpu(struct kgem *kgem, PixmapPtr pixmap, struct kgem_bo *bo, const BoxRec *box, int n) { int bpp = pixmap->drawable.bitsPerPixel; void *src, *dst = pixmap->devPrivate.ptr; int src_pitch = bo->pitch; int dst_pitch = pixmap->devKind; if (!download_inplace__cpu(kgem, dst, bo, box, n)) return false; assert(kgem_bo_can_map__cpu(kgem, bo, false)); assert(bo->tiling != I915_TILING_Y); src = kgem_bo_map__cpu(kgem, bo); if (src == NULL) return false; kgem_bo_sync__cpu_full(kgem, bo, 0); if (sigtrap_get()) return false; DBG(("%s x %d\n", __FUNCTION__, n)); if (bo->tiling == I915_TILING_X) { do { memcpy_from_tiled_x(kgem, src, dst, bpp, src_pitch, dst_pitch, box->x1, box->y1, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); } else { do { memcpy_blt(src, dst, bpp, src_pitch, dst_pitch, box->x1, box->y1, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); } sigtrap_put(); return true; } static void read_boxes_inplace(struct kgem *kgem, PixmapPtr pixmap, struct kgem_bo *bo, const BoxRec *box, int n) { int bpp = pixmap->drawable.bitsPerPixel; void *src, *dst = pixmap->devPrivate.ptr; int src_pitch = bo->pitch; int dst_pitch = pixmap->devKind; if (read_boxes_inplace__cpu(kgem, pixmap, bo, box, n)) return; DBG(("%s x %d, tiling=%d\n", __FUNCTION__, n, bo->tiling)); if (!kgem_bo_can_map(kgem, bo)) return; kgem_bo_submit(kgem, bo); src = kgem_bo_map(kgem, bo); if (src == NULL) return; if (sigtrap_get()) return; assert(src != dst); do { DBG(("%s: copying box (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); assert(box->x2 > box->x1); assert(box->y2 > box->y1); assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->x2 <= pixmap->drawable.width); assert(box->y2 <= pixmap->drawable.height); assert(box->x1 >= 0); assert(box->y1 >= 0); assert(box->x2 <= pixmap->drawable.width); assert(box->y2 <= pixmap->drawable.height); memcpy_blt(src, dst, bpp, src_pitch, dst_pitch, box->x1, box->y1, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); sigtrap_put(); } static bool download_inplace(struct kgem *kgem, PixmapPtr p, struct kgem_bo *bo, const BoxRec *box, int nbox) { bool cpu; if (unlikely(kgem->wedged)) return true; cpu = download_inplace__cpu(kgem, p, bo, box, nbox); if (!cpu && !kgem_bo_can_map(kgem, bo)) return false; if (FORCE_INPLACE) return FORCE_INPLACE > 0; if (cpu) return true; if (kgem->can_blt_cpu && kgem->max_cpu_size) return false; return !__kgem_bo_is_busy(kgem, bo); } void sna_read_boxes(struct sna *sna, PixmapPtr dst, struct kgem_bo *src_bo, const BoxRec *box, int nbox) { struct kgem *kgem = &sna->kgem; struct kgem_bo *dst_bo; BoxRec extents; const BoxRec *tmp_box; int tmp_nbox; void *ptr; int src_pitch, cpp, offset; int n, cmd, br13; bool can_blt; DBG(("%s x %d, src=(handle=%d), dst=(size=(%d, %d)\n", __FUNCTION__, nbox, src_bo->handle, dst->drawable.width, dst->drawable.height)); #ifndef NDEBUG for (n = 0; n < nbox; n++) { if (box[n].x1 < 0 || box[n].y1 < 0 || box[n].x2 * dst->drawable.bitsPerPixel/8 > src_bo->pitch || box[n].y2 * src_bo->pitch > kgem_bo_size(src_bo)) { FatalError("source out-of-bounds box[%d]=(%d, %d), (%d, %d), pitch=%d, size=%d\n", n, box[n].x1, box[n].y1, box[n].x2, box[n].y2, src_bo->pitch, kgem_bo_size(src_bo)); } } #endif /* XXX The gpu is faster to perform detiling in bulk, but takes * longer to setup and retrieve the results, with an additional * copy. The long term solution is to use snoopable bo and avoid * this path. */ if (download_inplace(kgem, dst, src_bo, box, nbox)) { fallback: read_boxes_inplace(kgem, dst, src_bo, box, nbox); return; } can_blt = kgem_bo_can_blt(kgem, src_bo) && (box[0].x2 - box[0].x1) * dst->drawable.bitsPerPixel < 8 * (MAXSHORT - 4); extents = box[0]; for (n = 1; n < nbox; n++) { if (box[n].x1 < extents.x1) extents.x1 = box[n].x1; if (box[n].x2 > extents.x2) extents.x2 = box[n].x2; if (can_blt) can_blt = (box[n].x2 - box[n].x1) * dst->drawable.bitsPerPixel < 8 * (MAXSHORT - 4); if (box[n].y1 < extents.y1) extents.y1 = box[n].y1; if (box[n].y2 > extents.y2) extents.y2 = box[n].y2; } if (kgem_bo_can_map(kgem, src_bo)) { /* Is it worth detiling? */ if ((extents.y2 - extents.y1 - 1) * src_bo->pitch < 4096) goto fallback; } /* Try to avoid switching rings... */ if (!can_blt || kgem->ring == KGEM_RENDER || upload_too_large(sna, extents.x2 - extents.x1, extents.y2 - extents.y1)) { DrawableRec tmp; tmp.width = extents.x2 - extents.x1; tmp.height = extents.y2 - extents.y1; tmp.depth = dst->drawable.depth; tmp.bitsPerPixel = dst->drawable.bitsPerPixel; assert(tmp.width); assert(tmp.height); if (must_tile(sna, tmp.width, tmp.height)) { BoxRec tile, stack[64], *clipped, *c; int step; if (n > ARRAY_SIZE(stack)) { clipped = malloc(sizeof(BoxRec) * n); if (clipped == NULL) goto fallback; } else clipped = stack; step = MIN(sna->render.max_3d_size, 8*(MAXSHORT&~63) / dst->drawable.bitsPerPixel); while (step * step * 4 > sna->kgem.max_upload_tile_size) step /= 2; DBG(("%s: tiling download, using %dx%d tiles\n", __FUNCTION__, step, step)); assert(step); for (tile.y1 = extents.y1; tile.y1 < extents.y2; tile.y1 = tile.y2) { int y2 = tile.y1 + step; if (y2 > extents.y2) y2 = extents.y2; tile.y2 = y2; for (tile.x1 = extents.x1; tile.x1 < extents.x2; tile.x1 = tile.x2) { int x2 = tile.x1 + step; if (x2 > extents.x2) x2 = extents.x2; tile.x2 = x2; tmp.width = tile.x2 - tile.x1; tmp.height = tile.y2 - tile.y1; c = clipped; for (n = 0; n < nbox; n++) { *c = box[n]; if (!box_intersect(c, &tile)) continue; DBG(("%s: box(%d, %d), (%d, %d),, dst=(%d, %d)\n", __FUNCTION__, c->x1, c->y1, c->x2, c->y2, c->x1 - tile.x1, c->y1 - tile.y1)); c++; } if (c == clipped) continue; dst_bo = kgem_create_buffer_2d(kgem, tmp.width, tmp.height, tmp.bitsPerPixel, KGEM_BUFFER_LAST, &ptr); if (!dst_bo) { if (clipped != stack) free(clipped); goto fallback; } if (!sna->render.copy_boxes(sna, GXcopy, &dst->drawable, src_bo, 0, 0, &tmp, dst_bo, -tile.x1, -tile.y1, clipped, c-clipped, COPY_LAST)) { kgem_bo_destroy(&sna->kgem, dst_bo); if (clipped != stack) free(clipped); goto fallback; } kgem_bo_submit(&sna->kgem, dst_bo); kgem_buffer_read_sync(kgem, dst_bo); if (sigtrap_get() == 0) { while (c-- != clipped) { memcpy_blt(ptr, dst->devPrivate.ptr, tmp.bitsPerPixel, dst_bo->pitch, dst->devKind, c->x1 - tile.x1, c->y1 - tile.y1, c->x1, c->y1, c->x2 - c->x1, c->y2 - c->y1); } sigtrap_put(); } kgem_bo_destroy(&sna->kgem, dst_bo); } } if (clipped != stack) free(clipped); } else { dst_bo = kgem_create_buffer_2d(kgem, tmp.width, tmp.height, tmp.bitsPerPixel, KGEM_BUFFER_LAST, &ptr); if (!dst_bo) goto fallback; if (!sna->render.copy_boxes(sna, GXcopy, &dst->drawable, src_bo, 0, 0, &tmp, dst_bo, -extents.x1, -extents.y1, box, nbox, COPY_LAST)) { kgem_bo_destroy(&sna->kgem, dst_bo); goto fallback; } kgem_bo_submit(&sna->kgem, dst_bo); kgem_buffer_read_sync(kgem, dst_bo); if (sigtrap_get() == 0) { for (n = 0; n < nbox; n++) { memcpy_blt(ptr, dst->devPrivate.ptr, tmp.bitsPerPixel, dst_bo->pitch, dst->devKind, box[n].x1 - extents.x1, box[n].y1 - extents.y1, box[n].x1, box[n].y1, box[n].x2 - box[n].x1, box[n].y2 - box[n].y1); } sigtrap_put(); } kgem_bo_destroy(&sna->kgem, dst_bo); } return; } /* count the total number of bytes to be read and allocate a bo */ cpp = dst->drawable.bitsPerPixel / 8; offset = 0; for (n = 0; n < nbox; n++) { int height = box[n].y2 - box[n].y1; int width = box[n].x2 - box[n].x1; offset += PITCH(width, cpp) * height; } DBG((" read buffer size=%d\n", offset)); dst_bo = kgem_create_buffer(kgem, offset, KGEM_BUFFER_LAST, &ptr); if (!dst_bo) { read_boxes_inplace(kgem, dst, src_bo, box, nbox); return; } cmd = XY_SRC_COPY_BLT_CMD; src_pitch = src_bo->pitch; if (kgem->gen >= 040 && src_bo->tiling) { cmd |= BLT_SRC_TILED; src_pitch >>= 2; } br13 = 0xcc << 16; switch (cpp) { default: case 4: cmd |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; br13 |= 1 << 25; /* RGB8888 */ case 2: br13 |= 1 << 24; /* RGB565 */ case 1: break; } kgem_set_mode(kgem, KGEM_BLT, dst_bo); if (!kgem_check_batch(kgem, 10) || !kgem_check_reloc_and_exec(kgem, 2) || !kgem_check_many_bo_fenced(kgem, dst_bo, src_bo, NULL)) { kgem_submit(kgem); if (!kgem_check_many_bo_fenced(kgem, dst_bo, src_bo, NULL)) goto fallback; _kgem_set_mode(kgem, KGEM_BLT); } tmp_nbox = nbox; tmp_box = box; offset = 0; if (sna->kgem.gen >= 0100) { cmd |= 8; do { int nbox_this_time, rem; nbox_this_time = tmp_nbox; rem = kgem_batch_space(kgem); if (10*nbox_this_time > rem) nbox_this_time = rem / 8; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc) / 2; assert(nbox_this_time); tmp_nbox -= nbox_this_time; assert(kgem->mode == KGEM_BLT); for (n = 0; n < nbox_this_time; n++) { int height = tmp_box[n].y2 - tmp_box[n].y1; int width = tmp_box[n].x2 - tmp_box[n].x1; int pitch = PITCH(width, cpp); uint32_t *b = kgem->batch + kgem->nbatch; DBG((" blt offset %x: (%d, %d) x (%d, %d), pitch=%d\n", offset, tmp_box[n].x1, tmp_box[n].y1, width, height, pitch)); assert(tmp_box[n].x1 >= 0); assert(tmp_box[n].x2 * dst->drawable.bitsPerPixel/8 <= src_bo->pitch); assert(tmp_box[n].y1 >= 0); assert(tmp_box[n].y2 * src_bo->pitch <= kgem_bo_size(src_bo)); b[0] = cmd; b[1] = br13 | pitch; b[2] = 0; b[3] = height << 16 | width; *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, offset); b[6] = tmp_box[n].y1 << 16 | tmp_box[n].x1; b[7] = src_pitch; *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 10; offset += pitch * height; } _kgem_submit(kgem); if (!tmp_nbox) break; _kgem_set_mode(kgem, KGEM_BLT); tmp_box += nbox_this_time; } while (1); } else { cmd |= 6; do { int nbox_this_time, rem; nbox_this_time = tmp_nbox; rem = kgem_batch_space(kgem); if (8*nbox_this_time > rem) nbox_this_time = rem / 8; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc) / 2; assert(nbox_this_time); tmp_nbox -= nbox_this_time; assert(kgem->mode == KGEM_BLT); for (n = 0; n < nbox_this_time; n++) { int height = tmp_box[n].y2 - tmp_box[n].y1; int width = tmp_box[n].x2 - tmp_box[n].x1; int pitch = PITCH(width, cpp); uint32_t *b = kgem->batch + kgem->nbatch; DBG((" blt offset %x: (%d, %d) x (%d, %d), pitch=%d\n", offset, tmp_box[n].x1, tmp_box[n].y1, width, height, pitch)); assert(tmp_box[n].x1 >= 0); assert(tmp_box[n].x2 * dst->drawable.bitsPerPixel/8 <= src_bo->pitch); assert(tmp_box[n].y1 >= 0); assert(tmp_box[n].y2 * src_bo->pitch <= kgem_bo_size(src_bo)); b[0] = cmd; b[1] = br13 | pitch; b[2] = 0; b[3] = height << 16 | width; b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, offset); b[5] = tmp_box[n].y1 << 16 | tmp_box[n].x1; b[6] = src_pitch; b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, 0); kgem->nbatch += 8; offset += pitch * height; } _kgem_submit(kgem); if (!tmp_nbox) break; _kgem_set_mode(kgem, KGEM_BLT); tmp_box += nbox_this_time; } while (1); } assert(offset == __kgem_buffer_size(dst_bo)); kgem_buffer_read_sync(kgem, dst_bo); if (sigtrap_get() == 0) { char *src = ptr; do { int height = box->y2 - box->y1; int width = box->x2 - box->x1; int pitch = PITCH(width, cpp); DBG((" copy offset %lx [%08x...%08x...%08x]: (%d, %d) x (%d, %d), src pitch=%d, dst pitch=%d, bpp=%d\n", (long)((char *)src - (char *)ptr), *(uint32_t*)src, *(uint32_t*)(src+pitch*height/2 + pitch/2 - 4), *(uint32_t*)(src+pitch*height - 4), box->x1, box->y1, width, height, pitch, dst->devKind, cpp*8)); assert(box->x1 >= 0); assert(box->x2 <= dst->drawable.width); assert(box->y1 >= 0); assert(box->y2 <= dst->drawable.height); memcpy_blt(src, dst->devPrivate.ptr, cpp*8, pitch, dst->devKind, 0, 0, box->x1, box->y1, width, height); box++; src += pitch * height; } while (--nbox); assert(src - (char *)ptr == __kgem_buffer_size(dst_bo)); sigtrap_put(); } kgem_bo_destroy(kgem, dst_bo); sna->blt_state.fill_bo = 0; } static bool upload_inplace__tiled(struct kgem *kgem, struct kgem_bo *bo) { DBG(("%s: tiling=%d\n", __FUNCTION__, bo->tiling)); switch (bo->tiling) { case I915_TILING_Y: return false; case I915_TILING_X: if (!kgem->memcpy_to_tiled_x) return false; default: break; } if (kgem->has_wc_mmap) return true; return kgem_bo_can_map__cpu(kgem, bo, true); } static bool write_boxes_inplace__tiled(struct kgem *kgem, const uint8_t *src, int stride, int bpp, int16_t src_dx, int16_t src_dy, struct kgem_bo *bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n) { uint8_t *dst; assert(kgem->has_wc_mmap || kgem_bo_can_map__cpu(kgem, bo, true)); assert(bo->tiling != I915_TILING_Y); if (kgem_bo_can_map__cpu(kgem, bo, true)) { dst = kgem_bo_map__cpu(kgem, bo); if (dst == NULL) return false; kgem_bo_sync__cpu(kgem, bo); } else { dst = kgem_bo_map__wc(kgem, bo); if (dst == NULL) return false; kgem_bo_sync__gtt(kgem, bo); } if (sigtrap_get()) return false; if (bo->tiling) { do { memcpy_to_tiled_x(kgem, src, dst, bpp, stride, bo->pitch, box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); } else { do { memcpy_blt(src, dst, bpp, stride, bo->pitch, box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); } sigtrap_put(); return true; } static bool write_boxes_inplace(struct kgem *kgem, const void *src, int stride, int bpp, int16_t src_dx, int16_t src_dy, struct kgem_bo *bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n) { void *dst; DBG(("%s x %d, handle=%d, tiling=%d\n", __FUNCTION__, n, bo->handle, bo->tiling)); if (upload_inplace__tiled(kgem, bo) && write_boxes_inplace__tiled(kgem, src, stride, bpp, src_dx, src_dy, bo, dst_dx, dst_dy, box, n)) return true; if (!kgem_bo_can_map(kgem, bo)) return false; kgem_bo_submit(kgem, bo); dst = kgem_bo_map(kgem, bo); if (dst == NULL) return false; assert(dst != src); if (sigtrap_get()) return false; do { DBG(("%s: (%d, %d) -> (%d, %d) x (%d, %d) [bpp=%d, src_pitch=%d, dst_pitch=%d]\n", __FUNCTION__, box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1, bpp, stride, bo->pitch)); assert(box->x2 > box->x1); assert(box->y2 > box->y1); assert(box->x1 + dst_dx >= 0); assert((box->x2 + dst_dx)*bpp <= 8*bo->pitch); assert(box->y1 + dst_dy >= 0); assert((box->y2 + dst_dy)*bo->pitch <= kgem_bo_size(bo)); assert(box->x1 + src_dx >= 0); assert((box->x2 + src_dx)*bpp <= 8*stride); assert(box->y1 + src_dy >= 0); memcpy_blt(src, dst, bpp, stride, bo->pitch, box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1); box++; } while (--n); sigtrap_put(); return true; } static bool __upload_inplace(struct kgem *kgem, struct kgem_bo *bo, const BoxRec *box, int n, int bpp) { unsigned int bytes; if (FORCE_INPLACE) return FORCE_INPLACE > 0; /* If we are writing through the GTT, check first if we might be * able to almagamate a series of small writes into a single * operation. */ bytes = 0; while (n--) { bytes += (box->x2 - box->x1) * (box->y2 - box->y1); box++; } if (__kgem_bo_is_busy(kgem, bo)) return bytes * bpp >> 12 >= kgem->half_cpu_cache_pages; else return bytes * bpp >> 12; } static bool upload_inplace(struct kgem *kgem, struct kgem_bo *bo, const BoxRec *box, int n, int bpp) { if (unlikely(kgem->wedged)) return true; if (!kgem_bo_can_map(kgem, bo) && !upload_inplace__tiled(kgem, bo)) return false; return __upload_inplace(kgem, bo, box, n,bpp); } bool sna_write_boxes(struct sna *sna, PixmapPtr dst, struct kgem_bo * const dst_bo, int16_t const dst_dx, int16_t const dst_dy, const void * const src, int const stride, int16_t const src_dx, int16_t const src_dy, const BoxRec *box, int nbox) { struct kgem *kgem = &sna->kgem; struct kgem_bo *src_bo; BoxRec extents; void *ptr; int offset; int n, cmd, br13; bool can_blt; DBG(("%s x %d, src stride=%d, src dx=(%d, %d)\n", __FUNCTION__, nbox, stride, src_dx, src_dy)); if (upload_inplace(kgem, dst_bo, box, nbox, dst->drawable.bitsPerPixel) && write_boxes_inplace(kgem, src, stride, dst->drawable.bitsPerPixel, src_dx, src_dy, dst_bo, dst_dx, dst_dy, box, nbox)) return true; if (wedged(sna)) return false; can_blt = kgem_bo_can_blt(kgem, dst_bo) && (box[0].x2 - box[0].x1) * dst->drawable.bitsPerPixel < 8 * (MAXSHORT - 4); extents = box[0]; for (n = 1; n < nbox; n++) { if (box[n].x1 < extents.x1) extents.x1 = box[n].x1; if (box[n].x2 > extents.x2) extents.x2 = box[n].x2; if (can_blt) can_blt = (box[n].x2 - box[n].x1) * dst->drawable.bitsPerPixel < 8 * (MAXSHORT - 4); if (box[n].y1 < extents.y1) extents.y1 = box[n].y1; if (box[n].y2 > extents.y2) extents.y2 = box[n].y2; } /* Try to avoid switching rings... */ if (!can_blt || kgem->ring == KGEM_RENDER || upload_too_large(sna, extents.x2 - extents.x1, extents.y2 - extents.y1)) { DrawableRec tmp; tmp.width = extents.x2 - extents.x1; tmp.height = extents.y2 - extents.y1; tmp.depth = dst->drawable.depth; tmp.bitsPerPixel = dst->drawable.bitsPerPixel; assert(tmp.width); assert(tmp.height); DBG(("%s: upload (%d, %d)x(%d, %d), max %dx%d\n", __FUNCTION__, extents.x1, extents.y1, tmp.width, tmp.height, sna->render.max_3d_size, sna->render.max_3d_size)); if (must_tile(sna, tmp.width, tmp.height)) { BoxRec tile, stack[64], *clipped; int cpp, step; tile: cpp = dst->drawable.bitsPerPixel / 8; step = MIN(sna->render.max_3d_size, (MAXSHORT&~63) / cpp); while (step * step * cpp > sna->kgem.max_upload_tile_size) step /= 2; if (step * cpp > 4096) step = 4096 / cpp; assert(step); DBG(("%s: tiling upload, using %dx%d tiles\n", __FUNCTION__, step, step)); if (n > ARRAY_SIZE(stack)) { clipped = malloc(sizeof(BoxRec) * n); if (clipped == NULL) goto fallback; } else clipped = stack; for (tile.y1 = extents.y1; tile.y1 < extents.y2; tile.y1 = tile.y2) { int y2 = tile.y1 + step; if (y2 > extents.y2) y2 = extents.y2; tile.y2 = y2; for (tile.x1 = extents.x1; tile.x1 < extents.x2; tile.x1 = tile.x2) { int x2 = tile.x1 + step; if (x2 > extents.x2) x2 = extents.x2; tile.x2 = x2; tmp.width = tile.x2 - tile.x1; tmp.height = tile.y2 - tile.y1; src_bo = kgem_create_buffer_2d(kgem, tmp.width, tmp.height, tmp.bitsPerPixel, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!src_bo) { if (clipped != stack) free(clipped); goto fallback; } if (sigtrap_get() == 0) { BoxRec *c = clipped; for (n = 0; n < nbox; n++) { *c = box[n]; if (!box_intersect(c, &tile)) continue; DBG(("%s: box(%d, %d), (%d, %d), src=(%d, %d), dst=(%d, %d)\n", __FUNCTION__, c->x1, c->y1, c->x2, c->y2, src_dx, src_dy, c->x1 - tile.x1, c->y1 - tile.y1)); memcpy_blt(src, ptr, tmp.bitsPerPixel, stride, src_bo->pitch, c->x1 + src_dx, c->y1 + src_dy, c->x1 - tile.x1, c->y1 - tile.y1, c->x2 - c->x1, c->y2 - c->y1); c++; } if (c != clipped) n = sna->render.copy_boxes(sna, GXcopy, &tmp, src_bo, -tile.x1, -tile.y1, &dst->drawable, dst_bo, dst_dx, dst_dy, clipped, c - clipped, 0); else n = 1; sigtrap_put(); } else n = 0; kgem_bo_destroy(&sna->kgem, src_bo); if (!n) { if (clipped != stack) free(clipped); goto fallback; } } } if (clipped != stack) free(clipped); } else { src_bo = kgem_create_buffer_2d(kgem, tmp.width, tmp.height, tmp.bitsPerPixel, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!src_bo) goto fallback; if (sigtrap_get() == 0) { for (n = 0; n < nbox; n++) { DBG(("%s: box(%d, %d), (%d, %d), src=(%d, %d), dst=(%d, %d)\n", __FUNCTION__, box[n].x1, box[n].y1, box[n].x2, box[n].y2, src_dx, src_dy, box[n].x1 - extents.x1, box[n].y1 - extents.y1)); memcpy_blt(src, ptr, tmp.bitsPerPixel, stride, src_bo->pitch, box[n].x1 + src_dx, box[n].y1 + src_dy, box[n].x1 - extents.x1, box[n].y1 - extents.y1, box[n].x2 - box[n].x1, box[n].y2 - box[n].y1); } n = sna->render.copy_boxes(sna, GXcopy, &tmp, src_bo, -extents.x1, -extents.y1, &dst->drawable, dst_bo, dst_dx, dst_dy, box, nbox, 0); sigtrap_put(); } else n = 0; kgem_bo_destroy(&sna->kgem, src_bo); if (!n) goto tile; } return true; } cmd = XY_SRC_COPY_BLT_CMD; br13 = dst_bo->pitch; if (kgem->gen >= 040 && dst_bo->tiling) { cmd |= BLT_DST_TILED; br13 >>= 2; } br13 |= 0xcc << 16; switch (dst->drawable.bitsPerPixel) { default: case 32: cmd |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; br13 |= 1 << 25; /* RGB8888 */ case 16: br13 |= 1 << 24; /* RGB565 */ case 8: break; } kgem_set_mode(kgem, KGEM_BLT, dst_bo); if (!kgem_check_batch(kgem, 10) || !kgem_check_reloc_and_exec(kgem, 2) || !kgem_check_bo_fenced(kgem, dst_bo)) { kgem_submit(kgem); if (!kgem_check_bo_fenced(kgem, dst_bo)) goto fallback; _kgem_set_mode(kgem, KGEM_BLT); } if (kgem->gen >= 0100) { cmd |= 8; do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (10*nbox_this_time > rem) nbox_this_time = rem / 8; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc) / 2; assert(nbox_this_time); nbox -= nbox_this_time; /* Count the total number of bytes to be read and allocate a * single buffer large enough. Or if it is very small, combine * with other allocations. */ offset = 0; for (n = 0; n < nbox_this_time; n++) { int height = box[n].y2 - box[n].y1; int width = box[n].x2 - box[n].x1; offset += PITCH(width, dst->drawable.bitsPerPixel >> 3) * height; } src_bo = kgem_create_buffer(kgem, offset, KGEM_BUFFER_WRITE_INPLACE | (nbox ? KGEM_BUFFER_LAST : 0), &ptr); if (!src_bo) break; if (sigtrap_get() == 0) { offset = 0; do { int height = box->y2 - box->y1; int width = box->x2 - box->x1; int pitch = PITCH(width, dst->drawable.bitsPerPixel >> 3); uint32_t *b; DBG((" %s: box src=(%d, %d), dst=(%d, %d) size=(%d, %d), dst offset=%d, dst pitch=%d\n", __FUNCTION__, box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, width, height, offset, pitch)); assert(box->x1 + src_dx >= 0); assert((box->x2 + src_dx)*dst->drawable.bitsPerPixel <= 8*stride); assert(box->y1 + src_dy >= 0); assert(box->x1 + dst_dx >= 0); assert(box->y1 + dst_dy >= 0); memcpy_blt(src, (char *)ptr + offset, dst->drawable.bitsPerPixel, stride, pitch, box->x1 + src_dx, box->y1 + src_dy, 0, 0, width, height); assert(kgem->mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; b[0] = cmd; b[1] = br13; b[2] = (box->y1 + dst_dy) << 16 | (box->x1 + dst_dx); b[3] = (box->y2 + dst_dy) << 16 | (box->x2 + dst_dx); *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = 0; b[7] = pitch; *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, offset); kgem->nbatch += 10; box++; offset += pitch * height; } while (--nbox_this_time); assert(offset == __kgem_buffer_size(src_bo)); sigtrap_put(); } if (nbox) { _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } kgem_bo_destroy(kgem, src_bo); } while (nbox); } else { cmd |= 6; do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (8*nbox_this_time > rem) nbox_this_time = rem / 8; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc) / 2; assert(nbox_this_time); nbox -= nbox_this_time; /* Count the total number of bytes to be read and allocate a * single buffer large enough. Or if it is very small, combine * with other allocations. */ offset = 0; for (n = 0; n < nbox_this_time; n++) { int height = box[n].y2 - box[n].y1; int width = box[n].x2 - box[n].x1; offset += PITCH(width, dst->drawable.bitsPerPixel >> 3) * height; } src_bo = kgem_create_buffer(kgem, offset, KGEM_BUFFER_WRITE_INPLACE | (nbox ? KGEM_BUFFER_LAST : 0), &ptr); if (!src_bo) break; if (sigtrap_get()) { kgem_bo_destroy(kgem, src_bo); goto fallback; } offset = 0; do { int height = box->y2 - box->y1; int width = box->x2 - box->x1; int pitch = PITCH(width, dst->drawable.bitsPerPixel >> 3); uint32_t *b; DBG((" %s: box src=(%d, %d), dst=(%d, %d) size=(%d, %d), dst offset=%d, dst pitch=%d\n", __FUNCTION__, box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, width, height, offset, pitch)); assert(box->x1 + src_dx >= 0); assert((box->x2 + src_dx)*dst->drawable.bitsPerPixel <= 8*stride); assert(box->y1 + src_dy >= 0); assert(box->x1 + dst_dx >= 0); assert(box->y1 + dst_dy >= 0); memcpy_blt(src, (char *)ptr + offset, dst->drawable.bitsPerPixel, stride, pitch, box->x1 + src_dx, box->y1 + src_dy, 0, 0, width, height); assert(kgem->mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; b[0] = cmd; b[1] = br13; b[2] = (box->y1 + dst_dy) << 16 | (box->x1 + dst_dx); b[3] = (box->y2 + dst_dy) << 16 | (box->x2 + dst_dx); b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = 0; b[6] = pitch; b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, offset); kgem->nbatch += 8; box++; offset += pitch * height; } while (--nbox_this_time); assert(offset == __kgem_buffer_size(src_bo)); sigtrap_put(); if (nbox) { _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } kgem_bo_destroy(kgem, src_bo); } while (nbox); } sna->blt_state.fill_bo = 0; return true; fallback: return write_boxes_inplace(kgem, src, stride, dst->drawable.bitsPerPixel, src_dx, src_dy, dst_bo, dst_dx, dst_dy, box, nbox); } static bool write_boxes_inplace__xor(struct kgem *kgem, const void *src, int stride, int bpp, int16_t src_dx, int16_t src_dy, struct kgem_bo *bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, uint32_t and, uint32_t or) { void *dst; DBG(("%s x %d, tiling=%d\n", __FUNCTION__, n, bo->tiling)); if (!kgem_bo_can_map(kgem, bo)) return false; kgem_bo_submit(kgem, bo); dst = kgem_bo_map(kgem, bo); if (dst == NULL) return false; if (sigtrap_get()) return false; do { DBG(("%s: (%d, %d) -> (%d, %d) x (%d, %d) [bpp=%d, src_pitch=%d, dst_pitch=%d]\n", __FUNCTION__, box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1, bpp, stride, bo->pitch)); assert(box->x2 > box->x1); assert(box->y2 > box->y1); assert(box->x1 + dst_dx >= 0); assert((box->x2 + dst_dx)*bpp <= 8*bo->pitch); assert(box->y1 + dst_dy >= 0); assert((box->y2 + dst_dy)*bo->pitch <= kgem_bo_size(bo)); assert(box->x1 + src_dx >= 0); assert((box->x2 + src_dx)*bpp <= 8*stride); assert(box->y1 + src_dy >= 0); memcpy_xor(src, dst, bpp, stride, bo->pitch, box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1, and, or); box++; } while (--n); sigtrap_put(); return true; } static bool upload_inplace__xor(struct kgem *kgem, struct kgem_bo *bo, const BoxRec *box, int n, int bpp) { if (unlikely(kgem->wedged)) return true; if (!kgem_bo_can_map(kgem, bo)) return false; return __upload_inplace(kgem, bo, box, n, bpp); } bool sna_write_boxes__xor(struct sna *sna, PixmapPtr dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const void *src, int stride, int16_t src_dx, int16_t src_dy, const BoxRec *box, int nbox, uint32_t and, uint32_t or) { struct kgem *kgem = &sna->kgem; struct kgem_bo *src_bo; BoxRec extents; bool can_blt; void *ptr; int offset; int n, cmd, br13; DBG(("%s x %d\n", __FUNCTION__, nbox)); if (upload_inplace__xor(kgem, dst_bo, box, nbox, dst->drawable.bitsPerPixel) && write_boxes_inplace__xor(kgem, src, stride, dst->drawable.bitsPerPixel, src_dx, src_dy, dst_bo, dst_dx, dst_dy, box, nbox, and, or)) return true; if (wedged(sna)) return false; can_blt = kgem_bo_can_blt(kgem, dst_bo) && (box[0].x2 - box[0].x1) * dst->drawable.bitsPerPixel < 8 * (MAXSHORT - 4); extents = box[0]; for (n = 1; n < nbox; n++) { if (box[n].x1 < extents.x1) extents.x1 = box[n].x1; if (box[n].x2 > extents.x2) extents.x2 = box[n].x2; if (can_blt) can_blt = (box[n].x2 - box[n].x1) * dst->drawable.bitsPerPixel < 8 * (MAXSHORT - 4); if (box[n].y1 < extents.y1) extents.y1 = box[n].y1; if (box[n].y2 > extents.y2) extents.y2 = box[n].y2; } /* Try to avoid switching rings... */ if (!can_blt || kgem->ring == KGEM_RENDER || upload_too_large(sna, extents.x2 - extents.x1, extents.y2 - extents.y1)) { DrawableRec tmp; tmp.width = extents.x2 - extents.x1; tmp.height = extents.y2 - extents.y1; tmp.depth = dst->drawable.depth; tmp.bitsPerPixel = dst->drawable.bitsPerPixel; assert(tmp.width); assert(tmp.height); DBG(("%s: upload (%d, %d)x(%d, %d), max %dx%d\n", __FUNCTION__, extents.x1, extents.y1, tmp.width, tmp.height, sna->render.max_3d_size, sna->render.max_3d_size)); if (must_tile(sna, tmp.width, tmp.height)) { BoxRec tile, stack[64], *clipped; int step; tile: step = MIN(sna->render.max_3d_size - 4096 / dst->drawable.bitsPerPixel, 8*(MAXSHORT&~63) / dst->drawable.bitsPerPixel); while (step * step * 4 > sna->kgem.max_upload_tile_size) step /= 2; DBG(("%s: tiling upload, using %dx%d tiles\n", __FUNCTION__, step, step)); assert(step); if (n > ARRAY_SIZE(stack)) { clipped = malloc(sizeof(BoxRec) * n); if (clipped == NULL) goto fallback; } else clipped = stack; for (tile.y1 = extents.y1; tile.y1 < extents.y2; tile.y1 = tile.y2) { int y2 = tile.y1 + step; if (y2 > extents.y2) y2 = extents.y2; tile.y2 = y2; for (tile.x1 = extents.x1; tile.x1 < extents.x2; tile.x1 = tile.x2) { int x2 = tile.x1 + step; if (x2 > extents.x2) x2 = extents.x2; tile.x2 = x2; tmp.width = tile.x2 - tile.x1; tmp.height = tile.y2 - tile.y1; src_bo = kgem_create_buffer_2d(kgem, tmp.width, tmp.height, tmp.bitsPerPixel, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!src_bo) { if (clipped != stack) free(clipped); goto fallback; } if (sigtrap_get() == 0) { BoxRec *c = clipped; for (n = 0; n < nbox; n++) { *c = box[n]; if (!box_intersect(c, &tile)) continue; DBG(("%s: box(%d, %d), (%d, %d), src=(%d, %d), dst=(%d, %d)\n", __FUNCTION__, c->x1, c->y1, c->x2, c->y2, src_dx, src_dy, c->x1 - tile.x1, c->y1 - tile.y1)); memcpy_xor(src, ptr, tmp.bitsPerPixel, stride, src_bo->pitch, c->x1 + src_dx, c->y1 + src_dy, c->x1 - tile.x1, c->y1 - tile.y1, c->x2 - c->x1, c->y2 - c->y1, and, or); c++; } if (c != clipped) n = sna->render.copy_boxes(sna, GXcopy, &tmp, src_bo, -tile.x1, -tile.y1, &dst->drawable, dst_bo, dst_dx, dst_dy, clipped, c - clipped, 0); else n = 1; sigtrap_put(); } else n = 0; kgem_bo_destroy(&sna->kgem, src_bo); if (!n) { if (clipped != stack) free(clipped); goto fallback; } } } if (clipped != stack) free(clipped); } else { src_bo = kgem_create_buffer_2d(kgem, tmp.width, tmp.height, tmp.bitsPerPixel, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!src_bo) goto fallback; if (sigtrap_get() == 0) { for (n = 0; n < nbox; n++) { DBG(("%s: box(%d, %d), (%d, %d), src=(%d, %d), dst=(%d, %d)\n", __FUNCTION__, box[n].x1, box[n].y1, box[n].x2, box[n].y2, src_dx, src_dy, box[n].x1 - extents.x1, box[n].y1 - extents.y1)); memcpy_xor(src, ptr, tmp.bitsPerPixel, stride, src_bo->pitch, box[n].x1 + src_dx, box[n].y1 + src_dy, box[n].x1 - extents.x1, box[n].y1 - extents.y1, box[n].x2 - box[n].x1, box[n].y2 - box[n].y1, and, or); } n = sna->render.copy_boxes(sna, GXcopy, &tmp, src_bo, -extents.x1, -extents.y1, &dst->drawable, dst_bo, dst_dx, dst_dy, box, nbox, 0); sigtrap_put(); } else n = 0; kgem_bo_destroy(&sna->kgem, src_bo); if (!n) goto tile; } return true; } cmd = XY_SRC_COPY_BLT_CMD; br13 = dst_bo->pitch; if (kgem->gen >= 040 && dst_bo->tiling) { cmd |= BLT_DST_TILED; br13 >>= 2; } br13 |= 0xcc << 16; switch (dst->drawable.bitsPerPixel) { default: case 32: cmd |= BLT_WRITE_ALPHA | BLT_WRITE_RGB; br13 |= 1 << 25; /* RGB8888 */ case 16: br13 |= 1 << 24; /* RGB565 */ case 8: break; } kgem_set_mode(kgem, KGEM_BLT, dst_bo); if (!kgem_check_batch(kgem, 10) || !kgem_check_reloc_and_exec(kgem, 2) || !kgem_check_bo_fenced(kgem, dst_bo)) { kgem_submit(kgem); if (!kgem_check_bo_fenced(kgem, dst_bo)) goto fallback; _kgem_set_mode(kgem, KGEM_BLT); } if (sna->kgem.gen >= 0100) { cmd |= 8; do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (10*nbox_this_time > rem) nbox_this_time = rem / 8; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc) / 2; assert(nbox_this_time); nbox -= nbox_this_time; /* Count the total number of bytes to be read and allocate a * single buffer large enough. Or if it is very small, combine * with other allocations. */ offset = 0; for (n = 0; n < nbox_this_time; n++) { int height = box[n].y2 - box[n].y1; int width = box[n].x2 - box[n].x1; offset += PITCH(width, dst->drawable.bitsPerPixel >> 3) * height; } src_bo = kgem_create_buffer(kgem, offset, KGEM_BUFFER_WRITE_INPLACE | (nbox ? KGEM_BUFFER_LAST : 0), &ptr); if (!src_bo) goto fallback; if (sigtrap_get()) { kgem_bo_destroy(kgem, src_bo); goto fallback; } offset = 0; do { int height = box->y2 - box->y1; int width = box->x2 - box->x1; int pitch = PITCH(width, dst->drawable.bitsPerPixel >> 3); uint32_t *b; DBG((" %s: box src=(%d, %d), dst=(%d, %d) size=(%d, %d), dst offset=%d, dst pitch=%d\n", __FUNCTION__, box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, width, height, offset, pitch)); assert(box->x1 + src_dx >= 0); assert((box->x2 + src_dx)*dst->drawable.bitsPerPixel <= 8*stride); assert(box->y1 + src_dy >= 0); assert(box->x1 + dst_dx >= 0); assert(box->y1 + dst_dy >= 0); memcpy_xor(src, (char *)ptr + offset, dst->drawable.bitsPerPixel, stride, pitch, box->x1 + src_dx, box->y1 + src_dy, 0, 0, width, height, and, or); assert(kgem->mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; b[0] = cmd; b[1] = br13; b[2] = (box->y1 + dst_dy) << 16 | (box->x1 + dst_dx); b[3] = (box->y2 + dst_dy) << 16 | (box->x2 + dst_dx); *(uint64_t *)(b+4) = kgem_add_reloc64(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[6] = 0; b[7] = pitch; *(uint64_t *)(b+8) = kgem_add_reloc64(kgem, kgem->nbatch + 8, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, offset); kgem->nbatch += 10; box++; offset += pitch * height; } while (--nbox_this_time); assert(offset == __kgem_buffer_size(src_bo)); sigtrap_put(); if (nbox) { _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } kgem_bo_destroy(kgem, src_bo); } while (nbox); } else { cmd |= 6; do { int nbox_this_time, rem; nbox_this_time = nbox; rem = kgem_batch_space(kgem); if (8*nbox_this_time > rem) nbox_this_time = rem / 8; if (2*nbox_this_time > KGEM_RELOC_SIZE(kgem) - kgem->nreloc) nbox_this_time = (KGEM_RELOC_SIZE(kgem) - kgem->nreloc) / 2; assert(nbox_this_time); nbox -= nbox_this_time; /* Count the total number of bytes to be read and allocate a * single buffer large enough. Or if it is very small, combine * with other allocations. */ offset = 0; for (n = 0; n < nbox_this_time; n++) { int height = box[n].y2 - box[n].y1; int width = box[n].x2 - box[n].x1; offset += PITCH(width, dst->drawable.bitsPerPixel >> 3) * height; } src_bo = kgem_create_buffer(kgem, offset, KGEM_BUFFER_WRITE_INPLACE | (nbox ? KGEM_BUFFER_LAST : 0), &ptr); if (!src_bo) goto fallback; if (sigtrap_get()) { kgem_bo_destroy(kgem, src_bo); goto fallback; } offset = 0; do { int height = box->y2 - box->y1; int width = box->x2 - box->x1; int pitch = PITCH(width, dst->drawable.bitsPerPixel >> 3); uint32_t *b; DBG((" %s: box src=(%d, %d), dst=(%d, %d) size=(%d, %d), dst offset=%d, dst pitch=%d\n", __FUNCTION__, box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, width, height, offset, pitch)); assert(box->x1 + src_dx >= 0); assert((box->x2 + src_dx)*dst->drawable.bitsPerPixel <= 8*stride); assert(box->y1 + src_dy >= 0); assert(box->x1 + dst_dx >= 0); assert(box->y1 + dst_dy >= 0); memcpy_xor(src, (char *)ptr + offset, dst->drawable.bitsPerPixel, stride, pitch, box->x1 + src_dx, box->y1 + src_dy, 0, 0, width, height, and, or); assert(kgem->mode == KGEM_BLT); b = kgem->batch + kgem->nbatch; b[0] = cmd; b[1] = br13; b[2] = (box->y1 + dst_dy) << 16 | (box->x1 + dst_dx); b[3] = (box->y2 + dst_dy) << 16 | (box->x2 + dst_dx); b[4] = kgem_add_reloc(kgem, kgem->nbatch + 4, dst_bo, I915_GEM_DOMAIN_RENDER << 16 | I915_GEM_DOMAIN_RENDER | KGEM_RELOC_FENCED, 0); b[5] = 0; b[6] = pitch; b[7] = kgem_add_reloc(kgem, kgem->nbatch + 7, src_bo, I915_GEM_DOMAIN_RENDER << 16 | KGEM_RELOC_FENCED, offset); kgem->nbatch += 8; box++; offset += pitch * height; } while (--nbox_this_time); assert(offset == __kgem_buffer_size(src_bo)); sigtrap_put(); if (nbox) { _kgem_submit(kgem); _kgem_set_mode(kgem, KGEM_BLT); } kgem_bo_destroy(kgem, src_bo); } while (nbox); } sna->blt_state.fill_bo = 0; return true; fallback: return write_boxes_inplace__xor(kgem, src, stride, dst->drawable.bitsPerPixel, src_dx, src_dy, dst_bo, dst_dx, dst_dy, box, nbox, and, or); } static bool indirect_replace(struct sna *sna, PixmapPtr pixmap, struct kgem_bo *bo, const void *src, int stride) { struct kgem *kgem = &sna->kgem; struct kgem_bo *src_bo; BoxRec box; void *ptr; bool ret; DBG(("%s: size=%d vs %d\n", __FUNCTION__, stride * pixmap->drawable.height >> 12, kgem->half_cpu_cache_pages)); if (stride * pixmap->drawable.height >> 12 > kgem->half_cpu_cache_pages) return false; if (!kgem_bo_can_blt(kgem, bo) && must_tile(sna, pixmap->drawable.width, pixmap->drawable.height)) return false; src_bo = kgem_create_buffer_2d(kgem, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, KGEM_BUFFER_WRITE_INPLACE, &ptr); if (!src_bo) return false; ret = false; if (sigtrap_get() == 0) { memcpy_blt(src, ptr, pixmap->drawable.bitsPerPixel, stride, src_bo->pitch, 0, 0, 0, 0, pixmap->drawable.width, pixmap->drawable.height); box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; ret = sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, src_bo, 0, 0, &pixmap->drawable, bo, 0, 0, &box, 1, 0); sigtrap_put(); } kgem_bo_destroy(kgem, src_bo); return ret; } bool sna_replace(struct sna *sna, PixmapPtr pixmap, const void *src, int stride) { struct sna_pixmap *priv = sna_pixmap(pixmap); struct kgem_bo *bo = priv->gpu_bo; void *dst; assert(bo); DBG(("%s(handle=%d, %dx%d, bpp=%d, tiling=%d) busy?=%d\n", __FUNCTION__, bo->handle, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, bo->tiling, __kgem_bo_is_busy(&sna->kgem, bo))); assert(!priv->pinned); kgem_bo_undo(&sna->kgem, bo); if (__kgem_bo_is_busy(&sna->kgem, bo)) { struct kgem_bo *new_bo; if (indirect_replace(sna, pixmap, bo, src, stride)) return true; new_bo = kgem_create_2d(&sna->kgem, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, bo->tiling, CREATE_GTT_MAP | CREATE_INACTIVE); if (new_bo) bo = new_bo; } if (bo->tiling == I915_TILING_NONE && bo->pitch == stride && kgem_bo_write(&sna->kgem, bo, src, (pixmap->drawable.height-1)*stride + pixmap->drawable.width*pixmap->drawable.bitsPerPixel/8)) goto done; if (upload_inplace__tiled(&sna->kgem, bo)) { BoxRec box; box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; if (write_boxes_inplace__tiled(&sna->kgem, src, stride, pixmap->drawable.bitsPerPixel, 0, 0, bo, 0, 0, &box, 1)) goto done; } if (kgem_bo_can_map(&sna->kgem, bo) && (dst = kgem_bo_map(&sna->kgem, bo)) != NULL && sigtrap_get() == 0) { memcpy_blt(src, dst, pixmap->drawable.bitsPerPixel, stride, bo->pitch, 0, 0, 0, 0, pixmap->drawable.width, pixmap->drawable.height); sigtrap_put(); } else { BoxRec box; if (bo != priv->gpu_bo) { kgem_bo_destroy(&sna->kgem, bo); bo = priv->gpu_bo; } box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; if (!sna_write_boxes(sna, pixmap, bo, 0, 0, src, stride, 0, 0, &box, 1)) return false; } done: if (bo != priv->gpu_bo) { sna_pixmap_unmap(pixmap, priv); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = bo; } return true; } bool sna_replace__xor(struct sna *sna, PixmapPtr pixmap, const void *src, int stride, uint32_t and, uint32_t or) { struct sna_pixmap *priv = sna_pixmap(pixmap); struct kgem_bo *bo = priv->gpu_bo; void *dst; DBG(("%s(handle=%d, %dx%d, bpp=%d, tiling=%d)\n", __FUNCTION__, bo->handle, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, bo->tiling)); assert(!priv->pinned); kgem_bo_undo(&sna->kgem, bo); if (!kgem_bo_can_map(&sna->kgem, bo) || __kgem_bo_is_busy(&sna->kgem, bo)) { struct kgem_bo *new_bo; new_bo = kgem_create_2d(&sna->kgem, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, bo->tiling, CREATE_GTT_MAP | CREATE_INACTIVE); if (new_bo) bo = new_bo; } if (kgem_bo_can_map(&sna->kgem, bo) && (dst = kgem_bo_map(&sna->kgem, bo)) != NULL && sigtrap_get() == 0) { memcpy_xor(src, dst, pixmap->drawable.bitsPerPixel, stride, bo->pitch, 0, 0, 0, 0, pixmap->drawable.width, pixmap->drawable.height, and, or); sigtrap_put(); } else { BoxRec box; if (bo != priv->gpu_bo) { kgem_bo_destroy(&sna->kgem, bo); bo = priv->gpu_bo; } box.x1 = box.y1 = 0; box.x2 = pixmap->drawable.width; box.y2 = pixmap->drawable.height; if (!sna_write_boxes__xor(sna, pixmap, bo, 0, 0, src, stride, 0, 0, &box, 1, and, or)) return false; } if (bo != priv->gpu_bo) { sna_pixmap_unmap(pixmap, priv); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = bo; } return true; } xf86-video-intel-2.99.917/src/sna/gen6_render.c0000664000175000017500000030612212432737457015663 00000000000000/* * Copyright © 2006,2008,2011 Intel Corporation * Copyright © 2007 Red Hat, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Wang Zhenyu * Eric Anholt * Carl Worth * Keith Packard * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_reg.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_video.h" #include "brw/brw.h" #include "gen6_render.h" #include "gen6_common.h" #include "gen4_common.h" #include "gen4_source.h" #include "gen4_vertex.h" #define ALWAYS_INVALIDATE 0 #define ALWAYS_FLUSH 0 #define ALWAYS_STALL 0 #define NO_COMPOSITE 0 #define NO_COMPOSITE_SPANS 0 #define NO_COPY 0 #define NO_COPY_BOXES 0 #define NO_FILL 0 #define NO_FILL_BOXES 0 #define NO_FILL_ONE 0 #define NO_FILL_CLEAR 0 #define USE_8_PIXEL_DISPATCH 1 #define USE_16_PIXEL_DISPATCH 1 #define USE_32_PIXEL_DISPATCH 0 #if !USE_8_PIXEL_DISPATCH && !USE_16_PIXEL_DISPATCH && !USE_32_PIXEL_DISPATCH #error "Must select at least 8, 16 or 32 pixel dispatch" #endif #define GEN6_MAX_SIZE 8192 struct gt_info { const char *name; int max_vs_threads; int max_gs_threads; int max_wm_threads; struct { int size; int max_vs_entries; int max_gs_entries; } urb; int gt; }; static const struct gt_info gt1_info = { .name = "Sandybridge (gen6, gt1)", .max_vs_threads = 24, .max_gs_threads = 21, .max_wm_threads = 40, .urb = { 32, 256, 256 }, .gt = 1, }; static const struct gt_info gt2_info = { .name = "Sandybridge (gen6, gt2)", .max_vs_threads = 60, .max_gs_threads = 60, .max_wm_threads = 80, .urb = { 64, 256, 256 }, .gt = 2, }; static const uint32_t ps_kernel_packed[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_yuv_rgb.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_planar[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_planar.g6b" #include "exa_wm_yuv_rgb.g6b" #include "exa_wm_write.g6b" }; #define NOKERNEL(kernel_enum, func, ns) \ [GEN6_WM_KERNEL_##kernel_enum] = {#kernel_enum, func, 0, ns} #define KERNEL(kernel_enum, kernel, ns) \ [GEN6_WM_KERNEL_##kernel_enum] = {#kernel_enum, kernel, sizeof(kernel), ns} static const struct wm_kernel_info { const char *name; const void *data; unsigned int size; unsigned int num_surfaces; } wm_kernels[] = { NOKERNEL(NOMASK, brw_wm_kernel__affine, 2), NOKERNEL(NOMASK_P, brw_wm_kernel__projective, 2), NOKERNEL(MASK, brw_wm_kernel__affine_mask, 3), NOKERNEL(MASK_P, brw_wm_kernel__projective_mask, 3), NOKERNEL(MASKCA, brw_wm_kernel__affine_mask_ca, 3), NOKERNEL(MASKCA_P, brw_wm_kernel__projective_mask_ca, 3), NOKERNEL(MASKSA, brw_wm_kernel__affine_mask_sa, 3), NOKERNEL(MASKSA_P, brw_wm_kernel__projective_mask_sa, 3), NOKERNEL(OPACITY, brw_wm_kernel__affine_opacity, 2), NOKERNEL(OPACITY_P, brw_wm_kernel__projective_opacity, 2), KERNEL(VIDEO_PLANAR, ps_kernel_planar, 7), KERNEL(VIDEO_PACKED, ps_kernel_packed, 2), }; #undef KERNEL static const struct blendinfo { bool src_alpha; uint32_t src_blend; uint32_t dst_blend; } gen6_blend_op[] = { /* Clear */ {0, GEN6_BLENDFACTOR_ZERO, GEN6_BLENDFACTOR_ZERO}, /* Src */ {0, GEN6_BLENDFACTOR_ONE, GEN6_BLENDFACTOR_ZERO}, /* Dst */ {0, GEN6_BLENDFACTOR_ZERO, GEN6_BLENDFACTOR_ONE}, /* Over */ {1, GEN6_BLENDFACTOR_ONE, GEN6_BLENDFACTOR_INV_SRC_ALPHA}, /* OverReverse */ {0, GEN6_BLENDFACTOR_INV_DST_ALPHA, GEN6_BLENDFACTOR_ONE}, /* In */ {0, GEN6_BLENDFACTOR_DST_ALPHA, GEN6_BLENDFACTOR_ZERO}, /* InReverse */ {1, GEN6_BLENDFACTOR_ZERO, GEN6_BLENDFACTOR_SRC_ALPHA}, /* Out */ {0, GEN6_BLENDFACTOR_INV_DST_ALPHA, GEN6_BLENDFACTOR_ZERO}, /* OutReverse */ {1, GEN6_BLENDFACTOR_ZERO, GEN6_BLENDFACTOR_INV_SRC_ALPHA}, /* Atop */ {1, GEN6_BLENDFACTOR_DST_ALPHA, GEN6_BLENDFACTOR_INV_SRC_ALPHA}, /* AtopReverse */ {1, GEN6_BLENDFACTOR_INV_DST_ALPHA, GEN6_BLENDFACTOR_SRC_ALPHA}, /* Xor */ {1, GEN6_BLENDFACTOR_INV_DST_ALPHA, GEN6_BLENDFACTOR_INV_SRC_ALPHA}, /* Add */ {0, GEN6_BLENDFACTOR_ONE, GEN6_BLENDFACTOR_ONE}, }; /** * Highest-valued BLENDFACTOR used in gen6_blend_op. * * This leaves out GEN6_BLENDFACTOR_INV_DST_COLOR, * GEN6_BLENDFACTOR_INV_CONST_{COLOR,ALPHA}, * GEN6_BLENDFACTOR_INV_SRC1_{COLOR,ALPHA} */ #define GEN6_BLENDFACTOR_COUNT (GEN6_BLENDFACTOR_INV_DST_ALPHA + 1) #define GEN6_BLEND_STATE_PADDED_SIZE ALIGN(sizeof(struct gen6_blend_state), 64) #define BLEND_OFFSET(s, d) \ (((s) * GEN6_BLENDFACTOR_COUNT + (d)) * GEN6_BLEND_STATE_PADDED_SIZE) #define NO_BLEND BLEND_OFFSET(GEN6_BLENDFACTOR_ONE, GEN6_BLENDFACTOR_ZERO) #define CLEAR BLEND_OFFSET(GEN6_BLENDFACTOR_ZERO, GEN6_BLENDFACTOR_ZERO) #define SAMPLER_OFFSET(sf, se, mf, me) \ (((((sf) * EXTEND_COUNT + (se)) * FILTER_COUNT + (mf)) * EXTEND_COUNT + (me) + 2) * 2 * sizeof(struct gen6_sampler_state)) #define VERTEX_2s2s 0 #define COPY_SAMPLER 0 #define COPY_VERTEX VERTEX_2s2s #define COPY_FLAGS(a) GEN6_SET_FLAGS(COPY_SAMPLER, (a) == GXcopy ? NO_BLEND : CLEAR, GEN6_WM_KERNEL_NOMASK, COPY_VERTEX) #define FILL_SAMPLER (2 * sizeof(struct gen6_sampler_state)) #define FILL_VERTEX VERTEX_2s2s #define FILL_FLAGS(op, format) GEN6_SET_FLAGS(FILL_SAMPLER, gen6_get_blend((op), false, (format)), GEN6_WM_KERNEL_NOMASK, FILL_VERTEX) #define FILL_FLAGS_NOBLEND GEN6_SET_FLAGS(FILL_SAMPLER, NO_BLEND, GEN6_WM_KERNEL_NOMASK, FILL_VERTEX) #define GEN6_SAMPLER(f) (((f) >> 16) & 0xfff0) #define GEN6_BLEND(f) (((f) >> 0) & 0xfff0) #define GEN6_KERNEL(f) (((f) >> 16) & 0xf) #define GEN6_VERTEX(f) (((f) >> 0) & 0xf) #define GEN6_SET_FLAGS(S, B, K, V) (((S) | (K)) << 16 | ((B) | (V))) #define OUT_BATCH(v) batch_emit(sna, v) #define OUT_VERTEX(x,y) vertex_emit_2s(sna, x,y) #define OUT_VERTEX_F(v) vertex_emit(sna, v) static inline bool too_large(int width, int height) { return width > GEN6_MAX_SIZE || height > GEN6_MAX_SIZE; } static uint32_t gen6_get_blend(int op, bool has_component_alpha, uint32_t dst_format) { uint32_t src, dst; src = gen6_blend_op[op].src_blend; dst = gen6_blend_op[op].dst_blend; /* If there's no dst alpha channel, adjust the blend op so that * we'll treat it always as 1. */ if (PICT_FORMAT_A(dst_format) == 0) { if (src == GEN6_BLENDFACTOR_DST_ALPHA) src = GEN6_BLENDFACTOR_ONE; else if (src == GEN6_BLENDFACTOR_INV_DST_ALPHA) src = GEN6_BLENDFACTOR_ZERO; } /* If the source alpha is being used, then we should only be in a * case where the source blend factor is 0, and the source blend * value is the mask channels multiplied by the source picture's alpha. */ if (has_component_alpha && gen6_blend_op[op].src_alpha) { if (dst == GEN6_BLENDFACTOR_SRC_ALPHA) dst = GEN6_BLENDFACTOR_SRC_COLOR; else if (dst == GEN6_BLENDFACTOR_INV_SRC_ALPHA) dst = GEN6_BLENDFACTOR_INV_SRC_COLOR; } DBG(("blend op=%d, dst=%x [A=%d] => src=%d, dst=%d => offset=%x\n", op, dst_format, PICT_FORMAT_A(dst_format), src, dst, (int)BLEND_OFFSET(src, dst))); return BLEND_OFFSET(src, dst); } static uint32_t gen6_get_card_format(PictFormat format) { switch (format) { default: return -1; case PICT_a8r8g8b8: return GEN6_SURFACEFORMAT_B8G8R8A8_UNORM; case PICT_x8r8g8b8: return GEN6_SURFACEFORMAT_B8G8R8X8_UNORM; case PICT_a8b8g8r8: return GEN6_SURFACEFORMAT_R8G8B8A8_UNORM; case PICT_x8b8g8r8: return GEN6_SURFACEFORMAT_R8G8B8X8_UNORM; #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: return GEN6_SURFACEFORMAT_B10G10R10A2_UNORM; case PICT_x2r10g10b10: return GEN6_SURFACEFORMAT_B10G10R10X2_UNORM; #endif case PICT_r8g8b8: return GEN6_SURFACEFORMAT_R8G8B8_UNORM; case PICT_r5g6b5: return GEN6_SURFACEFORMAT_B5G6R5_UNORM; case PICT_a1r5g5b5: return GEN6_SURFACEFORMAT_B5G5R5A1_UNORM; case PICT_a8: return GEN6_SURFACEFORMAT_A8_UNORM; case PICT_a4r4g4b4: return GEN6_SURFACEFORMAT_B4G4R4A4_UNORM; } } static uint32_t gen6_get_dest_format(PictFormat format) { switch (format) { default: return -1; case PICT_a8r8g8b8: case PICT_x8r8g8b8: return GEN6_SURFACEFORMAT_B8G8R8A8_UNORM; case PICT_a8b8g8r8: case PICT_x8b8g8r8: return GEN6_SURFACEFORMAT_R8G8B8A8_UNORM; #ifdef PICT_a2r10g10b10 case PICT_a2r10g10b10: case PICT_x2r10g10b10: return GEN6_SURFACEFORMAT_B10G10R10A2_UNORM; #endif case PICT_r5g6b5: return GEN6_SURFACEFORMAT_B5G6R5_UNORM; case PICT_x1r5g5b5: case PICT_a1r5g5b5: return GEN6_SURFACEFORMAT_B5G5R5A1_UNORM; case PICT_a8: return GEN6_SURFACEFORMAT_A8_UNORM; case PICT_a4r4g4b4: case PICT_x4r4g4b4: return GEN6_SURFACEFORMAT_B4G4R4A4_UNORM; } } static bool gen6_check_dst_format(PictFormat format) { if (gen6_get_dest_format(format) != -1) return true; DBG(("%s: unhandled format: %x\n", __FUNCTION__, (int)format)); return false; } static bool gen6_check_format(uint32_t format) { if (gen6_get_card_format(format) != -1) return true; DBG(("%s: unhandled format: %x\n", __FUNCTION__, (int)format)); return false; } static uint32_t gen6_filter(uint32_t filter) { switch (filter) { default: assert(0); case PictFilterNearest: return SAMPLER_FILTER_NEAREST; case PictFilterBilinear: return SAMPLER_FILTER_BILINEAR; } } static uint32_t gen6_check_filter(PicturePtr picture) { switch (picture->filter) { case PictFilterNearest: case PictFilterBilinear: return true; default: return false; } } static uint32_t gen6_repeat(uint32_t repeat) { switch (repeat) { default: assert(0); case RepeatNone: return SAMPLER_EXTEND_NONE; case RepeatNormal: return SAMPLER_EXTEND_REPEAT; case RepeatPad: return SAMPLER_EXTEND_PAD; case RepeatReflect: return SAMPLER_EXTEND_REFLECT; } } static bool gen6_check_repeat(PicturePtr picture) { if (!picture->repeat) return true; switch (picture->repeatType) { case RepeatNone: case RepeatNormal: case RepeatPad: case RepeatReflect: return true; default: return false; } } static int gen6_choose_composite_kernel(int op, bool has_mask, bool is_ca, bool is_affine) { int base; if (has_mask) { if (is_ca) { if (gen6_blend_op[op].src_alpha) base = GEN6_WM_KERNEL_MASKSA; else base = GEN6_WM_KERNEL_MASKCA; } else base = GEN6_WM_KERNEL_MASK; } else base = GEN6_WM_KERNEL_NOMASK; return base + !is_affine; } inline static void gen6_emit_pipe_invalidate(struct sna *sna) { OUT_BATCH(GEN6_PIPE_CONTROL | (4 - 2)); OUT_BATCH(GEN6_PIPE_CONTROL_WC_FLUSH | GEN6_PIPE_CONTROL_TC_FLUSH | GEN6_PIPE_CONTROL_CS_STALL); OUT_BATCH(0); OUT_BATCH(0); } inline static void gen6_emit_pipe_flush(struct sna *sna, bool need_stall) { unsigned stall; stall = 0; if (need_stall) stall = GEN6_PIPE_CONTROL_CS_STALL; OUT_BATCH(GEN6_PIPE_CONTROL | (4 - 2)); OUT_BATCH(GEN6_PIPE_CONTROL_WC_FLUSH | stall); OUT_BATCH(0); OUT_BATCH(0); } inline static void gen6_emit_pipe_stall(struct sna *sna) { OUT_BATCH(GEN6_PIPE_CONTROL | (4 - 2)); OUT_BATCH(GEN6_PIPE_CONTROL_CS_STALL | GEN6_PIPE_CONTROL_STALL_AT_SCOREBOARD); OUT_BATCH(0); OUT_BATCH(0); } static void gen6_emit_urb(struct sna *sna) { OUT_BATCH(GEN6_3DSTATE_URB | (3 - 2)); OUT_BATCH(((1 - 1) << GEN6_3DSTATE_URB_VS_SIZE_SHIFT) | (sna->render_state.gen6.info->urb.max_vs_entries << GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT)); /* at least 24 on GEN6 */ OUT_BATCH((0 << GEN6_3DSTATE_URB_GS_SIZE_SHIFT) | (0 << GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT)); /* no GS thread */ } static void gen6_emit_state_base_address(struct sna *sna) { OUT_BATCH(GEN6_STATE_BASE_ADDRESS | (10 - 2)); OUT_BATCH(0); /* general */ OUT_BATCH(kgem_add_reloc(&sna->kgem, /* surface */ sna->kgem.nbatch, NULL, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); OUT_BATCH(kgem_add_reloc(&sna->kgem, /* instruction */ sna->kgem.nbatch, sna->render_state.gen6.general_bo, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); OUT_BATCH(0); /* indirect */ OUT_BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, sna->render_state.gen6.general_bo, I915_GEM_DOMAIN_INSTRUCTION << 16, BASE_ADDRESS_MODIFY)); /* upper bounds, disable */ OUT_BATCH(0); OUT_BATCH(BASE_ADDRESS_MODIFY); OUT_BATCH(0); OUT_BATCH(BASE_ADDRESS_MODIFY); } static void gen6_emit_viewports(struct sna *sna) { OUT_BATCH(GEN6_3DSTATE_VIEWPORT_STATE_POINTERS | GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen6_emit_vs(struct sna *sna) { /* disable VS constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_VS | (6 - 2)); OUT_BATCH(0); /* no VS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen6_emit_gs(struct sna *sna) { /* disable GS constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_GS | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_GS | (7 - 2)); OUT_BATCH(0); /* no GS kernel */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ } static void gen6_emit_clip(struct sna *sna) { OUT_BATCH(GEN6_3DSTATE_CLIP | (4 - 2)); OUT_BATCH(0); OUT_BATCH(0); /* pass-through */ OUT_BATCH(0); } static void gen6_emit_wm_constants(struct sna *sna) { /* disable WM constant buffer */ OUT_BATCH(GEN6_3DSTATE_CONSTANT_PS | (5 - 2)); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); } static void gen6_emit_null_depth_buffer(struct sna *sna) { OUT_BATCH(GEN6_3DSTATE_DEPTH_BUFFER | (7 - 2)); OUT_BATCH(GEN6_SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | GEN6_DEPTHFORMAT_D32_FLOAT << GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_CLEAR_PARAMS | (2 - 2)); OUT_BATCH(0); } static void gen6_emit_invariant(struct sna *sna) { OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D); OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE | (3 - 2)); OUT_BATCH(GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER | GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1); /* 1 sample/pixel */ OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK | (2 - 2)); OUT_BATCH(1); gen6_emit_urb(sna); gen6_emit_state_base_address(sna); gen6_emit_viewports(sna); gen6_emit_vs(sna); gen6_emit_gs(sna); gen6_emit_clip(sna); gen6_emit_wm_constants(sna); gen6_emit_null_depth_buffer(sna); sna->render_state.gen6.needs_invariant = false; } static void gen6_emit_cc(struct sna *sna, int blend) { struct gen6_render_state *render = &sna->render_state.gen6; if (render->blend == blend) return; DBG(("%s: blend = %x\n", __FUNCTION__, blend)); OUT_BATCH(GEN6_3DSTATE_CC_STATE_POINTERS | (4 - 2)); OUT_BATCH((render->cc_blend + blend) | 1); if (render->blend == (unsigned)-1) { OUT_BATCH(1); OUT_BATCH(1); } else { OUT_BATCH(0); OUT_BATCH(0); } render->blend = blend; } static void gen6_emit_sampler(struct sna *sna, uint32_t state) { if (sna->render_state.gen6.samplers == state) return; sna->render_state.gen6.samplers = state; DBG(("%s: sampler = %x\n", __FUNCTION__, state)); OUT_BATCH(GEN6_3DSTATE_SAMPLER_STATE_POINTERS | GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS | (4 - 2)); OUT_BATCH(0); /* VS */ OUT_BATCH(0); /* GS */ OUT_BATCH(sna->render_state.gen6.wm_state + state); } static void gen6_emit_sf(struct sna *sna, bool has_mask) { int num_sf_outputs = has_mask ? 2 : 1; if (sna->render_state.gen6.num_sf_outputs == num_sf_outputs) return; DBG(("%s: num_sf_outputs=%d, read_length=%d, read_offset=%d\n", __FUNCTION__, num_sf_outputs, 1, 0)); sna->render_state.gen6.num_sf_outputs = num_sf_outputs; OUT_BATCH(GEN6_3DSTATE_SF | (20 - 2)); OUT_BATCH(num_sf_outputs << GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT | 1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT | 1 << GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT); OUT_BATCH(0); OUT_BATCH(GEN6_3DSTATE_SF_CULL_NONE); OUT_BATCH(2 << GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT); /* DW4 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW9 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW14 */ OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); OUT_BATCH(0); /* DW19 */ } static void gen6_emit_wm(struct sna *sna, unsigned int kernel, bool has_mask) { const uint32_t *kernels; if (sna->render_state.gen6.kernel == kernel) return; sna->render_state.gen6.kernel = kernel; kernels = sna->render_state.gen6.wm_kernel[kernel]; DBG(("%s: switching to %s, num_surfaces=%d (8-pixel? %d, 16-pixel? %d,32-pixel? %d)\n", __FUNCTION__, wm_kernels[kernel].name, wm_kernels[kernel].num_surfaces, kernels[0], kernels[1], kernels[2])); OUT_BATCH(GEN6_3DSTATE_WM | (9 - 2)); OUT_BATCH(kernels[0] ?: kernels[1] ?: kernels[2]); OUT_BATCH(1 << GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT | wm_kernels[kernel].num_surfaces << GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT); OUT_BATCH(0); /* scratch space */ OUT_BATCH((kernels[0] ? 4 : kernels[1] ? 6 : 8) << GEN6_3DSTATE_WM_DISPATCH_0_START_GRF_SHIFT | 8 << GEN6_3DSTATE_WM_DISPATCH_1_START_GRF_SHIFT | 6 << GEN6_3DSTATE_WM_DISPATCH_2_START_GRF_SHIFT); OUT_BATCH((sna->render_state.gen6.info->max_wm_threads - 1) << GEN6_3DSTATE_WM_MAX_THREADS_SHIFT | (kernels[0] ? GEN6_3DSTATE_WM_8_DISPATCH_ENABLE : 0) | (kernels[1] ? GEN6_3DSTATE_WM_16_DISPATCH_ENABLE : 0) | (kernels[2] ? GEN6_3DSTATE_WM_32_DISPATCH_ENABLE : 0) | GEN6_3DSTATE_WM_DISPATCH_ENABLE); OUT_BATCH((1 + has_mask) << GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT | GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC); OUT_BATCH(kernels[2]); OUT_BATCH(kernels[1]); } static bool gen6_emit_binding_table(struct sna *sna, uint16_t offset) { if (sna->render_state.gen6.surface_table == offset) return false; /* Binding table pointers */ OUT_BATCH(GEN6_3DSTATE_BINDING_TABLE_POINTERS | GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS | (4 - 2)); OUT_BATCH(0); /* vs */ OUT_BATCH(0); /* gs */ /* Only the PS uses the binding table */ OUT_BATCH(offset*4); sna->render_state.gen6.surface_table = offset; return true; } static bool gen6_emit_drawing_rectangle(struct sna *sna, const struct sna_composite_op *op) { uint32_t limit = (op->dst.height - 1) << 16 | (op->dst.width - 1); uint32_t offset = (uint16_t)op->dst.y << 16 | (uint16_t)op->dst.x; assert(!too_large(abs(op->dst.x), abs(op->dst.y))); assert(!too_large(op->dst.width, op->dst.height)); if (sna->render_state.gen6.drawrect_limit == limit && sna->render_state.gen6.drawrect_offset == offset) return true; /* [DevSNB-C+{W/A}] Before any depth stall flush (including those * produced by non-pipelined state commands), software needs to first * send a PIPE_CONTROL with no bits set except Post-Sync Operation != * 0. * * [Dev-SNB{W/A}]: Pipe-control with CS-stall bit set must be sent * BEFORE the pipe-control with a post-sync op and no write-cache * flushes. */ if (!sna->render_state.gen6.first_state_packet) gen6_emit_pipe_stall(sna); OUT_BATCH(GEN6_PIPE_CONTROL | (4 - 2)); OUT_BATCH(GEN6_PIPE_CONTROL_WRITE_TIME); OUT_BATCH(kgem_add_reloc(&sna->kgem, sna->kgem.nbatch, sna->render_state.gen6.general_bo, I915_GEM_DOMAIN_INSTRUCTION << 16 | I915_GEM_DOMAIN_INSTRUCTION, 64)); OUT_BATCH(0); DBG(("%s: offset=(%d, %d), limit=(%d, %d)\n", __FUNCTION__, op->dst.x, op->dst.y, op->dst.width, op->dst.height)); OUT_BATCH(GEN6_3DSTATE_DRAWING_RECTANGLE | (4 - 2)); OUT_BATCH(0); OUT_BATCH(limit); OUT_BATCH(offset); sna->render_state.gen6.drawrect_offset = offset; sna->render_state.gen6.drawrect_limit = limit; return false; } static void gen6_emit_vertex_elements(struct sna *sna, const struct sna_composite_op *op) { /* * vertex data in vertex buffer * position: (x, y) * texture coordinate 0: (u0, v0) if (is_affine is true) else (u0, v0, w0) * texture coordinate 1 if (has_mask is true): same as above */ struct gen6_render_state *render = &sna->render_state.gen6; uint32_t src_format, dw; int id = GEN6_VERTEX(op->u.gen6.flags); bool has_mask; DBG(("%s: setup id=%d\n", __FUNCTION__, id)); if (render->ve_id == id) return; render->ve_id = id; /* The VUE layout * dword 0-3: pad (0.0, 0.0, 0.0. 0.0) * dword 4-7: position (x, y, 1.0, 1.0), * dword 8-11: texture coordinate 0 (u0, v0, w0, 1.0) * dword 12-15: texture coordinate 1 (u1, v1, w1, 1.0) * * dword 4-15 are fetched from vertex buffer */ has_mask = (id >> 2) != 0; OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | ((2 * (3 + has_mask)) + 1 - 2)); OUT_BATCH(id << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT); /* x,y */ OUT_BATCH(id << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT | GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT); /* u0, v0, w0 */ DBG(("%s: first channel %d floats, offset=4b\n", __FUNCTION__, id & 3)); dw = GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT; switch (id & 3) { default: assert(0); case 0: src_format = GEN6_SURFACEFORMAT_R16G16_SSCALED; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT; break; case 1: src_format = GEN6_SURFACEFORMAT_R32_FLOAT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT; break; case 2: src_format = GEN6_SURFACEFORMAT_R32G32_FLOAT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT; break; case 3: src_format = GEN6_SURFACEFORMAT_R32G32B32_FLOAT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_2_SHIFT; break; } OUT_BATCH(id << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | src_format << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); OUT_BATCH(dw); /* u1, v1, w1 */ if (has_mask) { unsigned offset = 4 + ((id & 3) ?: 1) * sizeof(float); DBG(("%s: second channel %d floats, offset=%db\n", __FUNCTION__, id >> 2, offset)); dw = GEN6_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT; switch (id >> 2) { case 1: src_format = GEN6_SURFACEFORMAT_R32_FLOAT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT; break; default: assert(0); case 2: src_format = GEN6_SURFACEFORMAT_R32G32_FLOAT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT; break; case 3: src_format = GEN6_SURFACEFORMAT_R32G32B32_FLOAT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT; dw |= GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_2_SHIFT; break; } OUT_BATCH(id << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | src_format << VE0_FORMAT_SHIFT | offset << VE0_OFFSET_SHIFT); OUT_BATCH(dw); } } static void gen6_emit_state(struct sna *sna, const struct sna_composite_op *op, uint16_t wm_binding_table) { bool need_invalidate; bool need_flush; bool need_stall; assert(op->dst.bo->exec); need_flush = wm_binding_table & 1; if (ALWAYS_FLUSH) need_flush = true; wm_binding_table &= ~1; need_stall = sna->render_state.gen6.surface_table != wm_binding_table; if (ALWAYS_STALL) need_stall = true; need_invalidate = kgem_bo_is_dirty(op->src.bo) || kgem_bo_is_dirty(op->mask.bo); if (ALWAYS_INVALIDATE) need_invalidate = true; if (need_invalidate) { gen6_emit_pipe_invalidate(sna); kgem_clear_dirty(&sna->kgem); assert(op->dst.bo->exec); kgem_bo_mark_dirty(op->dst.bo); need_flush = false; need_stall = false; sna->render_state.gen6.first_state_packet = true; } if (need_flush) { gen6_emit_pipe_flush(sna, need_stall); need_stall = false; sna->render_state.gen6.first_state_packet = true; } need_stall &= gen6_emit_drawing_rectangle(sna, op); if (need_stall) gen6_emit_pipe_stall(sna); gen6_emit_cc(sna, GEN6_BLEND(op->u.gen6.flags)); gen6_emit_sampler(sna, GEN6_SAMPLER(op->u.gen6.flags)); gen6_emit_sf(sna, GEN6_VERTEX(op->u.gen6.flags) >> 2); gen6_emit_wm(sna, GEN6_KERNEL(op->u.gen6.flags), GEN6_VERTEX(op->u.gen6.flags) >> 2); gen6_emit_vertex_elements(sna, op); gen6_emit_binding_table(sna, wm_binding_table); sna->render_state.gen6.first_state_packet = false; } static bool gen6_magic_ca_pass(struct sna *sna, const struct sna_composite_op *op) { struct gen6_render_state *state = &sna->render_state.gen6; if (!op->need_magic_ca_pass) return false; DBG(("%s: CA fixup (%d -> %d)\n", __FUNCTION__, sna->render.vertex_start, sna->render.vertex_index)); gen6_emit_pipe_stall(sna); gen6_emit_cc(sna, gen6_get_blend(PictOpAdd, true, op->dst.format)); gen6_emit_wm(sna, gen6_choose_composite_kernel(PictOpAdd, true, true, op->is_affine), true); OUT_BATCH(GEN6_3DPRIMITIVE | GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST << GEN6_3DPRIMITIVE_TOPOLOGY_SHIFT | 0 << 9 | 4); OUT_BATCH(sna->render.vertex_index - sna->render.vertex_start); OUT_BATCH(sna->render.vertex_start); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ state->last_primitive = sna->kgem.nbatch; return true; } typedef struct gen6_surface_state_padded { struct gen6_surface_state state; char pad[32 - sizeof(struct gen6_surface_state)]; } gen6_surface_state_padded; static void null_create(struct sna_static_stream *stream) { /* A bunch of zeros useful for legacy border color and depth-stencil */ sna_static_stream_map(stream, 64, 64); } static void scratch_create(struct sna_static_stream *stream) { /* 64 bytes of scratch space for random writes, such as * the pipe-control w/a. */ sna_static_stream_map(stream, 64, 64); } static void sampler_state_init(struct gen6_sampler_state *sampler_state, sampler_filter_t filter, sampler_extend_t extend) { sampler_state->ss0.lod_preclamp = 1; /* GL mode */ /* We use the legacy mode to get the semantics specified by * the Render extension. */ sampler_state->ss0.border_color_mode = GEN6_BORDER_COLOR_MODE_LEGACY; switch (filter) { default: case SAMPLER_FILTER_NEAREST: sampler_state->ss0.min_filter = GEN6_MAPFILTER_NEAREST; sampler_state->ss0.mag_filter = GEN6_MAPFILTER_NEAREST; break; case SAMPLER_FILTER_BILINEAR: sampler_state->ss0.min_filter = GEN6_MAPFILTER_LINEAR; sampler_state->ss0.mag_filter = GEN6_MAPFILTER_LINEAR; break; } switch (extend) { default: case SAMPLER_EXTEND_NONE: sampler_state->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; sampler_state->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP_BORDER; break; case SAMPLER_EXTEND_REPEAT: sampler_state->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_WRAP; sampler_state->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_WRAP; sampler_state->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_WRAP; break; case SAMPLER_EXTEND_PAD: sampler_state->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; sampler_state->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; sampler_state->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_CLAMP; break; case SAMPLER_EXTEND_REFLECT: sampler_state->ss1.r_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; sampler_state->ss1.s_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; sampler_state->ss1.t_wrap_mode = GEN6_TEXCOORDMODE_MIRROR; break; } } static void sampler_copy_init(struct gen6_sampler_state *ss) { sampler_state_init(ss, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE); ss->ss3.non_normalized_coord = 1; sampler_state_init(ss+1, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE); } static void sampler_fill_init(struct gen6_sampler_state *ss) { sampler_state_init(ss, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_REPEAT); ss->ss3.non_normalized_coord = 1; sampler_state_init(ss+1, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE); } static uint32_t gen6_tiling_bits(uint32_t tiling) { switch (tiling) { default: assert(0); case I915_TILING_NONE: return 0; case I915_TILING_X: return GEN6_SURFACE_TILED; case I915_TILING_Y: return GEN6_SURFACE_TILED | GEN6_SURFACE_TILED_Y; } } /** * Sets up the common fields for a surface state buffer for the given * picture in the given surface state buffer. */ static int gen6_bind_bo(struct sna *sna, struct kgem_bo *bo, uint32_t width, uint32_t height, uint32_t format, bool is_dst) { uint32_t *ss; uint32_t domains; uint16_t offset; uint32_t is_scanout = is_dst && bo->scanout; /* After the first bind, we manage the cache domains within the batch */ offset = kgem_bo_get_binding(bo, format | is_dst << 30 | is_scanout << 31); if (offset) { DBG(("[%x] bo(handle=%d), format=%d, reuse %s binding\n", offset, bo->handle, format, is_dst ? "render" : "sampler")); assert(offset >= sna->kgem.surface); if (is_dst) kgem_bo_mark_dirty(bo); return offset * sizeof(uint32_t); } offset = sna->kgem.surface -= sizeof(struct gen6_surface_state_padded) / sizeof(uint32_t); ss = sna->kgem.batch + offset; ss[0] = (GEN6_SURFACE_2D << GEN6_SURFACE_TYPE_SHIFT | GEN6_SURFACE_BLEND_ENABLED | format << GEN6_SURFACE_FORMAT_SHIFT); if (is_dst) { ss[0] |= GEN6_SURFACE_RC_READ_WRITE; domains = I915_GEM_DOMAIN_RENDER << 16 |I915_GEM_DOMAIN_RENDER; } else domains = I915_GEM_DOMAIN_SAMPLER << 16; ss[1] = kgem_add_reloc(&sna->kgem, offset + 1, bo, domains, 0); ss[2] = ((width - 1) << GEN6_SURFACE_WIDTH_SHIFT | (height - 1) << GEN6_SURFACE_HEIGHT_SHIFT); assert(bo->pitch <= (1 << 18)); ss[3] = (gen6_tiling_bits(bo->tiling) | (bo->pitch - 1) << GEN6_SURFACE_PITCH_SHIFT); ss[4] = 0; ss[5] = (is_scanout || bo->io) ? 0 : 3 << 16; kgem_bo_set_binding(bo, format | is_dst << 30 | is_scanout << 31, offset); DBG(("[%x] bind bo(handle=%d, addr=%d), format=%d, width=%d, height=%d, pitch=%d, tiling=%d -> %s\n", offset, bo->handle, ss[1], format, width, height, bo->pitch, bo->tiling, domains & 0xffff ? "render" : "sampler")); return offset * sizeof(uint32_t); } static void gen6_emit_vertex_buffer(struct sna *sna, const struct sna_composite_op *op) { int id = GEN6_VERTEX(op->u.gen6.flags); OUT_BATCH(GEN6_3DSTATE_VERTEX_BUFFERS | 3); OUT_BATCH(id << VB0_BUFFER_INDEX_SHIFT | VB0_VERTEXDATA | 4*op->floats_per_vertex << VB0_BUFFER_PITCH_SHIFT); sna->render.vertex_reloc[sna->render.nvertex_reloc++] = sna->kgem.nbatch; OUT_BATCH(0); OUT_BATCH(~0); /* max address: disabled */ OUT_BATCH(0); sna->render.vb_id |= 1 << id; } static void gen6_emit_primitive(struct sna *sna) { if (sna->kgem.nbatch == sna->render_state.gen6.last_primitive) { DBG(("%s: continuing previous primitive, start=%d, index=%d\n", __FUNCTION__, sna->render.vertex_start, sna->render.vertex_index)); sna->render.vertex_offset = sna->kgem.nbatch - 5; return; } OUT_BATCH(GEN6_3DPRIMITIVE | GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL | _3DPRIM_RECTLIST << GEN6_3DPRIMITIVE_TOPOLOGY_SHIFT | 0 << 9 | 4); sna->render.vertex_offset = sna->kgem.nbatch; OUT_BATCH(0); /* vertex count, to be filled in later */ OUT_BATCH(sna->render.vertex_index); OUT_BATCH(1); /* single instance */ OUT_BATCH(0); /* start instance location */ OUT_BATCH(0); /* index buffer offset, ignored */ sna->render.vertex_start = sna->render.vertex_index; DBG(("%s: started new primitive: index=%d\n", __FUNCTION__, sna->render.vertex_start)); sna->render_state.gen6.last_primitive = sna->kgem.nbatch; } static bool gen6_rectangle_begin(struct sna *sna, const struct sna_composite_op *op) { int id = 1 << GEN6_VERTEX(op->u.gen6.flags); int ndwords; if (sna_vertex_wait__locked(&sna->render) && sna->render.vertex_offset) return true; ndwords = op->need_magic_ca_pass ? 60 : 6; if ((sna->render.vb_id & id) == 0) ndwords += 5; if (!kgem_check_batch(&sna->kgem, ndwords)) return false; if ((sna->render.vb_id & id) == 0) gen6_emit_vertex_buffer(sna, op); gen6_emit_primitive(sna); return true; } static int gen6_get_rectangles__flush(struct sna *sna, const struct sna_composite_op *op) { /* Preventing discarding new vbo after lock contention */ if (sna_vertex_wait__locked(&sna->render)) { int rem = vertex_space(sna); if (rem > op->floats_per_rect) return rem; } if (!kgem_check_batch(&sna->kgem, op->need_magic_ca_pass ? 65 : 5)) return 0; if (!kgem_check_reloc_and_exec(&sna->kgem, 2)) return 0; if (sna->render.vertex_offset) { gen4_vertex_flush(sna); if (gen6_magic_ca_pass(sna, op)) { gen6_emit_pipe_stall(sna); gen6_emit_cc(sna, GEN6_BLEND(op->u.gen6.flags)); gen6_emit_wm(sna, GEN6_KERNEL(op->u.gen6.flags), GEN6_VERTEX(op->u.gen6.flags) >> 2); } } return gen4_vertex_finish(sna); } inline static int gen6_get_rectangles(struct sna *sna, const struct sna_composite_op *op, int want, void (*emit_state)(struct sna *, const struct sna_composite_op *op)) { int rem; assert(want); start: rem = vertex_space(sna); if (unlikely(rem < op->floats_per_rect)) { DBG(("flushing vbo for %s: %d < %d\n", __FUNCTION__, rem, op->floats_per_rect)); rem = gen6_get_rectangles__flush(sna, op); if (unlikely(rem == 0)) goto flush; } if (unlikely(sna->render.vertex_offset == 0)) { if (!gen6_rectangle_begin(sna, op)) goto flush; else goto start; } assert(rem <= vertex_space(sna)); assert(op->floats_per_rect <= rem); if (want > 1 && want * op->floats_per_rect > rem) want = rem / op->floats_per_rect; assert(want > 0); sna->render.vertex_index += 3*want; return want; flush: if (sna->render.vertex_offset) { gen4_vertex_flush(sna); gen6_magic_ca_pass(sna, op); } sna_vertex_wait__locked(&sna->render); _kgem_submit(&sna->kgem); emit_state(sna, op); goto start; } inline static uint32_t *gen6_composite_get_binding_table(struct sna *sna, uint16_t *offset) { uint32_t *table; sna->kgem.surface -= sizeof(struct gen6_surface_state_padded) / sizeof(uint32_t); /* Clear all surplus entries to zero in case of prefetch */ table = memset(sna->kgem.batch + sna->kgem.surface, 0, sizeof(struct gen6_surface_state_padded)); DBG(("%s(%x)\n", __FUNCTION__, 4*sna->kgem.surface)); *offset = sna->kgem.surface; return table; } static bool gen6_get_batch(struct sna *sna, const struct sna_composite_op *op) { kgem_set_mode(&sna->kgem, KGEM_RENDER, op->dst.bo); if (!kgem_check_batch_with_surfaces(&sna->kgem, 150, 4)) { DBG(("%s: flushing batch: %d < %d+%d\n", __FUNCTION__, sna->kgem.surface - sna->kgem.nbatch, 150, 4*8)); kgem_submit(&sna->kgem); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } if (sna->render_state.gen6.needs_invariant) gen6_emit_invariant(sna); return kgem_bo_is_dirty(op->dst.bo); } static void gen6_emit_composite_state(struct sna *sna, const struct sna_composite_op *op) { uint32_t *binding_table; uint16_t offset; bool dirty; dirty = gen6_get_batch(sna, op); binding_table = gen6_composite_get_binding_table(sna, &offset); binding_table[0] = gen6_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen6_get_dest_format(op->dst.format), true); binding_table[1] = gen6_bind_bo(sna, op->src.bo, op->src.width, op->src.height, op->src.card_format, false); if (op->mask.bo) { binding_table[2] = gen6_bind_bo(sna, op->mask.bo, op->mask.width, op->mask.height, op->mask.card_format, false); } if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen6.surface_table) == *(uint64_t*)binding_table && (op->mask.bo == NULL || sna->kgem.batch[sna->render_state.gen6.surface_table+2] == binding_table[2])) { sna->kgem.surface += sizeof(struct gen6_surface_state_padded) / sizeof(uint32_t); offset = sna->render_state.gen6.surface_table; } gen6_emit_state(sna, op, offset | dirty); } static void gen6_align_vertex(struct sna *sna, const struct sna_composite_op *op) { assert (sna->render.vertex_offset == 0); if (op->floats_per_vertex != sna->render_state.gen6.floats_per_vertex) { DBG(("aligning vertex: was %d, now %d floats per vertex\n", sna->render_state.gen6.floats_per_vertex, op->floats_per_vertex)); gen4_vertex_align(sna, op); sna->render_state.gen6.floats_per_vertex = op->floats_per_vertex; } assert((sna->render.vertex_used % op->floats_per_vertex) == 0); } fastcall static void gen6_render_composite_blt(struct sna *sna, const struct sna_composite_op *op, const struct sna_composite_rectangles *r) { gen6_get_rectangles(sna, op, 1, gen6_emit_composite_state); op->prim_emit(sna, op, r); } fastcall static void gen6_render_composite_box(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box) { struct sna_composite_rectangles r; gen6_get_rectangles(sna, op, 1, gen6_emit_composite_state); DBG((" %s: (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.src = r.mask = r.dst; op->prim_emit(sna, op, &r); } static void gen6_render_composite_boxes__blt(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("composite_boxes(%d)\n", nbox)); do { int nbox_this_time; nbox_this_time = gen6_get_rectangles(sna, op, nbox, gen6_emit_composite_state); nbox -= nbox_this_time; do { struct sna_composite_rectangles r; DBG((" %s: (%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); r.dst.x = box->x1; r.dst.y = box->y1; r.width = box->x2 - box->x1; r.height = box->y2 - box->y1; r.src = r.mask = r.dst; op->prim_emit(sna, op, &r); box++; } while (--nbox_this_time); } while (nbox); } static void gen6_render_composite_boxes(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); do { int nbox_this_time; float *v; nbox_this_time = gen6_get_rectangles(sna, op, nbox, gen6_emit_composite_state); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; } while (nbox); } static void gen6_render_composite_boxes__thread(struct sna *sna, const struct sna_composite_op *op, const BoxRec *box, int nbox) { DBG(("%s: nbox=%d\n", __FUNCTION__, nbox)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen6_get_rectangles(sna, op, nbox, gen6_emit_composite_state); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } #ifndef MAX #define MAX(a,b) ((a) > (b) ? (a) : (b)) #endif static uint32_t gen6_composite_create_blend_state(struct sna_static_stream *stream) { char *base, *ptr; int src, dst; base = sna_static_stream_map(stream, GEN6_BLENDFACTOR_COUNT * GEN6_BLENDFACTOR_COUNT * GEN6_BLEND_STATE_PADDED_SIZE, 64); ptr = base; for (src = 0; src < GEN6_BLENDFACTOR_COUNT; src++) { for (dst= 0; dst < GEN6_BLENDFACTOR_COUNT; dst++) { struct gen6_blend_state *blend = (struct gen6_blend_state *)ptr; blend->blend0.dest_blend_factor = dst; blend->blend0.source_blend_factor = src; blend->blend0.blend_func = GEN6_BLENDFUNCTION_ADD; blend->blend0.blend_enable = !(dst == GEN6_BLENDFACTOR_ZERO && src == GEN6_BLENDFACTOR_ONE); blend->blend1.post_blend_clamp_enable = 1; blend->blend1.pre_blend_clamp_enable = 1; ptr += GEN6_BLEND_STATE_PADDED_SIZE; } } return sna_static_stream_offsetof(stream, base); } static uint32_t gen6_bind_video_source(struct sna *sna, struct kgem_bo *src_bo, uint32_t src_offset, int src_width, int src_height, int src_pitch, uint32_t src_surf_format) { struct gen6_surface_state *ss; sna->kgem.surface -= sizeof(struct gen6_surface_state_padded) / sizeof(uint32_t); ss = memset(sna->kgem.batch + sna->kgem.surface, 0, sizeof(*ss)); ss->ss0.surface_type = GEN6_SURFACE_2D; ss->ss0.surface_format = src_surf_format; ss->ss1.base_addr = kgem_add_reloc(&sna->kgem, sna->kgem.surface + 1, src_bo, I915_GEM_DOMAIN_SAMPLER << 16, src_offset); ss->ss2.width = src_width - 1; ss->ss2.height = src_height - 1; ss->ss3.pitch = src_pitch - 1; return sna->kgem.surface * sizeof(uint32_t); } static void gen6_emit_video_state(struct sna *sna, const struct sna_composite_op *op) { struct sna_video_frame *frame = op->priv; uint32_t src_surf_format; uint32_t src_surf_base[6]; int src_width[6]; int src_height[6]; int src_pitch[6]; uint32_t *binding_table; uint16_t offset; bool dirty; int n_src, n; dirty = gen6_get_batch(sna, op); src_surf_base[0] = 0; src_surf_base[1] = 0; src_surf_base[2] = frame->VBufOffset; src_surf_base[3] = frame->VBufOffset; src_surf_base[4] = frame->UBufOffset; src_surf_base[5] = frame->UBufOffset; if (is_planar_fourcc(frame->id)) { src_surf_format = GEN6_SURFACEFORMAT_R8_UNORM; src_width[1] = src_width[0] = frame->width; src_height[1] = src_height[0] = frame->height; src_pitch[1] = src_pitch[0] = frame->pitch[1]; src_width[4] = src_width[5] = src_width[2] = src_width[3] = frame->width / 2; src_height[4] = src_height[5] = src_height[2] = src_height[3] = frame->height / 2; src_pitch[4] = src_pitch[5] = src_pitch[2] = src_pitch[3] = frame->pitch[0]; n_src = 6; } else { if (frame->id == FOURCC_UYVY) src_surf_format = GEN6_SURFACEFORMAT_YCRCB_SWAPY; else src_surf_format = GEN6_SURFACEFORMAT_YCRCB_NORMAL; src_width[0] = frame->width; src_height[0] = frame->height; src_pitch[0] = frame->pitch[0]; n_src = 1; } binding_table = gen6_composite_get_binding_table(sna, &offset); binding_table[0] = gen6_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen6_get_dest_format(op->dst.format), true); for (n = 0; n < n_src; n++) { binding_table[1+n] = gen6_bind_video_source(sna, frame->bo, src_surf_base[n], src_width[n], src_height[n], src_pitch[n], src_surf_format); } gen6_emit_state(sna, op, offset | dirty); } static bool gen6_render_video(struct sna *sna, struct sna_video *video, struct sna_video_frame *frame, RegionPtr dstRegion, PixmapPtr pixmap) { struct sna_composite_op tmp; struct sna_pixmap *priv = sna_pixmap(pixmap); int dst_width = dstRegion->extents.x2 - dstRegion->extents.x1; int dst_height = dstRegion->extents.y2 - dstRegion->extents.y1; int src_width = frame->src.x2 - frame->src.x1; int src_height = frame->src.y2 - frame->src.y1; float src_offset_x, src_offset_y; float src_scale_x, src_scale_y; int nbox, pix_xoff, pix_yoff; unsigned filter; const BoxRec *box; DBG(("%s: src=(%d, %d), dst=(%d, %d), %dx[(%d, %d), (%d, %d)...]\n", __FUNCTION__, src_width, src_height, dst_width, dst_height, region_num_rects(dstRegion), REGION_EXTENTS(NULL, dstRegion)->x1, REGION_EXTENTS(NULL, dstRegion)->y1, REGION_EXTENTS(NULL, dstRegion)->x2, REGION_EXTENTS(NULL, dstRegion)->y2)); assert(priv->gpu_bo); memset(&tmp, 0, sizeof(tmp)); tmp.dst.pixmap = pixmap; tmp.dst.width = pixmap->drawable.width; tmp.dst.height = pixmap->drawable.height; tmp.dst.format = sna_render_format_for_depth(pixmap->drawable.depth); tmp.dst.bo = priv->gpu_bo; tmp.src.bo = frame->bo; tmp.mask.bo = NULL; tmp.floats_per_vertex = 3; tmp.floats_per_rect = 9; if (src_width == dst_width && src_height == dst_height) filter = SAMPLER_FILTER_NEAREST; else filter = SAMPLER_FILTER_BILINEAR; tmp.u.gen6.flags = GEN6_SET_FLAGS(SAMPLER_OFFSET(filter, SAMPLER_EXTEND_PAD, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_NONE), NO_BLEND, is_planar_fourcc(frame->id) ? GEN6_WM_KERNEL_VIDEO_PLANAR : GEN6_WM_KERNEL_VIDEO_PACKED, 2); tmp.priv = frame; kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp.dst.bo); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, frame->bo, NULL)) { kgem_submit(&sna->kgem); assert(kgem_check_bo(&sna->kgem, tmp.dst.bo, frame->bo, NULL)); _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen6_align_vertex(sna, &tmp); gen6_emit_video_state(sna, &tmp); /* Set up the offset for translating from the given region (in screen * coordinates) to the backing pixmap. */ #ifdef COMPOSITE pix_xoff = -pixmap->screen_x + pixmap->drawable.x; pix_yoff = -pixmap->screen_y + pixmap->drawable.y; #else pix_xoff = 0; pix_yoff = 0; #endif src_scale_x = (float)src_width / dst_width / frame->width; src_offset_x = (float)frame->src.x1 / frame->width - dstRegion->extents.x1 * src_scale_x; src_scale_y = (float)src_height / dst_height / frame->height; src_offset_y = (float)frame->src.y1 / frame->height - dstRegion->extents.y1 * src_scale_y; box = region_rects(dstRegion); nbox = region_num_rects(dstRegion); while (nbox--) { BoxRec r; r.x1 = box->x1 + pix_xoff; r.x2 = box->x2 + pix_xoff; r.y1 = box->y1 + pix_yoff; r.y2 = box->y2 + pix_yoff; gen6_get_rectangles(sna, &tmp, 1, gen6_emit_video_state); OUT_VERTEX(r.x2, r.y2); OUT_VERTEX_F(box->x2 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y); OUT_VERTEX(r.x1, r.y2); OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y2 * src_scale_y + src_offset_y); OUT_VERTEX(r.x1, r.y1); OUT_VERTEX_F(box->x1 * src_scale_x + src_offset_x); OUT_VERTEX_F(box->y1 * src_scale_y + src_offset_y); if (!DAMAGE_IS_ALL(priv->gpu_damage)) { sna_damage_add_box(&priv->gpu_damage, &r); sna_damage_subtract_box(&priv->cpu_damage, &r); } box++; } gen4_vertex_flush(sna); return true; } static int gen6_composite_picture(struct sna *sna, PicturePtr picture, struct sna_composite_channel *channel, int x, int y, int w, int h, int dst_x, int dst_y, bool precise) { PixmapPtr pixmap; uint32_t color; int16_t dx, dy; DBG(("%s: (%d, %d)x(%d, %d), dst=(%d, %d), precise=%d\n", __FUNCTION__, x, y, w, h, dst_x, dst_y, precise)); channel->is_solid = false; channel->card_format = -1; if (sna_picture_is_solid(picture, &color)) return gen4_channel_init_solid(sna, channel, color); if (picture->pDrawable == NULL) { int ret; if (picture->pSourcePict->type == SourcePictTypeLinear) return gen4_channel_init_linear(sna, picture, channel, x, y, w, h, dst_x, dst_y); DBG(("%s -- fixup, gradient\n", __FUNCTION__)); ret = -1; if (!precise) ret = sna_render_picture_approximate_gradient(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (ret == -1) ret = sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); return ret; } if (picture->alphaMap) { DBG(("%s -- fixup, alphamap\n", __FUNCTION__)); return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); } if (!gen6_check_repeat(picture)) return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); if (!gen6_check_filter(picture)) return sna_render_picture_fixup(sna, picture, channel, x, y, w, h, dst_x, dst_y); channel->repeat = picture->repeat ? picture->repeatType : RepeatNone; channel->filter = picture->filter; pixmap = get_drawable_pixmap(picture->pDrawable); get_drawable_deltas(picture->pDrawable, pixmap, &dx, &dy); x += dx + picture->pDrawable->x; y += dy + picture->pDrawable->y; channel->is_affine = sna_transform_is_affine(picture->transform); if (sna_transform_is_imprecise_integer_translation(picture->transform, picture->filter, precise, &dx, &dy)) { DBG(("%s: integer translation (%d, %d), removing\n", __FUNCTION__, dx, dy)); x += dx; y += dy; channel->transform = NULL; channel->filter = PictFilterNearest; if (channel->repeat && (x >= 0 && y >= 0 && x + w < pixmap->drawable.width && y + h < pixmap->drawable.height)) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv && priv->clear) { DBG(("%s: converting large pixmap source into solid [%08x]\n", __FUNCTION__, priv->clear_color)); return gen4_channel_init_solid(sna, channel, priv->clear_color); } } } else channel->transform = picture->transform; channel->pict_format = picture->format; channel->card_format = gen6_get_card_format(picture->format); if (channel->card_format == (unsigned)-1) return sna_render_picture_convert(sna, picture, channel, pixmap, x, y, w, h, dst_x, dst_y, false); if (too_large(pixmap->drawable.width, pixmap->drawable.height)) { DBG(("%s: extracting from pixmap %dx%d\n", __FUNCTION__, pixmap->drawable.width, pixmap->drawable.height)); return sna_render_picture_extract(sna, picture, channel, x, y, w, h, dst_x, dst_y); } DBG(("%s: pixmap, repeat=%d, filter=%d, transform?=%d [affine? %d], format=%08x\n", __FUNCTION__, channel->repeat, channel->filter, channel->transform != NULL, channel->is_affine, channel->pict_format)); if (channel->transform) { #define f2d(x) (((double)(x))/65536.) DBG(("%s: transform=[%f %f %f, %f %f %f, %f %f %f] (raw [%x %x %x, %x %x %x, %x %x %x])\n", __FUNCTION__, f2d(channel->transform->matrix[0][0]), f2d(channel->transform->matrix[0][1]), f2d(channel->transform->matrix[0][2]), f2d(channel->transform->matrix[1][0]), f2d(channel->transform->matrix[1][1]), f2d(channel->transform->matrix[1][2]), f2d(channel->transform->matrix[2][0]), f2d(channel->transform->matrix[2][1]), f2d(channel->transform->matrix[2][2]), channel->transform->matrix[0][0], channel->transform->matrix[0][1], channel->transform->matrix[0][2], channel->transform->matrix[1][0], channel->transform->matrix[1][1], channel->transform->matrix[1][2], channel->transform->matrix[2][0], channel->transform->matrix[2][1], channel->transform->matrix[2][2])); #undef f2d } return sna_render_pixmap_bo(sna, channel, pixmap, x, y, w, h, dst_x, dst_y); } inline static void gen6_composite_channel_convert(struct sna_composite_channel *channel) { channel->repeat = gen6_repeat(channel->repeat); channel->filter = gen6_filter(channel->filter); if (channel->card_format == (unsigned)-1) channel->card_format = gen6_get_card_format(channel->pict_format); assert(channel->card_format != (unsigned)-1); } static void gen6_render_composite_done(struct sna *sna, const struct sna_composite_op *op) { DBG(("%s\n", __FUNCTION__)); assert(!sna->render.active); if (sna->render.vertex_offset) { gen4_vertex_flush(sna); gen6_magic_ca_pass(sna, op); } if (op->mask.bo) kgem_bo_destroy(&sna->kgem, op->mask.bo); if (op->src.bo) kgem_bo_destroy(&sna->kgem, op->src.bo); sna_render_composite_redirect_done(sna, op); } inline static bool gen6_composite_set_target(struct sna *sna, struct sna_composite_op *op, PicturePtr dst, int x, int y, int w, int h, bool partial) { BoxRec box; unsigned int hint; DBG(("%s: (%d, %d)x(%d, %d), partial?=%d\n", __FUNCTION__, x, y, w, h, partial)); op->dst.pixmap = get_drawable_pixmap(dst->pDrawable); op->dst.format = dst->format; op->dst.width = op->dst.pixmap->drawable.width; op->dst.height = op->dst.pixmap->drawable.height; if (w && h) { box.x1 = x; box.y1 = y; box.x2 = x + w; box.y2 = y + h; } else sna_render_picture_extents(dst, &box); hint = PREFER_GPU | FORCE_GPU | RENDER_GPU; if (!partial) { hint |= IGNORE_DAMAGE; if (w == op->dst.width && h == op->dst.height) hint |= REPLACES; } op->dst.bo = sna_drawable_use_bo(dst->pDrawable, hint, &box, &op->damage); if (op->dst.bo == NULL) return false; if (hint & REPLACES) { struct sna_pixmap *priv = sna_pixmap(op->dst.pixmap); kgem_bo_pair_undo(&sna->kgem, priv->gpu_bo, priv->cpu_bo); } get_drawable_deltas(dst->pDrawable, op->dst.pixmap, &op->dst.x, &op->dst.y); DBG(("%s: pixmap=%ld, format=%08x, size=%dx%d, pitch=%d, delta=(%d,%d),damage=%p\n", __FUNCTION__, op->dst.pixmap->drawable.serialNumber, (int)op->dst.format, op->dst.width, op->dst.height, op->dst.bo->pitch, op->dst.x, op->dst.y, op->damage ? *op->damage : (void *)-1)); assert(op->dst.bo->proxy == NULL); if (too_large(op->dst.width, op->dst.height) && !sna_render_composite_redirect(sna, op, x, y, w, h, partial)) return false; return true; } static bool try_blt(struct sna *sna, PicturePtr dst, PicturePtr src, int width, int height) { struct kgem_bo *bo; if (sna->kgem.mode == KGEM_BLT) { DBG(("%s: already performing BLT\n", __FUNCTION__)); return true; } if (too_large(width, height)) { DBG(("%s: operation too large for 3D pipe (%d, %d)\n", __FUNCTION__, width, height)); return true; } bo = __sna_drawable_peek_bo(dst->pDrawable); if (bo == NULL) return true; if (bo->rq) return RQ_IS_BLT(bo->rq); if (sna_picture_is_solid(src, NULL) && can_switch_to_blt(sna, bo, 0)) return true; if (src->pDrawable) { bo = __sna_drawable_peek_bo(src->pDrawable); if (bo == NULL) return true; if (prefer_blt_bo(sna, bo)) return true; } if (sna->kgem.ring == KGEM_BLT) { DBG(("%s: already performing BLT\n", __FUNCTION__)); return true; } return false; } static bool check_gradient(PicturePtr picture, bool precise) { if (picture->pDrawable) return false; switch (picture->pSourcePict->type) { case SourcePictTypeSolidFill: case SourcePictTypeLinear: return false; default: return precise; } } static bool has_alphamap(PicturePtr p) { return p->alphaMap != NULL; } static bool need_upload(PicturePtr p) { return p->pDrawable && unattached(p->pDrawable) && untransformed(p); } static bool source_is_busy(PixmapPtr pixmap) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv == NULL || priv->clear) return false; if (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo)) return true; if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; return priv->gpu_damage && !priv->cpu_damage; } static bool source_fallback(PicturePtr p, PixmapPtr pixmap, bool precise) { if (sna_picture_is_solid(p, NULL)) return false; if (p->pSourcePict) return check_gradient(p, precise); if (!gen6_check_repeat(p) || !gen6_check_format(p->format)) return true; if (pixmap && source_is_busy(pixmap)) return false; return has_alphamap(p) || !gen6_check_filter(p) || need_upload(p); } static bool gen6_composite_fallback(struct sna *sna, PicturePtr src, PicturePtr mask, PicturePtr dst) { PixmapPtr src_pixmap; PixmapPtr mask_pixmap; PixmapPtr dst_pixmap; bool src_fallback, mask_fallback; if (!gen6_check_dst_format(dst->format)) { DBG(("%s: unknown destination format: %d\n", __FUNCTION__, dst->format)); return true; } dst_pixmap = get_drawable_pixmap(dst->pDrawable); src_pixmap = src->pDrawable ? get_drawable_pixmap(src->pDrawable) : NULL; src_fallback = source_fallback(src, src_pixmap, dst->polyMode == PolyModePrecise); if (mask) { mask_pixmap = mask->pDrawable ? get_drawable_pixmap(mask->pDrawable) : NULL; mask_fallback = source_fallback(mask, mask_pixmap, dst->polyMode == PolyModePrecise); } else { mask_pixmap = NULL; mask_fallback = false; } /* If we are using the destination as a source and need to * readback in order to upload the source, do it all * on the cpu. */ if (src_pixmap == dst_pixmap && src_fallback) { DBG(("%s: src is dst and will fallback\n",__FUNCTION__)); return true; } if (mask_pixmap == dst_pixmap && mask_fallback) { DBG(("%s: mask is dst and will fallback\n",__FUNCTION__)); return true; } /* If anything is on the GPU, push everything out to the GPU */ if (dst_use_gpu(dst_pixmap)) { DBG(("%s: dst is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (src_pixmap && !src_fallback) { DBG(("%s: src is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } if (mask_pixmap && !mask_fallback) { DBG(("%s: mask is already on the GPU, try to use GPU\n", __FUNCTION__)); return false; } /* However if the dst is not on the GPU and we need to * render one of the sources using the CPU, we may * as well do the entire operation in place onthe CPU. */ if (src_fallback) { DBG(("%s: dst is on the CPU and src will fallback\n", __FUNCTION__)); return true; } if (mask && mask_fallback) { DBG(("%s: dst is on the CPU and mask will fallback\n", __FUNCTION__)); return true; } if (too_large(dst_pixmap->drawable.width, dst_pixmap->drawable.height) && dst_is_cpu(dst_pixmap)) { DBG(("%s: dst is on the CPU and too large\n", __FUNCTION__)); return true; } DBG(("%s: dst is not on the GPU and the operation should not fallback\n", __FUNCTION__)); return dst_use_cpu(dst_pixmap); } static int reuse_source(struct sna *sna, PicturePtr src, struct sna_composite_channel *sc, int src_x, int src_y, PicturePtr mask, struct sna_composite_channel *mc, int msk_x, int msk_y) { uint32_t color; if (src_x != msk_x || src_y != msk_y) return false; if (src == mask) { DBG(("%s: mask is source\n", __FUNCTION__)); *mc = *sc; mc->bo = kgem_bo_reference(mc->bo); return true; } if (sna_picture_is_solid(mask, &color)) return gen4_channel_init_solid(sna, mc, color); if (sc->is_solid) return false; if (src->pDrawable == NULL || mask->pDrawable != src->pDrawable) return false; DBG(("%s: mask reuses source drawable\n", __FUNCTION__)); if (!sna_transform_equal(src->transform, mask->transform)) return false; if (!sna_picture_alphamap_equal(src, mask)) return false; if (!gen6_check_repeat(mask)) return false; if (!gen6_check_filter(mask)) return false; if (!gen6_check_format(mask->format)) return false; DBG(("%s: reusing source channel for mask with a twist\n", __FUNCTION__)); *mc = *sc; mc->repeat = gen6_repeat(mask->repeat ? mask->repeatType : RepeatNone); mc->filter = gen6_filter(mask->filter); mc->pict_format = mask->format; mc->card_format = gen6_get_card_format(mask->format); mc->bo = kgem_bo_reference(mc->bo); return true; } static bool gen6_render_composite(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr mask, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t msk_x, int16_t msk_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_op *tmp) { if (op >= ARRAY_SIZE(gen6_blend_op)) return false; DBG(("%s: %dx%d, current mode=%d\n", __FUNCTION__, width, height, sna->kgem.ring)); if (mask == NULL && try_blt(sna, dst, src, width, height) && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp)) return true; if (gen6_composite_fallback(sna, src, mask, dst)) goto fallback; if (need_tiling(sna, width, height)) return sna_tiling_composite(op, src, mask, dst, src_x, src_y, msk_x, msk_y, dst_x, dst_y, width, height, tmp); if (op == PictOpClear && src == sna->clear) op = PictOpSrc; tmp->op = op; if (!gen6_composite_set_target(sna, tmp, dst, dst_x, dst_y, width, height, flags & COMPOSITE_PARTIAL || op > PictOpSrc)) goto fallback; switch (gen6_composite_picture(sna, src, &tmp->src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_dst; case 0: if (!gen4_channel_init_solid(sna, &tmp->src, 0)) goto cleanup_dst; /* fall through to fixup */ case 1: /* Did we just switch rings to prepare the source? */ if (mask == NULL && prefer_blt_composite(sna, tmp) && sna_blt_composite__convert(sna, dst_x, dst_y, width, height, tmp)) return true; gen6_composite_channel_convert(&tmp->src); break; } tmp->is_affine = tmp->src.is_affine; tmp->has_component_alpha = false; tmp->need_magic_ca_pass = false; tmp->mask.bo = NULL; tmp->mask.filter = SAMPLER_FILTER_NEAREST; tmp->mask.repeat = SAMPLER_EXTEND_NONE; if (mask) { if (mask->componentAlpha && PICT_FORMAT_RGB(mask->format)) { tmp->has_component_alpha = true; /* Check if it's component alpha that relies on a source alpha and on * the source value. We can only get one of those into the single * source value that we get to blend with. */ if (gen6_blend_op[op].src_alpha && (gen6_blend_op[op].src_blend != GEN6_BLENDFACTOR_ZERO)) { if (op != PictOpOver) goto cleanup_src; tmp->need_magic_ca_pass = true; tmp->op = PictOpOutReverse; } } if (!reuse_source(sna, src, &tmp->src, src_x, src_y, mask, &tmp->mask, msk_x, msk_y)) { switch (gen6_composite_picture(sna, mask, &tmp->mask, msk_x, msk_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_src; case 0: if (!gen4_channel_init_solid(sna, &tmp->mask, 0)) goto cleanup_src; /* fall through to fixup */ case 1: gen6_composite_channel_convert(&tmp->mask); break; } } tmp->is_affine &= tmp->mask.is_affine; } tmp->u.gen6.flags = GEN6_SET_FLAGS(SAMPLER_OFFSET(tmp->src.filter, tmp->src.repeat, tmp->mask.filter, tmp->mask.repeat), gen6_get_blend(tmp->op, tmp->has_component_alpha, tmp->dst.format), gen6_choose_composite_kernel(tmp->op, tmp->mask.bo != NULL, tmp->has_component_alpha, tmp->is_affine), gen4_choose_composite_emitter(sna, tmp)); tmp->blt = gen6_render_composite_blt; tmp->box = gen6_render_composite_box; tmp->boxes = gen6_render_composite_boxes__blt; if (tmp->emit_boxes) { tmp->boxes = gen6_render_composite_boxes; tmp->thread_boxes = gen6_render_composite_boxes__thread; } tmp->done = gen6_render_composite_done; kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp->dst.bo); if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->dst.bo, tmp->src.bo, tmp->mask.bo, NULL)) goto cleanup_mask; _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen6_align_vertex(sna, tmp); gen6_emit_composite_state(sna, tmp); return true; cleanup_mask: if (tmp->mask.bo) { kgem_bo_destroy(&sna->kgem, tmp->mask.bo); tmp->mask.bo = NULL; } cleanup_src: if (tmp->src.bo) { kgem_bo_destroy(&sna->kgem, tmp->src.bo); tmp->src.bo = NULL; } cleanup_dst: if (tmp->redirect.real_bo) { kgem_bo_destroy(&sna->kgem, tmp->dst.bo); tmp->redirect.real_bo = NULL; } fallback: return (mask == NULL && sna_blt_composite(sna, op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags | COMPOSITE_FALLBACK, tmp)); } #if !NO_COMPOSITE_SPANS fastcall static void gen6_render_composite_spans_box(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, float opacity) { DBG(("%s: src=+(%d, %d), opacity=%f, dst=+(%d, %d), box=(%d, %d) x (%d, %d)\n", __FUNCTION__, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); gen6_get_rectangles(sna, &op->base, 1, gen6_emit_composite_state); op->prim_emit(sna, op, box, opacity); } static void gen6_render_composite_spans_boxes(struct sna *sna, const struct sna_composite_spans_op *op, const BoxRec *box, int nbox, float opacity) { DBG(("%s: nbox=%d, src=+(%d, %d), opacity=%f, dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], opacity, op->base.dst.x, op->base.dst.y)); do { int nbox_this_time; nbox_this_time = gen6_get_rectangles(sna, &op->base, nbox, gen6_emit_composite_state); nbox -= nbox_this_time; do { DBG((" %s: (%d, %d) x (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1)); op->prim_emit(sna, op, box++, opacity); } while (--nbox_this_time); } while (nbox); } fastcall static void gen6_render_composite_spans_boxes__thread(struct sna *sna, const struct sna_composite_spans_op *op, const struct sna_opacity_box *box, int nbox) { DBG(("%s: nbox=%d, src=+(%d, %d), dst=+(%d, %d)\n", __FUNCTION__, nbox, op->base.src.offset[0], op->base.src.offset[1], op->base.dst.x, op->base.dst.y)); sna_vertex_lock(&sna->render); do { int nbox_this_time; float *v; nbox_this_time = gen6_get_rectangles(sna, &op->base, nbox, gen6_emit_composite_state); assert(nbox_this_time); nbox -= nbox_this_time; v = sna->render.vertices + sna->render.vertex_used; sna->render.vertex_used += nbox_this_time * op->base.floats_per_rect; sna_vertex_acquire__locked(&sna->render); sna_vertex_unlock(&sna->render); op->emit_boxes(op, box, nbox_this_time, v); box += nbox_this_time; sna_vertex_lock(&sna->render); sna_vertex_release__locked(&sna->render); } while (nbox); sna_vertex_unlock(&sna->render); } fastcall static void gen6_render_composite_spans_done(struct sna *sna, const struct sna_composite_spans_op *op) { DBG(("%s()\n", __FUNCTION__)); assert(!sna->render.active); if (sna->render.vertex_offset) gen4_vertex_flush(sna); if (op->base.src.bo) kgem_bo_destroy(&sna->kgem, op->base.src.bo); sna_render_composite_redirect_done(sna, &op->base); } static bool gen6_check_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t width, int16_t height, unsigned flags) { DBG(("%s: op=%d, width=%d, height=%d, flags=%x\n", __FUNCTION__, op, width, height, flags)); if (op >= ARRAY_SIZE(gen6_blend_op)) return false; if (gen6_composite_fallback(sna, src, NULL, dst)) { DBG(("%s: operation would fallback\n", __FUNCTION__)); return false; } if (need_tiling(sna, width, height) && !is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS)) { DBG(("%s: fallback, tiled operation not on GPU\n", __FUNCTION__)); return false; } if ((flags & COMPOSITE_SPANS_RECTILINEAR) == 0) { struct sna_pixmap *priv = sna_pixmap_from_drawable(dst->pDrawable); assert(priv); if (priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) return true; if (flags & COMPOSITE_SPANS_INPLACE_HINT) return false; return priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo); } return true; } static bool gen6_render_composite_spans(struct sna *sna, uint8_t op, PicturePtr src, PicturePtr dst, int16_t src_x, int16_t src_y, int16_t dst_x, int16_t dst_y, int16_t width, int16_t height, unsigned flags, struct sna_composite_spans_op *tmp) { DBG(("%s: %dx%d with flags=%x, current mode=%d\n", __FUNCTION__, width, height, flags, sna->kgem.ring)); assert(gen6_check_composite_spans(sna, op, src, dst, width, height, flags)); if (need_tiling(sna, width, height)) { DBG(("%s: tiling, operation (%dx%d) too wide for pipeline\n", __FUNCTION__, width, height)); return sna_tiling_composite_spans(op, src, dst, src_x, src_y, dst_x, dst_y, width, height, flags, tmp); } tmp->base.op = op; if (!gen6_composite_set_target(sna, &tmp->base, dst, dst_x, dst_y, width, height, true)) return false; switch (gen6_composite_picture(sna, src, &tmp->base.src, src_x, src_y, width, height, dst_x, dst_y, dst->polyMode == PolyModePrecise)) { case -1: goto cleanup_dst; case 0: if (!gen4_channel_init_solid(sna, &tmp->base.src, 0)) goto cleanup_dst; /* fall through to fixup */ case 1: gen6_composite_channel_convert(&tmp->base.src); break; } tmp->base.mask.bo = NULL; tmp->base.is_affine = tmp->base.src.is_affine; tmp->base.need_magic_ca_pass = false; tmp->base.u.gen6.flags = GEN6_SET_FLAGS(SAMPLER_OFFSET(tmp->base.src.filter, tmp->base.src.repeat, SAMPLER_FILTER_NEAREST, SAMPLER_EXTEND_PAD), gen6_get_blend(tmp->base.op, false, tmp->base.dst.format), GEN6_WM_KERNEL_OPACITY | !tmp->base.is_affine, gen4_choose_spans_emitter(sna, tmp)); tmp->box = gen6_render_composite_spans_box; tmp->boxes = gen6_render_composite_spans_boxes; if (tmp->emit_boxes) tmp->thread_boxes = gen6_render_composite_spans_boxes__thread; tmp->done = gen6_render_composite_spans_done; kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp->base.dst.bo); if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp->base.dst.bo, tmp->base.src.bo, NULL)) goto cleanup_src; _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen6_align_vertex(sna, &tmp->base); gen6_emit_composite_state(sna, &tmp->base); return true; cleanup_src: if (tmp->base.src.bo) kgem_bo_destroy(&sna->kgem, tmp->base.src.bo); cleanup_dst: if (tmp->base.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp->base.dst.bo); return false; } #endif static void gen6_emit_copy_state(struct sna *sna, const struct sna_composite_op *op) { uint32_t *binding_table; uint16_t offset; bool dirty; dirty = gen6_get_batch(sna, op); binding_table = gen6_composite_get_binding_table(sna, &offset); binding_table[0] = gen6_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen6_get_dest_format(op->dst.format), true); binding_table[1] = gen6_bind_bo(sna, op->src.bo, op->src.width, op->src.height, op->src.card_format, false); if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen6.surface_table) == *(uint64_t*)binding_table) { sna->kgem.surface += sizeof(struct gen6_surface_state_padded) / sizeof(uint32_t); offset = sna->render_state.gen6.surface_table; } gen6_emit_state(sna, op, offset | dirty); } static inline bool prefer_blt_copy(struct sna *sna, struct kgem_bo *src_bo, struct kgem_bo *dst_bo, unsigned flags) { if (flags & COPY_SYNC) return false; if (PREFER_RENDER) return PREFER_RENDER > 0; if (sna->kgem.ring == KGEM_BLT) return true; if (src_bo == dst_bo && can_switch_to_blt(sna, dst_bo, flags)) return true; if (untiled_tlb_miss(src_bo) || untiled_tlb_miss(dst_bo)) return true; if (force_blt_ring(sna)) return true; if (kgem_bo_is_render(dst_bo) || kgem_bo_is_render(src_bo)) return false; if (prefer_render_ring(sna, dst_bo)) return false; if (!prefer_blt_ring(sna, dst_bo, flags)) return false; return prefer_blt_bo(sna, src_bo) || prefer_blt_bo(sna, dst_bo); } static bool gen6_render_copy_boxes(struct sna *sna, uint8_t alu, const DrawableRec *src, struct kgem_bo *src_bo, int16_t src_dx, int16_t src_dy, const DrawableRec *dst, struct kgem_bo *dst_bo, int16_t dst_dx, int16_t dst_dy, const BoxRec *box, int n, unsigned flags) { struct sna_composite_op tmp; BoxRec extents; DBG(("%s (%d, %d)->(%d, %d) x %d, alu=%x, self-copy=%d, overlaps? %d\n", __FUNCTION__, src_dx, src_dy, dst_dx, dst_dy, n, alu, src_bo == dst_bo, overlaps(sna, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, box, n, flags, &extents))); if (prefer_blt_copy(sna, src_bo, dst_bo, flags) && sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; if (!(alu == GXcopy || alu == GXclear)) { fallback_blt: if (!sna_blt_compare_depth(src, dst)) return false; return sna_blt_copy_boxes_fallback(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } if (overlaps(sna, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, box, n, flags, &extents)) { bool big = too_large(extents.x2-extents.x1, extents.y2-extents.y1); if ((big || can_switch_to_blt(sna, dst_bo, flags)) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; if (big) goto fallback_blt; assert(src_bo == dst_bo); assert(src->depth == dst->depth); assert(src->width == dst->width); assert(src->height == dst->height); return sna_render_copy_boxes__overlap(sna, alu, src, src_bo, src_dx, src_dy, dst_dx, dst_dy, box, n, &extents); } if (dst->depth == src->depth) { tmp.dst.format = sna_render_format_for_depth(dst->depth); tmp.src.pict_format = tmp.dst.format; } else { tmp.dst.format = sna_format_for_depth(dst->depth); tmp.src.pict_format = sna_format_for_depth(src->depth); } if (!gen6_check_format(tmp.src.pict_format)) goto fallback_blt; tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.bo = dst_bo; tmp.dst.x = tmp.dst.y = 0; tmp.damage = NULL; sna_render_composite_redirect_init(&tmp); if (too_large(tmp.dst.width, tmp.dst.height)) { int i; extents = box[0]; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_composite_redirect(sna, &tmp, extents.x1 + dst_dx, extents.y1 + dst_dy, extents.x2 - extents.x1, extents.y2 - extents.y1, n > 1)) goto fallback_tiled; } tmp.src.card_format = gen6_get_card_format(tmp.src.pict_format); if (too_large(src->width, src->height)) { int i; extents = box[0]; for (i = 1; i < n; i++) { if (box[i].x1 < extents.x1) extents.x1 = box[i].x1; if (box[i].y1 < extents.y1) extents.y1 = box[i].y1; if (box[i].x2 > extents.x2) extents.x2 = box[i].x2; if (box[i].y2 > extents.y2) extents.y2 = box[i].y2; } if (!sna_render_pixmap_partial(sna, src, src_bo, &tmp.src, extents.x1 + src_dx, extents.y1 + src_dy, extents.x2 - extents.x1, extents.y2 - extents.y1)) { DBG(("%s: unable to extract partial pixmap\n", __FUNCTION__)); goto fallback_tiled_dst; } } else { tmp.src.bo = src_bo; tmp.src.width = src->width; tmp.src.height = src->height; tmp.src.offset[0] = tmp.src.offset[1] = 0; } tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = 0; tmp.u.gen6.flags = COPY_FLAGS(alu); assert(GEN6_KERNEL(tmp.u.gen6.flags) == GEN6_WM_KERNEL_NOMASK); assert(GEN6_SAMPLER(tmp.u.gen6.flags) == COPY_SAMPLER); assert(GEN6_VERTEX(tmp.u.gen6.flags) == COPY_VERTEX); kgem_set_mode(&sna->kgem, KGEM_RENDER, tmp.dst.bo); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, tmp.src.bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, tmp.dst.bo, tmp.src.bo, NULL)) { DBG(("%s: too large for a single operation\n", __FUNCTION__)); if (tmp.src.bo != src_bo) kgem_bo_destroy(&sna->kgem, tmp.src.bo); if (tmp.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp.dst.bo); goto fallback_blt; } _kgem_set_mode(&sna->kgem, KGEM_RENDER); } src_dx += tmp.src.offset[0]; src_dy += tmp.src.offset[1]; dst_dx += tmp.dst.x; dst_dy += tmp.dst.y; tmp.dst.x = tmp.dst.y = 0; gen6_align_vertex(sna, &tmp); gen6_emit_copy_state(sna, &tmp); do { int16_t *v; int n_this_time; n_this_time = gen6_get_rectangles(sna, &tmp, n, gen6_emit_copy_state); n -= n_this_time; v = (int16_t *)(sna->render.vertices + sna->render.vertex_used); sna->render.vertex_used += 6 * n_this_time; assert(sna->render.vertex_used <= sna->render.vertex_size); do { DBG((" (%d, %d) -> (%d, %d) + (%d, %d)\n", box->x1 + src_dx, box->y1 + src_dy, box->x1 + dst_dx, box->y1 + dst_dy, box->x2 - box->x1, box->y2 - box->y1)); v[0] = box->x2 + dst_dx; v[2] = box->x2 + src_dx; v[1] = v[5] = box->y2 + dst_dy; v[3] = v[7] = box->y2 + src_dy; v[8] = v[4] = box->x1 + dst_dx; v[10] = v[6] = box->x1 + src_dx; v[9] = box->y1 + dst_dy; v[11] = box->y1 + src_dy; v += 12; box++; } while (--n_this_time); } while (n); gen4_vertex_flush(sna); sna_render_composite_redirect_done(sna, &tmp); if (tmp.src.bo != src_bo) kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; fallback_tiled_dst: if (tmp.redirect.real_bo) kgem_bo_destroy(&sna->kgem, tmp.dst.bo); fallback_tiled: if (sna_blt_compare_depth(src, dst) && sna_blt_copy_boxes(sna, alu, src_bo, src_dx, src_dy, dst_bo, dst_dx, dst_dy, dst->bitsPerPixel, box, n)) return true; return sna_tiling_copy_boxes(sna, alu, src, src_bo, src_dx, src_dy, dst, dst_bo, dst_dx, dst_dy, box, n); } static void gen6_render_copy_blt(struct sna *sna, const struct sna_copy_op *op, int16_t sx, int16_t sy, int16_t w, int16_t h, int16_t dx, int16_t dy) { int16_t *v; gen6_get_rectangles(sna, &op->base, 1, gen6_emit_copy_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = dx+w; v[1] = dy+h; v[2] = sx+w; v[3] = sy+h; v[4] = dx; v[5] = dy+h; v[6] = sx; v[7] = sy+h; v[8] = dx; v[9] = dy; v[10] = sx; v[11] = sy; } static void gen6_render_copy_done(struct sna *sna, const struct sna_copy_op *op) { DBG(("%s()\n", __FUNCTION__)); assert(!sna->render.active); if (sna->render.vertex_offset) gen4_vertex_flush(sna); } static bool gen6_render_copy(struct sna *sna, uint8_t alu, PixmapPtr src, struct kgem_bo *src_bo, PixmapPtr dst, struct kgem_bo *dst_bo, struct sna_copy_op *op) { DBG(("%s (alu=%d, src=(%dx%d), dst=(%dx%d))\n", __FUNCTION__, alu, src->drawable.width, src->drawable.height, dst->drawable.width, dst->drawable.height)); if (prefer_blt_copy(sna, src_bo, dst_bo, 0) && sna_blt_compare_depth(&src->drawable, &dst->drawable) && sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op)) return true; if (!(alu == GXcopy || alu == GXclear) || src_bo == dst_bo || too_large(src->drawable.width, src->drawable.height) || too_large(dst->drawable.width, dst->drawable.height)) { fallback: if (!sna_blt_compare_depth(&src->drawable, &dst->drawable)) return false; return sna_blt_copy(sna, alu, src_bo, dst_bo, dst->drawable.bitsPerPixel, op); } if (dst->drawable.depth == src->drawable.depth) { op->base.dst.format = sna_render_format_for_depth(dst->drawable.depth); op->base.src.pict_format = op->base.dst.format; } else { op->base.dst.format = sna_format_for_depth(dst->drawable.depth); op->base.src.pict_format = sna_format_for_depth(src->drawable.depth); } if (!gen6_check_format(op->base.src.pict_format)) goto fallback; op->base.dst.pixmap = dst; op->base.dst.width = dst->drawable.width; op->base.dst.height = dst->drawable.height; op->base.dst.bo = dst_bo; op->base.src.bo = src_bo; op->base.src.card_format = gen6_get_card_format(op->base.src.pict_format); op->base.src.width = src->drawable.width; op->base.src.height = src->drawable.height; op->base.mask.bo = NULL; op->base.floats_per_vertex = 2; op->base.floats_per_rect = 6; op->base.u.gen6.flags = COPY_FLAGS(alu); assert(GEN6_KERNEL(op->base.u.gen6.flags) == GEN6_WM_KERNEL_NOMASK); assert(GEN6_SAMPLER(op->base.u.gen6.flags) == COPY_SAMPLER); assert(GEN6_VERTEX(op->base.u.gen6.flags) == COPY_VERTEX); kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, dst_bo, src_bo, NULL)) goto fallback; _kgem_set_mode(&sna->kgem, KGEM_RENDER); } gen6_align_vertex(sna, &op->base); gen6_emit_copy_state(sna, &op->base); op->blt = gen6_render_copy_blt; op->done = gen6_render_copy_done; return true; } static void gen6_emit_fill_state(struct sna *sna, const struct sna_composite_op *op) { uint32_t *binding_table; uint16_t offset; bool dirty; dirty = gen6_get_batch(sna, op); binding_table = gen6_composite_get_binding_table(sna, &offset); binding_table[0] = gen6_bind_bo(sna, op->dst.bo, op->dst.width, op->dst.height, gen6_get_dest_format(op->dst.format), true); binding_table[1] = gen6_bind_bo(sna, op->src.bo, 1, 1, GEN6_SURFACEFORMAT_B8G8R8A8_UNORM, false); if (sna->kgem.surface == offset && *(uint64_t *)(sna->kgem.batch + sna->render_state.gen6.surface_table) == *(uint64_t*)binding_table) { sna->kgem.surface += sizeof(struct gen6_surface_state_padded)/sizeof(uint32_t); offset = sna->render_state.gen6.surface_table; } gen6_emit_state(sna, op, offset | dirty); } static bool gen6_render_fill_boxes(struct sna *sna, CARD8 op, PictFormat format, const xRenderColor *color, const DrawableRec *dst, struct kgem_bo *dst_bo, const BoxRec *box, int n) { struct sna_composite_op tmp; uint32_t pixel; DBG(("%s (op=%d, color=(%04x, %04x, %04x, %04x) [%08x])\n", __FUNCTION__, op, color->red, color->green, color->blue, color->alpha, (int)format)); if (op >= ARRAY_SIZE(gen6_blend_op)) { DBG(("%s: fallback due to unhandled blend op: %d\n", __FUNCTION__, op)); return false; } if (prefer_blt_fill(sna, dst_bo, FILL_BOXES) || !gen6_check_dst_format(format)) { uint8_t alu = GXinvalid; if (op <= PictOpSrc) { pixel = 0; if (op == PictOpClear) alu = GXclear; else if (sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, format)) alu = GXcopy; } if (alu != GXinvalid && sna_blt_fill_boxes(sna, alu, dst_bo, dst->bitsPerPixel, pixel, box, n)) return true; if (!gen6_check_dst_format(format)) return false; } if (op == PictOpClear) { pixel = 0; op = PictOpSrc; } else if (!sna_get_pixel_from_rgba(&pixel, color->red, color->green, color->blue, color->alpha, PICT_a8r8g8b8)) return false; DBG(("%s(%08x x %d [(%d, %d), (%d, %d) ...])\n", __FUNCTION__, pixel, n, box[0].x1, box[0].y1, box[0].x2, box[0].y2)); tmp.dst.pixmap = (PixmapPtr)dst; tmp.dst.width = dst->width; tmp.dst.height = dst->height; tmp.dst.format = format; tmp.dst.bo = dst_bo; tmp.dst.x = tmp.dst.y = 0; tmp.damage = NULL; sna_render_composite_redirect_init(&tmp); if (too_large(dst->width, dst->height)) { BoxRec extents; boxes_extents(box, n, &extents); if (!sna_render_composite_redirect(sna, &tmp, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1, n > 1)) return sna_tiling_fill_boxes(sna, op, format, color, dst, dst_bo, box, n); } tmp.src.bo = sna_render_get_solid(sna, pixel); tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = false; tmp.u.gen6.flags = FILL_FLAGS(op, format); assert(GEN6_KERNEL(tmp.u.gen6.flags) == GEN6_WM_KERNEL_NOMASK); assert(GEN6_SAMPLER(tmp.u.gen6.flags) == FILL_SAMPLER); assert(GEN6_VERTEX(tmp.u.gen6.flags) == FILL_VERTEX); kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); assert(kgem_check_bo(&sna->kgem, dst_bo, NULL)); } gen6_align_vertex(sna, &tmp); gen6_emit_fill_state(sna, &tmp); do { int n_this_time; int16_t *v; n_this_time = gen6_get_rectangles(sna, &tmp, n, gen6_emit_fill_state); n -= n_this_time; v = (int16_t *)(sna->render.vertices + sna->render.vertex_used); sna->render.vertex_used += 6 * n_this_time; assert(sna->render.vertex_used <= sna->render.vertex_size); do { DBG((" (%d, %d), (%d, %d)\n", box->x1, box->y1, box->x2, box->y2)); v[0] = box->x2; v[5] = v[1] = box->y2; v[8] = v[4] = box->x1; v[9] = box->y1; v[2] = v[3] = v[7] = 1; v[6] = v[10] = v[11] = 0; v += 12; box++; } while (--n_this_time); } while (n); gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); sna_render_composite_redirect_done(sna, &tmp); return true; } static void gen6_render_op_fill_blt(struct sna *sna, const struct sna_fill_op *op, int16_t x, int16_t y, int16_t w, int16_t h) { int16_t *v; DBG(("%s: (%d, %d)x(%d, %d)\n", __FUNCTION__, x, y, w, h)); gen6_get_rectangles(sna, &op->base, 1, gen6_emit_fill_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = x+w; v[4] = v[8] = x; v[1] = v[5] = y+h; v[9] = y; v[2] = v[3] = v[7] = 1; v[6] = v[10] = v[11] = 0; } fastcall static void gen6_render_op_fill_box(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box) { int16_t *v; DBG(("%s: (%d, %d),(%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); gen6_get_rectangles(sna, &op->base, 1, gen6_emit_fill_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = box->x2; v[8] = v[4] = box->x1; v[5] = v[1] = box->y2; v[9] = box->y1; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; } fastcall static void gen6_render_op_fill_boxes(struct sna *sna, const struct sna_fill_op *op, const BoxRec *box, int nbox) { DBG(("%s: (%d, %d),(%d, %d)... x %d\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, nbox)); do { int nbox_this_time; int16_t *v; nbox_this_time = gen6_get_rectangles(sna, &op->base, nbox, gen6_emit_fill_state); nbox -= nbox_this_time; v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6 * nbox_this_time; assert(sna->render.vertex_used <= sna->render.vertex_size); do { v[0] = box->x2; v[8] = v[4] = box->x1; v[5] = v[1] = box->y2; v[9] = box->y1; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; box++; v += 12; } while (--nbox_this_time); } while (nbox); } static void gen6_render_op_fill_done(struct sna *sna, const struct sna_fill_op *op) { DBG(("%s()\n", __FUNCTION__)); assert(!sna->render.active); if (sna->render.vertex_offset) gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, op->base.src.bo); } static bool gen6_render_fill(struct sna *sna, uint8_t alu, PixmapPtr dst, struct kgem_bo *dst_bo, uint32_t color, unsigned flags, struct sna_fill_op *op) { DBG(("%s: (alu=%d, color=%x)\n", __FUNCTION__, alu, color)); if (prefer_blt_fill(sna, dst_bo, flags) && sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, op)) return true; if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height)) return sna_blt_fill(sna, alu, dst_bo, dst->drawable.bitsPerPixel, color, op); if (alu == GXclear) color = 0; op->base.dst.pixmap = dst; op->base.dst.width = dst->drawable.width; op->base.dst.height = dst->drawable.height; op->base.dst.format = sna_format_for_depth(dst->drawable.depth); op->base.dst.bo = dst_bo; op->base.dst.x = op->base.dst.y = 0; op->base.src.bo = sna_render_get_solid(sna, sna_rgba_for_color(color, dst->drawable.depth)); op->base.mask.bo = NULL; op->base.need_magic_ca_pass = false; op->base.floats_per_vertex = 2; op->base.floats_per_rect = 6; op->base.u.gen6.flags = FILL_FLAGS_NOBLEND; assert(GEN6_KERNEL(op->base.u.gen6.flags) == GEN6_WM_KERNEL_NOMASK); assert(GEN6_SAMPLER(op->base.u.gen6.flags) == FILL_SAMPLER); assert(GEN6_VERTEX(op->base.u.gen6.flags) == FILL_VERTEX); kgem_set_mode(&sna->kgem, KGEM_RENDER, dst_bo); if (!kgem_check_bo(&sna->kgem, dst_bo, NULL)) { kgem_submit(&sna->kgem); assert(kgem_check_bo(&sna->kgem, dst_bo, NULL)); } gen6_align_vertex(sna, &op->base); gen6_emit_fill_state(sna, &op->base); op->blt = gen6_render_op_fill_blt; op->box = gen6_render_op_fill_box; op->boxes = gen6_render_op_fill_boxes; op->points = NULL; op->done = gen6_render_op_fill_done; return true; } static bool gen6_render_fill_one_try_blt(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { BoxRec box; box.x1 = x1; box.y1 = y1; box.x2 = x2; box.y2 = y2; return sna_blt_fill_boxes(sna, alu, bo, dst->drawable.bitsPerPixel, color, &box, 1); } static bool gen6_render_fill_one(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo, uint32_t color, int16_t x1, int16_t y1, int16_t x2, int16_t y2, uint8_t alu) { struct sna_composite_op tmp; int16_t *v; /* Prefer to use the BLT if already engaged */ if (prefer_blt_fill(sna, bo, FILL_BOXES) && gen6_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu)) return true; /* Must use the BLT if we can't RENDER... */ if (!(alu == GXcopy || alu == GXclear) || too_large(dst->drawable.width, dst->drawable.height)) return gen6_render_fill_one_try_blt(sna, dst, bo, color, x1, y1, x2, y2, alu); if (alu == GXclear) color = 0; tmp.dst.pixmap = dst; tmp.dst.width = dst->drawable.width; tmp.dst.height = dst->drawable.height; tmp.dst.format = sna_format_for_depth(dst->drawable.depth); tmp.dst.bo = bo; tmp.dst.x = tmp.dst.y = 0; tmp.src.bo = sna_render_get_solid(sna, sna_rgba_for_color(color, dst->drawable.depth)); tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = false; tmp.u.gen6.flags = FILL_FLAGS_NOBLEND; assert(GEN6_KERNEL(tmp.u.gen6.flags) == GEN6_WM_KERNEL_NOMASK); assert(GEN6_SAMPLER(tmp.u.gen6.flags) == FILL_SAMPLER); assert(GEN6_VERTEX(tmp.u.gen6.flags) == FILL_VERTEX); kgem_set_mode(&sna->kgem, KGEM_RENDER, bo); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); return false; } } gen6_align_vertex(sna, &tmp); gen6_emit_fill_state(sna, &tmp); gen6_get_rectangles(sna, &tmp, 1, gen6_emit_fill_state); DBG((" (%d, %d), (%d, %d)\n", x1, y1, x2, y2)); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = x2; v[8] = v[4] = x1; v[5] = v[1] = y2; v[9] = y1; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; } static bool gen6_render_clear_try_blt(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo) { BoxRec box; box.x1 = 0; box.y1 = 0; box.x2 = dst->drawable.width; box.y2 = dst->drawable.height; return sna_blt_fill_boxes(sna, GXclear, bo, dst->drawable.bitsPerPixel, 0, &box, 1); } static bool gen6_render_clear(struct sna *sna, PixmapPtr dst, struct kgem_bo *bo) { struct sna_composite_op tmp; int16_t *v; DBG(("%s: %dx%d\n", __FUNCTION__, dst->drawable.width, dst->drawable.height)); /* Prefer to use the BLT if, and only if, already engaged */ if (sna->kgem.ring == KGEM_BLT && gen6_render_clear_try_blt(sna, dst, bo)) return true; /* Must use the BLT if we can't RENDER... */ if (too_large(dst->drawable.width, dst->drawable.height)) return gen6_render_clear_try_blt(sna, dst, bo); tmp.dst.pixmap = dst; tmp.dst.width = dst->drawable.width; tmp.dst.height = dst->drawable.height; tmp.dst.format = sna_format_for_depth(dst->drawable.depth); tmp.dst.bo = bo; tmp.dst.x = tmp.dst.y = 0; tmp.src.bo = sna_render_get_solid(sna, 0); tmp.mask.bo = NULL; tmp.floats_per_vertex = 2; tmp.floats_per_rect = 6; tmp.need_magic_ca_pass = false; tmp.u.gen6.flags = FILL_FLAGS_NOBLEND; assert(GEN6_KERNEL(tmp.u.gen6.flags) == GEN6_WM_KERNEL_NOMASK); assert(GEN6_SAMPLER(tmp.u.gen6.flags) == FILL_SAMPLER); assert(GEN6_VERTEX(tmp.u.gen6.flags) == FILL_VERTEX); kgem_set_mode(&sna->kgem, KGEM_RENDER, bo); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_submit(&sna->kgem); if (!kgem_check_bo(&sna->kgem, bo, NULL)) { kgem_bo_destroy(&sna->kgem, tmp.src.bo); return false; } } gen6_align_vertex(sna, &tmp); gen6_emit_fill_state(sna, &tmp); gen6_get_rectangles(sna, &tmp, 1, gen6_emit_fill_state); v = (int16_t *)&sna->render.vertices[sna->render.vertex_used]; sna->render.vertex_used += 6; assert(sna->render.vertex_used <= sna->render.vertex_size); v[0] = dst->drawable.width; v[5] = v[1] = dst->drawable.height; v[8] = v[4] = 0; v[9] = 0; v[7] = v[2] = v[3] = 1; v[6] = v[10] = v[11] = 0; gen4_vertex_flush(sna); kgem_bo_destroy(&sna->kgem, tmp.src.bo); return true; } static void gen6_render_reset(struct sna *sna) { sna->render_state.gen6.needs_invariant = true; sna->render_state.gen6.first_state_packet = true; sna->render_state.gen6.ve_id = 3 << 2; sna->render_state.gen6.last_primitive = -1; sna->render_state.gen6.num_sf_outputs = 0; sna->render_state.gen6.samplers = -1; sna->render_state.gen6.blend = -1; sna->render_state.gen6.kernel = -1; sna->render_state.gen6.drawrect_offset = -1; sna->render_state.gen6.drawrect_limit = -1; sna->render_state.gen6.surface_table = -1; if (sna->render.vbo && !kgem_bo_can_map(&sna->kgem, sna->render.vbo)) { DBG(("%s: discarding unmappable vbo\n", __FUNCTION__)); discard_vbo(sna); } sna->render.vertex_offset = 0; sna->render.nvertex_reloc = 0; sna->render.vb_id = 0; } static void gen6_render_fini(struct sna *sna) { kgem_bo_destroy(&sna->kgem, sna->render_state.gen6.general_bo); } static bool is_gt2(struct sna *sna, int devid) { return devid & 0x30; } static bool is_mobile(struct sna *sna, int devid) { return (devid & 0xf) == 0x6; } static bool gen6_render_setup(struct sna *sna, int devid) { struct gen6_render_state *state = &sna->render_state.gen6; struct sna_static_stream general; struct gen6_sampler_state *ss; int i, j, k, l, m; state->info = >1_info; if (is_gt2(sna, devid)) state->info = >2_info; /* XXX requires GT_MODE WiZ disabled */ state->gt = state->info->gt; sna_static_stream_init(&general); /* Zero pad the start. If you see an offset of 0x0 in the batchbuffer * dumps, you know it points to zero. */ null_create(&general); scratch_create(&general); for (m = 0; m < GEN6_KERNEL_COUNT; m++) { if (wm_kernels[m].size) { state->wm_kernel[m][1] = sna_static_stream_add(&general, wm_kernels[m].data, wm_kernels[m].size, 64); } else { if (USE_8_PIXEL_DISPATCH) { state->wm_kernel[m][0] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 8); } if (USE_16_PIXEL_DISPATCH) { state->wm_kernel[m][1] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 16); } if (USE_32_PIXEL_DISPATCH) { state->wm_kernel[m][2] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 32); } } if ((state->wm_kernel[m][0]|state->wm_kernel[m][1]|state->wm_kernel[m][2]) == 0) { state->wm_kernel[m][1] = sna_static_stream_compile_wm(sna, &general, wm_kernels[m].data, 16); } } ss = sna_static_stream_map(&general, 2 * sizeof(*ss) * (2 + FILTER_COUNT * EXTEND_COUNT * FILTER_COUNT * EXTEND_COUNT), 32); state->wm_state = sna_static_stream_offsetof(&general, ss); sampler_copy_init(ss); ss += 2; sampler_fill_init(ss); ss += 2; for (i = 0; i < FILTER_COUNT; i++) { for (j = 0; j < EXTEND_COUNT; j++) { for (k = 0; k < FILTER_COUNT; k++) { for (l = 0; l < EXTEND_COUNT; l++) { sampler_state_init(ss++, i, j); sampler_state_init(ss++, k, l); } } } } state->cc_blend = gen6_composite_create_blend_state(&general); state->general_bo = sna_static_stream_fini(sna, &general); return state->general_bo != NULL; } const char *gen6_render_init(struct sna *sna, const char *backend) { int devid = intel_get_device_id(sna->dev); if (!gen6_render_setup(sna, devid)) return backend; sna->kgem.context_switch = gen6_render_context_switch; sna->kgem.retire = gen6_render_retire; sna->kgem.expire = gen4_render_expire; #if !NO_COMPOSITE sna->render.composite = gen6_render_composite; sna->render.prefer_gpu |= PREFER_GPU_RENDER; #endif #if !NO_COMPOSITE_SPANS sna->render.check_composite_spans = gen6_check_composite_spans; sna->render.composite_spans = gen6_render_composite_spans; if (is_mobile(sna, devid)) sna->render.prefer_gpu |= PREFER_GPU_SPANS; #endif sna->render.video = gen6_render_video; #if !NO_COPY_BOXES sna->render.copy_boxes = gen6_render_copy_boxes; #endif #if !NO_COPY sna->render.copy = gen6_render_copy; #endif #if !NO_FILL_BOXES sna->render.fill_boxes = gen6_render_fill_boxes; #endif #if !NO_FILL sna->render.fill = gen6_render_fill; #endif #if !NO_FILL_ONE sna->render.fill_one = gen6_render_fill_one; #endif #if !NO_FILL_CLEAR sna->render.clear = gen6_render_clear; #endif sna->render.flush = gen4_render_flush; sna->render.reset = gen6_render_reset; sna->render.fini = gen6_render_fini; sna->render.max_3d_size = GEN6_MAX_SIZE; sna->render.max_3d_pitch = 1 << 18; return sna->render_state.gen6.info->name; } xf86-video-intel-2.99.917/src/sna/xassert.h0000664000175000017500000000320212437074566015154 00000000000000/* * Copyright (c) 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef __XASSERT_H__ #define __XASSERT_H__ /* Rewrap the traditional assert so that we can capture the error message * via Xorg.0.log */ #include #ifndef NDEBUG #include #include "compiler.h" #if XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(1,6,0,0,0) #define xorg_backtrace() #endif #undef assert #define assert(E) do if (unlikely(!(E))) { \ xorg_backtrace(); \ FatalError("%s:%d assertion '%s' failed\n", __func__, __LINE__, #E); \ } while (0) #endif #endif /* __XASSERT_H__ */ xf86-video-intel-2.99.917/src/sna/gen4_render.h0000664000175000017500000023456512400044327015657 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef GEN4_RENDER_H #define GEN4_RENDER_H #define GEN4_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define GEN4_URB_FENCE GEN4_3D(0, 0, 0) #define GEN4_CS_URB_STATE GEN4_3D(0, 0, 1) #define GEN4_CONSTANT_BUFFER GEN4_3D(0, 0, 2) #define GEN4_STATE_PREFETCH GEN4_3D(0, 0, 3) #define GEN4_STATE_BASE_ADDRESS GEN4_3D(0, 1, 1) #define GEN4_STATE_SIP GEN4_3D(0, 1, 2) #define GEN4_PIPELINE_SELECT GEN4_3D(0, 1, 4) #define NEW_PIPELINE_SELECT GEN4_3D(1, 1, 4) #define GEN4_MEDIA_STATE_POINTERS GEN4_3D(2, 0, 0) #define GEN4_MEDIA_OBJECT GEN4_3D(2, 1, 0) #define GEN4_3DSTATE_PIPELINED_POINTERS GEN4_3D(3, 0, 0) #define GEN4_3DSTATE_BINDING_TABLE_POINTERS GEN4_3D(3, 0, 1) #define GEN4_3DSTATE_VERTEX_BUFFERS GEN4_3D(3, 0, 8) #define GEN4_3DSTATE_VERTEX_ELEMENTS GEN4_3D(3, 0, 9) #define GEN4_3DSTATE_INDEX_BUFFER GEN4_3D(3, 0, 0xa) #define GEN4_3DSTATE_VF_STATISTICS GEN4_3D(3, 0, 0xb) #define GEN4_3DSTATE_DRAWING_RECTANGLE GEN4_3D(3, 1, 0) #define GEN4_3DSTATE_CONSTANT_COLOR GEN4_3D(3, 1, 1) #define GEN4_3DSTATE_SAMPLER_PALETTE_LOAD GEN4_3D(3, 1, 2) #define GEN4_3DSTATE_CHROMA_KEY GEN4_3D(3, 1, 4) #define GEN4_3DSTATE_DEPTH_BUFFER GEN4_3D(3, 1, 5) # define GEN4_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 # define GEN4_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 #define GEN4_3DSTATE_POLY_STIPPLE_OFFSET GEN4_3D(3, 1, 6) #define GEN4_3DSTATE_POLY_STIPPLE_PATTERN GEN4_3D(3, 1, 7) #define GEN4_3DSTATE_LINE_STIPPLE GEN4_3D(3, 1, 8) #define GEN4_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN4_3D(3, 1, 9) /* These two are BLC and CTG only, not BW or CL */ #define GEN4_3DSTATE_AA_LINE_PARAMS GEN4_3D(3, 1, 0xa) #define GEN4_3DSTATE_GS_SVB_INDEX GEN4_3D(3, 1, 0xb) #define GEN4_PIPE_CONTROL GEN4_3D(3, 2, 0) #define GEN4_3DPRIMITIVE GEN4_3D(3, 3, 0) #define GEN4_3DSTATE_CLEAR_PARAMS GEN4_3D(3, 1, 0x10) /* DW1 */ # define GEN4_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) #define PIPELINE_SELECT_3D 0 #define PIPELINE_SELECT_MEDIA 1 #define UF0_CS_REALLOC (1 << 13) #define UF0_VFE_REALLOC (1 << 12) #define UF0_SF_REALLOC (1 << 11) #define UF0_CLIP_REALLOC (1 << 10) #define UF0_GS_REALLOC (1 << 9) #define UF0_VS_REALLOC (1 << 8) #define UF1_CLIP_FENCE_SHIFT 20 #define UF1_GS_FENCE_SHIFT 10 #define UF1_VS_FENCE_SHIFT 0 #define UF2_CS_FENCE_SHIFT 20 #define UF2_VFE_FENCE_SHIFT 10 #define UF2_SF_FENCE_SHIFT 0 /* for GEN4_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) /* for GEN4_3DSTATE_PIPELINED_POINTERS */ #define GEN4_GS_DISABLE 0 #define GEN4_GS_ENABLE 1 #define GEN4_CLIP_DISABLE 0 #define GEN4_CLIP_ENABLE 1 /* for GEN4_PIPE_CONTROL */ #define GEN4_PIPE_CONTROL_NOWRITE (0 << 14) #define GEN4_PIPE_CONTROL_WRITE_QWORD (1 << 14) #define GEN4_PIPE_CONTROL_WRITE_DEPTH (2 << 14) #define GEN4_PIPE_CONTROL_WRITE_TIME (3 << 14) #define GEN4_PIPE_CONTROL_DEPTH_STALL (1 << 13) #define GEN4_PIPE_CONTROL_WC_FLUSH (1 << 12) #define GEN4_PIPE_CONTROL_IS_FLUSH (1 << 11) #define GEN4_PIPE_CONTROL_TC_FLUSH (1 << 10) /* ctg+ */ #define GEN4_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) #define GEN4_PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define GEN4_PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define GEN4_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) /* VERTEX_BUFFER_STATE Structure */ #define VB0_BUFFER_INDEX_SHIFT 27 #define VB0_VERTEXDATA (0 << 26) #define VB0_INSTANCEDATA (1 << 26) #define VB0_BUFFER_PITCH_SHIFT 0 /* VERTEX_ELEMENT_STATE Structure */ #define VE0_VERTEX_BUFFER_INDEX_SHIFT 27 #define VE0_VALID (1 << 26) #define VE0_FORMAT_SHIFT 16 #define VE0_OFFSET_SHIFT 0 #define VE1_VFCOMPONENT_0_SHIFT 28 #define VE1_VFCOMPONENT_1_SHIFT 24 #define VE1_VFCOMPONENT_2_SHIFT 20 #define VE1_VFCOMPONENT_3_SHIFT 16 #define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 /* 3DPRIMITIVE bits */ #define GEN4_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) #define GEN4_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) /* Primitive types are in gen4_defines.h */ #define GEN4_3DPRIMITIVE_TOPOLOGY_SHIFT 10 #define GEN4_SVG_CTL 0x7400 #define GEN4_SVG_CTL_GS_BA (0 << 8) #define GEN4_SVG_CTL_SS_BA (1 << 8) #define GEN4_SVG_CTL_IO_BA (2 << 8) #define GEN4_SVG_CTL_GS_AUB (3 << 8) #define GEN4_SVG_CTL_IO_AUB (4 << 8) #define GEN4_SVG_CTL_SIP (5 << 8) #define GEN4_SVG_RDATA 0x7404 #define GEN4_SVG_WORK_CTL 0x7408 #define GEN4_VF_CTL 0x7500 #define GEN4_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN4_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) #define GEN4_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) #define GEN4_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) #define GEN4_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) #define GEN4_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) #define GEN4_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) #define GEN4_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) #define GEN4_VF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN4_VF_STRG_VAL 0x7504 #define GEN4_VF_STR_VL_OVR 0x7508 #define GEN4_VF_VC_OVR 0x750c #define GEN4_VF_STR_PSKIP 0x7510 #define GEN4_VF_MAX_PRIM 0x7514 #define GEN4_VF_RDATA 0x7518 #define GEN4_VS_CTL 0x7600 #define GEN4_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN4_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) #define GEN4_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) #define GEN4_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) #define GEN4_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) #define GEN4_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN4_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN4_VS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN4_VS_STRG_VAL 0x7604 #define GEN4_VS_RDATA 0x7608 #define GEN4_SF_CTL 0x7b00 #define GEN4_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN4_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) #define GEN4_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) #define GEN4_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) #define GEN4_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) #define GEN4_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) #define GEN4_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) #define GEN4_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) #define GEN4_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) #define GEN4_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) #define GEN4_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) #define GEN4_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN4_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN4_SF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN4_SF_STRG_VAL 0x7b04 #define GEN4_SF_RDATA 0x7b18 #define GEN4_WIZ_CTL 0x7c00 #define GEN4_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN4_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 #define GEN4_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) #define GEN4_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) #define GEN4_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) #define GEN4_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) #define GEN4_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) #define GEN4_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) #define GEN4_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) #define GEN4_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN4_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN4_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN4_WIZ_STRG_VAL 0x7c04 #define GEN4_WIZ_RDATA 0x7c18 #define GEN4_TS_CTL 0x7e00 #define GEN4_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN4_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) #define GEN4_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) #define GEN4_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) #define GEN4_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) #define GEN4_TS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN4_TS_STRG_VAL 0x7e04 #define GEN4_TS_RDATA 0x7e08 #define GEN4_TD_CTL 0x8000 #define GEN4_TD_CTL_MUX_SHIFT 8 #define GEN4_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define GEN4_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) #define GEN4_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) #define GEN4_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) #define GEN4_TD_CTL_BREAKPOINT_ENABLE (1 << 2) #define GEN4_TD_CTL2 0x8004 #define GEN4_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) #define GEN4_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) #define GEN4_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) #define GEN4_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 #define GEN4_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) #define GEN4_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) #define GEN4_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) #define GEN4_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) #define GEN4_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) #define GEN4_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) #define GEN4_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) #define GEN4_TD_VF_VS_EMSK 0x8008 #define GEN4_TD_GS_EMSK 0x800c #define GEN4_TD_CLIP_EMSK 0x8010 #define GEN4_TD_SF_EMSK 0x8014 #define GEN4_TD_WIZ_EMSK 0x8018 #define GEN4_TD_0_6_EHTRG_VAL 0x801c #define GEN4_TD_0_7_EHTRG_VAL 0x8020 #define GEN4_TD_0_6_EHTRG_MSK 0x8024 #define GEN4_TD_0_7_EHTRG_MSK 0x8028 #define GEN4_TD_RDATA 0x802c #define GEN4_TD_TS_EMSK 0x8030 #define GEN4_EU_CTL 0x8800 #define GEN4_EU_CTL_SELECT_SHIFT 16 #define GEN4_EU_CTL_DATA_MUX_SHIFT 8 #define GEN4_EU_ATT_0 0x8810 #define GEN4_EU_ATT_1 0x8814 #define GEN4_EU_ATT_DATA_0 0x8820 #define GEN4_EU_ATT_DATA_1 0x8824 #define GEN4_EU_ATT_CLR_0 0x8830 #define GEN4_EU_ATT_CLR_1 0x8834 #define GEN4_EU_RDATA 0x8840 /* 3D state: */ #define _3DOP_3DSTATE_PIPELINED 0x0 #define _3DOP_3DSTATE_NONPIPELINED 0x1 #define _3DOP_3DCONTROL 0x2 #define _3DOP_3DPRIMITIVE 0x3 #define _3DSTATE_PIPELINED_POINTERS 0x00 #define _3DSTATE_BINDING_TABLE_POINTERS 0x01 #define _3DSTATE_VERTEX_BUFFERS 0x08 #define _3DSTATE_VERTEX_ELEMENTS 0x09 #define _3DSTATE_INDEX_BUFFER 0x0A #define _3DSTATE_VF_STATISTICS 0x0B #define _3DSTATE_DRAWING_RECTANGLE 0x00 #define _3DSTATE_CONSTANT_COLOR 0x01 #define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02 #define _3DSTATE_CHROMA_KEY 0x04 #define _3DSTATE_DEPTH_BUFFER 0x05 #define _3DSTATE_POLY_STIPPLE_OFFSET 0x06 #define _3DSTATE_POLY_STIPPLE_PATTERN 0x07 #define _3DSTATE_LINE_STIPPLE 0x08 #define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09 #define _3DCONTROL 0x00 #define _3DPRIMITIVE 0x00 #define _3DPRIM_POINTLIST 0x01 #define _3DPRIM_LINELIST 0x02 #define _3DPRIM_LINESTRIP 0x03 #define _3DPRIM_TRILIST 0x04 #define _3DPRIM_TRISTRIP 0x05 #define _3DPRIM_TRIFAN 0x06 #define _3DPRIM_QUADLIST 0x07 #define _3DPRIM_QUADSTRIP 0x08 #define _3DPRIM_LINELIST_ADJ 0x09 #define _3DPRIM_LINESTRIP_ADJ 0x0A #define _3DPRIM_TRILIST_ADJ 0x0B #define _3DPRIM_TRISTRIP_ADJ 0x0C #define _3DPRIM_TRISTRIP_REVERSE 0x0D #define _3DPRIM_POLYGON 0x0E #define _3DPRIM_RECTLIST 0x0F #define _3DPRIM_LINELOOP 0x10 #define _3DPRIM_POINTLIST_BF 0x11 #define _3DPRIM_LINESTRIP_CONT 0x12 #define _3DPRIM_LINESTRIP_BF 0x13 #define _3DPRIM_LINESTRIP_CONT_BF 0x14 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 #define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 #define GEN4_ANISORATIO_2 0 #define GEN4_ANISORATIO_4 1 #define GEN4_ANISORATIO_6 2 #define GEN4_ANISORATIO_8 3 #define GEN4_ANISORATIO_10 4 #define GEN4_ANISORATIO_12 5 #define GEN4_ANISORATIO_14 6 #define GEN4_ANISORATIO_16 7 #define GEN4_BLENDFACTOR_ONE 0x1 #define GEN4_BLENDFACTOR_SRC_COLOR 0x2 #define GEN4_BLENDFACTOR_SRC_ALPHA 0x3 #define GEN4_BLENDFACTOR_DST_ALPHA 0x4 #define GEN4_BLENDFACTOR_DST_COLOR 0x5 #define GEN4_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 #define GEN4_BLENDFACTOR_CONST_COLOR 0x7 #define GEN4_BLENDFACTOR_CONST_ALPHA 0x8 #define GEN4_BLENDFACTOR_SRC1_COLOR 0x9 #define GEN4_BLENDFACTOR_SRC1_ALPHA 0x0A #define GEN4_BLENDFACTOR_ZERO 0x11 #define GEN4_BLENDFACTOR_INV_SRC_COLOR 0x12 #define GEN4_BLENDFACTOR_INV_SRC_ALPHA 0x13 #define GEN4_BLENDFACTOR_INV_DST_ALPHA 0x14 #define GEN4_BLENDFACTOR_INV_DST_COLOR 0x15 #define GEN4_BLENDFACTOR_INV_CONST_COLOR 0x17 #define GEN4_BLENDFACTOR_INV_CONST_ALPHA 0x18 #define GEN4_BLENDFACTOR_INV_SRC1_COLOR 0x19 #define GEN4_BLENDFACTOR_INV_SRC1_ALPHA 0x1A #define GEN4_BLENDFUNCTION_ADD 0 #define GEN4_BLENDFUNCTION_SUBTRACT 1 #define GEN4_BLENDFUNCTION_REVERSE_SUBTRACT 2 #define GEN4_BLENDFUNCTION_MIN 3 #define GEN4_BLENDFUNCTION_MAX 4 #define GEN4_ALPHATEST_FORMAT_UNORM8 0 #define GEN4_ALPHATEST_FORMAT_FLOAT32 1 #define GEN4_CHROMAKEY_KILL_ON_ANY_MATCH 0 #define GEN4_CHROMAKEY_REPLACE_BLACK 1 #define GEN4_CLIP_API_OGL 0 #define GEN4_CLIP_API_DX 1 #define GEN4_CLIPMODE_NORMAL 0 #define GEN4_CLIPMODE_CLIP_ALL 1 #define GEN4_CLIPMODE_CLIP_NON_REJECTED 2 #define GEN4_CLIPMODE_REJECT_ALL 3 #define GEN4_CLIPMODE_ACCEPT_ALL 4 #define GEN4_CLIP_NDCSPACE 0 #define GEN4_CLIP_SCREENSPACE 1 #define GEN4_COMPAREFUNCTION_ALWAYS 0 #define GEN4_COMPAREFUNCTION_NEVER 1 #define GEN4_COMPAREFUNCTION_LESS 2 #define GEN4_COMPAREFUNCTION_EQUAL 3 #define GEN4_COMPAREFUNCTION_LEQUAL 4 #define GEN4_COMPAREFUNCTION_GREATER 5 #define GEN4_COMPAREFUNCTION_NOTEQUAL 6 #define GEN4_COMPAREFUNCTION_GEQUAL 7 #define GEN4_COVERAGE_PIXELS_HALF 0 #define GEN4_COVERAGE_PIXELS_1 1 #define GEN4_COVERAGE_PIXELS_2 2 #define GEN4_COVERAGE_PIXELS_4 3 #define GEN4_CULLMODE_BOTH 0 #define GEN4_CULLMODE_NONE 1 #define GEN4_CULLMODE_FRONT 2 #define GEN4_CULLMODE_BACK 3 #define GEN4_DEFAULTCOLOR_R8G8B8A8_UNORM 0 #define GEN4_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 #define GEN4_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 #define GEN4_DEPTHFORMAT_D32_FLOAT 1 #define GEN4_DEPTHFORMAT_D24_UNORM_S8_UINT 2 #define GEN4_DEPTHFORMAT_D16_UNORM 5 #define GEN4_FLOATING_POINT_IEEE_754 0 #define GEN4_FLOATING_POINT_NON_IEEE_754 1 #define GEN4_FRONTWINDING_CW 0 #define GEN4_FRONTWINDING_CCW 1 #define GEN4_INDEX_BYTE 0 #define GEN4_INDEX_WORD 1 #define GEN4_INDEX_DWORD 2 #define GEN4_LOGICOPFUNCTION_CLEAR 0 #define GEN4_LOGICOPFUNCTION_NOR 1 #define GEN4_LOGICOPFUNCTION_AND_INVERTED 2 #define GEN4_LOGICOPFUNCTION_COPY_INVERTED 3 #define GEN4_LOGICOPFUNCTION_AND_REVERSE 4 #define GEN4_LOGICOPFUNCTION_INVERT 5 #define GEN4_LOGICOPFUNCTION_XOR 6 #define GEN4_LOGICOPFUNCTION_NAND 7 #define GEN4_LOGICOPFUNCTION_AND 8 #define GEN4_LOGICOPFUNCTION_EQUIV 9 #define GEN4_LOGICOPFUNCTION_NOOP 10 #define GEN4_LOGICOPFUNCTION_OR_INVERTED 11 #define GEN4_LOGICOPFUNCTION_COPY 12 #define GEN4_LOGICOPFUNCTION_OR_REVERSE 13 #define GEN4_LOGICOPFUNCTION_OR 14 #define GEN4_LOGICOPFUNCTION_SET 15 #define GEN4_MAPFILTER_NEAREST 0x0 #define GEN4_MAPFILTER_LINEAR 0x1 #define GEN4_MAPFILTER_ANISOTROPIC 0x2 #define GEN4_MIPFILTER_NONE 0 #define GEN4_MIPFILTER_NEAREST 1 #define GEN4_MIPFILTER_LINEAR 3 #define GEN4_POLYGON_FRONT_FACING 0 #define GEN4_POLYGON_BACK_FACING 1 #define GEN4_PREFILTER_ALWAYS 0x0 #define GEN4_PREFILTER_NEVER 0x1 #define GEN4_PREFILTER_LESS 0x2 #define GEN4_PREFILTER_EQUAL 0x3 #define GEN4_PREFILTER_LEQUAL 0x4 #define GEN4_PREFILTER_GREATER 0x5 #define GEN4_PREFILTER_NOTEQUAL 0x6 #define GEN4_PREFILTER_GEQUAL 0x7 #define GEN4_PROVOKING_VERTEX_0 0 #define GEN4_PROVOKING_VERTEX_1 1 #define GEN4_PROVOKING_VERTEX_2 2 #define GEN4_RASTRULE_UPPER_LEFT 0 #define GEN4_RASTRULE_UPPER_RIGHT 1 #define GEN4_RENDERTARGET_CLAMPRANGE_UNORM 0 #define GEN4_RENDERTARGET_CLAMPRANGE_SNORM 1 #define GEN4_RENDERTARGET_CLAMPRANGE_FORMAT 2 #define GEN4_STENCILOP_KEEP 0 #define GEN4_STENCILOP_ZERO 1 #define GEN4_STENCILOP_REPLACE 2 #define GEN4_STENCILOP_INCRSAT 3 #define GEN4_STENCILOP_DECRSAT 4 #define GEN4_STENCILOP_INCR 5 #define GEN4_STENCILOP_DECR 6 #define GEN4_STENCILOP_INVERT 7 #define GEN4_SURFACE_MIPMAPLAYOUT_BELOW 0 #define GEN4_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define GEN4_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define GEN4_SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define GEN4_SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define GEN4_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define GEN4_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define GEN4_SURFACEFORMAT_R64G64_FLOAT 0x005 #define GEN4_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define GEN4_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define GEN4_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define GEN4_SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define GEN4_SURFACEFORMAT_R32G32B32_SINT 0x041 #define GEN4_SURFACEFORMAT_R32G32B32_UINT 0x042 #define GEN4_SURFACEFORMAT_R32G32B32_UNORM 0x043 #define GEN4_SURFACEFORMAT_R32G32B32_SNORM 0x044 #define GEN4_SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define GEN4_SURFACEFORMAT_R32G32B32_USCALED 0x046 #define GEN4_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define GEN4_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define GEN4_SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define GEN4_SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define GEN4_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define GEN4_SURFACEFORMAT_R32G32_FLOAT 0x085 #define GEN4_SURFACEFORMAT_R32G32_SINT 0x086 #define GEN4_SURFACEFORMAT_R32G32_UINT 0x087 #define GEN4_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define GEN4_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define GEN4_SURFACEFORMAT_L32A32_FLOAT 0x08A #define GEN4_SURFACEFORMAT_R32G32_UNORM 0x08B #define GEN4_SURFACEFORMAT_R32G32_SNORM 0x08C #define GEN4_SURFACEFORMAT_R64_FLOAT 0x08D #define GEN4_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define GEN4_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define GEN4_SURFACEFORMAT_A32X32_FLOAT 0x090 #define GEN4_SURFACEFORMAT_L32X32_FLOAT 0x091 #define GEN4_SURFACEFORMAT_I32X32_FLOAT 0x092 #define GEN4_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define GEN4_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define GEN4_SURFACEFORMAT_R32G32_SSCALED 0x095 #define GEN4_SURFACEFORMAT_R32G32_USCALED 0x096 #define GEN4_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define GEN4_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define GEN4_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define GEN4_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define GEN4_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define GEN4_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define GEN4_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define GEN4_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define GEN4_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define GEN4_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define GEN4_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define GEN4_SURFACEFORMAT_R16G16_UNORM 0x0CC #define GEN4_SURFACEFORMAT_R16G16_SNORM 0x0CD #define GEN4_SURFACEFORMAT_R16G16_SINT 0x0CE #define GEN4_SURFACEFORMAT_R16G16_UINT 0x0CF #define GEN4_SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define GEN4_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define GEN4_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define GEN4_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define GEN4_SURFACEFORMAT_R32_SINT 0x0D6 #define GEN4_SURFACEFORMAT_R32_UINT 0x0D7 #define GEN4_SURFACEFORMAT_R32_FLOAT 0x0D8 #define GEN4_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define GEN4_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define GEN4_SURFACEFORMAT_L16A16_UNORM 0x0DF #define GEN4_SURFACEFORMAT_I24X8_UNORM 0x0E0 #define GEN4_SURFACEFORMAT_L24X8_UNORM 0x0E1 #define GEN4_SURFACEFORMAT_A24X8_UNORM 0x0E2 #define GEN4_SURFACEFORMAT_I32_FLOAT 0x0E3 #define GEN4_SURFACEFORMAT_L32_FLOAT 0x0E4 #define GEN4_SURFACEFORMAT_A32_FLOAT 0x0E5 #define GEN4_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define GEN4_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define GEN4_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define GEN4_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define GEN4_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define GEN4_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define GEN4_SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define GEN4_SURFACEFORMAT_R32_UNORM 0x0F1 #define GEN4_SURFACEFORMAT_R32_SNORM 0x0F2 #define GEN4_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define GEN4_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define GEN4_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define GEN4_SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define GEN4_SURFACEFORMAT_R16G16_USCALED 0x0F7 #define GEN4_SURFACEFORMAT_R32_SSCALED 0x0F8 #define GEN4_SURFACEFORMAT_R32_USCALED 0x0F9 #define GEN4_SURFACEFORMAT_B5G6R5_UNORM 0x100 #define GEN4_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define GEN4_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define GEN4_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define GEN4_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define GEN4_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define GEN4_SURFACEFORMAT_R8G8_UNORM 0x106 #define GEN4_SURFACEFORMAT_R8G8_SNORM 0x107 #define GEN4_SURFACEFORMAT_R8G8_SINT 0x108 #define GEN4_SURFACEFORMAT_R8G8_UINT 0x109 #define GEN4_SURFACEFORMAT_R16_UNORM 0x10A #define GEN4_SURFACEFORMAT_R16_SNORM 0x10B #define GEN4_SURFACEFORMAT_R16_SINT 0x10C #define GEN4_SURFACEFORMAT_R16_UINT 0x10D #define GEN4_SURFACEFORMAT_R16_FLOAT 0x10E #define GEN4_SURFACEFORMAT_I16_UNORM 0x111 #define GEN4_SURFACEFORMAT_L16_UNORM 0x112 #define GEN4_SURFACEFORMAT_A16_UNORM 0x113 #define GEN4_SURFACEFORMAT_L8A8_UNORM 0x114 #define GEN4_SURFACEFORMAT_I16_FLOAT 0x115 #define GEN4_SURFACEFORMAT_L16_FLOAT 0x116 #define GEN4_SURFACEFORMAT_A16_FLOAT 0x117 #define GEN4_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define GEN4_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define GEN4_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define GEN4_SURFACEFORMAT_R8G8_SSCALED 0x11C #define GEN4_SURFACEFORMAT_R8G8_USCALED 0x11D #define GEN4_SURFACEFORMAT_R16_SSCALED 0x11E #define GEN4_SURFACEFORMAT_R16_USCALED 0x11F #define GEN4_SURFACEFORMAT_R8_UNORM 0x140 #define GEN4_SURFACEFORMAT_R8_SNORM 0x141 #define GEN4_SURFACEFORMAT_R8_SINT 0x142 #define GEN4_SURFACEFORMAT_R8_UINT 0x143 #define GEN4_SURFACEFORMAT_A8_UNORM 0x144 #define GEN4_SURFACEFORMAT_I8_UNORM 0x145 #define GEN4_SURFACEFORMAT_L8_UNORM 0x146 #define GEN4_SURFACEFORMAT_P4A4_UNORM 0x147 #define GEN4_SURFACEFORMAT_A4P4_UNORM 0x148 #define GEN4_SURFACEFORMAT_R8_SSCALED 0x149 #define GEN4_SURFACEFORMAT_R8_USCALED 0x14A #define GEN4_SURFACEFORMAT_R1_UINT 0x181 #define GEN4_SURFACEFORMAT_YCRCB_NORMAL 0x182 #define GEN4_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define GEN4_SURFACEFORMAT_BC1_UNORM 0x186 #define GEN4_SURFACEFORMAT_BC2_UNORM 0x187 #define GEN4_SURFACEFORMAT_BC3_UNORM 0x188 #define GEN4_SURFACEFORMAT_BC4_UNORM 0x189 #define GEN4_SURFACEFORMAT_BC5_UNORM 0x18A #define GEN4_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define GEN4_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define GEN4_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define GEN4_SURFACEFORMAT_MONO8 0x18E #define GEN4_SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define GEN4_SURFACEFORMAT_YCRCB_SWAPY 0x190 #define GEN4_SURFACEFORMAT_DXT1_RGB 0x191 #define GEN4_SURFACEFORMAT_FXT1 0x192 #define GEN4_SURFACEFORMAT_R8G8B8_UNORM 0x193 #define GEN4_SURFACEFORMAT_R8G8B8_SNORM 0x194 #define GEN4_SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define GEN4_SURFACEFORMAT_R8G8B8_USCALED 0x196 #define GEN4_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define GEN4_SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define GEN4_SURFACEFORMAT_BC4_SNORM 0x199 #define GEN4_SURFACEFORMAT_BC5_SNORM 0x19A #define GEN4_SURFACEFORMAT_R16G16B16_UNORM 0x19C #define GEN4_SURFACEFORMAT_R16G16B16_SNORM 0x19D #define GEN4_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define GEN4_SURFACEFORMAT_R16G16B16_USCALED 0x19F #define GEN4_SURFACERETURNFORMAT_FLOAT32 0 #define GEN4_SURFACERETURNFORMAT_S1 1 #define GEN4_SURFACE_1D 0 #define GEN4_SURFACE_2D 1 #define GEN4_SURFACE_3D 2 #define GEN4_SURFACE_CUBE 3 #define GEN4_SURFACE_BUFFER 4 #define GEN4_SURFACE_NULL 7 #define GEN4_BORDER_COLOR_MODE_DEFAULT 0 #define GEN4_BORDER_COLOR_MODE_LEGACY 1 #define GEN4_TEXCOORDMODE_WRAP 0 #define GEN4_TEXCOORDMODE_MIRROR 1 #define GEN4_TEXCOORDMODE_CLAMP 2 #define GEN4_TEXCOORDMODE_CUBE 3 #define GEN4_TEXCOORDMODE_CLAMP_BORDER 4 #define GEN4_TEXCOORDMODE_MIRROR_ONCE 5 #define GEN4_THREAD_PRIORITY_NORMAL 0 #define GEN4_THREAD_PRIORITY_HIGH 1 #define GEN4_TILEWALK_XMAJOR 0 #define GEN4_TILEWALK_YMAJOR 1 #define GEN4_VERTEX_SUBPIXEL_PRECISION_8BITS 0 #define GEN4_VERTEX_SUBPIXEL_PRECISION_4BITS 1 #define GEN4_VERTEXBUFFER_ACCESS_VERTEXDATA 0 #define GEN4_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 #define VFCOMPONENT_NOSTORE 0 #define VFCOMPONENT_STORE_SRC 1 #define VFCOMPONENT_STORE_0 2 #define VFCOMPONENT_STORE_1_FLT 3 #define VFCOMPONENT_STORE_1_INT 4 #define VFCOMPONENT_STORE_VID 5 #define VFCOMPONENT_STORE_IID 6 #define VFCOMPONENT_STORE_PID 7 /* Execution Unit (EU) defines */ #define GEN4_ALIGN_1 0 #define GEN4_ALIGN_16 1 #define GEN4_ADDRESS_DIRECT 0 #define GEN4_ADDRESS_REGISTER_INDIRECT_REGISTER 1 #define GEN4_CHANNEL_X 0 #define GEN4_CHANNEL_Y 1 #define GEN4_CHANNEL_Z 2 #define GEN4_CHANNEL_W 3 #define GEN4_COMPRESSION_NONE 0 #define GEN4_COMPRESSION_2NDHALF 1 #define GEN4_COMPRESSION_COMPRESSED 2 #define GEN4_CONDITIONAL_NONE 0 #define GEN4_CONDITIONAL_Z 1 #define GEN4_CONDITIONAL_NZ 2 #define GEN4_CONDITIONAL_EQ 1 /* Z */ #define GEN4_CONDITIONAL_NEQ 2 /* NZ */ #define GEN4_CONDITIONAL_G 3 #define GEN4_CONDITIONAL_GE 4 #define GEN4_CONDITIONAL_L 5 #define GEN4_CONDITIONAL_LE 6 #define GEN4_CONDITIONAL_C 7 #define GEN4_CONDITIONAL_O 8 #define GEN4_DEBUG_NONE 0 #define GEN4_DEBUG_BREAKPOINT 1 #define GEN4_DEPENDENCY_NORMAL 0 #define GEN4_DEPENDENCY_NOTCLEARED 1 #define GEN4_DEPENDENCY_NOTCHECKED 2 #define GEN4_DEPENDENCY_DISABLE 3 #define GEN4_EXECUTE_1 0 #define GEN4_EXECUTE_2 1 #define GEN4_EXECUTE_4 2 #define GEN4_EXECUTE_8 3 #define GEN4_EXECUTE_16 4 #define GEN4_EXECUTE_32 5 #define GEN4_HORIZONTAL_STRIDE_0 0 #define GEN4_HORIZONTAL_STRIDE_1 1 #define GEN4_HORIZONTAL_STRIDE_2 2 #define GEN4_HORIZONTAL_STRIDE_4 3 #define GEN4_INSTRUCTION_NORMAL 0 #define GEN4_INSTRUCTION_SATURATE 1 #define _MASK_ENABLE 0 #define _MASK_DISABLE 1 #define GEN4_OPCODE_MOV 1 #define GEN4_OPCODE_SEL 2 #define GEN4_OPCODE_NOT 4 #define GEN4_OPCODE_AND 5 #define GEN4_OPCODE_OR 6 #define GEN4_OPCODE_XOR 7 #define GEN4_OPCODE_SHR 8 #define GEN4_OPCODE_SHL 9 #define GEN4_OPCODE_RSR 10 #define GEN4_OPCODE_RSL 11 #define GEN4_OPCODE_ASR 12 #define GEN4_OPCODE_CMP 16 #define GEN4_OPCODE_JMPI 32 #define GEN4_OPCODE_IF 34 #define GEN4_OPCODE_IFF 35 #define GEN4_OPCODE_ELSE 36 #define GEN4_OPCODE_ENDIF 37 #define GEN4_OPCODE_DO 38 #define GEN4_OPCODE_WHILE 39 #define GEN4_OPCODE_BREAK 40 #define GEN4_OPCODE_CONTINUE 41 #define GEN4_OPCODE_HALT 42 #define GEN4_OPCODE_MSAVE 44 #define GEN4_OPCODE_MRESTORE 45 #define GEN4_OPCODE_PUSH 46 #define GEN4_OPCODE_POP 47 #define GEN4_OPCODE_WAIT 48 #define GEN4_OPCODE_SEND 49 #define GEN4_OPCODE_ADD 64 #define GEN4_OPCODE_MUL 65 #define GEN4_OPCODE_AVG 66 #define GEN4_OPCODE_FRC 67 #define GEN4_OPCODE_RNDU 68 #define GEN4_OPCODE_RNDD 69 #define GEN4_OPCODE_RNDE 70 #define GEN4_OPCODE_RNDZ 71 #define GEN4_OPCODE_MAC 72 #define GEN4_OPCODE_MACH 73 #define GEN4_OPCODE_LZD 74 #define GEN4_OPCODE_SAD2 80 #define GEN4_OPCODE_SADA2 81 #define GEN4_OPCODE_DP4 84 #define GEN4_OPCODE_DPH 85 #define GEN4_OPCODE_DP3 86 #define GEN4_OPCODE_DP2 87 #define GEN4_OPCODE_DPA2 88 #define GEN4_OPCODE_LINE 89 #define GEN4_OPCODE_NOP 126 #define GEN4_PREDICATE_NONE 0 #define GEN4_PREDICATE_NORMAL 1 #define GEN4_PREDICATE_ALIGN1_ANYV 2 #define GEN4_PREDICATE_ALIGN1_ALLV 3 #define GEN4_PREDICATE_ALIGN1_ANY2H 4 #define GEN4_PREDICATE_ALIGN1_ALL2H 5 #define GEN4_PREDICATE_ALIGN1_ANY4H 6 #define GEN4_PREDICATE_ALIGN1_ALL4H 7 #define GEN4_PREDICATE_ALIGN1_ANY8H 8 #define GEN4_PREDICATE_ALIGN1_ALL8H 9 #define GEN4_PREDICATE_ALIGN1_ANY16H 10 #define GEN4_PREDICATE_ALIGN1_ALL16H 11 #define GEN4_PREDICATE_ALIGN16_REPLICATE_X 2 #define GEN4_PREDICATE_ALIGN16_REPLICATE_Y 3 #define GEN4_PREDICATE_ALIGN16_REPLICATE_Z 4 #define GEN4_PREDICATE_ALIGN16_REPLICATE_W 5 #define GEN4_PREDICATE_ALIGN16_ANY4H 6 #define GEN4_PREDICATE_ALIGN16_ALL4H 7 #define GEN4_ARCHITECTURE_REGISTER_FILE 0 #define GEN4_GENERAL_REGISTER_FILE 1 #define GEN4_MESSAGE_REGISTER_FILE 2 #define GEN4_IMMEDIATE_VALUE 3 #define GEN4_REGISTER_TYPE_UD 0 #define GEN4_REGISTER_TYPE_D 1 #define GEN4_REGISTER_TYPE_UW 2 #define GEN4_REGISTER_TYPE_W 3 #define GEN4_REGISTER_TYPE_UB 4 #define GEN4_REGISTER_TYPE_B 5 #define GEN4_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ #define GEN4_REGISTER_TYPE_HF 6 #define GEN4_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ #define GEN4_REGISTER_TYPE_F 7 #define GEN4_ARF_NULL 0x00 #define GEN4_ARF_ADDRESS 0x10 #define GEN4_ARF_ACCUMULATOR 0x20 #define GEN4_ARF_FLAG 0x30 #define GEN4_ARF_MASK 0x40 #define GEN4_ARF_MASK_STACK 0x50 #define GEN4_ARF_MASK_STACK_DEPTH 0x60 #define GEN4_ARF_STATE 0x70 #define GEN4_ARF_CONTROL 0x80 #define GEN4_ARF_NOTIFICATION_COUNT 0x90 #define GEN4_ARF_IP 0xA0 #define GEN4_AMASK 0 #define GEN4_IMASK 1 #define GEN4_LMASK 2 #define GEN4_CMASK 3 #define GEN4_THREAD_NORMAL 0 #define GEN4_THREAD_ATOMIC 1 #define GEN4_THREAD_SWITCH 2 #define GEN4_VERTICAL_STRIDE_0 0 #define GEN4_VERTICAL_STRIDE_1 1 #define GEN4_VERTICAL_STRIDE_2 2 #define GEN4_VERTICAL_STRIDE_4 3 #define GEN4_VERTICAL_STRIDE_8 4 #define GEN4_VERTICAL_STRIDE_16 5 #define GEN4_VERTICAL_STRIDE_32 6 #define GEN4_VERTICAL_STRIDE_64 7 #define GEN4_VERTICAL_STRIDE_128 8 #define GEN4_VERTICAL_STRIDE_256 9 #define GEN4_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF #define GEN4_WIDTH_1 0 #define GEN4_WIDTH_2 1 #define GEN4_WIDTH_4 2 #define GEN4_WIDTH_8 3 #define GEN4_WIDTH_16 4 #define GEN4_STATELESS_BUFFER_BOUNDARY_1K 0 #define GEN4_STATELESS_BUFFER_BOUNDARY_2K 1 #define GEN4_STATELESS_BUFFER_BOUNDARY_4K 2 #define GEN4_STATELESS_BUFFER_BOUNDARY_8K 3 #define GEN4_STATELESS_BUFFER_BOUNDARY_16K 4 #define GEN4_STATELESS_BUFFER_BOUNDARY_32K 5 #define GEN4_STATELESS_BUFFER_BOUNDARY_64K 6 #define GEN4_STATELESS_BUFFER_BOUNDARY_128K 7 #define GEN4_STATELESS_BUFFER_BOUNDARY_256K 8 #define GEN4_STATELESS_BUFFER_BOUNDARY_512K 9 #define GEN4_STATELESS_BUFFER_BOUNDARY_1M 10 #define GEN4_STATELESS_BUFFER_BOUNDARY_2M 11 #define GEN4_POLYGON_FACING_FRONT 0 #define GEN4_POLYGON_FACING_BACK 1 #define GEN4_MESSAGE_TARGET_NULL 0 #define GEN4_MESSAGE_TARGET_MATH 1 #define GEN4_MESSAGE_TARGET_SAMPLER 2 #define GEN4_MESSAGE_TARGET_GATEWAY 3 #define GEN4_MESSAGE_TARGET_DATAPORT_READ 4 #define GEN4_MESSAGE_TARGET_DATAPORT_WRITE 5 #define GEN4_MESSAGE_TARGET_URB 6 #define GEN4_MESSAGE_TARGET_THREAD_SPAWNER 7 #define GEN4_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define GEN4_SAMPLER_RETURN_FORMAT_UINT32 2 #define GEN4_SAMPLER_RETURN_FORMAT_SINT32 3 #define GEN4_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define GEN4_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define GEN4_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 #define GEN4_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 #define GEN4_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 #define GEN4_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 #define GEN4_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 #define GEN4_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 #define GEN4_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 #define GEN4_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 #define GEN4_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 #define GEN4_SAMPLER_MESSAGE_SIMD8_RESINFO 2 #define GEN4_SAMPLER_MESSAGE_SIMD16_RESINFO 2 #define GEN4_SAMPLER_MESSAGE_SIMD4X2_LD 3 #define GEN4_SAMPLER_MESSAGE_SIMD8_LD 3 #define GEN4_SAMPLER_MESSAGE_SIMD16_LD 3 #define GEN4_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 #define GEN4_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 #define GEN4_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define GEN4_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define GEN4_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define GEN4_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define GEN4_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 #define GEN4_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define GEN4_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 #define GEN4_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 #define GEN4_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 #define GEN4_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2 #define GEN4_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 #define GEN4_DATAPORT_READ_TARGET_DATA_CACHE 0 #define GEN4_DATAPORT_READ_TARGET_RENDER_CACHE 1 #define GEN4_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 #define GEN4_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 #define GEN4_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 #define GEN4_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 #define GEN4_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 #define GEN4_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 #define GEN4_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 #define GEN4_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 #define GEN4_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2 #define GEN4_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 #define GEN4_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 #define GEN4_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 #define GEN4_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 #define GEN4_MATH_FUNCTION_INV 1 #define GEN4_MATH_FUNCTION_LOG 2 #define GEN4_MATH_FUNCTION_EXP 3 #define GEN4_MATH_FUNCTION_SQRT 4 #define GEN4_MATH_FUNCTION_RSQ 5 #define GEN4_MATH_FUNCTION_SIN 6 /* was 7 */ #define GEN4_MATH_FUNCTION_COS 7 /* was 8 */ #define GEN4_MATH_FUNCTION_SINCOS 8 /* was 6 */ #define GEN4_MATH_FUNCTION_TAN 9 #define GEN4_MATH_FUNCTION_POW 10 #define GEN4_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 #define GEN4_MATH_FUNCTION_INT_DIV_QUOTIENT 12 #define GEN4_MATH_FUNCTION_INT_DIV_REMAINDER 13 #define GEN4_MATH_INTEGER_UNSIGNED 0 #define GEN4_MATH_INTEGER_SIGNED 1 #define GEN4_MATH_PRECISION_FULL 0 #define GEN4_MATH_PRECISION_PARTIAL 1 #define GEN4_MATH_SATURATE_NONE 0 #define GEN4_MATH_SATURATE_SATURATE 1 #define GEN4_MATH_DATA_VECTOR 0 #define GEN4_MATH_DATA_SCALAR 1 #define GEN4_URB_OPCODE_WRITE 0 #define GEN4_URB_SWIZZLE_NONE 0 #define GEN4_URB_SWIZZLE_INTERLEAVE 1 #define GEN4_URB_SWIZZLE_TRANSPOSE 2 #define GEN4_SCRATCH_SPACE_SIZE_1K 0 #define GEN4_SCRATCH_SPACE_SIZE_2K 1 #define GEN4_SCRATCH_SPACE_SIZE_4K 2 #define GEN4_SCRATCH_SPACE_SIZE_8K 3 #define GEN4_SCRATCH_SPACE_SIZE_16K 4 #define GEN4_SCRATCH_SPACE_SIZE_32K 5 #define GEN4_SCRATCH_SPACE_SIZE_64K 6 #define GEN4_SCRATCH_SPACE_SIZE_128K 7 #define GEN4_SCRATCH_SPACE_SIZE_256K 8 #define GEN4_SCRATCH_SPACE_SIZE_512K 9 #define GEN4_SCRATCH_SPACE_SIZE_1M 10 #define GEN4_SCRATCH_SPACE_SIZE_2M 11 #define CMD_URB_FENCE 0x6000 #define CMD_CONST_BUFFER_STATE 0x6001 #define CMD_CONST_BUFFER 0x6002 #define CMD_STATE_BASE_ADDRESS 0x6101 #define CMD_STATE_INSN_POINTER 0x6102 #define CMD_PIPELINE_SELECT 0x6104 #define CMD_PIPELINED_STATE_POINTERS 0x7800 #define CMD_BINDING_TABLE_PTRS 0x7801 #define CMD_VERTEX_BUFFER 0x7808 #define CMD_VERTEX_ELEMENT 0x7809 #define CMD_INDEX_BUFFER 0x780a #define CMD_VF_STATISTICS 0x780b #define CMD_DRAW_RECT 0x7900 #define CMD_BLEND_CONSTANT_COLOR 0x7901 #define CMD_CHROMA_KEY 0x7904 #define CMD_DEPTH_BUFFER 0x7905 #define CMD_POLY_STIPPLE_OFFSET 0x7906 #define CMD_POLY_STIPPLE_PATTERN 0x7907 #define CMD_LINE_STIPPLE_PATTERN 0x7908 #define CMD_GLOBAL_DEPTH_OFFSET_CLAMP 0x7908 #define CMD_PIPE_CONTROL 0x7a00 #define CMD_3D_PRIM 0x7b00 #define CMD_MI_FLUSH 0x0200 /* Various values from the R0 vertex header: */ #define R02_PRIM_END 0x1 #define R02_PRIM_START 0x2 /* media pipeline */ #define GEN4_VFE_MODE_GENERIC 0x0 #define GEN4_VFE_MODE_VLD_MPEG2 0x1 #define GEN4_VFE_MODE_IS 0x2 #define GEN4_VFE_MODE_AVC_MC 0x4 #define GEN4_VFE_MODE_AVC_IT 0x7 #define GEN4_VFE_MODE_VC1_IT 0xB #define GEN4_VFE_DEBUG_COUNTER_FREE 0 #define GEN4_VFE_DEBUG_COUNTER_FROZEN 1 #define GEN4_VFE_DEBUG_COUNTER_ONCE 2 #define GEN4_VFE_DEBUG_COUNTER_ALWAYS 3 /* VLD_STATE */ #define GEN4_MPEG_TOP_FIELD 1 #define GEN4_MPEG_BOTTOM_FIELD 2 #define GEN4_MPEG_FRAME 3 #define GEN4_MPEG_QSCALE_LINEAR 0 #define GEN4_MPEG_QSCALE_NONLINEAR 1 #define GEN4_MPEG_ZIGZAG_SCAN 0 #define GEN4_MPEG_ALTER_VERTICAL_SCAN 1 #define GEN4_MPEG_I_PICTURE 1 #define GEN4_MPEG_P_PICTURE 2 #define GEN4_MPEG_B_PICTURE 3 /* Command packets: */ struct header { unsigned int length:16; unsigned int opcode:16; }; union header_union { struct header bits; unsigned int dword; }; struct gen4_3d_control { struct { unsigned int length:8; unsigned int notify_enable:1; unsigned int pad:3; unsigned int wc_flush_enable:1; unsigned int depth_stall_enable:1; unsigned int operation:2; unsigned int opcode:16; } header; struct { unsigned int pad:2; unsigned int dest_addr_type:1; unsigned int dest_addr:29; } dest; unsigned int dword2; unsigned int dword3; }; struct gen4_3d_primitive { struct { unsigned int length:8; unsigned int pad:2; unsigned int topology:5; unsigned int indexed:1; unsigned int opcode:16; } header; unsigned int verts_per_instance; unsigned int start_vert_location; unsigned int instance_count; unsigned int start_instance_location; unsigned int base_vert_location; }; /* These seem to be passed around as function args, so it works out * better to keep them as #defines: */ #define GEN4_FLUSH_READ_CACHE 0x1 #define GEN4_FLUSH_STATE_CACHE 0x2 #define GEN4_INHIBIT_FLUSH_RENDER_CACHE 0x4 #define GEN4_FLUSH_SNAPSHOT_COUNTERS 0x8 struct gen4_mi_flush { unsigned int flags:4; unsigned int pad:12; unsigned int opcode:16; }; struct gen4_vf_statistics { unsigned int statistics_enable:1; unsigned int pad:15; unsigned int opcode:16; }; struct gen4_binding_table_pointers { struct header header; unsigned int vs; unsigned int gs; unsigned int clp; unsigned int sf; unsigned int wm; }; struct gen4_blend_constant_color { struct header header; float blend_constant_color[4]; }; struct gen4_depthbuffer { union header_union header; union { struct { unsigned int pitch:18; unsigned int format:3; unsigned int pad:4; unsigned int depth_offset_disable:1; unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int pad2:1; unsigned int surface_type:3; } bits; unsigned int dword; } dword1; unsigned int dword2_base_addr; union { struct { unsigned int pad:1; unsigned int mipmap_layout:1; unsigned int lod:4; unsigned int width:13; unsigned int height:13; } bits; unsigned int dword; } dword3; union { struct { unsigned int pad:12; unsigned int min_array_element:9; unsigned int depth:11; } bits; unsigned int dword; } dword4; }; struct gen4_drawrect { struct header header; unsigned int xmin:16; unsigned int ymin:16; unsigned int xmax:16; unsigned int ymax:16; unsigned int xorg:16; unsigned int yorg:16; }; struct gen4_global_depth_offset_clamp { struct header header; float depth_offset_clamp; }; struct gen4_indexbuffer { union { struct { unsigned int length:8; unsigned int index_format:2; unsigned int cut_index_enable:1; unsigned int pad:5; unsigned int opcode:16; } bits; unsigned int dword; } header; unsigned int buffer_start; unsigned int buffer_end; }; struct gen4_line_stipple { struct header header; struct { unsigned int pattern:16; unsigned int pad:16; } bits0; struct { unsigned int repeat_count:9; unsigned int pad:7; unsigned int inverse_repeat_count:16; } bits1; }; struct gen4_pipelined_state_pointers { struct header header; struct { unsigned int pad:5; unsigned int offset:27; } vs; struct { unsigned int enable:1; unsigned int pad:4; unsigned int offset:27; } gs; struct { unsigned int enable:1; unsigned int pad:4; unsigned int offset:27; } clp; struct { unsigned int pad:5; unsigned int offset:27; } sf; struct { unsigned int pad:5; unsigned int offset:27; } wm; struct { unsigned int pad:5; unsigned int offset:27; /* KW: check me! */ } cc; }; struct gen4_polygon_stipple_offset { struct header header; struct { unsigned int y_offset:5; unsigned int pad:3; unsigned int x_offset:5; unsigned int pad0:19; } bits0; }; struct gen4_polygon_stipple { struct header header; unsigned int stipple[32]; }; struct gen4_pipeline_select { struct { unsigned int pipeline_select:1; unsigned int pad:15; unsigned int opcode:16; } header; }; struct gen4_pipe_control { struct { unsigned int length:8; unsigned int notify_enable:1; unsigned int pad:2; unsigned int instruction_state_cache_flush_enable:1; unsigned int write_cache_flush_enable:1; unsigned int depth_stall_enable:1; unsigned int post_sync_operation:2; unsigned int opcode:16; } header; struct { unsigned int pad:2; unsigned int dest_addr_type:1; unsigned int dest_addr:29; } bits1; unsigned int data0; unsigned int data1; }; struct gen4_urb_fence { struct { unsigned int length:8; unsigned int vs_realloc:1; unsigned int gs_realloc:1; unsigned int clp_realloc:1; unsigned int sf_realloc:1; unsigned int vfe_realloc:1; unsigned int cs_realloc:1; unsigned int pad:2; unsigned int opcode:16; } header; struct { unsigned int vs_fence:10; unsigned int gs_fence:10; unsigned int clp_fence:10; unsigned int pad:2; } bits0; struct { unsigned int sf_fence:10; unsigned int vf_fence:10; unsigned int cs_fence:10; unsigned int pad:2; } bits1; }; struct gen4_constant_buffer_state /* previously gen4_command_streamer */ { struct header header; struct { unsigned int nr_urb_entries:3; unsigned int pad:1; unsigned int urb_entry_size:5; unsigned int pad0:23; } bits0; }; struct gen4_constant_buffer { struct { unsigned int length:8; unsigned int valid:1; unsigned int pad:7; unsigned int opcode:16; } header; struct { unsigned int buffer_length:6; unsigned int buffer_address:26; } bits0; }; struct gen4_state_base_address { struct header header; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int general_state_address:27; } bits0; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int surface_state_address:27; } bits1; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int indirect_object_state_address:27; } bits2; struct { unsigned int modify_enable:1; unsigned int pad:11; unsigned int general_state_upper_bound:20; } bits3; struct { unsigned int modify_enable:1; unsigned int pad:11; unsigned int indirect_object_state_upper_bound:20; } bits4; }; struct gen4_state_prefetch { struct header header; struct { unsigned int prefetch_count:3; unsigned int pad:3; unsigned int prefetch_pointer:26; } bits0; }; struct gen4_system_instruction_pointer { struct header header; struct { unsigned int pad:4; unsigned int system_instruction_pointer:28; } bits0; }; /* State structs for the various fixed function units: */ struct thread0 { unsigned int pad0:1; unsigned int grf_reg_count:3; unsigned int pad1:2; unsigned int kernel_start_pointer:26; }; struct thread1 { unsigned int ext_halt_exception_enable:1; unsigned int sw_exception_enable:1; unsigned int mask_stack_exception_enable:1; unsigned int timeout_exception_enable:1; unsigned int illegal_op_exception_enable:1; unsigned int pad0:3; unsigned int depth_coef_urb_read_offset:6; /* WM only */ unsigned int pad1:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int binding_table_entry_count:8; unsigned int pad3:5; unsigned int single_program_flow:1; }; struct thread2 { unsigned int per_thread_scratch_space:4; unsigned int pad0:6; unsigned int scratch_space_base_pointer:22; }; struct thread3 { unsigned int dispatch_grf_start_reg:4; unsigned int urb_entry_read_offset:6; unsigned int pad0:1; unsigned int urb_entry_read_length:6; unsigned int pad1:1; unsigned int const_urb_entry_read_offset:6; unsigned int pad2:1; unsigned int const_urb_entry_read_length:6; unsigned int pad3:1; }; struct gen4_clip_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:9; unsigned int gs_output_stats:1; /* not always */ unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:6; /* may be less */ unsigned int pad3:1; } thread4; struct { unsigned int pad0:13; unsigned int clip_mode:3; unsigned int userclip_enable_flags:8; unsigned int userclip_must_clip:1; unsigned int pad1:1; unsigned int guard_band_enable:1; unsigned int viewport_z_clip_enable:1; unsigned int viewport_xy_clip_enable:1; unsigned int vertex_position_space:1; unsigned int api_mode:1; unsigned int pad2:1; } clip5; struct { unsigned int pad0:5; unsigned int clipper_viewport_state_ptr:27; } clip6; float viewport_xmin; float viewport_xmax; float viewport_ymin; float viewport_ymax; }; struct gen4_cc_unit_state { struct { unsigned int pad0:3; unsigned int bf_stencil_pass_depth_pass_op:3; unsigned int bf_stencil_pass_depth_fail_op:3; unsigned int bf_stencil_fail_op:3; unsigned int bf_stencil_func:3; unsigned int bf_stencil_enable:1; unsigned int pad1:2; unsigned int stencil_write_enable:1; unsigned int stencil_pass_depth_pass_op:3; unsigned int stencil_pass_depth_fail_op:3; unsigned int stencil_fail_op:3; unsigned int stencil_func:3; unsigned int stencil_enable:1; } cc0; struct { unsigned int bf_stencil_ref:8; unsigned int stencil_write_mask:8; unsigned int stencil_test_mask:8; unsigned int stencil_ref:8; } cc1; struct { unsigned int logicop_enable:1; unsigned int pad0:10; unsigned int depth_write_enable:1; unsigned int depth_test_function:3; unsigned int depth_test:1; unsigned int bf_stencil_write_mask:8; unsigned int bf_stencil_test_mask:8; } cc2; struct { unsigned int pad0:8; unsigned int alpha_test_func:3; unsigned int alpha_test:1; unsigned int blend_enable:1; unsigned int ia_blend_enable:1; unsigned int pad1:1; unsigned int alpha_test_format:1; unsigned int pad2:16; } cc3; struct { unsigned int pad0:5; unsigned int cc_viewport_state_offset:27; } cc4; struct { unsigned int pad0:2; unsigned int ia_dest_blend_factor:5; unsigned int ia_src_blend_factor:5; unsigned int ia_blend_function:3; unsigned int statistics_enable:1; unsigned int logicop_func:4; unsigned int pad1:11; unsigned int dither_enable:1; } cc5; struct { unsigned int clamp_post_alpha_blend:1; unsigned int clamp_pre_alpha_blend:1; unsigned int clamp_range:2; unsigned int pad0:11; unsigned int y_dither_offset:2; unsigned int x_dither_offset:2; unsigned int dest_blend_factor:5; unsigned int src_blend_factor:5; unsigned int blend_function:3; } cc6; struct { union { float f; unsigned char ub[4]; } alpha_ref; } cc7; }; struct gen4_sf_unit_state { struct thread0 thread0; struct { unsigned int pad0:7; unsigned int sw_exception_enable:1; unsigned int pad1:3; unsigned int mask_stack_exception_enable:1; unsigned int pad2:1; unsigned int illegal_op_exception_enable:1; unsigned int pad3:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int binding_table_entry_count:8; unsigned int pad4:5; unsigned int single_program_flow:1; } sf1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:6; unsigned int pad3:1; } thread4; struct { unsigned int front_winding:1; unsigned int viewport_transform:1; unsigned int pad0:3; unsigned int sf_viewport_state_offset:27; } sf5; struct { unsigned int pad0:9; unsigned int dest_org_vbias:4; unsigned int dest_org_hbias:4; unsigned int scissor:1; unsigned int disable_2x2_trifilter:1; unsigned int disable_zero_pix_trifilter:1; unsigned int point_rast_rule:2; unsigned int line_endcap_aa_region_width:2; unsigned int line_width:4; unsigned int fast_scissor_disable:1; unsigned int cull_mode:2; unsigned int aa_enable:1; } sf6; struct { unsigned int point_size:11; unsigned int use_point_size_state:1; unsigned int subpixel_precision:1; unsigned int sprite_point:1; unsigned int pad0:11; unsigned int trifan_pv:2; unsigned int linestrip_pv:2; unsigned int tristrip_pv:2; unsigned int line_last_pixel_enable:1; } sf7; }; struct gen4_gs_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:1; unsigned int pad3:6; } thread4; struct { unsigned int sampler_count:3; unsigned int pad0:2; unsigned int sampler_state_pointer:27; } gs5; struct { unsigned int max_vp_index:4; unsigned int pad0:26; unsigned int reorder_enable:1; unsigned int pad1:1; } gs6; }; struct gen4_vs_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:4; unsigned int pad3:3; } thread4; struct { unsigned int sampler_count:3; unsigned int pad0:2; unsigned int sampler_state_pointer:27; } vs5; struct { unsigned int vs_enable:1; unsigned int vert_cache_disable:1; unsigned int pad0:30; } vs6; }; struct gen4_wm_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int stats_enable:1; unsigned int pad0:1; unsigned int sampler_count:3; unsigned int sampler_state_pointer:27; } wm4; struct { unsigned int enable_8_pix:1; unsigned int enable_16_pix:1; unsigned int enable_32_pix:1; unsigned int pad0:7; unsigned int legacy_global_depth_bias:1; unsigned int line_stipple:1; unsigned int depth_offset:1; unsigned int polygon_stipple:1; unsigned int line_aa_region_width:2; unsigned int line_endcap_aa_region_width:2; unsigned int early_depth_test:1; unsigned int thread_dispatch_enable:1; unsigned int program_uses_depth:1; unsigned int program_computes_depth:1; unsigned int program_uses_killpixel:1; unsigned int legacy_line_rast: 1; unsigned int transposed_urb_read:1; unsigned int max_threads:7; } wm5; float global_depth_offset_constant; float global_depth_offset_scale; struct { unsigned int pad0:1; unsigned int grf_reg_count_1:3; unsigned int pad1:2; unsigned int kernel_start_pointer_1:26; } wm8; struct { unsigned int pad0:1; unsigned int grf_reg_count_2:3; unsigned int pad1:2; unsigned int kernel_start_pointer_2:26; } wm9; struct { unsigned int pad0:1; unsigned int grf_reg_count_3:3; unsigned int pad1:2; unsigned int kernel_start_pointer_3:26; } wm10; }; struct gen4_wm_unit_state_padded { struct gen4_wm_unit_state state; char pad[64 - sizeof(struct gen4_wm_unit_state)]; }; /* The hardware supports two different modes for border color. The * default (OpenGL) mode uses floating-point color channels, while the * legacy mode uses 4 bytes. * * More significantly, the legacy mode respects the components of the * border color for channels not present in the source, (whereas the * default mode will ignore the border color's alpha channel and use * alpha==1 for an RGB source, for example). * * The legacy mode matches the semantics specified by the Render * extension. */ struct gen4_sampler_default_border_color { float color[4]; }; struct gen4_sampler_legacy_border_color { uint8_t color[4]; }; struct gen4_sampler_state { struct { unsigned int shadow_function:3; unsigned int lod_bias:11; unsigned int min_filter:3; unsigned int mag_filter:3; unsigned int mip_filter:2; unsigned int base_level:5; unsigned int pad:1; unsigned int lod_preclamp:1; unsigned int border_color_mode:1; unsigned int pad0:1; unsigned int disable:1; } ss0; struct { unsigned int r_wrap_mode:3; unsigned int t_wrap_mode:3; unsigned int s_wrap_mode:3; unsigned int pad:3; unsigned int max_lod:10; unsigned int min_lod:10; } ss1; struct { unsigned int pad:5; unsigned int border_color_pointer:27; } ss2; struct { unsigned int pad:19; unsigned int max_aniso:3; unsigned int chroma_key_mode:1; unsigned int chroma_key_index:2; unsigned int chroma_key_enable:1; unsigned int monochrome_filter_width:3; unsigned int monochrome_filter_height:3; } ss3; }; struct gen4_clipper_viewport { float xmin; float xmax; float ymin; float ymax; }; struct gen4_cc_viewport { float min_depth; float max_depth; }; struct gen4_sf_viewport { struct { float m00; float m11; float m22; float m30; float m31; float m32; } viewport; struct { short xmin; short ymin; short xmax; short ymax; } scissor; }; /* Documented in the subsystem/shared-functions/sampler chapter... */ struct gen4_surface_state { struct { unsigned int cube_pos_z:1; unsigned int cube_neg_z:1; unsigned int cube_pos_y:1; unsigned int cube_neg_y:1; unsigned int cube_pos_x:1; unsigned int cube_neg_x:1; unsigned int pad:3; unsigned int render_cache_read_mode:1; unsigned int mipmap_layout_mode:1; unsigned int vert_line_stride_ofs:1; unsigned int vert_line_stride:1; unsigned int color_blend:1; unsigned int writedisable_blue:1; unsigned int writedisable_green:1; unsigned int writedisable_red:1; unsigned int writedisable_alpha:1; unsigned int surface_format:9; unsigned int data_return_format:1; unsigned int pad0:1; unsigned int surface_type:3; } ss0; struct { unsigned int base_addr; } ss1; struct { unsigned int render_target_rotation:2; unsigned int mip_count:4; unsigned int width:13; unsigned int height:13; } ss2; struct { unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int pad:1; unsigned int pitch:18; unsigned int depth:11; } ss3; struct { unsigned int pad:19; unsigned int min_array_elt:9; unsigned int min_lod:4; } ss4; struct { unsigned int pad:20; unsigned int y_offset:4; unsigned int pad2:1; unsigned int x_offset:7; } ss5; }; /* Surface state DW0 */ #define GEN4_SURFACE_RC_READ_WRITE (1 << 8) #define GEN4_SURFACE_MIPLAYOUT_SHIFT 10 #define GEN4_SURFACE_MIPMAPLAYOUT_BELOW 0 #define GEN4_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define GEN4_SURFACE_CUBEFACE_ENABLES 0x3f #define GEN4_SURFACE_BLEND_ENABLED (1 << 13) #define GEN4_SURFACE_WRITEDISABLE_B_SHIFT 14 #define GEN4_SURFACE_WRITEDISABLE_G_SHIFT 15 #define GEN4_SURFACE_WRITEDISABLE_R_SHIFT 16 #define GEN4_SURFACE_WRITEDISABLE_A_SHIFT 17 #define GEN4_SURFACE_FORMAT_SHIFT 18 #define GEN4_SURFACE_FORMAT_MASK _MASK(26, 18) #define GEN4_SURFACE_TYPE_SHIFT 29 #define GEN4_SURFACE_TYPE_MASK _MASK(31, 29) #define GEN4_SURFACE_1D 0 #define GEN4_SURFACE_2D 1 #define GEN4_SURFACE_3D 2 #define GEN4_SURFACE_CUBE 3 #define GEN4_SURFACE_BUFFER 4 #define GEN4_SURFACE_NULL 7 /* Surface state DW2 */ #define GEN4_SURFACE_HEIGHT_SHIFT 19 #define GEN4_SURFACE_HEIGHT_MASK _MASK(31, 19) #define GEN4_SURFACE_WIDTH_SHIFT 6 #define GEN4_SURFACE_WIDTH_MASK _MASK(18, 6) #define GEN4_SURFACE_LOD_SHIFT 2 #define GEN4_SURFACE_LOD_MASK _MASK(5, 2) /* Surface state DW3 */ #define GEN4_SURFACE_DEPTH_SHIFT 21 #define GEN4_SURFACE_DEPTH_MASK _MASK(31, 21) #define GEN4_SURFACE_PITCH_SHIFT 3 #define GEN4_SURFACE_PITCH_MASK _MASK(19, 3) #define GEN4_SURFACE_TILED (1 << 1) #define GEN4_SURFACE_TILED_Y (1 << 0) /* Surface state DW4 */ #define GEN4_SURFACE_MIN_LOD_SHIFT 28 #define GEN4_SURFACE_MIN_LOD_MASK _MASK(31, 28) /* Surface state DW5 */ #define GEN4_SURFACE_X_OFFSET_SHIFT 25 #define GEN4_SURFACE_X_OFFSET_MASK _MASK(31, 25) #define GEN4_SURFACE_Y_OFFSET_SHIFT 20 #define GEN4_SURFACE_Y_OFFSET_MASK _MASK(23, 20) struct gen4_vertex_buffer_state { struct { unsigned int pitch:11; unsigned int pad:15; unsigned int access_type:1; unsigned int vb_index:5; } vb0; unsigned int start_addr; unsigned int max_index; #if 1 unsigned int instance_data_step_rate; /* not included for sequential/random vertices? */ #endif }; #define GEN4_VBP_MAX 17 struct gen4_vb_array_state { struct header header; struct gen4_vertex_buffer_state vb[GEN4_VBP_MAX]; }; struct gen4_vertex_element_state { struct { unsigned int src_offset:11; unsigned int pad:5; unsigned int src_format:9; unsigned int pad0:1; unsigned int valid:1; unsigned int vertex_buffer_index:5; } ve0; struct { unsigned int dst_offset:8; unsigned int pad:8; unsigned int vfcomponent3:4; unsigned int vfcomponent2:4; unsigned int vfcomponent1:4; unsigned int vfcomponent0:4; } ve1; }; #define GEN4_VEP_MAX 18 struct gen4_vertex_element_packet { struct header header; struct gen4_vertex_element_state ve[GEN4_VEP_MAX]; /* note: less than _TNL_ATTRIB_MAX */ }; struct gen4_urb_immediate { unsigned int opcode:4; unsigned int offset:6; unsigned int swizzle_control:2; unsigned int pad:1; unsigned int allocate:1; unsigned int used:1; unsigned int complete:1; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; }; /* Instruction format for the execution units: */ struct gen4_instruction { struct { unsigned int opcode:7; unsigned int pad:1; unsigned int access_mode:1; unsigned int mask_control:1; unsigned int dependency_control:2; unsigned int compression_control:2; unsigned int thread_control:2; unsigned int predicate_control:4; unsigned int predicate_inverse:1; unsigned int execution_size:3; unsigned int destreg__conditonalmod:4; /* destreg - send, conditionalmod - others */ unsigned int pad0:2; unsigned int debug_control:1; unsigned int saturate:1; } header; union { struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int src1_reg_file:2; unsigned int src1_reg_type:3; unsigned int pad:1; unsigned int dest_subreg_nr:5; unsigned int dest_reg_nr:8; unsigned int dest_horiz_stride:2; unsigned int dest_address_mode:1; } da1; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int pad:6; int dest_indirect_offset:10; /* offset against the deref'd address reg */ unsigned int dest_subreg_nr:3; /* subnr for the address reg a0.x */ unsigned int dest_horiz_stride:2; unsigned int dest_address_mode:1; } ia1; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int src1_reg_file:2; unsigned int src1_reg_type:3; unsigned int pad0:1; unsigned int dest_writemask:4; unsigned int dest_subreg_nr:1; unsigned int dest_reg_nr:8; unsigned int pad1:2; unsigned int dest_address_mode:1; } da16; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int pad0:6; unsigned int dest_writemask:4; int dest_indirect_offset:6; unsigned int dest_subreg_nr:3; unsigned int pad1:2; unsigned int dest_address_mode:1; } ia16; } bits1; union { struct { unsigned int src0_subreg_nr:5; unsigned int src0_reg_nr:8; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_horiz_stride:2; unsigned int src0_width:3; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad:6; } da1; struct { int src0_indirect_offset:10; unsigned int src0_subreg_nr:3; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_horiz_stride:2; unsigned int src0_width:3; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad:6; } ia1; struct { unsigned int src0_swz_x:2; unsigned int src0_swz_y:2; unsigned int src0_subreg_nr:1; unsigned int src0_reg_nr:8; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_swz_z:2; unsigned int src0_swz_w:2; unsigned int pad0:1; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } da16; struct { unsigned int src0_swz_x:2; unsigned int src0_swz_y:2; int src0_indirect_offset:6; unsigned int src0_subreg_nr:3; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_swz_z:2; unsigned int src0_swz_w:2; unsigned int pad0:1; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } ia16; } bits2; union { struct { unsigned int src1_subreg_nr:5; unsigned int src1_reg_nr:8; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad:1; unsigned int src1_horiz_stride:2; unsigned int src1_width:3; unsigned int src1_vert_stride:4; unsigned int pad0:7; } da1; struct { unsigned int src1_swz_x:2; unsigned int src1_swz_y:2; unsigned int src1_subreg_nr:1; unsigned int src1_reg_nr:8; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_swz_z:2; unsigned int src1_swz_w:2; unsigned int pad1:1; unsigned int src1_vert_stride:4; unsigned int pad2:7; } da16; struct { int src1_indirect_offset:10; unsigned int src1_subreg_nr:3; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_horiz_stride:2; unsigned int src1_width:3; unsigned int src1_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } ia1; struct { unsigned int src1_swz_x:2; unsigned int src1_swz_y:2; int src1_indirect_offset:6; unsigned int src1_subreg_nr:3; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_swz_z:2; unsigned int src1_swz_w:2; unsigned int pad1:1; unsigned int src1_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad2:6; } ia16; struct { int jump_count:16; /* note: signed */ unsigned int pop_count:4; unsigned int pad0:12; } if_else; struct { unsigned int function:4; unsigned int int_type:1; unsigned int precision:1; unsigned int saturate:1; unsigned int data_type:1; unsigned int pad0:8; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } math; struct { unsigned int binding_table_index:8; unsigned int sampler:4; unsigned int return_format:2; unsigned int msg_type:2; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } sampler; struct gen4_urb_immediate urb; struct { unsigned int binding_table_index:8; unsigned int msg_control:4; unsigned int msg_type:2; unsigned int target_cache:2; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } dp_read; struct { unsigned int binding_table_index:8; unsigned int msg_control:3; unsigned int pixel_scoreboard_clear:1; unsigned int msg_type:3; unsigned int send_commit_msg:1; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } dp_write; struct { unsigned int pad:16; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } generic; unsigned int ud; } bits3; }; /* media pipeline */ struct gen4_vfe_state { struct { unsigned int per_thread_scratch_space:4; unsigned int pad3:3; unsigned int extend_vfe_state_present:1; unsigned int pad2:2; unsigned int scratch_base:22; } vfe0; struct { unsigned int debug_counter_control:2; unsigned int children_present:1; unsigned int vfe_mode:4; unsigned int pad2:2; unsigned int num_urb_entries:7; unsigned int urb_entry_alloc_size:9; unsigned int max_threads:7; } vfe1; struct { unsigned int pad4:4; unsigned int interface_descriptor_base:28; } vfe2; }; struct gen4_vld_state { struct { unsigned int pad6:6; unsigned int scan_order:1; unsigned int intra_vlc_format:1; unsigned int quantizer_scale_type:1; unsigned int concealment_motion_vector:1; unsigned int frame_predict_frame_dct:1; unsigned int top_field_first:1; unsigned int picture_structure:2; unsigned int intra_dc_precision:2; unsigned int f_code_0_0:4; unsigned int f_code_0_1:4; unsigned int f_code_1_0:4; unsigned int f_code_1_1:4; } vld0; struct { unsigned int pad2:9; unsigned int picture_coding_type:2; unsigned int pad:21; } vld1; struct { unsigned int index_0:4; unsigned int index_1:4; unsigned int index_2:4; unsigned int index_3:4; unsigned int index_4:4; unsigned int index_5:4; unsigned int index_6:4; unsigned int index_7:4; } desc_remap_table0; struct { unsigned int index_8:4; unsigned int index_9:4; unsigned int index_10:4; unsigned int index_11:4; unsigned int index_12:4; unsigned int index_13:4; unsigned int index_14:4; unsigned int index_15:4; } desc_remap_table1; }; struct gen4_interface_descriptor { struct { unsigned int grf_reg_blocks:4; unsigned int pad:2; unsigned int kernel_start_pointer:26; } desc0; struct { unsigned int pad:7; unsigned int software_exception:1; unsigned int pad2:3; unsigned int maskstack_exception:1; unsigned int pad3:1; unsigned int illegal_opcode_exception:1; unsigned int pad4:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int single_program_flow:1; unsigned int pad5:1; unsigned int const_urb_entry_read_offset:6; unsigned int const_urb_entry_read_len:6; } desc1; struct { unsigned int pad:2; unsigned int sampler_count:3; unsigned int sampler_state_pointer:27; } desc2; struct { unsigned int binding_table_entry_count:5; unsigned int binding_table_pointer:27; } desc3; }; struct gen6_blend_state { struct { unsigned int dest_blend_factor:5; unsigned int source_blend_factor:5; unsigned int pad3:1; unsigned int blend_func:3; unsigned int pad2:1; unsigned int ia_dest_blend_factor:5; unsigned int ia_source_blend_factor:5; unsigned int pad1:1; unsigned int ia_blend_func:3; unsigned int pad0:1; unsigned int ia_blend_enable:1; unsigned int blend_enable:1; } blend0; struct { unsigned int post_blend_clamp_enable:1; unsigned int pre_blend_clamp_enable:1; unsigned int clamp_range:2; unsigned int pad0:4; unsigned int x_dither_offset:2; unsigned int y_dither_offset:2; unsigned int dither_enable:1; unsigned int alpha_test_func:3; unsigned int alpha_test_enable:1; unsigned int pad1:1; unsigned int logic_op_func:4; unsigned int logic_op_enable:1; unsigned int pad2:1; unsigned int write_disable_b:1; unsigned int write_disable_g:1; unsigned int write_disable_r:1; unsigned int write_disable_a:1; unsigned int pad3:1; unsigned int alpha_to_coverage_dither:1; unsigned int alpha_to_one:1; unsigned int alpha_to_coverage:1; } blend1; }; struct gen6_color_calc_state { struct { unsigned int alpha_test_format:1; unsigned int pad0:14; unsigned int round_disable:1; unsigned int bf_stencil_ref:8; unsigned int stencil_ref:8; } cc0; union { float alpha_ref_f; struct { unsigned int ui:8; unsigned int pad0:24; } alpha_ref_fi; } cc1; float constant_r; float constant_g; float constant_b; float constant_a; }; struct gen6_depth_stencil_state { struct { unsigned int pad0:3; unsigned int bf_stencil_pass_depth_pass_op:3; unsigned int bf_stencil_pass_depth_fail_op:3; unsigned int bf_stencil_fail_op:3; unsigned int bf_stencil_func:3; unsigned int bf_stencil_enable:1; unsigned int pad1:2; unsigned int stencil_write_enable:1; unsigned int stencil_pass_depth_pass_op:3; unsigned int stencil_pass_depth_fail_op:3; unsigned int stencil_fail_op:3; unsigned int stencil_func:3; unsigned int stencil_enable:1; } ds0; struct { unsigned int bf_stencil_write_mask:8; unsigned int bf_stencil_test_mask:8; unsigned int stencil_write_mask:8; unsigned int stencil_test_mask:8; } ds1; struct { unsigned int pad0:26; unsigned int depth_write_enable:1; unsigned int depth_test_func:3; unsigned int pad1:1; unsigned int depth_test_enable:1; } ds2; }; typedef enum { SAMPLER_FILTER_NEAREST = 0, SAMPLER_FILTER_BILINEAR, FILTER_COUNT } sampler_filter_t; typedef enum { SAMPLER_EXTEND_NONE = 0, SAMPLER_EXTEND_REPEAT, SAMPLER_EXTEND_PAD, SAMPLER_EXTEND_REFLECT, EXTEND_COUNT } sampler_extend_t; typedef enum { WM_KERNEL = 0, WM_KERNEL_P, WM_KERNEL_MASK, WM_KERNEL_MASK_P, WM_KERNEL_MASKCA, WM_KERNEL_MASKCA_P, WM_KERNEL_MASKSA, WM_KERNEL_MASKSA_P, WM_KERNEL_OPACITY, WM_KERNEL_OPACITY_P, WM_KERNEL_VIDEO_PLANAR, WM_KERNEL_VIDEO_PACKED, KERNEL_COUNT } wm_kernel_t; #endif xf86-video-intel-2.99.917/src/sna/gen6_render.h0000664000175000017500000016536512244635610015671 00000000000000#ifndef GEN6_RENDER_H #define GEN6_RENDER_H #define GEN6_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low)) #define GEN6_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define GEN6_STATE_BASE_ADDRESS GEN6_3D(0, 1, 1) #define GEN6_STATE_SIP GEN6_3D(0, 1, 2) #define GEN6_PIPELINE_SELECT GEN6_3D(1, 1, 4) #define GEN6_MEDIA_STATE_POINTERS GEN6_3D(2, 0, 0) #define GEN6_MEDIA_OBJECT GEN6_3D(2, 1, 0) #define GEN6_3DSTATE_BINDING_TABLE_POINTERS GEN6_3D(3, 0, 1) # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN6 */ #define GEN6_3DSTATE_VERTEX_BUFFERS GEN6_3D(3, 0, 8) #define GEN6_3DSTATE_VERTEX_ELEMENTS GEN6_3D(3, 0, 9) #define GEN6_3DSTATE_INDEX_BUFFER GEN6_3D(3, 0, 0xa) #define GEN6_3DSTATE_VF_STATISTICS GEN6_3D(3, 0, 0xb) #define GEN6_3DSTATE_DRAWING_RECTANGLE GEN6_3D(3, 1, 0) #define GEN6_3DSTATE_CONSTANT_COLOR GEN6_3D(3, 1, 1) #define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD GEN6_3D(3, 1, 2) #define GEN6_3DSTATE_CHROMA_KEY GEN6_3D(3, 1, 4) #define GEN6_3DSTATE_DEPTH_BUFFER GEN6_3D(3, 1, 5) # define GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 # define GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 #define GEN6_3DSTATE_POLY_STIPPLE_OFFSET GEN6_3D(3, 1, 6) #define GEN6_3DSTATE_POLY_STIPPLE_PATTERN GEN6_3D(3, 1, 7) #define GEN6_3DSTATE_LINE_STIPPLE GEN6_3D(3, 1, 8) #define GEN6_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN6_3D(3, 1, 9) /* These two are BLC and CTG only, not BW or CL */ #define GEN6_3DSTATE_AA_LINE_PARAMS GEN6_3D(3, 1, 0xa) #define GEN6_3DSTATE_GS_SVB_INDEX GEN6_3D(3, 1, 0xb) #define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0) #define GEN6_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 1, 0x10) /* DW1 */ # define GEN6_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) #define GEN6_3DSTATE_SAMPLER_STATE_POINTERS GEN6_3D(3, 0, 0x02) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) #define GEN6_3DSTATE_URB GEN6_3D(3, 0, 0x05) /* DW1 */ # define GEN6_3DSTATE_URB_VS_SIZE_SHIFT 16 # define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT 0 /* DW2 */ # define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT 8 # define GEN6_3DSTATE_URB_GS_SIZE_SHIFT 0 #define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS GEN6_3D(3, 0, 0x0d) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) #define GEN6_3DSTATE_CC_STATE_POINTERS GEN6_3D(3, 0, 0x0e) #define GEN6_3DSTATE_VS GEN6_3D(3, 0, 0x10) #define GEN6_3DSTATE_GS GEN6_3D(3, 0, 0x11) /* DW4 */ # define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 #define GEN6_3DSTATE_CLIP GEN6_3D(3, 0, 0x12) #define GEN6_3DSTATE_SF GEN6_3D(3, 0, 0x13) /* DW1 */ # define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW2 */ /* DW3 */ # define GEN6_3DSTATE_SF_CULL_BOTH (0 << 29) # define GEN6_3DSTATE_SF_CULL_NONE (1 << 29) # define GEN6_3DSTATE_SF_CULL_FRONT (2 << 29) # define GEN6_3DSTATE_SF_CULL_BACK (3 << 29) /* DW4 */ # define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 # define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 # define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 #define GEN6_3DSTATE_WM GEN6_3D(3, 0, 0x14) /* DW2 */ # define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHIFT 27 # define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 /* DW4 */ # define GEN6_3DSTATE_WM_DISPATCH_0_START_GRF_SHIFT 16 # define GEN6_3DSTATE_WM_DISPATCH_1_START_GRF_SHIFT 8 # define GEN6_3DSTATE_WM_DISPATCH_2_START_GRF_SHIFT 0 /* DW5 */ # define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT 25 # define GEN6_3DSTATE_WM_DISPATCH_ENABLE (1 << 19) # define GEN6_3DSTATE_WM_32_DISPATCH_ENABLE (1 << 2) # define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1) # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) /* DW6 */ # define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20 # define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) # define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) # define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) # define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) #define GEN6_3DSTATE_CONSTANT_VS GEN6_3D(3, 0, 0x15) #define GEN6_3DSTATE_CONSTANT_GS GEN6_3D(3, 0, 0x16) #define GEN6_3DSTATE_CONSTANT_PS GEN6_3D(3, 0, 0x17) #define GEN6_3DSTATE_SAMPLE_MASK GEN6_3D(3, 0, 0x18) #define GEN6_3DSTATE_MULTISAMPLE GEN6_3D(3, 1, 0x0d) /* DW1 */ # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) #define PIPELINE_SELECT_3D 0 #define PIPELINE_SELECT_MEDIA 1 /* for GEN6_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) /* VERTEX_BUFFER_STATE Structure */ #define VB0_BUFFER_INDEX_SHIFT 26 #define VB0_VERTEXDATA (0 << 20) #define VB0_INSTANCEDATA (1 << 20) #define VB0_BUFFER_PITCH_SHIFT 0 /* VERTEX_ELEMENT_STATE Structure */ #define VE0_VERTEX_BUFFER_INDEX_SHIFT 26 /* for GEN6 */ #define VE0_VALID (1 << 25) /* for GEN6 */ #define VE0_FORMAT_SHIFT 16 #define VE0_OFFSET_SHIFT 0 #define VE1_VFCOMPONENT_0_SHIFT 28 #define VE1_VFCOMPONENT_1_SHIFT 24 #define VE1_VFCOMPONENT_2_SHIFT 20 #define VE1_VFCOMPONENT_3_SHIFT 16 #define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 /* 3DPRIMITIVE bits */ #define GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) #define GEN6_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) /* Primitive types are in gen6_defines.h */ #define GEN6_3DPRIMITIVE_TOPOLOGY_SHIFT 10 #define GEN6_SVG_CTL 0x7400 #define GEN6_SVG_CTL_GS_BA (0 << 8) #define GEN6_SVG_CTL_SS_BA (1 << 8) #define GEN6_SVG_CTL_IO_BA (2 << 8) #define GEN6_SVG_CTL_GS_AUB (3 << 8) #define GEN6_SVG_CTL_IO_AUB (4 << 8) #define GEN6_SVG_CTL_SIP (5 << 8) #define GEN6_SVG_RDATA 0x7404 #define GEN6_SVG_WORK_CTL 0x7408 #define GEN6_VF_CTL 0x7500 #define GEN6_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) #define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) #define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) #define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) #define GEN6_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) #define GEN6_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) #define GEN6_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) #define GEN6_VF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_VF_STRG_VAL 0x7504 #define GEN6_VF_STR_VL_OVR 0x7508 #define GEN6_VF_VC_OVR 0x750c #define GEN6_VF_STR_PSKIP 0x7510 #define GEN6_VF_MAX_PRIM 0x7514 #define GEN6_VF_RDATA 0x7518 #define GEN6_VS_CTL 0x7600 #define GEN6_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) #define GEN6_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_VS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_VS_STRG_VAL 0x7604 #define GEN6_VS_RDATA 0x7608 #define GEN6_SF_CTL 0x7b00 #define GEN6_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) #define GEN6_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) #define GEN6_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) #define GEN6_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_SF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_SF_STRG_VAL 0x7b04 #define GEN6_SF_RDATA 0x7b18 #define GEN6_WIZ_CTL 0x7c00 #define GEN6_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 #define GEN6_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) #define GEN6_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) #define GEN6_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) #define GEN6_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) #define GEN6_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) #define GEN6_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) #define GEN6_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) #define GEN6_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_WIZ_STRG_VAL 0x7c04 #define GEN6_WIZ_RDATA 0x7c18 #define GEN6_TS_CTL 0x7e00 #define GEN6_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) #define GEN6_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) #define GEN6_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) #define GEN6_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) #define GEN6_TS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_TS_STRG_VAL 0x7e04 #define GEN6_TS_RDATA 0x7e08 #define GEN6_TD_CTL 0x8000 #define GEN6_TD_CTL_MUX_SHIFT 8 #define GEN6_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define GEN6_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) #define GEN6_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) #define GEN6_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) #define GEN6_TD_CTL_BREAKPOINT_ENABLE (1 << 2) #define GEN6_TD_CTL2 0x8004 #define GEN6_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) #define GEN6_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) #define GEN6_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) #define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 #define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) #define GEN6_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) #define GEN6_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) #define GEN6_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) #define GEN6_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) #define GEN6_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) #define GEN6_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) #define GEN6_TD_VF_VS_EMSK 0x8008 #define GEN6_TD_GS_EMSK 0x800c #define GEN6_TD_CLIP_EMSK 0x8010 #define GEN6_TD_SF_EMSK 0x8014 #define GEN6_TD_WIZ_EMSK 0x8018 #define GEN6_TD_0_6_EHTRG_VAL 0x801c #define GEN6_TD_0_7_EHTRG_VAL 0x8020 #define GEN6_TD_0_6_EHTRG_MSK 0x8024 #define GEN6_TD_0_7_EHTRG_MSK 0x8028 #define GEN6_TD_RDATA 0x802c #define GEN6_TD_TS_EMSK 0x8030 #define GEN6_EU_CTL 0x8800 #define GEN6_EU_CTL_SELECT_SHIFT 16 #define GEN6_EU_CTL_DATA_MUX_SHIFT 8 #define GEN6_EU_ATT_0 0x8810 #define GEN6_EU_ATT_1 0x8814 #define GEN6_EU_ATT_DATA_0 0x8820 #define GEN6_EU_ATT_DATA_1 0x8824 #define GEN6_EU_ATT_CLR_0 0x8830 #define GEN6_EU_ATT_CLR_1 0x8834 #define GEN6_EU_RDATA 0x8840 #define GEN6_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define GEN6_STATE_BASE_ADDRESS GEN6_3D(0, 1, 1) #define GEN6_STATE_SIP GEN6_3D(0, 1, 2) #define GEN6_PIPELINE_SELECT GEN6_3D(1, 1, 4) #define GEN6_MEDIA_STATE_POINTERS GEN6_3D(2, 0, 0) #define GEN6_MEDIA_OBJECT GEN6_3D(2, 1, 0) #define GEN6_3DSTATE_BINDING_TABLE_POINTERS GEN6_3D(3, 0, 1) # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN6 */ #define GEN6_3DSTATE_VERTEX_BUFFERS GEN6_3D(3, 0, 8) #define GEN6_3DSTATE_VERTEX_ELEMENTS GEN6_3D(3, 0, 9) #define GEN6_3DSTATE_INDEX_BUFFER GEN6_3D(3, 0, 0xa) #define GEN6_3DSTATE_VF_STATISTICS GEN6_3D(3, 0, 0xb) #define GEN6_3DSTATE_DRAWING_RECTANGLE GEN6_3D(3, 1, 0) #define GEN6_3DSTATE_CONSTANT_COLOR GEN6_3D(3, 1, 1) #define GEN6_3DSTATE_SAMPLER_PALETTE_LOAD GEN6_3D(3, 1, 2) #define GEN6_3DSTATE_CHROMA_KEY GEN6_3D(3, 1, 4) #define GEN6_3DSTATE_DEPTH_BUFFER GEN6_3D(3, 1, 5) # define GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 # define GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 #define GEN6_3DSTATE_POLY_STIPPLE_OFFSET GEN6_3D(3, 1, 6) #define GEN6_3DSTATE_POLY_STIPPLE_PATTERN GEN6_3D(3, 1, 7) #define GEN6_3DSTATE_LINE_STIPPLE GEN6_3D(3, 1, 8) #define GEN6_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP GEN6_3D(3, 1, 9) /* These two are BLC and CTG only, not BW or CL */ #define GEN6_3DSTATE_AA_LINE_PARAMS GEN6_3D(3, 1, 0xa) #define GEN6_3DSTATE_GS_SVB_INDEX GEN6_3D(3, 1, 0xb) #define GEN6_3DPRIMITIVE GEN6_3D(3, 3, 0) #define GEN6_3DSTATE_CLEAR_PARAMS GEN6_3D(3, 1, 0x10) /* DW1 */ # define GEN6_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) /* for GEN6+ */ #define GEN6_3DSTATE_SAMPLER_STATE_POINTERS GEN6_3D(3, 0, 0x02) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) #define GEN6_3DSTATE_URB GEN6_3D(3, 0, 0x05) /* DW1 */ # define GEN6_3DSTATE_URB_VS_SIZE_SHIFT 16 # define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT 0 /* DW2 */ # define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT 8 # define GEN6_3DSTATE_URB_GS_SIZE_SHIFT 0 #define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS GEN6_3D(3, 0, 0x0d) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) #define GEN6_3DSTATE_CC_STATE_POINTERS GEN6_3D(3, 0, 0x0e) #define GEN6_3DSTATE_VS GEN6_3D(3, 0, 0x10) #define GEN6_3DSTATE_GS GEN6_3D(3, 0, 0x11) /* DW4 */ # define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 #define GEN6_3DSTATE_CLIP GEN6_3D(3, 0, 0x12) #define GEN6_3DSTATE_SF GEN6_3D(3, 0, 0x13) /* DW1 */ # define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW2 */ /* DW3 */ # define GEN6_3DSTATE_SF_CULL_BOTH (0 << 29) # define GEN6_3DSTATE_SF_CULL_NONE (1 << 29) # define GEN6_3DSTATE_SF_CULL_FRONT (2 << 29) # define GEN6_3DSTATE_SF_CULL_BACK (3 << 29) /* DW4 */ # define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 # define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 # define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 #define GEN6_3DSTATE_WM GEN6_3D(3, 0, 0x14) /* DW2 */ # define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF 27 # define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 /* DW4 */ # define GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT 16 /* DW5 */ # define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT 25 # define GEN6_3DSTATE_WM_DISPATCH_ENABLE (1 << 19) # define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1) # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) /* DW6 */ # define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20 # define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) # define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) # define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) # define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) #define GEN6_3DSTATE_CONSTANT_VS GEN6_3D(3, 0, 0x15) #define GEN6_3DSTATE_CONSTANT_GS GEN6_3D(3, 0, 0x16) #define GEN6_3DSTATE_CONSTANT_PS GEN6_3D(3, 0, 0x17) #define GEN6_3DSTATE_SAMPLE_MASK GEN6_3D(3, 0, 0x18) #define GEN6_3DSTATE_MULTISAMPLE GEN6_3D(3, 1, 0x0d) /* DW1 */ # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) #define PIPELINE_SELECT_3D 0 #define PIPELINE_SELECT_MEDIA 1 #define UF0_CS_REALLOC (1 << 13) #define UF0_VFE_REALLOC (1 << 12) #define UF0_SF_REALLOC (1 << 11) #define UF0_CLIP_REALLOC (1 << 10) #define UF0_GS_REALLOC (1 << 9) #define UF0_VS_REALLOC (1 << 8) #define UF1_CLIP_FENCE_SHIFT 20 #define UF1_GS_FENCE_SHIFT 10 #define UF1_VS_FENCE_SHIFT 0 #define UF2_CS_FENCE_SHIFT 20 #define UF2_VFE_FENCE_SHIFT 10 #define UF2_SF_FENCE_SHIFT 0 /* for GEN6_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) /* for GEN6_3DSTATE_PIPELINED_POINTERS */ #define GEN6_GS_DISABLE 0 #define GEN6_GS_ENABLE 1 #define GEN6_CLIP_DISABLE 0 #define GEN6_CLIP_ENABLE 1 /* for GEN6_PIPE_CONTROL */ #define GEN6_PIPE_CONTROL GEN6_3D(3, 2, 0) #define GEN6_PIPE_CONTROL_CS_STALL (1 << 20) #define GEN6_PIPE_CONTROL_NOWRITE (0 << 14) #define GEN6_PIPE_CONTROL_WRITE_QWORD (1 << 14) #define GEN6_PIPE_CONTROL_WRITE_DEPTH (2 << 14) #define GEN6_PIPE_CONTROL_WRITE_TIME (3 << 14) #define GEN6_PIPE_CONTROL_DEPTH_STALL (1 << 13) #define GEN6_PIPE_CONTROL_WC_FLUSH (1 << 12) #define GEN6_PIPE_CONTROL_IS_FLUSH (1 << 11) #define GEN6_PIPE_CONTROL_TC_FLUSH (1 << 10) #define GEN6_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) #define GEN6_PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define GEN6_PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define GEN6_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) #define GEN6_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) /* 3DPRIMITIVE bits */ #define GEN6_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) #define GEN6_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) /* Primitive types are in gen6_defines.h */ #define GEN6_3DPRIMITIVE_TOPOLOGY_SHIFT 10 #define GEN6_SVG_CTL 0x7400 #define GEN6_SVG_CTL_GS_BA (0 << 8) #define GEN6_SVG_CTL_SS_BA (1 << 8) #define GEN6_SVG_CTL_IO_BA (2 << 8) #define GEN6_SVG_CTL_GS_AUB (3 << 8) #define GEN6_SVG_CTL_IO_AUB (4 << 8) #define GEN6_SVG_CTL_SIP (5 << 8) #define GEN6_SVG_RDATA 0x7404 #define GEN6_SVG_WORK_CTL 0x7408 #define GEN6_VF_CTL 0x7500 #define GEN6_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) #define GEN6_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) #define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) #define GEN6_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) #define GEN6_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) #define GEN6_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) #define GEN6_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) #define GEN6_VF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_VF_STRG_VAL 0x7504 #define GEN6_VF_STR_VL_OVR 0x7508 #define GEN6_VF_VC_OVR 0x750c #define GEN6_VF_STR_PSKIP 0x7510 #define GEN6_VF_MAX_PRIM 0x7514 #define GEN6_VF_RDATA 0x7518 #define GEN6_VS_CTL 0x7600 #define GEN6_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) #define GEN6_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) #define GEN6_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_VS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_VS_STRG_VAL 0x7604 #define GEN6_VS_RDATA 0x7608 #define GEN6_SF_CTL 0x7b00 #define GEN6_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) #define GEN6_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) #define GEN6_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) #define GEN6_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) #define GEN6_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_SF_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_SF_STRG_VAL 0x7b04 #define GEN6_SF_RDATA 0x7b18 #define GEN6_WIZ_CTL 0x7c00 #define GEN6_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 #define GEN6_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) #define GEN6_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) #define GEN6_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) #define GEN6_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) #define GEN6_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) #define GEN6_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) #define GEN6_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) #define GEN6_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define GEN6_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define GEN6_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_WIZ_STRG_VAL 0x7c04 #define GEN6_WIZ_RDATA 0x7c18 #define GEN6_TS_CTL 0x7e00 #define GEN6_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define GEN6_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) #define GEN6_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) #define GEN6_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) #define GEN6_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) #define GEN6_TS_CTL_SNAPSHOT_ENABLE (1 << 0) #define GEN6_TS_STRG_VAL 0x7e04 #define GEN6_TS_RDATA 0x7e08 #define GEN6_TD_CTL 0x8000 #define GEN6_TD_CTL_MUX_SHIFT 8 #define GEN6_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define GEN6_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) #define GEN6_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) #define GEN6_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) #define GEN6_TD_CTL_BREAKPOINT_ENABLE (1 << 2) #define GEN6_TD_CTL2 0x8004 #define GEN6_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) #define GEN6_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) #define GEN6_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) #define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 #define GEN6_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) #define GEN6_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) #define GEN6_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) #define GEN6_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) #define GEN6_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) #define GEN6_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) #define GEN6_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) #define GEN6_TD_VF_VS_EMSK 0x8008 #define GEN6_TD_GS_EMSK 0x800c #define GEN6_TD_CLIP_EMSK 0x8010 #define GEN6_TD_SF_EMSK 0x8014 #define GEN6_TD_WIZ_EMSK 0x8018 #define GEN6_TD_0_6_EHTRG_VAL 0x801c #define GEN6_TD_0_7_EHTRG_VAL 0x8020 #define GEN6_TD_0_6_EHTRG_MSK 0x8024 #define GEN6_TD_0_7_EHTRG_MSK 0x8028 #define GEN6_TD_RDATA 0x802c #define GEN6_TD_TS_EMSK 0x8030 #define GEN6_EU_CTL 0x8800 #define GEN6_EU_CTL_SELECT_SHIFT 16 #define GEN6_EU_CTL_DATA_MUX_SHIFT 8 #define GEN6_EU_ATT_0 0x8810 #define GEN6_EU_ATT_1 0x8814 #define GEN6_EU_ATT_DATA_0 0x8820 #define GEN6_EU_ATT_DATA_1 0x8824 #define GEN6_EU_ATT_CLR_0 0x8830 #define GEN6_EU_ATT_CLR_1 0x8834 #define GEN6_EU_RDATA 0x8840 /* 3D state: */ #define _3DOP_3DSTATE_PIPELINED 0x0 #define _3DOP_3DSTATE_NONPIPELINED 0x1 #define _3DOP_3DCONTROL 0x2 #define _3DOP_3DPRIMITIVE 0x3 #define _3DSTATE_PIPELINED_POINTERS 0x00 #define _3DSTATE_BINDING_TABLE_POINTERS 0x01 #define _3DSTATE_VERTEX_BUFFERS 0x08 #define _3DSTATE_VERTEX_ELEMENTS 0x09 #define _3DSTATE_INDEX_BUFFER 0x0A #define _3DSTATE_VF_STATISTICS 0x0B #define _3DSTATE_DRAWING_RECTANGLE 0x00 #define _3DSTATE_CONSTANT_COLOR 0x01 #define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02 #define _3DSTATE_CHROMA_KEY 0x04 #define _3DSTATE_DEPTH_BUFFER 0x05 #define _3DSTATE_POLY_STIPPLE_OFFSET 0x06 #define _3DSTATE_POLY_STIPPLE_PATTERN 0x07 #define _3DSTATE_LINE_STIPPLE 0x08 #define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09 #define _3DCONTROL 0x00 #define _3DPRIMITIVE 0x00 #define _3DPRIM_POINTLIST 0x01 #define _3DPRIM_LINELIST 0x02 #define _3DPRIM_LINESTRIP 0x03 #define _3DPRIM_TRILIST 0x04 #define _3DPRIM_TRISTRIP 0x05 #define _3DPRIM_TRIFAN 0x06 #define _3DPRIM_QUADLIST 0x07 #define _3DPRIM_QUADSTRIP 0x08 #define _3DPRIM_LINELIST_ADJ 0x09 #define _3DPRIM_LINESTRIP_ADJ 0x0A #define _3DPRIM_TRILIST_ADJ 0x0B #define _3DPRIM_TRISTRIP_ADJ 0x0C #define _3DPRIM_TRISTRIP_REVERSE 0x0D #define _3DPRIM_POLYGON 0x0E #define _3DPRIM_RECTLIST 0x0F #define _3DPRIM_LINELOOP 0x10 #define _3DPRIM_POINTLIST_BF 0x11 #define _3DPRIM_LINESTRIP_CONT 0x12 #define _3DPRIM_LINESTRIP_BF 0x13 #define _3DPRIM_LINESTRIP_CONT_BF 0x14 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 #define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 #define GEN6_ANISORATIO_2 0 #define GEN6_ANISORATIO_4 1 #define GEN6_ANISORATIO_6 2 #define GEN6_ANISORATIO_8 3 #define GEN6_ANISORATIO_10 4 #define GEN6_ANISORATIO_12 5 #define GEN6_ANISORATIO_14 6 #define GEN6_ANISORATIO_16 7 #define GEN6_BLENDFACTOR_ONE 0x1 #define GEN6_BLENDFACTOR_SRC_COLOR 0x2 #define GEN6_BLENDFACTOR_SRC_ALPHA 0x3 #define GEN6_BLENDFACTOR_DST_ALPHA 0x4 #define GEN6_BLENDFACTOR_DST_COLOR 0x5 #define GEN6_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 #define GEN6_BLENDFACTOR_CONST_COLOR 0x7 #define GEN6_BLENDFACTOR_CONST_ALPHA 0x8 #define GEN6_BLENDFACTOR_SRC1_COLOR 0x9 #define GEN6_BLENDFACTOR_SRC1_ALPHA 0x0A #define GEN6_BLENDFACTOR_ZERO 0x11 #define GEN6_BLENDFACTOR_INV_SRC_COLOR 0x12 #define GEN6_BLENDFACTOR_INV_SRC_ALPHA 0x13 #define GEN6_BLENDFACTOR_INV_DST_ALPHA 0x14 #define GEN6_BLENDFACTOR_INV_DST_COLOR 0x15 #define GEN6_BLENDFACTOR_INV_CONST_COLOR 0x17 #define GEN6_BLENDFACTOR_INV_CONST_ALPHA 0x18 #define GEN6_BLENDFACTOR_INV_SRC1_COLOR 0x19 #define GEN6_BLENDFACTOR_INV_SRC1_ALPHA 0x1A #define GEN6_BLENDFUNCTION_ADD 0 #define GEN6_BLENDFUNCTION_SUBTRACT 1 #define GEN6_BLENDFUNCTION_REVERSE_SUBTRACT 2 #define GEN6_BLENDFUNCTION_MIN 3 #define GEN6_BLENDFUNCTION_MAX 4 #define GEN6_ALPHATEST_FORMAT_UNORM8 0 #define GEN6_ALPHATEST_FORMAT_FLOAT32 1 #define GEN6_CHROMAKEY_KILL_ON_ANY_MATCH 0 #define GEN6_CHROMAKEY_REPLACE_BLACK 1 #define GEN6_CLIP_API_OGL 0 #define GEN6_CLIP_API_DX 1 #define GEN6_CLIPMODE_NORMAL 0 #define GEN6_CLIPMODE_CLIP_ALL 1 #define GEN6_CLIPMODE_CLIP_NON_REJECTED 2 #define GEN6_CLIPMODE_REJECT_ALL 3 #define GEN6_CLIPMODE_ACCEPT_ALL 4 #define GEN6_CLIP_NDCSPACE 0 #define GEN6_CLIP_SCREENSPACE 1 #define GEN6_COMPAREFUNCTION_ALWAYS 0 #define GEN6_COMPAREFUNCTION_NEVER 1 #define GEN6_COMPAREFUNCTION_LESS 2 #define GEN6_COMPAREFUNCTION_EQUAL 3 #define GEN6_COMPAREFUNCTION_LEQUAL 4 #define GEN6_COMPAREFUNCTION_GREATER 5 #define GEN6_COMPAREFUNCTION_NOTEQUAL 6 #define GEN6_COMPAREFUNCTION_GEQUAL 7 #define GEN6_COVERAGE_PIXELS_HALF 0 #define GEN6_COVERAGE_PIXELS_1 1 #define GEN6_COVERAGE_PIXELS_2 2 #define GEN6_COVERAGE_PIXELS_4 3 #define GEN6_CULLMODE_BOTH 0 #define GEN6_CULLMODE_NONE 1 #define GEN6_CULLMODE_FRONT 2 #define GEN6_CULLMODE_BACK 3 #define GEN6_DEFAULTCOLOR_R8G8B8A8_UNORM 0 #define GEN6_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 #define GEN6_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 #define GEN6_DEPTHFORMAT_D32_FLOAT 1 #define GEN6_DEPTHFORMAT_D24_UNORM_S8_UINT 2 #define GEN6_DEPTHFORMAT_D16_UNORM 5 #define GEN6_FLOATING_POINT_IEEE_754 0 #define GEN6_FLOATING_POINT_NON_IEEE_754 1 #define GEN6_FRONTWINDING_CW 0 #define GEN6_FRONTWINDING_CCW 1 #define GEN6_INDEX_BYTE 0 #define GEN6_INDEX_WORD 1 #define GEN6_INDEX_DWORD 2 #define GEN6_LOGICOPFUNCTION_CLEAR 0 #define GEN6_LOGICOPFUNCTION_NOR 1 #define GEN6_LOGICOPFUNCTION_AND_INVERTED 2 #define GEN6_LOGICOPFUNCTION_COPY_INVERTED 3 #define GEN6_LOGICOPFUNCTION_AND_REVERSE 4 #define GEN6_LOGICOPFUNCTION_INVERT 5 #define GEN6_LOGICOPFUNCTION_XOR 6 #define GEN6_LOGICOPFUNCTION_NAND 7 #define GEN6_LOGICOPFUNCTION_AND 8 #define GEN6_LOGICOPFUNCTION_EQUIV 9 #define GEN6_LOGICOPFUNCTION_NOOP 10 #define GEN6_LOGICOPFUNCTION_OR_INVERTED 11 #define GEN6_LOGICOPFUNCTION_COPY 12 #define GEN6_LOGICOPFUNCTION_OR_REVERSE 13 #define GEN6_LOGICOPFUNCTION_OR 14 #define GEN6_LOGICOPFUNCTION_SET 15 #define GEN6_MAPFILTER_NEAREST 0x0 #define GEN6_MAPFILTER_LINEAR 0x1 #define GEN6_MAPFILTER_ANISOTROPIC 0x2 #define GEN6_MIPFILTER_NONE 0 #define GEN6_MIPFILTER_NEAREST 1 #define GEN6_MIPFILTER_LINEAR 3 #define GEN6_POLYGON_FRONT_FACING 0 #define GEN6_POLYGON_BACK_FACING 1 #define GEN6_PREFILTER_ALWAYS 0x0 #define GEN6_PREFILTER_NEVER 0x1 #define GEN6_PREFILTER_LESS 0x2 #define GEN6_PREFILTER_EQUAL 0x3 #define GEN6_PREFILTER_LEQUAL 0x4 #define GEN6_PREFILTER_GREATER 0x5 #define GEN6_PREFILTER_NOTEQUAL 0x6 #define GEN6_PREFILTER_GEQUAL 0x7 #define GEN6_PROVOKING_VERTEX_0 0 #define GEN6_PROVOKING_VERTEX_1 1 #define GEN6_PROVOKING_VERTEX_2 2 #define GEN6_RASTRULE_UPPER_LEFT 0 #define GEN6_RASTRULE_UPPER_RIGHT 1 #define GEN6_RENDERTARGET_CLAMPRANGE_UNORM 0 #define GEN6_RENDERTARGET_CLAMPRANGE_SNORM 1 #define GEN6_RENDERTARGET_CLAMPRANGE_FORMAT 2 #define GEN6_STENCILOP_KEEP 0 #define GEN6_STENCILOP_ZERO 1 #define GEN6_STENCILOP_REPLACE 2 #define GEN6_STENCILOP_INCRSAT 3 #define GEN6_STENCILOP_DECRSAT 4 #define GEN6_STENCILOP_INCR 5 #define GEN6_STENCILOP_DECR 6 #define GEN6_STENCILOP_INVERT 7 #define GEN6_SURFACE_MIPMAPLAYOUT_BELOW 0 #define GEN6_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define GEN6_SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define GEN6_SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define GEN6_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define GEN6_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define GEN6_SURFACEFORMAT_R64G64_FLOAT 0x005 #define GEN6_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define GEN6_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define GEN6_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define GEN6_SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define GEN6_SURFACEFORMAT_R32G32B32_SINT 0x041 #define GEN6_SURFACEFORMAT_R32G32B32_UINT 0x042 #define GEN6_SURFACEFORMAT_R32G32B32_UNORM 0x043 #define GEN6_SURFACEFORMAT_R32G32B32_SNORM 0x044 #define GEN6_SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define GEN6_SURFACEFORMAT_R32G32B32_USCALED 0x046 #define GEN6_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define GEN6_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define GEN6_SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define GEN6_SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define GEN6_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define GEN6_SURFACEFORMAT_R32G32_FLOAT 0x085 #define GEN6_SURFACEFORMAT_R32G32_SINT 0x086 #define GEN6_SURFACEFORMAT_R32G32_UINT 0x087 #define GEN6_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define GEN6_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define GEN6_SURFACEFORMAT_L32A32_FLOAT 0x08A #define GEN6_SURFACEFORMAT_R32G32_UNORM 0x08B #define GEN6_SURFACEFORMAT_R32G32_SNORM 0x08C #define GEN6_SURFACEFORMAT_R64_FLOAT 0x08D #define GEN6_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define GEN6_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define GEN6_SURFACEFORMAT_A32X32_FLOAT 0x090 #define GEN6_SURFACEFORMAT_L32X32_FLOAT 0x091 #define GEN6_SURFACEFORMAT_I32X32_FLOAT 0x092 #define GEN6_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define GEN6_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define GEN6_SURFACEFORMAT_R32G32_SSCALED 0x095 #define GEN6_SURFACEFORMAT_R32G32_USCALED 0x096 #define GEN6_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define GEN6_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define GEN6_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define GEN6_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define GEN6_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define GEN6_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define GEN6_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define GEN6_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define GEN6_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define GEN6_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define GEN6_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define GEN6_SURFACEFORMAT_R16G16_UNORM 0x0CC #define GEN6_SURFACEFORMAT_R16G16_SNORM 0x0CD #define GEN6_SURFACEFORMAT_R16G16_SINT 0x0CE #define GEN6_SURFACEFORMAT_R16G16_UINT 0x0CF #define GEN6_SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define GEN6_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define GEN6_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define GEN6_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define GEN6_SURFACEFORMAT_R32_SINT 0x0D6 #define GEN6_SURFACEFORMAT_R32_UINT 0x0D7 #define GEN6_SURFACEFORMAT_R32_FLOAT 0x0D8 #define GEN6_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define GEN6_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define GEN6_SURFACEFORMAT_L16A16_UNORM 0x0DF #define GEN6_SURFACEFORMAT_I24X8_UNORM 0x0E0 #define GEN6_SURFACEFORMAT_L24X8_UNORM 0x0E1 #define GEN6_SURFACEFORMAT_A24X8_UNORM 0x0E2 #define GEN6_SURFACEFORMAT_I32_FLOAT 0x0E3 #define GEN6_SURFACEFORMAT_L32_FLOAT 0x0E4 #define GEN6_SURFACEFORMAT_A32_FLOAT 0x0E5 #define GEN6_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define GEN6_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define GEN6_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define GEN6_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define GEN6_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define GEN6_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define GEN6_SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define GEN6_SURFACEFORMAT_R32_UNORM 0x0F1 #define GEN6_SURFACEFORMAT_R32_SNORM 0x0F2 #define GEN6_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define GEN6_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define GEN6_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define GEN6_SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define GEN6_SURFACEFORMAT_R16G16_USCALED 0x0F7 #define GEN6_SURFACEFORMAT_R32_SSCALED 0x0F8 #define GEN6_SURFACEFORMAT_R32_USCALED 0x0F9 #define GEN6_SURFACEFORMAT_B5G6R5_UNORM 0x100 #define GEN6_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define GEN6_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define GEN6_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define GEN6_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define GEN6_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define GEN6_SURFACEFORMAT_R8G8_UNORM 0x106 #define GEN6_SURFACEFORMAT_R8G8_SNORM 0x107 #define GEN6_SURFACEFORMAT_R8G8_SINT 0x108 #define GEN6_SURFACEFORMAT_R8G8_UINT 0x109 #define GEN6_SURFACEFORMAT_R16_UNORM 0x10A #define GEN6_SURFACEFORMAT_R16_SNORM 0x10B #define GEN6_SURFACEFORMAT_R16_SINT 0x10C #define GEN6_SURFACEFORMAT_R16_UINT 0x10D #define GEN6_SURFACEFORMAT_R16_FLOAT 0x10E #define GEN6_SURFACEFORMAT_I16_UNORM 0x111 #define GEN6_SURFACEFORMAT_L16_UNORM 0x112 #define GEN6_SURFACEFORMAT_A16_UNORM 0x113 #define GEN6_SURFACEFORMAT_L8A8_UNORM 0x114 #define GEN6_SURFACEFORMAT_I16_FLOAT 0x115 #define GEN6_SURFACEFORMAT_L16_FLOAT 0x116 #define GEN6_SURFACEFORMAT_A16_FLOAT 0x117 #define GEN6_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define GEN6_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define GEN6_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define GEN6_SURFACEFORMAT_R8G8_SSCALED 0x11C #define GEN6_SURFACEFORMAT_R8G8_USCALED 0x11D #define GEN6_SURFACEFORMAT_R16_SSCALED 0x11E #define GEN6_SURFACEFORMAT_R16_USCALED 0x11F #define GEN6_SURFACEFORMAT_R8_UNORM 0x140 #define GEN6_SURFACEFORMAT_R8_SNORM 0x141 #define GEN6_SURFACEFORMAT_R8_SINT 0x142 #define GEN6_SURFACEFORMAT_R8_UINT 0x143 #define GEN6_SURFACEFORMAT_A8_UNORM 0x144 #define GEN6_SURFACEFORMAT_I8_UNORM 0x145 #define GEN6_SURFACEFORMAT_L8_UNORM 0x146 #define GEN6_SURFACEFORMAT_P4A4_UNORM 0x147 #define GEN6_SURFACEFORMAT_A4P4_UNORM 0x148 #define GEN6_SURFACEFORMAT_R8_SSCALED 0x149 #define GEN6_SURFACEFORMAT_R8_USCALED 0x14A #define GEN6_SURFACEFORMAT_R1_UINT 0x181 #define GEN6_SURFACEFORMAT_YCRCB_NORMAL 0x182 #define GEN6_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define GEN6_SURFACEFORMAT_BC1_UNORM 0x186 #define GEN6_SURFACEFORMAT_BC2_UNORM 0x187 #define GEN6_SURFACEFORMAT_BC3_UNORM 0x188 #define GEN6_SURFACEFORMAT_BC4_UNORM 0x189 #define GEN6_SURFACEFORMAT_BC5_UNORM 0x18A #define GEN6_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define GEN6_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define GEN6_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define GEN6_SURFACEFORMAT_MONO8 0x18E #define GEN6_SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define GEN6_SURFACEFORMAT_YCRCB_SWAPY 0x190 #define GEN6_SURFACEFORMAT_DXT1_RGB 0x191 #define GEN6_SURFACEFORMAT_FXT1 0x192 #define GEN6_SURFACEFORMAT_R8G8B8_UNORM 0x193 #define GEN6_SURFACEFORMAT_R8G8B8_SNORM 0x194 #define GEN6_SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define GEN6_SURFACEFORMAT_R8G8B8_USCALED 0x196 #define GEN6_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define GEN6_SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define GEN6_SURFACEFORMAT_BC4_SNORM 0x199 #define GEN6_SURFACEFORMAT_BC5_SNORM 0x19A #define GEN6_SURFACEFORMAT_R16G16B16_UNORM 0x19C #define GEN6_SURFACEFORMAT_R16G16B16_SNORM 0x19D #define GEN6_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define GEN6_SURFACEFORMAT_R16G16B16_USCALED 0x19F #define GEN6_SURFACERETURNFORMAT_FLOAT32 0 #define GEN6_SURFACERETURNFORMAT_S1 1 #define GEN6_SURFACE_1D 0 #define GEN6_SURFACE_2D 1 #define GEN6_SURFACE_3D 2 #define GEN6_SURFACE_CUBE 3 #define GEN6_SURFACE_BUFFER 4 #define GEN6_SURFACE_NULL 7 #define GEN6_BORDER_COLOR_MODE_DEFAULT 0 #define GEN6_BORDER_COLOR_MODE_LEGACY 1 #define GEN6_TEXCOORDMODE_WRAP 0 #define GEN6_TEXCOORDMODE_MIRROR 1 #define GEN6_TEXCOORDMODE_CLAMP 2 #define GEN6_TEXCOORDMODE_CUBE 3 #define GEN6_TEXCOORDMODE_CLAMP_BORDER 4 #define GEN6_TEXCOORDMODE_MIRROR_ONCE 5 #define GEN6_THREAD_PRIORITY_NORMAL 0 #define GEN6_THREAD_PRIORITY_HIGH 1 #define GEN6_TILEWALK_XMAJOR 0 #define GEN6_TILEWALK_YMAJOR 1 #define GEN6_VERTEX_SUBPIXEL_PRECISION_8BITS 0 #define GEN6_VERTEX_SUBPIXEL_PRECISION_4BITS 1 #define GEN6_VERTEXBUFFER_ACCESS_VERTEXDATA 0 #define GEN6_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 #define GEN6_VFCOMPONENT_NOSTORE 0 #define GEN6_VFCOMPONENT_STORE_SRC 1 #define GEN6_VFCOMPONENT_STORE_0 2 #define GEN6_VFCOMPONENT_STORE_1_FLT 3 #define GEN6_VFCOMPONENT_STORE_1_INT 4 #define GEN6_VFCOMPONENT_STORE_VID 5 #define GEN6_VFCOMPONENT_STORE_IID 6 #define GEN6_VFCOMPONENT_STORE_PID 7 /* Execution Unit (EU) defines */ #define GEN6_ALIGN_1 0 #define GEN6_ALIGN_16 1 #define GEN6_ADDRESS_DIRECT 0 #define GEN6_ADDRESS_REGISTER_INDIRECT_REGISTER 1 #define GEN6_CHANNEL_X 0 #define GEN6_CHANNEL_Y 1 #define GEN6_CHANNEL_Z 2 #define GEN6_CHANNEL_W 3 #define GEN6_COMPRESSION_NONE 0 #define GEN6_COMPRESSION_2NDHALF 1 #define GEN6_COMPRESSION_COMPRESSED 2 #define GEN6_CONDITIONAL_NONE 0 #define GEN6_CONDITIONAL_Z 1 #define GEN6_CONDITIONAL_NZ 2 #define GEN6_CONDITIONAL_EQ 1 /* Z */ #define GEN6_CONDITIONAL_NEQ 2 /* NZ */ #define GEN6_CONDITIONAL_G 3 #define GEN6_CONDITIONAL_GE 4 #define GEN6_CONDITIONAL_L 5 #define GEN6_CONDITIONAL_LE 6 #define GEN6_CONDITIONAL_C 7 #define GEN6_CONDITIONAL_O 8 #define GEN6_DEBUG_NONE 0 #define GEN6_DEBUG_BREAKPOINT 1 #define GEN6_DEPENDENCY_NORMAL 0 #define GEN6_DEPENDENCY_NOTCLEARED 1 #define GEN6_DEPENDENCY_NOTCHECKED 2 #define GEN6_DEPENDENCY_DISABLE 3 #define GEN6_EXECUTE_1 0 #define GEN6_EXECUTE_2 1 #define GEN6_EXECUTE_4 2 #define GEN6_EXECUTE_8 3 #define GEN6_EXECUTE_16 4 #define GEN6_EXECUTE_32 5 #define GEN6_HORIZONTAL_STRIDE_0 0 #define GEN6_HORIZONTAL_STRIDE_1 1 #define GEN6_HORIZONTAL_STRIDE_2 2 #define GEN6_HORIZONTAL_STRIDE_4 3 #define GEN6_INSTRUCTION_NORMAL 0 #define GEN6_INSTRUCTION_SATURATE 1 #define GEN6_MASK_ENABLE 0 #define GEN6_MASK_DISABLE 1 #define GEN6_OPCODE_MOV 1 #define GEN6_OPCODE_SEL 2 #define GEN6_OPCODE_NOT 4 #define GEN6_OPCODE_AND 5 #define GEN6_OPCODE_OR 6 #define GEN6_OPCODE_XOR 7 #define GEN6_OPCODE_SHR 8 #define GEN6_OPCODE_SHL 9 #define GEN6_OPCODE_RSR 10 #define GEN6_OPCODE_RSL 11 #define GEN6_OPCODE_ASR 12 #define GEN6_OPCODE_CMP 16 #define GEN6_OPCODE_JMPI 32 #define GEN6_OPCODE_IF 34 #define GEN6_OPCODE_IFF 35 #define GEN6_OPCODE_ELSE 36 #define GEN6_OPCODE_ENDIF 37 #define GEN6_OPCODE_DO 38 #define GEN6_OPCODE_WHILE 39 #define GEN6_OPCODE_BREAK 40 #define GEN6_OPCODE_CONTINUE 41 #define GEN6_OPCODE_HALT 42 #define GEN6_OPCODE_MSAVE 44 #define GEN6_OPCODE_MRESTORE 45 #define GEN6_OPCODE_PUSH 46 #define GEN6_OPCODE_POP 47 #define GEN6_OPCODE_WAIT 48 #define GEN6_OPCODE_SEND 49 #define GEN6_OPCODE_ADD 64 #define GEN6_OPCODE_MUL 65 #define GEN6_OPCODE_AVG 66 #define GEN6_OPCODE_FRC 67 #define GEN6_OPCODE_RNDU 68 #define GEN6_OPCODE_RNDD 69 #define GEN6_OPCODE_RNDE 70 #define GEN6_OPCODE_RNDZ 71 #define GEN6_OPCODE_MAC 72 #define GEN6_OPCODE_MACH 73 #define GEN6_OPCODE_LZD 74 #define GEN6_OPCODE_SAD2 80 #define GEN6_OPCODE_SADA2 81 #define GEN6_OPCODE_DP4 84 #define GEN6_OPCODE_DPH 85 #define GEN6_OPCODE_DP3 86 #define GEN6_OPCODE_DP2 87 #define GEN6_OPCODE_DPA2 88 #define GEN6_OPCODE_LINE 89 #define GEN6_OPCODE_NOP 126 #define GEN6_PREDICATE_NONE 0 #define GEN6_PREDICATE_NORMAL 1 #define GEN6_PREDICATE_ALIGN1_ANYV 2 #define GEN6_PREDICATE_ALIGN1_ALLV 3 #define GEN6_PREDICATE_ALIGN1_ANY2H 4 #define GEN6_PREDICATE_ALIGN1_ALL2H 5 #define GEN6_PREDICATE_ALIGN1_ANY4H 6 #define GEN6_PREDICATE_ALIGN1_ALL4H 7 #define GEN6_PREDICATE_ALIGN1_ANY8H 8 #define GEN6_PREDICATE_ALIGN1_ALL8H 9 #define GEN6_PREDICATE_ALIGN1_ANY16H 10 #define GEN6_PREDICATE_ALIGN1_ALL16H 11 #define GEN6_PREDICATE_ALIGN16_REPLICATE_X 2 #define GEN6_PREDICATE_ALIGN16_REPLICATE_Y 3 #define GEN6_PREDICATE_ALIGN16_REPLICATE_Z 4 #define GEN6_PREDICATE_ALIGN16_REPLICATE_W 5 #define GEN6_PREDICATE_ALIGN16_ANY4H 6 #define GEN6_PREDICATE_ALIGN16_ALL4H 7 #define GEN6_ARCHITECTURE_REGISTER_FILE 0 #define GEN6_GENERAL_REGISTER_FILE 1 #define GEN6_MESSAGE_REGISTER_FILE 2 #define GEN6_IMMEDIATE_VALUE 3 #define GEN6_REGISTER_TYPE_UD 0 #define GEN6_REGISTER_TYPE_D 1 #define GEN6_REGISTER_TYPE_UW 2 #define GEN6_REGISTER_TYPE_W 3 #define GEN6_REGISTER_TYPE_UB 4 #define GEN6_REGISTER_TYPE_B 5 #define GEN6_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ #define GEN6_REGISTER_TYPE_HF 6 #define GEN6_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ #define GEN6_REGISTER_TYPE_F 7 #define GEN6_ARF_NULL 0x00 #define GEN6_ARF_ADDRESS 0x10 #define GEN6_ARF_ACCUMULATOR 0x20 #define GEN6_ARF_FLAG 0x30 #define GEN6_ARF_MASK 0x40 #define GEN6_ARF_MASK_STACK 0x50 #define GEN6_ARF_MASK_STACK_DEPTH 0x60 #define GEN6_ARF_STATE 0x70 #define GEN6_ARF_CONTROL 0x80 #define GEN6_ARF_NOTIFICATION_COUNT 0x90 #define GEN6_ARF_IP 0xA0 #define GEN6_AMASK 0 #define GEN6_IMASK 1 #define GEN6_LMASK 2 #define GEN6_CMASK 3 #define GEN6_THREAD_NORMAL 0 #define GEN6_THREAD_ATOMIC 1 #define GEN6_THREAD_SWITCH 2 #define GEN6_VERTICAL_STRIDE_0 0 #define GEN6_VERTICAL_STRIDE_1 1 #define GEN6_VERTICAL_STRIDE_2 2 #define GEN6_VERTICAL_STRIDE_4 3 #define GEN6_VERTICAL_STRIDE_8 4 #define GEN6_VERTICAL_STRIDE_16 5 #define GEN6_VERTICAL_STRIDE_32 6 #define GEN6_VERTICAL_STRIDE_64 7 #define GEN6_VERTICAL_STRIDE_128 8 #define GEN6_VERTICAL_STRIDE_256 9 #define GEN6_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF #define GEN6_WIDTH_1 0 #define GEN6_WIDTH_2 1 #define GEN6_WIDTH_4 2 #define GEN6_WIDTH_8 3 #define GEN6_WIDTH_16 4 #define GEN6_STATELESS_BUFFER_BOUNDARY_1K 0 #define GEN6_STATELESS_BUFFER_BOUNDARY_2K 1 #define GEN6_STATELESS_BUFFER_BOUNDARY_4K 2 #define GEN6_STATELESS_BUFFER_BOUNDARY_8K 3 #define GEN6_STATELESS_BUFFER_BOUNDARY_16K 4 #define GEN6_STATELESS_BUFFER_BOUNDARY_32K 5 #define GEN6_STATELESS_BUFFER_BOUNDARY_64K 6 #define GEN6_STATELESS_BUFFER_BOUNDARY_128K 7 #define GEN6_STATELESS_BUFFER_BOUNDARY_256K 8 #define GEN6_STATELESS_BUFFER_BOUNDARY_512K 9 #define GEN6_STATELESS_BUFFER_BOUNDARY_1M 10 #define GEN6_STATELESS_BUFFER_BOUNDARY_2M 11 #define GEN6_POLYGON_FACING_FRONT 0 #define GEN6_POLYGON_FACING_BACK 1 #define GEN6_MESSAGE_TARGET_NULL 0 #define GEN6_MESSAGE_TARGET_MATH 1 #define GEN6_MESSAGE_TARGET_SAMPLER 2 #define GEN6_MESSAGE_TARGET_GATEWAY 3 #define GEN6_MESSAGE_TARGET_DATAPORT_READ 4 #define GEN6_MESSAGE_TARGET_DATAPORT_WRITE 5 #define GEN6_MESSAGE_TARGET_URB 6 #define GEN6_MESSAGE_TARGET_THREAD_SPAWNER 7 #define GEN6_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define GEN6_SAMPLER_RETURN_FORMAT_UINT32 2 #define GEN6_SAMPLER_RETURN_FORMAT_SINT32 3 #define GEN6_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 #define GEN6_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 #define GEN6_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 #define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 #define GEN6_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 #define GEN6_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 #define GEN6_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 #define GEN6_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 #define GEN6_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 #define GEN6_SAMPLER_MESSAGE_SIMD8_RESINFO 2 #define GEN6_SAMPLER_MESSAGE_SIMD16_RESINFO 2 #define GEN6_SAMPLER_MESSAGE_SIMD4X2_LD 3 #define GEN6_SAMPLER_MESSAGE_SIMD8_LD 3 #define GEN6_SAMPLER_MESSAGE_SIMD16_LD 3 #define GEN6_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 #define GEN6_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 #define GEN6_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define GEN6_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define GEN6_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define GEN6_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define GEN6_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 #define GEN6_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define GEN6_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 #define GEN6_DATAPORT_READ_TARGET_DATA_CACHE 0 #define GEN6_DATAPORT_READ_TARGET_RENDER_CACHE 1 #define GEN6_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 #define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 #define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 #define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 #define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 #define GEN6_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 #define GEN6_MATH_INTEGER_UNSIGNED 0 #define GEN6_MATH_INTEGER_SIGNED 1 #define GEN6_MATH_PRECISION_FULL 0 #define GEN6_MATH_PRECISION_PARTIAL 1 #define GEN6_MATH_SATURATE_NONE 0 #define GEN6_MATH_SATURATE_SATURATE 1 #define GEN6_MATH_DATA_VECTOR 0 #define GEN6_MATH_DATA_SCALAR 1 #define GEN6_URB_OPCODE_WRITE 0 #define GEN6_URB_SWIZZLE_NONE 0 #define GEN6_URB_SWIZZLE_INTERLEAVE 1 #define GEN6_URB_SWIZZLE_TRANSPOSE 2 #define GEN6_SCRATCH_SPACE_SIZE_1K 0 #define GEN6_SCRATCH_SPACE_SIZE_2K 1 #define GEN6_SCRATCH_SPACE_SIZE_4K 2 #define GEN6_SCRATCH_SPACE_SIZE_8K 3 #define GEN6_SCRATCH_SPACE_SIZE_16K 4 #define GEN6_SCRATCH_SPACE_SIZE_32K 5 #define GEN6_SCRATCH_SPACE_SIZE_64K 6 #define GEN6_SCRATCH_SPACE_SIZE_128K 7 #define GEN6_SCRATCH_SPACE_SIZE_256K 8 #define GEN6_SCRATCH_SPACE_SIZE_512K 9 #define GEN6_SCRATCH_SPACE_SIZE_1M 10 #define GEN6_SCRATCH_SPACE_SIZE_2M 11 /* The hardware supports two different modes for border color. The * default (OpenGL) mode uses floating-point color channels, while the * legacy mode uses 4 bytes. * * More significantly, the legacy mode respects the components of the * border color for channels not present in the source, (whereas the * default mode will ignore the border color's alpha channel and use * alpha==1 for an RGB source, for example). * * The legacy mode matches the semantics specified by the Render * extension. */ struct gen6_sampler_default_border_color { float color[4]; }; struct gen6_sampler_legacy_border_color { uint8_t color[4]; }; struct gen6_sampler_state { struct { uint32_t shadow_function:3; uint32_t lod_bias:11; uint32_t min_filter:3; uint32_t mag_filter:3; uint32_t mip_filter:2; uint32_t base_level:5; uint32_t pad:1; uint32_t lod_preclamp:1; uint32_t border_color_mode:1; uint32_t pad0:1; uint32_t disable:1; } ss0; struct { uint32_t r_wrap_mode:3; uint32_t t_wrap_mode:3; uint32_t s_wrap_mode:3; uint32_t pad:3; uint32_t max_lod:10; uint32_t min_lod:10; } ss1; struct { uint32_t border_color; } ss2; struct { uint32_t non_normalized_coord:1; uint32_t pad:12; uint32_t address_round:6; uint32_t max_aniso:3; uint32_t chroma_key_mode:1; uint32_t chroma_key_index:2; uint32_t chroma_key_enable:1; uint32_t monochrome_filter_width:3; uint32_t monochrome_filter_height:3; } ss3; }; struct gen6_blend_state { struct { uint32_t dest_blend_factor:5; uint32_t source_blend_factor:5; uint32_t pad3:1; uint32_t blend_func:3; uint32_t pad2:1; uint32_t ia_dest_blend_factor:5; uint32_t ia_source_blend_factor:5; uint32_t pad1:1; uint32_t ia_blend_func:3; uint32_t pad0:1; uint32_t ia_blend_enable:1; uint32_t blend_enable:1; } blend0; struct { uint32_t post_blend_clamp_enable:1; uint32_t pre_blend_clamp_enable:1; uint32_t clamp_range:2; uint32_t pad0:4; uint32_t x_dither_offset:2; uint32_t y_dither_offset:2; uint32_t dither_enable:1; uint32_t alpha_test_func:3; uint32_t alpha_test_enable:1; uint32_t pad1:1; uint32_t logic_op_func:4; uint32_t logic_op_enable:1; uint32_t pad2:1; uint32_t write_disable_b:1; uint32_t write_disable_g:1; uint32_t write_disable_r:1; uint32_t write_disable_a:1; uint32_t pad3:1; uint32_t alpha_to_coverage_dither:1; uint32_t alpha_to_one:1; uint32_t alpha_to_coverage:1; } blend1; }; struct gen6_color_calc_state { struct { uint32_t alpha_test_format:1; uint32_t pad0:14; uint32_t round_disable:1; uint32_t bf_stencil_ref:8; uint32_t stencil_ref:8; } cc0; union { float alpha_ref_f; struct { uint32_t ui:8; uint32_t pad0:24; } alpha_ref_fi; } cc1; float constant_r; float constant_g; float constant_b; float constant_a; }; struct gen6_depth_stencil_state { struct { uint32_t pad0:3; uint32_t bf_stencil_pass_depth_pass_op:3; uint32_t bf_stencil_pass_depth_fail_op:3; uint32_t bf_stencil_fail_op:3; uint32_t bf_stencil_func:3; uint32_t bf_stencil_enable:1; uint32_t pad1:2; uint32_t stencil_write_enable:1; uint32_t stencil_pass_depth_pass_op:3; uint32_t stencil_pass_depth_fail_op:3; uint32_t stencil_fail_op:3; uint32_t stencil_func:3; uint32_t stencil_enable:1; } ds0; struct { uint32_t bf_stencil_write_mask:8; uint32_t bf_stencil_test_mask:8; uint32_t stencil_write_mask:8; uint32_t stencil_test_mask:8; } ds1; struct { uint32_t pad0:26; uint32_t depth_write_enable:1; uint32_t depth_test_func:3; uint32_t pad1:1; uint32_t depth_test_enable:1; } ds2; }; struct gen6_surface_state { struct { uint32_t cube_pos_z:1; uint32_t cube_neg_z:1; uint32_t cube_pos_y:1; uint32_t cube_neg_y:1; uint32_t cube_pos_x:1; uint32_t cube_neg_x:1; uint32_t pad:3; uint32_t render_cache_read_mode:1; uint32_t mipmap_layout_mode:1; uint32_t vert_line_stride_ofs:1; uint32_t vert_line_stride:1; uint32_t color_blend:1; uint32_t writedisable_blue:1; uint32_t writedisable_green:1; uint32_t writedisable_red:1; uint32_t writedisable_alpha:1; uint32_t surface_format:9; uint32_t data_return_format:1; uint32_t pad0:1; uint32_t surface_type:3; } ss0; struct { uint32_t base_addr; } ss1; struct { uint32_t render_target_rotation:2; uint32_t mip_count:4; uint32_t width:13; uint32_t height:13; } ss2; struct { uint32_t tile_walk:1; uint32_t tiled_surface:1; uint32_t pad:1; uint32_t pitch:18; uint32_t depth:11; } ss3; struct { uint32_t pad:19; uint32_t min_array_elt:9; uint32_t min_lod:4; } ss4; struct { uint32_t pad:20; uint32_t y_offset:4; uint32_t pad2:1; uint32_t x_offset:7; } ss5; }; /* Surface state DW0 */ #define GEN6_SURFACE_RC_READ_WRITE (1 << 8) #define GEN6_SURFACE_MIPLAYOUT_SHIFT 10 #define GEN6_SURFACE_MIPMAPLAYOUT_BELOW 0 #define GEN6_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define GEN6_SURFACE_CUBEFACE_ENABLES 0x3f #define GEN6_SURFACE_BLEND_ENABLED (1 << 13) #define GEN6_SURFACE_WRITEDISABLE_B_SHIFT 14 #define GEN6_SURFACE_WRITEDISABLE_G_SHIFT 15 #define GEN6_SURFACE_WRITEDISABLE_R_SHIFT 16 #define GEN6_SURFACE_WRITEDISABLE_A_SHIFT 17 #define GEN6_SURFACE_FORMAT_SHIFT 18 #define GEN6_SURFACE_FORMAT_MASK INTEL_MASK(26, 18) #define GEN6_SURFACE_TYPE_SHIFT 29 #define GEN6_SURFACE_TYPE_MASK GEN6_MASK(31, 29) #define GEN6_SURFACE_1D 0 #define GEN6_SURFACE_2D 1 #define GEN6_SURFACE_3D 2 #define GEN6_SURFACE_CUBE 3 #define GEN6_SURFACE_BUFFER 4 #define GEN6_SURFACE_NULL 7 /* Surface state DW2 */ #define GEN6_SURFACE_HEIGHT_SHIFT 19 #define GEN6_SURFACE_HEIGHT_MASK GEN6_MASK(31, 19) #define GEN6_SURFACE_WIDTH_SHIFT 6 #define GEN6_SURFACE_WIDTH_MASK GEN6_MASK(18, 6) #define GEN6_SURFACE_LOD_SHIFT 2 #define GEN6_SURFACE_LOD_MASK GEN6_MASK(5, 2) /* Surface state DW3 */ #define GEN6_SURFACE_DEPTH_SHIFT 21 #define GEN6_SURFACE_DEPTH_MASK GEN6_MASK(31, 21) #define GEN6_SURFACE_PITCH_SHIFT 3 #define GEN6_SURFACE_PITCH_MASK GEN6_MASK(19, 3) #define GEN6_SURFACE_TILED (1 << 1) #define GEN6_SURFACE_TILED_Y (1 << 0) /* Surface state DW4 */ #define GEN6_SURFACE_MIN_LOD_SHIFT 28 #define GEN6_SURFACE_MIN_LOD_MASK GEN6_MASK(31, 28) /* Surface state DW5 */ #define GEN6_SURFACE_X_OFFSET_SHIFT 25 #define GEN6_SURFACE_X_OFFSET_MASK GEN6_MASK(31, 25) #define GEN6_SURFACE_Y_OFFSET_SHIFT 20 #define GEN6_SURFACE_Y_OFFSET_MASK GEN6_MASK(23, 20) struct gen6_cc_viewport { float min_depth; float max_depth; }; typedef enum { SAMPLER_FILTER_NEAREST = 0, SAMPLER_FILTER_BILINEAR, FILTER_COUNT } sampler_filter_t; typedef enum { SAMPLER_EXTEND_NONE = 0, SAMPLER_EXTEND_REPEAT, SAMPLER_EXTEND_PAD, SAMPLER_EXTEND_REFLECT, EXTEND_COUNT } sampler_extend_t; #endif xf86-video-intel-2.99.917/src/sna/brw/0000775000175000017500000000000012445556131014157 500000000000000xf86-video-intel-2.99.917/src/sna/brw/brw.h0000664000175000017500000000162012244635610015036 00000000000000#include "brw_eu.h" bool brw_sf_kernel__nomask(struct brw_compile *p); bool brw_sf_kernel__mask(struct brw_compile *p); bool brw_wm_kernel__affine(struct brw_compile *p, int dispatch_width); bool brw_wm_kernel__affine_mask(struct brw_compile *p, int dispatch_width); bool brw_wm_kernel__affine_mask_ca(struct brw_compile *p, int dispatch_width); bool brw_wm_kernel__affine_mask_sa(struct brw_compile *p, int dispatch_width); bool brw_wm_kernel__projective(struct brw_compile *p, int dispatch_width); bool brw_wm_kernel__projective_mask(struct brw_compile *p, int dispatch_width); bool brw_wm_kernel__projective_mask_ca(struct brw_compile *p, int dispatch_width); bool brw_wm_kernel__projective_mask_sa(struct brw_compile *p, int dispatch_width); bool brw_wm_kernel__affine_opacity(struct brw_compile *p, int dispatch_width); bool brw_wm_kernel__projective_opacity(struct brw_compile *p, int dispatch_width); xf86-video-intel-2.99.917/src/sna/brw/brw_wm.c0000664000175000017500000003743712432737457015566 00000000000000#include "brw.h" #define X16 8 #define Y16 10 static void brw_wm_xy(struct brw_compile *p, int dw) { struct brw_reg r1 = brw_vec1_grf(1, 0); struct brw_reg r1_uw = __retype_uw(r1); struct brw_reg x_uw, y_uw; brw_set_compression_control(p, BRW_COMPRESSION_NONE); if (dw == 16) { x_uw = brw_uw16_grf(30, 0); y_uw = brw_uw16_grf(28, 0); } else { x_uw = brw_uw8_grf(30, 0); y_uw = brw_uw8_grf(28, 0); } brw_ADD(p, x_uw, __stride(__suboffset(r1_uw, 4), 2, 4, 0), brw_imm_v(0x10101010)); brw_ADD(p, y_uw, __stride(__suboffset(r1_uw, 5), 2, 4, 0), brw_imm_v(0x11001100)); brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); brw_ADD(p, brw_vec8_grf(X16, 0), vec8(x_uw), brw_negate(r1)); brw_ADD(p, brw_vec8_grf(Y16, 0), vec8(y_uw), brw_negate(__suboffset(r1, 1))); } static void brw_wm_affine_st(struct brw_compile *p, int dw, int channel, int msg) { int uv; if (dw == 16) { brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); uv = p->gen >= 060 ? 6 : 3; } else { brw_set_compression_control(p, BRW_COMPRESSION_NONE); uv = p->gen >= 060 ? 4 : 3; } uv += 2*channel; msg++; if (p->gen >= 060) { brw_PLN(p, brw_message_reg(msg), brw_vec1_grf(uv, 0), brw_vec8_grf(2, 0)); msg += dw/8; brw_PLN(p, brw_message_reg(msg), brw_vec1_grf(uv, 4), brw_vec8_grf(2, 0)); } else { struct brw_reg r = brw_vec1_grf(uv, 0); brw_LINE(p, brw_null_reg(), __suboffset(r, 0), brw_vec8_grf(X16, 0)); brw_MAC(p, brw_message_reg(msg), __suboffset(r, 1), brw_vec8_grf(Y16, 0)); msg += dw/8; brw_LINE(p, brw_null_reg(), __suboffset(r, 4), brw_vec8_grf(X16, 0)); brw_MAC(p, brw_message_reg(msg), __suboffset(r, 5), brw_vec8_grf(Y16, 0)); } } static inline unsigned simd(int dw) { return dw == 16 ? BRW_SAMPLER_SIMD_MODE_SIMD16 : BRW_SAMPLER_SIMD_MODE_SIMD8; } static inline struct brw_reg sample_result(int dw, int result) { return brw_reg(BRW_GENERAL_REGISTER_FILE, result, 0, BRW_REGISTER_TYPE_UW, dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8, dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); } static int brw_wm_sample(struct brw_compile *p, int dw, int channel, int msg, int result) { struct brw_reg src0; bool header; int len; len = dw == 16 ? 4 : 2; if (p->gen >= 060) { header = false; src0 = brw_message_reg(++msg); } else { header = true; src0 = brw_vec8_grf(0, 0); } brw_SAMPLE(p, sample_result(dw, result), msg, src0, channel+1, channel, WRITEMASK_XYZW, 0, 2*len, len+header, header, simd(dw)); return result; } static int brw_wm_sample__alpha(struct brw_compile *p, int dw, int channel, int msg, int result) { struct brw_reg src0; int mlen, rlen; if (dw == 8) { /* SIMD8 sample return is not masked */ mlen = 3; rlen = 4; } else { mlen = 5; rlen = 2; } if (p->gen >= 060) src0 = brw_message_reg(msg); else src0 = brw_vec8_grf(0, 0); brw_SAMPLE(p, sample_result(dw, result), msg, src0, channel+1, channel, WRITEMASK_W, 0, rlen, mlen, true, simd(dw)); if (dw == 8) result += 3; return result; } static int brw_wm_affine(struct brw_compile *p, int dw, int channel, int msg, int result) { brw_wm_affine_st(p, dw, channel, msg); return brw_wm_sample(p, dw, channel, msg, result); } static int brw_wm_affine__alpha(struct brw_compile *p, int dw, int channel, int msg, int result) { brw_wm_affine_st(p, dw, channel, msg); return brw_wm_sample__alpha(p, dw, channel, msg, result); } static inline struct brw_reg null_result(int dw) { return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_NULL, 0, BRW_REGISTER_TYPE_UW, dw == 16 ? BRW_VERTICAL_STRIDE_16 : BRW_VERTICAL_STRIDE_8, dw == 16 ? BRW_WIDTH_16 : BRW_WIDTH_8, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); } static void brw_fb_write(struct brw_compile *p, int dw) { struct brw_instruction *insn; unsigned msg_control, msg_type, msg_len; struct brw_reg src0; bool header; if (dw == 16) { brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); msg_control = BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE; msg_len = 8; } else { brw_set_compression_control(p, BRW_COMPRESSION_NONE); msg_control = BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01; msg_len = 4; } if (p->gen < 060) { brw_push_insn_state(p); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_MOV(p, brw_message_reg(1), brw_vec8_grf(1, 0)); brw_pop_insn_state(p); msg_len += 2; } /* The execution mask is ignored for render target writes. */ insn = brw_next_insn(p, BRW_OPCODE_SEND); insn->header.predicate_control = 0; insn->header.compression_control = BRW_COMPRESSION_NONE; if (p->gen >= 060) { msg_type = GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE; src0 = brw_message_reg(2); header = false; } else { insn->header.destreg__conditionalmod = 0; msg_type = BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE; src0 = __retype_uw(brw_vec8_grf(0, 0)); header = true; } brw_set_dest(p, insn, null_result(dw)); brw_set_src0(p, insn, src0); brw_set_dp_write_message(p, insn, 0, msg_control, msg_type, msg_len, header, true, 0, true, false); } static void brw_wm_write(struct brw_compile *p, int dw, int src) { int n; if (dw == 8 && p->gen >= 060) { /* XXX pixel execution mask? */ brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MOV(p, brw_message_reg(2), brw_vec8_grf(src+0, 0)); brw_MOV(p, brw_message_reg(3), brw_vec8_grf(src+1, 0)); brw_MOV(p, brw_message_reg(4), brw_vec8_grf(src+2, 0)); brw_MOV(p, brw_message_reg(5), brw_vec8_grf(src+3, 0)); goto done; } brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); for (n = 0; n < 4; n++) { if (p->gen >= 060) { brw_MOV(p, brw_message_reg(2 + 2*n), brw_vec8_grf(src + 2*n, 0)); } else if (p->gen >= 045 && dw == 16) { brw_MOV(p, brw_message_reg(2 + n + BRW_MRF_COMPR4), brw_vec8_grf(src + 2*n, 0)); } else { brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MOV(p, brw_message_reg(2 + n), brw_vec8_grf(src + 2*n, 0)); if (dw == 16) { brw_set_compression_control(p, BRW_COMPRESSION_2NDHALF); brw_MOV(p, brw_message_reg(2 + n + 4), brw_vec8_grf(src + 2*n+1, 0)); } } } done: brw_fb_write(p, dw); } static void brw_wm_write__mask(struct brw_compile *p, int dw, int src, int mask) { int n; if (dw == 8 && p->gen >= 060) { brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MUL(p, brw_message_reg(2), brw_vec8_grf(src+0, 0), brw_vec8_grf(mask, 0)); brw_MUL(p, brw_message_reg(3), brw_vec8_grf(src+1, 0), brw_vec8_grf(mask, 0)); brw_MUL(p, brw_message_reg(4), brw_vec8_grf(src+2, 0), brw_vec8_grf(mask, 0)); brw_MUL(p, brw_message_reg(5), brw_vec8_grf(src+3, 0), brw_vec8_grf(mask, 0)); goto done; } brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); for (n = 0; n < 4; n++) { if (p->gen >= 060) { brw_MUL(p, brw_message_reg(2 + 2*n), brw_vec8_grf(src + 2*n, 0), brw_vec8_grf(mask, 0)); } else if (p->gen >= 045 && dw == 16) { brw_MUL(p, brw_message_reg(2 + n + BRW_MRF_COMPR4), brw_vec8_grf(src + 2*n, 0), brw_vec8_grf(mask, 0)); } else { brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MUL(p, brw_message_reg(2 + n), brw_vec8_grf(src + 2*n, 0), brw_vec8_grf(mask, 0)); if (dw == 16) { brw_set_compression_control(p, BRW_COMPRESSION_2NDHALF); brw_MUL(p, brw_message_reg(2 + n + 4), brw_vec8_grf(src + 2*n+1, 0), brw_vec8_grf(mask+1, 0)); } } } done: brw_fb_write(p, dw); } static void brw_wm_write__opacity(struct brw_compile *p, int dw, int src, int mask) { int n; if (dw == 8 && p->gen >= 060) { brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MUL(p, brw_message_reg(2), brw_vec8_grf(src+0, 0), brw_vec1_grf(mask, 3)); brw_MUL(p, brw_message_reg(3), brw_vec8_grf(src+1, 0), brw_vec1_grf(mask, 3)); brw_MUL(p, brw_message_reg(4), brw_vec8_grf(src+2, 0), brw_vec1_grf(mask, 3)); brw_MUL(p, brw_message_reg(5), brw_vec8_grf(src+3, 0), brw_vec1_grf(mask, 3)); goto done; } brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); for (n = 0; n < 4; n++) { if (p->gen >= 060) { brw_MUL(p, brw_message_reg(2 + 2*n), brw_vec8_grf(src + 2*n, 0), brw_vec1_grf(mask, 3)); } else if (p->gen >= 045 && dw == 16) { brw_MUL(p, brw_message_reg(2 + n + BRW_MRF_COMPR4), brw_vec8_grf(src + 2*n, 0), brw_vec1_grf(mask, 3)); } else { brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MUL(p, brw_message_reg(2 + n), brw_vec8_grf(src + 2*n, 0), brw_vec1_grf(mask, 3)); if (dw == 16) { brw_set_compression_control(p, BRW_COMPRESSION_2NDHALF); brw_MUL(p, brw_message_reg(2 + n + 4), brw_vec8_grf(src + 2*n+1, 0), brw_vec1_grf(mask, 3)); } } } done: brw_fb_write(p, dw); } static void brw_wm_write__mask_ca(struct brw_compile *p, int dw, int src, int mask) { int n; if (dw == 8 && p->gen >= 060) { brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MUL(p, brw_message_reg(2), brw_vec8_grf(src + 0, 0), brw_vec8_grf(mask + 0, 0)); brw_MUL(p, brw_message_reg(3), brw_vec8_grf(src + 1, 0), brw_vec8_grf(mask + 1, 0)); brw_MUL(p, brw_message_reg(4), brw_vec8_grf(src + 2, 0), brw_vec8_grf(mask + 2, 0)); brw_MUL(p, brw_message_reg(5), brw_vec8_grf(src + 3, 0), brw_vec8_grf(mask + 3, 0)); goto done; } brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); for (n = 0; n < 4; n++) { if (p->gen >= 060) { brw_MUL(p, brw_message_reg(2 + 2*n), brw_vec8_grf(src + 2*n, 0), brw_vec8_grf(mask + 2*n, 0)); } else if (p->gen >= 045 && dw == 16) { brw_MUL(p, brw_message_reg(2 + n + BRW_MRF_COMPR4), brw_vec8_grf(src + 2*n, 0), brw_vec8_grf(mask + 2*n, 0)); } else { brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MUL(p, brw_message_reg(2 + n), brw_vec8_grf(src + 2*n, 0), brw_vec8_grf(mask + 2*n, 0)); if (dw == 16) { brw_set_compression_control(p, BRW_COMPRESSION_2NDHALF); brw_MUL(p, brw_message_reg(2 + n + 4), brw_vec8_grf(src + 2*n + 1, 0), brw_vec8_grf(mask + 2*n + 1, 0)); } } } done: brw_fb_write(p, dw); } bool brw_wm_kernel__affine(struct brw_compile *p, int dispatch) { if (p->gen < 060) brw_wm_xy(p, dispatch); brw_wm_write(p, dispatch, brw_wm_affine(p, dispatch, 0, 1, 12)); return true; } bool brw_wm_kernel__affine_mask(struct brw_compile *p, int dispatch) { int src, mask; if (p->gen < 060) brw_wm_xy(p, dispatch); src = brw_wm_affine(p, dispatch, 0, 1, 12); mask = brw_wm_affine__alpha(p, dispatch, 1, 6, 20); brw_wm_write__mask(p, dispatch, src, mask); return true; } bool brw_wm_kernel__affine_mask_ca(struct brw_compile *p, int dispatch) { int src, mask; if (p->gen < 060) brw_wm_xy(p, dispatch); src = brw_wm_affine(p, dispatch, 0, 1, 12); mask = brw_wm_affine(p, dispatch, 1, 6, 20); brw_wm_write__mask_ca(p, dispatch, src, mask); return true; } bool brw_wm_kernel__affine_mask_sa(struct brw_compile *p, int dispatch) { int src, mask; if (p->gen < 060) brw_wm_xy(p, dispatch); src = brw_wm_affine__alpha(p, dispatch, 0, 1, 12); mask = brw_wm_affine(p, dispatch, 1, 6, 16); brw_wm_write__mask(p, dispatch, mask, src); return true; } /* Projective variants */ static void brw_wm_projective_st(struct brw_compile *p, int dw, int channel, int msg) { int uv; if (dw == 16) { brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); uv = p->gen >= 060 ? 6 : 3; } else { brw_set_compression_control(p, BRW_COMPRESSION_NONE); uv = p->gen >= 060 ? 4 : 3; } uv += 2*channel; msg++; if (p->gen >= 060) { /* First compute 1/z */ brw_PLN(p, brw_vec8_grf(30, 0), brw_vec1_grf(uv+1, 0), brw_vec8_grf(2, 0)); if (dw == 16) { brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_math_invert(p, brw_vec8_grf(30, 0), brw_vec8_grf(30, 0)); brw_math_invert(p, brw_vec8_grf(31, 0), brw_vec8_grf(31, 0)); brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); } else brw_math_invert(p, brw_vec8_grf(30, 0), brw_vec8_grf(30, 0)); brw_PLN(p, brw_vec8_grf(26, 0), brw_vec1_grf(uv, 0), brw_vec8_grf(2, 0)); brw_PLN(p, brw_vec8_grf(28, 0), brw_vec1_grf(uv, 4), brw_vec8_grf(2, 0)); brw_MUL(p, brw_message_reg(msg), brw_vec8_grf(26, 0), brw_vec8_grf(30, 0)); brw_MUL(p, brw_message_reg(msg + dw/8), brw_vec8_grf(28, 0), brw_vec8_grf(30, 0)); } else { struct brw_reg r = brw_vec1_grf(uv, 0); /* First compute 1/z */ brw_LINE(p, brw_null_reg(), brw_vec1_grf(uv+1, 0), brw_vec8_grf(X16, 0)); brw_MAC(p, brw_vec8_grf(30, 0), brw_vec1_grf(uv+1, 1), brw_vec8_grf(Y16, 0)); if (dw == 16) { brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_math_invert(p, brw_vec8_grf(30, 0), brw_vec8_grf(30, 0)); brw_math_invert(p, brw_vec8_grf(31, 0), brw_vec8_grf(31, 0)); brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED); } else brw_math_invert(p, brw_vec8_grf(30, 0), brw_vec8_grf(30, 0)); /* Now compute the output s,t values */ brw_LINE(p, brw_null_reg(), __suboffset(r, 0), brw_vec8_grf(X16, 0)); brw_MAC(p, brw_vec8_grf(28, 0), __suboffset(r, 1), brw_vec8_grf(Y16, 0)); brw_MUL(p, brw_message_reg(msg), brw_vec8_grf(28, 0), brw_vec8_grf(30, 0)); msg += dw/8; brw_LINE(p, brw_null_reg(), __suboffset(r, 4), brw_vec8_grf(X16, 0)); brw_MAC(p, brw_vec8_grf(28, 0), __suboffset(r, 5), brw_vec8_grf(Y16, 0)); brw_MUL(p, brw_message_reg(msg), brw_vec8_grf(28, 0), brw_vec8_grf(30, 0)); } } static int brw_wm_projective(struct brw_compile *p, int dw, int channel, int msg, int result) { brw_wm_projective_st(p, dw, channel, msg); return brw_wm_sample(p, dw, channel, msg, result); } static int brw_wm_projective__alpha(struct brw_compile *p, int dw, int channel, int msg, int result) { brw_wm_projective_st(p, dw, channel, msg); return brw_wm_sample__alpha(p, dw, channel, msg, result); } bool brw_wm_kernel__projective(struct brw_compile *p, int dispatch) { if (p->gen < 060) brw_wm_xy(p, dispatch); brw_wm_write(p, dispatch, brw_wm_projective(p, dispatch, 0, 1, 12)); return true; } bool brw_wm_kernel__projective_mask(struct brw_compile *p, int dispatch) { int src, mask; if (p->gen < 060) brw_wm_xy(p, dispatch); src = brw_wm_projective(p, dispatch, 0, 1, 12); mask = brw_wm_projective__alpha(p, dispatch, 1, 6, 20); brw_wm_write__mask(p, dispatch, src, mask); return true; } bool brw_wm_kernel__projective_mask_ca(struct brw_compile *p, int dispatch) { int src, mask; if (p->gen < 060) brw_wm_xy(p, dispatch); src = brw_wm_projective(p, dispatch, 0, 1, 12); mask = brw_wm_projective(p, dispatch, 1, 6, 20); brw_wm_write__mask_ca(p, dispatch, src, mask); return true; } bool brw_wm_kernel__projective_mask_sa(struct brw_compile *p, int dispatch) { int src, mask; if (p->gen < 060) brw_wm_xy(p, dispatch); src = brw_wm_projective__alpha(p, dispatch, 0, 1, 12); mask = brw_wm_projective(p, dispatch, 1, 6, 16); brw_wm_write__mask(p, dispatch, mask, src); return true; } bool brw_wm_kernel__affine_opacity(struct brw_compile *p, int dispatch) { int src, mask; if (p->gen < 060) { brw_wm_xy(p, dispatch); mask = 5; } else mask = dispatch == 16 ? 8 : 6; src = brw_wm_affine(p, dispatch, 0, 1, 12); brw_wm_write__opacity(p, dispatch, src, mask); return true; } bool brw_wm_kernel__projective_opacity(struct brw_compile *p, int dispatch) { int src, mask; if (p->gen < 060) { brw_wm_xy(p, dispatch); mask = 5; } else mask = dispatch == 16 ? 8 : 6; src = brw_wm_projective(p, dispatch, 0, 1, 12); brw_wm_write__opacity(p, dispatch, src, mask); return true; } xf86-video-intel-2.99.917/src/sna/brw/brw_test_gen4.c0000664000175000017500000001221412432737457017021 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #include "brw_test.h" #include static const uint32_t sf_kernel[][4] = { #include "exa_sf.g4b" }; static const uint32_t sf_kernel_mask[][4] = { #include "exa_sf_mask.g4b" }; static const uint32_t ps_kernel_nomask_affine[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_nomask_projective[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_projective.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_maskca_affine[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_mask_affine.g4b" #include "exa_wm_mask_sample_argb.g4b" #include "exa_wm_ca.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_maskca_projective[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_projective.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_mask_projective.g4b" #include "exa_wm_mask_sample_argb.g4b" #include "exa_wm_ca.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_maskca_srcalpha_affine[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_a.g4b" #include "exa_wm_mask_affine.g4b" #include "exa_wm_mask_sample_argb.g4b" #include "exa_wm_ca_srcalpha.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_maskca_srcalpha_projective[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_projective.g4b" #include "exa_wm_src_sample_a.g4b" #include "exa_wm_mask_projective.g4b" #include "exa_wm_mask_sample_argb.g4b" #include "exa_wm_ca_srcalpha.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_masknoca_affine[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_mask_affine.g4b" #include "exa_wm_mask_sample_a.g4b" #include "exa_wm_noca.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_masknoca_projective[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_projective.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_mask_projective.g4b" #include "exa_wm_mask_sample_a.g4b" #include "exa_wm_noca.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_packed_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_argb.g4b" #include "exa_wm_yuv_rgb.g4b" #include "exa_wm_write.g4b" }; static const uint32_t ps_kernel_planar_static[][4] = { #include "exa_wm_xy.g4b" #include "exa_wm_src_affine.g4b" #include "exa_wm_src_sample_planar.g4b" #include "exa_wm_yuv_rgb.g4b" #include "exa_wm_write.g4b" }; #define GEN 040 #define compare(old) brw_test_compare(__FUNCTION__, p.gen, p.store, p.nr_insn, (struct brw_instruction *)old, ARRAY_SIZE(old)-8) static void gen4_sf__nomask(void) { uint32_t store[128]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_sf_kernel__nomask(&p); compare(sf_kernel); } static void gen4_sf__mask(void) { uint32_t store[128]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_sf_kernel__mask(&p); compare(sf_kernel_mask); } static void gen4_wm_kernel__affine_nomask(void) { uint32_t store[128]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__affine(&p, 16); compare(ps_kernel_nomask_affine); } static void gen4_wm_kernel__affine_mask_noca(void) { uint32_t store[128]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__affine_mask(&p, 16); compare(ps_kernel_masknoca_affine); } static void gen4_wm_kernel__projective_nomask(void) { uint32_t store[128]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__projective(&p, 16); compare(ps_kernel_nomask_projective); } void brw_test_gen4(void) { gen4_sf__nomask(); gen4_sf__mask(); gen4_wm_kernel__affine_nomask(); gen4_wm_kernel__affine_mask_noca(); gen4_wm_kernel__projective_nomask(); } xf86-video-intel-2.99.917/src/sna/brw/Makefile.am0000664000175000017500000000325212400044327016123 00000000000000 # Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL # ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER # IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. noinst_LTLIBRARIES = libbrw.la noinst_PROGRAMS = brw_test AM_CFLAGS = \ @CWARNFLAGS@ \ -I$(top_srcdir)/src \ -I$(top_srcdir)/src/render_program \ @XORG_CFLAGS@ \ @UDEV_CFLAGS@ \ @DRM_CFLAGS@ \ $(NULL) if DEBUG AM_CFLAGS += @VALGRIND_CFLAGS@ endif libbrw_la_SOURCES = \ brw.h \ brw_disasm.c \ brw_eu.h \ brw_eu.c \ brw_eu_emit.c \ brw_sf.c \ brw_wm.c \ $(NULL) brw_test_SOURCES = \ brw_test.c \ brw_test.h \ brw_test_gen4.c \ brw_test_gen5.c \ brw_test_gen6.c \ brw_test_gen7.c \ $(NULL) brw_test_LDADD = \ libbrw.la \ $(NULL) AM_CFLAGS += @NOWARNFLAGS@ xf86-video-intel-2.99.917/src/sna/brw/brw_disasm.c0000664000175000017500000007412612244635610016404 00000000000000/* * Copyright © 2008 Keith Packard * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that copyright * notice and this permission notice appear in supporting documentation, and * that the name of the copyright holders not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. The copyright holders make no representations * about the suitability of this software for any purpose. It is provided "as * is" without express or implied warranty. * * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE * OF THIS SOFTWARE. */ #include #include #include #include #include #include #include "brw_eu.h" static const struct { const char *name; int nsrc; int ndst; } opcode[128] = { [BRW_OPCODE_MOV] = { .name = "mov", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_FRC] = { .name = "frc", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_RNDU] = { .name = "rndu", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_RNDD] = { .name = "rndd", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_RNDE] = { .name = "rnde", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_RNDZ] = { .name = "rndz", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_NOT] = { .name = "not", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_LZD] = { .name = "lzd", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_MUL] = { .name = "mul", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_MAC] = { .name = "mac", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_MACH] = { .name = "mach", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_LINE] = { .name = "line", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_PLN] = { .name = "pln", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_SAD2] = { .name = "sad2", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_SADA2] = { .name = "sada2", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_DP4] = { .name = "dp4", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_DPH] = { .name = "dph", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_DP3] = { .name = "dp3", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_DP2] = { .name = "dp2", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_MATH] = { .name = "math", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_AVG] = { .name = "avg", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_ADD] = { .name = "add", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_SEL] = { .name = "sel", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_AND] = { .name = "and", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_OR] = { .name = "or", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_XOR] = { .name = "xor", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_SHR] = { .name = "shr", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_SHL] = { .name = "shl", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_ASR] = { .name = "asr", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_CMP] = { .name = "cmp", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 }, [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 1, .ndst = 0 }, [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 }, [BRW_OPCODE_IFF] = { .name = "iff", .nsrc = 2, .ndst = 1 }, [BRW_OPCODE_WHILE] = { .name = "while", .nsrc = 2, .ndst = 0 }, [BRW_OPCODE_ELSE] = { .name = "else", .nsrc = 2, .ndst = 0 }, [BRW_OPCODE_BREAK] = { .name = "break", .nsrc = 2, .ndst = 0 }, [BRW_OPCODE_CONTINUE] = { .name = "cont", .nsrc = 1, .ndst = 0 }, [BRW_OPCODE_HALT] = { .name = "halt", .nsrc = 1, .ndst = 0 }, [BRW_OPCODE_MSAVE] = { .name = "msave", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_PUSH] = { .name = "push", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_MRESTORE] = { .name = "mrest", .nsrc = 1, .ndst = 1 }, [BRW_OPCODE_POP] = { .name = "pop", .nsrc = 2, .ndst = 0 }, [BRW_OPCODE_WAIT] = { .name = "wait", .nsrc = 1, .ndst = 0 }, [BRW_OPCODE_DO] = { .name = "do", .nsrc = 0, .ndst = 0 }, [BRW_OPCODE_ENDIF] = { .name = "endif", .nsrc = 2, .ndst = 0 }, }; static const char *conditional_modifier[16] = { [BRW_CONDITIONAL_NONE] = "", [BRW_CONDITIONAL_Z] = ".e", [BRW_CONDITIONAL_NZ] = ".ne", [BRW_CONDITIONAL_G] = ".g", [BRW_CONDITIONAL_GE] = ".ge", [BRW_CONDITIONAL_L] = ".l", [BRW_CONDITIONAL_LE] = ".le", [BRW_CONDITIONAL_R] = ".r", [BRW_CONDITIONAL_O] = ".o", [BRW_CONDITIONAL_U] = ".u", }; static const char *negate[2] = { [0] = "", [1] = "-", }; static const char *_abs[2] = { [0] = "", [1] = "(abs)", }; static const char *vert_stride[16] = { [0] = "0", [1] = "1", [2] = "2", [3] = "4", [4] = "8", [5] = "16", [6] = "32", [15] = "VxH", }; static const char *width[8] = { [0] = "1", [1] = "2", [2] = "4", [3] = "8", [4] = "16", }; static const char *horiz_stride[4] = { [0] = "0", [1] = "1", [2] = "2", [3] = "4" }; static const char *chan_sel[4] = { [0] = "x", [1] = "y", [2] = "z", [3] = "w", }; #if 0 static const char *dest_condmod[16] = { }; static const char *imm_encoding[8] = { [0] = "UD", [1] = "D", [2] = "UW", [3] = "W", [5] = "VF", [6] = "V", [7] = "F" }; #endif static const char *debug_ctrl[2] = { [0] = "", [1] = ".breakpoint" }; static const char *saturate[2] = { [0] = "", [1] = ".sat" }; static const char *accwr[2] = { [0] = "", [1] = "AccWrEnable" }; static const char *wectrl[2] = { [0] = "WE_normal", [1] = "WE_all" }; static const char *exec_size[8] = { [0] = "1", [1] = "2", [2] = "4", [3] = "8", [4] = "16", [5] = "32" }; static const char *pred_inv[2] = { [0] = "+", [1] = "-" }; static const char *pred_ctrl_align16[16] = { [1] = "", [2] = ".x", [3] = ".y", [4] = ".z", [5] = ".w", [6] = ".any4h", [7] = ".all4h", }; static const char *pred_ctrl_align1[16] = { [1] = "", [2] = ".anyv", [3] = ".allv", [4] = ".any2h", [5] = ".all2h", [6] = ".any4h", [7] = ".all4h", [8] = ".any8h", [9] = ".all8h", [10] = ".any16h", [11] = ".all16h", }; static const char *thread_ctrl[4] = { [0] = "", [2] = "switch" }; static const char *compr_ctrl[4] = { [0] = "", [1] = "sechalf", [2] = "compr", [3] = "compr4", }; static const char *dep_ctrl[4] = { [0] = "", [1] = "NoDDClr", [2] = "NoDDChk", [3] = "NoDDClr,NoDDChk", }; static const char *mask_ctrl[4] = { [0] = "", [1] = "nomask", }; static const char *access_mode[2] = { [0] = "align1", [1] = "align16", }; static const char *reg_encoding[8] = { [0] = "UD", [1] = "D", [2] = "UW", [3] = "W", [4] = "UB", [5] = "B", [7] = "F" }; static const int reg_type_size[8] = { [0] = 4, [1] = 4, [2] = 2, [3] = 2, [4] = 1, [5] = 1, [7] = 4 }; static const char *reg_file[4] = { [0] = "A", [1] = "g", [2] = "m", [3] = "imm", }; static const char *writemask[16] = { [0x0] = ".", [0x1] = ".x", [0x2] = ".y", [0x3] = ".xy", [0x4] = ".z", [0x5] = ".xz", [0x6] = ".yz", [0x7] = ".xyz", [0x8] = ".w", [0x9] = ".xw", [0xa] = ".yw", [0xb] = ".xyw", [0xc] = ".zw", [0xd] = ".xzw", [0xe] = ".yzw", [0xf] = "", }; static const char *end_of_thread[2] = { [0] = "", [1] = "EOT" }; static const char *target_function[16] = { [BRW_SFID_NULL] = "null", [BRW_SFID_MATH] = "math", [BRW_SFID_SAMPLER] = "sampler", [BRW_SFID_MESSAGE_GATEWAY] = "gateway", [BRW_SFID_DATAPORT_READ] = "read", [BRW_SFID_DATAPORT_WRITE] = "write", [BRW_SFID_URB] = "urb", [BRW_SFID_THREAD_SPAWNER] = "thread_spawner" }; static const char *target_function_gen6[16] = { [BRW_SFID_NULL] = "null", [BRW_SFID_MATH] = "math", [BRW_SFID_SAMPLER] = "sampler", [BRW_SFID_MESSAGE_GATEWAY] = "gateway", [BRW_SFID_URB] = "urb", [BRW_SFID_THREAD_SPAWNER] = "thread_spawner", [GEN6_SFID_DATAPORT_SAMPLER_CACHE] = "sampler", [GEN6_SFID_DATAPORT_RENDER_CACHE] = "render", [GEN6_SFID_DATAPORT_CONSTANT_CACHE] = "const", [GEN7_SFID_DATAPORT_DATA_CACHE] = "data" }; static const char *dp_rc_msg_type_gen6[16] = { [BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ] = "OWORD block read", [GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ] = "RT UNORM read", [GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ] = "OWORD dual block read", [GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ] = "media block read", [GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ] = "OWORD unaligned block read", [GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ] = "DWORD scattered read", [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE] = "DWORD atomic write", [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE] = "OWORD block write", [GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE] = "OWORD dual block write", [GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE] = "media block write", [GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE] = "DWORD scattered write", [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE] = "RT write", [GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE] = "streamed VB write", [GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE] = "RT UNORMc write", }; static const char *math_function[16] = { [BRW_MATH_FUNCTION_INV] = "inv", [BRW_MATH_FUNCTION_LOG] = "log", [BRW_MATH_FUNCTION_EXP] = "exp", [BRW_MATH_FUNCTION_SQRT] = "sqrt", [BRW_MATH_FUNCTION_RSQ] = "rsq", [BRW_MATH_FUNCTION_SIN] = "sin", [BRW_MATH_FUNCTION_COS] = "cos", [BRW_MATH_FUNCTION_SINCOS] = "sincos", [BRW_MATH_FUNCTION_TAN] = "tan", [BRW_MATH_FUNCTION_POW] = "pow", [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER] = "intdivmod", [BRW_MATH_FUNCTION_INT_DIV_QUOTIENT] = "intdiv", [BRW_MATH_FUNCTION_INT_DIV_REMAINDER] = "intmod", }; static const char *math_saturate[2] = { [0] = "", [1] = "sat" }; static const char *math_signed[2] = { [0] = "", [1] = "signed" }; static const char *math_scalar[2] = { [0] = "", [1] = "scalar" }; static const char *math_precision[2] = { [0] = "", [1] = "partial_precision" }; static const char *urb_opcode[2] = { [0] = "urb_write", [1] = "ff_sync", }; static const char *urb_swizzle[4] = { [BRW_URB_SWIZZLE_NONE] = "", [BRW_URB_SWIZZLE_INTERLEAVE] = "interleave", [BRW_URB_SWIZZLE_TRANSPOSE] = "transpose", }; static const char *urb_allocate[2] = { [0] = "", [1] = "allocate" }; static const char *urb_used[2] = { [0] = "", [1] = "used" }; static const char *urb_complete[2] = { [0] = "", [1] = "complete" }; static const char *sampler_target_format[4] = { [0] = "F", [2] = "UD", [3] = "D" }; static int column; static int string(FILE *file, const char *str) { fputs(str, file); column += strlen(str); return 0; } #if defined(__GNUC__) && (__GNUC__ > 2) __attribute__((format(printf, 2, 3))) #endif static int format(FILE *f, const char *fmt, ...) { char buf[1024]; va_list args; va_start(args, fmt); vsnprintf(buf, sizeof(buf) - 1, fmt, args); va_end(args); string(f, buf); return 0; } static void newline(FILE *f) { putc('\n', f); column = 0; } static void pad(FILE *f, int c) { do string(f, " "); while (column < c); } static void control(FILE *file, const char *name, const char *ctrl[], unsigned id, int *space) { if (!ctrl[id]) { fprintf(file, "*** invalid %s value %d ", name, id); assert(0); } if (ctrl[id][0]) { if (space && *space) string(file, " "); string(file, ctrl[id]); if (space) *space = 1; } } static void print_opcode(FILE *file, int id) { if (!opcode[id].name) { format(file, "*** invalid opcode value %d ", id); assert(0); } string(file, opcode[id].name); } static int reg(FILE *file, unsigned _reg_file, unsigned _reg_nr) { /* Clear the Compr4 instruction compression bit. */ if (_reg_file == BRW_MESSAGE_REGISTER_FILE) _reg_nr &= ~(1 << 7); if (_reg_file == BRW_ARCHITECTURE_REGISTER_FILE) { switch (_reg_nr & 0xf0) { case BRW_ARF_NULL: string(file, "null"); return -1; case BRW_ARF_ADDRESS: format(file, "a%d", _reg_nr & 0x0f); break; case BRW_ARF_ACCUMULATOR: format(file, "acc%d", _reg_nr & 0x0f); break; case BRW_ARF_FLAG: format(file, "f%d", _reg_nr & 0x0f); break; case BRW_ARF_MASK: format(file, "mask%d", _reg_nr & 0x0f); break; case BRW_ARF_MASK_STACK: format(file, "msd%d", _reg_nr & 0x0f); break; case BRW_ARF_STATE: format(file, "sr%d", _reg_nr & 0x0f); break; case BRW_ARF_CONTROL: format(file, "cr%d", _reg_nr & 0x0f); break; case BRW_ARF_NOTIFICATION_COUNT: format(file, "n%d", _reg_nr & 0x0f); break; case BRW_ARF_IP: string(file, "ip"); return -1; default: format(file, "ARF%d", _reg_nr); break; } } else { control(file, "src reg file", reg_file, _reg_file, NULL); format(file, "%d", _reg_nr); } return 0; } static void dest(FILE *file, const struct brw_instruction *inst) { if (inst->header.access_mode == BRW_ALIGN_1) { if (inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT) { if (reg(file, inst->bits1.da1.dest_reg_file, inst->bits1.da1.dest_reg_nr)) return; if (inst->bits1.da1.dest_subreg_nr) format(file, ".%d", inst->bits1.da1.dest_subreg_nr / reg_type_size[inst->bits1.da1.dest_reg_type]); format(file, "<%d>", inst->bits1.da1.dest_horiz_stride); control(file, "dest reg encoding", reg_encoding, inst->bits1.da1.dest_reg_type, NULL); } else { string(file, "g[a0"); if (inst->bits1.ia1.dest_subreg_nr) format(file, ".%d", inst->bits1.ia1.dest_subreg_nr / reg_type_size[inst->bits1.ia1.dest_reg_type]); if (inst->bits1.ia1.dest_indirect_offset) format(file, " %d", inst->bits1.ia1.dest_indirect_offset); string(file, "]"); format(file, "<%d>", inst->bits1.ia1.dest_horiz_stride); control(file, "dest reg encoding", reg_encoding, inst->bits1.ia1.dest_reg_type, NULL); } } else { if (inst->bits1.da16.dest_address_mode == BRW_ADDRESS_DIRECT) { if (reg(file, inst->bits1.da16.dest_reg_file, inst->bits1.da16.dest_reg_nr)) return; if (inst->bits1.da16.dest_subreg_nr) format(file, ".%d", inst->bits1.da16.dest_subreg_nr / reg_type_size[inst->bits1.da16.dest_reg_type]); string(file, "<1>"); control(file, "writemask", writemask, inst->bits1.da16.dest_writemask, NULL); control(file, "dest reg encoding", reg_encoding, inst->bits1.da16.dest_reg_type, NULL); } else { string(file, "Indirect align16 address mode not supported"); } } } static void src_align1_region(FILE *file, unsigned _vert_stride, unsigned _width, unsigned _horiz_stride) { string(file, "<"); control(file, "vert stride", vert_stride, _vert_stride, NULL); string(file, ","); control(file, "width", width, _width, NULL); string(file, ","); control(file, "horiz_stride", horiz_stride, _horiz_stride, NULL); string(file, ">"); } static void src_da1(FILE *file, unsigned type, unsigned _reg_file, unsigned _vert_stride, unsigned _width, unsigned _horiz_stride, unsigned reg_num, unsigned sub_reg_num, unsigned __abs, unsigned _negate) { control(file, "negate", negate, _negate, NULL); control(file, "abs", _abs, __abs, NULL); if (reg(file, _reg_file, reg_num)) return; if (sub_reg_num) format(file, ".%d", sub_reg_num / reg_type_size[type]); /* use formal style like spec */ src_align1_region(file, _vert_stride, _width, _horiz_stride); control(file, "src reg encoding", reg_encoding, type, NULL); } static void src_ia1(FILE *file, unsigned type, unsigned _reg_file, int _addr_imm, unsigned _addr_subreg_nr, unsigned _negate, unsigned __abs, unsigned _addr_mode, unsigned _horiz_stride, unsigned _width, unsigned _vert_stride) { control(file, "negate", negate, _negate, NULL); control(file, "abs", _abs, __abs, NULL); string(file, "g[a0"); if (_addr_subreg_nr) format(file, ".%d", _addr_subreg_nr); if (_addr_imm) format(file, " %d", _addr_imm); string(file, "]"); src_align1_region(file, _vert_stride, _width, _horiz_stride); control(file, "src reg encoding", reg_encoding, type, NULL); } static void src_da16(FILE *file, unsigned _reg_type, unsigned _reg_file, unsigned _vert_stride, unsigned _reg_nr, unsigned _subreg_nr, unsigned __abs, unsigned _negate, unsigned swz_x, unsigned swz_y, unsigned swz_z, unsigned swz_w) { control(file, "negate", negate, _negate, NULL); control(file, "abs", _abs, __abs, NULL); if (reg(file, _reg_file, _reg_nr)) return; if (_subreg_nr) /* bit4 for subreg number byte addressing. Make this same meaning as in da1 case, so output looks consistent. */ format(file, ".%d", 16 / reg_type_size[_reg_type]); string(file, "<"); control(file, "vert stride", vert_stride, _vert_stride, NULL); string(file, ",4,1>"); /* * Three kinds of swizzle display: * identity - nothing printed * 1->all - print the single channel * 1->1 - print the mapping */ if (swz_x == BRW_CHANNEL_X && swz_y == BRW_CHANNEL_Y && swz_z == BRW_CHANNEL_Z && swz_w == BRW_CHANNEL_W) { ; } else if (swz_x == swz_y && swz_x == swz_z && swz_x == swz_w) { string(file, "."); control(file, "channel select", chan_sel, swz_x, NULL); } else { string(file, "."); control(file, "channel select", chan_sel, swz_x, NULL); control(file, "channel select", chan_sel, swz_y, NULL); control(file, "channel select", chan_sel, swz_z, NULL); control(file, "channel select", chan_sel, swz_w, NULL); } control(file, "src da16 reg type", reg_encoding, _reg_type, NULL); } static void imm(FILE *file, unsigned type, const struct brw_instruction *inst) { switch (type) { case BRW_REGISTER_TYPE_UD: format(file, "0x%08xUD", inst->bits3.ud); break; case BRW_REGISTER_TYPE_D: format(file, "%dD", inst->bits3.d); break; case BRW_REGISTER_TYPE_UW: format(file, "0x%04xUW", (uint16_t) inst->bits3.ud); break; case BRW_REGISTER_TYPE_W: format(file, "%dW", (int16_t) inst->bits3.d); break; case BRW_REGISTER_TYPE_UB: format(file, "0x%02xUB", (int8_t) inst->bits3.ud); break; case BRW_REGISTER_TYPE_VF: format(file, "Vector Float"); break; case BRW_REGISTER_TYPE_V: format(file, "0x%08xV", inst->bits3.ud); break; case BRW_REGISTER_TYPE_F: format(file, "%-gF", inst->bits3.f); } } static void src0(FILE *file, const struct brw_instruction *inst) { if (inst->bits1.da1.src0_reg_file == BRW_IMMEDIATE_VALUE) imm(file, inst->bits1.da1.src0_reg_type, inst); else if (inst->header.access_mode == BRW_ALIGN_1) { if (inst->bits2.da1.src0_address_mode == BRW_ADDRESS_DIRECT) { src_da1(file, inst->bits1.da1.src0_reg_type, inst->bits1.da1.src0_reg_file, inst->bits2.da1.src0_vert_stride, inst->bits2.da1.src0_width, inst->bits2.da1.src0_horiz_stride, inst->bits2.da1.src0_reg_nr, inst->bits2.da1.src0_subreg_nr, inst->bits2.da1.src0_abs, inst->bits2.da1.src0_negate); } else { src_ia1(file, inst->bits1.ia1.src0_reg_type, inst->bits1.ia1.src0_reg_file, inst->bits2.ia1.src0_indirect_offset, inst->bits2.ia1.src0_subreg_nr, inst->bits2.ia1.src0_negate, inst->bits2.ia1.src0_abs, inst->bits2.ia1.src0_address_mode, inst->bits2.ia1.src0_horiz_stride, inst->bits2.ia1.src0_width, inst->bits2.ia1.src0_vert_stride); } } else { if (inst->bits2.da16.src0_address_mode == BRW_ADDRESS_DIRECT) { src_da16(file, inst->bits1.da16.src0_reg_type, inst->bits1.da16.src0_reg_file, inst->bits2.da16.src0_vert_stride, inst->bits2.da16.src0_reg_nr, inst->bits2.da16.src0_subreg_nr, inst->bits2.da16.src0_abs, inst->bits2.da16.src0_negate, inst->bits2.da16.src0_swz_x, inst->bits2.da16.src0_swz_y, inst->bits2.da16.src0_swz_z, inst->bits2.da16.src0_swz_w); } else { string(file, "Indirect align16 address mode not supported"); } } } static void src1(FILE *file, const struct brw_instruction *inst) { if (inst->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE) imm(file, inst->bits1.da1.src1_reg_type, inst); else if (inst->header.access_mode == BRW_ALIGN_1) { if (inst->bits3.da1.src1_address_mode == BRW_ADDRESS_DIRECT) { src_da1(file, inst->bits1.da1.src1_reg_type, inst->bits1.da1.src1_reg_file, inst->bits3.da1.src1_vert_stride, inst->bits3.da1.src1_width, inst->bits3.da1.src1_horiz_stride, inst->bits3.da1.src1_reg_nr, inst->bits3.da1.src1_subreg_nr, inst->bits3.da1.src1_abs, inst->bits3.da1.src1_negate); } else { src_ia1(file, inst->bits1.ia1.src1_reg_type, inst->bits1.ia1.src1_reg_file, inst->bits3.ia1.src1_indirect_offset, inst->bits3.ia1.src1_subreg_nr, inst->bits3.ia1.src1_negate, inst->bits3.ia1.src1_abs, inst->bits3.ia1.src1_address_mode, inst->bits3.ia1.src1_horiz_stride, inst->bits3.ia1.src1_width, inst->bits3.ia1.src1_vert_stride); } } else { if (inst->bits3.da16.src1_address_mode == BRW_ADDRESS_DIRECT) { src_da16(file, inst->bits1.da16.src1_reg_type, inst->bits1.da16.src1_reg_file, inst->bits3.da16.src1_vert_stride, inst->bits3.da16.src1_reg_nr, inst->bits3.da16.src1_subreg_nr, inst->bits3.da16.src1_abs, inst->bits3.da16.src1_negate, inst->bits3.da16.src1_swz_x, inst->bits3.da16.src1_swz_y, inst->bits3.da16.src1_swz_z, inst->bits3.da16.src1_swz_w); } else { string(file, "Indirect align16 address mode not supported"); } } } static const int esize[6] = { [0] = 1, [1] = 2, [2] = 4, [3] = 8, [4] = 16, [5] = 32, }; static int qtr_ctrl(FILE *file, const struct brw_instruction *inst) { int qtr_ctl = inst->header.compression_control; int size = esize[inst->header.execution_size]; if (size == 8) { switch (qtr_ctl) { case 0: string(file, " 1Q"); break; case 1: string(file, " 2Q"); break; case 2: string(file, " 3Q"); break; case 3: string(file, " 4Q"); break; } } else if (size == 16){ if (qtr_ctl < 2) string(file, " 1H"); else string(file, " 2H"); } return 0; } void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen) { int space = 0; format(file, "%08x %08x %08x %08x\n", ((const uint32_t*)inst)[0], ((const uint32_t*)inst)[1], ((const uint32_t*)inst)[2], ((const uint32_t*)inst)[3]); if (inst->header.predicate_control) { string(file, "("); control(file, "predicate inverse", pred_inv, inst->header.predicate_inverse, NULL); string(file, "f0"); if (inst->bits2.da1.flag_subreg_nr) format(file, ".%d", inst->bits2.da1.flag_subreg_nr); if (inst->header.access_mode == BRW_ALIGN_1) control(file, "predicate control align1", pred_ctrl_align1, inst->header.predicate_control, NULL); else control(file, "predicate control align16", pred_ctrl_align16, inst->header.predicate_control, NULL); string(file, ") "); } print_opcode(file, inst->header.opcode); control(file, "saturate", saturate, inst->header.saturate, NULL); control(file, "debug control", debug_ctrl, inst->header.debug_control, NULL); if (inst->header.opcode == BRW_OPCODE_MATH) { string(file, " "); control(file, "function", math_function, inst->header.destreg__conditionalmod, NULL); } else if (inst->header.opcode != BRW_OPCODE_SEND && inst->header.opcode != BRW_OPCODE_SENDC) control(file, "conditional modifier", conditional_modifier, inst->header.destreg__conditionalmod, NULL); if (inst->header.opcode != BRW_OPCODE_NOP) { string(file, "("); control(file, "execution size", exec_size, inst->header.execution_size, NULL); string(file, ")"); } if (inst->header.opcode == BRW_OPCODE_SEND && gen < 060) format(file, " %d", inst->header.destreg__conditionalmod); if (opcode[inst->header.opcode].ndst > 0) { pad(file, 16); dest(file, inst); } else if (gen >= 060 && (inst->header.opcode == BRW_OPCODE_IF || inst->header.opcode == BRW_OPCODE_ELSE || inst->header.opcode == BRW_OPCODE_ENDIF || inst->header.opcode == BRW_OPCODE_WHILE)) { format(file, " %d", inst->bits1.branch_gen6.jump_count); } if (opcode[inst->header.opcode].nsrc > 0) { pad(file, 32); src0(file, inst); } if (opcode[inst->header.opcode].nsrc > 1) { pad(file, 48); src1(file, inst); } if (inst->header.opcode == BRW_OPCODE_SEND || inst->header.opcode == BRW_OPCODE_SENDC) { enum brw_message_target target; if (gen >= 060) target = inst->header.destreg__conditionalmod; else if (gen >= 050) target = inst->bits2.send_gen5.sfid; else target = inst->bits3.generic.msg_target; newline (file); pad (file, 16); space = 0; if (gen >= 060) { control (file, "target function", target_function_gen6, target, &space); } else { control (file, "target function", target_function, target, &space); } switch (target) { case BRW_SFID_MATH: control (file, "math function", math_function, inst->bits3.math.function, &space); control (file, "math saturate", math_saturate, inst->bits3.math.saturate, &space); control (file, "math signed", math_signed, inst->bits3.math.int_type, &space); control (file, "math scalar", math_scalar, inst->bits3.math.data_type, &space); control (file, "math precision", math_precision, inst->bits3.math.precision, &space); break; case BRW_SFID_SAMPLER: if (gen >= 070) { format (file, " (%d, %d, %d, %d)", inst->bits3.sampler_gen7.binding_table_index, inst->bits3.sampler_gen7.sampler, inst->bits3.sampler_gen7.msg_type, inst->bits3.sampler_gen7.simd_mode); } else if (gen >= 050) { format (file, " (%d, %d, %d, %d)", inst->bits3.sampler_gen5.binding_table_index, inst->bits3.sampler_gen5.sampler, inst->bits3.sampler_gen5.msg_type, inst->bits3.sampler_gen5.simd_mode); } else if (gen >= 045) { format (file, " (%d, %d)", inst->bits3.sampler_g4x.binding_table_index, inst->bits3.sampler_g4x.sampler); } else { format (file, " (%d, %d, ", inst->bits3.sampler.binding_table_index, inst->bits3.sampler.sampler); control (file, "sampler target format", sampler_target_format, inst->bits3.sampler.return_format, NULL); string (file, ")"); } break; case BRW_SFID_DATAPORT_READ: if (gen >= 060) { format (file, " (%d, %d, %d, %d)", inst->bits3.gen6_dp.binding_table_index, inst->bits3.gen6_dp.msg_control, inst->bits3.gen6_dp.msg_type, inst->bits3.gen6_dp.send_commit_msg); } else if (gen >= 045) { format (file, " (%d, %d, %d)", inst->bits3.dp_read_gen5.binding_table_index, inst->bits3.dp_read_gen5.msg_control, inst->bits3.dp_read_gen5.msg_type); } else { format (file, " (%d, %d, %d)", inst->bits3.dp_read.binding_table_index, inst->bits3.dp_read.msg_control, inst->bits3.dp_read.msg_type); } break; case BRW_SFID_DATAPORT_WRITE: if (gen >= 070) { format (file, " ("); control (file, "DP rc message type", dp_rc_msg_type_gen6, inst->bits3.gen7_dp.msg_type, &space); format (file, ", %d, %d, %d)", inst->bits3.gen7_dp.binding_table_index, inst->bits3.gen7_dp.msg_control, inst->bits3.gen7_dp.msg_type); } else if (gen >= 060) { format (file, " ("); control (file, "DP rc message type", dp_rc_msg_type_gen6, inst->bits3.gen6_dp.msg_type, &space); format (file, ", %d, %d, %d, %d)", inst->bits3.gen6_dp.binding_table_index, inst->bits3.gen6_dp.msg_control, inst->bits3.gen6_dp.msg_type, inst->bits3.gen6_dp.send_commit_msg); } else { format (file, " (%d, %d, %d, %d)", inst->bits3.dp_write.binding_table_index, (inst->bits3.dp_write.last_render_target << 3) | inst->bits3.dp_write.msg_control, inst->bits3.dp_write.msg_type, inst->bits3.dp_write.send_commit_msg); } break; case BRW_SFID_URB: if (gen >= 050) { format (file, " %d", inst->bits3.urb_gen5.offset); } else { format (file, " %d", inst->bits3.urb.offset); } space = 1; if (gen >= 050) { control (file, "urb opcode", urb_opcode, inst->bits3.urb_gen5.opcode, &space); } control (file, "urb swizzle", urb_swizzle, inst->bits3.urb.swizzle_control, &space); control (file, "urb allocate", urb_allocate, inst->bits3.urb.allocate, &space); control (file, "urb used", urb_used, inst->bits3.urb.used, &space); control (file, "urb complete", urb_complete, inst->bits3.urb.complete, &space); break; case BRW_SFID_THREAD_SPAWNER: break; case GEN7_SFID_DATAPORT_DATA_CACHE: format (file, " (%d, %d, %d)", inst->bits3.gen7_dp.binding_table_index, inst->bits3.gen7_dp.msg_control, inst->bits3.gen7_dp.msg_type); break; default: format (file, "unsupported target %d", target); break; } if (space) string (file, " "); if (gen >= 050) { format (file, "mlen %d", inst->bits3.generic_gen5.msg_length); format (file, " rlen %d", inst->bits3.generic_gen5.response_length); } else { format (file, "mlen %d", inst->bits3.generic.msg_length); format (file, " rlen %d", inst->bits3.generic.response_length); } } pad(file, 64); if (inst->header.opcode != BRW_OPCODE_NOP) { string(file, "{"); space = 1; control(file, "access mode", access_mode, inst->header.access_mode, &space); if (gen >= 060) control(file, "write enable control", wectrl, inst->header.mask_control, &space); else control(file, "mask control", mask_ctrl, inst->header.mask_control, &space); control(file, "dependency control", dep_ctrl, inst->header.dependency_control, &space); if (gen >= 060) qtr_ctrl(file, inst); else { if (inst->header.compression_control == BRW_COMPRESSION_COMPRESSED && opcode[inst->header.opcode].ndst > 0 && inst->bits1.da1.dest_reg_file == BRW_MESSAGE_REGISTER_FILE && inst->bits1.da1.dest_reg_nr & (1 << 7)) { format(file, " compr4"); } else { control(file, "compression control", compr_ctrl, inst->header.compression_control, &space); } } control(file, "thread control", thread_ctrl, inst->header.thread_control, &space); if (gen >= 060) control(file, "acc write control", accwr, inst->header.acc_wr_control, &space); if (inst->header.opcode == BRW_OPCODE_SEND || inst->header.opcode == BRW_OPCODE_SENDC) control(file, "end of thread", end_of_thread, inst->bits3.generic.end_of_thread, &space); if (space) string(file, " "); string(file, "}"); } string(file, ";"); newline(file); } xf86-video-intel-2.99.917/src/sna/brw/brw_eu_emit.c0000664000175000017500000016535712437313311016555 00000000000000/* Copyright (C) Intel Corp. 2006. All Rights Reserved. Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to develop this 3D driver. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **********************************************************************/ /* * Authors: * Keith Whitwell */ #include "brw_eu.h" #include #include #define ARRAY_SIZE(A) (sizeof(A)/sizeof(A[0])) /*********************************************************************** * Internal helper for constructing instructions */ static void guess_execution_size(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) { if (reg.width == BRW_WIDTH_8 && p->compressed) insn->header.execution_size = BRW_EXECUTE_16; else insn->header.execution_size = reg.width; } /** * Prior to Sandybridge, the SEND instruction accepted non-MRF source * registers, implicitly moving the operand to a message register. * * On Sandybridge, this is no longer the case. This function performs the * explicit move; it should be called before emitting a SEND instruction. */ void gen6_resolve_implied_move(struct brw_compile *p, struct brw_reg *src, unsigned msg_reg_nr) { if (p->gen < 060) return; if (src->file == BRW_MESSAGE_REGISTER_FILE) return; if (src->file != BRW_ARCHITECTURE_REGISTER_FILE || src->nr != BRW_ARF_NULL) { brw_push_insn_state(p); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MOV(p, __retype_ud(brw_message_reg(msg_reg_nr)), __retype_ud(*src)); brw_pop_insn_state(p); } *src = brw_message_reg(msg_reg_nr); } static void gen7_convert_mrf_to_grf(struct brw_compile *p, struct brw_reg *reg) { /* From the BSpec / ISA Reference / send - [DevIVB+]: * "The send with EOT should use register space R112-R127 for . This is * to enable loading of a new thread into the same slot while the message * with EOT for current thread is pending dispatch." * * Since we're pretending to have 16 MRFs anyway, we may as well use the * registers required for messages with EOT. */ if (p->gen >= 070 && reg->file == BRW_MESSAGE_REGISTER_FILE) { reg->file = BRW_GENERAL_REGISTER_FILE; reg->nr += 111; } } void brw_set_dest(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg dest) { if (dest.file != BRW_ARCHITECTURE_REGISTER_FILE && dest.file != BRW_MESSAGE_REGISTER_FILE) assert(dest.nr < 128); gen7_convert_mrf_to_grf(p, &dest); insn->bits1.da1.dest_reg_file = dest.file; insn->bits1.da1.dest_reg_type = dest.type; insn->bits1.da1.dest_address_mode = dest.address_mode; if (dest.address_mode == BRW_ADDRESS_DIRECT) { insn->bits1.da1.dest_reg_nr = dest.nr; if (insn->header.access_mode == BRW_ALIGN_1) { insn->bits1.da1.dest_subreg_nr = dest.subnr; if (dest.hstride == BRW_HORIZONTAL_STRIDE_0) dest.hstride = BRW_HORIZONTAL_STRIDE_1; insn->bits1.da1.dest_horiz_stride = dest.hstride; } else { insn->bits1.da16.dest_subreg_nr = dest.subnr / 16; insn->bits1.da16.dest_writemask = dest.dw1.bits.writemask; /* even ignored in da16, still need to set as '01' */ insn->bits1.da16.dest_horiz_stride = 1; } } else { insn->bits1.ia1.dest_subreg_nr = dest.subnr; /* These are different sizes in align1 vs align16: */ if (insn->header.access_mode == BRW_ALIGN_1) { insn->bits1.ia1.dest_indirect_offset = dest.dw1.bits.indirect_offset; if (dest.hstride == BRW_HORIZONTAL_STRIDE_0) dest.hstride = BRW_HORIZONTAL_STRIDE_1; insn->bits1.ia1.dest_horiz_stride = dest.hstride; } else { insn->bits1.ia16.dest_indirect_offset = dest.dw1.bits.indirect_offset; /* even ignored in da16, still need to set as '01' */ insn->bits1.ia16.dest_horiz_stride = 1; } } guess_execution_size(p, insn, dest); } static const int reg_type_size[8] = { [0] = 4, [1] = 4, [2] = 2, [3] = 2, [4] = 1, [5] = 1, [7] = 4 }; static void validate_reg(struct brw_instruction *insn, struct brw_reg reg) { int hstride_for_reg[] = {0, 1, 2, 4}; int vstride_for_reg[] = {0, 1, 2, 4, 8, 16, 32, 64, 128, 256}; int width_for_reg[] = {1, 2, 4, 8, 16}; int execsize_for_reg[] = {1, 2, 4, 8, 16}; int width, hstride, vstride, execsize; if (reg.file == BRW_IMMEDIATE_VALUE) { /* 3.3.6: Region Parameters. Restriction: Immediate vectors * mean the destination has to be 128-bit aligned and the * destination horiz stride has to be a word. */ if (reg.type == BRW_REGISTER_TYPE_V) { assert(hstride_for_reg[insn->bits1.da1.dest_horiz_stride] * reg_type_size[insn->bits1.da1.dest_reg_type] == 2); } return; } if (reg.file == BRW_ARCHITECTURE_REGISTER_FILE && reg.file == BRW_ARF_NULL) return; assert(reg.hstride >= 0 && reg.hstride < ARRAY_SIZE(hstride_for_reg)); assert(reg.vstride >= 0 && reg.vstride < ARRAY_SIZE(vstride_for_reg)); assert(reg.width >= 0 && reg.width < ARRAY_SIZE(width_for_reg)); assert(insn->header.execution_size >= 0 && insn->header.execution_size < ARRAY_SIZE(execsize_for_reg)); hstride = hstride_for_reg[reg.hstride]; if (reg.vstride == 0xf) { vstride = -1; } else { vstride = vstride_for_reg[reg.vstride]; } width = width_for_reg[reg.width]; execsize = execsize_for_reg[insn->header.execution_size]; /* Restrictions from 3.3.10: Register Region Restrictions. */ /* 3. */ assert(execsize >= width); /* 4. */ if (execsize == width && hstride != 0) { assert(vstride == -1 || vstride == width * hstride); } /* 5. */ if (execsize == width && hstride == 0) { /* no restriction on vstride. */ } /* 6. */ if (width == 1) { assert(hstride == 0); } /* 7. */ if (execsize == 1 && width == 1) { assert(hstride == 0); assert(vstride == 0); } /* 8. */ if (vstride == 0 && hstride == 0) { assert(width == 1); } /* 10. Check destination issues. */ } void brw_set_src0(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) { if (reg.type != BRW_ARCHITECTURE_REGISTER_FILE) assert(reg.nr < 128); gen7_convert_mrf_to_grf(p, ®); validate_reg(insn, reg); insn->bits1.da1.src0_reg_file = reg.file; insn->bits1.da1.src0_reg_type = reg.type; insn->bits2.da1.src0_abs = reg.abs; insn->bits2.da1.src0_negate = reg.negate; insn->bits2.da1.src0_address_mode = reg.address_mode; if (reg.file == BRW_IMMEDIATE_VALUE) { insn->bits3.ud = reg.dw1.ud; /* Required to set some fields in src1 as well: */ insn->bits1.da1.src1_reg_file = 0; /* arf */ insn->bits1.da1.src1_reg_type = reg.type; } else { if (reg.address_mode == BRW_ADDRESS_DIRECT) { if (insn->header.access_mode == BRW_ALIGN_1) { insn->bits2.da1.src0_subreg_nr = reg.subnr; insn->bits2.da1.src0_reg_nr = reg.nr; } else { insn->bits2.da16.src0_subreg_nr = reg.subnr / 16; insn->bits2.da16.src0_reg_nr = reg.nr; } } else { insn->bits2.ia1.src0_subreg_nr = reg.subnr; if (insn->header.access_mode == BRW_ALIGN_1) { insn->bits2.ia1.src0_indirect_offset = reg.dw1.bits.indirect_offset; } else { insn->bits2.ia16.src0_subreg_nr = reg.dw1.bits.indirect_offset; } } if (insn->header.access_mode == BRW_ALIGN_1) { if (reg.width == BRW_WIDTH_1 && insn->header.execution_size == BRW_EXECUTE_1) { insn->bits2.da1.src0_horiz_stride = BRW_HORIZONTAL_STRIDE_0; insn->bits2.da1.src0_width = BRW_WIDTH_1; insn->bits2.da1.src0_vert_stride = BRW_VERTICAL_STRIDE_0; } else { insn->bits2.da1.src0_horiz_stride = reg.hstride; insn->bits2.da1.src0_width = reg.width; insn->bits2.da1.src0_vert_stride = reg.vstride; } } else { insn->bits2.da16.src0_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); insn->bits2.da16.src0_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); insn->bits2.da16.src0_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); insn->bits2.da16.src0_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W); /* This is an oddity of the fact we're using the same * descriptions for registers in align_16 as align_1: */ if (reg.vstride == BRW_VERTICAL_STRIDE_8) insn->bits2.da16.src0_vert_stride = BRW_VERTICAL_STRIDE_4; else insn->bits2.da16.src0_vert_stride = reg.vstride; } } } void brw_set_src1(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg) { assert(reg.file != BRW_MESSAGE_REGISTER_FILE); assert(reg.nr < 128); gen7_convert_mrf_to_grf(p, ®); validate_reg(insn, reg); insn->bits1.da1.src1_reg_file = reg.file; insn->bits1.da1.src1_reg_type = reg.type; insn->bits3.da1.src1_abs = reg.abs; insn->bits3.da1.src1_negate = reg.negate; /* Only src1 can be immediate in two-argument instructions. */ assert(insn->bits1.da1.src0_reg_file != BRW_IMMEDIATE_VALUE); if (reg.file == BRW_IMMEDIATE_VALUE) { insn->bits3.ud = reg.dw1.ud; } else { /* This is a hardware restriction, which may or may not be lifted * in the future: */ assert (reg.address_mode == BRW_ADDRESS_DIRECT); /* assert (reg.file == BRW_GENERAL_REGISTER_FILE); */ if (insn->header.access_mode == BRW_ALIGN_1) { insn->bits3.da1.src1_subreg_nr = reg.subnr; insn->bits3.da1.src1_reg_nr = reg.nr; } else { insn->bits3.da16.src1_subreg_nr = reg.subnr / 16; insn->bits3.da16.src1_reg_nr = reg.nr; } if (insn->header.access_mode == BRW_ALIGN_1) { if (reg.width == BRW_WIDTH_1 && insn->header.execution_size == BRW_EXECUTE_1) { insn->bits3.da1.src1_horiz_stride = BRW_HORIZONTAL_STRIDE_0; insn->bits3.da1.src1_width = BRW_WIDTH_1; insn->bits3.da1.src1_vert_stride = BRW_VERTICAL_STRIDE_0; } else { insn->bits3.da1.src1_horiz_stride = reg.hstride; insn->bits3.da1.src1_width = reg.width; insn->bits3.da1.src1_vert_stride = reg.vstride; } } else { insn->bits3.da16.src1_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); insn->bits3.da16.src1_swz_y = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Y); insn->bits3.da16.src1_swz_z = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_Z); insn->bits3.da16.src1_swz_w = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_W); /* This is an oddity of the fact we're using the same * descriptions for registers in align_16 as align_1: */ if (reg.vstride == BRW_VERTICAL_STRIDE_8) insn->bits3.da16.src1_vert_stride = BRW_VERTICAL_STRIDE_4; else insn->bits3.da16.src1_vert_stride = reg.vstride; } } } /** * Set the Message Descriptor and Extended Message Descriptor fields * for SEND messages. * * \note This zeroes out the Function Control bits, so it must be called * \b before filling out any message-specific data. Callers can * choose not to fill in irrelevant bits; they will be zero. */ static void brw_set_message_descriptor(struct brw_compile *p, struct brw_instruction *inst, enum brw_message_target sfid, unsigned msg_length, unsigned response_length, bool header_present, bool end_of_thread) { brw_set_src1(p, inst, brw_imm_d(0)); if (p->gen >= 050) { inst->bits3.generic_gen5.header_present = header_present; inst->bits3.generic_gen5.response_length = response_length; inst->bits3.generic_gen5.msg_length = msg_length; inst->bits3.generic_gen5.end_of_thread = end_of_thread; if (p->gen >= 060) { /* On Gen6+ Message target/SFID goes in bits 27:24 of the header */ inst->header.destreg__conditionalmod = sfid; } else { /* Set Extended Message Descriptor (ex_desc) */ inst->bits2.send_gen5.sfid = sfid; inst->bits2.send_gen5.end_of_thread = end_of_thread; } } else { inst->bits3.generic.response_length = response_length; inst->bits3.generic.msg_length = msg_length; inst->bits3.generic.msg_target = sfid; inst->bits3.generic.end_of_thread = end_of_thread; } } static void brw_set_math_message(struct brw_compile *p, struct brw_instruction *insn, unsigned function, unsigned integer_type, bool low_precision, bool saturate, unsigned dataType) { unsigned msg_length; unsigned response_length; /* Infer message length from the function */ switch (function) { case BRW_MATH_FUNCTION_POW: case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT: case BRW_MATH_FUNCTION_INT_DIV_REMAINDER: case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER: msg_length = 2; break; default: msg_length = 1; break; } /* Infer response length from the function */ switch (function) { case BRW_MATH_FUNCTION_SINCOS: case BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER: response_length = 2; break; default: response_length = 1; break; } brw_set_message_descriptor(p, insn, BRW_SFID_MATH, msg_length, response_length, false, false); if (p->gen == 050) { insn->bits3.math_gen5.function = function; insn->bits3.math_gen5.int_type = integer_type; insn->bits3.math_gen5.precision = low_precision; insn->bits3.math_gen5.saturate = saturate; insn->bits3.math_gen5.data_type = dataType; insn->bits3.math_gen5.snapshot = 0; } else { insn->bits3.math.function = function; insn->bits3.math.int_type = integer_type; insn->bits3.math.precision = low_precision; insn->bits3.math.saturate = saturate; insn->bits3.math.data_type = dataType; } } static void brw_set_ff_sync_message(struct brw_compile *p, struct brw_instruction *insn, bool allocate, unsigned response_length, bool end_of_thread) { brw_set_message_descriptor(p, insn, BRW_SFID_URB, 1, response_length, true, end_of_thread); insn->bits3.urb_gen5.opcode = 1; /* FF_SYNC */ insn->bits3.urb_gen5.offset = 0; /* Not used by FF_SYNC */ insn->bits3.urb_gen5.swizzle_control = 0; /* Not used by FF_SYNC */ insn->bits3.urb_gen5.allocate = allocate; insn->bits3.urb_gen5.used = 0; /* Not used by FF_SYNC */ insn->bits3.urb_gen5.complete = 0; /* Not used by FF_SYNC */ } static void brw_set_urb_message(struct brw_compile *p, struct brw_instruction *insn, bool allocate, bool used, unsigned msg_length, unsigned response_length, bool end_of_thread, bool complete, unsigned offset, unsigned swizzle_control) { brw_set_message_descriptor(p, insn, BRW_SFID_URB, msg_length, response_length, true, end_of_thread); if (p->gen >= 070) { insn->bits3.urb_gen7.opcode = 0; /* URB_WRITE_HWORD */ insn->bits3.urb_gen7.offset = offset; assert(swizzle_control != BRW_URB_SWIZZLE_TRANSPOSE); insn->bits3.urb_gen7.swizzle_control = swizzle_control; /* per_slot_offset = 0 makes it ignore offsets in message header */ insn->bits3.urb_gen7.per_slot_offset = 0; insn->bits3.urb_gen7.complete = complete; } else if (p->gen >= 050) { insn->bits3.urb_gen5.opcode = 0; /* URB_WRITE */ insn->bits3.urb_gen5.offset = offset; insn->bits3.urb_gen5.swizzle_control = swizzle_control; insn->bits3.urb_gen5.allocate = allocate; insn->bits3.urb_gen5.used = used; /* ? */ insn->bits3.urb_gen5.complete = complete; } else { insn->bits3.urb.opcode = 0; /* ? */ insn->bits3.urb.offset = offset; insn->bits3.urb.swizzle_control = swizzle_control; insn->bits3.urb.allocate = allocate; insn->bits3.urb.used = used; /* ? */ insn->bits3.urb.complete = complete; } } void brw_set_dp_write_message(struct brw_compile *p, struct brw_instruction *insn, unsigned binding_table_index, unsigned msg_control, unsigned msg_type, unsigned msg_length, bool header_present, bool last_render_target, unsigned response_length, bool end_of_thread, bool send_commit_msg) { unsigned sfid; if (p->gen >= 070) { /* Use the Render Cache for RT writes; otherwise use the Data Cache */ if (msg_type == GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE) sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; else sfid = GEN7_SFID_DATAPORT_DATA_CACHE; } else if (p->gen >= 060) { /* Use the render cache for all write messages. */ sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; } else { sfid = BRW_SFID_DATAPORT_WRITE; } brw_set_message_descriptor(p, insn, sfid, msg_length, response_length, header_present, end_of_thread); if (p->gen >= 070) { insn->bits3.gen7_dp.binding_table_index = binding_table_index; insn->bits3.gen7_dp.msg_control = msg_control; insn->bits3.gen7_dp.last_render_target = last_render_target; insn->bits3.gen7_dp.msg_type = msg_type; } else if (p->gen >= 060) { insn->bits3.gen6_dp.binding_table_index = binding_table_index; insn->bits3.gen6_dp.msg_control = msg_control; insn->bits3.gen6_dp.last_render_target = last_render_target; insn->bits3.gen6_dp.msg_type = msg_type; insn->bits3.gen6_dp.send_commit_msg = send_commit_msg; } else if (p->gen >= 050) { insn->bits3.dp_write_gen5.binding_table_index = binding_table_index; insn->bits3.dp_write_gen5.msg_control = msg_control; insn->bits3.dp_write_gen5.last_render_target = last_render_target; insn->bits3.dp_write_gen5.msg_type = msg_type; insn->bits3.dp_write_gen5.send_commit_msg = send_commit_msg; } else { insn->bits3.dp_write.binding_table_index = binding_table_index; insn->bits3.dp_write.msg_control = msg_control; insn->bits3.dp_write.last_render_target = last_render_target; insn->bits3.dp_write.msg_type = msg_type; insn->bits3.dp_write.send_commit_msg = send_commit_msg; } } void brw_set_dp_read_message(struct brw_compile *p, struct brw_instruction *insn, unsigned binding_table_index, unsigned msg_control, unsigned msg_type, unsigned target_cache, unsigned msg_length, unsigned response_length) { unsigned sfid; if (p->gen >= 070) { sfid = GEN7_SFID_DATAPORT_DATA_CACHE; } else if (p->gen >= 060) { if (target_cache == BRW_DATAPORT_READ_TARGET_RENDER_CACHE) sfid = GEN6_SFID_DATAPORT_RENDER_CACHE; else sfid = GEN6_SFID_DATAPORT_SAMPLER_CACHE; } else { sfid = BRW_SFID_DATAPORT_READ; } brw_set_message_descriptor(p, insn, sfid, msg_length, response_length, true, false); if (p->gen >= 070) { insn->bits3.gen7_dp.binding_table_index = binding_table_index; insn->bits3.gen7_dp.msg_control = msg_control; insn->bits3.gen7_dp.last_render_target = 0; insn->bits3.gen7_dp.msg_type = msg_type; } else if (p->gen >= 060) { insn->bits3.gen6_dp.binding_table_index = binding_table_index; insn->bits3.gen6_dp.msg_control = msg_control; insn->bits3.gen6_dp.last_render_target = 0; insn->bits3.gen6_dp.msg_type = msg_type; insn->bits3.gen6_dp.send_commit_msg = 0; } else if (p->gen >= 050) { insn->bits3.dp_read_gen5.binding_table_index = binding_table_index; insn->bits3.dp_read_gen5.msg_control = msg_control; insn->bits3.dp_read_gen5.msg_type = msg_type; insn->bits3.dp_read_gen5.target_cache = target_cache; } else if (p->gen >= 045) { insn->bits3.dp_read_g4x.binding_table_index = binding_table_index; /*0:7*/ insn->bits3.dp_read_g4x.msg_control = msg_control; /*8:10*/ insn->bits3.dp_read_g4x.msg_type = msg_type; /*11:13*/ insn->bits3.dp_read_g4x.target_cache = target_cache; /*14:15*/ } else { insn->bits3.dp_read.binding_table_index = binding_table_index; /*0:7*/ insn->bits3.dp_read.msg_control = msg_control; /*8:11*/ insn->bits3.dp_read.msg_type = msg_type; /*12:13*/ insn->bits3.dp_read.target_cache = target_cache; /*14:15*/ } } static void brw_set_sampler_message(struct brw_compile *p, struct brw_instruction *insn, unsigned binding_table_index, unsigned sampler, unsigned msg_type, unsigned response_length, unsigned msg_length, bool header_present, unsigned simd_mode) { brw_set_message_descriptor(p, insn, BRW_SFID_SAMPLER, msg_length, response_length, header_present, false); if (p->gen >= 070) { insn->bits3.sampler_gen7.binding_table_index = binding_table_index; insn->bits3.sampler_gen7.sampler = sampler; insn->bits3.sampler_gen7.msg_type = msg_type; insn->bits3.sampler_gen7.simd_mode = simd_mode; } else if (p->gen >= 050) { insn->bits3.sampler_gen5.binding_table_index = binding_table_index; insn->bits3.sampler_gen5.sampler = sampler; insn->bits3.sampler_gen5.msg_type = msg_type; insn->bits3.sampler_gen5.simd_mode = simd_mode; } else if (p->gen >= 045) { insn->bits3.sampler_g4x.binding_table_index = binding_table_index; insn->bits3.sampler_g4x.sampler = sampler; insn->bits3.sampler_g4x.msg_type = msg_type; } else { insn->bits3.sampler.binding_table_index = binding_table_index; insn->bits3.sampler.sampler = sampler; insn->bits3.sampler.msg_type = msg_type; insn->bits3.sampler.return_format = BRW_SAMPLER_RETURN_FORMAT_FLOAT32; } } void brw_NOP(struct brw_compile *p) { struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_NOP); brw_set_dest(p, insn, __retype_ud(brw_vec4_grf(0,0))); brw_set_src0(p, insn, __retype_ud(brw_vec4_grf(0,0))); brw_set_src1(p, insn, brw_imm_ud(0x0)); } /*********************************************************************** * Comparisons, if/else/endif */ static void push_if_stack(struct brw_compile *p, struct brw_instruction *inst) { p->if_stack[p->if_stack_depth] = inst; p->if_stack_depth++; if (p->if_stack_array_size <= p->if_stack_depth) { p->if_stack_array_size *= 2; p->if_stack = realloc(p->if_stack, sizeof(struct brw_instruction *)*p->if_stack_array_size); } } /* EU takes the value from the flag register and pushes it onto some * sort of a stack (presumably merging with any flag value already on * the stack). Within an if block, the flags at the top of the stack * control execution on each channel of the unit, eg. on each of the * 16 pixel values in our wm programs. * * When the matching 'else' instruction is reached (presumably by * countdown of the instruction count patched in by our ELSE/ENDIF * functions), the relevent flags are inverted. * * When the matching 'endif' instruction is reached, the flags are * popped off. If the stack is now empty, normal execution resumes. */ struct brw_instruction * brw_IF(struct brw_compile *p, unsigned execute_size) { struct brw_instruction *insn; insn = brw_next_insn(p, BRW_OPCODE_IF); /* Override the defaults for this instruction: */ if (p->gen < 060) { brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0x0)); } else if (p->gen < 070) { brw_set_dest(p, insn, brw_imm_w(0)); insn->bits1.branch_gen6.jump_count = 0; brw_set_src0(p, insn, __retype_d(brw_null_reg())); brw_set_src1(p, insn, __retype_d(brw_null_reg())); } else { brw_set_dest(p, insn, __retype_d(brw_null_reg())); brw_set_src0(p, insn, __retype_d(brw_null_reg())); brw_set_src1(p, insn, brw_imm_ud(0)); insn->bits3.break_cont.jip = 0; insn->bits3.break_cont.uip = 0; } insn->header.execution_size = execute_size; insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.predicate_control = BRW_PREDICATE_NORMAL; insn->header.mask_control = BRW_MASK_ENABLE; if (!p->single_program_flow) insn->header.thread_control = BRW_THREAD_SWITCH; p->current->header.predicate_control = BRW_PREDICATE_NONE; push_if_stack(p, insn); return insn; } /* This function is only used for gen6-style IF instructions with an * embedded comparison (conditional modifier). It is not used on gen7. */ struct brw_instruction * gen6_IF(struct brw_compile *p, uint32_t conditional, struct brw_reg src0, struct brw_reg src1) { struct brw_instruction *insn; insn = brw_next_insn(p, BRW_OPCODE_IF); brw_set_dest(p, insn, brw_imm_w(0)); if (p->compressed) { insn->header.execution_size = BRW_EXECUTE_16; } else { insn->header.execution_size = BRW_EXECUTE_8; } insn->bits1.branch_gen6.jump_count = 0; brw_set_src0(p, insn, src0); brw_set_src1(p, insn, src1); assert(insn->header.compression_control == BRW_COMPRESSION_NONE); assert(insn->header.predicate_control == BRW_PREDICATE_NONE); insn->header.destreg__conditionalmod = conditional; if (!p->single_program_flow) insn->header.thread_control = BRW_THREAD_SWITCH; push_if_stack(p, insn); return insn; } /** * In single-program-flow (SPF) mode, convert IF and ELSE into ADDs. */ static void convert_IF_ELSE_to_ADD(struct brw_compile *p, struct brw_instruction *if_inst, struct brw_instruction *else_inst) { /* The next instruction (where the ENDIF would be, if it existed) */ struct brw_instruction *next_inst = &p->store[p->nr_insn]; assert(p->single_program_flow); assert(if_inst != NULL && if_inst->header.opcode == BRW_OPCODE_IF); assert(else_inst == NULL || else_inst->header.opcode == BRW_OPCODE_ELSE); assert(if_inst->header.execution_size == BRW_EXECUTE_1); /* Convert IF to an ADD instruction that moves the instruction pointer * to the first instruction of the ELSE block. If there is no ELSE * block, point to where ENDIF would be. Reverse the predicate. * * There's no need to execute an ENDIF since we don't need to do any * stack operations, and if we're currently executing, we just want to * continue normally. */ if_inst->header.opcode = BRW_OPCODE_ADD; if_inst->header.predicate_inverse = 1; if (else_inst != NULL) { /* Convert ELSE to an ADD instruction that points where the ENDIF * would be. */ else_inst->header.opcode = BRW_OPCODE_ADD; if_inst->bits3.ud = (else_inst - if_inst + 1) * 16; else_inst->bits3.ud = (next_inst - else_inst) * 16; } else { if_inst->bits3.ud = (next_inst - if_inst) * 16; } } /** * Patch IF and ELSE instructions with appropriate jump targets. */ static void patch_IF_ELSE(struct brw_compile *p, struct brw_instruction *if_inst, struct brw_instruction *else_inst, struct brw_instruction *endif_inst) { unsigned br = 1; assert(!p->single_program_flow); assert(if_inst != NULL && if_inst->header.opcode == BRW_OPCODE_IF); assert(endif_inst != NULL); assert(else_inst == NULL || else_inst->header.opcode == BRW_OPCODE_ELSE); /* Jump count is for 64bit data chunk each, so one 128bit instruction * requires 2 chunks. */ if (p->gen >= 050) br = 2; assert(endif_inst->header.opcode == BRW_OPCODE_ENDIF); endif_inst->header.execution_size = if_inst->header.execution_size; if (else_inst == NULL) { /* Patch IF -> ENDIF */ if (p->gen < 060) { /* Turn it into an IFF, which means no mask stack operations for * all-false and jumping past the ENDIF. */ if_inst->header.opcode = BRW_OPCODE_IFF; if_inst->bits3.if_else.jump_count = br * (endif_inst - if_inst + 1); if_inst->bits3.if_else.pop_count = 0; if_inst->bits3.if_else.pad0 = 0; } else if (p->gen < 070) { /* As of gen6, there is no IFF and IF must point to the ENDIF. */ if_inst->bits1.branch_gen6.jump_count = br * (endif_inst - if_inst); } else { if_inst->bits3.break_cont.uip = br * (endif_inst - if_inst); if_inst->bits3.break_cont.jip = br * (endif_inst - if_inst); } } else { else_inst->header.execution_size = if_inst->header.execution_size; /* Patch IF -> ELSE */ if (p->gen < 060) { if_inst->bits3.if_else.jump_count = br * (else_inst - if_inst); if_inst->bits3.if_else.pop_count = 0; if_inst->bits3.if_else.pad0 = 0; } else if (p->gen <= 070) { if_inst->bits1.branch_gen6.jump_count = br * (else_inst - if_inst + 1); } /* Patch ELSE -> ENDIF */ if (p->gen < 060) { /* BRW_OPCODE_ELSE pre-gen6 should point just past the * matching ENDIF. */ else_inst->bits3.if_else.jump_count = br*(endif_inst - else_inst + 1); else_inst->bits3.if_else.pop_count = 1; else_inst->bits3.if_else.pad0 = 0; } else if (p->gen < 070) { /* BRW_OPCODE_ELSE on gen6 should point to the matching ENDIF. */ else_inst->bits1.branch_gen6.jump_count = br*(endif_inst - else_inst); } else { /* The IF instruction's JIP should point just past the ELSE */ if_inst->bits3.break_cont.jip = br * (else_inst - if_inst + 1); /* The IF instruction's UIP and ELSE's JIP should point to ENDIF */ if_inst->bits3.break_cont.uip = br * (endif_inst - if_inst); else_inst->bits3.break_cont.jip = br * (endif_inst - else_inst); } } } void brw_ELSE(struct brw_compile *p) { struct brw_instruction *insn; insn = brw_next_insn(p, BRW_OPCODE_ELSE); if (p->gen < 060) { brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0x0)); } else if (p->gen < 070) { brw_set_dest(p, insn, brw_imm_w(0)); insn->bits1.branch_gen6.jump_count = 0; brw_set_src0(p, insn, __retype_d(brw_null_reg())); brw_set_src1(p, insn, __retype_d(brw_null_reg())); } else { brw_set_dest(p, insn, __retype_d(brw_null_reg())); brw_set_src0(p, insn, __retype_d(brw_null_reg())); brw_set_src1(p, insn, brw_imm_ud(0)); insn->bits3.break_cont.jip = 0; insn->bits3.break_cont.uip = 0; } insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.mask_control = BRW_MASK_ENABLE; if (!p->single_program_flow) insn->header.thread_control = BRW_THREAD_SWITCH; push_if_stack(p, insn); } void brw_ENDIF(struct brw_compile *p) { struct brw_instruction *insn; struct brw_instruction *else_inst = NULL; struct brw_instruction *if_inst = NULL; /* Pop the IF and (optional) ELSE instructions from the stack */ p->if_stack_depth--; if (p->if_stack[p->if_stack_depth]->header.opcode == BRW_OPCODE_ELSE) { else_inst = p->if_stack[p->if_stack_depth]; p->if_stack_depth--; } if_inst = p->if_stack[p->if_stack_depth]; if (p->single_program_flow) { /* ENDIF is useless; don't bother emitting it. */ convert_IF_ELSE_to_ADD(p, if_inst, else_inst); return; } insn = brw_next_insn(p, BRW_OPCODE_ENDIF); if (p->gen < 060) { brw_set_dest(p, insn, __retype_ud(brw_vec4_grf(0,0))); brw_set_src0(p, insn, __retype_ud(brw_vec4_grf(0,0))); brw_set_src1(p, insn, brw_imm_d(0x0)); } else if (p->gen < 070) { brw_set_dest(p, insn, brw_imm_w(0)); brw_set_src0(p, insn, __retype_d(brw_null_reg())); brw_set_src1(p, insn, __retype_d(brw_null_reg())); } else { brw_set_dest(p, insn, __retype_d(brw_null_reg())); brw_set_src0(p, insn, __retype_d(brw_null_reg())); brw_set_src1(p, insn, brw_imm_ud(0)); } insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.mask_control = BRW_MASK_ENABLE; insn->header.thread_control = BRW_THREAD_SWITCH; /* Also pop item off the stack in the endif instruction: */ if (p->gen < 060) { insn->bits3.if_else.jump_count = 0; insn->bits3.if_else.pop_count = 1; insn->bits3.if_else.pad0 = 0; } else if (p->gen < 070) { insn->bits1.branch_gen6.jump_count = 2; } else { insn->bits3.break_cont.jip = 2; } patch_IF_ELSE(p, if_inst, else_inst, insn); } struct brw_instruction *brw_BREAK(struct brw_compile *p, int pop_count) { struct brw_instruction *insn; insn = brw_next_insn(p, BRW_OPCODE_BREAK); if (p->gen >= 060) { brw_set_dest(p, insn, __retype_d(brw_null_reg())); brw_set_src0(p, insn, __retype_d(brw_null_reg())); brw_set_src1(p, insn, brw_imm_d(0x0)); } else { brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0x0)); insn->bits3.if_else.pad0 = 0; insn->bits3.if_else.pop_count = pop_count; } insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.execution_size = BRW_EXECUTE_8; return insn; } struct brw_instruction *gen6_CONT(struct brw_compile *p, struct brw_instruction *do_insn) { struct brw_instruction *insn; insn = brw_next_insn(p, BRW_OPCODE_CONTINUE); brw_set_dest(p, insn, __retype_d(brw_null_reg())); brw_set_src0(p, insn, __retype_d(brw_null_reg())); brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0x0)); insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.execution_size = BRW_EXECUTE_8; return insn; } struct brw_instruction *brw_CONT(struct brw_compile *p, int pop_count) { struct brw_instruction *insn; insn = brw_next_insn(p, BRW_OPCODE_CONTINUE); brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0x0)); insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.execution_size = BRW_EXECUTE_8; /* insn->header.mask_control = BRW_MASK_DISABLE; */ insn->bits3.if_else.pad0 = 0; insn->bits3.if_else.pop_count = pop_count; return insn; } /* DO/WHILE loop: * * The DO/WHILE is just an unterminated loop -- break or continue are * used for control within the loop. We have a few ways they can be * done. * * For uniform control flow, the WHILE is just a jump, so ADD ip, ip, * jip and no DO instruction. * * For non-uniform control flow pre-gen6, there's a DO instruction to * push the mask, and a WHILE to jump back, and BREAK to get out and * pop the mask. * * For gen6, there's no more mask stack, so no need for DO. WHILE * just points back to the first instruction of the loop. */ struct brw_instruction *brw_DO(struct brw_compile *p, unsigned execute_size) { if (p->gen >= 060 || p->single_program_flow) { return &p->store[p->nr_insn]; } else { struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_DO); /* Override the defaults for this instruction: */ brw_set_dest(p, insn, brw_null_reg()); brw_set_src0(p, insn, brw_null_reg()); brw_set_src1(p, insn, brw_null_reg()); insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.execution_size = execute_size; insn->header.predicate_control = BRW_PREDICATE_NONE; /* insn->header.mask_control = BRW_MASK_ENABLE; */ /* insn->header.mask_control = BRW_MASK_DISABLE; */ return insn; } } struct brw_instruction *brw_WHILE(struct brw_compile *p, struct brw_instruction *do_insn) { struct brw_instruction *insn; unsigned br = 1; if (p->gen >= 050) br = 2; if (p->gen >= 070) { insn = brw_next_insn(p, BRW_OPCODE_WHILE); brw_set_dest(p, insn, __retype_d(brw_null_reg())); brw_set_src0(p, insn, __retype_d(brw_null_reg())); brw_set_src1(p, insn, brw_imm_ud(0)); insn->bits3.break_cont.jip = br * (do_insn - insn); insn->header.execution_size = BRW_EXECUTE_8; } else if (p->gen >= 060) { insn = brw_next_insn(p, BRW_OPCODE_WHILE); brw_set_dest(p, insn, brw_imm_w(0)); insn->bits1.branch_gen6.jump_count = br * (do_insn - insn); brw_set_src0(p, insn, __retype_d(brw_null_reg())); brw_set_src1(p, insn, __retype_d(brw_null_reg())); insn->header.execution_size = BRW_EXECUTE_8; } else { if (p->single_program_flow) { insn = brw_next_insn(p, BRW_OPCODE_ADD); brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d((do_insn - insn) * 16)); insn->header.execution_size = BRW_EXECUTE_1; } else { insn = brw_next_insn(p, BRW_OPCODE_WHILE); assert(do_insn->header.opcode == BRW_OPCODE_DO); brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); brw_set_src1(p, insn, brw_imm_d(0)); insn->header.execution_size = do_insn->header.execution_size; insn->bits3.if_else.jump_count = br * (do_insn - insn + 1); insn->bits3.if_else.pop_count = 0; insn->bits3.if_else.pad0 = 0; } } insn->header.compression_control = BRW_COMPRESSION_NONE; p->current->header.predicate_control = BRW_PREDICATE_NONE; return insn; } /* FORWARD JUMPS: */ void brw_land_fwd_jump(struct brw_compile *p, struct brw_instruction *jmp_insn) { struct brw_instruction *landing = &p->store[p->nr_insn]; unsigned jmpi = 1; if (p->gen >= 050) jmpi = 2; assert(jmp_insn->header.opcode == BRW_OPCODE_JMPI); assert(jmp_insn->bits1.da1.src1_reg_file == BRW_IMMEDIATE_VALUE); jmp_insn->bits3.ud = jmpi * ((landing - jmp_insn) - 1); } /* To integrate with the above, it makes sense that the comparison * instruction should populate the flag register. It might be simpler * just to use the flag reg for most WM tasks? */ void brw_CMP(struct brw_compile *p, struct brw_reg dest, unsigned conditional, struct brw_reg src0, struct brw_reg src1) { struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_CMP); insn->header.destreg__conditionalmod = conditional; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, src1); /* Make it so that future instructions will use the computed flag * value until brw_set_predicate_control_flag_value() is called * again. */ if (dest.file == BRW_ARCHITECTURE_REGISTER_FILE && dest.nr == 0) { p->current->header.predicate_control = BRW_PREDICATE_NORMAL; p->flag_value = 0xff; } } /* Issue 'wait' instruction for n1, host could program MMIO to wake up thread. */ void brw_WAIT(struct brw_compile *p) { struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_WAIT); struct brw_reg src = brw_notification_1_reg(); brw_set_dest(p, insn, src); brw_set_src0(p, insn, src); brw_set_src1(p, insn, brw_null_reg()); insn->header.execution_size = 0; /* must */ insn->header.predicate_control = 0; insn->header.compression_control = 0; } /*********************************************************************** * Helpers for the various SEND message types: */ /** Extended math function, float[8]. */ void brw_math(struct brw_compile *p, struct brw_reg dest, unsigned function, unsigned saturate, unsigned msg_reg_nr, struct brw_reg src, unsigned data_type, unsigned precision) { if (p->gen >= 060) { struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_MATH); assert(dest.file == BRW_GENERAL_REGISTER_FILE); assert(src.file == BRW_GENERAL_REGISTER_FILE); assert(dest.hstride == BRW_HORIZONTAL_STRIDE_1); assert(src.hstride == BRW_HORIZONTAL_STRIDE_1); /* Source modifiers are ignored for extended math instructions. */ assert(!src.negate); assert(!src.abs); if (function != BRW_MATH_FUNCTION_INT_DIV_QUOTIENT && function != BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER) { assert(src.type == BRW_REGISTER_TYPE_F); } /* Math is the same ISA format as other opcodes, except that CondModifier * becomes FC[3:0] and ThreadCtrl becomes FC[5:4]. */ insn->header.destreg__conditionalmod = function; insn->header.saturate = saturate; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src); brw_set_src1(p, insn, brw_null_reg()); } else { struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND); /* Example code doesn't set predicate_control for send * instructions. */ insn->header.predicate_control = 0; insn->header.destreg__conditionalmod = msg_reg_nr; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src); brw_set_math_message(p, insn, function, src.type == BRW_REGISTER_TYPE_D, precision, saturate, data_type); } } /** Extended math function, float[8]. */ void brw_math2(struct brw_compile *p, struct brw_reg dest, unsigned function, struct brw_reg src0, struct brw_reg src1) { struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_MATH); assert(dest.file == BRW_GENERAL_REGISTER_FILE); assert(src0.file == BRW_GENERAL_REGISTER_FILE); assert(src1.file == BRW_GENERAL_REGISTER_FILE); assert(dest.hstride == BRW_HORIZONTAL_STRIDE_1); assert(src0.hstride == BRW_HORIZONTAL_STRIDE_1); assert(src1.hstride == BRW_HORIZONTAL_STRIDE_1); if (function != BRW_MATH_FUNCTION_INT_DIV_QUOTIENT && function != BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER) { assert(src0.type == BRW_REGISTER_TYPE_F); assert(src1.type == BRW_REGISTER_TYPE_F); } /* Source modifiers are ignored for extended math instructions. */ assert(!src0.negate); assert(!src0.abs); assert(!src1.negate); assert(!src1.abs); /* Math is the same ISA format as other opcodes, except that CondModifier * becomes FC[3:0] and ThreadCtrl becomes FC[5:4]. */ insn->header.destreg__conditionalmod = function; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, src1); } /** * Extended math function, float[16]. * Use 2 send instructions. */ void brw_math_16(struct brw_compile *p, struct brw_reg dest, unsigned function, unsigned saturate, unsigned msg_reg_nr, struct brw_reg src, unsigned precision) { struct brw_instruction *insn; if (p->gen >= 060) { insn = brw_next_insn(p, BRW_OPCODE_MATH); /* Math is the same ISA format as other opcodes, except that CondModifier * becomes FC[3:0] and ThreadCtrl becomes FC[5:4]. */ insn->header.destreg__conditionalmod = function; insn->header.saturate = saturate; /* Source modifiers are ignored for extended math instructions. */ assert(!src.negate); assert(!src.abs); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src); brw_set_src1(p, insn, brw_null_reg()); return; } /* First instruction: */ brw_push_insn_state(p); brw_set_predicate_control_flag_value(p, 0xff); brw_set_compression_control(p, BRW_COMPRESSION_NONE); insn = brw_next_insn(p, BRW_OPCODE_SEND); insn->header.destreg__conditionalmod = msg_reg_nr; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src); brw_set_math_message(p, insn, function, BRW_MATH_INTEGER_UNSIGNED, precision, saturate, BRW_MATH_DATA_VECTOR); /* Second instruction: */ insn = brw_next_insn(p, BRW_OPCODE_SEND); insn->header.compression_control = BRW_COMPRESSION_2NDHALF; insn->header.destreg__conditionalmod = msg_reg_nr+1; brw_set_dest(p, insn, __offset(dest,1)); brw_set_src0(p, insn, src); brw_set_math_message(p, insn, function, BRW_MATH_INTEGER_UNSIGNED, precision, saturate, BRW_MATH_DATA_VECTOR); brw_pop_insn_state(p); } /** * Write a block of OWORDs (half a GRF each) from the scratch buffer, * using a constant offset per channel. * * The offset must be aligned to oword size (16 bytes). Used for * register spilling. */ void brw_oword_block_write_scratch(struct brw_compile *p, struct brw_reg mrf, int num_regs, unsigned offset) { uint32_t msg_control, msg_type; int mlen; if (p->gen >= 060) offset /= 16; mrf = __retype_ud(mrf); if (num_regs == 1) { msg_control = BRW_DATAPORT_OWORD_BLOCK_2_OWORDS; mlen = 2; } else { msg_control = BRW_DATAPORT_OWORD_BLOCK_4_OWORDS; mlen = 3; } /* Set up the message header. This is g0, with g0.2 filled with * the offset. We don't want to leave our offset around in g0 or * it'll screw up texture samples, so set it up inside the message * reg. */ { brw_push_insn_state(p); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MOV(p, mrf, __retype_ud(brw_vec8_grf(0, 0))); /* set message header global offset field (reg 0, element 2) */ brw_MOV(p, __retype_ud(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, mrf.nr, 2)), brw_imm_ud(offset)); brw_pop_insn_state(p); } { struct brw_reg dest; struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND); int send_commit_msg; struct brw_reg src_header = __retype_uw(brw_vec8_grf(0, 0)); if (insn->header.compression_control != BRW_COMPRESSION_NONE) { insn->header.compression_control = BRW_COMPRESSION_NONE; src_header = vec16(src_header); } assert(insn->header.predicate_control == BRW_PREDICATE_NONE); insn->header.destreg__conditionalmod = mrf.nr; /* Until gen6, writes followed by reads from the same location * are not guaranteed to be ordered unless write_commit is set. * If set, then a no-op write is issued to the destination * register to set a dependency, and a read from the destination * can be used to ensure the ordering. * * For gen6, only writes between different threads need ordering * protection. Our use of DP writes is all about register * spilling within a thread. */ if (p->gen >= 060) { dest = __retype_uw(vec16(brw_null_reg())); send_commit_msg = 0; } else { dest = src_header; send_commit_msg = 1; } brw_set_dest(p, insn, dest); if (p->gen >= 060) { brw_set_src0(p, insn, mrf); } else { brw_set_src0(p, insn, brw_null_reg()); } if (p->gen >= 060) msg_type = GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE; else msg_type = BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE; brw_set_dp_write_message(p, insn, 255, /* binding table index (255=stateless) */ msg_control, msg_type, mlen, true, /* header_present */ 0, /* pixel scoreboard */ send_commit_msg, /* response_length */ 0, /* eot */ send_commit_msg); } } /** * Read a block of owords (half a GRF each) from the scratch buffer * using a constant index per channel. * * Offset must be aligned to oword size (16 bytes). Used for register * spilling. */ void brw_oword_block_read_scratch(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, int num_regs, unsigned offset) { uint32_t msg_control; int rlen; if (p->gen >= 060) offset /= 16; mrf = __retype_ud(mrf); dest = __retype_uw(dest); if (num_regs == 1) { msg_control = BRW_DATAPORT_OWORD_BLOCK_2_OWORDS; rlen = 1; } else { msg_control = BRW_DATAPORT_OWORD_BLOCK_4_OWORDS; rlen = 2; } { brw_push_insn_state(p); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_MOV(p, mrf, __retype_ud(brw_vec8_grf(0, 0))); /* set message header global offset field (reg 0, element 2) */ brw_MOV(p, __retype_ud(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, mrf.nr, 2)), brw_imm_ud(offset)); brw_pop_insn_state(p); } { struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND); assert(insn->header.predicate_control == 0); insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.destreg__conditionalmod = mrf.nr; brw_set_dest(p, insn, dest); /* UW? */ if (p->gen >= 060) { brw_set_src0(p, insn, mrf); } else { brw_set_src0(p, insn, brw_null_reg()); } brw_set_dp_read_message(p, insn, 255, /* binding table index (255=stateless) */ msg_control, BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, /* msg_type */ BRW_DATAPORT_READ_TARGET_RENDER_CACHE, 1, /* msg_length */ rlen); } } /** * Read a float[4] vector from the data port Data Cache (const buffer). * Location (in buffer) should be a multiple of 16. * Used for fetching shader constants. */ void brw_oword_block_read(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, uint32_t offset, uint32_t bind_table_index) { struct brw_instruction *insn; /* On newer hardware, offset is in units of owords. */ if (p->gen >= 060) offset /= 16; mrf = __retype_ud(mrf); brw_push_insn_state(p); brw_set_predicate_control(p, BRW_PREDICATE_NONE); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_MOV(p, mrf, __retype_ud(brw_vec8_grf(0, 0))); /* set message header global offset field (reg 0, element 2) */ brw_MOV(p, __retype_ud(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, mrf.nr, 2)), brw_imm_ud(offset)); insn = brw_next_insn(p, BRW_OPCODE_SEND); insn->header.destreg__conditionalmod = mrf.nr; /* cast dest to a uword[8] vector */ dest = __retype_uw(vec8(dest)); brw_set_dest(p, insn, dest); if (p->gen >= 060) { brw_set_src0(p, insn, mrf); } else { brw_set_src0(p, insn, brw_null_reg()); } brw_set_dp_read_message(p, insn, bind_table_index, BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW, BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, BRW_DATAPORT_READ_TARGET_DATA_CACHE, 1, /* msg_length */ 1); /* response_length (1 reg, 2 owords!) */ brw_pop_insn_state(p); } /** * Read a set of dwords from the data port Data Cache (const buffer). * * Location (in buffer) appears as UD offsets in the register after * the provided mrf header reg. */ void brw_dword_scattered_read(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, uint32_t bind_table_index) { struct brw_instruction *insn; mrf = __retype_ud(mrf); brw_push_insn_state(p); brw_set_predicate_control(p, BRW_PREDICATE_NONE); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_MOV(p, mrf, __retype_ud(brw_vec8_grf(0, 0))); brw_pop_insn_state(p); insn = brw_next_insn(p, BRW_OPCODE_SEND); insn->header.destreg__conditionalmod = mrf.nr; /* cast dest to a uword[8] vector */ dest = __retype_uw(vec8(dest)); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, brw_null_reg()); brw_set_dp_read_message(p, insn, bind_table_index, BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS, BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ, BRW_DATAPORT_READ_TARGET_DATA_CACHE, 2, /* msg_length */ 1); /* response_length */ } /** * Read float[4] constant(s) from VS constant buffer. * For relative addressing, two float[4] constants will be read into 'dest'. * Otherwise, one float[4] constant will be read into the lower half of 'dest'. */ void brw_dp_READ_4_vs(struct brw_compile *p, struct brw_reg dest, unsigned location, unsigned bind_table_index) { struct brw_instruction *insn; unsigned msg_reg_nr = 1; if (p->gen >= 060) location /= 16; /* Setup MRF[1] with location/offset into const buffer */ brw_push_insn_state(p); brw_set_access_mode(p, BRW_ALIGN_1); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_set_predicate_control(p, BRW_PREDICATE_NONE); brw_MOV(p, __retype_ud(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, msg_reg_nr, 2)), brw_imm_ud(location)); brw_pop_insn_state(p); insn = brw_next_insn(p, BRW_OPCODE_SEND); insn->header.predicate_control = BRW_PREDICATE_NONE; insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.destreg__conditionalmod = msg_reg_nr; insn->header.mask_control = BRW_MASK_DISABLE; brw_set_dest(p, insn, dest); if (p->gen >= 060) { brw_set_src0(p, insn, brw_message_reg(msg_reg_nr)); } else { brw_set_src0(p, insn, brw_null_reg()); } brw_set_dp_read_message(p, insn, bind_table_index, 0, BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, /* msg_type */ BRW_DATAPORT_READ_TARGET_DATA_CACHE, 1, /* msg_length */ 1); /* response_length (1 Oword) */ } /** * Read a float[4] constant per vertex from VS constant buffer, with * relative addressing. */ void brw_dp_READ_4_vs_relative(struct brw_compile *p, struct brw_reg dest, struct brw_reg addr_reg, unsigned offset, unsigned bind_table_index) { struct brw_reg src = brw_vec8_grf(0, 0); struct brw_instruction *insn; int msg_type; /* Setup MRF[1] with offset into const buffer */ brw_push_insn_state(p); brw_set_access_mode(p, BRW_ALIGN_1); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_set_predicate_control(p, BRW_PREDICATE_NONE); /* M1.0 is block offset 0, M1.4 is block offset 1, all other * fields ignored. */ brw_ADD(p, __retype_d(brw_message_reg(1)), addr_reg, brw_imm_d(offset)); brw_pop_insn_state(p); gen6_resolve_implied_move(p, &src, 0); insn = brw_next_insn(p, BRW_OPCODE_SEND); insn->header.predicate_control = BRW_PREDICATE_NONE; insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.destreg__conditionalmod = 0; insn->header.mask_control = BRW_MASK_DISABLE; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src); if (p->gen >= 060) msg_type = GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ; else if (p->gen >= 045) msg_type = G45_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ; else msg_type = BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ; brw_set_dp_read_message(p, insn, bind_table_index, BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD, msg_type, BRW_DATAPORT_READ_TARGET_DATA_CACHE, 2, /* msg_length */ 1); /* response_length */ } void brw_fb_WRITE(struct brw_compile *p, int dispatch_width, unsigned msg_reg_nr, struct brw_reg src0, unsigned msg_control, unsigned binding_table_index, unsigned msg_length, unsigned response_length, bool eot, bool header_present) { struct brw_instruction *insn; unsigned msg_type; struct brw_reg dest; if (dispatch_width == 16) dest = __retype_uw(vec16(brw_null_reg())); else dest = __retype_uw(vec8(brw_null_reg())); if (p->gen >= 060 && binding_table_index == 0) { insn = brw_next_insn(p, BRW_OPCODE_SENDC); } else { insn = brw_next_insn(p, BRW_OPCODE_SEND); } /* The execution mask is ignored for render target writes. */ insn->header.predicate_control = 0; insn->header.compression_control = BRW_COMPRESSION_NONE; if (p->gen >= 060) { /* headerless version, just submit color payload */ src0 = brw_message_reg(msg_reg_nr); msg_type = GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE; } else { insn->header.destreg__conditionalmod = msg_reg_nr; msg_type = BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE; } brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_dp_write_message(p, insn, binding_table_index, msg_control, msg_type, msg_length, header_present, eot, response_length, eot, 0 /* send_commit_msg */); } /** * Texture sample instruction. * Note: the msg_type plus msg_length values determine exactly what kind * of sampling operation is performed. See volume 4, page 161 of docs. */ void brw_SAMPLE(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, unsigned binding_table_index, unsigned sampler, unsigned writemask, unsigned msg_type, unsigned response_length, unsigned msg_length, bool header_present, unsigned simd_mode) { assert(writemask); if (p->gen < 050 || writemask != WRITEMASK_XYZW) { struct brw_reg m1 = brw_message_reg(msg_reg_nr); writemask = ~writemask & WRITEMASK_XYZW; brw_push_insn_state(p); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_MOV(p, __retype_ud(m1), __retype_ud(brw_vec8_grf(0,0))); brw_MOV(p, get_element_ud(m1, 2), brw_imm_ud(writemask << 12)); brw_pop_insn_state(p); src0 = __retype_uw(brw_null_reg()); } { struct brw_instruction *insn; gen6_resolve_implied_move(p, &src0, msg_reg_nr); insn = brw_next_insn(p, BRW_OPCODE_SEND); insn->header.predicate_control = 0; /* XXX */ insn->header.compression_control = BRW_COMPRESSION_NONE; if (p->gen < 060) insn->header.destreg__conditionalmod = msg_reg_nr; brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_sampler_message(p, insn, binding_table_index, sampler, msg_type, response_length, msg_length, header_present, simd_mode); } } /* All these variables are pretty confusing - we might be better off * using bitmasks and macros for this, in the old style. Or perhaps * just having the caller instantiate the fields in dword3 itself. */ void brw_urb_WRITE(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, bool allocate, bool used, unsigned msg_length, unsigned response_length, bool eot, bool writes_complete, unsigned offset, unsigned swizzle) { struct brw_instruction *insn; gen6_resolve_implied_move(p, &src0, msg_reg_nr); if (p->gen >= 070) { /* Enable Channel Masks in the URB_WRITE_HWORD message header */ brw_push_insn_state(p); brw_set_access_mode(p, BRW_ALIGN_1); brw_OR(p, __retype_ud(brw_vec1_reg(BRW_MESSAGE_REGISTER_FILE, msg_reg_nr, 5)), __retype_ud(brw_vec1_grf(0, 5)), brw_imm_ud(0xff00)); brw_pop_insn_state(p); } insn = brw_next_insn(p, BRW_OPCODE_SEND); assert(msg_length < BRW_MAX_MRF); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, brw_imm_d(0)); if (p->gen <= 060) insn->header.destreg__conditionalmod = msg_reg_nr; brw_set_urb_message(p, insn, allocate, used, msg_length, response_length, eot, writes_complete, offset, swizzle); } static int brw_find_next_block_end(struct brw_compile *p, int start) { int ip; for (ip = start + 1; ip < p->nr_insn; ip++) { struct brw_instruction *insn = &p->store[ip]; switch (insn->header.opcode) { case BRW_OPCODE_ENDIF: case BRW_OPCODE_ELSE: case BRW_OPCODE_WHILE: return ip; } } assert(!"not reached"); return start + 1; } /* There is no DO instruction on gen6, so to find the end of the loop * we have to see if the loop is jumping back before our start * instruction. */ static int brw_find_loop_end(struct brw_compile *p, int start) { int ip; int br = 2; for (ip = start + 1; ip < p->nr_insn; ip++) { struct brw_instruction *insn = &p->store[ip]; if (insn->header.opcode == BRW_OPCODE_WHILE) { int jip = p->gen <= 070 ? insn->bits1.branch_gen6.jump_count : insn->bits3.break_cont.jip; if (ip + jip / br <= start) return ip; } } assert(!"not reached"); return start + 1; } /* After program generation, go back and update the UIP and JIP of * BREAK and CONT instructions to their correct locations. */ void brw_set_uip_jip(struct brw_compile *p) { int ip; int br = 2; if (p->gen <= 060) return; for (ip = 0; ip < p->nr_insn; ip++) { struct brw_instruction *insn = &p->store[ip]; switch (insn->header.opcode) { case BRW_OPCODE_BREAK: insn->bits3.break_cont.jip = br * (brw_find_next_block_end(p, ip) - ip); /* Gen7 UIP points to WHILE; Gen6 points just after it */ insn->bits3.break_cont.uip = br * (brw_find_loop_end(p, ip) - ip + (p->gen <= 070 ? 1 : 0)); break; case BRW_OPCODE_CONTINUE: insn->bits3.break_cont.jip = br * (brw_find_next_block_end(p, ip) - ip); insn->bits3.break_cont.uip = br * (brw_find_loop_end(p, ip) - ip); assert(insn->bits3.break_cont.uip != 0); assert(insn->bits3.break_cont.jip != 0); break; } } } void brw_ff_sync(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, bool allocate, unsigned response_length, bool eot) { struct brw_instruction *insn; gen6_resolve_implied_move(p, &src0, msg_reg_nr); insn = brw_next_insn(p, BRW_OPCODE_SEND); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, brw_imm_d(0)); if (p->gen < 060) insn->header.destreg__conditionalmod = msg_reg_nr; brw_set_ff_sync_message(p, insn, allocate, response_length, eot); } xf86-video-intel-2.99.917/src/sna/brw/brw_eu.h0000664000175000017500000017242512432737457015556 00000000000000/* Copyright (C) Intel Corp. 2006. All Rights Reserved. Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to develop this 3D driver. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **********************************************************************/ /* * Authors: * Keith Whitwell */ #ifndef BRW_EU_H #define BRW_EU_H #include #include #include #include #define BRW_SWIZZLE4(a,b,c,d) (((a)<<0) | ((b)<<2) | ((c)<<4) | ((d)<<6)) #define BRW_GET_SWZ(swz, idx) (((swz) >> ((idx)*2)) & 0x3) #define BRW_SWIZZLE_NOOP BRW_SWIZZLE4(0,1,2,3) #define BRW_SWIZZLE_XYZW BRW_SWIZZLE4(0,1,2,3) #define BRW_SWIZZLE_XXXX BRW_SWIZZLE4(0,0,0,0) #define BRW_SWIZZLE_YYYY BRW_SWIZZLE4(1,1,1,1) #define BRW_SWIZZLE_ZZZZ BRW_SWIZZLE4(2,2,2,2) #define BRW_SWIZZLE_WWWW BRW_SWIZZLE4(3,3,3,3) #define BRW_SWIZZLE_XYXY BRW_SWIZZLE4(0,1,0,1) #define WRITEMASK_X 0x1 #define WRITEMASK_Y 0x2 #define WRITEMASK_Z 0x4 #define WRITEMASK_W 0x8 #define WRITEMASK_XY (WRITEMASK_X | WRITEMASK_Y) #define WRITEMASK_XYZ (WRITEMASK_X | WRITEMASK_Y | WRITEMASK_Z) #define WRITEMASK_XYZW (WRITEMASK_X | WRITEMASK_Y | WRITEMASK_Z | WRITEMASK_W) /** Number of general purpose registers (VS, WM, etc) */ #define BRW_MAX_GRF 128 /** Number of message register file registers */ #define BRW_MAX_MRF 16 #define BRW_ALIGN_1 0 #define BRW_ALIGN_16 1 #define BRW_ADDRESS_DIRECT 0 #define BRW_ADDRESS_REGISTER_INDIRECT_REGISTER 1 #define BRW_CHANNEL_X 0 #define BRW_CHANNEL_Y 1 #define BRW_CHANNEL_Z 2 #define BRW_CHANNEL_W 3 enum brw_compression { BRW_COMPRESSION_NONE, BRW_COMPRESSION_2NDHALF, BRW_COMPRESSION_COMPRESSED, }; #define GEN6_COMPRESSION_1Q 0 #define GEN6_COMPRESSION_2Q 1 #define GEN6_COMPRESSION_3Q 2 #define GEN6_COMPRESSION_4Q 3 #define GEN6_COMPRESSION_1H 0 #define GEN6_COMPRESSION_2H 2 #define BRW_CONDITIONAL_NONE 0 #define BRW_CONDITIONAL_Z 1 #define BRW_CONDITIONAL_NZ 2 #define BRW_CONDITIONAL_EQ 1 /* Z */ #define BRW_CONDITIONAL_NEQ 2 /* NZ */ #define BRW_CONDITIONAL_G 3 #define BRW_CONDITIONAL_GE 4 #define BRW_CONDITIONAL_L 5 #define BRW_CONDITIONAL_LE 6 #define BRW_CONDITIONAL_R 7 #define BRW_CONDITIONAL_O 8 #define BRW_CONDITIONAL_U 9 #define BRW_DEBUG_NONE 0 #define BRW_DEBUG_BREAKPOINT 1 #define BRW_DEPENDENCY_NORMAL 0 #define BRW_DEPENDENCY_NOTCLEARED 1 #define BRW_DEPENDENCY_NOTCHECKED 2 #define BRW_DEPENDENCY_DISABLE 3 #define BRW_EXECUTE_1 0 #define BRW_EXECUTE_2 1 #define BRW_EXECUTE_4 2 #define BRW_EXECUTE_8 3 #define BRW_EXECUTE_16 4 #define BRW_EXECUTE_32 5 #define BRW_HORIZONTAL_STRIDE_0 0 #define BRW_HORIZONTAL_STRIDE_1 1 #define BRW_HORIZONTAL_STRIDE_2 2 #define BRW_HORIZONTAL_STRIDE_4 3 #define BRW_INSTRUCTION_NORMAL 0 #define BRW_INSTRUCTION_SATURATE 1 #define BRW_MASK_ENABLE 0 #define BRW_MASK_DISABLE 1 /** @{ * * Gen6 has replaced "mask enable/disable" with WECtrl, which is * effectively the same but much simpler to think about. Now, there * are two contributors ANDed together to whether channels are * executed: The predication on the instruction, and the channel write * enable. */ /** * This is the default value. It means that a channel's write enable is set * if the per-channel IP is pointing at this instruction. */ #define BRW_WE_NORMAL 0 /** * This is used like BRW_MASK_DISABLE, and causes all channels to have * their write enable set. Note that predication still contributes to * whether the channel actually gets written. */ #define BRW_WE_ALL 1 /** @} */ enum opcode { /* These are the actual hardware opcodes. */ BRW_OPCODE_MOV = 1, BRW_OPCODE_SEL = 2, BRW_OPCODE_NOT = 4, BRW_OPCODE_AND = 5, BRW_OPCODE_OR = 6, BRW_OPCODE_XOR = 7, BRW_OPCODE_SHR = 8, BRW_OPCODE_SHL = 9, BRW_OPCODE_RSR = 10, BRW_OPCODE_RSL = 11, BRW_OPCODE_ASR = 12, BRW_OPCODE_CMP = 16, BRW_OPCODE_CMPN = 17, BRW_OPCODE_JMPI = 32, BRW_OPCODE_IF = 34, BRW_OPCODE_IFF = 35, BRW_OPCODE_ELSE = 36, BRW_OPCODE_ENDIF = 37, BRW_OPCODE_DO = 38, BRW_OPCODE_WHILE = 39, BRW_OPCODE_BREAK = 40, BRW_OPCODE_CONTINUE = 41, BRW_OPCODE_HALT = 42, BRW_OPCODE_MSAVE = 44, BRW_OPCODE_MRESTORE = 45, BRW_OPCODE_PUSH = 46, BRW_OPCODE_POP = 47, BRW_OPCODE_WAIT = 48, BRW_OPCODE_SEND = 49, BRW_OPCODE_SENDC = 50, BRW_OPCODE_MATH = 56, BRW_OPCODE_ADD = 64, BRW_OPCODE_MUL = 65, BRW_OPCODE_AVG = 66, BRW_OPCODE_FRC = 67, BRW_OPCODE_RNDU = 68, BRW_OPCODE_RNDD = 69, BRW_OPCODE_RNDE = 70, BRW_OPCODE_RNDZ = 71, BRW_OPCODE_MAC = 72, BRW_OPCODE_MACH = 73, BRW_OPCODE_LZD = 74, BRW_OPCODE_SAD2 = 80, BRW_OPCODE_SADA2 = 81, BRW_OPCODE_DP4 = 84, BRW_OPCODE_DPH = 85, BRW_OPCODE_DP3 = 86, BRW_OPCODE_DP2 = 87, BRW_OPCODE_DPA2 = 88, BRW_OPCODE_LINE = 89, BRW_OPCODE_PLN = 90, BRW_OPCODE_NOP = 126, /* These are compiler backend opcodes that get translated into other * instructions. */ FS_OPCODE_FB_WRITE = 128, SHADER_OPCODE_RCP, SHADER_OPCODE_RSQ, SHADER_OPCODE_SQRT, SHADER_OPCODE_EXP2, SHADER_OPCODE_LOG2, SHADER_OPCODE_POW, SHADER_OPCODE_SIN, SHADER_OPCODE_COS, FS_OPCODE_DDX, FS_OPCODE_DDY, FS_OPCODE_PIXEL_X, FS_OPCODE_PIXEL_Y, FS_OPCODE_CINTERP, FS_OPCODE_LINTERP, FS_OPCODE_TEX, FS_OPCODE_TXB, FS_OPCODE_TXD, FS_OPCODE_TXF, FS_OPCODE_TXL, FS_OPCODE_TXS, FS_OPCODE_DISCARD, FS_OPCODE_SPILL, FS_OPCODE_UNSPILL, FS_OPCODE_PULL_CONSTANT_LOAD, VS_OPCODE_URB_WRITE, VS_OPCODE_SCRATCH_READ, VS_OPCODE_SCRATCH_WRITE, VS_OPCODE_PULL_CONSTANT_LOAD, }; #define BRW_PREDICATE_NONE 0 #define BRW_PREDICATE_NORMAL 1 #define BRW_PREDICATE_ALIGN1_ANYV 2 #define BRW_PREDICATE_ALIGN1_ALLV 3 #define BRW_PREDICATE_ALIGN1_ANY2H 4 #define BRW_PREDICATE_ALIGN1_ALL2H 5 #define BRW_PREDICATE_ALIGN1_ANY4H 6 #define BRW_PREDICATE_ALIGN1_ALL4H 7 #define BRW_PREDICATE_ALIGN1_ANY8H 8 #define BRW_PREDICATE_ALIGN1_ALL8H 9 #define BRW_PREDICATE_ALIGN1_ANY16H 10 #define BRW_PREDICATE_ALIGN1_ALL16H 11 #define BRW_PREDICATE_ALIGN16_REPLICATE_X 2 #define BRW_PREDICATE_ALIGN16_REPLICATE_Y 3 #define BRW_PREDICATE_ALIGN16_REPLICATE_Z 4 #define BRW_PREDICATE_ALIGN16_REPLICATE_W 5 #define BRW_PREDICATE_ALIGN16_ANY4H 6 #define BRW_PREDICATE_ALIGN16_ALL4H 7 #define BRW_ARCHITECTURE_REGISTER_FILE 0 #define BRW_GENERAL_REGISTER_FILE 1 #define BRW_MESSAGE_REGISTER_FILE 2 #define BRW_IMMEDIATE_VALUE 3 #define BRW_REGISTER_TYPE_UD 0 #define BRW_REGISTER_TYPE_D 1 #define BRW_REGISTER_TYPE_UW 2 #define BRW_REGISTER_TYPE_W 3 #define BRW_REGISTER_TYPE_UB 4 #define BRW_REGISTER_TYPE_B 5 #define BRW_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ #define BRW_REGISTER_TYPE_HF 6 #define BRW_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ #define BRW_REGISTER_TYPE_F 7 #define BRW_ARF_NULL 0x00 #define BRW_ARF_ADDRESS 0x10 #define BRW_ARF_ACCUMULATOR 0x20 #define BRW_ARF_FLAG 0x30 #define BRW_ARF_MASK 0x40 #define BRW_ARF_MASK_STACK 0x50 #define BRW_ARF_MASK_STACK_DEPTH 0x60 #define BRW_ARF_STATE 0x70 #define BRW_ARF_CONTROL 0x80 #define BRW_ARF_NOTIFICATION_COUNT 0x90 #define BRW_ARF_IP 0xA0 #define BRW_MRF_COMPR4 (1 << 7) #define BRW_AMASK 0 #define BRW_IMASK 1 #define BRW_LMASK 2 #define BRW_CMASK 3 #define BRW_THREAD_NORMAL 0 #define BRW_THREAD_ATOMIC 1 #define BRW_THREAD_SWITCH 2 #define BRW_VERTICAL_STRIDE_0 0 #define BRW_VERTICAL_STRIDE_1 1 #define BRW_VERTICAL_STRIDE_2 2 #define BRW_VERTICAL_STRIDE_4 3 #define BRW_VERTICAL_STRIDE_8 4 #define BRW_VERTICAL_STRIDE_16 5 #define BRW_VERTICAL_STRIDE_32 6 #define BRW_VERTICAL_STRIDE_64 7 #define BRW_VERTICAL_STRIDE_128 8 #define BRW_VERTICAL_STRIDE_256 9 #define BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF #define BRW_WIDTH_1 0 #define BRW_WIDTH_2 1 #define BRW_WIDTH_4 2 #define BRW_WIDTH_8 3 #define BRW_WIDTH_16 4 #define BRW_STATELESS_BUFFER_BOUNDARY_1K 0 #define BRW_STATELESS_BUFFER_BOUNDARY_2K 1 #define BRW_STATELESS_BUFFER_BOUNDARY_4K 2 #define BRW_STATELESS_BUFFER_BOUNDARY_8K 3 #define BRW_STATELESS_BUFFER_BOUNDARY_16K 4 #define BRW_STATELESS_BUFFER_BOUNDARY_32K 5 #define BRW_STATELESS_BUFFER_BOUNDARY_64K 6 #define BRW_STATELESS_BUFFER_BOUNDARY_128K 7 #define BRW_STATELESS_BUFFER_BOUNDARY_256K 8 #define BRW_STATELESS_BUFFER_BOUNDARY_512K 9 #define BRW_STATELESS_BUFFER_BOUNDARY_1M 10 #define BRW_STATELESS_BUFFER_BOUNDARY_2M 11 #define BRW_POLYGON_FACING_FRONT 0 #define BRW_POLYGON_FACING_BACK 1 #define BRW_MESSAGE_TARGET_NULL 0 #define BRW_MESSAGE_TARGET_MATH 1 /* reserved on GEN6 */ #define BRW_MESSAGE_TARGET_SAMPLER 2 #define BRW_MESSAGE_TARGET_GATEWAY 3 #define BRW_MESSAGE_TARGET_DATAPORT_READ 4 #define BRW_MESSAGE_TARGET_DATAPORT_WRITE 5 #define BRW_MESSAGE_TARGET_URB 6 #define BRW_MESSAGE_TARGET_THREAD_SPAWNER 7 #define GEN6_MESSAGE_TARGET_DP_SAMPLER_CACHE 4 #define GEN6_MESSAGE_TARGET_DP_RENDER_CACHE 5 #define GEN6_MESSAGE_TARGET_DP_CONST_CACHE 9 #define BRW_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define BRW_SAMPLER_RETURN_FORMAT_UINT32 2 #define BRW_SAMPLER_RETURN_FORMAT_SINT32 3 #define BRW_SAMPLER_MESSAGE_SAMPLE 0 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 #define BRW_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_BIAS_COMPARE 0 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_LOD_COMPARE 1 #define BRW_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 #define BRW_SAMPLER_MESSAGE_SIMD16_RESINFO 2 #define BRW_SAMPLER_MESSAGE_SIMD4X2_LD 3 #define BRW_SAMPLER_MESSAGE_SIMD8_LD 3 #define BRW_SAMPLER_MESSAGE_SIMD16_LD 3 #define GEN5_SAMPLER_MESSAGE_SAMPLE 0 #define GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS 1 #define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD 2 #define GEN5_SAMPLER_MESSAGE_SAMPLE_COMPARE 3 #define GEN5_SAMPLER_MESSAGE_SAMPLE_DERIVS 4 #define GEN5_SAMPLER_MESSAGE_SAMPLE_BIAS_COMPARE 5 #define GEN5_SAMPLER_MESSAGE_SAMPLE_LOD_COMPARE 6 #define GEN5_SAMPLER_MESSAGE_SAMPLE_LD 7 #define GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO 10 /* for GEN5 only */ #define BRW_SAMPLER_SIMD_MODE_SIMD4X2 0 #define BRW_SAMPLER_SIMD_MODE_SIMD8 1 #define BRW_SAMPLER_SIMD_MODE_SIMD16 2 #define BRW_SAMPLER_SIMD_MODE_SIMD32_64 3 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 #define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define BRW_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 /* This one stays the same across generations. */ #define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 /* GEN4 */ #define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 #define BRW_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 2 #define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 /* G45, GEN5 */ #define G45_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ 1 #define G45_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 2 #define G45_DATAPORT_READ_MESSAGE_AVC_LOOP_FILTER_READ 3 #define G45_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 4 #define G45_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 6 /* GEN6 */ #define GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ 1 #define GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 2 #define GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 4 #define GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ 5 #define GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 6 #define BRW_DATAPORT_READ_TARGET_DATA_CACHE 0 #define BRW_DATAPORT_READ_TARGET_RENDER_CACHE 1 #define BRW_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 /** * Message target: Shared Function ID for where to SEND a message. * * These are enumerated in the ISA reference under "send - Send Message". * In particular, see the following tables: * - G45 PRM, Volume 4, Table 14-15 "Message Descriptor Definition" * - Sandybridge PRM, Volume 4 Part 2, Table 8-16 "Extended Message Descriptor" * - BSpec, Volume 1a (GPU Overview) / Graphics Processing Engine (GPE) / * Overview / GPE Function IDs */ enum brw_message_target { BRW_SFID_NULL = 0, BRW_SFID_MATH = 1, /* Only valid on Gen4-5 */ BRW_SFID_SAMPLER = 2, BRW_SFID_MESSAGE_GATEWAY = 3, BRW_SFID_DATAPORT_READ = 4, BRW_SFID_DATAPORT_WRITE = 5, BRW_SFID_URB = 6, BRW_SFID_THREAD_SPAWNER = 7, GEN6_SFID_DATAPORT_SAMPLER_CACHE = 4, GEN6_SFID_DATAPORT_RENDER_CACHE = 5, GEN6_SFID_DATAPORT_CONSTANT_CACHE = 9, GEN7_SFID_DATAPORT_DATA_CACHE = 10, }; #define GEN7_MESSAGE_TARGET_DP_DATA_CACHE 10 #define BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 #define BRW_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 #define BRW_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE 2 #define BRW_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 #define BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 #define BRW_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 #define BRW_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 /* GEN6 */ #define GEN6_DATAPORT_WRITE_MESSAGE_DWORD_ATOMIC_WRITE 7 #define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 8 #define GEN6_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 9 #define GEN6_DATAPORT_WRITE_MESSAGE_MEDIA_BLOCK_WRITE 10 #define GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 11 #define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 12 #define GEN6_DATAPORT_WRITE_MESSAGE_STREAMED_VB_WRITE 13 #define GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_UNORM_WRITE 14 #define BRW_MATH_FUNCTION_INV 1 #define BRW_MATH_FUNCTION_LOG 2 #define BRW_MATH_FUNCTION_EXP 3 #define BRW_MATH_FUNCTION_SQRT 4 #define BRW_MATH_FUNCTION_RSQ 5 #define BRW_MATH_FUNCTION_SIN 6 /* was 7 */ #define BRW_MATH_FUNCTION_COS 7 /* was 8 */ #define BRW_MATH_FUNCTION_SINCOS 8 /* was 6 */ #define BRW_MATH_FUNCTION_TAN 9 /* gen4 */ #define BRW_MATH_FUNCTION_FDIV 9 /* gen6+ */ #define BRW_MATH_FUNCTION_POW 10 #define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 #define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT 12 #define BRW_MATH_FUNCTION_INT_DIV_REMAINDER 13 #define BRW_MATH_INTEGER_UNSIGNED 0 #define BRW_MATH_INTEGER_SIGNED 1 #define BRW_MATH_PRECISION_FULL 0 #define BRW_MATH_PRECISION_PARTIAL 1 #define BRW_MATH_SATURATE_NONE 0 #define BRW_MATH_SATURATE_SATURATE 1 #define BRW_MATH_DATA_VECTOR 0 #define BRW_MATH_DATA_SCALAR 1 #define BRW_URB_OPCODE_WRITE 0 #define BRW_URB_SWIZZLE_NONE 0 #define BRW_URB_SWIZZLE_INTERLEAVE 1 #define BRW_URB_SWIZZLE_TRANSPOSE 2 #define BRW_SCRATCH_SPACE_SIZE_1K 0 #define BRW_SCRATCH_SPACE_SIZE_2K 1 #define BRW_SCRATCH_SPACE_SIZE_4K 2 #define BRW_SCRATCH_SPACE_SIZE_8K 3 #define BRW_SCRATCH_SPACE_SIZE_16K 4 #define BRW_SCRATCH_SPACE_SIZE_32K 5 #define BRW_SCRATCH_SPACE_SIZE_64K 6 #define BRW_SCRATCH_SPACE_SIZE_128K 7 #define BRW_SCRATCH_SPACE_SIZE_256K 8 #define BRW_SCRATCH_SPACE_SIZE_512K 9 #define BRW_SCRATCH_SPACE_SIZE_1M 10 #define BRW_SCRATCH_SPACE_SIZE_2M 11 #define REG_SIZE (8*4) struct brw_instruction { struct { unsigned opcode:7; unsigned pad:1; unsigned access_mode:1; unsigned mask_control:1; unsigned dependency_control:2; unsigned compression_control:2; /* gen6: quater control */ unsigned thread_control:2; unsigned predicate_control:4; unsigned predicate_inverse:1; unsigned execution_size:3; /** * Conditional Modifier for most instructions. On Gen6+, this is also * used for the SEND instruction's Message Target/SFID. */ unsigned destreg__conditionalmod:4; unsigned acc_wr_control:1; unsigned cmpt_control:1; unsigned debug_control:1; unsigned saturate:1; } header; union { struct { unsigned dest_reg_file:2; unsigned dest_reg_type:3; unsigned src0_reg_file:2; unsigned src0_reg_type:3; unsigned src1_reg_file:2; unsigned src1_reg_type:3; unsigned pad:1; unsigned dest_subreg_nr:5; unsigned dest_reg_nr:8; unsigned dest_horiz_stride:2; unsigned dest_address_mode:1; } da1; struct { unsigned dest_reg_file:2; unsigned dest_reg_type:3; unsigned src0_reg_file:2; unsigned src0_reg_type:3; unsigned src1_reg_file:2; /* 0x00000c00 */ unsigned src1_reg_type:3; /* 0x00007000 */ unsigned pad:1; int dest_indirect_offset:10; /* offset against the deref'd address reg */ unsigned dest_subreg_nr:3; /* subnr for the address reg a0.x */ unsigned dest_horiz_stride:2; unsigned dest_address_mode:1; } ia1; struct { unsigned dest_reg_file:2; unsigned dest_reg_type:3; unsigned src0_reg_file:2; unsigned src0_reg_type:3; unsigned src1_reg_file:2; unsigned src1_reg_type:3; unsigned pad:1; unsigned dest_writemask:4; unsigned dest_subreg_nr:1; unsigned dest_reg_nr:8; unsigned dest_horiz_stride:2; unsigned dest_address_mode:1; } da16; struct { unsigned dest_reg_file:2; unsigned dest_reg_type:3; unsigned src0_reg_file:2; unsigned src0_reg_type:3; unsigned pad0:6; unsigned dest_writemask:4; int dest_indirect_offset:6; unsigned dest_subreg_nr:3; unsigned dest_horiz_stride:2; unsigned dest_address_mode:1; } ia16; struct { unsigned dest_reg_file:2; unsigned dest_reg_type:3; unsigned src0_reg_file:2; unsigned src0_reg_type:3; unsigned src1_reg_file:2; unsigned src1_reg_type:3; unsigned pad:1; int jump_count:16; } branch_gen6; struct { unsigned dest_reg_file:1; unsigned flag_subreg_num:1; unsigned pad0:2; unsigned src0_abs:1; unsigned src0_negate:1; unsigned src1_abs:1; unsigned src1_negate:1; unsigned src2_abs:1; unsigned src2_negate:1; unsigned pad1:7; unsigned dest_writemask:4; unsigned dest_subreg_nr:3; unsigned dest_reg_nr:8; } da3src; } bits1; union { struct { unsigned src0_subreg_nr:5; unsigned src0_reg_nr:8; unsigned src0_abs:1; unsigned src0_negate:1; unsigned src0_address_mode:1; unsigned src0_horiz_stride:2; unsigned src0_width:3; unsigned src0_vert_stride:4; unsigned flag_subreg_nr:1; unsigned flag_reg_nr:1; unsigned pad:5; } da1; struct { int src0_indirect_offset:10; unsigned src0_subreg_nr:3; unsigned src0_abs:1; unsigned src0_negate:1; unsigned src0_address_mode:1; unsigned src0_horiz_stride:2; unsigned src0_width:3; unsigned src0_vert_stride:4; unsigned flag_subreg_nr:1; unsigned flag_reg_nr:1; unsigned pad:5; } ia1; struct { unsigned src0_swz_x:2; unsigned src0_swz_y:2; unsigned src0_subreg_nr:1; unsigned src0_reg_nr:8; unsigned src0_abs:1; unsigned src0_negate:1; unsigned src0_address_mode:1; unsigned src0_swz_z:2; unsigned src0_swz_w:2; unsigned pad0:1; unsigned src0_vert_stride:4; unsigned flag_subreg_nr:1; unsigned flag_reg_nr:1; unsigned pad1:5; } da16; struct { unsigned src0_swz_x:2; unsigned src0_swz_y:2; int src0_indirect_offset:6; unsigned src0_subreg_nr:3; unsigned src0_abs:1; unsigned src0_negate:1; unsigned src0_address_mode:1; unsigned src0_swz_z:2; unsigned src0_swz_w:2; unsigned pad0:1; unsigned src0_vert_stride:4; unsigned flag_subreg_nr:1; unsigned flag_reg_nr:1; unsigned pad1:5; } ia16; /* Extended Message Descriptor for Ironlake (Gen5) SEND instruction. * * Does not apply to Gen6+. The SFID/message target moved to bits * 27:24 of the header (destreg__conditionalmod); EOT is in bits3. */ struct { unsigned pad:26; unsigned end_of_thread:1; unsigned pad1:1; unsigned sfid:4; } send_gen5; /* for Ironlake only */ struct { unsigned src0_rep_ctrl:1; unsigned src0_swizzle:8; unsigned src0_subreg_nr:3; unsigned src0_reg_nr:8; unsigned pad0:1; unsigned src1_rep_ctrl:1; unsigned src1_swizzle:8; unsigned src1_subreg_nr_low:2; } da3src; } bits2; union { struct { unsigned src1_subreg_nr:5; unsigned src1_reg_nr:8; unsigned src1_abs:1; unsigned src1_negate:1; unsigned src1_address_mode:1; unsigned src1_horiz_stride:2; unsigned src1_width:3; unsigned src1_vert_stride:4; unsigned pad0:7; } da1; struct { unsigned src1_swz_x:2; unsigned src1_swz_y:2; unsigned src1_subreg_nr:1; unsigned src1_reg_nr:8; unsigned src1_abs:1; unsigned src1_negate:1; unsigned src1_address_mode:1; unsigned src1_swz_z:2; unsigned src1_swz_w:2; unsigned pad1:1; unsigned src1_vert_stride:4; unsigned pad2:7; } da16; struct { int src1_indirect_offset:10; unsigned src1_subreg_nr:3; unsigned src1_abs:1; unsigned src1_negate:1; unsigned src1_address_mode:1; unsigned src1_horiz_stride:2; unsigned src1_width:3; unsigned src1_vert_stride:4; unsigned flag_subreg_nr:1; unsigned flag_reg_nr:1; unsigned pad1:5; } ia1; struct { unsigned src1_swz_x:2; unsigned src1_swz_y:2; int src1_indirect_offset:6; unsigned src1_subreg_nr:3; unsigned src1_abs:1; unsigned src1_negate:1; unsigned pad0:1; unsigned src1_swz_z:2; unsigned src1_swz_w:2; unsigned pad1:1; unsigned src1_vert_stride:4; unsigned flag_subreg_nr:1; unsigned flag_reg_nr:1; unsigned pad2:5; } ia16; struct { int jump_count:16; /* note: signed */ unsigned pop_count:4; unsigned pad0:12; } if_else; /* This is also used for gen7 IF/ELSE instructions */ struct { /* Signed jump distance to the ip to jump to if all channels * are disabled after the break or continue. It should point * to the end of the innermost control flow block, as that's * where some channel could get re-enabled. */ int jip:16; /* Signed jump distance to the location to resume execution * of this channel if it's enabled for the break or continue. */ int uip:16; } break_cont; /** * \defgroup SEND instructions / Message Descriptors * * @{ */ /** * Generic Message Descriptor for Gen4 SEND instructions. The structs * below expand function_control to something specific for their * message. Due to struct packing issues, they duplicate these bits. * * See the G45 PRM, Volume 4, Table 14-15. */ struct { unsigned function_control:16; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } generic; /** * Generic Message Descriptor for Gen5-7 SEND instructions. * * See the Sandybridge PRM, Volume 2 Part 2, Table 8-15. (Sadly, most * of the information on the SEND instruction is missing from the public * Ironlake PRM.) * * The table claims that bit 31 is reserved/MBZ on Gen6+, but it lies. * According to the SEND instruction description: * "The MSb of the message description, the EOT field, always comes from * bit 127 of the instruction word"...which is bit 31 of this field. */ struct { unsigned function_control:19; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } generic_gen5; /** G45 PRM, Volume 4, Section 6.1.1.1 */ struct { unsigned function:4; unsigned int_type:1; unsigned precision:1; unsigned saturate:1; unsigned data_type:1; unsigned pad0:8; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } math; /** Ironlake PRM, Volume 4 Part 1, Section 6.1.1.1 */ struct { unsigned function:4; unsigned int_type:1; unsigned precision:1; unsigned saturate:1; unsigned data_type:1; unsigned snapshot:1; unsigned pad0:10; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } math_gen5; /** G45 PRM, Volume 4, Section 4.8.1.1.1 [DevBW] and [DevCL] */ struct { unsigned binding_table_index:8; unsigned sampler:4; unsigned return_format:2; unsigned msg_type:2; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } sampler; /** G45 PRM, Volume 4, Section 4.8.1.1.2 [DevCTG] */ struct { unsigned binding_table_index:8; unsigned sampler:4; unsigned msg_type:4; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } sampler_g4x; /** Ironlake PRM, Volume 4 Part 1, Section 4.11.1.1.3 */ struct { unsigned binding_table_index:8; unsigned sampler:4; unsigned msg_type:4; unsigned simd_mode:2; unsigned pad0:1; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } sampler_gen5; struct { unsigned binding_table_index:8; unsigned sampler:4; unsigned msg_type:5; unsigned simd_mode:2; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } sampler_gen7; struct brw_urb_immediate { unsigned opcode:4; unsigned offset:6; unsigned swizzle_control:2; unsigned pad:1; unsigned allocate:1; unsigned used:1; unsigned complete:1; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } urb; struct { unsigned opcode:4; unsigned offset:6; unsigned swizzle_control:2; unsigned pad:1; unsigned allocate:1; unsigned used:1; unsigned complete:1; unsigned pad0:3; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } urb_gen5; struct { unsigned opcode:3; unsigned offset:11; unsigned swizzle_control:1; unsigned complete:1; unsigned per_slot_offset:1; unsigned pad0:2; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } urb_gen7; /** 965 PRM, Volume 4, Section 5.10.1.1: Message Descriptor */ struct { unsigned binding_table_index:8; unsigned msg_control:4; unsigned msg_type:2; unsigned target_cache:2; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } dp_read; /** G45 PRM, Volume 4, Section 5.10.1.1.2 */ struct { unsigned binding_table_index:8; unsigned msg_control:3; unsigned msg_type:3; unsigned target_cache:2; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } dp_read_g4x; /** Ironlake PRM, Volume 4 Part 1, Section 5.10.2.1.2. */ struct { unsigned binding_table_index:8; unsigned msg_control:3; unsigned msg_type:3; unsigned target_cache:2; unsigned pad0:3; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } dp_read_gen5; /** G45 PRM, Volume 4, Section 5.10.1.1.2. For both Gen4 and G45. */ struct { unsigned binding_table_index:8; unsigned msg_control:3; unsigned last_render_target:1; unsigned msg_type:3; unsigned send_commit_msg:1; unsigned response_length:4; unsigned msg_length:4; unsigned msg_target:4; unsigned pad1:3; unsigned end_of_thread:1; } dp_write; /** Ironlake PRM, Volume 4 Part 1, Section 5.10.2.1.2. */ struct { unsigned binding_table_index:8; unsigned msg_control:3; unsigned last_render_target:1; unsigned msg_type:3; unsigned send_commit_msg:1; unsigned pad0:3; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } dp_write_gen5; /** * Message for the Sandybridge Sampler Cache or Constant Cache Data Port. * * See the Sandybridge PRM, Volume 4 Part 1, Section 3.9.2.1.1. **/ struct { unsigned binding_table_index:8; unsigned msg_control:5; unsigned msg_type:3; unsigned pad0:3; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } gen6_dp_sampler_const_cache; /** * Message for the Sandybridge Render Cache Data Port. * * Most fields are defined in the Sandybridge PRM, Volume 4 Part 1, * Section 3.9.2.1.1: Message Descriptor. * * "Slot Group Select" and "Last Render Target" are part of the * 5-bit message control for Render Target Write messages. See * Section 3.9.9.2.1 of the same volume. */ struct { unsigned binding_table_index:8; unsigned msg_control:3; unsigned slot_group_select:1; unsigned last_render_target:1; unsigned msg_type:4; unsigned send_commit_msg:1; unsigned pad0:1; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad1:2; unsigned end_of_thread:1; } gen6_dp; /** * Message for any of the Gen7 Data Port caches. * * Most fields are defined in BSpec volume 5c.2 Data Port / Messages / * Data Port Messages / Message Descriptor. Once again, "Slot Group * Select" and "Last Render Target" are part of the 6-bit message * control for Render Target Writes. */ struct { unsigned binding_table_index:8; unsigned msg_control:3; unsigned slot_group_select:1; unsigned last_render_target:1; unsigned msg_control_pad:1; unsigned msg_type:4; unsigned pad1:1; unsigned header_present:1; unsigned response_length:5; unsigned msg_length:4; unsigned pad2:2; unsigned end_of_thread:1; } gen7_dp; /** @} */ struct { unsigned src1_subreg_nr_high:1; unsigned src1_reg_nr:8; unsigned pad0:1; unsigned src2_rep_ctrl:1; unsigned src2_swizzle:8; unsigned src2_subreg_nr:3; unsigned src2_reg_nr:8; unsigned pad1:2; } da3src; int d; unsigned ud; float f; } bits3; }; /* These aren't hardware structs, just something useful for us to pass around: * * Align1 operation has a lot of control over input ranges. Used in * WM programs to implement shaders decomposed into "channel serial" * or "structure of array" form: */ struct brw_reg { unsigned type:4; unsigned file:2; unsigned nr:8; unsigned subnr:5; /* :1 in align16 */ unsigned negate:1; /* source only */ unsigned abs:1; /* source only */ unsigned vstride:4; /* source only */ unsigned width:3; /* src only, align1 only */ unsigned hstride:2; /* align1 only */ unsigned address_mode:1; /* relative addressing, hopefully! */ unsigned pad0:1; union { struct { unsigned swizzle:8; /* src only, align16 only */ unsigned writemask:4; /* dest only, align16 only */ int indirect_offset:10; /* relative addressing offset */ unsigned pad1:10; /* two dwords total */ } bits; float f; int d; unsigned ud; } dw1; }; struct brw_indirect { unsigned addr_subnr:4; int addr_offset:10; unsigned pad:18; }; #define BRW_EU_MAX_INSN_STACK 5 #define BRW_EU_MAX_INSN 10000 struct brw_compile { struct brw_instruction *store; unsigned nr_insn; int gen; /* Allow clients to push/pop instruction state: */ struct brw_instruction stack[BRW_EU_MAX_INSN_STACK]; bool compressed_stack[BRW_EU_MAX_INSN_STACK]; struct brw_instruction *current; unsigned flag_value; bool single_program_flow; bool compressed; /* Control flow stacks: * - if_stack contains IF and ELSE instructions which must be patched * (and popped) once the matching ENDIF instruction is encountered. */ struct brw_instruction **if_stack; int if_stack_depth; int if_stack_array_size; }; static inline int type_sz(unsigned type) { switch (type) { case BRW_REGISTER_TYPE_UD: case BRW_REGISTER_TYPE_D: case BRW_REGISTER_TYPE_F: return 4; case BRW_REGISTER_TYPE_HF: case BRW_REGISTER_TYPE_UW: case BRW_REGISTER_TYPE_W: return 2; case BRW_REGISTER_TYPE_UB: case BRW_REGISTER_TYPE_B: return 1; default: return 0; } } /** * Construct a brw_reg. * \param file one of the BRW_x_REGISTER_FILE values * \param nr register number/index * \param subnr register sub number * \param type one of BRW_REGISTER_TYPE_x * \param vstride one of BRW_VERTICAL_STRIDE_x * \param width one of BRW_WIDTH_x * \param hstride one of BRW_HORIZONTAL_STRIDE_x * \param swizzle one of BRW_SWIZZLE_x * \param writemask WRITEMASK_X/Y/Z/W bitfield */ static inline struct brw_reg brw_reg(unsigned file, unsigned nr, unsigned subnr, unsigned type, unsigned vstride, unsigned width, unsigned hstride, unsigned swizzle, unsigned writemask) { struct brw_reg reg; if (file == BRW_GENERAL_REGISTER_FILE) assert(nr < BRW_MAX_GRF); else if (file == BRW_MESSAGE_REGISTER_FILE) assert((nr & ~(1 << 7)) < BRW_MAX_MRF); else if (file == BRW_ARCHITECTURE_REGISTER_FILE) assert(nr <= BRW_ARF_IP); reg.type = type; reg.file = file; reg.nr = nr; reg.subnr = subnr * type_sz(type); reg.negate = 0; reg.abs = 0; reg.vstride = vstride; reg.width = width; reg.hstride = hstride; reg.address_mode = BRW_ADDRESS_DIRECT; reg.pad0 = 0; /* Could do better: If the reg is r5.3<0;1,0>, we probably want to * set swizzle and writemask to W, as the lower bits of subnr will * be lost when converted to align16. This is probably too much to * keep track of as you'd want it adjusted by suboffset(), etc. * Perhaps fix up when converting to align16? */ reg.dw1.bits.swizzle = swizzle; reg.dw1.bits.writemask = writemask; reg.dw1.bits.indirect_offset = 0; reg.dw1.bits.pad1 = 0; return reg; } /** Construct float[16] register */ static inline struct brw_reg brw_vec16_reg(unsigned file, unsigned nr, unsigned subnr) { return brw_reg(file, nr, subnr, BRW_REGISTER_TYPE_F, BRW_VERTICAL_STRIDE_16, BRW_WIDTH_16, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); } /** Construct float[8] register */ static inline struct brw_reg brw_vec8_reg(unsigned file, unsigned nr, unsigned subnr) { return brw_reg(file, nr, subnr, BRW_REGISTER_TYPE_F, BRW_VERTICAL_STRIDE_8, BRW_WIDTH_8, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); } /** Construct float[4] register */ static inline struct brw_reg brw_vec4_reg(unsigned file, unsigned nr, unsigned subnr) { return brw_reg(file, nr, subnr, BRW_REGISTER_TYPE_F, BRW_VERTICAL_STRIDE_4, BRW_WIDTH_4, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYZW, WRITEMASK_XYZW); } /** Construct float[2] register */ static inline struct brw_reg brw_vec2_reg(unsigned file, unsigned nr, unsigned subnr) { return brw_reg(file, nr, subnr, BRW_REGISTER_TYPE_F, BRW_VERTICAL_STRIDE_2, BRW_WIDTH_2, BRW_HORIZONTAL_STRIDE_1, BRW_SWIZZLE_XYXY, WRITEMASK_XY); } /** Construct float[1] register */ static inline struct brw_reg brw_vec1_reg(unsigned file, unsigned nr, unsigned subnr) { return brw_reg(file, nr, subnr, BRW_REGISTER_TYPE_F, BRW_VERTICAL_STRIDE_0, BRW_WIDTH_1, BRW_HORIZONTAL_STRIDE_0, BRW_SWIZZLE_XXXX, WRITEMASK_X); } static inline struct brw_reg __retype(struct brw_reg reg, unsigned type) { reg.type = type; return reg; } static inline struct brw_reg __retype_d(struct brw_reg reg) { return __retype(reg, BRW_REGISTER_TYPE_D); } static inline struct brw_reg __retype_ud(struct brw_reg reg) { return __retype(reg, BRW_REGISTER_TYPE_UD); } static inline struct brw_reg __retype_uw(struct brw_reg reg) { return __retype(reg, BRW_REGISTER_TYPE_UW); } static inline struct brw_reg __sechalf(struct brw_reg reg) { if (reg.vstride) reg.nr++; return reg; } static inline struct brw_reg __suboffset(struct brw_reg reg, unsigned delta) { reg.subnr += delta * type_sz(reg.type); return reg; } static inline struct brw_reg __offset(struct brw_reg reg, unsigned delta) { reg.nr += delta; return reg; } static inline struct brw_reg byte_offset(struct brw_reg reg, unsigned bytes) { unsigned newoffset = reg.nr * REG_SIZE + reg.subnr + bytes; reg.nr = newoffset / REG_SIZE; reg.subnr = newoffset % REG_SIZE; return reg; } /** Construct unsigned word[16] register */ static inline struct brw_reg brw_uw16_reg(unsigned file, unsigned nr, unsigned subnr) { return __suboffset(__retype(brw_vec16_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); } /** Construct unsigned word[8] register */ static inline struct brw_reg brw_uw8_reg(unsigned file, unsigned nr, unsigned subnr) { return __suboffset(__retype(brw_vec8_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); } /** Construct unsigned word[1] register */ static inline struct brw_reg brw_uw1_reg(unsigned file, unsigned nr, unsigned subnr) { return __suboffset(__retype(brw_vec1_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); } static inline struct brw_reg brw_imm_reg(unsigned type) { return brw_reg( BRW_IMMEDIATE_VALUE, 0, 0, type, BRW_VERTICAL_STRIDE_0, BRW_WIDTH_1, BRW_HORIZONTAL_STRIDE_0, 0, 0); } /** Construct float immediate register */ static inline struct brw_reg brw_imm_f(float f) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_F); imm.dw1.f = f; return imm; } /** Construct integer immediate register */ static inline struct brw_reg brw_imm_d(int d) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_D); imm.dw1.d = d; return imm; } /** Construct uint immediate register */ static inline struct brw_reg brw_imm_ud(unsigned ud) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UD); imm.dw1.ud = ud; return imm; } /** Construct ushort immediate register */ static inline struct brw_reg brw_imm_uw(uint16_t uw) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UW); imm.dw1.ud = uw | (uw << 16); return imm; } /** Construct short immediate register */ static inline struct brw_reg brw_imm_w(int16_t w) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_W); imm.dw1.d = w | (w << 16); return imm; } /* brw_imm_b and brw_imm_ub aren't supported by hardware - the type * numbers alias with _V and _VF below: */ /** Construct vector of eight signed half-byte values */ static inline struct brw_reg brw_imm_v(unsigned v) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_V); imm.vstride = BRW_VERTICAL_STRIDE_0; imm.width = BRW_WIDTH_8; imm.hstride = BRW_HORIZONTAL_STRIDE_1; imm.dw1.ud = v; return imm; } /** Construct vector of four 8-bit float values */ static inline struct brw_reg brw_imm_vf(unsigned v) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); imm.vstride = BRW_VERTICAL_STRIDE_0; imm.width = BRW_WIDTH_4; imm.hstride = BRW_HORIZONTAL_STRIDE_1; imm.dw1.ud = v; return imm; } #define VF_ZERO 0x0 #define VF_ONE 0x30 #define VF_NEG (1<<7) static inline struct brw_reg brw_imm_vf4(unsigned v0, unsigned v1, unsigned v2, unsigned v3) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); imm.vstride = BRW_VERTICAL_STRIDE_0; imm.width = BRW_WIDTH_4; imm.hstride = BRW_HORIZONTAL_STRIDE_1; imm.dw1.ud = ((v0 << 0) | (v1 << 8) | (v2 << 16) | (v3 << 24)); return imm; } static inline struct brw_reg brw_address(struct brw_reg reg) { return brw_imm_uw(reg.nr * REG_SIZE + reg.subnr); } /** Construct float[1] general-purpose register */ static inline struct brw_reg brw_vec1_grf(unsigned nr, unsigned subnr) { return brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } /** Construct float[2] general-purpose register */ static inline struct brw_reg brw_vec2_grf(unsigned nr, unsigned subnr) { return brw_vec2_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } /** Construct float[4] general-purpose register */ static inline struct brw_reg brw_vec4_grf(unsigned nr, unsigned subnr) { return brw_vec4_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } /** Construct float[8] general-purpose register */ static inline struct brw_reg brw_vec8_grf(unsigned nr, unsigned subnr) { return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } static inline struct brw_reg brw_uw8_grf(unsigned nr, unsigned subnr) { return brw_uw8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } static inline struct brw_reg brw_uw16_grf(unsigned nr, unsigned subnr) { return brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } /** Construct null register (usually used for setting condition codes) */ static inline struct brw_reg brw_null_reg(void) { return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_NULL, 0); } static inline struct brw_reg brw_address_reg(unsigned subnr) { return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_ADDRESS, subnr); } /* If/else instructions break in align16 mode if writemask & swizzle * aren't xyzw. This goes against the convention for other scalar * regs: */ static inline struct brw_reg brw_ip_reg(void) { return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_IP, 0, BRW_REGISTER_TYPE_UD, BRW_VERTICAL_STRIDE_4, /* ? */ BRW_WIDTH_1, BRW_HORIZONTAL_STRIDE_0, BRW_SWIZZLE_XYZW, /* NOTE! */ WRITEMASK_XYZW); /* NOTE! */ } static inline struct brw_reg brw_acc_reg(void) { return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_ACCUMULATOR, 0); } static inline struct brw_reg brw_notification_1_reg(void) { return brw_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_NOTIFICATION_COUNT, 1, BRW_REGISTER_TYPE_UD, BRW_VERTICAL_STRIDE_0, BRW_WIDTH_1, BRW_HORIZONTAL_STRIDE_0, BRW_SWIZZLE_XXXX, WRITEMASK_X); } static inline struct brw_reg brw_flag_reg(void) { return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_FLAG, 0); } static inline struct brw_reg brw_mask_reg(unsigned subnr) { return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, BRW_ARF_MASK, subnr); } static inline struct brw_reg brw_message_reg(unsigned nr) { assert((nr & ~(1 << 7)) < BRW_MAX_MRF); return brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, nr, 0); } static inline struct brw_reg brw_message4_reg(unsigned nr, int subnr) { assert((nr & ~(1 << 7)) < BRW_MAX_MRF); return brw_vec4_reg(BRW_MESSAGE_REGISTER_FILE, nr, subnr); } /* This is almost always called with a numeric constant argument, so * make things easy to evaluate at compile time: */ static inline unsigned cvt(unsigned val) { switch (val) { case 0: return 0; case 1: return 1; case 2: return 2; case 4: return 3; case 8: return 4; case 16: return 5; case 32: return 6; } return 0; } static inline struct brw_reg __stride(struct brw_reg reg, unsigned vstride, unsigned width, unsigned hstride) { reg.vstride = cvt(vstride); reg.width = cvt(width) - 1; reg.hstride = cvt(hstride); return reg; } static inline struct brw_reg vec16(struct brw_reg reg) { return __stride(reg, 16,16,1); } static inline struct brw_reg vec8(struct brw_reg reg) { return __stride(reg, 8,8,1); } static inline struct brw_reg vec4(struct brw_reg reg) { return __stride(reg, 4,4,1); } static inline struct brw_reg vec2(struct brw_reg reg) { return __stride(reg, 2,2,1); } static inline struct brw_reg vec1(struct brw_reg reg) { return __stride(reg, 0,1,0); } static inline struct brw_reg get_element(struct brw_reg reg, unsigned elt) { return vec1(__suboffset(reg, elt)); } static inline struct brw_reg get_element_ud(struct brw_reg reg, unsigned elt) { return vec1(__suboffset(__retype(reg, BRW_REGISTER_TYPE_UD), elt)); } static inline struct brw_reg brw_swizzle(struct brw_reg reg, unsigned x, unsigned y, unsigned z, unsigned w) { assert(reg.file != BRW_IMMEDIATE_VALUE); reg.dw1.bits.swizzle = BRW_SWIZZLE4(BRW_GET_SWZ(reg.dw1.bits.swizzle, x), BRW_GET_SWZ(reg.dw1.bits.swizzle, y), BRW_GET_SWZ(reg.dw1.bits.swizzle, z), BRW_GET_SWZ(reg.dw1.bits.swizzle, w)); return reg; } static inline struct brw_reg brw_swizzle1(struct brw_reg reg, unsigned x) { return brw_swizzle(reg, x, x, x, x); } static inline struct brw_reg brw_writemask(struct brw_reg reg, unsigned mask) { assert(reg.file != BRW_IMMEDIATE_VALUE); reg.dw1.bits.writemask &= mask; return reg; } static inline struct brw_reg brw_set_writemask(struct brw_reg reg, unsigned mask) { assert(reg.file != BRW_IMMEDIATE_VALUE); reg.dw1.bits.writemask = mask; return reg; } static inline struct brw_reg brw_negate(struct brw_reg reg) { reg.negate ^= 1; return reg; } static inline struct brw_reg brw_abs(struct brw_reg reg) { reg.abs = 1; return reg; } /*********************************************************************** */ static inline struct brw_reg brw_vec4_indirect(unsigned subnr, int offset) { struct brw_reg reg = brw_vec4_grf(0, 0); reg.subnr = subnr; reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; reg.dw1.bits.indirect_offset = offset; return reg; } static inline struct brw_reg brw_vec1_indirect(unsigned subnr, int offset) { struct brw_reg reg = brw_vec1_grf(0, 0); reg.subnr = subnr; reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; reg.dw1.bits.indirect_offset = offset; return reg; } static inline struct brw_reg deref_4f(struct brw_indirect ptr, int offset) { return brw_vec4_indirect(ptr.addr_subnr, ptr.addr_offset + offset); } static inline struct brw_reg deref_1f(struct brw_indirect ptr, int offset) { return brw_vec1_indirect(ptr.addr_subnr, ptr.addr_offset + offset); } static inline struct brw_reg deref_4b(struct brw_indirect ptr, int offset) { return __retype(deref_4f(ptr, offset), BRW_REGISTER_TYPE_B); } static inline struct brw_reg deref_1uw(struct brw_indirect ptr, int offset) { return __retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_UW); } static inline struct brw_reg deref_1d(struct brw_indirect ptr, int offset) { return __retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_D); } static inline struct brw_reg deref_1ud(struct brw_indirect ptr, int offset) { return __retype(deref_1f(ptr, offset), BRW_REGISTER_TYPE_UD); } static inline struct brw_reg get_addr_reg(struct brw_indirect ptr) { return brw_address_reg(ptr.addr_subnr); } static inline struct brw_indirect brw_indirect_offset(struct brw_indirect ptr, int offset) { ptr.addr_offset += offset; return ptr; } static inline struct brw_indirect brw_indirect(unsigned addr_subnr, int offset) { struct brw_indirect ptr; ptr.addr_subnr = addr_subnr; ptr.addr_offset = offset; ptr.pad = 0; return ptr; } /** Do two brw_regs refer to the same register? */ static inline bool brw_same_reg(struct brw_reg r1, struct brw_reg r2) { return r1.file == r2.file && r1.nr == r2.nr; } static inline struct brw_instruction *current_insn( struct brw_compile *p) { return &p->store[p->nr_insn]; } static inline void brw_set_predicate_control( struct brw_compile *p, unsigned pc ) { p->current->header.predicate_control = pc; } static inline void brw_set_predicate_inverse(struct brw_compile *p, bool predicate_inverse) { p->current->header.predicate_inverse = predicate_inverse; } static inline void brw_set_conditionalmod( struct brw_compile *p, unsigned conditional ) { p->current->header.destreg__conditionalmod = conditional; } static inline void brw_set_access_mode(struct brw_compile *p, unsigned access_mode) { p->current->header.access_mode = access_mode; } static inline void brw_set_mask_control(struct brw_compile *p, unsigned value) { p->current->header.mask_control = value; } static inline void brw_set_saturate(struct brw_compile *p, unsigned value) { p->current->header.saturate = value; } static inline void brw_set_acc_write_control(struct brw_compile *p, unsigned value) { if (p->gen >= 060) p->current->header.acc_wr_control = value; } void brw_pop_insn_state(struct brw_compile *p); void brw_push_insn_state(struct brw_compile *p); void brw_set_compression_control(struct brw_compile *p, enum brw_compression control); void brw_set_predicate_control_flag_value( struct brw_compile *p, unsigned value ); void brw_compile_init(struct brw_compile *p, int gen, void *store); void brw_set_dest(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg dest); void brw_set_src0(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg); void brw_set_src1(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg reg); void gen6_resolve_implied_move(struct brw_compile *p, struct brw_reg *src, unsigned msg_reg_nr); static inline struct brw_instruction * brw_next_insn(struct brw_compile *p, unsigned opcode) { struct brw_instruction *insn; assert(p->nr_insn + 1 < BRW_EU_MAX_INSN); insn = &p->store[p->nr_insn++]; *insn = *p->current; if (p->current->header.destreg__conditionalmod) { p->current->header.destreg__conditionalmod = 0; p->current->header.predicate_control = BRW_PREDICATE_NORMAL; } insn->header.opcode = opcode; return insn; } /* Helpers for regular instructions: */ #define ALU1(OP) \ static inline struct brw_instruction *brw_##OP(struct brw_compile *p, \ struct brw_reg dest, \ struct brw_reg src0) \ { \ return brw_alu1(p, BRW_OPCODE_##OP, dest, src0); \ } #define ALU2(OP) \ static inline struct brw_instruction *brw_##OP(struct brw_compile *p, \ struct brw_reg dest, \ struct brw_reg src0, \ struct brw_reg src1) \ { \ return brw_alu2(p, BRW_OPCODE_##OP, dest, src0, src1); \ } /* Rounding operations (other than RNDD) require two instructions - the first * stores a rounded value (possibly the wrong way) in the dest register, but * also sets a per-channel "increment bit" in the flag register. A predicated * add of 1.0 fixes dest to contain the desired result. * * Sandybridge and later appear to round correctly without an ADD. */ #define ROUND(OP) \ static inline void brw_##OP(struct brw_compile *p, \ struct brw_reg dest, \ struct brw_reg src) \ { \ struct brw_instruction *rnd, *add; \ rnd = brw_next_insn(p, BRW_OPCODE_##OP); \ brw_set_dest(p, rnd, dest); \ brw_set_src0(p, rnd, src); \ if (p->gen < 060) { \ /* turn on round-increments */ \ rnd->header.destreg__conditionalmod = BRW_CONDITIONAL_R; \ add = brw_ADD(p, dest, dest, brw_imm_f(1.0f)); \ add->header.predicate_control = BRW_PREDICATE_NORMAL; \ } \ } static inline struct brw_instruction *brw_alu1(struct brw_compile *p, unsigned opcode, struct brw_reg dest, struct brw_reg src) { struct brw_instruction *insn = brw_next_insn(p, opcode); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src); return insn; } static inline struct brw_instruction *brw_alu2(struct brw_compile *p, unsigned opcode, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1 ) { struct brw_instruction *insn = brw_next_insn(p, opcode); brw_set_dest(p, insn, dest); brw_set_src0(p, insn, src0); brw_set_src1(p, insn, src1); return insn; } static inline struct brw_instruction *brw_ADD(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { /* 6.2.2: add */ if (src0.type == BRW_REGISTER_TYPE_F || (src0.file == BRW_IMMEDIATE_VALUE && src0.type == BRW_REGISTER_TYPE_VF)) { assert(src1.type != BRW_REGISTER_TYPE_UD); assert(src1.type != BRW_REGISTER_TYPE_D); } if (src1.type == BRW_REGISTER_TYPE_F || (src1.file == BRW_IMMEDIATE_VALUE && src1.type == BRW_REGISTER_TYPE_VF)) { assert(src0.type != BRW_REGISTER_TYPE_UD); assert(src0.type != BRW_REGISTER_TYPE_D); } return brw_alu2(p, BRW_OPCODE_ADD, dest, src0, src1); } static inline struct brw_instruction *brw_MUL(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { /* 6.32.38: mul */ if (src0.type == BRW_REGISTER_TYPE_D || src0.type == BRW_REGISTER_TYPE_UD || src1.type == BRW_REGISTER_TYPE_D || src1.type == BRW_REGISTER_TYPE_UD) { assert(dest.type != BRW_REGISTER_TYPE_F); } if (src0.type == BRW_REGISTER_TYPE_F || (src0.file == BRW_IMMEDIATE_VALUE && src0.type == BRW_REGISTER_TYPE_VF)) { assert(src1.type != BRW_REGISTER_TYPE_UD); assert(src1.type != BRW_REGISTER_TYPE_D); } if (src1.type == BRW_REGISTER_TYPE_F || (src1.file == BRW_IMMEDIATE_VALUE && src1.type == BRW_REGISTER_TYPE_VF)) { assert(src0.type != BRW_REGISTER_TYPE_UD); assert(src0.type != BRW_REGISTER_TYPE_D); } assert(src0.file != BRW_ARCHITECTURE_REGISTER_FILE || src0.nr != BRW_ARF_ACCUMULATOR); assert(src1.file != BRW_ARCHITECTURE_REGISTER_FILE || src1.nr != BRW_ARF_ACCUMULATOR); return brw_alu2(p, BRW_OPCODE_MUL, dest, src0, src1); } static inline struct brw_instruction *brw_JMPI(struct brw_compile *p, struct brw_reg dest, struct brw_reg src0, struct brw_reg src1) { struct brw_instruction *insn = brw_alu2(p, BRW_OPCODE_JMPI, dest, src0, src1); insn->header.execution_size = 1; insn->header.compression_control = BRW_COMPRESSION_NONE; insn->header.mask_control = BRW_MASK_DISABLE; p->current->header.predicate_control = BRW_PREDICATE_NONE; return insn; } ALU1(MOV); ALU2(SEL); ALU1(NOT); ALU2(AND); ALU2(OR); ALU2(XOR); ALU2(SHR); ALU2(SHL); ALU2(RSR); ALU2(RSL); ALU2(ASR); ALU1(FRC); ALU1(RNDD); ALU2(MAC); ALU2(MACH); ALU1(LZD); ALU2(DP4); ALU2(DPH); ALU2(DP3); ALU2(DP2); ALU2(LINE); ALU2(PLN); ROUND(RNDZ); ROUND(RNDE); #undef ALU1 #undef ALU2 #undef ROUND /* Helpers for SEND instruction */ void brw_set_dp_read_message(struct brw_compile *p, struct brw_instruction *insn, unsigned binding_table_index, unsigned msg_control, unsigned msg_type, unsigned target_cache, unsigned msg_length, unsigned response_length); void brw_set_dp_write_message(struct brw_compile *p, struct brw_instruction *insn, unsigned binding_table_index, unsigned msg_control, unsigned msg_type, unsigned msg_length, bool header_present, bool last_render_target, unsigned response_length, bool end_of_thread, bool send_commit_msg); void brw_urb_WRITE(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, bool allocate, bool used, unsigned msg_length, unsigned response_length, bool eot, bool writes_complete, unsigned offset, unsigned swizzle); void brw_ff_sync(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, bool allocate, unsigned response_length, bool eot); void brw_fb_WRITE(struct brw_compile *p, int dispatch_width, unsigned msg_reg_nr, struct brw_reg src0, unsigned msg_control, unsigned binding_table_index, unsigned msg_length, unsigned response_length, bool eot, bool header_present); void brw_SAMPLE(struct brw_compile *p, struct brw_reg dest, unsigned msg_reg_nr, struct brw_reg src0, unsigned binding_table_index, unsigned sampler, unsigned writemask, unsigned msg_type, unsigned response_length, unsigned msg_length, bool header_present, unsigned simd_mode); void brw_math_16(struct brw_compile *p, struct brw_reg dest, unsigned function, unsigned saturate, unsigned msg_reg_nr, struct brw_reg src, unsigned precision); void brw_math(struct brw_compile *p, struct brw_reg dest, unsigned function, unsigned saturate, unsigned msg_reg_nr, struct brw_reg src, unsigned data_type, unsigned precision); void brw_math2(struct brw_compile *p, struct brw_reg dest, unsigned function, struct brw_reg src0, struct brw_reg src1); void brw_oword_block_read(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, uint32_t offset, uint32_t bind_table_index); void brw_oword_block_read_scratch(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, int num_regs, unsigned offset); void brw_oword_block_write_scratch(struct brw_compile *p, struct brw_reg mrf, int num_regs, unsigned offset); void brw_dword_scattered_read(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, uint32_t bind_table_index); void brw_dp_READ_4_vs(struct brw_compile *p, struct brw_reg dest, unsigned location, unsigned bind_table_index); void brw_dp_READ_4_vs_relative(struct brw_compile *p, struct brw_reg dest, struct brw_reg addrReg, unsigned offset, unsigned bind_table_index); /* If/else/endif. Works by manipulating the execution flags on each * channel. */ struct brw_instruction *brw_IF(struct brw_compile *p, unsigned execute_size); struct brw_instruction *gen6_IF(struct brw_compile *p, uint32_t conditional, struct brw_reg src0, struct brw_reg src1); void brw_ELSE(struct brw_compile *p); void brw_ENDIF(struct brw_compile *p); /* DO/WHILE loops: */ struct brw_instruction *brw_DO(struct brw_compile *p, unsigned execute_size); struct brw_instruction *brw_WHILE(struct brw_compile *p, struct brw_instruction *patch_insn); struct brw_instruction *brw_BREAK(struct brw_compile *p, int pop_count); struct brw_instruction *brw_CONT(struct brw_compile *p, int pop_count); struct brw_instruction *gen6_CONT(struct brw_compile *p, struct brw_instruction *do_insn); /* Forward jumps: */ void brw_land_fwd_jump(struct brw_compile *p, struct brw_instruction *jmp_insn); void brw_NOP(struct brw_compile *p); void brw_WAIT(struct brw_compile *p); /* Special case: there is never a destination, execution size will be * taken from src0: */ void brw_CMP(struct brw_compile *p, struct brw_reg dest, unsigned conditional, struct brw_reg src0, struct brw_reg src1); static inline void brw_math_invert(struct brw_compile *p, struct brw_reg dst, struct brw_reg src) { brw_math(p, dst, BRW_MATH_FUNCTION_INV, BRW_MATH_SATURATE_NONE, 0, src, BRW_MATH_PRECISION_FULL, BRW_MATH_DATA_VECTOR); } void brw_set_uip_jip(struct brw_compile *p); uint32_t brw_swap_cmod(uint32_t cmod); void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen); #endif xf86-video-intel-2.99.917/src/sna/brw/brw_test_gen6.c0000664000175000017500000001316112432737457017025 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #include "brw_test.h" #include static const uint32_t ps_kernel_nomask_affine[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_nomask_projective[][4] = { #include "exa_wm_src_projective.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_maskca_affine[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_mask_affine.g6b" #include "exa_wm_mask_sample_argb.g6b" #include "exa_wm_ca.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_maskca_projective[][4] = { #include "exa_wm_src_projective.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_mask_projective.g6b" #include "exa_wm_mask_sample_argb.g6b" #include "exa_wm_ca.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_maskca_srcalpha_affine[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_a.g6b" #include "exa_wm_mask_affine.g6b" #include "exa_wm_mask_sample_argb.g6b" #include "exa_wm_ca_srcalpha.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_maskca_srcalpha_projective[][4] = { #include "exa_wm_src_projective.g6b" #include "exa_wm_src_sample_a.g6b" #include "exa_wm_mask_projective.g6b" #include "exa_wm_mask_sample_argb.g6b" #include "exa_wm_ca_srcalpha.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_masknoca_affine[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_mask_affine.g6b" #include "exa_wm_mask_sample_a.g6b" #include "exa_wm_noca.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_masknoca_projective[][4] = { #include "exa_wm_src_projective.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_mask_projective.g6b" #include "exa_wm_mask_sample_a.g6b" #include "exa_wm_noca.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_packed[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_yuv_rgb.g6b" #include "exa_wm_write.g6b" }; static const uint32_t ps_kernel_planar[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_planar.g6b" #include "exa_wm_yuv_rgb.g6b" #include "exa_wm_write.g6b" }; #define compare(old) brw_test_compare(__FUNCTION__, p.gen, p.store, p.nr_insn, (struct brw_instruction *)old, ARRAY_SIZE(old)) #if 0 static void wm_src_affine(struct brw_compile *p) { brw_PLN(p, brw_message_reg(2), brw_vec1_grf(6,0), brw_vec8_grf(2,0)); brw_PLN(p, brw_message_reg(3), brw_vec1_grf(6,0), brw_vec8_grf(4,0)); brw_PLN(p, brw_message_reg(4), brw_vec1_grf(6,4), brw_vec8_grf(2,0)); brw_PLN(p, brw_message_reg(5), brw_vec1_grf(6,4), brw_vec8_grf(4,0)); } static void wm_src_sample_argb(struct brw_compile *p) { static const uint32_t fragment[][4] = { #include "exa_wm_src_affine.g6b" #include "exa_wm_src_sample_argb.g6b" #include "exa_wm_write.g6b" }; int n; brw_push_insn_state(p); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_MOV(p, retype(brw_vec1_grf(0,2), BRW_REGISTER_TYPE_UD), brw_imm_ud(0)); brw_pop_insn_state(p); brw_SAMPLE(p, retype(vec16(brw_vec8_grf(14, 0)), BRW_REGISTER_TYPE_UW), 1, retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD), 1, 0, WRITEMASK_XYZW, GEN5_SAMPLER_MESSAGE_SAMPLE, 8, 5, true, BRW_SAMPLER_SIMD_MODE_SIMD16); for (n = 0; n < p->nr_insn; n++) { brw_disasm(stdout, &p->store[n], 60); } printf("\n\n"); for (n = 0; n < ARRAY_SIZE(fragment); n++) { brw_disasm(stdout, (const struct brw_instruction *)&fragment[n][0], 60); } } static void wm_write(struct brw_compile *p) { } #endif static void gen6_ps_nomask_affine(void) { uint32_t store[1024]; struct brw_compile p; brw_compile_init(&p, 060, store); brw_wm_kernel__affine(&p, 16); compare(ps_kernel_nomask_affine); } static void gen6_ps_mask_affine(void) { uint32_t store[1024]; struct brw_compile p; brw_compile_init(&p, 060, store); brw_wm_kernel__affine_mask(&p, 16); compare(ps_kernel_masknoca_affine); } static void gen6_ps_nomask_projective(void) { uint32_t store[1024]; struct brw_compile p; brw_compile_init(&p, 060, store); brw_wm_kernel__projective(&p, 16); compare(ps_kernel_nomask_projective); } void brw_test_gen6(void) { gen6_ps_nomask_affine(); gen6_ps_mask_affine(); gen6_ps_nomask_projective(); } xf86-video-intel-2.99.917/src/sna/brw/brw_test_gen5.c0000664000175000017500000001245612432737457017032 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #include "brw_test.h" #include static const uint32_t sf_kernel[][4] = { #include "exa_sf.g5b" }; static const uint32_t sf_kernel_mask[][4] = { #include "exa_sf_mask.g5b" }; static const uint32_t ps_kernel_nomask_affine[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_argb.g5b" #include "exa_wm_write.g5b" }; static const uint32_t ps_kernel_nomask_projective[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_projective.g5b" #include "exa_wm_src_sample_argb.g5b" #include "exa_wm_write.g5b" }; static const uint32_t ps_kernel_maskca_affine[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_argb.g5b" #include "exa_wm_mask_affine.g5b" #include "exa_wm_mask_sample_argb.g5b" #include "exa_wm_ca.g5b" #include "exa_wm_write.g5b" }; static const uint32_t ps_kernel_maskca_projective[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_projective.g5b" #include "exa_wm_src_sample_argb.g5b" #include "exa_wm_mask_projective.g5b" #include "exa_wm_mask_sample_argb.g5b" #include "exa_wm_ca.g5b" #include "exa_wm_write.g5b" }; static const uint32_t ps_kernel_maskca_srcalpha_affine[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_a.g5b" #include "exa_wm_mask_affine.g5b" #include "exa_wm_mask_sample_argb.g5b" #include "exa_wm_ca_srcalpha.g5b" #include "exa_wm_write.g5b" }; static const uint32_t ps_kernel_maskca_srcalpha_projective[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_projective.g5b" #include "exa_wm_src_sample_a.g5b" #include "exa_wm_mask_projective.g5b" #include "exa_wm_mask_sample_argb.g5b" #include "exa_wm_ca_srcalpha.g5b" #include "exa_wm_write.g5b" }; static const uint32_t ps_kernel_masknoca_affine[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_argb.g5b" #include "exa_wm_mask_affine.g5b" #include "exa_wm_mask_sample_a.g5b" #include "exa_wm_noca.g5b" #include "exa_wm_write.g5b" }; static const uint32_t ps_kernel_masknoca_projective[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_projective.g5b" #include "exa_wm_src_sample_argb.g5b" #include "exa_wm_mask_projective.g5b" #include "exa_wm_mask_sample_a.g5b" #include "exa_wm_noca.g5b" #include "exa_wm_write.g5b" }; static const uint32_t ps_kernel_packed_static[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_argb.g5b" #include "exa_wm_yuv_rgb.g5b" #include "exa_wm_write.g5b" }; static const uint32_t ps_kernel_planar_static[][4] = { #include "exa_wm_xy.g5b" #include "exa_wm_src_affine.g5b" #include "exa_wm_src_sample_planar.g5b" #include "exa_wm_yuv_rgb.g5b" #include "exa_wm_write.g5b" }; #define compare(old) brw_test_compare(__FUNCTION__, p.gen, p.store, p.nr_insn, (struct brw_instruction *)old, ARRAY_SIZE(old)) #define GEN 050 static void gen5_sf(void) { uint32_t store[128]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_sf_kernel__nomask(&p); compare(sf_kernel); } static void gen5_sf_mask(void) { uint32_t store[128]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_sf_kernel__mask(&p); compare(sf_kernel_mask); } static void gen5_wm_affine_nomask(void) { uint32_t store[128]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__affine(&p, 16); compare(ps_kernel_nomask_affine); } static void gen5_wm_affine_mask_noca(void) { uint32_t store[128]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__affine_mask(&p, 16); compare(ps_kernel_masknoca_affine); } static void gen5_wm_affine_mask_ca(void) { uint32_t store[128]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__affine_mask_ca(&p, 16); compare(ps_kernel_maskca_affine); } static void gen5_wm_projective_nomask(void) { uint32_t store[128]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__projective(&p, 16); compare(ps_kernel_nomask_projective); } void brw_test_gen5(void) { gen5_sf(); gen5_sf_mask(); gen5_wm_affine_nomask(); gen5_wm_affine_mask_noca(); gen5_wm_affine_mask_ca(); gen5_wm_projective_nomask(); } xf86-video-intel-2.99.917/src/sna/brw/brw_sf.c0000664000175000017500000000252512244635610015526 00000000000000#include "brw.h" bool brw_sf_kernel__nomask(struct brw_compile *p) { struct brw_reg inv, v0, v1, v2, delta; v0 = brw_vec4_grf(3, 0); v1 = brw_vec4_grf(4, 0); v2 = brw_vec4_grf(5, 0); delta = brw_vec8_grf(7, 0); inv = brw_vec4_grf(6, 0); brw_math_invert(p, inv, brw_vec4_grf(1, 11)); brw_MOV(p, brw_message_reg(3), v0); brw_ADD(p, delta, v1, brw_negate(v2)); brw_MUL(p, brw_message_reg(1), delta, brw_vec1_grf(6,0)); brw_ADD(p, delta, v2, brw_negate(v0)); brw_MUL(p, brw_message_reg(2), delta, brw_vec1_grf(6,2)); brw_urb_WRITE(p, brw_null_reg(), 0, brw_vec8_grf(0 ,0), false, true, 4, 0, true, true, 0, BRW_URB_SWIZZLE_TRANSPOSE); return true; } bool brw_sf_kernel__mask(struct brw_compile *p) { struct brw_reg inv, v0, v1, v2; v0 = brw_vec8_grf(3, 0); v1 = brw_vec8_grf(4, 0); v2 = brw_vec8_grf(5, 0); inv = brw_vec4_grf(6, 0); brw_math_invert(p, inv, brw_vec4_grf(1, 11)); brw_MOV(p, brw_message_reg(3), v0); brw_ADD(p, brw_vec8_grf(7, 0), v1, brw_negate(v2)); brw_MUL(p, brw_message_reg(1), brw_vec8_grf(7, 0), brw_vec1_grf(6,0)); brw_ADD(p, brw_vec8_grf(7, 0), v2, brw_negate(v0)); brw_MUL(p, brw_message_reg(2), brw_vec8_grf(7, 0), brw_vec1_grf(6,2)); brw_urb_WRITE(p, brw_null_reg(), 0, brw_vec8_grf(0 ,0), false, true, 4, 0, true, true, 0, BRW_URB_SWIZZLE_TRANSPOSE); return true; } xf86-video-intel-2.99.917/src/sna/brw/brw_test.h0000664000175000017500000000316112244635610016077 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifndef BRW_TEST_H #define BRW_TEST_H #include "brw.h" #ifndef ARRAY_SIZE #define ARRAY_SIZE(a) (sizeof(a)/sizeof(a[0])) #endif void brw_test_compare(const char *function, int gen, const struct brw_instruction *new, int num_new, const struct brw_instruction *old, int num_old); void brw_test_gen4(void); void brw_test_gen5(void); void brw_test_gen6(void); void brw_test_gen7(void); #endif /* BRW_TEST_H */ xf86-video-intel-2.99.917/src/sna/brw/brw_eu.c0000664000175000017500000001067012432737457015542 00000000000000/* Copyright (C) Intel Corp. 2006. All Rights Reserved. Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to develop this 3D driver. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **********************************************************************/ /* * Authors: * Keith Whitwell */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "brw_eu.h" #include #include /* Returns the corresponding conditional mod for swapping src0 and * src1 in e.g. CMP. */ uint32_t brw_swap_cmod(uint32_t cmod) { switch (cmod) { case BRW_CONDITIONAL_Z: case BRW_CONDITIONAL_NZ: return cmod; case BRW_CONDITIONAL_G: return BRW_CONDITIONAL_LE; case BRW_CONDITIONAL_GE: return BRW_CONDITIONAL_L; case BRW_CONDITIONAL_L: return BRW_CONDITIONAL_GE; case BRW_CONDITIONAL_LE: return BRW_CONDITIONAL_G; default: return ~0; } } /* How does predicate control work when execution_size != 8? Do I * need to test/set for 0xffff when execution_size is 16? */ void brw_set_predicate_control_flag_value( struct brw_compile *p, unsigned value ) { p->current->header.predicate_control = BRW_PREDICATE_NONE; if (value != 0xff) { if (value != p->flag_value) { brw_MOV(p, brw_flag_reg(), brw_imm_uw(value)); p->flag_value = value; } p->current->header.predicate_control = BRW_PREDICATE_NORMAL; } } void brw_set_compression_control(struct brw_compile *p, enum brw_compression compression_control) { p->compressed = (compression_control == BRW_COMPRESSION_COMPRESSED); if (p->gen >= 060) { /* Since we don't use the 32-wide support in gen6, we translate * the pre-gen6 compression control here. */ switch (compression_control) { case BRW_COMPRESSION_NONE: /* This is the "use the first set of bits of dmask/vmask/arf * according to execsize" option. */ p->current->header.compression_control = GEN6_COMPRESSION_1Q; break; case BRW_COMPRESSION_2NDHALF: /* For 8-wide, this is "use the second set of 8 bits." */ p->current->header.compression_control = GEN6_COMPRESSION_2Q; break; case BRW_COMPRESSION_COMPRESSED: /* For 16-wide instruction compression, use the first set of 16 bits * since we don't do 32-wide dispatch. */ p->current->header.compression_control = GEN6_COMPRESSION_1H; break; default: assert(!"not reached"); p->current->header.compression_control = GEN6_COMPRESSION_1H; break; } } else { p->current->header.compression_control = compression_control; } } void brw_push_insn_state( struct brw_compile *p ) { assert(p->current != &p->stack[BRW_EU_MAX_INSN_STACK-1]); memcpy(p->current+1, p->current, sizeof(struct brw_instruction)); p->compressed_stack[p->current - p->stack] = p->compressed; p->current++; } void brw_pop_insn_state( struct brw_compile *p ) { assert(p->current != p->stack); p->current--; p->compressed = p->compressed_stack[p->current - p->stack]; } void brw_compile_init(struct brw_compile *p, int gen, void *store) { assert(gen); p->gen = gen; p->store = store; p->nr_insn = 0; p->current = p->stack; p->compressed = false; memset(p->current, 0, sizeof(p->current[0])); /* Some defaults? */ brw_set_mask_control(p, BRW_MASK_ENABLE); /* what does this do? */ brw_set_saturate(p, 0); brw_set_compression_control(p, BRW_COMPRESSION_NONE); brw_set_predicate_control_flag_value(p, 0xff); p->if_stack_depth = 0; p->if_stack_array_size = 0; p->if_stack = NULL; } xf86-video-intel-2.99.917/src/sna/brw/brw_test_gen7.c0000664000175000017500000001174612432737457017035 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #include "brw_test.h" #include static const uint32_t ps_kernel_nomask_affine[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_nomask_projective[][4] = { #include "exa_wm_src_projective.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_maskca_affine[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_mask_affine.g7b" #include "exa_wm_mask_sample_argb.g7b" #include "exa_wm_ca.g6b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_maskca_projective[][4] = { #include "exa_wm_src_projective.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_mask_projective.g7b" #include "exa_wm_mask_sample_argb.g7b" #include "exa_wm_ca.g6b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_maskca_srcalpha_affine[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_a.g7b" #include "exa_wm_mask_affine.g7b" #include "exa_wm_mask_sample_argb.g7b" #include "exa_wm_ca_srcalpha.g6b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_maskca_srcalpha_projective[][4] = { #include "exa_wm_src_projective.g7b" #include "exa_wm_src_sample_a.g7b" #include "exa_wm_mask_projective.g7b" #include "exa_wm_mask_sample_argb.g7b" #include "exa_wm_ca_srcalpha.g6b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_masknoca_affine[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_mask_affine.g7b" #include "exa_wm_mask_sample_a.g7b" #include "exa_wm_noca.g6b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_masknoca_projective[][4] = { #include "exa_wm_src_projective.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_mask_projective.g7b" #include "exa_wm_mask_sample_a.g7b" #include "exa_wm_noca.g6b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_packed[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_argb.g7b" #include "exa_wm_yuv_rgb.g7b" #include "exa_wm_write.g7b" }; static const uint32_t ps_kernel_planar[][4] = { #include "exa_wm_src_affine.g7b" #include "exa_wm_src_sample_planar.g7b" #include "exa_wm_yuv_rgb.g7b" #include "exa_wm_write.g7b" }; #define compare(old) brw_test_compare(__FUNCTION__, p.gen, p.store, p.nr_insn, (struct brw_instruction *)old, ARRAY_SIZE(old)) #define GEN 070 static void gen7_ps_nomask_affine(void) { uint32_t store[1024]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__affine(&p, 8); compare(ps_kernel_nomask_affine); } static void gen7_ps_mask_affine(void) { uint32_t store[1024]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__affine_mask(&p, 8); compare(ps_kernel_masknoca_affine); } static void gen7_ps_maskca_affine(void) { uint32_t store[1024]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__affine_mask_ca(&p, 8); compare(ps_kernel_maskca_affine); } static void gen7_ps_masksa_affine(void) { uint32_t store[1024]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__affine_mask_sa(&p, 8); compare(ps_kernel_maskca_srcalpha_affine); } static void gen7_ps_nomask_projective(void) { uint32_t store[1024]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__projective(&p, 8); compare(ps_kernel_nomask_projective); } static void gen7_ps_opacity(void) { uint32_t store[1024]; struct brw_compile p; brw_compile_init(&p, GEN, store); brw_wm_kernel__affine_opacity(&p, 16); compare(ps_kernel_nomask_affine); } void brw_test_gen7(void) { gen7_ps_nomask_affine(); gen7_ps_mask_affine(); gen7_ps_maskca_affine(); gen7_ps_masksa_affine(); gen7_ps_nomask_projective(); gen7_ps_opacity(); } xf86-video-intel-2.99.917/src/sna/brw/Makefile.in0000664000175000017500000005333212445556117016156 00000000000000# Makefile.in generated by automake 1.14.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 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a system limit (for SysV at least) may be exceeded. .NOEXPORT: xf86-video-intel-2.99.917/src/sna/brw/brw_test.c0000664000175000017500000000365512244635610016102 00000000000000/* * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #include "brw_test.h" #include void brw_test_compare(const char *function, int gen, const struct brw_instruction *new, int num_new, const struct brw_instruction *old, int num_old) { int n; if (num_new != num_old || memcmp(new, old, num_new * sizeof(struct brw_instruction))) { printf ("%s: new\n", function); for (n = 0; n < num_new; n++) brw_disasm(stdout, &new[n], gen); printf ("%s: old\n", function); for (n = 0; n < num_old; n++) brw_disasm(stdout, &old[n], gen); printf ("\n"); } } /* Check that we can recreate all the existing programs using the assembler */ int main(int argc, char **argv) { brw_test_gen4(); brw_test_gen5(); brw_test_gen6(); brw_test_gen7(); return 0; } xf86-video-intel-2.99.917/src/sna/fb/0000775000175000017500000000000012445556132013755 500000000000000xf86-video-intel-2.99.917/src/sna/fb/fbglyph.c0000664000175000017500000001603312244635610015473 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" #include #include #define GLYPH fbGlyph8 #define BITS BYTE #define BITS2 CARD16 #define BITS4 CARD32 #include "fbglyphbits.h" #undef BITS #undef BITS2 #undef BITS4 #undef GLYPH #define GLYPH fbGlyph16 #define BITS CARD16 #define BITS2 CARD32 #include "fbglyphbits.h" #undef BITS #undef BITS2 #undef GLYPH #define GLYPH fbGlyph32 #define BITS CARD32 #include "fbglyphbits.h" #undef BITS #undef GLYPH static bool fbGlyphIn(GCPtr gc, int x, int y, int width, int height) { BoxRec box; BoxPtr extents = RegionExtents(gc->pCompositeClip); /* * Check extents by hand to avoid 16 bit overflows */ if (x < (int) extents->x1 || (int) extents->x2 < x + width) return FALSE; if (y < (int) extents->y1 || (int) extents->y2 < y + height) return FALSE; box.x1 = x; box.x2 = x + width; box.y1 = y; box.y2 = y + height; return RegionContainsRect(gc->pCompositeClip, &box) == rgnIN; } #define WRITE1(d,n,fg) WRITE((d) + (n), (CARD8) fg) #define WRITE2(d,n,fg) WRITE((CARD16 *) &(d[n]), (CARD16) fg) #define WRITE4(d,n,fg) WRITE((CARD32 *) &(d[n]), (CARD32) fg) /* * This is a bit tricky, but it's brief. Write 12 bytes worth * of dest, which is four pixels, at a time. This gives constant * code for each pattern as they're always aligned the same * * a b c d a b c d a b c d bytes * A B C A B C A B C A B C pixels * * f0 f1 f2 * A B C A B C A B C A B C pixels LSB * C A B C A B C A B C A B pixels MSB * * LSB MSB * A f0 f1 * B f1 f2 * C f2 f0 * A B f0 f2 * B C f1 f0 * C A f2 f1 * A B C A f0 f1 * B C A B f1 f2 * C A B C f2 f0 */ #undef _A #undef _B #undef _C #undef _AB #undef _BC #undef _CA #undef _ABCA #undef _BCAB #undef _CABC #define _A f0 #define _B f1 #define _C f2 #define _AB f0 #define _BC f1 #define _CA f2 #define _ABCA f0 #define _BCAB f1 #define _CABC f2 #define CASE(a,b,c,d) (a | (b << 1) | (c << 2) | (d << 3)) void fbPolyGlyphBlt(DrawablePtr drawable, GCPtr gc, int x, int y, unsigned int nglyph, CharInfoPtr * ppci, pointer glyphs) { FbGCPrivPtr pgc = fb_gc(gc); CharInfoPtr pci; unsigned char *pglyph; /* pointer bits in glyph */ int gx, gy; int gWidth, gHeight; /* width and height of glyph */ FbStride gStride; /* stride of glyph */ void (*raster) (FbBits *, FbStride, int, FbStip *, FbBits, int, int); FbBits *dst = 0; FbStride dstStride = 0; int dstBpp = 0; int dstXoff = 0, dstYoff = 0; DBG(("%s x %d\n", __FUNCTION__, nglyph)); raster = 0; if (gc->fillStyle == FillSolid && pgc->and == 0) { dstBpp = drawable->bitsPerPixel; switch (dstBpp) { case 8: raster = fbGlyph8; break; case 16: raster = fbGlyph16; break; case 32: raster = fbGlyph32; break; } } x += drawable->x; y += drawable->y; while (nglyph--) { pci = *ppci++; pglyph = FONTGLYPHBITS(glyphs, pci); gWidth = GLYPHWIDTHPIXELS(pci); gHeight = GLYPHHEIGHTPIXELS(pci); if (gWidth && gHeight) { gx = x + pci->metrics.leftSideBearing; gy = y - pci->metrics.ascent; if (raster && gWidth <= sizeof(FbStip) * 8 && fbGlyphIn(gc, gx, gy, gWidth, gHeight)) { fbGetDrawable(drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); raster(dst + (gy + dstYoff) * dstStride, dstStride, dstBpp, (FbStip *) pglyph, pgc->xor, gx + dstXoff, gHeight); } else { gStride = GLYPHWIDTHBYTESPADDED(pci) / sizeof(FbStip); fbPushImage(drawable, gc, (FbStip *)pglyph, gStride, 0, gx, gy, gWidth, gHeight); } } x += pci->metrics.characterWidth; } } void fbImageGlyphBlt(DrawablePtr drawable, GCPtr gc, int x, int y, unsigned int nglyph, CharInfoPtr * ppciInit, pointer glyphs) { FbGCPrivPtr pgc = fb_gc(gc); CharInfoPtr *ppci; CharInfoPtr pci; unsigned char *pglyph; /* pointer bits in glyph */ int gWidth, gHeight; /* width and height of glyph */ FbStride gStride; /* stride of glyph */ bool opaque; int n; int gx, gy; void (*raster)(FbBits *, FbStride, int, FbStip *, FbBits, int, int); FbBits *dst = 0; FbStride dstStride = 0; int dstBpp = 0; int dstXoff = 0, dstYoff = 0; DBG(("%s x %d\n", __FUNCTION__, nglyph)); raster = 0; if (pgc->and == 0) { dstBpp = drawable->bitsPerPixel; switch (dstBpp) { case 8: raster = fbGlyph8; break; case 16: raster = fbGlyph16; break; case 32: raster = fbGlyph32; break; } } x += drawable->x; y += drawable->y; if (TERMINALFONT(gc->font) && !raster) { opaque = TRUE; } else { int xBack, widthBack; int yBack, heightBack; ppci = ppciInit; n = nglyph; widthBack = 0; while (n--) widthBack += (*ppci++)->metrics.characterWidth; xBack = x; if (widthBack < 0) { xBack += widthBack; widthBack = -widthBack; } yBack = y - FONTASCENT(gc->font); heightBack = FONTASCENT(gc->font) + FONTDESCENT(gc->font); fbSolidBoxClipped(drawable, gc, xBack, yBack, xBack + widthBack, yBack + heightBack); opaque = FALSE; } ppci = ppciInit; while (nglyph--) { pci = *ppci++; pglyph = FONTGLYPHBITS(glyphs, pci); gWidth = GLYPHWIDTHPIXELS(pci); gHeight = GLYPHHEIGHTPIXELS(pci); if (gWidth && gHeight) { gx = x + pci->metrics.leftSideBearing; gy = y - pci->metrics.ascent; if (raster && gWidth <= sizeof(FbStip) * 8 && fbGlyphIn(gc, gx, gy, gWidth, gHeight)) { fbGetDrawable(drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); raster(dst + (gy + dstYoff) * dstStride, dstStride, dstBpp, (FbStip *) pglyph, pgc->fg, gx + dstXoff, gHeight); } else { gStride = GLYPHWIDTHBYTESPADDED(pci) / sizeof(FbStip); fbPutXYImage(drawable, gc, pgc->fg, pgc->bg, pgc->pm, GXcopy, opaque, gx, gy, gWidth, gHeight, (FbStip *) pglyph, gStride, 0); } } x += pci->metrics.characterWidth; } } xf86-video-intel-2.99.917/src/sna/fb/fbarc.c0000664000175000017500000000735112244635610015120 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" #include #include #include #define ARC fbArc8 #define BITS BYTE #define BITS2 CARD16 #define BITS4 CARD32 #include "fbarcbits.h" #undef BITS #undef BITS2 #undef BITS4 #undef ARC #define ARC fbArc16 #define BITS CARD16 #define BITS2 CARD32 #include "fbarcbits.h" #undef BITS #undef BITS2 #undef ARC #define ARC fbArc32 #define BITS CARD32 #include "fbarcbits.h" #undef BITS #undef ARC void fbPolyArc(DrawablePtr drawable, GCPtr gc, int n, xArc *arc) { DBG(("%s x %d, width=%d, fill=%d, line=%d\n", __FUNCTION__, n, gc->lineWidth, gc->lineStyle, gc->fillStyle)); if (gc->lineWidth == 0) { void (*raster)(FbBits *dst, FbStride dstStride, int dstBpp, xArc *arc, int dx, int dy, FbBits and, FbBits xor); raster = 0; if (gc->lineStyle == LineSolid && gc->fillStyle == FillSolid) { switch (drawable->bitsPerPixel) { case 8: raster = fbArc8; break; case 16: raster = fbArc16; break; case 32: raster = fbArc32; break; } } if (raster) { FbGCPrivPtr pgc = fb_gc(gc); FbBits *dst; FbStride dstStride; int dstBpp; int dstXoff, dstYoff; BoxRec box; int x2, y2; fbGetDrawable(drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); while (n--) { if (miCanZeroArc(arc)) { box.x1 = arc->x + drawable->x; box.y1 = arc->y + drawable->y; /* * Because box.x2 and box.y2 get truncated to 16 bits, and the * RECT_IN_REGION test treats the resulting number as a signed * integer, the RECT_IN_REGION test alone can go the wrong way. * This can result in a server crash because the rendering * routines in this file deal directly with cpu addresses * of pixels to be stored, and do not clip or otherwise check * that all such addresses are within their respective pixmaps. * So we only allow the RECT_IN_REGION test to be used for * values that can be expressed correctly in a signed short. */ x2 = box.x1 + (int) arc->width + 1; box.x2 = x2; y2 = box.y1 + (int) arc->height + 1; box.y2 = y2; if ((x2 <= SHRT_MAX) && (y2 <= SHRT_MAX) && (RegionContainsRect(gc->pCompositeClip, &box) == rgnIN)) { raster(dst, dstStride, dstBpp, arc, drawable->x + dstXoff, drawable->y + dstYoff, pgc->and, pgc->xor); } else miZeroPolyArc(drawable, gc, 1, arc); } else miPolyArc(drawable, gc, 1, arc); arc++; } } else miZeroPolyArc(drawable, gc, n, arc); } else miPolyArc(drawable, gc, n, arc); } xf86-video-intel-2.99.917/src/sna/fb/fbglyphbits.h0000664000175000017500000000662212244635610016365 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #define isClipped(c,ul,lr) (((c) | ((c) - (ul)) | ((lr) - (c))) & 0x80008000) #define RROP(b,a,x) WRITE((b), FbDoRRop (READ(b), (a), (x))) #define WRITE_ADDR1(n) (n) #define WRITE_ADDR2(n) (n) #define WRITE_ADDR4(n) (n) #define WRITE1(d,n,fg) WRITE(d + WRITE_ADDR1(n), (BITS) (fg)) #ifdef BITS2 #define WRITE2(d,n,fg) WRITE((BITS2 *) &((d)[WRITE_ADDR2(n)]), (BITS2) (fg)) #else #define WRITE2(d,n,fg) (WRITE1(d,n,fg), WRITE1(d,(n)+1,fg)) #endif #ifdef BITS4 #define WRITE4(d,n,fg) WRITE((BITS4 *) &((d)[WRITE_ADDR4(n)]), (BITS4) (fg)) #else #define WRITE4(d,n,fg) (WRITE2(d,n,fg), WRITE2(d,(n)+2,fg)) #endif static void GLYPH(FbBits * dstBits, FbStride dstStride, int dstBpp, FbStip * stipple, FbBits fg, int x, int height) { int lshift; FbStip bits; BITS *dstLine; BITS *dst; int n; int shift; dstLine = (BITS *) dstBits; dstLine += x & ~3; dstStride *= (sizeof(FbBits) / sizeof(BITS)); shift = x & 3; lshift = 4 - shift; while (height--) { bits = *stipple++; dst = (BITS *) dstLine; n = lshift; while (bits) { switch (FbStipMoveLsb(FbLeftStipBits(bits, n), 4, n)) { case 0: break; case 1: WRITE1(dst, 0, fg); break; case 2: WRITE1(dst, 1, fg); break; case 3: WRITE2(dst, 0, fg); break; case 4: WRITE1(dst, 2, fg); break; case 5: WRITE1(dst, 0, fg); WRITE1(dst, 2, fg); break; case 6: WRITE1(dst, 1, fg); WRITE1(dst, 2, fg); break; case 7: WRITE2(dst, 0, fg); WRITE1(dst, 2, fg); break; case 8: WRITE1(dst, 3, fg); break; case 9: WRITE1(dst, 0, fg); WRITE1(dst, 3, fg); break; case 10: WRITE1(dst, 1, fg); WRITE1(dst, 3, fg); break; case 11: WRITE2(dst, 0, fg); WRITE1(dst, 3, fg); break; case 12: WRITE2(dst, 2, fg); break; case 13: WRITE1(dst, 0, fg); WRITE2(dst, 2, fg); break; case 14: WRITE1(dst, 1, fg); WRITE2(dst, 2, fg); break; case 15: WRITE4(dst, 0, fg); break; } bits = FbStipLeft(bits, n); n = 4; dst += 4; } dstLine += dstStride; } } #undef WRITE_ADDR1 #undef WRITE_ADDR2 #undef WRITE_ADDR4 #undef WRITE1 #undef WRITE2 #undef WRITE4 #undef RROP #undef isClipped xf86-video-intel-2.99.917/src/sna/fb/fbcopy.c0000664000175000017500000001471012244635610015322 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include #include "fb.h" #include void fbCopyNtoN(DrawablePtr src_drawable, DrawablePtr dst_drawable, GCPtr gc, BoxPtr box, int nbox, int dx, int dy, Bool reverse, Bool upsidedown, Pixel bitplane, void *closure) { CARD8 alu = gc ? gc->alu : GXcopy; FbBits pm = gc ? fb_gc(gc)->pm : FB_ALLONES; FbBits *src, *dst; FbStride srcStride, dstStride; int dstBpp, srcBpp; int srcXoff, srcYoff; int dstXoff, dstYoff; fbGetDrawable(src_drawable, src, srcStride, srcBpp, srcXoff, srcYoff); fbGetDrawable(dst_drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); src += (dy + srcYoff) * srcStride; srcXoff += dx; dst += dstYoff * dstStride; do { fbBlt(src + box->y1 * srcStride, srcStride, (box->x1 + srcXoff) * srcBpp, dst + box->y1 * dstStride, dstStride, (box->x1 + dstXoff) * dstBpp, (box->x2 - box->x1) * dstBpp, (box->y2 - box->y1), alu, pm, dstBpp, reverse, upsidedown); } while (box++, --nbox); } void fbCopy1toN(DrawablePtr src_drawable, DrawablePtr dst_drawable, GCPtr gc, BoxPtr box, int nbox, int dx, int dy, Bool reverse, Bool upsidedown, Pixel bitplane, void *closure) { FbGCPrivPtr pgc = fb_gc(gc); FbBits *src; FbStride srcStride; int srcBpp; int srcXoff, srcYoff; FbBits *dst; FbStride dstStride; int dstBpp; int dstXoff, dstYoff; fbGetDrawable(src_drawable, src, srcStride, srcBpp, srcXoff, srcYoff); fbGetDrawable(dst_drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); while (nbox--) { if (dstBpp == 1) { fbBlt(src + (box->y1 + dy + srcYoff) * srcStride, srcStride, (box->x1 + dx + srcXoff) * srcBpp, dst + (box->y1 + dstYoff) * dstStride, dstStride, (box->x1 + dstXoff) * dstBpp, (box->x2 - box->x1) * dstBpp, (box->y2 - box->y1), FbOpaqueStipple1Rop(gc->alu, gc->fgPixel, gc->bgPixel), pgc->pm, dstBpp, reverse, upsidedown); } else { fbBltOne((FbStip *) (src + (box->y1 + dy + srcYoff) * srcStride), srcStride * (FB_UNIT / FB_STIP_UNIT), (box->x1 + dx + srcXoff), dst + (box->y1 + dstYoff) * dstStride, dstStride, (box->x1 + dstXoff) * dstBpp, dstBpp, (box->x2 - box->x1) * dstBpp, (box->y2 - box->y1), pgc->and, pgc->xor, pgc->bgand, pgc->bgxor); } box++; } } void fbCopyNto1(DrawablePtr src_drawable, DrawablePtr dst_drawable, GCPtr gc, BoxPtr box, int nbox, int dx, int dy, Bool reverse, Bool upsidedown, Pixel bitplane, void *closure) { FbGCPrivPtr pgc = fb_gc(gc); while (nbox--) { if (dst_drawable->bitsPerPixel == 1) { FbBits *src; FbStride srcStride; int srcBpp; int srcXoff, srcYoff; FbStip *dst; FbStride dstStride; int dstBpp; int dstXoff, dstYoff; fbGetDrawable(src_drawable, src, srcStride, srcBpp, srcXoff, srcYoff); fbGetStipDrawable(dst_drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); fbBltPlane(src + (box->y1 + dy + srcYoff) * srcStride, srcStride, (box->x1 + dx + srcXoff) * srcBpp, srcBpp, dst + (box->y1 + dstYoff) * dstStride, dstStride, (box->x1 + dstXoff) * dstBpp, (box->x2 - box->x1) * srcBpp, (box->y2 - box->y1), (FbStip) pgc->and, (FbStip) pgc->xor, (FbStip) pgc->bgand, (FbStip) pgc->bgxor, bitplane); } else { FbBits *src; FbStride srcStride; int srcBpp; int srcXoff, srcYoff; FbBits *dst; FbStride dstStride; int dstBpp; int dstXoff, dstYoff; FbStip *tmp; FbStride tmpStride; int width, height; width = box->x2 - box->x1; height = box->y2 - box->y1; tmpStride = ((width + FB_STIP_MASK) >> FB_STIP_SHIFT); tmp = malloc(tmpStride * height * sizeof(FbStip)); if (!tmp) return; fbGetDrawable(src_drawable, src, srcStride, srcBpp, srcXoff, srcYoff); fbGetDrawable(dst_drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); fbBltPlane(src + (box->y1 + dy + srcYoff) * srcStride, srcStride, (box->x1 + dx + srcXoff) * srcBpp, srcBpp, tmp, tmpStride, 0, width * srcBpp, height, fbAndStip(GXcopy, FB_ALLONES, FB_ALLONES), fbXorStip(GXcopy, FB_ALLONES, FB_ALLONES), fbAndStip(GXcopy, 0, FB_ALLONES), fbXorStip(GXcopy, 0, FB_ALLONES), bitplane); fbBltOne(tmp, tmpStride, 0, dst + (box->y1 + dstYoff) * dstStride, dstStride, (box->x1 + dstXoff) * dstBpp, dstBpp, width * dstBpp, height, pgc->and, pgc->xor, pgc->bgand, pgc->bgxor); free(tmp); } box++; } } RegionPtr fbCopyArea(DrawablePtr src, DrawablePtr dst, GCPtr gc, int sx, int sy, int width, int height, int dx, int dy) { return miDoCopy(src, dst, gc, sx, sy, width, height, dx, dy, fbCopyNtoN, 0, 0); } RegionPtr fbCopyPlane(DrawablePtr src, DrawablePtr dst, GCPtr gc, int sx, int sy, int width, int height, int dx, int dy, unsigned long bitplane) { if (src->bitsPerPixel > 1) return miDoCopy(src, dst, gc, sx, sy, width, height, dx, dy, fbCopyNto1, (Pixel) bitplane, 0); else if (bitplane & 1) return miDoCopy(src, dst, gc, sx, sy, width, height, dx, dy, fbCopy1toN, (Pixel) bitplane, 0); else return miHandleExposures(src, dst, gc, sx, sy, width, height, dx, dy, bitplane); } xf86-video-intel-2.99.917/src/sna/fb/Makefile.am0000664000175000017500000000104412400044327015715 00000000000000noinst_LTLIBRARIES = libfb.la libfb_la_CFLAGS = @CWARNFLAGS@ @XORG_CFLAGS@ @NOWARNFLAGS@ libfb_la_LIBADD = $(PIXMAN_LIBS) libfb_la_SOURCES = \ fb.h \ sfb.h \ fbarc.c \ fbarcbits.h \ fbbitmap.c \ fbblt.c \ fbbltone.c \ fbclip.c \ fbclip.h \ fbcopy.c \ fbfill.c \ fbgc.c \ fbglyph.c \ fbglyphbits.h \ fbimage.c \ fbline.c \ fblinebits.h \ fbpict.c \ fbpict.h \ fbpoint.c \ fbpointbits.h \ fbpush.c \ fbrop.h \ fbseg.c \ fbsegbits.h \ fbspan.c \ fbstipple.c \ fbtile.c \ fbutil.c \ $(NULL) EXTRA_DIST = README xf86-video-intel-2.99.917/src/sna/fb/fbimage.c0000664000175000017500000001577312244635610015444 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include #include "fb.h" #include "fbclip.h" struct fbPutZImage { FbStip *src, *dst; FbStride src_stride, dst_stride; int dst_x, dst_y; int x0, y0; }; inline static void _fbPutZImage(DrawablePtr drawable, GCPtr gc, const BoxRec *b, void *_data) { struct fbPutZImage *data = _data; int bpp = drawable->bitsPerPixel; fbBltStip(data->src + (b->y1 - data->y0) * data->src_stride, data->src_stride, (b->x1 - data->x0) * bpp, data->dst + (b->y1 + data->dst_y) * data->dst_stride, data->dst_stride, (b->x1 + data->dst_x) * bpp, (b->x2 - b->x1) * bpp, (b->y2 - b->y1), gc->alu, fb_gc(gc)->pm, bpp); } static void fbPutZImage(DrawablePtr drawable, GCPtr gc, int x, int y, int width, int height, FbStip *src, FbStride srcStride) { PixmapPtr pixmap; struct fbPutZImage data; BoxRec box; box.x1 = data.x0 = x; box.y1 = data.y0 = y; box.x2 = x + width; box.y2 = y + height; data.src = src; data.src_stride = srcStride; fbGetDrawablePixmap(drawable, pixmap, data.dst_x, data.dst_y); data.dst = pixmap->devPrivate.ptr; data.dst_stride = pixmap->devKind / sizeof(FbStip); fbDrawableRun(drawable, gc, &box, _fbPutZImage, &data); } struct fbPutXYImage { FbStip *src, *dst; FbStride src_stride, dst_stride; int dst_x, dst_y, src_x; int x0, y0; int alu, pm; FbBits fgand, fgxor, bgand, bgxor; }; inline static void _fbPutXYImage1(DrawablePtr drawable, GCPtr gc, const BoxRec *b, void *_data) { struct fbPutXYImage *data = _data; int bpp = drawable->bitsPerPixel; fbBltStip(data->src + (b->y1 - data->y0) * data->src_stride, data->src_stride, (b->x1 - data->x0) + data->src_x, (FbStip *) (data->dst + (b->y1 + data->dst_y) * data->dst_stride), data->dst_stride, (b->x1 + data->dst_x) * bpp, (b->x2 - b->x1) * bpp, (b->y2 - b->y1), data->alu, data->pm, bpp); } inline static void _fbPutXYImageN(DrawablePtr drawable, GCPtr gc, const BoxRec *b, void *_data) { struct fbPutXYImage *data = _data; int bpp = drawable->bitsPerPixel; fbBltOne(data->src + (b->y1 - data->y0) * data->src_stride, data->src_stride, (b->x1 - data->x0) + data->src_x, data->dst + (b->y1 + data->dst_y) * data->dst_stride, data->dst_stride, (b->x1 + data->dst_x) * bpp, bpp, (b->x2 - b->x1) * bpp, (b->y2 - b->y1), data->fgand, data->fgxor, data->bgand, data->bgxor); } void fbPutXYImage(DrawablePtr drawable, GCPtr gc, FbBits fg, FbBits bg, FbBits pm, int alu, Bool opaque, int x, int y, int width, int height, FbStip *src, FbStride srcStride, int srcX) { PixmapPtr pixmap; struct fbPutXYImage data; BoxRec box; box.x1 = data.x0 = x; box.y1 = data.y0 = y; box.x2 = x + width; box.y2 = y + height; data.src = src; data.src_stride = srcStride; data.src_x = srcX; fbGetDrawablePixmap(drawable, pixmap, data.dst_x, data.dst_y); data.dst = pixmap->devPrivate.ptr; data.dst_stride = pixmap->devKind / sizeof(FbStip); if (drawable->bitsPerPixel == 1) { if (opaque) data.alu = FbOpaqueStipple1Rop(alu, fg, bg); else data.alu = FbStipple1Rop(alu, fg); data.pm = pm; fbDrawableRun(drawable, gc, &box, _fbPutXYImage1, &data); } else { data.fgand = fbAnd(alu, fg, pm); data.fgxor = fbXor(alu, fg, pm); if (opaque) { data.bgand = fbAnd(alu, bg, pm); data.bgxor = fbXor(alu, bg, pm); } else { data.bgand = fbAnd(GXnoop, (FbBits) 0, FB_ALLONES); data.bgxor = fbXor(GXnoop, (FbBits) 0, FB_ALLONES); } fbDrawableRun(drawable, gc, &box, _fbPutXYImageN, &data); } } void fbPutImage(DrawablePtr drawable, GCPtr gc, int depth, int x, int y, int w, int h, int leftPad, int format, char *image) { FbGCPrivPtr pgc = fb_gc(gc); unsigned long i; FbStride srcStride; FbStip *src = (FbStip *)image; DBG(("%s (%d, %d)x(%d, %d)\n", __FUNCTION__, x, y, w, h)); x += drawable->x; y += drawable->y; switch (format) { case XYBitmap: srcStride = BitmapBytePad(w + leftPad) / sizeof(FbStip); fbPutXYImage(drawable, gc, pgc->fg, pgc->bg, pgc->pm, gc->alu, TRUE, x, y, w, h, src, srcStride, leftPad); break; case XYPixmap: srcStride = BitmapBytePad(w + leftPad) / sizeof(FbStip); for (i = (unsigned long) 1 << (drawable->depth - 1); i; i >>= 1) { if (i & gc->planemask) { fbPutXYImage(drawable, gc, FB_ALLONES, 0, fbReplicatePixel(i, drawable->bitsPerPixel), gc->alu, TRUE, x, y, w, h, src, srcStride, leftPad); src += srcStride * h; } } break; case ZPixmap: srcStride = PixmapBytePad(w, drawable->depth) / sizeof(FbStip); fbPutZImage(drawable, gc, x, y, w, h, src, srcStride); } } void fbGetImage(DrawablePtr drawable, int x, int y, int w, int h, unsigned int format, unsigned long planeMask, char *d) { FbBits *src; FbStride srcStride; int srcBpp; int srcXoff, srcYoff; FbStip *dst; FbStride dstStride; DBG(("%s (%d, %d)x(%d, %d)\n", __FUNCTION__, x, y, w, h)); fbGetDrawable(drawable, src, srcStride, srcBpp, srcXoff, srcYoff); x += drawable->x; y += drawable->y; dst = (FbStip *) d; if (format == ZPixmap || srcBpp == 1) { FbBits pm; pm = fbReplicatePixel(planeMask, srcBpp); dstStride = PixmapBytePad(w, drawable->depth); if (pm != FB_ALLONES) memset(d, 0, dstStride * h); dstStride /= sizeof(FbStip); fbBltStip((FbStip *)(src + (y + srcYoff) * srcStride), srcStride, (x + srcXoff) * srcBpp, dst, dstStride, 0, w * srcBpp, h, GXcopy, pm, srcBpp); } else { dstStride = BitmapBytePad(w) / sizeof(FbStip); fbBltPlane(src + (y + srcYoff) * srcStride, srcStride, (x + srcXoff) * srcBpp, srcBpp, dst, dstStride, 0, w * srcBpp, h, fbAndStip(GXcopy, FB_STIP_ALLONES, FB_STIP_ALLONES), fbXorStip(GXcopy, FB_STIP_ALLONES, FB_STIP_ALLONES), fbAndStip(GXcopy, 0, FB_STIP_ALLONES), fbXorStip(GXcopy, 0, FB_STIP_ALLONES), planeMask); } } xf86-video-intel-2.99.917/src/sna/fb/fbpict.c0000664000175000017500000002240712432737457015324 00000000000000/* * Copyright © 2000 SuSE, Inc. * Copyright © 2007 Red Hat, Inc. * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of SuSE not be used in advertising or * publicity pertaining to distribution of the software without specific, * written prior permission. SuSE makes no representations about the * suitability of this software for any purpose. It is provided "as is" * without express or implied warranty. * * SuSE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL SuSE * BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. * * Author: Keith Packard, SuSE, Inc. */ #include #include "fb.h" #include "fbpict.h" static void SourceValidateOnePicture(PicturePtr picture) { DrawablePtr drawable = picture->pDrawable; if (!drawable) return; SourceValidate(drawable, 0, 0, drawable->width, drawable->height, picture->subWindowMode); } static void fbCompositeSourceValidate(PicturePtr picture) { SourceValidateOnePicture(picture); if (picture->alphaMap) SourceValidateOnePicture(picture->alphaMap); } void fbComposite(CARD8 op, PicturePtr pSrc, PicturePtr pMask, PicturePtr pDst, INT16 xSrc, INT16 ySrc, INT16 xMask, INT16 yMask, INT16 xDst, INT16 yDst, CARD16 width, CARD16 height) { pixman_image_t *src, *mask, *dest; int src_xoff, src_yoff; int msk_xoff, msk_yoff; int dst_xoff, dst_yoff; fbCompositeSourceValidate(pSrc); if (pMask) fbCompositeSourceValidate(pMask); src = image_from_pict(pSrc, FALSE, &src_xoff, &src_yoff); mask = image_from_pict(pMask, FALSE, &msk_xoff, &msk_yoff); dest = image_from_pict(pDst, TRUE, &dst_xoff, &dst_yoff); if (src && dest && !(pMask && !mask)) { pixman_image_composite(op, src, mask, dest, xSrc + src_xoff, ySrc + src_yoff, xMask + msk_xoff, yMask + msk_yoff, xDst + dst_xoff, yDst + dst_yoff, width, height); } free_pixman_pict(pSrc, src); free_pixman_pict(pMask, mask); free_pixman_pict(pDst, dest); } static pixman_image_t * create_solid_fill_image(PicturePtr pict) { PictSolidFill *solid = &pict->pSourcePict->solidFill; pixman_color_t color; CARD32 a, r, g, b; a = (solid->color & 0xff000000) >> 24; r = (solid->color & 0x00ff0000) >> 16; g = (solid->color & 0x0000ff00) >> 8; b = (solid->color & 0x000000ff) >> 0; color.alpha = (a << 8) | a; color.red = (r << 8) | r; color.green = (g << 8) | g; color.blue = (b << 8) | b; return pixman_image_create_solid_fill(&color); } static pixman_image_t * create_linear_gradient_image(PictGradient * gradient) { PictLinearGradient *linear = (PictLinearGradient *) gradient; pixman_point_fixed_t p1; pixman_point_fixed_t p2; p1.x = linear->p1.x; p1.y = linear->p1.y; p2.x = linear->p2.x; p2.y = linear->p2.y; return pixman_image_create_linear_gradient(&p1, &p2, (pixman_gradient_stop_t *) gradient->stops, gradient->nstops); } static pixman_image_t * create_radial_gradient_image(PictGradient * gradient) { PictRadialGradient *radial = (PictRadialGradient *) gradient; pixman_point_fixed_t c1; pixman_point_fixed_t c2; c1.x = radial->c1.x; c1.y = radial->c1.y; c2.x = radial->c2.x; c2.y = radial->c2.y; return pixman_image_create_radial_gradient(&c1, &c2, radial->c1.radius, radial->c2.radius, (pixman_gradient_stop_t *) gradient->stops, gradient->nstops); } static pixman_image_t * create_conical_gradient_image(PictGradient * gradient) { PictConicalGradient *conical = (PictConicalGradient *) gradient; pixman_point_fixed_t center; center.x = conical->center.x; center.y = conical->center.y; return pixman_image_create_conical_gradient(¢er, conical->angle, (pixman_gradient_stop_t *) gradient->stops, gradient->nstops); } static inline bool picture_has_clip(PicturePtr p) { #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,16,99,1,0) return p->clientClip; #else return p->clientClipType != CT_NONE; #endif } static pixman_image_t * create_bits_picture(PicturePtr pict, Bool has_clip, int *xoff, int *yoff) { PixmapPtr pixmap; FbBits *bits; FbStride stride; int bpp; pixman_image_t *image; fbGetDrawablePixmap(pict->pDrawable, pixmap, *xoff, *yoff); fbGetPixmapBitsData(pixmap, bits, stride, bpp); image = pixman_image_create_bits((pixman_format_code_t) pict->format, pixmap->drawable.width, pixmap->drawable.height, (uint32_t *) bits, stride * sizeof(FbStride)); if (!image) return NULL; /* pCompositeClip is undefined for source pictures, so * only set the clip region for pictures with drawables */ if (has_clip) { if (picture_has_clip(pict)) pixman_image_set_has_client_clip(image, TRUE); if (*xoff || *yoff) pixman_region_translate(pict->pCompositeClip, *xoff, *yoff); pixman_image_set_clip_region(image, pict->pCompositeClip); if (*xoff || *yoff) pixman_region_translate(pict->pCompositeClip, -*xoff, -*yoff); } /* Indexed table */ if (pict->pFormat->index.devPrivate) pixman_image_set_indexed(image, pict->pFormat->index.devPrivate); /* Add in drawable origin to position within the image */ *xoff += pict->pDrawable->x; *yoff += pict->pDrawable->y; return image; } static pixman_image_t *image_from_pict_internal(PicturePtr pict, Bool has_clip, int *xoff, int *yoff, Bool is_alpha_map); static void set_image_properties(pixman_image_t * image, PicturePtr pict, Bool has_clip, int *xoff, int *yoff, Bool is_alpha_map) { pixman_repeat_t repeat; pixman_filter_t filter; if (pict->transform) { /* For source images, adjust the transform to account * for the drawable offset within the pixman image, * then set the offset to 0 as it will be used * to compute positions within the transformed image. */ if (!has_clip) { struct pixman_transform adjusted; adjusted = *pict->transform; pixman_transform_translate(&adjusted, NULL, pixman_int_to_fixed(*xoff), pixman_int_to_fixed(*yoff)); pixman_image_set_transform(image, &adjusted); *xoff = 0; *yoff = 0; } else pixman_image_set_transform(image, pict->transform); } switch (pict->repeatType) { default: case RepeatNone: repeat = PIXMAN_REPEAT_NONE; break; case RepeatPad: repeat = PIXMAN_REPEAT_PAD; break; case RepeatNormal: repeat = PIXMAN_REPEAT_NORMAL; break; case RepeatReflect: repeat = PIXMAN_REPEAT_REFLECT; break; } pixman_image_set_repeat(image, repeat); /* Fetch alpha map unless 'pict' is being used * as the alpha map for this operation */ if (pict->alphaMap && !is_alpha_map) { int alpha_xoff, alpha_yoff; pixman_image_t *alpha_map = image_from_pict_internal(pict->alphaMap, FALSE, &alpha_xoff, &alpha_yoff, TRUE); pixman_image_set_alpha_map(image, alpha_map, pict->alphaOrigin.x, pict->alphaOrigin.y); free_pixman_pict(pict->alphaMap, alpha_map); } pixman_image_set_component_alpha(image, pict->componentAlpha); switch (pict->filter) { default: case PictFilterNearest: case PictFilterFast: filter = PIXMAN_FILTER_NEAREST; break; case PictFilterBilinear: case PictFilterGood: filter = PIXMAN_FILTER_BILINEAR; break; case PictFilterConvolution: filter = PIXMAN_FILTER_CONVOLUTION; break; } pixman_image_set_filter(image, filter, (pixman_fixed_t *) pict->filter_params, pict->filter_nparams); pixman_image_set_source_clipping(image, TRUE); } static pixman_image_t * image_from_pict_internal(PicturePtr pict, Bool has_clip, int *xoff, int *yoff, Bool is_alpha_map) { pixman_image_t *image = NULL; if (!pict) return NULL; if (pict->pDrawable) { image = create_bits_picture(pict, has_clip, xoff, yoff); } else if (pict->pSourcePict) { SourcePict *sp = pict->pSourcePict; if (sp->type == SourcePictTypeSolidFill) { image = create_solid_fill_image(pict); } else { PictGradient *gradient = &pict->pSourcePict->gradient; if (sp->type == SourcePictTypeLinear) image = create_linear_gradient_image(gradient); else if (sp->type == SourcePictTypeRadial) image = create_radial_gradient_image(gradient); else if (sp->type == SourcePictTypeConical) image = create_conical_gradient_image(gradient); } *xoff = *yoff = 0; } if (image) set_image_properties(image, pict, has_clip, xoff, yoff, is_alpha_map); return image; } pixman_image_t * image_from_pict(PicturePtr pict, Bool has_clip, int *xoff, int *yoff) { return image_from_pict_internal(pict, has_clip, xoff, yoff, FALSE); } void free_pixman_pict(PicturePtr pict, pixman_image_t * image) { if (image) pixman_image_unref(image); } xf86-video-intel-2.99.917/src/sna/fb/fbpoint.c0000664000175000017500000000711112400044327015467 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" #include #define DOTS fbDots8 #define DOTS__SIMPLE fbDots8__simple #define BITS BYTE #include "fbpointbits.h" #undef BITS #undef DOTS__SIMPLE #undef DOTS #define DOTS fbDots16 #define DOTS__SIMPLE fbDots16__simple #define BITS CARD16 #include "fbpointbits.h" #undef BITS #undef DOTS__SIMPLE #undef DOTS #define DOTS fbDots32 #define DOTS__SIMPLE fbDots32__simple #define BITS CARD32 #include "fbpointbits.h" #undef BITS #undef DOTS__SIMPLE #undef DOTS static void fbDots(FbBits *dstOrig, FbStride dstStride, int dstBpp, RegionPtr clip, xPoint *pts, int n, int xorg, int yorg, int xoff, int yoff, FbBits andOrig, FbBits xorOrig) { FbStip *dst = (FbStip *) dstOrig; FbStip and = andOrig; FbStip xor = xorOrig; while (n--) { int x = pts->x + xorg; int y = pts->y + yorg; pts++; if (RegionContainsPoint(clip, x, y, NULL)) { FbStip mask; FbStip *d; x = (x + xoff) * dstBpp; d = dst + ((y + yoff) * dstStride) + (x >> FB_STIP_SHIFT); x &= FB_STIP_MASK; mask = FbStipMask(x, dstBpp); WRITE(d, FbDoMaskRRop(READ(d), and, xor, mask)); } } } void fbPolyPoint(DrawablePtr drawable, GCPtr gc, int mode, int n, xPoint *pt, unsigned flags) { FbBits *dst; FbStride dstStride; int dstBpp; int dstXoff, dstYoff; void (*dots)(FbBits *dst, FbStride dstStride, int dstBpp, RegionPtr clip, xPoint *pts, int n, int xorg, int yorg, int xoff, int yoff, FbBits and, FbBits xor); DBG(("%s x %d, clip=[(%d, %d), (%d, %d)]x%d\n", __FUNCTION__, n, gc->pCompositeClip->extents.x1, gc->pCompositeClip->extents.y1, gc->pCompositeClip->extents.x2, gc->pCompositeClip->extents.y2, region_num_rects(gc->pCompositeClip))); if (mode == CoordModePrevious) fbFixCoordModePrevious(n, pt); fbGetDrawable(drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); dots = fbDots; if ((flags & 2) == 0 && fb_gc(gc)->and == 0) { switch (dstBpp) { case 8: dots = fbDots8__simple; break; case 16: dots = fbDots16__simple; break; case 32: dots = fbDots32__simple; break; } } else { switch (dstBpp) { case 8: dots = fbDots8; break; case 16: dots = fbDots16; break; case 32: dots = fbDots32; break; } } dots(dst, dstStride, dstBpp, gc->pCompositeClip, pt, n, drawable->x, drawable->y, dstXoff, dstYoff, fb_gc(gc)->and, fb_gc(gc)->xor); } xf86-video-intel-2.99.917/src/sna/fb/fbseg.c0000664000175000017500000003073512400044327015124 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include #include "fb.h" #include "fbclip.h" #include #include #define FbDashDeclare \ unsigned char *__dash, *__firstDash, *__lastDash #define FbDashInit(gc,pgc,dashOffset,dashlen,even) { \ (even) = TRUE; \ __firstDash = (gc)->dash; \ __lastDash = __firstDash + (gc)->numInDashList; \ (dashOffset) %= (pgc)->dashLength; \ \ __dash = __firstDash; \ while ((dashOffset) >= ((dashlen) = *__dash)) { \ (dashOffset) -= (dashlen); \ (even) = 1-(even); \ if (++__dash == __lastDash) \ __dash = __firstDash; \ } \ (dashlen) -= (dashOffset); \ } #define FbDashNext(dashlen) { \ if (++__dash == __lastDash) \ __dash = __firstDash; \ (dashlen) = *__dash; \ } /* as numInDashList is always even, this case can skip a test */ #define FbDashNextEven(dashlen) { \ (dashlen) = *++__dash; \ } #define FbDashNextOdd(dashlen) FbDashNext(dashlen) #define FbDashStep(dashlen,even) { \ if (!--(dashlen)) { \ FbDashNext(dashlen); \ (even) = 1-(even); \ } \ } #define fbBresShiftMask(mask,dir,bpp) ((bpp == FB_STIP_UNIT) ? 0 : \ ((dir < 0) ? FbStipLeft(mask,bpp) : \ FbStipRight(mask,bpp))) typedef void FbBres(DrawablePtr drawable, GCPtr gc, int dashOffset, int sdx, int sdy, int axis, int x, int y, int e, int e1, int e3, int len); #define BRESSOLID fbBresSolid8 #define BRESSOLIDR fbBresSolidR8 #define BRESDASH fbBresDash8 #define BITS BYTE #define BITS2 CARD16 #define BITS4 CARD32 #include "fbsegbits.h" #undef BRESSOLID #undef BRESSOLIDR #undef BRESDASH #undef BITS #undef BITS2 #undef BITS4 #define BRESSOLID fbBresSolid16 #define BRESSOLIDR fbBresSolidR16 #define BRESDASH fbBresDash16 #define BITS CARD16 #define BITS2 CARD32 #include "fbsegbits.h" #undef BRESSOLID #undef BRESSOLIDR #undef BRESDASH #undef BITS #undef BITS2 #define BRESSOLID fbBresSolid32 #define BRESSOLIDR fbBresSolidR32 #define BRESDASH fbBresDash32 #define BITS CARD32 #include "fbsegbits.h" #undef BRESSOLID #undef BRESSOLIDR #undef BRESDASH #undef BITS static void fbBresSolid(DrawablePtr drawable, GCPtr gc, int dashOffset, int sdx, int sdy, int axis, int x1, int y1, int e, int e1, int e3, int len) { FbStip *dst; FbStride stride; int bpp; int dx, dy; FbGCPrivPtr pgc = fb_gc(gc); FbStip and = (FbStip) pgc->and; FbStip xor = (FbStip) pgc->xor; FbStip mask, mask0; FbStip bits; fbGetStipDrawable(drawable, dst, stride, bpp, dx, dy); dst += ((y1 + dy) * stride); x1 = (x1 + dx) * bpp; dst += x1 >> FB_STIP_SHIFT; x1 &= FB_STIP_MASK; mask0 = FbStipMask(0, bpp); mask = FbStipRight(mask0, x1); if (sdx < 0) mask0 = FbStipRight(mask0, FB_STIP_UNIT - bpp); if (sdy < 0) stride = -stride; if (axis == X_AXIS) { bits = 0; while (len--) { bits |= mask; mask = fbBresShiftMask(mask, sdx, bpp); if (!mask) { WRITE(dst, FbDoMaskRRop(READ(dst), and, xor, bits)); bits = 0; dst += sdx; mask = mask0; } e += e1; if (e >= 0) { WRITE(dst, FbDoMaskRRop(READ(dst), and, xor, bits)); bits = 0; dst += stride; e += e3; } } if (bits) WRITE(dst, FbDoMaskRRop(READ(dst), and, xor, bits)); } else { while (len--) { WRITE(dst, FbDoMaskRRop(READ(dst), and, xor, mask)); dst += stride; e += e1; if (e >= 0) { e += e3; mask = fbBresShiftMask(mask, sdx, bpp); if (!mask) { dst += sdx; mask = mask0; } } } } } static void fbBresDash(DrawablePtr drawable, GCPtr gc, int dashOffset, int sdx, int sdy, int axis, int x1, int y1, int e, int e1, int e3, int len) { FbStip *dst; FbStride stride; int bpp; int dx, dy; FbGCPrivPtr pgc = fb_gc(gc); FbStip and = (FbStip) pgc->and; FbStip xor = (FbStip) pgc->xor; FbStip bgand = (FbStip) pgc->bgand; FbStip bgxor = (FbStip) pgc->bgxor; FbStip mask, mask0; FbDashDeclare; int dashlen; bool even; bool doOdd; fbGetStipDrawable(drawable, dst, stride, bpp, dx, dy); doOdd = gc->lineStyle == LineDoubleDash; FbDashInit(gc, pgc, dashOffset, dashlen, even); dst += ((y1 + dy) * stride); x1 = (x1 + dx) * bpp; dst += x1 >> FB_STIP_SHIFT; x1 &= FB_STIP_MASK; mask0 = FbStipMask(0, bpp); mask = FbStipRight(mask0, x1); if (sdx < 0) mask0 = FbStipRight(mask0, FB_STIP_UNIT - bpp); if (sdy < 0) stride = -stride; while (len--) { if (even) WRITE(dst, FbDoMaskRRop(READ(dst), and, xor, mask)); else if (doOdd) WRITE(dst, FbDoMaskRRop(READ(dst), bgand, bgxor, mask)); if (axis == X_AXIS) { mask = fbBresShiftMask(mask, sdx, bpp); if (!mask) { dst += sdx; mask = mask0; } e += e1; if (e >= 0) { dst += stride; e += e3; } } else { dst += stride; e += e1; if (e >= 0) { e += e3; mask = fbBresShiftMask(mask, sdx, bpp); if (!mask) { dst += sdx; mask = mask0; } } } FbDashStep(dashlen, even); } } static void fbBresFill(DrawablePtr drawable, GCPtr gc, int dashOffset, int sdx, int sdy, int axis, int x1, int y1, int e, int e1, int e3, int len) { while (len--) { fbFill(drawable, gc, x1, y1, 1, 1); if (axis == X_AXIS) { x1 += sdx; e += e1; if (e >= 0) { e += e3; y1 += sdy; } } else { y1 += sdy; e += e1; if (e >= 0) { e += e3; x1 += sdx; } } } } static void fbSetFg(DrawablePtr drawable, GCPtr gc, Pixel fg) { if (fg != gc->fgPixel) { gc->fgPixel = fg; fbValidateGC(gc, GCForeground, drawable); } } static void fbBresFillDash(DrawablePtr drawable, GCPtr gc, int dashOffset, int sdx, int sdy, int axis, int x1, int y1, int e, int e1, int e3, int len) { FbGCPrivPtr pgc = fb_gc(gc); FbDashDeclare; int dashlen; bool even; bool doOdd; bool doBg; Pixel fg, bg; fg = gc->fgPixel; bg = gc->bgPixel; /* whether to fill the odd dashes */ doOdd = gc->lineStyle == LineDoubleDash; /* whether to switch fg to bg when filling odd dashes */ doBg = doOdd && (gc->fillStyle == FillSolid || gc->fillStyle == FillStippled); /* compute current dash position */ FbDashInit(gc, pgc, dashOffset, dashlen, even); while (len--) { if (even || doOdd) { if (doBg) { if (even) fbSetFg(drawable, gc, fg); else fbSetFg(drawable, gc, bg); } fbFill(drawable, gc, x1, y1, 1, 1); } if (axis == X_AXIS) { x1 += sdx; e += e1; if (e >= 0) { e += e3; y1 += sdy; } } else { y1 += sdy; e += e1; if (e >= 0) { e += e3; x1 += sdx; } } FbDashStep(dashlen, even); } if (doBg) fbSetFg(drawable, gc, fg); } static FbBres * fbSelectBres(DrawablePtr drawable, GCPtr gc) { FbGCPrivPtr pgc = fb_gc(gc); int bpp = drawable->bitsPerPixel; FbBres *bres; DBG(("%s: line=%d, fill=%d, and=%lx, bgand=%lx\n", __FUNCTION__, gc->lineStyle, gc->fillStyle, (long)pgc->and, (long)pgc->bgand)); assert(gc->lineWidth == 0); if (gc->lineStyle == LineSolid) { bres = fbBresFill; if (gc->fillStyle == FillSolid) { bres = fbBresSolid; if (pgc->and == 0) { switch (bpp) { case 8: bres = fbBresSolid8; break; case 16: bres = fbBresSolid16; break; case 32: bres = fbBresSolid32; break; } } else { switch (bpp) { case 8: bres = fbBresSolidR8; break; case 16: bres = fbBresSolidR16; break; case 32: bres = fbBresSolidR32; break; } } } } else { bres = fbBresFillDash; if (gc->fillStyle == FillSolid) { bres = fbBresDash; if (pgc->and == 0 && (gc->lineStyle == LineOnOffDash || pgc->bgand == 0)) { switch (bpp) { case 8: bres = fbBresDash8; break; case 16: bres = fbBresDash16; break; case 32: bres = fbBresDash32; break; } } } } return bres; } struct fbSegment { FbBres *bres; bool drawLast; int *dashOffset; int x1, y1, x2, y2; }; static void _fbSegment(DrawablePtr drawable, GCPtr gc, const BoxRec *b, void *_data) { struct fbSegment *data = _data; const unsigned int bias = miGetZeroLineBias(drawable->pScreen); int adx, ady; /* abs values of dx and dy */ int sdx, sdy; /* sign of dx and dy */ int e, e1, e2, e3; /* bresenham error and increments */ int len, axis, octant; int dashoff, doff; unsigned int oc1, oc2; DBG(("%s box=(%d, %d),(%d, %d)\n", __FUNCTION__, b->x1, b->y1, b->x2, b->y2)); CalcLineDeltas(data->x1, data->y1, data->x2, data->y2, adx, ady, sdx, sdy, 1, 1, octant); if (adx > ady) { axis = X_AXIS; e1 = ady << 1; e2 = e1 - (adx << 1); e = e1 - adx; len = adx; } else { axis = Y_AXIS; e1 = adx << 1; e2 = e1 - (ady << 1); e = e1 - ady; SetYMajorOctant(octant); len = ady; } FIXUP_ERROR(e, octant, bias); /* * Adjust error terms to compare against zero */ e3 = e2 - e1; e = e - e1; if (data->drawLast) len++; dashoff = *data->dashOffset; *data->dashOffset = dashoff + len; oc1 = 0; oc2 = 0; OUTCODES(oc1, data->x1, data->y1, b); OUTCODES(oc2, data->x2, data->y2, b); if ((oc1 | oc2) == 0) { data->bres(drawable, gc, dashoff, sdx, sdy, axis, data->x1, data->y1, e, e1, e3, len); } else if (oc1 & oc2) { } else { int new_x1 = data->x1, new_y1 = data->y1; int new_x2 = data->x2, new_y2 = data->y2; int clip1 = 0, clip2 = 0; int clipdx, clipdy; int err; if (miZeroClipLine(b->x1, b->y1, b->x2-1, b->y2-1, &new_x1, &new_y1, &new_x2, &new_y2, adx, ady, &clip1, &clip2, octant, bias, oc1, oc2) == -1) return; if (axis == X_AXIS) len = abs(new_x2 - new_x1); else len = abs(new_y2 - new_y1); if (clip2 != 0 || data->drawLast) len++; if (len) { /* unwind bresenham error term to first point */ doff = dashoff; err = e; if (clip1) { clipdx = abs(new_x1 - data->x1); clipdy = abs(new_y1 - data->y1); if (axis == X_AXIS) { doff += clipdx; err += e3 * clipdy + e1 * clipdx; } else { doff += clipdy; err += e3 * clipdx + e1 * clipdy; } } data->bres(drawable, gc, doff, sdx, sdy, axis, new_x1, new_y1, err, e1, e3, len); } } } void fbSegment(DrawablePtr drawable, GCPtr gc, int x1, int y1, int x2, int y2, bool drawLast, int *dashOffset) { struct fbSegment data; BoxRec box; DBG(("%s (%d, %d), (%d, %d), drawLast?=%d\n", __FUNCTION__, x1, y1, x2, y2, drawLast)); /* simple overestimate of line extents for clipping */ box.x1 = x1 - 1; box.y1 = y1 - 1; box.x2 = x2 + 1; box.y2 = y2 + 1; data.x1 = x1; data.y1 = y1; data.x2 = x2; data.y2 = y2; data.dashOffset = dashOffset; data.drawLast = drawLast; data.bres = fbSelectBres(drawable, gc); fbDrawableRunUnclipped(drawable, gc, &box, _fbSegment, &data); } void fbSegment1(DrawablePtr drawable, GCPtr gc, const BoxRec *b, int x1, int y1, int x2, int y2, bool drawLast, int *dashOffset) { struct fbSegment data; DBG(("%s (%d, %d), (%d, %d), drawLast?=%d\n", __FUNCTION__, x1, y1, x2, y2, drawLast)); data.x1 = x1; data.y1 = y1; data.x2 = x2; data.y2 = y2; data.dashOffset = dashOffset; data.drawLast = drawLast; data.bres = fbSelectBres(drawable, gc); _fbSegment(drawable, gc, b, &data); } xf86-video-intel-2.99.917/src/sna/fb/fbpointbits.h0000664000175000017500000001041712400044327016361 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #define RROP(b,a,x) WRITE((b), FbDoRRop (READ(b), (a), (x))) #define isClipped(c,ul,lr) (((c) | ((c) - (ul)) | ((lr) - (c))) & 0x80008000) static void DOTS(FbBits * dst, FbStride dstStride, int dstBpp, RegionPtr region, xPoint * ptsOrig, int npt, int xorg, int yorg, int xoff, int yoff, FbBits and, FbBits xor) { uint32_t *pts = (uint32_t *) ptsOrig; BITS *bits = (BITS *) dst; BITS bxor = (BITS) xor; BITS band = (BITS) and; FbStride bitsStride = dstStride * (sizeof(FbBits) / sizeof(BITS)); if (region->data == NULL) { INT32 ul = coordToInt(region->extents.x1 - xorg, region->extents.y1 - yorg); INT32 lr = coordToInt(region->extents.x2 - xorg - 1, region->extents.y2 - yorg - 1); bits += bitsStride * (yorg + yoff) + (xorg + xoff); if (and == 0) { while (npt >= 2) { union { uint32_t pt32[2]; uint64_t pt64; } pt; pt.pt64 = *(uint64_t *)pts; if (!isClipped(pt.pt32[0], ul, lr)) { BITS *point = bits + intToY(pt.pt32[0]) * bitsStride + intToX(pt.pt32[0]); WRITE(point, bxor); } if (!isClipped(pt.pt32[1], ul, lr)) { BITS *point = bits + intToY(pt.pt32[1]) * bitsStride + intToX(pt.pt32[1]); WRITE(point, bxor); } pts += 2; npt -= 2; } if (npt) { uint32_t pt = *pts; if (!isClipped(pt, ul, lr)) { BITS *point = bits + intToY(pt) * bitsStride + intToX(pt); WRITE(point, bxor); } } } else { while (npt--) { uint32_t pt = *pts++; if (!isClipped(pt, ul, lr)) { BITS *point = bits + intToY(pt) * bitsStride + intToX(pt); RROP(point, band, bxor); } } } } else { bits += bitsStride * yoff + xoff; if (and == 0) { while (npt--) { uint32_t pt = *pts++; int x = intToX(pt) + xorg; int y = intToY(pt) + yorg; if (RegionContainsPoint(region, x, y, NULL)) { BITS *point = bits + y * bitsStride + x; WRITE(point, bxor); } } } else { while (npt--) { uint32_t pt = *pts++; int x = intToX(pt) + xorg; int y = intToY(pt) + yorg; if (RegionContainsPoint(region, x, y, NULL)) { BITS *point = bits + y * bitsStride + x; RROP(point, band, bxor); } } } } } static void DOTS__SIMPLE(FbBits * dst, FbStride dstStride, int dstBpp, RegionPtr region, xPoint * ptsOrig, int npt, int xorg, int yorg, int xoff, int yoff, FbBits and, FbBits xor) { uint32_t *pts = (uint32_t *) ptsOrig; BITS *bits = (BITS *) dst; BITS bxor = (BITS) xor; unsigned bitsStride = dstStride * (sizeof(FbBits) / sizeof(BITS)); bits += bitsStride * (yorg + yoff) + (xorg + xoff); #if __x86_64__ while (npt >= 2) { union { uint32_t pt32[2]; uint64_t pt64; } pt; pt.pt64 = *(uint64_t *)pts; bits[intToY(pt.pt32[0]) * bitsStride + intToX(pt.pt32[0])] = bxor; bits[intToY(pt.pt32[1]) * bitsStride + intToX(pt.pt32[1])] = bxor; pts += 2; npt -= 2; } if (npt) { uint32_t pt = *pts; bits[intToY(pt) * bitsStride + intToX(pt)] = bxor; } #else while (npt--) { uint32_t pt = *pts++; bits[intToY(pt) * bitsStride + intToX(pt)] = bxor; } #endif } #undef RROP #undef isClipped xf86-video-intel-2.99.917/src/sna/fb/fbarcbits.h0000664000175000017500000001350312244635610016003 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #define isClipped(c,ul,lr) (((c) | ((c) - (ul)) | ((lr) - (c))) & 0x80008000) #define RROP(b,a,x) WRITE((b), FbDoRRop (READ(b), (a), (x))) #define ARCCOPY(d) WRITE(d,xorBits) #define ARCRROP(d) RROP(d,andBits,xorBits) static void ARC(FbBits * dst, FbStride dstStride, int dstBpp, xArc * arc, int drawX, int drawY, FbBits and, FbBits xor) { BITS *bits; FbStride bitsStride; miZeroArcRec info; Bool do360; int x; BITS *yorgp, *yorgop; BITS andBits, xorBits; int yoffset, dyoffset; int y, a, b, d, mask; int k1, k3, dx, dy; bits = (BITS *) dst; bitsStride = dstStride * (sizeof(FbBits) / sizeof(BITS)); andBits = (BITS) and; xorBits = (BITS) xor; do360 = miZeroArcSetup(arc, &info, TRUE); yorgp = bits + ((info.yorg + drawY) * bitsStride); yorgop = bits + ((info.yorgo + drawY) * bitsStride); info.xorg = (info.xorg + drawX); info.xorgo = (info.xorgo + drawX); MIARCSETUP(); yoffset = y ? bitsStride : 0; dyoffset = 0; mask = info.initialMask; if (!(arc->width & 1)) { if (andBits == 0) { if (mask & 2) ARCCOPY(yorgp + info.xorgo); if (mask & 8) ARCCOPY(yorgop + info.xorgo); } else { if (mask & 2) ARCRROP(yorgp + info.xorgo); if (mask & 8) ARCRROP(yorgop + info.xorgo); } } if (!info.end.x || !info.end.y) { mask = info.end.mask; info.end = info.altend; } if (do360 && (arc->width == arc->height) && !(arc->width & 1)) { int xoffset = bitsStride; BITS *yorghb = yorgp + (info.h * bitsStride) + info.xorg; BITS *yorgohb = yorghb - info.h; yorgp += info.xorg; yorgop += info.xorg; yorghb += info.h; while (1) { if (andBits == 0) { ARCCOPY(yorgp + yoffset + x); ARCCOPY(yorgp + yoffset - x); ARCCOPY(yorgop - yoffset - x); ARCCOPY(yorgop - yoffset + x); } else { ARCRROP(yorgp + yoffset + x); ARCRROP(yorgp + yoffset - x); ARCRROP(yorgop - yoffset - x); ARCRROP(yorgop - yoffset + x); } if (a < 0) break; if (andBits == 0) { ARCCOPY(yorghb - xoffset - y); ARCCOPY(yorgohb - xoffset + y); ARCCOPY(yorgohb + xoffset + y); ARCCOPY(yorghb + xoffset - y); } else { ARCRROP(yorghb - xoffset - y); ARCRROP(yorgohb - xoffset + y); ARCRROP(yorgohb + xoffset + y); ARCRROP(yorghb + xoffset - y); } xoffset += bitsStride; MIARCCIRCLESTEP(yoffset += bitsStride; ); } yorgp -= info.xorg; yorgop -= info.xorg; x = info.w; yoffset = info.h * bitsStride; } else if (do360) { while (y < info.h || x < info.w) { MIARCOCTANTSHIFT(dyoffset = bitsStride; ); if (andBits == 0) { ARCCOPY(yorgp + yoffset + info.xorg + x); ARCCOPY(yorgp + yoffset + info.xorgo - x); ARCCOPY(yorgop - yoffset + info.xorgo - x); ARCCOPY(yorgop - yoffset + info.xorg + x); } else { ARCRROP(yorgp + yoffset + info.xorg + x); ARCRROP(yorgp + yoffset + info.xorgo - x); ARCRROP(yorgop - yoffset + info.xorgo - x); ARCRROP(yorgop - yoffset + info.xorg + x); } MIARCSTEP(yoffset += dyoffset; , yoffset += bitsStride; ); } } else { while (y < info.h || x < info.w) { MIARCOCTANTSHIFT(dyoffset = bitsStride; ); if ((x == info.start.x) || (y == info.start.y)) { mask = info.start.mask; info.start = info.altstart; } if (andBits == 0) { if (mask & 1) ARCCOPY(yorgp + yoffset + info.xorg + x); if (mask & 2) ARCCOPY(yorgp + yoffset + info.xorgo - x); if (mask & 4) ARCCOPY(yorgop - yoffset + info.xorgo - x); if (mask & 8) ARCCOPY(yorgop - yoffset + info.xorg + x); } else { if (mask & 1) ARCRROP(yorgp + yoffset + info.xorg + x); if (mask & 2) ARCRROP(yorgp + yoffset + info.xorgo - x); if (mask & 4) ARCRROP(yorgop - yoffset + info.xorgo - x); if (mask & 8) ARCRROP(yorgop - yoffset + info.xorg + x); } if ((x == info.end.x) || (y == info.end.y)) { mask = info.end.mask; info.end = info.altend; } MIARCSTEP(yoffset += dyoffset; , yoffset += bitsStride; ); } } if ((x == info.start.x) || (y == info.start.y)) mask = info.start.mask; if (andBits == 0) { if (mask & 1) ARCCOPY(yorgp + yoffset + info.xorg + x); if (mask & 4) ARCCOPY(yorgop - yoffset + info.xorgo - x); if (arc->height & 1) { if (mask & 2) ARCCOPY(yorgp + yoffset + info.xorgo - x); if (mask & 8) ARCCOPY(yorgop - yoffset + info.xorg + x); } } else { if (mask & 1) ARCRROP(yorgp + yoffset + info.xorg + x); if (mask & 4) ARCRROP(yorgop - yoffset + info.xorgo - x); if (arc->height & 1) { if (mask & 2) ARCRROP(yorgp + yoffset + info.xorgo - x); if (mask & 8) ARCRROP(yorgop - yoffset + info.xorg + x); } } } #undef ARCCOPY #undef ARCRROP #undef RROP #undef isClipped xf86-video-intel-2.99.917/src/sna/fb/fbblt.c0000664000175000017500000002173112400044327015123 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include #include "fb.h" typedef struct _mergeRopBits { FbBits ca1, cx1, ca2, cx2; } FbMergeRopRec, *FbMergeRopPtr; #define O 0 #define I FB_ALLONES static const FbMergeRopRec FbMergeRopBits[16] = { {O, O, O, O}, /* clear 0x0 0 */ {I, O, O, O}, /* and 0x1 src AND dst */ {I, O, I, O}, /* andReverse 0x2 src AND NOT dst */ {O, O, I, O}, /* copy 0x3 src */ {I, I, O, O}, /* andInverted 0x4 NOT src AND dst */ {O, I, O, O}, /* noop 0x5 dst */ {O, I, I, O}, /* xor 0x6 src XOR dst */ {I, I, I, O}, /* or 0x7 src OR dst */ {I, I, I, I}, /* nor 0x8 NOT src AND NOT dst */ {O, I, I, I}, /* equiv 0x9 NOT src XOR dst */ {O, I, O, I}, /* invert 0xa NOT dst */ {I, I, O, I}, /* orReverse 0xb src OR NOT dst */ {O, O, I, I}, /* copyInverted 0xc NOT src */ {I, O, I, I}, /* orInverted 0xd NOT src OR dst */ {I, O, O, I}, /* nand 0xe NOT src OR NOT dst */ {O, O, O, I}, /* set 0xf 1 */ }; #undef O #undef I #define FbDeclareMergeRop() FbBits _ca1, _cx1, _ca2, _cx2; #define FbDeclarePrebuiltMergeRop() FbBits _cca, _ccx; #define FbInitializeMergeRop(alu,pm) {\ const FbMergeRopRec *_bits; \ _bits = &FbMergeRopBits[alu]; \ _ca1 = _bits->ca1 & pm; \ _cx1 = _bits->cx1 | ~pm; \ _ca2 = _bits->ca2 & pm; \ _cx2 = _bits->cx2 & pm; \ } #define InitializeShifts(sx,dx,ls,rs) { \ if (sx != dx) { \ if (sx > dx) { \ ls = sx - dx; \ rs = FB_UNIT - ls; \ } else { \ rs = dx - sx; \ ls = FB_UNIT - rs; \ } \ } \ } static void fbBlt__rop(FbBits *srcLine, FbStride srcStride, int srcX, FbBits *dstLine, FbStride dstStride, int dstX, int width, int height, int alu, FbBits pm, int bpp, Bool reverse, Bool upsidedown) { FbBits *src, *dst; int leftShift, rightShift; FbBits startmask, endmask; FbBits bits, bits1; int n, nmiddle; Bool destInvarient; int startbyte, endbyte; FbDeclareMergeRop(); FbInitializeMergeRop(alu, pm); destInvarient = FbDestInvarientMergeRop(); if (upsidedown) { srcLine += (height - 1) * (srcStride); dstLine += (height - 1) * (dstStride); srcStride = -srcStride; dstStride = -dstStride; } FbMaskBitsBytes(dstX, width, destInvarient, startmask, startbyte, nmiddle, endmask, endbyte); if (reverse) { srcLine += ((srcX + width - 1) >> FB_SHIFT) + 1; dstLine += ((dstX + width - 1) >> FB_SHIFT) + 1; srcX = (srcX + width - 1) & FB_MASK; dstX = (dstX + width - 1) & FB_MASK; } else { srcLine += srcX >> FB_SHIFT; dstLine += dstX >> FB_SHIFT; srcX &= FB_MASK; dstX &= FB_MASK; } if (srcX == dstX) { while (height--) { src = srcLine; srcLine += srcStride; dst = dstLine; dstLine += dstStride; if (reverse) { if (endmask) { bits = READ(--src); --dst; FbDoRightMaskByteMergeRop(dst, bits, endbyte, endmask); } n = nmiddle; if (destInvarient) { while (n--) WRITE(--dst, FbDoDestInvarientMergeRop(READ(--src))); } else { while (n--) { bits = READ(--src); --dst; WRITE(dst, FbDoMergeRop(bits, READ(dst))); } } if (startmask) { bits = READ(--src); --dst; FbDoLeftMaskByteMergeRop(dst, bits, startbyte, startmask); } } else { if (startmask) { bits = READ(src++); FbDoLeftMaskByteMergeRop(dst, bits, startbyte, startmask); dst++; } n = nmiddle; if (destInvarient) { while (n--) WRITE(dst++, FbDoDestInvarientMergeRop(READ(src++))); } else { while (n--) { bits = READ(src++); WRITE(dst, FbDoMergeRop(bits, READ(dst))); dst++; } } if (endmask) { bits = READ(src); FbDoRightMaskByteMergeRop(dst, bits, endbyte, endmask); } } } } else { if (srcX > dstX) { leftShift = srcX - dstX; rightShift = FB_UNIT - leftShift; } else { rightShift = dstX - srcX; leftShift = FB_UNIT - rightShift; } while (height--) { src = srcLine; srcLine += srcStride; dst = dstLine; dstLine += dstStride; bits1 = 0; if (reverse) { if (srcX < dstX) bits1 = READ(--src); if (endmask) { bits = FbScrRight(bits1, rightShift); if (FbScrRight(endmask, leftShift)) { bits1 = READ(--src); bits |= FbScrLeft(bits1, leftShift); } --dst; FbDoRightMaskByteMergeRop(dst, bits, endbyte, endmask); } n = nmiddle; if (destInvarient) { while (n--) { bits = FbScrRight(bits1, rightShift); bits1 = READ(--src); bits |= FbScrLeft(bits1, leftShift); --dst; WRITE(dst, FbDoDestInvarientMergeRop(bits)); } } else { while (n--) { bits = FbScrRight(bits1, rightShift); bits1 = READ(--src); bits |= FbScrLeft(bits1, leftShift); --dst; WRITE(dst, FbDoMergeRop(bits, READ(dst))); } } if (startmask) { bits = FbScrRight(bits1, rightShift); if (FbScrRight(startmask, leftShift)) { bits1 = READ(--src); bits |= FbScrLeft(bits1, leftShift); } --dst; FbDoLeftMaskByteMergeRop(dst, bits, startbyte, startmask); } } else { if (srcX > dstX) bits1 = READ(src++); if (startmask) { bits = FbScrLeft(bits1, leftShift); if (FbScrLeft(startmask, rightShift)) { bits1 = READ(src++); bits |= FbScrRight(bits1, rightShift); } FbDoLeftMaskByteMergeRop(dst, bits, startbyte, startmask); dst++; } n = nmiddle; if (destInvarient) { while (n--) { bits = FbScrLeft(bits1, leftShift); bits1 = READ(src++); bits |= FbScrRight(bits1, rightShift); WRITE(dst, FbDoDestInvarientMergeRop(bits)); dst++; } } else { while (n--) { bits = FbScrLeft(bits1, leftShift); bits1 = READ(src++); bits |= FbScrRight(bits1, rightShift); WRITE(dst, FbDoMergeRop(bits, READ(dst))); dst++; } } if (endmask) { bits = FbScrLeft(bits1, leftShift); if (FbScrLeft(endmask, rightShift)) { bits1 = READ(src); bits |= FbScrRight(bits1, rightShift); } FbDoRightMaskByteMergeRop(dst, bits, endbyte, endmask); } } } } } void fbBlt(FbBits *srcLine, FbStride srcStride, int srcX, FbBits *dstLine, FbStride dstStride, int dstX, int width, int height, int alu, FbBits pm, int bpp, Bool reverse, Bool upsidedown) { DBG(("%s %dx%d, alu=%d, pm=%x, bpp=%d (reverse=%d, upsidedown=%d)\n", __FUNCTION__, width, height, alu, pm, bpp, reverse, upsidedown)); if (alu == GXcopy && pm == FB_ALLONES && ((srcX|dstX|width) & 7) == 0) { CARD8 *s = (CARD8 *) srcLine; CARD8 *d = (CARD8 *) dstLine; void *(*func)(void *, const void *, size_t); int i; srcStride *= sizeof(FbBits); dstStride *= sizeof(FbBits); width >>= 3; s += srcX >> 3; d += dstX >> 3; DBG(("%s fast blt, src_stride=%d, dst_stride=%d, width=%d (offset=%ld)\n", __FUNCTION__, srcStride, dstStride, width, (long)(s - d))); if (width == srcStride && width == dstStride) { width *= height; height = 1; } if ((s < d && s + width > d) || (d < s && d + width > s)) func = memmove; else func = memcpy; if (!upsidedown) { for (i = 0; i < height; i++) func(d + i * dstStride, s + i * srcStride, width); } else { for (i = height; i--; ) func(d + i * dstStride, s + i * srcStride, width); } return; } fbBlt__rop(srcLine, srcStride, srcX, dstLine, dstStride, dstX, width, height, alu, pm, bpp, reverse, upsidedown); } xf86-video-intel-2.99.917/src/sna/fb/fb.h0000664000175000017500000004122612444634673014450 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #ifndef FB_H #define FB_H #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include #include "sfb.h" #include "../../compat-api.h" #include "../debug.h" #define WRITE(ptr, val) (*(ptr) = (val)) #define READ(ptr) (*(ptr)) /* * This single define controls the basic size of data manipulated * by this software; it must be log2(sizeof (FbBits) * 8) */ #define FB_SHIFT LOG2_BITMAP_PAD #define FB_UNIT (1 << FB_SHIFT) #define FB_HALFUNIT (1 << (FB_SHIFT-1)) #define FB_MASK (FB_UNIT - 1) #define FB_ALLONES ((FbBits) -1) #if IMAGE_BYTE_ORDER != LSBFirst #error "IMAGE_BYTE_ORDER must be LSBFirst" #endif #if GLYPHPADBYTES != 4 #error "GLYPHPADBYTES must be 4" #endif #if FB_SHIFT != 5 #error "FB_SHIFT ala LOG2_BITMAP_PAD must be 5" #endif #define FB_STIP_SHIFT LOG2_BITMAP_PAD #define FB_STIP_UNIT (1 << FB_STIP_SHIFT) #define FB_STIP_MASK (FB_STIP_UNIT - 1) #define FB_STIP_ALLONES ((FbStip) -1) #define FbFullMask(n) ((n) == FB_UNIT ? FB_ALLONES : ((((FbBits) 1) << n) - 1)) typedef uint32_t FbBits; typedef FbBits FbStip; typedef int FbStride; #include "fbrop.h" #define FbScrLeft(x,n) ((x) >> (n)) #define FbScrRight(x,n) ((x) << (n)) /* #define FbLeftBits(x,n) ((x) & ((((FbBits) 1) << (n)) - 1)) */ #define FbLeftStipBits(x,n) ((x) & ((((FbStip) 1) << (n)) - 1)) #define FbStipMoveLsb(x,s,n) (FbStipRight (x,(s)-(n))) #define FbPatternOffsetBits 0 #define FbStipLeft(x,n) FbScrLeft(x,n) #define FbStipRight(x,n) FbScrRight(x,n) #define FbRotLeft(x,n) FbScrLeft(x,n) | (n ? FbScrRight(x,FB_UNIT-n) : 0) #define FbRotRight(x,n) FbScrRight(x,n) | (n ? FbScrLeft(x,FB_UNIT-n) : 0) #define FbRotStipLeft(x,n) FbStipLeft(x,n) | (n ? FbStipRight(x,FB_STIP_UNIT-n) : 0) #define FbRotStipRight(x,n) FbStipRight(x,n) | (n ? FbStipLeft(x,FB_STIP_UNIT-n) : 0) #define FbLeftMask(x) ( ((x) & FB_MASK) ? \ FbScrRight(FB_ALLONES,(x) & FB_MASK) : 0) #define FbRightMask(x) ( ((FB_UNIT - (x)) & FB_MASK) ? \ FbScrLeft(FB_ALLONES,(FB_UNIT - (x)) & FB_MASK) : 0) #define FbLeftStipMask(x) ( ((x) & FB_STIP_MASK) ? \ FbStipRight(FB_STIP_ALLONES,(x) & FB_STIP_MASK) : 0) #define FbRightStipMask(x) ( ((FB_STIP_UNIT - (x)) & FB_STIP_MASK) ? \ FbScrLeft(FB_STIP_ALLONES,(FB_STIP_UNIT - (x)) & FB_STIP_MASK) : 0) #define FbBitsMask(x,w) (FbScrRight(FB_ALLONES,(x) & FB_MASK) & \ FbScrLeft(FB_ALLONES,(FB_UNIT - ((x) + (w))) & FB_MASK)) #define FbStipMask(x,w) (FbStipRight(FB_STIP_ALLONES,(x) & FB_STIP_MASK) & \ FbStipLeft(FB_STIP_ALLONES,(FB_STIP_UNIT - ((x)+(w))) & FB_STIP_MASK)) #define FbMaskBits(x,w,l,n,r) { \ n = (w); \ r = FbRightMask((x)+n); \ l = FbLeftMask(x); \ if (l) { \ n -= FB_UNIT - ((x) & FB_MASK); \ if (n < 0) { \ n = 0; \ l &= r; \ r = 0; \ } \ } \ n >>= FB_SHIFT; \ } #define FbByteMaskInvalid 0x10 #define FbPatternOffset(o,t) ((o) ^ (FbPatternOffsetBits & ~(sizeof (t) - 1))) #define FbPtrOffset(p,o,t) ((t *) ((CARD8 *) (p) + (o))) #define FbSelectPatternPart(xor,o,t) ((xor) >> (FbPatternOffset (o,t) << 3)) #define FbStorePart(dst,off,t,xor) (WRITE(FbPtrOffset(dst,off,t), \ FbSelectPart(xor,off,t))) #ifndef FbSelectPart #define FbSelectPart(x,o,t) FbSelectPatternPart(x,o,t) #endif #define FbMaskBitsBytes(x,w,copy,l,lb,n,r,rb) { \ n = (w); \ lb = 0; \ rb = 0; \ r = FbRightMask((x)+n); \ if (r) { \ /* compute right byte length */ \ if ((copy) && (((x) + n) & 7) == 0) { \ rb = (((x) + n) & FB_MASK) >> 3; \ } else { \ rb = FbByteMaskInvalid; \ } \ } \ l = FbLeftMask(x); \ if (l) { \ /* compute left byte length */ \ if ((copy) && ((x) & 7) == 0) { \ lb = ((x) & FB_MASK) >> 3; \ } else { \ lb = FbByteMaskInvalid; \ } \ /* subtract out the portion painted by leftMask */ \ n -= FB_UNIT - ((x) & FB_MASK); \ if (n < 0) { \ if (lb != FbByteMaskInvalid) { \ if (rb == FbByteMaskInvalid) { \ lb = FbByteMaskInvalid; \ } else if (rb) { \ lb |= (rb - lb) << (FB_SHIFT - 3); \ rb = 0; \ } \ } \ n = 0; \ l &= r; \ r = 0; \ }\ } \ n >>= FB_SHIFT; \ } #define FbDoLeftMaskByteRRop(dst,lb,l,and,xor) { \ switch (lb) { \ case (sizeof (FbBits) - 3) | (1 << (FB_SHIFT - 3)): \ FbStorePart(dst,sizeof (FbBits) - 3,CARD8,xor); \ break; \ case (sizeof (FbBits) - 3) | (2 << (FB_SHIFT - 3)): \ FbStorePart(dst,sizeof (FbBits) - 3,CARD8,xor); \ FbStorePart(dst,sizeof (FbBits) - 2,CARD8,xor); \ break; \ case (sizeof (FbBits) - 2) | (1 << (FB_SHIFT - 3)): \ FbStorePart(dst,sizeof (FbBits) - 2,CARD8,xor); \ break; \ case sizeof (FbBits) - 3: \ FbStorePart(dst,sizeof (FbBits) - 3,CARD8,xor); \ case sizeof (FbBits) - 2: \ FbStorePart(dst,sizeof (FbBits) - 2,CARD16,xor); \ break; \ case sizeof (FbBits) - 1: \ FbStorePart(dst,sizeof (FbBits) - 1,CARD8,xor); \ break; \ default: \ WRITE(dst, FbDoMaskRRop(READ(dst), and, xor, l)); \ break; \ } \ } #define FbDoRightMaskByteRRop(dst,rb,r,and,xor) { \ switch (rb) { \ case 1: \ FbStorePart(dst,0,CARD8,xor); \ break; \ case 2: \ FbStorePart(dst,0,CARD16,xor); \ break; \ case 3: \ FbStorePart(dst,0,CARD16,xor); \ FbStorePart(dst,2,CARD8,xor); \ break; \ default: \ WRITE(dst, FbDoMaskRRop (READ(dst), and, xor, r)); \ } \ } #define FbMaskStip(x,w,l,n,r) { \ n = (w); \ r = FbRightStipMask((x)+n); \ l = FbLeftStipMask(x); \ if (l) { \ n -= FB_STIP_UNIT - ((x) & FB_STIP_MASK); \ if (n < 0) { \ n = 0; \ l &= r; \ r = 0; \ } \ } \ n >>= FB_STIP_SHIFT; \ } /* * These macros are used to transparently stipple * in copy mode; the expected usage is with 'n' constant * so all of the conditional parts collapse into a minimal * sequence of partial word writes * * 'n' is the bytemask of which bytes to store, 'a' is the address * of the FbBits base unit, 'o' is the offset within that unit * * The term "lane" comes from the hardware term "byte-lane" which */ #define FbLaneCase1(n,a,o) \ if ((n) == 0x01) { \ WRITE((CARD8 *) ((a)+FbPatternOffset(o,CARD8)), fgxor); \ } #define FbLaneCase2(n,a,o) \ if ((n) == 0x03) { \ WRITE((CARD16 *) ((a)+FbPatternOffset(o,CARD16)), fgxor); \ } else { \ FbLaneCase1((n)&1,a,o) \ FbLaneCase1((n)>>1,a,(o)+1) \ } #define FbLaneCase4(n,a,o) \ if ((n) == 0x0f) { \ WRITE((CARD32 *) ((a)+FbPatternOffset(o,CARD32)), fgxor); \ } else { \ FbLaneCase2((n)&3,a,o) \ FbLaneCase2((n)>>2,a,(o)+2) \ } #define FbLaneCase(n,a) FbLaneCase4(n,(CARD8 *) (a),0) typedef struct { long changes; long serial; GCFuncs *old_funcs; void *priv; FbBits and, xor; /* reduced rop values */ FbBits bgand, bgxor; /* for stipples */ FbBits fg, bg, pm; /* expanded and filled */ unsigned int dashLength; /* total of all dash elements */ unsigned char evenStipple; /* stipple is even */ unsigned char bpp; /* current drawable bpp */ } FbGCPrivate, *FbGCPrivPtr; extern DevPrivateKeyRec sna_gc_key; extern DevPrivateKeyRec sna_window_key; static inline FbGCPrivate *fb_gc(GCPtr gc) { return (FbGCPrivate *)__get_private(gc, sna_gc_key); } static inline PixmapPtr fbGetWindowPixmap(WindowPtr window) { return *(PixmapPtr *)__get_private(window, sna_window_key); } #ifdef ROOTLESS #define __fbPixDrawableX(p) ((p)->drawable.x) #define __fbPixDrawableY(p) ((p)->drawable.y) #else #define __fbPixDrawableX(p) 0 #define __fbPixDrawableY(p) 0 #endif #ifdef COMPOSITE #define __fbPixOffXWin(p) (__fbPixDrawableX(p) - (p)->screen_x) #define __fbPixOffYWin(p) (__fbPixDrawableY(p) - (p)->screen_y) #else #define __fbPixOffXWin(p) (__fbPixDrawableX(p)) #define __fbPixOffYWin(p) (__fbPixDrawableY(p)) #endif #define __fbPixOffXPix(p) (__fbPixDrawableX(p)) #define __fbPixOffYPix(p) (__fbPixDrawableY(p)) #define fbGetDrawablePixmap(drawable, pixmap, xoff, yoff) { \ if ((drawable)->type != DRAWABLE_PIXMAP) { \ (pixmap) = fbGetWindowPixmap((WindowPtr)drawable); \ (xoff) = __fbPixOffXWin(pixmap); \ (yoff) = __fbPixOffYWin(pixmap); \ } else { \ (pixmap) = (PixmapPtr) (drawable); \ (xoff) = __fbPixOffXPix(pixmap); \ (yoff) = __fbPixOffYPix(pixmap); \ } \ } #define fbGetPixmapBitsData(pixmap, pointer, stride, bpp) { \ (pointer) = (FbBits *) (pixmap)->devPrivate.ptr; \ (stride) = ((int) (pixmap)->devKind) / sizeof (FbBits); (void)(stride);\ (bpp) = (pixmap)->drawable.bitsPerPixel; (void)(bpp); \ } #define fbGetPixmapStipData(pixmap, pointer, stride, bpp) { \ (pointer) = (FbStip *) (pixmap)->devPrivate.ptr; \ (stride) = ((int) (pixmap)->devKind) / sizeof (FbStip); (void)(stride);\ (bpp) = (pixmap)->drawable.bitsPerPixel; (void)(bpp); \ } #define fbGetDrawable(drawable, pointer, stride, bpp, xoff, yoff) { \ PixmapPtr _pPix; \ fbGetDrawablePixmap(drawable, _pPix, xoff, yoff); \ fbGetPixmapBitsData(_pPix, pointer, stride, bpp); \ } #define fbGetStipDrawable(drawable, pointer, stride, bpp, xoff, yoff) { \ PixmapPtr _pPix; \ fbGetDrawablePixmap(drawable, _pPix, xoff, yoff); \ fbGetPixmapStipData(_pPix, pointer, stride, bpp); \ } /* * XFree86 empties the root BorderClip when the VT is inactive, * here's a macro which uses that to disable GetImage and GetSpans */ #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,10,0,0,0) #define fbWindowEnabled(pWin) \ RegionNotEmpty(&(pWin)->drawable.pScreen->root->borderClip) #else #define fbWindowEnabled(pWin) \ RegionNotEmpty(&WindowTable[(pWin)->drawable.pScreen->myNum]->borderClip) #endif #define fbDrawableEnabled(drawable) \ ((drawable)->type == DRAWABLE_PIXMAP ? \ TRUE : fbWindowEnabled((WindowPtr) drawable)) #define FbPowerOfTwo(w) (((w) & ((w) - 1)) == 0) /* * Accelerated tiles are power of 2 width <= FB_UNIT */ #define FbEvenTile(w) ((w) <= FB_UNIT && FbPowerOfTwo(w)) /* * Accelerated stipples are power of 2 width and <= FB_UNIT/dstBpp * with dstBpp a power of 2 as well */ #define FbEvenStip(w,bpp) ((w) * (bpp) <= FB_UNIT && FbPowerOfTwo(w) && FbPowerOfTwo(bpp)) inline static int16_t fbBound(int16_t a, uint16_t b) { int v = (int)a + (int)b; if (v > MAXSHORT) return MAXSHORT; return v; } extern void fbPolyArc(DrawablePtr drawable, GCPtr gc, int narcs, xArc * parcs); extern void fbBlt(FbBits *src, FbStride srcStride, int srcX, FbBits *dst, FbStride dstStride, int dstX, int width, int height, int alu, FbBits pm, int bpp, Bool reverse, Bool upsidedown); #if FB_STIP_SHIFT == FB_SHIFT static inline void fbBltStip(FbStip *src, FbStride srcStride, int srcX, FbStip *dst, FbStride dstStride, int dstX, int width, int height, int alu, FbBits pm, int bpp) { fbBlt((FbBits *)src, srcStride, srcX, (FbBits *)dst, dstStride, dstX, width, height, alu, pm, bpp, FALSE, FALSE); } #else #error FB_STIP_SHIFT must equal FB_SHIFT #endif extern void fbBltOne(FbStip *src, FbStride srcStride, int srcX, FbBits *dst, FbStride dstStride, int dstX, int dstBpp, int width, int height, FbBits fgand, FbBits fbxor, FbBits bgand, FbBits bgxor); extern void fbBltPlane(FbBits *src, FbStride srcStride, int srcX, int srcBpp, FbStip *dst, FbStride dstStride, int dstX, int width, int height, FbStip fgand, FbStip fgxor, FbStip bgand, FbStip bgxor, Pixel planeMask); extern void fbCopyNtoN(DrawablePtr src, DrawablePtr dst, GCPtr gc, BoxPtr pbox, int nbox, int dx, int dy, Bool reverse, Bool upsidedown, Pixel bitplane, void *closure); extern void fbCopy1toN(DrawablePtr src, DrawablePtr dst, GCPtr gc, BoxPtr pbox, int nbox, int dx, int dy, Bool reverse, Bool upsidedown, Pixel bitplane, void *closure); extern void fbCopyNto1(DrawablePtr src, DrawablePtr dst, GCPtr gc, BoxPtr pbox, int nbox, int dx, int dy, Bool reverse, Bool upsidedown, Pixel bitplane, void *closure); extern RegionPtr fbCopyArea(DrawablePtr src, DrawablePtr dst, GCPtr gc, int sx, int sy, int width, int height, int dx, int dy); extern RegionPtr fbCopyPlane(DrawablePtr src, DrawablePtr dst, GCPtr gc, int sx, int sy, int width, int height, int dx, int dy, unsigned long bitplane); extern void fbFill(DrawablePtr drawable, GCPtr gc, int x, int y, int width, int height); extern void fbSolidBoxClipped(DrawablePtr drawable, GCPtr gc, int x1, int y1, int x2, int y2); extern void fbPolyFillRect(DrawablePtr drawable, GCPtr gc, int n, xRectangle *rec); extern void fbFillSpans(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int fSorted); extern void fbPadPixmap(PixmapPtr pPixmap); extern void fbValidateGC(GCPtr gc, unsigned long changes, DrawablePtr drawable); extern void fbGetSpans(DrawablePtr drawable, int wMax, DDXPointPtr pt, int *width, int n, char *dst); extern void fbPolyGlyphBlt(DrawablePtr drawable, GCPtr gc, int x, int y, unsigned int n, CharInfoPtr *info, pointer glyphs); extern void fbImageGlyphBlt(DrawablePtr drawable, GCPtr gc, int x, int y, unsigned int n, CharInfoPtr *info, pointer glyphs); extern void fbPutImage(DrawablePtr drawable, GCPtr gc, int depth, int x, int y, int w, int h, int leftPad, int format, char *image); extern void fbPutXYImage(DrawablePtr drawable, GCPtr gc, FbBits fg, FbBits bg, FbBits pm, int alu, Bool opaque, int x, int y, int width, int height, FbStip * src, FbStride srcStride, int srcX); extern void fbGetImage(DrawablePtr drawable, int x, int y, int w, int h, unsigned int format, unsigned long planeMask, char *d); extern void fbPolyLine(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt); extern void fbFixCoordModePrevious(int n, DDXPointPtr pt); extern void fbPolySegment(DrawablePtr drawable, GCPtr gc, int n, xSegment *seg); extern RegionPtr fbBitmapToRegion(PixmapPtr pixmap); extern void fbPolyPoint(DrawablePtr drawable, GCPtr gc, int mode, int n, xPoint *pt, unsigned flags); extern void fbPushImage(DrawablePtr drawable, GCPtr gc, FbStip *src, FbStride srcStride, int srcX, int x, int y, int width, int height); extern void fbPushPixels(GCPtr gc, PixmapPtr pBitmap, DrawablePtr drawable, int dx, int dy, int xOrg, int yOrg); extern void fbSetSpans(DrawablePtr drawable, GCPtr gc, char *src, DDXPointPtr pt, int *width, int n, int fSorted); extern void fbSegment(DrawablePtr drawable, GCPtr gc, int xa, int ya, int xb, int yb, bool drawLast, int *dashOffset); extern void fbSegment1(DrawablePtr drawable, GCPtr gc, const BoxRec *clip, int xa, int ya, int xb, int yb, bool drawLast, int *dashOffset); extern void fbTransparentSpan(FbBits * dst, FbBits stip, FbBits fgxor, int n); extern void fbStipple(FbBits *dst, FbStride dstStride, int dstX, int dstBpp, int width, int height, FbStip *stip, FbStride stipStride, int stipWidth, int stipHeight, Bool even, FbBits fgand, FbBits fgxor, FbBits bgand, FbBits bgxor, int xRot, int yRot); extern void fbTile(FbBits *dst, FbStride dstStride, int dstX, int width, int height, FbBits *tile, FbStride tileStride, int tileWidth, int tileHeight, int alu, FbBits pm, int bpp, int xRot, int yRot); extern FbBits fbReplicatePixel(Pixel p, int bpp); #endif /* FB_H */ xf86-video-intel-2.99.917/src/sna/fb/fbbitmap.c0000664000175000017500000001172412400044327015617 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include #include "fb.h" static Bool region_grow(RegionPtr region) { RegDataPtr data; int n; n = 16; if (!region->data) { region->data = malloc(RegionSizeof(n)); if (!region->data) return RegionBreak(region); region->data->numRects = 1; *RegionBoxptr(region) = region->extents; } else if (!region->data->size) { region->data = malloc(RegionSizeof(n)); if (!region->data) return RegionBreak(region); region->data->numRects = 0; } else { n = 2 * region->data->numRects; data = (RegDataPtr) realloc(region->data, RegionSizeof(n)); if (!data) return RegionBreak(region); region->data = data; } region->data->size = n; return TRUE; } static inline void add(RegionPtr region, int16_t x1, int16_t y1, int16_t x2, int16_t y2) { BoxPtr r; if (region->data->numRects == region->data->size && !region_grow(region)) return; r = RegionBoxptr(region) + region->data->numRects++; r->x1 = x1; r->y1 = y1; r->x2 = x2; r->y2 = y2; DBG(("%s[%ld/%ld]: (%d, %d), (%d, %d)\n", __FUNCTION__, (long)region->data->numRects, (long)region->data->size, x1, y1, x2, y2)); if (x1 < region->extents.x1) region->extents.x1 = x1; if (x2 > region->extents.x2) region->extents.x2 = x2; } #define MASK_0 (FB_ALLONES & ~FbScrRight(FB_ALLONES, 1)) /* Convert bitmap clip mask into clipping region. * First, goes through each line and makes boxes by noting the transitions * from 0 to 1 and 1 to 0. * Then it coalesces the current line with the previous if they have boxes * at the same X coordinates. */ RegionPtr fbBitmapToRegion(PixmapPtr pixmap) { FbBits maskw; register RegionPtr region; const FbBits *bits, *line, *end; int width, y1, y2, base, x1; int stride, i; DBG(("%s bitmap=%dx%d\n", __FUNCTION__, pixmap->drawable.width, pixmap->drawable.height)); region = RegionCreate(NULL, 1); if (!region) return NullRegion; line = (FbBits *) pixmap->devPrivate.ptr; stride = pixmap->devKind >> (FB_SHIFT - 3); width = pixmap->drawable.width; maskw = 0; if (width & 7) maskw = FB_ALLONES & ~FbScrRight(FB_ALLONES, width & FB_MASK); region->extents.x1 = width; region->extents.x2 = 0; y2 = 0; while (y2 < pixmap->drawable.height) { y1 = y2++; bits = line; line += stride; while (y2 < pixmap->drawable.height && memcmp(bits, line, width >> 3) == 0 && (maskw == 0 || (bits[width >> FB_SHIFT] & maskw) == (line[width >> FB_SHIFT] & maskw))) line += stride, y2++; if (READ(bits) & MASK_0) x1 = 0; else x1 = -1; /* Process all words which are fully in the pixmap */ end = bits + (width >> FB_SHIFT); for (base = 0; bits < end; base += FB_UNIT) { FbBits w = READ(bits++); if (x1 < 0) { if (!w) continue; } else { if (!~w) continue; } for (i = 0; i < FB_UNIT; i++) { if (w & MASK_0) { if (x1 < 0) x1 = base + i; } else { if (x1 >= 0) { add(region, x1, y1, base + i, y2); x1 = -1; } } w = FbScrLeft(w, 1); } } if (width & FB_MASK) { FbBits w = READ(bits++); for (i = 0; i < (width & FB_MASK); i++) { if (w & MASK_0) { if (x1 < 0) x1 = base + i; } else { if (x1 >= 0) { add(region, x1, y1, base + i, y2); x1 = -1; } } w = FbScrLeft(w, 1); } } if (x1 >= 0) add(region, x1, y1, width, y2); } if (region->data->numRects) { region->extents.y1 = RegionBoxptr(region)->y1; region->extents.y2 = RegionEnd(region)->y2; if (region->data->numRects == 1) { free(region->data); region->data = NULL; } } else region->extents.x1 = region->extents.x2 = 0; DBG(("%s: region extents=(%d, %d), (%d, %d) x %d\n", __FUNCTION__, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, region_num_rects(region))); return region; } xf86-video-intel-2.99.917/src/sna/fb/fbpict.h0000664000175000017500000000343012400044327015302 00000000000000/* * Copyright © 2000 Keith Packard, member of The XFree86 Project, Inc. * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #ifndef FBPICT_H #define FBPICT_H #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include "sfb.h" extern void fbComposite(CARD8 op, PicturePtr pSrc, PicturePtr pMask, PicturePtr pDst, INT16 xSrc, INT16 ySrc, INT16 xMask, INT16 yMask, INT16 xDst, INT16 yDst, CARD16 width, CARD16 height); extern pixman_image_t *image_from_pict(PicturePtr pict, Bool has_clip, int *xoff, int *yoff); extern void free_pixman_pict(PicturePtr, pixman_image_t *); #endif /* FBPICT_H */ xf86-video-intel-2.99.917/src/sna/fb/fblinebits.h0000664000175000017500000001737512400044327016171 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #define isClipped(c,ul,lr) (((c) | ((c) - (ul)) | ((lr) - (c))) & 0x80008000) #define RROP(b,a,x) WRITE((b), FbDoRRop (READ(b), (a), (x))) static void POLYLINE(DrawablePtr drawable, GCPtr gc, int mode, int n_0, DDXPointPtr pt_0) { int xoff = drawable->x; int yoff = drawable->y; unsigned int bias = miGetZeroLineBias(drawable->pScreen); const BoxRec *clip = region_rects(gc->pCompositeClip); const BoxRec *const last_clip = clip + region_num_rects(gc->pCompositeClip); FbBits *dst; int dstStride; int dstBpp; int dstXoff, dstYoff; BITS *bits, *bitsBase; FbStride bitsStride; BITS xor = fb_gc(gc)->xor; BITS and = fb_gc(gc)->and; int e, e1, e3, len; int stepmajor, stepminor; int octant; if (mode == CoordModePrevious) fbFixCoordModePrevious(n_0, pt_0); fbGetDrawable(drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); bitsStride = dstStride * (sizeof(FbBits) / sizeof(BITS)); bitsBase = ((BITS *) dst) + (yoff + dstYoff) * bitsStride + (xoff + dstXoff); DBG(("%s: processing %ld clip boxes\n", __FUNCTION__, (long)(last_clip - clip))); do { INT32 *pt = (INT32 *)pt_0; int n = n_0; INT32 pt1, pt2; INT32 ul = coordToInt(clip->x1 - xoff, clip->y1 - yoff); INT32 lr = coordToInt(clip->x2 - xoff - 1, clip->y2 - yoff - 1); DBG(("%s: clip box=(%d, %d), (%d, %d)\n", __FUNCTION__, clip->x1, clip->y1, clip->x2, clip->y2)); pt1 = *pt++; n--; pt2 = *pt++; n--; for (;;) { if (isClipped(pt1, ul, lr) | isClipped(pt2, ul, lr)) { int dashoffset = 0; fbSegment1(drawable, gc, clip, intToX(pt1) + xoff, intToY(pt1) + yoff, intToX(pt2) + xoff, intToY(pt2) + yoff, n == 0 && gc->capStyle != CapNotLast, &dashoffset); if (!n) goto next_clip; pt1 = pt2; pt2 = *pt++; n--; } else { bits = bitsBase + intToY(pt1) * bitsStride + intToX(pt1); for (;;) { CalcLineDeltas(intToX(pt1), intToY(pt1), intToX(pt2), intToY(pt2), len, e1, stepmajor, stepminor, 1, bitsStride, octant); if (len < e1) { e3 = len; len = e1; e1 = e3; e3 = stepminor; stepminor = stepmajor; stepmajor = e3; SetYMajorOctant(octant); } e = -len; e1 <<= 1; e3 = e << 1; FIXUP_ERROR(e, octant, bias); if (and == 0) { while (len--) { WRITE(bits, xor); bits += stepmajor; e += e1; if (e >= 0) { bits += stepminor; e += e3; } } } else { while (len--) { RROP(bits, and, xor); bits += stepmajor; e += e1; if (e >= 0) { bits += stepminor; e += e3; } } } if (!n) { if (gc->capStyle != CapNotLast && pt2 != *((INT32 *)pt_0)) { RROP(bits, and, xor); } goto next_clip; } pt1 = pt2; pt2 = *pt++; --n; if (isClipped(pt2, ul, lr)) break; } } } next_clip: (void)clip; } while (++clip != last_clip); } static void POLYSEGMENT(DrawablePtr drawable, GCPtr gc, int n_0, xSegment *seg_0) { int xoff = drawable->x; int yoff = drawable->y; unsigned int bias = miGetZeroLineBias(drawable->pScreen); const BoxRec *clip = region_rects(gc->pCompositeClip); const BoxRec *const last_clip = clip + region_num_rects(gc->pCompositeClip); FbBits *dst; int dstStride; int dstBpp; int dstXoff, dstYoff; BITS *bits, *bitsBase; FbStride bitsStride; FbBits xor = fb_gc(gc)->xor; FbBits and = fb_gc(gc)->and; int e, e1, e3, len; int stepmajor, stepminor; int octant; bool capNotLast = gc->capStyle == CapNotLast; fbGetDrawable(drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); bitsStride = dstStride * (sizeof(FbBits) / sizeof(BITS)); bitsBase = ((BITS *) dst) + (yoff + dstYoff) * bitsStride + (xoff + dstXoff); DBG(("%s: processing %ld clip boxes\n", __FUNCTION__, (long)(last_clip - clip))); do { INT32 ul = coordToInt(clip->x1 - xoff, clip->y1 - yoff); INT32 lr = coordToInt(clip->x2 - xoff - 1, clip->y2 - yoff - 1); uint64_t *pt = (uint64_t *)seg_0; int n = n_0; DBG(("%s: clip box=(%d, %d), (%d, %d)\n", __FUNCTION__, clip->x1, clip->y1, clip->x2, clip->y2)); while (n--) { union { int32_t pt32[2]; uint64_t pt64; } u; u.pt64 = *pt++; if (isClipped(u.pt32[0], ul, lr) | isClipped(u.pt32[1], ul, lr)) { int dashoffset = 0; fbSegment1(drawable, gc, clip, intToX(u.pt32[0]) + xoff, intToY(u.pt32[0]) + yoff, intToX(u.pt32[1]) + xoff, intToY(u.pt32[1]) + yoff, !capNotLast, &dashoffset); } else { CalcLineDeltas(intToX(u.pt32[0]), intToY(u.pt32[0]), intToX(u.pt32[1]), intToY(u.pt32[1]), len, e1, stepmajor, stepminor, 1, bitsStride, octant); if (e1 == 0 && len > 3) { int x1, x2; FbBits *dstLine; int dstX, width; FbBits startmask, endmask; int nmiddle; if (stepmajor < 0) { x1 = intToX(u.pt32[1]); x2 = intToX(u.pt32[0]) + 1; if (capNotLast) x1++; } else { x1 = intToX(u.pt32[0]); x2 = intToX(u.pt32[1]); if (!capNotLast) x2++; } dstX = (x1 + xoff + dstXoff) * (sizeof(BITS) * 8); width = (x2 - x1) * (sizeof(BITS) * 8); dstLine = dst + (intToY(u.pt32[0]) + yoff + dstYoff) * dstStride; dstLine += dstX >> FB_SHIFT; dstX &= FB_MASK; FbMaskBits(dstX, width, startmask, nmiddle, endmask); if (startmask) { WRITE(dstLine, FbDoMaskRRop(READ(dstLine), and, xor, startmask)); dstLine++; } if (!and) while (nmiddle--) WRITE(dstLine++, xor); else while (nmiddle--) { WRITE(dstLine, FbDoRRop(READ(dstLine), and, xor)); dstLine++; } if (endmask) WRITE(dstLine, FbDoMaskRRop(READ(dstLine), and, xor, endmask)); } else { bits = bitsBase + intToY(u.pt32[0]) * bitsStride + intToX(u.pt32[0]); if (len < e1) { e3 = len; len = e1; e1 = e3; e3 = stepminor; stepminor = stepmajor; stepmajor = e3; SetYMajorOctant(octant); } e = -len; e1 <<= 1; e3 = e << 1; FIXUP_ERROR(e, octant, bias); if (!capNotLast) len++; if (and == 0) { while (len--) { WRITE(bits, xor); bits += stepmajor; e += e1; if (e >= 0) { bits += stepminor; e += e3; } } } else { while (len--) { RROP(bits, and, xor); bits += stepmajor; e += e1; if (e >= 0) { bits += stepminor; e += e3; } } } } } } } while (++clip != last_clip); } #undef RROP #undef isClipped xf86-video-intel-2.99.917/src/sna/fb/README0000664000175000017500000000010312244635610014543 00000000000000Note this code is intended to live inside pixman in the long term. xf86-video-intel-2.99.917/src/sna/fb/fbstipple.c0000664000175000017500000001376012244635610016034 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" /* * This is a slight abuse of the preprocessor to generate repetitive * code, the idea is to generate code for each case of a copy-mode * transparent stipple */ #define LaneCases1(c,a) \ case c: while (n--) { FbLaneCase(c,a); a++; } break #define LaneCases2(c,a) LaneCases1(c,a); LaneCases1(c+1,a) #define LaneCases4(c,a) LaneCases2(c,a); LaneCases2(c+2,a) #define LaneCases8(c,a) LaneCases4(c,a); LaneCases4(c+4,a) #define LaneCases16(c,a) LaneCases8(c,a); LaneCases8(c+8,a) #define LaneCases(a) LaneCases16(0,a) /* * Repeat a transparent stipple across a scanline n times */ void fbTransparentSpan(FbBits * dst, FbBits stip, FbBits fgxor, int n) { FbStip s; s = ((FbStip) (stip) & 0x01); s |= ((FbStip) (stip >> 8) & 0x02); s |= ((FbStip) (stip >> 16) & 0x04); s |= ((FbStip) (stip >> 24) & 0x08); switch (s) { LaneCases(dst); } } static void fbEvenStipple(FbBits *dst, FbStride dstStride, int dstX, int dstBpp, int width, int height, FbStip *stip, FbStride stipStride, int stipHeight, FbBits fgand, FbBits fgxor, FbBits bgand, FbBits bgxor, int xRot, int yRot) { FbBits startmask, endmask; FbBits mask, and, xor; int nmiddle, n; FbStip *s, *stipEnd, bits; int rot, stipX, stipY; int pixelsPerDst; const FbBits *fbBits; Bool transparent; int startbyte, endbyte; /* * Check for a transparent stipple (stencil) */ transparent = FALSE; if (dstBpp >= 8 && fgand == 0 && bgand == FB_ALLONES && bgxor == 0) transparent = TRUE; pixelsPerDst = FB_UNIT / dstBpp; /* * Adjust dest pointers */ dst += dstX >> FB_SHIFT; dstX &= FB_MASK; FbMaskBitsBytes(dstX, width, fgand == 0 && bgand == 0, startmask, startbyte, nmiddle, endmask, endbyte); if (startmask) dstStride--; dstStride -= nmiddle; xRot *= dstBpp; /* * Compute stip start scanline and rotation parameters */ stipEnd = stip + stipStride * stipHeight; modulus(-yRot, stipHeight, stipY); s = stip + stipStride * stipY; modulus(-xRot, FB_UNIT, stipX); rot = stipX; /* * Get pointer to stipple mask array for this depth */ /* fbStippleTable covers all valid bpp (4,8,16,32) */ fbBits = fbStippleTable[pixelsPerDst]; while (height--) { /* * Extract stipple bits for this scanline; */ bits = READ(s); s += stipStride; if (s == stipEnd) s = stip; mask = fbBits[FbLeftStipBits(bits, pixelsPerDst)]; /* * Rotate into position and compute reduced rop values */ mask = FbRotLeft(mask, rot); and = (fgand & mask) | (bgand & ~mask); xor = (fgxor & mask) | (bgxor & ~mask); if (transparent) { if (startmask) { fbTransparentSpan(dst, mask & startmask, fgxor, 1); dst++; } fbTransparentSpan(dst, mask, fgxor, nmiddle); dst += nmiddle; if (endmask) fbTransparentSpan(dst, mask & endmask, fgxor, 1); } else { /* * Fill scanline */ if (startmask) { FbDoLeftMaskByteRRop(dst, startbyte, startmask, and, xor); dst++; } n = nmiddle; if (!and) while (n--) WRITE(dst++, xor); else { while (n--) { WRITE(dst, FbDoRRop(READ(dst), and, xor)); dst++; } } if (endmask) FbDoRightMaskByteRRop(dst, endbyte, endmask, and, xor); } dst += dstStride; } } static void fbOddStipple(FbBits *dst, FbStride dstStride, int dstX, int dstBpp, int width, int height, FbStip *stip, FbStride stipStride, int stipWidth, int stipHeight, FbBits fgand, FbBits fgxor, FbBits bgand, FbBits bgxor, int xRot, int yRot) { int stipX, stipY, sx; int widthTmp; int h, w; int x, y; modulus(-yRot, stipHeight, stipY); modulus(dstX / dstBpp - xRot, stipWidth, stipX); y = 0; while (height) { h = stipHeight - stipY; if (h > height) h = height; height -= h; widthTmp = width; x = dstX; sx = stipX; while (widthTmp) { w = (stipWidth - sx) * dstBpp; if (w > widthTmp) w = widthTmp; widthTmp -= w; fbBltOne(stip + stipY * stipStride, stipStride, sx, dst + y * dstStride, dstStride, x, dstBpp, w, h, fgand, fgxor, bgand, bgxor); x += w; sx = 0; } y += h; stipY = 0; } } void fbStipple(FbBits *dst, FbStride dstStride, int dstX, int dstBpp, int width, int height, FbStip *stip, FbStride stipStride, int stipWidth, int stipHeight, Bool even, FbBits fgand, FbBits fgxor, FbBits bgand, FbBits bgxor, int xRot, int yRot) { DBG(("%s stipple=%dx%d, size=%dx%d\n", __FUNCTION__, stipWidth, stipHeight, width, height)); if (even) fbEvenStipple(dst, dstStride, dstX, dstBpp, width, height, stip, stipStride, stipHeight, fgand, fgxor, bgand, bgxor, xRot, yRot); else fbOddStipple(dst, dstStride, dstX, dstBpp, width, height, stip, stipStride, stipWidth, stipHeight, fgand, fgxor, bgand, bgxor, xRot, yRot); } xf86-video-intel-2.99.917/src/sna/fb/fbspan.c0000664000175000017500000000714412244635610015314 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" #include "fbclip.h" inline static void fbFillSpan(DrawablePtr drawable, GCPtr gc, const BoxRec *b, void *data) { DBG(("%s (%d,%d)+%d\n", __FUNCTION__, b->x1, b->y1, b->x2-b->x1)); fbFill(drawable, gc, b->x1, b->y1, b->x2 - b->x1, 1); } void fbFillSpans(DrawablePtr drawable, GCPtr gc, int n, DDXPointPtr pt, int *width, int fSorted) { DBG(("%s x %d\n", __FUNCTION__, n)); while (n--) { BoxRec box; *(DDXPointPtr)&box = *pt++; box.x2 = box.x1 + *width++; box.y2 = box.y1 + 1; /* XXX fSorted */ fbDrawableRun(drawable, gc, &box, fbFillSpan, NULL); } } struct fbSetSpan { char *src; DDXPointRec pt; FbStride stride; FbBits *dst; int dx, dy; }; inline static void fbSetSpan(DrawablePtr drawable, GCPtr gc, const BoxRec *b, void *_data) { struct fbSetSpan *data = _data; int xoff, bpp; xoff = (int) (((long)data->src) & (FB_MASK >> 3)); bpp = drawable->bitsPerPixel; fbBlt((FbBits *)(data->src - xoff), 0, (b->x1 - data->pt.x) * bpp + (xoff << 3), data->dst + (b->y1 + data->dy) * data->stride, data->stride, (b->x1 + data->dx) * bpp, (b->x2 - b->x1) * bpp, 1, gc->alu, fb_gc(gc)->pm, bpp, FALSE, FALSE); } void fbSetSpans(DrawablePtr drawable, GCPtr gc, char *src, DDXPointPtr pt, int *width, int n, int fSorted) { struct fbSetSpan data; PixmapPtr pixmap; DBG(("%s x %d\n", __FUNCTION__, n)); fbGetDrawablePixmap(drawable, pixmap, data.dx, data.dy); data.dst = pixmap->devPrivate.ptr; data.stride = pixmap->devKind / sizeof(FbStip); data.src = src; while (n--) { BoxRec box; *(DDXPointPtr)&box = data.pt = *pt; box.x2 = box.x1 + *width; box.y2 = box.y1 + 1; fbDrawableRun(drawable, gc, &box, fbSetSpan, &data); data.src += PixmapBytePad(*width, drawable->depth); width++; pt++; } } void fbGetSpans(DrawablePtr drawable, int wMax, DDXPointPtr pt, int *width, int n, char *dst) { FbBits *src, *d; FbStride srcStride; int srcBpp; int srcXoff, srcYoff; int xoff; fbGetDrawable(drawable, src, srcStride, srcBpp, srcXoff, srcYoff); DBG(("%s x %d\n", __FUNCTION__, n)); while (n--) { xoff = (int) (((long) dst) & (FB_MASK >> 3)); d = (FbBits *) (dst - xoff); fbBlt(src + (pt->y + srcYoff) * srcStride, srcStride, (pt->x + srcXoff) * srcBpp, d, 1, xoff << 3, *width * srcBpp, 1, GXcopy, FB_ALLONES, srcBpp, FALSE, FALSE); dst += PixmapBytePad(*width, drawable->depth); pt++; width++; } } xf86-video-intel-2.99.917/src/sna/fb/fbline.c0000664000175000017500000001074312400044327015272 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" #include #include #include #include #define POLYLINE fbPolyline8 #define POLYSEGMENT fbPolySegment8 #define BITS BYTE #define BITS2 CARD16 #define BITS4 CARD32 #include "fblinebits.h" #undef BITS #undef BITS2 #undef BITS4 #undef POLYSEGMENT #undef POLYLINE #define POLYLINE fbPolyline16 #define POLYSEGMENT fbPolySegment16 #define BITS CARD16 #define BITS2 CARD32 #include "fblinebits.h" #undef BITS #undef BITS2 #undef POLYSEGMENT #undef POLYLINE #define POLYLINE fbPolyline32 #define POLYSEGMENT fbPolySegment32 #define BITS CARD32 #include "fblinebits.h" #undef BITS #undef POLYSEGMENT #undef POLYLINE static void fbZeroLine(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { int x1, y1, x2, y2; int x, y; int dashOffset; x = drawable->x; y = drawable->y; x1 = pt->x; y1 = pt->y; dashOffset = gc->dashOffset; while (--n) { ++pt; x2 = pt->x; y2 = pt->y; if (mode == CoordModePrevious) { x2 += x1; y2 += y1; } fbSegment(drawable, gc, x1 + x, y1 + y, x2 + x, y2 + y, n == 1 && gc->capStyle != CapNotLast, &dashOffset); x1 = x2; y1 = y2; } } static void fbZeroSegment(DrawablePtr drawable, GCPtr gc, int n, xSegment *seg) { int dashOffset; int16_t x, y; Bool drawLast = gc->capStyle != CapNotLast; x = drawable->x; y = drawable->y; while (n--) { dashOffset = gc->dashOffset; fbSegment(drawable, gc, seg->x1 + x, seg->y1 + y, seg->x2 + x, seg->y2 + y, drawLast, &dashOffset); seg++; } } void fbFixCoordModePrevious(int n, DDXPointPtr pt) { int16_t x = pt->x; int16_t y = pt->y; while (--n) { pt++; x = (pt->x += x); y = (pt->y += y); } } void fbPolyLine(DrawablePtr drawable, GCPtr gc, int mode, int n, DDXPointPtr pt) { void (*raster)(DrawablePtr, GCPtr, int mode, int n, DDXPointPtr pt); DBG(("%s x %d, width=%d, fill=%d [solid? %d], line=%d [solid? %d], bpp=%d\n", __FUNCTION__, n, gc->lineWidth, gc->fillStyle, gc->fillStyle == FillSolid, gc->lineStyle, gc->lineStyle == LineSolid, drawable->bitsPerPixel)); if (gc->lineWidth == 0) { raster = fbZeroLine; if (gc->fillStyle == FillSolid && gc->lineStyle == LineSolid) { switch (drawable->bitsPerPixel) { case 8: raster = fbPolyline8; break; case 16: raster = fbPolyline16; break; case 32: raster = fbPolyline32; break; } } } else { if (gc->lineStyle != LineSolid) raster = miWideDash; else raster = miWideLine; } raster(drawable, gc, mode, n, pt); } void fbPolySegment(DrawablePtr drawable, GCPtr gc, int n, xSegment *seg) { void (*raster)(DrawablePtr drawable, GCPtr gc, int n, xSegment * seg); DBG(("%s x %d, width=%d, fill=%d [solid? %d], line=%d [solid? %d], bpp=%d\n", __FUNCTION__, n, gc->lineWidth, gc->fillStyle, gc->fillStyle == FillSolid, gc->lineStyle, gc->lineStyle == LineSolid, drawable->bitsPerPixel)); if (gc->lineWidth == 0) { raster = fbZeroSegment; if (gc->fillStyle == FillSolid && gc->lineStyle == LineSolid) { switch (drawable->bitsPerPixel) { case 8: raster = fbPolySegment8; break; case 16: raster = fbPolySegment16; break; case 32: raster = fbPolySegment32; break; } } } else raster = miPolySegment; raster(drawable, gc, n, seg); } xf86-video-intel-2.99.917/src/sna/fb/fbfill.c0000664000175000017500000001432212244635610015275 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" #include "fbclip.h" static void fbSolid(FbBits * dst, FbStride dstStride, int dstX, int bpp, int width, int height, FbBits and, FbBits xor) { FbBits startmask, endmask; int n, nmiddle; int startbyte, endbyte; dst += dstX >> FB_SHIFT; dstX &= FB_MASK; FbMaskBitsBytes(dstX, width, and == 0, startmask, startbyte, nmiddle, endmask, endbyte); if (startmask) dstStride--; dstStride -= nmiddle; while (height--) { if (startmask) { FbDoLeftMaskByteRRop(dst, startbyte, startmask, and, xor); dst++; } n = nmiddle; if (!and) while (n--) WRITE(dst++, xor); else while (n--) { WRITE(dst, FbDoRRop(READ(dst), and, xor)); dst++; } if (endmask) FbDoRightMaskByteRRop(dst, endbyte, endmask, and, xor); dst += dstStride; } } void fbFill(DrawablePtr drawable, GCPtr gc, int x, int y, int width, int height) { FbBits *dst; FbStride dstStride; int dstBpp; int dstXoff, dstYoff; FbGCPrivPtr pgc = fb_gc(gc); DBG(("%s (%d, %d)x(%d, %d), style=%d\n", __FUNCTION__, x, y, width, height, gc->fillStyle)); fbGetDrawable(drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); switch (gc->fillStyle) { case FillSolid: if (pgc->and || !pixman_fill((uint32_t *) dst, dstStride, dstBpp, x + dstXoff, y + dstYoff, width, height, pgc->xor)) fbSolid(dst + (y + dstYoff) * dstStride, dstStride, (x + dstXoff) * dstBpp, dstBpp, width * dstBpp, height, pgc->and, pgc->xor); break; case FillStippled: case FillOpaqueStippled: { PixmapPtr pStip = gc->stipple; int stipWidth = pStip->drawable.width; int stipHeight = pStip->drawable.height; if (dstBpp == 1) { int alu; FbBits *stip; FbStride stipStride; int stipBpp; _X_UNUSED int stipXoff, stipYoff; if (gc->fillStyle == FillStippled) alu = FbStipple1Rop(gc->alu, gc->fgPixel); else alu = FbOpaqueStipple1Rop(gc->alu, gc->fgPixel, gc->bgPixel); fbGetDrawable(&pStip->drawable, stip, stipStride, stipBpp, stipXoff, stipYoff); fbTile(dst + (y + dstYoff) * dstStride, dstStride, x + dstXoff, width, height, stip, stipStride, stipWidth, stipHeight, alu, pgc->pm, dstBpp, (gc->patOrg.x + drawable->x + dstXoff), gc->patOrg.y + drawable->y - y); } else { FbStip *stip; FbStride stipStride; int stipBpp; _X_UNUSED int stipXoff, stipYoff; FbBits fgand, fgxor, bgand, bgxor; fgand = pgc->and; fgxor = pgc->xor; if (gc->fillStyle == FillStippled) { bgand = fbAnd(GXnoop, (FbBits) 0, FB_ALLONES); bgxor = fbXor(GXnoop, (FbBits) 0, FB_ALLONES); } else { bgand = pgc->bgand; bgxor = pgc->bgxor; } fbGetStipDrawable(&pStip->drawable, stip, stipStride, stipBpp, stipXoff, stipYoff); fbStipple(dst + (y + dstYoff) * dstStride, dstStride, (x + dstXoff) * dstBpp, dstBpp, width * dstBpp, height, stip, stipStride, stipWidth, stipHeight, pgc->evenStipple, fgand, fgxor, bgand, bgxor, gc->patOrg.x + drawable->x + dstXoff, gc->patOrg.y + drawable->y - y); } break; } case FillTiled: { PixmapPtr tile = gc->tile.pixmap; fbTile(dst + (y + dstYoff) * dstStride, dstStride, (x + dstXoff) * dstBpp, width * dstBpp, height, tile->devPrivate.ptr, tile->devKind / sizeof(FbBits), tile->drawable.width * tile->drawable.bitsPerPixel, tile->drawable.height, gc->alu, pgc->pm, dstBpp, (gc->patOrg.x + drawable->x + dstXoff) * dstBpp, gc->patOrg.y + drawable->y - y); break; } } } static void _fbSolidBox(DrawablePtr drawable, GCPtr gc, const BoxRec *b, void *_data) { FbBits *dst; FbStride stride; int dx, dy, bpp; FbBits and = fbAnd(GXcopy, fb_gc(gc)->bg, fb_gc(gc)->pm); FbBits xor = fbXor(GXcopy, fb_gc(gc)->bg, fb_gc(gc)->pm); fbGetDrawable(drawable, dst, stride, bpp, dx, dy); if (and || !pixman_fill((uint32_t *) dst, stride, bpp, b->x1 + dx, b->y1 + dy, (b->x2 - b->x1), (b->y2 - b->y1), xor)) fbSolid(dst + (b->y1 + dy) * stride, stride, (b->x1 + dx) * bpp, bpp, (b->x2 - b->x1) * bpp, (b->y2 - b->y1), and, xor); } void fbSolidBoxClipped(DrawablePtr drawable, GCPtr gc, int x1, int y1, int x2, int y2) { BoxRec box; box.x1 = x1; box.y1 = y1; box.x2 = x2; box.y2 = y2; fbDrawableRun(drawable, gc, &box, _fbSolidBox, NULL); } inline static void fbFillBox(DrawablePtr drawable, GCPtr gc, const BoxRec *box, void *data) { DBG(("%s box=(%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); fbFill(drawable, gc, box->x1, box->y1, box->x2 - box->x1, box->y2 - box->y1); } void fbPolyFillRect(DrawablePtr drawable, GCPtr gc, int n, xRectangle *r) { DBG(("%s x %d\n", __FUNCTION__, n)); while (n--) { BoxRec b; b.x1 = r->x + drawable->x; b.y1 = r->y + drawable->y; b.x2 = fbBound(b.x1, r->width); b.y2 = fbBound(b.y1, r->height); r++; DBG(("%s: rectangle (%d, %d), (%d, %d)\n", __FUNCTION__, b.x1, b.y1, b.x2, b.y2)); fbDrawableRun(drawable, gc, &b, fbFillBox, NULL); } } xf86-video-intel-2.99.917/src/sna/fb/fbtile.c0000664000175000017500000001004612244635610015303 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" /* * Accelerated tile fill -- tile width is a power of two not greater * than FB_UNIT */ static void fbEvenTile(FbBits *dst, FbStride dstStride, int dstX, int width, int height, FbBits *tile, FbStride tileStride, int tileHeight, int alu, FbBits pm, int xRot, int yRot) { FbBits *t, *tileEnd, bits; FbBits startmask, endmask; FbBits and, xor; int n, nmiddle; int tileX, tileY; int rot; int startbyte, endbyte; dst += dstX >> FB_SHIFT; dstX &= FB_MASK; FbMaskBitsBytes(dstX, width, FbDestInvarientRop(alu, pm), startmask, startbyte, nmiddle, endmask, endbyte); if (startmask) dstStride--; dstStride -= nmiddle; /* * Compute tile start scanline and rotation parameters */ tileEnd = tile + tileHeight * tileStride; modulus(-yRot, tileHeight, tileY); t = tile + tileY * tileStride; modulus(-xRot, FB_UNIT, tileX); rot = tileX; while (height--) { /* * Pick up bits for this scanline */ bits = READ(t); t += tileStride; if (t >= tileEnd) t = tile; bits = FbRotLeft(bits, rot); and = fbAnd(alu, bits, pm); xor = fbXor(alu, bits, pm); if (startmask) { FbDoLeftMaskByteRRop(dst, startbyte, startmask, and, xor); dst++; } n = nmiddle; if (!and) while (n--) WRITE(dst++, xor); else while (n--) { WRITE(dst, FbDoRRop(READ(dst), and, xor)); dst++; } if (endmask) FbDoRightMaskByteRRop(dst, endbyte, endmask, and, xor); dst += dstStride; } } static void fbOddTile(FbBits *dst, FbStride dstStride, int dstX, int width, int height, FbBits *tile, FbStride tileStride, int tileWidth, int tileHeight, int alu, FbBits pm, int bpp, int xRot, int yRot) { int tileX, tileY; int x, y; DBG(("%s tile=%dx%d, size=%dx%d\n", __FUNCTION__, tileWidth, tileHeight, width, height)); modulus(-yRot, tileHeight, tileY); y = 0; while (height) { int ww = width; int h = tileHeight - tileY; if (h > height) h = height; height -= h; x = dstX; modulus(dstX - xRot, tileWidth, tileX); while (ww) { int w = tileWidth - tileX; if (w > ww) w = ww; ww -= w; fbBlt(tile + tileY * tileStride, tileStride, tileX, dst + y * dstStride, dstStride, x, w, h, alu, pm, bpp, FALSE, FALSE); x += w; tileX = 0; } y += h; tileY = 0; } } void fbTile(FbBits *dst, FbStride dstStride, int dstX, int width, int height, FbBits *tile, FbStride tileStride, int tileWidth, int tileHeight, int alu, FbBits pm, int bpp, int xRot, int yRot) { DBG(("%s tile=%dx%d, size=%dx%d\n", __FUNCTION__, tileWidth, tileHeight, width, height)); if (FbEvenTile(tileWidth)) fbEvenTile(dst, dstStride, dstX, width, height, tile, tileStride, tileHeight, alu, pm, xRot, yRot); else fbOddTile(dst, dstStride, dstX, width, height, tile, tileStride, tileWidth, tileHeight, alu, pm, bpp, xRot, yRot); } xf86-video-intel-2.99.917/src/sna/fb/fbgc.c0000664000175000017500000001201112400044327014722 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" #include #include /* * Pad pixmap to FB_UNIT bits wide */ void fbPadPixmap(PixmapPtr pPixmap) { int width; FbBits *bits; FbBits b; FbBits mask; int height; int w; int stride; int bpp; _X_UNUSED int xOff, yOff; fbGetDrawable(&pPixmap->drawable, bits, stride, bpp, xOff, yOff); width = pPixmap->drawable.width * pPixmap->drawable.bitsPerPixel; height = pPixmap->drawable.height; mask = FbBitsMask(0, width); while (height--) { b = READ(bits) & mask; w = width; while (w < FB_UNIT) { b = b | FbScrRight(b, w); w <<= 1; } WRITE(bits, b); bits += stride; } } /* * Verify that 'bits' repeats every 'len' bits */ static Bool fbBitsRepeat(FbBits bits, int len, int width) { FbBits mask = FbBitsMask(0, len); FbBits orig = bits & mask; int i; if (width > FB_UNIT) width = FB_UNIT; for (i = 0; i < width / len; i++) { if ((bits & mask) != orig) return FALSE; bits = FbScrLeft(bits, len); } return TRUE; } /* * Check whether an entire bitmap line is a repetition of * the first 'len' bits */ static Bool fbLineRepeat(FbBits * bits, int len, int width) { FbBits first = bits[0]; if (!fbBitsRepeat(first, len, width)) return FALSE; width = (width + FB_UNIT - 1) >> FB_SHIFT; bits++; while (--width) if (READ(bits) != first) return FALSE; return TRUE; } /* * The even stipple code wants the first FB_UNIT/bpp bits on * each scanline to represent the entire stipple */ static Bool fbCanEvenStipple(PixmapPtr pStipple, int bpp) { int len = FB_UNIT / bpp; FbBits *bits; int stride; int stip_bpp; _X_UNUSED int stipXoff, stipYoff; int h; /* make sure the stipple width is a multiple of the even stipple width */ if (pStipple->drawable.width % len != 0) return FALSE; fbGetDrawable(&pStipple->drawable, bits, stride, stip_bpp, stipXoff, stipYoff); h = pStipple->drawable.height; /* check to see that the stipple repeats horizontally */ while (h--) { if (!fbLineRepeat(bits, len, pStipple->drawable.width)) return FALSE; bits += stride; } return TRUE; } void fbValidateGC(GCPtr gc, unsigned long changes, DrawablePtr drawable) { FbGCPrivPtr pgc = fb_gc(gc); FbBits mask; DBG(("%s changes=%lx\n", __FUNCTION__, changes)); if (changes & GCStipple) { pgc->evenStipple = FALSE; if (gc->stipple) { /* can we do an even stipple ?? */ if (FbEvenStip(gc->stipple->drawable.width, drawable->bitsPerPixel) && (fbCanEvenStipple(gc->stipple, drawable->bitsPerPixel))) pgc->evenStipple = TRUE; } } /* * Recompute reduced rop values */ if (changes & (GCForeground | GCBackground | GCPlaneMask | GCFunction)) { int s; FbBits depthMask; mask = FbFullMask(drawable->bitsPerPixel); depthMask = FbFullMask(drawable->depth); DBG(("%s: computing rrop mask=%08x, depthMask=%08x, fg=%08x, bg=%08x, planemask=%08x\n", __FUNCTION__, mask, depthMask, (int)gc->fgPixel, (int)gc->bgPixel, (int)gc->planemask)); pgc->fg = gc->fgPixel & mask; pgc->bg = gc->bgPixel & mask; if ((gc->planemask & depthMask) == depthMask) pgc->pm = mask; else pgc->pm = gc->planemask & mask; s = drawable->bitsPerPixel; while (s < FB_UNIT) { pgc->fg |= pgc->fg << s; pgc->bg |= pgc->bg << s; pgc->pm |= pgc->pm << s; s <<= 1; } pgc->and = fbAnd(gc->alu, pgc->fg, pgc->pm); pgc->xor = fbXor(gc->alu, pgc->fg, pgc->pm); pgc->bgand = fbAnd(gc->alu, pgc->bg, pgc->pm); pgc->bgxor = fbXor(gc->alu, pgc->bg, pgc->pm); DBG(("%s: rrop fg=%08x, bg=%08x, pm=%08x, and=%08x, xor=%08x, bgand=%08x, bgxor=%08x\n", __FUNCTION__, pgc->fg, pgc->bg, pgc->pm, pgc->and, pgc->xor, pgc->bgand, pgc->bgxor)); } if (changes & GCDashList) { unsigned short n = gc->numInDashList; unsigned char *dash = gc->dash; unsigned int dashLength = 0; while (n--) dashLength += (unsigned int) *dash++; pgc->dashLength = dashLength; } } xf86-video-intel-2.99.917/src/sna/fb/fbpush.c0000664000175000017500000001073712400044327015325 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" #include "fbclip.h" static void fbPushPattern(DrawablePtr drawable, GCPtr gc, FbStip *src, FbStride srcStride, int srcX, int x, int y, int width, int height) { FbStip *s, bitsMask, bitsMask0, bits; int xspan; int w; int lenspan; src += srcX >> FB_STIP_SHIFT; srcX &= FB_STIP_MASK; bitsMask0 = FbStipMask(srcX, 1); while (height--) { bitsMask = bitsMask0; w = width; s = src; src += srcStride; bits = READ(s++); xspan = x; while (w) { if (bits & bitsMask) { lenspan = 0; do { if (++lenspan == w) break; bitsMask = FbStipRight(bitsMask, 1); if (!bitsMask) { bits = READ(s++); bitsMask = FbBitsMask(0, 1); } } while (bits & bitsMask); fbFill(drawable, gc, xspan, y, lenspan, 1); xspan += lenspan; w -= lenspan; } else { do { xspan++; if (!--w) break; bitsMask = FbStipRight(bitsMask, 1); if (!bitsMask) { bits = READ(s++); bitsMask = FbBitsMask(0, 1); } } while (!(bits & bitsMask)); } } y++; } } static void fbPushFill(DrawablePtr drawable, GCPtr gc, FbStip *src, FbStride srcStride, int srcX, int x, int y, int width, int height) { FbGCPrivPtr pgc = fb_gc(gc); if (gc->fillStyle == FillSolid) { FbBits *dst; FbStride dstStride; int dstBpp; int dstXoff, dstYoff; int dstX; int dstWidth; fbGetDrawable(drawable, dst, dstStride, dstBpp, dstXoff, dstYoff); dst = dst + (y + dstYoff) * dstStride; dstX = (x + dstXoff) * dstBpp; dstWidth = width * dstBpp; if (dstBpp == 1) { fbBltStip(src, srcStride, srcX, (FbStip *)dst, dstStride, dstX, dstWidth, height, FbStipple1Rop(gc->alu, gc->fgPixel), pgc->pm, dstBpp); } else { fbBltOne(src, srcStride, srcX, dst, dstStride, dstX, dstBpp, dstWidth, height, pgc->and, pgc->xor, fbAnd(GXnoop, (FbBits) 0, FB_ALLONES), fbXor(GXnoop, (FbBits) 0, FB_ALLONES)); } } else fbPushPattern(drawable, gc, src, srcStride, srcX, x, y, width, height); } struct fbPushImage { FbStip *src; FbStride stride; int x0, y0; }; inline static void _fbPushImage(DrawablePtr drawable, GCPtr gc, const BoxRec *b, void *_data) { struct fbPushImage *data = _data; fbPushFill(drawable, gc, data->src + (b->y1 - data->y0) * data->stride, data->stride, b->x1 - data->x0, b->x1, b->y1, b->x2 - b->x1, b->y2 - b->y1); } void fbPushImage(DrawablePtr drawable, GCPtr gc, FbStip *src, FbStride stride, int dx, int x, int y, int width, int height) { struct fbPushImage data; BoxRec box; DBG(("%s (%d, %d)x(%d, %d)\n", __FUNCTION__, x, y, width, height)); data.src = src; data.stride = stride; data.y0 = y; data.x0 = x - dx; box.x1 = x; box.y1 = y; box.x2 = x + width; box.y2 = y + height; fbDrawableRun(drawable, gc, &box, _fbPushImage, &data); } void fbPushPixels(GCPtr gc, PixmapPtr bitmap, DrawablePtr drawable, int dx, int dy, int xOrg, int yOrg) { FbStip *stip; FbStride stipStride; int stipBpp; _X_UNUSED int stipXoff, stipYoff; DBG(("%s bitmap=%x%d\n", __FUNCTION__, bitmap->drawable.width, bitmap->drawable.height)); fbGetStipDrawable(&bitmap->drawable, stip, stipStride, stipBpp, stipXoff, stipYoff); fbPushImage(drawable, gc, stip, stipStride, 0, xOrg, yOrg, dx, dy); } xf86-video-intel-2.99.917/src/sna/fb/fbclip.c0000664000175000017500000000540312400044327015267 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #include "fb.h" #include "fbclip.h" static const BoxRec * find_clip_row_for_y(const BoxRec *begin, const BoxRec *end, int16_t y) { const BoxRec *mid; if (end == begin) return end; if (end - begin == 1) { if (begin->y2 > y) return begin; else return end; } mid = begin + (end - begin) / 2; if (mid->y2 > y) return find_clip_row_for_y(begin, mid, y); else return find_clip_row_for_y(mid, end, y); } const BoxRec * fbClipBoxes(const RegionRec *region, const BoxRec *box, const BoxRec **end) { const BoxRec *c0, *c1; DBG(("%s: box=(%d, %d),(%d, %d); region=(%d, %d),(%d, %d) x %ld\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, region->data ? region->data->numRects : 1)); if (box->x1 >= region->extents.x2 || box->x2 <= region->extents.x1 || box->y1 >= region->extents.y2 || box->y2 <= region->extents.y1) { DBG(("%s: no intersection\n", __FUNCTION__)); return *end = box; } if (region->data == NULL) { *end = ®ion->extents + 1; return ®ion->extents; } c0 = (const BoxRec *)(region->data + 1); c1 = c0 + region->data->numRects; if (c0->y2 <= box->y1) { DBG(("%s: first clip (%d, %d), (%d, %d) before box (%d, %d), (%d, %d)\n", __FUNCTION__, c0->x1, c0->y1, c0->x2, c0->y2, box->x1, box->y1, box->x2, box->y2)); c0 = find_clip_row_for_y(c0, c1, box->y1); } DBG(("%s: c0=(%d, %d),(%d, %d) x %ld\n", __FUNCTION__, c0->x1, c0->y1, c0->x2, c0->y2, (long)(c1 - c0))); *end = c1; return c0; } xf86-video-intel-2.99.917/src/sna/fb/fbrop.h0000664000175000017500000000770612244635610015164 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #ifndef _FBROP_H_ #define _FBROP_H_ #define FbDestInvarientRop(alu,pm) ((pm) == FB_ALLONES && \ (((alu) >> 1 & 5) == ((alu) & 5))) #define FbDestInvarientMergeRop() (_ca1 == 0 && _cx1 == 0) /* AND has higher precedence than XOR */ #define FbDoMergeRop(src, dst) \ (((dst) & (((src) & _ca1) ^ _cx1)) ^ (((src) & _ca2) ^ _cx2)) #define FbDoDestInvarientMergeRop(src) (((src) & _ca2) ^ _cx2) #define FbDoMaskMergeRop(src, dst, mask) \ (((dst) & ((((src) & _ca1) ^ _cx1) | ~(mask))) ^ ((((src) & _ca2) ^ _cx2) & (mask))) #define FbDoLeftMaskByteMergeRop(dst, src, lb, l) { \ FbBits __xor = ((src) & _ca2) ^ _cx2; \ FbDoLeftMaskByteRRop(dst,lb,l,((src) & _ca1) ^ _cx1,__xor); \ } #define FbDoRightMaskByteMergeRop(dst, src, rb, r) { \ FbBits __xor = ((src) & _ca2) ^ _cx2; \ FbDoRightMaskByteRRop(dst,rb,r,((src) & _ca1) ^ _cx1,__xor); \ } #define FbDoRRop(dst, and, xor) (((dst) & (and)) ^ (xor)) #define FbDoMaskRRop(dst, and, xor, mask) \ (((dst) & ((and) | ~(mask))) ^ (xor & mask)) /* * Take a single bit (0 or 1) and generate a full mask */ #define fbFillFromBit(b,t) (~((t) ((b) & 1)-1)) #define fbXorT(rop,fg,pm,t) ((((fg) & fbFillFromBit((rop) >> 1,t)) | \ (~(fg) & fbFillFromBit((rop) >> 3,t))) & (pm)) #define fbAndT(rop,fg,pm,t) ((((fg) & fbFillFromBit (rop ^ (rop>>1),t)) | \ (~(fg) & fbFillFromBit((rop>>2) ^ (rop>>3),t))) | \ ~(pm)) #define fbXor(rop,fg,pm) fbXorT(rop,fg,pm,FbBits) #define fbAnd(rop,fg,pm) fbAndT(rop,fg,pm,FbBits) #define fbXorStip(rop,fg,pm) fbXorT(rop,fg,pm,FbStip) #define fbAndStip(rop,fg,pm) fbAndT(rop,fg,pm,FbStip) /* * Stippling operations; */ extern const FbBits *const fbStippleTable[]; #define FbStippleRRop(dst, b, fa, fx, ba, bx) \ (FbDoRRop(dst, fa, fx) & b) | (FbDoRRop(dst, ba, bx) & ~b) #define FbStippleRRopMask(dst, b, fa, fx, ba, bx, m) \ (FbDoMaskRRop(dst, fa, fx, m) & (b)) | (FbDoMaskRRop(dst, ba, bx, m) & ~(b)) #define FbDoLeftMaskByteStippleRRop(dst, b, fa, fx, ba, bx, lb, l) { \ FbBits __xor = ((fx) & (b)) | ((bx) & ~(b)); \ FbDoLeftMaskByteRRop(dst, lb, l, ((fa) & (b)) | ((ba) & ~(b)), __xor); \ } #define FbDoRightMaskByteStippleRRop(dst, b, fa, fx, ba, bx, rb, r) { \ FbBits __xor = ((fx) & (b)) | ((bx) & ~(b)); \ FbDoRightMaskByteRRop(dst, rb, r, ((fa) & (b)) | ((ba) & ~(b)), __xor); \ } #define FbOpaqueStipple(b, fg, bg) (((fg) & (b)) | ((bg) & ~(b))) /* * Compute rop for using tile code for 1-bit dest stipples; modifies * existing rop to flip depending on pixel values */ #define FbStipple1RopPick(alu,b) (((alu) >> (2 - (((b) & 1) << 1))) & 3) #define FbOpaqueStipple1Rop(alu,fg,bg) (FbStipple1RopPick(alu,fg) | \ (FbStipple1RopPick(alu,bg) << 2)) #define FbStipple1Rop(alu,fg) (FbStipple1RopPick(alu,fg) | 4) #endif xf86-video-intel-2.99.917/src/sna/fb/Makefile.in0000664000175000017500000011715512445556117015757 00000000000000# Makefile.in generated by automake 1.14.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; 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install-dvi install-dvi-am install-exec \ install-exec-am install-html install-html-am install-info \ install-info-am install-man install-pdf install-pdf-am \ install-ps install-ps-am install-strip installcheck \ installcheck-am installdirs maintainer-clean \ maintainer-clean-generic mostlyclean mostlyclean-compile \ mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ tags tags-am uninstall uninstall-am # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: xf86-video-intel-2.99.917/src/sna/fb/fbutil.c0000664000175000017500000001263612244635610015332 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" FbBits fbReplicatePixel(Pixel p, int bpp) { FbBits b = p; b &= FbFullMask(bpp); while (bpp < FB_UNIT) { b |= b << bpp; bpp <<= 1; } return b; } /* * Stipple masks are independent of bit/byte order as long * as bitorder == byteorder. FB doesn't handle the case * where these differ */ #define __mask(x,w) ((FB_ALLONES << ((x) & FB_MASK)) & \ (FB_ALLONES >> ((FB_UNIT - ((x) + (w))) & FB_MASK))) #define _mask(x,w) __mask((x)*(w),(w)) #define mask(b,n,w) ((((b) >> (n)) & 1) * _mask(n,w)) #define _C1(b,n,w) mask(b,n,w) #define _C2(b,n,w) (_C1(b,n,w) | _C1(b,n+1,w)) #define _C4(b,n,w) (_C2(b,n,w) | _C2(b,n+2,w)) #define C8(b,w) (_C4(b,0,w) | _C4(b,4,w)) #define C4(b,w) _C4(b,0,w) #define C2(b,w) _C2(b,0,w) #define C1(b,w) _C1(b,0,w) static const FbBits fbStipple8Bits[256] = { C8(0, 4), C8(1, 4), C8(2, 4), C8(3, 4), C8(4, 4), C8(5, 4), C8(6, 4), C8(7, 4), C8(8, 4), C8(9, 4), C8(10, 4), C8(11, 4), C8(12, 4), C8(13, 4), C8(14, 4), C8(15, 4), C8(16, 4), C8(17, 4), C8(18, 4), C8(19, 4), C8(20, 4), C8(21, 4), C8(22, 4), C8(23, 4), C8(24, 4), C8(25, 4), C8(26, 4), C8(27, 4), C8(28, 4), C8(29, 4), C8(30, 4), C8(31, 4), C8(32, 4), C8(33, 4), C8(34, 4), C8(35, 4), C8(36, 4), C8(37, 4), C8(38, 4), C8(39, 4), C8(40, 4), C8(41, 4), C8(42, 4), C8(43, 4), C8(44, 4), C8(45, 4), C8(46, 4), C8(47, 4), C8(48, 4), C8(49, 4), C8(50, 4), C8(51, 4), C8(52, 4), C8(53, 4), C8(54, 4), C8(55, 4), C8(56, 4), C8(57, 4), C8(58, 4), C8(59, 4), C8(60, 4), C8(61, 4), C8(62, 4), C8(63, 4), C8(64, 4), C8(65, 4), C8(66, 4), C8(67, 4), C8(68, 4), C8(69, 4), C8(70, 4), C8(71, 4), C8(72, 4), C8(73, 4), C8(74, 4), C8(75, 4), C8(76, 4), C8(77, 4), C8(78, 4), C8(79, 4), C8(80, 4), C8(81, 4), C8(82, 4), C8(83, 4), C8(84, 4), C8(85, 4), C8(86, 4), C8(87, 4), C8(88, 4), C8(89, 4), C8(90, 4), C8(91, 4), C8(92, 4), C8(93, 4), C8(94, 4), C8(95, 4), C8(96, 4), C8(97, 4), C8(98, 4), C8(99, 4), C8(100, 4), C8(101, 4), C8(102, 4), C8(103, 4), C8(104, 4), C8(105, 4), C8(106, 4), C8(107, 4), C8(108, 4), C8(109, 4), C8(110, 4), C8(111, 4), C8(112, 4), C8(113, 4), C8(114, 4), C8(115, 4), C8(116, 4), C8(117, 4), C8(118, 4), C8(119, 4), C8(120, 4), C8(121, 4), C8(122, 4), C8(123, 4), C8(124, 4), C8(125, 4), C8(126, 4), C8(127, 4), C8(128, 4), C8(129, 4), C8(130, 4), C8(131, 4), C8(132, 4), C8(133, 4), C8(134, 4), C8(135, 4), C8(136, 4), C8(137, 4), C8(138, 4), C8(139, 4), C8(140, 4), C8(141, 4), C8(142, 4), C8(143, 4), C8(144, 4), C8(145, 4), C8(146, 4), C8(147, 4), C8(148, 4), C8(149, 4), C8(150, 4), C8(151, 4), C8(152, 4), C8(153, 4), C8(154, 4), C8(155, 4), C8(156, 4), C8(157, 4), C8(158, 4), C8(159, 4), C8(160, 4), C8(161, 4), C8(162, 4), C8(163, 4), C8(164, 4), C8(165, 4), C8(166, 4), C8(167, 4), C8(168, 4), C8(169, 4), C8(170, 4), C8(171, 4), C8(172, 4), C8(173, 4), C8(174, 4), C8(175, 4), C8(176, 4), C8(177, 4), C8(178, 4), C8(179, 4), C8(180, 4), C8(181, 4), C8(182, 4), C8(183, 4), C8(184, 4), C8(185, 4), C8(186, 4), C8(187, 4), C8(188, 4), C8(189, 4), C8(190, 4), C8(191, 4), C8(192, 4), C8(193, 4), C8(194, 4), C8(195, 4), C8(196, 4), C8(197, 4), C8(198, 4), C8(199, 4), C8(200, 4), C8(201, 4), C8(202, 4), C8(203, 4), C8(204, 4), C8(205, 4), C8(206, 4), C8(207, 4), C8(208, 4), C8(209, 4), C8(210, 4), C8(211, 4), C8(212, 4), C8(213, 4), C8(214, 4), C8(215, 4), C8(216, 4), C8(217, 4), C8(218, 4), C8(219, 4), C8(220, 4), C8(221, 4), C8(222, 4), C8(223, 4), C8(224, 4), C8(225, 4), C8(226, 4), C8(227, 4), C8(228, 4), C8(229, 4), C8(230, 4), C8(231, 4), C8(232, 4), C8(233, 4), C8(234, 4), C8(235, 4), C8(236, 4), C8(237, 4), C8(238, 4), C8(239, 4), C8(240, 4), C8(241, 4), C8(242, 4), C8(243, 4), C8(244, 4), C8(245, 4), C8(246, 4), C8(247, 4), C8(248, 4), C8(249, 4), C8(250, 4), C8(251, 4), C8(252, 4), C8(253, 4), C8(254, 4), C8(255, 4), }; static const FbBits fbStipple4Bits[16] = { C4(0, 8), C4(1, 8), C4(2, 8), C4(3, 8), C4(4, 8), C4(5, 8), C4(6, 8), C4(7, 8), C4(8, 8), C4(9, 8), C4(10, 8), C4(11, 8), C4(12, 8), C4(13, 8), C4(14, 8), C4(15, 8), }; static const FbBits fbStipple2Bits[4] = { C2(0, 16), C2(1, 16), C2(2, 16), C2(3, 16), }; static const FbBits fbStipple1Bits[2] = { C1(0, 32), C1(1, 32), }; const FbBits *const fbStippleTable[] = { 0, fbStipple1Bits, fbStipple2Bits, 0, fbStipple4Bits, 0, 0, 0, fbStipple8Bits, }; xf86-video-intel-2.99.917/src/sna/fb/fbsegbits.h0000664000175000017500000001113012244635610016006 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #define isClipped(c,ul,lr) (((c) | ((c) - (ul)) | ((lr) - (c))) & 0x80008000) #define RROP(b,a,x) WRITE((b), FbDoRRop (READ(b), (a), (x))) static void BRESSOLID(DrawablePtr drawable, GCPtr gc, int dashOffset, int sdx, int sdy, int axis, int x1, int y1, int e, int e1, int e3, int len) { FbBits *dst; FbStride stride; int bpp, dx, dy; BITS *bits; FbStride major, minor; BITS xor = fb_gc(gc)->xor; fbGetDrawable(drawable, dst, stride, bpp, dx, dy); bits = (BITS *)(dst + (y1 + dy) * stride) + (x1 + dx); stride = stride * (sizeof(FbBits) / sizeof(BITS)); if (sdy < 0) stride = -stride; if (axis == X_AXIS) { major = sdx; minor = stride; } else { major = stride; minor = sdx; } while (len--) { WRITE(bits, xor); bits += major; e += e1; if (e >= 0) { bits += minor; e += e3; } } } static void BRESSOLIDR(DrawablePtr drawable, GCPtr gc, int dashOffset, int sdx, int sdy, int axis, int x1, int y1, int e, int e1, int e3, int len) { FbBits *dst; FbStride stride; int bpp, dx, dy; BITS *bits; FbStride major, minor; BITS and = fb_gc(gc)->and; BITS xor = fb_gc(gc)->xor; fbGetDrawable(drawable, dst, stride, bpp, dx, dy); bits = (BITS *)(dst + (y1 + dy) * stride) + (x1 + dx); stride = stride * (sizeof(FbBits) / sizeof(BITS)); if (sdy < 0) stride = -stride; if (axis == X_AXIS) { major = sdx; minor = stride; } else { major = stride; minor = sdx; } while (len--) { RROP(bits, and, xor); bits += major; e += e1; if (e >= 0) { bits += minor; e += e3; } } } static void BRESDASH(DrawablePtr drawable, GCPtr gc, int dashOffset, int sdx, int sdy, int axis, int x1, int y1, int e, int e1, int e3, int len) { FbBits *dst; FbStride stride; int bpp, dx, dy; BITS *bits; FbStride major, minor; FbDashDeclare; int dashlen; bool even; bool doOdd = gc->lineStyle == LineDoubleDash; BITS xorfg = fb_gc(gc)->xor; BITS xorbg = fb_gc(gc)->bgxor; fbGetDrawable(drawable, dst, stride, bpp, dx, dy); FbDashInit(gc, fb_gc(gc), dashOffset, dashlen, even); bits = ((BITS *) (dst + ((y1 + dy) * stride))) + (x1 + dx); stride = stride * (sizeof(FbBits) / sizeof(BITS)); if (sdy < 0) stride = -stride; if (axis == X_AXIS) { major = sdx; minor = stride; } else { major = stride; minor = sdx; } if (dashlen >= len) dashlen = len; if (doOdd) { if (!even) goto doubleOdd; for (;;) { len -= dashlen; while (dashlen--) { WRITE(bits, xorfg); bits += major; if ((e += e1) >= 0) { e += e3; bits += minor; } } if (!len) break; FbDashNextEven(dashlen); if (dashlen >= len) dashlen = len; doubleOdd: len -= dashlen; while (dashlen--) { WRITE(bits, xorbg); bits += major; if ((e += e1) >= 0) { e += e3; bits += minor; } } if (!len) break; FbDashNextOdd(dashlen); if (dashlen >= len) dashlen = len; } } else { if (!even) goto onOffOdd; for (;;) { len -= dashlen; while (dashlen--) { WRITE(bits, xorfg); bits += major; if ((e += e1) >= 0) { e += e3; bits += minor; } } if (!len) break; FbDashNextEven(dashlen); if (dashlen >= len) dashlen = len; onOffOdd: len -= dashlen; while (dashlen--) { bits += major; if ((e += e1) >= 0) { e += e3; bits += minor; } } if (!len) break; FbDashNextOdd(dashlen); if (dashlen >= len) dashlen = len; } } } #undef RROP #undef isClipped xf86-video-intel-2.99.917/src/sna/fb/fbclip.h0000664000175000017500000000521512400044327015275 00000000000000/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifndef FBCLIP_H #define FBCLIP_H extern const BoxRec * fbClipBoxes(const RegionRec *region, const BoxRec *box, const BoxRec **end); inline static bool box_intersect(BoxPtr a, const BoxRec *b) { if (a->x1 < b->x1) a->x1 = b->x1; if (a->x2 > b->x2) a->x2 = b->x2; if (a->x1 >= a->x2) return false; if (a->y1 < b->y1) a->y1 = b->y1; if (a->y2 > b->y2) a->y2 = b->y2; if (a->y1 >= a->y2) return false; return true; } #define run_box(b, c) \ DBG(("%s: box=(%d, %d), (%d, %d), clip=(%d, %d), (%d, %d)\n", \ __FUNCTION__, (b)->x1, (b)->y1, (b)->x2, (b)->y2, (c)->x1, (c)->y1, (c)->x2, (c)->y2)); \ if ((b)->y2 <= (c)->y1) break; \ if ((b)->x1 >= (c)->x2) continue; \ if ((b)->x2 <= (c)->x1) { if ((b)->y2 <= (c)->y2) break; continue; } static inline void fbDrawableRun(DrawablePtr d, GCPtr gc, const BoxRec *box, void (*func)(DrawablePtr, GCPtr, const BoxRec *b, void *data), void *data) { const BoxRec *c, *end; for (c = fbClipBoxes(gc->pCompositeClip, box, &end); c != end; c++) { BoxRec b; run_box(box, c); b = *box; if (box_intersect(&b, c)) func(d, gc, &b, data); } } static inline void fbDrawableRunUnclipped(DrawablePtr d, GCPtr gc, const BoxRec *box, void (*func)(DrawablePtr, GCPtr, const BoxRec *b, void *data), void *data) { const BoxRec *c, *end; for (c = fbClipBoxes(gc->pCompositeClip, box, &end); c != end; c++) { run_box(box, c); func(d, gc, c, data); } } #endif /* FBCLIP_H */ xf86-video-intel-2.99.917/src/sna/fb/sfb.h0000664000175000017500000000250312244635610014614 00000000000000/* And rename to avoid symbol clashes with UXA */ #define fbPolyArc sfbPolyArc #define fbBlt sfbBlt #define fbBltOne sfbBltOne #define fbBltPlane sfbBltPlane #define fbCopyNtoN sfbCopyNtoN #define fbCopy1toN sfbCopy1toN #define fbCopyNto1 sfbCopyNto1 #define fbCopyArea sfbCopyArea #define fbCopyPlane sfbCopyPlane #define fbFill sfbFill #define fbSolidBoxClipped sfbSolidBoxClipped #define fbPolyFillRect sfbPolyFillRect #define fbFillSpans sfbFillSpans #define fbPadPixmap sfbPadPixmap #define fbValidateGC sfbValidateGC #define fbGetSpans sfbGetSpans #define fbPolyGlyphBlt sfbPolyGlyphBlt #define fbImageGlyphBlt sfbImageGlyphBlt #define fbPutImage sfbPutImage #define fbPuXYtImage sfbPutXYImage #define fbGetImage sfbGetImage #define fbPolyLine sfbPolyLine #define fbFixCoordModePrevious sfbFixCoordModePrevious #define fbPolySegment sfbPolySegment #define fbBitmapToRegion sfbBitmapToRegion #define fbPolyPoint sfbPolyPoint #define fbPushImage sfbPushImage #define fbPushPixels sfbPushPixels #define fbSetSpans sfbSetSpans #define fbSegment sfbSegment #define fbSegment1 sfbSegment1 #define fbTransparentSpan sfbTransparentSpan #define fbStipple sfbStipple #define fbTile sfbTile #define fbReplicatePixel sfbReplicatePixel #define fbComposite sfbComposite #define image_from_pict simage_from_pict #define free_pixmap_pict sfree_pixmap_pict xf86-video-intel-2.99.917/src/sna/fb/fbbltone.c0000664000175000017500000002431212244635610015632 00000000000000/* * Copyright © 1998 Keith Packard * Copyright © 2012 Intel Corporation * * Permission to use, copy, modify, distribute, and sell this software and its * documentation for any purpose is hereby granted without fee, provided that * the above copyright notice appear in all copies and that both that * copyright notice and this permission notice appear in supporting * documentation, and that the name of Keith Packard not be used in * advertising or publicity pertaining to distribution of the software without * specific, written prior permission. Keith Packard makes no * representations about the suitability of this software for any purpose. It * is provided "as is" without express or implied warranty. * * KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO * EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ #include "fb.h" #ifdef __clang__ /* shift overflow is intentional */ #pragma clang diagnostic ignored "-Wshift-overflow" #endif /* * Example: srcX = 13 dstX = 8 (FB unit 32 dstBpp 8) * * **** **** **** **** **** **** **** **** * ^ * ******** ******** ******** ******** * ^ * leftShift = 12 * rightShift = 20 * * Example: srcX = 0 dstX = 8 (FB unit 32 dstBpp 8) * * **** **** **** **** **** **** **** **** * ^ * ******** ******** ******** ******** * ^ * * leftShift = 24 * rightShift = 8 */ #define LoadBits {\ if (leftShift) { \ bitsRight = (src < srcEnd ? READ(src++) : 0); \ bits = (FbStipLeft (bitsLeft, leftShift) | \ FbStipRight(bitsRight, rightShift)); \ bitsLeft = bitsRight; \ } else \ bits = (src < srcEnd ? READ(src++) : 0); \ } #define LaneCases1(n,a) case n: FbLaneCase(n,a); break #define LaneCases2(n,a) LaneCases1(n,a); LaneCases1(n+1,a) #define LaneCases4(n,a) LaneCases2(n,a); LaneCases2(n+2,a) #define LaneCases8(n,a) LaneCases4(n,a); LaneCases4(n+4,a) #define LaneCases16(n,a) LaneCases8(n,a); LaneCases8(n+8,a) #define LaneCases32(n,a) LaneCases16(n,a); LaneCases16(n+16,a) #define LaneCases64(n,a) LaneCases32(n,a); LaneCases32(n+32,a) #define LaneCases128(n,a) LaneCases64(n,a); LaneCases64(n+64,a) #define LaneCases256(n,a) LaneCases128(n,a); LaneCases128(n+128,a) #define LaneCases(a) LaneCases16(0,a) static const CARD8 fb8Lane[16] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; static const CARD8 fb16Lane[16] = { 0, 3, 12, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const CARD8 fb32Lane[16] = { 0, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const CARD8 * const fbLaneTable[33] = { 0, 0, 0, 0, 0, 0, 0, 0, fb8Lane, 0, 0, 0, 0, 0, 0, 0, fb16Lane, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, fb32Lane }; void fbBltOne(FbStip * src, FbStride srcStride, /* FbStip units per scanline */ int srcX, /* bit position of source */ FbBits * dst, FbStride dstStride, /* FbBits units per scanline */ int dstX, /* bit position of dest */ int dstBpp, /* bits per destination unit */ int width, /* width in bits of destination */ int height, /* height in scanlines */ FbBits fgand, /* rrop values */ FbBits fgxor, FbBits bgand, FbBits bgxor) { const FbBits *fbBits; FbBits *srcEnd; int pixelsPerDst; /* dst pixels per FbBits */ int unitsPerSrc; /* src patterns per FbStip */ int leftShift, rightShift; /* align source with dest */ FbBits startmask, endmask; /* dest scanline masks */ FbStip bits = 0, bitsLeft, bitsRight; /* source bits */ FbStip left; FbBits mask; int nDst; /* dest longwords (w.o. end) */ int w; int n, nmiddle; int dstS; /* stipple-relative dst X coordinate */ Bool copy; /* accelerate dest-invariant */ Bool transparent; /* accelerate 0 nop */ int srcinc; /* source units consumed */ Bool endNeedsLoad = FALSE; /* need load for endmask */ const CARD8 *fbLane; int startbyte, endbyte; /* * Do not read past the end of the buffer! */ srcEnd = src + height * srcStride; /* * Number of destination units in FbBits == number of stipple pixels * used each time */ pixelsPerDst = FB_UNIT / dstBpp; /* * Number of source stipple patterns in FbStip */ unitsPerSrc = FB_STIP_UNIT / pixelsPerDst; copy = FALSE; transparent = FALSE; if (bgand == 0 && fgand == 0) copy = TRUE; else if (bgand == FB_ALLONES && bgxor == 0) transparent = TRUE; /* * Adjust source and dest to nearest FbBits boundary */ src += srcX >> FB_STIP_SHIFT; dst += dstX >> FB_SHIFT; srcX &= FB_STIP_MASK; dstX &= FB_MASK; FbMaskBitsBytes(dstX, width, copy, startmask, startbyte, nmiddle, endmask, endbyte); /* * Compute effective dest alignment requirement for * source -- must align source to dest unit boundary */ dstS = dstX / dstBpp; /* * Compute shift constants for effective alignement */ if (srcX >= dstS) { leftShift = srcX - dstS; rightShift = FB_STIP_UNIT - leftShift; } else { rightShift = dstS - srcX; leftShift = FB_STIP_UNIT - rightShift; } /* * Get pointer to stipple mask array for this depth */ fbBits = 0; /* unused */ if (pixelsPerDst <= 8) fbBits = fbStippleTable[pixelsPerDst]; fbLane = 0; if (transparent && fgand == 0 && dstBpp >= 8) fbLane = fbLaneTable[dstBpp]; /* * Compute total number of destination words written, but * don't count endmask */ nDst = nmiddle; if (startmask) nDst++; dstStride -= nDst; /* * Compute total number of source words consumed */ srcinc = (nDst + unitsPerSrc - 1) / unitsPerSrc; if (srcX > dstS) srcinc++; if (endmask) { endNeedsLoad = nDst % unitsPerSrc == 0; if (endNeedsLoad) srcinc++; } srcStride -= srcinc; /* * Copy rectangle */ while (height--) { w = nDst; /* total units across scanline */ n = unitsPerSrc; /* units avail in single stipple */ if (n > w) n = w; bitsLeft = 0; if (srcX > dstS) bitsLeft = READ(src++); if (n) { /* * Load first set of stipple bits */ LoadBits; /* * Consume stipple bits for startmask */ if (startmask) { mask = fbBits[FbLeftStipBits(bits, pixelsPerDst)]; if (fbLane) { fbTransparentSpan(dst, mask & startmask, fgxor, 1); } else { if (mask || !transparent) FbDoLeftMaskByteStippleRRop(dst, mask, fgand, fgxor, bgand, bgxor, startbyte, startmask); } bits = FbStipLeft(bits, pixelsPerDst); dst++; n--; w--; } /* * Consume stipple bits across scanline */ for (;;) { w -= n; if (copy) { while (n--) { #if FB_UNIT > 32 if (pixelsPerDst == 16) mask = FbStipple16Bits(FbLeftStipBits(bits, 16)); else #endif mask = fbBits[FbLeftStipBits(bits, pixelsPerDst)]; WRITE(dst, FbOpaqueStipple(mask, fgxor, bgxor)); dst++; bits = FbStipLeft(bits, pixelsPerDst); } } else { if (fbLane) { while (bits && n) { switch (fbLane[FbLeftStipBits(bits, pixelsPerDst)]) { LaneCases((CARD8 *) dst); } bits = FbStipLeft(bits, pixelsPerDst); dst++; n--; } dst += n; } else { while (n--) { left = FbLeftStipBits(bits, pixelsPerDst); if (left || !transparent) { mask = fbBits[left]; WRITE(dst, FbStippleRRop(READ(dst), mask, fgand, fgxor, bgand, bgxor)); } dst++; bits = FbStipLeft(bits, pixelsPerDst); } } } if (!w) break; /* * Load another set and reset number of available units */ LoadBits; n = unitsPerSrc; if (n > w) n = w; } } /* * Consume stipple bits for endmask */ if (endmask) { if (endNeedsLoad) { LoadBits; } mask = fbBits[FbLeftStipBits(bits, pixelsPerDst)]; if (fbLane) { fbTransparentSpan(dst, mask & endmask, fgxor, 1); } else { if (mask || !transparent) FbDoRightMaskByteStippleRRop(dst, mask, fgand, fgxor, bgand, bgxor, endbyte, endmask); } } dst += dstStride; src += srcStride; } } /* * Not very efficient, but simple -- copy a single plane * from an N bit image to a 1 bit image */ void fbBltPlane(FbBits * src, FbStride srcStride, int srcX, int srcBpp, FbStip * dst, FbStride dstStride, int dstX, int width, int height, FbStip fgand, FbStip fgxor, FbStip bgand, FbStip bgxor, Pixel planeMask) { FbBits *s; FbBits pm; FbBits srcMask; FbBits srcMaskFirst; FbBits srcMask0 = 0; FbBits srcBits; FbStip dstBits; FbStip *d; FbStip dstMask; FbStip dstMaskFirst; FbStip dstUnion; int w; int wt; if (!width) return; src += srcX >> FB_SHIFT; srcX &= FB_MASK; dst += dstX >> FB_STIP_SHIFT; dstX &= FB_STIP_MASK; w = width / srcBpp; pm = fbReplicatePixel(planeMask, srcBpp); srcMaskFirst = pm & FbBitsMask(srcX, srcBpp); srcMask0 = pm & FbBitsMask(0, srcBpp); dstMaskFirst = FbStipMask(dstX, 1); while (height--) { d = dst; dst += dstStride; s = src; src += srcStride; srcMask = srcMaskFirst; srcBits = READ(s++); dstMask = dstMaskFirst; dstUnion = 0; dstBits = 0; wt = w; while (wt--) { if (!srcMask) { srcBits = READ(s++); srcMask = srcMask0; } if (!dstMask) { WRITE(d, FbStippleRRopMask(READ(d), dstBits, fgand, fgxor, bgand, bgxor, dstUnion)); d++; dstMask = FbStipMask(0, 1); dstUnion = 0; dstBits = 0; } if (srcBits & srcMask) dstBits |= dstMask; dstUnion |= dstMask; if (srcBpp == FB_UNIT) srcMask = 0; else srcMask = FbScrRight(srcMask, srcBpp); dstMask = FbStipRight(dstMask, 1); } if (dstUnion) WRITE(d, FbStippleRRopMask(READ(d), dstBits, fgand, fgxor, bgand, bgxor, dstUnion)); } } xf86-video-intel-2.99.917/src/sna/sna_trapezoids_boxes.c0000664000175000017500000011471212432737457017714 00000000000000/* * Copyright (c) 2007 David Turner * Copyright (c) 2008 M Joonas Pihlaja * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_trapezoids.h" #include "fb/fbpict.h" #include /* TODO: Emit unantialiased and MSAA triangles. */ #ifndef MAX #define MAX(x,y) ((x) >= (y) ? (x) : (y)) #endif #ifndef MIN #define MIN(x,y) ((x) <= (y) ? (x) : (y)) #endif #define region_count(r) ((r)->data ? (r)->data->numRects : 1) #define region_boxes(r) ((r)->data ? (BoxPtr)((r)->data + 1) : &(r)->extents) #if HAS_DEBUG_FULL static void _assert_pixmap_contains_box(PixmapPtr pixmap, BoxPtr box, const char *function) { if (box->x1 < 0 || box->y1 < 0 || box->x2 > pixmap->drawable.width || box->y2 > pixmap->drawable.height) { FatalError("%s: damage box is beyond the pixmap: box=(%d, %d), (%d, %d), pixmap=(%d, %d)\n", function, box->x1, box->y1, box->x2, box->y2, pixmap->drawable.width, pixmap->drawable.height); } } #define assert_pixmap_contains_box(p, b) _assert_pixmap_contains_box(p, b, __FUNCTION__) #else #define assert_pixmap_contains_box(p, b) #endif static void apply_damage(struct sna_composite_op *op, RegionPtr region) { DBG(("%s: damage=%p, region=%dx[(%d, %d), (%d, %d)]\n", __FUNCTION__, op->damage, region_num_rects(region), region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); if (op->damage == NULL) return; RegionTranslate(region, op->dst.x, op->dst.y); assert_pixmap_contains_box(op->dst.pixmap, RegionExtents(region)); if (sna_damage_add_to_pixmap(op->damage, region, op->dst.pixmap)) op->damage = NULL; } static void _apply_damage_box(struct sna_composite_op *op, const BoxRec *box) { BoxRec r; r.x1 = box->x1 + op->dst.x; r.x2 = box->x2 + op->dst.x; r.y1 = box->y1 + op->dst.y; r.y2 = box->y2 + op->dst.y; assert_pixmap_contains_box(op->dst.pixmap, &r); sna_damage_add_box(op->damage, &r); } inline static void apply_damage_box(struct sna_composite_op *op, const BoxRec *box) { if (op->damage) _apply_damage_box(op, box); } bool composite_aligned_boxes(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int ntrap, const xTrapezoid *traps, bool force_fallback) { BoxRec stack_boxes[64], *boxes; pixman_region16_t region, clip; struct sna_composite_op tmp; int16_t dst_x, dst_y; bool ret = true; int dx, dy, n, num_boxes; if (NO_ALIGNED_BOXES) return false; DBG(("%s: pixmap=%ld, nboxes=%d, dx=(%d, %d)\n", __FUNCTION__, get_drawable_pixmap(dst->pDrawable)->drawable.serialNumber, ntrap, dst->pDrawable->x, dst->pDrawable->y)); boxes = stack_boxes; if (ntrap > (int)ARRAY_SIZE(stack_boxes)) { boxes = malloc(sizeof(BoxRec)*ntrap); if (boxes == NULL) return false; } dx = dst->pDrawable->x; dy = dst->pDrawable->y; region.extents.x1 = region.extents.y1 = 32767; region.extents.x2 = region.extents.y2 = -32767; num_boxes = 0; for (n = 0; n < ntrap; n++) { boxes[num_boxes].x1 = dx + pixman_fixed_to_int(traps[n].left.p1.x + pixman_fixed_1_minus_e/2); boxes[num_boxes].y1 = dy + pixman_fixed_to_int(traps[n].top + pixman_fixed_1_minus_e/2); boxes[num_boxes].x2 = dx + pixman_fixed_to_int(traps[n].right.p2.x + pixman_fixed_1_minus_e/2); boxes[num_boxes].y2 = dy + pixman_fixed_to_int(traps[n].bottom + pixman_fixed_1_minus_e/2); if (boxes[num_boxes].x1 >= boxes[num_boxes].x2) continue; if (boxes[num_boxes].y1 >= boxes[num_boxes].y2) continue; if (boxes[num_boxes].x1 < region.extents.x1) region.extents.x1 = boxes[num_boxes].x1; if (boxes[num_boxes].x2 > region.extents.x2) region.extents.x2 = boxes[num_boxes].x2; if (boxes[num_boxes].y1 < region.extents.y1) region.extents.y1 = boxes[num_boxes].y1; if (boxes[num_boxes].y2 > region.extents.y2) region.extents.y2 = boxes[num_boxes].y2; num_boxes++; } if (num_boxes == 0) goto free_boxes; trapezoid_origin(&traps[0].left, &dst_x, &dst_y); DBG(("%s: extents (%d, %d), (%d, %d) offset of (%d, %d), origin (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2, region.extents.x1 - boxes[0].x1, region.extents.y1 - boxes[0].y1, dst_x, dst_y)); if (!sna_compute_composite_region(&clip, src, NULL, dst, src_x + region.extents.x1 - dst_x - dx, src_y + region.extents.y1 - dst_y - dy, 0, 0, region.extents.x1 - dx, region.extents.y1 - dy, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1)) { DBG(("%s: trapezoids do not intersect drawable clips\n", __FUNCTION__)) ; goto done; } if (op == PictOpClear && sna->clear) src = sna->clear; DBG(("%s: clipped extents (%d, %d), (%d, %d); now offset by (%d, %d), orgin (%d, %d)\n", __FUNCTION__, clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2, clip.extents.x1 - boxes[0].x1, clip.extents.y1 - boxes[0].y1, dst_x, dst_y)); if (force_fallback || !sna->render.composite(sna, op, src, NULL, dst, src_x + clip.extents.x1 - dst_x, src_y + clip.extents.y1 - dst_y, 0, 0, clip.extents.x1, clip.extents.y1, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1, (clip.data || num_boxes > 1) ? COMPOSITE_PARTIAL : 0, memset(&tmp, 0, sizeof(tmp)))) { unsigned int flags; const pixman_box16_t *b; int i, count; DBG(("%s: composite render op not supported\n", __FUNCTION__)); flags = MOVE_READ | MOVE_WRITE; if (op <= PictOpSrc) { flags |= MOVE_INPLACE_HINT; if (n == 1) flags &= ~MOVE_READ; } if (!sna_drawable_move_region_to_cpu(dst->pDrawable, &clip, flags)) goto done; if (dst->alphaMap && !sna_drawable_move_to_cpu(dst->alphaMap->pDrawable, MOVE_READ | MOVE_WRITE)) goto done; if (src->pDrawable) { if (!sna_drawable_move_to_cpu(src->pDrawable, MOVE_READ)) goto done; if (src->alphaMap && !sna_drawable_move_to_cpu(src->alphaMap->pDrawable, MOVE_READ)) goto done; } DBG(("%s: fbComposite()\n", __FUNCTION__)); src_x -= dst_x - dx; src_y -= dst_y - dy; if (maskFormat) { pixman_region_init_rects(®ion, boxes, num_boxes); RegionIntersect(®ion, ®ion, &clip); if (sigtrap_get() == 0) { b = region_rects(®ion); count = region_num_rects(®ion); for (i = 0; i < count; i++) { fbComposite(op, src, NULL, dst, src_x + b[i].x1, src_y + b[i].y1, 0, 0, b[i].x1, b[i].y1, b[i].x2 - b[i].x1, b[i].y2 - b[i].y1); } sigtrap_put(); } pixman_region_fini(®ion); } else { for (n = 0; n < num_boxes; n++) { pixman_region_init_rects(®ion, &boxes[n], 1); RegionIntersect(®ion, ®ion, &clip); b = region_rects(®ion); count = region_num_rects(®ion); if (sigtrap_get() == 0) { for (i = 0; i < count; i++) { fbComposite(op, src, NULL, dst, src_x + b[i].x1, src_y + b[i].y1, 0, 0, b[i].x1, b[i].y1, b[i].x2 - b[i].x1, b[i].y2 - b[i].y1); } sigtrap_put(); } pixman_region_fini(®ion); pixman_region_fini(®ion); } } ret = true; goto done; } if (maskFormat || (op == PictOpSrc || op == PictOpClear) || num_boxes == 1) { pixman_region_init_rects(®ion, boxes, num_boxes); RegionIntersect(®ion, ®ion, &clip); if (region_num_rects(®ion)) { tmp.boxes(sna, &tmp, region_rects(®ion), region_num_rects(®ion)); apply_damage(&tmp, ®ion); } pixman_region_fini(®ion); } else { for (n = 0; n < num_boxes; n++) { pixman_region_init_rects(®ion, &boxes[n], 1); RegionIntersect(®ion, ®ion, &clip); if (region_num_rects(®ion)) { tmp.boxes(sna, &tmp, region_rects(®ion), region_num_rects(®ion)); apply_damage(&tmp, ®ion); } pixman_region_fini(®ion); } } tmp.done(sna, &tmp); done: REGION_UNINIT(NULL, &clip); free_boxes: if (boxes != stack_boxes) free(boxes); return ret; } static inline int grid_coverage(int samples, pixman_fixed_t f) { return (samples * pixman_fixed_frac(f) + pixman_fixed_1/2) / pixman_fixed_1; } inline static void composite_unaligned_box(struct sna *sna, struct sna_composite_spans_op *tmp, const BoxRec *box, float opacity, pixman_region16_t *clip) { assert(opacity != 0.); if (clip) { pixman_region16_t region; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); if (region_num_rects(®ion)) tmp->boxes(sna, tmp, region_rects(®ion), region_num_rects(®ion), opacity); pixman_region_fini(®ion); } else tmp->box(sna, tmp, box, opacity); } inline static void composite_unaligned_trap_row(struct sna *sna, struct sna_composite_spans_op *tmp, const xTrapezoid *trap, int dx, int y1, int y2, int covered, pixman_region16_t *clip) { BoxRec box; int opacity; int x1, x2; #define u8_to_float(x) ((x) * (1.f/255)) if (covered == 0) return; x1 = dx + pixman_fixed_to_int(trap->left.p1.x); x2 = dx + pixman_fixed_to_int(trap->right.p1.x); if (clip) { if (y2 > clip->extents.y2) y2 = clip->extents.y2; if (y1 < clip->extents.y1) y1 = clip->extents.y1; if (y1 >= y2) return; if (x2 < clip->extents.x1 || x1 > clip->extents.x2) return; } box.y1 = y1; box.y2 = y2; if (x1 == x2) { box.x1 = x1; box.x2 = x2 + 1; opacity = covered; opacity *= grid_coverage(SAMPLES_X, trap->right.p1.x) - grid_coverage(SAMPLES_X, trap->left.p1.x); if (opacity) composite_unaligned_box(sna, tmp, &box, u8_to_float(opacity), clip); } else { if (pixman_fixed_frac(trap->left.p1.x)) { box.x1 = x1; box.x2 = ++x1; opacity = covered; opacity *= SAMPLES_X - grid_coverage(SAMPLES_X, trap->left.p1.x); if (opacity) composite_unaligned_box(sna, tmp, &box, u8_to_float(opacity), clip); } if (x2 > x1) { box.x1 = x1; box.x2 = x2; composite_unaligned_box(sna, tmp, &box, covered == SAMPLES_Y ? 1. : u8_to_float(covered*SAMPLES_X), clip); } if (pixman_fixed_frac(trap->right.p1.x)) { box.x1 = x2; box.x2 = x2 + 1; opacity = covered; opacity *= grid_coverage(SAMPLES_X, trap->right.p1.x); if (opacity) composite_unaligned_box(sna, tmp, &box, u8_to_float(opacity), clip); } } } flatten static void composite_unaligned_trap(struct sna *sna, struct sna_composite_spans_op *tmp, const xTrapezoid *trap, int dx, int dy, pixman_region16_t *clip) { int y1, y2; y1 = dy + pixman_fixed_to_int(trap->top); y2 = dy + pixman_fixed_to_int(trap->bottom); DBG(("%s: y1=%d, y2=%d\n", __FUNCTION__, y1, y2)); if (y1 == y2) { composite_unaligned_trap_row(sna, tmp, trap, dx, y1, y1 + 1, grid_coverage(SAMPLES_Y, trap->bottom) - grid_coverage(SAMPLES_Y, trap->top), clip); } else { if (pixman_fixed_frac(trap->top)) { composite_unaligned_trap_row(sna, tmp, trap, dx, y1, y1 + 1, SAMPLES_Y - grid_coverage(SAMPLES_Y, trap->top), clip); y1++; } if (y2 > y1) composite_unaligned_trap_row(sna, tmp, trap, dx, y1, y2, SAMPLES_Y, clip); if (pixman_fixed_frac(trap->bottom)) composite_unaligned_trap_row(sna, tmp, trap, dx, y2, y2 + 1, grid_coverage(SAMPLES_Y, trap->bottom), clip); } if (tmp->base.damage) { BoxRec box; box.x1 = dx + pixman_fixed_to_int(trap->left.p1.x); box.x2 = dx + pixman_fixed_to_int(trap->right.p1.x + pixman_fixed_1_minus_e); box.y1 = dy + pixman_fixed_to_int(trap->top); box.y2 = dy + pixman_fixed_to_int(trap->bottom + pixman_fixed_1_minus_e); if (clip) { pixman_region16_t region; pixman_region_init_rects(®ion, &box, 1); RegionIntersect(®ion, ®ion, clip); if (region_num_rects(®ion)) apply_damage(&tmp->base, ®ion); RegionUninit(®ion); } else apply_damage_box(&tmp->base, &box); } } inline static void blt_opacity(PixmapPtr scratch, int x1, int x2, int y, int h, uint8_t opacity) { uint8_t *ptr; if (opacity == 0xff) return; if (x1 < 0) x1 = 0; if (x2 > scratch->drawable.width) x2 = scratch->drawable.width; if (x1 >= x2) return; x2 -= x1; ptr = scratch->devPrivate.ptr; ptr += scratch->devKind * y; ptr += x1; do { if (x2 == 1) *ptr = opacity; else memset(ptr, opacity, x2); ptr += scratch->devKind; } while (--h); } static void blt_unaligned_box_row(PixmapPtr scratch, BoxPtr extents, const xTrapezoid *trap, int y1, int y2, int covered) { int x1, x2; if (y2 > scratch->drawable.height) y2 = scratch->drawable.height; if (y1 < 0) y1 = 0; if (y1 >= y2) return; y2 -= y1; x1 = pixman_fixed_to_int(trap->left.p1.x); x2 = pixman_fixed_to_int(trap->right.p1.x); x1 -= extents->x1; x2 -= extents->x1; if (x1 == x2) { blt_opacity(scratch, x1, x1+1, y1, y2, covered * (grid_coverage(SAMPLES_X, trap->right.p1.x) - grid_coverage(SAMPLES_X, trap->left.p1.x))); } else { if (pixman_fixed_frac(trap->left.p1.x)) { blt_opacity(scratch, x1, x1 + 1, y1, y2, covered * (SAMPLES_X - grid_coverage(SAMPLES_X, trap->left.p1.x))); x1++; } if (x2 > x1) { blt_opacity(scratch, x1, x2, y1, y2, covered*SAMPLES_X); } if (pixman_fixed_frac(trap->right.p1.x)) blt_opacity(scratch, x2, x2 + 1, y1, y2, covered * grid_coverage(SAMPLES_X, trap->right.p1.x)); } } inline static void lerp32_opacity(PixmapPtr scratch, uint32_t color, int16_t x, int16_t w, int16_t y, int16_t h, uint8_t opacity) { uint32_t *ptr; int stride, i; ptr = (uint32_t*)((uint8_t *)scratch->devPrivate.ptr + scratch->devKind * y); ptr += x; stride = scratch->devKind / 4; if (opacity == 0xff) { if ((w | h) == 1) { *ptr = color; } else { if (w < 16) { do { for (i = 0; i < w; i++) ptr[i] = color; ptr += stride; } while (--h); } else { pixman_fill(ptr, stride, 32, 0, 0, w, h, color); } } } else { if ((w | h) == 1) { *ptr = lerp8x4(color, opacity, *ptr); } else if (w == 1) { do { *ptr = lerp8x4(color, opacity, *ptr); ptr += stride; } while (--h); } else{ do { for (i = 0; i < w; i++) ptr[i] = lerp8x4(color, opacity, ptr[i]); ptr += stride; } while (--h); } } } static void lerp32_unaligned_box_row(PixmapPtr scratch, uint32_t color, const BoxRec *extents, const xTrapezoid *trap, int16_t dx, int16_t y, int16_t h, uint8_t covered) { int16_t x1 = pixman_fixed_to_int(trap->left.p1.x) + dx; uint16_t fx1 = grid_coverage(SAMPLES_X, trap->left.p1.x); int16_t x2 = pixman_fixed_to_int(trap->right.p2.x) + dx; uint16_t fx2 = grid_coverage(SAMPLES_X, trap->right.p2.x); if (x1 < extents->x1) x1 = extents->x1, fx1 = 0; if (x2 >= extents->x2) x2 = extents->x2, fx2 = 0; DBG(("%s: x=(%d.%d, %d.%d), y=%dx%d, covered=%d\n", __FUNCTION__, x1, fx1, x2, fx2, y, h, covered)); if (x1 < x2) { if (fx1) { lerp32_opacity(scratch, color, x1, 1, y, h, covered * (SAMPLES_X - fx1)); x1++; } if (x2 > x1) { lerp32_opacity(scratch, color, x1, x2-x1, y, h, covered*SAMPLES_X); } if (fx2) { lerp32_opacity(scratch, color, x2, 1, y, h, covered * fx2); } } else if (x1 == x2 && fx2 > fx1) { lerp32_opacity(scratch, color, x1, 1, y, h, covered * (fx2 - fx1)); } } struct pixman_inplace { pixman_image_t *image, *source, *mask; uint32_t color; uint32_t *bits; int dx, dy; int sx, sy; uint8_t op; }; inline static void pixsolid_opacity(struct pixman_inplace *pi, int16_t x, int16_t w, int16_t y, int16_t h, uint8_t opacity) { if (opacity == 0xff) *pi->bits = pi->color; else *pi->bits = mul_4x8_8(pi->color, opacity); sna_image_composite(pi->op, pi->source, NULL, pi->image, 0, 0, 0, 0, pi->dx + x, pi->dy + y, w, h); } static void pixsolid_unaligned_box_row(struct pixman_inplace *pi, const BoxRec *extents, const xTrapezoid *trap, int16_t y, int16_t h, uint8_t covered) { int16_t x1 = pixman_fixed_to_int(trap->left.p1.x); uint16_t fx1 = grid_coverage(SAMPLES_X, trap->left.p1.x); int16_t x2 = pixman_fixed_to_int(trap->right.p1.x); uint16_t fx2 = grid_coverage(SAMPLES_X, trap->right.p1.x); if (x1 < extents->x1) x1 = extents->x1, fx1 = 0; if (x2 >= extents->x2) x2 = extents->x2, fx2 = 0; if (x1 < x2) { if (fx1) { pixsolid_opacity(pi, x1, 1, y, h, covered * (SAMPLES_X - fx1)); x1++; } if (x2 > x1) pixsolid_opacity(pi, x1, x2-x1, y, h, covered*SAMPLES_X); if (fx2) pixsolid_opacity(pi, x2, 1, y, h, covered * fx2); } else if (x1 == x2 && fx2 > fx1) { pixsolid_opacity(pi, x1, 1, y, h, covered * (fx2 - fx1)); } } static bool composite_unaligned_boxes_inplace__solid(struct sna *sna, CARD8 op, uint32_t color, PicturePtr dst, int n, const xTrapezoid *t, bool force_fallback) { PixmapPtr pixmap; int16_t dx, dy; DBG(("%s: force=%d, is_gpu=%d, op=%d, color=%x\n", __FUNCTION__, force_fallback, is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS), op, color)); if (!force_fallback && is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS)) { DBG(("%s: fallback -- can not perform operation in place, destination busy\n", __FUNCTION__)); return false; } /* XXX a8 boxes */ if (!(dst->format == PICT_a8r8g8b8 || dst->format == PICT_x8r8g8b8)) { DBG(("%s: fallback -- can not perform operation in place, unhanbled format %08lx\n", __FUNCTION__, (long)dst->format)); goto pixman; } pixmap = get_drawable_pixmap(dst->pDrawable); get_drawable_deltas(dst->pDrawable, pixmap, &dx, &dy); if (op == PictOpOver && (color >> 24) == 0xff) op = PictOpSrc; if (op == PictOpOver || op == PictOpAdd) { struct sna_pixmap *priv = sna_pixmap(pixmap); if (priv && priv->clear && priv->clear_color == 0) op = PictOpSrc; } switch (op) { case PictOpSrc: break; default: DBG(("%s: fallback -- can not perform op [%d] in place\n", __FUNCTION__, op)); goto pixman; } DBG(("%s: inplace operation on argb32 destination x %d\n", __FUNCTION__, n)); do { RegionRec clip; const BoxRec *extents; int count; clip.extents.x1 = pixman_fixed_to_int(t->left.p1.x); clip.extents.x2 = pixman_fixed_to_int(t->right.p1.x + pixman_fixed_1_minus_e); clip.extents.y1 = pixman_fixed_to_int(t->top); clip.extents.y2 = pixman_fixed_to_int(t->bottom + pixman_fixed_1_minus_e); clip.data = NULL; if (!sna_compute_composite_region(&clip, NULL, NULL, dst, 0, 0, 0, 0, clip.extents.x1, clip.extents.y1, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1)) continue; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, &clip, MOVE_WRITE | MOVE_READ)) { RegionUninit(&clip); continue; } if (sigtrap_get() == 0) { RegionTranslate(&clip, dx, dy); count = region_num_rects(&clip); extents = region_rects(&clip); while (count--) { int16_t y1 = dy + pixman_fixed_to_int(t->top); uint16_t fy1 = pixman_fixed_frac(t->top); int16_t y2 = dy + pixman_fixed_to_int(t->bottom); uint16_t fy2 = pixman_fixed_frac(t->bottom); DBG(("%s: t=(%d, %d), (%d, %d), extents (%d, %d), (%d, %d)\n", __FUNCTION__, pixman_fixed_to_int(t->left.p1.x), pixman_fixed_to_int(t->top), pixman_fixed_to_int(t->right.p2.x), pixman_fixed_to_int(t->bottom), extents->x1, extents->y1, extents->x2, extents->y2)); if (y1 < extents->y1) y1 = extents->y1, fy1 = 0; if (y2 >= extents->y2) y2 = extents->y2, fy2 = 0; if (y1 < y2) { if (fy1) { lerp32_unaligned_box_row(pixmap, color, extents, t, dx, y1, 1, SAMPLES_Y - grid_coverage(SAMPLES_Y, fy1)); y1++; } if (y2 > y1) lerp32_unaligned_box_row(pixmap, color, extents, t, dx, y1, y2 - y1, SAMPLES_Y); if (fy2) lerp32_unaligned_box_row(pixmap, color, extents, t, dx, y2, 1, grid_coverage(SAMPLES_Y, fy2)); } else if (y1 == y2 && fy2 > fy1) { lerp32_unaligned_box_row(pixmap, color, extents, t, dx, y1, 1, grid_coverage(SAMPLES_Y, fy2) - grid_coverage(SAMPLES_Y, fy1)); } extents++; } sigtrap_put(); } RegionUninit(&clip); } while (--n && t++); return true; pixman: do { struct pixman_inplace pi; RegionRec clip; const BoxRec *extents; int count; clip.extents.x1 = pixman_fixed_to_int(t->left.p1.x); clip.extents.x2 = pixman_fixed_to_int(t->right.p1.x + pixman_fixed_1_minus_e); clip.extents.y1 = pixman_fixed_to_int(t->top); clip.extents.y2 = pixman_fixed_to_int(t->bottom + pixman_fixed_1_minus_e); clip.data = NULL; if (!sna_compute_composite_region(&clip, NULL, NULL, dst, 0, 0, 0, 0, clip.extents.x1, clip.extents.y1, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1)) continue; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, &clip, MOVE_WRITE | MOVE_READ)) { RegionUninit(&clip); continue; } pi.image = image_from_pict(dst, false, &pi.dx, &pi.dy); pi.source = pixman_image_create_bits(PIXMAN_a8r8g8b8, 1, 1, NULL, 0); pixman_image_set_repeat(pi.source, PIXMAN_REPEAT_NORMAL); pi.bits = pixman_image_get_data(pi.source); pi.color = color; pi.op = op; if (sigtrap_get() == 0) { count = region_num_rects(&clip); extents = region_rects(&clip); while (count--) { int16_t y1 = pixman_fixed_to_int(t->top); uint16_t fy1 = pixman_fixed_frac(t->top); int16_t y2 = pixman_fixed_to_int(t->bottom); uint16_t fy2 = pixman_fixed_frac(t->bottom); if (y1 < extents->y1) y1 = extents->y1, fy1 = 0; if (y2 >= extents->y2) y2 = extents->y2, fy2 = 0; if (y1 < y2) { if (fy1) { pixsolid_unaligned_box_row(&pi, extents, t, y1, 1, SAMPLES_Y - grid_coverage(SAMPLES_Y, fy1)); y1++; } if (y2 > y1) pixsolid_unaligned_box_row(&pi, extents, t, y1, y2 - y1, SAMPLES_Y); if (fy2) pixsolid_unaligned_box_row(&pi, extents, t, y2, 1, grid_coverage(SAMPLES_Y, fy2)); } else if (y1 == y2 && fy2 > fy1) { pixsolid_unaligned_box_row(&pi, extents, t, y1, 1, grid_coverage(SAMPLES_Y, fy2) - grid_coverage(SAMPLES_Y, fy1)); } extents++; } sigtrap_put(); } RegionUninit(&clip); pixman_image_unref(pi.image); pixman_image_unref(pi.source); } while (--n && t++); return true; } inline static void pixmask_opacity(struct pixman_inplace *pi, int16_t x, int16_t w, int16_t y, int16_t h, uint8_t opacity) { if (opacity == 0xff) { pixman_image_composite(pi->op, pi->source, NULL, pi->image, pi->sx + x, pi->sy + y, 0, 0, pi->dx + x, pi->dy + y, w, h); } else { *pi->bits = opacity; pixman_image_composite(pi->op, pi->source, pi->mask, pi->image, pi->sx + x, pi->sy + y, 0, 0, pi->dx + x, pi->dy + y, w, h); } } static void pixmask_unaligned_box_row(struct pixman_inplace *pi, const BoxRec *extents, const xTrapezoid *trap, int16_t y, int16_t h, uint8_t covered) { int16_t x1 = pixman_fixed_to_int(trap->left.p1.x); uint16_t fx1 = grid_coverage(SAMPLES_X, trap->left.p1.x); int16_t x2 = pixman_fixed_to_int(trap->right.p1.x); uint16_t fx2 = grid_coverage(SAMPLES_X, trap->right.p1.x); if (x1 < extents->x1) x1 = extents->x1, fx1 = 0; if (x2 >= extents->x2) x2 = extents->x2, fx2 = 0; if (x1 < x2) { if (fx1) { pixmask_opacity(pi, x1, 1, y, h, covered * (SAMPLES_X - fx1)); x1++; } if (x2 > x1) pixmask_opacity(pi, x1, x2-x1, y, h, covered*SAMPLES_X); if (fx2) pixmask_opacity(pi, x2, 1, y, h, covered * fx2); } else if (x1 == x2 && fx2 > fx1) { pixmask_opacity(pi, x1, 1, y, h, covered * (fx2 - fx1)); } } struct rectilinear_inplace_thread { pixman_image_t *dst, *src; const RegionRec *clip; const xTrapezoid *trap; int dx, dy, sx, sy; int y1, y2; CARD8 op; }; static void rectilinear_inplace_thread(void *arg) { struct rectilinear_inplace_thread *thread = arg; const xTrapezoid *t = thread->trap; struct pixman_inplace pi; const BoxRec *extents; int count; pi.image = thread->dst; pi.dx = thread->dx; pi.dy = thread->dy; pi.source = thread->src; pi.sx = thread->sx; pi.sy = thread->sy; pi.mask = pixman_image_create_bits(PIXMAN_a8, 1, 1, &pi.color, 4); pixman_image_set_repeat(pi.mask, PIXMAN_REPEAT_NORMAL); pi.bits = pixman_image_get_data(pi.mask); pi.op = thread->op; count = region_count(thread->clip); extents = region_boxes(thread->clip); while (count--) { int16_t y1 = pixman_fixed_to_int(t->top); uint16_t fy1 = pixman_fixed_frac(t->top); int16_t y2 = pixman_fixed_to_int(t->bottom); uint16_t fy2 = pixman_fixed_frac(t->bottom); if (y1 < MAX(thread->y1, extents->y1)) y1 = MAX(thread->y1, extents->y1), fy1 = 0; if (y2 > MIN(thread->y2, extents->y2)) y2 = MIN(thread->y2, extents->y2), fy2 = 0; if (y1 < y2) { if (fy1) { pixmask_unaligned_box_row(&pi, extents, t, y1, 1, SAMPLES_Y - grid_coverage(SAMPLES_Y, fy1)); y1++; } if (y2 > y1) pixmask_unaligned_box_row(&pi, extents, t, y1, y2 - y1, SAMPLES_Y); if (fy2) pixmask_unaligned_box_row(&pi, extents, t, y2, 1, grid_coverage(SAMPLES_Y, fy2)); } else if (y1 == y2 && fy2 > fy1) { pixmask_unaligned_box_row(&pi, extents, t, y1, 1, grid_coverage(SAMPLES_Y, fy2) - grid_coverage(SAMPLES_Y, fy1)); } extents++; } pixman_image_unref(pi.mask); } static bool composite_unaligned_boxes_inplace(struct sna *sna, CARD8 op, PicturePtr src, int16_t src_x, int16_t src_y, PicturePtr dst, int n, const xTrapezoid *t, bool force_fallback) { if (!force_fallback && (is_gpu(sna, dst->pDrawable, PREFER_GPU_SPANS) || picture_is_gpu(sna, src, PREFER_GPU_SPANS))) { DBG(("%s: fallback -- not forcing\n", __FUNCTION__)); return false; } DBG(("%s\n", __FUNCTION__)); src_x -= pixman_fixed_to_int(t[0].left.p1.x); src_y -= pixman_fixed_to_int(t[0].left.p1.y); do { RegionRec clip; const BoxRec *extents; int count; int num_threads; clip.extents.x1 = pixman_fixed_to_int(t->left.p1.x); clip.extents.x2 = pixman_fixed_to_int(t->right.p1.x + pixman_fixed_1_minus_e); clip.extents.y1 = pixman_fixed_to_int(t->top); clip.extents.y2 = pixman_fixed_to_int(t->bottom + pixman_fixed_1_minus_e); clip.data = NULL; if (!sna_compute_composite_region(&clip, src, NULL, dst, clip.extents.x1 + src_x, clip.extents.y1 + src_y, 0, 0, clip.extents.x1, clip.extents.y1, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1)) continue; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, &clip, MOVE_WRITE | MOVE_READ)) { RegionUninit(&clip); continue; } if (src->pDrawable) { if (!sna_drawable_move_to_cpu(src->pDrawable, MOVE_READ)) { RegionUninit(&clip); continue; } if (src->alphaMap) { if (!sna_drawable_move_to_cpu(src->alphaMap->pDrawable, MOVE_READ)) { RegionUninit(&clip); continue; } } } num_threads = sna_use_threads(clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1, 32); if (num_threads == 1) { struct pixman_inplace pi; pi.image = image_from_pict(dst, false, &pi.dx, &pi.dy); pi.source = image_from_pict(src, false, &pi.sx, &pi.sy); pi.sx += src_x; pi.sy += src_y; pi.mask = pixman_image_create_bits(PIXMAN_a8, 1, 1, &pi.color, 4); pixman_image_set_repeat(pi.mask, PIXMAN_REPEAT_NORMAL); pi.bits = pixman_image_get_data(pi.mask); pi.op = op; if (sigtrap_get() == 0) { count = region_num_rects(&clip); extents = region_rects(&clip); while (count--) { int16_t y1 = pixman_fixed_to_int(t->top); uint16_t fy1 = pixman_fixed_frac(t->top); int16_t y2 = pixman_fixed_to_int(t->bottom); uint16_t fy2 = pixman_fixed_frac(t->bottom); if (y1 < extents->y1) y1 = extents->y1, fy1 = 0; if (y2 > extents->y2) y2 = extents->y2, fy2 = 0; if (y1 < y2) { if (fy1) { pixmask_unaligned_box_row(&pi, extents, t, y1, 1, SAMPLES_Y - grid_coverage(SAMPLES_Y, fy1)); y1++; } if (y2 > y1) pixmask_unaligned_box_row(&pi, extents, t, y1, y2 - y1, SAMPLES_Y); if (fy2) pixmask_unaligned_box_row(&pi, extents, t, y2, 1, grid_coverage(SAMPLES_Y, fy2)); } else if (y1 == y2 && fy2 > fy1) { pixmask_unaligned_box_row(&pi, extents, t, y1, 1, grid_coverage(SAMPLES_Y, fy2) - grid_coverage(SAMPLES_Y, fy1)); } extents++; } sigtrap_put(); } pixman_image_unref(pi.image); pixman_image_unref(pi.source); pixman_image_unref(pi.mask); } else { struct rectilinear_inplace_thread thread[num_threads]; int i, y, dy; thread[0].trap = t; thread[0].dst = image_from_pict(dst, false, &thread[0].dx, &thread[0].dy); thread[0].src = image_from_pict(src, false, &thread[0].sx, &thread[0].sy); thread[0].sx += src_x; thread[0].sy += src_y; thread[0].clip = &clip; thread[0].op = op; y = clip.extents.y1; dy = (clip.extents.y2 - clip.extents.y1 + num_threads - 1) / num_threads; num_threads = (clip.extents.y2 - clip.extents.y1 + dy - 1) / dy; if (sigtrap_get() == 0) { for (i = 1; i < num_threads; i++) { thread[i] = thread[0]; thread[i].y1 = y; thread[i].y2 = y += dy; sna_threads_run(i, rectilinear_inplace_thread, &thread[i]); } assert(y < clip.extents.y2); thread[0].y1 = y; thread[0].y2 = clip.extents.y2; rectilinear_inplace_thread(&thread[0]); sna_threads_wait(); sigtrap_put(); } else sna_threads_kill(); pixman_image_unref(thread[0].dst); pixman_image_unref(thread[0].src); } RegionUninit(&clip); } while (--n && t++); return true; } static bool composite_unaligned_boxes_fallback(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, INT16 src_x, INT16 src_y, int ntrap, const xTrapezoid *traps, bool force_fallback) { ScreenPtr screen = dst->pDrawable->pScreen; uint32_t color; int16_t dst_x, dst_y; int16_t dx, dy; int n; if (sna_picture_is_solid(src, &color) && composite_unaligned_boxes_inplace__solid(sna, op, color, dst, ntrap, traps, force_fallback)) return true; if (composite_unaligned_boxes_inplace(sna, op, src, src_x, src_y, dst, ntrap, traps, force_fallback)) return true; trapezoid_origin(&traps[0].left, &dst_x, &dst_y); dx = dst->pDrawable->x; dy = dst->pDrawable->y; for (n = 0; n < ntrap; n++) { const xTrapezoid *t = &traps[n]; PixmapPtr scratch; PicturePtr mask; BoxRec extents; int error; int y1, y2; extents.x1 = pixman_fixed_to_int(t->left.p1.x); extents.x2 = pixman_fixed_to_int(t->right.p1.x + pixman_fixed_1_minus_e); extents.y1 = pixman_fixed_to_int(t->top); extents.y2 = pixman_fixed_to_int(t->bottom + pixman_fixed_1_minus_e); if (!sna_compute_composite_extents(&extents, src, NULL, dst, src_x, src_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) continue; if (force_fallback) scratch = sna_pixmap_create_unattached(screen, extents.x2 - extents.x1, extents.y2 - extents.y1, 8); else scratch = sna_pixmap_create_upload(screen, extents.x2 - extents.x1, extents.y2 - extents.y1, 8, KGEM_BUFFER_WRITE_INPLACE); if (!scratch) continue; memset(scratch->devPrivate.ptr, 0xff, scratch->devKind * (extents.y2 - extents.y1)); extents.x1 -= dx; extents.x2 -= dx; extents.y1 -= dy; extents.y2 -= dy; y1 = pixman_fixed_to_int(t->top) - extents.y1; y2 = pixman_fixed_to_int(t->bottom) - extents.y1; if (y1 == y2) { blt_unaligned_box_row(scratch, &extents, t, y1, y1 + 1, grid_coverage(SAMPLES_Y, t->bottom) - grid_coverage(SAMPLES_Y, t->top)); } else { if (pixman_fixed_frac(t->top)) { blt_unaligned_box_row(scratch, &extents, t, y1, y1 + 1, SAMPLES_Y - grid_coverage(SAMPLES_Y, t->top)); y1++; } if (y2 > y1) blt_unaligned_box_row(scratch, &extents, t, y1, y2, SAMPLES_Y); if (pixman_fixed_frac(t->bottom)) blt_unaligned_box_row(scratch, &extents, t, y2, y2+1, grid_coverage(SAMPLES_Y, t->bottom)); } mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, 8, PICT_a8), 0, 0, serverClient, &error); if (mask) { CompositePicture(op, src, mask, dst, src_x + extents.x1 - dst_x, src_y + extents.y1 - dst_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1); FreePicture(mask, 0); } sna_pixmap_destroy(scratch); } return true; } bool composite_unaligned_boxes(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int ntrap, const xTrapezoid *traps, bool force_fallback) { BoxRec extents; struct sna_composite_spans_op tmp; struct sna_pixmap *priv; pixman_region16_t clip, *c; int16_t dst_x, dst_y; int dx, dy, n; if (NO_UNALIGNED_BOXES) return false; DBG(("%s: force_fallback=%d, mask=%x, n=%d, op=%d\n", __FUNCTION__, force_fallback, maskFormat ? (int)maskFormat->format : 0, ntrap, op)); /* need a span converter to handle overlapping traps */ if (ntrap > 1 && maskFormat) return false; if (force_fallback || !sna->render.check_composite_spans(sna, op, src, dst, 0, 0, COMPOSITE_SPANS_RECTILINEAR)) { fallback: return composite_unaligned_boxes_fallback(sna, op, src, dst, src_x, src_y, ntrap, traps, force_fallback); } trapezoid_origin(&traps[0].left, &dst_x, &dst_y); extents.x1 = pixman_fixed_to_int(traps[0].left.p1.x); extents.x2 = pixman_fixed_to_int(traps[0].right.p1.x + pixman_fixed_1_minus_e); extents.y1 = pixman_fixed_to_int(traps[0].top); extents.y2 = pixman_fixed_to_int(traps[0].bottom + pixman_fixed_1_minus_e); DBG(("%s: src=(%d, %d), dst=(%d, %d)\n", __FUNCTION__, src_x, src_y, dst_x, dst_y)); for (n = 1; n < ntrap; n++) { int x1 = pixman_fixed_to_int(traps[n].left.p1.x); int x2 = pixman_fixed_to_int(traps[n].right.p1.x + pixman_fixed_1_minus_e); int y1 = pixman_fixed_to_int(traps[n].top); int y2 = pixman_fixed_to_int(traps[n].bottom + pixman_fixed_1_minus_e); if (x1 < extents.x1) extents.x1 = x1; if (x2 > extents.x2) extents.x2 = x2; if (y1 < extents.y1) extents.y1 = y1; if (y2 > extents.y2) extents.y2 = y2; } DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); if (!sna_compute_composite_region(&clip, src, NULL, dst, src_x + extents.x1 - dst_x, src_y + extents.y1 - dst_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) { DBG(("%s: trapezoids do not intersect drawable clips\n", __FUNCTION__)) ; return true; } if (!sna->render.check_composite_spans(sna, op, src, dst, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1, COMPOSITE_SPANS_RECTILINEAR)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); goto fallback; } c = NULL; if (extents.x2 - extents.x1 > clip.extents.x2 - clip.extents.x1 || extents.y2 - extents.y1 > clip.extents.y2 - clip.extents.y1) { DBG(("%s: forcing clip\n", __FUNCTION__)); c = &clip; } extents = *RegionExtents(&clip); dx = dst->pDrawable->x; dy = dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d) src -> (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2, dx, dy, src_x + extents.x1 - dst_x - dx, src_y + extents.y1 - dst_y - dy)); switch (op) { case PictOpAdd: case PictOpOver: priv = sna_pixmap(get_drawable_pixmap(dst->pDrawable)); assert(priv != NULL); if (priv->clear && priv->clear_color == 0) { DBG(("%s: converting %d to PictOpSrc\n", __FUNCTION__, op)); op = PictOpSrc; } break; case PictOpIn: priv = sna_pixmap(get_drawable_pixmap(dst->pDrawable)); assert(priv != NULL); if (priv->clear && priv->clear_color == 0) { DBG(("%s: clear destination using In, skipping\n", __FUNCTION__)); return true; } break; } if (!sna->render.composite_spans(sna, op, src, dst, src_x + extents.x1 - dst_x - dx, src_y + extents.y1 - dst_y - dy, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1, COMPOSITE_SPANS_RECTILINEAR, memset(&tmp, 0, sizeof(tmp)))) { DBG(("%s: composite spans render op not supported\n", __FUNCTION__)); REGION_UNINIT(NULL, &clip); goto fallback; } for (n = 0; n < ntrap; n++) composite_unaligned_trap(sna, &tmp, &traps[n], dx, dy, c); tmp.done(sna, &tmp); REGION_UNINIT(NULL, &clip); return true; } xf86-video-intel-2.99.917/src/sna/sna_dri2.c0000664000175000017500000026071112445267637015173 00000000000000/************************************************************************** Copyright 2001 VA Linux Systems Inc., Fremont, California. Copyright © 2002 by David Dawes All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation on the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ /* * Authors: Jeff Hartmann * David Dawes * Keith Whitwell */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include "sna.h" #include "intel_options.h" #include #include #include #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,12,99,901,0) && defined(COMPOSITE) #include #define CHECK_FOR_COMPOSITOR #endif #define DBG_CAN_FLIP 1 #define DBG_CAN_XCHG 1 #define DBG_FORCE_COPY -1 /* KGEM_BLT or KGEM_3D */ #if DRI2INFOREC_VERSION < 2 #error DRI2 version supported by the Xserver is too old #endif static inline struct kgem_bo *ref(struct kgem_bo *bo) { return kgem_bo_reference(bo); } struct sna_dri2_private { PixmapPtr pixmap; struct kgem_bo *bo; DRI2Buffer2Ptr proxy; bool stale; uint32_t size; int refcnt; }; static inline struct sna_dri2_private * get_private(void *buffer) { return (struct sna_dri2_private *)((DRI2Buffer2Ptr)buffer+1); } #if DRI2INFOREC_VERSION >= 4 enum event_type { WAITMSC = 0, SWAP, SWAP_WAIT, SWAP_THROTTLE, FLIP, FLIP_THROTTLE, FLIP_COMPLETE, FLIP_ASYNC, }; struct dri_bo { struct list link; struct kgem_bo *bo; uint32_t name; }; struct sna_dri2_event { struct sna *sna; DrawablePtr draw; ClientPtr client; enum event_type type; xf86CrtcPtr crtc; int pipe; bool queued; /* for swaps & flips only */ DRI2SwapEventPtr event_complete; void *event_data; DRI2BufferPtr front; DRI2BufferPtr back; struct kgem_bo *bo; struct sna_dri2_event *chain; struct list cache; struct list link; int mode; }; static void sna_dri2_flip_event(struct sna_dri2_event *flip); static void sna_dri2_get_back(struct sna *sna, DrawablePtr draw, DRI2BufferPtr back, struct sna_dri2_event *info) { struct kgem_bo *bo; uint32_t name; bool reuse; DBG(("%s: draw size=%dx%d, buffer size=%dx%d\n", __FUNCTION__, draw->width, draw->height, get_private(back)->size & 0xffff, get_private(back)->size >> 16)); reuse = (draw->height << 16 | draw->width) == get_private(back)->size; if (reuse) { bo = get_private(back)->bo; assert(bo->refcnt); DBG(("%s: back buffer handle=%d, scanout?=%d, refcnt=%d\n", __FUNCTION__, bo->handle, bo->active_scanout, get_private(back)->refcnt)); if (bo->active_scanout == 0) { DBG(("%s: reuse unattached back\n", __FUNCTION__)); get_private(back)->stale = false; return; } } bo = NULL; if (info) { struct dri_bo *c; list_for_each_entry(c, &info->cache, link) { if (c->bo && c->bo->scanout == 0) { bo = c->bo; name = c->name; DBG(("%s: reuse cache handle=%d\n", __FUNCTION__, bo->handle)); list_move_tail(&c->link, &info->cache); c->bo = NULL; } } } if (bo == NULL) { DBG(("%s: allocating new backbuffer\n", __FUNCTION__)); bo = kgem_create_2d(&sna->kgem, draw->width, draw->height, draw->bitsPerPixel, get_private(back)->bo->tiling, get_private(back)->bo->scanout ? CREATE_SCANOUT : 0); if (bo == NULL) return; name = kgem_bo_flink(&sna->kgem, bo); if (name == 0) { kgem_bo_destroy(&sna->kgem, bo); return; } } assert(bo->active_scanout == 0); if (info && reuse) { bool found = false; struct dri_bo *c; list_for_each_entry_reverse(c, &info->cache, link) { if (c->bo == NULL) { found = true; _list_del(&c->link); break; } } if (!found) c = malloc(sizeof(*c)); if (c != NULL) { c->bo = ref(get_private(back)->bo); c->name = back->name; list_add(&c->link, &info->cache); DBG(("%s: cacheing handle=%d (name=%d)\n", __FUNCTION__, c->bo->handle, c->name)); } } assert(bo != get_private(back)->bo); kgem_bo_destroy(&sna->kgem, get_private(back)->bo); get_private(back)->bo = bo; get_private(back)->size = draw->height << 16 | draw->width; back->pitch = bo->pitch; back->name = name; get_private(back)->stale = false; } struct dri2_window { DRI2BufferPtr front; struct sna_dri2_event *chain; xf86CrtcPtr crtc; int64_t msc_delta; }; static struct dri2_window *dri2_window(WindowPtr win) { assert(win->drawable.type != DRAWABLE_PIXMAP); return ((void **)__get_private(win, sna_window_key))[1]; } static struct sna_dri2_event * dri2_chain(DrawablePtr d) { struct dri2_window *priv = dri2_window((WindowPtr)d); assert(priv != NULL); return priv->chain; } inline static DRI2BufferPtr dri2_window_get_front(WindowPtr win) { struct dri2_window *priv = dri2_window(win); return priv ? priv->front : NULL; } #else inline static void *dri2_window_get_front(WindowPtr win) { return NULL; } #endif #if DRI2INFOREC_VERSION < 6 #define xorg_can_triple_buffer() 0 #define swap_limit(d, l) false #else #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,15,99,904,0) /* Prime fixed for triple buffer support */ #define xorg_can_triple_buffer() 1 #elif XORG_VERSION_CURRENT < XORG_VERSION_NUMERIC(1,12,99,901,0) /* Before numGPUScreens was introduced */ #define xorg_can_triple_buffer() 1 #else /* Subject to crashers when combining triple buffering and Prime */ inline static bool xorg_can_triple_buffer(void) { return screenInfo.numGPUScreens == 0; } #endif static void mark_stale(DRI2BufferPtr back) { /* If we have reuse notifications, we can track when the * client tries to present an old buffer (one that has not * been updated since the last swap) and avoid showing the * stale frame. (This is mostly useful for tracking down * driver bugs!) */ get_private(back)->stale = xorg_can_triple_buffer(); } static Bool sna_dri2_swap_limit_validate(DrawablePtr draw, int swap_limit) { DBG(("%s: swap limit set to %d\n", __FUNCTION__, swap_limit)); return swap_limit >= 1; } static void sna_dri2_reuse_buffer(DrawablePtr draw, DRI2BufferPtr buffer) { DBG(("%s: reusing buffer pixmap=%ld, attachment=%d, handle=%d, name=%d\n", __FUNCTION__, get_drawable_pixmap(draw)->drawable.serialNumber, buffer->attachment, get_private(buffer)->bo->handle, buffer->name)); assert(get_private(buffer)->refcnt); assert(get_private(buffer)->bo->refcnt > get_private(buffer)->bo->active_scanout); if (buffer->attachment == DRI2BufferBackLeft && draw->type != DRAWABLE_PIXMAP) { DBG(("%s: replacing back buffer\n", __FUNCTION__)); sna_dri2_get_back(to_sna_from_drawable(draw), draw, buffer, dri2_chain(draw)); assert(kgem_bo_flink(&to_sna_from_drawable(draw)->kgem, get_private(buffer)->bo) == buffer->name); assert(get_private(buffer)->bo->refcnt); assert(get_private(buffer)->bo->active_scanout == 0); } } static bool swap_limit(DrawablePtr draw, int limit) { if (!xorg_can_triple_buffer()) return false; DBG(("%s: draw=%ld setting swap limit to %d\n", __FUNCTION__, (long)draw->id, limit)); DRI2SwapLimit(draw, limit); return true; } #endif #if DRI2INFOREC_VERSION < 10 #undef USE_ASYNC_SWAP #define USE_ASYNC_SWAP 0 #endif #define COLOR_PREFER_TILING_Y 0 /* Prefer to enable TILING_Y if this buffer will never be a * candidate for pageflipping */ static uint32_t color_tiling(struct sna *sna, DrawablePtr draw) { uint32_t tiling; if (COLOR_PREFER_TILING_Y && (draw->width != sna->front->drawable.width || draw->height != sna->front->drawable.height)) tiling = I915_TILING_Y; else tiling = I915_TILING_X; return kgem_choose_tiling(&sna->kgem, -tiling, draw->width, draw->height, draw->bitsPerPixel); } static uint32_t other_tiling(struct sna *sna, DrawablePtr draw) { /* XXX Can mix color X / depth Y? */ return kgem_choose_tiling(&sna->kgem, sna->kgem.gen >= 040 ? -I915_TILING_Y : -I915_TILING_X, draw->width, draw->height, draw->bitsPerPixel); } static struct kgem_bo *sna_pixmap_set_dri(struct sna *sna, PixmapPtr pixmap) { struct sna_pixmap *priv; int tiling; DBG(("%s: attaching DRI client to pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); priv = sna_pixmap(pixmap); if (priv != NULL && IS_STATIC_PTR(priv->ptr) && priv->cpu_bo) { DBG(("%s: SHM or unattached Pixmap, BadAlloc\n", __FUNCTION__)); return NULL; } priv = sna_pixmap_move_to_gpu(pixmap, MOVE_READ | __MOVE_FORCE | __MOVE_DRI); if (priv == NULL) { DBG(("%s: failed to move to GPU, BadAlloc\n", __FUNCTION__)); return NULL; } assert(priv->flush == false); assert(priv->cpu_damage == NULL); assert(priv->gpu_bo); assert(priv->gpu_bo->proxy == NULL); assert(priv->gpu_bo->flush == false); tiling = color_tiling(sna, &pixmap->drawable); if (tiling < 0) tiling = -tiling; if (priv->gpu_bo->tiling != tiling) sna_pixmap_change_tiling(pixmap, tiling); return priv->gpu_bo; } pure static inline void *sna_pixmap_get_buffer(PixmapPtr pixmap) { assert(pixmap->refcnt); return ((void **)__get_private(pixmap, sna_pixmap_key))[2]; } static inline void sna_pixmap_set_buffer(PixmapPtr pixmap, void *ptr) { assert(pixmap->refcnt); ((void **)__get_private(pixmap, sna_pixmap_key))[2] = ptr; } void sna_dri2_pixmap_update_bo(struct sna *sna, PixmapPtr pixmap, struct kgem_bo *bo) { DRI2BufferPtr buffer; struct sna_dri2_private *private; buffer = sna_pixmap_get_buffer(pixmap); if (buffer == NULL) return; DBG(("%s: pixmap=%ld, old handle=%d, new handle=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, get_private(buffer)->bo->handle, sna_pixmap(pixmap)->gpu_bo->handle)); private = get_private(buffer); assert(private->pixmap == pixmap); assert(bo != private->bo); if (private->bo == bo) return; DBG(("%s: dropping flush hint from handle=%d\n", __FUNCTION__, private->bo->handle)); private->bo->flush = false; kgem_bo_destroy(&sna->kgem, private->bo); buffer->name = kgem_bo_flink(&sna->kgem, bo); buffer->pitch = bo->pitch; private->bo = ref(bo); DBG(("%s: adding flush hint to handle=%d\n", __FUNCTION__, bo->handle)); bo->flush = true; if (bo->exec) sna->kgem.flush = 1; assert(sna_pixmap(pixmap)->flush); /* XXX DRI2InvalidateDrawable(&pixmap->drawable); */ } static DRI2Buffer2Ptr sna_dri2_create_buffer(DrawablePtr draw, unsigned int attachment, unsigned int format) { struct sna *sna = to_sna_from_drawable(draw); DRI2Buffer2Ptr buffer; struct sna_dri2_private *private; PixmapPtr pixmap; struct kgem_bo *bo; unsigned flags = 0; uint32_t size; int bpp; DBG(("%s pixmap=%ld, (attachment=%d, format=%d, drawable=%dx%d), window?=%d\n", __FUNCTION__, get_drawable_pixmap(draw)->drawable.serialNumber, attachment, format, draw->width, draw->height, draw->type != DRAWABLE_PIXMAP)); pixmap = NULL; size = (uint32_t)draw->height << 16 | draw->width; switch (attachment) { case DRI2BufferFrontLeft: pixmap = get_drawable_pixmap(draw); buffer = NULL; if (draw->type != DRAWABLE_PIXMAP) buffer = dri2_window_get_front((WindowPtr)draw); if (buffer == NULL) buffer = sna_pixmap_get_buffer(pixmap); if (buffer) { private = get_private(buffer); DBG(("%s: reusing front buffer attachment, win=%lu %dx%d, pixmap=%ld [%ld] %dx%d, handle=%d, name=%d\n", __FUNCTION__, draw->type != DRAWABLE_PIXMAP ? (long)draw->id : (long)0, draw->width, draw->height, pixmap->drawable.serialNumber, private->pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height, private->bo->handle, buffer->name)); assert(private->pixmap == pixmap); assert(sna_pixmap(pixmap)->flush); assert(sna_pixmap(pixmap)->pinned & PIN_DRI2); assert(kgem_bo_flink(&sna->kgem, private->bo) == buffer->name); private->refcnt++; return buffer; } bo = sna_pixmap_set_dri(sna, pixmap); if (bo == NULL) return NULL; assert(sna_pixmap(pixmap) != NULL); bo = ref(bo); bpp = pixmap->drawable.bitsPerPixel; if (pixmap == sna->front && !(sna->flags & SNA_LINEAR_FB)) flags |= CREATE_SCANOUT; DBG(("%s: attaching to front buffer %dx%d [%p:%d], scanout? %d\n", __FUNCTION__, pixmap->drawable.width, pixmap->drawable.height, pixmap, pixmap->refcnt, flags & CREATE_SCANOUT)); size = (uint32_t)pixmap->drawable.height << 16 | pixmap->drawable.width; break; case DRI2BufferBackLeft: if (draw->type != DRAWABLE_PIXMAP) { if (dri2_window_get_front((WindowPtr)draw)) flags |= CREATE_SCANOUT; if (draw->width == sna->front->drawable.width && draw->height == sna->front->drawable.height && (sna->flags & (SNA_LINEAR_FB | SNA_NO_WAIT | SNA_NO_FLIP)) == 0) flags |= CREATE_SCANOUT; } case DRI2BufferBackRight: case DRI2BufferFrontRight: case DRI2BufferFakeFrontLeft: case DRI2BufferFakeFrontRight: bpp = draw->bitsPerPixel; DBG(("%s: creating back buffer %dx%d, suitable for scanout? %d\n", __FUNCTION__, draw->width, draw->height, flags & CREATE_SCANOUT)); bo = kgem_create_2d(&sna->kgem, draw->width, draw->height, draw->bitsPerPixel, color_tiling(sna, draw), flags); break; case DRI2BufferStencil: /* * The stencil buffer has quirky pitch requirements. From Vol * 2a, 11.5.6.2.1 3DSTATE_STENCIL_BUFFER, field "Surface * Pitch": * The pitch must be set to 2x the value computed based on * width, as the stencil buffer is stored with two rows * interleaved. * To accomplish this, we resort to the nasty hack of doubling * the drm region's cpp and halving its height. * * If we neglect to double the pitch, then * drm_intel_gem_bo_map_gtt() maps the memory incorrectly. * * The alignment for W-tiling is quite different to the * nominal no-tiling case, so we have to account for * the tiled access pattern explicitly. * * The stencil buffer is W tiled. However, we request from * the kernel a non-tiled buffer because the kernel does * not understand W tiling and the GTT is incapable of * W fencing. */ bpp = format ? format : draw->bitsPerPixel; bpp *= 2; bo = kgem_create_2d(&sna->kgem, ALIGN(draw->width, 64), ALIGN((draw->height + 1) / 2, 64), bpp, I915_TILING_NONE, flags); break; case DRI2BufferDepth: case DRI2BufferDepthStencil: case DRI2BufferHiz: case DRI2BufferAccum: bpp = format ? format : draw->bitsPerPixel, bo = kgem_create_2d(&sna->kgem, draw->width, draw->height, bpp, other_tiling(sna, draw), flags); break; default: return NULL; } if (bo == NULL) return NULL; buffer = calloc(1, sizeof *buffer + sizeof *private); if (buffer == NULL) goto err; private = get_private(buffer); buffer->attachment = attachment; buffer->pitch = bo->pitch; buffer->cpp = bpp / 8; buffer->driverPrivate = private; buffer->format = format; buffer->flags = 0; buffer->name = kgem_bo_flink(&sna->kgem, bo); private->refcnt = 1; private->bo = bo; private->pixmap = pixmap; private->size = size; if (buffer->name == 0) goto err; if (pixmap) { struct sna_pixmap *priv; assert(attachment == DRI2BufferFrontLeft); assert(sna_pixmap_get_buffer(pixmap) == NULL); sna_pixmap_set_buffer(pixmap, buffer); assert(sna_pixmap_get_buffer(pixmap) == buffer); pixmap->refcnt++; priv = sna_pixmap(pixmap); assert(priv->flush == false); assert((priv->pinned & PIN_DRI2) == 0); /* Don't allow this named buffer to be replaced */ priv->pinned |= PIN_DRI2; /* We need to submit any modifications to and reads from this * buffer before we send any reply to the Client. * * As we don't track which Client, we flush for all. */ DBG(("%s: adding flush hint to handle=%d\n", __FUNCTION__, priv->gpu_bo->handle)); priv->gpu_bo->flush = true; if (priv->gpu_bo->exec) sna->kgem.flush = 1; priv->flush |= 1; if (draw->type == DRAWABLE_PIXMAP) { /* DRI2 renders directly into GLXPixmaps, treat as hostile */ kgem_bo_unclean(&sna->kgem, priv->gpu_bo); sna_damage_all(&priv->gpu_damage, pixmap); priv->clear = false; priv->cpu = false; priv->flush |= 2; } sna_accel_watch_flush(sna, 1); } return buffer; err: kgem_bo_destroy(&sna->kgem, bo); free(buffer); return NULL; } static void _sna_dri2_destroy_buffer(struct sna *sna, DRI2Buffer2Ptr buffer) { struct sna_dri2_private *private = get_private(buffer); if (buffer == NULL) return; DBG(("%s: %p [handle=%d] -- refcnt=%d, pixmap=%ld\n", __FUNCTION__, buffer, private->bo->handle, private->refcnt, private->pixmap ? private->pixmap->drawable.serialNumber : 0)); assert(private->refcnt > 0); if (--private->refcnt) return; assert(private->bo); if (private->proxy) { DBG(("%s: destroying proxy\n", __FUNCTION__)); _sna_dri2_destroy_buffer(sna, private->proxy); private->pixmap = NULL; } if (private->pixmap) { PixmapPtr pixmap = private->pixmap; struct sna_pixmap *priv = sna_pixmap(pixmap); assert(sna_pixmap_get_buffer(pixmap) == buffer); assert(priv->gpu_bo == private->bo); assert(priv->gpu_bo->flush); assert(priv->pinned & PIN_DRI2); assert(priv->flush); /* Undo the DRI markings on this pixmap */ DBG(("%s: releasing last DRI pixmap=%ld, scanout?=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap == sna->front)); list_del(&priv->flush_list); DBG(("%s: dropping flush hint from handle=%d\n", __FUNCTION__, private->bo->handle)); priv->gpu_bo->flush = false; priv->pinned &= ~PIN_DRI2; priv->flush = false; sna_accel_watch_flush(sna, -1); sna_pixmap_set_buffer(pixmap, NULL); pixmap->drawable.pScreen->DestroyPixmap(pixmap); } assert(private->bo->flush == false); kgem_bo_destroy(&sna->kgem, private->bo); free(buffer); } static void sna_dri2_destroy_buffer(DrawablePtr draw, DRI2Buffer2Ptr buffer) { _sna_dri2_destroy_buffer(to_sna_from_drawable(draw), buffer); } static DRI2BufferPtr sna_dri2_reference_buffer(DRI2BufferPtr buffer) { get_private(buffer)->refcnt++; return buffer; } static inline void damage(PixmapPtr pixmap, struct sna_pixmap *priv, RegionPtr region) { assert(priv->gpu_bo); if (DAMAGE_IS_ALL(priv->gpu_damage)) goto done; if (region == NULL) { damage_all: priv->gpu_damage = _sna_damage_all(priv->gpu_damage, pixmap->drawable.width, pixmap->drawable.height); sna_damage_destroy(&priv->cpu_damage); list_del(&priv->flush_list); } else { sna_damage_subtract(&priv->cpu_damage, region); if (priv->cpu_damage == NULL) goto damage_all; sna_damage_add(&priv->gpu_damage, region); } done: priv->cpu = false; priv->clear = false; } static void set_bo(PixmapPtr pixmap, struct kgem_bo *bo) { struct sna *sna = to_sna_from_pixmap(pixmap); struct sna_pixmap *priv = sna_pixmap(pixmap); RegionRec region; DBG(("%s: pixmap=%ld, handle=%d\n", __FUNCTION__, pixmap->drawable.serialNumber, bo->handle)); assert(pixmap->drawable.width * pixmap->drawable.bitsPerPixel <= 8*bo->pitch); assert(pixmap->drawable.height * bo->pitch <= kgem_bo_size(bo)); assert(bo->proxy == NULL); assert(priv->pinned & PIN_DRI2); assert((priv->pinned & (PIN_PRIME | PIN_DRI3)) == 0); assert(priv->flush); /* Post damage on the new front buffer so that listeners, such * as DisplayLink know take a copy and shove it over the USB, * also for software cursors and the like. */ region.extents.x1 = region.extents.y1 = 0; region.extents.x2 = pixmap->drawable.width; region.extents.y2 = pixmap->drawable.height; region.data = NULL; DamageRegionAppend(&pixmap->drawable, ®ion); damage(pixmap, priv, NULL); assert(bo->refcnt); if (priv->move_to_gpu) priv->move_to_gpu(sna, priv, 0); if (priv->gpu_bo != bo) { DBG(("%s: dropping flush hint from handle=%d\n", __FUNCTION__, priv->gpu_bo->handle)); priv->gpu_bo->flush = false; if (priv->cow) sna_pixmap_undo_cow(sna, priv, 0); if (priv->gpu_bo) { sna_pixmap_unmap(pixmap, priv); kgem_bo_destroy(&sna->kgem, priv->gpu_bo); } DBG(("%s: adding flush hint to handle=%d\n", __FUNCTION__, bo->handle)); bo->flush = true; if (bo->exec) sna->kgem.flush = 1; priv->gpu_bo = ref(bo); } if (bo->domain != DOMAIN_GPU) bo->domain = DOMAIN_NONE; assert(bo->flush); DamageRegionProcessPending(&pixmap->drawable); } static void sna_dri2_select_mode(struct sna *sna, struct kgem_bo *dst, struct kgem_bo *src, bool sync) { struct drm_i915_gem_busy busy; int mode; if (sna->kgem.gen < 060) return; if (sync) { DBG(("%s: sync, force %s ring\n", __FUNCTION__, sna->kgem.gen >= 070 ? "BLT" : "RENDER")); kgem_set_mode(&sna->kgem, sna->kgem.gen >= 070 ? KGEM_BLT : KGEM_RENDER, dst); return; } if (DBG_FORCE_COPY != -1) { DBG(("%s: forcing %d\n", __FUNCTION__, DBG_FORCE_COPY)); kgem_set_mode(&sna->kgem, DBG_FORCE_COPY, dst); return; } if (sna->kgem.mode != KGEM_NONE) { DBG(("%s: busy, not switching\n", __FUNCTION__)); return; } VG_CLEAR(busy); busy.handle = src->handle; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_GEM_BUSY, &busy)) return; DBG(("%s: src handle=%d busy?=%x\n", __FUNCTION__, busy.handle, busy.busy)); if (busy.busy == 0) { __kgem_bo_clear_busy(src); busy.handle = dst->handle; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_GEM_BUSY, &busy)) return; DBG(("%s: dst handle=%d busy?=%x\n", __FUNCTION__, busy.handle, busy.busy)); if (busy.busy == 0) { __kgem_bo_clear_busy(dst); DBG(("%s: src/dst is idle, using defaults\n", __FUNCTION__)); return; } } /* Sandybridge introduced a separate ring which it uses to * perform blits. Switching rendering between rings incurs * a stall as we wait upon the old ring to finish and * flush its render cache before we can proceed on with * the operation on the new ring. * * As this buffer, we presume, has just been written to by * the DRI client using the RENDER ring, we want to perform * our operation on the same ring, and ideally on the same * ring as we will flip from (which should be the RENDER ring * as well). * * The ultimate question is whether preserving the ring outweighs * the cost of the query. */ mode = KGEM_RENDER; if (busy.busy & (0xfffe << 16)) mode = KGEM_BLT; kgem_bo_mark_busy(&sna->kgem, busy.handle == src->handle ? src : dst, mode); _kgem_set_mode(&sna->kgem, mode); } static bool is_front(int attachment) { return attachment == DRI2BufferFrontLeft; } static struct kgem_bo * __sna_dri2_copy_region(struct sna *sna, DrawablePtr draw, RegionPtr region, DRI2BufferPtr src, DRI2BufferPtr dst, bool sync) { PixmapPtr pixmap = get_drawable_pixmap(draw); DrawableRec scratch, *src_draw = &pixmap->drawable, *dst_draw = &pixmap->drawable; struct sna_dri2_private *src_priv = get_private(src); struct sna_dri2_private *dst_priv = get_private(dst); pixman_region16_t clip; struct kgem_bo *bo = NULL; struct kgem_bo *src_bo; struct kgem_bo *dst_bo; const BoxRec *boxes; int16_t dx, dy, sx, sy; unsigned flags; int n; /* To hide a stale DRI2Buffer, one may choose to substitute * pixmap->gpu_bo instead of dst/src->bo, however you then run * the risk of copying around invalid data. So either you may not * see the results of the copy, or you may see the wrong pixels. * Either way you eventually lose. * * We also have to be careful in case that the stale buffers are * now attached to invalid (non-DRI) pixmaps. */ assert(is_front(dst->attachment) || is_front(src->attachment)); assert(dst->attachment != src->attachment); clip.extents.x1 = draw->x; clip.extents.y1 = draw->y; clip.extents.x2 = draw->x + draw->width; clip.extents.y2 = draw->y + draw->height; clip.data = NULL; if (region) { pixman_region_translate(region, draw->x, draw->y); pixman_region_intersect(&clip, &clip, region); region = &clip; } if (clip.extents.x1 >= clip.extents.x2 || clip.extents.y1 >= clip.extents.y2) { DBG(("%s: all clipped\n", __FUNCTION__)); return NULL; } sx = sy = dx = dy = 0; if (is_front(dst->attachment)) { sx = -draw->x; sy = -draw->y; } else { dx = -draw->x; dy = -draw->y; } if (draw->type == DRAWABLE_WINDOW) { WindowPtr win = (WindowPtr)draw; int16_t tx, ty; if (is_clipped(&win->clipList, draw)) { DBG(("%s: draw=(%d, %d), delta=(%d, %d), draw=(%d, %d),(%d, %d), clip.extents=(%d, %d), (%d, %d)\n", __FUNCTION__, draw->x, draw->y, get_drawable_dx(draw), get_drawable_dy(draw), clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2, win->clipList.extents.x1, win->clipList.extents.y1, win->clipList.extents.x2, win->clipList.extents.y2)); assert(region == NULL || region == &clip); pixman_region_intersect(&clip, &win->clipList, &clip); if (!pixman_region_not_empty(&clip)) { DBG(("%s: all clipped\n", __FUNCTION__)); return NULL; } region = &clip; } if (get_drawable_deltas(draw, pixmap, &tx, &ty)) { if (is_front(dst->attachment)) { pixman_region_translate(region ?: &clip, tx, ty); sx -= tx; sy -= ty; } else { sx += tx; sy += ty; } } } else sync = false; scratch.x = scratch.y = 0; scratch.width = scratch.height = 0; scratch.depth = draw->depth; scratch.bitsPerPixel = draw->bitsPerPixel; src_bo = src_priv->bo; assert(src_bo->refcnt); if (is_front(src->attachment)) { struct sna_pixmap *priv; priv = sna_pixmap_move_to_gpu(pixmap, MOVE_READ); if (priv) src_bo = priv->gpu_bo; DBG(("%s: updated FrontLeft src_bo from handle=%d to handle=%d\n", __FUNCTION__, src_priv->bo->handle, src_bo->handle)); assert(src_bo->refcnt); } else { RegionRec source; scratch.width = src_priv->size & 0xffff; scratch.height = src_priv->size >> 16; src_draw = &scratch; DBG(("%s: source size %dx%d, region size %dx%d\n", __FUNCTION__, scratch.width, scratch.height, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1)); source.extents.x1 = -sx; source.extents.y1 = -sy; source.extents.x2 = source.extents.x1 + scratch.width; source.extents.y2 = source.extents.y1 + scratch.height; source.data = NULL; assert(region == NULL || region == &clip); pixman_region_intersect(&clip, &clip, &source); } dst_bo = dst_priv->bo; assert(dst_bo->refcnt); if (is_front(dst->attachment)) { struct sna_pixmap *priv; struct list shadow; /* Preserve the CRTC shadow overrides */ sna_shadow_steal_crtcs(sna, &shadow); flags = MOVE_WRITE | __MOVE_FORCE; if (clip.data) flags |= MOVE_READ; assert(region == NULL || region == &clip); priv = sna_pixmap_move_area_to_gpu(pixmap, &clip.extents, flags); if (priv) { damage(pixmap, priv, region); dst_bo = priv->gpu_bo; } DBG(("%s: updated FrontLeft dst_bo from handle=%d to handle=%d\n", __FUNCTION__, dst_priv->bo->handle, dst_bo->handle)); assert(dst_bo->refcnt); sna_shadow_unsteal_crtcs(sna, &shadow); } else { RegionRec target; scratch.width = dst_priv->size & 0xffff; scratch.height = dst_priv->size >> 16; dst_draw = &scratch; DBG(("%s: target size %dx%d, region size %dx%d\n", __FUNCTION__, scratch.width, scratch.height, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1)); target.extents.x1 = -dx; target.extents.y1 = -dy; target.extents.x2 = target.extents.x1 + scratch.width; target.extents.y2 = target.extents.y1 + scratch.height; target.data = NULL; assert(region == NULL || region == &clip); pixman_region_intersect(&clip, &clip, &target); sync = false; } if (!wedged(sna)) { xf86CrtcPtr crtc; crtc = NULL; if (sync && sna_pixmap_is_scanout(sna, pixmap)) crtc = sna_covering_crtc(sna, &clip.extents, NULL); sna_dri2_select_mode(sna, dst_bo, src_bo, crtc != NULL); sync = (crtc != NULL&& sna_wait_for_scanline(sna, pixmap, crtc, &clip.extents)); } if (region) { boxes = region_rects(region); n = region_num_rects(region); assert(n); } else { region = &clip; boxes = &clip.extents; n = 1; } DamageRegionAppend(&pixmap->drawable, region); DBG(("%s: copying [(%d, %d), (%d, %d)]x%d src=(%d, %d), dst=(%d, %d)\n", __FUNCTION__, boxes[0].x1, boxes[0].y1, boxes[0].x2, boxes[0].y2, n, sx, sy, dx, dy)); flags = COPY_LAST; if (sync) flags |= COPY_SYNC; if (!sna->render.copy_boxes(sna, GXcopy, src_draw, src_bo, sx, sy, dst_draw, dst_bo, dx, dy, boxes, n, flags)) memcpy_copy_boxes(sna, GXcopy, src_draw, src_bo, sx, sy, dst_draw, dst_bo, dx, dy, boxes, n, flags); DBG(("%s: flushing? %d\n", __FUNCTION__, sync)); if (sync) { /* STAT! */ struct kgem_request *rq = sna->kgem.next_request; kgem_submit(&sna->kgem); if (rq->bo) { bo = ref(rq->bo); DBG(("%s: recording sync fence handle=%d\n", __FUNCTION__, bo->handle)); } } DamageRegionProcessPending(&pixmap->drawable); if (clip.data) pixman_region_fini(&clip); return bo; } static void sna_dri2_copy_region(DrawablePtr draw, RegionPtr region, DRI2BufferPtr dst, DRI2BufferPtr src) { PixmapPtr pixmap = get_drawable_pixmap(draw); struct sna *sna = to_sna_from_pixmap(pixmap); DBG(("%s: pixmap=%ld, src=%u (refs=%d/%d, flush=%d, attach=%d) , dst=%u (refs=%d/%d, flush=%d, attach=%d)\n", __FUNCTION__, pixmap->drawable.serialNumber, get_private(src)->bo->handle, get_private(src)->refcnt, get_private(src)->bo->refcnt, get_private(src)->bo->flush, src->attachment, get_private(dst)->bo->handle, get_private(dst)->refcnt, get_private(dst)->bo->refcnt, get_private(dst)->bo->flush, dst->attachment)); assert(src != dst); assert(get_private(src)->refcnt); assert(get_private(dst)->refcnt); assert(get_private(src)->bo->refcnt); assert(get_private(dst)->bo->refcnt); DBG(("%s: region (%d, %d), (%d, %d) x %d\n", __FUNCTION__, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, region_num_rects(region))); __sna_dri2_copy_region(sna, draw, region, src, dst, false); } inline static uint32_t pipe_select(int pipe) { /* The third pipe was introduced with IvyBridge long after * multiple pipe support was added to the kernel, hence * we can safely ignore the capability check - if we have more * than two pipes, we can assume that they are fully supported. */ if (pipe > 1) return pipe << DRM_VBLANK_HIGH_CRTC_SHIFT; else if (pipe > 0) return DRM_VBLANK_SECONDARY; else return 0; } static inline int sna_wait_vblank(struct sna *sna, union drm_wait_vblank *vbl, int pipe) { DBG(("%s(pipe=%d, waiting until seq=%u%s)\n", __FUNCTION__, pipe, vbl->request.sequence, vbl->request.type & DRM_VBLANK_RELATIVE ? " [relative]" : "")); assert(pipe != -1); vbl->request.type |= pipe_select(pipe); return drmIoctl(sna->kgem.fd, DRM_IOCTL_WAIT_VBLANK, vbl); } #if DRI2INFOREC_VERSION >= 4 static void dri2_window_attach(WindowPtr win, struct dri2_window *priv) { assert(win->drawable.type == DRAWABLE_WINDOW); assert(dri2_window(win) == NULL); ((void **)__get_private(win, sna_window_key))[1] = priv; assert(dri2_window(win) == priv); } static uint64_t draw_current_msc(DrawablePtr draw, xf86CrtcPtr crtc, uint64_t msc) { struct dri2_window *priv; if (draw->type != DRAWABLE_WINDOW) return msc; priv = dri2_window((WindowPtr)draw); if (priv == NULL) { priv = malloc(sizeof(*priv)); if (priv != NULL) { priv->front = NULL; priv->crtc = crtc; priv->msc_delta = 0; priv->chain = NULL; dri2_window_attach((WindowPtr)draw, priv); } } else { if (priv->crtc != crtc) { const struct ust_msc *last = sna_crtc_last_swap(priv->crtc); const struct ust_msc *this = sna_crtc_last_swap(crtc); DBG(("%s: Window transferring from pipe=%d [msc=%llu] to pipe=%d [msc=%llu], delta now %lld\n", __FUNCTION__, sna_crtc_to_pipe(priv->crtc), (long long)last->msc, sna_crtc_to_pipe(crtc), (long long)this->msc, (long long)(priv->msc_delta + this->msc - last->msc))); priv->msc_delta += this->msc - last->msc; priv->crtc = crtc; } msc -= priv->msc_delta; } return msc; } static uint32_t draw_target_seq(DrawablePtr draw, uint64_t msc) { struct dri2_window *priv = dri2_window((WindowPtr)draw); if (priv == NULL) return msc; DBG(("%s: converting target_msc=%llu to seq %u\n", __FUNCTION__, (long long)msc, (unsigned)(msc + priv->msc_delta))); return msc + priv->msc_delta; } static xf86CrtcPtr sna_dri2_get_crtc(DrawablePtr draw) { if (draw->type == DRAWABLE_PIXMAP) return NULL; /* Make sure the CRTC is valid and this is the real front buffer */ return sna_covering_crtc(to_sna_from_drawable(draw), &((WindowPtr)draw)->clipList.extents, NULL); } static void sna_dri2_remove_event(WindowPtr win, struct sna_dri2_event *info) { struct dri2_window *priv; struct sna_dri2_event *chain; assert(win->drawable.type == DRAWABLE_WINDOW); DBG(("%s: remove[%p] from window %ld, active? %d\n", __FUNCTION__, info, (long)win->drawable.id, info->draw != NULL)); priv = dri2_window(win); assert(priv); assert(priv->chain != NULL); if (priv->chain == info) { priv->chain = info->chain; return; } chain = priv->chain; while (chain->chain != info) chain = chain->chain; assert(chain != info); assert(info->chain != chain); chain->chain = info->chain; } static void sna_dri2_event_free(struct sna_dri2_event *info) { DrawablePtr draw = info->draw; DBG(("%s(draw?=%d)\n", __FUNCTION__, draw != NULL)); if (draw && draw->type == DRAWABLE_WINDOW) sna_dri2_remove_event((WindowPtr)draw, info); _sna_dri2_destroy_buffer(info->sna, info->front); _sna_dri2_destroy_buffer(info->sna, info->back); while (!list_is_empty(&info->cache)) { struct dri_bo *c; c = list_first_entry(&info->cache, struct dri_bo, link); list_del(&c->link); DBG(("%s: releasing cached handle=%d\n", __FUNCTION__, c->bo ? c->bo->handle : 0)); if (c->bo) kgem_bo_destroy(&info->sna->kgem, c->bo); free(c); } if (info->bo) { DBG(("%s: releasing batch handle=%d\n", __FUNCTION__, info->bo->handle)); kgem_bo_destroy(&info->sna->kgem, info->bo); } _list_del(&info->link); free(info); } static void sna_dri2_client_gone(CallbackListPtr *list, void *closure, void *data) { NewClientInfoRec *clientinfo = data; ClientPtr client = clientinfo->client; struct sna_client *priv = sna_client(client); struct sna *sna = closure; if (priv->events.next == NULL) return; if (client->clientState != ClientStateGone) return; DBG(("%s(active?=%d)\n", __FUNCTION__, !list_is_empty(&priv->events))); while (!list_is_empty(&priv->events)) { struct sna_dri2_event *event; event = list_first_entry(&priv->events, struct sna_dri2_event, link); assert(event->client == client); if (event->queued) { if (event->draw) sna_dri2_remove_event((WindowPtr)event->draw, event); event->client = NULL; event->draw = NULL; list_del(&event->link); } else sna_dri2_event_free(event); } if (--sna->dri2.client_count == 0) DeleteCallback(&ClientStateCallback, sna_dri2_client_gone, sna); } static bool add_event_to_client(struct sna_dri2_event *info, struct sna *sna, ClientPtr client) { struct sna_client *priv = sna_client(client); if (priv->events.next == NULL) { if (sna->dri2.client_count++ == 0 && !AddCallback(&ClientStateCallback, sna_dri2_client_gone, sna)) return false; list_init(&priv->events); } list_add(&info->link, &priv->events); info->client = client; return true; } static struct sna_dri2_event * sna_dri2_add_event(struct sna *sna, DrawablePtr draw, ClientPtr client) { struct dri2_window *priv; struct sna_dri2_event *info, *chain; assert(draw->type == DRAWABLE_WINDOW); DBG(("%s: adding event to window %ld)\n", __FUNCTION__, (long)draw->id)); priv = dri2_window((WindowPtr)draw); if (priv == NULL) return NULL; info = calloc(1, sizeof(struct sna_dri2_event)); if (info == NULL) return NULL; list_init(&info->cache); info->sna = sna; info->draw = draw; info->crtc = priv->crtc; info->pipe = sna_crtc_to_pipe(priv->crtc); if (!add_event_to_client(info, sna, client)) { free(info); return NULL; } assert(priv->chain != info); if (priv->chain == NULL) { priv->chain = info; return info; } chain = priv->chain; while (chain->chain != NULL) chain = chain->chain; assert(chain != info); chain->chain = info; return info; } void sna_dri2_decouple_window(WindowPtr win) { struct dri2_window *priv; priv = dri2_window(win); if (priv == NULL) return; DBG(("%s: window=%ld\n", __FUNCTION__, win->drawable.id)); if (priv->front) { struct sna *sna = to_sna_from_drawable(&win->drawable); assert(priv->crtc); sna_shadow_unset_crtc(sna, priv->crtc); _sna_dri2_destroy_buffer(sna, priv->front); priv->front = NULL; } } void sna_dri2_destroy_window(WindowPtr win) { struct dri2_window *priv; priv = dri2_window(win); if (priv == NULL) return; DBG(("%s: window=%ld\n", __FUNCTION__, win->drawable.id)); if (priv->front) { struct sna *sna = to_sna_from_drawable(&win->drawable); assert(priv->crtc); sna_shadow_unset_crtc(sna, priv->crtc); _sna_dri2_destroy_buffer(sna, priv->front); } if (priv->chain) { struct sna_dri2_event *info, *chain; DBG(("%s: freeing chain\n", __FUNCTION__)); chain = priv->chain; while ((info = chain)) { info->draw = NULL; info->client = NULL; list_del(&info->link); chain = info->chain; info->chain = NULL; if (!info->queued) sna_dri2_event_free(info); } } free(priv); } static void sna_dri2_flip_handler(struct drm_event_vblank *event, void *data) { DBG(("%s: sequence=%d\n", __FUNCTION__, event->sequence)); sna_dri2_flip_event(data); } static bool sna_dri2_flip(struct sna_dri2_event *info) { struct kgem_bo *bo = get_private(info->back)->bo; struct kgem_bo *tmp_bo; uint32_t tmp_name; int tmp_pitch; DBG(("%s(type=%d)\n", __FUNCTION__, info->type)); assert(sna_pixmap_get_buffer(info->sna->front) == info->front); assert(get_drawable_pixmap(info->draw)->drawable.height * bo->pitch <= kgem_bo_size(bo)); assert(bo->refcnt); if (!sna_page_flip(info->sna, bo, sna_dri2_flip_handler, info->type == FLIP_ASYNC ? NULL : info)) return false; assert(info->sna->dri2.flip_pending == NULL || info->sna->dri2.flip_pending == info); if (info->type != FLIP_ASYNC) info->sna->dri2.flip_pending = info; DBG(("%s: marked handle=%d as scanout, swap front (handle=%d, name=%d) and back (handle=%d, name=%d)\n", __FUNCTION__, bo->handle, get_private(info->front)->bo->handle, info->front->name, get_private(info->back)->bo->handle, info->back->name)); tmp_bo = get_private(info->front)->bo; tmp_name = info->front->name; tmp_pitch = info->front->pitch; set_bo(info->sna->front, bo); info->front->name = info->back->name; info->front->pitch = info->back->pitch; get_private(info->front)->bo = bo; info->back->name = tmp_name; info->back->pitch = tmp_pitch; get_private(info->back)->bo = tmp_bo; mark_stale(info->back); assert(get_private(info->front)->bo->refcnt); assert(get_private(info->back)->bo->refcnt); assert(get_private(info->front)->bo != get_private(info->back)->bo); info->queued = true; return true; } static bool can_flip(struct sna * sna, DrawablePtr draw, DRI2BufferPtr front, DRI2BufferPtr back, xf86CrtcPtr crtc) { WindowPtr win = (WindowPtr)draw; PixmapPtr pixmap; assert((sna->flags & SNA_NO_WAIT) == 0); if (!DBG_CAN_FLIP) return false; if (draw->type == DRAWABLE_PIXMAP) return false; if (!sna->mode.front_active) { DBG(("%s: no, active CRTC\n", __FUNCTION__)); return false; } assert(sna->scrn->vtSema); if ((sna->flags & (SNA_HAS_FLIP | SNA_HAS_ASYNC_FLIP)) == 0) { DBG(("%s: no, pageflips disabled\n", __FUNCTION__)); return false; } if (front->format != back->format) { DBG(("%s: no, format mismatch, front = %d, back = %d\n", __FUNCTION__, front->format, back->format)); return false; } if (sna->mode.shadow_active) { DBG(("%s: no, shadow enabled\n", __FUNCTION__)); return false; } if (!sna_crtc_is_on(crtc)) { DBG(("%s: ref-pipe=%d is disabled\n", __FUNCTION__, sna_crtc_to_pipe(crtc))); return false; } pixmap = get_window_pixmap(win); if (pixmap != sna->front) { DBG(("%s: no, window (pixmap=%ld) is not attached to the front buffer (pixmap=%ld)\n", __FUNCTION__, pixmap->drawable.serialNumber, sna->front->drawable.serialNumber)); return false; } if (sna_pixmap_get_buffer(pixmap) != front) { DBG(("%s: no, DRI2 drawable is no longer attached (old name=%d, new name=%d) to pixmap=%ld\n", __FUNCTION__, front->name, sna_pixmap_get_buffer(pixmap) ? ((DRI2BufferPtr)sna_pixmap_get_buffer(pixmap))->name : 0, pixmap->drawable.serialNumber)); return false; } assert(get_private(front)->pixmap == sna->front); assert(sna_pixmap(sna->front)->gpu_bo == get_private(front)->bo); if (!get_private(back)->bo->scanout) { DBG(("%s: no, DRI2 drawable was too small at time of creation)\n", __FUNCTION__)); return false; } if (get_private(back)->size != get_private(front)->size) { DBG(("%s: no, DRI2 drawable does not fit into scanout\n", __FUNCTION__)); return false; } DBG(("%s: window size: %dx%d, clip=(%d, %d), (%d, %d) x %d\n", __FUNCTION__, win->drawable.width, win->drawable.height, win->clipList.extents.x1, win->clipList.extents.y1, win->clipList.extents.x2, win->clipList.extents.y2, region_num_rects(&win->clipList))); if (!RegionEqual(&win->clipList, &draw->pScreen->root->winSize)) { DBG(("%s: no, window is clipped: clip region=(%d, %d), (%d, %d), root size=(%d, %d), (%d, %d)\n", __FUNCTION__, win->clipList.extents.x1, win->clipList.extents.y1, win->clipList.extents.x2, win->clipList.extents.y2, draw->pScreen->root->winSize.extents.x1, draw->pScreen->root->winSize.extents.y1, draw->pScreen->root->winSize.extents.x2, draw->pScreen->root->winSize.extents.y2)); return false; } if (draw->x != 0 || draw->y != 0 || #ifdef COMPOSITE draw->x != pixmap->screen_x || draw->y != pixmap->screen_y || #endif draw->width != pixmap->drawable.width || draw->height != pixmap->drawable.height) { DBG(("%s: no, window is not full size (%dx%d)!=(%dx%d)\n", __FUNCTION__, draw->width, draw->height, pixmap->drawable.width, pixmap->drawable.height)); return false; } /* prevent an implicit tiling mode change */ if (get_private(back)->bo->tiling > I915_TILING_X) { DBG(("%s -- no, tiling mismatch: front %d, back=%d, want-tiled?=%d\n", __FUNCTION__, get_private(front)->bo->tiling, get_private(back)->bo->tiling, !!(sna->flags & SNA_LINEAR_FB))); return false; } if (get_private(front)->bo->pitch != get_private(back)->bo->pitch) { DBG(("%s -- no, pitch mismatch: front %d, back=%d\n", __FUNCTION__, get_private(front)->bo->pitch, get_private(back)->bo->pitch)); return false; } if (sna_pixmap(pixmap)->pinned & ~(PIN_DRI2 | PIN_SCANOUT)) { DBG(("%s -- no, pinned: front %x\n", __FUNCTION__, sna_pixmap(pixmap)->pinned)); return false; } DBG(("%s: yes, pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); assert(dri2_window(win)->front == NULL); return true; } static bool can_xchg(struct sna *sna, DrawablePtr draw, DRI2BufferPtr front, DRI2BufferPtr back) { WindowPtr win = (WindowPtr)draw; PixmapPtr pixmap; if (!DBG_CAN_XCHG) return false; if (draw->type == DRAWABLE_PIXMAP) return false; if (front->format != back->format) { DBG(("%s: no, format mismatch, front = %d, back = %d\n", __FUNCTION__, front->format, back->format)); return false; } pixmap = get_window_pixmap(win); if (get_private(front)->pixmap != pixmap) { DBG(("%s: no, DRI2 drawable is no longer attached, old pixmap=%ld, now pixmap=%ld\n", __FUNCTION__, get_private(front)->pixmap->drawable.serialNumber, pixmap->drawable.serialNumber)); return false; } DBG(("%s: window size: %dx%d, clip=(%d, %d), (%d, %d) x %d, pixmap size=%dx%d\n", __FUNCTION__, win->drawable.width, win->drawable.height, win->clipList.extents.x1, win->clipList.extents.y1, win->clipList.extents.x2, win->clipList.extents.y2, region_num_rects(&win->clipList), pixmap->drawable.width, pixmap->drawable.height)); if (is_clipped(&win->clipList, &pixmap->drawable)) { DBG(("%s: no, %dx%d window is clipped: clip region=(%d, %d), (%d, %d)\n", __FUNCTION__, draw->width, draw->height, win->clipList.extents.x1, win->clipList.extents.y1, win->clipList.extents.x2, win->clipList.extents.y2)); return false; } if (get_private(back)->size != get_private(front)->size) { DBG(("%s: no, back buffer %dx%d does not match front buffer %dx%d\n", __FUNCTION__, get_private(back)->size & 0x7fff, (get_private(back)->size >> 16) & 0x7fff, get_private(front)->size & 0x7fff, (get_private(front)->size >> 16) & 0x7fff)); return false; } if (pixmap == sna->front && !(sna->flags & SNA_TEAR_FREE) && sna->mode.front_active) { DBG(("%s: no, front buffer, requires flipping\n", __FUNCTION__)); return false; } if (sna_pixmap(pixmap)->pinned & ~(PIN_DRI2 | PIN_SCANOUT)) { DBG(("%s: no, pinned: %x\n", __FUNCTION__, sna_pixmap(pixmap)->pinned)); return false; } DBG(("%s: yes, pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); return true; } static bool overlaps_other_crtc(struct sna *sna, xf86CrtcPtr desired) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); int c; for (c = 0; c < sna->mode.num_real_crtc; c++) { xf86CrtcPtr crtc = config->crtc[c]; if (crtc == desired) continue; if (!crtc->enabled) continue; if (desired->bounds.x1 < crtc->bounds.x2 && desired->bounds.x2 > crtc->bounds.x1 && desired->bounds.y1 < crtc->bounds.y2 && desired->bounds.y2 > crtc->bounds.y1) return true; } return false; } static bool can_xchg_crtc(struct sna *sna, DrawablePtr draw, DRI2BufferPtr front, DRI2BufferPtr back, xf86CrtcPtr crtc) { WindowPtr win = (WindowPtr)draw; PixmapPtr pixmap; if (!DBG_CAN_XCHG) return false; if ((sna->flags & SNA_TEAR_FREE) == 0) { DBG(("%s: no, requires TearFree\n", __FUNCTION__)); return false; } if (draw->type == DRAWABLE_PIXMAP) return false; if (front->format != back->format) { DBG(("%s: no, format mismatch, front = %d, back = %d\n", __FUNCTION__, front->format, back->format)); return false; } if (memcmp(&win->clipList.extents, &crtc->bounds, sizeof(crtc->bounds))) { DBG(("%s: no, window [(%d, %d), (%d, %d)] does not cover CRTC [(%d, %d), (%d, %d)]\n", __FUNCTION__, win->clipList.extents.x1, win->clipList.extents.y1, win->clipList.extents.x2, win->clipList.extents.y2, crtc->bounds.x1, crtc->bounds.y1, crtc->bounds.x2, crtc->bounds.y2)); return false; } if (sna_crtc_is_transformed(crtc)) { DBG(("%s: no, CRTC is rotated\n", __FUNCTION__)); return false; } pixmap = get_window_pixmap(win); if (pixmap != sna->front) { DBG(("%s: no, not attached to front buffer\n", __FUNCTION__)); return false; } if (get_private(front)->pixmap != pixmap) { DBG(("%s: no, DRI2 drawable is no longer attached, old pixmap=%ld, now pixmap=%ld\n", __FUNCTION__, get_private(front)->pixmap->drawable.serialNumber, pixmap->drawable.serialNumber)); return false; } DBG(("%s: window size: %dx%d, clip=(%d, %d), (%d, %d) x %d\n", __FUNCTION__, win->drawable.width, win->drawable.height, win->clipList.extents.x1, win->clipList.extents.y1, win->clipList.extents.x2, win->clipList.extents.y2, region_num_rects(&win->clipList))); if (is_clipped(&win->clipList, &win->drawable)) { DBG(("%s: no, %dx%d window is clipped: clip region=(%d, %d), (%d, %d)\n", __FUNCTION__, draw->width, draw->height, win->clipList.extents.x1, win->clipList.extents.y1, win->clipList.extents.x2, win->clipList.extents.y2)); return false; } if (overlaps_other_crtc(sna, crtc)) { DBG(("%s: no, overlaps other CRTC\n", __FUNCTION__)); return false; } if (get_private(back)->size != (draw->height << 16 | draw->width)) { DBG(("%s: no, DRI2 buffers does not fit window\n", __FUNCTION__)); return false; } assert(win != win->drawable.pScreen->root); DBG(("%s: yes, pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); return true; } static void sna_dri2_xchg(DrawablePtr draw, DRI2BufferPtr front, DRI2BufferPtr back) { WindowPtr win = (WindowPtr)draw; struct kgem_bo *back_bo, *front_bo; PixmapPtr pixmap; int tmp; assert(draw->type != DRAWABLE_PIXMAP); pixmap = get_window_pixmap(win); back_bo = get_private(back)->bo; front_bo = get_private(front)->bo; assert(front_bo != back_bo); DBG(("%s: win=%ld, exchange front=%d/%d and back=%d/%d, pixmap=%ld %dx%d\n", __FUNCTION__, win->drawable.id, front_bo->handle, front->name, back_bo->handle, back->name, pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height)); DBG(("%s: back_bo pitch=%d, size=%d, ref=%d, active_scanout?=%d\n", __FUNCTION__, back_bo->pitch, kgem_bo_size(back_bo), back_bo->refcnt, back_bo->active_scanout)); DBG(("%s: front_bo pitch=%d, size=%d, ref=%d, active_scanout?=%d\n", __FUNCTION__, front_bo->pitch, kgem_bo_size(front_bo), front_bo->refcnt, front_bo->active_scanout)); assert(front_bo->refcnt); assert(back_bo->refcnt); assert(sna_pixmap_get_buffer(pixmap) == front); assert(pixmap->drawable.height * back_bo->pitch <= kgem_bo_size(back_bo)); assert(pixmap->drawable.height * front_bo->pitch <= kgem_bo_size(front_bo)); set_bo(pixmap, back_bo); get_private(front)->bo = back_bo; get_private(back)->bo = front_bo; mark_stale(back); tmp = front->name; front->name = back->name; back->name = tmp; tmp = front->pitch; front->pitch = back->pitch; back->pitch = tmp; assert(front_bo->refcnt); assert(back_bo->refcnt); assert(get_private(front)->bo == sna_pixmap(pixmap)->gpu_bo); } static void sna_dri2_xchg_crtc(struct sna *sna, DrawablePtr draw, xf86CrtcPtr crtc, DRI2BufferPtr front, DRI2BufferPtr back) { WindowPtr win = (WindowPtr)draw; DRI2Buffer2Ptr tmp; struct kgem_bo *bo; DBG(("%s: exchange front=%d/%d and back=%d/%d, win id=%lu, pixmap=%ld %dx%d\n", __FUNCTION__, get_private(front)->bo->handle, front->name, get_private(back)->bo->handle, back->name, win->drawable.id, get_window_pixmap(win)->drawable.serialNumber, get_window_pixmap(win)->drawable.width, get_window_pixmap(win)->drawable.height)); DamageRegionAppend(&win->drawable, &win->clipList); sna_shadow_set_crtc(sna, crtc, get_private(back)->bo); DamageRegionProcessPending(&win->drawable); assert(dri2_window(win)->front == NULL); tmp = calloc(1, sizeof(*tmp) + sizeof(struct sna_dri2_private)); if (tmp == NULL) { back->attachment = -1; if (get_private(back)->proxy == NULL) { get_private(back)->pixmap = get_window_pixmap(win); get_private(back)->proxy = sna_dri2_reference_buffer(sna_pixmap_get_buffer(get_private(back)->pixmap)); } dri2_window(win)->front = sna_dri2_reference_buffer(back); return; } *tmp = *back; tmp->attachment = DRI2BufferFrontLeft; tmp->driverPrivate = tmp + 1; get_private(tmp)->refcnt = 1; get_private(tmp)->bo = get_private(back)->bo; get_private(tmp)->size = get_private(back)->size; get_private(tmp)->pixmap = get_window_pixmap(win); get_private(tmp)->proxy = sna_dri2_reference_buffer(sna_pixmap_get_buffer(get_private(tmp)->pixmap)); dri2_window(win)->front = tmp; DBG(("%s: allocating new backbuffer\n", __FUNCTION__)); back->name = 0; bo = kgem_create_2d(&sna->kgem, draw->width, draw->height, draw->bitsPerPixel, get_private(back)->bo->tiling, CREATE_SCANOUT); if (bo != NULL) { get_private(back)->bo = bo; back->pitch = bo->pitch; back->name = kgem_bo_flink(&sna->kgem, bo); } if (back->name == 0) { if (bo != NULL) kgem_bo_destroy(&sna->kgem, bo); get_private(back)->bo = NULL; back->attachment = -1; } } static void frame_swap_complete(struct sna_dri2_event *frame, int type) { const struct ust_msc *swap; if (frame->draw == NULL) return; assert(frame->client); swap = sna_crtc_last_swap(frame->crtc); DBG(("%s(type=%d): draw=%ld, pipe=%d, frame=%lld [msc=%lld], tv=%d.%06d\n", __FUNCTION__, type, (long)frame->draw, frame->pipe, (long long)swap->msc, (long long)draw_current_msc(frame->draw, frame->crtc, swap->msc), swap->tv_sec, swap->tv_usec)); DRI2SwapComplete(frame->client, frame->draw, draw_current_msc(frame->draw, frame->crtc, swap->msc), swap->tv_sec, swap->tv_usec, type, frame->event_complete, frame->event_data); } static void fake_swap_complete(struct sna *sna, ClientPtr client, DrawablePtr draw, xf86CrtcPtr crtc, int type, DRI2SwapEventPtr func, void *data) { const struct ust_msc *swap; swap = sna_crtc_last_swap(crtc); DBG(("%s(type=%d): draw=%ld, pipe=%d, frame=%lld [msc %lld], tv=%d.%06d\n", __FUNCTION__, type, (long)draw->id, crtc ? sna_crtc_to_pipe(crtc) : -1, (long long)swap->msc, (long long)draw_current_msc(draw, crtc, swap->msc), swap->tv_sec, swap->tv_usec)); DRI2SwapComplete(client, draw, draw_current_msc(draw, crtc, swap->msc), swap->tv_sec, swap->tv_usec, type, func, data); } static void chain_swap(struct sna_dri2_event *chain) { union drm_wait_vblank vbl; if (chain->draw == NULL) { sna_dri2_event_free(chain); return; } if (chain->queued) /* too early! */ return; assert(chain == dri2_chain(chain->draw)); DBG(("%s: chaining draw=%ld, type=%d\n", __FUNCTION__, (long)chain->draw->id, chain->type)); chain->queued = true; switch (chain->type) { case SWAP_THROTTLE: DBG(("%s: emitting chained vsync'ed blit\n", __FUNCTION__)); if (chain->sna->mode.shadow && !chain->sna->mode.shadow_damage) { /* recursed from wait_for_shadow(), simply requeue */ DBG(("%s -- recursed from wait_for_shadow(), requeuing\n", __FUNCTION__)); VG_CLEAR(vbl); vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 1; vbl.request.signal = (uintptr_t)chain; if (!sna_wait_vblank(chain->sna, &vbl, chain->pipe)) return; DBG(("%s -- requeue failed, errno=%d\n", __FUNCTION__, errno)); } if (can_xchg(chain->sna, chain->draw, chain->front, chain->back)) { sna_dri2_xchg(chain->draw, chain->front, chain->back); } else if (can_xchg_crtc(chain->sna, chain->draw, chain->front, chain->back, chain->crtc)) { sna_dri2_xchg_crtc(chain->sna, chain->draw, chain->crtc, chain->front, chain->back); } else { assert(chain->queued); chain->bo = __sna_dri2_copy_region(chain->sna, chain->draw, NULL, chain->back, chain->front, true); } case SWAP: break; default: return; } VG_CLEAR(vbl); vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 1; vbl.request.signal = (uintptr_t)chain; if (sna_wait_vblank(chain->sna, &vbl, chain->pipe)) { DBG(("%s: vblank wait failed, unblocking client\n", __FUNCTION__)); frame_swap_complete(chain, DRI2_BLIT_COMPLETE); sna_dri2_event_free(chain); } else { if (chain->type == SWAP_THROTTLE && !swap_limit(chain->draw, 2)) { DBG(("%s: fake triple buffering, unblocking client\n", __FUNCTION__)); frame_swap_complete(chain, DRI2_BLIT_COMPLETE); } } } static inline bool rq_is_busy(struct kgem *kgem, struct kgem_bo *bo) { if (bo == NULL) return false; DBG(("%s: handle=%d, domain: %d exec? %d, rq? %d\n", __FUNCTION__, bo->handle, bo->domain, bo->exec != NULL, bo->rq != NULL)); assert(bo->refcnt); if (bo->exec) return true; if (bo->rq == NULL) return false; return __kgem_busy(kgem, bo->handle); } static bool sna_dri2_blit_complete(struct sna *sna, struct sna_dri2_event *info) { if (rq_is_busy(&sna->kgem, info->bo)) { union drm_wait_vblank vbl; DBG(("%s: vsync'ed blit is still busy, postponing\n", __FUNCTION__)); VG_CLEAR(vbl); vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 1; vbl.request.signal = (uintptr_t)info; assert(info->queued); if (!sna_wait_vblank(sna, &vbl, info->pipe)) return false; } DBG(("%s: blit finished\n", __FUNCTION__)); return true; } void sna_dri2_vblank_handler(struct drm_event_vblank *event) { struct sna_dri2_event *info = (void *)(uintptr_t)event->user_data; struct sna *sna = info->sna; DrawablePtr draw; union drm_wait_vblank vbl; uint64_t msc; DBG(("%s(type=%d, sequence=%d)\n", __FUNCTION__, info->type, event->sequence)); assert(info->queued); msc = sna_crtc_record_event(info->crtc, event); draw = info->draw; if (draw == NULL) { DBG(("%s -- drawable gone\n", __FUNCTION__)); goto done; } switch (info->type) { case FLIP: /* If we can still flip... */ if (can_flip(sna, draw, info->front, info->back, info->crtc) && sna_dri2_flip(info)) return; /* else fall through to blit */ case SWAP: assert(info->queued); if (sna->mode.shadow && !sna->mode.shadow_damage) { /* recursed from wait_for_shadow(), simply requeue */ DBG(("%s -- recursed from wait_for_shadow(), requeuing\n", __FUNCTION__)); } else if (can_xchg(info->sna, draw, info->front, info->back)) { sna_dri2_xchg(draw, info->front, info->back); info->type = SWAP_WAIT; } else if (can_xchg_crtc(sna, draw, info->front, info->back, info->crtc)) { sna_dri2_xchg_crtc(sna, draw, info->crtc, info->front, info->back); info->type = SWAP_WAIT; } else { assert(info->queued); info->bo = __sna_dri2_copy_region(sna, draw, NULL, info->back, info->front, true); info->type = SWAP_WAIT; } VG_CLEAR(vbl); vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 1; vbl.request.signal = (uintptr_t)info; assert(info->queued); if (!sna_wait_vblank(sna, &vbl, info->pipe)) return; DBG(("%s -- requeue failed, errno=%d\n", __FUNCTION__, errno)); /* fall through to SwapComplete */ case SWAP_WAIT: if (!sna_dri2_blit_complete(sna, info)) return; DBG(("%s: swap complete, unblocking client (frame=%d, tv=%d.%06d)\n", __FUNCTION__, event->sequence, event->tv_sec, event->tv_usec)); frame_swap_complete(info, DRI2_BLIT_COMPLETE); break; case SWAP_THROTTLE: DBG(("%s: %d complete, frame=%d tv=%d.%06d\n", __FUNCTION__, info->type, event->sequence, event->tv_sec, event->tv_usec)); if (xorg_can_triple_buffer()) { if (!sna_dri2_blit_complete(sna, info)) return; DBG(("%s: triple buffer swap complete, unblocking client (frame=%d, tv=%d.%06d)\n", __FUNCTION__, event->sequence, event->tv_sec, event->tv_usec)); frame_swap_complete(info, DRI2_BLIT_COMPLETE); } break; case WAITMSC: assert(info->client); DRI2WaitMSCComplete(info->client, draw, msc, event->tv_sec, event->tv_usec); break; default: xf86DrvMsg(sna->scrn->scrnIndex, X_WARNING, "%s: unknown vblank event received\n", __func__); /* Unknown type */ break; } if (info->chain) { assert(info->chain != info); assert(info->draw == draw); sna_dri2_remove_event((WindowPtr)draw, info); chain_swap(info->chain); info->draw = NULL; } done: sna_dri2_event_free(info); DBG(("%s complete\n", __FUNCTION__)); } static bool sna_dri2_immediate_blit(struct sna *sna, struct sna_dri2_event *info, bool sync, bool event) { DrawablePtr draw = info->draw; bool ret = false; if (sna->flags & SNA_NO_WAIT) sync = false; DBG(("%s: emitting immediate blit, throttling client, synced? %d, chained? %d, send-event? %d\n", __FUNCTION__, sync, dri2_chain(draw) != info, event)); info->type = SWAP_THROTTLE; if (!sync || dri2_chain(draw) == info) { DBG(("%s: no pending blit, starting chain\n", __FUNCTION__)); info->queued = true; info->bo = __sna_dri2_copy_region(sna, draw, NULL, info->back, info->front, sync); if (event) { if (sync) { union drm_wait_vblank vbl; VG_CLEAR(vbl); vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 1; vbl.request.signal = (uintptr_t)info; ret = !sna_wait_vblank(sna, &vbl, info->pipe); if (ret) event = !swap_limit(draw, 2); } if (event) { DBG(("%s: fake triple buffering, unblocking client\n", __FUNCTION__)); frame_swap_complete(info, DRI2_BLIT_COMPLETE); } } } else { DBG(("%s: pending blit, chained\n", __FUNCTION__)); ret = true; } DBG(("%s: continue? %d\n", __FUNCTION__, ret)); return ret; } static bool sna_dri2_flip_continue(struct sna_dri2_event *info) { DBG(("%s(mode=%d)\n", __FUNCTION__, info->mode)); if (info->mode > 0){ struct kgem_bo *bo = get_private(info->front)->bo; info->type = info->mode; if (bo != sna_pixmap(info->sna->front)->gpu_bo) return false; if (!sna_page_flip(info->sna, bo, sna_dri2_flip_handler, info)) return false; assert(info->sna->dri2.flip_pending == NULL || info->sna->dri2.flip_pending == info); info->sna->dri2.flip_pending = info; assert(info->queued); } else { info->type = -info->mode; if (!info->draw) return false; if (!can_flip(info->sna, info->draw, info->front, info->back, info->crtc)) return false; assert(sna_pixmap_get_buffer(get_drawable_pixmap(info->draw)) == info->front); if (!sna_dri2_flip(info)) return false; if (!xorg_can_triple_buffer()) { sna_dri2_get_back(info->sna, info->draw, info->back, info); DBG(("%s: fake triple buffering, unblocking client\n", __FUNCTION__)); frame_swap_complete(info, DRI2_FLIP_COMPLETE); } } info->mode = 0; return true; } static void chain_flip(struct sna *sna) { struct sna_dri2_event *chain = sna->dri2.flip_pending; assert(chain->type == FLIP); DBG(("%s: chaining type=%d, cancelled?=%d\n", __FUNCTION__, chain->type, chain->draw == NULL)); sna->dri2.flip_pending = NULL; if (chain->draw == NULL) { sna_dri2_event_free(chain); return; } assert(chain == dri2_chain(chain->draw)); assert(!chain->queued); chain->queued = true; if (can_flip(sna, chain->draw, chain->front, chain->back, chain->crtc) && sna_dri2_flip(chain)) { DBG(("%s: performing chained flip\n", __FUNCTION__)); } else { DBG(("%s: emitting chained vsync'ed blit\n", __FUNCTION__)); chain->bo = __sna_dri2_copy_region(sna, chain->draw, NULL, chain->back, chain->front, true); if (xorg_can_triple_buffer()) { union drm_wait_vblank vbl; VG_CLEAR(vbl); chain->type = SWAP_WAIT; vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 1; vbl.request.signal = (uintptr_t)chain; assert(chain->queued); if (!sna_wait_vblank(sna, &vbl, chain->pipe)) return; } DBG(("%s: fake triple buffering (or vblank wait failed), unblocking client\n", __FUNCTION__)); frame_swap_complete(chain, DRI2_BLIT_COMPLETE); sna_dri2_event_free(chain); } } static void sna_dri2_flip_event(struct sna_dri2_event *flip) { struct sna *sna = flip->sna; DBG(("%s(pipe=%d, event=%d)\n", __FUNCTION__, flip->pipe, flip->type)); assert(flip->queued); if (sna->dri2.flip_pending == flip) sna->dri2.flip_pending = NULL; /* We assume our flips arrive in order, so we don't check the frame */ switch (flip->type) { case FLIP: DBG(("%s: swap complete, unblocking client\n", __FUNCTION__)); frame_swap_complete(flip, DRI2_FLIP_COMPLETE); sna_dri2_event_free(flip); if (sna->dri2.flip_pending) chain_flip(sna); break; case FLIP_THROTTLE: DBG(("%s: triple buffer swap complete, unblocking client\n", __FUNCTION__)); frame_swap_complete(flip, DRI2_FLIP_COMPLETE); case FLIP_COMPLETE: if (sna->dri2.flip_pending) { sna_dri2_event_free(flip); chain_flip(sna); } else if (!flip->mode) { DBG(("%s: flip chain complete\n", __FUNCTION__)); if (flip->chain) { sna_dri2_remove_event((WindowPtr)flip->draw, flip); chain_swap(flip->chain); flip->draw = NULL; } sna_dri2_event_free(flip); } else if (!sna_dri2_flip_continue(flip)) { DBG(("%s: no longer able to flip\n", __FUNCTION__)); if (flip->draw == NULL || !sna_dri2_immediate_blit(sna, flip, false, flip->mode < 0)) sna_dri2_event_free(flip); } break; default: /* Unknown type */ xf86DrvMsg(sna->scrn->scrnIndex, X_WARNING, "%s: unknown vblank event received\n", __func__); sna_dri2_event_free(flip); if (sna->dri2.flip_pending) chain_flip(sna); break; } } static uint64_t get_current_msc(struct sna *sna, DrawablePtr draw, xf86CrtcPtr crtc) { union drm_wait_vblank vbl; uint64_t ret = -1; VG_CLEAR(vbl); vbl.request.type = _DRM_VBLANK_RELATIVE; vbl.request.sequence = 0; if (sna_wait_vblank(sna, &vbl, sna_crtc_to_pipe(crtc)) == 0) ret = sna_crtc_record_vblank(crtc, &vbl); return draw_current_msc(draw, crtc, ret); } #if defined(CHECK_FOR_COMPOSITOR) static Bool find(pointer value, XID id, pointer cdata) { return TRUE; } #endif static int use_triple_buffer(struct sna *sna, ClientPtr client, bool async) { if ((sna->flags & SNA_TRIPLE_BUFFER) == 0) { DBG(("%s: triple buffer disabled, using FLIP\n", __FUNCTION__)); return FLIP; } if (async) { DBG(("%s: running async, using %s\n", __FUNCTION__, sna->flags & SNA_HAS_ASYNC_FLIP ? "FLIP_ASYNC" : "FLIP_COMPLETE")); return sna->flags & SNA_HAS_ASYNC_FLIP ? FLIP_ASYNC : FLIP_COMPLETE; } if (xorg_can_triple_buffer()) { DBG(("%s: triple buffer enabled, using FLIP_THROTTLE\n", __FUNCTION__)); return FLIP_THROTTLE; } #if defined(CHECK_FOR_COMPOSITOR) /* Hack: Disable triple buffering for compositors */ { struct sna_client *priv = sna_client(client); if (priv->is_compositor == 0) priv->is_compositor = LookupClientResourceComplex(client, CompositeClientWindowType+1, find, NULL) ? FLIP : FLIP_COMPLETE; DBG(("%s: fake triple buffer enabled?=%d using %s\n", __FUNCTION__, priv->is_compositor != FLIP, priv->is_compositor == FLIP ? "FLIP" : "FLIP_COMPLETE")); return priv->is_compositor; } #else DBG(("%s: fake triple buffer enabled, using FLIP_COMPLETE\n", __FUNCTION__)); return FLIP_COMPLETE; #endif } static bool immediate_swap(struct sna *sna, uint64_t target_msc, uint64_t divisor, DrawablePtr draw, xf86CrtcPtr crtc, uint64_t *current_msc) { if (divisor == 0) { *current_msc = -1; if (sna->flags & SNA_NO_WAIT) { DBG(("%s: yes, waits are disabled\n", __FUNCTION__)); return true; } if (target_msc) *current_msc = get_current_msc(sna, draw, crtc); DBG(("%s: current_msc=%ld, target_msc=%ld -- %s\n", __FUNCTION__, (long)*current_msc, (long)target_msc, (*current_msc >= target_msc - 1) ? "yes" : "no")); return *current_msc >= target_msc - 1; } DBG(("%s: explicit waits requests, divisor=%ld\n", __FUNCTION__, (long)divisor)); *current_msc = get_current_msc(sna, draw, crtc); return false; } static bool sna_dri2_schedule_flip(ClientPtr client, DrawablePtr draw, xf86CrtcPtr crtc, DRI2BufferPtr front, DRI2BufferPtr back, CARD64 *target_msc, CARD64 divisor, CARD64 remainder, DRI2SwapEventPtr func, void *data) { struct sna *sna = to_sna_from_drawable(draw); struct sna_dri2_event *info; uint64_t current_msc; if (immediate_swap(sna, *target_msc, divisor, draw, crtc, ¤t_msc)) { int type; info = sna->dri2.flip_pending; DBG(("%s: performing immediate swap on pipe %d, pending? %d, mode: %d, continuation? %d\n", __FUNCTION__, sna_crtc_to_pipe(crtc), info != NULL, info ? info->mode : 0, info && info->draw == draw)); if (info && info->draw == draw) { assert(info->type != FLIP); assert(info->front == front); if (info->back != back) { _sna_dri2_destroy_buffer(sna, info->back); info->back = sna_dri2_reference_buffer(back); } if (info->mode || current_msc >= *target_msc) { DBG(("%s: executing xchg of pending flip\n", __FUNCTION__)); sna_dri2_xchg(draw, front, back); info->mode = type = FLIP_COMPLETE; goto new_back; } else { DBG(("%s: chaining flip\n", __FUNCTION__)); type = FLIP_THROTTLE; if (xorg_can_triple_buffer()) info->mode = -type; else info->mode = -FLIP_COMPLETE; goto out; } } info = sna_dri2_add_event(sna, draw, client); if (info == NULL) return false; assert(info->crtc == crtc); info->event_complete = func; info->event_data = data; info->front = sna_dri2_reference_buffer(front); info->back = sna_dri2_reference_buffer(back); if (sna->dri2.flip_pending) { /* We need to first wait (one vblank) for the * async flips to complete before this client * can take over. */ DBG(("%s: queueing flip after pending completion\n", __FUNCTION__)); info->type = type = FLIP; sna->dri2.flip_pending = info; assert(info->queued); current_msc++; } else { info->type = type = use_triple_buffer(sna, client, *target_msc == 0); if (!sna_dri2_flip(info)) { DBG(("%s: flip failed, falling back\n", __FUNCTION__)); sna_dri2_event_free(info); return false; } } swap_limit(draw, 1 + (type == FLIP_THROTTLE)); if (type >= FLIP_COMPLETE) { new_back: if (!xorg_can_triple_buffer()) sna_dri2_get_back(sna, draw, back, info); DBG(("%s: fake triple buffering, unblocking client\n", __FUNCTION__)); frame_swap_complete(info, DRI2_EXCHANGE_COMPLETE); if (info->type == FLIP_ASYNC) sna_dri2_event_free(info); } out: DBG(("%s: target_msc=%llu\n", __FUNCTION__, current_msc + 1)); *target_msc = current_msc + 1; return true; } info = sna_dri2_add_event(sna, draw, client); if (info == NULL) return false; assert(info->crtc == crtc); info->event_complete = func; info->event_data = data; info->type = FLIP; info->front = sna_dri2_reference_buffer(front); info->back = sna_dri2_reference_buffer(back); /* * If divisor is zero, or current_msc is smaller than target_msc * we just need to make sure target_msc passes before initiating * the swap. */ if (divisor && current_msc >= *target_msc) { DBG(("%s: missed target, queueing event for next: current=%lld, target=%lld, divisor=%lld, remainder=%lld\n", __FUNCTION__, (long long)current_msc, (long long)*target_msc, (long long)divisor, (long long)remainder)); *target_msc = current_msc + remainder - current_msc % divisor; if (*target_msc <= current_msc) *target_msc += divisor; } if (*target_msc <= current_msc + 1) { if (!sna_dri2_flip(info)) { sna_dri2_event_free(info); return false; } *target_msc = current_msc + 1; } else { union drm_wait_vblank vbl; VG_CLEAR(vbl); vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT; /* Account for 1 frame extra pageflip delay */ vbl.reply.sequence = draw_target_seq(draw, *target_msc - 1); vbl.request.signal = (uintptr_t)info; info->queued = true; if (sna_wait_vblank(sna, &vbl, info->pipe)) { sna_dri2_event_free(info); return false; } } DBG(("%s: reported target_msc=%llu\n", __FUNCTION__, *target_msc)); swap_limit(draw, 1); return true; } static bool sna_dri2_schedule_xchg(ClientPtr client, DrawablePtr draw, xf86CrtcPtr crtc, DRI2BufferPtr front, DRI2BufferPtr back, CARD64 *target_msc, CARD64 divisor, CARD64 remainder, DRI2SwapEventPtr func, void *data) { struct sna *sna = to_sna_from_drawable(draw); uint64_t current_msc; bool sync, event; if (!immediate_swap(sna, *target_msc, divisor, draw, crtc, ¤t_msc)) return false; sync = current_msc < *target_msc; event = dri2_chain(draw) == NULL; if (!sync || event) { DBG(("%s: performing immediate xchg on pipe %d\n", __FUNCTION__, sna_crtc_to_pipe(crtc))); sna_dri2_xchg(draw, front, back); } if (sync) { struct sna_dri2_event *info; info = sna_dri2_add_event(sna, draw, client); if (!info) goto complete; info->event_complete = func; info->event_data = data; info->front = sna_dri2_reference_buffer(front); info->back = sna_dri2_reference_buffer(back); info->type = SWAP_THROTTLE; if (event) { union drm_wait_vblank vbl; VG_CLEAR(vbl); vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 1; vbl.request.signal = (uintptr_t)info; info->queued = true; if (sna_wait_vblank(sna, &vbl, info->pipe)) { sna_dri2_event_free(info); goto complete; } swap_limit(draw, 2); } } else { complete: fake_swap_complete(sna, client, draw, crtc, DRI2_EXCHANGE_COMPLETE, func, data); } *target_msc = current_msc + 1; return true; } static bool sna_dri2_schedule_xchg_crtc(ClientPtr client, DrawablePtr draw, xf86CrtcPtr crtc, DRI2BufferPtr front, DRI2BufferPtr back, CARD64 *target_msc, CARD64 divisor, CARD64 remainder, DRI2SwapEventPtr func, void *data) { struct sna *sna = to_sna_from_drawable(draw); uint64_t current_msc; bool sync, event; if (!immediate_swap(sna, *target_msc, divisor, draw, crtc, ¤t_msc)) return false; sync = current_msc < *target_msc; event = dri2_chain(draw) == NULL; if (!sync || event) { DBG(("%s: performing immediate xchg only on pipe %d\n", __FUNCTION__, sna_crtc_to_pipe(crtc))); sna_dri2_xchg_crtc(sna, draw, crtc, front, back); } if (sync) { struct sna_dri2_event *info; info = sna_dri2_add_event(sna, draw, client); if (!info) goto complete; info->event_complete = func; info->event_data = data; info->front = sna_dri2_reference_buffer(front); info->back = sna_dri2_reference_buffer(back); info->type = SWAP_THROTTLE; if (event) { union drm_wait_vblank vbl; VG_CLEAR(vbl); vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 1; vbl.request.signal = (uintptr_t)info; info->queued = true; if (sna_wait_vblank(sna, &vbl, info->pipe)) { sna_dri2_event_free(info); goto complete; } swap_limit(draw, 2); } } else { complete: fake_swap_complete(sna, client, draw, crtc, DRI2_EXCHANGE_COMPLETE, func, data); } *target_msc = current_msc + 1; return true; } static bool has_pending_events(struct sna *sna) { struct pollfd pfd; pfd.fd = sna->kgem.fd; pfd.events = POLLIN; return poll(&pfd, 1, 0) == 1; } /* * ScheduleSwap is responsible for requesting a DRM vblank event for the * appropriate frame. * * In the case of a blit (e.g. for a windowed swap) or buffer exchange, * the vblank requested can simply be the last queued swap frame + the swap * interval for the drawable. * * In the case of a page flip, we request an event for the last queued swap * frame + swap interval - 1, since we'll need to queue the flip for the frame * immediately following the received event. * * The client will be blocked if it tries to perform further GL commands * after queueing a swap, though in the Intel case after queueing a flip, the * client is free to queue more commands; they'll block in the kernel if * they access buffers busy with the flip. * * When the swap is complete, the driver should call into the server so it * can send any swap complete events that have been requested. */ static int sna_dri2_schedule_swap(ClientPtr client, DrawablePtr draw, DRI2BufferPtr front, DRI2BufferPtr back, CARD64 *target_msc, CARD64 divisor, CARD64 remainder, DRI2SwapEventPtr func, void *data) { struct sna *sna = to_sna_from_drawable(draw); union drm_wait_vblank vbl; xf86CrtcPtr crtc = NULL; struct sna_dri2_event *info = NULL; int type = DRI2_EXCHANGE_COMPLETE; CARD64 current_msc; DBG(("%s: draw=%lu %dx%d, pixmap=%ld %dx%d, back=%u (refs=%d/%d, flush=%d) , front=%u (refs=%d/%d, flush=%d)\n", __FUNCTION__, (long)draw->id, draw->width, draw->height, get_drawable_pixmap(draw)->drawable.serialNumber, get_drawable_pixmap(draw)->drawable.width, get_drawable_pixmap(draw)->drawable.height, get_private(back)->bo->handle, get_private(back)->refcnt, get_private(back)->bo->refcnt, get_private(back)->bo->flush, get_private(front)->bo->handle, get_private(front)->refcnt, get_private(front)->bo->refcnt, get_private(front)->bo->flush)); DBG(("%s(target_msc=%llu, divisor=%llu, remainder=%llu)\n", __FUNCTION__, (long long)*target_msc, (long long)divisor, (long long)remainder)); assert(get_private(front)->refcnt); assert(get_private(back)->refcnt); assert(get_private(front)->bo->refcnt); assert(get_private(back)->bo->refcnt); if (get_private(front)->pixmap != get_drawable_pixmap(draw)) { DBG(("%s: decoupled DRI2 front pixmap=%ld, actual pixmap=%ld\n", __FUNCTION__, get_private(front)->pixmap->drawable.serialNumber, get_drawable_pixmap(draw)->drawable.serialNumber)); goto skip; } if (get_private(back)->stale) { DBG(("%s: stale back buffer\n", __FUNCTION__)); goto skip; } assert(sna_pixmap_from_drawable(draw)->flush); if (draw->type != DRAWABLE_PIXMAP) { WindowPtr win = (WindowPtr)draw; struct dri2_window *priv = dri2_window(win); if (priv->front) { assert(front == priv->front); assert(get_private(priv->front)->refcnt > 1); get_private(priv->front)->refcnt--; priv->front = NULL; } if (win->clipList.extents.x2 <= win->clipList.extents.x1 || win->clipList.extents.y2 <= win->clipList.extents.y1) { DBG(("%s: window clipped (%d, %d), (%d, %d)\n", __FUNCTION__, win->clipList.extents.x1, win->clipList.extents.y1, win->clipList.extents.x2, win->clipList.extents.y2)); goto skip; } } /* Drawable not displayed... just complete the swap */ if ((sna->flags & SNA_NO_WAIT) == 0) crtc = sna_dri2_get_crtc(draw); if (crtc == NULL) { DBG(("%s: off-screen, immediate update\n", __FUNCTION__)); goto blit; } assert(draw->type != DRAWABLE_PIXMAP); while (dri2_chain(draw) && has_pending_events(sna)) { DBG(("%s: flushing pending events\n", __FUNCTION__)); sna_mode_wakeup(sna); } if (can_xchg(sna, draw, front, back) && sna_dri2_schedule_xchg(client, draw, crtc, front, back, target_msc, divisor, remainder, func, data)) return TRUE; if (can_xchg_crtc(sna, draw, front, back, crtc) && sna_dri2_schedule_xchg_crtc(client, draw, crtc, front, back, target_msc, divisor, remainder, func, data)) return TRUE; if (can_flip(sna, draw, front, back, crtc) && sna_dri2_schedule_flip(client, draw, crtc, front, back, target_msc, divisor, remainder, func, data)) return TRUE; VG_CLEAR(vbl); info = sna_dri2_add_event(sna, draw, client); if (!info) goto blit; assert(info->crtc == crtc); info->event_complete = func; info->event_data = data; info->front = sna_dri2_reference_buffer(front); info->back = sna_dri2_reference_buffer(back); if (immediate_swap(sna, *target_msc, divisor, draw, crtc, ¤t_msc)) { bool sync = current_msc < *target_msc; if (!sna_dri2_immediate_blit(sna, info, sync, true)) sna_dri2_event_free(info); *target_msc = current_msc + sync; return TRUE; } vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT; vbl.request.signal = (uintptr_t)info; /* * If divisor is zero, or current_msc is smaller than target_msc * we just need to make sure target_msc passes before initiating * the swap. */ info->type = SWAP; info->queued = true; if (divisor && current_msc >= *target_msc) { DBG(("%s: missed target, queueing event for next: current=%lld, target=%lld, divisor=%lld, remainder=%lld\n", __FUNCTION__, (long long)current_msc, (long long)*target_msc, (long long)divisor, (long long)remainder)); *target_msc = current_msc + remainder - current_msc % divisor; if (*target_msc <= current_msc) *target_msc += divisor; } vbl.request.sequence = draw_target_seq(draw, *target_msc - 1); if (*target_msc <= current_msc + 1) { DBG(("%s: performing blit before queueing\n", __FUNCTION__)); assert(info->queued); info->bo = __sna_dri2_copy_region(sna, draw, NULL, back, front, true); info->type = SWAP_WAIT; vbl.request.type = DRM_VBLANK_RELATIVE | DRM_VBLANK_EVENT; vbl.request.sequence = 1; *target_msc = current_msc + 1; } assert(info->queued); if (sna_wait_vblank(sna, &vbl, info->pipe)) goto blit; DBG(("%s: reported target_msc=%llu\n", __FUNCTION__, *target_msc)); swap_limit(draw, 1 + (info->type == SWAP_WAIT)); return TRUE; blit: DBG(("%s -- blit\n", __FUNCTION__)); if (info) sna_dri2_event_free(info); if (can_xchg(sna, draw, front, back)) { sna_dri2_xchg(draw, front, back); } else { __sna_dri2_copy_region(sna, draw, NULL, back, front, false); type = DRI2_BLIT_COMPLETE; } skip: DBG(("%s: unable to show frame, unblocking client\n", __FUNCTION__)); if (crtc == NULL) crtc = sna_mode_first_crtc(sna); fake_swap_complete(sna, client, draw, crtc, type, func, data); *target_msc = 0; /* offscreen, so zero out target vblank count */ return TRUE; } /* * Get current frame count and frame count timestamp, based on drawable's * crtc. */ static int sna_dri2_get_msc(DrawablePtr draw, CARD64 *ust, CARD64 *msc) { struct sna *sna = to_sna_from_drawable(draw); xf86CrtcPtr crtc = sna_dri2_get_crtc(draw); const struct ust_msc *swap; DBG(("%s(draw=%ld, pipe=%d)\n", __FUNCTION__, draw->id, crtc ? sna_crtc_to_pipe(crtc) : -1)); if (crtc != NULL) { union drm_wait_vblank vbl; VG_CLEAR(vbl); vbl.request.type = _DRM_VBLANK_RELATIVE; vbl.request.sequence = 0; if (sna_wait_vblank(sna, &vbl, sna_crtc_to_pipe(crtc)) == 0) sna_crtc_record_vblank(crtc, &vbl); } else /* Drawable not displayed, make up a *monotonic* value */ crtc = sna_mode_first_crtc(sna); swap = sna_crtc_last_swap(crtc); *msc = draw_current_msc(draw, crtc, swap->msc); *ust = ust64(swap->tv_sec, swap->tv_usec); DBG(("%s: msc=%llu, ust=%llu\n", __FUNCTION__, (long long)*msc, (long long)*ust)); return TRUE; } /* * Request a DRM event when the requested conditions will be satisfied. * * We need to handle the event and ask the server to wake up the client when * we receive it. */ static int sna_dri2_schedule_wait_msc(ClientPtr client, DrawablePtr draw, CARD64 target_msc, CARD64 divisor, CARD64 remainder) { struct sna *sna = to_sna_from_drawable(draw); struct sna_dri2_event *info = NULL; xf86CrtcPtr crtc; CARD64 current_msc; union drm_wait_vblank vbl; const struct ust_msc *swap; int pipe; crtc = sna_dri2_get_crtc(draw); DBG(("%s(pipe=%d, target_msc=%llu, divisor=%llu, rem=%llu)\n", __FUNCTION__, crtc ? sna_crtc_to_pipe(crtc) : -1, (long long)target_msc, (long long)divisor, (long long)remainder)); /* Drawable not visible, return immediately */ if (crtc == NULL) goto out_complete; pipe = sna_crtc_to_pipe(crtc); VG_CLEAR(vbl); /* Get current count */ vbl.request.type = _DRM_VBLANK_RELATIVE; vbl.request.sequence = 0; if (sna_wait_vblank(sna, &vbl, pipe)) goto out_complete; current_msc = draw_current_msc(draw, crtc, sna_crtc_record_vblank(crtc, &vbl)); /* If target_msc already reached or passed, set it to * current_msc to ensure we return a reasonable value back * to the caller. This keeps the client from continually * sending us MSC targets from the past by forcibly updating * their count on this call. */ if (divisor == 0 && current_msc >= target_msc) goto out_complete; info = sna_dri2_add_event(sna, draw, client); if (!info) goto out_complete; assert(info->crtc == crtc); info->type = WAITMSC; vbl.request.signal = (uintptr_t)info; vbl.request.type = DRM_VBLANK_ABSOLUTE | DRM_VBLANK_EVENT; /* * If divisor is zero, or current_msc is smaller than target_msc, * we just need to make sure target_msc passes before waking up the * client. Otherwise, compute the next msc to match divisor/remainder. */ if (divisor && current_msc >= target_msc) { DBG(("%s: missed target, queueing event for next: current=%lld, target=%lld, divisor=%lld, remainder=%lld\n", __FUNCTION__, (long long)current_msc, (long long)target_msc, (long long)divisor, (long long)remainder)); target_msc = current_msc + remainder - current_msc % divisor; if (target_msc <= current_msc) target_msc += divisor; } vbl.request.sequence = draw_target_seq(draw, target_msc); info->queued = true; if (sna_wait_vblank(sna, &vbl, pipe)) goto out_free_info; DRI2BlockClient(client, draw); return TRUE; out_free_info: sna_dri2_event_free(info); out_complete: if (crtc == NULL) crtc = sna_mode_first_crtc(sna); swap = sna_crtc_last_swap(crtc); DRI2WaitMSCComplete(client, draw, draw_current_msc(draw, crtc, swap->msc), swap->tv_sec, swap->tv_usec); return TRUE; } #else void sna_dri2_destroy_window(WindowPtr win) { } void sna_dri2_decouple_window(WindowPtr win) { } #endif static bool has_i830_dri(void) { return access(DRI_DRIVER_PATH "/i830_dri.so", R_OK) == 0; } static int namecmp(const char *s1, const char *s2) { char c1, c2; if (!s1 || *s1 == 0) { if (!s2 || *s2 == 0) return 0; else return 1; } while (*s1 == '_' || *s1 == ' ' || *s1 == '\t') s1++; while (*s2 == '_' || *s2 == ' ' || *s2 == '\t') s2++; c1 = isupper(*s1) ? tolower(*s1) : *s1; c2 = isupper(*s2) ? tolower(*s2) : *s2; while (c1 == c2) { if (c1 == '\0') return 0; s1++; while (*s1 == '_' || *s1 == ' ' || *s1 == '\t') s1++; s2++; while (*s2 == '_' || *s2 == ' ' || *s2 == '\t') s2++; c1 = isupper(*s1) ? tolower(*s1) : *s1; c2 = isupper(*s2) ? tolower(*s2) : *s2; } return c1 - c2; } static bool is_level(const char **str) { const char *s = *str; char *end; unsigned val; if (s == NULL || *s == '\0') return true; if (namecmp(s, "on") == 0) return true; if (namecmp(s, "true") == 0) return true; if (namecmp(s, "yes") == 0) return true; if (namecmp(s, "0") == 0) return true; if (namecmp(s, "off") == 0) return true; if (namecmp(s, "false") == 0) return true; if (namecmp(s, "no") == 0) return true; val = strtoul(s, &end, 0); if (val && *end == '\0') return true; if (val && *end == ':') *str = end + 1; return false; } static const char *dri_driver_name(struct sna *sna) { const char *s = xf86GetOptValString(sna->Options, OPTION_DRI); if (is_level(&s)) { if (sna->kgem.gen < 030) return has_i830_dri() ? "i830" : "i915"; else if (sna->kgem.gen < 040) return "i915"; else return "i965"; } return s; } bool sna_dri2_open(struct sna *sna, ScreenPtr screen) { DRI2InfoRec info; int major = 1, minor = 0; #if DRI2INFOREC_VERSION >= 4 const char *driverNames[2]; #endif DBG(("%s()\n", __FUNCTION__)); if (wedged(sna)) { xf86DrvMsg(sna->scrn->scrnIndex, X_WARNING, "loading DRI2 whilst the GPU is wedged.\n"); } if (xf86LoaderCheckSymbol("DRI2Version")) DRI2Version(&major, &minor); if (minor < 1) { xf86DrvMsg(sna->scrn->scrnIndex, X_WARNING, "DRI2 requires DRI2 module version 1.1.0 or later\n"); return false; } memset(&info, '\0', sizeof(info)); info.fd = sna->kgem.fd; info.driverName = dri_driver_name(sna); info.deviceName = intel_get_client_name(sna->dev); DBG(("%s: loading dri driver '%s' [gen=%d] for device '%s'\n", __FUNCTION__, info.driverName, sna->kgem.gen, info.deviceName)); #if DRI2INFOREC_VERSION == 2 /* The ABI between 2 and 3 was broken so we could get rid of * the multi-buffer alloc functions. Make sure we indicate the * right version so DRI2 can reject us if it's version 3 or above. */ info.version = 2; #else info.version = 3; #endif info.CreateBuffer = sna_dri2_create_buffer; info.DestroyBuffer = sna_dri2_destroy_buffer; info.CopyRegion = sna_dri2_copy_region; #if DRI2INFOREC_VERSION >= 4 info.version = 4; info.ScheduleSwap = sna_dri2_schedule_swap; info.GetMSC = sna_dri2_get_msc; info.ScheduleWaitMSC = sna_dri2_schedule_wait_msc; info.numDrivers = 2; info.driverNames = driverNames; driverNames[0] = info.driverName; driverNames[1] = info.driverName; #endif #if DRI2INFOREC_VERSION >= 6 if (xorg_can_triple_buffer()) { info.version = 6; info.SwapLimitValidate = sna_dri2_swap_limit_validate; info.ReuseBufferNotify = sna_dri2_reuse_buffer; } #endif #if USE_ASYNC_SWAP info.version = 10; info.scheduleSwap0 = 1; #endif return DRI2ScreenInit(screen, &info); } void sna_dri2_close(struct sna *sna, ScreenPtr screen) { DBG(("%s()\n", __FUNCTION__)); DRI2CloseScreen(screen); } xf86-video-intel-2.99.917/src/sna/sna_trapezoids_imprecise.c0000664000175000017500000027531612432737457020564 00000000000000/* * Copyright (c) 2007 David Turner * Copyright (c) 2008 M Joonas Pihlaja * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_trapezoids.h" #include "fb/fbpict.h" #include #undef SAMPLES_X #undef SAMPLES_Y /* TODO: Emit unantialiased and MSAA triangles. */ #ifndef MAX #define MAX(x,y) ((x) >= (y) ? (x) : (y)) #endif #ifndef MIN #define MIN(x,y) ((x) <= (y) ? (x) : (y)) #endif typedef void (*span_func_t)(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage); #if HAS_DEBUG_FULL static void _assert_pixmap_contains_box(PixmapPtr pixmap, BoxPtr box, const char *function) { if (box->x1 < 0 || box->y1 < 0 || box->x2 > pixmap->drawable.width || box->y2 > pixmap->drawable.height) { FatalError("%s: damage box is beyond the pixmap: box=(%d, %d), (%d, %d), pixmap=(%d, %d)\n", function, box->x1, box->y1, box->x2, box->y2, pixmap->drawable.width, pixmap->drawable.height); } } #define assert_pixmap_contains_box(p, b) _assert_pixmap_contains_box(p, b, __FUNCTION__) #else #define assert_pixmap_contains_box(p, b) #endif static void apply_damage(struct sna_composite_op *op, RegionPtr region) { DBG(("%s: damage=%p, region=%dx[(%d, %d), (%d, %d)]\n", __FUNCTION__, op->damage, region_num_rects(region), region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); if (op->damage == NULL) return; RegionTranslate(region, op->dst.x, op->dst.y); assert_pixmap_contains_box(op->dst.pixmap, RegionExtents(region)); sna_damage_add(op->damage, region); } static void _apply_damage_box(struct sna_composite_op *op, const BoxRec *box) { BoxRec r; r.x1 = box->x1 + op->dst.x; r.x2 = box->x2 + op->dst.x; r.y1 = box->y1 + op->dst.y; r.y2 = box->y2 + op->dst.y; assert_pixmap_contains_box(op->dst.pixmap, &r); sna_damage_add_box(op->damage, &r); } inline static void apply_damage_box(struct sna_composite_op *op, const BoxRec *box) { if (op->damage) _apply_damage_box(op, box); } #define FAST_SAMPLES_X_TO_INT_FRAC(x, i, f) \ _GRID_TO_INT_FRAC_shift(x, i, f, FAST_SAMPLES_shift) #define FAST_SAMPLES_INT(x) ((x) >> (FAST_SAMPLES_shift)) #define FAST_SAMPLES_FRAC(x) ((x) & (FAST_SAMPLES_mask)) #define _GRID_TO_INT_FRAC_shift(t, i, f, b) do { \ (f) = FAST_SAMPLES_FRAC(t); \ (i) = FAST_SAMPLES_INT(t); \ } while (0) #define FAST_SAMPLES_XY (FAST_SAMPLES_X*FAST_SAMPLES_Y) /* Unit area on the grid. */ #define AREA_TO_ALPHA(c) ((c) / (float)FAST_SAMPLES_XY) struct quorem { int32_t quo; int64_t rem; }; struct edge { struct edge *next, *prev; int dir; int cell; int height_left; struct quorem x; /* Advance of the current x when moving down a subsample line. */ struct quorem dxdy; int64_t dy; /* The clipped y of the top of the edge. */ int ytop; /* y2-y1 after orienting the edge downwards. */ }; /* Number of subsample rows per y-bucket. Must be SAMPLES_Y. */ #define EDGE_Y_BUCKET_HEIGHT FAST_SAMPLES_Y #define EDGE_Y_BUCKET_INDEX(y, ymin) (((y) - (ymin))/EDGE_Y_BUCKET_HEIGHT) /* A collection of sorted and vertically clipped edges of the polygon. * Edges are moved from the polygon to an active list while scan * converting. */ struct polygon { /* The vertical clip extents. */ int ymin, ymax; /* Array of edges all starting in the same bucket. An edge is put * into bucket EDGE_BUCKET_INDEX(edge->ytop, polygon->ymin) when * it is added to the polygon. */ struct edge **y_buckets; struct edge *y_buckets_embedded[64]; struct edge edges_embedded[32]; struct edge *edges; int num_edges; }; /* A cell records the effect on pixel coverage of polygon edges * passing through a pixel. It contains two accumulators of pixel * coverage. * * Consider the effects of a polygon edge on the coverage of a pixel * it intersects and that of the following one. The coverage of the * following pixel is the height of the edge multiplied by the width * of the pixel, and the coverage of the pixel itself is the area of * the trapezoid formed by the edge and the right side of the pixel. * * +-----------------------+-----------------------+ * | | | * | | | * |_______________________|_______________________| * | \...................|.......................|\ * | \..................|.......................| | * | \.................|.......................| | * | \....covered.....|.......................| | * | \....area.......|.......................| } covered height * | \..............|.......................| | * |uncovered\.............|.......................| | * | area \............|.......................| | * |___________\...........|.......................|/ * | | | * | | | * | | | * +-----------------------+-----------------------+ * * Since the coverage of the following pixel will always be a multiple * of the width of the pixel, we can store the height of the covered * area instead. The coverage of the pixel itself is the total * coverage minus the area of the uncovered area to the left of the * edge. As it's faster to compute the uncovered area we only store * that and subtract it from the total coverage later when forming * spans to blit. * * The heights and areas are signed, with left edges of the polygon * having positive sign and right edges having negative sign. When * two edges intersect they swap their left/rightness so their * contribution above and below the intersection point must be * computed separately. */ struct cell { struct cell *next; int x; int16_t uncovered_area; int16_t covered_height; }; /* A cell list represents the scan line sparsely as cells ordered by * ascending x. It is geared towards scanning the cells in order * using an internal cursor. */ struct cell_list { struct cell *cursor; /* Points to the left-most cell in the scan line. */ struct cell head, tail; int16_t x1, x2; int16_t count, size; struct cell *cells; struct cell embedded[256]; }; /* The active list contains edges in the current scan line ordered by * the x-coordinate of the intercept of the edge and the scan line. */ struct active_list { /* Leftmost edge on the current scan line. */ struct edge head, tail; }; struct tor { struct polygon polygon[1]; struct active_list active[1]; struct cell_list coverages[1]; BoxRec extents; }; /* Compute the floored division a/b. Assumes / and % perform symmetric * division. */ /* Rewinds the cell list's cursor to the beginning. After rewinding * we're good to cell_list_find() the cell any x coordinate. */ inline static void cell_list_rewind(struct cell_list *cells) { cells->cursor = &cells->head; } static bool cell_list_init(struct cell_list *cells, int x1, int x2) { cells->tail.next = NULL; cells->tail.x = INT_MAX; cells->head.x = INT_MIN; cells->head.next = &cells->tail; cells->head.covered_height = 0; cell_list_rewind(cells); cells->count = 0; cells->x1 = x1; cells->x2 = x2; cells->size = x2 - x1 + 1; cells->cells = cells->embedded; if (cells->size > ARRAY_SIZE(cells->embedded)) cells->cells = malloc(cells->size * sizeof(struct cell)); return cells->cells != NULL; } static void cell_list_fini(struct cell_list *cells) { if (cells->cells != cells->embedded) free(cells->cells); } inline static void cell_list_reset(struct cell_list *cells) { cell_list_rewind(cells); cells->head.next = &cells->tail; cells->head.covered_height = 0; cells->count = 0; } inline static struct cell * cell_list_alloc(struct cell_list *cells, struct cell *tail, int x) { struct cell *cell; assert(cells->count < cells->size); cell = cells->cells + cells->count++; cell->next = tail->next; tail->next = cell; cell->x = x; cell->covered_height = 0; cell->uncovered_area = 0; return cell; } /* Find a cell at the given x-coordinate. Returns %NULL if a new cell * needed to be allocated but couldn't be. Cells must be found with * non-decreasing x-coordinate until the cell list is rewound using * cell_list_rewind(). Ownership of the returned cell is retained by * the cell list. */ inline static struct cell * cell_list_find(struct cell_list *cells, int x) { struct cell *tail; if (x >= cells->x2) return &cells->tail; if (x < cells->x1) return &cells->head; tail = cells->cursor; if (tail->x == x) return tail; do { if (tail->next->x > x) break; tail = tail->next; if (tail->next->x > x) break; tail = tail->next; if (tail->next->x > x) break; tail = tail->next; } while (1); if (tail->x != x) tail = cell_list_alloc(cells, tail, x); return cells->cursor = tail; } /* Add a subpixel span covering [x1, x2) to the coverage cells. */ inline static void cell_list_add_subspan(struct cell_list *cells, int x1, int x2) { struct cell *cell; int ix1, fx1; int ix2, fx2; if (x1 == x2) return; FAST_SAMPLES_X_TO_INT_FRAC(x1, ix1, fx1); FAST_SAMPLES_X_TO_INT_FRAC(x2, ix2, fx2); __DBG(("%s: x1=%d (%d+%d), x2=%d (%d+%d)\n", __FUNCTION__, x1, ix1, fx1, x2, ix2, fx2)); cell = cell_list_find(cells, ix1); if (ix1 != ix2) { cell->uncovered_area += fx1; ++cell->covered_height; cell = cell_list_find(cells, ix2); cell->uncovered_area -= fx2; --cell->covered_height; } else cell->uncovered_area += (fx1-fx2); } inline static void cell_list_add_span(struct cell_list *cells, int x1, int x2) { struct cell *cell; int ix1, fx1; int ix2, fx2; FAST_SAMPLES_X_TO_INT_FRAC(x1, ix1, fx1); FAST_SAMPLES_X_TO_INT_FRAC(x2, ix2, fx2); __DBG(("%s: x1=%d (%d+%d), x2=%d (%d+%d)\n", __FUNCTION__, x1, ix1, fx1, x2, ix2, fx2)); cell = cell_list_find(cells, ix1); if (ix1 != ix2) { cell->uncovered_area += fx1*FAST_SAMPLES_Y; cell->covered_height += FAST_SAMPLES_Y; cell = cell_list_find(cells, ix2); cell->uncovered_area -= fx2*FAST_SAMPLES_Y; cell->covered_height -= FAST_SAMPLES_Y; } else cell->uncovered_area += (fx1-fx2)*FAST_SAMPLES_Y; } static void polygon_fini(struct polygon *polygon) { if (polygon->y_buckets != polygon->y_buckets_embedded) free(polygon->y_buckets); if (polygon->edges != polygon->edges_embedded) free(polygon->edges); } static bool polygon_init(struct polygon *polygon, int num_edges, int ymin, int ymax) { unsigned num_buckets = EDGE_Y_BUCKET_INDEX(ymax-1, ymin) + 1; if (unlikely(ymax - ymin > 0x7FFFFFFFU - EDGE_Y_BUCKET_HEIGHT)) return false; polygon->edges = polygon->edges_embedded; polygon->y_buckets = polygon->y_buckets_embedded; polygon->num_edges = 0; if (num_edges > (int)ARRAY_SIZE(polygon->edges_embedded)) { polygon->edges = malloc(sizeof(struct edge)*num_edges); if (unlikely(NULL == polygon->edges)) goto bail_no_mem; } if (num_buckets >= ARRAY_SIZE(polygon->y_buckets_embedded)) { polygon->y_buckets = malloc((1+num_buckets)*sizeof(struct edge *)); if (unlikely(NULL == polygon->y_buckets)) goto bail_no_mem; } memset(polygon->y_buckets, 0, num_buckets * sizeof(struct edge *)); polygon->y_buckets[num_buckets] = (void *)-1; polygon->ymin = ymin; polygon->ymax = ymax; return true; bail_no_mem: polygon_fini(polygon); return false; } static void _polygon_insert_edge_into_its_y_bucket(struct polygon *polygon, struct edge *e) { unsigned ix = EDGE_Y_BUCKET_INDEX(e->ytop, polygon->ymin); struct edge **ptail = &polygon->y_buckets[ix]; assert(e->ytop < polygon->ymax); e->next = *ptail; *ptail = e; } inline static void polygon_add_edge(struct polygon *polygon, const xTrapezoid *t, const xLineFixed *edge, int dir, int dx, int dy) { struct edge *e = &polygon->edges[polygon->num_edges]; int ytop, ybot; assert(t->bottom > t->top); assert(edge->p2.y > edge->p1.y); e->dir = dir; ytop = pixman_fixed_to_fast(t->top) + dy; if (ytop < polygon->ymin) ytop = polygon->ymin; ybot = pixman_fixed_to_fast(t->bottom) + dy; if (ybot > polygon->ymax) ybot = polygon->ymax; e->ytop = ytop; e->height_left = ybot - ytop; if (e->height_left <= 0) return; if (pixman_fixed_to_fast(edge->p1.x) == pixman_fixed_to_fast(edge->p2.x)) { e->cell = e->x.quo = pixman_fixed_to_fast(edge->p1.x) + dx; e->x.rem = 0; e->dxdy.quo = 0; e->dxdy.rem = 0; e->dy = 0; } else { int64_t Ex, Ey, tmp; Ex = ((int64_t)edge->p2.x - edge->p1.x) * FAST_SAMPLES_X; Ey = ((int64_t)edge->p2.y - edge->p1.y) * FAST_SAMPLES_Y * (2 << 16); assert(Ey > 0); e->dxdy.quo = Ex * (2 << 16) / Ey; e->dxdy.rem = Ex * (2 << 16) % Ey; tmp = (int64_t)(2 * (ytop - dy) + 1) << 16; tmp -= (int64_t)edge->p1.y * FAST_SAMPLES_Y * 2; tmp *= Ex; e->x.quo = tmp / Ey; e->x.rem = tmp % Ey; tmp = (int64_t)edge->p1.x * FAST_SAMPLES_X; e->x.quo += tmp / (1 << 16) + dx; tmp &= (1 << 16) - 1; if (tmp) { if (Ey < INT64_MAX >> 16) tmp = (tmp * Ey) / (1 << 16); else /* Handle overflow by losing precision */ tmp = tmp * (Ey / (1 << 16)); e->x.rem += tmp; } if (e->x.rem < 0) { --e->x.quo; e->x.rem += Ey; } else if (e->x.rem >= Ey) { ++e->x.quo; e->x.rem -= Ey; } assert(e->x.rem >= 0 && e->x.rem < Ey); e->cell = e->x.quo + (e->x.rem >= Ey/2); e->dy = Ey; } _polygon_insert_edge_into_its_y_bucket(polygon, e); polygon->num_edges++; } inline static void polygon_add_line(struct polygon *polygon, const xPointFixed *p1, const xPointFixed *p2, int dx, int dy) { struct edge *e = &polygon->edges[polygon->num_edges]; int top, bot; if (p1->y == p2->y) return; __DBG(("%s: line=(%d, %d), (%d, %d)\n", __FUNCTION__, (int)p1->x, (int)p1->y, (int)p2->x, (int)p2->y)); e->dir = 1; if (p2->y < p1->y) { const xPointFixed *t; e->dir = -1; t = p1; p1 = p2; p2 = t; } top = pixman_fixed_to_fast(p1->y) + dy; if (top < polygon->ymin) top = polygon->ymin; bot = pixman_fixed_to_fast(p2->y) + dy; if (bot > polygon->ymax) bot = polygon->ymax; if (bot <= top) return; e->ytop = top; e->height_left = bot - top; if (e->height_left <= 0) return; __DBG(("%s: edge height=%d\n", __FUNCTION__, e->dir * e->height_left)); if (pixman_fixed_to_fast(p1->x) == pixman_fixed_to_fast(p2->x)) { e->cell = e->x.quo = pixman_fixed_to_fast(p1->x) + dx; e->x.rem = 0; e->dxdy.quo = 0; e->dxdy.rem = 0; e->dy = 0; } else { int64_t Ex, Ey, tmp; Ex = ((int64_t)p2->x - p1->x) * FAST_SAMPLES_X; Ey = ((int64_t)p2->y - p1->y) * FAST_SAMPLES_Y * (2 << 16); e->dxdy.quo = Ex * (2 << 16) / Ey; e->dxdy.rem = Ex * (2 << 16) % Ey; tmp = (int64_t)(2 * (top - dy) + 1) << 16; tmp -= (int64_t)p1->y * FAST_SAMPLES_Y * 2; tmp *= Ex; e->x.quo = tmp / Ey; e->x.rem = tmp % Ey; tmp = (int64_t)p1->x * FAST_SAMPLES_X; e->x.quo += tmp / (1 << 16) + dx; e->x.rem += ((tmp & ((1 << 16) - 1)) * Ey) / (1 << 16); if (e->x.rem < 0) { --e->x.quo; e->x.rem += Ey; } else if (e->x.rem >= Ey) { ++e->x.quo; e->x.rem -= Ey; } e->cell = e->x.quo + (e->x.rem >= Ey/2); e->dy = Ey; } if (polygon->num_edges > 0) { struct edge *prev = &polygon->edges[polygon->num_edges-1]; /* detect degenerate triangles inserted into tristrips */ if (e->dir == -prev->dir && e->ytop == prev->ytop && e->height_left == prev->height_left && e->x.quo == prev->x.quo && e->x.rem == prev->x.rem && e->dxdy.quo == prev->dxdy.quo && e->dxdy.rem == prev->dxdy.rem) { unsigned ix = EDGE_Y_BUCKET_INDEX(e->ytop, polygon->ymin); polygon->y_buckets[ix] = prev->next; polygon->num_edges--; return; } } _polygon_insert_edge_into_its_y_bucket(polygon, e); polygon->num_edges++; } static void active_list_reset(struct active_list *active) { active->head.height_left = INT_MAX; active->head.cell = INT_MIN; active->head.dy = 0; active->head.prev = NULL; active->head.next = &active->tail; active->tail.prev = &active->head; active->tail.next = NULL; active->tail.cell = INT_MAX; active->tail.height_left = INT_MAX; active->tail.dy = 0; } static struct edge * merge_sorted_edges(struct edge *head_a, struct edge *head_b) { struct edge *head, **next, *prev; int32_t x; if (head_b == NULL) return head_a; prev = head_a->prev; next = &head; if (head_a->cell <= head_b->cell) { head = head_a; } else { head = head_b; head_b->prev = prev; goto start_with_b; } do { x = head_b->cell; while (head_a != NULL && head_a->cell <= x) { prev = head_a; next = &head_a->next; head_a = head_a->next; } head_b->prev = prev; *next = head_b; if (head_a == NULL) return head; start_with_b: x = head_a->cell; while (head_b != NULL && head_b->cell <= x) { prev = head_b; next = &head_b->next; head_b = head_b->next; } head_a->prev = prev; *next = head_a; if (head_b == NULL) return head; } while (1); } static struct edge * sort_edges(struct edge *list, unsigned int level, struct edge **head_out) { struct edge *head_other, *remaining; unsigned int i; head_other = list->next; if (head_other == NULL) { *head_out = list; return NULL; } remaining = head_other->next; if (list->cell <= head_other->cell) { *head_out = list; head_other->next = NULL; } else { *head_out = head_other; head_other->prev = list->prev; head_other->next = list; list->prev = head_other; list->next = NULL; } for (i = 0; i < level && remaining; i++) { remaining = sort_edges(remaining, i, &head_other); *head_out = merge_sorted_edges(*head_out, head_other); } return remaining; } static struct edge *filter(struct edge *edges) { struct edge *e; e = edges; while (e->next) { struct edge *n = e->next; if (e->dir == -n->dir && e->height_left == n->height_left && &e->x.quo == &n->x.quo && &e->x.rem == &n->x.rem && &e->dxdy.quo == &n->dxdy.quo && &e->dxdy.rem == &n->dxdy.rem) { if (e->prev) e->prev->next = n->next; else edges = n->next; if (n->next) n->next->prev = e->prev; else break; e = n->next; } else e = n; } return edges; } static struct edge * merge_unsorted_edges(struct edge *head, struct edge *unsorted) { sort_edges(unsorted, UINT_MAX, &unsorted); return merge_sorted_edges(head, filter(unsorted)); } /* Test if the edges on the active list can be safely advanced by a * full row without intersections or any edges ending. */ inline static int can_full_step(struct active_list *active) { const struct edge *e; int min_height = INT_MAX; assert(active->head.next != &active->tail); for (e = active->head.next; &active->tail != e; e = e->next) { assert(e->height_left > 0); if (e->dy != 0) return 0; if (e->height_left < min_height) { min_height = e->height_left; if (min_height < FAST_SAMPLES_Y) return 0; } } return min_height; } inline static void merge_edges(struct active_list *active, struct edge *edges) { active->head.next = merge_unsorted_edges(active->head.next, edges); } inline static int fill_buckets(struct active_list *active, struct edge *edge, struct edge **buckets) { int ymax = 0; while (edge) { int y = edge->ytop & (FAST_SAMPLES_Y-1); struct edge *next = edge->next; struct edge **b = &buckets[y]; __DBG(("%s: ytop %d -> bucket %d\n", __FUNCTION__, edge->ytop, y)); if (*b) (*b)->prev = edge; edge->next = *b; edge->prev = NULL; *b = edge; edge = next; if (y > ymax) ymax = y; } return ymax; } inline static void nonzero_subrow(struct active_list *active, struct cell_list *coverages) { struct edge *edge = active->head.next; int prev_x = INT_MIN; int winding = 0, xstart = edge->cell; cell_list_rewind(coverages); while (&active->tail != edge) { struct edge *next = edge->next; winding += edge->dir; if (0 == winding && edge->next->cell != edge->cell) { cell_list_add_subspan(coverages, xstart, edge->cell); xstart = edge->next->cell; } assert(edge->height_left > 0); if (--edge->height_left) { if (edge->dy) { edge->x.quo += edge->dxdy.quo; edge->x.rem += edge->dxdy.rem; if (edge->x.rem < 0) { --edge->x.quo; edge->x.rem += edge->dy; } else if (edge->x.rem >= edge->dy) { ++edge->x.quo; edge->x.rem -= edge->dy; } edge->cell = edge->x.quo + (edge->x.rem >= edge->dy/2); } if (edge->cell < prev_x) { struct edge *pos = edge->prev; pos->next = next; next->prev = pos; do pos = pos->prev; while (edge->cell < pos->cell); pos->next->prev = edge; edge->next = pos->next; edge->prev = pos; pos->next = edge; } else prev_x = edge->cell; } else { edge->prev->next = next; next->prev = edge->prev; } edge = next; } } static void nonzero_row(struct active_list *active, struct cell_list *coverages) { struct edge *left = active->head.next; while (&active->tail != left) { struct edge *right; int winding = left->dir; left->height_left -= FAST_SAMPLES_Y; assert(left->height_left >= 0); if (!left->height_left) { left->prev->next = left->next; left->next->prev = left->prev; } right = left->next; do { right->height_left -= FAST_SAMPLES_Y; assert(right->height_left >= 0); if (!right->height_left) { right->prev->next = right->next; right->next->prev = right->prev; } winding += right->dir; if (0 == winding) break; right = right->next; } while (1); cell_list_add_span(coverages, left->cell, right->cell); left = right->next; } } static void tor_fini(struct tor *converter) { polygon_fini(converter->polygon); cell_list_fini(converter->coverages); } static bool tor_init(struct tor *converter, const BoxRec *box, int num_edges) { __DBG(("%s: (%d, %d),(%d, %d) x (%d, %d), num_edges=%d\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, FAST_SAMPLES_X, FAST_SAMPLES_Y, num_edges)); converter->extents = *box; if (!cell_list_init(converter->coverages, box->x1, box->x2)) return false; active_list_reset(converter->active); if (!polygon_init(converter->polygon, num_edges, (int)box->y1 * FAST_SAMPLES_Y, (int)box->y2 * FAST_SAMPLES_Y)) { cell_list_fini(converter->coverages); return false; } return true; } static void tor_add_trapezoid(struct tor *tor, const xTrapezoid *t, int dx, int dy) { polygon_add_edge(tor->polygon, t, &t->left, 1, dx, dy); polygon_add_edge(tor->polygon, t, &t->right, -1, dx, dy); } static void step_edges(struct active_list *active, int count) { struct edge *edge; count *= FAST_SAMPLES_Y; for (edge = active->head.next; edge != &active->tail; edge = edge->next) { edge->height_left -= count; assert(edge->height_left >= 0); if (!edge->height_left) { edge->prev->next = edge->next; edge->next->prev = edge->prev; } } } static void tor_blt_span(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { __DBG(("%s: %d -> %d @ %d\n", __FUNCTION__, box->x1, box->x2, coverage)); op->box(sna, op, box, AREA_TO_ALPHA(coverage)); apply_damage_box(&op->base, box); } static void tor_blt_span__no_damage(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { __DBG(("%s: %d -> %d @ %d\n", __FUNCTION__, box->x1, box->x2, coverage)); op->box(sna, op, box, AREA_TO_ALPHA(coverage)); } static void tor_blt_span_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; float opacity; opacity = AREA_TO_ALPHA(coverage); __DBG(("%s: %d -> %d @ %f\n", __FUNCTION__, box->x1, box->x2, opacity)); pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); if (region_num_rects(®ion)) { op->boxes(sna, op, region_rects(®ion), region_num_rects(®ion), opacity); apply_damage(&op->base, ®ion); } pixman_region_fini(®ion); } static void tor_blt_span_mono(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { if (coverage < FAST_SAMPLES_XY/2) return; tor_blt_span(sna, op, clip, box, FAST_SAMPLES_XY); } static void tor_blt_span_mono_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { if (coverage < FAST_SAMPLES_XY/2) return; tor_blt_span_clipped(sna, op, clip, box, FAST_SAMPLES_XY); } static void tor_blt_span_mono_unbounded(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { tor_blt_span(sna, op, clip, box, coverage < FAST_SAMPLES_XY/2 ? 0 : FAST_SAMPLES_XY); } static void tor_blt_span_mono_unbounded_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { tor_blt_span_clipped(sna, op, clip, box, coverage < FAST_SAMPLES_XY/2 ? 0 : FAST_SAMPLES_XY); } static void tor_blt(struct sna *sna, struct tor *converter, struct sna_composite_spans_op *op, pixman_region16_t *clip, void (*span)(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage), int y, int height, int unbounded) { struct cell_list *cells = converter->coverages; struct cell *cell; BoxRec box; int cover; box.y1 = y + converter->extents.y1; box.y2 = box.y1 + height; assert(box.y2 <= converter->extents.y2); box.x1 = converter->extents.x1; /* Form the spans from the coverages and areas. */ cover = cells->head.covered_height*FAST_SAMPLES_X; assert(cover >= 0); for (cell = cells->head.next; cell != &cells->tail; cell = cell->next) { int x = cell->x; assert(x >= converter->extents.x1); assert(x < converter->extents.x2); __DBG(("%s: cell=(%d, %d, %d), cover=%d\n", __FUNCTION__, cell->x, cell->covered_height, cell->uncovered_area, cover)); if (cell->covered_height || cell->uncovered_area) { box.x2 = x; if (box.x2 > box.x1 && (unbounded || cover)) { __DBG(("%s: span (%d, %d)x(%d, %d) @ %d\n", __FUNCTION__, box.x1, box.y1, box.x2 - box.x1, box.y2 - box.y1, cover)); span(sna, op, clip, &box, cover); } box.x1 = box.x2; cover += cell->covered_height*FAST_SAMPLES_X; } if (cell->uncovered_area) { int area = cover - cell->uncovered_area; box.x2 = x + 1; if (unbounded || area) { __DBG(("%s: span (%d, %d)x(%d, %d) @ %d\n", __FUNCTION__, box.x1, box.y1, box.x2 - box.x1, box.y2 - box.y1, area)); span(sna, op, clip, &box, area); } box.x1 = box.x2; } } box.x2 = converter->extents.x2; if (box.x2 > box.x1 && (unbounded || cover)) { __DBG(("%s: span (%d, %d)x(%d, %d) @ %d\n", __FUNCTION__, box.x1, box.y1, box.x2 - box.x1, box.y2 - box.y1, cover)); span(sna, op, clip, &box, cover); } } flatten static void tor_render(struct sna *sna, struct tor *converter, struct sna_composite_spans_op *op, pixman_region16_t *clip, void (*span)(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage), int unbounded) { struct polygon *polygon = converter->polygon; struct cell_list *coverages = converter->coverages; struct active_list *active = converter->active; struct edge *buckets[FAST_SAMPLES_Y] = { 0 }; int16_t i, j, h = converter->extents.y2 - converter->extents.y1; __DBG(("%s: unbounded=%d\n", __FUNCTION__, unbounded)); /* Render each pixel row. */ for (i = 0; i < h; i = j) { int do_full_step = 0; j = i + 1; /* Determine if we can ignore this row or use the full pixel * stepper. */ if (fill_buckets(active, polygon->y_buckets[i], buckets) == 0) { if (buckets[0]) { merge_edges(active, buckets[0]); buckets[0] = NULL; } if (active->head.next == &active->tail) { for (; polygon->y_buckets[j] == NULL; j++) ; __DBG(("%s: no new edges and no exisiting edges, skipping, %d -> %d\n", __FUNCTION__, i, j)); assert(j <= h); if (unbounded) { BoxRec box; box = converter->extents; box.y1 += i; box.y2 = converter->extents.y1 + j; span(sna, op, clip, &box, 0); } continue; } do_full_step = can_full_step(active); } __DBG(("%s: y=%d-%d, do_full_step=%d, new edges=%d\n", __FUNCTION__, i, j, do_full_step, polygon->y_buckets[i] != NULL)); if (do_full_step) { nonzero_row(active, coverages); while (polygon->y_buckets[j] == NULL && do_full_step >= 2*FAST_SAMPLES_Y) { do_full_step -= FAST_SAMPLES_Y; j++; } assert(j >= i + 1 && j <= h); if (j != i + 1) step_edges(active, j - (i + 1)); __DBG(("%s: vertical edges, full step (%d, %d)\n", __FUNCTION__, i, j)); } else { int suby; /* Subsample this row. */ for (suby = 0; suby < FAST_SAMPLES_Y; suby++) { if (buckets[suby]) { merge_edges(active, buckets[suby]); buckets[suby] = NULL; } nonzero_subrow(active, coverages); } } assert(j > i); tor_blt(sna, converter, op, clip, span, i, j-i, unbounded); cell_list_reset(coverages); } } static void inplace_row(struct active_list *active, uint8_t *row, int width) { struct edge *left = active->head.next; while (&active->tail != left) { struct edge *right; int winding = left->dir; int lfx, rfx; int lix, rix; left->height_left -= FAST_SAMPLES_Y; assert(left->height_left >= 0); if (!left->height_left) { left->prev->next = left->next; left->next->prev = left->prev; } right = left->next; do { right->height_left -= FAST_SAMPLES_Y; assert(right->height_left >= 0); if (!right->height_left) { right->prev->next = right->next; right->next->prev = right->prev; } winding += right->dir; if (0 == winding && right->cell != right->next->cell) break; right = right->next; } while (1); if (left->cell < 0) { lix = lfx = 0; } else if (left->cell >= width * FAST_SAMPLES_X) { lix = width; lfx = 0; } else FAST_SAMPLES_X_TO_INT_FRAC(left->cell, lix, lfx); if (right->cell < 0) { rix = rfx = 0; } else if (right->cell >= width * FAST_SAMPLES_X) { rix = width; rfx = 0; } else FAST_SAMPLES_X_TO_INT_FRAC(right->cell, rix, rfx); if (lix == rix) { if (rfx != lfx) { assert(lix < width); row[lix] += (rfx-lfx) * 256 / FAST_SAMPLES_X; } } else { assert(lix < width); if (lfx == 0) row[lix] = 0xff; else row[lix] += 256 - lfx * 256 / FAST_SAMPLES_X; assert(rix <= width); if (rfx) { assert(rix < width); row[rix] += rfx * 256 / FAST_SAMPLES_X; } if (rix > ++lix) { uint8_t *r = row + lix; rix -= lix; #if 0 if (rix == 1) *row = 0xff; else memset(row, 0xff, rix); #else if ((uintptr_t)r & 1 && rix) { *r++ = 0xff; rix--; } if ((uintptr_t)r & 2 && rix >= 2) { *(uint16_t *)r = 0xffff; r += 2; rix -= 2; } if ((uintptr_t)r & 4 && rix >= 4) { *(uint32_t *)r = 0xffffffff; r += 4; rix -= 4; } while (rix >= 8) { *(uint64_t *)r = 0xffffffffffffffff; r += 8; rix -= 8; } if (rix & 4) { *(uint32_t *)r = 0xffffffff; r += 4; } if (rix & 2) { *(uint16_t *)r = 0xffff; r += 2; } if (rix & 1) *r = 0xff; #endif } } left = right->next; } } inline static void inplace_subrow(struct active_list *active, int8_t *row, int width, int *min, int *max) { struct edge *edge = active->head.next; int prev_x = INT_MIN; int winding = 0, xstart = INT_MIN; while (&active->tail != edge) { struct edge *next = edge->next; winding += edge->dir; if (0 == winding) { if (edge->next->cell != edge->cell) { if (edge->cell <= xstart) { xstart = INT_MIN; } else { int fx; int ix; if (xstart < FAST_SAMPLES_X * width) { FAST_SAMPLES_X_TO_INT_FRAC(xstart, ix, fx); if (ix < *min) *min = ix; row[ix++] += FAST_SAMPLES_X - fx; if (fx && ix < width) row[ix] += fx; } xstart = edge->cell; if (xstart < FAST_SAMPLES_X * width) { FAST_SAMPLES_X_TO_INT_FRAC(xstart, ix, fx); row[ix] -= FAST_SAMPLES_X - fx; if (fx && ix + 1 < width) row[++ix] -= fx; if (ix >= *max) *max = ix + 1; xstart = INT_MIN; } else *max = width; } } } else if (xstart < 0) { xstart = MAX(edge->cell, 0); } assert(edge->height_left > 0); if (--edge->height_left) { if (edge->dy) { edge->x.quo += edge->dxdy.quo; edge->x.rem += edge->dxdy.rem; if (edge->x.rem < 0) { --edge->x.quo; edge->x.rem += edge->dy; } else if (edge->x.rem >= 0) { ++edge->x.quo; edge->x.rem -= edge->dy; } edge->cell = edge->x.quo + (edge->x.rem >= edge->dy/2); } if (edge->cell < prev_x) { struct edge *pos = edge->prev; pos->next = next; next->prev = pos; do pos = pos->prev; while (edge->cell < pos->cell); pos->next->prev = edge; edge->next = pos->next; edge->prev = pos; pos->next = edge; } else prev_x = edge->cell; } else { edge->prev->next = next; next->prev = edge->prev; } edge = next; } } inline static void inplace_end_subrows(struct active_list *active, uint8_t *row, int8_t *buf, int width) { int cover = 0; while (width >= 4) { uint32_t dw; int v; dw = *(uint32_t *)buf; buf += 4; if (dw == 0) { v = cover * 256 / FAST_SAMPLES_XY; v -= v >> 8; v |= v << 8; dw = v | v << 16; } else { cover += (int8_t)(dw & 0xff); if (cover) { assert(cover > 0); v = cover * 256 / FAST_SAMPLES_XY; v -= v >> 8; dw >>= 8; dw |= v << 24; } else dw >>= 8; cover += (int8_t)(dw & 0xff); if (cover) { assert(cover > 0); v = cover * 256 / FAST_SAMPLES_XY; v -= v >> 8; dw >>= 8; dw |= v << 24; } else dw >>= 8; cover += (int8_t)(dw & 0xff); if (cover) { assert(cover > 0); v = cover * 256 / FAST_SAMPLES_XY; v -= v >> 8; dw >>= 8; dw |= v << 24; } else dw >>= 8; cover += (int8_t)(dw & 0xff); if (cover) { assert(cover > 0); v = cover * 256 / FAST_SAMPLES_XY; v -= v >> 8; dw >>= 8; dw |= v << 24; } else dw >>= 8; } *(uint32_t *)row = dw; row += 4; width -= 4; } while (width--) { int v; cover += *buf++; assert(cover >= 0); v = cover * 256 / FAST_SAMPLES_XY; v -= v >> 8; *row++ = v; } } static void convert_mono(uint8_t *ptr, int w) { while (w--) { *ptr = 0xff * (*ptr >= 0xf0); ptr++; } } static void tor_inplace(struct tor *converter, PixmapPtr scratch, int mono, uint8_t *buf) { int i, j, h = converter->extents.y2; struct polygon *polygon = converter->polygon; struct active_list *active = converter->active; struct edge *buckets[FAST_SAMPLES_Y] = { 0 }; uint8_t *row = scratch->devPrivate.ptr; int stride = scratch->devKind; int width = scratch->drawable.width; __DBG(("%s: mono=%d, buf?=%d\n", __FUNCTION__, mono, buf != NULL)); assert(converter->extents.y1 == 0); assert(converter->extents.x1 == 0); assert(scratch->drawable.depth == 8); /* Render each pixel row. */ for (i = 0; i < h; i = j) { int do_full_step = 0; void *ptr = buf ?: row; j = i + 1; /* Determine if we can ignore this row or use the full pixel * stepper. */ if (fill_buckets(active, polygon->y_buckets[i], buckets) == 0) { if (buckets[0]) { merge_edges(active, buckets[0]); buckets[0] = NULL; } if (active->head.next == &active->tail) { for (; !polygon->y_buckets[j]; j++) ; __DBG(("%s: no new edges and no exisiting edges, skipping, %d -> %d\n", __FUNCTION__, i, j)); memset(row, 0, stride*(j-i)); row += stride*(j-i); continue; } do_full_step = can_full_step(active); } __DBG(("%s: y=%d, do_full_step=%d, new edges=%d, min_height=%d, vertical=%d\n", __FUNCTION__, i, do_full_step, polygon->y_buckets[i] != NULL)); if (do_full_step) { memset(ptr, 0, width); inplace_row(active, ptr, width); if (mono) convert_mono(ptr, width); if (row != ptr) memcpy(row, ptr, width); while (polygon->y_buckets[j] == NULL && do_full_step >= 2*FAST_SAMPLES_Y) { do_full_step -= FAST_SAMPLES_Y; row += stride; memcpy(row, ptr, width); j++; } if (j != i + 1) step_edges(active, j - (i + 1)); __DBG(("%s: vertical edges, full step (%d, %d)\n", __FUNCTION__, i, j)); } else { int min = width, max = 0, suby; /* Subsample this row. */ memset(ptr, 0, width); for (suby = 0; suby < FAST_SAMPLES_Y; suby++) { if (buckets[suby]) { merge_edges(active, buckets[suby]); buckets[suby] = NULL; } inplace_subrow(active, ptr, width, &min, &max); } assert(min >= 0 && max <= width); memset(row, 0, min); if (max > min) { inplace_end_subrows(active, row+min, (int8_t*)ptr+min, max-min); if (mono) convert_mono(row+min, max-min); } if (max < width) memset(row+max, 0, width-max); } row += stride; } } static int operator_is_bounded(uint8_t op) { switch (op) { case PictOpOver: case PictOpOutReverse: case PictOpAdd: return true; default: return false; } } static span_func_t choose_span(struct sna_composite_spans_op *tmp, PicturePtr dst, PictFormatPtr maskFormat, RegionPtr clip) { span_func_t span; if (is_mono(dst, maskFormat)) { /* XXX An imprecise approximation */ if (maskFormat && !operator_is_bounded(tmp->base.op)) { span = tor_blt_span_mono_unbounded; if (clip->data) span = tor_blt_span_mono_unbounded_clipped; } else { span = tor_blt_span_mono; if (clip->data) span = tor_blt_span_mono_clipped; } } else { if (clip->data) span = tor_blt_span_clipped; else if (tmp->base.damage == NULL) span = tor_blt_span__no_damage; else span = tor_blt_span; } return span; } struct span_thread { struct sna *sna; const struct sna_composite_spans_op *op; const xTrapezoid *traps; RegionPtr clip; span_func_t span; BoxRec extents; int dx, dy, draw_y; int ntrap; bool unbounded; }; #define SPAN_THREAD_MAX_BOXES (8192/sizeof(struct sna_opacity_box)) struct span_thread_boxes { const struct sna_composite_spans_op *op; int num_boxes; struct sna_opacity_box boxes[SPAN_THREAD_MAX_BOXES]; }; static void span_thread_add_boxes(struct sna *sna, void *data, const BoxRec *box, int count, float alpha) { struct span_thread_boxes *b = data; __DBG(("%s: adding %d boxes with alpha=%f\n", __FUNCTION__, count, alpha)); assert(count > 0 && count <= SPAN_THREAD_MAX_BOXES); if (unlikely(b->num_boxes + count > SPAN_THREAD_MAX_BOXES)) { DBG(("%s: flushing %d boxes, adding %d\n", __FUNCTION__, b->num_boxes, count)); assert(b->num_boxes <= SPAN_THREAD_MAX_BOXES); b->op->thread_boxes(sna, b->op, b->boxes, b->num_boxes); b->num_boxes = 0; } do { b->boxes[b->num_boxes].box = *box++; b->boxes[b->num_boxes].alpha = alpha; b->num_boxes++; } while (--count); assert(b->num_boxes <= SPAN_THREAD_MAX_BOXES); } static void span_thread_box(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { __DBG(("%s: %d -> %d @ %d\n", __FUNCTION__, box->x1, box->x2, coverage)); span_thread_add_boxes(sna, op, box, 1, AREA_TO_ALPHA(coverage)); } static void span_thread_clipped_box(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; __DBG(("%s: %d -> %d @ %f\n", __FUNCTION__, box->x1, box->x2, AREA_TO_ALPHA(coverage))); pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); if (region_num_rects(®ion)) { span_thread_add_boxes(sna, op, region_rects(®ion), region_num_rects(®ion), AREA_TO_ALPHA(coverage)); } pixman_region_fini(®ion); } static span_func_t thread_choose_span(struct sna_composite_spans_op *tmp, PicturePtr dst, PictFormatPtr maskFormat, RegionPtr clip) { span_func_t span; if (tmp->base.damage) { DBG(("%s: damaged -> no thread support\n", __FUNCTION__)); return NULL; } if (is_mono(dst, maskFormat)) { DBG(("%s: mono rendering -> no thread support\n", __FUNCTION__)); return NULL; } else { assert(tmp->thread_boxes); DBG(("%s: clipped? %d\n", __FUNCTION__, clip->data != NULL)); if (clip->data) span = span_thread_clipped_box; else span = span_thread_box; } return span; } static void span_thread(void *arg) { struct span_thread *thread = arg; struct span_thread_boxes boxes; struct tor tor; const xTrapezoid *t; int n, y1, y2; if (!tor_init(&tor, &thread->extents, 2*thread->ntrap)) return; boxes.op = thread->op; boxes.num_boxes = 0; y1 = thread->extents.y1 - thread->draw_y; y2 = thread->extents.y2 - thread->draw_y; for (n = thread->ntrap, t = thread->traps; n--; t++) { if (pixman_fixed_integer_floor(t->top) >= y2 || pixman_fixed_integer_ceil(t->bottom) <= y1) continue; tor_add_trapezoid(&tor, t, thread->dx, thread->dy); } tor_render(thread->sna, &tor, (struct sna_composite_spans_op *)&boxes, thread->clip, thread->span, thread->unbounded); tor_fini(&tor); if (boxes.num_boxes) { DBG(("%s: flushing %d boxes\n", __FUNCTION__, boxes.num_boxes)); assert(boxes.num_boxes <= SPAN_THREAD_MAX_BOXES); thread->op->thread_boxes(thread->sna, thread->op, boxes.boxes, boxes.num_boxes); } } bool imprecise_trapezoid_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned int flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps) { struct sna_composite_spans_op tmp; pixman_region16_t clip; int16_t dst_x, dst_y; bool was_clear; int dx, dy, n; int num_threads; if (NO_IMPRECISE) return false; if (!sna->render.check_composite_spans(sna, op, src, dst, 0, 0, flags)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } if (!trapezoids_bounds(ntrap, traps, &clip.extents)) return true; #if 0 if (clip.extents.y2 - clip.extents.y1 < 64 && clip.extents.x2 - clip.extents.x1 < 64) { DBG(("%s: fallback -- traps extents too small %dx%d\n", __FUNCTION__, extents.y2 - extents.y1, extents.x2 - extents.x1)); return false; } #endif DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2)); trapezoid_origin(&traps[0].left, &dst_x, &dst_y); if (!sna_compute_composite_region(&clip, src, NULL, dst, src_x + clip.extents.x1 - dst_x, src_y + clip.extents.y1 - dst_y, 0, 0, clip.extents.x1, clip.extents.y1, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1)) { DBG(("%s: trapezoids do not intersect drawable clips\n", __FUNCTION__)) ; return true; } if (!sna->render.check_composite_spans(sna, op, src, dst, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1, flags)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } dx = dst->pDrawable->x; dy = dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d) src -> (%d, %d)\n", __FUNCTION__, clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2, dx, dy, src_x + clip.extents.x1 - dst_x - dx, src_y + clip.extents.y1 - dst_y - dy)); was_clear = sna_drawable_is_clear(dst->pDrawable); switch (op) { case PictOpAdd: case PictOpOver: if (was_clear) op = PictOpSrc; break; case PictOpIn: if (was_clear) return true; break; } if (!sna->render.composite_spans(sna, op, src, dst, src_x + clip.extents.x1 - dst_x - dx, src_y + clip.extents.y1 - dst_y - dy, clip.extents.x1, clip.extents.y1, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1, flags, memset(&tmp, 0, sizeof(tmp)))) { DBG(("%s: fallback -- composite spans render op not supported\n", __FUNCTION__)); return false; } dx *= FAST_SAMPLES_X; dy *= FAST_SAMPLES_Y; num_threads = 1; if (!NO_GPU_THREADS && (flags & COMPOSITE_SPANS_RECTILINEAR) == 0 && tmp.thread_boxes && thread_choose_span(&tmp, dst, maskFormat, &clip)) num_threads = sna_use_threads(clip.extents.x2-clip.extents.x1, clip.extents.y2-clip.extents.y1, 16); DBG(("%s: using %d threads\n", __FUNCTION__, num_threads)); if (num_threads == 1) { struct tor tor; if (!tor_init(&tor, &clip.extents, 2*ntrap)) goto skip; for (n = 0; n < ntrap; n++) { if (pixman_fixed_integer_floor(traps[n].top) + dst->pDrawable->y >= clip.extents.y2 || pixman_fixed_integer_ceil(traps[n].bottom) + dst->pDrawable->y <= clip.extents.y1) continue; tor_add_trapezoid(&tor, &traps[n], dx, dy); } tor_render(sna, &tor, &tmp, &clip, choose_span(&tmp, dst, maskFormat, &clip), !was_clear && maskFormat && !operator_is_bounded(op)); tor_fini(&tor); } else { struct span_thread threads[num_threads]; int y, h; DBG(("%s: using %d threads for span compositing %dx%d\n", __FUNCTION__, num_threads, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1)); threads[0].sna = sna; threads[0].op = &tmp; threads[0].traps = traps; threads[0].ntrap = ntrap; threads[0].extents = clip.extents; threads[0].clip = &clip; threads[0].dx = dx; threads[0].dy = dy; threads[0].draw_y = dst->pDrawable->y; threads[0].unbounded = !was_clear && maskFormat && !operator_is_bounded(op); threads[0].span = thread_choose_span(&tmp, dst, maskFormat, &clip); y = clip.extents.y1; h = clip.extents.y2 - clip.extents.y1; h = (h + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * h >= clip.extents.y2 - clip.extents.y1; for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].extents.y1 = y; threads[n].extents.y2 = y += h; sna_threads_run(n, span_thread, &threads[n]); } assert(y < threads[0].extents.y2); threads[0].extents.y1 = y; span_thread(&threads[0]); sna_threads_wait(); } skip: tmp.done(sna, &tmp); REGION_UNINIT(NULL, &clip); return true; } static void tor_blt_mask(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { uint8_t *ptr = (uint8_t *)op; int stride = (intptr_t)clip; int h, w; coverage = 256 * coverage / FAST_SAMPLES_XY; coverage -= coverage >> 8; ptr += box->y1 * stride + box->x1; h = box->y2 - box->y1; w = box->x2 - box->x1; if ((w | h) == 1) { *ptr = coverage; } else if (w == 1) { do { *ptr = coverage; ptr += stride; } while (--h); } else do { memset(ptr, coverage, w); ptr += stride; } while (--h); } static void tor_blt_mask_mono(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { tor_blt_mask(sna, op, clip, box, coverage < FAST_SAMPLES_XY/2 ? 0 : FAST_SAMPLES_XY); } bool imprecise_trapezoid_mask_converter(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps) { struct tor tor; ScreenPtr screen = dst->pDrawable->pScreen; PixmapPtr scratch; PicturePtr mask; BoxRec extents; int16_t dst_x, dst_y; int dx, dy; int error, n; if (NO_IMPRECISE) return false; if (maskFormat == NULL && ntrap > 1) { DBG(("%s: individual rasterisation requested\n", __FUNCTION__)); do { /* XXX unwind errors? */ if (!imprecise_trapezoid_mask_converter(op, src, dst, NULL, flags, src_x, src_y, 1, traps++)) return false; } while (--ntrap); return true; } if (!trapezoids_bounds(ntrap, traps, &extents)) return true; DBG(("%s: ntraps=%d, extents (%d, %d), (%d, %d)\n", __FUNCTION__, ntrap, extents.x1, extents.y1, extents.x2, extents.y2)); if (!sna_compute_composite_extents(&extents, src, NULL, dst, src_x, src_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) return true; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); extents.y2 -= extents.y1; extents.x2 -= extents.x1; extents.x1 -= dst->pDrawable->x; extents.y1 -= dst->pDrawable->y; dst_x = extents.x1; dst_y = extents.y1; dx = -extents.x1 * FAST_SAMPLES_X; dy = -extents.y1 * FAST_SAMPLES_Y; extents.x1 = extents.y1 = 0; DBG(("%s: mask (%dx%d), dx=(%d, %d)\n", __FUNCTION__, extents.x2, extents.y2, dx, dy)); scratch = sna_pixmap_create_upload(screen, extents.x2, extents.y2, 8, KGEM_BUFFER_WRITE_INPLACE); if (!scratch) return true; DBG(("%s: created buffer %p, stride %d\n", __FUNCTION__, scratch->devPrivate.ptr, scratch->devKind)); if (!tor_init(&tor, &extents, 2*ntrap)) { sna_pixmap_destroy(scratch); return true; } for (n = 0; n < ntrap; n++) { if (pixman_fixed_to_int(traps[n].top) - dst_y >= extents.y2 || pixman_fixed_to_int(traps[n].bottom) - dst_y < 0) continue; tor_add_trapezoid(&tor, &traps[n], dx, dy); } if (extents.x2 <= TOR_INPLACE_SIZE) { uint8_t buf[TOR_INPLACE_SIZE]; tor_inplace(&tor, scratch, is_mono(dst, maskFormat), scratch->usage_hint ? NULL : buf); } else { tor_render(NULL, &tor, scratch->devPrivate.ptr, (void *)(intptr_t)scratch->devKind, is_mono(dst, maskFormat) ? tor_blt_mask_mono : tor_blt_mask, true); } tor_fini(&tor); mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, 8, PICT_a8), 0, 0, serverClient, &error); if (mask) { int16_t x0, y0; trapezoid_origin(&traps[0].left, &x0, &y0); CompositePicture(op, src, mask, dst, src_x + dst_x - x0, src_y + dst_y - y0, 0, 0, dst_x, dst_y, extents.x2, extents.y2); FreePicture(mask, 0); } sna_pixmap_destroy(scratch); return true; } struct inplace { uint8_t *ptr; uint32_t stride; union { uint8_t opacity; uint32_t color; }; }; static force_inline uint8_t coverage_opacity(int coverage, uint8_t opacity) { coverage = coverage * 256 / FAST_SAMPLES_XY; coverage -= coverage >> 8; return opacity == 255 ? coverage : mul_8_8(coverage, opacity); } static void _tor_blt_src(struct inplace *in, const BoxRec *box, uint8_t v) { uint8_t *ptr = in->ptr; int h, w; ptr += box->y1 * in->stride + box->x1; h = box->y2 - box->y1; w = box->x2 - box->x1; if ((w | h) == 1) { *ptr = v; } else if (w == 1) { do { *ptr = v; ptr += in->stride; } while (--h); } else do { memset(ptr, v, w); ptr += in->stride; } while (--h); } static void tor_blt_src(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct inplace *in = (struct inplace *)op; _tor_blt_src(in, box, coverage_opacity(coverage, in->opacity)); } static void tor_blt_src_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) tor_blt_src(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } static void tor_blt_in(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct inplace *in = (struct inplace *)op; uint8_t *ptr = in->ptr; int h, w, i; if (coverage == 0) { _tor_blt_src(in, box, 0); return; } coverage = coverage_opacity(coverage, in->opacity); if (coverage == 0xff) return; ptr += box->y1 * in->stride + box->x1; h = box->y2 - box->y1; w = box->x2 - box->x1; do { for (i = 0; i < w; i++) ptr[i] = mul_8_8(ptr[i], coverage); ptr += in->stride; } while (--h); } static void tor_blt_in_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) tor_blt_in(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } static void tor_blt_add(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct inplace *in = (struct inplace *)op; uint8_t *ptr = in->ptr; int h, w, v, i; if (coverage == 0) return; coverage = coverage_opacity(coverage, in->opacity); if (coverage == 0xff) { _tor_blt_src(in, box, 0xff); return; } ptr += box->y1 * in->stride + box->x1; h = box->y2 - box->y1; w = box->x2 - box->x1; if ((w | h) == 1) { v = coverage + *ptr; *ptr = v >= 255 ? 255 : v; } else { do { for (i = 0; i < w; i++) { v = coverage + ptr[i]; ptr[i] = v >= 255 ? 255 : v; } ptr += in->stride; } while (--h); } } static void tor_blt_add_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) tor_blt_add(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } static void tor_blt_lerp32(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct inplace *in = (struct inplace *)op; uint32_t *ptr = (uint32_t *)in->ptr; int stride = in->stride / sizeof(uint32_t); int h, w, i; if (coverage == 0) return; ptr += box->y1 * stride + box->x1; h = box->y2 - box->y1; w = box->x2 - box->x1; if (coverage == FAST_SAMPLES_XY) { if ((w | h) == 1) { *ptr = in->color; } else { if (w < 16) { do { for (i = 0; i < w; i++) ptr[i] = in->color; ptr += stride; } while (--h); } else { pixman_fill(ptr, stride, 32, 0, 0, w, h, in->color); } } } else { coverage = coverage * 256 / FAST_SAMPLES_XY; coverage -= coverage >> 8; if ((w | h) == 1) { *ptr = lerp8x4(in->color, coverage, *ptr); } else if (w == 1) { do { *ptr = lerp8x4(in->color, coverage, *ptr); ptr += stride; } while (--h); } else{ do { for (i = 0; i < w; i++) ptr[i] = lerp8x4(in->color, coverage, ptr[i]); ptr += stride; } while (--h); } } } static void tor_blt_lerp32_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) tor_blt_lerp32(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } struct pixman_inplace { pixman_image_t *image, *source, *mask; uint32_t color; uint32_t *bits; int dx, dy; int sx, sy; uint8_t op; }; static void pixmask_span_solid(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct pixman_inplace *pi = (struct pixman_inplace *)op; if (coverage != FAST_SAMPLES_XY) { coverage = coverage * 256 / FAST_SAMPLES_XY; coverage -= coverage >> 8; *pi->bits = mul_4x8_8(pi->color, coverage); } else *pi->bits = pi->color; pixman_image_composite(pi->op, pi->source, NULL, pi->image, box->x1, box->y1, 0, 0, pi->dx + box->x1, pi->dy + box->y1, box->x2 - box->x1, box->y2 - box->y1); } static void pixmask_span_solid__clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) pixmask_span_solid(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } static void pixmask_span(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct pixman_inplace *pi = (struct pixman_inplace *)op; pixman_image_t *mask = NULL; if (coverage != FAST_SAMPLES_XY) { coverage = coverage * 256 / FAST_SAMPLES_XY; coverage -= coverage >> 8; *pi->bits = coverage; mask = pi->mask; } pixman_image_composite(pi->op, pi->source, mask, pi->image, pi->sx + box->x1, pi->sy + box->y1, 0, 0, pi->dx + box->x1, pi->dy + box->y1, box->x2 - box->x1, box->y2 - box->y1); } static void pixmask_span__clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) pixmask_span(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } struct inplace_x8r8g8b8_thread { xTrapezoid *traps; PicturePtr dst, src; BoxRec extents; int dx, dy; int ntrap; bool lerp, is_solid; uint32_t color; int16_t src_x, src_y; uint8_t op; }; static void inplace_x8r8g8b8_thread(void *arg) { struct inplace_x8r8g8b8_thread *thread = arg; struct tor tor; span_func_t span; RegionPtr clip; int y1, y2, n; if (!tor_init(&tor, &thread->extents, 2*thread->ntrap)) return; y1 = thread->extents.y1 - thread->dst->pDrawable->y; y2 = thread->extents.y2 - thread->dst->pDrawable->y; for (n = 0; n < thread->ntrap; n++) { if (pixman_fixed_to_int(thread->traps[n].top) >= y2 || pixman_fixed_to_int(thread->traps[n].bottom) < y1) continue; tor_add_trapezoid(&tor, &thread->traps[n], thread->dx, thread->dy); } clip = thread->dst->pCompositeClip; if (thread->lerp) { struct inplace inplace; int16_t dst_x, dst_y; PixmapPtr pixmap; pixmap = get_drawable_pixmap(thread->dst->pDrawable); inplace.ptr = pixmap->devPrivate.ptr; if (get_drawable_deltas(thread->dst->pDrawable, pixmap, &dst_x, &dst_y)) inplace.ptr += dst_y * pixmap->devKind + dst_x * 4; inplace.stride = pixmap->devKind; inplace.color = thread->color; if (clip->data) span = tor_blt_lerp32_clipped; else span = tor_blt_lerp32; tor_render(NULL, &tor, (void*)&inplace, clip, span, false); } else if (thread->is_solid) { struct pixman_inplace pi; pi.image = image_from_pict(thread->dst, false, &pi.dx, &pi.dy); pi.op = thread->op; pi.color = thread->color; pi.bits = (uint32_t *)&pi.sx; pi.source = pixman_image_create_bits(PIXMAN_a8r8g8b8, 1, 1, pi.bits, 0); pixman_image_set_repeat(pi.source, PIXMAN_REPEAT_NORMAL); if (clip->data) span = pixmask_span_solid__clipped; else span = pixmask_span_solid; tor_render(NULL, &tor, (void*)&pi, clip, span, false); pixman_image_unref(pi.source); pixman_image_unref(pi.image); } else { struct pixman_inplace pi; int16_t x0, y0; trapezoid_origin(&thread->traps[0].left, &x0, &y0); pi.image = image_from_pict(thread->dst, false, &pi.dx, &pi.dy); pi.source = image_from_pict(thread->src, false, &pi.sx, &pi.sy); pi.sx += thread->src_x - x0; pi.sy += thread->src_y - y0; pi.mask = pixman_image_create_bits(PIXMAN_a8, 1, 1, NULL, 0); pixman_image_set_repeat(pi.mask, PIXMAN_REPEAT_NORMAL); pi.bits = pixman_image_get_data(pi.mask); pi.op = thread->op; if (clip->data) span = pixmask_span__clipped; else span = pixmask_span; tor_render(NULL, &tor, (void*)&pi, clip, span, false); pixman_image_unref(pi.mask); pixman_image_unref(pi.source); pixman_image_unref(pi.image); } tor_fini(&tor); } static bool trapezoid_span_inplace__x8r8g8b8(CARD8 op, PicturePtr dst, PicturePtr src, int16_t src_x, int16_t src_y, PictFormatPtr maskFormat, int ntrap, xTrapezoid *traps) { uint32_t color; bool lerp, is_solid; RegionRec region; int dx, dy; int num_threads, n; lerp = false; is_solid = sna_picture_is_solid(src, &color); if (is_solid) { if (op == PictOpOver && (color >> 24) == 0xff) op = PictOpSrc; if (op == PictOpOver && sna_drawable_is_clear(dst->pDrawable)) op = PictOpSrc; lerp = op == PictOpSrc; } if (!lerp) { switch (op) { case PictOpOver: case PictOpAdd: case PictOpOutReverse: break; case PictOpSrc: if (!sna_drawable_is_clear(dst->pDrawable)) return false; break; default: return false; } } if (maskFormat == NULL && ntrap > 1) { DBG(("%s: individual rasterisation requested\n", __FUNCTION__)); do { /* XXX unwind errors? */ if (!trapezoid_span_inplace__x8r8g8b8(op, dst, src, src_x, src_y, NULL, 1, traps++)) return false; } while (--ntrap); return true; } if (!trapezoids_bounds(ntrap, traps, ®ion.extents)) return true; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (!sna_compute_composite_extents(®ion.extents, src, NULL, dst, src_x, src_y, 0, 0, region.extents.x1, region.extents.y1, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1)) return true; DBG(("%s: clipped extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); region.data = NULL; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, ®ion, MOVE_WRITE | MOVE_READ)) return true; if (!is_solid && src->pDrawable) { if (!sna_drawable_move_to_cpu(src->pDrawable, MOVE_READ)) return true; if (src->alphaMap && !sna_drawable_move_to_cpu(src->alphaMap->pDrawable, MOVE_READ)) return true; } dx = dst->pDrawable->x * FAST_SAMPLES_X; dy = dst->pDrawable->y * FAST_SAMPLES_Y; num_threads = sna_use_threads(4*(region.extents.x2 - region.extents.x1), region.extents.y2 - region.extents.y1, 16); DBG(("%s: %dx%d, format=%x, op=%d, lerp?=%d, num_threads=%d\n", __FUNCTION__, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1, dst->format, op, lerp, num_threads)); if (num_threads == 1) { struct tor tor; span_func_t span; if (!tor_init(&tor, ®ion.extents, 2*ntrap)) return true; for (n = 0; n < ntrap; n++) { if (pixman_fixed_to_int(traps[n].top) >= region.extents.y2 - dst->pDrawable->y || pixman_fixed_to_int(traps[n].bottom) < region.extents.y1 - dst->pDrawable->y) continue; tor_add_trapezoid(&tor, &traps[n], dx, dy); } if (lerp) { struct inplace inplace; PixmapPtr pixmap; int16_t dst_x, dst_y; pixmap = get_drawable_pixmap(dst->pDrawable); inplace.ptr = pixmap->devPrivate.ptr; if (get_drawable_deltas(dst->pDrawable, pixmap, &dst_x, &dst_y)) inplace.ptr += dst_y * pixmap->devKind + dst_x * 4; inplace.stride = pixmap->devKind; inplace.color = color; if (dst->pCompositeClip->data) span = tor_blt_lerp32_clipped; else span = tor_blt_lerp32; DBG(("%s: render inplace op=%d, color=%08x\n", __FUNCTION__, op, color)); if (sigtrap_get() == 0) { tor_render(NULL, &tor, (void*)&inplace, dst->pCompositeClip, span, false); sigtrap_put(); } } else if (is_solid) { struct pixman_inplace pi; pi.image = image_from_pict(dst, false, &pi.dx, &pi.dy); pi.op = op; pi.color = color; pi.bits = (uint32_t *)&pi.sx; pi.source = pixman_image_create_bits(PIXMAN_a8r8g8b8, 1, 1, pi.bits, 0); pixman_image_set_repeat(pi.source, PIXMAN_REPEAT_NORMAL); if (dst->pCompositeClip->data) span = pixmask_span_solid__clipped; else span = pixmask_span_solid; if (sigtrap_get() == 0) { tor_render(NULL, &tor, (void*)&pi, dst->pCompositeClip, span, false); sigtrap_put(); } pixman_image_unref(pi.source); pixman_image_unref(pi.image); } else { struct pixman_inplace pi; int16_t x0, y0; trapezoid_origin(&traps[0].left, &x0, &y0); pi.image = image_from_pict(dst, false, &pi.dx, &pi.dy); pi.source = image_from_pict(src, false, &pi.sx, &pi.sy); pi.sx += src_x - x0; pi.sy += src_y - y0; pi.mask = pixman_image_create_bits(PIXMAN_a8, 1, 1, NULL, 0); pixman_image_set_repeat(pi.mask, PIXMAN_REPEAT_NORMAL); pi.bits = pixman_image_get_data(pi.mask); pi.op = op; if (dst->pCompositeClip->data) span = pixmask_span__clipped; else span = pixmask_span; if (sigtrap_get() == 0) { tor_render(NULL, &tor, (void*)&pi, dst->pCompositeClip, span, false); sigtrap_put(); } pixman_image_unref(pi.mask); pixman_image_unref(pi.source); pixman_image_unref(pi.image); } tor_fini(&tor); } else { struct inplace_x8r8g8b8_thread threads[num_threads]; int y, h; DBG(("%s: using %d threads for inplace compositing %dx%d\n", __FUNCTION__, num_threads, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1)); threads[0].traps = traps; threads[0].ntrap = ntrap; threads[0].extents = region.extents; threads[0].lerp = lerp; threads[0].is_solid = is_solid; threads[0].color = color; threads[0].dx = dx; threads[0].dy = dy; threads[0].dst = dst; threads[0].src = src; threads[0].op = op; threads[0].src_x = src_x; threads[0].src_y = src_y; y = region.extents.y1; h = region.extents.y2 - region.extents.y1; h = (h + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * h >= region.extents.y2 - region.extents.y1; if (sigtrap_get() == 0) { for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].extents.y1 = y; threads[n].extents.y2 = y += h; sna_threads_run(n, inplace_x8r8g8b8_thread, &threads[n]); } assert(y < threads[0].extents.y2); threads[0].extents.y1 = y; inplace_x8r8g8b8_thread(&threads[0]); sna_threads_wait(); sigtrap_put(); } else sna_threads_kill(); /* leaks thread allocations */ } return true; } struct inplace_thread { xTrapezoid *traps; RegionPtr clip; span_func_t span; struct inplace inplace; BoxRec extents; int dx, dy; int draw_x, draw_y; bool unbounded; int ntrap; }; static void inplace_thread(void *arg) { struct inplace_thread *thread = arg; struct tor tor; int n; if (!tor_init(&tor, &thread->extents, 2*thread->ntrap)) return; for (n = 0; n < thread->ntrap; n++) { if (pixman_fixed_to_int(thread->traps[n].top) >= thread->extents.y2 - thread->draw_y || pixman_fixed_to_int(thread->traps[n].bottom) < thread->extents.y1 - thread->draw_y) continue; tor_add_trapezoid(&tor, &thread->traps[n], thread->dx, thread->dy); } tor_render(NULL, &tor, (void*)&thread->inplace, thread->clip, thread->span, thread->unbounded); tor_fini(&tor); } bool imprecise_trapezoid_span_inplace(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps, bool fallback) { struct inplace inplace; span_func_t span; PixmapPtr pixmap; struct sna_pixmap *priv; RegionRec region; uint32_t color; bool unbounded; int16_t dst_x, dst_y; int dx, dy; int num_threads, n; if (NO_IMPRECISE) return false; if (dst->format == PICT_a8r8g8b8 || dst->format == PICT_x8r8g8b8) return trapezoid_span_inplace__x8r8g8b8(op, dst, src, src_x, src_y, maskFormat, ntrap, traps); if (!sna_picture_is_solid(src, &color)) { DBG(("%s: fallback -- can not perform operation in place, requires solid source\n", __FUNCTION__)); return false; } if (dst->format != PICT_a8) { DBG(("%s: fallback -- can not perform operation in place, format=%x\n", __FUNCTION__, dst->format)); return false; } pixmap = get_drawable_pixmap(dst->pDrawable); unbounded = false; priv = sna_pixmap(pixmap); if (priv) { switch (op) { case PictOpAdd: if (priv->clear && priv->clear_color == 0) { unbounded = true; op = PictOpSrc; } if ((color >> 24) == 0) return true; break; case PictOpIn: if (priv->clear && priv->clear_color == 0) return true; if (priv->clear && priv->clear_color == 0xff) op = PictOpSrc; unbounded = true; break; case PictOpSrc: unbounded = true; break; default: DBG(("%s: fallback -- can not perform op [%d] in place\n", __FUNCTION__, op)); return false; } } else { switch (op) { case PictOpAdd: if ((color >> 24) == 0) return true; break; case PictOpIn: case PictOpSrc: unbounded = true; break; default: DBG(("%s: fallback -- can not perform op [%d] in place\n", __FUNCTION__, op)); return false; } } DBG(("%s: format=%x, op=%d, color=%x\n", __FUNCTION__, dst->format, op, color)); if (maskFormat == NULL && ntrap > 1) { DBG(("%s: individual rasterisation requested\n", __FUNCTION__)); do { /* XXX unwind errors? */ if (!imprecise_trapezoid_span_inplace(sna, op, src, dst, NULL, flags, src_x, src_y, 1, traps++, fallback)) return false; } while (--ntrap); return true; } if (!trapezoids_bounds(ntrap, traps, ®ion.extents)) return true; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (!sna_compute_composite_extents(®ion.extents, NULL, NULL, dst, 0, 0, 0, 0, region.extents.x1, region.extents.y1, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1)) return true; DBG(("%s: clipped extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (op == PictOpSrc) { if (dst->pCompositeClip->data) span = tor_blt_src_clipped; else span = tor_blt_src; } else if (op == PictOpIn) { if (dst->pCompositeClip->data) span = tor_blt_in_clipped; else span = tor_blt_in; } else { assert(op == PictOpAdd); if (dst->pCompositeClip->data) span = tor_blt_add_clipped; else span = tor_blt_add; } DBG(("%s: move-to-cpu\n", __FUNCTION__)); region.data = NULL; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, ®ion, op == PictOpSrc ? MOVE_WRITE | MOVE_INPLACE_HINT : MOVE_WRITE | MOVE_READ)) return true; dx = dst->pDrawable->x * FAST_SAMPLES_X; dy = dst->pDrawable->y * FAST_SAMPLES_Y; inplace.ptr = pixmap->devPrivate.ptr; if (get_drawable_deltas(dst->pDrawable, pixmap, &dst_x, &dst_y)) inplace.ptr += dst_y * pixmap->devKind + dst_x; inplace.stride = pixmap->devKind; inplace.opacity = color >> 24; num_threads = 1; if ((flags & COMPOSITE_SPANS_RECTILINEAR) == 0) num_threads = sna_use_threads(region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1, 16); if (num_threads == 1) { struct tor tor; if (!tor_init(&tor, ®ion.extents, 2*ntrap)) return true; for (n = 0; n < ntrap; n++) { if (pixman_fixed_to_int(traps[n].top) >= region.extents.y2 - dst->pDrawable->y || pixman_fixed_to_int(traps[n].bottom) < region.extents.y1 - dst->pDrawable->y) continue; tor_add_trapezoid(&tor, &traps[n], dx, dy); } if (sigtrap_get() == 0) { tor_render(NULL, &tor, (void*)&inplace, dst->pCompositeClip, span, unbounded); sigtrap_put(); } tor_fini(&tor); } else { struct inplace_thread threads[num_threads]; int y, h; DBG(("%s: using %d threads for inplace compositing %dx%d\n", __FUNCTION__, num_threads, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1)); threads[0].traps = traps; threads[0].ntrap = ntrap; threads[0].inplace = inplace; threads[0].extents = region.extents; threads[0].clip = dst->pCompositeClip; threads[0].span = span; threads[0].unbounded = unbounded; threads[0].dx = dx; threads[0].dy = dy; threads[0].draw_x = dst->pDrawable->x; threads[0].draw_y = dst->pDrawable->y; y = region.extents.y1; h = region.extents.y2 - region.extents.y1; h = (h + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * h >= region.extents.y2 - region.extents.y1; if (sigtrap_get() == 0) { for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].extents.y1 = y; threads[n].extents.y2 = y += h; sna_threads_run(n, inplace_thread, &threads[n]); } assert(y < threads[0].extents.y2); threads[0].extents.y1 = y; inplace_thread(&threads[0]); sna_threads_wait(); sigtrap_put(); } else sna_threads_kill(); /* leaks thread allocations */ } return true; } bool imprecise_trapezoid_span_fallback(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps) { struct tor tor; ScreenPtr screen = dst->pDrawable->pScreen; PixmapPtr scratch; PicturePtr mask; BoxRec extents; int16_t dst_x, dst_y; int dx, dy; int error, n; if (NO_IMPRECISE) return false; if (maskFormat == NULL && ntrap > 1) { DBG(("%s: individual rasterisation requested\n", __FUNCTION__)); do { /* XXX unwind errors? */ if (!imprecise_trapezoid_span_fallback(op, src, dst, NULL, flags, src_x, src_y, 1, traps++)) return false; } while (--ntrap); return true; } if (!trapezoids_bounds(ntrap, traps, &extents)) return true; DBG(("%s: ntraps=%d, extents (%d, %d), (%d, %d)\n", __FUNCTION__, ntrap, extents.x1, extents.y1, extents.x2, extents.y2)); if (!sna_compute_composite_extents(&extents, src, NULL, dst, src_x, src_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) return true; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); extents.y2 -= extents.y1; extents.x2 -= extents.x1; extents.x1 -= dst->pDrawable->x; extents.y1 -= dst->pDrawable->y; dst_x = extents.x1; dst_y = extents.y1; dx = -extents.x1 * FAST_SAMPLES_X; dy = -extents.y1 * FAST_SAMPLES_Y; extents.x1 = extents.y1 = 0; DBG(("%s: mask (%dx%d), dx=(%d, %d)\n", __FUNCTION__, extents.x2, extents.y2, dx, dy)); scratch = sna_pixmap_create_unattached(screen, extents.x2, extents.y2, 8); if (!scratch) return true; DBG(("%s: created buffer %p, stride %d\n", __FUNCTION__, scratch->devPrivate.ptr, scratch->devKind)); if (!tor_init(&tor, &extents, 2*ntrap)) { sna_pixmap_destroy(scratch); return true; } for (n = 0; n < ntrap; n++) { if (pixman_fixed_to_int(traps[n].top) - dst_y >= extents.y2 || pixman_fixed_to_int(traps[n].bottom) - dst_y < 0) continue; tor_add_trapezoid(&tor, &traps[n], dx, dy); } if (extents.x2 <= TOR_INPLACE_SIZE) { tor_inplace(&tor, scratch, is_mono(dst, maskFormat), NULL); } else { tor_render(NULL, &tor, scratch->devPrivate.ptr, (void *)(intptr_t)scratch->devKind, is_mono(dst, maskFormat) ? tor_blt_mask_mono : tor_blt_mask, true); } tor_fini(&tor); mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, 8, PICT_a8), 0, 0, serverClient, &error); if (mask) { RegionRec region; int16_t x0, y0; region.extents.x1 = dst_x + dst->pDrawable->x; region.extents.y1 = dst_y + dst->pDrawable->y; region.extents.x2 = region.extents.x1 + extents.x2; region.extents.y2 = region.extents.y1 + extents.y2; region.data = NULL; trapezoid_origin(&traps[0].left, &x0, &y0); DBG(("%s: fbComposite()\n", __FUNCTION__)); sna_composite_fb(op, src, mask, dst, ®ion, src_x + dst_x - x0, src_y + dst_y - y0, 0, 0, dst_x, dst_y, extents.x2, extents.y2); FreePicture(mask, 0); } sna_pixmap_destroy(scratch); return true; } bool imprecise_trap_span_converter(struct sna *sna, PicturePtr dst, INT16 src_x, INT16 src_y, int ntrap, xTrap *trap) { struct sna_composite_spans_op tmp; struct tor tor; BoxRec extents; pixman_region16_t *clip; int dx, dy, n; if (dst->pDrawable->depth < 8) return false; if (!sna->render.check_composite_spans(sna, PictOpAdd, sna->render.white_picture, dst, dst->pCompositeClip->extents.x2 - dst->pCompositeClip->extents.x1, dst->pCompositeClip->extents.y2 - dst->pCompositeClip->extents.y1, 0)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } clip = dst->pCompositeClip; extents = *RegionExtents(clip); dx = dst->pDrawable->x; dy = dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2, dx, dy)); memset(&tmp, 0, sizeof(tmp)); if (!sna->render.composite_spans(sna, PictOpAdd, sna->render.white_picture, dst, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1, 0, &tmp)) { DBG(("%s: fallback -- composite spans render op not supported\n", __FUNCTION__)); return false; } dx *= FAST_SAMPLES_X; dy *= FAST_SAMPLES_Y; if (!tor_init(&tor, &extents, 2*ntrap)) goto skip; for (n = 0; n < ntrap; n++) { xPointFixed p1, p2; if (pixman_fixed_to_int(trap[n].top.y) + dst->pDrawable->y >= extents.y2 || pixman_fixed_to_int(trap[n].bot.y) + dst->pDrawable->y < extents.y1) continue; p1.y = trap[n].top.y; p2.y = trap[n].bot.y; p1.x = trap[n].top.l; p2.x = trap[n].bot.l; polygon_add_line(tor.polygon, &p1, &p2, dx, dy); p1.y = trap[n].bot.y; p2.y = trap[n].top.y; p1.x = trap[n].top.r; p2.x = trap[n].bot.r; polygon_add_line(tor.polygon, &p1, &p2, dx, dy); } tor_render(sna, &tor, &tmp, clip, choose_span(&tmp, dst, NULL, clip), false); tor_fini(&tor); skip: tmp.done(sna, &tmp); return true; } static void mark_damaged(PixmapPtr pixmap, struct sna_pixmap *priv, BoxPtr box, int16_t x, int16_t y) { box->x1 += x; box->x2 += x; box->y1 += y; box->y2 += y; if (box->x1 <= 0 && box->y1 <= 0 && box->x2 >= pixmap->drawable.width && box->y2 >= pixmap->drawable.height) { sna_damage_destroy(&priv->cpu_damage); sna_damage_all(&priv->gpu_damage, pixmap); list_del(&priv->flush_list); } else { sna_damage_add_box(&priv->gpu_damage, box); sna_damage_subtract_box(&priv->cpu_damage, box); } } bool trap_mask_converter(struct sna *sna, PicturePtr picture, INT16 x, INT16 y, int ntrap, xTrap *trap) { struct tor tor; ScreenPtr screen = picture->pDrawable->pScreen; PixmapPtr scratch, pixmap; struct sna_pixmap *priv; BoxRec extents; span_func_t span; int dx, dy, n; if (NO_SCAN_CONVERTER) return false; pixmap = get_drawable_pixmap(picture->pDrawable); priv = sna_pixmap_move_to_gpu(pixmap, MOVE_READ | MOVE_WRITE); if (priv == NULL) return false; /* XXX strict adherence to the Render specification */ if (picture->polyMode == PolyModePrecise && picture->polyEdge != PolyEdgeSharp) { DBG(("%s: fallback -- precise rasterisation requested\n", __FUNCTION__)); return false; } extents = *RegionExtents(picture->pCompositeClip); for (n = 0; n < ntrap; n++) { int v; v = x + pixman_fixed_integer_floor (MIN(trap[n].top.l, trap[n].bot.l)); if (v < extents.x1) extents.x1 = v; v = x + pixman_fixed_integer_ceil (MAX(trap[n].top.r, trap[n].bot.r)); if (v > extents.x2) extents.x2 = v; v = y + pixman_fixed_integer_floor (trap[n].top.y); if (v < extents.y1) extents.y1 = v; v = y + pixman_fixed_integer_ceil (trap[n].bot.y); if (v > extents.y2) extents.y2 = v; } DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); scratch = sna_pixmap_create_upload(screen, extents.x2-extents.x1, extents.y2-extents.y1, 8, KGEM_BUFFER_WRITE_INPLACE); if (!scratch) return true; dx = picture->pDrawable->x; dy = picture->pDrawable->y; dx *= FAST_SAMPLES_X; dy *= FAST_SAMPLES_Y; if (!tor_init(&tor, &extents, 2*ntrap)) { sna_pixmap_destroy(scratch); return true; } for (n = 0; n < ntrap; n++) { xPointFixed p1, p2; if (pixman_fixed_to_int(trap[n].top.y) + picture->pDrawable->y >= extents.y2 || pixman_fixed_to_int(trap[n].bot.y) + picture->pDrawable->y < extents.y1) continue; p1.y = trap[n].top.y; p2.y = trap[n].bot.y; p1.x = trap[n].top.l; p2.x = trap[n].bot.l; polygon_add_line(tor.polygon, &p1, &p2, dx, dy); p1.y = trap[n].bot.y; p2.y = trap[n].top.y; p1.x = trap[n].top.r; p2.x = trap[n].bot.r; polygon_add_line(tor.polygon, &p1, &p2, dx, dy); } if (picture->polyEdge == PolyEdgeSharp) span = tor_blt_mask_mono; else span = tor_blt_mask; tor_render(NULL, &tor, scratch->devPrivate.ptr, (void *)(intptr_t)scratch->devKind, span, true); tor_fini(&tor); /* XXX clip boxes */ get_drawable_deltas(picture->pDrawable, pixmap, &x, &y); sna = to_sna_from_screen(screen); sna->render.copy_boxes(sna, GXcopy, &scratch->drawable, __sna_pixmap_get_bo(scratch), -extents.x1, -extents.x1, &pixmap->drawable, priv->gpu_bo, x, y, &extents, 1, 0); mark_damaged(pixmap, priv, &extents ,x, y); sna_pixmap_destroy(scratch); return true; } bool triangles_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int count, xTriangle *tri) { struct sna_composite_spans_op tmp; struct tor tor; BoxRec extents; pixman_region16_t clip; int16_t dst_x, dst_y; int dx, dy, n; bool was_clear; if (NO_SCAN_CONVERTER) return false; if (is_mono(dst, maskFormat)) return mono_triangles_span_converter(sna, op, src, dst, src_x, src_y, count, tri); /* XXX strict adherence to the Render specification */ if (dst->polyMode == PolyModePrecise) { DBG(("%s: fallback -- precise rasterisation requested\n", __FUNCTION__)); return false; } if (!sna->render.check_composite_spans(sna, op, src, dst, 0, 0, 0)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } dst_x = pixman_fixed_to_int(tri[0].p1.x); dst_y = pixman_fixed_to_int(tri[0].p1.y); miTriangleBounds(count, tri, &extents); DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); if (extents.y1 >= extents.y2 || extents.x1 >= extents.x2) return true; #if 0 if (extents.y2 - extents.y1 < 64 && extents.x2 - extents.x1 < 64) { DBG(("%s: fallback -- traps extents too small %dx%d\n", __FUNCTION__, extents.y2 - extents.y1, extents.x2 - extents.x1)); return false; } #endif if (!sna_compute_composite_region(&clip, src, NULL, dst, src_x + extents.x1 - dst_x, src_y + extents.y1 - dst_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) { DBG(("%s: triangles do not intersect drawable clips\n", __FUNCTION__)) ; return true; } if (!sna->render.check_composite_spans(sna, op, src, dst, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1, 0)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } extents = *RegionExtents(&clip); dx = dst->pDrawable->x; dy = dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d) src -> (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2, dx, dy, src_x + extents.x1 - dst_x - dx, src_y + extents.y1 - dst_y - dy)); was_clear = sna_drawable_is_clear(dst->pDrawable); memset(&tmp, 0, sizeof(tmp)); if (!sna->render.composite_spans(sna, op, src, dst, src_x + extents.x1 - dst_x - dx, src_y + extents.y1 - dst_y - dy, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1, 0, &tmp)) { DBG(("%s: fallback -- composite spans render op not supported\n", __FUNCTION__)); return false; } dx *= FAST_SAMPLES_X; dy *= FAST_SAMPLES_Y; if (!tor_init(&tor, &extents, 3*count)) goto skip; for (n = 0; n < count; n++) { polygon_add_line(tor.polygon, &tri[n].p1, &tri[n].p2, dx, dy); polygon_add_line(tor.polygon, &tri[n].p2, &tri[n].p3, dx, dy); polygon_add_line(tor.polygon, &tri[n].p3, &tri[n].p1, dx, dy); } tor_render(sna, &tor, &tmp, &clip, choose_span(&tmp, dst, maskFormat, &clip), !was_clear && maskFormat && !operator_is_bounded(op)); tor_fini(&tor); skip: tmp.done(sna, &tmp); REGION_UNINIT(NULL, &clip); return true; } bool triangles_mask_converter(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int count, xTriangle *tri) { struct tor tor; void (*span)(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage); ScreenPtr screen = dst->pDrawable->pScreen; PixmapPtr scratch; PicturePtr mask; BoxRec extents; int16_t dst_x, dst_y; int dx, dy; int error, n; if (NO_SCAN_CONVERTER) return false; if (is_precise(dst, maskFormat)) { DBG(("%s: fallback -- precise rasterisation requested\n", __FUNCTION__)); return false; } if (maskFormat == NULL && count > 1) { DBG(("%s: fallback -- individual rasterisation requested\n", __FUNCTION__)); return false; } miTriangleBounds(count, tri, &extents); DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); if (extents.y1 >= extents.y2 || extents.x1 >= extents.x2) return true; if (!sna_compute_composite_extents(&extents, src, NULL, dst, src_x, src_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) return true; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); extents.y2 -= extents.y1; extents.x2 -= extents.x1; extents.x1 -= dst->pDrawable->x; extents.y1 -= dst->pDrawable->y; dst_x = extents.x1; dst_y = extents.y1; dx = -extents.x1 * FAST_SAMPLES_X; dy = -extents.y1 * FAST_SAMPLES_Y; extents.x1 = extents.y1 = 0; DBG(("%s: mask (%dx%d)\n", __FUNCTION__, extents.x2, extents.y2)); scratch = sna_pixmap_create_upload(screen, extents.x2, extents.y2, 8, KGEM_BUFFER_WRITE_INPLACE); if (!scratch) return true; DBG(("%s: created buffer %p, stride %d\n", __FUNCTION__, scratch->devPrivate.ptr, scratch->devKind)); if (!tor_init(&tor, &extents, 3*count)) { sna_pixmap_destroy(scratch); return true; } for (n = 0; n < count; n++) { polygon_add_line(tor.polygon, &tri[n].p1, &tri[n].p2, dx, dy); polygon_add_line(tor.polygon, &tri[n].p2, &tri[n].p3, dx, dy); polygon_add_line(tor.polygon, &tri[n].p3, &tri[n].p1, dx, dy); } if (maskFormat ? maskFormat->depth < 8 : dst->polyEdge == PolyEdgeSharp) span = tor_blt_mask_mono; else span = tor_blt_mask; tor_render(NULL, &tor, scratch->devPrivate.ptr, (void *)(intptr_t)scratch->devKind, span, true); mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, 8, PICT_a8), 0, 0, serverClient, &error); if (mask) { CompositePicture(op, src, mask, dst, src_x + dst_x - pixman_fixed_to_int(tri[0].p1.x), src_y + dst_y - pixman_fixed_to_int(tri[0].p1.y), 0, 0, dst_x, dst_y, extents.x2, extents.y2); FreePicture(mask, 0); } tor_fini(&tor); sna_pixmap_destroy(scratch); return true; } struct tristrip_thread { struct sna *sna; const struct sna_composite_spans_op *op; const xPointFixed *points; RegionPtr clip; span_func_t span; BoxRec extents; int dx, dy, draw_y; int count; bool unbounded; }; static void tristrip_thread(void *arg) { struct tristrip_thread *thread = arg; struct span_thread_boxes boxes; struct tor tor; int n, cw, ccw; if (!tor_init(&tor, &thread->extents, 2*thread->count)) return; boxes.op = thread->op; boxes.num_boxes = 0; cw = 0; ccw = 1; polygon_add_line(tor.polygon, &thread->points[ccw], &thread->points[cw], thread->dx, thread->dy); n = 2; do { polygon_add_line(tor.polygon, &thread->points[cw], &thread->points[n], thread->dx, thread->dy); cw = n; if (++n == thread->count) break; polygon_add_line(tor.polygon, &thread->points[n], &thread->points[ccw], thread->dx, thread->dy); ccw = n; if (++n == thread->count) break; } while (1); polygon_add_line(tor.polygon, &thread->points[cw], &thread->points[ccw], thread->dx, thread->dy); assert(tor.polygon->num_edges <= 2*thread->count); tor_render(thread->sna, &tor, (struct sna_composite_spans_op *)&boxes, thread->clip, thread->span, thread->unbounded); tor_fini(&tor); if (boxes.num_boxes) { DBG(("%s: flushing %d boxes\n", __FUNCTION__, boxes.num_boxes)); assert(boxes.num_boxes <= SPAN_THREAD_MAX_BOXES); thread->op->thread_boxes(thread->sna, thread->op, boxes.boxes, boxes.num_boxes); } } bool imprecise_tristrip_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int count, xPointFixed *points) { struct sna_composite_spans_op tmp; BoxRec extents; pixman_region16_t clip; int16_t dst_x, dst_y; int dx, dy, num_threads; bool was_clear; if (!sna->render.check_composite_spans(sna, op, src, dst, 0, 0, 0)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } dst_x = pixman_fixed_to_int(points[0].x); dst_y = pixman_fixed_to_int(points[0].y); miPointFixedBounds(count, points, &extents); DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); if (extents.y1 >= extents.y2 || extents.x1 >= extents.x2) return true; #if 0 if (extents.y2 - extents.y1 < 64 && extents.x2 - extents.x1 < 64) { DBG(("%s: fallback -- traps extents too small %dx%d\n", __FUNCTION__, extents.y2 - extents.y1, extents.x2 - extents.x1)); return false; } #endif if (!sna_compute_composite_region(&clip, src, NULL, dst, src_x + extents.x1 - dst_x, src_y + extents.y1 - dst_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) { DBG(("%s: triangles do not intersect drawable clips\n", __FUNCTION__)) ; return true; } if (!sna->render.check_composite_spans(sna, op, src, dst, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1, 0)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } extents = *RegionExtents(&clip); dx = dst->pDrawable->x; dy = dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d) src -> (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2, dx, dy, src_x + extents.x1 - dst_x - dx, src_y + extents.y1 - dst_y - dy)); was_clear = sna_drawable_is_clear(dst->pDrawable); memset(&tmp, 0, sizeof(tmp)); if (!sna->render.composite_spans(sna, op, src, dst, src_x + extents.x1 - dst_x - dx, src_y + extents.y1 - dst_y - dy, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1, 0, &tmp)) { DBG(("%s: fallback -- composite spans render op not supported\n", __FUNCTION__)); return false; } dx *= FAST_SAMPLES_X; dy *= FAST_SAMPLES_Y; num_threads = 1; if (!NO_GPU_THREADS && tmp.thread_boxes && thread_choose_span(&tmp, dst, maskFormat, &clip)) num_threads = sna_use_threads(extents.x2 - extents.x1, extents.y2 - extents.y1, 16); if (num_threads == 1) { struct tor tor; int cw, ccw, n; if (!tor_init(&tor, &extents, 2*count)) goto skip; cw = 0; ccw = 1; polygon_add_line(tor.polygon, &points[ccw], &points[cw], dx, dy); n = 2; do { polygon_add_line(tor.polygon, &points[cw], &points[n], dx, dy); cw = n; if (++n == count) break; polygon_add_line(tor.polygon, &points[n], &points[ccw], dx, dy); ccw = n; if (++n == count) break; } while (1); polygon_add_line(tor.polygon, &points[cw], &points[2+ccw], dx, dy); assert(tor.polygon->num_edges <= 2*count); tor_render(sna, &tor, &tmp, &clip, choose_span(&tmp, dst, maskFormat, &clip), !was_clear && maskFormat && !operator_is_bounded(op)); tor_fini(&tor); } else { struct tristrip_thread threads[num_threads]; int y, h, n; DBG(("%s: using %d threads for tristrip compositing %dx%d\n", __FUNCTION__, num_threads, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1)); threads[0].sna = sna; threads[0].op = &tmp; threads[0].points = points; threads[0].count = count; threads[0].extents = clip.extents; threads[0].clip = &clip; threads[0].dx = dx; threads[0].dy = dy; threads[0].draw_y = dst->pDrawable->y; threads[0].unbounded = !was_clear && maskFormat && !operator_is_bounded(op); threads[0].span = thread_choose_span(&tmp, dst, maskFormat, &clip); y = clip.extents.y1; h = clip.extents.y2 - clip.extents.y1; h = (h + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * h >= clip.extents.y2 - clip.extents.y1; for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].extents.y1 = y; threads[n].extents.y2 = y += h; sna_threads_run(n, tristrip_thread, &threads[n]); } assert(y < threads[0].extents.y2); threads[0].extents.y1 = y; tristrip_thread(&threads[0]); sna_threads_wait(); } skip: tmp.done(sna, &tmp); REGION_UNINIT(NULL, &clip); return true; } xf86-video-intel-2.99.917/src/sna/sna_video_textured.c0000664000175000017500000002526412432737457017365 00000000000000/*************************************************************************** Copyright 2000-2011 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_video.h" #include #include #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, true) static Atom xvBrightness, xvContrast, xvSyncToVblank; static XvFormatRec Formats[] = { {15}, {16}, {24} }; static const XvAttributeRec Attributes[] = { {XvSettable | XvGettable, -1, 1, (char *)"XV_SYNC_TO_VBLANK"}, //{XvSettable | XvGettable, -128, 127, (char *)"XV_BRIGHTNESS"}, //{XvSettable | XvGettable, 0, 255, (char *)"XV_CONTRAST"}, }; static const XvImageRec Images[] = { XVIMAGE_YUY2, XVIMAGE_YV12, XVIMAGE_I420, XVIMAGE_UYVY, XVMC_YUV, }; static int sna_video_textured_stop(ddStopVideo_ARGS) { struct sna_video *video = port->devPriv.ptr; DBG(("%s()\n", __FUNCTION__)); RegionUninit(&video->clip); sna_video_free_buffers(video); return Success; } static int sna_video_textured_set_attribute(ddSetPortAttribute_ARGS) { struct sna_video *video = port->devPriv.ptr; if (attribute == xvBrightness) { if (value < -128 || value > 127) return BadValue; video->brightness = value; } else if (attribute == xvContrast) { if (value < 0 || value > 255) return BadValue; video->contrast = value; } else if (attribute == xvSyncToVblank) { if (value < -1 || value > 1) return BadValue; video->SyncToVblank = value; } else return BadMatch; return Success; } static int sna_video_textured_get_attribute(ddGetPortAttribute_ARGS) { struct sna_video *video = port->devPriv.ptr; if (attribute == xvBrightness) *value = video->brightness; else if (attribute == xvContrast) *value = video->contrast; else if (attribute == xvSyncToVblank) *value = video->SyncToVblank; else return BadMatch; return Success; } static int sna_video_textured_best_size(ddQueryBestSize_ARGS) { if (vid_w > (drw_w << 1)) drw_w = vid_w >> 1; if (vid_h > (drw_h << 1)) drw_h = vid_h >> 1; *p_w = drw_w; *p_h = drw_h; return Success; } /* * The source rectangle of the video is defined by (src_x, src_y, src_w, src_h). * The dest rectangle of the video is defined by (drw_x, drw_y, drw_w, drw_h). * id is a fourcc code for the format of the video. * buf is the pointer to the source data in system memory. * width and height are the w/h of the source data. * If "sync" is true, then we must be finished with *buf at the point of return * (which we always are). * clip is the clipping region in screen space. * data is a pointer to our port private. * drawable is some Drawable, which might not be the screen in the case of * compositing. It's a new argument to the function in the 1.1 server. */ static int sna_video_textured_put_image(ddPutImage_ARGS) { struct sna_video *video = port->devPriv.ptr; struct sna *sna = video->sna; struct sna_video_frame frame; PixmapPtr pixmap = get_drawable_pixmap(draw); unsigned int flags; BoxRec dstBox; RegionRec clip; xf86CrtcPtr crtc; bool flush = false; bool ret; clip.extents.x1 = draw->x + drw_x; clip.extents.y1 = draw->y + drw_y; clip.extents.x2 = clip.extents.x1 + drw_w; clip.extents.y2 = clip.extents.y1 + drw_h; clip.data = NULL; RegionIntersect(&clip, &clip, gc->pCompositeClip); if (!RegionNotEmpty(&clip)) return Success; DBG(("%s: src=(%d, %d),(%d, %d), dst=(%d, %d),(%d, %d), id=%d, sizep=%dx%d, sync?=%d\n", __FUNCTION__, src_x, src_y, src_w, src_h, drw_x, drw_y, drw_w, drw_h, format->id, width, height, sync)); DBG(("%s: region %d:(%d, %d), (%d, %d)\n", __FUNCTION__, region_num_rects(&clip), clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2)); sna_video_frame_init(video, format->id, width, height, &frame); if (!sna_video_clip_helper(video, &frame, &crtc, &dstBox, src_x, src_y, drw_x + draw->x, drw_y + draw->y, src_w, src_h, drw_w, drw_h, &clip)) return Success; flags = MOVE_WRITE | __MOVE_FORCE; if (clip.data) flags |= MOVE_READ; if (!sna_pixmap_move_area_to_gpu(pixmap, &clip.extents, flags)) { DBG(("%s: attempting to render to a non-GPU pixmap\n", __FUNCTION__)); return BadAlloc; } sna_video_frame_set_rotation(video, &frame, RR_Rotate_0); if (xvmc_passthrough(format->id)) { DBG(("%s: using passthough, name=%d\n", __FUNCTION__, *(uint32_t *)buf)); frame.bo = kgem_create_for_name(&sna->kgem, *(uint32_t*)buf); if (frame.bo == NULL) { DBG(("%s: failed to open bo\n", __FUNCTION__)); return BadAlloc; } if (kgem_bo_size(frame.bo) < frame.size) { DBG(("%s: bo size=%d, expected=%d\n", __FUNCTION__, kgem_bo_size(frame.bo), frame.size)); kgem_bo_destroy(&sna->kgem, frame.bo); return BadAlloc; } frame.image.x1 = 0; frame.image.y1 = 0; frame.image.x2 = frame.width; frame.image.y2 = frame.height; } else { if (!sna_video_copy_data(video, &frame, buf)) { DBG(("%s: failed to copy frame\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, frame.bo); return BadAlloc; } } if (crtc && video->SyncToVblank != 0 && sna_pixmap_is_scanout(sna, pixmap)) { kgem_set_mode(&sna->kgem, KGEM_RENDER, sna_pixmap(pixmap)->gpu_bo); flush = sna_wait_for_scanline(sna, pixmap, crtc, &clip.extents); } ret = Success; if (!sna->render.video(sna, video, &frame, &clip, pixmap)) { DBG(("%s: failed to render video\n", __FUNCTION__)); ret = BadAlloc; } else DamageDamageRegion(draw, &clip); kgem_bo_destroy(&sna->kgem, frame.bo); /* Push the frame to the GPU as soon as possible so * we can hit the next vsync. */ if (flush || sync) kgem_submit(&sna->kgem); RegionUninit(&clip); return ret; } static int sna_video_textured_query(ddQueryImageAttributes_ARGS) { int size, tmp; if (*w > 8192) *w = 8192; if (*h > 8192) *h = 8192; *w = (*w + 1) & ~1; if (offsets) offsets[0] = 0; switch (format->id) { /* IA44 is for XvMC only */ case FOURCC_IA44: case FOURCC_AI44: if (pitches) pitches[0] = *w; size = *w * *h; break; case FOURCC_YV12: case FOURCC_I420: *h = (*h + 1) & ~1; size = (*w + 3) & ~3; if (pitches) pitches[0] = size; size *= *h; if (offsets) offsets[1] = size; tmp = ((*w >> 1) + 3) & ~3; if (pitches) pitches[1] = pitches[2] = tmp; tmp *= (*h >> 1); size += tmp; if (offsets) offsets[2] = size; size += tmp; break; case FOURCC_UYVY: case FOURCC_YUY2: default: size = *w << 1; if (pitches) pitches[0] = size; size *= *h; break; case FOURCC_XVMC: *h = (*h + 1) & ~1; size = sizeof(uint32_t); if (pitches) pitches[0] = size; break; } return size; } void sna_video_textured_setup(struct sna *sna, ScreenPtr screen) { XvAdaptorPtr adaptor; struct sna_video *video; int nports, i; if (!sna->render.video) { xf86DrvMsg(sna->scrn->scrnIndex, X_INFO, "Textured video not supported on this hardware\n"); return; } if (wedged(sna)) { xf86DrvMsg(sna->scrn->scrnIndex, X_WARNING, "cannot enable XVideo whilst the GPU is wedged\n"); return; } adaptor = sna_xv_adaptor_alloc(sna); if (adaptor == NULL) return; nports = 16; if (sna->kgem.gen >= 060) nports = 32; if (sna->kgem.gen >= 0100) nports = 64; video = calloc(nports, sizeof(struct sna_video)); adaptor->pPorts = calloc(nports, sizeof(XvPortRec)); if (video == NULL || adaptor->pPorts == NULL) { free(video); free(adaptor->pPorts); sna->xv.num_adaptors--; return; } adaptor->type = XvInputMask | XvImageMask; adaptor->pScreen = screen; adaptor->name = (char *)"Intel(R) Textured Video"; adaptor->nEncodings = 1; adaptor->pEncodings = xnfalloc(sizeof(XvEncodingRec)); adaptor->pEncodings[0].id = 0; adaptor->pEncodings[0].pScreen = screen; adaptor->pEncodings[0].name = (char *)"XV_IMAGE"; adaptor->pEncodings[0].width = sna->render.max_3d_size; adaptor->pEncodings[0].height = sna->render.max_3d_size; adaptor->pEncodings[0].rate.numerator = 1; adaptor->pEncodings[0].rate.denominator = 1; adaptor->pFormats = Formats; adaptor->nFormats = sna_xv_fixup_formats(screen, Formats, ARRAY_SIZE(Formats)); adaptor->nAttributes = ARRAY_SIZE(Attributes); adaptor->pAttributes = (XvAttributeRec *)Attributes; adaptor->nImages = ARRAY_SIZE(Images); adaptor->pImages = (XvImageRec *)Images; #if XORG_XV_VERSION < 2 adaptor->ddAllocatePort = sna_xv_alloc_port; adaptor->ddFreePort = sna_xv_free_port; #endif adaptor->ddPutVideo = NULL; adaptor->ddPutStill = NULL; adaptor->ddGetVideo = NULL; adaptor->ddGetStill = NULL; adaptor->ddStopVideo = sna_video_textured_stop; adaptor->ddSetPortAttribute = sna_video_textured_set_attribute; adaptor->ddGetPortAttribute = sna_video_textured_get_attribute; adaptor->ddQueryBestSize = sna_video_textured_best_size; adaptor->ddPutImage = sna_video_textured_put_image; adaptor->ddQueryImageAttributes = sna_video_textured_query; for (i = 0; i < nports; i++) { struct sna_video *v = &video[i]; XvPortPtr port = &adaptor->pPorts[i]; v->sna = sna; v->textured = true; v->alignment = 4; v->SyncToVblank = (sna->flags & SNA_NO_WAIT) == 0; RegionNull(&v->clip); port->id = FakeClientID(0); AddResource(port->id, XvGetRTPort(), port); port->pAdaptor = adaptor; port->pNotify = NULL; port->pDraw = NULL; port->client = NULL; port->grab.client = NULL; port->time = currentTime; port->devPriv.ptr = v; } adaptor->base_id = adaptor->pPorts[0].id; adaptor->nPorts = nports; xvBrightness = MAKE_ATOM("XV_BRIGHTNESS"); xvContrast = MAKE_ATOM("XV_CONTRAST"); xvSyncToVblank = MAKE_ATOM("XV_SYNC_TO_VBLANK"); DBG(("%s: '%s' initialized %d ports\n", __FUNCTION__, adaptor->name, adaptor->nPorts)); } xf86-video-intel-2.99.917/src/sna/sna_cpuid.h0000664000175000017500000000415512432737457015440 00000000000000/* * Copyright (c) 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ /* Small wrapper around compiler specific implementation details of cpuid */ #ifndef SNA_CPUID_H #define SNA_CPUID_H #ifdef HAVE_CPUID_H #include #else #define __get_cpuid_max(x, y) 0 #define __cpuid(level, a, b, c, d) a = b = c = d = 0 #define __cpuid_count(level, count, a, b, c, d) a = b = c = d = 0 #endif #define BASIC_CPUID 0x0 #define EXTENDED_CPUID 0x80000000 #ifndef bit_MMX #define bit_MMX (1 << 23) #endif #ifndef bit_SSE #define bit_SSE (1 << 25) #endif #ifndef bit_SSE2 #define bit_SSE2 (1 << 26) #endif #ifndef bit_SSE3 #define bit_SSE3 (1 << 0) #endif #ifndef bit_SSSE3 #define bit_SSSE3 (1 << 9) #endif #ifndef bit_SSE4_1 #define bit_SSE4_1 (1 << 19) #endif #ifndef bit_SSE4_2 #define bit_SSE4_2 (1 << 20) #endif #ifndef bit_OSXSAVE #define bit_OSXSAVE (1 << 27) #endif #ifndef bit_AVX #define bit_AVX (1 << 28) #endif #ifndef bit_AVX2 #define bit_AVX2 (1<<5) #endif #endif /* SNA_CPUID_H */ xf86-video-intel-2.99.917/src/sna/sna_trapezoids_precise.c0000664000175000017500000025525412432737457020235 00000000000000/* * Copyright (c) 2007 David Turner * Copyright (c) 2008 M Joonas Pihlaja * Copyright (c) 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "sna_render_inline.h" #include "sna_trapezoids.h" #include "fb/fbpict.h" #include #undef FAST_SAMPLES_X #undef FAST_SAMPLES_Y /* TODO: Emit unantialiased and MSAA triangles. */ #ifndef MAX #define MAX(x,y) ((x) >= (y) ? (x) : (y)) #endif #ifndef MIN #define MIN(x,y) ((x) <= (y) ? (x) : (y)) #endif #define _GRID_TO_INT_FRAC(t, i, f, m) do { \ (i) = (t) / (m); \ (f) = (t) % (m); \ if ((f) < 0) { \ --(i); \ (f) += (m); \ } \ } while (0) #define GRID_AREA (2*SAMPLES_X*SAMPLES_Y) static inline int pixman_fixed_to_grid_x(pixman_fixed_t v) { return ((int64_t)v * SAMPLES_X + (1<<15)) >> 16; } static inline int pixman_fixed_to_grid_y(pixman_fixed_t v) { return ((int64_t)v * SAMPLES_Y + (1<<15)) >> 16; } typedef void (*span_func_t)(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage); #if HAS_DEBUG_FULL static void _assert_pixmap_contains_box(PixmapPtr pixmap, BoxPtr box, const char *function) { if (box->x1 < 0 || box->y1 < 0 || box->x2 > pixmap->drawable.width || box->y2 > pixmap->drawable.height) { FatalError("%s: damage box is beyond the pixmap: box=(%d, %d), (%d, %d), pixmap=(%d, %d)\n", function, box->x1, box->y1, box->x2, box->y2, pixmap->drawable.width, pixmap->drawable.height); } } #define assert_pixmap_contains_box(p, b) _assert_pixmap_contains_box(p, b, __FUNCTION__) #else #define assert_pixmap_contains_box(p, b) #endif static void apply_damage(struct sna_composite_op *op, RegionPtr region) { DBG(("%s: damage=%p, region=%dx[(%d, %d), (%d, %d)]\n", __FUNCTION__, op->damage, region_num_rects(region), region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); if (op->damage == NULL) return; RegionTranslate(region, op->dst.x, op->dst.y); assert_pixmap_contains_box(op->dst.pixmap, RegionExtents(region)); sna_damage_add(op->damage, region); } static void _apply_damage_box(struct sna_composite_op *op, const BoxRec *box) { BoxRec r; r.x1 = box->x1 + op->dst.x; r.x2 = box->x2 + op->dst.x; r.y1 = box->y1 + op->dst.y; r.y2 = box->y2 + op->dst.y; assert_pixmap_contains_box(op->dst.pixmap, &r); sna_damage_add_box(op->damage, &r); } inline static void apply_damage_box(struct sna_composite_op *op, const BoxRec *box) { if (op->damage) _apply_damage_box(op, box); } #define SAMPLES_X_TO_INT_FRAC(x, i, f) \ _GRID_TO_INT_FRAC(x, i, f, SAMPLES_X) #define AREA_TO_FLOAT(c) ((c) / (float)GRID_AREA) #define TO_ALPHA(c) (((c)+1) >> 1) struct quorem { int64_t quo; int64_t rem; }; struct edge { struct edge *next, *prev; int dir; int height_left; int cell; struct quorem x; /* Advance of the current x when moving down a subsample line. */ struct quorem dxdy; int64_t dy; /* The clipped y of the top of the edge. */ int ytop; /* y2-y1 after orienting the edge downwards. */ }; /* Number of subsample rows per y-bucket. Must be SAMPLES_Y. */ #define EDGE_Y_BUCKET_HEIGHT SAMPLES_Y #define EDGE_Y_BUCKET_INDEX(y, ymin) (((y) - (ymin))/EDGE_Y_BUCKET_HEIGHT) /* A collection of sorted and vertically clipped edges of the polygon. * Edges are moved from the polygon to an active list while scan * converting. */ struct polygon { /* The vertical clip extents. */ int ymin, ymax; /* Array of edges all starting in the same bucket. An edge is put * into bucket EDGE_BUCKET_INDEX(edge->ytop, polygon->ymin) when * it is added to the polygon. */ struct edge **y_buckets; struct edge *y_buckets_embedded[64]; struct edge edges_embedded[32]; struct edge *edges; int num_edges; }; /* A cell records the effect on pixel coverage of polygon edges * passing through a pixel. It contains two accumulators of pixel * coverage. * * Consider the effects of a polygon edge on the coverage of a pixel * it intersects and that of the following one. The coverage of the * following pixel is the height of the edge multiplied by the width * of the pixel, and the coverage of the pixel itself is the area of * the trapezoid formed by the edge and the right side of the pixel. * * +-----------------------+-----------------------+ * | | | * | | | * |_______________________|_______________________| * | \...................|.......................|\ * | \..................|.......................| | * | \.................|.......................| | * | \....covered.....|.......................| | * | \....area.......|.......................| } covered height * | \..............|.......................| | * |uncovered\.............|.......................| | * | area \............|.......................| | * |___________\...........|.......................|/ * | | | * | | | * | | | * +-----------------------+-----------------------+ * * Since the coverage of the following pixel will always be a multiple * of the width of the pixel, we can store the height of the covered * area instead. The coverage of the pixel itself is the total * coverage minus the area of the uncovered area to the left of the * edge. As it's faster to compute the uncovered area we only store * that and subtract it from the total coverage later when forming * spans to blit. * * The heights and areas are signed, with left edges of the polygon * having positive sign and right edges having negative sign. When * two edges intersect they swap their left/rightness so their * contribution above and below the intersection point must be * computed separately. */ struct cell { struct cell *next; int x; int16_t uncovered_area; int16_t covered_height; }; /* A cell list represents the scan line sparsely as cells ordered by * ascending x. It is geared towards scanning the cells in order * using an internal cursor. */ struct cell_list { struct cell *cursor; /* Points to the left-most cell in the scan line. */ struct cell head, tail; int16_t x1, x2; int16_t count, size; struct cell *cells; struct cell embedded[256]; }; /* The active list contains edges in the current scan line ordered by * the x-coordinate of the intercept of the edge and the scan line. */ struct active_list { /* Leftmost edge on the current scan line. */ struct edge head, tail; }; struct tor { struct polygon polygon[1]; struct active_list active[1]; struct cell_list coverages[1]; BoxRec extents; }; /* Rewinds the cell list's cursor to the beginning. After rewinding * we're good to cell_list_find() the cell any x coordinate. */ inline static void cell_list_rewind(struct cell_list *cells) { cells->cursor = &cells->head; } static bool cell_list_init(struct cell_list *cells, int x1, int x2) { cells->tail.next = NULL; cells->tail.x = INT_MAX; cells->head.x = INT_MIN; cells->head.next = &cells->tail; cells->head.covered_height = 0; cell_list_rewind(cells); cells->count = 0; cells->x1 = x1; cells->x2 = x2; cells->size = x2 - x1 + 1; cells->cells = cells->embedded; if (cells->size > ARRAY_SIZE(cells->embedded)) cells->cells = malloc(cells->size * sizeof(struct cell)); return cells->cells != NULL; } static void cell_list_fini(struct cell_list *cells) { if (cells->cells != cells->embedded) free(cells->cells); } inline static void cell_list_reset(struct cell_list *cells) { cell_list_rewind(cells); cells->head.next = &cells->tail; cells->head.covered_height = 0; cells->count = 0; } inline static struct cell * cell_list_alloc(struct cell_list *cells, struct cell *tail, int x) { struct cell *cell; assert(cells->count < cells->size); cell = cells->cells + cells->count++; cell->next = tail->next; tail->next = cell; cell->x = x; cell->covered_height = 0; cell->uncovered_area = 0; return cell; } /* Find a cell at the given x-coordinate. Returns %NULL if a new cell * needed to be allocated but couldn't be. Cells must be found with * non-decreasing x-coordinate until the cell list is rewound using * cell_list_rewind(). Ownership of the returned cell is retained by * the cell list. */ inline static struct cell * cell_list_find(struct cell_list *cells, int x) { struct cell *tail; if (x >= cells->x2) return &cells->tail; if (x < cells->x1) return &cells->head; tail = cells->cursor; if (tail->x == x) return tail; do { if (tail->next->x > x) break; tail = tail->next; if (tail->next->x > x) break; tail = tail->next; if (tail->next->x > x) break; tail = tail->next; } while (1); if (tail->x != x) tail = cell_list_alloc(cells, tail, x); return cells->cursor = tail; } /* Add a subpixel span covering [x1, x2) to the coverage cells. */ inline static void cell_list_add_subspan(struct cell_list *cells, int x1, int x2) { struct cell *cell; int ix1, fx1; int ix2, fx2; if (x1 == x2) return; SAMPLES_X_TO_INT_FRAC(x1, ix1, fx1); SAMPLES_X_TO_INT_FRAC(x2, ix2, fx2); __DBG(("%s: x1=%d (%d+%d), x2=%d (%d+%d)\n", __FUNCTION__, x1, ix1, fx1, x2, ix2, fx2)); cell = cell_list_find(cells, ix1); if (ix1 != ix2) { cell->uncovered_area += 2*fx1; ++cell->covered_height; cell = cell_list_find(cells, ix2); cell->uncovered_area -= 2*fx2; --cell->covered_height; } else cell->uncovered_area += 2*(fx1-fx2); } inline static void cell_list_add_span(struct cell_list *cells, int x1, int x2) { struct cell *cell; int ix1, fx1; int ix2, fx2; SAMPLES_X_TO_INT_FRAC(x1, ix1, fx1); SAMPLES_X_TO_INT_FRAC(x2, ix2, fx2); __DBG(("%s: x1=%d (%d+%d), x2=%d (%d+%d)\n", __FUNCTION__, x1, ix1, fx1, x2, ix2, fx2)); cell = cell_list_find(cells, ix1); if (ix1 != ix2) { cell->uncovered_area += 2*fx1*SAMPLES_Y; cell->covered_height += SAMPLES_Y; cell = cell_list_find(cells, ix2); cell->uncovered_area -= 2*fx2*SAMPLES_Y; cell->covered_height -= SAMPLES_Y; } else cell->uncovered_area += 2*(fx1-fx2)*SAMPLES_Y; } static void polygon_fini(struct polygon *polygon) { if (polygon->y_buckets != polygon->y_buckets_embedded) free(polygon->y_buckets); if (polygon->edges != polygon->edges_embedded) free(polygon->edges); } static bool polygon_init(struct polygon *polygon, int num_edges, int ymin, int ymax) { unsigned num_buckets = EDGE_Y_BUCKET_INDEX(ymax-1, ymin) + 1; if (unlikely(ymax - ymin > 0x7FFFFFFFU - EDGE_Y_BUCKET_HEIGHT)) return false; polygon->edges = polygon->edges_embedded; polygon->y_buckets = polygon->y_buckets_embedded; polygon->num_edges = 0; if (num_edges > (int)ARRAY_SIZE(polygon->edges_embedded)) { polygon->edges = malloc(sizeof(struct edge)*num_edges); if (unlikely(NULL == polygon->edges)) goto bail_no_mem; } if (num_buckets >= ARRAY_SIZE(polygon->y_buckets_embedded)) { polygon->y_buckets = malloc((1+num_buckets)*sizeof(struct edge *)); if (unlikely(NULL == polygon->y_buckets)) goto bail_no_mem; } memset(polygon->y_buckets, 0, num_buckets * sizeof(struct edge *)); polygon->y_buckets[num_buckets] = (void *)-1; polygon->ymin = ymin; polygon->ymax = ymax; return true; bail_no_mem: polygon_fini(polygon); return false; } static void _polygon_insert_edge_into_its_y_bucket(struct polygon *polygon, struct edge *e) { unsigned ix = EDGE_Y_BUCKET_INDEX(e->ytop, polygon->ymin); struct edge **ptail = &polygon->y_buckets[ix]; assert(e->ytop < polygon->ymax); e->next = *ptail; *ptail = e; } static inline int edge_to_cell(struct edge *e) { int x = e->x.quo; if (e->x.rem > e->dy/2) x++; __DBG(("%s: %lld.%lld -> %d\n", __FUNCTION__, e->x.quo, e->x.rem, x)); return x; } static inline int edge_advance(struct edge *e) { __DBG(("%s: %lld.%lld + %lld.%lld\n", __FUNCTION__, e->x.quo, e->x.rem, e->dxdy.quo, e->dxdy.rem)); e->x.quo += e->dxdy.quo; e->x.rem += e->dxdy.rem; if (e->x.rem < 0) { e->x.quo--; e->x.rem += e->dy; } else if (e->x.rem >= e->dy) { e->x.quo++; e->x.rem -= e->dy; } assert(e->x.rem >= 0 && e->x.rem < e->dy); return edge_to_cell(e); } inline static void polygon_add_edge(struct polygon *polygon, const xTrapezoid *t, const xLineFixed *edge, int dir, int dx, int dy) { struct edge *e = &polygon->edges[polygon->num_edges]; const int ymin = polygon->ymin; const int ymax = polygon->ymax; int ytop, ybot; assert(t->bottom > t->top); assert(edge->p2.y > edge->p1.y); ytop = pixman_fixed_to_grid_y(t->top) + dy; if (ytop < ymin) ytop = ymin; ybot = pixman_fixed_to_grid_y(t->bottom) + dy; if (ybot > ymax) ybot = ymax; __DBG(("%s: dx=(%d, %d), y=[%d, %d] +%d, -%d\n", __FUNCTION__, dx, dy, ytop, ybot, ((int64_t)(ytop - dy)<<16) / SAMPLES_Y - edge->p1.y, ((int64_t)(ybot - dy)<<16) / SAMPLES_Y - edge->p2.y)); e->ytop = ytop; e->height_left = ybot - ytop; if (e->height_left <= 0) return; if (pixman_fixed_to_grid_x(edge->p1.x) == pixman_fixed_to_grid_x(edge->p2.x)) { e->cell = pixman_fixed_to_grid_x(edge->p1.x) + dx; e->x.quo = e->x.rem = 0; e->dxdy.quo = e->dxdy.rem = 0; e->dy = 0; } else { int64_t Ey, Ex, tmp; __DBG(("%s: add diagonal edge (%d, %d) -> (%d, %d) [(%d, %d)]\n", __FUNCTION__, edge->p1.x, edge->p1.y, edge->p2.x, edge->p2.y, edge->p2.x - edge->p1.x, edge->p2.y - edge->p1.y)); Ex = ((int64_t)edge->p2.x - edge->p1.x) * SAMPLES_X; Ey = ((int64_t)edge->p2.y - edge->p1.y) * SAMPLES_Y * (2 << 16); assert(Ey > 0); e->dxdy.quo = Ex * (2 << 16) / Ey; e->dxdy.rem = Ex * (2 << 16) % Ey; tmp = (int64_t)(2*(ytop - dy) + 1) << 16; tmp -= (int64_t)edge->p1.y * SAMPLES_Y*2; tmp *= Ex; e->x.quo = tmp / Ey; e->x.rem = tmp % Ey; tmp = (int64_t)edge->p1.x * SAMPLES_X; e->x.quo += (tmp >> 16) + dx; tmp &= (1 << 16) - 1; if (tmp) { if (Ey < INT64_MAX >> 16) tmp = (tmp * Ey) / (1 << 16); else /* Handle overflow by losing precision */ tmp = tmp * (Ey / (1 << 16)); e->x.rem += tmp; } if (e->x.rem < 0) { e->x.quo--; e->x.rem += Ey; } else if (e->x.rem >= Ey) { e->x.quo++; e->x.rem -= Ey; } assert(e->x.rem >= 0 && e->x.rem < Ey); e->dy = Ey; e->cell = edge_to_cell(e); __DBG(("%s: x=%lld.%lld + %lld.%lld %lld -> cell=%d\n", __FUNCTION__, (long long)e->x.quo, (long long)e->x.rem, (long long)e->dxdy.quo, (long long)e->dxdy.rem, (long long)Ey, e->cell)); } e->dir = dir; _polygon_insert_edge_into_its_y_bucket(polygon, e); polygon->num_edges++; } inline static void polygon_add_line(struct polygon *polygon, const xPointFixed *p1, const xPointFixed *p2, int dx, int dy) { struct edge *e = &polygon->edges[polygon->num_edges]; int ytop, ybot; if (p1->y == p2->y) return; __DBG(("%s: line=(%d, %d), (%d, %d)\n", __FUNCTION__, (int)p1->x, (int)p1->y, (int)p2->x, (int)p2->y)); e->dir = 1; if (p2->y < p1->y) { const xPointFixed *t; e->dir = -1; t = p1; p1 = p2; p2 = t; } ytop = pixman_fixed_to_grid_y(p1->y) + dy; if (ytop < polygon->ymin) ytop = polygon->ymin; ybot = pixman_fixed_to_grid_y(p2->y) + dy; if (ybot > polygon->ymax) ybot = polygon->ymax; if (ybot <= ytop) return; e->ytop = ytop; e->height_left = ybot - ytop; if (e->height_left <= 0) return; __DBG(("%s: edge height=%d\n", __FUNCTION__, e->dir * e->height_left)); if (pixman_fixed_to_grid_x(p1->x) == pixman_fixed_to_grid_x(p2->x)) { e->cell = pixman_fixed_to_grid_x(p1->x); e->x.quo = e->x.rem = 0; e->dxdy.quo = e->dxdy.rem = 0; e->dy = 0; } else { int64_t Ey, Ex, tmp; __DBG(("%s: add diagonal line (%d, %d) -> (%d, %d) [(%d, %d)]\n", __FUNCTION__, p1->x, p1->y, p2->x, p2->y, p2->x - p1->x, p2->y - p1->y)); Ex = ((int64_t)p2->x - p1->x) * SAMPLES_X; Ey = ((int64_t)p2->y - p1->y) * SAMPLES_Y * (2 << 16); e->dxdy.quo = Ex * (2 << 16) / Ey; e->dxdy.rem = Ex * (2 << 16) % Ey; tmp = (int64_t)(2*(ytop - dy) + 1) << 16; tmp -= (int64_t)p1->y * SAMPLES_Y*2; tmp *= Ex; e->x.quo = tmp / Ey; e->x.rem = tmp % Ey; tmp = (int64_t)p1->x * SAMPLES_X; e->x.quo += (tmp >> 16) + dx; e->x.rem += ((tmp & ((1 << 16) - 1)) * Ey) / (1 << 16); if (e->x.rem < 0) { e->x.quo--; e->x.rem += Ey; } else if (e->x.rem >= Ey) { e->x.quo++; e->x.rem -= Ey; } assert(e->x.rem >= 0 && e->x.rem < Ey); e->dy = Ey; e->cell = edge_to_cell(e); __DBG(("%s: x=%lld.%lld + %lld.%lld %lld -> cell=%d\n", __FUNCTION__, (long long)e->x.quo, (long long)e->x.rem, (long long)e->dxdy.quo, (long long)e->dxdy.rem, (long long)Ey, e->cell)); } if (polygon->num_edges > 0) { struct edge *prev = &polygon->edges[polygon->num_edges-1]; /* detect degenerate triangles inserted into tristrips */ if (e->dir == -prev->dir && e->ytop == prev->ytop && e->height_left == prev->height_left && e->cell == prev->cell && e->x.quo == prev->x.quo && e->x.rem == prev->x.rem && e->dxdy.quo == prev->dxdy.quo && e->dxdy.rem == prev->dxdy.rem) { unsigned ix = EDGE_Y_BUCKET_INDEX(e->ytop, polygon->ymin); polygon->y_buckets[ix] = prev->next; polygon->num_edges--; return; } } _polygon_insert_edge_into_its_y_bucket(polygon, e); polygon->num_edges++; } static void active_list_reset(struct active_list *active) { active->head.height_left = INT_MAX; active->head.x.quo = INT_MIN; active->head.cell = INT_MIN; active->head.dy = 0; active->head.prev = NULL; active->head.next = &active->tail; active->tail.prev = &active->head; active->tail.next = NULL; active->tail.x.quo = INT_MAX; active->tail.cell = INT_MAX; active->tail.height_left = INT_MAX; active->tail.dy = 0; } static struct edge * merge_sorted_edges(struct edge *head_a, struct edge *head_b) { struct edge *head, **next, *prev; int32_t x; if (head_b == NULL) return head_a; prev = head_a->prev; next = &head; if (head_a->cell <= head_b->cell) { head = head_a; } else { head = head_b; head_b->prev = prev; goto start_with_b; } do { x = head_b->cell; while (head_a != NULL && head_a->cell <= x) { prev = head_a; next = &head_a->next; head_a = head_a->next; } head_b->prev = prev; *next = head_b; if (head_a == NULL) return head; start_with_b: x = head_a->cell; while (head_b != NULL && head_b->cell <= x) { prev = head_b; next = &head_b->next; head_b = head_b->next; } head_a->prev = prev; *next = head_a; if (head_b == NULL) return head; } while (1); } static struct edge * sort_edges(struct edge *list, unsigned int level, struct edge **head_out) { struct edge *head_other, *remaining; unsigned int i; head_other = list->next; if (head_other == NULL) { *head_out = list; return NULL; } remaining = head_other->next; if (list->cell <= head_other->cell) { *head_out = list; head_other->next = NULL; } else { *head_out = head_other; head_other->prev = list->prev; head_other->next = list; list->prev = head_other; list->next = NULL; } for (i = 0; i < level && remaining; i++) { remaining = sort_edges(remaining, i, &head_other); *head_out = merge_sorted_edges(*head_out, head_other); } return remaining; } static struct edge *filter(struct edge *edges) { struct edge *e; e = edges; while (e->next) { struct edge *n = e->next; if (e->dir == -n->dir && e->height_left == n->height_left && e->cell == n->cell && e->x.quo == n->x.quo && e->x.rem == n->x.rem && e->dxdy.quo == n->dxdy.quo && e->dxdy.rem == n->dxdy.rem) { if (e->prev) e->prev->next = n->next; else edges = n->next; if (n->next) n->next->prev = e->prev; else break; e = n->next; } else e = n; } return edges; } static struct edge * merge_unsorted_edges(struct edge *head, struct edge *unsorted) { sort_edges(unsorted, UINT_MAX, &unsorted); return merge_sorted_edges(head, filter(unsorted)); } /* Test if the edges on the active list can be safely advanced by a * full row without intersections or any edges ending. */ inline static int can_full_step(struct active_list *active) { const struct edge *e; int min_height = INT_MAX; assert(active->head.next != &active->tail); for (e = active->head.next; &active->tail != e; e = e->next) { assert(e->height_left > 0); if (e->dy != 0) return 0; if (e->height_left < min_height) { min_height = e->height_left; if (min_height < SAMPLES_Y) return 0; } } return min_height; } inline static void merge_edges(struct active_list *active, struct edge *edges) { active->head.next = merge_unsorted_edges(active->head.next, edges); } inline static void fill_buckets(struct active_list *active, struct edge *edge, int ymin, struct edge **buckets) { while (edge) { struct edge *next = edge->next; struct edge **b = &buckets[edge->ytop - ymin]; if (*b) (*b)->prev = edge; edge->next = *b; edge->prev = NULL; *b = edge; edge = next; } } inline static void nonzero_subrow(struct active_list *active, struct cell_list *coverages) { struct edge *edge = active->head.next; int prev_x = INT_MIN; int winding = 0, xstart = edge->cell; cell_list_rewind(coverages); while (&active->tail != edge) { struct edge *next = edge->next; winding += edge->dir; if (0 == winding && edge->next->cell != edge->cell) { cell_list_add_subspan(coverages, xstart, edge->cell); xstart = edge->next->cell; } assert(edge->height_left > 0); if (--edge->height_left) { if (edge->dy) edge->cell = edge_advance(edge); if (edge->cell < prev_x) { struct edge *pos = edge->prev; pos->next = next; next->prev = pos; do { pos = pos->prev; } while (edge->cell < pos->cell); pos->next->prev = edge; edge->next = pos->next; edge->prev = pos; pos->next = edge; } else prev_x = edge->cell; } else { edge->prev->next = next; next->prev = edge->prev; } edge = next; } } static void nonzero_row(struct active_list *active, struct cell_list *coverages) { struct edge *left = active->head.next; while (&active->tail != left) { struct edge *right; int winding = left->dir; left->height_left -= SAMPLES_Y; assert(left->height_left >= 0); if (!left->height_left) { left->prev->next = left->next; left->next->prev = left->prev; } right = left->next; do { right->height_left -= SAMPLES_Y; assert(right->height_left >= 0); if (!right->height_left) { right->prev->next = right->next; right->next->prev = right->prev; } winding += right->dir; if (0 == winding) break; right = right->next; } while (1); cell_list_add_span(coverages, left->cell, right->cell); left = right->next; } } static void tor_fini(struct tor *converter) { polygon_fini(converter->polygon); cell_list_fini(converter->coverages); } static bool tor_init(struct tor *converter, const BoxRec *box, int num_edges) { __DBG(("%s: (%d, %d),(%d, %d) x (%d, %d), num_edges=%d\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2, SAMPLES_X, SAMPLES_Y, num_edges)); converter->extents = *box; if (!cell_list_init(converter->coverages, box->x1, box->x2)) return false; active_list_reset(converter->active); if (!polygon_init(converter->polygon, num_edges, (int)box->y1 * SAMPLES_Y, (int)box->y2 * SAMPLES_Y)) { cell_list_fini(converter->coverages); return false; } return true; } static void tor_add_trapezoid(struct tor *tor, const xTrapezoid *t, int dx, int dy) { polygon_add_edge(tor->polygon, t, &t->left, 1, dx, dy); polygon_add_edge(tor->polygon, t, &t->right, -1, dx, dy); } static void step_edges(struct active_list *active, int count) { struct edge *edge; count *= SAMPLES_Y; for (edge = active->head.next; edge != &active->tail; edge = edge->next) { edge->height_left -= count; assert(edge->height_left >= 0); if (!edge->height_left) { edge->prev->next = edge->next; edge->next->prev = edge->prev; } } } static void tor_blt_span(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { __DBG(("%s: %d -> %d @ %d\n", __FUNCTION__, box->x1, box->x2, coverage)); op->box(sna, op, box, AREA_TO_FLOAT(coverage)); apply_damage_box(&op->base, box); } static void tor_blt_span__no_damage(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { __DBG(("%s: %d -> %d @ %d\n", __FUNCTION__, box->x1, box->x2, coverage)); op->box(sna, op, box, AREA_TO_FLOAT(coverage)); } static void tor_blt_span_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; float opacity; opacity = AREA_TO_FLOAT(coverage); __DBG(("%s: %d -> %d @ %f\n", __FUNCTION__, box->x1, box->x2, opacity)); pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); if (region_num_rects(®ion)) { op->boxes(sna, op, region_rects(®ion), region_num_rects(®ion), opacity); apply_damage(&op->base, ®ion); } pixman_region_fini(®ion); } static void tor_blt(struct sna *sna, struct tor *converter, struct sna_composite_spans_op *op, pixman_region16_t *clip, void (*span)(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage), int y, int height, int unbounded) { struct cell_list *cells = converter->coverages; struct cell *cell; BoxRec box; int cover; box.y1 = y + converter->extents.y1; box.y2 = box.y1 + height; assert(box.y2 <= converter->extents.y2); box.x1 = converter->extents.x1; /* Form the spans from the coverages and areas. */ cover = cells->head.covered_height*SAMPLES_X*2; assert(cover >= 0); for (cell = cells->head.next; cell != &cells->tail; cell = cell->next) { int x = cell->x; assert(x >= converter->extents.x1); assert(x < converter->extents.x2); __DBG(("%s: cell=(%d, %d, %d), cover=%d\n", __FUNCTION__, cell->x, cell->covered_height, cell->uncovered_area, cover)); if (cell->covered_height || cell->uncovered_area) { box.x2 = x; if (box.x2 > box.x1 && (unbounded || cover)) { __DBG(("%s: end span (%d, %d)x(%d, %d) @ %d\n", __FUNCTION__, box.x1, box.y1, box.x2 - box.x1, box.y2 - box.y1, cover)); span(sna, op, clip, &box, cover); } box.x1 = box.x2; cover += cell->covered_height*SAMPLES_X*2; } if (cell->uncovered_area) { int area = cover - cell->uncovered_area; box.x2 = x + 1; if (unbounded || area) { __DBG(("%s: new span (%d, %d)x(%d, %d) @ %d\n", __FUNCTION__, box.x1, box.y1, box.x2 - box.x1, box.y2 - box.y1, area)); span(sna, op, clip, &box, area); } box.x1 = box.x2; } } box.x2 = converter->extents.x2; if (box.x2 > box.x1 && (unbounded || cover)) { __DBG(("%s: span (%d, %d)x(%d, %d) @ %d\n", __FUNCTION__, box.x1, box.y1, box.x2 - box.x1, box.y2 - box.y1, cover)); span(sna, op, clip, &box, cover); } } flatten static void tor_render(struct sna *sna, struct tor *converter, struct sna_composite_spans_op *op, pixman_region16_t *clip, void (*span)(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage), int unbounded) { struct polygon *polygon = converter->polygon; struct cell_list *coverages = converter->coverages; struct active_list *active = converter->active; struct edge *buckets[SAMPLES_Y] = { 0 }; int16_t i, j, h = converter->extents.y2 - converter->extents.y1; __DBG(("%s: unbounded=%d\n", __FUNCTION__, unbounded)); /* Render each pixel row. */ for (i = 0; i < h; i = j) { int do_full_step = 0; j = i + 1; /* Determine if we can ignore this row or use the full pixel * stepper. */ if (polygon->y_buckets[i] == NULL) { if (active->head.next == &active->tail) { for (; polygon->y_buckets[j] == NULL; j++) ; __DBG(("%s: no new edges and no exisiting edges, skipping, %d -> %d\n", __FUNCTION__, i, j)); assert(j <= h); if (unbounded) { BoxRec box; box = converter->extents; box.y1 += i; box.y2 = converter->extents.y1 + j; span(sna, op, clip, &box, 0); } continue; } do_full_step = can_full_step(active); } __DBG(("%s: y=%d, do_full_step=%d, new edges=%d\n", __FUNCTION__, i, do_full_step, polygon->y_buckets[i] != NULL)); if (do_full_step) { nonzero_row(active, coverages); while (polygon->y_buckets[j] == NULL && do_full_step >= 2*SAMPLES_Y) { do_full_step -= SAMPLES_Y; j++; } assert(j >= i + 1 && j <= h); if (j != i + 1) step_edges(active, j - (i + 1)); __DBG(("%s: vertical edges, full step (%d, %d)\n", __FUNCTION__, i, j)); } else { int suby; fill_buckets(active, polygon->y_buckets[i], (i+converter->extents.y1)*SAMPLES_Y, buckets); /* Subsample this row. */ for (suby = 0; suby < SAMPLES_Y; suby++) { if (buckets[suby]) { merge_edges(active, buckets[suby]); buckets[suby] = NULL; } nonzero_subrow(active, coverages); } } assert(j > i); tor_blt(sna, converter, op, clip, span, i, j-i, unbounded); cell_list_reset(coverages); } } static void inplace_row(struct active_list *active, uint8_t *row, int width) { struct edge *left = active->head.next; while (&active->tail != left) { struct edge *right; int winding = left->dir; int lfx, rfx; int lix, rix; left->height_left -= SAMPLES_Y; assert(left->height_left >= 0); if (!left->height_left) { left->prev->next = left->next; left->next->prev = left->prev; } right = left->next; do { right->height_left -= SAMPLES_Y; assert(right->height_left >= 0); if (!right->height_left) { right->prev->next = right->next; right->next->prev = right->prev; } winding += right->dir; if (0 == winding && right->cell != right->next->cell) break; right = right->next; } while (1); if (left->cell < 0) { lix = lfx = 0; } else if (left->cell >= width * SAMPLES_X) { lix = width; lfx = 0; } else SAMPLES_X_TO_INT_FRAC(left->cell, lix, lfx); if (right->cell < 0) { rix = rfx = 0; } else if (right->cell >= width * SAMPLES_X) { rix = width; rfx = 0; } else SAMPLES_X_TO_INT_FRAC(right->cell, rix, rfx); if (lix == rix) { if (rfx != lfx) { assert(lix < width); row[lix] += (rfx-lfx) * SAMPLES_Y; } } else { assert(lix < width); if (lfx == 0) row[lix] = 0xff; else row[lix] += 255 - lfx * SAMPLES_Y; assert(rix <= width); if (rfx) { assert(rix < width); row[rix] += rfx * SAMPLES_Y; } if (rix > ++lix) { uint8_t *r = row + lix; rix -= lix; #if 0 if (rix == 1) *row = 0xff; else memset(row, 0xff, rix); #else if ((uintptr_t)r & 1 && rix) { *r++ = 0xff; rix--; } if ((uintptr_t)r & 2 && rix >= 2) { *(uint16_t *)r = 0xffff; r += 2; rix -= 2; } if ((uintptr_t)r & 4 && rix >= 4) { *(uint32_t *)r = 0xffffffff; r += 4; rix -= 4; } while (rix >= 8) { *(uint64_t *)r = 0xffffffffffffffff; r += 8; rix -= 8; } if (rix & 4) { *(uint32_t *)r = 0xffffffff; r += 4; } if (rix & 2) { *(uint16_t *)r = 0xffff; r += 2; } if (rix & 1) *r = 0xff; #endif } } left = right->next; } } inline static void inplace_subrow(struct active_list *active, int8_t *row, int width) { struct edge *edge = active->head.next; int prev_x = INT_MIN; while (&active->tail != edge) { struct edge *next = edge->next; int winding = edge->dir; int lfx, rfx; int lix, rix; if (edge->cell < 0) { lix = lfx = 0; } else if (edge->cell >= width * SAMPLES_X) { lix = width; lfx = 0; } else SAMPLES_X_TO_INT_FRAC(edge->cell, lix, lfx); assert(edge->height_left > 0); if (--edge->height_left) { if (edge->dy) edge->cell = edge_advance(edge); if (edge->cell < prev_x) { struct edge *pos = edge->prev; pos->next = next; next->prev = pos; do { pos = pos->prev; } while (edge->cell < pos->cell); pos->next->prev = edge; edge->next = pos->next; edge->prev = pos; pos->next = edge; } else prev_x = edge->cell; } else { edge->prev->next = next; next->prev = edge->prev; } edge = next; do { next = edge->next; winding += edge->dir; if (0 == winding && edge->cell != next->cell) break; assert(edge->height_left > 0); if (--edge->height_left) { if (edge->dy) edge->cell = edge_advance(edge); if (edge->cell < prev_x) { struct edge *pos = edge->prev; pos->next = next; next->prev = pos; do { pos = pos->prev; } while (edge->cell < pos->cell); pos->next->prev = edge; edge->next = pos->next; edge->prev = pos; pos->next = edge; } else prev_x = edge->cell; } else { edge->prev->next = next; next->prev = edge->prev; } edge = next; } while (1); if (edge->cell < 0) { rix = rfx = 0; } else if (edge->cell >= width * SAMPLES_X) { rix = width; rfx = 0; } else SAMPLES_X_TO_INT_FRAC(edge->cell, rix, rfx); assert(edge->height_left > 0); if (--edge->height_left) { if (edge->dy) edge->cell = edge_advance(edge); if (edge->cell < prev_x) { struct edge *pos = edge->prev; pos->next = next; next->prev = pos; do { pos = pos->prev; } while (edge->cell < pos->cell); pos->next->prev = edge; edge->next = pos->next; edge->prev = pos; pos->next = edge; } else prev_x = edge->cell; } else { edge->prev->next = next; next->prev = edge->prev; } edge = next; __DBG(("%s: left=%d.%d, right=%d.%d\n", __FUNCTION__, lix, lfx, rix, rfx)); if (lix == rix) { if (rfx != lfx) { assert(lix < width); row[lix] += (rfx-lfx); } } else { assert(lix < width); row[lix] += SAMPLES_X - lfx; assert(rix <= width); if (rfx) { assert(rix < width); row[rix] += rfx; } while (++lix < rix) row[lix] += SAMPLES_X; } } } flatten static void tor_inplace(struct tor *converter, PixmapPtr scratch) { uint8_t buf[TOR_INPLACE_SIZE]; int i, j, h = converter->extents.y2 - converter->extents.y1; struct polygon *polygon = converter->polygon; struct active_list *active = converter->active; struct edge *buckets[SAMPLES_Y] = { 0 }; uint8_t *row = scratch->devPrivate.ptr; int stride = scratch->devKind; int width = scratch->drawable.width; __DBG(("%s: buf?=%d\n", __FUNCTION__, buf != NULL)); assert(converter->extents.x1 == 0); assert(scratch->drawable.depth == 8); row += converter->extents.y1 * stride; /* Render each pixel row. */ for (i = 0; i < h; i = j) { int do_full_step = 0; void *ptr = scratch->usage_hint ? buf : row; j = i + 1; /* Determine if we can ignore this row or use the full pixel * stepper. */ if (!polygon->y_buckets[i]) { if (active->head.next == &active->tail) { for (; !polygon->y_buckets[j]; j++) ; __DBG(("%s: no new edges and no exisiting edges, skipping, %d -> %d\n", __FUNCTION__, i, j)); memset(row, 0, stride*(j-i)); row += stride*(j-i); continue; } do_full_step = can_full_step(active); } __DBG(("%s: y=%d, do_full_step=%d, new edges=%d\n", __FUNCTION__, i, do_full_step, polygon->y_buckets[i] != NULL)); if (do_full_step) { memset(ptr, 0, width); inplace_row(active, ptr, width); if (row != ptr) memcpy(row, ptr, width); while (polygon->y_buckets[j] == NULL && do_full_step >= 2*SAMPLES_Y) { do_full_step -= SAMPLES_Y; row += stride; memcpy(row, ptr, width); j++; } if (j != i + 1) step_edges(active, j - (i + 1)); __DBG(("%s: vertical edges, full step (%d, %d)\n", __FUNCTION__, i, j)); } else { int suby; fill_buckets(active, polygon->y_buckets[i], (i+converter->extents.y1)*SAMPLES_Y, buckets); /* Subsample this row. */ memset(ptr, 0, width); for (suby = 0; suby < SAMPLES_Y; suby++) { if (buckets[suby]) { merge_edges(active, buckets[suby]); buckets[suby] = NULL; } inplace_subrow(active, ptr, width); } if (row != ptr) memcpy(row, ptr, width); } row += stride; } } static int operator_is_bounded(uint8_t op) { switch (op) { case PictOpOver: case PictOpOutReverse: case PictOpAdd: return true; default: return false; } } static span_func_t choose_span(struct sna_composite_spans_op *tmp, PicturePtr dst, PictFormatPtr maskFormat, RegionPtr clip) { span_func_t span; assert(!is_mono(dst, maskFormat)); if (clip->data) span = tor_blt_span_clipped; else if (tmp->base.damage == NULL) span = tor_blt_span__no_damage; else span = tor_blt_span; return span; } struct span_thread { struct sna *sna; const struct sna_composite_spans_op *op; const xTrapezoid *traps; RegionPtr clip; span_func_t span; BoxRec extents; int dx, dy, draw_y; int ntrap; bool unbounded; }; #define SPAN_THREAD_MAX_BOXES (8192/sizeof(struct sna_opacity_box)) struct span_thread_boxes { const struct sna_composite_spans_op *op; int num_boxes; struct sna_opacity_box boxes[SPAN_THREAD_MAX_BOXES]; }; static void span_thread_add_boxes(struct sna *sna, void *data, const BoxRec *box, int count, float alpha) { struct span_thread_boxes *b = data; __DBG(("%s: adding %d boxes with alpha=%f\n", __FUNCTION__, count, alpha)); assert(count > 0 && count <= SPAN_THREAD_MAX_BOXES); if (unlikely(b->num_boxes + count > SPAN_THREAD_MAX_BOXES)) { DBG(("%s: flushing %d boxes, adding %d\n", __FUNCTION__, b->num_boxes, count)); assert(b->num_boxes <= SPAN_THREAD_MAX_BOXES); b->op->thread_boxes(sna, b->op, b->boxes, b->num_boxes); b->num_boxes = 0; } do { b->boxes[b->num_boxes].box = *box++; b->boxes[b->num_boxes].alpha = alpha; b->num_boxes++; } while (--count); assert(b->num_boxes <= SPAN_THREAD_MAX_BOXES); } static void span_thread_box(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { __DBG(("%s: %d -> %d @ %d\n", __FUNCTION__, box->x1, box->x2, coverage)); span_thread_add_boxes(sna, op, box, 1, AREA_TO_FLOAT(coverage)); } static void span_thread_clipped_box(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; __DBG(("%s: %d -> %d @ %f\n", __FUNCTION__, box->x1, box->x2, AREA_TO_FLOAT(coverage))); pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); if (region_num_rects(®ion)) { span_thread_add_boxes(sna, op, region_rects(®ion), region_num_rects(®ion), AREA_TO_FLOAT(coverage)); } pixman_region_fini(®ion); } static span_func_t thread_choose_span(struct sna_composite_spans_op *tmp, PicturePtr dst, PictFormatPtr maskFormat, RegionPtr clip) { span_func_t span; if (tmp->base.damage) { DBG(("%s: damaged -> no thread support\n", __FUNCTION__)); return NULL; } assert(!is_mono(dst, maskFormat)); assert(tmp->thread_boxes); DBG(("%s: clipped? %d\n", __FUNCTION__, clip->data != NULL)); if (clip->data) span = span_thread_clipped_box; else span = span_thread_box; return span; } static void span_thread(void *arg) { struct span_thread *thread = arg; struct span_thread_boxes boxes; struct tor tor; const xTrapezoid *t; int n, y1, y2; if (!tor_init(&tor, &thread->extents, 2*thread->ntrap)) return; boxes.op = thread->op; boxes.num_boxes = 0; y1 = thread->extents.y1 - thread->draw_y; y2 = thread->extents.y2 - thread->draw_y; for (n = thread->ntrap, t = thread->traps; n--; t++) { if (pixman_fixed_integer_floor(t->top) >= y2 || pixman_fixed_integer_ceil(t->bottom) <= y1) continue; tor_add_trapezoid(&tor, t, thread->dx, thread->dy); } tor_render(thread->sna, &tor, (struct sna_composite_spans_op *)&boxes, thread->clip, thread->span, thread->unbounded); tor_fini(&tor); if (boxes.num_boxes) { DBG(("%s: flushing %d boxes\n", __FUNCTION__, boxes.num_boxes)); assert(boxes.num_boxes <= SPAN_THREAD_MAX_BOXES); thread->op->thread_boxes(thread->sna, thread->op, boxes.boxes, boxes.num_boxes); } } bool precise_trapezoid_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned int flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps) { struct sna_composite_spans_op tmp; pixman_region16_t clip; int16_t dst_x, dst_y; bool was_clear; int dx, dy, n; int num_threads; if (NO_PRECISE) return false; if (!sna->render.check_composite_spans(sna, op, src, dst, 0, 0, flags)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } if (!trapezoids_bounds(ntrap, traps, &clip.extents)) return true; #if 1 if (((clip.extents.y2 - clip.extents.y1) | (clip.extents.x2 - clip.extents.x1)) < 32) { DBG(("%s: fallback -- traps extents too small %dx%d\n", __FUNCTION__, clip.extents.y2 - clip.extents.y1, clip.extents.x2 - clip.extents.x1)); return false; } #endif DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2)); trapezoid_origin(&traps[0].left, &dst_x, &dst_y); if (!sna_compute_composite_region(&clip, src, NULL, dst, src_x + clip.extents.x1 - dst_x, src_y + clip.extents.y1 - dst_y, 0, 0, clip.extents.x1, clip.extents.y1, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1)) { DBG(("%s: trapezoids do not intersect drawable clips\n", __FUNCTION__)) ; return true; } if (!sna->render.check_composite_spans(sna, op, src, dst, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1, flags)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } dx = dst->pDrawable->x; dy = dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d) src -> (%d, %d)\n", __FUNCTION__, clip.extents.x1, clip.extents.y1, clip.extents.x2, clip.extents.y2, dx, dy, src_x + clip.extents.x1 - dst_x - dx, src_y + clip.extents.y1 - dst_y - dy)); was_clear = sna_drawable_is_clear(dst->pDrawable); switch (op) { case PictOpAdd: case PictOpOver: if (was_clear) op = PictOpSrc; break; case PictOpIn: if (was_clear) return true; break; } if (!sna->render.composite_spans(sna, op, src, dst, src_x + clip.extents.x1 - dst_x - dx, src_y + clip.extents.y1 - dst_y - dy, clip.extents.x1, clip.extents.y1, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1, flags, memset(&tmp, 0, sizeof(tmp)))) { DBG(("%s: fallback -- composite spans render op not supported\n", __FUNCTION__)); return false; } dx *= SAMPLES_X; dy *= SAMPLES_Y; num_threads = 1; if (!NO_GPU_THREADS && (flags & COMPOSITE_SPANS_RECTILINEAR) == 0 && tmp.thread_boxes && thread_choose_span(&tmp, dst, maskFormat, &clip)) num_threads = sna_use_threads(clip.extents.x2-clip.extents.x1, clip.extents.y2-clip.extents.y1, 8); DBG(("%s: using %d threads\n", __FUNCTION__, num_threads)); if (num_threads == 1) { struct tor tor; if (!tor_init(&tor, &clip.extents, 2*ntrap)) goto skip; for (n = 0; n < ntrap; n++) { if (pixman_fixed_integer_floor(traps[n].top) + dst->pDrawable->y >= clip.extents.y2 || pixman_fixed_integer_ceil(traps[n].bottom) + dst->pDrawable->y <= clip.extents.y1) continue; tor_add_trapezoid(&tor, &traps[n], dx, dy); } tor_render(sna, &tor, &tmp, &clip, choose_span(&tmp, dst, maskFormat, &clip), !was_clear && maskFormat && !operator_is_bounded(op)); tor_fini(&tor); } else { struct span_thread threads[num_threads]; int y, h; DBG(("%s: using %d threads for span compositing %dx%d\n", __FUNCTION__, num_threads, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1)); threads[0].sna = sna; threads[0].op = &tmp; threads[0].traps = traps; threads[0].ntrap = ntrap; threads[0].extents = clip.extents; threads[0].clip = &clip; threads[0].dx = dx; threads[0].dy = dy; threads[0].draw_y = dst->pDrawable->y; threads[0].unbounded = !was_clear && maskFormat && !operator_is_bounded(op); threads[0].span = thread_choose_span(&tmp, dst, maskFormat, &clip); y = clip.extents.y1; h = clip.extents.y2 - clip.extents.y1; h = (h + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * h >= clip.extents.y2 - clip.extents.y1; for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].extents.y1 = y; threads[n].extents.y2 = y += h; sna_threads_run(n, span_thread, &threads[n]); } assert(y < threads[0].extents.y2); threads[0].extents.y1 = y; span_thread(&threads[0]); sna_threads_wait(); } skip: tmp.done(sna, &tmp); REGION_UNINIT(NULL, &clip); return true; } static void tor_blt_mask(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { uint8_t *ptr = (uint8_t *)op; int stride = (intptr_t)clip; int h, w; coverage = TO_ALPHA(coverage); ptr += box->y1 * stride + box->x1; h = box->y2 - box->y1; w = box->x2 - box->x1; if ((w | h) == 1) { *ptr = coverage; } else if (w == 1) { do { *ptr = coverage; ptr += stride; } while (--h); } else do { memset(ptr, coverage, w); ptr += stride; } while (--h); } struct mask_thread { PixmapPtr scratch; const xTrapezoid *traps; BoxRec extents; int dx, dy, dst_y; int ntrap; }; static void mask_thread(void *arg) { struct mask_thread *thread = arg; struct tor tor; const xTrapezoid *t; int n, y1, y2; if (!tor_init(&tor, &thread->extents, 2*thread->ntrap)) return; y1 = thread->extents.y1 + thread->dst_y; y2 = thread->extents.y2 + thread->dst_y; for (n = thread->ntrap, t = thread->traps; n--; t++) { if (pixman_fixed_integer_floor(t->top) >= y2 || pixman_fixed_integer_ceil(t->bottom) <= y1) continue; tor_add_trapezoid(&tor, t, thread->dx, thread->dy); } if (thread->extents.x2 <= TOR_INPLACE_SIZE) { tor_inplace(&tor, thread->scratch); } else { tor_render(NULL, &tor, thread->scratch->devPrivate.ptr, (void *)(intptr_t)thread->scratch->devKind, tor_blt_mask, true); } tor_fini(&tor); } bool precise_trapezoid_mask_converter(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps) { ScreenPtr screen = dst->pDrawable->pScreen; PixmapPtr scratch; PicturePtr mask; BoxRec extents; int num_threads; int16_t dst_x, dst_y; int dx, dy; int error, n; if (NO_PRECISE) return false; if (maskFormat == NULL && ntrap > 1) { DBG(("%s: individual rasterisation requested\n", __FUNCTION__)); do { /* XXX unwind errors? */ if (!precise_trapezoid_mask_converter(op, src, dst, NULL, flags, src_x, src_y, 1, traps++)) return false; } while (--ntrap); return true; } if (!trapezoids_bounds(ntrap, traps, &extents)) return true; DBG(("%s: ntraps=%d, extents (%d, %d), (%d, %d)\n", __FUNCTION__, ntrap, extents.x1, extents.y1, extents.x2, extents.y2)); if (!sna_compute_composite_extents(&extents, src, NULL, dst, src_x, src_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) return true; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); extents.y2 -= extents.y1; extents.x2 -= extents.x1; extents.x1 -= dst->pDrawable->x; extents.y1 -= dst->pDrawable->y; dst_x = extents.x1; dst_y = extents.y1; dx = -extents.x1 * SAMPLES_X; dy = -extents.y1 * SAMPLES_Y; extents.x1 = extents.y1 = 0; DBG(("%s: mask (%dx%d), dx=(%d, %d)\n", __FUNCTION__, extents.x2, extents.y2, dx, dy)); scratch = sna_pixmap_create_upload(screen, extents.x2, extents.y2, 8, KGEM_BUFFER_WRITE_INPLACE); if (!scratch) return true; DBG(("%s: created buffer %p, stride %d\n", __FUNCTION__, scratch->devPrivate.ptr, scratch->devKind)); num_threads = 1; if (!NO_GPU_THREADS && (flags & COMPOSITE_SPANS_RECTILINEAR) == 0) num_threads = sna_use_threads(extents.x2 - extents.x1, extents.y2 - extents.y1, 4); if (num_threads == 1) { struct tor tor; if (!tor_init(&tor, &extents, 2*ntrap)) { sna_pixmap_destroy(scratch); return true; } for (n = 0; n < ntrap; n++) { if (pixman_fixed_to_int(traps[n].top) - dst_y >= extents.y2 || pixman_fixed_to_int(traps[n].bottom) - dst_y < 0) continue; tor_add_trapezoid(&tor, &traps[n], dx, dy); } if (extents.x2 <= TOR_INPLACE_SIZE) { tor_inplace(&tor, scratch); } else { tor_render(NULL, &tor, scratch->devPrivate.ptr, (void *)(intptr_t)scratch->devKind, tor_blt_mask, true); } tor_fini(&tor); } else { struct mask_thread threads[num_threads]; int y, h; DBG(("%s: using %d threads for mask compositing %dx%d\n", __FUNCTION__, num_threads, extents.x2 - extents.x1, extents.y2 - extents.y1)); threads[0].scratch = scratch; threads[0].traps = traps; threads[0].ntrap = ntrap; threads[0].extents = extents; threads[0].dx = dx; threads[0].dy = dy; threads[0].dst_y = dst_y; y = extents.y1; h = extents.y2 - extents.y1; h = (h + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * h >= extents.y2 - extents.y1; for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].extents.y1 = y; threads[n].extents.y2 = y += h; sna_threads_run(n, mask_thread, &threads[n]); } assert(y < threads[0].extents.y2); threads[0].extents.y1 = y; mask_thread(&threads[0]); sna_threads_wait(); } mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, 8, PICT_a8), 0, 0, serverClient, &error); if (mask) { int16_t x0, y0; trapezoid_origin(&traps[0].left, &x0, &y0); CompositePicture(op, src, mask, dst, src_x + dst_x - x0, src_y + dst_y - y0, 0, 0, dst_x, dst_y, extents.x2, extents.y2); FreePicture(mask, 0); } sna_pixmap_destroy(scratch); return true; } struct inplace { uint8_t *ptr; uint32_t stride; union { uint8_t opacity; uint32_t color; }; }; static force_inline uint8_t coverage_opacity(int coverage, uint8_t opacity) { coverage = TO_ALPHA(coverage); return opacity == 255 ? coverage : mul_8_8(coverage, opacity); } static void _tor_blt_src(struct inplace *in, const BoxRec *box, uint8_t v) { uint8_t *ptr = in->ptr; int h, w; ptr += box->y1 * in->stride + box->x1; h = box->y2 - box->y1; w = box->x2 - box->x1; if ((w | h) == 1) { *ptr = v; } else if (w == 1) { do { *ptr = v; ptr += in->stride; } while (--h); } else do { memset(ptr, v, w); ptr += in->stride; } while (--h); } static void tor_blt_src(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct inplace *in = (struct inplace *)op; _tor_blt_src(in, box, coverage_opacity(coverage, in->opacity)); } static void tor_blt_src_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) tor_blt_src(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } static void tor_blt_in(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct inplace *in = (struct inplace *)op; uint8_t *ptr = in->ptr; int h, w, i; if (coverage == 0 || in->opacity == 0) { _tor_blt_src(in, box, 0); return; } coverage = coverage_opacity(coverage, in->opacity); if (coverage == 0xff) return; ptr += box->y1 * in->stride + box->x1; h = box->y2 - box->y1; w = box->x2 - box->x1; do { for (i = 0; i < w; i++) ptr[i] = mul_8_8(ptr[i], coverage); ptr += in->stride; } while (--h); } static void tor_blt_in_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) tor_blt_in(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } static void tor_blt_add(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct inplace *in = (struct inplace *)op; uint8_t *ptr = in->ptr; int h, w, v, i; if (coverage == 0) return; coverage = coverage_opacity(coverage, in->opacity); if (coverage == 0xff) { _tor_blt_src(in, box, 0xff); return; } ptr += box->y1 * in->stride + box->x1; h = box->y2 - box->y1; w = box->x2 - box->x1; if ((w | h) == 1) { v = coverage + *ptr; *ptr = v >= 255 ? 255 : v; } else { do { for (i = 0; i < w; i++) { v = coverage + ptr[i]; ptr[i] = v >= 255 ? 255 : v; } ptr += in->stride; } while (--h); } } static void tor_blt_add_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) tor_blt_add(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } static void tor_blt_lerp32(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct inplace *in = (struct inplace *)op; uint32_t *ptr = (uint32_t *)in->ptr; int stride = in->stride / sizeof(uint32_t); int h, w, i; if (coverage == 0) return; ptr += box->y1 * stride + box->x1; h = box->y2 - box->y1; w = box->x2 - box->x1; if (coverage == GRID_AREA) { if ((w | h) == 1) { *ptr = in->color; } else { if (w < 16) { do { for (i = 0; i < w; i++) ptr[i] = in->color; ptr += stride; } while (--h); } else { pixman_fill(ptr, stride, 32, 0, 0, w, h, in->color); } } } else { coverage = TO_ALPHA(coverage); if ((w | h) == 1) { *ptr = lerp8x4(in->color, coverage, *ptr); } else if (w == 1) { do { *ptr = lerp8x4(in->color, coverage, *ptr); ptr += stride; } while (--h); } else{ do { for (i = 0; i < w; i++) ptr[i] = lerp8x4(in->color, coverage, ptr[i]); ptr += stride; } while (--h); } } } static void tor_blt_lerp32_clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) tor_blt_lerp32(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } struct pixman_inplace { pixman_image_t *image, *source, *mask; uint32_t color; uint32_t *bits; int dx, dy; int sx, sy; uint8_t op; }; static void pixmask_span_solid(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct pixman_inplace *pi = (struct pixman_inplace *)op; if (coverage != GRID_AREA) *pi->bits = mul_4x8_8(pi->color, TO_ALPHA(coverage)); else *pi->bits = pi->color; pixman_image_composite(pi->op, pi->source, NULL, pi->image, box->x1, box->y1, 0, 0, pi->dx + box->x1, pi->dy + box->y1, box->x2 - box->x1, box->y2 - box->y1); } static void pixmask_span_solid__clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) pixmask_span_solid(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } static void pixmask_span(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { struct pixman_inplace *pi = (struct pixman_inplace *)op; pixman_image_t *mask = NULL; if (coverage != GRID_AREA) { *pi->bits = TO_ALPHA(coverage); mask = pi->mask; } pixman_image_composite(pi->op, pi->source, mask, pi->image, pi->sx + box->x1, pi->sy + box->y1, 0, 0, pi->dx + box->x1, pi->dy + box->y1, box->x2 - box->x1, box->y2 - box->y1); } static void pixmask_span__clipped(struct sna *sna, struct sna_composite_spans_op *op, pixman_region16_t *clip, const BoxRec *box, int coverage) { pixman_region16_t region; int n; pixman_region_init_rects(®ion, box, 1); RegionIntersect(®ion, ®ion, clip); n = region_num_rects(®ion); box = region_rects(®ion); while (n--) pixmask_span(sna, op, NULL, box++, coverage); pixman_region_fini(®ion); } struct inplace_x8r8g8b8_thread { xTrapezoid *traps; PicturePtr dst, src; BoxRec extents; int dx, dy; int ntrap; bool lerp, is_solid; uint32_t color; int16_t src_x, src_y; uint8_t op; }; static void inplace_x8r8g8b8_thread(void *arg) { struct inplace_x8r8g8b8_thread *thread = arg; struct tor tor; span_func_t span; RegionPtr clip; int y1, y2, n; if (!tor_init(&tor, &thread->extents, 2*thread->ntrap)) return; y1 = thread->extents.y1 - thread->dst->pDrawable->y; y2 = thread->extents.y2 - thread->dst->pDrawable->y; for (n = 0; n < thread->ntrap; n++) { if (pixman_fixed_to_int(thread->traps[n].top) >= y2 || pixman_fixed_to_int(thread->traps[n].bottom) < y1) continue; tor_add_trapezoid(&tor, &thread->traps[n], thread->dx, thread->dy); } clip = thread->dst->pCompositeClip; if (thread->lerp) { struct inplace inplace; int16_t dst_x, dst_y; PixmapPtr pixmap; pixmap = get_drawable_pixmap(thread->dst->pDrawable); inplace.ptr = pixmap->devPrivate.ptr; if (get_drawable_deltas(thread->dst->pDrawable, pixmap, &dst_x, &dst_y)) inplace.ptr += dst_y * pixmap->devKind + dst_x * 4; inplace.stride = pixmap->devKind; inplace.color = thread->color; if (clip->data) span = tor_blt_lerp32_clipped; else span = tor_blt_lerp32; tor_render(NULL, &tor, (void*)&inplace, clip, span, false); } else if (thread->is_solid) { struct pixman_inplace pi; pi.image = image_from_pict(thread->dst, false, &pi.dx, &pi.dy); pi.op = thread->op; pi.color = thread->color; pi.bits = (uint32_t *)&pi.sx; pi.source = pixman_image_create_bits(PIXMAN_a8r8g8b8, 1, 1, pi.bits, 0); pixman_image_set_repeat(pi.source, PIXMAN_REPEAT_NORMAL); if (clip->data) span = pixmask_span_solid__clipped; else span = pixmask_span_solid; tor_render(NULL, &tor, (void*)&pi, clip, span, false); pixman_image_unref(pi.source); pixman_image_unref(pi.image); } else { struct pixman_inplace pi; int16_t x0, y0; trapezoid_origin(&thread->traps[0].left, &x0, &y0); pi.image = image_from_pict(thread->dst, false, &pi.dx, &pi.dy); pi.source = image_from_pict(thread->src, false, &pi.sx, &pi.sy); pi.sx += thread->src_x - x0; pi.sy += thread->src_y - y0; pi.mask = pixman_image_create_bits(PIXMAN_a8, 1, 1, NULL, 0); pixman_image_set_repeat(pi.mask, PIXMAN_REPEAT_NORMAL); pi.bits = pixman_image_get_data(pi.mask); pi.op = thread->op; if (clip->data) span = pixmask_span__clipped; else span = pixmask_span; tor_render(NULL, &tor, (void*)&pi, clip, span, false); pixman_image_unref(pi.mask); pixman_image_unref(pi.source); pixman_image_unref(pi.image); } tor_fini(&tor); } static bool trapezoid_span_inplace__x8r8g8b8(CARD8 op, PicturePtr dst, PicturePtr src, int16_t src_x, int16_t src_y, PictFormatPtr maskFormat, unsigned flags, int ntrap, xTrapezoid *traps) { uint32_t color; bool lerp, is_solid; RegionRec region; int dx, dy; int num_threads, n; lerp = false; is_solid = sna_picture_is_solid(src, &color); if (is_solid) { if (op == PictOpOver && (color >> 24) == 0xff) op = PictOpSrc; if (op == PictOpOver && sna_drawable_is_clear(dst->pDrawable)) op = PictOpSrc; lerp = op == PictOpSrc; } if (!lerp) { switch (op) { case PictOpOver: case PictOpAdd: case PictOpOutReverse: break; case PictOpSrc: if (!sna_drawable_is_clear(dst->pDrawable)) return false; break; default: return false; } } if (maskFormat == NULL && ntrap > 1) { DBG(("%s: individual rasterisation requested\n", __FUNCTION__)); do { /* XXX unwind errors? */ if (!trapezoid_span_inplace__x8r8g8b8(op, dst, src, src_x, src_y, NULL, flags, 1, traps++)) return false; } while (--ntrap); return true; } if (!trapezoids_bounds(ntrap, traps, ®ion.extents)) return true; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (!sna_compute_composite_extents(®ion.extents, src, NULL, dst, src_x, src_y, 0, 0, region.extents.x1, region.extents.y1, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1)) return true; DBG(("%s: clipped extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); region.data = NULL; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, ®ion, MOVE_WRITE | MOVE_READ)) return true; if (!is_solid && src->pDrawable) { if (!sna_drawable_move_to_cpu(src->pDrawable, MOVE_READ)) return true; if (src->alphaMap && !sna_drawable_move_to_cpu(src->alphaMap->pDrawable, MOVE_READ)) return true; } dx = dst->pDrawable->x * SAMPLES_X; dy = dst->pDrawable->y * SAMPLES_Y; num_threads = 1; if (!NO_GPU_THREADS && (flags & COMPOSITE_SPANS_RECTILINEAR) == 0 && (lerp || is_solid)) num_threads = sna_use_threads(4*(region.extents.x2 - region.extents.x1), region.extents.y2 - region.extents.y1, 4); DBG(("%s: %dx%d, format=%x, op=%d, lerp?=%d, num_threads=%d\n", __FUNCTION__, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1, dst->format, op, lerp, num_threads)); if (num_threads == 1) { struct tor tor; span_func_t span; if (!tor_init(&tor, ®ion.extents, 2*ntrap)) return true; for (n = 0; n < ntrap; n++) { if (pixman_fixed_to_int(traps[n].top) >= region.extents.y2 - dst->pDrawable->y || pixman_fixed_to_int(traps[n].bottom) < region.extents.y1 - dst->pDrawable->y) continue; tor_add_trapezoid(&tor, &traps[n], dx, dy); } if (lerp) { struct inplace inplace; PixmapPtr pixmap; int16_t dst_x, dst_y; pixmap = get_drawable_pixmap(dst->pDrawable); inplace.ptr = pixmap->devPrivate.ptr; if (get_drawable_deltas(dst->pDrawable, pixmap, &dst_x, &dst_y)) inplace.ptr += dst_y * pixmap->devKind + dst_x * 4; inplace.stride = pixmap->devKind; inplace.color = color; if (dst->pCompositeClip->data) span = tor_blt_lerp32_clipped; else span = tor_blt_lerp32; DBG(("%s: render inplace op=%d, color=%08x\n", __FUNCTION__, op, color)); if (sigtrap_get() == 0) { tor_render(NULL, &tor, (void*)&inplace, dst->pCompositeClip, span, false); sigtrap_put(); } } else if (is_solid) { struct pixman_inplace pi; pi.image = image_from_pict(dst, false, &pi.dx, &pi.dy); pi.op = op; pi.color = color; pi.bits = (uint32_t *)&pi.sx; pi.source = pixman_image_create_bits(PIXMAN_a8r8g8b8, 1, 1, pi.bits, 0); pixman_image_set_repeat(pi.source, PIXMAN_REPEAT_NORMAL); if (dst->pCompositeClip->data) span = pixmask_span_solid__clipped; else span = pixmask_span_solid; if (sigtrap_get() == 0) { tor_render(NULL, &tor, (void*)&pi, dst->pCompositeClip, span, false); sigtrap_put(); } pixman_image_unref(pi.source); pixman_image_unref(pi.image); } else { struct pixman_inplace pi; int16_t x0, y0; trapezoid_origin(&traps[0].left, &x0, &y0); pi.image = image_from_pict(dst, false, &pi.dx, &pi.dy); pi.source = image_from_pict(src, false, &pi.sx, &pi.sy); pi.sx += src_x - x0; pi.sy += src_y - y0; pi.mask = pixman_image_create_bits(PIXMAN_a8, 1, 1, NULL, 0); pixman_image_set_repeat(pi.mask, PIXMAN_REPEAT_NORMAL); pi.bits = pixman_image_get_data(pi.mask); pi.op = op; if (dst->pCompositeClip->data) span = pixmask_span__clipped; else span = pixmask_span; if (sigtrap_get() == 0) { tor_render(NULL, &tor, (void*)&pi, dst->pCompositeClip, span, false); sigtrap_put(); } pixman_image_unref(pi.mask); pixman_image_unref(pi.source); pixman_image_unref(pi.image); } tor_fini(&tor); } else { struct inplace_x8r8g8b8_thread threads[num_threads]; int y, h; DBG(("%s: using %d threads for inplace compositing %dx%d\n", __FUNCTION__, num_threads, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1)); threads[0].traps = traps; threads[0].ntrap = ntrap; threads[0].extents = region.extents; threads[0].lerp = lerp; threads[0].is_solid = is_solid; threads[0].color = color; threads[0].dx = dx; threads[0].dy = dy; threads[0].dst = dst; threads[0].src = src; threads[0].op = op; threads[0].src_x = src_x; threads[0].src_y = src_y; y = region.extents.y1; h = region.extents.y2 - region.extents.y1; h = (h + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * h >= region.extents.y2 - region.extents.y1; if (sigtrap_get() == 0) { for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].extents.y1 = y; threads[n].extents.y2 = y += h; sna_threads_run(n, inplace_x8r8g8b8_thread, &threads[n]); } assert(y < threads[0].extents.y2); threads[0].extents.y1 = y; inplace_x8r8g8b8_thread(&threads[0]); sna_threads_wait(); sigtrap_put(); } else sna_threads_kill(); /* leaks thread allocations */ } return true; } struct inplace_thread { xTrapezoid *traps; RegionPtr clip; span_func_t span; struct inplace inplace; BoxRec extents; int dx, dy; int draw_x, draw_y; bool unbounded; int ntrap; }; static void inplace_thread(void *arg) { struct inplace_thread *thread = arg; struct tor tor; int n; if (!tor_init(&tor, &thread->extents, 2*thread->ntrap)) return; for (n = 0; n < thread->ntrap; n++) { if (pixman_fixed_to_int(thread->traps[n].top) >= thread->extents.y2 - thread->draw_y || pixman_fixed_to_int(thread->traps[n].bottom) < thread->extents.y1 - thread->draw_y) continue; tor_add_trapezoid(&tor, &thread->traps[n], thread->dx, thread->dy); } tor_render(NULL, &tor, (void*)&thread->inplace, thread->clip, thread->span, thread->unbounded); tor_fini(&tor); } bool precise_trapezoid_span_inplace(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps, bool fallback) { struct inplace inplace; span_func_t span; PixmapPtr pixmap; struct sna_pixmap *priv; RegionRec region; uint32_t color; bool unbounded; int16_t dst_x, dst_y; int dx, dy; int num_threads, n; if (NO_PRECISE) return false; if (dst->format == PICT_a8r8g8b8 || dst->format == PICT_x8r8g8b8) return trapezoid_span_inplace__x8r8g8b8(op, dst, src, src_x, src_y, maskFormat, flags, ntrap, traps); if (!sna_picture_is_solid(src, &color)) { DBG(("%s: fallback -- can not perform operation in place, requires solid source\n", __FUNCTION__)); return false; } if (dst->format != PICT_a8) { DBG(("%s: fallback -- can not perform operation in place, format=%x\n", __FUNCTION__, dst->format)); return false; } pixmap = get_drawable_pixmap(dst->pDrawable); unbounded = false; priv = sna_pixmap(pixmap); if (priv) { switch (op) { case PictOpAdd: if (priv->clear && priv->clear_color == 0) { unbounded = true; op = PictOpSrc; } if ((color >> 24) == 0) return true; break; case PictOpIn: if (priv->clear && priv->clear_color == 0) return true; if (priv->clear && priv->clear_color == 0xff) op = PictOpSrc; unbounded = true; break; case PictOpSrc: unbounded = true; break; default: DBG(("%s: fallback -- can not perform op [%d] in place\n", __FUNCTION__, op)); return false; } } else { switch (op) { case PictOpAdd: if ((color >> 24) == 0) return true; break; case PictOpIn: case PictOpSrc: unbounded = true; break; default: DBG(("%s: fallback -- can not perform op [%d] in place\n", __FUNCTION__, op)); return false; } } DBG(("%s: format=%x, op=%d, color=%x\n", __FUNCTION__, dst->format, op, color)); if (maskFormat == NULL && ntrap > 1) { DBG(("%s: individual rasterisation requested\n", __FUNCTION__)); do { /* XXX unwind errors? */ if (!precise_trapezoid_span_inplace(sna, op, src, dst, NULL, flags, src_x, src_y, 1, traps++, fallback)) return false; } while (--ntrap); return true; } if (!trapezoids_bounds(ntrap, traps, ®ion.extents)) return true; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); if (!sna_compute_composite_extents(®ion.extents, NULL, NULL, dst, 0, 0, 0, 0, region.extents.x1, region.extents.y1, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1)) return true; DBG(("%s: clipped extents (%d, %d), (%d, %d) [complex clip? %d]\n", __FUNCTION__, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2, dst->pCompositeClip->data != NULL)); if (op == PictOpSrc) { if (dst->pCompositeClip->data) span = tor_blt_src_clipped; else span = tor_blt_src; } else if (op == PictOpIn) { if (dst->pCompositeClip->data) span = tor_blt_in_clipped; else span = tor_blt_in; } else { assert(op == PictOpAdd); if (dst->pCompositeClip->data) span = tor_blt_add_clipped; else span = tor_blt_add; } DBG(("%s: move-to-cpu(dst)\n", __FUNCTION__)); region.data = NULL; if (!sna_drawable_move_region_to_cpu(dst->pDrawable, ®ion, op == PictOpSrc ? MOVE_WRITE | MOVE_INPLACE_HINT : MOVE_WRITE | MOVE_READ)) return true; dx = dst->pDrawable->x * SAMPLES_X; dy = dst->pDrawable->y * SAMPLES_Y; inplace.ptr = pixmap->devPrivate.ptr; if (get_drawable_deltas(dst->pDrawable, pixmap, &dst_x, &dst_y)) inplace.ptr += dst_y * pixmap->devKind + dst_x; inplace.stride = pixmap->devKind; inplace.opacity = color >> 24; num_threads = 1; if (!NO_GPU_THREADS && (flags & COMPOSITE_SPANS_RECTILINEAR) == 0) num_threads = sna_use_threads(region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1, 4); if (num_threads == 1) { struct tor tor; if (!tor_init(&tor, ®ion.extents, 2*ntrap)) return true; for (n = 0; n < ntrap; n++) { if (pixman_fixed_to_int(traps[n].top) >= region.extents.y2 - dst->pDrawable->y || pixman_fixed_to_int(traps[n].bottom) < region.extents.y1 - dst->pDrawable->y) continue; tor_add_trapezoid(&tor, &traps[n], dx, dy); } if (sigtrap_get() == 0) { tor_render(NULL, &tor, (void*)&inplace, dst->pCompositeClip, span, unbounded); sigtrap_put(); } tor_fini(&tor); } else { struct inplace_thread threads[num_threads]; int y, h; DBG(("%s: using %d threads for inplace compositing %dx%d\n", __FUNCTION__, num_threads, region.extents.x2 - region.extents.x1, region.extents.y2 - region.extents.y1)); threads[0].traps = traps; threads[0].ntrap = ntrap; threads[0].inplace = inplace; threads[0].extents = region.extents; threads[0].clip = dst->pCompositeClip; threads[0].span = span; threads[0].unbounded = unbounded; threads[0].dx = dx; threads[0].dy = dy; threads[0].draw_x = dst->pDrawable->x; threads[0].draw_y = dst->pDrawable->y; y = region.extents.y1; h = region.extents.y2 - region.extents.y1; h = (h + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * h >= region.extents.y2 - region.extents.y1; if (sigtrap_get() == 0) { for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].extents.y1 = y; threads[n].extents.y2 = y += h; sna_threads_run(n, inplace_thread, &threads[n]); } assert(y < threads[0].extents.y2); threads[0].extents.y1 = y; inplace_thread(&threads[0]); sna_threads_wait(); sigtrap_put(); } else sna_threads_kill(); /* leaks thread allocations */ } return true; } bool precise_trapezoid_span_fallback(CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, unsigned flags, INT16 src_x, INT16 src_y, int ntrap, xTrapezoid *traps) { ScreenPtr screen = dst->pDrawable->pScreen; PixmapPtr scratch; PicturePtr mask; BoxRec extents; int16_t dst_x, dst_y; int dx, dy, num_threads; int error, n; if (NO_PRECISE) return false; if (maskFormat == NULL && ntrap > 1) { DBG(("%s: individual rasterisation requested\n", __FUNCTION__)); do { /* XXX unwind errors? */ if (!precise_trapezoid_span_fallback(op, src, dst, NULL, flags, src_x, src_y, 1, traps++)) return false; } while (--ntrap); return true; } if (!trapezoids_bounds(ntrap, traps, &extents)) return true; DBG(("%s: ntraps=%d, extents (%d, %d), (%d, %d)\n", __FUNCTION__, ntrap, extents.x1, extents.y1, extents.x2, extents.y2)); if (!sna_compute_composite_extents(&extents, src, NULL, dst, src_x, src_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) return true; DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); extents.y2 -= extents.y1; extents.x2 -= extents.x1; extents.x1 -= dst->pDrawable->x; extents.y1 -= dst->pDrawable->y; dst_x = extents.x1; dst_y = extents.y1; dx = -extents.x1 * SAMPLES_X; dy = -extents.y1 * SAMPLES_Y; extents.x1 = extents.y1 = 0; DBG(("%s: mask (%dx%d), dx=(%d, %d)\n", __FUNCTION__, extents.x2, extents.y2, dx, dy)); scratch = sna_pixmap_create_unattached(screen, extents.x2, extents.y2, 8); if (!scratch) return true; DBG(("%s: created buffer %p, stride %d\n", __FUNCTION__, scratch->devPrivate.ptr, scratch->devKind)); num_threads = 1; if (!NO_GPU_THREADS && (flags & COMPOSITE_SPANS_RECTILINEAR) == 0) num_threads = sna_use_threads(extents.x2 - extents.x1, extents.y2 - extents.y1, 4); if (num_threads == 1) { struct tor tor; if (!tor_init(&tor, &extents, 2*ntrap)) { sna_pixmap_destroy(scratch); return true; } for (n = 0; n < ntrap; n++) { if (pixman_fixed_to_int(traps[n].top) - dst_y >= extents.y2 || pixman_fixed_to_int(traps[n].bottom) - dst_y < 0) continue; tor_add_trapezoid(&tor, &traps[n], dx, dy); } if (extents.x2 <= TOR_INPLACE_SIZE) { tor_inplace(&tor, scratch); } else { tor_render(NULL, &tor, scratch->devPrivate.ptr, (void *)(intptr_t)scratch->devKind, tor_blt_mask, true); } tor_fini(&tor); } else { struct mask_thread threads[num_threads]; int y, h; DBG(("%s: using %d threads for mask compositing %dx%d\n", __FUNCTION__, num_threads, extents.x2 - extents.x1, extents.y2 - extents.y1)); threads[0].scratch = scratch; threads[0].traps = traps; threads[0].ntrap = ntrap; threads[0].extents = extents; threads[0].dx = dx; threads[0].dy = dy; threads[0].dst_y = dst_y; y = extents.y1; h = extents.y2 - extents.y1; h = (h + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * h >= extents.y2 - extents.y1; for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].extents.y1 = y; threads[n].extents.y2 = y += h; sna_threads_run(n, mask_thread, &threads[n]); } assert(y < threads[0].extents.y2); threads[0].extents.y1 = y; mask_thread(&threads[0]); sna_threads_wait(); } mask = CreatePicture(0, &scratch->drawable, PictureMatchFormat(screen, 8, PICT_a8), 0, 0, serverClient, &error); if (mask) { RegionRec region; int16_t x0, y0; region.extents.x1 = dst_x + dst->pDrawable->x; region.extents.y1 = dst_y + dst->pDrawable->y; region.extents.x2 = region.extents.x1 + extents.x2; region.extents.y2 = region.extents.y1 + extents.y2; region.data = NULL; trapezoid_origin(&traps[0].left, &x0, &y0); DBG(("%s: fbComposite()\n", __FUNCTION__)); sna_composite_fb(op, src, mask, dst, ®ion, src_x + dst_x - x0, src_y + dst_y - y0, 0, 0, dst_x, dst_y, extents.x2, extents.y2); FreePicture(mask, 0); } sna_pixmap_destroy(scratch); return true; } struct tristrip_thread { struct sna *sna; const struct sna_composite_spans_op *op; const xPointFixed *points; RegionPtr clip; span_func_t span; BoxRec extents; int dx, dy, draw_y; int count; bool unbounded; }; static void tristrip_thread(void *arg) { struct tristrip_thread *thread = arg; struct span_thread_boxes boxes; struct tor tor; int n, cw, ccw; if (!tor_init(&tor, &thread->extents, 2*thread->count)) return; boxes.op = thread->op; boxes.num_boxes = 0; cw = 0; ccw = 1; polygon_add_line(tor.polygon, &thread->points[ccw], &thread->points[cw], thread->dx, thread->dy); n = 2; do { polygon_add_line(tor.polygon, &thread->points[cw], &thread->points[n], thread->dx, thread->dy); cw = n; if (++n == thread->count) break; polygon_add_line(tor.polygon, &thread->points[n], &thread->points[ccw], thread->dx, thread->dy); ccw = n; if (++n == thread->count) break; } while (1); polygon_add_line(tor.polygon, &thread->points[cw], &thread->points[ccw], thread->dx, thread->dy); assert(tor.polygon->num_edges <= 2*thread->count); tor_render(thread->sna, &tor, (struct sna_composite_spans_op *)&boxes, thread->clip, thread->span, thread->unbounded); tor_fini(&tor); if (boxes.num_boxes) { DBG(("%s: flushing %d boxes\n", __FUNCTION__, boxes.num_boxes)); assert(boxes.num_boxes <= SPAN_THREAD_MAX_BOXES); thread->op->thread_boxes(thread->sna, thread->op, boxes.boxes, boxes.num_boxes); } } bool precise_tristrip_span_converter(struct sna *sna, CARD8 op, PicturePtr src, PicturePtr dst, PictFormatPtr maskFormat, INT16 src_x, INT16 src_y, int count, xPointFixed *points) { struct sna_composite_spans_op tmp; BoxRec extents; pixman_region16_t clip; int16_t dst_x, dst_y; int dx, dy, num_threads; bool was_clear; if (!sna->render.check_composite_spans(sna, op, src, dst, 0, 0, 0)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } dst_x = pixman_fixed_to_int(points[0].x); dst_y = pixman_fixed_to_int(points[0].y); miPointFixedBounds(count, points, &extents); DBG(("%s: extents (%d, %d), (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2)); if (extents.y1 >= extents.y2 || extents.x1 >= extents.x2) return true; #if 0 if (extents.y2 - extents.y1 < 64 && extents.x2 - extents.x1 < 64) { DBG(("%s: fallback -- traps extents too small %dx%d\n", __FUNCTION__, extents.y2 - extents.y1, extents.x2 - extents.x1)); return false; } #endif if (!sna_compute_composite_region(&clip, src, NULL, dst, src_x + extents.x1 - dst_x, src_y + extents.y1 - dst_y, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1)) { DBG(("%s: triangles do not intersect drawable clips\n", __FUNCTION__)) ; return true; } if (!sna->render.check_composite_spans(sna, op, src, dst, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1, 0)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } extents = *RegionExtents(&clip); dx = dst->pDrawable->x; dy = dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d) src -> (%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2, dx, dy, src_x + extents.x1 - dst_x - dx, src_y + extents.y1 - dst_y - dy)); was_clear = sna_drawable_is_clear(dst->pDrawable); memset(&tmp, 0, sizeof(tmp)); if (!sna->render.composite_spans(sna, op, src, dst, src_x + extents.x1 - dst_x - dx, src_y + extents.y1 - dst_y - dy, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1, 0, &tmp)) { DBG(("%s: fallback -- composite spans render op not supported\n", __FUNCTION__)); return false; } dx *= SAMPLES_X; dy *= SAMPLES_Y; num_threads = 1; if (!NO_GPU_THREADS && tmp.thread_boxes && thread_choose_span(&tmp, dst, maskFormat, &clip)) num_threads = sna_use_threads(extents.x2 - extents.x1, extents.y2 - extents.y1, 16); if (num_threads == 1) { struct tor tor; int cw, ccw, n; if (!tor_init(&tor, &extents, 2*count)) goto skip; cw = 0; ccw = 1; polygon_add_line(tor.polygon, &points[ccw], &points[cw], dx, dy); n = 2; do { polygon_add_line(tor.polygon, &points[cw], &points[n], dx, dy); cw = n; if (++n == count) break; polygon_add_line(tor.polygon, &points[n], &points[ccw], dx, dy); ccw = n; if (++n == count) break; } while (1); polygon_add_line(tor.polygon, &points[cw], &points[ccw], dx, dy); assert(tor.polygon->num_edges <= 2*count); tor_render(sna, &tor, &tmp, &clip, choose_span(&tmp, dst, maskFormat, &clip), !was_clear && maskFormat && !operator_is_bounded(op)); tor_fini(&tor); } else { struct tristrip_thread threads[num_threads]; int y, h, n; DBG(("%s: using %d threads for tristrip compositing %dx%d\n", __FUNCTION__, num_threads, clip.extents.x2 - clip.extents.x1, clip.extents.y2 - clip.extents.y1)); threads[0].sna = sna; threads[0].op = &tmp; threads[0].points = points; threads[0].count = count; threads[0].extents = clip.extents; threads[0].clip = &clip; threads[0].dx = dx; threads[0].dy = dy; threads[0].draw_y = dst->pDrawable->y; threads[0].unbounded = !was_clear && maskFormat && !operator_is_bounded(op); threads[0].span = thread_choose_span(&tmp, dst, maskFormat, &clip); y = clip.extents.y1; h = clip.extents.y2 - clip.extents.y1; h = (h + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * h >= clip.extents.y2 - clip.extents.y1; for (n = 1; n < num_threads; n++) { threads[n] = threads[0]; threads[n].extents.y1 = y; threads[n].extents.y2 = y += h; sna_threads_run(n, tristrip_thread, &threads[n]); } assert(y < threads[0].extents.y2); threads[0].extents.y1 = y; tristrip_thread(&threads[0]); sna_threads_wait(); } skip: tmp.done(sna, &tmp); REGION_UNINIT(NULL, &clip); return true; } bool precise_trap_span_converter(struct sna *sna, PicturePtr dst, INT16 src_x, INT16 src_y, int ntrap, xTrap *trap) { struct sna_composite_spans_op tmp; struct tor tor; BoxRec extents; pixman_region16_t *clip; int dx, dy, n; if (dst->pDrawable->depth < 8) return false; if (!sna->render.check_composite_spans(sna, PictOpAdd, sna->render.white_picture, dst, dst->pCompositeClip->extents.x2 - dst->pCompositeClip->extents.x1, dst->pCompositeClip->extents.y2 - dst->pCompositeClip->extents.y1, 0)) { DBG(("%s: fallback -- composite spans not supported\n", __FUNCTION__)); return false; } clip = dst->pCompositeClip; extents = *RegionExtents(clip); dx = dst->pDrawable->x; dy = dst->pDrawable->y; DBG(("%s: after clip -- extents (%d, %d), (%d, %d), delta=(%d, %d)\n", __FUNCTION__, extents.x1, extents.y1, extents.x2, extents.y2, dx, dy)); memset(&tmp, 0, sizeof(tmp)); if (!sna->render.composite_spans(sna, PictOpAdd, sna->render.white_picture, dst, 0, 0, extents.x1, extents.y1, extents.x2 - extents.x1, extents.y2 - extents.y1, 0, &tmp)) { DBG(("%s: fallback -- composite spans render op not supported\n", __FUNCTION__)); return false; } dx *= SAMPLES_X; dy *= SAMPLES_Y; if (!tor_init(&tor, &extents, 2*ntrap)) goto skip; for (n = 0; n < ntrap; n++) { xPointFixed p1, p2; if (pixman_fixed_to_int(trap[n].top.y) + dst->pDrawable->y >= extents.y2 || pixman_fixed_to_int(trap[n].bot.y) + dst->pDrawable->y < extents.y1) continue; p1.y = trap[n].top.y; p2.y = trap[n].bot.y; p1.x = trap[n].top.l; p2.x = trap[n].bot.l; polygon_add_line(tor.polygon, &p1, &p2, dx, dy); p1.y = trap[n].bot.y; p2.y = trap[n].top.y; p1.x = trap[n].top.r; p2.x = trap[n].bot.r; polygon_add_line(tor.polygon, &p1, &p2, dx, dy); } tor_render(sna, &tor, &tmp, clip, choose_span(&tmp, dst, NULL, clip), false); tor_fini(&tor); skip: tmp.done(sna, &tmp); return true; } xf86-video-intel-2.99.917/src/sna/kgem_debug_gen2.c0000664000175000017500000005011312400044327016443 00000000000000/* * Copyright © 2007-2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include "sna.h" #include "gen2_render.h" #include "kgem_debug.h" static struct state { int vertex_format; } state; static inline float int_as_float(uint32_t dw) { union { float f; uint32_t dw; } u; u.dw = dw; return u.f; } static int decode_3d_primitive(struct kgem *kgem, uint32_t offset) { uint32_t *data = kgem->batch + offset; char immediate = (data[0] & (1 << 23)) == 0; unsigned int len; const char *primtype; switch ((data[0] >> 18) & 0xf) { case 0x0: primtype = "TRILIST"; break; case 0x1: primtype = "TRISTRIP"; break; case 0x2: primtype = "TRISTRIP_REVERSE"; break; case 0x3: primtype = "TRIFAN"; break; case 0x4: primtype = "POLYGON"; break; case 0x5: primtype = "LINELIST"; break; case 0x6: primtype = "LINESTRIP"; break; case 0x7: primtype = "RECTLIST"; break; case 0x8: primtype = "POINTLIST"; break; case 0x9: primtype = "DIB"; break; case 0xa: primtype = "CLEAR_RECT"; break; default: primtype = "unknown"; break; } /* XXX: 3DPRIM_DIB not supported */ if (immediate) { len = (data[0] & 0x0003ffff) + 2; kgem_debug_print(data, offset, 0, "3DPRIMITIVE inline %s\n", primtype); #if 0 if (!saved_s2_set || !saved_s4_set) { fprintf(out, "unknown vertex format\n"); for (i = 1; i < len; i++) { kgem_debug_print(data, offset, i, " vertex data (%f float)\n", int_as_float(data[i])); } } else { unsigned int vertex = 0; for (i = 1; i < len;) { unsigned int tc; #define VERTEX_OUT(fmt, ...) do { \ if (i < len) \ kgem_debug_print(data, offset, i, " V%d."fmt"\n", vertex, __VA_ARGS__); \ else \ fprintf(out, " missing data in V%d\n", vertex); \ i++; \ } while (0) VERTEX_OUT("X = %f", int_as_float(data[i])); VERTEX_OUT("Y = %f", int_as_float(data[i])); switch (saved_s4 >> 6 & 0x7) { case 0x1: VERTEX_OUT("Z = %f", int_as_float(data[i])); break; case 0x2: VERTEX_OUT("Z = %f", int_as_float(data[i])); VERTEX_OUT("W = %f", int_as_float(data[i])); break; case 0x3: break; case 0x4: VERTEX_OUT("W = %f", int_as_float(data[i])); break; default: fprintf(out, "bad S4 position mask\n"); } if (saved_s4 & (1 << 10)) { VERTEX_OUT("color = (A=0x%02x, R=0x%02x, G=0x%02x, " "B=0x%02x)", data[i] >> 24, (data[i] >> 16) & 0xff, (data[i] >> 8) & 0xff, data[i] & 0xff); } if (saved_s4 & (1 << 11)) { VERTEX_OUT("spec = (A=0x%02x, R=0x%02x, G=0x%02x, " "B=0x%02x)", data[i] >> 24, (data[i] >> 16) & 0xff, (data[i] >> 8) & 0xff, data[i] & 0xff); } if (saved_s4 & (1 << 12)) VERTEX_OUT("width = 0x%08x)", data[i]); for (tc = 0; tc <= 7; tc++) { switch ((saved_s2 >> (tc * 4)) & 0xf) { case 0x0: VERTEX_OUT("T%d.X = %f", tc, int_as_float(data[i])); VERTEX_OUT("T%d.Y = %f", tc, int_as_float(data[i])); break; case 0x1: VERTEX_OUT("T%d.X = %f", tc, int_as_float(data[i])); VERTEX_OUT("T%d.Y = %f", tc, int_as_float(data[i])); VERTEX_OUT("T%d.Z = %f", tc, int_as_float(data[i])); break; case 0x2: VERTEX_OUT("T%d.X = %f", tc, int_as_float(data[i])); VERTEX_OUT("T%d.Y = %f", tc, int_as_float(data[i])); VERTEX_OUT("T%d.Z = %f", tc, int_as_float(data[i])); VERTEX_OUT("T%d.W = %f", tc, int_as_float(data[i])); break; case 0x3: VERTEX_OUT("T%d.X = %f", tc, int_as_float(data[i])); break; case 0x4: VERTEX_OUT("T%d.XY = 0x%08x half-float", tc, data[i]); break; case 0x5: VERTEX_OUT("T%d.XY = 0x%08x half-float", tc, data[i]); VERTEX_OUT("T%d.ZW = 0x%08x half-float", tc, data[i]); break; case 0xf: break; default: fprintf(out, "bad S2.T%d format\n", tc); } } vertex++; } } #endif } else { /* indirect vertices */ len = data[0] & 0x0000ffff; /* index count */ #if 0 if (data[0] & (1 << 17)) { /* random vertex access */ kgem_debug_print(data, offset, 0, "3DPRIMITIVE random indirect %s (%d)\n", primtype, len); if (len == 0) { /* vertex indices continue until 0xffff is found */ for (i = 1; i < count; i++) { if ((data[i] & 0xffff) == 0xffff) { kgem_debug_print(data, offset, i, " indices: (terminator)\n"); ret = i; goto out; } else if ((data[i] >> 16) == 0xffff) { kgem_debug_print(data, offset, i, " indices: 0x%04x, (terminator)\n", data[i] & 0xffff); ret = i; goto out; } else { kgem_debug_print(data, offset, i, " indices: 0x%04x, 0x%04x\n", data[i] & 0xffff, data[i] >> 16); } } fprintf(out, "3DPRIMITIVE: no terminator found in index buffer\n"); ret = count; goto out; } else { /* fixed size vertex index buffer */ for (j = 1, i = 0; i < len; i += 2, j++) { if (i * 2 == len - 1) { kgem_debug_print(data, offset, j, " indices: 0x%04x\n", data[j] & 0xffff); } else { kgem_debug_print(data, offset, j, " indices: 0x%04x, 0x%04x\n", data[j] & 0xffff, data[j] >> 16); } } } ret = (len + 1) / 2 + 1; goto out; } else { /* sequential vertex access */ kgem_debug_print(data, offset, 0, "3DPRIMITIVE sequential indirect %s, %d starting from " "%d\n", primtype, len, data[1] & 0xffff); kgem_debug_print(data, offset, 1, " start\n"); ret = 2; goto out; } #endif } return len; } static int decode_3d_1d(struct kgem *kgem, uint32_t offset) { uint32_t *data = kgem->batch + offset; unsigned int len, i, idx, word, map; const char *format, *zformat, *type; uint32_t opcode; static const struct { uint32_t opcode; int min_len; int max_len; const char *name; } opcodes_3d_1d[] = { { 0x86, 4, 4, "3DSTATE_CHROMA_KEY" }, { 0x88, 2, 2, "3DSTATE_CONSTANT_BLEND_COLOR" }, { 0x99, 2, 2, "3DSTATE_DEFAULT_DIFFUSE" }, { 0x9a, 2, 2, "3DSTATE_DEFAULT_SPECULAR" }, { 0x98, 2, 2, "3DSTATE_DEFAULT_Z" }, { 0x97, 2, 2, "3DSTATE_DEPTH_OFFSET_SCALE" }, { 0x9d, 65, 65, "3DSTATE_FILTER_COEFFICIENTS_4X4" }, { 0x9e, 4, 4, "3DSTATE_MONO_FILTER" }, { 0x89, 4, 4, "3DSTATE_FOG_MODE" }, { 0x8f, 2, 16, "3DSTATE_MAP_PALLETE_LOAD_32" }, { 0x83, 2, 2, "3DSTATE_SPAN_STIPPLE" }, { 0x8c, 2, 2, "3DSTATE_MAP_COORD_TRANSFORM" }, { 0x8b, 2, 2, "3DSTATE_MAP_VERTEX_TRANSFORM" }, { 0x8d, 3, 3, "3DSTATE_W_STATE" }, { 0x01, 2, 2, "3DSTATE_COLOR_FACTOR" }, { 0x02, 2, 2, "3DSTATE_MAP_COORD_SETBIND" }, }, *opcode_3d_1d; opcode = (data[0] & 0x00ff0000) >> 16; switch (opcode) { case 0x07: /* This instruction is unusual. A 0 length means just 1 DWORD instead of * 2. The 0 length is specified in one place to be unsupported, but * stated to be required in another, and 0 length LOAD_INDIRECTs appear * to cause no harm at least. */ kgem_debug_print(data, offset, 0, "3DSTATE_LOAD_INDIRECT\n"); len = (data[0] & 0x000000ff) + 1; i = 1; if (data[0] & (0x01 << 8)) { kgem_debug_print(data, offset, i++, "SIS.0\n"); kgem_debug_print(data, offset, i++, "SIS.1\n"); } if (data[0] & (0x02 << 8)) { kgem_debug_print(data, offset, i++, "DIS.0\n"); } if (data[0] & (0x04 << 8)) { kgem_debug_print(data, offset, i++, "SSB.0\n"); kgem_debug_print(data, offset, i++, "SSB.1\n"); } if (data[0] & (0x08 << 8)) { kgem_debug_print(data, offset, i++, "MSB.0\n"); kgem_debug_print(data, offset, i++, "MSB.1\n"); } if (data[0] & (0x10 << 8)) { kgem_debug_print(data, offset, i++, "PSP.0\n"); kgem_debug_print(data, offset, i++, "PSP.1\n"); } if (data[0] & (0x20 << 8)) { kgem_debug_print(data, offset, i++, "PSC.0\n"); kgem_debug_print(data, offset, i++, "PSC.1\n"); } assert(len == i); return len; case 0x04: kgem_debug_print(data, offset, 0, "3DSTATE_LOAD_STATE_IMMEDIATE_1\n"); len = (data[0] & 0x0000000f) + 2; i = 1; for (word = 0; word <= 8; word++) { if (data[0] & (1 << (4 + word))) { kgem_debug_print(data, offset, i, "S%d: 0x%08x\n", i, data[i]); i++; } } assert (len ==i); return len; case 0x03: kgem_debug_print(data, offset, 0, "3DSTATE_LOAD_STATE_IMMEDIATE_2\n"); len = (data[0] & 0x0000000f) + 2; i = 1; for (word = 6; word <= 14; word++) { if (data[0] & (1 << word)) { if (word == 6) kgem_debug_print(data, offset, i++, "TBCF\n"); else if (word >= 7 && word <= 10) { kgem_debug_print(data, offset, i++, "TB%dC\n", word - 7); kgem_debug_print(data, offset, i++, "TB%dA\n", word - 7); } else if (word >= 11 && word <= 14) { kgem_debug_print(data, offset, i, "TM%dS0: offset=0x%08x, %s\n", word - 11, data[i]&0xfffffffe, data[i]&1?"use fence":""); i++; kgem_debug_print(data, offset, i, "TM%dS1: height=%i, width=%i, %s\n", word - 11, data[i]>>21, (data[i]>>10)&0x3ff, data[i]&2?(data[i]&1?"y-tiled":"x-tiled"):""); i++; kgem_debug_print(data, offset, i, "TM%dS2: pitch=%i, \n", word - 11, ((data[i]>>21) + 1)*4); i++; kgem_debug_print(data, offset, i++, "TM%dS3\n", word - 11); kgem_debug_print(data, offset, i++, "TM%dS4: dflt color\n", word - 11); } } } assert (len == i); return len; case 0x00: kgem_debug_print(data, offset, 0, "3DSTATE_MAP_STATE\n"); len = (data[0] & 0x0000003f) + 2; kgem_debug_print(data, offset, 1, "mask\n"); i = 2; for (map = 0; map <= 15; map++) { if (data[1] & (1 << map)) { int width, height, pitch, dword; const char *tiling; dword = data[i]; kgem_debug_print(data, offset, i++, "map %d MS2 %s%s%s\n", map, dword&(1<<31)?"untrusted surface, ":"", dword&(1<<1)?"vertical line stride enable, ":"", dword&(1<<0)?"vertical ofs enable, ":""); dword = data[i]; width = ((dword >> 10) & ((1 << 11) - 1))+1; height = ((dword >> 21) & ((1 << 11) - 1))+1; tiling = "none"; if (dword & (1 << 2)) tiling = "fenced"; else if (dword & (1 << 1)) tiling = dword & (1 << 0) ? "Y" : "X"; type = " BAD"; format = "BAD"; switch ((dword>>7) & 0x7) { case 1: type = "8b"; switch ((dword>>3) & 0xf) { case 0: format = "I"; break; case 1: format = "L"; break; case 2: format = "A"; break; case 3: format = " mono"; break; } break; case 2: type = "16b"; switch ((dword>>3) & 0xf) { case 0: format = " rgb565"; break; case 1: format = " argb1555"; break; case 2: format = " argb4444"; break; case 5: format = " ay88"; break; case 6: format = " bump655"; break; case 7: format = "I"; break; case 8: format = "L"; break; case 9: format = "A"; break; } break; case 3: type = "32b"; switch ((dword>>3) & 0xf) { case 0: format = " argb8888"; break; case 1: format = " abgr8888"; break; case 2: format = " xrgb8888"; break; case 3: format = " xbgr8888"; break; case 4: format = " qwvu8888"; break; case 5: format = " axvu8888"; break; case 6: format = " lxvu8888"; break; case 7: format = " xlvu8888"; break; case 8: format = " argb2101010"; break; case 9: format = " abgr2101010"; break; case 10: format = " awvu2101010"; break; case 11: format = " gr1616"; break; case 12: format = " vu1616"; break; case 13: format = " xI824"; break; case 14: format = " xA824"; break; case 15: format = " xL824"; break; } break; case 5: type = "422"; switch ((dword>>3) & 0xf) { case 0: format = " yuv_swapy"; break; case 1: format = " yuv"; break; case 2: format = " yuv_swapuv"; break; case 3: format = " yuv_swapuvy"; break; } break; case 6: type = "compressed"; switch ((dword>>3) & 0x7) { case 0: format = " dxt1"; break; case 1: format = " dxt2_3"; break; case 2: format = " dxt4_5"; break; case 3: format = " fxt1"; break; case 4: format = " dxt1_rb"; break; } break; case 7: type = "4b indexed"; switch ((dword>>3) & 0xf) { case 7: format = " argb8888"; break; } break; } dword = data[i]; kgem_debug_print(data, offset, i++, "map %d MS3 [width=%d, height=%d, format=%s%s, tiling=%s%s]\n", map, width, height, type, format, tiling, dword&(1<<9)?" palette select":""); dword = data[i]; pitch = 4*(((dword >> 21) & ((1 << 11) - 1))+1); kgem_debug_print(data, offset, i++, "map %d MS4 [pitch=%d, max_lod=%i, vol_depth=%i, cube_face_ena=%x, %s]\n", map, pitch, (dword>>9)&0x3f, dword&0xff, (dword>>15)&0x3f, dword&(1<<8)?"miplayout legacy":"miplayout right"); } } assert (len == i); return len; case 0x85: len = (data[0] & 0x0000000f) + 2; assert (len == 2); kgem_debug_print(data, offset, 0, "3DSTATE_DEST_BUFFER_VARIABLES\n"); switch ((data[1] >> 8) & 0xf) { case 0x0: format = "g8"; break; case 0x1: format = "x1r5g5b5"; break; case 0x2: format = "r5g6b5"; break; case 0x3: format = "a8r8g8b8"; break; case 0x4: format = "ycrcb_swapy"; break; case 0x5: format = "ycrcb_normal"; break; case 0x6: format = "ycrcb_swapuv"; break; case 0x7: format = "ycrcb_swapuvy"; break; case 0x8: format = "a4r4g4b4"; break; case 0x9: format = "a1r5g5b5"; break; case 0xa: format = "a2r10g10b10"; break; default: format = "BAD"; break; } switch ((data[1] >> 2) & 0x3) { case 0x0: zformat = "u16"; break; case 0x1: zformat = "f16"; break; case 0x2: zformat = "u24x8"; break; default: zformat = "BAD"; break; } kgem_debug_print(data, offset, 1, "%s format, %s depth format, early Z %sabled\n", format, zformat, (data[1] & (1 << 31)) ? "en" : "dis"); return len; case 0x8e: { const char *name, *tiling; len = (data[0] & 0x0000000f) + 2; assert (len == 3); switch((data[1] >> 24) & 0x7) { case 0x3: name = "color"; break; case 0x7: name = "depth"; break; default: name = "unknown"; break; } tiling = "none"; if (data[1] & (1 << 23)) tiling = "fenced"; else if (data[1] & (1 << 22)) tiling = data[1] & (1 << 21) ? "Y" : "X"; kgem_debug_print(data, offset, 0, "3DSTATE_BUFFER_INFO\n"); kgem_debug_print(data, offset, 1, "%s, tiling = %s, pitch=%d\n", name, tiling, data[1]&0xffff); kgem_debug_print(data, offset, 2, "address\n"); return len; } case 0x81: len = (data[0] & 0x0000000f) + 2; assert (len == 3); kgem_debug_print(data, offset, 0, "3DSTATE_SCISSOR_RECTANGLE\n"); kgem_debug_print(data, offset, 1, "(%d,%d)\n", data[1] & 0xffff, data[1] >> 16); kgem_debug_print(data, offset, 2, "(%d,%d)\n", data[2] & 0xffff, data[2] >> 16); return len; case 0x80: len = (data[0] & 0x0000000f) + 2; assert (len == 5); kgem_debug_print(data, offset, 0, "3DSTATE_DRAWING_RECTANGLE\n"); kgem_debug_print(data, offset, 1, "%s\n", data[1]&(1<<30)?"depth ofs disabled ":""); kgem_debug_print(data, offset, 2, "(%d,%d)\n", data[2] & 0xffff, data[2] >> 16); kgem_debug_print(data, offset, 3, "(%d,%d)\n", data[3] & 0xffff, data[3] >> 16); kgem_debug_print(data, offset, 4, "(%d,%d)\n", data[4] & 0xffff, data[4] >> 16); return len; case 0x9c: len = (data[0] & 0x0000000f) + 2; assert (len == 7); kgem_debug_print(data, offset, 0, "3DSTATE_CLEAR_PARAMETERS\n"); kgem_debug_print(data, offset, 1, "prim_type=%s, clear=%s%s%s\n", data[1]&(1<<16)?"CLEAR_RECT":"ZONE_INIT", data[1]&(1<<2)?"color,":"", data[1]&(1<<1)?"depth,":"", data[1]&(1<<0)?"stencil,":""); kgem_debug_print(data, offset, 2, "clear color\n"); kgem_debug_print(data, offset, 3, "clear depth/stencil\n"); kgem_debug_print(data, offset, 4, "color value (rgba8888)\n"); kgem_debug_print(data, offset, 5, "depth value %f\n", int_as_float(data[5])); kgem_debug_print(data, offset, 6, "clear stencil\n"); return len; } for (idx = 0; idx < ARRAY_SIZE(opcodes_3d_1d); idx++) { opcode_3d_1d = &opcodes_3d_1d[idx]; if (((data[0] & 0x00ff0000) >> 16) == opcode_3d_1d->opcode) { len = 1; kgem_debug_print(data, offset, 0, "%s\n", opcode_3d_1d->name); if (opcode_3d_1d->max_len > 1) { len = (data[0] & 0x0000ffff) + 2; assert (len >= opcode_3d_1d->min_len && len <= opcode_3d_1d->max_len); } for (i = 1; i < len; i++) kgem_debug_print(data, offset, i, "dword %d\n", i); return len; } } kgem_debug_print(data, offset, 0, "3D UNKNOWN: 3d_1d opcode = 0x%x\n", opcode); return 1; } static int decode_3d_1c(struct kgem *kgem, uint32_t offset) { uint32_t *data = kgem->batch + offset; uint32_t opcode; opcode = (data[0] & 0x00f80000) >> 19; switch (opcode) { case 0x11: kgem_debug_print(data, offset, 0, "3DSTATE_DEPTH_SUBRECTANGLE_DISABLE\n"); return 1; case 0x10: kgem_debug_print(data, offset, 0, "3DSTATE_SCISSOR_ENABLE %s\n", data[0]&1?"enabled":"disabled"); return 1; case 0x01: kgem_debug_print(data, offset, 0, "3DSTATE_MAP_COORD_SET_I830\n"); return 1; case 0x0a: kgem_debug_print(data, offset, 0, "3DSTATE_MAP_CUBE_I830\n"); return 1; case 0x05: kgem_debug_print(data, offset, 0, "3DSTATE_MAP_TEX_STREAM_I830\n"); return 1; } kgem_debug_print(data, offset, 0, "3D UNKNOWN: 3d_1c opcode = 0x%x\n", opcode); return 1; } int kgem_gen2_decode_3d(struct kgem *kgem, uint32_t offset) { const static struct { uint32_t opcode; int min_len; int max_len; const char *name; } opcodes[] = { { 0x02, 1, 1, "3DSTATE_MODES_3" }, { 0x03, 1, 1, "3DSTATE_ENABLES_1"}, { 0x04, 1, 1, "3DSTATE_ENABLES_2"}, { 0x05, 1, 1, "3DSTATE_VFT0"}, { 0x06, 1, 1, "3DSTATE_AA"}, { 0x07, 1, 1, "3DSTATE_RASTERIZATION_RULES" }, { 0x08, 1, 1, "3DSTATE_MODES_1" }, { 0x09, 1, 1, "3DSTATE_STENCIL_TEST" }, { 0x0a, 1, 1, "3DSTATE_VFT1"}, { 0x0b, 1, 1, "3DSTATE_INDPT_ALPHA_BLEND" }, { 0x0c, 1, 1, "3DSTATE_MODES_5" }, { 0x0d, 1, 1, "3DSTATE_MAP_BLEND_OP" }, { 0x0e, 1, 1, "3DSTATE_MAP_BLEND_ARG" }, { 0x0f, 1, 1, "3DSTATE_MODES_2" }, { 0x15, 1, 1, "3DSTATE_FOG_COLOR" }, { 0x16, 1, 1, "3DSTATE_MODES_4" }, }; uint32_t *data = kgem->batch + offset; uint32_t opcode = (data[0] & 0x1f000000) >> 24; uint32_t idx; switch (opcode) { case 0x1f: return decode_3d_primitive(kgem, offset); case 0x1d: return decode_3d_1d(kgem, offset); case 0x1c: return decode_3d_1c(kgem, offset); } /* Catch the known instructions */ for (idx = 0; idx < ARRAY_SIZE(opcodes); idx++) { if (opcode == opcodes[idx].opcode) { unsigned int len = 1, i; kgem_debug_print(data, offset, 0, "%s\n", opcodes[idx].name); if (opcodes[idx].max_len > 1) { len = (data[0] & 0xf) + 2; assert(len >= opcodes[idx].min_len && len <= opcodes[idx].max_len); } for (i = 1; i < len; i++) kgem_debug_print(data, offset, i, "dword %d\n", i); return len; } } kgem_debug_print(data, offset, 0, "3D UNKNOWN: 3d opcode = 0x%x\n", opcode); return 1; } void kgem_gen2_finish_state(struct kgem *kgem) { memset(&state, 0, sizeof(state)); } xf86-video-intel-2.99.917/src/sna/Makefile.in0000664000175000017500000010274612445556117015370 00000000000000# Makefile.in generated by automake 1.14.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ # Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 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software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifndef _SNA_COMPILER_H_ #define _SNA_COMPILER_H_ #if defined(__GNUC__) && (__GNUC__ > 2) && defined(__OPTIMIZE__) #define likely(expr) (__builtin_expect (!!(expr), 1)) #define unlikely(expr) (__builtin_expect (!!(expr), 0)) #define noinline __attribute__((noinline)) #define force_inline inline __attribute__((always_inline)) #define fastcall __attribute__((regparm(3))) #define must_check __attribute__((warn_unused_result)) #define constant __attribute__((const)) #define pure __attribute__((pure)) #define tightly_packed __attribute__((__packed__)) #define flatten __attribute__((flatten)) #define page_aligned __attribute__((aligned(4096))) #else #define likely(expr) (expr) #define unlikely(expr) (expr) #define noinline #define force_inline inline #define fastcall #define must_check #define constant #define pure #define tighly_packed #define flatten #define page_aligned #endif #define HAS_GCC(major, minor) defined(__GNUC__) && (__GNUC__ > (major) || __GNUC__ == (major) && __GNUC_MINOR__ >= (minor)) #if HAS_GCC(4, 5) #define sse2 __attribute__((target("sse2,fpmath=sse"))) #define sse4_2 __attribute__((target("sse4.2,sse2,fpmath=sse"))) #endif #if HAS_GCC(4, 7) #define avx2 __attribute__((target("avx2,sse4.2,sse2,fpmath=sse"))) #endif #if HAS_GCC(4, 6) && defined(__OPTIMIZE__) #define fast __attribute__((optimize("Ofast"))) #else #define fast #endif #if HAS_GCC(4, 6) && defined(__OPTIMIZE__) #define fast_memcpy __attribute__((optimize("Ofast"))) __attribute__((target("inline-all-stringops"))) #elif HAS_GCC(4, 5) && defined(__OPTIMIZE__) #define fast_memcpy __attribute__((target("inline-all-stringops"))) #else #define fast_memcpy #endif #ifdef HAVE_VALGRIND #define VG(x) x #else #define VG(x) #endif #define VG_CLEAR(s) VG(memset(&s, 0, sizeof(s))) #define COMPILE_TIME_ASSERT(E) ((void)sizeof(char[1 - 2*!(E)])) #endif /* _SNA_COMPILER_H_ */ xf86-video-intel-2.99.917/src/sna/sna_display.c0000664000175000017500000060364612445276573016007 00000000000000/* * Copyright © 2007 Red Hat, Inc. * Copyright © 2013-2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Dave Airlie * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include #include #include "sna.h" #include "sna_reg.h" #include "fb/fbpict.h" #include "intel_options.h" #include "backlight.h" #include #include #include #if XF86_CRTC_VERSION >= 3 #define HAS_GAMMA 1 #else #define HAS_GAMMA 0 #endif #include #if defined(HAVE_X11_EXTENSIONS_DPMSCONST_H) #include #else #define DPMSModeOn 0 #define DPMSModeOff 3 #endif #include /* for xf86InterpretEDID */ #include #ifdef HAVE_VALGRIND #include #include #endif /* Minor discrepancy between 32-bit/64-bit ABI in old kernels */ union compat_mode_get_connector{ struct drm_mode_get_connector conn; uint32_t pad[20]; }; #define KNOWN_MODE_FLAGS ((1<<14)-1) #ifndef MONITOR_EDID_COMPLETE_RAWDATA #define MONITOR_EDID_COMPLETE_RAWDATA 1 #endif #ifndef DEFAULT_DPI #define DEFAULT_DPI 96 #endif #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 #define DRM_CLIENT_CAP_UNIVERSAL_PLANES 2 #define DRM_PLANE_TYPE_OVERLAY 0 #define DRM_PLANE_TYPE_PRIMARY 1 #define DRM_PLANE_TYPE_CURSOR 2 #define LOCAL_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xb9, struct local_mode_obj_get_properties) struct local_mode_obj_get_properties { uint64_t props_ptr; uint64_t prop_values_ptr; uint32_t count_props; uint32_t obj_id; uint32_t obj_type; uint32_t pad; }; #define LOCAL_MODE_OBJECT_PLANE 0xeeeeeeee #if 0 #define __DBG DBG #else #define __DBG(x) #endif extern XF86ConfigPtr xf86configptr; struct sna_crtc { xf86CrtcPtr base; struct drm_mode_modeinfo kmode; int dpms_mode; PixmapPtr slave_pixmap; DamagePtr slave_damage; struct kgem_bo *bo, *shadow_bo, *client_bo; struct sna_cursor *cursor; unsigned int last_cursor_size; uint32_t offset; bool shadow; bool fallback_shadow; bool transform; bool flip_pending; uint8_t id; uint8_t pipe; RegionRec client_damage; /* XXX overlap with shadow damage? */ uint16_t shadow_bo_width, shadow_bo_height; uint32_t rotation; struct plane { uint32_t id; struct { uint32_t prop; uint32_t supported; uint32_t current; } rotation; } primary, sprite; uint32_t mode_serial, flip_serial; uint32_t last_seq, wrap_seq; struct ust_msc swap; sna_flip_handler_t flip_handler; struct kgem_bo *flip_bo; void *flip_data; struct list shadow_link; }; struct sna_property { drmModePropertyPtr kprop; int num_atoms; /* if range prop, num_atoms == 1; if enum prop, num_atoms == num_enums + 1 */ Atom *atoms; }; struct sna_output { xf86OutputPtr base; unsigned id; unsigned serial; unsigned possible_encoders; unsigned attached_encoders; unsigned int is_panel : 1; unsigned int add_default_modes : 1; uint32_t edid_idx; uint32_t edid_blob_id; uint32_t edid_len; void *edid_raw; bool has_panel_limits; int panel_hdisplay; int panel_vdisplay; uint32_t dpms_id; int dpms_mode; struct backlight backlight; int backlight_active_level; int num_modes; struct drm_mode_modeinfo *modes; int num_props; uint32_t *prop_ids; uint64_t *prop_values; struct sna_property *props; }; enum { /* XXX copied from hw/xfree86/modes/xf86Crtc.c */ OPTION_PREFERRED_MODE, #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,14,99,1,0) OPTION_ZOOM_MODES, #endif OPTION_POSITION, OPTION_BELOW, OPTION_RIGHT_OF, OPTION_ABOVE, OPTION_LEFT_OF, OPTION_ENABLE, OPTION_DISABLE, OPTION_MIN_CLOCK, OPTION_MAX_CLOCK, OPTION_IGNORE, OPTION_ROTATE, OPTION_PANNING, OPTION_PRIMARY, OPTION_DEFAULT_MODES, }; static void sna_crtc_disable_cursor(struct sna *sna, struct sna_crtc *crtc); static bool is_zaphod(ScrnInfoPtr scrn) { return xf86IsEntityShared(scrn->entityList[0]); } inline static unsigned count_to_mask(int x) { return (1 << x) - 1; } static inline struct sna_output *to_sna_output(xf86OutputPtr output) { return output->driver_private; } static inline int to_connector_id(xf86OutputPtr output) { assert(to_sna_output(output)); assert(to_sna_output(output)->id); return to_sna_output(output)->id; } static inline struct sna_crtc *to_sna_crtc(xf86CrtcPtr crtc) { return crtc->driver_private; } static inline bool event_pending(int fd) { struct pollfd pfd; pfd.fd = fd; pfd.events = POLLIN; return poll(&pfd, 1, 0) == 1; } static bool sna_mode_wait_for_event(struct sna *sna) { struct pollfd pfd; pfd.fd = sna->kgem.fd; pfd.events = POLLIN; return poll(&pfd, 1, -1) == 1; } static inline uint32_t fb_id(struct kgem_bo *bo) { return bo->delta; } uint32_t sna_crtc_id(xf86CrtcPtr crtc) { if (to_sna_crtc(crtc) == NULL) return 0; return to_sna_crtc(crtc)->id; } int sna_crtc_to_pipe(xf86CrtcPtr crtc) { assert(to_sna_crtc(crtc)); return to_sna_crtc(crtc)->pipe; } uint32_t sna_crtc_to_sprite(xf86CrtcPtr crtc) { assert(to_sna_crtc(crtc)); return to_sna_crtc(crtc)->sprite.id; } bool sna_crtc_is_on(xf86CrtcPtr crtc) { assert(to_sna_crtc(crtc)); return to_sna_crtc(crtc)->bo != NULL; } bool sna_crtc_is_transformed(xf86CrtcPtr crtc) { assert(to_sna_crtc(crtc)); return to_sna_crtc(crtc)->transform; } static inline uint64_t msc64(struct sna_crtc *sna_crtc, uint32_t seq) { if (seq < sna_crtc->last_seq) { if (sna_crtc->last_seq - seq > 0x40000000) { sna_crtc->wrap_seq++; DBG(("%s: pipe=%d wrapped; was %u, now %u, wraps=%u\n", __FUNCTION__, sna_crtc->pipe, sna_crtc->last_seq, seq, sna_crtc->wrap_seq)); } else { ERR(("%s: pipe=%d msc went backwards; was %u, now %u\n", __FUNCTION__, sna_crtc->pipe, sna_crtc->last_seq, seq)); seq = sna_crtc->last_seq; } } sna_crtc->last_seq = seq; return (uint64_t)sna_crtc->wrap_seq << 32 | seq; } uint64_t sna_crtc_record_swap(xf86CrtcPtr crtc, int tv_sec, int tv_usec, unsigned seq) { struct sna_crtc *sna_crtc = to_sna_crtc(crtc); assert(sna_crtc); DBG(("%s: recording last swap on pipe=%d, frame %d, time %d.%06d\n", __FUNCTION__, sna_crtc->pipe, seq, tv_sec, tv_usec)); sna_crtc->swap.tv_sec = tv_sec; sna_crtc->swap.tv_usec = tv_usec; return sna_crtc->swap.msc = msc64(sna_crtc, seq); } const struct ust_msc *sna_crtc_last_swap(xf86CrtcPtr crtc) { static struct ust_msc zero; if (crtc == NULL) { return &zero; } else { struct sna_crtc *sna_crtc = to_sna_crtc(crtc); assert(sna_crtc); return &sna_crtc->swap; } } xf86CrtcPtr sna_mode_first_crtc(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); if (sna->mode.num_real_crtc) return config->crtc[0]; else return NULL; } #ifndef NDEBUG static void gem_close(int fd, uint32_t handle); static void assert_scanout(struct kgem *kgem, struct kgem_bo *bo, int width, int height) { struct drm_mode_fb_cmd info; assert(bo->scanout); VG_CLEAR(info); info.fb_id = fb_id(bo); assert(drmIoctl(kgem->fd, DRM_IOCTL_MODE_GETFB, &info) == 0); gem_close(kgem->fd, info.handle); assert(width == info.width && height == info.height); } #else #define assert_scanout(k, b, w, h) #endif static unsigned get_fb(struct sna *sna, struct kgem_bo *bo, int width, int height) { ScrnInfoPtr scrn = sna->scrn; struct drm_mode_fb_cmd arg; assert(bo->refcnt); assert(bo->proxy == NULL); assert(!bo->snoop); assert(8*bo->pitch >= width * scrn->bitsPerPixel); assert(height * bo->pitch <= kgem_bo_size(bo)); /* XXX crtc offset */ if (fb_id(bo)) { DBG(("%s: reusing fb=%d for handle=%d\n", __FUNCTION__, fb_id(bo), bo->handle)); assert_scanout(&sna->kgem, bo, width, height); return fb_id(bo); } DBG(("%s: create fb %dx%d@%d/%d\n", __FUNCTION__, width, height, scrn->depth, scrn->bitsPerPixel)); assert(bo->tiling != I915_TILING_Y); assert((bo->pitch & 63) == 0); VG_CLEAR(arg); arg.width = width; arg.height = height; arg.pitch = bo->pitch; arg.bpp = scrn->bitsPerPixel; arg.depth = scrn->depth; arg.handle = bo->handle; assert(sna->scrn->vtSema); /* must be master */ if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_ADDFB, &arg)) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "%s: failed to add fb: %dx%d depth=%d, bpp=%d, pitch=%d: %d\n", __FUNCTION__, width, height, scrn->depth, scrn->bitsPerPixel, bo->pitch, errno); return 0; } assert(arg.fb_id != 0); DBG(("%s: attached fb=%d to handle=%d\n", __FUNCTION__, arg.fb_id, arg.handle)); bo->scanout = true; return bo->delta = arg.fb_id; } static uint32_t gem_create(int fd, int size) { struct drm_i915_gem_create create; assert((size & 4095) == 0); VG_CLEAR(create); create.handle = 0; create.size = size; (void)drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); return create.handle; } static void *gem_mmap(int fd, int handle, int size) { struct drm_i915_gem_mmap_gtt mmap_arg; void *ptr; VG_CLEAR(mmap_arg); mmap_arg.handle = handle; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg)) return NULL; ptr = mmap(0, size, PROT_READ | PROT_WRITE, MAP_SHARED, fd, mmap_arg.offset); if (ptr == MAP_FAILED) return NULL; return ptr; } static void gem_close(int fd, uint32_t handle) { struct drm_gem_close close; VG_CLEAR(close); close.handle = handle; (void)drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close); } #define BACKLIGHT_NAME "Backlight" #define BACKLIGHT_DEPRECATED_NAME "BACKLIGHT" static Atom backlight_atom, backlight_deprecated_atom; #if HAVE_UDEV static void sna_backlight_uevent(int fd, void *closure) { struct sna *sna = closure; xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); int i; DBG(("%s()\n", __FUNCTION__)); /* Drain the event queue */ while (event_pending(fd)) { struct udev_device *dev; DBG(("%s: waiting for uevent\n", __FUNCTION__)); dev = udev_monitor_receive_device(sna->mode.backlight_monitor); if (dev == NULL) break; udev_device_unref(dev); } /* Query all backlights for any changes */ DBG(("%s: probing backlights for changes\n", __FUNCTION__)); for (i = 0; i < sna->mode.num_real_output; i++) { xf86OutputPtr output = config->output[i]; struct sna_output *sna_output = to_sna_output(output); int val; if (sna_output->dpms_mode != DPMSModeOn) continue; assert(output->randr_output); val = backlight_get(&sna_output->backlight); if (val < 0) continue; DBG(("%s(%s): backlight '%s' was %d, now %d\n", __FUNCTION__, output->name, sna_output->backlight.iface, sna_output->backlight_active_level, val)); if (val == sna_output->backlight_active_level) continue; sna_output->backlight_active_level = val; if (output->randr_output) { DBG(("%s(%s): sending change notification\n", __FUNCTION__, output->name)); RRChangeOutputProperty(output->randr_output, backlight_atom, XA_INTEGER, 32, PropModeReplace, 1, &val, TRUE, FALSE); RRChangeOutputProperty(output->randr_output, backlight_deprecated_atom, XA_INTEGER, 32, PropModeReplace, 1, &val, TRUE, FALSE); } } } static void sna_backlight_pre_init(struct sna *sna) { struct udev *u; struct udev_monitor *mon; #if !USE_BACKLIGHT return; #endif u = udev_new(); if (!u) return; mon = udev_monitor_new_from_netlink(u, "udev"); if (!mon) goto free_udev; if (udev_monitor_filter_add_match_subsystem_devtype(mon, "backlight", NULL)) goto free_monitor; if (udev_monitor_enable_receiving(mon)) goto free_monitor; sna->mode.backlight_handler = xf86AddGeneralHandler(udev_monitor_get_fd(mon), sna_backlight_uevent, sna); if (!sna->mode.backlight_handler) goto free_monitor; DBG(("%s: installed backlight monitor\n", __FUNCTION__)); sna->mode.backlight_monitor = mon; return; free_monitor: udev_monitor_unref(mon); free_udev: udev_unref(u); } static void sna_backlight_drain_uevents(struct sna *sna) { if (sna->mode.backlight_monitor == NULL) return; sna_backlight_uevent(udev_monitor_get_fd(sna->mode.backlight_monitor), sna); } static void sna_backlight_close(struct sna *sna) { struct udev *u; if (sna->mode.backlight_handler == NULL) return; xf86RemoveGeneralHandler(sna->mode.backlight_handler); u = udev_monitor_get_udev(sna->mode.backlight_monitor); udev_monitor_unref(sna->mode.backlight_monitor); udev_unref(u); sna->mode.backlight_handler = NULL; sna->mode.backlight_monitor = NULL; } #else static void sna_backlight_pre_init(struct sna *sna) { } static void sna_backlight_drain_uevents(struct sna *sna) { } static void sna_backlight_close(struct sna *sna) { } #endif static void sna_output_backlight_disable(struct sna_output *sna_output) { xf86OutputPtr output = sna_output->base; xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "Failed to set backlight %s for output %s, disabling\n", sna_output->backlight.iface, output->name); backlight_disable(&sna_output->backlight); if (output->randr_output) { RRDeleteOutputProperty(output->randr_output, backlight_atom); RRDeleteOutputProperty(output->randr_output, backlight_deprecated_atom); } } static int sna_output_backlight_set(struct sna_output *sna_output, int level) { int ret = 0; DBG(("%s(%s) level=%d, max=%d\n", __FUNCTION__, sna_output->base->name, level, sna_output->backlight.max)); if (backlight_set(&sna_output->backlight, level)) { sna_output_backlight_disable(sna_output); ret = -1; } /* Consume the uevent notification now so that we don't misconstrue * the change latter when we wake up and the output is in a different * state. */ sna_backlight_drain_uevents(to_sna(sna_output->base->scrn)); return ret; } static void sna_output_backlight_off(struct sna_output *sna_output) { DBG(("%s(%s)\n", __FUNCTION__, sna_output->base->name)); backlight_off(&sna_output->backlight); sna_output_backlight_set(sna_output, 0); } static void sna_output_backlight_on(struct sna_output *sna_output) { DBG(("%s(%s)\n", __FUNCTION__, sna_output->base->name)); sna_output_backlight_set(sna_output, sna_output->backlight_active_level); if (backlight_on(&sna_output->backlight) < 0) sna_output_backlight_disable(sna_output); } static int sna_output_backlight_get(xf86OutputPtr output) { struct sna_output *sna_output = output->driver_private; int level = backlight_get(&sna_output->backlight); DBG(("%s(%s) level=%d, max=%d\n", __FUNCTION__, output->name, level, sna_output->backlight.max)); return level; } static char * has_user_backlight_override(xf86OutputPtr output) { struct sna *sna = to_sna(output->scrn); const char *str; str = xf86GetOptValString(sna->Options, OPTION_BACKLIGHT); if (str == NULL) return NULL; DBG(("%s(%s) requested %s\n", __FUNCTION__, output->name, str)); if (*str == '\0') return (char *)str; if (backlight_exists(str) == BL_NONE) { xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "Unrecognised backlight control interface '%s'\n", str); return NULL; } return strdup(str); } static void sna_output_backlight_init(xf86OutputPtr output) { struct sna_output *sna_output = output->driver_private; struct pci_device *pci; MessageType from; char *best_iface; #if !USE_BACKLIGHT return; #endif from = X_CONFIG; best_iface = has_user_backlight_override(output); if (best_iface) goto done; /* XXX detect right backlight for multi-GPU/panels */ from = X_PROBED; pci = xf86GetPciInfoForEntity(to_sna(output->scrn)->pEnt->index); if (pci != NULL) best_iface = backlight_find_for_device(pci); done: DBG(("%s(%s) opening backlight %s\n", __FUNCTION__, output->name, best_iface ?: "none")); sna_output->backlight_active_level = backlight_open(&sna_output->backlight, best_iface); DBG(("%s(%s): initial backlight value %d\n", __FUNCTION__, output->name, sna_output->backlight_active_level)); if (sna_output->backlight_active_level < 0) return; switch (sna_output->backlight.type) { case BL_FIRMWARE: best_iface = (char *)"firmware"; break; case BL_PLATFORM: best_iface = (char *)"platform"; break; case BL_RAW: best_iface = (char *)"raw"; break; default: best_iface = (char *)"unknown"; break; } xf86DrvMsg(output->scrn->scrnIndex, from, "Found backlight control interface %s (type '%s') for output %s\n", sna_output->backlight.iface, best_iface, output->name); } static char *canonical_kmode_name(const struct drm_mode_modeinfo *kmode) { char tmp[32], *buf; int len; len = sprintf(tmp, "%dx%d%s", kmode->hdisplay, kmode->vdisplay, kmode->flags & V_INTERLACE ? "i" : ""); if ((unsigned)len >= sizeof(tmp)) return NULL; buf = malloc(len + 1); if (buf == NULL) return NULL; return memcpy(buf, tmp, len + 1); } static char *get_kmode_name(const struct drm_mode_modeinfo *kmode) { if (*kmode->name == '\0') return canonical_kmode_name(kmode); return strdup(kmode->name); } static DisplayModePtr mode_from_kmode(ScrnInfoPtr scrn, const struct drm_mode_modeinfo *kmode, DisplayModePtr mode) { DBG(("kmode: %s, clock=%d, %d %d %d %d %d, %d %d %d %d %d, flags=%x, type=%x\n", kmode->name, kmode->clock, kmode->hdisplay, kmode->hsync_start, kmode->hsync_end, kmode->htotal, kmode->hskew, kmode->vdisplay, kmode->vsync_start, kmode->vsync_end, kmode->vtotal, kmode->vscan, kmode->flags, kmode->type)); mode->status = MODE_OK; mode->Clock = kmode->clock; mode->HDisplay = kmode->hdisplay; mode->HSyncStart = kmode->hsync_start; mode->HSyncEnd = kmode->hsync_end; mode->HTotal = kmode->htotal; mode->HSkew = kmode->hskew; mode->VDisplay = kmode->vdisplay; mode->VSyncStart = kmode->vsync_start; mode->VSyncEnd = kmode->vsync_end; mode->VTotal = kmode->vtotal; mode->VScan = kmode->vscan; mode->Flags = kmode->flags; mode->name = get_kmode_name(kmode); if (kmode->type & DRM_MODE_TYPE_DRIVER) mode->type = M_T_DRIVER; if (kmode->type & DRM_MODE_TYPE_PREFERRED) mode->type |= M_T_PREFERRED; if (mode->status == MODE_OK && kmode->flags & ~KNOWN_MODE_FLAGS) mode->status = MODE_BAD; /* unknown flags => unhandled */ xf86SetModeCrtc(mode, scrn->adjustFlags); return mode; } static void mode_to_kmode(struct drm_mode_modeinfo *kmode, DisplayModePtr mode) { memset(kmode, 0, sizeof(*kmode)); kmode->clock = mode->Clock; kmode->hdisplay = mode->HDisplay; kmode->hsync_start = mode->HSyncStart; kmode->hsync_end = mode->HSyncEnd; kmode->htotal = mode->HTotal; kmode->hskew = mode->HSkew; kmode->vdisplay = mode->VDisplay; kmode->vsync_start = mode->VSyncStart; kmode->vsync_end = mode->VSyncEnd; kmode->vtotal = mode->VTotal; kmode->vscan = mode->VScan; kmode->flags = mode->Flags; if (mode->name) strncpy(kmode->name, mode->name, DRM_DISPLAY_MODE_LEN); kmode->name[DRM_DISPLAY_MODE_LEN-1] = 0; } static void sna_crtc_force_outputs_on(xf86CrtcPtr crtc) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(crtc->scrn); int i; assert(to_sna_crtc(crtc)); DBG(("%s(pipe=%d), currently? %d\n", __FUNCTION__, to_sna_crtc(crtc)->pipe, to_sna_crtc(crtc)->dpms_mode)); /* DPMS handling by the kernel is inconsistent, so after setting a * mode on an output presume that we intend for it to be on, or that * the kernel will force it on. * * So force DPMS to be on for all connected outputs, and restore * the backlight. */ for (i = 0; i < config->num_output; i++) { xf86OutputPtr output = config->output[i]; if (output->crtc != crtc) continue; output->funcs->dpms(output, DPMSModeOn); } to_sna_crtc(crtc)->dpms_mode = DPMSModeOn; #if XF86_CRTC_VERSION >= 3 crtc->active = TRUE; #endif } static void sna_crtc_force_outputs_off(xf86CrtcPtr crtc) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(crtc->scrn); int i; assert(to_sna_crtc(crtc)); DBG(("%s(pipe=%d), currently? %d\n", __FUNCTION__, to_sna_crtc(crtc)->pipe, to_sna_crtc(crtc)->dpms_mode)); /* DPMS handling by the kernel is inconsistent, so after setting a * mode on an output presume that we intend for it to be on, or that * the kernel will force it on. * * So force DPMS to be on for all connected outputs, and restore * the backlight. */ for (i = 0; i < config->num_output; i++) { xf86OutputPtr output = config->output[i]; if (output->crtc != crtc) continue; output->funcs->dpms(output, DPMSModeOff); } to_sna_crtc(crtc)->dpms_mode = DPMSModeOff; } static unsigned rotation_reduce(struct plane *p, unsigned rotation) { unsigned unsupported_rotations = rotation & ~p->rotation.supported; if (unsupported_rotations == 0) return rotation; #define RR_Reflect_XY (RR_Reflect_X | RR_Reflect_Y) if ((unsupported_rotations & RR_Reflect_XY) == RR_Reflect_XY && p->rotation.supported& RR_Rotate_180) { rotation &= ~RR_Reflect_XY; rotation ^= RR_Rotate_180; } if ((unsupported_rotations & RR_Rotate_180) && (p->rotation.supported& RR_Reflect_XY) == RR_Reflect_XY) { rotation ^= RR_Reflect_XY; rotation &= ~RR_Rotate_180; } #undef RR_Reflect_XY return rotation; } static bool rotation_set(struct sna *sna, struct plane *p, uint32_t desired) { #define LOCAL_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xbA, struct local_mode_obj_set_property) struct local_mode_obj_set_property { uint64_t value; uint32_t prop_id; uint32_t obj_id; uint32_t obj_type; uint32_t pad; } prop; if (desired == p->rotation.current) return true; if ((desired & p->rotation.supported) == 0) { errno = EINVAL; return false; } DBG(("%s: obj=%d, type=%x prop=%d set-rotation=%x\n", __FUNCTION__, p->id, LOCAL_MODE_OBJECT_PLANE, p->rotation.prop, desired)); assert(p->id); assert(p->rotation.prop); VG_CLEAR(prop); prop.obj_id = p->id; prop.obj_type = LOCAL_MODE_OBJECT_PLANE; prop.prop_id = p->rotation.prop; prop.value = desired; if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_OBJ_SETPROPERTY, &prop)) return false; p->rotation.current = desired; return true; } static void rotation_reset(struct plane *p) { if (p->rotation.prop == 0) return; p->rotation.current = 0; } bool sna_crtc_set_sprite_rotation(xf86CrtcPtr crtc, uint32_t rotation) { assert(to_sna_crtc(crtc)); DBG(("%s: CRTC:%d [pipe=%d], sprite=%u set-rotation=%x\n", __FUNCTION__, to_sna_crtc(crtc)->id, to_sna_crtc(crtc)->pipe, to_sna_crtc(crtc)->sprite.id, rotation)); return rotation_set(to_sna(crtc->scrn), &to_sna_crtc(crtc)->sprite, rotation_reduce(&to_sna_crtc(crtc)->sprite, rotation)); } static bool sna_crtc_apply(xf86CrtcPtr crtc) { struct sna *sna = to_sna(crtc->scrn); struct sna_crtc *sna_crtc = to_sna_crtc(crtc); xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(crtc->scrn); struct drm_mode_crtc arg; uint32_t output_ids[32]; int output_count = 0; int i; DBG(("%s CRTC:%d [pipe=%d], handle=%d\n", __FUNCTION__, sna_crtc->id, sna_crtc->pipe, sna_crtc->bo->handle)); if (!sna_crtc->kmode.clock) { ERR(("%s(CRTC:%d [pipe=%d]): attempted to set an invalid mode\n", __FUNCTION__, sna_crtc->id, sna_crtc->pipe)); return false; } assert(sna->mode.num_real_output < ARRAY_SIZE(output_ids)); sna_crtc_disable_cursor(sna, sna_crtc); if (!rotation_set(sna, &sna_crtc->primary, sna_crtc->rotation)) { ERR(("%s: set-primary-rotation failed (rotation-id=%d, rotation=%d) on CRTC:%d [pipe=%d], errno=%d\n", __FUNCTION__, sna_crtc->primary.rotation.prop, sna_crtc->rotation, sna_crtc->id, sna_crtc->pipe, errno)); sna_crtc->primary.rotation.supported &= ~sna_crtc->rotation; return false; } DBG(("%s: CRTC:%d [pipe=%d] primary rotation set to %x\n", __FUNCTION__, sna_crtc->id, sna_crtc->pipe, sna_crtc->rotation)); for (i = 0; i < sna->mode.num_real_output; i++) { xf86OutputPtr output = config->output[i]; /* Make sure we mark the output as off (and save the backlight) * before the kernel turns it off due to changing the pipe. * This is necessary as the kernel may turn off the backlight * and we lose track of the user settings. */ if (output->crtc == NULL) output->funcs->dpms(output, DPMSModeOff); if (output->crtc != crtc) continue; /* Skip over any hotunplugged outputs so that we can * recover in cases where the previous mode is now * only partially valid. */ if (!to_sna_output(output)->id) continue; DBG(("%s: attaching output '%s' %d [%d] to crtc:%d (pipe %d) (possible crtc:%x, possible clones:%x)\n", __FUNCTION__, output->name, i, to_connector_id(output), sna_crtc->id, sna_crtc->pipe, (uint32_t)output->possible_crtcs, (uint32_t)output->possible_clones)); assert(output->possible_crtcs & (1 << sna_crtc->pipe) || is_zaphod(crtc->scrn)); output_ids[output_count] = to_connector_id(output); if (++output_count == ARRAY_SIZE(output_ids)) { DBG(("%s: too many outputs (%d) for me!\n", __FUNCTION__, output_count)); errno = EINVAL; return false; } } if (output_count == 0) { DBG(("%s: no outputs\n", __FUNCTION__)); errno = EINVAL; return false; } VG_CLEAR(arg); arg.crtc_id = sna_crtc->id; arg.fb_id = fb_id(sna_crtc->bo); if (sna_crtc->transform || sna_crtc->slave_pixmap) { arg.x = 0; arg.y = 0; sna_crtc->offset = 0; } else { arg.x = crtc->x; arg.y = crtc->y; sna_crtc->offset = arg.y << 16 | arg.x; } arg.set_connectors_ptr = (uintptr_t)output_ids; arg.count_connectors = output_count; arg.mode = sna_crtc->kmode; arg.mode_valid = 1; DBG(("%s: applying crtc [%d, pipe=%d] mode=%dx%d+%d+%d@%d, fb=%d%s%s update to %d outputs [%d...]\n", __FUNCTION__, sna_crtc->id, sna_crtc->pipe, arg.mode.hdisplay, arg.mode.vdisplay, arg.x, arg.y, arg.mode.clock, arg.fb_id, sna_crtc->shadow ? " [shadow]" : "", sna_crtc->transform ? " [transformed]" : "", output_count, output_count ? output_ids[0] : 0)); if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_SETCRTC, &arg)) return false; sna_crtc->mode_serial++; sna_crtc_force_outputs_on(crtc); return true; } static bool overlap(const BoxRec *a, const BoxRec *b) { if (a->x1 >= b->x2) return false; if (a->x2 <= b->x1) return false; if (a->y1 >= b->y2) return false; if (a->y2 <= b->y1) return false; return true; } static bool wait_for_shadow(struct sna *sna, struct sna_pixmap *priv, unsigned flags) { PixmapPtr pixmap = priv->pixmap; DamagePtr damage; struct kgem_bo *bo, *tmp; int flip_active; bool ret = true; DBG(("%s: flags=%x, flips=%d, handle=%d, shadow=%d\n", __FUNCTION__, flags, sna->mode.flip_active, priv->gpu_bo->handle, sna->mode.shadow->handle)); assert(priv->move_to_gpu_data == sna); assert(sna->mode.shadow != priv->gpu_bo); if (flags == 0 || pixmap != sna->front || !sna->mode.shadow_damage) goto done; if ((flags & MOVE_WRITE) == 0) { if ((flags & __MOVE_SCANOUT) == 0) { struct sna_crtc *crtc; list_for_each_entry(crtc, &sna->mode.shadow_crtc, shadow_link) { if (overlap(&sna->mode.shadow_region.extents, &crtc->base->bounds)) { DrawableRec draw; RegionRec region; draw.width = crtc->base->mode.HDisplay; draw.height = crtc->base->mode.VDisplay; draw.depth = sna->front->drawable.depth; draw.bitsPerPixel = sna->front->drawable.bitsPerPixel; DBG(("%s: copying replaced CRTC: (%d, %d), (%d, %d), handle=%d\n", __FUNCTION__, crtc->base->bounds.x1, crtc->base->bounds.y1, crtc->base->bounds.x2, crtc->base->bounds.y2, crtc->client_bo->handle)); ret &= sna->render.copy_boxes(sna, GXcopy, &draw, crtc->client_bo, -crtc->base->bounds.x1, -crtc->base->bounds.y1, &pixmap->drawable, priv->gpu_bo, 0, 0, &crtc->base->bounds, 1, 0); region.extents = crtc->base->bounds; region.data = NULL; RegionSubtract(&sna->mode.shadow_region, &sna->mode.shadow_region, ®ion); } } } return ret; } assert(sna->mode.shadow_active); damage = sna->mode.shadow_damage; sna->mode.shadow_damage = NULL; flip_active = sna->mode.flip_active; if (flip_active) { struct sna_crtc *crtc; list_for_each_entry(crtc, &sna->mode.shadow_crtc, shadow_link) flip_active -= crtc->flip_pending; DBG(("%s: %d flips still pending, shadow flip_active=%d\n", __FUNCTION__, sna->mode.flip_active, flip_active)); } if (flip_active) { /* raw cmd to avoid setting wedged in the middle of an op */ drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_GEM_THROTTLE, 0); sna->kgem.need_throttle = false; while (flip_active && sna_mode_wakeup(sna)) { struct sna_crtc *crtc; flip_active = sna->mode.flip_active; list_for_each_entry(crtc, &sna->mode.shadow_crtc, shadow_link) flip_active -= crtc->flip_pending; } DBG(("%s: after waiting %d flips outstanding, flip_active=%d\n", __FUNCTION__, sna->mode.flip_active, flip_active)); } bo = sna->mode.shadow; if (flip_active) { bo = kgem_create_2d(&sna->kgem, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, priv->gpu_bo->tiling, CREATE_EXACT | CREATE_SCANOUT); if (bo != NULL) { DBG(("%s: replacing still-attached GPU bo handle=%d, flips=%d\n", __FUNCTION__, priv->gpu_bo->tiling, sna->mode.flip_active)); RegionUninit(&sna->mode.shadow_region); sna->mode.shadow_region.extents.x1 = 0; sna->mode.shadow_region.extents.y1 = 0; sna->mode.shadow_region.extents.x2 = pixmap->drawable.width; sna->mode.shadow_region.extents.y2 = pixmap->drawable.height; sna->mode.shadow_region.data = NULL; } else { while (sna->mode.flip_active && sna_mode_wait_for_event(sna)) sna_mode_wakeup(sna); bo = sna->mode.shadow; } } if (bo->refcnt > 1) { bo = kgem_create_2d(&sna->kgem, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.bitsPerPixel, priv->gpu_bo->tiling, CREATE_EXACT | CREATE_SCANOUT); if (bo != NULL) { DBG(("%s: replacing exported GPU bo\n", __FUNCTION__)); RegionUninit(&sna->mode.shadow_region); sna->mode.shadow_region.extents.x1 = 0; sna->mode.shadow_region.extents.y1 = 0; sna->mode.shadow_region.extents.x2 = pixmap->drawable.width; sna->mode.shadow_region.extents.y2 = pixmap->drawable.height; sna->mode.shadow_region.data = NULL; } else bo = sna->mode.shadow; } sna->mode.shadow_damage = damage; RegionSubtract(&sna->mode.shadow_region, &sna->mode.shadow_region, &sna->mode.shadow_cancel); while (!list_is_empty(&sna->mode.shadow_crtc)) { struct sna_crtc *crtc = list_first_entry(&sna->mode.shadow_crtc, struct sna_crtc, shadow_link); if (overlap(&crtc->base->bounds, &sna->mode.shadow_region.extents)) { RegionRec region; DrawableRec draw; draw.width = crtc->base->mode.HDisplay; draw.height = crtc->base->mode.VDisplay; draw.depth = sna->front->drawable.depth; draw.bitsPerPixel = sna->front->drawable.bitsPerPixel; DBG(("%s: copying replaced CRTC: (%d, %d), (%d, %d), handle=%d\n", __FUNCTION__, crtc->base->bounds.x1, crtc->base->bounds.y1, crtc->base->bounds.x2, crtc->base->bounds.y2, crtc->client_bo->handle)); ret = sna->render.copy_boxes(sna, GXcopy, &draw, crtc->client_bo, -crtc->base->bounds.x1, -crtc->base->bounds.y1, &pixmap->drawable, bo, 0, 0, &crtc->base->bounds, 1, 0); region.extents = crtc->base->bounds; region.data = NULL; RegionSubtract(&sna->mode.shadow_region, &sna->mode.shadow_region, ®ion); } kgem_bo_destroy(&sna->kgem, crtc->client_bo); crtc->client_bo = NULL; list_del(&crtc->shadow_link); } if (RegionNotEmpty(&sna->mode.shadow_region)) { DBG(("%s: copying existing GPU damage: %dx(%d, %d), (%d, %d)\n", __FUNCTION__, region_num_rects(&sna->mode.shadow_region), sna->mode.shadow_region.extents.x1, sna->mode.shadow_region.extents.y1, sna->mode.shadow_region.extents.x2, sna->mode.shadow_region.extents.y2)); ret = sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, priv->gpu_bo, 0, 0, &pixmap->drawable, bo, 0, 0, region_rects(&sna->mode.shadow_region), region_num_rects(&sna->mode.shadow_region), 0); } if (priv->cow) sna_pixmap_undo_cow(sna, priv, 0); sna_pixmap_unmap(pixmap, priv); DBG(("%s: setting front pixmap to handle=%d\n", __FUNCTION__, bo->handle)); tmp = priv->gpu_bo; priv->gpu_bo = bo; if (bo != sna->mode.shadow) kgem_bo_destroy(&sna->kgem, sna->mode.shadow); sna->mode.shadow = tmp; sna_dri2_pixmap_update_bo(sna, pixmap, bo); done: RegionEmpty(&sna->mode.shadow_cancel); RegionEmpty(&sna->mode.shadow_region); sna->mode.shadow_dirty = false; priv->move_to_gpu_data = NULL; priv->move_to_gpu = NULL; return ret; } bool sna_pixmap_discard_shadow_damage(struct sna_pixmap *priv, const RegionRec *region) { struct sna *sna; if (priv->move_to_gpu != wait_for_shadow) return false; sna = priv->move_to_gpu_data; if (region) { DBG(("%s: discarding region %dx[(%d, %d), (%d, %d)] from damage %dx[(%d, %d], (%d, %d)]\n", __FUNCTION__, region_num_rects(region), region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, region_num_rects(&sna->mode.shadow_region), sna->mode.shadow_region.extents.x1, sna->mode.shadow_region.extents.y1, sna->mode.shadow_region.extents.x2, sna->mode.shadow_region.extents.y2)); RegionSubtract(&sna->mode.shadow_region, &sna->mode.shadow_region, (RegionPtr)region); RegionUnion(&sna->mode.shadow_cancel, &sna->mode.shadow_cancel, (RegionPtr)region); } else { DBG(("%s: discarding all damage %dx[(%d, %d], (%d, %d)]\n", __FUNCTION__, region_num_rects(&sna->mode.shadow_region), sna->mode.shadow_region.extents.x1, sna->mode.shadow_region.extents.y1, sna->mode.shadow_region.extents.x2, sna->mode.shadow_region.extents.y2)); RegionEmpty(&sna->mode.shadow_region); RegionUninit(&sna->mode.shadow_cancel); sna->mode.shadow_cancel.extents.x1 = 0; sna->mode.shadow_cancel.extents.y1 = 0; sna->mode.shadow_cancel.extents.x2 = sna->front->drawable.width; sna->mode.shadow_cancel.extents.y2 = sna->front->drawable.height; sna->mode.shadow_cancel.data = NULL; } return RegionNil(&sna->mode.shadow_region); } static bool sna_mode_enable_shadow(struct sna *sna) { ScreenPtr screen = sna->scrn->pScreen; DBG(("%s\n", __FUNCTION__)); assert(sna->mode.shadow == NULL); assert(sna->mode.shadow_damage == NULL); assert(sna->mode.shadow_active == 0); sna->mode.shadow_damage = DamageCreate(NULL, NULL, DamageReportNone, TRUE, screen, screen); if (!sna->mode.shadow_damage) return false; DamageRegister(&sna->front->drawable, sna->mode.shadow_damage); return true; } static void sna_mode_disable_shadow(struct sna *sna) { struct sna_pixmap *priv; if (!sna->mode.shadow_damage) return; DBG(("%s\n", __FUNCTION__)); priv = sna_pixmap(sna->front); if (priv->move_to_gpu == wait_for_shadow) priv->move_to_gpu(sna, priv, 0); DamageUnregister(&sna->front->drawable, sna->mode.shadow_damage); DamageDestroy(sna->mode.shadow_damage); sna->mode.shadow_damage = NULL; if (sna->mode.shadow) { kgem_bo_destroy(&sna->kgem, sna->mode.shadow); sna->mode.shadow = NULL; } assert(sna->mode.shadow_active == 0); sna->mode.shadow_dirty = false; } static void sna_crtc_slave_damage(DamagePtr damage, RegionPtr region, void *closure) { struct sna_crtc *crtc = closure; struct sna *sna = to_sna(crtc->base->scrn); RegionPtr scr; DBG(("%s: pushing damage [(%d, %d), (%d, %d) x %d] to CRTC [pipe=%d] (%d, %d)\n", __FUNCTION__, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, region_num_rects(region), crtc->pipe, crtc->base->x, crtc->base->y)); assert(crtc->slave_damage == damage); assert(sna->mode.shadow_damage); RegionTranslate(region, crtc->base->x, crtc->base->y); scr = DamageRegion(sna->mode.shadow_damage); RegionUnion(scr, scr, region); RegionTranslate(region, -crtc->base->x, -crtc->base->y); } static bool sna_crtc_enable_shadow(struct sna *sna, struct sna_crtc *crtc) { if (crtc->shadow) { assert(sna->mode.shadow_damage && sna->mode.shadow_active); return true; } DBG(("%s: enabling for crtc %d\n", __FUNCTION__, crtc->id)); if (!sna->mode.shadow_active) { if (!sna_mode_enable_shadow(sna)) return false; assert(sna->mode.shadow_damage); assert(sna->mode.shadow == NULL); } if (crtc->slave_pixmap) { assert(crtc->slave_damage == NULL); crtc->slave_damage = DamageCreate(sna_crtc_slave_damage, NULL, DamageReportRawRegion, TRUE, sna->scrn->pScreen, crtc); if (crtc->slave_damage == NULL) { if (!--sna->mode.shadow_active) sna_mode_disable_shadow(sna); return false; } DamageRegister(&crtc->slave_pixmap->drawable, crtc->slave_damage); } crtc->shadow = true; sna->mode.shadow_active++; return true; } static void sna_crtc_disable_override(struct sna *sna, struct sna_crtc *crtc) { if (crtc->client_bo == NULL) return; if (!crtc->transform) { DrawableRec tmp; tmp.width = crtc->base->mode.HDisplay; tmp.height = crtc->base->mode.VDisplay; tmp.depth = sna->front->drawable.depth; tmp.bitsPerPixel = sna->front->drawable.bitsPerPixel; sna->render.copy_boxes(sna, GXcopy, &tmp, crtc->client_bo, -crtc->base->bounds.x1, -crtc->base->bounds.y1, &sna->front->drawable, __sna_pixmap_get_bo(sna->front), 0, 0, &crtc->base->bounds, 1, 0); list_del(&crtc->shadow_link); } kgem_bo_destroy(&sna->kgem, crtc->client_bo); crtc->client_bo = NULL; } static void sna_crtc_disable_shadow(struct sna *sna, struct sna_crtc *crtc) { crtc->fallback_shadow = false; if (!crtc->shadow) return; DBG(("%s: disabling for crtc %d\n", __FUNCTION__, crtc->id)); assert(sna->mode.shadow_active > 0); if (crtc->slave_damage) { assert(crtc->slave_pixmap); DamageUnregister(&crtc->slave_pixmap->drawable, crtc->slave_damage); DamageDestroy(crtc->slave_damage); crtc->slave_damage = NULL; } sna_crtc_disable_override(sna, crtc); if (!--sna->mode.shadow_active) sna_mode_disable_shadow(sna); crtc->shadow = false; } static void __sna_crtc_disable(struct sna *sna, struct sna_crtc *sna_crtc) { sna_crtc->mode_serial++; sna_crtc_disable_cursor(sna, sna_crtc); rotation_set(sna, &sna_crtc->primary, RR_Rotate_0); sna_crtc_disable_shadow(sna, sna_crtc); if (sna_crtc->bo) { assert(sna_crtc->bo->active_scanout); assert(sna_crtc->bo->refcnt >= sna_crtc->bo->active_scanout); sna_crtc->bo->active_scanout--; kgem_bo_destroy(&sna->kgem, sna_crtc->bo); sna_crtc->bo = NULL; assert(sna->mode.front_active); sna->mode.front_active--; sna->mode.dirty = true; } if (sna_crtc->shadow_bo) { kgem_bo_destroy(&sna->kgem, sna_crtc->shadow_bo); sna_crtc->shadow_bo = NULL; } sna_crtc->transform = false; assert(!sna_crtc->shadow); } static void sna_crtc_disable(xf86CrtcPtr crtc) { struct sna *sna = to_sna(crtc->scrn); struct sna_crtc *sna_crtc = to_sna_crtc(crtc); struct drm_mode_crtc arg; if (sna_crtc == NULL) return; DBG(("%s: disabling crtc [%d, pipe=%d]\n", __FUNCTION__, sna_crtc->id, sna_crtc->pipe)); sna_crtc_force_outputs_off(crtc); assert(sna_crtc->dpms_mode == DPMSModeOff); memset(&arg, 0, sizeof(arg)); arg.crtc_id = sna_crtc->id; (void)drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_SETCRTC, &arg); __sna_crtc_disable(sna, sna_crtc); } static void update_flush_interval(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); int i, max_vrefresh = 0; DBG(("%s: front_active=%d\n", __FUNCTION__, sna->mode.front_active)); for (i = 0; i < sna->mode.num_real_crtc; i++) { xf86CrtcPtr crtc = config->crtc[i]; assert(to_sna_crtc(crtc) != NULL); if (!crtc->enabled) { DBG(("%s: CRTC:%d (pipe %d) disabled\n", __FUNCTION__,i, to_sna_crtc(crtc)->pipe)); assert(to_sna_crtc(crtc)->bo == NULL); continue; } if (to_sna_crtc(crtc)->dpms_mode != DPMSModeOn) { DBG(("%s: CRTC:%d (pipe %d) turned off\n", __FUNCTION__,i, to_sna_crtc(crtc)->pipe)); continue; } DBG(("%s: CRTC:%d (pipe %d) vrefresh=%f\n", __FUNCTION__, i, to_sna_crtc(crtc)->pipe, xf86ModeVRefresh(&crtc->mode))); max_vrefresh = max(max_vrefresh, xf86ModeVRefresh(&crtc->mode)); } if (max_vrefresh == 0) { assert(sna->mode.front_active == 0); sna->vblank_interval = 0; } else sna->vblank_interval = 1000 / max_vrefresh; /* Hz -> ms */ DBG(("max_vrefresh=%d, vblank_interval=%d ms\n", max_vrefresh, sna->vblank_interval)); } static struct kgem_bo *sna_create_bo_for_fbcon(struct sna *sna, const struct drm_mode_fb_cmd *fbcon) { struct drm_gem_flink flink; struct kgem_bo *bo; int ret; /* Create a new reference for the fbcon so that we can track it * using a normal bo and so that when we call gem_close on it we * delete our reference and not fbcon's! */ VG_CLEAR(flink); flink.handle = fbcon->handle; ret = drmIoctl(sna->kgem.fd, DRM_IOCTL_GEM_FLINK, &flink); if (ret) return NULL; bo = kgem_create_for_name(&sna->kgem, flink.name); if (bo == NULL) return NULL; bo->pitch = fbcon->pitch; return bo; } /* Copy the current framebuffer contents into the front-buffer for a seamless * transition from e.g. plymouth. */ void sna_copy_fbcon(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); struct drm_mode_fb_cmd fbcon; PixmapRec scratch; struct sna_pixmap *priv; struct kgem_bo *bo; BoxRec box; bool ok; int sx, sy; int dx, dy; int i; if (wedged(sna)) return; DBG(("%s\n", __FUNCTION__)); assert((sna->flags & SNA_IS_HOSTED) == 0); priv = sna_pixmap_move_to_gpu(sna->front, MOVE_WRITE | __MOVE_SCANOUT); if (priv == NULL) return; /* Scan the connectors for a framebuffer and assume that is the fbcon */ VG_CLEAR(fbcon); fbcon.fb_id = 0; for (i = 0; i < sna->mode.num_real_crtc; i++) { struct sna_crtc *crtc = to_sna_crtc(config->crtc[i]); struct drm_mode_crtc mode; assert(crtc != NULL); VG_CLEAR(mode); mode.crtc_id = crtc->id; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETCRTC, &mode)) continue; if (!mode.fb_id) continue; fbcon.fb_id = mode.fb_id; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETFB, &fbcon)) { fbcon.fb_id = 0; continue; } break; } if (fbcon.fb_id == 0) { DBG(("%s: no fbcon found\n", __FUNCTION__)); return; } if (fbcon.fb_id == fb_id(priv->gpu_bo)) { DBG(("%s: fb already installed as scanout\n", __FUNCTION__)); return; } DBG(("%s: found fbcon, size=%dx%d, depth=%d, bpp=%d\n", __FUNCTION__, fbcon.width, fbcon.height, fbcon.depth, fbcon.bpp)); bo = sna_create_bo_for_fbcon(sna, &fbcon); if (bo == NULL) return; DBG(("%s: fbcon handle=%d\n", __FUNCTION__, bo->handle)); scratch.drawable.width = fbcon.width; scratch.drawable.height = fbcon.height; scratch.drawable.depth = fbcon.depth; scratch.drawable.bitsPerPixel = fbcon.bpp; scratch.devPrivate.ptr = NULL; box.x1 = box.y1 = 0; box.x2 = min(fbcon.width, sna->front->drawable.width); box.y2 = min(fbcon.height, sna->front->drawable.height); sx = dx = 0; if (box.x2 < (uint16_t)fbcon.width) sx = (fbcon.width - box.x2) / 2; if (box.x2 < sna->front->drawable.width) dx = (sna->front->drawable.width - box.x2) / 2; sy = dy = 0; if (box.y2 < (uint16_t)fbcon.height) sy = (fbcon.height - box.y2) / 2; if (box.y2 < sna->front->drawable.height) dy = (sna->front->drawable.height - box.y2) / 2; ok = sna->render.copy_boxes(sna, GXcopy, &scratch.drawable, bo, sx, sy, &sna->front->drawable, priv->gpu_bo, dx, dy, &box, 1, 0); if (!DAMAGE_IS_ALL(priv->gpu_damage)) sna_damage_add_box(&priv->gpu_damage, &box); kgem_bo_destroy(&sna->kgem, bo); #if ABI_VIDEODRV_VERSION >= SET_ABI_VERSION(10, 0) sna->scrn->pScreen->canDoBGNoneRoot = ok; #endif } static bool use_shadow(struct sna *sna, xf86CrtcPtr crtc) { RRTransformPtr transform; PictTransform crtc_to_fb; struct pict_f_transform f_crtc_to_fb, f_fb_to_crtc; unsigned pitch_limit; struct sna_pixmap *priv; BoxRec b; assert(sna->scrn->virtualX && sna->scrn->virtualY); if (sna->flags & SNA_FORCE_SHADOW) { DBG(("%s: forcing shadow\n", __FUNCTION__)); return true; } if (to_sna_crtc(crtc)->fallback_shadow) { DBG(("%s: fallback shadow\n", __FUNCTION__)); return true; } if (sna->flags & SNA_TEAR_FREE && to_sna_crtc(crtc)->slave_pixmap) { DBG(("%s: TearFree shadow required\n", __FUNCTION__)); return true; } if (sna->scrn->virtualX > sna->mode.max_crtc_width || sna->scrn->virtualY > sna->mode.max_crtc_height) { DBG(("%s: framebuffer too large (%dx%d) > (%dx%d)\n", __FUNCTION__, sna->scrn->virtualX, sna->scrn->virtualY, sna->mode.max_crtc_width, sna->mode.max_crtc_height)); return true; } priv = sna_pixmap_force_to_gpu(sna->front, MOVE_READ | __MOVE_SCANOUT); if (priv == NULL) return true; /* maybe we can create a bo for the scanout? */ if (sna->kgem.gen == 071) pitch_limit = priv->gpu_bo->tiling ? 16 * 1024 : 32 * 1024; else if ((sna->kgem.gen >> 3) > 4) pitch_limit = 32 * 1024; else if ((sna->kgem.gen >> 3) == 4) pitch_limit = priv->gpu_bo->tiling ? 16 * 1024 : 32 * 1024; else if ((sna->kgem.gen >> 3) == 3) pitch_limit = priv->gpu_bo->tiling ? 8 * 1024 : 16 * 1024; else pitch_limit = 8 * 1024; DBG(("%s: gpu bo handle=%d tiling=%d pitch=%d, limit=%d\n", __FUNCTION__, priv->gpu_bo->handle, priv->gpu_bo->tiling, priv->gpu_bo->pitch, pitch_limit)); if (priv->gpu_bo->pitch > pitch_limit) return true; if (priv->gpu_bo->tiling && sna->flags & SNA_LINEAR_FB) { DBG(("%s: gpu bo is tiled, need linear, forcing shadow\n", __FUNCTION__)); return true; } transform = NULL; if (crtc->transformPresent) transform = &crtc->transform; if (RRTransformCompute(crtc->x, crtc->y, crtc->mode.HDisplay, crtc->mode.VDisplay, crtc->rotation, transform, &crtc_to_fb, &f_crtc_to_fb, &f_fb_to_crtc)) { bool needs_transform = true; unsigned rotation = rotation_reduce(&to_sna_crtc(crtc)->primary, crtc->rotation); DBG(("%s: natively supported rotation? rotation=%x & supported=%x == %d\n", __FUNCTION__, crtc->rotation, to_sna_crtc(crtc)->primary.rotation.supported, !!(crtc->rotation & to_sna_crtc(crtc)->primary.rotation.supported))); if (to_sna_crtc(crtc)->primary.rotation.supported & rotation) needs_transform = RRTransformCompute(crtc->x, crtc->y, crtc->mode.HDisplay, crtc->mode.VDisplay, RR_Rotate_0, transform, NULL, NULL, NULL); if (needs_transform) { DBG(("%s: RandR transform present\n", __FUNCTION__)); return true; } } /* And finally check that it is entirely visible */ b.x1 = b.y1 = 0; b.x2 = crtc->mode.HDisplay; b.y2 = crtc->mode.VDisplay; pixman_f_transform_bounds(&f_crtc_to_fb, &b); DBG(("%s? bounds (%d, %d), (%d, %d), framebufer %dx%d\n", __FUNCTION__, b.x1, b.y1, b.x2, b.y2, sna->scrn->virtualX, sna->scrn->virtualY)); if (b.x1 < 0 || b.y1 < 0 || b.x2 > sna->scrn->virtualX || b.y2 > sna->scrn->virtualY) { DBG(("%s: scanout is partly outside the framebuffer\n", __FUNCTION__)); return true; } return false; } static void set_shadow(struct sna *sna, RegionPtr region) { struct sna_pixmap *priv = sna_pixmap(sna->front); assert(priv->gpu_bo); assert(sna->mode.shadow); DBG(("%s: waiting for region %dx[(%d, %d), (%d, %d)], front handle=%d, shadow handle=%d\n", __FUNCTION__, region_num_rects(region), region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, priv->gpu_bo->handle, sna->mode.shadow->handle)); assert(priv->pinned & PIN_SCANOUT); assert((priv->pinned & PIN_PRIME) == 0); assert(sna->mode.shadow != priv->gpu_bo); RegionCopy(&sna->mode.shadow_region, region); priv->move_to_gpu = wait_for_shadow; priv->move_to_gpu_data = sna; } static struct kgem_bo * get_scanout_bo(struct sna *sna, PixmapPtr pixmap) { struct sna_pixmap *priv; priv = sna_pixmap_force_to_gpu(pixmap, MOVE_READ | __MOVE_SCANOUT); if (!priv) return NULL; if (priv->gpu_bo->pitch & 63) { struct kgem_bo *tmp; BoxRec b; DBG(("%s: converting to scanout bo due to bad pitch [%d]\n", __FUNCTION__, priv->gpu_bo->pitch)); if (priv->pinned) { DBG(("%s: failed as the Pixmap is already pinned [%x]\n", __FUNCTION__, priv->pinned)); return NULL; } tmp = kgem_create_2d(&sna->kgem, pixmap->drawable.width, pixmap->drawable.height, sna->scrn->bitsPerPixel, priv->gpu_bo->tiling, CREATE_EXACT | CREATE_SCANOUT); if (tmp == NULL) { DBG(("%s: allocation failed\n", __FUNCTION__)); return NULL; } b.x1 = 0; b.y1 = 0; b.x2 = pixmap->drawable.width; b.y2 = pixmap->drawable.height; if (sna->render.copy_boxes(sna, GXcopy, &pixmap->drawable, priv->gpu_bo, 0, 0, &pixmap->drawable, tmp, 0, 0, &b, 1, COPY_LAST)) { DBG(("%s: copy failed\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, tmp); return NULL; } kgem_bo_destroy(&sna->kgem, priv->gpu_bo); priv->gpu_bo = tmp; } priv->pinned |= PIN_SCANOUT; return priv->gpu_bo; } static struct kgem_bo *sna_crtc_attach(xf86CrtcPtr crtc) { struct sna_crtc *sna_crtc = to_sna_crtc(crtc); ScrnInfoPtr scrn = crtc->scrn; struct sna *sna = to_sna(scrn); struct kgem_bo *bo; sna_crtc->transform = false; sna_crtc->rotation = RR_Rotate_0; if (use_shadow(sna, crtc)) { unsigned long tiled_limit; int tiling; force_shadow: if (!sna_crtc_enable_shadow(sna, sna_crtc)) { DBG(("%s: failed to enable crtc shadow\n", __FUNCTION__)); return NULL; } DBG(("%s: attaching to per-crtc pixmap %dx%d\n", __FUNCTION__, crtc->mode.HDisplay, crtc->mode.VDisplay)); bo = sna_crtc->shadow_bo; if (bo) { if (sna_crtc->shadow_bo_width == crtc->mode.HDisplay && sna_crtc->shadow_bo_height == crtc->mode.VDisplay) { DBG(("%s: reusing current shadow bo handle=%d\n", __FUNCTION__, bo->handle)); goto out_shadow; } kgem_bo_destroy(&sna->kgem, bo); sna_crtc->shadow_bo = NULL; } tiling = I915_TILING_X; if (sna->kgem.gen == 071) tiled_limit = 16 * 1024 * 8; else if ((sna->kgem.gen >> 3) > 4) tiled_limit = 32 * 1024 * 8; else if ((sna->kgem.gen >> 3) == 4) tiled_limit = 16 * 1024 * 8; else tiled_limit = 8 * 1024 * 8; if ((unsigned long)crtc->mode.HDisplay * scrn->bitsPerPixel > tiled_limit) tiling = I915_TILING_NONE; if (sna->flags & SNA_LINEAR_FB) tiling = I915_TILING_NONE; bo = kgem_create_2d(&sna->kgem, crtc->mode.HDisplay, crtc->mode.VDisplay, scrn->bitsPerPixel, tiling, CREATE_SCANOUT); if (bo == NULL) { DBG(("%s: failed to allocate crtc scanout\n", __FUNCTION__)); return NULL; } if (!get_fb(sna, bo, crtc->mode.HDisplay, crtc->mode.VDisplay)) { DBG(("%s: failed to bind fb for crtc scanout\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, bo); return NULL; } if (__sna_pixmap_get_bo(sna->front) && !crtc->transformPresent) { DrawableRec tmp; BoxRec b; b.x1 = crtc->x; b.y1 = crtc->y; b.x2 = crtc->x + crtc->mode.HDisplay; b.y2 = crtc->y + crtc->mode.VDisplay; DBG(("%s: copying onto shadow CRTC: (%d, %d)x(%d, %d), handle=%d\n", __FUNCTION__, b.x1, b.y1, b.x2, b.y2, bo->handle)); tmp.width = crtc->mode.HDisplay; tmp.height = crtc->mode.VDisplay; tmp.depth = sna->front->drawable.depth; tmp.bitsPerPixel = sna->front->drawable.bitsPerPixel; (void)sna->render.copy_boxes(sna, GXcopy, &sna->front->drawable, __sna_pixmap_get_bo(sna->front), 0, 0, &tmp, bo, -b.x1, -b.y1, &b, 1, 0); } sna_crtc->shadow_bo_width = crtc->mode.HDisplay; sna_crtc->shadow_bo_height = crtc->mode.VDisplay; sna_crtc->shadow_bo = bo; out_shadow: sna_crtc->transform = true; return kgem_bo_reference(bo); } else { if (sna_crtc->shadow_bo) { kgem_bo_destroy(&sna->kgem, sna_crtc->shadow_bo); sna_crtc->shadow_bo = NULL; } if (sna_crtc->slave_pixmap) { DBG(("%s: attaching to scanout pixmap\n", __FUNCTION__)); bo = get_scanout_bo(sna, sna_crtc->slave_pixmap); if (bo == NULL) { DBG(("%s: failed to pin crtc scanout\n", __FUNCTION__)); sna_crtc->fallback_shadow = true; goto force_shadow; } if (!get_fb(sna, bo, sna_crtc->slave_pixmap->drawable.width, sna_crtc->slave_pixmap->drawable.height)) { DBG(("%s: failed to bind fb for crtc scanout\n", __FUNCTION__)); sna_crtc->fallback_shadow = true; goto force_shadow; } } else { DBG(("%s: attaching to framebuffer\n", __FUNCTION__)); bo = get_scanout_bo(sna, sna->front); if (bo == NULL) { DBG(("%s: failed to pin framebuffer\n", __FUNCTION__)); sna_crtc->fallback_shadow = true; goto force_shadow; } if (!get_fb(sna, bo, scrn->virtualX, scrn->virtualY)) { DBG(("%s: failed to bind fb for crtc scanout\n", __FUNCTION__)); sna_crtc->fallback_shadow = true; goto force_shadow; } } if (sna->flags & SNA_TEAR_FREE) { assert(sna_crtc->slave_pixmap == NULL); DBG(("%s: enabling TearFree shadow\n", __FUNCTION__)); if (!sna_crtc_enable_shadow(sna, sna_crtc)) { DBG(("%s: failed to enable crtc shadow\n", __FUNCTION__)); return NULL; } if (sna->mode.shadow == NULL && !wedged(sna)) { RegionRec region; struct kgem_bo *shadow; DBG(("%s: creating TearFree shadow bo\n", __FUNCTION__)); region.extents.x1 = 0; region.extents.y1 = 0; region.extents.x2 = sna->scrn->virtualX; region.extents.y2 = sna->scrn->virtualY; region.data = NULL; shadow = kgem_create_2d(&sna->kgem, region.extents.x2, region.extents.y2, scrn->bitsPerPixel, kgem_choose_tiling(&sna->kgem, I915_TILING_X, region.extents.x2, region.extents.y2, sna->scrn->bitsPerPixel), CREATE_SCANOUT); if (shadow == NULL) { DBG(("%s: failed to allocate TearFree shadow bo\n", __FUNCTION__)); sna_crtc->fallback_shadow = true; goto force_shadow; } if (!get_fb(sna, shadow, region.extents.x2, region.extents.y2)) { DBG(("%s: failed to bind fb for TearFeee shadow\n", __FUNCTION__)); kgem_bo_destroy(&sna->kgem, shadow); sna_crtc->fallback_shadow = true; goto force_shadow; } sna->mode.shadow = shadow; set_shadow(sna, ®ion); } sna_crtc_disable_override(sna, sna_crtc); } else sna_crtc_disable_shadow(sna, sna_crtc); sna_crtc->rotation = rotation_reduce(&sna_crtc->primary, crtc->rotation); assert(sna_crtc->primary.rotation.supported & sna_crtc->rotation); return kgem_bo_reference(bo); } } static void sna_crtc_randr(xf86CrtcPtr crtc) { struct sna_crtc *sna_crtc = to_sna_crtc(crtc); struct pict_f_transform f_crtc_to_fb, f_fb_to_crtc; PictTransform crtc_to_fb; PictFilterPtr filter; xFixed *params; int nparams; RRTransformPtr transform; int needs_transform; transform = NULL; if (crtc->transformPresent) transform = &crtc->transform; needs_transform = RRTransformCompute(crtc->x, crtc->y, crtc->mode.HDisplay, crtc->mode.VDisplay, crtc->rotation, transform, &crtc_to_fb, &f_crtc_to_fb, &f_fb_to_crtc); filter = NULL; params = NULL; nparams = 0; if (sna_crtc->transform) { #ifdef RANDR_12_INTERFACE if (transform) { if (transform->nparams) { params = malloc(transform->nparams * sizeof(xFixed)); if (params) { memcpy(params, transform->params, transform->nparams * sizeof(xFixed)); nparams = transform->nparams; filter = transform->filter; } } else filter = transform->filter; } #endif crtc->transform_in_use = needs_transform; } else crtc->transform_in_use = sna_crtc->rotation != RR_Rotate_0; crtc->crtc_to_framebuffer = crtc_to_fb; crtc->f_crtc_to_framebuffer = f_crtc_to_fb; crtc->f_framebuffer_to_crtc = f_fb_to_crtc; free(crtc->params); crtc->params = params; crtc->nparams = nparams; crtc->filter = filter; if (filter) { crtc->filter_width = filter->width; crtc->filter_height = filter->height; } else { crtc->filter_width = 0; crtc->filter_height = 0; } crtc->bounds.x1 = 0; crtc->bounds.x2 = crtc->mode.HDisplay; crtc->bounds.y1 = 0; crtc->bounds.y2 = crtc->mode.VDisplay; pixman_f_transform_bounds(&f_crtc_to_fb, &crtc->bounds); DBG(("%s: transform? %d, bounds (%d, %d), (%d, %d)\n", __FUNCTION__, crtc->transform_in_use, crtc->bounds.x1, crtc->bounds.y1, crtc->bounds.x2, crtc->bounds.y2)); } static void sna_crtc_damage(xf86CrtcPtr crtc) { ScreenPtr screen = crtc->scrn->pScreen; struct sna *sna = to_sna(crtc->scrn); RegionRec region, *damage; region.extents = crtc->bounds; region.data = NULL; if (region.extents.x1 < 0) region.extents.x1 = 0; if (region.extents.y1 < 0) region.extents.y1 = 0; if (region.extents.x2 > screen->width) region.extents.x2 = screen->width; if (region.extents.y2 > screen->height) region.extents.y2 = screen->height; DBG(("%s: marking crtc %d as completely damaged (%d, %d), (%d, %d)\n", __FUNCTION__, to_sna_crtc(crtc)->id, region.extents.x1, region.extents.y1, region.extents.x2, region.extents.y2)); to_sna_crtc(crtc)->client_damage = region; assert(sna->mode.shadow_damage && sna->mode.shadow_active); damage = DamageRegion(sna->mode.shadow_damage); RegionUnion(damage, damage, ®ion); DBG(("%s: damage now %dx[(%d, %d), (%d, %d)]\n", __FUNCTION__, region_num_rects(damage), damage->extents.x1, damage->extents.y1, damage->extents.x2, damage->extents.y2)); } static char *outputs_for_crtc(xf86CrtcPtr crtc, char *outputs, int max) { struct sna *sna = to_sna(crtc->scrn); xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(crtc->scrn); int len, i; for (i = len = 0; i < sna->mode.num_real_output; i++) { xf86OutputPtr output = config->output[i]; if (output->crtc != crtc) continue; len += snprintf(outputs+len, max-len, "%s, ", output->name); } assert(len >= 2); outputs[len-2] = '\0'; return outputs; } static const char *rotation_to_str(Rotation rotation) { switch (rotation & RR_Rotate_All) { case 0: case RR_Rotate_0: return "normal"; case RR_Rotate_90: return "left"; case RR_Rotate_180: return "inverted"; case RR_Rotate_270: return "right"; default: return "unknown"; } } static const char *reflection_to_str(Rotation rotation) { switch (rotation & RR_Reflect_All) { case 0: return "none"; case RR_Reflect_X: return "X axis"; case RR_Reflect_Y: return "Y axis"; case RR_Reflect_X | RR_Reflect_Y: return "X and Y axes"; default: return "invalid"; } } static Bool __sna_crtc_set_mode(xf86CrtcPtr crtc) { struct sna *sna = to_sna(crtc->scrn); struct sna_crtc *sna_crtc = to_sna_crtc(crtc); struct kgem_bo *saved_bo, *bo; uint32_t saved_offset; bool saved_transform; DBG(("%s\n", __FUNCTION__)); saved_bo = sna_crtc->bo; saved_transform = sna_crtc->transform; saved_offset = sna_crtc->offset; sna_crtc->fallback_shadow = false; retry: /* Attach per-crtc pixmap or direct */ bo = sna_crtc_attach(crtc); if (bo == NULL) { xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, "unable to attach scanout\n"); goto error; } /* Prevent recursion when enabling outputs during execbuffer */ if (bo->exec && RQ(bo->rq)->bo == NULL) _kgem_submit(&sna->kgem); sna_crtc->bo = bo; if (!sna_crtc_apply(crtc)) { int err = errno; kgem_bo_destroy(&sna->kgem, bo); if (!sna_crtc->shadow) { sna_crtc->fallback_shadow = true; goto retry; } xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, "failed to set mode: %s [%d]\n", strerror(err), err); goto error; } bo->active_scanout++; if (saved_bo) { assert(saved_bo->active_scanout); assert(saved_bo->refcnt >= saved_bo->active_scanout); saved_bo->active_scanout--; kgem_bo_destroy(&sna->kgem, saved_bo); } sna_crtc_randr(crtc); if (sna_crtc->transform) sna_crtc_damage(crtc); sna->mode.front_active += saved_bo == NULL; sna->mode.dirty = true; DBG(("%s: front_active=%d\n", __FUNCTION__, sna->mode.front_active)); return TRUE; error: sna_crtc->offset = saved_offset; sna_crtc->transform = saved_transform; sna_crtc->bo = saved_bo; sna_mode_discover(sna); return FALSE; } static Bool sna_crtc_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode, Rotation rotation, int x, int y) { struct sna *sna = to_sna(crtc->scrn); struct sna_crtc *sna_crtc = to_sna_crtc(crtc); struct drm_mode_modeinfo saved_kmode; char outputs[256]; if (mode->HDisplay == 0 || mode->VDisplay == 0) return FALSE; assert(sna_crtc); xf86DrvMsg(crtc->scrn->scrnIndex, X_INFO, "switch to mode %dx%d@%.1f on %s using pipe %d, position (%d, %d), rotation %s, reflection %s\n", mode->HDisplay, mode->VDisplay, xf86ModeVRefresh(mode), outputs_for_crtc(crtc, outputs, sizeof(outputs)), sna_crtc->pipe, x, y, rotation_to_str(rotation), reflection_to_str(rotation)); assert(mode->HDisplay <= sna->mode.max_crtc_width && mode->VDisplay <= sna->mode.max_crtc_height); #if HAS_GAMMA drmModeCrtcSetGamma(sna->kgem.fd, sna_crtc->id, crtc->gamma_size, crtc->gamma_red, crtc->gamma_green, crtc->gamma_blue); #endif saved_kmode = sna_crtc->kmode; mode_to_kmode(&sna_crtc->kmode, mode); if (__sna_crtc_set_mode(crtc)) return TRUE; sna_crtc->kmode = saved_kmode; return FALSE; } static void sna_crtc_dpms(xf86CrtcPtr crtc, int mode) { struct sna_crtc *priv = to_sna_crtc(crtc); DBG(("%s(pipe %d, dpms mode -> %d):= active=%d\n", __FUNCTION__, priv->pipe, mode, mode == DPMSModeOn)); if (priv->dpms_mode == mode) return; assert(priv); priv->dpms_mode = mode; if (mode == DPMSModeOn && crtc->enabled && priv->bo == NULL) { if (__sna_crtc_set_mode(crtc)) update_flush_interval(to_sna(crtc->scrn)); else mode = DPMSModeOff; } if (mode != DPMSModeOn) sna_crtc_disable(crtc); } void sna_mode_adjust_frame(struct sna *sna, int x, int y) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); xf86CrtcPtr crtc; int saved_x, saved_y; if ((unsigned)config->compat_output >= config->num_output) return; crtc = config->output[config->compat_output]->crtc; if (crtc == NULL || !crtc->enabled) return; if (crtc->x == x && crtc->y == y) return; saved_x = crtc->x; saved_y = crtc->y; crtc->x = x; crtc->y = y; if (to_sna_crtc(crtc) && !__sna_crtc_set_mode(crtc)) { crtc->x = saved_x; crtc->y = saved_y; } } static void sna_crtc_gamma_set(xf86CrtcPtr crtc, CARD16 *red, CARD16 *green, CARD16 *blue, int size) { assert(to_sna_crtc(crtc)); drmModeCrtcSetGamma(to_sna(crtc->scrn)->kgem.fd, to_sna_crtc(crtc)->id, size, red, green, blue); } static void sna_crtc_destroy(xf86CrtcPtr crtc) { struct sna_crtc *sna_crtc = to_sna_crtc(crtc); if (sna_crtc == NULL) return; free(sna_crtc); crtc->driver_private = NULL; } #if HAS_PIXMAP_SHARING static Bool sna_crtc_set_scanout_pixmap(xf86CrtcPtr crtc, PixmapPtr pixmap) { struct sna_crtc *sna_crtc = to_sna_crtc(crtc); if (sna_crtc == NULL) return FALSE; if (pixmap == sna_crtc->slave_pixmap) return TRUE; DBG(("%s: CRTC:%d, pipe=%d setting scanout pixmap=%ld\n", __FUNCTION__, sna_crtc->id, sna_crtc->pipe, pixmap ? pixmap->drawable.serialNumber : 0)); /* Disable first so that we can unregister the damage tracking */ sna_crtc_disable_shadow(to_sna(crtc->scrn), sna_crtc); sna_crtc->slave_pixmap = pixmap; return TRUE; } #endif static const xf86CrtcFuncsRec sna_crtc_funcs = { #if XF86_CRTC_VERSION >= 1 .dpms = sna_crtc_dpms, #endif .set_mode_major = sna_crtc_set_mode_major, .gamma_set = sna_crtc_gamma_set, .destroy = sna_crtc_destroy, #if HAS_PIXMAP_SHARING .set_scanout_pixmap = sna_crtc_set_scanout_pixmap, #endif }; inline static bool prop_is_rotation(struct drm_mode_get_property *prop) { if ((prop->flags & (1 << 5)) == 0) return false; if (strcmp(prop->name, "rotation")) return false; return true; } static int plane_details(struct sna *sna, struct plane *p) { struct local_mode_obj_get_properties arg; uint64_t stack_props[24]; uint32_t *props = (uint32_t *)stack_props; uint64_t *values = stack_props + 8; int i, type = DRM_PLANE_TYPE_OVERLAY; memset(&arg, 0, sizeof(struct local_mode_obj_get_properties)); arg.obj_id = p->id; arg.obj_type = LOCAL_MODE_OBJECT_PLANE; arg.props_ptr = (uintptr_t)props; arg.prop_values_ptr = (uintptr_t)values; arg.count_props = 16; if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_OBJ_GETPROPERTIES, &arg)) return -1; DBG(("%s: object %d (type %x) has %d props\n", __FUNCTION__, p->id, LOCAL_MODE_OBJECT_PLANE, arg.count_props)); if (arg.count_props > 16) { props = malloc(2*sizeof(uint64_t)*arg.count_props); if (props == NULL) return -1; values = (uint64_t *)props + arg.count_props; arg.props_ptr = (uintptr_t)props; arg.prop_values_ptr = (uintptr_t)values; if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_OBJ_GETPROPERTIES, &arg)) arg.count_props = 0; } VG(VALGRIND_MAKE_MEM_DEFINED(arg.props_ptr, sizeof(uint32_t)*arg.count_props)); VG(VALGRIND_MAKE_MEM_DEFINED(arg.prop_values_ptr, sizeof(uint64_t)*arg.count_props)); for (i = 0; i < arg.count_props; i++) { struct drm_mode_get_property prop; memset(&prop, 0, sizeof(prop)); prop.prop_id = props[i]; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETPROPERTY, &prop)) { ERR(("%s: prop[%d].id=%d GETPROPERTY failed with errno=%d\n", __FUNCTION__, i, props[i], errno)); continue; } DBG(("%s: prop[%d] .id=%ld, .name=%s, .flags=%x, .value=%ld\n", __FUNCTION__, i, (long)props[i], prop.name, (unsigned)prop.flags, (long)values[i])); if (strcmp(prop.name, "type") == 0) { type = values[i]; } else if (prop_is_rotation(&prop)) { struct drm_mode_property_enum *enums; p->rotation.prop = props[i]; p->rotation.current = values[i]; DBG(("%s: found rotation property .id=%d, value=%ld, num_enums=%d\n", __FUNCTION__, prop.prop_id, (long)values[i], prop.count_enum_blobs)); enums = malloc(prop.count_enum_blobs * sizeof(struct drm_mode_property_enum)); if (enums != NULL) { prop.count_values = 0; prop.enum_blob_ptr = (uintptr_t)enums; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETPROPERTY, &prop) == 0) { int j; /* XXX we assume that the mapping between kernel enum and * RandR remains fixed for our lifetimes. */ VG(VALGRIND_MAKE_MEM_DEFINED(enums, sizeof(*enums)*prop.count_enum_blobs)); for (j = 0; j < prop.count_enum_blobs; j++) { DBG(("%s: rotation[%d] = %s [%lx]\n", __FUNCTION__, j, enums[j].name, (long)enums[j].value)); p->rotation.supported |= 1 << enums[j].value; } } free(enums); } } } if (props != (uint32_t *)stack_props) free(props); DBG(("%s: plane=%d type=%d\n", __FUNCTION__, p->id, type)); return type; } static void sna_crtc_find_planes(struct sna *sna, struct sna_crtc *crtc) { #define LOCAL_IOCTL_SET_CAP DRM_IOWR(0x0d, struct local_set_cap) #define LOCAL_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xb5, struct local_mode_get_plane_res) #define LOCAL_IOCTL_MODE_GETPLANE DRM_IOWR(0xb6, struct local_mode_get_plane) struct local_set_cap { uint64_t name; uint64_t value; } cap; struct local_mode_get_plane_res { uint64_t plane_id_ptr; uint64_t count_planes; } r; uint32_t stack_planes[32]; uint32_t *planes = stack_planes; int i; VG_CLEAR(cap); cap.name = DRM_CLIENT_CAP_UNIVERSAL_PLANES; cap.value = 1; (void)drmIoctl(sna->kgem.fd, LOCAL_IOCTL_SET_CAP, &cap); VG_CLEAR(r); r.plane_id_ptr = (uintptr_t)planes; r.count_planes = ARRAY_SIZE(stack_planes); if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_GETPLANERESOURCES, &r)) { ERR(("%s: GETPLANERESOURCES failed with errno=%d\n", __FUNCTION__, errno)); return; } DBG(("%s: %d planes\n", __FUNCTION__, (int)r.count_planes)); if (r.count_planes > ARRAY_SIZE(stack_planes)) { planes = malloc(sizeof(uint32_t)*r.count_planes); if (planes == NULL) return; r.plane_id_ptr = (uintptr_t)planes; if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_GETPLANERESOURCES, &r)) r.count_planes = 0; } VG(VALGRIND_MAKE_MEM_DEFINED(planes, sizeof(uint32_t)*r.count_planes)); for (i = 0; i < r.count_planes; i++) { struct local_mode_get_plane { uint32_t plane_id; uint32_t crtc_id; uint32_t fb_id; uint32_t possible_crtcs; uint32_t gamma_size; uint32_t count_format_types; uint64_t format_type_ptr; } p; struct plane details; VG_CLEAR(p); p.plane_id = planes[i]; p.count_format_types = 0; if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_GETPLANE, &p)) continue; if ((p.possible_crtcs & (1 << crtc->pipe)) == 0) continue; DBG(("%s: plane %d is attached to our pipe=%d\n", __FUNCTION__, planes[i], crtc->pipe)); details.id = p.plane_id; details.rotation.prop = 0; details.rotation.supported = RR_Rotate_0; details.rotation.current = RR_Rotate_0; switch (plane_details(sna, &details)) { default: break; case DRM_PLANE_TYPE_PRIMARY: crtc->primary = details; break; case DRM_PLANE_TYPE_CURSOR: break; case DRM_PLANE_TYPE_OVERLAY: if (crtc->sprite.id == 0) crtc->sprite = details; break; } } if (planes != stack_planes) free(planes); } static void sna_crtc_init__rotation(struct sna *sna, struct sna_crtc *crtc) { crtc->rotation = RR_Rotate_0; crtc->primary.rotation.supported = RR_Rotate_0; crtc->primary.rotation.current = RR_Rotate_0; crtc->sprite.rotation = crtc->primary.rotation; } static void sna_crtc_init__cursor(struct sna *sna, struct sna_crtc *crtc) { struct drm_mode_cursor arg; VG_CLEAR(arg); arg.flags = DRM_MODE_CURSOR_BO; arg.crtc_id = crtc->id; arg.width = arg.height = 0; arg.handle = 0; (void)drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_CURSOR, &arg); } static bool sna_crtc_add(ScrnInfoPtr scrn, int id) { struct sna *sna = to_sna(scrn); xf86CrtcPtr crtc; struct sna_crtc *sna_crtc; struct drm_i915_get_pipe_from_crtc_id get_pipe; DBG(("%s(%d)\n", __FUNCTION__, id)); sna_crtc = calloc(sizeof(struct sna_crtc), 1); if (sna_crtc == NULL) return false; sna_crtc->id = id; sna_crtc->dpms_mode = -1; VG_CLEAR(get_pipe); get_pipe.pipe = 0; get_pipe.crtc_id = sna_crtc->id; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_GET_PIPE_FROM_CRTC_ID, &get_pipe)) { free(sna_crtc); return false; } sna_crtc->pipe = get_pipe.pipe; if (is_zaphod(scrn) && scrn->confScreen->device->screen != sna_crtc->pipe) { free(sna_crtc); return true; } sna_crtc_init__rotation(sna, sna_crtc); sna_crtc_find_planes(sna, sna_crtc); DBG(("%s: CRTC:%d [pipe=%d], primary id=%x: supported-rotations=%x, current-rotation=%x, sprite id=%x: supported-rotations=%x, current-rotation=%x\n", __FUNCTION__, sna_crtc->id, sna_crtc->pipe, sna_crtc->primary.id, sna_crtc->primary.rotation.supported, sna_crtc->primary.rotation.current, sna_crtc->sprite.id, sna_crtc->sprite.rotation.supported, sna_crtc->sprite.rotation.current)); list_init(&sna_crtc->shadow_link); crtc = xf86CrtcCreate(scrn, &sna_crtc_funcs); if (crtc == NULL) { free(sna_crtc); return false; } sna_crtc_init__cursor(sna, sna_crtc); crtc->driver_private = sna_crtc; sna_crtc->base = crtc; DBG(("%s: attached crtc[%d] pipe=%d\n", __FUNCTION__, id, sna_crtc->pipe)); return true; } static bool is_panel(int type) { #define DRM_MODE_CONNECTOR_LVDS 7 #define DRM_MODE_CONNECTOR_eDP 14 #define DRM_MODE_CONNECTOR_DSI 16 return (type == DRM_MODE_CONNECTOR_LVDS || type == DRM_MODE_CONNECTOR_eDP || type == DRM_MODE_CONNECTOR_DSI); } static int find_property(struct sna *sna, struct sna_output *output, const char *name) { struct drm_mode_get_property prop; int i; VG_CLEAR(prop); for (i = 0; i < output->num_props; i++) { prop.prop_id = output->prop_ids[i]; prop.count_values = 0; prop.count_enum_blobs = 0; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETPROPERTY, &prop)) continue; if (strcmp(prop.name, name) == 0) return i; } return -1; } static xf86OutputStatus sna_output_detect(xf86OutputPtr output) { struct sna *sna = to_sna(output->scrn); struct sna_output *sna_output = output->driver_private; union compat_mode_get_connector compat_conn; DBG(("%s(%s:%d)\n", __FUNCTION__, output->name, sna_output->id)); if (!sna_output->id) { DBG(("%s(%s) hiding due to lost connection\n", __FUNCTION__, output->name)); return XF86OutputStatusDisconnected; } VG_CLEAR(compat_conn); compat_conn.conn.connector_id = sna_output->id; sna_output->num_modes = compat_conn.conn.count_modes = 0; /* reprobe */ compat_conn.conn.count_encoders = 0; compat_conn.conn.count_props = sna_output->num_props; compat_conn.conn.props_ptr = (uintptr_t)sna_output->prop_ids; compat_conn.conn.prop_values_ptr = (uintptr_t)sna_output->prop_values; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETCONNECTOR, &compat_conn.conn)) return XF86OutputStatusUnknown; DBG(("%s(%s): num modes %d -> %d, num props %d -> %d\n", __FUNCTION__, output->name, sna_output->num_modes, compat_conn.conn.count_modes, sna_output->num_props, compat_conn.conn.count_props)); assert(compat_conn.conn.count_props == sna_output->num_props); while (compat_conn.conn.count_modes && compat_conn.conn.count_modes != sna_output->num_modes) { struct drm_mode_modeinfo *new_modes; int old_count; old_count = sna_output->num_modes; new_modes = realloc(sna_output->modes, sizeof(*sna_output->modes)*compat_conn.conn.count_modes); if (new_modes == NULL) break; sna_output->modes = new_modes; sna_output->num_modes = compat_conn.conn.count_modes; compat_conn.conn.modes_ptr = (uintptr_t)sna_output->modes; compat_conn.conn.count_encoders = 0; compat_conn.conn.count_props = 0; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETCONNECTOR, &compat_conn.conn)) { sna_output->num_modes = min(old_count, sna_output->num_modes); break; } VG(VALGRIND_MAKE_MEM_DEFINED(sna_output->modes, sizeof(*sna_output->modes)*sna_output->num_modes)); } DBG(("%s(%s): found %d modes, connection status=%d\n", __FUNCTION__, output->name, sna_output->num_modes, compat_conn.conn.connection)); switch (compat_conn.conn.connection) { case DRM_MODE_CONNECTED: return XF86OutputStatusConnected; case DRM_MODE_DISCONNECTED: return XF86OutputStatusDisconnected; default: case DRM_MODE_UNKNOWNCONNECTION: return XF86OutputStatusUnknown; } } static Bool sna_output_mode_valid(xf86OutputPtr output, DisplayModePtr mode) { struct sna_output *sna_output = output->driver_private; struct sna *sna = to_sna(output->scrn); if (mode->HDisplay > sna->mode.max_crtc_width) return MODE_VIRTUAL_X; if (mode->VDisplay > sna->mode.max_crtc_height) return MODE_VIRTUAL_Y; /* Check that we can successfully pin this into the global GTT */ if ((kgem_can_create_2d(&sna->kgem, mode->HDisplay, mode->VDisplay, sna->scrn->bitsPerPixel) & KGEM_CAN_CREATE_GTT) == 0) return MODE_MEM_VIRT; /* * If the connector type is a panel, we will use the panel limit to * verfiy whether the mode is valid. */ if (sna_output->has_panel_limits) { if (mode->HDisplay > sna_output->panel_hdisplay || mode->VDisplay > sna_output->panel_vdisplay) return MODE_PANEL; } return MODE_OK; } static void sna_output_attach_edid(xf86OutputPtr output) { struct sna *sna = to_sna(output->scrn); struct sna_output *sna_output = output->driver_private; struct drm_mode_get_blob blob; void *old, *raw = NULL; xf86MonPtr mon = NULL; if (sna_output->edid_idx == -1) return; raw = sna_output->edid_raw; blob.length = sna_output->edid_len; if (blob.length && output->MonInfo) { old = alloca(blob.length); memcpy(old, raw, blob.length); } else old = NULL; blob.blob_id = sna_output->prop_values[sna_output->edid_idx]; DBG(("%s: attaching EDID id=%d, current=%d\n", __FUNCTION__, blob.blob_id, sna_output->edid_blob_id)); if (blob.blob_id == sna_output->edid_blob_id && 0) { /* sigh */ if (output->MonInfo) { /* XXX the property keeps on disappearing... */ RRChangeOutputProperty(output->randr_output, MakeAtom("EDID", strlen("EDID"), TRUE), XA_INTEGER, 8, PropModeReplace, sna_output->edid_len, sna_output->edid_raw, FALSE, FALSE); return; } goto skip_read; } blob.data = (uintptr_t)raw; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETPROPBLOB, &blob)) goto done; DBG(("%s: retrieving blob id=%d, length=%d\n", __FUNCTION__, blob.blob_id, blob.length)); if (blob.length > sna_output->edid_len) { raw = realloc(raw, blob.length); if (raw == NULL) goto done; VG(memset(raw, 0, blob.length)); blob.data = (uintptr_t)raw; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETPROPBLOB, &blob)) goto done; } if (old && blob.length == sna_output->edid_len && memcmp(old, raw, blob.length) == 0) { assert(sna_output->edid_raw == raw); sna_output->edid_blob_id = blob.blob_id; RRChangeOutputProperty(output->randr_output, MakeAtom("EDID", strlen("EDID"), TRUE), XA_INTEGER, 8, PropModeReplace, sna_output->edid_len, sna_output->edid_raw, FALSE, FALSE); return; } skip_read: if (raw) { mon = xf86InterpretEDID(output->scrn->scrnIndex, raw); if (mon && blob.length > 128) mon->flags |= MONITOR_EDID_COMPLETE_RAWDATA; } done: xf86OutputSetEDID(output, mon); if (raw) { sna_output->edid_raw = raw; sna_output->edid_len = blob.length; sna_output->edid_blob_id = blob.blob_id; } } static DisplayModePtr default_modes(void) { #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,6,99,900,0) return xf86GetDefaultModes(); #else return xf86GetDefaultModes(0, 0); #endif } static DisplayModePtr sna_output_panel_edid(xf86OutputPtr output, DisplayModePtr modes) { xf86MonPtr mon = output->MonInfo; DisplayModePtr i, m, preferred = NULL; int max_x = 0, max_y = 0; float max_vrefresh = 0.0; if (mon && GTF_SUPPORTED(mon->features.msc)) return modes; for (m = modes; m; m = m->next) { if (m->type & M_T_PREFERRED) preferred = m; max_x = max(max_x, m->HDisplay); max_y = max(max_y, m->VDisplay); max_vrefresh = max(max_vrefresh, xf86ModeVRefresh(m)); } max_vrefresh = max(max_vrefresh, 60.0); max_vrefresh *= (1 + SYNC_TOLERANCE); m = default_modes(); xf86ValidateModesSize(output->scrn, m, max_x, max_y, 0); for (i = m; i; i = i->next) { if (xf86ModeVRefresh(i) > max_vrefresh) i->status = MODE_VSYNC; if (preferred && i->HDisplay >= preferred->HDisplay && i->VDisplay >= preferred->VDisplay && xf86ModeVRefresh(i) >= xf86ModeVRefresh(preferred)) i->status = MODE_PANEL; } xf86PruneInvalidModes(output->scrn, &m, FALSE); return xf86ModesAdd(modes, m); } static DisplayModePtr sna_output_get_modes(xf86OutputPtr output) { struct sna_output *sna_output = output->driver_private; DisplayModePtr Modes = NULL, current = NULL; int i; DBG(("%s(%s:%d)\n", __FUNCTION__, output->name, sna_output->id)); assert(sna_output->id); sna_output_attach_edid(output); if (output->crtc) { struct drm_mode_crtc mode; VG_CLEAR(mode); assert(to_sna_crtc(output->crtc)); mode.crtc_id = to_sna_crtc(output->crtc)->id; if (drmIoctl(to_sna(output->scrn)->kgem.fd, DRM_IOCTL_MODE_GETCRTC, &mode) == 0) { DBG(("%s: CRTC:%d, pipe=%d: has mode?=%d\n", __FUNCTION__, to_sna_crtc(output->crtc)->id, to_sna_crtc(output->crtc)->pipe, mode.mode_valid && mode.mode.clock)); if (mode.mode_valid && mode.mode.clock) { current = calloc(1, sizeof(DisplayModeRec)); if (current) { mode_from_kmode(output->scrn, &mode.mode, current); current->type |= M_T_DRIVER | M_T_PREFERRED; } } } } DBG(("%s: adding %d probed modes\n", __FUNCTION__, sna_output->num_modes)); for (i = 0; i < sna_output->num_modes; i++) { DisplayModePtr mode; mode = calloc(1, sizeof(DisplayModeRec)); if (mode == NULL) continue; mode = mode_from_kmode(output->scrn, &sna_output->modes[i], mode); Modes = xf86ModesAdd(Modes, mode); if (current && xf86ModesEqual(mode, current)) { free((void*)current->name); free(current); current = NULL; } if (current && mode->type & M_T_PREFERRED) current->type &= ~M_T_PREFERRED; } if (current) Modes = xf86ModesAdd(current, Modes); /* * If the connector type is a panel, we will traverse the kernel mode to * get the panel limit. And then add all the standard modes to fake * the fullscreen experience. * If it is incorrect, please fix me. */ sna_output->has_panel_limits = false; if (sna_output->is_panel) { sna_output->panel_hdisplay = sna_output->panel_vdisplay = 0; for (i = 0; i < sna_output->num_modes; i++) { struct drm_mode_modeinfo *m; m = &sna_output->modes[i]; if (m->hdisplay > sna_output->panel_hdisplay) sna_output->panel_hdisplay = m->hdisplay; if (m->vdisplay > sna_output->panel_vdisplay) sna_output->panel_vdisplay = m->vdisplay; } sna_output->has_panel_limits = sna_output->panel_hdisplay && sna_output->panel_vdisplay; } if (sna_output->add_default_modes) Modes = sna_output_panel_edid(output, Modes); return Modes; } static void sna_output_destroy(xf86OutputPtr output) { struct sna_output *sna_output = output->driver_private; int i; if (sna_output == NULL) return; free(sna_output->edid_raw); for (i = 0; i < sna_output->num_props; i++) { if (sna_output->props[i].kprop == NULL) continue; if (sna_output->props[i].atoms) { if (output->randr_output) RRDeleteOutputProperty(output->randr_output, sna_output->props[i].atoms[0]); free(sna_output->props[i].atoms); } drmModeFreeProperty(sna_output->props[i].kprop); } free(sna_output->props); free(sna_output->prop_ids); free(sna_output->prop_values); backlight_close(&sna_output->backlight); free(sna_output); output->driver_private = NULL; } static void sna_output_dpms(xf86OutputPtr output, int dpms) { struct sna *sna = to_sna(output->scrn); struct sna_output *sna_output = output->driver_private; int old_dpms = sna_output->dpms_mode; DBG(("%s(%s:%d): dpms=%d (current: %d), active? %d\n", __FUNCTION__, output->name, sna_output->id, dpms, sna_output->dpms_mode, output->crtc != NULL)); if (!sna_output->id) return; if (old_dpms == dpms) return; /* Record the value of the backlight before turning * off the display, and reset if after turning it on. * Order is important as the kernel may record and also * reset the backlight across DPMS. Hence we need to * record the value before the kernel modifies it * and reapply it afterwards. */ if (sna_output->backlight.iface && dpms != DPMSModeOn) { if (old_dpms == DPMSModeOn) { sna_output->backlight_active_level = sna_output_backlight_get(output); DBG(("%s: saving current backlight %d\n", __FUNCTION__, sna_output->backlight_active_level)); } sna_output->dpms_mode = dpms; sna_output_backlight_off(sna_output); } if (output->crtc && drmModeConnectorSetProperty(sna->kgem.fd, sna_output->id, sna_output->dpms_id, dpms)) dpms = old_dpms; if (sna_output->backlight.iface && dpms == DPMSModeOn) { DBG(("%s: restoring previous backlight %d\n", __FUNCTION__, sna_output->backlight_active_level)); sna_output_backlight_on(sna_output); } sna_output->dpms_mode = dpms; } static bool sna_property_ignore(drmModePropertyPtr prop) { if (!prop) return true; /* ignore blob prop */ if (prop->flags & DRM_MODE_PROP_BLOB) return true; /* ignore standard property */ if (!strcmp(prop->name, "EDID") || !strcmp(prop->name, "DPMS")) return true; return false; } static void sna_output_create_ranged_atom(xf86OutputPtr output, Atom *atom, const char *name, INT32 min, INT32 max, uint64_t value, Bool immutable) { int err; INT32 atom_range[2]; atom_range[0] = min; atom_range[1] = max; *atom = MakeAtom(name, strlen(name), TRUE); err = RRConfigureOutputProperty(output->randr_output, *atom, FALSE, TRUE, immutable, 2, atom_range); if (err != 0) xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "RRConfigureOutputProperty error, %d\n", err); err = RRChangeOutputProperty(output->randr_output, *atom, XA_INTEGER, 32, PropModeReplace, 1, &value, FALSE, FALSE); if (err != 0) xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "RRChangeOutputProperty error, %d\n", err); } static void sna_output_create_resources(xf86OutputPtr output) { struct sna *sna = to_sna(output->scrn); struct sna_output *sna_output = output->driver_private; int i, j, err; sna_output->props = calloc(sna_output->num_props, sizeof(struct sna_property)); if (!sna_output->props) return; for (i = 0; i < sna_output->num_props; i++) { struct sna_property *p = &sna_output->props[i]; p->kprop = drmModeGetProperty(sna->kgem.fd, sna_output->prop_ids[i]); if (sna_property_ignore(p->kprop)) { drmModeFreeProperty(p->kprop); p->kprop = NULL; continue; } if (p->kprop->flags & DRM_MODE_PROP_RANGE) { p->num_atoms = 1; p->atoms = calloc(p->num_atoms, sizeof(Atom)); if (!p->atoms) continue; sna_output_create_ranged_atom(output, &p->atoms[0], p->kprop->name, p->kprop->values[0], p->kprop->values[1], sna_output->prop_values[i], p->kprop->flags & DRM_MODE_PROP_IMMUTABLE ? TRUE : FALSE); } else if (p->kprop->flags & DRM_MODE_PROP_ENUM) { p->num_atoms = p->kprop->count_enums + 1; p->atoms = calloc(p->num_atoms, sizeof(Atom)); if (!p->atoms) continue; p->atoms[0] = MakeAtom(p->kprop->name, strlen(p->kprop->name), TRUE); for (j = 1; j <= p->kprop->count_enums; j++) { struct drm_mode_property_enum *e = &p->kprop->enums[j-1]; p->atoms[j] = MakeAtom(e->name, strlen(e->name), TRUE); } err = RRConfigureOutputProperty(output->randr_output, p->atoms[0], FALSE, FALSE, p->kprop->flags & DRM_MODE_PROP_IMMUTABLE ? TRUE : FALSE, p->num_atoms - 1, (INT32 *)&p->atoms[1]); if (err != 0) { xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "RRConfigureOutputProperty error, %d\n", err); } for (j = 0; j < p->kprop->count_enums; j++) if (p->kprop->enums[j].value == sna_output->prop_values[i]) break; /* there's always a matching value */ err = RRChangeOutputProperty(output->randr_output, p->atoms[0], XA_ATOM, 32, PropModeReplace, 1, &p->atoms[j+1], FALSE, FALSE); if (err != 0) { xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "RRChangeOutputProperty error, %d\n", err); } } } if (sna_output->backlight.iface) { /* Set up the backlight property, which takes effect * immediately and accepts values only within the * backlight_range. */ sna_output_create_ranged_atom(output, &backlight_atom, BACKLIGHT_NAME, 0, sna_output->backlight.max, sna_output->backlight_active_level, FALSE); sna_output_create_ranged_atom(output, &backlight_deprecated_atom, BACKLIGHT_DEPRECATED_NAME, 0, sna_output->backlight.max, sna_output->backlight_active_level, FALSE); } } static Bool sna_output_set_property(xf86OutputPtr output, Atom property, RRPropertyValuePtr value) { struct sna *sna = to_sna(output->scrn); struct sna_output *sna_output = output->driver_private; int i; if (property == backlight_atom || property == backlight_deprecated_atom) { INT32 val; int ret = 0; if (value->type != XA_INTEGER || value->format != 32 || value->size != 1) { return FALSE; } val = *(INT32 *)value->data; DBG(("%s: setting backlight to %d (max=%d)\n", __FUNCTION__, (int)val, sna_output->backlight.max)); if (val < 0 || val > sna_output->backlight.max) return FALSE; sna_output->backlight_active_level = val; if (sna_output->dpms_mode == DPMSModeOn) ret = sna_output_backlight_set(sna_output, val); return ret == 0; } if (!sna_output->id) return TRUE; for (i = 0; i < sna_output->num_props; i++) { struct sna_property *p = &sna_output->props[i]; if (p->atoms == NULL || p->atoms[0] != property) continue; if (p->kprop->flags & DRM_MODE_PROP_RANGE) { uint32_t val; if (value->type != XA_INTEGER || value->format != 32 || value->size != 1) return FALSE; val = *(uint32_t *)value->data; drmModeConnectorSetProperty(sna->kgem.fd, sna_output->id, p->kprop->prop_id, (uint64_t)val); return TRUE; } else if (p->kprop->flags & DRM_MODE_PROP_ENUM) { Atom atom; const char *name; int j; if (value->type != XA_ATOM || value->format != 32 || value->size != 1) return FALSE; memcpy(&atom, value->data, 4); name = NameForAtom(atom); if (name == NULL) return FALSE; /* search for matching name string, then set its value down */ for (j = 0; j < p->kprop->count_enums; j++) { if (!strcmp(p->kprop->enums[j].name, name)) { drmModeConnectorSetProperty(sna->kgem.fd, sna_output->id, p->kprop->prop_id, p->kprop->enums[j].value); return TRUE; } } return FALSE; } } /* We didn't recognise this property, just report success in order * to allow the set to continue, otherwise we break setting of * common properties like EDID. */ return TRUE; } static Bool sna_output_get_property(xf86OutputPtr output, Atom property) { struct sna_output *sna_output = output->driver_private; int err; if (property == backlight_atom || property == backlight_deprecated_atom) { INT32 val; if (!sna_output->backlight.iface) return FALSE; if (sna_output->dpms_mode == DPMSModeOn) { val = sna_output_backlight_get(output); if (val < 0) return FALSE; DBG(("%s(%s): output on, reporting actual backlight value [%d]\n", __FUNCTION__, output->name, val)); } else { val = sna_output->backlight_active_level; DBG(("%s(%s): output off, reporting cached backlight value [%d]\n", __FUNCTION__, output->name, val)); } err = RRChangeOutputProperty(output->randr_output, property, XA_INTEGER, 32, PropModeReplace, 1, &val, FALSE, FALSE); if (err != 0) { xf86DrvMsg(output->scrn->scrnIndex, X_ERROR, "RRChangeOutputProperty error, %d\n", err); return FALSE; } return TRUE; } return FALSE; } static const xf86OutputFuncsRec sna_output_funcs = { .create_resources = sna_output_create_resources, #ifdef RANDR_12_INTERFACE .set_property = sna_output_set_property, .get_property = sna_output_get_property, #endif .dpms = sna_output_dpms, .detect = sna_output_detect, .mode_valid = sna_output_mode_valid, .get_modes = sna_output_get_modes, .destroy = sna_output_destroy }; static const int subpixel_conv_table[] = { SubPixelUnknown, SubPixelHorizontalRGB, SubPixelHorizontalBGR, SubPixelVerticalRGB, SubPixelVerticalBGR, SubPixelNone }; static const char * const output_names[] = { /* DRM_MODE_CONNECTOR_Unknown */ "None", /* DRM_MODE_CONNECTOR_VGA */ "VGA", /* DRM_MODE_CONNECTOR_DVII */ "DVI", /* DRM_MODE_CONNECTOR_DVID */ "DVI", /* DRM_MODE_CONNECTOR_DVIA */ "DVI", /* DRM_MODE_CONNECTOR_Composite */ "Composite", /* DRM_MODE_CONNECTOR_SVIDEO */ "TV", /* DRM_MODE_CONNECTOR_LVDS */ "LVDS", /* DRM_MODE_CONNECTOR_Component */ "CTV", /* DRM_MODE_CONNECTOR_9PinDIN */ "DIN", /* DRM_MODE_CONNECTOR_DisplayPort */ "DP", /* DRM_MODE_CONNECTOR_HDMIA */ "HDMI", /* DRM_MODE_CONNECTOR_HDMIB */ "HDMI", /* DRM_MODE_CONNECTOR_TV */ "TV", /* DRM_MODE_CONNECTOR_eDP */ "eDP", /* DRM_MODE_CONNECTOR_VIRTUAL */ "Virtual", /* DRM_MODE_CONNECTOR_DSI */ "DSI" }; static bool sna_zaphod_match(const char *s, const char *output) { char t[20]; unsigned int i = 0; do { /* match any outputs in a comma list, stopping at whitespace */ switch (*s) { case '\0': t[i] = '\0'; return strcmp(t, output) == 0; case ',': t[i] ='\0'; if (strcmp(t, output) == 0) return TRUE; i = 0; break; case ' ': case '\t': case '\n': case '\r': break; default: t[i++] = *s; break; } s++; } while (i < sizeof(t)); return false; } static bool output_ignored(ScrnInfoPtr scrn, const char *name) { char monitor_name[64]; const char *monitor; XF86ConfMonitorPtr conf; snprintf(monitor_name, sizeof(monitor_name), "monitor-%s", name); monitor = xf86findOptionValue(scrn->options, monitor_name); if (!monitor) monitor = name; conf = xf86findMonitor(monitor, xf86configptr->conf_monitor_lst); if (conf == NULL && XF86_CRTC_CONFIG_PTR(scrn)->num_output == 0) conf = xf86findMonitor(scrn->monitor->id, xf86configptr->conf_monitor_lst); if (conf == NULL) return false; return xf86CheckBoolOption(conf->mon_option_lst, "Ignore", 0); } static bool gather_encoders(struct sna *sna, uint32_t id, int count, struct drm_mode_get_encoder *out) { union compat_mode_get_connector compat_conn; struct drm_mode_modeinfo dummy; struct drm_mode_get_encoder enc; uint32_t *ids = NULL; VG_CLEAR(compat_conn); memset(out, 0, sizeof(*out)); do { free(ids); ids = malloc(sizeof(*ids) * count); if (ids == 0) return false; compat_conn.conn.connector_id = id; compat_conn.conn.count_props = 0; compat_conn.conn.count_modes = 1; /* skip detect */ compat_conn.conn.modes_ptr = (uintptr_t)&dummy; compat_conn.conn.count_encoders = count; compat_conn.conn.encoders_ptr = (uintptr_t)ids; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETCONNECTOR, &compat_conn.conn)) { DBG(("%s: GETCONNECTOR[%d] failed, ret=%d\n", __FUNCTION__, id, errno)); compat_conn.conn.count_encoders = count = 0; } if (count == compat_conn.conn.count_encoders) break; count = compat_conn.conn.count_encoders; } while (1); for (count = 0; count < compat_conn.conn.count_encoders; count++) { enc.encoder_id = ids[count]; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETENCODER, &enc)) { DBG(("%s: GETENCODER[%d] failed, ret=%d\n", __FUNCTION__, ids[count], errno)); count = 0; break; } out->possible_crtcs |= enc.possible_crtcs; out->possible_clones |= enc.possible_clones; for (id = 0; id < sna->mode.num_real_encoder; id++) { if (enc.encoder_id == sna->mode.encoders[id]) { out->crtc_id |= 1 << id; break; } } } free(ids); return count > 0; } /* We need to map from kms encoder based possible_clones mask to X output based * possible clones masking. Note that for SDVO and on Haswell with DP/HDMI we * can have more than one output hanging off the same encoder. */ static void sna_mode_compute_possible_outputs(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); int encoder_mask[32]; int i, j; assert(sna->mode.num_real_output < 32); assert(sna->mode.num_real_crtc < 32); for (i = 0; i < sna->mode.num_real_output; i++) { xf86OutputPtr output = config->output[i]; struct sna_output *sna_output = to_sna_output(output); assert(sna_output); if (sna_output->id) { output->possible_clones = sna_output->possible_encoders; encoder_mask[i] = sna_output->attached_encoders; } else { output->possible_clones = 0; encoder_mask[i] = 0; } } /* Convert from encoder numbering to output numbering */ for (i = 0; i < sna->mode.num_real_output; i++) { xf86OutputPtr output = config->output[i]; unsigned clones; if (output->possible_clones == 0) continue; clones = 0; for (j = 0; j < sna->mode.num_real_output; j++) if (i != j && output->possible_clones & encoder_mask[j]) clones |= 1 << j; output->possible_clones = clones; DBG(("%s: updated output '%s' %d [%d] (possible crtc:%x, possible clones:%x)\n", __FUNCTION__, output->name, i, to_connector_id(output), (uint32_t)output->possible_crtcs, (uint32_t)output->possible_clones)); } } static int name_from_path(struct sna *sna, struct sna_output *sna_output, char *name) { struct drm_mode_get_blob blob; char *path; int id; id = find_property(sna, sna_output, "PATH"); DBG(("%s: found? PATH=%d\n", __FUNCTION__, id)); if (id == -1) return 0; VG_CLEAR(blob); blob.blob_id = sna_output->prop_values[id]; blob.length = 0; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETPROPBLOB, &blob)) return 0; do { id = blob.length; path = alloca(id + 1); blob.data = (uintptr_t)path; VG(memset(path, 0, id)); DBG(("%s: reading %d bytes for path blob\n", __FUNCTION__, id)); if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETPROPBLOB, &blob)) return 0; } while (id != blob.length); path[blob.length] = '\0'; /* paranoia */ DBG(("%s: PATH='%s'\n", __FUNCTION__, path)); /* we only handle MST paths for now */ if (strncmp(path, "mst:", 4) == 0) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); char tmp[5], *c; int n; c = strchr(path + 4, '-'); if (c == NULL) return 0; id = c - (path + 4); if (id + 1> 5) return 0; memcpy(tmp, path + 4, id); tmp[id] = '\0'; id = strtoul(tmp, NULL, 0); for (n = 0; n < sna->mode.num_real_output; n++) { if (to_sna_output(config->output[n])->id == id) return snprintf(name, 32, "%s-%s", config->output[n]->name, c + 1); } } return 0; } static int sna_output_add(struct sna *sna, unsigned id, unsigned serial) { ScrnInfoPtr scrn = sna->scrn; xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn); union compat_mode_get_connector compat_conn; struct drm_mode_get_encoder enc; struct drm_mode_modeinfo dummy; struct sna_output *sna_output; xf86OutputPtr *outputs, output; unsigned possible_encoders, attached_encoders, possible_crtcs; const char *output_name; char name[32]; int path, len, i; DBG(("%s(%d): serial=%d\n", __FUNCTION__, id, serial)); COMPILE_TIME_ASSERT(sizeof(struct drm_mode_get_connector) <= sizeof(compat_conn.pad)); VG_CLEAR(compat_conn); memset(&enc, 0, sizeof(enc)); compat_conn.conn.connector_id = id; compat_conn.conn.count_props = 0; compat_conn.conn.count_modes = 1; /* skip detect */ compat_conn.conn.modes_ptr = (uintptr_t)&dummy; compat_conn.conn.count_encoders = 1; compat_conn.conn.encoders_ptr = (uintptr_t)&enc.encoder_id; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETCONNECTOR, &compat_conn.conn)) { DBG(("%s: GETCONNECTOR[%d] failed, ret=%d\n", __FUNCTION__, id, errno)); return -1; } assert(compat_conn.conn.connector_id == id); if (compat_conn.conn.connector_type < ARRAY_SIZE(output_names)) output_name = output_names[compat_conn.conn.connector_type]; else output_name = "UNKNOWN"; len = snprintf(name, 32, "%s%d", output_name, compat_conn.conn.connector_type_id); if (output_ignored(scrn, name)) return 0; if (enc.encoder_id) { if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETENCODER, &enc)) { DBG(("%s: GETENCODER[%d] failed, ret=%d\n", __FUNCTION__, enc.encoder_id, errno)); return 0; } possible_encoders = enc.possible_clones; attached_encoders = 0; for (i = 0; i < sna->mode.num_real_encoder; i++) { if (enc.encoder_id == sna->mode.encoders[i]) { attached_encoders = 1 << i; break; } } if (attached_encoders == 0) { DBG(("%s: failed to find attached encoder\n", __FUNCTION__)); return 0; } possible_crtcs = enc.possible_crtcs; assert(enc.encoder_id == compat_conn.conn.encoder_id || compat_conn.conn.encoder_id == 0); } else { DBG(("%s: unexpected number [%d] of encoders attached\n", __FUNCTION__, compat_conn.conn.count_encoders)); if (!gather_encoders(sna, id, compat_conn.conn.count_encoders, &enc)) { DBG(("%s: gather encoders failed\n", __FUNCTION__)); return 0; } possible_encoders = enc.possible_clones; attached_encoders = enc.crtc_id; possible_crtcs = enc.possible_crtcs; memset(&enc, 0, sizeof(enc)); enc.encoder_id = compat_conn.conn.encoder_id; (void)drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETENCODER, &enc); } if (is_zaphod(scrn)) { const char *str; str = xf86GetOptValString(sna->Options, OPTION_ZAPHOD); if (str && !sna_zaphod_match(str, name)) { DBG(("%s: zaphod mismatch, want %s, have %s\n", __FUNCTION__, str, name)); return 0; } if ((possible_crtcs & (1 << scrn->confScreen->device->screen)) == 0) { if (str) { xf86DrvMsg(scrn->scrnIndex, X_ERROR, "%s is an invalid output for screen (pipe) %d\n", name, scrn->confScreen->device->screen); return -1; } else return 0; } possible_crtcs = 1; } sna_output = calloc(sizeof(struct sna_output), 1); if (!sna_output) return -1; sna_output->num_props = compat_conn.conn.count_props; sna_output->prop_ids = malloc(sizeof(uint32_t)*compat_conn.conn.count_props); sna_output->prop_values = malloc(sizeof(uint64_t)*compat_conn.conn.count_props); compat_conn.conn.count_encoders = 0; compat_conn.conn.count_modes = 1; compat_conn.conn.modes_ptr = (uintptr_t)&dummy; compat_conn.conn.count_props = sna_output->num_props; compat_conn.conn.props_ptr = (uintptr_t)sna_output->prop_ids; compat_conn.conn.prop_values_ptr = (uintptr_t)sna_output->prop_values; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETCONNECTOR, &compat_conn.conn)) { DBG(("%s: second! GETCONNECTOR failed, ret=%d\n", __FUNCTION__, errno)); goto cleanup; } assert(compat_conn.conn.connector_id == id); /* statically constructed property list */ assert(sna_output->num_props == compat_conn.conn.count_props); VG(VALGRIND_MAKE_MEM_DEFINED(sna_output->prop_ids, sizeof(uint32_t)*sna_output->num_props)); VG(VALGRIND_MAKE_MEM_DEFINED(sna_output->prop_values, sizeof(uint64_t)*sna_output->num_props)); /* Construct name from topology, and recheck if output is acceptable */ path = name_from_path(sna, sna_output, name); if (path) { const char *str; if (output_ignored(scrn, name)) { len = 0; goto skip; } str = xf86GetOptValString(sna->Options, OPTION_ZAPHOD); if (str && !sna_zaphod_match(str, name)) { DBG(("%s: zaphod mismatch, want %s, have %s\n", __FUNCTION__, str, name)); len = 0; goto skip; } len = path; } /* Check if we are dynamically reattaching an old connector */ if (serial) { for (i = 0; i < sna->mode.num_real_output; i++) { output = config->output[i]; if (strcmp(output->name, name) == 0) { assert(output->scrn == scrn); assert(output->funcs == &sna_output_funcs); assert(to_sna_output(output)->id == 0); sna_output_destroy(output); goto reset; } } } output = calloc(1, sizeof(*output) + len + 1); if (!output) goto cleanup; outputs = realloc(config->output, (config->num_output + 1) * sizeof(output)); if (outputs == NULL) { free(output); goto cleanup; } output->scrn = scrn; output->funcs = &sna_output_funcs; output->name = (char *)(output + 1); memcpy(output->name, name, len + 1); output->use_screen_monitor = config->num_output != 0; xf86OutputUseScreenMonitor(output, !output->use_screen_monitor); assert(output->options); DBG(("%s: inserting output #%d of %d\n", __FUNCTION__, sna->mode.num_real_output, config->num_output)); for (i = config->num_output; i > sna->mode.num_real_output; i--) { outputs[i] = outputs[i-1]; assert(outputs[i]->driver_private == NULL); outputs[i]->possible_clones <<= 1; } if (xf86ReturnOptValBool(output->options, OPTION_PRIMARY, FALSE)) { memmove(outputs + 1, outputs, sizeof(output)*config->num_output); outputs[0] = output; } else outputs[i] = output; sna->mode.num_real_output++; config->num_output++; config->output = outputs; reset: sna_output->id = compat_conn.conn.connector_id; sna_output->is_panel = is_panel(compat_conn.conn.connector_type); sna_output->edid_idx = find_property(sna, sna_output, "EDID"); if (find_property(sna, sna_output, "scaling mode") != -1) sna_output->add_default_modes = xf86ReturnOptValBool(output->options, OPTION_DEFAULT_MODES, TRUE); i = find_property(sna, sna_output, "DPMS"); if (i != -1) { sna_output->dpms_id = sna_output->prop_ids[i]; sna_output->dpms_mode = sna_output->prop_values[i]; DBG(("%s: found 'DPMS' (idx=%d, id=%d), initial value=%d\n", __FUNCTION__, i, sna_output->dpms_id, sna_output->dpms_mode)); } else { sna_output->dpms_id = -1; sna_output->dpms_mode = DPMSModeOff; } sna_output->possible_encoders = possible_encoders; sna_output->attached_encoders = attached_encoders; output->mm_width = compat_conn.conn.mm_width; output->mm_height = compat_conn.conn.mm_height; if (compat_conn.conn.subpixel >= ARRAY_SIZE(subpixel_conv_table)) compat_conn.conn.subpixel = 0; output->subpixel_order = subpixel_conv_table[compat_conn.conn.subpixel]; output->driver_private = sna_output; sna_output->base = output; backlight_init(&sna_output->backlight); if (sna_output->is_panel) sna_output_backlight_init(output); output->possible_crtcs = possible_crtcs & count_to_mask(sna->mode.num_real_crtc); output->interlaceAllowed = TRUE; if (serial) { if (output->randr_output == NULL) { output->randr_output = RROutputCreate(xf86ScrnToScreen(scrn), name, len, output); if (output->randr_output == NULL) goto cleanup; } sna_output_create_resources(output); RRPostPendingProperties(output->randr_output); sna_output->serial = serial; } else { /* stash the active CRTC id for our probe function */ if (compat_conn.conn.connection != DRM_MODE_DISCONNECTED) output->crtc = (void *)(uintptr_t)enc.crtc_id; } DBG(("%s: created output '%s' %d, encoder=%d (possible crtc:%x, attached encoders:%x, possible clones:%x), serial=%d, edid=%d, dpms=%d, crtc=%lu\n", __FUNCTION__, name, id, enc.encoder_id, (uint32_t)output->possible_crtcs, sna_output->attached_encoders, sna_output->possible_encoders, serial, sna_output->edid_idx, sna_output->dpms_id, (unsigned long)(uintptr_t)output->crtc)); assert(sna_output->id == id); xf86DrvMsg(scrn->scrnIndex, X_INFO, "Enabled output %s\n", output->name); return 1; cleanup: len = -1; skip: free(sna_output->prop_ids); free(sna_output->prop_values); free(sna_output); return len; } static void sna_output_del(xf86OutputPtr output) { ScrnInfoPtr scrn = output->scrn; xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn); int i; DBG(("%s(%s)\n", __FUNCTION__, output->name)); assert(to_sna_output(output)); RROutputDestroy(output->randr_output); sna_output_destroy(output); while (output->probed_modes) xf86DeleteMode(&output->probed_modes, output->probed_modes); free(output); for (i = 0; i < config->num_output; i++) if (config->output[i] == output) break; assert(i < to_sna(scrn)->mode.num_real_output); DBG(("%s: removing output #%d of %d\n", __FUNCTION__, i, to_sna(scrn)->mode.num_real_output)); for (; i < config->num_output; i++) { config->output[i] = config->output[i+1]; config->output[i]->possible_clones >>= 1; } config->num_output--; to_sna(scrn)->mode.num_real_output--; } static int output_rank(const void *A, const void *B) { const xf86OutputPtr *a = A; const xf86OutputPtr *b = B; struct sna_output *sa = to_sna_output(*a); struct sna_output *sb = to_sna_output(*b); if (sa->is_panel != sb->is_panel) return sb->is_panel - sa->is_panel; return strcmp((*a)->name, (*b)->name); } static void sort_config_outputs(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); qsort(config->output, sna->mode.num_real_output, sizeof(*config->output), output_rank); sna_mode_compute_possible_outputs(sna); } static void sort_randr_outputs(struct sna *sna, ScreenPtr screen) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); rrScrPriv(screen); int i; assert(pScrPriv->numOutputs == config->num_output); for (i = 0; i < config->num_output; i++) { assert(config->output[i]->randr_output); pScrPriv->outputs[i] = config->output[i]->randr_output; } } static bool disable_unused_crtc(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); bool update = false; int o, c; for (c = 0; c < sna->mode.num_real_crtc; c++) { xf86CrtcPtr crtc = config->crtc[c]; if (!crtc->enabled) continue; for (o = 0; o < sna->mode.num_real_output; o++) { xf86OutputPtr output = config->output[o]; if (output->crtc == crtc) break; } if (o == sna->mode.num_real_output) { DBG(("%s: CRTC:%d was enabled with no outputs\n", __FUNCTION__, to_sna_crtc(crtc)->id)); crtc->enabled = false; update = true; } } if (update) { DBG(("%s: disabling unused functions\n", __FUNCTION__)); xf86DisableUnusedFunctions(sna->scrn); } return update; } void sna_mode_discover(struct sna *sna) { ScreenPtr screen = xf86ScrnToScreen(sna->scrn); xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); struct drm_mode_card_res res; uint32_t connectors[32]; unsigned changed = 0; unsigned serial; int i, j; DBG(("%s()\n", __FUNCTION__)); VG_CLEAR(connectors); memset(&res, 0, sizeof(res)); res.count_connectors = 32; res.connector_id_ptr = (uintptr_t)connectors; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETRESOURCES, &res)) return; DBG(("%s: now %d (was %d) connectors\n", __FUNCTION__, res.count_connectors, sna->mode.num_real_output)); if (res.count_connectors > 32) return; assert(sna->mode.num_real_crtc == res.count_crtcs || is_zaphod(sna->scrn)); assert(sna->mode.max_crtc_width == res.max_width); assert(sna->mode.max_crtc_height == res.max_height); assert(sna->mode.num_real_encoder == res.count_encoders); serial = ++sna->mode.serial; if (serial == 0) serial = ++sna->mode.serial; for (i = 0; i < res.count_connectors; i++) { DBG(("%s: connector[%d] = %d\n", __FUNCTION__, i, connectors[i])); for (j = 0; j < sna->mode.num_real_output; j++) { xf86OutputPtr output = config->output[j]; if (to_sna_output(output)->id == connectors[i]) { DBG(("%s: found %s (id=%d)\n", __FUNCTION__, output->name, connectors[i])); assert(to_sna_output(output)->id); to_sna_output(output)->serial = serial; break; } } if (j == sna->mode.num_real_output) { DBG(("%s: adding id=%d\n", __FUNCTION__, connectors[i])); changed |= sna_output_add(sna, connectors[i], serial) > 0; } } for (i = 0; i < sna->mode.num_real_output; i++) { xf86OutputPtr output = config->output[i]; if (to_sna_output(output)->id == 0) continue; if (to_sna_output(output)->serial == serial) continue; DBG(("%s: removing output %s (id=%d), serial=%u [now %u]\n", __FUNCTION__, output->name, to_sna_output(output)->id, to_sna_output(output)->serial, serial)); xf86DrvMsg(sna->scrn->scrnIndex, X_INFO, "%s output %s\n", sna->flags & SNA_REMOVE_OUTPUTS ? "Removed" : "Disabled", output->name); if (sna->flags & SNA_REMOVE_OUTPUTS) { sna_output_del(output); i--; } else { to_sna_output(output)->id = 0; output->crtc = NULL; } changed |= 2; } if (changed) { DBG(("%s: outputs changed, broadcasting\n", __FUNCTION__)); sna_mode_set_primary(sna); /* Reorder user visible listing */ sort_config_outputs(sna); sort_randr_outputs(sna, screen); if (changed & 2) disable_unused_crtc(sna); xf86RandR12TellChanged(screen); } } static void copy_front(struct sna *sna, PixmapPtr old, PixmapPtr new) { struct sna_pixmap *old_priv, *new_priv; DBG(("%s\n", __FUNCTION__)); if (wedged(sna)) return; old_priv = sna_pixmap_force_to_gpu(old, MOVE_READ); if (!old_priv) return; new_priv = sna_pixmap_force_to_gpu(new, MOVE_WRITE | __MOVE_SCANOUT); if (!new_priv) return; if (old_priv->clear) { (void)sna->render.fill_one(sna, new, new_priv->gpu_bo, old_priv->clear_color, 0, 0, new->drawable.width, new->drawable.height, GXcopy); new_priv->clear = true; new_priv->clear_color = old_priv->clear_color; } else { BoxRec box; int16_t sx, sy, dx, dy; if (new->drawable.width >= old->drawable.width && new->drawable.height >= old->drawable.height) { int nx = (new->drawable.width + old->drawable.width - 1) / old->drawable.width; int ny = (new->drawable.height + old->drawable.height - 1) / old->drawable.height; box.x1 = box.y1 = 0; dy = 0; for (sy = 0; sy < ny; sy++) { box.y2 = old->drawable.height; if (box.y2 + dy > new->drawable.height) box.y2 = new->drawable.height - dy; dx = 0; for (sx = 0; sx < nx; sx++) { box.x2 = old->drawable.width; if (box.x2 + dx > new->drawable.width) box.x2 = new->drawable.width - dx; (void)sna->render.copy_boxes(sna, GXcopy, &old->drawable, old_priv->gpu_bo, 0, 0, &new->drawable, new_priv->gpu_bo, dx, dy, &box, 1, 0); dx += old->drawable.width; } dy += old->drawable.height; } } else { box.x1 = box.y1 = 0; box.x2 = min(old->drawable.width, new->drawable.width); box.y2 = min(old->drawable.height, new->drawable.height); sx = dx = 0; if (box.x2 < old->drawable.width) sx = (old->drawable.width - box.x2) / 2; if (box.x2 < new->drawable.width) dx = (new->drawable.width - box.x2) / 2; sy = dy = 0; if (box.y2 < old->drawable.height) sy = (old->drawable.height - box.y2) / 2; if (box.y2 < new->drawable.height) dy = (new->drawable.height - box.y2) / 2; DBG(("%s: copying box (%dx%d) from (%d, %d) to (%d, %d)\n", __FUNCTION__, box.x2, box.y2, sx, sy, dx, dy)); if (box.x2 != new->drawable.width || box.y2 != new->drawable.height) { (void)sna->render.fill_one(sna, new, new_priv->gpu_bo, 0, 0, 0, new->drawable.width, new->drawable.height, GXclear); } (void)sna->render.copy_boxes(sna, GXcopy, &old->drawable, old_priv->gpu_bo, sx, sy, &new->drawable, new_priv->gpu_bo, dx, dy, &box, 1, 0); } } sna_damage_all(&new_priv->gpu_damage, new); } static Bool sna_mode_resize(ScrnInfoPtr scrn, int width, int height) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn); struct sna *sna = to_sna(scrn); ScreenPtr screen = scrn->pScreen; PixmapPtr new_front; int i; DBG(("%s (%d, %d) -> (%d, %d)\n", __FUNCTION__, scrn->virtualX, scrn->virtualY, width, height)); assert((sna->flags & SNA_IS_HOSTED) == 0); if (scrn->virtualX == width && scrn->virtualY == height) return TRUE; /* Paranoid defense against rogue internal calls by Xorg */ if (width == 0 || height == 0) return FALSE; assert(sna->front); assert(screen->GetScreenPixmap(screen) == sna->front); DBG(("%s: creating new framebuffer %dx%d\n", __FUNCTION__, width, height)); new_front = screen->CreatePixmap(screen, width, height, scrn->depth, SNA_CREATE_FB); if (!new_front) return FALSE; xf86DrvMsg(scrn->scrnIndex, X_INFO, "resizing framebuffer to %dx%d\n", width, height); for (i = 0; i < sna->mode.num_real_crtc; i++) sna_crtc_disable_shadow(sna, to_sna_crtc(config->crtc[i])); assert(sna->mode.shadow_active == 0); assert(sna->mode.shadow_damage == NULL); assert(sna->mode.shadow == NULL); copy_front(sna, sna->front, new_front); screen->SetScreenPixmap(new_front); assert(screen->GetScreenPixmap(screen) == new_front); assert(sna->front == new_front); screen->DestroyPixmap(new_front); /* owned by screen now */ scrn->virtualX = width; scrn->virtualY = height; scrn->displayWidth = width; /* Flush pending shadow updates */ if (sna->mode.flip_active) { DBG(("%s: waiting for %d outstanding TearFree flips\n", __FUNCTION__, sna->mode.flip_active)); while (sna->mode.flip_active && sna_mode_wait_for_event(sna)) sna_mode_wakeup(sna); } /* Only update the CRTCs if we are in control */ if (!scrn->vtSema) return TRUE; for (i = 0; i < sna->mode.num_real_crtc; i++) { xf86CrtcPtr crtc = config->crtc[i]; assert(to_sna_crtc(crtc) != NULL); if (to_sna_crtc(crtc)->bo == NULL) continue; if (!__sna_crtc_set_mode(crtc)) sna_crtc_disable(crtc); } sna_mode_wakeup(sna); kgem_clean_scanout_cache(&sna->kgem); return TRUE; } /* cursor handling */ struct sna_cursor { struct sna_cursor *next; uint32_t *image; Rotation rotation; int ref; int size; int last_width; int last_height; unsigned handle; unsigned serial; unsigned alloc; }; static void rotate_coord(Rotation rotation, int size, int x_dst, int y_dst, int *x_src, int *y_src) { int t; switch (rotation & 0xf) { case RR_Rotate_0: break; case RR_Rotate_90: t = x_dst; x_dst = size - y_dst - 1; y_dst = t; break; case RR_Rotate_180: x_dst = size - x_dst - 1; y_dst = size - y_dst - 1; break; case RR_Rotate_270: t = x_dst; x_dst = y_dst; y_dst = size - t - 1; break; } if (rotation & RR_Reflect_X) x_dst = size - x_dst - 1; if (rotation & RR_Reflect_Y) y_dst = size - y_dst - 1; *x_src = x_dst; *y_src = y_dst; } static void rotate_coord_back(Rotation rotation, int size, int *x, int *y) { int t; if (rotation & RR_Reflect_X) *x = size - *x - 1; if (rotation & RR_Reflect_Y) *y = size - *y - 1; switch (rotation & 0xf) { case RR_Rotate_0: break; case RR_Rotate_90: t = *x; *x = *y; *y = size - t - 1; break; case RR_Rotate_180: *x = size - *x - 1; *y = size - *y - 1; break; case RR_Rotate_270: t = *x; *x = size - *y - 1; *y = t; break; } } static struct sna_cursor *__sna_create_cursor(struct sna *sna, int size) { struct sna_cursor *c; for (c = sna->cursor.cursors; c; c = c->next) { if (c->ref == 0 && c->alloc >= size) { __DBG(("%s: stealing handle=%d, serial=%d, rotation=%d, alloc=%d\n", __FUNCTION__, c->handle, c->serial, c->rotation, c->alloc)); return c; } } __DBG(("%s(size=%d, num_stash=%d)\n", __FUNCTION__, size, sna->cursor.num_stash)); c = sna->cursor.stash; assert(c); c->alloc = ALIGN(size, 4096); c->handle = gem_create(sna->kgem.fd, c->alloc); if (c->handle == 0) return NULL; /* Old hardware uses physical addresses, which the kernel * implements in an incoherent fashion requiring a pwrite. */ if (sna->cursor.use_gtt) { c->image = gem_mmap(sna->kgem.fd, c->handle, c->alloc); if (c->image == NULL) { gem_close(sna->kgem.fd, c->handle); return NULL; } } else c->image = NULL; __DBG(("%s: handle=%d, allocated %d\n", __FUNCTION__, c->handle, size)); c->ref = 0; c->serial = 0; c->rotation = 0; c->last_width = c->last_height = 0; /* all clear */ c->size = size; sna->cursor.num_stash--; sna->cursor.stash = c->next; c->next = sna->cursor.cursors; sna->cursor.cursors = c; return c; } static uint32_t *get_cursor_argb(CursorPtr c) { #ifdef ARGB_CURSOR return (uint32_t *)c->bits->argb; #else return NULL; #endif } static struct sna_cursor *__sna_get_cursor(struct sna *sna, xf86CrtcPtr crtc) { struct sna_cursor *cursor; const uint8_t *source, *mask; const uint32_t *argb; uint32_t *image; int width, height, pitch, size, x, y; Rotation rotation; assert(sna->cursor.ref); cursor = to_sna_crtc(crtc)->cursor; __DBG(("%s: current cursor handle=%d, serial=%d [expected %d]\n", __FUNCTION__, cursor ? cursor->handle : 0, cursor ? cursor->serial : 0, sna->cursor.serial)); if (cursor && cursor->serial == sna->cursor.serial) { assert(cursor->size == sna->cursor.size); assert(cursor->rotation == crtc->transform_in_use ? crtc->rotation : RR_Rotate_0); assert(cursor->ref); return cursor; } __DBG(("%s: cursor=%dx%d, pitch=%d, serial=%d, argb?=%d\n", __FUNCTION__, sna->cursor.ref->bits->width, sna->cursor.ref->bits->height, get_cursor_argb(sna->cursor.ref) ? 4*sna->cursor.ref->bits->width : BitmapBytePad(sna->cursor.ref->bits->width), sna->cursor.serial, get_cursor_argb(sna->cursor.ref) != NULL)); rotation = crtc->transform_in_use ? crtc->rotation : RR_Rotate_0; if (sna->cursor.use_gtt) { /* Don't allow phys cursor sharing */ for (cursor = sna->cursor.cursors; cursor; cursor = cursor->next) { if (cursor->serial == sna->cursor.serial && cursor->rotation == rotation) { __DBG(("%s: reusing handle=%d, serial=%d, rotation=%d, size=%d\n", __FUNCTION__, cursor->handle, cursor->serial, cursor->rotation, cursor->size)); assert(cursor->size == sna->cursor.size); return cursor; } } cursor = to_sna_crtc(crtc)->cursor; } size = sna->cursor.size; if (cursor && cursor->alloc < 4*size*size) cursor = NULL; if (cursor == NULL) { cursor = __sna_create_cursor(sna, 4*size*size); if (cursor == NULL) { DBG(("%s: failed to allocate cursor\n", __FUNCTION__)); return NULL; } } width = sna->cursor.ref->bits->width; height = sna->cursor.ref->bits->height; source = sna->cursor.ref->bits->source; mask = sna->cursor.ref->bits->mask; argb = get_cursor_argb(sna->cursor.ref); pitch = BitmapBytePad(width); image = cursor->image; if (image == NULL) { image = sna->cursor.scratch; cursor->last_width = cursor->last_height = size; } if (size > cursor->size || width < cursor->last_width || height < cursor->last_height || rotation != cursor->rotation) memset(image, 0, 4*size*size); if (rotation == RR_Rotate_0) { if (argb == NULL) { for (y = 0; y < height; y++) { uint32_t *p = image + y*size; for (x = 0; x < width; x++) { int byte = x / 8; uint8_t bit = 1 << (x & 7); uint32_t pixel; if (mask[byte] & bit) { if (source[byte] & bit) pixel = sna->cursor.fg; else pixel = sna->cursor.bg; } else pixel = 0; *p++ = pixel; } mask += pitch; source += pitch; } } else memcpy_blt(argb, image, 32, width * 4, size * 4, 0, 0, 0, 0, width, height); } else { for (y = 0; y < size; y++) for (x = 0; x < size; x++) { uint32_t pixel; int xin, yin; rotate_coord(rotation, size, x, y, &xin, &yin); if (xin < width && yin < height) if (argb == NULL) { int byte = xin / 8; int bit = xin & 7; if (mask[yin*pitch + byte] & (1 << bit)) { if (source[yin*pitch + byte] & (1 << bit)) pixel = sna->cursor.fg; else pixel = sna->cursor.bg; } else pixel = 0; } else pixel = argb[yin * width + xin]; else pixel = 0; image[y * size + x] = pixel; } } if (image != cursor->image) { struct drm_i915_gem_pwrite pwrite; VG_CLEAR(pwrite); pwrite.handle = cursor->handle; pwrite.offset = 0; pwrite.size = 4*size*size; pwrite.data_ptr = (uintptr_t)image; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_GEM_PWRITE, &pwrite)) __DBG(("%s: cursor update (pwrite) failed: %d\n", __FUNCTION__, errno)); } cursor->size = size; cursor->rotation = rotation; cursor->serial = sna->cursor.serial; cursor->last_width = width; cursor->last_height = height; return cursor; } static unsigned char * sna_realize_cursor(xf86CursorInfoPtr info, CursorPtr cursor) { return NULL; } #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,12,99,901,0) static inline int sigio_block(void) { OsBlockSIGIO(); return 0; } static inline void sigio_unblock(int was_blocked) { OsReleaseSIGIO(); (void)was_blocked; } #else #include static inline int sigio_block(void) { return xf86BlockSIGIO(); } static inline void sigio_unblock(int was_blocked) { xf86UnblockSIGIO(was_blocked); } #endif static void sna_show_cursors(ScrnInfoPtr scrn) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); struct sna *sna = to_sna(scrn); int sigio, c; DBG(("%s: cursor?=%d\n", __FUNCTION__, sna->cursor.ref != NULL)); if (sna->cursor.ref == NULL) return; sigio = sigio_block(); for (c = 0; c < sna->mode.num_real_crtc; c++) { xf86CrtcPtr crtc = xf86_config->crtc[c]; struct sna_crtc *sna_crtc = to_sna_crtc(crtc); struct drm_mode_cursor arg; struct sna_cursor *cursor; assert(sna_crtc != NULL); if (sna_crtc->bo == NULL) continue; if (!crtc->cursor_in_range) { DBG(("%s: skipping cursor outside CRTC (pipe=%d)\n", __FUNCTION__, sna_crtc->pipe)); continue; } cursor = __sna_get_cursor(sna, crtc); if (cursor == NULL || (sna_crtc->cursor == cursor && sna_crtc->last_cursor_size == cursor->size)) { DBG(("%s: skipping cursor already show on CRTC (pipe=%d)\n", __FUNCTION__, sna_crtc->pipe)); continue; } DBG(("%s: CRTC pipe=%d, handle->%d\n", __FUNCTION__, sna_crtc->pipe, cursor->handle)); VG_CLEAR(arg); arg.flags = DRM_MODE_CURSOR_BO; arg.crtc_id = sna_crtc->id; arg.width = arg.height = cursor->size; arg.handle = cursor->handle; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_CURSOR, &arg) == 0) { if (sna_crtc->cursor) { assert(sna_crtc->cursor->ref > 0); sna_crtc->cursor->ref--; } cursor->ref++; sna_crtc->cursor = cursor; sna_crtc->last_cursor_size = cursor->size; } } sigio_unblock(sigio); sna->cursor.active = true; } static void sna_set_cursor_colors(ScrnInfoPtr scrn, int _bg, int _fg) { struct sna *sna = to_sna(scrn); uint32_t fg = _fg, bg = _bg; __DBG(("%s(bg=%08x, fg=%08x)\n", __FUNCTION__, bg, fg)); /* Save ARGB versions of these colors */ fg |= 0xff000000; bg |= 0xff000000; if (fg == sna->cursor.fg && bg == sna->cursor.bg) return; sna->cursor.fg = fg; sna->cursor.bg = bg; if (sna->cursor.ref == NULL) return; if (get_cursor_argb(sna->cursor.ref)) return; sna->cursor.serial++; __DBG(("%s: serial->%d\n", __FUNCTION__, sna->cursor.serial)); sna_show_cursors(scrn); } static void sna_crtc_disable_cursor(struct sna *sna, struct sna_crtc *crtc) { struct drm_mode_cursor arg; if (!crtc->cursor) return; DBG(("%s: CRTC:%d, handle=%d\n", __FUNCTION__, crtc->id, crtc->cursor->handle)); assert(crtc->cursor->ref); VG_CLEAR(arg); arg.flags = DRM_MODE_CURSOR_BO; arg.crtc_id = crtc->id; arg.width = arg.height = 0; arg.handle = 0; (void)drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_CURSOR, &arg); assert(crtc->cursor->ref > 0); crtc->cursor->ref--; crtc->cursor = NULL; crtc->last_cursor_size = 0; } static void sna_hide_cursors(ScrnInfoPtr scrn) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); struct sna *sna = to_sna(scrn); struct sna_cursor *cursor, **prev; int sigio, c; DBG(("%s\n", __FUNCTION__)); sna->cursor.active = false; sigio = sigio_block(); for (c = 0; c < sna->mode.num_real_crtc; c++) { assert(to_sna_crtc(xf86_config->crtc[c])); sna_crtc_disable_cursor(sna, to_sna_crtc(xf86_config->crtc[c])); } for (prev = &sna->cursor.cursors; (cursor = *prev) != NULL; ) { assert(cursor->ref == 0); if (cursor->serial == sna->cursor.serial) { prev = &cursor->next; continue; } *prev = cursor->next; if (cursor->image) munmap(cursor->image, cursor->alloc); gem_close(sna->kgem.fd, cursor->handle); cursor->next = sna->cursor.stash; sna->cursor.stash = cursor; sna->cursor.num_stash++; } sigio_unblock(sigio); } static void sna_set_cursor_position(ScrnInfoPtr scrn, int x, int y) { xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); struct sna *sna = to_sna(scrn); int sigio, c; __DBG(("%s(%d, %d), cursor? %d\n", __FUNCTION__, x, y, sna->cursor.ref!=NULL)); if (sna->cursor.ref == NULL) return; sigio = sigio_block(); sna->cursor.last_x = x; sna->cursor.last_y = y; /* undo what xf86HWCurs did to the coordinates */ x += scrn->frameX0; y += scrn->frameY0; for (c = 0; c < sna->mode.num_real_crtc; c++) { xf86CrtcPtr crtc = xf86_config->crtc[c]; struct sna_crtc *sna_crtc = to_sna_crtc(crtc); struct sna_cursor *cursor = NULL; struct drm_mode_cursor arg; assert(sna_crtc != NULL); VG_CLEAR(arg); arg.flags = 0; arg.crtc_id = sna_crtc->id; arg.handle = 0; if (sna_crtc->bo == NULL) goto disable; if (crtc->transform_in_use) { int xhot = sna->cursor.ref->bits->xhot; int yhot = sna->cursor.ref->bits->yhot; struct pict_f_vector v; v.v[0] = (x + xhot) + 0.5; v.v[1] = (y + yhot) + 0.5; v.v[2] = 1; pixman_f_transform_point(&crtc->f_framebuffer_to_crtc, &v); rotate_coord_back(crtc->rotation, sna->cursor.size, &xhot, &yhot); /* cursor will have 0.5 added to it already so floor is sufficent */ arg.x = floor(v.v[0]) - xhot; arg.y = floor(v.v[1]) - yhot; } else { arg.x = x - crtc->x; arg.y = y - crtc->y; } if (arg.x < crtc->mode.HDisplay && arg.x > -sna->cursor.size && arg.y < crtc->mode.VDisplay && arg.y > -sna->cursor.size) { cursor = __sna_get_cursor(sna, crtc); if (cursor == NULL) cursor = sna_crtc->cursor; if (cursor == NULL) { __DBG(("%s: failed to grab cursor, disabling\n", __FUNCTION__)); goto disable; } if (sna_crtc->cursor != cursor || sna_crtc->last_cursor_size != cursor->size) { arg.flags |= DRM_MODE_CURSOR_BO; arg.handle = cursor->handle; } arg.width = arg.height = cursor->size; arg.flags |= DRM_MODE_CURSOR_MOVE; crtc->cursor_in_range = true; } else { crtc->cursor_in_range = false; disable: if (sna_crtc->cursor) { arg.flags = DRM_MODE_CURSOR_BO; arg.width = arg.height = 0; } cursor = NULL; } __DBG(("%s: CRTC:%d (%d, %d), handle=%d, flags=%x (old cursor handle=%d), move? %d, update handle? %d\n", __FUNCTION__, sna_crtc->id, arg.x, arg.y, arg.handle, arg.flags, sna_crtc->cursor ? sna_crtc->cursor->handle : 0, arg.flags & DRM_MODE_CURSOR_MOVE, arg.flags & DRM_MODE_CURSOR_BO)); if (arg.flags && drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_CURSOR, &arg) == 0) { if (arg.flags & DRM_MODE_CURSOR_BO) { if (sna_crtc->cursor) { assert(sna_crtc->cursor->ref > 0); sna_crtc->cursor->ref--; } sna_crtc->cursor = cursor; if (cursor) { sna_crtc->last_cursor_size = cursor->size; cursor->ref++; } else sna_crtc->last_cursor_size = 0; } } } sigio_unblock(sigio); } #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,15,99,902,2) static Bool sna_load_cursor_argb2(ScrnInfoPtr scrn, CursorPtr cursor) { return TRUE; } static Bool sna_load_cursor_image2(ScrnInfoPtr scrn, unsigned char *src) { return TRUE; } #endif static void sna_load_cursor_argb(ScrnInfoPtr scrn, CursorPtr cursor) { } static void sna_load_cursor_image(ScrnInfoPtr scrn, unsigned char *src) { } static int __cursor_size(CursorPtr cursor) { int i, size; i = MAX(cursor->bits->width, cursor->bits->height); for (size = 64; size < i; size <<= 1) ; return size; } static bool sna_cursor_preallocate(struct sna *sna) { while (sna->cursor.num_stash < 0) { struct sna_cursor *cursor = malloc(sizeof(*cursor)); if (!cursor) return false; cursor->next = sna->cursor.stash; sna->cursor.stash = cursor; sna->cursor.num_stash++; } return true; } static Bool sna_use_hw_cursor(ScreenPtr screen, CursorPtr cursor) { struct sna *sna = to_sna_from_screen(screen); DBG(("%s (%dx%d)?\n", __FUNCTION__, cursor->bits->width, cursor->bits->height)); /* cursors are invariant */ if (cursor == sna->cursor.ref) return TRUE; if (sna->cursor.ref) { FreeCursor(sna->cursor.ref, None); sna->cursor.ref = NULL; } sna->cursor.size = __cursor_size(cursor); if (sna->cursor.size > sna->cursor.max_size) return FALSE; if (!sna_cursor_preallocate(sna)) return FALSE; sna->cursor.ref = cursor; cursor->refcnt++; sna->cursor.serial++; DBG(("%s(%dx%d): ARGB?=%d, serial->%d, size->%d\n", __FUNCTION__, cursor->bits->width, cursor->bits->height, get_cursor_argb(cursor) != NULL, sna->cursor.serial, sna->cursor.size)); return TRUE; } static void sna_cursor_pre_init(struct sna *sna) { struct local_get_cap { uint64_t name; uint64_t value; } cap; int v; if (sna->mode.num_real_crtc == 0) return; #define LOCAL_IOCTL_GET_CAP DRM_IOWR(0x0c, struct local_get_cap) #define DRM_CAP_CURSOR_WIDTH 8 #define DRM_CAP_CURSOR_HEIGHT 9 #define I915_PARAM_HAS_COHERENT_PHYS_GTT 29 sna->cursor.max_size = 64; cap.value = 0; cap.name = DRM_CAP_CURSOR_WIDTH; if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_GET_CAP, &cap) == 0) sna->cursor.max_size = cap.value; cap.name = DRM_CAP_CURSOR_HEIGHT; if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_GET_CAP, &cap) == 0 && cap.value < sna->cursor.max_size) sna->cursor.max_size = cap.value; v = -1; /* No param uses the sign bit, reserve it for errors */ if (sna->kgem.gen >= 033) { v = 1; } else { drm_i915_getparam_t gp = { I915_PARAM_HAS_COHERENT_PHYS_GTT, &v, }; (void)drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_GETPARAM, &gp); } sna->cursor.use_gtt = v > 0; DBG(("%s: cursor updates use_gtt?=%d\n", __FUNCTION__, sna->cursor.use_gtt)); if (!sna->cursor.use_gtt) { sna->cursor.scratch = malloc(sna->cursor.max_size * sna->cursor.max_size * 4); if (!sna->cursor.scratch) sna->cursor.max_size = 0; } sna->cursor.num_stash = -sna->mode.num_real_crtc; xf86DrvMsg(sna->scrn->scrnIndex, X_PROBED, "Using a maximum size of %dx%d for hardware cursors\n", sna->cursor.max_size, sna->cursor.max_size); } static void sna_cursor_close(struct sna *sna) { sna->cursor.serial = 0; sna_hide_cursors(sna->scrn); while (sna->cursor.stash) { struct sna_cursor *cursor = sna->cursor.stash; sna->cursor.stash = cursor->next; free(cursor); } sna->cursor.num_stash = -sna->mode.num_real_crtc; } bool sna_cursors_init(ScreenPtr screen, struct sna *sna) { xf86CursorInfoPtr cursor_info; if (sna->cursor.max_size == 0) return false; cursor_info = xf86CreateCursorInfoRec(); if (cursor_info == NULL) return false; cursor_info->MaxWidth = sna->cursor.max_size; cursor_info->MaxHeight = sna->cursor.max_size; cursor_info->Flags = (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP | HARDWARE_CURSOR_UPDATE_UNHIDDEN | HARDWARE_CURSOR_ARGB); cursor_info->RealizeCursor = sna_realize_cursor; cursor_info->SetCursorColors = sna_set_cursor_colors; cursor_info->SetCursorPosition = sna_set_cursor_position; cursor_info->LoadCursorImage = sna_load_cursor_image; cursor_info->HideCursor = sna_hide_cursors; cursor_info->ShowCursor = sna_show_cursors; cursor_info->UseHWCursor = sna_use_hw_cursor; #ifdef ARGB_CURSOR cursor_info->UseHWCursorARGB = sna_use_hw_cursor; cursor_info->LoadCursorARGB = sna_load_cursor_argb; #endif #if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,15,99,902,3) cursor_info->LoadCursorImageCheck = sna_load_cursor_image2; #ifdef ARGB_CURSOR cursor_info->LoadCursorARGBCheck = sna_load_cursor_argb2; #endif #endif if (!xf86InitCursor(screen, cursor_info)) { xf86DestroyCursorInfoRec(cursor_info); return false; } sna->cursor.info = cursor_info; return true; } static void sna_cursors_reload(struct sna *sna) { DBG(("%s: active?=%d\n", __FUNCTION__, sna->cursor.active)); if (sna->cursor.active) sna_set_cursor_position(sna->scrn, sna->cursor.last_x, sna->cursor.last_y); } static void sna_cursors_fini(struct sna *sna) { if (sna->cursor.info) { xf86DestroyCursorInfoRec(sna->cursor.info); sna->cursor.info = NULL; } if (sna->cursor.ref) { FreeCursor(sna->cursor.ref, None); sna->cursor.ref = NULL; } } static bool sna_crtc_flip(struct sna *sna, struct sna_crtc *crtc, struct kgem_bo *bo, int x, int y) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); struct drm_mode_crtc arg; uint32_t output_ids[32]; int output_count = 0; int i; DBG(("%s CRTC:%d [pipe=%d], handle=%d\n", __FUNCTION__, crtc->id, crtc->pipe, bo->handle)); assert(sna->mode.num_real_output < ARRAY_SIZE(output_ids)); assert(crtc->bo); assert(crtc->kmode.clock); for (i = 0; i < sna->mode.num_real_output; i++) { xf86OutputPtr output = config->output[i]; if (output->crtc != crtc->base) continue; DBG(("%s: attaching output '%s' %d [%d] to crtc:%d (pipe %d) (possible crtc:%x, possible clones:%x)\n", __FUNCTION__, output->name, i, to_connector_id(output), crtc->id, crtc->pipe, (uint32_t)output->possible_crtcs, (uint32_t)output->possible_clones)); assert(output->possible_crtcs & (1 << crtc->pipe) || is_zaphod(sna->scrn)); output_ids[output_count] = to_connector_id(output); if (++output_count == ARRAY_SIZE(output_ids)) return false; } assert(output_count); VG_CLEAR(arg); arg.crtc_id = crtc->id; arg.fb_id = fb_id(bo); assert(arg.fb_id); arg.x = x; arg.y = y; arg.set_connectors_ptr = (uintptr_t)output_ids; arg.count_connectors = output_count; arg.mode = crtc->kmode; arg.mode_valid = 1; DBG(("%s: applying crtc [%d, pipe=%d] mode=%dx%d+%d+%d@%d, fb=%d across %d outputs [%d...]\n", __FUNCTION__, crtc->id, crtc->pipe, arg.mode.hdisplay, arg.mode.vdisplay, arg.x, arg.y, arg.mode.clock, arg.fb_id, output_count, output_count ? output_ids[0] : 0)); if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_SETCRTC, &arg)) return false; crtc->offset = y << 16 | x; return true; } int sna_page_flip(struct sna *sna, struct kgem_bo *bo, sna_flip_handler_t handler, void *data) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); const int width = sna->scrn->virtualX; const int height = sna->scrn->virtualY; int count = 0; int i; DBG(("%s: handle %d attached\n", __FUNCTION__, bo->handle)); assert(bo->refcnt); assert((sna->flags & SNA_IS_HOSTED) == 0); assert((sna->flags & SNA_TEAR_FREE) == 0); assert(sna->mode.flip_active == 0); assert(sna->mode.front_active); assert(sna->scrn->vtSema); if ((sna->flags & (data ? SNA_HAS_FLIP : SNA_HAS_ASYNC_FLIP)) == 0) return 0; kgem_bo_submit(&sna->kgem, bo); for (i = 0; i < sna->mode.num_real_crtc; i++) { struct sna_crtc *crtc = config->crtc[i]->driver_private; struct drm_mode_crtc_page_flip arg; uint32_t crtc_offset; DBG(("%s: crtc %d id=%d, pipe=%d active? %d\n", __FUNCTION__, i, crtc->id, crtc->pipe, crtc->bo != NULL)); if (crtc->bo == NULL) continue; assert(!crtc->transform); assert(!crtc->slave_pixmap); assert(crtc->bo->active_scanout); assert(crtc->bo->refcnt >= crtc->bo->active_scanout); assert(crtc->flip_bo == NULL); arg.crtc_id = crtc->id; arg.fb_id = get_fb(sna, bo, width, height); if (arg.fb_id == 0) { assert(count == 0); return 0; } crtc_offset = crtc->base->y << 16 | crtc->base->x; if (bo->pitch != crtc->bo->pitch || crtc_offset != crtc->offset) { DBG(("%s: changing pitch (%d == %d) or offset (%x == %x)\n", __FUNCTION__, bo->pitch, crtc->bo->pitch, crtc_offset, crtc->offset)); fixup_flip: if (crtc->bo != bo && sna_crtc_flip(sna, crtc, bo, crtc->base->x, crtc->base->y)) { assert(crtc->bo->active_scanout); assert(crtc->bo->refcnt >= crtc->bo->active_scanout); crtc->bo->active_scanout--; kgem_bo_destroy(&sna->kgem, crtc->bo); if (crtc->shadow_bo) { kgem_bo_destroy(&sna->kgem, crtc->shadow_bo); crtc->shadow_bo = NULL; } crtc->bo = kgem_bo_reference(bo); crtc->bo->active_scanout++; if (data == NULL) goto next_crtc; /* queue a flip in order to send the event */ } else { if (count && !xf86SetDesiredModes(sna->scrn)) { xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, "failed to restore display configuration\n"); for (; i < sna->mode.num_real_crtc; i++) sna_crtc_disable(config->crtc[i]); } return 0; } } /* Only the reference crtc will finally deliver its page flip * completion event. All other crtc's events will be discarded. */ if (data) { arg.user_data = (uintptr_t)crtc; arg.flags = DRM_MODE_PAGE_FLIP_EVENT; } else { arg.user_data = 0; arg.flags = DRM_MODE_PAGE_FLIP_ASYNC; } arg.reserved = 0; retry_flip: DBG(("%s: crtc %d id=%d, pipe=%d --> fb %d\n", __FUNCTION__, i, crtc->id, crtc->pipe, arg.fb_id)); if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_PAGE_FLIP, &arg)) { ERR(("%s: pageflip failed with err=%d\n", __FUNCTION__, errno)); if (errno == EBUSY) { struct drm_mode_crtc mode; memset(&mode, 0, sizeof(mode)); mode.crtc_id = crtc->id; drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETCRTC, &mode); DBG(("%s: crtc=%d, valid?=%d, fb attached?=%d, expected=%d\n", __FUNCTION__, mode.crtc_id, mode.mode_valid, mode.fb_id, fb_id(crtc->bo))); if (mode.fb_id != fb_id(crtc->bo)) goto fixup_flip; if (count == 0) return 0; DBG(("%s: throttling on busy flip / waiting for kernel to catch up\n", __FUNCTION__)); drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_GEM_THROTTLE, 0); sna->kgem.need_throttle = false; goto retry_flip; } xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, "page flipping failed, on CRTC:%d (pipe=%d), disabling %s page flips\n", crtc->id, crtc->pipe, data ? "synchronous": "asynchronous"); sna->flags &= ~(data ? SNA_HAS_FLIP : SNA_HAS_ASYNC_FLIP); goto fixup_flip; } if (data) { assert(crtc->flip_bo == NULL); crtc->flip_handler = handler; crtc->flip_data = data; crtc->flip_bo = kgem_bo_reference(bo); crtc->flip_bo->active_scanout++; crtc->flip_serial = crtc->mode_serial; crtc->flip_pending = true; sna->mode.flip_active++; } next_crtc: count++; } DBG(("%s: page flipped %d crtcs\n", __FUNCTION__, count)); return count; } static const xf86CrtcConfigFuncsRec sna_mode_funcs = { sna_mode_resize }; static void set_size_range(struct sna *sna) { /* We lie slightly as we expect no single monitor to exceed the * crtc limits, so if the mode exceeds the scanout restrictions, * we will quietly convert that to per-crtc pixmaps. */ xf86CrtcSetSizeRange(sna->scrn, 8, 8, INT16_MAX, INT16_MAX); } #if HAS_GAMMA static void set_gamma(uint16_t *curve, int size, double value) { int i; value = 1/value; for (i = 0; i < size; i++) curve[i] = 256*(size-1)*pow(i/(double)(size-1), value); } static void output_set_gamma(xf86OutputPtr output, xf86CrtcPtr crtc) { XF86ConfMonitorPtr mon = output->conf_monitor; if (!mon) return; DBG(("%s: red=%f\n", __FUNCTION__, mon->mon_gamma_red)); if (mon->mon_gamma_red >= GAMMA_MIN && mon->mon_gamma_red <= GAMMA_MAX && mon->mon_gamma_red != 1.0) set_gamma(crtc->gamma_red, crtc->gamma_size, mon->mon_gamma_red); DBG(("%s: green=%f\n", __FUNCTION__, mon->mon_gamma_green)); if (mon->mon_gamma_green >= GAMMA_MIN && mon->mon_gamma_green <= GAMMA_MAX && mon->mon_gamma_green != 1.0) set_gamma(crtc->gamma_green, crtc->gamma_size, mon->mon_gamma_green); DBG(("%s: blue=%f\n", __FUNCTION__, mon->mon_gamma_blue)); if (mon->mon_gamma_blue >= GAMMA_MIN && mon->mon_gamma_blue <= GAMMA_MAX && mon->mon_gamma_blue != 1.0) set_gamma(crtc->gamma_blue, crtc->gamma_size, mon->mon_gamma_blue); } static void crtc_init_gamma(xf86CrtcPtr crtc) { uint16_t *gamma; /* Initialize the gamma ramps */ gamma = NULL; if (crtc->gamma_size == 256) gamma = crtc->gamma_red; if (gamma == NULL) gamma = malloc(3 * 256 * sizeof(uint16_t)); if (gamma) { struct sna *sna = to_sna(crtc->scrn); struct sna_crtc *sna_crtc = to_sna_crtc(crtc); struct drm_mode_crtc_lut lut; bool gamma_set = false; assert(sna_crtc); lut.crtc_id = sna_crtc->id; lut.gamma_size = 256; lut.red = (uintptr_t)(gamma); lut.green = (uintptr_t)(gamma + 256); lut.blue = (uintptr_t)(gamma + 2 * 256); if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETGAMMA, &lut) == 0) { VG(VALGRIND_MAKE_MEM_DEFINED(gamma, 3*256*sizeof(gamma[0]))); gamma_set = gamma[256 - 1] && gamma[2*256 - 1] && gamma[3*256 - 1]; } DBG(("%s: CRTC:%d, pipe=%d: gamma set?=%d\n", __FUNCTION__, sna_crtc->id, sna_crtc->pipe, gamma_set)); if (!gamma_set) { int i; for (i = 0; i < 256; i++) { gamma[i] = i << 8; gamma[256 + i] = i << 8; gamma[2*256 + i] = i << 8; } } if (gamma != crtc->gamma_red) { free(crtc->gamma_red); crtc->gamma_red = gamma; crtc->gamma_green = gamma + 256; crtc->gamma_blue = gamma + 2*256; } } } #else static void output_set_gamma(xf86OutputPtr output, xf86CrtcPtr crtc) { } static void crtc_init_gamma(xf86CrtcPtr crtc) { } #endif static const char *preferred_mode(xf86OutputPtr output) { const char *mode; mode = xf86GetOptValString(output->options, OPTION_PREFERRED_MODE); if (mode) return mode; if (output->scrn->display->modes && *output->scrn->display->modes) return *output->scrn->display->modes; return NULL; } static bool sna_probe_initial_configuration(struct sna *sna) { ScrnInfoPtr scrn = sna->scrn; xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn); int width, height; int i, j; assert((sna->flags & SNA_IS_HOSTED) == 0); if ((sna->flags & SNA_IS_SLAVED) == 0) { const int user_overrides[] = { OPTION_POSITION, OPTION_BELOW, OPTION_RIGHT_OF, OPTION_ABOVE, OPTION_LEFT_OF, OPTION_ROTATE, OPTION_PANNING, }; if (xf86ReturnOptValBool(sna->Options, OPTION_REPROBE, FALSE)) { DBG(("%s: user requests reprobing\n", __FUNCTION__)); return false; } /* First scan through all outputs and look for user overrides */ for (i = 0; i < sna->mode.num_real_output; i++) { xf86OutputPtr output = config->output[i]; for (j = 0; j < ARRAY_SIZE(user_overrides); j++) { if (xf86GetOptValString(output->options, user_overrides[j])) { DBG(("%s: user placement [%d] for %s\n", __FUNCTION__, user_overrides[j], output->name)); return false; } } } } /* Copy the existing modes on each CRTCs */ for (i = 0; i < sna->mode.num_real_crtc; i++) { xf86CrtcPtr crtc = config->crtc[i]; struct sna_crtc *sna_crtc = to_sna_crtc(crtc); struct drm_mode_crtc mode; crtc->enabled = FALSE; crtc->desiredMode.status = MODE_NOMODE; crtc_init_gamma(crtc); /* Retrieve the current mode */ VG_CLEAR(mode); mode.crtc_id = sna_crtc->id; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETCRTC, &mode)) continue; DBG(("%s: CRTC:%d, pipe=%d: has mode?=%d\n", __FUNCTION__, sna_crtc->id, sna_crtc->pipe, mode.mode_valid && mode.mode.clock)); if (!mode.mode_valid || mode.mode.clock == 0) continue; mode_from_kmode(scrn, &mode.mode, &crtc->desiredMode); crtc->desiredRotation = sna_crtc->primary.rotation.current; crtc->desiredX = mode.x; crtc->desiredY = mode.y; crtc->desiredTransformPresent = FALSE; } /* Reconstruct outputs pointing to active CRTC */ for (i = 0; i < sna->mode.num_real_output; i++) { xf86OutputPtr output = config->output[i]; uint32_t crtc_id; assert(to_sna_output(output)); crtc_id = (uintptr_t)output->crtc; output->crtc = NULL; if (sna->flags & SNA_IS_SLAVED) continue; if (crtc_id == 0) { DBG(("%s: not using output %s, disconnected\n", __FUNCTION__, output->name)); continue; } if (xf86ReturnOptValBool(output->options, OPTION_DISABLE, 0)) { DBG(("%s: not using output %s, manually disabled\n", __FUNCTION__, output->name)); continue; } for (j = 0; j < sna->mode.num_real_crtc; j++) { xf86CrtcPtr crtc = config->crtc[j]; assert(to_sna_crtc(crtc)); if (to_sna_crtc(crtc)->id != crtc_id) continue; if (crtc->desiredMode.status == MODE_OK) { DisplayModePtr M; const char *pref; pref = preferred_mode(output); if (pref && strcmp(pref, crtc->desiredMode.name)) { DBG(("%s: output %s user requests a different preferred mode %s, found %s\n", __FUNCTION__, output->name, pref, crtc->desiredMode.name)); return false; } xf86DrvMsg(scrn->scrnIndex, X_PROBED, "Output %s using initial mode %s on pipe %d\n", output->name, crtc->desiredMode.name, to_sna_crtc(crtc)->pipe); output->crtc = crtc; crtc->enabled = TRUE; if (output->mm_width == 0 || output->mm_height == 0) { output->mm_height = (crtc->desiredMode.VDisplay * 254) / (10*DEFAULT_DPI); output->mm_width = (crtc->desiredMode.HDisplay * 254) / (10*DEFAULT_DPI); } output_set_gamma(output, crtc); M = calloc(1, sizeof(DisplayModeRec)); if (M) { *M = crtc->desiredMode; M->name = strdup(M->name); output->probed_modes = xf86ModesAdd(output->probed_modes, M); } } break; } if (j == sna->mode.num_real_crtc) { /* Can not find the earlier associated CRTC, bail */ DBG(("%s: existing setup conflicts with output assignment (Zaphod), reprobing\n", __FUNCTION__)); return false; } } width = height = 0; for (i = 0; i < sna->mode.num_real_crtc; i++) { xf86CrtcPtr crtc = config->crtc[i]; int w, h; if (!crtc->enabled) continue; w = crtc->desiredX + crtc->desiredMode.HDisplay; if (w > width) width = w; h = crtc->desiredY + crtc->desiredMode.VDisplay; if (h > height) height = h; } /* Prefer the native panel size if any */ if (!width || !height) { for (i = 0; i < sna->mode.num_real_output; i++) { xf86OutputPtr output = config->output[i]; struct sna_output *sna_output = to_sna_output(output); if (!sna_output->is_panel) continue; DBG(("%s: querying panel '%s' for preferred unattached size\n", __FUNCTION__, output->name)); if (sna_output_detect(output) != XF86OutputStatusConnected) continue; if (sna_output->num_modes == 0) continue; width = sna_output->modes[0].hdisplay; height= sna_output->modes[0].vdisplay; DBG(("%s: panel '%s' is %dx%d\n", __FUNCTION__, output->name, width, height)); break; } } if (!width || !height) { width = 1024; height = 768; } scrn->display->frameX0 = 0; scrn->display->frameY0 = 0; scrn->display->virtualX = width; scrn->display->virtualY = height; scrn->virtualX = width; scrn->virtualY = height; xf86SetScrnInfoModes(sna->scrn); DBG(("%s: SetScrnInfoModes = %p\n", __FUNCTION__, scrn->modes)); return scrn->modes != NULL; } static void sanitize_outputs(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); int i; for (i = 0; i < config->num_output; i++) config->output[i]->crtc = NULL; } static bool has_flip(struct sna *sna) { drm_i915_getparam_t gp; int v; if (sna->flags & SNA_NO_FLIP) return false; v = 0; VG_CLEAR(gp); gp.param = I915_PARAM_HAS_PAGEFLIPPING; gp.value = &v; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_GETPARAM, &gp)) return false; VG(VALGRIND_MAKE_MEM_DEFINED(&v, sizeof(v))); return v > 0; } static bool has_flip__async(struct sna *sna) { #define DRM_CAP_ASYNC_PAGE_FLIP 0x7 struct local_get_cap { uint64_t name; uint64_t value; } cap = { DRM_CAP_ASYNC_PAGE_FLIP }; if (sna->flags & SNA_NO_FLIP) return false; if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_GET_CAP, &cap) == 0) return cap.value > 0; return false; } static void probe_capabilities(struct sna *sna) { sna->flags &= ~(SNA_HAS_FLIP | SNA_HAS_ASYNC_FLIP); if (has_flip(sna)) sna->flags |= SNA_HAS_FLIP; if (has_flip__async(sna)) sna->flags |= SNA_HAS_ASYNC_FLIP; DBG(("%s: page flips? %s, async? %s\n", __FUNCTION__, sna->flags & SNA_HAS_FLIP ? "enabled" : "disabled", sna->flags & SNA_HAS_ASYNC_FLIP ? "enabled" : "disabled")); } void sna_crtc_config_notify(ScreenPtr screen) { struct sna *sna = to_sna_from_screen(screen); DBG(("%s(dirty?=%d)\n", __FUNCTION__, sna->mode.dirty)); if (!sna->mode.dirty) return; if (disable_unused_crtc(sna)) { /* This will have recursed, so simply bail at this point */ assert(sna->mode.dirty == false); #ifdef RANDR_12_INTERFACE xf86RandR12TellChanged(screen); #endif return; } update_flush_interval(sna); sna_cursors_reload(sna); probe_capabilities(sna); sna_present_update(sna); sna->mode.dirty = false; } #if HAS_PIXMAP_SHARING #define sna_setup_provider(scrn) xf86ProviderSetup(scrn, NULL, "Intel") #else #define sna_setup_provider(scrn) #endif bool sna_mode_pre_init(ScrnInfoPtr scrn, struct sna *sna) { drmModeResPtr res; int num_fake = 0; int i; if (sna->flags & SNA_IS_HOSTED) { sna_setup_provider(scrn); return true; } probe_capabilities(sna); if (!xf86GetOptValInteger(sna->Options, OPTION_VIRTUAL, &num_fake)) num_fake = 1; res = drmModeGetResources(sna->kgem.fd); if (res && (res->count_crtcs == 0 || res->count_encoders == 0 || res->count_connectors == 0)) { drmModeFreeResources(res); res = NULL; } if (res) { xf86CrtcConfigPtr xf86_config; assert(res->count_crtcs); assert(res->count_connectors); xf86CrtcConfigInit(scrn, &sna_mode_funcs); xf86_config = XF86_CRTC_CONFIG_PTR(scrn); xf86_config->xf86_crtc_notify = sna_crtc_config_notify; for (i = 0; i < res->count_crtcs; i++) if (!sna_crtc_add(scrn, res->crtcs[i])) return false; sna->mode.num_real_crtc = xf86_config->num_crtc; sna->mode.num_real_encoder = res->count_encoders; sna->mode.encoders = res->encoders; res->encoders = NULL; for (i = 0; i < res->count_connectors; i++) if (sna_output_add(sna, res->connectors[i], 0) < 0) return false; sna->mode.num_real_output = xf86_config->num_output; sna->mode.max_crtc_width = res->max_width; sna->mode.max_crtc_height = res->max_height; RegionEmpty(&sna->mode.shadow_region); RegionEmpty(&sna->mode.shadow_cancel); list_init(&sna->mode.shadow_crtc); drmModeFreeResources(res); sna_cursor_pre_init(sna); sna_backlight_pre_init(sna); set_size_range(sna); } else { if (num_fake == 0) num_fake = 1; } if (!sna_mode_fake_init(sna, num_fake)) return false; if (!sna_probe_initial_configuration(sna)) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn); sanitize_outputs(sna); if (config->num_crtc && config->num_output) { if (!xf86ReturnOptValBool(config->output[0]->options, OPTION_PRIMARY, FALSE)) sort_config_outputs(sna); xf86InitialConfiguration(scrn, TRUE); } } sort_config_outputs(sna); sna_setup_provider(scrn); return scrn->modes != NULL; } bool sna_mode_wants_tear_free(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); int i; for (i = 0; i < sna->mode.num_real_output; i++) { struct sna_output *output = to_sna_output(config->output[i]); int id = find_property(sna, output, "Panel Self-Refresh"); if (id !=-1 && output->prop_values[id] != -1) { DBG(("%s: Panel Self-Refresh detected on %s\n", __FUNCTION__, config->output[i]->name)); return true; } } return false; } void sna_mode_set_primary(struct sna *sna) { #ifdef RANDR_12_INTERFACE xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); rrScrPrivPtr rr = rrGetScrPriv(xf86ScrnToScreen(sna->scrn)); int i; if (rr == NULL || rr->primaryOutput) return; for (i = 0; i < sna->mode.num_real_output; i++) { xf86OutputPtr output = config->output[i]; if (!xf86ReturnOptValBool(output->options, OPTION_PRIMARY, FALSE)) continue; DBG(("%s: setting PrimaryOutput %s\n", __FUNCTION__, output->name)); rr->primaryOutput = output->randr_output; RROutputChanged(rr->primaryOutput, 0); rr->layoutChanged = TRUE; break; } #endif } bool sna_mode_disable(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); int i; if (sna->flags & SNA_IS_HOSTED) return false; if (!sna->scrn->vtSema) return false; /* XXX we will cause previously hidden cursors to be reshown, but * this should be a rare fixup case for severe fragmentation. */ sna_hide_cursors(sna->scrn); for (i = 0; i < sna->mode.num_real_crtc; i++) sna_crtc_disable(config->crtc[i]); assert(sna->mode.front_active == 0); sna_mode_wakeup(sna); kgem_clean_scanout_cache(&sna->kgem); return true; } void sna_mode_enable(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); int i; DBG(("%s\n", __FUNCTION__)); if (sna->flags & SNA_IS_HOSTED) return; if (!sna->scrn->vtSema) return; for (i = 0; i < sna->mode.num_real_crtc; i++) { xf86CrtcPtr crtc = config->crtc[i]; DBG(("%s: crtc[%d].enabled?=%d\n", __FUNCTION__, i, crtc->enabled)); assert(to_sna_crtc(crtc) != NULL); if (!crtc->enabled) continue; if (crtc->mode.Clock == 0) continue; __sna_crtc_set_mode(crtc); } update_flush_interval(sna); sna_show_cursors(sna->scrn); sna->mode.dirty = false; } void sna_mode_close(struct sna *sna) { sna_mode_wakeup(sna); if (sna->flags & SNA_IS_HOSTED) return; sna_mode_reset(sna); sna_cursor_close(sna); sna_cursors_fini(sna); sna_backlight_close(sna); sna->mode.dirty = false; } void sna_mode_fini(struct sna *sna) { free(sna->mode.encoders); } static bool sna_box_intersect(BoxPtr r, const BoxRec *a, const BoxRec *b) { r->x1 = a->x1 > b->x1 ? a->x1 : b->x1; r->x2 = a->x2 < b->x2 ? a->x2 : b->x2; if (r->x1 >= r->x2) return false; r->y1 = a->y1 > b->y1 ? a->y1 : b->y1; r->y2 = a->y2 < b->y2 ? a->y2 : b->y2; DBG(("%s: (%d, %d), (%d, %d) intersect (%d, %d), (%d, %d) = (%d, %d), (%d, %d)\n", __FUNCTION__, a->x1, a->y1, a->x2, a->y2, b->x1, b->y1, b->x2, b->y2, r->x1, r->y1, r->x2, r->y2)); if (r->y1 >= r->y2) return false; return true; } static int sna_box_area(const BoxRec *box) { return (int)(box->x2 - box->x1) * (int)(box->y2 - box->y1); } /* * Return the crtc covering 'box'. If two crtcs cover a portion of * 'box', then prefer 'desired'. If 'desired' is NULL, then prefer the crtc * with greater coverage */ xf86CrtcPtr sna_covering_crtc(struct sna *sna, const BoxRec *box, xf86CrtcPtr desired) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); xf86CrtcPtr best_crtc; int best_coverage, c; if (sna->flags & SNA_IS_HOSTED) return NULL; /* If we do not own the VT, we do not own the CRTC either */ if (!sna->scrn->vtSema) return NULL; DBG(("%s for box=(%d, %d), (%d, %d)\n", __FUNCTION__, box->x1, box->y1, box->x2, box->y2)); if (desired == NULL) { rrScrPrivPtr rr = rrGetScrPriv(xf86ScrnToScreen(sna->scrn)); if (rr && rr->primaryOutput) { xf86OutputPtr output = rr->primaryOutput->devPrivate; DBG(("%s: have PrimaryOutput? %d marking as desired\n", __FUNCTION__, output->crtc != NULL)); desired = output->crtc; } } if (desired && to_sna_crtc(desired) && to_sna_crtc(desired)->bo) { BoxRec cover_box; if (sna_box_intersect(&cover_box, &desired->bounds, box)) { DBG(("%s: box overlaps desired crtc: (%d, %d), (%d, %d)\n", __FUNCTION__, cover_box.x1, cover_box.y1, cover_box.x2, cover_box.y2)); return desired; } } best_crtc = NULL; best_coverage = 0; for (c = 0; c < sna->mode.num_real_crtc; c++) { xf86CrtcPtr crtc = config->crtc[c]; BoxRec cover_box; int coverage; assert(to_sna_crtc(crtc)); /* If the CRTC is off, treat it as not covering */ if (to_sna_crtc(crtc)->bo == NULL) { DBG(("%s: crtc %d off, skipping\n", __FUNCTION__, c)); continue; } DBG(("%s: crtc %d: (%d, %d), (%d, %d)\n", __FUNCTION__, c, crtc->bounds.x1, crtc->bounds.y1, crtc->bounds.x2, crtc->bounds.y2)); if (*(const uint64_t *)box == *(uint64_t *)&crtc->bounds) { DBG(("%s: box exactly matches crtc [%d]\n", __FUNCTION__, c)); return crtc; } if (!sna_box_intersect(&cover_box, &crtc->bounds, box)) continue; DBG(("%s: box instersects (%d, %d), (%d, %d) of crtc %d\n", __FUNCTION__, cover_box.x1, cover_box.y1, cover_box.x2, cover_box.y2, c)); coverage = sna_box_area(&cover_box); DBG(("%s: box covers %d of crtc %d\n", __FUNCTION__, coverage, c)); if (coverage > best_coverage) { best_crtc = crtc; best_coverage = coverage; } } DBG(("%s: best crtc = %p, coverage = %d\n", __FUNCTION__, best_crtc, best_coverage)); return best_crtc; } #define MI_LOAD_REGISTER_IMM (0x22<<23) static bool sna_emit_wait_for_scanline_hsw(struct sna *sna, xf86CrtcPtr crtc, int pipe, int y1, int y2, bool full_height) { uint32_t event; uint32_t *b; if (!sna->kgem.has_secure_batches) return false; b = kgem_get_batch(&sna->kgem); sna->kgem.nbatch += 17; switch (pipe) { default: assert(0); case 0: event = 1 << 0; break; case 1: event = 1 << 8; break; case 2: event = 1 << 14; break; } b[0] = MI_LOAD_REGISTER_IMM | 1; b[1] = 0x44050; /* DERRMR */ b[2] = ~event; b[3] = MI_LOAD_REGISTER_IMM | 1; b[4] = 0xa188; /* FORCEWAKE_MT */ b[5] = 2 << 16 | 2; /* The documentation says that the LOAD_SCAN_LINES command * always comes in pairs. Don't ask me why. */ switch (pipe) { default: assert(0); case 0: event = 0 << 19; break; case 1: event = 1 << 19; break; case 2: event = 4 << 19; break; } b[8] = b[6] = MI_LOAD_SCAN_LINES_INCL | event; b[9] = b[7] = (y1 << 16) | (y2-1); switch (pipe) { default: assert(0); case 0: event = 1 << 0; break; case 1: event = 1 << 8; break; case 2: event = 1 << 14; break; } b[10] = MI_WAIT_FOR_EVENT | event; b[11] = MI_LOAD_REGISTER_IMM | 1; b[12] = 0xa188; /* FORCEWAKE_MT */ b[13] = 2 << 16; b[14] = MI_LOAD_REGISTER_IMM | 1; b[15] = 0x44050; /* DERRMR */ b[16] = ~0; sna->kgem.batch_flags |= I915_EXEC_SECURE; return true; } static bool sna_emit_wait_for_scanline_ivb(struct sna *sna, xf86CrtcPtr crtc, int pipe, int y1, int y2, bool full_height) { uint32_t event, *b; if (!sna->kgem.has_secure_batches) return false; assert(y1 >= 0); assert(y2 > y1); assert(sna->kgem.mode); /* Always program one less than the desired value */ if (--y1 < 0) y1 = crtc->bounds.y2; y2--; switch (pipe) { default: assert(0); case 0: event = 1 << (full_height ? 3 : 0); break; case 1: event = 1 << (full_height ? 11 : 8); break; case 2: event = 1 << (full_height ? 21 : 14); break; } b = kgem_get_batch(&sna->kgem); /* Both the LRI and WAIT_FOR_EVENT must be in the same cacheline */ if (((sna->kgem.nbatch + 6) >> 4) != (sna->kgem.nbatch + 10) >> 4) { int dw = sna->kgem.nbatch + 6; dw = ALIGN(dw, 16) - dw; while (dw--) *b++ = MI_NOOP; } b[0] = MI_LOAD_REGISTER_IMM | 1; b[1] = 0x44050; /* DERRMR */ b[2] = ~event; b[3] = MI_LOAD_REGISTER_IMM | 1; b[4] = 0xa188; /* FORCEWAKE_MT */ b[5] = 2 << 16 | 2; b[6] = MI_LOAD_REGISTER_IMM | 1; b[7] = 0x70068 + 0x1000 * pipe; b[8] = (1 << 31) | (1 << 30) | (y1 << 16) | y2; b[9] = MI_WAIT_FOR_EVENT | event; b[10] = MI_LOAD_REGISTER_IMM | 1; b[11] = 0xa188; /* FORCEWAKE_MT */ b[12] = 2 << 16; b[13] = MI_LOAD_REGISTER_IMM | 1; b[14] = 0x44050; /* DERRMR */ b[15] = ~0; sna->kgem.nbatch = b - sna->kgem.batch + 16; sna->kgem.batch_flags |= I915_EXEC_SECURE; return true; } static bool sna_emit_wait_for_scanline_gen6(struct sna *sna, xf86CrtcPtr crtc, int pipe, int y1, int y2, bool full_height) { uint32_t *b; uint32_t event; if (!sna->kgem.has_secure_batches) return false; assert(y1 >= 0); assert(y2 > y1); assert(sna->kgem.mode == KGEM_RENDER); /* Always program one less than the desired value */ if (--y1 < 0) y1 = crtc->bounds.y2; y2--; /* The scanline granularity is 3 bits */ y1 &= ~7; y2 &= ~7; if (y2 == y1) return false; event = 1 << (3*full_height + pipe*8); b = kgem_get_batch(&sna->kgem); sna->kgem.nbatch += 16; b[0] = MI_LOAD_REGISTER_IMM | 1; b[1] = 0x44050; /* DERRMR */ b[2] = ~event; b[3] = MI_LOAD_REGISTER_IMM | 1; b[4] = 0x4f100; /* magic */ b[5] = (1 << 31) | (1 << 30) | pipe << 29 | (y1 << 16) | y2; b[6] = MI_LOAD_REGISTER_IMM | 1; b[7] = 0x2050; /* PSMI_CTL(rcs) */ b[8] = 1 << 16 | 1; b[9] = MI_WAIT_FOR_EVENT | event; b[10] = MI_LOAD_REGISTER_IMM | 1; b[11] = 0x2050; /* PSMI_CTL(rcs) */ b[12] = 1 << 16; b[13] = MI_LOAD_REGISTER_IMM | 1; b[14] = 0x44050; /* DERRMR */ b[15] = ~0; sna->kgem.batch_flags |= I915_EXEC_SECURE; return true; } static bool sna_emit_wait_for_scanline_gen4(struct sna *sna, xf86CrtcPtr crtc, int pipe, int y1, int y2, bool full_height) { uint32_t event; uint32_t *b; if (pipe == 0) { if (full_height) event = MI_WAIT_FOR_PIPEA_SVBLANK; else event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW; } else { if (full_height) event = MI_WAIT_FOR_PIPEB_SVBLANK; else event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW; } b = kgem_get_batch(&sna->kgem); sna->kgem.nbatch += 5; /* The documentation says that the LOAD_SCAN_LINES command * always comes in pairs. Don't ask me why. */ b[2] = b[0] = MI_LOAD_SCAN_LINES_INCL | pipe << 20; b[3] = b[1] = (y1 << 16) | (y2-1); b[4] = MI_WAIT_FOR_EVENT | event; return true; } static bool sna_emit_wait_for_scanline_gen2(struct sna *sna, xf86CrtcPtr crtc, int pipe, int y1, int y2, bool full_height) { uint32_t *b; /* * Pre-965 doesn't have SVBLANK, so we need a bit * of extra time for the blitter to start up and * do its job for a full height blit */ if (full_height) y2 -= 2; b = kgem_get_batch(&sna->kgem); sna->kgem.nbatch += 5; /* The documentation says that the LOAD_SCAN_LINES command * always comes in pairs. Don't ask me why. */ b[2] = b[0] = MI_LOAD_SCAN_LINES_INCL | pipe << 20; b[3] = b[1] = (y1 << 16) | (y2-1); b[4] = MI_WAIT_FOR_EVENT | 1 << (1 + 4*pipe); return true; } bool sna_wait_for_scanline(struct sna *sna, PixmapPtr pixmap, xf86CrtcPtr crtc, const BoxRec *clip) { bool full_height; int y1, y2, pipe; bool ret; assert(crtc != NULL); assert(to_sna_crtc(crtc) != NULL); assert(to_sna_crtc(crtc)->bo != NULL); assert(pixmap == sna->front); if (sna->flags & SNA_NO_VSYNC) return false; /* * Make sure we don't wait for a scanline that will * never occur */ y1 = clip->y1 - crtc->bounds.y1; if (y1 < 0) y1 = 0; y2 = clip->y2 - crtc->bounds.y1; if (y2 > crtc->bounds.y2 - crtc->bounds.y1) y2 = crtc->bounds.y2 - crtc->bounds.y1; DBG(("%s: clipped range = %d, %d\n", __FUNCTION__, y1, y2)); if (y2 <= y1 + 4) return false; full_height = y1 == 0 && y2 == crtc->bounds.y2 - crtc->bounds.y1; if (crtc->mode.Flags & V_INTERLACE) { /* DSL count field lines */ y1 /= 2; y2 /= 2; } pipe = sna_crtc_to_pipe(crtc); DBG(("%s: pipe=%d, y1=%d, y2=%d, full_height?=%d\n", __FUNCTION__, pipe, y1, y2, full_height)); if (sna->kgem.gen >= 0110) ret = false; else if (sna->kgem.gen == 0101) ret = false; /* chv, vsync method unknown */ else if (sna->kgem.gen >= 075) ret = sna_emit_wait_for_scanline_hsw(sna, crtc, pipe, y1, y2, full_height); else if (sna->kgem.gen == 071) ret = false; /* vlv, vsync method unknown */ else if (sna->kgem.gen >= 070) ret = sna_emit_wait_for_scanline_ivb(sna, crtc, pipe, y1, y2, full_height); else if (sna->kgem.gen >= 060) ret =sna_emit_wait_for_scanline_gen6(sna, crtc, pipe, y1, y2, full_height); else if (sna->kgem.gen >= 040) ret = sna_emit_wait_for_scanline_gen4(sna, crtc, pipe, y1, y2, full_height); else ret = sna_emit_wait_for_scanline_gen2(sna, crtc, pipe, y1, y2, full_height); return ret; } void sna_mode_check(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); int i; if (sna->flags & SNA_IS_HOSTED) return; DBG(("%s\n", __FUNCTION__)); /* Validate CRTC attachments and force consistency upon the kernel */ for (i = 0; i < sna->mode.num_real_crtc; i++) { xf86CrtcPtr crtc = config->crtc[i]; struct sna_crtc *sna_crtc = to_sna_crtc(crtc); struct drm_mode_crtc mode; uint32_t expected[2]; assert(sna_crtc); #if XF86_CRTC_VERSION >= 3 assert(sna_crtc->bo == NULL || crtc->active); #endif expected[0] = sna_crtc->bo ? fb_id(sna_crtc->bo) : 0; expected[1] = sna_crtc->flip_bo ? fb_id(sna_crtc->flip_bo) : -1; VG_CLEAR(mode); mode.crtc_id = sna_crtc->id; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_GETCRTC, &mode)) continue; DBG(("%s: crtc=%d, valid?=%d, fb attached?=%d, expected=(%d or %d)\n", __FUNCTION__, mode.crtc_id, mode.mode_valid, mode.fb_id, expected[0], expected[1])); if (mode.fb_id != expected[0] && mode.fb_id != expected[1]) { xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, "%s: invalid state found on pipe %d, disabling CRTC:%d\n", __FUNCTION__, sna_crtc->pipe, sna_crtc->id); sna_crtc_disable(crtc); } } for (i = 0; i < config->num_output; i++) { xf86OutputPtr output = config->output[i]; struct sna_output *sna_output; if (output->crtc) continue; sna_output = to_sna_output(output); if (sna_output == NULL) continue; sna_output->dpms_mode = DPMSModeOff; } update_flush_interval(sna); } static bool sna_crtc_hide_planes(struct sna *sna, struct sna_crtc *crtc) { #define LOCAL_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct local_mode_set_plane) struct local_mode_set_plane { uint32_t plane_id; uint32_t crtc_id; uint32_t fb_id; /* fb object contains surface format type */ uint32_t flags; /* Signed dest location allows it to be partially off screen */ int32_t crtc_x, crtc_y; uint32_t crtc_w, crtc_h; /* Source values are 16.16 fixed point */ uint32_t src_x, src_y; uint32_t src_h, src_w; } s; if (crtc->primary.id == 0) return false; memset(&s, 0, sizeof(s)); s.plane_id = crtc->primary.id; if (drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_SETPLANE, &s)) return false; s.plane_id = crtc->sprite.id; (void)drmIoctl(sna->kgem.fd, LOCAL_IOCTL_MODE_SETPLANE, &s); __sna_crtc_disable(sna, crtc); return true; } void sna_mode_reset(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); int i; if (sna->flags & SNA_IS_HOSTED) return; DBG(("%s\n", __FUNCTION__)); sna_hide_cursors(sna->scrn); for (i = 0; i < sna->mode.num_real_crtc; i++) if (!sna_crtc_hide_planes(sna, to_sna_crtc(config->crtc[i]))) sna_crtc_disable(config->crtc[i]); assert(sna->mode.front_active == 0); for (i = 0; i < sna->mode.num_real_crtc; i++) { struct sna_crtc *sna_crtc = to_sna_crtc(config->crtc[i]); assert(sna_crtc != NULL); sna_crtc->dpms_mode = -1; /* Force the rotation property to be reset on next use */ rotation_reset(&sna_crtc->primary); rotation_reset(&sna_crtc->sprite); } /* VT switching, likely to be fbcon so make the backlight usable */ for (i = 0; i < sna->mode.num_real_output; i++) { struct sna_output *sna_output = to_sna_output(config->output[i]); assert(sna_output != NULL); if (sna_output->dpms_mode != DPMSModeOff) continue; if (!sna_output->backlight.iface) continue; sna_output_backlight_set(sna_output, sna_output->backlight_active_level); } /* drain the event queue */ sna_mode_wakeup(sna); } static void transformed_box(BoxRec *box, xf86CrtcPtr crtc) { box->x1 -= crtc->filter_width >> 1; box->x2 += crtc->filter_width >> 1; box->y1 -= crtc->filter_height >> 1; box->y2 += crtc->filter_height >> 1; pixman_f_transform_bounds(&crtc->f_framebuffer_to_crtc, box); if (box->x1 < 0) box->x1 = 0; if (box->y1 < 0) box->y1 = 0; if (box->x2 > crtc->mode.HDisplay) box->x2 = crtc->mode.HDisplay; if (box->y2 > crtc->mode.VDisplay) box->y2 = crtc->mode.VDisplay; } inline static DrawablePtr crtc_source(xf86CrtcPtr crtc, int16_t *sx, int16_t *sy) { struct sna_crtc *sna_crtc = to_sna_crtc(crtc); if (sna_crtc->slave_pixmap) { DBG(("%s: using slave pixmap=%ld, offset (%d, %d)\n", __FUNCTION__, sna_crtc->slave_pixmap->drawable.serialNumber, -crtc->x, -crtc->y)); *sx = -crtc->x; *sy = -crtc->y; return &sna_crtc->slave_pixmap->drawable; } else { DBG(("%s: using Screen pixmap=%ld\n", __FUNCTION__, to_sna(crtc->scrn)->front->drawable.serialNumber)); *sx = *sy = 0; return &to_sna(crtc->scrn)->front->drawable; } } static void sna_crtc_redisplay__fallback(xf86CrtcPtr crtc, RegionPtr region, struct kgem_bo *bo) { int16_t sx, sy; struct sna *sna = to_sna(crtc->scrn); ScreenPtr screen = sna->scrn->pScreen; DrawablePtr draw = crtc_source(crtc, &sx, &sy); PictFormatPtr format; PicturePtr src, dst; PixmapPtr pixmap; int depth, error; void *ptr; DBG(("%s: compositing transformed damage boxes, target handle=%d\n", __FUNCTION__, bo->handle)); error = sna_render_format_for_depth(draw->depth); depth = PIXMAN_FORMAT_DEPTH(error); format = PictureMatchFormat(screen, depth, error); if (format == NULL) { DBG(("%s: can't find format for depth=%d [%08x]\n", __FUNCTION__, depth, error)); return; } DBG(("%s: dst format=%08x, depth=%d, bpp=%d, pitch=%d, size=%dx%d\n", __FUNCTION__, format->format, depth, draw->bitsPerPixel, bo->pitch, crtc->mode.HDisplay, crtc->mode.VDisplay)); ptr = kgem_bo_map__gtt(&sna->kgem, bo); if (ptr == NULL) return; pixmap = sna_pixmap_create_unattached(screen, 0, 0, depth); if (pixmap == NullPixmap) return; if (!screen->ModifyPixmapHeader(pixmap, crtc->mode.HDisplay, crtc->mode.VDisplay, depth, draw->bitsPerPixel, bo->pitch, ptr)) goto free_pixmap; src = CreatePicture(None, draw, format, 0, NULL, serverClient, &error); if (!src) goto free_pixmap; error = SetPictureTransform(src, &crtc->crtc_to_framebuffer); if (error) goto free_src; if (crtc->filter && crtc->transform_in_use) SetPicturePictFilter(src, crtc->filter, crtc->params, crtc->nparams); dst = CreatePicture(None, &pixmap->drawable, format, 0, NULL, serverClient, &error); if (!dst) goto free_src; kgem_bo_sync__gtt(&sna->kgem, bo); if (sigtrap_get() == 0) { /* paranoia */ const BoxRec *b = region_rects(region); int n = region_num_rects(region); do { BoxRec box; box = *b++; transformed_box(&box, crtc); DBG(("%s: (%d, %d)x(%d, %d) -> (%d, %d), (%d, %d)\n", __FUNCTION__, b[-1].x1, b[-1].y1, b[-1].x2-b[-1].x1, b[-1].y2-b[-1].y1, box.x1, box.y1, box.x2, box.y2)); fbComposite(PictOpSrc, src, NULL, dst, box.x1 + sx, box.y1 + sy, 0, 0, box.x1, box.y1, box.x2 - box.x1, box.y2 - box.y1); } while (--n); sigtrap_put(); } FreePicture(dst, None); free_src: FreePicture(src, None); free_pixmap: screen->DestroyPixmap(pixmap); } static void sna_crtc_redisplay__composite(xf86CrtcPtr crtc, RegionPtr region, struct kgem_bo *bo) { int16_t sx, sy; struct sna *sna = to_sna(crtc->scrn); ScreenPtr screen = crtc->scrn->pScreen; DrawablePtr draw = crtc_source(crtc, &sx, &sy); struct sna_composite_op tmp; PictFormatPtr format; PicturePtr src, dst; PixmapPtr pixmap; const BoxRec *b; int n, depth, error; DBG(("%s: compositing transformed damage boxes\n", __FUNCTION__)); error = sna_render_format_for_depth(draw->depth); depth = PIXMAN_FORMAT_DEPTH(error); format = PictureMatchFormat(screen, depth, error); if (format == NULL) { DBG(("%s: can't find format for depth=%d [%08x]\n", __FUNCTION__, depth, error)); return; } DBG(("%s: dst format=%08x, depth=%d, bpp=%d, pitch=%d, size=%dx%d\n", __FUNCTION__, format->format, depth, draw->bitsPerPixel, bo->pitch, crtc->mode.HDisplay, crtc->mode.VDisplay)); pixmap = sna_pixmap_create_unattached(screen, 0, 0, depth); if (pixmap == NullPixmap) return; if (!screen->ModifyPixmapHeader(pixmap, crtc->mode.HDisplay, crtc->mode.VDisplay, depth, draw->bitsPerPixel, bo->pitch, NULL)) goto free_pixmap; if (!sna_pixmap_attach_to_bo(pixmap, kgem_bo_reference(bo))) { kgem_bo_destroy(&sna->kgem, bo); goto free_pixmap; } src = CreatePicture(None, draw, format, 0, NULL, serverClient, &error); if (!src) goto free_pixmap; error = SetPictureTransform(src, &crtc->crtc_to_framebuffer); if (error) goto free_src; if (crtc->filter && crtc->transform_in_use) SetPicturePictFilter(src, crtc->filter, crtc->params, crtc->nparams); dst = CreatePicture(None, &pixmap->drawable, format, 0, NULL, serverClient, &error); if (!dst) goto free_src; ValidatePicture(src); ValidatePicture(dst); if (!sna->render.composite(sna, PictOpSrc, src, NULL, dst, sx, sy, 0, 0, 0, 0, crtc->mode.HDisplay, crtc->mode.VDisplay, COMPOSITE_PARTIAL, memset(&tmp, 0, sizeof(tmp)))) { DBG(("%s: unsupported operation!\n", __FUNCTION__)); sna_crtc_redisplay__fallback(crtc, region, bo); goto free_dst; } n = region_num_rects(region); b = region_rects(region); do { BoxRec box; box = *b++; transformed_box(&box, crtc); DBG(("%s: (%d, %d)x(%d, %d) -> (%d, %d), (%d, %d)\n", __FUNCTION__, b[-1].x1, b[-1].y1, b[-1].x2-b[-1].x1, b[-1].y2-b[-1].y1, box.x1, box.y1, box.x2, box.y2)); tmp.box(sna, &tmp, &box); } while (--n); tmp.done(sna, &tmp); free_dst: FreePicture(dst, None); free_src: FreePicture(src, None); free_pixmap: screen->DestroyPixmap(pixmap); } static void sna_crtc_redisplay(xf86CrtcPtr crtc, RegionPtr region, struct kgem_bo *bo) { int16_t tx, ty, sx, sy; struct sna *sna = to_sna(crtc->scrn); DrawablePtr draw = crtc_source(crtc, &sx, &sy); struct sna_pixmap *priv = sna_pixmap((PixmapPtr)draw); DBG(("%s: crtc %d [pipe=%d], damage (%d, %d), (%d, %d) x %d\n", __FUNCTION__, to_sna_crtc(crtc)->id, to_sna_crtc(crtc)->pipe, region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, region_num_rects(region))); assert(!wedged(sna)); if (priv->clear) { RegionRec whole; DBG(("%s: clear damage boxes\n", __FUNCTION__)); if (sna_transform_is_integer_translation(&crtc->crtc_to_framebuffer, &tx, &ty)) { RegionTranslate(region, -tx, -ty); } else { whole.extents = region->extents; whole.data = NULL; transformed_box(&whole.extents, crtc); region = &whole; } if (sna_blt_fill_boxes(sna, GXcopy, bo, draw->bitsPerPixel, priv->clear_color, region_rects(region), region_num_rects(region))) return; } if (crtc->filter == NULL && priv->gpu_bo && priv->cpu_damage == NULL && sna_transform_is_integer_translation(&crtc->crtc_to_framebuffer, &tx, &ty)) { DrawableRec tmp; DBG(("%s: copy damage boxes\n", __FUNCTION__)); tmp.width = crtc->mode.HDisplay; tmp.height = crtc->mode.VDisplay; tmp.depth = sna->front->drawable.depth; tmp.bitsPerPixel = sna->front->drawable.bitsPerPixel; if (sna->render.copy_boxes(sna, GXcopy, draw, priv->gpu_bo, sx, sy, &tmp, bo, -tx, -ty, region_rects(region), region_num_rects(region), 0)) return; } if (can_render(sna)) sna_crtc_redisplay__composite(crtc, region, bo); else sna_crtc_redisplay__fallback(crtc, region, bo); } static void shadow_flip_handler(struct drm_event_vblank *e, void *data) { sna_mode_redisplay(data); } void sna_shadow_set_crtc(struct sna *sna, xf86CrtcPtr crtc, struct kgem_bo *bo) { struct sna_crtc *sna_crtc = to_sna_crtc(crtc); struct sna_pixmap *priv; DBG(("%s: setting shadow override for CRTC:%d to handle=%d\n", __FUNCTION__, sna_crtc->id, bo->handle)); assert(sna->flags & SNA_TEAR_FREE); assert(sna_crtc); assert(!sna_crtc->transform); if (sna_crtc->client_bo != bo) { if (sna_crtc->client_bo) kgem_bo_destroy(&sna->kgem, sna_crtc->client_bo); sna_crtc->client_bo = kgem_bo_reference(bo); sna_crtc_damage(crtc); } list_move(&sna_crtc->shadow_link, &sna->mode.shadow_crtc); sna->mode.shadow_dirty = true; priv = sna_pixmap(sna->front); assert(priv->gpu_bo); priv->move_to_gpu = wait_for_shadow; priv->move_to_gpu_data = sna; } void sna_shadow_steal_crtcs(struct sna *sna, struct list *list) { list_init(list); while (!list_is_empty(&sna->mode.shadow_crtc)) { RegionRec sub, *damage; struct sna_crtc *crtc = list_first_entry(&sna->mode.shadow_crtc, struct sna_crtc, shadow_link); damage = DamageRegion(sna->mode.shadow_damage); sub.extents = crtc->base->bounds; sub.data = NULL; RegionSubtract(damage, damage, &sub); list_move(&crtc->shadow_link, list); } } void sna_shadow_unsteal_crtcs(struct sna *sna, struct list *list) { while (!list_is_empty(list)) { struct sna_crtc *crtc = list_first_entry(list, struct sna_crtc, shadow_link); assert(crtc->client_bo); sna_shadow_set_crtc(sna, crtc->base, crtc->client_bo); } } void sna_shadow_unset_crtc(struct sna *sna, xf86CrtcPtr crtc) { struct sna_crtc *sna_crtc = to_sna_crtc(crtc); DBG(("%s: clearin shadow override for CRTC:%d\n", __FUNCTION__, sna_crtc->id)); if (sna_crtc->client_bo == NULL) return; kgem_bo_destroy(&sna->kgem, sna_crtc->client_bo); sna_crtc->client_bo = NULL; list_del(&sna_crtc->shadow_link); sna->mode.shadow_dirty = true; sna_crtc_damage(crtc); } void sna_mode_redisplay(struct sna *sna) { xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(sna->scrn); RegionPtr region; int i; if (!sna->mode.shadow_damage) return; DBG(("%s: posting shadow damage? %d (flips pending? %d, mode reconfiguration pending? %d)\n", __FUNCTION__, !RegionNil(DamageRegion(sna->mode.shadow_damage)), sna->mode.flip_active, sna->mode.dirty)); assert((sna->flags & SNA_IS_HOSTED) == 0); assert(sna->mode.shadow_active); if (sna->mode.dirty) return; region = DamageRegion(sna->mode.shadow_damage); if (RegionNil(region)) return; DBG(("%s: damage: %dx(%d, %d), (%d, %d)\n", __FUNCTION__, region_num_rects(region), region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2)); if (sna->mode.flip_active) { DamagePtr damage; damage = sna->mode.shadow_damage; sna->mode.shadow_damage = NULL; while (sna->mode.flip_active && sna_mode_wakeup(sna)) ; sna->mode.shadow_damage = damage; } if (sna->mode.flip_active) return; if (wedged(sna) || !sna_pixmap_move_to_gpu(sna->front, MOVE_READ | MOVE_ASYNC_HINT | __MOVE_SCANOUT)) { DBG(("%s: forcing scanout update using the CPU\n", __FUNCTION__)); if (!sna_pixmap_move_to_cpu(sna->front, MOVE_READ)) return; for (i = 0; i < sna->mode.num_real_crtc; i++) { xf86CrtcPtr crtc = config->crtc[i]; struct sna_crtc *sna_crtc = to_sna_crtc(crtc); RegionRec damage; assert(sna_crtc != NULL); if (!sna_crtc->shadow) continue; assert(crtc->enabled); assert(sna_crtc->transform || sna->flags & SNA_TEAR_FREE); damage.extents = crtc->bounds; damage.data = NULL; RegionIntersect(&damage, &damage, region); if (!box_empty(&damage.extents)) { struct kgem_bo *bo = NULL; DBG(("%s: fallback intersects pipe=%d [(%d, %d), (%d, %d)]\n", __FUNCTION__, sna_crtc->pipe, damage.extents.x1, damage.extents.y1, damage.extents.x2, damage.extents.y2)); if (sna->flags & SNA_TEAR_FREE) { RegionRec new_damage; RegionNull(&new_damage); RegionCopy(&new_damage, &damage); bo = sna_crtc->client_bo; if (bo == NULL) { damage.extents = crtc->bounds; damage.data = NULL; bo = kgem_create_2d(&sna->kgem, crtc->mode.HDisplay, crtc->mode.VDisplay, crtc->scrn->bitsPerPixel, sna_crtc->bo->tiling, CREATE_SCANOUT); } else RegionUnion(&damage, &damage, &sna_crtc->client_damage); DBG(("%s: TearFree fallback, shadow handle=%d, crtc handle=%d\n", __FUNCTION__, bo->handle, sna_crtc->bo->handle)); sna_crtc->client_damage = new_damage; } if (bo == NULL) bo = sna_crtc->bo; sna_crtc_redisplay__fallback(crtc, &damage, bo); if (bo != sna_crtc->bo) { struct drm_mode_crtc_page_flip arg; arg.crtc_id = sna_crtc->id; arg.fb_id = get_fb(sna, bo, crtc->mode.HDisplay, crtc->mode.VDisplay); arg.user_data = (uintptr_t)sna_crtc; arg.flags = DRM_MODE_PAGE_FLIP_EVENT; arg.reserved = 0; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_PAGE_FLIP, &arg)) { if (sna_crtc_flip(sna, sna_crtc, bo, 0, 0)) { assert(sna_crtc->bo->active_scanout); assert(sna_crtc->bo->refcnt >= sna_crtc->bo->active_scanout); sna_crtc->bo->active_scanout--; kgem_bo_destroy(&sna->kgem, sna_crtc->bo); sna_crtc->bo = bo; sna_crtc->bo->active_scanout++; sna_crtc->client_bo = NULL; } else { DBG(("%s: flip [fb=%d] on crtc %d [%d, pipe=%d] failed - %d\n", __FUNCTION__, arg.fb_id, i, sna_crtc->id, sna_crtc->pipe, errno)); xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, "Page flipping failed, disabling TearFree\n"); sna->flags &= ~SNA_TEAR_FREE; damage.extents = crtc->bounds; damage.data = NULL; sna_crtc_redisplay__fallback(crtc, &damage, sna_crtc->bo); kgem_bo_destroy(&sna->kgem, bo); sna_crtc->client_bo = NULL; } } else { sna->mode.flip_active++; assert(sna_crtc->flip_bo == NULL); sna_crtc->flip_handler = shadow_flip_handler; sna_crtc->flip_data = sna; sna_crtc->flip_bo = bo; sna_crtc->flip_bo->active_scanout++; sna_crtc->flip_serial = sna_crtc->mode_serial; sna_crtc->client_bo = kgem_bo_reference(sna_crtc->bo); } } } RegionUninit(&damage); if (sna_crtc->slave_damage) DamageEmpty(sna_crtc->slave_damage); } RegionEmpty(region); return; } { struct sna_pixmap *priv; priv = sna_pixmap(sna->front); assert(priv != NULL); if (priv->move_to_gpu) { if (priv->move_to_gpu == wait_for_shadow && !sna->mode.shadow_dirty) { /* No damage written to new scanout * (backbuffer), ignore redisplay request * and continue with the current intact * scanout (frontbuffer). */ DBG(("%s: shadow idle, skipping update\n", __FUNCTION__)); RegionEmpty(region); return; } (void)priv->move_to_gpu(sna, priv, 0); } assert(priv->move_to_gpu == NULL); } for (i = 0; i < sna->mode.num_real_crtc; i++) { xf86CrtcPtr crtc = config->crtc[i]; struct sna_crtc *sna_crtc = to_sna_crtc(crtc); RegionRec damage; assert(sna_crtc != NULL); DBG(("%s: crtc[%d] transformed? %d\n", __FUNCTION__, i, sna_crtc->transform)); if (!sna_crtc->transform) continue; assert(crtc->enabled); assert(sna_crtc->bo); damage.extents = crtc->bounds; damage.data = NULL; RegionIntersect(&damage, &damage, region); DBG(("%s: crtc[%d] damage? %d[%d]: %dx[(%d, %d), (%d, %d)]\n", __FUNCTION__, i, !box_empty(&damage.extents), RegionNotEmpty(&damage), region_num_rects(&damage), damage.extents.x1, damage.extents.y1, damage.extents.x2, damage.extents.y2)); if (!box_empty(&damage.extents)) { if (sna->flags & SNA_TEAR_FREE) { struct drm_mode_crtc_page_flip arg; struct kgem_bo *bo; RegionUninit(&damage); damage.extents = crtc->bounds; damage.data = NULL; bo = sna_crtc->client_bo; if (bo == NULL) bo = kgem_create_2d(&sna->kgem, crtc->mode.HDisplay, crtc->mode.VDisplay, crtc->scrn->bitsPerPixel, sna_crtc->bo->tiling, CREATE_SCANOUT); if (bo == NULL) goto disable1; sna_crtc_redisplay(crtc, &damage, bo); kgem_bo_submit(&sna->kgem, bo); arg.crtc_id = sna_crtc->id; arg.fb_id = get_fb(sna, bo, crtc->mode.HDisplay, crtc->mode.VDisplay); if (arg.fb_id == 0) goto disable1; arg.user_data = (uintptr_t)sna_crtc; arg.flags = DRM_MODE_PAGE_FLIP_EVENT; arg.reserved = 0; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_PAGE_FLIP, &arg)) { if (sna_crtc_flip(sna, sna_crtc, bo, 0, 0)) { assert(sna_crtc->bo->active_scanout); assert(sna_crtc->bo->refcnt >= sna_crtc->bo->active_scanout); sna_crtc->bo->active_scanout--; kgem_bo_destroy(&sna->kgem, sna_crtc->bo); sna_crtc->bo = kgem_bo_reference(bo); sna_crtc->bo->active_scanout++; sna_crtc->client_bo = kgem_bo_reference(bo); } else { BoxRec box; DrawableRec tmp; DBG(("%s: flip [fb=%d] on crtc %d [%d, pipe=%d] failed - %d\n", __FUNCTION__, arg.fb_id, i, sna_crtc->id, sna_crtc->pipe, errno)); xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, "Page flipping failed, disabling TearFree\n"); sna->flags &= ~SNA_TEAR_FREE; disable1: box.x1 = 0; box.y1 = 0; tmp.width = box.x2 = crtc->mode.HDisplay; tmp.height = box.y2 = crtc->mode.VDisplay; tmp.depth = sna->front->drawable.depth; tmp.bitsPerPixel = sna->front->drawable.bitsPerPixel; if (!sna->render.copy_boxes(sna, GXcopy, &sna->front->drawable, bo, 0, 0, &tmp, sna_crtc->bo, 0, 0, &box, 1, COPY_LAST)) { xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR, "%s: page flipping failed, disabling CRTC:%d (pipe=%d)\n", __FUNCTION__, sna_crtc->id, sna_crtc->pipe); sna_crtc_disable(crtc); } kgem_bo_destroy(&sna->kgem, bo); sna_crtc->client_bo = NULL; } continue; } sna->mode.flip_active++; assert(sna_crtc->flip_bo == NULL); sna_crtc->flip_handler = shadow_flip_handler; sna_crtc->flip_data = sna; sna_crtc->flip_bo = bo; sna_crtc->flip_bo->active_scanout++; sna_crtc->flip_serial = sna_crtc->mode_serial; sna_crtc->flip_pending = true; sna_crtc->client_bo = kgem_bo_reference(sna_crtc->bo); } else { sna_crtc_redisplay(crtc, &damage, sna_crtc->bo); kgem_scanout_flush(&sna->kgem, sna_crtc->bo); } } RegionUninit(&damage); if (sna_crtc->slave_damage) DamageEmpty(sna_crtc->slave_damage); } if (sna->mode.shadow) { struct kgem_bo *new = __sna_pixmap_get_bo(sna->front); struct kgem_bo *old = sna->mode.shadow; struct drm_mode_crtc_page_flip arg; uint32_t fb = 0; DBG(("%s: flipping TearFree outputs, current scanout handle=%d [active?=%d], new handle=%d [active=%d]\n", __FUNCTION__, old->handle, old->active_scanout, new->handle, new->active_scanout)); assert(new != old); assert(new->refcnt); arg.flags = DRM_MODE_PAGE_FLIP_EVENT; arg.reserved = 0; kgem_bo_submit(&sna->kgem, new); for (i = 0; i < sna->mode.num_real_crtc; i++) { struct sna_crtc *crtc = config->crtc[i]->driver_private; struct kgem_bo *flip_bo; int x, y; assert(crtc != NULL); DBG(("%s: crtc %d [%d, pipe=%d] active? %d, transformed? %d\n", __FUNCTION__, i, crtc->id, crtc->pipe, crtc->bo ? crtc->bo->handle : 0, crtc->transform)); if (crtc->bo == NULL || crtc->transform) continue; assert(config->crtc[i]->enabled); assert(crtc->dpms_mode <= DPMSModeOn); assert(crtc->flip_bo == NULL); arg.crtc_id = crtc->id; arg.user_data = (uintptr_t)crtc; if (crtc->client_bo) { DBG(("%s: apply shadow override bo for CRTC:%d on pipe=%d, handle=%d\n", __FUNCTION__, crtc->id, crtc->pipe, crtc->client_bo->handle)); arg.fb_id = get_fb(sna, crtc->client_bo, crtc->base->mode.HDisplay, crtc->base->mode.VDisplay); assert(arg.fb_id != fb); flip_bo = crtc->client_bo; x = y = 0; } else { if (fb == 0) fb = get_fb(sna, new, sna->scrn->virtualX, sna->scrn->virtualY); if (fb == 0) { fixup_shadow: if (sna_pixmap_move_to_gpu(sna->front, MOVE_READ | MOVE_ASYNC_HINT)) { BoxRec box; box.x1 = 0; box.y1 = 0; box.x2 = sna->scrn->virtualX; box.y2 = sna->scrn->virtualY; if (sna->render.copy_boxes(sna, GXcopy, &sna->front->drawable, __sna_pixmap_get_bo(sna->front), 0, 0, &sna->front->drawable, old, 0, 0, &box, 1, COPY_LAST)) { kgem_submit(&sna->kgem); RegionEmpty(region); } } return; } arg.fb_id = fb; flip_bo = new; x = crtc->base->x; y = crtc->base->y; } if (crtc->bo == flip_bo) continue; if (flip_bo->pitch != crtc->bo->pitch || (y << 16 | x) != crtc->offset) { DBG(("%s: changing pitch (new %d =?= old %d) or offset (new %x =?= old %x)\n", __FUNCTION__, flip_bo->pitch, crtc->bo->pitch, y << 16 | x, crtc->offset)); fixup_flip: if (sna_crtc_flip(sna, crtc, flip_bo, x, y)) { assert(flip_bo != crtc->bo); assert(crtc->bo->active_scanout); assert(crtc->bo->refcnt >= crtc->bo->active_scanout); crtc->bo->active_scanout--; kgem_bo_destroy(&sna->kgem, crtc->bo); if (crtc->shadow_bo) { kgem_bo_destroy(&sna->kgem, crtc->shadow_bo); crtc->shadow_bo = NULL; } crtc->bo = kgem_bo_reference(flip_bo); crtc->bo->active_scanout++; } else { xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, "Failed to prepare CRTC for page flipping, disabling TearFree\n"); sna->flags &= ~SNA_TEAR_FREE; if (sna->mode.flip_active == 0) { DBG(("%s: abandoning flip attempt\n", __FUNCTION__)); goto fixup_shadow; } xf86DrvMsg(sna->scrn->scrnIndex, X_ERROR, "%s: page flipping failed, disabling CRTC:%d (pipe=%d)\n", __FUNCTION__, crtc->id, crtc->pipe); sna_crtc_disable(crtc->base); } continue; } if (drmIoctl(sna->kgem.fd, DRM_IOCTL_MODE_PAGE_FLIP, &arg)) { ERR(("%s: flip [fb=%d] on crtc %d [%d, pipe=%d] failed - %d\n", __FUNCTION__, arg.fb_id, i, crtc->id, crtc->pipe, errno)); goto fixup_flip; } sna->mode.flip_active++; assert(crtc->flip_bo == NULL); crtc->flip_handler = shadow_flip_handler; crtc->flip_data = sna; crtc->flip_bo = kgem_bo_reference(flip_bo); crtc->flip_bo->active_scanout++; crtc->flip_serial = crtc->mode_serial; crtc->flip_pending = true; { struct drm_i915_gem_busy busy = { flip_bo->handle }; if (drmIoctl(sna->kgem.fd, DRM_IOCTL_I915_GEM_BUSY, &busy) == 0) { if (busy.busy) { int mode = KGEM_RENDER; if (busy.busy & (0xfffe << 16)) mode = KGEM_BLT; DBG(("%s: marking flip bo as busy [%x -> mode=%d]\n", __FUNCTION__, busy.busy, mode)); kgem_bo_mark_busy(&sna->kgem, flip_bo, mode); } else __kgem_bo_clear_busy(flip_bo); } } } DBG(("%s: flipped %d outputs, shadow active? %d\n", __FUNCTION__, sna->mode.flip_active, sna->mode.shadow ? sna->mode.shadow->handle : 0)); if (sna->mode.flip_active) { assert(old == sna->mode.shadow); assert(old->refcnt >= 1); set_shadow(sna, region); } } else kgem_submit(&sna->kgem); RegionEmpty(region); } int sna_mode_wakeup(struct sna *sna) { char buffer[1024]; int len, i; int ret = 0; again: /* In order to workaround a kernel bug in not honouring O_NONBLOCK, * check that the fd is readable before attempting to read the next * event from drm. */ if (!event_pending(sna->kgem.fd)) return ret; /* The DRM read semantics guarantees that we always get only * complete events. */ len = read(sna->kgem.fd, buffer, sizeof (buffer)); if (len < (int)sizeof(struct drm_event)) return ret; /* Note that we cannot rely on the passed in struct sna matching * the struct sna used for the vblank event (in case it was submitted * by a different ZaphodHead). When processing the event, we must * ensure that we only use the pointer passed along with the event. */ DBG(("%s: len=%d\n", __FUNCTION__, len)); i = 0; while (i < len) { struct drm_event *e = (struct drm_event *)&buffer[i]; switch (e->type) { case DRM_EVENT_VBLANK: if (((uintptr_t)((struct drm_event_vblank *)e)->user_data) & 2) sna_present_vblank_handler((struct drm_event_vblank *)e); else sna_dri2_vblank_handler((struct drm_event_vblank *)e); break; case DRM_EVENT_FLIP_COMPLETE: { struct drm_event_vblank *vbl = (struct drm_event_vblank *)e; struct sna_crtc *crtc = (void *)(uintptr_t)vbl->user_data; /* Beware Zaphod! */ sna = to_sna(crtc->base->scrn); crtc->swap.tv_sec = vbl->tv_sec; crtc->swap.tv_usec = vbl->tv_usec; crtc->swap.msc = msc64(crtc, vbl->sequence); crtc->flip_pending = false; assert(crtc->flip_bo); assert(crtc->flip_bo->active_scanout); assert(crtc->flip_bo->refcnt >= crtc->flip_bo->active_scanout); if (crtc->flip_serial == crtc->mode_serial) { DBG(("%s: removing handle=%d from scanout, installing handle=%d\n", __FUNCTION__, crtc->bo->handle, crtc->flip_bo->handle)); assert(crtc->bo->active_scanout); assert(crtc->bo->refcnt >= crtc->bo->active_scanout); crtc->bo->active_scanout--; kgem_bo_destroy(&sna->kgem, crtc->bo); if (crtc->shadow_bo) { kgem_bo_destroy(&sna->kgem, crtc->shadow_bo); crtc->shadow_bo = NULL; } crtc->bo = crtc->flip_bo; crtc->flip_bo = NULL; } else { crtc->flip_bo->active_scanout--; kgem_bo_destroy(&sna->kgem, crtc->flip_bo); crtc->flip_bo = NULL; } DBG(("%s: flip complete, pending? %d\n", __FUNCTION__, sna->mode.flip_active)); assert(sna->mode.flip_active); if (--sna->mode.flip_active == 0) crtc->flip_handler(vbl, crtc->flip_data); } break; default: break; } i += e->length; ret++; } goto again; } xf86-video-intel-2.99.917/src/sna/kgem_debug.c0000664000175000017500000004247012404514124015540 00000000000000/* * Copyright © 2007-2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include "sna.h" #include "sna_reg.h" #include "kgem_debug.h" struct drm_i915_gem_relocation_entry * kgem_debug_get_reloc_entry(struct kgem *kgem, uint32_t offset) { int i; offset *= sizeof(uint32_t); for (i = 0; i < kgem->nreloc; i++) if (kgem->reloc[i].offset == offset) return kgem->reloc+i; assert(!"valid relocation entry, unknown batch offset"); return NULL; } struct kgem_bo * kgem_debug_get_bo_for_reloc_entry(struct kgem *kgem, struct drm_i915_gem_relocation_entry *reloc) { struct kgem_bo *bo; if (reloc == NULL) return NULL; list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->target_handle == reloc->target_handle && bo->proxy == NULL) break; assert(&bo->request != &kgem->next_request->buffers); return bo; } static int kgem_debug_handle_is_fenced(struct kgem *kgem, uint32_t handle) { int i; if (kgem->has_handle_lut) return kgem->exec[handle].flags & EXEC_OBJECT_NEEDS_FENCE; for (i = 0; i < kgem->nexec; i++) if (kgem->exec[i].handle == handle) return kgem->exec[i].flags & EXEC_OBJECT_NEEDS_FENCE; return 0; } static int kgem_debug_handle_tiling(struct kgem *kgem, uint32_t handle) { struct kgem_bo *bo; list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->target_handle == handle) return bo->tiling; return 0; } void kgem_debug_print(const uint32_t *data, uint32_t offset, unsigned int index, const char *fmt, ...) { va_list va; char buf[240]; int len; len = snprintf(buf, sizeof(buf), "0x%08x: 0x%08x: %s", (offset + index) * 4, data[index], index == 0 ? "" : " "); va_start(va, fmt); vsnprintf(buf + len, sizeof(buf) - len, fmt, va); va_end(va); ErrorF("%s", buf); } static int decode_nop(struct kgem *kgem, uint32_t offset) { uint32_t *data = kgem->batch + offset; kgem_debug_print(data, offset, 0, "UNKNOWN\n"); assert(0); return 1; } static int decode_mi(struct kgem *kgem, uint32_t offset) { static const struct { uint32_t opcode; int len_mask; int min_len; int max_len; const char *name; } opcodes[] = { { 0x08, 0, 1, 1, "MI_ARB_ON_OFF" }, { 0x0a, 0, 1, 1, "MI_BATCH_BUFFER_END" }, { 0x30, 0x3f, 3, 3, "MI_BATCH_BUFFER" }, { 0x31, 0x3f, 2, 2, "MI_BATCH_BUFFER_START" }, { 0x14, 0x3f, 3, 3, "MI_DISPLAY_BUFFER_INFO" }, { 0x04, 0, 1, 1, "MI_FLUSH" }, { 0x22, 0x1f, 3, 3, "MI_LOAD_REGISTER_IMM" }, { 0x13, 0x3f, 2, 2, "MI_LOAD_SCAN_LINES_EXCL" }, { 0x12, 0x3f, 2, 2, "MI_LOAD_SCAN_LINES_INCL" }, { 0x00, 0, 1, 1, "MI_NOOP" }, { 0x11, 0x3f, 2, 2, "MI_OVERLAY_FLIP" }, { 0x07, 0, 1, 1, "MI_REPORT_HEAD" }, { 0x18, 0x3f, 2, 2, "MI_SET_CONTEXT" }, { 0x20, 0x3f, 3, 4, "MI_STORE_DATA_IMM" }, { 0x21, 0x3f, 3, 4, "MI_STORE_DATA_INDEX" }, { 0x24, 0x3f, 3, 3, "MI_STORE_REGISTER_MEM" }, { 0x02, 0, 1, 1, "MI_USER_INTERRUPT" }, { 0x03, 0, 1, 1, "MI_WAIT_FOR_EVENT" }, { 0x16, 0x7f, 3, 3, "MI_SEMAPHORE_MBOX" }, { 0x26, 0x1f, 3, 4, "MI_FLUSH_DW" }, { 0x0b, 0, 1, 1, "MI_SUSPEND_FLUSH" }, }; uint32_t *data = kgem->batch + offset; int op; for (op = 0; op < ARRAY_SIZE(opcodes); op++) { if ((data[0] & 0x1f800000) >> 23 == opcodes[op].opcode) { unsigned int len = 1, i; kgem_debug_print(data, offset, 0, "%s\n", opcodes[op].name); if (opcodes[op].max_len > 1) { len = (data[0] & opcodes[op].len_mask) + 2; if (len < opcodes[op].min_len || len > opcodes[op].max_len) { ErrorF("Bad length (%d) in %s, [%d, %d]\n", len, opcodes[op].name, opcodes[op].min_len, opcodes[op].max_len); assert(0); } } for (i = 1; i < len; i++) kgem_debug_print(data, offset, i, "dword %d\n", i); return len; } } kgem_debug_print(data, offset, 0, "MI UNKNOWN\n"); assert(0); return 1; } static int __decode_2d(struct kgem *kgem, uint32_t offset) { static const struct { uint32_t opcode; int min_len; int max_len; const char *name; } opcodes[] = { { 0x40, 5, 5, "COLOR_BLT" }, { 0x43, 6, 6, "SRC_COPY_BLT" }, { 0x01, 8, 8, "XY_SETUP_BLT" }, { 0x11, 9, 9, "XY_SETUP_MONO_PATTERN_SL_BLT" }, { 0x03, 3, 3, "XY_SETUP_CLIP_BLT" }, { 0x24, 2, 2, "XY_PIXEL_BLT" }, { 0x25, 3, 3, "XY_SCANLINES_BLT" }, { 0x26, 4, 4, "Y_TEXT_BLT" }, { 0x31, 5, 134, "XY_TEXT_IMMEDIATE_BLT" }, { 0x50, 6, 6, "XY_COLOR_BLT" }, { 0x51, 6, 6, "XY_PAT_BLT" }, { 0x76, 8, 8, "XY_PAT_CHROMA_BLT" }, { 0x72, 7, 135, "XY_PAT_BLT_IMMEDIATE" }, { 0x77, 9, 137, "XY_PAT_CHROMA_BLT_IMMEDIATE" }, { 0x52, 9, 9, "XY_MONO_PAT_BLT" }, { 0x59, 7, 7, "XY_MONO_PAT_FIXED_BLT" }, { 0x53, 8, 8, "XY_SRC_COPY_BLT" }, { 0x54, 8, 8, "XY_MONO_SRC_COPY_BLT" }, { 0x71, 9, 137, "XY_MONO_SRC_COPY_IMMEDIATE_BLT" }, { 0x55, 9, 9, "XY_FULL_BLT" }, { 0x55, 9, 137, "XY_FULL_IMMEDIATE_PATTERN_BLT" }, { 0x56, 9, 9, "XY_FULL_MONO_SRC_BLT" }, { 0x75, 10, 138, "XY_FULL_MONO_SRC_IMMEDIATE_PATTERN_BLT" }, { 0x57, 12, 12, "XY_FULL_MONO_PATTERN_BLT" }, { 0x58, 12, 12, "XY_FULL_MONO_PATTERN_MONO_SRC_BLT" }, }; unsigned int op, len; const char *format = NULL; uint32_t *data = kgem->batch + offset; struct drm_i915_gem_relocation_entry *reloc; /* Special case the two most common ops that we detail in full */ switch ((data[0] & 0x1fc00000) >> 22) { case 0x50: kgem_debug_print(data, offset, 0, "XY_COLOR_BLT (rgb %sabled, alpha %sabled, dst tile %d)\n", (data[0] & (1 << 20)) ? "en" : "dis", (data[0] & (1 << 21)) ? "en" : "dis", (data[0] >> 11) & 1); len = (data[0] & 0x000000ff) + 2; assert(len == 6); switch ((data[1] >> 24) & 0x3) { case 0: format="8"; break; case 1: format="565"; break; case 2: format="1555"; break; case 3: format="8888"; break; } kgem_debug_print(data, offset, 1, "format %s, rop %x, pitch %d, " "clipping %sabled\n", format, (data[1] >> 16) & 0xff, (short)(data[1] & 0xffff), data[1] & (1 << 30) ? "en" : "dis"); kgem_debug_print(data, offset, 2, "(%d,%d)\n", data[2] & 0xffff, data[2] >> 16); kgem_debug_print(data, offset, 3, "(%d,%d)\n", data[3] & 0xffff, data[3] >> 16); reloc = kgem_debug_get_reloc_entry(kgem, offset+4); kgem_debug_print(data, offset, 4, "dst offset 0x%08x [handle=%d, delta=%d, read=%x, write=%x (fenced? %d, tiling? %d)]\n", data[4], reloc->target_handle, reloc->delta, reloc->read_domains, reloc->write_domain, kgem_debug_handle_is_fenced(kgem, reloc->target_handle), kgem_debug_handle_tiling(kgem, reloc->target_handle)); kgem_debug_print(data, offset, 5, "color\n"); assert(kgem->gen >= 040 || kgem_debug_handle_is_fenced(kgem, reloc->target_handle)); return len; case 0x53: kgem_debug_print(data, offset, 0, "XY_SRC_COPY_BLT (rgb %sabled, alpha %sabled, " "src tile %d, dst tile %d)\n", (data[0] & (1 << 20)) ? "en" : "dis", (data[0] & (1 << 21)) ? "en" : "dis", (data[0] >> 15) & 1, (data[0] >> 11) & 1); len = (data[0] & 0x000000ff) + 2; assert(len == 8); switch ((data[1] >> 24) & 0x3) { case 0: format="8"; break; case 1: format="565"; break; case 2: format="1555"; break; case 3: format="8888"; break; } kgem_debug_print(data, offset, 1, "format %s, rop %x, dst pitch %d, " "clipping %sabled\n", format, (data[1] >> 16) & 0xff, (short)(data[1] & 0xffff), data[1] & (1 << 30) ? "en" : "dis"); kgem_debug_print(data, offset, 2, "dst (%d,%d)\n", data[2] & 0xffff, data[2] >> 16); kgem_debug_print(data, offset, 3, "dst (%d,%d)\n", data[3] & 0xffff, data[3] >> 16); reloc = kgem_debug_get_reloc_entry(kgem, offset+4); assert(reloc); kgem_debug_print(data, offset, 4, "dst offset 0x%08x [handle=%d, delta=%d, read=%x, write=%x, (fenced? %d, tiling? %d)]\n", data[4], reloc->target_handle, reloc->delta, reloc->read_domains, reloc->write_domain, kgem_debug_handle_is_fenced(kgem, reloc->target_handle), kgem_debug_handle_tiling(kgem, reloc->target_handle)); assert(kgem->gen >= 040 || kgem_debug_handle_is_fenced(kgem, reloc->target_handle)); kgem_debug_print(data, offset, 5, "src (%d,%d)\n", data[5] & 0xffff, data[5] >> 16); kgem_debug_print(data, offset, 6, "src pitch %d\n", (short)(data[6] & 0xffff)); reloc = kgem_debug_get_reloc_entry(kgem, offset+7); assert(reloc); kgem_debug_print(data, offset, 7, "src offset 0x%08x [handle=%d, delta=%d, read=%x, write=%x (fenced? %d, tiling? %d)]\n", data[7], reloc->target_handle, reloc->delta, reloc->read_domains, reloc->write_domain, kgem_debug_handle_is_fenced(kgem, reloc->target_handle), kgem_debug_handle_tiling(kgem, reloc->target_handle)); assert(kgem->gen >= 040 || kgem_debug_handle_is_fenced(kgem, reloc->target_handle)); return len; } for (op = 0; op < ARRAY_SIZE(opcodes); op++) { if ((data[0] & 0x1fc00000) >> 22 == opcodes[op].opcode) { unsigned int i; len = 1; kgem_debug_print(data, offset, 0, "%s\n", opcodes[op].name); if (opcodes[op].max_len > 1) { len = (data[0] & 0x000000ff) + 2; assert(len >= opcodes[op].min_len && len <= opcodes[op].max_len); } for (i = 1; i < len; i++) kgem_debug_print(data, offset, i, "dword %d\n", i); return len; } } kgem_debug_print(data, offset, 0, "2D UNKNOWN\n"); assert(0); return 1; } static int __decode_2d_gen8(struct kgem *kgem, uint32_t offset) { static const struct { uint32_t opcode; int min_len; int max_len; const char *name; } opcodes[] = { { 0x43, 8, 8, "SRC_COPY_BLT" }, { 0x01, 8, 8, "XY_SETUP_BLT" }, { 0x11, 10, 10, "XY_SETUP_MONO_PATTERN_SL_BLT" }, { 0x03, 3, 3, "XY_SETUP_CLIP_BLT" }, { 0x24, 2, 2, "XY_PIXEL_BLT" }, { 0x25, 3, 3, "XY_SCANLINES_BLT" }, { 0x26, 4, 4, "Y_TEXT_BLT" }, { 0x31, 5, 134, "XY_TEXT_IMMEDIATE_BLT" }, { 0x50, 7, 7, "XY_COLOR_BLT" }, { 0x51, 6, 6, "XY_PAT_BLT" }, { 0x76, 8, 8, "XY_PAT_CHROMA_BLT" }, { 0x72, 7, 135, "XY_PAT_BLT_IMMEDIATE" }, { 0x77, 9, 137, "XY_PAT_CHROMA_BLT_IMMEDIATE" }, { 0x52, 9, 9, "XY_MONO_PAT_BLT" }, { 0x59, 7, 7, "XY_MONO_PAT_FIXED_BLT" }, { 0x53, 8, 8, "XY_SRC_COPY_BLT" }, { 0x54, 8, 8, "XY_MONO_SRC_COPY_BLT" }, { 0x71, 9, 137, "XY_MONO_SRC_COPY_IMMEDIATE_BLT" }, { 0x55, 9, 9, "XY_FULL_BLT" }, { 0x55, 9, 137, "XY_FULL_IMMEDIATE_PATTERN_BLT" }, { 0x56, 9, 9, "XY_FULL_MONO_SRC_BLT" }, { 0x75, 10, 138, "XY_FULL_MONO_SRC_IMMEDIATE_PATTERN_BLT" }, { 0x57, 12, 12, "XY_FULL_MONO_PATTERN_BLT" }, { 0x58, 12, 12, "XY_FULL_MONO_PATTERN_MONO_SRC_BLT" }, }; unsigned int op, len; const char *format = NULL; uint32_t *data = kgem->batch + offset; struct drm_i915_gem_relocation_entry *reloc; /* Special case the two most common ops that we detail in full */ switch ((data[0] & 0x1fc00000) >> 22) { case 0x50: kgem_debug_print(data, offset, 0, "XY_COLOR_BLT (rgb %sabled, alpha %sabled, dst tile %d)\n", (data[0] & (1 << 20)) ? "en" : "dis", (data[0] & (1 << 21)) ? "en" : "dis", (data[0] >> 11) & 1); len = (data[0] & 0x000000ff) + 2; assert(len == 7); switch ((data[1] >> 24) & 0x3) { case 0: format="8"; break; case 1: format="565"; break; case 2: format="1555"; break; case 3: format="8888"; break; } kgem_debug_print(data, offset, 1, "format %s, rop %x, pitch %d, " "clipping %sabled\n", format, (data[1] >> 16) & 0xff, (short)(data[1] & 0xffff), data[1] & (1 << 30) ? "en" : "dis"); kgem_debug_print(data, offset, 2, "(%d,%d)\n", data[2] & 0xffff, data[2] >> 16); kgem_debug_print(data, offset, 3, "(%d,%d)\n", data[3] & 0xffff, data[3] >> 16); reloc = kgem_debug_get_reloc_entry(kgem, offset+4); kgem_debug_print(data, offset, 4, "dst offset 0x%016llx [handle=%d, delta=%d, read=%x, write=%x (fenced? %d, tiling? %d)]\n", (long long)*(uint64_t *)&data[4], reloc->target_handle, reloc->delta, reloc->read_domains, reloc->write_domain, kgem_debug_handle_is_fenced(kgem, reloc->target_handle), kgem_debug_handle_tiling(kgem, reloc->target_handle)); kgem_debug_print(data, offset, 6, "color\n"); return len; case 0x53: kgem_debug_print(data, offset, 0, "XY_SRC_COPY_BLT (rgb %sabled, alpha %sabled, " "src tile %d, dst tile %d)\n", (data[0] & (1 << 20)) ? "en" : "dis", (data[0] & (1 << 21)) ? "en" : "dis", (data[0] >> 15) & 1, (data[0] >> 11) & 1); len = (data[0] & 0x000000ff) + 2; assert(len == 10); switch ((data[1] >> 24) & 0x3) { case 0: format="8"; break; case 1: format="565"; break; case 2: format="1555"; break; case 3: format="8888"; break; } kgem_debug_print(data, offset, 1, "format %s, rop %x, dst pitch %d, " "clipping %sabled\n", format, (data[1] >> 16) & 0xff, (short)(data[1] & 0xffff), data[1] & (1 << 30) ? "en" : "dis"); kgem_debug_print(data, offset, 2, "dst (%d,%d)\n", data[2] & 0xffff, data[2] >> 16); kgem_debug_print(data, offset, 3, "dst (%d,%d)\n", data[3] & 0xffff, data[3] >> 16); reloc = kgem_debug_get_reloc_entry(kgem, offset+4); assert(reloc); kgem_debug_print(data, offset, 4, "dst offset 0x%016llx [handle=%d, delta=%d, read=%x, write=%x, (fenced? %d, tiling? %d)]\n", (long long)*(uint64_t *)&data[4], reloc->target_handle, reloc->delta, reloc->read_domains, reloc->write_domain, kgem_debug_handle_is_fenced(kgem, reloc->target_handle), kgem_debug_handle_tiling(kgem, reloc->target_handle)); kgem_debug_print(data, offset, 6, "src (%d,%d)\n", data[6] & 0xffff, data[6] >> 16); kgem_debug_print(data, offset, 7, "src pitch %d\n", (short)(data[7] & 0xffff)); reloc = kgem_debug_get_reloc_entry(kgem, offset+8); assert(reloc); kgem_debug_print(data, offset, 8, "src offset 0x%016llx [handle=%d, delta=%d, read=%x, write=%x (fenced? %d, tiling? %d)]\n", (long long)*(uint64_t *)&data[8], reloc->target_handle, reloc->delta, reloc->read_domains, reloc->write_domain, kgem_debug_handle_is_fenced(kgem, reloc->target_handle), kgem_debug_handle_tiling(kgem, reloc->target_handle)); return len; } for (op = 0; op < ARRAY_SIZE(opcodes); op++) { if ((data[0] & 0x1fc00000) >> 22 == opcodes[op].opcode) { unsigned int i; len = 1; kgem_debug_print(data, offset, 0, "%s\n", opcodes[op].name); if (opcodes[op].max_len > 1) { len = (data[0] & 0x000000ff) + 2; assert(len >= opcodes[op].min_len && len <= opcodes[op].max_len); } for (i = 1; i < len; i++) kgem_debug_print(data, offset, i, "dword %d\n", i); return len; } } kgem_debug_print(data, offset, 0, "2D UNKNOWN\n"); assert(0); return 1; } static int (*decode_2d(int gen))(struct kgem*, uint32_t) { if (gen >= 0100) return __decode_2d_gen8; else return __decode_2d; } static int kgem_nop_decode_3d(struct kgem *kgem, uint32_t offset) { uint32_t *data = kgem->batch + offset; return (data[0] & 0xf) + 2; } static void kgem_nop_finish_state(struct kgem *kgem) { } static int (*decode_3d(int gen))(struct kgem*, uint32_t) { if (gen >= 0100) { return kgem_nop_decode_3d; } else if (gen >= 070) { return kgem_gen7_decode_3d; } else if (gen >= 060) { return kgem_gen6_decode_3d; } else if (gen >= 050) { return kgem_gen5_decode_3d; } else if (gen >= 040) { return kgem_gen4_decode_3d; } else if (gen >= 030) { return kgem_gen3_decode_3d; } else if (gen >= 020) { return kgem_gen2_decode_3d; } assert(0); } static void (*finish_state(int gen))(struct kgem*) { if (gen >= 0100) { return kgem_nop_finish_state; } else if (gen >= 070) { return kgem_gen7_finish_state; } else if (gen >= 060) { return kgem_gen6_finish_state; } else if (gen >= 050) { return kgem_gen5_finish_state; } else if (gen >= 040) { return kgem_gen4_finish_state; } else if (gen >= 030) { return kgem_gen3_finish_state; } else if (gen >= 020) { return kgem_gen2_finish_state; } assert(0); } void __kgem_batch_debug(struct kgem *kgem, uint32_t nbatch) { int (*const decode[])(struct kgem *, uint32_t) = { decode_mi, decode_nop, decode_2d(kgem->gen), decode_3d(kgem->gen), }; uint32_t offset = 0; while (offset < nbatch) { int class = (kgem->batch[offset] & 0xe0000000) >> 29; assert(class < ARRAY_SIZE(decode)); offset += decode[class](kgem, offset); } finish_state(kgem->gen)(kgem); } xf86-video-intel-2.99.917/src/sna/kgem_debug_gen7.c0000664000175000017500000004241512244635610016465 00000000000000/* * Copyright © 2007-2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Eric Anholt * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include "sna.h" #include "sna_reg.h" #include "gen7_render.h" #include "kgem_debug.h" static struct state { struct vertex_buffer { int handle; void *base; const char *ptr; int pitch; struct kgem_bo *current; } vb[33]; struct vertex_elements { int buffer; int offset; bool valid; uint32_t type; uint8_t swizzle[4]; } ve[33]; int num_ve; struct dynamic_state { struct kgem_bo *current; void *base, *ptr; } dynamic_state; } state; static void gen7_update_vertex_buffer(struct kgem *kgem, const uint32_t *data) { uint32_t reloc = sizeof(uint32_t) * (&data[1] - kgem->batch); struct kgem_bo *bo = NULL; void *base, *ptr; int i; for (i = 0; i < kgem->nreloc; i++) if (kgem->reloc[i].offset == reloc) break; assert(i < kgem->nreloc); reloc = kgem->reloc[i].target_handle; if (reloc == 0) { base = kgem->batch; } else { list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->handle == reloc) break; assert(&bo->request != &kgem->next_request->buffers); base = kgem_bo_map__debug(kgem, bo); } ptr = (char *)base + kgem->reloc[i].delta; i = data[0] >> 26; state.vb[i].current = bo; state.vb[i].base = base; state.vb[i].ptr = ptr; state.vb[i].pitch = data[0] & 0x7ff; } static void gen7_update_dynamic_buffer(struct kgem *kgem, const uint32_t offset) { uint32_t reloc = sizeof(uint32_t) * offset; struct kgem_bo *bo = NULL; void *base, *ptr; int i; if ((kgem->batch[offset] & 1) == 0) return; for (i = 0; i < kgem->nreloc; i++) if (kgem->reloc[i].offset == reloc) break; if(i < kgem->nreloc) { reloc = kgem->reloc[i].target_handle; if (reloc == 0) { base = kgem->batch; } else { list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->handle == reloc) break; assert(&bo->request != &kgem->next_request->buffers); base = kgem_bo_map__debug(kgem, bo); } ptr = (char *)base + (kgem->reloc[i].delta & ~1); } else { bo = NULL; base = NULL; ptr = NULL; } state.dynamic_state.current = bo; state.dynamic_state.base = base; state.dynamic_state.ptr = ptr; } static uint32_t get_ve_component(uint32_t data, int component) { return (data >> (16 + (3 - component) * 4)) & 0x7; } static void gen7_update_vertex_elements(struct kgem *kgem, int id, const uint32_t *data) { state.ve[id].buffer = data[0] >> 26; state.ve[id].valid = !!(data[0] & (1 << 25)); state.ve[id].type = (data[0] >> 16) & 0x1ff; state.ve[id].offset = data[0] & 0x7ff; state.ve[id].swizzle[0] = get_ve_component(data[1], 0); state.ve[id].swizzle[1] = get_ve_component(data[1], 1); state.ve[id].swizzle[2] = get_ve_component(data[1], 2); state.ve[id].swizzle[3] = get_ve_component(data[1], 3); } static void gen7_update_sf_state(struct kgem *kgem, uint32_t *data) { state.num_ve = 1 + ((data[1] >> 22) & 0x3f); } static void vertices_sint16_out(const struct vertex_elements *ve, const int16_t *v, int max) { int c; ErrorF("("); for (c = 0; c < max; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("%d", v[c]); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } for (; c < 4; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("1.0"); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } ErrorF(")"); } static void vertices_float_out(const struct vertex_elements *ve, const float *f, int max) { int c, o; ErrorF("("); for (c = o = 0; c < 4 && o < max; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("%f", f[o++]); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } for (; c < 4; c++) { switch (ve->swizzle[c]) { case 0: ErrorF("#"); break; case 1: ErrorF("1.0"); break; case 2: ErrorF("0.0"); break; case 3: ErrorF("1.0"); break; case 4: ErrorF("0x1"); break; case 5: break; default: ErrorF("?"); } if (c < 3) ErrorF(", "); } ErrorF(")"); } static void ve_out(const struct vertex_elements *ve, const void *ptr) { switch (ve->type) { case GEN7_SURFACEFORMAT_R32_FLOAT: vertices_float_out(ve, ptr, 1); break; case GEN7_SURFACEFORMAT_R32G32_FLOAT: vertices_float_out(ve, ptr, 2); break; case GEN7_SURFACEFORMAT_R32G32B32_FLOAT: vertices_float_out(ve, ptr, 3); break; case GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT: vertices_float_out(ve, ptr, 4); break; case GEN7_SURFACEFORMAT_R16_SINT: vertices_sint16_out(ve, ptr, 1); break; case GEN7_SURFACEFORMAT_R16G16_SINT: vertices_sint16_out(ve, ptr, 2); break; case GEN7_SURFACEFORMAT_R16G16B16A16_SINT: vertices_sint16_out(ve, ptr, 4); break; case GEN7_SURFACEFORMAT_R16_SSCALED: vertices_sint16_out(ve, ptr, 1); break; case GEN7_SURFACEFORMAT_R16G16_SSCALED: vertices_sint16_out(ve, ptr, 2); break; case GEN7_SURFACEFORMAT_R16G16B16A16_SSCALED: vertices_sint16_out(ve, ptr, 4); break; } } static void indirect_vertex_out(struct kgem *kgem, uint32_t v) { int i = 1; do { const struct vertex_elements *ve = &state.ve[i]; const struct vertex_buffer *vb = &state.vb[ve->buffer]; const void *ptr = vb->ptr + v * vb->pitch + ve->offset; if (!ve->valid) continue; ve_out(ve, ptr); while (++i <= state.num_ve && !state.ve[i].valid) ; if (i <= state.num_ve) ErrorF(", "); } while (i <= state.num_ve); } static void primitive_out(struct kgem *kgem, uint32_t *data) { int n; assert((data[0] & (1<<15)) == 0); /* XXX index buffers */ for (n = 0; n < data[2]; n++) { int v = data[3] + n; ErrorF(" [%d:%d] = ", n, v); indirect_vertex_out(kgem, v); ErrorF("\n"); } } static void finish_state(struct kgem *kgem) { memset(&state, 0, sizeof(state)); } static void state_base_out(uint32_t *data, uint32_t offset, unsigned int index, const char *name) { if (data[index] & 1) kgem_debug_print(data, offset, index, "%s state base address 0x%08x\n", name, data[index] & ~1); else kgem_debug_print(data, offset, index, "%s state base not updated\n", name); } static void state_max_out(uint32_t *data, uint32_t offset, unsigned int index, const char *name) { if (data[index] == 1) kgem_debug_print(data, offset, index, "%s state upper bound disabled\n", name); else if (data[index] & 1) kgem_debug_print(data, offset, index, "%s state upper bound 0x%08x\n", name, data[index] & ~1); else kgem_debug_print(data, offset, index, "%s state upper bound not updated\n", name); } static const char * get_965_surfacetype(unsigned int surfacetype) { switch (surfacetype) { case 0: return "1D"; case 1: return "2D"; case 2: return "3D"; case 3: return "CUBE"; case 4: return "BUFFER"; case 7: return "NULL"; default: return "unknown"; } } static const char * get_965_depthformat(unsigned int depthformat) { switch (depthformat) { case 0: return "s8_z24float"; case 1: return "z32float"; case 2: return "z24s8"; case 5: return "z16"; default: return "unknown"; } } static const char * get_element_component(uint32_t data, int component) { uint32_t component_control = (data >> (16 + (3 - component) * 4)) & 0x7; switch (component_control) { case 0: return "nostore"; case 1: switch (component) { case 0: return "X"; case 1: return "Y"; case 2: return "Z"; case 3: return "W"; default: return "fail"; } case 2: return "0.0"; case 3: return "1.0"; case 4: return "0x1"; case 5: return "VID"; default: return "fail"; } } static const char * get_prim_type(uint32_t data) { uint32_t primtype = data & 0x1f; switch (primtype) { case 0x01: return "point list"; case 0x02: return "line list"; case 0x03: return "line strip"; case 0x04: return "tri list"; case 0x05: return "tri strip"; case 0x06: return "tri fan"; case 0x07: return "quad list"; case 0x08: return "quad strip"; case 0x09: return "line list adj"; case 0x0a: return "line strip adj"; case 0x0b: return "tri list adj"; case 0x0c: return "tri strip adj"; case 0x0d: return "tri strip reverse"; case 0x0e: return "polygon"; case 0x0f: return "rect list"; case 0x10: return "line loop"; case 0x11: return "point list bf"; case 0x12: return "line strip cont"; case 0x13: return "line strip bf"; case 0x14: return "line strip cont bf"; case 0x15: return "tri fan no stipple"; default: return "fail"; } } struct reloc { struct kgem_bo *bo; void *base; }; static void * get_reloc(struct kgem *kgem, void *base, const uint32_t *reloc, struct reloc *r) { uint32_t delta = *reloc; memset(r, 0, sizeof(*r)); if (base == 0) { uint32_t handle = sizeof(uint32_t) * (reloc - kgem->batch); struct kgem_bo *bo = NULL; int i; for (i = 0; i < kgem->nreloc; i++) if (kgem->reloc[i].offset == handle) break; assert(i < kgem->nreloc); handle = kgem->reloc[i].target_handle; delta = kgem->reloc[i].delta; if (handle == 0) { base = kgem->batch; } else { list_for_each_entry(bo, &kgem->next_request->buffers, request) if (bo->handle == handle) break; assert(&bo->request != &kgem->next_request->buffers); base = kgem_bo_map__debug(kgem, bo); r->bo = bo; r->base = base; } } return (char *)base + (delta & ~3); } static const char * gen7_filter_to_string(uint32_t filter) { switch (filter) { default: case GEN7_MAPFILTER_NEAREST: return "nearest"; case GEN7_MAPFILTER_LINEAR: return "linear"; } } static const char * gen7_repeat_to_string(uint32_t repeat) { switch (repeat) { default: case GEN7_TEXCOORDMODE_CLAMP_BORDER: return "border"; case GEN7_TEXCOORDMODE_WRAP: return "wrap"; case GEN7_TEXCOORDMODE_CLAMP: return "clamp"; case GEN7_TEXCOORDMODE_MIRROR: return "mirror"; } } static void gen7_decode_sampler_state(struct kgem *kgem, const uint32_t *reloc) { const struct gen7_sampler_state *ss; struct reloc r; const char *min, *mag; const char *s_wrap, *t_wrap, *r_wrap; ss = get_reloc(kgem, state.dynamic_state.ptr, reloc, &r); min = gen7_filter_to_string(ss->ss0.min_filter); mag = gen7_filter_to_string(ss->ss0.mag_filter); s_wrap = gen7_repeat_to_string(ss->ss3.s_wrap_mode); t_wrap = gen7_repeat_to_string(ss->ss3.t_wrap_mode); r_wrap = gen7_repeat_to_string(ss->ss3.r_wrap_mode); ErrorF(" Sampler 0:\n"); ErrorF(" filter: min=%s, mag=%s\n", min, mag); ErrorF(" wrap: s=%s, t=%s, r=%s\n", s_wrap, t_wrap, r_wrap); ss++; min = gen7_filter_to_string(ss->ss0.min_filter); mag = gen7_filter_to_string(ss->ss0.mag_filter); s_wrap = gen7_repeat_to_string(ss->ss3.s_wrap_mode); t_wrap = gen7_repeat_to_string(ss->ss3.t_wrap_mode); r_wrap = gen7_repeat_to_string(ss->ss3.r_wrap_mode); ErrorF(" Sampler 1:\n"); ErrorF(" filter: min=%s, mag=%s\n", min, mag); ErrorF(" wrap: s=%s, t=%s, r=%s\n", s_wrap, t_wrap, r_wrap); } static const char * gen7_blend_factor_to_string(uint32_t v) { switch (v) { #define C(x) case GEN7_BLENDFACTOR_##x: return #x; C(ONE); C(SRC_COLOR); C(SRC_ALPHA); C(DST_ALPHA); C(DST_COLOR); C(SRC_ALPHA_SATURATE); C(CONST_COLOR); C(CONST_ALPHA); C(SRC1_COLOR); C(SRC1_ALPHA); C(ZERO); C(INV_SRC_COLOR); C(INV_SRC_ALPHA); C(INV_DST_ALPHA); C(INV_DST_COLOR); C(INV_CONST_COLOR); C(INV_CONST_ALPHA); C(INV_SRC1_COLOR); C(INV_SRC1_ALPHA); #undef C default: return "???"; } } static const char * gen7_blend_function_to_string(uint32_t v) { switch (v) { #define C(x) case GEN7_BLENDFUNCTION_##x: return #x; C(ADD); C(SUBTRACT); C(REVERSE_SUBTRACT); C(MIN); C(MAX); #undef C default: return "???"; } } static void gen7_decode_blend(struct kgem *kgem, const uint32_t *reloc) { const struct gen7_blend_state *blend; struct reloc r; const char *dst, *src; const char *func; blend = get_reloc(kgem, state.dynamic_state.ptr, reloc, &r); dst = gen7_blend_factor_to_string(blend->blend0.dest_blend_factor); src = gen7_blend_factor_to_string(blend->blend0.source_blend_factor); func = gen7_blend_function_to_string(blend->blend0.blend_func); ErrorF(" Blend (%s): function %s, src=%s, dst=%s\n", blend->blend0.blend_enable ? "enabled" : "disabled", func, src, dst); } int kgem_gen7_decode_3d(struct kgem *kgem, uint32_t offset) { static const struct { uint32_t opcode; int min_len; int max_len; const char *name; } opcodes[] = { { 0x6101, 6, 6, "STATE_BASE_ADDRESS" }, { 0x6102, 2, 2 , "STATE_SIP" }, { 0x6104, 1, 1, "3DSTATE_PIPELINE_SELECT" }, { 0x780a, 3, 3, "3DSTATE_INDEX_BUFFER" }, { 0x7900, 4, 4, "3DSTATE_DRAWING_RECTANGLE" }, }; uint32_t *data = kgem->batch + offset; uint32_t op; unsigned int len; int i; const char *name; len = (data[0] & 0xff) + 2; op = (data[0] & 0xffff0000) >> 16; switch (op) { case 0x6101: i = 0; kgem_debug_print(data, offset, i++, "STATE_BASE_ADDRESS\n"); assert(len == 10); state_base_out(data, offset, i++, "general"); state_base_out(data, offset, i++, "surface"); state_base_out(data, offset, i++, "dynamic"); state_base_out(data, offset, i++, "indirect"); state_base_out(data, offset, i++, "instruction"); state_max_out(data, offset, i++, "general"); state_max_out(data, offset, i++, "dynamic"); state_max_out(data, offset, i++, "indirect"); state_max_out(data, offset, i++, "instruction"); gen7_update_dynamic_buffer(kgem, offset + 3); return len; case 0x7808: assert((len - 1) % 4 == 0); kgem_debug_print(data, offset, 0, "3DSTATE_VERTEX_BUFFERS\n"); for (i = 1; i < len;) { gen7_update_vertex_buffer(kgem, data + i); kgem_debug_print(data, offset, i, "buffer %d: %s, pitch %db\n", data[i] >> 26, data[i] & (1 << 20) ? "random" : "sequential", data[i] & 0x07ff); i++; kgem_debug_print(data, offset, i++, "buffer address\n"); kgem_debug_print(data, offset, i++, "max index\n"); kgem_debug_print(data, offset, i++, "mbz\n"); } return len; case 0x7809: assert((len + 1) % 2 == 0); kgem_debug_print(data, offset, 0, "3DSTATE_VERTEX_ELEMENTS\n"); for (i = 1; i < len;) { gen7_update_vertex_elements(kgem, (i - 1)/2, data + i); kgem_debug_print(data, offset, i, "buffer %d: %svalid, type 0x%04x, " "src offset 0x%04x bytes\n", data[i] >> 26, data[i] & (1 << 25) ? "" : "in", (data[i] >> 16) & 0x1ff, data[i] & 0x07ff); i++; kgem_debug_print(data, offset, i, "(%s, %s, %s, %s), " "dst offset 0x%02x bytes\n", get_element_component(data[i], 0), get_element_component(data[i], 1), get_element_component(data[i], 2), get_element_component(data[i], 3), (data[i] & 0xff) * 4); i++; } return len; case 0x780a: assert(len == 3); kgem_debug_print(data, offset, 0, "3DSTATE_INDEX_BUFFER\n"); kgem_debug_print(data, offset, 1, "beginning buffer address\n"); kgem_debug_print(data, offset, 2, "ending buffer address\n"); return len; case 0x7b00: assert(len == 7); kgem_debug_print(data, offset, 0, "3DPRIMITIVE\n"); kgem_debug_print(data, offset, 1, "type %s, %s\n", get_prim_type(data[1]), (data[1] & (1 << 15)) ? "random" : "sequential"); kgem_debug_print(data, offset, 2, "vertex count\n"); kgem_debug_print(data, offset, 3, "start vertex\n"); kgem_debug_print(data, offset, 4, "instance count\n"); kgem_debug_print(data, offset, 5, "start instance\n"); kgem_debug_print(data, offset, 6, "index bias\n"); primitive_out(kgem, data); return len; } /* For the rest, just dump the bytes */ name = NULL; for (i = 0; i < ARRAY_SIZE(opcodes); i++) if (op == opcodes[i].opcode) { name = opcodes[i].name; break; } len = (data[0] & 0xff) + 2; if (name == NULL) { kgem_debug_print(data, offset, 0, "unknown\n"); } else { kgem_debug_print(data, offset, 0, "%s\n", opcodes[i].name); if (opcodes[i].max_len > 1) { assert(len >= opcodes[i].min_len && len <= opcodes[i].max_len); } } for (i = 1; i < len; i++) kgem_debug_print(data, offset, i, "dword %d\n", i); return len; } void kgem_gen7_finish_state(struct kgem *kgem) { finish_state(kgem); } xf86-video-intel-2.99.917/src/sna/sna_stream.c0000664000175000017500000000775312400044327015607 00000000000000/* * Copyright © 2011 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_render.h" #include "brw/brw.h" int sna_static_stream_init(struct sna_static_stream *stream) { stream->used = 0; stream->size = 64*1024; stream->data = malloc(stream->size); return stream->data != NULL; } static uint32_t sna_static_stream_alloc(struct sna_static_stream *stream, uint32_t len, uint32_t align) { uint32_t offset = ALIGN(stream->used, align); uint32_t size = offset + len; if (size > stream->size) { do stream->size *= 2; while (stream->size < size); stream->data = realloc(stream->data, stream->size); } stream->used = size; return offset; } uint32_t sna_static_stream_add(struct sna_static_stream *stream, const void *data, uint32_t len, uint32_t align) { uint32_t offset = sna_static_stream_alloc(stream, len, align); memcpy(stream->data + offset, data, len); return offset; } void *sna_static_stream_map(struct sna_static_stream *stream, uint32_t len, uint32_t align) { uint32_t offset = sna_static_stream_alloc(stream, len, align); return memset(stream->data + offset, 0, len); } uint32_t sna_static_stream_offsetof(struct sna_static_stream *stream, void *ptr) { return (uint8_t *)ptr - stream->data; } struct kgem_bo *sna_static_stream_fini(struct sna *sna, struct sna_static_stream *stream) { struct kgem_bo *bo; DBG(("uploaded %d bytes of static state\n", stream->used)); bo = kgem_create_linear(&sna->kgem, stream->used, 0); if (bo && !kgem_bo_write(&sna->kgem, bo, stream->data, stream->used)) { kgem_bo_destroy(&sna->kgem, bo); return NULL; } free(stream->data); return bo; } unsigned sna_static_stream_compile_sf(struct sna *sna, struct sna_static_stream *stream, bool (*compile)(struct brw_compile *)) { struct brw_compile p; brw_compile_init(&p, sna->kgem.gen, sna_static_stream_map(stream, 64*sizeof(uint32_t), 64)); if (!compile(&p)) { stream->used -= 64*sizeof(uint32_t); return 0; } assert(p.nr_insn*sizeof(struct brw_instruction) <= 64*sizeof(uint32_t)); stream->used -= 64*sizeof(uint32_t) - p.nr_insn*sizeof(struct brw_instruction); return sna_static_stream_offsetof(stream, p.store); } unsigned sna_static_stream_compile_wm(struct sna *sna, struct sna_static_stream *stream, bool (*compile)(struct brw_compile *, int), int dispatch_width) { struct brw_compile p; brw_compile_init(&p, sna->kgem.gen, sna_static_stream_map(stream, 256*sizeof(uint32_t), 64)); if (!compile(&p, dispatch_width)) { stream->used -= 256*sizeof(uint32_t); return 0; } assert(p.nr_insn*sizeof(struct brw_instruction) <= 256*sizeof(uint32_t)); stream->used -= 256*sizeof(uint32_t) - p.nr_insn*sizeof(struct brw_instruction); return sna_static_stream_offsetof(stream, p.store); } xf86-video-intel-2.99.917/src/sna/gen4_common.c0000664000175000017500000000375412400044327015655 00000000000000/* * Copyright © 2011-2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "gen4_common.h" #include "gen4_vertex.h" void gen4_render_flush(struct sna *sna) { gen4_vertex_close(sna); assert(sna->render.vb_id == 0); assert(sna->render.vertex_offset == 0); } void gen4_render_retire(struct kgem *kgem) { struct sna *sna; sna = container_of(kgem, struct sna, kgem); if (sna->render.nvertex_reloc == 0 && sna->render.vbo && !kgem_bo_is_busy(sna->render.vbo)) { DBG(("%s: resetting idle vbo\n", __FUNCTION__)); sna->render.vertex_used = 0; sna->render.vertex_index = 0; } } void gen4_render_expire(struct kgem *kgem) { struct sna *sna; sna = container_of(kgem, struct sna, kgem); if (sna->render.vbo && !sna->render.vertex_used) { DBG(("%s: discarding vbo\n", __FUNCTION__)); discard_vbo(sna); } } xf86-video-intel-2.99.917/src/sna/sna_dri3.c0000664000175000017500000002436512441617165015166 00000000000000/* * Copyright (c) 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include "sna.h" #include #include #include #include static DevPrivateKeyRec sna_sync_fence_private_key; struct sna_sync_fence { SyncFenceSetTriggeredFunc set_triggered; }; static inline struct sna_sync_fence *sna_sync_fence(SyncFence *fence) { return dixLookupPrivate(&fence->devPrivates, &sna_sync_fence_private_key); } static inline void mark_dri3_pixmap(struct sna *sna, struct sna_pixmap *priv, struct kgem_bo *bo) { bo->flush = true; if (bo->exec) sna->kgem.flush = 1; if (bo == priv->gpu_bo) priv->flush |= 3; else priv->shm = true; sna_accel_watch_flush(sna, 1); } static void sna_sync_flush(struct sna *sna, struct sna_pixmap *priv) { struct kgem_bo *bo = NULL; DBG(("%s(pixmap=%ld)\n", __FUNCTION__, priv->pixmap->drawable.serialNumber)); assert(priv); if (priv->pinned & PIN_DRI3) { assert(priv->gpu_bo); assert(priv->pinned & PIN_DRI3); DBG(("%s: flushing prime GPU bo, handle=%ld\n", __FUNCTION__, priv->gpu_bo->handle)); if (sna_pixmap_move_to_gpu(priv->pixmap, MOVE_READ | MOVE_WRITE | MOVE_ASYNC_HINT | __MOVE_FORCE)) { sna_damage_all(&priv->gpu_damage, priv->pixmap); bo = priv->gpu_bo; } } else { assert(priv->cpu_bo); assert(IS_STATIC_PTR(priv->ptr)); DBG(("%s: flushing prime CPU bo, handle=%ld\n", __FUNCTION__, priv->cpu_bo->handle)); if (sna_pixmap_move_to_cpu(priv->pixmap, MOVE_READ | MOVE_WRITE | MOVE_ASYNC_HINT)) bo = priv->cpu_bo; } if (bo != NULL) { kgem_bo_submit(&sna->kgem, bo); kgem_bo_unclean(&sna->kgem, bo); } } static void sna_sync_fence_set_triggered(SyncFence *fence) { struct sna *sna = to_sna_from_screen(fence->pScreen); struct sna_sync_fence *sna_fence = sna_sync_fence(fence); DBG(("%s()\n", __FUNCTION__)); sna_accel_flush(sna); fence->funcs.SetTriggered = sna_fence->set_triggered; sna_fence->set_triggered(fence); sna_fence->set_triggered = fence->funcs.SetTriggered; fence->funcs.SetTriggered = sna_sync_fence_set_triggered; } static void sna_sync_create_fence(ScreenPtr screen, SyncFence *fence, Bool initially_triggered) { struct sna *sna = to_sna_from_screen(screen); SyncScreenFuncsPtr funcs = miSyncGetScreenFuncs(screen); DBG(("%s()\n", __FUNCTION__)); funcs->CreateFence = sna->dri3.create_fence; sna->dri3.create_fence(screen, fence, initially_triggered); sna->dri3.create_fence = funcs->CreateFence; funcs->CreateFence = sna_sync_create_fence; sna_sync_fence(fence)->set_triggered = fence->funcs.SetTriggered; fence->funcs.SetTriggered = sna_sync_fence_set_triggered; } static bool sna_sync_open(struct sna *sna, ScreenPtr screen) { SyncScreenFuncsPtr funcs; DBG(("%s()\n", __FUNCTION__)); if (!miSyncShmScreenInit(screen)) return false; if (!dixPrivateKeyRegistered(&sna_sync_fence_private_key)) { if (!dixRegisterPrivateKey(&sna_sync_fence_private_key, PRIVATE_SYNC_FENCE, sizeof(struct sna_sync_fence))) return false; } funcs = miSyncGetScreenFuncs(screen); sna->dri3.create_fence = funcs->CreateFence; funcs->CreateFence = sna_sync_create_fence; return true; } static int sna_dri3_open_device(ScreenPtr screen, RRProviderPtr provider, int *out) { int fd; DBG(("%s()\n", __FUNCTION__)); fd = intel_get_client_fd(to_sna_from_screen(screen)->dev); if (fd < 0) return -fd; *out = fd; return Success; } static PixmapPtr sna_dri3_pixmap_from_fd(ScreenPtr screen, int fd, CARD16 width, CARD16 height, CARD16 stride, CARD8 depth, CARD8 bpp) { struct sna *sna = to_sna_from_screen(screen); PixmapPtr pixmap; struct sna_pixmap *priv; struct kgem_bo *bo; DBG(("%s(fd=%d, width=%d, height=%d, stride=%d, depth=%d, bpp=%d)\n", __FUNCTION__, fd, width, height, stride, depth, bpp)); if (width > INT16_MAX || height > INT16_MAX) return NULL; if ((uint32_t)width * bpp > (uint32_t)stride * 8) return NULL; if (depth < 8) return NULL; switch (bpp) { case 8: case 16: case 32: break; default: return NULL; } bo = kgem_create_for_prime(&sna->kgem, fd, (uint32_t)stride * height); if (bo == NULL) return NULL; /* Check for a duplicate */ list_for_each_entry(priv, &sna->dri3.pixmaps, cow_list) { int other_stride = 0; if (bo->snoop) { assert(priv->cpu_bo); assert(IS_STATIC_PTR(priv->ptr)); if (bo->handle == priv->cpu_bo->handle) other_stride = priv->cpu_bo->pitch; } else { assert(priv->gpu_bo); assert(priv->pinned & PIN_DRI3); if (bo->handle == priv->gpu_bo->handle) other_stride = priv->gpu_bo->pitch; } if (other_stride) { pixmap = priv->pixmap; DBG(("%s: imported fd matches existing DRI3 pixmap=%ld\n", __FUNCTION__, pixmap->drawable.serialNumber)); bo->handle = 0; /* fudge to prevent gem_close */ kgem_bo_destroy(&sna->kgem, bo); if (width != pixmap->drawable.width || height != pixmap->drawable.height || depth != pixmap->drawable.depth || bpp != pixmap->drawable.bitsPerPixel || stride != other_stride) { DBG(("%s: imported fd mismatches existing DRI3 pixmap (width=%d, height=%d, depth=%d, bpp=%d, stride=%d)\n", __FUNCTION__, pixmap->drawable.width, pixmap->drawable.height, pixmap->drawable.depth, pixmap->drawable.bitsPerPixel, other_stride)); return NULL; } sna_sync_flush(sna, priv); pixmap->refcnt++; return pixmap; } } if (!kgem_check_surface_size(&sna->kgem, width, height, bpp, bo->tiling, stride, kgem_bo_size(bo))) { DBG(("%s: client supplied pitch=%d, size=%d too small for %dx%d surface\n", __FUNCTION__, stride, kgem_bo_size(bo), width, height)); goto free_bo; } pixmap = sna_pixmap_create_unattached(screen, 0, 0, depth); if (pixmap == NullPixmap) goto free_bo; if (!screen->ModifyPixmapHeader(pixmap, width, height, depth, bpp, stride, NULL)) goto free_pixmap; priv = sna_pixmap_attach_to_bo(pixmap, bo); if (priv == NULL) goto free_pixmap; bo->pitch = stride; priv->stride = stride; if (bo->snoop) { assert(priv->cpu_bo == bo); pixmap->devPrivate.ptr = kgem_bo_map__cpu(&sna->kgem, priv->cpu_bo); if (pixmap->devPrivate.ptr == NULL) goto free_pixmap; pixmap->devKind = stride; priv->ptr = MAKE_STATIC_PTR(pixmap->devPrivate.ptr); } else { assert(priv->gpu_bo == bo); priv->pinned |= PIN_DRI3; } list_add(&priv->cow_list, &sna->dri3.pixmaps); mark_dri3_pixmap(sna, priv, bo); return pixmap; free_pixmap: screen->DestroyPixmap(pixmap); free_bo: kgem_bo_destroy(&sna->kgem, bo); return NULL; } static int sna_dri3_fd_from_pixmap(ScreenPtr screen, PixmapPtr pixmap, CARD16 *stride, CARD32 *size) { struct sna *sna = to_sna_from_screen(screen); struct sna_pixmap *priv; struct kgem_bo *bo = NULL; int fd; DBG(("%s(pixmap=%ld, width=%d, height=%d)\n", __FUNCTION__, pixmap->drawable.serialNumber, pixmap->drawable.width, pixmap->drawable.height)); if (pixmap == sna->front && sna->flags & SNA_TEAR_FREE) { DBG(("%s: DRI3 protocol cannot support TearFree frontbuffers\n", __FUNCTION__)); return -1; } priv = sna_pixmap(pixmap); if (priv && IS_STATIC_PTR(priv->ptr) && priv->cpu_bo) { if (sna_pixmap_move_to_cpu(pixmap, MOVE_READ | MOVE_WRITE | MOVE_ASYNC_HINT)) bo = priv->cpu_bo; } else { priv = sna_pixmap_move_to_gpu(pixmap, MOVE_READ | MOVE_WRITE | MOVE_ASYNC_HINT | __MOVE_FORCE | __MOVE_DRI); if (priv != NULL) { sna_damage_all(&priv->gpu_damage, pixmap); bo = priv->gpu_bo; } } if (bo == NULL) { DBG(("%s: pixmap not supported by GPU\n", __FUNCTION__)); return -1; } assert(priv != NULL); if (bo->pitch > UINT16_MAX) { DBG(("%s: pixmap pitch (%d) too large for DRI3 protocol\n", __FUNCTION__, bo->pitch)); return -1; } fd = kgem_bo_export_to_prime(&sna->kgem, bo); if (fd == -1) { DBG(("%s: exporting handle=%d to fd failed\n", __FUNCTION__, bo->handle)); return -1; } if (bo == priv->gpu_bo) priv->pinned |= PIN_DRI3; list_move(&priv->cow_list, &sna->dri3.pixmaps); mark_dri3_pixmap(sna, priv, bo); *stride = (priv->pinned & PIN_DRI3) ? priv->gpu_bo->pitch : priv->cpu_bo->pitch; *size = kgem_bo_size((priv->pinned & PIN_DRI3) ? priv->gpu_bo : priv->cpu_bo); DBG(("%s: exporting %s pixmap=%ld, handle=%d, stride=%d, size=%d\n", __FUNCTION__, (priv->pinned & PIN_DRI3) ? "GPU" : "CPU", pixmap->drawable.serialNumber, (priv->pinned & PIN_DRI3) ? priv->gpu_bo->handle : priv->cpu_bo->handle, *stride, *size)); return fd; } static dri3_screen_info_rec sna_dri3_info = { .version = DRI3_SCREEN_INFO_VERSION, .open = sna_dri3_open_device, .pixmap_from_fd = sna_dri3_pixmap_from_fd, .fd_from_pixmap = sna_dri3_fd_from_pixmap, }; bool sna_dri3_open(struct sna *sna, ScreenPtr screen) { DBG(("%s()\n", __FUNCTION__)); if (!sna_sync_open(sna, screen)) return false; list_init(&sna->dri3.pixmaps); return dri3_screen_init(screen, &sna_dri3_info); } void sna_dri3_close(struct sna *sna, ScreenPtr screen) { SyncScreenFuncsPtr funcs; DBG(("%s()\n", __FUNCTION__)); funcs = miSyncGetScreenFuncs(screen); if (funcs) funcs->CreateFence = sna->dri3.create_fence; } xf86-video-intel-2.99.917/src/sna/sna_reg.h0000664000175000017500000000542212400044327015065 00000000000000#ifndef SNA_REG_H #define SNA_REG_H /* Flush */ #define MI_FLUSH (0x04<<23) #define MI_FLUSH_DW (0x26<<23) #define MI_WRITE_DIRTY_STATE (1<<4) #define MI_END_SCENE (1<<3) #define MI_GLOBAL_SNAPSHOT_COUNT_RESET (1<<3) #define MI_INHIBIT_RENDER_CACHE_FLUSH (1<<2) #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) #define MI_INVALIDATE_MAP_CACHE (1<<0) /* broadwater flush bits */ #define BRW_MI_GLOBAL_SNAPSHOT_RESET (1 << 3) #define MI_BATCH_BUFFER_END (0xA << 23) /* Noop */ #define MI_NOOP 0x00 #define MI_NOOP_WRITE_ID (1<<22) #define MI_NOOP_ID_MASK (1<<22 - 1) /* Wait for Events */ #define MI_WAIT_FOR_EVENT (0x03<<23) #define MI_WAIT_FOR_PIPEB_SVBLANK (1<<18) #define MI_WAIT_FOR_PIPEA_SVBLANK (1<<17) #define MI_WAIT_FOR_OVERLAY_FLIP (1<<16) #define MI_WAIT_FOR_PIPEB_VBLANK (1<<7) #define MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW (1<<5) #define MI_WAIT_FOR_PIPEA_VBLANK (1<<3) #define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW (1<<1) /* Set the scan line for MI_WAIT_FOR_PIPE?_SCAN_LINE_WINDOW */ #define MI_LOAD_SCAN_LINES_INCL (0x12<<23) #define MI_LOAD_SCAN_LINES_DISPLAY_PIPEA (0) #define MI_LOAD_SCAN_LINES_DISPLAY_PIPEB (0x1<<20) /* BLT commands */ #define BLT_WRITE_ALPHA (1<<21) #define BLT_WRITE_RGB (1<<20) #define BLT_SRC_TILED (1<<15) #define BLT_DST_TILED (1<<11) #define COLOR_BLT_CMD (2<<29|0x40<<22|(0x3)) #define XY_COLOR_BLT (2<<29|0x50<<22|(0x4)) #define XY_SETUP_BLT (2<<29|0x01<<22) #define XY_SETUP_MONO_PATTERN_SL_BLT (2<<29|0x11<<22) #define XY_SETUP_CLIP (2<<29|0x03<<22|1) #define XY_PIXEL_BLT (2<<29|0x24<<22) #define XY_SCANLINE_BLT (2<<29|0x25<<22|1) #define XY_TEXT_IMMEDIATE_BLT (2<<29|0x31<<22|(1<<16)) #define XY_SRC_COPY_BLT_CMD (2<<29|0x53<<22) #define SRC_COPY_BLT_CMD (2<<29|0x43<<22|0x4) #define XY_PAT_BLT (2<<29|0x51<<22) #define XY_PAT_BLT_IMMEDIATE (2<<29|0x72<<22) #define XY_MONO_PAT (2<<29|0x52<<22) #define XY_MONO_SRC_COPY (2<<29|0x54<<22) #define XY_MONO_SRC_COPY_IMM (2<<29|0x71<<22) #define XY_FULL_MONO_PATTERN_BLT (2<<29|0x57<<22) #define XY_FULL_MONO_PATTERN_MONO_SRC_BLT (2<<29|0x58<<22) /* FLUSH commands */ #define BRW_3D(Pipeline,Opcode,Subopcode) \ ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define PIPE_CONTROL BRW_3D(3, 2, 0) #define PIPE_CONTROL_NOWRITE (0 << 14) #define PIPE_CONTROL_WRITE_QWORD (1 << 14) #define PIPE_CONTROL_WRITE_DEPTH (2 << 14) #define PIPE_CONTROL_WRITE_TIME (3 << 14) #define PIPE_CONTROL_DEPTH_STALL (1 << 13) #define PIPE_CONTROL_WC_FLUSH (1 << 12) #define PIPE_CONTROL_IS_FLUSH (1 << 11) #define PIPE_CONTROL_TC_FLUSH (1 << 10) #define PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) #define PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) #endif xf86-video-intel-2.99.917/src/sna/sna_threads.c0000664000175000017500000002026612400044327015740 00000000000000/* * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Chris Wilson * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include #include #include #ifdef HAVE_VALGRIND #include static inline bool valgrind_active(void) { return RUNNING_ON_VALGRIND; } #else static inline bool valgrind_active(void) { return false; } #endif static int max_threads = -1; static struct thread { pthread_t thread; pthread_mutex_t mutex; pthread_cond_t cond; void (*func)(void *arg); void *arg; } *threads; static void *__run__(void *arg) { struct thread *t = arg; sigset_t signals; /* Disable all signals in the slave threads as X uses them for IO */ sigfillset(&signals); sigdelset(&signals, SIGBUS); sigdelset(&signals, SIGSEGV); pthread_sigmask(SIG_SETMASK, &signals, NULL); pthread_mutex_lock(&t->mutex); while (1) { while (t->func == NULL) pthread_cond_wait(&t->cond, &t->mutex); pthread_mutex_unlock(&t->mutex); assert(t->func); t->func(t->arg); pthread_mutex_lock(&t->mutex); t->arg = NULL; t->func = NULL; pthread_cond_signal(&t->cond); } pthread_mutex_unlock(&t->mutex); return NULL; } #if defined(__GNUC__) #define popcount(x) __builtin_popcount(x) #else static int popcount(unsigned int x) { int count = 0; while (x) { count += x&1; x >>= 1; } return count; } #endif static int num_cores(void) { FILE *file = fopen("/proc/cpuinfo", "r"); int count = 0; if (file) { size_t len = 0; char *line = NULL; uint32_t processors = 0, cores = 0; while (getline(&line, &len, file) != -1) { int id; if (sscanf(line, "physical id : %d", &id) == 1) { if (id >= 32) continue; processors |= 1 << id; } else if (sscanf(line, "core id : %d", &id) == 1) { if (id >= 32) continue; cores |= 1 << id; } } free(line); fclose(file); DBG(("%s: processors=0x%08x, cores=0x%08x\n", __FUNCTION__, processors, cores)); count = popcount(processors) * popcount(cores); } return count; } void sna_threads_init(void) { int n; if (max_threads != -1) return; if (valgrind_active()) goto bail; max_threads = num_cores(); if (max_threads == 0) max_threads = sysconf(_SC_NPROCESSORS_ONLN) / 2; if (max_threads <= 1) goto bail; DBG(("%s: creating a thread pool of %d threads\n", __func__, max_threads)); threads = malloc (sizeof(threads[0])*max_threads); if (threads == NULL) goto bail; for (n = 1; n < max_threads; n++) { pthread_mutex_init(&threads[n].mutex, NULL); pthread_cond_init(&threads[n].cond, NULL); threads[n].func = NULL; threads[n].arg = NULL; if (pthread_create(&threads[n].thread, NULL, __run__, &threads[n])) goto bail; } threads[0].thread = pthread_self(); return; bail: max_threads = 0; } void sna_threads_run(int id, void (*func)(void *arg), void *arg) { assert(max_threads > 0); assert(pthread_self() == threads[0].thread); assert(id > 0 && id < max_threads); assert(threads[id].func == NULL); pthread_mutex_lock(&threads[id].mutex); threads[id].func = func; threads[id].arg = arg; pthread_cond_signal(&threads[id].cond); pthread_mutex_unlock(&threads[id].mutex); } void sna_threads_trap(int sig) { pthread_t t = pthread_self(); int n; if (max_threads == 0) return; if (t == threads[0].thread) return; for (n = 1; threads[n].thread != t; n++) ; ERR(("%s: thread[%d] caught signal %d\n", __func__, n, sig)); pthread_mutex_lock(&threads[n].mutex); threads[n].arg = (void *)(intptr_t)sig; threads[n].func = NULL; pthread_cond_signal(&threads[n].cond); pthread_mutex_unlock(&threads[n].mutex); pthread_exit(&sig); } void sna_threads_wait(void) { int n; assert(max_threads > 0); assert(pthread_self() == threads[0].thread); for (n = 1; n < max_threads; n++) { if (threads[n].func != NULL) { pthread_mutex_lock(&threads[n].mutex); while (threads[n].func) pthread_cond_wait(&threads[n].cond, &threads[n].mutex); pthread_mutex_unlock(&threads[n].mutex); } if (threads[n].arg != NULL) { DBG(("%s: thread[%d] died from signal %d\n", __func__, n, (int)(intptr_t)threads[n].arg)); sna_threads_kill(); return; } } } void sna_threads_kill(void) { int n; ERR(("%s: kill %d threads\n", __func__, max_threads)); assert(max_threads > 0); assert(pthread_self() == threads[0].thread); for (n = 1; n < max_threads; n++) pthread_cancel(threads[n].thread); for (n = 1; n < max_threads; n++) pthread_join(threads[n].thread, NULL); max_threads = 0; } int sna_use_threads(int width, int height, int threshold) { int num_threads; if (max_threads <= 0) return 1; if (height <= 1) return 1; if (width < 128) height /= 128/width; num_threads = height * max_threads / threshold - 1; if (num_threads <= 0) return 1; if (num_threads > max_threads) num_threads = max_threads; if (num_threads > height) num_threads = height; return num_threads; } struct thread_composite { pixman_image_t *src, *mask, *dst; pixman_op_t op; int16_t src_x, src_y; int16_t mask_x, mask_y; int16_t dst_x, dst_y; uint16_t width, height; }; static void thread_composite(void *arg) { struct thread_composite *t = arg; pixman_image_composite(t->op, t->src, t->mask, t->dst, t->src_x, t->src_y, t->mask_x, t->mask_y, t->dst_x, t->dst_y, t->width, t->height); } void sna_image_composite(pixman_op_t op, pixman_image_t *src, pixman_image_t *mask, pixman_image_t *dst, int16_t src_x, int16_t src_y, int16_t mask_x, int16_t mask_y, int16_t dst_x, int16_t dst_y, uint16_t width, uint16_t height) { int num_threads; num_threads = sna_use_threads(width, height, 32); if (num_threads <= 1) { if (sigtrap_get() == 0) { pixman_image_composite(op, src, mask, dst, src_x, src_y, mask_x, mask_y, dst_x, dst_y, width, height); sigtrap_put(); } } else { struct thread_composite data[num_threads]; int y, dy, n; DBG(("%s: using %d threads for compositing %dx%d\n", __FUNCTION__, num_threads, width, height)); y = dst_y; dy = (height + num_threads - 1) / num_threads; num_threads -= (num_threads-1) * dy >= height; data[0].op = op; data[0].src = src; data[0].mask = mask; data[0].dst = dst; data[0].src_x = src_x; data[0].src_y = src_y; data[0].mask_x = mask_x; data[0].mask_y = mask_y; data[0].dst_x = dst_x; data[0].dst_y = y; data[0].width = width; data[0].height = dy; if (sigtrap_get() == 0) { for (n = 1; n < num_threads; n++) { data[n] = data[0]; data[n].src_y += y - dst_y; data[n].mask_y += y - dst_y; data[n].dst_y = y; y += dy; sna_threads_run(n, thread_composite, &data[n]); } assert(y < dst_y + height); if (y + dy > dst_y + height) dy = dst_y + height - y; data[0].src_y += y - dst_y; data[0].mask_y += y - dst_y; data[0].dst_y = y; data[0].height = dy; thread_composite(&data[0]); sna_threads_wait(); sigtrap_put(); } else sna_threads_kill(); } } xf86-video-intel-2.99.917/src/sna/sna_damage.c0000664000175000017500000013250112400044327015520 00000000000000/************************************************************************** Copyright (c) 2011 Intel Corporation Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. **************************************************************************/ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include "sna.h" #include "sna_damage.h" /* * sna_damage is a batching layer on top of the regular pixman_region_t. * It is required as the ever-growing accumulation of invidual small * damage regions is an O(n^2) operation. Instead the accumulation of a * batch can be done in closer to O(n.lgn), and so prevents abysmal * performance in x11perf -copywinwin10. * * As with the core of SNA, damage is handled modally. That is, it * accumulates whilst rendering and then subtracts during migration of the * pixmap from GPU to CPU or vice versa. As such we can track the current * mode globally and when that mode switches perform the update of the region * in a single operation. * * Furthermore, we can track whether the whole pixmap is damaged and so * cheapy discard no-ops. */ struct sna_damage_box { struct list list; int size; } __attribute__((packed)); static struct sna_damage *__freed_damage; static inline bool region_is_singular(const RegionRec *r) { return r->data == NULL; } static inline bool region_is_singular_or_empty(const RegionRec *r) { return r->data == NULL || r->data->numRects == 0; } #if HAS_DEBUG_FULL static const char *_debug_describe_region(char *buf, int max, const RegionRec *region) { const BoxRec *box; int n, len; if (region == NULL) return "nil"; n = region_num_rects(region); if (n == 0) return "[0]"; if (n == 1) { sprintf(buf, "[(%d, %d), (%d, %d)]", region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2); return buf; } len = sprintf(buf, "[(%d, %d), (%d, %d) x %d: ", region->extents.x1, region->extents.y1, region->extents.x2, region->extents.y2, n) + 3; max -= 2; box = region_rects(region); while (n--) { char tmp[80]; int this; this = snprintf(tmp, sizeof(tmp), "((%d, %d), (%d, %d))%s", box->x1, box->y1, box->x2, box->y2, n ? ", ..." : ""); box++; if (this > max - len) break; len -= 3; memcpy(buf + len, tmp, this); len += this; } buf[len++] = ']'; buf[len] = '\0'; return buf; } static const char *_debug_describe_damage(char *buf, int max, const struct sna_damage *damage) { char damage_str[500], region_str[500]; int str_max; if (damage == NULL) return "None"; str_max = max/2 - 6; if (str_max > sizeof(damage_str)) str_max = sizeof(damage_str); if (damage->mode == DAMAGE_ALL) { snprintf(buf, max, "[[(%d, %d), (%d, %d)]: all]", damage->extents.x1, damage->extents.y1, damage->extents.x2, damage->extents.y2); } else { if (damage->dirty) { sprintf(damage_str, "%c[ ...]", damage->mode == DAMAGE_SUBTRACT ? '-' : '+'); } else damage_str[0] = '\0'; snprintf(buf, max, "[[(%d, %d), (%d, %d)]: %s %s]%c", damage->extents.x1, damage->extents.y1, damage->extents.x2, damage->extents.y2, _debug_describe_region(region_str, str_max, &damage->region), damage_str, damage->dirty ? '*' : ' '); } return buf; } #endif static struct sna_damage_box * last_box(struct sna_damage *damage) { return list_entry(damage->embedded_box.list.prev, struct sna_damage_box, list); } static void reset_embedded_box(struct sna_damage *damage) { damage->dirty = false; damage->box = damage->embedded_box.box; damage->embedded_box.size = damage->remain = ARRAY_SIZE(damage->embedded_box.box); list_init(&damage->embedded_box.list); } static void reset_extents(struct sna_damage *damage) { damage->extents.x1 = damage->extents.y1 = MAXSHORT; damage->extents.x2 = damage->extents.y2 = MINSHORT; } static struct sna_damage *_sna_damage_create(void) { struct sna_damage *damage; if (__freed_damage) { damage = __freed_damage; __freed_damage = *(void **)__freed_damage; } else { damage = malloc(sizeof(*damage)); if (damage == NULL) return NULL; } reset_embedded_box(damage); damage->mode = DAMAGE_ADD; pixman_region_init(&damage->region); reset_extents(damage); return damage; } struct sna_damage *sna_damage_create(void) { return _sna_damage_create(); } static void free_list(struct list *head) { while (!list_is_empty(head)) { struct list *l = head->next; list_del(l); free(l); } } static void __sna_damage_reduce(struct sna_damage *damage) { int n, nboxes; BoxPtr boxes, free_boxes = NULL; pixman_region16_t *region = &damage->region; struct sna_damage_box *iter; assert(damage->mode != DAMAGE_ALL); assert(damage->dirty); DBG((" reduce: before region.n=%d\n", region_num_rects(region))); nboxes = damage->embedded_box.size; list_for_each_entry(iter, &damage->embedded_box.list, list) nboxes += iter->size; DBG((" nboxes=%d, residual=%d\n", nboxes, damage->remain)); nboxes -= damage->remain; if (nboxes == 0) goto done; if (nboxes == 1) { pixman_region16_t tmp; tmp.extents = damage->embedded_box.box[0]; tmp.data = NULL; if (damage->mode == DAMAGE_ADD) pixman_region_union(region, region, &tmp); else pixman_region_subtract(region, region, &tmp); damage->extents = region->extents; goto done; } if (damage->mode == DAMAGE_ADD) nboxes += region_num_rects(region); iter = last_box(damage); n = iter->size - damage->remain; boxes = (BoxRec *)(iter+1); DBG((" last box count=%d/%d, need=%d\n", n, iter->size, nboxes)); if (nboxes > iter->size) { boxes = malloc(sizeof(BoxRec)*nboxes); if (boxes == NULL) goto done; free_boxes = boxes; } if (boxes != damage->embedded_box.box) { if (list_is_empty(&damage->embedded_box.list)) { DBG((" copying embedded boxes\n")); memcpy(boxes, damage->embedded_box.box, n*sizeof(BoxRec)); } else { if (boxes != (BoxPtr)(iter+1)) { DBG((" copying %d boxes from last\n", n)); memcpy(boxes, iter+1, n*sizeof(BoxRec)); } iter = list_entry(iter->list.prev, struct sna_damage_box, list); while (&iter->list != &damage->embedded_box.list) { DBG((" copy %d boxes from %d\n", iter->size, n)); memcpy(boxes + n, iter+1, iter->size * sizeof(BoxRec)); n += iter->size; iter = list_entry(iter->list.prev, struct sna_damage_box, list); } DBG((" copying embedded boxes to %d\n", n)); memcpy(boxes + n, damage->embedded_box.box, sizeof(damage->embedded_box.box)); n += damage->embedded_box.size; } } if (damage->mode == DAMAGE_ADD) { memcpy(boxes + n, region_rects(region), region_num_rects(region)*sizeof(BoxRec)); assert(n + region_num_rects(region) == nboxes); pixman_region_fini(region); pixman_region_init_rects(region, boxes, nboxes); assert(pixman_region_not_empty(region)); assert(damage->extents.x1 == region->extents.x1 && damage->extents.y1 == region->extents.y1 && damage->extents.x2 == region->extents.x2 && damage->extents.y2 == region->extents.y2); } else { pixman_region16_t tmp; assert(n == nboxes); pixman_region_init_rects(&tmp, boxes, nboxes); pixman_region_subtract(region, region, &tmp); pixman_region_fini(&tmp); assert(damage->extents.x1 <= region->extents.x1 && damage->extents.y1 <= region->extents.y1 && damage->extents.x2 >= region->extents.x2 && damage->extents.y2 >= region->extents.y2); if (pixman_region_not_empty(region)) damage->extents = region->extents; else reset_extents(damage); } free(free_boxes); done: damage->mode = DAMAGE_ADD; free_list(&damage->embedded_box.list); reset_embedded_box(damage); DBG((" reduce: after region.n=%d\n", region_num_rects(region))); } static bool _sna_damage_create_boxes(struct sna_damage *damage, int count) { struct sna_damage_box *box; int n; box = last_box(damage); n = 4*box->size; if (n < count) n = ALIGN(count, 64); DBG((" %s(%d->%d): new\n", __FUNCTION__, count, n)); if (n >= (INT_MAX - sizeof(*box)) / sizeof(BoxRec)) return false; box = malloc(sizeof(*box) + sizeof(BoxRec)*n); if (box == NULL) return false; list_add_tail(&box->list, &damage->embedded_box.list); box->size = damage->remain = n; damage->box = (BoxRec *)(box + 1); return true; } static struct sna_damage * _sna_damage_create_elt(struct sna_damage *damage, const BoxRec *boxes, int count) { int n; DBG((" %s: prev=(remain %d), count=%d\n", __FUNCTION__, damage->remain, count)); assert(count); restart: n = count; if (n > damage->remain) n = damage->remain; if (n) { memcpy(damage->box, boxes, n * sizeof(BoxRec)); damage->box += n; damage->remain -= n; damage->dirty = true; count -= n; boxes += n; if (count == 0) return damage; } DBG((" %s(): new elt\n", __FUNCTION__)); assert(damage->remain == 0); assert(damage->box - (BoxRec *)(last_box(damage)+1) == last_box(damage)->size); if (!_sna_damage_create_boxes(damage, count)) { unsigned mode; if (!damage->dirty) return damage; mode = damage->mode; __sna_damage_reduce(damage); damage->mode = mode; goto restart; } memcpy(damage->box, boxes, count * sizeof(BoxRec)); damage->box += count; damage->remain -= count; damage->dirty = true; assert(damage->remain >= 0); return damage; } static struct sna_damage * _sna_damage_create_elt_from_boxes(struct sna_damage *damage, const BoxRec *boxes, int count, int16_t dx, int16_t dy) { int i, n; DBG((" %s: prev=(remain %d)\n", __FUNCTION__, damage->remain)); assert(count); restart: n = count; if (n > damage->remain) n = damage->remain; if (n) { for (i = 0; i < n; i++) { damage->box[i].x1 = boxes[i].x1 + dx; damage->box[i].x2 = boxes[i].x2 + dx; damage->box[i].y1 = boxes[i].y1 + dy; damage->box[i].y2 = boxes[i].y2 + dy; } damage->box += n; damage->remain -= n; damage->dirty = true; count -= n; boxes += n; if (count == 0) return damage; } DBG((" %s(): new elt\n", __FUNCTION__)); assert(damage->remain == 0); assert(damage->box - (BoxRec *)(last_box(damage)+1) == last_box(damage)->size); if (!_sna_damage_create_boxes(damage, count)) { unsigned mode; if (!damage->dirty) return damage; mode = damage->mode; __sna_damage_reduce(damage); damage->mode = mode; goto restart; } for (i = 0; i < count; i++) { damage->box[i].x1 = boxes[i].x1 + dx; damage->box[i].x2 = boxes[i].x2 + dx; damage->box[i].y1 = boxes[i].y1 + dy; damage->box[i].y2 = boxes[i].y2 + dy; } damage->box += count; damage->remain -= count; damage->dirty = true; assert(damage->remain >= 0); return damage; } static struct sna_damage * _sna_damage_create_elt_from_rectangles(struct sna_damage *damage, const xRectangle *r, int count, int16_t dx, int16_t dy) { int i, n; DBG((" %s: prev=(remain %d), count=%d\n", __FUNCTION__, damage->remain, count)); assert(count); restart: n = count; if (n > damage->remain) n = damage->remain; if (n) { for (i = 0; i < n; i++) { damage->box[i].x1 = r[i].x + dx; damage->box[i].x2 = damage->box[i].x1 + r[i].width; damage->box[i].y1 = r[i].y + dy; damage->box[i].y2 = damage->box[i].y1 + r[i].height; } damage->box += n; damage->remain -= n; damage->dirty = true; count -= n; r += n; if (count == 0) return damage; } DBG((" %s(): new elt\n", __FUNCTION__)); assert(damage->remain == 0); assert(damage->box - (BoxRec *)(last_box(damage)+1) == last_box(damage)->size); if (!_sna_damage_create_boxes(damage, count)) { unsigned mode; if (!damage->dirty) return damage; mode = damage->mode; __sna_damage_reduce(damage); damage->mode = mode; goto restart; } for (i = 0; i < count; i++) { damage->box[i].x1 = r[i].x + dx; damage->box[i].x2 = damage->box[i].x1 + r[i].width; damage->box[i].y1 = r[i].y + dy; damage->box[i].y2 = damage->box[i].y1 + r[i].height; } damage->box += count; damage->remain -= count; damage->dirty = true; assert(damage->remain >= 0); return damage; } static struct sna_damage * _sna_damage_create_elt_from_points(struct sna_damage *damage, const DDXPointRec *p, int count, int16_t dx, int16_t dy) { int i, n; DBG((" %s: prev=(remain %d), count=%d\n", __FUNCTION__, damage->remain, count)); assert(count); restart: n = count; if (n > damage->remain) n = damage->remain; if (n) { for (i = 0; i < n; i++) { damage->box[i].x1 = p[i].x + dx; damage->box[i].x2 = damage->box[i].x1 + 1; damage->box[i].y1 = p[i].y + dy; damage->box[i].y2 = damage->box[i].y1 + 1; } damage->box += n; damage->remain -= n; damage->dirty = true; count -= n; p += n; if (count == 0) return damage; } DBG((" %s(): new elt\n", __FUNCTION__)); assert(damage->remain == 0); assert(damage->box - (BoxRec *)(last_box(damage)+1) == last_box(damage)->size); if (!_sna_damage_create_boxes(damage, count)) { unsigned mode; if (!damage->dirty) return damage; mode = damage->mode; __sna_damage_reduce(damage); damage->mode = mode; goto restart; } for (i = 0; i < count; i++) { damage->box[i].x1 = p[i].x + dx; damage->box[i].x2 = damage->box[i].x1 + 1; damage->box[i].y1 = p[i].y + dy; damage->box[i].y2 = damage->box[i].y1 + 1; } damage->box += count; damage->remain -= count; damage->dirty = true; assert(damage->remain >= 0); return damage; } static void damage_union(struct sna_damage *damage, const BoxRec *box) { DBG(("%s: extending damage (%d, %d), (%d, %d) by (%d, %d), (%d, %d)\n", __FUNCTION__, damage->extents.x1, damage->extents.y1, damage->extents.x2, damage->extents.y2, box->x1, box->y1, box->x2, box->y2)); assert(box->x2 > box->x1 && box->y2 > box->y1); if (damage->extents.x2 < damage->extents.x1) { damage->extents = *box; } else { if (damage->extents.x1 > box->x1) damage->extents.x1 = box->x1; if (damage->extents.x2 < box->x2) damage->extents.x2 = box->x2; if (damage->extents.y1 > box->y1) damage->extents.y1 = box->y1; if (damage->extents.y2 < box->y2) damage->extents.y2 = box->y2; } assert(damage->extents.x2 > damage->extents.x1); assert(damage->extents.y2 > damage->extents.y1); } static void _pixman_region_union_box(RegionRec *region, const BoxRec *box) { RegionRec u = { *box, NULL }; pixman_region_union(region, region, &u); } static bool box_contains_region(const BoxRec *b, const RegionRec *r) { return (b->x1 <= r->extents.x1 && b->x2 >= r->extents.x2 && b->y1 <= r->extents.y1 && b->y2 >= r->extents.y2); } static struct sna_damage *__sna_damage_add_box(struct sna_damage *damage, const BoxRec *box) { if (box->y2 <= box->y1 || box->x2 <= box->x1) return damage; if (!damage) { damage = _sna_damage_create(); if (damage == NULL) return NULL; } else switch (damage->mode) { case DAMAGE_ALL: return damage; case DAMAGE_SUBTRACT: __sna_damage_reduce(damage); case DAMAGE_ADD: break; } if (region_is_singular_or_empty(&damage->region) || box_contains_region(box, &damage->region)) { _pixman_region_union_box(&damage->region, box); assert(damage->region.extents.x2 > damage->region.extents.x1); assert(damage->region.extents.y2 > damage->region.extents.y1); damage_union(damage, box); return damage; } if (pixman_region_contains_rectangle(&damage->region, (BoxPtr)box) == PIXMAN_REGION_IN) return damage; damage_union(damage, box); return _sna_damage_create_elt(damage, box, 1); } inline static struct sna_damage *__sna_damage_add(struct sna_damage *damage, RegionPtr region) { assert(RegionNotEmpty(region)); if (!damage) { damage = _sna_damage_create(); if (damage == NULL) return NULL; } else switch (damage->mode) { case DAMAGE_ALL: return damage; case DAMAGE_SUBTRACT: __sna_damage_reduce(damage); case DAMAGE_ADD: break; } if (region_is_singular(region)) return __sna_damage_add_box(damage, ®ion->extents); if (region_is_singular_or_empty(&damage->region)) { pixman_region_union(&damage->region, &damage->region, region); assert(damage->region.extents.x2 > damage->region.extents.x1); assert(damage->region.extents.y2 > damage->region.extents.y1); damage_union(damage, ®ion->extents); return damage; } if (pixman_region_contains_rectangle(&damage->region, ®ion->extents) == PIXMAN_REGION_IN) return damage; damage_union(damage, ®ion->extents); return _sna_damage_create_elt(damage, region_rects(region), region_num_rects(region)); } #if HAS_DEBUG_FULL fastcall struct sna_damage *_sna_damage_add(struct sna_damage *damage, RegionPtr region) { char region_buf[120]; char damage_buf[1000]; DBG(("%s(%s + %s)\n", __FUNCTION__, _debug_describe_damage(damage_buf, sizeof(damage_buf), damage), _debug_describe_region(region_buf, sizeof(region_buf), region))); damage = __sna_damage_add(damage, region); DBG((" = %s\n", _debug_describe_damage(damage_buf, sizeof(damage_buf), damage))); assert(region_num_rects(&damage->region)); assert(damage->region.extents.x2 > damage->region.extents.x1); assert(damage->region.extents.y2 > damage->region.extents.y1); return damage; } #else fastcall struct sna_damage *_sna_damage_add(struct sna_damage *damage, RegionPtr region) { return __sna_damage_add(damage, region); } #endif inline static struct sna_damage * __sna_damage_add_boxes(struct sna_damage *damage, const BoxRec *box, int n, int16_t dx, int16_t dy) { BoxRec extents; int i; assert(n); if (!damage) { damage = _sna_damage_create(); if (damage == NULL) return NULL; } else switch (damage->mode) { case DAMAGE_ALL: return damage; case DAMAGE_SUBTRACT: __sna_damage_reduce(damage); case DAMAGE_ADD: break; } assert(box[0].x2 > box[0].x1 && box[0].y2 > box[0].y1); extents = box[0]; for (i = 1; i < n; i++) { assert(box[i].x2 > box[i].x1 && box[i].y2 > box[i].y1); if (extents.x1 > box[i].x1) extents.x1 = box[i].x1; if (extents.x2 < box[i].x2) extents.x2 = box[i].x2; if (extents.y1 > box[i].y1) extents.y1 = box[i].y1; if (extents.y2 < box[i].y2) extents.y2 = box[i].y2; } assert(extents.y2 > extents.y1 && extents.x2 > extents.x1); extents.x1 += dx; extents.x2 += dx; extents.y1 += dy; extents.y2 += dy; if (n == 1) return __sna_damage_add_box(damage, &extents); if (pixman_region_contains_rectangle(&damage->region, &extents) == PIXMAN_REGION_IN) return damage; damage_union(damage, &extents); return _sna_damage_create_elt_from_boxes(damage, box, n, dx, dy); } #if HAS_DEBUG_FULL struct sna_damage *_sna_damage_add_boxes(struct sna_damage *damage, const BoxRec *b, int n, int16_t dx, int16_t dy) { char damage_buf[1000]; DBG(("%s(%s + [(%d, %d), (%d, %d) ... x %d])\n", __FUNCTION__, _debug_describe_damage(damage_buf, sizeof(damage_buf), damage), b->x1, b->y1, b->x2, b->y2, n)); damage = __sna_damage_add_boxes(damage, b, n, dx, dy); DBG((" = %s\n", _debug_describe_damage(damage_buf, sizeof(damage_buf), damage))); if (region_num_rects(&damage->region)) { assert(damage->region.extents.x2 > damage->region.extents.x1); assert(damage->region.extents.y2 > damage->region.extents.y1); } return damage; } #else struct sna_damage *_sna_damage_add_boxes(struct sna_damage *damage, const BoxRec *b, int n, int16_t dx, int16_t dy) { return __sna_damage_add_boxes(damage, b, n, dx, dy); } #endif inline static struct sna_damage * __sna_damage_add_rectangles(struct sna_damage *damage, const xRectangle *r, int n, int16_t dx, int16_t dy) { BoxRec extents; int i; assert(n); assert(r[0].width && r[0].height); extents.x1 = r[0].x; extents.x2 = r[0].x + r[0].width; extents.y1 = r[0].y; extents.y2 = r[0].y + r[0].height; for (i = 1; i < n; i++) { assert(r[i].width && r[i].height); if (extents.x1 > r[i].x) extents.x1 = r[i].x; if (extents.x2 < r[i].x + r[i].width) extents.x2 = r[i].x + r[i].width; if (extents.y1 > r[i].y) extents.y1 = r[i].y; if (extents.y2 < r[i].y + r[i].height) extents.y2 = r[i].y + r[i].height; } assert(extents.y2 > extents.y1 && extents.x2 > extents.x1); extents.x1 += dx; extents.x2 += dx; extents.y1 += dy; extents.y2 += dy; if (n == 1) return __sna_damage_add_box(damage, &extents); if (!damage) { damage = _sna_damage_create(); if (damage == NULL) return NULL; } else switch (damage->mode) { case DAMAGE_ALL: return damage; case DAMAGE_SUBTRACT: __sna_damage_reduce(damage); case DAMAGE_ADD: break; } if (pixman_region_contains_rectangle(&damage->region, &extents) == PIXMAN_REGION_IN) return damage; damage_union(damage, &extents); return _sna_damage_create_elt_from_rectangles(damage, r, n, dx, dy); } #if HAS_DEBUG_FULL struct sna_damage *_sna_damage_add_rectangles(struct sna_damage *damage, const xRectangle *r, int n, int16_t dx, int16_t dy) { char damage_buf[1000]; DBG(("%s(%s + [(%d, %d)x(%d, %d) ... x %d])\n", __FUNCTION__, _debug_describe_damage(damage_buf, sizeof(damage_buf), damage), r->x, r->y, r->width, r->height, n)); damage = __sna_damage_add_rectangles(damage, r, n, dx, dy); DBG((" = %s\n", _debug_describe_damage(damage_buf, sizeof(damage_buf), damage))); if (region_num_rects(&damage->region)) { assert(damage->region.extents.x2 > damage->region.extents.x1); assert(damage->region.extents.y2 > damage->region.extents.y1); } return damage; } #else struct sna_damage *_sna_damage_add_rectangles(struct sna_damage *damage, const xRectangle *r, int n, int16_t dx, int16_t dy) { return __sna_damage_add_rectangles(damage, r, n, dx, dy); } #endif /* XXX pass in extents? */ inline static struct sna_damage * __sna_damage_add_points(struct sna_damage *damage, const DDXPointRec *p, int n, int16_t dx, int16_t dy) { BoxRec extents; int i; assert(n); extents.x2 = extents.x1 = p[0].x; extents.y2 = extents.y1 = p[0].y; for (i = 1; i < n; i++) { if (extents.x1 > p[i].x) extents.x1 = p[i].x; else if (extents.x2 < p[i].x) extents.x2 = p[i].x; if (extents.y1 > p[i].y) extents.y1 = p[i].y; else if (extents.y2 < p[i].y) extents.y2 = p[i].y; } extents.x1 += dx; extents.x2 += dx + 1; extents.y1 += dy; extents.y2 += dy + 1; if (n == 1) return __sna_damage_add_box(damage, &extents); if (!damage) { damage = _sna_damage_create(); if (damage == NULL) return NULL; } else switch (damage->mode) { case DAMAGE_ALL: return damage; case DAMAGE_SUBTRACT: __sna_damage_reduce(damage); case DAMAGE_ADD: break; } if (pixman_region_contains_rectangle(&damage->region, &extents) == PIXMAN_REGION_IN) return damage; damage_union(damage, &extents); return _sna_damage_create_elt_from_points(damage, p, n, dx, dy); } #if HAS_DEBUG_FULL struct sna_damage *_sna_damage_add_points(struct sna_damage *damage, const DDXPointRec *p, int n, int16_t dx, int16_t dy) { char damage_buf[1000]; DBG(("%s(%s + [(%d, %d) ... x %d])\n", __FUNCTION__, _debug_describe_damage(damage_buf, sizeof(damage_buf), damage), p->x, p->y, n)); damage = __sna_damage_add_points(damage, p, n, dx, dy); DBG((" = %s\n", _debug_describe_damage(damage_buf, sizeof(damage_buf), damage))); if (region_num_rects(&damage->region)) { assert(damage->region.extents.x2 > damage->region.extents.x1); assert(damage->region.extents.y2 > damage->region.extents.y1); } return damage; } #else struct sna_damage *_sna_damage_add_points(struct sna_damage *damage, const DDXPointRec *p, int n, int16_t dx, int16_t dy) { return __sna_damage_add_points(damage, p, n, dx, dy); } #endif #if HAS_DEBUG_FULL fastcall struct sna_damage *_sna_damage_add_box(struct sna_damage *damage, const BoxRec *box) { char damage_buf[1000]; DBG(("%s(%s + [(%d, %d), (%d, %d)])\n", __FUNCTION__, _debug_describe_damage(damage_buf, sizeof(damage_buf), damage), box->x1, box->y1, box->x2, box->y2)); damage = __sna_damage_add_box(damage, box); DBG((" = %s\n", _debug_describe_damage(damage_buf, sizeof(damage_buf), damage))); assert(region_num_rects(&damage->region)); assert(damage->region.extents.x2 > damage->region.extents.x1); assert(damage->region.extents.y2 > damage->region.extents.y1); return damage; } #else fastcall struct sna_damage *_sna_damage_add_box(struct sna_damage *damage, const BoxRec *box) { return __sna_damage_add_box(damage, box); } #endif struct sna_damage *__sna_damage_all(struct sna_damage *damage, int width, int height) { DBG(("%s(%d, %d)\n", __FUNCTION__, width, height)); if (damage) { pixman_region_fini(&damage->region); free_list(&damage->embedded_box.list); reset_embedded_box(damage); } else { damage = _sna_damage_create(); if (damage == NULL) return NULL; } pixman_region_init_rect(&damage->region, 0, 0, width, height); damage->extents = damage->region.extents; damage->mode = DAMAGE_ALL; return damage; } struct sna_damage *_sna_damage_is_all(struct sna_damage *damage, int width, int height) { DBG(("%s(%d, %d)%s?\n", __FUNCTION__, width, height, damage->dirty ? "*" : "")); DBG(("%s: (%d, %d), (%d, %d)\n", __FUNCTION__, damage->extents.x1, damage->extents.y1, damage->extents.x2, damage->extents.y2)); assert(damage->mode == DAMAGE_ADD); assert(damage->extents.x1 == 0 && damage->extents.y1 == 0 && damage->extents.x2 == width && damage->extents.y2 == height); if (damage->dirty) { __sna_damage_reduce(damage); assert(RegionNotEmpty(&damage->region)); } if (damage->region.data) { DBG(("%s: no, not singular\n", __FUNCTION__)); return damage; } assert(damage->extents.x1 == 0 && damage->extents.y1 == 0 && damage->extents.x2 == width && damage->extents.y2 == height); return __sna_damage_all(damage, width, height); } static bool box_contains(const BoxRec *a, const BoxRec *b) { if (b->x1 < a->x1 || b->x2 > a->x2) return false; if (b->y1 < a->y1 || b->y2 > a->y2) return false; return true; } static struct sna_damage *__sna_damage_subtract(struct sna_damage *damage, RegionPtr region) { if (damage == NULL) return NULL; if (RegionNil(&damage->region)) { no_damage: __sna_damage_destroy(damage); return NULL; } assert(RegionNotEmpty(region)); if (!sna_damage_overlaps_box(damage, ®ion->extents)) return damage; if (region_is_singular(region) && box_contains(®ion->extents, &damage->extents)) goto no_damage; if (damage->mode == DAMAGE_ALL) { pixman_region_subtract(&damage->region, &damage->region, region); if (damage->region.extents.x2 <= damage->region.extents.x1 || damage->region.extents.y2 <= damage->region.extents.y1) goto no_damage; damage->extents = damage->region.extents; damage->mode = DAMAGE_ADD; return damage; } if (damage->mode != DAMAGE_SUBTRACT) { if (damage->dirty) { __sna_damage_reduce(damage); assert(RegionNotEmpty(&damage->region)); } if (pixman_region_equal(region, &damage->region)) goto no_damage; if (region_is_singular(&damage->region) && region_is_singular(region)) { pixman_region_subtract(&damage->region, &damage->region, region); if (damage->region.extents.x2 <= damage->region.extents.x1 || damage->region.extents.y2 <= damage->region.extents.y1) goto no_damage; damage->extents = damage->region.extents; assert(pixman_region_not_empty(&damage->region)); return damage; } damage->mode = DAMAGE_SUBTRACT; } return _sna_damage_create_elt(damage, region_rects(region), region_num_rects(region)); } #if HAS_DEBUG_FULL fastcall struct sna_damage *_sna_damage_subtract(struct sna_damage *damage, RegionPtr region) { char damage_buf[1000]; char region_buf[120]; DBG(("%s(%s - %s)...\n", __FUNCTION__, _debug_describe_damage(damage_buf, sizeof(damage_buf), damage), _debug_describe_region(region_buf, sizeof(region_buf), region))); damage = __sna_damage_subtract(damage, region); DBG((" = %s\n", _debug_describe_damage(damage_buf, sizeof(damage_buf), damage))); return damage; } #else fastcall struct sna_damage *_sna_damage_subtract(struct sna_damage *damage, RegionPtr region) { return __sna_damage_subtract(damage, region); } #endif inline static struct sna_damage *__sna_damage_subtract_box(struct sna_damage *damage, const BoxRec *box) { assert(box->x2 > box->x1 && box->y2 > box->y1); if (damage == NULL) return NULL; if (RegionNil(&damage->region)) { __sna_damage_destroy(damage); return NULL; } if (!sna_damage_overlaps_box(damage, box)) return damage; if (box_contains(box, &damage->extents)) { __sna_damage_destroy(damage); return NULL; } if (damage->mode != DAMAGE_SUBTRACT) { if (damage->dirty) { __sna_damage_reduce(damage); assert(RegionNotEmpty(&damage->region)); } if (region_is_singular(&damage->region)) { pixman_region16_t region; pixman_region_init_rects(®ion, box, 1); pixman_region_subtract(&damage->region, &damage->region, ®ion); damage->extents = damage->region.extents; damage->mode = DAMAGE_ADD; return damage; } damage->mode = DAMAGE_SUBTRACT; } return _sna_damage_create_elt(damage, box, 1); } #if HAS_DEBUG_FULL fastcall struct sna_damage *_sna_damage_subtract_box(struct sna_damage *damage, const BoxRec *box) { char damage_buf[1000]; DBG(("%s(%s - (%d, %d), (%d, %d))...\n", __FUNCTION__, _debug_describe_damage(damage_buf, sizeof(damage_buf), damage), box->x1, box->y1, box->x2, box->y2)); damage = __sna_damage_subtract_box(damage, box); DBG((" = %s\n", _debug_describe_damage(damage_buf, sizeof(damage_buf), damage))); return damage; } #else fastcall struct sna_damage *_sna_damage_subtract_box(struct sna_damage *damage, const BoxRec *box) { return __sna_damage_subtract_box(damage, box); } #endif static struct sna_damage *__sna_damage_subtract_boxes(struct sna_damage *damage, const BoxRec *box, int n, int dx, int dy) { BoxRec extents; int i; if (damage == NULL) return NULL; if (RegionNil(&damage->region)) { __sna_damage_destroy(damage); return NULL; } assert(n); assert(box[0].x2 > box[0].x1 && box[0].y2 > box[0].y1); extents = box[0]; for (i = 1; i < n; i++) { assert(box[i].x2 > box[i].x1 && box[i].y2 > box[i].y1); if (extents.x1 > box[i].x1) extents.x1 = box[i].x1; if (extents.x2 < box[i].x2) extents.x2 = box[i].x2; if (extents.y1 > box[i].y1) extents.y1 = box[i].y1; if (extents.y2 < box[i].y2) extents.y2 = box[i].y2; } assert(extents.y2 > extents.y1 && extents.x2 > extents.x1); extents.x1 += dx; extents.x2 += dx; extents.y1 += dy; extents.y2 += dy; if (!sna_damage_overlaps_box(damage, &extents)) return damage; if (n == 1) return __sna_damage_subtract_box(damage, &extents); if (damage->mode != DAMAGE_SUBTRACT) { if (damage->dirty) { __sna_damage_reduce(damage); assert(RegionNotEmpty(&damage->region)); } damage->mode = DAMAGE_SUBTRACT; } return _sna_damage_create_elt_from_boxes(damage, box, n, dx, dy); } #if HAS_DEBUG_FULL fastcall struct sna_damage *_sna_damage_subtract_boxes(struct sna_damage *damage, const BoxRec *box, int n, int dx, int dy) { char damage_buf[1000]; DBG(("%s(%s - [(%d,%d), (%d,%d)...x%d])...\n", __FUNCTION__, _debug_describe_damage(damage_buf, sizeof(damage_buf), damage), box->x1 + dx, box->y1 + dy, box->x2 + dx, box->y2 + dy, n)); damage = __sna_damage_subtract_boxes(damage, box, n, dx, dy); DBG((" = %s\n", _debug_describe_damage(damage_buf, sizeof(damage_buf), damage))); return damage; } #else fastcall struct sna_damage *_sna_damage_subtract_boxes(struct sna_damage *damage, const BoxRec *box, int n, int dx, int dy) { return __sna_damage_subtract_boxes(damage, box, n, dx, dy); } #endif static int __sna_damage_contains_box(struct sna_damage **_damage, const BoxRec *box) { struct sna_damage *damage = *_damage; const BoxRec *b; int n, count, ret; if (damage->mode == DAMAGE_ALL) return PIXMAN_REGION_IN; if (!sna_damage_overlaps_box(damage, box)) return PIXMAN_REGION_OUT; ret = pixman_region_contains_rectangle(&damage->region, (BoxPtr)box); if (!damage->dirty) return ret; if (damage->mode == DAMAGE_ADD) { if (ret == PIXMAN_REGION_IN) return ret; count = damage->embedded_box.size; if (list_is_empty(&damage->embedded_box.list)) count -= damage->remain; b = damage->embedded_box.box; for (n = 0; n < count; n++) { if (box_contains(&b[n], box)) return PIXMAN_REGION_IN; } } else { if (ret == PIXMAN_REGION_OUT) return ret; count = damage->embedded_box.size; if (list_is_empty(&damage->embedded_box.list)) count -= damage->remain; b = damage->embedded_box.box; for (n = 0; n < count; n++) { if (box_contains(&b[n], box)) return PIXMAN_REGION_OUT; } } __sna_damage_reduce(damage); if (!pixman_region_not_empty(&damage->region)) { __sna_damage_destroy(damage); *_damage = NULL; return PIXMAN_REGION_OUT; } return pixman_region_contains_rectangle(&damage->region, (BoxPtr)box); } #if HAS_DEBUG_FULL int _sna_damage_contains_box(struct sna_damage **damage, const BoxRec *box) { char damage_buf[1000]; int ret; DBG(("%s(%s, [(%d, %d), (%d, %d)])\n", __FUNCTION__, _debug_describe_damage(damage_buf, sizeof(damage_buf), *damage), box->x1, box->y1, box->x2, box->y2)); ret = __sna_damage_contains_box(damage, box); DBG((" = %d", ret)); if (ret) DBG((" [(%d, %d), (%d, %d)...]", box->x1, box->y1, box->x2, box->y2)); DBG(("\n")); return ret; } #else int _sna_damage_contains_box(struct sna_damage **damage, const BoxRec *box) { return __sna_damage_contains_box(damage, box); } #endif static bool box_overlaps(const BoxRec *a, const BoxRec *b) { return (a->x1 < b->x2 && a->x2 > b->x1 && a->y1 < b->y2 && a->y2 > b->y1); } bool _sna_damage_contains_box__no_reduce(const struct sna_damage *damage, const BoxRec *box) { int n, count; const BoxRec *b; assert(damage && damage->mode != DAMAGE_ALL); if (!box_contains(&damage->extents, box)) return false; n = pixman_region_contains_rectangle((pixman_region16_t *)&damage->region, (BoxPtr)box); if (!damage->dirty) return n == PIXMAN_REGION_IN; if (damage->mode == DAMAGE_ADD) { if (n == PIXMAN_REGION_IN) return true; count = damage->embedded_box.size; if (list_is_empty(&damage->embedded_box.list)) count -= damage->remain; b = damage->embedded_box.box; for (n = 0; n < count; n++) { if (box_contains(&b[n], box)) return true; } return false; } else { if (n != PIXMAN_REGION_IN) return false; if (!list_is_empty(&damage->embedded_box.list)) return false; count = damage->embedded_box.size - damage->remain; b = damage->embedded_box.box; for (n = 0; n < count; n++) { if (box_overlaps(&b[n], box)) return false; } return true; } } static bool __sna_damage_intersect(struct sna_damage *damage, RegionPtr region, RegionPtr result) { assert(damage && damage->mode != DAMAGE_ALL); assert(RegionNotEmpty(region)); if (region->extents.x2 <= damage->extents.x1 || region->extents.x1 >= damage->extents.x2) return false; if (region->extents.y2 <= damage->extents.y1 || region->extents.y1 >= damage->extents.y2) return false; if (damage->dirty) __sna_damage_reduce(damage); if (!pixman_region_not_empty(&damage->region)) return false; RegionNull(result); RegionIntersect(result, &damage->region, region); return RegionNotEmpty(result); } #if HAS_DEBUG_FULL bool _sna_damage_intersect(struct sna_damage *damage, RegionPtr region, RegionPtr result) { char damage_buf[1000]; char region_buf[120]; bool ret; DBG(("%s(%s, %s)...\n", __FUNCTION__, _debug_describe_damage(damage_buf, sizeof(damage_buf), damage), _debug_describe_region(region_buf, sizeof(region_buf), region))); ret = __sna_damage_intersect(damage, region, result); if (ret) DBG((" = %s\n", _debug_describe_region(region_buf, sizeof(region_buf), result))); else DBG((" = none\n")); return ret; } #else bool _sna_damage_intersect(struct sna_damage *damage, RegionPtr region, RegionPtr result) { return __sna_damage_intersect(damage, region, result); } #endif static int __sna_damage_get_boxes(struct sna_damage *damage, const BoxRec **boxes) { assert(damage && damage->mode != DAMAGE_ALL); if (damage->dirty) __sna_damage_reduce(damage); assert(!damage->dirty); assert(damage->mode == DAMAGE_ADD); *boxes = region_rects(&damage->region); return region_num_rects(&damage->region); } struct sna_damage *_sna_damage_reduce(struct sna_damage *damage) { DBG(("%s\n", __FUNCTION__)); __sna_damage_reduce(damage); assert(!damage->dirty); assert(damage->mode == DAMAGE_ADD); if (!pixman_region_not_empty(&damage->region)) { __sna_damage_destroy(damage); damage = NULL; } return damage; } #if HAS_DEBUG_FULL int _sna_damage_get_boxes(struct sna_damage *damage, const BoxRec **boxes) { char damage_buf[1000]; int count; DBG(("%s(%s)...\n", __FUNCTION__, _debug_describe_damage(damage_buf, sizeof(damage_buf), damage))); count = __sna_damage_get_boxes(damage, boxes); DBG((" = %d\n", count)); return count; } #else int _sna_damage_get_boxes(struct sna_damage *damage, const BoxRec **boxes) { return __sna_damage_get_boxes(damage, boxes); } #endif struct sna_damage *_sna_damage_combine(struct sna_damage *l, struct sna_damage *r, int dx, int dy) { if (r->dirty) __sna_damage_reduce(r); if (pixman_region_not_empty(&r->region)) { pixman_region_translate(&r->region, dx, dy); l = __sna_damage_add(l, &r->region); } return l; } void __sna_damage_destroy(struct sna_damage *damage) { free_list(&damage->embedded_box.list); pixman_region_fini(&damage->region); *(void **)damage = __freed_damage; __freed_damage = damage; } #if TEST_DAMAGE && HAS_DEBUG_FULL struct sna_damage_selftest{ int width, height; }; static void st_damage_init_random_box(struct sna_damage_selftest *test, BoxPtr box) { int x, y, w, h; if (test->width == 1) { x = 0, w = 1; } else { x = rand() % (test->width - 1); w = 1 + rand() % (test->width - x - 1); } if (test->height == 1) { y = 0, h = 1; } else { y = rand() % (test->height - 1); h = 1 + rand() % (test->height - y - 1); } box->x1 = x; box->x2 = x+w; box->y1 = y; box->y2 = y+h; } static void st_damage_init_random_region1(struct sna_damage_selftest *test, pixman_region16_t *region) { int x, y, w, h; if (test->width == 1) { x = 0, w = 1; } else { x = rand() % (test->width - 1); w = 1 + rand() % (test->width - x - 1); } if (test->height == 1) { y = 0, h = 1; } else { y = rand() % (test->height - 1); h = 1 + rand() % (test->height - y - 1); } pixman_region_init_rect(region, x, y, w, h); } static void st_damage_add(struct sna_damage_selftest *test, struct sna_damage **damage, pixman_region16_t *region) { pixman_region16_t tmp; st_damage_init_random_region1(test, &tmp); if (!DAMAGE_IS_ALL(*damage)) sna_damage_add(damage, &tmp); pixman_region_union(region, region, &tmp); } static void st_damage_add_box(struct sna_damage_selftest *test, struct sna_damage **damage, pixman_region16_t *region) { RegionRec r; st_damage_init_random_box(test, &r.extents); r.data = NULL; if (!DAMAGE_IS_ALL(*damage)) sna_damage_add_box(damage, &r.extents); pixman_region_union(region, region, &r); } static void st_damage_subtract(struct sna_damage_selftest *test, struct sna_damage **damage, pixman_region16_t *region) { pixman_region16_t tmp; st_damage_init_random_region1(test, &tmp); sna_damage_subtract(damage, &tmp); pixman_region_subtract(region, region, &tmp); } static void st_damage_subtract_box(struct sna_damage_selftest *test, struct sna_damage **damage, pixman_region16_t *region) { RegionRec r; st_damage_init_random_box(test, &r.extents); r.data = NULL; sna_damage_subtract_box(damage, &r.extents); pixman_region_subtract(region, region, &r); } static void st_damage_all(struct sna_damage_selftest *test, struct sna_damage **damage, pixman_region16_t *region) { pixman_region16_t tmp; pixman_region_init_rect(&tmp, 0, 0, test->width, test->height); if (!DAMAGE_IS_ALL(*damage)) sna_damage_all(damage, test->width, test->height); pixman_region_union(region, region, &tmp); } static bool st_check_equal(struct sna_damage_selftest *test, struct sna_damage **damage, pixman_region16_t *region) { int d_num, r_num; BoxPtr d_boxes, r_boxes; d_num = *damage ? sna_damage_get_boxes(*damage, &d_boxes) : 0; r_boxes = pixman_region_rectangles(region, &r_num); if (d_num != r_num) { ERR(("%s: damage and ref contain different number of rectangles\n", __FUNCTION__)); return false; } if (memcmp(d_boxes, r_boxes, d_num*sizeof(BoxRec))) { ERR(("%s: damage and ref contain different rectangles\n", __FUNCTION__)); return false; } return true; } void sna_damage_selftest(void) { void (*const op[])(struct sna_damage_selftest *test, struct sna_damage **damage, pixman_region16_t *region) = { st_damage_add, st_damage_add_box, st_damage_subtract, st_damage_subtract_box, st_damage_all }; bool (*const check[])(struct sna_damage_selftest *test, struct sna_damage **damage, pixman_region16_t *region) = { st_check_equal, //st_check_contains, }; char region_buf[120]; char damage_buf[1000]; int pass; for (pass = 0; pass < 16384; pass++) { struct sna_damage_selftest test; struct sna_damage *damage; pixman_region16_t ref; int iter, i; iter = 1 + rand() % (1 + (pass / 64)); DBG(("%s: pass %d, iters=%d\n", __FUNCTION__, pass, iter)); test.width = 1 + rand() % 2048; test.height = 1 + rand() % 2048; damage = _sna_damage_create(); pixman_region_init(&ref); for (i = 0; i < iter; i++) { op[rand() % ARRAY_SIZE(op)](&test, &damage, &ref); } if (!check[rand() % ARRAY_SIZE(check)](&test, &damage, &ref)) { FatalError("%s: failed - region = %s, damage = %s\n", __FUNCTION__, _debug_describe_region(region_buf, sizeof(region_buf), &ref), _debug_describe_damage(damage_buf, sizeof(damage_buf), damage)); } pixman_region_fini(&ref); sna_damage_destroy(&damage); } } #endif void _sna_damage_debug_get_region(struct sna_damage *damage, RegionRec *r) { int n, nboxes; BoxPtr boxes; struct sna_damage_box *iter; RegionCopy(r, &damage->region); if (!damage->dirty) return; nboxes = damage->embedded_box.size; list_for_each_entry(iter, &damage->embedded_box.list, list) nboxes += iter->size; nboxes -= damage->remain; if (nboxes == 0) return; if (nboxes == 1) { pixman_region16_t tmp; tmp.extents = damage->embedded_box.box[0]; tmp.data = NULL; if (damage->mode == DAMAGE_ADD) pixman_region_union(r, r, &tmp); else pixman_region_subtract(r, r, &tmp); return; } if (damage->mode == DAMAGE_ADD) nboxes += region_num_rects(r); iter = last_box(damage); n = iter->size - damage->remain; boxes = malloc(sizeof(BoxRec)*nboxes); if (boxes == NULL) return; if (list_is_empty(&damage->embedded_box.list)) { memcpy(boxes, damage->embedded_box.box, n*sizeof(BoxRec)); } else { if (boxes != (BoxPtr)(iter+1)) memcpy(boxes, iter+1, n*sizeof(BoxRec)); iter = list_entry(iter->list.prev, struct sna_damage_box, list); while (&iter->list != &damage->embedded_box.list) { memcpy(boxes + n, iter+1, iter->size * sizeof(BoxRec)); n += iter->size; iter = list_entry(iter->list.prev, struct sna_damage_box, list); } memcpy(boxes + n, damage->embedded_box.box, sizeof(damage->embedded_box.box)); n += damage->embedded_box.size; } if (damage->mode == DAMAGE_ADD) { memcpy(boxes + n, region_rects(r), region_num_rects(r)*sizeof(BoxRec)); assert(n + region_num_rects(r) == nboxes); pixman_region_fini(r); pixman_region_init_rects(r, boxes, nboxes); assert(pixman_region_not_empty(r)); assert(damage->extents.x1 == r->extents.x1 && damage->extents.y1 == r->extents.y1 && damage->extents.x2 == r->extents.x2 && damage->extents.y2 == r->extents.y2); } else { pixman_region16_t tmp; pixman_region_init_rects(&tmp, boxes, nboxes); pixman_region_subtract(r, r, &tmp); pixman_region_fini(&tmp); assert(damage->extents.x1 <= r->extents.x1 && damage->extents.y1 <= r->extents.y1 && damage->extents.x2 >= r->extents.x2 && damage->extents.y2 >= r->extents.y2); } free(boxes); } xf86-video-intel-2.99.917/ChangeLog0000664000175000017500001366456112445556130013534 00000000000000commit baec802b21387d04aebb10ac29e719a1800c5aa0 Author: Chris Wilson Date: Sun Dec 21 14:41:12 2014 +0000 2.99.917 snapshot commit 01ce7efe73538047abd38bbbb95fc4012ebeb9b4 Author: Chris Wilson Date: Sat Dec 20 13:36:50 2014 +0000 sna: Fix Drawable offsets prior to performing shadow discard Signed-off-by: Chris Wilson commit c27e6306e86797553351a71e2917a9b1158ec388 Author: Chris Wilson Date: Sat Dec 20 12:46:52 2014 +0000 sna/dri2: Check for implicit flushing after updating a Pixmap buffer Signed-off-by: Chris Wilson commit 5c16a4ec9b59123336483238ee6017db5491e255 Author: Chris Wilson Date: Sat Dec 20 09:38:41 2014 +0000 sna: Skip allocation of new TearFree buffer if not actually flipping After showing the new front buffer, we have to avoid writing to the back buffer whilst the flip is still pending (as it may still be being shown by the display). To do this we check if there are any outstanding flips, and reallocate if so. However, with a CRTC override, we may just be flipping that one CRTC and not the current TearFree back buffer and in that case we can avoid the reallocation. Signed-off-by: Chris Wilson commit 9b3b591476cc52cc285a8a1f02462db37d5e10c2 Author: Chris Wilson Date: Fri Dec 19 12:25:30 2014 +0000 sna/dri2: Preserve the shadow CRTCs when copying to other areas In the Composite setup, if we are doing a DRI2 copy onto the front buffer, we are fully cognizant that the copy will not go onto the unredirected Windows of another Client. So we can preserve the shadow CRTC mapping for those Clients, and prevent ping-ponging between CRTC modes. Signed-off-by: Chris Wilson commit 391b50c81decd208c47c109217b2c882c064ac69 Author: Chris Wilson Date: Fri Dec 19 11:11:38 2014 +0000 sna/dri2: Report changes in pitch when swapping bo As we have relaxed the pitch restriction between front/back buffers when swapping, we need to make sure that any change is also reported back along with the change in front/back names. Signed-off-by: Chris Wilson commit ada97d27250aa09b1a27d5f6640fea011fade997 Author: Chris Wilson Date: Fri Dec 19 09:43:33 2014 +0000 sna/dri2: Look for preferred CRTC for visible portion of the window Signed-off-by: Chris Wilson commit 6f99bbe67e6e70d5b24611c7afa0dffc5632aaab Author: Chris Wilson Date: Fri Dec 19 08:37:07 2014 +0000 sna/dri2: Prevent NULL pointer dereference of Window private In case we receive quick successive calls to DRI2GetBuffers on the same Window, we need to check that the private exists before dereferencing it. Signed-off-by: Chris Wilson commit fdd7508e53043f82f9cf422fc968c6574334a667 Author: Chris Wilson Date: Fri Dec 19 07:59:24 2014 +0000 sna/dri2: Decouple Window cache on Pixmap changes If the Pixmap for a Window is changed (i.e. Composite redirection/unredirection), we also need to decouple any associated DRI2 front buffer for the Pixmap (e.g. used for single CRTC flipping). Signed-off-by: Chris Wilson commit 82e480267079f8678245e37724f95ae87f55b582 Author: Chris Wilson Date: Wed Dec 17 08:01:00 2014 +0000 intel-virtual-output: Do not attempt to tidy up the local display if it fails Just fix the segfault dereferencing the primary display if we bail during its setup. Signed-off-by: Chris Wilson commit c211b3bc61efa7d13a5f5f1276649d90bf4ef854 Author: Chris Wilson Date: Wed Dec 17 07:51:31 2014 +0000 intel-virtual-output: Add version number to verbose output Signed-off-by: Chris Wilson commit 123754de41380b94922768d021987b1dea3b39c4 Author: Chris Wilson Date: Tue Dec 16 10:31:22 2014 +0000 sna: Make error debug tracing available at normal debug levels Signed-off-by: Chris Wilson commit 99537089346ed7a1bc6b02349fad93845e865bb9 Author: Chris Wilson Date: Fri Dec 12 15:36:25 2014 +0000 sna: Tune handling of kernel error detection during intial setup Signed-off-by: Chris Wilson commit 01692b8cf229f45813cf3a1059577a779d71dfa8 Author: Chris Wilson Date: Fri Dec 12 15:13:04 2014 +0000 sna: Fix TearFree multi-monitor operation whilst wedged The crtc flip (for when the kernel can't do a pageflip) made the mistake of setting the shadow buffer to the scanout - nullifying the effect of the TearFree. Signed-off-by: Chris Wilson commit 343299c78bfc1044da0b965e99de9ad312b05cca Author: Chris Wilson Date: Fri Dec 12 09:40:51 2014 +0000 sna/trapezoids: Check the pixmap is wrapped before deferencing it When we AddTraps to a low resolution bitmap, we need to fallback as we don't wrap it with a GPU pixmap. Signed-off-by: Chris Wilson commit 60ebac591596ccb768b684b1909064570dd1cf47 Author: Chris Wilson Date: Fri Dec 12 07:55:51 2014 +0000 sna: Add another Xinerama vs RandR guard Another place used rrScrPriv without checking for its validity. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87257 Signed-off-by: Chris Wilson commit f587d71f3c91f9ddcc4cdbe8a0f9ce59590d9db2 Author: Chris Wilson Date: Thu Dec 11 08:53:54 2014 +0000 sna: Catch NULL RandR screen private If Xinerama is enabled, than RandR12 will be silently disabled. Be careful not to dereference the rrScrPiv when it doesn't exist. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=87207 Signed-off-by: Chris Wilson commit 04a09d353fc5ad8a55eb2457dc8bb43638ba879e Author: Chris Wilson Date: Tue Dec 9 20:43:52 2014 +0000 uxa/dri: Remove defunct intel->back_pixmap This was only required for glamor support. Signed-off-by: Chris Wilson commit 08ee9a75df16ee276835df5fc613648db2566154 Author: Chris Wilson Date: Tue Dec 9 20:40:20 2014 +0000 uxa/dri: Fix triple buffer swapping Fixes regression from commit 0aa2edbd29c8dd26a5f3748e3875c445ea358a6d Author: Chris Wilson Date: Wed Nov 5 11:56:20 2014 +0000 Remove defunct glamor support where the wrong branch of pixmap exchange upon SwapBuffers was kept when removing the glamor paths. Reported-by: Rui Matos Signed-off-by: Chris Wilson commit fc984e8953d61901b255422c8f56eb79a2dd2a28 Author: Chris Wilson Date: Tue Jul 22 08:38:42 2014 +0100 sna/dri3: Mesa relies upon implicit fences for X/Compositor synchronisation The decision has been made that DRI3/intel shall continue with DRI2-style implicit fencing for synchronisation between X and clients using pixmaps as texture sources. (The other way around uses explicit fencing!) References: https://bugs.freedesktop.org/show_bug.cgi?id=81551 Signed-off-by: Chris Wilson commit d247cb7d0cdb73736f31612157e47f166af68ba0 Author: Chris Wilson Date: Mon Dec 8 10:07:25 2014 +0000 sna/gen6: Poke PSMI control around WAIT_FOR_EVENT to prevent idling The bspec recommends preventing the hardware from going to sleep around a WAIT_FOR_EVENT, and tells us to use disable sleep bit in PSMI control to accomplish this. References: https://bugs.freedesktop.org/show_bug.cgi?id=62373 Signed-off-by: Chris Wilson commit d39dc73a80161d290555877942e5990daf0c0411 Author: Chris Wilson Date: Mon Dec 8 08:33:11 2014 +0000 sna: Inline check for pending events before reading from drm fd Signed-off-by: Chris Wilson commit f8aecdffada438306dff8923cdfc0df527509672 Author: Chris Wilson Date: Thu Dec 4 11:23:11 2014 +0000 sna: Clear the read flags for the shared drm fd after use In ZaphodHeads, we may reuse the same select read flags and attempt to read from a blocking drm fd multiple times. However, if we clear the read flags after first exhausting the fd, we shouldn't then block on subsequent heads. Signed-off-by: Chris Wilson commit 594470c809627feab4891bade5ec6d80e1d0a919 Author: Chris Wilson Date: Thu Dec 4 11:16:58 2014 +0000 sna: Update the fence marker after submitting a new batch Signed-off-by: Chris Wilson commit 9c2c485df9fd39ae36779f765a892e36835a8001 Author: Chris Wilson Date: Mon Dec 1 14:26:46 2014 +0000 sna: Validate that the reg/insn size is well defined Signed-off-by: Chris Wilson commit 263d10998617ba935179942d2440a1607cd3c21c Author: Chris Wilson Date: Mon Dec 1 13:26:46 2014 +0000 sna: Clamp downsampling tile size For very large scale factors, it is possible for the current calculation to underflow and try negative tile sizes. Signed-off-by: Chris Wilson commit 88e9bb760fbd1249bb364a6b68aceee0b442738c Author: Chris Wilson Date: Mon Dec 1 10:47:32 2014 +0000 sna: Explicitly disable unused pipes after an output reconfiguration Signed-off-by: Chris Wilson commit ddf5feba786cf0147c4db9720c96e9a5636573b0 Author: Chris Wilson Date: Mon Dec 1 10:00:32 2014 +0000 sna: Generate a backtrace on assertion failures Signed-off-by: Chris Wilson commit e12ec452a99396f76138a5961c8195e22ca12ac1 Author: Chris Wilson Date: Mon Dec 1 09:46:20 2014 +0000 sna: Cancel pending mode change notification Along a couple of paths, we either do not care about the notification (i.e. during suspend) or do it explicitly. There we should mark the work as done. Signed-off-by: Chris Wilson commit 700c036d180a09e4f7ec30466f7f6dda1c1d0066 Author: Chris Wilson Date: Mon Dec 1 09:31:41 2014 +0000 sna: Reject modesets with 0 outputs Signed-off-by: Chris Wilson commit dd421005cac981e75f734d50263675521943ed7b Author: Chris Wilson Date: Mon Dec 1 09:29:07 2014 +0000 sna: Add a few more asserts to sna_crtc_flip() Check that we are updating an active CRTC with a valid mode and associated outputs. Signed-off-by: Chris Wilson commit 104517507f267aca7433f8b85dec89e9013a640e Author: Chris Wilson Date: Mon Dec 1 09:24:50 2014 +0000 sna: Do not post shadow updates in the middle of output reconfiguration Wait until the screens and framebuffers settle before we start updating. Signed-off-by: Chris Wilson commit faef6e5e1ab52819d4e9a19738ec7d8419841613 Author: Chris Wilson Date: Mon Dec 1 08:29:47 2014 +0000 sna: Clean up DBG compile warnings Including a potential crash due to using a unspecified string, oops. Signed-off-by: Chris Wilson commit 0bec625cc45eb8de85a5013506cce5f789dc8e45 Author: Chris Wilson Date: Mon Dec 1 08:11:18 2014 +0000 sna: Report when we disable TearFree due to an error in operation Signed-off-by: Chris Wilson commit 6059b51b59537682b3d9c64c69ea72616462c41c Author: Chris Wilson Date: Fri Nov 28 07:33:42 2014 +0000 sna: Reject attempts to set an invalid mode Let's be sure the mode has been established before we attempt to apply it to a CRTC - just in case the kernel tries to use the invalid mode and blows up. References: https://bugs.freedesktop.org/show_bug.cgi?id=86679 Signed-off-by: Chris Wilson commit 0f15b8b45bb6de10ce1926db303247a5bd3c1c08 Author: Chris Wilson Date: Wed Nov 19 18:42:32 2014 +0000 sna/transform: Correctly check for imprecise fractional translations Signed-off-by: Chris Wilson commit 7725c423cda217e0dbd95003bb7a80b4b3a73bb4 Author: Chris Wilson Date: Wed Nov 19 18:30:20 2014 +0000 sna/dri2: Improve precision of completion event for no-op swaps Signed-off-by: Chris Wilson commit f367f3dee5e2ecba265a8ff7e98e196189793613 Author: Chris Wilson Date: Wed Nov 19 18:19:13 2014 +0000 sna/dri2: Add more DBG to explain invalid frames Signed-off-by: Chris Wilson commit 05a1aba1ab5d288918d6689080170fc83a80db61 Author: Chris Wilson Date: Wed Nov 19 18:12:10 2014 +0000 sna: DBG compile fix Signed-off-by: Chris Wilson commit a90cc3b3889fafbd91c11c42d068a9d6474e218b Author: Chris Wilson Date: Tue Nov 18 08:37:25 2014 +0000 sna: Tweak alignment constraints on gen8 to allow BLT The previous commits prevent us from using the BLT if the destination address is misaligned. Honour that restriction when creating buffers as well, so that they are always usuable by the BLT. Signed-off-by: Chris Wilson commit 8dee52997891108eec8e4df12dd02f3a060d9cb8 Author: Chris Wilson Date: Wed Nov 19 13:38:20 2014 +0000 sna: Add more checks and asserts for BLT capable bo Before we use the BLT for core acceleration, double check that we can. This should catch the case where we attempt to operate on SHM pixmaps which do not meet the restrictions. Signed-off-by: Chris Wilson commit 3a22b6f6d55a5b1e0a1c0a3d597996268ed439ad Author: Mika Kuoppala Date: Wed Nov 19 15:10:05 2014 +0200 sna: gen8 BLT broken when address has bit 4 set With bit 4 set in address, the gen8 blitter fails and blits errorneously into the cacheline preceeding the destination and similarly when reading from the source, corrupting memory. v2: Update the destination base offset pattern as revealed by igt/tests/gem_userptr_blits/destination-bo-align v3: Check base address as well Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79053 Cc: Chris Wilson Tested-by: xunx.fang@intel.com [v2] Signed-off-by: Mika Kuoppala commit 29aab766f4b59c71181875880c8c943b93008bdf Author: Chris Wilson Date: Tue Nov 18 20:54:39 2014 +0000 sna/dri2: Remove unused function Signed-off-by: Chris Wilson commit b6eeb7a1f7efa591504070b606be655e27e6e9c2 Author: Chris Wilson Date: Wed Nov 5 13:03:41 2014 +0000 Disable DRI3 by default The external libraries, both in git, and especially shipping already enabled in distributions, are buggy and lead to server crashes and lockups. Caveat emptor. Signed-off-by: Chris Wilson commit 6c2707d7bbc0ebb422be66618b6f78887c46446e Author: Chris Wilson Date: Thu Nov 13 08:37:13 2014 +0000 sna: Unroll pwrite using our cached mmappings Signed-off-by: Chris Wilson commit f9f85b88032b2458d4d24ceca450fdaa65e6b94d Author: Chris Wilson Date: Wed Nov 12 11:50:33 2014 +0000 sna: Reorder PARAMs based on upstream inclusion Signed-off-by: Chris Wilson commit 13fa1f1a26aed83cd8fccafb9a0bdb096f69534b Author: Chris Wilson Date: Wed Nov 12 10:54:36 2014 +0000 sna/gen7: Be paranoid and force a pipecontrol stall at least every 4 flushes The documentation warns of potential GPU hangs if we emit more than 4 pipecontrol flushes without a CS stall. This is highly unlikely given how frequently we must inject stalls into the pipeline, but force a stall just in case! Signed-off-by: Chris Wilson commit b2492fa45beaf3c676eea2d5d75e35d60b91d769 Author: Chris Wilson Date: Mon Nov 10 13:30:15 2014 +0000 sna: Only reshow unhidden cursors after modesetting Reported-by: Maarten Lankhorst Signed-off-by: Chris Wilson commit 0267f5902ddaceced870dcd8451ef8729e33e5c2 Author: Chris Wilson Date: Mon Nov 10 07:42:42 2014 +0000 sna: Check after filtering points before submitting boxes to be drawn As we clip the points when converting them into GPU boxes, check that we have something to draw before submitting the commands. Reported-by: Ian Gay References: https://bugs.freedesktop.org/show_bug.cgi?id=86075 Signed-off-by: Chris Wilson commit 9ea242c275a70351abcfbc0f8f3233c122abecbe Author: Chris Wilson Date: Sun Nov 9 08:59:08 2014 +0000 sna: Check picture format on destination before beginning a GPU operation This is more important in the multiple stage operations like glyph rendering where we do not want to initiate an operation on the GPU only then to fallback due to an incompatible destination. Signed-off-by: Chris Wilson commit e96520327bd2ef4fbc7b7b5169a17b966d9f85f3 Author: Sedat Dilek Date: Fri Nov 7 10:54:18 2014 +0100 sna: wc-mmap: Fix warning in configure This fixes the following warning due to a typo: configure: WARNING: unrecognized options: --enable-wc-map Signed-off-by: Sedat Dilek commit ab6680375cc6d5efebe8e40816d1906b15678d6e Author: Chris Wilson Date: Fri Nov 7 09:54:35 2014 +0000 sna/xv: Give the illusion of hardware progress The number of ports we provide for Xv textured video is arbitrary. The main cost is reservation of a number of XIDs and preallocation of a block of memory. Whatever value we pick, someone will always want more... References: https://bugs.freedesktop.org/show_bug.cgi?id=85974 Signed-off-by: Chris Wilson commit 0aa2edbd29c8dd26a5f3748e3875c445ea358a6d Author: Chris Wilson Date: Wed Nov 5 11:56:20 2014 +0000 Remove defunct glamor support It never was a stable or complete replacement, and now it is incorporated in Xorg itself! Signed-off-by: Chris Wilson commit 4281bbdd5be1f846c217cdf6d09536779cd324ce Author: Chris Wilson Date: Fri Oct 24 08:50:55 2014 +0100 sna: Fix debug mmapping of active + released aux buffers The debug code wants to print the batch and the aux buffers. To do so, it needs to bypass the assertions on the lifetime of the buffers. Signed-off-by: Chris Wilson commit 87802b3402ec4a829c6507b4b78fcd03e30b6fe1 Author: Chris Wilson Date: Thu Oct 23 10:34:44 2014 +0100 sna: Experimental support for write-combining mmaps If we have a linear buffer, we can request the kernel mmap it directly with write-combining without having to pin it into the GTT. This allows us to efficiently upload very large buffers, and can avoid the dreaded aperture thrashing. Signed-off-by: Chris Wilson commit 33764685cbcd01548b6a23c217c7b511c1639694 Author: Chris Wilson Date: Thu Nov 6 12:40:20 2014 +0000 sna: Wrap prefaulting with sigtrap() Handle a potential SIGBUS due to kernel bugs when prefaulting the scanout surface. References: https://bugs.freedesktop.org/show_bug.cgi?id=85959 Signed-off-by: Chris Wilson commit 97fe3c1c860978c7a649cba93a55fa497010ccc1 Author: Rodrigo Vivi Date: Wed Nov 5 15:48:14 2014 -0800 sna: Use VMask in 3DSTATE_PS Using dispatch mask cause hangs waiting PS Done on some cases like bug #83207, with larger screen or when scaling it. Also mesa uses VMask instead of Dmask for 3DSTATE_PS because in some cases they were getting incorrect derivatives for subspans. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=83207 Cc: Timo Aaltonen Cc: Gary Wang Signed-off-by: Rodrigo Vivi Tested-by: Timo Aaltonen commit 0532a3313ad9c76a6e1d28e8a1c2ea495583fead Author: Chris Wilson Date: Wed Nov 5 20:11:54 2014 +0000 sna/gen8: Clear instancing enabled bit between batches gen8 sets the instancing bit relative to the vertex element, but we were clearing it for the vertex buffer. As the maximum number of vertex elements is fixed, just clear them all when emitting our header. Note that VF_SGVS is not sufficient by itself to disable all side-effects of instancing. Thanks to Kenneth Graunke for pointing out the change from vertex buffer to vertex element of the instancing enable bit. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84958 Signed-off-by: Chris Wilson commit ba408bf21c4b65f19c7b581e4c88c92805184334 Author: Chris Wilson Date: Tue Nov 4 13:39:52 2014 +0000 sna: Correct units for videoRam The mappable aperture size is stored as a page count, videoRam expects size in KiB. Signed-off-by: Chris Wilson commit 7ed5b1156cbf173a68f4fe007c51b911e7c5a1a2 Author: Chris Wilson Date: Tue Nov 4 12:54:00 2014 +0000 sna: Reuse the queried aperture size for videoRam determination Rather than repeat our derivation of how much RAM we can map, just reuse the already determined value. Signed-off-by: Chris Wilson commit a972c9886edc1141ad3f8a0a33d2f7f18d0008bc Author: Chris Wilson Date: Fri Oct 24 12:16:11 2014 +0100 sna: Use v2 of get_tiling ioctl to check for bit17 swizzling With the new version of the get_tiling ioctl we can reliably detect if we can use manual detiling (i.e. CPU mmaps) on older gen. Signed-off-by: Chris Wilson commit 7ecc778691c452285f754743a93a46fa1d3da52f Author: Chris Wilson Date: Tue Nov 4 10:36:26 2014 +0000 backlight: bl_power uses 0 for on and 4 for off The backlight/bl_power file didn't obey the obvious semantics, but instead operates using some interesting framebuffer API. Oh well. Signed-off-by: Chris Wilson commit cc3b8a542ecb1ba873efefaeab630fa8f69b5b96 Author: Chris Wilson Date: Fri Oct 31 20:38:40 2014 +0000 sna: Treat external bo carefully when marking as idle When we flag a bo as being externally modified, we set a special flag on its request pointer. This forces us to inspect whether the bo is busy before accessing it the next, and if it is idle, we must be careful that we then do not dereference the special request. Fixes regression from commit 9115406b651eb11779f37c4b048d55188b9d6e02 Author: Chris Wilson Date: Thu Oct 30 19:21:02 2014 +0000 sna: Retire all requests when a bo is found to be not busy Signed-off-by: Chris Wilson commit 122f6065604480a57b86f04d5d09011ee6e8829b Author: Chris Wilson Date: Fri Oct 31 16:50:04 2014 +0000 sna: Fix forced fallbacks from init As we now override a few hooks when we mark the GPU as wedged, we also need to preserve those overrides during initialisation. Fixes DBG_NO_HW. Signed-off-by: Chris Wilson commit d959014c10e2408ed2f073bd5fcb8c558a17da07 Author: Chris Wilson Date: Fri Oct 31 16:12:37 2014 +0000 sna: Modicum of extra DBG for transformed redisplay Signed-off-by: Chris Wilson commit 1040d92e31eea4556c2605c809d18ec4c864424a Author: Chris Wilson Date: Fri Oct 31 16:11:54 2014 +0000 sna/gen6+: Fix projective sample coordinates Reported-by: "Ding, Chi" Signed-off-by: Chris Wilson commit 30fded8dfa77c74de165ad53f82412a2e7fa88ae Author: Chris Wilson Date: Fri Oct 31 16:11:28 2014 +0000 sna/brw: Fix EU tests to select the right gen Signed-off-by: Chris Wilson commit 71d79daf458c05f771441eb268693c34be0a97c3 Author: Chris Wilson Date: Thu Oct 30 19:20:13 2014 +0000 sna: Remove extraneous tab whitespace before parameter name Reported-by: Arthur Koziol Signed-off-by: Chris Wilson commit 9115406b651eb11779f37c4b048d55188b9d6e02 Author: Chris Wilson Date: Thu Oct 30 19:21:02 2014 +0000 sna: Retire all requests when a bo is found to be not busy Signed-off-by: Chris Wilson commit 9d48d2817927bc2532953f09b6be2002c2086e1f Author: Chris Wilson Date: Fri Oct 24 09:12:49 2014 +0100 sna: Reuse the same fence until retired In order to reduce the number of breadcrumbs the kernel must emit to track our batches, reuse the last query until it has retired. Signed-off-by: Chris Wilson commit 61436c2fabe117b85404eecb06158ba0a63a7741 Author: Chris Wilson Date: Wed Oct 29 16:52:44 2014 +0000 sna: Fix build for GC API changes in Xorg-1.16.99.901 The GC struct was changed in commit 73e2383b7350723256894c5076d0c731aec5cd1f Author: Adam Jackson Date: Fri Jun 20 13:31:20 2014 -0400 dix: Always store GC client clip as a region (v2) update to match. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85581 Signed-off-by: Chris Wilson commit d08a5f555a0c47ae23c0f9a890b512cb23e74feb Author: Chris Wilson Date: Fri Oct 24 09:53:29 2014 +0100 sna/trapezoids: Prevent overflow of edge gradient in mono rasteriser References: https://bugs.freedesktop.org/show_bug.cgi?id=70461#c76 Signed-off-by: Chris Wilson commit f611f9580469661e585f419a7dd033ddffd7e20d Author: Chris Wilson Date: Fri Oct 24 09:41:47 2014 +0100 sna/trapezoids: Difference between two 32-bit quantities is 33-bits in size When computing the edge distance, we subtract on 32-bit quantity from another. This requires 33-bits to store the full result so promote the subtraction to 64-bits (rather than the result of that subtraction as done currently). Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70461#c76 Signed-off-by: Chris Wilson commit 4df0052a21efd744c4b8cb2409139ded6e45f5c8 Author: Chris Wilson Date: Fri Oct 24 08:08:23 2014 +0100 sna: Update the reloc->delta for the shrunk batch As well as actually updating the value in the batch for the relocation address, we need to tell the kernel in case it has to update the address. Another regression from commit b4872f74c05a92c91d7b57146eb35ed2ecc86d97 Author: Chris Wilson Date: Tue Oct 21 10:38:22 2014 +0100 sna: Avoid pwriting large batches Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85389 Signed-off-by: Chris Wilson commit 8df8618c62c0918416ca3e21b081299eacb9b054 Author: Chris Wilson Date: Fri Oct 24 08:02:50 2014 +0100 sna: Adapt to changes in internal render API in Xorg-1.17 Signed-off-by: Chris Wilson commit a8d1eaf6ee1fed0aeff681d33864e17cb904ddd3 Author: Chris Wilson Date: Wed Oct 22 21:12:56 2014 +0100 sna: Fix use of uninitialized value when handling migration for PRIME sna_accel.c: In function 'sna_pixmap_undo_cow': sna_accel.c:1933:11: warning: 'create' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Chris Wilson commit e46f26b9e2671468e9accd2f69ffc22fb96b5849 Author: Chris Wilson Date: Wed Oct 22 19:37:42 2014 +0100 sna/gen8: Load the sampler result directly into the fb write message With the unified register file (from gen6+), we no longer need to copy the sample results into the final write message. Signed-off-by: Chris Wilson commit dee9ea29917dd5ef4a7de6570cd091f08d334df9 Author: Chris Wilson Date: Wed Oct 22 19:40:14 2014 +0100 sna/gen8: Override the URB output from the VS Using the override seems to be marginally faster. Signed-off-by: Chris Wilson commit 7a9bdadd71730adc5266bc6758982abec5917b93 Author: Chris Wilson Date: Wed Oct 22 19:31:10 2014 +0100 sna/gen8: Clamp URB allocations for GT3 GT3 requires some reserved space in the URB allocation and so we must reduce the amount we allocate to our vertices. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81583 Signed-off-by: Chris Wilson commit de54a93217cc550c44ee138f0511ede6925d84e0 Author: Chris Wilson Date: Wed Oct 22 19:30:21 2014 +0100 sna/gen8: Annotate more 64bit pointer locations Signed-off-by: Chris Wilson commit 2114b54a0b8a561dd7db1a38a87654571b4aa853 Author: Chris Wilson Date: Wed Oct 22 18:51:39 2014 +0100 sna: Fix double application of batch shrinking to relocation targets Fixes regression from commit b4872f74c05a92c91d7b57146eb35ed2ecc86d97 Author: Chris Wilson Date: Tue Oct 21 10:38:22 2014 +0100 sna: Avoid pwriting large batches NB: Remember to check your tree before pushing a simple bug fix. Signed-off-by: root commit 6e486e11a53f93b628a3a82d5b086e63b7dc6c1e Author: Chris Wilson Date: Wed Oct 22 07:24:10 2014 +0100 sna/dri2: Fix interoperation with PRIME and older Xorg When using the fake triple buffer implementation with recent enough Xorg to support both real triple buffering and PRIME, we have to disable use of SwapLimit as that freezes the client when we are instead faking the triple buffer. (We have to use the fake support on those Xservers to workaround crashes inside the Xserver.) Reported-by: Paulo Dias Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85144#c12 Signed-off-by: Chris Wilson commit de96fbf66cf9a0df85cfd1dad8cf786a1d6f8325 Author: Chris Wilson Date: Tue Oct 21 12:20:29 2014 +0100 sna/trapezoids: Prefer GPU for AddTraps() Signed-off-by: Chris Wilson commit b4872f74c05a92c91d7b57146eb35ed2ecc86d97 Author: Chris Wilson Date: Tue Oct 21 10:38:22 2014 +0100 sna: Avoid pwriting large batches Signed-off-by: Chris Wilson commit 83a3d9147308f4777324abdea859ac0c108f03c6 Author: Chris Wilson Date: Sun Oct 19 09:11:33 2014 +0100 sna: Prefer the GPU for wide lines and arcs Signed-off-by: Chris Wilson commit 316155db98aac4d5d0a7077e86453e4d41a3029d Author: Chris Wilson Date: Sat Oct 18 10:58:03 2014 +0100 sna/gen6: Apply gen7 flushing Clemens Eisserer noticed that glyphs would randomly disapper whilst being rendered on his Sandybridge, a sign that the GPU is not flushing its internal state on pipeline changes. As a precaution, adopt the Ivybridge flush semantics (whilst preserving the required Sandybridge workarounds). Reported-and-tested-by: Clemens Eisserer Reported-and-tested-by: Ilia Mirkin References: https://bugs.freedesktop.org/show_bug.cgi?id=85158 Signed-off-by: Chris Wilson commit bf7b5a24bbfc8a3553be6baa457ec92559dd3d65 Author: Chris Wilson Date: Sat Oct 18 10:13:31 2014 +0100 sna/dri2: Exchange pitches as well When swapping over the names, we also need to swap the pitches exposed through the protocol as well. Signed-off-by: Chris Wilson commit 6b98f16241c2a4788f3b5fe4c0d956a849d2ac05 Author: Chris Wilson Date: Thu Oct 16 08:26:03 2014 +0100 sna: Allow TearFree updates to continue even when the GPU is wedged Even if we cannot render using the GPU, we should still be able to request that the outputs be flipped. So try, and only if that fails, resort to writing directly into the scanout. References: https://bugs.freedesktop.org/show_bug.cgi?id=85058 Signed-off-by: Chris Wilson commit c896f249c7b64683839665ff528920382f4fc58e Author: Chris Wilson Date: Thu Oct 16 08:17:09 2014 +0100 sna: Fixup a failed per-CRTC TearFree flip If we fail to flip onto a new per-CRTC bo, first try a normal modeset. This catches instances where the pitch changes for example. Signed-off-by: Chris Wilson commit 3812dfce175eeaef7f41632d2df6a0d88c0ae19b Author: Chris Wilson Date: Thu Oct 16 07:46:26 2014 +0100 sna: Replace GPU render operations with CPU callbacks after wedged If we find the GPU is wedged, replace some of the lowlevel render operations with CPU equivalents to simplify some fallbacks that still need to operate on GPU bo (such as copying DRI buffers). References: https://bugs.freedesktop.org/show_bug.cgi?id=85058 Signed-off-by: Chris Wilson commit 9a5ca59d2b7b209e6f56dd3f94d4ae6f06e1ecdc Author: Chris Wilson Date: Wed Oct 15 16:51:42 2014 +0100 sna: Prevent recursion during last-gasp disabling of outputs If we fail an execbuffer, we disable outputs and try again. (In case we have severe fragmentation issues and need to rearrange the scanouts in GTT.) Afterwards we re-enable the outputs, but this causes us to flush the pending rendering and so recurse into the execbuffer. Prevent this with a slight hack during enabling of outputs. References: https://bugs.freedesktop.org/show_bug.cgi?id=85058 Signed-off-by: Chris Wilson commit 49cf2803d3bc3be12f6a59581631fdf5547bb0e3 Author: Rodrigo Vivi Date: Mon Oct 13 11:33:27 2014 -0700 sna: a bit of cleanup on gen8_render.h Removing bits that become reserved on bdw and organizing 3DSTATE_PS header. Signed-off-by: Rodrigo Vivi commit f5935aa4bb4fbd5cc16bd7a861e12becb3c1bcd2 Author: Rodrigo Vivi Date: Mon Oct 13 11:33:26 2014 -0700 sna: Fix URB offset shift on 3DSTATE_SBE Unfortunatelly this doesn't the bug I was hunting, but let's follow the spec. Signed-off-by: Rodrigo Vivi commit 2c227f391a1727f7bcfd0f03c2c75e01bf893383 Author: Chris Wilson Date: Mon Oct 13 09:26:12 2014 +0100 sna: Drain all udev events before checking output status As libudev only pulls off events one by one and we may need to process several for a MST topology change, keep polling until complete. Signed-off-by: Chris Wilson commit 49376ba3bddd15e62df55928198160d9970dc1c6 Author: Chris Wilson Date: Sat Oct 11 21:34:40 2014 +0100 backlight: Open bl_power using WRONLY for writing. Jan spotted that we open the bl_power file using O_RDONLY and then attempt to write the new power state into it. This fails... Reported-by: Jan Steffens Signed-off-by: Chris Wilson commit 70a1710e18f874f9efd8e97f0f873d65bf1b46ca Author: Chris Wilson Date: Fri Oct 10 11:42:09 2014 +0100 sna/trapezoids: Sacrifice precision to avoid 64bit overflow References: https://bugs.freedesktop.org/show_bug.cgi?id=70461#c71 Signed-off-by: Chris Wilson commit 069f7878dc57dca39ad79b2f3ad5248244090b70 Author: Chris Wilson Date: Fri Oct 10 11:31:45 2014 +0100 sna/trapezoids: Treat mono-edges within a single column as vertical Signed-off-by: Chris Wilson commit 0c1b4f913c20370736327c44a9fa3b5c55c05d52 Author: Chris Wilson Date: Fri Oct 10 08:35:16 2014 +0100 sna: Log if we disable the backlight after failure to switch it on Signed-off-by: Chris Wilson commit f7f7383de0da0776cfbe98481578ab6680732a2a Author: Chris Wilson Date: Thu Oct 9 16:35:36 2014 +0100 compat: Hide changes in miHandleExposures() interface Signed-off-by: Chris Wilson Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84901 commit c139e2fb95f2db0b39aadcd58cc63b316a278951 Author: Chris Wilson Date: Wed Oct 8 13:59:55 2014 +0100 intel: Store pointer to struct intel_device Beware the barbarians at the gate, who invade and steal your ScrnInfoPtr and its Entity from underneath you. In some configurations, we lose access to the struct intel_device stored on the Entity after initialisation, causing havoc. Workaround this by storing the intel_device that we open in our driverPrivate. Signed-off-by: Chris Wilson commit 57c48e4973ac0dad09744eaa82315a5f023094e7 Author: Chris Wilson Date: Tue Oct 7 21:08:52 2014 +0100 sna: Fix the TearFree flip handler for the change in argument order From the last commit c481254c17316e6c8299705fd0a218484dd369fe, we need to pass along the private pointer as the flip data as we no longer pass it down from the caller. Signed-off-by: Chris Wilson commit c481254c17316e6c8299705fd0a218484dd369fe Author: Chris Wilson Date: Tue Oct 7 16:24:18 2014 +0100 sna: Retrieve private pointer from vblank cookie When using ZaphodHeads, we share the /dev/dri/card0 fd between both screens. So when we read an event back from the fd, it could be for either head and we cannot assume that our private pointer is valid for the data passed along with the event. Instead, we need to retreive that pointer from the event. Fixes regression from commit 8369166349c92a20d9a2e7d0256e63f66fe2682b [2.99.912] Author: Chris Wilson Date: Wed Jun 4 08:29:51 2014 +0100 sna/dri2: Enable immediate buffer exchanges although the design bug is actually older. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84744#c15 Signed-off-by: Chris Wilson commit 9ed1ac8b506509be410c12870397417c7638886e Author: Chris Wilson Date: Mon Oct 6 21:37:14 2014 +0100 sna: Wrap rrGetInfo so that we can probe when udev is not active If the ddx is configured without udev support, we do not receive notifications when the MST topology is changed. This leads us to query the kernel for bad connectors, and so we end up reporting an unknown connection status for them, which the user and client often find confusing. However, we can not simply act upon the detection failure as we are too deep inside the callback chain and cannot change the arrays of known connectors whilst iterating over them. A neat compromise is to hook into the rrGetInfo call chain and poll for MST changes before we report back the current configuration. References: https://bugs.freedesktop.org/show_bug.cgi?id=84718 Signed-off-by: Chris Wilson commit dff59000d43c5449b3ed79ff144236c17b507bd6 Author: Chris Wilson Date: Tue Oct 7 07:18:47 2014 +0100 sna/trapezoids: Remove stale assert The variable changed meaning, but the assert did not. Fix that up. Reported-by: Matti Hämäläinen Signed-off-by: Chris Wilson commit 11c7f2d2f485e75feadb15d388960c581a96154d Author: Chris Wilson Date: Tue Oct 7 07:18:22 2014 +0100 sna: Add pixmap id to DBG hints inside rende migration Signed-off-by: Chris Wilson commit ec2b9ac81aed0d2dda2948171ca1c260184bf221 Author: Chris Wilson Date: Mon Oct 6 08:18:24 2014 +0100 sna: Avoid the intermediate allocation for PRIME pixmaps If we attempt to share an unused Pixmap, we first create an ordinary GPU bo when migrating onto the GPU. Add a flag here to cause the migration to create a Pixmap suitable for PRIME instead. Signed-off-by: Chris Wilson commit 649b233f12bdf04c449a813c3a150ac3ccfcab72 Author: Chris Wilson Date: Sun Oct 5 11:06:36 2014 +0100 sna/trapezoids: Remove redundant coverage scaling Since we do not perform an analytical pass, we can count samples directly. Signed-off-by: Chris Wilson commit 191c6b6ca7b3d2a1040c2633929845117ba1f1af Author: Chris Wilson Date: Sun Oct 5 09:05:20 2014 +0100 sna/trapezoids: Improve sample locations for imprecise rasterisation We need to sample at the mid-point of each subrow rather than at the top and preserve the full precision of the edge gradients. Signed-off-by: Chris Wilson commit aa89ef69ac413abc65268a3758979b0edd1f3000 Author: Chris Wilson Date: Sun Oct 5 09:20:12 2014 +0100 sna: Double check for no residual CPU damage along redisplay fast path If we are using a CRTC source pixmap, it is possible that it is on the CPU with a GPU bo and so requires flushing prior to the copy. Signed-off-by: Chris Wilson commit e50e1bb3fd2fd20cce580841b20a3e47c7111ee9 Author: Chris Wilson Date: Sun Oct 5 08:12:52 2014 +0100 sna: Only use copy redisplay fast path if we have a source GPU bo Odd as it may seem, but we can end up attempting to copy from a source CRTC pixmap that is not on the GPU. Here we need to use the heavyweight path to handle its composition normally. Reported-by: Christoph Haag Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84653 Signed-off-by: Chris Wilson commit 7d60a9be3da1163866573d2ffda9635a914ac795 Author: Chris Wilson Date: Fri Oct 3 17:20:31 2014 +0100 sna: Update vblank interval after enabling outputs In a couple of cases we can re-enable CRTC. After doing so we should recompute the minimum vblank interval. Signed-off-by: Chris Wilson commit a797c192adcc2b7aa9101089d3ee84b3e4f968ad Author: Chris Wilson Date: Thu Oct 2 07:22:39 2014 +0100 sna/dri2: Disable tracking stale back buffers without reuse-notifications If the Xorg does not support the ReuseNotify callback, and we use double-bufferred pageflips, we set the stale flag on the backbuffer but never clear it. This results in, for example, a compositor with Xorg-1.15 and Prime active from updating the framebuffer. Reported-by: Dave Airlie Signed-off-by: Chris Wilson commit de7185bbf48ca2f617466b98328d0fdae4df1b44 Author: Chris Wilson Date: Wed Oct 1 10:28:10 2014 +0100 sna/trapezoids: Fix comparison on right edge of trapezoids We need to compare the fixed ceiling rather the floor for accuracy. Signed-off-by: Chris Wilson commit c6d9303303a5ccb3ec6d072c510c09d6576cb398 Author: Chris Wilson Date: Wed Oct 1 10:25:16 2014 +0100 sna/trapezoids: Consistently use NO_GPU_THREADS to disable threading for DBG Signed-off-by: Chris Wilson commit bca08dc4155c0ee304c60340ccf95fe7b03ac11b Author: Chris Wilson Date: Mon Sep 29 19:30:03 2014 +0100 sna/trapezoids: Fix loss of precision through projection onto sample grid Preserve the original precision for the line vectors of the trapezoids, and leave the final projection onto the x-cell until last. Finishes accidental wip commit in 8aff3898c35e3. Signed-off-by: Chris Wilson commit 6284ca5a7ebe9171abff6b41ad1644d7b7d0c7df Author: Chris Wilson Date: Mon Sep 29 16:32:30 2014 +0100 sna: Fix SHOW_BATCH_AFTER debugging aide Signed-off-by: Chris Wilson commit 8aff3898c35e348cec26db401047a562eb5ffa49 Author: Chris Wilson Date: Mon Sep 29 16:30:39 2014 +0100 sna: Clear padding in rotation properties for valgrind Signed-off-by: Chris Wilson commit 4a23d24db676dd7b535f226ff9624f892a53842a Author: Chris Wilson Date: Mon Sep 29 07:39:06 2014 +0100 sna; Markup that we are ignoring errors from early ScreenCreateResources In the early move-to-gpu in ScreenCreateResources we purposefully ignore any errors from the move-to-gpu as they will be fixed up later when we try to bind to the CRTCs. Mark it as ignored for future readers. Signed-off-by: Chris Wilson commit d036cdedf0913384b1e45bba80aa2c816be9c350 Author: Chris Wilson Date: Sun Sep 28 18:00:25 2014 +0100 sna: Use move-to-gpu for explicit handling of damage during fbcon copy Whilst it is unlikely that we do have any damage queued to the frontbuffer prior to the copy, it is safer to use the migration tracking machinery rather than guess. Signed-off-by: Chris Wilson commit ac492b9af99919d7c579ee4dd636ef6aab90c945 Author: Chris Wilson Date: Sat Sep 27 16:40:19 2014 +0100 man: Mention Option "AccelMethod" "none" Currently we only refer to "off" to disable the acceleration, but "none" is probably more familar to users of other drivers. Signed-off-by: Chris Wilson commit 38e8c9104265440242dac2f0ef5b8c619a285be7 Author: Chris Wilson Date: Sat Sep 27 09:37:18 2014 +0100 man: Document the extended values supported by Option "DRI" Signed-off-by: Chris Wilson commit f785035d5bd42a778d4be0bf3ff8678bd7a7e503 Author: Chris Wilson Date: Fri Sep 26 21:01:43 2014 +0100 sna: Allow move-to-gpu to fail during ScreenCreateResources Before we attach the Screen Pixmap to the scanout, we will have to create a GPU bo and apply any fixups as required. Therefore failing to pre-emptively move it during ScreenCreateResource is not fatal and the failure can be simply ignored. Suggested-by: Egbert Eich Signed-off-by: Chris Wilson commit abc9b3f5753d602da296d50c8769cefb88ec473d Author: Chris Wilson Date: Fri Sep 26 09:22:50 2014 +0100 Add Skylake PCI IDs From kernel commit 72bbf0af0c76cbefe9cecbd2ed670b7555e03625 Author: Damien Lespiau Date: Wed Feb 13 15:27:37 2013 +0000 drm/i915/skl: Add the Skylake PCI ids Signed-off-by: Chris Wilson commit 7302f8a6482f4eed497536fc5a8a487c10da4d52 Author: Chris Wilson Date: Thu Sep 25 16:44:08 2014 +0100 sna: Pass scanout hints along to move-to-gpu Signed-off-by: Chris Wilson commit e9087f50bf6dafff87c566d3bdbe6cef29d71fde Author: Chris Wilson Date: Thu Sep 25 16:41:11 2014 +0100 sna: Check scanout Pixmaps are the correct pitch and convert if necessary As a final precaution, fixup the pitch on the bo to be used for scanout by switching the bo on the Pixmap for a new correctly aligned scanout bo. Reported-by: Egbert Eich Signed-off-by: Chris Wilson commit 9f7c1a4c4f2a6352263c36e75a984ed4095adbc0 Author: Chris Wilson Date: Thu Sep 25 16:29:14 2014 +0100 sna: Check for scanout pitch restrictions on linear GPU bo When converting a linear cached CPU bo into an uncached GPU bo, we must be careful to adhere to the scanout restrictions if they apply for this transfer or this Pixmap. Reported-by: Egbert Eich Signed-off-by: Chris Wilson commit 4827c518fe3323eedb56e7af7aef33801236d11f Author: Chris Wilson Date: Thu Sep 25 16:22:06 2014 +0100 sna: Use shadow CRTC bo if we fail to obtain an framebuffer for the Pixmap This should mask driver bugs whereby we ask the kernel to make a framebuffer out of an improper bo. Signed-off-by: Chris Wilson commit f3d27eec52cac63378c0e466db971ae125c813a1 Author: Chris Wilson Date: Wed Sep 24 16:16:25 2014 +0100 sna/gen4+: Assert that the offset coordinate is within range if negative Invalid negative offsets could slip into the drawing rectangle without triggering the assertion - the assertion being that they were not greater than the maximum positive coordinate of the 3d engine. Signed-off-by: Chris Wilson commit a60ccd546e081f5b7bd7de762e1638927a4145a2 Author: Chris Wilson Date: Wed Sep 24 15:55:11 2014 +0100 sna: Relax constant numCrtcs assertion when ZaphodHeads is active If ZaphodHeads is active, each screen only has a subset of the CRTC assigned to it, in fact just the single CRTC associated with the pipe of that screen. In that case, we only expect to have the single CRTC and so should not assert that we have a list of all CRTCS. It should still hold that we dynamically attach ZaphodHeads upon hotplugging, so it is just the assert that is overzealous. Reported-by: Nick Bowler Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84281 Signed-off-by: Chris Wilson commit 7637f547ca34668ef9d4f0c417de16e7126927b5 Author: Chris Wilson Date: Wed Sep 24 15:43:53 2014 +0100 sna: Tweak partial Picture extraction to prefer limiting to max 3D coordinates Where possible, keep the offset of the partial Picture within the 3D coordinate limit so that we can use the DrawRectangle offset to automatically adjust the coordinates. Signed-off-by: Chris Wilson commit 65a23ef90975f95444da103f45eb240b2895ef44 Author: Chris Wilson Date: Wed Sep 24 14:06:30 2014 +0100 sna: Reuse the same buffer when panning large CRTCs Rather than alternating between a pair of fb each time, we can reuse the last shadow buffer so long as it remains the right size. Signed-off-by: Chris Wilson commit 911a0ad8d0520554dc55883997dd59dc3f5f9139 Author: Chris Wilson Date: Wed Sep 24 08:05:01 2014 +0100 sna/trapezoids: Flesh out alternate rasterisers for tristrips And undo the accidental commit of commit 4e00cbe35d1a409a02ee27d991213d9a0807e500 Author: Chris Wilson Date: Mon Sep 22 08:54:57 2014 +0100 traps Signed-off-by: Chris Wilson commit dbe6d105a60ff28419b549d439bbb29f50b28f08 Author: Egbert Eich Date: Wed Sep 24 08:18:32 2014 +0200 sna: Validate framebuffer tiling before creation In sna_pixmap_alloc_gpu() a different than the default tiling may be picked by a usage hint. Before passing the tiling to kgem_create_2d() fix it up by calling kgem_choose_tiling(). This avoids kgem_surface_size() not being able to find a surface size for the tiling value. Fixes regression from commit a10781b70f222f3997928fa979f6292617f79316 [2.99.913] Author: Chris Wilson Date: Tue Jul 1 15:11:07 2014 +0100 sna: Enforce LinearFramebuffer option Signed-off-by: Egbert Eich commit b9dddc051d57b313fdc9f14ec388b060fdff3924 Author: tobias.jakobi1@uni-bielefeld.de Date: Tue Sep 23 20:13:11 2014 +0200 uxa/video: only call intel_xvmc_adaptor_init when xvmc is enabled Build regression from commit 616dea2c67847101fd43b5d89b556b3702c7f0bb Author: Keith Packard Date: Thu Jul 24 10:27:55 2014 -0700 Rename uxa-specific functions and structs Signed-off-by: Tobias Jakobi commit fe6ab444ad9d138aa011df6cee9f2cee65dbf493 Author: Chris Wilson Date: Wed Sep 24 07:54:39 2014 +0100 sna: Initialise the per-CRTC shadow bo on first use When we create the shadow pixmap for the CRTC, we should copy the framebuffer contents into the shadow before we show it the first time. This saves us from showing stale contents until the next redrawn in the BlockHandler - with the proviso that we can do the copy on the GPU. Signed-off-by: Chris Wilson commit 1e403716d387be1d741537e02db207416080dbeb Author: Chris Wilson Date: Wed Sep 24 07:37:32 2014 +0100 sna/present: Make DBG statements uniform before present_event_notify() Signed-off-by: Chris Wilson commit 4e00cbe35d1a409a02ee27d991213d9a0807e500 Author: Chris Wilson Date: Mon Sep 22 08:54:57 2014 +0100 traps commit 376037e6336dfc3b32c51b774ab8a80f64390e02 Author: Chris Wilson Date: Sun Sep 21 19:51:47 2014 +0100 sna: Skip present unflip if the output is rotated With a rotated output and shadow buffers, we never perform the flip in the first place and so can ignore the unflip request as well. Reported-by: Mihail Kasadjikov References: https://bugs.freedesktop.org/show_bug.cgi?id=84105 Signed-off-by: Chris Wilson commit 061785b1688de8dbf7ce9a423d16fb6d52518dc7 Author: Chris Wilson Date: Sun Sep 21 16:44:25 2014 +0100 sna/dri2: Decouple the Client event link on Drawable free We need to keep the two lists in check across asynchronous client/window destruction. Signed-off-by: Chris Wilson commit cae4f4af2a0174ef36b9292eef7b9cf57afbfe83 Author: Chris Wilson Date: Sat Sep 20 19:24:33 2014 +0100 sna/trapezoids: Thread tristrip rasterisation Signed-off-by: Chris Wilson commit 12fc6687949c299d8c13751663217e7b37be7e43 Author: Chris Wilson Date: Fri Sep 19 11:00:39 2014 +0100 sna/gen8: Update DBG output of surface offset Signed-off-by: Chris Wilson commit 5ddd106e8f9b6a8176a7a5a82928067feaec0e03 Author: Chris Wilson Date: Thu Sep 18 10:34:11 2014 +0100 uxa/glamor: Silence compiler warnings Mark the stub intel_glamor_fd_from_pixmap() as inline to silence the compiler warnings about unused function definitions. Signed-off-by: Chris Wilson commit 2a4855a633f42d90e11f5c51342c514c2dc24307 Author: Chris Wilson Date: Tue Sep 16 20:26:28 2014 +0100 sna: Constify argument to box_from_seg() Signed-off-by: Chris Wilson commit 1cc9762b08a127a2475a44da71ca07cb294562f2 Author: Chris Wilson Date: Tue Sep 16 12:14:31 2014 +0100 uxa: Fix conversion of Segments into Rectangles The trick is to make sure we consider the CapLast setting in the direction the line is being drawn and adjust the inked pixels accordingly. Testcase: DrawSegments/hv0 Reported-by: Russell King Signed-off-by: Chris Wilson commit db157b42aaa7880d98fed3e7493a19471e86e534 Author: Chris Wilson Date: Tue Sep 16 11:56:07 2014 +0100 test: Add DrawSegments Compare fb/ddx for many DrawSegments operations. Signed-off-by: Chris Wilson commit e453f276daa33a66a665e446a071d27e56ff15fe Author: Chris Wilson Date: Mon Sep 15 12:08:59 2014 +0100 sna/io: Initialise return code to catch early segfaults In case we are ever given an invalid buffer that we then attempt to read past the end. Signed-off-by: Chris Wilson commit d470f0f520f6bd160ae4acef2b4b3c86afd8dbbd Author: Chris Wilson Date: Mon Sep 15 11:36:20 2014 +0100 sna: Last ditch attempt to make extra large batches fit If we have unfortunate fragmentation, e.g. a cursor is pinned in the middle of an aperture, we can struggle to fit large objects, especially fenced objects on gen2/gen3. We do have one last trick up our sleeves that we can try: disable all of the outputs and cursors and try submitting the batch in as pristine an aperture as we can arrange. We can only hope that the subsequent restoration of the outputs is more conducive to future batches (and so not lead us into continual flicker). Signed-off-by: Chris Wilson commit 435fe185e335a147f5edb803561509e1f0cb4e70 Author: Chris Wilson Date: Mon Sep 15 09:09:19 2014 +0100 sna: Update the list of outputs after a failed modeset In case we have a hotplug at just the wrong time, we can fail a modeset with a stale connector. Before attempting to recover, probe the kernel for the current state. Signed-off-by: Chris Wilson commit 067115a51b2646538a38ba603c688233c61e23cd Author: Chris Wilson Date: Mon Sep 15 08:44:41 2014 +0100 uxa: Stub out intel_sync_init|fini when not compiled in In order to fix the build without DRI3, we need to stub out the functions not compiled in, such as intel_sync_fini(). Reported-by: Sedat Dilek Signed-off-by: Chris Wilson commit 0d451ee3891d87268322dc3b72b487fdd2fbade6 Author: Chris Wilson Date: Mon Sep 15 08:15:04 2014 +0100 configure: Require the presence of xorg/glamor.h for --enable-glamor Check that we have the required Xorg headers for glamor if the user requests --enable-glamor. There is a possiblity that the headers mismatch as they don't have internal versioning, but this should catch the majority of errors early on. Signed-off-by: Chris Wilson commit 11444619457aa8121efc937291f1d944ac42265d Author: Keith Packard Date: Sat Sep 13 01:09:48 2014 -0700 glamor: Do version check for fd <-> pixmap functions glamor_pixmap_from_fd and glamor_fd_from_pixmap were added before version 1.15.99.902, so check for that version before trying to use them. Signed-off-by: Keith Packard Tested-by: Fabio Pedretti commit 48f6406a62c06a09b173d82b8eb79761188ff717 Author: Keith Packard Date: Sat Aug 16 19:05:57 2014 -0700 Use intel_uxa.h in all uxa-specific files Instead of always including intel_uxa.h from intel.h, and including uxa.h from some files directly, use intel_uxa.h directly from .c files that have UXA-specific code in them. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit 8b59a88c23c4795f6d829efb91a0d40e52d20014 Author: Keith Packard Date: Sat Aug 16 18:42:28 2014 -0700 intel_present.c does not need to include uxa.h There aren't any symbols from uxa.h used in this file, remove the #include. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit d83b30b7042dd0207116f4a059637794c4becb04 Author: Keith Packard Date: Sat Aug 16 18:40:40 2014 -0700 Move some UXA-specific code under #if USE_UXA. This makes the UXA-specific elements of intel_screen_private and a bit of code in intel_driver covered under #if USE_UXA Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit e3c06746c7c22dcc2a862859c6f45dd1dfecdca7 Author: Keith Packard Date: Sat Aug 16 18:34:55 2014 -0700 Move UXA hardware initialization into intel_uxa_init Pull this uxa-specific step out of I830ScreenInit Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit 876185cceeb9589ae395e0c2eedd163129f1e51b Author: Keith Packard Date: Thu Jul 24 11:02:35 2014 -0700 Add intel_flush to abstract flushing pending acceleration operations intel_flush flushes any pending acceleration operations to the hardware, just like intel_uxa_batch_submit does today except that it is not uxa-specific. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit 616dea2c67847101fd43b5d89b556b3702c7f0bb Author: Keith Packard Date: Thu Jul 24 10:27:55 2014 -0700 Rename uxa-specific functions and structs This starts to separate uxa from the rest of the driver by renaming uxa-specific functions and structs to make it clear which portions of the driver are uxa-specific and which are common. Signed-off-by: Keith Packard Acked-by: Eric Anholt commit 57c67199d043f3a653436769f1a69947a96d9d5b Author: Keith Packard Date: Sat Jul 19 19:54:39 2014 -0700 Move intel_alloc_framebuffer to intel_memory.c UXA and Glamor both share this function, so move it out of the UXA file. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit ff67a8d885d12d52693c33c52f3c551f69a8acf7 Author: Keith Packard Date: Sat Jul 19 19:59:43 2014 -0700 Do more checks for proposed flip pixmaps Make sure the pitch matches the current framebuffer. Make sure there's a BO we can get at. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit 61305740ef3dcd4ee10b335574d659d7c886d29a Author: Keith Packard Date: Sat Aug 16 17:05:35 2014 -0700 Eliminate pixmap private 'stride' field, which duplicates devKind The pixmap private stride field is an exact duplicate of the devKind field present in the core pixmap; eliminate the duplicate value and replace references by calls to intel_pixmap_pitch. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit 1ac76b47b3dd8d14017271f5abd72664c71021c5 Author: Keith Packard Date: Tue Jul 22 00:54:16 2014 -0700 Don't use GetScratchPixmapHeader for shadow pixmaps GetScratchPixmapHeader should only be used for local memory pixmaps, as used by PutImage and friends. That's because when you free the scratch pixmap header, it doesn't actually free the pixmap; instead, it gets stuffed in pScreen->pScratchPixmap and any private data stored on it will be left hanging around forever. In the case of glamor, that private data includes all of the GL state. Using that scratch pixmap later results in glamor getting mightily confused as the pixmap and underlying objects do not match. Avoid this by allocating pixmap headers explicitly for this purpose. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit 4f5a5683979bae2283775f3b94da32a05e24e0c0 Author: Keith Packard Date: Sat Aug 16 18:36:57 2014 -0700 Declare variable holding option value as 'const char *' This matches the type of xf86GetOptValString. Signed-off-by: Keith Packard commit 4e77993e9965ca65e66bd42b688f7f2e64dd3a7d Author: Keith Packard Date: Wed Jul 30 23:40:55 2014 -0700 Remove redundant calls to drm_intel_bo_disable_reuse intel_allocate_framebuffer has already made the call in each of these code paths. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit c2f214fb549499fe2a1ab245e0438270b1a935ed Author: Keith Packard Date: Sat Jul 19 19:52:56 2014 -0700 Fix present debug output Was using 'low_msc', which isn't defined anymore. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit 9ca7b8771c7f5253fdcafafed751af31f1ad3828 Author: Keith Packard Date: Fri Sep 12 13:44:49 2014 -0700 glamor: Add DRI3 support to glamor code paths This creates wrappers to invoke glamor functions for pixmap_from_fd and fd_from_pixmap when the driver is using glamor. Signed-off-by: Keith Packard commit fa6f6839dc7e23cdbeef4379ded31ead3ea3968c Author: Keith Packard Date: Tue Jun 17 18:12:42 2014 -0700 Correct BO allocation alignment BO allocations for pixmaps must be aligned to the tile height, but at some point the code was changed to align them to twice the tile height. This overallocates pixmaps, wasting memory, but more importantly, for buffers allocated by DRM and shared through DRI3, the stricter alignment check causes sharing to fail. From reading through the history of the code and related bugs, it seems like this change was part of a set of changes trying to address what turned out to be a kernel regression. Reverting this change solves the DRI3 problem and saves a bit of memory for pixmap allocations. Signed-off-by: Keith Packard Tested-by: Kenneth Graunke Reviewed-by: Eric Anholt commit c2a834689142a1b9d8bbe48a6cdc0f5286d8b7e5 Author: Keith Packard Date: Wed Sep 10 09:35:38 2014 -0700 Do not clear pending kernel events on mode switch Let the kernel send these back to us so that DIX hears about them in the usual way. Mode setting while Present has a flip active will trigger an unflip before the mode is changed. The event from that unflip will not get processed before the mode switch is executed. Clearing the driver queue at mode switch time will discard the connection between the kernel event and the present callback so that DIX will never know that the flip pixmap is idle. Signed-off-by: Keith Packard Tested-by: Kenneth Graunke commit 7ed66ca0fd1160ede890c216c35d4ac42a98ab57 Author: Chris Wilson Date: Fri Sep 12 21:17:04 2014 +0100 sna: Remvoe unused code sna_trapezoids_precise.c:566:1: warning: unused function 'polygon_add_line' [-Wunused-function] gen4_vertex.c:3093:1: warning: unused function 'gen4_choose_spans_vertex_buffer' [-Wunused-function] Reported-by: Zdenek Kabelac commit f0d5dbe9bf0d507fd5b60bd7a90be09351f75249 Author: Chris Wilson Date: Fri Sep 12 21:16:12 2014 +0100 sna: Fix include guard ./xassert.h:24:9: warning: '__XASSERT_H___' is used as a header guard here, followed by #define of a different macro [-Wheader-guard] ^~~~~~~~~~~~~~ ./xassert.h:25:9: note: '__XASSERT_H__' is defined here; did you mean '__XASSERT_H___'? ^~~~~~~~~~~~~ __XASSERT_H___ Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 7548f77fff1832c038e624c655d534387619d825 Author: Chris Wilson Date: Fri Sep 12 21:15:18 2014 +0100 intel-virtual-output: Initialise width/height for a disabled output virtual.c:1081:6: warning: variable 'width' is used uninitialized whenever 'if' condition is true [-Wsometimes-uninitialized] if (clone->dst.mode.id == 0) { ^~~~~~~~~~~~~~~~~~~~~~~ virtual.c:1092:6: note: uninitialized use occurs here if (width == clone->width && height == clone->height) ^~~~~ virtual.c:1081:2: note: remove the 'if' if its condition is always false if (clone->dst.mode.id == 0) { ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ virtual.c:1079:11: note: initialize the variable 'width' to silence this warning int width, height; Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit a5a51b55ec07e03c87a9916eca6d023ccaf7d00b Author: Chris Wilson Date: Fri Sep 12 14:31:22 2014 +0100 sna: Mark the CRTC as disabled when hiding the plane Signed-off-by: Chris Wilson commit 5ce4b344e497364b16a507b39b7637a00daa957a Author: Chris Wilson Date: Fri Sep 12 14:29:12 2014 +0100 sna: Avoid stalls when promoting to the GPU before an operation In particular, the promotion of an active snooped bo into an uncached linear GPU bo was being performed on a busy buffer and forcing a stall. Signed-off-by: Chris Wilson commit fc4bc3cde9e35ecde5b2c8eeecdbbb6ba29f32ae Author: Chris Wilson Date: Fri Sep 12 16:10:12 2014 +0100 sna: Initialise remaining batch space Another missed gcc warning resulting in a crash due to a missing kgem_batch_space() initialisation. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 9fb399aee99ad98996f872477c133f08795ec54c Author: Chris Wilson Date: Fri Sep 12 08:24:06 2014 +0100 sna/blt: Fix computation of remainaing boxes on gen8+ Signed-off-by: Chris Wilson commit e3edf2948467ad989590a347ffe687780192be16 Author: Chris Wilson Date: Fri Sep 12 07:53:12 2014 +0100 sna: DBG compile fix Dereference the right output for the name in the new backlight functions. Signed-off-by: Chris Wilson commit 1aefd16964c30264c05d136cef3e1e7de5eb9c53 Author: Chris Wilson Date: Fri Sep 12 07:46:43 2014 +0100 sna: Use default monitor options on the first output commit 6554cf0a69f04710b64f3488384fe5cb2748dc35 Author: Chris Wilson Date: Mon Aug 11 12:22:17 2014 +0100 sna: Parse output options early during initialisation rearranged the monitor query to before the num_outputs increment. The result was that it choose the second output as the default and not the intended first. Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=522500 Signed-off-by: Chris Wilson commit 9e397830f5ea56f2e43430666c78ffc574058d45 Author: Chris Wilson Date: Thu Sep 11 17:02:37 2014 +0100 sna/gen8: Re-enable userptr Current testing says that it is stable now... Let's see how long that holds. References: https://bugs.freedesktop.org/show_bug.cgi?id=79053 Cc: Mika Kuoppala Signed-off-by: Chris Wilson commit 797369449b87cbd578f9fb96f34b065e548755f6 Author: Chris Wilson Date: Thu Sep 11 09:37:11 2014 +0100 sna: Do not mark the pixmap as cleared in the middle of a miSpans decomposition As the miSpans will continue to overdraw the Pixmap, it's final state will no longer be that clear value. We need to be much more careful when allowing that optimisation. Reported-by: Tyler Foo References: https://bugs.freedesktop.org/show_bug.cgi?id=77074 Signed-off-by: Chris Wilson commit fda1ffb07e17469771bba7a8d53fd44c43ee3333 Author: Chris Wilson Date: Thu Sep 11 08:11:34 2014 +0100 sna: Request the backlight to be disabled along with DPMS off When we turn off the screen, either at the user request or when disabling an output, request that the associated backlight (which may only be known to userspace) also be disabled. Signed-off-by: Chris Wilson commit 08921e4bda0114c66270e500090e4cfd29f74d39 Author: Chris Wilson Date: Thu Sep 11 08:03:41 2014 +0100 backlight: Expose interface to switch backlight on/off entirely A feature in recent kernels is to disambiguate between the meaning of brightness=0, between disabling the the backlight entirely or setting the lowest valid brightness. As such, we now have an extra knob in sysfs to explicitly request that the backlight be turned off. Signed-off-by: Chris Wilson commit f2b62ab38f0f5970b2f868e10dc3499ff3118dbb Author: Chris Wilson Date: Wed Sep 10 16:52:36 2014 +0100 sna: Prune damage that covers the entire target Pixmap Reduce it early and mark it complete. Signed-off-by: Chris Wilson commit 9b25eeee85d32223841640c3a39901e4b63707ce Author: Chris Wilson Date: Wed Sep 10 16:37:16 2014 +0100 sna: Do apply damage twice for miSpans.PolyFillRect As the caller will apply the damage afterwards, we do not need to do the accumulation in the miSpans callbacks and it presumes that its damage is unaltered. References: https://bugs.freedesktop.org/show_bug.cgi?id=77074 Signed-off-by: Chris Wilson commit 224af800f695b50ba5a65b5a2b9ca1e7a88d4e1a Author: Chris Wilson Date: Wed Sep 10 11:48:40 2014 +0100 sna: Emit assertions with FatalError The intention is to be able to capture the assertion in the Xorg.0.log (journald equivalent). At the moment, it is emitted to stderr which is difficult to capture and defeats the goal of only asking the reporter to upload one log file. Signed-off-by: Chris Wilson commit 0d1df4762ffd7babb95a5f48f77487a6c7db83fe Author: Chris Wilson Date: Wed Sep 10 08:36:18 2014 +0100 sna: Relax early failure to set KMS modes Under the new world order, we may not have KMS rights until we are given a VT. Signed-off-by: Chris Wilson commit f39e1d19c166a97a74974edf3fe79082d3a46d2b Author: Chris Wilson Date: Wed Sep 10 07:04:55 2014 +0100 sna: Fix use of GETBLOB ioctl for grabbing the MST path Unlike the other drm getters, GETBLOB insists on the exact length rather than being told the buffer size. Reported-by: Dave Airlie Signed-off-by: Chris Wilson commit 07fe45b84bdf0d236a5bfdc433cc1a908e0c161b Author: Chris Wilson Date: Tue Sep 9 08:12:45 2014 +0100 sna/glyphs: Prevent NULL vfunc deref with glyphs Requires running a PRIME setup with Intel loaded as the secondary GPU and attempting to execute an empty glyph string. Signed-off-by: Chris Wilson commit faf0bdd477b9ec73f943c3101a3ae30fd6d579ea Author: Chris Wilson Date: Tue Sep 9 07:36:40 2014 +0100 sna: Add some DBG spam for BLT boxes References: https://bugs.freedesktop.org/show_bug.cgi?id=77074 Signed-off-by: Chris Wilson commit e0f7e9fc2f0b39b9e939ff48edea29950f125420 Author: Chris Wilson Date: Mon Sep 8 16:49:29 2014 +0100 sna: Initialise and check for batch space commit 30932a7b9d255c2037bee19e01aa3edc37b07386 Author: Chris Wilson Date: Mon Sep 8 12:41:06 2014 +0100 sna: Avoid u16 underflow when computing reserved batch space relied on gcc a little to much to warn me when I missed initialising 'rem' References: https://bugs.freedesktop.org/show_bug.cgi?id=77074 Signed-off-by: Chris Wilson commit 30932a7b9d255c2037bee19e01aa3edc37b07386 Author: Chris Wilson Date: Mon Sep 8 12:41:06 2014 +0100 sna: Avoid u16 underflow when computing reserved batch space If we filled the batch exactly, then subtract -1 for the reserved BATCH_BUFFER_END, it would underflow to a large value - convincing us that we had sufficient room to stuff many, many more commands in. However, all the callsites should be guarded by checking already that they had sufficient space to emit at least one operation... References: https://bugs.freedesktop.org/show_bug.cgi?id=77074 Signed-off-by: Chris Wilson commit 692c14d405bb352697b67f36a034d4963e272b66 Author: Chris Wilson Date: Mon Sep 8 08:53:32 2014 +0100 2.99.916 snapshot commit 84fb3bb65ff917b908a1036540432bfd5525481d Author: Dave Airlie Date: Mon Sep 8 17:46:18 2014 +1000 uxa: actually create the randr outputs for hotplug connectors I somehow lost this chunk in my mst patch I sent. Signed-off-by: Dave Airlie commit 001c542618aad25137029dcc28aa520766040964 Author: Chris Wilson Date: Mon Sep 8 07:54:25 2014 +0100 2.99.915 snapshot commit db01c9d627412f05f5e5448b5f4c1d3814d522fa Author: Chris Wilson Date: Mon Sep 8 07:13:47 2014 +0100 sna: Fix backlight assertion after only hiding planes If we only hide the planes, we do not turn off any outputs and so can skip resetting the backlight entirely. Signed-off-by: Chris Wilson commit da0c9638d7c54b12990531fc478b2dd523ed4db9 Author: Chris Wilson Date: Mon Sep 8 07:07:08 2014 +0100 sna: Fix an unreachable piece of code It doesn't do anything but the static analyzers at bay. Signed-off-by: Chris Wilson commit 908520a7dacade8b6716e7c30549847464a33a81 Author: Dave Airlie Date: Wed Sep 3 10:43:21 2014 +1000 uxa: add MST support. This adds MST support to the UXA paths in the driver. Signed-off-by: Dave Airlie [ickle: Restore current output naming scheme] commit b64a8f0e3e850e698a66e93fde36f846b39ea8cb Author: Dave Airlie Date: Wed Sep 3 10:43:20 2014 +1000 uxa: drop mode_res caching. This will cause problems with MST displays which need to update the connector list after topology changes. Signed-off-by: Dave Airlie commit aca0bf6387c159a3d54dbbe52dd65fd92df98216 Author: Chris Wilson Date: Sun Sep 7 13:32:12 2014 +0100 sna/gen2: Fallback to kernel batch w/a rather than incur a stall If we have no pinned batches available, use the kernel w/a if available rather than stall waiting for an active batch. Signed-off-by: Chris Wilson commit 57bf3d5f0fb4429b0991ad6f22000348820f5bd1 Author: Chris Wilson Date: Sun Sep 7 17:22:31 2014 +0100 sna: Disable the fb on switching away from X Currently we turn off the CRTCs when switching away from X in order to not leak our framebuffer. With the new drm_plane support, we can simply unset the framebuffer, which should be a lighterweight operation than disabling the CRTC. Signed-off-by: Chris Wilson commit c17d3b5d5cdbda510a2b6955c3a171457ecde7e5 Author: Chris Wilson Date: Sun Sep 7 17:20:29 2014 +0100 sna: Compute clones on final ordering The clones are indices into the output arrays, so recompute the clones if we reorder the outputs. Signed-off-by: Chris Wilson commit aa10f480c566b8523cdd49b3e23f64b7b9625987 Author: Chris Wilson Date: Wed Sep 3 10:24:19 2014 +0100 sna: Drop false IGNORE_DAMAGE hint IGNORE_DAMAGE is used by sna_drawable_use_bo to ignore both CPU/GPU damage. It used to only ignore CPU damage, but now is a more general hint. However, here we were intending to only say ignore the cpu damage that we explicitly discarded anyway. References: https://bugs.freedesktop.org/show_bug.cgi?id=81973 Signed-off-by: Chris Wilson commit 51e364ded28e9a8e02a380c041a2c5784381df35 Author: Chris Wilson Date: Wed Sep 3 10:23:18 2014 +0100 sna: Trace move-to-gpu overrides with extra DBG Signed-off-by: Chris Wilson commit ee7ed478a2bb81c923d29106b0b1dfd73161c2fc Author: Chris Wilson Date: Wed Sep 3 08:20:03 2014 +0100 sna: Skip over hotunplugged outputs during CRTC set These outputs are already marked as disconnected and so should be excluded from the CRTC set, but to be safe skip over them. Signed-off-by: Chris Wilson commit 48a33fc379b17eed195875222ad773c911d9dff1 Author: Chris Wilson Date: Tue Sep 2 19:08:36 2014 +0100 sna/trapezoids: Use the corrected trapezoid origin for aligned boxes The rule for the origin of the CompositeTrapezoids routine is the upper-left corner of the first trapezoid. Care must be taken in case the trapezoid edge is upside down to consider the upper vertex. Reported-by: "Jasper St. Pierre" Signed-off-by: Chris Wilson commit 84333f6213abb28838656d8352fd537ad68e4189 Author: Chris Wilson Date: Tue Sep 2 19:13:16 2014 +0100 sna: Leave more Pixmap breadcrumbs in DBG Add the Pixmap id to various DBG messages to make it easier to track rendering. Signed-off-by: Chris Wilson commit 407817ebb9129f1b946c7ba68e3e05d9540f478c Author: Chris Wilson Date: Mon Sep 1 17:02:44 2014 +0100 sna: Reject invalid CopyArea based on source clipping earlier Given a ridiculous CopyArea, say copying from (-32000,-32000), the region extents will wrap around when translated before the final clip and reject test. To overcome this, do source based rejection earlier before the potential underflow. Signed-off-by: Chris Wilson commit 92b37783eb2e9166efd82325f14d05de6a082081 Author: Chris Wilson Date: Mon Sep 1 15:05:05 2014 +0100 test/README: Add missing trailing characters from cut'n'paste When copying the command from the terminal I failed to highlight the last character. Signed-off-by: Chris Wilson commit ab01c1211e40f788fb2970ad03930bbaa92e58d4 Author: Chris Wilson Date: Mon Sep 1 13:37:30 2014 +0100 sna: Fallback to normal composite if the blt redisplay fails Signed-off-by: Chris Wilson commit 21cc987ca8a531e399350564a5af7f551406b8d6 Author: Chris Wilson Date: Mon Sep 1 07:19:09 2014 +0100 sna: Only decouple the event once If the client and drawable destroys are racing, we may trigger the event removal twice. References: https://bugs.freedesktop.org/show_bug.cgi?id=83183 Signed-off-by: Chris Wilson commit 2c564c04bcde88d730ca111acfb6798bdf0d66da Author: Jonathan Gray Date: Sun Aug 31 18:48:56 2014 +1000 configure: check for cpuid.h Instead of checking for a particular version of GCC check for a cpuid.h with __cpuid_count. This allows cpuid.h to be provided for older/different compilers. Signed-off-by: Jonathan Gray [ickle: Delete the bare and redundant config.h] commit e8ad453a0ae9d701b41cc026d5d40f55dd4590c5 Author: Chris Wilson Date: Sun Aug 31 11:45:57 2014 +0100 intel: Only include sys/mount.h on Linux We only automount debugfs for Linux, but sys/mount.h on BSD has unmet dependencies breaking the build. Reported-by: Jonathan Gray Signed-off-by: Chris Wilson commit 2086965e5c0781e0a3996de89e4dda03c5d42610 Author: Chris Wilson Date: Fri Aug 29 10:37:09 2014 +0100 gen8: Refresh video render programs Reported-by: Timo Aaltonen References: https://bugs.freedesktop.org/show_bug.cgi?id=83207 Signed-off-by: Chris Wilson commit b822bc8c2c0b47dfc391c86c3e5764f718898dce Author: Chris Wilson Date: Fri Aug 29 10:14:35 2014 +0100 sna/gen8: Check instead of asserting for a hang whilst setting up video state Signed-off-by: Chris Wilson commit 8f584f83dc8440f0cbec7db3ed8a071d4896c25a Author: Chris Wilson Date: Fri Aug 29 09:52:51 2014 +0100 tests: Add a couple of gstreamer pipeline hints Having worked out how to use gstreamer, record the pipelines for posterity. Signed-off-by: Chris Wilson commit 69d584c6acdcd645ee4cc4892e56940d2d4074f6 Author: Chris Wilson Date: Fri Aug 29 07:26:32 2014 +0100 sna: Prepare fr changes in dirty tracking api (Prime) Future commit "pixmap: fix reverse optimus support with multiple heads" will allow for tracking within pixmaps (i.e. break the presumption that everything starts at offset 0,0 in the target pixmap). Signed-off-by: Chris Wilson commit f95d04b75b71ad523eb3e0e3fc9ad711c58ab43b Author: Chris Wilson Date: Wed Aug 27 10:05:07 2014 +0100 intel-virtual-output: Use snprintf() for simplicity Third one-line patch to fix copying from the tainted user argument into the socket's path buffer. This time, give in and just use snprintf() as it guarrantees that it will not write more than 'n' characters and that the last is a NUL byte. Suggested-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 011f04ff8e9aca696e26ecef0e68132a24a9b094 Author: Chris Wilson Date: Tue Aug 26 18:30:17 2014 +0100 intel-virtual-output: Fix invocation of strncpy() Somebody (me) confused it with snprintf() and put the string length in the wrong location. Also note that strncpy() does not NUL terminate long strings. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 016599783cf3e1a3e2362c82c8767a7398048db7 Author: Chris Wilson Date: Tue Aug 26 12:44:58 2014 +0100 intel: Limit read to always fit in the buffer Reported-by: Zdenek Kabelac Suggested-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit e827f80e5c07ac13802a24753b249e05e18a290e Author: Chris Wilson Date: Tue Aug 26 12:42:11 2014 +0100 intel-virtual-output: Sanity check length on user supplied socket path Reported-by: Zdenek Kabelac Suggested-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 51037706b068b52b7c8984527c209d295e1e3584 Author: Chris Wilson Date: Tue Aug 26 11:43:28 2014 +0100 sna: Fix attaching to a headless configuration ADDFB fails with a headless config (as any fb size is invalid). Fortunately, with headless we can use any depth we like. Signed-off-by: Chris Wilson commit 8c5229cf8fc642f8b7e091c38bfd27032ee5e48c Author: Chris Wilson Date: Sun Aug 24 16:25:05 2014 +0100 sna: Make one last gasp at submitting the execbuffer before bailing Signed-off-by: Chris Wilson commit d209b03915e4d12ce445d72ac09bb4fe664ba664 Author: Chris Wilson Date: Sun Aug 24 07:05:35 2014 +0100 configure: Add guards for os.h redefines os.h redefines a few common libc functions, so check if the host provides them first and inform os.h if that is the case. Suggested-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 12c051d5c673d79c16a3a1478c0977799484ca95 Author: Chris Wilson Date: Sat Aug 23 15:33:13 2014 +0100 sna/dri2: Unhook event from draw list upon client destruction When the client goes away, we need to free its events. However, we have to defer the freeing of any pending event (ones currently routed through the kernel) for those we need to remember to decouple the event from the Drawable's list before they are freed. Reported-by: John Lindgren Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82979 Signed-off-by: Chris Wilson commit 1bbacf80a9c4e7a259f896064b5cb147c4523f12 Author: Chris Wilson Date: Sat Aug 23 15:32:39 2014 +0100 sna/dri2: Assert event is queued when marked as next pending flip Signed-off-by: Chris Wilson commit 48000371c9fba8dfa84ffd3228e8f74cc477ddce Author: Chris Wilson Date: Sat Aug 23 15:02:24 2014 +0100 sna/dri2: Remove the redundant parameter passed to free event draw is always the same as event->draw, so just use event->draw. Signed-off-by: Chris Wilson commit fef2f4dbaeb6e206786d63dafe4156f978a4422d Author: Chris Wilson Date: Fri Aug 22 18:57:32 2014 +0100 sna: DBG message fix for !xvmc Signed-off-by: Chris Wilson commit 9b2cf5c7ab6e1a4a9aa46b297fb2f90cb09124ec Author: Chris Wilson Date: Thu Aug 21 08:17:41 2014 +0100 sna: Propagate failure from changing backlight value Especially when we delete the output property halfway through and the ChangeProperty routine then attempts to wire it back up... Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82833 Signed-off-by: Chris Wilson commit 61ec162dc9f4204e26e7786ef26e7abf9ed37ed2 Author: Chris Wilson Date: Thu Aug 21 07:21:59 2014 +0100 backlight: Move the fd out of the select range Signed-off-by: Chris Wilson commit 726f1a38a572a8a6121e5194269fb549c363d9f6 Author: Chris Wilson Date: Thu Aug 21 07:04:01 2014 +0100 sna: Only send the bl change notification if the randr_output exists Signed-off-by: Chris Wilson commit f5469681b620d9d6ccaf53e92ed31f931cb03b0d Author: Chris Wilson Date: Mon Aug 18 14:37:44 2014 +0100 sna: Be defensive during FreeScreen() Signed-off-by: Chris Wilson commit bfacb9d8dcd0fd590af3cb9fddc81904ef1e273b Author: Chris Wilson Date: Mon Aug 18 14:37:19 2014 +0100 sna: Add some DBG warnings for early PreInit failures Signed-off-by: Chris Wilson commit 02f184e0ef428d9d80fecbaa438a7cbd87c18a91 Author: Chris Wilson Date: Mon Aug 18 07:43:21 2014 +0100 test: Make SHM tests in lowlevel-blt-bench optional A slightly more complex patch to disable the SHM based tests of lowlevel-blt-bench when MIT-SHM support is not available at compile time. Signed-off-by: Chris Wilson commit 9058dac3029b0e4f35eaa8ac101d38f3071f3c52 Author: Chris Wilson Date: Mon Aug 18 07:23:27 2014 +0100 test: Only compile lowlevel-blt-bench if we have shm Since 37ac34c4e4500bfc272222754949edc1dbb8c7e2, lowlevel-blt-bench requires SHM support, so only compile it if we detect such during configure. Signed-off-by: Chris Wilson commit 16b9447c5178611ce32e10620e62007ba5445918 Author: Chris Wilson Date: Mon Aug 18 07:00:48 2014 +0100 intel: Only dump debugfs on linux Other platforms are not going to have the same debug infrastructure, nor even the same mount(2). Signed-off-by: Chris Wilson commit f8e632f396bf4b0473dca0516567d56a29954cf3 Author: Chris Wilson Date: Thu Aug 14 21:35:34 2014 +0100 sna: Select appropriate tiling mode for TearFree shadow buffer Signed-off-by: Chris Wilson commit c3b093b3c0676d6c9851af2b0c16806140c55258 Author: Chris Wilson Date: Thu Aug 14 21:32:48 2014 +0100 sna: DBG log invalid surface sizes Signed-off-by: Chris Wilson commit e59ea828f521e2f1963152a9211c36b8091bf655 Author: Chris Wilson Date: Thu Aug 14 21:31:32 2014 +0100 sna: DBG log all bo allocation failure paths Signed-off-by: Chris Wilson commit 9b8f7db5c93b4b687670ad9340fec6a857cd065e Author: Chris Wilson Date: Thu Aug 14 21:27:34 2014 +0100 sna: DBG Log all failure paths in allocating CRTC pixmaps Signed-off-by: Chris Wilson commit e461427ad3667554a01b5b74525a15d19538a8e5 Author: Chris Wilson Date: Thu Aug 14 21:19:10 2014 +0100 sna: Add error message to explain modesetting failures due to allocation Since this is an error path with a major user visible failure (the modeset fails), make sure that we log the reason. Signed-off-by: Chris Wilson commit 72ed21c694aecba1e91089479b2cb5f957548fec Author: Chris Wilson Date: Thu Aug 14 21:09:12 2014 +0100 sna: Do not force creation of a linear GPU bo that we don't want Signed-off-by: Chris Wilson commit 3bb9311e5de8bb39423397213d3de0e0ec4fcbd5 Author: Chris Wilson Date: Thu Aug 14 17:38:49 2014 +0100 sna: Use a shadow buffer for linear framebuffer Signed-off-by: Chris Wilson commit 0f1280bab9c99b15ba835a0094d8b849846d13f6 Author: Chris Wilson Date: Thu Aug 14 07:37:06 2014 +0100 sna/dri2: Fix compilation with Xorg-1.12.4 In Xorg-1.12.4 we have DRI2 version 6 (and so triple buffering support by Xorg) but we don't yet have Prime. Remove the check for the Prime bug in the Xserver for that case. Reported-by: Axel Rohde Signed-off-by: Chris Wilson commit d974dabc8ac06e76bffe5824caf86fd072c35ed3 Author: Chris Wilson Date: Wed Aug 13 07:58:57 2014 +0100 sna: Relax the square cursor assumption Internally only use a square cursor, but 845g/865g actually supports rectangular cursors (as they have a relaxed cursor height restriction). Signed-off-by: Chris Wilson commit ec10cef592b7a3d1dc3c4949778e72e8cd156245 Author: Chris Wilson Date: Tue Aug 12 10:52:12 2014 +0100 sna: Only apply a DPMS change for an enabled CRTC Mostly paranoia, but we need to validate that the stored mode is valid before applying the modeset. Signed-off-by: Chris Wilson commit 9cc72c2dc7130d3d5731f7e75f35f10302389f08 Author: Chris Wilson Date: Tue Aug 12 10:49:20 2014 +0100 sna: Suppress "switch to mode" messages for internal CRTC applies We only want to log a mode change when it is initiated by the user. For internal updates, such as changing the frame or restoring a mode from DPMS, we want to silently apply the current mode. Signed-off-by: Chris Wilson commit b3138bee8db7db6ebaa10ecdd09c47f899d24c8c Author: Chris Wilson Date: Tue Aug 12 09:00:04 2014 +0100 sna: Separate panel checks from adding default modes The flags are now separate, so treat them individually. Signed-off-by: Chris Wilson commit 6554cf0a69f04710b64f3488384fe5cb2748dc35 Author: Chris Wilson Date: Mon Aug 11 12:22:17 2014 +0100 sna: Parse output options early during initialisation Before we can query whether an option is set, we first need to generate the options table. This is done through xf86OutputUseScreenMonitor() so make sure it is called as early as possible in the proceedings. Signed-off-by: Chris Wilson commit 8e1961e7fc163f3103b2260cca965aefa61fed40 Author: Chris Wilson Date: Sun Aug 10 06:51:33 2014 +0100 sna: Respect monitor option "DefaultModes" The is a monitor option to allow the user to specify whether to add the default modes, use it to determine adding the extra modes for panels. Signed-off-by: Chris Wilson commit f6e85048b0789162e389ad2b838d417d517d62d9 Author: Chris Wilson Date: Sat Aug 9 08:02:39 2014 +0100 sna: Reorder output array to match primary placement for InitialConfiguration xf86InitialConfiguration() depends upon the order of the outputs for its mode selection and expects the Primary output to be listed first. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82205 Signed-off-by: Chris Wilson commit 5c7965f00f85fbe3af69029d3fd1e5e2e079f159 Author: Chris Wilson Date: Sat Aug 9 07:37:58 2014 +0100 intel: If need be, try mounting debugfs If we require debugging information from debugfs and we cannot find it, silently mount it and dump the information we need. Signed-off-by: Chris Wilson commit dea65e8be73b79c50f7ee59c54c4c75cbcff67fb Author: Chris Wilson Date: Sat Aug 9 07:12:23 2014 +0100 intel: Log open clients on master takeover fail If we fail to claim the DRM device as master, dump /debugfs/.../clients so that we can check to see who failed to drop master for us. Signed-off-by: Chris Wilson commit 8d135867c886e98fa0bc5a7a21a1b3d84851daaa Author: Chris Wilson Date: Fri Aug 8 14:04:14 2014 +0100 sna: Update check for static driver data on loading error Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xorg-server/+bug/1354424 Signed-off-by: Chris Wilson commit 59f0374188e6d2eb2fd18e3dfb517087e09ae13f Author: Chris Wilson Date: Fri Aug 8 10:26:13 2014 +0100 sna: Restore the clear before pwriting the cursor Along the legacy phys cursor path, we use a common scratch buffer. As this is global, we need to be careful not to trust the cursor local dirty tracking and be sure to clear the image before uploading. Reported-by: Dirk Griesbach Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82337 Signed-off-by: Chris Wilson commit afea9ba0790a951c6a00b57d0d71876dd1ce98c3 Author: Chris Wilson Date: Fri Aug 8 08:17:15 2014 +0100 Prepare for spurious Xv ABI changes Signed-off-by: Chris Wilson commit 6f69188cb2959abfb2fcd3f81cd4146aa3876bb5 Author: Chris Wilson Date: Fri Aug 8 07:25:03 2014 +0100 sna: Clear old cursors when resizing When changing the stride on a cursor, we have to clear the whole area and not just the rectangle outside of our overwritten area. Reported-by: Jan Alexander Steffens Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82273 Signed-off-by: Chris Wilson commit fab976cef80aad2c573cfc6febeec5ec8e3bab06 Author: Chris Wilson Date: Thu Aug 7 14:35:22 2014 +0100 uxa: Compile fix for Ubuntu 11.04 ../../../src/uxa/intel_uxa.c: In function 'intel_uxa_init': ../../../src/uxa/intel_uxa.c:1557:27: error: 'true' undeclared (first use in this function) ../../../src/uxa/intel_uxa.c:1557:27: note: each undeclared identifier is reported only once for each function it appears in Signed-off-by: Chris Wilson commit 52c1e64692e3e80826e526dd14aec4bee137a19b Author: Chris Wilson Date: Thu Aug 7 11:34:26 2014 +0100 sna: Flush cursor width changes The kernel only sees changes in the cursor width when the cursor handle is updated. In the cases where we reuse larger bo for smaller cursors, make sure we then reset the cursor handle (even though it has not changed) so tht the kernel updates its width. Signed-off-by: Chris Wilson commit 7763a3da89fac7cbe571535eebd999d178c39e83 Author: Chris Wilson Date: Thu Aug 7 07:50:54 2014 +0100 test: Exercise different cursor sizes Signed-off-by: Chris Wilson commit 105d478cdd70ac3b38be51c9014b22b7233c241e Author: Chris Wilson Date: Wed Aug 6 09:10:30 2014 +0100 sna: Enable kernel rotation support by default The kernel API is now upstream and so we can rely on it not changing. Time to use it. Signed-off-by: Chris Wilson commit f36b7a4aac86f5874c32d8f516ac1f00a6c8d8b3 Author: Chris Wilson Date: Tue Aug 5 16:38:42 2014 +0100 intel: Use NOACCEL to avoid a symbol clash on old Xorg Old Xorg xf86str.h defines NONE preventing us from using it within an enum. Use NOACCEL instead. Signed-off-by: Chris Wilson commit c5e654cf2afcafbe3732548359771747dac1ce26 Author: Chris Wilson Date: Tue Aug 5 16:21:19 2014 +0100 sna: Set the RandR primary output from the option If the user specifies the Option "Primary" for a monitor, we need to set it as the RandR primary output. Signed-off-by: Chris Wilson Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82193 commit 999c8dc700a0573859ec1aaae4500493d01d0c0c Author: Chris Wilson Date: Tue Aug 5 15:36:26 2014 +0100 sna: Add intermediate modes to any output with a scaler Signed-off-by: Chris Wilson commit cea47f8cfcd810c103740ec7ee9caeecba1e30f4 Author: Chris Wilson Date: Tue Aug 5 15:30:11 2014 +0100 sna: Add DSI to the list of recognised panel connectors. Signed-off-by: Chris Wilson commit 941ae4c868279c994756a2a476af2cd32afc6d35 Author: Chris Wilson Date: Tue Aug 5 10:19:05 2014 +0100 sna: Add some extra logging for hotplugging of outputs References: https://bugs.freedesktop.org/show_bug.cgi?id=82153 Signed-off-by: Chris Wilson commit 5926da0ab3339bbfd55a27ac84a8306b8d931181 Author: Chris Wilson Date: Mon Aug 4 16:25:36 2014 +0100 sna: Mark the current mode as preferred if no other mode is Signed-off-by: Chris Wilson commit ab3f1526f19ec405dca8ab3094a626096dc30358 Author: Chris Wilson Date: Mon Aug 4 16:23:00 2014 +0100 sna: Add the current CRTC mode last We only want to add the current mode to the modelist if it is not already present in the EDID. At the moment, we always add the current mode first which causes the list to be reordered. If we add it after checking the EDID, then we will not perturb the list. Signed-off-by: Chris Wilson Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82068 commit ebd1907304c538bcc27614bc8e2e29f317ffb390 Author: Edward Sheldrake Date: Mon Aug 4 18:53:38 2014 +0100 backlight: Fix regression The backlight xrandr property is missing unless the backlight level was 0 on starting X, regression introduced in commit f9e7ac7db7b0331131aa1df3a90d4b2692949efa Author: Chris Wilson Date: Wed Jul 23 21:53:31 2014 +0100 backlight: Set structure to safe values when not initialised Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82146 commit 926631ee4148dbe2c53def01c98d568b80d46d53 Author: Chris Wilson Date: Sun Aug 3 18:23:31 2014 +0100 sna: Restore single CRTC flips CRTC flips depend upon having a proxy front buffer, so commit 33a0dd8f0b1e31e501825dc66f7ec2d85b55a7f4 Author: Chris Wilson Date: Tue Jul 29 09:11:01 2014 +0100 sna/dri2: Also check for stale buffers before exchanges was false and disabling every other CRTC flip. However, commit 70868c7aa881b15b7478f7ee4543fde0268a4ba6 Author: Chris Wilson Date: Wed Jul 23 08:37:46 2014 +0100 sna/dri2: Recreate buffer in reuse rather than force recreate was not the entire story and to prevent unnecessary confusion when multiple clients share the same front buffer, we have to force the recreation of the back. Do this inside the xchg routine to avoid the confusion first fixed by 70868c7aa881b15b7478f7ee4543fde0268a4ba6. Signed-off-by: Chris Wilson commit 623fa61090fb288062d68257a5c72d8da1fbfc9c Author: Chris Wilson Date: Sun Aug 3 18:08:12 2014 +0100 sna: Rearrange showing cursors Just tidying and explaining why cursor show on a particular pipe may be skipped. Signed-off-by: Chris Wilson commit 0b938573353aab70536d913b2d078181a3c9a1a4 Author: Chris Wilson Date: Sun Aug 3 18:08:02 2014 +0100 sna: Add some paranoid asserts around get_window_pixmap() Signed-off-by: Chris Wilson commit 4de3f9bd79d8e42f9767c9fe44d553cfb749ac65 Author: Chris Wilson Date: Sun Aug 3 07:33:35 2014 +0100 sna: Relax restriction on fenced aperture check This is done upfront based on the fenced size within the batch, so we do not need to assume everything is fenced later on. Signed-off-by: Chris Wilson commit af60a104acfcc64a63987f93bb77ffa21be1ead1 Author: Chris Wilson Date: Sat Aug 2 19:18:29 2014 +0100 sna: Restrict fencing to only use the low 256MiB Somce early machines have 512MiB apertures, but we can still only use the low 256MiB for fencing. Separate out the mappable restriction checks from the fencing in order to further constrain those devices. Reported-by: Matti Hämäläinen Signed-off-by: Chris Wilson commit d11512406daeaabf2549831505811725e1375e5e Author: Chris Wilson Date: Sat Aug 2 19:08:06 2014 +0100 sna: Remove dead assertion sna_display.c: In function 'sna_crtc_redisplay': sna_display.c:6393:9: error: 'sna_crtc' undeclared (first use in this function) assert(sna_crtc); Signed-off-by: Chris Wilson commit a1a0b9c2e49d03e373695df8828c8d4c6312e5ac Author: Chris Wilson Date: Fri Aug 1 12:02:58 2014 +0100 sna/glyphs: Eliminate an extra conditional from glyphs-to-dst Signed-off-by: Chris Wilson commit fc2de62496061b9d0bace02729765344bd939122 Author: Chris Wilson Date: Fri Aug 1 12:00:05 2014 +0100 sna/glyphs: Fallback to masked glyphs if rendering to a too wide dst Fixes regression from commit 79399ff9264ff23da0ab95131a67d2ac85651b3d Author: Chris Wilson Date: Mon Mar 24 10:46:57 2014 +0000 sna: Eliminate a few conditionals in glyph fast path for large pixmaps (such as extended desktops on gen2/gen3). Bugzilla: https://bugs.archlinux.org/task/40949 Signed-off-by: Chris Wilson commit ce804875914f52dba5356f8aefec850d411b051a Author: Chris Wilson Date: Thu Jul 31 16:18:02 2014 +0100 i810: Fix startup after marking GPU screens in the module Fixes regression from commit d6830190bc9956f485db6c3420f7a4a79793a693 Author: Chris Wilson Date: Wed Jul 23 10:53:40 2014 +0100 sna: Disable all outputs when initializing as a slaved output provider Reported-by: Tobias Powalowski Signed-off-by: Chris Wilson commit a6a60ec606e291323ee0b6e83679ff277a0bd84a Author: Chris Wilson Date: Wed Jul 30 07:42:04 2014 +0100 sna: Silence a compiler warning sna_display.c: In function 'sna_crtc_redisplay': sna_display.c:6390:19: warning: unused variable 'sna_crtc' [-Wunused-variable] struct sna_crtc *sna_crtc = to_sna_crtc(crtc); Signed-off-by: Chris Wilson commit 33a0dd8f0b1e31e501825dc66f7ec2d85b55a7f4 Author: Chris Wilson Date: Tue Jul 29 09:11:01 2014 +0100 sna/dri2: Also check for stale buffers before exchanges Not impossible after all - usually after a client error. Signed-off-by: Chris Wilson commit 376272be367c2712304a16da0f9362ffae5be0a7 Author: Chris Wilson Date: Tue Jul 29 09:02:36 2014 +0100 sna: Skip grabbing the main framebuffer id If we aren't using it, we can forgo obtaining the id. Signed-off-by: Chris Wilson commit 4c66ee5e9793785585d37622b9419fd25c046d14 Author: Chris Wilson Date: Tue Jul 29 08:59:44 2014 +0100 sna: Always clear CRTC overrides when adjusting the mode It is not necessary to resize before adjusting the CRTC, but if it moves the window may no longer be obscuring the CRTC. Signed-off-by: Chris Wilson commit 7ceb4028f4d69f4ab2e800d6b98809a998918154 Author: Chris Wilson Date: Sun Jul 27 17:50:29 2014 +0100 sna: Select the panel native size of the unattached fb size When creating a framebuffer for an headless system, if there is a panel, use its native size rather than 1024x768. Signed-off-by: Chris Wilson commit a88795c64123e4084044451d8861838ea904abd9 Author: Chris Wilson Date: Tue Jul 29 21:11:09 2014 +0100 sna: Clear cursor image after rotation Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81886 Signed-off-by: Chris Wilson commit 02bb0c5bc56df2790ffcd90d47d667dfd63b5407 Author: Chris Wilson Date: Mon Jul 28 21:16:33 2014 +0100 sna: Fix clear shortcut for transformations The region needs to be transformed along the clear shortcut when redisplaying the CRTC. Reported-by: Dirk Griesbach Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81820 Signed-off-by: Chris Wilson commit 997a5d28021ece0e81845d0217a1b6feb765e6fa Author: Chris Wilson Date: Sun Jul 27 07:15:19 2014 +0100 configure: Expose no acceleration by default (--with-default-accel=none) Why? I am not sure, but it seems equally as valid as allowing the switch to uxa/glamor as default. The runtime equivalent is Option "AccelMethod". Signed-off-by: Chris Wilson commit cac1548a9c48db4707fc3c885b1ea568ae2fbc54 Author: Chris Wilson Date: Thu Jul 24 06:29:54 2014 +0100 sna: Sort the outputs to provide a stable listing order Make xrandr look neater by grouping the outputs together by type and then by port ordering. Signed-off-by: Chris Wilson commit f68d363a236a4bd424dff8a04d177bb5b79df1c9 Author: Chris Wilson Date: Wed Jul 23 22:12:33 2014 +0100 backlight: Remove unused 'original' member from structure This was accidentally added with no users. Signed-off-by: Chris Wilson commit 5935c93ce77a5da09aab9b45b1a5710d681c171e Author: Chris Wilson Date: Wed Jul 23 21:59:20 2014 +0100 sna: Keep the backlight at the same brightness when switching away Before VT switching, we disable all the outputs. This has the side-effect of disabling the backlight, but commonly the console does not set the backlight brightness itself and so we re-enable the backlight on its behalf. Rather than set the backlight to max brightness, reset it to the last user value, as maximum can be very bright! Reported-by: Mark Kettenis commit f9e7ac7db7b0331131aa1df3a90d4b2692949efa Author: Chris Wilson Date: Wed Jul 23 21:53:31 2014 +0100 backlight: Set structure to safe values when not initialised Signed-off-by: Chris Wilson commit bc50dff844b97e655483c9eaf0effeec6a9ab4dd Author: Chris Wilson Date: Wed Jul 23 21:43:02 2014 +0100 sna: Disable rendering with the DRM device whilst away from VT As root, X gets away with many things, including submitting commands to the DRM device whilst it is no longer authorised (i.e. when it has relinquished master to another client across a VT switch). In the non-root future, if we attempt to use the device whilst unauthorized the rendering will be lost and we will mark the device as unusable. So flush our render queue to the device around a VT switch. Signed-off-by: Chris Wilson commit 8d95e90b7b4bf5d6bae5443f92d77d30f4443f24 Author: Chris Wilson Date: Wed Jul 23 15:45:31 2014 +0100 2.99.914 snapshot commit 57f0e65d5186412835f282af59141626e4a87a00 Author: Chris Wilson Date: Wed Jul 23 16:42:46 2014 +0100 sna/dri2: Compile fix for old xorg/dri2 We have to do conditional compilation as we touch structure members that may not exist in older Xserver headers. Signed-off-by: Chris Wilson commit 4ed0937640b54246440421114b697f75d1b8c835 Author: Chris Wilson Date: Wed Jul 23 15:41:29 2014 +0100 Add automake magic required for libobj/ So libobj/ wasn't included in the tarball, and nor was the compatability functions being added to the driver when they were needed. The oddity is that using the ./configure script (and thus make distcheck) succeeds. It was only when 'autoreconf -fi' was run was the first error encoutered. Signed-off-by: Chris Wilson Reported-by: Tobias Klausmann commit dcf9ce4a9f16c01f58797e4f899d51e23506aa6c Author: Chris Wilson Date: Wed Jul 23 14:19:44 2014 +0000 Fix compile failure on old Xorg with XF86_ALLOCATE_GPU_SCREEN Sigh, a late fix was not compile checked against xorg-1.7. Signed-off-by: Chris Wilson commit 1c5e20716f192f0c38b4edd879d28e11126f7f01 Author: Chris Wilson Date: Sat Jul 5 08:47:16 2014 +0100 2.99.913 snapshot commit d242965979cf251383a6230dbd65cdc1d9e231ea Author: Chris Wilson Date: Wed Jul 23 14:25:25 2014 +0100 sna: Skip performing an async flip after fixup After the first async failure and we fix up the CRTC, ordinary we queue a no-op flip in order to queue the event. For async flips, we do not want that event so just skip the flip. Signed-off-by: Chris Wilson commit 4153d4b43004cd90c0d9a7a7db399dac4d30721e Author: Chris Wilson Date: Wed Jul 23 13:54:19 2014 +0100 sna/dri2: Tidy freeing the queued frame events Signed-off-by: Chris Wilson commit f2b2b6eda009924e5ec6974bb31be9d3749c9cf8 Author: Chris Wilson Date: Wed Jul 23 13:45:27 2014 +0100 test/dri2: Use the right device node Use the device node as instructed by Xorg. Signed-off-by: Chris Wilson commit 65c2376730e86d7502d8c47d49386be5f51e47ba Author: Chris Wilson Date: Wed Jul 23 12:12:03 2014 +0100 sna: Add a DBG message for slave damage propagation Signed-off-by: Chris Wilson commit 95c059b330e705ecd0e575e98d8edf5707e84a05 Author: Chris Wilson Date: Wed Jul 23 11:01:07 2014 +0100 sna: Reorder disabling scanout pixmap when updating slave The assertion caught that we would unregister an invalid drawable on older Xorg. Signed-off-by: Chris Wilson commit d6830190bc9956f485db6c3420f7a4a79793a693 Author: Chris Wilson Date: Wed Jul 23 10:53:40 2014 +0100 sna: Disable all outputs when initializing as a slaved output provider When we are constructed as a slaved device, we need to disable all outputs or else they are not correctly hooked into the master device upon startup. Signed-off-by: Chris Wilson commit 70868c7aa881b15b7478f7ee4543fde0268a4ba6 Author: Chris Wilson Date: Wed Jul 23 08:37:46 2014 +0100 sna/dri2: Recreate buffer in reuse rather than force recreate By marking the buffer->attachment as invalid we forced the recreation of the buffer on the next DRI2GetBuffers. The only small problem with that was that the client didn't always immediately call DRI2GetBuffers after the invalidation - and if they did a DRI2CopyRegion with its stale buffers the unfound attachment would generate a BadValue and kill the client. So instead of messing around with the attachment, explicitly recreate the buffer if we attempt to reuse a buffer of the wrong size. Signed-off-by: Chris Wilson commit aa5351dbbe0a50080efee35a3d494b3a20b7c9f6 Author: Chris Wilson Date: Tue Jul 22 09:40:14 2014 +0100 sna: Ensure errno is set after failure before reporting a modeset failure A few paths we report a sanity check failure which do not set errno, but we then print out the errno as part of our message to the user. Set it to a sane value in those cases. Signed-off-by: Chris Wilson commit feba651db8dd61356fb6296b55d46168bd4d7011 Author: Chris Wilson Date: Tue Jul 22 09:15:01 2014 +0100 sna: Remove %# from DBG messages LogF doesn't support the 0x-prefix instruction. Signed-off-by: Chris Wilson commit 13e20c7f61d8b21b33c02d8b737cf9c06bf50f17 Author: Chris Wilson Date: Tue Jul 22 08:52:10 2014 +0100 sna: Assert that we do not overwrite an earlier COW entry Signed-off-by: Chris Wilson commit d8b0a8fa033848543e0b39566b531fdfdd078087 Author: Chris Wilson Date: Tue Jul 22 08:48:58 2014 +0100 sna/dri3: Don't forget to add SHM pixmaps to the list of exported DRI3 bo Signed-off-by: Chris Wilson commit bfccacf745d054756661be3edd8898ac6aceb878 Author: Chris Wilson Date: Sun Jul 20 07:29:21 2014 +0100 sna/video: Bump the maximum size for sprites A sprite plane is limited by the display engine who's maximum resolution has increased since the 2kx2k limitations of 8xx, so let's set it correctly to the reported maximum CRTC size (since we have no individual query for maximum sprite plane sizes). Signed-off-by: Chris Wilson commit 9bb2818a7db1c9dc89379996415511b6cff4bb33 Author: Chris Wilson Date: Sun Jul 20 07:27:58 2014 +0100 dri3-test: Print line number for shm failures Signed-off-by: Chris Wilson commit 4ae346e7647fd2c01324f1a6d3b37674e858486d Author: Chris Wilson Date: Fri Jul 18 07:31:25 2014 +0100 configure: Double check xinerama's headers Having the pkgconfig present doesn't always necessarily imply the headers are installed correctly - just fail over gracefully for xinerama and intel-virtual-output Signed-off-by: Chris Wilson commit fac6845820e49dbbea2a625b7bb745d8f9159b56 Author: Chris Wilson Date: Fri Jul 18 07:14:19 2014 +0100 sna/dri2: Protect compsiteext.h include with build check We shouldn't include calls to the composite extension if it has not been built. Reported-by: Ben Widawsky Signed-off-by: Chris Wilson commit 923e098f5f830c30b93d6f85d4f812201bdcb206 Author: Chris Wilson Date: Thu Jul 17 17:10:39 2014 +0100 sna: Fix compilation with older Xorg sna_display.c: In function 'sna_crtc_disable_shadow': sna_display.c:1375:39: error: dereferencing pointer to incomplete type DamageUnregister(&crtc->slave_damage->drawable, crtc->slave_damage); Signed-off-by: Chris Wilson commit 7026ffe56005bbc36dc37cafc7ebb2a7f09fefdd Author: Chris Wilson Date: Thu Jul 17 17:04:02 2014 +0100 sna: Support TearFree on slaved outputs By always forcing the shadow intermediatory, we can enable TearFree even ona slave scanout. Signed-off-by: Chris Wilson commit 3140d72826b5227f7f7ac9a428faa4bcfd4b377b Author: Chris Wilson Date: Thu Jul 17 16:14:16 2014 +0100 backlight: Prevent dereference of potential NULL argv Adam Sampson spotted that "It's possible (but not very sensible) to exec a program with an empty argument list, so argv[0] is not necessarily a valid pointer. For example: $ cat exec0.c int main(int argc, char *argv[]) { char *empty[1] = { NULL }; execvp(argv[1], empty); perror("execvp"); return 1; } $ ./exec0 /usr/libexec/xf86-video-intel-backlight-helper Usage: (null) " He sensibly suggested that we hardcode the program name to avoid the NULL dereference. Being the paranoid type, we should also be careful not to write to any file descriptors outside of our control (i.e. stderr), so disable the messages unless we are debugging. Reported-by: Adam Sampson Signed-off-by: Chris Wilson commit bcd09ff6eb76bc4df046ece4da29b1455fed8dff Author: Chris Wilson Date: Thu Jul 17 15:23:46 2014 +0100 sna: Assert that we never attempt to flip the slave scanout Signed-off-by: Chris Wilson commit 129656e4a82d4bf799e5c1d75d0dcb4480f6eb09 Author: Chris Wilson Date: Thu Jul 17 15:01:06 2014 +0100 sna/dri2: Disable SwapLimit buffers with buggy prime implementations If there is a GPU screen, we have to assume that the DRI2 code may pass around the wrong pointers to ReuseBufferNotify until the fix is released: commit 4d92fab39c4225e89f2d157a1f559cb0618a6eaa Author: Chris Wilson Date: Wed Jun 18 11:14:43 2014 +0100 dri2: Use the PrimeScreen when creating/reusing buffers Signed-off-by: Chris Wilson commit a45b2ea11c15f35c36330ff27cb45854a29c2e2c Author: Chris Wilson Date: Thu Jul 17 14:40:51 2014 +0100 sna: Handle rotated slaved scanouts As per the usual handling of rotated scanouts with unsupported rotations, we stage the drawing onto a backbuffer then rotate onto the crtc later. The difference here is that we must read the contents from the master pixmap rather than our own screen pixmap. Spotted was looking at slaved scanouts mistakenly setting the CRTC transformed flag. Reported-by: Tomas Pruzina Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81383 Signed-off-by: Chris Wilson commit 339c9dd0d5206180995731ab22304776e544f2f7 Author: Chris Wilson Date: Thu Jul 17 12:54:47 2014 +0100 sna: Add missing DBG parameters Signed-off-by: Chris Wilson commit 62f62f70eda97a3ef18c5144031fdf1cb2b7dad0 Author: Chris Wilson Date: Thu Jul 17 10:06:06 2014 +0100 sna: Avoid confusing failure to flip and flipping zero CRTC During the present unflip path we blindly try to restore the original mode after a flip failure. However, it confuses flipping zero CRTC with a genuine failure. This has the result of undoing a DPMS change (e.g. xset dpms force dpms) under a DRI3 compositor. Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81456 Signed-off-by: Chris Wilson commit 95f08c171ebd9b594112ab006c4460702a22bec1 Author: Chris Wilson Date: Thu Jul 17 09:20:35 2014 +0100 sna: Busy-wait for the kernel to catch up when flipping If the kernel reports that it is busy, it has not yet finished processing a pending flip and we have multiple CRTC queued, just wait for the kernel to clear its backlog before submitting the next flip. On the other hand, if we can just overwrite the pending flip results. However, the EBUSY may actually be a genuine report by the kernel of an error, so check for an invalid CRTC first. Signed-off-by: Chris Wilson commit 0a9d3dd8c83749992e643675f16486092f2b00fa Author: Chris Wilson Date: Thu Jul 17 08:53:13 2014 +0100 sna: Silence valgrind when reading plane properties Signed-off-by: Chris Wilson commit 0a57b55f0fcfa93b38015535002cb11eeaf1dd3a Author: Chris Wilson Date: Thu Jul 17 08:32:14 2014 +0100 sna: Remove extraneous function wrapping Since we only have the single callsite for do_page_flip, the wrapper is not adding any meaningful information. Signed-off-by: Chris Wilson commit f33d44f41ef0f287375b7a6b1c117abff5a23b19 Author: Chris Wilson Date: Wed Jul 16 12:53:02 2014 +0100 sna: And remove new bogus assertion We assert that damage is valid as we delete the Pixmap, and so we cannot assert that the Pixmap is still valid itself. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit dd9df24eb5234c96e499063904ab7bd85a332fd8 Author: Chris Wilson Date: Wed Jul 16 08:05:34 2014 +0100 sna: Make the damage check more verbose Print out the pixmap number and the damage extents for when the assertion fails. Signed-off-by: Chris Wilson commit 34ada63118680bf8ad2ef737fd4a8edfd8246e37 Author: Chris Wilson Date: Wed Jul 16 07:19:03 2014 +0100 sna/gen2+: Remove assertion on draw->type for fills I overlooked the tiling-fill path passing down a temporary DrawableRec into the fill_boxes callback - invalidating the assertion. Fixes regression from commit 43176b9bfafe389c4b9ed676f4e50e3b06f858c4 Author: Chris Wilson Date: Mon Jun 30 21:01:11 2014 +0100 sna/dri2: Pass around the correct DrawableRec for sampling from the foriegn bo Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70461#c62 Signed-off-by: Chris Wilson commit 4422b1854209a2cdf023c1fbc60834fde2fbc0c7 Author: Chris Wilson Date: Fri Jul 11 22:23:55 2014 +0100 sna: Use a stricter test for determining CRTC off before updating the cursor Signed-off-by: Chris Wilson commit e0523ade28fa0da00d0bd70d8b22d53ed4e49f73 Author: Chris Wilson Date: Wed Jul 9 12:10:15 2014 +0100 sna: Reduce reflections onto rotations In order to support a wider range of rotation/reflections, perform a simple reduction of the requested rotation first. Signed-off-by: Chris Wilson commit 251bcc32eed37ee10eb14ce2278ecbdcc40a7cde Author: Chris Wilson Date: Thu Jul 10 21:01:57 2014 +0100 configure: Provide a poor man's replacement for getline() uClibc is one such library that doesn't implement getline() Reported-by: Ben Widawsky Signed-off-by: Chris Wilson commit 8587b2fff218537c6ff568ac3ef561f0d39f03ff Author: Chris Wilson Date: Tue Jul 8 11:53:13 2014 +0100 sna: Rewrite rotation setup on top of universal drm planes The kernel interface has changed slightly since the early proposals. Now the rotation property is only on the plane and so we have to lookup the primary prime as well. Signed-off-by: Chris Wilson commit f24a9d335273fec20679397abcc3d5405d9613df Author: Chris Wilson Date: Sat Jul 5 14:40:38 2014 +0100 sna: Fix a couple of DBG messages Signed-off-by: Chris Wilson commit 790e7492bdb5c0c77c53ae769f0d408b04d5c99b Author: Chris Wilson Date: Sat Jul 5 09:46:00 2014 +0100 test/lowlevel-blt-bench: Add common PDF operators Applications are starting to use PDF operators, so far I have spotted multiply, dodge and lighten. Signed-off-by: Chris Wilson commit 8fa22964f69d3ec8700f177dd7cb3cbc396a9f35 Author: Matthieu Herrb Date: Fri Jul 4 18:26:09 2014 +0200 backlight: Fix security issues in handling of the interface path name. - don't allow '/' in the interface name to avoid escaping the /sys hierarchy - check snprintf() return value for overflow. Problems reported by Adam Sampson. Thanks. Signed-off-by: Matthieu Herrb Reviewed-by: Reviewed-by: Hans de Goede commit 6a64a3ae55ad5f743d2b7a4852b6ca7b54d2a142 Author: Chris Wilson Date: Fri Jul 4 13:04:02 2014 +0100 sna: Discard operations to either CPU or GPU bo when overwriting with RenderRectangles Signed-off-by: Chris Wilson commit 2c8ab77fcd71b7f96ad7bc379e5c68b3b45a5069 Author: Chris Wilson Date: Fri Jul 4 12:43:55 2014 +0100 sna: Tweak number of threads for short areas Signed-off-by: Chris Wilson commit d3ccb3f3b2a3cb4c8b51d58d185dd10b85e025eb Author: Chris Wilson Date: Fri Jul 4 12:39:01 2014 +0100 sna: Convert a clear tile into a solid fill Signed-off-by: Chris Wilson commit 2e0763088f8e159b414cec5c056cc4c91a34766e Author: Chris Wilson Date: Fri Jul 4 12:26:43 2014 +0100 sna: Fix typo s/num_threads/max_threads/ Signed-off-by: Chris Wilson commit 04ddea075e9e07cf3158594130d5ba7d1f50f7f1 Author: Chris Wilson Date: Fri Jul 4 12:14:11 2014 +0100 sna: Do a quirk early check for short areas before threading Signed-off-by: Chris Wilson commit 228a22fe8db044a18556a9fdb989323274817771 Author: Chris Wilson Date: Fri Jul 4 12:10:10 2014 +0100 sna: Disable use of threaded compositor when using threaded renderer Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 64bcb91f58fba3956f2c66fa37707b9e496da936 Author: Chris Wilson Date: Fri Jul 4 11:02:39 2014 +0100 sna: Utilise existing cached upload for promoting to GPU bo If we already have a buffer that represents the data on the GPU, we can simply use that when we need to promote the pixmap onto the GPU. Signed-off-by: Chris Wilson commit 821ef20b27f84cc26aec266b0f616a7f39ba9e3d Author: Chris Wilson Date: Fri Jul 4 10:43:35 2014 +0100 sna: Promote tile pixmaps to GPU when reused Signed-off-by: Chris Wilson commit c6407f7380829f822a462100d26bc531aed0fd6f Author: Chris Wilson Date: Fri Jul 4 10:14:54 2014 +0100 sna/gen8: Disable the unaligned check Note sure if this is strictly required -- but at the moment it fails for 1x1R solids, causing us to skip glyphs. The simulator doesn't complain, so just skip the check for now. Reported-by: Ben Widawsky Signed-off-by: Chris Wilson commit e64d14d7bc72fe7b150e5427feeb1a163ec600a7 Author: Chris Wilson Date: Fri Jul 4 09:55:04 2014 +0100 sna: Tighten assertions for using upload proxies concurrently with CPU reads After relaxing some of the rules on when to discard the upload proxies, we also need to relax some of the complementary asserts. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 4e12d5ca26bdfafd7b9cd02c36e6d991f068f29b Author: Chris Wilson Date: Fri Jul 4 09:48:53 2014 +0100 sna: Prevent creating a GPU bo for an inplace read Signed-off-by: Chris Wilson commit 18ae7722dbdf6ab61560962ed6ca8d39f353b1f9 Author: Chris Wilson Date: Thu Jul 3 18:18:04 2014 +0000 sna: Wrap xf86DPMSSet We need to wrap xf86DPMSSet() so that we can reintialize our bookkeeping and auxiliary planes after disabling/re-enabling CRTC during DPMS operations. Signed-off-by: Chris Wilson commit 57d0cc82d851b95d4e3b1821287dd3ffd1cf6e3b Author: Chris Wilson Date: Thu Jul 3 09:07:44 2014 +0100 sna: Clear the cursor reference from the CRTC if the update fails This should allow it to be restored correctly the next time it gets shown. Signed-off-by: Chris Wilson commit 24c9bac7eb6e17b55044d719bab74d16fd68c450 Author: Chris Wilson Date: Wed Jul 2 21:17:54 2014 +0100 sna: Limit the size of the tiling object to be smaller than either the originals When we tile, we do so in order to fit an operation involving two objects larger than the aperture. If we then choose an intermediate tiling object that is larger than either of those two, the error will persist and we will be forced to recuse. In the worst case, this will provide an upper bound to the recursion. Reported-by: Bruno Prémont Signed-off-by: Chris Wilson commit 710bb0d37c681f2ffdeaf263b6ee7d9488670bc0 Author: Chris Wilson Date: Wed Jul 2 09:16:07 2014 +0000 test: Create separate SHM segments for ref/out Signed-off-by: Chris Wilson commit 87e659b887f4c738cfc91439efdac0d48fd294f0 Author: Chris Wilson Date: Wed Jul 2 10:47:32 2014 +0000 sna: Use the threaded compositor for picture conversions Signed-off-by: Chris Wilson commit 2bf36d54ebdfa2a59bf7ef71134b953628ae5d50 Author: Chris Wilson Date: Wed Jul 2 11:31:54 2014 +0100 sna/gen6+: Tweak consideration of compositing on BLT Signed-off-by: Chris Wilson commit 732cd11cf0ca813fdc06f9f09fab120ea4e3a7da Author: Chris Wilson Date: Tue Jul 1 17:54:49 2014 +0100 sna: Fix typo in LinearFramebuffer handling Eeek, when not using LinearFramebuffer we still want to create the GPU bo: s/,/;/ Reported-by: Ilia Mirkin Signed-off-by: Chris Wilson commit b5fa463b90c49ebc635d79b1561c94a4857e9cf6 Author: Chris Wilson Date: Tue Jul 1 17:53:56 2014 +0100 sna: Correct migration flags for initial scanout creation We want to preserve any contents preloaded (not that there should be any...) Signed-off-by: Chris Wilson commit b88866aa5ebf813a999e194dec24e9ef2ac4f59d Author: Chris Wilson Date: Tue Jul 1 16:59:31 2014 +0100 sna/dri2: Add a DBG option to select copy method Often when debugging it is useful to force either use of the BLT or 3D pipelines for copies. Signed-off-by: Chris Wilson commit a10781b70f222f3997928fa979f6292617f79316 Author: Chris Wilson Date: Tue Jul 1 15:11:07 2014 +0100 sna: Enforce LinearFramebuffer option This option should only be used for compatibility. Previously this was done at a high level, this changes it to enforce the tiling as we apply the CRTC. Signed-off-by: Chris Wilson commit 75745cd5861481c5a9a31125d357f339349dd0f8 Author: Chris Wilson Date: Tue Jul 1 14:31:32 2014 +0100 sna/dri2: Use CPU fallback if possible Signed-off-by: Chris Wilson commit 02715490db13dcd47c5e4bef713f400838d94b99 Author: Chris Wilson Date: Tue Jul 1 13:10:32 2014 +0100 sna/dri2: Set depth/bpp on scratch DrawableRec We need to initialise both depth and bitsPerPixel on the drawable struct we pass around as they are used for selecting for the format when copying. Reported-by: Vedran Rodic Signed-off-by: Chris Wilson commit e6e5330857097eb2caafa89d571d12e4bb15f539 Author: Damien Lespiau Date: Mon Jun 30 19:24:13 2014 +0100 intel: Use the i845 info structure for INTEL_I845G_IDS() I assume the intention was to provide a different structure for each of the gen 2 devices. This doesn't change anything really. Signed-off-by: Damien Lespiau commit e1c3e6ce79c73d12c814cfda76dbc0df184902ee Author: Chris Wilson Date: Mon Jun 30 19:56:39 2014 +0100 sna: Add DBG breadcrumbs before flushes in BLT Signed-off-by: Chris Wilson commit 43176b9bfafe389c4b9ed676f4e50e3b06f858c4 Author: Chris Wilson Date: Mon Jun 30 21:01:11 2014 +0100 sna/dri2: Pass around the correct DrawableRec for sampling from the foriegn bo One day, we will move the width/height/bpp to the bo itself... Reported-by: Ilia Mirkin Signed-off-by: Chris Wilson commit 6c3399715e316be970c696b8949e3c14e83ea5df Author: Chris Wilson Date: Mon Jun 30 16:32:45 2014 +0100 sna/dri2: Apply the paraniod buffer clip in the correct coordinate system We need to only clip to the extents of the copy in the buffer space - which implies that we need to translate the region into that space before doing the clip. Reported-by: Ilia Mirkin Signed-off-by: Chris Wilson commit c25fa2216a3674f564a7e35d263a5d405aa97816 Author: Chris Wilson Date: Mon Jun 30 14:13:13 2014 +0100 sna: Tweak preference for small GPU bo Signed-off-by: Chris Wilson commit 19a62e088f5202026bdfde7a8af36598b69f8243 Author: Chris Wilson Date: Mon Jun 30 11:20:54 2014 +0100 test/lowlevel-blt-bench: Update progress more frequently Signed-off-by: Chris Wilson commit fab3bc70a450d94104c96ddbe7fa6e6ace1bb8f8 Author: Chris Wilson Date: Mon Jun 30 11:05:33 2014 +0100 sna: Reduce assertion when using asynchronous CPU access If we are not actually accessing the memory through the pointer, we do not care if it not currently coherent. Signed-off-by: Chris Wilson commit ffe8bd4d6e296a0ded0e118aee05aa6cb3051c56 Author: Chris Wilson Date: Mon Jun 30 10:55:20 2014 +0100 sna: Silence snarky compliers 0 != (void *)0 Signed-off-by: Chris Wilson commit 05f6183075867d582b7f9f74aec42e632e3d83dd Author: Chris Wilson Date: Mon Jun 30 10:46:00 2014 +0100 sna: Mollify assert to be consistent with the scanout flush Signed-off-by: Chris Wilson commit 2e0000688d034535083950b98bc61745dd965352 Author: Chris Wilson Date: Mon Jun 30 08:44:33 2014 +0100 test/lowlevel-blt-bench: Exercise masks Signed-off-by: Chris Wilson commit 37ac34c4e4500bfc272222754949edc1dbb8c7e2 Author: Chris Wilson Date: Mon Jun 30 08:44:33 2014 +0100 test/lowlevel-blt-bench: Exercise SHM pixmaps Signed-off-by: Chris Wilson commit 901d889dd7397dfa4c291f96af657e4b3433d795 Author: Chris Wilson Date: Mon Jun 30 07:44:25 2014 +0100 intel-virtual-output: Remove one redundant cleanup on error Signed-off-by: Chris Wilson commit a8b0ba0ed5f27e0d671b650d6f4bfe2fd86a0f3f Author: Chris Wilson Date: Sun Jun 29 15:25:19 2014 +0100 intel-virtual-output: Cleanup singleton on failure Signed-off-by: Chris Wilson commit 81889664851e3a2218d1ac5d39ebd2bd3b6a4954 Author: Chris Wilson Date: Sun Jun 29 08:29:36 2014 +0100 intel-virtual-output: Convert debugging messages to verbosity Original patch by main.haarp: "A verbose switch is quite useful for debugging, it shouldn't require editing and recompilation to gain more useful output. I added it." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80664 Signed-off-by: Chris Wilson commit 665d012b8e1b9666e535a3081404406f31b8a3ef Author: Chris Wilson Date: Sun Jun 29 09:26:10 2014 +0100 sna: Ensure CPU bo is synchronized before writing Signed-off-by: Chris Wilson commit 6b906ae742ec96eeef403191d3cdded6a23a70b7 Author: Chris Wilson Date: Sun Jun 29 07:02:44 2014 +0100 sna: Update allocation of CPU bo to avoid creating active buffers Since we now prefer CPU detiling, exactly when we want active/inactive buffers is a little more complex - and we also need to take into account when we want to use the CPU bo as a render target. Signed-off-by: Chris Wilson commit b961d7323369284ea2c3db47d30c27ffe01a9040 Author: Chris Wilson Date: Sun Jun 29 07:00:58 2014 +0100 sna: Sync CPU bo before writes Fixes regression from commit 961139f5878572ebea268a0bbf47caf05af9093f [2.99.912] Author: Chris Wilson Date: Fri May 30 09:45:15 2014 +0100 sna: Use manual detiling for downloads Reported-by: Harald Judt Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80560 Signed-off-by: Chris Wilson commit 53ef9e762a6e7802b3d5f8fba9ac17ff95545c10 Author: Chris Wilson Date: Sat Jun 28 21:07:08 2014 +0100 sna: Only preferentially upload through the GTT for large transfers Signed-off-by: Chris Wilson commit 0955f12ae04011593b71817e3151b8fb7c228899 Author: Chris Wilson Date: Sat Jun 28 17:38:54 2014 +0100 sna: Prefer linear if below tile_width Be stricter in order to allow greater use of CPU bo. Signed-off-by: Chris Wilson commit 3ef966f4c5bae07108ce2720f4da3c3c4e41e1aa Author: Chris Wilson Date: Sat Jun 28 14:23:29 2014 +0100 sna/io: Prefer CPU copies on LLC Signed-off-by: Chris Wilson commit 9fc052da5c4246402d2707b3a91efffa7dd81e08 Author: Chris Wilson Date: Sat Jun 28 14:22:17 2014 +0100 sna: Don't discard damage for SHM pixmaps We don't really want to rendering into SHM pixmaps except for copying back due to the strict serialisation requirements. Signed-off-by: Chris Wilson commit 0f8b39d24ff15cf3373ac7293f12772ebe16b68b Author: Chris Wilson Date: Sat Jun 28 14:21:36 2014 +0100 sna: Check for a mappable GPU bo before migrating damage Signed-off-by: Chris Wilson commit cfdaee4a7e45689b0fbbc8c3166d28d69797e759 Author: Chris Wilson Date: Sat Jun 28 14:20:00 2014 +0100 sna: Skip adding damage if it is already contained Signed-off-by: Chris Wilson commit 80752fb2794faa581d891b24148eaf51c42afd25 Author: Chris Wilson Date: Sat Jun 28 14:19:22 2014 +0100 sna: Tidy calling memcpy_from_tiled Signed-off-by: Chris Wilson commit 2a0176379f0ff290d276adc72d44dfddafd96da5 Author: Chris Wilson Date: Sat Jun 28 14:18:23 2014 +0100 sna: Micro-optimise unswizzling tiling/detiling Signed-off-by: Chris Wilson commit 24cb50e53c789cb7a05d59ad103dda1c3a009485 Author: Chris Wilson Date: Sat Jun 28 07:05:55 2014 +0100 sna/trapezoids: Handle mono traps just in case I disabled a few paths and ended up in an assert that mono trapezoids shouldn't get that far... Signed-off-by: Chris Wilson commit 72c041e57b99367f327c51c50fce2a55d618fc63 Author: Chris Wilson Date: Fri Jun 27 16:26:24 2014 +0100 uxa: Update Screen Pixmap width/height first Since commit dd6db82680b05cde4a47116b7096c054f3837e20 [2.99.912] Author: Chris Wilson Date: Fri May 9 20:26:19 2014 +0100 uxa: Add DRI3 and miSyncShm support we verify that the attaching bo meets the constraints required for the Pixmap. However, when updating the ScreenPixmap following a resize, we did not update the Pixmap size until after we tried to update the bo, resulting in a validation failure when shrinking the screen. Signed-off-by: Chris Wilson commit 0584604b53c8676adfa1f8f4d3def22c93ea822f Author: Chris Wilson Date: Fri Jun 27 16:12:35 2014 +0100 test: Expand number of sources for basic benchmarking Signed-off-by: Chris Wilson commit edd2b789568b14c29a004a64b6ff82bb6e4e9620 Author: Chris Wilson Date: Fri Jun 27 16:00:03 2014 +0100 sna/dri2: DBG compile fixes Signed-off-by: Chris Wilson commit a6ba93283b20a50ff36758624d2967562b7bdae9 Author: Chris Wilson Date: Fri Jun 27 13:42:37 2014 +0100 sna/glyphs: Add DBG option for glyph tolerance And bump it to 3 so that glyph filtering doesn't force us to use the mask too often. References: https://bugs.freedesktop.org/show_bug.cgi?id=77436 Signed-off-by: Chris Wilson commit ee5c74deee77db4292ce197ab7facca422f86021 Author: Chris Wilson Date: Fri Jun 27 12:56:43 2014 +0100 sna/glyphs: Add DBG option for forcing glyphs-to-dst Signed-off-by: Chris Wilson commit 6ba4ee1fe842e975c94a01f93c6d39c20eadadbe Author: Chris Wilson Date: Fri Jun 27 10:38:59 2014 +0100 sna: Check source bo is suitable for BLT before doing so Signed-off-by: Chris Wilson commit 157e22cb8e96b0a9ffa7d58625fe2396f6084ff9 Author: Chris Wilson Date: Thu Jun 26 20:19:52 2014 +0100 sna: Only reuse pinned batches for 830/845 Trying to fly too close to the sun. :( Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80558 Signed-off-by: Chris Wilson commit f027b4f628b6d0f4c00f8aba7b27dcf51f91211d Author: Chris Wilson Date: Thu Jun 26 20:24:05 2014 +0100 sna/dri2: Slightly improved DBG messages Missing git add from commit 2e8c09f3fe468abba9c307ba3d7b2d22908e1172 Author: Chris Wilson Date: Wed Jun 25 22:19:23 2014 +0100 sna/dri2: Hook into ClientGone callback to clear dangling references Signed-off-by: Chris Wilson commit 2ae5d7d9415a77c76078bc340066df73dce72d27 Author: Chris Wilson Date: Thu Jun 26 20:21:12 2014 +0100 sna: Tidy selection of a near-miss active buffer. References: https://bugs.freedesktop.org/show_bug.cgi?id=80560 Signed-off-by: Chris Wilson commit 8cad98eca64224534887efbcd1c60604cd491c35 Author: Chris Wilson Date: Thu Jun 26 12:42:30 2014 +0100 sna: Fix userptr defines to match i915_drm.h Now that we are starting to see userptr in the headers, we see that the definitions slightly changed. Signed-off-by: Chris Wilson commit c5c7dd24a55f04322d5eec10dc4352d8a8e92b1e Author: Chris Wilson Date: Thu Jun 26 09:25:06 2014 +0100 sna: Remove scare quotes from hotplug detection "enabled" Tidy up the log message by improving its formatting, and making it more accurate. Signed-off-by: Chris Wilson commit 2e8c09f3fe468abba9c307ba3d7b2d22908e1172 Author: Chris Wilson Date: Wed Jun 25 22:19:23 2014 +0100 sna/dri2: Hook into ClientGone callback to clear dangling references As the Window may exist for multiple Clients, we cannot rely on the destruction of the Window decoupling all outstanding events and preventing chasing a stale Client pointer. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80157 Signed-off-by: Chris Wilson commit 12a349974b63a47ad55384abe0d7a839af48f31a Author: Chris Wilson Date: Thu Jun 26 06:59:07 2014 +0100 sna: Make output destroy more defensive We may never create the properties as it may be ignored or the allocation may fail, so we need to be careful when freeing we do not stumble over invalid pointers. References: https://bugs.freedesktop.org/show_bug.cgi?id=80355#c28 Signed-off-by: Chris Wilson commit 2ec2164ba4bd3a266949cdb379b6da1090475c08 Author: Chris Wilson Date: Wed Jun 25 18:05:46 2014 +0100 sna/dri2: Compile fixes for ancient Xorg Signed-off-by: Chris Wilson commit 258f8983daa3a8fe315c440f5e298ae1b02fd678 Author: Chris Wilson Date: Wed Jun 25 17:20:52 2014 +0100 sna: Fix uninitialisable variable sna_render.c: In function 'sna_render_picture_downsample': sna_render.c:822: warning: 'priv' may be used uninitialized in this function introduced in commit ded05e8abb248664124d2b86f77c27497a252c4e Author: Chris Wilson Date: Mon Jun 23 22:15:56 2014 +0100 sna: Allow scratch pixmap to allocate linear GPU bo Signed-off-by: Chris Wilson commit ca0d06add926eb17fcec6c031adabb656498d744 Author: Chris Wilson Date: Wed Jun 25 14:19:33 2014 +0100 sna: Improve throttling during bo allocation By controlling how long we may block during buffer allocation, we can relax the throttle elsewhere to prevent render lag buildup. References: https://bugs.freedesktop.org/show_bug.cgi?id=77436 Signed-off-by: Chris Wilson commit 5ad1661b870b5b189e52383e45a9b8f570b40501 Author: Chris Wilson Date: Wed Jun 25 13:21:58 2014 +0100 sna: Only mark throttle as done after success References: https://bugs.freedesktop.org/show_bug.cgi?id=77436 Signed-off-by: Chris Wilson commit c3e4518e84300aeb8e12a0af56c2d66a1df9d8d7 Author: Chris Wilson Date: Wed Jun 25 11:18:01 2014 +0100 sna: Track desired flushes better after starting a new batch Signed-off-by: Chris Wilson commit 85bb55e4a62666fa51af34d08699950be362aa57 Author: Chris Wilson Date: Wed Jun 25 11:45:55 2014 +0100 intel: Fix weblinks (again) Julien pointed out that I fail at checking links. Reported-by: Julien Cristau Signed-off-by: Chris Wilson commit ff31d49bfa48a74eb9d8cb0afb1e2882ffbc7573 Author: Chris Wilson Date: Wed Jun 25 11:31:58 2014 +0100 intel: Fix weblinks Matti reported a few outdated links to intellinuxgraphics.org, now superseded by 01.org. Reported-by: Matti Hämäläinen Signed-off-by: Chris Wilson commit 8c1729aab6b49e7d4a3f48516a629b0d23e8591b Author: Chris Wilson Date: Wed Jun 25 09:00:04 2014 +0100 sna: Tweak scanout flush We now distinguish gpu_dirty whilst the bo is not flushed within a batch and needs_flush for when it is dirty and still busy. Signed-off-by: Chris Wilson commit 26c4e850b8a7d13afc351097ee6f6b2f3f90e2b9 Author: Chris Wilson Date: Wed Jun 25 08:18:25 2014 +0100 sna: Throttle before doing a TearFree buffer replacement If the client is rendering fast, he may be rendering too fast and starting to build up a backlog. Signed-off-by: Chris Wilson commit ea6b0bb8e1b358d728d80daac936ec6521154302 Author: Chris Wilson Date: Wed Jun 25 08:05:22 2014 +0100 sna: And fix the typo... Signed-off-by: Chris Wilson commit 3f4da671b0a570de8734cc668d8e8975c2fdbd90 Author: Chris Wilson Date: Wed Jun 25 08:01:57 2014 +0100 sna: Disable userptr for bdw Something fishy is afoot. But let's kill this particularly worrisome regression so that we can do a full round of testing. References: https://bugs.freedesktop.org/show_bug.cgi?id=79053 Signed-off-by: Chris Wilson commit 204ec74a61ba0b9628c686b98c48fa1220866c2d Author: Chris Wilson Date: Wed Jun 25 07:31:33 2014 +0100 sna: Check all connectors for reuse Do not rely on the MST path being present to indicate a connector that may be reused. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80355 Signed-off-by: Chris Wilson commit 43ad5dbc60e1f50a9cdcfc035bc271f1f28438c2 Author: Rodrigo Vivi Date: Tue Jun 24 03:14:54 2014 -0700 Add marketing names for Broadwell Even the unknown/reserved ones will stay with HD Graphics. v2: Add missing names to intel.man and README files as well. (Chris) Cc: Chris Wilson Signed-off-by: Rodrigo Vivi commit 78053bb84217e842615669dfa2f1e7e971ce9860 Author: Chris Wilson Date: Tue Jun 24 20:51:54 2014 +0100 Add reserved PCD IDs for Broadwell Updating using kernel commit fb7023e0e248a33cb00d0a9cdce0bcedaa1ad284 Author: Rodrigo Vivi Date: Tue Jun 10 10:09:52 2014 -0700 drm/i915: BDW: Adding Reserved PCI IDs. Signed-off-by: Chris Wilson commit 74c1cf60a7ce7e79bc727780151f4f233798e5f4 Author: Chris Wilson Date: Tue Jun 24 20:49:18 2014 +0100 sna: Add yet more DBG messages to MST discovery Signed-off-by: Chris Wilson commit ca296c18316a3ce1682beefd5daa4702593cd529 Author: Chris Wilson Date: Tue Jun 24 16:37:52 2014 +0100 configure: Display our README before the summary Signed-off-by: Chris Wilson commit d14d7efb28c3e323203139b7c1562b1e0bc526f0 Author: Chris Wilson Date: Tue Jun 24 16:33:43 2014 +0100 intel: Add a note about the myriad places we have identifier strings Signed-off-by: Chris Wilson commit 0c7cf7a6bb1c91b59ad326198f3364554e3dfeb5 Author: Chris Wilson Date: Tue Jun 24 11:50:55 2014 +0100 intel: Wait for our expected device node to appear If the path we want to open for the KMS device is not yet available, wait a short while and try again. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80397 Signed-off-by: Chris Wilson commit 5c8829b30ad3acd2e59dac9ffa2aba8aadcada61 Author: Chris Wilson Date: Tue Jun 24 11:35:23 2014 +0100 sna: Add some more DBG around connector discovery References: https://bugs.freedesktop.org/show_bug.cgi?id=80355 Signed-off-by: Chris Wilson commit 271ed88e517745505c133bd68c40a8566ec8a625 Author: Chris Wilson Date: Tue Jun 24 11:24:26 2014 +0100 sna: Ensure serial is not 0 for runtime MST discovery We reserve serial==0 for the initial setup that is run before RandR is configured. After the server is running, we have to take extra steps to make the outputs visible to userspace. Signed-off-by: Chris Wilson commit 92dd13ae8dbddc31d0291dd12683fc7e3f65ffde Author: Chris Wilson Date: Tue Jun 24 11:04:01 2014 +0100 sna: Fix the usual "x = y" typos in creating boxes Fixes regression from commit 1d74b2e07d125ad95b9db6c9c032e90faf2bfa60 Author: Chris Wilson Date: Tue Jun 24 08:58:51 2014 +0100 sna: Decompose self-copy into overlapping/non-overlapping regions Signed-off-by: Chris Wilson commit 92119ef0939897dd1850b417d04a2ba558aee8ca Author: Chris Wilson Date: Tue Jun 24 10:23:03 2014 +0100 sna/glyphs: Clip damage to dst We only check if the hardware will automatically discard writes outside of the target pixmap, but we must manually clip the damage before adding it to our tracker. Reported-by: Jiri Slaby Reported-by: Zdenek Kabelac References: https://bugs.freedesktop.org/show_bug.cgi?id=70461#c58 Signed-off-by: Chris Wilson commit b33be7fbac005eb222302ffbb533ded1cd700953 Author: Chris Wilson Date: Tue Jun 24 10:17:47 2014 +0100 sna: Trim composite region against dst clip extents Signed-off-by: Chris Wilson commit f66e25def3431a900068cc1c23a6b1e8322ef046 Author: Chris Wilson Date: Mon Jun 23 16:14:28 2014 +0100 intel: Wait for the DRM device to load Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80397 Signed-off-by: Chris Wilson commit 1d74b2e07d125ad95b9db6c9c032e90faf2bfa60 Author: Chris Wilson Date: Tue Jun 24 08:58:51 2014 +0100 sna: Decompose self-copy into overlapping/non-overlapping regions We only need to stage the copy for the overlapping portion of the self-copy, for the rest we can do in a single pass. Signed-off-by: Chris Wilson commit 6e2cee27c379278b0321fd1db34ed80c439115a7 Author: Chris Wilson Date: Tue Jun 24 07:34:46 2014 +0100 sna/dri2: Add a dash more asserts References: https://bugs.freedesktop.org/attachment.cgi?id=101618 Signed-off-by: Chris Wilson commit 706480bde6120f84388a99085ed3d1cc3b759697 Author: Chris Wilson Date: Mon Jun 23 22:50:23 2014 +0100 sna: Disable CRTC after MST topology change In order to disable CRTC after marking outputs as removed after probing MST topology updates, we must manually mark the CRTCs as no longer enabled. Signed-off-by: Chris Wilson commit 5530cb4165da60f7b929b84d733d5eefcf4ec5fe Author: Chris Wilson Date: Mon Jun 23 15:47:13 2014 +0100 sna: Silence compiler warning for shadowed variable sna_display.c: In function 'sna_mode_redisplay': sna_display.c:6322:12: warning: declaration of 'fb_id' shadows a global declaration [-Wshadow] sna_display.c:223:24: warning: shadowed declaration is here [-Wshadow] CC sna_display_fake.lo Signed-off-by: Chris Wilson commit ded05e8abb248664124d2b86f77c27497a252c4e Author: Chris Wilson Date: Mon Jun 23 22:15:56 2014 +0100 sna: Allow scratch pixmap to allocate linear GPU bo When allocating a scratch pixmap, we do so in the expectation that rendering on the GPU is always preferrable, so even allocate a small linear bo. Signed-off-by: Chris Wilson commit 6c5658b14451239b8e4333702a227d83eed09f96 Author: Chris Wilson Date: Mon Jun 23 14:11:27 2014 +0100 sna: Promote to full GPU bo after forced migration away from CPU bo Signed-off-by: Chris Wilson commit 25776547bb7d76010f948769c8c08a7f418b15fd Author: Chris Wilson Date: Mon Jun 23 14:02:51 2014 +0100 sna: Prefer rendering on the CPU to avoid damage migration Signed-off-by: Chris Wilson commit a3c9cbefcb9971900638144286b59112e3cfd404 Author: Chris Wilson Date: Mon Jun 23 12:27:30 2014 +0100 sna: Force creation of GPU bo for drawing if need be Now that we are more eager to transfer to the GPU bo if we expect rendering to the CPU bo to be either slow or risk potential corruption, we can find ourselves in a recursive loop when we also decide not to create the GPU bo. Prevent that by explicitly creating the GPU bo if desired. Signed-off-by: Chris Wilson commit 827b89fa2d5fca0ffd709c17bcdbfdaf95da918f Author: Chris Wilson Date: Mon Jun 23 11:44:22 2014 +0100 sna/gen6+: Initialise src offset before use Fixes regression from commit 30348efd57135edee41fccb87133c572b6473aa8 Author: Chris Wilson Date: Mon Jun 23 11:14:25 2014 +0100 sna/gen6+: Avoid adjusting copy coordinates until commited to using them which assumed that the render state was being zeroed. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit 6848fb235b1bac84e91d1efde4094540180c4d48 Author: Chris Wilson Date: Mon Jun 23 11:27:20 2014 +0100 sna: Fix flushing empty batches A logic inversion in commit 1909910fdf89216d18703e50728f4604f75d5d66 Author: Chris Wilson Date: Sun Jun 22 20:19:22 2014 +0100 sna: Inject a batch flush before adding a fresh bo also applied the injection to when the batch was empty. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=70461#c48 Signed-off-by: Chris Wilson commit 60fd6764eba05f51bb83efba5593975cf8d1285b Author: Chris Wilson Date: Mon Jun 23 11:25:47 2014 +0100 sna: Handle old busy_ioctl not reporting the active ring If we have an old kernel, just presume that the bo was last active on the render ring. Signed-off-by: Chris Wilson commit 30348efd57135edee41fccb87133c572b6473aa8 Author: Chris Wilson Date: Mon Jun 23 11:14:25 2014 +0100 sna/gen6+: Avoid adjusting copy coordinates until commited to using them If we need to fallback to the BLT unit, we need to pass it the original source/dest coordinates and not our transformed render coordinates. So keep the original values intact until we start emitting the render operation. Signed-off-by: Chris Wilson commit e1e853edee67c3ced43d5e4b1fbd52ca4c92966d Author: Chris Wilson Date: Mon Jun 23 10:14:09 2014 +0100 sna/gen4+: Add some more asserts around recreating vertex buffers References: https://bugs.freedesktop.org/show_bug.cgi?id=70461#c46 Signed-off-by: Chris Wilson commit 978790dc52fa9551b3bccbd91988b93988e937df Author: Chris Wilson Date: Mon Jun 23 09:47:34 2014 +0100 sna: Allow the CPU bo to be created if GPU rendering is forced Signed-off-by: Chris Wilson commit b2206eca00e497aff0d79a6e9feae3d9c5070dcc Author: Chris Wilson Date: Mon Jun 23 09:42:37 2014 +0100 sna/gen6+: Encourage the compiler to inline a couple of key functions Signed-off-by: Chris Wilson commit bb4c057620fb0558a77a9b7db538786ffda7cf13 Author: Chris Wilson Date: Mon Jun 23 09:22:13 2014 +0100 sna: Prefer to render over damage into the GPU bo Signed-off-by: Chris Wilson commit 416c223861aaeb61c6408e6537315b78e908df43 Author: Chris Wilson Date: Mon Jun 23 09:20:55 2014 +0100 sna: Do not set CAN_CREATE_GPU flag for untiled allocations Signed-off-by: Chris Wilson commit fb51ec44f4b6069ab854233d5d0da34eb79f754c Author: Chris Wilson Date: Mon Jun 23 09:07:13 2014 +0100 sna: Rename IGNORE_CPU to IGNORE_DAMAGE to better reflect its purpose Signed-off-by: Chris Wilson commit 96d2749660e1738847222f2d9dbb7303b7deb5bf Author: Chris Wilson Date: Mon Jun 23 08:18:23 2014 +0100 sna: Add DBG breadcrumbs to sna_output_discover() References: https://bugs.freedesktop.org/show_bug.cgi?id=80355 Signed-off-by: Chris Wilson commit a33aa554fa3df8ca34012cf1c6ecb11fa69ac7fc Author: Chris Wilson Date: Mon Jun 23 07:42:30 2014 +0100 sna/gen4+: Add box emitters for the generic vertex paths Signed-off-by: Chris Wilson commit 1909910fdf89216d18703e50728f4604f75d5d66 Author: Chris Wilson Date: Sun Jun 22 20:19:22 2014 +0100 sna: Inject a batch flush before adding a fresh bo Fresh bo (those without a reservation already defined, ala presumed_offset) will cause the kernel to do a full relocation pass. So, if possible flush the already correct batch in the hope of trimming the amount of checking the kernel has to perform on this new batch. Signed-off-by: Chris Wilson commit 83cbbcd816e449402f3d49aeba3c099a20b8bc1b Author: Chris Wilson Date: Mon Jun 23 07:29:20 2014 +0100 sna: Add missing string for DBG References: https://bugs.freedesktop.org/show_bug.cgi?id=80355#c12 Signed-off-by: Chris Wilson commit f22ea4e821a33eccd3a9283d7ab048857008f7e8 Author: Chris Wilson Date: Sun Jun 22 17:53:59 2014 +0100 sna: Disable unused CRTC after undock events If undocking removes output (as the MST topology changes and some outputs then become unreachable), we may leave dangling CRTC. This confuses us, so disable any enabled but unconnected CRTC after the undock event. Reported-by: Sree Harsha Totakura References: https://bugs.freedesktop.org/show_bug.cgi?id=80355#c5 Signed-off-by: Chris Wilson commit dca0f1c2ccf14df38764ed12b971dc491cf22608 Author: Chris Wilson Date: Sun Jun 22 17:53:59 2014 +0100 sna: Track CRTC mode changes and discard old flips If we have a pending flip across a modeset we must be careful to drop the stale flip_bo after the modeset. Reported-by: Sree Harsha Totakura References: https://bugs.freedesktop.org/show_bug.cgi?id=80355#c8 Signed-off-by: Chris Wilson commit dae370423ad85b9d9c576277da5a9fb92ab3d3df Author: Chris Wilson Date: Sun Jun 22 11:45:35 2014 +0100 sna: Clean up CRTC on CloseScreen We need to do this to stop any stray references escaping through kernel events now that we are passing the CRTC through the event. Signed-off-by: Chris Wilson commit 923dc207df7b05c138c628983ccaf2493dd63b62 Author: Chris Wilson Date: Thu Jun 19 10:17:11 2014 +0100 sna: Discard write hint from a couple more move-to-gpu Signed-off-by: Chris Wilson commit 2046a49be59866a16db776ba53a588dbf6c02b12 Author: Chris Wilson Date: Sat Jun 21 15:43:32 2014 +0100 sna: Clear the transform flag on disabling the CRTC In places, we assume that if the flag is set, we must have an active CRTC. However, we were not clearing when disabling the CRTC. Reported-by: Sree Harsha Totakura Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80325 Signed-off-by: Chris Wilson commit b3d3c0e8e75a963262e4dc463fef60d7e9f1f01a Author: Chris Wilson Date: Fri Jun 20 20:01:23 2014 +0100 sna: Avoid blending with the render engine on snoopable bo This seems slightly weird, as there is nothing to indicate that this would generate incorrect results only for snoopable bo. But no many of flushes make my pnv box happy, so adjust the placement logic to move the blending operation away from the snoopable target. This is sensible for reasons of avoiding snoops from the render pipeline anyway. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80253 Reported-and-tested-by: Matti Hämäläinen Signed-off-by: Chris Wilson commit 219f6bd9e863f9c89cc4168895f89741ce6dbcbb Author: Chris Wilson Date: Fri Jun 20 17:06:55 2014 +0100 sna: Be more flexible in converting random subsamples to 8x8 tiles Signed-off-by: Chris Wilson commit 91bc9e42e434abd56ce2e4fc5e08d07376fe8bd3 Author: Chris Wilson Date: Fri Jun 20 16:13:49 2014 +0100 sna: Mark up const boxes to keep the compiler happy Pass around const to suppress a few compiler warnings. Signed-off-by: Chris Wilson commit e5c68b4358ce541929681c8c1e0ad3ef8c1dc9ed Author: Chris Wilson Date: Fri Jun 20 14:31:19 2014 +0100 sna: Feed more operations into the 8x8 BLT tiler Signed-off-by: Chris Wilson commit d2b90ac969656de35ec86973f66074654b0e9b4b Author: Chris Wilson Date: Fri Jun 20 14:29:43 2014 +0100 sna: Color patterns for BLT are required to be aligned to 256 byte boundaries This so far appears to be the most restrictive alignment required, so simply increase the upload alignment to 256 bytes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80033 Signed-off-by: Chris Wilson commit 8d7e7010e33d73a7d99948403b62d859d7a4dfaa Author: Chris Wilson Date: Fri Jun 20 08:28:32 2014 +0100 test: Increase number of tiled sources Significantly improve the stress impose upon the tiled BLT operations. Also start dumping pngs of the failures. References: https://bugs.freedesktop.org/show_bug.cgi?id=80033 Signed-off-by: Chris Wilson commit db6dfc3227155a4792ba3831681daf16839b14bb Author: Chris Wilson Date: Fri Jun 20 07:28:02 2014 +0100 sna/dri2: Don't decouple front buffer tracking for invalid SwapBuffer calls Signed-off-by: Chris Wilson commit 113a8b9be9dd7ffbc6f7c713bc40561bdf38e8b0 Author: Chris Wilson Date: Thu Jun 19 20:39:59 2014 +0100 sna: Mark upload from SHM segment as read-only As this may be mapped by the Xserver using a read-only SHM segment, we are forced to treat it always as read-only. And this being X, that it is using a SHM segment is opaque to the driver. Fantastic middlelayer. This was incorrectly removed in commit e680e54eab6ffa72e5e1eb6cc0e3fe4b235b06a1 Author: Chris Wilson Date: Wed Jun 11 10:48:26 2014 +0100 sna: Ignore setting read-only for temporary userptr maps Also let's not forget the ShmPutImage -> CopyArea path. Reported-by: Christoph Haag Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=78411 Signed-off-by: Chris Wilson commit df89b4941130b5ff020c6ef3e244dcf5fec45f2a Author: Chris Wilson Date: Thu Jun 19 20:39:59 2014 +0100 sna: Mark upload from SHM segment as read-only As this may be mapped by the Xserver using a read-only SHM segment, we are forced to treat it always as read-only. And this being X, that it is using a SHM segment is opaque to the driver. Fantastic middlelayer. This was incorrectly removed in commit e680e54eab6ffa72e5e1eb6cc0e3fe4b235b06a1 Author: Chris Wilson Date: Wed Jun 11 10:48:26 2014 +0100 sna: Ignore setting read-only for temporary userptr maps Reported-by: Christoph Haag Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=78411 Signed-off-by: Chris Wilson commit 6b32cf3a3c908bd29496fcf5d190fd0f8c657ae6 Author: Chris Wilson Date: Thu Jun 19 12:29:58 2014 +0100 sna: Missed fixing y tile offset in last commit Signed-off-by: Chris Wilson commit edeb2ddd170a1817ced45abada53346c5cd8c30b Author: Chris Wilson Date: Thu Jun 19 11:51:00 2014 +0100 sna: Use the right pattern origin for tiled 8x8 extraction References: https://bugs.freedesktop.org/show_bug.cgi?id=80033 Signed-off-by: Chris Wilson commit 1752e2d647cdb7cbff0ae7d0f0d0b761b5942965 Author: Chris Wilson Date: Thu Jun 19 11:14:25 2014 +0100 sna: Fix up small extents for 8x8 tile construction Signed-off-by: Chris Wilson commit f866a20c991d52fd2cf4ce63acc3cd44534ce5be Author: Chris Wilson Date: Thu Jun 19 10:49:09 2014 +0100 sna: Wrap pointer access for 8x8 tile construction The kernel can quite happily send a SIGBUS whenever we read from an bo (due to oom), so catch it and handle it. Signed-off-by: Chris Wilson commit b1aab55d594f03e51c3abf1743d00c56ef6d7797 Author: Chris Wilson Date: Thu Jun 19 09:47:02 2014 +0100 sna: Always readback shadow damage after replacing the buffer Instead track what we explicitly want to discard for the next operation, so that we don't have to copy back the whole buffer if we have to replace the shadow and intend to overwrite it all. Signed-off-by: Chris Wilson commit f4b930318c68e0e07d677ebc7b4caa27912561db Author: Chris Wilson Date: Thu Jun 19 07:40:16 2014 +0100 sna/dri2: Replace assertion with code to skip updating the back buffer After a window resize or redirection, the DRI2BufferPtr become stale but it may take a while for the Client to notice and reconfigure. Just skip touching stale backbuffers and let the Client catch up. Signed-off-by: Chris Wilson commit c257c936b42b92827b784cee0b7caa54e6040364 Author: Chris Wilson Date: Wed Jun 18 22:15:42 2014 +0100 sna: Fix modulus for partial conversion of tiles to 8x8 patterns Signed-off-by: Chris Wilson commit 9489cc6c70abf53d9ca45228b0aa9fb1fc3f9b72 Author: Chris Wilson Date: Wed Jun 18 21:28:11 2014 +0100 sna: Delete the silly typo Not checking DAMAGE_IS_ALL() correctly leads to an assertion failure. Signed-off-by: Chris Wilson commit 51a0559b120dd0a57a938b300bccefbf1142e495 Author: Chris Wilson Date: Wed Jun 18 20:55:02 2014 +0100 sna: Do not treat both src/dst having no clones as being the same Fixes regression from commit 62aaf2ff4f8597067cf387865707baa00ed9a123 Author: Chris Wilson Date: Wed Jun 18 18:41:15 2014 +0100 sna: Skip redundant copies when already cloned Signed-off-by: Chris Wilson commit 377b0e8657aab13dc90134853a03feb95f515567 Author: Chris Wilson Date: Wed Jun 18 19:59:14 2014 +0100 sna: Add log breadcrumbs with valgrind Signed-off-by: Chris Wilson commit 273c82a574896885f9f4a78a7463cc4620803624 Author: Chris Wilson Date: Wed Jun 18 18:47:14 2014 +0100 sna: Fix DBG compilation Missed updaing the DBG message in commit 83c0f034454ef0f474126a3398e5e790ac5ef842 Author: Chris Wilson Date: Wed Jun 18 16:51:46 2014 +0100 sna: Pass desired CRTC viewport for completing single CRTC flips References: https://bugs.freedesktop.org/show_bug.cgi?id=80157 Signed-off-by: Chris Wilson commit 62aaf2ff4f8597067cf387865707baa00ed9a123 Author: Chris Wilson Date: Wed Jun 18 18:41:15 2014 +0100 sna: Skip redundant copies when already cloned References: https://bugs.freedesktop.org/show_bug.cgi?id=77436 Signed-off-by: Chris Wilson commit 83c0f034454ef0f474126a3398e5e790ac5ef842 Author: Chris Wilson Date: Wed Jun 18 16:51:46 2014 +0100 sna: Pass desired CRTC viewport for completing single CRTC flips We cannot simply compare against the crtc->shadow_bo for all our needs, so pass in exactly the setup we want and apply that. In particular this is required when flipping away from the single CRTC setup on secondary pipes. Fixes TearFree multi-monitor regression from commit 3932e97057fca16615adaefbc1eb25a0d51a1d8b [2.99.912] Author: Chris Wilson Date: Mon Jun 9 08:58:15 2014 +0100 sna/dri2: Allow TearFree flipping to individual CRTC Reported-by: Leo Wolf Signed-off-by: Chris Wilson Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80191 commit 7119d394a673f40eb467d040c6febf3749924394 Author: Hans de Goede Date: Wed Jun 18 15:01:37 2014 +0200 uxa: Mark the output as off before making pipe changes This is a partial "backport" of commit c6cd10f536, which makes the same change for sna, to avoid users still using uxa ending up with a blackscreen after plugging in an external monitor. Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1032978 Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1103806 Signed-off-by: Hans de Goede commit 52af321a11b5672194bc0bad033b0866221bf4c7 Author: Hans de Goede Date: Wed Jun 18 15:01:36 2014 +0200 uxa: When the output is off, report the cached backlight value This is a "backport" of commit b545e10c50cb to uxa, so that users who are still using uxa, don't end up with a black screen after suspend / resume. Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1032978 Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1103806 Signed-off-by: Hans de Goede commit 44b5912ffcf8dcf4b4b8d3518dd0b62a284f6ee4 Author: Chris Wilson Date: Wed Jun 18 14:48:33 2014 +0100 sna/gen8: Fix cleanup after failing to convert channel Signed-off-by: Chris Wilson commit 21b6e551528fdd939004cfb02a4f192e750a33a1 Author: Chris Wilson Date: Wed Jun 18 14:44:09 2014 +0100 sna/gen8: Fix unaligned() to return true when not aligned Signed-off-by: Chris Wilson commit c5b063b8cc23cc43be458cb3b0d1b28652a24951 Author: Chris Wilson Date: Wed Jun 18 14:34:04 2014 +0100 sna: Assert that we do not try to mmap a proxy Signed-off-by: Chris Wilson commit 40bd45fb802366aa013b9089848b67a28bf3b1ee Author: Hans de Goede Date: Wed Jun 18 14:11:05 2014 +0100 backlight: Fix compiler error /usr/include/xorg/os.h around line 579 reads: extern _X_EXPORT char * strndup(const char *str, size_t n); However strndup is already defined by glibc, and this redefine causes a compile error. This gets triggered because backlight.c does: Without first doing: Causing HAVE_STRNDUP to not be defined. Signed-off-by: Hans de Goede commit e52f917a2370026073ed6851161393a69ee94abe Author: Chris Wilson Date: Wed Jun 18 10:18:26 2014 +0100 sna: Use nxm tiled blits for small regions of large tiles If the region we are blitting is either narrow or short, we may be able to construct a tiling pattern out of a large pixmap. In the process, spot a regression due to commit 542aeca6e67fc64f9133ca3e27ac8eca28af6d25 Author: Chris Wilson Date: Tue Jun 17 12:26:30 2014 +0100 sna: Tweak creation 8x8 tiled patterns which copied too much from the source line. References: https://bugs.freedesktop.org/show_bug.cgi?id=79888 Signed-off-by: Chris Wilson commit b90f6c5aa7359ea6936ae4a7951fcd3bdad05d58 Author: Chris Wilson Date: Wed Jun 18 10:17:02 2014 +0100 sna: Simplify sna_pixmap_get_source kgem_bo_upload_image was open-coded, so replace it with a call to the common function Signed-off-by: Chris Wilson commit 8ea2dd23ab85dc2d4ad0de326c2176354d61cf20 Author: Chris Wilson Date: Wed Jun 18 10:16:26 2014 +0100 sna: Add DBG option to disable snoop bo cacheing Signed-off-by: Chris Wilson commit b2081345843152dadcaa4fbc843b38240d1a3484 Author: Chris Wilson Date: Wed Jun 18 07:37:00 2014 +0100 sna/dri2: fix invalid DBG string References: https://bugs.freedesktop.org/show_bug.cgi?id=80157 Signed-off-by: Chris Wilson commit 77f1a16f1145e69d69a76f2db4b1c60d9a7a4d53 Author: Chris Wilson Date: Tue Jun 17 23:27:16 2014 +0100 sna: Set the correct mapping type after calling mmap__async References: https://bugs.freedesktop.org/show_bug.cgi?id=80001 Signed-off-by: Chris Wilson commit d49f53cc00258e3b1e1a898c02e219b336716002 Author: Chris Wilson Date: Tue Jun 17 22:23:02 2014 +0100 sna: Fix computing source bo for BLT operations If we migrate the pixmap to the GPU, use the GPU bo. This may fix an issue where we might end up using the CPU bo in a rare circumstance. References: https://bugs.freedesktop.org/show_bug.cgi?id=80033 Signed-off-by: Chris Wilson commit 475562d713a00e2f60f7ca067d753fd965d71717 Author: Chris Wilson Date: Tue Jun 17 22:25:05 2014 +0100 sna: Align some function parameters Signed-off-by: Chris Wilson commit c91fc0aad843ffc2660f6a3bf9b875d190e0b0dd Author: Chris Wilson Date: Tue Jun 17 17:06:05 2014 +0100 sna: Remove invalid assert Present and flip fallback may queue self-flips, so the assertion that the crtc->flip_bo != crtc->bo is false. Signed-off-by: Chris Wilson commit 0ca25c7b49efa9c83a3ce5b727e5a339a73d8ee0 Author: Chris Wilson Date: Tue Jun 17 14:08:06 2014 +0100 sna: Cache small pixmaps rather than forcing a large fallback for BLT operations Signed-off-by: Chris Wilson commit 322e51a3a552d89e5e5ecbb82a9243f134c8d36f Author: Chris Wilson Date: Tue Jun 17 13:47:32 2014 +0100 sna: Relax PREFER_GPU so that we don't needless create small GPU bo Signed-off-by: Chris Wilson commit 542aeca6e67fc64f9133ca3e27ac8eca28af6d25 Author: Chris Wilson Date: Tue Jun 17 12:26:30 2014 +0100 sna: Tweak creation 8x8 tiled patterns Avoid reading back from a GTT mmapping. Signed-off-by: Chris Wilson commit 4ff5cc539bc3f88ab9c05dc67c25aab08cbdf859 Author: Chris Wilson Date: Tue Jun 17 10:54:39 2014 +0100 sna/dri2: Fixup failure to do a render copy for DRI2CopyRegion Signed-off-by: Chris Wilson commit 96d1fe314c4bb4d862b057a440e575bd32d63460 Author: Chris Wilson Date: Tue Jun 17 08:51:00 2014 +0100 sna: Add a few missing checks for all-damaged Signed-off-by: Chris Wilson commit 30f521c717f7301004e7cb77ba66b840b3f773c6 Author: Chris Wilson Date: Tue Jun 17 08:30:55 2014 +0100 sna: Discard GPU damage for the magic upload proxy The magic upload proxy is initially considered damaged in both the GPU and CPU. Signed-off-by: Chris Wilson commit e5b94c2d9b29b78432aa72049934e365a2913710 Author: Chris Wilson Date: Tue Jun 17 08:12:42 2014 +0100 sna/glyphs: DBG compile fix Signed-off-by: Chris Wilson commit a4d845bc8f77e4a36064f132720ce462d0bdd5b4 Author: Chris Wilson Date: Mon Jun 16 14:25:16 2014 +0100 sna: Regularly check the cache level on bo Signed-off-by: Chris Wilson commit 09f0fe9b3943ae2ba1e0ebd679ea04177427a8cf Author: Chris Wilson Date: Mon Jun 16 12:53:34 2014 +0100 sna/dri2: Allow single crtc exchanges to be queued up Signed-off-by: Chris Wilson commit 4ab99d67990d5834061a10b0bd1dd220d4611248 Author: Chris Wilson Date: Mon Jun 16 12:51:08 2014 +0100 uxa: Allocate frontbuffer to meet old fence constaints libdrm is a little lax and does not allocate sufficient space for us to safely use buffers on old gen. So compute the size we want for ourselves. Reported-by: Cem Aydin Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80088 Signed-off-by: Chris Wilson commit 10cb36e1ddc6f4bf41941b24d6557343aa595a13 Author: Chris Wilson Date: Mon Jun 16 10:33:07 2014 +0100 sna/glyphs: Add DBG option to force use of the glyph image mask Signed-off-by: Chris Wilson commit 8f0fc2ed4cc19c90dd2f519080915ca0c54e1baf Author: Chris Wilson Date: Mon Jun 16 10:27:16 2014 +0100 uxa: Add some explanation to why bo were rejected References: https://bugs.freedesktop.org/show_bug.cgi?id=80088 Signed-off-by: Chris Wilson commit 6b82962e58c0959c94f2df1f0ebd9a478b15cb6b Author: Chris Wilson Date: Mon Jun 16 10:13:09 2014 +0100 sna: Fix logic inversion for final placement in is_gpu_dst() Signed-off-by: Chris Wilson commit 62102f505cd13840e4c910adbe762b3fb46dfaec Author: Chris Wilson Date: Mon Jun 16 09:46:54 2014 +0100 sna: Promote better active buffer reuse Signed-off-by: Chris Wilson commit 2877d018d3510e415f273ce955eb5c272c340e7d Author: Chris Wilson Date: Mon Jun 16 09:24:45 2014 +0100 sna/glyphs: Show number of glyphs in DBG Signed-off-by: Chris Wilson commit 38434b29f4a7b324704bbb1e772371be3c0e397b Author: Chris Wilson Date: Mon Jun 16 08:03:21 2014 +0100 sna: Fix some batch DBG Helps to check for a successful read when we want to show the batch after execution. Signed-off-by: Chris Wilson commit 243bd26ad31776b2dc45563107e669cf7b45fd91 Author: Chris Wilson Date: Sun Jun 15 21:42:10 2014 +0100 sna: Clear our private hints about front rendering exported bo Unlike GLXWindows, GLXPixmaps are rendered directly into, without a staging copy. Therefore we must treat those carefully when exported and clear our hints everytime control passes back to the Client. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79999 Signed-off-by: Chris Wilson commit 500e77d765580e8581c95117b941a4daa940c21e Author: Chris Wilson Date: Sun Jun 15 20:55:30 2014 +0100 sna: Add more DBG to track transitions between CRTC and its shadow or flip bo Signed-off-by: Chris Wilson commit 0a6a94630f4fec26bed2aefb25de1a165193ff10 Author: Chris Wilson Date: Sun Jun 15 14:04:50 2014 +0100 test: Add a simple SHM test skeleton Signed-off-by: Chris Wilson commit 981aafe797f25aca4977a22f271d387b7fb4ae63 Author: Chris Wilson Date: Fri Jun 13 21:41:36 2014 +0100 sna: Enable TearFree by default for systems with PSR Panel Self-Refresh requires us to avoid frontbuffer rendering in order to be power efficient. This is a job for TearFree! Signed-off-by: Chris Wilson commit b27837d5372facde0f9f69eb8df664d2798f0911 Author: Chris Wilson Date: Sat Jun 14 06:51:34 2014 +0100 sna: Fix assertions for discarding upload caches The upload caches are special, along with having a bo->proxy, they also claim to be completely damaged on both the GPU and CPU. Allow that to pass through when discarding the proxy. Reported-by: Nick Bowler Bugzilla; https://bugs.freedesktop.org/show_bug.cgi?id=79992 Signed-off-by: Chris Wilson commit 15485602d8451bcf6c2e979ccbd9cdc11111bcce Author: Chris Wilson Date: Fri Jun 13 20:30:25 2014 +0100 sna: Use the right is-clipped hint The region here has yet to be clipped, and so the only valid is-clipped hint is from the flags computed from the PolyRect extents. Make sure we use those when determining whether it is valid to discard damage. Fixes regression from commit ad0390068832ad4727371902fe41a85a53de1894 [2.99.903] Author: Chris Wilson Date: Tue Sep 24 10:00:03 2013 +0100 sna: Separate out copy preferrence from operating in place decision Reported-by: Nick Bowler Tested-by: Nick Bowler Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79992 Signed-off-by: Chris Wilson commit b082a07a69ba5490fba47766c4f608b1cdf2427e Author: Chris Wilson Date: Fri Jun 13 18:56:57 2014 +0100 sna: Only discard the CPU bo if we have a GPU bo to transfer the damage to References: https://bugs.freedesktop.org/show_bug.cgi?id=79992 Signed-off-by: Chris Wilson commit 05fdfe3b2813495ea122471ed6dde340e538aa65 Author: Chris Wilson Date: Fri Jun 13 21:41:16 2014 +0100 intel-virtual-output: Compile fixes Signed-off-by: Chris Wilson commit 8a92261b22a8c134a48d1491627ac05136563603 Author: Chris Wilson Date: Fri Jun 13 19:59:16 2014 +0100 intel-virtual-output: Disable outputs on remote displays upon shutdown References: https://bugs.freedesktop.org/show_bug.cgi?id=79994 Signed-off-by: Chris Wilson commit 0c6fa0cdf0cebcd592281e578da7a7f53cbfe186 Author: Chris Wilson Date: Fri Jun 13 19:29:41 2014 +0100 intel-virtual-output: Initialise image after clone As the image inherits its width/height from the clone, we need to set those first on the clone. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79994 Signed-off-by: Chris Wilson commit 79b4e45ebe3a61f9b5937ad226eead9eebce87ac Author: Chris Wilson Date: Fri Jun 13 19:15:08 2014 +0100 intel-virtual-output: Only call XShmDetach on a valid SHM segment Saves a couple of extraneous XErrors. Signed-off-by: Chris Wilson commit c8074b6bcfa8c208433574721135faa4d919d32a Author: Chris Wilson Date: Fri Jun 13 18:37:15 2014 +0100 intel-virtual-output: Check for an error creating the DRI3 fd Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79994 Signed-off-by: Chris Wilson commit 0a0b9dc3538ef731463fb321852b8802cd04e457 Author: Chris Wilson Date: Fri Jun 13 16:14:43 2014 +0100 sna: Refine decision whether to use the GPU or render inplace Signed-off-by: Chris Wilson commit dd87aa8f85c4bafa105fd881a0cce45bda6143df Author: Chris Wilson Date: Fri Jun 13 15:06:13 2014 +0100 sna: Track the pageflip bo's busyness Signed-off-by: Chris Wilson commit 8322e3e5c6ed19e029f365d869c80388863c424d Author: Chris Wilson Date: Fri Jun 13 13:50:34 2014 +0100 intel: Check that the fd points to i915 after authorising The call to GETPARAM requires either a rendernode or authorisation. Therefore we can only assert that the fd is a valid i915 handle after authorise() and not before. Reported-by: Hans de Goede Signed-off-by: Chris Wilson commit 97003b1a2d6c8beb5c4df4bece5a2d5b03b5ae2f Author: Chris Wilson Date: Fri Jun 13 12:32:12 2014 +0100 sna/gen6+: Prefer the BLT for large overlapping copies Signed-off-by: Chris Wilson commit 87fc78ac4f6bbfa8e9427d392356ee26942bf955 Author: Chris Wilson Date: Fri Jun 13 10:52:47 2014 +0100 sna: Try to reuse the current cursor if we fail to update As a last resort, continue to display the old cursor if we tried and failed to create a new cursor. Signed-off-by: Chris Wilson commit cd381ad96eadb72eb1a983c973a5dd47f547fc8b Author: Chris Wilson Date: Fri Jun 13 09:31:50 2014 +0100 xvmc: Refactor mutex locking Signed-off-by: Chris Wilson commit bccfb768ee14348b6db5b140fdd6df5fdbfcad0c Author: Chris Wilson Date: Fri Jun 13 09:14:47 2014 +0100 xvmc: Sanitize compile and library flags Signed-off-by: Chris Wilson commit 5a0cb1049c2fa0586708719210a2d2cffa7a4491 Author: Chris Wilson Date: Fri Jun 13 09:15:30 2014 +0100 configure: Fix DRI2 build One s/DRI2/have_dri2/ too far. Signed-off-by: Chris Wilson commit d47a01fce4d3d9c043a45fc034dc436c0af41981 Author: Chris Wilson Date: Fri Jun 13 08:51:20 2014 +0100 sna: Reorder ignore_cpu_damage() to avoid asserts Tricksy asserts making sure that the correct arguments are passed around! Reported-by: Arkadiusz Miskiewicz commit c4d4bd5d92c7e53a7be6fa7fe119e4507af213ec Author: Chris Wilson Date: Fri Jun 13 08:32:34 2014 +0100 sna/gen8: Allow reads from scanout to be cached Signed-off-by: Chris Wilson commit 8e743ccef8f19b1226ceb8d6a5ceab65584a620d Author: Chris Wilson Date: Fri Jun 13 08:27:05 2014 +0100 sna/gen8: Check for WT support before attempting to use the WT mocs It appears the kernel has a better idea when WT is supported on which gen8 parts. I assumed it was always supported, but experience suggests otherwise, so only use WT support when advertised. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79967 Signed-off-by: Chris Wilson commit 7bc669dd4b7e3e5978e95e4131d1f9215afbc041 Author: Chris Wilson Date: Fri Jun 13 07:48:15 2014 +0100 configure: Allow manual disabling of each DRI level Signed-off-by: Chris Wilson commit ffe067705b524930d243b18e97508219ed26390c Author: Chris Wilson Date: Thu Jun 12 09:52:50 2014 +0100 sna: Try to use CPU uploads before BLT uploads As the BLT upload implies a sync (and a likely GPU boost), only do so if we cannot do an immediate upload with the CPU, either directly to backing memory or through the GTT. Signed-off-by: Chris Wilson commit 93444ea673be0ac11092a13ab3354f886f4aad63 Author: Chris Wilson Date: Thu Jun 12 09:26:14 2014 +0100 sna: Refactor USE_INPLACE debug macro Signed-off-by: Chris Wilson commit abbf6d6b7962650607dc3517939991de56ce8a91 Author: Chris Wilson Date: Wed Jun 11 21:14:00 2014 +0100 sna/gen8: Clear a couple more push constants Signed-off-by: Chris Wilson commit 7f9b015d87300810712a0b6f2680249fb0576f90 Author: Chris Wilson Date: Wed Jun 11 19:10:22 2014 +0100 sna: Remove bogus assertion The sna_pixmap is cleared afterwards, it does not need to be clear on free. Signed-off-by: Chris Wilson commit e3a0e40310b6c46b2f887bc0d75b11cc06ec8fa0 Author: Chris Wilson Date: Wed Jun 11 18:07:46 2014 +0100 sna: Fix direction flags for memmove Under a compositor, the current deltas may invert the sense of the copy direction, causing scrolling corruption. Simplify handling those flags by making them invariant for the function. Reported-by: Bruno Prémont Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79843 Signed-off-by: Chris Wilson commit 55660376d555131348e7efaaec66d6d27ffc1e6e Author: Chris Wilson Date: Wed Jun 11 17:43:33 2014 +0100 sna: Use the pixmap header creation routine A few more places could use the common pixmap creator, just remember to handle the SHMPixmap complication! Signed-off-by: Chris Wilson commit 1beaa980ea6a9617f7dd4dc87b881c37cc7a277b Author: Chris Wilson Date: Wed Jun 11 16:41:22 2014 +0100 sna/gen6+: On small GT avoid the intermediate copy for overlaps If the memory bw is constrained on the GPU avoid doing the 2-pass copy for overlaps on the render ring, and do the single pass slower BLT copy instead - as since it has to transfer less data it will be faster. Reported-by: Ildar Nurislamov Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77436 Signed-off-by: Chris Wilson commit 31467b01e3f5ece0c8f8d4c03b52fc3f238b3d7e Author: Chris Wilson Date: Wed Jun 11 16:21:13 2014 +0100 sna/gen6+: Overlapping bo by definition have compatible depths Signed-off-by: Chris Wilson commit 0dfe7d93de893b3ead6c3be662b3a17d9335c2ca Author: Chris Wilson Date: Wed Jun 11 16:12:26 2014 +0100 sna: First copy to overlap temporary must be using GXcopy Signed-off-by: Chris Wilson commit ad076b394028c40fc6cb88c64b72e46702a936b3 Author: Chris Wilson Date: Wed Jun 11 15:49:43 2014 +0100 sna: Remove debugging hunk Stray hunk in self-copy boxes. Signed-off-by: Chris Wilson commit a90160dcecf0a3df21a04b4f467e660f69ddae54 Author: Chris Wilson Date: Wed Jun 11 15:40:25 2014 +0100 sna: Update damage pointer after the implicit reduction sna_damage_contains_box() routine implicitly reduces the damage before performing its check. This may alter and even destroy the damage entry, so pass in the handle so that it can be updated correctly. References: https://bugs.freedesktop.org/show_bug.cgi?id=77436 Signed-off-by: Chris Wilson commit c9003c6d9602dba682e577ea7ce39990ea378db3 Author: Chris Wilson Date: Wed Jun 11 15:29:59 2014 +0100 sna: Fix scanout creation routine for old kernels <= 3.11 With an old kernel, we would fail to actually mark the display as part of the scanout domain, but proceed to assign it a fb id. This caused our asserts to report our bookkeeping error. Reported-by: Pavel Ondračka Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79909 Signed-off-by: Chris Wilson commit 5705e66a329273c478f6ecd8f41b8f5633095581 Author: Chris Wilson Date: Wed Jun 11 14:34:33 2014 +0100 sna: Add some DBG to the memmove path Signed-off-by: Chris Wilson commit b41a51e0f54c983ef72bc31125419382d666d48c Author: Chris Wilson Date: Wed Jun 11 14:22:26 2014 +0100 sna: Tweak self-copy boxes to hit the GPU more often Signed-off-by: Chris Wilson commit b879de6246d3f2e66e9c7e326db93e5ff390159f Author: Chris Wilson Date: Wed Jun 11 14:08:31 2014 +0100 sna: Recheck source bo after migrating dst (in case of src == dst) Signed-off-by: Chris Wilson commit 21c150a873a77f983fad29b4517844a0b92e0609 Author: Chris Wilson Date: Wed Jun 11 14:00:04 2014 +0100 sna: Skip redundant clears Signed-off-by: Chris Wilson commit e1a4438f074f9cd5eba946cc1172c419c31b03c9 Author: Chris Wilson Date: Wed Jun 11 13:59:46 2014 +0100 sna/glyphs: Always print some DBG when performing fallback Signed-off-by: Chris Wilson commit 040eccb9b10d0941c7d81fc9c66c259563370f2a Author: Chris Wilson Date: Wed Jun 11 13:18:33 2014 +0100 sna: Add some asserts to track redundant damage operations Signed-off-by: Chris Wilson commit 4fccfe3a516ab8383dfd99ccd7fe1840c88bbc01 Author: Chris Wilson Date: Fri Jun 6 08:30:59 2014 +0100 sna/gen8: Check offset alignment before using a userptr for RENDER Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79053 Signed-off-by: Chris Wilson commit 1217dbc88e0901e4a657ee51e2e3b7d00bb72b77 Author: Chris Wilson Date: Thu Apr 17 21:04:15 2014 +0100 sna: Support efficient cursor updates for old machines Given a kernel patch to fix coherency of physical objects, we can use a more efficient method for updating cursors. Signed-off-by: Chris Wilson commit ee7d2e0a8ef882c1d4e0e77a0148b54dcfbf4236 Author: Chris Wilson Date: Fri Jun 6 12:00:35 2014 +0100 sna: MST topologies may change on any hotplug event As the kernel does not send out an explicit DISCOVER event, we have to reinspect every connector after every hotplug event to detect topology changes. Signed-off-by: Chris Wilson commit 782c920b01d5144125f2fe954e29fd7b07a1913e Author: Chris Wilson Date: Thu May 8 08:04:58 2014 +0100 sna: Create a stable output name based on MST topology In order to provide persistent names for MST devices, which may change topology dynamically, the kernel exports a PATH blob. We can then use this path to generate the output name, and so reuse existing XID when a monitor is plugged back in. Based on the patch for -modesetting by Dave Airlie. Signed-off-by: Chris Wilson commit e680e54eab6ffa72e5e1eb6cc0e3fe4b235b06a1 Author: Chris Wilson Date: Wed Jun 11 10:48:26 2014 +0100 sna: Ignore setting read-only for temporary userptr maps Signed-off-by: Chris Wilson commit d9bf6f3fecb3d691937da086a5270334c6c0e69a Author: Chris Wilson Date: Wed Jun 11 10:35:50 2014 +0100 sna: Prefer to operate inplace on the GPU rather than stall on the CPU Signed-off-by: Chris Wilson commit 277e6ab84bb0c692358a34a76e7962c64efb0362 Author: Chris Wilson Date: Wed Jun 11 10:12:01 2014 +0100 sna: Discard TearFree damage before checking for an overwriting upload Signed-off-by: Chris Wilson commit eb9de37daaea45e917fa7f44444a9782070f7333 Author: Chris Wilson Date: Wed Jun 11 09:29:50 2014 +0100 sna: Silence compiler warnings for discarding const Region points Signed-off-by: Chris Wilson commit 085141348cfe8386059062a58172855f72d5e5b6 Author: Chris Wilson Date: Wed Jun 11 08:39:42 2014 +0100 sna: Squelch log messages for fb/pixmap tiling in the default case The output is confusing, so hide it unless it is modified by the user. Signed-off-by: Chris Wilson commit 53c1faa5093f8a0c969e3ebe9f27ee1ce5137e14 Author: Chris Wilson Date: Wed Jun 11 07:59:41 2014 +0100 sna: Mark the GPU as all damaged when discarding CPU bo during uploads Signed-off-by: Chris Wilson commit e2bfa715a9e115921263d572b9f4c496b550a494 Author: Chris Wilson Date: Tue Jun 10 21:28:32 2014 +0100 sna/dri2: Check that the window covers the whole CRTC before xchg Fixes TearFre regression from commit 3932e97057fca16615adaefbc1eb25a0d51a1d8b [2.99.912] Author: Chris Wilson Date: Mon Jun 9 08:58:15 2014 +0100 sna/dri2: Allow TearFree flipping to individual CRTC Signed-off-by: Chris Wilson commit d0f32a9d3afed4ea45644723fa1134957b981125 Author: Chris Wilson Date: Tue Jun 10 16:37:24 2014 +0100 sna: Cast away compiler warning sna_display.c: In function 'has_user_backlight_override': sna_display.c:595:3: warning: return discards 'const' qualifier from pointer target type [enabled by default] Signed-off-by: Chris Wilson commit 216beed6dfcb3a8d6b0b480d0281fcadb0cd3036 Author: Chris Wilson Date: Tue Jun 10 09:09:30 2014 +0100 sna: Expand debugging to cover gen8 BLT variations Signed-off-by: Chris Wilson commit f19195f7ea317f5601543724c725c4b63fdc3f60 Author: Chris Wilson Date: Tue Jun 10 14:25:42 2014 +0100 sna: Fix arguments when flipping transformed TearFree outputs Signed-off-by: Chris Wilson commit c16b2a125929c9027b62c07d47e9602553153eef Author: Chris Wilson Date: Tue Jun 10 13:25:57 2014 +0100 sna: Tidy a few asserts on the state of crtc->flip_bo Signed-off-by: Chris Wilson commit fd6aaec33d8ad70544cc02e061c9c5e68cf83414 Author: Chris Wilson Date: Tue Jun 10 11:01:38 2014 +0100 sna: Handle the user passing "Backlight" "" Allow the user to disable the backlight control by passing the empty string in the xorg.conf. Signed-off-by: Chris Wilson commit cb7b27a705b477ae1b369786eea13fb14506d54a Author: Chris Wilson Date: Mon Jun 2 09:36:13 2014 +0100 2.99.912 snapshot commit 52e2aa0939eee3566e4d6ee3a34f8acd93570530 Author: Chris Wilson Date: Tue Jun 10 08:49:41 2014 +0100 sna: Queue a flip after fixing up a failed flip After a flip fails, we try to update the CRTC manually to new fb. However, the caller is still expecting to receive an event though the drm device to notify when the flips are complete. In order to maintain that ABI, we need to queue another flip after the fixup (to the currently bound fb). Signed-off-by: Chris Wilson commit 68ac3039e4170b318952213311534cd213cbaff7 Author: Chris Wilson Date: Mon Jun 9 22:01:05 2014 +0100 sna: Fix the typo in the last commit Rewording the sentence and reordering the arguments was a mistake! Signed-off-by: Chris Wilson commit fdb8f490441b0ba91fdf530b982cedc2f2acf122 Author: Chris Wilson Date: Mon Jun 9 21:46:37 2014 +0100 sna: Add an extra error message before disabling a CRTC One of the error paths to disable a pipe was lacking a log message. Signed-off-by: Chris Wilson commit c1154ae1070806b8da1aad29f75c9659f2a403df Author: Chris Wilson Date: Mon Jun 9 17:04:47 2014 +0100 configure: Allow disabling control over the backlight Some OS prefer to control the backlight themselves through another daemon and so do not want X interfering. Signed-off-by: Chris Wilson commit bb2d5e3696b52835770a62a951f7ed7e51291f88 Author: Chris Wilson Date: Mon Jun 9 16:30:15 2014 +0100 sna: Defer the copy back from the shadow CRTC bo until we allocate the target Signed-off-by: Chris Wilson commit b00a60b41736c399f849217626f246e6e7d1f7eb Author: Chris Wilson Date: Mon Jun 9 15:03:23 2014 +0100 sna: Fix cut'n'paste DBG error Signed-off-by: Chris Wilson commit 8901a99afb7be4f6f377a8e84e62e5d768c8443d Author: Chris Wilson Date: Mon Jun 9 14:56:02 2014 +0100 sna/dri2: Avoid trying to flip between bo with different pitches It could happen that we create front/back buffers with different pitches. The kernel refuses to flip between such buffers, and so we will hit some fallback paths that try to fix up the failed flips. Circumvent such by avoiding the flip. Signed-off-by: Chris Wilson commit 16574754a99c4472c1c90c426d9c1665a898f1d6 Author: Chris Wilson Date: Mon Jun 9 14:54:26 2014 +0100 sna: Fixup normal flips between different pitches Apply the manual CRTC fixup in case pageflipping fails. This can happen if the pitches between the front and back differ for example. Signed-off-by: Chris Wilson commit 3932e97057fca16615adaefbc1eb25a0d51a1d8b Author: Chris Wilson Date: Mon Jun 9 08:58:15 2014 +0100 sna/dri2: Allow TearFree flipping to individual CRTC Baby step. We first take advantage of TearFree to allow us to redirect a single CRTC to the DRI2 frontbuffer and so allow a fullscreen game covering a single monitor to avoid expensive blits when running in a multi-monitor setup. Signed-off-by: Chris Wilson commit af3130cbba8375b9060a3a8cef5b03189d01c419 Author: Chris Wilson Date: Mon Jun 9 13:13:25 2014 +0100 sna: Do not rely on udev_monitor_receive_device() being non-blocking The libudev documentation says that is it non-blocking by default, but experience shows otherwise. Reported-by: Sedat Dilek Signed-off-by: Chris Wilson commit 981af18190be772b469761bc124b9f46c19d5093 Author: Chris Wilson Date: Sun Jun 8 16:55:07 2014 +0100 uxa: Do not FreePixmap(screen->devPrivate) Prevent the crash caused by commit 444a1f7a8802999e27ecf5f6eb598df2206f7277 Author: Brendan King Date: Thu Apr 24 11:37:45 2014 +0100 fb: fix screen pixmap leak on server reset Call FreePixmap() instead of free() to destroy the screen pixmap in fbCloseScreen(). Signed-off-by: Frank Binns Reviewed-by: Keith Packard Signed-off-by: Keith Packard Signed-off-by: Chris Wilson commit 86f2cae45048158154eb2b1dbb181c3e1d6a8bf7 Author: Chris Wilson Date: Sun Jun 8 15:18:34 2014 +0100 sna/dri2: DBG compile fix Typo in DBG message. Signed-off-by: Chris Wilson commit 6153141fa6e1328a007efe6862ff2d7b4adaaf83 Author: Chris Wilson Date: Sun Jun 8 14:48:20 2014 +0100 sna/dri2: Allow xchg to replace the frontbuffer when all outputs are off Signed-off-by: Chris Wilson commit 9306a148cbf1a2471540f3301136d57e93197593 Author: Chris Wilson Date: Sun Jun 8 09:40:19 2014 +0100 sna/dri2: Use xchg for offscreen drawables where applicable Signed-off-by: Chris Wilson commit 22cd7c873edd0b641e54e81d643ec6b0ea921f88 Author: Chris Wilson Date: Sun Jun 8 08:46:27 2014 +0100 sna/dri2: Explicitly drain the pending event queue before swapping As there may be some latency between the wakeup and the queue, do a final check if there is a pending vblank event before we decide whether to chain up or perform an immediate flip. Signed-off-by: Chris Wilson commit 258e0cda1d69f74736d0e0be014996173e275543 Author: Chris Wilson Date: Sun Jun 8 08:21:38 2014 +0100 sna/dri2: Mark frames under construction As we may recurse into the vblank handler whilst waiting for the TearFree shadow, we need to be careful that we do not queue the frame from the vblank handler that we are in the process of constructing. Signed-off-by: Chris Wilson commit eb8f3a9b345c75023b49512c2db57527d906db7f Author: Chris Wilson Date: Sun Jun 8 07:45:52 2014 +0100 sna/dri2: Check the xchg against the Pixmap size As the Window may be resized between the client sending the swap request and the xchg being processed, we need to validate the swap against the final target not the buffers supplied originally by the client. Signed-off-by: Chris Wilson commit fc64ba821749ed0a0197a69d9bae81957aceb55f Author: Chris Wilson Date: Sat Jun 7 23:27:49 2014 +0100 sna: Restore backlight when switching to VT fbcon doesn't adjust the backlight when it takes over. Therefore if X performs a VT switch whilst its outputs are off, fbcon wakes up with no backlight and users are unhappy. Make the assumption that whoever takes over the VT will set the outputs as it desires, and that the failsafe value is to then turn the backlight to full. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67025 Signed-off-by: Chris Wilson commit ecd80a3a997b11307445c50621d4e86e241a5b22 Author: Chris Wilson Date: Sat Jun 7 14:57:10 2014 +0100 sna: Fix reporting of TearFree The switch was moved after we checked whether pageflips are supported, but the log message was left in the old location. Signed-off-by: Chris Wilson commit 035be60f332e4729fb90261605ef6c06a9d9c903 Author: Chris Wilson Date: Sat Jun 7 13:26:12 2014 +0100 sna: Release CRTC on VT switch In order to free up memory and improve our bookkeeping when the X server is switched away from the current VT, disable the CRTC. Signed-off-by: Chris Wilson commit 717e00facd27696c6b8a1a6c343b2f94bfa2b59b Author: Chris Wilson Date: Sat Jun 7 09:07:16 2014 +0100 sna: Allow TearFree to be enabled by default via configure Signed-off-by: Chris Wilson commit dcb64b55092ea3da6adf357305d65b58d848db7b Author: Chris Wilson Date: Sat Jun 7 08:30:38 2014 +0100 sna: Fix TearFree for non-compositors The tearfree code forgot to update the shadow bo, so after the first flip it would be rendering to the scanout anyway and flip to itself periodically. Signed-off-by: Chris Wilson commit c65fab07402a338f015c2b339e996beca783c2bf Author: Chris Wilson Date: Fri Jun 6 22:07:44 2014 +0100 sna: Fix no relaxed delta path for gen4+ This is for debug purposes only. Signed-off-by: Chris Wilson commit a378196fddcf3043257a7e56225060e5e36cfa7b Author: Chris Wilson Date: Fri Jun 6 16:58:45 2014 +0100 sna: Auto-retire upload proxies This was disabled in commit 9f4f855ba37966fb91d31e9081d03cf72affb154 Author: Chris Wilson Date: Mon May 26 07:06:18 2014 +0100 sna: Implicit release of upload buffers considered bad as retiring the buffers during the command setup could free one of the earlier bo used in the command. But discarding the snooped bo could still be advantageous. So restore the automatic discard of upload proxies, but make sure we only do between operations. Signed-off-by: Chris Wilson Cc: Matti Hämäläinen commit 23840bd329cf4da3a4bdd5a1a466125a95473534 Author: Chris Wilson Date: Fri Jun 6 16:10:29 2014 +0100 sna: Only allow the inplace copy to replace a complete overwritten GPU bo And double check after recreating the new GPU bo that is still mappable. Signed-off-by: Chris Wilson commit 283ff8cbe4137f46cc027dd6aadc69d0270cb33d Author: Chris Wilson Date: Fri Jun 6 15:04:25 2014 +0100 sna: Rearrange scanout_flush checking to avoid potential crash With a shadow, we may never attach a GPU bo to the frontbuffer, so be careful when checking the scanout not to dereference that NULL pointer. Signed-off-by: Chris Wilson commit 694ff54aca16ccf39e94d505942eb857b3101d7d Author: Chris Wilson Date: Fri Jun 6 13:34:18 2014 +0100 sna: Report KMS driver version Signed-off-by: Chris Wilson commit 0ebcef4f2ebe82e9b90589aa4266a9228e2b5fdb Author: Chris Wilson Date: Fri Jun 6 11:39:57 2014 +0100 man: Update notes about TearFree Signed-off-by: Chris Wilson commit 1f943a7d92d0e3a8895ba7d539cfc5e726bcc8b7 Author: Chris Wilson Date: Fri Jun 6 11:25:47 2014 +0100 sna/dri2: Restore flush on front buffers after swapping bo Fallout from commit 8369166349c92a20d9a2e7d0256e63f66fe2682b Author: Chris Wilson Date: Wed Jun 4 08:29:51 2014 +0100 sna/dri2: Enable immediate buffer exchanges We set the flush hint too early, as we may need to swap the GPU bo for a more appropriate buffer for DRI. Signed-off-by: Chris Wilson commit c6cd10f536e099277cdc46643725a5a50ea8b525 Author: Chris Wilson Date: Thu Jun 5 22:43:37 2014 +0100 sna: Hook up a backlight udev monitor for external changes Changes to the backlights are notified through uevents. Hooking up a udev monitor to listen out for external changes to the backlight (e.g. through ACPI function keys, or by the user writing to /sys/class/backlight directly) is easier than enabling polling on the backlight sysfs file using X's select() mechanism. Since we listen to backlight changes, we have to be careful not to confuse the side-effects of disabling connectors (which may cause either ourselves or the kernel to turn off the backlight) with the user value. Many thanks to Alexander Mezin for the suggestion to use udev for tracking the notifications for external changes to the backlight. Reported-by: Alexander Mezin Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79699 Signed-off-by: Chris Wilson commit b545e10c50cbb2dd6f9fd53369667bed0d8f1b51 Author: Chris Wilson Date: Thu Jun 5 15:54:32 2014 +0100 sna: When the output is off, report the cached backlight value Signed-off-by: Chris Wilson commit f0b8720807d9c1994e6db91a607efe4711b0d1ca Author: Chris Wilson Date: Thu Jun 5 15:31:54 2014 +0100 sna: Inline calls to save/restore backlight around output DPMS The intertwined logic was a little confusing to read mixed between the functions, so inline it. Signed-off-by: Chris Wilson commit 9f7775158341c8384da870e06cab200deddf48c1 Author: Chris Wilson Date: Thu Jun 5 15:31:27 2014 +0100 sna: Set initial output DPMS state from kernel Signed-off-by: Chris Wilson commit 9e02fe269dc79ff867d1d2cb3a8673ee2861bd56 Author: Chris Wilson Date: Thu Jun 5 15:49:03 2014 +0100 sna: Make sure we recompute the vblank interval after reconfiguring the CRTC Signed-off-by: Chris Wilson commit 51909f37ed6405c38f1c46a4012952be79031994 Author: Chris Wilson Date: Thu Jun 5 14:54:55 2014 +0100 sna: Skip marking the CRTC as damaged for TearFree As we have reorder the application of damage on a TearFree frontbuffer to before we attach the CRTC, we do not need to then schedule the update afterwards (until it gets drawn by the client). Signed-off-by: Chris Wilson commit c7efe88a895a692e5f840562a09dac385508db57 Author: Chris Wilson Date: Thu Jun 5 14:50:04 2014 +0100 sna: Fix DBG compilation Update the DBG to reflect the new arguments to sna_damage_reduce_all() Signed-off-by: Chris Wilson commit 9566fc0ccc71bc4fcd6bf83b567a41cc5366f5ee Author: Chris Wilson Date: Thu Jun 5 12:26:23 2014 +0100 sna: Curry parameters to sna_damage_all() It is far easily to pass the PixmapPtr into the function and have it pluck out the width and height than do so in all callers. Signed-off-by: Chris Wilson commit 1327918f91dce2051b809594db5a3ed555934612 Author: Chris Wilson Date: Thu Jun 5 12:04:29 2014 +0100 sna: Mark CPU as all damaged when discarding a busy GPU bo When we discard a GPU bo, we need to make sure that the remaining content is marked as only accessible via the CPU shadow pointer. Regression from commit 65301412ecf2d55ab55a2d7faeaa048d4ee8b1d0 Author: Chris Wilson Date: Sat May 17 20:59:38 2014 +0100 sna: Discard active GPU buffers before uploading into them Reported-by: Jan Alexander Steffens Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79517 Signed-off-by: Chris Wilson commit 8369166349c92a20d9a2e7d0256e63f66fe2682b Author: Chris Wilson Date: Wed Jun 4 08:29:51 2014 +0100 sna/dri2: Enable immediate buffer exchanges The primary benefit of this is avoid the extra blit when using a compositor and instead propagate the compositor flip on the frontbuffer to the scanout, or equivalently allows a fullscreen game to flip onto the scanout without intervention by TearFree. Signed-off-by: Chris Wilson commit 08148896196443a8582c30b47ff546acca78d69c Author: Chris Wilson Date: Tue Jun 3 15:48:55 2014 +0100 configure: XORG_DRIVER_CHECK_EXT does not create CFLAGS/LIBS variables XORG_DRIVER_CHECK_EXT only adds the package name to the list of REQUIRED_MODULES (which is later passed to pkg-config). For our optional dependencies, we must do a later call to pkg-config to verify the package is available and then remember to include the includes with the CFLAGS. Signed-off-by: Chris Wilson commit 0c81041e9b42f9df0c86c88c8648dd20ed26d0ab Author: Chris Wilson Date: Tue Jun 3 15:39:50 2014 +0100 configure: Remove xf86driproto from REQUIRED_MODULES We only depend upon the original DRI1 infrastructure when building i810 with DRI support. So unless that is true, do not throw an error if the legacy protocol is absent. Signed-off-by: Chris Wilson commit 689ee76a14da7e5f98997ac427f457af840dea3f Author: Adam Jackson Date: Tue Jun 3 10:26:46 2014 -0400 configure: Don't link the driver against libX11 78dc0c04745ad4485b994f67833f4a155749f01d added REQUIRED_MODULES to the driver link line for... some reason. That pulled in the libs from the XF86DRI check, which near as I can tell has always been wrong, all of the other extension checks just look for the protocol module and xextproto doesn't define dri1 protocol in any case. Signed-off-by: Adam Jackson commit 8297c969ae749ef58d259b2ded2231b928efba43 Author: Chris Wilson Date: Tue Jun 3 09:47:27 2014 +0100 sna: Replace the bo for tiled uploads if not suitable and being replaced Signed-off-by: Chris Wilson commit 1c55d0447dba5bbde5be3903b273e04e3c9d084f Author: Chris Wilson Date: Tue Jun 3 12:43:51 2014 +0100 sna: Allow replacements to cancel operations between both bo under a Pixmap Signed-off-by: Chris Wilson commit a82bfb033448eb61bf8cc7f5358be019f0cc28e6 Author: Chris Wilson Date: Tue Jun 3 09:28:24 2014 +0100 sna: Discard unwanted damage when promoting to a full CPU migration Signed-off-by: Chris Wilson commit 4cafd1fbb1a2441a9ba5dac7f2a0e1b3f5957c62 Author: Chris Wilson Date: Mon Jun 2 16:01:10 2014 +0100 sna: Fix early return in download using the GPU In commit 961139f5878572ebea268a0bbf47caf05af9093f Author: Chris Wilson Date: Fri May 30 09:45:15 2014 +0100 sna: Use manual detiling for downloads the code for deciding when to use the GPU was refactored into a new function that also performed the transfer, but failed to notice the early return. Signed-off-by: Chris Wilson commit d6a412812c19fe4698752d2589ead4965048b107 Author: Chris Wilson Date: Mon Jun 2 10:32:11 2014 +0100 sna: Use CPU mmappings for linear uploads The other half of the commit that accidentally got included with commit bb49222a514b1d6041f3d9530a22f5701377118b Author: Chris Wilson Date: Mon Jun 2 08:25:52 2014 +0100 sna: Add DBG hints for using inplace CPU mmappings Signed-off-by: Chris Wilson commit 454367f5945dd17a7cfc566b1986654fc976cabe Author: Chris Wilson Date: Mon Jun 2 09:25:01 2014 +0100 Only enable the new Cursor API for the next pre-release of Xorg Make sure we can compile against the pre-release tarballs at the expense of an innocuous compile warning if compiled against xserver.git Signed-off-by: Chris Wilson commit ff36e1f7546e0ac4d6e831e5cf8d1317792ed7af Author: Keith Packard Date: Tue Nov 19 15:20:44 2013 -0800 uxa: Add Present extension support Signed-off-by: Keith Packard Reviewed-by: Eric Anholt Conflicts: configure.ac src/uxa/intel.h src/uxa/intel_driver.c commit 14ff08c2827d36f7f08256dc57b84aaf80d17ab4 Author: Keith Packard Date: Tue Nov 19 23:20:38 2013 -0800 uxa: Restructure DRM event handling. This refactors the drm interrupt handling logic quite a bit, both to allow for either DRI2 or Present handlers, but also to eliminate passing pointers through the kernel. Passing pointers left the kernel holding the only reference to some internal X server data structures. After a server reset, the X server would end up using stale pointers stored in those structures. Using simple integers makes it possible to empty the queue of pending interrupt data and then ignore the stale kernel data. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit 7f28b1cfa20eb4fc11c1a9c1e0c0fac7847be72e Author: Keith Packard Date: Tue Nov 19 22:58:33 2013 -0800 uxa: Support 64-bit MSC values. Handle kernel vageries about MSC reporting The kernel sometimes reports bogus MSC values, especially when suspending and resuming the machine. Deal with this by tracking an offset to ensure that the MSC seen by applications increases monotonically, and at a reasonable pace. Also, provide a full 64 bits of MSC value by noticing wrapping and tracking the high 32-bits of MSC separately. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt Conflicts: src/uxa/intel_dri.c commit dd6db82680b05cde4a47116b7096c054f3837e20 Author: Chris Wilson Date: Fri May 9 20:26:19 2014 +0100 uxa: Add DRI3 and miSyncShm support Based on a patch by Keith Packard. Signed-off-by: Chris Wilson commit 975b9798be77b30cbed485583d0ccb48318708f7 Author: Chris Wilson Date: Wed May 21 08:58:24 2014 +0100 sna: Add support for Present Signed-off-by: Chris Wilson commit d8eb87f84f88ad2df42c6fed1d93df76589a14e3 Author: Chris Wilson Date: Thu May 8 16:25:32 2014 +0100 sna: Add support for DRI3 Signed-off-by: Chris Wilson commit 0fbe8995d51b4643f1cf06c07da8b4b5ac5ae7c3 Author: Chris Wilson Date: Thu May 22 11:17:35 2014 +0100 sna: Relax tiling height restrictions Only force the even-tile-row alignment if we have an old GPU with an old kernel that doesn't perform conservative alignment for us (as required). Signed-off-by: Chris Wilson commit 67b37332bd45dd4cea297107bfdc9df21984fdcd Author: Chris Wilson Date: Tue May 20 15:37:13 2014 +0100 intel-virtual-output: Add DRI3 xfer path Just as proof-of-principle. Signed-off-by: Chris Wilson commit 9cf6cd9726ed5ba73bb8c38c06f7b5c78706309b Author: Chris Wilson Date: Wed May 21 12:52:18 2014 +0100 Add rudimentary tests for Present Signed-off-by: Chris Wilson commit 6ab6734369fbd902a23109f4c3626df9d529891c Author: Chris Wilson Date: Fri May 9 11:08:15 2014 +0100 Add rudimentary tests for DRI3 This is a simple little test to create a pixmap from a local bo, copy it to a normal pixmap, then read it back by importing it into anther local bo. It tests the fundamental mechanisms of opening a DRI3 render device, importing into pixmaps, exporting into /buffers and a read-barrier. Signed-off-by: Chris Wilson commit d6240d197be1e752c0de26fbf84fc8fa8d55383c Author: Chris Wilson Date: Wed May 14 07:55:03 2014 +0100 intel: Clear structs for valgrind When probing the module, clear structs passed into unknown ioctls to keep valgrind quiet. Signed-off-by: Chris Wilson commit d27c948a4382c4024ce5e76f1ea82103fc8e9d66 Author: Chris Wilson Date: Fri May 9 13:58:37 2014 +0100 intel: Add common routines and configure probing for DRI3 Signed-off-by: Chris Wilson commit 8a02886a24c8699374a39a9363e72bec0e7bbe30 Author: Chris Wilson Date: Fri May 30 21:09:34 2014 +0100 sna/dri2: Use real async flips Presuming that we have both kernel support and Xorg support, of course. Signed-off-by: Chris Wilson commit c17d704a5baa0c902994f035d3da39d77d31fef3 Author: Chris Wilson Date: Fri May 30 21:21:00 2014 +0100 sna: Enable kernel support for asynchronous flips If a flip fails, attempt to restore the previous working configuration (using a modeset) then disable further flipping. Signed-off-by: Chris Wilson commit c95a4002d1d27937731c59e84254ccb3b1246ccd Author: Chris Wilson Date: Sun Jun 1 08:44:13 2014 +0100 sna/dri2: Hide MSC reported as going backwards OML_sync_control mandates that MSC must be monotonic, so if the kernel reports that they go backwards, lie. Signed-off-by: Chris Wilson commit b1c07c20a371795a8dc4102f83fe542d62d8a4e6 Author: Chris Wilson Date: Sat May 31 21:58:13 2014 +0100 sna/dri2: Always force the async blits to be immediate Signed-off-by: Chris Wilson commit 1b5f91e14226799ef4ec6461de93fa9193ef2ebc Author: Chris Wilson Date: Sat May 31 21:41:45 2014 +0100 sna/dri2: Decouple spent flip If the flip is already completed before we finish the previous flip, the drawable has been replaced already and we can unchain the flip queue. Signed-off-by: Chris Wilson commit 0ee1940a4ffc1901534fa3bf15adb427527a8c20 Author: Chris Wilson Date: Sat May 31 13:21:04 2014 +0100 sna/dri2: Mark queued flip MSC as the one after next Signed-off-by: Chris Wilson commit 2df4466adae7f299eac3f7fd3e5f33ee4b22e53f Author: Chris Wilson Date: Fri May 30 13:27:32 2014 +0100 sna/gen8: Clear all URB push constant allocations A little paranoia to clear the unused portion of the URB and dedicate it to VS entries. Signed-off-by: Chris Wilson commit 1618d6cfa63e31ebaedadf575dcbdf5b07451bde Author: Chris Wilson Date: Fri May 30 12:14:40 2014 +0100 sna/gen8: Set GT level We use the GT level to decide how favourable it is to use the GPU in various circumstances, now set it. Signed-off-by: Chris Wilson commit bb49222a514b1d6041f3d9530a22f5701377118b Author: Chris Wilson Date: Mon Jun 2 08:25:52 2014 +0100 sna: Add DBG hints for using inplace CPU mmappings Signed-off-by: Chris Wilson commit 487df2e7b105b996c4d620ec2af6331ebc167f47 Author: Chris Wilson Date: Mon Jun 2 08:30:57 2014 +0100 sna: Silence a DBG compiler warning kgem.c: In function '_kgem_submit': kgem.c:3243:12: warning: ignoring return value of 'write', declared with attribute warn_unused_result [-Wunused-result] write(fd, kgem->batch, batch_end*sizeof(uint32_t)); Signed-off-by: Chris Wilson commit ffbe0aa1851c35cc2403633ca493e9fc6a471fd4 Author: Chris Wilson Date: Fri May 30 18:41:39 2014 +0100 sna: Reuse the first scanout bo The path of last resort is meant to reuse the first scanout bo if they all busy (since it will be the oldest). It chased a dangling pointer instead. Signed-off-by: Chris Wilson commit 40fe1f2c09a98ac75b05db3663d29ee1a64ed280 Author: Chris Wilson Date: Fri May 30 18:30:47 2014 +0100 sna: Do not allow imported buffers to be cached Signed-off-by: Chris Wilson commit fc1f9b91ae2c761e4b126daecab13e13ae2534d3 Author: Chris Wilson Date: Fri May 30 18:11:16 2014 +0100 sna: Mark all caches for expiration Signed-off-by: Chris Wilson commit 3dac734bb0fb0ae1febfef9a9289cf830a87be1c Author: Chris Wilson Date: Fri May 30 10:31:37 2014 +0100 test: Only compute the masked pixel value if depth!=32 Minor saving for when we use a8r8g8b8. Signed-off-by: Chris Wilson commit 961139f5878572ebea268a0bbf47caf05af9093f Author: Chris Wilson Date: Fri May 30 09:45:15 2014 +0100 sna: Use manual detiling for downloads If we can CPU mmap the GPU bo, prefer to do so for migration to the CPU as this saves an extra serialisation step. Signed-off-by: Chris Wilson commit 93d3df493d359f76ea710441d891a0333e755fb8 Author: Chris Wilson Date: Fri May 30 22:49:05 2014 +0100 sna: Unexport kgem_get_unique_id() This should always be set during bo creation Signed-off-by: Chris Wilson commit 792584fa740dbc81b72fd4f4bdf27d65b9c046cf Author: Chris Wilson Date: Wed May 28 14:00:26 2014 +0100 sna/dri2: Reorder declarations to compile on old Xorg Signed-off-by: Chris Wilson commit 562c47fc21b9029ebff29b53d2be590df4329264 Author: Chris Wilson Date: Wed May 28 12:51:18 2014 +0100 Silence CLang (almost) Fix up all the warnings about implicit enum conversions. The container_of() macro remains defunct. Signed-off-by: Chris Wilson commit 6282fc9d0d3b2899be52ca4a43a3d9313e9049a6 Author: Chris Wilson Date: Wed May 28 10:42:58 2014 +0100 sna/dri2: Fix the continuation mode for old style triple buffering Otherwise we end up sending too many SwapCompletes back to the client and confusing ourselves. Signed-off-by: Chris Wilson commit 916354164bcb149e1323a3219d85e7bba6e61e04 Author: Chris Wilson Date: Tue May 27 20:16:55 2014 +0100 sna: Fix the depth/format on the temporary shadow Pictures When scaling the output, we re-render onto the scanout using a call to Composite, for which we create temporary Pictures. In most cases, the mismatching depth/format goes unnoticed, but along one particular fallback path, we use those to create a new Picture but the mismatching format results in a segfault. Reported-by: Matti Hämäläinen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79320 Signed-off-by: Chris Wilson commit d8360bd74f5b62a27c019c65ed9001cac8bf43ed Author: Chris Wilson Date: Tue May 27 20:14:02 2014 +0100 sna: Handle bad picture format/depth mismatches Scaling the output feed in an invalid picture->format/depth combination which causes the fallback downsampling function to explode. Whilst this is a bug in the higher layer, we can handle the error anyway. References: https://bugs.freedesktop.org/show_bug.cgi?id=79320 Signed-off-by: Chris Wilson commit 93b319cf9a355e8400b864046cdb4cfb56b657a0 Author: Chris Wilson Date: Fri May 23 13:16:50 2014 +0100 uxa: Silence the compiler over a couple of unused variables intel_driver.c: In function 'I830LeaveVT': intel_driver.c:1085:24: warning: unused variable 'intel' [-Wunused-variable] intel_screen_private *intel = intel_get_screen_private(scrn); ^ intel_driver.c: In function 'I830EnterVT': intel_driver.c:1102:24: warning: unused variable 'intel' [-Wunused-variable] intel_screen_private *intel = intel_get_screen_private(scrn); Signed-off-by: Chris Wilson commit e6ee0679374f8fc80cb34693f80affe6ea676ddb Author: Chris Wilson Date: Fri May 23 14:29:42 2014 +0100 uxa: Silence compiler for warnings in Cursor API changes Signed-off-by: Chris Wilson commit 4321e8decd7be9daaa49c6ab4e8bb9bd66faae31 Author: Chris Wilson Date: Fri May 23 14:29:42 2014 +0100 sna: Silence compiler for warnings in Cursor API changes The API changed again in the RC, so update to keep the compiler quiet. At the same time, protect against the ARGB_CURSOR struct changes. Signed-off-by: Chris Wilson commit 2a0dc7ed4961d5bda08bb583a7a6a2cc633b27e4 Author: Chris Wilson Date: Mon May 26 08:23:45 2014 +0100 sna/dri2: Move scanout processing from frame event to global The scanout is a global property, track it as so. The primary benefit to this is it strengthens our assertions that we never hand out an active scanout for use as a back buffer. Signed-off-by: Chris Wilson commit 05f149285b429c7b3f25ac8049477230aaef512c Author: Chris Wilson Date: Sun May 25 07:14:53 2014 +0100 sna/dri2: Defer reallocation of backbuffer until request If we defer the reallocation of the backbuffer until the client requests the set of current buffers (with GetBuffers), then we can often avoid allocating the fresh backbuffer as the flip often retires before the client is ready. Signed-off-by: Chris Wilson commit e8d8f754ebf77f17a4666c8f649907bee50313bd Author: Chris Wilson Date: Fri May 23 15:52:20 2014 +0100 sna/dri2: Make the swap-limit transitions more obvious Signed-off-by: Chris Wilson commit 9f4f855ba37966fb91d31e9081d03cf72affb154 Author: Chris Wilson Date: Mon May 26 07:06:18 2014 +0100 sna: Implicit release of upload buffers considered bad Currently upload buffers are automatically decoupled when the buffer is retired. As retiring can happen during command setup after we have selected which bo to render with, this can free the bo we plan to use. Which is bad. Instead of making the release of upload buffers automatic, we manually check whether the buffer is idle before use as a source to consider scrapping it and replacing it with a real GPU bo. This is likely to keep upload buffers alive for longer (limiting reuse between Pixmaps but making reuse of the buffer within a Pixmap more likely) which is both good and bad. (Good - may improve the content cache, bad - may increase the amount of memory used by upload buffers for arbitrary long periods.) Reported-by: Matti Hämäläinen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79238 Signed-off-by: Chris Wilson commit b508d8f3318c42a2a87b7731789b1d03610e9b46 Author: Chris Wilson Date: Mon May 26 06:54:03 2014 +0100 sna: Assert that we do not replace active IO buffers References: https://bugs.freedesktop.org/show_bug.cgi?id=79238 Signed-off-by: Chris Wilson commit 605fcd9050efc816ac8163e8d626f466d98261c2 Author: Chris Wilson Date: Fri May 23 13:34:38 2014 +0100 sna/dri2: Handle allocation failure adding frame events gracefully Now that we do not preallocate the storage for the chain in the Window devPrivates, we need to check for an allocation failure. Signed-off-by: Chris Wilson commit 36a4a654da87b22f7ce31d1ca99389cedb57eee8 Author: Chris Wilson Date: Fri May 23 12:48:10 2014 +0100 sna/dri2: Tidy add/remove chain to use the common DRI2 private The code is more readable directly updating the private rather than hiding the pointer chasing through the opaque lookups. Signed-off-by: Chris Wilson commit 417997f3892b3a5fe43f5951dbde1476092ec82c Author: Chris Wilson Date: Fri May 23 12:40:10 2014 +0100 sna/dri2: Handle offscreen Window and Pixmap with CRTC tracking Signed-off-by: Chris Wilson commit d3781e19cfc3edf61b69617cd60da1e421de8ffc Author: Chris Wilson Date: Fri May 23 11:16:56 2014 +0100 test/dri2: Restore original configuration after testing Signed-off-by: Chris Wilson commit 1d6106c2893f2783611715960a0f5099ef54b4a0 Author: Chris Wilson Date: Fri May 23 10:11:10 2014 +0100 sna/dri2: Combine the DRI2 Window privates together into a single struct Signed-off-by: Chris Wilson commit d6c4e72f1a8008818fc0e5c19c9dc147f1794777 Author: Chris Wilson Date: Fri May 23 10:03:39 2014 +0100 sna/dri2: Free the private CRTC tracker on each window Remember to clean up our privates when the window is destroyed. Signed-off-by: Chris Wilson commit 43fd06ee7d95db4114ce7b0261685380a48a8708 Author: Chris Wilson Date: Fri May 23 09:03:17 2014 +0100 sna/dri2: Adjust current msc / target seq between CRTCs The target_msc supplied by the client is required to be monotonic. Since the client does not know which CRTC the window is on, they do not control from which pipe we derive the MSC, and so we need to adjust the hardware values such that the client only ever sees a monotonic value. Signed-off-by: Chris Wilson commit c8decdbccdefa87b635d871a8295608961f0d22e Author: Chris Wilson Date: Fri May 23 09:13:31 2014 +0100 test/dri2: Check validity of MSC across CRTC Signed-off-by: Chris Wilson commit a6613a8fe3908433ee33a167f57a0fae4e785a22 Author: Chris Wilson Date: Thu May 22 23:48:20 2014 +0100 sna/dri2: Queue the flip immediately for the next frame If we compute that we want to flip on the next frame, queue it immediately rather than take a round trip through the kernel and risk missing the vblank. Signed-off-by: Chris Wilson commit 24443c6c897278a8a196bf4a8df9fab4485f38b4 Author: Chris Wilson Date: Thu May 22 22:47:35 2014 +0100 sna/dri2: Tidy computation of target sequence Signed-off-by: Chris Wilson commit a767ad2e50a503e2b979c976a502ff358064b820 Author: Chris Wilson Date: Thu May 22 21:18:10 2014 +0100 sna/dri2: Use the timestamps stored on the CRTC Now that we store the information for the swap completion on the CRTC, we don't need to pass it around inside the frame event. Signed-off-by: Chris Wilson commit 5d80af306677b6d0c52487707bbbcf8de065803b Author: Chris Wilson Date: Thu May 22 13:04:31 2014 +0100 sna/dri2: Tweak flip continuation Minor tidying to the returned target_msc and a useful assertion. Signed-off-by: Chris Wilson commit 8d1e9afb60a61bf490a282a16db1c15a9ad7d077 Author: Chris Wilson Date: Thu May 22 12:34:05 2014 +0100 intel-virtual-output: Probe after claiming virtual output Rerun a detection cycle after claiming the virtual output so that it is hidden again. References: https://bugs.freedesktop.org/show_bug.cgi?id=78293 Signed-off-by: Chris Wilson commit 0f0cd87c66a4e373ab9b26626514d43b5f4978e5 Author: Chris Wilson Date: Thu May 22 10:04:09 2014 +0100 sna/dri2: DBG fixes Update the DBG statements to match current code. Signed-off-by: Chris Wilson commit 80dfbaa3c39e1c56aaa9f8951e3bbcc30a9b748d Author: Chris Wilson Date: Thu May 22 00:24:07 2014 +0100 sna/dri2: Move fixed array allocations to per-crtc Replace the fixed size MAX_PIPES array by moving the vblank handling to per-crtc. Signed-off-by: Chris Wilson commit 9b21237a1caa369133e6ba972e2ec39feac21bcc Author: Chris Wilson Date: Wed May 21 23:40:36 2014 +0100 sna/dri2: Maintain sequence calculation in 64bits Avoid casting down to 32bits at the begining of the calculation to only then compare against the full 64bit values later. Signed-off-by: Chris Wilson commit c548f231c1d59f578dfb113c549b5b6e015e7c5a Author: Chris Wilson Date: Wed May 21 23:35:19 2014 +0100 sna/dri2: Fix WaitMSC to maintain the vblank counters Fix WaitMSC to also use 64 bit counters and maintain the last vblank notifications. Signed-off-by: Chris Wilson commit 1f237bb6db9724358eca0467362c03dc6a41dc4a Author: Chris Wilson Date: Wed May 21 23:02:52 2014 +0100 sna/dri2: Apply a margin of error to the sequence wrap detection If we have a queue of events, we may set the msc from a recent vblank query only to then process an older vblank event and declare the counter wrapped. Signed-off-by: Chris Wilson commit 00d9396f6bf0bbbdfca7cdb1cbdbde8f0b2ad59c Author: Chris Wilson Date: Wed May 21 20:00:56 2014 +0100 sna: Fix attachment of the default monitor to the first output Broke during code motion in commit add84cd8a8dc6d285912d0ea3a3a3e7faa9e0942 Author: Chris Wilson Date: Fri May 2 13:21:02 2014 +0100 sna: Perform dynamic connector discovery Reported-and-tested-by: Jay Little Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79015 Signed-off-by: Chris Wilson commit 5168a160a1385c23d275d616f2649d5cae7c15d9 Author: Chris Wilson Date: Wed May 21 19:16:32 2014 +0100 sna/dri2: Decouple queued events Becareful when reaping a chain on a destroyed window as some events may be queued ahead. Signed-off-by: Chris Wilson commit 66e14c96d0ddede90e36084a80a97c3f16c2b386 Author: Chris Wilson Date: Wed May 21 18:38:36 2014 +0100 sna/dri2: Limit pending swaps to 1 when queueing a future blit Signed-off-by: Chris Wilson commit bf4475d29de589a0d0e71dfb895d19a635f8cc3e Author: Chris Wilson Date: Wed May 21 11:31:29 2014 +0100 sna/dri2: Tidy conditional use of XORG_CAN_TRIPLE_BUFFER Signed-off-by: Chris Wilson commit 0b3ea29727075bf2b0d86bbeca7dd78201936913 Author: Chris Wilson Date: Wed May 21 08:26:21 2014 +0100 sna/dri2: Tidy recording of the last swap sequence number and time Signed-off-by: Chris Wilson commit 183a0728ba52be9d052f5a5f6e6b54c4a9ee8253 Author: Dave Airlie Date: Wed May 21 12:41:58 2014 +1000 uxa: fix getmsc to not fail hard If some outputs go away we race with this call and apps get X errors and fall over. Do what SNA does and don't bother trying. Signed-off-by: Dave Airlie commit 2dbe76c4925e02b8ec20b986069e2ff38cea5bba Author: Chris Wilson Date: Wed May 21 07:38:35 2014 +0100 sna/dri2: Tidy computation of 64bit ust Signed-off-by: Chris Wilson commit a82f6a7594ee13170aba5bac7fb57cd5550b27ee Author: Chris Wilson Date: Tue May 20 12:20:38 2014 +0100 sna/dri2: Client cannot be NULL, so drop the checks Signed-off-by: Chris Wilson commit c548427e6d3a3fb50acec4b405b9d0ea977d3cc9 Author: Chris Wilson Date: Tue May 20 16:36:31 2014 +0100 sna: Only mark the scanout as being busy for writes (not solitary reads) Signed-off-by: Chris Wilson commit 61df0ffc0be8d934d86ac45c67da910479998cc7 Author: Chris Wilson Date: Tue May 20 12:07:50 2014 +0100 sna/dri2: Verify that the reference pipe is still active for flipping We rely on the reference pipe to drive the event wake up. If we issue a deferred flip, there is a chance that the user could rearrange the screen on another crtc whilst otherwise preserving the screen geometry. Signed-off-by: Chris Wilson commit 197ab0cda06c44aa1a2b17bf69ac08612811b107 Author: Dave Airlie Date: Tue May 20 07:45:14 2014 +0100 uxa: fix pageflips on 3 head scenarios While fixing up UXA for MST I eventually fell over this bug. Signed-off-by: Dave Airlie [ickle: replace constant with macro to track pipe-dependent code] commit bfd0e41d5c7b8bff28ff429b26f4c977e4c37d12 Author: Chris Wilson Date: Mon May 19 12:31:49 2014 +0100 sna: Fix assertions for combining shadow transforms and TearFree When the RandR shadow buffer is enabled we set the sna_crtc->transform flag. We set the crtc->transform_in_use only when coordinate transforms are required - i.e. we may enable the shadow buffer if a CRTC is out of bounds, but otherwise has no transformation. That confused the asserts. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 1a84875c21b7113f55e6ce0c4a1f914524aa3f97 Author: Chris Wilson Date: Fri May 16 15:05:31 2014 +0100 sna: Switch iterators over to real CRTCs only Many loops only want to walk the real CRTCs, so update the loop bounds to be explicit and assert that they are the real ones. Signed-off-by: Chris Wilson commit 65301412ecf2d55ab55a2d7faeaa048d4ee8b1d0 Author: Chris Wilson Date: Sat May 17 20:59:38 2014 +0100 sna: Discard active GPU buffers before uploading into them Signed-off-by: Chris Wilson commit f5e43058465d33025d99d83927d1ce6a8e103ff9 Author: Chris Wilson Date: Fri May 16 22:45:45 2014 +0100 sna: Do not mark an upload as a potential replace if the dst is pinned This saves us from trying to optimise for an operation that cannot happen as we cannot replace the destination buffer. Signed-off-by: Chris Wilson commit df297e9fafe1a7de1036f3151f93de67661c2a4e Author: Chris Wilson Date: Fri May 16 18:20:06 2014 +0100 sna: Userptr lands upstream, enable. No longer an optional feature of an experimental kernel! Signed-off-by: Chris Wilson commit 89e8f2b35bbbcaac23dd1d3fc42e83d8214a9130 Author: Chris Wilson Date: Fri May 16 10:14:57 2014 +0100 sna/dri2: Update the swap type for chained flips We stash the pending flip mode into the closure, but failed to copy that over to the right field when continuing with a chain of flips. The impact was that we would fail to issue the required SwapComplete to unblock the clients. Fixes regression from commit 96ce362ba40bf9560fb1aa27a6ae5fdd2a8bd428 Author: Chris Wilson Date: Tue May 13 09:46:45 2014 +0100 sna/dri2: Do not rate-limit vblank=0 swaps Reported-by: francisbrwn Signed-off-by: Chris Wilson commit e73d51247be5018fe53346f991e2f178c917cb13 Author: Chris Wilson Date: Thu May 15 23:00:53 2014 +0100 sna/video: Only migrate the destination window By using move-area-to-gpu and specifying that we overwrite the target area, we can optimize away any needless damage migration. Signed-off-by: Chris Wilson commit 10c18b1a4631ebab5508f4308c73129f2111e964 Author: Chris Wilson Date: Thu May 15 21:50:41 2014 +0100 intel-virtual-output: Mark the source SHMPixmap as writeable This is fortunately a no-op, as it gets initialized to zero already (that is the pixmap is writeable). However, we may as well do the right thing... Signed-off-by: Chris Wilson commit b21fc65b23fcbb2b9a04eb92e3719d88e2d026dc Author: Chris Wilson Date: Thu May 15 11:23:16 2014 +0100 intel: Update PCI IDs for Cherryview Copied from kernel commit 7d87a7f709650bde4d7d63117f25ee1c095da5dd Author: Ville Syrjälä Date: Wed Apr 9 18:19:04 2014 +0300 srm/i915/chv: Add Cherryview PCI IDs and also includes non-functional changes from commit fd3c269f8ff940cc0fbb3b7f7e84c0572f6f759a Author: Zhao Yakui Date: Thu Apr 17 10:37:35 2014 +0800 drm/i915: Split the BDW device definition to prepare for dual BSD rings on BDW GT3 Signed-off-by: Chris Wilson commit 2afeef0c3ffeae768198fc08c9f365ccd28b7f5d Author: Chris Wilson Date: Thu May 15 11:28:48 2014 +0100 sna: Mark the CHV vsync method as unknown Similar to the story with Baytrail, vsync is a lost art. Signed-off-by: Chris Wilson commit d33e77d58a6f6f23e87943530197f8dc2b076981 Author: Chris Wilson Date: Fri May 16 09:59:25 2014 +0100 sna: Handle driver failures more gracefully Avoid busy-spinning waiting for the cache to expire after a failure. Try to free up any overdue expiration, then if we still fail, we free the entire cache. Currently, it would spin over the expiration until all items were overdue and then freed. Signed-off-by: Chris Wilson commit 0625185f4772f1c7f8e8d7f265432fd77cdd27fc Author: Chris Wilson Date: Wed May 14 12:40:18 2014 +0100 intel-virtual-output: Make it possible to disable building via configure Signed-off-by: Chris Wilson commit c179003b10845b43a7a8958a99b1bf1c6617252c Author: Chris Wilson Date: Wed May 14 16:15:24 2014 +0100 sna/dri2: Ensure new immediate blits are queued behind outstanding swaps OML_sync_control: If there are multiple outstanding swaps for the same window, at most one such swap can be satisfied per increment of MSC. The order of satisfying outstanding swaps of a window must be the order they were issued. The only challenge is to keep both this behaviour and vblank_mode=0 benchmarking. Signed-off-by: Chris Wilson commit 84d0790453089be5d1034037065df1ea37ad48fe Author: Chris Wilson Date: Wed May 14 11:37:51 2014 +0100 sna: After disabling the TearFree shadow, flush any pending flips If we complete a flip after resizing and recreating the TearFree shadow, we may process the flip completion events whilst the output is only partially reconfigured. Signed-off-by: Chris Wilson commit 68181f0b530934d74f48cb36022c17b29a76cb75 Author: Chris Wilson Date: Wed May 14 07:46:43 2014 +0100 sna/dri2: Carefully check for a completed swap We have to open-code kgem_bo_is_busy() in order to avoid prematurely retiring the rq->bo. The unfortunate outcome here is that the bo may be recycled for a new batch before it is finally released from the request. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 9f76133e71f1a7cb44ed2f98762ba8626f1e85e6 Author: Chris Wilson Date: Tue May 13 12:46:39 2014 +0100 sna/dri2: Tighten reporting of faked flip events GetDrawableMSC is specified as returning the frame counter and timestamp of the last flip event associated with the drawable, not the current hardware timestamp. Signed-off-by: Chris Wilson commit 96ce362ba40bf9560fb1aa27a6ae5fdd2a8bd428 Author: Chris Wilson Date: Tue May 13 09:46:45 2014 +0100 sna/dri2: Do not rate-limit vblank=0 swaps Signed-off-by: Chris Wilson commit b7316feeda552a88245dadde9dadd9b40b8a4992 Author: Chris Wilson Date: Wed May 14 07:46:00 2014 +0100 sna: Add some DBG to track rogue requests In particular allow the pointer cache to be disabled for valgrind. Signed-off-by: Chris Wilson commit 692555cc03c3a3632d2eaacdbbe800afdefd9f77 Author: Chris Wilson Date: Thu May 8 15:22:44 2014 +0100 sna: Rename DRI2 files, functions and variables Signed-off-by: Chris Wilson commit 09e26d38e9eca33e27fd0b30524e75814d5d3ad9 Author: Chris Wilson Date: Wed May 14 08:42:48 2014 +0100 sna: Avoid promoting SHM Pixmaps for DRI Signed-off-by: Chris Wilson commit 7303c6c75df135d2d01f126f240a270ad26201c6 Author: Chris Wilson Date: Mon May 12 09:56:51 2014 +0100 sna: Check for PRIME scanouts Query the cache level on imported dma-bufs to see if they need special handling. Signed-off-by: Chris Wilson commit ad01e1c8700caeaf0288b72450646d7ebe7cce93 Author: Chris Wilson Date: Thu May 8 13:02:15 2014 +0100 sna: Fix another assignment inside an assert Another recent introduction, spotted by Rinat Ibragimov. Signed-off-by: Chris Wilson commit e78a00c5da922024ac64270fae0797d98d1d6e57 Author: Chris Wilson Date: Thu May 8 06:45:43 2014 +0100 sna: Add an xorg.conf option for removing unused outputs Clients are not yet ready for outputs that disappear at runtime, often unexpectedly dieing with asynchronous BadOutput errors. A simple workaround is to not remove any output just yet - but allow users to opt in via xorg.conf, i.e. Section "Device" Option "DeleteUnusedDP12Displays" "true" EndSection The name chosen is to be consistent with the nvidia driver, which did MST first and encountered all of these issues first, and has also been adopted for -modesetting. If this is combined with persistent output naming (i.e. based on DisplayPort branch topology), the number of outputs presented to the user should be static. Instead of removing the outputs, we have to mark them detached instead to avoid throwing errors from the kernel. Based on the patch for -modesetting by Dave Airlie. Signed-off-by: Chris Wilson commit a93157587a82c699e7df76fb482c49569f0686b9 Author: Chris Wilson Date: Wed May 7 21:20:56 2014 +0100 sna: Tidy thread handling under valgrind If valgrind is running, keep it simple and avoid using unknown instructions (causing valgrind to die with SIGILL). Signed-off-by: Chris Wilson commit efd9e9c3eeb83b9e5725fa642066925d608c059d Author: Chris Wilson Date: Wed May 7 21:19:57 2014 +0100 sna/dri: Use move-area-to-gpu to handle clipped regions more efficiently Signed-off-by: Chris Wilson commit 1385ca9eeb26b0b82b623da619a65036830ccceb Author: Chris Wilson Date: Wed May 7 21:19:32 2014 +0100 sna: Initialize value read through ioctl to please valgrind Signed-off-by: Chris Wilson commit 7d516589ba9d0325e57e08d41becff64f81e2d00 Author: Chris Wilson Date: Wed May 7 17:49:15 2014 +0100 sna/dri: Implement TripleBuffering using DRI2SwapLimit An addition to DRI2 that was overlooked at the time, was the support added for having multiple outstanding swap requests in the core. The importance of this is that we can then send the SwapComplete reply after the pageflip is completed and not before as we currently do to fake triple buffering - in clear violation of OML_sync_control. Signed-off-by: Chris Wilson commit 18416b5162e6d6e5415916c55c935b08c980d7f3 Author: Chris Wilson Date: Wed May 7 13:49:13 2014 +0100 sna: Don't assign in an assert That just nullifies the point of the assert in the first place. Spotted-by: Joakim Tjernlund Signed-off-by: Chris Wilson commit 0250a4f4ba5b765fe4e9be585e03c92aa2376402 Author: Chris Wilson Date: Wed May 7 12:40:01 2014 +0100 sna: Fix bogus assertion about conn->encoder_id The connector's encoder_id is only set if the output is active. Signed-off-by: Chris Wilson commit c410f0cd982cad8de440727b0ad7d9268b89a704 Author: Chris Wilson Date: Wed May 7 11:04:10 2014 +0100 sna: Set desired mode after rediscover during VT switch When switching back to the VT, rerun the output discovery (if such an event was pending) before we attempt to set the desired modes. Signed-off-by: Chris Wilson commit c38512e12e879ae8932528a9cac5ffbf4ea138c0 Author: Chris Wilson Date: Wed May 7 11:01:30 2014 +0100 sna: Run output discovery before modes query If we keep the separate discovery uevent, we need to run it first in the cases where we get combined discovery+hotplug events. Signed-off-by: Chris Wilson commit 7aefd003bb65cc52a74dfcfd8af4b67a364343ff Author: Chris Wilson Date: Wed May 7 10:13:53 2014 +0100 sna: Fix unattached outputs for ZaphodHeads We need to preserve possible_crtcs for the later check that we can use the output with the particular ZaphodHead (which owns a CRTC). Signed-off-by: Chris Wilson commit c5bad6daaaa60fa8970eaf4a1ce485cd4c72c2fd Author: Chris Wilson Date: Wed May 7 07:53:11 2014 +0100 intel-virtual-output: Disable remote CRTC using the remote Display! Reported-by: Kirill Müller Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78293 Signed-off-by: Chris Wilson commit 632d3dfe215c38f2dd052625ea8ec34582dfafef Author: Chris Wilson Date: Tue May 6 12:24:37 2014 +0100 sna: Treat encoder id array as invariant Signed-off-by: Chris Wilson commit f62dfd8f518bb4117d395f81b684340dc4f1ede5 Author: Chris Wilson Date: Tue May 6 07:37:59 2014 +0100 sna: Allow connectors without an associated encoder In the future, we may see a setup where connectors are created without being attached to a specific encoder, instead associated with multiple generic encoders - such as DP MST sink devices. To handle this, we need to recheck their active encoder at runtime after branch configuration events (or possibly hotplug). Signed-off-by: Chris Wilson commit ea602f7e10c6319c4213776b49f2ae25739af316 Author: Chris Wilson Date: Tue May 6 06:58:35 2014 +0100 sna: Discard the TearFree damage when doing a full CPU migration Signed-off-by: Chris Wilson commit b8d71e029cec5c8d1c7e344331b86d2e27f6bc24 Author: Chris Wilson Date: Mon May 5 20:59:24 2014 +0100 sna: Tidy computation of clone/crtcs for fake outputs Signed-off-by: Chris Wilson commit 77507909a18b687698f6d4e436ef66d942308fc3 Author: Chris Wilson Date: Mon May 5 19:43:25 2014 +0100 intel-virtual-output: Grab the server whilst cleanging up the local output Signed-off-by: Chris Wilson commit 56126d00503fd9bc6fe30781ecddb2fb67de817b Author: Chris Wilson Date: Mon May 5 18:17:01 2014 +0100 sna: Refine hints to allow inplace writes whilst compositing aligned traps Signed-off-by: Chris Wilson commit 464ef44ab1d691a4bffecbe88be8182adf9fd4ff Author: Chris Wilson Date: Mon May 5 14:49:31 2014 +0100 intel-virtual-output: Copy existing CRTC information If we fail to disable the remote output during initialisation, copy the current configuration in order to try and keep the bookkeeping in order. Signed-off-by: Chris Wilson commit 194f9332d35601178ae3595bc17a3f52f5644cb9 Author: Chris Wilson Date: Mon May 5 14:29:16 2014 +0100 intel-virtual-output: Try disabling Panning after disabling CRTC Signed-off-by: Chris Wilson commit 5279ebf56449a9b9edd28ff23e9c8a20af792795 Author: Chris Wilson Date: Mon May 5 13:06:11 2014 +0100 intel-virtual-output: Mark ShmPixmap destinations as writeable In order to prevent a subsequent BadAccess when we try to use it as a ShmPixmap, we need to mark the segment as writeable. Signed-off-by: Chris Wilson References: https://bugs.freedesktop.org/show_bug.cgi?id=78293 commit a93d2d4f910dc66fe7114a4f44bf8098e3f7ae7a Author: Chris Wilson Date: Mon May 5 13:03:14 2014 +0100 intel-virtual-output: Check for errors whilst creating ShmPixmaps Creating a ShmPixmap may cause an asynchronous BadAccess error, so wrap the construction with XSync and check for an error before proceeding. Signed-off-by: Chris Wilson References: https://bugs.freedesktop.org/show_bug.cgi?id=78293 commit 45892b3a63613af67e249e9ad006f2b2002570c0 Author: Chris Wilson Date: Mon May 5 12:41:06 2014 +0100 intel-virtual-output: Record shm/randr/xinerama queries in DBG log Signed-off-by: Chris Wilson commit 6c9f216d7ce7c329b1008cb09c9de55396e0e6b1 Author: Chris Wilson Date: Mon May 5 12:38:51 2014 +0100 intel-virtual-output: Check error state when disabling CRTC Only mark an output as disabled if we do successfully disable it. This will require a little more work to make sure that such errors are cleanly propagated back to the host... Signed-off-by: Chris Wilson commit ef178f7d6955e12383c64ad9ee706db0e931992e Author: Chris Wilson Date: Mon May 5 09:37:56 2014 +0100 sna: Fix loop iteration whilst deleting connectors If we remove a connector/output, we need to not advance the iterator or else we skip over an output (as the array is reduces inside the loop). Signed-off-by: Chris Wilson commit 8fd13a52072c2f8f12f934deaba1ef9ddb16d5f9 Author: Chris Wilson Date: Mon May 5 09:32:59 2014 +0100 sna: Reorder connector initialisation to avoid leak If the output was ignored, we would leak the allocations. However, we can check the output name after the first GETCONNECTOR/GETENCODER request before any allocations. Signed-off-by: Chris Wilson commit 55f567f9d8dd1bbc21acf30f02d394e54ddc8157 Author: Chris Wilson Date: Sun May 4 12:13:25 2014 +0100 sna/dri: Report the last known MSC whilst the pipe is off From OML_sync_control: "The graphics MSC value is incremented once for each screen refresh. For a non-interlaced display, this means that the graphics MSC value is incremented for each frame." When the pipe is disabled, return the last known MSC such that the reported value is always monotonic and consistent with the pipe when it is active again. That also is consistent with OML_sync_control which says that the MSC is a vertical refresh counter, and by implication does not increase whilst the pipe is off. Signed-off-by: Chris Wilson commit 080e9f99857081bca063c67afb7c98854d1f61f4 Author: Chris Wilson Date: Sun May 4 11:59:40 2014 +0100 sna: Prefer PrimaryOutput for timing signals If the drawable is even partially on the PrimaryOutput, use that pipe for determining synchronisation counters and synchronised updates. OML_sync_control: "For a multi-monitor system, the monitor used to determine MSC is screen 0 of ." The PrimaryOutput is the nearest approximation we have to "screen 0". We also deviate in handling what hapens when that screen is off, which is not mentioned at all in OML_sync_control. Signed-off-by: Chris Wilson commit 828bd9e250b7d9dd1dc4185c0179237e9b21d8bf Author: Chris Wilson Date: Fri May 2 17:13:29 2014 +0100 sna: Reorder cursor initialisation It helps to initialise the cursors after we setup one of the values we depend on. Signed-off-by: Chris Wilson commit 38f82655e0bc8f26250f56e9a25aedd30b46360c Author: Chris Wilson Date: Fri May 2 12:30:43 2014 +0100 sna: Remove incorrect cursor assertion Ideally, we want to assert that we have sufficient stashed cursors to allocate for the unused CRTCS, so something like assert(num_stash + num_active_cursors >= 0); Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 430152da82f496ac47f33ce1eca65d154af38752 Author: Chris Wilson Date: Fri May 2 16:57:27 2014 +0100 compat: Add missing wrapper for RegionSubtract Signed-off-by: Chris Wilson commit add84cd8a8dc6d285912d0ea3a3a3e7faa9e0942 Author: Chris Wilson Date: Fri May 2 13:21:02 2014 +0100 sna: Perform dynamic connector discovery One of the side-effects of MST is that we need to support dynamic attachment and removal of displays as the branch hierachy changes. Signed-off-by: Chris Wilson commit 3123dec3dfc55fbca32d32eaaa8ac29396b28c49 Author: Chris Wilson Date: Fri May 2 10:40:47 2014 +0100 sna: Do not stash drmModeResPtr In the near future we will be dealing with dynamic discovery of connectors, and so we cannot assume that the mode resources will be static for our lifetime. The first step is to not keep that struct around, but pull out the useful information and discard it. Signed-off-by: Chris Wilson commit 7b072074aa2b08c09a3d920d67f38ae73009ced6 Author: Chris Wilson Date: Fri May 2 08:27:07 2014 +0100 sna: Refactor hints for GPU promotion of composite fills The major change here is not do a full promotion if we are filling through a clip region. The original intention was to catch doing the initial clear of the background, but it was also triggering for drawing rectangular outlines etc. Signed-off-by: Chris Wilson commit 81608b4da5b35993cd2071098235c14920b7236d Author: Chris Wilson Date: Thu May 1 13:15:11 2014 +0100 sna: Do not discard damage when using the CPU to perform BLT spans The BLT paths are only taken when we know we are overwriting the target contents, and so we do not have to worry about reads along those paths. However, in terms of migrating the damage for a pixmap, we have to be careful in case we do not write to the full area of the composite rectangle, in which case we have to treat it as a read to that area and migrate the damage. Regression from commit a13781d19defc97af6a279c11a85e33ef825020e [2.20.10] Author: Chris Wilson Date: Sun Aug 19 09:45:12 2012 +0100 sna: Enable BLT composite functions to target CPU buffers Signed-off-by: Chris Wilson Reported-by: Matti Hämäläinen Signed-off-by: Chris Wilson commit 150458c402f2a93e87924dacd3d0e99def512b85 Author: Chris Wilson Date: Thu May 1 09:42:07 2014 +0100 sna: Refactor migration DBG code And add a new DBG option to disable partial-cpu migrations. Signed-off-by: Chris Wilson commit ca57ee723497b07396646e567fd87dfce8d779fa Author: Chris Wilson Date: Thu May 1 09:15:28 2014 +0100 sna: Add some DBG for tracing vblanks across modeset/resume Signed-off-by: Chris Wilson commit bcbb2f222c39ab8732bf1daa248c77ce22cc173e Author: Chris Wilson Date: Wed Apr 30 14:43:01 2014 +0100 sna/dri: Tidy call to vblank ioctl for MSC waiting Signed-off-by: Chris Wilson commit 4430703619dc6012407ab703f211dc1181ba6ec8 Author: Chris Wilson Date: Wed Apr 30 11:10:49 2014 +0100 sna: Be more lenient and allow tiled uploads to replace CPU buffers Signed-off-by: Chris Wilson commit 2fd1a05ac50ac4ba7cf09225f9133a8141aef302 Author: Chris Wilson Date: Tue Apr 29 13:51:33 2014 +0100 sna/video: Initialise pitch before query Signed-off-by: Chris Wilson commit 41a573c15ca1a1e775a2060be117374a5bc6f9b9 Author: Chris Wilson Date: Tue Apr 29 13:30:14 2014 +0100 sna: Discard TearFree damage on partial migration If we are overwriting part of the framebuffer, we know we do not need to read that portion back from the scanout. Signed-off-by: Chris Wilson commit d75501572a4ea95fc126314718468345630723a1 Author: Chris Wilson Date: Tue Apr 29 13:29:45 2014 +0100 sna: Preserve cpu hint for compatible mmapping of the GPU bo Signed-off-by: Chris Wilson commit 94e39323772ef6561efcc0620f67cabd2462a0d0 Author: Chris Wilson Date: Tue Apr 29 09:02:50 2014 +0100 sna: Recycle physical cursors A side-effect of the workaround for incoherent physical cursors is that we never reused a cursor after disabling. As such moving the cursor off the pipe and back on would eventually consume all the preallocated structs leading to a segfault. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78002 Signed-off-by: Chris Wilson commit 0b23011c27736d0ae2b33d8ea147c16b909baa57 Author: Chris Wilson Date: Mon Apr 28 15:59:18 2014 +0100 sna: Tweaks to cursor DBG logging Signed-off-by: Chris Wilson commit d4bd452caa335a54076fa003ee616c2efe93bca3 Author: Chris Wilson Date: Mon Apr 28 14:01:43 2014 +0100 sna: Assert against underflows in BLT command lengths Signed-off-by: Chris Wilson commit 2a993c8aa9e8594c32d5e67329b0dbed0d92c761 Author: Chris Wilson Date: Mon Apr 28 12:53:00 2014 +0100 sna: Initialise pointer before use commit 534a0e6433a37c95f7181f7ce9046a4e7c82532d Author: Chris Wilson Date: Mon Apr 28 07:53:13 2014 +0100 sna: Factor in destination sizes for choosing intermediate tiling bo size assumed that the target bo was being initialisation for the tiling composite; it was not. Signed-off-by: Chris Wilson commit f0042850494ac16149ba310c910ca08f86c191fa Author: Chris Wilson Date: Mon Apr 28 08:37:11 2014 +0100 sna: Rearrange final aperture check If we cross the high water mark, first flush the batch, then check the remaining pages to see if they fit into the aperture. Reported-by: Bruno Prémont Signed-off-by: Chris Wilson commit 7a685d1d7b63a1589ba0fd09168d4f95d18fcae5 Author: Chris Wilson Date: Mon Apr 28 08:31:59 2014 +0100 sna: Add a minor DBG for tiled copies Signed-off-by: Chris Wilson commit 3e330f3980b7bacad30b25ff144e4162acc854bb Author: Chris Wilson Date: Mon Apr 28 08:15:35 2014 +0100 sna: Refine fence packing estimates Signed-off-by: Chris Wilson commit 534a0e6433a37c95f7181f7ce9046a4e7c82532d Author: Chris Wilson Date: Mon Apr 28 07:53:13 2014 +0100 sna: Factor in destination sizes for choosing intermediate tiling bo size When tiling, factor in the destination usage of the aperture in case that reduces the available aperture for the intermediate bo. Signed-off-by: Chris Wilson commit 11cc397cb1cded40f7ab43c1add3fd00b97c6bdc Author: Chris Wilson Date: Sun Apr 27 07:55:09 2014 +0100 sna: Preallocate cursors We need to avoid all allocations within the signal handlers, so preallocate the cursor structs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77975 Signed-off-by: Chris Wilson commit 9417f13cc4074ea6e5dad88e054337e93b461a4c Author: Chris Wilson Date: Sun Apr 27 07:55:09 2014 +0100 sna: Preallocate pwrite scratch buffer for old fashioned cursor updates We need to avoid all allocations within the signal handlers, so preallocate the transfer buffer. References: https://bugs.freedesktop.org/show_bug.cgi?id=77975 Signed-off-by: Chris Wilson commit 795cebf053e8457b998522ab7eea80b0819cb46b Author: Chris Wilson Date: Sun Apr 27 07:52:14 2014 +0100 sna: Replace cursor gen test with feature flag Signed-off-by: Chris Wilson commit 1b76a1f6fb046353b1e2f553dfcb03978807272d Author: Chris Wilson Date: Sun Apr 27 08:32:17 2014 +0100 sna: Initialise cursors after checking for KMS Signed-off-by: Chris Wilson commit b3c5a524965958b5b11a1195e773d10ac9fc6611 Author: Chris Wilson Date: Wed Apr 23 14:23:55 2014 +0100 sna: Tweak use inplace CPU maps for writing Allow us to write into a GPU bo without any pending CPU damage. Signed-off-by: Chris Wilson commit c872be6cbef3b07dc79fc8f83d719543c0adcdee Author: Chris Wilson Date: Wed Apr 23 14:23:55 2014 +0100 sna: INPLACE has early exits in move-to-cpu We can update the priv->cpu flag more accurately by accounting for the early exits for the INPLACE accessors. Signed-off-by: Chris Wilson commit 05cf93287419992208493f5098fc7b089e95b20c Author: Chris Wilson Date: Wed Apr 23 14:21:39 2014 +0100 sna: Be more selective of reusing bo for inplace uploads on !LLC On older architectures, we can only do the inplace upload into a GPU bo into a new unused bo (that is still in the GPU domain). Signed-off-by: Chris Wilson commit cf7efedb32b63901f7e42a90f756899b9ba60e65 Author: Chris Wilson Date: Wed Apr 23 14:20:47 2014 +0100 sna: Tweak untiled limits Allow more small pixmaps to use untiled for linear mmappings. Signed-off-by: Chris Wilson commit 5fbbfd4dd35c5e5381897b7e5d4c16c1f182ef2b Author: Chris Wilson Date: Wed Apr 23 11:34:06 2014 +0100 sna/video: Show sprites across all outputs If an overlay video (using the sprite interface) is visible on multiple outputs, we have to create and show a sprite for each. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77802 Signed-off-by: Chris Wilson commit 3508f809c40bc59d67deb7182807664bc0648639 Author: Chris Wilson Date: Wed Apr 23 11:46:12 2014 +0100 sna: Fix assertions for mmapping stolen buffers Signed-off-by: Chris Wilson commit aec3cbb1aba8bae5537534754ea57d21896d591b Author: Chris Wilson Date: Wed Apr 23 09:17:22 2014 +0100 sna: Reuse any output not explicitly disconnected References: https://bugs.freedesktop.org/show_bug.cgi?id=77768 Signed-off-by: Chris Wilson commit 4ed733d16a6ce35b1426bddd993a360f0a7387a8 Author: Chris Wilson Date: Wed Apr 23 09:17:01 2014 +0100 sna: Improve DBG messages for rejecting outputs during initial config Signed-off-by: Chris Wilson commit bb5b21e34f6cbe44a249e566471754b45c500e60 Author: Chris Wilson Date: Tue Apr 22 21:22:37 2014 +0100 sna: Apply defense against a rogue call to move a SW cursor So the sna_set_cursor_postion() assertion was reported to have caught us trying to adjust the position of an absent cursor. That should be impossible as we should only arrive there if we claim we can support a HW cursor and so have a registered cursor. However, changing the assertion into a guard is trivial, and preserves peace of mind. Signed-off-by: Chris Wilson commit b12bc035fb8ee40bb382e66604e869b729270189 Author: Chris Wilson Date: Tue Apr 22 12:30:29 2014 +0100 sna: Add a DBG aide to disable hardware execution Submit a dummy batch so that we still build, submit batches and perform relocations, but do not actually invoke the GPU. This can be useful when looking at mysterious hardware hangs. References: https://bugs.freedesktop.org/show_bug.cgi?id=77263 Signed-off-by: Chris Wilson commit f6bc0e390bcba97f7aacab4d87251867ca309c17 Author: Chris Wilson Date: Tue Apr 22 09:41:21 2014 +0100 sna: Use a global pixman glyph cache In Zaphod mode, we use a common pool of glyph images but insert them individually into a cache for each head. However, we only remove the image from the first cache, leaving a stale slot in the second head. Upon subsequent reuse of the glyph id, the second head renders garbage. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54707 Signed-off-by: Chris Wilson commit b259cbffcfb41a20c8b0cf1c32f6ff3e9872a472 Author: Chris Wilson Date: Sun Apr 20 16:39:37 2014 +0100 sna: Avoid copying from tiled source for an overwritten fill Signed-off-by: Chris Wilson commit 935ec0abcb3b92b1aad00885be59644bf775f5dd Author: Chris Wilson Date: Mon Apr 21 08:20:39 2014 +0100 uxa: Remove misnomer from ATI logs Signed-off-by: Chris Wilson commit 08e71e1820d6fcb6829b4ebd360beadc1f250295 Author: Chris Wilson Date: Sat Apr 19 16:27:49 2014 +0100 sna: Initialise thread->arg If we launch less than the maximum number of threads, we may read the thread->arg value never having set it after a malloc. ==8207== Conditional jump or move depends on uninitialised value(s) ==8207== at 0xA986B7F: sna_threads_wait (sna_threads.c:216) ==8207== by 0xA986EFE: sna_image_composite (sna_threads.c:350) ==8207== by 0xA93DD0D: sna_composite_fb (sna_composite.c:598) ==8207== by 0xA93E66C: sna_composite (sna_composite.c:742) ==8207== by 0x23A773: damageComposite (damage.c:503) ==8207== by 0x2309A9: ProcRenderComposite (render.c:708) ==8207== by 0x15D86D: Dispatch (dispatch.c:433) ==8207== by 0x161689: dix_main (main.c:294) ==8207== by 0x6FB1B44: (below main) (libc-start.c:287) Signed-off-by: Chris Wilson commit 58a757b64927d8e27c4ac38cc15f8291037ec905 Author: Chris Wilson Date: Fri Apr 18 09:28:02 2014 +0100 sna: Do not reuse physical cursors for the kernel is broken, harder commit 154f7e9668bffdf565b6914a3a3e5bdfe17aa1b9 Author: Chris Wilson Date: Fri Apr 18 09:28:02 2014 +0100 sna: Do not reuse physical cursors for the kernel is broken was insufficient as it ended up reusing a stale cursor that was still attached, and so after updating the cursor the second pipe found itself with a valid cursor. Hey presto, we had a shared physical cursor, once again demonstrating the buggy kernel. This time, disable all cursor reuse except for the once currently attached to the pipe - this should prevent all sharing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77351 Signed-off-by: Chris Wilson commit fb0ed43cbc6f34bde670ab846e7ba9e7dbf9b660 Author: Chris Wilson Date: Fri Apr 18 20:55:49 2014 +0100 sna: Refine detection of when shadow is active during BlockHandler Signed-off-by: Chris Wilson commit 2d9ae02c647f93be58d3f77168752774868008f5 Author: Chris Wilson Date: Fri Apr 18 11:43:45 2014 +0100 sna/video: Provide a fallback path for pwrite failure Stranger things have happened. Signed-off-by: Chris Wilson commit fdc28205d590d560a6f3886189ef974d1d00f2cd Author: Chris Wilson Date: Fri Apr 18 11:34:07 2014 +0100 sna: Always flush the shadow scanout When the shadow scanout is active, make sure we call the BlockHandler every time, not just when we about to sleep. This is in case we are swamped by clients trying to render and forgo the important step of ensuring that their output reaches the screen. Reported-by: Ildar Nurislamov Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77436 Signed-off-by: Chris Wilson commit 924237efbddb167efc7f9f3bde42b32ffc538ee3 Author: Chris Wilson Date: Fri Apr 18 11:33:42 2014 +0100 sna: Fix some DBG formats Signed-off-by: Chris Wilson commit fa56f1062b926b15e554f46eb268a69b43dd8b9f Author: Chris Wilson Date: Fri Apr 18 09:52:26 2014 +0100 sna/video: Only try to set the color key once So that we only report the error to the user a single time, and not every frame. Signed-off-by: Chris Wilson commit 154f7e9668bffdf565b6914a3a3e5bdfe17aa1b9 Author: Chris Wilson Date: Fri Apr 18 09:28:02 2014 +0100 sna: Do not reuse physical cursors for the kernel is broken Big bug in the kernel that prevents the sharing of cursors across pipes when they are backed by a phys_obj. To prevent hitting that bug, don't do that! Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77351 Signed-off-by: Chris Wilson commit 83f49767f8ed9dd49c40ebc65ed22c288a386edd Author: Chris Wilson Date: Tue Apr 15 16:27:44 2014 +0100 sna: Pre-emptively bind framebuffers into the GTT In order to avoid rendering to the bo and then stalling before we can pin it the display plane, bind the framebuffer into the GTT (by using a GTT mmap) during the initial allocation. References: https://bugs.freedesktop.org/show_bug.cgi?id=77436 Signed-off-by: Chris Wilson commit fd0579016be9e0385c0cdd07a9f9e17f93b93a4f Author: Chris Wilson Date: Tue Apr 15 16:27:44 2014 +0100 sna: Pre-emptively move framebuffers into the DISPLAY cache domain In order to avoid rendering to the bo and then stalling before we can pin it the display plane, allocate bo for fb from uncached and change the cache level during the initial allocation. References: https://bugs.freedesktop.org/show_bug.cgi?id=77436 Signed-off-by: Chris Wilson commit b0472af1f3c6832838b0cfea38e261c908afd04e Author: Chris Wilson Date: Tue Apr 15 16:31:08 2014 +0100 sna: Mark partial composite operations upfront Rather than guess in the backend when we are going to be called for multiple boxes, rely on the frontend declaring it correctly. Signed-off-by: Chris Wilson commit 49e72bd4e59085aa940e5af63381c5394ee670ad Author: Chris Wilson Date: Tue Apr 15 11:24:10 2014 +0100 sna: Discard TearFree readback when overdrawing References: https://bugs.freedesktop.org/show_bug.cgi?id=77436 Signed-off-by: Chris Wilson commit 13054a00dadedae6495eb5cdf586b7916b82053e Author: Chris Wilson Date: Tue Apr 15 10:28:32 2014 +0100 sna: Fix up cut'n'paste typo in assertion sna_display.c:3176:43: error: 'struct ' has no member named 'rotation' assert(cursor->rotation != sna->cursor.rotation); Reported-by: Ildar Nurislamov Signed-off-by: Chris Wilson commit 1ed8647aef012d30c602f86fc6f97a0a92d7710f Author: Chris Wilson Date: Tue Apr 15 06:55:26 2014 +0100 sna: Add a cursor DBG for a failed pwrite update Signed-off-by: Chris Wilson commit cb35b397395cff8ff7f5155759f58c1840bfeeb5 Author: Chris Wilson Date: Mon Apr 14 17:12:37 2014 +0100 sna: Rearrange cursor reuse to avoid sharing rotations Try not to steal a rotated cursor that is currently in use, or else we may see a brief flash of corruption. Signed-off-by: Chris Wilson commit fd700c37ee2a68262b1ccfff332dd41ba8599e2c Author: Chris Wilson Date: Mon Apr 14 16:48:05 2014 +0100 sna: Add some bounds checking asserts to damage References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1300640 Signed-off-by: Chris Wilson commit 9ae82134ad14085e80d93592e155978a5056f44a Author: Chris Wilson Date: Fri Apr 11 18:36:16 2014 +0100 sna: Restrict WHOLE hint to PutImage on a complete Pixmap Signed-off-by: Chris Wilson commit 6883f5a64498880425d47871323642409282d9ab Author: Chris Wilson Date: Fri Apr 11 08:02:49 2014 +0100 sna: Perform 2-color to ARGB cursor conversion inplace Signed-off-by: Chris Wilson commit 2eddc60a5fe1fabefcad93783d58354570132af3 Author: Chris Wilson Date: Fri Apr 11 07:52:30 2014 +0100 sna: Don't redraw cursor if the fg/bg colors do not change Signed-off-by: Chris Wilson commit a79eb2e29a158910785580409c51a585f25876a7 Author: Chris Wilson Date: Thu Apr 10 20:41:57 2014 +0100 sna/gen2: Fix CA/a8 blend factors This is a revert of commit 142f8461944b294dbc3fb0a7bf607bccf0bccc1f [2.99.911] Author: Chris Wilson Date: Mon Mar 10 15:20:16 2014 +0000 sna/gen2: Tidy blend factor selection for the source as that broke glyph rendering in firefox for instance. Reported-by: Carl Eitsger <4607vrfcr84spd21f08@weg-werf-email.de> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77201 Signed-off-by: Chris Wilson commit 25fa4f5bb4c9ed12755edfeec38b9bdc134736f1 Author: Chris Wilson Date: Thu Apr 10 23:14:32 2014 +0100 sna: Don't set cursor bits to an invalid pointer The xf86Cursor core simply frees it, so it has to be NULL. Signed-off-by: Chris Wilson commit 7b2753f9cc6a1a7ca353f57d78bdf3d52f32864b Author: Chris Wilson Date: Thu Apr 10 23:11:18 2014 +0100 sna: Only mark the transform_in_use when required for shadow fb Signed-off-by: Chris Wilson commit 4950bc4fea80d44dde798f3f8b5a07eee1555a63 Author: Chris Wilson Date: Thu Apr 10 22:26:42 2014 +0100 sna: Only reload an active HW cursor Do not attempt to restore the cursor handle if a SW cursor is currently active. In particular, this prevents a crash after modesetting if we never had a real cursor (for example output offloading). Reported-by: Tomas Pruzina Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77283 Signed-off-by: Chris Wilson commit 8e6e7dbc9257a223ab284198e92f263a1a8b5553 Author: Chris Wilson Date: Thu Apr 10 21:44:35 2014 +0100 sna: Don't create slave pixmaps for the virtual CRTC They only exist as placeholders for remote outputs in the framebuffer and do not need to take part in actually output offloading, so we can forgo creating slave pixmaps and remove the stub function entirely. Signed-off-by: Chris Wilson commit f94684db1a694820ff508d8aec77bf19cea86fbd Author: Chris Wilson Date: Thu Apr 10 16:08:48 2014 +0100 sna: Validate the cursor everytime for hw support Signed-off-by: Chris Wilson commit d364a881effb2fd87f11648b10d126eb18fcb6be Author: Chris Wilson Date: Thu Apr 10 09:12:02 2014 +0100 configure: Report which version (lib or module) of glamor is used Signed-off-by: Chris Wilson commit b771b41f0a945fc580d532524cc744b01dd36d5f Author: Eric Anholt Date: Wed Apr 9 15:24:23 2014 -0700 uxa: Fix load_cursor_argb for the new Xorg ABI. Returning an undefined value meant we might get sw cursors. commit d812afc1d4476ba987883fad2ef8b7c002638077 Author: Eric Anholt Date: Wed Apr 9 15:24:22 2014 -0700 Use fbpict.h instead of defining its prototypes ourselves. fbpict.h has been an installed header since 2008, shortly after uxa landed. This fixes compiler warnings when other headers happen to include fbpict.h. commit a6919aa980883cf2828dc0cf813f315e3035d0cf Author: Eric Anholt Date: Wed Apr 9 15:24:21 2014 -0700 Update for glamor in the 1.16 server. We should link against the server's copy, insted of using the external library. commit be7c166a017cee3ef8a1b7b290b7fb14b4009314 Author: Chris Wilson Date: Thu Apr 10 08:22:02 2014 +0100 sna: Remove defunct Cursor interface on fake CRTC As we no longer user the xf86Cursor helper, we can forgo filling in stub routines for the fake CRTC. Signed-off-by: Chris Wilson commit 1d2872dd0830c8858621402328aa1a9322b66ea8 Author: Chris Wilson Date: Thu Apr 10 07:35:50 2014 +0100 sna: Prepare for an upcoming Cursor API change 1.16 now expects load-cursor-argb to return a boolean reporting success/failure. Signed-off-by: Chris Wilson commit f9a279b2dc8417b6504478ac96514125d6136523 Author: Chris Wilson Date: Wed Apr 9 22:15:19 2014 +0100 intel-virtual-output: Fix damage bounds Sigh. A serious mixup of integer promotion rules and wraparound caused the damage computation for small regions to be completely bogus. Signed-off-by: Chris Wilson commit e0c93a3e53a624beb5d3a15631237ac33b8c92cd Author: Chris Wilson Date: Wed Apr 9 18:51:23 2014 +0100 intel: If a non-root user starts X, don't release master SET_MASTER and DROP_MASTER are only available to the root user. If we are started as an ordinary user, and we are master by virtue of being the first user of the device, never release our fd or master. Signed-off-by: Chris Wilson commit dba43d370b984e262f6fe5920b38b433f4bd392b Author: Chris Wilson Date: Wed Apr 9 16:11:26 2014 +0100 sna: Use pwrite to update physical cursors Older hardware uses physical addresses for its cursor, which are implemented by the kernel in an incoherent fashion. Maybe with stolen support this would be different... Fixes regression on [845g, 945g] from commit 25ca8f136cef9e1bdf06967bf8e78c87b54ffce2 Author: Chris Wilson Date: Thu Mar 27 14:15:30 2014 +0000 sna: Support variable sized cursors Reported-by: Knut Petersen Signed-off-by: Chris Wilson commit f14d6cbff3b9766f5fa834282a4eca6636b6fd7d Author: Chris Wilson Date: Wed Apr 9 13:14:37 2014 +0100 sna: Handle clipped PutImage uploads more carefully If the upload is clipped, we do not want to apply the WHOLE migration hints. References: https://bugs.freedesktop.org/show_bug.cgi?id=77178 Signed-off-by: Chris Wilson commit 510e5cf3fa4e1db8297be62461b602b13d18d8fc Author: Chris Wilson Date: Wed Apr 9 12:26:53 2014 +0100 sna: Tweak application of WHOLE hint for uploads This help with the continuing saga of commit 1de1104064b5898cbed37e836901694a381c1266 [2.99.911] Author: Chris Wilson Date: Fri Feb 21 22:43:04 2014 +0000 sna: Use a hint to do whole image uploads inplace References: https://bugs.freedesktop.org/show_bug.cgi?id=77178 Signed-off-by: Chris Wilson commit f05552cd7a43ea46ac1a37b68b05be2a82abaeb1 Author: Chris Wilson Date: Wed Apr 9 11:54:49 2014 +0100 sna: Add some DBG for whole CPU pixmap migration Signed-off-by: Chris Wilson commit cf4eb827861bf70d4d45a2ffe062d4c05a1564a6 Author: Chris Wilson Date: Wed Apr 9 10:22:49 2014 +0100 sna: Restore empty region checking commit 8ef81d676c52e42a6d9048fd92b2843470b62945 Author: Chris Wilson Date: Mon Apr 7 07:59:42 2014 +0100 sna: Simplify checking for singular damage overlooked that we were also checking for empty regions as well as singular regions. Signed-off-by: Chris Wilson commit 9f40d7e91281b74df43f49885472ee352ea4b389 Author: Chris Wilson Date: Tue Apr 8 18:28:46 2014 +0100 sna: Fix build for older Xorg without OsBlockSIGIO support OsBlockSIGIO/OsReleaseSIGIO was only introduced in xorg-server-1.13.0, so we need a compat layer. Signed-off-by: Chris Wilson commit 5db8717b8d9f089412b9a7529725c9c41e3e44fb Author: Chris Wilson Date: Tue Apr 8 18:00:47 2014 +0100 sna: Refactor 3 similar CPU migration promotion checks into one References: https://bugs.freedesktop.org/show_bug.cgi?id=77178 Signed-off-by: Chris Wilson commit 617e96f3af861dd797f98d5a74978f9ba595a981 Author: Chris Wilson Date: Tue Apr 8 08:47:05 2014 +0100 sna: Add more assertions before dereferencing sna_crtc Signed-off-by: Chris Wilson commit e6b03269d01e61527641639c6fb7b796205e6ed8 Author: Chris Wilson Date: Tue Apr 8 08:44:56 2014 +0100 sna: Continue to reprobe for ZaphodHeads with a mixed up configuration Fixes regresion from commit 35b03b3fe6213eb3e08f05efe3428bd6bc5421d2 Author: Chris Wilson Date: Fri Mar 28 09:14:59 2014 +0000 sna: Virtual CRTCs are last, so break loops early as the conflicting Zaphod detection requires on searching all potential CRTCs without finding the match. By breaking early on the virtual CRTC, we concluded that the setup was actually valid, but disabled. Reported-by: Nick Bowler Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77156 Signed-off-by: Chris Wilson commit bf1875139817c5b00d63a743e262c8f3552058ab Author: Chris Wilson Date: Mon Apr 7 08:28:55 2014 +0100 intel-virtual-output: Fixup DBG messages Use the right variables and it may even compile. Signed-off-by: Chris Wilson commit 8ef81d676c52e42a6d9048fd92b2843470b62945 Author: Chris Wilson Date: Mon Apr 7 07:59:42 2014 +0100 sna: Simplify checking for singular damage Signed-off-by: Chris Wilson commit f5014b3fddf6c79f5ca01a91eec5ca92184c8829 Author: Chris Wilson Date: Mon Apr 7 07:59:01 2014 +0100 sna: Avoid double application of pixel widening for degenerate lines References: https://bugs.freedesktop.org/show_bug.cgi?id=77074 Signed-off-by: Chris Wilson commit 3310ee89c1f1a663de5f5b12b8125809a213996f Author: Chris Wilson Date: Sat Apr 5 12:18:31 2014 +0100 sna: Avoid discarding damage when applying WHOLE hint to pixmap migration Once again, we must be careful when promoting from a region to whole pixmap migration that we do not discard required damage. Fixes regression from commit 27ac9f574f65cbd535751c925e9b2e2d7c8a6b3a [2.99.911] Author: Chris Wilson Date: Thu Feb 27 08:33:52 2014 +0000 sna: Avoid promoting region-to-whole migration and discarding damage Reported-by: gedgon@gmail.com Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77063 Signed-off-by: Chris Wilson commit 7e9ff48ddbe61ad2edbaefde7b94c84637a85291 Author: Chris Wilson Date: Sat Apr 5 10:44:48 2014 +0100 sna/gen8: Shrink 3DSTATE_SAMPLE_PATTERN packet This is now smaller than originally specified. Signed-off-by: Chris Wilson commit 878ed2d6250701e9ccceacb102b5542986976437 Author: Chris Wilson Date: Sat Apr 5 10:43:25 2014 +0100 sna/gen8: w/a for NULL depth buffer Instead of using a NULL type depth buffer, it is strongly suggested to use a 1x1 16-bit depth buffer instead (with address 0). Signed-off-by: Chris Wilson commit 02862faeae21bd445d61006c9aeb966fbe6a7670 Author: Chris Wilson Date: Fri Apr 4 16:03:08 2014 +0100 sna: Remove unitialized use of 'cursor' The earlier query of cursor (simply to find out the hw size) was replaced by an invariant determined when the cursor was first set. However, not all uses of cursor->size were fixed. Fixes regression from commit f98b2e164637292c2425f6e6d2c22bd9a2800f8e Author: Chris Wilson Date: Wed Apr 2 08:36:14 2014 +0100 sna: Prevent signal re-entrancy into cursor update routines Reported-by: Christoph Haag Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77053 Signed-off-by: Chris Wilson commit 938eea6dee0be153fcf007549a50213f6c957305 Author: Chris Wilson Date: Fri Apr 4 15:56:38 2014 +0100 sna/gen2+: Beware the unattached ShmPixmap When dereferences priv, make sure it exists first. ShmPixmaps for example, may not have one, nor do very small buffers. Signed-off-by: Chris Wilson commit 564e4a9878503c880e0cbd09d88b4c246a0267b6 Author: Chris Wilson Date: Fri Apr 4 14:04:38 2014 +0100 sna/gen7: Move constants MOCS into chipset specific info blocks Signed-off-by: Chris Wilson commit 6e86e84da1c8049a150eb6b5780526fea57e0f9d Author: Chris Wilson Date: Fri Apr 4 12:41:25 2014 +0100 sna: Precompute OVER/ADD with solids to convert it into a BLT operation Signed-off-by: Chris Wilson commit 31a4c7bc13c5f4560482b450b9ee4788a58930cd Author: Chris Wilson Date: Fri Apr 4 10:46:48 2014 +0100 sna/gen2+: Replace composite sources with solids where possible If the composite reads entirely from within a large pixmap which is a clear color, just replace the source with a solid. Signed-off-by: Chris Wilson commit f0565852b668832d4988e875bc12e23abb6e1829 Author: Chris Wilson Date: Thu Apr 3 16:27:47 2014 +0100 sna: Short-circuit repeated clearing to the same color Spotted in amongst a KDE debug log was a series of clear; copy; repeat using Composite(). Signed-off-by: Chris Wilson commit baef2201f752da5d0c6322547d925fcbd86c6de4 Author: Chris Wilson Date: Wed Apr 2 11:37:17 2014 +0100 sna: Silence compiler warning Simplify the dependency logic so that even the compiler can understand what is going on. Signed-off-by: Chris Wilson commit f98b2e164637292c2425f6e6d2c22bd9a2800f8e Author: Chris Wilson Date: Wed Apr 2 08:36:14 2014 +0100 sna: Prevent signal re-entrancy into cursor update routines As we may need to allocate from within the cursor update, we are prone to re-entrancy issues within malloc()/free(). To avoid these we need to block SigIO (for pointer updates) whilst in the critical section. Signed-off-by: Chris Wilson commit a926d9f68231ac0f2a1f54c7a722979a8ed6e9e1 Author: Chris Wilson Date: Mon Mar 31 14:07:41 2014 +0100 sna: Update tiling flags after reusing inactive VMA Signed-off-by: Chris Wilson commit 644c274b2cd398c8236d36423677317cbc82308a Author: Chris Wilson Date: Mon Mar 31 14:03:49 2014 +0100 sna: Fix predicate inversion for assertion The assertion was checking that the invalid condition was true, rather than that it never happened. Oops. Signed-off-by: Chris Wilson commit 4b97bf7e6e9e315cc77d940e3be97832a326e702 Author: Chris Wilson Date: Mon Mar 31 13:32:45 2014 +0100 sna: Use a cheaper check for a replacement operation Signed-off-by: Chris Wilson commit 76380bcc3c23d75575d37c0436369a8014bd5a3e Author: Chris Wilson Date: Mon Mar 31 12:46:58 2014 +0100 sna: Allow reassignment of inactive VMA if not mapped into the GTT Signed-off-by: Chris Wilson commit c4c8a1b180a9d4c1126ee4fe3120128aa560306c Author: Chris Wilson Date: Mon Mar 31 11:23:45 2014 +0100 sna: Discard damage tracking for operations to the whole pixmap Signed-off-by: Chris Wilson commit 8f796d4586507a0a6e9ca3608f43448983a3b965 Author: Chris Wilson Date: Mon Mar 31 11:14:46 2014 +0100 sna: Promote to the GPU operations that cover the whole pixmap If the pixmap is already partially on the GPU, and the next operation touches the entire pixmap, promote that operation back to the whole GPU. Signed-off-by: Chris Wilson commit 27c086a89d838fe0060e5ddd0fb2f37434078e4d Author: Chris Wilson Date: Mon Mar 31 10:01:38 2014 +0100 sna: Regularly check that damage does exceed the pixmap Signed-off-by: Chris Wilson commit a8a5a5a58786445d393c3d6388904c0975c364a6 Author: Chris Wilson Date: Mon Mar 31 09:36:05 2014 +0100 sna: Search cursor cache first We can reuse the current cursor size rather than determine it every time. Signed-off-by: Chris Wilson commit e892b789c4c6359e4fb2e11f552b3e43a466c49e Author: Chris Wilson Date: Fri Mar 28 11:34:03 2014 +0000 sna: Suppress a compiler warning sna_display.c: In function '__sna_get_cursor': sna_display.c:3153:6: warning: assignment from incompatible pointer type [enabled by default] src = sna->cursor.ref->bits->argb; ^ sna_display.c:3209:10: warning: comparison of distinct pointer types lacks a cast [enabled by default] if (src != sna->cursor.ref->bits->argb) Signed-off-by: Chris Wilson commit 5c0623b5f36cd1a1a2e3280ab2bea35a7899281b Author: Chris Wilson Date: Fri Mar 28 09:53:49 2014 +0000 sna: Only transform the temporary cursor coordinates As we need to recompute them for each CRTC, we need to reset the computation each time or else we screw up the coordinates and hide the cursors at random. Breakage from commit 25ca8f136cef9e1bdf06967bf8e78c87b54ffce2 Author: Chris Wilson Date: Thu Mar 27 14:15:30 2014 +0000 sna: Support variable sized cursors Reported-by: Jan Alexander Steffens Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76724 Signed-off-by: Chris Wilson commit 80792a3f490578735065d9f67ca6ebac00b5bb75 Author: Chris Wilson Date: Fri Mar 28 09:43:34 2014 +0000 sna: Our cursors are always square. Signed-off-by: Chris Wilson commit 35b03b3fe6213eb3e08f05efe3428bd6bc5421d2 Author: Chris Wilson Date: Fri Mar 28 09:14:59 2014 +0000 sna: Virtual CRTCs are last, so break loops early We know that all the virtual CRTCs are at the end of the CRTC array, so when we see the first one, we can stop the processing of real CRTCs. Signed-off-by: Chris Wilson commit 929ac66558be96a039eadd8604d444598259a0aa Author: Chris Wilson Date: Fri Mar 28 08:48:06 2014 +0000 sna: Cursors are invariant Once created, a Cursor has a fixed size and content, so avoid upload unnecessarily. Signed-off-by: Chris Wilson commit 26cc3cec982d316b8fe1700eae885ae2767c0110 Author: Chris Wilson Date: Fri Mar 28 08:40:47 2014 +0000 sna: drmGetCap is too recent for our supported versions of libdrm Signed-off-by: Chris Wilson commit 78805163c5f8a40a649c973ab2a08b682879f16d Author: Chris Wilson Date: Fri Mar 28 08:45:39 2014 +0000 sna: RefCursor is too recent Replace RefCursor with the simple refcnt manipulation for compilation against older stacks. Signed-off-by: Chris Wilson commit e07f8e2e625fb34f9ad795ca8fffc9a9e88e25b2 Author: Chris Wilson Date: Thu Mar 27 23:06:15 2014 +0000 sna: Fix 2-color to ARGB cursor conversion It helps to remember to advance through the source/mask images after each row. Signed-off-by: Chris Wilson commit e501aa667699787daf7dc0dfd22c397a785564ce Author: Chris Wilson Date: Thu Mar 27 21:57:39 2014 +0000 sna: Cursors only need to be cleared when they are shrunk If we completely overwrite the old contents, we do not need to clear it first. Signed-off-by: Chris Wilson commit 5c4d6d1ad748fe5301fa88d9c15c19a07c55149f Author: Chris Wilson Date: Thu Mar 27 21:16:31 2014 +0000 sna: Reorder the cursor cache search Search for an exact match first, before looking for a cursor we can reuse. This should help reuse with multiple rotated screens not stealing the others' cursor on every pass. Signed-off-by: Chris Wilson commit e8be2a438d7a413ba6c64005971ce814b0076fc7 Author: Chris Wilson Date: Thu Mar 27 21:09:45 2014 +0000 sna: Clear the surrounding areas of small cursors If the cursor does not completely fill the size of the hardware cursor, we will retain whatever contents already filled that area. Signed-off-by: Chris Wilson commit 25ca8f136cef9e1bdf06967bf8e78c87b54ffce2 Author: Chris Wilson Date: Thu Mar 27 14:15:30 2014 +0000 sna: Support variable sized cursors One of the downsides with supporting large cursors is that the full size is very rarely used leading to a waste of permanently allocated resources. Refactor our cursor handling so that we can allocate fresh cursors on the fly that are appropriately sized. Signed-off-by: Chris Wilson commit e3810cff42bca1badc5844002694a6f582c0f423 Author: Chris Wilson Date: Wed Mar 26 16:15:07 2014 +0000 sna: Move cursor reload into crtc notify This only needs to be done once per-screen reconfiguration. Signed-off-by: Chris Wilson commit 6bdd3b39bfddf1369656a6d182303e2058f6eb8f Author: Chris Wilson Date: Tue Mar 25 14:44:49 2014 +0000 sna: Tighten detection of GCs that translate to solid fills Signed-off-by: Chris Wilson commit 771b86e2a808bd74e7e2c316f8414766c2b267c6 Author: Chris Wilson Date: Tue Mar 25 10:27:23 2014 +0000 intel-virtual-output: Add DBG option to force 16 bit transfers Signed-off-by: Chris Wilson commit e46c196ecc8ad83f78f4f948b5dcb07906f249c2 Author: Chris Wilson Date: Wed Mar 26 12:17:37 2014 +0000 sna: Print probed maximum cursor size Signed-off-by: Chris Wilson commit a273b207b94933713b3dfd7edd3f6bb9b3e959b9 Author: Chris Wilson Date: Tue Mar 25 09:40:40 2014 +0000 intel-virtual-output: Fix damage iteration over active list When iterating over the active list to mark the current damage, we need to chase the ->active pointer rather than ->next or else we walk the wrong list from the wrong starting point. Reported-by: Kirill Müller Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76271 Signed-off-by: Chris Wilson commit bfd51e205639b468479985c3c631e5d9c76d5fa7 Author: Chris Wilson Date: Tue Mar 25 08:59:58 2014 +0000 intel-virtual-output: Add a little more DBG around damaging clones Signed-off-by: Chris Wilson commit 278ef8f7bc0c7f63737ad5f5e967ca253c2571cb Author: Chris Wilson Date: Tue Mar 25 08:33:46 2014 +0000 intel-virtual-output: Do not detach with DBG enabled Since DBG is sent to stdout, we only see it if we do not daemonize (which closes stdout). Signed-off-by: Chris Wilson commit 7addfcbf0f2f609ce2a5b8e9a75ee7efb483531c Author: Chris Wilson Date: Mon Mar 24 12:51:11 2014 +0000 sna: Remove one conditional from rendering glyphs into a mask Signed-off-by: Chris Wilson commit d3050dbaf74d6a5b5123eea13bc7710efea6257f Author: Chris Wilson Date: Mon Mar 24 12:39:37 2014 +0000 sna: Consolidate handling of uncacheable glyphs Signed-off-by: Chris Wilson commit 79399ff9264ff23da0ab95131a67d2ac85651b3d Author: Chris Wilson Date: Mon Mar 24 10:46:57 2014 +0000 sna: Eliminate a few conditionals in glyph fast path Signed-off-by: Chris Wilson commit 220accd828c5a0054ae9e3b491a434f7a6c750e0 Author: Chris Wilson Date: Thu Mar 20 09:03:31 2014 +0000 sna: Only enable cursor support if the hw cursor is supported Under a host, we naturally will not setup the cursor capability, and this provides a safeguard in case we have a machine that does not support hardware cursors. Signed-off-by: Chris Wilson commit 7cf0676ff868e7d8cdbfb264e5822250b1f59882 Author: Chris Wilson Date: Thu Mar 20 08:51:05 2014 +0000 intel: Do not close server fds If we are given an fd by the Xserver, then it is not our responsibility to close it during CloseScreen. Signed-off-by: Chris Wilson Cc: Hans de Goede commit 9f4c121974abcec77e7f920e3258a337260200b3 Author: Chris Wilson Date: Thu Mar 20 08:48:40 2014 +0000 intel: Refactor finding device path if unknown Since we already lookup the device path if we do not know it after opening the fd, we can remove the special case along the legacy PCI probe path. Signed-off-by: Chris Wilson commit 582adf067c275a18f55bb43945348b84cb7eb3c4 Author: Chris Wilson Date: Wed Mar 19 14:57:25 2014 +0000 2.99.911 snapshot commit 6802ee00e52515ca886b956f6c0a0e27d708fb31 Author: Chris Wilson Date: Wed Mar 19 10:25:05 2014 +0000 sna: Assert after applying clipping that the draw rectangle is wholly contained Otherwise we ignore the purpose of applying the clip! Signed-off-by: Chris Wilson commit 15be6b7c9a89bfdac923d2a27649f539c430366f Author: Chris Wilson Date: Tue Mar 18 16:31:07 2014 +0000 uxa: Implement minimal flushing for bdw+ Based on the patch by Kenneth Graunke, "Several places (such as intel_cache_expire) call intel_emit_batch_flush, so it needs to work on Broadwell. Sometimes the batch is empty, in which case current_batch may not yet be BLT_RING. The PIPE_CONTROL code has not been ported to work on Broadwell, so trying to do a render ring flush will hang the GPU. It also doesn't make any sense to do a render ring flush, given that we never use the render ring for UXA on Broadwell." Cc: Kenneth Graunke Signed-off-by: Chris Wilson commit 6446bf96f0cc01e730c240f7ed5c91f5d2292139 Author: Hans de Goede Date: Tue Mar 18 15:16:30 2014 +0100 intel: Don't close the fd on probe failure if it is server managed I hit this corner case when testing a single X server spanning both intel gfx + an usb display link adapter driven by xf86-video-modesetting. In this scenario the intel driver gets its platformProbe method called first, and if it then closes the server managed fd, the xf86-video-modesetting gets EBADFD errors. Signed-off-by: Hans de Goede commit 4a6e09c6cdb13773bca5f6831f9f5164008699c9 Author: Chris Wilson Date: Tue Mar 18 15:52:19 2014 +0000 uxa: Add support for server managed fds (via intel_device) Based on the patch by Hans de Goede, this removes the handling of drmOpen() and DRM_MASTER from within uxa and instead uses the common routines. This reduces the duplicate code from within uxa, and enables new features such as server managed fds. Cc: Hans de Goede Signed-off-by: Chris Wilson commit dc66e663a06f2ce7685eba1fdf9fad01786bcb4f Author: Chris Wilson Date: Mon Mar 17 13:46:05 2014 +0000 sna: Improve guard against loading palettes whilst headless Whilst hosted, which is very similar to being headless, we do not even have the kmode pointer and so checking kmode->count_crtcs is fatal. Signed-off-by: Chris Wilson commit 28ebbe8fa902a1d3ee4ecbda5041de5e7b68ada7 Author: Chris Wilson Date: Mon Mar 17 07:56:39 2014 +0000 sna: Fix logic inversion in use of imprecise transform conversion An accidental drop of the if (!is_translation) broke composite copies under a transform. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76244 Signed-off-by: Chris Wilson commit 57e63221ec0fa304a02beed356549cadb28bcf19 Author: Chris Wilson Date: Fri Mar 14 19:49:59 2014 +0000 intel-virtual-output: Minor DBG fixes Improve the summary after failing to detect MIT-SHM, and fix a DBG Signed-off-by: Chris Wilson commit 8cc1f005c69786243ac69f6505087071787e6f87 Author: Chris Wilson Date: Fri Mar 14 15:55:41 2014 +0000 intel-virtual-output: Iterate over remote outputs in the same order as listed If we walk the output lists in the same order as they are listed by RandR, we are more likely to hit favourable priority sorting. E.g. the user is likely to setup the outputs in the same order as listed, meaning fewer CRTC transitions etc. Signed-off-by: Chris Wilson commit a55bbe3b598616ef4464e50cb9364c8cdf0b513a Author: Chris Wilson Date: Fri Mar 14 15:47:20 2014 +0000 intel-virtual-output: Disable panning before setting mode on CRTC For whatever reason, presumably to do with the switch between CRTCs, we need to disable the panning before setting the mode in order for our desired CRTC position to take effect. Reported-by: Jeff Katz Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76146 Signed-off-by: Chris Wilson commit 5079830bd5f01740c4cbf84888bdf7a93bb2868e Author: Chris Wilson Date: Fri Mar 14 14:34:48 2014 +0000 intel-virtual-output: Mode names are freed with ScreenResources So we have to be careful not to continue to reference the strings after they may be freed. Signed-off-by: Chris Wilson commit c64d2572bafeacae25e9b58c8372ce91858c3832 Author: Chris Wilson Date: Fri Mar 14 13:08:43 2014 +0000 sna: Allow some leeway when deciding to discard common translations Under PictFilterNearest, we can ignore fractional translations (not all renderers discard those.) And if we are being approximate, we can loosen our tolerance as well. Signed-off-by: Chris Wilson commit b61e6398f0cf94d3c483e30c05ceae4a8383d16c Author: Chris Wilson Date: Fri Mar 14 11:32:38 2014 +0000 sna: Ensure we flush SHM pixmaps if rendering to a GPU shadow Normally, we try to render into the CPU bo of a SHM pixmap. However, under the right circumstances we may try to do a series of rendering into the GPU bo and then copy it back to the CPU bo. In that case, we need to be sure to mark the pixmap as requiring the flush. Signed-off-by: Chris Wilson commit f47f192f2240d19ede0a3a59b7970e4f563f3195 Author: Chris Wilson Date: Fri Mar 14 09:17:36 2014 +0000 intel-virtual-output: Include extra debug information for modesets Signed-off-by: Chris Wilson commit 0ad54325e94c4fd144c9fbcba25c3d167b6c5e18 Author: Chris Wilson Date: Fri Mar 14 07:42:32 2014 +0000 intel-virtual-output: Disable remote CRTCs at startup Signed-off-by: Chris Wilson commit cbcc1b6190ab733c9ab11543af4a4eb1890225e4 Author: Kenneth Graunke Date: Thu Mar 6 13:12:32 2014 -0800 uxa: Enable BLT acceleration on Broadwell. This supports solid, copy, put_image, and get_image acceleration via the BLT engine. RENDER acceleration (composite) and Xv would be piles of work, which is not worth doing since SNA exists, and Glamor is coming. Signed-off-by: Kenneth Graunke commit c1d7abadbb0009e9f2b9d8d3744d4ae5c13a1c8f Author: Kenneth Graunke Date: Thu Mar 6 13:12:31 2014 -0800 uxa: Remove implicit length from BLT command #defines. These command packets grew on Gen8. Signed-off-by: Kenneth Graunke commit 44fe21018330e0ce750ce25be36cc780ccdb78eb Author: Chris Wilson Date: Thu Mar 13 08:52:45 2014 +0000 sna/gen6+: Simplify BLT vs RENDER decisions for fill ops Signed-off-by: Chris Wilson commit 5d8ded0dd671fbcbd212e06afbea88a7a56a8f0d Author: Chris Wilson Date: Thu Mar 13 08:51:29 2014 +0000 sna: Nullify extra fill.ops I forgot that the initial memset(&fill, 0, sizeof(fill)) was no longer performed and we rely on explicit initialisation during the setup, so add the missing fields. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76088 Signed-off-by: Chris Wilson commit 923b158e5c5dd50f943fe315a058410aeaa76269 Author: Chris Wilson Date: Thu Mar 13 08:14:48 2014 +0000 intel: Fallback to drmGetDeviceNameFromFd() If we are not supplied the path, call the libdrm function to search for the canonical name for our device. Signed-off-by: Chris Wilson commit 202787ffa2bae5b1455137a344dabb9d85ee3aa0 Author: Chris Wilson Date: Wed Mar 12 23:57:04 2014 +0000 sna: Restore asserts that we do not map a freed buffer The complication comes with stolen bo that we treat as purged (because they have no backing storage we can access) and so require an extra caveat. Signed-off-by: Chris Wilson commit 4368a74b1c904625158f0b6baf98ef2a60bb54d4 Author: Chris Wilson Date: Wed Mar 12 17:37:01 2014 +0000 sna: Add DBG around using pixman's glyph cache Signed-off-by: Chris Wilson commit 08d73f1a4499cfe7c3121ff2ecdd36729c5f3544 Author: Chris Wilson Date: Wed Mar 12 12:17:55 2014 +0000 sna: Only couple up a proxy->rq when inserting into the request->buffers list Otherwise, we may never decouple it again afterwards leading to a dangling pointer dereference. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1289923 Signed-off-by: Chris Wilson commit 2f50261539618c30c8470a5795fe5c2440e2318f Author: Chris Wilson Date: Wed Mar 12 10:51:56 2014 +0000 sna: Simplify code when no 64-bit registers are available in the ISA Signed-off-by: Chris Wilson commit 20026626d28b304a6156fb2c49752e18f2498de5 Author: Chris Wilson Date: Fri Mar 7 13:18:07 2014 +0000 sna: Missing fixes for using BLT points On a lone machine I had a vital fix for setting the destination tiling bit inside the XY_PIXEL_BLT command. Sadly, I forgot about the fix before the patch from another machine. Signed-off-by: Chris Wilson commit fd189c868908c81e7c57abf442ec1659efc2637a Author: Chris Wilson Date: Tue Mar 11 11:37:01 2014 +0000 sna/glyphs: Add a smattering of DBG for validating the glyph mask Signed-off-by: Chris Wilson commit d31569455ca25b7050a240cad58bea492c58194a Author: Chris Wilson Date: Tue Mar 11 10:46:06 2014 +0000 sna: Avoid using the wrong pitch for comparing replacement sizes Signed-off-by: Chris Wilson commit 8c5593037f31159532da992ae3b503c3b4a42f8e Author: Chris Wilson Date: Tue Mar 11 10:44:52 2014 +0000 sna: Assert that the pixmap pitch is initialised before use This is a sanity check that the pixmap is mapped for use by the CPU prior to us actually using it. Signed-off-by: Chris Wilson commit dd1ff3230292a31d366c96b97711d7df97362093 Author: Chris Wilson Date: Tue Mar 11 10:06:24 2014 +0000 intel: Protect against a NULL platform device with server fd Signed-off-by: Chris Wilson commit 59f2f4885dbead3f2aece668f48c3ac749f724c2 Author: Chris Wilson Date: Tue Mar 11 10:00:27 2014 +0000 intel: Fix versioning of SUPPORTS_SERVER_FD The current snapshot is 1.15.99.901, which means that the new feature will first be available in 1.15.99.902. Signed-off-by: Chris Wilson commit 78970676e79d462cf99509012db54479ba93c01a Author: Chris Wilson Date: Tue Mar 11 07:33:09 2014 +0000 sna: Be defensive when applying size restrictions to bo The assumption that all paths prevalidate the restrictions upon creation the bo are false. Some important paths try to force the bo creation in order to meet client expectations (e.g. DRI). So we are faced with impossible requests which must fail, so make sure we do report those failures. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1289049 Signed-off-by: Chris Wilson commit d10a5abcbd7c751adc08e24d9f4bdc33596b6f12 Author: Chris Wilson Date: Fri Mar 7 19:44:07 2014 +0000 intel: Supply a fallback guess for the device path If for some reason we have an fd, but no device path, use the likely default path (derived from and validated against the major/minor of the open device fd). Signed-off-by: Chris Wilson commit 28cab948f50b1d67468edbd9c8e10d3d696155f5 Author: Hans de Goede Date: Fri Mar 7 14:13:38 2014 +0100 intel: Add support for server managed fds In the post-modern world, the platform device nodes are handed to a non-privileged Xserver by systemd/logind. We can then query the core for our assigned fd rather than try to open the device for ourselves (which would fail when trying to obtain DRM_MASTER status). A consequence is that we then do not directly control DRM_MASTER status and must act as a delegate of systemd. Signed-off-by: Hans de Goede commit e5f8118bdbc4655d987ab1c52e0a46fa85cc92c4 Author: Chris Wilson Date: Mon Mar 10 22:12:39 2014 +0000 sna: DBG compilation fixups Signed-off-by: Chris Wilson commit 6ed8570f6aa01fdd4edc3df7585f01083b4a9778 Author: Chris Wilson Date: Mon Mar 10 16:39:50 2014 +0000 sna: Pass render hints for migration based on source location Signed-off-by: Chris Wilson commit 955b5de4ba103fb115ec0b45f9b59eb2628ca3dd Author: Chris Wilson Date: Mon Mar 10 16:38:54 2014 +0000 sna/glyph: Release the pixman glyph cache along the error paths If we lock the glyph cache and then hit an error, we must make sure we release our lock. An easy way would be not to lock when we may err. Signed-off-by: Chris Wilson commit e1cb0284218aaf248e251ac0d12fee4bcd3c7650 Author: Chris Wilson Date: Mon Mar 10 15:01:10 2014 +0000 sna/gen2: Fix build after last minute patch editing Whoops, the selective editing of the patch left a trailing '{' and breaking the build. Signed-off-by: Chris Wilson commit 142f8461944b294dbc3fb0a7bf607bccf0bccc1f Author: Chris Wilson Date: Mon Mar 10 15:20:16 2014 +0000 sna/gen2: Tidy blend factor selection for the source Signed-off-by: Chris Wilson commit 0075c90d3192ba90ff1ae8a7b04bfc3ff4fccda7 Author: Chris Wilson Date: Mon Mar 10 15:17:51 2014 +0000 sna/gen2: Fix alpha blending with 8bit destination surfaces On gen2 (like gen3), 8-bit destination surfaces are read into the Green channel (and written to from the Green channel). Therefore the expected alpha blending must instead be converted to colour blending. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75818 Signed-off-by: Chris Wilson commit f0b70ca660416af42be8b3f76f9e38a81dcac464 Author: Chris Wilson Date: Fri Mar 7 08:16:50 2014 +0000 sna: Unroll finding bbox of points Signed-off-by: Chris Wilson commit 928453b1bc5a059a87fbcdba9156d318a0310073 Author: Chris Wilson Date: Fri Mar 7 08:15:21 2014 +0000 sna: Emit points using the BLT primitive when appropriate Signed-off-by: Chris Wilson commit a2b4f2657f8cd503fce4e3b8cc3240d7b45d36ce Author: Chris Wilson Date: Wed Mar 5 09:51:24 2014 +0000 sna/gen8: Correct MOCS settings for render targets Signed-off-by: Chris Wilson commit a7123410a33f29c67a11f26d17ce8b0dc09cc594 Author: Chris Wilson Date: Mon Mar 3 10:12:11 2014 +0000 NEWS: Fix dates for 2014 It has come to my attention that between December and January is traditionally a New Year. Signed-off-by: Chris Wilson commit a3bfb4d3c15e6a37aba5d2f5ba92134c5186e3a4 Author: Chris Wilson Date: Fri Feb 28 08:47:21 2014 +0000 sna: Reorder writes during thread task decoupling So that the lockless reads do not see the task complete signal prior to marking the task as successful. Otherwise, we falsely detect that the thread trapped a signal and kill them all. Signed-off-by: Chris Wilson commit 37d080929a20bd969749c6c12d1ef4ebe236063f Author: Chris Wilson Date: Thu Feb 27 08:36:40 2014 +0000 sna: Limit the WHOLE_HINT to large PutImages The goal here is to predict when we are uploading an entire image though multiple PutImage requests. If the image is small enough, then the PutImage will be contained within a single request and the damage tracking will be accurate. Signed-off-by: Chris Wilson commit 27ac9f574f65cbd535751c925e9b2e2d7c8a6b3a Author: Chris Wilson Date: Thu Feb 27 08:33:52 2014 +0000 sna: Avoid promoting region-to-whole migration and discarding damage Fixes regression from commit 1de1104064b5898cbed37e836901694a381c1266 Author: Chris Wilson Date: Fri Feb 21 22:43:04 2014 +0000 sna: Use a hint to do whole image uploads inplace Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75549 Signed-off-by: Chris Wilson commit ff49944928c7399527b11bb0da7699711591c21a Author: Chris Wilson Date: Fri Feb 21 21:21:46 2014 +0000 sna: Tighten assertion for tiling blt fallbacks Signed-off-by: Chris Wilson commit cf4683209d11ca7382079feb242cc0c07fefc402 Author: Chris Wilson Date: Sat Feb 22 20:17:08 2014 +0000 sna/gen6+: Add missing DBG argument Signed-off-by: Chris Wilson commit a4d23ff3b2a75cc5a1c65b6b8464fc639c9f90b8 Author: Chris Wilson Date: Sat Feb 22 19:35:40 2014 +0000 sna: Add DBG for why trapezoids may be preferred inplace Signed-off-by: Chris Wilson commit d316d14283d8af86e4c5020f9974280570a78959 Author: Chris Wilson Date: Sat Feb 22 19:31:39 2014 +0000 sna: Include mono/precise hints in trapezoids DBG Signed-off-by: Chris Wilson commit 2a144baec87b17ead36373a8c5fd80f37be3ac19 Author: Chris Wilson Date: Sat Feb 22 19:19:11 2014 +0000 sna: Add a little more DBG to watch the flow of allocated bo sizes Signed-off-by: Chris Wilson commit 921e9aff3f8e7c4a33c352241311aeb4df3011fc Author: Chris Wilson Date: Sat Feb 22 18:29:27 2014 +0000 sna: Avoid signed overflow when printing allocated bytes in DBG Signed-off-by: Chris Wilson commit b0b6c043c997732559a971a788c24a5a73812df4 Author: Chris Wilson Date: Sat Feb 22 18:22:38 2014 +0000 sna: Cleanup caches if execbuf fails One of the failure modes for execbuf is running out of memory - often this is reported as a false ENOSPC (thanks shmemfs!). Because of this, we should try to resubmit after we purge our caches. Signed-off-by: Chris Wilson commit bfef9916124973b5e08f9b32eb1fcfb400ee4e8b Author: Chris Wilson Date: Sat Feb 22 18:12:24 2014 +0000 sna: Propagate thread signals for extra DBG Signed-off-by: Chris Wilson commit 64fc1bb9c87e95ff484ecd11f391b1c0d556d584 Author: Chris Wilson Date: Sat Feb 22 14:34:05 2014 +0000 sna: Allow SIGBUS/SEGV to kill the thread To handle sigtrapping of the threads, we allow the threads to handle their async signals and upon hitting the trap, we kill the thread. All the rest of the threads are reaped by the main xserver thread afterwards. Signed-off-by: Chris Wilson commit 900499bff962a63e1d9b5f808d1deb65d55754a2 Author: Chris Wilson Date: Sat Feb 22 13:58:11 2014 +0000 sna: Move sigtrap wrapping closer to threaded sw composite Signed-off-by: Chris Wilson commit aae3bfeb28ca86b416a6a4de71eb23cdb46cf9de Author: Chris Wilson Date: Sat Feb 22 12:44:16 2014 +0000 sna: Assert that sigtrap is active Curiouser and curiouser. Signed-off-by: Chris Wilson commit 75cff26ebad33aca7ade7aa5a650235a7d42e47c Author: Chris Wilson Date: Sat Feb 22 10:05:41 2014 +0000 sna: Apply the dst offset for pixman fills Along one of the sw blt paths we failed to apply the offset for Composite redirection. Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73811 Signed-off-by: Chris Wilson commit 59d471de7fc7581b112f37a68714d0e1f8728dfd Author: Chris Wilson Date: Sat Feb 22 08:35:50 2014 +0000 sna: Handle asynchronous signals from threads By killing the threads and leaking their allocations - marginally preferrable to losing the entire Xserver. Signed-off-by: Chris Wilson commit 1de1104064b5898cbed37e836901694a381c1266 Author: Chris Wilson Date: Fri Feb 21 22:43:04 2014 +0000 sna: Use a hint to do whole image uploads inplace Signed-off-by: Chris Wilson commit 2c0aacb869bea34620a2b0029ddfa7f2a9513dc7 Author: Chris Wilson Date: Fri Feb 21 21:48:36 2014 +0000 sna: Allow allocation to fail even when debugging Let the malloc failure propagate rather than assert. Signed-off-by: Chris Wilson commit cb87b179532a9b533df458f3367fde7fc3d64d0c Author: Chris Wilson Date: Fri Feb 21 21:41:52 2014 +0000 sna: Wrap inplace trapezoid operators with SIGBUS protection For the moment, this still leaves open the vexing question of how to protect the multi-threaded variants, but it should provide more shelter for extreme OOM. Signed-off-by: Chris Wilson commit b6fc46d63c5b7bc1347d4e03e71df9e6fdbcaaab Author: Chris Wilson Date: Fri Feb 21 21:21:46 2014 +0000 sna: Tighten assertion for tiling blt fallbacks Signed-off-by: Chris Wilson commit be6d218c6888bce41e15a8e4899618b5e6eacd99 Author: Chris Wilson Date: Fri Feb 21 19:43:30 2014 +0000 sna: Do not attempt fallback configuration without any CRTCs The fallback xf86InitialConfiguration() is another function that may explode if called without any CRTCs attached. Signed-off-by: Chris Wilson commit 769a959d84d7e573b11cc1a7d85c122f17dfeea0 Author: Chris Wilson Date: Fri Feb 21 13:43:09 2014 +0000 sna: Do not register colormaps without any CRTCs The xserver may crash if we try to setup colormap handling without any CRTCs, so don't. Suggested-by: Dave Airlie Signed-off-by: Chris Wilson commit 0b92b1285ce553c4f475c7fb8ac57ba418009682 Author: Chris Wilson Date: Thu Feb 20 19:18:46 2014 +0000 backlight: Make search routine for device specific backlight common Signed-off-by: Chris Wilson commit caaf52834015c084704cf638f453b1fc3316eaa9 Author: Chris Wilson Date: Thu Feb 20 07:51:40 2014 +0000 sna: Query cursor size from the kernel Signed-off-by: Chris Wilson commit c91af569ee90a832899c9038badd84921e9a87fc Author: Mark Kettenis Date: Tue Feb 18 19:02:14 2014 +0000 backlight: Build fixes for OpenBSD Chris would like to humbly apologise for making these changes to the OpenBSD code blind, and to thank Mark and Jonathan for their support and understanding. commit ecc20fbcf8d5adb6c3b7d005c01788e35bba9d3c Author: Chris Wilson Date: Tue Feb 18 07:56:07 2014 +0000 intel-virtual-output: Discard unwanted events from the mouse recorder X always sends MappingNotify events (there is no way for the client to ignore them). In particular, MappingNotify would be sent after a VT switch, and this would knock out our ability to track the cursor.. Reported-by: Raul Dias Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75115 Signed-off-by: Chris Wilson commit e860b3eaedcb5d56745d5bcc9ce720e9a0e9c293 Author: Hans de Goede Date: Mon Feb 17 13:16:54 2014 +0100 backlight-helper: Simplify reading the level from stdin Since the helper is a standalone app, the usual xserver rules of not using stdio because of signal handling don't apply. And since the helper does run with elevated rights, it is important to keep the code KISS so that it can be audited easily. This commit replaces the hard to read "raw" read loop with a much simpler loop using fgets, improving readability of the code. Signed-off-by: Hans de Goede commit b5229c6e15964e723a7bb99d3c2c20a2fa168e3b Author: Hans de Goede Date: Mon Feb 17 13:16:53 2014 +0100 backlight: Drop rights before executing pkexec Event though we've failed to open the backlight normally, we may still be running under a suid-root xserver, so drop any elevated rights before executing what we hope will be pkxec. Signed-off-by: Hans de Goede commit 27a9dc4ce8fa3ba56f68e04d11a6272348772039 Author: Hans de Goede Date: Mon Feb 17 13:16:52 2014 +0100 backlight: Use System instead of system when checking for pkexec Even though we've failed to open the backlight normally, we may still be running under a suid-root xserver, so use the servers build in System instead of system so as to properly drop root rights. Signed-off-by: Hans de Goede commit 06066b7269b5ccf502c27466ad0434adfd9e3866 Author: Hans de Goede Date: Mon Feb 17 13:16:51 2014 +0100 backlight: Explain better why we support both pkexec and suid root for the helper Update the comment about trying suid-root first with some explanations of why pkexec may be preferable in some cases. Signed-off-by: Hans de Goede commit 6b5c2b4515b646db6be0f9307f53651620516521 Author: Chris Wilson Date: Sat Feb 15 21:03:49 2014 +0000 backlight: tidy use of BACKLIGHT_CLASS Use string concantenation to simply the sprintf slightly. Signed-off-by: Chris Wilson commit eb7d2b19e2829b00317991fba05352e3ba1a1902 Author: Chris Wilson Date: Sat Feb 15 21:00:57 2014 +0000 backlight: Reject user overrides on OpenBSD We only handle the singular wscons OpenBSD interface for backlight, so explicitly reject any user requests for something else. Signed-off-by: Chris Wilson commit 268842a47f05508fc7e1c69cd21e8e66a000dcde Author: Chris Wilson Date: Sat Feb 15 19:54:30 2014 +0000 backlight: Amalgamate hardcoded priority tables Our fallback path for finding the backlight interface uses a hardcoded table of known backlight controllers in proirity order. Rather than maintain this table twice in the midst of the KMS logic, push it to the new set of common backlight routines. This incorporates bugfixes from SNA to handle unknown backlights, but usable, gracefully. Signed-off-by: Chris Wilson commit b71f3d8bd4d6773899c1bdc903911cf240e68ead Author: Jan Alexander Steffens (heftig) Date: Sat Feb 15 17:53:16 2014 +0100 Backlight helper build fixes Don't hardcode $(prefix)/libexec Fix install hook when DESTDIR is set Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75028 commit 3d629c91cfa98b75c6685c2a2003e64fd1b612c4 Author: Chris Wilson Date: Sat Feb 15 14:55:09 2014 +0000 intel: Add a helper for setting backlight without root rights Once the xserver stops running as root on kms capabable systems, we will need some other way to access the backlight. The approach taken in this patch moves most of the heavy lifting to a helper that runs with root privileges and pipes our requested brightness into the sysfs backlight interface. Where required, we use pkexec to launch the helper with the elevated privilege. v2: Amalgamate much more of the duplicate code. Keep the daemon and pipe alive for the lifetime of the backlight interface. Provide an alternative for systems without PolicyKit. Signed-off-by: Hans de Goede [v1] Signed-off-by: Chris Wilson commit a01548ccf192a5b1fa1f4a3e31e1634db39f6b39 Author: Hans de Goede Date: Sat Feb 15 00:02:36 2014 +0100 intel: export fd_set_cloexec / fd_set_nonblock Allow fd_set_cloexec / fd_set_nonblock to be used outside of intel_device.c. Signed-off-by: Hans de Goede commit 5601f8cc330fe88eadfa7238659c5abb223e3b28 Author: Hans de Goede Date: Sat Feb 15 00:02:35 2014 +0100 intel: Fix fd_set_nonblock O_NONBLOCK is a status flag not a descriptor flag, so F_GETFL / F_SETFL should be used to modify it. Signed-off-by: Hans de Goede commit 8eb6335653e6e38228ecf95c3eef82ca2a864e45 Author: Chris Wilson Date: Fri Feb 14 19:36:47 2014 +0000 sna: Inherit the native rotation on initial output probing Signed-off-by: Chris Wilson commit 5f8714335729b4fbbb33d89dbaf0f13aa3d8427b Author: Chris Wilson Date: Fri Feb 14 16:18:34 2014 +0000 sna: Reorganise native rotation ioctls to compile on old Linux It is not just the BSDs that lack these ioctls in their userspace headers, but everything older than about a year... Signed-off-by: Chris Wilson commit 699bde3991624c25d3b731caf7129ed87710b3b3 Author: Chris Wilson Date: Fri Feb 14 15:11:21 2014 +0000 sna: Guard use of DRM_MODE_OBJECT type ids These are not currently exported on OpenBSD and cause the build to fail. Hide their use behind an ifdef guard for the time being. "I noticed the following when trying to compile xf86-video-intel git on OpenBSD: /usr/users/jsg/src/xf86-video-intel/src/sna/sna_display.c:2106: error: 'DRM_MODE_OBJECT_CRTC' undeclared (first use in this function) /usr/users/jsg/src/xf86-video-intel/src/sna/sna_display.c:2106: error: (Each undeclared identifier is reported only once /usr/users/jsg/src/xf86-video-intel/src/sna/sna_display.c:2106: error: for each function it appears in.) /usr/users/jsg/src/xf86-video-intel/src/sna/sna_display.c:2107: error: 'DRM_MODE_OBJECT_PLANE' undeclared (first use in this function)" Reported-by: Jonathan Gray Signed-off-by: Chris Wilson commit 37dbd669415ac82a79b3699da0450aaf68cb1c4c Author: Chris Wilson Date: Fri Feb 14 14:53:14 2014 +0000 sna: Check that the backlight interface is in sysfs before access Before we write values into the file, we want to be sure that it is our sysfs backlight interface, and not some ordinary file we are about to destroy. Signed-off-by: Chris Wilson commit 3a893d14cd227454826a9a86cb3ce227d04bc352 Author: Chris Wilson Date: Thu Feb 13 22:46:22 2014 +0000 sna: Increase the acceptable screen size range Signed-off-by: Chris Wilson commit 2d9fcb3f729e3959dd30b7d7859438894b806b34 Author: Chris Wilson Date: Thu Feb 13 22:36:36 2014 +0000 sna: Filter out requests to create a 0x0 frontbuffer Attempting to create a 0x0 frontbuffer results in erroneous pixmap generation, and is liable to explode at a random point in future, so just reject it outright. Signed-off-by: Chris Wilson commit 1037a1a3f6a8dbde017a28a7b59ef5398c84dba1 Author: Chris Wilson Date: Thu Feb 13 21:36:26 2014 +0000 sna: Fix comparison of previous BLT commands After altering the command bits to accommodate Broadwell, we needed to fixup the comparison of previous BLT commands to detect overwritten commands. Signed-off-by: Chris Wilson commit 9a9f6a9487201e4c80338e771eec28067f044240 Author: Chris Wilson Date: Thu Feb 13 16:18:43 2014 +0000 uxa: Check for access to backlight interface Before attaching properties to any connector, check that we can indeed control the backlight through the sysfs interface by doing an access check. If the xserver is started without root privileges, we cannot write through /sys/class/backlight and so should take care not to advertise that we can. Reported-by: Hans de Geode Signed-off-by: Chris Wilson commit 611490a176d9bfd136f4340f7c31e0e0f0beea4e Author: Chris Wilson Date: Thu Feb 13 16:18:43 2014 +0000 sna: Check for access to backlight interface Before attaching properties to any connector, check that we can indeed control the backlight through the sysfs interface by doing an access check. If the xserver is started without root privileges, we cannot write through /sys/class/backlight and so should take care not to advertise that we can. Reported-by: Hans de Geode Signed-off-by: Chris Wilson commit 83d17cded854871fd41cd3fcf25f38c9b67a4705 Author: Chris Wilson Date: Thu Feb 13 12:57:50 2014 +0000 sna: Clear DPMS tracking on VT switch Assume the worst and force us to reset the property when we restore control. Signed-off-by: Chris Wilson commit 135da294106f7158bb68eeeb9e6c171bcddd94f3 Author: Chris Wilson Date: Thu Feb 13 11:58:15 2014 +0000 sna: Extend native rotation support to sprites The sprite plane can be independently rotated to the CRTC primary plane. To rotate the sprite plane, we just set a property on the plane similar to how we rotate the CRTC, so we can refactor them together to use the same routines. Signed-off-by: Chris Wilson commit e35017e36e45c57ea9847eb5c8466cac3c4d2cc4 Author: Chris Wilson Date: Thu Feb 13 14:46:39 2014 +0000 sna: Enable coordinate transforms for native CRTC rotation Otherwise X tells Clients that the cursor is still in the unrotated location when it appears rotated on the display. Signed-off-by: Chris Wilson commit 72e909953c1865f86fbd6325ff807d7c7357af5f Author: Chris Wilson Date: Thu Feb 13 09:46:13 2014 +0000 Revert "uxa: Do not change DPMS mode on unconnected outputs" This reverts commit 4497212307dee5e35bc6836201738a2fdb559020. Unfortunately, this simple fix does not work for UXA as DPMS is used by the xserver to turn off CRTCs and outputs. Since UXA does not implement CRTC DPMS, this commit causes us to fail to turn off outputs. The kernel has been fixed up in the meantime and that commit has been recommended to be backported to all stable kernels: commit c9976dcf55c8aaa7037427b239f15e5acfc01a3a Author: Chris Wilson Date: Sun Sep 29 19:15:07 2013 +0100 drm/i915: Only apply DPMS to the encoder if enabled so it should be safe for UXA to rely on its old behaviour. Bugzilla: https://code.google.com/p/chromium/issues/detail?id=341135 References: https://bugs.freedesktop.org/show_bug.cgi?id=68030 Suggested-by: Dominik Behr Signed-off-by: Chris Wilson commit 1c5ccf5d9d8beb7e8343eb2d07bbf97f53c1a224 Author: Chris Wilson Date: Thu Feb 13 01:06:41 2014 +0000 sna: Always assign a name to the modes In some cases, such as querying the mode from the CRTC, we may not have a name associated with the mode. However, RandR always expects a valid name. To satisfy this requirement, always generate the canonical mode name if no other is specified. References: https://bugs.freedesktop.org/show_bug.cgi?id=70132 Signed-off-by: Chris Wilson commit fb89bfc73f4103ca6116c8f91970f4bfa491636c Author: Chris Wilson Date: Wed Feb 12 16:41:51 2014 +0000 sna/gen5: Flush the render cache between operations When we change the blend mode between operations, it appears that we must flush the render cache or else we risk render corruption. This is usually noticeable in rendering of single glyphs. This was originally fixed for bug 51422, but was reintroduced by commit 37eb7343be1aeeb90a860096756603a577df1a77 Author: Chris Wilson Date: Sat Dec 1 09:40:11 2012 +0000 sna/gen5: Inspired by gen4, reorder the flushing and the desire to reduce the impact of this w/a. Reported-by: itumaykin@gmail.com Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74882 Signed-off-by: Chris Wilson commit 564a766a6bbe8bcf2480248a54059e7d6727440d Author: Chris Wilson Date: Wed Feb 12 16:19:25 2014 +0000 intel-virtual-output: Do not resize the screen whilst all outputs are off If all the outputs are off, we try to resize the screen to 1x1, which is typically illegal. So, just keep the existing screen and xfer buffer for next time it is enabled. Signed-off-by: Chris Wilson commit 87b9d9f507885ed98d7249940218631b775d30ea Author: Chris Wilson Date: Wed Feb 12 15:48:20 2014 +0000 intel-virtual-output: Force an output probe on initial connection to remote display Signed-off-by: Chris Wilson commit dda57f2e28e01ea254cb2aba9e0846b755c4175a Author: Chris Wilson Date: Wed Feb 12 15:47:00 2014 +0000 intel-virtual-output: Fix checking for no change in output modes Signed-off-by: Chris Wilson commit 94e5ca3d5ab33c8e9b86a4f60c712da72df15b3d Author: Chris Wilson Date: Wed Feb 12 15:13:42 2014 +0000 intel-virtual-output: Always requery modes after OutputNotify References: https://bugs.freedesktop.org/show_bug.cgi?id=74800 Signed-off-by: Chris Wilson commit d84940cc9d297df00477c838b4f53883c19a1da4 Author: Chris Wilson Date: Wed Feb 12 14:48:24 2014 +0000 intel-virtul-output: Double check timestamps Compare both res->timestamp and res->configTimestamp for changes in state. Signed-off-by: Chris Wilson commit 607737cc47788e2a8896fddfece907a3cfb24f7f Author: Chris Wilson Date: Wed Feb 12 11:33:45 2014 +0000 sna: Support native primary plane rotations Use the display hardware for simple rotations, when exported through the rotation property on the CRTC. As the kernel support is not yet merged upstream, the feature is hidden behind --enable-rotation. Signed-off-by: Chris Wilson commit 3b43630f5525a60e935dbc46e70354bb45444814 Author: Chris Wilson Date: Wed Feb 12 10:43:46 2014 +0000 Revert "sna/gen6: Serialise write to DERRMR register using STORE_REGISTER_MEM" This reverts commit 2a5ad9c015bbb41550536dd3cf4ad18b7f21fd80. Oops, pushed from the wrong machine and merged in a incomplete bugfix branch. Signed-off-by: Chris Wilson commit fb69bd16a30cd0449fa9bb603dacd001e777b5bb Author: Chris Wilson Date: Wed Feb 12 10:34:34 2014 +0000 sna/gen5: Use the DBG option ALWAYS_FLUSH to force a full flush When flushing between operations, we can choose between doing a full flush to memory, or just a pipeline flush. For debugging it is better to do the full flush to rule out cache effects. Signed-off-by: Chris Wilson commit 77f8d9ca84342b256de1e118edfd14ddae4d593f Merge: 3fb39d4 27663f3 Author: Chris Wilson Date: Wed Feb 12 10:32:50 2014 +0000 Merge branch 'master' of hsw:/usr/src/xf86-video-intel commit 27663f31163c22f7dfaf8f5a3e45fa1c93a7d9e4 Author: Chris Wilson Date: Wed Feb 12 09:58:06 2014 +0000 sna/gen5: Add a DBG option to force flushes between operations Signed-off-by: Chris Wilson commit 834e8078fc1b8d3acba9fa887d6dcdd861e3c15a Author: Chris Wilson Date: Wed Feb 12 09:50:35 2014 +0000 sna: Retrieve tiling for fbcon Yikes, there appear to be tiled fbcon framebuffers on the horizon. Signed-off-by: Chris Wilson commit 69d4c15d525065374de50d624388252152a36b8b Author: Chris Wilson Date: Wed Feb 12 07:56:10 2014 +0000 sna: Delete redundant branch The MOVE_READ else branch is repeated immediately below when marking up damage for MOVE_WRITE, so remove it for simplicity. Signed-off-by: Chris Wilson commit ec39adc93a4a127b34704a2012182b5c72b3a9b3 Author: Chris Wilson Date: Tue Feb 11 23:08:35 2014 +0000 Record Video ABI version that we configure against Signed-off-by: Chris Wilson commit 3fb39d477909a433ae67bdfc69ad870ddabee3a7 Merge: 2a5ad9c c02067d Author: Chris Wilson Date: Tue Feb 11 21:57:23 2014 +0000 Merge branch 'master' of hsw:/usr/src/xf86-video-intel commit c02067dcf514f19beb0e17b5765826148386e673 Author: Chris Wilson Date: Tue Feb 11 21:21:17 2014 +0000 sna: Defer move-to-gpu until we need to transfer GPU damage to CPU When preparing a pixmap for CPU rendering, one of the last steps is to copy the outstanding GPU damage back to the CPU. Currently, we flush any outstanding pageflips (for TearFree) and in the process accidentally destroy the shadow buffer if there is no outstanding GPU damage. Rearrange the code to avoid tripping over that by only processing the move-to-gpu if we need to touch the GPU bo. Signed-off-by: Chris Wilson commit 2a5ad9c015bbb41550536dd3cf4ad18b7f21fd80 Author: Chris Wilson Date: Tue Feb 11 11:23:37 2014 +0000 sna/gen6: Serialise write to DERRMR register using STORE_REGISTER_MEM Signed-off-by: Chris Wilson commit 5142d1ca3fd877f2ca9277af314f6432580370de Author: Chris Wilson Date: Mon Feb 10 16:42:06 2014 +0000 sna: Remove damaged region after converting CPU bo to GPU bo Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=70461 Signed-off-by: Chris Wilson commit 1267235fd474c5249d45a7015e3d741dc607e57f Author: Chris Wilson Date: Mon Feb 10 16:37:38 2014 +0000 sna: Check for overwriting damage before applying clear Signed-off-by: Chris Wilson commit 2f99070708ce8f591c31e1e908809a0ce551c13f Author: Chris Wilson Date: Mon Feb 10 14:19:53 2014 +0000 sna: Clear GPU damage flag for 1x1 writes onto a clear buffer An optimisation for 1x1 reads of a clear buffer lead to a bug whereby the damage for a 1x1 write would not be tracked correctly (conflicting full GPU damage vs partial CPU damage). Signed-off-by: Chris Wilson commit 2fb2cd092dadba40b5ad2da57943c660a0c9bc14 Author: Chris Wilson Date: Mon Feb 10 09:35:11 2014 +0000 2.99.910 snapshot commit 37d8566ee78c67647b159a96ddb2675d1506b967 Author: Chris Wilson Date: Sun Feb 9 12:28:27 2014 +0000 sna/gen6: Restore stall dropped when not flushing instead commit 82e6d41c2f4f343bd1854d3d8ee4b624b5d68971 Author: Chris Wilson Date: Thu Oct 31 13:35:59 2013 +0000 sna/gen6: Tweak flush around CC state changes Replaced the pipeline stall with a flush - but only when the target was dirty. The missing stall however seems to be required as well. v2: Actually emit the stall for all CC state changes [Ilia Mirkin] Reported-by: Ilia Mirkin Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72375 Signed-off-by: Chris Wilson commit 823382d28944a319c207f20ecef25ce1707a8021 Author: Chris Wilson Date: Thu Feb 6 10:13:41 2014 +0000 sna: And clear drawable->id on reused pixmaps References: https://bugs.freedesktop.org/show_bug.cgi?id=74550 Signed-off-by: Chris Wilson commit 6fc46adb18a8410074c12d6e8979ef01813ebdf2 Author: Chris Wilson Date: Thu Feb 6 09:24:17 2014 +0000 uxa: Do not expose TextureVideo Xv adapters when acceleration is disabled Signed-off-by: Chris Wilson commit 1eadd1d0b1c8bcbf11eb7c0e112d1e424b63c25e Author: Chris Wilson Date: Thu Feb 6 09:04:30 2014 +0000 sna: Add some DBG to clarify the source pixmap (for tiles) Signed-off-by: Chris Wilson commit 4d1a2ef9553c663bb97b56adde6f6b41241ff528 Author: Chris Wilson Date: Thu Feb 6 08:29:20 2014 +0000 sna: Reset composite offsets when reusing freed pixmaps Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74550 Signed-off-by: Chris Wilson commit 79d2f96bdfa0d7ae1567bf4b57b4f86aae424f50 Author: Chris Wilson Date: Wed Feb 5 15:30:30 2014 +0000 sna: Add some DBG around tiled blts References: https://bugs.freedesktop.org/show_bug.cgi?id=74550 Signed-off-by: Chris Wilson commit 02eceefa2909075aca0ba3df7fdba835079aeb78 Author: Chris Wilson Date: Wed Feb 5 11:41:42 2014 +0000 sna: Pass read hints from move-to-cpu to wait_for_shadow Signed-off-by: Chris Wilson commit de73c5fd1cd4f948b8bd3582ae788f6f855c5b16 Author: Chris Wilson Date: Tue Feb 4 20:57:24 2014 +0000 sna: Tweak assert_bo_retired() to be callable on cached bo References: https://bugs.freedesktop.org/show_bug.cgi?id=73406 Signed-off-by: Chris Wilson commit 0906769c1b92520351729c4d8f2ab684d3ddf2eb Author: Chris Wilson Date: Tue Feb 4 17:51:51 2014 +0000 sna: Rearrange assertion to ease use of substitute cached bo Since we call kgem_bo_submit() along one path when synchronising a cached bo (which is known to be inactive) but still want to keep the assertion on the refcnt, simply rearrange the code to only assert on the active path. References: https://bugs.freedesktop.org/show_bug.cgi?id=73406 Reported-by: Matti Hamalainen Signed-off-by: Chris Wilson commit fc001615ff78df4dab6ee0d5dd966b723326c358 Author: Chris Wilson Date: Tue Feb 4 10:36:21 2014 +0000 sna/gen4: Disable use of pipecontrol invalidates again One day, just not today, we may make gen4 work correctly, efficiently and fast. Today, we can barely pick one. References: https://bugs.freedesktop.org/show_bug.cgi?id=55500 Signed-off-by: Chris Wilson commit c6a21f0355447d398a8b857ad046cd27141d4744 Author: Chris Wilson Date: Tue Feb 4 08:51:17 2014 +0000 sna/glyphs: Reset composite state between switching glyph formats One path uses the mask channel, the other does not. We cannot rely on overwriting all reused state in this case, and so we must clear the composite state prior to use each time. Reported-by: Arkadiusz Miskiewicz Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74494 Signed-off-by: Chris Wilson Tested-by: Arkadiusz Miskiewicz commit 1cbc59a917e7352fc68aa0e26b1575cbd0ceab0d Author: Edward Sheldrake Date: Mon Feb 3 09:34:33 2014 +0000 sna/gen4,5: Fix setting pipe control cache flush bits Cache flush bits are on dword 0, not 1, on gen4 and gen5. Also texture cache invalidate is only available from Cantiga onwards. commit 7f08250a8960f90f6bd34de8c4a17870703bfa60 Author: Chris Wilson Date: Sun Feb 2 03:52:11 2014 +0000 sna: Reconstruct damage for the partially replaced discarded CPU bo Signed-off-by: Chris Wilson commit 853588ad5be9407d2123f6055458ca84e72b8eb9 Author: Chris Wilson Date: Sat Feb 1 21:55:09 2014 +0000 sna: If IGNORE_CPU is not set we must mark the move as MOVE_READ Logic reversal in discarding CPU damage. An old bug revealed by the more aggressive attempts to discard CPU damage. Signed-off-by: Chris Wilson commit 8b0748c57ee4c38ea98c4b6ca18cb2b99f8f9ed4 Author: Chris Wilson Date: Sat Feb 1 21:54:43 2014 +0000 sna: Add some more DBG for choosing render targets Signed-off-by: Chris Wilson commit ed8d4f0ce3bff662d02063528df64d478ac0dc00 Author: Chris Wilson Date: Sat Feb 1 21:38:47 2014 +0000 sna: Skip discarding CPU bo when using as a render target The issue with unwanted serialisation does not affect the async move-to-cpu of a render target. Signed-off-by: Chris Wilson commit 26613b046012f0ad968a15ab6bdfa8f6a6652e77 Author: Chris Wilson Date: Sat Feb 1 21:37:41 2014 +0000 sna: Allow more inplace promotions of CPU to GPU bo If the CPU bo is wholly damaged, then it makes an ideal candidate for simply converting into the GPU bo. Signed-off-by: Chris Wilson commit 699b4fd3139d1d6d02911d6c8f193ead3445f613 Author: Chris Wilson Date: Sat Feb 1 20:13:53 2014 +0000 sna: Undo region translation before returning Signed-off-by: Chris Wilson commit 2c4b2ed558bec3b71077fb12cc4e008cccc819fa Author: Chris Wilson Date: Sat Feb 1 17:59:29 2014 +0000 2.99.909 snapshot commit 495bf89496a96eff0b2c5b6a95aa29df8d7fbc81 Author: Chris Wilson Date: Sat Feb 1 18:57:06 2014 +0000 sna: Apply drawable offsets to partial CPU damage being replaced Signed-off-by: Chris Wilson commit 2ba8d40bf7e4d3e8fa541c001f82aa65f26bed3a Author: Chris Wilson Date: Sat Feb 1 18:13:04 2014 +0000 sna: Don't discard the GPU prior to using it for stashing CPU damage Signed-off-by: Chris Wilson commit 534f19dc5a302828fe60d0f4747ad0dc9617e1a9 Author: Chris Wilson Date: Sat Feb 1 17:56:58 2014 +0000 sna: Remark the region as damaged after uploading the rest to the GPU If we upload outside of the replaced region to the GPU, we need to remark the region of operation as dirty. Signed-off-by: Chris Wilson commit 2814748b91c80c8935ea2f366e954a80bef69bb0 Author: Chris Wilson Date: Sat Feb 1 17:37:42 2014 +0000 sna: Only discard CPU damage for an replacing region When considering move-region-to-cpu, we need to take into account that the region may not replace the whole drawable, in which case we cannot simply dispose of an active CPU bo. Reported-by: Bas Nieuwenhuizen Reported-by: Conley Moorhous Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74327 Signed-off-by: Chris Wilson commit 3e784832a52686cd29d62bdeac7b1c539c640c5b Author: Chris Wilson Date: Sat Feb 1 16:55:32 2014 +0000 glamor: Enable Xv support In addition to the UXA texture paths (which in theory support VSync) and direct overlay support, create a textured video paths that utilize the glamor acceleration code. Requested-by: Fabio Pedretti Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74311 Signed-off-by: Chris Wilson commit 3f2e199b6b4ce86ba3922f9f2dea5f6cba053453 Author: Chris Wilson Date: Fri Jan 31 17:59:30 2014 +0000 2.99.908 snapshot commit 1f9a6156e9240a1efa8785ab5bca0a3b1757d08e Author: Chris Wilson Date: Fri Jan 31 20:02:44 2014 +0000 sna: remove short-circuit for move-to-CPU when damage covers region The short-circuit path missed translating the damage from drawable space into the pixmap (for Composite setups) which may have resulted in corruption. The path was also failing to consider the impact of reusing an active CPU bo when it could be discarding the unwanted damage and reallocating. Signed-off-by: Chris Wilson commit 539b749416b275d84e05e2a5b62d946903aa3d29 Author: Chris Wilson Date: Fri Jan 31 18:02:51 2014 +0000 sna: Use 24bpp rendering by default for gen2 again Too many users where unhappy that their software was broken. Too bad the same software is also broken at high bit depths as well. References: https://bugs.freedesktop.org/show_bug.cgi?id=73877 Signed-off-by: Chris Wilson commit bdb1a62ce21f3eb5e27e411b78f13ad2aea963a4 Author: Chris Wilson Date: Fri Jan 31 16:42:46 2014 +0000 sna: Balance memory accounting for buffer objects A couple bugs ended up with CPU bo gradually accumulating whilst the overall number of bo vanished. Signed-off-by: Chris Wilson commit f934ee78a000815e14e36bd0caa279cb35d07bfe Author: Chris Wilson Date: Fri Jan 31 15:39:23 2014 +0000 sna: Reorder assignments vs DBG It helps reading the debug log if what we print is correct. Signed-off-by: Chris Wilson commit bdbb928ea38977bd2784f454f35db2ac2c13c34c Author: Chris Wilson Date: Fri Jan 31 15:03:43 2014 +0000 sna: Actually reuse pixmap headers for ordinary pixmaps commit 3dbf17f00e200e864818b0b8ca762183cff9085f [2.99.907] Author: Chris Wilson Date: Tue Dec 3 12:10:01 2013 +0000 sna: Mark up an ordinary pixmap for reuse started to put the frequently allocated pixmaps into the object cache - but as those frequent allocations themselves did not use the cache, the cache kept growing. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1272338 Signed-off-by: Chris Wilson commit dfac4650e621055c5504c1bcf6df6449afa6d8d2 Author: Chris Wilson Date: Fri Jan 31 14:28:56 2014 +0000 sna: Tidy up pixmap header allocations Refactor some more of the common code, and add some debug tracking. Signed-off-by: Chris Wilson commit 098a1163e9730b428351fa54e8765261f5350d21 Author: Chris Wilson Date: Fri Jan 31 14:10:36 2014 +0000 sna: Show the memory debug info again This needs to be visible whenever we --enable-debug=memory. Make it so, and trim it to a single line in the process. Signed-off-by: Chris Wilson commit 166e8e9e5d79f64e30230d9520b9f6cafa7dd0d0 Author: Chris Wilson Date: Thu Jan 30 12:19:04 2014 +0000 sna: Silence a compiler warning for mismatching const strings sna_display.c: In function 'preferred_mode': sna_display.c:3393:7: warning: assignment discards 'const' qualifier from pointer target type [enabled by default] mode = xf86GetOptValString(output->options, OPTION_PREFERRED_MODE); Signed-off-by: Chris Wilson commit ca2d9e69d08f5438a34dbf55ab058f5c4c3b3650 Author: Chris Wilson Date: Thu Jan 30 12:18:05 2014 +0000 sna: Suppress warning for freeing a "constant" string We allocated and own the string, so we can free it! sna_display.c: In function 'sna_output_get_modes': sna_display.c:2314:4: warning: passing argument 1 of 'free' discards 'const' qualifier from pointer target type [enabled by default] free(current->name); Signed-off-by: Chris Wilson commit 5ef675159fd83ee393a86220eb4f8c514da8d0e7 Author: Chris Wilson Date: Thu Jan 30 12:17:02 2014 +0000 sna: Handle char *backlight_iface The backlight_iface is a freeable string, in places we were assigning a constant string and later freeing it. Signed-off-by: Chris Wilson commit 76e430e92c19ea799547e4e6ae1f389ebc6eaac5 Author: Chris Wilson Date: Thu Jan 30 12:13:16 2014 +0000 sna: Constify GCFunc to quieten the compiler. We keep a pointer to the old funcs when wrapping, this now needs to be const. sna_accel.c: In function 'sna_gc_move_to_cpu': sna_accel.c:4008:17: warning: assignment discards 'const' qualifier from pointer target type [enabled by default] sgc->old_funcs = gc->funcs; Signed-off-by: Chris Wilson commit 57445e57d4dfc080620ff0e4f9ec9a63b0feb355 Author: Chris Wilson Date: Wed Jan 29 16:48:21 2014 +0000 sna: Fix format specifier typo ('%D') in DBG Signed-off-by: Chris Wilson commit 139fc76260ebeb4f4cc04c56b9ebf7f70bed660d Author: Chris Wilson Date: Wed Jan 29 13:42:50 2014 +0000 sna: Always clear the domain even only a potential sync It helps to keep the domain-tracking bookkeeping consistent. Signed-off-by: Chris Wilson commit d70620d9789da1cf983dac318d9ca9149f11ff20 Author: Chris Wilson Date: Wed Jan 29 13:39:20 2014 +0000 sna: We can only retire a bo if is not referenced by the current batch Fixes regression from commit 8b0ebebcab21647348f769c25ca0c1d81d169e75 Author: Chris Wilson Date: Tue Jan 28 16:30:47 2014 +0000 sna: Be a little more assertive in retiring after set-domain Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74176 Reported-by: Jan Alexander Steffens Signed-off-by: Chris Wilson commit 971a5e64f574f09ef43bcca9e0bd02cb0e42aa03 Author: Chris Wilson Date: Wed Jan 29 13:15:43 2014 +0000 sna: Add assertions for set/get binding Signed-off-by: Chris Wilson commit 7df3da10e744d7f168ea3f30b21c434f99beae17 Author: Chris Wilson Date: Wed Jan 29 13:06:08 2014 +0000 sna/gen4+: Assert that the cached binding location is valid We can at least check that it is in the right region (i.e. not past where the current surface has been allocated from). References: https://bugs.freedesktop.org/show_bug.cgi?id=74176 Signed-off-by: Chris Wilson commit 001dd080e15157961188c96718669dd1b4d6b939 Author: Chris Wilson Date: Wed Jan 29 11:15:45 2014 +0000 sna: Do not use color corrected pixel values for comparing against gc Dashed zero-width lines devolve into two passes (first to draw the foreground dashes, and then to draw the gaps). The code was using the pixel value to decide which phase was being drawn -- however the color on the gc is not always bit exact (e.g. alpha channel) with the pixel value. As a result, we would oft miss drawing anything when rendering into the scanout. Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=1059152 Signed-off-by: Chris Wilson commit 872468a059e164235527d1501940b2740d3da2ff Author: Chris Wilson Date: Wed Jan 29 05:40:00 2014 +0000 sna/gen6+: Encourage inplace uploads for Composite First try using the blt path for a potential inplace upload for a simple composite operation copying from a ShmPixmap. Signed-off-by: Chris Wilson commit 4b73a0ea22b43807c0118f4d7e9dcac3f0626463 Author: Chris Wilson Date: Wed Jan 29 05:32:25 2014 +0000 sna: Skip undamaged TearFree redisplays If we have not had cause to flush the wait_for_shadow buffer during the course of the rendering, then we never wrote to the backbuffer and its contents are still identical to the current frontbuffer. So if the wait_for_shadow is still flagged as required on the scanout, we know we can safely discard the redisplay request. References: https://bugs.freedesktop.org/show_bug.cgi?id=70905 Signed-off-by: Chris Wilson commit 9f3fc9ec49f0caf53344577896ef9b6468cd3d4f Author: Chris Wilson Date: Tue Jan 28 21:56:23 2014 +0000 Allow selection of glamor as the default acceleration method Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74162 Signed-off-by: Chris Wilson commit 2425f03432de9bedeeda14ddbc5742cf7ce22874 Author: Chris Wilson Date: Tue Jan 28 19:17:14 2014 +0000 sna: Check for a hang after a spurious error return from set-domain-ioctl set-domain-ioctl should only ever fail for invalid user input, beyond the normal signal handling. As such if we do find a spurious error return from the kernel, check for a GPU hang. Signed-off-by: Chris Wilson commit 8b0ebebcab21647348f769c25ca0c1d81d169e75 Author: Chris Wilson Date: Tue Jan 28 16:30:47 2014 +0000 sna: Be a little more assertive in retiring after set-domain After a successful set-domain for writing with the CPU, we know that the buffer is idle so remove it from our request tracking. (External clients complicate matters in that they may keep the bo active even after our set-domain.) On the contrary, because of read-read optimisations a bo may still be active after a set-domain for reading by the CPU, in which we need to remain conservative in retiring the bo. Signed-off-by: Chris Wilson commit b99c8cbefdd8fec686ad81fbffebb70d43880779 Author: Chris Wilson Date: Tue Jan 28 12:51:00 2014 +0000 sna: Cancel the backlight change if set-property(DPMS) fails If the kernel reports an error from setting the DPMS property, we need to undo the local changes and propagate back the error to the caller. Although the latter is prevented by the RandR API, we can at least restore the backlight. Signed-off-by: Chris Wilson commit 47effa1854e331643302146db238e6b092de8a9a Author: Chris Wilson Date: Mon Jan 27 21:48:33 2014 +0000 sna: Rearrange damage allocation to handle malloc failure more gracefully If we fail to allocate new damage boxes, first try collescing the existing boxes to free up memory. Signed-off-by: Chris Wilson commit ad7daf9aae487af13c0578de95652675d4d2ed7d Author: Chris Wilson Date: Mon Jan 27 21:20:40 2014 +0000 sna: Use signal-safe DBG Otherwise we end up confusing the core Xserver functions when called from auxilliary threads. Signed-off-by: Chris Wilson commit 294180b3bf78f2c0ae2f1197e1c0819d99009356 Author: Chris Wilson Date: Fri Jan 24 14:21:44 2014 +0000 sna/gen3+: Allow for spill when aligning vertices We need to flush the batch if we run out of space aligning our vertex buffer - but the test must anticipate the space required for the new alignment. Reported-by: Arkadiusz Miskiewicz Signed-off-by: Chris Wilson commit 4385724dc49dd090e0a5956e287f80b92ebd70e8 Author: Chris Wilson Date: Fri Jan 24 11:29:26 2014 +0000 sna/gen2+: Inspect composite flags to discard unneeded CPU damage We can now check whether the Composite operation will require existing CPU damage and if not discard it. Signed-off-by: Chris Wilson commit c9e9c85fc7b21e231c2532fe1c75b92307e112ed Author: Chris Wilson Date: Thu Jan 23 19:04:27 2014 +0000 sna/gen2,3: Don't set BLT_DST_TILED This bit only exists for gen4+ so avoid setting it on gen2 and gen3, whilst setting it doesn't seem to cause any harm, there is no reason to risk it... Signed-off-by: Chris Wilson commit 6914b3af7f26c7b61e4ee6ea3a6ccda5011fa4da Author: Chris Wilson Date: Thu Jan 23 16:30:07 2014 +0000 sna: Protect against fake CRTCs during initial probe Reported-by: Nick Bowler Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73981 Signed-off-by: Chris Wilson commit e916c922ce3913712cd8a9b76ab037840b7f07f1 Author: Chris Wilson Date: Thu Jan 23 17:30:29 2014 +0000 sna: Avoid erroneous discarding operations for partial composites Composite operations were presumed to cover their entire width x height area. However, a few paths submit boxes that do not cover the clip region and so the optimisation made during prepare to discard completely overwritten data is incorrect (and leads to corruption - stale data is seen which the client expected to have been overdrawn). So along these more unusual paths, we must add a flag to prevent the overzealous discard. Notably, xfce4 triggers this as it uses a lot of unantialiased trapezoids in its theme drawing. References: https://bugs.freedesktop.org/show_bug.cgi?id=69528 Signed-off-by: Chris Wilson commit 59e769e1b1eede466482a950b242ce81c52b276b Author: Chris Wilson Date: Thu Jan 23 12:57:48 2014 +0000 glamor: Don't require the glamoregl module to be pre-loaded with xserver >= 1.15 Inspired by (ok, copied from): xf86-video-ati commit f2a0a5cf6c5a21e2a02280e110a4eb8e6609dace Author: Michel Dänzer Date: Wed Jan 22 11:04:42 2014 +0900 Don't require the glamoregl module to be pre-loaded with xserver >= 1.15 The issues with loading it on demand have been fixed in xserver 1.15. Inspired by Jérôme Glisse on IRC. Signed-off-by: Chris Wilson commit 32010ed86bb8f28d3b02e1e54a592d79b92b2b98 Author: Chris Wilson Date: Wed Jan 22 16:26:14 2014 +0000 sna: Assert that the fill box is within bounds References: https://bugs.freedesktop.org/show_bug.cgi?id=73811 Signed-off-by: Chris Wilson commit 29e11e2e6f80f6485ed69ea72e09e8d9b31fd8e8 Author: Chris Wilson Date: Tue Jan 21 22:40:11 2014 +0000 sna: Restore gc->serialNumber correctly after falling back Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73856 Signed-off-by: Chris Wilson commit 2c441079cbd52902d356b652659e2be84726940e Author: Chris Wilson Date: Tue Jan 21 10:17:03 2014 +0000 sna: Initialise the TearFree shadow output from the current front buffer Otherwise we may end up in a sitation where we show stale contents for a (sometimes signification) fraction of a second before it is refreshed with the correct contents. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73842 Signed-off-by: Chris Wilson commit ac22dd4292841e27bb6147cf1aa7867f36bb2118 Author: Chris Wilson Date: Fri Jan 17 14:33:26 2014 +0000 sna/gen4: Add an ALWAYS_FLUSH debugging option Still gen4 is cursed. This should restore the plateau we reached with 2.99.907 by forcing a full GPU flush between every operation. References: https://bugs.freedesktop.org/show_bug.cgi?id=55500 Signed-off-by: Chris Wilson commit 720d131963b5c4d8f9e63c8852dbc133544ad312 Author: Chris Wilson Date: Tue Jan 21 10:35:30 2014 +0000 sna: Drop bogus assert added in recent patches The intention was to detect if the gc->pCompositeClip still pointed to the temporary region. However, the assert failed to accomplish that goal. Signed-off-by: Chris Wilson commit 36b743aa8e246c7361436d93a41a1f844c168a7a Author: Chris Wilson Date: Tue Jan 21 10:00:07 2014 +0000 sna: Reduce zeal of new gc->pCompositeClip gc->pCompositeClip starts off NULL, just like sna_gc->priv. Reported-by: Arkadiusz Miskiewicz Signed-off-by: Chris Wilson commit 6a757eaa0903139183d16c3437bf86d58e62145e Author: Chris Wilson Date: Tue Jan 21 09:25:45 2014 +0000 sna: Fix typo in assertion from previous commit Sigh. It helps to remember to do compile testing with the right configuration. Signed-off-by: Chris Wilson commit b9ebb016833df5b70336c66993a871e850fd0f61 Author: Chris Wilson Date: Tue Jan 21 09:05:54 2014 +0000 sna: More assertions for tracking gc->pCompositeClip Tracking down who leaves it modified... Signed-off-by: Chris Wilson commit f7121bf733e9b02248fa0b7bb62a902622dd8f10 Author: Mark Kettenis Date: Mon Jan 20 22:33:16 2014 +0000 sna: build fix for OpenBSD Commit 50a45a1cdd4d8319ba9358974d241069689591c5 introduced the use of "struct stat" but doesn't include . Presumably that leaks in trough some other header on Linux, but on OpenBSD compilation fails because the struct isn't known. commit 50f6701aa5ce8be96e216a942880a8db967c7a6a Author: Chris Wilson Date: Mon Jan 20 20:47:15 2014 +0000 sna: Include serial numbers in ValidateGC DBG Signed-off-by: Chris Wilson commit 4c7b183fd21b461f9f18662c3b9d9732b6bef13d Author: Chris Wilson Date: Mon Jan 20 14:35:55 2014 +0000 sna: Short-cut the fallback for XCopyArea with depth < 8 Signed-off-by: Chris Wilson commit 671658499bf432666a96b31ac96d2c66e2168c4c Author: Chris Wilson Date: Mon Jan 20 14:35:35 2014 +0000 sna: Add some more DBG output around the clipping in sna_do_copy() Signed-off-by: Chris Wilson commit 55a933aa29434f23674c851f02dce0ce983a0730 Author: Chris Wilson Date: Mon Jan 20 13:29:22 2014 +0000 intel-virtual-output: Tidy some DBG for copying new modes Signed-off-by: Chris Wilson commit 04ee452439d14e2f8941e989823cb81fb62858e7 Author: Chris Wilson Date: Mon Jan 20 12:19:25 2014 +0000 sna: Increase limit on number of possible outputs Signed-off-by: Chris Wilson commit 637e7c2186ccde65bed74dfd28f53a2a808e4101 Author: Chris Wilson Date: Mon Jan 20 12:33:19 2014 +0000 intel-virtual-output: Print error events for debugging Signed-off-by: Chris Wilson commit 92e9bf82b22ca59ac0009a6a4a641a1056c34bf4 Author: Chris Wilson Date: Mon Jan 20 12:25:34 2014 +0000 intel-virtual-output: Disable remote display if SetCrtcConfig fails Signed-off-by: Chris Wilson commit 3138d06893b3380473cfab60ee19e80cb3b61192 Author: Chris Wilson Date: Mon Jan 20 10:38:23 2014 +0000 intel-virtual-output: Clone modes onto remote display If the user adds a mode to the VIRTUAL display and then attempts to use it, add that mode to the remote display. Reported-by: Christoph Bessei Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73816 Signed-off-by: Chris Wilson commit de0797edac67e00b720dcc99d70b8e0f033a90b1 Author: Chris Wilson Date: Mon Jan 20 09:32:50 2014 +0000 sna: Yield the processor if the kernel reports EAGAIN An artifact of our kernel/userspace interaction is that under certain circumstances the kernel will report EAGAIN in order for it to have CPU time to run its own workqueues before it can process the userspace request. We can be cooperative and yield ourselves rather than busy-spin waiting for the scheduler to demote us. Signed-off-by: Chris Wilson commit 50a45a1cdd4d8319ba9358974d241069689591c5 Author: Chris Wilson Date: Sun Jan 19 15:59:42 2014 +0000 sna: Use device minor to narrow search for debugfs files Also vital in case we ever have two Intel GPUs! Signed-off-by: Chris Wilson commit d41bbfc97c46b01227f193d7e938390691a8b581 Author: Chris Wilson Date: Sun Jan 19 15:18:44 2014 +0000 sna: Always emit an error message when an execbuffer fails So that we are not left with a puzzled user with a mysteriously slow machine. Signed-off-by: Chris Wilson commit d7f753ba89c928f141f1feb750733f53130c3bfb Author: Chris Wilson Date: Sun Jan 19 12:52:20 2014 +0000 sna: Discard pending wait_for_shadow updates before the TearFree flip Rather than just assert that we have used the pending update in wait_for_shadow, discard it first. Reported-by: Joe Peterson References: https://bugs.freedesktop.org/show_bug.cgi?id=70905 Signed-off-by: Chris Wilson commit 498fcb001358af8f15bd129f8d1edf2530edf412 Author: Chris Wilson Date: Sat Jan 18 22:38:40 2014 +0000 sna: Refactor common routines for debugfs file dumping Signed-off-by: Chris Wilson commit b68c35a11da849a2680ba77bf565038fd8f30dd0 Author: Chris Wilson Date: Sat Jan 18 22:21:35 2014 +0000 sna: Fix typo in debugfs paths Signed-off-by: Chris Wilson commit 9342bc3dfd64b338c0802793f311574323067652 Author: Chris Wilson Date: Sat Jan 18 21:38:59 2014 +0000 sna: Dump fence registers upon starvation References: https://bugs.freedesktop.org/show_bug.cgi?id=73696 Signed-off-by: Chris Wilson commit 35ea7b2dd5904d5d8f7c355368c82bb12f1b83a0 Author: Chris Wilson Date: Fri Jan 17 12:55:33 2014 +0000 intel: Silence a compiler warning (-Wshadow) intel_device.c: In function 'intel_entity_get_devid': intel_device.c:82:32: warning: declaration of 'index' shadows a global declaration [-Wshadow] Signed-off-by: Chris Wilson commit f23ab963c4f4ada2051588dfc85264aa2798dbf7 Author: Rinat Date: Fri Jan 17 10:47:44 2014 +0000 Provide DRI2DriverVDPAU for future compatibility Since 2010, DRI2 supports multiple driver names. That was added to ease selection of appropriate driver by libvdpau. As for today, intel driver support only DRI2DriverDRI (== 0), but not DRI2DriverVDPAU (== 1). Although there is no any hardware-specific VDPAU driver for intel video adapters at the moment, it would be easier to use generic drivers like libvdpau-va-gl by creating symlink named libvdpau_i965.so.1. That way appropriate driver will be selected in run time automatically: libvdpau_i965.so.1 on i965 equipped machines, and libvdpau_nvidia.so.1 on nvidia equipped ones. [ickle: Whilst I think this is a workaround for a brainfart in libvdpau that it defaults to libvdpau_nvidia.so rather than first to libdvpau_${DRI2DriverDRI} and then to a hardcoded libvdpau_backend.so, I have no better solution, and this does seem in accordance with the spec.] Signed-off-by: Rinat Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73507 commit 5f3ee21a307a4ff4db189bd53e58a70ec01ee6bc Author: Chris Wilson Date: Fri Jan 17 08:40:34 2014 +0000 sna: Nullify pixmap->devPrivate.ptr after promoting CPU bo to GPU When we convert a CPU bo into a GPU bo, we need to remove any dangling shadow pointers we use for devPrivate.ptr. Whilst the bo remains alive these are incoherent, but if we ever replace the GPU bo (for example to change tiling for DRI2) then the dangling pointer becomes invalid and will explode on next use. Reported-by: Mike Aury Reported-by: Marti Raudsepp Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73351 Signed-off-by: Chris Wilson commit 34192006c65640327bc81e2765f5ef5db3c539e3 Author: Chris Wilson Date: Fri Jan 17 09:02:55 2014 +0000 sna: Intensify the move-to-cpu pointer paranoia Rather than just state that the final pixmap->devPrivate.ptr is non-NULL, we can assert that it matches the shadow value. Signed-off-by: Chris Wilson commit cea442c0d0d7f1ef95d9d8048668eecbdcbc9a4e Author: Chris Wilson Date: Thu Jan 16 22:37:41 2014 +0000 sna: Cull the DBG spew to stderr Reduce the logging verbosity of DBG so that it only appears in the logfile by default - makes debugging much more pleasant. Signed-off-by: Chris Wilson commit 6db99169a99393a8a669f89682bb8df13a7c5677 Author: Chris Wilson Date: Thu Jan 16 11:20:30 2014 +0000 sna: Regularly check that the devPrivate.ptr is valid Signed-off-by: Chris Wilson commit 242d7503ddd98c59feda4bcc25e70cac06d3325e Author: Chris Wilson Date: Thu Jan 16 11:08:05 2014 +0000 sna: Avoid allocating temporary storage for TearFree rotations Signed-off-by: Chris Wilson commit 587452a6ad7ac57e37820c72220c4944451315a8 Author: Chris Wilson Date: Thu Jan 16 10:27:50 2014 +0000 sna: Make the temporary upload pixmap as having a statically allocated pointer Signed-off-by: Chris Wilson commit 40beee995e71b1fa4cd146a986f53e03595a4378 Author: Chris Wilson Date: Wed Jan 15 10:07:32 2014 +0000 sna: Add some more paranoia around dangling pointers References: https://bugs.freedesktop.org/show_bug.cgi?id=73351 Signed-off-by: Chris Wilson commit 9a0a1329391cc7d3047fea4b3d968afc7c6099b4 Author: Chris Wilson Date: Fri Jan 10 21:08:28 2014 +0000 sna: Handle release of active stolen scanouts If the scanout is still active we want to defer our release until the request is retired. Signed-off-by: Chris Wilson commit b351f4a0009ce0eddb5866bd49ac59860a44f522 Author: Chris Wilson Date: Fri Jan 10 12:01:29 2014 +0000 sna/dri: Handle TearFree vblanks whilst the pipe is off As an extra complication for handling TearFree is that if we attempt to requeue a swap whilst the pipe is off, that fails. As we have recursed from the pixmap migration path, we have to abort the blit but still send the event back to the client so that they unblock. Reported-by: Harald Judt Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73469 Signed-off-by: Chris Wilson commit b1694c8ea5c0f2ce1ded2ab25aecfde80da16346 Author: Chris Wilson Date: Thu Jan 9 15:53:42 2014 +0000 sna: Include the deferred hotplug uevent propagation in DBG Signed-off-by: Chris Wilson commit bfabdb7ebf5e491da1e74f8b362f9c2f0b6f1ac5 Author: Chris Wilson Date: Thu Jan 9 12:34:58 2014 +0000 sna: Add regular refcnt checks on pixmap bo References: https://bugs.freedesktop.org/show_bug.cgi?id=73406 Signed-off-by: Chris Wilson commit a2fc9e5f86096dbc2461eaf7e5ad5cf071f8d472 Author: Chris Wilson Date: Wed Jan 8 11:08:47 2014 +0000 Revert "sna: Remove spurious SAMPLER writemask for gen4" This reverts commit 4966f8374a068ca2a533e30594bfd333551ffd37. Not so spurious after all! Reported-by: Michal Suchanek Signed-off-by: Chris Wilson commit b858c28d04dfd353a99f9d15c39599adbf5cb25f Author: Chris Wilson Date: Tue Jan 7 14:42:41 2014 +0000 sna/gen4: Tidy URB_FENCE command Signed-off-by: Chris Wilson commit b7565a26401e283df94b68019e8093f8104428f4 Author: Chris Wilson Date: Tue Jan 7 14:05:09 2014 +0000 sna/gen4: Use PIPE_CONTROL for a smaller hammer Using MI_FLUSH to break up primitive is overkill when a top-of-pipe PIPE_CONTROL will suffice. Signed-off-by: Chris Wilson commit 9d8473c5d9489db439aca73f470bda29a22ebab6 Author: Chris Wilson Date: Tue Jan 7 13:43:35 2014 +0000 sna/gen4: Check for available batch space before restoring state after CA pass Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73348 References: https://bugs.freedesktop.org/show_bug.cgi?id=55500 Signed-off-by: Chris Wilson commit 3b177a5e972a8eed63f99b0cd7b048a1229683f5 Author: Chris Wilson Date: Wed Nov 20 14:22:05 2013 +0000 sna/gen4: Reduce flushes between primitive continuations Signed-off-by: Chris Wilson commit 4966f8374a068ca2a533e30594bfd333551ffd37 Author: Chris Wilson Date: Wed Nov 20 14:20:54 2013 +0000 sna: Remove spurious SAMPLER writemask for gen4 Signed-off-by: Chris Wilson commit 82fa7ec352426c7e3d5210aac8ea1030232cc0f3 Author: Chris Wilson Date: Mon Jan 6 14:30:56 2014 +0000 uxa: Always treat DPMSModeSuspend/Standby similar to DPMSModeOff As we assume that Suspend, Standby alias to Off and disable the crtc when switching to any mode other than On, we need to also perform the backlight updates for Suspend,Standby prior to passing the DPMS value onto the kernel. Suggested-by: Alexander Monakov Signed-off-by: Chris Wilson commit 28a057105b6974803aee0d68c2a71f322095dfde Author: Chris Wilson Date: Mon Jan 6 14:37:09 2014 +0000 uxa: Disable updating properties upon reading their values Backport commit e76b08cad2770015346fd4cd757de3bb3b6ff37c Author: Chris Wilson Date: Tue Oct 15 12:46:09 2013 +0100 sna: Disable updating properties upon reading their values in order to prevent random screen blanking upon return from DPMS. Reported-by: Alexander Monakov Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73181 Signed-off-by: Chris Wilson commit 0138b38dfcd933d080f86cfd33664eeb3f5558a0 Author: Chris Wilson Date: Mon Jan 6 14:30:56 2014 +0000 sna: Always treat DPMSModeSuspend/Standby similar to DPMSModeOff As we assume that Suspend, Standby alias to Off and disable the crtc when switching to any mode other than On, we need to also perform the backlight updates for Suspend,Standby prior to passing the DPMS value onto the kernel. Suggested-by: Alexander Monakov Signed-off-by: Chris Wilson commit 28810d5b367942c96acbc696f27105259422a0d1 Author: Chris Wilson Date: Mon Jan 6 14:26:38 2014 +0000 uxa/dri: Pixmap are offscreen and not attached to any display As the code current assumes that pixmaps are located at screen origin (0,0), it assumes that they are all on the first CRTC. However, since they are offscreen, this leads to such complications as attempting to emit vsync swapbuffers, and even worse attempting to swap a GLXPixmap onto the scanout following a DRI2SwapBuffers. Reported-by: Alexander Monakov Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73282 Signed-off-by: Chris Wilson commit 4d8f78bc95f8dd36693f74365dbc3c442fbbf8a9 Author: Chris Wilson Date: Thu Jan 2 15:01:38 2014 +0000 sna/gen7+: Emit invalidate between operations if rendering to source/mask Fixes regression from commit c79cb18407273dc7798618390bd0b7d69b0f80d6 [2.99.907] Author: Chris Wilson Date: Wed Nov 20 11:17:20 2013 +0000 sna/gen7: Try to reduce flushes between primitive continuations Reported-by: Simon Munton Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73208 Signed-off-by: Chris Wilson commit c4b88d602640b3e2e46c61928ab194dc9f6b390d Author: Chris Wilson Date: Wed Dec 18 10:33:52 2013 +0000 2.99.907 snapshot commit 9289e2c56b7f0cc78c5123691ad96611f0e04bed Author: Chris Wilson Date: Mon Dec 16 11:39:20 2013 +0000 sna/gen4: Sacrifice performance to workaround render corruption The long running saga of trying to find an acceptable workaround for the gen4 rendering corruption (seems to be a read-write hazard failure inside the gpu) is failing, the only w/a found so far is to send a single rectangle through the GPU at a time. Signed-off-by: Chris Wilson commit 660fbdac8da1f43749007f126201681023a677e1 Author: Chris Wilson Date: Sun Dec 15 10:41:22 2013 +0000 sna: Remove stale assertion Now that we do not remove the move-to-gpu for a plain read from the TearFree buffer, it is viable to use that buffer as source for cloning. So we need to kill the stale assertion. Signed-off-by: Chris Wilson commit 989198f3ddc763000702bd1eaeb54002e18a8f04 Author: Chris Wilson Date: Sun Dec 15 09:45:24 2013 +0000 intel-virtual-output: Disable build if timerfd is not present Otherwise the build breaks on *BSD. Reported-by: Yuta SATOH Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72707 Signed-off-by: Chris Wilson commit c8e339edd31859820907115c8d618b0fec3ef227 Author: Chris Wilson Date: Sun Dec 15 09:39:54 2013 +0000 sna: Avoid recursive out-of-order operations in the middle of TearFree During TearFree, if we have to wait for the shadow flip to complete, we run the event handler for the device. This can then cause us to evaluate pending completed vblank events, which may in turn then attempt to use the shadow bo and recurse into the TearFree handler. Try to prevent this and requeue the vblank event. Reported-by: Pascal de Bruijn Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72690 Signed-off-by: Chris Wilson commit f350a1369b3bd39ba0db8639f036864fe5df2f98 Author: Chris Wilson Date: Thu Dec 12 16:49:02 2013 +0000 sna/gen4+: Drop new assertion that we only finish a vbo after use in this batch A full vbo might not be discarded and so upon first use in the following batch we decided to finish the old vbo and allocate a new. This can happen before we even emit any relocations and so the assert is bogus. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit 7c62925ba7f18f55ee34b946bddba84a07b83985 Author: Chris Wilson Date: Wed Dec 11 21:30:06 2013 +0000 sna: Remove unused variable sna_display.c: In function 'sna_crtc_redisplay__fallback': sna_display.c:4104:19: warning: unused variable 'sna_crtc' [-Wunused-variable] struct sna_crtc *sna_crtc = to_sna_crtc(crtc); Signed-off-by: Chris Wilson commit 7e76f21a4d9d8f5424c257e6e7686d5bb0bb6cf7 Author: Chris Wilson Date: Mon Jul 22 18:56:03 2013 +0100 intel: Recognise gen8 Assign gen=8 to the Broadwell PCI IDs, no marketing names are known at this point in time. Signed-off-by: Chris Wilson commit f7d1c2b8d1883280e7916bb4473ff6436b186950 Author: Chris Wilson Date: Tue Jul 23 08:17:58 2013 +0100 sna: Enable scanline waits for Broadwell Broadwell uses the same mechanism as Haswell for vsync. Signed-off-by: Chris Wilson commit e017542d10e875260e3eef1b0369f4ea106df0f5 Author: Chris Wilson Date: Thu Dec 6 22:11:32 2012 +0000 sna/gen8: Initial backend for Broadwell Should match the functionality of the earlier generations, but untuned. Signed-off-by: Chris Wilson commit 610af0c70e755062b36ba9756fbc4288518b7c35 Author: Chris Wilson Date: Wed Nov 13 11:50:52 2013 +0000 Update i915_pciids.h Pulling in changes from: kernel commit 4d4dead67a4ab1d5de393f15ed5e4e2aa63d3bcf Author: Ben Widawsky Date: Sun Nov 3 16:47:33 2013 -0800 drm/i915/bdw: Add device IDs Signed-off-by: Chris Wilson commit 628b68f3a07ee619642521e0992eee81b9edd76f Author: Chris Wilson Date: Tue Dec 10 10:25:56 2013 +0000 sna/gen2,3: Replace stale bo replacement with simple asserts The surface creation routines should ensure that the minimum pitch alignments are met. However, when rendering to a CPU bo, the pitch is not under our control so we need to be more careful. Signed-off-by: Chris Wilson commit 6c91ec29807e96682c2e752744b60c06bf3f02d9 Author: Chris Wilson Date: Tue Dec 10 12:37:44 2013 +0000 sna: Set minimum pitch alignment to 8 bytes This prevents render corruption on gen3 and should not adversely affect BLT pitch requirements or other GPUs. Signed-off-by: Chris Wilson commit ade25f4f95994b565a8ed8eb3811ff7453a8b0e5 Author: Chris Wilson Date: Mon Dec 9 10:49:56 2013 +0000 sna: Only discard READ hint for TearFree copy iff it subsumes the pixmap Remembering that the target window may be smaller than its backing pixmap. Reported-by: Andreas Klauer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72430 Signed-off-by: Chris Wilson commit a66db75bf370549f438796433f3e3fb5f7f0b2a3 Author: Chris Wilson Date: Mon Dec 9 10:32:05 2013 +0000 sna: Fallback gracefully when redisplaying after a GPU hang Signed-off-by: Chris Wilson commit cf89fb8b731dd541bde16277c52264ba1e150424 Author: Chris Wilson Date: Sun Dec 8 16:35:27 2013 +0000 sna: Simplify kgem_bo_can_map() Remove the attempt to trick us into mapping large bo. Signed-off-by: Chris Wilson commit 46256fa5a0ca4230ae7c226781c78c525e2648c6 Author: Chris Wilson Date: Thu Dec 5 16:12:22 2013 +0000 sna: Pass MOVE_READ for partial TearFree move-to-gpu When fixing up a pending shadow pageflip for TearFree, we must tell it that it needs to flush the damage for a partial move-to-gpu. Even though the current area does not read from the destination, the move-to-gpu callback is a global pass, and we need to assume the worst for the region outside of the target. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72343 Signed-off-by: Chris Wilson commit 693c1343ed29d8779ce3ad5c0e80fbe6d7d0689f Author: Chris Wilson Date: Thu Dec 5 11:09:39 2013 +0000 sna: OsRegisterSigWrapper was only introduced in 1.6.99.900 Signed-off-by: Chris Wilson commit ba9a173d81514152cd1dac4f1df765be11a478ea Author: Chris Wilson Date: Thu Dec 5 11:06:59 2013 +0000 configure: Correct closing ']' Too many closed, too few opened. Signed-off-by: Chris Wilson commit 845b03ac110c22cff8b2653e76f6d974a628b776 Author: Chris Wilson Date: Thu Dec 5 11:00:44 2013 +0000 sna: Compilation fixes for squeeze Older version of glibc and valgrind require a slight massage. Signed-off-by: Chris Wilson commit bd22abee8f33b20ff6bc7297b0a9ae8708d18727 Author: Chris Wilson Date: Thu Nov 7 22:27:50 2013 +0000 sna: Update Baytrail VSync logic My current best guess at the glaring hole in the spec that is synchronisation to vertical refresh. Note that this leaves VSync disabled for BYT for now as it is ineffective - but at least it now doesn't hang! Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69869 Signed-off-by: Chris Wilson commit 6c37ab3ddc5910fdf4ed663a8dc620edc9fec931 Author: Chris Wilson Date: Wed Dec 4 11:55:54 2013 +0000 sna: Print detected GPU first This should make the GPU identification easier to find in future. Signed-off-by: Chris Wilson commit 255025d8d342610ddc75f510ea795bf8785f1578 Author: Chris Wilson Date: Wed Dec 4 11:06:08 2013 +0000 intel: Tidy up driver identification string Split the identification strings between the older integrated graphic chipsets and the more recent integrated processor graphics. This helps to emphasis the recent branding and should reduce confusion about which processors are supported by the driver. Signed-off-by: Chris Wilson commit 23f8802857d64212dc8df39da2c1f6f362f9d053 Author: Chris Wilson Date: Tue Dec 3 15:06:10 2013 +0000 sna/dri: Always clear the clear hint after pageflipping commit 3fd116782bb1c05a140f4783e92a8ee6a57143cd Author: Chris Wilson Date: Mon Sep 23 21:03:07 2013 +0100 sna/dri: Clear the clear hint upon applying DRI damage missed the short-circuit path for an already all-damaged pixmap - which is quite common for the clear pixmaps... Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72194 Signed-off-by: Chris Wilson commit 0420adfb9d92b691aabef4e0ccba3782417b4bf0 Author: Chris Wilson Date: Tue Dec 3 12:10:23 2013 +0000 sna/gen2,3: Unmap the old GPU bo when replacing due to render target constaints Signed-off-by: Chris Wilson commit 3dbf17f00e200e864818b0b8ca762183cff9085f Author: Chris Wilson Date: Tue Dec 3 12:10:01 2013 +0000 sna: Mark up an ordinary pixmap for reuse Signed-off-by: Chris Wilson commit 5a353ed151d175a757af6f8d5216bf2370dd3917 Author: Chris Wilson Date: Tue Dec 3 11:14:53 2013 +0000 sna: More assertions around tracking mapped state Signed-off-by: Chris Wilson commit 4274110b78f8962b921f773e67c981b033c3f664 Author: Chris Wilson Date: Tue Dec 3 11:03:39 2013 +0000 sna: Clear the clear hint after performing a userptr upload Signed-off-by: Chris Wilson commit 33f3ddd73da5f553accf78ce7e03a76b12f71393 Author: Chris Wilson Date: Tue Dec 3 09:37:37 2013 +0000 sna: Include Pineview in fence over-allocation checks When creating the object, we need to take account that fenced regions in the aperture are in power-of-two sizes and so can be much larger than the actual object. This includes Pineview, which although is more relaxed with regards to fence alignment of GPU operations, still imposes the same restrictions on the fence registers. Signed-off-by: Chris Wilson commit 9a8478dae681212bd7a86640f90e6d47c9393b1a Author: Chris Wilson Date: Mon Dec 2 15:48:50 2013 +0000 sna: Fix stipple offset for drawing into child windows Signed-off-by: Chris Wilson commit 32b942d0ff4f1d389ac643bfe6b18029d266dc13 Author: Chris Wilson Date: Mon Dec 2 10:43:51 2013 +0000 tests: Exercise stippled fills Signed-off-by: Chris Wilson commit 463ab7f4faf46f6530423b6b10f2cd1bb6d0aa83 Author: Chris Wilson Date: Mon Dec 2 11:08:05 2013 +0000 sna: Fix tile origin for pattern blits References: https://bugs.freedesktop.org/show_bug.cgi?id=71260 Signed-off-by: Chris Wilson commit 6889ba38ab2bb050dec3057dbc584619dbe6d2e2 Author: Chris Wilson Date: Mon Dec 2 14:20:51 2013 +0000 sna: Drop forced alignment to 64 on pre-gen4 devices Some linear GPU bo that we create must be naturally aligned, and the extra alignment imposed for pure paranoia is counter productive. Signed-off-by: Chris Wilson commit 49af22ee5533b1afbf30f50fcfd7245f1c8d98bc Author: Chris Wilson Date: Mon Dec 2 10:43:51 2013 +0000 tests: Exercise tiled fills Signed-off-by: Chris Wilson commit 3dae8b97151f1d08942ec690dac5a5008901d7d0 Author: Chris Wilson Date: Fri Nov 29 14:46:54 2013 +0000 sna: Dump GTT info if we fail to execute a batch due to ENOSPC Signed-off-by: Chris Wilson commit 2497fc332eafe31a0156ac5f66ec98f77ce0f647 Author: Chris Wilson Date: Thu Nov 28 22:03:39 2013 +0000 sna: Fix typo inside DBG message Signed-off-by: Chris Wilson commit fd007d9d465b9b3ddbbaf769931ec921a6f5ecb8 Author: Chris Wilson Date: Thu Nov 28 21:13:33 2013 +0000 sna/video: Correct handling of cropped images along packed fast path In particular, it was offseting the read from the source image, but not correcting the length to read - causing a read from beyond the end of the source and a segfault. Reported-by: Jan Engelhardt Signed-off-by: Chris Wilson commit b85051ae480499dd8a6a6d07d5ce0feca7b844b4 Author: Chris Wilson Date: Thu Nov 28 16:25:52 2013 +0000 sna: Fallback from partial to full move-to-cpu Signed-off-by: Chris Wilson commit faedf266d7b476954574db2cb1274e677cf42bf4 Author: Chris Wilson Date: Thu Nov 28 14:12:56 2013 +0000 sna: Tidy up an assertion on an uninitialised variable Signed-off-by: Chris Wilson commit 1e382c6ece84f3040b21980a303fe00be667c4e2 Author: Chris Wilson Date: Thu Nov 28 14:02:18 2013 +0000 sna: Harden GetImage for use with very large buffers That risk causing SIGBUS due to oom. Signed-off-by: Chris Wilson commit 569b06abeae9b3dcaa611facdd3ec30c67de765b Author: Chris Wilson Date: Thu Nov 28 13:14:27 2013 +0000 sna: Wrap glyph composition with sigtrap handling Signed-off-by: Chris Wilson commit 974abd0c3acca7d3b782251d562bf00fd34b395d Author: Chris Wilson Date: Thu Nov 28 13:03:54 2013 +0000 sna: Prefer using userptr for PutImage into large GPU bo Signed-off-by: Chris Wilson commit 64f1fbb465bdd092c4ea4aafe10382ebe7b84ecb Author: Chris Wilson Date: Thu Nov 28 13:03:29 2013 +0000 sna: Tidy a split conditional in an picture upload Signed-off-by: Chris Wilson commit 1200aae4815cdbc6a4f242c264b2736e6fe0fa12 Author: Chris Wilson Date: Thu Nov 28 13:03:06 2013 +0000 sna: Wrap image upload with sigtrap Signed-off-by: Chris Wilson commit 0fb7c366a58ec9b9cdc0b330e53716ab04b24c96 Author: Chris Wilson Date: Wed Nov 27 22:06:27 2013 +0000 sna: Add a few more refcnt asserts Signed-off-by: Chris Wilson commit d65b57cd332ca4435867afa31b6da85481635d52 Author: Chris Wilson Date: Wed Nov 27 12:59:25 2013 +0000 intel-virtual-output: Trim remote framebuffer to fit Signed-off-by: Chris Wilson commit dd7c556072978822c1110346354acfa3362b012e Author: Chris Wilson Date: Wed Nov 27 12:57:09 2013 +0000 intel-virtual-output: Workaround mutter always using the same timestamp Signed-off-by: Chris Wilson commit 1085e6c93288de2275791ce9c585142870dc0877 Author: Chris Wilson Date: Tue Nov 26 16:13:23 2013 +0000 sna: Update connector-type-to-string mapping Add in a couple of newcomers to the connector type and make it easier to track updates in future. Signed-off-by: Chris Wilson commit 80d1dee70ba3bdf38e0dd68a39380f4f3d9f22b5 Author: Kirill Müller Date: Tue Nov 26 11:36:54 2013 +0100 intel-virtual-output: mute spurious warnings Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=72027 commit 36ac68bedd3b30d7bdf0f40b438b45a7c4dec9e5 Author: Chris Wilson Date: Tue Nov 26 09:41:42 2013 +0000 intel-virtual-output: Clone remote EDID for virtual outputs References: https://bugs.freedesktop.org/show_bug.cgi?id=72020 Signed-off-by: Chris Wilson commit 63a964d6d0cb0e4ffce70d8e1b672dd65fae6703 Author: Chris Wilson Date: Tue Nov 26 08:52:39 2013 +0000 intel-virtual-output: Correct clip region of rotated outputs in source framebuffer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71846 Signed-off-by: Chris Wilson commit 13f3b24babba61e4d8b10661accc032169f04645 Author: Chris Wilson Date: Mon Nov 25 18:56:49 2013 +0000 sna: Correct plurization of axis for modesetting log message Signed-off-by: Chris Wilson commit 5580df729f4d3b2498a6dae19dac938f06bf602d Author: Chris Wilson Date: Mon Nov 25 16:55:47 2013 +0000 intel-virtual-output: Include transforms when computing required fb size Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71846 Signed-off-by: Chris Wilson commit ded23af3cdf68ab94446b8774d6bc4d52b21907a Author: Chris Wilson Date: Mon Nov 25 16:49:58 2013 +0000 sna: Include reflections when logging mode changes Signed-off-by: Chris Wilson commit 5fa1b0a2c5e5d3e7f25bca5b79925a956253a24f Author: Chris Wilson Date: Mon Nov 25 16:13:45 2013 +0000 intel-virtual-output: Tweak DBG messages for copying rotation Signed-off-by: Chris Wilson commit 98efd7f5d94586f8d7c5b2e9c5515f4b37149b08 Author: Chris Wilson Date: Mon Nov 25 15:33:13 2013 +0000 sna: Log mode switches on virtual outputs Signed-off-by: Chris Wilson commit 42f325a87c336211ebb3ebcafc9130eff10cee93 Author: Chris Wilson Date: Mon Nov 25 11:14:15 2013 +0000 sna: Keep @NOWARNFLAGS@ last As the last option overrides the earlier options, make sure these particular overrides always take effect by adding them last. Signed-off-by: Chris Wilson commit 4c4458e8a30920d065ca5db5d3ca3cc49454b869 Author: Chris Wilson Date: Mon Nov 25 10:01:00 2013 +0000 sna/trapezoids: trapezoids_bounds() reports not-empty, so use it Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit af4995d74bd3ee3ed8f17c7c04c8d3acaaecebc6 Author: Zdenek Kabelac Date: Mon Nov 25 09:57:19 2013 +0000 sna: Handle failure to disable old plane when switching CRTCs If we fail to disable the old plane, abort the PutImage and report the error. Signed-off-by: Zdenek Kabelac commit 00dcb4f22942b2d40253a7b43105e73e260216cf Author: Zdenek Kabelac Date: Mon Nov 25 09:09:35 2013 +0100 uxa: fix order of inline Bool Signed-off-by: Zdenek Kabelac commit 175b8711f8c90e7977aec5564f5c29588fa14469 Author: Zdenek Kabelac Date: Mon Nov 25 09:09:34 2013 +0100 uxa,legacy: use unsigned for comparition of unsigned Signed-off-by: Zdenek Kabelac commit 7b235c92bbc6c7306ffef8caac5f07448c78d956 Author: Zdenek Kabelac Date: Mon Nov 25 09:09:32 2013 +0100 sna: Add missing va_end Put va_end() into error paths Signed-off-by: Zdenek Kabelac commit 318f100d7337955c099fecb86d206c406779fafe Author: Zdenek Kabelac Date: Mon Nov 25 09:09:31 2013 +0100 uxa: Avoid relying on an assert and cleanup iterator Signed-off-by: Zdenek Kabelac commit a110637ef2a37505ee68447cf66763af4cabfc00 Author: Zdenek Kabelac Date: Mon Nov 25 09:09:30 2013 +0100 Fix indentation for incorrectly shifted statements Signed-off-by: Zdenek Kabelac commit b419691e277af0881baa7daac17af424dc1337b1 Author: Zdenek Kabelac Date: Mon Nov 25 09:09:29 2013 +0100 uxa: rename some local variable to not shadow global ones Signed-off-by: Zdenek Kabelac commit 6f066b6714df850c5ea42dbde2296803c5b06da0 Author: Zdenek Kabelac Date: Mon Nov 25 09:09:28 2013 +0100 uxa: Ensure mask_picture is defined Signed-off-by: Zdenek Kabelac commit ea18b7780e7d0d7fcd36b656a4fd974fb9d7137d Author: Zdenek Kabelac Date: Mon Nov 25 09:09:27 2013 +0100 Cast to use unsigned math Signed-off-by: Zdenek Kabelac commit 34057611c67b751c43d6bd70a7d5993708262cd2 Author: Chris Wilson Date: Mon Nov 25 09:36:32 2013 +0000 Correct type of uevent_handler xf86AddGeneralHandler returns an opaque pointer, not a function pointer. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit d2df10e28fa35d29b539dc52c61f710910b75831 Author: Zdenek Kabelac Date: Mon Nov 25 09:09:25 2013 +0100 Remove uneeded headers Signed-off-by: Zdenek Kabelac commit 41be7e9d490633a65aa1e0c9f76acfb67869288f Author: Zdenek Kabelac Date: Mon Nov 25 09:09:24 2013 +0100 config apostrophe Signed-off-by: Zdenek Kabelac commit 2275ef581ee1a1c45a45df40f952779f62fb53ed Author: Zdenek Kabelac Date: Mon Nov 25 09:09:20 2013 +0100 Makefile convert @var@ to $(var) Avoid using @var@ since this could not be easily overwritten through 'make var=xxx' option which is normally available. For Makefile.am users should avoid using @var@. Signed-off-by: Zdenek Kabelac commit 12e974c7bc8c85dbccd3d9ef91c1315e85bbeb6c Author: Chris Wilson Date: Fri Nov 22 17:37:57 2013 +0000 Revert "intel-virtual-output: Only track the most recent visibility status of the cursor" This reverts commit abf1a16914d993cc150005879375d4bb17fdccf3. We need to track visibility over all clones on a display, not just the last. Regression from commit abf1a16914d993cc150005879375d4bb17fdccf3 [2.99.906] Author: Chris Wilson Date: Fri Nov 8 17:09:35 2013 +0000 intel-virtual-output: Only track the most recent visibility status of the curso Reported-by: Kirill Müller Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71838 Signed-off-by: Chris Wilson commit 0ee29c4ea3b05e9361635a2ef6e7b92c160d68cf Author: Chris Wilson Date: Fri Nov 22 13:34:35 2013 +0000 uxa,sna: Prevent bo exchange when pinned for non-DRI2 clients With the advent of DRI3 (and previously with Prime and Glamor) we have external clients who rely on the pixmap<->bo mapping being invariant. Signed-off-by: Chris Wilson commit f0021ab2a66fb7c84758ad482f47f023b862360b Author: Chris Wilson Date: Fri Nov 22 12:07:06 2013 +0000 sna: Tidy up fallback from render composite to blt composite Signed-off-by: Chris Wilson commit 38ef572d68380db407039fe12d62426939030010 Author: Chris Wilson Date: Thu Nov 21 21:52:46 2013 +0000 sna: XY_SETUP_* expects the dst tiling to be set on gen4+ A few paths failed to set the tiling flag when setting up the BLT engine, leaving the engine in a potentially inconsistent state. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71260 Signed-off-by: Chris Wilson commit dee2db883954d9ce3560b81f84d5c805edfd3977 Author: Chris Wilson Date: Thu Nov 21 14:48:23 2013 +0000 sna: Fix typo in sna_blt_fill_begin() Reported-by: intelgraphics7@gmx-topmail.de Signed-off-by: Chris Wilson commit 7d9edc9a717cfc6fbdbe468f7e32a68ac674a207 Author: Chris Wilson Date: Wed Nov 20 18:50:40 2013 +0000 sna: Set supported rotations on virtual outputs As the virtual outputs are created later, they do not get automatically populated with RR properties and we must do that instantiation ourselves. Reported-by: Kirill Müller Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71846 Signed-off-by: Chris Wilson commit c79cb18407273dc7798618390bd0b7d69b0f80d6 Author: Chris Wilson Date: Wed Nov 20 11:17:20 2013 +0000 sna/gen7: Try to reduce flushes between primitive continuations Signed-off-by: Chris Wilson commit b14228fafb654fe7d8f8783475aa0c0ba87e4fea Author: Chris Wilson Date: Tue Nov 19 12:15:24 2013 +0000 intel-virtual-output: Check for failure to create a clone Signed-off-by: Chris Wilson commit 9e6979b67afdd8122a29135d752c6ea84e9af6dc Author: Chris Wilson Date: Tue Nov 19 12:13:26 2013 +0000 intel-virtual-output: Fix trivial and unlikely fd leak from bumblebee failure Signed-off-by: Chris Wilson commit 9ed5f83fe7ec71faf40147271aef1cf4a5a38329 Author: Chris Wilson Date: Tue Nov 19 12:09:35 2013 +0000 sna: Fix use before assignment mono.sna was being used the line before it was assigned. Signed-off-by: Chris Wilson commit a9d6f897e6d6dc388de24f7b49ba79bf1f6125c3 Author: Chris Wilson Date: Tue Nov 19 12:03:33 2013 +0000 sna: Free composite boxes in the unlikely all-invalid path Signed-off-by: Chris Wilson commit 0782d4e57e4ba33aee30925ad276ee4a1ec15feb Author: Chris Wilson Date: Tue Nov 19 12:01:33 2013 +0000 sna: Correct check for overwriting last BLT fill Typo crept in from the reloc rework. Signed-off-by: Chris Wilson commit 31f559820dbde1a028a76b9eeaeb1848aec3cc2b Author: Chris Wilson Date: Tue Nov 19 12:00:08 2013 +0000 sna/gen4+: Clear redirect bo before falling back to BLT paths Just in case we later try to take action on the already freed redirection. Signed-off-by: Chris Wilson commit bb3ea102ca6b8aa843a10607fa140f5694cc4898 Author: Chris Wilson Date: Tue Nov 19 09:47:15 2013 +0000 test: Fix compilation of render-trapezoid-image Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71768 Signed-off-by: Chris Wilson commit 12f4c48d39b939a3a26a1504910b5f16ee6c86b8 Author: Chris Wilson Date: Mon Nov 18 16:59:08 2013 +0000 sna/gen7: Rework random GPU flushing There seems to be no clear rationale for these flushes. They have been empirically derived to pass test/render-copyarea and rendercheck, without impacting upon a few simple benchmarks. References: https://bugs.freedesktop.org/show_bug.cgi?id=68410 Signed-off-by: Chris Wilson commit 04e4bae02c409853c95f43ba4b2b69e50940ec72 Author: Chris Wilson Date: Mon Nov 18 14:16:07 2013 +0000 sna: Tell valgrind about the returned mode list Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 4194100691347ccec4b1863f3f62987d9286707b Author: Chris Wilson Date: Mon Nov 18 12:33:05 2013 +0000 sna: Process Damage relative to dst->pDrawable not its pixmap->drawable References: https://bugs.freedesktop.org/show_bug.cgi?id=32734 Signed-off-by: Chris Wilson commit e99e643ed1f2856109426f791a7615ee122d7c42 Author: Chris Wilson Date: Mon Nov 18 12:04:29 2013 +0000 tests: Avoid dependence on undefined C Right-shifting by a negative value is undefined. Signed-off-by: Chris Wilson commit b6924161108214b4e50c25f4168564ead4000430 Author: Chris Wilson Date: Mon Nov 18 11:58:43 2013 +0000 sna/damage: Tidy up a tail return Signed-off-by: Chris Wilson commit 52612185c60605542beb3745a2500ed65a8ffff0 Author: Chris Wilson Date: Fri Nov 15 21:20:30 2013 +0000 sna/damage: Guard against integer overflow before malloc Check that the multiplication to compute the allocation will not overflow. Signed-off-by: Chris Wilson commit 95c3892dd3911ba44ae3170573de1153857b15a8 Author: Chris Wilson Date: Fri Nov 15 11:55:51 2013 +0000 sna: Include valgrind leakchecks for --enable-debug=memory Signed-off-by: Chris Wilson commit 6e9a8c5ae2883ca21d117ac672dd8a55b3429dc1 Author: Chris Wilson Date: Thu Nov 14 16:14:09 2013 +0000 sna: Add the missing braces around the conditional block Fixes regression from commit f3225fcb38686f3b9701725bf3a11ecf1c100c3f Author: Chris Wilson Date: Tue Nov 5 08:38:22 2013 +0000 sna: Be move conservative with tiling sizes for older fenced gen Reported-by: Jay Little Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71605 Signed-off-by: Chris Wilson commit 23f47c8b4b4825b9219e1f515015635a7c48ec35 Author: Chris Wilson Date: Thu Nov 14 10:17:49 2013 +0000 tests: Exercise render copies under a mask Signed-off-by: Chris Wilson commit aa5a5684ebada60a1b103624a9b49aa085a406c1 Author: Chris Wilson Date: Wed Nov 13 16:25:54 2013 +0000 sna/gen6+: Only substitute SRC for CLEAR if using the correct source If the source has not been verified to be clear, then using the SRC operator will paint the wrong color. Signed-off-by: Chris Wilson commit 97e684ab3c887c1992733d0031f0256e9692d452 Author: Chris Wilson Date: Wed Nov 13 15:28:37 2013 +0000 sna/gen6+: Improve debug PREFER_RENDER to cover all decision points Signed-off-by: Chris Wilson commit 7358ba83a3d4ab37459b4e510704bd0be4438dcd Author: Chris Wilson Date: Wed Nov 13 15:27:05 2013 +0000 tests: Add render-composite-solid-mask Another reference test to exercise simple composite pathways clearly. Signed-off-by: Chris Wilson commit f08f9cb28efa1b82f196695c66c3ec3a2b63361c Author: Chris Wilson Date: Wed Nov 13 14:17:51 2013 +0000 sna: Eliminate a compiler warning for a shadowed variable sna_driver.c: In function 'sna_load_palette': sna_driver.c:86:12: warning: declaration of 'index' shadows a global declaration [-Wshadow] Signed-off-by: Chris Wilson commit 501dbf45cd85b0008e599637ad3ca76c044d39d5 Author: Chris Wilson Date: Wed Nov 13 14:17:51 2013 +0000 sna: Eliminate a compiler warning for a shadowed variable We don't strictly need that local structure, so do without and keep the compiler quiet. sna_driver.c: In function 'fb_supports_depth': sna_driver.c:414:23: warning: declaration of 'close' shadows a global declaration [-Wshadow] Signed-off-by: Chris Wilson commit 7468a6b740af14d95e8f9bacd2e352ec98a9acf2 Author: Chris Wilson Date: Tue Nov 12 14:43:28 2013 +0000 2.99.906 snapshot commit 220a8e8b1425d08af7ac104540be16611279e807 Author: Chris Wilson Date: Wed Nov 13 09:52:14 2013 +0000 Bump experimental ioctl command numbers In the meantime a new ioctl has snuck in. Signed-off-by: Chris Wilson commit 44c585a1d8c3b603a9c79bf7dfecf420575cfb61 Author: Chris Wilson Date: Tue Nov 12 18:59:54 2013 +0000 sna: Discard cached upload proxy when writing to the pixmap via the CPU Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 20e318c292a4e1336093dfbc77cb44d099c80050 Author: Chris Wilson Date: Sun Nov 10 10:28:01 2013 +0000 intel-virtual-output: Manually adjust screen size When we modify the outputs and end up with a different screen size, we need to actually tell the display to resize with an explicit XRRSetScreenSize. Reported-by: Jethro Beekman Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71441 Signed-off-by: Chris Wilson commit 04d2cad65dbb07a2f03835a71fb7f5efc0235ea6 Author: Chris Wilson Date: Tue Nov 12 14:36:38 2013 +0000 Add identification strings for new Atoms All of the new Atom (Baytrail) products ship with "HD Graphics". Signed-off-by: Chris Wilson commit a6bd3011710a3fd4cfe21a3d41a6ec9c929681bf Author: Chris Wilson Date: Tue Nov 12 13:15:25 2013 +0000 sna: Factor available memory into available aperture estimation Signed-off-by: Chris Wilson commit 4493fb8d21fa013a074f7de66387e92ef23d191a Author: Chris Wilson Date: Tue Nov 12 00:05:11 2013 +0000 sna: Apply drawable offset to glyph bbox prior to checking for clipping This is a correction to commit ec0866e86d365ae3fd9790b1b263d49fc4981220 Author: Chris Wilson Date: Wed Oct 16 22:39:54 2013 +0100 sna/glyphs: Fix computation of extents for long strings in order for us to correctly detect when we need to clip. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71191 Signed-off-by: Chris Wilson commit c489934ed732ed3d5a906939381c62a6bc1c38d5 Author: Chris Wilson Date: Mon Nov 11 14:56:22 2013 +0000 xvmc: Handle allocation failure around batch submission If we fail to allocate a new batch, just stall and reuse the old one rather than crashing. Signed-off-by: Chris Wilson commit 3e93449b5492a4fc09401c23f8754655b63959b5 Author: Chris Wilson Date: Mon Nov 11 13:15:07 2013 +0000 intel-virtual-output: Fix format specifiers for Visual DBG Signed-off-by: Chris Wilson commit 31b5ff5889593337bf504dafa116a428bf1ffe9c Author: Chris Wilson Date: Mon Nov 11 12:56:30 2013 +0000 intel-virtual-output: Fix cut'n'paste DBG error Signed-off-by: Chris Wilson commit 29fcc15efabb5b1f7e1e0211da9714cf9e3cbd1c Author: Chris Wilson Date: Mon Nov 11 11:44:17 2013 +0000 sna: Assert that gc->funcs is never set to NULL References: https://bugs.freedesktop.org/show_bug.cgi?id=71415 Signed-off-by: Chris Wilson commit aa140ef1e62c349936be5f153e4be7688e129e63 Author: Chris Wilson Date: Mon Nov 11 11:38:46 2013 +0000 sna: Add a couple more asserts to track a potential NULL gc->pCompositeClip References: https://bugs.freedesktop.org/show_bug.cgi?id=71415 Signed-off-by: Chris Wilson commit 3e81a9cbd68344450a6e82130edfef21dd04ec43 Author: Chris Wilson Date: Mon Nov 11 10:47:24 2013 +0000 intel-virtual-output: Avoid the infinite loop around XPending XPending() reports if there are any events pending and does not perform any dequeuing itself - ergo for a remote display while (XPending()) ; becomes an infinite loop should there be an event pending. References: https://bugs.freedesktop.org/show_bug.cgi?id=71345 Signed-off-by: Chris Wilson commit 922a8bab89c1a5970db61670aaee21e827652bc2 Author: Rémi Cardona Date: Fri Nov 8 20:14:59 2013 +0100 configure: Use proper variables set by PKG_CHECK_MODULES $DRI_CFLAGS does not actually exist. The PKG_CHECK_MODULES call creates a $DRI1_CFLAGS variable instead. This doesn't break often because "recent" versions of xorg-server.pc indirectly depend on xf86driproto.pc thus bringing in the required CFLAGS through $XORG_CFLAGS. Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=490342 Signed-off-by: Rémi Cardona commit 7b0771180dc9bb7276a473db5663f41b5929199b Author: Chris Wilson Date: Sun Nov 10 10:34:06 2013 +0000 intel-virtual-output: Do not hide the cursor on the local/source display Whilst we want to take over and hide the cursor on the remote displays, on the source we need to not interfere with the host. Reported-by: Jethro Beekman Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71439 Signed-off-by: Chris Wilson commit b3b02a879bd6f29447e20fb5bb51c0a4a48a7928 Author: Chris Wilson Date: Sat Nov 9 11:15:39 2013 +0000 sna: Assert that we do setup the gc->pCompositeClip upon ValidateGC Signed-off-by: Chris Wilson commit 3ec663bf1c83ea1e470e94b9fb703346fc5bd39e Merge: d9ecb91 abf1a16 Author: Chris Wilson Date: Sat Nov 9 11:06:12 2013 +0000 Merge branch 'master' of hsw:/usr/src/xf86-video-intel commit abf1a16914d993cc150005879375d4bb17fdccf3 Author: Chris Wilson Date: Fri Nov 8 17:09:35 2013 +0000 intel-virtual-output: Only track the most recent visibility status of the cursor Signed-off-by: Chris Wilson commit b46d0d327140a1b17066e473d6d61798ffb9871a Author: Chris Wilson Date: Fri Nov 8 14:04:32 2013 +0000 intel-virtual-output: Fix forced synchronisation of clones Signed-off-by: Chris Wilson commit fa40286e2f12a4757d1b9bcbe1f1d7c5170bd7da Author: Chris Wilson Date: Fri Nov 8 13:53:48 2013 +0000 intel-virtual-output: Tighten bad_visual() checks Signed-off-by: Chris Wilson commit 83c33a1f436c947ab3d9289a9c57d92f964e9541 Author: Chris Wilson Date: Fri Nov 8 13:00:11 2013 +0000 intel-virtual-output: Disable event tracking after a failure Signed-off-by: Chris Wilson commit 8b10c528044840d6c2a6244034fc6c2555476b8e Author: Chris Wilson Date: Fri Nov 8 12:58:06 2013 +0000 intel-virtual-output: Add DBG for the latest XSync Signed-off-by: Chris Wilson commit 969b064f74e0058a49afa17287184005d1e11402 Author: Chris Wilson Date: Fri Nov 8 12:54:01 2013 +0000 intel-virtual-output: Perform an explicit sync If we fail to track rendering using ShmCompletionEvents and begin to drop frames, insert an explicit XSync. Signed-off-by: Chris Wilson commit e0075ccee2e7bbe46ecbf717817d468cc9248cc4 Author: Chris Wilson Date: Fri Nov 8 12:46:08 2013 +0000 intel-virtual-output: Check for pending events before skipping draw Make sure we check if the destination display has caught up before skipping a frame. Signed-off-by: Chris Wilson commit ea4f99c333b181eb21012b5bee60251695e93c8b Author: Chris Wilson Date: Fri Nov 8 12:30:21 2013 +0000 intel-virtual-output: Add some DBG for bad_visual() Signed-off-by: Chris Wilson commit 84d667b94a97ad5fde68d730d57a19e1f4241ed5 Author: Chris Wilson Date: Fri Nov 8 08:53:55 2013 +0000 sna: Always schedule upload buffers for retirement after use Even if they are multiply referenced due to cached references. Signed-off-by: Chris Wilson commit d9ecb91ef123ee4e88020d0328a8c1fafad30e6c Author: Chris Wilson Date: Thu Nov 7 14:58:08 2013 +0000 sna: Skip an unmappable linear bo when searching through a cache for a GTT mapping Signed-off-by: Chris Wilson commit cb579a4444146a0736c7bad5edc1f382a32b6bf6 Author: Chris Wilson Date: Thu Nov 7 14:54:39 2013 +0000 sna: Only assert that the bo is small enough to be mmapped Not that is currently in a position to be mapped without eviction. Signed-off-by: Chris Wilson commit 68cef6cd281572fcfb76a341dc45b7c8e5baffe6 Author: Chris Wilson Date: Thu Nov 7 13:09:25 2013 +0000 sna/gen7: Request secure batches for Haswell vsync Since commit 8ff8eb2b38dc705f5c86f524c1cd74a811a7b04c Author: Chris Wilson Date: Mon Sep 9 16:23:04 2013 +0100 sna/hsw: Scanline waits require both DERRMR and forcewake we have been emitting LRI to enable vsync on the render ring. This requires a privileged batch buffer, and whilst we were checking for kernel support, we forgot to actually tell the kernel to submit the batch with the right privileges. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71328 Signed-off-by: Chris Wilson commit b796c33411218aeaf4daaeff41a1bc442b5f945f Author: Chris Wilson Date: Wed Nov 6 16:24:28 2013 +0000 sna: Always copy from the tile source The first step when tiling with an intermediatory is to copy from the source bo to the temporary. The alu should only be applied when copying from the temporary to the destination. Signed-off-by: Chris Wilson commit ace764501ec7c440eddc1d26670f6fbf29fa648d Author: Chris Wilson Date: Wed Nov 6 15:42:35 2013 +0000 sna: Remove erroneous assertion from sna_tiling_blt_composite We have to rely on the caller only calling us for a PictOpSrc equivalent operation as they don't all set op->op. Signed-off-by: Chris Wilson commit 7a9c1e153a9208e8cd7680e478fde18e051beaa9 Author: Chris Wilson Date: Wed Nov 6 15:04:24 2013 +0000 sna: Add a DBG breadcrumb to kgem_bo_convert_to_gpu() Signed-off-by: Chris Wilson commit ae380a960df6b3a9714d78eb6cb42249764488ba Author: Chris Wilson Date: Wed Nov 6 14:51:42 2013 +0000 sna: Use tiling BLT fallback for BLT composite operations This avoid a circuituous route through the render pathways and multiple levels of tiling fallbacks to accomplish the same copy. Signed-off-by: Chris Wilson commit 7578809ddcb244ad78ebf86359b7ee2a61e27ff6 Author: Chris Wilson Date: Wed Nov 6 13:42:27 2013 +0000 sna: Trim create flags if tiled sizes are too large Signed-off-by: Chris Wilson commit 073465817f54507ab6b7f801c5dfab2c06f678c0 Author: Chris Wilson Date: Wed Nov 6 13:41:39 2013 +0000 sna: Fences are power-of-two sizes Signed-off-by: Chris Wilson commit a6b008d69235cbbb572d7d4b33940d2cedd66556 Author: Chris Wilson Date: Wed Nov 6 11:38:53 2013 +0000 sna: Fixup unwind checks for future BLT commands Signed-off-by: Chris Wilson commit 22b6a331d0a102e8a8b9fcac1d75f8c9e16596b6 Author: Chris Wilson Date: Wed Nov 6 09:05:05 2013 +0000 sna: Clear the execlist if we completely unwind a batch after using 8x8 tiling Another location, but the right function this time! Signed-off-by: Chris Wilson commit c3d5b1d8fcb1b65c35827d38bf5b309e433d0907 Author: Chris Wilson Date: Wed Nov 6 09:40:56 2013 +0000 sna: Move initialisation of loop counter to common code It was only being defined in x86-64 and left unitialized for x86-32. Fixes regression from commit 587c4866652e40e1e228b333028114766a6d3b08 Author: Chris Wilson Date: Mon Nov 4 15:10:40 2013 +0000 sna: Promote uint16_t to a full int to avoid overflow in computing w*h in memcpy_xor Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71286 Signed-off-by: Chris Wilson commit 1a31335954b4d244d10e2594ae00e60762536a77 Author: Chris Wilson Date: Wed Nov 6 09:05:05 2013 +0000 sna: Clear the execlist if we completely unwind a batch after using 8x8 tiling Signed-off-by: Chris Wilson commit ef842d2ceee4d1ccf8a0f8a81530dc8be8e18b44 Author: Chris Wilson Date: Wed Nov 6 08:56:01 2013 +0000 sna: Be more pessimistic for tiling sizes on older gen On the older generation, we have severe alignment penalties for fenced regions which dramatically reduce the amount of space we can effectively use in a batch. To accommodate this, reduce the tiling step size. Signed-off-by: Chris Wilson commit f2f9019bae5f6f03b5e23da759d3871fc18dd9f4 Author: Chris Wilson Date: Tue Nov 5 22:41:06 2013 +0000 sna: Only operate inplace if no existing CPU damage for a read With a large object, we try harder to operate inplace (to avoid creating a second large CPU bo). This introduced an issue where we tried to read from the GPU bo when there was already existing damage in the CPU - triggering an assertion. Signed-off-by: Chris Wilson commit 7f901495cdef0ae3b4a328bb98a6bc0ff03ea362 Author: Chris Wilson Date: Tue Nov 5 21:59:37 2013 +0000 sna: Trim the overestimate of required aperture space for fence alignment We can optimistically only require that we waste the largest fence region in a batch, as all other fences will then be naturally aligned as well. So long as the kernel succeeds in defragmenting the aperture... Signed-off-by: Chris Wilson commit 736b496b458d666416ea94f157c05ce78f98a600 Author: Chris Wilson Date: Tue Nov 5 21:33:18 2013 +0000 sna: Mark partial move_area_to_gpu with MOVE_READ on promotion to move_to_gpu When promoting a partial move_area_to_gpu to a full move_to_gpu, we have to disable certain optimisations that we try to use if MOVE_READ==0. Reported-and-tested-by: Matti Hamalainen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71198 Signed-off-by: Chris Wilson commit 723f17ca4f9c120be5fe667bf2c3e35c7ee687be Author: Chris Wilson Date: Tue Nov 5 18:36:45 2013 +0000 sna: Submit execution on the bo before changing its caching status Signed-off-by: Chris Wilson commit 10b573c5084cabcc1bae70c8d35311fa5ec0a245 Author: Chris Wilson Date: Tue Nov 5 18:29:46 2013 +0000 sna: Clear snoop flag after converting from a CPU bo Signed-off-by: Chris Wilson commit dc61705a6e425952de4c81c2320382af07cf948a Author: Chris Wilson Date: Tue Nov 5 08:49:28 2013 +0000 sna: Use an inplace exchange for large untiled BO On older architectures, large BO have to be untiled and so we can reuse an existing CPU bo by adjusting its caching mode. References: https://bugs.freedesktop.org/show_bug.cgi?id=70924 Signed-off-by: Chris Wilson commit f3225fcb38686f3b9701725bf3a11ecf1c100c3f Author: Chris Wilson Date: Tue Nov 5 08:38:22 2013 +0000 sna: Be move conservative with tiling sizes for older fenced gen The older generations have stricter requirements for alignment of fenced GPU surfaces, so accommodate this by reducing our estimate available space for the temporary tile. Signed-off-by: Chris Wilson commit 93193aaf7d0fc4e3a3b9be1632bfd36331b47d2e Author: Chris Wilson Date: Mon Nov 4 22:14:05 2013 +0000 test commit a0d1de962a8107cfcaefd82eb8ffaf3e4da0e130 Author: Chris Wilson Date: Mon Nov 4 16:45:00 2013 +0000 sna: Check for loss of state after setting up a fill BLT op If we install a BLT fill operation early in the drawing sequence (i.e. before calling a mi routine), we may lose our state to delayed initialisation of sources and so need to subsequently recheck. Signed-off-by: Chris Wilson commit fcd081ca77c917c7000f8ab4668e5c863381a4f3 Author: Chris Wilson Date: Mon Nov 4 15:17:51 2013 +0000 sna: s/active/busy/ to silence compiler warning kgem.c: In function 'kgem_check_bo': kgem.c:4768:7: warning: declaration of 'active' shadows a global declaration [-Wshadow] kgem.c:692:21: warning: shadowed declaration is here [-Wshadow] kgem.c: In function 'kgem_check_many_bo_fenced': kgem.c:4907:7: warning: declaration of 'active' shadows a global declaration [-Wshadow] kgem.c:692:21: warning: shadowed declaration is here [-Wshadow] Signed-off-by: Chris Wilson commit 587c4866652e40e1e228b333028114766a6d3b08 Author: Chris Wilson Date: Mon Nov 4 15:10:40 2013 +0000 sna: Promote uint16_t to a full int to avoid overflow in computing w*h in memcpy_xor Reported-by: Conley Moorhous Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70527 Signed-off-by: Chris Wilson commit 8f6e227ba8127a2ca034271f2a660c24abbe056f Author: Chris Wilson Date: Mon Nov 4 12:57:01 2013 +0000 sna: Apply the BLT source offset for individual copies Following a complex path through multiple layers of indirections and tiling fallbacks, resulted in hitting a path where the source offset was subsequently ignored. This leads to the operation reading from invalid memory (or hitting the assert warning about the same). References: https://bugs.freedesktop.org/show_bug.cgi?id=70924 Signed-off-by: Chris Wilson commit 82b646a42f5a6271c8518ad454f1603714276caf Author: Chris Wilson Date: Mon Nov 4 11:48:04 2013 +0000 sna: Only use the simple stipple upload path if wholly contained If the stipple box is outside of the stipple pixmap, we need to carefully upload the stipple using the modulus operation. Buzilla: https://bugs.launchpad.net/bugs/1247785 Signed-off-by: Chris Wilson commit e678cead11b53699694f5b5cf52ff3ea0e08f637 Author: Chris Wilson Date: Mon Nov 4 11:47:29 2013 +0000 sna: Update DBG formats for larger BO offset integers Signed-off-by: Chris Wilson commit 94f9beb8fbb31c2b6158e492e02ff05c9ebc674f Author: Chris Wilson Date: Mon Nov 4 11:30:39 2013 +0000 sna: Remove the replace indirection prior to performing write_boxes As write_boxes itself decides whether or not to stage the upload into the destination bo, we can destroy the temporary allocation along the write_boxes fallback path (i.e. after failing to map the destination bo). Signed-off-by: Chris Wilson commit ad3959324c02de2e73e7d1142d42248f7dbb4518 Author: Chris Wilson Date: Mon Nov 4 11:12:30 2013 +0000 sna: Only destroy the old GPU after successfully replacing it Along the sna_replace__xor path we destroyed the priv->gpu_bo twice upon successfully replacing it. References: https://bugs.freedesktop.org/show_bug.cgi?id=70527 Signed-off-by: Chris Wilson commit 8d067e961920e19fda7e9990440ac2be1a2e1760 Author: Chris Wilson Date: Mon Nov 4 09:34:25 2013 +0000 sna: Rename the two variants of pwrite so very relative dangers are obvious Since we extend the write in the cache-aligned routine, it runs the risk of reading from beyond the end of the allocation. As such, callers should be carefully vetted to make sure that their allocations are already cache-aligned (typically page-aligned). To make it obvious that this complexity exists, rename the routine. Signed-off-by: Chris Wilson commit 7050c8da56676b60a602dce9abbdb61a7c4fa61e Author: Chris Wilson Date: Mon Nov 4 09:31:05 2013 +0000 sna: Use the unoptimized pwrite for general buffers When we call kgem_bo_write() we have less control over the allocation of the buffer, and do not ensure it meets the alignment criteria required for the cacheline optimisation. So use the simple pwrite routine to avoid reading beyond the end of the allocation. Reported-and-tested-by: Mark Kettenis Signed-off-by: Chris Wilson commit 10023bf8f5a95b4e9f42c05370bc2c103d6a3d3d Author: Chris Wilson Date: Sun Nov 3 22:07:22 2013 +0000 sna: Use fast-path target placement if we are also IGNORE_CPU If we are ignoring CPU damage, we also need only to check GPU damage when considering placement of the target bo. Signed-off-by: Chris Wilson commit 08d8a47e7c8b9bcb5bb317be4623161e58e0e0cc Author: Chris Wilson Date: Sun Nov 3 19:51:56 2013 +0000 sna: Wrap staging buffer access with sigtrap handler Signed-off-by: Chris Wilson commit 4a7217b05c232484a80abc7bd67494996dd32057 Author: Chris Wilson Date: Sat Nov 2 21:45:00 2013 +0000 sna: Discard bo->exec when unwinding a glyph no-op Signed-off-by: Chris Wilson commit add663919eb6aca1f5bbb39549d56f481ea0f273 Author: Chris Wilson Date: Sat Nov 2 21:13:45 2013 +0000 sna: Eliminate the redundancy between is_mappable/can_map Signed-off-by: Chris Wilson commit d41f847c75c3bce85fda6e7508995b45679944e8 Author: Chris Wilson Date: Sat Nov 2 21:01:26 2013 +0000 sna: Jump to the right escape target when bypassing a self-copy Another fix for commit e3f15cbf39696edae9f716bdcfbb7032ec7d7e3f [2.99.905] Author: Chris Wilson Date: Tue Oct 22 15:19:15 2013 +0100 sna: Move gc back to GPU after failure to move it to CPU Signed-off-by: Chris Wilson commit 7c143ba65cebfad08a32ee28c0dfb4f6635bf94c Author: Chris Wilson Date: Sat Nov 2 15:12:51 2013 +0000 sna: Add some more asserts around inactive VMA lists Signed-off-by: Chris Wilson commit 1c34ea0894e42bf344b0edad62cf2e142840af88 Author: Chris Wilson Date: Sat Nov 2 14:43:49 2013 +0000 sna: Tweak estimate of maximum usable aperture for strict fencing Old generations have very strict alignment requirements even for unfenced tiled accesses which restricts the amount of aperture space available for use, and in the process estimate for the effect of framebuffer fragmentation on the mappable aperture. Signed-off-by: Chris Wilson commit d507b6b9825cc18f41911727ef2ba9b9593cfe21 Author: Chris Wilson Date: Fri Nov 30 16:28:02 2012 +0000 Prepare for changes in the BLT unit on future generations Adapt the legacy BLT commands in preparation for future changes. Signed-off-by: Chris Wilson commit 9681b1422e4531a19e0117e1b1a97668f6b6a571 Author: Chris Wilson Date: Sat Nov 2 13:11:31 2013 +0000 sna: Fallback when wedged and trying to use the BLT copy routines Signed-off-by: Chris Wilson commit 6cb84c8d55f2f7cbb087a479c1dbc8bc58e97183 Author: Chris Wilson Date: Fri Nov 1 15:57:56 2013 +0000 sna: Guard the replace-with-xor fallback path Before attempting to map the destination for uploading into after a failure to use the BLT, we need to recheck that it is indeed mappable. References: https://bugs.freedesktop.org/show_bug.cgi?id=70924 Signed-off-by: Chris Wilson commit 5da329735ca79517a326aee002685bf33e8db861 Author: Chris Wilson Date: Fri Nov 1 14:30:14 2013 +0000 sna: Process all clip boxes when rastering segments The macro still had buried returns which were no longer valid after the translation to handle clipping. They needed to be breaks from the inner most loops to the outer clip box instead. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70802 Signed-off-by: Chris Wilson commit 0d93b0ef343a635512c3835c797c469c17a7b584 Author: Chris Wilson Date: Fri Nov 1 12:49:36 2013 +0000 sna/gen7: Undo overzealous flushing commit d580a30aaf97687f9669ea72fbc3310c2fea26f1 Author: Chris Wilson Date: Thu Oct 31 15:58:47 2013 +0000 sna/gen7: Flush render cache when changing CC state ultimately doesn't prevent the issue and in the process adversely affects perforamnce. Signed-off-by: Chris Wilson commit 6b1a6f32179f7bff8503c6b8b38351a7cf1d08b7 Author: Chris Wilson Date: Fri Nov 1 10:48:06 2013 +0000 sna: Scale uses of aperture_mappable by PAGE_SIZE After converting aperture_mappable to count in pages, there were a few residual users expecting a byte count. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=71117 Signed-off-by: Chris Wilson commit d580a30aaf97687f9669ea72fbc3310c2fea26f1 Author: Chris Wilson Date: Thu Oct 31 15:58:47 2013 +0000 sna/gen7: Flush render cache when changing CC state References: https://bugs.freedesktop.org/show_bug.cgi?id=68410 Signed-off-by: Chris Wilson commit 82e6d41c2f4f343bd1854d3d8ee4b624b5d68971 Author: Chris Wilson Date: Thu Oct 31 13:35:59 2013 +0000 sna/gen6: Tweak flush around CC state changes In order to fix some font corruption, it appears that we need an extra flush in the Sandybridge pipeline when we change the CC stage and the render cache is dirty. We previously triggered a full pipeline stall for this case. Signed-off-by: Chris Wilson commit 5cdc2bbc9c66d4c8c6fdb1b552c32177d070bf7b Author: Chris Wilson Date: Thu Oct 31 10:32:46 2013 +0000 sna: Tweak deletion of used buffers Make sure we never unwind a used buffer. Signed-off-by: Chris Wilson commit ed16e34c00d5eb5ca4ec643f66fedbf1a5112e90 Author: Chris Wilson Date: Wed Oct 30 18:48:10 2013 +0000 sna: Allow limited recursion within sigtrapped routines Signed-off-by: Chris Wilson commit 426efd5f4bb311eeec86de40815b6bc2c6914e94 Author: Chris Wilson Date: Wed Oct 30 18:42:06 2013 +0000 Revert "sna: Detect and handle mi recursion" This reverts commit c6b0e3fe0c299488932ba0392847f1faf298d079. commit ed282456240cc0a7ae9a235ea8aea14a8b8a54ef Author: Chris Wilson Date: Wed Oct 30 13:26:23 2013 +0000 sna: Assert that the batch is in the correct mode prior to inserting BLT commands Signed-off-by: Chris Wilson commit c6b0e3fe0c299488932ba0392847f1faf298d079 Author: Chris Wilson Date: Wed Oct 30 11:52:05 2013 +0000 sna: Detect and handle mi recursion Some of the mi routines recuse back into the generic accel routines and so confuse our trapping of SIGBUS. Add extra assertions to pinpoint the recursion and unwrap sufficiently to avoid that recursion. Signed-off-by: Chris Wilson commit 4d13d52258702f2581ca4f695b69e4dc8f510581 Author: Chris Wilson Date: Wed Oct 30 10:02:28 2013 +0000 sna: Queue retirement when placing a BO on the deferred flushing list Signed-off-by: Chris Wilson commit 59531ba31aa479497cb76b67ea972d1cfa6aec79 Author: Chris Wilson Date: Wed Oct 30 09:55:57 2013 +0000 sna: Check for wedged after submitting If we submit prior to an operation, check that we didn't just wedge the GPU. Signed-off-by: Chris Wilson commit 87655e7df4847542db8da6c8b61006c95b936185 Author: Chris Wilson Date: Tue Oct 29 21:19:02 2013 +0000 sna: Wrap access of upload buffers with sigtrap For an extra layer of paranoia, catch any sigbus when trying to upload a bitmap, and convert it to a no-op. Signed-off-by: Chris Wilson commit 0e692800055827cf526c7539515c71aecb58bf30 Author: Chris Wilson Date: Tue Oct 29 20:16:06 2013 +0000 sna/gen7: Refactor BYT vsync using IVB routines The BYT vsync is closer to the IVB vsync, and using gen6 is just erroneous. Apparently. At least that is what is in bspec today. Signed-off-by: Chris Wilson commit 9352769eee0889dd1c1656829c140384a9e94bcf Author: Chris Wilson Date: Tue Oct 29 18:27:41 2013 +0000 sna: Fix assertion checks for fake flushing requests Signed-off-by: Chris Wilson commit eddd80c44dbb21769cbd100b8cfb0f38d1606e86 Author: Chris Wilson Date: Tue Oct 29 18:00:49 2013 +0000 sna: Remove an overzealous assert Testing with a slow gen2 triggers this harmless assertion, so drop it. Signed-off-by: Chris Wilson commit 9f36e83d76eb6ef26539fc37ce9ebd08428c48a3 Author: Chris Wilson Date: Tue Oct 29 16:59:57 2013 +0000 sna: Handle deferred retiring of active-buffers Yikes, the new assertions found cases where we would retain an active buffer even though it was still owned by the next batch. Fortunately, this should only be a bookkeeping issue rather than lead to corruption. Signed-off-by: Chris Wilson commit d26036d40e77e8f40c8d08659f95a8a5dfac07ed Author: Chris Wilson Date: Tue Oct 29 16:20:14 2013 +0000 sna: Always run the retire_buffers during ring_idle As we know that we had a request to retire, we know that we may make progress retiring active buffers. Signed-off-by: Chris Wilson commit 72544ad5d11c2563d544ef1f7b25de2b3ab21295 Author: Chris Wilson Date: Tue Oct 29 14:53:02 2013 +0000 sna: Perform an explicit retire for old active upload buffers Signed-off-by: Chris Wilson commit d86b36dc41f2e6744a4dea9286634cdf7989fa71 Author: Chris Wilson Date: Tue Oct 29 15:12:17 2013 +0000 sna: Check for retired upload buffers after checking for an idle ring Signed-off-by: Chris Wilson commit 0e6aca90c7b0b9edd5873034bcf0f3d8b2a9f065 Author: Chris Wilson Date: Tue Oct 29 13:50:51 2013 +0000 sna: asserts bitmap uploads are correct Place guards around the pointer accesses to verify that they are within the bitmap. Signed-off-by: Chris Wilson commit 56e3761dec7ea3fc35bda90fbc8b477de70fd144 Author: Chris Wilson Date: Tue Oct 29 12:46:09 2013 +0000 sna: Don't attempt to move the GC back to the GPU before it is moved away Fixes regression from commit e3f15cbf39696edae9f716bdcfbb7032ec7d7e3f [2.99.905] Author: Chris Wilson Date: Tue Oct 22 15:19:15 2013 +0100 sna: Move gc back to GPU after failure to move it to CPU Signed-off-by: Chris Wilson commit 4f41bf3de059c4e0a03fb161fb2e78d94be69e3f Author: Chris Wilson Date: Tue Oct 29 09:56:10 2013 +0000 sna: Try harder to complete writes Expunge our caches if we fail to write into a bo (presuming that allocation failure is the likely fixable cause). Signed-off-by: Chris Wilson commit 76b14a90c16921426154be1d18307e3b12309eea Author: Chris Wilson Date: Mon Oct 28 20:48:17 2013 +0000 sna: Quieten a couple of valgrind warnings about unknown ioctls Signed-off-by: Chris Wilson commit 54aaf14dbf33b0e81932507b8753a63d1c6c8e77 Author: Chris Wilson Date: Mon Oct 28 13:06:16 2013 +0000 sna: Tidy RegionNil checks After computing the clip intersection, we immediately check for the empty result, so refactor the check into the common routine. Signed-off-by: Chris Wilson commit 003f26a571cd0a0eda2499b4ae350c34bdb39b72 Author: Chris Wilson Date: Mon Oct 28 11:29:13 2013 +0000 sna: And be pessimistic when checking aperture limits Signed-off-by: Chris Wilson commit 671e4b44b2b2809e032a3d2a9b45ecf3af547100 Author: Chris Wilson Date: Mon Oct 28 11:28:01 2013 +0000 sna: Account for extra guard pages around snooped BO in aperture checks Signed-off-by: Chris Wilson commit f7d1da8ca5e1695b0459f87e85c587b26193e633 Author: Chris Wilson Date: Mon Oct 28 11:16:29 2013 +0000 sna: Defer opportunistic flush if all bo are current on the GPU Signed-off-by: Chris Wilson commit d69a4f118a729edfb82498501ddb99caf2f3fb93 Author: Chris Wilson Date: Mon Oct 28 10:33:57 2013 +0000 sna: Leave extra room in the mappable aperture for fence alignment Signed-off-by: Chris Wilson commit 40d4199f151a39ecebf127cf468b4470d2906f4e Author: Chris Wilson Date: Mon Oct 28 10:45:52 2013 +0000 sna: Use page-count for mappable aperture size For consistency with the other aperture metrics and correctness when passing around required number of pages. Signed-off-by: Chris Wilson commit 9266e35b42e17293be59cff4c5097f7755112349 Author: Chris Wilson Date: Sun Oct 27 16:45:53 2013 +0000 sna: Fallthrough to opportunistic flushing after aperture checks Signed-off-by: Chris Wilson commit 4e0a01a7a3cf0f473c7ffae9129069086bf2fbe2 Author: Chris Wilson Date: Sun Oct 27 15:33:13 2013 +0000 sna: Handle transient TearFree flip failures If we get a pageflip fail when trying to do a TearFree update, just fallback to a copy (before turning off the display for complete failure). The rare tearing copy should mar the user experience far less. Signed-off-by: Chris Wilson commit b480e1ec503534310d3875aef81ed191aeb93313 Author: Chris Wilson Date: Fri Oct 25 15:09:19 2013 +0100 sna: Trim usuable fenced aperture by unfenced usage This will overcount buffers that both fenced and unfenced (likely most fenced buffers!) but is required to prevent ENOSPC due to alignment issues. Signed-off-by: Chris Wilson commit 64b9f57451501830f8031d1b6ac7289642da032d Author: Chris Wilson Date: Fri Oct 25 14:27:21 2013 +0100 sna: Don't assert indirect GPU state kgem_check_bo_fenced queries whether the GPU is idle, and so its result is timing dependent and not suitable for assertion. Signed-off-by: Chris Wilson commit f0da01aa907d488ae32dfda206ea8a66564bc430 Author: Chris Wilson Date: Fri Oct 25 14:22:05 2013 +0100 sna: Remove stale mappings when replacing GPU bo References: https://bugs.freedesktop.org/show_bug.cgi?id=70527 Signed-off-by: Chris Wilson commit 4e4d643794975b2ac90d04f1a11c0b8114699559 Author: Chris Wilson Date: Fri Oct 25 13:20:10 2013 +0100 sna: Fix overallocation of fences for BLT commands (gen2/3) Fixes a regression introduced in commit 4d2840919fd00e4ae0bf1957f66009f55a01eb7b Author: Chris Wilson Date: Thu Sep 26 15:30:58 2013 +0100 sna: In desperation, query the actual available aperture space Signed-off-by: Chris Wilson commit da0de7e55a9c1b64f3fb0d7b573bb61b0d2566df Author: Chris Wilson Date: Fri Oct 25 11:35:39 2013 +0100 sna: Add a line of DBG for when we discard uploads into CPU bo Signed-off-by: Chris Wilson commit 51c87f9acaa0c4eaaea581092088e1d524396f35 Author: Chris Wilson Date: Fri Oct 25 11:23:21 2013 +0100 sna/io: Propagate failure to XOR uploads Similar to the handling required for the normal upload paths. Signed-off-by: Chris Wilson commit 51590e55c0187862174a7dd5775915216b3137a6 Author: Chris Wilson Date: Fri Oct 25 11:03:05 2013 +0100 sna/io: Wrap the XOR upload paths with SIGBUS handling Signed-off-by: Chris Wilson commit f0d2f1d4e01c223cd6629245bceb24ae4dda215a Author: Chris Wilson Date: Thu Oct 24 19:45:30 2013 +0100 man: Mention the new default accel Signed-off-by: Chris Wilson commit 0d87113080d55cadf72c963f99179a2eb9a282e7 Author: Chris Wilson Date: Thu Oct 24 19:38:53 2013 +0100 man: State the negative aspects of TearFree Signed-off-by: Chris Wilson commit 2b6cb1cf45cff2bb4383bd6bf50aec0af8895079 Author: Chris Wilson Date: Thu Oct 24 15:42:12 2013 +0100 sna: Do not apply drawable offsets to DamageRegionAppend DamageRegionAppend() will itself apply the drawable offsets, so we need to pass it the untransformed region. This also fixes an issue where we might fallback without applying any Damage. Reported-by: Christian Nassau Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32734 Signed-off-by: Chris Wilson commit 8e44b1f5543f6d36c33c743f1ba2143514f8afbf Author: Chris Wilson Date: Thu Oct 24 13:05:16 2013 +0100 sna: Fix canonical mode name to correctly use asprintf Whoops. Only the kernel sprintf() accepts NULL as a valid target string, not libc's. Reported-by: Jay Little Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70835 Signed-off-by: Chris Wilson commit 638d4f60285709b6efc04cef72d4b530460e3239 Author: Chris Wilson Date: Tue Oct 22 14:22:14 2013 +0100 sna: Remove the move-to-gpu shortcircuiting for partial GPU, no CPU damage Otherwise we may not correctly undo COW or pending move-to-gpu updates. v2: goto move_to_gpu instead for correcting the damage handling. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70821 Signed-off-by: Chris Wilson commit e685e100705c1a5f4ef84b2bc355aa6b6ed0ab18 Author: Chris Wilson Date: Thu Oct 24 07:28:18 2013 +0100 Revert "sna: Remove the move-to-gpu shortcircuiting for partial GPU, no CPU damage" This reverts commit bccbbf8a68faf7aac274efd289d4916083b1a1e3. commit bd20791e8e4a9b8aa8e8dfe1cc76e91a471f5c67 Author: Chris Wilson Date: Wed Oct 23 16:15:35 2013 +0100 man: Describe the TearFree option Signed-off-by: Chris Wilson commit b70390b4f824afeed8f1b5a9baf79e33377405cd Author: Chris Wilson Date: Wed Oct 23 11:15:28 2013 +0100 sna: Reset bo after allocation failure during wait-for-shadow If we fail to allocate an alternate bo to replace the still visible scanout bo, we stall and were supposed to continue using the old wait->bo. However, we chose to use NULL instead which is going to lead to an eventual crash. Signed-off-by: Chris Wilson commit 585340f75cb897e1293a887e8ef5a9552ea347cd Author: Chris Wilson Date: Wed Oct 23 09:50:24 2013 +0100 2.99.905 snapshot commit aff67ada6cd2cb1f8adb5bec27a27fbc0f2884cc Author: Chris Wilson Date: Wed Oct 23 08:40:43 2013 +0100 sna: Tidy opportunistic flushing Rearrange the common code so that it should be tail-call optimised. Signed-off-by: Chris Wilson commit 11e8b299e11ff846e1c8090f7cbd34b2af850d85 Author: Chris Wilson Date: Tue Oct 22 17:36:58 2013 +0100 sna: Flush the pending move-to-gpu upon Pixmap free Signed-off-by: Chris Wilson commit 4eb736d61a3b45edb921799b74b3b164b94c174a Author: Chris Wilson Date: Tue Oct 22 17:35:33 2013 +0100 sna: Handle pending move-to-gpu for userptr uploads Signed-off-by: Chris Wilson commit c9e304a7194c1fd6038c59524d3c03756ea0d09e Author: Chris Wilson Date: Tue Oct 22 17:34:59 2013 +0100 sna: Pass the async hint when pushing GPU damage for redisplay So that we don't accidentally clear any other hints. Signed-off-by: Chris Wilson commit c51dd18eade425a7e280203b328b66d278fcba1c Author: Chris Wilson Date: Tue Oct 22 16:59:29 2013 +0100 sna: Fix inconsistency in has_coherent_ptr assertion We occasionally will read from an "incoherent" ptr in the belief that the clflush hit will be worth it. Signed-off-by: Chris Wilson commit bccbbf8a68faf7aac274efd289d4916083b1a1e3 Author: Chris Wilson Date: Tue Oct 22 14:22:14 2013 +0100 sna: Remove the move-to-gpu shortcircuiting for partial GPU, no CPU damage Otherwise we may not correctly undo COW or pending move-to-gpu updates. Signed-off-by: Chris Wilson commit 1c282afb212d1d387d318256f4627385d12e1921 Author: Chris Wilson Date: Tue Oct 22 13:33:06 2013 +0100 sna: Make sure CPU damage is flushed to the TearFree shadow Signed-off-by: Chris Wilson commit 247ebf86a32b518536a11c2f866b2c885bd55d38 Author: Chris Wilson Date: Tue Oct 22 07:58:03 2013 +0100 sna: Only force the TearFree exchange before a write We can read from the current scanout buffer without incurring a visual tear, so delay the GPU bo exchange until we see a write to the object. Signed-off-by: Chris Wilson commit 7b78f25d8992e56f83c897c3d2d7dd75cb7dd1d6 Author: Chris Wilson Date: Tue Oct 22 15:54:59 2013 +0100 xvmc: Handle errors along allocation path Signed-off-by: Chris Wilson commit 27249537d7a2c0c9f817716d657224175a2d9acb Author: Chris Wilson Date: Tue Oct 22 15:35:31 2013 +0100 sna: Free our CRTC private after failing to create the xf86Crtc Signed-off-by: Chris Wilson commit 9fcda71d753ab5126143f053c47513e9acf5c98b Author: Chris Wilson Date: Tue Oct 22 15:32:23 2013 +0100 sna/trapezoids: Fix inversion of initialisation test for triangles Signed-off-by: Chris Wilson commit 9fc95bebe783341aaf0e285ca2e216035378943c Author: Chris Wilson Date: Tue Oct 22 15:30:05 2013 +0100 sna: Ignore overflow in CPU count rather than abort If there are more processors than we ever expect, good! Just use lots of them, rather than none at all. Signed-off-by: Chris Wilson commit e3f15cbf39696edae9f716bdcfbb7032ec7d7e3f Author: Chris Wilson Date: Tue Oct 22 15:19:15 2013 +0100 sna: Move gc back to GPU after failure to move it to CPU As the failure in gc move-to-cpu occurs late, i.e. after the function pointers are updated to point to CPU functions, we need to undo those changes, i.e. call move-to-gpu for the GC on failure. Signed-off-by: Chris Wilson commit 0d18b3956501e53e2ea6b5afcdf9af2f587fbc84 Author: Chris Wilson Date: Tue Oct 22 15:02:53 2013 +0100 sna: Discard GPU bo when failing to setup the shared pixmap If we fail to mmap the pixmap when preparing it for use with prime, be sure to throw away the now lost priv->gpu_bo. Signed-off-by: Chris Wilson commit c0f31d822a2b10bc30ff2532b5ff87d2f401bc62 Author: Chris Wilson Date: Tue Oct 22 15:00:16 2013 +0100 sna: Free bo along unlikely one-off error path Add a missing free for a never-hit error. Signed-off-by: Chris Wilson commit d788b69fdb5ea73b1d283a89e53b2b19eaa90e6e Author: Chris Wilson Date: Mon Oct 21 23:44:29 2013 +0100 sna: Enable TearFree rendering for transformed scanouts References: https://bugs.freedesktop.org/show_bug.cgi?id=22969 Signed-off-by: Chris Wilson commit fa2687bdd5a4c8bc608dac8bb711035f0752a725 Author: Chris Wilson Date: Mon Oct 21 18:55:23 2013 +0100 sna: Eliminate the synchronous wait from inside TearFree Defer the actual wait until the next use of the screen pixmap, and then if needed replace the GPU bo with an alternative back buffer. Signed-off-by: Chris Wilson commit 83c1d1efa1d0d24ebe606065a4305b81fe64b73b Author: Chris Wilson Date: Mon Oct 21 17:52:05 2013 +0100 sna: Improve handling of blit fallbacks for untransfomed large scanouts Signed-off-by: Chris Wilson commit 8c562bac64d2ce80667c686a732d0f9cda6277ca Author: Chris Wilson Date: Mon Oct 21 15:31:44 2013 +0100 sna: Tweak opportunistic flushing to reduce power consumption When trying to conserve power, reduce the number of small batches we emit - trying to maximise GPU efficacy and minimise CPU overhead. Signed-off-by: Chris Wilson commit 11211cd7c06a80c2dbbe07360857486b5b0d3094 Author: Chris Wilson Date: Mon Oct 21 13:35:24 2013 +0100 sna: Set the canonical name for the current mode if none match Always give the mode a name for pretty printing for the user. Signed-off-by: Chris Wilson commit 5d5dfb3e7a6056df7f6af1bcdc789a50ed00b068 Author: Chris Wilson Date: Mon Oct 21 13:25:01 2013 +0100 sna: Copy the EDID mode name for the current CRTC mode As the kernel does not preserve the name and driver type when returning the current CRTC mode, we need to reconstruct those from the EDID mode when available. Signed-off-by: Chris Wilson commit e1027ad7c60b9fd229ed196646c88ba7bb72a282 Author: Chris Wilson Date: Mon Oct 21 11:16:02 2013 +0100 sna: Fix typo inside an assertion Use the right dst_priv variable instead of priv! Signed-off-by: Chris Wilson commit 0b87b0c49a5208383e7472b58d36d3a558144496 Author: Chris Wilson Date: Mon Oct 21 11:06:30 2013 +0100 sna: Suppress log messages for unchanging EDID Whenever we reprobe an unchanging output and re-read its EDID, we emit a useless log message. Previously this was squelched by trying to spot when an EDID was unchanged through the use of its blob.id, however we need to do a complete check on the contents in case the kernel returns us a new EDID with the old id. So make a temporary copy of the current EDID data and only squelch the log messages if the new EDID is an exact match. Signed-off-by: Chris Wilson commit 33be42bf509b6d57face6b8d99d72dd5f6c90900 Author: Chris Wilson Date: Sun Oct 20 09:03:47 2013 +0100 sna: Fix the addition of the current output Mode to the probed lists We need to add the current mode to the Modes list and not directly to the output->probed_modes as that gets overwritten. Signed-off-by: Chris Wilson commit b1ecadd7b44a8e95522cc4a6e4b908b071709e06 Author: Chris Wilson Date: Sat Oct 19 22:38:15 2013 +0100 sna: Unmap pixmap prior to release GPU bo As the unmap routine will deference the GPu bo in its debugging code, we need to be sure that the pointer is still valid at the time of unmapping. Hence unmap before release. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=70461 Signed-off-by: Chris Wilson commit db086d02affe5109202dc9ee06c9e728a3ff0f3f Author: Chris Wilson Date: Fri Oct 18 17:30:18 2013 +0100 sna: Do a quick pass on dirty damage before reduction Signed-off-by: Chris Wilson commit eedcac9a2d1e3ab7c6e35135995d960e55dcad54 Author: Chris Wilson Date: Fri Oct 18 17:27:27 2013 +0100 sna: Drop now obsolete assertion We no longer unconditionally clear the CPU hint when moving to the GPU for readonly updates, so we can no longer assert that the priv->cpu == false afterwards. Signed-off-by: Chris Wilson commit dd280a69b500d2187925f67a541e045a7ae24b07 Author: Chris Wilson Date: Fri Oct 18 11:12:51 2013 +0100 sna: Tighten pixmap map assertions We need to also take account of upload buffers which include an offset to the base map. To do so, we also need to stop conflating the cpu hint with the current mapping flag. References: https://bugs.freedesktop.org/show_bug.cgi?id=70461 Signed-off-by: Chris Wilson commit f81a7f7192a821654bc72a6b34625a6367cb8479 Author: Chris Wilson Date: Fri Oct 18 09:19:14 2013 +0100 sna/glyphs: Remove glyph_approx_extents It didn't consider the height of the glyph above the baseline, i.e. it was fundamentally flawed. The only thing to do is to make sure that glyph_extents() is sufficiently fast never to show up in profiles. (Until then QA should spot the ~10% regression.) An alternative would be to feed the drawable clip extents to the render engine and avoid manual clipping if the clip region covers the whole drawable. Reported-by: Clemens Eisserer Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70552 Signed-off-by: Chris Wilson commit fb1c177eb7fa1745aa452b7a9573c0d0cea2a393 Author: Chris Wilson Date: Fri Oct 18 08:33:58 2013 +0100 Remove defunct file 'brw_eu_util.c' from git Signed-off-by: Chris Wilson commit 930b2c76c78dabc42749f819cb1f9566a6d870a1 Author: Chris Wilson Date: Thu Oct 17 17:16:56 2013 +0100 sna: Check return of source_bo for a potential failure Signed-off-by: Chris Wilson commit 2cf2312372ebde4168ae1e66a97d5c6b8daff1c3 Author: Chris Wilson Date: Thu Oct 17 17:14:13 2013 +0100 sna: Fix computation of clip boxes for stipple uploads References: https://bugs.freedesktop.org/show_bug.cgi?id=67865 Signed-off-by: Chris Wilson commit 621eaba0d5c524878a8803ad285cb9b4b33654a7 Author: Chris Wilson Date: Thu Oct 17 12:01:02 2013 +0100 sna: Assert mapped state When mapped, assert that we point to the expected mapping of the GPU bo. Signed-off-by: Chris Wilson commit efe5c737ed20f2a0b14b479b14eccaf1963d5e01 Author: Chris Wilson Date: Thu Oct 17 11:32:39 2013 +0100 sna/dri: Refactor to use the common GPU damage routine Signed-off-by: Chris Wilson commit ec0866e86d365ae3fd9790b1b263d49fc4981220 Author: Chris Wilson Date: Wed Oct 16 22:39:54 2013 +0100 sna/glyphs: Fix computation of extents for long strings And make sure we consider such overflowing strings for correct clipping against Windows. To offset the cost of doing a full extents check (~10% on aa10text), we introduce an approximate extents query (~1% on aa10text). The disparity should be rare, and should be an overestimate to force redundant clipping. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70541 Signed-off-by: Chris Wilson commit 09121a61b319ce365bfc6f96fb34c52d6eafffdf Author: Chris Wilson Date: Wed Oct 16 12:43:43 2013 +0100 sna: Fix inverted tiled CPU map check in has_coherent_ptr() Signed-off-by: Chris Wilson commit 2068492fba6201c548b1ee7a6eb5d0459f20d466 Author: Chris Wilson Date: Wed Oct 16 09:52:14 2013 +0100 sna: Only carry 32/64-bit compat wrapper for drm_mode_get_connector This is the only structure we care about that has u64 and its size is not a multiple of u64s. Signed-off-by: Chris Wilson commit a63b4d5a0766a7e98efeff8dd520c58e9a1bea88 Author: Chris Wilson Date: Tue Oct 15 21:53:16 2013 +0100 sna: Expand packed KMS structs for 64-bit alignment Pavel Roskin found that with a 32-bit build of the DDX with a 64-bit kernel that the call to GETCONNECTOR was overwriting the 4 bytes beyond the end of the drm_mode_get_connector structure. This would appear to be due to the surreptious padding inserted by the compiler so that the structure would be naturally aligned on a 64-bit system. To compenstate we need to insert padding between the adjacent 32-bit structures on the stack. As usual, be paranoid and make sure that all the adjacent KMS structs we use are padded out to an 64-bit boundary. Reported-by: Pavel Roskin Signed-off-by: Chris Wilson commit dc072db862372f1424195c0c774d10f148b0fcc6 Author: Chris Wilson Date: Tue Oct 15 16:21:41 2013 +0100 sna: Add DBG along all output init failure paths Suggested-by: Pavel Roskin Signed-off-by: Chris Wilson commit 8447e50824d26f3c61e665269534062f34380ef6 Author: Chris Wilson Date: Tue Oct 15 14:39:13 2013 +0100 sna: Allow read-mappings for has_coherent_ptr() assert The assertion was a little too specific and disallowed us to have a CPU read-only mapping. Signed-off-by: Chris Wilson commit f41b0663dc2f6e7b6b190adef4dc27b1c7e8c609 Author: Chris Wilson Date: Tue Oct 15 14:30:41 2013 +0100 sna: Speed up inplace copies from SHM pixmaps to GPU bo Signed-off-by: Chris Wilson commit ad5b6a303b44ba0ae9f8df075a7efec92a2e41ff Author: Chris Wilson Date: Tue Oct 15 12:48:27 2013 +0100 Revert "sna: Preserve the user backlight value for get_property calls" This reverts commit 41b6b792d8e9c84c0a71a4bd7600e1c42e86b5bd in favour of the better fix to not ask RRChangeOutputProperty to reset the known hardware values. Signed-off-by: Chris Wilson commit e76b08cad2770015346fd4cd757de3bb3b6ff37c Author: Chris Wilson Date: Tue Oct 15 12:46:09 2013 +0100 sna: Disable updating properties upon reading their values When we assign the hardware values to the output properties, we do not need to process the set_property callback to write those values back to hardware. This callback is triggered by the pending update flag passed to RRChangeOutputProperty. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70406 Signed-off-by: Chris Wilson commit 41b6b792d8e9c84c0a71a4bd7600e1c42e86b5bd Author: Chris Wilson Date: Tue Oct 15 11:23:19 2013 +0100 sna: Preserve the user backlight value for get_property calls When querying the current backlight value, be sure not to overwrite the last user set value by the call to RRChangeOutputProperty. RRChangeOutputProperty calls into set_backlight_property, tricking us into believing that the user has set a new backlight value. The result is that we end up believing that the user chooses a 0 backlight if she should happen to query the property whilst the output is disabled. Reported-by: reztho@archlinux.us Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70406 Signed-off-by: Chris Wilson commit 0345cbec97d2848fe5e41043d8ddf4cf5e888c72 Author: Chris Wilson Date: Tue Oct 15 10:42:16 2013 +0100 sna/trapezoids: Initialise force_fallback Remember to set it initially to false so that we randomly do not start using fallbacks. Fixes regression from commit 0cd2c43fa8f3a66d612589ad1163a90e427668ac Author: Chris Wilson Date: Sun Oct 13 14:46:45 2013 +0100 sna/trapezoids: Use the aligned fast path for fallbacks Signed-off-by: Chris Wilson commit e952968ed7c6f1ec90752f10a5fb24ae2faa57f7 Author: Chris Wilson Date: Mon Oct 14 23:16:48 2013 +0100 sna: Assert that the mode/ring are set when marking active bo As we use the current ring to encode upon the bo relocs, we need that ring to be properly setup prior to performing relocations. References: https://bugs.freedesktop.org/show_bug.cgi?id=70461 Signed-off-by: Chris Wilson commit 9f009c13beeb6b156e638975827d06b3cdedb0c6 Author: Chris Wilson Date: Mon Oct 14 11:54:35 2013 +0100 sna/gen6: Fix the invert fix Eek, missed that 8-wide dispatch branch still had the opposite fix that I was testing first. Signed-off-by: Chris Wilson commit 8909f7423567a6902320c1a2e83abd501223fb84 Author: Chris Wilson Date: Sun Oct 13 14:39:30 2013 +0100 sna/gen6+: Fix calculation of 1/z for projective textures A typo crept in causing the shader to read from the wrong temporaries for the invert operation. Signed-off-by: Chris Wilson commit 21577742e75165cb2bf34b1cab5bb2c3794c5b49 Author: Chris Wilson Date: Mon Oct 14 09:33:52 2013 +0100 sna: Tighten has_coherent_ptr() assertion Pass along the flags for read/write direction so that we know whether or not we expect the gpu bo to be in the CPU write domain. Reported-by: Pavel Ondračka Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70436 Signed-off-by: Chris Wilson commit 2987a6d5662fb3337f1400a51d016e1c5e21c063 Author: Chris Wilson Date: Sun Oct 13 18:50:03 2013 +0100 sna: Fix typo in DBG Signed-off-by: Chris Wilson commit 0cd2c43fa8f3a66d612589ad1163a90e427668ac Author: Chris Wilson Date: Sun Oct 13 14:46:45 2013 +0100 sna/trapezoids: Use the aligned fast path for fallbacks Route the fallback methods through the force_fallback aligned fast paths. Signed-off-by: Chris Wilson commit 87d675061e324934a95412f9fe87a67c219d3fb9 Author: Chris Wilson Date: Sun Oct 13 13:39:04 2013 +0100 sna: Cleanup up unused variables commit 951f969fa63defbe7cfa52ca97c8985b157bbed0 Author: Chris Wilson Date: Sun Oct 13 12:47:20 2013 +0100 sna: Update DPMS on attached outputs before disabling the CRT left behind a couple of variables now deceased. Signed-off-by: Chris Wilson commit 951f969fa63defbe7cfa52ca97c8985b157bbed0 Author: Chris Wilson Date: Sun Oct 13 12:47:20 2013 +0100 sna: Update DPMS on attached outputs before disabling the CRTC We may want to take action such as preserving the current user value of the backlight before disabling it whilst forcing a CRTC off. This requires us to record that value first. Signed-off-by: Chris Wilson commit 8e7d6ddb9b485045b4662af83e048b06aab358aa Author: Chris Wilson Date: Sun Oct 13 11:04:02 2013 +0100 sna: Cleanup allocation of sna_output after late syscall fail If the second syscall fails (presumably as a deferred allocation failure check), cleanup the allocations made so far before reporting the failure. Signed-off-by: Chris Wilson commit f9a18c9f38d09c145eb513ca989966dc135c1e9b Author: Chris Wilson Date: Sun Oct 13 10:36:35 2013 +0100 uxa: Check for allocation failure in i915 video For a large screen, we have to create a temporary surface for rendering the textured video. If this pixmap creation fails we may be left with a system memory only pixmap leading to a segfault. Reported-by: Bas Wijnen Signed-off-by: Chris Wilson commit 978b93a20bb2ba647138d0d8954fac60b215f7c6 Author: Chris Wilson Date: Sun Oct 13 10:34:50 2013 +0100 uxa: Abort CreateScreenResources after allocation failure One of UXA's invarients is that the ScreenPixmap is complete (i.e. has an intel_pixmap private with a bo attached). If we fail to create that private during CreateScreenResources we will die very soon afterwards, so just report the failure and shutdown gracefully. Signed-off-by: Chris Wilson commit e914dada5595a24b5d0fada7e476cc93570fa7c5 Author: Chris Wilson Date: Thu Oct 10 17:14:36 2013 +0100 configure: Allow manual specification of intel-gen4asm path Signed-off-by: Chris Wilson commit 3e3af6936ea26be57e80e09752a8736c9cfe2566 Author: Chris Wilson Date: Thu Oct 10 22:16:53 2013 +0100 sna: Populate bo->size from dma-buf Recent kernels gained the ability to report the actual size of the dma-buf through an lseek. We can use this to set the correct size of the bo when available, overriding the guess provided by the caller. Suggested-by: Kristian Høgsberg Suggested-by: Daniel Vetter Signed-off-by: Chris Wilson commit f0bd716425d1514b62565f9a65397cd1cb2ffb3a Author: Chris Wilson Date: Thu Oct 10 16:22:45 2013 +0100 sna: Sanitize output->crtc before falling back oto xf86InitialConfiguration During initialisation, we stash the currently attached CRTC id in output->crtc. This is fine as ordinarily we would not dereference output->crtc until after it had been assigned a real CRTC. However, commit 6fda305e2f2f991b39d09e67d0b17c8c3d50f9a4 Author: Chris Wilson Date: Wed Oct 9 15:59:42 2013 +0100 sna: Append the current mode to the output list if not found introduces such an early dereference and causes a crash if we fail to probe the KMS configuration (usually due to a user override). Reported-by: Łukasz Maśko Signed-off-by: Chris Wilson commit 700a845cc611f3e499cf0ff01bd99d472d6fd7ac Author: Daniel Martin Date: Thu Oct 10 15:24:26 2013 +0200 configure: Add xfixes to X11 pkg check Add xfixes to the list of PKG_CHECK_MODULES for X11. '-lXfixes' was hardcoded in test/Makefile.am before. This could lead to a broken build in very rare cases where the build environment has all specified X libraries but Xfixes. Signed-off-by: Daniel Martin commit 79f8ff4bbb2f723ec21c150c0775e706bc00a834 Author: Chris Wilson Date: Thu Oct 10 12:42:12 2013 +0100 sna/gen4+: Share a few common routines Signed-off-by: Chris Wilson commit 8bd9d63a863b88ecd6f72c11468e0940f3bcd9fc Author: Chris Wilson Date: Thu Oct 10 12:35:28 2013 +0100 sna/gen6+: Share the common routines for ring preferrence Signed-off-by: Chris Wilson commit ddcd8607027c67f8260ffd4eae8543f832885cb8 Author: Chris Wilson Date: Thu Oct 10 12:18:31 2013 +0100 sna/gen6+: Only allow switching to BLT for fills if we have semaphores An extra caveat to these generations for commit 97d809c26bec2c0120f2dc0bcfd840379bd996fa Author: Chris Wilson Date: Thu Oct 10 00:15:55 2013 +0100 sna: Pass usage hint down to render fill routines is that we don't want to incur ring switch overheads that may overwhelm any advantages from using the BLT. Signed-off-by: Chris Wilson commit c99d44d7f09fc92daf64eee1f6f3300e11e1cf01 Author: Chris Wilson Date: Thu Oct 10 08:32:51 2013 +0100 sna: Prevent changes in tiling/pitch of existing framebuffers Reported-by: Daniel Vetter Signed-off-by: Chris Wilson commit 97d809c26bec2c0120f2dc0bcfd840379bd996fa Author: Chris Wilson Date: Thu Oct 10 00:15:55 2013 +0100 sna: Pass usage hint down to render fill routines For the scanlines emitted for rendering Core drawing primitives, it is preferable to use the BLT engine, so pass those hints down. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit b16999da214803a026d7246ec4aa62031e82dfc8 Author: Chris Wilson Date: Wed Oct 9 23:54:57 2013 +0100 sna: Upon unwinding operations, also check for exec objects to clear If we cancel an operation after partially committing it, we may leave the batch bookkeeping in an inconsistent state with an exec object with a zero-length batch. Ordinarily, this would not be an issue as we could pass the extra object to the next batch. However, if we switch rings, we need to clear the extra objects as they are currently flagged as being on the wrong ring, leading to hilarity. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit b9ad5b625e8935a3c115760bdd4738d4432542e3 Author: Chris Wilson Date: Wed Oct 9 17:18:43 2013 +0100 2.99.904 snapshot commit d1aa2ac5dddf6b8c8c1333aae415abda9ad72d85 Author: Chris Wilson Date: Wed Oct 9 16:22:59 2013 +0100 sna: Steal the current mode name Rather than duplicating a string, we can simply transfer ownership from the temporary mode to the mode list. Signed-off-by: Chris Wilson commit 6fda305e2f2f991b39d09e67d0b17c8c3d50f9a4 Author: Chris Wilson Date: Wed Oct 9 15:59:42 2013 +0100 sna: Append the current mode to the output list if not found If for some reason the current mode on the CRTC (inherited most likely from fastboot) doesn't match any of the modes reported by the output, we end up with a stray mode that the client cannot control. Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70132 Signed-off-by: Chris Wilson commit d1cb39d0a86390b7ef704422a5b91f9a012d24a5 Author: Chris Wilson Date: Wed Oct 9 10:32:02 2013 +0100 sna/gen3+: Flush vertex buffer after computing resize Upon aligning the buffer, we may enlarge the vbo to accomodate the vertex alignment and push the current index past the end of the buffer. Move the space check from before the alignment computation to afterwards. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 38333443b804b9ac6517a7998551b229dc4d5c6c Author: Chris Wilson Date: Tue Oct 8 16:12:06 2013 +0100 sna: Emit DBG for when we fallback to xf86InitialConfig detection Signed-off-by: Chris Wilson commit 082c08789cf9a8c0cc2bf44d0fee579b96c0798f Author: Chris Wilson Date: Tue Oct 8 09:40:34 2013 +0100 sna: Rework the num_threads refinement to avoid the division We can replace the division by a multiplication. Signed-off-by: Chris Wilson commit 06a8ad9690590a605b1564012d062b98c60546a6 Author: Chris Wilson Date: Mon Oct 7 23:21:38 2013 +0100 sna/trapezoids: Recompute num_threads to match range We need to be careful not to execute threads past the end of the alloted buffer by making sure the clip extents correctly align. Reported-by: Joseph Yasi Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70204 Signed-off-by: Chris Wilson commit 1fb4f60671cfb0e461a2e5969ee9d0f0e39d93a4 Author: Chris Wilson Date: Mon Oct 7 22:04:22 2013 +0100 sna: Trim color cache allocation to a single page Instead trying to allocate 4100 bytes, fix the logic to only require a maximum of 4096 bytes in the cache buffer. Signed-off-by: Chris Wilson commit 55cd67485ff34a28ab8eaa7b1b6958b96c072317 Author: Chris Wilson Date: Mon Oct 7 14:06:31 2013 +0100 sna/trapezoids: Only use a single thread to emit rectilinear spans If the trapezoids are rectilinear, they should hit a fast path through the span compositors and so threading them seems pointless. Expect possibily for inplace pixman operations. Signed-off-by: Chris Wilson commit 55e0f4502657078a666761277bbac56a98b3780c Author: Chris Wilson Date: Mon Oct 7 11:56:23 2013 +0100 sna/gen7: Rename debug option ALWAYS_FLUSH to ALWAYS_INVALIDATE This allows us to distinguish between the texture cache invalidation stage versus the opportunistic flushing, and test either. Signed-off-by: Chris Wilson commit eda87254937509502efacabaa6029a584f67764e Author: Chris Wilson Date: Mon Oct 7 11:54:59 2013 +0100 sna/gen7: Tweak flushing We pre-emptively flush the render cache before reads as that seems to improve performance. Now try not flushing if we don't subsequently need to read from the render cache. Signed-off-by: Chris Wilson commit 1c651848cc3f3baec8fa0bcfc68faebd3e58c069 Author: Chris Wilson Date: Mon Oct 7 10:30:20 2013 +0100 sna/trapezoids: Restore overflow check The range can indeed overflow, so promote the assertion back into a check. Signed-off-by: Chris Wilson commit d462475b7ecca6eb001b521185d2f7286031a8d8 Author: Chris Wilson Date: Mon Oct 7 10:04:15 2013 +0100 sna/trapezoids: Fix overstepping vertical edges Regression from commit c98b770a87a5ec5ed9dc0aa375ad173b0e98322e Author: Chris Wilson Date: Fri Oct 4 18:37:01 2013 +0100 sna/trapezoids: Add a precise scan converter Reported-by: Joseph Yasi Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70204 Signed-off-by: Chris Wilson commit c3fe60c15763c02b3b6238c77e6350d478cd8982 Author: Chris Wilson Date: Sun Oct 6 17:27:22 2013 +0100 sna/gen7: Add a always-stall debug option References: https://bugs.freedesktop.org/show_bug.cgi?id=68410 Signed-off-by: Chris Wilson commit 7284e7f48b812948b40d67396214f7929c1c00eb Author: Chris Wilson Date: Sat Oct 5 23:00:49 2013 +0100 intel: Filter out the control bit from the device minor When computing the render node for the device, filter out the potential control node. Signed-off-by: Chris Wilson commit 524a45da56e2a052ffafa3887891caa90ba39f76 Author: Chris Wilson Date: Sat Oct 5 18:42:24 2013 +0100 compat-api: Map changes of DamageUnregister API in 1.14.99.2 Reported-by: Emmanuel Benisty Signed-off-by: Chris Wilson commit 43d616066fc35e6ac2282c0a8c5f9a11aac7b4f1 Author: Chris Wilson Date: Sat Oct 5 09:48:03 2013 +0100 sna/trapezoids: Do not pass invalid trapezoids to pixman Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xorg-server/+bug/1197921 Link: http://lists.x.org/archives/xorg-devel/2013-October/037996.html Signed-off-by: Chris Wilson commit c98b770a87a5ec5ed9dc0aa375ad173b0e98322e Author: Chris Wilson Date: Fri Oct 4 18:37:01 2013 +0100 sna/trapezoids: Add a precise scan converter Signed-off-by: Chris Wilson commit 27ad2fc1dcb2a6177eda7f1319b4f4eccdbea140 Author: Chris Wilson Date: Fri Oct 4 15:43:43 2013 +0100 sna: Start splitting the trapezoids megafile into parseable blocks Signed-off-by: Chris Wilson commit 898087014c36c757f8d2e0087e63467192a52837 Author: Chris Wilson Date: Fri Oct 4 16:12:17 2013 +0100 sna: Fix FillRectangles intersection with complex clip Lesson 2: Use the right variables. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70137 Signed-off-by: Chris Wilson commit 20afd7263f65f29128fbbdbd5894a49594cda669 Author: Chris Wilson Date: Fri Oct 4 16:12:17 2013 +0100 sna: Tidy up FillRectangles intersection with complex clip Lesson 1: do not accidentally overwrite the loop count inside the loop. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70137 Signed-off-by: Chris Wilson commit 22557b88d3c0bb8f883db7d0d0bf85f1255c65c9 Author: Chris Wilson Date: Fri Oct 4 14:14:19 2013 +0100 sna/dri: Only move the scanout to the flip cache if destroyed Under certain circumstances, we can retire the pageflip before the client has updated its back buffers. This leads us to pre-emptively moving the scanout to the cache, when all we need to do (and will do) is report the same back buffer back to the client. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit 394b2ce51d8378893f14896e600713544d473925 Author: Chris Wilson Date: Fri Oct 4 14:13:50 2013 +0100 sna: Add a few more DBG to track refcnts Signed-off-by: Chris Wilson commit dbf98d8963b53a3c68deb1e2624d1269c8b0d97a Author: Chris Wilson Date: Fri Oct 4 09:36:49 2013 +0100 sna/gen5: Replace pipe-control with full MI_FLUSH for required CS stall It appears that we need top-of-pipe synchronisation for changing of certain state, and that the gen5 pipecontrol instruction is insufficient. So we have to fall back on the good old MI_FLUSH in order to make sure that the GPU invalidates its state correctly. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51422 Signed-off-by: Chris Wilson commit aa439ffee4ea0926b382c0f0fb5d41feae9d0f8f Author: Chris Wilson Date: Fri Oct 4 09:07:30 2013 +0100 sna: The device fd is marked as non-blocking so beware the busy-wait During redisplay we wait for the pageflip result. If the fd is marked as non-blocking this results in a busy-wait, so insert a poll first to remove the busy-wait. Signed-off-by: Chris Wilson commit be177465498e35425d36be84bc55b64bf91be84c Author: Chris Wilson Date: Fri Oct 4 08:40:49 2013 +0100 intel-virtual-overlay: Error out if no X11 SHM header is defined Make the error explicit rather than dieing later with unknown constants. Signed-off-by: Chris Wilson commit b8aed266194ebff1ee2da1b9f3f69b4c6bdc8bed Author: Chris Wilson Date: Fri Oct 4 08:37:48 2013 +0100 configure: Disable building tools if prerequisite headers not found After the pkg-config checks, we then probe the headers. If those probes fail, we obviously wish to prevent building the tools as the build will fail. Signed-off-by: Chris Wilson commit a0476ee6d0770156098aa633018addfc607c8a99 Author: Chris Wilson Date: Thu Oct 3 14:52:11 2013 +0100 intel: Allow opening the device only through platform information Only fail to open the device based on the PCI address, if and only if we do not have sufficient platform information to find the correct system device. Signed-off-by: Chris Wilson commit a47f8683fefc9caa4df914de59929ae99823ca37 Author: Chris Wilson Date: Thu Oct 3 15:58:26 2013 +0100 intel: Handle fallback probing without match_data One extreme fallback path through the xf86PlatformProbe results in a call without any match data. As we have a device by this point, we can simply do a reverse match. Signed-off-by: Chris Wilson commit 6c157a925f258fd4c82cf0c3004e7d0056c1cd70 Author: Chris Wilson Date: Thu Oct 3 15:35:54 2013 +0100 intel: Remove dependence upon having PciInfo After some probing mechanisms, we may end up with a valid device without knowing its PCI address a priori. Having a valid device, we can just query it for the correct device id, and can safely abort any path that requires PCI information that we don't have. (Those paths are not valid under such hosting anyway - if it may be required, we could reconstruct the address.) Signed-off-by: Chris Wilson commit 4685e79d1163325b78722c84ce173c91c217ac02 Author: Chris Wilson Date: Thu Oct 3 14:42:45 2013 +0100 intel: And restore PlatformProbe to working order In the saga of the untested WIP patches for hosted device probing, was the failure in logic to detect a valid device during probing. Yikes. Signed-off-by: Chris Wilson commit 58b26055f428fd6a99ffb889caa5e2472352b641 Author: Chris Wilson Date: Thu Oct 3 14:08:36 2013 +0100 intel: Querying device attributes must be non-NULL Check first for a NULL platform device before querying the attributes or else suffer a segfault during PCI probing. Signed-off-by: Chris Wilson commit b7d5292e01fb43d93c13c60a3cef16d352307bdf Author: Chris Wilson Date: Thu Oct 3 13:36:46 2013 +0100 intel: Fix fallout from accident push of ODEV_ATTRIB_FD This is WIP for passing along a hosted fd. It wasn't meant to be pushed along with the bug fix this morning. Signed-off-by: Chris Wilson commit adbf01306a9f42efb26a485a80c3c7f3918a48ba Author: Chris Wilson Date: Thu Oct 3 08:29:08 2013 +0100 sna: Restart timer evaluations if the BlockHandler takes too long Rather than passing a negative timeout to select, if we detect that we expired our timeout during the processing of the BlockHandler, restart. More worrying is that something in the BlockHandler took longer than 3ms to process. Reported-by: Felipe Contreras Link: http://article.gmane.org/gmane.comp.freedesktop.xorg.devel/37388 Signed-off-by: Chris Wilson commit 3b3a5ca603baa611b36f51b800f3969f519bcb3b Author: Chris Wilson Date: Wed Oct 2 18:29:38 2013 +0100 intel: Query platform fd Under a compositor, we wish to use the pre-authorized fd passed to us by the host, stashed away in the platform device. Signed-off-by: Chris Wilson commit 79785920485d0327d5512db0ed6f81bf4d4eeb90 Author: Chris Wilson Date: Wed Oct 2 18:19:44 2013 +0100 intel: Pass the platform device along to the open routines This allows us to pass along more metadata along with the platform device in future. Currently we pass the device path, but in a hosted environment we should be passing along the authorized fd from the host. Signed-off-by: Chris Wilson commit db1edf0e10c6d3665d3bb2ffd381b1ba722cad95 Author: Chris Wilson Date: Wed Oct 2 16:17:35 2013 +0100 configure: Error out if glamor request but UXA is disabled Signed-off-by: Chris Wilson commit a048f436a0210d076fc844404bf56b8b7fcb4b7b Author: Chris Wilson Date: Wed Oct 2 14:59:11 2013 +0100 sna: Only delete unused io buffers Before deleting the io buffer, we need to check that it is not active. Currently we check that it is not pending use in the current batch, but we also need to double check that it does not have outstanding use by the GPU. Failing to do so could mean overwriting the data prior to it being read by the GPU, a very small race but often hit! Reported-by: Vedran Rodic # and many others Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66990 Signed-off-by: Chris Wilson commit 660e9e14bd49fad75dd2fd73c285e035e2672da4 Author: Chris Wilson Date: Wed Oct 2 15:01:53 2013 +0100 sna: Add a few more asserts around handling of buffers Signed-off-by: Chris Wilson commit c724098f2215ff4f4193bbae3d8e42889701edf0 Author: Chris Wilson Date: Mon Sep 30 23:34:02 2013 +0100 sna/trapezoids: Fix clipping on the far left Edges that extend past the left hand side of the clip box cannot simply be ignored (since they contribute to the scanline to their right, our region of interest) but they need to calculated separately rather than merged into the first cell. Reported-by: Pavel Ondračka Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69469 Signed-off-by: Chris Wilson commit 1cf8d5134d8c6e73135ce368be7d92d49a5e27d2 Author: Chris Wilson Date: Mon Sep 30 15:37:20 2013 +0100 sna: Honour Option "AccelMethod" "none" If the user requests that acceleration be disabled either through AccelMethod or NoAccel, do so. Signed-off-by: Chris Wilson commit 1d6a9d4a422b351440df3496d3d6cdefa82ce6c3 Author: Chris Wilson Date: Mon Sep 30 13:27:19 2013 +0100 sna: Only reduce Over to Src if the rects do not overlap Similar to the previous commit, we have to allow overlapping OVER rectangles to be drawn one after another. Signed-off-by: Chris Wilson commit b9bce2303e3e51d2a703154869bb36564aad7921 Author: Chris Wilson Date: Mon Sep 30 12:39:51 2013 +0100 sna: Do not reduce overdrawn rectangles for XRenderCompositeRects The specification is that each is drawn in sequence (so over top of earlier rectangles), so do not cheat by using the computed region. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66313 Signed-off-by: Chris Wilson commit 0532b3cc3c98c255a64692094b9e258201422f85 Author: Chris Wilson Date: Mon Sep 30 12:38:39 2013 +0100 sna: Unmap cow bo when recreating the source bo When we destroy the original source and copy it to a new bo, we also need to make sure that any mappings of the original bo in the clones are undone. Signed-off-by: Chris Wilson commit aad53e37a7e6c842ae688df74a06024315e07ba2 Author: Chris Wilson Date: Mon Sep 30 12:38:19 2013 +0100 sna/gen3: Tidy up fallback handling from fill-boxes Signed-off-by: Chris Wilson commit 2c06e9576aa62290a133cea5158bb979284ac8a8 Author: Chris Wilson Date: Sun Sep 29 23:33:23 2013 +0100 sna: Use the bo allocation cache for converting buffers Since we have a malloc cache for the bo, we may as well use it when converting from an upload buffer to a bo. Signed-off-by: Chris Wilson commit 57c799deb01b8a5919f872926cf71f11cb3aee15 Author: Chris Wilson Date: Sun Sep 29 23:33:11 2013 +0100 sna: Whitespace fixes Signed-off-by: Chris Wilson commit 81d00c51018464929cdb3755adb334cb9a89d166 Author: Chris Wilson Date: Sun Sep 29 14:29:06 2013 +0100 sna: Apply the non-relaxed fencing partial paranoia everywhere This is required to ensure that the tiled offsets are tile-row aligned. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1232546 Signed-off-by: Chris Wilson commit a0bb41d16f75901bc18b7024679e2b3a35fc14f6 Author: Chris Wilson Date: Sun Sep 29 13:33:26 2013 +0100 sna/video: The sprite framebuffer also encodes its format So we need to check whether the cached framebuffer matches the requested format, or else recreate. Signed-off-by: Chris Wilson commit 0dd20381364aabede2e1306945abe21d57c1d7b4 Author: Chris Wilson Date: Sun Sep 29 11:19:46 2013 +0100 sna: Resize an existing framebuffer if possible Sometimes we may have a compatible scanout cached, but of the wrong size. Instead of throwing away the memory and creating a new scanout from scratch, allow us to just resize the old scanout by destroying and recreating its associated framebuffer. Signed-off-by: Chris Wilson commit 902ce98df10c221e136c416f981c3a2730410415 Author: Chris Wilson Date: Sun Sep 29 11:08:19 2013 +0100 sna/video: Don't allow caching of yuv scanouts We only want scanouts capable of being used for the front buffer in our cache, so make sure that YUV formatted fb are destroyed upon release. Signed-off-by: Chris Wilson commit 4a7587ca1c076f25eed67751f9a9e26c5dcd1692 Author: Chris Wilson Date: Sun Sep 29 10:57:23 2013 +0100 sna/video: Discard old video buffers when the frame size changes Back in the good old days of the overlay, we only needed to care about having a frame buffer large enough to hold the data. This changed with the sprite interface which encodes the width x height into the framebuffer and so we need to be careful when handing back a cached buffer that it does indeed match the required dimensions. Reported-by: Ville Syrjälä Signed-off-by: Chris Wilson commit 36d142153b45f4c95d606d14bbbb51d8fdec5d2e Author: Chris Wilson Date: Sat Sep 28 18:38:12 2013 +0100 2.99.903 snapshot commit 2c67e9da5fc4c47f3f67082bd4adaf80d9e7399f Author: Chris Wilson Date: Sat Sep 28 10:13:25 2013 +0100 sna: Avoid reads from a GTT mmapped upload buffer We now allow LLC machines to also use GTT upload buffers, so we need to be cache when scanning the cache to look for suitable buffers. Signed-off-by: Chris Wilson commit 5a5f9b2812a04721f9dbd67552a39c278cdde18b Author: Chris Wilson Date: Sat Sep 28 08:12:22 2013 +0100 sna: OsSigHandler expects 0 on handled Returning 0 from sigtrap_handler() when we wish to fallback to the core OsSigHandler was precisely the wrong thing to do. Signed-off-by: Chris Wilson commit 2893d2b51653cc254000454ad054cd9f0afb1291 Author: Chris Wilson Date: Fri Sep 27 19:52:30 2013 +0100 sna: Fix regression in picture extraction This is a little helper function, that just returns a bool, not the error code used by the render backends. Instead the caller tries an alternative method of extraction before giving up. Signed-off-by: Chris Wilson commit 4c9265ebff496a4d4f974768e264bd65babff97e Author: Chris Wilson Date: Fri Sep 27 10:46:40 2013 +0100 sna: Only flush the scanout if we successfully upload it to the GPU Signed-off-by: Chris Wilson commit 47ac44159c0e3ea0c84510f1d58ac140344b5e69 Author: Chris Wilson Date: Fri Sep 27 10:19:47 2013 +0100 sna: Make sure we do not try to upload indirectly if the GPU is wedged Otherwise we trigger assertions and may end up with corruption. Signed-off-by: Chris Wilson commit 7206d0bb916fa69690a5f4fdcc5e7e81787c6c16 Author: Chris Wilson Date: Fri Sep 27 10:01:34 2013 +0100 sna: Disable the promotion of large bo as flush We can rely on our aperture and idleness tracking to appropriate flush batches. Marking the large bo as flush interferes with the treatment of flush for externally named bo, such as DRI/PRIME. Signed-off-by: Chris Wilson commit 6ac1ac98c28d38b539f465c5ac488d879f1c2ab6 Author: Chris Wilson Date: Thu Sep 26 23:23:47 2013 +0000 sna: Catch SIGBUS to prevent X death We know that when we access either a CPU or GTT mmap we are vulernable to receiving a SIGBUS. In fact, we can catch these and abort the operation preventing X and all of its clients from randomly dieing. This helps for instance if you try and use a 1GiB frontbuffer on a 2GiB machine... For complete protection, we also need to catch signals for all GTT maps, such as VBO and staging buffers. (TBD) Signed-off-by: Chris Wilson commit 7025956558cfc391b553c9adb39d2a38fe494946 Author: Chris Wilson Date: Thu Sep 26 16:20:06 2013 +0100 sna: Mark all large cached buffers as purgeable Signed-off-by: Chris Wilson commit 455754ca8d2762c6294e6db6b405da7959ab8a0f Author: Chris Wilson Date: Thu Sep 26 15:41:36 2013 +0100 sna: Make sure the transformed CRTC box is clipped correctly. Signed-off-by: Chris Wilson commit ec9ffc9e41e05bc6aef10e25ff82bb99b5f92267 Author: Chris Wilson Date: Thu Sep 26 14:54:18 2013 +0100 sna: Trigger fallback after intermediate pixmap allocation failure Signed-off-by: Chris Wilson commit bbfbe229542cc3278fea3c1865f28d65d3c154e8 Author: Chris Wilson Date: Thu Sep 26 15:14:29 2013 +0100 sna/gen4+: Handle very large copies more gracefully Signed-off-by: Chris Wilson commit 4d2840919fd00e4ae0bf1957f66009f55a01eb7b Author: Chris Wilson Date: Thu Sep 26 15:30:58 2013 +0100 sna: In desperation, query the actual available aperture space Signed-off-by: Chris Wilson commit bf1268838a30cca6a181c7804b0d2640dcf94981 Author: Chris Wilson Date: Thu Sep 26 14:48:31 2013 +0100 sna: Drop the REPLACES hint for a pinned target bo Signed-off-by: Chris Wilson commit 50bd37cf7fb811001e79a27b35e5cd0544391cd9 Author: Chris Wilson Date: Thu Sep 26 14:09:54 2013 +0100 sna: Simplify the clearing of a transformed frontbuffer Signed-off-by: Chris Wilson commit c9445af34a091f85d63f40982762fb58b267004d Author: Chris Wilson Date: Thu Sep 26 11:43:14 2013 +0100 sna: Remove a bogus assert We keep active/inactive scanouts in the same cache, so drop the assert that they are all inactive - as it is handled a couple of lines later! Signed-off-by: Chris Wilson commit 17f47afcbc5bbbebd2dfb97f7423514104da750d Author: Chris Wilson Date: Thu Sep 26 11:42:05 2013 +0100 sna: Eliminate a DBG compile warn for 32-bit builds Signed-off-by: Chris Wilson commit 8ef851b223253c38e6367efdeff6b4d551cd2b6b Author: Chris Wilson Date: Wed Sep 25 15:07:48 2013 +0100 sna: Promote self-copies to the GPU Signed-off-by: Chris Wilson commit 1c7df83ca734c3d4206539c65d6f7a5c10537aa6 Author: Chris Wilson Date: Wed Sep 25 15:07:24 2013 +0100 sna: Micro-optimise copies Defer the read of the fExpose bit until we need it. Signed-off-by: Chris Wilson commit d7eb40efa79dd9ea720606b94a20179c7dd18e03 Author: Chris Wilson Date: Wed Sep 25 13:54:43 2013 +0100 sna: Check that the bo exists before attempting to undo it Fixes a NULL dereference from sna_blt_composite(). Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1228677 Signed-off-by: Chris Wilson commit a934b2455a7b67d124903ab086a323169f0b4d69 Author: Chris Wilson Date: Wed Sep 25 12:06:56 2013 +0100 sna: Add a few more asserts around tracking of bo->exec vs bo->request References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 598dae9af99495cb738c6ddbe8602f8fa19dc0df Author: Chris Wilson Date: Wed Sep 25 10:53:11 2013 +0100 sna/gen[35]: Remove dead code for choosing between BLT/render composite For these gen, we always want to use BLT where possible - even if it incurs a context switch. Signed-off-by: Chris Wilson commit 3a05b1a4aa96f4d4484e7397b8e8d901819a3799 Author: Chris Wilson Date: Wed Sep 25 10:52:17 2013 +0100 sna/gen6+: Fallback to BLT composite if fallback is forced Signed-off-by: Chris Wilson commit 5dfe9217f21870c2b3563fb2337254db316eea72 Author: Chris Wilson Date: Tue Sep 24 13:48:28 2013 +0100 sna: Clear CPU damage when uploading partial images inplace Signed-off-by: Chris Wilson commit 53b43673efed4d82b6dd498e9b76892e3e5b13e6 Author: Chris Wilson Date: Tue Sep 24 13:44:59 2013 +0100 sna: Add some DBG for early flushes Signed-off-by: Chris Wilson commit ad0390068832ad4727371902fe41a85a53de1894 Author: Chris Wilson Date: Tue Sep 24 10:00:03 2013 +0100 sna: Separate out copy preferrence from operating in place decision The two decision trees are no longer identical. Signed-off-by: Chris Wilson commit 63a81c87b1be3607243aaa0acc4cb669fee02b4b Author: Chris Wilson Date: Mon Sep 23 21:08:13 2013 +0100 sna/dri: Prevent a NULL dereference in a DBG msg Signed-off-by: Chris Wilson commit 3fd116782bb1c05a140f4783e92a8ee6a57143cd Author: Chris Wilson Date: Mon Sep 23 21:03:07 2013 +0100 sna/dri: Clear the clear hint upon applying DRI damage Otherwise a later call to GetImage will not notice the DRI update if it was already clear - and so return a blank image. One example is the use of x11vnc replaying xbmc. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69730 Signed-off-by: Chris Wilson commit 8f54e9d3c43c04be0d405a94ae5a9d8fe8f8d75b Author: Chris Wilson Date: Mon Sep 23 19:34:25 2013 +0100 sna: Check OPTION_PREFERRED_MODE rather than M_T_USERPREF During the intial KMS probe, we do not yet have the list of output modes, and in particular do not have the list of user preferred modes. So, in order to honour the user preferrence, we need to query for any preferred mode on the output from the option list. Signed-off-by: Chris Wilson Bugzilla: https://bugzilla.novell.com/show_bug.cgi?id=841696 commit 3e276b96cb57050a9aa8ebfb210e3c4b7b2fe137 Author: Chris Wilson Date: Mon Sep 23 14:15:59 2013 +0100 sna/video: Add always-on-top to the list of Xv attributes Otherwise it goes unknown, and not reported by xvinfo. Signed-off-by: Chris Wilson commit e4850bbbccfc86ce36fae103038e91d5034dc517 Author: Chris Wilson Date: Mon Sep 23 11:54:47 2013 +0100 sna: Fix cast from u64 to pointer for 32-bit hosts Missing chunk from commit 42330fbae862cda9ca17ec62eb0d2e4fb86032b8 Author: Chris Wilson Date: Sun Sep 22 14:39:57 2013 +0100 sna: Track CPU/GTT maps independently Signed-off-by: Chris Wilson commit bee26a8e2eaefdcb2072ce8ba92585d3bf713c82 Author: Chris Wilson Date: Mon Sep 23 09:46:36 2013 +0100 sna/dri: Sanitize the backbuffer flip cache Signed-off-by: Chris Wilson commit c4f5da7ab9e02c3994fe9668630480f85e706e89 Author: Chris Wilson Date: Mon Sep 23 09:45:13 2013 +0100 sna/dri: Report saner target_msc values for vblank_mode=0 If desired target_msc is 0 report 0 rather than (CARD64)-1. Signed-off-by: Chris Wilson commit f296872f373d3439b08e055b03584763e6c2ffec Author: Chris Wilson Date: Sun Sep 22 17:29:33 2013 +0100 sna/dri: Fix SwapbufferWait A regression from commit f99e49f7642545f75bac682274767c45c2e6192a Author: Chris Wilson Date: Tue Sep 17 09:15:40 2013 +0100 intel: Make the option to control VSync and PageFlip explict which used the inverse meaning of the option to disable waiting on swapbuffers. Signed-off-by: Chris Wilson commit 42330fbae862cda9ca17ec62eb0d2e4fb86032b8 Author: Chris Wilson Date: Sun Sep 22 14:39:57 2013 +0100 sna: Track CPU/GTT maps independently Now that we use CPU mmaps to read/write to tiled X surfaces, we find ourselves frequently switching between CPU and GTT mmaps and so wish to cache both. Signed-off-by: Chris Wilson commit dd130d1b06e8828d7a2471761bac36093b9a2391 Author: Chris Wilson Date: Sun Sep 22 13:11:50 2013 +0100 intel-virtual-overlay: Grab the server around mode manipulations Prevent other clients from seeing the intermediate states. Signed-off-by: Chris Wilson commit 8478e9c44477094e32868e2bb06d8d0077aabe62 Author: Chris Wilson Date: Sun Sep 22 10:32:24 2013 +0100 sna: Both clear PolyGlyph and ImageGlyph are no-ops For ImageGlyphs, we pre-clear the area hence the bg is always set. Signed-off-by: Chris Wilson commit 395f07b1fe950ad09d439a0b9eba1792ba6a245d Author: Chris Wilson Date: Sun Sep 22 10:31:15 2013 +0100 sna: Undo region translation after failing to begin ImageGlyphs If we fail the initial tests, we need to undo our translation to the region before returning and starting the fallback paths. Signed-off-by: Chris Wilson commit 2851b7747bc8e143aa5c6209b8800eeccb629058 Author: Chris Wilson Date: Fri Sep 20 18:20:39 2013 +0000 sna: ImageGlyphs completely overwrite the destination So we can use the usual rules for discarding unused reads. Signed-off-by: Chris Wilson commit 27f87a56e9fe8cb0e3f41ddac9b3511d0316b436 Author: Chris Wilson Date: Fri Sep 20 18:18:54 2013 +0000 sna: Don't set the mapped hint for inplace tiled accesses The mapped hint is only useful for coherent mappings where it is preferable to guide placement of regular operations. Signed-off-by: Chris Wilson commit 799f1e2355999fb8691cffee4033847c1d2c640b Author: Chris Wilson Date: Fri Sep 20 15:51:35 2013 +0000 sna: Prevent invalid use of set-write-domain on scanouts when debugging One debugging option forces the use of the write domain when synchronising to force a full synchronisation. This trips up an assertion to catch when we try to move the scanout into the CPU write domain. So don't. Signed-off-by: Chris Wilson commit 011636d25be6b42ea1cf76e312d3abdf3855349d Author: Chris Wilson Date: Fri Sep 20 18:57:11 2013 +0100 intel-virtual-output: Hide the remote cursor on initial connection Signed-off-by: Chris Wilson commit 4497212307dee5e35bc6836201738a2fdb559020 Author: Chris Wilson Date: Wed Sep 18 17:03:40 2013 +0100 uxa: Do not change DPMS mode on unconnected outputs The operation is in theory redundant, and in the case of Haswell where we have multiple outputs aliasing to the same encoder, actually harmful. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68030 Signed-off-by: Chris Wilson Tested-by: Stefan Dirsch commit 63a070a31a3963f836539ee7629d64fe3c9f88c8 Author: Chris Wilson Date: Wed Sep 18 17:03:40 2013 +0100 sna: Do not change DPMS mode on unconnected outputs The operation is in theory redundant, and in the case of Haswell where we have multiple outputs aliasing to the same encoder, actually harmful. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68030 Signed-off-by: Chris Wilson commit 011e567e84ce4487dd6e35f4c62682b4cbb66fe9 Author: Chris Wilson Date: Wed Sep 18 16:30:59 2013 +0100 sna: Add output names to DBG dpms changes Signed-off-by: Chris Wilson commit 0e1abe3cd01e5ea1fcb38c628d3ef81ecc0dae97 Author: Chris Wilson Date: Thu Sep 19 12:07:04 2013 +0100 sna/gen4: Remove long dead code for forced batch emission between CA passes Forcing the batch emission on virtually every glyph eats a lot of CPU time sending very short commands to the GPU, and is totally unnecessary. Reported-by: Arkadiusz Miskiewicz Signed-off-by: Chris Wilson commit 6316905983fe1fb4828ff1039923327f467306fa Author: Chris Wilson Date: Thu Sep 19 11:28:30 2013 +0100 intel: Fix includes for intel_options In commit dcf9b5ae1889926007cf8a0efd127e9df3c909de Author: Chris Wilson Date: Tue Sep 17 22:27:45 2013 +0100 intel: Compile fixes for base install of SLED11.sp3 the includes were juggled around to avoid pulling in xorg-server.h outside of the driver. However, missing xorg-server.h leads to subtle bugs in the layout of structures, in this case breaking xf86Options. Reported-by: FBrown Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69555 Signed-off-by: Chris Wilson commit afad7dd43d935a4666bff6c2964714209e851221 Author: Chris Wilson Date: Wed Sep 18 15:34:36 2013 +0100 sna: Pushed dixPrivateKeyRegistered wrapper into compat-api.h Move the wrapping out of the main code body and hide it with the others in our compatability header. Signed-off-by: Chris Wilson commit 53574e4f4ffe97f69c31ee74adceb81c8442c365 Author: Chris Wilson Date: Wed Sep 18 15:28:09 2013 +0100 sna: Wrap use of dixPrivateKeyRegistered for uevents SLED11 also requires us to poke around in the privates as it does not provide the more recent privates API. Signed-off-by: Chris Wilson commit dcf9b5ae1889926007cf8a0efd127e9df3c909de Author: Chris Wilson Date: Tue Sep 17 22:27:45 2013 +0100 intel: Compile fixes for base install of SLED11.sp3 Highlights of that distribution include xorg-xserver-1.6.5, kernel 3.0.76 and gcc-4.3. Signed-off-by: Chris Wilson commit 97b443f589fb62ba060f09a371be273549f524d0 Author: Chris Wilson Date: Wed Sep 18 11:44:53 2013 +0100 sna: Fix off-by-one in computation of valid CRTC mask Signed-off-by: Chris Wilson commit efffc42f227131792920391f9a87238743b2c490 Author: Chris Wilson Date: Wed Sep 18 11:43:24 2013 +0100 sna: Disable same-edid detection The kernel is quite able to return the same id for new edid. :( Signed-off-by: Chris Wilson commit 825557ce44b16b59438df31fd6df2ed82462be89 Author: Chris Wilson Date: Tue Sep 17 10:12:13 2013 +0100 sna: Clamp the possible-crtc mask to the real CRTCs A minor bit of sanitizing of the kernel output. Signed-off-by: Chris Wilson commit f99e49f7642545f75bac682274767c45c2e6192a Author: Chris Wilson Date: Tue Sep 17 09:15:40 2013 +0100 intel: Make the option to control VSync and PageFlip explict Too often our implementation of vsync or pageflip is buggy, or for some other reason it is desired by the user to disable those code paths. Make it possible once again by restoring the Options for the user to control. Signed-off-by: Chris Wilson commit 76790db4e6b33a439a6426ec73547904a50047c5 Author: Chris Wilson Date: Thu Sep 12 14:50:37 2013 +0100 test: Exercise flips/blit swaps on each pipe Signed-off-by: Chris Wilson commit bf4be323e377ab3a2741bf97d8f42fbbc4ccd449 Author: Chris Wilson Date: Thu Sep 12 13:47:18 2013 +0100 sna: Fix declaration of write intent for can_map__cpu in PutImage We always are going to write to the image, despite the flag set in commit fa961ec99a67266687a1934eea24138cf2f7ad19 Author: Chris Wilson Date: Sun Jul 21 18:00:22 2013 +0100 sna: Allow linear inplace uploads along the tiled X PutImage blt paths which was accidentally conditional on the image not being too large. Signed-off-by: Chris Wilson commit 4fb651cb5f6086121d9ad9182e2374d90470ecce Author: Ross Burton Date: Wed Sep 11 21:28:05 2013 +0100 test: only build DRI2 tests if DRI2 is enabled Signed-off-by: Ross Burton commit 815caa9fc660a4eec15992a52b0f8ff9c3c71c55 Author: Chris Wilson Date: Wed Sep 11 10:09:52 2013 +0100 sna/gen4+: Rebalance creation of vbo during batch flushing We need to be careful not to copy too much data during the vertex flush or else that becomes the rate-limiting step. The goal here is to do the early flush to warm up the GPU, then transition to larger batches. Signed-off-by: Chris Wilson commit 0d05a69bd74dc02fb1360c9393de905b8842e1fe Author: Chris Wilson Date: Wed Sep 11 10:18:51 2013 +0100 sna/gen4: Always try the BLT composite routines first Given how fragile the render operations are, taking the hit from transitioning from the slow render operations to the comparatively fast BLT (when possible) is always worth it. Signed-off-by: Chris Wilson commit 9a66d77efa53cff83e9711786c39e8ebff8dd26d Author: Chris Wilson Date: Tue Sep 10 12:29:24 2013 +0100 sna: Disable use of Y-tiling for gen4 This problematic GPU still seems to like to fallover when faced with Y-tiling. It was reserved only for use with glyphs, but even that occasionally runs into trouble, so disable all selection of Y-tiling for our own use. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1222203 Signed-off-by: Chris Wilson commit 8ff8eb2b38dc705f5c86f524c1cd74a811a7b04c Author: Chris Wilson Date: Mon Sep 9 16:23:04 2013 +0100 sna/hsw: Scanline waits require both DERRMR and forcewake Oh my, bspec is missing a few details on how to perform a scanline wait on Haswell. But by using the extra steps required for Ivybridge, we can successfully send events from the scanout to the BCS ring. Sadly this again means that to use vsync on Haswell requires preventing the GPU from sleeping whilst it waits for the scanout to advance. Reported-by: Dan Doel Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69119 Signed-off-by: Chris Wilson commit dbe75982457cfe6bb1f7422a517ced32cc74f909 Author: Chris Wilson Date: Mon Sep 9 15:35:42 2013 +0100 sna/hsw: Fix the event selection for scanline waits on pipe A Hmm, this should have meant that we never actually waited for a scan-line on pipe A. I wonder if it even works... Signed-off-by: Chris Wilson commit 144d97046156a3f7785f98c4f7dbed3fd8f5b7af Author: Chris Wilson Date: Mon Sep 9 15:34:41 2013 +0100 sna/gen6+: Only apply the BLT copy w/a for self-copies A missing check along the copy_boxes() path to bring the w/a into line with the other paths. Signed-off-by: Chris Wilson commit af4215dd7fdf16b9886cff74765d6865bd743ddb Author: Chris Wilson Date: Mon Sep 9 15:02:28 2013 +0100 sna: Call the new __offset functions in the last commit Sigh. I added the new functions for the asserts, updated the parameters, but forgot to change the actual function themselves. Signed-off-by: Chris Wilson commit 6d5df67b3e4ed5d5b9f1aabf01b5657d4c9eeac7 Author: Chris Wilson Date: Mon Sep 9 11:19:19 2013 +0100 sna: Remember to offset the box before asserting damage When using sna_copy_boxes__inplace(), we need to remember that the region is in destination space, so we need to offset the boxes when comparing against the source. The assertion forgot to do so, and so failed as soon as it met a little complexity. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit 634748486f33658f09c8a7f4508840fad6df85f2 Author: Chris Wilson Date: Sun Sep 8 23:02:29 2013 +0100 sna/gen4+: Flush batch if idle on filling vbo Signed-off-by: Chris Wilson commit 77d74ec777d511df6f5aa484f3b7752f2c0b96ad Author: Chris Wilson Date: Sun Sep 8 22:34:09 2013 +0100 sna/gen6: Prefer the RCS on large GT systems For SNB, the different between RCS and BCS is more marginal but it is slightly in favour of using rendercopy on GT2. Signed-off-by: Chris Wilson commit 287727ee223d56705e5792fe0a6c9a99077559e6 Author: Chris Wilson Date: Sun Sep 8 17:59:10 2013 +0100 sna/gen7: Prefer the BLT for gt1 systems On gt1, the BCS is faster than the RCS for all equivalent operations, unlike gt2+ where the RCS is faster (but at greater power draw). Signed-off-by: Chris Wilson commit f25235a854e211f73cc44821b9a7c2a1a4092155 Author: Chris Wilson Date: Sun Sep 8 16:36:33 2013 +0100 configure: Only assert DRI2 requirements not met if the DRI2 package is missing The new error message was added in commit ea30967245707ca4825de154e589a83dc605dae0 [2.99.902] Author: Chris Wilson Date: Fri Sep 6 22:54:48 2013 +0000 configure: Disable UXA build without DRI2 Signed-off-by: Chris Wilson commit 0ceba648211009a464e46855a52737219ab9b534 Author: Chris Wilson Date: Sun Sep 8 13:51:14 2013 +0100 intel-virtual-output: Debug option for forcing full redraws References: https://bugs.freedesktop.org/show_bug.cgi?id=68987 Signed-off-by: Chris Wilson commit 6a6517c748c33a73c92ca67cae9bfb00d48d2382 Author: Chris Wilson Date: Sat Sep 7 22:07:04 2013 +0100 sna: Only update the CRTCs after a resize if master It appears possible to race the framebuffer resize with a VT switch and so end up attempting to update the CRTCs whilst master. The code complains, but in reality we can just ignore the requested change until we VT switch back and then apply the updates upon restoration of master. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit 7ee7e373f24b0c4604dbf67f7ff82bdb7edc55d1 Author: Chris Wilson Date: Sat Sep 7 17:27:20 2013 +0100 sna: Split get_drawable_deltas() In some cases we know we only have a window, and so may skip a conditional. Signed-off-by: Chris Wilson commit 218c9901e55e10fb5bc0c2a4caa04b1bee741a25 Author: Chris Wilson Date: Sat Sep 7 15:16:51 2013 +0100 NEWS: Fix release dates, missed the transition to September commit 58a7611ccfda88c7cbcc62b25b787d6b0fa64081 Author: Chris Wilson Date: Sat Sep 7 08:45:12 2013 +0100 2.99.902 snapshot commit 0c697aee9b3767be7d1e04e4e4f9d304f23b188a Author: Chris Wilson Date: Sat Sep 7 08:42:26 2013 +0100 Revert "sna: Add XMir support" This reverts commit 42d94356f65972eb7fb8991234a4e9388c4c2031. Ordered-by: The Management. commit ea30967245707ca4825de154e589a83dc605dae0 Author: Chris Wilson Date: Fri Sep 6 22:54:48 2013 +0000 configure: Disable UXA build without DRI2 DRI2 is interwoven into the UXA structs, so simply disable building UXA if DRI2 is not available. Reported-by: Ross Burton Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=69056 Signed-off-by: Chris Wilson commit 9fdaeec8f2ada82f790dcbd0018215103447a478 Author: Chris Wilson Date: Fri Sep 6 22:50:06 2013 +0100 sna: Search /sys/class/power_state for the AC adapter The adapter names are not uniform, so we need to scan the directory and find the entry that corresponds to the Mains power supply. However, the acpid does continue to report generic ac_adapter events. Signed-off-by: Chris Wilson commit 0485cdfb6dc8e51d57406f633d55f8a8ac1a0208 Author: Chris Wilson Date: Fri Sep 6 20:46:36 2013 +0100 sna/dri: Only the BackLeft merits special allocation flags As the BackLeft is the only that couled be flipped, it is the only one that may end up as the scanout and so is the only one that should be allocated from the scanout cache. Signed-off-by: Chris Wilson commit 489a93e4cc2e14e25339693933dddf4946717f11 Author: Chris Wilson Date: Fri Sep 6 15:14:46 2013 +0100 sna/gen6+: Switch to using the BLT more often when off AC The BLT is more power-efficient for the operations it can handle, so use it when possible (following the usual caveats) if we know we only have battery power. Signed-off-by: Chris Wilson commit f2ed1ac7b9807106405bbc2b18159a39c2d407d0 Author: Chris Wilson Date: Fri Sep 6 15:07:43 2013 +0100 sna: Listen to ACPI events for power state notifications When on-battery, we would prefer to use more power efficient operations. For example, the BCS is far more economical to more data around with, but it doesn't have quite the same throughput as the hungry RCS. (Not that there is any reason why, the BCS is supposed to run at full memory speed, unfortunately that is main memory speed and not the caches...) Note: that X already listens to acpid for video switch notifications, it would be useful if we could extend that interface to emit power notifications as well. Signed-off-by: Chris Wilson commit 56f532db2c9563c6d70da388f987f26530dcd38d Author: Chris Wilson Date: Fri Sep 6 12:48:06 2013 +0100 sna: Prefer to reuse CPU bo if it was last active rather than inplace uploads This helps short-circuit writes followed by immediate reads. Signed-off-by: Chris Wilson commit 7656755c9d5ac83848f924df3f6faa79a2a7955a Author: Chris Wilson Date: Fri Sep 6 12:18:51 2013 +0100 sna: Keep the CPU bo around if it was recently active Rather than always switching over to using the GPU bo and immediately discarding the CPU bo, keep it around as we may want to reuse the cached data. Signed-off-by: Chris Wilson commit 9a1f2ab84cfbcc1d37ae21de9a0ce6f1b5768e12 Author: Chris Wilson Date: Fri Sep 6 11:43:24 2013 +0100 sna: Try an inplace CopyArea fallback first This applies the copy-from-tiled-X GetImage optimistion to the ShmGetImage paths - when we don't have userptr available. Signed-off-by: Chris Wilson commit 0b2e11ab3c81e74d37180aeb2bb1fce9bcd3870c Author: Chris Wilson Date: Fri Sep 6 11:12:28 2013 +0100 sna: Rechain up SetWindowPixmap upon ScreenPixmap change Fixes regression from commit d2f19d5a1f4d1c9521fb4801c9fb649d19746150 [2.99.901] Author: Chris Wilson Date: Tue Sep 3 19:05:41 2013 +0100 sna: Tidy walking the window tree for updating our pixmaps Signed-off-by: Chris Wilson commit 1b1ac5193ead52dc32bf31f851d04600ea81ab1d Author: Chris Wilson Date: Fri Sep 6 11:11:47 2013 +0100 sna: Include some DBG for the virtual output detection So we can see it in the logs along with the regular outputs. Signed-off-by: Chris Wilson commit ccd605c492ef3fd657bc40ede3f318e7dddbd7a1 Author: Chris Wilson Date: Fri Sep 6 00:33:29 2013 +0100 intel-virtual-output: Unregister our singleton on a clean shutdown Signed-off-by: Chris Wilson commit 3c5caaf0a98c88f6d39be9e78f8427f05975cb0e Author: Chris Wilson Date: Fri Sep 6 00:30:53 2013 +0100 intel-virtual-output: Only wake up for a change in a visible cursor Signed-off-by: Chris Wilson commit 91b1f77da59ab7951e5d9aa09cbc0d2335d4c62a Author: Chris Wilson Date: Fri Sep 6 00:23:37 2013 +0100 intel-virtual-output: Make the flush for recreating Damage explicit Signed-off-by: Chris Wilson commit 3979d11677bb4eb54099b9a8d0a28d4807828223 Author: Chris Wilson Date: Thu Sep 5 23:28:16 2013 +0100 intel-virtual-output: Just request Damage BBox As we ourselves only track the BBox of damage on the virtual outputs, we can ask X to amalgamate the damage events as well. Signed-off-by: Chris Wilson commit 0baac6bba72638a69b6cb04c74493ee48e253884 Author: Chris Wilson Date: Thu Sep 5 23:08:40 2013 +0100 sna/gen6+: Don't request extra caching for use-once upload buffers As we only use these buffers once, we should not benefit from requesting them to be moved into L3/LLC cache - over and above the default recommendations we make when creating the buffer. Indeed, this may even lead to artefacts if we fail to invalidate those other caches when reusing the buffers. Signed-off-by: Chris Wilson commit 2263f8f26fb3c4fabceac2e192e95c5d26a4d173 Author: Chris Wilson Date: Thu Sep 5 21:55:49 2013 +0100 intel-virtual-overlay: Reset damage across modesets Some versions of the Xserver lose Damage tracking across the modeset, causing a loss of damage notifications and repainting to cease on the virtual outputs. We can workaround this by reattaching the damage every time we receive notification that the local Screen configuration changes. Reported-and-tested-by: Severin Strobl Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68987 Signed-off-by: Chris Wilson commit 5dea07c31d4d57d8d9aff68f2a9ffd73e828643f Author: Chris Wilson Date: Thu Sep 5 21:25:00 2013 +0100 intel-virtual-output: Reset the damage just prior to reading it back Slightly more efficient command packing and reduces a damage race slightly... Signed-off-by: Chris Wilson commit bae41624874fa032c407f4888e7db9a07f8f1d0c Author: Chris Wilson Date: Thu Sep 5 21:23:56 2013 +0100 intel-virtual-output: We don't need to enable the timer for reconfigure The timer will be enabled if a reconfiguration actually takes place and we mark the damaged region to be redrawn. Signed-off-by: Chris Wilson commit d9a48bd0a3cd3ca99b29a4038ea16a87771bfe31 Author: Chris Wilson Date: Thu Sep 5 20:52:11 2013 +0100 intel-virtual-output: Just walk the list of clones attached to the display Rather searching the entire array of all clones, just walk the presorted list from the display. Signed-off-by: Chris Wilson commit b57dfc53312d9d7f30bfe45af44036b4c3c03790 Author: Chris Wilson Date: Thu Sep 5 19:40:07 2013 +0100 intel-virtual-output: Defer reenabling damage events until after we draw Signed-off-by: Chris Wilson commit 12de799598ffbbe056bd4455efefa62d4b081d98 Author: Chris Wilson Date: Thu Sep 5 19:36:13 2013 +0100 intel-virtual-output: Flush the damage received message back to the local display After processing the Damage notification, we need to send a message back to the Xserver to clear the pending damage before we will be sent more events. To make sure that message is sent we need to flush the output, as we may never flush the output queue otherwise. Reported-by: Severin Strobl Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68987 Signed-off-by: Chris Wilson commit 1ce52e93315afe7fdb33c315705fe22e69eb908c Author: Chris Wilson Date: Thu Sep 5 18:11:09 2013 +0100 intel-virtual-output: Track active clones For the frequent operations, such as moving the cursor or updating damage, it is more efficient to walk the list of active outputs (as the discrete GPUs support lots of outputs!) Signed-off-by: Chris Wilson commit f01c5eae2a3d6efebe9332a8654303356e622bec Author: Chris Wilson Date: Thu Sep 5 17:48:20 2013 +0100 intel-virtual-output: Reserve space for the '\0' in the sprintf Even though we don't use the trailing NUL byte for our comparisons, sprintf will write it, so we need make space for it. Reported-by: Severin Strobl Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68987 Signed-off-by: Chris Wilson commit e6bb553b7482de4d52b6914e8eac09f2e6014714 Author: Chris Wilson Date: Thu Sep 5 14:42:18 2013 +0100 sna: Add a DBG to track calls to SetScreenPixmap Signed-off-by: Chris Wilson commit 94bc69d5b9a0380cdd9941183b3b1c8e9beb8da5 Author: Chris Wilson Date: Wed Sep 4 13:49:56 2013 +0100 2.99.901 snapshot commit 4dfd7674d88a267d0d89c31422f2e6c333ccf176 Author: Chris Wilson Date: Fri Feb 1 19:48:38 2013 +0000 intel: Select SNA as the default acceleration method Signed-off-by: Chris Wilson commit 42d94356f65972eb7fb8991234a4e9388c4c2031 Author: Chris Wilson Date: Wed Jul 24 01:44:30 2013 +0100 sna: Add XMir support With lots of updates by Christopher James Halse Rogers as he updated the XMir API - but now supposedly frozen! " ickle: I think the xmir api should be pretty much stable now, barring people coming up with more awesome ways of doing things." Signed-off-by: Christopher James Halse Rogers Signed-off-by: Chris Wilson commit f906a4de62856df5b2536ce9704750c3530636fa Author: Chris Wilson Date: Wed Sep 4 15:08:56 2013 +0100 sna: WriteThrough support is now upstream Now that the WriteThrough ABI is upstream, we can rely on runtime detection of the current interface. Signed-off-by: Chris Wilson commit 6f49a413aa812e6f41826d6d1099927e1164353b Author: Chris Wilson Date: Wed Sep 4 14:33:15 2013 +0100 configure: Check for required UMS headers before enabling Prevents the build failing with i810 if we can not find vgaHW.h Signed-off-by: Chris Wilson commit ecb3c303f8f62f5232f3e49c8df4193ea478be13 Author: Chris Wilson Date: Wed Sep 4 12:09:25 2013 +0100 sna: Fix sna_pixmap_move_area_to_gpu() to return the sna_pixmap Like it's sibling sna_pixmap_move_to_gpu(), it helps to know the private sna_pixmap after the operation rather than just a boolean success/fail result, and make it more robust in the process. Signed-off-by: Chris Wilson commit ad774cf3a299b220f9f2a0bed52c8fa979959426 Author: Chris Wilson Date: Wed Sep 4 11:37:01 2013 +0100 sna/dri: Refine proposed async swap interface The latest proposal for passing swap_interval==0 is through the normal ScheduleSwap() call, so we can remove the specialised function. Link: http://lists.x.org/archives/xorg-devel/2013-September/037661.html Signed-off-by: Chris Wilson commit d2f19d5a1f4d1c9521fb4801c9fb649d19746150 Author: Chris Wilson Date: Tue Sep 3 19:05:41 2013 +0100 sna: Tidy walking the window tree for updating our pixmaps Signed-off-by: Chris Wilson commit 47e718bf321f6fe80dc5f797f433b00bc8de91c7 Author: Chris Wilson Date: Tue Sep 3 17:37:33 2013 +0100 sna/dri: Handle failure to move the pixmap into the GPU for CopyRegion It should not fail, except in extreme cicumstances, and even then we shall not crash. Signed-off-by: Chris Wilson commit 5c51cd4e9122b7b8ec54c24cdef6d47edc63d1d9 Author: Chris Wilson Date: Tue Sep 3 17:36:33 2013 +0100 sna: Mark imported PRIME fd as starting in DOMAIN_NONE Or rather, do not assume anything about the initial domains. Signed-off-by: Chris Wilson commit 92b750066834195803c9ad65b94184efa5db6e76 Author: Chris Wilson Date: Tue Sep 3 16:25:41 2013 +0100 sna: Add some more DBG Signed-off-by: Chris Wilson commit efc960b1358d12de6c806a655fabade7278e0651 Author: Chris Wilson Date: Tue Sep 3 01:00:23 2013 +0100 intel-virtual-output: Clear send flags when doing XSync When falling back to using XSync rather than XSendEvent it is imperative that we remember to clear the flag so that we don't keep on performing the synchronous RTT every time. Signed-off-by: Chris Wilson commit 6f090044d1de4160777963910df3586bdf0186dc Author: Chris Wilson Date: Mon Sep 2 23:52:52 2013 +0100 intel-virtual-output: Remember to mark the timer as active when moving the mouse Otherwise we throttle mouse updates to the next display update... Signed-off-by: Chris Wilson commit 91aca61c83f0905d1f6446dba56c5f67d91efb6f Author: Chris Wilson Date: Mon Sep 2 23:27:27 2013 +0100 intel-virtual-output: Don't clobber the XID inside the ShmSegmentInfo As there is an XID inside the ShmSegmentInfo we cannot share one between both endpoints, or else it gets clobbered and rendering is lost (unless by happy coincidence the last XID is available in both Xservers). Signed-off-by: Chris Wilson commit d54f0fa16ddb3985ace02544fc2a58926aed7115 Author: Chris Wilson Date: Mon Sep 2 22:56:03 2013 +0100 intel-virtual-output: Remove the stray 1 The 'output-is-changed' flags was accidentally initialised to 01 rather than 0, causing all attached outputs to be considered to have changed everytime. Signed-off-by: Chris Wilson commit 84b66849fc005365e71a40517c192e0cd178a82b Author: Chris Wilson Date: Mon Sep 2 22:55:17 2013 +0100 intel-virtual-output: Don't set the SHM active flag along !SHM composite paths Otherwise we may end up waiting for an event that will never be sent. Signed-off-by: Chris Wilson commit 13a28f607f0eb4b4906e856c3f75f53446f4f999 Author: Chris Wilson Date: Mon Sep 2 22:37:23 2013 +0100 intel-virtual-overlay: Try to shutdown gracefully Attempt to clean up the VIRTUAL mess when we exit. Signed-off-by: Chris Wilson commit e6e6572ac8f15bfee204cdf6bee4661ee2c6ffbb Author: Chris Wilson Date: Mon Sep 2 22:27:42 2013 +0100 intel-virtual-output: Fallback to probing GetScreenResources If the Display doesn't support the more recent non-forced-detection GetScreenResources, use the older version instead. Signed-off-by: Chris Wilson commit 7c5d269f259dd247c04a374467577cd47cc2cc27 Author: Chris Wilson Date: Mon Sep 2 22:07:46 2013 +0100 intel-virtual-overlay: Keep bumblebeed awake bumbledeed will shutdown its Xserver when the last connection to it closes. For the moment, leak the control socket so that the display stays alive. However, we will want to attach to any Xservers created by bumblebee as opposed to creating them. Signed-off-by: Chris Wilson commit c8dc27e00ef052c585abaa27c09f564c1548c87b Author: Chris Wilson Date: Mon Sep 2 21:53:37 2013 +0100 intel-virtual-overlay: Disable the timer after flushing As the flush may queue work that causes the timer to be reactivated prior to draining the queue, we need to flush first then turn off the timer if idle. Signed-off-by: Chris Wilson commit d3558251777ab71b2a505d7acb2edd35d05b0d58 Author: Chris Wilson Date: Mon Sep 2 21:46:35 2013 +0100 intel-virtual-overlay: Don't do a sibling search if bumblebee is explicitly requested If either all or bumblee is explicitly requested, don't automatically perform the other search. Signed-off-by: Chris Wilson commit d2f7f85cd20fb3a2bb3dba8c9be7ff21d2a8c049 Author: Chris Wilson Date: Mon Sep 2 21:41:48 2013 +0100 intel-virtual-overlay: Fix the bumblebee query parsing It supplies both a trailing newline, NUL byte and length. Signed-off-by: Chris Wilson commit 5fed6e24996eb0fcfeec19341ce4103e7e7eb2d8 Author: Chris Wilson Date: Mon Sep 2 21:19:24 2013 +0100 intel-virtual-output: Perform pixel type conversion from XfixesCursorImage For whatever reason, Xfixes uses "unsigned long" in its protocol definition for the cursor pixels. Signed-off-by: Chris Wilson commit b955622cc25ab12305a572901a8ed0f23896dab3 Author: Chris Wilson Date: Mon Sep 2 20:45:12 2013 +0100 intel-virtual-ouptput: Filter and rate-limit cursor events Make sure we are not responding to cursor motion on other screens, by checking for our root window. Signed-off-by: Chris Wilson commit 5af9d69485a241156c343b67a741bc024e3f6edf Author: Chris Wilson Date: Mon Sep 2 19:50:17 2013 +0100 intel-virtual-output: Reorder the fds We can't place the record fd at after the displays as we may wish to clone more displays later and use the simplification that they are in a linear, contiguous block at the end of the fd array. Signed-off-by: Chris Wilson commit 88d43dc2aea1ee4b8a3248bf442f5be362b32fbe Author: Chris Wilson Date: Mon Sep 2 17:30:15 2013 +0100 intel-virtual-output: Refactor the image resizing code And add lots of debug and robustness. Signed-off-by: Chris Wilson commit 1b07f16ffeb3152817e9e4f77ca0f2c403fb9040 Author: Chris Wilson Date: Mon Sep 2 18:10:27 2013 +0100 intel-virtual-overlay: Fix logic inversion from previous commit "if (!active == 0)" Whoops, but keep the debugging that highlighted the error. Signed-off-by: Chris Wilson commit 088ff35b3941724c59707cf7971c09f9a15e5ddb Author: Chris Wilson Date: Mon Sep 2 16:51:57 2013 +0100 intel-virtual-output: Don't forget to name the mode Signed-off-by: Chris Wilson commit 4b3669548abf9a3c562b468359d8bee1cc86fb32 Author: Chris Wilson Date: Mon Sep 2 16:13:38 2013 +0100 intel-virtual-output: Fallback to Xinerama if RandR is not supported by the target With Xinerama, we do not support reconfiguration of the target's CRTCs but we can still paint! This will require some more work to try and minimise the incompatibility between configuring Randr displays locally and the static arrangement remotely. But you can paint! Signed-off-by: Chris Wilson commit 0ee287af222552f4968f7d78ebc748db5bed5963 Author: Chris Wilson Date: Mon Sep 2 15:42:09 2013 +0100 intel-virtual-overlay: Prevent buffer overrun reading the XEvent When calling XNextEvent() you must provide it with space for any event, i.e. XEvent, and not be tempted to pass in the specific type you are waiting for! Reported-by: Philipp Adolf Signed-off-by: Chris Wilson commit dd5f17ed3adf0c4e7c642f685f61766d12247c0e Author: Chris Wilson Date: Mon Sep 2 15:13:44 2013 +0100 intel-virtual-output: Decouple the fake mode before deleting When we install a fake mode on the output, we have to perform a round-trip for a reprobe. During that time, some other client (such as gnome-shell) will be notify of the change in output status and may attempt to configure it. This leaves us unable to delete the mode as it is currently active - so first disable the new head and then delete the mode. Signed-off-by: Chris Wilson commit 529db4d5edf396757f4f10a2b3aac55ad7e0bbc1 Author: Chris Wilson Date: Mon Sep 2 13:04:49 2013 +0100 sna: Check for output->randr_output before dereferencing As we may call the ->detect() routines during the fallback initial probing, we need to handle the case where the output callbacks are called before RandR is setup. Regresion from commit 8ecb758697af42e8e68edee0d1945986470a9c04 Author: Chris Wilson Date: Sat Aug 31 19:44:50 2013 +0100 sna: Expand the array of fake outputs if the last is used Reported-by: Andreas Reis Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68843 Signed-off-by: Chris Wilson commit 9ac895fccba72c6d4c0e754ab5298ece7dc8632d Author: Chris Wilson Date: Mon Sep 2 13:03:33 2013 +0100 sna: Process winSize region Sometimes the window size is not a simple box, but a full region. In which case we do need to process it and not just assert that it is a box! Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 962460c0e1a22c3db9c1a25227eb9f1d1f1542d3 Author: Chris Wilson Date: Mon Sep 2 12:33:55 2013 +0100 intel-virtual-output: Probe and automatically enable sibling screens Look for screens on the same display that we can enable automatically. Signed-off-by: Chris Wilson commit f5fdbf6f23c2e90235f511714481bc9250f60020 Author: Chris Wilson Date: Sun Sep 1 17:08:54 2013 +0100 intel-virtual-output: Add missing whitespace, s/while(1)/while (1)/ No functional changes. Signed-off-by: Chris Wilson commit 8654bd7f6670a55b53ad6a7d0f14fe446124d41a Author: Chris Wilson Date: Sun Sep 1 17:07:49 2013 +0100 intel-virtual-output: Restore the lost POLLIN on the timerfd Signed-off-by: Chris Wilson commit 3f03cafcb5f1a5b5a23006ced78a4db5ff6659fb Author: Chris Wilson Date: Sun Sep 1 16:50:22 2013 +0100 intel-virtual-output: Refer to the new memory block after realloc When updating pointers to point into the new memory block after a realloc, it helps to pass the new locations around rather than the old. Signed-off-by: Chris Wilson commit 7e6472cfccb66d961efa3acbdbfa4057413cbcaf Author: Chris Wilson Date: Sun Sep 1 16:44:14 2013 +0100 intel-virtual-output: Rebuild pointers after realloc If reallocs gives us a new memory block, we need to update everything that pointed into the old blocks. Signed-off-by: Chris Wilson commit a41acee7282f007ed8e589395597f8aea3b22361 Author: Chris Wilson Date: Sun Sep 1 13:56:18 2013 +0100 intel-virtual-output: Register as a singleton If the user tries to use multiple commands to combine multiple displays, reroute those to the first instance. Signed-off-by: Chris Wilson commit 3f75e95f26a48929e5b996a825be8a222c07aa6e Author: Chris Wilson Date: Sun Sep 1 11:49:18 2013 +0100 intel-virtual-output: Fix overun with the record Display connection When converting to the auto-extending arrays, I forgot to include room for the extra connection for the recording Display. By using an explicit variable within the global state it is a little more clear. Signed-off-by: Chris Wilson commit 89dc44ae4550162fe12ce0dd68c5e7f072558fc7 Author: Chris Wilson Date: Sun Sep 1 11:46:26 2013 +0100 intel-virtual-output: Prevent cloning the same output twice And prevent cloning the localhost! The caveat is that the transport string (Display name) must match, so it still would be possible to connect to the same display with different transports (local sockets and TCP sockets for socket) and so cause confusion. Signed-off-by: Chris Wilson commit d1d277db9b94b7145347130e564fc3d5713ecd0e Author: Chris Wilson Date: Sun Sep 1 00:45:51 2013 +0100 intel-virtual-output: Manage multiple destination CRTCs Don't try to assign all the remote outputs to the same crtc. Signed-off-by: Chris Wilson commit 47b7e334c1c66f4649b09e08bd93fb112399d1d0 Author: Chris Wilson Date: Sat Aug 31 22:39:18 2013 +0100 intel-virtual-output: Try to hide races with gnome-shell As we try to create VirtualHeads, gnome-shell tries to enable them. Leading to a lot of flashing and extraneous modes appearing. Without being able to grab the screen configuration for the duration of our pruning, there does not seem much we can do other than try and squelch the worst of the errors. Signed-off-by: Chris Wilson commit 7228bd391049be2d07c27dcf88edc2d5bff70898 Author: Chris Wilson Date: Sat Aug 31 21:50:55 2013 +0100 intel-virtual-output: Clone all outputs on the remote display Now that we allocate VirtualHeads on the fly, we can query the list of available outputs on the target display and clone them all, rather than manually passingthe list of outputs to clone. Signed-off-by: Chris Wilson commit 028412faa7bb1d276e1dcdbe485c920acf73a719 Author: Chris Wilson Date: Sat Aug 31 20:58:48 2013 +0100 intel-virtual-output: Third time lucky for computing the correct stride? Aligning a 16-bpp image to a 32-byte boundary is tricky, apparently. Or at least I make it look so. Signed-off-by: Chris Wilson commit 8ecb758697af42e8e68edee0d1945986470a9c04 Author: Chris Wilson Date: Sat Aug 31 19:44:50 2013 +0100 sna: Expand the array of fake outputs if the last is used Always maintain one spare so that we can reconfigure for any number of desired outputs on the fly. Signed-off-by: Chris Wilson commit 57904e8d3d1deef33dd5515f3179b4d60c912712 Author: Chris Wilson Date: Sat Aug 31 18:58:07 2013 +0100 intel-virtual-output: Fix calculation of image stride to include bitmap unit Signed-off-by: Chris Wilson commit 9742ff3ae1696b7a2cc2be1849aedd8894914af4 Author: Chris Wilson Date: Sat Aug 31 18:22:58 2013 +0100 intel-virtual-output: use depth-16 transfers for remote hosts or low bpp targets Avoid up-converting to a depth-24 image and wasting extra bandwidth if either end-point is only using depth-16. Signed-off-by: Chris Wilson commit 6509e46ecac968d177789cd4731e7721bb62f35a Author: Chris Wilson Date: Sat Aug 31 17:08:11 2013 +0100 intel-virtual-output: use XRender for format conversion if required Support rendering between mixed depths by using Render to stage the transfer into our x8r8g8b8 image. An improvement would be to use the gcd intermediate depth so we don't waste bw unecessarily. Signed-off-by: Chris Wilson commit ead32f4a1498c2f7b7c74856e97f9e602ed7a274 Author: Chris Wilson Date: Sat Aug 31 16:13:14 2013 +0100 configure; Remember to disable building the tools If we find that the headers for the tools are not available on the system, simply disable building them as they are not essential features of the driver. Signed-off-by: Chris Wilson commit 8067255dc9185e85b110254ffbea4d9682d3aa2d Author: Chris Wilson Date: Fri Aug 30 20:24:41 2013 +0100 tools: Add intel-virtual-output to extend the local desktop with remote outputs Based on the original implementation (hybrid-screenclone) by Tomáš Janoušek, and Bumblebee integration by Kevin Puetz. intel-virtual-output utilizes local VirtualHeads to present a contiguous desktop to the local display manager, but maps the drawing on those outputs to the remote display, and provides bidirectional RandR proxy so that you can resize the remote display and configure it within your desktop. The remote display should also send hotplug events back to the local desktop, for reconfiguration on the fly. Ideally the remote display is a discrete GPU on the same host so that we can use local Shared Memory transport and avoid sending data over the wire (though it will work in that setup). Ideally you would have userptr support to provide zero-copy rendering between the GPUs, or have dma-buf (in which case you would be using PRIME). For remote rendering, no compression is done so this fares worse than VNC. Signed-off-by: Chris Wilson commit dbf5751b5bc69e2515018a73540d1fb6dddc4502 Author: Chris Wilson Date: Sat Aug 31 00:25:16 2013 +0100 sna: Open the device non-blocking This is essential to prevent deadlocks when running with ZaphodHeads. Signed-off-by: Chris Wilson commit 82dbe3ff81a9f3775f8588c919062317d1cd60a0 Author: Chris Wilson Date: Fri Aug 30 20:23:57 2013 +0100 sna: Mark fake outputs as disconnected until a user applies a mode Hide the fake outputs until they are instantiated by a user. Signed-off-by: Chris Wilson commit 6d99249c580cfb062a05ce1da446410741eb1223 Author: Chris Wilson Date: Fri Aug 30 03:03:58 2013 +0100 sna: Protect against unattached pixmaps when peeking inside for a GPU bo Prevent a NULL dereference for the small system pixmaps. Introduced with commit f22d7f68b8b1bd5caf5ae831fca63eb1e6957520 Author: Chris Wilson Date: Wed Aug 28 14:24:33 2013 +0100 sna/gen6+: Improve ring stickyness for BLT composite ops Reported-by: Sami Farin Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68728 Signed-off-by: Chris Wilson commit 314cfd7353c8c1acd961fdfc8eadbc0d55fa0f01 Author: Chris Wilson Date: Thu Aug 29 21:30:28 2013 +0100 sna/dri: Correct the target_msc for immediate double-buffering We also need to correctly offset the current_msc for the normal pageflip, so rearrange the code flow so that we only do the calculation of target_msc once. Signed-off-by: Chris Wilson commit 68d139388a2a037347fa5c838391e67e006793ee Author: Chris Wilson Date: Thu Aug 29 23:00:05 2013 +0100 sna: Allow user specification of number of VirtualHeads Previously, we instantiated a fake output in case we had a machine with no output. (For certain server-class products.) The Bumblee project were also doing something very similar in order to fake an extended desktop on the Intel igfx and copy portions onto a discrete GPU. (The preferred method for doing this upstream is through the use of PRIME). As the code is very similar, we can support both use-cases simultaneously. This adds the option: Section "Device" Driver "intel" Option "VirtualHeads" "" EndSection to allow the user to specify an additional set of fake outputs, which can then be controlled using xrandr. Signed-off-by: Chris Wilson commit 92a43caab96e7f49c541fb999b75925914d9981a Author: Chris Wilson Date: Wed Aug 28 14:51:09 2013 +0100 sna/gen6+: Don't force a ring switch for likely TLB misses if already busy If the target is already on the render ring, don't force the switch away. Signed-off-by: Chris Wilson commit f22d7f68b8b1bd5caf5ae831fca63eb1e6957520 Author: Chris Wilson Date: Wed Aug 28 14:24:33 2013 +0100 sna/gen6+: Improve ring stickyness for BLT composite ops Rearrange the tests so that we check both src/dst for which rings they are currently on. Signed-off-by: Chris Wilson commit c451a471fbe1553c0273f3bd12f3c1a42f7ce193 Author: Chris Wilson Date: Tue Aug 27 19:06:52 2013 +0100 sna/video: Copy the ClipRegion for the sprite A cut'n'paste error dropped the clip region copy, resulting in the port not being set on the window instead. Signed-off-by: Chris Wilson commit feae741b38445f323cc1ae08f290192c7033f0f0 Author: Chris Wilson Date: Tue Aug 27 18:57:54 2013 +0100 sna/video: Update sprite destination colorkey command The final version that was upstreamed differed from the original version we implemented. The final version allows for both destination/source colorkeying, but left the ddx out of date. Reported-by: Ville Syrjälä Signed-off-by: Chris Wilson commit 6997c4c2bde319fdf73ead8a9c9965f6548545eb Author: Chris Wilson Date: Mon Aug 26 22:07:49 2013 +0100 sna: Promote no COWs assertion to a condition check before operating inplace We can arrive there with a COW and wanting to a CPU mapping, which is unfortunate and requires the indirect path instead. Signed-off-by: Chris Wilson commit 3b267e52a0892ddb7b4a73e9b06555efe9e0b778 Author: Chris Wilson Date: Mon Aug 26 21:58:57 2013 +0100 sna: Fix ordering of assert vs the state it checks It helps to set the state we want to check before actually checking that we set it! Signed-off-by: Chris Wilson commit e98cc0b1ce69a7ebc6b6ef4b916d05b9f73efe0b Author: Chris Wilson Date: Sun Aug 25 23:05:32 2013 +0100 sna: Make sure we assert our Master status before copying the fbcon Being able to read back the fbcon handle as a non-Master process is an information leak that will be fixed. We should already be Master by this point by virtue of the sequence in which we obtain the device fd. However, to be pedagogically correct, call drmSetMaster() before the fbcon copy. Signed-off-by: Chris Wilson commit f62173af1af84e398a92fbe5ae67aa3f20f67060 Author: Chris Wilson Date: Sun Aug 25 14:12:15 2013 +0100 sna/gen7: Combine a couple of pipe-flushes Reduce the number of pipe-controls we emit by combining one of the frequent flushes with a stall. Signed-off-by: Chris Wilson commit c1dbbe69ada3323a82ebd672e9ef47a0d95911c9 Author: Chris Wilson Date: Sun Aug 25 11:26:46 2013 +0100 sna: Make SetScreenPixmap do as it says Make sna_set_screen_pixmap() a little more complete and remove the assertion that the caller manages sna->front. This should make the function easier to reuse. Signed-off-by: Chris Wilson commit 097c2567939f2063749acf0bc768df7bb002d535 Author: Chris Wilson Date: Sun Aug 25 10:49:57 2013 +0100 sna: Add a few more checks for a hosted Xserver before walking CRTC lists If we are hosted, we do not own the CRTC configuration, and deferencing the private data structures believing them to be ours, only leads to disaster. Based on patches by Christopher James Halse Rogers. Reported-by: Christopher James Halse Rogers Signed-off-by: Chris Wilson commit d7e6e9b83ce029e81767de35124b84914ad7d54b Author: Chris Wilson Date: Sun Aug 25 00:55:19 2013 +0100 sna/dri: Prefer the source ring When copying from the DRI client onto the scanout, we return the source buffer back to the client afterwards. Therefore if we force the source to switch rings, we incur a double ring switch from the client to us and back. If we force the dst to switch rings, it will likely be then correct for all subsequent copies as well. Signed-off-by: Chris Wilson commit d4ca1953189d39741bcce659da0d6adcc548ab71 Author: Chris Wilson Date: Sat Aug 24 15:09:06 2013 +0100 sna: Fix reversed logic and loss of trust in the host The test for a hosted Xserver was backwards in commit 306c72cffbd8cd88e93871ee21fa85101198c1ac Author: Chris Wilson Date: Sat Aug 24 14:02:23 2013 +0100 sna: Trust the preferred-depth returned by the host so we failed to load the driver instead. Signed-off-by: Chris Wilson commit 3716345bf45bff785d0786774400eb47e1678caa Author: Chris Wilson Date: Sat Aug 24 14:04:51 2013 +0100 sna: Don't restrict the frontbuffer to be scanout capable if hosted Since we won't be binding it to a framebuffer, we don't care if it is incompatible. Signed-off-by: Chris Wilson commit 306c72cffbd8cd88e93871ee21fa85101198c1ac Author: Chris Wilson Date: Sat Aug 24 14:02:23 2013 +0100 sna: Trust the preferred-depth returned by the host As we are not master and will not be binding the fb, it is irrelevant as to whether our render buffer is actually bindable. Signed-off-by: Chris Wilson commit 7690346248fd8d3460cc07f018827ff55b85d19d Author: Chris Wilson Date: Sat Aug 24 14:00:34 2013 +0100 sna: Don't copy fbcon if hosted When hosted, we have no idea what the right initial contents should be as we are independent of the CRTC and so the existing fb is irrelevant. Plus, not actually being master will cause the attempt to read back the bound framebuffer to fail... Signed-off-by: Chris Wilson commit 8b0d69e76c50155ea404f0e8a97d60a3f710c8a3 Author: Chris Wilson Date: Fri Aug 23 18:53:34 2013 +0100 intel: Add experimental rendernode support Render nodes allow clients full access to off-screen rendering and GPU offload, without assuming any master responsiblities (for device and display management). As they have a more limited interface, they can be used in a more permissive manner. Signed-off-by: Chris Wilson commit 846436c1a26b2c8a9d787ec707edb075fac57ee0 Author: Chris Wilson Date: Fri Aug 23 16:25:08 2013 +0100 sna/dri: Make async blits async again Fixes the regression introduced in commit 6f5fd772c7ca656b86394a0f036d4e0cf5b33d8e [2.21.13] Author: Chris Wilson Date: Thu Jul 25 08:29:55 2013 +0100 sna/dri: Discard the strict checking for stale bo before performing a blit which added the sync request flag along the explicit async blit path. Signed-off-by: Chris Wilson commit fc4e81726d03399bfbbba79d2e76556836f03bd2 Author: Chris Wilson Date: Fri Aug 23 02:25:34 2013 +0100 sna/video: Disable the existing sprite when switching CRTCs After starting a new video on another CRTC, disable the old one as we currently only track the single video port. However, showing a video split across multiple CRTCs would be a useful extension in the future. Signed-off-by: Chris Wilson commit 509e7aaf8446f568e133e1b450ea13f73e9b366b Author: Chris Wilson Date: Fri Aug 23 02:10:11 2013 +0100 sna/gen7: Prefer the render ring for more operations As we get more well-endowed GPUs with ever more execution units, it becomes advantageous to do even basic copies through the render ring. However, the extra performance comes at a cost - higher power usage. To mitigate this, we apply a heuristic of only allowing a switch over to the render ring if the render ring is already active with an early request (in addition to the usual stall avoidance and general performance heuristics). Signed-off-by: Chris Wilson commit f57ce6ef9ca735d5cb428b2f12f1f9413a70506a Author: Chris Wilson Date: Wed Aug 21 12:20:29 2013 +0100 2.21.15 release commit ed40a7c3de3bbb178278c05907e59239712b98b6 Author: Chris Wilson Date: Sun Aug 18 14:33:44 2013 +0100 sna/gen6+: Tweak semaphore avoidance for composite operations Signed-off-by: Chris Wilson commit 4486ae2d829781e32652bce84c08e63ee1960bf0 Author: Chris Wilson Date: Sun Aug 18 10:11:49 2013 +0100 sna: Do not force use of the CPU bo if replacing a busy GPU bo To minimise waiting for the SHM pixmap afterwards. Signed-off-by: Chris Wilson commit f1cbf13bb1ad7432d681ef7cbbc17bcf2d23c554 Author: Chris Wilson Date: Sat Aug 17 23:37:57 2013 +0100 sna/video: Initialise the UV offsets to 0 for packed formats Signed-off-by: Chris Wilson commit db41bec0fd4dc8eec1f44a988f1c5a531594604f Author: Chris Wilson Date: Sat Aug 17 23:33:17 2013 +0100 sna/video: Return the planar offset calculations to the planar branch They where accidentally move the packed branch in commit 85e89f2121bad96d34ff8df9456e2fbaa9ff7881 Author: Chris Wilson Date: Fri Aug 16 21:11:33 2013 +0100 sna/video: YUV420 is not supported by sprites, replace it with a RGB passthrough Signed-off-by: Chris Wilson commit fed9ca236a0b5bbd7f1d137aa4ef9c2caf26719c Author: Chris Wilson Date: Fri Aug 16 22:43:26 2013 +0100 sna/video: Turn off passthrough if given a zero name Signed-off-by: Chris Wilson commit 18e274425d728baa62445dc091cae6b1eab94a89 Author: Chris Wilson Date: Fri Aug 16 21:58:29 2013 +0100 sna: Make sure that external scanouts are immediately discarded An issue with passthrough Xv buffers is that they end up in the scanout cache and potentially reused instead of being immediately discarded. Signed-off-by: Chris Wilson commit 6692077aca2dcb7754b23b6404ff2db2f70228dc Author: Chris Wilson Date: Fri Aug 16 21:55:16 2013 +0100 sna/video: Keep a ref to the passthrough overlay bo Otherwise we will destroy it at the end of the frame whilst it is still meant to be shown. Not normally an issue as the next frame is show before it vanishes, but is if the image is shown for an extended period of time. Signed-off-by: Chris Wilson commit d8c9b2c85256c870f9677a590f190856826c821c Author: Chris Wilson Date: Fri Aug 16 21:47:25 2013 +0100 sna/video: Mark the sprite color key as changed when disabling Otherwise we will forgot to send the command to turn off the colorkey. Signed-off-by: Chris Wilson commit 85e89f2121bad96d34ff8df9456e2fbaa9ff7881 Author: Chris Wilson Date: Fri Aug 16 21:11:33 2013 +0100 sna/video: YUV420 is not supported by sprites, replace it with a RGB passthrough As YUV420 is not supported by any of the current sprite implementations drop it. Instead implement some RGB passthroughs. Signed-off-by: Chris Wilson commit c610d37dae7e025027fd09a6889bf94853af8b8c Author: Chris Wilson Date: Fri Aug 16 18:22:45 2013 +0100 sna/video: Expose an attribute to keep the overlay always on top Signed-off-by: Chris Wilson commit 7a6bd55da90382459db072bffbd4aa36d18f9a17 Author: Chris Wilson Date: Fri Aug 16 15:38:18 2013 +0100 sna/video: Don't assert on a client error, return BadAlloc If the client sends a BO that is too small to satifsy the PutImage, then reject with BadAlloc rather than die with an assert. Signed-off-by: Chris Wilson commit cb35a0b19a4a1c9ac4e2bb552a61057c215ce890 Author: Chris Wilson Date: Fri Aug 16 08:47:16 2013 +0100 uxa: Restore the lost copyright block after splitting i965_reg.h from i915_reg.h Reported-by: "Lim, Siew Hoon" Signed-off-by: Chris Wilson commit 445f205a18f7548aa97b04379ff66a4fafb3f79c Author: Chris Wilson Date: Thu Aug 15 00:28:25 2013 +0100 sna: Clip the tiled copy during framebuffer resize If we use the BLT for copies, then we need to supply correctly clipped coordinates. Signed-off-by: Chris Wilson commit 6bd897157b34e3b80dea68fa615d0fba08238486 Author: Sedat Dilek Date: Wed Aug 14 10:01:13 2013 +0200 Correct misspelled caching Signed-off-by: Sedat Dilek commit 5d29daa7df72d9a96e044d0706f3014811389629 Author: Chris Wilson Date: Wed Aug 14 18:16:22 2013 +0100 sna: Make sure the frontbuffer exists before doing pitch checks An unusual path to be sure, to call sna_crtc_set_mode_major before we create a GPU bo for the scanout - but might be possible after a GPU hang, or it appears after trying to set a 0x0 mode. At any rate, make sure the GPU bo exists before dereferencing. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xorg-server/+bug/1212344 Signed-off-by: Chris Wilson commit a0f90a4c79799780592c004c846a963aad5f28e6 Author: Chris Wilson Date: Wed Aug 14 18:12:15 2013 +0100 sna: Rename sna_pixmap_get_bo() Mark how dangerous this function is by giving it a __ prefix. Signed-off-by: Chris Wilson commit 2be9118e882f59591dc0fb9b98ec25494f020bb4 Author: Chris Wilson Date: Wed Aug 14 17:48:13 2013 +0100 sna: Tile the old image onto the new framebuffer when enlarging This improves the transition from going from a mirrored fbcon framebuffer to an extended mode. Signed-off-by: Chris Wilson commit 394978867edf3746c285491db6be41abfe325d87 Author: Chris Wilson Date: Wed Aug 14 08:38:52 2013 +0100 sna: Check that we successfully install the required hosting midlayer Signed-off-by: Chris Wilson commit 3d818c0a36919add462c05d01a64b297f693fa69 Author: Chris Wilson Date: Wed Aug 14 08:34:46 2013 +0100 sna: unwrap old modesetting API whilst hosted If we are hosted, then we do not have our own modesetting backend and calling it results in fireworks. So leave the old modesetting entry points for the hosting midlayer to control. Signed-off-by: Chris Wilson commit 504b18b079e0a12a9d18b46418411805ef1d8377 Author: Chris Wilson Date: Tue Aug 13 11:01:03 2013 +0100 sna: Fix the assertions for the composite fb path Having updated the offsets for the dst, we also need to update the assertions. Signed-off-by: Chris Wilson commit 5840bfe285e3fd9dc550cbe5fa87437870c92038 Author: Julien Cristau Date: Mon Aug 12 19:31:53 2013 +0200 Link the driver against pixman commit b2df6cc8f0bcac6311f2b1d0c008add9b7d05787 Author: Julien Cristau Date: Mon Aug 12 14:45:04 2013 +0200 configure: use CPPFLAGS for xaa.h check, not CFLAGS CFLAGS aren't passed to the preprocessor, which then can't find the header. Signed-off-by: Julien Cristau commit d661332de946c356c10a75e29a48f2c2e3599fec Author: Julien Cristau Date: Mon Aug 12 14:38:22 2013 +0200 Check for struct sysinfo as well as Non-linux glibc systems have the latter but not the former. Signed-off-by: Julien Cristau commit 5775731b6489c63212914163f51b7a576df70658 Author: Chris Wilson Date: Mon Aug 12 22:24:47 2013 +0100 sna/glyphs: Do not attempt to release the negative cache lookup Following commit 021c59f6243c51871f664e5fdd43aa00a809033a Author: Chris Wilson Date: Sat Aug 10 13:15:48 2013 +0000 sna/glyphs: Micro-optimise glyph drawing we need to be careful during sna_glyph_release() that the atlas points into the glyph cache before releasing it. Fortunately caught by an assertion. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit 8da8c88e999d74fb110dddd497f03854adc089cc Author: Chris Wilson Date: Mon Aug 12 13:12:21 2013 +0100 intel: Check for HW_SKIP_CONSOLE before use For the older xserver. Signed-off-by: Chris Wilson commit 4abc9c317b1f79f3f3d687fcf2d255b4d7416c2c Author: Chris Wilson Date: Mon Aug 12 13:10:05 2013 +0100 configure: Correct the spelling of XORG_TESTSET_CFLAGS Reported-by: Julien Cristau Signed-off-by: Chris Wilson commit ce666270c8861e039a06718cc3e9093d63d15187 Author: Chris Wilson Date: Mon Aug 12 13:07:03 2013 +0100 sna: Fix use of obsolete this_atlas in a DBG message Signed-off-by: Chris Wilson commit b3cb8b209d0515c54e1126f8ed6adf3cf7fbf3bd Author: Chris Wilson Date: Mon Aug 12 13:05:00 2013 +0100 configure: Fix reversed check for XORG_TESTSET_CFLAG Signed-off-by: Chris Wilson commit 9645e71cb2580adb78bea1cfa70dfc3f66630834 Author: Chris Wilson Date: Mon Aug 12 11:28:03 2013 +0100 sna: Reorder composite fallback migration to handle src==dst || mask==dst Order is important when moving and marking damaged regions. Signed-off-by: Chris Wilson commit e8dfc5b3f4ffeec93e52a5319b5a3118edf0e94e Author: Chris Wilson Date: Mon Aug 12 10:33:41 2013 +0100 sna: Fix destination offset along memcpy composite fallback fastback The application of dst_x|y was incorrect, and so the drawing could end up in the wrong location for a window. References: https://bugs.freedesktop.org/show_bug.cgi?id=66990 Signed-off-by: Chris Wilson commit 8d48a43ed956ff21d779aff1a11a0f7bf6b65bcb Author: Chris Wilson Date: Sun Aug 11 11:49:04 2013 +0100 sna/gen7: Refine ring selection Don't force us to select BLT too early if we allow ring switching. As the RENDER ring benefits from more cacheing over time (e.g. HSW:GT3e) it becomes much more preferable to use it over the BLT. Since we already have the logic to decide if ring switching is possible/preferred, relax the initial checks on where the current activity is to allow switching between batches. Signed-off-by: Chris Wilson commit 6f3999f38c71689298ac44e5b64830f754199740 Author: Chris Wilson Date: Sat Aug 10 19:44:00 2013 +0100 sna: Avoid confusing conflicting CRTC probes vs a DRM race Only bail we fail to find the CRTC for this output amongst the allowed set for this ZaphodHead - but allow us to find an invalid CRTC. Signed-off-by: Chris Wilson commit 6cd366b79ad15be608f829e884b4880c311cf58b Author: Chris Wilson Date: Sat Aug 10 17:55:07 2013 +0000 sna: Remove the redundant clearing of kgem at startup struct kgem is contained within a cleared superstruct. Signed-off-by: Chris Wilson commit b364305b16d79e32592235004872d38406ce8e9d Author: Chris Wilson Date: Sat Aug 10 13:41:46 2013 +0000 sna/glyphs: Micro-optimise glyphs-to-dst Signed-off-by: Chris Wilson commit 021c59f6243c51871f664e5fdd43aa00a809033a Author: Chris Wilson Date: Sat Aug 10 13:15:48 2013 +0000 sna/glyphs: Micro-optimise glyph drawing When you don't have many cycles to play with, every one counts. Here we make sure we cache negative lookups for large glyphs. Signed-off-by: Chris Wilson commit 4d5483c253a9a29f54f2eed9b40623c8e9de6c22 Author: Chris Wilson Date: Sat Aug 10 08:59:33 2013 +0100 sna: Tune pixmap_inplace() not to use a pinned busy GPU bo for replacement Obviously we can only replace the bo if it is not pinned and so just incur a stall when we could have instead rerouted the rendering through its CPU bo. Signed-off-by: Chris Wilson commit de379943b49b94cc065fd55ad7ca1067e1802a31 Author: Chris Wilson Date: Fri Aug 9 16:37:29 2013 +0100 sna: Allow LLC to reuse any active write buffer The inplace write distinction is not important on LLC, so pick any buffer that is on the GPU and available for reuse. Signed-off-by: Chris Wilson commit 821b34f5db2936394e8969b15c1cdd5144acf6e3 Author: Chris Wilson Date: Fri Aug 9 14:55:09 2013 +0100 sna: Squelch a "valid" mode without a dotclock There is yet another race in drm initialisation where X is starting long before the drm device is completely ready, and is being told that the output has a valid mode, but with bogus settings. Ignore it, and hope it comes to its senses later on. Signed-off-by: Chris Wilson commit b6b5c3f009585151eb772dfc2526843c7cee82b3 Author: Chris Wilson Date: Fri Aug 9 11:34:39 2013 +0100 intel: Disable incompatible features whilst hosted Start adding the infrastructure to disable direct hardware access if X is being run under a system compositor (aka "hosted"). Signed-off-by: Chris Wilson commit ab445c23079a76eaa2a7d499ec4755599012bd2f Author: Chris Wilson Date: Fri Aug 9 10:39:22 2013 +0100 sna: Rewrite the can-mmap-cpu test to handle stolen unclaimed bo Signed-off-by: Chris Wilson commit f1d3d1f8c677b938362eee8b9f4e81f5463bc16a Author: Chris Wilson Date: Fri Aug 9 10:07:59 2013 +0100 sna: Check for EINVAL after mmapping I want to catch this error as it happens to see which (stolen) bo is being erroneously mmapped. Signed-off-by: Chris Wilson commit 039a64e89e0323bd02eec24fba21a3924ee5cc31 Author: Chris Wilson Date: Fri Aug 9 09:13:10 2013 +0100 configure: Only use XORG_TESTSET_CFLAG if defined Repairs the build for f16 which has an older version of xorg-macros. Fortunately, as it doesn't define XORG_TESTSET_CFLAG it also doesn't use it generate noisy output. Signed-off-by: Chris Wilson commit 31b4110b5119ad1643f3e75c5e23a44c4ceb30fe Author: Chris Wilson Date: Thu Aug 8 22:25:57 2013 +0100 sna: Use create2 to allocate a DISPLAY bo even if we have not enough stolen Signed-off-by: Chris Wilson commit 0f82c1a451a2d5763d9cf53b48f55200f7716966 Author: Chris Wilson Date: Thu Aug 8 22:05:34 2013 +0100 sna: Always reuse scanout bo where possible When looking for an inactive scanout and all are busy, select the oldest for reuse. Signed-off-by: Chris Wilson commit bd7e653e1ee009e225b0bbf60dcaebc9b0fa2788 Author: Chris Wilson Date: Thu Aug 8 22:03:16 2013 +0100 sna: Avoid leaking stolen framebuffer bo Framebuffers created from stolen bo were not being released and so the kernel would keep the fb and bo alive, causing the memory to be remain unreusable whilst X lived and us to leak all available stolen memory. Signed-off-by: Chris Wilson commit 097669cd728e612bf3e3c531b83892e37481ee7b Author: Chris Wilson Date: Thu Aug 8 20:44:24 2013 +0100 sna/dri: Do not create a scanout-capable buffer if not flipping Avoid paying the penalty of creating an uncached buffer if we never intend to flip to it. Signed-off-by: Chris Wilson commit cbf1f97d5dadbf569c7d26e78899bda95b28b16d Author: Chris Wilson Date: Thu Aug 8 19:43:24 2013 +0100 configure: Include the experimental features in the configuration summary Signed-off-by: Chris Wilson commit fcac4f7f2b8d06cf2451609739ea342e5e3bfd5a Author: Chris Wilson Date: Thu Aug 8 14:52:26 2013 +0100 sna: Only use the experimental create2 if we support DISPLAY cacheing as well Signed-off-by: Chris Wilson commit c6add09791a44d9b3af79d50f52e6913c46341a8 Author: Raul Fernandes Date: Thu Aug 8 09:26:59 2013 +0100 Micro-optimise box intersections We can shave a few instructions off the routine by incrementally performing the "is-empty" check as soon as we compute the intersection in each dimension. commit c01c66bca2c64ae2d77233b6ccdca26431ee51b8 Author: Chris Wilson Date: Wed Aug 7 10:35:04 2013 +0100 sna: Update experimental create2 struct definition Signed-off-by: Chris Wilson commit 6004870d53221caf05a330fcfc8a72e68b2b8898 Author: Dave Airlie Date: Tue Aug 6 13:03:18 2013 +1000 configure.ac: fix dri enabled with kms only picked Otherwise we'd fail saying DRI1 wasn't possible, when that is exactly what we asked for. [ickle: The breakage was introduced with commit bd6ffd1ad2f903215d2c631252e742a0f6893054 [2.21.14] Author: Chris Wilson Date: Sat Jul 27 15:33:19 2013 +0100 configure: Print a summary of compilation options which modified the search to only take place if UMS was enabled, but missed mollifying the resulting error.] Signed-off-by: Dave Airlie commit a875ba39bea4a951e8cf1450ba9722b7cda95943 Author: Chris Wilson Date: Mon Aug 5 16:15:48 2013 +0100 sna: Rename the attribute macro __packed__ to avoid clang barfing Using __packed__ as shorthand for ___attribute__(__packed__) confuses clang as. (I guess to it expands (__packed__) which gcc skips.) As clang also uses packed in its builtins, we have to find a compromise, and so tightly_packed wins for being a more verbose description without the dangerous leading underscores. Signed-off-by: Chris Wilson commit 2536ad044b259eb3ce3e7b1ccf2c59ab3fe37d06 Author: Chris Wilson Date: Sun Aug 4 12:50:41 2013 +0100 sna: Tweak threading thresholds Signed-off-by: Chris Wilson commit 2cdd57c804706bcf558d16d3370c1880ef482af1 Author: Chris Wilson Date: Sun Aug 4 11:43:54 2013 +0100 sna/trapezoids: Some minor DBG to investigate threaded rendering Signed-off-by: Chris Wilson commit 1f7e20d812ef46fa0cba492e06a8f9f5a326d3c5 Author: Chris Wilson Date: Sun Aug 4 12:26:36 2013 +0100 sna: Define fast function attribute for old gcc or other compilers Also written by Mark Kettenis and reported by Sedat Dilek. Signed-off-by: Chris Wilson commit 0cd154039ab02799dc972d93c415e762226df1aa Author: Chris Wilson Date: Sun Aug 4 10:30:14 2013 +0100 2.21.14 release commit a5bf389908934aa4f9493a4a35b18e4aec9c8103 Author: Chris Wilson Date: Sat Aug 3 14:54:31 2013 +0100 sna: Mark the entire userptr proxy chain as flush/non-reusable Fixes cache bookkeepping when mixing userptr uploads. Signed-off-by: Chris Wilson commit 5287660aafe45859c07874c22dca99c1ff5e555a Author: Chris Wilson Date: Fri Aug 2 13:18:12 2013 +0100 sna: Reserve relocation entries for the deferred VBO Whilst we reserved exec entry slots for the deferred VBO, there were no relocation spaces reserved. So if we submitted a render command followed by a multitude of BLT copies, we could then overrun the relocation array when adding the deferred vbo to the batch. Reported-by: Danny Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67504 Signed-off-by: Chris Wilson commit 3f04b6f33f05f8a24698f934a23462269b84917d Author: Chris Wilson Date: Thu Aug 1 14:49:36 2013 +0100 sna/dri: Disable TripleBuffering by default for compositors Ideally, the method of swapping is something that the applications have control over, along with how to synchronise to the vertical refresh. Whilst triple buffering is good to reduce jitter for games (at the cost of an extra frame of latency, usually considered a good tradeoff), it prevents the applications from accurately controlling the presentation of animations. One vocal critique is Owen Taylor, who demands accurate swap control for smooth animations in gnome-shell. For example, http://blog.fishsoup.net/2012/11/28/avoiding-jitter-in-composited-frame-display/ In lieu of application control, just apply a quirk for the compositor. Everyone else will just have to wait for DRI3. Signed-off-by: Chris Wilson commit 0ae07158c3550b418d3596cacda33a64ee653790 Author: Chris Wilson Date: Thu Aug 1 11:01:14 2013 +0100 sna: Add a few more details to the log for mode switching Signed-off-by: Chris Wilson commit 246911d742569eed6675698c1e51032ba50917d3 Author: Chris Wilson Date: Thu Aug 1 10:52:44 2013 +0100 sna: Don't force inline string-ops for the general memcpy_blt routine As we need optimal copy code for the general case, where unlike swizzling the run lengths are not known before hand, we need to call the arch specific routines from glibc. Signed-off-by: Chris Wilson commit 8174c56c3ad6f1b0e6cd432c888f3eaca91159b4 Author: Chris Wilson Date: Thu Aug 1 09:19:17 2013 +0100 sna/glyphs: Allow glyphs-to-dst to discard CA masks for a8 glyphs Signed-off-by: Chris Wilson commit c5e3b66c27e8960a39ba0fc9108e04a67e1c2d98 Author: Damien Lespiau Date: Wed Jul 31 18:50:51 2013 +0100 uxa/display: Keep the EDID blob around for the lifetime of an output xf86InterpretEDID() doesn't copy the EDID raw data in xf86MonPtr but just stores the given pointer. The DDX driver needs to make sure that data stays valid. Signed-off-by: Damien Lespiau commit 278ee155d572d3132d27823bb69995a8cc61c2c0 Author: Chris Wilson Date: Wed Jul 31 17:01:47 2013 +0100 sna: Relax readback constraint for CPU mappings of scanouts Signed-off-by: Chris Wilson commit bfe25b8110fc4d4761b57e3ec07b8467890b90a1 Author: Chris Wilson Date: Wed Jul 31 11:00:21 2013 +0100 sna: Fix interaction between WT mapping of scanouts and allocating from stolen If we allocate the scanout from stolen, we cannot then access it via the CPU - so prevent the mapping in those cases. Signed-off-by: Chris Wilson commit 493763301e995d02cb838d14348da46dd26444af Author: Chris Wilson Date: Tue Jul 30 17:38:23 2013 +0100 sna: Allow CPU access to scanouts if WT cached On Iris, we may store the framebuffer in the eLLC/LLC and mark it as being Write-Through cached. This means that we can treat it as being cached for read accesses (either by the GPU or CPU), but must be careful to still not write directly to the scanout with the CPU (only the GPU writes are cached and coherent with the display). Signed-off-by: Chris Wilson commit cdbc097796b24ab42b60c49d9885a35573c96a89 Author: Chris Wilson Date: Tue Jul 30 16:42:54 2013 +0100 sna/gen7: Set appropriate constants for Haswell GT3 GT3 has twice the number of cores and URB as GT2, and so we can use more threads and URB entries. Signed-off-by: Chris Wilson commit 9a390c77dc83909c9a05161d91678a87dd6a0d34 Author: Chris Wilson Date: Tue Jul 30 14:07:45 2013 +0100 sna/gen4: Hide an unused function Whilst we are force flushing vertexes we are not using the threaded emitter, so simply hide it from the compiler to prevent it warning about the unused function. Signed-off-by: Chris Wilson commit a3eea6e61e15a147165400c81eab82a14a9ce2fe Author: Chris Wilson Date: Tue Jul 30 13:22:54 2013 +0100 Suppress misleading warnings for -Wmaybe-uninitialized All the curent reports by gcc are false positives. Instead we have better static analysis tools at our disposal and valgrind. Signed-off-by: Chris Wilson commit 208282d31657f2b718e151397d16b307cdf8f77b Author: Chris Wilson Date: Tue Jul 30 13:19:27 2013 +0100 Suppress a bunch of compiler warnings for using constant strings We want these allocated in ro memory even if the antique API complains. Signed-off-by: Chris Wilson commit 7e3445a330340c1aa2ca5a13d838344438336749 Author: Chris Wilson Date: Tue Jul 30 11:17:52 2013 +0100 sna/dri: Tidy up applying damage to the Pixmap when copying regions Now that we are doing a true move-to-gpu first, we can drop the hacks from damage(). Signed-off-by: Chris Wilson commit c507f621c932393a8b87912f71a86e29a8c1c190 Author: Chris Wilson Date: Mon Jul 29 23:54:31 2013 +0100 sna: Suppress a few harmless warnings Mostly of the only used in debugging path variety. Signed-off-by: Chris Wilson commit cf7d36455fc43e88697f4fb8fd865f3259ba0d1a Author: Chris Wilson Date: Mon Jul 29 23:49:08 2013 +0100 intel: Suppress some extremely noisy warnings Warning about redundant declarations within the xorg headers hides genuine warnings in our own code - disable them until the headers are cleaned up. Signed-off-by: Chris Wilson commit d7465ece29c9ae665a5a9f5bdac764a19062786e Author: Chris Wilson Date: Mon Jul 29 21:55:29 2013 +0100 sna: Cleanup along all error paths in sna_pre_init() Only one out of a dozen error paths actually freed the locally allocated memory, oops. Signed-off-by: Chris Wilson commit 5751b9f1f5beb943db8cb5d260379ae39eb18db4 Author: Chris Wilson Date: Mon Jul 29 14:44:51 2013 +0100 sna/dri: Prevent stale DRI buffers from a NULL dereference If the DRI buffer is stale, the drawable may have been recreated and no longer be associated with DRI. In this case, the pixmap may not be on the GPU, so just subsitute the client's old bo and hope the it catches up and does a GetBuffers in the near future. Signed-off-by: Chris Wilson commit 8619db7224f5c3ec417a1d00a68e981549366adc Author: Egbert Eich Date: Mon Jul 29 13:52:54 2013 +0200 Add support for the dell backlight interface Signed-off-by: Egbert Eich [ickle: Add the failsafe to sna as well.] commit c9d89499806779cd6c62d5d6d34df76279cc5abd Author: Chris Wilson Date: Mon Jul 29 11:51:39 2013 +0100 sna: Composite region is already in dst drawable space So do not offset it again when processing the fallback composite operation. Regression from commit 6921abd81017c9ed7f3b2413784068fbc609a0ea Author: Chris Wilson Date: Thu Jul 18 16:21:27 2013 +0100 sna: Add a fast path for the most common fallback for CPU-CPU blits References: https://bugs.freedesktop.org/show_bug.cgi?id=66990 Signed-off-by: Chris Wilson commit 3cb75950a90c28690f78fd3bf93ff8e23e5d543a Author: Chris Wilson Date: Mon Jul 29 11:03:43 2013 +0100 uxa: Fix incorrect include path Signed-off-by: Chris Wilson commit 1dd79c225cedf5614a77e5db9f9d9700bf957bb8 Author: Chris Wilson Date: Wed Jul 24 14:06:05 2013 +0100 sna: Restore driver info upon FreeScreen Signed-off-by: Chris Wilson commit b0826907dd7844c03080421d79e5f927b1245833 Author: Chris Wilson Date: Sun Jul 28 18:32:47 2013 +0100 sna: Fix limit on stipples to only use immediate operands for <= 32 dwords The check was still based on bytes after the len had been converted to dwords. Signed-off-by: Chris Wilson commit 5e9decc963e01d6e558355af97314c502e314000 Author: Chris Wilson Date: Sun Jul 28 16:42:14 2013 +0100 uxa: Add the missing include to silence the compiler warning Silence compiler warning for no prior declaration of intel_init_scrn(). Signed-off-by: Chris Wilson commit f97b55d283e2fc333e93c88b18d5f3412f87c67b Author: Chris Wilson Date: Sun Jul 28 16:31:57 2013 +0100 intel: Remove the unused SDV PCI IDs As a first step towards working out what to do with the remaining used-once PCI IDs, delete the used-never ones. Signed-off-by: Chris Wilson commit 679416f9a5e949e6f15a5e8712921731a1750cbd Author: Chris Wilson Date: Sun Jul 28 15:45:29 2013 +0100 sna: Allow PutImage to utilise userptr for busy targets Typically, PutImage is not a performance critical path since ShmPutImage uses CopyArea and so PutImage is relegated to small one off transfers. Signed-off-by: Chris Wilson commit bd6ffd1ad2f903215d2c631252e742a0f6893054 Author: Chris Wilson Date: Sat Jul 27 15:33:19 2013 +0100 configure: Print a summary of compilation options Signed-off-by: Chris Wilson commit d92b5ddcff03a593270d060187b56ee2aa8e09b3 Author: Chris Wilson Date: Sun Jul 28 12:10:23 2013 +0100 sna/gen7: Prefer GPU spans for Baytrail as well Signed-off-by: Chris Wilson commit 0b68f1741fe360b0ba10421866aed8fffeea44e7 Author: Chris Wilson Date: Sun Jul 28 12:09:49 2013 +0100 sna/gen7: Use ivb/byt/hsw shorthand for generation checking Signed-off-by: Chris Wilson commit 0e2a1c27b7d7cd5b305fb092a27ef57ba266aebd Author: Chris Wilson Date: Fri Jul 26 15:38:20 2013 +0100 sna/gen7: Rename Valleyview to Baytrail The codename changed midcycle - along more rational lines (all the chips within the platform are now part of the Baytrail family rather than different codenames for each). Signed-off-by: Chris Wilson commit 8d10c32d650df36019d55cfc2e31d7641be4032d Author: Chris Wilson Date: Fri Jul 26 15:37:24 2013 +0100 sna/gen7: Set appropriate thread counts for Valleyview^Baytrail Signed-off-by: Chris Wilson commit a84a9fcb5e1218f685e4469dbe00f8f29cc36bf5 Author: Chris Wilson Date: Fri Jul 26 10:41:00 2013 +0100 intel: Remove the unused bridge PCI-IDs Signed-off-by: Chris Wilson commit 8afb5438f3479df39752cbda680c13d80f81f42f Author: Chris Wilson Date: Fri Jul 26 10:25:36 2013 +0100 intel: Always define the PCI-IDs If the macros conflict with another definition on the system, that is actually a useful warning in this case as it means there exists a typo somewhere. Signed-off-by: Chris Wilson commit a12c352b56e742b8f8aca4d8ca9efa26f268817b Author: Chris Wilson Date: Fri Jul 26 10:14:11 2013 +0100 intel: Remove some unused macros Signed-off-by: Chris Wilson commit e94f66c951ae9e0d4304cf8005537a147bda5d79 Author: Chris Wilson Date: Fri Jul 26 10:07:23 2013 +0100 intel: Move some backend specific macros out of the common header All the IS_GEN/IS_DEVICE are only used by the UXA backend, so move them to its headers. Signed-off-by: Chris Wilson commit 04d5c33b9677fc920ad58522f93d832a42de4744 Author: Chris Wilson Date: Fri Jul 26 10:19:43 2013 +0100 uxa: Colocate architecture source files with backend implementation sources i.e. move the toplevel uxa/*.[ch] into src/uxa/*.[ch] Signed-off-by: Chris Wilson commit 45d4e8dcf9aee37015b1ee026997ed4dabdf112e Author: Chris Wilson Date: Fri Jul 26 09:35:06 2013 +0100 uxa: Clear up the common intel directory Move all the UXA backend specifc files into their own subdirectory. Signed-off-by: Chris Wilson commit ab28526ea43728fb675448515e1519a970fb5f56 Author: Chris Wilson Date: Thu Jul 25 21:55:21 2013 +0100 intel: Only print the unique chipset names When printing out the list of supported chipsets, remove the (many times) repeated names as they are very confusing and obscure the product name you may be searching for. Signed-off-by: Chris Wilson commit 6fd37e644d9c662776aff14cd51a27b7e52472de Author: Chris Wilson Date: Thu Jul 25 22:10:43 2013 +0100 intel: Replace the codename in the user facing string for unknown Haswell parts For these parts we do not yet known the correct marketing name, so replace our use of the codename with the generic term. Signed-off-by: Chris Wilson commit 7567c99ee93f560cde33842cffa26a1ad6677600 Author: Chris Wilson Date: Thu Jul 25 21:40:02 2013 +0100 intel: Set the correct marketing names for Ironlake, Sandybridge and Ivybridge Signed-off-by: Chris Wilson commit 17873be335aea223e93170c9ba6819ab6877b86b Author: Chris Wilson Date: Thu Jul 25 21:37:05 2013 +0100 intel: Remove the SDV from the list of identified chipsets These devices are not for retail and so have no marketing names. Signed-off-by: Chris Wilson commit 4c6871684b0006a89be6760db99fda9b47790226 Author: Chris Wilson Date: Thu Jul 25 23:19:02 2013 +0100 intel: Cross-check an unnamed chipset against the list of known PCI-IDs If we recognise the PCI-ID but do not have a marketing name for it, it means we are deliberating ignoring it - presumably because it is an engineering sample. In this case, we do not want to print out a warning into the logfile so replace the "Unknown chipset" with some info about the future product. Signed-off-by: Chris Wilson commit b6bcb7ae20b92e48b8a2fa096c0e33b6b97b1b30 Author: Chris Wilson Date: Thu Jul 25 21:22:25 2013 +0100 intel: Source our PCI IDs table from the copy in the kernel Rather than duplicating the information we already use in the kernel, we can reuse the pci-id tables so long as we apply a little fuzz. Signed-off-by: Chris Wilson commit bb8484da487008df8b69beb8086167bc272e85bb Author: Chris Wilson Date: Sat Jul 27 16:28:22 2013 +0100 2.21.13 release commit 95e172b365365e9189dd863f1033bc6ea036a713 Author: Chris Wilson Date: Sun Jul 28 12:25:16 2013 +0100 sna/dri: correct DBG typo Signed-off-by: Chris Wilson commit c51cb32b6edbfc9b95cbb5e72a13ac42fdc745ed Author: Chris Wilson Date: Sat Jul 27 16:28:45 2013 +0100 test/dri2: We do not require the GLX includes Drop the GLX includes as they are not needed and obviously break if the GLX are not present on the system (and we fail to check during configure). Signed-off-by: Chris Wilson commit b4dbdd28ae05839645912f8aeb5100f6d05f11a1 Author: Chris Wilson Date: Fri Jul 26 15:49:00 2013 +0100 sna: Try the indirect upload if we elect to use a mmap and it fails This allows us to avoid the occassional kernel bug if mmap() fails and the upload is possible via our indirect upload paths. Signed-off-by: Chris Wilson commit 6f5fd772c7ca656b86394a0f036d4e0cf5b33d8e Author: Chris Wilson Date: Thu Jul 25 08:29:55 2013 +0100 sna/dri: Discard the strict checking for stale bo before performing a blit Instead of checking that the DRI2Buffers match up with the current DRI2Drawable, clip the area that is being copied to the minimum extents of the Drawable, source and destination buffers. This ensures that we never read nor write beyond the extents of the allocated or visible regions. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67210 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67305 Signed-off-by: Chris Wilson commit ef2a45731ef55b9fbafe5da67e0251b9b871bda9 Author: Chris Wilson Date: Wed Jul 24 19:44:15 2013 +0100 sna/dri: Restore the comparison of bottom-right extents to the pixmap origin This reverts a portion of commit 6d80bd6a73 so that we do not compare an offset redirected window against its outer frame (e.g. glxgears in a 300x300 under unity sits within a much larger ~330x330 frame). References: https://bugs.freedesktop.org/show_bug.cgi?id=67210 Reported-by: Joseph Yasi Signed-off-by: Chris Wilson commit 42862298bc4d8588433abc8ac3b1ff65ec20e30d Author: Chris Wilson Date: Wed Jul 24 10:15:09 2013 +0100 sna: Remove bogus comment concerning sna_enter_vt This bogus comment confused both Chris Halse Rogers and myself. Suggested-by: Christopher James Halse Rogers Signed-off-by: Chris Wilson commit 6d80bd6a7311926f258cd92f0b22e8d03022b62b Author: Chris Wilson Date: Wed Jul 24 09:03:45 2013 +0100 sna/dri: Cleanup validation of blit extents Prompted by a suggestion by Haihao, clarify the intent behind checking the incoming maximum blit extents against the recorded sizes of the attached bo. Due to the asynchronous nature of DRI2 invalidation, it is possible for the DRI2 buffer to be stale and for its bo to be smaller than required for the client's blit. References: https://bugs.freedesktop.org/show_bug.cgi?id=67210 Signed-off-by: Chris Wilson Cc: haihao commit 74dd10d252df2d826b6db5da7e53bd7c5d76dec0 Author: Chris Wilson Date: Tue Jul 23 09:37:15 2013 +0100 sna/gen5: The cached value of the pipelined pointers key requires 32-bits Storing only the low 16-bits of the key for the pipelined state meant that we forced an update with every new drawing op - with the side effect of flushing the render cache. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67157 Signed-off-by: Chris Wilson commit a8c7834e1d4d31097d0dd2c931d7662b5314a9b2 Author: Chris Wilson Date: Mon Jul 22 22:03:17 2013 +0100 configure: Supply a default value for dridriverdir Rather than fail to load DRI2 if not found. Signed-off-by: Chris Wilson commit 8d94f030c6af64f82d495a835a3b962480c068e7 Author: Chris Wilson Date: Mon Jul 22 22:01:22 2013 +0100 configure: Fix enabling of DRI2 After setting it to false, we then need to set DRI2 to true after we detect the headers. Signed-off-by: Chris Wilson commit 0498e0c38d0b04d89020e61c13b250150ec19c3a Author: Chris Wilson Date: Mon Jul 22 19:20:16 2013 +0100 sna: Fix DBG compilation Signed-off-by: Chris Wilson commit e8cd5b5ff6f6e78260fb57f4b8171682d857e880 Author: Chris Wilson Date: Mon Jul 22 18:47:36 2013 +0100 configure: Use --enable-dri to control both DRI/DRI2 enabling Signed-off-by: Chris Wilson commit 3e2a1be13914e9ba13aaca06576a4f0e0f6e8fb0 Author: Chris Wilson Date: Mon Jul 22 19:34:32 2013 +0100 sna: Bail if we fail to find the attached CRTC during probing In a Zaphod configuration, the set of CRTCs available for an output is limited, and if that set does not match with the already established linkage, our quick probe function will select no mode. However, since the output is already on, the user definitely would like to continue using it, so fallback to InitialConfiguratio to select an appropriate mode. Reported-by: Nick Bowler Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67176 Signed-off-by: Chris Wilson commit 7b1a5024df96070bab70744ad7e7d78a41fb0f72 Author: Chris Wilson Date: Mon Jul 22 10:51:05 2013 +0100 sna/gen5: Rework the flush after blend state changes QA complained that the full flush to memory was too much of a performance hit, so let's try a lighter weight non-stalling pipe flush without. References: https://bugs.freedesktop.org/show_bug.cgi?id=67157 Signed-off-by: Chris Wilson commit 2737aaab77cc6233826077b90d001fe45efc376c Author: Chris Wilson Date: Sun Jul 21 20:42:37 2013 +0100 sna: Missing git add to fix typo in assert() from last commit I915_TILING != I915_TILING_Y Signed-off-by: Chris Wilson commit fa961ec99a67266687a1934eea24138cf2f7ad19 Author: Chris Wilson Date: Sun Jul 21 18:00:22 2013 +0100 sna: Allow linear inplace uploads along the tiled X PutImage blt paths Mostly for symmetry with GetImage, this in theory just bypasses a lot of intermedate state checking. Signed-off-by: Chris Wilson commit ff705331da62729e302fb882755a88d756d9c233 Author: Chris Wilson Date: Sun Jul 21 09:47:35 2013 +0100 sna: Unwind BLT setup if we don't emit any ops Often we may find that the BLT operations we wish to do after a XY_BLT_SETUP are either completely clipped out or transparent and so do not generate any subsequent commands. This leaves us with many unused XY_SETUP_BLT. References: https://bugs.freedesktop.org/show_bug.cgi?id=61477 Signed-off-by: Chris Wilson commit 2c78403cb56841f342692b97bb53e995c3ff6b9f Author: Chris Wilson Date: Sat Jul 20 21:55:16 2013 +0100 sna: Remember to apply drawable offsets for composite memcpy Yet another missing chunk from commit 6921abd81017c9ed7f3b2413784068fbc609a0ea Author: Chris Wilson Date: Thu Jul 18 16:21:27 2013 +0100 sna: Add a fast path for the most common fallback for CPU-CPU blits I had the composite offsets, but not the normal window offsets! Reported-by: F.Brown Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67124 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=67064 Signed-off-by: Chris Wilson commit e9823ec2a9f81b2e1c78eb91b695847535b0d0af Author: Chris Wilson Date: Sat Jul 20 20:54:58 2013 +0100 sna: Release cloned pixmap when updating tearfree scanout Signed-off-by: Chris Wilson commit b27b1654145c62493614dd7545dcd9fe6936750e Author: Chris Wilson Date: Sat Jul 20 20:04:00 2013 +0100 sna: Relax assertion that CPU syncs are performed on reffed objects Along some paths, we use a CPU mapping on a temporary object that never gets a user ref - so the assertion is bogus. A lesson I keep forgetting. Signed-off-by: Chris Wilson commit f39d9ed0929f83e65dde8da8f03fae6ba8264e4a Author: Chris Wilson Date: Sat Jul 20 18:08:22 2013 +0100 sna: Correct typo in checking src extents before performing memcpy A regression in commit 6921abd81017c9ed7f3b2413784068fbc609a0ea Author: Chris Wilson Date: Thu Jul 18 16:21:27 2013 +0100 sna: Add a fast path for the most common fallback for CPU-CPU blits And add the full set of assertions to validate the memcpy. Signed-off-by: Chris Wilson commit f915d4a224eb686ad18b62ca0258e056b4a483cc Author: Chris Wilson Date: Sat Jul 20 15:26:04 2013 +0100 sna: Inform the upper layers that we turn the CRTC on after a modeset Signed-off-by: Chris Wilson commit 3f52a89046999c02ed778777eff8e2eb62662d90 Author: Chris Wilson Date: Sat Jul 20 12:16:23 2013 +0100 sna: Fix application of composite offsets along PutImage fallback path Signed-off-by: Chris Wilson commit a998a8a34961ccdcec14369486ae3332009a1276 Author: Chris Wilson Date: Sat Jul 20 02:01:25 2013 +0100 sna: Tidy fast source clip processing for sna_do_copy Signed-off-by: Chris Wilson commit 65a09436e6aef9fe0518e322f92e601d5d3f46c1 Author: Chris Wilson Date: Sat Jul 20 00:20:09 2013 +0100 sna/dri: Fix the strict blitting check not to assume the dst is the front buffer In order to allow the case for copying onto a target other than the front buffer, such as the fake front buffer for example. Signed-off-by: Chris Wilson commit e386ba86ea487a2db62d80a0e60f176e052d6406 Author: Chris Wilson Date: Fri Jul 19 15:22:08 2013 +0100 sna: Perform an explicit check against the region extents RegionNotEmpty() is only valid if we only use the Region API, and as we mix direct operations on the region extents, we need to also do our own final check. Signed-off-by: Chris Wilson commit de472d95affcad0f87685782d29a41fa2a0cada6 Author: Chris Wilson Date: Fri Jul 19 15:13:50 2013 +0100 sna: Check for bpp>=8 before attempting to use memcpy_blt fastpath Fixes regression in commit 6921abd81017c9ed7f3b2413784068fbc609a0ea Author: Chris Wilson Date: Thu Jul 18 16:21:27 2013 +0100 sna: Add a fast path for the most common fallback for CPU-CPU blits Signed-off-by: Chris Wilson commit 4aa0288f16f03723a7aaa30967809d10fdb15a27 Author: Chris Wilson Date: Fri Jul 19 14:10:02 2013 +0100 sna: Return true from get_drawable_deltas() if the pixmap is offset Signed-off-by: Chris Wilson commit 6921abd81017c9ed7f3b2413784068fbc609a0ea Author: Chris Wilson Date: Thu Jul 18 16:21:27 2013 +0100 sna: Add a fast path for the most common fallback for CPU-CPU blits This path will mostly be upload for individual glyph uploads, for which the malloc overhead is significant. Signed-off-by: Chris Wilson commit 4da830864983ffe482388e4e4cfee02d106c895e Author: Chris Wilson Date: Thu Jul 18 15:05:04 2013 +0100 sna: Remove the duplicated pimxap migration for the composite fb path Signed-off-by: Chris Wilson commit 0d56f0eb84cc80fa5497c06a7967650aa20ebe51 Author: Chris Wilson Date: Thu Jul 18 14:49:41 2013 +0100 sna: DBG controls to turn off unwinding partial bo Signed-off-by: Chris Wilson commit 494f4bdcb00dc54f84e503b49fd85c8965f7f9ed Author: Chris Wilson Date: Thu Jul 18 14:19:16 2013 +0100 sna: Allow operation inplace when wedged There are times, such as rendering into the scanout, where continuing to use the GTT is preferrable even when wedged. Signed-off-by: Chris Wilson commit fb058de4e617d7e5058674859993ec635a8d779e Author: Chris Wilson Date: Thu Jul 18 13:37:12 2013 +0100 sna: Treat a source with a CPU bo as being attached. Signed-off-by: Chris Wilson commit 4723a730f4dc2d007577f43fe232c49b305c2695 Author: Chris Wilson Date: Thu Jul 18 13:26:36 2013 +0100 sna: Discard overwritten operations before doing a BLT composite Signed-off-by: Chris Wilson commit b2f32373815e166fc6dceb477139ff2ef27db0ba Author: Chris Wilson Date: Thu Jul 18 12:33:10 2013 +0100 sna: Tidy a few DBG regarding cached uploads Signed-off-by: Chris Wilson commit 1b37a167d9caa7868427cb88b2480f3b64e96cc9 Author: Chris Wilson Date: Thu Jul 18 10:51:42 2013 +0100 sna: Only IGNORE_CPU for blt composite operations if the size is known Some operations we do not know the true extents and so check the whole drawable when considering placement. In this case, the drawing may only partially cover the drawable and so we can not simply ignore existing CPU damage. Signed-off-by: Chris Wilson commit 2d62f7c483a999c24c744c0d257c8524f6fd5d32 Author: Chris Wilson Date: Thu Jul 18 22:00:24 2013 +0100 sna: Also do exposure checking after source clipping in sna_do_copy Hopefully a final regression from: commit 07926bfe507071a3d46a2ec13bb86a36bc225761 Author: Chris Wilson Date: Thu Jul 11 15:28:55 2013 +0100 sna: Remove the temporary region allocation from sna_do_copy References: https://bugs.freedesktop.org/show_bug.cgi?id=67055 Signed-off-by: Chris Wilson commit 2c8c4626908987e1bb5b16c49bc16dabac7d89dc Author: Chris Wilson Date: Fri Jul 19 11:55:09 2013 +0100 sna/dri: Return early is the DRI2CopyRegion is not attached to the GPU This can happen if the DRI client passes in a stale DRI2Drawable - that is the Drawable now references a new Pixmap which the client has not run DRI2GetBuffers against. Signed-off-by: Chris Wilson commit e5036fb15983a1d3547eaab381c18b3edf4310b4 Author: Chris Wilson Date: Fri Jul 19 11:51:40 2013 +0100 sna/dri: Reject invalid DRI2Drawables if STRICT_BLIT is defined Simply reject any attempts to copy using stale references (i.e. the DRI2Drawable has changed structure but the client hasn't yet noticed). Signed-off-by: Chris Wilson commit a45714c9a5ba5cd35fbbee2a49f540fe9164cdfd Author: Chris Wilson Date: Fri Jul 19 11:21:28 2013 +0100 sna/dri: Rearrange some more DBG to come before its assertion Again, useful to know what the assertion fails with. Signed-off-by: Chris Wilson commit e9831b50b58c36af3d2dd196b3abbfaa8e9a22c6 Author: Chris Wilson Date: Fri Jul 19 10:59:03 2013 +0100 sna/dri: Expose the refcnts in DBG before we hit the assertions Useful to try and explain some failures. Signed-off-by: Chris Wilson commit 6c8b15d321044d4a81cb187cc5e1ac094eb82367 Author: Chris Wilson Date: Wed Jul 17 20:58:33 2013 +0100 sna: Wrap cpuid.h More our ifdef out of line from the main code into a header file, where we can also apply a little bit of synatic sugar. Signed-off-by: Chris Wilson commit 08cacc265da8c1213d8bf1107168e37d38a3641d Author: Chris Wilson Date: Wed Jul 17 14:22:16 2013 +0100 sna: Guard cpuid for use only with gcc-4.4 and later Since __cpuid_count() was only introduced into gcc-4.4, we obviously cannot use it with earlier versions or with compilers that do not provide compatible interfaces. Signed-off-by: Chris Wilson commit aa5f14b3400614531aa88eb6b70b64bd1f47974d Author: Chris Wilson Date: Wed Jul 17 14:12:29 2013 +0100 sna: Ensure that buffer_size is a power-of-two for use in ALIGN ALIGN() expects it alignment argument to be a power of two. As buffer size depended upon cache_size, which is not always a power of two, issues could arise with unexpected buffer sizes. Signed-off-by: Chris Wilson commit a764a6e69b23f644957cf3e4e98868464f458758 Author: Chris Wilson Date: Wed Jul 17 10:51:56 2013 +0100 sna: Fix typo in computing box intersection Comparing y2 against y1 for the intersection was a silly typo, especially as the routine for computing the intersection already existed. Fixes regression in commit 34c9b759fbab8d548108e954d55de38c6f5bec31 Author: Chris Wilson Date: Tue Jul 16 19:39:37 2013 +0100 sna: Note that borderClip region may be more than a singular box Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66991 Signed-off-by: Chris Wilson commit 7f76a2bf319f59d463a1f96974b03d7c651847dd Author: Chris Wilson Date: Wed Jul 17 10:22:17 2013 +0100 sna: Fall back to /proc/cpuinfo parsing if cpuid cache size probe fails Older hardware does not support cache size probing via cpuid4, so we need to implement the older algorithm which requires a table based lookup. (And in hindsight, why I thought cache probing via cpuid to be quite hairy.) For the moment, just use the value found in /proc/cpuinfo. Reported-by: Oscar Dario Trujillo Tejada Reported-by: Ferry Toth Signed-off-by: Chris Wilson commit 3f3071c6c91c3907cb0fecf2f69a995feefe7956 Author: Chris Wilson Date: Wed Jul 17 09:02:19 2013 +0100 sna: Set a minimum size for tiled IO And assert that we never ask for a zero-sized upload. Signed-off-by: Chris Wilson commit 0952e7e04167d7b2284fc794ed9fb30afebdaf52 Author: Chris Wilson Date: Wed Jul 17 08:24:19 2013 +0100 sna: Include linear GTT maps when deciding whether a bo is mappable If the linear bo is still in the CPU domain, we can map it through the CPU with no penalty, so treat it as mappable. Signed-off-by: Chris Wilson commit 34c9b759fbab8d548108e954d55de38c6f5bec31 Author: Chris Wilson Date: Tue Jul 16 19:39:37 2013 +0100 sna: Note that borderClip region may be more than a singular box If the child is obscured, then borderClip will contain a list of valid boxes rather a singular extents. I thought this was covered by the clipList, but I was wrong. Reported-by: Jesse Barnes Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66970 Signed-off-by: Chris Wilson commit 1323abcc2eb19df81a000d4a37af6949801a9076 Author: Chris Wilson Date: Tue Jul 16 09:02:01 2013 +0100 sna: Make the assumption bpp>=8 explicit inside the bo size calculation Use an assert to document that we have a few rounding issues if bpp < 8. Signed-off-by: Chris Wilson commit 4a447c514b3193897e0d3ec4b3cf75f346d7438e Author: Chris Wilson Date: Tue Jul 16 08:58:21 2013 +0100 sna: Create a pixmap in ordinary system memory for depth=1 uploads Since we will not sample depth=1 pixmaps from the GPU, we may as well directly allocate these in system memory and avoid tickling the upload cache. This then avoids an issue within the size calculation code which makes the assumption that bpp>=8. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit 884dd896e4e959e5a284a6f70da9e5cde1bbb7e9 Author: Chris Wilson Date: Mon Jul 15 10:59:39 2013 +0100 sna: Change message context to PROBED for initial configuration Since we are retreiving the hw values rather than choosing a default for ourselves, it is more consistent to use PROBED rather than INFO for our message. Signed-off-by: Chris Wilson commit f8677a971bdbeb8e472b74385780c41c7a51c522 Author: Chris Wilson Date: Mon Jul 15 10:24:53 2013 +0100 sna/gen4: Allow rendering to Y-tiled surfaces We no longer seem to be hitting the same random hangs, so presumably another w/a is taking effect. Signed-off-by: Chris Wilson commit e83e7e60f41cb29132d5eef60af16b65b1b3cd4e Author: Chris Wilson Date: Sun Jul 14 09:31:39 2013 +0100 2.21.12 release commit 0230ef72cbb2d3bcf7157548ddd52a71c0c771c5 Author: Chris Wilson Date: Fri Jul 12 23:57:42 2013 +0100 sna: Skip copying to the intermediate target if we will completely overwrite it Occasionally when forced to use an intermediate destination surface, we know that we will completely overwrite the contents of the surface and so we can forgo the initial copy from the target. Signed-off-by: Chris Wilson commit 2b16eaefb38b4a6efe50a397e68793ab9a1cb2ef Author: Chris Wilson Date: Fri Jul 12 23:22:59 2013 +0100 sna: Avoid integer overflow when computing the tiled extents When stepping over the tiles, beware that the step may overflow the int16_t region extents, so use an int for the calculation. Reported-by: Andrew Woodward Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1200766 Signed-off-by: Chris Wilson commit 835ceccb27afa18704c34dc3283476340f999317 Author: Chris Wilson Date: Fri Jul 12 23:20:56 2013 +0100 sna/gen5: Add some more DBG Signed-off-by: Chris Wilson commit 39f1954f667bf20cd0c25dfa5fb5267a3f9eb113 Author: Chris Wilson Date: Thu Jul 11 21:57:02 2013 +0100 sna: Replace parsing of /proc/cpuinfo with parsing of cpuid Courtesy of a patch from Chad Versace via Ben Widawsky, actually digging through CPUID for the cache info looks quite easy in comparison to the fragile approach of parsing a linux specific file that may or may not be available. Signed-off-by: Chris Wilson commit c604d1426cc11f9799044710acf1ef7d226d2604 Author: Chris Wilson Date: Thu Jul 11 16:40:51 2013 +0100 sna: Remove the duplicated open-coding of SetScreenPixmap Signed-off-by: Chris Wilson commit 07926bfe507071a3d46a2ec13bb86a36bc225761 Author: Chris Wilson Date: Thu Jul 11 15:28:55 2013 +0100 sna: Remove the temporary region allocation from sna_do_copy Signed-off-by: Chris Wilson commit 519d0007d4add23b14b5a9fd83cf4a1b68c63d03 Author: Chris Wilson Date: Wed Jul 10 18:24:36 2013 +0100 sna: Remove incorrect asserts for checking CPU mappings (after remapping) These assertions were checking that the previous state prior to performing the new mapping was consistent. Given that the checks were occurring after the update in mapping, the asserts were bogus. Signed-off-by: Chris Wilson commit a18f4ba9033cec3cc435c29878b12ceef1defc1f Author: Chris Wilson Date: Wed Jul 10 11:56:50 2013 +0100 sna: Ofast was introduced with gcc-4.6 Thomas Jones reported that the build was failing with gcc-4.5 due to the memcpy routines requesting an unsupported optimisation mode (-Ofast) and supplied this patch to only enable Ofast for gcc-4.6+ Reported-by: Thomas Jones Signed-off-by: Chris Wilson commit ccf0fdd56dc6efd30e425209d753ed4f90562d76 Author: Chris Wilson Date: Tue Jul 9 20:41:51 2013 +0100 sna: Only flush after the BLT operation if we have more than 2 distinct bo In order to preserve the optimisation of discarding incomplete batches, we don't always want to immediately submit the batch after inserting the first command. As we currently only cancel a batch if it only touches the bo being discarded, we can skip the immediate flush if it only accesses one bo and maybe be able to use the undo optimisation later. Signed-off-by: Chris Wilson commit d935912d9c13ec8cf4f641c55846714d4e9ba929 Author: Chris Wilson Date: Tue Jul 9 20:38:32 2013 +0100 sna: Free the source reference after performing a BLT composite Fixes regression from commit 8751c0f5ad202850bdd56dbb4eedb211c023cf23 Author: Chris Wilson Date: Fri Jul 5 17:55:10 2013 +0100 sna: Flush blt copies if no operations pending Reported-by: Andreas Reis Reported-by: Mike Lothian Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66742 Signed-off-by: Chris Wilson commit b202008f8f6470f256d3b9000a9f78b6ca8d932b Author: Chris Wilson Date: Fri Jul 5 13:50:34 2013 +0100 sna: Experiment with a new ioctl to create buffers from stolen memory If there is stolen memory reserved by the BIOS, we want to utilize it in preference to regular system memory. However, given the caveat that it is not suitable for CPU access, rules out most use cases - but it is a good match for framebuffers. Signed-off-by: Chris Wilson commit dbb585b9d2510efa9f8432bc25842fa14a8e495e Author: Chris Wilson Date: Sun Jul 7 09:17:58 2013 +0100 sna/gen4: Remove custom max flush vertices w/a from video path This should now be superseded by using the common w/a. Signed-off-by: Chris Wilson commit 2a59eadf8165bd70780ac16220456c6196ac3ff1 Author: Chris Wilson Date: Sun Jul 7 09:13:49 2013 +0100 sna/gen4: Remove the glyph mask hack and tune the flush w/a Remove the hack from the glyph path to force the use of an auxiliary channel, and reduce the maximum amount of inflight vertices until we can then render glyphs with no corruption (at least in my test case). Signed-off-by: Chris Wilson commit c9c1833c30421e1461f6b03b858bbc187068eb0c Author: Chris Wilson Date: Sun Jul 7 08:58:52 2013 +0100 sna/gen4: Tighten FORCE_FLUSH w/a to spot amalgamation of primitives Inspect whether this rectangle will be added to the previous primitive and so charge it against the current number of inflight rectangles. Signed-off-by: Chris Wilson commit 368c909b29758f996dbbdbec4d471df23f60bc04 Author: Chris Wilson Date: Sat Jul 6 22:27:44 2013 +0100 sna/gen4: Restore the flush-every-vertex w/a This is an abhorrent workaround for some internal GPU brokenness. A slight refinement since earlier times is the recognition that 16 is a magic number limiting the maximum number of inflight rectangles through the GPU. References: https://bugs.freedesktop.org/show_bug.cgi?id=55500 Signed-off-by: Chris Wilson commit 1fbf47ec1bed888c1b7c8dcbeb01d8e067727c82 Author: Chris Wilson Date: Sat Jul 6 18:30:47 2013 +0100 sna: Tune inplace hints for CPU operations with GPU targets Signed-off-by: Chris Wilson commit 5aaab9ea0310d48bb1a1ca20308d1c9721a9de3f Author: Chris Wilson Date: Sat Jul 6 15:10:22 2013 +0100 sna: Relax assertion that the source of the cloned pixmap cannot be mapped I was being overzealous at the time of making the COW and trying to be sure that we would never write through a mapping. Then I started to allow clones to be mapped (for reads) and missed relaxing this assertion. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit 8751c0f5ad202850bdd56dbb4eedb211c023cf23 Author: Chris Wilson Date: Fri Jul 5 17:55:10 2013 +0100 sna: Flush blt copies if no operations pending More work to try and keep the GPU busy. Signed-off-by: Chris Wilson commit f5529ea61b5e12e0c2d9fda817948ca0a4cab212 Author: Chris Wilson Date: Thu Jul 4 21:39:33 2013 +0100 sna: Use a stack allocated PixmapRec for the fbcon copy Signed-off-by: Chris Wilson commit ea508c177c961ba2f00129476a22a32ff3ea6f1b Author: Chris Wilson Date: Thu Jul 4 20:19:20 2013 +0100 sna: Set 1024x768 fb in absence of any connected devices No actual initial configration magic is required, all we need to do is set the initial framebuffer size with no connected outputs and leave it to the core to select CompatOutput() the like. Signed-off-by: Chris Wilson commit d36c9542d2bd707838a87c451bf76f091aaf5cba Author: Chris Wilson Date: Thu Jul 4 10:45:09 2013 +0100 sna: Fix gamma query to not request uninitialized values Oops, surprising that ebf4517a0b had any positive effect. Signed-off-by: Chris Wilson commit 59fa53707eed18e5cc151bd2ce05a2dcdd325630 Author: Chris Wilson Date: Thu Jul 4 08:51:58 2013 +0100 sna: Set the initial gamma from the attached monitor configuration Fixes a missed configuration option from commit 8a6a21bff86100144ba7960fc32a299ac54ada83 [2.21.11] Author: Chris Wilson Date: Wed Jun 26 13:29:48 2013 +0100 sna: Use the existing configuration for initial modes Signed-off-by: Chris Wilson commit ebf4517a0bb510e406795c169aa21b7cc615ed31 Author: Chris Wilson Date: Wed Jul 3 22:44:46 2013 +0100 sna: Always read back the gamma, even for a inactive CRTC Even if the CRTC is inactive, we still need to initialise the gamma tables. Reported-and-tested-by: Timo Kamph Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66563 Signed-off-by: Chris Wilson commit 4def5ecf6ebc2c6dc05e60d4595fa3dd4b7e38d2 Author: Chris Wilson Date: Wed Jul 3 21:56:54 2013 +0100 sna: Tidy up the user override enums Since we have a second place dependent upon the hidden ordering of the output options, simplify by copying the complete enum block from hw/xfree86/modes/xf86Crtc.c Signed-off-by: Chris Wilson commit 5adca344b2f95cf2f2b2b3fabf6c99c39b64f25f Author: Chris Wilson Date: Wed Jul 3 21:45:11 2013 +0100 sna: Fix configuration user overrides on xorg-server < 1.14.99.1 Marty Jack found that the enums for the user overrides were off by one (his xorg conf was no longer being applied). This is because I had missed the introduction of ZoomModes in 1.14.99 increasing all the important enum values by one. Reported-by: Marty Jack Signed-off-by: Chris Wilson commit 1445a62da8a08acd8a732176d085fd098f68cec3 Author: Chris Wilson Date: Wed Jul 3 12:59:31 2013 +0100 intel: Add an option for forced rediscovery of output status on startup Specifying Section "Device" Option "ReprobeOutputs" "true" EndSection will restore the old behaviour of scanning each output on startup and picking a spanning mode. The behaviour was changed in commit 8a6a21bff86100144ba7960fc32a299ac54ada83 [2.21.11] Author: Chris Wilson Date: Wed Jun 26 13:29:48 2013 +0100 sna: Use the existing configuration for initial modes Please do notify us of any circumstances that force you to use this flag. References: https://bugs.freedesktop.org/show_bug.cgi?id=66494 Signed-off-by: Chris Wilson commit 2ecff61d369d9f67c6e28d407941f35ed6195156 Author: Chris Wilson Date: Wed Jul 3 12:45:10 2013 +0100 intel: Retire Option "RelaxedFencing" The kernel bugs have long since been fixed and should have been propagated to all stable kernels long ago. Now there should be no need to workaround those bugs. Signed-off-by: Chris Wilson commit c957f4171791447f1869f11fd724dbe92e6a8b91 Author: Chris Wilson Date: Tue Jul 2 23:59:02 2013 +0100 sna: Try harder to do the BLT upload along the fallback path Only in the !fallback path will we try using the render pipeline after the blt, in which case we can try using render rather than forcing a stall. In the fallback path, we are going to incur stalls and readbacks, anyway so ignore them when considering blt. Signed-off-by: Chris Wilson commit 158095ff2b2d38f54ca91d2a728f919cd705ff62 Author: Chris Wilson Date: Tue Jul 2 23:17:32 2013 +0100 sna/gen2: Fix alpha replication in the copy pipeline When copying into an a8 surface we need to replicate the result into the green channel. It helps to tell the GPU from where to source the value to be replicated. Signed-off-by: Chris Wilson commit 2b0d36c63817c08990b8ae4efd60df4a11619e0f Author: Chris Wilson Date: Tue Jul 2 23:16:54 2013 +0100 sna: Assorted DBG This DBG was useful for narrowing down the issue in the next patch... Signed-off-by: Chris Wilson commit 103672869c64a1e42022069f413478c256c0ee00 Author: Chris Wilson Date: Tue Jul 2 20:52:23 2013 +0100 sna: Add the condition that 855gm cannot GTT map Y-tiled surfaces We had the check in a couple of places, but missed a key one that decided whether or not to perform a GTT mapping of a bo. Signed-off-by: Chris Wilson commit 9aa665ae33c3ac54b8896e6f8373dfda2637e392 Author: Chris Wilson Date: Tue Jul 2 15:53:38 2013 +0100 sna: Only preserve the real fbcon upon first starting X We only want to preserve the plymouthd splash screen for flicker free start up, a subsequent regeneration should be cleared instead. Signed-off-by: Chris Wilson commit 21e29e95265331f8a33cd676c2d3124007643135 Author: Chris Wilson Date: Tue Jul 2 15:25:46 2013 +0100 sna: Simplify validation of active CRTCs Atter a modeset or KMS takeover, we do a quick readback of the kernel state in order to verify that it matches our expectations. If we find that a foreign framebuffer is attached, or no mode if set on the output, we then turn off that connection and release any resources associated with that pipe. This patch tries to reduce the number of superfluous requests to turn off a connection. Signed-off-by: Chris Wilson commit 67a6a4bfd9cd1a861911e76096923bfc652189e2 Author: Chris Wilson Date: Tue Jul 2 14:27:03 2013 +0100 sna: Hook into crtc_notify rather than ModeSet ModeSet is called after updating each CRTC, unlike crtc_notify which is called after applying all changes. The last is what we need as if we are called too early we detect that the next CRTC doesn't match our expectations and so we disable it, right before applying the desired mode. References: https://bugs.freedesktop.org/show_bug.cgi?id=66494 Signed-off-by: Chris Wilson commit c361b449cc3ec15819883afc220aad8823c0072d Author: Chris Wilson Date: Tue Jul 2 09:49:48 2013 +0100 sna: Include connector status in the initial probe We cannot simply rely on connector->encoder->crtc status as with the introduction of Haswell or SDVO we may have multiple connectors using the same encoder. So we need to explictly check the connector status first, before determining if the output is connected to an active encoder and CRTC. References: https://bugs.freedesktop.org/show_bug.cgi?id=66488 Signed-off-by: Chris Wilson commit 282507af8e932e49b31d5f20958a61c137df590d Author: Chris Wilson Date: Tue Jul 2 09:34:57 2013 +0100 intel: Move the validation of the KMS device into the open routine Currently we leak the fd should we open the device node and decide that is not a GEM/KMS kernel driver. The simplest way to perform the cleanup upon failure is to move the checking for GEM/KMS into the device open routine. Signed-off-by: Chris Wilson commit 24a7bec7faa7dcc4393ef7f66939ae0fb8acdf36 Author: Chris Wilson Date: Mon Jul 1 22:43:02 2013 +0100 sna: Minor tweaks to make DBG compile again Signed-off-by: Chris Wilson commit ad0afda3fe4f5e408e3610d8b76fdc7d1af33138 Author: Chris Wilson Date: Mon Jul 1 22:26:29 2013 +0100 sna: Fix checking the dirty boxes I forgot how insane the data structure for the list of dirty boxes attached to the damage is. It is neither a simple list, nor does not store the count of boxes within each chunk. Fixes regression from commit 9026bb954646c0425360c2236e26c79d097142cd [2.21.11] Author: Chris Wilson Date: Fri Jun 28 15:59:17 2013 +0100 sna: Inspect the dirty boxes when querying whether damage contains a rectangle A side effect is that we now make sure that there is an upper bound to the amount of searching we do for the no-reduce fast path. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66430 Signed-off-by: Chris Wilson commit 1c8a33a72e29261d6bf5a6c160765cbafa4d0b88 Author: Chris Wilson Date: Mon Jul 1 17:41:41 2013 +0100 sna: Allow scanouts to be untiled if need be Fixes regression from commit 77fa8ab08b441934218ddb8f690be1a919f0ec64 [2.21.11] Author: Chris Wilson Date: Tue Jun 25 22:25:25 2013 +0100 sna: Free just-allocated bo if we fail to set-tiling on CREATE_EXACT Signed-off-by: Chris Wilson commit 9cb6756ce16491e42c6e21bc74a5f7de5432510f Author: Chris Wilson Date: Mon Jul 1 17:27:17 2013 +0100 sna: Always create the clear Picture As we unconditionally use it irrespective of whether we then call accelerated code paths or not. Fixes regression from commit dc18eaa585c36c8e5f5b4ec405a976a835fd2ac3 [2.20.10] Author: Chris Wilson Date: Sun Aug 12 10:34:10 2012 +0100 sna: Make the failure to create render caches non-fatal in the event we need to start with a hung GPU. Signed-off-by: Chris Wilson commit c6c6ae71bedce43ff6617179c015c303cbaee9ae Author: Chris Wilson Date: Mon Jul 1 17:00:17 2013 +0100 sna: Make sure we are consistent in applying USE_INPLACE debug option A few new paths were missing the debug check, and clarify a few indirect uses by performing the explicit check. Signed-off-by: Chris Wilson commit cce2351056eda1282a521b96f90ba12436e86492 Author: Chris Wilson Date: Mon Jul 1 16:13:47 2013 +0100 sna: Debug options for forcing mmap syncs Signed-off-by: Chris Wilson commit 7aff6beb37c91df85c46372d44ae4a5fefae5ae8 Author: Chris Wilson Date: Mon Jul 1 17:57:49 2013 +0100 sna: Improve the message about where to find the hang state Search the few canonical locations for our hang state so that we can be more explicit to the user about what to include. Signed-off-by: Chris Wilson commit e0e84e6686be390ef204117525d4a5c6aebbbe07 Author: Chris Wilson Date: Mon Jul 1 16:49:50 2013 +0100 sna: Mark an inplace getimage as preferring the CPU mapping afterwards Signed-off-by: Chris Wilson commit e648c1f39cc17d39eff077639f23687894724b7b Author: Chris Wilson Date: Mon Jul 1 15:27:38 2013 +0100 sna: Assert that we do not have overlapping damage Double check that the results of the box query match with the slow queries. Signed-off-by: Chris Wilson commit 7c6cc0c9edb8f1ebcc8be5edb78c9d858dce1965 Author: Chris Wilson Date: Mon Jul 1 15:04:58 2013 +0100 sna: Check whether the query box is contained within the damage We can improve our query for whether the rectangle of interest is within the damage by checking whether the damage extents contains the entire box rather than just checking for an overlap. Signed-off-by: Chris Wilson commit 64cb923588df0547880009bbeaeecb7ac3ee8ecf Author: Chris Wilson Date: Mon Jul 1 14:30:21 2013 +0100 sna: Experiment with cpu mappings for migration Signed-off-by: Chris Wilson commit 12c013d25ed0c08f748b0a7250cbcef1cded26b0 Author: Chris Wilson Date: Mon Jul 1 13:28:57 2013 +0100 sna: Do not use userptr for GetImage on unsupported architectures If the system cannot blt to a CPU buffer, we should even attempt to do so for GetImage. Signed-off-by: Chris Wilson commit 7d9163983ea2e960c0a7b55266fcc532b9c6e382 Author: Chris Wilson Date: Sun Jun 30 15:26:57 2013 +0100 2.21.11 release commit 5005bd2d52ab64cbeae099d512d0b65be6c4abaa Author: Chris Wilson Date: Sun Jun 30 15:02:19 2013 +0100 intel: Fix failure code for reporting !drmCheckModesetingSupported The new function returns the fd, not a Bool, so the error code must now be -1. Signed-off-by: Chris Wilson commit f8738d7b4cc1c624d4390ef9ce7426ba457d7dd3 Author: Jonathan Gray Date: Sun Jun 30 19:37:45 2013 +1000 intel: replace direct ioctl use with drm{Set, Drop}Master Use drmSetMaster/drmDropMaster instead of calling the ioctls directly. Fixes compilation on OpenBSD where these ioctls aren't defined. Signed-off-by: Jonathan Gray commit 40301e6d03f6e8d2d2d01e6bb9f1754a7e543a08 Author: Chris Wilson Date: Sun Jun 30 11:12:34 2013 +0100 sna: Store the path used to open the device and pass to DRI Avoid having to search the device tree once again in order to simply recover the path we used to open the device. Signed-off-by: Chris Wilson commit 17da58f904e75d434aaf71e297e15d41153ba954 Author: Chris Wilson Date: Sun Jun 30 11:01:49 2013 +0100 sna: Replace conflicting drmDropMaster Calling drmDropMaster twice along the CloseScreen path is not a good idea. Signed-off-by: Chris Wilson commit 3a787da7e888da7e9943be94bd1cb177fe1495ab Author: Chris Wilson Date: Sat Jun 29 21:57:20 2013 +0100 sna: Allow tiled memcpy on i386 With the split into per-swizzle functions, and with the forced optimisation levels, it appears that i386 doesn't suffer so badly and the tiled memcpy are a viable method. Signed-off-by: Chris Wilson commit 1d9941a7c003587c0bd732fb8b21fee5cefa6f87 Author: Chris Wilson Date: Sat Jun 29 21:56:13 2013 +0100 sna: Add the Ofast option to the critical memcpy routines Always enable gcc to fully optimize the core memcpy routines (provided that optimisations are not entirely disabled, for instance for debugging). Signed-off-by: Chris Wilson commit 84c190db33142f3c1ec347ec0bf87f77ce132d36 Author: Chris Wilson Date: Sat Jun 29 19:06:40 2013 +0100 sna: Fix get_image_inplace to use the pixmap offset The inplace routine assumed that the region to be read was already in pixmap coordinates. Making it so makes the code easier, so do it. Signed-off-by: Chris Wilson commit c7d246ba6f750ee080c38ccc5603d01fcf7fce92 Author: Chris Wilson Date: Sat Jun 29 16:31:34 2013 +0100 sna: Move the clone discard into free-gpu Rather than peppering the discard manually before the call to free the GPU bo, always discard the COW when we actually free the GPU bo. Signed-off-by: Chris Wilson commit 6ab2a3acf71b5204c399c7649e5601c93a99f25f Author: Chris Wilson Date: Sat Jun 29 15:04:09 2013 +0100 sna: Improve checks for coherent access through CPU mappings Refactor the CPU mapping tests to a single function, and remember to test for a pending GPU write (i.e. bo->exec). Signed-off-by: Chris Wilson commit 9026bb954646c0425360c2236e26c79d097142cd Author: Chris Wilson Date: Fri Jun 28 15:59:17 2013 +0100 sna: Inspect the dirty boxes when querying whether damage contains a rectangle This helps in the cases where we have subtracted a small number of rectangles from an all-damage pixmap (such as a number of successive GetImage, PutImage operations). The danger is that we end up searching a long list of dirty boxes - maybe just search the first chunk if that becomes noticeable? Signed-off-by: Chris Wilson commit d635e05c9dd26a397ccf958be091b56d1075e923 Author: Chris Wilson Date: Fri Jun 28 19:24:06 2013 +0100 sna: Promote assert(!priv->mapped) along migration paths With the advent of the more permissive mapping schemes and finer damage tracking, we are more liable to have pixmaps mapped and so can reach the upload path with the pixmap still mapped. Signed-off-by: Chris Wilson commit 2d40500851a7c6d857b17258e4989ddf7401cfbc Author: Chris Wilson Date: Fri Jun 28 15:12:13 2013 +0100 sna: Add asserts around applying clears Signed-off-by: Chris Wilson commit e3ad737ef9d33e924b206741949d59224bfef566 Author: Chris Wilson Date: Fri Jun 28 15:33:54 2013 +0100 sna: Use inplace CPU mapping readback for GetImage on linear buffers Signed-off-by: Chris Wilson commit 626b5e541663f838475eaef2c1bc3ae4d4848165 Author: Chris Wilson Date: Fri Jun 28 14:24:10 2013 +0100 sna: Add debug control for disabling accelerated GetImage Signed-off-by: Chris Wilson commit 2356579cdff36adf58fb69894f646a6e63053a15 Author: Chris Wilson Date: Fri Jun 28 13:18:00 2013 +0100 sna: Assert that the kernel tiling mode matches our bo Signed-off-by: Chris Wilson commit e979d32bb71fef7341ceb9c2b2e80c6dfa50a7b3 Author: Chris Wilson Date: Fri Jun 28 10:59:23 2013 +0100 sna/gen2+: Consider precision in render operation placement Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66297 Signed-off-by: Chris Wilson commit 541f816815e392db9e798d2f940029d82a6b2e0b Author: Chris Wilson Date: Fri Jun 28 10:14:16 2013 +0100 sna: Markup when a gradient is opaque Signed-off-by: Chris Wilson commit 34e6366f2a61c145445056e5fc6c483999c0402c Author: Chris Wilson Date: Fri Jun 28 10:03:47 2013 +0100 sna/blt: Remove a pair of leftover asserts As the variable they were inspecting was removed, the asserts are now breaking the debug build. Signed-off-by: Chris Wilson commit 0c93a0cf41cbfe88b18e9e69bd97bd75cf2404bd Author: Chris Wilson Date: Fri Jun 28 00:35:14 2013 +0100 sna: Compensate redirect drawing subrectangle inside an offset pixmap Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66249 Signed-off-by: Chris Wilson commit e33fbd6d7ff2a9efcc14974a05b5e1eb01bbce34 Author: Chris Wilson Date: Fri Jun 28 08:53:32 2013 +0100 sna/blt: Refine op placement logic for handling current source location Signed-off-by: Chris Wilson commit 48b5ac11a0737f65de2e6290308bd37017cc29a9 Author: Chris Wilson Date: Thu Jun 27 21:39:30 2013 +0100 intel: Use fcntl to try and set CLOEXEC if the open(O_CLOEXEC) fails As suggested by Arkadiusz Miskiewicz. Signed-off-by: Chris Wilson commit 9b3e5c211451ac07bd96cd997ac714bcbe1809b0 Author: Chris Wilson Date: Thu Jun 27 21:08:05 2013 +0100 intel: #ifdef O_CLOEXEC for compilation on squeeze If the system doesn't support O_CLOEXEC, then we simply can't use it. Signed-off-by: Chris Wilson commit caf43fcadb0fcb3d342543f1e7dd78ee2314a627 Author: Chris Wilson Date: Thu Jun 27 16:52:21 2013 +0100 sna: Enable memcpy_from_tiled for the IO paths Should you ever need to read back from a tiled surface and for whatever reason do not have a CPU bo to accelerate the operation, maybe we could use the manual tiling instead (as it is useful elsewhere). Signed-off-by: Chris Wilson commit b5e85e495e55e2537d305b7bebacdf6f97b66199 Author: Roy.Li Date: Thu Jun 27 14:10:14 2013 +0800 uxa: fix the compilation error with xorg-xserver <= 1.10 struct _Screen has no canDoBGNoneRoot when ABI_VIDEODRV_VERSION is less than 10.0 Signed-off-by: Roy.Li commit 41715af4d009bfcb351946ddaa3a3ea3767a1429 Author: Chris Wilson Date: Thu Jun 27 16:36:52 2013 +0100 configure: SNA supports the old Xorgs So allow it to be compiled by default for older Xorgs as well. Signed-off-by: Chris Wilson commit 7ce487617445c81f0178823de8896a2b73bbaaf1 Author: Chris Wilson Date: Thu Jun 27 16:08:43 2013 +0100 sna: Trim the large object threshold Be kinder to smaller machines by lowering the threshold at which treat an object as huge and worthy of avoiding duplication. Signed-off-by: Chris Wilson commit 31467e18d2ccdc42b0601b43b581524859de1373 Author: Chris Wilson Date: Thu Jun 27 16:07:36 2013 +0100 sna: Prefer operating inplace with a very large GPU bo As we strive to only keep one copy when working with very large objects, so try operating inplace on a mapping for CPU operations with a large GPU bo. Signed-off-by: Chris Wilson commit b615ce97ec43ea8fe02e995244c757138abcb2de Author: Chris Wilson Date: Thu Jun 27 10:45:22 2013 +0100 sna: Add a fast path for reading back from tiled X bo This is lower latency than the double copy incurred for first moving the bo to the CPU and then copying it back - but due to the less efficient tiled memcpy, it has lower throughput. So x11perf -shmget500 suffers (by about 30%) but real world applications improve by about 2x. Signed-off-by: Chris Wilson commit 6493c8c65f93ad2554c2512a07ba640e966fd026 Author: Chris Wilson Date: Thu Jun 27 10:45:13 2013 +0100 sna: Implement memcpy_from_tiled functions (for X-tiling only atm) To provide symmetry with the ability to write into an X-tiled mapping of a bo, we add the memcpy_from_tiled to be able to read back from the same bo. Signed-off-by: Chris Wilson commit 60d716b53993b08a2a00c22f523c575e62e0a18d Author: Chris Wilson Date: Thu Jun 27 14:11:00 2013 +0100 sna: Add the probed CRTC mode to the list of output modes Signed-off-by: Chris Wilson commit 263e87d5e1915e6c40fa8bc1b325a36f21f92b30 Author: Chris Wilson Date: Thu Jun 27 13:57:22 2013 +0100 sna: Set the current mode when initialising CRTCs Signed-off-by: Chris Wilson commit 2f2f439c9cfdd394ad2b9a125db51e2dba7d3ff7 Author: Chris Wilson Date: Thu Jun 27 12:58:58 2013 +0100 sna: Fake the output physical width/height from the CRTC size Signed-off-by: Chris Wilson commit 5124f35168c0cc162cf5e8bcaafdf756945f6ca9 Author: Chris Wilson Date: Thu Jun 27 12:32:24 2013 +0100 sna: Support operations inplace on CPU mappings of a region Signed-off-by: Chris Wilson commit 18ee5c20d5f8f1752b89f2377e9b9c3f1c140d53 Author: Chris Wilson Date: Thu Jun 27 11:49:33 2013 +0100 sna: We can read from cloned pixmaps inplace - so long as we don't write Signed-off-by: Chris Wilson commit 36993618b4c5d4fa1fde7800eaaa711b074bd623 Author: Chris Wilson Date: Thu Jun 27 10:48:23 2013 +0100 sna: Tweak ordering of userptr temporary mappings for uploads There are a few more circumstances where the temporary mapping is beneficial, such as pixmaps that are only shadow copies or operations that require reads on the destination. Signed-off-by: Chris Wilson commit c6ad9861f00a3166fd89a7c43d602a4c2a5bde24 Author: Chris Wilson Date: Thu Jun 27 10:59:06 2013 +0100 sna: Fix DBG printing of can_upload_tiled_x() The function changed it parameters, this DBG caller did not. Signed-off-by: Chris Wilson commit 591981a36c333cdf08a91f28fb9670a62b95d31a Author: Chris Wilson Date: Thu Jun 27 10:02:28 2013 +0100 sna: Refactor freeing gpu_bo in manual tiled upload Use the common function so that we correctly check for pinned GPU bo, and adjust the hints afterwards. Signed-off-by: Chris Wilson commit 8f6dcc15c8d6ea726a10ef5df18536f8c769291e Author: Chris Wilson Date: Thu Jun 27 09:27:57 2013 +0100 sna: Detect and handle cloned pixels for manual tiled uploads Signed-off-by: Chris Wilson commit d7be3df2fe632bbc8e4f09709cf3cf7a5ef61015 Author: Chris Wilson Date: Wed Jun 26 17:01:37 2013 +0100 sna: Se the default gamma if left uninitialized by the driver Due to a bug in i915.ko the gamma ramp is left uninitialised... Signed-off-by: Chris Wilson commit 491f4fab21df97af1dae92eaf30e76ff62920fb2 Author: Chris Wilson Date: Wed Jun 26 15:15:17 2013 +0100 sna: Correct typo s/\j/\n/ When is a newline, not a newline? When it is ajar. Signed-off-by: Chris Wilson commit a40dd0ed6db35c891710199cc9d18345ab53b397 Author: Chris Wilson Date: Wed Jun 26 14:50:19 2013 +0100 sna: Explicitly initialise the probed transform for a CRTC Signed-off-by: Chris Wilson commit 01ce3ef9f12d3b6541e166f22e1ae67033237159 Author: Chris Wilson Date: Wed Jun 26 14:26:22 2013 +0100 sna: Set RR_Rotate_0 instead of 0 as desired initial rotation Signed-off-by: Chris Wilson commit c5651254c3c152daf1ed79073779c1bed6ed0a9b Author: Chris Wilson Date: Wed Jun 26 14:18:49 2013 +0100 sna: Fallback to xf86InitialConfiguration if nothing is connected Use the default mechanism for picking a fallback output and mode if nothing is connected at X startup. Signed-off-by: Chris Wilson commit 8a6a21bff86100144ba7960fc32a299ac54ada83 Author: Chris Wilson Date: Wed Jun 26 13:29:48 2013 +0100 sna: Use the existing configuration for initial modes After checking for user overrides (preferred output modes, rotation and placement), copy the current CRTC configuration from the kernel into the desired modes. This should enable X to start without introducing any extra flicker. Signed-off-by: Chris Wilson commit 362b0dc6a3b1692b752d8f250075ccc81debfca3 Author: Chris Wilson Date: Wed Jun 26 12:04:46 2013 +0100 sna/gen4+: Fix determination of intermediate extents Complete logic fail for finding the bounding box of the boxes to be copied. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66168 Signed-off-by: Chris Wilson commit 2212468315f383d09ea17c2edac8666bdb862bc7 Author: Chris Wilson Date: Wed Jun 26 11:26:29 2013 +0100 sna: Avoid allocating a temporary if using rendercpy tiles Signed-off-by: Chris Wilson commit fc5b9a96194583c67705d7d05afc3e04e97e3338 Author: Chris Wilson Date: Tue Jun 25 22:58:31 2013 +0100 sna: Clear mapped state after performing manual tiling Signed-off-by: Chris Wilson commit 3f33abee370bb1ce60bca91f29affc62d06b0bad Author: Chris Wilson Date: Tue Jun 25 22:43:48 2013 +0100 sna: Do not force creation of CPU maps on !llc Signed-off-by: Chris Wilson commit 77fa8ab08b441934218ddb8f690be1a919f0ec64 Author: Chris Wilson Date: Tue Jun 25 22:25:25 2013 +0100 sna: Free just-allocated bo if we fail to set-tiling on CREATE_EXACT If the caller requires an exactly constructed bo, abandon the attempt if we cannot set the tiling as specified. Signed-off-by: Chris Wilson commit 273716029e5318f1670e7111be2085c950995d42 Author: Chris Wilson Date: Tue Jun 25 21:35:09 2013 +0100 sna: Rearrange tiled x upload so that damage accumulation is last Signed-off-by: Chris Wilson commit e033a28bcb37867f3c947475714e1ef45c868825 Author: Chris Wilson Date: Tue Jun 25 21:12:23 2013 +0100 sna: Optimize clears to white Signed-off-by: Chris Wilson commit b77c334a26c55d3028971897dcba21407a7a4743 Author: Chris Wilson Date: Tue Jun 25 19:08:30 2013 +0100 sna: Do not perform tiling inplace if the destination is busy Rather than waiting on the GPU stall, just use the standard mechanisms to queue the uploads. Signed-off-by: Chris Wilson commit 4b0cdf28b884755cb842d3303fc0dd9bec62ab24 Author: Chris Wilson Date: Tue Jun 25 18:09:36 2013 +0100 sna: Be explicit when creating tiled-x pixmaps for manual tiling uplaods Signed-off-by: Chris Wilson commit 98feba417c87dce020df6a6ed157e3546591d8e7 Author: Chris Wilson Date: Tue Jun 25 18:35:45 2013 +0100 sna: Drop master when closing the screen As we reacquire master when initialisation the next gen of the server, to keep the reference counting consistent we need to release our master reference on CloseScreen. Signed-off-by: Chris Wilson commit febfd388235fbe566a505d7d83733305cf344850 Author: Chris Wilson Date: Tue Jun 25 18:05:28 2013 +0100 intel: Use the correct errno value for reporting the drmSetVersion failure Signed-off-by: Chris Wilson commit 2e2c448a77ab9dce4807b159708290cd7ad26b5c Author: Chris Wilson Date: Tue Jun 25 14:22:28 2013 +0100 sna: Don't flag IGNORE_CPU for partial overwritten blocks As we set the flags for the migration extents, but only operate upon the boxes in the region, we need to be careful to be sure to migrate data outside of the boxes overwritten. Fixes regression from commit 94cbe7bf7b7acc9a7f2cb56c5e275af028f3cdc8 [2.21.10] Author: Chris Wilson Date: Thu Jun 20 19:40:44 2013 +0100 sna: Mark overwriting CopyArea as not needing the dst damage If we start passing around regions rather than extents, we coud do finergrained migration decision. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55244 Signed-off-by: Chris Wilson commit 27ebef515ebc034b9b41a0f3d26ad7e6f966305e Author: Chris Wilson Date: Mon Jun 24 13:31:25 2013 +0100 Add the nickle utility scripts to the tarball So that the tarball matches the git checkout. Reported-by: Maarten Lankhorst Signed-off-by: Chris Wilson commit c88d911d4209a8ede5ec705ad925383c69182977 Author: Chris Wilson Date: Mon Jun 24 14:30:00 2013 +0100 sna: Initialise gc->ops->PolyPoint for miWideDash The miWideDash may also call PolyPoint rather than emit spans, so make sure that we correctly prepare sna_poly_point before calling mi*. Reported-by: Tobias Brodel Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66104 Signed-off-by: Chris Wilson commit 72e8ab2b8f7aabee3bd891f08c64f5b2587da8e1 Author: Chris Wilson Date: Mon Jun 24 11:46:38 2013 +0100 sna: Remove unused brw_eu_debug.c Reported-by: Maarten Lankhorst Signed-off-by: Chris Wilson commit 6ca4ae441c61b1f425453cc443bb1d4d10d25aaa Author: Chris Wilson Date: Sun Jun 23 23:41:57 2013 +0100 sna: Check for a request to create an inactive scanout The combination is just about valid and used along some odd paths, so replace the assertion with a regular checks. Signed-off-by: Chris Wilson commit b459ab9eeba4c865f15f0b3e28af318948b4adbd Author: Chris Wilson Date: Sun Jun 23 23:00:55 2013 +0100 sna: Move the reset bo to the right list Signed-off-by: Chris Wilson commit 77ddadf0ec6b867a0638660bf06c82ad31577795 Author: Chris Wilson Date: Sun Jun 23 22:01:12 2013 +0100 sna: Clear 'clear' hint upon uploading into tiled Fixes regression from commit 53c113c3cc2f8527debc185f0819139ca8637637 [2.21.10] Author: Chris Wilson Date: Fri Jun 21 19:27:24 2013 +0100 sna: Allow PutImage to write inplace using manual tiling Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66059 Signed-off-by: Chris Wilson commit d3de043d2de4aa11a85c56faf1658ec4c4699da2 Author: Chris Wilson Date: Sun Jun 23 21:30:56 2013 +0100 sna: Discard proxy upload buffers before overwritting for PutImage Signed-off-by: Chris Wilson commit d68d24dc3727dcc281bc9b45bc605874f3a3c4f2 Author: Chris Wilson Date: Sun Jun 23 19:08:32 2013 +0100 sna: Discard overwritten incomplete operations before migrating Signed-off-by: Chris Wilson commit 60dbd5a5b6cd56b7a33eac3afebe2d94ac8579c7 Author: Chris Wilson Date: Sun Jun 23 18:51:38 2013 +0100 sna: Document swizzling for DBG Signed-off-by: Chris Wilson commit fd375da5caf34f93a4e87670bb0c70fec5b4c55c Author: Chris Wilson Date: Sun Jun 23 17:06:11 2013 +0100 sna: Allow tiled uploads to accumulate damage And for the upload to create the bo as required. Signed-off-by: Chris Wilson commit b0e383363e8707c132a8a1748757d84120a99b31 Author: Chris Wilson Date: Sun Jun 23 10:55:21 2013 +0100 sna/gen5: Elide the forced flush after a drawrect Presume that the non-pipelined drawrect is sufficient to serialise operations to the render cache. Signed-off-by: Chris Wilson commit 16fb786bd0791986fcac8b11a7e182090c5b6249 Author: Chris Wilson Date: Sun Jun 23 09:00:17 2013 +0100 sna/gen5: Force a write flush when changing blend modes Otherwise it appears that the hardware will readback from memory bypassing its render cache after a change of modes. There is probably a lot more subtly to it than this, but this appears to be a good first approximation. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51422 Signed-off-by: Chris Wilson commit 9eabe28a4046b33772bcfe109346179b81294420 Author: Chris Wilson Date: Sat Jun 22 17:37:19 2013 +0100 Tidy version query for i915.ko Signed-off-by: Chris Wilson commit 7ec0378b64e88923ba1c4eba043488685aa3a795 Author: Chris Wilson Date: Sat Jun 22 17:30:02 2013 +0100 sna: Only open the /dev/dri/cardX device once Merge the device open in the main driver with the probing so that we can open the path explicitly passed in by the PlatformProbe and keep that fd around for the main driver and so avoid a later search. Signed-off-by: Chris Wilson commit 41badce186fe0f6e8f49e30b6c1c251027161e35 Author: Chris Wilson Date: Sat Jun 22 16:34:20 2013 +0100 sna: Add reference counting to drmMaster for Zaphod With Zaphod enabled, we will try to acquire/release the drmMaster several times on each enter/leave VT. This obviously flags an error (and drops the master too early), so track the number of references we still hold for drmMaster. References: https://bugs.freedesktop.org/show_bug.cgi?id=66041 Signed-off-by: Chris Wilson commit 81b35092c39bf6d9851ac37da4b20358405cf314 Author: Chris Wilson Date: Sat Jun 22 09:22:45 2013 +0100 2.21.10 release commit 5189ba727fe48990f00d5787c53d7b15fa1838a4 Author: Chris Wilson Date: Sat Jun 22 13:39:47 2013 +0100 sna: Refine the self-cow copy hack to reduce collateral damage Sergio Callegari found a case in LibreOffice that copied cloned pixmaps onto each other and then modified one of the pair. This was triggering the hack put in to speed up firefox scrolling, unfortunately. Reported-by: Sergio Callegari References: https://bugs.freedesktop.org/show_bug.cgi?id=65665 Signed-off-by: Chris Wilson commit 62e42de300275a668a326357d454062221714fe8 Author: Chris Wilson Date: Fri Jun 21 21:00:23 2013 +0100 sna: Determine swizzling once during initialisation and choose memcpy_to_tiled_x Signed-off-by: Chris Wilson commit 53c113c3cc2f8527debc185f0819139ca8637637 Author: Chris Wilson Date: Fri Jun 21 19:27:24 2013 +0100 sna: Allow PutImage to write inplace using manual tiling Signed-off-by: Chris Wilson commit 48028a7c923fa0d66b01e8e94d4f0742866f78ec Author: Chris Wilson Date: Fri Jun 21 14:29:43 2013 +0100 sna: Inspect availablity of render before prefering to use the GPU Signed-off-by: Chris Wilson commit 71fc83401ec8c560a89a284805e849954ea18ee4 Author: Chris Wilson Date: Fri Jun 21 14:28:38 2013 +0100 sna: Check if we may want to simply upload for a CopyArea Signed-off-by: Chris Wilson commit 7e90e522199c4d6b479554073acb33e9d82fb8cc Author: Chris Wilson Date: Fri Jun 21 14:27:42 2013 +0100 sna: Fix inspection of transfer extents for deciding transport Signed-off-by: Chris Wilson commit 94cbe7bf7b7acc9a7f2cb56c5e275af028f3cdc8 Author: Chris Wilson Date: Thu Jun 20 19:40:44 2013 +0100 sna: Mark overwriting CopyArea as not needing the dst damage Signed-off-by: Chris Wilson commit b3d1118bbee1172f72c946163a37ca4ad5feecce Author: Chris Wilson Date: Thu Jun 20 19:34:18 2013 +0100 sna: Promote the CopyArea to the GPU if it subsumes the CPU damage Signed-off-by: Chris Wilson commit 186ac909ad2099f834e7b2c513a02cd4d041327c Author: Chris Wilson Date: Thu Jun 20 15:32:30 2013 +0100 sna: Fix tiled scanout limits for Valleyview It appears that Valleyview shares the same scanout limits as gen4. Signed-off-by: Chris Wilson commit 112fc5f370f8daf267d7241ca2d669194abaa183 Author: Chris Wilson Date: Wed Jun 19 19:53:14 2013 +0100 sna: Tidy a redundant conditional for CopyArea Signed-off-by: Chris Wilson commit ba642d9ff86fcf8b0b758d65565e3b5b6293b667 Author: Chris Wilson Date: Wed Jun 19 16:27:36 2013 +0100 sna: Fix the pitch limits for gen3 scanout Signed-off-by: Chris Wilson commit 06679c1433cfb21ba925584700e2e97439fdf64a Author: Chris Wilson Date: Wed Jun 19 16:16:14 2013 +0100 Revert "sna: Apply scanout stride limits to tiling selection" This reverts commit cc08f6e0ef54744434fe0fd6d76348ee6099a62d. Prefer to keep the frontbuffer as tiled, and use an per-crtc pixmap in case the frontbuffer is not suitable as the framebuffer. commit f165d2e21358703c5f4ed302a4a57219db482a59 Author: Chris Wilson Date: Wed Jun 19 16:15:32 2013 +0100 sna: Switch to a per-crtc pixmap if the pitch exceeds scanout limitations References: https://bugs.freedesktop.org/show_bug.cgi?id=65099 Signed-off-by: Chris Wilson commit cc08f6e0ef54744434fe0fd6d76348ee6099a62d Author: Chris Wilson Date: Wed Jun 19 15:50:01 2013 +0100 sna: Apply scanout stride limits to tiling selection gen4 has a restricted DSPSTRIDE limit for tiled surfaces lower than the maximum supported size of the CRTC. So we need to double check whether tiling the scanout is supported before attempting to allocate a tiled scanout. Reported-by: Paul Donohue Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65099 Signed-off-by: Chris Wilson commit f95ed64a11339b801d655ee173f37e01727a4a87 Author: Chris Wilson Date: Wed Jun 19 14:47:46 2013 +0100 sna: Assert that the scanout fits within the allocated buffer Signed-off-by: Chris Wilson commit 6132400365f8f467d838ed26002e74412e1c7298 Author: Jonathan Gray Date: Wed Jun 19 11:30:24 2013 +0100 configure: test for librt (clock_gettime) clock_gettime() is in libc not librt on OpenBSD so check to see if linking librt is required. Signed-off-by: Jonathan Gray commit f567f19b37d00131cda749e31c6d2dc8b52a1d62 Author: Chris Wilson Date: Tue Jun 18 22:17:11 2013 +0100 sna: Allow wedged pixmaps to be accessed via GTT Signed-off-by: Chris Wilson commit c3695c3c6b7bc13b5e642c9d92648e8228411bed Author: Chris Wilson Date: Tue Jun 18 09:41:20 2013 +0100 sna: Specialise mi calls to PolyFillRect Signed-off-by: Chris Wilson commit 40329e34b9ac65d930757d53283b7d8f4066c3a2 Author: Chris Wilson Date: Sat Jun 15 13:25:39 2013 +0100 sna: Add extra assertions to sanity check CPU access is coherent Signed-off-by: Chris Wilson commit abb522e07a2c3bf39e2587ddedc4bb8ac955c536 Author: Chris Wilson Date: Tue Jun 18 09:01:49 2013 +0100 sna: Do not sync after a failed mapping The domain update should be a redundant operation, causing needless extra transitions. Signed-off-by: Chris Wilson commit 6086abca13efdeaf9b24c9fbe425546cbe2cfb12 Author: Chris Wilson Date: Mon Jun 17 22:44:58 2013 +0100 sna: Try falling back through an upload if inplace mapping fails Signed-off-by: Chris Wilson commit a86b217934a9a16843ac17b38cd5b61393f65aa0 Author: Chris Wilson Date: Tue Jun 18 09:45:08 2013 +0100 sna: Mark the base bo as unreusable for temporary mappings Update required after forcing unaligned userptr to use proxies. Signed-off-by: Chris Wilson commit ca913e8f1e4b113af3a30cca50679436df23bef1 Author: Chris Wilson Date: Mon Jun 17 22:44:20 2013 +0100 sna: Unwrap proxies for subpage offset SHM pixmaps during sync Signed-off-by: Chris Wilson commit d54049808daafed12cf99ff6a1a7395136ab1dc6 Author: Chris Wilson Date: Wed Jun 12 19:13:12 2013 +0100 sna: Refactor scanout flushing In preparation for extending the kernel interface to be more explicit about when we need to flush a direct write to the scanout. Signed-off-by: Chris Wilson commit 7ebcf94736926d4c7bb5ba1627be0a62b15c1663 Author: Chris Wilson Date: Sat Jun 15 12:27:19 2013 +0100 sna: Be explicit in not marking an upload buffer as being on the cpu Since the upload buffer is special in that it simultaneously exists on both the CPU and GPU, we need to be extremely careful in marking the cpu hint flag and asserting it. In particular, the new stricter assert was firing in the CompositeTrapezoids fallback path. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit cafa33a522ac634d465f24d0a1607516e65a0828 Author: Chris Wilson Date: Thu Jun 13 22:51:42 2013 +0100 sna/gen3+: Remove redundant clearing of clear hint in video playback The clear hint is correctly updated when performing the move-to-gpu and so it is being superfluously repeated by the callers. Signed-off-by: Chris Wilson commit 45ca894bce73e199d679b9f147c52ada59e40ccb Author: Chris Wilson Date: Thu Jun 13 16:47:10 2013 +0100 sna: Tighten a few asserts on pixmap migration Tracking to track down where the CPU hint may be set to true but the pixmap remain entirely damaged on the GPU. Signed-off-by: Chris Wilson commit 8f340f90f4b2f269d6308d0bd31fbc2a5f579608 Author: Chris Wilson Date: Thu Jun 13 16:08:49 2013 +0100 sna/gen7: Set sampler swizzle for video sources Otherwise the sampler on Haswell will just read all zeros when trying to playback a video. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65699 Signed-off-by: Chris Wilson commit 5f20be82563176c45a31a9676b68a3455566bc67 Author: Chris Wilson Date: Thu Jun 13 11:18:42 2013 +0100 sna/gen2+: Promote a conditional dirty into an assertion If the target bo is not bound when we start to emit the composite state for the operation, we are screwed. Signed-off-by: Chris Wilson commit 6655cc1d9735a8433994c762583753b12e2125b4 Author: Chris Wilson Date: Wed Jun 12 18:44:27 2013 +0100 sna: Do not enlarge the read back region if there is already CPU damage We enlarge the read back into to minimise the number of times we have to migrate pixmap data. However, if we then enlarge the read so that it overwrites CPU dirty data, then we can introduce corruption. Signed-off-by: Chris Wilson commit 1f180b89db412c5fa9fe95c8f6634be33a1d8581 Author: Chris Wilson Date: Wed Jun 12 14:23:32 2013 +0100 sna/video: Free the private video (adaptor/port) arrays upon CloseScreen Signed-off-by: Chris Wilson commit 04ea469d4f30f9bb25561f3d04f1463999c8d928 Author: Chris Wilson Date: Wed Jun 12 14:20:10 2013 +0100 sna/video: Catch allocation failure whilst setting up the TexturedAdaptor Missing NULL check for calloc of the port private array. Signed-off-by: Chris Wilson commit dc8f2def5461c75fce6d648036a61186fd00d23f Author: Chris Wilson Date: Wed Jun 12 08:34:48 2013 +0100 sna: Allow the throttling to be woken by SIGINT Rather than completely starve X from handling input events and raising the spectre of miEQ overflow, stop throttling upon SIGINT. We will have waited a small period of time (~100ms) for the GPU to catch up, and will do so again in the near future. This also preserves the hang detection. Signed-off-by: Chris Wilson commit 15b92c98755c709f41e59baeb206e5a3e56e3178 Author: Chris Wilson Date: Tue Jun 11 14:23:57 2013 +0100 sna: Make sure the source is coherent on the CPU before uploading Similar to 7d91051c, but along the render path rather than CopyArea. Makes the presumption that for the upload path the region is stored on the CPU explicit. References: https://bugs.freedesktop.org/show_bug.cgi?id=61628 Signed-off-by: Chris Wilson commit 1392f296a3fc94bb64abe4c3370c2f3cd52bef9f Author: Chris Wilson Date: Tue Jun 11 15:10:06 2013 +0100 sna: Mollify an assert to allow us to call busy_ioctl on a GTT write The code was being careful in making sure that only a BO with an outstanding GPU write was being flushed. We need to relax that assertion to allow us to call busy_ioctl after only GTT writes. Signed-off-by: Chris Wilson commit 7d91051c50210560dbd93a9e36f30d9f74ce9133 Author: Chris Wilson Date: Tue Jun 11 14:23:57 2013 +0100 sna: Make sure the source is coherent on the CPU before uploading Makes the presumption that for the upload path the region is stored on the CPU explicit. References: https://bugs.freedesktop.org/show_bug.cgi?id=61628 Signed-off-by: Chris Wilson commit 2e2db4b88f741ca6cd4312c6c5242261c5de4d06 Author: Chris Wilson Date: Tue Jun 11 00:49:35 2013 +0100 sna: Tidy batch submission around CRTC updates A few places we were redundantly submitting the same bo, and in others doing more work than necessary. Signed-off-by: Chris Wilson commit b9439a56170c4732b340137d306933a742ee6ae9 Author: Chris Wilson Date: Mon Jun 10 22:56:20 2013 +0100 sna: Move the GTT dirty tracking from the pixmap to the bo This allows us to more accurately track when the GTT is dirty. However, the only danger is that we may prematurely flush the scanout and clear the dirty bit and not preserve the flush timer. Signed-off-by: Chris Wilson commit 5f0c5a49538d9995926b8dbda85c8e6d99496f17 Author: Chris Wilson Date: Mon Jun 10 22:48:03 2013 +0100 sna: s/bo->dirty/bo->gpu_dirty/ to avoid later confusion The next step is to introduce bo->gtt_dirty. Signed-off-by: Chris Wilson commit b44307753655fac985404c519a54ca65da323900 Author: Chris Wilson Date: Mon Jun 10 21:34:52 2013 +0100 sna: Make sure all sna_write_boxes* flag the GTT is dirty Better would be to start passing in the sna_pixmap so that we can mark the GTT as dirty in a single location, and only if we do indeed then do a GTT update or pwrite. Signed-off-by: Chris Wilson commit 005075de9d20fe7c2b9a6e184c912559929710ad Author: Chris Wilson Date: Mon Jun 10 14:50:47 2013 +0100 sna: Keep the cached EDID if it hasn't changed Rather than reparsing the EDID each time we probe the modes, if the property hasn't changed keep it. Signed-off-by: Chris Wilson commit 3d760c9b32776bf2f1acde9256388769a9c5a398 Author: Chris Wilson Date: Wed Jun 5 12:52:11 2013 +0100 sna: Streamline connector probing This is a tidy up in preparation for a more controversial patch. In the meantime, take advantage of information that remains static over the lifetime of our connectors. Signed-off-by: Chris Wilson commit b584162e387187a7cdb7f46a3a151e00e7d3de58 Author: Chris Wilson Date: Fri Jun 7 16:32:40 2013 +0100 sna: Set the needs_flush flag on the bo when the scanout is dirty Since the call to the busy_ioctl is predicated on whether the bo needs to be flushed by us, therefore when forcing the call to the busy_ioctl to flush the GTT we need to mark it as requiring needs_flush. Signed-off-by: Chris Wilson commit 7151e437df4437df35a67ae125607e665c66353c Author: Chris Wilson Date: Fri Jun 7 16:09:18 2013 +0100 sna: Track when we write directly to bo through the GTT In the future, we may need to explicitly flush GTT writes to the scanout, so add the infrastructure to do so now. Signed-off-by: Chris Wilson commit 79145b70a7bda2941059ce7e630f84e2b24b465a Author: Chris Wilson Date: Fri Jun 7 15:33:51 2013 +0100 sna/dri: Check rather than assert for a change in back/front sizes The DRI2 midlayer may, or may not, recreate the back buffer after a pixmap change. The result is that the back buffer may or may not be flagged as unsuitable for flipping, so be paranoid and double check. (This behaviour was first introduced in 1.9.0 and looks to be removed again in 1.15.0) Signed-off-by: Chris Wilson commit 2f91643cde954c23633c6f91940f7216796b949c Author: Chris Wilson Date: Fri Jun 7 14:50:55 2013 +0100 sna/dri: Fix transcription error in commit ab47433b20 Reversed a predicate causing it to fail to blit when it had a drawable (and worse dereferencing a NULL pointer) instead of terminating when the Drawable was gone. Signed-off-by: Chris Wilson commit e85271e516f811c60f440de61995cc5baf469a47 Author: Chris Wilson Date: Fri Jun 7 13:35:48 2013 +0100 sna/dri: Do not decouple the flip after chaining up a blit Fixes regression from previous patch. Signed-off-by: Chris Wilson commit ab47433b20a623bf790acfbf2005a8782d177f64 Author: Chris Wilson Date: Thu Jun 6 23:15:14 2013 +0100 sna/video: Select vsync by default based on "SwapbuffersWait" To be strictly identical to the DRI code, we should override the user when the option is set. However, this a baby step for simple bug testing. References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1176647 Signed-off-by: Chris Wilson commit 7e1e18aca214a8705270972131a1800c81bc3b4d Author: Chris Wilson Date: Thu Jun 6 21:40:30 2013 +0100 sna/video: Fixup formats to select visuals Fixes regression from commit 195a51353c3af7bd253227da5f759f06cea01f73 [2.21.8] Author: Chris Wilson Date: Tue Apr 9 19:13:46 2013 +0100 sna/video: Convert to a pure Xv backend Reported-by: Edward Sheldrake Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65479 Signed-off-by: Chris Wilson commit 0869acc0a6a5b92f5528049d2bd5ec62121ba114 Author: Chris Wilson Date: Thu Jun 6 21:21:24 2013 +0100 sna/dri: Make the fallback blit async again Previously it was async, and is likely to be anyway as the pageflip failed due to the change in output. To be safe, once again request that the copy does not stall the GPU upon the scanline window. Signed-off-by: Chris Wilson commit 9b52c852aaf42dde3a7f29c065e4d5230eac7a64 Author: Chris Wilson Date: Thu Jun 6 16:40:01 2013 +0100 sna/dri: Handle fast double flips across mode changes The tricky nature of the double flip is that there is no SwapComplete pending and so we must avoid calling it under such circumstances. Signed-off-by: Chris Wilson commit 0da5cc23b18d4e2473a3b6a571fb49d08bb1dd2d Author: Chris Wilson Date: Thu Jun 6 14:11:50 2013 +0100 sna: Fix format specifier for mismatching int/long in DBG Signed-off-by: Chris Wilson commit 2770655371954413c750b030c9a7135baee302d4 Author: Chris Wilson Date: Thu Jun 6 12:04:23 2013 +0100 2.21.9 release commit d3345cd269dc75999b35f3286d21059974dcb24b Author: Chris Wilson Date: Thu Jun 6 12:18:32 2013 +0100 sna: Only emit an error for terminal mmap failures If we repeat the mmap, keep quiet. Only emit the ErrorF in case even the repeated attempts to mmap the bo fail. Signed-off-by: Chris Wilson commit 70fa080d02bff9742523cea52c875d9447a78bfd Author: Chris Wilson Date: Wed Jun 5 23:32:01 2013 +0100 sna: Include the GT details in the backend name for a chipset Signed-off-by: Chris Wilson commit 45c09bfe58c37bbf7965af25bdd4fa5c37c0908f Author: Rodrigo Vivi Date: Wed Jun 5 13:07:13 2013 -0300 Add more correct names for Haswell. As we find out more of the final product names for Haswell chipsets, we need to update the user visible identification strings. Signed-off-by: Rodrigo Vivi commit a9f9fb8e44bb0bdbd004da1fce986585ebcafd28 Author: Chris Wilson Date: Wed Jun 5 09:48:19 2013 +0100 sna/video: Fix redundant initialisation of video->clip It will be created before use anyway, but this silences a compiler warning. Signed-off-by: Chris Wilson commit 5d0ae71f1d667759ed4cfd2b7e793a08b8e3702c Author: Chris Wilson Date: Wed Jun 5 09:12:48 2013 +0100 sna: Do not conflate ignoring an output with an allocation failure If the user explicitly ignores an output through xorg.conf, then xf86OutputCreate returns NULL. This is not to be confused with an allocation error that also returns NULL. The latter is terminal, the former is desired. Fixes regression from commit a9acc8dbb436e1e523e7d7c0f3c41946a2d0f245 Author: Chris Wilson Date: Thu May 30 12:09:52 2013 +0100 sna: Cleanup up error reporting after failure to init KMS interface Reported-by: David Rosca Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65381 Signed-off-by: Chris Wilson commit 6dacaddb6a28670a52cead4b62c056a8acde8f3a Author: Chris Wilson Date: Mon Jun 3 15:34:37 2013 +0100 sna: Always populate the CPU features string So that we don't print random contents of the stack on ancient 32-bit CPUs with no extended instruction sets. References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1186800 Signed-off-by: Chris Wilson commit 8a88c01c3737a3570628600b1ab51938f82e226d Author: Chris Wilson Date: Mon Jun 3 14:14:09 2013 +0100 sna: Make copying the glyph size more compact The assembly was ugly with an unwarranted AGU stall. Signed-off-by: Chris Wilson commit 66ad4d6f3c990bd40d816b4a22122bbf64786e4c Author: Chris Wilson Date: Sun Jun 2 12:13:46 2013 +0100 sna/dri: Undo any COW before performing a copy with DRI2CopyRegion Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65250 Signed-off-by: Chris Wilson commit 9a8ff7861c50b2f8698a968a011d5d833c7d5975 Author: Chris Wilson Date: Sun Jun 2 12:13:28 2013 +0100 sna: Add some more DBG hints to copy-on-write cloning Signed-off-by: Chris Wilson commit c4ad7b14ca71b95af83864b05793ea357f48bb88 Author: Chris Wilson Date: Sat Jun 1 16:58:15 2013 +0100 sna: Prevent adding damage to an already all-damaged GPU bo Keep the bookkeeping straight after propagating the source clear colour: commit 810a0ce2f89ba6b343b5043963626c0f2d50fb22 [2.21.7] Author: Chris Wilson Date: Fri May 10 12:02:10 2013 +0100 sna: Propagate clear color when replacing by a CopyArea Reported-by: Roman Jarosz Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65247 Signed-off-by: Chris Wilson commit be84b6929705584f30b63d6e613ff3d8e6e3dc1d Author: Chris Wilson Date: Sat Jun 1 16:51:38 2013 +0100 sna/dri: Reorder assert not to fail on a pageflip deferred to after a modeset Signed-off-by: Chris Wilson commit 2e11b520bbdb1af7e977db7fdef2d4c41242d56f Author: Chris Wilson Date: Thu May 30 15:34:08 2013 +0100 sna: Compile fix for non-debug builds sna_display.c: In function 'get_fb': sna_display.c:181:3: warning: implicit declaration of function 'assert_scanout' [-Wimplicit-function-declaration] sna_display.c:181:3: warning: nested extern declaration of 'assert_scanout' [-Wnested-externs] * sigh Signed-off-by: Chris Wilson commit 3a9975729c665cd09a33e33eab608350aaee8160 Author: Chris Wilson Date: Thu May 30 14:15:23 2013 +0100 sna: Restore GPU promotion for large fills Fix another regression from commit ef9dc6fae585d5616446eedc1e6e91173f4064c1 [2.21.7] Author: Chris Wilson Date: Mon May 20 11:08:51 2013 +0100 sna: Undo a few more overwritten operations upon a bo The REPLACES predicate was meant to complement the existing tests, not be compulsory. Found whilst investigating why performance seemed to have dropped off in Phoronix's benchmarks. Reported-by: Michael Larabel Signed-off-by: Chris Wilson commit 08b33ba8f12bb4bc425ca1bc40e2660e446e2c65 Author: Chris Wilson Date: Thu May 30 14:57:56 2013 +0100 sna: Assert that an existing scanout is the desired size Signed-off-by: Chris Wilson commit a9acc8dbb436e1e523e7d7c0f3c41946a2d0f245 Author: Chris Wilson Date: Thu May 30 12:09:52 2013 +0100 sna: Cleanup up error reporting after failure to init KMS interface Signed-off-by: Chris Wilson commit f4fcb0e7d24a104afb642dd8819e67ffcaafbfb1 Author: Chris Wilson Date: Thu May 30 12:02:44 2013 +0100 sna: Report allocations failures during Screen initialisation Just abort instead of trying to limp on if we fail to even allocate memory during initialisation. Signed-off-by: Chris Wilson commit 7f7c8087db6af58109e791763fe33582a1559646 Author: Chris Wilson Date: Wed May 29 12:25:37 2013 +0100 sna: Log which outputs are being configured during a modeset Signed-off-by: Chris Wilson commit fc1e0702b25e647cb423851fb7228989fec28bd6 Author: Daniel Vetter Date: Wed May 29 11:25:28 2013 +0100 sna: fixup up possible_clones kms->X impedance mismatch We need to be a notch more careful with remapping the possible clones mask from the kernel: - SDVO and Haswell DDI have multiple connectors mapping to the same encoder. - The connector list can be reordered compared to the encoder list. This is used to move eDP/LVDS to the front. Also add even more debug output. Signed-off-by: Daniel Vetter commit b7aa05e44b1f88284183c1c73bb074dd5dce74cb Author: Chris Wilson Date: Tue May 28 23:01:30 2013 +0100 sna: Sanity check that CRTC / output combination is valid Signed-off-by: Chris Wilson commit b507796679529b14c99e8937870561cd8eebebb9 Author: Chris Wilson Date: Tue May 28 12:13:02 2013 +0100 Add the known marketing names for the performance Haswell parts Start filling in the names for the parts that have been announced, the Iris branded Haswell GT3 parts. Signed-off-by: Chris Wilson commit b3169768ddf8c8977d2ace3675611b5ec6eba7ee Author: Chris Wilson Date: Tue May 28 12:02:56 2013 +0100 sna: Make the backend identifier more informative This is useful, for example, with the multiple gen7 variants. Signed-off-by: Chris Wilson commit 0839e3316a02380cd64d354ee0ec9d4c2b8eecf4 Author: Chris Wilson Date: Tue May 28 11:18:14 2013 +0100 sna: Call mode update after disabling outputs upon VT switch Perform a second sanity check that all the outputs we expect to be active remain so following the cleanup after VT switching. Signed-off-by: Chris Wilson commit 7d64f596b895071ea253481c97275bf551c013e9 Author: Chris Wilson Date: Mon May 27 21:13:40 2013 +0100 test: Add an easily visible tearing test for video playback Contributed by Matti Hamalainen. commit f38d037b94aacdccb2aaa058bbe48d1c8079d604 Author: Chris Wilson Date: Mon May 27 21:07:20 2013 +0100 sna/video: Correct interpretation of 'sync' The 'sync' parameter past along XvPutImage is not a request for us to perform the operation synchronised to the vblank, rather a hint that the client wishes the operation to be synchronous. In Xorg, this is implemented as an immediate ShmCompletion event so make sure we flush the operation to hw in this case. Fixes regression from commit 195a51353c3af7bd253227da5f759f06cea01f73 [2.21.8] Author: Chris Wilson Date: Tue Apr 9 19:13:46 2013 +0100 sna/video: Convert to a pure Xv backend Reported-by: Matti Hamalainen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65048 Signed-off-by: Chris Wilson commit 7e7d0ad15bafc4624f8c2ccf73c08ead5cc6fd6a Author: Chris Wilson Date: Mon May 27 13:41:13 2013 +0100 2.21.8 release commit 51103d8637ba34a0d5f3507e196f54333aa765bb Author: Chris Wilson Date: Sat May 25 15:53:11 2013 +0100 sna: Free the released COW reference when uncloning Reported-by: Jiri Slaby Reported-by: David Gow Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64978 Signed-off-by: Chris Wilson commit fce4292ab7216a1c610ffc57aa6763e05b458904 Author: Chris Wilson Date: Fri May 24 15:15:13 2013 +0100 sna: Fix cut'n'paste compile error from previous commit Always check for outstanding diff before pushing. Signed-off-by: Chris Wilson commit e2e139923dd000f13602e51d94bc8a265b5e234f Author: Chris Wilson Date: Fri May 24 15:08:13 2013 +0100 sna: Log when the framebuffer changes size Signed-off-by: Chris Wilson commit 820f97ede7a38015a781de72cc265b0b65f86415 Author: Chris Wilson Date: Fri May 24 14:38:06 2013 +0100 sna: Reorder cleanup of flush list and CPU bo to silence an assertion Keep the bookkeeping in order. Signed-off-by: Chris Wilson commit 79e98ea6448f666d1a6dcca19bfe0e84fb62dd46 Author: Chris Wilson Date: Fri May 24 13:08:26 2013 +0100 sna: Reenable COW support Accidentally left it disabled whilst testing. Signed-off-by: Chris Wilson commit f6c35e58c1bb94ccfa04723db76d7164d5772f11 Author: Chris Wilson Date: Fri May 24 12:43:16 2013 +0100 sna: Do not undo a bo if we may fallback If we undo the pending operations to a bo, then fallback we cause corruption. For example, see wine and its 1-bit rendering. Fixes regression from commit 07a4400fffe4f83df3debe62abd2c37b45f8f0c0 [2.21.7] Author: Chris Wilson Date: Fri May 10 11:59:59 2013 +0100 sna: Attempt to discard overwritten operations before CopyArea Also we need to be more careful and consider alu when marking the operation as 'replaces'. Signed-off-by: Chris Wilson commit 818702d3dc48964e4fd11afe8f2fce431ae913c0 Author: Chris Wilson Date: Fri May 24 12:15:42 2013 +0100 sna: Discard COW before migrating CPU damage to the GPU At that point, the GPU bo will no longer be a clone of the source and so we need to decouple it and make ourselves a fresh copy. Signed-off-by: Chris Wilson commit 2b9723767612702f4cfa2f73ffced83c46eccddf Author: Chris Wilson Date: Fri May 24 11:46:36 2013 +0100 sna: Do make a clone of a GPU bo that is itself a cache As we do not attempt to undo the cache status upon the clone. Signed-off-by: Chris Wilson commit dbe2b5896ec2cd00a456236467b221c9fafdd2f7 Author: Chris Wilson Date: Fri May 24 12:03:41 2013 +0100 sna: Correct assertion for reusing COW Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 2005b273e10f2b946f79c602b55a7bf585c936de Author: Chris Wilson Date: Fri May 24 11:02:20 2013 +0100 sna: Check for NULL damage before dereferencing Fixes regression from commit 16a64649e9c440ab9457467fe04be25719a73e7c [2.21.7] Author: Chris Wilson Date: Fri May 10 15:48:58 2013 +0100 sna: Basic copy-on-write support for cloning pixmaps Reported-by: Axel Rohde Signed-off-by: Chris Wilson commit ee7ea10148b7843091c3fa103f9f4476979f8b68 Author: Chris Wilson Date: Thu May 23 12:55:21 2013 +0100 sna: Only flags the PolyFillRect as REPLACES if it is unclipped Otherwise we discard a fill operation that is required to initialise the pixmap before drawing commences. Fixes regression from commit ef9dc6fae585d5616446eedc1e6e91173f4064c1 [2.21.7] Author: Chris Wilson Date: Mon May 20 11:08:51 2013 +0100 sna: Undo a few more overwritten operations upon a bo Reported-by: Matti Hamalainen Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64841 Signed-off-by: Chris Wilson commit 87295b1ef85505689ce326137c2794230fb3f35f Author: Chris Wilson Date: Wed May 22 09:43:16 2013 +0100 sna: Remove the overzealous assert IGNORE_CPU is sometimes only set when there is CPU damage to ignore... Signed-off-by: Chris Wilson commit f2e0454f2df4289521b24de41fb41c68f7abf0ed Author: Chris Wilson Date: Wed May 22 08:58:51 2013 +0100 sna: Fix DBG typo and so fix build with --enable-debug s/hint/flags/ -- used the wrong variable name in an assert and upset the compiler. Signed-off-by: Chris Wilson commit abe85adda51c58d3f3b9c5dea6cec4b13a65cdcd Author: Chris Wilson Date: Tue May 21 13:39:35 2013 +0100 sna: Warn about the consequences of disabling tiling Signed-off-by: Chris Wilson commit 195a51353c3af7bd253227da5f759f06cea01f73 Author: Chris Wilson Date: Tue Apr 9 19:13:46 2013 +0100 sna/video: Convert to a pure Xv backend This is to enable feature work which requires access to Client state. Signed-off-by: Chris Wilson commit 8e42637050275945200797538a34c13c90b295cc Author: Chris Wilson Date: Tue May 21 11:13:03 2013 +0100 sna: Re-enable read-read optimisations Coacher is optimistic that the issue is no longer reproducible on his machine - and whilst I do not understand the root cause, I am confident that the kernel code is correct as is our use. References: https://bugs.freedesktop.org/show_bug.cgi?id=61628 Signed-off-by: Chris Wilson commit e65ee10dfd7155230ac18a6d24a67b68336dc973 Author: Chris Wilson Date: Tue May 21 11:01:50 2013 +0100 2.21.7 release commit ef9dc6fae585d5616446eedc1e6e91173f4064c1 Author: Chris Wilson Date: Mon May 20 11:08:51 2013 +0100 sna: Undo a few more overwritten operations upon a bo Signed-off-by: Chris Wilson commit d6c30d1d4df6bcdfa075bd29da7c8aabee20774c Author: Chris Wilson Date: Fri May 17 12:11:34 2013 +0100 sna: Clear the cow_list when discarding the clone upon pixmap destroy Signed-off-by: Chris Wilson commit 21f17455650d52848467290f609c678e85b8ceab Author: Chris Wilson Date: Fri May 17 11:46:16 2013 +0100 sna: Add the missing ref(bo) when undoing the source clone Signed-off-by: Chris Wilson commit ee166ca856ac02ca8900b9ff44ed3899add2c72a Author: Chris Wilson Date: Fri May 17 11:30:03 2013 +0100 sna: Undo the clone when replacing the DRI pixmap Signed-off-by: Chris Wilson commit 8d31fe771b423a3768cbd05db994d49e941369e1 Author: Chris Wilson Date: Fri May 17 11:14:34 2013 +0100 sna: Transfer ownership of the cloned bo to the pixmaps Fix the leak from the previous commit. Signed-off-by: Chris Wilson commit 5d9315873e02d4acc5ddffc698dbf8984cbd5c42 Author: Chris Wilson Date: Fri May 17 10:51:44 2013 +0100 sna: Avoid replacing pinned bo when undoing a clone Otherwise we end up cloning the scanout only to leave it dangling if the client copies the from the front-buffer and then writes to it. Reported-by: Nick Bowler Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=64675 Signed-off-by: Chris Wilson commit 3efe143e367acfa2ff38c63388d24a8d06331944 Author: Chris Wilson Date: Fri May 17 10:30:51 2013 +0100 sna: Clear mapped hints upon cloning a pair of pixmaps Once cloned, we do not want to use inplace operations and instead force a copy. However, if we do not relinquish the hints when copying across the bo, then those hints become stale and lead to corruption. Signed-off-by: Chris Wilson commit f57a65c35268f215c17f1a02b3af50a6678ce3c1 Author: Chris Wilson Date: Tue May 14 16:15:57 2013 +0100 sna: Correct assertions to allow discarding of cpu hint for inplace ops Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit bb0969e6a5c2bddcd0499d81c0c241003f8b07ef Author: Chris Wilson Date: Tue May 14 15:22:59 2013 +0100 sna: Assert that the mapping is released before closing the GEM handle Signed-off-by: Chris Wilson commit 16a64649e9c440ab9457467fe04be25719a73e7c Author: Chris Wilson Date: Fri May 10 15:48:58 2013 +0100 sna: Basic copy-on-write support for cloning pixmaps Signed-off-by: Chris Wilson commit d89b2647dc0b72d6fa6ff89065acd3776b04cd3f Author: Chris Wilson Date: Fri May 10 18:17:24 2013 +0100 sna: Propagate clears when using the BLT composite routines Signed-off-by: Chris Wilson commit 810a0ce2f89ba6b343b5043963626c0f2d50fb22 Author: Chris Wilson Date: Fri May 10 12:02:10 2013 +0100 sna: Propagate clear color when replacing by a CopyArea Signed-off-by: Chris Wilson commit 07a4400fffe4f83df3debe62abd2c37b45f8f0c0 Author: Chris Wilson Date: Fri May 10 11:59:59 2013 +0100 sna: Attempt to discard overwritten operations before CopyArea Signed-off-by: Chris Wilson commit 3ee42de066e4629f78e254c27d07dc33e16dbc02 Author: Rodrigo Vivi Date: Mon May 13 17:56:30 2013 -0300 Adding more reserved PCI IDs for Haswell. As Chris mentioned there is a tendency for us to find out more PCI IDs only when users report. So let's add all new reserved Haswell IDs. I didn't have better names for this reserved ids and didn't want to use rsvd1 and rsvd2 groups, so I decided to use "B" and "E" that stands for the last id digit. Cc: Chris Wilson Signed-off-by: Rodrigo Vivi commit ee96de8b1e7e4a305ee31c0ece1d9d38df8328f9 Author: Rodrigo Vivi Date: Mon May 13 17:56:29 2013 -0300 Fix Haswell GT3 names. When publishing first HSW ids we weren't allowed to use "GT3" codname. But this is the correct codname and Mesa is using it already. So to avoid people getting confused why in Mesa it is called GT3 and here it is called GT2_PLUS let's fix this name in a standard and correct way. Signed-off-by: Rodrigo Vivi commit 979d2f8d0038aa621e1c75200b10a3819e024a66 Author: Chris Wilson Date: Mon Apr 22 18:00:32 2013 +0100 sna/gen4: Tidy testing for an active vertex buffer id Signed-off-by: Chris Wilson commit 7ba63307058337af5a120ad01c93b423a3e422eb Author: Chris Wilson Date: Mon Apr 22 17:43:21 2013 +0100 sna/gen4: Drop unused gen parameter to SF state setup Signed-off-by: Chris Wilson commit 2217f6356b53263b6ce8f92b5c29c0614d4ef2a5 Author: Chris Wilson Date: Thu May 9 13:46:11 2013 +0100 sna/trapezoids: Fix the determination of the trapezoid origin "src-x and src-y register the pattern to the floor of the top x and y coordinate of the left edge of the first trapezoid," Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1178020 Signed-off-by: Chris Wilson commit 6e98df06fa9d218a6139730140a83a1940b05980 Author: Chris Wilson Date: Thu May 9 13:45:38 2013 +0100 sna: Add more debugging to unaligned trapezoids Signed-off-by: Chris Wilson commit 5d62ec25937ad296114bf890a7a5ac11ff03508c Author: Chris Wilson Date: Thu May 9 13:44:24 2013 +0100 sna/gen7: Add DBG for channel setup for render source Signed-off-by: Chris Wilson commit debdcd6a09464251324238ccbd935a6ade265d94 Author: Chris Wilson Date: Thu May 9 13:43:57 2013 +0100 sna: Add DBG statements for choice of spans vertex emitter Signed-off-by: Chris Wilson commit c6e4088dcb261d89fa0065eb7d9b62eada049dbd Author: Chris Wilson Date: Thu May 9 11:30:05 2013 +0100 sna: Handle cached upload buffers for partial migration to GPU Since the extended use of move_area_to_gpu for partial migration of render sources, we exposed the lack of handling of upload caches along that path. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 262ee1ef1e98cb84fa0af6e679c8cd61dc93f008 Author: Chris Wilson Date: Tue May 7 10:35:53 2013 +0100 sna: Do not attempt to clean an active scanout For simplicity, skip buffers that are still in use by the batch - they will be removed later. Signed-off-by: Chris Wilson commit 5637c173f85a5bb9a77572e4c070e0d612e6f49d Author: Chris Wilson Date: Wed May 1 15:14:55 2013 +0100 sna: Be careful not to preemptively upload portions of a SHM pixmap Only upload the portion of the pixmap being used for this rendering operation, as outside of that may remain undefined and to be written by the client before a future operation. Signed-off-by: Chris Wilson commit ca4a32c20d4c1f91552c02b9008ae16435b92d71 Author: Chris Wilson Date: Wed May 1 10:18:23 2013 +0100 sna: Page align requests to userptr Signed-off-by: Chris Wilson commit ab576a42650d8a743dd91108f774c220d866de95 Author: Chris Wilson Date: Sat Apr 27 12:06:30 2013 +0100 Add all reserved PCI-IDs for Haswell There is a tendency for a product to ship based on a 'reserved' PCI-ID prior to us being notified about it. In other words, the first we find out about such a product is when customers start complaining about their shiny new hardware not being supported... References: https://bugs.freedesktop.org/show_bug.cgi?id=63701 Signed-off-by: Chris Wilson commit 7dfb359677027310f4617b49f3da2321727a076f Author: Chris Wilson Date: Fri Apr 26 13:20:36 2013 +0100 uxa/dri: Fix compile error for unknown 'bool' It appears that it is only accidentally pulled in on some systems, but not all. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=63957 Signed-off-by: Chris Wilson commit 8eaafdb43998b5cdefb20b8098c558fa5decb115 Author: Chris Wilson Date: Wed Apr 24 15:48:14 2013 +0100 sna: Prevent accessing an uninitialised region in move_area_to_gpu() If we skip the migration, we need to avoid using the unitialiased region. There is no bad consequence as both branches of the if are no-ops, but it does silence the static checkers and should make the predicate cheaper. Signed-off-by: Chris Wilson commit b4871f1dac3d3c8d81101ef0f29eb69099ff2dcf Author: Chris Wilson Date: Thu Apr 18 09:51:39 2013 +0100 sna: Rephrase initialisation without a specific backend "generic" sounds more impressive than "no" Signed-off-by: Chris Wilson commit 6668f68054cb33e0cd3425f5403d14092a4a17f8 Author: Chris Wilson Date: Wed Apr 17 15:32:49 2013 +0100 Revert "xgvevent" This reverts commit ddd75d6539dcf692cb76747cd63d1f301180f18a. This is a WIP patch, not ready for upstream. The danger of mixing topic branches. commit 1bf0d869ae07ffc5b9cd79904b421cd37997ae8c Author: Chris Wilson Date: Wed Apr 17 15:24:10 2013 +0100 Prefer i830_dri.so for gen2 chipsets Probe for i830_dri.so and, if it exists, use that driver in preference to i915_dri.so for DRI (i.e. GL clients). This was suggested in the context of distributions supplying i915g as the main DRI driver for gen3, in which case we need to provide a separate DRI driver for gen2. Signed-off-by: Chris Wilson commit ddd75d6539dcf692cb76747cd63d1f301180f18a Author: Chris Wilson Date: Tue Apr 9 19:13:46 2013 +0100 xgvevent commit ddd3cc4ed6ac9b69f178147b49628b7a7f3f3104 Author: Chris Wilson Date: Tue Apr 16 11:55:23 2013 +0100 sna: Add VALGRIND_CFLAGS whilst compiling with --enable-valgrind Signed-off-by: Chris Wilson commit f0b6ae2cfb811a8c234634c878800ca1fb95703f Author: Chris Wilson Date: Mon Apr 15 11:42:20 2013 +0100 sna: Only release the scanout cache whilst DRM_MASTER If we try to release the framebuffers whilst not DRM_MASTER, the operation will fail and we will leak the buffers. So do not bother during the normal expiration to clean the scanout cache if vt switched away. Signed-off-by: Chris Wilson commit d68270ca84dc01a930c2ed0c05cecfac88c8cc4b Author: Chris Wilson Date: Fri Apr 12 14:48:04 2013 +0100 sna/xvmc: silence a compiler warning sna_video_hwmc.c: In function 'create_context': sna_video_hwmc.c:95: warning: assignment from incompatible pointer type Signed-off-by: Chris Wilson commit a64490c794e2e98c77e0c7f9cec6778fd1e06465 Author: Chris Wilson Date: Fri Apr 12 14:28:18 2013 +0100 sna: Add missing ';' Signed-off-by: Chris Wilson commit 9dae6f9f1f169c228929185a8bd94e82afe92574 Author: Chris Wilson Date: Fri Apr 12 11:01:08 2013 +0100 sna: Flush the scanout cache after resizing the display And ensure that any new scanout allocations make the requested size. Signed-off-by: Chris Wilson commit 97fc1d4c5bd268f331aaa9f7144e4fe40837fbb0 Author: Chris Wilson Date: Fri Apr 12 10:23:43 2013 +0100 sna/gen5: Force a MI_FLUSH between using the BLT and RENDER engines There is a workaround that says the first RENDER command following use of the BLT should be a non-pipelined command. To be safe, emit a MI_FLUSH before setting up the invariants. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1168066 Signed-off-by: Chris Wilson commit aff14a23f98b1230a9053a1b8434f5cc9f766d14 Author: Chris Wilson Date: Fri Apr 12 09:49:47 2013 +0100 sna: Refine assertion about the existence of CPU damage when GPU damaged One particular buffer type is quite cunning and simultaneously sets both CPU/GPU as all damaged (the upload buffer) so be aware when making bold assertions. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit afe61281d8f92d6eb841e2522ab18e0d2fe73773 Author: Chris Wilson Date: Wed Apr 10 12:13:37 2013 +0100 sna/gen7: Cache our kernels in L3 Signed-off-by: Chris Wilson commit caf3118f90bad7f88f5f08e49177a1696bf97ccb Author: Chris Wilson Date: Wed Apr 10 12:16:34 2013 +0100 sna: Align uploads to start on page boundaries This reduces the number of loops and restarts required in the kernel. Signed-off-by: Chris Wilson commit 092e30de8a3476ab99446264edaf9b250a41736b Author: Chris Wilson Date: Tue Apr 9 20:43:19 2013 +0100 sna/xvmc: Wrap each output adaptor Each of the overlay, sprite and textured video can support XvMC passthrough, so we need to setup an XvMC adaptor for each of our Xv adaptors. Signed-off-by: Chris Wilson commit 540802595fee7f8b2c73e74c2b44e9a21f6471ae Author: Chris Wilson Date: Wed Apr 10 10:33:48 2013 +0100 sna: Suppress hotplug events whilst VT switched away Whilst we are not DRM master, not only is another server in control of the outputs and responding to the udev event, we ourselves cannot change modes and just cause contention upon the DRM device. Instead inform userspace of the change as soon as we are DRM master again and back in control. Signed-off-by: Chris Wilson commit 7afe2b45556f07b7e3a36e36da5a6d1c60366c25 Author: Chris Wilson Date: Tue Apr 9 20:57:23 2013 +0100 sna: Add a DBG option for testing userptr more thoroughly Signed-off-by: Chris Wilson commit fbe081061a2790e0e6e6a4065af313df0d1d6a84 Author: Chris Wilson Date: Tue Apr 9 09:52:13 2013 +0100 sna: Document fence limits for gen4+ Signed-off-by: Chris Wilson commit 5f1367d611b91008ba28a8c99a6b98a3e84449dc Author: Chris Wilson Date: Tue Apr 9 09:18:41 2013 +0100 sna/video: Textured video passthrough no longer relies upon XvMC Signed-off-by: Chris Wilson commit 21294eaaf16a1e35fefe0f45a237826d38dc62eb Author: Chris Wilson Date: Tue Apr 9 09:10:33 2013 +0100 sna/video: Expand passthrough support for overlay planes The passthrough is actually a generic, albeit private, mechanism that anything can use to pass along a GEM handle for use with Xv. Signed-off-by: Chris Wilson commit 86efddd9e4b921fcfc1a4b7492ba9174b84de64c Author: Chris Wilson Date: Mon Apr 8 10:54:56 2013 +0100 sna: Remove assertions for mapped GPU bo if priv->cpu after GPU bo creation The condition that we have a mapped GPU bo iff priv->cpu is only true if we have a GPU bo at the time of using the CPU -- if we create the GPU bo during move_to_gpu, then that assertion is bogus. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit 678279eb373310f1a71a3d74e5a500b343e98830 Author: Chris Wilson Date: Sat Apr 6 15:58:50 2013 +0100 2.21.6 release commit 5332d5a7e055042233e279385bfe1388adfe15fa Author: Chris Wilson Date: Sat Apr 6 15:42:23 2013 +0100 configure: Allow valgrind support to be manually enabled Irrespective of the DDX debug settings, some people wish to run Xorg under valgrind and so prefer to have the cleaner output by making the DDX valgrind aware. (Actually Maarten wants valgrind support enabled by default...) Suggested-by: Maarten Lankhorst Signed-off-by: Chris Wilson commit 091cf6f0477824c5826547c02394752b6dc944ce Author: Chris Wilson Date: Sat Apr 6 09:30:57 2013 +0100 sna: Improve assertions to detect rogue priv->cpu status Signed-off-by: Chris Wilson commit 4a43aa81e27e8a651fde8a4761fd14bd8824d90c Author: Chris Wilson Date: Thu Apr 4 10:53:55 2013 +0100 sna: Restore bo->flush status for large bo Since we started discarding the flush flags on cached bo (in order to prevent DRI flush states leaking), we failed to preserve the flush flag for large bo (which uses it to keep batches trim and other hints). Signed-off-by: Chris Wilson commit ed3dab44a717a1a88470228b5e33f20de1e4ad0d Author: Chris Wilson Date: Tue Apr 2 15:20:52 2013 +0100 sna: Adjust userptr structure for implicit padding Signed-off-by: Chris Wilson commit 4e2fc5aee035c3059ca33dbcafc71dc5988d6b09 Author: Chris Wilson Date: Tue Apr 2 14:29:29 2013 +0100 sna: Relax scanline waits on HSW to be emittable from either ring My overzealous reading of the bspec lead me to the conclusion that the MI_LOAD_SCANLINES command was only available on the blitter ring. This is false, thankfully, and allows us to do vsync'ed Xv. Signed-off-by: Chris Wilson commit 5a36fdcee769195d5c6e642e84a8976114e7c6de Author: Chris Wilson Date: Tue Apr 2 11:01:53 2013 +0100 sna/gen4: Kill stray debugging ErrorF from previous commit Signed-off-by: Chris Wilson commit 3d7e16addb2fb5f35936aafe8e16685a91d30f59 Author: Chris Wilson Date: Tue Apr 2 10:58:52 2013 +0100 sna/gen4: Break the Video rendering loop into 16 rectangle chunks If we feed more than 16 rectangles into the video rendering pipeline, the GPU goes crazy and starts emitting corruption. Lalalala. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1162046 Signed-off-by: Chris Wilson commit f09aa788d79d36688bcfdd3b49b92367590c5f16 Author: Chris Wilson Date: Tue Apr 2 10:01:21 2013 +0100 DRI2GetMSC: Do not send a bogus ust for when the drawable is not displayed According to the opengl glx_sync_control spec, the Unadjusted System Time (or UST) is a 64-bit monotonically increasing counter that is available throughout the system: http://www.opengl.org/registry/specs/OML/glx_sync_control.txt Therefore, sending 0, even in this corner case, is out of spec. However, we cannot just return FALSE here as that triggers a BadDrawable error to be sent, and as is often the case mishandled, to the client. This results in a certain compositor terminating, for example. As an alternative we can use the monotonic system timestamp which in theory should also be monotonic with the previous and subsequent vblank times. Based on a patch by Daniel Kurtz. Reported-by: Daniel Kurtz Signed-off-by: Chris Wilson commit 4af622edfc18af523e1fa9063379f68374e19b04 Author: Chris Wilson Date: Mon Apr 1 22:44:13 2013 +0100 sna: Try to eliminate pending operations to the bo being replaced When we are replacing a bo with fresh data, we can drop pending operations to it and thereby reduce the complexity of the replacement. Signed-off-by: Chris Wilson commit ef0038d358e613381e03c077e06a87fc49108d87 Author: Chris Wilson Date: Mon Apr 1 22:43:48 2013 +0100 sna: Allow the compiler to inline memcpy for the bitblt routines Signed-off-by: Chris Wilson commit 43181692f752f0a552d2e2c76d8379fe16e521cf Author: Chris Wilson Date: Thu Mar 28 15:41:38 2013 +0000 sna/gen7: Refine is_gt2() for Haswell versus Ivybridge The two similar chipsets do not use the same PCI-ID encoding schema. Fixes regression from commit 235a3981ea9759317b392302a2b2b8f4fafab410 Author: Chris Wilson Date: Tue Mar 26 20:37:14 2013 +0000 sna/gen7: Use GT2 values for GT2 variants Reported-by: zaverel@free.fr Signed-off-by: Chris Wilson commit 96c10bdff95a3f8a68c6623446655c4c3dbf738a Author: Chris Wilson Date: Wed Mar 27 22:10:37 2013 +0000 sna/gen7: Resist the temptation to overprogram the number of PS threads for HSW Signed-off-by: Chris Wilson commit 19dfa72c28c6dc677dbfec3a538d4481985195e5 Author: Chris Wilson Date: Wed Mar 27 16:56:10 2013 +0000 sna/gen4+: Set read-write allocation mode for the target render cache As we often first clear the destination before performing a blend, we get a performance boost if that first write populates the render cache. Signed-off-by: Chris Wilson commit d9b8c2039d1be17af8c56364341fc3e10795f200 Author: Chris Wilson Date: Wed Mar 27 14:49:15 2013 +0000 sna/gen7: Fix MOCS for Haswell The memory attributes changed slightly, and in particular there is now an explicit uncached setting - which of course happened to be the value currently selected. Signed-off-by: Chris Wilson commit 04b28021409bc179f6705802f3ccacb1e3c48cc5 Author: Chris Wilson Date: Tue Mar 26 21:53:04 2013 +0000 sna/gen7: Restore render acceleration for VLV power-on board Signed-off-by: Chris Wilson commit 2054f43e4332e9d0ed61a0d643a1390dffff8d96 Author: Chris Wilson Date: Tue Mar 26 20:38:52 2013 +0000 sna/gen7: Prefer spans for GT2 desktop variants Signed-off-by: Chris Wilson commit 235a3981ea9759317b392302a2b2b8f4fafab410 Author: Chris Wilson Date: Tue Mar 26 20:37:14 2013 +0000 sna/gen7: Use GT2 values for GT2 variants The check was only testing for GT2+ and excluding the normal GT2 devices. See also commit ce9f0448367ea6a90490a28150bfdc0a76500129 Author: Chris Wilson Date: Fri Feb 8 16:01:54 2013 +0000 sna/gen6: Use GT2 settings for both GT2 and GT2+ Signed-off-by: Chris Wilson commit 3dddb01005274376c8cdc5eecad36d4e0723004a Author: Mark Kettenis Date: Tue Mar 26 20:50:53 2013 +0100 sna: Use a more portable way to determine total RAM size The sysinfo function is Linux-specific. sysconf(_SC_PHYS_PAGES), while not truly portable, is available on many more systems, including Linux, Solaris, NetBSD, FreeBSD and OpenBSD. So use that instead. Verified that this results in the same value as the sysinfo call on a handful of Linux systems. Signed-off-by: Mark Kettenis commit e63390df52117e1d3ca9d23a736e9995bc734765 Author: Chris Wilson Date: Tue Mar 26 16:32:13 2013 +0000 sna: Add extra '()' around bitwise &/&& for CPU feature detection By popular demand. Signed-off-by: Chris Wilson commit 1d6f4078c1e405749ff688058ef76c287ab36201 Author: Chris Wilson Date: Tue Mar 26 16:28:26 2013 +0000 sna/gen4+: Reorder code to compile on squeeze Remember to only use sse4_2, avx2 in their restricted sections that check for compiler support. Signed-off-by: Chris Wilson commit 0b479504c82bd81c0b93de0e6529eae928eea3bf Author: Chris Wilson Date: Tue Mar 26 16:12:30 2013 +0000 sna: Check for OS support of AVX/AVX2 before use If the OS has not initialised support for the extended instructions, then their use may result in general protection faults. Based on code by Thiago Macieira. Reported-by: Arjan van de Ven Signed-off-by: Chris Wilson commit 9620f419076202ebc89b4c7f1c06374fb2554f28 Author: Chris Wilson Date: Tue Mar 26 15:44:42 2013 +0000 sna: Fix AVX2 detection It requires use of the cpuid feature eax=7:ecx=0, so it requires the extended version of __cpuid to pass in the subfeature. Signed-off-by: Chris Wilson commit da2bd82b0e10f8a263f7ab4fb49b440349d97ace Author: Chris Wilson Date: Tue Mar 26 15:13:32 2013 +0000 sna/gen4+: Add a couple more advanced SSE variants for composite vertices Signed-off-by: Chris Wilson commit 86bcf4a9f5dff98eab076df5872c3c412c0c13af Author: Chris Wilson Date: Tue Mar 26 15:13:08 2013 +0000 sna: AVX2 is in the ebx result of cpuid Signed-off-by: Chris Wilson commit a5be4210b7e8b4a895a70ba617fda45d2e0188f0 Author: Chris Wilson Date: Tue Mar 26 09:05:48 2013 +0000 sna: Trim removed fields from execbuffer2 for OpenBSD support Reported-by: Mark Kettenis Signed-off-by: Chris Wilson commit 761ab4124e00b3dbab15abe69a9b29d9c3d0da0d Author: Mark Kettenis Date: Mon Mar 25 22:40:35 2013 +0100 sna: Fix OpenBSD backlight control implementation Fix cut'n'paste error such that this actually compiles. Signed-off-by: Mark Kettenis commit 0a9b136ec43c860e6e6e651efea0330ac36a4ea5 Author: Chris Wilson Date: Mon Mar 25 15:34:41 2013 +0000 Remove the GeneralSocket upon CloseScreen Be neat and tidy in case we are shutdown but the server is not regenerated (e.g. a hot-unplug). Reported-by: Maarten Lankhorst Signed-off-by: Chris Wilson commit 6b20924f22a14f69651dcf471c48f8a44d8ad42f Author: Chris Wilson Date: Sat Mar 23 23:08:02 2013 +0000 sna: Convert out-of-bounds sample to CLEAR If asked to perform pixelformat conversion of a sample that resides outside the valid area, we can simply substitute CLEAR. Bugzila: http://bugs.freedesktop.org/show_bug.cgi?id=62681 Signed-off-by: Chris Wilson commit f6582387e7d601272a92c3aaeb656de5ce1ffe75 Author: Chris Wilson Date: Sat Mar 23 10:22:41 2013 +0000 sna: Fix an assertion to check the correct bo After syncing the GPU bo for use, that's what we should test as well. Signed-off-by: Chris Wilson commit 88b6b80c2a5191717f0baeb22cdb70ee8c993e09 Author: Chris Wilson Date: Fri Mar 22 13:36:16 2013 +0000 sna: Fix assertions that the pixmap points into the CPU bo for fallbacks Signed-off-by: Chris Wilson commit ccd6b7e402e731c73163b132a80ae29ae2911613 Author: Chris Wilson Date: Fri Mar 22 11:28:01 2013 +0000 sna: Add backlight control implementation Based on the previous patch by Mark Kettenis commit 364e02c7998813643bc81f25ba077a764872d49e Author: Mark Kettenis Date: Fri Mar 22 11:23:11 2013 +0100 uxa: Add OpenBSD backlight control implementation Signed-off-by: Mark Kettenis commit 8d75b2ece1de1c95047c5dc5a569348abd0e6325 Author: Chris Wilson Date: Fri Mar 22 09:51:46 2013 +0000 sna: Fix computation of clip extents for stippling The clip extents for the stippled BLT missed applying the drawable offset to the lower-right corner, so inevitably every operation ended up being clipped. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62618 Signed-off-by: Chris Wilson commit 9f8e86800345d19785eae2dd2099dd7d61a7a3b3 Author: Chris Wilson Date: Thu Mar 21 22:48:06 2013 +0000 sna/dri: Disable assertion and associated bookkeeping Due to long standing ignored bugs in DRI2, we have to accept breakage in the driver. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62614 Signed-off-by: Chris Wilson commit 4adebfed415cf58599b22e873f32e7ce2eaa6542 Author: Chris Wilson Date: Thu Mar 21 08:53:12 2013 +0000 2.21.5 release commit 1aca872ee51e10908dcc4979596ae69732e9a02a Author: Chris Wilson Date: Tue Mar 19 08:26:01 2013 +0000 sna: Haswell reintroduces MI_LOAD_SCAN_LINES Better late than never? Interestingly only available from the BLT ring, which makes accurate waiting for XVideo (which must use the render ring) impossible in the current form - we need to render to a temporary then do a vsynced blit in this case. References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1156679 Signed-off-by: Chris Wilson commit f132452da14fd09a2a3926cc9c034cb2e8c2f1a9 Author: Chris Wilson Date: Tue Mar 19 07:57:30 2013 +0000 sna: Ignore vsync waits on tiny scanline ranges If the update is only a couple of lines tall, any tear will not be visible - so just ignore programming the wait into the GPU. Signed-off-by: Chris Wilson commit 308f0208de59620190dd3cb65b3243d2e8a7bd87 Author: Chris Wilson Date: Mon Mar 18 15:04:22 2013 +0000 sna: Reset operation state between glyphs We are not resetting sufficient state between operations as we presume that all callers of Composite() currently pass in a blank state. In the long run, we want to remove that burden and do a minimal initialisation. References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1156387 Signed-off-by: Chris Wilson commit 4a37d57f9633bbd29f308239c1cd956767b277c0 Author: Chris Wilson Date: Mon Mar 18 15:00:01 2013 +0000 sna: Add a pair of sanity checks before creating the redirection target Signed-off-by: Chris Wilson commit 28371a34fa83f70a7af3c8d3bfd6c7cef9e35073 Author: Chris Wilson Date: Mon Mar 18 14:49:58 2013 +0000 sna: Skip processing an all-clipped-out glyph Along the slow path, skip all processing of glyphs that are not visible. This is important as the slow path handles the per-glyph redirection case, which is much more expensive. Signed-off-by: Chris Wilson commit 16dac417c8049d65b3641e0f662865772faad61f Author: Chris Wilson Date: Sun Mar 17 21:56:56 2013 +0000 sna/dri: Fix stale Pixmap detection NB the back buffer is not associated with the Drawable and so has no pixmap field set. Hence comparing the front->pixmap against the back->pixmap was always rejecting the blit. All we can check is that front->pixmap corresponds with the current Drawable and so reject stale configuration. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 85213d5d450eec5696496128c1acecb5ca13c53b Author: Chris Wilson Date: Sun Mar 17 21:42:48 2013 +0000 sna: Don't remove the flush flag for userptr bo This flag is far too overload with meaning, but for now this prevents us attempting to call free() on a SHM segment. Signed-off-by: Chris Wilson commit c5b901a635a9c8c74017682d17cfcd93031907b4 Author: Chris Wilson Date: Sat Mar 16 10:54:51 2013 +0000 sna/dri: Clear flush flag upon bo destroy Fixes sanity checks that we do not leak the flushing status, nor invoke an operation upon an unflushed bo. Signed-off-by: Chris Wilson commit 45d20e9a65bec8d962a4ec20ee35079935f71b91 Author: Chris Wilson Date: Thu Mar 14 22:09:38 2013 +0000 sna: Add an LLC path for creating snoopable buffers As with LLC we do not actually need to track snoopable as a separate cache state. Signed-off-by: Chris Wilson commit 94cb10c3f2b9bbb6ae3c76faebe9fc88691224a9 Author: Chris Wilson Date: Thu Mar 14 22:02:09 2013 +0000 sna/gen5+: Add missing float casts in computation of scaled src offsets Without the casts, the division ends up as 0 rather than the fractional offset into the texture. The casts were missed in the claimed fix: commit 89038ddb96aabc4bc1f04402b2aca0ce546e8bf3 Author: Chris Wilson Date: Thu Feb 28 14:35:54 2013 +0000 sna/video: Correct scaling of source offsets Reported-by: Roman Elshin Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62343 Signed-off-by: Chris Wilson commit dad50881d545da665191c6681f2acd0ebc3ddbfc Author: Chris Wilson Date: Thu Mar 14 14:53:13 2013 +0000 sna: Consider placement hints when choosing userptr read path Signed-off-by: Chris Wilson commit 11e2802528aed4ef9ffc8b75045c72ac641e54b1 Author: Chris Wilson Date: Thu Mar 14 14:42:25 2013 +0000 sna: Add handle info to sync DBG Signed-off-by: Chris Wilson commit 20832494be06da9ebc4801647521f95e092188fc Author: Chris Wilson Date: Thu Mar 14 14:03:00 2013 +0000 sna: Use userptr downloads for incomplete GPU damaged pixmaps If the pixmap is not wholly damaged, but still contains the region to be read, then use userptr (if available). Signed-off-by: Chris Wilson commit 92023f39a9c8897e5a978f44b7970773b118f628 Author: Chris Wilson Date: Thu Mar 14 09:42:37 2013 +0000 sna: Add a few more assertions to track userptr through the caches i.e. make sure they don't end up in any caches. Signed-off-by: Chris Wilson commit 80401f4fe54142c16ea7578b587529610b68cb67 Author: Chris Wilson Date: Wed Mar 13 11:01:45 2013 +0000 sna/trapezoids: Minimally replace points for TriFan The realisation dawns that it wasn't the ordering of points within the triangle, but simply that I was replacing the wrong one. commit 716723d655a6ee11b090642b759e2542ad712c17 Author: Chris Wilson Date: Wed Mar 13 10:51:03 2013 +0000 sna/trapezoids: Correct ordering of points within TriFran Signed-off-by: Chris Wilson commit 49374f2155f0c8c80b1c54e968d510d55df49221 Author: Chris Wilson Date: Tue Mar 12 20:12:51 2013 +0000 sna/gen4: Tweak compilation flags to avoid mixed settings across functions Confusing gcc with different flags for supposedly inlined functions is not a good idea. References: https://bugs.freedesktop.org/show_bug.cgi?id=62198 Signed-off-by: Chris Wilson commit ee0ed88a09bc2f8ebe49b1d7f7e209a73e02fee0 Author: Aaron Plattner Date: Tue Mar 12 12:45:58 2013 -0700 uxa: don't crash when freeing an uninitialized screen When intel_scrn_create creates a screen, it sets scrn->driverPrivate to (void *)(match_data | 1). Normally, this is read by I830PreInit and then replaced with a pointer to the intel_screen_private structure. However, it's possible for the server to delete the screen before initializing it, which leads to a crash in I830FreeScreen when it tries to interpret the unaligned match_data pointer as a pointer to a intel_screen_private. Fix this by checking the low bit of the pointer and skipping the teardown code if it's set. Signed-off-by: Aaron Plattner commit b1952e79021759927361d284b157713a651a10b1 Author: Chris Wilson Date: Tue Mar 12 19:58:28 2013 +0000 sna/gen3: Tweak code generation for gen3_emit_composite_primitive_constant__sse2 References: https://bugs.freedesktop.org/show_bug.cgi?id=62198 Signed-off-by: Chris Wilson commit f320e6908f24ff356303c8905c78ac290e24c2e6 Author: Chris Wilson Date: Tue Mar 12 19:53:20 2013 +0000 sna/gen3: Tweak code generation for gen3_emit_composite_primitive_identity_gradient__sse2 References: https://bugs.freedesktop.org/show_bug.cgi?id=62198 Signed-off-by: Chris Wilson commit b1d0ca266cc67df65c81a9dbb9cc83027ff240ea Author: Chris Wilson Date: Tue Mar 12 19:03:44 2013 +0000 sna/gen3: Reduce another use of transforms Prefer the slightly cheaper _sna_get_transformed_scaled(). Signed-off-by: Chris Wilson commit 50374fb4947e6682b6c8aced639b422110b6ec98 Author: Chris Wilson Date: Tue Mar 12 18:39:07 2013 +0000 uxa/glamor: Prevent a crash when trying to load a misconfigured glamor Glamor requires that glamoregl is explicitly loaded via Section "Module" or else it currently crashes. Based on a patch by Michel Dänzer for xf86-video-ati. Signed-off-by: Chris Wilson commit c79a189b6f06a58ddbd92427b6c57a0bdfb1e16c Author: Chris Wilson Date: Tue Mar 12 15:57:17 2013 +0000 sna: Missing git-add for 09862a85eba243b Signed-off-by: Chris Wilson commit a31831bce86745205369faaa297064770f4350f9 Author: Chris Wilson Date: Tue Mar 12 15:26:28 2013 +0000 sna: Improve asserts that the CPU bo is not busy after synchronisation Taking into account that we may not do a full synchronisation. Signed-off-by: Chris Wilson commit 09862a85eba243babde9ca721ca6521566f5c082 Author: Chris Wilson Date: Tue Mar 12 15:12:59 2013 +0000 sna: Mark redirect proxies with a unique id This helps gen3 in particular as it uses the unique_id field of a bo to detect changes in render target. Signed-off-by: Chris Wilson commit 4f8fba31d7317248e0d4710ef5553dc1f9593314 Author: Chris Wilson Date: Tue Mar 12 10:12:12 2013 +0000 sna: Apply the source offset to the transform when fixing up gradients Otherwise pixman will apply the source transform to the offsets. Reported-by: Ognian Tenchev Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62198 Signed-off-by: Chris Wilson commit 0b143fcb2bdeec9abd1c1d2a9dbe707cb9165b65 Author: Chris Wilson Date: Mon Mar 11 18:11:27 2013 +0000 sna: Improve sna_copy_boxes DBG by printing the bo handles The handles of the bo are easier to track through the DBG as they are more often printed than then their addresses. Signed-off-by: Chris Wilson commit 44d3ffdf534eb1c24ab729b9af31f09a86b82256 Author: Chris Wilson Date: Mon Mar 11 17:14:39 2013 +0000 sna: Only allocate addition space if we need pixel data Signed-off-by: Chris Wilson commit b500e30d5dbcf91542c2831ebd3c48b28a01bf28 Author: Chris Wilson Date: Mon Mar 11 17:14:07 2013 +0000 sna: Mark the userptr as a CPU mapping This helps clarify some recent asserts. Signed-off-by: Chris Wilson commit 17a99f0743836997aa8e4f7eafc0ea4978244f44 Author: Chris Wilson Date: Mon Mar 11 16:41:16 2013 +0000 sna/dri: Free the event on the impossible error path Just in case we end up with bogus data, don't leak. Signed-off-by: Chris Wilson commit 9d097d5140857fad209ee5c2c8b5461aac54e81e Author: Chris Wilson Date: Mon Mar 11 16:39:11 2013 +0000 sna/dri: Free chained swaps upon CloseWindow The assumption that the chained swaps are freed after the next vblank turns out to be wrong, and in effect we would leak the bo if we happened to submit the final swap faster than vrefresh and close the window before the vblank. Signed-off-by: Chris Wilson commit 2f6a9927952e25aa2a1628e66295f0903dcf865c Author: Chris Wilson Date: Mon Mar 11 14:40:52 2013 +0000 sna/dri: Reorder assert to avoid NULL dereference Only try to dereference chain->draw after the check to see if it was already destroyed. Signed-off-by: Chris Wilson commit cffdd1eed0ca344142c165788ce7a31b80f1f55f Author: Chris Wilson Date: Mon Mar 11 14:16:27 2013 +0000 test: Try to exercise races between DRI2SwapBuffers and CloseWindow Signed-off-by: Chris Wilson commit 4fb7be0a0d4bf027ed254399b6b538e979f525f2 Author: Chris Wilson Date: Sun Mar 10 14:34:39 2013 +0000 2.21.4 release commit 25a63b32c7b549ffb3c7f14de4bf2731d044eb39 Author: Chris Wilson Date: Mon Mar 11 10:42:08 2013 +0000 sna: Tighten checking for coherent maps Remember all the special cases where we can use a CPU mmap as a temporary substitute for a GTT mapping. Signed-off-by: Chris Wilson commit 210d474a96d3adf7338b49ee2c234893b54bbb2c Author: Chris Wilson Date: Sun Mar 10 16:40:35 2013 +0000 sna: Tweak CPU mappings to be only used if a read is required Signed-off-by: Chris Wilson commit 35f50a98fde7a4ebe6871bd23475948a2a530633 Author: Chris Wilson Date: Sun Mar 10 15:51:45 2013 +0000 sna/dri: Flatten _sna_dri_destroy_buffer() One level of indentation can be trivially removed with an earlier return. Signed-off-by: Chris Wilson commit b81ee116d36845e55f71be2db391f93c1b681d5d Author: Chris Wilson Date: Sun Mar 10 14:15:46 2013 +0000 sna/dri: Add a couple more basic assertions To catch bad reference counting and loss of flush. Signed-off-by: Chris Wilson commit 93ecd5606eaf2e1db2b844f39bb04d77fa53cf8d Author: Chris Wilson Date: Fri Mar 8 23:38:12 2013 +0000 sna: Only shrink the maximum GPU size to fit into cache That is be very careful that we do not enlarge it past the aperture size on early gen. Signed-off-by: Chris Wilson commit 78c756120db2e5e174925a92c0a0bba3ff70860c Author: Chris Wilson Date: Fri Mar 8 16:39:21 2013 +0000 sna/gen4: Initialise a pair of unimportant variables Should never actually affect any results. Signed-off-by: Chris Wilson commit dcd52d0c186e8b17569335338232298fbbea2b2d Author: Chris Wilson Date: Thu Mar 7 23:03:52 2013 +0000 sna: Fallback if we cannot fit the tiling copy into the aperture If we cannot fit the source/destination and a tile into the aperture, then we cannot perform the copy and must do it using the CPU. Signed-off-by: Chris Wilson commit 50d0ea02b3908156534fc00def55cfca30bbfecc Author: Chris Wilson Date: Thu Mar 7 22:58:21 2013 +0000 sna: Trim tile sizes to fit aperture constraints This is especially important with gen2 where we have no unmappable GTT to utilise. Signed-off-by: Chris Wilson commit cd1c14b172b0794f744b304f59b4fc78f0d6f8d6 Author: Chris Wilson Date: Thu Mar 7 10:16:19 2013 +0000 sna: Remove the unused output and crtc lists Signed-off-by: Chris Wilson commit 1b8fc8715598e7bf756ccfa99a6da59bab48c2a0 Author: Chris Wilson Date: Thu Mar 7 10:12:14 2013 +0000 sna: Disambiguate sna_crtc_resize() sna_crtc_resize() operates upon the whole configuration rather than a single crtc like the other sna_crtc_* so rename it to make it distinct. Signed-off-by: Chris Wilson commit 5f1c2b3b8bb062a4574e5114b09a33b7e4f0c811 Author: Chris Wilson Date: Thu Mar 7 09:40:06 2013 +0000 sna: Supply a fake pipe to run completely headless Signed-off-by: Chris Wilson commit 2aacfbaa5143568906e88e489c72f4ebf065a4ec Author: Chris Wilson Date: Thu Mar 7 09:10:32 2013 +0000 sna: Return early if there are no outputs to setup Instead of reporting failure, just try to run headless. Signed-off-by: Chris Wilson commit b84db39edb6ebce965c1354dc5994bf0a70cea92 Author: Chris Wilson Date: Thu Mar 7 09:07:19 2013 +0000 intel: Relax the has-kms test slightly Do not rely on a fully populated set of CRTCs, but merely note that the GETRESOURCES ioctl returns an error if KMS is not enabled. Signed-off-by: Chris Wilson commit c6a59bee3bf5f42147f75a714f2b9aa26590329e Author: Chris Wilson Date: Wed Mar 6 19:01:50 2013 +0000 sna: Disable read-read optimisations There is still a lurking issue, so punt on the optimisation for now. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61628 Signed-off-by: Chris Wilson commit 9a7577902ee3a1286ea2a74a79aaeff6c72a6f18 Author: Chris Wilson Date: Wed Mar 6 11:22:40 2013 +0000 sna: Lighten the wakeup handler slightly As the wakeup handler is called more frequently, we want to avoid any of the more heavyweight processing. So trim the wakeup handler down to the check to see if the GPU is idle and so we should immediately flush what we have currently queued. Signed-off-by: Chris Wilson commit 779fc0b20c382e572eb41d3cbf3d639e4eb77874 Author: Chris Wilson Date: Tue Mar 5 22:29:54 2013 +0000 sna: Typo ('unsuported') in DBG messages Signed-off-by: Chris Wilson commit e67aece46301ebb77d5fce7ac687a03713956fef Author: Chris Wilson Date: Tue Mar 5 21:43:20 2013 +0000 sna: Assert that the pixmap is not pinned before releasing the GPU bo Nothing suspicious in this set, just an extra dab of paranoia. Signed-off-by: Chris Wilson commit bc5f81901f1b4451e4187b97f65a8be4c03b2494 Author: Chris Wilson Date: Tue Mar 5 15:53:24 2013 +0000 sna: The GPU bo submit is still required before mapping for inplace operations As we may choose to force the stall as we would be doing a read-back in any event... Signed-off-by: Chris Wilson commit 43e3886c6de3ab89e3629c98287ede77ae2f6876 Author: Chris Wilson Date: Tue Mar 5 15:32:35 2013 +0000 sna: Use drawable_gc_flags() to select placement for PolyArc Signed-off-by: Chris Wilson commit 99b30203ba1c26d89d869691a743488a5dc32935 Author: Chris Wilson Date: Tue Mar 5 13:45:45 2013 +0000 sna: Fix deference of just nullified GPU bo in previous commit One last minute refactor too far, combining the too if(priv->gpu_bo) blocks forgot that the first block tried to free gpu_bo... Signed-off-by: Chris Wilson commit d31dc1343d59f8ef8876e1dc8ddfec9c6be1a602 Author: Chris Wilson Date: Tue Mar 5 13:30:37 2013 +0000 sna: Refactor the is-mappable test for inplace operations By moving the test into the common function for creating a mappable GPU bo, we can also consider recreating that bo when desirable. Signed-off-by: Chris Wilson commit 9fa9234c7061be3cff9a65aac0702f4c3caac40d Author: Chris Wilson Date: Tue Mar 5 11:34:49 2013 +0000 sna: Prefer GPU for self-copies when undamaged on the CPU Signed-off-by: Chris Wilson commit 60ec35b8d25ecfabf1744ea7bc81109d7f2a90e2 Author: Chris Wilson Date: Tue Mar 5 11:14:37 2013 +0000 sna: Be explicit when checking for an idle bo after CPU synchronisation Signed-off-by: Chris Wilson commit ad4901a0354efaed65bb15ef33561df067d300b7 Author: Chris Wilson Date: Tue Mar 5 09:23:07 2013 +0000 sna: Ensure that the tearfree swap is unmapped afterwards After swapping the bo for the screen pixmap, we need to make sure that we don't chase any dangling pointers. References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1133490 Signed-off-by: Chris Wilson commit 007a95d62fc998b3a558bb80310c82256d00b0bb Author: Chris Wilson Date: Mon Mar 4 13:52:04 2013 +0000 sna: Drop a local variable only used to hold a constant Signed-off-by: Chris Wilson commit 4be725333c11804a45c80a4bc45852e81ea57ed5 Author: Chris Wilson Date: Mon Mar 4 11:55:16 2013 +0000 sna: Ensure we do not attempt to operate inplace on a very large pixmap Otherwise we will fail to map it into the GTT. In theory, this should just result in the same fallback paths, but pushing that knowledge up further should help us make better decisions. Signed-off-by: Chris Wilson commit ad05039cc83b40cf45c8221d69506d6c88c27a86 Author: Chris Wilson Date: Mon Mar 4 10:11:22 2013 +0000 sna/gen3: Always prefer BLT for copies Signed-off-by: Chris Wilson commit 59f030dd27eff5fbf9ddcd22faa3087bc9c5ff54 Author: Chris Wilson Date: Mon Mar 4 10:10:39 2013 +0000 sna/gen3: Perform alpha-fixup upon copy sources This is required for copying from depth-15 surfaces onto other depths. Reported-by: Reinis Danne Signed-off-by: Chris Wilson commit 48a733a35a2de36664a42384d066c06f54cf2ad7 Author: Chris Wilson Date: Sun Mar 3 15:32:23 2013 +0000 sna: Only destroy the cached CLEAR picture if it exists Reported-by: Reinis Danne Signed-off-by: Chris Wilson commit 2583232773f1fa505e0676f07b029b29b90c8ea7 Author: Chris Wilson Date: Sun Mar 3 15:25:01 2013 +0000 sna: Nullify cache pointers upon server regen To make sure we don't chase dangling pointers on the next pass. Signed-off-by: Chris Wilson commit 4dec895b69c2e545b142a3646646e13f7fb06507 Author: Chris Wilson Date: Sun Mar 3 14:44:13 2013 +0000 sna/gen3: Correct typo in assertion Signed-off-by: Chris Wilson commit 862601c05e9788d1416173b730a5d4b6acabf374 Author: Chris Wilson Date: Sun Mar 3 14:00:18 2013 +0000 sna/gen3: Add some debug around rendercopies of the fbcon Signed-off-by: Chris Wilson commit 995abb46754eba7524afcb852159a31ea19add82 Author: Chris Wilson Date: Sun Mar 3 12:12:56 2013 +0000 sna: CPUID return ISA features in ecx/edx Whereas we were wrongly looking in eax. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61733 Signed-off-by: Chris Wilson commit f9f2b5152f988d4b15f773354f3fadaff02cd3d7 Author: Chris Wilson Date: Sun Mar 3 11:10:51 2013 +0000 sna: Undo preferred depth for gen3 Mesa is buggy. Qt is buggy. Everything is buggy. References: https://bugs.freedesktop.org/show_bug.cgi?id=61441 Signed-off-by: Chris Wilson commit ef5edbf61686388126e62ce360a66dd8652b2493 Author: Chris Wilson Date: Sun Mar 3 09:29:53 2013 +0000 sna: Probe for kernel support of framebuffer formats References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1135403 Signed-off-by: Chris Wilson commit cd313a8d5d1363929bebac83f81e347b4a9e70f1 Author: Chris Wilson Date: Sat Mar 2 22:52:15 2013 +0000 sna/dri: Guard against failed batch submission Avoid dereferencing a NULL bo if we do not submit a batch for the copy operation. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61708 Signed-off-by: Chris Wilson commit e4df4e03b147694c65196651f5c13e7199f74579 Author: Chris Wilson Date: Sat Mar 2 22:46:57 2013 +0000 sna: Eliminate a few used-once local variables Signed-off-by: Chris Wilson commit ae3531c3a1d72a73b25c5563b4db029f051262cb Author: Chris Wilson Date: Fri Mar 1 23:46:07 2013 +0000 Fix Haswell CRW PCI-IDs As we missed the PCI-ID for the CRW GT1 variant, we would not have enabled render support for those particular Haswell machines. Reported-by: Kenneth Graunke commit fef6cdae9ebd217843bab2f65c87b59f8a9f782e Author: Chris Wilson Date: Fri Mar 1 15:58:42 2013 +0000 sna: Chain up CloseScreen Remember to call into the chained CloseScreen destructors! Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56608 Signed-off-by: Chris Wilson commit 8c2dedaa4df2522d6a1725c09e9700c5d753ac93 Author: Chris Wilson Date: Fri Mar 1 15:49:57 2013 +0000 sna: Assert that inplace operations are done on coherent maps Signed-off-by: Chris Wilson commit d8296412b88b1ab4ea48572707408f7eeb52c8fa Author: Chris Wilson Date: Fri Mar 1 15:42:38 2013 +0000 sna: Assert that when caching a pixmap header the pScreen match Signed-off-by: Chris Wilson commit 904af323914e05830f17621a78b6e55b371ae5fc Author: Chris Wilson Date: Fri Mar 1 15:34:45 2013 +0000 sna: Assert that we do not resurrect stale pixmap across a server regen References: https://bugs.freedesktop.org/show_bug.cgi?id=56608 Signed-off-by: Chris Wilson commit d4164de5ccb82068e2858a90b2cd44eef82b6037 Author: Chris Wilson Date: Fri Mar 1 12:13:47 2013 +0000 sna: Assert that the ScrnInfo and ScreenPtr relationship is correct References: https://bugs.freedesktop.org/show_bug.cgi?id=56608 Signed-off-by: Chris Wilson commit 8d97c192a33473df3c9036147a4716783a86d742 Author: Chris Wilson Date: Fri Mar 1 11:59:49 2013 +0000 sna: Move some conditional code out-of-line Just to reduce the number of ifdefs, one at a time. Signed-off-by: Chris Wilson commit 4174c7bb14ea3428d86dc327950e76d0589e0cc4 Author: Chris Wilson Date: Fri Mar 1 09:21:03 2013 +0000 sna: Use depth-15 rather than depth-16 for reduced bw devices Keeping the number of bits identical between the RGB channels helps prevent discoloration. Signed-off-by: Chris Wilson commit e05d2e481434084291503efdb84c944a560d8c29 Author: Chris Wilson Date: Fri Mar 1 09:08:19 2013 +0000 sna: Track number of pixmaps allocated whilst counting bo leaks Signed-off-by: Chris Wilson commit 89038ddb96aabc4bc1f04402b2aca0ce546e8bf3 Author: Chris Wilson Date: Thu Feb 28 14:35:54 2013 +0000 sna/video: Correct scaling of source offsets When applying pan and zoom to a mismatched video, it would inevitably miscompute the origin and scale factors. Reported-by: Matti Hamalainen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61610 Signed-off-by: Chris Wilson commit a0a2faefdefbea63669dfeb49f7e701196ab5631 Author: Chris Wilson Date: Wed Feb 27 22:26:19 2013 +0000 sna: Fix syntax for __get_cpuid() It is a function not a macro like cpuid() and takes pointers to its arguments! Signed-off-by: Chris Wilson commit bfc1fda87f442890919100473b819240f9c30c44 Author: Chris Wilson Date: Wed Feb 27 22:19:06 2013 +0000 sna/dri: Fix use of uninitialised pipe along error path > sna_dri.c:2018:6: warning: variable 'pipe' is used uninitialized > whenever 'if' condition is true [-Wsometimes-uninitialized] > if (get_private(front)->pixmap != get_drawable_pixmap(draw)) > ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > sna_dri.c:2150:42: note: uninitialized use occurs here > DRI2SwapComplete(client, draw, 0, 0, 0, pipe, func, data); Reported-by: Sedat Dilek Signed-off-by: Chris Wilson commit f08ad3f8ef1ac3a38a92f793fa1cbc1d2d443095 Author: Chris Wilson Date: Wed Feb 27 17:46:55 2013 +0000 sna: Prettify GCC version detection in headers And fixup a basic error in the process. Signed-off-by: Chris Wilson commit 8aea4ae127f92c07e3ce86b6d2afaa207a6cdce9 Author: Chris Wilson Date: Wed Feb 27 17:38:46 2013 +0000 sna: Improve compatibility of cpuid.h detection Reported-by: Sedat Dilek Signed-off-by: Chris Wilson commit 5c27307219b5a5c1f73dcde9d0b2beed5810bd7d Author: Chris Wilson Date: Wed Feb 27 14:58:35 2013 +0000 sna: Remove the trailing '.' from the previous commit Good Maarten for reporting the bug, bad Maarten for silently fixing up my mistakes when testing! Thanks to Colin Walter and his tinderbox. Signed-off-by: Chris Wilson commit b8a0acd615042bee7bdf49c364a4815ade6b9a61 Author: Chris Wilson Date: Wed Feb 27 13:26:18 2013 +0000 sna: Migrate dirty tracking across ScreenPixmap updates Otherwise chaos ensues: Invalid read of size 8 ==8647== at 0x8477BC1: has_offload_slaves.isra.38 (sna_accel.c:14402) ==8647== by 0x84958E7: sna_accel_block_handler (sna_accel.c:13729) ==8647== by 0x164B13: BlockHandler (dixutils.c:387) ==8647== by 0x2B5273: WaitForSomething (WaitFor.c:210) ==8647== by 0x160790: Dispatch (dispatch.c:357) ==8647== by 0x14F549: main (main.c:298) ==8647== Address 0xf3383e8 is 24 bytes inside a block of size 152 free'd ==8647== at 0x4C2BA6C: free (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) ==8647== by 0x2403DF: damageDestroyPixmap (damage.c:1549) ==8647== by 0x1FFD88: XvDestroyPixmap (xvmain.c:372) ==8647== by 0x1FE789: ShmDestroyPixmap (shm.c:273) ==8647== by 0x8507C24: _sna_dri_destroy_buffer (sna_dri.c:448) ==8647== by 0x289986: do_get_buffers (dri2.c:521) ==8647== by 0x289C0F: DRI2GetBuffersWithFormat (dri2.c:690) ==8647== by 0x28B68F: ProcDRI2Dispatch (dri2ext.c:306) ==8647== by 0x160A40: Dispatch (dispatch.c:428) ==8647== by 0x14F549: main (main.c:298) ==8647== ==8647== Invalid read of size 8 ==8647== at 0x8477BCA: has_offload_slaves.isra.38 (regionstr.h:74) ==8647== by 0x84958E7: sna_accel_block_handler (sna_accel.c:13729) ==8647== by 0x164B13: BlockHandler (dixutils.c:387) ==8647== by 0x2B5273: WaitForSomething (WaitFor.c:210) ==8647== by 0x160790: Dispatch (dispatch.c:357) ==8647== by 0x14F549: main (main.c:298) ==8647== Address 0xdfdfdfdfdfdfdfe7 is not stack'd, malloc'd or (recently) free'd Reported-by: Maarten Lankhorst Signed-off-by: Chris Wilson commit 11b72628cb54ab0b78a0969fa8fabb591f6cf93f Author: Chris Wilson Date: Tue Feb 26 19:08:58 2013 +0000 sna/gen2: Add SSE2 fast paths for vertex emission Signed-off-by: Chris Wilson commit f2597c89d023beceddd65e99fa595741f2400218 Author: Chris Wilson Date: Tue Feb 26 18:44:45 2013 +0000 sna: Force GCC to use the SSE unit for SSE2 routines Merely hinting that it was preferred by using sse+387 was not enough for GCC to emit the faster SSE2 code. Signed-off-by: Chris Wilson commit a18ce0f642fa347b61e4ca501bd2f747338a2975 Author: Chris Wilson Date: Tue Feb 26 18:44:35 2013 +0000 sna: Flatten the glyph emitters Signed-off-by: Chris Wilson commit 7bb06b02e67435354778fe87a3e0429fe3750c23 Author: Chris Wilson Date: Tue Feb 26 18:12:06 2013 +0000 sna/gen3: Expand the number of SSE2 routines for basic composite ops Signed-off-by: Chris Wilson commit 417c3f9b8c6b9a50dc1af440c53e94d2c6401251 Author: Chris Wilson Date: Tue Feb 26 17:41:57 2013 +0000 sna/trapezoids: Add a pair of unlikely hints for forced box emission Overflowing the buffer is unlikely, so pass the hint on to the compiler. Signed-off-by: Chris Wilson commit aa7e11a1a451c54d5cbff9a6c242075b08c590ae Author: Chris Wilson Date: Tue Feb 26 15:07:12 2013 +0000 sna: Improve handling of migrated userptr bo Superficially fixes gimp-2.9 Signed-off-by: Chris Wilson commit 32d8908337d45b9598ce07bc46b633ed5e0c7070 Author: Chris Wilson Date: Tue Feb 26 11:42:03 2013 +0000 sna: Flatten unaligned box emission Signed-off-by: Chris Wilson commit aa358fad8c934e6962976ecfdc5e5ebc9d1ad83c Author: Chris Wilson Date: Tue Feb 26 11:37:24 2013 +0000 sna: Bump required GCC for sse2 gcc-4.4.5 (on squeeze) triggers an ICE when using target(sse2). Signed-off-by: Chris Wilson commit 08747292b717fcea84ce3adc455b0161e5517e84 Author: Chris Wilson Date: Tue Feb 26 11:28:05 2013 +0000 sna: Conditionally compile sse2 routines Signed-off-by: Chris Wilson commit 9c63ddd9f14588bcec8275e2a64e56cc5b661a5a Author: Chris Wilson Date: Tue Feb 26 11:28:05 2013 +0000 sna: Conditionally compile sse4_2 routines Signed-off-by: Chris Wilson commit dc885d350ec53d08e0d4d529bb938bf2568d61ae Author: Chris Wilson Date: Tue Feb 26 11:28:05 2013 +0000 sna: Conditionally compile avx routines Signed-off-by: Chris Wilson commit 8cdebf3b72467f63a35888f38cd83658575fcf10 Author: Chris Wilson Date: Tue Feb 26 11:06:45 2013 +0000 sna/gen4: Cluster ISA Otherwise we seem to confuse the poor little compiler. This should also make it easier to use CPP to turn off blocks. Signed-off-by: Chris Wilson commit 8272d849c0895d6fa66ccca972899f56dab71cc6 Author: Chris Wilson Date: Tue Feb 26 10:53:20 2013 +0000 sna/gen4+: All associated CPUs have sse2 at least So mark up the basic functions as SSE2 in case we are compiling for 32-bit only. Signed-off-by: Chris Wilson commit 76d46201d7b7abc7c0b6bced9c6fadaf47ad9134 Author: Chris Wilson Date: Tue Feb 26 10:49:42 2013 +0000 sna: Only use the GPU bo after migrating If we choose not to migrate the damage to the GPU bo, then it will be incoherent. This just flattens the logic out as priv->gpu_bo should be NULL here anyway. Signed-off-by: Chris Wilson commit 1068bf7024d8a6650de020e95efdedcbfd7d3c5e Author: Chris Wilson Date: Tue Feb 26 10:14:03 2013 +0000 sna: Mention if compiled as 64bit as part of the CPU feature detection Signed-off-by: Chris Wilson commit 27c71027b1d76979460ef15bba8e8671e3286a24 Author: Chris Wilson Date: Tue Feb 26 10:00:29 2013 +0000 sna: Ignore SSE4a - not an Intel ISA! Signed-off-by: Chris Wilson commit 2a6f3989ba2075c322cdf6e33f829f4d5a885be0 Author: Chris Wilson Date: Tue Feb 26 09:59:34 2013 +0000 sna/gen3: Allow conditional use of SSE2 Signed-off-by: Chris Wilson commit 13461a18b1605feb17304d52136d100df50ca296 Author: Chris Wilson Date: Tue Feb 26 09:41:14 2013 +0000 sna: Print detected CPU features Signed-off-by: Chris Wilson commit 528dbf9ebb2688f476ef283be59d0f2232159dcb Author: Chris Wilson Date: Tue Feb 26 08:15:47 2013 +0000 sna: Fix build on older GCC for cpuid() We need to double check that the features we look for are supported by the compiler before doing so. Signed-off-by: Chris Wilson commit 49d9c5e9d48d043a8366b6471128c999b5e887b0 Author: Chris Wilson Date: Tue Feb 26 00:27:12 2013 +0000 sna: Reverse inverted assertions Oops, the assertions that we had sufficient free space was inverted. Signed-off-by: Chris Wilson commit 94b95cc2fc63457903a7b7b6eaa09bc27f25750c Author: Chris Wilson Date: Tue Feb 26 00:02:16 2013 +0000 sna/gen4+: Begin specialising vertex programs for ISA Allow use of advanced ISA when available by detecting support at runtime. This initial work just uses GCC to emit varying ISA, future work could use hand written code for these hot spots. Signed-off-by: Chris Wilson commit f095678125b25aeae80d838729a7f89d09007e10 Author: Chris Wilson Date: Mon Feb 25 23:14:12 2013 +0000 test: Correct ignore path for async.avi Signed-off-by: Chris Wilson commit aa045d80ec0d3366745d1671b9f667cec587d804 Author: Chris Wilson Date: Mon Feb 25 23:13:23 2013 +0000 sna: Detect available instruction sets at runtime Signed-off-by: Chris Wilson commit 56fd91fc830d7a210e3a0e70ab41261a1f5baa83 Author: Chris Wilson Date: Mon Feb 25 15:18:46 2013 +0000 sna/gen3+: Restart vertex space checks after lock contention If we end up contending for the vertex lock, we need to double check there is sufficient vertex space left for us. Bugzill: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1124576 Signed-off-by: Chris Wilson commit b12f0da0bedb7faf0c96e44ca2d02baec807ad51 Author: Chris Wilson Date: Mon Feb 25 15:18:46 2013 +0000 sna/gen3+: Assert that nbox is not 0 Various assertions to track down a potential programming error. References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1124576 Signed-off-by: Chris Wilson commit 6f9646f5beecca2972ef0299b5c7469008cb6fe4 Author: Chris Wilson Date: Mon Feb 25 14:36:32 2013 +0000 sna/trapezoids: Instruct the compiler to flatten the callees whilst rasterising Signed-off-by: Chris Wilson commit 421910ca572a044170af69a90bb934f114a62168 Author: Chris Wilson Date: Sun Feb 24 21:58:30 2013 +0000 sna/gen3: Factor out the per-vertex divide for gradients Signed-off-by: Chris Wilson commit a19da0ea517127052ae49cdd6441e8b6077ca523 Author: Chris Wilson Date: Sun Feb 24 11:22:01 2013 +0000 sna: Reduce DefaultDepth to 16 on older chipsets Signed-off-by: Chris Wilson commit d7bba8512c6db5f58448b513d1f4290938b0abd3 Author: Chris Wilson Date: Sat Feb 23 10:56:08 2013 +0000 sna: Tidy a call to set the gamma before setting up a CRTC Signed-off-by: Chris Wilson commit e2aaf4ed3333231cf8cadcf6362743593026cd19 Author: Carl Worth Date: Fri Feb 22 14:44:09 2013 -0800 Refuse to load driver for depth-8 X server. The driver is not functional at this depth, so tell the user as much and bail out. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31375 Reviewed-by: Eric Anholt commit cbd8f16ea0e3b1b7eae57edfe343a332ae42373c Author: Chris Wilson Date: Fri Feb 22 21:09:52 2013 +0000 sna: Refuse to create larger than max temporary upload bo The maximum size is determined by available RAM, if we exceed it we greatly increase the risk of swap thrashing. Signed-off-by: Chris Wilson commit 7a264792772512528a4d6138e09b4ee1ace7f322 Author: Chris Wilson Date: Fri Feb 22 20:13:58 2013 +0000 sna: Retire before looking for a large 2D buffer Signed-off-by: Chris Wilson commit 630b114f1ceaf9fb1e35f3aac8c3161119ba5af9 Author: Chris Wilson Date: Fri Feb 22 20:08:36 2013 +0000 sna: Allow search_linear_cache() to reuse large buffers Signed-off-by: Chris Wilson commit d87a0b4c3bc7f1a33edee79e3ed09871461422ea Author: Chris Wilson Date: Fri Feb 22 20:07:56 2013 +0000 sna: Allow picture fixup in channel format if not changing RGB depth Signed-off-by: Chris Wilson commit b129b434f98b9d875e44af206f6901de9bf28334 Author: Chris Wilson Date: Fri Feb 22 12:10:20 2013 +0000 sna: Optimise mmap of GPU bo for read-read operations Signed-off-by: Chris Wilson commit 19bd005056a2083de64753681b96716996e4237d Author: Chris Wilson Date: Fri Feb 22 12:05:04 2013 +0000 sna: Avoid migrating and making the GPU bo busy prior to mmapping it References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1131134 Signed-off-by: Chris Wilson commit afb77ffadedf6c6f9321dde1d650004714accdc4 Author: Chris Wilson Date: Fri Feb 22 10:48:06 2013 +0000 sna/gen7: Skip CLEAR_PARAMS for the null depthbuffer Signed-off-by: Chris Wilson commit 1a7262e5308c9ab416ed87226ed27a9fc84f0ef9 Author: Chris Wilson Date: Fri Feb 22 10:30:49 2013 +0000 sna/gen7: Only a pipeline stall is required for the CA pass Signed-off-by: Chris Wilson commit b0c83b77d0226cbaf6115eed5d0e2cc8a40ac51d Author: Chris Wilson Date: Thu Feb 21 19:37:51 2013 +0000 sna/dri: Eradicate the DRI2 name exchange mechanism Thinking about the compositor <-> server <-> client inter-exchange demonstrates that we cannot prevent the client rendering into the source texture being show by the compositor. That is a subject for DRI3. Signed-off-by: Chris Wilson commit 6172ff3e350dbfbcd122a911d7fa366ff5d268bc Author: Chris Wilson Date: Thu Feb 21 15:34:47 2013 +0000 sna: Always enable the solid-cache and gradient-cache Figuring out when it might not be used is simply too error prone. Signed-off-by: Chris Wilson commit b7a96df9b0872867c823dc945add5be04d51c30a Author: Chris Wilson Date: Wed Feb 20 18:46:01 2013 +0000 sna: Honour LinearFramebuffer The Option was untested, and unsurprisingly was broken. Signed-off-by: Chris Wilson commit d2442c74b8d41018f260f1da13f3fe5d2795792f Author: Chris Wilson Date: Wed Feb 20 10:53:57 2013 +0000 2.21.3 release commit 2cab7e80eb6955a7f8ea051633f6975a12248b69 Author: Chris Wilson Date: Wed Feb 20 12:36:22 2013 +0000 sna/trapezoids: Clamp cells to valid range Signed-off-by: Chris Wilson commit 14de90b251dd8a6ff106e989580ef01cf5c2944d Author: Chris Wilson Date: Wed Feb 20 12:00:54 2013 +0000 sna/trapezoids: Embed a few cells into the stack Avoid an allocation in the common case where the set of trapezoids is fairly narrow. Signed-off-by: Chris Wilson commit 3eca4ea1a5d8ce04598b8d42e93e0dcb93e42e9a Author: Chris Wilson Date: Wed Feb 20 11:20:54 2013 +0000 sna/trapezoids: Perform the cell allocation upfront As we know the maximum extents of the trapezoids, we know the maximum number of cells we will need and so can preallocate them. Signed-off-by: Chris Wilson commit 9df5e48c582e5c4edffdece75b5395c230a50b09 Author: Chris Wilson Date: Tue Feb 19 10:08:29 2013 +0000 sna/video: Only setup XvMC if we first setup Xv Under certain circumstances, XvScreenInit can indeed fail, so do not bother with creatin XvMC (as it triggers internal assertions if it cannot find our adaptor amongst Xv's). Signed-off-by: Chris Wilson commit b6588c48077600a3e015b6d37b101393a806ae1a Author: Chris Wilson Date: Tue Feb 19 08:59:12 2013 +0000 test: Add generated vsync.avi to gitignore commit 1e2fd66ade6bdbf1e6011f3d59e423fada3f12f6 Author: Chris Wilson Date: Tue Feb 19 08:57:47 2013 +0000 sna: Assert that the GPU damage is NULL before destroy a proxy If the GPU bo is a proxy, then it really is a pointer into a upload buffer for CPU data. In these cases, there should never be any GPU damage lying around. Signed-off-by: Chris Wilson commit d90a123db7ac99cf017167bf89df31c635df7e1e Author: Chris Wilson Date: Mon Feb 18 20:06:45 2013 +0000 sna: Assert that the gpu_bo exists if it is entirely damaged This should help catch the error slightly earlier. Signed-off-by: Chris Wilson commit a03aba6f7f55577e29c6a3267528e2614016222d Author: Chris Wilson Date: Mon Feb 18 16:12:14 2013 +0000 sna: A couple more assertions that we forcibly attach pixmaps correctly Signed-off-by: Chris Wilson commit 1f16d854264ea923303b79379266bd789fd9dd4d Author: Chris Wilson Date: Mon Feb 18 14:30:55 2013 +0000 sna/dri: Prevent swapping a decoupled DRI2Buffer If the DRI2Buffer is no longer valid for the Drawable, for example the window had just been reparent, just complete the swap without triggering any assertions. Signed-off-by: Chris Wilson commit b3ba758a0186c9abc6c0583f52775ea714165134 Author: Damien Lespiau Date: Thu Feb 14 14:20:19 2013 +0000 uxa/gen7: Don't use a message register to store vl Turns out the "new" assembler that uses mesa's opcode emission hits the path that automatically transforms MRF registers into GRF ones in the exa_wm_src_projective shader. The diff with the new assembler is: $ intel-gen4disasm -g7 - - { 0x00600041, 0x208077be, 0x008d03c0, 0x008d0180 }, + { 0x00600041, 0x2e8077bd, 0x008d03c0, 0x008d0180 }, mul(8) m4<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; mul(8) g116<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; Of course, message registers are no more in gen7, so the shader is trying to do something shaddy (ahem!). Instead of using m4, let's make exa_wm_src_projective use g68 for v (aka vl) which makes sense since: 1/ vh is g69 2/ exa_wm_src_affine uses g68 for vl already This commit changes the generated assembly, here's the decoded diff: $ intel-gen4disasm -g7 - - { 0x00600041, 0x208077be, 0x008d03c0, 0x008d0180 }, + { 0x00600041, 0x288077bd, 0x008d03c0, 0x008d0180 }, mul(8) m4<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; mul(8) g68<1>F g30<8,8,1>F g12<8,8,1>F { align1 }; Cc: Kenneth Graunke Reported-by: Xiang, Haihao Signed-off-by: Damien Lespiau Reviewed-by: Kenneth Graunke commit 43ba22ef4a4142f334e9ae2d926250988ecbe8bc Author: Chris Wilson Date: Sun Feb 17 09:25:38 2013 +0000 Confirm that i915.ko has KMS enabled before binding to the device If the kernel has the module, but the KMS module option is not enabled, we cannot function. So after checking to see if the i915.ko is bound, then querying whether it provides any KMS resources. If it has no CRTCs attached, then we need to failover to the VESA/fbdev drivers. Note that this should have been detected by drmCheckModesettingSupported() References: https://bugs.freedesktop.org/show_bug.cgi?id=60987 Signed-off-by: Chris Wilson commit 5a5943e2374a674067e0c48b0fe8a1f2eeff2177 Author: Chris Wilson Date: Fri Feb 15 12:05:14 2013 +0000 NEWS: Xserver 1.6 was not packaged in Xorg 7.7 I misinterpreted Sedat Dilek's advice on how to fix my confusing changelog, so drop the Xorg 7.7 confusion and just refer to the version of Xserver the driver is first compatible with. commit 15e1050ea505c40a288ec197d817d3c6d51693d5 Author: Chris Wilson Date: Thu Feb 14 21:59:36 2013 +0000 NEWS: Fix a couple of typos and factual errors Sedat Dilek corrected my spelling and pointed out that what is known as Xorg 1.6 in the log file is actually better known as releases of Xserver 1.6 and Xorg 7.7. commit 86e025a1842f3c2f319676818b1f4624cd94ebc5 Author: Chris Wilson Date: Wed Feb 13 22:05:34 2013 +0000 sna/gen4: Restore nonrectiinear spans workaround Instead of relying on the macro, the intention was simply to use the prefer_gpu hint. However, I dropped it whilst refactoring ideas from later generations. So restore both the debug control to force spans as well as the intended workaround. Reported-by: Edward Sheldrake Signed-off-by: Chris Wilson commit f2a64dbdfceac985d235c4873f52013633d6cfd8 Author: Chris Wilson Date: Wed Feb 13 17:15:46 2013 +0000 sna: Avoid stalling on a SHM upload when otherwise idle Fixes regresion from commit 09ea1f4402b3bd0e411b90eb5575b3ff066d7356 Author: Chris Wilson Date: Thu Jan 10 16:26:24 2013 +0000 sna: Prefer to use the GPU for copies from SHM onto tiled destinations As the stalls on IVB 64-bit machines at least greatly offset the benefits. As those earlier measurements were made on the same IVB machine but running in 32-bit mode, I need to double-check whether or not this is another 32-bit peculiarity. Signed-off-by: Chris Wilson commit 4bf51ec7bcc7818fbee8643a88aebee0362691b2 Author: Chris Wilson Date: Wed Feb 13 16:32:18 2013 +0000 Revert "sna: Avoid promoting SHM CPU bo to GPU to maintain coherence with SHM clients" This reverts commit f743cd5734ca502aa8bdb0e1327fe84d6ce82755. commit 9861423a76402c260724a752ada293a03ce1a79b Author: Chris Wilson Date: Wed Feb 13 15:11:45 2013 +0000 sna/dri: Fix typo limiting gen4 to TILING_X depth buffers Fixes regression from commit 98b312e579385e6e4adf6bf0abe20f8ca84592af Author: Chris Wilson Date: Wed Jan 23 20:51:35 2013 +0000 sna/dri: Stop feeding I915_TILING_Y to mesa i915c Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60178 Signed-off-by: Chris Wilson commit 38a3506aa1c9c2e07125b54fc319b6de89febff9 Author: Chris Wilson Date: Wed Feb 13 14:09:38 2013 +0000 sna: Handle scanouts still active at the time of destruction Basically remove the bogus assert, and reorder the list to preferentially reuse the still active scanouts. Signed-off-by: Chris Wilson commit 3b82d93162b9e127c6d055d5007e75fcc31f4af8 Author: Chris Wilson Date: Tue Feb 12 21:53:38 2013 +0000 sna/dri: Validate that the scanout flag is set Signed-off-by: Chris Wilson commit 04e4805f57fdf0581e5e75c29c275c15c79852a3 Author: Chris Wilson Date: Tue Feb 12 21:52:35 2013 +0000 sna: Prefer inplace readback if the GPU doesn't support cacheable BLTs As we must perform the GTT reads anyway, first see if we can copy directly to the destination. Signed-off-by: Chris Wilson commit 2c569d22d2d243badc15d5dbcc09e6759f4ff01a Author: Chris Wilson Date: Tue Feb 12 20:15:33 2013 +0000 sna: Only use the inplace read fallback if we have no CPU bo support Signed-off-by: Chris Wilson commit aeaed0b7810e9c794749a4f59c72790063cddc86 Author: Chris Wilson Date: Tue Feb 12 19:30:44 2013 +0000 sna/dri: Assert that we are not passed deceased DRI2Buffers Signed-off-by: Chris Wilson commit 5fb165b02d47634ccf9fb72ab6fb4d65b89f78d0 Author: Chris Wilson Date: Mon Feb 11 22:15:17 2013 +0000 sna/dri: Assert that the old scanout is clear before overwriting Signed-off-by: Chris Wilson commit 2667b821e193c0badf16420f82f8a99a93c27a46 Author: Chris Wilson Date: Mon Feb 11 22:06:00 2013 +0000 sna/dri: Update flush status for tear-free exported GPU bo Signed-off-by: Chris Wilson commit a4442045df9164651702b166e0de2bfd25e8a76f Author: Chris Wilson Date: Mon Feb 11 21:16:19 2013 +0000 sna/dri: Harden the replacement of the back buffer against alloc failure Signed-off-by: Chris Wilson commit 75406775b83ca5c320e4bc2d2dbd8f1eb0d1677d Author: Chris Wilson Date: Mon Feb 11 13:00:13 2013 +0000 NEWS: Fix marketing name for 945gm The GMA3100 was the desktop G31/G33 which whilst almost identical to the GMA950, notably does not require the extra unfenced alignment. Signed-off-by: Chris Wilson commit 0b116a1d023ad7cc148d91f268dbf71452dbd9dd Author: Chris Wilson Date: Mon Feb 11 12:36:43 2013 +0000 sna: Fix inaccurate use of __attribute__((const)) 'const' is only allowed to use the function parameters and not allowed to access global memory - that includes not allowed to deference its arguments... Thanks to Jiri Slaby for spotting my mistake. Signed-off-by: Chris Wilson commit 47657e5355103b2e61da6f059c560e63fe13b0ed Author: Chris Wilson Date: Mon Feb 11 12:31:18 2013 +0000 sna/dri: Ignore a compiler barf breaking an assertion Manual confirmation with gdb says all is fine and things work again after printing the variables responsible. The curious reader is welcome to read the disassembly to find where the compiler goofed. Signed-off-by: Chris Wilson commit 3540554e5a74ccd2ca746482700a9f5657954227 Author: Chris Wilson Date: Mon Feb 11 11:14:17 2013 +0000 sna/dri: Couple up the flush pixmap after checking for allocation failures Tidy up the error path not to leave the GPU bo pinned and marked for flushing. Signed-off-by: Chris Wilson commit 58b61bcd02467d2b08b2dd194ab6884437b83fa6 Author: Chris Wilson Date: Mon Feb 11 11:05:02 2013 +0000 sna/dri: Tighten the assertions that we have one DRI2Buffer per Pixmap Signed-off-by: Chris Wilson commit a13f806ae28459a5cf671ccbf9cc8725f541a4ba Author: Chris Wilson Date: Mon Feb 11 10:50:20 2013 +0000 sna: Assert that we do not destroy a GPU bo for an active DRI pixmap This is an extra paranoid check that the bo is still pinned. Signed-off-by: Chris Wilson commit c2eb2db83280ae45b8df8a3b6e488b6a1404391a Author: Chris Wilson Date: Mon Feb 11 10:47:13 2013 +0000 sna: Avoid stalling for changing cache levels on an active scanout Signed-off-by: Chris Wilson commit 696347a6260f3741ad3e6238db0fd285384bb753 Author: Chris Wilson Date: Mon Feb 11 09:58:58 2013 +0000 sna/dri: Only clear the GPU bo flush flag when the last export is destroyed Add various assertions around DRI to be sure that we don't change the GPU bo for a pixmap that does not match our flush bookkeeping. Then be more careful during the DRI2Buffer destroy that we don't accidentally remove the flush flag from a shared bo. Signed-off-by: Chris Wilson commit 301aebfa71143fb610eb7b816376a8c1f3e07208 Author: Chris Wilson Date: Sun Feb 10 18:01:33 2013 +0000 configure: Add -lX11 required to link the legacy libI810XvMC.so Signed-off-by: Chris Wilson commit 65c320e677b8ab4d745568b33f381d5865bf8b73 Author: Chris Wilson Date: Sun Feb 10 14:20:59 2013 +0000 2.21.2 release commit 0d75b19979b1ac14353765e2bb84c6a466129109 Author: Chris Wilson Date: Sun Feb 10 15:47:53 2013 +0000 sna: Restore glyphs with xorg-1.12 That simple and innocuous build fix for xorg-1.13 bizarrely causes missing glyphs with earlier Xorgs. Signed-off-by: Chris Wilson commit 9fd0d8873a5a5c4f77904cab0b9909ca941b5dae Author: Chris Wilson Date: Sun Feb 10 14:29:29 2013 +0000 NEWS: fix bug url The dangers of cutting and pasting from git log. Signed-off-by: Chris Wilson commit 617fadf3acf7bf75fb203c1e85fd0ddb98b3dbb9 Author: Chris Wilson Date: Sun Feb 10 14:20:59 2013 +0000 2.21.1 release commit 3169a4e53cf39cc3d5c18ac6add909aa3a58de7e Author: Chris Wilson Date: Sun Feb 10 11:57:14 2013 +0000 sna: Reorder some includes so that compat-api.h comes after the headers it wraps Fixes the build in cases where the compat-api.h was defining macros to subvert the real functions found in the xorg includes Signed-off-by: Chris Wilson commit 71fbad64c5cfe6832a03815bece4c89d15253e1a Author: Chris Wilson Date: Sun Feb 10 10:54:17 2013 +0000 configure: Fix typo in checking for libdrm_intel The package name is libdrm_intel not libdrm_intel-1, an obvious cut'n'paste error from testing for pixman-1. Signed-off-by: Chris Wilson commit 3cbdfb54d1fcfed7745111e861e19b7bbac243cc Author: Chris Wilson Date: Sat Feb 9 19:15:20 2013 +0000 sna: Backport to squeeze - Xorg-1.6, pixman-0.16, libdrm-2.4.21 The principle change is to switch to the old Privates API and undo the Region renames. The downside is that this ignores the critical bugfixes made to the xserver since xorg-1.6 - but I assume that whoever wants to run the latest hardware on the old xservers is also backporting those stability fixes... Signed-off-by: Chris Wilson commit 42a6b25817985e22e7d462be87fbd97973d96a29 Author: Chris Wilson Date: Sat Feb 9 15:30:58 2013 +0000 sna: Fix alignment of the base of partial buffers for pre-G33 chipsets The older chipsets have much more restrictive alignment rules for the base address of tiled but unfenced objects. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1120108 Signed-off-by: Chris Wilson commit 80044e54634d0836694d5aa6f98ce22fe38d367f Author: Chris Wilson Date: Sat Feb 9 09:57:26 2013 +0000 sna: Promote to GPU is only partially damaged on the CPU but busy on the GPU Signed-off-by: Chris Wilson commit d18cb72a94fad0ee99ab361c21d643c927d29c35 Author: Chris Wilson Date: Fri Feb 8 22:31:19 2013 +0000 sna: Randomly perturb 'wedged' to hunt for faults Signed-off-by: Chris Wilson commit ce9f0448367ea6a90490a28150bfdc0a76500129 Author: Chris Wilson Date: Fri Feb 8 16:01:54 2013 +0000 sna/gen6: Use GT2 settings for both GT2 and GT2+ Signed-off-by: Chris Wilson commit ae5399aaf9ef57d33e8fd957e8a96964897c09b3 Author: Chris Wilson Date: Fri Feb 8 11:31:21 2013 +0000 sna: Force the fallback path for unaccelerated randr damage Signed-off-by: Chris Wilson commit c69b4389abc324533a9a311c17a667bf8a1e1673 Author: Chris Wilson Date: Thu Feb 7 22:54:37 2013 +0000 sna/gen4: Split the have_render flag in separate prefer_gpu hints The idea is to implement more fine-grained checks as we may want different heuristics for desktops with GT1s than for mobile GT2s, etc. Signed-off-by: Chris Wilson commit bec99de812ce6a1bbc2c8e4cfd05f4f74c560ea6 Author: Chris Wilson Date: Fri Feb 8 00:53:10 2013 +0000 sna: Remove the bogus assertions on buffer domains Just a few lines earlier we already have the correct assertion that the buffer was not in the GPU domain, so had these two been correct, they would have still been redundant. Signed-off-by: Chris Wilson commit 8d1d3c6e6102ff20fbff74ec6b3b2e94ee757015 Author: Chris Wilson Date: Thu Feb 7 14:47:07 2013 +0000 sna: Fixup an invalid assertion We may choose to operate inplace on a buffer last used by the CPU if we are discarding all the existing damage. Signed-off-by: Chris Wilson commit c405dba367bdca51221bd2464213199783dc18fe Author: Chris Wilson Date: Thu Feb 7 13:41:42 2013 +0000 sna: Also assert that the GPU is not wedged before continuing a batch Signed-off-by: Chris Wilson commit feeff6fcefccdca5335fea55c2fdbf8a4004c175 Author: Chris Wilson Date: Thu Feb 7 13:33:58 2013 +0000 sna: Force GTT readback if the GPU is wedged Signed-off-by: Chris Wilson commit 8a272971d5971a56f57dde00dceb082d0b142c8c Author: Chris Wilson Date: Wed Feb 6 17:59:10 2013 +0000 sna: Allow inplace uploads to utilise GTT on LLC machines Rather than arbitrarily disable the fallback paths for LLC, allow it to utilise any available GTT buffers for inplace uploads. The best explanation so far is that with the streaming is that we are trashing the LLC. On other machines, the difference is in the noise. Signed-off-by: Chris Wilson commit bc8a2c30c4f6bb9ce751b6717a3a2feaea0d6d4b Author: Chris Wilson Date: Thu Feb 7 10:42:58 2013 +0000 sna: Only try the SRC fixup into the buffer if it is CPU mapped On one particular machine, this operation is behaving as if it is reading back UC memory during the explicit write-only composite. Signed-off-by: Chris Wilson commit 889ed28f52bccdbc54692ea075f95f9635a8d58a Author: Chris Wilson Date: Thu Feb 7 10:42:21 2013 +0000 sna: Correctly align used buffers to the following page boundary Signed-off-by: Chris Wilson commit 974b6a97d78dadf09be8a2c4f61020f15d80d558 Author: Chris Wilson Date: Wed Feb 6 17:02:27 2013 +0000 sna: Fallback to non-LLC paths after an allocation failure for an LLC buffer Signed-off-by: Chris Wilson commit 5c8084ef04cb0a7da064fb1e13c8ef7dae528b1b Author: Chris Wilson Date: Wed Feb 6 16:39:31 2013 +0000 intel: Becareful not to match UMS against future generations Signed-off-by: Chris Wilson commit be241fb25ed0a8d41a642ea811253207f88d0962 Author: Chris Wilson Date: Wed Feb 6 16:38:12 2013 +0000 sna: Free the handle after pwrite buffer allocation failure Having just allocated the handle, we need to free it if we then fail to allocate memory for the buffer. Signed-off-by: Chris Wilson commit 4b3b25f0be33d3af3ccecfb3193fc2d365445fdf Author: Chris Wilson Date: Wed Feb 6 16:37:21 2013 +0000 sna: Flush our caches if we fail to mmap an object The likely cause for a mmap failure is that we hold too many objects open or have exhausted our address space. In both cases, we need to trim our caches before continuing. Signed-off-by: Chris Wilson commit daba1ae3e7f0532cc53d9a5178778dbaec203052 Author: Chris Wilson Date: Wed Feb 6 16:17:36 2013 +0000 sna: Correctly handle failure to CPU map a new allocation If we fail to CPU map, we want to fallback to just using pwrite with normal memory. Signed-off-by: Chris Wilson commit 0adb0b5e1ebcf3ddfeddae99d96912ec4c090832 Author: Chris Wilson Date: Wed Feb 6 16:02:30 2013 +0000 sna: Handle mapped buffer allocation failure for LLC The presumption was that if we had LLC we would have allocated the buffer by that point - however, it was remotely possible to have fallen through and so we need to handle those cases. Signed-off-by: Chris Wilson commit f4cff22afae598f41adf36cd149223d1f7dd6b6e Author: Chris Wilson Date: Wed Feb 6 15:15:36 2013 +0000 sna: Relax the buffer size assertion to only be larger than required Not all paths request alloc pages, a few just request sufficient pages for the original size. So we can only assert that condition is satisfied. Signed-off-by: Chris Wilson commit 8bc593c732a2f1ccd1bdabc071c709a44222db61 Author: Chris Wilson Date: Wed Feb 6 15:11:00 2013 +0000 sna: Make sure we always replace io buffers before inserting into the cache Signed-off-by: Chris Wilson commit 5f72158919098dd5684d1c56d1ba643cc3be2c7d Author: Chris Wilson Date: Wed Feb 6 15:10:23 2013 +0000 configure: XvMC support is optional, so make failure to find xcb non-fatal commit cd6d8f9b9df02934ebfff76cb40410c8ce3887dd Author: Chris Wilson Date: Wed Feb 6 10:37:50 2013 +0000 xvmc: Add the complementary XCB_CFLAGS After splitting the xvmc dependences into xcb and non-xcb, we then also have to add the xcb CFLAGS to build libIntelXVmc.la Reported-by: Julien Cristau Signed-off-by: Chris Wilson commit b96ee47ad97943c3dccd40d9570e29002dc3d85f Author: Paul Menzel Date: Sun Feb 3 13:33:08 2013 +0100 configure.ac: Split out XCB libraries from `XVMCLIB` into `XCB` Building the package under Debian Sid/unstable, `dh_shlibdeps` informs that `libI810XvMC.so.1.0.0` does not need to be linked against `libX11-xcb.so.1`, `libxcb-dri2.so.0`, `libxcb-util.so.0` or `libxcb.so.1` [1]. $ debuild -b -us -uc […] make[1]: Entering directory `/src/xserver-xorg-video-intel' dh_shlibdeps -- --warnings=6 dpkg-shlibdeps: Warnung: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 sollte nicht gegen libX11-xcb.so.1 gelinkt werden (es verwendet keines der Bibliotheks-Symbole) dpkg-shlibdeps: Warnung: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 sollte nicht gegen libxcb-dri2.so.0 gelinkt werden (es verwendet keines der Bibliotheks-Symbole) dpkg-shlibdeps: Warnung: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 sollte nicht gegen libxcb-util.so.0 gelinkt werden (es verwendet keines der Bibliotheks-Symbole) dpkg-shlibdeps: Warnung: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 sollte nicht gegen libxcb.so.1 gelinkt werden (es verwendet keines der Bibliotheks-Symbole) make[1]: Leaving directory `/src/xserver-xorg-video-intel' […] Moving `x11-xcb`, `xcb-dri2` and `xcb-aux` from `XVMCLIBS` into `XCB` and adding `XCB_LIBS` only to the `LIBADD` variables of `libIntelXvMC` makes the warnings go away and the libraries are still built without any issues. make[1]: Entering directory `/src/xserver-xorg-video-intel' dh_shlibdeps -- --warnings=6 make[1]: Leaving directory `/src/xserver-xorg-video-intel' dh_installdeb -O--builddirectory=build/ dh_xsf_substvars -O--builddirectory=build/ dh_gencontrol -O--builddirectory=build/ dpkg-gencontrol: Warnung: Feld Depends von Paket xserver-xorg-video-intel-dbg: unbekannte Substitutionsvariable ${shlibs:Depends} dh_md5sums -O--builddirectory=build/ dh_builddeb -O--builddirectory=build/ dpkg-deb: Paket »xserver-xorg-video-intel« wird in »../xserver-xorg-video-intel_2.19.0-6.1_i386.deb« gebaut. dpkg-deb: Paket »xserver-xorg-video-intel-dbg« wird in »../xserver-xorg-video-intel-dbg_2.19.0-6.1_i386.deb« gebaut. dpkg-genchanges -b >../xserver-xorg-video-intel_2.19.0-6.1_i386.changes dpkg-genchanges: rein binärer Upload - es ist kein Quellcode hinzugefügt dpkg-source --after-build xserver-xorg-video-intel dpkg-buildpackage: Binärpaket(e) hochzuladen (keine Quellen enthalten) Now running lintian... W: xserver-xorg-video-intel: hardening-no-relro usr/lib/libI810XvMC.so.1.0.0 W: xserver-xorg-video-intel: hardening-no-fortify-functions usr/lib/libI810XvMC.so.1.0.0 W: xserver-xorg-video-intel: hardening-no-relro usr/lib/libIntelXvMC.so.1.0.0 W: xserver-xorg-video-intel: hardening-no-fortify-functions usr/lib/libIntelXvMC.so.1.0.0 W: xserver-xorg-video-intel: hardening-no-relro usr/lib/xorg/modules/drivers/intel_drv.so W: xserver-xorg-video-intel: hardening-no-fortify-functions usr/lib/xorg/modules/drivers/intel_drv.so N: 1 tag overridden (1 warning) Finished running lintian. The modules were originally added with the following commit present since tag 2.10.0. commit 3e8f2eae3a586aa29be4858698e666e0ec778cea Author: Eric Anholt Date: Thu Oct 15 13:48:56 2009 -0700 XVMC: Use XCB DRI2 instead of cargo-culting our own copy of Xlib stuff. (v2) [1] https://buildd.debian.org/status/fetch.php?pkg=xserver-xorg-video-intel&arch=i386&ver=2%3A2.19.0-6&stamp=1347825458 Signed-off-by: Paul Menzel commit 93770c709aa7d3719b7c717040b16c8f82d5c207 Author: Paul Menzel Date: Tue Jan 22 10:47:22 2013 +0100 NEWS: Fix a typo: a*n* inadvertent commit a8cfddd280b5220f23565b21c91f3f7dd10bbe91 Author: Chris Wilson Date: Tue Feb 5 22:06:03 2013 +0000 sna: Tidy buffer allocation size assertions Rather than perilously update a local variable with the allocated size, just use the size of the bo in the assertion that is large enough to satisfy the allocation request. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit 82dc91e8c24a1fbbf03dcf89a3955319b3399ea0 Author: Chris Wilson Date: Tue Feb 5 21:50:43 2013 +0000 test: Add a very basic blt benchmark Signed-off-by: Chris Wilson commit 9c80a0337ec12b6baab5aab380503e672e925677 Author: Chris Wilson Date: Tue Feb 5 14:56:10 2013 +0000 sna: ValleyView uses the same scanline registers as SandyBridge Signed-off-by: Chris Wilson commit 4c45e3fe456d211afc6ba69878b413a72ef5d0bf Author: Chris Wilson Date: Tue Feb 5 14:45:39 2013 +0000 intel: add more ValleyView PCI IDs Signed-off-by: Chris Wilson commit c6101d9d71a86a579ff9771d456b234a38bd80b7 Author: Chris Wilson Date: Tue Feb 5 11:02:30 2013 +0000 man: Fix a typo s/debuging/debugging/ Signed-off-by: Chris Wilson commit f33c90f7ada238683433d05492434120d06ea1fc Author: Chris Wilson Date: Fri Feb 1 19:34:56 2013 +0000 NEWS: Trivial typo s/utilile/utilise/ commit 6346c844525c2b3a82c16fe10485b901a2b5ddbc Author: Chris Wilson Date: Tue Feb 5 10:17:45 2013 +0000 sna/gen4: Remove old single-thread SF w/a The alternative of disabling GPU spans seems to be far more effective. Signed-off-by: Chris Wilson commit 1565917f10d9fb3c7e2e7e273173c38c364b9861 Author: Chris Wilson Date: Tue Feb 5 10:11:14 2013 +0000 sna/gen4: Disable non-rectilinear GPU span compositing This seems to be the primary victim of the render corruption, so disable until the root cause is fixed. References: https://bugs.freedesktop.org/show_bug.cgi?id=55500 Signed-off-by: Chris Wilson commit 37bc822190f36be7b021167ba4d306bbcd97957b Author: Damien Lespiau Date: Fri Jan 18 14:13:08 2013 +0000 build: Make generation of gen code depend on intel-gen4asm This way, when a new intel-gen4asm is available (because one just hacked on it and has installed a new version for instance) the shaders will be recompiled. This helps catching regressions, testing the latest changes in the assembler haven't broken too many things. Signed-off-by: Damien Lespiau Signed-off-by: Chris Wilson commit 18f8d2291fbb53ac993b926c247ca981e1e5207b Author: Damien Lespiau Date: Fri Jan 18 14:13:07 2013 +0000 build: Use $(AM_V_GEN) to silence the assembly of gen programs Signed-off-by: Damien Lespiau Signed-off-by: Chris Wilson commit eea535b7e2a35ec4dfa50550b674d4212676d2ee Author: Damien Lespiau Date: Fri Jan 18 14:13:06 2013 +0000 build: Make autoreconf honour ACLOCAL_FLAGS When running autoreconf, it's possible to give flags to the underlying aclocal by declaring a ACLOCAL_AMFLAGS variable in the top level Makefile.am. Putting ${ACLOCAL_FLAGS} there allows the user to set an environment variable up before running autogen.sh and pull in the right directories to look for m4 macros, say an up-to-date version of the xorg-util macros. Signed-off-by: Damien Lespiau Signed-off-by: Chris Wilson commit 9640640ab02d5de630e903116c1b104752f8b604 Author: Paul Menzel Date: Sat Feb 2 11:44:54 2013 +0100 configure.ac: Do not include `xext` and `xfixes` in `XVMCLIB` Building the package under Debian Sid/unstable, `dh_shlibdeps` informs that `libIntelXvMC.so.1.0.0` does not need to be linked against `libXext.so.6` or `libXfixes.so.3` [1]. $ debuild -b -us -uc […] make[1]: Entering directory `/build/buildd-xserver-xorg-video-intel_2.19.0-6-i386-9thLfo/xserver-xorg-video-intel-2.19.0' dh_shlibdeps -- --warnings=6 dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libIntelXvMC.so.1.0.0 should not be linked against libXext.so.6 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libIntelXvMC.so.1.0.0 should not be linked against libXfixes.so.3 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libXext.so.6 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libXfixes.so.3 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libX11-xcb.so.1 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libxcb-dri2.so.0 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libxcb-util.so.0 (it uses none of the library's symbols) dpkg-shlibdeps: warning: debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 should not be linked against libxcb.so.1 (it uses none of the library's symbols) dpkg-shlibdeps: warning: package could avoid a useless dependency if debian/xserver-xorg-video-intel/usr/lib/libIntelXvMC.so.1.0.0 debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 were not linked against libXext.so.6 (they use none of the library's symbols) dpkg-shlibdeps: warning: package could avoid a useless dependency if debian/xserver-xorg-video-intel/usr/lib/libIntelXvMC.so.1.0.0 debian/xserver-xorg-video-intel/usr/lib/libI810XvMC.so.1.0.0 were not linked against libXfixes.so.3 (they use none of the library's symbols) make[1]: Leaving directory `/build/buildd-xserver-xorg-video-intel_2.19.0-6-i386-9thLfo/xserver-xorg-video-intel-2.19.0' dh_installdeb -a -O--builddirectory=build/ […] Not populating `XVMCLIB` with `xext` and `xfixes` makes the warning go away and the libraries are still built without any issues. [1] https://buildd.debian.org/status/fetch.php?pkg=xserver-xorg-video-intel&arch=i386&ver=2%3A2.19.0-6&stamp=1347825458 Signed-off-by: Paul Menzel commit 9807bba950078d86a25b91064ecfebaa0ee459e3 Author: Chris Wilson Date: Fri Feb 1 18:25:48 2013 +0000 sna: Drop bogus refcnt assertion during kgem_bo_retire() As we may call it kgem_bo_sync(), during preparation of the upload buffer which in turn may operate on an object straight out of the snoop cache and hence not yet referenced (or in some cases, ever). Signed-off-by: Chris Wilson commit a5561f13498066922b54af04cc71549322ce0e3b Author: Chris Wilson Date: Fri Feb 1 18:05:35 2013 +0000 sna: Do not add the INPLACE hint if we have the ASYNC hint set If the caller is preparing to use the GPU to rendering into the CPU bo, it will request an ASYNC migration. In those cases, we do not want to substitute it with an INPLACE operation. Signed-off-by: Chris Wilson commit d3ff1cb9d7f788002337b1e6c4c81c58112b85b1 Author: Chris Wilson Date: Fri Feb 1 13:46:33 2013 +0000 2.21.0 release commit 008f8230a7c47f1249eb51e53b3abf158f2a42bf Author: Chris Wilson Date: Fri Feb 1 01:54:52 2013 +0000 sna: Assert that if we have GPU damage we have a GPU bo Scatter the asserts around the migration points to catch where this invariant may be untrue. Signed-off-by: Chris Wilson commit cf0576f87102b1535268691e7e29661b0f9ee73b Author: Chris Wilson Date: Fri Feb 1 00:19:21 2013 +0000 sna/video: Correct computation of planar frame size The total frame size is less than 3 times the subsampled chroma planes due to the additional alignment bytes. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1104180 Signed-off-by: Chris Wilson commit 268285d9a64fc47fe81fe5bfbfbd1890dad53e1e Author: Chris Wilson Date: Thu Jan 31 21:57:41 2013 +0000 sna/gen3+: Flush vertex threads before touching global state We need to be careful not just when finishing the current vbo to synchronize with the sharing threads, but also before we emit the batch state that no other thread will try and do the same. Signed-off-by: Chris Wilson commit 1239e012ae6d4f00ce73f32d7244905a601170ea Author: Chris Wilson Date: Thu Jan 31 19:18:17 2013 +0000 sna: Make sure the needs_flush is always accompanied by a tracking request References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 9712f49fddc8be939f77c25fcb907873af44619f Author: Chris Wilson Date: Thu Jan 31 18:08:05 2013 +0000 sna: Remove stale assertion Now the reset is meant to restablish 'rq' if the bo was busy. Signed-off-by: Chris Wilson commit cd7df0004cf6e423d2ae6c0cf83a84e0031161b4 Author: Chris Wilson Date: Thu Jan 31 17:32:57 2013 +0000 sna: Pass width/height to composite for rotated displays This is essential to handle displays that are too large to be rendered normally via the 3D pipeline and so that the bounds of the fixup region are known. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60124 Signed-off-by: Chris Wilson commit 38376b56cfe0dfc603bce48e37432622ef9a0135 Author: Chris Wilson Date: Thu Jan 31 17:29:10 2013 +0000 sna: Remember to move scanouts to the scanout cache after retiring Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit 0a08de1f02577aef0da289108270c1b35e5d9703 Author: Chris Wilson Date: Thu Jan 31 16:39:47 2013 +0000 sna: After removing the bo from a batch, check whether it is still busy If we transfer a bo to the current batch, then subsequently discard it, we lose the information about its current active state. Try to recover this information, by querying the kernel and adding it to the flushing list if necessary. Reported-by: Jiri Slaby Signed-off-by: Chris Wilson commit fff0686342f8ec3b3f3510340e073defdf2fb73f Author: Chris Wilson Date: Thu Jan 31 12:40:21 2013 +0000 sna/traps: Thread the fallback rectilinear compositor Signed-off-by: Chris Wilson commit 839542d219bd919c99398d514c1d194d18b78eff Author: Chris Wilson Date: Thu Jan 31 12:08:52 2013 +0000 sna/traps: Allow inplace compositing for non-GPU buffers and rectilinear traps Signed-off-by: Chris Wilson commit e329e04b10c88afb40f2fd8fdad5b24b9f7dfc15 Author: Chris Wilson Date: Thu Jan 31 11:33:37 2013 +0000 sna/traps: Translate the extents for the rasterization threads The single-threaded code used the pre-computed width/height and only required the origin from the bounds. However, the threads need to allocate memory for themselves based on the computed bounds, and so it helps if those bounds are then correct (rather than only the top-left being in local space with the bottom-right in global coordinates). Signed-off-by: Chris Wilson commit 033f75e5bd94e226e719f87ed4e0091845384679 Author: Chris Wilson Date: Thu Jan 31 01:38:01 2013 +0000 sna: Stage retirement through the flushing list If the kernel replies that a bo is still busy, stage its retirement through the flushing list to be certain that we never stall on a subsequent write. Signed-off-by: Chris Wilson commit 5f5711e62cc4c8ca15782376c4047174299e2db0 Author: Chris Wilson Date: Thu Jan 31 01:21:08 2013 +0000 sna: Disable dangerous assertions that depend upon external state Signed-off-by: Chris Wilson commit 42529336fd92d39a5a5eceb07f2838d4be50fa8e Author: Chris Wilson Date: Thu Jan 31 00:58:51 2013 +0000 sna: Prevent falling back to swrast if source is on the GPU Currently if the dst is wholly contained within the CPU, then we try to continue to operate on the GPU. However, if we have FORCE_GPU set, it means that one of the sources for the operation resides on the GPU, and that would require a readback in order to perform the operation on the CPU. Hence, if we try to use a CPU bo and fail, convert back to using the GPU bo if forced. Signed-off-by: Chris Wilson commit c2d06c407e1c2cbbf3f7f6c4989710a799cd43d0 Author: Chris Wilson Date: Wed Jan 30 21:17:42 2013 +0000 sna: Improve DBG output for damaged slave outputs After computing the intersection of the damage with the slave, give the region extents. Signed-off-by: Chris Wilson commit 8867aa6a46c33fd2abf3b3f0b1d6115bad6c8017 Author: Chris Wilson Date: Wed Jan 30 21:15:55 2013 +0000 sna/dri: Handle change of BackBuffer across a pending flip If we encounter a delayed flip with a different back buffer than the current, simply update the info rather than bug out. Signed-off-by: Chris Wilson commit a31fd03bd4c87c48dc3ca15e3082e29348224b8c Author: Chris Wilson Date: Wed Jan 30 17:26:28 2013 +0000 sna: Add a bunch of assertions to make sure we do not misplace scanouts As scanouts are uncached, they need to be treated carefully and decontaminated before being placed in the general cache. So double check that no bo in those caches are still marked as a scanout. Signed-off-by: Chris Wilson commit 6f1b862282ddb4545987fb9f0a45b528b7b7b5ee Author: Chris Wilson Date: Wed Jan 30 15:44:53 2013 +0000 sna: Pass the correct WRITE hint when migrating for rendering into the CPU bo Signed-off-by: Chris Wilson commit 5011ed2e729d46fe3cff5454e15a0fd16441f7e1 Author: Chris Wilson Date: Wed Jan 30 15:44:22 2013 +0000 sna: Only discard the clear hint when writing inplace to the GPU pixmap Signed-off-by: Chris Wilson commit 6312f58014c0bb4afa56855be1e9becc3e3cc3d7 Author: Chris Wilson Date: Wed Jan 30 15:43:05 2013 +0000 sna: Don't force a migration from CPU rendering for a DRI2 flushed pixmap Signed-off-by: Chris Wilson commit 60a3b370aea0cf9ffb4947a73984c877b4695d4e Author: Chris Wilson Date: Wed Jan 30 15:41:51 2013 +0000 sna: Retire the bo after a set-domain(CPU,0) Having relaxed the earlier assertion because the kernel is wrong, we can now retire for READ-READ optimisations. Signed-off-by: Chris Wilson commit 78ad5a742f40c2311bfe90997aebedeb998464e5 Author: Chris Wilson Date: Wed Jan 30 15:40:06 2013 +0000 sna: Relax assertion the the kernel considers the bo idle when we call retire All the callers have explicitly changed the domain upon the bo before calling kgem_bo_retire(), so we still get the occasional sporadic failure as kgem_busy() reports true. Kill the assertion for now. Signed-off-by: Chris Wilson commit 83bcd310d279758542e366348f808d7ca0f6d0bb Author: Chris Wilson Date: Wed Jan 30 13:18:21 2013 +0000 sna: Prefer to use snooped buffers for readbacks Signed-off-by: Chris Wilson commit 496f3ff04453524639a52a3b9dfcb8e198e5e597 Author: Chris Wilson Date: Wed Jan 30 12:21:33 2013 +0000 uxa: Harden against failures to submit batchbuffers If we fail to submit a batchbuffer, the driver is broken and likely to continue to fail to render. Give up, and fallback to swrast so that the session remains usable. References: https://bugs.freedesktop.org/show_bug.cgi?id=59771 Signed-off-by: Chris Wilson commit 04d48fee713e7bbc9cdf4f09855f6663a4bdc59f Author: Chris Wilson Date: Wed Jan 30 11:46:20 2013 +0000 sna: Fix errors found from asserts in a66c5f9ed51e Signed-off-by: Chris Wilson commit bc8b191ef6f5030d17a3b6497d1fd7556756c1ff Author: Chris Wilson Date: Wed Jan 30 09:04:10 2013 +0000 sna: Return early if the Drawable box exactly matches one CRTC If we are trying to find the best coverage, then by definition if the drawable is an exact match for one CRTC, we can stop looking. Signed-off-by: Chris Wilson commit de28027ffc649920268ae6fdd64146f08310e8a4 Author: Chris Wilson Date: Wed Jan 30 08:42:48 2013 +0000 sna/dri: Make sure we discard the existing mappings when swapping GPU bo If the GPU bo is currently mapped to the Pixmap, we need to be sure to invalidate that mapping if we swap the GPU bo (for SwapBuffers). If we forget, we leave a dangling pointer to chase. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60042 Signed-off-by: Chris Wilson commit cf9b9ac3186299ab2418c55e73e19c81e5f615a4 Author: Chris Wilson Date: Wed Jan 30 08:40:53 2013 +0000 sna: Only discard the mapping prior to the actual read when uploading Signed-off-by: Chris Wilson commit a66c5f9ed51e1dcfc2ab03339795b73617629196 Author: Chris Wilson Date: Wed Jan 30 08:22:00 2013 +0000 sna: Before replacing the devPrivate.ptr assert it is not already mapped Signed-off-by: Chris Wilson commit 3fdd28419adee7145d3925cff2704143a324e9d3 Author: Chris Wilson Date: Tue Jan 29 22:26:15 2013 +0000 sna: Only migrate the sample box if using the BLT engine for a composite Modify the presumption that if we are using a core operation on a shadow pixmap, then we are likely to continue migrating that pixmap back and forth. Signed-off-by: Chris Wilson commit 0c3b0f11d718d915e502582e9fadd5c0577640db Author: Chris Wilson Date: Tue Jan 29 22:24:30 2013 +0000 sna: Verify that we always add the SHM CPU bo to the flush list when using As we need to synchronize that bo before the next reply, we need to keep track of it whenever it is active on the GPU. Signed-off-by: Chris Wilson commit f743cd5734ca502aa8bdb0e1327fe84d6ce82755 Author: Chris Wilson Date: Tue Jan 29 18:04:40 2013 +0000 sna: Avoid promoting SHM CPU bo to GPU to maintain coherence with SHM clients Signed-off-by: Chris Wilson commit 9383c5efe9ace34970abddc5e3c84c32505b537f Author: Chris Wilson Date: Tue Jan 29 17:24:24 2013 +0000 sna/gen3+: Fix a DBG for composite_boxes() Signed-off-by: Chris Wilson commit b02a1ea5573b6f0b58a037dd4788c04c296f7ff3 Author: Chris Wilson Date: Tue Jan 29 09:28:33 2013 +0000 sna: Add GT1/GT2 thread counts for Haswell Signed-off-by: Chris Wilson commit 1dc2d9ede5c7f330ebadf85d987559c8a6cb1c6b Author: Chris Wilson Date: Mon Jan 28 23:14:57 2013 +0000 sna: Add some more paranoia that we correctly map before fallbacks Signed-off-by: Chris Wilson commit 63c71bcd96202e6da44d6776d119a82f0c06d386 Author: Chris Wilson Date: Sun Jan 27 23:17:13 2013 +0000 sna: Fix typo in vertex count for threaded source span emitter Signed-off-by: Chris Wilson commit b0d26ca9312695d05c29503a3f892e7f2c5816dd Author: Chris Wilson Date: Sun Jan 27 21:07:03 2013 +0000 sna: Replace the forced vertex finish with just a wait When completing a batch mid-operation, we need to wait upon the other threads to complete their writes so that memory is coherent before submitting the work to the GPU. This was achieved by forcing the finish, but all that from that is the wait, which makes the handling of threads much explicit and removes the unnecessary vbo refresh. Signed-off-by: Chris Wilson commit b0c3170c1092d01b4937f352a3962854785ee549 Author: Chris Wilson Date: Sun Jan 27 19:09:38 2013 +0000 sna: Add the pixmap to the flushing list when creating for inplace CPU writes Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 73f574945f2cac14f9bafa6395e2c4dbb16fcf5d Author: Chris Wilson Date: Sun Jan 27 16:02:52 2013 +0000 sna: Disable all signals in the render threads X uses them (SIGIO especially) for input handling, and gets rightfully confused if it finds itself in a different thread. Signed-off-by: Chris Wilson commit 9a7bf70365980809d0f02190f2f620a957ff1ba8 Author: Chris Wilson Date: Sat Jan 26 23:03:33 2013 +0000 sna: Enable threaded rasterisation for non-antialiased geometry Signed-off-by: Chris Wilson commit 8178cff5718e69e14d3953a7f754d7585a06838f Author: Chris Wilson Date: Sat Jan 26 14:41:04 2013 +0000 sna: Begin sketching out a threaded rasteriser for spans Signed-off-by: Chris Wilson commit 8ffb3f50b3b4601401da76e2848e059ab63231f4 Author: Chris Wilson Date: Fri Jan 25 10:45:39 2013 +0000 sna: Spawn threads to rasterize trapezoids through pixman Signed-off-by: Chris Wilson commit 0ec2f3a8bac96acc55c8fdb432b97d026abaafb4 Author: Chris Wilson Date: Thu Jan 24 23:10:39 2013 +0000 sna: Spawn threads to composite trapezoids inplace Signed-off-by: Chris Wilson commit 427b7311fe1b66d54518bae45e9fa149bda8a6e8 Author: Chris Wilson Date: Thu Jan 24 22:25:46 2013 +0000 sna: Perform the last threaded composite operation directly The point of the refactor was to execute the last stage of the composite in the master thread, so do so. Signed-off-by: Chris Wilson commit 326dcd75f2202b1af29e986f5efb6b1e133217cb Author: Chris Wilson Date: Thu Jan 24 20:58:53 2013 +0000 sna: Parse cpuinfo to determine the actual number of physical cores/caches Signed-off-by: Chris Wilson commit f597b647180c1e7bf83693060f244926191b7462 Author: Chris Wilson Date: Thu Jan 24 18:45:35 2013 +0000 sna: Tidy construction of data for threaded composite Signed-off-by: Chris Wilson commit 1643c97f8f7b49738b649b5f7d1e574d689d167e Author: Chris Wilson Date: Thu Jan 24 18:24:02 2013 +0000 sna: Use threads for simple mask generation Signed-off-by: Chris Wilson commit d60128c55e8f5f69476d42c20f2fd62ccc0f411e Author: Chris Wilson Date: Thu Jan 24 15:41:29 2013 +0000 sna/dri: Compensate clipExtents for drawable offset The clipExtents is in screen coordinates whereas we just want to confirm that the maximum pixel to be copied lies with the DRI2 buffer, which is relative to the drawable. Reported-by: Matthieu Baerts Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59806 Signed-off-by: Chris Wilson commit 264b3b72500c5af74d124a214347d45c9cb90a1d Author: Chris Wilson Date: Thu Jan 24 15:06:12 2013 +0000 sna: Refactor to use a common fbComposite fallback Signed-off-by: Chris Wilson commit 8ecfbea9d1f83b2de62bee0f58299e7a90c741d1 Author: Chris Wilson Date: Thu Jan 24 14:46:03 2013 +0000 sna: Experiment with a threaded renderer for fallback compositing Signed-off-by: Chris Wilson commit 778dba90cfc4e801a975bd661c56a565ce60524b Author: Chris Wilson Date: Wed Jan 23 21:32:29 2013 +0000 sna/dri: Don't contribute missed frames to the target_msc Signed-off-by: Chris Wilson commit 50b41cb485ffb38e6bf705a3a62840bb78af669b Author: Chris Wilson Date: Wed Jan 23 21:16:49 2013 +0000 sna/dri: Only reject DRI2 buffers that are too small for the request blit The goal is to reject stale DRI2 buffers that are smaller than the target due to not-yet-handled ConfigureNotify, but not to reject blitting from Windows that are larger than the frontbuffer. Fixes a regression from the overzealous commit b27ecf3059bc066ef59f2a71c1d8d8f0ffec7191 Author: Chris Wilson Date: Mon Nov 12 14:06:06 2012 +0000 sna/dri: Prevent scheduling a swap on stale buffers Signed-off-by: Chris Wilson commit 98b312e579385e6e4adf6bf0abe20f8ca84592af Author: Chris Wilson Date: Wed Jan 23 20:51:35 2013 +0000 sna/dri: Stop feeding I915_TILING_Y to mesa i915c Only i915g handles Y-tiling, and we can't differentiate between the two types of clients. Signed-off-by: Chris Wilson commit 31796400915a06fc789088b7dcfcecd6ea91e195 Author: Chris Wilson Date: Wed Jan 23 19:37:23 2013 +0000 sna: Clean up WAIT_FOR_EVENT on gen2/3 Signed-off-by: Chris Wilson commit ea8148b24d48db4f46205817db8a55dd6ea1a4b3 Author: Chris Wilson Date: Wed Jan 23 17:47:12 2013 +0000 sna/dri: Prefer to use the BLT ring for vsync'ed copies on IVB+ Signed-off-by: Chris Wilson commit 3c3a87a2d4261cbd66602812637328a04787f510 Author: Chris Wilson Date: Wed Jan 23 17:35:50 2013 +0000 sna/gen6: Correct the event definition for secondary pipes for MI_WAIT_FOR_EVENT It helps to wait upon the event we program and enable. References: https://bugzilla.kernel.org/show_bug.cgi Signed-off-by: Chris Wilson commit 88753c5a8c6c9acf086d81828260adf330eebb1a Author: Chris Wilson Date: Wed Jan 23 17:35:50 2013 +0000 sna/gen7: Correct the event definition for secondary pipes for MI_WAIT_FOR_EVENT It helps to wait upon the event we program and enable. References: https://bugzilla.kernel.org/show_bug.cgi Signed-off-by: Chris Wilson commit 2d92d8ec562cb1e6b9dca28074adca670734233c Author: Chris Wilson Date: Tue Jan 22 09:24:04 2013 +0000 sna: Extend rectangular PolyLines to cover corner pixels on ccw paths Reported-by: Joe Peterson Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55484 Signed-off-by: Chris Wilson commit c8817e24a9d97110a961c3803290e38ff5cbfc9a Author: Chris Wilson Date: Tue Jan 22 09:06:50 2013 +0000 sna/gen7: Fix inversion of bool return code from CA pass As we inverted the predicate, we no longer restored the original operation after performing a CA pass - glyph would randomly become white. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 10f549332e315cfe2cc86aadab94a95ae6757c34 Author: Chris Wilson Date: Mon Jan 21 16:48:34 2013 +0000 sna: Free a non-reusable bo if it expires on the flushing list Still no sure just how the bo ends up there, but as there seems to be the occasional malinger, just free it. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit d7f0df27edb20b052ad39beb26a0b1924f432618 Author: Chris Wilson Date: Mon Jan 21 16:34:09 2013 +0000 sna: Use the maximum backlight value if we fail to read the current value Signed-off-by: Chris Wilson commit 46a3a68e60a1d0a598ec8ece81088a4e6491de55 Author: Chris Wilson Date: Mon Jan 21 16:29:30 2013 +0000 sna: Assert that if marked as a scanout it is indeed bound. On further review, the invariant must have been violated earlier, so make the assert earlier. Signed-off-by: Chris Wilson commit 0507d55dd1bc8fedae524a410a9e7b53f1dad920 Author: Chris Wilson Date: Mon Jan 21 16:24:49 2013 +0000 sna: Only add bound scanouts to the scanout list If we never used the bo as an actual scanout it will never have had been moved to the uncached domain and so we can return it back to the system cache. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 5a0bc67ba57cf698e100df617474669ed5d036d6 Author: Chris Wilson Date: Mon Jan 21 11:41:38 2013 +0000 sna: New execbuffer flags for lut-handle and fast-relocs are upstream Now the flags are upstream, we can rely on runtime tests as the interface is now frozen. Signed-off-by: Chris Wilson commit 208ca91a31182e8ddad36e6a735c725362cbd071 Author: Chris Wilson Date: Sun Jan 20 18:02:41 2013 +0000 sna/gen7: Place the vsync commands in the same cacheline Do as told; both the LRI and WAIT_FOR_EVENT need to be in the same cacheline for an unspecified reason. Signed-off-by: Chris Wilson commit 9a3e3abfe9b624af2354c5a69778aee3024fe46c Author: Chris Wilson Date: Sun Jan 20 17:48:31 2013 +0000 sna/gen7: Offset start/end scanlines by one The hardware needs to be programmed with the line before the desired scanline, wrapping around as required. Signed-off-by: Chris Wilson commit e6a64f872bfd026aa1ba1bd44b1298918c819849 Author: Chris Wilson Date: Sun Jan 20 16:59:58 2013 +0000 sna/gen3+: Remove bogus assertion that the vbo in included before finish If we are carrying over a nearly full vbo from one batch to the next, we may indeed finish it prior to writing any new primitives and so the assert is truly bogus. Signed-off-by: Chris Wilson commit 5de919336fc1ba1c4116e18ba0560cdb7b0589f0 Author: Chris Wilson Date: Sun Jan 20 16:36:17 2013 +0000 sna/gen6: Tweak programming scanline values The documentation says that both start/end scanline need to be the line before the desired value, and so to program the first scanline we need to set it to the last scanline. The docs also say that the lower 3 bits are ignored, so tweaked the values programmed accordingly with an extra check that the window is not reduced to 0. Signed-off-by: Chris Wilson commit 2f9ac4e8a17e9d60bbb55c46929c37e92181d804 Author: Chris Wilson Date: Sun Jan 20 15:53:32 2013 +0000 sna/gen3+: And restore non-CA compositing state after the CA pass Signed-off-by: Chris Wilson commit 650c9d5ce80afc1d4c8d9f77f6679f085fa4dc9d Author: Chris Wilson Date: Sun Jan 20 14:58:42 2013 +0000 sna/gen3+: Reset vertex relocation state after discarding the batch Fixes a regression from commit a6ecb6d31d8c543f38fca0be6b0ec82e59dcd8d2 Author: Chris Wilson Date: Wed Jan 16 09:14:40 2013 +0000 sna: Discard the batch if we are discarding the only buffer in it as we may keep a stale relocation for the vertex buffer alive if we attempt to clear the bo using the render engine before discarding it. Signed-off-by: Chris Wilson commit 492952e0d6362a046a666956afdf8f9bc0f2b7e7 Author: Chris Wilson Date: Sun Jan 20 14:55:06 2013 +0000 sna/gen3+: Handle flushing vbo for CA glyphs Signed-off-by: Chris Wilson commit b52c921204df6b2486717fcef05b4a1993aa1071 Author: Chris Wilson Date: Sun Jan 20 14:02:07 2013 +0000 sna: Adapt error detection and handling for invalid batchbuffers Allow the DDX to continue even if the kernel rejects our batchbuffers by disabling hw acceleration - just extends the existing hang detection to also handle the driver producing garbage. Signed-off-by: Chris Wilson commit 8215a278f20d34819536edbda05a108a860fefb9 Author: Chris Wilson Date: Sun Jan 20 12:36:07 2013 +0000 sna/gen3: Always close the vertices for a batch, even if the vbo is empty In the case where we emit a no-op, we may not attempt to finish binding the vbo as it is considered empty. This leaves a stray relocation for the next batch, and also causes it to believe that it has a vbo bound already. Signed-off-by: Chris Wilson commit a88a9b9a59fa2d5fd427fa6e1f74fb9844379264 Author: Chris Wilson Date: Sun Jan 20 12:06:09 2013 +0000 2.20.19 release commit 7822bbacbece6fcb2e12863cd6c7a53ab614c37c Author: Chris Wilson Date: Sun Jan 20 11:43:49 2013 +0000 test: Add script to generate source file for testing vsync Courtesy of an original script by Mark Schreiber, https://bugs.freedesktop.org/show_bug.cgi?id=59606 commit 9329d8755981989ccbe66df6085fbab7c809a2c6 Author: Chris Wilson Date: Sun Jan 20 10:14:21 2013 +0000 sna: Make DEBUG_SYNC a configure option As it is advisable to combined the synchronous rendering debug option with other debugging options, it is more convenient to make it into a configure option: --enable-debug=sync Signed-off-by: Chris Wilson commit c9263f192e2f85dd961bc1c4e9ca8180db874517 Author: Chris Wilson Date: Sun Jan 20 01:39:12 2013 +0000 sna: Apply DEBUG_SYNC prior to emitting error report This is handy for the case where the batch triggers a GPU hang rather than being rejected by the kernel. Signed-off-by: Chris Wilson commit 42ab789cce8423d99864776c6d5ba759c4129b54 Author: Chris Wilson Date: Fri Jan 18 13:56:53 2013 +0000 sna: Clear the non-intersecting damage after skipping the slave update Signed-off-by: Chris Wilson commit 828a3a80aa3f0692e7be2831d58bccf02e2c481d Author: Chris Wilson Date: Fri Jan 18 13:16:23 2013 +0000 uxa: Clip dirty region to slave pixmap before appending damage Fixes regression from commit c789d06cf8a0debc67058d7be1483f5b542e2baa Author: Dave Airlie Date: Mon Jan 7 13:57:21 2013 +1000 intel: fixup damage posting to be done correctly around slave pixmap which causes the entire slave scanout to be readback from uncached memory every time a pixel is modified. Reported-by: Stephen Liang Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=59539 Signed-off-by: Chris Wilson commit e17eaf540b614cdcb8f7349dd01852c3afc5ab05 Author: Chris Wilson Date: Fri Jan 18 13:09:36 2013 +0000 sna: Replace double negative '!RegionNotEmpty' with the equivalent RegionNil Signed-off-by: Chris Wilson commit 2de43a0164ba5364ffd7cb48f0bccc9873e87332 Author: Chris Wilson Date: Fri Jan 18 12:01:54 2013 +0000 sna: Skip an empty slave update Signed-off-by: Chris Wilson commit 38de17f80d780bf219fc3c4018ad9cc8808ba50f Author: Chris Wilson Date: Fri Jan 18 10:16:42 2013 +0000 sna: Remove bogus assertion invalidated by 'read-read' sync If we perform a read-read synchronisation, the kernel may still believe that the bo is busy as it remains on the active lists being read by the GPU. Signed-off-by: Chris Wilson commit 9f68ac60ae37cc72503ec40691d1ae43a476f8e7 Author: Chris Wilson Date: Thu Jan 17 20:00:34 2013 +0000 sna/dri: Explicitly flag sync copies for the backends As gen6/7 need to prevent ring switching and perform a rendercopy if we need to perform a vsync'ed copy. Signed-off-by: Chris Wilson commit 1ee00c408d8142cfaf4202393c2364c9ae73cb6e Author: Chris Wilson Date: Thu Jan 17 13:09:47 2013 +0000 sna/trapezoids: Fix horizontal offset for inplace operation Remember that for an inplace operation we are not dealing with an a8 mask, but rather a x8r8g8b8 surface and so need to step accordingly. Signed-off-by: Chris Wilson commit 0d749f93ea52161e59da1adca1a22e96ba293551 Author: Chris Wilson Date: Thu Jan 17 12:28:18 2013 +0000 sna: Drop the MOVE_WHOLE_HINT for PutImage It is not as clearly beneficial as for GetImage, as for example toolkits may only push the shadows around a window. Signed-off-by: Chris Wilson commit dc643ef753bcfb69685f1eb10828d0c8f830c30e Author: Chris Wilson Date: Thu Jan 17 12:27:55 2013 +0000 sna: Apply read-only synchronization hints for move-to-cpu Signed-off-by: Chris Wilson commit 18035a21e147788bea03ab2175ca03ae951701ce Author: Chris Wilson Date: Thu Jan 17 11:52:10 2013 +0000 sna: Remove the confusion of the pixmap->undamaged This was to track a pixmap that had been used for migration (i.e had in the past been used for mixed rendering). It is no longer used so remove it. Signed-off-by: Chris Wilson commit 46141d277f326ae78f7b0e927a500e0eb1987f1b Author: Chris Wilson Date: Thu Jan 17 10:16:24 2013 +0000 sna: Consider fill style for XPolyRectangle The rectangle outline is not always solid... Signed-off-by: Chris Wilson commit d5c8d38afaba04281157bafe212e93f010ae00f5 Author: Chris Wilson Date: Thu Jan 17 10:10:54 2013 +0000 sna: Refactor to remove a goto from sna_put_zpixmap_blt() The complexity of the function has been moved to move-to-cpu so we can take further advantage of the simplified logic in put_zpixmap to clean up the code by removing an unwanted goto. Signed-off-by: Chris Wilson commit 9552438caa4d295c99a9b8821cf2644739861c6a Author: Colin Walters Date: Wed Jan 4 17:37:06 2012 -0500 autogen.sh: Implement GNOME Build API http://people.gnome.org/~walters/docs/build-api.txt Signed-off-by: Adam Jackson commit 87d773249af18ae8722aacb7306b0eee51a90dbc Author: Adam Jackson Date: Wed Jan 16 13:18:23 2013 -0500 configure: Drop AM_MAINTAINER_MODE Signed-off-by: Adam Jackson commit dbf1cfec9cd4e9efe7650f2940c92b4e51214288 Author: Chris Wilson Date: Wed Jan 16 12:20:48 2013 +0000 2.20.18 release Signed-off-by: Chris Wilson commit 47caffc50b5cdd288ad868fa9a697f0d4e2d28dc Author: Chris Wilson Date: Wed Jan 16 10:49:24 2013 +0000 sna: Restrict upload buffers to reduce sampler TLB misses Signed-off-by: Chris Wilson commit ab36300a22222086b94857f356612106ffbeb480 Author: Chris Wilson Date: Wed Jan 16 09:17:59 2013 +0000 sna: Correct DBG to refer to the actual tiling mode forced Signed-off-by: Chris Wilson commit a6ecb6d31d8c543f38fca0be6b0ec82e59dcd8d2 Author: Chris Wilson Date: Wed Jan 16 09:14:40 2013 +0000 sna: Discard the batch if we are discarding the only buffer in it Signed-off-by: Chris Wilson commit 26db2438e34feb8f28444bf7418869b4ecd870da Author: Chris Wilson Date: Wed Jan 16 09:00:21 2013 +0000 sna: Fix computation of large object sizes to prevent overflow Signed-off-by: Chris Wilson commit 54c1d97d5ab325874e1c7b2639e58111d7a6b93f Author: Chris Wilson Date: Wed Jan 16 09:00:04 2013 +0000 sna: Add DBG for when we add the inplace hint Signed-off-by: Chris Wilson commit 588c5aa6bca441d7c9305fe2fcf268e89b6b617d Author: Chris Wilson Date: Tue Jan 15 22:21:56 2013 +0000 sna: Revert use of a separate CAN_CREATE_SMALL flag Signed-off-by: Chris Wilson commit af85ffdec7047efa452d6bab3a0ee3889dd4f046 Author: Chris Wilson Date: Tue Jan 15 20:37:11 2013 +0000 sna: Avoid serialising on an move-to-cpu for an async operation Signed-off-by: Chris Wilson commit d70be85dc723168a481c1955444afd951c4817bf Author: Chris Wilson Date: Tue Jan 15 20:16:45 2013 +0000 sna: Assert that we never try to mix INPLACE / ASYNC hints for move-to-cpu Signed-off-by: Chris Wilson commit 1287c3a24c277cb42930d8af2943b9f7b016f31d Author: Chris Wilson Date: Tue Jan 15 18:59:15 2013 +0000 sna: Specialise sna_get_image_blt for clears to avoid sync readback Signed-off-by: Chris Wilson commit da4972eec57e662b98a7abced6338ceb8a533a48 Author: Chris Wilson Date: Tue Jan 15 18:34:07 2013 +0000 sna/trapezoids: Avoid the multiply for an opaque source Signed-off-by: Chris Wilson commit 7f968c8c991cff751459939bdb42e14255f529b7 Author: Chris Wilson Date: Tue Jan 15 18:41:00 2013 +0000 sna: Add DBG to use_shm_bo() Signed-off-by: Chris Wilson commit af63fab5047a43716c5df875ddc50f7c877f8a83 Author: Chris Wilson Date: Tue Jan 15 18:21:11 2013 +0000 sna: Hint that a copy from a SHM bo will likely be the last in a batch Signed-off-by: Chris Wilson commit 1be436409222c00ff66c6d747487b77f1037b27a Author: Chris Wilson Date: Tue Jan 15 18:20:29 2013 +0000 sna: Pass the async hint for the upload into the GPU Signed-off-by: Chris Wilson commit 2113f7f440dd2f10e80f0bb3bd5cd155f7e19098 Author: Chris Wilson Date: Tue Jan 15 09:33:03 2013 +0000 sna: Free the SHM pixmaps after b266ae6f6f Since b266ae6f6f protected the static allocations from being reaped in the normal course of events, we need to penetrate those defenses in order to finally free the SHM mappings. Signed-off-by: Chris Wilson commit 441c481630a5cf09a7eb26d5db80b1e60cb2b10f Author: Chris Wilson Date: Tue Jan 15 01:26:19 2013 +0000 sna: Mark uploads with async hints when appropriate Signed-off-by: Chris Wilson commit 6abd442279fd32d1ce9b33a72eabbeb922316151 Author: Chris Wilson Date: Tue Jan 15 00:15:23 2013 +0000 sna: Avoid allocating an active CPU bo unnecessarily If we will not write back the GPU damage to the bo as we intend to overwrite it for the next operation, we can forgo allocating the active CPU bo and skip the synchronisation overhead. Signed-off-by: Chris Wilson commit f235c74cd661970c76e152777e9a2c314a368a56 Author: Chris Wilson Date: Mon Jan 14 15:49:42 2013 +0000 sna: Tweak considering of last-cpu placement for inplace regions Signed-off-by: Chris Wilson commit 70c5e41b519e44e620948d683d3b1111494d2f48 Author: Chris Wilson Date: Mon Jan 14 15:03:59 2013 +0000 sna: Limit temporary userptr uploads to large busy targets or LLC machines Signed-off-by: Chris Wilson commit cf860da1c78244036c59edf934b312cc1367e8aa Author: Chris Wilson Date: Mon Jan 14 12:50:54 2013 +0000 sna: Apply PutImage optimisations to move-to-cpu We can replace the custom heuristics for PutImage by applying them to the common path, where hopefully they are equally valid. Signed-off-by: Chris Wilson commit e4ad4477815abe31b1a2323673da86a6def2f246 Author: Chris Wilson Date: Mon Jan 14 13:12:46 2013 +0000 sna: Use userptr to accelerate GetImage Signed-off-by: Chris Wilson commit 3cc04a8e24f02248b6382c9bc354ea15c42b17b6 Author: Chris Wilson Date: Sun Jan 13 17:34:03 2013 +0000 sna: Initialize src_bo to detect allocation failure sna_accel.c: In function 'sna_put_image': sna_accel.c:3730:18: warning: 'src_bo' may be used uninitialized in this function [-Wmaybe-uninitialized] Signed-off-by: Chris Wilson commit 3f04b0b98d7f861ff58b82c99d33b7eacfcda5f7 Author: Chris Wilson Date: Sun Jan 13 17:31:15 2013 +0000 sna: Check size against aperture before attempting to perform the GTT mapping Signed-off-by: Chris Wilson commit 7a7db06c62228acc6d1c03e800c7afa84e886f5a Author: Chris Wilson Date: Sun Jan 13 13:45:18 2013 +0000 sna: Add a compile flag for measuring impact of userptr uploads Signed-off-by: Chris Wilson commit bcc212dc7a939505a678f97f6700eee99204249f Author: Chris Wilson Date: Sun Jan 13 13:36:09 2013 +0000 sna: Use the pixmap size (not drawable) to determine replacement Signed-off-by: Chris Wilson commit 32f43f618d9b11ea44b3e01a95ac3f239a731ad2 Author: Chris Wilson Date: Sun Jan 13 13:23:24 2013 +0000 sna: Allow large image uploads to utilize temporary mappings Signed-off-by: Chris Wilson commit bf2b2e2f91208412c8b74a95859def501514be43 Author: Chris Wilson Date: Sun Jan 13 12:24:44 2013 +0000 sna: Allow creation of a CPU map for pixmaps if needed Signed-off-by: Chris Wilson commit b266ae6f6f8fb4c494ece532ae4621055e66beb2 Author: Chris Wilson Date: Sun Jan 13 11:30:07 2013 +0000 sna: Relax limitation on not mapping GPU bo with shadow pointers Signed-off-by: Chris Wilson commit a2d82161436e489f23637d793c737bc6950a62b8 Author: Chris Wilson Date: Sun Jan 13 10:17:33 2013 +0000 sna: Correct a few assertions after enabling read-only mappings As these do not flush the active state if we have read-read mappings, we need to be careful with our asserts concerning the busy flag. Signed-off-by: Chris Wilson commit ab01fd696e1137ddfb9a85ae68c15c05900f0e8e Author: Chris Wilson Date: Sat Jan 12 09:17:03 2013 +0000 sna: Experiment with a CPU mapping for certain fallbacks Signed-off-by: Chris Wilson commit 03d392cd1d87e17129c42e4d822d3d1749edb02e Author: Chris Wilson Date: Sat Jan 12 08:51:52 2013 +0000 sna: Tweak max object sizes to take account of aperture restrictions Signed-off-by: Chris Wilson commit d111c464bfbae57bb7141872810c88b88f30c087 Author: Chris Wilson Date: Sat Jan 12 08:15:13 2013 +0000 sna: After a size check, double check the batch before flushing As we may fail the size check with an empty batch and a pair of large bo, we need to check before submitting that batch in order to not run afoul of our internal sanity checks. Signed-off-by: Chris Wilson commit ec77a07b41f1062b941774f3782b51d21e7824dd Author: Chris Wilson Date: Fri Jan 11 11:40:57 2013 +0000 sna/dri: Prefer to preserve the ring of the destination bo Signed-off-by: Chris Wilson commit 42f1026e11527cb62b4522b44e71a4e72582a876 Author: Chris Wilson Date: Fri Jan 11 11:40:16 2013 +0000 sna: Reorder struct kgem_bo to move related data into the same cacheline Signed-off-by: Chris Wilson commit aead71051ed757e7565d395c858bf8ab8f0b0ff6 Author: Chris Wilson Date: Fri Jan 11 01:30:43 2013 +0000 sna: Disable memcpy_to_tiled_x() uploads on 32-bit systems It's far too slow due to the register starved instruction set producing attrocious code and the extra overhead in the kernel for managing memory mappings. Signed-off-by: Chris Wilson commit 220970b1a484e283e2bbb44f79df613ce1ee1146 Author: Chris Wilson Date: Thu Jan 10 19:43:05 2013 +0000 sna: Also prefer to use the GPU for uploads into a tiled bo Signed-off-by: Chris Wilson commit 672e59851c427c63f43cde7dfd1688a72100e3b3 Author: Chris Wilson Date: Thu Jan 10 19:35:29 2013 +0000 sna: Prefer userptr if copying to a tiled bo Signed-off-by: Chris Wilson commit 441ef916ae6569c88b3d6abaf7fea4d69be49d76 Author: Chris Wilson Date: Thu Jan 10 19:14:21 2013 +0000 intel: Throttle harder Filling the rings is a very unpleasant user experience, so cap the number of batches we allow to be inflight at any one time. Interestingly, as also found with SNA, throttling can improve performance by reducing RSS. However, typically throughput is improved (at the expense of latency) by oversubscribing work to the GPU and a 10-20% slowdown is commonplace for cairo-traces. Notably, x11perf is less affected and in particular application level benchmarks show no change. Note that this exposes another bug in libdrm-intel 2.4.40 on gen2/3. Signed-off-by: Chris Wilson commit a37d56f338c5fae832d5eeea1283b6dbde827678 Author: Chris Wilson Date: Thu Jan 10 16:28:24 2013 +0000 sna: Use some surplus bits to back our temporary pixman_image_t Signed-off-by: Chris Wilson commit 09ea1f4402b3bd0e411b90eb5575b3ff066d7356 Author: Chris Wilson Date: Thu Jan 10 16:26:24 2013 +0000 sna: Prefer to use the GPU for copies from SHM onto tiled destinations Signed-off-by: Chris Wilson commit c63147a3c33fd26f5c04a8648881659b4a90df06 Author: Chris Wilson Date: Thu Jan 10 15:15:15 2013 +0000 sna: Allow CPU bo to copy to GPU bo if the device is idle. Signed-off-by: Chris Wilson commit 2933e7595838c28081810d4959ca1e005a0419e1 Author: Chris Wilson Date: Thu Jan 10 13:07:19 2013 +0000 sna: Ignore the last pixmap cpu setting if overwritting all damage Signed-off-by: Chris Wilson commit 934ea64f7ff080b00d00c50ba94f63247d7bb130 Author: Chris Wilson Date: Thu Jan 10 13:06:06 2013 +0000 sna: With a GPU bo and a shm source, do not fall all the way back The normal source upload into GPU bo knows a few more tricks that we may want to apply first before copying into the shadow of the GPU bo. Signed-off-by: Chris Wilson commit 8a8edfe4076ee08558c76eddbb68426e4563888c Author: Chris Wilson Date: Thu Jan 10 03:31:37 2013 +0000 sna: Make sure all outputs are disabled if no CompatOutput is defined If we have to fallback and the configuration is wonky, make sure that all known outputs are disabled as we takeover the console. Signed-off-by: Chris Wilson commit 5449e16c0c2b6ca5af4acf42703164b9d2b2d822 Author: Chris Wilson Date: Thu Jan 10 02:54:41 2013 +0000 sna: Open-code xf86CompatOutput() to avoid invalid pointers config->compat_output needs to be sanitized during device initialization or we may dereference an invalid xf86OutputPtr. Signed-off-by: Chris Wilson commit 8881a14200580db731ca6902b289b08989aaa61e Author: Mickaël THOMAS Date: Mon Jan 7 20:47:51 2013 +0100 Set initial value for backlight_active_level If the "Backlight" option is set, backlight_active_level is not set which results in a default value of 0, causing a black screen upon starting Xorg. commit b8c9598294eaa16e0d1578ad98896f6ec5ba37cf Author: Chris Wilson Date: Mon Jan 7 13:57:21 2013 +1000 sna: fixup damage posting to be done correctly around slave pixmap Copied from commit c789d06cf8a0debc67058d7be1483f5b542e2baa Author: Dave Airlie Date: Mon Jan 7 13:57:21 2013 +1000 This fixes the damage posting to happen in the correct ordering, not sure if this fixes anything, but it should make things more consistent. commit c789d06cf8a0debc67058d7be1483f5b542e2baa Author: Dave Airlie Date: Mon Jan 7 13:57:21 2013 +1000 intel: fixup damage posting to be done correctly around slave pixmap This fixes the damage posting to happen in the correct ordering, not sure if this fixes anything, but it should make things more consistent. Signed-off-by: Dave Airlie commit 5891c89ff2be277d1a833d4bc092b65184c1f3d6 Author: Dave Airlie Date: Mon Jan 7 13:54:47 2013 +1000 intel: drop pointless error printf in the slave pixmap sync code. This is left over and spams logs, get rid. Signed-off-by: Dave Airlie commit 27550e81482229007fa9e0e9769fdd20f3616b23 Author: Chris Wilson Date: Sun Jan 6 17:29:19 2013 +0000 sna/dri: Transfer the DRI2 reference to the new TearFree pixmap Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58814 Signed-off-by: Chris Wilson commit 1a5e4fb725da2eb25cf7f476290c02e9880a4efc Author: Chris Wilson Date: Sun Jan 6 17:08:56 2013 +0000 sna: Only disable upon a failed pageflip after at least one pipe flips If we have yet to update a pipe for a pageflip, then the state remains consistent and we can fallback to a blit without disabling any pipes. If we fail after flipping a pipe, then unless we disable an output the state becomes inconsistent (the pipes disagree on what the attached fb is). Signed-off-by: Chris Wilson commit dd66ba8e5666a1ce7da0ddc226d074f591e1fa22 Author: Chris Wilson Date: Sun Jan 6 16:13:56 2013 +0000 sna: Try to create userptr with the unsync'ed flag set first Signed-off-by: Chris Wilson commit 9051f43fa3c8d011921ac6ff75b763280f26d98f Author: Chris Wilson Date: Sun Jan 6 15:20:14 2013 +0000 sna/gen4+: Handle solids passed to the general texcoord emitter The general texcoord emitter does handle solids (for the case of a transformed mask) and so we need to be careful to setup the VERTEX_ELEMENTS accordingly. Fixes regression from commit 2559cfcc4cbc1d0d84b048565cad3bfee61df8da Author: Chris Wilson Date: Wed Jan 2 10:22:14 2013 +0000 sna/gen4+: Specialise linear vertex emissio Signed-off-by: Chris Wilson commit 4af910e8be92e0ca241ce1e93e322c712dcbe340 Author: Chris Wilson Date: Sun Jan 6 13:43:55 2013 +0000 sna/gen4+: Trim the redundant float from the fill vertices Signed-off-by: Chris Wilson commit 3244e4b23397f54ca76876dd76ebea9a0abd357e Author: Chris Wilson Date: Sun Jan 6 13:24:23 2013 +0000 Revert "sna/gen4+: Backport tight vertex packing for simple renderblits" This reverts commit 8ff76fad1fadc5e309f9a12c30f883460a432049 and commit 48e4dc4bd4b2980f0f804f572d0e3fc1bb4bc21e. I forgot gen4 and gen5 do not have the 'non-normalized' bit in their sampler states. commit d3be77f87916e38af717bafaf2000becd5180d76 Author: Chris Wilson Date: Sat Jan 5 18:07:50 2013 +0000 sna/trapezoids: filter out cancelling edges upon insertion to edge-list Signed-off-by: Chris Wilson commit 2b4a2f52c47a24c297312d51f9a8299c9a54a697 Author: Chris Wilson Date: Sat Jan 5 17:21:34 2013 +0000 sna/trapezoids: filter out zero-length runs Signed-off-by: Chris Wilson commit 59a7b8b32c694735942fd7e42c1382d91004b0b1 Author: Chris Wilson Date: Fri Jan 4 18:22:14 2013 +0000 sna: Clear up the caches after handling a request allocation failure Signed-off-by: Chris Wilson commit 3c31a9fc210221ba8e7922bec80c15ec39cab7bc Author: Chris Wilson Date: Fri Jan 4 18:11:12 2013 +0000 sna: Embed the pre-allocation of the static request into the device So that in the cache where we are driving multiple independent screens each having their own device, we do not share the global reserved request in the event of an allocation failure. Signed-off-by: Chris Wilson commit b5b3cfb0ad1cc5e66c99035f526946bf41011e13 Author: Chris Wilson Date: Thu Jan 3 23:33:44 2013 +0000 sna: Flush the batch prior to referencing work from another ring In the case where the kernel is inserting semaphores to serialise work between rings, we want to only delay the surface that is coming from the other ring and not interfere with work already queued. Signed-off-by: Chris Wilson commit ea2da97773d858001f98adc880f24b9671c51b2f Author: Chris Wilson Date: Thu Jan 3 16:47:14 2013 +0000 sna: Convert allocation request from bytes to num_pages when shrinking Signed-off-by: Chris Wilson commit 2bd6e4dcd43bb0d836f12232050e73ce1510bb0f Author: Chris Wilson Date: Thu Jan 3 16:38:33 2013 +0000 sna: Add a pair of asserts to validate fls()/cache_bucket() Signed-off-by: Chris Wilson commit f9d2730974a869f15eac599ca865b50a9a9658d9 Author: Chris Wilson Date: Thu Jan 3 15:20:45 2013 +0000 sna: Also recognise __i386__ for fls asm Signed-off-by: Chris Wilson commit 69dde74a003ba0168ceca1558a4cb69097421b92 Author: Chris Wilson Date: Thu Jan 3 15:20:23 2013 +0000 sna: Fix off-by-one in C version of fls Signed-off-by: Chris Wilson commit fc702cdf534a4694a64408428e8933497a7fc06e Author: Matt Turner Date: Wed Jan 2 16:07:54 2013 +0000 sna: Rewrite __fls without dependence upon x86 assembly The asm() prevents SNA from compiling on ia64. Fixes https://bugs.gentoo.org/show_bug.cgi?id=448570 commit bc67bdcec832f4302951f2789456666dee2f496c Author: Chris Wilson Date: Wed Jan 2 13:47:51 2013 +0000 sna/gen6+: Fine tune placement of DRI copies Avoid offsetting the overhead of the render copy only to be penalised by the overhead of the semaphore. So compromise. Signed-off-by: Chris Wilson commit 2559cfcc4cbc1d0d84b048565cad3bfee61df8da Author: Chris Wilson Date: Wed Jan 2 10:22:14 2013 +0000 sna/gen4+: Specialise linear vertex emission Signed-off-by: Chris Wilson commit 0996ed85fd8bd79f41f28908733b85566f9e2b69 Author: Chris Wilson Date: Tue Jan 1 22:53:26 2013 +0000 sna/gen2+: Precompute the affine transformation scale factors Signed-off-by: Chris Wilson commit d36cae801f1dcb06d4f93f2f27cc9b9de73e89c9 Author: Chris Wilson Date: Tue Jan 1 21:03:06 2013 +0000 sna/gen4+: Tidy special handling of 2s2s vertex elements Signed-off-by: Chris Wilson commit 8582c6f0bbe1bf01324b46933ff2f50c65f2a82d Author: Chris Wilson Date: Tue Jan 1 20:53:12 2013 +0000 sna/gen6+: Remove vestigial CC viewport state Signed-off-by: Chris Wilson commit 24264af2912f9abae5aff2a6fb5a50383d9e33be Author: Chris Wilson Date: Tue Jan 1 20:39:23 2013 +0000 sna: Fast path inplace addition of solid trapezoids Signed-off-by: Chris Wilson commit e9a9f9b02978cb2d73c38163827eb7141ebed16c Author: Chris Wilson Date: Tue Jan 1 16:40:28 2013 +0000 sna: Micro-optimise glyph_valid() Note that this requires fixing up the glyph->info if the xserver didn't create a GlyphPicture. Signed-off-by: Chris Wilson commit 372c14aae8f4fd2c5865b9d23cd825dcbc33765f Author: Chris Wilson Date: Tue Jan 1 15:49:12 2013 +0000 sna: Remove some obsolete Options Throttling and delayed-flush are now redundant. Signed-off-by: Chris Wilson commit 65924da91da4bb617df1bb0a7c3e9d4aa475b6b1 Author: Chris Wilson Date: Tue Jan 1 11:40:15 2013 +0000 sna: Tidy compat interfaces Signed-off-by: Chris Wilson commit 0a35d9287397031c95ebd9dc53b68e33e7dcf092 Author: Chris Wilson Date: Tue Jan 1 11:12:02 2013 +0000 sna/gen2: Always try to use the BLT pipeline first Signed-off-by: Chris Wilson commit c1457fbd8a169ee19c8e625ea4e779180eb4b070 Author: Chris Wilson Date: Tue Jan 1 10:49:27 2013 +0000 sna/gen2: Tidy a pair of vertex emitters Switch to the new inline scaled transforms. Signed-off-by: Chris Wilson commit 48a5797c0f227204d0723de0ef34b046964c571e Author: Chris Wilson Date: Mon Dec 31 17:30:40 2012 +0000 sna/gen4: Tweak single-thread SF w/a for solids Allow multiple threads for the rare case of compositing with a solid color. Signed-off-by: Chris Wilson commit e4f6ba6b47c41645a40e314f14047ba0b5f93a01 Author: Chris Wilson Date: Mon Dec 31 14:06:36 2012 +0000 sna/gen6+: Hint that we prefer to use the BLT with uncached scanouts Once again balancing the trade-off of faster smaller copies with the BLT versus the faster larger copies the RENDER ring. Signed-off-by: Chris Wilson commit 6e87e7ddfe0c21e0fb6b3c2cb940a40aa7d4e061 Author: Chris Wilson Date: Mon Dec 31 14:03:16 2012 +0000 sna/dri: Use the default choice of backend for copying the region Notably, if everything is idle, using the BLT is a win as we can emit them so much faster than a rendercopy, and as the target is uncached we do not benefit as much from the rendercache. Signed-off-by: Chris Wilson commit a7988bf77f5a106a48b6e39b6eaf60ef2f8bec11 Author: Chris Wilson Date: Sun Dec 30 14:50:49 2012 +0000 sna/dri: Fix triple buffering to not penalise missed frames Signed-off-by: Chris Wilson commit 736b89504a32239a0c7dfb5961c1b8292dd744bd Author: Chris Wilson Date: Sun Dec 30 10:32:18 2012 +0000 uxa: Align surface allocations to even tile rows Align surface sizes to an even number of tile rows to cater for sampler prefetch. If we read beyond the last page we may catch the PTE in a state of flux and trigger a GPU hang. Also detected by enabling invalid PTE access checking. References: https://bugs.freedesktop.org/show_bug.cgi?id=56916 References: https://bugs.freedesktop.org/show_bug.cgi?id=55984 Signed-off-by: Chris Wilson commit 43336c632beb5d599ec0fc614434b88ef7a26422 Author: Chris Wilson Date: Sat Dec 29 16:47:53 2012 +0000 sna: Seed the solid color cache with an invalid value to prevent false hits After flushing, we *do* need to make sure we cannot hit a false lookup via the last cache. Signed-off-by: Chris Wilson commit f6050382095c3bc4f78bc4ff9e9c6086e58d6b28 Author: Chris Wilson Date: Sat Dec 29 16:41:03 2012 +0000 sna/dri: Gracefully handle failures from pageflip Signed-off-by: Chris Wilson commit 1c2ece369177ea6c3fd2f254b2554ceadf5590de Author: Chris Wilson Date: Sat Dec 29 15:53:23 2012 +0000 sna/gen4+: Try using the BLT before doing a tiled copy Signed-off-by: Chris Wilson commit 09ca8feb3455c979e799ddf26daae8f2de2813e1 Author: Chris Wilson Date: Sat Dec 29 15:42:02 2012 +0000 sna: Move the primary color cache into the alpha cache Signed-off-by: Chris Wilson commit 8c56c9b1da9e078bd5b7ff4ebc5d8b23f593d500 Author: Chris Wilson Date: Sat Dec 29 14:14:41 2012 +0000 sna: Allow a flush to occur before batching a flush-bo Signed-off-by: Chris Wilson commit 2f53fb389c001f68134f514e30e25e91de41fb9d Author: Chris Wilson Date: Fri Dec 28 22:58:02 2012 +0000 sna: DBG compile fixes Signed-off-by: Chris Wilson commit dba83dacd2ccbb2ac23b205ce2a872a889fa30bd Author: Chris Wilson Date: Fri Dec 28 19:23:36 2012 +0000 sna/gen3: Use inline transform+scale function So as to avoid reading back from the vbo (which may be wc mapped). Signed-off-by: Chris Wilson commit f0fca544b0602bc4ed2f68e8d260e0a3745b4bad Author: Chris Wilson Date: Fri Dec 28 18:52:44 2012 +0000 sna/gen4+: Check for a spare exec slot for an outstanding vbo Signed-off-by: Chris Wilson commit c6e850b626f4bb44876c683d596ea38f8f6c30ae Author: Chris Wilson Date: Fri Dec 28 17:14:52 2012 +0000 sna/gen4+: Trim an extraneous coordinate from solid composite emission Signed-off-by: Chris Wilson commit 3fdc9923447538ed65bf9ffa189d7290ce804730 Author: Chris Wilson Date: Fri Dec 28 17:14:52 2012 +0000 sna/gen4+: Trim an extraneous coordinate from solid span emission Signed-off-by: Chris Wilson commit fdd6d222bc92b3e385f5d62f5e03dfd86f290e45 Author: Chris Wilson Date: Fri Dec 28 17:08:00 2012 +0000 sna/gen4+: Tidy emit_spans_affine() gcc produced abysmal code for the inlined emission, so hand unroll it for sanity. Signed-off-by: Chris Wilson commit 5d222d4d21e6e3af5316728e0da49a014e9fea21 Author: Chris Wilson Date: Fri Dec 28 17:08:00 2012 +0000 sna/gen4+: Tidy emit_spans_solid() gcc produced abysmal code for the inlined emission, so hand unroll it for sanity. Signed-off-by: Chris Wilson commit 4528f68eff33a5c2f9c1d884e9b3f7228053e0f4 Author: Chris Wilson Date: Fri Dec 28 16:45:50 2012 +0000 sna: Only allocate a busy CPU bo for a GPU readback Signed-off-by: Chris Wilson commit 99fdd1a1c6aa52688c2c821a90f86700b7ee34b2 Author: Chris Wilson Date: Fri Dec 28 16:33:59 2012 +0000 sna: Mark kgem_bo_retire() as static The exported function is not used, so mark it static and strengthen the assertions. Signed-off-by: Chris Wilson commit 548d284b8cf8cc2b311efe3287e0ae956738189a Author: Chris Wilson Date: Fri Dec 28 14:49:38 2012 +0000 sna: Skip copying fbcon if we are already on the scanout If we are already the scanout, then there is little point copying to ourselves... Should be paranoia. Signed-off-by: Chris Wilson commit 583efd4ba067a0a4319e43ebc18dd81ed9c8db0a Author: Chris Wilson Date: Thu Dec 27 17:59:59 2012 +0000 sna: Sanity check config->compat_output In a headless setup this may be left initialised to -1. Signed-off-by: Chris Wilson commit 7725df8aa1b3eab97618311e3f24769a318bd804 Author: Chris Wilson Date: Thu Dec 27 14:01:59 2012 +0000 sna/gen2,3: Remove gen-specific vertex_offset Remove the duplication of vertex_offset in favour of the common vertex_offset. Signed-off-by: Chris Wilson commit 46af1ff126f3fb1f9470b0cbb19c7c2b09d5b92a Author: Chris Wilson Date: Thu Dec 27 00:40:08 2012 +0000 sna/gen6+: Tidy up ring preferences Remove a few duplicated tests. Signed-off-by: Chris Wilson commit dd5b653aa2c5fe2e062533db35c83a40c1952ea6 Author: Chris Wilson Date: Thu Dec 27 09:54:35 2012 +0000 sna: Do not try and set a 0x0 mode Signed-off-by: Chris Wilson commit 861c2362dd38d7d43fe7ffb181cb197199a1c570 Author: Chris Wilson Date: Wed Dec 26 14:12:42 2012 +0000 sna/gen6+: Tweak to only consider active ring on destination Otherwise we decide to use BLT when hitting the render/sampler cache is preferrable for a source bo. Signed-off-by: Chris Wilson commit f9b6aa3aaf784f9149e091a646673ddf341cd7ca Author: Chris Wilson Date: Wed Dec 26 13:05:52 2012 +0000 sna: Explicitly track self-relocation entries Avoid having to walk the full relocation array for the few entries that need to be updated for the batch buffer offset. Signed-off-by: Chris Wilson commit 90b1b220ee7a3c543301956b01c54a4a04632db4 Author: Chris Wilson Date: Wed Dec 26 12:51:58 2012 +0000 2.20.17 release Signed-off-by: Chris Wilson commit 52fd223fc970118cbdcb31f9574414debc905e9c Author: Chris Wilson Date: Fri Dec 21 21:36:30 2012 +0000 sna/video: Initialise alignment for video ports > 0 We repeatedly set the alignment value on the first port, rather than once for each. Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 3793ccf7804cfc870b46c623dfeefbe0c381c1d4 Author: Chris Wilson Date: Fri Dec 21 14:48:07 2012 +0000 sna: Remove assertions that the pixmap is wholly defined when uploading As the user may only write to a portion of a pixmap (thus only creating a small amount of damage) and then attempt to use the whole as a source, we run the risk of triggering an assertion that the whole was defined. Signed-off-by: Chris Wilson commit 07dde33a4f51941b4f612823ea6ea7ca01a6efbc Author: Chris Wilson Date: Fri Dec 21 14:35:32 2012 +0000 sna: Remove a pair of stale assertions For gen2-5, it does not matter what mode the batch is in when we insert the scanline wait. With the more aggressive batch flushing, and relaxed assigned of mode for those generations, we are likely to see that the batch is idle when we go to insert the waits. Signed-off-by: Chris Wilson commit bdd0cca4e1192df0038621925c4e6243ba419a81 Author: Chris Wilson Date: Fri Dec 21 14:20:23 2012 +0000 sna: Refactor test for a rotation matrix Signed-off-by: Chris Wilson commit 347c5a7b33729f1bedd408d2ef24756d51b66f1d Author: Chris Wilson Date: Fri Dec 21 10:40:47 2012 +0000 sna/dri: Refactor get_current_msc between blit/flip paths Signed-off-by: Chris Wilson commit 8a67d3f808fcc7c8c51553b1703e8312f28b87a1 Author: Chris Wilson Date: Fri Dec 21 10:21:06 2012 +0000 sna/dri: Set the correct current_msc for the no readback path If we are asked to render immediately, then in order to pass the tests when comparing it to target, we need to set the current_msc to the ultimate future value, -1. Signed-off-by: Chris Wilson commit 48e4dc4bd4b2980f0f804f572d0e3fc1bb4bc21e Author: Chris Wilson Date: Thu Dec 20 21:54:25 2012 +0000 sna/gen4: Backport tight vertex packing of renderblits Signed-off-by: Chris Wilson commit 08d2b073692836aa22f65f8ba30db5d14550c03e Author: Chris Wilson Date: Thu Dec 20 21:30:32 2012 +0000 sna/gen4: Backport more recent state tracking tweaks Signed-off-by: Chris Wilson commit 8ff76fad1fadc5e309f9a12c30f883460a432049 Author: Chris Wilson Date: Thu Dec 20 20:57:40 2012 +0000 sna/gen5: Backport tight vertex packing for simple renderblits Signed-off-by: Chris Wilson commit 9144c951915a1e0c1899a72161f9f0f1ab9b9ac4 Author: Chris Wilson Date: Fri Dec 21 09:44:52 2012 +0000 sna/dri: Avoid querying the current-msc with swapbbufers wait disabled Signed-off-by: Chris Wilson commit 84c327e17f68c4a56fcb76be1f45ab6d35291b5d Author: Chris Wilson Date: Thu Dec 20 19:44:46 2012 +0000 sna/video: Assert that the frame is initialised References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 4d750219925cb3199ebc6751cdbd2862dfb4cdfe Author: Chris Wilson Date: Thu Dec 20 19:34:41 2012 +0000 uxa/dri: Correct the destination of the blit after chained flip is broken Signed-off-by: Chris Wilson commit ca5c028c2b4d9bf02002acd484054fe427ea8d09 Author: Chris Wilson Date: Thu Dec 20 19:31:44 2012 +0000 glamor: Release the drawable after passing to glamor_push_pixels An unlikely path, but a double prepare instead of a prepare/finish. Signed-off-by: Chris Wilson commit de2de36049e2958a60f63fadffe8f54de8da1e56 Author: Chris Wilson Date: Thu Dec 20 19:29:31 2012 +0000 sna: Check the correct variable for a failed allocation Having already checked 'dst' and just allocated 'src', that is who we should be checking. Signed-off-by: Chris Wilson commit deb908fda74541fba649349db279715b05d0554e Author: Chris Wilson Date: Thu Dec 20 19:22:32 2012 +0000 intel: ODEV_ATTRIB_PATH is no longer printed, so kill the temporary variable Signed-off-by: Chris Wilson commit 0f84ecfc3cd7dfe7f43ff99a6498d2ceccd90225 Author: Chris Wilson Date: Thu Dec 20 12:00:00 2012 +0000 sna/gen4+: Amalgamate all the gen4-7 vertex buffer emission Having reduced all the vb code for these generations to the same set of routines, we can refactor them into a single set of functions. Signed-off-by: Chris Wilson commit 1f4ede0ef8f8a8d07e11781ad05617ecdfcd3faf Author: Chris Wilson Date: Wed Dec 19 20:39:10 2012 +0000 sna: Do not throttle before move-to-cpu The idea being that when creating a surface to perform inplace rasterisation, we won't be using the GPU for a while and so give it time to naturally throttle. Signed-off-by: Chris Wilson commit 5deba2832dc42072d9abaeaa7934bc0e1b28b3ed Author: Chris Wilson Date: Wed Dec 19 20:03:33 2012 +0000 sna: Ignore throttling during vertex close Signed-off-by: Chris Wilson commit f91a24fdba517c8e9df5a074db2c789fbf066bb3 Author: Chris Wilson Date: Thu Dec 20 09:46:32 2012 +0000 sna/video: Remove XvMCScreenInitProc The symbols disappears without warning in xorg-1.14 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=58552 Signed-off-by: Chris Wilson commit ee99511846a0f10abeeba8d25d8fb5bf59621b02 Author: Chris Wilson Date: Wed Dec 19 18:02:50 2012 +0000 sna/gen4+: Tweak preference of GPU placement for spans If the CPU bo is busy, make sure we do not stall for an inplace operation. Signed-off-by: Chris Wilson commit bfd96b092db5e4e0fc2446752deafd1156cf37b3 Author: Chris Wilson Date: Tue Dec 18 20:54:33 2012 +0000 sna/video: Fix presentation of cropped sprites Signed-off-by: Chris Wilson commit 2df1b1abf0728f28d2803a096f945779cbe7c70b Author: Chris Wilson Date: Tue Dec 18 16:07:26 2012 +0000 sna/video: Fix up copying cropped textured video packed data Simply ignore the cropping and copy the whole plane rather than complicate the computation of the packed destination pixels. Signed-off-by: Chris Wilson commit 8d523fa824dcb1987557164d048711c1745de378 Author: Chris Wilson Date: Tue Dec 18 16:07:26 2012 +0000 sna/video: Fix up destination offset for copying cropped textured video planes Oh fun. Textured video expects the source content to be relative to the origin, whereas overlay video expects the source at the origin. Signed-off-by: Chris Wilson commit 7bb4573fcc2cf1b8b6bff5d885a2fa81200d2fd7 Author: Chris Wilson Date: Tue Dec 18 15:48:21 2012 +0000 sna/video: Fix up the image size for copying Yikes, setting image.x2 == image.x1 meant no data was copied whilst the video was clipped. Signed-off-by: Chris Wilson commit 551b400377ddc5eb1e89b8b5827a42e810c8d23d Author: Chris Wilson Date: Tue Dec 18 15:14:00 2012 +0000 sna/video: Amalgamate the computation of source vs dest offsets Signed-off-by: Chris Wilson commit d96a226cc59c641c10153ae3a086a5138c852423 Author: Chris Wilson Date: Tue Dec 18 14:26:18 2012 +0000 sna/video: Fix adjustment of drawable vs source origin wrt to clip Signed-off-by: Chris Wilson commit 79cb6304e983514dd754065e65e2381a903f9bd6 Author: Chris Wilson Date: Tue Dec 18 13:49:59 2012 +0000 sna/xvmc: Clean up to avoid crash'n'burn Signed-off-by: Chris Wilson commit 0d26082303f3f4006ce4974d402c560613081b23 Author: Chris Wilson Date: Tue Dec 18 10:54:28 2012 +0000 sna: Prefer the GPU once again for PolyPoint Signed-off-by: Chris Wilson commit 0e0a2d300633122d6d0f6f82ff110f513b4e64d7 Author: Chris Wilson Date: Tue Dec 18 10:27:04 2012 +0000 sna/gen7: Mark the ring switch before checking bo As we may do a batch submission due to the change of mode. Signed-off-by: Chris Wilson commit f522fbe7c98ffad86126c3666b2d9f7e616480b8 Author: Chris Wilson Date: Mon Dec 17 23:04:25 2012 +0000 sna: Refine check for an unset context switch So it appears that we end up performing a context switch on an empty batch, but already has a mode. This is caught later, too late, by assertions. However, we can change the guards slightly to prevent those assertions without altering the code too greatly. And I can then think how to detect where we are setting a mode on the batch but doing no work - which is likely masking a bigger bug. Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 6c50cf4809816dbbd93d54f589a79b0dab996180 Author: Chris Wilson Date: Mon Dec 17 22:27:14 2012 +0000 sna: Untangle the confusion of caching large LLC bo We only use a single cache for very large buffers, so we need to be careful that we set the tiling on them. More so, we need to take extra care when allocating large CPU bo from that cache to be sure that they are untiled and the flags are true. Signed-off-by: Chris Wilson commit e474abea7cf761e78e777db07b41ec99c0b6f59f Author: Chris Wilson Date: Mon Dec 17 15:38:04 2012 +0000 sna: Promote pinned-batches to run-time detection Now that the feature has been committed upstream, we can rely on the runtime detection. Signed-off-by: Chris Wilson commit 4d7e3a9123cf41d2dd97c0a8a0d461c189064822 Author: Chris Wilson Date: Mon Dec 17 12:34:05 2012 +0000 uxa: Fix copy'n'paste of false not FALSE Bugzilla; https://bugs.freedesktop.org/show_bug.cgi?id=58406 Signed-off-by: Chris Wilson commit 7a4d1136bd09bfd4d2657c0b1b64d553eeb6ed4f Author: Chris Wilson Date: Mon Dec 17 09:41:47 2012 +0000 sna/video: Pass along the video source offset Fortunately nobody had yet noticed that all videos were assumed to play with a matching src/dst origin. Signed-off-by: Chris Wilson commit dfe9d18f9f97a77ceeb410307010424c789c8bd1 Author: Chris Wilson Date: Mon Dec 17 01:06:57 2012 +0000 sna: Limit the default upload buffer size to half the cpu cache This seems to help with small slow caches. Signed-off-by: Chris Wilson commit 5b0572503eab235bc7eff20d369241330c41e630 Author: Chris Wilson Date: Sun Dec 16 23:04:55 2012 +0000 sna: Enable support for opting out of the kernel CS workaround Keeping a set of pinned batches in userspace is considerably faster as we can avoid the blit overhead. However, combining the two approaches yields even greater performance, as fast as without either w/a, and yet stable. Signed-off-by: Chris Wilson commit 805f78addf3ffb36c736df680806cf722b18fea9 Author: Chris Wilson Date: Sun Dec 16 22:04:54 2012 +0000 sna: Try to reuse pinned batches by inspecting the kernel busy status Signed-off-by: Chris Wilson commit f1aec676810c4a4c180b342d9a83254e08dd55da Author: Chris Wilson Date: Sun Dec 16 17:37:32 2012 +0000 sna: Precompute the base set of batch-flags This is to make it easier to extend in future. Signed-off-by: Chris Wilson commit c7ac12003bd0c7d85fa47d43ee2734b222d84a61 Author: Chris Wilson Date: Sun Dec 16 15:28:24 2012 +0000 sna: Only flush at the low fence wm if idle Signed-off-by: Chris Wilson commit 4580bbeac0051417cb03f272112b0cfe697e31b3 Author: Chris Wilson Date: Sun Dec 16 15:00:21 2012 +0000 intel: Support debugging through AccelMethod Ease debugging by allowing all acceleration or render acceleration to be disabled through AccelMethod: Option "AccelMethod" "off" -> disable all acceleration Option "AccelMethod" "blt" -> disable render acceleration (only use BLT) Signed-off-by: Chris Wilson commit 58770b7d6401d2d81f7fee1c8c0e788d44149712 Author: Chris Wilson Date: Sun Dec 16 14:59:03 2012 +0000 man: Describe Option "AccelMethod" Signed-off-by: Chris Wilson commit 83609af3681fad58af88387077bf7ce0c001a1da Author: Chris Wilson Date: Sun Dec 16 10:53:26 2012 +0000 sna: Tweak the idle SHM CopyArea path to also replace a busy GPU bo Signed-off-by: Chris Wilson commit 6490585f65bde487da7bc41fa5cb1c5a028d0bf4 Author: Chris Wilson Date: Sat Dec 15 23:26:30 2012 +0000 sna: Do not force use of the GPU for a copy from a SHM pixmap As we will undoubtably flush and sync upon the SHM request very shortly afterwards, we only want to use the GPU for the SHM upload iff it is currently busy. Signed-off-by: Chris Wilson commit 3a08f091875f2f0f49697ba9852077094b3a704b Author: Chris Wilson Date: Sat Dec 15 22:53:44 2012 +0000 sna/gen6+: Tweak prefer-blt-bo Split the decision between where it is imperative to use the BLT to avoid TLB misses and the second case where it is merely preferential to witch. Signed-off-by: Chris Wilson commit ac9ef1fc606e87b48baa47be22bf828dcfe6659f Author: Chris Wilson Date: Sat Dec 15 20:49:56 2012 +0000 sna/gen6+: Keep the bo on its current ring Track the most recent ring each bo is executed on, and prefer to keep it on that ring for the next operation. Signed-off-by: Chris Wilson commit 15ccb7148d15d776a661c1b8c5b9b2360fcae4ad Author: Chris Wilson Date: Sat Dec 15 20:07:56 2012 +0000 sna/gen6+: Apply the is_scanout to the key not value in the binding cache Oops, we never managed to reuse the cached location of the target surface as we entered it into the cache with the wrong key. Signed-off-by: Chris Wilson commit fde25b08922d97ca0d4a69c654bf690edbd53b3d Author: Chris Wilson Date: Sat Dec 15 18:59:53 2012 +0000 sna/trapezoids: Add another inline hint cell_list_alloc() is only called from one place, and the compiler should already be inlining it - but does not appear to be. Hint harder. Signed-off-by: Chris Wilson commit 2a21c8b351052be9c32c5669264fb05a8510c957 Author: Chris Wilson Date: Sat Dec 15 17:56:27 2012 +0000 sna: Include shm hint in render placement The goal is to reduce the preference of rendering to a SHM pixmap - only if it is already active, will we consider continuing to use it on the GPU. Signed-off-by: Chris Wilson commit a467102a9539c7f4fa8d0700ecdcaba49d77b3f7 Author: Chris Wilson Date: Sat Dec 15 10:00:48 2012 +0000 2.20.16 release Signed-off-by: Chris Wilson commit b0f8c823b6cafdfdd064c09d58174f946e290541 Author: Chris Wilson Date: Sat Dec 15 09:28:04 2012 +0000 sna/dri: Fallback to a blit after a failed flip ...rather than force the exchange. Signed-off-by: Chris Wilson commit 2c71a8e08abce74b269687d3a6c1edd7f9d643d3 Author: Chris Wilson Date: Sat Dec 15 09:27:07 2012 +0000 sna/dri: Honour TripleBuffer Option In case anyone ever wants to disable the default. Signed-off-by: Chris Wilson commit 6593ad3fecb3d044ee5ca161176d8ecaa0b4126a Author: Chris Wilson Date: Fri Dec 14 23:48:00 2012 +0000 sna/dri: Store and check size of front/back bo attached to a DRI2 drawable So that we can prevent feeding back a stale bo when the DRI2 client tries to swap an old buffer. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57212 Signed-off-by: Chris Wilson commit 9df9585cb00958b42461b3139bb7aec32090a869 Author: Chris Wilson Date: Fri Dec 14 15:37:56 2012 +0000 sna: Reduce fence watermarks Further restrict the amount of fenced bo we try to fit into the batch to make it easier for the kernel to accommodate the request. Signed-off-by: Chris Wilson commit 0d3ba44e448c152a570cc469d289ab057fa7be5c Author: Chris Wilson Date: Fri Dec 14 12:47:46 2012 +0000 sna/gen2+: Experiment with not forcing migration to GPU after CPU rasterisation Signed-off-by: Chris Wilson commit d867fd01cb0060342102a79600daf43e3dc44a07 Author: Chris Wilson Date: Fri Dec 14 13:10:54 2012 +0000 sna/gen3: Don't combine primitives if beginning a ca 2-pass Signed-off-by: Chris Wilson commit 3ca503dac2ea6c036e7ebe878b41923541daf225 Author: Chris Wilson Date: Fri Dec 14 12:49:14 2012 +0000 sna/gen3: Remove stray setting of vertex_start It is always done at the beginning of vertex emission. Signed-off-by: Chris Wilson commit 7f76f100e8033497620ee46548df45afff41064a Author: Chris Wilson Date: Thu Dec 13 23:12:42 2012 +0000 sna/gen2: Reorder reuse_source() to avoid NULL dereference for solids Signed-off-by: Chris Wilson commit 044a54c23384756a5dc1895473abf34f7abb3d83 Author: Chris Wilson Date: Thu Dec 13 23:05:30 2012 +0000 sna/gen2: Initialise channel->is_affine for solid In case we hit a path were we avoid reusing the source for the mask and leave is_affine unset for a solid mask. Signed-off-by: Chris Wilson commit 29afd0dc8e893cc4110ee0d70546775dae86ddb3 Author: Chris Wilson Date: Thu Dec 13 22:53:18 2012 +0000 sna/gen2: Assertions Signed-off-by: Chris Wilson commit 4d2abe1e3daac74747535d88dff34b024b87bbe9 Author: Chris Wilson Date: Thu Dec 13 22:09:37 2012 +0000 sna/gen3: Remove incorrect optimisation of an opaque source for CA Signed-off-by: Chris Wilson commit d428dbf7ad7c246acb1c301b73b9df4a1309de03 Author: Chris Wilson Date: Thu Dec 13 14:53:50 2012 +0000 sna/gen2: Program solid mask using the DIFFUSE component Signed-off-by: Chris Wilson commit 9e7311516da81ab45484b291ec668503c5ded0bb Author: Chris Wilson Date: Thu Dec 13 14:40:25 2012 +0000 sna/gen2: Align surface sizes to an even tile Makes this 855gm much happier. Signed-off-by: Chris Wilson commit e646047a563598948206167765eaaf4192cfd77f Author: Chris Wilson Date: Thu Dec 13 14:23:54 2012 +0000 sna: Fix up BLT overwrite detection to use target_handle Signed-off-by: Chris Wilson commit 4f96439e39a4bf4b127af9ccfdc09d061caff9bd Author: Chris Wilson Date: Thu Dec 13 13:15:52 2012 +0000 sna: Fix typo for 830/845 gen Must remember, its octal not decimal. Signed-off-by: Chris Wilson commit f631a56bcb3ff1ce1942b828325a157cef1e0880 Author: Chris Wilson Date: Thu Dec 13 00:55:45 2012 +0000 sna: Only flush the batch after an actual relocation As we may write preparatory instructions into the batch before checking for a flush. Signed-off-by: Chris Wilson commit 74bbf20e6e652cba55d6d0bc17066f4112f8548c Author: Chris Wilson Date: Wed Dec 12 21:56:22 2012 +0000 sna: Improve the initialisation failure path for pinned batches Simplify the later checks by always populating the lists with a single, albeit unpinned, bo in the case we fail to create pinned batches. Signed-off-by: Chris Wilson commit 52c8c9218c8f28fb049b02214d833912a803f911 Author: Chris Wilson Date: Wed Dec 12 21:19:02 2012 +0000 sna: Fix the error path in kgem_init_pinned_batches() to use the right iter Signed-off-by: Chris Wilson commit c7f7dd61fd07dbf938fc6ba711de07986d35ce1f Author: Chris Wilson Date: Wed Dec 12 19:43:19 2012 +0000 sna: Pin some batches to avoid CS incoherence on 830/845 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=26345 Signed-off-by: Chris Wilson commit b154d0dc404a152e1283a013a78be06b8d734867 Author: Chris Wilson Date: Wed Dec 12 18:34:54 2012 +0000 sna/gen2: STIPPLE requires an argument Signed-off-by: Chris Wilson commit 9001263b32efde1361555432914d9ac3ee780511 Author: Chris Wilson Date: Wed Dec 12 12:03:40 2012 +0000 sna/gen3+: Use nearest for unscaled videos If the output is unscaled, then we do not require pixel interpolation (and planar formats are exactly subsampled). References: https://bugs.freedesktop.org/show_bug.cgi?id=58185 Signed-off-by: Chris Wilson commit 2dbe7d91a7f15a3a9ddad696c5088ca98898fca2 Author: Chris Wilson Date: Wed Dec 12 09:50:34 2012 +0000 sna/gen4: Use the single-threaded SF w/a for spans as well Fixes the flickering seen in the fishtank demo, for example. Signed-off-by: Chris Wilson commit 2502218a9340044bb660be68f059971119077e29 Author: Chris Wilson Date: Tue Dec 11 17:47:09 2012 +0000 sna/dri: Fix handling of current_msc > target_msc Signed-off-by: Chris Wilson commit 39d6c65f437d7877c1647b7ecf45e76daabc76a6 Author: Chris Wilson Date: Tue Dec 11 15:30:54 2012 +0000 sna/dri: Query current msc before use Might be worth caching the last-known-value so we can skip the query for an old swap request. Signed-off-by: Chris Wilson commit 162e9a2bfc693db186aa481551cf76b3dc5ee55c Author: Chris Wilson Date: Mon Dec 10 23:11:48 2012 +0000 sna/dri: Disable name exchanges for SwapBuffers The DRI2 protocol is inherently racy. Fortuituously, this can be swept under the carpet by forcing the serialisation between the DRI2 clients by using a blit for the SwapBuffers. References: https://bugs.freedesktop.org/show_bug.cgi?id=58005 Signed-off-by: Chris Wilson commit 0c2287c735f990a98b39d00f28168d7a5df25aba Author: Chris Wilson Date: Mon Dec 10 20:09:22 2012 +0000 sna/dri: Only special case 'divisor && msc-passed' for immediate flipping As Jesse pointed out, it is legal for the client to request that the flip be some frame in the future even with no divisor. Signed-off-by: Chris Wilson commit 2ab29a1688cd313768d928e87e145570f35b4a70 Author: Jesse Barnes Date: Mon Dec 10 14:55:32 2012 -0800 dri2: don't schedule a flip prematurely at ScheduleSwap time If divisor is 0 but the current MSC is behind the target, we shouldn't schedule a flip (which will occur at the next vblank) or we'll end up displaying it early and returning the wrong timestamp. Preserve the optimization though by allowing us to schedule a flip if both the divisor is 0 and the current MSC is equal to or ahead of the target; this avoids a round trip through the kernel. Reported-by: Mario Kleiner Signed-off-by: Jesse Barnes commit 986e13a56a8544d5b32dbcaacbc0ee9cf5d47e27 Author: Chris Wilson Date: Mon Dec 10 17:29:08 2012 +0000 sna: Try installing a fallback config on VT enter in case full desiredMode fails This can happen naturally for 3-pipe config on Ivybridge or if the outputs are rearranged whilst we slept. Instead of failing to change the display on the VT, install at least a fb on the CompatOutput so that hopefully the DE can take over, or give some control to the user. Signed-off-by: Chris Wilson commit 8c3b82f207bc8cf697646d3324cb4103da3b7856 Author: Chris Wilson Date: Mon Dec 10 16:20:52 2012 +0000 sna: Avoid reusing the same 'busy' bit for two different meanings. Oops, I thought the 'busy' bit was now used and apparently forgot it is used to control the periodic flushing... Signed-off-by: Chris Wilson commit d1b479a3404e6b52a23e0443c36d0682cbaf3c2f Author: Chris Wilson Date: Mon Dec 10 11:16:04 2012 +0000 sna: Compromise and only flush a split batch if writing to scanout A compromise between not flushing quick enough and flushing too often, hopefully. Signed-off-by: Chris Wilson commit 3e9120d73c6f0c0e06b617da91cc2edce4434bc3 Author: Chris Wilson Date: Mon Dec 10 11:05:16 2012 +0000 sna: Immediately flush a split batch If we submit a batch early (for example if the GPU is idle), then submit whatever else the client drew immediately upon completion of its blockhandler. This is required to prevent flashing due to visible delay between the clear at the start of the cycle and then the overdraw later. References: https://bugs.freedesktop.org/show_bug.cgi?id=51718 Signed-off-by: Chris Wilson commit aa8c5d8201006397bb32ed6bc28618f9aa77a68a Author: Chris Wilson Date: Thu Dec 6 22:08:08 2012 +0000 sna/sprite: Add a DBG to report whether the kernel supports sprites Signed-off-by: Chris Wilson commit 25c0d440dee45c03f5e45b8e0e45071c0c32f507 Author: Chris Wilson Date: Sun Dec 9 12:11:53 2012 +0000 sna: Move source to CPU prior to referencing for inplace trapezoids Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56825 Signed-off-by: Chris Wilson commit 3e82fcc8d243b7ffe1a3d3249a5cdb5fd068093f Author: Chris Wilson Date: Sun Dec 9 11:19:13 2012 +0000 sna/gen4+: Refine test for preferring GPU spans Signed-off-by: Chris Wilson commit c8f622726a4463b419d032b379576cfb3bc492df Author: Chris Wilson Date: Sun Dec 9 09:26:03 2012 +0000 sna: Replace remaining kgem_is_idle() with kgem_ring_is_idle() Further experimentation... Signed-off-by: Chris Wilson commit 4e4e10935d2815fb62aeaedbfffe10aad115ec0b Author: Chris Wilson Date: Sat Dec 8 22:39:32 2012 +0000 sna: Flush upon change of target if GPU is idle The aim is to improve GPU concurrency by keeping it busy. The possible complication is that we incur more overhead due to small batches. Signed-off-by: Chris Wilson commit cef11795f627a393d4254845b0a19eefbf6c782c Author: Chris Wilson Date: Fri Dec 7 17:40:37 2012 +0000 sna: Convert the ring from BLT/3D to the internal index for kgem_ring_is_idle() Signed-off-by: Chris Wilson commit 52405b2aed492dc7f76fbf082122842f621e7c06 Author: Chris Wilson Date: Fri Dec 7 17:24:42 2012 +0000 sna: Only inspect the target ring for busyness Signed-off-by: Chris Wilson commit 4b7bbb2a23b03bac63f864c33f47fab88dedbf67 Author: Chris Wilson Date: Fri Dec 7 16:43:32 2012 +0000 sna: Only flush before adding fresh surfaces to the batch Previously, before every operation we would look to see if the GPU was idle and we were running under a DRI compositor. If the GPU was idle, we would flush the batch in the hope that we reduce the cost of the context switch and copy from the compositor (by completing the work earlier). However, we would complete the work far too earlier and as a result would need to flush the batch before every single operation resulting in extra overhead and reduced performance. For example, the gtkperf circles benchmark under gnome-shell/compiz would be 2x slower on Ivybridge. Reported-by: Michael Larabel Signed-off-by: Chris Wilson commit 65a8c23ca1bc8e2ebd087027a30358704d4bf11c Author: Chris Wilson Date: Fri Dec 7 14:56:18 2012 +0000 sna: Only flush at the low apeture watermark if idle Signed-off-by: Chris Wilson commit 4bfc5e90f54be1b0997dec9e81796d67b376a01f Author: Chris Wilson Date: Thu Nov 8 23:42:10 2012 +0000 sna: Mark proxies as dirty on first relocation Signed-off-by: Chris Wilson commit 1d2fa5731b7ecfe34a8af809e45bcd3b0b70c890 Author: Chris Wilson Date: Thu Dec 6 22:15:09 2012 +0000 Remove the default log message Breaks compilation with xorg-1.13 Signed-off-by: Chris Wilson commit 7f4d4afa629bd18be89d7270e6178a865cf9586e Author: Chris Wilson Date: Thu Dec 6 17:08:15 2012 +0000 Fix compilation of UMS probe following 13f47008ec Signed-off-by: Chris Wilson commit d733f7d1f1dc343ac34c4a27ac99d71fc0572bc2 Author: Chris Wilson Date: Thu Dec 6 16:55:00 2012 +0000 sna/gen4+: Add common glyph-to-dst emitters Signed-off-by: Chris Wilson commit 13f47008ec411609968c40b8ec34dd495f14c50b Author: Chris Wilson Date: Thu Dec 6 14:05:33 2012 +0000 Refactor the common probe methods for scrn construction Signed-off-by: Chris Wilson commit 0040eb84c9187476a75202ebb251dd74354e4fc7 Author: Chris Wilson Date: Wed Dec 5 09:25:17 2012 +0000 sna: Don't disable CPU bo if supported on unknown hw Signed-off-by: Chris Wilson commit 14069f48645867a735ebdccb1e27a62364643c38 Author: Chris Wilson Date: Wed Dec 5 09:24:02 2012 +0000 sna: Assume that future hardware only gets more flexible E.g. that BLT can always write to cacheable memory, inflexible fences are a thing of the past, etc. Signed-off-by: Chris Wilson commit b82bfcb54a6af0d1ee17806ef94d9da504cad606 Author: Chris Wilson Date: Tue Dec 4 17:26:47 2012 +0000 sna/gen6+: Cache the scanout targets separately to avoid override PTE caching Signed-off-by: Chris Wilson commit 626dd1324dd2c5b14ca4aff598b5eb1e45550e69 Author: Chris Wilson Date: Tue Dec 4 12:52:50 2012 +0000 sna/gen4: Workaround render corruption with multiple SF threads Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57410 Signed-off-by: Chris Wilson commit dbdb8fabfbade3f19fd8af3524468b5e6668bb66 Author: Chris Wilson Date: Tue Dec 4 12:37:23 2012 +0000 sna/gen4: Special case solids through the general vertex emitter Signed-off-by: Chris Wilson commit a17354d5ce6aeeab3f6e42aba63fce06ad18c526 Author: Chris Wilson Date: Tue Dec 4 12:01:26 2012 +0000 sna/gen4: Remove unused CC viewport Signed-off-by: Chris Wilson commit b9afb9cb614d2ad44330eed03b3f577a35184a88 Author: Chris Wilson Date: Tue Dec 4 11:14:58 2012 +0000 sna/gen4: Avoid emitting URB_FENCE across a cache-line Old erratum. Signed-off-by: Chris Wilson commit 08c30c48bdd0db500498bd9617c15f37bacd8de9 Author: Chris Wilson Date: Mon Dec 3 13:23:33 2012 +0000 sna: Tidy addition of fake GTF modes for panels Signed-off-by: Chris Wilson commit 6f675eeaeade4728af566891b2afbe5b44fbdc2e Author: Chris Wilson Date: Mon Dec 3 10:47:35 2012 +0000 2.20.15 release Signed-off-by: Chris Wilson commit 37eb7343be1aeeb90a860096756603a577df1a77 Author: Chris Wilson Date: Sat Dec 1 09:40:11 2012 +0000 sna/gen5: Inspired by gen4, reorder the flushing This may not be totally safe, but it is a nicer explanation for random single character corruption. References: https://bugs.freedesktop.org/show_bug.cgi?id=51422 Signed-off-by: Chris Wilson commit a8a99428c14c8aed2082853cc60d0f98a1fa2d86 Author: Chris Wilson Date: Sat Dec 1 09:44:49 2012 +0000 sna/dri: Unknown generations are given the max value and presume i965_dri.so Signed-off-by: Chris Wilson commit 382bb7bf77fca412fdefd7c304f395d1fe9483b5 Author: Chris Wilson Date: Fri Nov 30 16:24:30 2012 +0000 sna/gen6+: Only apply the BLT w/a for self-copies Signed-off-by: Chris Wilson commit 1aee8acacfe5869a072d9f20f3b8290b16683260 Author: Chris Wilson Date: Fri Nov 30 12:17:25 2012 +0000 sna: Unify gen4 acceleration again After disabling render-to-Y, 965g seems just as happy with the new code paths as g4x. Signed-off-by: Chris Wilson commit 5d6dd9c5a7eeb1f879525430ad89ab74d427e469 Author: Chris Wilson Date: Fri Nov 30 12:12:49 2012 +0000 Convert generation counter to octal Signed-off-by: Chris Wilson commit 131600020638ef15166361214cd5e1a0c08c2ea6 Author: Chris Wilson Date: Fri Nov 30 11:43:56 2012 +0000 sna: Prevent gen4 from rendering to I915_TILING_Y It always seems to end up in a hang... Signed-off-by: Chris Wilson commit ee4d1873ff504c2150b51d13864164b02b85dd53 Author: Chris Wilson Date: Fri Nov 30 09:52:49 2012 +0000 sna/g4x: And remove one more flush point Signed-off-by: Chris Wilson commit 1b6c1a30723b1d13e9bd3df0b59a8d75639c89be Author: Chris Wilson Date: Fri Nov 30 09:27:57 2012 +0000 sna: Increase tiling alignment to an even tile Seems to help g4x. Signed-off-by: Chris Wilson commit 6aeb6fdf75fa322d8f5ffe393337d8195d7a6a62 Author: Chris Wilson Date: Fri Nov 30 09:03:53 2012 +0000 sna/g4x: Remove the flush before the pipelined pointer changes This one appears unneeded. Hopefully. Signed-off-by: Chris Wilson commit 8be2c6695509809c0ab0c5c014e11dc733f73006 Author: Chris Wilson Date: Thu Nov 29 19:56:15 2012 +0000 sna/g4x: Emit the flush prior to changing pipelined state Signed-off-by: Chris Wilson commit 2d5d55702bb8eced32d5b8cb3c0cd125fd99d6dc Author: Chris Wilson Date: Wed Nov 28 15:46:29 2012 +0000 sna/gen6+: Override PTE cacheability bits for reads This is primarily useful for enabling the render cache for reads from scanouts. Signed-off-by: Chris Wilson commit 3ed87945c9e83fefcbda053b616856658bf2ac8e Author: Chris Wilson Date: Wed Nov 28 11:05:40 2012 +0000 sna/gen5+: Disable max-vbo address As we do not use this feature, disable it and save the relocation. Signed-off-by: Chris Wilson commit b2c9e9da639a134577485f83e0f66f54e2371b98 Author: Chris Wilson Date: Tue Nov 27 11:32:11 2012 +0000 sna/blt: Avoid clobbering common state before converting to a BLT In case we need to continue on with the render operation, we need to preserve the existing state. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=57601 Signed-off-by: Chris Wilson commit 1e06d19a00f5a5a05369deeb3c5ae15b282c0f92 Author: Chris Wilson Date: Mon Nov 26 15:30:09 2012 +0000 sna: Disable shadow tracking upon regen References: https://bugs.freedesktop.org/show_bug.cgi?id=56608 References: https://bugs.freedesktop.org/show_bug.cgi?id=52255 Signed-off-by: Chris Wilson commit d21ed3a6aba5ae227cc5ecd164f3c18bc48c69af Author: Chris Wilson Date: Mon Nov 26 10:34:28 2012 +0000 sna: Use a single execobject flag to mark read/write domains Slight modification to the proposed API to only pass the simplified domain tracking now performed by the kernel. Signed-off-by: Chris Wilson commit 7a904ce839933d57176e013cdad147533c33ca2f Author: Chris Wilson Date: Mon Nov 26 08:48:31 2012 +0000 2.20.14 release Signed-off-by: Chris Wilson commit 1367e3f9ef5f606c8927cbde441a2ea41fa6d025 Author: Chris Wilson Date: Sun Nov 25 00:24:45 2012 +0000 sna: Exploit the alpha-fixup of the BLT for texture format conversions Signed-off-by: Chris Wilson commit 6d6399f97cf7cb91dcf89e9a5cd1243f761e4314 Author: Chris Wilson Date: Sun Nov 25 00:05:44 2012 +0000 sna: Transform a simple repeat pattern into range of the BLT Signed-off-by: Chris Wilson commit 39f1e228b74e98d3d87157cf093fc56ca31e6b13 Author: Chris Wilson Date: Sat Nov 24 20:16:29 2012 +0000 sna: Make GPU idle more consistent during wakeup Signed-off-by: Chris Wilson commit 40b6121746c55153de444ccb753df80706ff3a69 Author: Chris Wilson Date: Fri Nov 23 18:21:41 2012 +0000 sna/g4x: Refine the w/a for the broken sf shader Signed-off-by: Chris Wilson commit e0b906b09697b5fe7a5be2fdc52abd9b1c73f96d Author: Chris Wilson Date: Fri Nov 23 18:01:25 2012 +0000 sna/g4x: Use the render pipeline more often for composite operations Signed-off-by: Chris Wilson commit 54d8968da5ae39bfbcad511322926931bce2bda3 Author: Chris Wilson Date: Fri Nov 23 17:47:49 2012 +0000 sna/gen4: Revert changes to 965g[m] The changes tested on g45/gm45 prove to be highly unstable on 965gm, suggesting a radical difference in the nature of the bugs between the two generations. In theory, g4x has additional features that could be exploited over and above gen4 which may prove interesting in the future. Signed-off-by: Chris Wilson commit d560296561f68c3ac841345c0f4ce2c8e7381156 Author: Chris Wilson Date: Fri Nov 23 16:35:06 2012 +0000 sna/gen4: Don't force a flush for the dirty target if the we do not read back Signed-off-by: Chris Wilson commit 4023b2044757a9a67d564be0c8adf4885973a6e3 Author: Chris Wilson Date: Fri Nov 23 15:42:18 2012 +0000 sna/gen4: Force composite(WHITE, glyph) for building the glyphstring mask For reasons that are not apparent, if we don't composite with source/mask for the glyph strings, there appears to be some cache corruption. About as bizarre as the rest of gen4 idiosynacracies. Signed-off-by: Chris Wilson commit f74b62755c6e41097c23cc506984859e556a3415 Author: Chris Wilson Date: Fri Nov 23 14:59:42 2012 +0000 sna/gen4: Set composite op before testing for a BLT compatible op Signed-off-by: Chris Wilson commit 4c922eb52cadb867a0a15929e5a214c84a5992f3 Author: Chris Wilson Date: Fri Nov 23 14:19:59 2012 +0000 sna/gen4: Pass the mask channel explicitly rather than through a dummy mask Signed-off-by: Chris Wilson commit 2e68efa8ec66b4c89e9816bfa15067b398da5e3e Author: Chris Wilson Date: Fri Nov 23 14:04:51 2012 +0000 sna/gen4: Reduce the flush before performing the CA pass Signed-off-by: Chris Wilson commit 43aff6708fe97aa2fae0e30f98fc7cd9d7311b75 Author: Chris Wilson Date: Fri Nov 23 13:37:44 2012 +0000 sna/gen4: Update render fill routines to use the dummy mask Signed-off-by: Chris Wilson commit 352910712266202ef017066891ec383fd037fc4a Author: Chris Wilson Date: Fri Nov 23 13:29:01 2012 +0000 sna/gen4: Move the flush from inside the spans to emit_state() Signed-off-by: Chris Wilson commit 217f3e835b99002669999f818afa0d5c3a1cc852 Author: Chris Wilson Date: Fri Nov 23 12:32:14 2012 +0000 sna/gen4: Backport the more efficient composite box emitters Now that we aren't flushing after every single rectangle, we can strive for a little efficiency. Signed-off-by: Chris Wilson commit d3145e3f8146e7d864d32aec49c44c04d619e56a Author: Chris Wilson Date: Fri Nov 23 12:28:21 2012 +0000 sna/gen4: Use a dummy white mask to avoid the flush w/a when compositing Signed-off-by: Chris Wilson commit 65d530b59b957cc5f303ae819baad8075a555ac0 Author: Chris Wilson Date: Thu Nov 22 08:18:38 2012 +0000 Revert "uxa: Refactor early-exit paths of uxa_try_driver_composite()." This reverts commit fa5c573455cf63090dbb6d167d4e5f1cb23daf72 as it causes a SIGSEGV. Reported-by: lu hua Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57389 commit d3a49f36395d737698616fe8ba9da7b74cd2d89a Author: Chris Wilson Date: Wed Nov 21 18:41:00 2012 +0000 sna/gen3+: Clear the render.vbo when replacing it for vertex upload As we may trigger a flush and a retire when searching for a vertex buffer for the new vertices, we need to be careful to decouple the destroyed vbo in order to avoid a use-after-free when inspecting the state. Signed-off-by: Chris Wilson commit 1c57a52a1f46e8401429955d8c96fd5095c9012a Author: Chris Wilson Date: Wed Nov 21 18:17:31 2012 +0000 sna: Assert that we do not replace a GPU bo with a proxy Signed-off-by: Chris Wilson commit 8da12a00ee653510e1f1a6fecb28dbb36faa8400 Author: Chris Wilson Date: Wed Nov 21 17:28:46 2012 +0000 sna: Skip uploading unintialiased pixmap data References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 0696ea4bd601ed823dbded03eaef6f316df2a5e8 Author: Chris Wilson Date: Wed Nov 21 17:25:33 2012 +0000 sna: Add the missing assertion for !proxy References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit ee72375ecd4f6d6e756bc361fa512b6675309540 Author: Chris Wilson Date: Wed Nov 21 17:08:53 2012 +0000 sna: Do not migrate uninitialised pixmaps Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 44dad490140d85a4c0dcb916030c36a838670c01 Author: Chris Wilson Date: Wed Nov 21 16:22:35 2012 +0000 sna: Do not dispose of a shadow pixmap Fixes regression from 2249e9edc37811c07e2807d6b4def05585b44c22 Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 9c627a05247690891062a2c0c1c8f7bbc0273104 Author: Chris Wilson Date: Wed Nov 21 16:03:02 2012 +0000 sna: Remove the kgem_bo_is_mappable refcnt assertion from freed paths A few callers of kgem_bo_is_mappable operate on freed bo, and so need to avoid the assert(bo->refcnt). References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit c0c48c7a5aca4d24936efbeaefc7674ada2ef87f Author: Chris Wilson Date: Wed Nov 21 14:46:45 2012 +0000 sna: Add a few refcnt assertions References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 0884777c33d20dbc329b98ad0db5ffb0df93ac8c Author: Chris Wilson Date: Wed Nov 21 14:31:44 2012 +0000 sna: Fix bogus assertion from 03fb9ded43 Signed-off-by: Chris Wilson commit 2249e9edc37811c07e2807d6b4def05585b44c22 Author: Chris Wilson Date: Wed Nov 21 13:05:36 2012 +0000 sna: Dispose of local copy for render sources If we transfer the pixmap to the GPU to use as a render source, presume that we will not need to then touch the local copy (at least for a while) and so return that memory to the system. Signed-off-by: Chris Wilson commit 736bb0f7058bf05ef48cdfe6a30d880de817aff9 Author: Chris Wilson Date: Wed Nov 21 12:16:46 2012 +0000 sna: Tighten a couple of assertions for damage with use_bo Signed-off-by: Chris Wilson commit 03fb9ded43f9bf8b73f99d5b3a8dc592fe22b523 Author: Chris Wilson Date: Tue Nov 20 21:13:07 2012 +0000 sna: Assert that we do not create a proxy with existent GPU damage References: http://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 9ab1d1f94e502e5fde87e7c171f3502f8a55f22b Author: Chris Wilson Date: Tue Nov 20 18:42:58 2012 +0000 sna/dri: Queue a vblank-continuation after flip-completion If a vblank request was delayed due to a pending flip, we need to make sure that we then queue it after that flip or else progress ceases. Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56423 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57156 Signed-off-by: Chris Wilson commit 7a7a76b359f73a4c4bcda0d88004f4dd5e94a186 Author: Chris Wilson Date: Tue Nov 20 16:05:32 2012 +0000 sna/dri: Avoid a NULL dereference inside a DBG Signed-off-by: Chris Wilson commit fa5c573455cf63090dbb6d167d4e5f1cb23daf72 Author: Eric Anholt Date: Sat Nov 17 13:11:13 2012 -0800 uxa: Refactor early-exit paths of uxa_try_driver_composite(). Saves 200b of code at -O2. commit edefb64d2b1c95b0b678cb222273ab64b2e6db2a Author: Eric Anholt Date: Sat Nov 17 13:11:12 2012 -0800 uxa: Work around uninitialized-value warning. The compiler isn't noticing that localDst only diverges from pDst when the _copy variables have also been set. commit 18b2e2a82724407196001ca853bd83150c66c5bd Author: Eric Anholt Date: Sat Nov 17 13:11:10 2012 -0800 uxa: Add printf attribute to intel_debug_fallback(). Shuts up a bunch of warnings with xorg's shared warning flags, and should give us more informative warnings in our code. commit 2d1e267e662505ca0dd318765464a24739dc5bd8 Author: Eric Anholt Date: Sat Nov 17 13:11:09 2012 -0800 uxa/dri: Factor out the repeated swap fallback code. commit cd2f373da7a14e004c999f9f0efaf88c785d3d3f Author: Eric Anholt Date: Sat Nov 17 13:11:08 2012 -0800 configure.ac: Fix bad syntax for test calls commit b8c01d9bd7ce5656706ebebd16e5a8c5ca0ba487 Author: Chris Wilson Date: Mon Nov 19 15:20:10 2012 +0000 sna/dri: Add an assert that the cached DRI2 buffer is pinned for DRI Signed-off-by: Chris Wilson commit 84b1a02fa9fde02366e0384044526982e70d0e8d Author: Chris Wilson Date: Mon Nov 19 13:41:28 2012 +0000 sna/dri: Avoid setting off-delay after a failed flip (use-after-free) Signed-off-by: Chris Wilson commit b4dd1103a55406bcd65f137c668701074a5c41b6 Author: Chris Wilson Date: Sun Nov 18 12:21:49 2012 +0000 sna/gen6+: Tweak prefer-blt to offset latency when in rc6 Signed-off-by: Chris Wilson commit 0cb8544dc16d4c1e9ae7f1ee74ee26c7501a9ed7 Author: Chris Wilson Date: Sun Nov 18 12:13:46 2012 +0000 Remove useless indirection of intel_chipsets Once upon a time this was used to hide a compiler warning about a pointer mismatch, now the compiler still warns about the cast, making the indirect moot. Signed-off-by: Chris Wilson commit 8509e474f57533fc6afcf213165f4c8633631fb5 Author: Chris Wilson Date: Fri Nov 16 23:02:44 2012 +0000 sna/dri: Clear the last-used-cpu flag when performing CopyRegion Keeps the internal bookkeeping intact after the small bypass. Signed-off-by: Chris Wilson commit 866ed4a26cbbb29ef3845b0aa56383c4d951c65a Author: Chris Wilson Date: Thu Nov 15 15:13:14 2012 +0000 sna/dri: Add a couple of more asserts to track injection of a rogue bo Signed-off-by: Chris Wilson commit d2897cb0136ffec83365c7530ed544b562cac478 Author: Chris Wilson Date: Tue Nov 13 12:43:44 2012 +0000 sna/gen4,5: Fix the opacity shader to use the right vertex attribute Reported-by: Edward Sheldrake Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57054 Signed-off-by: Chris Wilson commit 440eaa049756e5266f3bd80e2751f1fd0d5f9890 Author: Chris Wilson Date: Tue Nov 13 12:42:58 2012 +0000 sna/gen4: Tidy emission of opacity vertex attribute Just make it more consistent between the various emitters Signed-off-by: Chris Wilson commit b6d2bb961517623d46aa6944307cb998ee125459 Author: Chris Wilson Date: Tue Nov 13 10:05:56 2012 +0000 sna/gen4: Do not prefer inplace non-rectilinear spans As gen4 requires the per-rectangle vertex flush, emitting spans on the GPU is inefficient and so we prefer to composite the mask instead. Signed-off-by: Chris Wilson commit ae293609c7400cd3c753ed3762772264c4741df5 Author: Chris Wilson Date: Tue Nov 13 10:21:29 2012 +0000 sna/gen4: Always initialise redirect Do not assume the caller cleared the composite-op structure for us. Signed-off-by: Chris Wilson commit 2954f15e2bcb590a90c2cb6077c0843ee25a4413 Author: Chris Wilson Date: Tue Nov 13 09:46:19 2012 +0000 sna: Specialise the decision for inplace xor uploads Fixes a regression from commit 0be1d964713ca407f029278a8256d02d925dc9da Author: Chris Wilson Date: Tue Sep 11 21:48:24 2012 +0100 sna: Use inplace X tiling for LLC uploads which introduced the ability to swizzle into CPU maps, but also convinced the xorg path to the same - which for large images blows up. Reported-by: Michael Laß Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57031 Signed-off-by: Chris Wilson commit 66eb0adffa63ef8ece7621ba90dc96af91549612 Author: Chris Wilson Date: Mon Nov 12 14:45:56 2012 +0000 sna/dri: Apply the can_blit() check for CopyRegion CopyRegion() also needs to check for stale bo in case the pixmap dimensions have changed size and so may cause out-of-bounds read/writes. Signed-off-by: Chris Wilson commit b27ecf3059bc066ef59f2a71c1d8d8f0ffec7191 Author: Chris Wilson Date: Mon Nov 12 14:06:06 2012 +0000 sna/dri: Prevent scheduling a swap on stale buffers If the screen has been reconfigured and the DRI client tries to swap the old buffers (having not processed the invalidate event and retrieved the current names), quietly drop the request. If we try to obey the request, we will end up attaching a back buffer that is the wrong size to the scanout... Signed-off-by: Chris Wilson commit 34aa1e3b2702a55799a5655a3ba10bce4cc2065a Author: Chris Wilson Date: Mon Nov 12 11:22:53 2012 +0000 sna: Compile against ancient libdrm We need to trim the sprite video overlays if the prototypes are not known. Signed-off-by: Chris Wilson commit 8f1afde57dca27e6542b0b8e7c87750f3d6367bf Author: Chris Wilson Date: Sun Nov 11 16:16:20 2012 +0000 2.20.13 release Signed-off-by: Chris Wilson commit b16219a19f48b52dda91f26fcbbbbeda056589ab Author: Chris Wilson Date: Sun Nov 11 11:05:35 2012 +0000 sna: Filter out the full-damage marker when undoing redirection ==25902== Invalid read of size 4 ==25902== at 0x4980E13: _list_del (intel_list.h:218) ==25902== by 0x4980EAB: list_del (intel_list.h:240) ==25902== by 0x4981F4B: free_list (sna_damage.c:403) ==25902== by 0x4985131: __sna_damage_destroy (sna_damage.c:1467) ==25902== by 0x49A5276: sna_render_composite_redirect_done (sna_render.c:1921) ==25902== by 0x49C68FC: gen2_render_composite_done (gen2_render.c:1136) ==25902== by 0x497F90F: sna_composite (sna_composite.c:567) ==25902== by 0x4994725: glyphs_via_mask (sna_glyphs.c:1139) ==25902== by 0x4995FB7: sna_glyphs (sna_glyphs.c:1688) ==25902== by 0x8150EB4: ??? (in /usr/bin/Xorg) ==25902== by 0x813CA38: CompositeGlyphs (in /usr/bin/Xorg) ==25902== by 0x8146DE1: ??? (in /usr/bin/Xorg) ==25902== Address 0x7c079ac2 is not stack'd, malloc'd or (recently) free'd Reported-by: bonbons67@internet.lu Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56785 Signed-off-by: Chris Wilson commit 69acbb77e8aad3370d5e8d9a9e067c54872d7082 Author: Chris Wilson Date: Sun Nov 11 10:49:59 2012 +0000 sna: Fix printing of uninitialied value in DBG ==25902== Use of uninitialised value of size 4 ==25902== at 0x423098E: _itoa_word (_itoa.c:196) ==25902== by 0x4233F7F: vfprintf (vfprintf.c:1602) ==25902== by 0x42FAFAD: __vsnprintf_chk (vsnprintf_chk.c:65) ==25902== by 0x81DBE8E: Xvscnprintf (in /usr/bin/Xorg) ==25902== by 0x81DC8FB: LogVMessageVerb (in /usr/bin/Xorg) ==25902== by 0x81DCA62: LogVWrite (in /usr/bin/Xorg) ==25902== by 0x81DCA9B: VErrorF (in /usr/bin/Xorg) ==25902== by 0x81DC333: ErrorF (in /usr/bin/Xorg) ==25902== by 0x49B2FA8: trapezoid_span_inplace__x8r8g8b8 (sna_trapezoids.c:5069) ==25902== by 0x49B3407: trapezoid_span_inplace (sna_trapezoids.c:5166) ==25902== by 0x49B4C96: sna_composite_trapezoids (sna_trapezoids.c:5619) Reported-by: bonbons67@internet.lu Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56785 Signed-off-by: Chris Wilson commit 66e4c8ff40ab8cf722efa4293bb17b0d8f2dfa88 Author: Chris Wilson Date: Sun Nov 11 09:40:09 2012 +0000 sna: Flush pending rendering before enabling an output This is to prevent falling in the trap of the rendering being delayed until the next client renders some new content. Signed-off-by: Chris Wilson commit 94dd0b9ee9f55e7c09b8c0ee18939fa69ce66da2 Author: Chris Wilson Date: Sat Nov 10 16:52:09 2012 +0000 sna/gen2: Fix use of uninitialised redirection ==29553== Invalid read of size 4 ==29553== at 0x4980E1B: _list_del (intel_list.h:218) ==29553== by 0x4980EB3: list_del (intel_list.h:240) ==29553== by 0x4981F53: free_list (sna_damage.c:403) ==29553== by 0x4985139: __sna_damage_destroy (sna_damage.c:1467) ==29553== by 0x49A527E: sna_render_composite_redirect_done (sna_render.c:1921) ==29553== by 0x49C6904: gen2_render_composite_done (gen2_render.c:1136) ==29553== by 0x497F917: sna_composite (sna_composite.c:567) ==29553== by 0x8150C41: ??? (in /usr/bin/Xorg) ==29553== by 0x8142F13: CompositePicture (in /usr/bin/Xorg) ==29553== by 0x8145F58: ??? (in /usr/bin/Xorg) ==29553== by 0x81436F2: ??? (in /usr/bin/Xorg) ==29553== by 0x807965C: ??? (in /usr/bin/Xorg) ==29553== Address 0x9407e188 is not stack'd, malloc'd or (recently) free'd Reported-by: bonbons67@internet.lu Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56785 Signed-off-by: Chris Wilson commit 0f1c30818c9d782b066147448bbcc9ac95ac834f Author: Chris Wilson Date: Sat Nov 10 16:52:09 2012 +0000 sna: Fix use of uninitialised value in DBG ==29553== Use of uninitialised value of size 4 ==29553== at 0x4230964: _itoa_word (_itoa.c:195) ==29553== by 0x4233F7F: vfprintf (vfprintf.c:1602) ==29553== by 0x42FAFAD: __vsnprintf_chk (vsnprintf_chk.c:65) ==29553== by 0x81DBE8E: Xvscnprintf (in /usr/bin/Xorg) ==29553== by 0x81DC8FB: LogVMessageVerb (in /usr/bin/Xorg) ==29553== by 0x81DCA62: LogVWrite (in /usr/bin/Xorg) ==29553== by 0x81DCA9B: VErrorF (in /usr/bin/Xorg) ==29553== by 0x81DC333: ErrorF (in /usr/bin/Xorg) ==29553== by 0x49434F0: kgem_create_buffer (kgem.c:4887) ==29553== by 0x4943B09: kgem_create_buffer_2d (kgem.c:4969) ==29553== by 0x4943E19: kgem_upload_source_image (kgem.c:5021) ==29553== by 0x49A0567: upload (sna_render.c:505) ==29553== Reported-by: bonbons67@internet.lu References: https://bugs.freedesktop.org/show_bug.cgi?id=56785 Signed-off-by: Chris Wilson commit cc2b13c9c05e57dc5004d93b56f332ea95f0a4ef Author: Chris Wilson Date: Sat Nov 10 11:50:15 2012 +0000 sna: Specify read/write domains for no-relocation fastpath On review (read triggering BUGs), we do need to supply the domain tracking of the buffers that is being replaced from the relocation path. Signed-off-by: Chris Wilson commit 0c4a2bcc3d63ecc02e3a940e38e9a416b51ad0c8 Author: Chris Wilson Date: Sat Nov 10 12:34:52 2012 +0000 sna: Allow snooped buffers to be retained (and reused) between batches Signed-off-by: Chris Wilson commit f5d79b202dd448e61ab6ffce26fe9cbf9051d770 Author: Chris Wilson Date: Sat Nov 10 10:30:04 2012 +0000 sna/gen2: Add a modicum of fallback DBG References: https://bugs.freedesktop.org/show_bug.cgi?id=56785 Signed-off-by: Chris Wilson commit 27327633138dce159ca2e91fe5eac1565bd45e1c Author: Chris Wilson Date: Fri Nov 9 17:08:01 2012 +0000 sna/gen4: Only 965gm suffers the !snoop restriction So fixup the bogus assertion for g4x Signed-off-by: Chris Wilson commit 8d3b5ea135fd8f16da2cbfb98041e32c7001a38f Author: Chris Wilson Date: Fri Nov 9 15:31:03 2012 +0000 xvmc: Use DRMINTEL_LIBS instead of hardcoding -ldrm_intel Reported-by: Maarten Lankhorst Signed-off-by: Chris Wilson commit f040b97b01495aa43f7771ebb8ca5c0d44038bc1 Author: Chris Wilson Date: Thu Nov 8 23:42:10 2012 +0000 sna: Mark no-reloc write buffers If we bypass the relocation processing, we also then bypass the pending-write analysis, so we need to supply those to the kernel ourselves (to maintain gpu-cpu coherency). Signed-off-by: Chris Wilson commit 85ba7e96268dbb8da4bb34078333695a451c6570 Author: Chris Wilson Date: Thu Nov 8 15:56:13 2012 +0000 sna: Experiment with using reloc.handle as an index into the execbuffer Signed-off-by: Chris Wilson commit 93d8dddbb92431d6e2c48a17b71cac9f7047902e Author: Chris Wilson Date: Thu Nov 8 09:41:21 2012 +0000 sna: Set the known offset for the batch as well Signed-off-by: Chris Wilson commit 120fa0ef8d04f5e82e5f7a0636033d3d96efa1e8 Author: Chris Wilson Date: Wed Nov 7 17:41:20 2012 +0000 sna: Support a fast no relocation changed path x11perf -copywinwin10 on gm45 with c2d L9400: before: 553,000 op/s after: 565,000 op/s Signed-off-by: Chris Wilson commit b7d2fcf47a9569d0944097a8be60ca3be72b42f6 Author: Chris Wilson Date: Thu Nov 8 08:55:25 2012 +0000 Remove reliance on hard-coded DRI name This provides for using the existing DDX with future DRI drivers which may break from the traditional names - but only with the help of the user/packager. This scheme needs to be replaced with a robust mechanism for driver loading if AIGLX and co are to be kept. Signed-off-by: Chris Wilson commit cefce9c81585b73db7620e08fcf60c89a8204873 Author: Chris Wilson Date: Tue Nov 6 17:26:34 2012 +0000 sna: Abandon kernels that do not support execbuffer2 Signed-off-by: Chris Wilson commit b2245838c15b54d72557de8facb7cc15d59624ae Author: Chris Wilson Date: Tue Nov 6 16:32:32 2012 +0000 sna/gen4: opacity spans requires the per-rectangle flush w/a Note that this is worsened, but not caused, by: commit e1a63de8991a6586b83c06bcb3369208871cf43d Author: Chris Wilson Date: Fri Nov 2 09:10:32 2012 +0000 sna/gen4+: Prefer GPU spans if the destination is active References: https://bugs.freedesktop.org/show_bug.cgi?id=55500 Signed-off-by: Chris Wilson commit a0540ebff083974688c863e08203e3d71a297340 Author: Chris Wilson Date: Tue Nov 6 16:00:42 2012 +0000 sna/gen4: Remove a couple of old, now redundant, w/a flushes Signed-off-by: Chris Wilson commit aaaa6c356456a4bab595c6e6485893c538064e37 Author: Chris Wilson Date: Tue Nov 6 14:34:51 2012 +0000 sna/gen4: Flush after pipelined pointer updates (inverted logic!) Signed-off-by: Chris Wilson commit 28bda6707d979bca29dbea04e932819de204d920 Author: Chris Wilson Date: Mon Nov 5 22:30:29 2012 +0000 sna: Prevent use-after-free during partial move-to-gpu As we reuse the input parameter 'box' to hold the array of boxes that need to be migrated, we need to be careful that we do not later confuse it with the original input parameter. Otherwise, ==1315== Invalid read of size 2 ==1315== at 0x928B091: box_inplace (sna.h:506) ==1315== by 0x9292278: sna_pixmap_move_area_to_gpu (sna_accel.c:2554) ==1315== by 0x9292C14: sna_drawable_use_bo (sna_accel.c:2774) ==1315== by 0x9356C01: gen7_composite_set_target (gen7_render.c:2448) ==1315== by 0x9357AA2: gen7_render_composite (gen7_render.c:2800) ==1315== by 0x92DB12E: glyphs_to_dst (sna_glyphs.c:552) ==1315== by 0x92DEA8D: sna_glyphs (sna_glyphs.c:1664) ==1315== by 0x4F920E: damageGlyphs (in /tmp/Xorg) ==1315== by 0x4F2FF6: ProcRenderCompositeGlyphs (in /tmp/Xorg) ==1315== by 0x437260: Dispatch (in /tmp/Xorg) ==1315== by 0x426466: main (in /tmp/Xorg) ==1315== Address 0xd637054 is 20 bytes inside a block of size 208,464 free'd ==1315== at 0x4C2A2FC: free (in /usr/lib64/valgrind/vgpreload_memcheck-amd64-linux.so) ==1315== by 0x92CCFCD: __sna_damage_destroy (sna_damage.c:1469) ==1315== by 0x928AD74: sna_damage_destroy (sna_damage.h:284) ==1315== by 0x9291CB2: sna_pixmap_move_area_to_gpu (sna_accel.c:2470) ==1315== by 0x9292C14: sna_drawable_use_bo (sna_accel.c:2774) ==1315== by 0x9356C01: gen7_composite_set_target (gen7_render.c:2448) ==1315== by 0x9357AA2: gen7_render_composite (gen7_render.c:2800) ==1315== by 0x92DB12E: glyphs_to_dst (sna_glyphs.c:552) ==1315== by 0x92DEA8D: sna_glyphs (sna_glyphs.c:1664) ==1315== by 0x4F920E: damageGlyphs (in /tmp/Xorg) ==1315== by 0x4F2FF6: ProcRenderCompositeGlyphs (in /tmp/Xorg) ==1315== by 0x437260: Dispatch (in /tmp/Xorg) Reported-by: Matti Ruohonen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56591 Signed-off-by: Chris Wilson commit e62b0cbf958d1ad95e4522973253a1ae5c1a4da9 Author: Chris Wilson Date: Fri Nov 2 15:54:20 2012 +0000 sna: Add a small delay during startup if another master is still active There exists a race with plymouthd that can cause the drm device to reject us as the rightful master, and so cause X to fail to load. Try waiting for a couple of seconds for whatever it was to close before giving in. Signed-off-by: Chris Wilson commit e1a63de8991a6586b83c06bcb3369208871cf43d Author: Chris Wilson Date: Fri Nov 2 09:10:32 2012 +0000 sna/gen4+: Prefer GPU spans if the destination is active Trying to avoid using the inplace scanline rasteriser for large shapes. Signed-off-by: Chris Wilson commit 72bcd8f85c98502b13a67d9c606371afe513584c Author: Chris Wilson Date: Thu Nov 1 09:30:18 2012 +0000 sna: Try to reduce ping-pong migration for intermixed render/legacy code paths References: https://bugs.freedesktop.org/show_bug.cgi?id=56591 Signed-off-by: Chris Wilson commit 4e363906a5ef15e1eb0a387cfb6b3445ac185b9d Author: Chris Wilson Date: Wed Oct 31 22:58:59 2012 +0000 sna: Set a valid box when checking for GPU bo for BLT composite ops Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit b924831e445615b82a53b10e1849720e933eddfe Author: Chris Wilson Date: Wed Oct 31 22:55:56 2012 +0000 sna: Preserve mode if flushing before a scanline wait Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 678f9586807071bef813bb69d451f14d2fcbcc04 Author: Chris Wilson Date: Wed Oct 31 11:26:18 2012 +0000 sna: assert that the source is not the GTT mapping when uploading Signed-off-by: Chris Wilson commit 783b8048a6d1a9fd0a73ebf7768ae17dc0b21900 Author: Chris Wilson Date: Wed Oct 31 11:16:09 2012 +0000 sna: Prefer to use the GPU for uploads if continuing on the GPU Signed-off-by: Chris Wilson commit 74c912880c302889f38fe5898c8038a0ba20e5db Author: Chris Wilson Date: Wed Oct 31 10:57:54 2012 +0000 sna: Fix a typo in a DBG Reported-by: Matti Ruohonen Signed-off-by: Chris Wilson commit f48a821aa73cb40a51baafc6cd2b063f1f91d864 Author: Chris Wilson Date: Wed Oct 31 10:53:47 2012 +0000 sna: Add a few DBG tracepoints to screen init/fini Signed-off-by: Chris Wilson commit bf81d552c4be039fbcf3272387828b1a8b3fbdb8 Author: Chris Wilson Date: Wed Oct 31 08:50:44 2012 +0000 sna: Clamp the drawable box to prevent int16 overflow And assert that the box is valid when migrating. References: https://bugs.freedesktop.org/show_bug.cgi?id=56591 Signed-off-by: Chris Wilson commit 31eb704b2ad7c861ec4e61fb9de0e9592fc6d269 Author: Chris Wilson Date: Fri Oct 26 13:57:30 2012 +0100 sna: Ensure that the trap is clipped if it ends within the boundary pixel Reported-and-tested-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56395 Signed-off-by: Chris Wilson commit ef431b2d35c1bf4d77bbcc73688951d22f6aa135 Author: Chris Wilson Date: Thu Oct 25 10:15:39 2012 +0100 uxa: Drain the DRM event queue before server regeneration Adam Jackson notes that what appeared to be my paranoid ramblings in SNA actually served a purpose - it prevents a server crash following server regen if an indirect client happened to be running at the time (e.g. LIBGL_INDIRECT_ALWAYS=1 glxgears). Reported-by: Adam Jackson Signed-off-by: Chris Wilson commit efb8ff16491ecfb4d9c0c6a718684310d949d8d3 Author: Chris Wilson Date: Wed Oct 24 22:56:20 2012 +0100 sna: Add missing ValidatePicture() for flattening alphamaps Reported-by: Armands Liepins Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56367 Signed-off-by: Chris Wilson commit 1a489142c8e6a4828348cc9afbd0f430d3b1e2d8 Author: Chris Wilson Date: Tue Oct 23 23:43:50 2012 +0100 sna: Disable RandR hotplug events if Xinerama is enabled Since RandR itself is disabled if Xinerama is enabled, for example with ZaphodHeads, calling RRGetInfo() upon a hotplug event generates an assertion. Reported-by: Stephen Liang Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55260 Signed-off-by: Chris Wilson commit d87c2756db1af6e4af15864ab0f44d1454079236 Author: Chris Wilson Date: Tue Oct 23 15:50:56 2012 +0100 sna: Beware 16-bit overflow when computing sample areas Reported-by: Ognian Tenchev References: https://bugs.freedesktop.org/show_bug.cgi?id=56324 Signed-off-by: Chris Wilson commit c7f48684cdebc24128a5fa5678614af3deb14b3b Author: Chris Wilson Date: Tue Oct 23 15:17:56 2012 +0100 sna: Only disallow hw sprite scaling on Haswell Earlier chips (Ironlake, Sandybridge and Ivybridge) have integrated sprite scalers. Signed-off-by: Chris Wilson commit 5c3ea9cf6900855502fcd56214a1b9e180265ff5 Author: Chris Wilson Date: Mon Oct 22 22:35:17 2012 +0100 sna: Update DRI buffer if attached to the framebuffer for TearFree flips Signed-off-by: Chris Wilson commit 4dfc83359d006a4e410e3280003b49683309afc3 Author: Chris Wilson Date: Mon Oct 22 14:56:01 2012 +0100 sna: Tidy udev install/remove and add a couple of lines of DBG References: https://bugs.freedesktop.org/show_bug.cgi?id=55260 Signed-off-by: Chris Wilson commit 4d9687d49c9869b2e88d408e5f451c9a1f8f3389 Author: Chris Wilson Date: Mon Oct 22 13:41:54 2012 +0100 sna: Refactor the common code to enable a timer Signed-off-by: Chris Wilson commit fb729788872ccb429ddde8a9a4281b1933243096 Author: Chris Wilson Date: Sun Oct 21 14:36:48 2012 +0100 sna: Only query the system time if we are processing timers Signed-off-by: Chris Wilson commit c0d6a75f02eb97e5c80a4345ae5c68e9a81d49b6 Author: Chris Wilson Date: Sun Oct 21 14:32:14 2012 +0100 sna: Use the FLUSH_TIMER as the only wakeup timer source Signed-off-by: Chris Wilson commit 7bc829c39a203c17053eb728412f698a429ad9fe Author: Chris Wilson Date: Sun Oct 21 14:24:01 2012 +0100 sna: Remove the unused inactive eviction Signed-off-by: Chris Wilson commit 9fa6e4aa2daee99ff5f6efc11232de22100bac80 Author: Chris Wilson Date: Sun Oct 21 12:48:06 2012 +0100 intel: Sanity check that the platform probes points to a i915.ko GEM device References: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1069031 Signed-off-by: Chris Wilson commit f6eed98fcfea54d50a282ac71ee654645551ae11 Author: Chris Wilson Date: Sun Oct 21 10:46:14 2012 +0100 sna: Mark the to-be-damaged region first, then Process afterwards Damage is processed in two phases, with the actual Damage being appended before the operation is performed so that a copy can be made before modification (e.g. software cursors). Signed-off-by: Chris Wilson commit 60e4e009f90543bfd57f6a4e51ebc5b32b4af33b Author: Chris Wilson Date: Sat Oct 20 17:59:45 2012 +0100 sna: Move the source region to the CPU for a self-copy fallback CopyArea Signed-off-by: Chris Wilson commit 7ff8b1ba543508f3b209f2ade7655c3aa34d546d Author: Chris Wilson Date: Sat Oct 20 16:23:26 2012 +0100 2.20.12 release How embarrassing! My fault for rushing :( Signed-off-by: Chris Wilson commit 695b2ce2d32bde191080129b55f9bf8a9d48ee77 Author: Chris Wilson Date: Sat Oct 20 16:19:21 2012 +0100 uxa: Fixup drm_intel_bo_disable_reuse() typo Signed-off-by: Chris Wilson commit 2083e253b3d1ecc218ab1e523e4026ddd4561112 Author: Chris Wilson Date: Sat Oct 20 16:07:11 2012 +0100 2.20.11 release Signed-off-by: Chris Wilson commit fc0ba65f5efe217f2ab5e920255d2133d7c9e5e8 Author: Chris Wilson Date: Sat Oct 20 09:29:10 2012 +0100 uxa: Disable bo reuse after binding to a scanout On gen6+, bo are expected to be LLC by default. However, as using the bo for the scanout causes it to be moved into the uncached domain, this assumption is then false and we should release the bo back to the system rather than spread the uncached buffers around. The most common allocator of scanouts is for pageflipping which are already non-reusable due to the DRI2 export, so there should actually be little impact. Signed-off-by: Chris Wilson commit f4c32af48b0c92a48131090886a6a6b6c45dbe34 Author: Chris Wilson Date: Fri Oct 19 16:29:19 2012 +0100 sna: Clear the damage along with the BO when forcing the stall for inplace BLT Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56180 Signed-off-by: Chris Wilson commit 299232bdb69c8c2b6231905e0f45e9cfe74fe09a Author: Chris Wilson Date: Fri Oct 19 15:02:00 2012 +0100 sna: Reorder final checks for using the BO and setting the damage pointer When we return NULL from sna_drawable_use_bo(), the expectation is that the damage pointer is also NULL. However, one SHM path leaked. References: https://bugs.freedesktop.org/show_bug.cgi?id=56180 Signed-off-by: Chris Wilson commit 257abfdabe39629fb458ed65fab11283f7518dc4 Author: Chris Wilson Date: Wed Oct 17 23:34:22 2012 +0100 sna/gen4: Presume we need a flush upon state change similar to gen5+ References: https://bugs.freedesktop.org/show_bug.cgi?id=55627 References: https://bugs.freedesktop.org/show_bug.cgi?id=55500 Signed-off-by: Chris Wilson commit 8238c672984e31ae655353d6412e3395a9cdfbe6 Author: Chris Wilson Date: Wed Oct 17 22:16:29 2012 +0100 sna: secure batches accepted upstream, so simply use runtime detection Signed-off-by: Chris Wilson commit 540666a0a81c7daedbd47830d0932df5e57ec903 Author: Chris Wilson Date: Wed Oct 17 16:59:05 2012 +0100 sna/overlay: Move bo out of GTT domain after binding to overlay plane Signed-off-by: Chris Wilson commit 891bae4aa91e85542dcbe38f6ee92141e3efc801 Author: Chris Wilson Date: Wed Oct 17 11:29:10 2012 +0100 sna: Use the secure batches to program scanline waits on gen6+ Signed-off-by: Chris Wilson commit 41be80a8cae1eb0e294392e5033511bfdf2895c5 Author: Chris Wilson Date: Wed Oct 17 11:25:52 2012 +0100 sna: Enable support for SECURE batch buffers Signed-off-by: Chris Wilson commit ba6c82cd9d8089354b90632ca8edbb35cc09b9c4 Author: Chris Wilson Date: Wed Oct 17 13:54:51 2012 +0100 sna/dri: Defensively check for GTT mmap failure during fallback Signed-off-by: Chris Wilson commit 7927f9a351ead1a5593bc91e465706bdd889bb8d Author: Chris Wilson Date: Tue Oct 16 17:56:30 2012 +0100 sna/gen7: Filter BLEND flags for CA glyphs Fixes regression from commit c51aaa731e5cffc892e59730194ad7c98789b02b Author: Chris Wilson Date: Thu Oct 11 11:36:00 2012 +0100 sna/gen7: Replace bogus state tracking assertion The assumption being that we only used the encoded flags for determining the composite state is false for the magic CA pass. Reported-by: Oleksij Rempel Reported-by: Eyal Lotem Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56037 Signed-off-by: Chris Wilson commit 2ad4aa195571fe214ccffa55e123507f1be66243 Author: Chris Wilson Date: Tue Oct 16 11:59:28 2012 +0100 sna: Drop fake tiled CPU mapping The only path where this is correct already handles it as the special case that it is, everywhere else it just nonsense. Signed-off-by: Chris Wilson commit b42d81b63f5b6a571faffaadd42c74adce40128a Author: Chris Wilson Date: Sun Oct 14 09:15:38 2012 +0100 2.20.10 release Signed-off-by: Chris Wilson commit 877e9c57c788cb3d4db1e96e519b26ca5d542465 Author: Chris Wilson Date: Fri Oct 12 17:57:28 2012 +0100 sna/overlay: Trim suggested BestSize to fit within the overlay constraints As the maximum reported image sizes are for the source image, we should be careful not to recommend the application use an output Window larger than can be handled by the overlay hardware. So shrink it to fit, whilst preserving the aspect ratio. Signed-off-by: Chris Wilson commit 1ec41590c9d142a77a2fdcfcd9a762aca99d9d86 Author: Paulo Zanoni Date: Thu Oct 11 18:10:17 2012 -0300 Fix possible_clones computation for shared encoders between outputs Libdrm's possible_clones is a mask of encoders. Xorg's possible_clones is a mask of outputs, so we just can't do the following: output->possible_clones = kencoder->possible_clones; This is a problem on Haswell because, at least with the current patches floating on the mailing list, there is more than one connector per encoder. This patch writes the code to properly translate libdrm's encoder mask into Xorg's output mask. Signed-off-by: Paulo Zanoni Signed-off-by: Chris Wilson commit 0b92a5a3062d73666279e17ac2d711314bcd8dfe Author: Chris Wilson Date: Thu Oct 11 12:16:03 2012 +0100 sna: Correct a bogus assertion after inplace PutImage If we are forced to use the GPU bo as the target because the CPU bo is busy, the priv->cpu flag is likely to remain set, so we need to clear it rather than fail the assertion that is false. Signed-off-by: Chris Wilson commit c51aaa731e5cffc892e59730194ad7c98789b02b Author: Chris Wilson Date: Thu Oct 11 11:36:00 2012 +0100 sna/gen7: Replace bogus state tracking assertion Signed-off-by: Chris Wilson commit a56fa2fb4aad172be905c3abeefd987804553809 Author: Chris Wilson Date: Thu Oct 11 10:55:34 2012 +0100 sna: Rearrange switch to suppress a compiler warning in sna_copy_plane_blt() Hide the impossible default case so that static analyzers are not confused. Signed-off-by: Chris Wilson commit 94a98d1c472ce0fc7601421a2bcfbd0524d2bc93 Author: Chris Wilson Date: Thu Oct 11 08:42:21 2012 +0100 sna: Limit available space for gen2 Since pre-g33 chipsets impose massive alignment restrictions on objects within the aperture we need to further restrict the amount of available space to be sure we have sufficient room to accommodate the alignment. Signed-off-by: Chris Wilson commit d3ae85dd01952ecff7b780e30a43571146aa61ea Author: Chris Wilson Date: Wed Oct 10 17:27:38 2012 +0100 sna: Use high/low watermarks for fenced aperture counting This helps with fitting larger operations into the small apertures of gen2, which due to the lax accounting could trigger ENOSPC. Signed-off-by: Chris Wilson commit dadffd0061e2b14db397608e3cedfe9c76e546c8 Author: Dave Airlie Date: Thu Oct 11 14:30:29 2012 +1000 intel: fix fullscreen damage posting on pageflip While playing with MPX and sw cursor I noticed page flips won't end up misrendering some bits, so the sw cursor was replacing the bits on the wrong pixmap. Fix the damage handling to be correct and append damage before swapping the pointers and process damage after. This fixes misrendering with MPX cursors under a fullscreen compositor, that pageflips. Signed-off-by: Dave Airlie [ickle: The secret is that damage is sometimes reported before the rendering in DamageRegionAppend, and sometimes afterwards in DamageRegionProcessPending. For instance, the software cursor operates prior to being rendered over.] Signed-off-by: Chris Wilson commit a1ea19a3edaac6e1e5d240b75b7c5fdcfea0e0a8 Author: Chris Wilson Date: Wed Oct 10 23:20:13 2012 +0100 sna: Prevent sign-extension when manipulating strides Reported-by: Prit Laes Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55823 Signed-off-by: Chris Wilson commit d73f5b5bb1a81421f1fdc3ac3b460a8ad90be0ad Author: Chris Wilson Date: Tue Oct 9 19:41:10 2012 +0100 sna/gen6+: Initialize the damage for fill-boxes In case we need to redirect the rendering for a large render target, we need to initialize the damage pointer. Reported-by: Clemens Eisserer Bugzilla: ttps://bugs.freedesktop.org/show_bug.cgi?id=55812 Signed-off-by: Chris Wilson commit ae6ae91baa0574a7a23ab76afac5e2d827c49c20 Author: Chris Wilson Date: Tue Oct 9 18:36:59 2012 +0100 sna: Check the map exists before trying to release it Reported-by: Clemens Eisserer Bugzilla: ttps://bugs.freedesktop.org/show_bug.cgi?id=55812 Signed-off-by: Chris Wilson commit 8bbfa88a8691f6c1b2903090c3cd3159126ef563 Author: Chris Wilson Date: Tue Oct 9 17:26:39 2012 +0100 sna: Also check the bg rrop for reads when deciding upon fallback placement Reported-and-tested-by: chr.ohm@gmx.net Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55810 Signed-off-by: Chris Wilson commit f8a005d1f984382272ad10cabd88c0422d4e76e8 Author: Chris Wilson Date: Tue Oct 9 00:23:24 2012 +0100 sna: Pass the region, not its pointer, when moving the GC to the CPU Fortunately, the sgc->region was not used along that particular fallback path. Signed-off-by: Chris Wilson commit fb5205a86da09b344dbc20598655e917c263125c Author: Chris Wilson Date: Mon Oct 8 09:12:33 2012 +0100 sna/gen5: Flush pipelined ops when changing state When is a pipelined operation, not pipelined? That is the mystery posed by our hardware! Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51422 Signed-off-by: Chris Wilson commit bed64c998df538046d77eeea90598f48077dab5f Author: Chris Wilson Date: Mon Oct 8 00:13:03 2012 +0100 sna: Fix check_reloc_and_exec typo Garbage xorg includes hiding genuine compiler warnings ftl once again. Signed-off-by: Chris Wilson commit 2ac3776be85d857a57ce7b742e52cd6091d2befb Author: Chris Wilson Date: Sun Oct 7 22:41:25 2012 +0100 sna: Check that we have sufficient space for a copy when replacing a fill Reported-by: Timo Kamph Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55700 Signed-off-by: Chris Wilson commit 1a5d5b9ae5771d81da16222582acedb1557386c8 Author: Chris Wilson Date: Sun Oct 7 22:41:02 2012 +0100 sna: Check that for batch overflows after advancing a BLT Signed-off-by: Chris Wilson commit b41ecda69f2e6c9f8adf79dd24ded45740bcc015 Author: Chris Wilson Date: Sun Oct 7 22:39:36 2012 +0100 sna: Only reduce the maximum batch size for old kernels Be careful we not increase the batch size to span multiple pages on 865g! Signed-off-by: Chris Wilson commit 3ca7f8be5bcfec3c50c43bd485f0c57b931f8206 Author: Chris Wilson Date: Sun Oct 7 22:39:10 2012 +0100 sna/gen2: Count the number of dwords required for the invariant Signed-off-by: Chris Wilson commit 4d2dba0ba70c2b217a777243e8a89f7a5c5349a9 Author: Chris Wilson Date: Sun Oct 7 10:46:19 2012 +0100 Use path for intel-gen4asm derived from pkg-config As we use pkg-config to determine whether to use intel-gen4asm, we should also use it to locate the right version of intel-gen4asm to use. This allows the user to install the assembler in a non-standard path for cross-builds and similar. Reported-by: Josh Tripplet Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55646 Signed-off-by: Chris Wilson commit 249051d90fb0ab0bea5561a04ee2a5d0a2238ff1 Author: Chris Wilson Date: Sun Oct 7 09:33:06 2012 +0100 sna/gen2: And the other compile failure Typing on Sunday before coffee is a very bad idea. Signed-off-by: Chris Wilson commit d11a15f04dfaf8ba236d7255c52e67d8602ab806 Author: Chris Wilson Date: Sun Oct 7 09:30:38 2012 +0100 sna/gen2: Compile fix Be careful when cutting and pasting assertions! Signed-off-by: Chris Wilson commit d2a26adc8e7b02aea204101f207f740bbde62414 Author: Chris Wilson Date: Sun Oct 7 08:59:32 2012 +0100 sna/gen2: Add a couple of assertions to track down a batch overflow References: https://bugs.freedesktop.org/show_bug.cgi?id=55700 Signed-off-by: Chris Wilson commit 3680aa4976407886eb4be9878d5296d5a1fadccf Author: Chris Wilson Date: Fri Oct 5 12:33:32 2012 +0100 sna: Do not create an unsnooped CPU mapping for readbacks Otherwise we notice that we have a CPU mmap during read synchronized and presume that we need not take any further action. However... Signed-off-by: Chris Wilson commit d717a67ff4a59d0c2cc108cedbecdc20b4c9fb97 Author: Chris Wilson Date: Fri Oct 5 10:27:26 2012 +0100 configure: Make rebuilding of the gen4 assembly files explicit References: https://bugs.freedesktop.org/show_bug.cgi?id=55646 Signed-off-by: Chris Wilson commit 5b74a2dc5270094810ec0cf8039fd3b3ab0815b5 Author: Josh Triplett Date: Thu Oct 4 17:48:24 2012 -0700 Fix out-of-tree builds with intel-gen4asm installed The make rules to compile shaders with intel-gen4asm referenced the .g4a source files without using $(srcdir), which broke out-of-tree builds. Reference .g4a source files via $(srcdir), and add $(srcdir) to m4's include path, fixing out-of-tree builds. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55645 Signed-off-by: Josh Triplett commit 07a46333477898cfc2020ba5da9a6a7a866b21a7 Author: Chris Wilson Date: Fri Oct 5 10:17:45 2012 +0100 sna: Refactor the fallback CopyArea to use the common region computation Signed-off-by: Chris Wilson commit 3ad3a2d839f8e2f5b02f883e2b4131d4c0901fb0 Author: Chris Wilson Date: Thu Oct 4 15:14:08 2012 +0100 sna/gen2: Tidy DBG code for disabling composite operations Signed-off-by: Chris Wilson commit 6054f8e1120d499f70e7bd4809b3fc6994792bcb Author: Chris Wilson Date: Thu Oct 4 14:40:59 2012 +0100 sna: Remove another sna_pixmap->cpu assertion that was not true Signed-off-by: Chris Wilson commit acf354d7fb575c468e86a5935cad095015ccadb1 Author: Chris Wilson Date: Thu Oct 4 14:35:14 2012 +0100 sna: Propagate failures from compositing glyph masks So that we can fallback correctly. This is primarily using for debugging failure paths... Signed-off-by: Chris Wilson commit c7ad655359b746917deeac3efb9eb843465cf4b9 Author: Chris Wilson Date: Thu Oct 4 13:52:55 2012 +0100 sna/gen2: Prevent using the GTT maps with I915_TILING_Y on 855gm Signed-off-by: Chris Wilson commit 0a2c5eb7669c249194b41d624ca05654a8d7035b Author: Chris Wilson Date: Thu Oct 4 13:51:23 2012 +0100 sna: Once again look into assertions around sna_pixmap->cpu Revert back to basics, and clear the CPU flag everytime we use the GPU, rather than try to avoid clearing it along some paths. Signed-off-by: Chris Wilson commit 4d3b849c57d78f0447334c5c0871d8bd78e0af24 Author: Chris Wilson Date: Thu Oct 4 12:14:47 2012 +0100 sna: Avoid using the gpu for uploads whilst wedged Signed-off-by: Chris Wilson commit 4608e482615d4b4599608c7bc17ac8a9f9293840 Author: Chris Wilson Date: Thu Oct 4 11:23:36 2012 +0100 sna/gen2: Allow fine damage tracking for render operations Signed-off-by: Chris Wilson commit 83b8669abc7415202f9e0c764de675ffbcf45dac Author: Chris Wilson Date: Wed Oct 3 23:45:28 2012 +0100 sna/gen2: Setup invariant blend arguments I thought these were completely specified via the LOAD_STATE_IMMEDIATE commands we used whilst seting up the render pipeline. I was wrong. Reported-by: Timo Kamph References: https://bugs.freedesktop.org/show_bug.cgi?id=55455 Signed-off-by: Chris Wilson commit b71af5dc626adfdf7d753e8e61fb13e8b9290d17 Author: Chris Wilson Date: Wed Oct 3 22:53:57 2012 +0100 sna: Clear sna_pixmap->cpu when destroying the CPU damage So that we keep the assertion checks that without CPU damage we can not be on the cpu. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55591 Signed-off-by: Chris Wilson commit 0d42872d1e0bab1808c0a544c7ece049da103825 Author: Chris Wilson Date: Wed Oct 3 14:42:19 2012 +0100 sna: Protect against undefined O_CLOEXEC Reported-by: Giovanni Mariani Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55577 Signed-off-by: Chris Wilson commit a683643ebf9120bd73a7cd740b5fb24f7e8e797b Author: Chris Wilson Date: Wed Oct 3 14:13:13 2012 +0100 sna: Fix an instance of undamaged tracking Signed-off-by: Chris Wilson commit 47c76bb9680eee89d1cef86058782a7073ca4a47 Author: Chris Wilson Date: Wed Oct 3 14:12:50 2012 +0100 sna/gen7: Tidy detection of unbounded render op Signed-off-by: Chris Wilson commit 3e770f09dbe76287293fea0a8a1f231885aa1c1f Author: Chris Wilson Date: Wed Oct 3 13:00:25 2012 +0100 sna/dri: Delay the deactivation of the pageflipping As we need to clflush the scanout buffer as we return it to the bo cache on SNB+, it is costly to terminate the pageflipping as soon as we drop a frame as mesa often fails to keep up to the vrefresh rate. Signed-off-by: Chris Wilson commit b3a502a7057649b284601bdd5110b136ab1f5fbb Author: Chris Wilson Date: Wed Oct 3 11:46:57 2012 +0100 sna: Review sna_pixmap->cpu tracking Notably 52b211cb15b3 was triggering a few assertions. Signed-off-by: Chris Wilson commit bf44d9965b5cc0f0ee31ba2579783d8194fff756 Author: Chris Wilson Date: Tue Oct 2 12:22:51 2012 +0100 sna: Prevent sna_damage_contains_box__no_reduce() from a NULL deref Signed-off-by: Chris Wilson commit 0ae6c2ccb006a99e8d7bbfff77f98cc58f62ce2f Author: Chris Wilson Date: Tue Oct 2 11:44:16 2012 +0100 sna: Actually upload the damage when replacing a busy CPU bo for PutImage Reported-by: Roman Jarosz Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55508 Signed-off-by: Chris Wilson commit 52b211cb15b3bfe33a61cafcd8dcc1c9fbf20243 Author: Chris Wilson Date: Mon Oct 1 23:55:37 2012 +0100 sna: Tweak CPU damage partial upload paths Signed-off-by: Chris Wilson commit 1fc3fa699c0b4cae5259d9e439f84ede4a6012b2 Author: Chris Wilson Date: Mon Oct 1 22:42:26 2012 +0100 sna: Avoid accumulating damage to the CPU if it is already damaged Signed-off-by: Chris Wilson commit 8c2821d77c4b3bdd4d40d4a2c69f935a9eb0fd47 Author: Chris Wilson Date: Tue Oct 2 11:31:40 2012 +0100 sna: Remember to call ValidatePicture() before using newly created Pictures Reported-by: Marco De Michele Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55527 Signed-off-by: Chris Wilson commit 51202798862c79ad417936cfe2d1847b1da4ab87 Author: Chris Wilson Date: Mon Oct 1 13:06:42 2012 +0100 uxa: Remove USE_GLAMOR check from unrealize glyph caches In an interesting twist during teardown, the driver info structure is freed long before the caches. However, the glyph cache teardown was checking to see if glamor was enabled to see if it could skip the teardown. In fact, since we won't have created the glyph caches in that circumstances it was safe any way. Reported-by: Maarten Lankhorst Signed-off-by: Chris Wilson commit ba1dea5e373b8d7b410c07df897acc4d11079f63 Author: Chris Wilson Date: Mon Oct 1 11:19:41 2012 +0100 sna/gen2: Clear STIPPLE setup before rendering with the 3D pipeline One over-zealous removal too many. Reported-by: Timo Kamph Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55455 Signed-off-by: Chris Wilson commit eec12faf82370a8540114287c224953aa66d7bd9 Author: Chris Wilson Date: Sun Sep 30 18:39:06 2012 +0100 sna/dri: Check back/front buffers of a pixmap for format change Highly unlikely. Signed-off-by: Chris Wilson commit 8e23251aad6d56a59e626b623e59bafac3143562 Author: Chris Wilson Date: Sun Sep 30 13:52:34 2012 +0100 sna: Cache repeated use of the temporary CPU mapping for tiled_x uploads Fixes ShmPutImage regression under gnome-shell Signed-off-by: Chris Wilson commit 1756cf4d8e80cea47a28786c51cac4a760d6d0cf Author: Chris Wilson Date: Sun Sep 30 12:26:23 2012 +0100 sna/dri: Only chain to a triple buffer pageflip sequence Signed-off-by: Chris Wilson commit ba525463fb91900e775c91a54368a9e8b270268b Author: Chris Wilson Date: Sun Sep 30 09:03:36 2012 +0100 sna/dri: Improve handling of async/sync pageflip transition Signed-off-by: Chris Wilson commit 2eab5ef751d7e9caabd7df171cdbb5e784059998 Author: Chris Wilson Date: Sun Sep 30 08:49:34 2012 +0100 sna: Make sure the CPU bo is destroyed if we fail to mmap it during alloc Signed-off-by: Chris Wilson commit 45b351412b8ba81f4fef2f64540d87cbf16359fd Author: Chris Wilson Date: Sat Sep 29 21:21:18 2012 +0100 sna: set_cacheing returns a bool not an error-code Signed-off-by: Chris Wilson commit 33f6f753788398efdf20cde4aa0b4ca402eee8fe Author: Chris Wilson Date: Sat Sep 29 16:41:00 2012 +0100 sna/dri: Swallow error from GetMSC Just ignore the error return from WaitVBlank and make up a value for last MSC/SBC similar to an unattached Drawable. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55395 Signed-off-by: Chris Wilson commit a873f6d354ebbc52265e686b614027f537a6363a Author: Chris Wilson Date: Sat Sep 29 16:01:58 2012 +0100 sna: Release the front buffer and drop DRM master early during shutdown If we delay the dropping of DRM master we may complete a VT switch before we are ready and so prevent a second X server from reacquiring master, and dying. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55446 Signed-off-by: Chris Wilson commit a192f8cbc238d84e058b01b7682abe7ef09d3508 Author: Chris Wilson Date: Sat Sep 29 10:51:00 2012 +0100 2.20.9 release Signed-off-by: Chris Wilson commit 16860d448f11ba405050bd1ff02dc63a4b26280c Author: Chris Wilson Date: Sat Sep 29 10:40:51 2012 +0100 uxa: Only destroy the bufmgr if it exists Be wary in case the Screen is destroy before we initialise bufmgr. Signed-off-by: Chris Wilson commit 13f7a9e267fbefd3326569e89b840bef31d77996 Author: Chris Wilson Date: Fri Sep 28 09:25:12 2012 +0100 sna: Restore LLC cache level after using a buffer for scanout (uncached) Signed-off-by: Chris Wilson commit 8bfd31e9bb13bcb7f12e4147bec0da87b8e87dde Author: Chris Wilson Date: Thu Sep 27 18:12:11 2012 +0100 sna/dri: Improve handling of flipping with no outputs Signed-off-by: Chris Wilson commit dddb6e4e63d5cc8b2a1f2ae3ff287922d30460b9 Author: Chris Wilson Date: Thu Sep 27 17:17:30 2012 +0100 sna: Attempt to restore the current mode if pipe is disabled on DPMS on If we attempt to power up the pipe through a DPMS request, but it was previously disabled due to an error, first try re-enabling. Signed-off-by: Chris Wilson commit 88cfd23379950d1fe4e682519c48ef6e3091c2f3 Author: Chris Wilson Date: Thu Sep 27 16:16:39 2012 +0100 uxa: Update mode->fb_id after completing pageflips As intel_crtc_on() depends upon the current value for determining if the pipe is active, we can only change the value afterwards. Signed-off-by: Chris Wilson commit 83990c649cbd3cb563d08f04e1c02232c44997aa Author: Chris Wilson Date: Thu Sep 27 14:58:26 2012 +0100 Remove the last couple of references to mibstore Signed-off-by: Chris Wilson commit cb0b72c4fbb7b1bc941522d8679fef856f2f8936 Author: Chris Wilson Date: Thu Sep 27 14:53:46 2012 +0100 uxa: Fixup the last couple of commits after realising I didn't have uxa enabled Signed-off-by: Chris Wilson commit feef53005b57d6b4489a15f8d0db8245dcb0cfaa Author: Chris Wilson Date: Thu Sep 27 13:36:55 2012 +0100 uxa: Do not attempt to pageflip whilst not master Signed-off-by: Chris Wilson commit 5a45cbacb777e478d8fbda9223b0fb5c705d7249 Author: Chris Wilson Date: Thu Sep 27 13:31:27 2012 +0100 uxa: Confirm the pipe is alive before flipping Signed-off-by: Chris Wilson commit edc5b7f741a4bb8e9a58b5eb2201fa9304f94ef7 Author: Chris Wilson Date: Thu Sep 27 13:27:20 2012 +0100 uxa/dri: Confirm Drawable is still attached to an active pipe before flipping If we schedule a flip to happen on a far distant vblank, it is possible for us to disable the pipes with a modeset, whilst maintaining the fb size, or with a DPMS command. If the pipe is disabled and we still try to flip, then we trigger an EINVAL error from the kernel. Signed-off-by: Chris Wilson commit eb667378543f97d7c7e7767daddbd9b39e07c1f8 Author: Chris Wilson Date: Wed Sep 26 15:12:57 2012 +0100 sna: Typo in DBG Signed-off-by: Chris Wilson commit 557ad78d02dfff3db9e7fc21f05230a8fe482f7c Author: Chris Wilson Date: Wed Sep 26 15:02:17 2012 +0100 Kill mibstore pretend backwards compatibility Adam Jackson was kind enough to point out that mibstore had been a no-op since xorg-1.4 and the earliest we claim to support is xorg-1.6. Signed-off-by: Chris Wilson commit 367f57faf2c422da026a25c099426dc750cf3759 Author: Chris Wilson Date: Wed Sep 26 14:06:18 2012 +0100 sna/video: Force integer promotion to avoid u16 overflow for frame size Signed-off-by: Chris Wilson commit 34772cb0e724a880a8c6db936c0bb5dd129398f2 Author: Chris Wilson Date: Wed Sep 26 12:09:39 2012 +0100 sna/dri: Handle pending flips when drawable disappears. The async case needs special handling as the current front buffer may be pending a flip onto the scanout which needs to be completed even if the Drawable is destroyed. Fixes regression from commit ad877abdc70b842afd202b2f97892d97a0b8d151 Author: Chris Wilson Date: Sat Jul 7 17:48:52 2012 +0100 sna/dri: Attach the chain of frame events to the Window, not pixmap Signed-off-by: Chris Wilson commit addfa653cf51fa45c7eae49be1fd722aaadf97d6 Author: Chris Wilson Date: Wed Sep 26 08:59:18 2012 +0100 uxa: Prevent attempting to call intel_mode_fini() before PreInit runs In the Ubuntu xserver it is apparently possible for the Screen to be deleted prior to being fully initialised. Make sure we don't crash in that situation! Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55346 Signed-off-by: Chris Wilson commit b880d8e0a9a32acd50333f72d695268c4819c29e Author: Chris Wilson Date: Tue Sep 25 16:59:20 2012 +0100 sna/gen5: Add WA reference Signed-off-by: Chris Wilson commit 74f930fd80c3f97a1b6213e9e79e02f8f51c64b9 Author: Chris Wilson Date: Tue Sep 25 15:41:51 2012 +0100 sna: Make sure the batch is flushed before setting DPMS Just in case on the off-chance that the kernel modifies the pipe and we had a pipe-dependent operation in the batch. Signed-off-by: Chris Wilson commit 0a00c3765c3ba464bb4e9cde12e964c979421ed6 Author: Chris Wilson Date: Tue Sep 25 13:50:33 2012 +0100 sna: Accommodate changes to the Damage extension not unwrapping the GC commit 4dc2a76740d921c824a4d8193f39dd373475f02a Author: Adam Jackson Date: Thu Sep 20 17:57:00 2012 -0400 miext/damage: Only wrap into the GC ops chain if there's a listener (v3) leaves the GC->funcs still pointing to the damage layer as it calls into the driver functions, so we need to be careful to restore the correct function table after we manipulate the GC for fallbacks. Signed-off-by: Chris Wilson commit 8f5a6d107bb30fa218ff3c1d07532ca834b82edc Author: Chris Wilson Date: Tue Sep 25 13:36:12 2012 +0100 Add miInitializeBackingStore() to compat-api.h Signed-off-by: Chris Wilson commit dee133a722fb137767a78b244a312620f52a51b1 Author: Chris Wilson Date: Tue Sep 25 13:22:40 2012 +0100 sna: Remove unused reference to mibstore.h, removed in future Xorg Signed-off-by: Chris Wilson commit f0dbfc20aaa9b47329438ce42150770d4d7934c3 Author: Chris Wilson Date: Tue Sep 25 13:22:21 2012 +0100 sna/dri: Fixup a DBG statement not to print gibberish Signed-off-by: Chris Wilson commit c6008068372709c73034163eddc902b47bf87d24 Author: Chris Wilson Date: Sun Sep 23 21:42:31 2012 +0100 sna: Check against op->dst.bo rather than priv->cpu_bo for composite upload In this case, we may also be handling an unattached pixmap, so avoid the deferences of the sna_pixmap unless we are sure it will exist. Signed-off-by: Chris Wilson commit 5ed840881c26e90eb8e00521b6d77b0ea514de5e Author: Chris Wilson Date: Sun Sep 23 20:29:21 2012 +0100 sna: Check that the CPU bo exists before declaring it is busy along upload Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=55251 Signed-off-by: Chris Wilson commit a858afc66c1fa2eec65a7041e991f2266f82deca Author: Chris Wilson Date: Sun Sep 23 13:49:40 2012 +0100 Silence a couple of potential compiler warnings Signed-off-by: Chris Wilson commit 9326acc2917109f06dda809107c8fa5a2273c3d2 Author: Chris Wilson Date: Sun Sep 23 13:40:04 2012 +0100 Allow compilation of a separate i810 driver Allow --enable-ums-only as a counter-option to --enable-kms-only in case the distribution wishes to enable a non-root KMS driver but also offer a separate UMS driver for i81x. On the second pass, use "--enable-ums-only --disable-uxa --disable-sna" to get the trimmed down unaccelerated i810 support. Signed-off-by: Chris Wilson commit 0afb7efe8c48b5fc839e2137e870bea0f5fb3c9c Author: Chris Wilson Date: Sun Sep 23 09:41:59 2012 +0100 sna: Avoid overflows when translating the box16 extents during a copy Signed-off-by: Chris Wilson commit 0fc6e5820e4543d52bcf8d0285ca6f69b5213831 Author: Chris Wilson Date: Sun Sep 23 09:32:49 2012 +0100 sna: Add missing protection against int16 overflow when copying Signed-off-by: Chris Wilson commit c2ca1c5abca687adb08d6e137bc3b70bdecb083d Author: Chris Wilson Date: Sun Sep 23 08:56:50 2012 +0100 Reorder INTEL_XVMC define so that we pick up Option "XvMC" Otherwise it will remain disabled. Reported-by: Giacomo Comes Signed-off-by: Chris Wilson commit 92dbedc6138b923aa473935013ecb0346280c4d3 Author: Chris Wilson Date: Sat Sep 22 08:56:49 2012 +0100 sna: Force the stall before trying to upload into a busy CPU bo Under the circumstances where we can not instead stream the write into the GPU bo, we need to use the busy CPU bo. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54978 Signed-off-by: Chris Wilson commit 3e1be265cf950976b5929b14a9dad0664deaa2c1 Author: Chris Wilson Date: Fri Sep 21 17:37:58 2012 +0100 sna: Force an inplace upload if already wedged Signed-off-by: Chris Wilson commit b8967aff382c1b6bef2335dea51c979a3f0800c7 Author: Chris Wilson Date: Fri Sep 21 12:16:27 2012 +0100 sna: Do not query for the NULL edid property If the EDID blob id is set to 0, that means that it does not exist and so we can safely skip it. References: https://bugs.freedesktop.org/show_bug.cgi?id=55193 Signed-off-by: Chris Wilson commit 0be1d964713ca407f029278a8256d02d925dc9da Author: Chris Wilson Date: Tue Sep 11 21:48:24 2012 +0100 sna: Use inplace X tiling for LLC uploads Based on a suggestion by Chad Versace (taken from a patch for mesa). This allows for a faster upload of pixel data through a ShmImage, or for complete replacement of a GPU bo. Using a modified version of x11perf to upload to a pixmap rather than scanout on an IVB i7-3720qm: Before: 40000000 trep @ 0.0007 msec (1410000.0/sec): ShmPutImage 10x10 square 4000000 trep @ 0.0110 msec ( 90700.0/sec): ShmPutImage 100x100 square 160000 trep @ 0.1689 msec ( 5920.0/sec): ShmPutImage 500x500 square After: 40000000 trep @ 0.0007 msec (1450000.0/sec): ShmPutImage 10x10 square 6000000 trep @ 0.0061 msec ( 164000.0/sec): ShmPutImage 100x100 square 400000 trep @ 0.1126 msec ( 8880.0/sec): ShmPutImage 500x500 square However, the real takeaway from this is that the overheads for ShmPutImage are substantial, only hitting around 70% expected efficiency, and overshadowed by PutImage, which for reference is 60000000 trep @ 0.0006 msec (1800000.0/sec): PutImage 10x10 square Signed-off-by: Chris Wilson commit d853064e7eebc5719645c12605782f995131a6fe Author: Chris Wilson Date: Thu Sep 20 22:43:26 2012 +0100 sna/gen3+: Trim the target extents to the CompositeClip When computing the active region with of a composite operation with unknown extents we try to simply use the whole Drawable. However, this needs to be clipped otherwise it may trigger assertion failure with an offscreen pixmap. References: https://bugs.freedesktop.org/show_bug.cgi?id=55164 Signed-off-by: Chris Wilson commit 853beff4306d5a168e310af82d0ddf9db319fdce Author: Chris Wilson Date: Wed Sep 19 08:30:59 2012 +0100 sna/dri:Add some DBG and assertions to validate names passed back to clients Signed-off-by: Chris Wilson commit 8c1e60a15431b193b57d94a27b8e8de7c5a7e683 Author: Chris Wilson Date: Tue Sep 18 15:01:52 2012 +0100 sna: Add some asserts useful for tracking an xserver drawing bug Signed-off-by: Chris Wilson commit cd23ac69ffb670468b2993242ce0d596081bbca4 Author: Chris Wilson Date: Tue Sep 18 13:39:33 2012 +0100 sna/gen7: Add some ring switching sanity checks Signed-off-by: Chris Wilson commit 22c84d02ade83c39940d76fc616a9122e535606a Author: Chris Wilson Date: Tue Sep 18 12:01:49 2012 +0100 sna: Remove special casing of drawing depth=1 glyphs It turns out that they were not so special after all, and the "fast path" was missing the important handling such as validating the GC. As a result we ended up trying to render the glyphs through a planemask of 0 and similar garbage resulting in corruption. An example given by Kaus Dittrich was the use of rotated glyphs in gnuplot. Reported-by: Klaus Dittrich Signed-off-by: Chris Wilson commit 71fa350325bb06a6141f89ef14431d96f0c4956a Author: Chris Wilson Date: Mon Sep 17 13:40:24 2012 +0100 sna: Check that we do not keep a GPU bo around after flushing a ShmPixmap Signed-off-by: Chris Wilson commit 88502b32d5d2b826fc08344392c98300341410e1 Author: Chris Wilson Date: Sun Sep 16 09:02:46 2012 +0100 2.20.8 release Signed-off-by: Chris Wilson commit 395d738b5086f24659b56b4b3536bffaebad8a3e Author: Chris Wilson Date: Sat Sep 15 21:18:35 2012 +0100 sna: Improve handling of probe failure during initialisation Signed-off-by: Chris Wilson commit fe78904a45979d47bb092ce37d321854e2418344 Author: Chris Wilson Date: Thu Sep 13 22:15:14 2012 +0100 Add basic support for ValleyView Bind to the ValleyView SDV for verifying the render routines. Signed-off-by: Chris Wilson commit 3b9259f7cedc179617bc24b3912d2d8d75c5a824 Author: Ian Stakenvicius Date: Fri Sep 14 21:04:42 2012 +0100 configure: Make udev dependency optional In order to support buildbots where the udev headers may exist on the build system but not the target, we need explicit control over optional dependencies. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54942 commit d995705fb01842652a79076cbecee4392f653bfe Author: Chris Wilson Date: Fri Sep 14 19:32:06 2012 +0100 sna: Only discard CPU damage if we completely overwrite its extents If we are performing a clipped copy, then we must be careful not to completely discard the CPU damage as it may not be entirely replaced. Reported-by: Roman Jarosz Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54937 Signed-off-by: Chris Wilson commit deacab87e4ba7fe09f0f16568dc2848949f2707a Author: Chris Wilson Date: Fri Sep 14 17:01:13 2012 +0100 sna/dri: flip->next_front.bo is owned by the DRI drawable not by the flip Be careful not to delete the reference we presume we hold as it is borrowed from the DRI drawable. Signed-off-by: Chris Wilson commit 5369408d596a0611d4f76333dac2e1c93e63e8b6 Author: Chris Wilson Date: Fri Sep 14 16:12:00 2012 +0100 sna/dri: And the hunt for the use-after-free continues... Signed-off-by: Chris Wilson commit 8e9d64203428b344433ac8f86dc1f06d2c32529a Author: Chris Wilson Date: Fri Sep 14 14:06:38 2012 +0100 sna: Fix typo for sna_render_picture_flatten() Pass it the correct value for the pixmap height, and not its 'y' coordinate! Reported-by: Eugene Rosenzweig Bugzilla: https://bugs.gentoo.org/show_bug.cgi?id=434860 Signed-off-by: Chris Wilson commit 6ee9969f0e99975a24e113af9591909d9023d8af Author: Chris Wilson Date: Fri Sep 14 13:04:50 2012 +0100 sna/dri: Update AsyncSwap for recent changes in tracking DRI drawables Signed-off-by: Chris Wilson commit d2dbb991384f2b820a714eba262691ed97a6a22a Author: Chris Wilson Date: Fri Sep 14 13:04:14 2012 +0100 sna/dri: Add a bunch of assertions for hunting a use-after-free Signed-off-by: Chris Wilson commit d8756091474aeb44e5d8eed6b20b65c23b6574e7 Author: Chris Wilson Date: Fri Sep 14 12:17:28 2012 +0100 sna/dri: Version bump for prototypical AsyncSwap Signed-off-by: Chris Wilson commit 0fc3d020f3086b5c6ecef1fed1aaedef7aa52b01 Author: Chris Wilson Date: Fri Sep 14 09:49:00 2012 +0100 Skip adding unknown special modes In light of the discussion on how to add stereo modes it was revealed that we would happily add modes with unknown and unhandled strange flags. Adam Jackson mentioned that he has plans to fix that with some upcoming work, but as a first step we can simply eradicate them whilst pondering how to support the stereoscopic vision of the future. Signed-off-by: Chris Wilson commit 35d81d97b38d05f132a4823e57fff4012e966504 Author: Chris Wilson Date: Thu Sep 13 22:32:47 2012 +0100 sna/gen7: Defensively program default GT values Signed-off-by: Chris Wilson commit 3fbdedbf9d509c5ca58ae0a01fe8e54dcc990cf8 Author: Chris Wilson Date: Thu Sep 13 22:10:08 2012 +0100 sna: Fix analysis of source extents for BLT composite After we have computed the source offset vector for the transformed source bo, we need to use that with respect to the destination rectangle to verify that the source sample is wholly within bounds. Signed-off-by: Chris Wilson commit 6c7f998f7bda4f4f1286e079412d5d3a5b2eb073 Author: Chris Wilson Date: Thu Sep 13 20:41:23 2012 +0100 sna: Fix BLT composite offset Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54868 Signed-off-by: Chris Wilson commit 2575cd0d236b4e1694e3185a487ebfd8bfe6499f Author: Chris Wilson Date: Thu Sep 13 20:08:37 2012 +0100 sna: Avoid corrupting the CPU bo when compositing fallback data through BLT Signed-off-by: Chris Wilson commit 5781de2e5ab0d7e8e62965bda714789879555ed4 Author: Chris Wilson Date: Thu Sep 13 19:53:29 2012 +0100 sna/gen3: Tidy NO_COMPOSITE debugging Signed-off-by: Chris Wilson commit dd1432b2c00c94ac75af4740b66b5cd1a573e261 Author: Chris Wilson Date: Thu Sep 13 19:47:29 2012 +0100 sna: Do not attempt to change tiling if wedged The caller will just have to live with the current tiling, which should be fine in most cases, in other cases the gpu is wedged... Signed-off-by: Chris Wilson commit 8c7dd2219fa777bf6354c4e0ef38a2f09fe09675 Author: Chris Wilson Date: Thu Sep 13 17:14:23 2012 +0100 sna: Prefer to use indirect uploads for very small updates Signed-off-by: Chris Wilson commit d87a56ed1789e0c5058b302bb930d7e952ff3e5e Author: Chris Wilson Date: Thu Sep 13 09:57:30 2012 +0100 sna: Teach sna_replace__xor() how to tile large uploads This path is hit using eog+cairo-1.10 and a large image, e.g. http://marsrovers.jpl.nasa.gov/gallery/press/opportunity/20120705a/PIA15689_Greeley_Pan_wDeck_L257F.jpg Reported-by: Michael Laß Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54808 Signed-off-by: Chris Wilson commit 58a96f0f684fe0d7d1a7890c630539ef8b065d1e Author: Chris Wilson Date: Wed Sep 12 23:53:44 2012 +0100 sna: Also remove bogus assertion from sna_replace__xor() Like the assertion in sna_replace() this is now incorrect due to the automatic flagging of large bo with flush. Signed-off-by: Chris Wilson commit 6069e78238ca57e3433d528680fe04766a1e5307 Author: Chris Wilson Date: Wed Sep 12 16:22:49 2012 +0100 sna: Keep a very small, short-lived cache of large buffers As we now regularly retire and so discard the temporary large buffers, we find them in short supply and ourselves wasting lots of time creating and destroying the transient buffers. Signed-off-by: Chris Wilson commit 1e2a03ad19664e846ece4110e53d26babb5a2159 Author: Chris Wilson Date: Wed Sep 12 16:15:22 2012 +0100 sna: Propagate busyness when creating the proxy Signed-off-by: Chris Wilson commit e28f5a2537821dc170a7ef78bf33ecbd3c032da0 Author: Chris Wilson Date: Wed Sep 12 15:21:27 2012 +0100 sna: Add some DBG as to why kgem_check_bo() flushes Signed-off-by: Chris Wilson commit 1af1dae1feefd6567017170bab241570fb528e5c Author: Chris Wilson Date: Wed Sep 12 15:20:49 2012 +0100 sna: Ensure tiling upload buffers are trimmed to fit in the cache Signed-off-by: Chris Wilson commit e5f137807c318588f546960668345eef34159e26 Author: Chris Wilson Date: Wed Sep 12 14:11:43 2012 +0100 sna: Avoid fallbacks to shadow pixels if FORCE_GPU is in effect References: https://bugs.freedesktop.org/show_bug.cgi?id=54808 Signed-off-by: Chris Wilson commit 0d17208a66a7e54d4106f8a4034d3a928e28bb62 Author: Chris Wilson Date: Wed Sep 12 14:04:50 2012 +0100 sna: Avoid readback inplace if the target is unmappable We have to use the tiling indirect path, or else fail. References: https://bugs.freedesktop.org/show_bug.cgi?id=54808 Signed-off-by: Chris Wilson commit 4b4abdaae94d164d5d0b2755907e76b9cbe0c988 Author: Chris Wilson Date: Wed Sep 12 13:47:26 2012 +0100 sna: Flush after operating on large buffers As we know that such operations are likely to be slow and consume precious GTT space, mark them as candidates for flushing. Signed-off-by: Chris Wilson commit 15911f533d6a7ef40e42ba5921fac7c62b290f8b Author: Chris Wilson Date: Tue Sep 11 14:59:53 2012 +0100 prime: Reorder probe messages so that the driver prefix is correct Signed-off-by: Chris Wilson commit bc73acbd4da53bc50752c0413adcd0ce876e0a03 Author: Chris Wilson Date: Mon Sep 10 18:55:04 2012 +0100 uxa: Error out after failing to become DRM master during PreInit As we set the card fd to -1 upon failure, the error here is non-recoverable, so make sure it gets propagated and we abort loading the intel ddx. Bugzilla: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/962892 Signed-off-by: Chris Wilson commit b0d14071f7b60729c223af925935227393fbd3ee Author: Chris Wilson Date: Mon Sep 10 13:53:45 2012 +0100 sna: Workaround issue with global glyph privates and shared ZaphodHeads Under ZaphodHeads we end up with multple screens accessing the common sna_glyph_key and so cause conflicting updates and erroneous references into the screen-local texture atlases. Two approaches can be tried here. Transition to a screen-specific private key introduced with xorg-1.13, or to move the glyph cache (and the rest of the gpu state tracker) down into the device private rather than screen private. This is neither of those, but a workaround to avoid reusing the incorrect entries from shared screens. Reported-by: Stephen Liang Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54707 Signed-off-by: Chris Wilson commit cfa0c6162bbd2f6edab1301b6aed886af7e8ab38 Author: Chris Wilson Date: Mon Sep 10 10:50:03 2012 +0100 sna: Fixup possible_crtcs for ZaphodHeads As the possible_crtcs is a bitmask of the available crtcs exposed to the Xserver, we need to adjust it for the limited view given by Zaphod mode. Signed-off-by: Chris Wilson commit 95c71d1626dfbd97733e7e7e03fdde3af833446e Author: Chris Wilson Date: Sat Sep 8 20:12:32 2012 +0100 NEWS: Fix version reference 'bugs since 2.20.6'! Signed-off-by: Chris Wilson commit 0659711dfa9c9fc52adeaba766049887d5b6f040 Author: Chris Wilson Date: Sat Sep 8 20:01:32 2012 +0100 2.20.7 release Signed-off-by: Chris Wilson commit 2c8e48f8149499040342836491333402fd05b762 Author: Chris Wilson Date: Fri Sep 7 23:00:47 2012 +0100 sna: Remember that LineDoubleDash involves updating the GC between segments Signed-off-by: Chris Wilson commit ed7b8db24921dc0bb6ea59dacf35ea41a61d59bf Author: Chris Wilson Date: Fri Sep 7 22:12:17 2012 +0100 sna: Pass the hints down to the PolyPoint fallback Signed-off-by: Chris Wilson commit 6c9df48fa8f1ac93103ce771ae28f47faa321619 Author: Chris Wilson Date: Fri Sep 7 22:05:19 2012 +0100 sna: Fix PolyPoint fallback through a complex clip Signed-off-by: Chris Wilson commit 7d76eb155ed78343abfa15b7c8af87fc3d4211e4 Author: Chris Wilson Date: Fri Sep 7 18:06:25 2012 +0100 sna: First scan for a backlight associated with the device The goal is to find the right interface in a multi-GPU system. Signed-off-by: Chris Wilson commit 2de7d2d8150d648815feb74a3ae2239b908b971e Author: Chris Wilson Date: Fri Sep 7 16:56:33 2012 +0100 sna/prime: Fixup attaching the randr14 scanout pixmap Signed-off-by: Chris Wilson commit 448808d8a4e78afa7fe90e318d6d7afdbff66190 Author: Chris Wilson Date: Fri Sep 7 14:31:52 2012 +0100 prime: Allocate a GPU_SCREEN when not primary to fulfil the output sink role Signed-off-by: Chris Wilson commit 3dce661ef3df5558fe9c9d85324ab3395a37b7ea Author: Chris Wilson Date: Fri Sep 7 13:48:12 2012 +0100 sna: And remember to update the ScreenPixmap after resize Fixes the regression from the previous commit Signed-off-by: Chris Wilson commit 0c39c363d7235d03f27337c731c0ffe3369bf713 Author: Chris Wilson Date: Fri Sep 7 13:07:52 2012 +0100 sna: Protect sna_crtc_resize() against early invocation with no RootWindow If the outputs are resized very early on, in CreateScreenResources, then we will not yet have created a RootWindow and so trying to change its pixmap is a futile effort. Signed-off-by: Chris Wilson commit d7879a5939cabcd8b804e19fc422d2022ab7e3a4 Author: Chris Wilson Date: Fri Sep 7 12:18:08 2012 +0100 sna/dri: Fix the double-buffer pageflipping path Notably, we need to remember to exchange the front/back buffers after flipping! Signed-off-by: Chris Wilson commit 2630c81937115602faa352fca369d89fbb926b33 Author: Chris Wilson Date: Fri Sep 7 11:23:02 2012 +0100 sna/dri: Make sure we set the SCANOUT flag when creating bo for pageflips In case we should be creating an untiled framebuffer, we need to make sure we honour the scanout alignment. Signed-off-by: Chris Wilson commit aeef03520f1b2a4b8638ff1ed4fbf19c9b35e7c8 Author: Chris Wilson Date: Thu Sep 6 11:46:53 2012 +0100 sna/prime: Correct the pinning flag when importing the prime bo Signed-off-by: Chris Wilson commit 9bdf46d6c1a29b7b9e3d35e39a2e789334c0e1be Author: Chris Wilson Date: Thu Sep 6 11:38:08 2012 +0100 sna/prime: Distinguish forms of pinned pixmap So that we can allow prime to replace the backing bo of currently exported pixmaps through DRI2. Signed-off-by: Chris Wilson commit 39c4be2b0be66ed83bf059d3007f4143325e340d Author: Chris Wilson Date: Thu Sep 6 11:28:49 2012 +0100 uxa: Distinguish forms of pinning This allows us to replace the prime bo to meet sharing requirements, but still maintain the integrity with other users. Signed-off-by: Chris Wilson commit 031fa1c1c1129e486a02ffb5b3b9071f03b60048 Author: Chris Wilson Date: Thu Sep 6 11:08:23 2012 +0100 uxa/prime: Mark the pixmap as pinned once exported (similar to flink) Signed-off-by: Chris Wilson commit e5d3f3818660cb875ce2ef4721c51bc95317b78d Author: Chris Wilson Date: Thu Sep 6 10:54:57 2012 +0100 sna: Add is-pinned checks to changing the pitch on an existing bo Signed-off-by: Chris Wilson commit f2affe403baea78b9c94e3d726d1b9d8a0004f35 Author: Chris Wilson Date: Thu Sep 6 10:24:04 2012 +0100 sna: Apply the minimum 256 pitch to CREATE_USAGE_SHARED pixmaps as well Signed-off-by: Chris Wilson commit fbe4080816191ee97347128444f56bcc34858481 Author: Chris Wilson Date: Thu Sep 6 08:57:34 2012 +0100 prime: Align pitch of shared untiled buffers to 256 bytes In order for nvidia to handle the buffers we are currently generating, they need to have a pitch alignment of 256 bytes. Make it so. Signed-off-by: Chris Wilson commit c5fb025267bf1019907dfcc60f0efef2691be436 Author: Chris Wilson Date: Thu Sep 6 08:55:46 2012 +0100 sna: Correct assertions for adding damage that bypasses the region Signed-off-by: Chris Wilson commit 1f5d5a37e57e63fa6e5b336a4847ce4422b89044 Author: Chris Wilson Date: Wed Sep 5 17:17:58 2012 +0100 Add PlatformProbe to handle sharing of device entities Reported-by: Nick Bowler Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54561 Signed-off-by: Chris Wilson commit ddde40afc081f47a3b6b694aeb21682c240c9562 Author: Chris Wilson Date: Wed Sep 5 16:48:01 2012 +0100 sna: Harden against initialisation failures References: https://bugs.freedesktop.org/show_bug.cgi?id=54561 Signed-off-by: Chris Wilson commit 4627dc36fa56ab971cd90088bd29a597dd12dc02 Author: Chris Wilson Date: Wed Sep 5 16:17:17 2012 +0100 Revert "sna: Flush the batch before a render operation if the GPU is idle" This reverts commit ad57ac07a273bf376b74884de47d8ee1e7129fb8. These checks end up being too frequent and not allowing us to batch sufficient commands to offset the overhead of batch submission. Hmm. commit 886f3cef4101a674bb62656cf7f3046643cae4b1 Author: Chris Wilson Date: Wed Sep 5 15:27:21 2012 +0100 uxa: Fix cut'n'paste error in Option "Backlight" Signed-off-by: Chris Wilson commit 6211d0914e2ed1cdd4cc2e170ee16129fc9f0d73 Author: Chris Wilson Date: Wed Sep 5 12:33:08 2012 +0100 uxa: Flush batch immediately after queuing a WAIT_FOR_EVENT We still encounter hangs with kernel-3.5 with the culprit being a wait on a disabled pipe. As we thoroughly check before that the pipe is still disabled and flush before a modeset, the only possibility that remains is that DPMS is disabling the pipe before we submit. Close that race by always submitting the batch immediately after a WAIT_FOR_EVENT. Signed-off-by: Chris Wilson commit 6a1423547769c24d15f6475628981d14a76a4bb2 Author: Chris Wilson Date: Wed Sep 5 12:15:52 2012 +0100 sna: Initialise the empty boxes field of the region before subtracting it Fixes regression from commit 38fb77af757318e5fb6f605b37306ce4585b11a5 Author: Chris Wilson Date: Wed Sep 5 08:23:34 2012 +0100 sna: Don't upload ignored cpu damage Signed-off-by: Chris Wilson commit dff25e5ec4071a0404f82760e8deec3f99f4a0a9 Author: Chris Wilson Date: Wed Sep 5 11:05:28 2012 +0100 sna: Drop master after discarding framebuffers As Imre Deak pointed out in the previous patch, drmModeRmFB only works when we hold the DRM master, therefore to prevent a leak of the framebuffer across server reset we need to defer dropping master until after we release our scanouts and modes. Signed-off-by: Chris Wilson commit 46981d01700c1159bfb6bc0aebc938ff1d447a0f Author: Imre Deak Date: Fri Aug 31 14:31:51 2012 +0300 uxa: fix leakage of FB when closing the screen Calling drmModeRmFB is only allowed in DRM master mode. Since leaving the VT also drops master mode we need to remove the FB before calling I830LeaveVT. This is only a real leak in case of a server reset, otherwise the server process will exit anyway and the kernel will clean up the FB. Signed-off-by: Imre Deak Signed-off-by: Chris Wilson commit 55cef974a5dad3fda1922648fa27bcf5bb32ea03 Author: Chris Wilson Date: Wed Sep 5 09:38:47 2012 +0100 sna: Review validity of damage when discarding CPU bo Signed-off-by: Chris Wilson commit 587499bbf55b7eb0e1848822a792d535a8a3db1b Author: Chris Wilson Date: Wed Sep 5 10:56:18 2012 +0100 sna/video: Use the scanout flag and FB id for sprite framebuffers So that we can use the same teardown path as normal scanouts. Signed-off-by: Chris Wilson commit 913adacc5400f94bc754f22375447e6f90ccd510 Author: Chris Wilson Date: Wed Sep 5 09:20:55 2012 +0100 sna/gen7: Always emit a stall when flushing the texture cache Reported-by: Reinhard Karcher References: https://bugs.freedesktop.org/show_bug.cgi?id=54488 Signed-off-by: Chris Wilson commit bdfedb46bd5bb3b96543a3ff553abd8ed0774fad Author: Chris Wilson Date: Wed Sep 5 09:15:12 2012 +0100 sna: Use async upload only if the last render was not CPU Signed-off-by: Chris Wilson commit 67b75ae6f66e2d8e97b0aaf70d66b6de30f9e67e Author: Chris Wilson Date: Wed Sep 5 08:46:39 2012 +0100 sna: Tweak upload path to remove redundant code Signed-off-by: Chris Wilson commit 38fb77af757318e5fb6f605b37306ce4585b11a5 Author: Chris Wilson Date: Wed Sep 5 08:23:34 2012 +0100 sna: Don't upload ignored cpu damage Signed-off-by: Chris Wilson commit 2eb32f711ddd65a55c3c21f813b41aca49635a22 Author: Chris Wilson Date: Wed Sep 5 00:22:04 2012 +0100 sna: Add DBG control to disable CPU bo Signed-off-by: Chris Wilson commit 19e170aa6fd3652cc2e983a291f82350dca27e52 Author: Chris Wilson Date: Tue Sep 4 23:52:42 2012 +0100 sna: Fix comparison of memcpy overlap to include x-offsets Signed-off-by: Chris Wilson commit 7895416eabfc5bd361d0d0ff92c570e2f6af47e0 Author: Chris Wilson Date: Tue Sep 4 20:30:53 2012 +0100 sna: Rearrange use_cpu() tests for composite ops to avoid syncing CPU bo Signed-off-by: Chris Wilson commit ad57ac07a273bf376b74884de47d8ee1e7129fb8 Author: Chris Wilson Date: Tue Sep 4 20:06:49 2012 +0100 sna: Flush the batch before a render operation if the GPU is idle Experiment with pushing those first commands earlier. Signed-off-by: Chris Wilson commit 6325d7e29a8bacede321362c20bf3acd33c48651 Author: Chris Wilson Date: Tue Sep 4 14:51:54 2012 +0100 NEWS: fixup missing links to bugs referenced in 2.20.6 release notes Reported-by: Adam Jackson Signed-off-by: Chris Wilson commit bc309bad39035649ee377c1d5af9099491a8ea43 Author: Chris Wilson Date: Tue Sep 4 14:22:15 2012 +0100 sna: And remember to flush the damage to the output slaves... Signed-off-by: Chris Wilson commit 68d207588a177afa4e999260bfddb4d6dba1029b Author: Chris Wilson Date: Tue Sep 4 13:20:21 2012 +0100 sna: Improve handling of output offloading In particular, don't forget to flush when we only have offload slaves and no native pixmaps. Signed-off-by: Chris Wilson commit 8cf7ac776b9b47dabd5ab141e5a5385c44d3f309 Author: Chris Wilson Date: Tue Sep 4 13:55:34 2012 +0100 sna: Fix a typo in an error message s/achieve/retrieve/ otherwise it is nonsense. Signed-off-by: Chris Wilson commit be83b98d299c74101357e7bf170b1451aec2e1f2 Author: Chris Wilson Date: Tue Sep 4 11:23:58 2012 +0100 sna: Add some DBG to the prime paths Signed-off-by: Chris Wilson commit d0684d55e3a62c231c92a68403cf100c9e18351b Author: Chris Wilson Date: Tue Sep 4 11:05:43 2012 +0100 sna: Fixup CREATE_USAGE_SHARED The DRI2 code tries to create pixmaps with non-zero width/height, whoops. Signed-off-by: Chris Wilson commit b6ced7a2267f9429ad38949dda39c843e2119e99 Author: Chris Wilson Date: Tue Sep 4 10:05:46 2012 +0100 sna: Fix typo for detecting prime ioctls Signed-off-by: Chris Wilson commit df68723baae71498de95924c72d4f23fa7fc7fdf Author: Chris Wilson Date: Mon Sep 3 20:43:48 2012 +0100 sna: Port prime interfacing Preliminary prime support. Signed-off-by: Chris Wilson commit e3ad18036b4dca29744ecfa4694006f01dd3fd18 Author: Chris Wilson Date: Mon Sep 3 20:53:30 2012 +0100 sna: Enable platform probing Completing commit 0768ac4d195214825137152893deb74a87fcd11e Author: Dave Airlie Date: Wed Jul 25 16:11:23 2012 +1000 intel: add platform probing support. Signed-off-by: Chris Wilson commit 3dc644b2a959fc559e1138b332ed42d7235de42f Author: Сковорода Никита Андреевич Date: Mon Sep 3 13:44:21 2012 +0400 uxa: Fix Backlight option support. Signed-off-by: Сковорода Никита Андреевич commit a972affe0c78b23a119d5dd14bb4446c89122af1 Author: Chris Wilson Date: Sun Sep 2 17:43:33 2012 +0100 sna/gen6+: Redirect fills if the destination is too large for 3D Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54134 Signed-off-by: Chris Wilson commit 18d26076c778c20eb589b638fc47fa847793f149 Author: Dave Airlie Date: Tue Sep 4 07:19:12 2012 +1000 intel: fix return value for no pEnt Probably never gets hit but shuold return FALSE, pointed out on irc by Lekensteyn Signed-off-by: Dave Airlie commit d14ff42f2a205542df2ef723c6151d18db2bea8b Author: Dave Airlie Date: Thu Jul 26 10:43:29 2012 +1000 intel: query kernel for caps to setup scrn capabilities. This queries the kernel for prime support before advertising the capabilities. Signed-off-by: Dave Airlie commit 6705d8237aca90964449e4dbee97b4f62b87c28b Author: Dave Airlie Date: Thu Jul 26 10:37:04 2012 +1000 intel: add pixmap tracking and scanout support. (v2) This adds support for pixmap tracking and scanout of alternate pixmaps. v2: do dirty updates after uxa block handler, check if kernel can flush vmap for us so we don't have to. Signed-off-by: Dave Airlie commit 69827126abdfa289417b55fe7db8ae0535037185 Author: Dave Airlie Date: Wed Jul 25 16:22:57 2012 +1000 intel/uxa: add pixmap sharing support. Signed-off-by: Dave Airlie commit 0768ac4d195214825137152893deb74a87fcd11e Author: Dave Airlie Date: Wed Jul 25 16:11:23 2012 +1000 intel: add platform probing support. This allows the driver to be loaded by the platform loading code. Signed-off-by: Dave Airlie commit 164ae7a4f9fd3e538f1b506031d297088fc0c659 Author: Chris Wilson Date: Sun Sep 2 17:19:12 2012 +0100 man: Malformed "Backlight" section Reported-by: Matthew Monaco Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54397 Signed-off-by: Chris Wilson commit 67b44104168650473a24e69056707e0b35f1713e Author: Chris Wilson Date: Sun Sep 2 12:47:36 2012 +0100 sna: Cache the temporary upload buffer when copying boxes Signed-off-by: Chris Wilson commit 4b558281e04e4d4febfc361632a90f8a45080c49 Author: Chris Wilson Date: Sun Sep 2 12:23:59 2012 +0100 sna: Don't retire when searching for a snoopable buffer without hw support If the hw/kernel doesn't support snoopable buffers, then it makes little sense to search for one, and force a retire in the certainty of not finding any. Signed-off-by: Chris Wilson commit d933f3a7965c9aa70f70477be3bfe94d5ded948b Author: Chris Wilson Date: Sun Sep 2 10:29:49 2012 +0100 2.20.6 release Signed-off-by: Chris Wilson commit 62e7e69d88f7e5c8b0f0931fe887ee0c3bddb43f Author: Chris Wilson Date: Sun Sep 2 09:55:07 2012 +0100 sna: Tweak placement rules if we already have a CPU bo If we have a CPU bo, consider if it may be quicker to render to it then create a GPU bo. Signed-off-by: Chris Wilson commit f837807cc257fbedd35fa6101dc0b4a57e5ad78d Author: Chris Wilson Date: Sat Sep 1 10:36:09 2012 +0100 sna/dri: Remove busy-wait spin from vblank chaining of swapbuffers The issue being that, due to the delay, the chained swap would miss its intended vblank and so cause an unwanted reduction in frame throughput and increase output latency even further. Since both client and server have other rate-limiting processes in place, we can forgo the stall here and still keep the clients in check. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54274 Signed-off-by: Chris Wilson commit b56e8c5105c858452ca4eabf15b298fc06dfd3c8 Author: Chris Wilson Date: Sat Sep 1 12:15:47 2012 +0100 sna: Nullify gpu_bo after free in case final release is deferred in destroy As we may defer the actual release of the pixmap until after completion of the last shm operation, we need to make sure in that case we mark the GPU bo as released to prevent a use-after-free. Signed-off-by: Chris Wilson commit c4d994014160d8c946af731196a908991c77d9f9 Author: Chris Wilson Date: Sat Sep 1 10:44:24 2012 +0100 sna/gen2+: Add the missing assertions in case the drawrect is invalid Only the later gen had these useful assertions, add them to the rest just in case. Signed-off-by: Chris Wilson commit 25c1b478a957ceb0474e7121840b7eed1ba2e140 Author: Chris Wilson Date: Sat Sep 1 09:49:34 2012 +0100 sna: Discard cached CPU upload early when clearing with a solid fill Otherwise we end up considering the GPU bo as a real target, causing confusion and failed asserts. Signed-off-by: Chris Wilson commit 530b1d1516595cf14c5112d8833b870cd50eca46 Author: Chris Wilson Date: Thu Aug 30 22:21:57 2012 +0100 sna/dri: Use common routine for testing busyness after flush Signed-off-by: Chris Wilson commit 00d8c776b3607dbdab32c1126f91a7a38b8065f6 Author: Chris Wilson Date: Thu Aug 30 21:47:17 2012 +0100 sna/dri: Hold a reference to the vsync blit Fixes regression from commit 96a921487ef00db03a12bec7b0821410d6b74c31 Author: Chris Wilson Date: Mon Aug 27 21:50:32 2012 +0100 sna: Track outstanding requests per-ring Signed-off-by: Chris Wilson commit b2a6c74c2159c9968c19400d61a11f4773724b4a Author: Chris Wilson Date: Wed Aug 29 14:51:40 2012 +0100 sna: Remove inconsistent assertion As we now may not prefer to use the GPU even if all-damaged and clear, asserting that if we choose to use the CPU if clear is now bogus. Signed-off-by: Chris Wilson commit deaa1cac269be03f4ec44092f70349ff466d59de Author: Chris Wilson Date: Tue Aug 28 22:23:22 2012 +0100 sna: Align active upload buffers to the next page for reuse If we write to the same page as it already active on the GPU then despite the invalidation performed at the beginning of each batch, we do not seem to correctly sample the new data. References: https://bugs.freedesktop.org/show_bug.cgi?id=51422 References: https://bugs.freedesktop.org/show_bug.cgi?id=52299 Signed-off-by: Chris Wilson commit 9e0305a3928f253ded6c8e141a4dd42be3952eb9 Author: Chris Wilson Date: Tue Aug 28 20:49:20 2012 +0100 sna: Discard inplace flag if we create a CPU map for the upload buffer Signed-off-by: Chris Wilson commit f3e122554e88da0351bfb9a7a722f0715553689b Author: Chris Wilson Date: Tue Aug 28 21:27:04 2012 +0100 sna: Propagate the request to flush rather than directly submit the batch The subtly is that we need to reset the mode correctly after submitting the batch which was not handled by kgem_flush(). If we fail to set the appropriate mode then the next operation will be on a random ring, which can prove fatal with SandyBridge+. Reported-by: Reinis Danne Signed-off-by: Chris Wilson commit b5c8efe4309248e62d94d80b37a70775284ae985 Author: Chris Wilson Date: Tue Aug 28 08:33:00 2012 +0100 sna: Make sure we reset the domain tracking when exporting DRI bo Signed-off-by: Chris Wilson commit 96a921487ef00db03a12bec7b0821410d6b74c31 Author: Chris Wilson Date: Mon Aug 27 21:50:32 2012 +0100 sna: Track outstanding requests per-ring In order to properly track when the GPU is idle, we need to account for the completion order that may differ on architectures like SandyBridge with multiple mostly independent rings. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54127 Signed-off-by: Chris Wilson commit 26c731efc2048663b6a19a7ed7db0e94243ab30f Author: Chris Wilson Date: Mon Aug 27 20:50:08 2012 +0100 sna: Ensure that we create a GTT mapping for the inplace upload buffer As the code will optimistically convert a request for a GTT mapping into a CPU mapping if the object is still in the CPU domain, we need to overrule that in this case where we explicitly want to write directly into the GTT and furthermore keep the buffer around in an upload cache. References: https://bugs.freedesktop.org/show_bug.cgi?id=51422 References: https://bugs.freedesktop.org/show_bug.cgi?id=52299 Signed-off-by: Chris Wilson commit 2cbf88980ede50370b97f32e565dea33db16ac44 Author: Chris Wilson Date: Mon Aug 27 20:07:17 2012 +0100 sna: Force the stall if using a busy ShmPixmap bo with PutImage As we will stall in the near future to serialise access with the ShmPixmap, we may as well stall first and do a simple copy using the CPU in this highly unlikely scenario. Signed-off-by: Chris Wilson commit 705103d77e6b80d796a4535cade96cb6e9ebece3 Author: Chris Wilson Date: Mon Aug 27 20:07:19 2012 +0100 sna: Add a modicum of DBG to kgem_is_idle() Print out the handle of the bo we just checked. Signed-off-by: Chris Wilson commit 8218e5da2b177ca9cd0e2b1e7dbe114e5ef2ebf0 Author: Chris Wilson Date: Mon Aug 27 19:36:03 2012 +0100 sna: Fix crash with broken DBG missing one of its arguments Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54127 Signed-off-by: Chris Wilson commit 593f549b45fbb1528472feed51207d84901d142e Author: Chris Wilson Date: Mon Aug 27 16:43:19 2012 +0100 sna: A little more DBG to try and identify ratelimiting ops Signed-off-by: Chris Wilson commit 71ac12e9b6ed00c28993637aafd5186a2ba26256 Author: Chris Wilson Date: Mon Aug 27 15:49:59 2012 +0100 sna: Assert that the bo is marked as 'flush' when exported to DRI clients Signed-off-by: Chris Wilson commit cf64c8ce758cfa5d3bcd1b7626ff94cce7a84636 Author: Chris Wilson Date: Mon Aug 27 13:59:56 2012 +0100 sna: Upload PutImage inplace to a fresh GPU bo if the device doesn't snoop Signed-off-by: Chris Wilson commit 3c6758fc4a50ecfce9ed317fec669cc48addedcf Author: Chris Wilson Date: Mon Aug 27 11:58:05 2012 +0100 sna: Flush the batch if it references a ShmPixmap and the GPU is idle This helps minimise the stall when syncing with the GPU before sending the next reply to the Client. Signed-off-by: Chris Wilson commit f21079bad6e8316baf5d0295d6e7a809041bce06 Author: Chris Wilson Date: Mon Aug 27 11:25:28 2012 +0100 Revert "sna: Cleanup composite redirection after substituting the BLT" This reverts commit 5a5212117e7a73ce3fffb87c60a505a849e38c36. The clean up is in effect too early, as this is during preparation and the actual work is already being correctly done at the end. commit 414e87255cdee6eb556703ddefd194af71b985ed Author: Chris Wilson Date: Sun Aug 26 19:47:31 2012 +0100 Add Option "Backlight" to override the probed backlight control interface The automatic selection may not correspond with the correct backlight (such as in a multi-gpu, multi-panel device) or the user may simply prefer another control interface. This allows them to override the chosen interface using Option "Backlight" "my-backlight" to specify '/sys/class/backlight/my-backlight' as the interface to use instead. Suggested-by: Alon Levy References: https://bugs.freedesktop.org/show_bug.cgi?id=29273 Signed-off-by: Chris Wilson commit d4f7c58186849374cd929e20fa49ea2e93939a69 Author: Chris Wilson Date: Sun Aug 26 17:01:55 2012 +0100 sna/gen5+: Use the common methods for choosing the render targets This should afford us much more flexibility in where we render. Signed-off-by: Chris Wilson commit 3c88b5f693c29b990d69f96508b121ce97a7209e Author: Chris Wilson Date: Sat Aug 25 11:49:30 2012 +0100 sna: Use a fast span emitter for mono trapezoids without damage or clipping Signed-off-by: Chris Wilson commit 8e10a5b348a37feadcf935ec7694e46cc0802bdf Author: Chris Wilson Date: Sun Aug 26 14:53:12 2012 +0100 sna/gen6+: Do not call sna_blt_composite() after prepping the composite op As sna_blt_composite() will overwrite parts of the composite op as it checks whether or not it can execute that operation, it will lead to a crash as the normal render path finds the op corrupt. (The BLT conversion functions cater for the cases where we may wish to switch pipelines after choosing src/dst bo.) Reported-by: rei4dan@gmail.com Signed-off-by: Chris Wilson commit cbbe7727e766a5ee8767673feb6c8cdec38a7051 Author: Chris Wilson Date: Sun Aug 26 14:43:47 2012 +0100 sna/gen6+: Simplify prefer_blt_bo As we already check the tiling state, so all we need to then check is that the pitch is within the BLT constraint. Signed-off-by: Chris Wilson commit 0c15824a8143a288716d2eacf03252cc54eb9466 Author: Chris Wilson Date: Sun Aug 26 14:29:41 2012 +0100 sna: Add some DBG to kgem_is_idle() Signed-off-by: Chris Wilson commit d432983421286d343f7c487c12c7244b711f5a66 Author: Chris Wilson Date: Sun Aug 26 13:43:35 2012 +0100 sna: Add some DBG to BLT composite substitute to show if redirection is used Signed-off-by: Chris Wilson commit 5a5212117e7a73ce3fffb87c60a505a849e38c36 Author: Chris Wilson Date: Sun Aug 26 13:38:23 2012 +0100 sna: Cleanup composite redirection after substituting the BLT Signed-off-by: Chris Wilson commit 335821d588460c253b2ba2c8616a7c46e5ad0150 Author: Chris Wilson Date: Sun Aug 26 13:29:04 2012 +0100 sna/gen4+: Check for allocation failure for the clear solid bo Signed-off-by: Chris Wilson commit b5c77a6aaf520e331e82409b2592911cb1bb3100 Author: Chris Wilson Date: Sun Aug 26 12:48:18 2012 +0100 2.20.5 release Signed-off-by: Chris Wilson commit 454cc8453af1852758c3396dbe303c13c5c1be27 Author: Chris Wilson Date: Fri Aug 24 08:48:12 2012 +0100 sna: Submit the partial batch before throttling Signed-off-by: Chris Wilson commit 0e1e83ed4952f620e9422e58f955a5aea406e300 Author: Chris Wilson Date: Fri Aug 24 00:59:31 2012 +0100 sna: Allow the batch to be flushed if the GPU is idle upon a context switch Submit early, submit often in order to keep the GPU busy. As always we trade off CPU overhead versus concurrency. Signed-off-by: Chris Wilson commit 5059db0697c5516f1538f7062937664baf7b1c2e Author: Chris Wilson Date: Fri Aug 24 00:21:07 2012 +0100 sna: Correct a pair of DBG messages Signed-off-by: Chris Wilson commit c5b46e411a2c738c5ae55bffb9b3d460249f5c24 Author: Chris Wilson Date: Thu Aug 23 17:36:10 2012 +0100 sna: Tidy up users of __kgem_bo_is_busy() A lot of callsites had not been converted to the common function. Signed-off-by: Chris Wilson commit 82e91327d57e03d2117638165f298a50b946fcaa Author: Chris Wilson Date: Thu Aug 23 15:59:00 2012 +0100 sna: Use a temporary userptr mapping for a large upload into a busy target Signed-off-by: Chris Wilson commit b286ffa6beccb8fe341c464a4fb9f2af98541263 Author: Eric S. Raymond Date: Thu Aug 23 12:42:18 2012 -0400 Fix seriously malformed list syntax on intel(4). Signed-off-by: Eric S. Raymond commit fc6b7f564df88ca773ae245b1b4e278b47dffd59 Author: Chris Wilson Date: Thu Aug 23 15:13:14 2012 +0100 sna: Flush the batch if it contains any DRI pixmaps This fixes a regression from commit 02963f489b177d0085006753e91e240545933387 Author: Chris Wilson Date: Sun Aug 19 15:45:35 2012 +0100 sna: Only submit the batch if flushing a DRI client bo which made the presumption that we called sna_add_flush_pixmap() for every DRI pixmap that we used. However, that is only called for the dirty pixmaps, any native exported pixmap only marks the batch as requiring a flush. So in those cases we always need to submit the batch if it contains an exported DRI pixmap. Reported-by: chr.ohm@gmx.net Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53967 Signed-off-by: Chris Wilson commit fd38f45ec5421802b426867a050c978a2feec937 Author: Chris Wilson Date: Thu Aug 23 12:11:48 2012 +0100 sna: Mark the CPU damage as needing flushing for DRI buffers Signed-off-by: Chris Wilson commit ac6cb667546a82b865c959a1be32f52b2da7bf7d Author: Chris Wilson Date: Wed Aug 22 12:00:49 2012 +0100 sna: Flush before adding any SHM pixmap into the batch Signed-off-by: Chris Wilson commit 785c1046b94fd9ca6f22b2a6d73639408a411cea Author: Chris Wilson Date: Wed Aug 22 10:56:12 2012 +0100 sna: Only use the GPU for an active CPU bo unless forced Signed-off-by: Chris Wilson commit 8032f51859ce1928922edf6892f493a84d9c39f0 Author: Chris Wilson Date: Wed Aug 22 10:40:53 2012 +0100 sna: If we cannot use the CPU bo along a render pathway, promote to GPU Signed-off-by: Chris Wilson commit cc967507bbf357e1d5ec3cd0f3c0c5ecfa8b867a Author: Chris Wilson Date: Wed Aug 22 10:36:04 2012 +0100 sna: Convert to using IGNORE_CPU flag rather than complicating the CPU damage Signed-off-by: Chris Wilson commit 5aa59ce7c012eb309c4f5a362ccf531c065bd7ff Author: Chris Wilson Date: Wed Aug 22 10:10:33 2012 +0100 sna: Assert that the CPU bo is not used if the GPU is clear Signed-off-by: Chris Wilson commit 273765033223024ff6a662195e0e4b96f8960463 Author: Chris Wilson Date: Wed Aug 22 00:48:08 2012 +0100 sna: Make sure the opposite damage is destroyed after reducing to all Signed-off-by: Chris Wilson commit 31e398c9dbd8539e6fd2cc7398e97ee1df2f7f23 Author: Chris Wilson Date: Wed Aug 22 00:38:17 2012 +0100 sna: Discard a no-longer-used GPU bo after moving to the CPU domain Signed-off-by: Chris Wilson commit 8be15c37df9d9b34e0f21700673212bd19c772b2 Author: Chris Wilson Date: Wed Aug 22 00:27:00 2012 +0100 sna: Balance CPU bo accounting for SHM pixmaps Signed-off-by: Chris Wilson commit 262d57a5aaac46508d8e29860c7a567bcd5bc4d8 Author: Chris Wilson Date: Tue Aug 21 23:36:12 2012 +0100 sna: Display still resident memory in inactive/snoop caches under DEBUG_MEMORY Signed-off-by: Chris Wilson commit 304581cc02adeb865a24edde934b5b9ceba68d96 Author: Chris Wilson Date: Tue Aug 21 23:29:12 2012 +0100 sna: Add a DBG to log pixmap destruction Signed-off-by: Chris Wilson commit 946d54238d90f5e31772f0df336ac9a5e7f2d62b Author: Chris Wilson Date: Tue Aug 21 21:02:00 2012 +0100 sna: Fix the assertion for tracking proxies in the batch Signed-off-by: Chris Wilson commit 4ee2e227ddf61c87f08f55d4922d2562b563ca87 Author: Chris Wilson Date: Tue Aug 21 00:28:40 2012 +0100 sna: Mark all levels of a proxy as dirty So that if we write to a surface through one view, we make sure that the sample cache is invalidated for all future views. Signed-off-by: Chris Wilson commit eee181e9d71273d94fe735805ed84e8f7b7b2180 Author: Chris Wilson Date: Tue Aug 21 00:19:10 2012 +0100 sna/gen6+: Only mark the dst as dirty again if it already is in the batch Signed-off-by: Chris Wilson commit c86df17c1455a53cb52f33a25c8c362e5331621e Author: Chris Wilson Date: Mon Aug 20 22:54:06 2012 +0100 sna/gen3: Fix assertion to check the freshly allocated vertex bo Signed-off-by: Chris Wilson commit 6aabe90587f4916a01a1cd2bbc577a1e7fa20eca Author: Chris Wilson Date: Mon Aug 20 22:09:54 2012 +0100 sna: Allow target bo promotion to GPU even on old architectures Signed-off-by: Chris Wilson commit 1a4b6fea7b1516de35e6800efa5b85f8401a5b2a Author: Chris Wilson Date: Mon Aug 20 22:08:23 2012 +0100 sna: Assign a unique id to snoopable CPU bo Signed-off-by: Chris Wilson commit 892b1a1e431e8f27133825f8a27dde4955da0054 Author: Chris Wilson Date: Mon Aug 20 22:07:05 2012 +0100 sna/gen3: Convert to sna_drawable_use_bo() Signed-off-by: Chris Wilson commit 3ca1bfb51ba522454433d58131e7dab7fcbe7e34 Author: Chris Wilson Date: Mon Aug 20 21:28:47 2012 +0100 sna: Trim a parameter from kgem_bo_mark_dirty() and add some assertions Signed-off-by: Chris Wilson commit 16f3d3a9ae145a3af51d2c0c42c6c585d676a863 Author: Chris Wilson Date: Mon Aug 20 19:42:22 2012 +0100 sna: Keep a stash of the most recently allocated requests Signed-off-by: Chris Wilson commit fb349ced91e15ecaa025321bd37d1fe3cfdd2f44 Author: Chris Wilson Date: Mon Aug 20 17:35:44 2012 +0100 sna: A few more buffer cache management assertions Signed-off-by: Chris Wilson commit ae6b3c7508d570af94f172d6a91d62d2987d654b Author: Chris Wilson Date: Mon Aug 20 17:03:16 2012 +0100 Check that the module that indeed i915 before using custom ioctls Thanks to Adam Jackson for pointing me towards drmGetVersion() and Julien Cristau for saying "Yuck!" Signed-off-by: Chris Wilson commit 3c611087e8ae09fc3fe4271f16d912ac8ae89f6b Author: Chris Wilson Date: Mon Aug 20 16:09:25 2012 +0100 Only open the matching BusID and not the first named If you pass a name to drmOpen() it will attempt to open any device corresponding to that name if it first fails to open the device corresponding to the BusID. Obviously we want the failure from opening the specified device in order to prevent wrongly opening the first found device multiple times. Signed-off-by: Chris Wilson commit dd6c67b32f726b6ad7f12f3b83f6d8c868ff4dc1 Author: Chris Wilson Date: Mon Aug 20 15:58:03 2012 +0100 sna: Add a couple of buffer cache management assertions Signed-off-by: Chris Wilson commit 01ebdb4d7a8bb751167153554f9122d996e4ea91 Author: Chris Wilson Date: Mon Aug 20 15:33:26 2012 +0100 sna: Remove confusing is_cpu() The only real user now has its own heuristics, so convert the remaining users over to !is_gpu(). Signed-off-by: Chris Wilson commit 410316d20299b9ed3447d1d897f904af786ed097 Author: Chris Wilson Date: Mon Aug 20 14:56:12 2012 +0100 sna: Refine decision making for maybe-inplace trapezoids In particular, we want to avoid preferentially taking the CPU paths when it may force any migration (including clear). Signed-off-by: Chris Wilson commit 91f1bf971f9cdc6498f513a5ddec1ad7a4e24b3d Author: Chris Wilson Date: Mon Aug 20 15:27:27 2012 +0100 sna: Correct ordering of calls to memcpy for BLT cpu composite paths Signed-off-by: Chris Wilson commit 027569bf83fc6d67dca7cfd65fdfa37ef6b47204 Author: Chris Wilson Date: Mon Aug 20 12:55:20 2012 +0100 Missing includes for b5b76ad849b The warnings of implicit function declarations were lost amongst the noise. Signed-off-by: Chris Wilson commit f1b259f627814c765ea93d8c839ee7533249974f Author: Chris Wilson Date: Mon Aug 20 12:51:51 2012 +0100 sna: Add a modicum of DBG for PolyFillRect Signed-off-by: Chris Wilson commit b5b76ad849bfda1e75192d1cb3c6c0fcc623bb91 Author: Chris Wilson Date: Mon Aug 20 12:01:39 2012 +0100 Sanity check that the driver is an i915.ko GEM device before claiming it This fixes an issue with us claiming Poulsbo and friends even though we do not speak their language. Signed-off-by: Chris Wilson commit 74f998136bac441d782faf779616af6f7bdcadad Author: Chris Wilson Date: Mon Aug 20 11:07:55 2012 +0100 sna: Avoid migrating the BLT composite src to the GPU if the dst is not Signed-off-by: Chris Wilson commit a05643eb670e91ab102465df799301def88faaf9 Author: Chris Wilson Date: Mon Aug 20 10:46:14 2012 +0100 sna: Remove unneeded source bo unref after __sna_render_pixmap_bo() As __sna_render_pixmap_bo() deliberately does not reference its returned bo, we need to avoid unreferencing it else we cause explosions later. Fixes regression from commit a13781d19defc97af6a279c11a85e33ef825020e Author: Chris Wilson Date: Sun Aug 19 09:45:12 2012 +0100 sna: Enable BLT composite functions to target CPU buffers Signed-off-by: Chris Wilson commit c80db9bc2ef0a37a4abb78c9ef667c8b36ab6fba Author: Chris Wilson Date: Mon Aug 20 10:45:36 2012 +0100 sna: Flush the batch before preparing for a FlushCallback As we end up submitting and maybe synchronising upon a batch within FlushCallback (or our client will) it is important that we start that serialized batch as early as possible to minimise the impending stalls. Signed-off-by: Chris Wilson commit c39fe0253847f5a86e16b47ba420c8ba819c9110 Author: Chris Wilson Date: Sun Aug 19 20:42:55 2012 +0100 sna: Do not use the GPU to migrate to the CPU whilst wedged! Signed-off-by: Chris Wilson commit fe05268d70088c8cad5f4b5ef756e1ffe2069fca Author: Chris Wilson Date: Sun Aug 19 19:28:42 2012 +0100 sna: Experiment with flushing the batch prior to rendering to a ShmPixmap Signed-off-by: Chris Wilson commit bbd7a825810cc9772e6d613df449cb5ecb0be3f6 Author: Chris Wilson Date: Sun Aug 19 19:28:20 2012 +0100 sna: Don't promote a ShmPixmap to GPU for a CopyArea Signed-off-by: Chris Wilson commit 7bf7a5ad1057f1aeb5b261da6dc501323c022287 Author: Chris Wilson Date: Sun Aug 19 19:17:35 2012 +0100 sna/gen3: Tidy vbo discard Signed-off-by: Chris Wilson commit d1b808fd72b477bde96f7c6737a993bd1a20baf2 Author: Chris Wilson Date: Sun Aug 19 17:53:24 2012 +0100 sna: Tweak is_cpu/is_gpu heuristics Signed-off-by: Chris Wilson commit c682c1a37692021cbd9bfc1e3f1ccf2b648c73f9 Author: Chris Wilson Date: Sun Aug 19 17:28:25 2012 +0100 sna: Discard GPU (and damage) after applying clear on migration to CPU Signed-off-by: Chris Wilson commit dc83ef49f9e8ff94ab77aa9d54fe29e32b9d7a3d Author: Chris Wilson Date: Sun Aug 19 17:20:45 2012 +0100 sna/trapezoids: Accept more operators for maybe-inplace Signed-off-by: Chris Wilson commit 47d948f5df0cd0e975cfe5183b6ce79cd3fd27ee Author: Chris Wilson Date: Sun Aug 19 17:09:21 2012 +0100 sna: Update maybe_inplace to recognise more types of handled pixel formats Signed-off-by: Chris Wilson commit 02963f489b177d0085006753e91e240545933387 Author: Chris Wilson Date: Sun Aug 19 15:45:35 2012 +0100 sna: Only submit the batch if flushing a DRI client bo Signed-off-by: Chris Wilson commit 13d1a105159222518800d3c5ad5660725864ec6b Author: Chris Wilson Date: Sun Aug 19 09:48:05 2012 +0100 sna: compare the correct trailing dword when skipping identical bitmap lines Fixes regression in 2.20.4 from commit 85192f00e345830541e3715e211b1f98154bbef4 Author: Chris Wilson Date: Wed Aug 8 12:11:50 2012 +0100 sna: Ignore trailing bits when comparing lines inside the bitmap Reported-by: Edward Sheldrake Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53699 Signed-off-by: Chris Wilson commit a13781d19defc97af6a279c11a85e33ef825020e Author: Chris Wilson Date: Sun Aug 19 09:45:12 2012 +0100 sna: Enable BLT composite functions to target CPU buffers Signed-off-by: Chris Wilson commit be940856c74fbedd27997dd61e2a85959b321193 Author: Chris Wilson Date: Sat Aug 18 21:23:03 2012 +0100 sna: Consider sample wraparound in each direction independently Signed-off-by: Chris Wilson commit 110c7ef7f6c31929affa038918e6ce087bccddc6 Author: Chris Wilson Date: Sat Aug 18 17:42:51 2012 +0100 sna/damage: Replace the damage with a larger box if subsumed Signed-off-by: Chris Wilson commit 75a2fab766d8aed180ef795919e503db22c0e0fd Author: Chris Wilson Date: Sat Aug 18 17:28:08 2012 +0100 sna: Avoid forcing an upload for an unblittable bo unless on a fallback path Signed-off-by: Chris Wilson commit 110d5519f3523b1e2c50db637cdc4c5bc44c960a Author: Chris Wilson Date: Sat Aug 18 16:39:52 2012 +0100 sna: Reduce subtracted damage earlier Signed-off-by: Chris Wilson commit 8812e8b6e89e6432a6a768a0566ce4c153e9b256 Author: Chris Wilson Date: Sat Aug 18 16:21:13 2012 +0100 sna: Reduce damage after a large composite operation Signed-off-by: Chris Wilson commit e361627b90ea6bf2f9a8c46cf8debe562fdf4f09 Author: Chris Wilson Date: Sat Aug 18 16:16:17 2012 +0100 sna/damage: Add some more sanity checks for creating empty regions Signed-off-by: Chris Wilson commit 10f334872e9dd190e18c768219e60815acabe4d3 Author: Chris Wilson Date: Sat Aug 18 15:49:02 2012 +0100 sna: Add damage for the whole unaligned trapezoid not per component Signed-off-by: Chris Wilson commit 5ff6198c9346d84717bac28980329b048f4406e8 Author: Chris Wilson Date: Sat Aug 18 11:59:56 2012 +0100 2.20.4 release Signed-off-by: Chris Wilson commit bc77a466531fdbdd21e9354af567e5215a66edf9 Author: Chris Wilson Date: Sat Aug 18 11:09:23 2012 +0100 sna: Silence a couple of recent compiler warnings sna_accel.c: In function 'sna_poly_fill_rect_extents': sna_accel.c:11438:11: warning: unused variable 'v' [-Wunused-variable] sna_blt.c: In function 'sna_blt_composite__convert': sna_blt.c:1712:3: warning: format '%s' expects a matching 'char *' argument [-Wformat] sna_blt.c:1738:3: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'CARD32' [-Wformat] Signed-off-by: Chris Wilson commit d1da2c71461798bb027a260ff8480b71ebffde26 Author: Chris Wilson Date: Thu Aug 16 21:15:54 2012 +0100 sna: Correct assertion for StoreColors Fixing the assertion reveals that it was bogus! Signed-off-by: Chris Wilson commit 31ddaa0cfbde083aef42d9fdb5ed13bb4edc36c8 Author: Chris Wilson Date: Thu Aug 16 21:13:52 2012 +0100 sna: Fixup DBG after 7f5a9e3 Signed-off-by: Chris Wilson commit b8bc56c12c6fdc559354fbbf96b6e043a491aa8f Author: Chris Wilson Date: Thu Aug 16 21:00:57 2012 +0100 uxa/gen3: Simply simple fill shader generation Suggested-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 182581edde356a21a0681de526f83884e1a0de5d Author: Chris Wilson Date: Thu Aug 16 20:59:09 2012 +0100 uxa/glamor: Check for failed prepares Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit c289b607d1526d8d3625fa84c093552a9f3ea168 Author: Chris Wilson Date: Thu Aug 16 20:54:40 2012 +0100 uxa: Check for failed mmapping of the scanout Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 32ec8b979bc8cf7d8ce351ca752b806d42bc1c0f Author: Chris Wilson Date: Thu Aug 16 20:53:08 2012 +0100 test/dri2: Discard error returns from _XReply This is only test code, so keep the static analyser quiet Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 5675c36e0dca92b8d24235d82cd0e87f82fdc7b0 Author: Chris Wilson Date: Thu Aug 16 20:44:32 2012 +0100 sna: Check for failure to pin the front buffer Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit c9db2c74ab3b482489bec63b11df80bb35e21aca Author: Chris Wilson Date: Thu Aug 16 20:42:50 2012 +0100 sna/gen2: Add break rather than fallthrough The fall-through in this instance is irrelevant, and the static analysers complain for not commenting on the fall-through. Silence the analyser by removing the fall-through. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit e0abbc3ccafb51d6b2114e1c7d6dc2eda3a8c1f4 Author: Chris Wilson Date: Thu Aug 16 20:40:17 2012 +0100 i810: Query PortPriv for the surface properties Avoid the NULL deferences. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit c09518f98d5c533860b084506d9ee2c819cca52f Author: Chris Wilson Date: Thu Aug 16 20:32:53 2012 +0100 sna: Fix assignment inside assertion (should be an equality check) Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 7d3e4328d4f4421178377933ca98fb80daa85c76 Author: Chris Wilson Date: Thu Aug 16 20:32:11 2012 +0100 sna/glyphs: Fix potential leak of glyph extents (for many lists of many formats) Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 9b00c82df78cb8820c0e32fbecc7c933eed81d52 Author: Chris Wilson Date: Thu Aug 16 20:30:52 2012 +0100 sna: Remember alpha-fixup for BLT upload Still dubious whether this is truly beneficial... Signed-off-by: Chris Wilson commit 94871944a0e1351273d6029df7bf0300f31a8571 Author: Chris Wilson Date: Thu Aug 16 00:07:58 2012 +0100 sna: Avoid conflating tearfree and randr shadow modes For ordinary TearFree we do not want to adjust the crtc offsets. Signed-off-by: Chris Wilson commit 1a389842347bab9d91240444e161589071eb9a47 Author: Chris Wilson Date: Wed Aug 15 23:07:16 2012 +0100 sna: Avoid queuing a pageflip on a DPMS off pipe If the pipe is not running, attempting to queue a pageflip will result in an error and us disabling the output in retaliation. Signed-off-by: Chris Wilson commit 615739556dd1cc4565eb1c47f93fe8abd697802f Author: Chris Wilson Date: Wed Aug 15 20:10:52 2012 +0100 sna: Only continue to update the shadow buffer if the flips succeeded If the flip fail, we disable the crtc and may end up disabling the output, removing the shadow (and old scanout bo) in the process. Signed-off-by: Chris Wilson commit 2554d0d76e0fcae6e324938c28bb50deeb8814dc Author: Chris Wilson Date: Wed Aug 15 18:04:18 2012 +0100 sna: Submit the batch upon destroying a ShmPixmap The midlayer has already detached the pixmap from the segment (possibly destroying that segment in the process, thanks midlayer!) so we need to submit the batch asap before the segment disappears. Signed-off-by: Chris Wilson commit 4e604d721be5a1c0f8eaf91e3a5cf8c01a609a69 Author: Chris Wilson Date: Wed Aug 15 16:53:20 2012 +0100 sna: Flush shm pixmaps after upload Signed-off-by: Chris Wilson commit 7f5a9e30c953c174a4d6bc83e0b0a5e068cbda52 Author: Chris Wilson Date: Wed Aug 15 09:34:24 2012 +0100 sna: Remove zero-size rectangles fro PolyFillRectangle Some applications like to waste precious bw by attempting to fill zero-sized rectangles; remove them upfront rather than process them. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 0c882f4fa991ef379e416628eb41cd2178818ad1 Author: Chris Wilson Date: Tue Aug 14 16:02:38 2012 +0100 sna/gen2,3: Prevent dereferencing a NULL bo with solid render fills Signed-off-by: Chris Wilson commit 48f436d3705059711097a222aac65f862b4a5cfd Author: Chris Wilson Date: Tue Aug 14 15:05:33 2012 +0100 sna: Defer the release of a busy SHM pixmap until the next flush callback Signed-off-by: Chris Wilson commit 9f07d1fc0181f22da36837337241f228626e0d88 Author: Chris Wilson Date: Tue Aug 14 12:03:24 2012 +0100 sna: Enable use of shm pixmap for readback A little too overzealous in the degradation of writing to the CPU bo if we need to read from a GPU bo. Signed-off-by: Chris Wilson commit 9b016d2e466f342cc6649504fa48ab6a810c7e94 Author: Chris Wilson Date: Sun Aug 12 21:36:30 2012 +0100 sna: do not bother attaching to a miniscule ShmPixmap If the pixmap is less than a page in size we are unlikely to recover the cost of tracking it via the GPU. Signed-off-by: Chris Wilson commit 2f4de90709264ad19a3e3f5f0f79f4bba78a760a Author: Chris Wilson Date: Sun Aug 12 13:01:24 2012 +0100 uxa: Only emit a warning if we fail to tile the frontbuffer and the hw allows Signed-off-by: Chris Wilson commit 4d3cafc99ab49da6744046bc2004981144cb064d Author: Chris Wilson Date: Sun Aug 12 13:02:43 2012 +0100 sna: Fix compilation without pixman glyphs Signed-off-by: Chris Wilson commit dc18eaa585c36c8e5f5b4ec405a976a835fd2ac3 Author: Chris Wilson Date: Sun Aug 12 10:34:10 2012 +0100 sna: Make the failure to create render caches non-fatal Signed-off-by: Chris Wilson commit b580abdfa68108f3e63ee1f897b6ea83b9c47935 Author: Dave Airlie Date: Sun Aug 12 20:52:12 2012 +1000 intel: fix video xvPipe range check Pointed out by Russell King on irc. Signed-off-by: Dave Airlie commit 44f848f9b2f2a2dcd9087210ea46bc4fdb63c057 Author: Chris Wilson Date: Sat Aug 11 19:44:15 2012 +0100 sna: Fix typo in computation of texel offsets for tiled 8x8 blts Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53353 Signed-off-by: Chris Wilson commit b335d369bbcbfaef878795a5c8e72c2d40d3a536 Author: Chris Wilson Date: Sat Aug 11 12:59:49 2012 +0100 sna: Discard the GPU bo after syncing to CPU bo for writing Signed-off-by: Chris Wilson commit 029934662e0bad6cf47baf4d7202656dd3e0ba08 Author: Chris Wilson Date: Sat Aug 11 10:47:44 2012 +0100 sna: Add a little DBG for promotion of CPU source bo Signed-off-by: Chris Wilson commit f20f8556bfc8b4df6ba5050cca656a4ff0fdf18f Author: Chris Wilson Date: Sat Aug 11 10:46:40 2012 +0100 sna: Treat ShmPixmap as ordinary In theory the code handles the automatic promotion and demotion of the GPU buffers. Signed-off-by: Chris Wilson commit 16c751a06c503b85c5ab6588bae277af4348487d Author: Chris Wilson Date: Sat Aug 11 10:44:08 2012 +0100 sna: Only mark userptr bo as snooped on non-LLC architectures Signed-off-by: Chris Wilson commit 59359dba6496229eff7c60dd04536c5add69cec8 Author: Chris Wilson Date: Sat Aug 11 10:25:40 2012 +0100 sna: Mark SHM userptr bo as unreusable Signed-off-by: Chris Wilson commit 64488010504a6e76008bb3b3c1e61caeb025913c Author: Chris Wilson Date: Sat Aug 11 10:21:39 2012 +0100 sna/gen2-5: Substitute an equivalent BLT composite operation Signed-off-by: Chris Wilson commit f464d508c870293699616626d64bd64f16051467 Author: Chris Wilson Date: Sat Aug 11 10:10:32 2012 +0100 sna/gen6+: Try to use the BLT to avoid TLB misses Signed-off-by: Chris Wilson commit e9c0e54e69a5ce93bb4e79d56da4a83fddf49c4e Author: Chris Wilson Date: Sat Aug 11 08:58:14 2012 +0100 sna: Handle userptr failures more gracefully Signed-off-by: Chris Wilson commit 5d6d9231cd2003fda1c6f2dd3174014317a45704 Author: Chris Wilson Date: Fri Aug 10 23:07:07 2012 +0100 sna: Reset BLT state after copy-boxes Signed-off-by: Chris Wilson commit 50bfc172f1f89c023bb3a47418b845e31eba7126 Author: Chris Wilson Date: Fri Aug 10 22:49:26 2012 +0100 sna: Improve a DBG statement Signed-off-by: Chris Wilson commit b33f6754a99f6d11e423d6a03739fa2c04eeed88 Author: Chris Wilson Date: Fri Aug 10 21:59:36 2012 +0100 sna: Add assertions to 8x8 tiled BLTs and reset BLT state afterwards Reported-by: Clemens Eisserer References: https://bugs.freedesktop.org/show_bug.cgi?id=53353 Signed-off-by: Chris Wilson commit ff54d4af39edcddd55f597c404ab6dd548a24aa9 Author: Chris Wilson Date: Fri Aug 10 21:41:38 2012 +0100 sna: Add a couple of debug options to control use of BLT patterns References: https://bugs.freedesktop.org/show_bug.cgi?id=53353 Signed-off-by: Chris Wilson commit 22306144030b5d37df6d46321555bced6e33c50c Author: Chris Wilson Date: Wed Aug 8 19:45:09 2012 +0100 sna: Use the HAS_SEMAPHORES parameter when available Signed-off-by: Chris Wilson commit 465ae1840a883c50d5a5aab7380b30527f00e17b Author: Chris Wilson Date: Wed Aug 8 12:23:25 2012 +0100 sna: Use a compile time constant for determine the zeroth bit Signed-off-by: Chris Wilson commit 85192f00e345830541e3715e211b1f98154bbef4 Author: Chris Wilson Date: Wed Aug 8 12:11:50 2012 +0100 sna: Ignore trailing bits when comparing lines inside the bitmap References: https://bugs.freedesktop.org/show_bug.cgi?id=51422 Signed-off-by: Chris Wilson commit edc1427f3dcddb73acdb5b5e03756ecb30cb3797 Author: Chris Wilson Date: Wed Aug 8 10:53:40 2012 +0100 sna/gen5: Add DBG for context switching Signed-off-by: Chris Wilson commit fec78ddc60b1f03097b334672546c2c7ef21ab4f Author: Chris Wilson Date: Wed Aug 8 10:08:52 2012 +0100 sna: Add DBG option to disable discarding of glyph masks Signed-off-by: Chris Wilson commit b0cd430082d219500729d20c4740440e58773892 Author: Chris Wilson Date: Wed Aug 8 10:07:06 2012 +0100 sna/gen5: Fix use of uninitialised rgba value for DBG Signed-off-by: Chris Wilson commit 9ad923f95c59cdf42363f95c7dd52188c0987296 Author: Chris Wilson Date: Wed Aug 8 09:59:50 2012 +0100 sna: Minor DBG for fallback glyphs and discarding the mask Signed-off-by: Chris Wilson commit 1a0590d133ea6991e0939d1f170f9c10df6856a0 Author: Chris Wilson Date: Tue Aug 7 17:16:35 2012 +0100 sna: Check the composite extents against the clip When computing the composite extents (as opposed to the composite region) also check if the resultant box overlaps the destination clip region (we know it already fits into the extents). This helps in cases with small roi against clipped drawables, such as drawing text onto expose events. References: https://bugs.freedesktop.org/show_bug.cgi?id=51422 Signed-off-by: Chris Wilson commit 5f5a10ef04a8c01b22da2284583851d84273dc2a Author: Paulo Zanoni Date: Mon Aug 6 18:48:09 2012 -0300 Add Haswell PCI IDs Signed-off-by: Paulo Zanoni Reviewed-by: Rodrigo Vivi Signed-off-by: Chris Wilson commit d8f7f933bc2d30e529730521d5628c10df0361de Author: Chris Wilson Date: Sun Aug 5 17:18:54 2012 +0100 sna: Format markup to suppress compiler warning Signed-off-by: Chris Wilson commit 4d0a259988f67f5c569c5d8000c010a7b662efd3 Author: Chris Wilson Date: Sat Aug 4 15:54:19 2012 +0100 sna/gen6: Compile fix for DBG Signed-off-by: Chris Wilson commit d917a276bff4e933590e78404526b929b6b3b497 Author: Chris Wilson Date: Sat Aug 4 18:05:03 2012 +0100 sna/gen4: Restore the w/a flush for fill/copy as well So far, it looks like that the only one we can indeed drop is the composite with mask. Signed-off-by: Chris Wilson commit d754bc3435889b5d19085588c9c888dc08f9522e Author: Cyril Brulebois Date: Mon Nov 7 23:29:29 2011 +0100 Fix build failure when passing --with-builderstring. If --with-builderstring="foo" is passed to configure (and sna enabled): CC sna_driver.lo src/sna/sna_driver.c: In function 'sna_init_scrn': src/sna/sna_driver.c:1023:7: error: token ""foo"" is not valid in preprocessor expressions Fix the missing defined() around the BUILDER_DESCRIPTION variable. Signed-off-by: Cyril Brulebois commit 4bad76b4510d8cf4ccf3f64bcd13ebb80fae4d26 Author: Chris Wilson Date: Sat Aug 4 14:28:41 2012 +0100 sna/dri: Don't force ring selection if we have semaphores Signed-off-by: Chris Wilson commit fb7b584ec9d0ea96175ba3a621699378c6724940 Author: Chris Wilson Date: Sat Aug 4 14:27:46 2012 +0100 sna/dri: Correct ring selection for a busy bo Confused the RENDER ring with the BLT, limiting swap performance. Signed-off-by: Chris Wilson commit 20e58077fe071fd03d44a97194aa163376dc46a4 Author: Chris Wilson Date: Sat Aug 4 11:21:10 2012 +0100 sna/gen6: Reduce ring switching for overlapping copy boxes Signed-off-by: Chris Wilson commit 2345227663f443baa3c30bdf8b8c33827b7f4947 Author: Chris Wilson Date: Sat Aug 4 11:12:12 2012 +0100 sna/gen7: Use a temporary to avoid switching rings for overlapping copies Signed-off-by: Chris Wilson commit 61ec2999afd5dad22580e024421f13afe7c82f3a Author: Chris Wilson Date: Sat Aug 4 10:33:05 2012 +0100 sna/gen4: Restore w/a flush for video One flush removal too many, keep those fingers crossed that the others do not make an unwanted return. Reported-by: Roman Jarosz Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53119 Signed-off-by: Chris Wilson commit 5833ef173a01afb710acf10e806b83c5ca6efc09 Author: Chris Wilson Date: Sat Aug 4 09:31:41 2012 +0100 2.20.3 release Signed-off-by: Chris Wilson commit 036b90f099af21e60fb4c3684616daf1927f705e Author: Chris Wilson Date: Fri Aug 3 21:41:59 2012 +0100 sna/gen7: Correct number of texture coordinates used for video Fixes regresion from commit 33c028f8be829caa4fdb9416ff177dc71f24b68e Author: Chris Wilson Date: Wed Aug 1 01:17:50 2012 +0100 sna/gen6+: Reduce floats-per-vertex for spans Signed-off-by: Chris Wilson commit 05dcc5f1699ba90fc14c50882e8d4be89bc4a4f9 Author: Chris Wilson Date: Fri Aug 3 15:08:45 2012 +0100 Pass the chipset info through driverPrivate rather than a global pointer Signed-off-by: Chris Wilson commit 2b3f4ca33a00440a7005fef69099f8dbaddbbad1 Author: Chris Wilson Date: Fri Aug 3 14:27:51 2012 +0100 Unexport intel_chipsets Only used by the core module code, so make it static. Signed-off-by: Chris Wilson commit 5ff749727d3590368806508ac0d0fa8efd1d1d51 Author: Chris Wilson Date: Wed Jul 25 22:21:29 2012 +0100 sna/gen7: Add constant variations and hookup a basic GT descriptor for Haswell Signed-off-by: Chris Wilson commit cd028cad3dc9b059a3d83b818d581f86e16ec317 Author: Chris Wilson Date: Thu Jul 26 13:17:11 2012 +0100 sna: Limit the batch size on all gen7 variants Seems the limit on the surface state size is common across the family Signed-off-by: Chris Wilson commit 4cd9ec9d404d934268952a1058afa07741b09efe Author: Gwenole Beauchesne Date: Fri May 4 18:26:46 2012 +0200 uxa: fix 3DSTATE_PS to fill in number of samples for Haswell The sample mask value must match what is set for 3DSTATE_SAMPLE_MASK, through gen6_upload_invariant_states(). Signed-off-by: Gwenole Beauchesne Reviewed-by: Kenneth Graunke commit 412668464cf9505629eac20001701af3402dc6e8 Author: Gwenole Beauchesne Date: Fri May 4 17:55:10 2012 +0200 uxa: set "Shader Channel Select" fields in surface state for Haswell For normal behaviour, each Shader Channel Select should be set to the value indicating that same channel. i.e. Shader Channel Select Red is set to SCS_RED, Shader Channel Select Green is set to SCS_GREEN, etc. Signed-off-by: Gwenole Beauchesne Reviewed-by: Kenneth Graunke commit a47ba68996f117fabcb601d35bcc5f99cbcd6122 Author: Gwenole Beauchesne Date: Fri May 4 17:17:22 2012 +0200 uxa: fix max PS threads shift value for Haswell The maximum number of threads is now a 9-bit value. Thus, one more bit towards LSB was re-used. i.e. bit position is now 23 instead of 24 on Ivy Bridge. Signed-off-by: Gwenole Beauchesne Reviewed-by: Kenneth Graunke commit ce4421e175ceb9259208c7c223af8d66282c3db3 Author: Gwenole Beauchesne Date: Fri May 4 17:09:19 2012 +0200 uxa: use at least 64 URB entries for Haswell Signed-off-by: Gwenole Beauchesne Reviewed-by: Kenneth Graunke commit 8c880aa34c522b0d67cbb932771f00c947d00dec Author: Gwenole Beauchesne Date: Fri May 4 17:43:19 2012 +0200 uxa: add IS_HSW() macro to distinguish Haswell from Ivybridge Signed-off-by: Gwenole Beauchesne commit 0c0d1d956a8ba37d9e6f4a5e4f52018c8ce498e5 Author: Gwenole Beauchesne Date: Fri Aug 3 12:03:00 2012 +0100 Introduce a chipset identifier for Haswell (Ivybridge successor) Signed-off-by: Gwenole Beauchesne commit 146959dd5ef28384a3db4fce4bf7840f2b3ec58c Author: Chris Wilson Date: Wed Aug 1 23:43:15 2012 +0100 sna: Drop the clear flag as we discard the GPU damage Hopefully only to keep the sanity checks happy... Signed-off-by: Chris Wilson commit 7404e3085b2ee36fa24f77a02d156b4b1d2dff60 Author: Chris Wilson Date: Wed Aug 1 23:37:35 2012 +0100 sna: Ensure we only mark a clear for a fill on the GPU bo Signed-off-by: Chris Wilson commit ca46d1c7a18596ea9fe2b0577ccf1d110e3e42ac Author: Chris Wilson Date: Wed Aug 1 20:20:29 2012 +0100 sna/gen7: Prefer the BLT for self-copies Looking at the test results for a third time, gives the edge to the BLT again. commit e4a3cd3d16447b5d83d1c8c63c342f1240935267 Author: Chris Wilson Date: Wed Aug 1 17:37:33 2012 +0100 sna: Add validation of the clear flag to pixmap debugging Signed-off-by: Chris Wilson commit eaeda34bef711cc566f51dee092a19a3c4ac1a16 Author: Chris Wilson Date: Wed Aug 1 16:23:05 2012 +0100 sna: Fix computation of st values for SIMD8 dispatch Fixes regression with enabling 8-pixels. Reported-by: Mehran Kholdi Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53044 Signed-off-by: Chris Wilson commit 55231eca818c82620c0146384b19b5d5659f6cd6 Author: Chris Wilson Date: Wed Aug 1 16:22:23 2012 +0100 sna/gen6: Install a fallback 16-pixel shader In case the DBG options leave no shader compiled, make sure we always supply one. Signed-off-by: Chris Wilson commit 4e79c1fef064ce68914eb644edd7f588be3d7300 Author: Chris Wilson Date: Wed Aug 1 15:58:43 2012 +0100 Revert "sna/gen7: Prefer the BLT for self-copies" This reverts commit 89e75dbcb6749bde7587ecc08abed276c255e7f9. Having removed the forced stall for a RENDER self-copy there is no longer a need to encourage ring switching. Signed-off-by: Chris Wilson commit 85cef78a40c6a7a0254f8fba685f224eac6038e1 Author: Chris Wilson Date: Wed Aug 1 13:39:36 2012 +0100 sna/gen7: Simplify the force-stall detection After reducing the number of conditions where we think we need to force the stall on the results, we can then simplify the code to detect that remaining case. Signed-off-by: Chris Wilson commit 9391a2c71f020541a2a62ae68eadd486216a38df Author: Chris Wilson Date: Wed Aug 1 12:50:32 2012 +0100 sna/gen7: Only force a stall for a dirty target if also used as a blend source Signed-off-by: Chris Wilson commit 0a4bb8663b9fa9b39d13bfb49aea30f2aaecce78 Author: Chris Wilson Date: Wed Aug 1 11:19:27 2012 +0100 sna/gen4: Flush not required between fill vertices, only nomaskcomposite A small breakthrough... Still need to flush the primitive between state changes though. Signed-off-by: Chris Wilson commit 33c028f8be829caa4fdb9416ff177dc71f24b68e Author: Chris Wilson Date: Wed Aug 1 01:17:50 2012 +0100 sna/gen6+: Reduce floats-per-vertex for spans Signed-off-by: Chris Wilson commit 9b2873d3d97b6780d878bd9b821fba0302470f9f Author: Chris Wilson Date: Wed Aug 1 00:01:15 2012 +0100 sna/gen4+: Implement an opacity shader Avoid the cumbersome lookup through the alpha gradient texture and simply multiply the incoming opacity value. The next step will be to reduce the number of floats required per vertex. Now that we have removed the primary user of the alpha solid cache, it may be time to retire that as well. Signed-off-by: Chris Wilson commit fd3a1236051265fab700aad689a171de47d7338f Author: Chris Wilson Date: Tue Jul 31 10:20:51 2012 +0100 sna/gen6: Enable 8 pixel dispatch This gives a small performance increase when operating with rectangles, which is reasonably frequent. Signed-off-by: Chris Wilson commit 8922b804bc9ed27957c81f7cda4812ab4ecbd4de Author: Chris Wilson Date: Tue Jul 31 10:20:51 2012 +0100 sna/gen7: Enable 8 pixel dispatch This gives a small performance increase when operating with rectangles, which is reasonably frequent. Signed-off-by: Chris Wilson commit 492093d04b1486dd34aafe2f109a77ddeb836f18 Author: Chris Wilson Date: Tue Jul 31 18:39:17 2012 +0100 sna: Generate shaders for SNB+ 8-pixel dispatch Not ideal yet, sampling an alpha-only surface using SIMD8 only seems to ever return 0... Signed-off-by: Chris Wilson commit 6a5ed88f9fab654c9c11c566b841d42150d26c5d Author: Chris Wilson Date: Mon Jul 30 17:08:20 2012 +0100 sna/gen4: Tidy debugging code Cluster the ifdefs together in the initialisation code. Signed-off-by: Chris Wilson commit 46ec9b0ed55d0fcade40f92206e59c02e402d870 Author: Chris Wilson Date: Tue Jul 31 17:41:34 2012 +0100 sna: Update DPMS mode on CRTC after forcing the outputs on If we forcibly update the outputs to be on, then the core will not issue its on DPMS event and we miss out on updating the CRTC bookkeeping in sna_crtc_dpms(). So we need to update the flag on the CRTC as we manipulate the outputs during modesetting. References: https://bugs.freedesktop.org/show_bug.cgi?id=52142 Signed-off-by: Chris Wilson commit 8f166d26b8a93592939068c5a8d160981c724cfd Author: Chris Wilson Date: Tue Jul 31 11:58:24 2012 +0100 sna: Be more careful with damage reduction during CompositeRectangles We actually need to force DAMAGE_ALL in case we are promoting the GPU pixmap. Signed-off-by: Chris Wilson commit e6cb5d93eaa01e7f4763f797bba341f3cc481d98 Author: Chris Wilson Date: Mon Jul 30 11:14:58 2012 +0100 sna: Avoid overlapping gpu/cpu damage with IGNORE_CPU We cannot simply ignore the presence of CPU damage with IGNORE_CPU but must remember to discard it. Signed-off-by: Chris Wilson commit c9805ba98775bb1e969ff59c7044fe1a49673ca8 Author: Chris Wilson Date: Sun Jul 29 18:19:37 2012 +0100 sna: Export sna_drawable_use_bo() to select target for FillRectangles Signed-off-by: Chris Wilson commit 89e75dbcb6749bde7587ecc08abed276c255e7f9 Author: Chris Wilson Date: Sun Jul 29 15:36:44 2012 +0100 sna/gen7: Prefer the BLT for self-copies If we are copying to ourselves, we have to regularly flush the render cache at which point the RENDER pipeline is slower than the BLT pipeline. Signed-off-by: Chris Wilson commit 33d6afda6cec124494f49b74152768da8a3fbdb5 Author: Chris Wilson Date: Sun Jul 29 09:51:16 2012 +0100 sna/gen7: Compile basic kernels at runtime commit eba8d3b3e14a5a16cea6cb8a89f12d3feb8f3d99 Author: Chris Wilson Date: Sun Jul 29 09:51:16 2012 +0100 sna/gen6: Compile basic kernels at runtime commit 8515ec90405912b3d776defcd6e81b1b5f699f1e Author: Chris Wilson Date: Sun Jul 29 09:51:16 2012 +0100 sna/gen5: Compile basic kernels at runtime commit 00c08b1842c9493ca918a868202946b2e7150de0 Author: Chris Wilson Date: Sun Jul 29 09:51:16 2012 +0100 sna/gen4: Compile basic kernels at runtime commit 7c9dbc980b760e0053d83ca2d7cb147613285680 Author: Chris Wilson Date: Sun Jul 29 09:50:39 2012 +0100 sna: Assemble SF and WM kernels using brw Signed-off-by: Chris Wilson commit 8ebafa0493c0fa08ab9d80eeb1191b7560dc0863 Author: Chris Wilson Date: Wed Sep 21 19:06:07 2011 +0100 sna: Add the brw assembler In order to construct programs on the fly to cater for the combinatorial number of possible shaders, we need an assembler, whilst also taking the opportunity to remove some of the inefficiencies and mistakes from the current shaders. Signed-off-by: Chris Wilson commit ca9d9c02a260bf7930e04bf64e93cc051893c04e Author: Chris Wilson Date: Sat Jul 28 23:08:07 2012 +0100 sna: Prefer not to create a GPU bo without RENDER acceleration Unless that bo happens to be used on a render chain to the scanout. Signed-off-by: Chris Wilson commit eefbe5b6038424566faf7333bb09764b050dd6b4 Author: Chris Wilson Date: Mon Jul 30 10:56:29 2012 +0100 sna: Debug option to test migration of inactive pixmaps Signed-off-by: Chris Wilson commit d3499cacb59f19b5a3439a630ffbc3e105a27b75 Author: Chris Wilson Date: Sun Jul 29 23:00:15 2012 +0100 sna: Assert that we never attempt to submit a batch whilst wedged We should be asserting at the point that we insert the invalid operation into the batch, but asserting upon submitting the batch is a useful failsafe. Signed-off-by: Chris Wilson commit cb4d789f98e6e05ec29e5242887018c7450ddf10 Author: Chris Wilson Date: Sun Jul 29 22:55:44 2012 +0100 sna: Disable the warning for a hung GPU is we manually set wedged Only warn about a hung GPU if we encounter an EIO during operation, but don't warn if we set wedged during initialisation based on unsupported hw or user request. Signed-off-by: Chris Wilson commit 0fd680ff52f7ce0a101c617dfb8997c4e228e3ad Author: Chris Wilson Date: Sun Jul 29 22:51:26 2012 +0100 Don't disable acceleration on 830/845g by default Run the risk of a GPU hang (it shouldn't endanger the entire machine normally) and let the user elect to disable it through Option "NoAccel" "true" Signed-off-by: Chris Wilson commit 3d45f0affe263985f440e144203ed7cbb3803696 Author: Chris Wilson Date: Sat Jul 28 18:21:08 2012 +0100 sna: Honour the Option "DRI" References: https://bugs.freedesktop.org/show_bug.cgi?id=52624 Signed-off-by: Chris Wilson commit fb385745a2347f8966765567e78229d67ddc8d60 Author: Chris Wilson Date: Fri Jul 27 13:24:04 2012 +0100 sna/gen4: Move the common vertex_offset==0 check into the flush() Signed-off-by: Chris Wilson commit 73ddd8b0decee444a57f10a11f05deebba686649 Author: Chris Wilson Date: Fri Jul 27 12:43:00 2012 +0100 sna/gen4: Further refinement to the GT allocation Still hunting for why gen4 fails utterly. Signed-off-by: Chris Wilson commit 717823a9f77cfedc50e03c5c31c1da44a396b561 Author: Zhigang Gong Date: Fri Jul 27 18:12:26 2012 +0800 uxa/dri (glamor): Use exchange buffer in glamor fixup. The previous implementation is to create a new textured pixmap based on the newly created pixmap's buffer object. This is not efficient, as we already created it when we call CreatePixmap. We can just exchange the underlying texture/image buffers by calling intel_glamor_exchange_buffers(). And this commit seems also fix a weird rendering problem when working with compiz/mutter. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit a8ee1406244d8b8399bf933d6b61bfd14374b5f9 Author: Chris Wilson Date: Fri Jul 27 09:07:16 2012 +0100 2.20.2 release Signed-off-by: Chris Wilson commit bef73cd9279be3438e467981db39c67bc13104f5 Author: Chris Wilson Date: Thu Jul 26 21:54:33 2012 +0100 sna/dri: Select the engine before emitting the wait So that if we have a flexible WAIT_FOR_EVENT that can go on either pipeline, we can choose our preferred pipeline for DRI. Signed-off-by: Chris Wilson commit 1ced4f1ddcf30b518e1760c7aa4a5ed4f934b9f5 Author: Chris Wilson Date: Thu Jul 26 10:50:31 2012 +0100 Reduce maximum thread count for IVB GT1 to avoid spontaneous combustion Somewhere along the way it seems that IVB GT1 was reduced to only allow a maximum of 48 threads, as revealed in the lastest bspecs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52473 Signed-off-by: Chris Wilson commit 8f8f8759111f791ee99adfd87296443fb0e6acad Author: Chris Wilson Date: Thu Jul 26 17:39:34 2012 +0100 sna/gen4: Tweak heuristics for render/blt usage Signed-off-by: Chris Wilson commit c9dd1401615f0ed9492a0c0f547fb37150e013d1 Author: Chris Wilson Date: Thu Jul 26 16:31:16 2012 +0100 sna/gen4: Bump thread counts Signed-off-by: Chris Wilson commit 7f3fdef98c1ab2fa27439c3be9810b7a934017ce Author: Chris Wilson Date: Thu Jul 26 15:39:05 2012 +0100 sna/gen7: IVB requires a complete pipeline stall when changing blend modes Similar to how SandyBridge behaves, I had hoped that with IvyBridge they would have made the pipelined operation actually pipelined, but alas. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52473 Signed-off-by: Chris Wilson commit 0938b3df8c25178c8ea0012e1ead1061d03a4e7c Author: Chris Wilson Date: Thu Jul 26 15:21:59 2012 +0100 sna/dri: Add an explanatory assertion Signed-off-by: Chris Wilson commit c621183466aa55a5938027b702069e792df2272d Author: Chris Wilson Date: Thu Jul 26 15:18:56 2012 +0100 sna/dri: Tidy fallback/normal CopyRegion Signed-off-by: Chris Wilson commit 52d2491a1bafb979d79bb970027c55788f199acb Author: Chris Wilson Date: Thu Jul 26 15:19:14 2012 +0100 sna/video: Protect against attempting to use TexturedVideo whilst wedged Signed-off-by: Chris Wilson commit 8c0e3bbb0c301d0fa4652aa38edd84a9fd6b555e Author: Chris Wilson Date: Thu Jul 26 14:58:04 2012 +0100 sna: Force the damage on the DRI pixmap to be flushed to the GPU Otherwise nothing will happen if we consider ourselves wedged. Signed-off-by: Chris Wilson commit f50d7b03b5d0b81b24f0acb4ae555545bbdaa179 Author: Chris Wilson Date: Thu Jul 26 14:47:44 2012 +0100 sna: Only recommend not to create bo for a pixmap whilst wedged This allows us to continue to map a GPU bo and operate inplace if we are force to create a GPU bo for a compositor. Signed-off-by: Chris Wilson commit 49403ddd1bd9a23e1b32a10e7d0757ae2897a579 Author: Chris Wilson Date: Thu Jul 26 14:44:14 2012 +0100 sna/dri: Mark a flush required for any new DRI already on exec/dirty lists Signed-off-by: Chris Wilson commit efe3c8ff48738f2a274e1d4514d32499fc4aadbc Author: Chris Wilson Date: Thu Jul 26 14:43:33 2012 +0100 sna: Allow DRI to force allocation of a GPU bo and backing pixmap Signed-off-by: Chris Wilson commit 2069384f9f06d3ef9dbb0c3f2c64cac4b24e10fc Author: Chris Wilson Date: Thu Jul 26 14:15:45 2012 +0100 sna/dri: Implement fallback handling for CopyRegion whilst wedged Signed-off-by: Chris Wilson commit b18143de47e060b67a46d9c68590a2d35df9fca6 Author: Paul Menzel Date: Thu Jul 26 12:51:57 2012 +0200 NEWS: Correct release version: s/2.12.0/2.20.0/ Signed-off-by: Paul Menzel Signed-off-by: Chris Wilson commit c262d02fb5defe9100df54cf83cc00e11e335745 Author: Chris Wilson Date: Thu Jul 26 01:12:11 2012 +0100 Limit PCI matching to VGA devices Fixes X -configure Signed-off-by: Chris Wilson commit ad6355311b8b80777bc0fec95f6bf6cd1b4969d9 Author: Chris Wilson Date: Thu Jul 26 01:02:53 2012 +0100 sna: Compile against xorg-1.10 Signed-off-by: Chris Wilson commit b6c7c490d76c683b7b5c89d20f902603b85bd3bc Author: Chris Wilson Date: Thu Jul 26 00:48:59 2012 +0100 sna: Check for a NULL scanout after DPMS off with shadow enabled We may mark the scanout as detached when all outputs are turned off (for example during rotation) and so in the subsequent block handler we need to be careful in case we are handling a detached shadow. Reported-by: chr.ohm@gmx.net Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52514 Signed-off-by: Chris Wilson commit f4acc01bb09f68edbad4c6cc7e04c271c92661c1 Author: Chris Wilson Date: Wed Jul 25 22:43:32 2012 +0100 sna: Restore inplace upload for DRI compositors With a DRI compositor we have to flush the output after every request, which leads to major inefficiencies. This can be mitigated slightly if we know we will have to upload shortly, which we track using the pixmap flush flag. In particular PutImage is meant to upload inplace to an active DRI buffer, however this was accidentally dropped in commit a253c95ec63b2b075e66ae7380fed6a73469eba5 Author: Chris Wilson Date: Sun Jul 15 13:32:35 2012 +0100 sna: Prefer uploads to be staged in snoopable bo Performace of putimage500 on ivb i7-3720qm: bare: 4610 gnome-shell: 3000 patched: 3390 Reported-by: Michael Larabel Signed-off-by: Chris Wilson commit 5c969a05ef815b261e157fe8d1172aebfd7f5841 Author: Chris Wilson Date: Wed Jul 25 20:28:41 2012 +0100 sna/gen7: Move the PS thread count definition into the constant struct Signed-off-by: Chris Wilson commit 901bb618215d65747eb0a8d481c77c1201f69362 Author: Chris Wilson Date: Wed Jul 25 20:13:15 2012 +0100 sna/gen7: Remove duplicated constants Signed-off-by: Chris Wilson commit 8c5077e4ed055a97bf9deda59c0e9a45e42317ca Author: Chris Wilson Date: Wed Jul 25 16:59:11 2012 +0100 Assume all unknown chipsets are future gen I think the likelihood of a new product being launched based on a 8xx design is remote enough not to worry about. Signed-off-by: Chris Wilson commit 954d9c6aca792098cb16a46b4ec8d5fc104b15a9 Author: Chris Wilson Date: Wed Jul 25 15:41:29 2012 +0100 sna: Initialise single-shot tile offsets before use As noted by the compiler amidst all the noise. Signed-off-by: Chris Wilson commit 484b072072c8297a87940c9e32097923f0a77c8f Author: Chris Wilson Date: Wed Jul 25 12:22:47 2012 +0100 sna: Add 'gmux_backlight' to list of known devices for backwards compatability Reported-by: Austin Lund References: https://bugs.freedesktop.org/show_bug.cgi?id=52423 Signed-off-by: Chris Wilson commit 0ab6d7a50d37cf4454577cb8c333d4b8683aa054 Author: Chris Wilson Date: Wed Jul 25 12:20:36 2012 +0100 sna: Prefer platform backlight devices over firmware This is in contrast to libbacklight but closer to our original code as we prefer a known custom backlight controller over the ACPI interfaces. As only the ACPI interfaces are marked as firmware, and the custom backlight controllers as platform, we therefore need to prefer platform backlight devices. Reported-by: Austin Lund References: https://bugs.freedesktop.org/show_bug.cgi?id=52423 Signed-off-by: Chris Wilson commit b6d82ab07661aba98963f239f9501b50c3910962 Author: Chris Wilson Date: Wed Jul 25 10:40:07 2012 +0100 sna: Reduce ping-pong for Composite with render disabled Signed-off-by: Chris Wilson commit de707b7dc853a3b315ead9789d5ca541412c99bc Author: Chris Wilson Date: Wed Jul 25 09:05:46 2012 +0100 uxa: Add Apple's gmux to the list of known preferred backlights Reported-by: Austin Lund Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52423 Signed-off-by: Chris Wilson commit 3d254e4010d0753f433cfe62c6a7546b02482847 Author: Chris Wilson Date: Mon Jul 23 23:45:33 2012 +0100 sna: Use SETUP_BLT to reduce overheads for tiled BLT Signed-off-by: Chris Wilson commit 2ed44149eaa27b9632ec83a776f3ee67b0eec7b0 Author: Chris Wilson Date: Mon Jul 23 23:45:33 2012 +0100 sna: Use SETUP_BLT to reduce overheads for stippled BLT Signed-off-by: Chris Wilson commit c1785aaca2c9347114d28f114ee59ef8206d829b Author: Chris Wilson Date: Mon Jul 23 23:00:25 2012 +0100 sna: Remove a surplus function Signed-off-by: Chris Wilson commit 554fce8a65b2518cae032f1eadf58830559299c8 Author: Chris Wilson Date: Mon Jul 23 22:59:16 2012 +0100 uxa: Pass the correct parameters to intel_detect_chipset() Signed-off-by: Chris Wilson commit 40d90dfd8674c255a45b46bbdc09d497af5b3f50 Author: Chris Wilson Date: Mon Jul 23 21:55:46 2012 +0100 intel: Refactor the common chipset detection/override Reduce the duplicate messages for which type of chip we by amalgamating the common code. Signed-off-by: Chris Wilson commit e3f6c48d18c316899c71b6fc34971039c6f9e5f8 Author: Chris Wilson Date: Mon Jul 23 14:43:23 2012 +0100 sna: Refactor PutImage to avoid calling drawable_gc_flags() too early drawable_gc_flags() asserts that the gc has been moved to the CPU prior to its calls so that it can read the reduced raster operation. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 1af26ea4228a9d7768b475b4f9164d2c7620d4fd Author: Chris Wilson Date: Mon Jul 23 14:39:44 2012 +0100 sna: Flesh out tiled operations using the BLT Before enabling the RENDER pipeline for this operation, let's just see what is required to fully use the BLT pipeline as well. Signed-off-by: Chris Wilson commit ac182a006732525a921a9c539e5ebfb537ad3b52 Author: Chris Wilson Date: Mon Jul 23 11:05:05 2012 +0100 sna: Hold a reference to the full stipple pattern for repeated tiles Signed-off-by: Chris Wilson commit 83f683b47063eab8cfb5037d02133dd977c3fc25 Author: Chris Wilson Date: Sun Jul 22 23:20:23 2012 +0100 2.20.1 release A good brown paper bag bug release for SNA. Signed-off-by: Chris Wilson commit 9402bdcc13f7e96dfe527ff4a3da8d13a7870a02 Author: Chris Wilson Date: Sun Jul 22 22:14:52 2012 +0100 sna/glyphs: Also discard the glyph mask for bitmaps with an opaque source Though I expect all such glyphs to be caught by the non-overlapping checks... Signed-off-by: Chris Wilson commit b315e0ebb75d8391ebef7ebe53741a5e33c968bb Author: Chris Wilson Date: Sun Jul 22 20:07:38 2012 +0100 sna: Tweak the fallback hints for XYPixmap PutImage As the fallback uses a multiple-pass algorithm updating one plane at a time, we wish to prepare the fallback surface for reads. Signed-off-by: Chris Wilson commit 8acaf2693e176a92993a498683f121cfe0343fd4 Author: Chris Wilson Date: Sun Jul 22 12:28:34 2012 +0100 sna: Promote tiled operations to the GPU if the tile is already on the GPU Signed-off-by: Chris Wilson commit 7d4a3e371beea65bf66e54ae13789d6d5ca91f8b Author: Chris Wilson Date: Sun Jul 22 11:19:13 2012 +0100 sna: Use an upload buffer for large stipples Signed-off-by: Chris Wilson commit 40e0cf32a25e43e16184b2af87a1e1abeb8e4052 Author: Chris Wilson Date: Sat Jul 21 19:43:23 2012 +0100 sna/dri: We fail at predicting the flip frame Simply report the values from the kernel, and transfer the blame... Signed-off-by: Chris Wilson commit c6e316eeba3008b351f2cd63829154f4672c5417 Author: Chris Wilson Date: Sat Jul 21 18:18:32 2012 +0100 sna: Adjust hints to prefer rendering convex polygon with the GPU Keep the general polygons as only using the GPU if necessary, until the cost of the routines is analysed. Signed-off-by: Chris Wilson commit f1e7248cb353d634f27d297059911168ce1a0762 Author: Chris Wilson Date: Sat Jul 21 16:08:31 2012 +0100 sna: Expand the heuristic for predicting when to use CPU bo for readback For tiny transfers, the cost of setting up the GPU operation outweighs the actual savings through increased throughput. So we try to guess when it will be preferrable to simply read from the GPU bo directly. Signed-off-by: Chris Wilson commit 06db69c2c7023f702f9773be90144fdf7a1159e4 Author: Chris Wilson Date: Sat Jul 21 15:28:10 2012 +0100 sna: Update assertion for cached io buffers As kgem_buffers may be reused and repurposed through the snoop cache it is no longer true that only proxies will have the io flag set. Signed-off-by: Chris Wilson commit d715e1e01437049e167462281d51b5e214594361 Author: Chris Wilson Date: Sat Jul 21 15:04:31 2012 +0100 sna: Also discard the last-was-cpu flag when overwriting cpu damage We interpret a FillRect that erradicates the existing damage as a clear-event and an opportunity to see if it is worth migrating the render commands to the GPU. This is undermined if we leave the 'prefer-cpu' flag intact. Signed-off-by: Chris Wilson commit e95825d17ce65ad8173a5e6518a98969e236a4f8 Author: Chris Wilson Date: Sat Jul 21 14:38:17 2012 +0100 sna: Enable snooping on the reused linear buffer This explains why suddenly I was seeing clflush again on a couple of machines... Signed-off-by: Chris Wilson commit c5e6b5874f334b9124a17f017c6eb175cf88f115 Author: Chris Wilson Date: Sat Jul 21 14:26:52 2012 +0100 sna: Fix the reversed not SHM assertion Should be double checking that we are not about to free a CPU bo pinned to a SHM pixmap. Signed-off-by: Chris Wilson commit f36b656ab2bc16ec8849cadb0afb574bb742c3a3 Author: Chris Wilson Date: Sat Jul 21 13:18:40 2012 +0100 sna: Avoid marking io/snoop buffers as unreusable unnecessarily As they are kept in special caches, we can reserve the unreusable flags for exceptional buffers. Signed-off-by: Chris Wilson commit 37dfdb0e9e86effc3ca8b590c98aa2382e8f0cea Author: Chris Wilson Date: Sat Jul 21 13:01:09 2012 +0100 sna: Correct assertion for __kgem_bo_size() Only proxies are measured in bytes not pages. Signed-off-by: Chris Wilson commit 83ad661bc73e9d0094b669c5203e25afc3937bb7 Author: Chris Wilson Date: Sat Jul 21 12:51:41 2012 +0100 sna: Change the vmap interface name to userptr This is in common with the other drivers and avoids the conflict with 'vmalloc/vmap' used by the kernel for allocation of contiguous virtual mappings. Signed-off-by: Chris Wilson commit 8dcccd308222bcf1b96f2ee15842b4558ea5f29e Author: Chris Wilson Date: Sat Jul 21 12:47:21 2012 +0100 sna: s/vmap/snoop/ since we use the flag more generically Signed-off-by: Chris Wilson commit 6acc9e6a6e1de2a11597c810e02f793774cef2dd Author: Chris Wilson Date: Sat Jul 21 12:07:46 2012 +0100 sna: Fix role reversal of __kgem_bo_size() and kgem_bo_size()! Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 286b0e1a48cab85191dfbb112c8dd14aeaa70956 Author: Chris Wilson Date: Fri Jul 20 16:04:37 2012 +0100 sna: Refresh experimental userptr vmap support Bring the code uptodate with both kernel interface changes and internal adjustments following the creation of CPU buffers with set-cacheing. Signed-off-by: Chris Wilson commit 93c794eb3f80bef64f1619986a7c950229dc7a47 Author: Chris Wilson Date: Fri Jul 20 20:34:53 2012 +0100 sna: Micro-optimise copying boxes with the blitter Signed-off-by: Chris Wilson commit a0d95a9c2d3a27eafbe459e2aefe772c006e596f Author: Chris Wilson Date: Fri Jul 20 20:34:23 2012 +0100 sna: Only update a buffer when it becomes dirty Signed-off-by: Chris Wilson commit c52d265b83b033fb2a275fcc9a8a8d146e3afdf6 Author: Chris Wilson Date: Fri Jul 20 19:38:38 2012 +0100 sna: Tweak CPU bo promotion rules for CopyArea Signed-off-by: Chris Wilson commit f92a64dd9162731210b14368b6ee408356d7fefc Author: Chris Wilson Date: Fri Jul 20 15:54:35 2012 +0100 sna: Only set the vmap flag after we make the bo snoopable Otherwise if we fail then we incorrectly add the handle to the vmap cache. Signed-off-by: Chris Wilson commit 8b4cf24f1403bf3d929cc0725de66b3d0e08ebaf Author: Chris Wilson Date: Fri Jul 20 14:46:32 2012 +0100 sna: Also check whether the first upload box can use the BLT No point checking boxes 1..n if box 0 is the troublemaker! Signed-off-by: Chris Wilson commit df14b285be44f0c40a718bb8ae09a9558b1eb2c7 Author: Chris Wilson Date: Fri Jul 20 14:35:28 2012 +0100 sna/gen6: Prefer the more flexible render ring for large surfaces Signed-off-by: Chris Wilson commit 578ff11c3753ede2c81afc47302991e3d3b316f2 Author: Chris Wilson Date: Fri Jul 20 14:24:06 2012 +0100 sna: Just use composite.box() when we only have one box Signed-off-by: Chris Wilson commit fb7987fc0b51cf3b83dcf78bcefe65ec3af32ccf Author: Chris Wilson Date: Fri Jul 20 13:12:27 2012 +0100 sna/dri: Cleanup ring selection for SNB+ CopyRegion Signed-off-by: Chris Wilson commit 3b56588fbaa2c4ccdfb2f2a8f5656d2cda9dacd7 Author: Chris Wilson Date: Fri Jul 20 10:19:25 2012 +0100 sna: Update WIP userptr example usage Signed-off-by: Chris Wilson commit 473a1dfb683ed576d86b37aba36aaa0e379f4606 Author: Chris Wilson Date: Fri Jul 20 09:56:13 2012 +0100 sna: Rename kgem_partial_bo to kgem_buffer Signed-off-by: Chris Wilson commit 8e6e8a2fa8adda9ae9be8a88fbb14851e9d2df2e Author: Chris Wilson Date: Fri Jul 20 09:51:46 2012 +0100 sna: Allow the snoopable upload buffer to take pages from the CPU vma cache Signed-off-by: Chris Wilson commit 979035bb9ce04db5fe30efa4f6daab0a40f6af57 Author: Chris Wilson Date: Thu Jul 19 20:06:28 2012 +0100 sna: Remove topmost unused 'flush' attribute Signed-off-by: Chris Wilson commit b83011909aaf185f05fc2df743882c2410eff46d Author: Chris Wilson Date: Thu Jul 19 19:51:46 2012 +0100 sna: Replace 'sync' flag with equivalent 'flush' The only difference is in semantics. Currently 'sync' was only used on CPU buffers for shared memory segments with 2D clients, and 'flush' on GPU buffers shared with DRI clients. Signed-off-by: Chris Wilson commit 88bee3caeaacbbb1b4d789ea3db9a3802a62b59d Author: Chris Wilson Date: Thu Jul 19 19:40:34 2012 +0100 sna: Remove unused scanout-is-dirty? flag Signed-off-by: Chris Wilson commit 6f60f89588caa70e7d8ed53ba453bbe8c2094a95 Author: Chris Wilson Date: Thu Jul 19 16:58:34 2012 +0100 sna/gen6: Bump the WM thread count to 80 Note that we should only do this when "WiZ Hashing" is disabled. So we should be checking the GT_MODE register (bring on i915_read!) to be sure that is safe to do so. However, it gives a big boost to performance of render copies... It also causes perf benchmarks to hit thermal limits much quicker. Signed-off-by: Chris Wilson commit fc39d4b5cb105d269c5349e479daf112f5d93580 Author: Chris Wilson Date: Thu Jul 19 16:25:54 2012 +0100 sna/gen6: Add a simple DBG option to limit usage of either BLT/RENDER We can force the code to either select only BLT or RENDER operations - for those that we have a choice for at least! Signed-off-by: Chris Wilson commit 15d3eea7004822e5cbd48d676692e1b6a2b26d3e Author: Chris Wilson Date: Thu Jul 19 16:22:20 2012 +0100 sna: Handle mixed bo/buffers in assertions Signed-off-by: Chris Wilson commit e4fce3b7801038e4f64d848a0995f4b441b4d2aa Author: Chris Wilson Date: Thu Jul 19 10:50:09 2012 +0100 sna/gen4: Hookup composite spans Due to the unresolved flushing bug it is no faster (so only enable when we definitely can't do the operation inplace), however it does eliminate a chunk of CPU overhead. Signed-off-by: Chris Wilson commit 5f138176bf15682324d2e8cfa9fac3e49604bf8f Author: Chris Wilson Date: Thu Jul 19 10:32:33 2012 +0100 sna: Tweak order of screen re-initialisation Signed-off-by: Chris Wilson commit 9bd0f8f3e7783d7a6bab707fc08ec96830cd5809 Author: Chris Wilson Date: Thu Jul 19 09:40:07 2012 +0100 i810: Correct the double negative and enable XAA when available Signed-off-by: Chris Wilson commit d145d0e1459f578eea621e6944814642e5dd431f Author: Chris Wilson Date: Thu Jul 19 09:23:10 2012 +0100 i810: Handle initialisation without the XAA module present at runtime Signed-off-by: Chris Wilson commit 7a3b98e05b706548527e73b2008600391c601a62 Author: Chris Wilson Date: Thu Jul 19 08:42:05 2012 +0100 sna: Re-register the SHM funcs every server generation As the SHM layer hooks into the CloseScreen chain to free its privates, we then need to call the registration function again on the next generation to ensure that the private is reallocated before use. Reported-by: Pawel Sikora Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52255 Signed-off-by: Chris Wilson commit 4bcab83bbddf8a698aa83f5038f9ab019a404bd5 Author: Chris Wilson Date: Wed Jul 18 22:19:45 2012 +0100 i810: DRI is not dependent upon XAA The blit routines is uses are independent of the XAA driver interface and can be used separately. Signed-off-by: Chris Wilson commit 558c8251299b786cab1ac83dbd35f077224b5950 Author: Chris Wilson Date: Wed Jul 18 22:00:30 2012 +0100 sna/gen4+: Drop unsupported source formats Once again I've confused existence of the enum with the ability of the sampler to read that format. Signed-off-by: Chris Wilson commit 9f3b3098c9f870d303a9de2b9c0db119eff5a865 Author: Chris Wilson Date: Wed Jul 18 21:39:47 2012 +0100 sna/dri: Allow DRI2 to be loaded even if we are wedged Just because the GPU is spitting EIO at us does not necessarily imply that a DRI client will also suffer. Spit out a warning for later bug reporting and let them find out for themselves! Signed-off-by: Chris Wilson commit 15b7191fd363e9e6083844a218e25419695d55f1 Author: Chris Wilson Date: Wed Jul 18 12:59:41 2012 +0100 sna/gen6: Micro-optimise render copy emission Backport of the changes made for IVB. Signed-off-by: Chris Wilson commit 4eea9ac0035dd72f3c637adc39eeaeda46472e9e Author: Chris Wilson Date: Wed Jul 18 12:59:41 2012 +0100 sna/gen7: Micro-optimise render copy emission The goal is bring the overhead down to that of using the blitter. Tricky given the number of steps to using the 3D pipeline compared to the BLT... A stretch goal would be to make IVB GPU bound for -copywinpix10! Signed-off-by: Chris Wilson commit 267429bbb146449ee4d3b88fa8e23c5b1d53470a Author: Chris Wilson Date: Wed Jul 18 19:24:44 2012 +0100 sna: Enable runtime detection of set-cacheing ioctl Signed-off-by: Chris Wilson commit c0b3674d042ff55d64ad1fd0d64926e1967be323 Author: Chris Wilson Date: Wed Jul 18 20:48:27 2012 +0100 sna/trapezoids: Only reduce bounded operators to a single pass Only for a few operators can we replace the opacity mask by premultiplying into the source. Signed-off-by: Chris Wilson commit bb0303677c38076db14dfbceec3636197a971e8c Author: Chris Wilson Date: Wed Jul 18 10:40:50 2012 +0100 sna/trapezoids: Use pixman from within the spans to reduce two-pass operations Reduce the two pass CompositeTrapezoids if we can perform the operation inplace by calling pixman_image_composite from the span. This step enables this for xrgb32. Signed-off-by: Chris Wilson commit bee1a14618797b3d3a1c1a20eb72644fa907c048 Author: Chris Wilson Date: Wed Jul 18 09:38:32 2012 +0100 sna: Fix processing of the last fallback box The evil typo caused us to misalign the clip boxes and run over a garbage array on 64-bit builds. Reported-by: Edward Sheldrake Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52163 Signed-off-by: Chris Wilson commit 88cb1968b6dbf3edfa885da9503e91124af46007 Author: Chris Wilson Date: Wed Jul 18 09:38:03 2012 +0100 sna: Add more DBG for fallback processing Hunting the lost box... Signed-off-by: Chris Wilson commit 36f2e46619598e9bca4fe1207aa2f157bfa1ecf4 Author: Chris Wilson Date: Wed Jul 18 00:45:54 2012 +0100 sna: Reuse the snoopable cache more frequently for upload buffers Now that we are keeping a small cache of snoopable buffers, experiment with using them for uploads more frequently. Signed-off-by: Chris Wilson commit 73f07abbd2d78418e5a66262f293b5ed80b7ccb4 Author: Chris Wilson Date: Wed Jul 18 00:19:49 2012 +0100 sna: Maintain a short-lived cache of snoopable CPU bo for older gen Once again, we find that frequent buffer creation and manipulation of the GTT is a painful experience leading to noticeable and frequent application stalls. So mitigate the need for fresh pages by keeping a small stash of recently freed and inactive bo. Signed-off-by: Chris Wilson commit 77520641a332a622c0b5378bd254ed5cb46a5f0a Author: Chris Wilson Date: Tue Jul 17 22:09:33 2012 +0100 i810: Replace XAAGet.*ROP() with local tables The XAAGetPatternROP() and XAAGetCopyROP() functions were removed along with the rest of XAA so we need to implement those tables locally. Reported-by: Knut Petersen Signed-off-by: Chris Wilson commit caef63e0268e59e439b030a9a338e81d5cf8e311 Author: Chris Wilson Date: Tue Jul 17 21:22:57 2012 +0100 i810: Split xaa routines from common acceleration methods Some of the routines in i810_accel.c are specific to XAA whilst others are used elsewhere, for example in i810_dri.c. Therefore we have to be selective over which ones we compile out without xaa. Reported-by: Knut Petersen Signed-off-by: Chris Wilson commit 53ff19f45a3cc4863845c23e8d3c2c2b95e03fd9 Author: Chris Wilson Date: Tue Jul 17 19:40:16 2012 +0100 sna: Allow wedged CopyPlane to operate inplace on the destination Signed-off-by: Chris Wilson commit d4fa4d5494db45b227c9ae7f7a90cd5dfd940027 Author: Chris Wilson Date: Tue Jul 17 19:29:32 2012 +0100 sna: Allow inplace copies for wedged CopyArea Signed-off-by: Chris Wilson commit 217eeadf81a8cbb43e495e1e937acdd95c703377 Author: Chris Wilson Date: Tue Jul 17 19:35:06 2012 +0100 sna: Allow operation inplace to scanout whilst wedged Signed-off-by: Chris Wilson commit 40ff29480a0dbf458adf1a1b0d3275ad1361530e Author: Chris Wilson Date: Tue Jul 17 18:38:49 2012 +0100 sna: Tweak fast blt path Signed-off-by: Chris Wilson commit fce69c79c4840e7863d7c382da0d22be90a9f19a Author: Chris Wilson Date: Tue Jul 17 18:28:24 2012 +0100 sna: prefer fbBlt over pixman_blt It is currently much better optimised through memcpy. Signed-off-by: Chris Wilson commit c29f96d50839388377ad57c6366f9bc7ad8b9d0a Author: Chris Wilson Date: Tue Jul 17 13:02:51 2012 +0100 sna/gen7: Bump the number of pixel shader threads for IVB GT2 Spotted-by: Kilarski, Bernard R" Signed-off-by: Chris Wilson commit 799bae9e8ff53fb1b5c74f3278d530a58d66de9a Author: Chris Wilson Date: Tue Jul 17 17:07:10 2012 +0100 sna/dri: Do not allow an exchange to take place on invalid buffers If the SwapBuffers is called after we have resized a Window but before the client has processed the Invalidate notification, then the SwapBuffers will be referring to a pair of stale buffers. As the buffers are no longer attached to the Pixmap, we can not simply exchange them. Signed-off-by: Chris Wilson commit 067aeaddb8047f01ae3a20b26ba0acf5ba2d035f Author: Chris Wilson Date: Tue Jul 17 15:33:19 2012 +0100 sna: Rebalance choice of GPU vs CPU bo Signed-off-by: Chris Wilson commit 7ebeea3f5c71959773478de44b08a967fe5acc8b Author: Chris Wilson Date: Tue Jul 17 15:10:43 2012 +0100 sna: Avoid the CPU bo readback for render paths As we exclude using the CPU bo if there is overlapping GPU damage, we can forgo the call to keep the transfer the damage. Signed-off-by: Chris Wilson commit ed8c729ed02705fd03be1ab22a94b5aae13567c8 Author: Chris Wilson Date: Tue Jul 17 11:21:30 2012 +0100 sna: Catch the short-circuit path for clearing clear on move-to-gpu as well I thought the short-circuit path was only taken when already clear, I was wrong. Signed-off-by: Chris Wilson commit 359b9cc82de13b0ac89692896ac6104ff3be308b Author: Chris Wilson Date: Tue Jul 17 10:26:27 2012 +0100 sna: Limit the use of snoopable buffers to read/write uploads Signed-off-by: Chris Wilson commit 4f21dba6ee505217d63edd84611622e05aeb4593 Author: Chris Wilson Date: Tue Jul 17 09:26:46 2012 +0100 sna: Only drop the clear flag when writing to the GPU pixmap Signed-off-by: Chris Wilson commit fbfbbee8288aba1e4754fd2dbc02e71f5e118cda Author: Chris Wilson Date: Tue Jul 17 09:20:21 2012 +0100 sna: Fix glyph DBG to include clip extents and actual glyph origin Signed-off-by: Chris Wilson commit f0ed0ca234a4bed986824845ff70e8554c0e579f Author: Chris Wilson Date: Tue Jul 17 08:35:20 2012 +0100 sna: Promote an undamaged pixmap to use the full GPU Signed-off-by: Chris Wilson commit 1f79e877fb6602bd0f9dd14ac9c3511f3b7044fb Author: Chris Wilson Date: Mon Jul 16 21:18:24 2012 +0100 sna: Share the pixmap migration decision with the BLT composite routines Signed-off-by: Chris Wilson commit d141a2d59007866c9eaad020c744be446e70c346 Author: Chris Wilson Date: Mon Jul 16 23:20:58 2012 +0100 sna: Disable snoopable bo for gen4 Further inspection reveals that whilst it may not hang the GPU, the results are not pleasant or complete. Signed-off-by: Chris Wilson commit 107feed2a4ca044313c70f83a62909187ff1f905 Author: Chris Wilson Date: Mon Jul 16 18:58:30 2012 +0100 sna: Disable snoopable uplaod buffers for gen4 The sampler really does not like using snoopable buffers... Signed-off-by: Chris Wilson commit 818c21165c746b7b410a6e6e23b1675d88db685d Author: Chris Wilson Date: Mon Jul 16 16:28:00 2012 +0100 sna: Fixup pixmap validation for sna_copy_area() Remember to offset the box by the drawable deltas in order to compensate for compositing. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=52142 Signed-off-by: Chris Wilson commit 623d84bed7c47ac39348775ce35eec54196f6dac Author: Chris Wilson Date: Mon Jul 16 16:07:37 2012 +0100 Wrap defines to avoid redefinition warnings Currently this only catches out ARRAY_SIZE, but wrap the other common defines for consistency. Signed-off-by: Chris Wilson commit 907a2a7c97514d3f7610648ed87c7042a857f786 Author: Chris Wilson Date: Mon Jul 16 14:47:03 2012 +0100 sna/trapezoids: Fix inplace unaligned fills (on gen4) Reported-by: Sergio Callegari Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=52150 Signed-off-by: Chris Wilson commit 6ce2f40249231f57cf464361ea5329cee1932ccf Author: Chris Wilson Date: Mon Jul 16 14:46:39 2012 +0100 sna/trapezoids: Add some DBG to unaligned fills Signed-off-by: Chris Wilson commit 2721214868685123c973970a8ce0d93346ae0ee2 Author: Chris Wilson Date: Mon Jul 16 13:52:39 2012 +0100 sna: Move the disabling of CPU bo for gen4 to the render unit They appear to work fine with the BLT and only seem to cause issues when used with the sammpler. So enable them for accelerated uploads and downloads. Signed-off-by: Chris Wilson commit 0777b146bf1a63c99e4d4af141e676a47b1f2dc9 Author: Chris Wilson Date: Mon Jul 16 13:11:07 2012 +0100 sna: Use set-cache-level to allocate snoopable upload buffers Signed-off-by: Chris Wilson commit 33443f7ee48fa54b6f4d09c93cddac0e32314b9c Author: Chris Wilson Date: Mon Jul 16 12:51:54 2012 +0100 sna: Add a couple of DBG options to control accelerated up/downloads Signed-off-by: Chris Wilson commit 924060293826a1cc0d9d7bc26e913e46c6b2d054 Author: Chris Wilson Date: Mon Jul 16 12:03:47 2012 +0100 sna: Discard and recreate the CPU buffer when busy during move-to-cpu Signed-off-by: Chris Wilson commit 7024ef771ff170e61e788b5216c86b46e0f8ae6a Author: Chris Wilson Date: Mon Jul 16 12:15:54 2012 +0100 sna: Add a few DBG to show when CPU bos are being used for xfer Signed-off-by: Chris Wilson commit c564414157e27417f0de1c0542dafd9b47e01eda Author: Chris Wilson Date: Mon Jul 16 09:34:30 2012 +0100 sna: Disable the scanout flush when switch off via DPMS Signed-off-by: Chris Wilson commit 536e7ab756d6821db79e4cd79a250af1c0f7d5a3 Author: Chris Wilson Date: Mon Jul 16 12:16:26 2012 +0100 intel: Don't use stdbool without declaring it Reported-by: Fabio Pedretti Signed-off-by: Chris Wilson commit 0c32be15b06ad63c1fc1371de879f2d879080f6b Author: Chris Wilson Date: Thu Jul 5 19:26:48 2012 +0100 uxa: Remove Shadow hack This was an incomplete hack so deprecate in favour of Shadow-on-Steriods, SNA. References: https://bugs.freedesktop.org/show_bug.cgi?id=47324 Signed-off-by: Chris Wilson commit 6a18a0936eafc45ab920ab0eecf2fc2a601c41a7 Author: Chris Wilson Date: Sun Jul 15 20:26:00 2012 +0100 configure: version bump for 2.20.0 release The day SNA hits mainstream... Signed-off-by: Chris Wilson commit 6fa059330decd1437eef4928d732ec91fd4e17e7 Author: Chris Wilson Date: Sun Jul 15 14:04:48 2012 +0100 sna: Avoid creating a CPU bo for uploads if we already have a large GPU bo And vice-versa if already have a large CPU bo. Signed-off-by: Chris Wilson commit a253c95ec63b2b075e66ae7380fed6a73469eba5 Author: Chris Wilson Date: Sun Jul 15 13:32:35 2012 +0100 sna: Prefer uploads to be staged in snoopable bo Signed-off-by: Chris Wilson commit ef6d94a8444927941db108811e1a26357dc3f18e Author: Chris Wilson Date: Sun Jul 15 11:46:53 2012 +0100 sna: Simply reverse all the boxes if dx <= 0 and dy <= 0 In this fairly common case, avoid both the double pass and use a simpler algorithm as we can simply reverse the order of the boxes. Signed-off-by: Chris Wilson commit 6601a943ff968ac39ba198351c50dc883cb4232e Author: Chris Wilson Date: Sun Jul 15 11:39:56 2012 +0100 sna: Keep track of the base pointer for the reordered boxes So that we avoid freeing an invalid pointer. Signed-off-by: Chris Wilson commit ef34d5cf415ad7459ab44b0ec2e70b14150735fc Author: Chris Wilson Date: Sat Jul 14 23:25:17 2012 +0100 sna: Make sure we check for a busy CPU bo before declaring is-cpu Even if the pixmap is entirely damaged on the CPU, we still may be in the process of transferring it and so cause an unwanted stall. Signed-off-by: Chris Wilson commit 0e397e4a1dc23ed07089c967612d705584f3b376 Author: Chris Wilson Date: Sat Jul 14 21:35:23 2012 +0100 sna/glyphs: Perform the fallback mask reduce before moving the glyph pointers Signed-off-by: Chris Wilson commit db1ee13a53b0c1348b7566ee60ee1b7b384ef59a Author: Chris Wilson Date: Sat Jul 14 21:26:01 2012 +0100 sna/gen7: Check for gradient allocation failure within spans Signed-off-by: Chris Wilson commit 86479e97460da798a3804cbb4ae39e62de881af1 Author: Chris Wilson Date: Sat Jul 14 21:24:04 2012 +0100 sna/gen7: Uses EXTEND_PAD for its alpha-gradient with spans Fixes regression from 2b94f9a043. Signed-off-by: Chris Wilson commit f17037275c05198c3c3f456964fd42032f9085b6 Author: Chris Wilson Date: Sat Jul 14 20:11:17 2012 +0100 sna: Reorder overlapping boxes for CopyArea/Window Signed-off-by: Chris Wilson commit 86e09d14bd00344d378b86a19ebb44f7d946926c Author: Chris Wilson Date: Sat Jul 14 17:51:31 2012 +0100 sna: Tidy sna_copy_boxes So there appears to be a bug hidden here. But only when we scroll upwards in a GTK+ application. Hmm. Signed-off-by: Chris Wilson commit 924f596463555db27214fd8227218c2e21ecddc8 Author: Chris Wilson Date: Sat Jul 14 19:03:08 2012 +0100 sna: Avoid BLT to snoopable bo on older gen Signed-off-by: Chris Wilson commit 44e226b1d9fca8cb95b0864adf8708b03ee8472c Author: Chris Wilson Date: Sat Jul 14 18:36:29 2012 +0100 sna/glyphs: A repeat of the earlier typo for pixman glyphs Signed-off-by: Chris Wilson commit 797ebf937fcfcc87502727c70e6b52f89fecc799 Author: Chris Wilson Date: Sat Jul 14 16:58:18 2012 +0100 sna/glyphs: Fix typo and render glyphs to the small mask Signed-off-by: Chris Wilson commit 2b94f9a043372ffede01339eea99377a71169fbc Author: Chris Wilson Date: Sat Jul 14 16:38:21 2012 +0100 sna/gen7: Preselect sampler Signed-off-by: Chris Wilson commit 50d61c38bdb720c17ba5bfcaf97032338e466d9b Author: Chris Wilson Date: Sat Jul 14 16:07:32 2012 +0100 sna/gen4: Fix typo introduced in checking dst format Signed-off-by: Chris Wilson commit fc91b1f157f9e6e4097e662e2890574e530344ac Author: Chris Wilson Date: Sat Jul 14 15:48:50 2012 +0100 sna/gen7: Only emit the render flushes between operations Signed-off-by: Chris Wilson commit d30dc59651f156e9d4572141e2c54af89d007a37 Author: Chris Wilson Date: Sat Jul 14 15:42:19 2012 +0100 sna/gen7: Only fallback to BLT for a redirected target As we can always use a partial surface for the source. Signed-off-by: Chris Wilson commit 9f05b0c03b1fdab474b436431c430028fca1937e Author: Chris Wilson Date: Sat Jul 14 15:03:32 2012 +0100 sna/gen4+: Fix up card/dest format confusion in previous commit That would have been much more successful had I not supplied the wrong opaque formats to the sampler. Signed-off-by: Chris Wilson commit fffbc34e4621898eee9b80bf8b6b3699bcade52a Author: Chris Wilson Date: Sat Jul 14 14:54:27 2012 +0100 sna/gen4+: Translate to card format using a switch GCC produces faster code than a walk over the format tables. Signed-off-by: Chris Wilson commit 95fdd9af5c8a8360d02debc400e75869c36f05ca Author: Chris Wilson Date: Sat Jul 14 13:05:27 2012 +0100 sna: Enable pixman_glyphs if available Signed-off-by: Chris Wilson commit 3f764ee4c50567cfb831495d42cb6c2bb94055ad Author: Chris Wilson Date: Sat Jul 14 12:29:47 2012 +0100 sna/dri: Presume an unknown chipset will want i965_dri.so Signed-off-by: Chris Wilson commit 39845280b5a9d0ed60c6a158c3d0df9fb8756d40 Author: Chris Wilson Date: Sat Jul 14 12:14:28 2012 +0100 sna: Allow BLT support on future unknown hardware Assume that if the kernel recognises the chipset and declares it has a BLT, we can use it. Signed-off-by: Chris Wilson commit b260ca44b3aaba2c8cd25640ad7ac9ca6478b0f2 Author: Chris Wilson Date: Sat Jul 14 09:59:07 2012 +0100 Drop some unused includes Signed-off-by: Chris Wilson commit f517bdb12b909ef9d0897166bdabc537551a065b Author: Chris Wilson Date: Sat Jul 14 08:56:21 2012 +0100 sna: Do not perform batch compaction on old kernels As they will reject the delta pointing outside of the target batch. Signed-off-by: Chris Wilson commit ce69a1e8686889f1eebb4cb3a39c41f473e58b93 Author: Chris Wilson Date: Fri Jul 13 23:25:02 2012 +0100 sna: Add some DBG for selecting glyph path Signed-off-by: Chris Wilson commit b68b2d90915f7a97e43a39e3117927544886fba0 Author: Chris Wilson Date: Fri Jul 13 23:24:32 2012 +0100 sna: Add some DBG for short-circuiting choice of source bo Signed-off-by: Chris Wilson commit ad4786b285074b5bd70b3ad0bea6ec1b77ad6740 Author: Chris Wilson Date: Fri Jul 13 22:24:51 2012 +0100 sna: Aim for consistency and use stdbool except for core X APIs Signed-off-by: Chris Wilson commit a05c3547bba52288bae872ea672ffe2f4dab2ffa Author: Chris Wilson Date: Fri Jul 13 15:06:15 2012 +0100 sna/gen4: Simplify comparing the pipeline-pointers against the previous Signed-off-by: Chris Wilson commit ea9ec18505645dfec85ab96bbbbbc1793830c737 Author: Chris Wilson Date: Fri Jul 13 11:39:01 2012 +0100 sna: Split CloseScreen into two phases In order to get the ordering correct we need to free the xf86_cursors before calling the miPointerCloseScreen. This requires us to insert a hook at the top of the CloseScreen chain. However we still require the final CloseScreen hook in order to do the fundamental clean up, hence split the CloseScreen callback into two phases. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 0f03f7b4359fcbcde651bc1554ddff4fe10bc53b Author: Chris Wilson Date: Fri Jul 13 10:35:27 2012 +0100 sna: Only try to enable DRI2 if the module is available at runtime Blatantly cribbed from Michel Danzer's patch for ati... Signed-off-by: Chris Wilson commit b5d6a57f12025aef9850c7d9baa6905f776be971 Author: Chris Wilson Date: Thu Jul 12 22:16:27 2012 +0100 Enable compilation of SNA by default But only if we meet the required versions of Xorg and leave UXA as the default AccelMethod for the time being. Signed-off-by: Chris Wilson commit 6c2975ab2943478b3a246b5fb231f9f3df2d8475 Author: Chris Wilson Date: Thu Jul 12 22:14:39 2012 +0100 Fix the reporting of whether SNA is configured Signed-off-by: Chris Wilson commit fd15ce65ab8ce5cf571e37daa7db1ee245616cd4 Author: Chris Wilson Date: Thu Jul 12 20:32:14 2012 +0100 sna: Fix build without DRI2 Signed-off-by: Chris Wilson commit 22be9988b933f33fc5247a9abc3b00a7f2e4a202 Author: Chris Wilson Date: Thu Jul 12 19:49:34 2012 +0100 sna: Check for failure to initialize the sprite pointers Signed-off-by: Chris Wilson commit 32e7f4ee64867779b2def6fcd882708d7b0e2cf5 Author: Chris Wilson Date: Thu Jul 12 19:39:10 2012 +0100 sna/glyphs: Fix array allocation for list_extents Originally I intended to skip assigning the box on the last list. However, loop simplicity failed and now we run the risk of writing beyond the end of stack_extents, and overwriting the list_extents pointer. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 0477b5fb6f040f3bad86bb314a24df1bcd660aed Author: Chris Wilson Date: Thu Jul 12 19:37:02 2012 +0100 sna/glyphs: Apply mask reduction along fallback paths as well Signed-off-by: Chris Wilson commit 16aaa51b5d326f44974489f5b29716c7ff5ab48e Author: Chris Wilson Date: Thu Jul 12 15:26:54 2012 +0100 sna: Rearrange the tests for dropping the glyph mask Signed-off-by: Chris Wilson commit 600746f923b046187a66b60b5e5d2b187475730e Author: Chris Wilson Date: Thu Jul 12 14:16:31 2012 +0100 i810: Remove vestigial reference to xaa.h i810_hwmc.c can pull it in via i810.h like everybody else. As for xaalocal.h, I have no idea what that is... Both appear to be cut'n'paste includes. Signed-off-by: Chris Wilson commit 1d9ab2e7101167075112a472ee82530dc0365183 Author: Zhigang Gong Date: Thu Jul 12 18:47:50 2012 +0800 uxa/dri: Fix a buffer leak on pageflipping when enabling glamor. We need to put current front_buffer to back buffer thus we don't need to create a new back buffer next time. This behaviou should be the same with or without glamor. Previous code incorrectly discard the previous front_buffer and cause a big buffer leak problem. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit fa89e0614563cbe0cc45e6d7e7584cb333244c27 Author: Zhigang Gong Date: Thu Jul 12 18:47:51 2012 +0800 uxa/glyphs: Bypass uxa glyphs operations if using glamor. glamor_glyphs will never fallback. We don't need to keep a uxa glyphs cache picture here. Thus simply bypass the corresponding operations. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit d25000e1f31e78aff2ab43adb12aec0aac36f56f Author: Chris Wilson Date: Wed Jul 11 22:37:25 2012 +0100 i810: Tidy configure detection for XAA/DGA Signed-off-by: Chris Wilson commit 44a1528c15eec9b3f93651e779013137864d4d2b Author: Chris Wilson Date: Wed Jul 11 15:05:32 2012 +0100 sna: Remove unused cached partials list Signed-off-by: Chris Wilson commit 94d489ae43a2c4d4d9ddc9ce30ff1a9142b77d4a Author: Chris Wilson Date: Wed Jul 11 14:25:20 2012 +0100 sna: Minor tweak to upload in place if the CPU bo is busy Since we have to pay the price of the stall anyway... Signed-off-by: Chris Wilson commit b5db90aa52f10897ad2d7795df94c0e3d2878aea Author: Chris Wilson Date: Wed Jul 11 12:52:24 2012 +0100 sna: Discard the mask for "non-overlapping" glyphs If we can acheive the same rasterisation results without the mask, rendering the glyphs-to-dst is so much faster that it outweighs the cost of checking for overlapping glyphs. The penalty is then for code that correctly declared that it required a mask, who now have an extra ~10% overhead in the processing of their glyphs. Signed-off-by: Chris Wilson commit 665c9cbdcf2c493cac29d316eaffa2abe197a183 Author: Chris Wilson Date: Tue Jul 10 19:01:12 2012 +0100 sna: Disable periodic scanout refresh if all outputs are disconnected Signed-off-by: Chris Wilson commit 85fdc3143b157fd7ba3453efc86da8238d9de316 Author: Chris Wilson Date: Tue Jul 10 12:43:46 2012 +0100 sna: Avoid the expensive recomputation of the region when copying Signed-off-by: Chris Wilson commit 747ed0ca28bb46fc45ff20acd1f82212fa2b46bd Author: Chris Wilson Date: Tue Jul 10 17:05:20 2012 +0100 sna: Only promote to full GPU if we already have a GPU bo Signed-off-by: Chris Wilson commit 232217eef8f99f5678d65bf9aa5b898ef6d3b3c6 Author: Daniel Stone Date: Tue Jul 10 00:32:13 2012 +0100 i810: Make DGA optional Don't build DGA when it's not available, or when we don't want it. Signed-off-by: Chris Wilson commit 78dc0c04745ad4485b994f67833f4a155749f01d Author: Daniel Stone Date: Tue Jul 10 00:32:13 2012 +0100 i810: Make XAA optional Don't build XAA when it's not available, or when we don't want it. Signed-off-by: Daniel Stone commit 45ab003a5860fd4290df24739d2520fddfe27a8f Author: Chris Wilson Date: Mon Jul 9 21:28:40 2012 +0100 sna: Check for overlapping glyphs within each list, then overlapping lists Spotted by Zhigang Gong is this optimisation to avoid the problem with multiple lines passed in a single request (using multiple lists). As the start of line will overlap with the previous line when we use the simple bbox comparison, we always declare those runs as overlapping and so we cannot substitute a glyph mask. However, we can reduce the problem to only checking for overlapping glyphs within a list and then checking for overlapping lists. Very, very clever. Signed-off-by: Chris Wilson commit 8066bc33d78e78ce7c13833b08a7daaea2f3ed22 Author: Chris Wilson Date: Mon Jul 9 11:25:11 2012 +0100 sna: Fix reversal of inside logic for BitmapToRegion Signed-off-by: Chris Wilson commit 8a9a17cd092d156272e8953974119f527b2b77eb Author: Chris Wilson Date: Mon Jul 9 11:12:12 2012 +0100 sna: Improve the check for assertions Signed-off-by: Chris Wilson commit b11bc37684181390fc1400afb44054785104ca15 Author: Chris Wilson Date: Mon Jul 9 11:09:16 2012 +0100 sna: Simplify the DBG incarnation It was only ever used in conjunction with HAS_DEBUG_FULL. For debug purposes it is as easy to redefine DBG locally. By simplifying the DBG macro we can create it consistently and so reduce the number of compiler warnings. Long term, this has to be dynamic. Sigh. Signed-off-by: Chris Wilson commit 21798a88676e91049917fafd3196dd4374b94226 Author: Chris Wilson Date: Mon Jul 9 09:23:20 2012 +0100 sna: Promote large operations to use the whole GPU Signed-off-by: Chris Wilson commit 1b6ad7a6ae6820c8f66d1c80613885ee84e7d316 Author: Chris Wilson Date: Mon Jul 9 08:54:11 2012 +0100 sna: Only consider large clears as candidates for GPU migration If we only operating on a small region of the pixmap and have require damage migration in the past, we are likely to require migration again at some point. So keep track of small damage areas. Signed-off-by: Chris Wilson commit d8a75538ea1d2a79d6282b0e2dfd73cfdea1a480 Author: Chris Wilson Date: Mon Jul 9 08:38:39 2012 +0100 sna: PadPixmap only writes to the out-of-bounds bits So we only need to delcare it as reading the source pixmap and not mark it as damaged. Signed-off-by: Chris Wilson commit eafb454edf188e7dada1ddf886d1e46f0151968d Author: Chris Wilson Date: Mon Jul 9 08:38:08 2012 +0100 sna: Rename conflicting symbols with uxa Reported-by: Christoph Reiter Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51887 Signed-off-by: Chris Wilson commit 0af29175a087cc2e509962f8828790c8f7232611 Author: Chris Wilson Date: Mon Jul 9 01:24:23 2012 +0100 sna: Just use a linear scan to find the terminating clip box Signed-off-by: Chris Wilson commit 2941a5fe15626730869a48a63bb088e8ae2c0549 Author: Chris Wilson Date: Mon Jul 9 00:20:57 2012 +0100 sna: Remove the consideration of CPU damage for overwriting FillRect We consideer a singular FillRect to be a sequence point in the rendering commands, that is it is usually used to clear the background as the first operation in a drawing sequence. So it is useful to ask if we can move the sequence to the GPU at that point. Signed-off-by: Chris Wilson commit 8be00b6d4767ffc09328d246d02ee75312ad5842 Author: Chris Wilson Date: Sun Jul 8 20:48:40 2012 +0100 sna: Substitute the reduce clip region for fallback ops Signed-off-by: Chris Wilson commit 0457935a70f6c1ae06f61f9ad0dd1bdc825465fa Author: Chris Wilson Date: Sun Jul 8 20:38:03 2012 +0100 sna: Review placement hints for fallback operations Look for those operations that maybe better via the GTT and those that are preferred to be in CPU cache. The wonders of multiple layers of heuristics. Signed-off-by: Chris Wilson commit b7f0b0e7e3f66165b87c46f897de536cf74a9daf Author: Chris Wilson Date: Sun Jul 8 19:59:34 2012 +0100 sna: Remove function for force-to-gpu This is now enitrely done in the core move-to-gpu as a special case. Signed-off-by: Chris Wilson commit bb8770158c08394c2de79e0ca1c1b3112e17dd23 Author: Chris Wilson Date: Sun Jul 8 18:53:25 2012 +0100 sna: Apply the clear color when resizing the front buffer If the existing front buffer is clear, just apply the clear color to then new buffer rather than copy the old one across. Signed-off-by: Chris Wilson commit 8dd14855d75240501aa2d089bcdfa46e7badbf18 Author: Chris Wilson Date: Sun Jul 8 15:46:41 2012 +0100 sna/dri: Review stale comments Signed-off-by: Chris Wilson commit 3bb7a530e77a5c6e8bae0fb14c570feafe37c2bd Author: Chris Wilson Date: Sat Jul 7 20:53:27 2012 +0100 sna/dri: Fix cross-chaining of pageflip vs vblank And double-check that the drawable is still flippable before completing the delay exchange. Signed-off-by: Chris Wilson commit 1454df8caa51fff9810a9b792d17aa82b247a4ae Author: Chris Wilson Date: Sat Jul 7 19:59:50 2012 +0100 sna/dri: Use draw ref directly As we hook into the DestroyWindow notification, we can reliably use the original Drawable reference and avoid the secondary object lookups. Signed-off-by: Chris Wilson commit 9abb6c09bdb9831db5f0626eed70663a2dc39fc6 Author: Chris Wilson Date: Sat Jul 7 18:43:06 2012 +0100 sna/dri: Remove dead code for 'old_fb' The member still exists but is never set and is unused. Signed-off-by: Chris Wilson commit ad877abdc70b842afd202b2f97892d97a0b8d151 Author: Chris Wilson Date: Sat Jul 7 17:48:52 2012 +0100 sna/dri: Attach the chain of frame events to the Window, not pixmap So that we can have multiple clients swapping in separate windows concurrently. Signed-off-by: Chris Wilson commit 81cd9aa80091b9bb08b50062f117d678a3bc7a91 Author: Chris Wilson Date: Sat Jul 7 16:12:49 2012 +0100 sna: Tweak start/stop of the deferred flush As we now emit work whenever we wakeup and find the GPU idle, we rarely actually have pending work in the deferred flush queue, so try to avoid installing a timer if we are not accumulating work. Signed-off-by: Chris Wilson commit 6cb0c631e4eafc09f1677c73906de9108d735de4 Author: Chris Wilson Date: Sat Jul 7 15:10:18 2012 +0100 sna/dri: Clarify the message for one failure case Signed-off-by: Chris Wilson commit 9a314d18cef1e08b23f9dca861ad2ba396bb1080 Author: Chris Wilson Date: Sat Jul 7 14:56:05 2012 +0100 sna/dri: Add a couple of missing VG_CLEAR on vblanks Signed-off-by: Chris Wilson commit 66a53c15cb5ee729fb43ea9713fd8538a3f982ad Author: Chris Wilson Date: Sat Jul 7 14:46:08 2012 +0100 sna/dri: Couple the frame events into DestroyWindow Signed-off-by: Chris Wilson commit 975a566bed72ddc79853b329307ed72a82df24b0 Author: Chris Wilson Date: Sat Jul 7 14:12:51 2012 +0100 sna/dri: Replace the DRI2 drawable type with a devPrivate Signed-off-by: Chris Wilson commit 0da1c98f660269806408af5fd08c1ab5e538082e Author: Chris Wilson Date: Sat Jul 7 12:15:28 2012 +0100 test: Add missing header for distcheck Signed-off-by: Chris Wilson commit e3e58123d36924c760ab6f58a7155a040422e91d Author: Chris Wilson Date: Fri Jul 6 15:22:26 2012 +0100 sna: Fixup fb wrapper To accommodate changes in the Xserver and avoid breakage; would have been much easier had the fb been exported in the first place. commit 5d2f88fd9972c62c87098ddc7fee7b6f0cea0fdb Author: Chris Wilson Date: Sat Jul 7 10:07:51 2012 +0100 sna: Add a couple of DBG flags to control upload buffers Signed-off-by: Chris Wilson commit 18b3090381ac0fb61df96a7c6b2f12aacf180ee8 Author: Chris Wilson Date: Sat Jul 7 00:06:36 2012 +0100 sna: Fixup USE_INPLACE debug hint After we enabled inplace readback, we can just apply the INPLACE hint to all fallbacks, but instead apply it to the automatic testing for a potential inplace operation. Signed-off-by: Chris Wilson commit 24b59a8955eb15522ad334a541530aca937fcf07 Author: Chris Wilson Date: Fri Jul 6 14:16:36 2012 +0100 sna: Refactor a common function: is_clipped() Had I done this earlier, I would not have the bug in the open-coded version. Le sigh. Signed-off-by: Chris Wilson commit 68b357454af705f1ed3a9599435a402f2611a180 Author: Chris Wilson Date: Fri Jul 6 10:58:06 2012 +0100 sna: Clear garbage from the new front buffer when resizing Avoid displaying a buffer filled with random junk when resizing (and thereby creating a new) framebuffer. Signed-off-by: Chris Wilson commit 5784e0f21dc91f33c99a507105a0695cc53d6574 Author: Chris Wilson Date: Fri Jul 6 09:42:37 2012 +0100 Allow matching against any device supported by drm/i915 However we cannot enable acceleration if we do not recognise its hardware layout or instruction set. Signed-off-by: Chris Wilson commit 1ee10cc3b2aa0888753eeb25c7fde7296a3c92eb Author: Chris Wilson Date: Fri Jul 6 00:01:58 2012 +0100 Make the detection of broken pre-production hardware verbose These SDV should have been returned to the manufacturer long ago and replaced with real systems. So if they are still in use, add a gentle reminder. Signed-off-by: Chris Wilson commit cd2dd3016e0834d1636aa96511608022a4cdbcd1 Author: Chris Wilson Date: Thu Jul 5 19:58:54 2012 +0100 sna: Fix clipping of glyphs-to-dst for partially obscurred windows Signed-off-by: Chris Wilson commit 0f086acb259d7732560c5d0d642308de028a4445 Author: Chris Wilson Date: Wed Jul 4 12:26:18 2012 +0100 sna: Fallback to attaching a shadow fb if we fail to setup the crtc As we've chosen to fix the kernel to handle CRTC offsets > 4096, drop the automatic workaround. However, allow the user to force creation of PerCrtcPixmaps for the purpose of debugging (and to workaround the bug in older kernels) and to fallback to trying a shadow fb if the setcrtc fails with the composite fb. Signed-off-by: Chris Wilson commit 7e8060f837475c85cc061ba4a5388140cd227613 Author: Chris Wilson Date: Thu Jul 5 03:31:12 2012 +0100 sna: Do not force GPU allocation if CPU bo is already busy Signed-off-by: Chris Wilson commit c32bb286dc9a489232030f6abe9076411fbcecfd Author: Chris Wilson Date: Thu Jul 5 03:18:12 2012 +0100 sna: Make sure damage is flushed to the CPU bo before use Signed-off-by: Chris Wilson commit d46cc00b3cd903bfaf37ad7d4a60676c4b346983 Author: Chris Wilson Date: Thu Jul 5 02:19:26 2012 +0100 sna/dri: Assert that our pixmaps sizes are invariant Signed-off-by: Chris Wilson commit 3c1f58fe45e8f4f18c45733f862ca1f290dde84d Author: Chris Wilson Date: Wed Jul 4 23:03:44 2012 +0100 sna: drop an unused ret var Signed-off-by: Chris Wilson commit a69a47f94037698a360f8b8611f6f3e58a20ca87 Author: Chris Wilson Date: Wed Jul 4 22:15:45 2012 +0100 sna: Fix detection of EIO through throttle When using drmIoctl, one needs to check the errno for the actual error code. Signed-off-by: Chris Wilson commit f2fdb0da83d6208c884ffde2bb30d0a67fc75217 Author: Chris Wilson Date: Wed Jul 4 21:43:22 2012 +0100 sna: Use throttle() to confirm a GPU hang This has two effects. The first is that we confirm that the EIO was indeed a GPU hang and not some other form of I/O failure (for example swapin). And the second is that it means we also print the warning to look for an i915_error_state when we detect a GPU hang. Signed-off-by: Chris Wilson commit b8c2b34e39c7f2ee2597f8727b9b98c6aac93fb1 Author: Chris Wilson Date: Wed Jul 4 19:53:27 2012 +0100 sna: Simplify timer execution Signed-off-by: Chris Wilson commit 844ab84c64fde38db315787e16a9f7f674d0f88c Author: Chris Wilson Date: Wed Jul 4 17:58:27 2012 +0100 sna: Fix leak around ENOMEM error path in sna_copy_boxes Signed-off-by: Chris Wilson commit 54ee41bf05e328ed2f2cd2a64c21afe3efe2556a Author: Chris Wilson Date: Wed Jul 4 17:40:58 2012 +0100 sna: Pass a hint to the backends when using copy_boxes for readback If we expect to only emit this set of copy_boxes() and then submit the batch, we would prefer to use the BLT for its lower latency. Signed-off-by: Chris Wilson commit d36623aaebdc454bd281f34332edcad5d94f34c0 Author: Chris Wilson Date: Wed Jul 4 13:55:25 2012 +0100 sna/dri: Remove broken code for buffer xchg from AsyncSwap Signed-off-by: Chris Wilson commit 0bdb4d0d3693df007a6cfc9a75bb0deddd812d53 Author: Chris Wilson Date: Wed Jul 4 13:12:43 2012 +0100 sna/dri: Fixup blit fallback path to use xchg when possible Signed-off-by: Chris Wilson commit aeeed323f9081875a804ae19fb356bee2a61e7b0 Author: Chris Wilson Date: Wed Jul 4 11:52:27 2012 +0100 sna/dri: Select the appropriate copy engine based on the current src ring Signed-off-by: Chris Wilson commit 5026b6a147f411582af24ffd17c87a81da5eea0b Author: Chris Wilson Date: Wed Jul 4 09:39:59 2012 +0100 uxa: Install the drm_wakeup_handler for vblank events in !use_page_flipping Even if page-flipping itself is disabled, we still want to allow the client to schedule wakeups for some future vblank which requires listening to the kernel vblank notifications. Reported-by: Eric Anholt Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51699 Signed-off-by: Chris Wilson commit 79309dd55f20098e12ead5427c811f237d5592fa Author: Chris Wilson Date: Tue Jul 3 22:27:39 2012 +0100 sna: check for failure to change cache level on the bo Signed-off-by: Chris Wilson commit 9e2ac8a413c05aafd1c69775c5b0fa5f1f37ac23 Author: Chris Wilson Date: Tue Jul 3 19:33:55 2012 +0100 sna: Use set-cache-level ioctl to create CPU bo As an alternative to vmap, we can use the kernel for all memory management through bo, which is much preferred for its simplicity (i.e. avoiding introducing even more vm complexity). Signed-off-by: Chris Wilson commit f26163e916e21f6b64a19c147165f2f2c9c5466d Author: Chris Wilson Date: Tue Jul 3 18:51:46 2012 +0100 sna: Guess when the client is attempting to read back the whole pixmap Signed-off-by: Chris Wilson commit c597e6cd4cb4406878eae07c04ad420d8185d99e Author: Chris Wilson Date: Tue Jul 3 13:26:33 2012 +0100 sna: Fix iterator typo Increment the iterator, not the end-stop. Signed-off-by: Chris Wilson commit 2d087eadd9cd3aa2e2ccd73a568286d21702d29a Author: Chris Wilson Date: Tue Jul 3 11:54:02 2012 +0100 sna: Also prefer to use the dst GPU bo if CopyArea reduces to an inplace upload Signed-off-by: Chris Wilson commit dbe3a5ca1e6558bcee29d893aba8cc352220a36d Author: Chris Wilson Date: Tue Jul 3 11:48:15 2012 +0100 sna: Attempt to reduce all-damage on the CPU As we now treat CPU all-damaged as a special case for deciding when and where to migrate, look out for that condition after adding damage. Signed-off-by: Chris Wilson commit 3a41248195e8b327a5d970726450bd2077cdaf0f Author: Chris Wilson Date: Tue Jul 3 11:22:54 2012 +0100 sna: Operate on the original boxes for CopyArea Be consistent and avoid the confusion when mixing operations on the region boxes and the original boxes. Signed-off-by: Chris Wilson commit e3bc91842bf186ec149c852f48993235ef7ad27f Author: Chris Wilson Date: Tue Jul 3 10:21:06 2012 +0100 sna: Allow booting on older kernels by disabling HW acceleration Signed-off-by: Chris Wilson commit affdebcb2d09cd8fdc5aadb2d8df3193587e4a06 Author: Chris Wilson Date: Mon Jul 2 18:50:26 2012 +0100 sna: And free the DIR after use Signed-off-by: Chris Wilson commit e7b31b6d0a32f76db4a8aef64c77d4afe808fb6c Author: Chris Wilson Date: Mon Jul 2 14:01:36 2012 +0100 sna: Consolidate CopyArea with the aim of reducing migration ping-pong Signed-off-by: Chris Wilson commit ce27a81ac508368d54f1237893a9b1214cf3e3d0 Author: Chris Wilson Date: Mon Jul 2 17:52:24 2012 +0100 sna: Clear cpu flag after deciding to use gpu bo Signed-off-by: Chris Wilson commit 2f1b7e8a23ac3086dda0025ecf09dd1feac94837 Author: Chris Wilson Date: Mon Jul 2 17:53:01 2012 +0100 sna: Check for non-existent /sys/class/backlight directory Signed-off-by: Chris Wilson commit d12d50d107d403c3cf4dfe24bb63ce1006d0e025 Author: Chris Wilson Date: Mon Jul 2 14:09:21 2012 +0100 sna: Skip hidden and special entries inside /sys/class/backlight Just to avoid the warnings after fallback to comparing the d_name to the list of known interfaces. Signed-off-by: Chris Wilson commit e80f9c4670a0e84521907b1baa059322784b1558 Author: Chris Wilson Date: Mon Jul 2 10:21:42 2012 +0100 sna: Prefer backlight iface based on /sys/class/backlight/*/type Signed-off-by: Chris Wilson commit 61e16dc5673a1ac96b2ecee072cc3e80971be5d9 Author: Tom Hughes Date: Mon Jul 2 10:23:56 2012 +0100 Add asus-nb-wmi backlight control Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51593 commit 543816011d05f0cf40b05ec58f87a5954397a224 Author: Chris Wilson Date: Sun Jul 1 18:36:55 2012 +0100 sna/gen7: Correct two minor misues of equivalent GEN6 constants Signed-off-by: Chris Wilson commit 839fea7f779ca63c32817ee4ba695dfce3344980 Author: Chris Wilson Date: Sun Jul 1 18:23:38 2012 +0100 sna/gen6: Boost VS entries to maximum Signed-off-by: Chris Wilson commit fbd114507d9bf2e2b1d1e52c5e42dc6cdbd8c9a0 Author: Chris Wilson Date: Sun Jul 1 14:03:31 2012 +0100 sna/dri: Assert that the replacement bo is large enough for the pixmap Just another paranoid sanity check. Signed-off-by: Chris Wilson commit 675cbd5fade91fd6a6bf533a31b0a211237af6e8 Author: Chris Wilson Date: Sun Jul 1 12:39:13 2012 +0100 sna/trapezoids: Skip the division when converting coverage to floating point Signed-off-by: Chris Wilson commit 182c3637cc5d3a6ce52127087aa2f19ca2b42719 Author: Chris Wilson Date: Sun Jul 1 13:23:44 2012 +0100 sna: If the pixmap is marked for flushing, prefer to use the GPU Again, to avoid the forced ping-pong as we upload the damage after nearly every operation, simply prefer to use the GPU in such cases. Signed-off-by: Chris Wilson commit 35b1ac138002c206a6d6b866d49a0d73705dd3ac Author: Chris Wilson Date: Sun Jul 1 10:53:07 2012 +0100 sna: After an operation on the CPU, prefer not to use the GPU A nasty habit of applications is to fill an area, only to read it back with GetImage, render locally and replace with PutImage. This causes a readback of an active bo everytime, so let's try to mitigate that by preferring not to use the GPU after a forced readback. Signed-off-by: Chris Wilson commit e625c02e6266403fcd8a72ccce2c6c6291e2e5fc Author: Chris Wilson Date: Sat Jun 30 09:34:21 2012 +0100 sna/damage: Early check for contains-box? if subtract and box outside region Signed-off-by: Chris Wilson commit abd7be1cee6f2f494a11cd9d2e7888c3043ffc02 Author: Chris Wilson Date: Fri Jun 29 15:32:10 2012 +0100 sna/dri: Prefer GPU rendering if no more CPU damage on a DRI bo Signed-off-by: Chris Wilson commit 67b87e4f7cf6c3ab9cfccc9fe43a824bfe84f393 Author: Chris Wilson Date: Fri Jun 29 15:03:12 2012 +0100 sna/dri: Optimise clip reduction with copy-to-front to an unclipped Window Signed-off-by: Chris Wilson commit eae5e1275cd11703de2bca67dacd1d57129b561a Author: Chris Wilson Date: Fri Jun 29 13:12:52 2012 +0100 sna: Install the ModeSet handler as the base handler This way we can safely ignore it across server regen. Signed-off-by: Chris Wilson commit 15a0761cad862a5d73bbc2af81bc5267e66c307e Author: Chris Wilson Date: Fri Jun 29 12:22:55 2012 +0100 sna: Only consider the request list when deciding whether the GPU is busy Micro-optimisation to overhead extra checks and to make sure an unflushed bo doesn't prevent us from submitting more work before sleeping. Signed-off-by: Chris Wilson commit 4061f05dd61a7200d91d30b9b4a2ab0c61306870 Author: Chris Wilson Date: Fri Jun 29 11:40:18 2012 +0100 sna/trapezoids: Write unaligned fallback boxes inplace As this is a pure write operation (though we will write the edge pixels twice) we can perform this operation inplace and incur a slightly slower trap creation at the benefit of avoiding the later copy. Signed-off-by: Chris Wilson commit 44e41536b7728c03a4899a97242960ae7ed35624 Author: Chris Wilson Date: Fri Jun 29 11:39:47 2012 +0100 sna/trapezoids: Render the partial left-edge of fallback unaligned boxes Signed-off-by: Chris Wilson commit e6f9bfe1e20c4c76822d77598f4f1c7e10754929 Author: Chris Wilson Date: Fri Jun 29 11:06:33 2012 +0100 sna: Use currentTime rather than GetTimeInMillis() The overhead of reading the hpet() on every block handler (more or less) is exorbitant, so trust that we update currentTime frequently enough to be a good approximation - the side effect is that we will wakeup slightly to earlier from using an old value for the current time. Signed-off-by: Chris Wilson commit c6c4f30e194eb3b8a2421134bb005f1542b3ef9f Author: Chris Wilson Date: Fri Jun 29 10:14:52 2012 +0100 sna: Add assertions to check that we do install the timers Signed-off-by: Chris Wilson commit 87c8f5a47e3abb7ff887aab45b6389cf9b8d8008 Author: Chris Wilson Date: Fri Jun 29 09:33:09 2012 +0100 sna: Make the post-flip delay explictit As the kernel is inconsistent in enforcing this across generations, handle the synchronisation of the pageflip explicity. Ultimately this should be replaced with a tripple buffer mechanism. Signed-off-by: Chris Wilson commit 31caa43a21a68174386682fd558c911c7c03d76f Author: Chris Wilson Date: Thu Jun 28 17:05:46 2012 +0100 sna/gen5: Check harder for need_upload() fallbacks Signed-off-by: Chris Wilson commit 7c3eb1fda9e567a300a8138acdac9ec11e010b11 Author: Chris Wilson Date: Thu Jun 28 17:04:26 2012 +0100 sna: Correct inverted logic for checking xrgb drawables Reported-by: Christoph Reiter Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=51472 Signed-off-by: Chris Wilson commit c3e2c1332d8d5a3944df99cc11aa66c586add3e8 Author: Chris Wilson Date: Thu Jun 28 12:34:36 2012 +0100 sna: Fix the application of the crtc offset for posting damage The damage boxes are in framebuffer (source) space, so we need to apply the offset for the boxes in crtc (destination) space. Signed-off-by: Chris Wilson commit 47e6bfa4f40cf7efcfe7eee24d2512d737fd7e89 Author: Chris Wilson Date: Thu Jun 28 12:24:27 2012 +0100 sna: Force use of per-crtc scanout if the offset is too large On gen4+, the scanout offset into a tiled surface is specified through the DSPTILEOFF register and limited to 12bits of precision. So if we have a CRTC positioned in that nether-region, we need to allocate a separate per-crtc pixmap for it and perform shadowing. Signed-off-by: Chris Wilson commit 93e77ee019248fe77483e83f2210d584bb5d1be2 Author: Chris Wilson Date: Thu Jun 28 12:02:32 2012 +0100 sna: Quieten kernel debug complaints when disabling crtc Even if we are obviously turning the crtc off, it still complains if the number of connectors is non-zero. So make it so. Signed-off-by: Chris Wilson commit 85e4f48a87ddbc227af8f4af5ea46ae17902b111 Author: Chris Wilson Date: Thu Jun 28 11:44:45 2012 +0100 sna: Add a DBG to the periodic flush mechanism Signed-off-by: Chris Wilson commit 87dd6408a5c29e4808283df78a981de0a3c0a79c Author: Chris Wilson Date: Thu Jun 28 10:53:59 2012 +0100 sna: Correct the reversal of the periodic flushing semantics Regression from 1e9319d (sna: extend RandR to support super sized monitor configurations) which tried to take into account the need to flush the shadow CRTC bo in addition to the normal scanout bo. In the refactoring of the need_flush(), the double negative was missed. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 05f486f64bc7ea4a8a71f5d792fa586ac0843414 Author: Chris Wilson Date: Thu Jun 28 10:42:21 2012 +0100 sna: Flush the per-crtc render caches for rotated scanouts We need to manually flush the render cache in order for results to be visible on the scanout. Signed-off-by: Chris Wilson commit db7979981032d5647069f213a063dcbf78e57890 Author: Chris Wilson Date: Wed Jun 27 09:36:58 2012 +0100 sna: s/width/height/ cut'n'paste typo Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit fcbbe1664ae62ae275068cc040f385d2320d5213 Author: Chris Wilson Date: Wed Jun 27 09:30:44 2012 +0100 sna: Remove a trailing ';' The unwanted ';' caused is_cpu() to always return false if a GPU bo was attached. Not necessary a bad thing, just misses the potential optimisation where having chosen to prefer to use the CPU path we then have to migrate to the GPU even though the bo is undamaged or idle. Spotted-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit a072ab506569ecff5b4c57fa90f7a417db69f33b Author: Chris Wilson Date: Tue Jun 26 17:24:37 2012 +0100 test: Add client side copy to FakeFront for emulating CopyBuffer correctly The server manages FakeFront following a flip, but it the client optimises a swap by replacing it with a CopyRegion, it is expected to also update the FakeFront itself. Replicate that behaviour so that the timings for the test case are consistent with mesa. Signed-off-by: Chris Wilson commit 96804c74f8f0d19fc1b9db467cf050f4934fe83b Author: Chris Wilson Date: Tue Jun 26 17:09:45 2012 +0100 test: FakeFront rules Oh my, I just once again rediscovered the copy on every flip due to the requirement for keeping FakeFront uptodate for reads after a SwapBuffers. Signed-off-by: Chris Wilson commit f306cd557ef263ff5057e413c335cc75bc0f7895 Author: Chris Wilson Date: Tue Jun 26 14:59:37 2012 +0100 sna/dri: Hold a reference to the cached DRI2 buffer on the front buffer Signed-off-by: Chris Wilson commit a87f2b9325bfad2bb3f93226706b6f9a09598945 Author: Chris Wilson Date: Sun Jun 24 13:48:38 2012 +0100 sna/gen4: Check for peculiar initial values for the surface offset Signed-off-by: Chris Wilson commit 8f4221a2520b7ed1f67b41185c2e4842e83e53ef Author: Chris Wilson Date: Tue Jun 26 15:56:50 2012 +0100 test: Add a simple exercise for DRI2 swap paths Signed-off-by: Chris Wilson commit a505015a254d6c6e24f0542bc141cde873dc6f34 Author: Chris Wilson Date: Mon Jun 25 22:50:47 2012 +0100 sna: Force DPMS to be on following a modeset Similarly to UXA, this papers over inconsistent behaviour in the kernel in handling the DPMS upon a modeswitch. Signed-off-by: Chris Wilson commit b7a8c94cdb9cf42a31f8ce128d70e23458ba2042 Author: Chris Wilson Date: Mon Jun 25 20:49:59 2012 +0100 sna: remove the assert(0)s along error paths This were there as a debugging aide to see if we ever hit unreachable code paths - mainly along corruption inducing GPU wedged recovery paths. They are superfluous and just scare the reader. Signed-off-by: Chris Wilson commit 15c0ee445f603033c82f357fedfc7737d198d7b3 Author: Chris Wilson Date: Sun Jun 24 19:28:03 2012 +0100 sna/gen5: Tweak thread allocations Bump the alloted number of threads to their max. Using more threads than cores helps hide the stalls due to sampler fetch, math functions and urb write. Specifying too many threads seems to not incur a performance regression, suggesting that the hardware scheduler is sane enough not to overpopulate the EU. A small but significant boost, peak x11perf -aa10text on an i3-330m is raised from 1.93Mglyphs/s to 2.35Mglyphs/s. Signed-off-by: Chris Wilson commit fa10005ce31483827547b7f71eae066899f0026c Author: Chris Wilson Date: Sat Jun 23 17:28:00 2012 +0100 sna/dri: Perform an exchange for a composited windowed SwapBuffers If the front buffer is not attached to the scanout and has not been reparented, we can simply exchange the underlying bo between the front/back attachments and inform the compositor of the damage. Signed-off-by: Chris Wilson commit 53d735ddb16b0204662b8584aa22998ba53deec1 Author: Chris Wilson Date: Sat Jun 23 10:16:44 2012 +0100 sna/dri: Queue windowed swaps Implement "tripple-buffering" for windowed SwapBuffers by allowing the client to submit one extra frame before throttling. That is we emit the vsync'ed blit and immediately unblock the client so that it renders to the GPU (which is guaranteed to be executed after the blit so that its Front/Back buffers are still correct) and requests another SwapBuffers. The subsequent swapbuffers are appended to the vsync chain with the blit/unblock then executed on the vblank following the original blit. That is both the client and xserver render concurrently. Signed-off-by: Chris Wilson commit 1e9319d5f56583be99f573f208cebb0ee3b5cc26 Author: Chris Wilson Date: Fri Jun 22 11:22:16 2012 +0100 sna: extend RandR to support super sized monitor configurations With the introduction of the third pipe on IvyBridge it is possible to encounter situations where the combination of the three monitors exceed the limits of the scanout engine and so prevent them being used at their native resolutions. (It is conceivable to hit similar issues on earlier generation, especially gen2/3.) One workaround, this patch, is to extend the RandR shadow support to break the extended framebuffer into per-crtc pixmaps. Signed-off-by: Chris Wilson commit e8b090902e788257610374deae659f01a91888f3 Author: Chris Wilson Date: Fri Jun 22 22:01:37 2012 +0100 sna/gen3+: Remove stale assertions for cached vbo Following the previous commit, we reset the vbo when it becomes idle rather than discard it. As such, the assertions to check that we are discarding the vbo are now bogus. Signed-off-by: Chris Wilson commit 565297e6bd3457a150036af9c62fe0dc67b794ac Author: Chris Wilson Date: Thu Jun 21 13:53:02 2012 +0100 sna/gen3+: Keep vbo cached Once we switch to using a vbo, keep it cached (resetting everytime it is idle) until we expire our caches. Signed-off-by: Chris Wilson commit d806973e21cd46e605b3cd405323ae7a64c12798 Author: Chris Wilson Date: Thu Jun 21 12:57:13 2012 +0100 sna: Micro-optimise search_inactive_cache Discard the unneeded next parameter to drop a memory reference in a hot path, and don't wait for a retirement if we are looking in a larger bucket than suits. Signed-off-by: Chris Wilson commit d39fef0a7f3daf5c07686b44e4dea01c0f06c77a Author: Chris Wilson Date: Thu Jun 21 12:25:35 2012 +0100 sna: Tiles are only 128 bytes wide on gen2 Signed-off-by: Chris Wilson commit 4f2dde1fa3b04b27bae8fc0bca9c824bd362d23b Author: Chris Wilson Date: Thu Jun 21 10:31:24 2012 +0100 sna/gen7: Eliminate the pipeline stall after a non-pipelined operation Signed-off-by: Chris Wilson commit 3ef05a8d0833203e265aff392f225a11a11c2d01 Author: Chris Wilson Date: Thu Jun 21 09:36:42 2012 +0100 sna/gen7: Do not emit a pipeline stall after a non-pipelined command Signed-off-by: Chris Wilson commit 4501e131e6b737cb8f2581c8b1f7ea9d29a8e912 Author: Chris Wilson Date: Thu Jun 21 16:38:32 2012 +0100 sna/gen7: prefer using RENDER copy Further testing and the balance of doubt swings in favour of using the 3D pipeline for copies. For small copies the BLT unit is faster, 2.14M/sec vs 1.71M/sec for comppixwin10 And for large copies the RENDER pipeline is faster, 13000/sec vs 8000/sec for comppixwin500 I think the implication is that we are not efficiently utilising the EU for small primitives - i.e. something that we might be able to improve. Signed-off-by: Chris Wilson commit 3da56c48b7820ec77d704c5a16670eb86a6f673f Author: Chris Wilson Date: Wed Jun 20 15:14:23 2012 +0100 sna/gen7: Prefer using BLT rather than redirect for copies Signed-off-by: Chris Wilson commit b1f8386db6e9b3eea1bdbf8cde90f33792640ce8 Author: Chris Wilson Date: Wed Jun 20 23:28:14 2012 +0100 sna/gen7: Emit a pipeline flush after every render operation For whatever reason, this produces a 30% improvement with the fish-demo (500 -> 660 fps on i7-3730qm at 1024x768). However, it does cause about a 5% regression in aa10text. We can appear to alleviate that by only doing the flush when the composite op != PictOpSrc. Signed-off-by: Chris Wilson commit d02e6d81420a114c9622bbdaf90fc3ae5d4b15a7 Author: Chris Wilson Date: Thu Jun 21 16:10:02 2012 +0100 Encode the third pipe using the HIGH_CRTC shift for vblanks The original vblank interface only understood 2 pipes (primary and secondary) and so selecting the third pipe (introduced with IvyBridge) requires use of the HIGH_CRTC. Using the second pipe where we meant the third pipe could result in some spurious timings when waiting on the vblank. Reported-by: Adam Jackson Signed-off-by: Chris Wilson commit f8b67be8d3b5d5cbe730ba5dba3edd2d30a99d9f Author: Chris Wilson Date: Wed Jun 20 12:39:19 2012 +0100 sna: Don't clear the needs_flush flag after emitting a flush on the busy bo We use that flag to check whether we need to check whether the bo is still busy upon destruction, so only clear it if the bo is marked as idle. Signed-off-by: Chris Wilson commit 5419bbb483af595d7021e49debef7700c599217e Author: Chris Wilson Date: Wed Jun 20 11:21:52 2012 +0100 sna/gen7: Prefer BLT for copies It's faster for where the cost of the extra batches and ring switching do not dominate... Signed-off-by: Chris Wilson commit 1c0bb8c4c93a43e2932429a9f6c23d91f1be2060 Author: Chris Wilson Date: Wed Jun 20 10:57:40 2012 +0100 sna/gen7: Keep using RENDER paths for large pixmaps As the 3D pipeline is quite versatile and we only need to force BLT if we cannot extract the subregion. Signed-off-by: Chris Wilson commit b238f64e8a53883cfe7c568e37ef18bbee77996e Author: Chris Wilson Date: Wed Jun 20 10:46:59 2012 +0100 sna/gen[67]: Prefer to not force BLT paths for large pixmaps The sampler can in fact handler subregions of large pixmaps quite well, and so we prefer to keep using the 3D pipeline so long as the operation fits in. If not, then switch to the BLT in order to avoid the temporary surface dance. Signed-off-by: Chris Wilson commit 38f06a351fdd35fa5c6136e9a25e034a812a94c2 Author: Chris Wilson Date: Tue Jun 19 22:22:12 2012 +0100 uxa: Fix second regression in glyph fallback from 64a4bc To complete my show of incompetence for the evening, not only do we have to restore the original source when compositing the mask onto the destination, we also need to restore the original dst (rather than composite the mask onto the mask!). Signed-off-by: Chris Wilson commit fda9faee755cb35906ca1179a568332ef2de35a5 Author: Chris Wilson Date: Tue Jun 19 21:01:47 2012 +0100 uxa: Use the original src for fallback glyph compositing In 64a4bcb8cefff, I introduced a WHITE source for the purposes of accumulating the glyph mask correctly. Unfortunately I neglected to restore the original source picture for compositing the glyph mask on the destination, resulting in a use-after-free and then corruption. Reported-by: Maarten Lankhorst Signed-off-by: Chris Wilson commit 8141e290b1ac7c4d1524bb389a84a8f375df4634 Author: Chris Wilson Date: Tue Jun 19 20:24:33 2012 +0100 sna: Explain why we ignore the busy status result during kgem_bo_flush() Signed-off-by: Chris Wilson commit eb1d07624e5aeb7b5db7ceb46975091e92185d63 Author: Chris Wilson Date: Tue Jun 19 16:00:13 2012 +0100 sna: Ensure extents is initialised if short-circuit use-cpu-bo As we may attempt to end up using the GPU bo is the CPU bo is busy, we need to make sure we have initialised the damage extents first. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 9f216e159bd05ddd269eb8ddf3ca7a407c2901e2 Author: Chris Wilson Date: Tue Jun 19 15:57:31 2012 +0100 sna: Assert expected return values Keep the semantic analyser happy by consuming the expected return value with an assert. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 2dc93b2a6c832ce8b972de90d09080e860dcd40f Author: Chris Wilson Date: Tue Jun 19 15:34:09 2012 +0100 sna: Check results from syscalls Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 06634604abf15fdd27dd007fcf81595da994146b Author: Chris Wilson Date: Tue Jun 19 15:28:43 2012 +0100 Initialise adaptors to 0 in case xf86XVListGenericAdaptors does not Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 8bfea58dbc634cadc399d3132030c591e086880c Author: Chris Wilson Date: Tue Jun 19 15:26:18 2012 +0100 sna: Minor cleanups from sematic analyser in DBG Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 0a43d425670b883b04565296c0510e7ba03ba6de Author: Chris Wilson Date: Tue Jun 19 14:46:58 2012 +0100 uxa: Implement glyphs-to-dst to avoid fallbacks An earlier version was buggy and introduced corruption as it failed to fallback gracefully with ComponentAlpha glpyhs. This is a much simpler implementation that composites each glyph individually, leaving it to the backend to optimise away state changes. It should still be many times faster than incurring the fallback... Reported-by: Oleksandr Natalenko Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50508 Signed-off-by: Chris Wilson commit 64a4bcb8ceffff8e4ee448d8a467620596703509 Author: Chris Wilson Date: Tue Jun 19 13:42:12 2012 +0100 uxa: Use (white IN glyph) ADD mask to compose the glyph mask As pointed out by Soren Sandmann and Behdad Esfahbod, it is essential to use white IN glyph when adding to the mask so that the channel expansion is correctly performed when adding to an incompatible mask format. For example, loading alpha as the source results in the value 000a being added to the rgba glyph mask (for mixed subpixel rendering with grayscale glyphs), whereas the desired value is aaaa. Signed-off-by: Chris Wilson commit 99845dcb3ba862269b29aec782e2bcef31c0403e Author: Chris Wilson Date: Tue Jun 19 10:37:10 2012 +0100 Post Damage on the Screen Pixmap after a pageflip This issue was raised by Dave Airlie as he is trying to integrate multiple GPUs into the xserver, and a particular setup has a slave rendering device that copies the contents from the GPU over a DisplayLink USB adaptor. As such the slave device is listening for Damage on the Screen Pixmap and needs the update following pageflips. Since we already are posting damage for all the SwapBuffers paths other than pageflip, for consistency we should post damage along the pageflip path as well. Reported-by: Dave Airlie Signed-off-by: Chris Wilson commit 4acf727941a37651f672db3774281a437940c540 Author: Chris Wilson Date: Tue Jun 19 10:20:54 2012 +0100 sna: Initialize the color value for fallback unaligned boxes Reported-by:Zdenek Kabelac Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=5047 Signed-off-by: Chris Wilson commit b0b2d3c9663c29e9844aef1608416ae40c194b55 Author: Chris Wilson Date: Tue Jun 19 00:41:35 2012 +0100 sna: Avoid copying unintialised data during source picture upload If we have never written to a pixmap, then there will be neither a GPU or shadow pointer and we would attempt to copy a NULL pointer. In this case as the user is expecting to copy unintialised data we are at liberty to replace those undefined values with the clear color. Signed-off-by: Chris Wilson commit 38472fcc53c5dceb98b96458183e6729b8311a43 Author: Chris Wilson Date: Tue Jun 19 00:37:12 2012 +0100 sna: Double check that the source is busy before performing indirect reads Signed-off-by: Chris Wilson commit 8cdfb8c24c8b49c88451714d80293c66d63e8c01 Author: Chris Wilson Date: Tue Jun 19 00:36:41 2012 +0100 sna: Fix up the shadow pointer on the source when copying Signed-off-by: Chris Wilson commit 17f3a83fdc8c0ef5c12fb4be34d86021c0c865e5 Author: Chris Wilson Date: Mon Jun 18 23:48:16 2012 +0100 sna: Review sna_copy_boxes A couple of ordering issue and more assertions. Signed-off-by: Chris Wilson commit a9045699b9cd66d0b0d96bfc964458c96845f97f Author: Chris Wilson Date: Mon Jun 18 23:47:21 2012 +0100 sna: Reset region after transferring to cpu If we adjust the region for the pixmap offset, be sure that we reset it before returning it back to the caller. Signed-off-by: Chris Wilson commit 9f51311a7d95bf4bc23926b8e6bf8ee52afd180c Author: Chris Wilson Date: Mon Jun 18 23:45:50 2012 +0100 sna: Check if the busy is truly busy before commiting to an indirect upload Signed-off-by: Chris Wilson commit 291b3c4367b455bfc5a772f8caaeee73f36d826a Author: Chris Wilson Date: Mon Jun 18 23:43:00 2012 +0100 sna: Align upload buffers to 128 This seems to be a restriction (observed on 965gm at least) that we have incoherent sampler cache if we write within 128 bytes of a busy buffer. This is either due to a restriction on neighbouring cachelines (like the earlier BLT limitations) or an effect of sampler prefetch. Reported-by: Zdenek Kabelac References: https://bugs.freedesktop.org/show_bug.cgi?id=50477 Signed-off-by: Chris Wilson commit 39e5c7491535999643c1761bb1602ad757ab486c Author: Chris Wilson Date: Mon Jun 18 21:58:27 2012 +0100 sna: Assert damage is valid after every addition Even more paranoia than just checking upon migration. Signed-off-by: Chris Wilson commit 92e1693e5fb3a1dd89fca5e5ecc660e2de78f9cd Author: Chris Wilson Date: Mon Jun 18 21:26:58 2012 +0100 sna: Validate cpu/gpu damage never overlaps References: https://bugs.freedesktop.org/show_bug.cgi?id=50477 Signed-off-by: Chris Wilson commit d2312c8f958002e54ddcb834f37916f4b46ac291 Author: Chris Wilson Date: Mon Jun 18 21:29:29 2012 +0100 sna: Fixup tracking of vmap upload buffers Signed-off-by: Chris Wilson commit 75e9eeca7e998b1ee3f8b0df780adae1b9e5b408 Author: Chris Wilson Date: Mon Jun 18 16:39:20 2012 +0100 sna: Remove overlapping CPU damage when operating inplace on the GPU Otherwise we gradually introduce garbage into the picture. Reported-by: Zdenek Kabelac Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50477 Signed-off-by: Chris Wilson commit a936466dd41c4bb8b0956c4da5a5838f991b332a Author: Chris Wilson Date: Mon Jun 18 11:36:53 2012 +0100 sna: Prefer to attempt a Composite operation rather than use pixman composite As pixman composite performance is atrocious for anything other than solids, prefer to upload the mask and attempt a composite operation on the GPU unless we are forcing the fallback. Signed-off-by: Chris Wilson commit 4b325d6e2b99ec3f63a7c5175f6f4746f6773550 Author: Chris Wilson Date: Mon Jun 18 11:24:55 2012 +0100 sna: Fix rendering of unaligned boxes through pixman Not only do we need to make sure the source is available to the CPU, we need to actually check the right conditions for clipping the box. Signed-off-by: Chris Wilson commit caef27492b5a70bd46a09cd5094b2c93e38e39ea Author: Chris Wilson Date: Sun Jun 17 20:56:46 2012 +0100 sna: convert another instance of applying the clear to the CPU pixmap Signed-off-by: Chris Wilson commit 8695c4c77666cd07eab51efcbc7c4f11c85250fd Author: Chris Wilson Date: Sun Jun 17 16:53:53 2012 +0100 sna: Fix the blt composite op with no-ops When returning early because the operation is a no-op, we still need to fill in the function pointers to prevent a later NULL dereference. Signed-off-by: Chris Wilson commit 7905ddae1dbc8805d0fadbd6d21c7a5df7e715fc Author: Chris Wilson Date: Sun Jun 17 17:01:12 2012 +0100 sna: Further refine choice of placement when uploading source data. The goal is cheaply spot a simple copy operation that can be performed on the CPU without having to load both parties onto the GPU. Signed-off-by: Chris Wilson commit 5a675b61f27273f7ef344d4056dbba1f8cd97737 Author: Chris Wilson Date: Sun Jun 17 15:42:17 2012 +0100 sna: Correct typo forcing everything to be clear to 0! Signed-off-by: Chris Wilson commit b55bf1abbe71281e3d9ebde1c4005d40902d5e7f Author: Chris Wilson Date: Sun Jun 17 14:14:44 2012 +0100 sna: Fix cut'n'paste errors in tiling debug Rename for different variables Signed-off-by: Chris Wilson commit 9756c60b4ad15281d025b9c27f19d19e8a630958 Author: Chris Wilson Date: Sun Jun 17 11:39:33 2012 +0100 sna/gen7: Enable non-rectilinear spans Seems we have enough GPU power to overcome the clumsy shaders. Just imagine the possibilities when we have a true shader for spans... Signed-off-by: Chris Wilson commit 41aff56a1f452e409c7a49512a1d2824b74f3838 Author: Chris Wilson Date: Sun Jun 17 10:50:31 2012 +0100 sna: Add tiling for spans Semmingly only advisable when already committed to using the GPU. This first pass is still a little naive as it makes no attempt to avoid empty tiles, nor aims to be efficient. Signed-off-by: Chris Wilson commit 222e6ff43ef683e82101fb360911fc01fbe00597 Author: Chris Wilson Date: Sat Jun 16 23:40:30 2012 +0100 sna: Read inplace for fallback copies Signed-off-by: Chris Wilson commit 79d468925bb012806e097337e4e5930818c6ab46 Author: Chris Wilson Date: Sat Jun 16 17:54:21 2012 +0100 sna: Decrease latency for 1x1 GetImage by using an inplace mapping Signed-off-by: Chris Wilson commit 2c2a8d3780f1d8de3f13bee8e068fdaf608ff9e9 Author: Chris Wilson Date: Sat Jun 16 23:19:49 2012 +0100 sna: Allow reads to be performed inplace If we can guess that we will only readback the data once, then we can skip the copy into the shadow. Signed-off-by: Chris Wilson commit bc6997f6f751d3ba352dfc20c6717ec12b8fac47 Author: Chris Wilson Date: Sat Jun 16 17:54:15 2012 +0100 sna: Cleanup damage processing after operating inplace Signed-off-by: Chris Wilson commit 937ca8a5d8a0f70a0724db1519bb7b5fc0857425 Author: Chris Wilson Date: Sat Jun 16 17:53:58 2012 +0100 sna: Use memset for simple clears Signed-off-by: Chris Wilson commit de4572b0b52e2fcfcad04660ee2f81ee88d500a5 Author: Chris Wilson Date: Sat Jun 16 13:40:26 2012 +0100 sna: Inspect CPU damaged state when deciding upon Composite placement Signed-off-by: Chris Wilson commit b689cd924c500373e1e293dd9eb54a238e400381 Author: Chris Wilson Date: Fri Jun 15 16:25:51 2012 +0100 sna: Composite traps inplace if the CPU is already all-damaged One outcome is that inspecting the usage patterns afterwards indicated that we were missing an opportunity to reduce unaligned boxes to an inplace operation. Signed-off-by: Chris Wilson commit ae3c0963790cfb6f984ed4ad3ecbaae492775e1b Author: Chris Wilson Date: Fri Jun 15 16:25:51 2012 +0100 sna: Composite glyphs inplace if the CPU is already all-damaged Signed-off-by: Chris Wilson commit eaed58b2baf30eaea37be06cfc1d9d81059aba27 Author: Chris Wilson Date: Sat Jun 16 12:55:54 2012 +0100 sna: Tweak placement of operations Take in account busyness of the damaged GPU bo for considering placement of the subsequent operations. In particular, note that is_cpu is only used for when we feel like the following operation would be better on the CPU and just want to confirm that doing so will not stall. Signed-off-by: Chris Wilson commit 8eac098962891a5deb7c53d36c6dec57c7f2b972 Author: Chris Wilson Date: Sun Jun 17 09:51:12 2012 +0100 sna/gen3: Add another DBG for dropping vbo Signed-off-by: Chris Wilson commit 515c8b19d638d4a811b159ef0dc7cf4059e30217 Author: Chris Wilson Date: Fri Jun 15 15:41:14 2012 +0100 sna: Prefer to operate inplace if already mapped of the GPU is wholly dirty Signed-off-by: Chris Wilson commit d1713941e9db3e7a6d83466be1b253978fb4bf01 Author: Chris Wilson Date: Fri Jun 15 15:29:59 2012 +0100 sna: Tweaks for DBG missing glyphs through fallbacks Signed-off-by: Chris Wilson commit 2b23605efba009fb340ec10b37d54caae159b9b1 Author: Chris Wilson Date: Fri Jun 15 15:28:31 2012 +0100 sna: Don't trim prepare for glyphs_via_mask If we pass the expected width/height without passing the per-glyph offset into the preparation function, we make the erroneous mistake of analysing the glyph cache only for the mask extents and so will miss glyphs that we need to upload for the operation. Signed-off-by: Chris Wilson commit 9f66b27114fcc457fa5cb2d5889e875384f89e75 Author: Chris Wilson Date: Fri Jun 15 13:47:33 2012 +0100 sna: Remove mark-as-cpu after gem_pread The kernel no longer moves the read bo into the CPU domain, so remove the last vestiges of that tracking. Signed-off-by: Chris Wilson commit bfd88d5429528b0162eafcc9496bfd1c708b60cd Author: Chris Wilson Date: Fri Jun 15 11:21:29 2012 +0100 sna: Silence a few compiler warnings Nothing harmful, just noise. Signed-off-by: Chris Wilson commit b3659beec8c4126de5da4df5cb2cc077b7af6c0b Author: Chris Wilson Date: Fri Jun 15 11:08:18 2012 +0100 sna: Check for zero-sized damage regions after trimming Windows to their pixmaps Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 293a867ea55d3004f5be21b1d0ad765a89c28a5a Author: Chris Wilson Date: Thu Jun 14 23:02:10 2012 +0100 sna: Specialise the self-copy blitter to handle vertically overlapping copies Signed-off-by: Chris Wilson commit 3b76ab995bb70da5f76afead7c696cb7fd72b158 Author: Chris Wilson Date: Thu Jun 14 22:33:11 2012 +0100 sna: Add a little bit more DBG to migration IO paths Signed-off-by: Chris Wilson commit 49543522e789a0a8213c164b37a18c0642e60ac4 Author: Chris Wilson Date: Thu Jun 14 20:25:21 2012 +0100 sna: Fix reversed assertion Darn the double negative! After adding damage we want to assert that the region is not empty, not !not empty. Signed-off-by: Chris Wilson commit 4e50467b4f50b522a07bedae7ff68b9c37362af8 Author: Chris Wilson Date: Thu Jun 14 17:40:09 2012 +0100 uxa: Force the outputs to off for consistency with xf86DisableUnusedFunctions() Upon a VT switch, we set the desired modes and turn off the DPMS on any unused output. Make this explicit so that we always maintain consistency between the kernel and X's list of enabled CRTCs. References: https://bugs.freedesktop.org/show_bug.cgi?id=50772 Signed-off-by: Chris Wilson commit 3a56a0b10eb3ab07efd28efdc79d0fd3a6fa20ff Author: Chris Wilson Date: Thu Jun 14 19:26:42 2012 +0100 sna: Make the disable-unused after vt switch distinct from DPMS off So that we do not lose control over dpms on/off! Signed-off-by: Chris Wilson commit b415ca05c2e1c4f09f85d8769d39e5369661ed3a Author: Chris Wilson Date: Thu Jun 14 17:06:19 2012 +0100 sna: Reset damage extents after reduction goes to zero If the reduction of the damage clears all of the boxes, we need to reset the -infinite extents so that we continue to accumulate further damage. Reported-by: Zdenek Kabelac References: https://bugs.freedesktop.org/show_bug.cgi?id=50744 Signed-off-by: Chris Wilson commit 0df7c488640d3590d2a88dc353b72167b6644eaa Author: Chris Wilson Date: Thu Jun 14 16:09:38 2012 +0100 sna: Supporting overlapping copies for fallback blits Reported-by: Zdenek Kabelac References: https://bugs.freedesktop.org/show_bug.cgi?id=50393 Signed-off-by: Chris Wilson commit d5b273b20b7d917d08af120815c28b1618d3342c Author: Chris Wilson Date: Thu Jun 14 15:35:24 2012 +0100 sna: Explicitly disable the CRTC so that xserver/kernel agree after VT switch References: https://bugs.freedesktop.org/show_bug.cgi?id=50772 Signed-off-by: Chris Wilson commit 221534abe2dc04fae8b8fc332104bca275d4863b Author: Chris Wilson Date: Wed Jun 13 22:48:43 2012 +0100 sna: Only reduce damage addition to a region operation if clean Some paths bypass operating upon the region as they do not have an YX-banded set of boxes and so prefer to defer the costly construction of the region till later. As a result, we have to be careful not to overwrite any existing information if we do operate on the region after setting the dirty boxes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50744 Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 0db789e180b6b01fb8aff547879387058f52a0b9 Author: Zdenek Kabelac Date: Wed Jun 13 14:26:37 2012 +0200 sna: Constification Adding preserving const modifiers to decrease amount of const warnings Signed-off-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 33998a7080aa7f50ba922c764c6a93fe951c5b64 Author: Zdenek Kabelac Date: Wed Jun 13 14:26:36 2012 +0200 sna: Fix typo and compare y1 to y2 It seems 'y1' was meant to be compared here Signed-off-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 0ade32fbad4014efcc8aa8ed4cd0f8a39f9ab107 Author: Chris Wilson Date: Wed Jun 13 14:28:43 2012 +0100 sna: Fix operator preference around a | b & c | d Tell the compiler what we really mean is a | (b & (c | d)) Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 20f3114ccd63052b4fd06ef1d87efaaabbbac7ac Author: Chris Wilson Date: Wed Jun 13 14:27:10 2012 +0100 sna: Use long for simplicity when printing size_t values for debugging Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 6f75b8da6a468188dd0c00015395424598b3f502 Author: Zdenek Kabelac Date: Wed Jun 13 14:26:33 2012 +0200 sna: Valgrind updates Add some mising initialization for unknown ioctl Signed-off-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 70cf637ca47c9e67758e09c7e1d10eef51db1f98 Author: Zdenek Kabelac Date: Wed Jun 13 14:26:32 2012 +0200 legacy/i810: Fix declaration to match definition Signed-off-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 5fea2478cd5ab4156c182210d28c5e27e5f67403 Author: Chris Wilson Date: Wed Jun 13 14:10:01 2012 +0100 Lots of trivial semantic fixes Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit e499f207c161d1b3cd75f065dc89021ff5f40b63 Author: Chris Wilson Date: Wed Jun 13 13:11:17 2012 +0100 sna: Fix memleak from sna_crtc_find_plane() Signed-off-by: Chris Wilson commit 49da55da518348fc6b88e09d5132dd1b1d751304 Author: Chris Wilson Date: Wed Jun 13 11:20:41 2012 +0100 sna: Free the reversed glyph bits along with the font Signed-off-by: Chris Wilson commit 9f68c7fe6aa34ab17d82489fca5f63a3ce335444 Author: Chris Wilson Date: Wed Jun 13 11:15:42 2012 +0100 sna: Free clip rectangles after intersection with PolyRectangle extents Signed-off-by: Chris Wilson commit ab3b7fe31b5a9d7924e959f21d29c4f7352ec8cb Author: Chris Wilson Date: Wed Jun 13 10:35:14 2012 +0100 sna: Only reuse a write buffer if all external references have been dropped This avoids the unhappy situation of overwriting an upload buffer that we intend to use for a fallback. Signed-off-by: Chris Wilson commit e8cb656dc4bab1489df9dfb4cb64704b2a9fa34b Author: Chris Wilson Date: Wed Jun 13 08:10:10 2012 +0100 sna: Free clip intersection with line extents after use Signed-off-by: Chris Wilson commit 572745eb243a96819c8fa248f4ffdd703ed13b0f Author: Chris Wilson Date: Tue Jun 12 22:49:05 2012 +0100 sna/damage: Remove unused return value Signed-off-by: Chris Wilson commit aefc0417dde8b2137a787459a69d91c14902f22b Author: Chris Wilson Date: Tue Jun 12 22:47:41 2012 +0100 sna/damage: Simplify initialisation of damage extents Just use the already computed region->extents when adding the first box. Signed-off-by: Chris Wilson commit 78a96e812b912c5b25a02670f603f455f93e9d00 Author: Chris Wilson Date: Tue Jun 12 21:43:31 2012 +0100 sna: Refresh the damage self-tests They had bitrotted with the revamp and needed some massaging to update to the new interfaces. Signed-off-by: Chris Wilson commit 6138f7434a6fb014299a7e9a8392ef962c8cba30 Author: Cyril Brulebois Date: Tue Jun 12 21:19:14 2012 +0100 Fix up braindamage in previous commit. ickle: Fixing up my idiotic change, obviously too much birthday cake. commit 224d631a232d3536e0f1f2780bfbe1218ee7590f Author: Cyril Brulebois Date: Tue Jun 12 21:14:53 2012 +0100 Avoid calling xf86nameCompare() with a NULL string Device sections without a Driver property would lead to a server segfault because of a NULL pointer's being passed as the second argument of xf86nameCompare(). Debian bug #677206 Signed-off-by: Cyril Brulebois commit 3b9b64c7c9b5b0bfaafb97c9a9fe5849bbb412da Author: Dave Airlie Date: Tue Jun 12 10:26:34 2012 +0100 uxa: do copy fb at startup. Copy the current framebuffer for smooth wayland->gdm handoff. This has been hanging around in Fedora for too long now, and we've dropped the feature a few times, and yes I know the Simpsons did it^W^W^W SNA does it. I've updated the code to have some of the better fixes from nouveau. I've no idea who wrote this code either, krh or ajax. [ickle: The earliest version I've found had krh's fingerprints on it, though it may still have been a joint effort.] Signed-off-by: Dave Airlie [ickle: improve error handling, only copy the fb during initial takeover] commit b6525702b9ffd21beb8ea6bb10a8ad5ce7f9de14 Author: Chris Wilson Date: Tue Jun 12 11:59:31 2012 +0100 sna: Hook up AdjustFrame() Looks to be unused by the core, just a solitary invocation in an obscure extension it seems. However the implementation looks trivial so incorporate it until it is finally removed, just in case. Signed-off-by: Chris Wilson commit 7b281d1300127d65392aaadbbe2299fa9e1749a9 Author: Chris Wilson Date: Tue Jun 12 10:37:04 2012 +0100 sna: Remove a pair of empty stub functions The export wrappers for the glyph cache constructor/destructor existed in case there was a need to add more routines. Since that never happened, remove the extra step of indirection. Signed-off-by: Chris Wilson commit 392e33a62d729c64c57699505220b4029e015470 Author: Chris Wilson Date: Mon Jun 11 09:51:41 2012 +0100 sna: Instrument memory/bo allocations for monitoring over time Hide it behind --enable-debug=memory to avoid incurring the cost for everybody. Signed-off-by: Chris Wilson commit 4e984b79cce038ba5026d8bdd93dec9b5a6ced8a Author: Chris Wilson Date: Mon Jun 11 09:02:03 2012 +0100 configure: Correct the help string for --with-default-accel Prior to finalizing the defaults I changed my mind and realised that the default had to reflect the current behaviour of someone enabling SNA for the first time, and not the previous behaviour of --enable-sna to override UXA. This is so that distro's could offer an SNA enabled DDX for the brave whilst not affecting their typical no-xorg.conf users. Signed-off-by: Chris Wilson commit 7614a541886dd9eb5c9d441e2618785e9cc53a65 Author: Chris Wilson Date: Sun Jun 10 09:36:38 2012 +0100 configure: Harden --with-default-accel against simple mistakes If the user specifies no options, assume automatic selection. Then double check we found a valid backend and so avoid later breaking the build. Signed-off-by: Chris Wilson commit ea0209fbc12fca282bd8ef72223791bf163801ce Author: Chris Wilson Date: Fri Jun 8 22:44:23 2012 +0100 sna: Remove option to disable vmap It works everywhere, so when it is finally enabled, let it be. Signed-off-by: Chris Wilson commit 18baa1428b1c4c0a49927d4c32db091db9e4e97b Author: Chris Wilson Date: Fri Jun 8 22:43:01 2012 +0100 Make the enum list of options consistent with the actual table. Signed-off-by: Chris Wilson commit adc872a9654dc18d778323ca0721704878ad3851 Author: Chris Wilson Date: Fri Jun 8 06:44:20 2012 +0100 sna: Add DBG spew to flink() Signed-off-by: Chris Wilson commit a62ad4e80722db187766c83a16fa84ec236cc5eb Author: Chris Wilson Date: Thu Jun 7 23:37:59 2012 +0100 sna: Skip flushing the active queue if there is not a suitable bo pending Signed-off-by: Chris Wilson commit 318982566bbc7145847bd03601087150eef7a8d8 Author: Chris Wilson Date: Thu Jun 7 21:56:04 2012 +0100 sna/dri: Disable experimental code by default Since these require non-upstream patches to other components, we don't want it enabled by default and randomly breaking builds. Signed-off-by: Chris Wilson commit ebf84b8e572b5cb1a509000d412dfa5be3d1aca3 Author: Chris Wilson Date: Thu Jun 7 20:15:53 2012 +0100 sna/trapezoids: Micro-optimise cell allocation The pool is a fixed size so we can delete the generic code to handle variable sizes. Signed-off-by: Chris Wilson commit 0a25fc68c5cd82cad4b99b0f2357f430c8783c3f Author: Chris Wilson Date: Thu Jun 7 19:13:09 2012 +0100 sna: Actually create Y-tiled source pixmaps An inconsistency highlighted by 7c51cabaecac revealed that we had a mismatch between the check in move_to_gpu() and how we created the pixmap. This mismatch resulted in us creating and uploading tiled pixmaps for single shot textures, and the increase aperture pressure was causing a regression in firefox-fishbowl on pnv, for example. Signed-off-by: Chris Wilson commit c58d137d3eeb0e97bfd53e68404e04d9012b5697 Author: Chris Wilson Date: Thu Jun 7 11:18:27 2012 +0100 sna: Suppress DBG prints along potential SIGIO paths As ErrorF/fprintf is not re-entrant due to its mutex we can not use DBG from code that could be called by a signal handler. X's SIGIO handler attempts to move the cursor from within the handler (eek!) and so we need to be careful not to take any locks, such in as the aforementioned fprintf, along the cursor paths. Reported-by: Zdenek Kabelac References: https://bugs.freedesktop.org/show_bug.cgi?id=50744 Signed-off-by: Chris Wilson commit 3f5b94f3d1625b06840c6441a0b175604ee3d2f9 Author: Chris Wilson Date: Wed Jun 6 17:24:07 2012 +0100 sna: Check against integer overflows when computing cache size Even with a 1nm process, I doubt we will see 4+GiB cache sizes ;-) Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 902391bd798775e1a7a53503d4dd1756162f737f Author: Chris Wilson Date: Wed Jun 6 17:20:39 2012 +0100 uxa: Remove dead-code for SourcePictures All SourcePictures are now converted into Drawables, which had been assumed by the driver backend. However, the code still existed to attempt to pass procedural pictures onwards and so set pSrcPix to NULL which was being flagged by the static analyser as a potential NULL dereference. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 3d8a1f7176877975a31ad7a6548fa8309065f617 Author: Chris Wilson Date: Wed Jun 6 17:15:42 2012 +0100 sna/gen4+: Add missing "fall through" comments Reported-by: Signed-off-by: Chris Wilson commit 8ae4407c43e6a8d26784508f61b416138f908132 Author: Chris Wilson Date: Wed Jun 6 17:13:05 2012 +0100 sna: Silence static analyser complaining about potential NULL pointer Add an assert to prove that is not. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 08010b23a3e2bc37d202251923fac814b18fa501 Author: Chris Wilson Date: Wed Jun 6 17:10:35 2012 +0100 uxa/dri: Silence static analyser for potential NULL intel_pixmap If the intel_pixmap was NULL we should have failed to create the DRI2 buffer, so we can safely assert here to keep the analyser quiet. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 06b1b875ba13227ddaf7f28dbdcdaa3eb49f0857 Author: Chris Wilson Date: Wed Jun 6 17:05:13 2012 +0100 uxa/i915: check for failure to allocate temporary destination If the target drawable is too large for the render pipeline, we need to create a temporary surface. This may fail, so abort if it does. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit c553dcae2dd714cac413ffc7c7779cd78c9a3e61 Author: Chris Wilson Date: Wed Jun 6 17:04:01 2012 +0100 sna: Silence a few unused function warnings Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 536033b4edb40db18210e5272eb8ce9703e5e364 Author: Chris Wilson Date: Wed Jun 6 16:02:47 2012 +0100 legacy/i810/dri: Check for malloc failure for BusIdString Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit b2da80c1d1058dca5d3d85693918e53d9fa61dd3 Author: Chris Wilson Date: Wed Jun 6 15:59:54 2012 +0100 sna: Add some missing 'fall through' comments Static analysers are dumb and presume readers are too. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit c433fb4521e2fb65a555489bd09ba6bb9448b72f Author: Chris Wilson Date: Wed Jun 6 15:17:30 2012 +0100 uxa/dri: Fix up typo from f2513cb0f s/true/FALSE/? Wrong. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 1675f441049d559d891fe378e437c12db21df9e7 Author: Chris Wilson Date: Wed Jun 6 12:55:13 2012 +0100 uxa/dri: Transfer reference of the new_back buffer to the flip_chain In order to prevent a leak of the bo when the chain is eventually torn-down when the client exits. Reported-by: Andreas Lampersperger Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50670 Signed-off-by: Chris Wilson commit 18726a4975ab2ddf85eaa6eb1602dcbe599217f7 Author: Chris Wilson Date: Wed Jun 6 10:58:49 2012 +0100 sna: Perform CopyArea directly onto a CPU bo if available Signed-off-by: Chris Wilson commit 57d7d5de78bcf01d75d7a7de03fe50a2a9bd1b7e Author: Chris Wilson Date: Wed Jun 6 00:08:17 2012 +0100 sna: Use GPU for readback onto CPU bo Time to blt from GTT to LLC 16384 bytes: 125.000µs (snb) Time to blt from GTT to LLC 16384 bytes: 71.000µs (ivb) Time to blt from GTT to LLC 1048576 bytes: 1400.000µs (snb) Time to blt from GTT to LLC 1048576 bytes: 938.000µs (ivb) Time to copy from GTT to LLC 16384 bytes: 118.000µs (snb) Time to copy from GTT to LLC 16384 bytes: 134.000µs (ivb) Time to copy from GTT to LLC 1048576 bytes: 6723.000µs (snb) Time to copy from GTT to LLC 1048576 bytes: 7424.000µs (ivb) And conversely, Time to blt from LLC to GTT 16384 bytes: 10.000µs (snb) Time to blt from LLC to GTT 16384 bytes: 8.000µs (ivb) Time to blt from LLC to GTT 1048576 bytes: 217.000µs (snb) Time to blt from LLC to GTT 1048576 bytes: 135.000µs (ivb) Time to copy from LLC to GTT 16384 bytes: 4.000µs (snb) Time to copy from LLC to GTT 16384 bytes: 4.000µs (ivb) Time to copy from LLC to GTT 1048576 bytes: 270.000µs (snb) Time to copy from LLC to GTT 1048576 bytes: 179.500µs (ivb) It seems clear then that even with the extra synchronisation cost copying from the GTT is much preferable with the GPU than using the uncached reads by the CPU. Streaming write-combines from the CPU into the GTT seem about as efficient as we can manage, so continue to use the mapping unless busy. Signed-off-by: Chris Wilson commit f2513cb0fdb0d1214854fd4e4dcd477ba8583862 Author: Chris Wilson Date: Wed Jun 6 10:41:35 2012 +0100 uxa/dri: Do not use undeclared stdbool features The header isn't pulled in, so stop using the undefined values of true/false. Signed-off-by: Chris Wilson commit 1dafb4777f8378c87f34feae667582498220204c Author: Chris Wilson Date: Tue Jun 5 21:25:40 2012 +0100 sna/damage: Add some assertions to validate that each damage box is non-empty References: https://bugs.freedesktop.org/show_bug.cgi?id=50744 Signed-off-by: Chris Wilson commit c4eb5528a456b65c673f7c984d14a622ac67cdca Author: Chris Wilson Date: Tue Jun 5 16:04:16 2012 +0100 uxa: Check for DPMS off before scheduling a WAIT_ON_EVENT Regression from commit 3f3bde4f0c72f6f31aae322bcdc20b95eade6631 Author: Chris Wilson Date: Thu May 24 11:58:46 2012 +0100 uxa: Only consider an output valid if the kernel reports it attached When backporting from SNA, a key difference that UXA does not track DPMS state in its enabled flag and that a DPMS off CRTC is still bound to the fb. So we do need to rescan the outputs and check that we have a connector enabled *and* the pipe is running prior to emitting a scanline wait. References: https://bugs.freedesktop.org/show_bug.cgi?id=50668 Signed-off-by: Chris Wilson commit 7c51cabaecac52348766c622e80ed14b9854e54d Author: Chris Wilson Date: Tue Jun 5 12:59:46 2012 +0100 sna: Try to create Y-tiled pixmaps for initial source bo Signed-off-by: Chris Wilson commit a26c05cc8936cab28d83c6beeff906a910353338 Author: Chris Wilson Date: Tue Jun 5 12:48:33 2012 +0100 sna/gen2+: Tweak placement of operations for CPU-bound large pixmaps Try to avoid uncessary migration to the GPU of large pixmaps that are wholly bound to the CPU. Signed-off-by: Chris Wilson commit a21bdbe3e312b40b936c5c68c84f5c1bc0f9fb88 Author: Dave Airlie Date: Tue May 22 15:44:28 2012 +0100 sna: port to compat api This ports SNA to the new compat-api. Signed-off-by: Dave Airlie commit 8f5001493e18b6b3b97ca5f0c923678a51975bd0 Author: Dave Airlie Date: Tue May 22 15:35:01 2012 +0100 intel: port legacy and uxa to new API. This ports the legacy and uxa driver to the new server API. Signed-off-by: Dave Airlie commit c9824827422f8ec4f46c9cba42d871c98dc54761 Author: Dave Airlie Date: Tue Jun 5 10:38:21 2012 +0100 sna: drop using block/wakeup data. These went away in the new server API, and really if this made any measurable difference, I'd be impressed. Signed-off-by: Dave Airlie commit d9850a05003008d86d0b226bcd775aebdd43bccd Author: Dave Airlie Date: Tue Jun 5 10:04:48 2012 +0100 uxa: drop enable disable access hook This looks to be unused. Signed-off-by: Dave Airlie commit 99df720216787c52d16a350dd25469e2dcea2c47 Author: Chris Wilson Date: Tue Jun 5 10:24:34 2012 +0100 sna: Add inline keyword in conjunction with attribute(always_inline) Signed-off-by: Chris Wilson commit 47d7da5a986a9f133cd3dc8314ff243001586a36 Author: Chris Wilson Date: Tue Jun 5 10:18:40 2012 +0100 sna: Maintain the operation on the CPU if not completely replacing all-damaged We may as well continue the operation on the CPU if already bound to try to reduce needless migrations (where the cost of the upload will outweigh further use). Signed-off-by: Chris Wilson commit 81f09347f2ab59cf0a3eaca7be83ded555655e93 Author: Chris Wilson Date: Mon Jun 4 16:45:05 2012 +0100 uxa/i965: Silence static analyser by asserting the bo exists for the video This is already checked at the beginning of PutImageTextured, so this check upon the return value of intel_get_pixmap_bo() should only be required to keep static analysers happy. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 1f43de322b400dcd64eb4545a978ad9b1c7de185 Author: Chris Wilson Date: Mon Jun 4 15:39:39 2012 +0100 sna: Exclude consideration of tiling flags from overwriting BLT commands Signed-off-by: Chris Wilson commit ebb1c9d5f82e8822f7400ff11a887ab047a0d78e Author: Chris Wilson Date: Mon Jun 4 15:28:31 2012 +0100 sna: Make the bo-is-busy DBG more useful by saying which bo it is Signed-off-by: Chris Wilson commit 6dc5ddfe807b307ca10af971c4f84498b2fb82a2 Author: Chris Wilson Date: Mon Jun 4 13:49:35 2012 +0100 sna: Remove bogus check for color == 0 This was written when the RGBA color value was being passed around and not the pointer to the xRenderColor. As such, the NULL deref check doesn't gain much and the check for rgba==0 irrelevant in this scenario. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 9b3937228c692598899fb39bfe448a9b457315db Author: Chris Wilson Date: Mon Jun 4 13:47:58 2012 +0100 sna: Simplify selecting default tiling for framebuffers Signed-off-by: Chris Wilson commit ff91fd4a2749f1ea8722189aaec938e51bce4222 Author: Chris Wilson Date: Mon Jun 4 12:41:05 2012 +0100 uxa: Check for failure from drmModeGetConnector() Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 4712a4008aaff7b3c57a8dd0a5e639992c9b6d30 Author: Chris Wilson Date: Mon Jun 4 12:40:56 2012 +0100 shadow commit 63a55e9db97b647cbf7385403a0f30ee4d24dc3b Author: Chris Wilson Date: Mon Jun 4 12:36:11 2012 +0100 uxa/shadow: Free the buffer along the unexpected failure to attach to the pixmap Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit c9bd4ed7d7d5c9ba6924e911652e03abc9267865 Author: Chris Wilson Date: Mon Jun 4 12:29:58 2012 +0100 legacy/i810: Silence a compiler warning for missing 'const' Signed-off-by: Chris Wilson commit 6f8b411b8a833cca6fce8888ce515db6413d57ca Author: Chris Wilson Date: Mon Jun 4 12:21:27 2012 +0100 uxa: Preferred order for calloc is (count, size) And assert that the allocation succeeds for good measure. A great big dollop of graceful failure is missing... Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 72a29aa74a1488269c2184300e573d060c49e232 Author: Chris Wilson Date: Mon Jun 4 12:21:27 2012 +0100 sna: Check that the buffer was allocated prior to caching it Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 9bff89b1892cee90a80909255876240126b700b2 Author: Chris Wilson Date: Mon Jun 4 12:21:27 2012 +0100 legacy/i810: Be paranoid and guard against xf86GetPciInfoForEntity Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit ed6004f7ad09329bd4097331aaff38edc83107b6 Author: Chris Wilson Date: Mon Jun 4 12:21:27 2012 +0100 uxa: Be paranoid and guard against xf86GetPciInfoForEntity Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit abb8d893742f4ba9567330da9706adda4e636e75 Author: Chris Wilson Date: Mon Jun 4 12:21:27 2012 +0100 sna: Be paranoid and guard against xf86GetPciInfoForEntity Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 782cd6eafa9917a5bdb181d66b7f4c05392950ba Author: Chris Wilson Date: Mon Jun 4 12:20:17 2012 +0100 uxa: check for failure to allocate drmModeCrtc Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit a99bf0125f8f166ff2d65449ecd376c99c3024b8 Author: Chris Wilson Date: Mon Jun 4 12:15:51 2012 +0100 uxa/i965: Drop superfluous 'state' variable Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 15a00ba047fdb7d388a322f2e33894d20787af2f Author: Chris Wilson Date: Mon Jun 4 12:09:52 2012 +0100 sna/gen2: Remove double 'const' So constant, we const'ed it twice. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 99129c369c16d9ff7588a0e59f9285cc339b7eb3 Author: Chris Wilson Date: Mon Jun 4 12:08:11 2012 +0100 sna/gen4+: Use an explicit invalid value for alu Since the static analyser also doesn't like comparing a uint8_t against ~0. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit fae9c054d47203b68a6c09647945d23074ea4df9 Author: Chris Wilson Date: Mon Jun 4 12:04:30 2012 +0100 legacy/i810: Remove unused variable In order to reduce the volumes of output from static analysers. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 880ec2c9a56d3de33c7fbbfa4c043082fbcf7a78 Author: Chris Wilson Date: Mon Jun 4 12:04:30 2012 +0100 legacy/i810: Reorder DRI teardown code to avoid potential NULL derefs Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 7424ea7dd08e304baa4efa09e887b833737ac9f6 Author: Chris Wilson Date: Mon Jun 4 11:59:24 2012 +0100 uxa/dri: Free wait_info along DRI2WaitMSC error paths Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit ebd6dea009479e612c67d78416b8680bb23dba94 Author: Chris Wilson Date: Mon Jun 4 11:56:11 2012 +0100 uxa/dri: Make sure is_glamor_pixmap is always initialised The code paths are too twisty to be sure otherwise. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 33f0b4b96662d953052232b1c0477ced0c326a62 Author: Chris Wilson Date: Mon Jun 4 11:54:28 2012 +0100 legacy/i810: Free offscreen image info struct on failure Impossible with the current code, the server aborts on failure. However, this looks to be the simple answer to keep static analysers quiet. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit d24340747389db971c04349d1ee517f195c2b28e Author: Chris Wilson Date: Mon Jun 4 11:53:26 2012 +0100 sna: Free clip boxes (if allocated) along error path Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 1215abc5c30cc3e183bde59b1523c09b59c484e3 Author: Chris Wilson Date: Mon Jun 4 11:49:15 2012 +0100 sna: Make the ignored return value explicit The return from __kgem_throttle_retire() is just a hint as to whether any forward progress was made. In the case of the error path, though it is a last ditch effort before aborting, so we do not really care whether or not it succeeds, we must try again. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit e230b460515a043a1b7353d153e864754ca5e064 Author: Chris Wilson Date: Mon Jun 4 11:48:23 2012 +0100 ux/i965: create_sampler_state_bo() expects enums, so feed it the right types Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 072d7a8b42f04600c9d8054f3648642a1aaff57a Author: Chris Wilson Date: Mon Jun 4 11:40:01 2012 +0100 sna/debug: Assert the non-existence of the relocation handle at source This should help the static analyzer pinpoint the blame and make it quieter. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 4a3c355e056339aed68b70470556633dea899b1b Author: Chris Wilson Date: Mon Jun 4 11:32:42 2012 +0100 sna: Silence a compiler warning for loss of 'const' qualifier Signed-off-by: Chris Wilson commit 791029cc16bca36b8dec82297ff7e07a972c51ab Author: Chris Wilson Date: Sat Jun 2 13:28:43 2012 +0100 sna/trapezoids: Implement trapezoidal opaque fills inplace Signed-off-by: Chris Wilson commit 1f78a934a423911e18d340f0585e31941f6e8663 Author: Chris Wilson Date: Sat Jun 2 13:27:52 2012 +0100 sna: Clear the counters prior to querying the property Signed-off-by: Chris Wilson commit a1953f1d4abc6e158a5e3ca53d3207548842254c Author: Chris Wilson Date: Sat Jun 2 12:02:55 2012 +0100 sna: Prefer to use memset() for extremely large clears Signed-off-by: Chris Wilson commit ce85cd1a36e31795a966ea8983c2d6f803a4eccd Author: Chris Wilson Date: Sat Jun 2 11:46:06 2012 +0100 sna: Add some DBG to retreiving EDID Signed-off-by: Chris Wilson commit e8eb273bd6153c232a9ffc558e3b7fd4beaab01b Author: Chris Wilson Date: Sat Jun 2 10:43:03 2012 +0100 sna/gen7: Add DBG for ring switching Signed-off-by: Chris Wilson commit 722afa6bc910a2ccfbb0442872a878d1b6b78315 Author: Chris Wilson Date: Sat Jun 2 10:04:02 2012 +0100 sna: Remove some unused members from the KMS state tracking Signed-off-by: Chris Wilson commit 26e7bb3f25f0c83d39ff505fa7e05bfcb976e39c Author: Chris Wilson Date: Sat Jun 2 09:16:51 2012 +0100 sna: Add a DBG message to indicate flushing for GPU idle Signed-off-by: Chris Wilson commit 58fc03b8c36688e9fa7925aa82b83d36c9decb7e Author: Chris Wilson Date: Sat Jun 2 08:53:24 2012 +0100 sna: Prevent NULL deref with early termination and DBG enabled Signed-off-by: Chris Wilson commit 1be2afb81df887ed664ac31d0641da808cfb8888 Author: Chris Wilson Date: Sat Jun 2 08:04:02 2012 +0100 legacy/i810/video: Release memory after creating adaptors Signed-off-by: Chris Wilson commit 261d086265fff6c9b28a67d2fcceed8f107d5cb0 Author: Chris Wilson Date: Fri Jun 1 23:22:31 2012 +0100 legacy/i810/dri: Propagate failure from allocating texture memory Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 2ea12b56d42686f75deb33fc126d09acee7e2899 Author: Chris Wilson Date: Fri Jun 1 23:22:31 2012 +0100 legacy/i810: Fix memset(sizeof(*ptr)) rather than memset(sizeof(ptr)) Clear the entire structure and not the first 4 bytes... Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit d3e15d1460faad192781d74fdc2b5092e9c148ad Author: Chris Wilson Date: Sat Jun 2 08:14:23 2012 +0100 uxa/i965: Make the unhandled allocation failures explicit Add assertions to the point of allocation and write failures. Signed-off-by: Chris Wilson commit 46fbb3d31bf73df4bd0259a146e9929f62a9c488 Author: Chris Wilson Date: Fri Jun 1 23:22:31 2012 +0100 uxa: NameForAtom may return NULL Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 8451d5dd3c992bcfad9f71aa890b6b225884b978 Author: Chris Wilson Date: Fri Jun 1 23:22:31 2012 +0100 uxa: Use unsigned bitfields for single bits Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit d66ca06865973833398560a04186e0067d9cb206 Author: Chris Wilson Date: Fri Jun 1 23:22:31 2012 +0100 uxa: Intialize is_glamor_pixmap It is not clear whether is_glamor_pixmap is always initialized prior to use, so set it to a safe^W likely value. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 25a17b2ca5e3945150151c4308761891c0e20bab Author: Chris Wilson Date: Fri Jun 1 23:22:31 2012 +0100 uxa: Remove 'render_source_is_solid' dead code Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit ba0eb230836fa5f94a2f50da5880fdd3b9dfd72e Author: Chris Wilson Date: Fri Jun 1 23:22:31 2012 +0100 uxa: Fix reallocation of XVAdaptors array Prevent the leak and remove some unsightly code in the process. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit affb1f82c1401bac3f54654a342e3b16b8bd374b Author: Chris Wilson Date: Sat Jun 2 08:27:59 2012 +0100 sna/gradient: Reuse old gradient bo if allocation of new fails Prefer a stall to a crash. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit e51f984a4c15de42c5bee3aeacee553e2dd4eca0 Author: Chris Wilson Date: Sat Jun 2 08:23:35 2012 +0100 sna: Check gradient allocations during init Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 2c5647a18e7856b604bce70270463fc128c2cfcd Author: Chris Wilson Date: Fri Jun 1 23:22:31 2012 +0100 sna: NameForAtom may return NULL Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 7867bff00caeff9e1fbe569ca3d37b94f704a4cd Author: Chris Wilson Date: Fri Jun 1 23:22:31 2012 +0100 sna: Replace invalid signed value with unsigned ~0 for uint8_t Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit ca72b372237287af0f4475801a9b64efca975832 Author: Chris Wilson Date: Fri Jun 1 23:22:31 2012 +0100 sna: Drop return value from 3D point transform And just fixup the computed coordinates in the face of an invalid matrix. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit b83e2a79f2a082630e0d3147abec8d3599f3f4b4 Author: Chris Wilson Date: Fri Jun 1 17:17:49 2012 +0100 uxa: Static analysis warning fixes A smattering of bugs and confusing code. Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 67e8ac365c4b7dd9c4eb2abe46aecc8cc04d4278 Author: Chris Wilson Date: Fri Jun 1 17:20:51 2012 +0100 sna/gen3+: Guard against a kgem_bo_destroy(NULL) Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit e91b27ae14a5366175a4fe9c87ee15a0a25b5a42 Author: Chris Wilson Date: Fri Jun 1 17:12:36 2012 +0100 sna: Fix potential deference of NULL cpu_bo inside assertion Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 048161e69612324d6c077ec487a2a64aaaa7c1f5 Author: Chris Wilson Date: Fri Jun 1 17:09:21 2012 +0100 sna/trapezoids: Check for malloc failure Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 2896aa7b46931d3b95567121ccb07844725ab45c Author: Chris Wilson Date: Fri Jun 1 17:08:01 2012 +0100 sna/io: Free the heap clip boxes on error paths Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 1ef00ff720226c211444806d9fdf67ce2046685b Author: Chris Wilson Date: Fri Jun 1 17:05:55 2012 +0100 sna/dri: Fix typo, check for NULL after allocations to spot failure! Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit dc0fe44bebfdee63bcda4d185b85fe9e1cb16a71 Author: Chris Wilson Date: Fri Jun 1 16:54:41 2012 +0100 sna: Fix a smattering of static analysis warnings Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 8eed569fb386a9af48a8beb28666d72c6678e48c Author: Chris Wilson Date: Fri Jun 1 13:02:50 2012 +0100 sna/trapezoids: Correct extents declaration for fallback Reported-by: Zdenek Kabelac Signed-off-by: Chris Wilson commit 91419576eef562378cccf90968c4f0277139b03d Author: Chris Wilson Date: Fri Jun 1 12:09:19 2012 +0100 sna: Tiny DBG message tweak Signed-off-by: Chris Wilson commit 4bdecc5b07a184ba136129e75a7fef914ac3b8d2 Author: Chris Wilson Date: Fri Jun 1 11:06:04 2012 +0100 test: Add a very basic test to exercise BLT text drawing Signed-off-by: Chris Wilson commit ea0f326d80f21f89c3cff3595a6e1afc42b52efd Author: Chris Wilson Date: Fri Jun 1 09:04:23 2012 +0100 sna: Debug XDrawRectangle Signed-off-by: Chris Wilson commit 6a7efa991a705bdb5a3b9d5300d824a1ce8759af Author: Chris Wilson Date: Fri Jun 1 08:47:20 2012 +0100 test: Exercise basic rectangle drawing code Signed-off-by: Chris Wilson commit bc4323558bebd53e474fbc5404e1c41ab16d02e6 Author: Chris Wilson Date: Thu May 31 21:19:26 2012 +0100 sna: Handle negative values when computing the stipple modulus Signed-off-by: Chris Wilson commit aca994e03e6e0e16f55841418b0061b175e91e5d Author: Chris Wilson Date: Thu May 31 21:17:24 2012 +0100 sna: Fill early break for clip process of spans When on the same Y-band as the span, as soon as the clip boxes are too far to the right, we can stop searching for more intersections. Signed-off-by: Chris Wilson commit 0fe150f898120ba9a00e1e6b9d66bec10d7e8a29 Author: Chris Wilson Date: Thu May 31 20:02:47 2012 +0100 sna: Fix computation of box for clipped stippled rectangles Signed-off-by: Chris Wilson commit a65c3b7b45df46ba993af6755b2460aa80fde930 Author: Chris Wilson Date: Thu May 31 19:15:05 2012 +0100 sna: Add some more DBG for stippled blts Signed-off-by: Chris Wilson commit b2cc64253217a90cf2ade9a8d6f1ed21b23fe875 Author: Chris Wilson Date: Thu May 31 19:45:56 2012 +0100 sna: And combine the two migrate to CPU clauses Just a small tidy up to remove a duplicated predicate. Signed-off-by: Chris Wilson commit bd1dd4cf663ca230724dc6beb329b7eb270ea9d5 Author: Chris Wilson Date: Thu May 31 17:57:56 2012 +0100 sna: If the CPU damage already contains the migration region, we are done Signed-off-by: Chris Wilson commit a2d92ade3911e62f950c85b5650fb13da1279ced Author: Chris Wilson Date: Thu May 31 17:49:01 2012 +0100 sna: Prevent readback of 1x1 if it lies inside CPU damage If the pixel exists only in the CPU damage, attempting to read it back from the GPU only results in garbage. Signed-off-by: Chris Wilson commit a34a06c4ba36b21e386b1f6371a4bd3f03ff35a1 Author: Chris Wilson Date: Thu May 31 20:14:38 2012 +0100 sna/glyphs: Clip the damage to the drawable for unclipped glyphs-to-dst Signed-off-by: Chris Wilson commit dcc7ba8ccf95db1c265bd5492f041f94ce368b7a Author: Chris Wilson Date: Thu May 31 17:48:40 2012 +0100 sna/composite: Add debugging modes to disable acceleration Signed-off-by: Chris Wilson commit 984400b95a879c7c020de14545ac2e1d9e759e05 Author: Chris Wilson Date: Thu May 31 16:56:21 2012 +0100 sna/glyphs: Don't apply drawable offsets twice The offsets from image_from_pict() already include the drawable offset so we need not apply them twice. Signed-off-by: Chris Wilson commit 7bbd445c8cbeb7bcea2c56c4deb9bf6ccf6f2497 Author: Chris Wilson Date: Thu May 31 16:45:03 2012 +0100 sna/trapezoids: Apply the drawable offset for the CPU migration Signed-off-by: Chris Wilson commit c5313620a2f66bc8daf211fc77a9c480a79ea271 Author: Chris Wilson Date: Thu May 31 15:06:16 2012 +0100 sna: Suppress flushes once we have cleared the kernel dirtiness Signed-off-by: Chris Wilson commit 0347c8abec9740d706d87dd2f719ac68f3d1c32e Author: Chris Wilson Date: Thu May 31 13:50:31 2012 +0100 sna/glyphs: Fix upconverting of glyphs via gpu When using the mask instead of the src for adding the glyphs we need to pass the glyph coordinates through the mask coordinates rather than the source. Signed-off-by: Chris Wilson commit 90ae4f853222ee33206134f4efdc4accfb2f2c38 Author: Chris Wilson Date: Thu May 31 14:17:40 2012 +0100 sna: Avoid mixing signed/unsigned int/int16 arithmetric Life becomes unpleasant with sign extension. Signed-off-by: Chris Wilson commit 660c89e9742bac5ce7cbd480e08b4667e37dee8c Author: Chris Wilson Date: Thu May 31 13:18:21 2012 +0100 sna: Use full 16-bit unsigned values for absolute differences Beware the overflow implicit in: adx = x2 >= x1 ? x2 - x1 : x1 - x2; when both x2 and x1 may be large signed 16-bit values Reported-by: Zdenek Kabelac Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50532 Signed-off-by: Chris Wilson commit 035c2953751f58225bd6b1fcb4c1275ccb5526cb Author: Chris Wilson Date: Thu May 31 09:29:40 2012 +0100 sna/glyphs: use add(WHITE, glyph, mask) for channel expansion If the glyph format does not match the mask format we can not simply add the two together, but must first perform a channel expansion (or contraction) by multiplying the glyph against a WHITE source. Normally the glyph and the mask are equivalent formats and so we hit the fast path. Signed-off-by: Chris Wilson commit cf5b3e2ebf4ee0330f5421b9377bb512a94ec284 Author: Chris Wilson Date: Wed May 30 14:44:59 2012 +0100 sna: Don't attempt to flush scanout if unattached This was lost in the midst of the OSTimer overhaul. Reported-by: Zdenek Kabelac References: https://bugs.freedesktop.org/show_bug.cgi?id=50393 Signed-off-by: Chris Wilson commit 3a64ba0895035f6567e9a15357396b06c0f2d6dd Author: Chris Wilson Date: Wed May 30 13:51:07 2012 +0100 sna: Convert remaining drmCommands to drmIoctl This helps to silence valgrind Signed-off-by: Chris Wilson commit 47e2db0ba8ae3fbcdf58cba26c58ec0932b4c90b Author: Chris Wilson Date: Wed May 30 10:37:22 2012 +0100 sna: Replace FREELIKE_BLOCK with MAKE_MEM_NOACCESS And similarly for MALLOCLIKE_BLOCK. The issue being that valgrind may overwrite such blocks with alloc-fill and free-fill values, but when in fact they are defined and still in use by the GPU. This can lead to the GPU processing garbage, and GPU hangs. Reported-by: Zdenek Kabelac Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50393 Signed-off-by: Chris Wilson commit 08a630dc5ef87e551865e558fe4fc45ea66457b4 Author: Chris Wilson Date: Wed May 30 08:50:44 2012 +0100 sna: Ensure we flush scanout even when otherwise idle. Reported-by: Zdenek Kabelac References: https://bugs.freedesktop.org/show_bug.cgi?id=50477 Signed-off-by: Chris Wilson commit 10ca765ad346931087be146f3e6d1f4069c95f26 Author: Chris Wilson Date: Wed May 30 08:32:34 2012 +0100 Mark a few more options as being UXA specific Signed-off-by: Chris Wilson commit 740368c4c6eb547adad247ff529d16e594d6459b Author: Nick Bowler Date: Mon May 28 18:28:28 2012 -0400 Include config.h in intel_options.c Commit 8a9a585341e2 ("Only create a single instance of the intel_options array") moved the definition of intel_options into a separate .c file. Several of the defined options are #ifdef'd based on the configuration, but since config.h is never included, the macros being tested are never defined. Therefore, none of the configuration-specific options will ever be available at runtime, even if they should be. Add an inclusion of config.h so that such configuration-specific options work again. Signed-off-by: Nick Bowler Signed-off-by: Chris Wilson commit e1b720c40cf511b4ed6d387891d715522d0d54b6 Author: Chris Wilson Date: Wed May 30 07:47:53 2012 +0100 sna/sprite: Restore another xf86drm.h Signed-off-by: Chris Wilson commit e986b06162abf286b3f8f97b791fd66dcf8f9aec Author: Chris Wilson Date: Tue May 29 22:21:05 2012 +0100 sna/overlay: Handle return from GETPARAM query correctly drmIoctl() returns 0 on success, not a positive value. Signed-off-by: Chris Wilson commit 68874e2d694cc68f5f051ba5fe4a79a71fdb2dbc Author: Chris Wilson Date: Tue May 29 21:28:39 2012 +0100 sna: Fix chunking for large stipples Reported-and-tested-by: Matti Hamalainen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49510 Signed-off-by: Chris Wilson commit 12af82581118470f59817f626d61df655950e243 Author: Chris Wilson Date: Tue May 29 21:45:32 2012 +0100 sna/overlay: Replace drmCommand with direct invocations of drmIoctl Signed-off-by: Chris Wilson commit 3a1b6e57fbbbb4c8e5ac9588537840f4ec176ae6 Author: Chris Wilson Date: Tue May 29 21:37:16 2012 +0100 sna/overlay: Restore one xf86drm.h include This was removed in haste, when it is required for drmIoctl and friends. Signed-off-by: Chris Wilson commit 264d1b1e1fb368f7845a8112bfa2ad2224acabd9 Author: Chris Wilson Date: Tue May 29 13:03:56 2012 +0100 sna: Also check for a free exec slot for the upload buffers As we check before allocating the upload buffer, we can not be certain that we will allocate an already attached bo or that we have a free exec slot. So always check that we have an extra exec slot available - the false positive rate is going to be negligible. Reported-by: Zdenek Kabelac Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50457 Signed-off-by: Chris Wilson commit c7bcca9a3fb6c669d8b093e6399914693770b0b3 Author: Chris Wilson Date: Tue May 29 12:49:12 2012 +0100 sna: Make finding DPMS property valgrind clean Signed-off-by: Chris Wilson commit 3c074797094dc7675bb6ae549630fdf061ab5258 Author: Chris Wilson Date: Tue May 29 12:45:20 2012 +0100 sna: Make GetEDID valgrind clean. Signed-off-by: Chris Wilson commit 560e50c0a5afa0824086557581ca6aa5696b44a2 Author: Chris Wilson Date: Tue May 29 12:36:31 2012 +0100 sna: Make GetEncoder() valgrind clean Signed-off-by: Chris Wilson commit b4b6fa795201379694a03d537064dbca446cfdfd Author: Chris Wilson Date: Tue May 29 11:32:28 2012 +0100 sna: Trim the set of includes Signed-off-by: Chris Wilson commit 9d1a9e666763a3e1270c8f000b1b37a6b926441f Author: Chris Wilson Date: Mon May 28 20:06:35 2012 +0100 sna: Bump experimental ioctl number for vmap Gazumped! Signed-off-by: Chris Wilson commit 55e6f5f220401318529e81f7c96fe0af3b893a0c Author: Chris Wilson Date: Mon May 28 16:21:09 2012 +0100 sna: Use the local function for turning the cursor off prior to release Signed-off-by: Chris Wilson commit 77dd429222922aa1ba7f283553e11e60e4d5c496 Author: Chris Wilson Date: Mon May 28 14:40:23 2012 +0100 sna/dri: Make WAIT_VBLANK valgrind clean Signed-off-by: Chris Wilson commit 8ebe84818ab70e662a9bb3f232b4664ff40ac375 Author: Chris Wilson Date: Mon May 28 14:27:46 2012 +0100 sna: Make sna_copy_fbcon() valgrind clean Signed-off-by: Chris Wilson commit f37dae734ebac5c0ed2d6f50fc92bc107f4e4a33 Author: Chris Wilson Date: Mon May 28 14:20:54 2012 +0100 sna: Just use the CRTC id from the array Signed-off-by: Chris Wilson commit b1f24a0eae4bb0081ff7469a2aee63a1f32140f7 Author: Chris Wilson Date: Mon May 28 14:16:03 2012 +0100 sna: Make sna_crtc_apply() valgrind clean Signed-off-by: Chris Wilson commit 0ebfcdbb80245f98c0c7ef9f090a2be6900fb457 Author: Chris Wilson Date: Mon May 28 14:10:04 2012 +0100 sna: Make AddFB valgrind clean Signed-off-by: Chris Wilson commit 32ca3c7b65516b0bd48b0d0979b086ee1580167a Author: Chris Wilson Date: Mon May 28 14:02:11 2012 +0100 sna: Make sna_crtc_is_bound() valgrind clean Signed-off-by: Chris Wilson commit 7973f6751c9bf565dee4c89aa3e1badbcc45018f Author: Chris Wilson Date: Mon May 28 14:00:55 2012 +0100 sna: Add a little bit more verbosity to cursor routines for valgrind Signed-off-by: Chris Wilson commit 19c463e52df919fc75de7e420fd3565f0e9a0576 Author: Chris Wilson Date: Mon May 28 12:54:35 2012 +0100 sna: Only wait if there is a suitable active buffer There is not point repeating the search after retiring if we know that there is no outstanding suitable active buffer. Signed-off-by: Chris Wilson commit 5b99c7cd340f782d3057d4257865c5feb96b71f0 Author: Chris Wilson Date: Mon May 28 10:55:49 2012 +0100 uxa/dri: Enable vblank scheduling even with pageflipping disabled Signed-off-by: Chris Wilson commit 810357ad65d551ec5d35dbf228f1b62fe235801f Author: Chris Wilson Date: Mon May 28 10:12:38 2012 +0100 uxa/dri: Fix ordering of setting vs using swap members Trivial readibility fix, as the actual ordering is serialised through there being only a single thread. Signed-off-by: Chris Wilson commit 2b56a188ef2c48f82572eca2201a3a0ecf6b4f45 Author: Chris Wilson Date: Mon May 28 10:01:09 2012 +0100 Mark another couple of options as being UXA only. Signed-off-by: Chris Wilson commit b025f1a604dbbbd456a23f330ceed5f97ecdffcf Author: Chris Wilson Date: Mon May 28 09:48:49 2012 +0100 sna/dri: Tweak vblank_mode=n swapbuffers to account for throttle delay Signed-off-by: Chris Wilson commit 45148a714f1461fff898aeb393ad225f081b9bd5 Author: Chris Wilson Date: Mon May 28 09:39:51 2012 +0100 sna/dri: Enable handling for Option "SwapBuffersWait" Signed-off-by: Chris Wilson commit c709f2447dfc6dc36c50ff741d5d9bbdc7c03b58 Author: Chris Wilson Date: Mon May 28 08:17:21 2012 +0100 sna/dri: Requeue vblank throttling until the vsync'ed copy completes If the GPU is busy, then we may not actually schedule our copy for several vblanks, resulting in us falsely reporting that the work completed too early and allowing the client to continue scheduling more work and racing ahead of the queued copies. Signed-off-by: Chris Wilson commit 7e73fa02ed361a9c0c08f61d00421671bf10ce9f Author: Chris Wilson Date: Mon May 28 08:16:43 2012 +0100 sna: Add some debugging to show count of outstanding requests during retire Signed-off-by: Chris Wilson commit 62b557065edc0555f2bf83b0eed9169329a2f2ba Author: Chris Wilson Date: Sun May 27 16:52:51 2012 +0100 sna: Use magic upload buffers for video textures So that we may benefit from the caching of buffers and the automatic selection of the preferred upload method. Signed-off-by: Chris Wilson commit 35291d2db813f75fedcdca9920a40592acd3cca3 Author: Chris Wilson Date: Sun May 27 16:54:29 2012 +0100 sna: Search the inactive bo cache for a mappable upload buffer See if we have a bo that we can cheaply map to an inplace upload, rather than rely on an existing GTT map. Signed-off-by: Chris Wilson commit 36d53ff52b055b2b5fc03aff7b2cab83037d9f42 Author: Chris Wilson Date: Sun May 27 16:46:42 2012 +0100 sna: Validate all CRTCs after updating one Updating one CRTC may cause the kernel to turn off another, so be paranoid and run the check in a loop after applying the CRTC set. Signed-off-by: Chris Wilson commit 7fdd8bd6d2ba7bf113d4109e6bb6f750f909565f Author: Johannes Obermayr Date: Sat May 26 23:52:28 2012 +0200 glamor: Fix misspelled xf86GetOptValString and OPTION_ACCEL_METHOD introduced by commit e456291. Signed-off-by: Chris Wilson commit 8ea4ba081de0206351394481f54dcbe6922a085b Author: Chris Wilson Date: Sat May 26 21:48:16 2012 +0100 sna: Fix typo for debug compilation s/ctrc/crtc/ Signed-off-by: Chris Wilson commit 317bf05196086eb5dedb6436c07f253f01c9bf63 Author: Chris Wilson Date: Fri May 25 14:34:16 2012 +0100 sna: Perform the selftest after probing We do no want to slow down the detection phase by performing our self-tests, so only running those before initialising the driver. Signed-off-by: Chris Wilson commit a5fe863e3f1a6750edaffb518c4e768e9bc11521 Author: Chris Wilson Date: Fri May 25 14:28:56 2012 +0100 sna: Check the bus type before declaring probe success This should never fail, but still better to fail during detection rather than pretend it works. Signed-off-by: Chris Wilson commit 4094826aee76ef24dad13bc5a8a723bfe4a69162 Author: Chris Wilson Date: Fri May 25 08:55:13 2012 +0100 sna: Trust the crtc-is-bound determination after modeset and hotplug As these should be the only time that they change and we now have the checks in place, we can drop the workaround of doing the check just before emitting the wait. Signed-off-by: Chris Wilson commit 8a9a585341e2dd43c649204fcf6d92a867671ba3 Author: Chris Wilson Date: Fri May 25 08:50:33 2012 +0100 Only create a single instance of the intel_options array Signed-off-by: Chris Wilson commit e45629135065d0cc73c285f8df35ab4e1d07c6dc Author: Chris Wilson Date: Thu May 24 18:22:45 2012 +0100 Allow runtime switching of AccelMethod between uxa/sna and even glamor Section "Device" Option "AccelMethod" "uxa/glamor/sna" EndSection The appropriate backend must also be enabled at compile time for the runtime option to be available (i.e. --enable-uxa (default) --enable-sna --enable-glamor) Demanded-by: Adam Jackson Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50290 Signed-off-by: Chris Wilson commit df6ab02c3690eea8393ecc8c113e2f2891856cc6 Author: Eugeni Dodonov Date: Mon Oct 31 14:43:22 2011 -0200 Unify options handling between UXA and SNA Unifies available options for both UXA and SNA drivers, and moves them into a common header file, intel_opts.h. Signed-off-by: Eugeni Dodonov commit ae2be7e25bda46551381c19a673b321b4382e1f9 Author: Chris Wilson Date: Thu May 24 16:33:27 2012 +0100 sna/trapezoids: Correct rounding for downsampling onto sample grid Reported-by: S. Christian Collins Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49446 Signed-off-by: Chris Wilson commit 0ab226e27e7920bdb9f7eb62c5174cd097ac7f7f Author: Chris Wilson Date: Thu May 24 12:51:46 2012 +0100 sna: Query CRTC states following a hotplug event Signed-off-by: Chris Wilson commit 3f3bde4f0c72f6f31aae322bcdc20b95eade6631 Author: Chris Wilson Date: Thu May 24 11:58:46 2012 +0100 uxa: Only consider an output valid if the kernel reports it attached Reported-by: Kyle Hill Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=50078 Signed-off-by: Chris Wilson commit 11db66fedf96f158cbbac8011a8ba0b29a20ba3a Author: Chris Wilson Date: Thu May 24 11:07:19 2012 +0100 sna: Add some more DBG tracepoints around modesetting Signed-off-by: Chris Wilson commit fb9da4cb9e12ca733c31879b8b37906f361a8c35 Author: Chris Wilson Date: Wed May 23 13:53:37 2012 +0100 sna: Only mark an unattached output as inactive So that a latter attempt to set the DesiredMode may succeed and we do not modify the configuration without notifying clients. Signed-off-by: Chris Wilson commit 5ae032e22b127c7c95753197e0914a8028a3b22e Author: Chris Wilson Date: Wed May 23 13:27:07 2012 +0100 sna: Suppress modesetting errors on return from VT switch If we presume that userspace will set the correct mode shortly afterwards, we can ignore the failure of the automatic restore. Signed-off-by: Chris Wilson commit 34882a979d9817d33bd6a8ae73a9f7083556578c Author: Chris Wilson Date: Wed May 23 10:27:44 2012 +0100 sna: Keep checking retirement for flushing list Even after all outstanding requests have been completed we may still have buffers on the flushing list that need to become idle. Once such consequence would be to prevent the vblank flush from going idle, causing spurious wakeups every vrefresh when otherwise idle. References: https://bugs.freedesktop.org/show_bug.cgi?id=50078 Signed-off-by: Chris Wilson commit 54fde5bf05d43f26e7f1893584af736a138d245f Author: Dave Airlie Date: Wed May 16 15:34:08 2012 +0100 intel: convert sna/uxa to using new glyph picture accessors. The compat-api.h takes care of old/new servers. Signed-off-by: Dave Airlie commit 43a34186d13d29c671431832469ca5301751b3cf Author: Dave Airlie Date: Wed May 16 15:26:55 2012 +0100 intel: convert to new screen conversion APIs The compat header takes care of the old server vs new server. this commit was autogenerated from util/modular/x-driver-screen-scrn-conv.sh Signed-off-by: Dave Airlie commit 9aabc04d76fa976abb4a74f4e9676c7556e88df3 Author: Dave Airlie Date: Wed May 16 15:14:32 2012 +0100 intel: add compat header file for conversion fns Signed-off-by: Dave Airlie commit c9ce6ae8a6fc7b1a91aef1e59640c39024d0426d Author: Dave Airlie Date: Wed May 23 08:33:20 2012 +0100 legacy/i810: rename pScreen->screen For consistency before moving to new APIs. This just changes the files where the API changes will touch. Signed-off-by: Dave Airlie commit 70ee0f84f5b9c6c13a0338f8b2757e587c849c14 Author: Dave Airlie Date: Wed May 23 08:31:52 2012 +0100 legacy/i810: rename pScrn->scrn This is need to make the compat api stuff easier to implement. Signed-off-by: Dave Airlie commit 3410db008c6c20dc6590a89c05b40a0c6de6744a Author: Chris Wilson Date: Tue May 22 15:54:52 2012 +0100 sna/dri: Avoid confusion of attempting to exchange pixmaps for DPMS-off flips Not only do we confuse ourselves, but we end up confusing the damage tracking on the root window whenever we update the Screen Pixmap. So for the time being, don't. Signed-off-by: Chris Wilson commit 28c4fb0b70e098972af972d30a660d167a8973ad Author: Chris Wilson Date: Tue May 22 09:49:53 2012 +0100 sna: Swallow disconnection event upon mode restoration So that we can VT switch back to X even though the output configuration has now changed. Signed-off-by: Chris Wilson commit b17c44c8d234cb2c651e88c7892bcd5b33139c1c Author: Chris Wilson Date: Tue May 22 09:43:51 2012 +0100 sna: Remove incorrect assertion for mode restoration Signed-off-by: Chris Wilson commit 49b7742999ee11b0c36754ea10bc5609ebe8c609 Author: Chris Wilson Date: Tue May 22 09:40:25 2012 +0100 sna: Force config restoration after VT switch Signed-off-by: Chris Wilson commit 952e3dcba3a651d22d44dbb039ad97e111d9bc63 Author: Chris Wilson Date: Mon May 21 19:48:52 2012 +0100 sna: Only override active on DPMSModeOff Along the enable path we then only want to change the value if we actually call sna_crtc_apply. Signed-off-by: Chris Wilson commit afdaf184594bfe3633305969eb1166c28e1006bf Author: Chris Wilson Date: Mon May 21 14:32:39 2012 +0100 sna: Add a log message for the change of CRTC mode Signed-off-by: Chris Wilson commit 9fb18462ec1428a486f998585e7b4caf4dd08f53 Author: Chris Wilson Date: Mon May 21 14:12:23 2012 +0100 sna: Confirm that the modeset takes If we attempt to change to a mode with a disabled connector the kernel will silently switch off that connector (and crtc) and report that the modeswitch is successful. Reported-by: Kyle Hill References: https://bugs.freedesktop.org/show_bug.cgi?id=50078 Signed-off-by: Chris Wilson commit cd3b48854403ee63723ef570c1a7f9f8447e7105 Author: Chris Wilson Date: Sat May 19 12:56:45 2012 +0100 sna/gen7: Trim a dead assignment Signed-off-by: Chris Wilson commit cf79cd3e27b7077f67f202b16ed39eb1cc70ac65 Author: Chris Wilson Date: Sat May 19 12:44:11 2012 +0100 sna: Emit a new batch if we need to clip after PolyText without space Signed-off-by: Chris Wilson commit f91dcc44dcc15850f82666b1bcdd27182400e7dc Author: Chris Wilson Date: Fri May 18 20:09:41 2012 +0100 sna: Give the proxy a unique name So that if we cache the current destination bo (for example, gen3) then a new proxy (or even just a new batchbuffer) will indeed cause the destination buffer to be updated. Reported-and-tested-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48636 Signed-off-by: Chris Wilson commit ee073d613bba38f90951405d5ecddfcf3ac5e043 Author: Chris Wilson Date: Fri May 18 15:19:00 2012 +0100 sna/traps: Fix processing of full-steps A missing factor of Y-height caused the computation of coverage for the spans to be completely wrong. This affects the vertical segments of rounded rectangles, for instance. Signed-off-by: Chris Wilson commit 8ba800c63906fb29d34f40b9437092a665bffb14 Author: Chris Wilson Date: Thu May 17 22:46:18 2012 +0100 sna: Don't consider uploading inplace if the dst bo is unmappable Handle (and take advantage of) the fallback at the high level rather than masquerading an inplace write. Signed-off-by: Chris Wilson commit dad24721a13ce3a357e8ddae3c2dea61045f6fc2 Author: Chris Wilson Date: Thu May 17 21:44:22 2012 +0100 Revert "sna: Always try to operate inplace if we an LLC gpu bo" This reverts commit 10b4a9bb5f46ab9d9c8b165084ce4174b54a8d39 as it causes a regression for pixel data uploads to active buffers. commit 681c6e72412fff96b203a09be6ac8d393f3489a5 Author: Chris Wilson Date: Thu May 17 19:43:02 2012 +0100 sna: Track flushing status of live bo Currently we only move a bo with an outstanding kernel flush onto the flushing list if it is no longer in use. This leaves us potentially stalling on a flush if we try then to write to the object believing it to be retired and idle. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit d99502a33d5bdbad010b7a036c1aee989fe29947 Author: Chris Wilson Date: Thu May 17 17:56:43 2012 +0100 sna/glyphs: Pass the extents to the backend for preparing to composite glyphs This information should not be required, but it might come in handy, so pass it along. Signed-off-by: Chris Wilson commit fb21c2df1a10d66f115a5978b0db508058fdc412 Author: Chris Wilson Date: Thu May 17 16:30:31 2012 +0100 sna/io: Assert that we do not replace a bo->flush object These should be pinned by the higher layers and so we should never be attempting to replace them. If we do replace a bo->flush, then we will end up miscounting outstanding flush bo. Signed-off-by: Chris Wilson commit 596c0a68709a93bb376647c1b566e9df4f23b35d Author: Chris Wilson Date: Tue May 15 18:53:39 2012 +0100 sna: Assign GCops after checking for fallback to pass sanity checks We assert that prior to installing the fallback GCops the current ops are the default set. This is broken if we point GCops to our GPU ops, but then fallback. So check for the fallback first. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 3c9759ef2ad755bbe720d4aa031ec67dbc3b7734 Author: Chris Wilson Date: Mon May 14 14:12:06 2012 +0100 sna/gen3: Fix pre-multiplication of opacity masks The return type for the multipliation was only 8-bits wide dating back to the time when the function just computed a single channel and didn't try to blend the output back into the argb pixel value. Inlining the shift into the function means that we need the output to be 32-bits wide instead. Reported-by: Jiri Slaby Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49887 Signed-off-by: Chris Wilson commit 053bd5bf2425aed44e1c2bb981d98ee5171211a0 Author: Chris Wilson Date: Mon May 14 12:08:09 2012 +0100 sna: Use the correct storage for box_from_seg Fixes regression from 3aa98289e3a2 with clipped segments. As we clipped the empty box rather than the segment, we never drew any outlines. Signed-off-by: Chris Wilson commit b654b8794db7b00666ce5c59535a9302932c483b Author: Chris Wilson Date: Mon May 14 11:36:15 2012 +0100 sna/trapezoids: Fix picture creation for fallback trapezoids Being a little lax in not updating the format after upconversion to PICT_a8, meant we were trying to composite with a depth 1, 8 bpp a8 image and thoroughly confusing everybody when creating the upload trapezoid mask. Signed-off-by: Chris Wilson commit 80567f61afe77a003e663b17c1fc6b6c3ed04042 Author: Chris Wilson Date: Mon May 14 10:40:38 2012 +0100 sna/trapezoids: Do not reduce SRC to a clear pixmap to unbounded As we instruct the migration code to drop the clear when copying from the GPU to the CPU, we then need to emit the zeros during the span writing. Fixes some occassional corruption behind complex clip masks. Signed-off-by: Chris Wilson commit 067e9375809ea6cfa0c0b5e2159b359535c3b362 Author: Chris Wilson Date: Mon May 14 10:00:00 2012 +0100 sna: Trim unused partial buffer uploads Signed-off-by: Chris Wilson commit effb0b9ec579624e38f0007cd7096e7da04048ca Author: Chris Wilson Date: Sun May 13 19:29:44 2012 +0100 sna: Tweak usage of kgem_bo_can_map vs kgem_bo_mapped More often than not we only want to consider whether we can map the bo and decide whether doing so is the better option. Whether the bo is already mapped is not such an issue any more with the throttling. Signed-off-by: Chris Wilson commit 37aa1e1291127ff4d27407fac936af64d0e353a8 Author: Chris Wilson Date: Sun May 13 16:59:30 2012 +0100 sna: Simplify partial buffer tracking As we only want to track partial buffers with asynchronous reuse, exclude all overs from the active buffers list. Secondly, keep the list in most-recently-used order rather than by size. Signed-off-by: Chris Wilson commit 7048a71fb6ff5e7c37e21a794f7b42d9a1da3473 Author: Chris Wilson Date: Sun May 13 15:42:28 2012 +0100 sna: Flush batch if GPU is idle upon wakeup Signed-off-by: Chris Wilson commit 12e340c4b8efa70f3305f489af30461b7c0e5edd Author: Chris Wilson Date: Sun May 13 11:01:35 2012 +0100 sna: Optimise kgem_clear_dirty() by keeping dirty buffers at the front Signed-off-by: Chris Wilson commit b0dfd8223adee87e28b391a019effa7bb3630533 Author: Chris Wilson Date: Sun May 13 08:33:23 2012 +0100 sna: Flush the batch before blocking if the GPU is idle If we have work pending for the GPU and we believe it is idle, just submit the batch in order to improve GPU/CPU concurrency and reduce latency. Signed-off-by: Chris Wilson commit 6924fc525d6bc82901cfed769c176b44c0bce024 Author: Chris Wilson Date: Fri May 11 14:04:09 2012 +0100 sna: Fix off-by-one in computation of width for inplace trapezoids This lead to the dropping of the last pixel for small area trapezoids, such as the right hand outline of buttons under ClearLooks. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48320 Signed-off-by: Chris Wilson commit a58a543e84ed15c41f4fa7644be3ba7865d31b92 Author: Chris Wilson Date: Thu May 10 12:59:55 2012 +0100 sna: handle vmap creation failures gracefully Signed-off-by: Chris Wilson commit 9af651fdf93f6ccdbcb147cb16989f84c2d0ebdc Author: Chris Wilson Date: Thu May 10 10:57:56 2012 +0100 sna: Include some DBG for segment drawing Signed-off-by: Chris Wilson commit 3aa98289e3a2f59633ac5f1a5f64db4ee55609d9 Author: Chris Wilson Date: Thu May 10 10:31:03 2012 +0100 sna: Correct adjustment of LineCap for rectilinear segments Signed-off-by: Chris Wilson commit ad69316ab1054c5e4b56c19b8eec87b9f86939e5 Author: Chris Wilson Date: Thu May 10 10:03:49 2012 +0100 sna: Include a small amount of timer-slack to avoid very short sleeps Signed-off-by: Chris Wilson commit 29d1d409b259ba0c85947ef5eef903ea527aa118 Author: Chris Wilson Date: Thu May 10 09:54:53 2012 +0100 sna: Avoid doubling the final step of poly lines Signed-off-by: Chris Wilson commit a83d90ee61be44a2a36b56ad24bbc6544320448f Author: Chris Wilson Date: Wed May 9 20:34:52 2012 +0100 sna: Avoid randomly changing domains of active bo After attaching the bo to the scanout, mark it as retired in order to update its domains so that the assertion during retirement later is correct. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49526 Signed-off-by: Chris Wilson commit d5200510b8f2a0ccb2e0c45dfebc659f8360780c Author: Chris Wilson Date: Wed May 9 17:58:58 2012 +0100 sna: Respect the error terms when reversing the PolyLine DDA Signed-off-by: Chris Wilson commit a3d37fb29f8dffb0e370ad95783994aaa7eccfaf Author: Chris Wilson Date: Tue May 8 15:47:14 2012 +0100 sna: Force remapping for IO transfer Should fix regression from fcccc5528 (sna: Improve handling of inplace IO for large transfers) whereby it was aborting the transfer it we need to remap the buffer for the upload. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49546 Signed-off-by: Chris Wilson commit 2a9a93e4484e0c616724610f4c8019fcbaa7ad53 Author: Chris Wilson Date: Tue May 8 15:12:51 2012 +0100 sna: Only avoid ring switching for indirect uploads Signed-off-by: Chris Wilson commit 613902b60e0f2ca2a916e68306a1a37bc236d00d Author: Chris Wilson Date: Tue May 8 14:17:46 2012 +0100 sna: Fix off-by-one in checking available execbuffer slots Signed-off-by: Chris Wilson commit 663e387b35c314c4c2bee8137d6b70d27fa9f729 Author: Chris Wilson Date: Tue May 8 11:45:34 2012 +0100 sna: Only submit a batch to the scanout if it is not already busy Signed-off-by: Chris Wilson commit cd7a56b7313233190a4c4a735d4a141e99c9b688 Author: Chris Wilson Date: Tue May 8 08:53:41 2012 +0100 sna: Throttle independently of scanout updates As we are now throttling to relieve GTT pressure, it is a benefit to consistently throttle before blocking. Signed-off-by: Chris Wilson commit 2372176f73b7c945f56b7673eab5eccb86366416 Author: Chris Wilson Date: Mon May 7 12:57:35 2012 +0100 sna: Throttle execution when searching for inactive buffers If we have some active buffers that we may reuse and old outstanding requests, throttling before retiring should prevent the CPU from running away from the GPU and hogging the entire GTT and RAM. Signed-off-by: Chris Wilson commit 4df228749729dd540b639368400fa20118cdf412 Author: Chris Wilson Date: Mon May 7 10:42:30 2012 +0100 sna: Rate-limit and shrink bo usage if we hit system resource limits Signed-off-by: Chris Wilson commit ca4d2296e6e42e837627756790b262cae0fd3b6c Author: Chris Wilson Date: Mon May 7 10:23:19 2012 +0100 sna: Expand batch buffers As batch buffers are compacted to fit into the smallest bo, the only cost is the larger static array allocation (and presumably cache misses). Signed-off-by: Chris Wilson commit 9281b80644ce76ad9e0f3f8f812cbae97c10814a Author: Chris Wilson Date: Mon May 7 23:25:22 2012 +0100 sna/gen[345]: Clear used vertices when discarding unmappable vbo Signed-off-by: Chris Wilson commit a6ee376e93517659391905e6c9018b3bb735135d Author: Chris Wilson Date: Mon May 7 10:24:21 2012 +0100 sna: Use the correct invocation of kgem_bo_destroy() for sanity-checks Signed-off-by: Chris Wilson commit c89c7e9a04314e40cee5514a182a8364c4f99374 Author: Chris Wilson Date: Mon May 7 11:54:50 2012 +0100 sna: Update select timeout when installing a timer in the block handler The block handler is run after the timers are queried for their expiration and so if we install a timer in the block hander, we must set the timeout ourselves. Signed-off-by: Chris Wilson commit 4ba366ead3a133136554579fe9a604da1fc1da68 Author: Chris Wilson Date: Mon May 7 08:55:35 2012 +0100 sna: Manually execute the timer as TimerForce does not run an inactive timer Signed-off-by: Chris Wilson commit 2c801c45dbad58d18f2673e17723825dda0c4e55 Author: Chris Wilson Date: Sun May 6 17:23:11 2012 +0100 sna: Replace timerfd with OsTimer As timerfd is linux-specific, and OsTimer an OS-agnostic abraction, replace the former with the later. Arguably this has slightly better performance characteristics in select-bound loops. Signed-off-by: Chris Wilson commit 74d2707de4a0f94d2143f1e9c60762e4167b1ea6 Author: Chris Wilson Date: Sun May 6 21:51:27 2012 +0100 sna: Remove short-circuiting for large font fallbacks Unlike the fallback for an unhandled depth, we need to ensure that the pixmaps are mapped to the CPU before calling the fb routines. Reported-by: Toralf Förster Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49558 Signed-off-by: Chris Wilson commit c5b6741d3729c6867702ab64a6c59cb8052c0ef3 Author: Chris Wilson Date: Sun May 6 12:40:54 2012 +0100 sna/gen2+: Fix typo for computing redirected extents for render copy Signed-off-by: Chris Wilson commit 771090f25db702d25ebbd3f2b44429cf0acfe8fd Author: Chris Wilson Date: Fri May 4 20:56:37 2012 +0100 sna: Add a pair of asserts to track down a NULL pointer dereference Looks like the assumption for the location of the data is invalid, allocation failure, perhaps? References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit d376a960df7a081a5d449f77b81ae13223b98929 Author: Chris Wilson Date: Fri May 4 10:09:46 2012 +0100 sna/dri: Only track a single pending flip across all pipes Signed-off-by: Chris Wilson commit 450592f989efd0d3bc9ef2de245fce0a180e91a2 Author: Chris Wilson Date: Fri May 4 09:50:19 2012 +0100 sna: Cache the framebuffer id Also fixup a weakness of only tracking scanout with a single bit, as we used to clear it forcibly after every flip. Signed-off-by: Chris Wilson commit 29d035279b2fe98d5ba9cf01125faea34d36fb76 Author: Chris Wilson Date: Fri May 4 09:11:31 2012 +0100 sna/dri: pageflip unref debugging Signed-off-by: Chris Wilson commit 079b491ced2c9c3c73d938ef6025d040016ad3a7 Author: Chris Wilson Date: Thu May 3 23:52:17 2012 +0100 sna: Ensure drawables are clipped against the pixmap before migration Signed-off-by: Chris Wilson commit 1a5f8599b150064339d62a97c58026e62b49ff27 Author: Chris Wilson Date: Thu May 3 23:21:48 2012 +0100 sna: Compile fix for fresh assertion Signed-off-by: Chris Wilson commit 61cac5c265279d45677262216a0ba56f548cd898 Author: Chris Wilson Date: Thu May 3 22:33:59 2012 +0100 sna: Maintain a reference to the chain of proxies Rather than attempt to flatten the chain to the last link, we may need to hold a reference to the intermediate links in case of batch buffer submission. Fixes http://tnsp.org/~ccr/intel-gfx/test.html Reported-by: Matti Hamalainen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=49436 Signed-off-by: Chris Wilson commit dea5d429f7a52dfc945b17a57ef79744cc796b0e Author: Chris Wilson Date: Thu May 3 17:35:24 2012 +0100 sna: Remove extraneous SCANOUT flags These are now fixed by obeying a minimum alignment restriction. Signed-off-by: Chris Wilson commit 19fd24a4db994bb5c5ce4a73f06d9394a758ea91 Author: Chris Wilson Date: Thu May 3 17:35:10 2012 +0100 sna: Fix offset for combining damage Signed-off-by: Chris Wilson commit 1376c81dbf3b789e04e6804df1b1fd32bcb2bd1d Author: Chris Wilson Date: Thu May 3 17:34:28 2012 +0100 sna: Debug option to force particular upload/download paths Signed-off-by: Chris Wilson commit f0d464d6b18855616fc43d9a25aa6853f86c8e2b Author: Chris Wilson Date: Thu May 3 16:17:35 2012 +0100 sna/dri: Balance flush counting Signed-off-by: Chris Wilson commit d47e98dd64c0b9fe2979db42622c5ee8168e8b35 Author: Chris Wilson Date: Thu May 3 14:54:17 2012 +0100 sna: Minor glyph fallback fixes Signed-off-by: Chris Wilson commit a1f08b8850616952fb0babe2275eb36b13a380ec Author: Chris Wilson Date: Thu May 3 14:53:29 2012 +0100 sna: Don't discard GPU buffer if we only want to read back for the operation Signed-off-by: Chris Wilson commit fcccc5528b8696fb4f9b3f9f528673b95d98a907 Author: Chris Wilson Date: Thu May 3 11:27:44 2012 +0100 sna: Improve handling of inplace IO for large transfers If the transfer is large enough to obliterate the caches, then it is preferrable to do it inplace rather than upload a proxy texture and queue a blit. This helps prevent an inconsistency where one layer believes the operation should be done inplace only for the IO layer to perform an indirect upload. Testing show no significant impact upon the cairo-traces, but it does prevent x11perf -shmput from exploding. Signed-off-by: Chris Wilson commit 53568e8e49559094ce5b24b8709669f1f76fe2bf Author: Chris Wilson Date: Mon Apr 30 09:24:06 2012 +0100 sna/gen7: Fix debug printing of primitives Signed-off-by: Chris Wilson commit 01c26a44fdce761781908be11102e7a6a3db523c Author: Chris Wilson Date: Wed May 2 21:09:27 2012 +0100 sna: Avoid reducing damage for synchronisation Signed-off-by: Chris Wilson commit f4c34e9ab32f31669896b8f626195827a85af337 Author: Chris Wilson Date: Wed May 2 19:09:10 2012 +0100 sna: Bring back the minimum alignment for G33 The underlying cause is still not fixed. It should be possible to use the much laxer alignment for single-stream linear. Still no idea how I fail to convince the GPU to drop the depth buffer. Reported-by: Matti Hamalainen References: https://bugs.freedesktop.org/show_bug.cgi?id=49391 Signed-off-by: Chris Wilson commit 10b4a9bb5f46ab9d9c8b165084ce4174b54a8d39 Author: Chris Wilson Date: Wed May 2 12:45:09 2012 +0100 sna: Always try to operate inplace if we an LLC gpu bo commit dd80fb00bf7acf37dc3b9125431a12b67d7e92d3 Author: Chris Wilson Date: Wed May 2 11:31:42 2012 +0100 sna: Fallback for glyphs too large for XY_TEXT_IMMEDIATE Signed-off-by: Chris Wilson commit 7e09babb3e9e23882db30ee7d0c22c503962faa9 Author: Chris Wilson Date: Tue May 1 12:37:45 2012 +0100 sna: Only attempt to reuse exported scanout buffers Yet more mesa w/a. Signed-off-by: Chris Wilson commit b4b32e7a0172a74372f800e9c74d639a23c5ff34 Author: Chris Wilson Date: Tue May 1 11:15:00 2012 +0100 sna: Fast-path unclipped glyphs Avoid the redundant computation of the glyph intersection with the drawable bounding box. Signed-off-by: Chris Wilson commit ffdf9aca12adcfa1ec7ab7a1706873105a5f0d4a Author: Chris Wilson Date: Sun Apr 29 21:59:52 2012 +0100 legacy/i810: hwmc additionally depends upon building DRI Signed-off-by: Chris Wilson commit 444da84c47266bcbbdf5121507901de8eb36f11b Author: Chris Wilson Date: Sun Apr 29 21:49:04 2012 +0100 configure: Version bump for 2.19.0 release commit a206a1eee1fb799d567d68db564d663cfc66f6cc Author: Chris Wilson Date: Sat Apr 28 01:54:43 2012 +0100 sna: Tune relocation array size Signed-off-by: Chris Wilson commit 4f1908c651ef9e2af33d8831466a605234978c46 Author: Chris Wilson Date: Fri Apr 27 23:19:56 2012 +0100 sna: PolyPoint only uses the gc->fgPixel Signed-off-by: Chris Wilson commit 8453034c7dd893f1d4c32ee87724f3a13137595d Author: Chris Wilson Date: Fri Apr 27 22:08:51 2012 +0100 sna/gen6: Allow ring switching at the start of a batch Signed-off-by: Chris Wilson commit 93ad7793894787600c5074917c753fa7c6816134 Author: Chris Wilson Date: Fri Apr 27 22:03:55 2012 +0100 sna: Tweak semaphores-enabled heuristic The kernel module now defaults to -1, confusing the test. Signed-off-by: Chris Wilson commit 986dbdda3bf8dcf208e55543d8a3393c4b53f10b Author: Chris Wilson Date: Fri Apr 27 19:21:44 2012 +0100 sna: Tweak placement choice for high-overhead operations Some operations cost more to setup than to transfer data back and forth! Signed-off-by: Chris Wilson commit daac9a1d036d80ccce83438b49115a236a16bfb6 Author: Chris Wilson Date: Fri Apr 27 16:50:28 2012 +0100 sna: Micro-optimise common case of checking a single fenced bo Signed-off-by: Chris Wilson commit 5967d76ca09a257ec9db66ea664158e1dfd083ba Author: Chris Wilson Date: Wed Apr 25 17:15:37 2012 +0100 sna: Fixup broken assertion It is valid for the cpu_bo to be NULL, as we may be choosing to free the large shadow pixel buffer instead. Signed-off-by: Chris Wilson commit 860d3859b586939cd52e45b944cb6abd2a2ca71b Author: Chris Wilson Date: Wed Apr 25 16:04:33 2012 +0100 sna/gen7: Add CS stall before changing WM binding table Signed-off-by: Chris Wilson commit c219283460c0f2dfdb823e0cb139d05075c6afce Author: Chris Wilson Date: Wed Apr 25 15:04:01 2012 +0100 sna/gen7: Apply more recent improvements from SNB perf tuning Signed-off-by: Chris Wilson commit a3371613c9bf577a69cdf811ca1bebaea46bbe95 Author: Chris Wilson Date: Wed Apr 25 11:09:35 2012 +0100 sna: Do not automagically convert GTT mappings on untiled scanout to CPU The likelihood of an untiled mapping of the scanout is slim, except for gen3 with large desktops, and there it should never be in the CPU domain... The issue is that we may perform an operation "inplace", yet incoherent with the display engine, and never flush the CPU cache, resulting in render corruption. In theory at least! Signed-off-by: Chris Wilson commit 1abd92cd012ee46d44ed4873a5e750d56ae6668f Author: Chris Wilson Date: Wed Apr 25 11:16:30 2012 +0100 sna: Clear the domain tracking after attaching the bo to scanout This is basically to make sure we don't continue treating it as CPU coherent. Signed-off-by: Chris Wilson commit 8c58c840b1ba579a5601804fc710c58e1e00213f Author: Chris Wilson Date: Mon Apr 23 11:09:37 2012 +0100 sna/dri: Always clear the scanout when destroying dri2 buffers As we may end up holding onto and releasing the Screen pixmap last, we may also be responsible for flushing the last reference to the scanout. Signed-off-by: Chris Wilson commit caf9144271a10f90ea580c246b2df3f69a10b7a0 Author: Chris Wilson Date: Fri Apr 20 17:15:37 2012 +0100 sna: Remove the assertions that the cached upload buffers are active These were added to track down some corruption, but the assertions themselves are incorrect, just very rare. The upload buffer may genuinely be cached if we abort the render operation after uploading the source data, leaving the proxy not coupled to any request. References: https://bugs.freedesktop.org/show_bug.cgi?id=48400 Signed-off-by: Chris Wilson commit aff3614efd5c12e658fa5723934e5bd50a83a316 Author: Chris Wilson Date: Fri Apr 20 13:21:40 2012 +0100 sna: Always clear the mmapped domains when reusing partial upload buffers As we need to make sure that we do invalidate the caches appropriately on reuse. Mildly paranoid, but strictly required by the spec. Signed-off-by: Chris Wilson commit cb6a3dc2edf3cd612f833bc9a4656166735ee856 Author: Chris Wilson Date: Thu Apr 19 10:34:23 2012 +0100 sna: Discard proxy upload buffer if we choose to render to it Even if we try to avoid treating an upload buffer as a real GPU target, we may still choose to migrate the buffer to the GPU in order to keep other buffers on the GPU. In that case, we do want to create a real GPU bo. Signed-off-by: Chris Wilson commit 4cf74d409ca63c6a479c1ee2187908c04f3b830b Author: Chris Wilson Date: Thu Apr 19 09:09:32 2012 +0100 sna: Don't consider upload proxies as being on the GPU for render targets The upload proxy is a fake buffer that we do not want to render to as then the damage tracking become extremely confused and the buffer it self is not optimised for persistent rendering. We assert that we do not use it as a render target, and this patch adds the check so that we avoid treating the proxy as a valid target when choosing the render path. Signed-off-by: Chris Wilson commit fd81408b978c9b57c046ee43d2d32e1370e83a7d Author: Chris Wilson Date: Wed Apr 18 11:39:43 2012 +0100 sna: Increase the render target alignment to 4 pixels on gen4+ as well Repoerted-and-tested-by: Toralf Förster commit 11599e52b842b5db76798879b0fbb57762fe6002 Author: Chris Wilson Date: Tue Apr 17 20:08:14 2012 +0100 sna/dri: Decouple the frame event info after attaching along error paths Signed-off-by: Chris Wilson commit b817200371bfe16f44b879a793cf4a75ad17bc5c Author: Chris Wilson Date: Tue Apr 17 17:54:58 2012 +0100 Don't issue a scanline wait while VT switched Be paranoid and check that we own the VT before emitting a scanline wait. If we attempt to wait on a fb/pipe that we do not own, we may issue an illegal command and cause a lockup. Signed-off-by: Chris Wilson commit af4a6e8cb52ace594934446e6d8a7aaa1945a9b0 Author: Chris Wilson Date: Mon Apr 16 20:57:03 2012 +0100 sna: Don't assert exported buffers are not busy As we do not fully control these buffers, we cannot truly say when they are idle, we can only trust that the split between us and the compositor doesn't lead to much corruption. Signed-off-by: Chris Wilson commit a16616209bb2dcb7aaa859b38e154f0a10faa82b Author: Chris Wilson Date: Sat Apr 14 19:03:25 2012 +0100 uxa: Fix leak of glyph mask for unhandled glyph composition ==1401== 7,344 bytes in 34 blocks are possibly lost in loss record 570 of 587 ==1401== at 0x4027034: calloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) ==1401== by 0x8BE5150: drm_intel_gem_bo_alloc_internal (intel_bufmgr_gem.c:689) ==1401== by 0x899FC04: intel_uxa_create_pixmap (intel_uxa.c:1077) ==1401== by 0x89C2C41: uxa_glyphs (uxa-glyphs.c:254) ==1401== by 0x21F05E: damageGlyphs (damage.c:647) ==1401== by 0x218E06: ProcRenderCompositeGlyphs (render.c:1434) ==1401== by 0x15AA40: Dispatch (dispatch.c:439) ==1401== by 0x1499E9: main (main.c:287) Signed-off-by: Chris Wilson commit ae145c21e9fd3a12164f8b4720d059f9c158249e Author: Chris Wilson Date: Sat Apr 14 18:42:23 2012 +0100 sna: Avoid leaking the plane resources when determining sprite planes Fixes the tiny, one-off leak: ==1407== 8 bytes in 1 blocks are definitely lost in loss record 48 of 527 ==1407== at 0x402894D: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) ==1407== by 0x8580BE8: drmMalloc (xf86drm.c:147) ==1407== by 0x8583D54: drmAllocCpy (xf86drmMode.c:73) ==1407== by 0x8585265: drmModeGetPlaneResources (xf86drmMode.c:955) ==1407== by 0x8A1BCE9: sna_video_sprite_setup (sna_video_sprite.c:367) ==1407== by 0x8A1A0A3: sna_video_init (sna_video.c:523) ==1407== by 0x89FD4E0: sna_screen_init (sna_driver.c:935) ==1407== by 0x15AD80: AddScreen (dispatch.c:3909) ==1407== by 0x19A2DB: InitOutput (xf86Init.c:817) ==1407== by 0x14981C: main (main.c:204) Signed-off-by: Chris Wilson commit 69a7737abeded6ee923643bd8a80a5a84e6a979c Author: Chris Wilson Date: Sat Apr 14 12:06:51 2012 +0100 sna: Align texture subsurfaces to 2x2 texture samples Signed-off-by: Chris Wilson commit 1d2a46e0902d82b43a5e12af36521a6a7fd6ba39 Author: Chris Wilson Date: Sat Apr 14 12:04:23 2012 +0100 sna: Align redirect subsurfaces to 2x2 or 4x4 render spans Signed-off-by: Chris Wilson commit 1ce2b65d622797000e0a4db7dc851d5b1da04f85 Author: Chris Wilson Date: Sat Apr 14 11:59:31 2012 +0100 sna: Align render target sizes on gen2/3 to 4x4 render spans Signed-off-by: Chris Wilson commit 89f2b09b1e5be9842747998ea4fe32a6f1ede4cc Author: Chris Wilson Date: Fri Apr 13 16:37:43 2012 +0100 sna: Avoid using TILING_Y for large objects on gen2/3 References: https://bugs.freedesktop.org/show_bug.cgi?id=48636 Signed-off-by: Chris Wilson commit eaadbce122059066353743f1653aa16e9d9b747f Author: Chris Wilson Date: Fri Apr 13 15:12:36 2012 +0100 sna: Relax bogus assertion The bo may be considered unmappable due to being bound to outside the mappable region, which we are attempting to rectify through mapping into the GTT domain. Signed-off-by: Chris Wilson commit b478420740d05fa87ddbd92042b1f7f2d002f73e Author: Chris Wilson Date: Fri Apr 13 15:07:13 2012 +0100 sna: Limit the buffer reuse for mappable uploads to only those with mmaps Signed-off-by: Chris Wilson commit 90e2740e7e459c56205fa65bab1ae3dbfd5d3945 Author: Chris Wilson Date: Fri Apr 13 13:51:57 2012 +0100 sna: Remove the conflicting assertion during GTT map Reported-by: Clemens Eisserer References: https://bugs.freedesktop.org/show_bug.cgi?id=48636 Signed-off-by: Chris Wilson commit 9e6d55a8d63f10ca6a2b10e44d00c84b07724485 Author: Chris Wilson Date: Fri Apr 13 09:56:39 2012 +0100 sna: Don't use miSpan code for wide-spans by default, too expensive Only use the fall-forward miSpans code when it prevents a readback. Signed-off-by: Chris Wilson commit 9becfbbf89f2b170e50f705cabfc7bbf1dcf9846 Author: Chris Wilson Date: Fri Apr 13 09:38:57 2012 +0100 sna: Draw dashed PolyLines twice, once for the fgPixel, once for the bgPixel As the fast paths only setup state upfront, we were missing the state changes required between dash-on/off. Take advantage of that each pixel is only drawn once to batch the state changes and run the miZeroDashLines twice. A future task would be to use a custom line drawing routine... Fixes regression from ec1267df746512c2e262ef0bd9e9527bc5efe6f4. Signed-off-by: Chris Wilson commit e269ed5d4e1b9d758aeb9a85ed0fa631f0aff0b1 Author: Chris Wilson Date: Thu Apr 12 22:46:22 2012 +0100 sna: Restore CPU domain for vmapped buffers when reusing For a vmapped upload buffer, we need to notify the kernel (and thereby the GPU) to invalidate the sampler and flush its caches when we reuse an idle buffer. Signed-off-by: Chris Wilson commit d29b8650c40c673e6ddddaf52db9247e9836cba8 Author: Chris Wilson Date: Thu Apr 12 22:23:12 2012 +0100 sna: Revert use of mmap64() As this just causes mayhem on a 64-bit platform. Doomed if you, doomed if you don't. :( Signed-off-by: Chris Wilson commit a78b1d71a39ae29d5f85bd82c09202ebec3e6539 Author: Chris Wilson Date: Thu Apr 12 15:37:25 2012 +0100 sna: Declare AC_SYS_LARGEFILE for mmap64 In order to use the full 32-bits of mmap address space on small platforms we need to use mmap64(). Signed-off-by: Chris Wilson commit 09deba927daa96be6230b1c3e1b425622512d8a2 Author: Chris Wilson Date: Tue Apr 10 20:59:36 2012 +0100 sna: Check ioctl return from set-domain Let's not assume it succeeds and so avoid altering our bookkeeping along failure paths. Signed-off-by: Chris Wilson commit 0b12f1d8e4d0a4fafac9553f144535efc4ebe0be Author: Chris Wilson Date: Tue Apr 10 15:23:54 2012 +0100 sna: Fix shadowed variable sna_accel.c: In function 'sna_pixmap_move_area_to_gpu': sna_accel.c:1751:12: warning: declaration of 'flags' shadows a parameter [-Wshadow] sna_accel.c:1731:72: warning: shadowed declaration is here [-Wshadow] Signed-off-by: Chris Wilson commit 755a7107aed268d87c5cc0feb1ba388b0cb7fc59 Author: Chris Wilson Date: Tue Apr 10 15:19:19 2012 +0100 sna: Fix typo and use the right pointer for kgem_bo_destroy Useless warnings in xorg headers ftl. References: https://bugs.freedesktop.org/show_bug.cgi?id=48400 Signed-off-by: Chris Wilson commit c8502e350cb18f6f5d821d237ffcee453f347eba Author: Chris Wilson Date: Tue Apr 10 14:43:28 2012 +0100 sna: Add missing alloc failure check for creating tile source Signed-off-by: Chris Wilson commit 9cc6f7ccc55cc11f47b3b7d626c9f5a7c1327d57 Author: Chris Wilson Date: Tue Apr 10 12:06:56 2012 +0100 sna: Release the freed bo cache upon expire Signed-off-by: Chris Wilson commit 102d11906a672140bac099e7bd1b35345d13a2fc Author: Chris Wilson Date: Mon Apr 9 22:54:51 2012 +0100 sna: Check for an inactive partial buffer to reuse after retiring requests Signed-off-by: Chris Wilson commit e2fb2421d8f5c07925d1699673aa4b1dd6c6b22c Author: Chris Wilson Date: Mon Apr 9 22:54:15 2012 +0100 sna: Release partial buffers during cache expiration Signed-off-by: Chris Wilson commit 333fdcad8677675a4758223c1a980c90d970ee42 Author: Chris Wilson Date: Mon Apr 9 22:53:31 2012 +0100 sna: Repeat expire whilst there remaining outstanding requests Do not allow the cache expiration to finish if we are still running requests. Signed-off-by: Chris Wilson commit 778232e3d2fb5340a3092014801dc00a56c56d42 Author: Chris Wilson Date: Tue Apr 10 11:14:50 2012 +0100 sna: Only move the bo into the read domain for readback And mark it as currently in no domain afterwards, so that if we reuse it, it will be appropriately moved later. Signed-off-by: Chris Wilson commit dd093eafb9b94b8e4cd8853d74078c3aa7e72f57 Author: Chris Wilson Date: Mon Apr 9 14:09:42 2012 +0100 sna: Add assertions around proxy list handling References: https://bugs.freedesktop.org/show_bug.cgi?id=48400 Signed-off-by: Chris Wilson commit 7f0bede3e7e3f92a637d1c886304b16afc0e34f2 Author: Chris Wilson Date: Mon Apr 9 10:48:08 2012 +0100 sna/traps: Use a temporary variable for the write pointer To avoid accumulating the write offset for wide spans, we need to reset the destination pointer between spans. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48332 Signed-off-by: Chris Wilson commit 2e4da00e3e03b873f5cad0cc5b1f6cc791852ca5 Author: Chris Wilson Date: Mon Apr 9 10:42:18 2012 +0100 sna/traps: Assert that the inplace row is contained before writing References: https://bugs.freedesktop.org/show_bug.cgi?id=48332 Signed-off-by: Chris Wilson commit 0464e93a088a9e8bc29ad8b36b6e12c3dda32ec6 Author: Chris Wilson Date: Sun Apr 8 17:16:03 2012 +0100 sna: Add some assertions for misuse of proxies References: https://bugs.freedesktop.org/show_bug.cgi?id=48400 Signed-off-by: Chris Wilson commit 479cb6ba71038fe44f66fb31fad90d0d454fea7a Author: Chris Wilson Date: Sun Apr 8 14:25:49 2012 +0100 sna: Compress adjoining spans during FillSpans Signed-off-by: Chris Wilson commit c5c01c13badeb7c2ead0c848b746d8d474277a77 Author: Chris Wilson Date: Sun Apr 8 13:51:13 2012 +0100 sna: Remove the duplicated check for use-bo? in PolySegments Signed-off-by: Chris Wilson commit f5deea4f60433ee2b0c2d02fba682fff8b7829e8 Author: Chris Wilson Date: Sun Apr 8 13:39:47 2012 +0100 sna: Correct partial-write flag for PolySegments fallback Signed-off-by: Chris Wilson commit c3d7f4c1cf7d052163b7c4e74bb202c618f0eb76 Author: Chris Wilson Date: Sun Apr 8 13:18:56 2012 +0100 sna/gen3: Reset accumulated constants for each composite In particular the glyph routines require the composite setup to reinitialise state between glyph runs. This affects anything trying to use glyphs without a mask with a gradient source, for example. Signed-off-by: Chris Wilson commit 701473d20485a0557b4fb36efcbfbb8656e2f619 Author: Chris Wilson Date: Sun Apr 8 10:09:42 2012 +0100 sna: Release cached upload buffers when reusing a write buffer for readback References: https://bugs.freedesktop.org/show_bug.cgi?id=48400 Signed-off-by: Chris Wilson commit 1ecf17b2507f95e1fefea15833fa9f57ec256a2e Author: Chris Wilson Date: Sat Apr 7 10:01:01 2012 +0100 sna/gradient: Compute the absolute delta between color stops Otherwise we do not detect gradients that start from white! Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48407 Signed-off-by: Chris Wilson commit 4356fae72db3a33935b575edf95c84fbb48072a7 Author: Chris Wilson Date: Fri Apr 6 21:10:50 2012 +0100 sna/video: Only wait upon the scanout pixmap Caught by the addition of the assertion. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit b790ba2ec9ead51227d85fc8630bc7505eb7d7b3 Author: Chris Wilson Date: Fri Apr 6 15:38:02 2012 +0100 sna: Correct the damage offset for redirected rendering Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48385 Signed-off-by: Chris Wilson commit 0b81bafb802bb86454739ed46cf45571bccef735 Author: Chris Wilson Date: Fri Apr 6 15:14:45 2012 +0100 sna/glyphs: Prefer a temporary upload mask for large glyph masks If the required temporary mask is larger than the 3D pipeline can handle, just render to a CPU buffer rather than redirect every glyph composition. Signed-off-by: Chris Wilson commit 42a84613e34522af885b4b50d6c68ef77e81ffc3 Author: Chris Wilson Date: Fri Apr 6 14:27:15 2012 +0100 sna: Relase the upload cache when overwriting with PutImage Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48359 Signed-off-by: Chris Wilson commit 999aa210ff87919945c673bdd34bae76ac097681 Author: Chris Wilson Date: Fri Apr 6 09:24:36 2012 +0100 sna: Use a sentinel value to prevent accessing beyond the end of the y_buckets Signed-off-by: Chris Wilson commit 1ae6328c57eb496072f0d0e27440f5d0901633b0 Author: Chris Wilson Date: Fri Apr 6 09:12:08 2012 +0100 sna: Remove redundant check from tor_inplace() We only execute full-steps for vertical edges so we do not need the second check. Signed-off-by: Chris Wilson commit 51b9202d27db3d98c6d82ba224bd8eb218533dd9 Author: Chris Wilson Date: Wed Apr 4 11:13:27 2012 +0100 sna: Only engage the GPU detiler for multiple rows Signed-off-by: Chris Wilson commit 98ad4c3cd8647ba3ec90fb45157773c8e85e886c Author: Chris Wilson Date: Tue Apr 3 19:47:15 2012 +0100 sna/gen3: Don't force use of the render pipeline just for vmap Signed-off-by: Chris Wilson commit 0915d414f55a1bff4171981feb87bae212f29f23 Author: Chris Wilson Date: Tue Apr 3 19:04:29 2012 +0100 sna/gen3: Fix pre-multiplication of mask value Signed-off-by: Chris Wilson commit 04851e4210d2d71542359c14d4b68d0851b36326 Author: Chris Wilson Date: Tue Apr 3 12:34:24 2012 +0100 sna/gen3: Convert the clear-color from picture->format to a8r8g8b8 The shaders treat colours as an argb value, however the clear color is stored in the pixmap's native format (a8, r5g6b5, x8r8g8b8 etc). So before using the value of the clear color as a solid we need to convert it into the a8r8g8b8 format. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48204 Reported-by: Paul Neumann Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47308 Signed-off-by: Chris Wilson commit 87a672dafd9d6f47f31b77b406b7f0fb2b4030ac Author: Chris Wilson Date: Tue Apr 3 09:24:06 2012 +0100 sna: Apply CoordMode when computing point extents Reported-by: Patrick Truebe Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48220 Signed-off-by: Chris Wilson commit 0a0ee491ea18dc59748ff4419ae73bd1a369ae79 Author: Chris Wilson Date: Tue Apr 3 09:23:49 2012 +0100 sna: Debugging flil spans and their clipping Signed-off-by: Chris Wilson commit ec1267df746512c2e262ef0bd9e9527bc5efe6f4 Author: Chris Wilson Date: Mon Apr 2 16:16:24 2012 +0100 sna: Use the solid spans fast paths for dashed zero-width lines as well Signed-off-by: Chris Wilson commit 2d1f3cb198f2fe9602356a334a076abf3c68a9c7 Author: Chris Wilson Date: Mon Apr 2 13:51:37 2012 +0100 sna/gen4: Remove the accidental debugging hack from the last commit Signed-off-by: Chris Wilson commit 5c4dc9c5db7b2a5b936bdbc15536c5cf0f7f5f23 Author: Chris Wilson Date: Mon Apr 2 13:40:22 2012 +0100 sna/gen3+: Fix sampling of borders around gradients Incurs a slight loss of precision for the internal gradient, but much more preferable to the artefacts around the borders with RepeatNone. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45016 Signed-off-by: Chris Wilson commit 0b2651dc04cef8f9692b2557684f044b4980700f Author: Chris Wilson Date: Sun Apr 1 19:43:15 2012 +0100 sna: Apply composite offset to damage for spans fast paths Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 4ea9ab9303d21a62683055b75eaed66c97a5f289 Author: Chris Wilson Date: Sun Apr 1 16:36:16 2012 +0100 sna: Fix assertion to look at bbox of all boxes/points Signed-off-by: Chris Wilson commit 932743bb333e35d5f6529a701137aad4d7490555 Author: Chris Wilson Date: Sun Apr 1 09:54:43 2012 +0100 sna: Assert that drawing boxes are within bounds More sanity checks required. Signed-off-by: Chris Wilson commit cc20c45aa0ca15720510668d6918bf3c99104626 Author: Chris Wilson Date: Fri Mar 30 22:51:21 2012 +0100 sna: Minimise the risk of hotplug hangs by checking fb before vsync Everytime we issue a MI_WAIT_FOR_EVENT on a scan-line from userspace we run the risk of that pipe being disable before we submit a batch. As the pipe is then disabled or configured differently, we encounter an indefinite wait and trigger a GPU hang. To minimise the risk of a hotplug event being detected and submitting a vsynced batch prior to noticing the removal of the pipe, perform an explicit query of the current CRTC and delete the wait if we spot that our framebuffer is no longer attached. This is about as good as we can achieve without extra help from the kernel. Reported-by: Francis Leblanc Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45413 (and others) Signed-off-by: Chris Wilson commit 305734ebdf3d51c084cfbee8804b6c60b1f03a98 Author: Chris Wilson Date: Fri Mar 30 21:27:29 2012 +0100 sna: Separate out scanline waiting for gen4 So that we do not set a gen4 bit on gen2 and apply the old workaround of trimming y2 instead. Signed-off-by: Chris Wilson commit 6f2814db6f7b89e94e54b8d73c7e176ab7d1c469 Author: Chris Wilson Date: Fri Mar 30 20:45:55 2012 +0100 sna/traps: Align the pointer+index It's the location of the pixels within the row that matter for alignment! Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47418 Signed-off-by: Chris Wilson Tested-by: Magnus Kessler commit ee075ced844350785685a0f93f88f1dc310bcc73 Author: Chris Wilson Date: Fri Mar 30 19:09:30 2012 +0100 sna/traps: Align the pointer not the indices Magnus found that inplace_row was still crashing on his setup when it tried to perform an 8-byte aligned write to an unaligned pointer. This time it looks like the row pointer itself was not 8-byte aligned, so instead of assuming that and fixing up the indices, ensure that the (index+row) results in an 8-byte aligned value. Reported-by: Magnus Kessler Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47418 Signed-off-by: Chris Wilson commit fde8a010b3d9406c2f65ee99978360a6ca54e006 Author: Chris Wilson Date: Fri Mar 30 12:47:21 2012 +0100 uxa: Remove broken render glyphs-to-dst Reported-by: Vincent Untz Reported-by: Robert Bradford Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48045 Signed-off-by: Chris Wilson commit 451489b49916cf5a9d27844196f9656e590d9124 Author: Chris Wilson Date: Fri Mar 30 10:21:26 2012 +0100 sna/gen7: Allow per-device specific maxima As the maximum thread count and urb size differs between different incarnations of the GT units, be a little more flexible in programming those maximums. Signed-off-by: Chris Wilson commit ea36f2c4a3fa9afa8184eeaf944af9924c080368 Author: Eugeni Dodonov Date: Thu Mar 29 21:08:29 2012 -0300 Add support for Ivy Bridge GT2 Server chipset Sometimes known as Bromlow. Signed-off-by: Eugeni Dodonov Signed-off-by: Chris Wilson commit 6142232fa0feeb39412cda85ca727cc770eaa042 Author: Chris Wilson Date: Wed Mar 28 18:59:26 2012 +0100 sna: Add video sprite support for ILK+ Based on the work by Jesse Barnes. Signed-off-by: Chris Wilson commit ae8aa172a7330439a8e6dda41f5e33eb257a139b Author: Chris Wilson Date: Wed Mar 28 22:07:10 2012 +0100 sna: Fix up 32-bit overflow for maximum object size calculation Signed-off-by: Chris Wilson commit 2e7b5f7eafbf452c781e50eba7dc8323260af59e Author: Chris Wilson Date: Tue Mar 27 10:42:59 2012 +0100 sna/traps: Prefer to try mono spans on the GPU before trying inplace CPU Signed-off-by: Chris Wilson commit 522b41b393b979fdccf1ad62194cde8129f98c8c Author: Chris Wilson Date: Tue Mar 27 10:42:21 2012 +0100 sna/traps: Fix the width of the left-hand edge of an unaligned box Signed-off-by: Chris Wilson commit 008ad39b72eb86dc2f89789427be269c148feaf4 Author: Chris Wilson Date: Tue Mar 27 10:41:37 2012 +0100 sna/gen6: Reduce opaque solid OVER to SRC for render composite Signed-off-by: Chris Wilson commit a9e9041934b2486e5661ba6c550e6670009f69f3 Author: Chris Wilson Date: Mon Mar 26 16:03:42 2012 +0100 sna: Remove bogus assertion of no references to in-flight upload buffers As we may hold a cached reference to an upload buffer whilst it is in-flight, the assertion that there are no such references to a buffer being reused is no longer true. Those cached references will be released as soon as we retire the buffer during the readback and so we are free to reuse such an upload buffer for immediate readback. Reported-by: Jiri Slaby References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit 89091dd8a3fba6520a651e3e135c87546b81df9b Author: Paulo Zanoni Date: Tue Mar 20 11:53:21 2012 -0300 Avoid duplicated code with intel_output_create_ranged_atom Same change for intel_display.c and sna_display.c. Signed-off-by: Paulo Zanoni Signed-off-by: Chris Wilson commit 62f9833298ea936eaefe973eca04b1dde858fbd8 Author: Chris Wilson Date: Sun Mar 25 21:25:15 2012 +0100 sna/gen2+: Approximate expensive gradients when using imprecise rendering If we lack the ability to use a shader to compute the gradients per-pixel, we need to use pixman to render a fallback texture. We can reduce the size of this texture and upsample to reduce the cost with hopefully imperceptible loss of quality. Signed-off-by: Chris Wilson commit 25807f472d051163ed96556a409110fa405c24d1 Author: Chris Wilson Date: Fri Mar 23 14:56:06 2012 +0000 uxa: Remove hook for CompositeRectangles It was broken and not flushing damage correctly. With the improvements made to the kernel, it is no longer a significant advantage per se and not worth its additional complexity. Reported-by: Tilman Sauerbeck Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32547 Signed-off-by: Chris Wilson commit 4460c6d0d30cf20b76854d47fd9e3aecf1839f15 Author: Chris Wilson Date: Fri Mar 23 11:05:55 2012 +0000 configure: Stop the debug build erroring out if it cannot find valgrind Another case where I passed an empty string believing that would be sufficient to replace the error path... Signed-off-by: Chris Wilson commit 168ecd96f23756e185af627f814f81b8a4c0c529 Author: Chris Wilson Date: Thu Mar 22 23:47:56 2012 +0000 sna: Make the fallback debugging messages more consistent Signed-off-by: Chris Wilson commit 8693005b5427f256bcd7c2e7cfc48d56f5b8c5ea Author: Chris Wilson Date: Thu Mar 22 23:43:04 2012 +0000 sna: Update the target bo after changing from Y tiling Signed-off-by: Chris Wilson commit 83f98d6e5c303e52c1e0fb95b6237ebf62a8edfe Author: Chris Wilson Date: Thu Mar 22 21:57:14 2012 +0000 sna: Correctly test for clear glyphs when searching for ones to skip With xterm, it is quite common for it to redraw itself by using lots of spaces and so it is efficient for us if we ellide those clear glyphs and only draw the backing boxes. However, we were only checking the first 8 pixels in each line because of a missing pointer increment. Fixes absent '=' characters when using a compositor and ImageText. Reported-by: Jiri Slaby commit 86121a3af9a9fc9a2c76d7ac9f3ec17105d20d80 Author: Chris Wilson Date: Thu Mar 22 11:21:43 2012 +0000 sna: Adjust the damage region for the composite offset References: https://bugs.freedesktop.org/show_bug.cgi?id=47597 Signed-off-by: Chris Wilson commit a6b48dd7f1eeb1a8e3841b8f3326c60b300ee9e9 Author: Chris Wilson Date: Thu Mar 22 09:22:52 2012 +0000 sna: Force fallbacks if the destination is unattached Since the removal of the ability to create a backing pixmap after the creation of its parent, it no longer becomes practical to attempt rendering with the GPU to unattached pixmaps. So having made the decision never to render to that pixmap, perform the test explicitly along the render paths. This fixes a segmentation fault introduced in 8a303f195 (sna: Remove existing damage before overwriting with a composite op) which assumed the existence of a backing pixmap along a render path. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47700 Signed-off-by: Chris Wilson commit 52f39ae1697bef86471b7c5eef8553661f255b67 Author: Chris Wilson Date: Wed Mar 21 13:31:03 2012 +0000 sna: Assert that the bo created is large enough Double check that the maximum access size computed from the bo parameters is within the allocated size for the bo. Signed-off-by: Chris Wilson commit 2f23c660f58e0db2107255f32a3503dae62fe304 Author: Chris Wilson Date: Wed Mar 21 13:30:45 2012 +0000 sna: Assert that the tiled blt is correctly clipped Signed-off-by: Chris Wilson commit e0cd13e2af3db237c171f8ca1c70ddc67b1fbce4 Author: Chris Wilson Date: Wed Mar 21 09:06:10 2012 +0000 sna: Fallback to inplace upload if forced to tile the indirect replacement Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47629 Signed-off-by: Chris Wilson commit 1db1eced5462723811e535a53cb41b108fc6c5a3 Author: Chris Wilson Date: Tue Mar 20 22:57:50 2012 +0000 sna: Tidy an assertion when handling tiled copies Signed-off-by: Chris Wilson commit 38b0cc24b45afd4ed57187fb066896bf1e467f45 Author: Chris Wilson Date: Wed Mar 21 01:01:47 2012 +0000 sna: Remove the short-circuiting of move-to-cpu for read if no damage The danger now is that we may have either discarded the shadow pixels or have replaced them with a GTT mapping, either way undesirable and so we should reconstruct the shadow mapping. Signed-off-by: Chris Wilson commit f49a6b1fd7e23252b2a306f8bdb9baed5c1e8d4b Author: Chris Wilson Date: Tue Mar 20 21:36:26 2012 +0000 sna: Decouple the private data after UnrealizeFont As the font is kept around and reused after UnrealizeFont, we need to nullify the pointer to our private data in order to prevent the later use-after-free. Reported-by: Peter Jordan Signed-off-by: Chris Wilson commit 1bdd6461de18a6812d5af0283f4222cbb80ca2f8 Author: Chris Wilson Date: Tue Mar 20 11:08:44 2012 +0000 sna/traps: Remove bogus assertion As we only enter that path for singular unbounded boxes, we are guaranteed to fill the entire trapezoid extents and so do not need the unbounded fixup the assertion was fretting about. Signed-off-by: Chris Wilson commit 1c2932e9cb283942567c3dd2695d03b8045da27f Author: Chris Wilson Date: Mon Mar 19 15:51:43 2012 +0000 uxa: Defer the call to EnterVT till after outputs are initialised We need to do this apparently or else we never perform the VT switch. However, we can not do it too early, especially not before we have finished intialising the outputs. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47395 Signed-off-by: Chris Wilson commit 972e1108a5606399a679f97af0815ec9730ab5be Author: Chris Wilson Date: Mon Mar 19 14:38:28 2012 +0000 sna: Declare videoRam correctly on gen2 devices Signed-off-by: Chris Wilson commit c0bab1df509d1f7fe36173715846c13b931e9be1 Author: Chris Wilson Date: Mon Mar 19 08:25:22 2012 +0000 sna/dri: Make the drawable as damaged for the off-screen immediate exchange In some cases off-screen is stil visible, for example under a rotation. As such xrandr -o left; glxgears -fullscreen was broken. Reported-by: Phillip Haddad Signed-off-by: Chris Wilson commit 17c19ea8e21e1b20eee446045573dfd94ce6f537 Author: Chris Wilson Date: Sun Mar 18 13:23:26 2012 +0000 sna/traps: Remove separate edge->vertical flag Mark vertical edges with dy==0 to reduce structure size and reduce memory load during edge walking. Signed-off-by: Chris Wilson commit 82023397cd05c05cfcb8939829a95e287d438875 Author: Chris Wilson Date: Sun Mar 18 11:10:14 2012 +0000 sna/gen3: Improve clear-to-solid reduction Signed-off-by: Chris Wilson commit 7ce5f4a11389b2fe9f27a6f09c4848ac71424d5d Author: Chris Wilson Date: Sun Mar 18 10:55:17 2012 +0000 sna/gen3: Do not force tiling for large pixmaps As the extraction routine is now smarter and can construction subsurfaces without copying we do not need to force tiling. Signed-off-by: Chris Wilson commit 342dda3fe361c8be2f3af5af1516cdc6a5fdcaa9 Author: Chris Wilson Date: Sun Mar 18 10:55:06 2012 +0000 sna/gen3: Prevent copy-fallback if we cannot blit Signed-off-by: Chris Wilson commit 28c089781fdf74a9bac2e138e65383748558fcc1 Author: Chris Wilson Date: Sun Mar 18 10:55:27 2012 +0000 sna: Fixup the cpu shadow mappings before uploading the box On the off-chance we arrive here with a pointer to the GTT mapping. Signed-off-by: Chris Wilson commit 79258fe560d08dd3dd22b4782360e1597e54948c Author: Chris Wilson Date: Sun Mar 18 09:45:27 2012 +0000 sna/traps: Apply some more operator and unbounded reductions Signed-off-by: Chris Wilson commit fe8866d6112c3e187d6682e9e4610325668427a0 Author: Chris Wilson Date: Sat Mar 17 21:49:56 2012 +0000 sna/gen[345]: Convert CPU mappings to GTT for vertices on submit Signed-off-by: Chris Wilson commit 97cd0c7da51024400e8900e46f51620a5f7ad402 Author: Chris Wilson Date: Sat Mar 17 23:57:46 2012 +0000 sna/traps: Upon reducing an ADD to a SRC, we need to apply the pending clear Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47444 Signed-off-by: Chris Wilson commit e31d9dacafe060dc86de801114b475fdd0142eb6 Author: Chris Wilson Date: Sat Mar 17 09:21:00 2012 +0000 sna/traps: Align indices for unrolled memset in row_inplace() The compiler presumes that the uint64_t write is naturally aligned and so may emit code that crashes with an unaligned moved. To workaround this, make sure the write is so aligned. References: https://bugs.freedesktop.org/show_bug.cgi?id=47418 Signed-off-by: Chris Wilson commit 2b4e11923d9f683f43acf8053bcec1701df25c1f Author: Chris Wilson Date: Sat Mar 17 00:05:47 2012 +0000 sna/traps: Tune inplace_end_subrows() Signed-off-by: Chris Wilson commit d887f209f1210a294afc2c3883a97f7ac9f42bad Author: Chris Wilson Date: Fri Mar 16 17:19:11 2012 +0000 sna/dri: Mesa expects the 8-bit stencil buffer to have 2-bytes per pixel The seperate stencil buffer is full of lies, why worry about one more? Signed-off-by: Chris Wilson commit 63c0d10faee3c7cca050505c2e81c416119e57e9 Author: Chris Wilson Date: Fri Mar 16 14:51:53 2012 +0000 sna/dri: Improve handling of non-front attachments for CopyRegion Confusion reigns between using the backing pixmap for the drawable for the front buffer, and a fake pixmap for the auxiliary buffers. Signed-off-by: Chris Wilson commit 324a1dffdc7dd896224fab265bd6a9cf99d7587f Author: Chris Wilson Date: Fri Mar 16 13:07:00 2012 +0000 sna/gen3: Micro-optimise solid span emission Signed-off-by: Chris Wilson commit 47c47b85f6b7ef5cbc2192da9ef0cee91f6744ca Author: Chris Wilson Date: Fri Mar 16 12:59:13 2012 +0000 sna/traps: Micro-optimise span emission Signed-off-by: Chris Wilson commit 3a26437f195bf3e5d5913f5552a0b838cafb9b2c Author: Chris Wilson Date: Fri Mar 16 12:37:25 2012 +0000 sna/traps: Tune nonzero_row Signed-off-by: Chris Wilson commit cb04cf9f4395c258987faead80de5c3a2c93082e Author: Chris Wilson Date: Fri Mar 16 09:28:24 2012 +0000 sna/traps: Make the inline u8 arithmetic more robust Signed-off-by: Chris Wilson commit d55bbdf42c75eb0fdb634e963ce81953583964b9 Author: Chris Wilson Date: Fri Mar 16 09:18:29 2012 +0000 sna/traps: Remove the old paths for mono inplace traps Dead code elimination. Signed-off-by: Chris Wilson commit fe4ad66aadcfa0c907ba6460a88c49e65225602c Author: Chris Wilson Date: Thu Mar 15 21:33:00 2012 +0000 sna: Correct the order of screen private teardown So that we do not keep a stale references of the last cached pixmap across server regeneration (or shutdown). Reported-by: Thierry Reding Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47357 Signed-off-by: Chris Wilson commit 0a8218a535babb5969a58c3a7da0215912f6fef8 Author: Chris Wilson Date: Thu Mar 15 13:20:35 2012 +0000 sna: Prefer the CPU bo for uploads if last access was not through the shadow Signed-off-by: Chris Wilson commit 77c9c03b102e6fac2279f0085034557bd68c5112 Author: Chris Wilson Date: Thu Mar 15 13:18:43 2012 +0000 sna: Fixup the shadow pixmap pointer for move-to-gpu If we choose not to use the CPU bo for the upload (because we fear the subsequent synchronisation cost), we need to fixup the shadow pointer before dereferencing it. On the move-to-cpu side, the fixup is already performed as we will need to access the shadow pixels for the subsequent drawing operation. Signed-off-by: Chris Wilson commit 0e2fbb6a1c1ad6b0971d07a91a790b0b3236dad3 Merge: 64ccc66 84d7a82 Author: Chris Wilson Date: Thu Mar 15 12:43:47 2012 +0000 uxa: Merge 'remove complicated second level caching' Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47345 Signed-off-by: Chris Wilson commit 84d7a82122530a62ab9a2f4bba3044c23a0db9b0 Author: Chris Wilson Date: Sat Mar 10 10:03:23 2012 +0000 uxa: Simplify allocation of backing pixmap Signed-off-by: Chris Wilson commit 1b1016624ad16cf5063e88a1d422e28865a9e87f Author: Chris Wilson Date: Sat Mar 10 09:31:24 2012 +0000 uxa/i915: Remove broken CA pass, fallback to magic 2-pass composite helper The backend failed to handle all the corner cases, so remove the complication. Signed-off-by: Chris Wilson commit 895a56a553e1386323a593063e5b7fbb7a410abe Author: Chris Wilson Date: Sat Mar 10 09:28:27 2012 +0000 uxa: Remove unused render_mask_solid members Signed-off-by: Chris Wilson commit 9c6f79440e8af9f264e3f6270384064dc1f44721 Author: Chris Wilson Date: Sat Mar 10 09:27:36 2012 +0000 uxa: Remove unused tracking of the current render target Signed-off-by: Chris Wilson commit 219467ac8bfab98bca82108b22eae8af3fc0bf36 Author: Chris Wilson Date: Sat Mar 10 09:26:10 2012 +0000 uxa: Simplify flush tracking Signed-off-by: Chris Wilson commit bd8fafe0c48df7f138459f590a0e9e8d0c3267b7 Author: Chris Wilson Date: Sat Mar 10 09:10:16 2012 +0000 uxa: Kill the complicated in-flight tracking Reference leak hunting. Signed-off-by: Chris Wilson commit 64ccc6698def517fc37e9ba3c41715626df0e3ca Author: Thierry Reding Date: Thu Mar 15 13:10:20 2012 +0100 configure: Keep passed-in CFLAGS for DRI tests When the user passes extra CFLAGS and CPPFLAGS to the configure script, they should be kept when performing subsequent checks with additional flags. This is required to properly build in cross-compilation setups where the user may pass in flags like --sysroot in order to pick up the cross-built dependencies. Signed-off-by: Thierry Reding commit c5c61ef378cad3c8259631138ea1e03eb02036af Author: Chris Wilson Date: Thu Mar 15 12:38:22 2012 +0000 sna/traps: dst IN WHITE does not reduce to SRC! I was getting too carried with my reductions. However, IN over a clear surface is a no-op, though unlikely! Signed-off-by: Chris Wilson commit fba49e1bb8e5b6b0e3ceace2dbddb5796ece954e Author: Chris Wilson Date: Thu Mar 15 10:31:51 2012 +0000 sna/traps: Fix off-by-one for filling vertical segments in tor_inplace If the last solid portion was exactly 4-pixels wide, we would miss filling in the mask. Signed-off-by: Chris Wilson commit 27f8f121b3d7433c6c3470b048428ca088acd2c9 Author: Chris Wilson Date: Wed Mar 14 23:43:20 2012 +0000 sna/damage: Handle a reduced damage rather than assert As we may reduce a damage to empty along the migration paths and not detect that reduced damage till later, handle those scenarios rather asserting. References: https://bugs.freedesktop.org/show_bug.cgi?42426 Signed-off-by: Chris Wilson commit abd104600252f0ebd1eb77eb5419693e1c17deda Author: Chris Wilson Date: Wed Mar 14 23:08:31 2012 +0000 sna: Treat unmapped but CPU-mappable bo as available for mapping Signed-off-by: Chris Wilson commit 2c492c0064e23457bffdf4f9ab1a7c9f1be93a87 Author: Chris Wilson Date: Wed Mar 14 23:05:58 2012 +0000 sna: Disable tiling for single row pixmaps (unless required for hw limits) Signed-off-by: Chris Wilson commit 6890592cd2b2d6f0d06c530f5e770fdc98577d4f Author: Chris Wilson Date: Wed Mar 14 21:30:13 2012 +0000 sna/traps: Explicitly create an unattach pixmap for fallback References: https://bugs.freedesktop.org/show_bug.cgi?id=42426 Signed-off-by: Chris Wilson commit 23b5640a0f8d8a944275e574f4c72f2380f7ed7a Author: Chris Wilson Date: Wed Mar 14 20:48:56 2012 +0000 sna: Avoid using kgem_bo_reference() internally So that we can keep the assertion to track the refcnt elsewhere. Signed-off-by: Chris Wilson commit 03731b4e37b0cbd3a1cb8c8ec08fddf0f670a918 Author: Chris Wilson Date: Wed Mar 14 20:46:59 2012 +0000 sna: Ellide no-op image glyphs Signed-off-by: Chris Wilson commit d0e05b4294b2f150a41dd95d52c2e6ee8479283d Author: Chris Wilson Date: Wed Mar 14 20:19:30 2012 +0000 sna: Don't mark cached upload buffers for inactivity expiration As these do not follow the normal rules of damage tracking, we have to be careful not to force migration. References: https://bugs.freedesktop.org/show_bug.cgi?id=42426 Signed-off-by: Chris Wilson commit 96ead26c4dddab637875c74a9afca6fd6662352b Author: Chris Wilson Date: Wed Mar 14 19:56:42 2012 +0000 sna: Add a couple of asserts for inactive_partial reference counting Signed-off-by: Chris Wilson commit 6a4ac18e37521d54dc36b215cbd27c56d20b2922 Author: Chris Wilson Date: Wed Mar 14 11:51:39 2012 +0000 sna/traps: Use a more direct fallback path for the CPU Signed-off-by: Chris Wilson commit 8580677ee6725144acf63f5cc2f8097376352d6e Author: Chris Wilson Date: Wed Mar 14 11:46:18 2012 +0000 sna/traps: Rasterise using pixman inplace where appropriate Signed-off-by: Chris Wilson commit 8a303f195b53a78dcbb2b6c84e7e691bedc86d25 Author: Chris Wilson Date: Wed Mar 14 11:26:03 2012 +0000 sna: Remove existing damage before overwriting with a composite op Signed-off-by: Chris Wilson commit 63eeb98463a77adadc26d9de1e640b75eefebf1a Author: Chris Wilson Date: Wed Mar 14 10:30:47 2012 +0000 sna/gen3: Look harder to see if we can indeed use the BLT for composite Signed-off-by: Chris Wilson commit d23ee0380b61e0dfd3ed56b8b4a15fd0b7956491 Author: Chris Wilson Date: Tue Mar 13 22:00:25 2012 +0000 sna: Reuse the cached upload as a source GPU bo References: https://bugs.freedesktop.org/show_bug.cgi?id=42426 Signed-off-by: Chris Wilson commit 0acec1685328b1dd9dffa804a27a122fc6e4225a Author: Chris Wilson Date: Tue Mar 13 21:29:57 2012 +0000 sna: Defer the release of the upload buffer cache till retirement Signed-off-by: Chris Wilson commit 06b28d541bdf2607edc2eb476919b28e747885d8 Author: Chris Wilson Date: Tue Mar 13 20:01:53 2012 +0000 sna: Destroy the cached upload buffer if before copying into it As we discard the buffer after the next batch, we will lose the contents of the pixmap. Instead discard the cache, and treat it as a normal shadow again. References: https://bugs.freedesktop.org/show_bug.cgi?id=42426 Signed-off-by: Chris Wilson commit 015db20287ec90f81ddb7eb2e7ce23b90aacfb2b Author: Chris Wilson Date: Tue Mar 13 16:29:41 2012 +0000 sna: Refactor source upload-to-gpu This was originally split between into functions for flexibility that nothing used, so merge the duplicated code into a common function. Signed-off-by: Chris Wilson commit 6dfe28f978b59ab2fc44cdd8ddf3743d6507588b Author: Chris Wilson Date: Tue Mar 13 15:47:27 2012 +0000 sna/gen6: Remove the double application of the render offset Cut'n'paste error from an older generation. Signed-off-by: Chris Wilson commit c751242e245eb168b92616bdcea3421be4e420bc Author: Chris Wilson Date: Tue Mar 13 12:04:04 2012 +0000 sna: Only use the cpu bo for xfer between CPU and GPU if either is busy The synchronisation costs overwhelm any benefit from offloading the copy, unless we are currently streaming the updates anyway. Signed-off-by: Chris Wilson commit c9668a772f15ab36d643a9b0616b309856146c89 Author: Chris Wilson Date: Mon Mar 12 23:28:51 2012 +0000 sna: Reduce OVER with a clear pixmap to a BLT Signed-off-by: Chris Wilson commit 2ea58256f5ce6e1c0f48d366ff7a1fbf300600de Author: Chris Wilson Date: Mon Mar 12 23:05:17 2012 +0000 sna: Reuse the same upload buffer for the duration of the batch Signed-off-by: Chris Wilson commit 8b9abe2be1f54bd8e8593ed155cc4725ac97627a Author: Chris Wilson Date: Mon Mar 12 21:09:19 2012 +0000 sna: Prefer to render very thin trapezoids inplace Signed-off-by: Chris Wilson commit 1e2d6ee31a21267ba27e4bebb883aaab08a12f30 Author: Chris Wilson Date: Mon Mar 12 20:34:42 2012 +0000 sna: Always reset the source counter after rendering to with the CPU The goal is to avoid moving to the GPU too early for a frequently modified CPU buffer. Signed-off-by: Chris Wilson commit 7bde1f55a1075eefab0f083833508265fc0e91e7 Author: Chris Wilson Date: Mon Mar 12 20:25:50 2012 +0000 sna: After move-to-gpu signals yes, force the GPU bo creation Signed-off-by: Chris Wilson commit 2ee7de1f1711d1058e5812c6aa0d94ecf9af7d8d Author: Chris Wilson Date: Mon Mar 12 20:09:05 2012 +0000 sna/trapezoids: Reduce mono ADD/OVER against a clear background to a SRC Signed-off-by: Chris Wilson commit 99c239e380b9f5134afc75bf55bf3f69e5113e38 Author: Chris Wilson Date: Mon Mar 12 19:49:30 2012 +0000 sna: Treat backing pixmaps no differently from their forward facing cousins Another fix for the large buffers overhaul. Signed-off-by: Chris Wilson commit 28792be1f31190171644d911d7b5573186fe2df2 Author: Chris Wilson Date: Mon Mar 12 19:45:35 2012 +0000 sna/display: Only flush pending output when installing a new scanout Signed-off-by: Chris Wilson commit 278c329b9e2aa9a94bd0d0ee73939814ac514e3d Author: Chris Wilson Date: Mon Mar 12 11:50:54 2012 +0000 sna/trapezoids: Further improve the clipping criteria for inplace traps Not only must we defend against the span starting too far to the right, we must also defend against the span terminating too far to the left. Signed-off-by: Chris Wilson commit 7ae45584327a10b05f7aee99bcb71e9d990a3e9b Author: Chris Wilson Date: Mon Mar 12 10:49:46 2012 +0000 sna/trapezoids: Add paranoia to ensure that the span starts within the clip Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47226 Signed-off-by: Chris Wilson commit 8136bc5e113ae06c30def3c91b1615e5fab8af44 Author: Chris Wilson Date: Sun Mar 11 19:45:55 2012 +0000 sna: Make the maximum BLT pitch assertions consistent The maximum permissibly BLT pitch value is 32767, so make the assertions match... Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47206 Signed-off-by: Chris Wilson commit 989615493608525fc252e4e94ac7259cba0741f5 Author: Chris Wilson Date: Fri Mar 9 22:44:16 2012 +0000 sna: Feed fallback mono trapezoids through the mono rasteriser Signed-off-by: Chris Wilson commit 552e4fbd2c25eb5ab0ae77e11f5f8ba2fdb29daa Author: Chris Wilson Date: Fri Mar 9 20:02:44 2012 +0000 sna/traps: Add a fast path for narrow masks Signed-off-by: Chris Wilson commit 494edfaaacaae13adfa5e727c66a83cb2294d330 Author: Chris Wilson Date: Fri Mar 9 12:19:33 2012 +0000 sna: Handle partial reads with a pending clear Skip the filling of the whole pixmap if we have a small read and we know the GPU bo is clear. Also choose to operate inplace on the GPU bo if we meet the usual criteria. Signed-off-by: Chris Wilson commit bd62dc73dcdbab34aa5c83382e46c7315d554a1a Author: Chris Wilson Date: Fri Mar 9 10:37:34 2012 +0000 sna/traps: Apply somes simple but common operator reduction for clipmasks Signed-off-by: Chris Wilson commit c25a3f7f46010660f441070ab7b9d5d1bc39ed0d Author: Chris Wilson Date: Fri Mar 9 09:43:46 2012 +0000 sna/dri: Only delivered a delayed flip if the drawable is still on the root Signed-off-by: Chris Wilson commit 93846b468e778440549ef0cae171c7fe9678ed9a Author: Chris Wilson Date: Fri Mar 9 09:43:24 2012 +0000 sna/traps: Remove some dead code This function was never used in this implementation, remove it. Signed-off-by: Chris Wilson commit 90c995736555ce14b08b69a42832d9774ba58304 Author: Chris Wilson Date: Fri Mar 9 00:37:32 2012 +0000 sna: Emit a INFO when compiled with debugging enabled It is useful to know and to receive confirmation that you have successfully compiled and executed the driver with debugging enabled. Signed-off-by: Chris Wilson commit 2e194f33db0437ea2f25c22efdad9552aefcab2f Author: Chris Wilson Date: Thu Mar 8 18:07:22 2012 +0000 sna/traps: Fix the initialisation of the error term for vertical mono edges Signed-off-by: Chris Wilson commit 635c604b787625f93763001951f8bdf66482c682 Author: Chris Wilson Date: Thu Mar 8 18:06:51 2012 +0000 sna/traps: Unroll insertion sort As the compiler cannot know the loop is bounded by a sentinel, manually unroll it. Signed-off-by: Chris Wilson commit a087430ad99c06e79249d2cdd019cb8bf7f955d3 Author: Chris Wilson Date: Thu Mar 8 17:13:39 2012 +0000 sna/gen6: Replace the memset with explict initialisation The profiles told me to kill it... Signed-off-by: Chris Wilson commit 61226cd41faf320f79ee4bd72dc77163079da853 Author: Chris Wilson Date: Thu Mar 8 13:41:58 2012 +0000 sna: Fix handling of large glyphs following large and shared buffer work Part of the large buffer handling was to move the decision making about whether to create GPU bo for a pixmap to creation time. The single instance where we change our minds later is involving large glyphs which we choose not to cache. Signed-off-by: Chris Wilson commit aa7a2bd71275e069a2e4383a26355854b0b8044c Author: Chris Wilson Date: Thu Mar 8 12:27:23 2012 +0000 sna: Fix reversed logic for CREATE_NO_RETIRE If the flag is set, we cannot retire, not the other way around! Signed-off-by: Chris Wilson commit f8d520950edb5cec878999a09d3f7e6f8b15bf5e Author: Chris Wilson Date: Thu Mar 8 12:13:36 2012 +0000 sna: Avoid NULL deference in DBG Only print out the details of the allocated CPU bo, if we actually allocate it. Signed-off-by: Chris Wilson commit 33af42e6284f104ed3c4cdba4bf3b1c29322ce9c Author: Chris Wilson Date: Thu Mar 8 12:10:24 2012 +0000 sna: Force the creation of a backing pixmap for scanout Ordinarily if the GPU is wedged, we just want to create a shadow buffer. Except that we must ensure that we do allow a bo to be created for attaching to the scanout. Signed-off-by: Chris Wilson commit 6abfa4c5662e5294edc501953dbfa7aabf0b2f57 Author: Chris Wilson Date: Thu Mar 8 11:59:02 2012 +0000 sna: Mark the pixmap for writing when creating the screen resources Signed-off-by: Chris Wilson commit 5c5ebd6a3ecf3bd83747003bc272a736b7c333c0 Author: Chris Wilson Date: Thu Mar 8 11:13:34 2012 +0000 intel: Fix typo s/asert/assert/ The joy of conditional compiles masked this compilation failure when testing. Reported-by: Reinhard Karcher Signed-off-by: Chris Wilson commit f6474883d325cff443da9ceaa99ec734e6cdc1d6 Author: Chris Wilson Date: Thu Mar 8 11:04:05 2012 +0000 sna/gen2+: Use the reduced operator from CompositeRectangles Do not attempt to further reduce the operator locally in each backend as the reduction is already performed in the upper layer. References: https://bugs.freedesktop.org/show_bug.cgi?id=42606 Signed-off-by: Chris Wilson commit 2ae3cd36ae98fa43716ef482e70364e7563cf1ea Author: Chris Wilson Date: Thu Mar 8 10:51:05 2012 +0000 sna: Tidy marking pixmap->clear for CompositeRectangles Reduce the two unsightly checks into one. Signed-off-by: Chris Wilson commit 8b21659ef2f9cec799b8215a2e5481667bc744bf Author: Chris Wilson Date: Thu Mar 8 10:50:32 2012 +0000 sna: Add some assertions around pixmap creation for render operations Signed-off-by: Chris Wilson commit 7d74300647dd815ae5b4399f84ea339045d12563 Author: Chris Wilson Date: Thu Mar 8 09:54:16 2012 +0000 sna: Discard unbound partial buffers Instead of keeping a virgin partial buffer around on its inactive list, just transfer it to the global bo cache (in actuality destroy it since it is just a kmalloc with no pages bound). Signed-off-by: Chris Wilson commit 9eb8ba4df2a99342dbb3569c043d84aa82506aba Author: Chris Wilson Date: Thu Mar 8 09:42:58 2012 +0000 sna: Preserve the offset alignment when trimming unused rows from partials Signed-off-by: Chris Wilson commit 8e6166a0e87a00248d0d4925953c923850f5b840 Author: Chris Wilson Date: Thu Mar 8 02:09:25 2012 +0000 sna: Becareful not to reduce operators for superluminal colors wine-1.4 is such an example of a crazy application. References: https://bugs.freedesktop.org/show_bug.cgi?id=42606 Signed-off-by: Chris Wilson commit 3f73cc706ff39cd4c10433791f12b5f829f62e6d Author: Chris Wilson Date: Thu Mar 8 08:54:24 2012 +0000 sna/dri: Use a counter for the number of DRI drawables attached to a pixmap The root pixmap, for instance, may have unique DRI2Drawables for each inferior window. We only want to clear the flush flag on the last release, so we need to keep a count of how many DRI drawables remain attached rather than a solitary flag. Signed-off-by: Chris Wilson commit 49a80ce1ff336fb2fa7d214bd3fddbce5a62b77a Author: Chris Wilson Date: Wed Mar 7 15:52:41 2012 +0000 sna/gen2+: Prefer not to fallback if the source is busy As if we try to perform the operation with outstanding operations on the source pixmaps, we will stall waiting for them to complete. Signed-off-by: Chris Wilson commit 4899740f6f0f5b1a5b2b3490502ccdeb7b092877 Author: Chris Wilson Date: Thu Mar 8 00:57:12 2012 +0000 sna: Do not reset partial buffers if they are not attached to the current batch As we may be holding on to them as an active mapping whilst they are executing; reseting the used counter back to zero in this case can cause corruption. Signed-off-by: Chris Wilson commit 72a7538d4e7bcf0bd7455d9e67d8751e17739e6c Author: Chris Wilson Date: Wed Mar 7 15:45:21 2012 +0000 sna: Convolution filter fixes A couple of typos made the convolution filter explode rather than convolve. Signed-off-by: Chris Wilson commit 34fe3cbb316c36c7022735cf9b03d8b655e04434 Author: Chris Wilson Date: Wed Mar 7 17:49:01 2012 +0000 sna: Avoid recursive calls to kgem_retire_partials() Whilst iterating the partial list and uploading the buffers, we need to avoid trigger a recursive call into retire should we attempt to shrink a buffer. Such a recursive call will modify the list beneath us so that we chase a stale pointer and wreak havoc with memory corruption. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47061 Signed-off-by: Chris Wilson commit 46c79e4d59ec4f90a1fa97b24a3e7058fdbfa6ba Author: Chris Wilson Date: Wed Mar 7 13:17:21 2012 +0000 sna: Restore checking for all-clipped-out for CompositeRectangles In the refactoring to avoid repeatedly applying the singular pCompositeClip, the check for the all-clipped state was lost. Signed-off-by: Chris Wilson commit 9944f1834a9c53091e4415f928f917e9247f17c5 Author: Chris Wilson Date: Wed Mar 7 10:47:42 2012 +0000 sna/gen2: Fix transformation of linear gradients Signed-off-by: Chris Wilson commit df25495eaab5bcd5baf86047a2dd0149eea00d1e Author: Chris Wilson Date: Wed Mar 7 10:43:24 2012 +0000 sna/gen4: Hook in the poor-man's linear gradient Signed-off-by: Chris Wilson commit 69d6a0387b8eec8396631714a0564b7e28d187ab Author: Chris Wilson Date: Wed Mar 7 10:43:24 2012 +0000 sna/gen5: Hook in the poor-man's linear gradient Signed-off-by: Chris Wilson commit b0d3c4f661bace84b78b194eaeee7bfa009a32cf Author: Chris Wilson Date: Wed Mar 7 10:43:24 2012 +0000 sna/gen7: Hook in the poor-man's linear gradient Signed-off-by: Chris Wilson commit dcc364a7b190ce9cec2ff35aa22c10529f84e4c3 Author: Chris Wilson Date: Wed Mar 7 10:40:50 2012 +0000 sna/gen6: Add poor-man's linear implementation Still no JIT, in the meantime we can at least cache the gradient ramps. Signed-off-by: Chris Wilson commit 232972c0e5bd833c1d0b33432fa8092c601fd0e5 Author: Chris Wilson Date: Tue Mar 6 12:17:03 2012 +0000 sna: Remove the 2-step damage flush The idea was to reduce the number of unnecessary flushes by checking for outgoing damage (could be refined further by inspecting the reply/event callback for a XDamageNotifyEvent). However, it does not flush sufficiently for the compositors' liking. As it doesn't appear to restore performance to near uncomposited levels anyway, remove the complication. Signed-off-by: Chris Wilson commit eb10ade0fc8e21cd01c0d8acba7891fd7f2aa222 Author: Chris Wilson Date: Mon Mar 5 22:55:57 2012 +0000 sna: Defer the FlushCallback removal until after the next flush Try to reduce the amount of Add/Delete ping-pong, in particular around the recreation of the DRI2 attachment to the scanout after pageflipping. Signed-off-by: Chris Wilson commit 60dacdb127599606db13ad111af8ce26c1141da5 Author: Chris Wilson Date: Mon Mar 5 22:46:20 2012 +0000 sna: Only install the flush callback for the duration of the foriegn buffer After we are no longer sharing the bo with foreign clients, we no longer need to keep flushing before every X_Reply and so we can remove the callbacks to remove the overhead of having to check every time. Signed-off-by: Chris Wilson commit b39d9f9166547effe066acfc3327dd88a019d273 Author: Chris Wilson Date: Mon Mar 5 22:29:38 2012 +0000 sna: Check for flush at the start of every WriteToClient The goal is to simply avoid the flush before going to sleep when we have no pending events. That is we only want to flush when we know there will be at least on X_Reply sent to a Client. (Preferably, it would a Damage reply!) We can safe assume that every WriteToClient marks the beginning of a new reply added to the Client output queue and thus know that upon the next flush event we will emitting a Reply and so need to submit our batches. Second attempt to fix a438e4ac. Signed-off-by: Chris Wilson commit f30b0beea4f5657a60eb5b286f41105298fa451a Author: Chris Wilson Date: Sun Mar 4 22:23:39 2012 +0000 sna/trapezoids: Ellide empty cells Signed-off-by: Chris Wilson commit b69c9dfae128ed69a397a066b8fbe62012742bf1 Author: Chris Wilson Date: Mon Mar 5 21:05:34 2012 +0000 sna/composite: Skip clipping the rectangle region against the singular clip As we will already have taken it into account when constructing the region from the rectangles. Signed-off-by: Chris Wilson commit f4846168a60feca7437f0039612ba9986c5f8d77 Author: Chris Wilson Date: Mon Mar 5 21:04:25 2012 +0000 sna: Flush dirty CPU damage before notifying the compositor Fixes regression from a438e4ac (sna: Revamp vmap support) Signed-off-by: Chris Wilson commit d7600e4e7726bb8bd6c7256ad2baf195d4427c60 Author: Chris Wilson Date: Sun Mar 4 19:12:29 2012 +0000 sna: Add some assertions to partial buffer list tracking Signed-off-by: Chris Wilson commit 3b5d556a93ac0afebf6c1dd02e0c92f6eb73f633 Author: Chris Wilson Date: Sun Mar 4 15:48:33 2012 +0000 sna: Fix assertion for checking inactive shadow buffers We may have an ordinary malloc with no CPU bo attached so check before dereferencing. Signed-off-by: Chris Wilson commit aaed9e9722aa30a3d6dc9a3f07309655de65b6bd Author: Chris Wilson Date: Fri Mar 2 23:31:24 2012 +0000 sna: Encourage promotion of snooped CPU bo to real GPU bo This fixes the regression in performance of fishietank on gen2. As the texture atlas is too large to be tiled, one might presume that it has the same performance characteristics as the snooped linear CPU buffer. It does not. Therefore if we attempt to reuse a vmap bo, promote it to a full GPU bo. This hopefully gains the benefit of avoiding the copy for single shot sources, but still gives us the benefit of avoiding the clflushes. On the plus side, it does prove that gen2 handles snoopable memory from both the blitter and the sampler! Signed-off-by: Chris Wilson commit 599cd0e8ef3080fc735860bef4e47107c1c05f9a Author: Chris Wilson Date: Fri Mar 2 20:18:32 2012 +0000 sna: Align allocations with partial buffers to 64 bytes. A magic number required for so many functions of the GPU. In this particular case it is likely to be that the offset of a texture in the GTT has to have a minimum alignment of 64 bytes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46415 Signed-off-by: Chris Wilson commit 4918e309dfadaf14da6997468f08db03ac0a6327 Author: Chris Wilson Date: Fri Mar 2 18:18:48 2012 +0000 sna: Silence an assertion failure during shutdown Clear the scanout flag on the front buffer during teardown to silence the debugger. Signed-off-by: Chris Wilson commit f890fc25c6c2ca358323be5a0d636c3f2ab4b298 Author: Chris Wilson Date: Fri Mar 2 18:11:56 2012 +0000 sna: And fix compilation for last commit I skipped a GCC warning about the implicit function declaration, which of course results in a runtime silent death. Oops. Signed-off-by: Chris Wilson commit 4f853acfeccb92885f154b03125d5716591a87bd Author: Chris Wilson Date: Fri Mar 2 17:36:50 2012 +0000 sna: Prevent backing pixmaps being created later We used to allow the backing pixmap to be created later in order to accommodate ShmPixmaps and ShmPutImage. However, they are now correctly handled upfront if we choose to accelerate those paths, and so all choice over whether to attach to a pixmap are made during creation and are invariant. Signed-off-by: Chris Wilson commit 866a61a2590f0c5ae6592a13d4e3de3e68f5e373 Author: Chris Wilson Date: Fri Mar 2 16:06:59 2012 +0000 sna: Disable vmap on 965gm The sampler just dies if it encounters a snoopable page, for no apparent reason. Whilst I encountered the bug on Crestline, disable it for the rest of gen4 just to be safe. Signed-off-by: Chris Wilson commit 1c653786895fc30be0e88455ce5f9caf9adc835d Author: Chris Wilson Date: Fri Mar 2 14:34:23 2012 +0000 sna: Pass usage hint for creating linear buffers As we wish to immediate map the vertices buffers, it is beneficial to search the linear cache for an existing mapping to reuse first. Signed-off-by: Chris Wilson commit 29ec36ff063472e0744af99aa81ed5ad8e291a36 Author: Chris Wilson Date: Fri Mar 2 10:01:07 2012 +0000 sna: Only discard the inplace flag for LLC partial buffers KGEM_BUFFER_WRITE_INPLACE is WRITE | INPLACE and so the typo prevented uploading of partial data through the pwrite paths. Signed-off-by: Chris Wilson commit f039ccf9587eb07528034c3247a6e700c87a5500 Author: Chris Wilson Date: Fri Mar 2 09:47:10 2012 +0000 sna: Be careful not to discard the clear operation for move-region-to-cpu When moving only a region to the CPU and we detect a pending clear, we transform the operation into a move whole pixmap. In such situations, we only have a partial damage area and so need to or in MOVE_READ to prevent the pending clear of the whole pixmap from being discarded. References: https://bugs.freedesktop.org/show_bug.cgi?id=46792 Signed-off-by: Chris Wilson commit 392593e61dac3ac65ee8e32de492c4439413ee85 Author: Chris Wilson Date: Thu Mar 1 17:54:51 2012 +0000 sna/gen5: Help the compiler avoid an uncached read Debug builds are excruitatingly slow as the compiler doesn't store the temporary in a register but uses an uncached readback instead. Maybe this will help... Signed-off-by: Chris Wilson commit 9c0c04cac245db046ef17ff24c32e6ab93535f48 Author: Chris Wilson Date: Thu Mar 1 14:52:39 2012 +0000 sna: Split storage of inactive partials As we now attempt to keep retain partial buffers after execution, we can end up will lots of inactive buffers sitting on the partial buffer list. In any one batch, we wish to minimise the number of buffers used, so keep all the inactive buffers on a seperate list and only pull from them as required. Signed-off-by: Chris Wilson commit a438e4ac9ba162e870fb22bc54024d35daa2121e Author: Chris Wilson Date: Tue Feb 28 19:15:34 2012 +0000 sna: Revamp vmap support Dust off the kernel patches and update to reflect the changes made to support LLC CPU bo, in particular to support the unsynchronized shadow buffers. However, due to the forced synchronisation required for strict client coherency we prefer not to use the vmap for shared pixmaps unless we are already busy (i.e. sync afterwards rather than before in the hope that we can squash a few operations into one). Being able to block the reply to the client until the request is actually complete and so avoid the sync remains a dream. Signed-off-by: Chris Wilson commit 272f5d9f8407d8084846b429c1722bddb3e861e9 Author: Chris Wilson Date: Thu Mar 1 11:10:03 2012 +0000 sna: Discard use of inplace GTT uploads on LLC architectures As the buffer is cache-coherent, we can read as well as write to any partial buffer so the distinction is irrelevant. Signed-off-by: Chris Wilson commit 43b1a717bae047c7ebbf99e6fa4c03b7a67896b8 Author: Chris Wilson Date: Tue Feb 28 13:37:14 2012 +0000 sna: Sort the partial buffers after stealing a write buffer It will be decoupled and not used again, but this keeps the sanity checks happy. Signed-off-by: Chris Wilson commit 8198e5872c3771e2aefabe1e3e93afa94d2ea0ec Author: Chris Wilson Date: Tue Feb 28 10:42:19 2012 +0000 sna/gen3: Tweak glyph rendering fast paths Signed-off-by: Chris Wilson commit 3c4f29820bca336af2c997bafc7ef288b455813c Author: Chris Wilson Date: Mon Feb 27 16:29:38 2012 +0000 uxa/gen3: Remove special casing of solid pictures Fixes use of alpha-groups and opacity masks in cairo. Signed-off-by: Chris Wilson commit 8f3066f0c70654f04f4acadf140e3c5c8dda051d Author: Chris Wilson Date: Mon Feb 27 13:58:58 2012 +0000 sna/gen2; Initialise channel.is-opaque for fills Signed-off-by: Chris Wilson commit 3640a0d4cb9e0f115fda9ea36212670f6ccafb22 Author: Chris Wilson Date: Mon Feb 27 12:28:22 2012 +0000 Revert "meh" This reverts commit 4adb6967a84af8a04769c2d936a41f4a49ed1428. Oops, this debugging commit was not intended to be pushed along with the bugfix. :( Signed-off-by: Chris Wilson commit 6fd8d74a6aedb6484e53e704d9f44e0bf83ae9ab Author: Chris Wilson Date: Mon Feb 27 12:06:50 2012 +0000 sna: Upload the ordinary partial buffers! Signed-off-by: Chris Wilson commit 4adb6967a84af8a04769c2d936a41f4a49ed1428 Author: Chris Wilson Date: Mon Feb 27 11:36:35 2012 +0000 meh commit 4fbb0baff525115037f7e5a1689541880a6cdafb Author: Chris Wilson Date: Sun Feb 26 22:34:30 2012 +0000 sna: Avoid reusing mmapped partial write buffers for readback An artefact of retaining the mmapped partial buffers is that it magnified the effect of stealing those for readback, causing extra writes on non-llc platforms. Signed-off-by: Chris Wilson commit a3c398a6731874ba47e0a46bbd42bf9378e12ab8 Author: Chris Wilson Date: Sat Feb 25 10:59:14 2012 +0000 sna: Retain unfinished partial buffers between batches Signed-off-by: Chris Wilson commit 8d773b88f45594f45174dc6f1a264d968690ce84 Author: Chris Wilson Date: Sat Feb 25 09:32:20 2012 +0000 sna/gen3+: Keep the vertex buffer resident between batches Signed-off-by: Chris Wilson commit 8cb773e7c809e1de23cd64d3db862d1f8e7e955a Author: Chris Wilson Date: Sat Feb 25 11:07:16 2012 +0000 sna: Ensure we trigger a retire for search_linear_cache Bo used for batch buffers are handled differently and not tracked through the active cache, so we failed to notice when we might be able to run retire and recover a suitable buffer for reuse. So simply always run retire when we might need to create a new linear buffer. Signed-off-by: Chris Wilson commit b1b4db8942e69d47aabfad3751165dc2252fa448 Author: Chris Wilson Date: Sat Feb 25 00:43:30 2012 +0000 sna: Skip a tiled bo when searching the cache for a linear mmap If we change tiling on a bo, we are effectively discarding the cached mmap so it is preferable to look for another. Signed-off-by: Chris Wilson commit 85e48d2e5eb029d8c17714cb5e7db39ea06a2455 Author: Chris Wilson Date: Fri Feb 24 21:40:44 2012 +0000 legacy: Rename XF86DRI to HAVE_DRI1 to avoid conflicts with xorg-server.h We use the XF86DRI as a user configurable option to control whether to build DRI support for i810, but it is also used internally within xorg and there exists a public define in xorg-server.h which overrides our configure option. So rename our define to HAVE_DRI1 to avoid the conflict. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46590 Signed-off-by: Chris Wilson commit 96db90e819a1990c2d139725e522055e92def959 Author: Chris Wilson Date: Fri Feb 24 21:36:30 2012 +0000 legacy: Delete unused XF86DRI_DEVEL #define References: https://bugs.freedesktop.org/show_bug.cgi?id=46590 Signed-off-by: Chris Wilson commit b870a3e5cd922ce37050ece73e2469802dd21da2 Author: Chris Wilson Date: Fri Feb 24 11:21:49 2012 +0000 configure, NEWS: Bump version to 2.18.0 for release Another quarter, a bit late as I was debugging a few regressions, another release. Signed-off-by: Chris Wilson commit 5b5cd6780ef7cae8f49d71d7c8532597291402d8 Author: Chris Wilson Date: Fri Feb 24 11:14:26 2012 +0000 uxa: Add a option to disable the bo cache If you are suffering from regular X crashes and rendering corruption with a flood of ENOSPC or even EFILE reported in the Xorg.log, try adding this snippet to your xorg.conf: Section "Driver" Option "BufferCache" "False" EndSection References: https://bugs.freedesktop.org/show_bug.cgi?id=39552 Signed-off-by: Chris Wilson commit f8ca50818cd4f82e0ad8eeb245e8ee838b083056 Author: Gaetan Nadon Date: Sat Feb 18 13:49:02 2012 -0500 Revert "Update autotools configuration" This reverts commit 9184af921bc2f332fcb6c9b47001414378eab8e2. All X.Org modules must be able to be configured with autoconf 2.60. In addition, version 2.63 has GPL licensing issues which prevents some vendor to release software based on it. The AM_SILENT_RULES are already handled by XORG_DEFAULT_OPTIONS. All X.Org modules must be able to be configured with libtool 1.5. AM_MAINTAINER_MODE default value is "enabled" already. We use the same autogen script for all x.org modules. There are proposals for changes which should be reviewed and eventually applied to all modules together. The lt*.m4 patterns are already included in the root .gitignore file. This can be proposed as a change to all modules, but it invloves changing the topvel .gitignore, the m4/.gitignore, the ACLOCAL_AMFLAGS and the AC_CONFIG_MACRO_DIR together. For more information on project wide configuration guidelines, consult http://www.x.org/wiki/ModularDevelopersGuide and http://www.x.org/wiki/NewModuleGuidelines. Acked-by: Matthieu Herrb Signed-off-by: Gaetan Nadon commit a647aff5124674b638ef52152a5c16c27466eed7 Author: Chris Wilson Date: Thu Feb 23 12:04:09 2012 +0000 sna/gen3: Silence the compiler complaining with DBG enabled Signed-off-by: Chris Wilson commit cd3a618f583a546bafbe0c171a267774adc4d72b Author: Chris Wilson Date: Thu Feb 23 10:40:57 2012 +0000 sna/gen4 Refactor get_rectangles() to re-emit state after a flush Condense the work performed by each caller into the callee. Signed-off-by: Chris Wilson commit 6a3fa4d1b6849b666a9232b017ce82329494621b Author: Chris Wilson Date: Thu Feb 23 10:40:57 2012 +0000 sna/gen7 Refactor get_rectangles() to re-emit state after a flush Condense the work performed by each caller into the callee. Signed-off-by: Chris Wilson commit fe914eaca4b9178ab3d14053a703772f93295895 Author: Chris Wilson Date: Thu Feb 23 10:40:57 2012 +0000 sna/gen5 Refactor get_rectangles() to re-emit state after a flush Signed-off-by: Chris Wilson commit 4ecf882c838c1f044b4ed3add486b6579ea2c431 Author: Chris Wilson Date: Thu Feb 23 10:40:57 2012 +0000 sna/gen6: Refactor get_rectangles() to re-emit state after a flush Signed-off-by: Chris Wilson commit dfa21713c27eb9135cb5e1745807324e49422fde Author: Chris Wilson Date: Thu Feb 23 10:29:38 2012 +0000 sna/gen3: Refactor get_rectangles() to emit composite state and retry As gen3 only uses the single state emission block, and uniformly calls get_rectangles(), we can move that caller protocol into the callee. Signed-off-by: Chris Wilson commit a48e6e0db970ad07cd7452ba24c362d0c2fcf1bf Author: Chris Wilson Date: Thu Feb 23 10:17:34 2012 +0000 sna/gen3+: Force a batch flush when run out of CA vbo As we prematurely end the batch if we bail on extending the vbo for CA glyphs, we need to force the flush. Signed-off-by: Chris Wilson commit 57c19b10db2b512c52a593fad98b5ac5db4f1497 Author: Chris Wilson Date: Thu Feb 23 00:33:16 2012 +0000 sna: Use a CPU mapping if the bo is already in the CPU domain The heuristic of using the mapping only before the first use in an execbuffer was suboptimal and broken by the change in bo initialisation. Signed-off-by: Chris Wilson commit 510767e213c2f44563f5c438ad1234113567be90 Author: Chris Wilson Date: Wed Feb 22 18:33:09 2012 +0000 sna/gen4: Fix vertex flushing across batch flushing Due to the w/a for its buggy shaders, gen4 is significantly different that backporting the simple patch from gen5 was prone to failure. We need to check that the vertices have not already been flushed prior to flushing again. Signed-off-by: Chris Wilson commit f6392048e3e761b35644268ef161045524cfa369 Author: Chris Wilson Date: Wed Feb 22 17:00:38 2012 +0000 sna/blt: Avoid clobbering the composite state if we fail to setup the BLT Signed-off-by: Chris Wilson commit 4e86da64be947fe4b8b5f285d26d200827847a8c Author: Chris Wilson Date: Wed Feb 22 14:36:35 2012 +0000 sna/gen3+: Flush the vertices during vertex-finish But only when finishing the vbo, which is the tricky part of the recent CA glyph bugs. Signed-off-by: Chris Wilson commit 71512b2438e06b2bd256aff3657797152fbef38e Author: Chris Wilson Date: Wed Feb 22 13:44:24 2012 +0000 sna: Clear the flush flag on release of scanout/dri Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46445 Signed-off-by: Chris Wilson commit 025d3d46dc28e967b4f42e5748d13c7fb3ad283b Author: Chris Wilson Date: Wed Feb 22 13:17:01 2012 +0000 sna/trapezoids: Only the inplace PictOpIn is unbounded Signed-off-by: Chris Wilson commit b02f866d67d60538368619849f2acda4c1706476 Author: Chris Wilson Date: Wed Feb 22 09:15:25 2012 +0000 sna: Ensure we restore the shadow pixels before uploading CPU data Reported-by: Joe Nahmias Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46425 Signed-off-by: Chris Wilson commit be5df7b5ab487a1282c96dda92f3799e35cd19af Author: Chris Wilson Date: Tue Feb 21 23:27:33 2012 +0000 sna/gen5: Remove CA glyph workaround The root cause has been found and destroyed, so the w/a is now redundant. Signed-off-by: Chris Wilson commit 6038cede83e7f360428b4625d288411794f9d052 Author: Chris Wilson Date: Tue Feb 21 21:26:29 2012 +0000 sna/gen3+: Re-emit composite state after flushing CA vertices Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42891 Signed-off-by: Chris Wilson commit fe6602cbbc4eed1b88ac731a30b46cc970ea444f Author: Chris Wilson Date: Tue Feb 21 21:26:29 2012 +0000 sna/gen3+: Only flush the vertices after checking for end-of-batch Or upon actually closing the vertex buffer. However, the underlying issue remains. That is we are failing to re-emit the first-pass for CA text after flushing the vertex buffer (and so emitting the second-pass for the flushed vertices). Reported-by: lemens Eisserer References: https://bugs.freedesktop.org/show_bug.cgi?id=42891 Signed-off-by: Chris Wilson commit 168c87a340119e65b1d7ccbbf59da820044ca936 Author: Chris Wilson Date: Tue Feb 21 13:16:43 2012 +0000 sna: Clear the scanout flag after releasing the scanout pixmap In the future, this will be a good place to restore the cache level of the bo as well. Signed-off-by: Chris Wilson commit d7415742a5f78958489216f450411603b1eff9a7 Author: Chris Wilson Date: Tue Feb 21 16:33:26 2012 +0000 sna/dri: Queue a flush on the back DRI2 when enqueing a flip As we may wait upon the bo having finished rendering before we can execute the flip, flushing the render cache as early as possible is beneficial Signed-off-by: Chris Wilson commit 2715a455f7bfbecd7a6977184dc6180a09d06e1f Author: Chris Wilson Date: Tue Feb 21 14:49:30 2012 +0000 uxa: Prevent laggy applications by throttling after rendering Before blocking and waiting for further input, we need to make sure that we have not developed too large a queue of outstanding rendering. As we rendering to the front-buffer with no natural throttling and allow X clients to render as fast as they wish, it is entirely possible for a large queue of outstanding rendering to develop. For such an example, watch firefox rendering the fishietank demo and notice the delay that can build up before the tooltips appear. Signed-off-by: Chris Wilson commit 26721893cb41cef66db7ef626881d1eba8a5bdea Author: Chris Wilson Date: Tue Feb 21 13:31:16 2012 +0000 sna: Mark the pixmap as active for the force-to-gpu short-circuit Signed-off-by: Chris Wilson commit 1541f1afca028453379083e564bc82debf0ba39a Author: Chris Wilson Date: Tue Feb 21 13:17:35 2012 +0000 sna: Skip the CPU synchronization when marking a pixmap as inactive Signed-off-by: Chris Wilson commit 74fd55a96bd6c63e9c49a4b7fee7ef91f6b00a2c Author: Chris Wilson Date: Tue Feb 21 13:11:32 2012 +0000 sna/dri: Ensure that we reattach to the DRI2 front buffer after modeswitch If we change the Screen pixmap due to a change of mode, we lose the flag that we've attached a DRI2 buffer to it. So the next time we try to copy from/to it, reassert its DRI2 status. Signed-off-by: Chris Wilson commit d051793b9194060f5408503b1fac56958c6e58e4 Author: Chris Wilson Date: Tue Feb 21 11:42:31 2012 +0000 sna/dri: Improve error handling of failing to create a DRI2 pixmap Signed-off-by: Chris Wilson commit 580ae520cad749fb86a1bddd0fa2bcadfd60abb6 Author: Chris Wilson Date: Tue Feb 21 10:55:46 2012 +0000 sna: Short-circuit repeated calls to force-to-gpu Signed-off-by: Chris Wilson commit f2aafb98026b5c476b7f84aa2dc4c1f9ba2e573d Author: Chris Wilson Date: Tue Feb 21 10:43:11 2012 +0000 uxa: Silence compiler warning for const arguments i965_video.c: In function 'gen6_create_cc_state': i965_video.c:1374:12: warning: passing argument 4 of 'intel_bo_alloc_for_data' discards 'const' qualifier from pointer target type [enabled by default] Repeated ad nauseam. Signed-off-by: Chris Wilson commit 507f72d6d44963cae5d8d4b9da68165f73c6fd36 Author: Chris Wilson Date: Tue Feb 21 10:39:48 2012 +0000 uxa: Remove DPRINTF stubs It wasn't being used for anything non-trivial and was throwing compiler warnings, so remove it. Signed-off-by: Chris Wilson commit c72a67390ea243bf43e2ee4efe237ab88a4615b7 Author: Chris Wilson Date: Tue Feb 21 10:21:56 2012 +0000 sna/dri: Update for AsyncSwap interface changes We now need to return TRUE/FALSE depending on whether we need to invalidate the drawable. Signed-off-by: Chris Wilson commit 27bc2acf0e6a0e5e071e0d187bdf71577e821af8 Author: Chris Wilson Date: Tue Feb 21 09:29:41 2012 +0000 sna: Fix use of RegionInit() for singular regions For a singular region, we want to use a value for nboxes of 0 not 1, fortunately if you pass in a box, it ignores the value of nboxes. RegionInit() is a most peculiar API! Signed-off-by: Chris Wilson commit d98b41ce4323b43d2359349a04a4a56559e341a2 Author: Zhigang Gong Date: Fri Feb 17 19:50:52 2012 +0800 uxa/glamor/dri: Should fixup the drawable pixmap. Two fixes in this commit, first we only need to check the front left buffer, for other attachment we don't need to check them. The second is, we should fixup the pixmap's drawable not the original drawable. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit 1e0d702c3a77f6db3dfd55b8cafc5fca4d778751 Author: Zhigang Gong Date: Fri Feb 17 19:50:51 2012 +0800 uxa/glamor/dri: Enable the pageflip support on glamor. To support easy buffer exchange at glamor layer, glamor added a new API glamor_egl_exchange_buffers() to exchange two pixmaps' EGL image and fbos and textures without recreating any of them. But this simple method's requirement is that there are two pixmaps. A exceptional case is: If we are using triple buffer when do page flipping, we will have an extra back_buffer which doesn't have a pixmap attached to it. Then each time we set that buffer to a pixmap, we will have to call the create_egl_textured_pixmap to create the corresponding EGL image and fbo and texture for it. This is not efficient. To fix this issue, this commit introduces a new back_pixmap to intel structure to hold the back buffer and corresponding glamor resources. Then we will just need to do the light weight buffer exchanging at both DDX and glamor layer. As the new back pixmap is similar to the screen pixmap and need to be handled carefully when close screen. As the glamor data structure is a per screen data, and will be released at its close screen method. The glamor's close screen method must cleanup the screen pixmap and back pixmap's glamor resources. screen pixmap is easy to get, but there is no good way to store the back pixmap. So the glamor add a new API glamor_egl_create_textured_screen_ext function to pass the back pixmap's pointer to glamor layer. This commit make us depend on glamor commit: 4e58c4f. And we increased the required glamor version from 0.3.0 to 0.3.1 Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit ce7a57994d662f340b9457a2750e4385e7d669cd Author: Zhigang Gong Date: Fri Feb 17 19:50:50 2012 +0800 uxa/dri: Refine the pageflip processing. Add a new element back_name to intel structure to track the back bo's name then avoid flink every time. And at function I830DRI2ExchangeBuffers, after finish the BO exchange between info's front and back pixmap, it set the new front bo to the screen pixmap. But the screen pixmap should be the same as front's pixmap, so this is a duplicate operation and can be removed. Signed-off-by: Zhigang Gong commit 1a65e2b8a2ebfb4d736efb7631515babad75faf2 Author: Chris Wilson Date: Tue Feb 21 08:09:52 2012 +0000 sna: Split up/down edge walking in order to handle endpoint clipping In order to prevent walking upwards off the top of the pixmap when rendering a clipped vertical edge, we need to tweak the boundary conditions for the vertical edge walker. Reported-by: Clemens Eisserer References: https://bugs.freedesktop.org/show_bug.cgi?id=46261 Signed-off-by: Chris Wilson commit 7ea44997553ffdf57b346dc9d83742c511c9e5a4 Author: Chris Wilson Date: Mon Feb 20 23:50:42 2012 +0000 sna: Restore the shadow pixels when reducing CPU damage to all Reported-by: Joe Nahmias References: https://bugs.freedesktop.org/show_bug.cgi?id=46346 Signed-off-by: Chris Wilson commit dbe0580e207ad85cb6a659f86c5746a7ecbcd036 Author: Chris Wilson Date: Mon Feb 20 16:30:53 2012 +0000 sna: gen4+ suffer no penalty for changing tiling On gen4, the tiling/fence constraints are fairly lax, only requiring page alignment of the object and its size, and so we can switch tiling modes without incurring a GPU stall on active bo. Signed-off-by: Chris Wilson commit b68b76cf54a322e80685f1ec93538cd6c5813ea4 Author: Chris Wilson Date: Mon Feb 20 13:38:11 2012 +0000 sna: Move sync'ing of CPU bo after allocation to first write The idea was that we could afford to allocate an active CPU bo for copying to from using the GPU and later sync just before we need to write to the shadow pixels. Having the sync inside the allocation function potentially causes an unwanted stall. Signed-off-by: Chris Wilson commit bbb6794a3b97b1fcf72c8712ab0ec591683b128b Author: Chris Wilson Date: Mon Feb 20 12:25:31 2012 +0000 sna: Trim clipped lines to end within bounds References: https://bugs.freedesktop.org/show_bug.cgi?id=46261 References: https://bugs.freedesktop.org/show_bug.cgi?id=45673 Signed-off-by: Chris Wilson commit 805bc3310cd0a13eab8e48e7615bdd42638cfa33 Author: Chris Wilson Date: Mon Feb 20 12:09:19 2012 +0000 sna: When reversing line-drawing direction, use the clipped endpoint Make sure we take the clipping into account if we choose to reverse the draw direction (to maintain left-to-right inside the box emission). References: https://bugs.freedesktop.org/show_bug.cgi?id=46261 References: https://bugs.freedesktop.org/show_bug.cgi?id=45673 Signed-off-by: Chris Wilson commit 7f0a4a5f7224003a0cd226137de5a068949a41b4 Author: Chris Wilson Date: Mon Feb 20 09:52:37 2012 +0000 sna/dri: Ensure the domain tracking is reset when releasing bo used for swaps Signed-off-by: Chris Wilson commit 7d147c7462ba183f5316e7e8dafeca62add6f97c Author: Chris Wilson Date: Sun Feb 19 17:50:56 2012 +0000 sna: Correct tile sizes for Y-tiling on i915g 128-byte Y-tiling wasn't introduced until the 945. Signed-off-by: Chris Wilson commit 95391b7312147760d8da01fce68b8398aa8e4e2f Author: Chris Wilson Date: Thu Feb 16 22:01:41 2012 +0000 sna/trapezoids: Presume that Precise mono rasterisation adheres to the spec References: https://bugs.freedesktop.org/show_bug.cgi?id=46156 Signed-off-by: Chris Wilson commit 52b11f63d7922032caef0f0a5979b080dbddcbfc Author: Chris Wilson Date: Thu Feb 16 11:22:23 2012 +0000 sna: Upconvert fallback trapezoids to a8 Since the hardware only handles a8 without tricky emulation and pixman insists on using a1 for sharp trapezoids we need to ensure that we convert the a1 to a8 for our trapezoidal mask. More worryingly, this path should never be hit... References: https://bugs.freedesktop.org/show_bug.cgi?id=46156 Signed-off-by: Chris Wilson commit 8050ced6204f5aca12e6c57f86308b6ad1b98209 Author: Chris Wilson Date: Wed Feb 15 17:01:18 2012 +0000 sna/dri: Mark bo as reusable after completion of a flip-event After the flip chain is completed, any residual buffers are no longer in use and so available for reuse. Signed-off-by: Chris Wilson commit fc046aabde76142fce130773d78d797d7d750ab7 Author: Chris Wilson Date: Wed Feb 15 16:08:23 2012 +0000 sna/dri: Don't attempt to change tiling if it is a no-op Signed-off-by: Chris Wilson commit 66cc9c69657ac2703f2c7fc3c2c50f06bf5daa99 Author: Chris Wilson Date: Wed Feb 15 11:58:42 2012 +0000 Be paranoid about the definition of container_of Replace any existing definition with a correct version, since there are broken container_of macros floating around the xorg includes. Signed-off-by: Chris Wilson commit c0376b7f7b083ab2e87edc36e56fd8eb99c3cd05 Author: Chris Wilson Date: Mon Feb 13 00:48:15 2012 +0000 Add a missing macro for old xorg/list.h list_last_entry() needs to be defined if we are including the xorg list.h as opposed to our standalone variant. Signed-off-by: Chris Wilson commit 87bed52180cd2abd80ef6b58384f9fd9c9968f7b Author: Chris Wilson Date: Sat Feb 11 20:54:18 2012 +0000 Include a local copy of list.h In 1.11.903, the list.h was renamed to xorg-list.h with a corresponding change to all structures. As we carried local fixes to list.h and extended functionality, just create our own list.h with a bit of handwaving to protect us for the brief existence of xorg/include/list.h. Reported-by: Armin K Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45938 Signed-off-by: Chris Wilson commit c64ebee5fdccf313cbd3c73850e02e6fa7dd2a65 Author: Chris Wilson Date: Sat Feb 11 13:31:12 2012 +0000 sna/gen6: Prefer the render ring for copies Slower for fills, but on the current stack faster for copies, both large and small. Hopefully, when we write some good shaders for SNB, we will not only improve performance for copies but also make fills faster on the render ring than the blt? As the BLT copy routine is GPU bound for copywinpix10, and the RENDER copy routine is CPU bound and faster, I believe that we have reached the potential of the BLT ring and not yet saturated the GPU using the render copy. Note that we still do not casually switch rings, so the actual routine chosen will still be selected by the preceeding operations, so is unlikely to have any effect in practice during, for example, cairo-traces. Signed-off-by: Chris Wilson commit 6a9b50177408c919ed5c6c2463f687476af2c698 Author: Chris Wilson Date: Sat Feb 11 11:02:53 2012 +0000 sna/gen6: Suppress the CS stall for the first command in the batch The batch emission serves as a full stall, so we do not need to incur a second before our first rendering. Signed-off-by: Chris Wilson commit cbe8bed83f0b4097958c4541ad7809a05e6c6f43 Author: Chris Wilson Date: Sat Feb 11 10:58:05 2012 +0000 sna/gen7: Mention the depth-stall required before changing VS state Because one day we may actually start using VS! Copied from the addition of the w/a to Mesa by Kenneth Graunke. Signed-off-by: Chris Wilson commit 6193f2f00fa7205f9d736340318c66d116dca53e Author: Chris Wilson Date: Thu Feb 9 14:16:17 2012 +0000 sna: Fix retire after readback Upon reading, we encounter a serialisation point and so can retire all requests. However, kgem_bo_retire() wasn't correctly detecting that barrier and so we continued to using GPU detiling thinking the target was still busy. Signed-off-by: Chris Wilson commit 4d8369f8e60fd4f5a0ef49f3e9866ea5ecb21927 Author: Chris Wilson Date: Wed Feb 8 13:15:46 2012 +0000 sna/gen2+: Force upload rather than perform source transformations on the CPU If both the source and destination is on the CPU, then the thinking was it would be quicker to operate on those on the CPU rather than copy both to the GPU and then perform the operation. This turns out to be a false assumption if transformation is involved -- something to be reconsidered if pixman should ever be improved. Signed-off-by: Chris Wilson commit 8634d461bd9e5a3d3f75b0efc11db87b8d3e1245 Author: Chris Wilson Date: Wed Feb 8 09:13:27 2012 +0000 sna: Limit max CPU bo size to prevent aperture thrashing on upload Copying between two objects that consume more than the available GATT space is a painful experience due to the forced use of an intermediatory and eviction on every batch. The tiled upload paths are in comparison remarkably efficient, so favour their use when handling extremely large buffers. This reverses the previous idea in that we now prefer large GPU bo rather than large CPU bo, as the render pipeline is far more flexible for handling those than the blitter is for handling the CPU bo (at least for gen4+). Signed-off-by: Chris Wilson commit 5b16972d7850b2347efc084311d664e14263cba1 Author: Chris Wilson Date: Tue Feb 7 23:45:37 2012 +0000 sna: Check that we successfully retired an active linear buffer If we go to the trouble of running retire before searching, we may as well check that we retired something before proceeding to check all the inactive lists. Signed-off-by: Chris Wilson commit 207b4d4482a6af4a39472ec20ff04fa0c9322d73 Author: Chris Wilson Date: Tue Feb 7 21:56:29 2012 +0000 sna: Relax must-be-blittable rules for gen4+ The render pipeline is actually more flexible than the blitter for dealing with large surfaces and so the BLT is no longer the limiting factor on gen4+. Signed-off-by: Chris Wilson commit 13c960db9ef876ee99991d97dfc34fef184c0341 Author: Zhigang Gong Date: Thu Feb 2 11:30:57 2012 +0800 uxa/glamor: Use a macro to specify module name. This depends upon glamor commit b5f8d, just after the 0.3.0 tag. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit 70092bfbc51ddc5a51c9cae21c6b2852c216a6fc Author: Zhigang Gong Date: Wed Feb 1 19:47:28 2012 +0800 uxa/glamor: Refine CloseScreen and InitScreen process. The previous version calls glamor_egl_close_screen and glamor_egl_free_screen manually which is not align with standard process. Now glamor change the way to follow standard method: glamor layer and glamor egl layer both have their internal CloseScreens. The correct sequence is after the I830CloseScreen is registered, then register glamor_egl_close_screen and the last one is glamor_close_screen. So we move out the intel_glamor_init from the intel_uxa_init to I830ScreenInit and just after the registration of I830CloseScreen. As the glamor interfaces changed, we need to check the glamor version when load the glamor egl module to make sure we are loading the right glamor module. If failed, it will switch back to UXA path. This depends upon glamor commit 1bc8bf tagged with version 0.3.0. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit 798aad6c95a1a95fd587430dc7a6d59497a10ce1 Author: Chris Wilson Date: Tue Feb 7 20:16:48 2012 +0000 sna/gen[4-7]: Fix erroneous scale factor for partial large bo render copies Signed-off-by: Chris Wilson commit ea6588726107f1ab0ef5a8f69d420b5bff819a76 Author: Chris Wilson Date: Tue Feb 7 15:26:50 2012 +0000 sna: Apply offsets correctly for partial src/dst in large copy boxes Signed-off-by: Chris Wilson commit 14c91e108464a305fb23b3313b842bfaeb9420fc Author: Chris Wilson Date: Tue Feb 7 15:25:48 2012 +0000 sna/tiling: Request Y-tiles if we know we cannot BLT to either the src or dst Signed-off-by: Chris Wilson commit 3131217e3ecbdf6cd40b044bd31e8228ff5c6bff Author: Chris Wilson Date: Tue Feb 7 14:35:59 2012 +0000 sna: Mark up the temporary allocations Signed-off-by: Chris Wilson commit ec1ccb6bf6a984cbe3317e636d7ff73887348a46 Author: Chris Wilson Date: Tue Feb 7 13:37:52 2012 +0000 sna: Set the damage for render->copy_boxes to NULL before use Signed-off-by: Chris Wilson commit 58f634b792c6d109c5f2374a3e24d759e744abb4 Author: Chris Wilson Date: Tue Feb 7 13:32:20 2012 +0000 sna: Handle tile alignment for untiled large bo more carefully We ended up trying to align the upper bound to zero as the integer divsion of the tile width by pixel was zero. Signed-off-by: Chris Wilson commit bf3518ea910a2a3c5b4500dcba7c829576fbfd47 Author: Zhigang Gong Date: Tue Feb 7 09:40:54 2012 +0800 uxa/glamor/dri: Fix a typo bug when fixup glamor pixmap. Should modify the old pixmap's header not the new one which was already destroyed. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit 1467a4ba1a327877026cc76b3eabeb51d1415509 Author: Chris Wilson Date: Mon Feb 6 20:41:53 2012 +0000 sna: Use the proper sna_picture_is_solid() test Rather than the specialised routines that assumed pDrawable was non-NULL, which was no longer true after f30be6f743. Signed-off-by: Chris Wilson commit ef335a65a9d9f7eb96873201b546c25fd03d090c Author: Chris Wilson Date: Mon Feb 6 20:37:54 2012 +0000 sna: Search all active buckets for a temporary allocation Reduce the need for creating a new object if we only need the allocation for a single operation. Signed-off-by: Chris Wilson commit b7e3aaf773f05ce82405e135c0f99b40b3c2f434 Author: Chris Wilson Date: Mon Feb 6 18:08:19 2012 +0000 sna: Use the clipped end-point for recomputing segment length after clipping References: https://bugs.freedesktop.org/show_bug.cgi?id=45673 Signed-off-by: Chris Wilson commit f30be6f74392f5687ffe8bc9dd2c6dc024ae06c8 Author: Chris Wilson Date: Mon Feb 6 15:59:21 2012 +0000 sna/gen2+: Exclude solids from being classed as requiring an upload We treat any pixmap that is not attached to either a CPU or GPU bo as requiring the pixel data to be uploaded to the GPU before we can composite. Normally this is true, except for the solid cache. References: https://bugs.freedesktop.org/show_bug.cgi?id=45672 Signed-off-by: Chris Wilson commit f009386de87acccadb1803567e4c494e5e80a2a9 Author: Chris Wilson Date: Mon Feb 6 09:50:03 2012 +0000 sna: If we have a CPU bo, do not assert we have shadow pixels When transferring damage to the GPU, on SNB it is not necessarily true that we have a shadow pixmap, we may instead have drawn onto an unmapped CPU bo and now simply need to copy from that bo onto the GPU. Move the assertion onto the path where it truly matters. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45672 Signed-off-by: Chris Wilson commit 22e452ebe01c32a08599411743cf18f9ad0545a7 Author: Chris Wilson Date: Mon Feb 6 09:19:56 2012 +0000 sna: Disable use of xvmc for SNB+ Not yet implemented, so don't bother setting it to fail. References: https://bugs.freedesktop.org/show_bug.cgi?id=44874 Signed-off-by: Chris Wilson commit a8ed1a02ada1f8d2f910dfefb150d26c840bf9ea Author: Chris Wilson Date: Sat Feb 4 20:13:07 2012 +0000 sna: Discard the redundant clear of the unbounded area if already clear Signed-off-by: Chris Wilson commit b899a4b69696141ca8b897a7abf52649b09f7b3b Author: Chris Wilson Date: Sat Feb 4 20:07:49 2012 +0000 sna: Always pass the clear colour for PictOpClear Having made that optimisation for Composite, and then made the assumption that it is always true in the backends, we failed to clear the unbounded area outside of a trapezoid since we passed in the original colour and the operation was optimised as a continuation. Signed-off-by: Chris Wilson commit c107b90a44abb45c837ff8924939872be5b490eb Author: Chris Wilson Date: Sat Feb 4 16:33:34 2012 +0000 sna/gen6: Reduce PictOpClear to PictOpSrc (with blending disabled) The advantage of PictOpSrc is that it writes its results directly to memory bypassing the blend unit. Signed-off-by: Chris Wilson commit 4baa2806bc0f51e7576b769ca6750deb3821c4d3 Author: Chris Wilson Date: Sat Feb 4 12:06:22 2012 +0000 sna: Check if the damage reduces to all before performing the migration An assert exposed a situation where we had accumulated an unreduced damage-all and so we were taking the slow path only to discover later that it was a damage-all and that we had performed needless checks. Signed-off-by: Chris Wilson commit 2653524dffc1fe0dbff7d74bfc9be535d9ececb1 Author: Chris Wilson Date: Fri Feb 3 20:06:43 2012 +0000 sna: Reduce the downsample tile size to accommodate alignment If we need to enlarge the sampled tile due to tiling alignments, the resulting sample can become larger than we can accommodate through the 3D pipeline, resulting in FAIL. Signed-off-by: Chris Wilson commit 93a0b10f163ee79b6a6a7ea46b0a33b622b1f86e Author: Chris Wilson Date: Fri Feb 3 19:30:24 2012 +0000 sna: Apply redirection for the render copy into large pixmaps If the pixmap is larger than the pipeline, but the operation extents fit within the pipeline, we may be able to create a proxy target to transform the operation into one that fits within the constraints of the render pipeline. This fixes the infinite recursion hit with partially displayed extremely large images. Signed-off-by: Chris Wilson commit 4774c6b8331831e0c9f3b24f5f6e1b6ea399f628 Author: Chris Wilson Date: Thu Feb 2 15:23:03 2012 +0000 sna: Add a couple of sanity checks that the CPU drawable is on the CPU Signed-off-by: Chris Wilson commit 418cd98db7c4a2886c9e310f3691eb6c77421dd7 Author: Chris Wilson Date: Wed Feb 1 19:10:41 2012 +0000 sna/gen6: Ring switching outweighs the benefits for cairo-traces At the moment, the jury is still out on whether freely switching rings for fills is a Good Idea. So make it easier to turn it on and off for testing. Signed-off-by: Chris Wilson commit 2d0e7c7ecd7371ac7b5fe3f382fc5d04792f7019 Author: Chris Wilson Date: Wed Feb 1 14:52:56 2012 +0000 sna: Search again for a just-large-enough mapping for inplace uploads Signed-off-by: Chris Wilson commit 55c7088f54655609fbb00106679a566b46ee8dba Author: Chris Wilson Date: Wed Feb 1 01:33:52 2012 +0000 sna: Add debugging code to verify damage extents of fallback paths After using the CPU, upload the damage and read back the pixels from the GPU bo and verify that the two are equivalent. Signed-off-by: Chris Wilson commit c8fc2cde53ef7aa011ec7c47e7fc5486de0651f5 Author: Chris Wilson Date: Wed Feb 1 01:27:43 2012 +0000 sna: Fill extents for ImageGlyphs The spec says to fill the characters boxes, which is what the hardware does. The implementation fills the extents instead. rxvt expects the former, emacs the latter. Overdraw is a nuisance, but less than leaving glyphs behind... Reported-by: walch.martin@web.de Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45438 Signed-off-by: Chris Wilson commit 13508ab5ea136caca90c846ff1026c0c1acd2ad5 Author: Chris Wilson Date: Tue Jan 31 22:38:46 2012 +0000 sna: PolyGlyph supports all of fill/tile/stipple rules The hw routines only directly supports solid fill so fallback for the interesting cases. An alternative would be to investigate using the miPolyGlyph routine to convert the weird fills into spans in order to fallback. Sounds cheaper to fallback, so wait for an actual use case. Signed-off-by: Chris Wilson commit df4e1059a4e09998334dde6aa1c8ccfe76e442c0 Author: Chris Wilson Date: Tue Jan 31 19:19:13 2012 +0000 sna/gen6: Prefer to do fills using the BLT Using the BLT is substantially faster than the current shaders for solid fill. The downside is that it invokes more ring switching. Signed-off-by: Chris Wilson commit 8b012de0a1af4ec97c3197af3f1efdcc67bc2118 Author: Chris Wilson Date: Tue Jan 31 20:29:58 2012 +0000 sna/gen5: Always prefer to emit solid fills using the BLT As the BLT is far, far faster than using a shader. Improves cairo-demos/chart from 6 to 13 fps. Reported-by: Michael Larabel Signed-off-by: Chris Wilson commit 0a748fc49d60dc2bc9494f95c4934592b111831a Author: Chris Wilson Date: Tue Jan 31 10:51:02 2012 +0000 sna: Split the tiling limits between upload and copying The kernel has a bug that prevents pwriting buffers large than the aperture. Whilst waiting for the fix, limit the upload where possible to fit within that constraint. Signed-off-by: Chris Wilson commit 9c1f8a768ca1f762c722f63bab2747e4ff1fd773 Author: Chris Wilson Date: Tue Jan 31 10:29:02 2012 +0000 sna: Avoid converting requested Y to X tiling for large pitches on gen4+ The only strong requirement is that to utilize large pitches, the object must be tiled. Having it as X tiling is a pure convenience to facilitate use of the blitter. A DRI client may want to keep using Y tiling instead. Signed-off-by: Chris Wilson commit e872c1011fc7b67683703fd891234f07dd7acd04 Author: Chris Wilson Date: Tue Jan 31 10:21:05 2012 +0000 sna/dri: We need to reduce tiling on older gen if we cannot fence Only apply the architectural limits to enable bo creation for DRI buffers. Reported-by: Alban Browaeys Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45414 Signed-off-by: Chris Wilson commit a4caf67d8da37d04f8915d96b10411ba7267937e Author: Chris Wilson Date: Tue Jan 31 00:35:42 2012 +0000 sna: Trim tile sizes to fit into bo cache Signed-off-by: Chris Wilson commit 3f7c1646c78d8854c88b214d3699e51839ba9711 Author: Chris Wilson Date: Tue Jan 31 00:09:42 2012 +0000 sna: Check that the intermediate IO buffer can also be used for blitting Signed-off-by: Chris Wilson commit e504fab6c5354ae9d18ccefb10bd586fa49b924c Author: Chris Wilson Date: Mon Jan 30 23:49:18 2012 +0000 sna: Discard the cleared GPU buffer upon PutImage to the CPU buffer Signed-off-by: Chris Wilson commit ed1c1a7468d78e99cb4f9a4a8b8a6b00c3257a75 Author: Chris Wilson Date: Mon Jan 30 13:43:59 2012 +0000 sna: Track large objects and limit prefer-gpu hint to small objects As the GATT is irrespective of actual RAM size, we need to be careful not to be too generous when allocating GPU bo and their shadows. So first of all we limit default render targets to those small enough to fit comfortably in RAM alongside others, and secondly we try to only keep a single copy of large objects in memory. Signed-off-by: Chris Wilson commit d53d93ffa6e133f46c39595294ecf8e2182b5a68 Author: Chris Wilson Date: Mon Jan 30 15:11:34 2012 +0000 sna: Update the partial buffer allocation size when reusing an old mapping Whilst the old mapping is guaranteed to be larger than the requested allocation size, keep track of the actual size allows for better packing of future buffers. And the code also performs a sanity check that the buffer is the size we claim it to be... Signed-off-by: Chris Wilson commit 6f99555b6b64a0e1baad1853569f7bf521c327c3 Author: Chris Wilson Date: Mon Jan 30 11:48:59 2012 +0000 sna: Allow the creation of render targets larger than the maximum bo cache Given that we now handle uploads to and from bo that are larger than the aperture and that usage of such large bo is rare and so unlikely to benefit from caching, allow them to be created as render targets and destroy as soon as they become inactive. In principle, this finally enables GPU acceleration of ocitysmap on gen4+, but due to the large cost of creating and destroying large bo it is disabled on systems that require clflushing. It is, however, a pre-requisite for exploiting the enhanced capabilities of IvyBridge. Signed-off-by: Chris Wilson commit c65ec096e79aa6bda7b2b3ef235e3fd9698b4da7 Author: Chris Wilson Date: Mon Jan 30 11:41:07 2012 +0000 sna: Decrease tiling step size in case we need to enlarge the box later We can juggle rendering into large bo on gen4 by redirecting the rendering through a proxy that is tile aligned, and so the render target may be slightly larger than the tiling step size. As that is then larger than the maximum 3D pipeline, the trick fails and we need to resort to a temporary render target with copies in and out. In this case, check that the tile is aligned to the most pessimistic tiling width and reduce the step size to accomodate the enlargement. Signed-off-by: Chris Wilson commit 95f3734dd69b82e007095a599cc21f4c63d6ec00 Author: Chris Wilson Date: Mon Jan 30 11:40:02 2012 +0000 sna: Allow creation of proxies to proxies Just update the offset of the new bo by the offset of the existing proxy. Signed-off-by: Chris Wilson commit 488937edb67a60389380b405f8f8a548f51e64c7 Author: Chris Wilson Date: Mon Jan 30 11:38:36 2012 +0000 sna: Base prefer-gpu hint on default tiling choice As on gen4+, tiling increases the maximum usable pitch we can accommodate wider pixmaps on the GPU. Signed-off-by: Chris Wilson commit ca252e5b51d7b2f5a7b2c2e0d8fdb024b08096db Author: Chris Wilson Date: Sun Jan 29 19:36:55 2012 +0000 sna: Detect batch overflow and fallback rather an risk an ENOSPC Having noticed that eog was failing to perform a 8k x 8k copy with compiz running on a 965gm, it was time the checks for batch overflow were implemented. Signed-off-by: Chris Wilson commit 3aee521bf236994628c4d103a2b8f391a4be2aa7 Author: Chris Wilson Date: Sun Jan 29 19:21:54 2012 +0000 sna: Add a tiled fallback for large BLT copies If we are attempting to copy between two large bo, larger than we can fit into the aperture, break the copy into smaller steps and use an intermediatory. Signed-off-by: Chris Wilson commit df148c962108a7f3efead0b80ab4fe77f3f79c8b Author: Chris Wilson Date: Sun Jan 29 18:07:14 2012 +0000 sna: Limit the tile size for uploading into large pixmaps As we may have a constrained aperture, we need to be careful not to exceed our resources limits when uploading the pixel data. (For example, fitting two of the maximum bo into a single batch may fail due to fragmentation of the GATT.) So be cautious and use more tiles to reduce the size of each individual batch. Signed-off-by: Chris Wilson commit e1e67e8f394480eb4fef1238ccfd49cc36e4b6f2 Author: Chris Wilson Date: Sun Jan 29 15:43:42 2012 +0000 sna: Fix the "trivial" fix to improve error handling The logic was just backwards and we tried to upload a shadowless GPU pixmap. Signed-off-by: Chris Wilson commit d3fb1e1e89ccf5cefe6add66de4f960ef07cac60 Author: Chris Wilson Date: Sun Jan 29 14:20:33 2012 +0000 sna: Handle GPU creation failure when uploading subtexture Signed-off-by: Chris Wilson commit 518a99ea34b26aa094f29a4cc1ea5419f63a0e56 Author: Chris Wilson Date: Sun Jan 29 14:09:46 2012 +0000 sna: Always create a GPU bo for copying from an existent source GPU bo Make sure we prevent the readback of an active source GPU bo by always prefering to do the copy on the GPU if the data is already resisent. This fixes the second regression from e583af9cc, (sna: Experiment with creating large objects as CPU bo). Signed-off-by: Chris Wilson commit 624d9843abda9ca6bd1b004d70a6fdc082ba9653 Author: Chris Wilson Date: Sun Jan 29 13:55:20 2012 +0000 sna: Ignore map status and pick the first inactive bo for reuse This fixes the performance regression introduced with e583af9cca, (sna: Experiment with creating large objects as CPU bo), as we ended up creating fresh bo and incurring setup and thrashing overhead, when we already had plenty cached. Signed-off-by: Chris Wilson commit 5c6255ba2f12f04938fd586ca02562ee3cae05af Author: Chris Wilson Date: Sun Jan 29 11:02:38 2012 +0000 sna: Determine whether to use a partial proxy based on the pitch On gen4+ devices the maximum render pitch is much larger than is simply required for the maximum coordinates. This makes it possible to use proxy textures as a subimage into the oversized texture without having to blit into a temporary copy for virtually every single bo we use. Signed-off-by: Chris Wilson commit 65466f86263b3788b438fe021a12ade371190b01 Author: Chris Wilson Date: Sat Jan 28 01:54:47 2012 +0000 sna: Allow ridiculously large bo, up to half the total GATT Such large bo place extreme stress on the system, for example trying to mmap a 1GiB into the CPU domain currently fails due to a kernel bug. :( So if you can avoid the swap thrashing during the upload, the ddx can now handle 16k x 16k images on gen4+ on the GPU. That is fine until you want two such images... The real complication comes in uploading (and downloading) from such large textures as they are too large for a single operation with automatic detiling via either the BLT or the RENDER ring. We could do manual tiling/switching or, as this patch does, tile the transfer in chunks small enough to fit into either pipeline. Signed-off-by: Chris Wilson commit 03211f4b0b7e32b6d7dc28e60be72db204b8c8d4 Author: Chris Wilson Date: Fri Jan 27 23:18:05 2012 +0000 sna: Guard against the upload buffer growing past the maximum bo size Signed-off-by: Chris Wilson commit 2afd49a28429cdeb36583cfc31cc9b1742c1fb83 Author: Chris Wilson Date: Fri Jan 27 22:18:30 2012 +0000 sna: Limit inplace upload buffers to maximum mappable size References: https://bugs.freedesktop.org/show_bug.cgi?id=45323 Signed-off-by: Chris Wilson commit 8f4bae01e39392faa8978090db4cbe28fa00b013 Author: Chris Wilson Date: Fri Jan 27 20:28:44 2012 +0000 sna/video: Ensure the video pixmap is on the GPU The presumption that the pixmap is the scanout and so will always be pinned is false if there is a shadow or under a compositor. In those cases, the pixmap may be idle and so the GPU bo reaped. This was compounded by that the video path did not mark the pixmap as busy. So whilst watching a video under xfce4 with compositing enabled (has to be a non-GL compositor) the video would suddenly stall. Reported-by: Paul Neumann Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45279 Signed-off-by: Chris Wilson commit d02bd80b2f9f8ee3840be5d8d6b8d389192c57f5 Author: Chris Wilson Date: Fri Jan 27 20:12:49 2012 +0000 sna: Use a proxy rather than a temporary bo for too-tall but thin targets If the render target is thin enough to fit within the 3D pipeline, but is too tall, we can fudge the address of the origin and coordinates to fit within the constaints of the pipeline. Signed-off-by: Chris Wilson commit ea433995a37f0a9d1579f74029418f22a63a2bc0 Author: Chris Wilson Date: Fri Jan 27 19:34:39 2012 +0000 sna: Experiment with a partial source If the source is thin enough such that the pitch is within the sampler's constraints and the sample size is small enough, just fudge the origin of the bo such that it can be sampled. This avoids having to create a temporary bo and use the BLT to extract it and helps, for example, firefox-asteroids which uses an 64x11200 texture atlas. Signed-off-by: Chris Wilson commit ad910949beb0c42e2d7b864f030b055ca40adacd Author: Chris Wilson Date: Fri Jan 27 18:37:39 2012 +0000 sna: Mark diagonal lines as partial write Signed-off-by: Chris Wilson commit b9c83e0b2c42f7657b1854a7cdcbc0407957c382 Author: Chris Wilson Date: Fri Jan 27 18:24:01 2012 +0000 sna/video: Add some DBG messages to track the error paths References: https://bugs.freedesktop.org/show_bug.cgi?id=45279 Signed-off-by: Chris Wilson commit 45d831c8b11d6f9f38c0cb9b5877541a971f2c67 Author: Chris Wilson Date: Fri Jan 27 15:45:17 2012 +0000 sna: Consolidate routines to choice destination bo Combine the two very similar routines that decided if we should render into the GPU bo, CPU bo or shadow pixmap into a single function. Signed-off-by: Chris Wilson commit 6402e7f1195f60f96dc269a701532c3270d8920f Author: Chris Wilson Date: Fri Jan 27 18:05:51 2012 +0000 sna: Ensure that we have a source bo for tiled fills Signed-off-by: Chris Wilson commit 6c5fb84f4de346b06e5a538e683c5a118f2579bc Author: Chris Wilson Date: Fri Jan 27 14:08:57 2012 +0000 sna/glyphs: Check that we attached to the cache pixmaps upon creation If the hw is wedged, then the pixmap creation routines will return an ordinary unattached pixmap. The code presumed that it would only return a pixmap with an attached bo, and so would segfault as it chased the invalid pointer after a GPU hang and the server was restarted. Considering that we already checked that the GPU wasn't wedged before we started, this is just mild paranoia, but on a run-once piece of code. Signed-off-by: Chris Wilson commit 86f1ae9164a94323c08e1dc6cb301e5bc1126b10 Author: Chris Wilson Date: Fri Jan 27 10:26:11 2012 +0000 sna/video: Add some more DBG breadcrumbs to the textured PutImage Signed-off-by: Chris Wilson commit ce1cae7f4715fc8e14327c5b705d9f2cc45a3741 Author: Chris Wilson Date: Fri Jan 27 00:37:51 2012 +0000 sna/video: Simplify the gen2/915gm check And make the later check in put image match. Signed-off-by: Chris Wilson commit 541908524f9ee754db3bc45d2e1681d34479c1cc Author: Chris Wilson Date: Thu Jan 26 23:14:14 2012 +0000 sna: Remove extraneous clipping from GetImage The spec says that they must wholly contained with the valid BorderClip for a Window or within the Pixmap or else a BadMatch is thrown. Rely on this behaviour and not perform the clipping ourselves. Signed-off-by: Chris Wilson commit 7ff40b572ec5cd860d7c7ff23beca0388f37c31c Author: Chris Wilson Date: Thu Jan 26 22:55:04 2012 +0000 sna: Avoid fbBlt for the easy GetImage cases From (i5-2520m): 60000 trep @ 0.6145 msec ( 1630.0/sec): GetImage 500x500 square To: 60000 trep @ 0.4949 msec ( 2020.0/sec): GetImage 500x500 square Signed-off-by: Chris Wilson commit adb1320bba15a3a3b4fa8e7d0fd0360fa696721d Author: Chris Wilson Date: Thu Jan 26 16:05:48 2012 +0000 sna/gen2+: Include being unattached in the list of source fallbacks If the source is not attached to a buffer (be it a GPU bo or a CPU bo), a temporary upload buffer would be required and so it is not worth forcing the target to the destination in that case (should the target not be on the GPU already). Signed-off-by: Chris Wilson commit b1f9415bf355e9fbd6fc3ce8fa1af59083ca2943 Author: Chris Wilson Date: Thu Jan 26 13:59:24 2012 +0000 sna: Allow gen4+ to use larger GPU bo As the blitter on gen4+ does not require fence registers, it is not restricted to operating on large objects within the mappable aperture. As we do not need to operate on such large GPU bo in place, we can relax the restriction on the maximum bo size for gen4+ to allocate for use with the GPU. Signed-off-by: Chris Wilson commit d35b6955dbb5d652d8685d2c1ea82c5e08de55ea Author: Chris Wilson Date: Thu Jan 26 14:34:36 2012 +0000 sna: Prevent mapping through the GTT for large bo If the bo is larger than a quarter of the aperture, it is unlikely that we will be able to evict enough contiguous space in the GATT to accommodate that buffer. So don't attempt to map them and use the indirect access instead. Signed-off-by: Chris Wilson commit 7c81bcd0c425cc0f7ddf2ad8289bb739c8d44289 Author: Chris Wilson Date: Thu Jan 26 13:35:15 2012 +0000 sna: Add FORCE_FALLBACK debugging hook for PutImage Signed-off-by: Chris Wilson commit 35c0ef586bf508c577642d772f18eae0b64cfd44 Author: Chris Wilson Date: Thu Jan 26 11:20:03 2012 +0000 sna/gen3: Use cpu bo if already in use Signed-off-by: Chris Wilson commit b76a6da3fa0148ef32600dd9505e22b90de037df Author: Chris Wilson Date: Thu Jan 26 10:47:01 2012 +0000 sna: Search the buckets above the desired size in the bo cache It is preferrable to reuse a slightly larger bo, than it is to create a fresh one and map it into the aperture. So search the bucket above us as well. Signed-off-by: Chris Wilson commit e2b8b1c145932e2254a705905c60f18c200cf2e8 Author: Chris Wilson Date: Thu Jan 26 12:42:12 2012 +0000 sna: Apply any previous transformation when downsampling In order to handle rotations and fractional offsets produced by the act of downsampling, we need to compute the full affine transformation and apply it to the vertices rather than attempt to fudge it with an integer offset. References: https://bugs.freedesktop.org/show_bug.cgi?id=45086 Signed-off-by: Chris Wilson commit 352828ee59164a9e81093d88dfdd45bc21f0c739 Author: Chris Wilson Date: Thu Jan 26 12:41:34 2012 +0000 sna: Tweak aperture thresholds for batch flushing In order to more easily accommodate operations on large source CPU bo. Signed-off-by: Chris Wilson commit cff6a1a2e4648eb211a1789ae9f711e2f16e9d4d Author: Chris Wilson Date: Wed Jan 25 23:21:36 2012 +0000 sna: Use the cpu bo where possible as the source for texture extraction Signed-off-by: Chris Wilson commit e583af9cca4ad2e5643317447c6b065d3ee7d11e Author: Chris Wilson Date: Wed Jan 25 23:04:50 2012 +0000 sna: Experiment with creating large objects as CPU bo Even on non-LLC systems if we can prevent the migration of such objects, we can still benefit immensely from being able to map them into the GTT as required. Signed-off-by: Chris Wilson commit 55569272f7d4232ef50f7b964dda82f85a190b99 Author: Chris Wilson Date: Wed Jan 25 20:13:27 2012 +0000 sna: Apply the same migration flags for the dst alphamap as for the dst pixmap Signed-off-by: Chris Wilson commit 4a132ddbf06e5ffc364c25002a1e46ad8bf0e45a Author: Chris Wilson Date: Wed Jan 25 20:12:55 2012 +0000 sna: Correct offset for moving drawable regions to the CPU Signed-off-by: Chris Wilson commit 65164d90b7b17ec7eea1e24d4b02ec037b55b1ff Author: Chris Wilson Date: Wed Jan 25 20:12:27 2012 +0000 sna/gen2+: Do not force use of GPU if the target is simply cleared Signed-off-by: Chris Wilson commit 307f493d76580687a3cf56106bf296475f1f53e5 Author: Chris Wilson Date: Wed Jan 25 20:11:21 2012 +0000 sna: Map freshly created, unbound bo through the CPU Take advantage that we know we will have to clflush the unbound bo before use by the GPU and populate it inplace. Signed-off-by: Chris Wilson commit d785bb7df054a1f15d59db69b089deb743bbdb40 Author: Chris Wilson Date: Wed Jan 25 16:45:43 2012 +0000 sna: GetImage is allowed to read a window's border We need to adjust the clip to include the border pixels when migrating damage from the backing pixmap. This also requires relaxing the constraint that a read must be within the drawable. Signed-off-by: Chris Wilson commit 36425ba49ecbd87b1e3bf4340ca2496d8de24a7f Author: Chris Wilson Date: Wed Jan 25 12:49:24 2012 +0000 sna: Round up buffer allocations when downsampling The pathological case being nx1 or 1xm resulting in an illegal allocation request of 0 bytes. One such example is wolframalpha.com: x = (200 + x) / 100 which generates an approximately 8500x1 image and so needs downscaling to fit in the render pipeline on all but IvyBridge. Bring on Ivy! Signed-off-by: Chris Wilson commit a2e83c6dcba1e911f42a3004b3d0782049e243e2 Author: Chris Wilson Date: Wed Jan 25 11:22:38 2012 +0000 sna: Silence compiler warning for a potential uninitialised return on error sna_accel.c: In function 'sna_copy_plane': sna_accel.c:5022:21: warning: 'ret' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Chris Wilson commit 8d22a76506133e0f76424159c0944d29bdf39da9 Author: Chris Wilson Date: Wed Jan 25 09:36:20 2012 +0000 sna: Run the miHandleExposures for no-op CopyPlane Signed-off-by: Chris Wilson commit 338941eda3c7591a85b83000eafae0407d0d7cd0 Author: Chris Wilson Date: Wed Jan 25 02:42:25 2012 +0000 sna: Handle self-copies for CopyPlane Prepare the source first as this has the dual benefit of letting us decide how best to proceed with the op (on the CPU or GPU) and prevents modification of the damage after we have choosen our preferred path. Signed-off-by: Chris Wilson commit 2e8b398ca383f5292adab8b351b8837dde3e131a Author: Chris Wilson Date: Wed Jan 25 01:42:56 2012 +0000 sna: Only shrink partial buffers that are being written to Ignore inactive and mmapped buffers. Signed-off-by: Chris Wilson commit b79252efaafe2ebc998d6cf6176a425dd897e66f Author: Chris Wilson Date: Wed Jan 25 01:36:27 2012 +0000 sna: Apply source clipping to sna_copy_plane() Ensure that the migration region is within bounds for both the source and destination pixmaps. Signed-off-by: Chris Wilson commit 46252bc7bcc7e08e47d00cdc87d6c1ed93830fcc Author: Chris Wilson Date: Wed Jan 25 01:31:34 2012 +0000 sna: Set the source clip for CopyArea fallback correctly The source window is (src->x, src->y)x(src->width, src->height) in pixmap space. However, we then need to use this to clip against the desination region, and so we need to translate from the source coordinate to the destination coordinate. Signed-off-by: Chris Wilson commit ae6d3a311783d7e063de0347363331f14bd74d74 Author: Chris Wilson Date: Wed Jan 25 01:18:11 2012 +0000 sna: Print source and destination regions for CopyArea fallback for DBG Signed-off-by: Chris Wilson commit dd5e90adfc73870cebcb215ad9fb9b5aedd38673 Author: Chris Wilson Date: Wed Jan 25 01:17:49 2012 +0000 sna: Clip GetImage to drawable so that damage migration is within bounds Signed-off-by: Chris Wilson commit b1fba5e8534da7fe253e21a3501854c04d82a108 Author: Chris Wilson Date: Wed Jan 25 01:16:34 2012 +0000 sna: Clear GPU damage first when moving a clear pixmap to the CPU This allows us to discard any busy GPU or CPU bo when we know we are going to clear the shadow pixmap afterwards. Signed-off-by: Chris Wilson commit 5ad95d66665802bce25e127ae0d06f3e0a9b0e62 Author: Chris Wilson Date: Tue Jan 24 22:11:20 2012 +0000 sna: Reduce number of reads required to inspect timers By using the information provided by select at wakeup. Signed-off-by: Chris Wilson commit aae19cbc5d0ddcf247451d06e063b2550a7ff16f Author: Chris Wilson Date: Tue Jan 24 19:58:29 2012 +0000 sna: Only reset devPrivate.ptr if owned by the CPU bo when freeing If the pixmap is mapped to the GPU bo, we should continue to use the current mapping rather than revoke it. Otherwise if we write to the GPU bo inplace, thereby discarding the CPU bo, we set the pointer we are about to copy to, to NULL. Signed-off-by: Chris Wilson commit 5312ee90ad80eda1c6ff72fbef60f77f03094972 Author: Chris Wilson Date: Tue Jan 24 19:02:56 2012 +0000 sna: mark the pixmap as no longer clear after rendering video Signed-off-by: Chris Wilson commit 69d3fc91f4a397f704b9971f97a905626e86eb3c Author: Chris Wilson Date: Tue Jan 24 18:51:32 2012 +0000 sna: Set up GC for general FillArc to FillSpans callback Signed-off-by: Chris Wilson commit 855c45c65a69d34ad32a97a5fc54dd09d40d3e26 Author: Chris Wilson Date: Tue Jan 24 18:48:17 2012 +0000 sna: Enable clipping for mi FillSpans gpu callback The mi routines do not ensure that their output is suitably constrained to the clip extents, so we must run it through the clipper. Signed-off-by: Chris Wilson commit c3fe42cde70a06a9a9a6190934df5cddb41d2f5f Author: Chris Wilson Date: Tue Jan 24 18:36:08 2012 +0000 sna: Don't attempt to create pixmaps for dpeths smaller than 8 Signed-off-by: Chris Wilson commit 22bab3cd7d0b2bcedfdd86f198d1ed9a21dd82aa Author: Chris Wilson Date: Tue Jan 24 18:33:14 2012 +0000 sna: Handle malloc failures when downsampling Signed-off-by: Chris Wilson commit 4aef9e6f50cb96c57b7ba345a18e55c97d788192 Author: Chris Wilson Date: Tue Jan 24 17:23:43 2012 +0000 sna: Add more damage-is-contained asserts Signed-off-by: Chris Wilson commit 16462e551d575bd5a370a8ac8b450ba72fea7d47 Author: Chris Wilson Date: Tue Jan 24 17:47:22 2012 +0000 sna: Install CPU handler for PolyLine for miPolySegment callback Signed-off-by: Chris Wilson commit b8b49ae70b3aadf4423bd6830c446c040f87a2f1 Author: Chris Wilson Date: Tue Jan 24 16:32:40 2012 +0000 sna: Mutate a temporary copy of the GC->ops so we don't alter new GCs In order to avoid using the wrong function for a scratch GC created during the course of a MI function whilst we have a specialised GC in use, we need to avoid modifying the original function table. Signed-off-by: Chris Wilson commit 1a116a15a5d978a1edf413a439f6ef6d3205a7aa Author: Chris Wilson Date: Tue Jan 24 16:53:21 2012 +0000 sna: Reduce the assertion that we would have hinted to operate inplace As the drawable_gc_flags() operate on lower level information than the hint, it is able to spot more oportunities to reduce the READ flags and so the assertion was overly optimistic. Signed-off-by: Chris Wilson commit 3d1bba033bc29fdf498dc082f3542c520a5ed39a Author: Chris Wilson Date: Tue Jan 24 18:22:12 2012 +0000 sna/gen3: Apply damage to video pixmap Reported-by: Paul Neumann References: https://bugs.freedesktop.org/show_bug.cgi?id=44504 Signed-off-by: Chris Wilson commit ff4b8a03a40f7eb1d71b96aebb5daa1d8df83d2a Author: Chris Wilson Date: Tue Jan 24 17:51:35 2012 +0000 sna: Use RepeatPad to avoid sampling the border color when downsampling References: https://bugs.freedesktop.org/show_bug.cgi?id=45086 Signed-off-by: Chris Wilson commit 09bddddaf94b848f417e1c9449cfe4b21d2554dd Author: Chris Wilson Date: Tue Jan 24 15:50:02 2012 +0000 sna: handle negative modulus for tiled blits Signed-off-by: Chris Wilson commit f3b11ebc28114062581c39089781114323946654 Author: Chris Wilson Date: Tue Jan 24 16:05:09 2012 +0000 sna: Add more assertions for copy errors Signed-off-by: Chris Wilson commit b56971986d2d495aa38f015beb659fb12f0d433a Author: Chris Wilson Date: Tue Jan 24 17:23:59 2012 +0000 sna: Trim the clipped Segment to the right length Signed-off-by: Chris Wilson commit 358a0861e642c26d925a69656039b4c95adba237 Author: Chris Wilson Date: Tue Jan 24 13:30:19 2012 +0000 sna: Do not discard CPU damage for a partial copy If we are copying a region that does not fill its extents (i.e. is not singular) then we must be care not to discard the CPU damage that is not overwritten by the copy. Fixes regression from 77ee92248582d65a03619d1bb1d93a74468eea00 (sna: Use full usage flags for moving the dst pixmap for a copy). Signed-off-by: Chris Wilson commit 672c6ad8170572c0f2562d5a8381ab2d17fd1e1b Author: Chris Wilson Date: Tue Jan 24 12:56:59 2012 +0000 sna: Silence the compiler with a few DBG format warnings The size of the integers being printed changed causing warnings on 32/64 bit. Signed-off-by: Chris Wilson commit 238f3d9bc563950475ee823f844197cf15a909e2 Author: Chris Wilson Date: Tue Jan 24 12:19:38 2012 +0000 sna: A deferred attachment will never have a CPU bo So we can remove that check in sna_copy_boxes. Signed-off-by: Chris Wilson commit c353a8cfde838b070f3e71d3946f3b40d1d5113a Author: Chris Wilson Date: Tue Jan 24 10:52:27 2012 +0000 sna: Revise use of the inplace hint to favour small cacheable operations The goal of the heuristic is to reduce readbacks and damage tracking on active GPU bo whilst simultaneously offering the best performance for small operations which would prefer to be performed on the shadow rather than in place. This restores ShmPutImage performance. Signed-off-by: Chris Wilson commit 29547421f392a9b589ba069cbfbba01dbe535d93 Author: Chris Wilson Date: Tue Jan 24 10:23:46 2012 +0000 sna: Use the reduced ROP from the fbGC to accurately determine readback Signed-off-by: Chris Wilson commit ec794f7594ae5e2c223b7f7255ff8979d9fb06c1 Author: Chris Wilson Date: Mon Jan 23 22:14:15 2012 +0000 sna: Track a proxy's dirty status upon itself rather than the target As proxy's are short-lived and are not used outside of the operation for which they are created, dirtied or flushed, we can safely copy the dirty status onto the proxy object itself. Signed-off-by: Chris Wilson commit 2574a04c940e032fdcf1cd39a0950515e8652471 Author: Chris Wilson Date: Mon Jan 23 21:45:29 2012 +0000 sna: Split the active bo cache into per-tiling caches Signed-off-by: Chris Wilson commit 566cbf1ef53b1f970289fcd5b3b389a74beb7e78 Author: Chris Wilson Date: Mon Jan 23 21:15:10 2012 +0000 sna: Abort search for a linear bo if we encounter a purged buffer Given the rarity of encountering a purged buffer versus the frequency of scanning the list and the then likely result of allocation a new buffer, simply abort the search on the first purged bo. Signed-off-by: Chris Wilson commit b8d3353624be51f2b618467c899a9ce3cbf3cbfe Author: Chris Wilson Date: Mon Jan 23 19:13:22 2012 +0000 sna: Refactor tests for a solid gc to use the new function This way all paths can test to see if they might be able to reduce the tiled fill or the opaque fill into a solid fill. Signed-off-by: Chris Wilson commit 78238b3a37c1c8a152bd3920e73aa6034c0f663f Author: Chris Wilson Date: Mon Jan 23 18:00:05 2012 +0000 sna: Prefer mi span filling functions to call through to the GPU Having removed the double analysis for the fast paths, at least, the span filling code on the GPU is now faster than doing the same operations in cache memory for the majority of cases. So allow the driver to prefer to use those functions when it has a GPU bo. Signed-off-by: Chris Wilson commit c5c77d04d79666962fd7c2d86bc6e7aef716084b Author: Chris Wilson Date: Mon Jan 23 18:24:21 2012 +0000 sna: Reduce GC to solid if possible along general spans path Again, we should no longer be hitting this code if at all possible, but for completeness... Signed-off-by: Chris Wilson commit 03611f662db854dc3b14f32c0315bf45bc415bbf Author: Chris Wilson Date: Mon Jan 23 19:59:06 2012 +0000 sna: Guard against being passed n==0 to FillSpans Apparently this does happen, notably by miFillPolyArc. Signed-off-by: Chris Wilson commit 7ac13a4d5aca1627b3a5fc9e7261d5dfafba970b Author: Chris Wilson Date: Tue Jan 24 00:21:12 2012 +0000 sna: Provide a fast path for miZeroLine for PolySegment Signed-off-by: Chris Wilson commit e7817a2206bd0b1cc4e4458686c328f7b41ea32c Author: Chris Wilson Date: Mon Jan 23 17:43:55 2012 +0000 sna: Override sna_fill_spans for PolySegment Signed-off-by: Chris Wilson commit 5b8db54d0fa9eab2610feed6947e917f2e400e1a Author: Chris Wilson Date: Tue Jan 24 00:21:12 2012 +0000 sna: Provide a fast path for miZeroLine for PolyLine Signed-off-by: Chris Wilson commit 280a9165db5382b93ab449158106bdd5aa7b2329 Author: Chris Wilson Date: Mon Jan 23 17:43:55 2012 +0000 sna: Override sna_fill_spans for PolyLine Signed-off-by: Chris Wilson commit 72fc3122b85fe1a1a16c7f7401c300089273fd88 Author: Chris Wilson Date: Tue Jan 24 01:27:08 2012 +0000 sna: Prefer to always use span generation for PolyArc Signed-off-by: Chris Wilson commit 98879e3786b7f6241378a32a10f2d46eb01baf85 Author: Chris Wilson Date: Mon Jan 23 23:22:00 2012 +0000 sna: Specialise PolyPoint for callback from miZeroPolyArc miZeroPolyArc may use either FillSpans for PolyPoint to generate its curves, so also provide custom point filling routines. Signed-off-by: Chris Wilson commit 5b10cb4a5ce84bd677b0a67a17d8674defb19f31 Author: Chris Wilson Date: Mon Jan 23 17:02:46 2012 +0000 sna: Override sna_fill_spans for PolyArc This is the missing like that allows the GPU to outperform fbPolyArc. Signed-off-by: Chris Wilson commit 6390a44a69d7f13a3ba16e8b48c640dc39dd227f Author: Chris Wilson Date: Mon Jan 23 15:57:53 2012 +0000 sna: Pass the reduce clip region to sna_fill_spans__cpu Since we compute it for the pixmap migration, we may as well use to perform the clipping within FillSpans as well. Signed-off-by: Chris Wilson commit 40e3745debe9738362661c7d7f498f3489c28876 Author: Chris Wilson Date: Mon Jan 23 15:42:18 2012 +0000 sna: Wrap gc->ops->PolyFillArc The goal is to avoid the overhead of performing multiple region analysis when calling sna_fill_spans by doing it once at the top level and then choose the most appropriate drawing method. Signed-off-by: Chris Wilson commit 55c2211143b3be2827fd4e299c3c211f3bd7935b Author: Chris Wilson Date: Mon Jan 23 18:15:36 2012 +0000 sna: Use a streamlined sna_fill_spans for when we know we want to use the gpu Signed-off-by: Chris Wilson commit b20ae331566e92f1a995f49fd0760f020db25035 Author: Chris Wilson Date: Mon Jan 23 19:49:18 2012 +0000 sna: Switch to using spans based on use_wide_spans() This just gives us a hook with which to conveniently enable or disable the new code. Signed-off-by: Chris Wilson commit 41739ff9517ca158d9f7b7ac82e5bacef62a3d68 Author: Chris Wilson Date: Mon Jan 23 15:42:18 2012 +0000 sna: Wrap gc->ops->FillPolygon The goal is to avoid the overhead of performing multiple region analysis when calling sna_fill_spans by doing it once at the top level and then choose the most appropriate drawing method. Signed-off-by: Chris Wilson commit aef56b194d4de9bd71ab71e3d93d81e1750262c5 Author: Chris Wilson Date: Mon Jan 23 15:38:30 2012 +0000 sna: Mark GPU bo as busy when drawing to an all-damaged pixmap for core The fast path to decide whether to use the GPU bo for the core drawaing operations forgot to update the active status of the pixmap. This included forgetting to clear the is-cleared flag. Signed-off-by: Chris Wilson commit c67e6a05ff729c0ddb26775e1c8533be1144d85a Author: Chris Wilson Date: Mon Jan 23 11:40:13 2012 +0000 sna: Align the origin of downsampling subregion to an even pixel In order for us to produce stable downsampled images across multiple frames, we need to sample the same pairs of pixels every time. This requires us to align the origin of the sample region to an even pixel. Reported-by: Clemens Eisserer References: https://bugs.freedesktop.org/show_bug.cgi?id=45086 Signed-off-by: Chris Wilson commit 9267da93969d1727cb95956c3f63643f0039c60d Author: Chris Wilson Date: Mon Jan 23 11:20:12 2012 +0000 sna: Apply composite offset to copy-clear GPU path Signed-off-by: Chris Wilson commit 803f6558c665c16ba2d20415e778b5bd1d308c2f Author: Chris Wilson Date: Mon Jan 23 11:05:50 2012 +0000 sna: Only subtract the fillrect from the CPU damage if it covers the drawable The idea behind that optimisation is for the inactive pixmap to be refreshed and allowed to be transfered back to the GPU when it is entirely redrawn. As such performing the subtraction when it does not completely remove it only incurs additional overhead. Signed-off-by: Chris Wilson commit 267493f39137704bd52df65b7605be30d2a062b2 Author: Chris Wilson Date: Mon Jan 23 10:54:13 2012 +0000 sna: Assert that the subtract operation does reduce an all-damaged Somewhere somewhen it appears that I am discarding the all-damaged flag on the pointer. The only possibility I can see is for a no-op subtraction, so put an assert there just in case the impossible is happening. Signed-off-by: Chris Wilson commit 2908fe2df7b8f870a55fc5856f94ea541a7c7b75 Author: Chris Wilson Date: Sun Jan 22 18:46:57 2012 +0000 sna: Remove assertion that all flushing list members are in the GPU domain This may not be true for external buffers that are put on the flushing list because they have foreign requests pending. Signed-off-by: Chris Wilson commit a0bc17c0fa34c9f9243817d1674d1ff235dc99d6 Author: Chris Wilson Date: Sun Jan 22 18:27:34 2012 +0000 sna/gen6: stall before blending dirty pixels from the render cache Another restriction on the render pipeline, it turns out, is that before the blend unit can read back the dst pixels in a subsequent primitive, we must stall the pipeline for the completion of that earlier primitive. This is demonstrated by cacomposite. Signed-off-by: Chris Wilson commit 5aa494305e90eed5df211427741a75380add8e96 Author: Chris Wilson Date: Sun Jan 22 16:10:39 2012 +0000 sna: Correct the offsets for performing partial downsampling on the GPU Reported-by: Clemens Eisserer References: https://bugs.freedesktop.org/show_bug.cgi?id=45086 Signed-off-by: Chris Wilson commit a7b24bb4342eefb2b23fa40d7c7216c38f2edc09 Author: Chris Wilson Date: Sun Jan 22 15:50:47 2012 +0000 sna: Correct image buffer size when uploading a downsampled image Reported-by: Clemens Eisserer References: https://bugs.freedesktop.org/show_bug.cgi?id=45086 Signed-off-by: Chris Wilson commit 238fc67aa945d5669eccd2a8fe8e98402b9a6223 Author: Chris Wilson Date: Sun Jan 22 16:04:13 2012 +0000 sna: Incude prefer-gpu hint in decision to upload CPU textures Signed-off-by: Chris Wilson commit aeaffb102190a8846c6341e72a4338b41639d679 Author: Chris Wilson Date: Sun Jan 22 15:52:41 2012 +0000 sna: Add some more DBG along the downsampling source extraction path Signed-off-by: Chris Wilson commit 92badc9c9c2636284af8bc56b098d24ff222f167 Author: Chris Wilson Date: Sun Jan 22 12:41:31 2012 +0000 sna: Avoid a common readback after clearing It is surprisingly common for a pixmap to be created, cleared and then used as an upload target or, even worse, as a source for a ShmGetImage. In order to prevent this folly, we can trivially track when we clear an entire pixmap and its GPU bo and avoid the readback in such cases. Signed-off-by: Chris Wilson commit 67a166d1247a1197fc851308c33c4970868f6a21 Author: Chris Wilson Date: Sun Jan 22 13:46:05 2012 +0000 sna: Pass inplace hint for sna_copy_boxes fallback In the unlikely event that this makes a difference, provide the hint as to when we do not read back from the destination and so a streaming copy would be preferable. Signed-off-by: Chris Wilson commit 77ee92248582d65a03619d1bb1d93a74468eea00 Author: Chris Wilson Date: Sun Jan 22 13:42:57 2012 +0000 sna: Use full usage flags for moving the dst pixmap for a copy Now that the migration code can decide for itself when to not move damage, we can pass the hints to the code rather than perform the optimisation in sna_copy_boxes. Signed-off-by: Chris Wilson commit dd079dd1f64e7832c6343c24958aa9eeb2f58789 Author: Chris Wilson Date: Sat Jan 21 19:38:40 2012 +0000 sna: Check the blt composite op is within the source bounds If we attempt to read from a drawable that is partially off its backing pixmap (such as a partially offscreen composite window) we need to fixup the read from the out-of-bounds regions to return clear. Since we don't, the easier answer is to just to switch to the render pipeline for such an operation. Signed-off-by: Chris Wilson commit 8a91c7d85740a5adc25d2a9b1972c367780ce714 Author: Chris Wilson Date: Sat Jan 21 01:18:17 2012 +0000 sna: Give kgem_create_buffer_2d a unique id The gen3, among others, backend uses the unique id of a buffer to track the currently attached buffer and uses 0 as the invalid value. Linear buffers as created by kgem_create_buffer_2d were not being assigned a unique id causing mayhem when they were then being passed to the backends as render targets and sources. In particular, gen3 did not notice the switch in render target and did not emit commands to change the GPU target nor attach the buffer to the batch, causing the sna_read_boxes to fail and for us to trigger an assertion for an uncomsumed read buffer. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42718 Signed-off-by: Chris Wilson commit d21e80433f2574fe96036ad1d563515406a1946f Author: Chris Wilson Date: Sat Jan 21 01:17:39 2012 +0000 sna/gen3: Add DBG markup for tracking target state In particular for when we switch to a new destination and mark it dirty. Signed-off-by: Chris Wilson commit 20006a9ae7f993f02c45ccbc1e414d74bfee3acd Author: Chris Wilson Date: Fri Jan 20 22:17:44 2012 +0000 sna: Cleanup PolyText and ImageText fallback debugging Signed-off-by: Chris Wilson commit 3fbd7cafb4394e0641565dc794b82bef615b4aac Author: Chris Wilson Date: Fri Jan 20 22:16:53 2012 +0000 sna: Copy the glyphs metrics before checking for an empty glyph The empty glyph still needs the correct advance, and copying it too late left it as zero and so we were collapsing spaces in PolyText8 and friends. Signed-off-by: Chris Wilson commit f0d8f5d377460bb7da82546e8304252312e97147 Author: Chris Wilson Date: Fri Jan 20 14:34:28 2012 +0000 sna/gen3: Set bo to NULL for render_fill_one It had to happen, I missed one! From fc9531fc2df. Signed-off-by: Chris Wilson commit 0286ddbd67d3b2585ffa3deccb7eeb674cd7a3e0 Author: Chris Wilson Date: Fri Jan 20 11:33:05 2012 +0000 sna/gen6: Cleanup non-pipelined w/a Move the workaround CS stall into the emit drawrect which is the only non-pipelined op we emit. This removes the split between deciding whether we will emit a drawrect and actual emission. Signed-off-by: Chris Wilson commit a0c4024e32ccab70e7f7893896d30c80ad9f4240 Author: Chris Wilson Date: Fri Jan 20 09:42:18 2012 +0000 sna/gen6: Do not enable blending on video sources Signed-off-by: Chris Wilson commit bbbda4c408c2576927582097f7cd4f606b1761fa Author: Chris Wilson Date: Fri Jan 20 09:40:04 2012 +0000 sna/gen6: Reduce the sampler stall if already stalling for drawrect If we are force to emit a stall for the non-pipelined workaround, we do not then need to emit a stall for switching samplers. Signed-off-by: Chris Wilson commit e91601278a057f70df76b74539ff4f80d203bf00 Author: Chris Wilson Date: Fri Jan 20 01:37:29 2012 +0000 sna/gen6: Force a CS stall for changing samplers On closer inspection, we still need the workaround of forcing a pipeline stall if we update the samplers. Signed-off-by: Chris Wilson commit fc9531fc2df12b896e6d9e8b3f0d7248e55bfcdd Author: Chris Wilson Date: Thu Jan 19 21:15:35 2012 +0000 sna: Move the flush to the backends This allows us to implement backend specific workarounds and use the more appropriate device specific flushing. Signed-off-by: Chris Wilson commit 2e0a534a888c59b921fd4cad69b980c6eda72212 Author: Chris Wilson Date: Thu Jan 19 18:52:35 2012 +0000 sna/gen7: Forward port recent changes from gen6 Fixes for resubmitting batches after running out of space for vertex buffers and also a couple of trivial spans functions. Signed-off-by: Chris Wilson commit 5caf806d42a1909ff3a7716d8bc592fa68a02377 Author: Chris Wilson Date: Thu Jan 19 17:33:25 2012 +0000 sna: BLT use dword pitch only for tiled surfaces The gen4+ spec is a little misleading as states that all BLT pitches for the XY commands are in dwords. Apparently not, as the upload/download functions were already demonstrating. This only became apparent when accelerating core text routines to offscreen pixmaps, such as composited windows. Signed-off-by: Chris Wilson commit dbc75532d5f6a10e9fc7cfe3634d5a0db7304a99 Author: Chris Wilson Date: Thu Jan 19 14:36:32 2012 +0000 sna: Tweak move-to-cpu to ignore inplace hint if its already on the CPU If we test the area to be drawn against the existing CPU damage and find it is already on the CPU, we may as well continue to utilize that damaged region. Signed-off-by: Chris Wilson commit 7ad4a0c9423ee7f4041173c428b07ac4af312fe1 Author: Chris Wilson Date: Thu Jan 19 11:15:38 2012 +0000 sna: Only use the blitter to emit wide spans if we cannot stream the updates If either the region is busy on the gpu or if we need to read the destination then we would incur penalties for trying to perform the operation through the GTT. However, if we are simply streaming pixels to an unbusy bo then we can do so inplace faster than computing the corresponding GPU commands and uploading them. Note: currently it is universally slower to use the GPU here (the computation of the spans is too slow). However that is only according to micro-benchmarks, avoiding the readback is likely to be more efficient in practice. Signed-off-by: Chris Wilson commit 9db6b9fad808175184849f3030862ea115ef0708 Author: Chris Wilson Date: Thu Jan 19 11:54:14 2012 +0000 sna: Also check for the inplace hint when migrating the whole pixmap Signed-off-by: Chris Wilson commit d3f7d5d614748306cc376d1929da2bbc14494a6e Author: Chris Wilson Date: Thu Jan 19 11:15:38 2012 +0000 sna: Only use the blitter to emit spans if we cannot stream the updates If either the region is busy on the gpu or if we need to read the destination then we would incur penalties for trying to perform the operation through the GTT. However, if we are simply streaming pixels to an unbusy bo then we can do so inplace faster than computing the corresponding GPU commands and uploading them. Signed-off-by: Chris Wilson commit ff2eb116ef85182eea9ed06daaa1e9a4f7bdbad3 Author: Chris Wilson Date: Wed Jan 18 00:56:07 2012 +0000 sna: Micro-optimise line extents for zero line width Handling zero line widths is the common case, so avoid the extra work. Signed-off-by: Chris Wilson commit 3c010745076204ed3b66e947c9eab6de84f670fe Author: Chris Wilson Date: Thu Jan 19 09:46:52 2012 +0000 sna: filter out degenerate segments whilst drawing unclipped PolySegment The damage layer was detecting that we were asking it to accumulate a degenerate box emanating from PolySegment, as the unclipped paths made the fatal assumption that it would not need to filter out degenerate boxes. However, a degenerate line becomes a point, does the same apply to a degenerate segment? Signed-off-by: Chris Wilson commit 35f81005f91d294e61bb4ced7cbddd1a76ccb324 Author: Chris Wilson Date: Thu Jan 19 00:41:08 2012 +0000 sna/damage: Always mark the damage as dirty when recording new boxes A few of the create_elts() routines missed marking the damage as dirty so that if only part of the emebbed box was used (i.e. the damage contained less than 8 rectangles that needed to included in the damage region) then those were being ignored during migration and testing. Reported-by: Clemens Eisserer References: https://bugs.freedesktop.org/show_bug.cgi?id=44682 Signed-off-by: Chris Wilson commit 36e691ea900d7979950c19714e15c5887d3ea039 Author: Chris Wilson Date: Thu Jan 19 00:39:28 2012 +0000 sna: Demote MOVE_READ if the GC operation covers the clip If the write operation fills the entire clip, then we can demote and possible avoid having to read back the clip from the GPU provided that we do not need the destination data due to arithmetic operation or mask. Signed-off-by: Chris Wilson commit 17efdbc48c964d9d7b0af630c13a6ceb62fb1787 Author: Chris Wilson Date: Thu Jan 19 00:36:52 2012 +0000 sna: Clip damage area with source extents for fallback The damage tracking code asserts that it only handles clip regions. However, sna_copy_area() was failing to ensure that its damage region was being clipped by the source drawable, leading to out of bounds reads during forced fallback. Signed-off-by: Chris Wilson commit fb07243c9a08b24e2dc03b86dc16d3cd72cbfcba Author: Chris Wilson Date: Wed Jan 18 21:30:34 2012 +0000 sna: Fine grained fallback debugging for core drawing routines Signed-off-by: Chris Wilson commit 05f9764a8860cbdd7ea2ce7f04c221ec8481e0bc Author: Chris Wilson Date: Wed Jan 18 21:29:45 2012 +0000 sna/damage: Fast path singular regions Mainly for consistency, so that we treat it like the other damage addition functions. Signed-off-by: Chris Wilson commit 96529e345d0718d253e4abfa0a02cd1f9f7c0406 Author: Chris Wilson Date: Wed Jan 18 21:05:40 2012 +0000 sna: Make sure we create a mappable GPU bo when streaming writes If we decide to do the CPU fallback inplace on the GPU bo through a WC mapping (because it is a large write-only operation), make sure that the new GPU bo we create is not active and so will not^W^W is less likely to cause a stall when mapped. Signed-off-by: Chris Wilson commit efce896e1dbab6177a773a7cf1c8eaf2dab0cdee Author: Chris Wilson Date: Wed Jan 18 20:53:55 2012 +0000 sna: Check number of boxes to migrate during move-to-cpu When reducing the damage we may find that it is actually empty and so sna_damage_get_boxes() returns 0, be prepared. Signed-off-by: Chris Wilson commit 334f3f70a8b4372cb089773ecded8339d2c7d984 Author: Chris Wilson Date: Wed Jan 18 20:09:26 2012 +0000 sna/gen3: Set the batch mode for emitting video state The lack of kgem_set_mode() here is causing some recently added assertions to fail. Signed-off-by: Chris Wilson commit 76203b70708b8750f52348ea8b9135191e650ff7 Author: Chris Wilson Date: Wed Jan 18 18:36:43 2012 +0000 sna: Almagamate writes based on the total number of bytes written Cachelines will only be dirtied for the bytes accessed so a better metric would based on the total number of pages brought into the TLB and the total number of cachelines used. Base the decision on whether to try and amalgamate the upload with others on the number of bytes copied rather than the overall extents. Signed-off-by: Chris Wilson commit 470741e84c813a257897ee69f14500207a2674dc Author: Chris Wilson Date: Wed Jan 18 18:35:59 2012 +0000 sna: Debug uploads All of the asserts and debug options that lead me to believe that the tiling was completely screwy for some writes. Signed-off-by: Chris Wilson commit ab387a89cf64ace9f7d7fa52b7743e78b625f47d Author: Chris Wilson Date: Wed Jan 18 18:32:51 2012 +0000 sna: Update bo->tiling during search_linear_cache search_linear_cache() was updated to track the first good match whilst it continued to search for a better match. This resulted in the first good bo being modified and a record of those modifications lost, in particular the change in tiling. Signed-off-by: Chris Wilson commit 4b893ab0812452238305b29b1beea224219f641d Author: Chris Wilson Date: Wed Jan 18 16:34:17 2012 +0000 sna: Remove defunct debugging option FORCE_GPU_ONLY now has no effect except for marking the initial pixmap as all-damaged on the GPU, and so not testing the paths for which it was originally introduction. Signed-off-by: Chris Wilson commit 965586544a8559b6b6b98c20e14c1266e46bf20d Author: Chris Wilson Date: Wed Jan 18 16:11:50 2012 +0000 sna/gen6: Don't assume that a batch mode implies a non-empty batch Just in case we set a mode then fail to emit any dwords. Sounds inefficient and woe betide the culprit when I find it... Signed-off-by: Chris Wilson commit d2e05750360fb19575f3becd87816184615855bf Author: Chris Wilson Date: Wed Jan 18 16:08:51 2012 +0000 sna: Fix some tracking of to-be-flushed dri pixmaps Signed-off-by: Chris Wilson commit 1ad5320fd40eaaf0bffcd209bf1eabd9a20e4bf8 Author: Chris Wilson Date: Wed Jan 18 15:39:35 2012 +0000 sna: Add valgrind markup for tracking CPU mmaps Signed-off-by: Chris Wilson commit f3da610eadd1f560812603ab1a72c2e173679689 Author: Chris Wilson Date: Wed Jan 18 12:59:48 2012 +0000 sna: Prevent switching rings with render disabled We fudge forced used of the BLT ring unless we install a render backend and so we must also prevent the ring from being reset when the GPU is idle. Therefore we make handing the ring status a backend function. Signed-off-by: Chris Wilson commit 6d31cb2d943be456f4ebaa663275c6a939013d9e Author: Chris Wilson Date: Wed Jan 18 11:25:30 2012 +0000 sna: Restore use of shadow pixmaps by default without RENDER support If we do not have access to an accelerated render backend, only create GPU buffers for the scanout and use an accelerated blitter for upload/download and operating inplace on the scanout. Signed-off-by: Chris Wilson commit 15a150579c3907054e186c68382873efdbadca75 Author: Chris Wilson Date: Wed Jan 18 10:26:33 2012 +0000 intel: Trivially remove a piece of XAA dependency for shadow The wolves are gathering at the door baying for the removal of XAA from Xorg. Signed-off-by: Chris Wilson commit 850495f956c811b1eb617d2e704e6bb7b5a86369 Author: Chris Wilson Date: Tue Jan 17 22:51:29 2012 +0000 sna: Fix increment of damage boxes after updating for rectangles Found by valgrind: ==13639== Conditional jump or move depends on uninitialised value(s) ==13639== at 0x5520B1E: pixman_region_init_rects (in /usr/lib/x86_64-linux-gnu/libpixman-1.so.0.24.0) ==13639== by 0x89E6ED7: __sna_damage_reduce (sna_damage.c:489) ==13639== by 0x89E7FEC: _sna_damage_contains_box (sna_damage.c:1161) ==13639== by 0x89CFCD9: sna_drawable_use_gpu_bo (sna_damage.h:175) ==13639== by 0x89D52DA: sna_poly_segment (sna_accel.c:6130) ==13639== by 0x21F87E: damagePolySegment (damage.c:1096) ==13639== by 0x1565A2: ProcPolySegment (dispatch.c:1771) ==13639== by 0x159FB0: Dispatch (dispatch.c:437) ==13639== by 0x1491D9: main (main.c:287) ==13639== Uninitialised value was created by a heap allocation ==13639== at 0x4028693: malloc (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) ==13639== by 0x89E6BFB: _sna_damage_create_boxes (sna_damage.c:205) ==13639== by 0x89E78F0: _sna_damage_add_rectangles (sna_damage.c:327) ==13639== by 0x89CD32D: sna_poly_fill_rect_blt.isra.65 (sna_damage.h:68) ==13639== by 0x89DE23F: sna_poly_fill_rect (sna_accel.c:8366) ==13639== by 0x21E9C8: damagePolyFillRect (damage.c:1309) ==13639== by 0x26DD3F: miPaintWindow (miexpose.c:674) ==13639== by 0x18370A: ChangeWindowAttributes (window.c:1553) ==13639== by 0x154500: ProcChangeWindowAttributes (dispatch.c:696) ==13639== by 0x159FB0: Dispatch (dispatch.c:437) ==13639== by 0x1491D9: main (main.c:287) ==13639== Use 'count' everywhere for consistency. Signed-off-by: Chris Wilson commit 4b5c9affd4968fd5b3d85551cf5a0b4d600a7892 Author: Chris Wilson Date: Tue Jan 17 20:23:26 2012 +0000 sna: Restore orginal shadow pointer before uploading CPU damage Detected by valgrind: ==22012== Source and destination overlap in memcpy(0xd101000, 0xd101000, 783360) ==22012== at 0x402A180: memcpy (in /usr/lib/valgrind/vgpreload_memcheck-amd64-linux.so) ==22012== by 0x89BD4ED: memcpy_blt (blt.c:209) ==22012== by 0x89F2921: sna_write_boxes (sna_io.c:364) ==22012== by 0x89CFABF: sna_pixmap_move_to_gpu (sna_accel.c:1900) ==22012== by 0x89F49B0: sna_render_pixmap_bo (sna_render.c:571) ==22012== by 0x8A268CE: gen5_composite_picture (gen5_render.c:1908) ==22012== by 0x8A29B8A: gen5_render_composite (gen5_render.c:2252) ==22012== by 0x89E6762: sna_composite (sna_composite.c:485) ==22012== by 0x21D3C3: damageComposite (damage.c:569) ==22012== by 0x215963: ProcRenderComposite (render.c:728) ==22012== by 0x159FB0: Dispatch (dispatch.c:437) ==22012== by 0x1491D9: main (main.c:287) ==22012== Signed-off-by: Chris Wilson commit bbd6c8123635899e89911104bf84e1b7d11d66a1 Author: Eugeni Dodonov Date: Tue Jan 17 16:16:37 2012 -0200 sna: check for LLC support Instead of checking for CPU generation, use the libdrm-provided I915_PARAM_HAS_LLC instead. v2: use a define check to verify if we have I915_PARAM_HAS_LLC. Signed-off-by: Eugeni Dodonov Signed-off-by: Chris Wilson commit e4efde920bcab980451e79df7d645d1814e5f78d Author: Chris Wilson Date: Tue Jan 17 13:44:12 2012 +0000 sna: Track whether damage is a complete representation of the dirt The previous commit undoes a premature optimisation that assumed that the current damage captured all pixels written. However, it happens to be a useful optimisation along that path (tracking upload of partial images), so add the necessary booking that watches for when the union of cpu and gpu damage is no longer the complete set of all pixels written, that is if we either migrate from one pixmap to the other, the undamaged region goes untracked. We also take advantage of whenever we damage the whole pixel to restore knowledge that our tracking of all pixels written is complete. Signed-off-by: Chris Wilson commit a9b705f9a7bbd37a0543ce5fbd4c60c912d1017d Author: Chris Wilson Date: Tue Jan 17 12:58:43 2012 +0000 sna: Mark GPU as all-damaged discarding the CPU bo to prevent stalls If we discard the CPU bo, we lose knowledge of whatever regions had been initialised but no longer dirty on the GPU, but instead must assume that the entirety of the GPU bo is dirty. Signed-off-by: Chris Wilson commit 9d631e26d758eb4c2032a502604f07c5403b25ff Author: Chris Wilson Date: Tue Jan 17 12:58:03 2012 +0000 sna: Mark the freshly allocated CPU bo as in the CPU domain As we immediately use it after creation, we need to inform GEM of the domain transfer. Signed-off-by: Chris Wilson commit dfbf02b8778719b86e0f5d78ee833a19436d43a0 Author: Chris Wilson Date: Tue Jan 17 10:55:29 2012 +0000 sna: Add some DBG breadcrumbs to put_image upload paths Signed-off-by: Chris Wilson commit da90afc32f19e9168cbaa4e0cdcd941d12f2c142 Author: Chris Wilson Date: Tue Jan 17 10:24:06 2012 +0000 sna: Add DBG breadcrumbs to gradient initialisation Put some markers into the debug log as those functions create many proxies causing a lot of debug noise. Signed-off-by: Chris Wilson commit d14341cb22e37f52070cd92b707fec5e08038e96 Author: Chris Wilson Date: Tue Jan 17 00:31:43 2012 +0000 sna: Add a render ring detiling read path For SNB, in case you really, really want to use GPU detiling and not incur the ring switch. Tweaking when to just mmap the target seems to gain most anyway... The ulterior motive is that this provides fallback paths for avoiding the use of TILING_Y with GTT mmaps which is broken on 855gm. Signed-off-by: Chris Wilson commit 3620f9ca459f7bbbb01786c95b5583023b6d870c Author: Chris Wilson Date: Tue Jan 17 00:23:04 2012 +0000 sna: Cap pwrite buffer alignment to 64k We only want to create huge pwrite buffers when populating the inactive cache for mmapped uploads. In the absence of using mmap for upload, be more conservative with the alignment value so as not to simply waste valuable aperture and memory. Signed-off-by: Chris Wilson commit b9f59b1099eeba3fb8b25693d4f37dd13267d8a3 Author: Chris Wilson Date: Tue Jan 17 00:20:51 2012 +0000 sna: correct adjust of a stolen 2d read buffer If we steal a write buffer for creating a pixmap for read back, then we need to be careful as we will have set the used amount to 0 and then try to incorrectly decrease by the last row. Fortunately, we do not yet have any code that attempts to create a 2d buffer for reading. Signed-off-by: Chris Wilson commit 6fc4cdafeba4517b94202ff292f05fdd90e52b2e Author: Chris Wilson Date: Mon Jan 16 21:34:43 2012 +0000 sna: Correct assertion for a partial read buffer The batch may legitimately be submitted prior to the attachment of the read buffer, if, for example, we need to switch rings. Therefore update the assertion to only check that the bo remains in existence via either a reference from the exec or from the user Signed-off-by: Chris Wilson commit 377f5e16cd14bdf42e67b0c8f2e13b75526f3a85 Author: Chris Wilson Date: Mon Jan 16 15:51:33 2012 +0000 sna/gen[45]: clear the state tracker before setting the formats When backporting the patches from gen6, I didn't notice the memset that came later, and this wasn't along the paths checked by rendercheck. Signed-off-by: Chris Wilson commit 6387f2fb8a40f32cc4a3e4228983dcf0604ac4dc Author: Chris Wilson Date: Mon Jan 16 14:12:36 2012 +0000 sna/gen[4567]: x1r5g5b5 is only a render target, not sampler Whilst we can render to and blend with an depth 15 target, we cannot use it as a texture with the sampling engine. Signed-off-by: Chris Wilson commit 8b2bb666662305ab88aad8198ad69b1c98407d75 Author: Chris Wilson Date: Mon Jan 16 13:35:05 2012 +0000 sna/gen6: Restore the non-pipelined op after every WM binding table update The hw wants it as demonstrated by the '>' in KDE's menus. Why is it always KDE that demonstrates coherency problems... Signed-off-by: Chris Wilson commit a11b22d172898ebfc657339a9ca56102ae92592f Author: Chris Wilson Date: Mon Jan 16 13:06:58 2012 +0000 sna/gen[23]: Remark the destination bo as dirty after flushing One of the side-effects of emitting the composite state is that it tags the destination surface as dirty as a result of the *forthcoming* operation. So emitting the flush after emitting the composite state clears that tag, so we need to restore it for future coherency. Signed-off-by: Chris Wilson commit 2f09363a6e2c77fb23bf0e4c12c4507521fa631b Author: Zhigang Gong Date: Thu Jan 12 15:30:15 2012 +0800 uxa/glamor: Create glamor pixmap by default. When creating native glamor pixmaps we will get much better performance than using the textured-drm pixmap, this commit is to make that the default behaviour when configured to use glamor. Another advantage of this commit is that we reduce the risk of encountering the "incompatible region exists for this name" and the associated render corruption. And since we now never intentionally allocate a reusable pixmap we could just make all (intel_glamor) allocations non-reusable without incurring too great an overhead. A side effect is that those glamor pixmaps do not have a valid BO attached to them and thus it fails to get a DRI drawable. This commit also fixes that problem by adjusting the fixup_shadow mechanism to recreate a textured-drm pixmap from the native glamor pixmap. I tested this with mutter, and it works fine. The performance gain to apply this patch is about 10% to 20% with different workload. Signed-off-by: Zhigang Gong Reviewed-by: Chris Wilson commit fd4c139a3959df90c7f078817fc6e2f3db715bf8 Author: Chris Wilson Date: Mon Jan 16 00:32:12 2012 +0000 sna: On LLC systems quietly replace all linear mmappings using the CPU If the GPU and CPU caches are shared and coherent, we can use a cached mapping for linear bo in the CPU domain with no penalty and so avoid the penalty of using WC/UC mappings through the GTT (and any aperture pressure). We presume that the bo for such mappings are indeed LLC cached... Signed-off-by: Chris Wilson commit c20a729d0a57fd5a782d9114535d9474f39a8950 Author: Chris Wilson Date: Sun Jan 15 22:19:22 2012 +0000 sna/gen6: Force a batch submission after allocation failure during composite Signed-off-by: Chris Wilson commit 380a2fca3cce4c99c5026ab800f7885a1959b16d Author: Chris Wilson Date: Sun Jan 15 22:13:20 2012 +0000 sna: Optimise call to composite with single box Signed-off-by: Chris Wilson commit 9f89250de1dc134f54cb68012fa5eb996c61d57e Author: Chris Wilson Date: Sun Jan 15 21:54:13 2012 +0000 sna: Use the prefer-GPU hint for forcing allocation for core drawing Similar to the render paths and simpler than the current look up tiling method. Signed-off-by: Chris Wilson commit 8652bf7a196f53842db70f5c70aded31b470b0ab Author: Chris Wilson Date: Sun Jan 15 19:04:01 2012 +0000 sna: Don't track an unmatching tiled bo when searching the linear cache Signed-off-by: Chris Wilson commit cc4b616990fa71e96d38512d8cdb4c3e2abb21c0 Author: Chris Wilson Date: Sun Jan 15 19:55:50 2012 +0000 sna/video: Increase the level of paranoia In how many different ways can we check that the scanout is allocated before we start decoding video? Signed-off-by: Chris Wilson commit 7f480ba02c66fcc02bad483731c4c0cf6c746c0d Author: Chris Wilson Date: Sun Jan 15 18:45:06 2012 +0000 sna: Tidy search through active bo cache Perform the assertions upon cache consistency upfront, and tidy the indentation. Signed-off-by: Chris Wilson commit 6f7bc35d7f956f7c2507eabc874ead1a83c85ddb Author: Chris Wilson Date: Sun Jan 15 18:14:24 2012 +0000 sna: Use indirect uploads rather than teardown existing CPU maps Allow the snoopable CPU mapping to be used inplace of the GTT map for untiled bo. Signed-off-by: Chris Wilson commit 475fa67ed320f94df37ec86fe6c5dda886923751 Author: Chris Wilson Date: Sun Jan 15 17:30:00 2012 +0000 sna: Fast path move-area-to-cpu when the pixmap is already on the cpu Signed-off-by: Chris Wilson commit 37ced44a53008debaf869ec9ef4ba2e5d6982e76 Author: Chris Wilson Date: Sun Jan 15 15:35:57 2012 +0000 sna: Be a little more lenient wrt damage migration if we have CPU bo The idea being that they facilitate copying to and from the CPU, but also we want to avoid stalling on any pixels help by the CPU bo. Signed-off-by: Chris Wilson commit e3732a6f7f61a959521be9a668bba045591e633c Author: Chris Wilson Date: Sun Jan 15 11:06:59 2012 +0000 sna: Defer ring switching until after a period of idleness Similar to the desire to flush the next batch after an overflow, we do not want to incur any lag in the midst of drawing, even if that lag is mitigated by GPU semaphores. Signed-off-by: Chris Wilson commit 5df7147b0934dadc63459c2c0f33e0663692425a Author: Chris Wilson Date: Sun Jan 15 10:28:00 2012 +0000 sna: Restore the kgem_create_map() symbol As the stub is exported to the driver even in the absence of vmapping. Signed-off-by: Chris Wilson commit be53740c6f0bb182e3d88f0597f127732c839316 Author: Chris Wilson Date: Sun Jan 15 10:16:13 2012 +0000 sna: Various DBG typos Fix some mispellings inside the DBG messages Signed-off-by: Chris Wilson commit 349e9a7b94199e759acaaccac3abf5e28f3c246f Author: Chris Wilson Date: Sun Jan 15 10:04:11 2012 +0000 sna: Prefer read-boxes inplace again Using the gpu to do the detiling just incurs extra latency and an extra copy, so go back to using a fence and GTT mapping for the common path. Signed-off-by: Chris Wilson commit 09dc8b1b358aa33836d511b75f92e8d096bc7e59 Author: Chris Wilson Date: Sat Jan 14 23:21:29 2012 +0000 sna/gen7: Check reused source for validity Be sure the mask picture has a valid format even though it points to the same pixels as the valid source. And also be wary if the source was converted to a solid, but the mask is not. Signed-off-by: Chris Wilson commit d9871f01d8c4584c1f39eb09b51d5461863934e9 Author: Chris Wilson Date: Sat Jan 14 23:21:29 2012 +0000 sna/gen6: Check reused source for validity Be sure the mask picture has a valid format even though it points to the same pixels as the valid source. And also be wary if the source was converted to a solid, but the mask is not. Signed-off-by: Chris Wilson commit 1d6030322e2c3bae87a0173a32fb8d341dea560c Author: Chris Wilson Date: Sat Jan 14 23:21:29 2012 +0000 sna/gen5: Check reused source for validity Be sure the mask picture has a valid format even though it points to the same pixels as the valid source. And also be wary if the source was converted to a solid, but the mask is not. Signed-off-by: Chris Wilson commit 0e4a24ef6c186909c99a501cb606994b5c10a813 Author: Chris Wilson Date: Sat Jan 14 23:21:29 2012 +0000 sna/gen4: Check reused source for validity Be sure the mask picture has a valid format even though it points to the same pixels as the valid source. And also be wary if the source was converted to a solid, but the mask is not. Signed-off-by: Chris Wilson commit ea299f2523d5adeca84274bb7003cde8ec743a44 Author: Chris Wilson Date: Sat Jan 14 23:21:29 2012 +0000 sna/gen3: Check reused source for validity Be sure the mask picture has a valid format even though it points to the same pixels as the valid source. And also be wary if the source was converted to a solid, but the mask is not. Signed-off-by: Chris Wilson commit 007da2f97894814eaded4d24e0481f950ca7bd00 Author: Chris Wilson Date: Sat Jan 14 23:21:29 2012 +0000 sna/gen2: Check reused source for validity Be sure the mask picture has a valid format even though it points to the same pixels as the valid source. And also be wary if the source was converted to a solid, but the mask is not. Signed-off-by: Chris Wilson commit 1d55b42fbd77e85ab8930b78bb5a9e3bccbca49e Author: Chris Wilson Date: Sat Jan 14 23:44:23 2012 +0000 sna: Fix read back of partial mmapped buffers Do not move a GTT mapped buffer into the CPU domain, it causes untold pain for no benefit! Signed-off-by: Chris Wilson commit 046e945173397e5fee36a231303b68a6bc9d809d Author: Chris Wilson Date: Sat Jan 14 23:25:52 2012 +0000 sna: Discard read buffers after use Rather than pollute the cache with bo that are known not to be in the GTT and are no longer useful, drop the bo after we read from it. Signed-off-by: Chris Wilson commit 421ee0bb53321e9fb2f17c850c51b80cc385bf57 Author: Chris Wilson Date: Sun Jan 15 00:46:47 2012 +0000 sna: Do not assume that the mappable aperture size is a power of two And instead derive a power-of-two alignment value for partial buffer sizes from the mappable aperture size and use that during kgem_create_buffer() Reported-by: Clemens Eisserer References: https://bugs.freedesktop.org/show_bug.cgi?id=44682 Signed-off-by: Chris Wilson commit 5d5da35c9fab4e7154921861ecbb83befb8840e5 Author: Chris Wilson Date: Sat Jan 14 18:28:24 2012 +0000 sna/gen[23]: Check for room in the batch before emitting pipeline flushes Use a single idiom and reuse the check built into the state emission, for both spans/boxes paths. Signed-off-by: Chris Wilson commit f7e4799687d5010ea0b56aeb6fbbb2e854b1b363 Author: Chris Wilson Date: Sat Jan 14 16:53:38 2012 +0000 sna/gen6: Allow greater use of BLT Typically we will be bound to the RENDER ring as once engaged we try not to switch. However, with semaphores enabled we may switch more freely and there it is advantageous to use as much of the faster BLT as is feasible. The most contentious point here is the choice of whether to use BLT for copies by default. microbenchmarks (compwinwin) benefit from the coallescing performed in the render batch, but the more complex traces seem to prefer utilizing the blitter. The debate will continue... Signed-off-by: Chris Wilson commit c1ce34d4509a3f3e963d82ac0569a21706892f8e Author: Chris Wilson Date: Sat Jan 14 15:08:18 2012 +0000 sna/gen6: Tidy markup for when using the BLT is truly preferrable Signed-off-by: Chris Wilson commit b64751dbdb1b88b91ad97aaf995b4261876cf860 Author: Chris Wilson Date: Sat Jan 14 13:50:50 2012 +0000 sna: Be more lenient wrt switching rings if the kernel supports semaphores If the kernel uses GPU semaphores for its coherency mechanism between rings rather than CPU waits, allow the ring to be chosen on the basis of the subsequent operation following a submission of batch. (However, since batches are likely to be submitted in the middle of a draw, then the likelihood is for ddx to remain on one ring until forced to switch for an operation or idle, which is the same situation as before and so the difference is miniscule.) Signed-off-by: Chris Wilson commit 295a22d2709b2442b5254968437f897dac22a0ec Author: Chris Wilson Date: Sat Jan 14 14:12:25 2012 +0000 sna: Ensure that the batch mode is always declared before emitting dwords Initially, the batch->mode was only set upon an actual mode switch, batch submission would not reset the mode. However, to facilitate fast ring switching with semaphores, reseting the mode upon batch submission is desired which means that if we submit the batch in the middle of an operation we must redeclare its mode before continuing. Signed-off-by: Chris Wilson commit 0d2a50772200d868d094f90dc1d30c1b4d7930ba Author: Chris Wilson Date: Sat Jan 14 11:03:55 2012 +0000 sna/glyphs: Cache the glyph image on the fallback path as well The glyph cache grew to accommodate the fallback pixman image for mask generation, and is equally applicable along the full fallback path. Signed-off-by: Chris Wilson commit f3e0ba4f65db2b85f89aa3868d153434bc41c811 Author: Chris Wilson Date: Sat Jan 14 10:17:27 2012 +0000 sna/gen5: Disable render glyphs_to_dst Processing more than a single rectangle using the CA path on ILK is extremely hit-or-miss, often resulting in the absence of the second primitive (ie. the glyphs are cleared but not added.) This is reminiscent of the complete breakage of the BRW shaders, none of which can handle more than a single rectangle. Signed-off-by: Chris Wilson commit fb92818ba4dc81ce62d58a87b5af6cb1e3a96708 Author: Chris Wilson Date: Sat Jan 14 01:48:11 2012 +0000 sna: Pass render operation to flush and avoid the implicit flush-on-batch-end Signed-off-by: Chris Wilson commit a62429a1f79b8fa4a5ddaf61b2bc80fc8dbe576c Author: Chris Wilson Date: Fri Jan 13 19:00:01 2012 +0000 sna: Upload continuation vertices into mmapped buffers In the common case, we expect a very small number of vertices which will fit into the batch along with the commands. However, in full flow we overflow the on-stack buffer and likely several continuation buffers. Streaming those straight into the GTT seems like a good idea, with the usual caveats over aperture pressure. (Since these are linear we could use snoopable bo for the architectures that support such for vertex buffers and if we had kernel support.) Signed-off-by: Chris Wilson commit 24df8ab9742f771cfeb6d30bd8a61a17a9e22ca7 Author: Chris Wilson Date: Fri Jan 13 16:15:21 2012 +0000 sna: Reverse the chronological sort order of inactive vma entries The goal is to reuse the most recently bound GTT mapping in the hope that is still mappable at the time of reuse. Signed-off-by: Chris Wilson commit 2f26bbe3dd55bfe26b6f93fc1f9e9813fc11f7c4 Author: Chris Wilson Date: Fri Jan 13 15:59:51 2012 +0000 sna: Remove the short-circuiting of all-damage in move_to_cpu To allow a replacement of the complete pixmap to be performed in place. Signed-off-by: Chris Wilson commit c81dba18e6a308d716a11b90da6e53ca7f5f8a02 Author: Chris Wilson Date: Fri Jan 13 14:21:13 2012 +0000 sna: Hint whether we prefer to use the GPU for a pixmap This includes the condition where the pixmap is too large, as well as being too small, to be allocatable on the GPU. It is only a hint set during creation, and may be overridden if required. This fixes the regression in ocitysmap which decided to render glyphs into a GPU mask for a destination that does not fit into the aperture. Signed-off-by: Chris Wilson commit 2bd942d55314426d7f429d7ccc0b62a622a79009 Author: Chris Wilson Date: Fri Jan 13 14:08:34 2012 +0000 sna/trapezoids: Quieten the debugging of the gory details of the rasteriser Hide the noise under another level of debugging so that hopefully the reason why it chose a particular path become clear. Signed-off-by: Chris Wilson commit 5dbcfc2ee3af64846298dbcb20db27c93b3d57f2 Author: Chris Wilson Date: Fri Jan 13 13:52:10 2012 +0000 sna: Be more lenient in not forcing to the GPU if the sources have CPU damage Signed-off-by: Chris Wilson commit 20ff4a1d73cc10e1f53050b19b8799ccbb5c7d04 Author: Chris Wilson Date: Fri Jan 13 13:30:13 2012 +0000 sna: Use top_srcdir to detect .git rather than top_builddir For srcdir != builddir builds, we need to be searching the source tree for the git id. Signed-off-by: Chris Wilson commit a4d5d725996b94e314ae7697c7a597ed2f60e8cd Author: Chris Wilson Date: Fri Jan 13 10:41:44 2012 +0000 sna: Experiment with GTT mmapped upload buffers In a few places, we can stream the source into the GTT and so upload in place through the WC mapping. Notably, in many other places we want to rasterise on a partial in cacheable memory. So we need to notify the backend of the intended usage for the buffer and when we think it is appropriate we can allocate a GTT mapped pointer for zero-copy upload. The biggest improvement tends to be in the PutComposite style of microbenchmark, yet throughput for trapezoid masks seems to suffer (e.g. swfdec-giant-steps on i3 and gen2 in general). As expected, the culprit of the regression is the aperture pressure causing eviction stalls, which the pwrite paths sidesteps by doing a cached copy when there is no GTT space. This could be alleviated with an is-mappable ioctl predicting when use of the buffer would block and so falling back in those cases to pwrite. However, I suspect that this will improve dispatch latency in the common idle case for which I have no good metric. Signed-off-by: Chris Wilson commit 252f3818250ecf4776f20afa8111d7f1f6f29c18 Author: Chris Wilson Date: Fri Jan 13 11:30:32 2012 +0000 sna: Relinquish the GTT mmap on inactive buffers if moved out of the aperture Signed-off-by: Chris Wilson commit 9c73dd91e90810116c215060bac434c5e8174f5f Author: Chris Wilson Date: Sat Jan 14 17:00:01 2012 +0000 Include to repair build intel_module.c:41:48: error: missing binary operator before token "(" commit b213f6e876f29cbcaccffeeb733726be4c91529e Author: Stefan Dirsch Date: Sat Jan 14 05:43:33 2012 +0100 Make driver backwards compatible for server 1.6.x. Signed-off-by: Stefan Dirsch commit 94217a4dd908f1368dfdef90797ce74a081663fb Author: Chris Wilson Date: Fri Jan 13 10:03:28 2012 +0000 sna: Decouple dirty pixmaps from list if we fail to upload them Rather than iterate endlessly trying to upload the same pixmap when failing to flush dirty CPU damage, try again on the next flush. Signed-off-by: Chris Wilson commit 65ef369c733ab45945a7d5fe4b76fe5c7167b51b Author: Chris Wilson Date: Fri Jan 13 09:58:40 2012 +0000 sna: Decouple from CPU dirty list after removing all CPU damage In the paths where we discard CPU damage, we also need to remove it from the dirty list so that we do not iterate over it during flush. Signed-off-by: Chris Wilson commit 0845fcef9e664eb100b55ad1cc20743844deee58 Author: Chris Wilson Date: Thu Jan 12 23:45:03 2012 +0000 sna: Correct iteration counter for stippled blits ==7215== Invalid read of size 2 ==7215== at 0x51A72F3: sna_poly_fill_rect_stippled_8x8_blt (sna_accel.c:7340) ==7215== by 0x51A9CDF: sna_poly_fill_rect_stippled_blt (sna_accel.c:8163) ==7215== by 0x51A3878: sna_poly_segment (sna_accel.c:6090) ==7215== by 0x216C02: damagePolySegment (damage.c:1096) ==7215== by 0x13F6E8: ProcPolySegment (dispatch.c:1771) ==7215== by 0x1436B4: Dispatch (dispatch.c:437) ==7215== by 0x131279: main (main.c:287) ==7215== Address 0x6f851e8 is 0 bytes after a block of size 32 alloc'd ==7215== at 0x4825DEC: malloc (vg_replace_malloc.c:261) ==7215== by 0x51A3558: sna_poly_segment (sna_accel.c:6049) ==7215== by 0x216C02: damagePolySegment (damage.c:1096) ==7215== by 0x13F6E8: ProcPolySegment (dispatch.c:1771) ==7215== by 0x1436B4: Dispatch (dispatch.c:437) ==7215== by 0x131279: main (main.c:287) An example being the stippled outline in gimp, the yellow marching ants, would randomly walk over the entire image. Signed-off-by: Chris Wilson commit 5c2c6474efd4dbc5a0fc9c68ef4e5b5e5cfee415 Author: Chris Wilson Date: Thu Jan 12 23:11:05 2012 +0000 sna/dri: Hook up a compile option to switch colour buffers to Y-tiling Signed-off-by: Chris Wilson commit 59b79e5952fdc40f8c50f74a72a19363cb426140 Author: Chris Wilson Date: Thu Jan 12 21:05:39 2012 +0000 sna: Reorder composite-done to destroy mask bo before source bo Just in the unlikely event that we hit the delete-partial-upload path which prefers destroying the last bo first. Signed-off-by: Chris Wilson commit 983b755313df8a0d256c59c32ec4106e35f237aa Author: Chris Wilson Date: Thu Jan 12 21:05:16 2012 +0000 sna/damage: Fix union of extents with dirty damage but no region By failing to account for certain paths which would create a damage elt without fully initialisating the damage region (only the damage extents), we would later overwrite the damage extents with only the extents for this operation (rather than the union of this operation with the current damage). This fixes a regression from 098592ca5d, (sna: Remove the independent tracking of elts from boxes). Include the associated damage migration debugging code of the callers. Signed-off-by: Chris Wilson commit 8d2f1eefe142b65db7d8821ba0f80fdb0902b2d5 Author: Chris Wilson Date: Thu Jan 12 21:08:41 2012 +0000 sna: Pass a hint that we may like to perform the fallback in place If we do not read back from the destination, we may prefer to utilize a GTT mapping and perform the fallback inplace. For the rare event that we wish to fallback and do not already have a shadow... Signed-off-by: Chris Wilson commit 48ab72754d0069a3247c5fee8c353a6b593eaed9 Author: Chris Wilson Date: Thu Jan 12 21:07:15 2012 +0000 sna: Use the GPU bo if it is all damaged By marking the scratch upload pixmap as damaged in both domains, we confused the texture upload path and made it upload the pixmap a second time. If either bo is all-damaged, use it! Signed-off-by: Chris Wilson commit 20a4d7181983c7fed289844be49ccaf3f56965c6 Author: Chris Wilson Date: Thu Jan 12 21:05:51 2012 +0000 sna: Dump batch contents for debugging before modification We need to dump the batch contents before the maps are made by the construction of the batch itself. Signed-off-by: Chris Wilson commit 7932a2a259069bb7d19af8566f7b7704f6c2eade Author: Chris Wilson Date: Thu Jan 12 14:06:22 2012 +0000 sna: Update for removal of backwards compatible miWideDash miWideDash() no longer calls miZeroLineDash() when called with gc->lineWidth==0, we need to do so ourselves. Signed-off-by: Chris Wilson commit b7cefddd467bfd0c100219969712a0133475004c Author: Chris Wilson Date: Thu Jan 12 13:17:43 2012 +0000 sna: Re-enable min-alignment workaround on pre-SNB hw Confirmed as still being required for both gen3 and gen4. One day I will get single-stream mode working, just not today apparently. Signed-off-by: Chris Wilson commit 978e1aeceab3c1a524f7d7a070fe04f37530c8d9 Author: Chris Wilson Date: Thu Jan 12 11:38:56 2012 +0000 sna: Only shrink a partial buffer if it is no longer used. The condition on being able to shrink a buffer is more severe than just whether we are reading from the buffer, but also we cannot swap the handles if the existing handle remains exposed via a proxy. Signed-off-by: Chris Wilson commit d3169154d18600e0d41db5f833fad52970e17b55 Author: Chris Wilson Date: Thu Jan 12 11:36:05 2012 +0000 sna: Improve a DBG message Signed-off-by: Chris Wilson commit 2a22990968aebd53a7bfeaf19e58ee609b980e5f Author: Chris Wilson Date: Thu Jan 12 11:22:06 2012 +0000 sna: Prevent 60Hz wakeups if the client stops in mid-render Only continue to wake up if the scanout remains active. Signed-off-by: Chris Wilson commit 1c0e9916caef6594511009c8cb79071ac0d82090 Author: Chris Wilson Date: Thu Jan 12 11:12:56 2012 +0000 sna: Align the partial buffer contents to cachelines To enable Daniel's faster pwrite paths. Only one step removed from using whole page alignment... Signed-off-by: Chris Wilson commit 1e4080318f58fd51f37792eefd367e2e4c813ea3 Author: Chris Wilson Date: Thu Jan 12 10:47:19 2012 +0000 sna: Replace the open-coded bubble sort of the partial list Signed-off-by: Chris Wilson commit 7290ced5791f9860b00901fa9a4545ab5a067fae Author: Chris Wilson Date: Thu Jan 12 02:59:43 2012 +0000 sna/video: Fix for changes in damage api We can avoid both calls to modify the damage with one simple check. Signed-off-by: Chris Wilson commit 87e6dcb3b06c274ecba5de56d4e86fec73e46dbb Author: Chris Wilson Date: Thu Jan 12 02:09:22 2012 +0000 sna: Don't call RegionIntersect for the trivial PutImage Signed-off-by: Chris Wilson commit 1bd6665093574372248a0743e5630e68aac653ed Author: Chris Wilson Date: Thu Jan 12 01:37:08 2012 +0000 sna: Disable the min alignment workaround Allow all generations to use the minimum alignment of 4 bytes again as it appears to be working for me... Or at least what remains broken seems to be irrespective of this alignment. Signed-off-by: Chris Wilson commit 112b8959261712aaa82f92af0aca4b97fa7c7f03 Author: Chris Wilson Date: Thu Jan 12 01:38:18 2012 +0000 sna: Prevent shrinking a partial buffer stolen for a read If we reuse a partial buffer for a read, we cannot shrink it during upload to the device as we do not track how many bytes we actually need for the read operation. Signed-off-by: Chris Wilson commit b09ae4c20313fea7af11f77cd673039635d4dcc7 Author: Chris Wilson Date: Thu Jan 12 00:58:08 2012 +0000 sna: Don't drop expired partial bo immediately, wait until dispatch As the partial bo may be coupled into the execlist, we may as well hang onto the memory to service the next partial buffer request until it expires in the next dispatch. Signed-off-by: Chris Wilson commit a3c42565a8f557b2e7f7ff7bfa45b13b606f2968 Author: Chris Wilson Date: Wed Jan 11 16:39:45 2012 +0000 sna: Store damage-all in the low bit of the damage pointer Avoid the function call overhead by inspecting the low bit to see if it is all-damaged already. Signed-off-by: Chris Wilson commit c64a9d0683e047a7eb041df78db746f6dd387b5e Author: Chris Wilson Date: Wed Jan 11 19:51:42 2012 +0000 sna: Choose a stride for the indirect replacement Don't blithely assume that the incoming bytes are appropriately aligned for the destination buffer. Indeed we may be replacing the destination bo with the shadow bytes out of another,larger, pixmap, in which case we do need to create a stride that is appropriate for the upload an perform the 2D copy. Signed-off-by: Chris Wilson commit b82851e74d5010ee08938ee42fa44c29fed633b1 Author: Chris Wilson Date: Wed Jan 11 15:42:00 2012 +0000 sna: Mark upload pixmaps as being wholly GPU damaged So that subsequent code resists performing CPU operations with them (after they have been populated.) Marking both sides as wholly damaged breaks the rules, but should work out so long as we check whether we can perform the operation within the target damage first. Signed-off-by: Chris Wilson commit 2a5ab05f1690484c230e8f876a3f7aefb371af71 Author: Chris Wilson Date: Wed Jan 11 15:24:28 2012 +0000 sna: Use a minimum alignment of 64 We should be able to reduce this by disabling dual-stream mode of the GPU (which we want to achieve any way for 2D performance). Artefacts in small uploads demonstrate that we fail to do. References: https://bugs.freedesktop.org/show_bug.cgi?id=44150 Signed-off-by: Chris Wilson commit e94807759eb6cfb10bd2d372fa71cc64a730bc7c Author: Chris Wilson Date: Wed Jan 11 12:13:18 2012 +0000 sna/gen6: Special case spans with no transform As the no transform is a special case of affine, we were attempting to deference the NULL transform in order to determine if it was a simple no-rotation matrix. As the operation is extremely simple, add a special case vertex program to speed it up. Signed-off-by: Chris Wilson commit 0a5313900ec9a7c499eb5051f3a5f078a9b0bbde Author: Chris Wilson Date: Wed Jan 11 12:09:13 2012 +0000 sna: Explicitly retire the bo following a serialisation point This is to keep the sanity checks in order, but conceptually should be useful as well. Signed-off-by: Chris Wilson commit 2add5991a7d186d8271cb79ae4f62dad7b4ca243 Author: Chris Wilson Date: Wed Jan 11 11:33:19 2012 +0000 sna: Mark the bo as no longer in the GPU domain after clearing needs_flush Signed-off-by: Chris Wilson commit fec70985719eec75b7fa799bddc3115fb329ab86 Author: Chris Wilson Date: Wed Jan 11 10:57:57 2012 +0000 sna: Add assertions to track requests Signed-off-by: Chris Wilson commit a93c93be76f6d5d2b481971349aabd15f282c3e8 Author: Chris Wilson Date: Wed Jan 11 00:05:20 2012 +0000 sna/gen6: Add a vertex program for a simple (affine, no rotation) spans I long for the day when this code is obsolete... Until then, this gives a nice boost in the fishtank. Signed-off-by: Chris Wilson commit 3cf5da1090ac777044912ec24619d349d1f6b521 Author: Chris Wilson Date: Tue Jan 10 23:32:29 2012 +0000 sna: Amalgamate small replacements into upload buffers Similar for the standard io paths, try to reuse an upload buffer for a small replacement pixmap. Signed-off-by: Chris Wilson commit f0e3f6b5bebf7471d3e3e84bd9b2d8469eb64093 Author: Chris Wilson Date: Tue Jan 10 22:12:41 2012 +0000 sna: Check needs-flush status immediately upon destroy Signed-off-by: Chris Wilson commit b4ae6dbaedd774f250b610b1e7323897c4abe23a Author: Chris Wilson Date: Tue Jan 10 21:25:28 2012 +0000 sna: Align the small upload buffers to 2 texels, and the pitch to dwords References: https://bugs.freedesktop.org/show_bug.cgi?id=44150 Signed-off-by: Chris Wilson commit 46f6c6917effbc43305367581cc1bbaa962c0251 Author: Chris Wilson Date: Tue Jan 10 20:34:09 2012 +0000 sna: A partial read buffer is allowed to be in the GPU domain As we can create the read buffer from an active cached bo, it may already be in the GPU domain by the time we first finish it, so fix the broken assertion. Signed-off-by: Chris Wilson commit 3c26055639f789b211f7db982e65ec0b86b23d4a Author: Chris Wilson Date: Tue Jan 10 20:06:51 2012 +0000 sna: Shrink the partial upload buffers before compacting the batch So that the relocation entries point into the contiguous surface/batch and can be trivially fixed up. Signed-off-by: Chris Wilson commit 7b077a4d3d549cde79d5b876289203788294493c Author: Chris Wilson Date: Tue Jan 10 18:40:53 2012 +0000 sna: Make the check for a single fill-rectangle clearer before modifying damage Signed-off-by: Chris Wilson commit ca2a07adc45273dc1abeb4b3ba7f88461aaf9c00 Author: Chris Wilson Date: Tue Jan 10 17:13:38 2012 +0000 sna: Release the stale GTT mapping after recreating the bo with new tiling Signed-off-by: Chris Wilson commit 8dd913fd3a093b54fc024fea2b31a3db2518db8d Author: Chris Wilson Date: Tue Jan 10 10:38:43 2012 +0000 sna: Add reminder about possible future tiling optimisations Signed-off-by: Chris Wilson commit 21948578d0d87f38447ef1ae44fada406949bca8 Author: Chris Wilson Date: Tue Jan 10 03:19:16 2012 +0000 sna: Disable the inline xRGB to ARGB upload conversion As we have to upload the dirty data anyway, setting the alpha-channel to 0xff should be free. Not so for firefox-asteroids on Atom at least. Signed-off-by: Chris Wilson commit 87f73b043426c47efa7670fb65bdcc7dfcf71fc3 Author: Chris Wilson Date: Tue Jan 10 01:42:37 2012 +0000 sna/gen[23]: Tile render fill to oversized bo If we are forced to perform a render operation to a bo too large to fit in the pipeline, copy to an intermediate and split the operation into tiles rather than fallback. Signed-off-by: Chris Wilson commit 2ccb31c5a4120efb940168c5e52154add01b0586 Author: Chris Wilson Date: Tue Jan 10 01:41:09 2012 +0000 sna: Shrink upoads buffers If we do not fill the whole upload buffer, we may be able to reuse a smaller buffer that is currently bound in the GTT. Ideally, this will keep our RSS trim. Signed-off-by: Chris Wilson commit 572cc76be5c78102166f2b3640640e21acdfa129 Author: Chris Wilson Date: Tue Jan 10 09:13:34 2012 +0000 sna: Destroy the counter damage after a reduction-to-all If, for instance, we reduce the GPU damage to all we know that there can be no CPU damage even though it may still have a region with a list of subtractions. Take advantage of this knowledge and cheaply discard that damage without having to evaluate it. This should prevent a paranoid assertion that there is no cpu damage when discarding the CPU bo for an active pixmap. Signed-off-by: Chris Wilson commit 4a255e13164440b797e5ac11dcbf72f0827a3094 Author: Chris Wilson Date: Tue Jan 10 16:34:23 2012 +0000 sna: Replace the free-inactive-gpu-bo with the generic code The function was semantically equivalent to moving the pixmap to the CPU for writing, so replace it with a call to the generic function. Signed-off-by: Chris Wilson commit c1d403266a611a68081690d19f6debb8e343095f Author: Chris Wilson Date: Tue Jan 10 00:41:05 2012 +0000 sna: Allow for xRGB uploads to replace their target bo Signed-off-by: Chris Wilson commit 406776cd955c3c384d4a537300e21eebe4413666 Author: Chris Wilson Date: Tue Jan 10 00:25:14 2012 +0000 sna: Rearrange buffer allocation to prefer llc bo over vmaps If we can create snoopable bo, we prefer to use those as creating a vmap forces a new bo creation increasing GTT pressure. Signed-off-by: Chris Wilson commit b76865fa3deff2f44a1158914a124b9c81d67eca Author: Chris Wilson Date: Mon Jan 9 22:11:21 2012 +0000 sna/gen2: Try to avoid creating a bo for solid colours As we try to use the diffuse/specular and only resort to using a texture operation for convenience in the rare case of a solid mask. Signed-off-by: Chris Wilson commit 981aae104a96b41db88cc381cc7592818f3e1298 Author: Chris Wilson Date: Mon Jan 9 22:02:40 2012 +0000 sna/gen2: Eliminate some switching between logic op and blend If the new mode can be done either using a logic op or with the blend unit, prefer the currently enabled unit. Signed-off-by: Chris Wilson commit d65b7f9cf46a48e3bfb37c0b75df55aa1e7bff41 Author: Chris Wilson Date: Mon Jan 9 21:58:03 2012 +0000 sna/blt: Rearrange to reduce a out-of-bounds copy to a clear If we asked to use the BLT, try to avoid trigging a context switch for a trivial case where we sample outside of a NONE source and so can reduce the operation to a clear. Signed-off-by: Chris Wilson commit 09e54c553680cbc2f3b4319cdab0f3d1af1574a8 Author: Chris Wilson Date: Mon Jan 9 14:04:41 2012 +0000 sna/gen2: Add poor-man's linear gradient support Convert the linear gradient to a texture ramp and compute the texture coordinates in the standard manner. Signed-off-by: Chris Wilson commit 6c70558ae7298db94724c931d88a730ef0151608 Author: Chris Wilson Date: Sun Jan 8 20:48:48 2012 +0000 sna: mark the cpu bo used for the upload buffer as in CPU domain For correctness we need to inform GEM of the change of domain for the buffer so that it knows to invalidate any caches when it is next used by the GPU. Signed-off-by: Chris Wilson commit 9ec31af02922bb016d0dfba07bc60cdca35b36f8 Author: Chris Wilson Date: Sun Jan 8 15:52:17 2012 +0000 sna/io: Combine small uploads into single writes For a small update, try and amalgamate the upload buffer. Signed-off-by: Chris Wilson commit 4db1bb3fd81b51e74b7f3e90078627d9d96fbefe Author: Chris Wilson Date: Sun Jan 8 14:20:40 2012 +0000 Removed deprecated xf86PciInfo.h includes The driver should and does provide its own PCI-IDs. Signed-off-by: Chris Wilson commit 54232d1a5da51d0f68fe099436bb0a1a2e249954 Author: Chris Wilson Date: Sun Jan 8 15:22:58 2012 +0000 sna: Add ricer stripes to memcpy_xor Signed-off-by: Chris Wilson commit c037b4f542a7b21cbaecedec259da3589db10039 Author: Chris Wilson Date: Sun Jan 8 08:58:41 2012 +0000 sna: Tune cache size for cpu bo cache This helps SNB on cairo-traces that utilize lots of temporary uploads (rasterised sources and masks for instance), but comes at a cost of regressing others... In order to counter the regression from increasing the GTT cache size, the CPU/GTT vma cache are split and accounted separately. Signed-off-by: Chris Wilson commit 26042b2660d87044e1920a1267d9984c00c9566a Author: Chris Wilson Date: Sun Jan 8 11:45:11 2012 +0000 sna: Bubble sort the partial buffer list back into order after trimming padding After reducing the used size in the partial buffer, we need to resort the list to maintain the list in decreasing amount of available space. Signed-off-by: Chris Wilson commit 3f7ea44bf19a03ee81b683885c9c2416092254a3 Author: Chris Wilson Date: Sun Jan 8 02:27:28 2012 +0000 sna/gen[67]: Hook into the clear operation for glyph masks Allow SandyBridge to specialise its clear routine to reduce the number of ring switches. It may be interesting to specialise the clear routines even further and use the special render clear commands... Signed-off-by: Chris Wilson commit 803ac5c6b992cb5448c67b11345b87a5d2b9c60d Author: Chris Wilson Date: Sun Jan 8 01:38:09 2012 +0000 sna/trapezoids: Don't risk stalling for inplace SRC trapezoids Optimistically we would replace the GPU damage with the new set of trapezoids. However, if any partial damage remains then the next operation which is often to composite another layer of trapezoids (for complex clipmasks) using IN will then stall. This fixes a regression in firefox-fishbowl (and lesser regressions throughout the cairo-traces). Signed-off-by: Chris Wilson commit 0229841c0d705138d6317a22ba80f4fa10d26acc Author: Chris Wilson Date: Sun Jan 8 01:46:24 2012 +0000 sna: Do not upload an untiled GPU bo if we already have a CPU bo Continuing the tuning for sna_copy_boxes. Signed-off-by: Chris Wilson commit 42eb9b7c4b55b620d9652ad3a54c8ab0a76fd7c2 Author: Chris Wilson Date: Sun Jan 8 00:21:26 2012 +0000 sna: Trim usage of vmapping The first, and likely only, goal is to support SHMPixmap efficiently (and without compromising SHMImage!) which we want to preserve as vmaps and never create a GPU bo. For all other use cases, we will want to create snoopable CPU bo ala the LLC buffers on SandyBridge. Signed-off-by: Chris Wilson commit e52f0204939924181480feec6d1511259169c8f1 Author: Chris Wilson Date: Sun Jan 8 00:20:11 2012 +0000 sna: Do not move-to-gpu for sna_copy_boxes if we have a cpu bo We trade-off the extra copy in the hope that as we haven't used the GPU bo before then, we won't need it again. Signed-off-by: Chris Wilson commit c05e90aa99c093431a74a94ceba27d7dce49d05b Author: Chris Wilson Date: Sat Jan 7 18:23:43 2012 +0000 sna: Missing chunks from last commit And update the check for reusing the blit! Signed-off-by: Chris Wilson commit 292aebfcdc042b08d3a5a21f839e6aec1175359e Author: Chris Wilson Date: Sat Jan 7 18:09:47 2012 +0000 sna: Prevent reuse of scanlines after the buffer is destroyed Once the buffer is destroyed, it may be reallocated with a new pitch. We could track handle and pitch, but it is easier to simply restart the blit after the buffer is freed. References: https://bugs.freedesktop.org/show_bug.cgi?id=44277 References: https://bugs.freedesktop.org/show_bug.cgi?id=44555 Signed-off-by: Chris Wilson commit d7d07d1df3ffc889ccc32c2ed44ce374e37f851d Author: Chris Wilson Date: Sat Jan 7 10:37:01 2012 +0000 sna: Pad upload buffers to ensure there are an even number of rows One restriction common to all generations is that samplers access pairs of rows and so we need to pad the buffer to accommodate access to that second row. Do so unconditionally along paths that may be used by the render pipeline. Signed-off-by: Chris Wilson commit e2ad0f6272c776939499c6202fb60bdcc2e955fa Author: Chris Wilson Date: Fri Jan 6 17:11:00 2012 +0000 sna/blt: Amalgamate many PolyFillRect of single boxes Signed-off-by: Chris Wilson commit c085de905c30cb5bae6b339841badf1e105c6ee6 Author: Chris Wilson Date: Fri Jan 6 15:47:47 2012 +0000 sna: Also mark a bo created by force-to-gpu as being all-damaged Similar to the action taken into move-to-gpu so that we forgo the overhead of damage tracking when the initial act of creation is on the render paths. Signed-off-by: Chris Wilson commit 9f1935bb4e894264053d94e53c99d5ad607700fb Author: Chris Wilson Date: Fri Jan 6 15:26:11 2012 +0000 sna: Support performing alpha-fixup on the source By inlining the swizzling of the alpha-channel we can support BLT copies from an alpha-less pixmap to an alpha-destination. Signed-off-by: Chris Wilson commit 141001df6c9c3485c500ed531a214c09b46c1d3b Author: Chris Wilson Date: Fri Jan 6 13:35:27 2012 +0000 sna: always skip active search when requested for find an inactive bo References: https://bugs.freedesktop.org/show_bug.cgi?id=44504 Signed-off-by: Chris Wilson commit eac0d9652b2399f8c36ba0288db6fe347ed78dc9 Author: Chris Wilson Date: Fri Jan 6 12:39:49 2012 +0000 sna: Optimise sna_poly_segment() for the frequent no-op case Strange as it may seem... But the principle of doing less work with greater locality should help everywhere, just not as noticeable when real work is performed. Signed-off-by: Chris Wilson commit a3699fff5ada85e4dea739aade25ebbb728e18f4 Author: Chris Wilson Date: Fri Jan 6 12:15:46 2012 +0000 sna: Only force a pipeline flush for a change of destination, not sources Signed-off-by: Chris Wilson commit 2fefee6015ed2df52c8513ae180ca83c01ff83c0 Author: Chris Wilson Date: Fri Jan 6 12:10:27 2012 +0000 sna/gen6: Reuse current no-blending setup for PictOpClear Signed-off-by: Chris Wilson commit 800ca0b4d1194544fe2461f91cbdc632c4d3dd7a Author: Chris Wilson Date: Fri Jan 6 12:00:43 2012 +0000 sna/gen6: Tidy emission of CC state (blending) Signed-off-by: Chris Wilson commit b9c9e9970cdb542173e3ed0da2bef614abedd3f7 Author: Chris Wilson Date: Fri Jan 6 11:38:31 2012 +0000 sna/trapezoids: Add debug markers for move-to-cpu Signed-off-by: Chris Wilson commit 2841c5fee79c42bca3e098ec620755d341b6888f Author: Chris Wilson Date: Fri Jan 6 11:32:54 2012 +0000 sna: fast path move-to-cpu of an all-damaged CPU bo When the bo is already completely damaged on the CPU, all we need to do is to sync with the CPU bo. Signed-off-by: Chris Wilson commit 07f1724ba5759772043fc4c5d1163ddd640004c2 Author: Chris Wilson Date: Fri Jan 6 11:00:38 2012 +0000 sna: Pass the real destination pixmap to sna_write_boxes() Faking it for the render upload simply isn't good enough, since we need the correct drawrect. Signed-off-by: Chris Wilson commit 5c2e9a98715eeddd8dfdff9fe3871bde659484cc Author: Chris Wilson Date: Fri Jan 6 02:26:39 2012 +0000 sna/trapezoids: Use a slightly faster miTrapezoidBounds() Signed-off-by: Chris Wilson commit 75f61678249018c84872c61b4609ba9d3d0d73dc Author: Chris Wilson Date: Fri Jan 6 01:38:42 2012 +0000 sna: Only need to remove the pixmap from the dirty CPU list when clearing damage Signed-off-by: Chris Wilson commit 86cc2cd3343c16b12e35e2048c113481f49196cf Author: Chris Wilson Date: Fri Jan 6 01:31:15 2012 +0000 sna: The condition for automatically using the GPU source is no CPU damage With no CPU damage to upload, we know that there is no reason not to use the GPU bo. Signed-off-by: Chris Wilson commit 69c556c310da544ddb66c2441f5d06dca29fb9f3 Author: Chris Wilson Date: Fri Jan 6 00:21:29 2012 +0000 sna: Rearrange use-cpu-bo to avoid reducing GPU damage If we spot that the region is wholly contained within the CPU damage initially, we can conclude that is not in the GPU damage without reduction. Signed-off-by: Chris Wilson commit 34c4dbe825a45315b05f0bd49539cbcf5de276f1 Author: Chris Wilson Date: Thu Jan 5 23:18:37 2012 +0000 sna/gen6: Only force BLT if the src and dst overlaps for self-copy Signed-off-by: Chris Wilson commit fc79af7a4abf1f0ceccacf23e8467ee2872eec09 Author: Chris Wilson Date: Thu Jan 5 23:06:17 2012 +0000 sna: Only force a batch continuation if the scanout is written to Signed-off-by: Chris Wilson commit c16c16d2553aa9a8bf9b0b0b367715b59020a357 Author: Chris Wilson Date: Thu Jan 5 22:51:55 2012 +0000 sna/gen6: Enable reuse of source Picture Check if the source and mask are identical pictures and just copy the source channel to the mask in that case. Signed-off-by: Chris Wilson commit f642b08870c6d7686368e053962075c153f76f86 Author: Chris Wilson Date: Thu Jan 5 22:26:09 2012 +0000 sna: Quickly handle the common case of using a CPU source pixmap For the common case (at least with llc bo) where we are immediately using an uploaded image from its linear buffer, check upfront before computing the sampled region for transfer to the GPU. Signed-off-by: Chris Wilson commit 8a9baa59e9d0c0761b82f23734514f6847a9bcc1 Author: Chris Wilson Date: Thu Jan 5 22:16:31 2012 +0000 sna: Quickly handle the common case of using a GPU source pixmap For the common case of glyphs, the pixmap is entirely on the GPU which can be quickly tested before performing the more complex transformations to determine how much pixel data we need to upload. Signed-off-by: Chris Wilson commit d4dad6e3723d70d78247f29f86079862af175266 Author: Chris Wilson Date: Thu Jan 5 21:39:24 2012 +0000 sna: Check that the GTT is no longer mapped before ensuring the shadow pointer Signed-off-by: Chris Wilson commit 352f0a3ffb8ae8503bb2fab779ea84f4e6d76317 Author: Chris Wilson Date: Thu Jan 5 21:33:26 2012 +0000 sna: Only mark the pixmap as GTT mapped if the private owns the pixels Signed-off-by: Chris Wilson commit 3061382f98c0b284c250c1a36f7a4fee22046664 Author: Chris Wilson Date: Thu Jan 5 21:05:52 2012 +0000 sna: Make sure that we do not attach to SHM pixmaps in ignorance Without xserver support for notification of when scratch pixmaps are reused, we simply cannot attach our privates to them lest we cause corruption with SHM pixmaps. This is a recent regression back unto an old, old xserver issue. Reported-by: Paul Neumann Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44503 Signed-off-by: Chris Wilson commit f7431726338e72d7a989e838f48aecdab15ab366 Author: Chris Wilson Date: Thu Jan 5 20:26:30 2012 +0000 sna: Add more debugging to use-gpu-bo To aide debugging in conjunction with compositors and their crazy offsets. Signed-off-by: Chris Wilson commit 53c943b551b86402067ea96cd9fcca2848e84387 Author: Chris Wilson Date: Thu Jan 5 18:41:26 2012 +0000 sna: Check for usable pixmap before deference its private Beware the NULL pointer and early deference. Signed-off-by: Chris Wilson commit 307276d7da99ceb84c175e412452e5d86d615cf4 Author: Chris Wilson Date: Thu Jan 5 14:26:05 2012 +0000 sna: Enable using the render pipeline for uploads to Y-tiled pixmaps Signed-off-by: Chris Wilson commit f9451aaa39e1d77b08d2201f5c4a44ab834f2237 Author: Chris Wilson Date: Thu Jan 5 14:22:21 2012 +0000 sna: Mark the upload as having acquired the GTT mapping In order for the entire PutImage to be performed inplace, we need to maintain the tendency to keep doing inplace operations. This hint is provided by tracking whether or not the last operation used the GTT mapping. However, that hint was not being provided by zpixmap_blt. Signed-off-by: Chris Wilson commit ce93c00a33a395986ffc0d33aae85d2c23aabc5d Author: Chris Wilson Date: Thu Jan 5 14:20:55 2012 +0000 sna: Avoid operating inplace if we have pending CPU damage If the operation does not replace existing CPU damage, we are likely to want to reuse the pixmap again on the CPU, so avoid mixing CPU/GPU operations. Signed-off-by: Chris Wilson commit f5d02d90f3349f33341954fc55824d12a7829e6c Author: Chris Wilson Date: Thu Jan 5 12:56:21 2012 +0000 sna: Avoid switching rings for uploading data On systems that incur painful overhead for ring switches, it is usually better to create a large buffer and perform a sparse copy on the same ring than create a compact buffer and use the BLT. Signed-off-by: Chris Wilson commit a42111ff94911d5fad34e6dbac8aa4a11b2d8032 Author: Chris Wilson Date: Thu Jan 5 12:12:22 2012 +0000 sna/trapezoids: Try creating the trapezoids mask inplace if not using spans Signed-off-by: Chris Wilson commit 4c6ccbd46a1681c73382b79a0246f7d8cb097606 Author: Chris Wilson Date: Thu Jan 5 11:09:01 2012 +0000 sna: Throttle, throttle, throttle. This reverts 281425551bdab7eb38ae167a3205b14ae3599c49 as it was causing insufferable lag in firefox. Signed-off-by: Chris Wilson commit dbb495c3aeef34eab2aabfdfaafb81facdea4100 Author: Chris Wilson Date: Thu Jan 5 10:34:08 2012 +0000 sna: Attach to the pixmap for source counting when deferring uploads If we decide to defer the upload for this instance of the source pixmap, mark it so. Then if we do use it again we will upload it to a GPU bo and hopefully reuse those pixels. Signed-off-by: Chris Wilson commit 292097590ba0f81b7505aedb2a4fbd18021641a5 Author: Chris Wilson Date: Thu Jan 5 10:31:15 2012 +0000 sna: Try doing a cheap is-contained check before reducing damage If the pixmap is entirely within the current CPU damage, we can forgo reducing either the GPU or CPU damage when checking whether we need to upload dirty pixels for a source texture. Signed-off-by: Chris Wilson commit 5ddae8bf21067e7d2a031a6b9020c02ab977cfed Author: Chris Wilson Date: Thu Jan 5 10:27:37 2012 +0000 sna: Check the composite-rectangles will be on the GPU before forcibly attaching If we think that the operation is better performed on the CPU, avoid the overhead of manipulating our privates. Signed-off-by: Chris Wilson commit 6ffd3605640bacaf0d744075622463aacf78d797 Author: Chris Wilson Date: Thu Jan 5 10:25:12 2012 +0000 sna: Deferred attachment to a pixmap needs to mark the pixmap as entirely dirty As demonstrated with oversized glyphs and a chain of catastrophy, when attaching our private to a pixmap after creation we need to mark the entire CPU pixmap as dirty as we never tracked exactly which bits were dirtied. Signed-off-by: Chris Wilson commit a09ebe0b6cc66d08e52b57851d9b8a6a1f71df2b Author: Chris Wilson Date: Thu Jan 5 10:23:25 2012 +0000 sna: Immediately upload oversized glyphs Glyphs, even large ones, we suspect will be reused and so the deferred upload is counterproductive. Upload them immediately and mark them as special creatures for later debugging. Signed-off-by: Chris Wilson commit 797b27365dc09a3f84349a33cffbfdc67cba0baa Author: Chris Wilson Date: Thu Jan 5 10:30:47 2012 +0000 sna: Don't perform a deferred attachment for vmapping if not supported Signed-off-by: Chris Wilson commit 23e3959e1f603c3ba0bd4f01128290241cf93edf Author: Chris Wilson Date: Thu Jan 5 04:00:32 2012 +0000 sna: Use the created cpu-bo for upload and download As we explicitly create CPU bo when wanted, we no longer desire to spontaneously create vmaps for simply uploading to the GPU bo. Signed-off-by: Chris Wilson commit 4530b87e445aea30ccbe751699963118ad5672d4 Author: Chris Wilson Date: Thu Jan 5 00:01:27 2012 +0000 sna: Fix assertion as we may want to create active bo with cpu mappings Signed-off-by: Chris Wilson commit 4119e68fb157fc612bce5e9c5669112ce35b4ca1 Author: Chris Wilson Date: Wed Jan 4 19:35:30 2012 +0000 sna/damage: Fix reduction to copy the boxes correctly We need to be carefully to copy the boxes in a strict lifo order so as to avoid overwritting the last boxes when reusing the array allocations. Signed-off-by: Chris Wilson commit 71b0924b586d9a60397e92e941e3d0cfa636ee61 Author: Chris Wilson Date: Wed Jan 4 19:34:41 2012 +0000 sna: Mark tiny CPU pixmaps as completely dirty Avoid the overhead of tracking damage on small pixmaps when using CPU rasterisation; the extra cost of sending the whole pixmap compared to the damage is negligble should it ever be required on the GPU. Signed-off-by: Chris Wilson commit fc14e63256a9b756c7c77ffe73f2f13784396c5a Author: Chris Wilson Date: Wed Jan 4 19:33:30 2012 +0000 sna: Only request page size allocations for the replacement buffer A precondition on bo creation is that the size must be page aligned. Signed-off-by: Chris Wilson commit 89739b711f42c3dbed7d3f4e6da0cdd61a5205ae Author: Chris Wilson Date: Wed Jan 4 17:41:16 2012 +0000 sna: Expand small stipples into 8x8 patterns Signed-off-by: Chris Wilson commit 878fbfe509da0a25dff8515d6d3b38ca3826466e Author: Chris Wilson Date: Wed Jan 4 16:56:55 2012 +0000 sna: Align tiled stipple uploads with the stipple pixmap correctly Signed-off-by: Chris Wilson commit 28a222a66bb450c7f6d61aef16fe73332854c8ce Author: Chris Wilson Date: Wed Jan 4 12:48:25 2012 +0000 sna: Always prefer to use cacheable operations after the GPU is wedged As rasterisation will be performed upon the CPU we need to avoid the readbacks form uncached memory and so we should restrict ourselves to only create further damage within the CPU pixmap. Signed-off-by: Chris Wilson commit 99ff83a3bebf1aa25c44a87f2c344307d20bc062 Author: Chris Wilson Date: Wed Jan 4 12:35:12 2012 +0000 sna: Prevent creation of bo purely for GTT mapping when wedged Signed-off-by: Chris Wilson commit a7c35fa4c3155d10ad75ac33aefb03dafa010aba Author: Chris Wilson Date: Wed Jan 4 12:33:09 2012 +0000 sna: Only allow mappable pixmaps to be mapped If we did not allocate the pixel data, such as for wedged pixmaps or scratch buffers, then we cannot perform the pointer dance nor do we want to create the GPU buffer. Signed-off-by: Chris Wilson commit 2cbc97d28aae138566e49df05e16d274b533ea86 Author: Chris Wilson Date: Wed Jan 4 12:32:06 2012 +0000 sna: Force creation of ordinary pixmaps when wedged. If the pixmap was intended for scanout, then the GPU bo will be created upon attachment to the fb. Signed-off-by: Chris Wilson commit f6cc73ba66f34d190b7c17421a62aa1256698431 Author: Chris Wilson Date: Wed Jan 4 12:56:31 2012 +0000 sna: The batch is counted in dwords, not bytes! Yikes, I choose the wrong units for the max_batch_size. Signed-off-by: Chris Wilson commit 227fbb90c4884bbc58c6c0cfff9663ec9ca54171 Author: Chris Wilson Date: Wed Jan 4 11:47:32 2012 +0000 sna: Carefully free the freed_pixmap upon exit As the contents of the pixmap are now rubbish, we need to manually destroy it rather than pass it to the normal sna_pixmap_destroy() routines. Signed-off-by: Chris Wilson commit 0ed758cd2176ee4f34e03d05d05130d52d75e577 Author: Chris Wilson Date: Wed Jan 4 12:18:20 2012 +0000 sna: Limit batch to a single page on 865g Verified on real hw, this undocumented (at least in the bspec before me) bug truly exists. Signed-off-by: Chris Wilson commit 3449f1cbe184a618e662d2a662167f05362b82e5 Author: Chris Wilson Date: Wed Jan 4 02:38:16 2012 +0000 sna: Guard against NULL damage deref The fast version of damage checking assumes that the damage has already been determined to be non-NULL, so make sure it is. Signed-off-by: Chris Wilson commit 04a6260016fb5ebefc1056ed6acf5001ec535d5c Author: Chris Wilson Date: Wed Jan 4 01:14:19 2012 +0000 sna: Fix typo during partial list deletion And keep the asserts that lead to its discovery. Signed-off-by: Chris Wilson commit f1dc1eadd84097fc691e85c636535ceeeb601a18 Author: Chris Wilson Date: Wed Jan 4 00:09:30 2012 +0000 sna/gen3: Remove incorrect premultiplication of solid component-alpha mask Signed-off-by: Chris Wilson commit 8cb9b8d7d7a1eb62eb3b20e6a50d3f1c9bde40c1 Author: Chris Wilson Date: Tue Jan 3 23:13:24 2012 +0000 sna: Discard mask and source for PictOpClear Signed-off-by: Chris Wilson commit feb75c55d6105a9ecc5f5ec7830276d1654918b9 Author: Zhigang Gong Date: Sat Dec 31 21:18:15 2011 +0800 uxa/glamor: Route some missing drawing function to glamor We have to route all the drawing function to glamor first, when glamor is enabled. This adds a few more functions that were previously just falling back to swrast and passes them to glamor instead. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit f4ea732d7181d4ef7f97fb2585e87cdcaef99d46 Author: Zhigang Gong Date: Tue Dec 27 17:09:17 2011 +0800 uxa/glamor: Let glamor do the GC validation If we are using GLAMOR, then a tile pixmap or stipple pixmap may be pure glamor pixmap and thus UXA will not know how to render to them, and we need to let glamor do the validation. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit e8aa9cedbfca09e22d46ec8882b9bebb3eb83022 Author: Zhigang Gong Date: Tue Dec 27 17:09:16 2011 +0800 uxa/glamor: Remove extraneous flush When glamor is enabled, a pixmap will not be accessed by UXA's accelerated functions. Only unaccelerated functions may access those pixmaps, and before each unaccelerated rendering, it calls uxa_prepare_access which will do a glFlush. Combined with a flush before sending to DRI clients, we no longer need to flush after every operation. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit 4ca94ed91fab7a9de5eed1053b891e8420cdf43d Author: Zhigang Gong Date: Tue Dec 27 17:09:15 2011 +0800 uxa/glamor: Remove dead code. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit 5576afc7d12ec0f028e416f4b4a076fc6d3c29d9 Author: Chris Wilson Date: Tue Jan 3 16:48:52 2012 +0000 sna: Inline checks for over-sized buffers during pixmap creation Make the tests for acceptable GPU pixmaps explicit and upfront. Signed-off-by: Chris Wilson commit b2dc17678fa3a548be61e1055d4d321dbd6494c3 Author: Chris Wilson Date: Tue Jan 3 15:50:21 2012 +0000 sna: Always search for an exact active match first from the bo-cache And accept second-best only if permitted by flags. Signed-off-by: Chris Wilson commit caf41ae23d263c7baed6b23a80693690c4dfe563 Author: Chris Wilson Date: Tue Jan 3 15:11:13 2012 +0000 sna: Force tiling on medium pitches if not reduced for other reasons Signed-off-by: Chris Wilson commit 1b688ca0cfc1e623f896e60a6a6abf724d57efb4 Author: Chris Wilson Date: Tue Jan 3 14:18:05 2012 +0000 sna: Delete the last buffer if destroyed without being used on the GPU Signed-off-by: Chris Wilson commit 4a68e7277104d7dccbdc4739eb5651902b9ccc20 Author: Chris Wilson Date: Tue Jan 3 12:19:24 2012 +0000 sna/gen3: Prefer to use the blitter for solid fills Signed-off-by: Chris Wilson commit 199e357dc693cfe232464e4faa82d9223a8325d6 Author: Chris Wilson Date: Tue Jan 3 12:16:48 2012 +0000 sna/trapezoids: Pass the sna pointer to the callees Avoid the repeated multiple indirect dereferences. Signed-off-by: Chris Wilson commit bd7aa1754dcf9d58d7deb92d99da9b78c91a0eb2 Author: Chris Wilson Date: Tue Jan 3 12:46:40 2012 +0000 sna: Avoid unnecessary call overhead for read-only move-to-cpu Signed-off-by: Chris Wilson commit 294c8791c435acf5933109fbcab85623a55b2c6c Author: Chris Wilson Date: Tue Jan 3 12:09:51 2012 +0000 sna: Use a cheaper no-reduction damage check for simply discarding further damage Signed-off-by: Chris Wilson commit 7ff42e9c83cdb17660a64901497704b38032af8c Author: Chris Wilson Date: Tue Jan 3 19:15:07 2012 +0000 sna/damage: Mark the box as packed so that the embedded_box is aligned correctly valgrind was complaining about an overlapping memcpy on a 64-bit platform as gcc padded the sna_damage_box to 28 bytes... Signed-off-by: Chris Wilson commit 4652a20de5fee0d5d1a8baadc4a93b6a93525564 Author: Chris Wilson Date: Tue Jan 3 21:20:09 2012 +0000 sna/gen3: Check for a non-NULL bo before incrementing its ref in reuse_source() For gen3, we may reduce a source into a constant operator and so dispense with keeping a bo. When duplicated into the mask channel, we then need to be careful not to dereference the NULL pointer. Signed-off-by: Chris Wilson commit 777fcc9b11e8cbfe942aa6bf898749f552acb3cf Author: Chris Wilson Date: Sun Jan 1 16:03:42 2012 +0000 sna: Prefer not to force the creation of gpu bo for pixmap uploads As this causes a significant regression when benchmarking firefox on SNB with firefox-planet-gnome if we already have CPU buffers. Signed-off-by: Chris Wilson commit 1a6c16a24cb74f82df9757c034c50f2cf141523f Author: Chris Wilson Date: Sun Jan 1 14:32:48 2012 +0000 sna: Keep a freelist of buffers As reallocation of bo is the most frequent cause of malloc/free. Signed-off-by: Chris Wilson commit f008a2a90c632d843f07846426f6d14af728c13b Author: Chris Wilson Date: Sun Jan 1 10:24:49 2012 +0000 sna: Tune blt routine Signed-off-by: Chris Wilson commit b57c7248acc2ad6a51b7eac74449d155defc998f Author: Chris Wilson Date: Sun Jan 1 14:10:20 2012 +0000 sna: Delete some redundant code Signed-off-by: Chris Wilson commit 83d16455b70e2f0348e51f95128d4fcae3736e7f Author: Chris Wilson Date: Sun Jan 1 13:58:44 2012 +0000 sna: Eliminate one union pass when reducing damage-add Signed-off-by: Chris Wilson commit 2f5b769e7144c7b85010429e6d8aebf9c9fc1628 Author: Chris Wilson Date: Sun Jan 1 10:00:37 2012 +0000 sna: Move some checks against programming errors to asserts Signed-off-by: Chris Wilson commit 24bf59c43fbedd9d85c913ac3c7f0e752c232eb4 Author: Chris Wilson Date: Sat Dec 31 18:57:57 2011 +0000 Revert "sna: Increase the minimum alignment constraint for g33" This reverts commit 2934e778f01cdf1307732b248b11a31c0e79e866. The actual cause of the bug I was seeing on my PNV box turned out to be a1f585a3d0a, so time to reinvestigate the alignment issues. commit 770a953ff03bb8328c3f29e274d225528840f30c Author: Chris Wilson Date: Sat Dec 31 17:19:08 2011 +0000 uxa/video: Clear all state structures before uploading A regression from eb859f644633e left some of the state uninitialised before uploading to the GPU leading to undefined behaviour. Reported-by: Alexey Shumitsky Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44338 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44252 Signed-off-by: Chris Wilson commit f1995c684d2e074ae04c9e42727e59cc77e16104 Author: Chris Wilson Date: Sat Dec 31 15:57:32 2011 +0000 uxa: the video destination should be in the render write domain Signed-off-by: Chris Wilson commit 511146d2e40e267f74e18c0dd06b65f5d6a69f5d Author: Chris Wilson Date: Sat Dec 31 13:27:13 2011 +0000 sna: Implement inplace trapezoidal addition (for clipmasks) Signed-off-by: Chris Wilson commit a1f585a3d0ae72e896684f62960a9ae96dc259f5 Author: Chris Wilson Date: Sat Dec 31 12:43:04 2011 +0000 sna: Update pixmap->devKind for GTT mappings Signed-off-by: Chris Wilson commit 343de19ef98eea016601dbbe2d1f601dbff9de20 Author: Chris Wilson Date: Sat Dec 31 11:19:44 2011 +0000 sna: Implement tiled uploads for small stipples larger than patterns Signed-off-by: Chris Wilson commit fb15cf2294da20bfc375ae62443b822770850316 Author: Chris Wilson Date: Sat Dec 31 10:24:58 2011 +0000 sna: Make sure the shadow pixmap is suitable for scanout Signed-off-by: Chris Wilson commit 281425551bdab7eb38ae167a3205b14ae3599c49 Author: Chris Wilson Date: Sat Dec 31 10:10:00 2011 +0000 sna: Tweak throttling to be run before going idle The goal is to avoid introducing extra latency in the middle of a command sequence and to delay it until we have to wait for the clients. Signed-off-by: Chris Wilson commit 2f5448f1329f344702e4e29b2509d7190677bbf0 Author: Chris Wilson Date: Fri Dec 30 22:13:05 2011 +0000 sna: compare tiling against minimum width for relevancy Signed-off-by: Chris Wilson commit e82b3d8069629ae5776e039d6ea1f3c901a3a094 Author: Chris Wilson Date: Fri Dec 30 09:16:00 2011 +0000 sna: Defer the initial source upload if the GPU bo will be untiled Signed-off-by: Chris Wilson commit 72624b0b5ba6549cb8d96f992d2656a28ec6078c Author: Chris Wilson Date: Thu Dec 29 22:43:35 2011 +0000 sna: Remove redundant use-gpu-bo clause Signed-off-by: Chris Wilson commit 6dc9bbc0161f071bbaf5c7e379974158a5ad666f Author: Chris Wilson Date: Thu Dec 29 22:43:44 2011 +0000 sna: Fix DBG for no intersection with damage Signed-off-by: Chris Wilson commit 0dc5c0651cb691fb8811cdf3075b3d322f9d37f8 Author: Chris Wilson Date: Thu Dec 29 13:49:23 2011 +0000 sna: Tune disarming of the scanout flush timer Signed-off-by: Chris Wilson commit ccd895c61d9f409a36c70eaf02d7ab43cc6c03c2 Author: Chris Wilson Date: Thu Dec 29 12:09:04 2011 +0000 sna: Allow uploading inplace to a freshly created GPU bo If the operation is favoured to be performed using a WC upload, presume that we will use the uploaded pixmap on the GPU and so prefer to create a GPU buffer to hold the fresh data. Signed-off-by: Chris Wilson commit f85a853455249fd782e907ce1d78d11f75362def Author: Chris Wilson Date: Thu Dec 29 11:59:57 2011 +0000 sna: Only update the damage region as necesary for contains-box Signed-off-by: Chris Wilson commit f53936407bd68f3d36ab525b4e0531fad58098e3 Author: Chris Wilson Date: Thu Dec 29 11:59:37 2011 +0000 sna: Reset the source counter upon dirtying the shadow pixmap Signed-off-by: Chris Wilson commit c9f7f10bc528ac783f4e89bdb36fc56ccdcd0088 Author: Chris Wilson Date: Thu Dec 29 09:03:21 2011 +0000 sna: Be paranoid and check for errors from mmapping the bo Now that the error propagation is actually in place, we may as well use it. Signed-off-by: Chris Wilson commit 98e053503aed292beb2006043e8508d59262c7c2 Author: Chris Wilson Date: Thu Dec 29 08:50:53 2011 +0000 uxa: Depend upon DRI2 not DRI The symbols required for building intel_dri.c are checked during configure under the DRI2 defines. Signed-off-by: Chris Wilson commit 58cee9d0def82d19f03c840325b6e84c20e77ace Author: Chris Wilson Date: Wed Dec 28 22:52:58 2011 +0000 sna/dri: Update set_bo() for change of bo ownership transfer during page-flip Signed-off-by: Chris Wilson commit f9ee02be269d1658d3a8a5166e9bd2a49ab6dea0 Author: Chris Wilson Date: Wed Dec 28 22:52:44 2011 +0000 sna: Fix debug message for read-boxes Signed-off-by: Chris Wilson commit 698bd43e0f7a59bcce6601b0c96df85935e54bb3 Author: Chris Wilson Date: Wed Dec 28 21:45:12 2011 +0000 sna: Do not create glyph caches if the gpu is wedged As these will only be created in normal memory and never used. Signed-off-by: Chris Wilson commit 78425a15597079c0549de0fa1bbbdbebcf9eaf28 Author: Chris Wilson Date: Wed Dec 28 15:26:14 2011 +0000 sna: Refactor common code for testing gpu busyness of a pixmap Signed-off-by: Chris Wilson commit 9105b7e03ab7e3602c7200ebdc44e89f873afe1f Author: Chris Wilson Date: Wed Dec 28 13:46:18 2011 +0000 sna: Perform clip mask compositing inplace Avoid the extra composite-in pass for simple clipmask construction. Signed-off-by: Chris Wilson commit a5583165da0d2ae5eb1e5a2e11ee6e245d4b5aa4 Author: Chris Wilson Date: Wed Dec 28 13:57:09 2011 +0000 uxa: Remove concept of global FB ownership made obsolete by GEM and KMS With the introduction of GEM, we can continue to submit batch buffers irrespective of ownership of the console, so do so. Signed-off-by: Chris Wilson commit 337635ab97bbfc9b4455eadb63214783bb90bb2b Author: Chris Wilson Date: Wed Dec 28 10:56:57 2011 +0000 sna: Add some more debugging to find the source of a read-boxes error Signed-off-by: Chris Wilson commit 3bf81241cbc97763e5f3cbc82772437ccbff5a6c Author: Chris Wilson Date: Tue Dec 27 17:09:59 2011 +0000 sna: Skip zero-sized glyphs Similar to the empty glyphs make sure that we just advance by the character width without drawing anything. Signed-off-by: Chris Wilson commit 8fc21328a0bdf87fde35d68d2b27834011acde7b Author: Chris Wilson Date: Tue Dec 27 15:26:46 2011 +0000 sna: Don't discard empty glyphs, just skip them A space is encoded as a 1x1 blank glyph, but we still need to advance by its character width and so we cannot simply discard the glyph. References: https://bugs.freedesktop.org/show_bug.cgi?id=44091id=44091 Signed-off-by: Chris Wilson commit 726290ea2a54716d3d8fb998fe7d2ab252421de7 Author: Chris Wilson Date: Tue Dec 27 13:16:34 2011 +0000 sna: Rearrange damage for tail-call optimisations Signed-off-by: Chris Wilson commit 04396b6e5039c0cd1ac655a8a9afe88bb8a1ebde Author: Chris Wilson Date: Tue Dec 27 09:58:40 2011 +0000 sna: Don't force the creation of a GPU bo if it will be untiled Signed-off-by: Chris Wilson commit 655a96cd5f12ff7fe593e7da5f34c7c92ef9b87d Author: Chris Wilson Date: Mon Dec 26 14:37:37 2011 +0000 sna: Mark the glyph cache as being unpageable In order to prevent it falling foul of the inactive pixmap reaper, we need to mark the pixmap as pinned. Signed-off-by: Chris Wilson commit 2934e778f01cdf1307732b248b11a31c0e79e866 Author: Chris Wilson Date: Mon Dec 26 11:30:39 2011 +0000 sna: Increase the minimum alignment constraint for g33 Still not getting the single-stream mode that I am aiming for! Reported-by: Matti Hamalainen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44150 Signed-off-by: Chris Wilson commit f7593a995a829978ce81397dde5c9ea6f9bb7681 Author: Chris Wilson Date: Sun Dec 25 09:40:46 2011 +0000 sna: Move the is-mappable check into the callers of region_inplace() As they slightly differ in their requirements. Signed-off-by: Chris Wilson commit aff32e3e08fce3c7b8dab3a25c96d69c409471fc Author: Chris Wilson Date: Sun Dec 25 00:36:33 2011 +0000 sna: Tweak damage not to reduce if it will not affect the outcome of reducing to all Signed-off-by: Chris Wilson commit be21a09fef0a3499153f2c123b65f1d5c872d437 Author: Chris Wilson Date: Sun Dec 25 00:28:55 2011 +0000 sna: Only call move-to-gpu on scanout flush if we have cpu damage to move Reduce the number of redundant calls. Signed-off-by: Chris Wilson commit 7b69dc88094ee2bb017364cd4356f3ae69cbc1f1 Author: Chris Wilson Date: Sun Dec 25 00:21:21 2011 +0000 sna: Inline the common portion of sna_get_pixel_from_rgba() The function overhead completely dominates for the common case. Signed-off-by: Chris Wilson commit b117f65520919f4ba36010cfe913a8c53166bf23 Author: Chris Wilson Date: Sat Dec 24 21:03:01 2011 +0000 sna: Jump straight to the fallback copy routines if the dst is not attached Marginally simplify the convoluted logic for choosing the most appropriate path and help prevent further errors. Signed-off-by: Chris Wilson commit 72217790ee2c080d618274456360b481d015e898 Author: Chris Wilson Date: Sat Dec 24 19:14:09 2011 +0000 sna: Use shadow if the GPU is busy or not immediately mappable Signed-off-by: Chris Wilson commit 0be136c21f0373d1eb2259b83c598655f4eb841e Author: Chris Wilson Date: Sat Dec 24 18:44:15 2011 +0000 sna: use indirect uploads if the bo was last known to be unmappable Signed-off-by: Chris Wilson commit e764a52ee8f0c552e218b3110318be9ba06634ae Author: Chris Wilson Date: Sat Dec 24 15:17:06 2011 +0000 sna: Encourage large operations to be migrated to the GPU Signed-off-by: Chris Wilson commit f9f8535db6a9e3affba9ba2c2a9314dfe12ab270 Author: Chris Wilson Date: Sat Dec 24 21:01:39 2011 +0000 sna: Fix damage reduction by adding new boxes to the tail of the box list Signed-off-by: Chris Wilson commit f8c91f229a9ca18fc58b0cabbea595d26627db8b Author: Chris Wilson Date: Sat Dec 24 12:17:53 2011 +0000 sna: We can always compare the box to be subtracted against the dirty extents Signed-off-by: Chris Wilson commit cc21d3fa045209861564cf240a9a082e0bdb63f8 Author: Chris Wilson Date: Sat Dec 24 12:17:43 2011 +0000 sna/damage: Fix the is-contained test It was a non-overlapping test which is almost the reverse of what was intended. Signed-off-by: Chris Wilson commit b86e4f59299f935d5a0ea8375da97e6fc57571f9 Author: Chris Wilson Date: Sat Dec 24 11:45:27 2011 +0000 sna: Check that the copy dst is attached before replacing damage Signed-off-by: Chris Wilson commit 3bcc9f08e1309725c18dfa5ca0e905bb88ebf4ea Author: Chris Wilson Date: Sat Dec 24 09:59:24 2011 +0000 sna: Create a GPU for a streaming write If we are about to do a write-only drawing operation that will exceed our cache, allocate a GPU bo and perform the operation inplace. Signed-off-by: Chris Wilson commit efc8d04fc114e9966e5ca00600f9663ecf03a5ca Author: Chris Wilson Date: Sat Dec 24 09:32:18 2011 +0000 sna: Promote an unattached pixmap to the GPU for inplace copies If we would prefer to perform the copy on the GPU and if the pixmap is virgin, create a GPU bo for the operation. Signed-off-by: Chris Wilson commit 8c0e7ff5ac996a5a5c0790966084d1c9e1b1f859 Author: Chris Wilson Date: Sat Dec 24 09:19:18 2011 +0000 sna: Clear the CPU damage for other overwriting rectangular blits as well And make the accessing of the sna_pixmap safe -- it may not even exist! Signed-off-by: Chris Wilson commit 7f9ed3ca56466f319d9ec06aebb7055552fb1fe1 Author: Chris Wilson Date: Sat Dec 24 08:57:49 2011 +0000 sna: reset the pixmap on the initial clear after being swapped out Pixmaps are swapped out into the CPU after a period of inactivity. This then prevents the core rendering routines from migrating the pixmap back to the GPU until it gets used again on a Render path. However, we can clear that CPU damage and enable migration before a number of key steps in the expose process. Signed-off-by: Chris Wilson commit 8c987b6ccfa83b99a316a7da49a6d7e30fcdf295 Author: Chris Wilson Date: Sat Dec 24 09:09:58 2011 +0000 sna: Cheaply reduce damage when subtracting and removing the entire damage Signed-off-by: Chris Wilson commit 098592ca5d79af2e4bdcd82ee598c4b2ba08df6b Author: Chris Wilson Date: Sat Dec 24 02:49:24 2011 +0000 sna: Remove the independent tracking of elts from boxes Following the switch to a global mode for damage, the elts array became redundant and all that is required is the list of boxes. Signed-off-by: Chris Wilson commit 73df0c7ab7c3a9edf0be2439c7e7ab07c0d75ecf Author: Chris Wilson Date: Sat Dec 24 02:48:18 2011 +0000 sna: Tune region upload inplace threshold Signed-off-by: Chris Wilson commit ef66c5b5ad221211948ec795ade031591c3f0ac7 Author: Chris Wilson Date: Sat Dec 24 00:15:33 2011 +0000 sna: Search the inactive VMA cache first for a linear mapping Signed-off-by: Chris Wilson commit 1cc07fa2d24b10ac95c7a84908290ec06539d447 Author: Chris Wilson Date: Fri Dec 23 20:31:21 2011 +0000 sna: Avoid forced creation of GPU bo for tiny operations and dirty pixmaps Signed-off-by: Chris Wilson commit e5bfea5826117bdd29664d83b3d478ff9db29ca3 Author: Chris Wilson Date: Fri Dec 23 20:30:58 2011 +0000 sna: Discard any GPU damage when overwriting with trapezoids Signed-off-by: Chris Wilson commit 819dc93e52533afc9b9005db1472672c3d42229f Author: Chris Wilson Date: Fri Dec 23 20:29:59 2011 +0000 sna/glyphs: Create GPU bo for large enough destination surfaces with glyphs Signed-off-by: Chris Wilson commit 9580ae8490a4119dac2fefe0085326db350209d7 Author: Chris Wilson Date: Fri Dec 23 19:11:43 2011 +0000 sna: Pass usage-hint to move-to-gpu When simply creating a source GPU bo it is preferrable not to mark it as all-damaged. Signed-off-by: Chris Wilson commit 98f15fc61361b7f1e01969f8d4237c13e93e3fb0 Author: Chris Wilson Date: Fri Dec 23 17:25:42 2011 +0000 sna: Don't align pwrite to cachelines for doing discontiguous copies The batch compaction breaks the 1:1 mapping between the cpu buffer and the bo, so we can no longer safely align the transfer to whole cachelines. References: https://bugs.freedesktop.org/show_bug.cgi?id=44091 Signed-off-by: Chris Wilson commit 3850f4ad48986691e1fb98038ae921deb6c25423 Author: Chris Wilson Date: Fri Dec 23 12:42:02 2011 +0000 sna: Silence unsigned comparison against 0 The good news is if this ever failed, the kernel is far too broken... Signed-off-by: Chris Wilson commit d9ca113a83177562cde3537bf955164c6950cbd0 Author: Chris Wilson Date: Fri Dec 23 10:06:58 2011 +0000 sna: Trim the unused pages from the batch between the last command and surface Signed-off-by: Chris Wilson commit 013eda17e91ff421cd1ef70470e3575f1183fcbd Author: Chris Wilson Date: Fri Dec 23 10:40:58 2011 +0000 sna: Free the additional bindings on proxies commit 84d97bdba02b909369b54de21425ffc9f6ad581a Author: Chris Wilson Date: Fri Dec 23 00:01:50 2011 +0000 sna/gen2+: Reuse source channel for mask where possible GTK+ has a clever trick for premultiplying its images by loading the same pixel data into both the source and mask, and then performing the composite. This causes us to upload the same pixel data twice! Signed-off-by: Chris Wilson commit 281f620573917faef52d9226b12737ce1e2dffdc Author: Chris Wilson Date: Thu Dec 22 22:23:41 2011 +0000 sna: Age active wholly damaged GPU buffers more slowly Signed-off-by: Chris Wilson commit f8575b8bd150ae11147fbf6b59171cbbb072dfec Author: Chris Wilson Date: Thu Dec 22 22:15:42 2011 +0000 sna: Cancel the immediate batch submit once handled in the block handler Signed-off-by: Chris Wilson commit 609e1d9da282323ab7abc1baad4d3f24ac55588f Author: Chris Wilson Date: Thu Dec 22 15:54:39 2011 +0000 sna: Bump the inactivity timeout With the goal of removing inactive pixmap froms the GPU after 5 minutes of idleness. Signed-off-by: Chris Wilson commit 62602209e54c3568795122ee1c902c3b81985303 Author: Chris Wilson Date: Thu Dec 22 14:20:20 2011 +0000 sna: discard damage-all even for width|height==0 operations Even if we don't know the extents of the render operation, if the entire pixmap is damaged we can still reduce the damage tracking. Signed-off-by: Chris Wilson commit f68a99a55e1e63d7e76a13a7b77b4bb3f7802b9e Author: Chris Wilson Date: Thu Dec 22 15:04:22 2011 +0000 sna: Mark fresh GPU only bo as being all damaged Presume that we will not fallback and so treat a GPU only bo (one that is initially created on the GPU) as being all-damaged. This makes future operations cheaper as the damage tracking overhead is much reduced, and the cost of the first readback will mainly be in the synchronisation overhead. Signed-off-by: Chris Wilson commit 1f2cd536bc712843233de3f5c50802c388d63c72 Author: Chris Wilson Date: Thu Dec 22 14:30:04 2011 +0000 sna: Reduce damage after complete solid fills RenderFillRectangles is often used to initially clear a pixmap after creation by flooding it with a solid colour, as is PolyRect. We can reduce further damage operations by checking for this condition. Signed-off-by: Chris Wilson commit 7a6a2c5d4cc98da76c73152cb7eafcbdb0c088ec Author: Chris Wilson Date: Thu Dec 22 13:24:07 2011 +0000 sna: Setup the pixmap correctly in order to attach our private During creation of sna_pixmap we validate that we can use a GPU bo with the target pixmap. This fails if we pass in a raw pixmap header, so make sure the scratch pixmap is fully initialised first. Signed-off-by: Chris Wilson commit f621b3de841f6037d387ca1439a0abe12ef29811 Author: Chris Wilson Date: Thu Dec 22 11:19:45 2011 +0000 sna: flatten source alphamaps Replace the source picture+alpha with a bo that contains the RGB channels from source and A from the alpha map. Signed-off-by: Chris Wilson commit 6c08eb4d6f8789e692ef018e007d1ae97a57c25f Author: Chris Wilson Date: Thu Dec 22 11:42:39 2011 +0000 sna/gen2+: Prefer to use the CPU if we have a source alphamap and CPU pictures Signed-off-by: Chris Wilson commit 354dc3c65b9cb86885b6927ee2b80cd2ee6a82ff Author: Chris Wilson Date: Wed Dec 21 21:35:06 2011 +0000 sna: Avoid fallbacks for convolutions by rendering the convolved texture If we have no shader support for generic convolutions, we currently create the convolved texture using pixman. A multipass accumulation algorithm can be implemented on top of CompositePicture, so try it! Signed-off-by: Chris Wilson commit 34cfa15e522ba486d591d37f37d494e399f70354 Author: Chris Wilson Date: Wed Dec 21 00:47:47 2011 +0000 sna: Drop suggested tiling parameter when creating bo The only place where we did anything other than use the default was when creating a new bo for CopyArea. In that case, basing the choice on the src GPU bo was not only wrong but a potential segfault. Signed-off-by: Chris Wilson commit 4d348425592251f49fd31b9259651e8b05e92d1e Author: Chris Wilson Date: Tue Dec 20 21:35:58 2011 +0000 sna: Intiialise pixmap size before use After 0c12f7cb0 we were setting the width/height of the pixmap *after* trying to use them to determine if the pixmap could be created on the GPU. Normally this would be corrected when we attempt to render, except for the core drawing protocol. Signed-off-by: Chris Wilson commit e71058c9c81067cd72b1193242acbd85272ab73a Author: Chris Wilson Date: Tue Dec 20 21:20:48 2011 +0000 sna: Always readback untiled bo in place We are going to gain no advantage from the kernel detiling the busy buffer. Signed-off-by: Chris Wilson commit 6690ff51ec939367051985172a00bf8ed65ac4e3 Author: Chris Wilson Date: Tue Dec 20 21:09:01 2011 +0000 sna: Treat all exported bo as potentially active Don't assume that a read/write will clear the active flag if the bo has been exported to another DRI client. Signed-off-by: Chris Wilson commit 743084bbc4c411694190f60cf5161086ada6454f Author: Chris Wilson Date: Tue Dec 20 20:42:08 2011 +0000 sna: Only upload tiny pixmaps on the second use Most small pixmaps appear to be single shot, so amalgamate them into one buffer and trim our memory usage. Signed-off-by: Chris Wilson commit ca24ffe8b9acef034a5610376c73ebbdce87d41c Author: Chris Wilson Date: Tue Dec 20 20:11:12 2011 +0000 sna: Improve a debug message Give the units when saying the pixmap is too small to bother tiling. Signed-off-by: Chris Wilson commit f837b9bcc7d384aeb37c2e9ebdac95571deaedc6 Author: Chris Wilson Date: Tue Dec 20 20:06:25 2011 +0000 sna/render: If the pixmap already has a GPU bo, use it for the source The usage hint not to create a GPU bo is obviously superceded if we already have a GPU bo. Signed-off-by: Chris Wilson commit dfafe76a57655784c313bc2078d0b28a7ac2675b Author: Chris Wilson Date: Tue Dec 20 18:39:20 2011 +0000 sna: Do not use Y-tiling for composite back pixmaps These are treated by the core drawing routines as replacements for the front-buffer attached to Windows, and so expect the usual BLT accelerations are available, for example overlapping blits to handle scrolling. If we create these pixmaps with Y-tiling and then they are pinned by the external compositor we are forced to perform a double copy through the 3D pipeline as it does not handle overlapping blits and the BLT does not handle Y-tiling. Signed-off-by: Chris Wilson commit 0cda7b4fa82870d57fcd0036a3b734cc73e2bf28 Author: Chris Wilson Date: Tue Dec 20 17:58:33 2011 +0000 sna: Implement extended fallback handling for src == dst copies Only marginally better than falling all the way back to using the CPU, is to perform a double copy to workaround the overlapping copy. Signed-off-by: Chris Wilson commit d257a967396c517146cfb12bbec5cd28418752a3 Author: Chris Wilson Date: Tue Dec 20 12:53:42 2011 +0000 sna: Explicitly handle depth==1 scratch pixmaps Short-cut the determination of whether it can be tiled and accelerated -- we know it can't! This is mainly to cleanup the debug logs. Signed-off-by: Chris Wilson commit 0c12f7cb01e75de3bf9c2af8ac6d5b4152566457 Author: Chris Wilson Date: Tue Dec 20 10:19:01 2011 +0000 sna: Tidy up some recent valgrind complaints with reuse of scratch pixmaps Signed-off-by: Chris Wilson commit d3a4f5db149888239b78df1b9fcc5379b1603005 Author: Chris Wilson Date: Tue Dec 20 12:12:39 2011 +0000 sna: Fixup the refcnt to avoid an assert Signed-off-by: Chris Wilson commit ac52a1fcd11a3ab10e1843ed2d19f9cf818de4c1 Author: Chris Wilson Date: Tue Dec 20 02:20:48 2011 +0000 sna: Don't immediately check for region intersection after subtract In the READ==0 case we know that the region does not intersect damage because we have just subtracted, and checking the intersection causes us to immediately apply the subtraction operation defeating the optimisation and forcing the expensive operation each time. Signed-off-by: Chris Wilson commit 4071dca0ef8b2b1605f16bed5c42991885a35efd Author: Chris Wilson Date: Tue Dec 20 00:25:29 2011 +0000 sna: Don't mark mapping as synchronous by default Only those that point into scratch memory need to synchronized before control is handed back to the client. Signed-off-by: Chris Wilson commit 4c2a97e9d2b1073f0e4b3f7b6670939e1b1c5121 Author: Chris Wilson Date: Mon Dec 19 23:10:45 2011 +0000 sna: Always pass the damage to sna_drawable_use_gpu_bo() As it now assumes that the damage is always writable. Signed-off-by: Chris Wilson commit 06a1792f91d3ae2ebb17e4ad55caec10c5407aa6 Author: Chris Wilson Date: Mon Dec 19 21:04:02 2011 +0000 sna: Avoid the GPU readback with READ==0 move_to_cpu Signed-off-by: Chris Wilson commit 0b5fec3f80c8d2e4d3b504af5bb02fb76be6b3a6 Author: Chris Wilson Date: Mon Dec 19 20:13:05 2011 +0000 sna: Drop the is-mapped flag after operating via the GPU Mark the end of a sequence of CPU operations and force the decision to map again to be based on the current upload operation. Signed-off-by: Chris Wilson commit 351c8f16336e757b8a4d218b3afda0698781d143 Author: Chris Wilson Date: Mon Dec 19 19:51:12 2011 +0000 sna: Discard all damage when replacing pixmap contents Signed-off-by: Chris Wilson commit addf66dda7cecaee8e58f53bb4e8d725dfdd2717 Author: Chris Wilson Date: Mon Dec 19 18:37:08 2011 +0000 sna: Tweak the rendering priorities If the last operation was on the GPU, continue on the GPU if this operation overlaps any GPU damage or does not overlap CPU damage. Otherwise, if the last operation was on the CPU only switch to the GPU if we do not overlap any CPU damage and overlap existing GPU damage. Signed-off-by: Chris Wilson commit 9b6ade12346efa5b9cc095ad44c7d71880a19ab0 Author: Chris Wilson Date: Mon Dec 19 17:21:26 2011 +0000 sna: Create a GPU bo for accelerated core drawing As we now can accelerate most of the common core drawing operations, we can create GPU bo for accelerated drawing on first use without undue fear of readbacks. This benefits Qt especially which heavily uses core the drawing operations. Signed-off-by: Chris Wilson commit eeb81dd6b4651c6b3e8676007d37480888726efa Author: Chris Wilson Date: Mon Dec 19 16:48:02 2011 +0000 sna: Remove the forced inplace upload Make the decision per-operation, with a tendency to remain mapped. Signed-off-by: Chris Wilson commit c3a8d77a2b6806a69de87fbaadea8612ef5f91dd Author: Chris Wilson Date: Mon Dec 19 16:51:29 2011 +0000 sna: Tune the inplace cross-over point to be half-cache size The theory being that we will also require cache space to copy from when uploading into the shadow. Signed-off-by: Chris Wilson commit d53b1b28951fd7558e9913a2973c17983e0bcecf Author: Chris Wilson Date: Mon Dec 19 15:33:39 2011 +0000 configure: Bump the required pixman version UXA now also uses pixman_triangle_t in order for its fallback, so we need to bump the required pixman version for UXA as well as SNA. Reported-by: Fabio Pedretti Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43946 Signed-off-by: Chris Wilson commit 1fa5721f064a8d1f34e4032b52f24597f4015313 Author: Chris Wilson Date: Mon Dec 19 00:37:03 2011 +0000 sna: Reset the GTT mapping flag when freeing the shadow pointers Signed-off-by: Chris Wilson commit 7326d3098662688b8040c6e1261064caed1f5d06 Author: Chris Wilson Date: Mon Dec 19 00:35:14 2011 +0000 sna: Restore CPU shadow after a GTT memory When mixing operations and switching between GTT and CPU mappings we need to restore the original CPU shadow rather than accidentally overwrite. Signed-off-by: Chris Wilson commit ae32aaf4b20dafef138dc9c28dbddbfe49f24b83 Author: Chris Wilson Date: Mon Dec 19 00:34:12 2011 +0000 sna/gen[23]: We need to check the batch before doing an inline flush A missing check before emitting a dword into the batch opened up the possibility of overflowing the batch and corrupting our state. Signed-off-by: Chris Wilson commit e32ad646762ccc7f22f938454e222d43abfb38ed Author: Chris Wilson Date: Sun Dec 18 23:42:07 2011 +0000 sna: Continue searching the linear lists for CPU mappings Prefer to reuse an available CPU mapping which are considered precious and reaped if we keep too many unused entries availabled. Signed-off-by: Chris Wilson commit 15a769a66fa1afbcffc642ef980387cffefc6bef Author: Chris Wilson Date: Sun Dec 18 22:18:02 2011 +0000 sna: Distinguish between GTT and CPU maps when searching for VMA Similarly try to avoid borrowing any vma when all we intend to do is pwrite. Signed-off-by: Chris Wilson commit d0ee695ef091671e2cc69b773f517030ebe961b2 Author: Chris Wilson Date: Sun Dec 18 20:28:18 2011 +0000 sna: the active cache is not marked as purgeable, so skip checking it Otherwise we do a lot of list walking for no-ops. Signed-off-by: Chris Wilson commit 8df9653135c6390ed699ba9f8cbf374b2cc84396 Author: Chris Wilson Date: Sun Dec 18 19:53:14 2011 +0000 sna: clear the request list when reusing a flushing bo That the rq is NULL when on the flushing list is no longer true, but now it points to the static request instead. Signed-off-by: Chris Wilson commit b51e3de66292e4b29483324e1dbfeb2495817351 Author: Chris Wilson Date: Sun Dec 18 19:51:17 2011 +0000 sna: When freeing vma, first see if the kernel evicted any Signed-off-by: Chris Wilson commit fed8d145c148bfa8a8a29f4088902377f9a10440 Author: Chris Wilson Date: Sun Dec 18 19:26:38 2011 +0000 sna: Use a safe iterator whilst searching for inactive linear bo As we may free a purged bo whilst iterating, we need to keep the next bo as a local member. Include the debugging that led to this find. Signed-off-by: Chris Wilson commit 2a98dabcabf25067abcda60f233656e19e83493a Author: Chris Wilson Date: Sun Dec 18 18:48:30 2011 +0000 sna: Purge all evicted bo After we find a single bo that has been evicted from our cache, the kernel is likely to have evicted many more so check our caches for any more bo to reap. Signed-off-by: Chris Wilson commit 8ae105b2c7a06fc81757f06ec1aaa2447b53498a Author: Chris Wilson Date: Sun Dec 18 18:20:11 2011 +0000 sna: Only retire for the VMA search if there are cached VMA If there are no VMA that might become inactive, there is no point scanning the inactive lists if we are searching for VMA. This prevents the regression in firefox-fishbowl whilst maintaining most of the improvement with PutComposite. Signed-off-by: Chris Wilson commit a0c0a3765ca348c74096fb157885da5b1258ee08 Author: Chris Wilson Date: Sun Dec 18 16:59:15 2011 +0000 sna: Retire if the inactive vma list is empty Try to recycle vma by first trying to populate the inactive list before scanning for a vma bo to harvest. Signed-off-by: Chris Wilson commit 34efb7314612cedcda4f866bc33f3ad5b6929ae2 Author: Chris Wilson Date: Sun Dec 18 16:58:04 2011 +0000 sna: Hint likely usage of CPU bo If we are going to transfer GPU damage back to the CPU bo, then we can reuse an active buffer and so improve the recycling. Signed-off-by: Chris Wilson commit 301896743867de0cbd22063c4bf2e1a8cf491656 Author: Chris Wilson Date: Sun Dec 18 16:17:04 2011 +0000 sna: Only upload to the source GPU bo if we need tiling to avoid TLB misses Signed-off-by: Chris Wilson commit b7f5d75aa54db7d0542b09f4b3081f7692ede602 Author: Chris Wilson Date: Sun Dec 18 16:11:34 2011 +0000 Silence uxa-only compilation Kill the stray warning for the undeclared extern used by the module loader. Signed-off-by: Chris Wilson commit a73cc4bf1e554806f403c6704d1cf98491f4d444 Author: Chris Wilson Date: Sun Dec 18 14:54:12 2011 +0000 sna/gen5: Tidy checking against hardcoded maximum 3D size Signed-off-by: Chris Wilson commit b43548af39f8773283b744e979ee575032183cdc Author: Chris Wilson Date: Sun Dec 18 12:11:01 2011 +0000 sna: Explicitly handle errors from madv In order to avoid conflating whether a bo was marked purgeable with its retained state, we need to carefully handle the errors from madv. Signed-off-by: Chris Wilson commit 954cf5129d462f7f4ff5d4ff44b256e0f091667c Author: Chris Wilson Date: Sun Dec 18 10:40:35 2011 +0000 sna/gen[67]: check for context switch after preparing source If we used the BLT to prepare the source, see if we can continue the operation on the BLT. Signed-off-by: Chris Wilson commit 90a432431c8fc293db611289c3369669c2975706 Author: Chris Wilson Date: Sun Dec 18 10:23:11 2011 +0000 sna/gen[23]: Try BLT if the source/target do no fit in the 3D pipeline Signed-off-by: Chris Wilson commit eeb9741981be528d1fba3021a30ab24084a5ce8c Author: Chris Wilson Date: Sun Dec 18 10:04:08 2011 +0000 sna/gen3: Tidy checks against hardcoded maximum 3D pipeline size Signed-off-by: Chris Wilson commit dcfcf438a511ee43e5969d01e41b3040a08cac3a Author: Chris Wilson Date: Sun Dec 18 09:58:08 2011 +0000 sna/gen2+: If we use the BLT to prepare the target, try using BLT for op If we incurred a context switch to the BLT in order to prepare the target (uploading damage for instance), we should recheck whether we can continue the operation on the BLT rather than force a switch back to RENDER. Signed-off-by: Chris Wilson commit 507debe8015ee10734a0b8a6ddf4aa251b7dddc5 Author: Chris Wilson Date: Sun Dec 18 01:45:47 2011 +0000 sna/gen5: If we need to flush the composite op, check to see if we can blit If we need to halt the 3D engine in order to flush the pipeline for a dirty source, we may as well re-evaluate whether we can use the BLT instead. Signed-off-by: Chris Wilson commit de530f89a36a80b652ed01001e6f0d4c8b1dc11a Author: Chris Wilson Date: Sun Dec 18 01:41:03 2011 +0000 sna/gen5+: First try a blt composite if the source/dest are too large If we will need to extract either the source or the destination, we should see if we can do the entire operation on the BLT. Signed-off-by: Chris Wilson commit 7b88f87945f23b3f80ae44b2aa19f00dff1904c8 Author: Chris Wilson Date: Sun Dec 18 00:44:00 2011 +0000 sna: Upload images in place from CopyArea As for PutImage, if the damage will be immediately flushed out to the GPU bo, we may as well do the write directly to the GPU bo and not staged via the shadow. Signed-off-by: Chris Wilson commit 1418e4f3156a17ff6c5cd0f653918160e30b7c0e Author: Chris Wilson Date: Sat Dec 17 23:11:03 2011 +0000 sna: Tune the default pixmap upload paths One issue with the heuristic is that it is based on total pixmap size whereas the goal is to pick the placement for the next series of operations. The next step in refinement is to combine an overall placement to avoid frequent migrations along with a per-operation override. Signed-off-by: Chris Wilson commit 25c353503a25d20e7db5acdc63d83564804efdf4 Author: Chris Wilson Date: Sat Dec 17 17:16:07 2011 +0000 sna: Simplify write domain tracking Replace the growing bitfield with an enum marking where it was last used. Signed-off-by: Chris Wilson commit d20d167a753d8e4fe581950e1bc49f29e0ec9f1f Author: Chris Wilson Date: Sat Dec 17 16:28:04 2011 +0000 sna: Upload to large pixmaps inplace When the pixmap is large, larger than L2 cache size, we are unlikely to benefit from first copying the data to a shadow buffer -- as that shadow buffer itself will mostly reside in main memory. In such circumstances we may as perform the write to the GTT mapping of the GPU bo. As such, it is a fragile heuristic that may require further tuning. Avoiding that extra copy gives a 30% boost to putimage500/shmput500 at ~10% cost to putimage10/shmput10 on Atom (945gm/PineView), without any noticeable impact upon cairo. Reported-by: Michael Larabel Signed-off-by: Chris Wilson commit dd8fd6c90612ada39eb32b98adc5acc97e7902aa Author: Chris Wilson Date: Sat Dec 17 12:38:09 2011 +0000 sna: Search through the inactive VMA cache for potential upload bo Signed-off-by: Chris Wilson commit 8ef5d8c1955e2e2ee19c64730f600639ac42de55 Author: Chris Wilson Date: Thu Dec 15 17:52:20 2011 +0000 sna: Map the upload buffer using an LLC bo In order to avoid having to perform a copy of the cacheable buffer into GPU space, we can map a bo as cacheable and write directly to its contents. This is only a win on systems that can avoid the clflush, and also we have to go to greater measures to avoid unnecessary serialisation upon that CPU bo. Sadly, we do not yet go to enough length to avoid negatively impacting ShmPutImage, but that does not appear to be a artefact of stalling upon a CPU buffer. Note, LLC is a SandyBridge feature enabled by default in kernel 3.1 and later. In time, we should be able to expose similar support for snoopable buffers for other generations. Signed-off-by: Chris Wilson commit 6e47f283711d122d96384a1a82854c11644e6d68 Author: Chris Wilson Date: Fri Dec 16 23:49:18 2011 +0000 sna/gen3: Enforce a minimum width of 2 elements for the render target Signed-off-by: Chris Wilson commit 2ff0826f94ca16e95cd662385f7091be750dec30 Author: Chris Wilson Date: Fri Dec 16 23:33:25 2011 +0000 sna: Discard GPU damage first before choosing where to fill_boxes() Signed-off-by: Chris Wilson commit 55520bab578865f878965aa362ec4933f4b26050 Author: Chris Wilson Date: Fri Dec 16 23:22:38 2011 +0000 sna/gen3: Initialise missing value of need ca pass for fill_boxeS() Signed-off-by: Chris Wilson commit e56d5081ea2da930bc82036ac7c4c78b433117ed Author: Chris Wilson Date: Fri Dec 16 23:18:02 2011 +0000 sna: Wrap I915_GEM_GET_PARAM with valgrind markup Signed-off-by: Chris Wilson commit e0399ec1619fe4f87f0578791e697a7e2a8c86dc Author: Chris Wilson Date: Fri Dec 16 23:07:37 2011 +0000 sna: Suppress an overwritten XY_SRC_COPY Signed-off-by: Chris Wilson commit 1684ed6a5e8c26ecb48cc1a5025107466526fe94 Author: Chris Wilson Date: Fri Dec 16 19:35:35 2011 +0000 sna: Clean up compiler warnings for shadowed variables No outright bug, just plenty of unwanted noise. Signed-off-by: Chris Wilson commit 300586b229ae941ac31850af00d120d8c441c583 Author: Chris Wilson Date: Fri Dec 16 17:56:53 2011 +0000 sna/gen4+: disable the blend unit for PictOpSrc Signed-off-by: Chris Wilson commit 0de7604d8ecfc73ef9e92059340d00ce5cfcdd75 Author: Chris Wilson Date: Fri Dec 16 17:40:01 2011 +0000 src/gen4+: Add support for depth 15 render copies/fills Signed-off-by: Chris Wilson commit a8fe50ab6503d9cb63931771318dc3e84d002092 Author: Chris Wilson Date: Sat Dec 17 11:15:36 2011 +0000 uxa: Explicitly check for libdrm_intel in configure And remove the excess dependencies from the common files. Signed-off-by: Chris Wilson commit 3320b459d6fe90d1145e3874c840b95279fb16c8 Author: Chris Wilson Date: Sat Dec 17 12:08:24 2011 +0000 sna: Clean up caches stored upon the batch bo Until the advent of the VMA cache, we were safe to reap the batch bo by hand. However, as we continue to add additional data to the bo, it is wise to use the common free function. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43899 Signed-off-by: Chris Wilson commit e2c8bac972cf46982bf64bd786ecc001009081f0 Author: Zhigang Gong Date: Fri Dec 16 15:11:16 2011 +0800 uxa/glamor: Fallback to new glamor pixmap if failed to create textured pixmap. If we failed to create textured pixmap from BO's handle, we turn to create a new glamor pixmap by call glamor_create_pixmap rather than fallback to in-memory pixmap. Have to introduce a new wrapper function intel_glamor_create_pixmap. Signed-off-by: Zhigang Gong commit 19c184b7e4f8de747ed6fb1f6f910238193cf2a1 Author: Chris Wilson Date: Thu Dec 15 18:18:19 2011 +0000 sna/gen3: Check for upload failure of video bo And propagate that failure back to the client. Reported-by: Paul Neumann References: https://bugs.freedesktop.org/show_bug.cgi?id=43716 Signed-off-by: Chris Wilson commit e68a8748f3418179eb41e8d81ba1050b883b7e47 Author: Chris Wilson Date: Thu Dec 15 09:44:20 2011 +0000 uxa: Move the region creation beyond the call into glamor So that we avoid leaking the region if hooking into glamor. Signed-off-by: Chris Wilson commit e3153a779ed220ad71958ce56be179d458794964 Author: Chris Wilson Date: Thu Dec 15 09:30:28 2011 +0000 sna: cap the number of times we attempt to resubmit the batch upon EBUSY Just in case the kernel gets stuck in a loop and we fail to make any progress at all. Signed-off-by: Chris Wilson commit 1cc43dc97bd6438d7fc808cb5ee449889a966bdf Author: Chris Wilson Date: Thu Dec 15 00:00:56 2011 +0000 sna: More missing move-to-cpu allocation checks Signed-off-by: Chris Wilson commit 12448b56060fb9c14da6b4ab02c95c7834fd3874 Author: Chris Wilson Date: Thu Dec 15 00:01:37 2011 +0000 sna: silence warning for unused 'priv' Signed-off-by: Chris Wilson commit eb8e979b4de5d854f15ae4c86d3db29371b386c1 Author: Chris Wilson Date: Wed Dec 14 23:02:28 2011 +0000 uxa/glamor: Allocate a fbPixmap with storage for fallbacks When we try to create a glamor pixmap and fail we need to create a real pixmap along with its pixel allocation, instead of detaching ourselves and returning the fake pixmap header. Signed-off-by: Chris Wilson commit 232fa93a4bf1760e16e913e8fb4d5159c4be9295 Author: Chris Wilson Date: Wed Dec 14 20:11:39 2011 +0000 uxa/glamor: Always notify glamor that the glyph has been unrealized The danger of the early return when UXA is not using glyphs is evident in the eventual crash when glamor begins evicting and reusing its glyph cache slots. Signed-off-by: Chris Wilson commit 95cceb5ae5503af0ac50a923fa47e134f0da8743 Author: Chris Wilson Date: Wed Dec 14 19:27:53 2011 +0000 sna: Fix DBG crash whilst pruning inactive GPU buffers Don't attempt to dereference the NULL gpu_bo after having just freed it. Here in lies the folly of trying to blindly silence the compiler. Instead we should heed the error return as it means that we didn't decouple the pixmap from the inactive list and so we choose to place it back on the active list to purge again in the near future. Reported-by: Paul Neumann commit e7f4b7fd91a41cac77e5eb1cb4f185141b09a09e Author: Chris Wilson Date: Wed Dec 14 18:21:22 2011 +0000 sna: Add some DBG() around Y-to-X fallbacks Signed-off-by: Chris Wilson commit 32bb2c89b8cab92f16af32e7a084bfefa406661d Author: Chris Wilson Date: Wed Dec 14 16:28:54 2011 +0000 sna: Check allocation of pixman_image_t And just fail to perform the copy, clearing the dst instead. Signed-off-by: Chris Wilson commit 37c525a11c0fab4e279e80ad24e5cf791239e005 Author: Chris Wilson Date: Wed Dec 14 16:26:46 2011 +0000 sna: Skip glyphs if we fail to allocate pixel data for them Signed-off-by: Chris Wilson commit 6a8188bb4dd0eba58e29803566023ad5c3d4d58a Author: Chris Wilson Date: Wed Dec 14 16:24:54 2011 +0000 sna: Close any handles after bo allocation failures Signed-off-by: Chris Wilson commit 43a22743124a83310379122d509c35840b583b2e Author: Chris Wilson Date: Wed Dec 14 13:26:05 2011 +0000 sna: Use the provided bo for blitting rather than assume priv->gpu_bo Reported-by: nkalkhof@web.de Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43802 Signed-off-by: Chris Wilson commit 30f5ee11f8ec3688807bbaded92561e96f9a439b Author: Chris Wilson Date: Wed Dec 14 12:30:40 2011 +0000 sna: Use a static request and synchronous rendering in case of malloc failure Signed-off-by: Chris Wilson commit 23fb2cebbe1d4d7df7403a64635339efa08a4dfe Author: Chris Wilson Date: Wed Dec 14 12:34:03 2011 +0000 sna/blt: Add a missing allocation check upon the source CPU pixmap Signed-off-by: Chris Wilson commit 5b0f3ff9a83b7cc932e96400999dc5e4a49369cb Author: Chris Wilson Date: Wed Dec 14 12:23:04 2011 +0000 sna/damage: Guard against malloc failures In the event of failure, we choose to loose track of the damage and choose rendering corruption over crashing. Signed-off-by: Chris Wilson commit f8b9a2a5473efd0fefb3d2878e70c24c320245ca Author: Zhigang Gong Date: Tue Dec 13 21:46:14 2011 +0800 uxa/glamor: Enable the rest of the glamor rendering routines This commit hooks up all the remaining rendering routines to call into glamor; the takeover is nearly complete! When tested with the latest glamor master branch, it passes rendercheck. One thing need to be pointed out is the picture's handling. Pictures support many different color formats, but glamor's texture only support a few color formats. And the most common scenario is that we create a pixmap with a color depth and then attach it to a picture which has a specific color format with the same color depth. But there is no way to change a texture's internal format after the texture was allocated. If you do that, the OpenGL will allocate a new texture. And then the glamor side and UXA side will be inconsitent. So for all the picture related operations, we can't fallback to UXA path directly, even it is rather a straight forward operation. So for the get_image, Addtraps.., we have to add wrappers function for them to jump into glamor firstly. Signed-off-by: Zhigang Gong [ickle: prefer access; ok = glamor(); finish; if (!ok) goto fallback; return; ] Signed-off-by: Chris Wilson commit d5456e40d9bebc9d6a121abdb124a90a2a8a6958 Author: Chris Wilson Date: Wed Dec 14 10:41:33 2011 +0000 uxa/glamor: Silence a compiler warning for some unused code intel_glamor.c: In function 'intel_glamor_create_screen_image': intel_glamor.c:192:12: warning: variable 'pixmap' set but not used [-Wunused-but-set-variable] Signed-off-by: Chris Wilson commit 4f1a99a70e76ea5637c5ee8226b2e52a464f5948 Author: Chris Wilson Date: Tue Dec 13 19:44:15 2011 +0000 sna: Protect against deferred malloc failures for pixel data As we now defer the allocation of pixel data until first use, it can fail in the middle of a rendering routine. In order to prevent chasing us passing a NULL pointer into the fallback routines, we need to propagate the failure from the malloc and suppress the failure, discarding the operation, which is less than ideal. Signed-off-by: Chris Wilson commit d2c6d950ed2c5882e7d501b6974e72be4d6da8a8 Author: Chris Wilson Date: Tue Dec 13 15:04:10 2011 +0000 sna: Mark upload buffers as unaccessible upon submission Use valgrind to catch use-after-finish bugs. Signed-off-by: Chris Wilson commit e39ea29bcc5d1d76dd5cb3db555516ef848647a5 Author: Chris Wilson Date: Tue Dec 13 13:18:56 2011 +0000 sna: Allow the debugger to map bo from the batch during kgem_submit() Signed-off-by: Chris Wilson commit 2fabb5068d36ce97242844066b5121fcf6d9c24e Author: Chris Wilson Date: Tue Dec 13 13:15:51 2011 +0000 sna: Debug fixup for non-LLC systems The cpu bo is only allocated on LLC systems, so do avoid the NULL deref on debugging for others. Signed-off-by: Chris Wilson commit e037379c8e57f8e42956863c10a4e2b18057a6d5 Author: Chris Wilson Date: Tue Dec 13 13:14:15 2011 +0000 sna: Fix a debugging assert The bo is allowed to be NULL, so defer the assert until after it is known to be non-NULL. Signed-off-by: Chris Wilson commit 5d5b2b8ee203ae2274fc7d13ed38d2945facca9e Author: Chris Wilson Date: Tue Dec 13 11:30:05 2011 +0000 uxa: Cap the maximum number of VMA cached Since we can not keep an unlimited number of vma cached due to the hard per-process limits on the number of mappings and recreating mappings is slow due to excruciatingly slow GTT pagefaults, we need to compromise and keep a small MRU cache of inactive mmaps. This uses the new API in libdrm-2.4.29 to specify the limit upon the VMA cache maintained by libdrm. Signed-off-by: Chris Wilson commit 1128825efb3179a5a5d951fa24db6b769ee41219 Author: Chris Wilson Date: Tue Dec 13 11:20:25 2011 +0000 uxa: Wakeup 3s after the last rendering to reap the bo-cache libdrm expires its bo 2s after entry into the cache, but we need to free a buffer to trigger the reaper. So schedule a timer event to trigger 3s after the last rendering is submitted to free any resident bo during long periods of idleness. Signed-off-by: Chris Wilson commit db7c9e8561afcc1ca7ab16b3bf2d5b49938e26d9 Author: Chris Wilson Date: Tue Dec 13 10:05:25 2011 +0000 configure: Link the extra valgrind debugging to --enable-debug Signed-off-by: Chris Wilson commit d02dc0fd84194b6acc607d17e4396dd1fdc681f8 Author: Chris Wilson Date: Tue Dec 13 01:18:59 2011 +0000 sna: Set the refcnt on the replacement bo The paranoia wasn't in vain. Signed-off-by: Chris Wilson commit 7472db8c8c9994798ea36de1ce2f51725d8b387a Author: Chris Wilson Date: Mon Dec 12 21:55:04 2011 +0000 sna: Double-check that the submitted buffers were not purged More paranoia is good for the soul. Signed-off-by: Chris Wilson commit 0bbd6a08fe485c80bd5c9a1b7027618a03a26f84 Author: Chris Wilson Date: Mon Dec 12 21:52:56 2011 +0000 sna/gen2: Tidy checking against too large pixmaps for the 3D pipeline Signed-off-by: Chris Wilson commit b392474f3a052fefc410383725b64f0fdbe7788e Author: Chris Wilson Date: Mon Dec 12 21:28:09 2011 +0000 sna: Force a suitable minimum stride for 3D temporaries Signed-off-by: Chris Wilson commit 3c22baaba97a89d24e507e3d832d53d764902040 Author: Chris Wilson Date: Mon Dec 12 21:16:56 2011 +0000 sna/gen2: Check for unhandled pitches in the render pipeline Signed-off-by: Chris Wilson commit f6a30df8dc75852d1f6daeabe4511b275594e52e Author: Chris Wilson Date: Mon Dec 12 20:40:29 2011 +0000 sna: Enable memcpy uploads to SHM pixmaps Signed-off-by: Chris Wilson commit 3c163d105e964a1084d665500ef917254d8f2179 Author: Chris Wilson Date: Mon Dec 12 16:26:13 2011 +0000 sna: Use the CPU bo as a render source if compatible and no GPU bo This is principally to catch the cases of compositing after a fresh PutImage. Signed-off-by: Chris Wilson commit c481bec356b2e40e66a000dbaaf261bf7aae930d Author: Chris Wilson Date: Mon Dec 12 14:10:57 2011 +0000 sna: Experiment with creating the CPU pixmap using an LLC BO A poor cousin to vmap is to instead allocate snooped bo and use a CPU mapping for zero-copy uploads into GPU resident memory. For maximum performance, we still need tiled GPU buffers so CPU bo are only useful in situations where we are frequently migrating data. Signed-off-by: Chris Wilson commit 6c9aa6f9cf8e59ca6aa1866b83690a1de8cfb757 Author: Chris Wilson Date: Mon Dec 12 11:47:25 2011 +0000 sna: Defer allocation of memory for larger pixmap until first use In the happy scenario where the pixmap only resides upon the GPU we can forgo the CPU allocation entirely. The goal is to reduce the number of needless mmaps performed by the system memory allocator and reduce overall memory consumption. Signed-off-by: Chris Wilson commit 4b48d28f6e85f345730cb7242f2152ac115b267a Author: Chris Wilson Date: Mon Dec 12 10:52:34 2011 +0000 sna: Fix a typo, end statements with semi-colons Signed-off-by: Chris Wilson commit 4d20798c7871ffe8581e2cf509b6aa2e40b3ae5f Author: Chris Wilson Date: Mon Dec 12 10:10:16 2011 +0000 sna: We need to remap the gpu_only mmap prior to every use Since the VMA may be reaped at any time whilst the mapping is idle. Signed-off-by: Chris Wilson commit 2682308c10c9622247409dee9c6bb6a862b73c3f Author: Chris Wilson Date: Mon Dec 12 09:24:11 2011 +0000 sna: Remove bo transference for whole XCopyArea In benchmarking firefox this performs whose - it would appear the sources are indeed used more often than not. Signed-off-by: Chris Wilson commit 7703424222f8bd08450c1b109ea64c6b0ee901d8 Author: Chris Wilson Date: Mon Dec 12 00:15:10 2011 +0000 sna/gen6: Only use CPU bo for a render target if untiled For large render targets, we prefer to use tiled bo in order to avoid severe performance degradation. However, if we don't have a GPU bo but do have a CPU bo and the operation would be untiled, then simply use the CPU bo. Signed-off-by: Chris Wilson commit a92a41ba3291a4304948ed1961d1242ca7d3981e Author: Chris Wilson Date: Sun Dec 11 19:03:54 2011 +0000 sna/gen6: Tidy the usage of the max pipeline size Signed-off-by: Chris Wilson commit e9e6d6f7c8af300716c64b041f96c09d58b3eaa2 Author: Chris Wilson Date: Sun Dec 11 17:25:46 2011 +0000 sna/gen3: Move the video dst_bo to make the conditional clearer Signed-off-by: Chris Wilson commit 118ef0781c5064aa0696af59a5dac67091b10046 Author: Chris Wilson Date: Sun Dec 11 16:56:53 2011 +0000 sna/composite: Make the check for a no-op earlier and clearer Signed-off-by: Chris Wilson commit 2674ef864c93034d728ee11ee0b7ab96cd4cba57 Author: Chris Wilson Date: Sun Dec 11 16:23:13 2011 +0000 sna: Enable hooking up of valgrind during debugging Signed-off-by: Chris Wilson commit c83fd4e24de187700bc125037cd9ae311514213e Author: Chris Wilson Date: Sun Dec 11 16:14:38 2011 +0000 sna: Add some more debug messages for VMA caching Signed-off-by: Chris Wilson commit 3ae7fb918a2ca47d3944521a1ae30143dcb14eeb Author: Chris Wilson Date: Sun Dec 11 13:52:42 2011 +0000 sna: Restrict pitch alignment on 945gm to 64 bytes In theory we should be able to disable dual-stream mode and so be subject to much looser restrictions (such as the pitch need only be dword aligned). However, achieving single-stream mode seems quite difficult! Reported-by: Paul Neumann References: https://bugs.freedesktop.org/show_bug.cgi?id=43706 Signed-off-by: Chris Wilson commit 2f35d77cd07a4974051c922f4809ce44939b0556 Author: Chris Wilson Date: Sun Dec 11 13:37:18 2011 +0000 sna: Update computation of untiled pitch to cater for CREATE_SCANOUT Signed-off-by: Chris Wilson commit 5a0139487f5a5caada56121395aa166fc9f08663 Author: Chris Wilson Date: Sun Dec 11 12:34:40 2011 +0000 sna/gen3: Ensure that depth read/writes are disabled before first use Our goal is to achieve "single-stream" rendering where the entire RenderCache is allocated to the colour buffer (rather than split between colour and depth). In theory all that is required is for the pipeline not to reference the depth buffer at all, however it is not made clear when that evaluation is made. Signed-off-by: Chris Wilson commit a02bbd8700690c98c6cf3ae98dd7ee3da9887b0a Author: Chris Wilson Date: Sun Dec 11 10:34:37 2011 +0000 sna: Only transfer the bo if the src/dst are of matching size If the src replaces the dst, it could just be a much larger pixmap! Signed-off-by: Chris Wilson commit 43a99648635fa76e0d6d71acaeb6ba919d24eb26 Author: Chris Wilson Date: Sun Dec 11 10:30:48 2011 +0000 sna: Only transfer unpinned buffers Signed-off-by: Chris Wilson commit eb859f644633ee716083d253a5b7ff95163380e5 Author: Chris Wilson Date: Sun Dec 11 01:34:05 2011 +0000 uxa/video: Correct the offset of the binding table in the surface buffer The binding table is intended to be after all the surface descriptions, so make sure we write it with the appropriate offset into the buffer. Fixes regression from 699888a64 (uxa/video: Use the common bo allocations and upload) Reported-by: Cyril Brulebois Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43704 Signed-off-by: Chris Wilson commit 051a18063df075536cb1ac0dc4dfc3c1306ab74e Author: Chris Wilson Date: Sat Dec 10 22:45:25 2011 +0000 sna: Implement a VMA cache A VMA cache appears unavoidable thanks to compiz and an excrutiatingly slow GTT pagefault, though it does look like it will be ineffectual during everyday usage. Compiz (and presumably other compositing managers) appears to be undoing all the pagefault minimisation as demonstrated on gen5 with large XPutImage. It also appears the CPU to memory bandwidth ratio plays a crucial role in determining whether going straight to GTT or through the CPU cache is a win - so no trivial heuristic. x11perf -putimage10 -putimage500 on i5-2467m: Before: bare: 1150,000 2,410 compiz: 438,000 2,670 After: bare: 1190,000 2,730 compiz: 437,000 2,690 UXA: bare: 658,000 2,670 compiz: 389,000 2,520 On i3-330m Before: bare: 537,000 1,080 compiz: 263,000 398 After: bare: 606,000 1,360 compiz: 203,000 985 UXA: bare: 294,000 1,070 compiz: 197,000 821 On pnv: Before: bare: 179,000 213 compiz: 106,000 123 After: bare: 181,000 246 compiz: 103,000 197 UXA: bare: 114,000 312 compiz: 75,700 191 Reported-by: Michael Larabel Signed-off-by: Chris Wilson commit 735a15208dd600eefa3090f344186df9cac0462d Author: Chris Wilson Date: Sat Dec 10 23:45:56 2011 +0000 sna/gen5: Remove a redundant format check Signed-off-by: Chris Wilson commit c5584252c34b792313578cc31d56248d8990b571 Author: Chris Wilson Date: Sat Dec 10 23:34:16 2011 +0000 sna: Remember to assign a new unique id for the replaced bo Missed from the previous patch. Signed-off-by: Chris Wilson commit 9c764dc13be40fc14238a4c130f7d8b44dbdf7db Author: Chris Wilson Date: Sat Dec 10 22:38:57 2011 +0000 sna: Be more pessimistic with CPU sources Try to avoid a few more unnecessary context switches. Signed-off-by: Chris Wilson commit 358aaef6dbff0737f026046b0c9a2e21d8cfdf2a Author: Chris Wilson Date: Sat Dec 10 22:38:33 2011 +0000 sna/dri: Prefer using the BLT for DRICopyRegion on pre-SNB Signed-off-by: Chris Wilson commit c295ad8da91e39c8fffa540901097651df5d24b2 Author: Chris Wilson Date: Sat Dec 10 22:37:31 2011 +0000 sna: Transfer the whole bo for a replacement XCopyArea If we are copying over the entire source onto the destination,just copy across the GPU bo. This is often used for caching images as pixmaps. Signed-off-by: Chris Wilson commit ece7fc8afeb8eefcf0ad1a054f02e7fac8db6327 Author: Chris Wilson Date: Sat Dec 10 21:04:08 2011 +0000 sna: Only use the 64-byte pitch alignment for scanout Signed-off-by: Chris Wilson commit b3816cf3a99d23d0c3ab4cd716b24ea544a07283 Author: Chris Wilson Date: Sat Dec 10 20:32:56 2011 +0000 sna: Remove assertions that external bo are not busy We have to be careful to assume bo via exposed are under our full control, in particular not to assert their state. :( Signed-off-by: Chris Wilson commit b5a6bc9e33a2797c926969e1f98b4a9a796248c5 Author: Chris Wilson Date: Sat Dec 10 13:14:45 2011 +0000 sna/gen[23]: Fixup render targets with pitches below hw minimum gen2/3 have a restriction that the 3D pipeline cannot render to a pixmap with a pitch less than 8/16 respectively. Rather than mandating all pixmaps to be created with a stride greater than 16, fixup the bo for the rare occasions when it is necessary. Reported-by: Paul Neumann Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43688 Signed-off-by: Chris Wilson commit c0dab7b1cf17fe751c86ad2b3fabce682eb50366 Author: Chris Wilson Date: Sat Dec 10 12:46:46 2011 +0000 sna/trapezoids: Try to render traps onto a8 destinations in place Signed-off-by: Chris Wilson commit c73b14cabb059075af0f1727847074a89941c9df Author: Chris Wilson Date: Sat Dec 10 11:41:18 2011 +0000 sna/trapezoids: First try the scan converter for fallbacks Signed-off-by: Chris Wilson commit 22d9bc0bc1ccd869ebcc93f9a57efc8a85840cb8 Author: Chris Wilson Date: Fri Dec 9 23:48:11 2011 +0000 sna: Use a single definition for the inactive cache timeout And share it between the timer and the expiration function, just to simplify the code. Signed-off-by: Chris Wilson commit eb3e04d960cd749adf696ba15c501a17cd1a184e Author: Chris Wilson Date: Fri Dec 9 23:36:56 2011 +0000 sna: Fallback to ordinary monotonic clock if coarse is not supported Signed-off-by: Chris Wilson commit 1c202cc0746541b541d0af22eab5c9798d229a69 Author: Chris Wilson Date: Fri Dec 9 17:25:19 2011 +0000 sna: s/MONOTONICE/MONOTONIC/ A late addition to be flexible for compiling on different systems heralded its doom. Signed-off-by: Chris Wilson commit c51626ccb660c777da8d84bb425de0d590864448 Author: Chris Wilson Date: Fri Dec 9 15:45:29 2011 +0000 sna: Use the coarse monotonic clock to coalesce wakeup events For the long interval events (such as expiring the caches), we do not need precise timing and so can use a coarse timer to allow the system to coalesce and reduce wakeup events. Signed-off-by: Chris Wilson commit c22197f25bc0419d9f2abfcc978df5ef439feb47 Author: Chris Wilson Date: Fri Dec 9 15:12:03 2011 +0000 sna: Discard bo for idle private pixmaps If a pixmap lies around for a couple of minutes not being used, it is unlikely to be used again in the near future. Reap the GPU buffers of any of those idle pixmaps (copying to a more compact buffer in system memory) in order to free up resources for use elsewhere. Any object that is exposed via DRI is obviously exempt from this reaping. Signed-off-by: Chris Wilson commit 429a36f7481b9bfd5ed137642d2916d69a713557 Author: Chris Wilson Date: Fri Dec 9 09:54:12 2011 +0000 uxa: Fix clip processing for uxa_fill_spans() Fixes regression from e0066e77e026b0dd0daa0c3765473c7d63aa6753 (uxa: Simplify Composite solid acceleration for spans by only clipping once) [2.15.901] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43649 Signed-off-by: Chris Wilson commit 699888a6410b0699c69a7f8a8d82dc4fde6fcc7f Author: Chris Wilson Date: Thu Dec 8 16:55:20 2011 +0000 uxa/video: Use the common bo allocations and upload In order to avoid inconsistent usage of coherency domains and to avoid completely unnecessary clflushing during video playback, use the same buffer allocation and upload functions as the rest of the driver. Reported-by: Christophe Roland Bugzilla: http://bugs.debian.org/cgi-bin/bugreport.cgi?msg=60;bug=651316 Signed-off-by: Chris Wilson commit 706d3a97bd3049e60c08d121a3d4d81c03029a87 Author: Chris Wilson Date: Thu Dec 8 18:05:14 2011 +0000 sna/trapezoids: Fix detection of rectilinearity after projection A typo confused left and right, rejecting true vertical edges, and worse might have incurred false positives. Signed-off-by: Chris Wilson commit bc081420a5d6d28c4e6fd5527a70caaa3a8361c4 Author: Simon Que Date: Wed Dec 7 16:20:41 2011 -0800 xf86-video-intel: change order of DPMS operations The operations when setting dpms on should be in the order opposite of what's done when setting dpms off. This is because of potentially conflicting effects: ~ drmModeConnectoSetProperty() enables/disables the backlight driver. Some backlight drivers such as intel_backlight set the backlight to 0 when disabled and to max when enabled. ~ intel_output_dpms_backlight() saves the backlight value when turning DPMS off and restores it when turning DPMS on. Here's the current order of operations: xset dpms force off (backlight is nonzero) drmModeConnectoSetProperty(DPMSModeOff) kernel: disable backlight, backlight=0 intel_output_dpms_backlight(DPMSModeOff) save backlight value (0) <-- it has been set to 0 by kernel set backlight to 0 xset dpms force on drmModeConnectoSetProperty(DPMSModeOn) kernel: enable backlight, backlight=max intel_output_dpms_backlight(DPMSModeOn) set backlight to saved value (0) The correct way to do this would be to reverse the operations during xset dpms force off: intel_output_dpms_backlight(DPMSModeOff) save backlight value (nonzero) set backlight to 0 drmModeConnectoSetProperty(DPMSModeOff) kernel: enable backlight, backlight=0 This restores the saved nonzero backlight value during the force on. Signed-off-by: Simon Que Signed-off-by: Chris Wilson commit 84aaf1537cbd29e163346d03debc39f4623c69eb Author: Chris Wilson Date: Thu Dec 8 12:36:08 2011 +0000 sna/gen7: Reduce dst readbacks for unsupported sources Signed-off-by: Chris Wilson commit 440ac68ec074e82818713773f3e2cb5d363862aa Author: Chris Wilson Date: Thu Dec 8 12:35:54 2011 +0000 sna/gen6: Reduce dst readbacks for unsupported sources Signed-off-by: Chris Wilson commit bc68211d18356c4a0e011ac360665d600de9fa30 Author: Chris Wilson Date: Thu Dec 8 12:35:39 2011 +0000 sna/gen5: Reduce dst readbacks for unsupported sources Signed-off-by: Chris Wilson commit a5df7c28e458c2f2b173fe5d745f447087eb8c6f Author: Chris Wilson Date: Thu Dec 8 12:35:22 2011 +0000 sna/gen4: Reduce dst readbacks for unsupported sources Signed-off-by: Chris Wilson commit cc8cab649c0a4788803d2c62f186142ec7152b89 Author: Chris Wilson Date: Thu Dec 8 12:34:58 2011 +0000 sna/gen3: Reduce readbacks on dst for unsupported sources Signed-off-by: Chris Wilson commit e5bc0c823b8fd46b3f851c5e9a4b4de39cda9a91 Author: Chris Wilson Date: Thu Dec 8 12:34:34 2011 +0000 sna/gen2: Avoid readbacks for unsupported sources Signed-off-by: Chris Wilson commit 874c722c86b06ac0aa10e6943d3faf76fcb751be Author: Chris Wilson Date: Thu Dec 8 12:07:28 2011 +0000 sna: Beware flushing partial buffers before they are written A partial buffer is considered finished upon the next batch submission, so one needs to be careful that it is completely written to before such an event is triggered. move-to-cpu is such a trigger as demonstrated by the picture fixup routine for handling convolution filters. Reported-by: Victor Machado Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43607 Signed-off-by: Chris Wilson commit 6ccb114a7e685c69fb388ebd119393455b315c36 Author: Chris Wilson Date: Wed Dec 7 21:09:31 2011 +0000 sna: Prefer to use our pixmap upload paths Signed-off-by: Chris Wilson commit 101942d41df7efaa6103e31e738775fafdb63159 Author: Chris Wilson Date: Mon Dec 5 10:11:04 2011 +0000 uxa: Unmap the buffer after swrast Otherwise we may exhaust the per-process vma limit and cause applications to stop rendering and eventually crash the X server. Will only work in conjunction with a new libdrm (2.4.28) and commit c549a77c (intel: Unmap buffers during drm_intel_gem_bo_unmap) in particular. Reported-by: nobled@dreamwidth.org References: https://bugs.freedesktop.org/show_bug.cgi?id=43075 References: https://bugs.freedesktop.org/show_bug.cgi?id=40066 Signed-off-by: Chris Wilson commit b424b10e771b1d3d041efdd2b77f576251364744 Author: Chris Wilson Date: Sun Dec 4 13:01:10 2011 +0000 sna: use tight pitches for a8 As we never use these with a depth nor attach them to scanout, we can safely relax the multiple-of-64 byte pitch restriction. In the unlikely event that we do need A8 surfaces with depthbuffers, this is broken... Signed-off-by: Chris Wilson commit 46c7df803881fa0e733c0d0fdd37567ebdccd6ac Author: Chris Wilson Date: Sat Dec 3 18:02:00 2011 +0000 sna: Remove one redundant retire There is no need to retire immediately after a batch and no indication that it will be useful. Signed-off-by: Chris Wilson commit b99c6b13ebba9521333b8dd5982ac37b6e244b54 Author: Chris Wilson Date: Sat Dec 3 18:01:11 2011 +0000 sna: Pass the current value of the batch offset to the kernel relocator Signed-off-by: Chris Wilson commit 735219cd59e6184a6622d3d429a704ca3f58b9cd Author: Chris Wilson Date: Fri Dec 2 10:42:00 2011 +0000 uxa: Ensure that we can fallback with all of (src, mask, dst) as GTT mappings Signed-off-by: Chris Wilson commit f6c82c73b673ec3c9cce432fe38d5e0076234efd Author: Chris Wilson Date: Fri Dec 2 10:34:10 2011 +0000 uxa: Fix runtime linking of previous commit So much for relying on compiler warnings. Signed-off-by: Chris Wilson commit 85d3dc5910a2eea3a10b822e01443e11eaae9291 Author: Chris Wilson Date: Fri Dec 2 10:22:51 2011 +0000 uxa: Reset size limits based on AGP size The basis for the constraints are what we can map into the aperture for direct writing with the CPU, so use the size of the mappable region as opposed to the size of the total GTT. Signed-off-by: Chris Wilson commit e55198746102afb7427f577bd5bfc76667438da9 Author: Chris Wilson Date: Thu Dec 1 13:49:03 2011 +0000 sna: Reuse the full size of an old handle for io Signed-off-by: Chris Wilson commit c5632369cbd6473304c06e4230347abbe46513ec Author: Chris Wilson Date: Thu Dec 1 13:23:56 2011 +0000 sna: Move the preservation of the io handle into the common destroy path In order to capture and reuse all io buffers. Signed-off-by: Chris Wilson commit 95f4da647a4055545b09cae0834df0fa2127a458 Author: Chris Wilson Date: Wed Nov 30 11:59:31 2011 +0000 sna: Align pwrite to transfer whole cachelines Daniel claims that this is will be faster, or will be once he has completed rewriting pwrite! Signed-off-by: Chris Wilson commit ecd6cca617ac29cf2b1b2a4d33fca19b84fea2a9 Author: Chris Wilson Date: Tue Nov 29 19:27:46 2011 +0000 sna/gen5: Handle cpu-bo for render targets Signed-off-by: Chris Wilson commit d8f2e87473eae81e07922271b5f608fdceb4ae5e Author: Chris Wilson Date: Tue Nov 29 10:59:48 2011 +0000 sna/render: Fix check for "migrate whole pixmap" The whole pixmap means the sample covers the full width and height, not just either! Signed-off-by: Chris Wilson commit 20e57914089d6959529ad222e04853f5ffcb364f Author: Chris Wilson Date: Tue Nov 29 10:59:20 2011 +0000 sna: Fix assertion around flushing of mmap(PROT_READ) Signed-off-by: Chris Wilson commit 56155c91afb5a0dcafe4dbc22ade3b7c0c977674 Author: Chris Wilson Date: Tue Nov 29 10:27:18 2011 +0000 sna/gen6: Set the batch mode prior to checking limits and flushing If we change contexts, then we will submit the batch obsoleting the earlier resource checks. Signed-off-by: Chris Wilson commit 5b1e9e15738b9001346ab6e0166f861ce308008e Author: Chris Wilson Date: Mon Nov 28 22:01:00 2011 +0000 sna: Always reduce tiling for thin pixmaps Benchmarking on the current code base, says this is now a win. A reversal of older benchmarks, so expect further tuning. Signed-off-by: Chris Wilson commit dacb301c05dd1686e788d6ed8101887c27968389 Author: Chris Wilson Date: Mon Nov 28 18:59:10 2011 +0000 sna: Use the correct pitch when creating an untiled active buffer Signed-off-by: Chris Wilson commit 8657128fa7e758a2dde93340d6e58928d5f11255 Author: Chris Wilson Date: Mon Nov 28 18:22:01 2011 +0000 sna: Pass the pixmap to sna_replace() Signed-off-by: Chris Wilson commit 4e38d22105da2bd97db005dc505e75dcd22291d3 Author: Chris Wilson Date: Mon Nov 28 18:21:19 2011 +0000 sna: Tidy kgem_choose_tiling() Reduce the calls to compute the surface size down to one. Signed-off-by: Chris Wilson commit 04f47e52da06cc20c2a266da92ba3f8e961433cb Author: Chris Wilson Date: Sun Nov 27 17:45:05 2011 +0000 sna: Don't try to guess when the kernel believes a buffer to be flushed Signed-off-by: Chris Wilson commit d87c332653001db4413c7dd81116ee03830db491 Author: Chris Wilson Date: Sun Nov 27 10:18:11 2011 +0000 sna: Eliminate empty glyphs during format conversion Signed-off-by: Chris Wilson commit 413776c79ee7c55b3a48b1ed29af63f8cea39337 Author: Chris Wilson Date: Sun Nov 27 10:17:40 2011 +0000 sna: Use 64-bit mov (when available) for bitmap glyphs Signed-off-by: Chris Wilson commit 507f99eba2c72bc109c9267c698f3d5f9fb6f539 Author: Chris Wilson Date: Sat Nov 26 17:57:57 2011 +0000 sna/gen6+: Only use BLT if the untiled bo will cause per-pixel TLB misses i.e. only force the BLT if using the sampler is going to be incredibly slow. Signed-off-by: Chris Wilson commit f11e9f189111f53ace20381a0bd4f559ccd3605f Author: Chris Wilson Date: Sat Nov 26 17:12:03 2011 +0000 sna: Only check for all-damaged CPU bo if we may discard the GPU bo The goal of the optimisation is to discard the GPU bo early, so we can skip the extra damage reduction if there is no gpu bo. Signed-off-by: Chris Wilson commit ccee730e45d8c2490e578d0b85d9e76f3a44f76f Author: Chris Wilson Date: Sat Nov 26 16:47:04 2011 +0000 sna: Discard the gpu-bo is the entire pixmap is written to by the CPU. Signed-off-by: Chris Wilson commit df68b20a17e28c0898226f970315bc8e515e9f56 Author: Chris Wilson Date: Sat Nov 26 16:45:22 2011 +0000 sna: Disabling tiling if the bo would be smaller than a page Once again experiment with untiled smalled buffers. Signed-off-by: Chris Wilson commit d88ad2e60ac3d9f5608db1653a7af789f7f1b446 Author: Chris Wilson Date: Sun Nov 27 09:01:09 2011 +0000 sna: Round up stride to alignment for TLB miss checking We want to avoid the condition of reducing the tiling mode (when reusing an active untiled buffer in preference to creating a new) for a wide buffer when doing will force a TLB miss on each sample. Signed-off-by: Chris Wilson commit 16f5e224dcfd97012b38ee1af6c72dbe3c0f3304 Author: Chris Wilson Date: Fri Nov 25 16:21:41 2011 +0000 sna: Avoid the double application of drawable offsets for tiled spans As we handle tiled spans indirectly, we need to avoid applying the drawable offsets twice (once in the mi layer generating the spans, and then once more in the tiled rect renderer). Reported-by: Ulrich Müller Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43245 Signed-off-by: Chris Wilson commit e06789871b5cdf0c5535d46622b8ec3f85eb4386 Author: Chris Wilson Date: Fri Nov 25 15:24:29 2011 +0000 sna/gen5+: Prefer using the BLT when either src or dst is untiled The cost of the TLB miss on every sample far outweighs the impact of the context (and ring) switch. Signed-off-by: Chris Wilson commit d0cce0da71fae275a0f1be33b2bebad9d41212c9 Author: Chris Wilson Date: Fri Nov 25 13:16:37 2011 +0000 sna/gen5: Use the same prefer_blt_fill() switch for fill-one Signed-off-by: Chris Wilson commit 7ad2d3b695115439f685a12d43ab240cf5e18ef7 Author: Chris Wilson Date: Fri Nov 25 09:44:21 2011 +0000 sna/gen2: Wire up NO_COMPOSITE for debugging Signed-off-by: Chris Wilson commit 394ad51c421f41e4bc6545fcee10b1757cb5f518 Author: Chris Wilson Date: Thu Nov 24 17:35:36 2011 +0000 sna/video: Check for Xv presence in the server before initialising Signed-off-by: Chris Wilson commit a2fab9560ec5dd6efc352917fe7626e59bed69e3 Author: Chris Wilson Date: Thu Nov 24 17:14:08 2011 +0000 sna: Downgrade Y-tiling if we must use the BLT There are many operations, usually the core drawing acceleration, where the BLT is much more preferable than using the CPU. However, the BLT is limited to only using X-tiling, so if we encounter a Y-tiled pixmap target we need to recreate it as X-tiling before proceeding. Hopefully, the pixmap is then kept around and rendered multiple times to amoritize the cost of the copy. Signed-off-by: Chris Wilson commit e0a4492c8b51d6ae09cde0b895da6177284e95e0 Author: Chris Wilson Date: Thu Nov 24 17:00:18 2011 +0000 sna: Use Y-tiling for source pixmaps Y-tiling is slightly faster with RENDER operations, so attempt to allocate source-only pixmaps using this tiling mode. Actually using Y-tiling is a delicate balance because it then prevents the use of the BLT. For instance, enabling Y-tiling by default gives a 30% performance improvement on the fish-demo (compositing benchmark) at 2560x1440 on Ironlake but regresses tiger-demo by 2x (spans benchmark). So experiment with this compromise and allow for changing the default tiling. Signed-off-by: Chris Wilson commit 7e4a1b7ed25a881113e197acde62b07f26f2d6ef Author: Chris Wilson Date: Thu Nov 24 11:34:51 2011 +0000 src/sna/gen5: Replace the precompiled shaders Take advantage of a couple of new instructions introduced with Cantiga to reduce the instruction count inside the shaders and improve performance by around 10% in the fish-demo. Signed-off-by: Chris Wilson commit 67ea8808d7f0ce47733a66d8708dcfa0dbec14c1 Author: Chris Wilson Date: Thu Nov 24 11:45:38 2011 +0000 sna/gen5: Remove the unused SIP Signed-off-by: Chris Wilson commit 499ed74e979d99bbe1670ad54875fba6055fce5d Author: Chris Wilson Date: Thu Nov 24 11:02:01 2011 +0000 sna: Tweak cancellation of deferred flush The goal is to keep running until the tick after every stops, irrespective of forced flushes. Signed-off-by: Chris Wilson commit 35239d207c38e1ae0cb843ed7a72621711cb001e Author: Chris Wilson Date: Thu Nov 24 02:51:51 2011 +0000 sna: Always call retire following a mmap Signed-off-by: Chris Wilson commit 11e0b456de93dae9f7ba4298d8a32b6b60edc503 Author: Chris Wilson Date: Thu Nov 24 03:04:09 2011 +0000 sna/gen5: Use the BLT rather than flush when copying Signed-off-by: Chris Wilson commit a44663af9335136cba59b12078c6717992283b62 Author: Chris Wilson Date: Thu Nov 24 02:54:43 2011 +0000 sna/gen4,gen5: Fix typo and only emit a flush if the video source is dirty Signed-off-by: Chris Wilson commit 4a27dd287cdb85d80ceaf6b54e7de0c17e01c00d Author: Chris Wilson Date: Mon Nov 21 12:56:32 2011 +0000 uxa: Make the glamor/uxa transition more verbose And so hopefully make it clearer. In the process we restore the flushing behaviour for UXA back to before the glamor intervention. Signed-off-by: Chris Wilson commit b0d64a9567d9cb749568448e4ce090b187308028 Author: Chris Wilson Date: Mon Nov 21 11:49:49 2011 +0000 sna: Correct end-point adjustment for stippling PolySegment Reported-by: Roman Jarosz Reported-by: da_fox@mad.scientist.com Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43134 Signed-off-by: Chris Wilson commit a5353a7c1d1f02b887f61f543c8e4bd4e8bd104f Author: Chris Wilson Date: Mon Nov 21 10:58:17 2011 +0000 sna/gen4: Use the special composite rect emission for fill_one() In order to workaround a bug in the shaders on gen4, we need to flush the pipeline after every rectangle. The recently introduced fill-one mechanism for gen4, missed this vital step triggering a random hang with an otherwise sane batchbuffer (the missing flush is hard to spot!). Fixes regression from 86f99379ee5 (sna/gen4: Add fill-one). Reported-by: Albert Damen Reported-by: Fryderyk Dziarmagowski Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43083 Signed-off-by: Chris Wilson commit 3b9479dc39d32fd97f80c1e5e0fac67d36ee5e40 Author: Chris Wilson Date: Sat Nov 19 19:12:06 2011 +0000 sna: Micro-optimise sna_push_pixels_solid_blt() Unroll the byte reversal as we know the row length is word aligned. Signed-off-by: Chris Wilson commit 297f7680cfd73ab6eb099adca7aefe00e61c9e85 Author: Chris Wilson Date: Sat Nov 19 16:11:42 2011 +0000 sna: Avoid the NULL damage deref Fixes x11perf -wdcircle100 -time 1 -repeat 1 -rop GXxor Reported-by: Fryderyk Dziarmagowski Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43084 Signed-off-by: Chris Wilson commit 4a86ec5ddbaf119fd9a32ecd963f7238152d7d28 Author: Chris Wilson Date: Sat Nov 19 00:33:28 2011 +0000 sna/gen7: Apply recent SNB tuning as applicable Signed-off-by: Chris Wilson commit fe944d61d53c275a168da2e9515d1e42be81630b Author: Chris Wilson Date: Sat Nov 19 00:02:17 2011 +0000 sna/gen7: Correct shifts for surface state Signed-off-by: Chris Wilson commit 70042400fd95f613b9547d0a72d6288abcc2357d Author: Chris Wilson Date: Fri Nov 18 23:41:33 2011 +0000 sna/gen7: minor tidy of redundant defines Signed-off-by: Chris Wilson commit f938cd15990d1a851b9d92414545dda37f00c5db Author: Chris Wilson Date: Thu Nov 17 13:43:37 2011 +0000 glamor: Include glamor cflags and libs for atypical builds Signed-off-by: Chris Wilson commit eb6148a36a318eb0b4aad865c34b50fedf4b709e Author: Zhigang Gong Date: Wed Nov 16 15:04:37 2011 +0800 uxa/glamor: Turn on glamor for fill spans and rects This commit only enables two glamor functions for uxa_fill_spans and uxa_poly_fill_rects. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit fbabe60f48006ee664c983082498a863e8beec71 Author: Zhigang Gong Date: Wed Nov 16 15:04:36 2011 +0800 glamor: Initial commit to introduce glamor acceleration. Added one configuration option --enable-glamor to control whether use glamor. Added one new file intel_glamor.c to wrap glamor egl API for intel driver's usage. This commit doesn't really change the driver's control path. It just adds necessary files for glamor and change some configuration. Reviewed-by: Eugeni Dodonov Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit c4c2eb1fae2518578a56a278afeaec66d544439d Author: Zhigang Gong Date: Wed Nov 16 15:04:37 2011 +0800 uxa/glamor: Introduce additional access modes to wrap glamor acceleration Integrate glamor acceleration into UXA framework. Add necessary flushing at the following points: 1. Flush UXA batch buffer before call into glamor. 2. Flush GL operations after return from a glamor function. 3. The point we need to flush UXA batch buffer, we also need to flush GL operations, for example, in intel_flush_callback and couple of places in intel_display.c. Signed-off-by: Zhigang Gong Signed-off-by: Chris Wilson commit ac7df2919b92c9fe47c6745975e1848932f989e8 Author: Chris Wilson Date: Wed Nov 16 23:25:16 2011 +0000 Revert "Disable adding normal RTF modes for an eDP" This reverts commit 212fa9868767637e8f430485eeb522c99e63fd16. The underlying register programming for eDP is now believed to be fixed as of linux-3.1. References: https://bugs.freedesktop.org/show_bug.cgi?id=38012 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41070 Signed-off-by: Chris Wilson commit 24ece4a87e34c27115ffb55f91294bce2bdf1502 Author: Chris Wilson Date: Wed Nov 16 23:14:25 2011 +0000 configure: Version bump for 2.17.0 release Signed-off-by: Chris Wilson commit 14b3176962bd535933623d8ed77ba286b077d6f0 Author: Chris Wilson Date: Wed Nov 16 23:13:44 2011 +0000 NEWS: Release notes for 2.17.0 Signed-off-by: Chris Wilson commit c259144e3fc52d078b0a78107c38f0f3d3a2bbc1 Author: Chris Wilson Date: Wed Nov 16 10:28:23 2011 +0000 sna: The block handler is passed an indirect pointer to the timeval Signed-off-by: Chris Wilson commit bfd2bb40274d1242001d295a4010211fd51b0fc3 Author: Chris Wilson Date: Tue Nov 15 10:38:09 2011 +0000 sna: Correct dependencies for DRI2 Signed-off-by: Chris Wilson commit 3771387ad11b5842a83e58a4b373c2acdd827bd2 Author: Chris Wilson Date: Tue Nov 15 10:32:34 2011 +0000 Compile out UXA if so desired Signed-off-by: Chris Wilson commit edbeab8c4edf9e0e89d85add485fe659795b6350 Author: Chris Wilson Date: Tue Nov 15 10:17:06 2011 +0000 sna: Reduce and clarify dependencies Signed-off-by: Chris Wilson commit 78d4e99fc916e6477edb01c6f24b69ad73adc552 Author: Chris Wilson Date: Tue Nov 15 11:06:04 2011 +0000 sna: And keep unity happy Rewrite the DRI layer to avoid the various bugs and shortcomings of the Xserver and interfacing with mesa. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38732 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=39044 Signed-off-by: Chris Wilson commit aac022cbb3342e7027301a3f8c9add8929edbad6 Author: Chris Wilson Date: Mon Nov 14 19:49:29 2011 +0000 sna: Optimise single pixel transfers Surprisingly frequent. Signed-off-by: Chris Wilson commit 5647e2981d81fd2b5cdb22d544f83d2d0f9445c9 Author: Chris Wilson Date: Mon Nov 14 14:11:56 2011 +0000 sna/damage: Always reduce damage for testing PIXMAN_REGION_OUT Reported-by: Clemens Eisserer References: https://bugs.freedesktop.org/show_bug.cgi?id=42414 Signed-off-by: Chris Wilson commit 405b015fe255c75f91b0f3fe93f06bd14faee5a1 Author: Chris Wilson Date: Mon Nov 14 14:05:10 2011 +0000 sna: Be explicit in all sna_damage_contains_box() tests Clarify the exact in/out/maybe expected result when testing. Signed-off-by: Chris Wilson commit 5d23149647b1645057dbd89087691e873494f763 Author: Chris Wilson Date: Mon Nov 14 13:53:37 2011 +0000 sna: Remove redundant 'can_fill_spans()' Spans are almost always accelerated now... Signed-off-by: Chris Wilson commit ae9de984adb275e028e7fbcb8b74a3ce11920eed Author: Chris Wilson Date: Mon Nov 14 13:39:34 2011 +0000 sna: Convert non-FillSolid rectilinear lines to boxes And render using the tiled/stippled rect routines instead. Signed-off-by: Chris Wilson commit e861e816f53989ce3ab3ec89dd1d9a35155f999a Author: Chris Wilson Date: Mon Nov 14 13:39:34 2011 +0000 sna: Convert non-FillSolid rectilinear segments to boxes And render using the tiled/stippled rect routines instead. Signed-off-by: Chris Wilson commit 6fc2928f578ae1e278c968d5c778d99d56bd667a Author: Chris Wilson Date: Mon Nov 14 13:05:00 2011 +0000 sna: tidy assignment of composite damage Make sure that the damage is always set, even if only to NULL, so that we are safe if in future the operation state is not initially cleared. Signed-off-by: Chris Wilson commit 99338ebe61917a07611cbc81cfaf70c0ec905014 Author: Chris Wilson Date: Mon Nov 14 12:04:49 2011 +0000 sna: Check whether damage can be reduced to all-damage on moving to GPU Signed-off-by: Chris Wilson commit 00d1c539e4b69636bfc35c0c47a6f1db3a33e731 Author: Chris Wilson Date: Mon Nov 14 11:19:42 2011 +0000 sna/damage: Add a little more verbosity to debugging Signed-off-by: Chris Wilson commit 60c0fc101adbc457a7c1927602175f8079175e10 Author: Chris Wilson Date: Mon Nov 14 11:12:47 2011 +0000 sna: Refactor some common code into the common destroy-gpu-bo function Signed-off-by: Chris Wilson commit 571457e9a4b0941ec956ef98391e96fe90fb4abc Author: Chris Wilson Date: Mon Nov 14 10:31:21 2011 +0000 sna: Be more thorough discarding fences for large objects Signed-off-by: Chris Wilson commit e33dfbe3c00e634328adc7319261e5501f4c7a7a Author: Chris Wilson Date: Mon Nov 14 09:41:53 2011 +0000 sna/damage: Verify that all-damage covers the entire pixmap after reduction Signed-off-by: Chris Wilson commit f033172d2f383c7e17362a10f56c4958fb9a3a6b Author: Chris Wilson Date: Mon Nov 14 09:32:53 2011 +0000 sna: Fix debug compilation Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42887 Signed-off-by: Chris Wilson commit 0c405595fb8739b22569f81f400100b5dfa472cf Author: Chris Wilson Date: Mon Nov 14 09:27:49 2011 +0000 sna: Downgrade tiling in order to fit within fence constraints Fixes a later assert that the fenced size is valid for kgem_create_2d() Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42888 Signed-off-by: Chris Wilson commit 1baff9f8cf79fdb4a5649eabcc66cf73487c873e Author: Chris Wilson Date: Mon Nov 14 08:44:35 2011 +0000 uxa/gen4+: Re-emit composite invariant after video Reported-by: Ben Hutchings Bugzilla: http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=635953 Signed-off-by: Chris Wilson commit 7ad3b377a394c9342c3ab2f003d48b7cb3c0891d Author: Chris Wilson Date: Sun Nov 13 17:53:11 2011 +0000 sna/video: Use the right pointer for unmapping Don't just deference any old random pointer, use the one we actually mapped in the first place! Reported-by: Matti Hamalainen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42880 Signed-off-by: Chris Wilson commit 8da8809d03734d92c3bcf478fe051077ce3caa29 Author: Chris Wilson Date: Sun Nov 13 17:49:23 2011 +0000 sna/video: Simplify check for 915G[M] which is simply gen==30 Signed-off-by: Chris Wilson commit cac335b979a95e31e201f9766d19d737361e09b2 Author: Chris Wilson Date: Sun Nov 13 13:13:03 2011 +0000 sna/video: Constify a couple of attribute arrays Signed-off-by: Chris Wilson commit e592eb93dbd7df177993986f01ba6f65c4e20d4a Author: Chris Wilson Date: Sun Nov 13 11:16:45 2011 +0000 configure: Version bump for 2.16.902 snapshot Signed-off-by: Chris Wilson commit 56707b97dc746f7b46dd6cf94ba6c1db85ed619c Author: Chris Wilson Date: Sun Nov 13 11:16:12 2011 +0000 NEWS: Details for 2.16.902 Signed-off-by: Chris Wilson commit f0acc6c0f15875fd51f6df6c8f13d589f9149771 Author: Chris Wilson Date: Sun Nov 13 09:39:47 2011 +0000 sna/composite: Attempt to reduce the damage is the operation is contained Signed-off-by: Chris Wilson commit 87147b63e905c3566ac1c12e0712f068e90d5e2e Author: Chris Wilson Date: Sat Nov 12 19:35:43 2011 +0000 sna/damage: Reduce the damage for evaluating sna_damage_is_all Signed-off-by: Chris Wilson commit e8799cdea461df5102d421fda26fecceae79b929 Author: Chris Wilson Date: Sat Nov 12 12:19:31 2011 +0000 sna: Be stricter and disallow allocation of large fenced objects When allocating objects, we need to check the size of the full fenced regions against the mappable limits in order to be able to mmap the object later. References: https://bugs.freedesktop.org/show_bug.cgi?id=42813 Signed-off-by: Chris Wilson commit 0269ec5533ecf7bec0f01c682e085861a3d2ab00 Author: Chris Wilson Date: Sat Nov 12 11:49:32 2011 +0000 sna: Handle incremental uploads from PutImage PutImage rarely uploads the entire image inside a single request, instead breaking up into scanline segments to fit within the protocol limits. A few optimisations are based on detecting when we can discard the GPU bo for an all-dirty CPU pixmap, which are useful in this case so check for an entirely dirty pixmap following an incremental PutImage. Signed-off-by: Chris Wilson commit ed68f1b00ae7c0fb3be1f0e758b3683f3c26675b Author: Chris Wilson Date: Sat Nov 12 11:13:59 2011 +0000 sna/gen7: Fix PRIMITIVE command The topology is now an extra dword rather than an embedded field in the command. Signed-off-by: Chris Wilson commit 991ffcb60a15f08ebb396d4d4ec86d5aff0ded31 Author: Chris Wilson Date: Fri Nov 11 23:20:36 2011 +0000 sna: Reset the source counter if we completely dirty the CPU pixmap For a long lived pixmap which we are repeatedly using for upload and copying to other pixmaps, we don't want to keep to maintain a GPU buffer. So instead, reset the source counter if we discard the GPU bo and treat the pixmap as purely CPU. Signed-off-by: Chris Wilson commit 403a4dd353eef67decfba965e40623e8137e1944 Author: Chris Wilson Date: Fri Nov 11 14:59:03 2011 +0000 sna: Defer source migration for a solitary upload via CopyArea Try to avoid allocating a GPU pixmap for PutImage followed by CopyArea. Signed-off-by: Chris Wilson commit 11acfaa62362660ff303f3afe90d1afa36b9ce73 Author: Chris Wilson Date: Fri Nov 11 14:46:33 2011 +0000 sna/glyph: Tweak the small mask threshold Signed-off-by: Chris Wilson commit c6e6ae1829e06ee8fe8eb063f2433cce603c9f96 Author: Chris Wilson Date: Fri Nov 11 14:22:38 2011 +0000 sna/glyphs: Cache the glyph pixman_image_t wrapper Signed-off-by: Chris Wilson commit 8f50950f467eb2440009a807081f3ba2c9db209b Author: Chris Wilson Date: Thu Nov 10 15:58:36 2011 +0000 sna/gen7: Remove stray no-op from GEN7_3DSTATE_SBE Signed-off-by: Chris Wilson commit 6a8338fc08a1b7e5e2c6722baa87cff3915b6ef9 Author: Chris Wilson Date: Thu Nov 10 15:11:13 2011 +0000 sna: Begin debugging gen7 This is the stub of the decoder, sufficient to give details of the ops within the batch and to keep the debugger happy. Signed-off-by: Chris Wilson commit 2309f19638f8b2c35eb60fb44fa988aa5aaab57f Author: Chris Wilson Date: Thu Nov 10 11:57:21 2011 +0000 sna/dri: Apply the damage for fullscreen async blits Otherwise gnome-shell forgets to update. Eventually, I'll get the async pageflipping bits merged into the Xserver and this path and its extra bw wastage will be history! But still I'll be undermined by the compositor, grrr. Signed-off-by: Chris Wilson commit e65c2c54f5efcec16e97085dbc41042007c39151 Author: Chris Wilson Date: Thu Nov 10 11:37:46 2011 +0000 sna: Store the sna pointer on the pixmap for cheap lookups A large part of the function preamble overhead is the multi-indirection lookup for retrieving the sna pointer. We can eliminate most of these by storing a pointer on the Pixmap as well, which we often need to lookup anyway. Signed-off-by: Chris Wilson commit bddac63de2d26c6ad4ade2f0a038d756f7a41424 Author: Chris Wilson Date: Thu Nov 10 10:55:13 2011 +0000 sna: Defer purging a target buffer This is to keep the sanity checks upon the caches happy by keeping a potential flush out of the inactive cache. Signed-off-by: Chris Wilson commit 9083f7edcb05b1deb7a77c9c5a8b54fe73176648 Author: Chris Wilson Date: Thu Nov 10 10:51:32 2011 +0000 sna/gen3: Fixup some false asserts Signed-off-by: Chris Wilson commit ea01f7681901e3181204d3117fc0a23655de631f Author: Chris Wilson Date: Thu Nov 10 10:51:01 2011 +0000 configure: Force full-debug builds to disable compiler optimisations commit a72563464f53f24246379afcf1365206fae9aad3 Author: Chris Wilson Date: Thu Nov 10 00:55:55 2011 +0000 sna/gen3: Clear the video shader flag upon batch reset Fixes regression from 3252b46e1. Signed-off-by: Chris Wilson commit 3252b46e115e6cc46abbcc4f502feeb9edc31ad6 Author: Chris Wilson Date: Wed Nov 9 15:16:04 2011 +0000 sna/gen3: Pack video frames If you're going to benchmark, you may as well do so favourably. Signed-off-by: Chris Wilson commit 8e926759528a12076bd7565672acd82a37aa3eb1 Author: Chris Wilson Date: Wed Nov 9 14:44:54 2011 +0000 sna/video: Pass texture video limits to the client Signed-off-by: Chris Wilson commit bca58ff6f02b20ccf88937df8e2688f18cabac80 Author: Chris Wilson Date: Wed Nov 9 14:18:57 2011 +0000 sna: Clear kgem->busy when all requests have been processed Signed-off-by: Chris Wilson commit 8fdbd01c94c0f6f56247feed8f225901ba39e18e Author: Chris Wilson Date: Wed Nov 9 13:14:04 2011 +0000 sna/video: Use the normal bo cache for texture video streams Signed-off-by: Chris Wilson commit 436a78684507129ca1245e065ff68870eb27624b Author: Chris Wilson Date: Wed Nov 9 12:48:27 2011 +0000 sna: Track purgeability separately from reusability Signed-off-by: Chris Wilson commit 2699c01a396b644a35a9acb969ab556454be3517 Author: Chris Wilson Date: Wed Nov 9 12:27:52 2011 +0000 sna: Handle non-reusable bo more correctly during retire Signed-off-by: Chris Wilson commit fcc89d26600a57317007035fa720915e8a2ade81 Author: Chris Wilson Date: Wed Nov 9 12:25:43 2011 +0000 sna: Safety first; make all flinked bo unreusable Signed-off-by: Chris Wilson commit f62b9f94f64f402e731463205635d386386e274e Author: Chris Wilson Date: Wed Nov 9 10:15:11 2011 +0000 sna/video: Pass cropped source dimensions along with frame data So pack all the relevant details into the same structure. Signed-off-by: Chris Wilson commit 5809b1ad934d6e19dbcf00f1b59e156761ec16b6 Author: Chris Wilson Date: Wed Nov 9 09:41:53 2011 +0000 sna/video: Tidy up copy routines Signed-off-by: Chris Wilson commit 1cd06100185a37ee33209fb18362da89f9646e6b Author: Chris Wilson Date: Tue Nov 8 17:37:44 2011 +0000 sna: Protect against NULL deference of damage after reduction Signed-off-by: Chris Wilson commit 4b100b099a4d5877c79989e8b3b4ffcd3aa2306f Author: Chris Wilson Date: Tue Nov 8 16:30:22 2011 +0000 sna: Convert stippled spans to rects Signed-off-by: Chris Wilson commit 7b95f87b26675af3a1923fef824c45e087098d61 Author: Chris Wilson Date: Tue Nov 8 16:18:58 2011 +0000 sna: Use the blitter for overlapping lines if the alu doesn't read dst Signed-off-by: Chris Wilson commit 9a8d3a9dfff8be65b4ab28312ec49dbca36019e0 Author: Chris Wilson Date: Tue Nov 8 13:51:00 2011 +0000 sna: Avoid the penalty of only writing partial channels with glyphs Yes, writing 3 channels is slower than writing 4. But it's okay we simply ignore the alpha value anyway. Signed-off-by: Chris Wilson commit 576c5169efd068c364fb7d266fbb6b1dd2ad3f4d Author: Chris Wilson Date: Tue Nov 8 13:27:05 2011 +0000 sna: Tidy sna_copy_bitmap_blt Signed-off-by: Chris Wilson commit 32bbeefb8563ae2ab3a105d0b1c9b55d9587b788 Author: Chris Wilson Date: Tue Nov 8 13:17:20 2011 +0000 sna: Pack clipped stippled uploads This are even more likely to fit inside the immediate payload. Signed-off-by: Chris Wilson commit 3620cd2d157f3d81ccb76bce2ab813bd1e058878 Author: Chris Wilson Date: Tue Nov 8 11:25:14 2011 +0000 sna: Begin hooking up valgrind/memcheck Signed-off-by: Chris Wilson commit aeaadb16093f83c9b830958c5946d4d048ffd26b Author: Chris Wilson Date: Tue Nov 8 11:03:19 2011 +0000 sna: Handle creation of large Screen pixmap when the GPU is wedged Reported-by: Clemens Eisserer References: https://bugs.freedesktop.org/show_bug.cgi?id=42606 Signed-off-by: Chris Wilson commit 7577d6ea45794b83d2f84b175d453d8a460b0e9b Author: Chris Wilson Date: Tue Nov 8 10:24:34 2011 +0000 sna: Add some error messages to explain why we failed to create the screen Signed-off-by: Chris Wilson commit 33256af40b3ce2cf8a899ced1fcbf40e316772e4 Author: Chris Wilson Date: Tue Nov 8 09:55:07 2011 +0000 sna: Fixes for DBG_NO_HW (i.e. simulated GPU hanges); A couple of the recent GPU paths were failing to check for !wedged. Signed-off-by: Chris Wilson commit 5f0886dae29429f498fb10a12d5dc8de6bd798fc Author: Chris Wilson Date: Tue Nov 8 00:02:18 2011 +0000 sna/trapezoids: Use ints for the offsets to accommodate multiplication Although the original precison need only 16-bits to store the offsets, after projecting on to the sample grid we need a few more bits of precision and so need a larger integer type to avoid overflow and render glitches. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42680 Signed-off-by: Chris Wilson commit 33351d5c3dd912534c54e64ccfc7adc4c6f6ecae Author: Chris Wilson Date: Mon Nov 7 22:57:44 2011 +0000 sna/glyphs: Bypass masks for single glyphs Signed-off-by: Chris Wilson commit e4872225ace7e3b129292f5822aa75b84c52beff Author: Chris Wilson Date: Mon Nov 7 22:57:05 2011 +0000 sna/io: Minor tidy of setting command flags Signed-off-by: Chris Wilson commit 5ba8ba7421e36bcdf83e84423595326939dbe7cd Author: Chris Wilson Date: Mon Nov 7 22:55:10 2011 +0000 sna: Avoid overwriting an upload buffer during readback Reported-by: Clemens Eisserer Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42677 Signed-off-by: Chris Wilson commit 8f7a8a80237db77452f02273bd8ade68dfba575f Author: Chris Wilson Date: Mon Nov 7 20:08:25 2011 +0000 sna/composite: Minor fixes in operator and colour reduction Signed-off-by: Chris Wilson commit b1234f3d3a27f326b8048e3d6b476021a26e9101 Author: Chris Wilson Date: Mon Nov 7 20:07:37 2011 +0000 sna: Expand multiplies of two 16-bit values to a full 32-bit range Signed-off-by: Chris Wilson commit afdf931e61821985b31b339d1f346ddd7c4e9e3c Author: Chris Wilson Date: Mon Nov 7 20:06:35 2011 +0000 sna: Add some more debugging in the hunt for overflows Signed-off-by: Chris Wilson commit 8f3c845782fdb2fa8bdf751bdd7dd83ca02c42ac Author: Chris Wilson Date: Mon Nov 7 20:05:41 2011 +0000 sna/blt: Small cleanups Whilst perusing for overflows, remove some redundant conditionals. Signed-off-by: Chris Wilson commit 8e775cecccebe543d344721d45b2d43ee9f122b3 Author: Chris Wilson Date: Mon Nov 7 20:01:33 2011 +0000 sna/gen3: Fix false reduction of ComponentAlpha with white source The principle behind the opertator reduction of WHITE * maskca is valid, except that we failed to account for the src/mask transposition when emitting the vertices - garbage ensued. Given that we agressively reduce the shader required for WHITE * maskca, it does not seem worthwhile to special case the primitive emitter as well. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42676 Signed-off-by: Chris Wilson commit 65a440543b13e3e605a4a2d6209a460fbbe55736 Author: Chris Wilson Date: Mon Nov 7 20:00:20 2011 +0000 sna: Fix 16-bit overflow of rowlength for memcpy Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42619 Signed-off-by: Chris Wilson commit d4edbd480445bc6aadd2c9f17262bd4b3eefbca6 Author: Chris Wilson Date: Mon Nov 7 11:16:06 2011 +0000 sna/glyph: Fallback if we fail to clear the scratch pixmap for the glyph mask Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42663 Reported-by: Clemens Eisserer Signed-off-by: Chris Wilson commit 05f3e96a69af7750d2d62cf5ba991b89f39bc88a Author: Chris Wilson Date: Mon Nov 7 09:28:19 2011 +0000 test: Compile fix for make check Reported-by: Jeremy Huddleston Signed-off-by: Chris Wilson commit cd3d86037746f3a03c4004c1e3ba6e8281344745 Author: Chris Wilson Date: Sun Nov 6 11:13:27 2011 +0000 sna: Beware unsigned promotion of int16_t to uint32_t Mmakes for an unhappy mempy! Signed-off-by: Chris Wilson commit 0b9408d972050cb02c1024926c406cd45508a158 Author: Chris Wilson Date: Sun Nov 6 09:55:09 2011 +0000 sna: Self-intersection of wide PolyLine are only drawn once We need to process the union of the PolyLine command if lineWidth!=0 so we cannot generally feed lineWidth==1 into our special case handler. Proving the lines do not intersect is as difficult as finding the intersections and thereby finding the union of the path - so there is no advantage in adding a check whether a wide line could be special cased. Signed-off-by: Chris Wilson commit c76714c29d29687f941a9112e80223c817185d53 Author: Chris Wilson Date: Sun Nov 6 09:43:47 2011 +0000 test: Add a basic line tester Starting with exercising drawing of a single segment. Signed-off-by: Chris Wilson commit c1e1e20fe7875262530a4d522e970985642c3f13 Author: Chris Wilson Date: Sat Nov 5 20:59:17 2011 +0000 sna: Add the pixman version to the debug output Signed-off-by: Chris Wilson commit e2165f0e6b0620e3d788546924a2174506fbbde5 Author: Chris Wilson Date: Sat Nov 5 19:46:13 2011 +0000 sna: For a 32k max window size, we need to handle up to 128k strides Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42619 Signed-off-by: Chris Wilson commit c5d94b21d5c65dcae3e294412a8f20bad347a6d8 Author: Chris Wilson Date: Sat Nov 5 14:32:16 2011 +0000 sna: Extend the zero-line segments by one Fixes misrendering of the wine tabs Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42606 Signed-off-by: Chris Wilson commit 0cf29afda9b061455bc438a22bbbfb1d6db6528e Author: Chris Wilson Date: Sat Nov 5 12:36:53 2011 +0000 sna/glyphs: Fix clip detection for small masks -ENOCOFFEE. Signed-off-by: Chris Wilson commit d21c30d0b8b08ec85c3b5d9a02a6969f7c8b9315 Author: Chris Wilson Date: Sat Nov 5 11:56:17 2011 +0000 sna: Constrain GPU pixmaps to always fit within the blitter Otherwise we end up always doing expensive readbacks where we would obviously prefer it if we simply used cached memory for the CPU operation and then upload. Signed-off-by: Chris Wilson commit e309cea3ae5c22c58a918008a52e3d8d694c9ff2 Author: Chris Wilson Date: Sat Nov 5 11:28:06 2011 +0000 sna: Do the supported PictOp check first There is no point even attempting a BLT operation if we know that it is an unusual render operation. Signed-off-by: Chris Wilson commit ab3d6d878fa27515eb760107d963d522cc87cd77 Author: Chris Wilson Date: Sat Nov 5 10:08:02 2011 +0000 sna: Render small glyph masks on the CPU Signed-off-by: Chris Wilson commit c25cf434d81ac1b4da29c9c75ca1d7c28be71d04 Author: Chris Wilson Date: Sat Nov 5 01:04:54 2011 +0000 sna/gen3: Initiailse the op for fill_boxes() After removing the memset(0), a couple of fields where left uninitialised, causing potential rendering glitches. Signed-off-by: Chris Wilson commit 96e760ea7589cbe953bd0a6f2f41980a7f1c4795 Author: Chris Wilson Date: Sat Nov 5 01:04:24 2011 +0000 sna: s/flush/vblank/ fixes for DBG() Signed-off-by: Chris Wilson commit 676cb4e38dc381b2ef4fb092b66db80687aa5013 Author: Chris Wilson Date: Fri Nov 4 23:30:09 2011 +0000 sna: Run the deferred flush at vrefresh This helps to reduce the perceived jerkiness of the redraw. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42413 Signed-off-by: Chris Wilson commit 8052c3904a1ac0308846ac13534c4c76bb96d5dd Author: Chris Wilson Date: Fri Nov 4 21:14:23 2011 +0000 sna: Drain the delayed timer after forcing a flush The goal is to remove a spurious wakeup when we have no work outstanding afterwards and so would end up prematurely disabling the timer. Signed-off-by: Chris Wilson commit 112c61f6557c2337d5f1b25eb71d0dc9ada6ec89 Author: Chris Wilson Date: Fri Nov 4 21:13:55 2011 +0000 sna: Convert GXcopy with -1 to GXset Signed-off-by: Chris Wilson commit 573b23c6b618af808d3236395bbf4f4993b406e5 Author: Chris Wilson Date: Fri Nov 4 15:57:24 2011 +0000 sna: Add some asserts to detect buffer overflow. Signed-off-by: Chris Wilson commit 4ba55c3d110ba51400a72da7d4f4c62efcea1335 Author: Chris Wilson Date: Fri Nov 4 15:55:15 2011 +0000 sna/gen5: Prefer using the BLT for many solid fills Even if it means incurring a context switch, the BLT unit is significantly faster so long as we do enough fills. And there is the catch ;-) Signed-off-by: Chris Wilson commit 703cf8abdbcda783e2bb0ceb423909ee8ca98176 Author: Chris Wilson Date: Fri Nov 4 15:24:57 2011 +0000 sna: Add earlier guards against to wedged to sna_glyph_blt Signed-off-by: Chris Wilson commit fc415ec3d3e982d89d7a25db8d5fd18e0412a99b Author: Chris Wilson Date: Fri Nov 4 13:53:17 2011 +0000 sna/gen5: Also experiment with lazy spans here Signed-off-by: Chris Wilson commit 567cfa508f788b4dd5de9aafbe2f148bb6a8dbc6 Author: Chris Wilson Date: Fri Nov 4 13:43:03 2011 +0000 sna/gen6: Enable spans interface for boxes Signed-off-by: Chris Wilson commit 465515a1446fd05fdc4691522803c94515187b4c Author: Chris Wilson Date: Fri Nov 4 13:40:13 2011 +0000 sna: Silly compile fix, escaped when testing uxa Signed-off-by: Chris Wilson commit a26c5d44ccaa7e9ff931948032b073f0a550343a Author: Chris Wilson Date: Fri Nov 4 12:36:40 2011 +0000 uxa: Ensure that alphaMaps are mapped into the CPU for fallbacks Reported-by: Hans-Peter Budek Signed-off-by: Chris Wilson commit 34758895cdd93bd7671a78464e79b3891bca113d Author: Chris Wilson Date: Fri Nov 4 11:57:09 2011 +0000 sna: Ensure operations on a ShmPixmap are synchronous with clients If we are rendering to or from a ShmPixmap, we need to be sure that the operation is complete prior to sending an XSync response to client in order to preserve mixed rendering coherency. Signed-off-by: Chris Wilson commit 5525691eb024f2a04b486652c24e0e34176fdd5e Author: Chris Wilson Date: Fri Nov 4 10:49:48 2011 +0000 sna/gen6: Poor man's spans layered on top of the exisiting composite Performance of this lazy interface looks inconclusive: Speedups ======== xlib swfdec-giant-steps 1063.56 -> 710.68: 1.50x speedup xlib firefox-asteroids 3612.55 -> 3012.58: 1.20x speedup xlib firefox-canvas-alpha 15837.62 -> 13442.98: 1.18x speedup xlib ocitysmap 1106.35 -> 970.66: 1.14x speedup xlib firefox-canvas 33140.27) -> 30616.08: 1.08x speedup xlib poppler 629.97 -> 585.95: 1.08x speedup xlib firefox-talos-gfx 2754.37 -> 2562.00: 1.08x speedup Slowdowns ========= xlib gvim 1363.16 -> 1439.64: 1.06x slowdown xlib midori-zoomed 758.48 -> 904.37: 1.19x slowdown xlib firefox-fishbowl 22068.29 -> 26547.84: 1.20x slowdown xlib firefox-planet-gnome 2995.96 -> 4231.44: 1.41x slowdown It remains off and a curiosity for the time being. Signed-off-by: Chris Wilson commit 5dba7028cd5024282b601c41ddfc9081eaa1d189 Author: Chris Wilson Date: Fri Nov 4 11:24:03 2011 +0000 sna: Make sure the alpha map is accessible by the CPU on fallbacks Signed-off-by: Chris Wilson commit 70c9e70f35af21de2b5b56d72f2a9e7fe9ed49d6 Author: Chris Wilson Date: Fri Nov 4 10:19:21 2011 +0000 sna: Don't reuse partial vmapped bo A fun use after free. Signed-off-by: Chris Wilson commit 7e8c9a5b8b1625fdfe885740c36da3f4c1373ee6 Author: Chris Wilson Date: Wed Nov 2 14:02:56 2011 +0000 sna: Submit the batch on the next blockhander if operation overflows If an operation overflows from one batch into another, we submit the complete batch and begin a new. That new batch will not be submitted unless it is filled or on the next delayed flush update. This can cause a flicker as a large operation is broken up, such as performing a CopyArea through a Clipmask. So if we submit a full batch during a flush interval, immediately flush any partial batch at the next blockhandler. This stops rude Santa flashing Rudolf in xsnow! Signed-off-by: Chris Wilson commit 5b21838471651a59d3e425c05a389c3f9196e21d Author: Chris Wilson Date: Thu Nov 3 22:51:24 2011 +0000 sna: Compute the correct extents for the PolyRectangle Otherwise we may leave one behind... A regression from the introduction of sna_poly_rectangles: 40af32a0e9ed971a1f2c2a45266f32016bda7ed3 (sna: Execute blits directly for PolyRectangle) Reported-by: Matti Hamalainen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42568 Signed-off-by: Chris Wilson commit 2174f840158aa9cfa370ade38be28f8dc8e4b526 Author: Chris Wilson Date: Thu Nov 3 20:41:31 2011 +0000 uxa: Remove caching of surface binding location If the pixmap were to be used multiple times within a batch with mulitple formats, the cache would only return the initial location with the incorrect format and so cause rendering glitches. For instance, GTK+ uses the same pixmap as an xrgb source and as an argb mask in order to premultiply and composite in a single pass. Rather than introduce an overly complication caching (handle, format) mechanism, kiss and remove the invalid implementation. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40926 Signed-off-by: Chris Wilson commit a1b40a20bbba4b70990a8983a2916d3d5850d828 Author: Chris Wilson Date: Thu Nov 3 19:27:23 2011 +0000 sna: Support binding of a bo for multiple formats Applications may use the same pixmap with multiple formats within the same operation. For instance, you can premultiply and composite a normal pixmap in this manner. However, as we reused the sampler binding locations of the source (without an alpha channel) for the mask, we failed to read and multiply by the alpha channel causing it to remain black instead of transparent. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40926 Signed-off-by: Chris Wilson commit 31c5eb8e906bf8e59743372edb2d703b50cd311e Author: Chris Wilson Date: Thu Nov 3 17:07:48 2011 +0000 sna: Clean up the fallback code for glyphs Signed-off-by: Chris Wilson commit fa0fefd638d148d48760c95fe05520cddd96e5a4 Author: Chris Wilson Date: Thu Nov 3 15:33:25 2011 +0000 sna: Restore the lowlevel glyph routines for the sake of Damage Damage bypasses the Text interface, preventing the backend from hooking into the font and storing private glyph representations, and calls directly into the Glyph routines. So to prevent a segfault we have to restore them. Signed-off-by: Chris Wilson commit 1677b273af67e2b690bd21a1b43a7d9f9d5a70c1 Author: Chris Wilson Date: Thu Nov 3 14:31:53 2011 +0000 sna: Skip encoding zero sized glyphs Signed-off-by: Chris Wilson commit 239cfb99f9697392d7c25328093e6662ad04bdc9 Author: Chris Wilson Date: Thu Nov 3 14:25:54 2011 +0000 sna: Unroll the quadword upload of the glyph data We know that the length is nicely aligned and so can avoid a relatively expensive call into memcpy. Signed-off-by: Chris Wilson commit e2542bad88573e590ef4cbeed6b5884166b56adb Author: Chris Wilson Date: Thu Nov 3 14:17:05 2011 +0000 sna: Add the missing returns to prevent fbImageGlyphBlt fallbacks Signed-off-by: Chris Wilson commit bc032c9be1bab7477fbf4b2a64fb7aca6d75ac18 Author: Chris Wilson Date: Thu Nov 3 11:47:18 2011 +0000 sna: Coalesce reduction of cpu damage Signed-off-by: Chris Wilson commit c92671b33ef30a8eb723eb366692ae3a5878b8f9 Author: Chris Wilson Date: Thu Nov 3 11:47:18 2011 +0000 sna: Coalesce reduction of gpu damage Signed-off-by: Chris Wilson commit 3b4a508eb022e9ade5929d3ebc97e0f9216a80b1 Author: Chris Wilson Date: Thu Nov 3 00:32:29 2011 +0000 sna: Translate glyphs into MSBFirst upon initial load Signed-off-by: Chris Wilson commit 8a259e34d3295af3be864e4fae96e6c3a9a632c7 Author: Chris Wilson Date: Thu Nov 3 01:05:52 2011 +0000 sna: gc->miTranslate is always 1 So we can perform some constant folding and eliminate dead code. Signed-off-by: Chris Wilson commit 8f68f9e5f8341e20c4e1e46044f79806a44ecd03 Author: Chris Wilson Date: Thu Nov 3 00:59:46 2011 +0000 sna: Trimming is redundant given that we always have a CompositeClip Signed-off-by: Chris Wilson commit f4bdd84b846e6e778b7c496e7ed0d51e77310f36 Author: Chris Wilson Date: Thu Nov 3 00:48:10 2011 +0000 sna: Simplify the uncommon check for gpu-only damage by using damage-all The use of a gpu-only scratch bo is uncommon with the core acceleration routines, and we can eliminate the check for not incrementing the damage by allocating a damage-all and using the common optimisation of reduce_damage(). Signed-off-by: Chris Wilson commit 353fa4218cd904857fe95ef140e7f38aefe07578 Author: Chris Wilson Date: Wed Nov 2 22:53:51 2011 +0000 sna: Don't call into retire unless there are outstanding requests Signed-off-by: Chris Wilson commit 6fdd0f254d2e58d425d6d23023e9db3d2924c6be Author: Chris Wilson Date: Wed Nov 2 22:23:16 2011 +0000 sna: Use an integer value for the sentinel clang complains otherwise. Signed-off-by: Chris Wilson commit 1073c78f6cebfd6380b53dd891b7a72e50f398d6 Author: Chris Wilson Date: Wed Nov 2 22:14:40 2011 +0000 sna: Pack small 1-bpp uploads into immediate buffers Signed-off-by: Chris Wilson commit 73b2ef5a7de8d733fa1821e5010480ede305e25e Author: Chris Wilson Date: Wed Nov 2 22:02:51 2011 +0000 sna: gc->pCompositeClip always exists after validate Signed-off-by: Chris Wilson commit 6fd0754e9c81164ca0fdcf96ba2bfb419568187f Author: Chris Wilson Date: Wed Nov 2 18:03:07 2011 +0000 sna: defer calling fbValidateGC until we fallback A secondary effect is that this prevents needless migration of the tiling pixmap which we want to optimistically keep on the GPU. Signed-off-by: Chris Wilson commit 6f8875e216194474e818ba6e743e7c22b817f96e Author: Chris Wilson Date: Wed Nov 2 15:41:40 2011 +0000 sna: Wait an extra interval before switching off periodic updates Signed-off-by: Chris Wilson commit def6b5e733e623333abf596bbdbabf8dd0ac8b00 Author: Chris Wilson Date: Wed Nov 2 14:35:45 2011 +0000 sna: Only execute the accel block handler if we are about to block Signed-off-by: Chris Wilson commit 088b875affb8655010bc678ca4a3e87703c92daf Author: Chris Wilson Date: Wed Nov 2 13:11:04 2011 +0000 sna: Use the packed 8x8 stipple for non-repeating small rectangles Signed-off-by: Chris Wilson commit 0c373db73d1d2b7cf844653307c60a3891a3cc10 Author: Chris Wilson Date: Wed Nov 2 12:43:55 2011 +0000 sna: Fix the 8x8 stippled pattern origin Signed-off-by: Chris Wilson commit 9cdf8be55029f30b47cfc39ddd2754d40602cf2c Author: Chris Wilson Date: Wed Nov 2 12:17:31 2011 +0000 sna: Add clipped stippled upload support For xsnow! Signed-off-by: Chris Wilson commit 6553c9e1cbfcecf781ba106de99f9e70c6d373ba Author: Chris Wilson Date: Wed Nov 2 10:03:45 2011 +0000 sna: Quieten a fewer compiler sign compare warnings Signed-off-by: Chris Wilson commit 42e2036cda6b76f2b64e28a81bdaa661e4cbffa5 Author: Chris Wilson Date: Tue Nov 1 20:56:48 2011 +0000 sna: Use bo for scratch pixmaps allocated by the dix/mi routines Now that we have the rudiments of accelerated deep-plane copies, we can begin to benefit from using BO for the core dix/mi routines like ShmPutImage. Signed-off-by: Chris Wilson commit 45cc952994e169590ac4300f4ccf54810377f7f2 Author: Chris Wilson Date: Tue Nov 1 20:20:35 2011 +0000 sna: Fix debugging assertions for Composite When comparing drawable clip extents against pixmap boundaries we need to include the pixmap screen offset on a Composited desktop. Signed-off-by: Chris Wilson commit ebc9f3966d28343aebeba6886500abf511631785 Author: Chris Wilson Date: Tue Nov 1 19:47:51 2011 +0000 sna: Accelerate deep-plane copy Signed-off-by: Chris Wilson commit e0fd07bc251296784bf70f02877765171a053cc6 Author: Chris Wilson Date: Tue Nov 1 17:02:17 2011 +0000 sna: Accelerate XYPixmap upload when using GXcopy Mostly for the lols. Signed-off-by: Chris Wilson commit 22c43efe6b9b5f669593aa9f3af6ee437426c5d2 Author: Chris Wilson Date: Tue Nov 1 13:43:23 2011 +0000 sna: Implement 8x8 stippled rect fills Signed-off-by: Chris Wilson commit c58b7643e9b86599a41ede516a778bd9869adc8e Author: Chris Wilson Date: Tue Nov 1 10:13:20 2011 +0000 sna: Accelerate 1bpp uploads These still get used (see Wine and Swing) by applications which like to do "crisp" 1-bit rendering on the client side and then put onto the scanout. So avoid the readbacks, and push them through the BLT instead. It turns out to be faster than using fb too, bonus! Signed-off-by: Chris Wilson commit 8939ddbc27efedbb3e446dd26425a6bed39577f2 Author: Chris Wilson Date: Mon Oct 31 17:45:02 2011 +0000 sna: Improve rendering of thin segments Signed-off-by: Chris Wilson commit 98b830a975e04685455b244a8414a293857cbd00 Author: Chris Wilson Date: Mon Oct 31 17:41:27 2011 +0000 sna: Improve rendering of thin lines Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42443 Signed-off-by: Chris Wilson commit 6a5834ae560ef3b05c42b58ee0654316a66eaed0 Author: Chris Wilson Date: Mon Oct 31 16:28:59 2011 +0000 sna/gen3: Fix invalid assert SHADER_CONSTANT is expected here, the other IMMEDIATES however should have already been handled. Signed-off-by: Chris Wilson commit e12375d05bfb32933897b62829d82c6f1aa81d70 Author: Chris Wilson Date: Mon Oct 31 14:24:19 2011 +0000 sna: Fix a few minor cut'n'paste errors Use the constant value [last_box-box] where applicable. Signed-off-by: Chris Wilson commit 20a4f533958991557a3b05af00f2856657579d68 Author: Chris Wilson Date: Mon Oct 31 14:14:40 2011 +0000 sna: Apply the GPU damage for clipped PolyFillRectangles Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42425 Signed-off-by: Chris Wilson commit 7172f28c2b36aaa8c3a74ae4a7f699d3d4af10eb Author: Chris Wilson Date: Mon Oct 31 12:53:35 2011 +0000 sna: Fix placement of clipped wide PolyRectangle Signed-off-by: Chris Wilson commit 59535d0e1c587cfe9249ab1baf9acf8470b49b8b Author: Chris Wilson Date: Mon Oct 31 12:10:52 2011 +0000 sna: Set the flush interval based on output vrefresh Rather than a blank 25Hz, use twice the vblank interval to hopefully avoid bad values. Signed-off-by: Chris Wilson commit 9a2e59bfba6748325918f895b3e58351c7eb4baa Author: Chris Wilson Date: Mon Oct 31 11:56:53 2011 +0000 sna: Fix reversal of zero/wide for PolyRectangle Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42414 Signed-off-by: Chris Wilson commit b1287e49347e0fff67f43d157fa87758d5cbe588 Author: Chris Wilson Date: Mon Oct 31 11:27:36 2011 +0000 sna/video: Fix copy region for cropped video Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42412 Signed-off-by: Chris Wilson commit b4ab412cb3eb8d37a33f5eeae5c613090ad2df0f Author: Chris Wilson Date: Mon Oct 31 10:37:43 2011 +0000 sna/blt: Optimise fill with GXcopy and pixel==0 to a GXclear Signed-off-by: Chris Wilson commit 088728ad26c7efc2d65b97ff22d526c65a0fa442 Author: Chris Wilson Date: Mon Oct 31 10:04:35 2011 +0000 sna/blt: Don't idiotically override alu for pixel==0 and track alu Another classic and utterly stupid mistake. At least I was consistent in my error. Reported-by: Clemens Eisserer Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42414 Signed-off-by: Chris Wilson commit 9c399c74adc5e5bc7d425382a74d84315d2cef02 Author: Chris Wilson Date: Mon Oct 31 09:20:54 2011 +0000 sna: Add an option to disable the delayed flush Section "Device" Option "DelayedFlush" "False" EndSection Signed-off-by: Chris Wilson commit c8860ce26eaa8f9e876af2354d61c35338076ac8 Author: Chris Wilson Date: Sun Oct 30 23:25:48 2011 +0000 sna: Report whether anything was retired to the inactive list So that we can skip a fresh search of the inactive list if nothing changed. Signed-off-by: Chris Wilson commit a7adcc8e47ba550e7c36a6543a6e0d99040c7354 Author: Chris Wilson Date: Sun Oct 30 21:19:35 2011 +0000 sna: Stash the last scratch pixmap Signed-off-by: Chris Wilson commit c8d4f5d32af94f712cc81ff495b19907261759ea Author: Chris Wilson Date: Sun Oct 30 21:21:25 2011 +0000 sna: Correct PolyRectangle verticals to be the end-point not the length Fixes an off-by-one in the drawing of the rectangles caused by a too-literal translation of the rectangles into boxes. Signed-off-by: Chris Wilson commit 5c45622b889ba66b6476241601e1458d219c45ba Author: Chris Wilson Date: Sun Oct 30 17:49:19 2011 +0000 uxa/glyphs: Fallback rather than fail to render with a non-solid Source Reported-by: Uli Schlachter Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31819 Signed-off-by: Chris Wilson commit e6eb803cb44b01e300fb4b08304227a430912beb Author: Chris Wilson Date: Sun Oct 30 17:44:26 2011 +0000 sna: Loop over all clip rects for glyph blt rather than fallback Signed-off-by: Chris Wilson commit 1eefb75c91fb769551b485f1b2c6b59023c69906 Author: Chris Wilson Date: Sun Oct 30 17:17:36 2011 +0000 sna: Don't mess with NDEBUG This is set in configure and redefining it later inside the C files just leads to trouble and broken compilation. Signed-off-by: Chris Wilson commit 7237374a03d1e0c2e6c0b2d0eb42afc8df25df0d Author: Chris Wilson Date: Sun Oct 30 16:46:10 2011 +0000 configure: Bump version to 2.16.901 commit 0a78a75e75225d89e465804c482a667840a2c8de Author: Chris Wilson Date: Sun Oct 30 16:45:46 2011 +0000 NEWS: Add release notes for 2.16.901 commit c7552cb819ae8c90975193c159236e0070628dd9 Author: Daniel Vetter Date: Sun Oct 30 16:35:14 2011 +0100 i810: kill mmio vga access helpers Signed-Off-by: Daniel Vetter commit e8b8adeab3b2e69a8684217271604a5f658f617d Author: Daniel Vetter Date: Sun Oct 30 16:34:05 2011 +0100 i810: use vgahw functions instead of roll-your-own Signed-off-by: Daniel Vetter commit 4aeea489ed3189d7ebcae4199153c1ae736ebf68 Author: Daniel Vetter Date: Sun Oct 30 16:07:45 2011 +0100 i810: rip out PIO access functions All the io done at init time is already converted to libpciaccess Signed-Off-by: Daniel Vetter commit e735636194671e221eca3e86b9bd06fd0d4b6c5a Author: Daniel Vetter Date: Sun Oct 30 15:51:49 2011 +0100 i810: kill dead i830 defines Signed-Off-by: Daniel Vetter commit bb840ee09fa620648065884306fbe3e0da37ad77 Author: Chris Wilson Date: Sun Oct 30 16:13:04 2011 +0000 sna: Convert PolyRectangles to use Box32 For the same overflow protection. Signed-off-by: Chris Wilson commit af52e234a78bbde964a93ef8cce21f41a5c959f3 Author: Chris Wilson Date: Sun Oct 30 15:34:34 2011 +0000 sna: Fix compilation Remember to drink coffee and compile "obvious" fixes before pushing. Signed-off-by: Chris Wilson commit 23b314729c43101e515e2625db2a2401c72c2596 Author: Chris Wilson Date: Sun Oct 30 15:24:21 2011 +0000 sna: Rewrite box32_add_rect() to enable int32_t promotion Signed-off-by: Chris Wilson commit 427622aca31b7463eb2dcd52e352dc8997e84baa Author: Chris Wilson Date: Sun Oct 30 12:02:42 2011 +0000 sna: Push overflow detection to the end of extents Removes a couple of conditionals from the middle of the hotpath and on Intel we are not realising the benefit of only utilising 16-bit values. Signed-off-by: Chris Wilson commit 2d3aba8518ae790325c6123dacc3ce73b6e91cbd Author: Chris Wilson Date: Sun Oct 30 11:22:26 2011 +0000 Revert "sna: Don't flush the render caches if in the process of writing again" This reverts commit 15266e1b9500f6b348661c60d1982bde911f2d0e. KDE relies upon the ability to render into a sampler and then render upon itself. Not the first sign of madness... Will have to find another way of winning back the compwinwin performance. commit d4062705178856cffc83030fa40f758e9d884566 Author: Chris Wilson Date: Sun Oct 30 10:40:32 2011 +0000 sna/composite: Fix incorrect operator reduction for RenderFillRectangles As exemplified by KDE (using Kate) on gen3, it would attempt to render a large set of boxes using OVER and a transparent colour. As gen3 copied across some of the BLT assumptions, it was incorrectly reducing that to a CLEAR and thus rendering incorrectly. Signed-off-by: Chris Wilson commit da3f8656744f7c801608c7c89a859c0f7dc9e6e0 Author: Jeremy Huddleston Date: Sat Oct 29 20:15:11 2011 -0700 Use malloc/calloc/realloc/free directly Signed-off-by: Jeremy Huddleston commit 17ba07a7befc7f442ae1c917a087ac026516d886 Author: Chris Wilson Date: Sat Oct 29 20:03:37 2011 +0100 sna/gen3: Set the src flags for fill A regression from c2040fb8e62076d87f7a5b407505ee3f3482945e (sna: Remove the memset(0) of the fill op) left the flags for the source channel uninitalised leaving the shader construction undefined and causing visual glitches. Reported-by: Paul Neumann Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42367 Signed-off-by: Chris Wilson commit 4835fe5b2e19ac456773565399f334845f7442c0 Author: Chris Wilson Date: Sat Oct 29 18:56:29 2011 +0100 sna/genX: Improve reduction of Render operator to BLT alu This appeared to introduce a visual gitch into the xfce4 selection box on gen6 at least. References: https://bugs.freedesktop.org/show_bug.cgi?id=42367 Reported-by: Paul Neumann Signed-off-by: Chris Wilson commit 33383fde55609fb4bd372d2d41a6254799499225 Author: Chris Wilson Date: Sat Oct 29 12:53:15 2011 +0100 sna: Tweak PolyRectangle blitting A box of height/width 1 and lineWidth 0 can also be drawn with a single box as the far edge is contiguous with far side of the near edge. Signed-off-by: Chris Wilson commit 64a57c8dbec81f6420ff032985237eb16cebfb87 Author: Chris Wilson Date: Sat Oct 29 11:01:51 2011 +0100 sna: Further clipping bugs Make sure the line is clipped to the current clip box and discard if the clip is reduced to nothing. References: https://bugs.freedesktop.org/show_bug.cgi?id=42361 Signed-off-by: Chris Wilson commit 719626ef7918d5cd69d13f983b8b615aefe215d6 Author: Chris Wilson Date: Sat Oct 29 10:26:08 2011 +0100 sna: Increment clip box when short-circuiting the iteration Reported-by: nkalkhof@web.de Bugzilla: https://bugs.freedesktop.org/show_bug.cgi Signed-off-by: Chris Wilson commit 32a9e0352a1e28509580d84bfc5377d8fae913c4 Author: Chris Wilson Date: Fri Oct 28 23:14:24 2011 +0100 sna: Retire and search inactive again before creating new buffer Attempt to retire an active buffer into the inactive cache before giving up and creating a new buffer. Signed-off-by: Chris Wilson commit 15266e1b9500f6b348661c60d1982bde911f2d0e Author: Chris Wilson Date: Fri Oct 28 18:00:56 2011 +0100 sna: Don't flush the render caches if in the process of writing again Signed-off-by: Chris Wilson commit d3c7ee921172d4898ebdc6e944812a02426008e9 Author: Chris Wilson Date: Fri Oct 28 16:44:16 2011 +0100 sna: Faster unclipped rectilinear segments Signed-off-by: Chris Wilson commit 3cd909cfe9e7d7e97a1d51513a049e312fd9ddae Author: Chris Wilson Date: Fri Oct 28 15:48:49 2011 +0100 sna: Call miZeroArcLine where appropriate for GPU paths Signed-off-by: Chris Wilson commit 9921c98df070032e082570f0663f6d3ad0cccd56 Author: Chris Wilson Date: Fri Oct 28 14:09:11 2011 +0100 sna: Faster unclipped PolyFillRect Signed-off-by: Chris Wilson commit c1718f96f520874c1fb2af0eb975c7f548762d34 Author: Chris Wilson Date: Fri Oct 28 14:01:24 2011 +0100 sna: Faster unclipped PolyPoint Signed-off-by: Chris Wilson commit a4762ed891a50238abddf6c762a053db5c34b87f Author: Chris Wilson Date: Fri Oct 28 13:39:17 2011 +0100 sna: Call directly into tiled rects for tiled spans. As we already know the extents and that this is a candidate for GPU-acceleration, we can skip over those steps and emit the tiled rects. Signed-off-by: Chris Wilson commit a02069df2ddc259d65ad468834f7968d283b713f Author: Chris Wilson Date: Fri Oct 28 11:30:37 2011 +0100 sna: Faster unclipped spans Signed-off-by: Chris Wilson commit 48eff1676c4066c8b8e069fd579a1b6fc2329960 Author: Chris Wilson Date: Thu Oct 27 23:30:06 2011 +0100 sna/gen2: Reset BLT registers across 2D/3D context switches It appears the hardware trashes the BLT registers after a 3D context switch, so we need to reload. Signed-off-by: Chris Wilson commit f006fac72a733e047b9468704e9c9206f62f96f5 Author: Chris Wilson Date: Thu Oct 27 21:50:25 2011 +0100 sna: Fast path typically unclipped tiled rects Signed-off-by: Chris Wilson commit d6f543011bf3d03b9298b5ceeddfc1fc20fc534b Author: Chris Wilson Date: Thu Oct 27 20:16:35 2011 +0100 sna: Use private identifier for internal scratch pixmaps This was meant to be a part of the previous commit. These are the scratch pixmaps for which we truly do want to allocate GPU-only. Signed-off-by: Chris Wilson commit 14a065a267523f9a31be07daaab19b67e9f02290 Author: Chris Wilson Date: Thu Oct 27 18:07:53 2011 +0100 sna: Create scratch pixmap on the CPU Contrary to earlier belief, the only usage of CREATE_PIXMAP_USAGE_SCRATCH in the dix/mi are either along paths unused by us or more importantly for operations which are detrimental to create GPU-only buffers. So create CPU pixmaps instead. Signed-off-by: Chris Wilson commit 5d52d5009375618bb703909fa0fad04e6d54a2ba Author: Chris Wilson Date: Thu Oct 27 17:06:51 2011 +0100 sna: Tweak zero line spans to include missing last segment Signed-off-by: Chris Wilson commit 72e00096351137bd7eb0ae91474657a597836252 Author: Chris Wilson Date: Thu Oct 27 16:36:39 2011 +0100 sna: Fix advance through clip boxes for fill->boxes Signed-off-by: Chris Wilson commit c7bd89fb54686c14b687c007e42c34c23423b0fd Author: Chris Wilson Date: Thu Oct 27 16:23:35 2011 +0100 sna: Fix PolyPoint not to always send 512 boxes Just emit the remaining boxes! Signed-off-by: Chris Wilson commit cfd5b7f6ce80af911bfc8b71bba776ea814e307a Author: Chris Wilson Date: Thu Oct 27 15:28:11 2011 +0100 sna: Use fill->boxes to pack PolyFillRectangle Signed-off-by: Chris Wilson commit 8d304f47e35be344550f389158eac3d4c21d9440 Author: Chris Wilson Date: Thu Oct 27 14:43:46 2011 +0100 sna: Use fill->boxes for rectilinear blits Signed-off-by: Chris Wilson commit 5d51ff0cf901b808c3cd5aea761d51e6d15b73bf Author: Chris Wilson Date: Thu Oct 27 13:57:59 2011 +0100 sna: Clip PolyLines to the current clip box Signed-off-by: Chris Wilson commit 990043f6b8cf8e580aad2e52f8d236a6aec838b5 Author: Chris Wilson Date: Thu Oct 27 12:33:55 2011 +0100 sna: Handle singular clip regions for PolyRectangles Otherwise X will crash! Signed-off-by: Chris Wilson commit 991582f6678581e3d92c0497e10ecee67536efc2 Author: Chris Wilson Date: Thu Oct 27 09:27:41 2011 +0100 sna/io: Update batch mode after submitting partial requests Signed-off-by: Chris Wilson commit 91745de113340c8a281e8cb724b4a7e0b7a0711a Author: Chris Wilson Date: Thu Oct 27 09:17:50 2011 +0100 sna: Further improve use of fill->boxes for PolyRectangle Signed-off-by: Chris Wilson commit ffe1bdea82c07a2738743855dfa83494531b41aa Author: Chris Wilson Date: Wed Oct 26 18:37:29 2011 +0100 sna/blt: After submitting the batch, it will be empty Signed-off-by: Chris Wilson commit b34e7454574f36796560955fb9d3d33ca00924d6 Author: Chris Wilson Date: Wed Oct 26 18:11:25 2011 +0100 sna/blt: Convert Copy with color 0 into a Clear Signed-off-by: Chris Wilson commit 389241aa6469b2e64a58cc0527e3310fdc69ffb7 Author: Chris Wilson Date: Wed Oct 26 17:50:38 2011 +0100 sna: Suppress an overwritten fill Signed-off-by: Chris Wilson commit baf78fcddb87eba987163485ad8fd227fb244f29 Author: Chris Wilson Date: Wed Oct 26 12:54:13 2011 +0100 sna/gen2: Cache the last solid colour for spans Signed-off-by: Chris Wilson commit ff4715a36999a43cee20cf3474b4ae0af646342c Author: Chris Wilson Date: Wed Oct 26 12:40:46 2011 +0100 sna/composite: Discard opaque masks Signed-off-by: Chris Wilson commit 0079579ebd548fc1b490a42928373507a93229bd Author: Chris Wilson Date: Wed Oct 26 11:49:53 2011 +0100 sna: Fix debug compilation, again. commit 5988422455ebb2a3b1cafadc1ff302c35a7a5039 Author: Chris Wilson Date: Wed Oct 26 11:47:45 2011 +0100 sna: Handle degenerate copy area whilst wedged We want to return early to avoid handing the empty box as the lower code makes the assumption that it has work to do. Signed-off-by: Chris Wilson commit 3fc7cd2dc8e2b9c0d4143a9f6657f84050ae249a Author: Chris Wilson Date: Sun Oct 23 20:59:50 2011 +0100 sna/blt: Rename the composite paths Whilst re-reading, I found the old naming scheme slightly muddled and not nearly as descriptive as it should be. Hopefully this slight tweak reads better in 6 months time. Signed-off-by: Chris Wilson commit 280325900bf3c17c3177f6e3f52236d6b452e0f3 Author: Chris Wilson Date: Sun Oct 23 20:58:48 2011 +0100 sna/blt: Share the common fill->boxes between blt and render paths Signed-off-by: Chris Wilson commit 56f65e65204f1ecbad598419e525e69f6179f9c7 Author: Chris Wilson Date: Sun Oct 23 20:40:21 2011 +0100 sna: Inline box_intersect() Most of this branchy function is spent in manipulating the stack for the function call, so inline it. Signed-off-by: Chris Wilson commit f65e73f8a3a013e79b753d625f79994408e717f7 Author: Chris Wilson Date: Sun Oct 23 19:55:40 2011 +0100 sna: Use fill->boxes to unroll FillSpans Signed-off-by: Chris Wilson commit 94f9cd40dcdd444d3b5a5598deb0f3d04026df3a Author: Chris Wilson Date: Sun Oct 23 19:11:35 2011 +0100 sna: Use fill->boxes to unroll PolyPoint Signed-off-by: Chris Wilson commit 5e08ca75a5eb852c09b9acf6004668bc63f1fe6c Author: Chris Wilson Date: Sun Oct 23 17:53:54 2011 +0100 sna: Use the new fill->boxes for PolyRectangle Signed-off-by: Chris Wilson commit efdc7985e2f619ca94cf6ad77ead4f6867ceedc5 Author: Chris Wilson Date: Wed Oct 26 14:57:28 2011 +0100 self-copy-damage commit 0ed3426a810336b666604d34c10f996f318ebf82 Author: Chris Wilson Date: Fri Oct 21 23:45:28 2011 +0100 sna: Convert diagonal zero-width lines into blits This is slower than falling back to swrast for x11perf (up to 4x slower on SNB), it is still faster than doing that rasterisation through a WC-mapping and much faster in ordinary usage due to avoiding the readback hit. Signed-off-by: Chris Wilson commit c12371d9e7b3bbff7f318186a0933d6108db0bc8 Author: Chris Wilson Date: Fri Oct 21 22:28:56 2011 +0100 sna: Flatten the branching for fill-spans Signed-off-by: Chris Wilson commit e7f19d85fead62df21eedc87409b5abacfec4a17 Author: Chris Wilson Date: Fri Oct 21 22:15:09 2011 +0100 sna/blt: Upload the box using a single 64-bit instruction So long as we have 64-bit instructions of course! Signed-off-by: Chris Wilson commit 40af32a0e9ed971a1f2c2a45266f32016bda7ed3 Author: Chris Wilson Date: Fri Oct 21 20:10:02 2011 +0100 sna: Execute blits directly for PolyRectangle By constructing the batch buffer directly for PolyRectangle, rather than via miPolyRectangle->(PolyFillRectangle/PolyLine), we dramatically reduce the CPU overhead and can saturate the GPU. Signed-off-by: Chris Wilson commit a18f559961135fa288dda3b94207abb0b6d4d302 Author: Chris Wilson Date: Fri Oct 21 16:37:09 2011 +0100 sna: Fix debug compilation Signed-off-by: Chris Wilson commit a3a075201c8e47cfad6ec296b7baf549deb44cb3 Author: Chris Wilson Date: Fri Oct 21 15:30:52 2011 +0100 sna: Treat a bo marked as being last seen on the GPU as requiring a flush We are hitting this path upon retiring the old scanout buffer following a page-flip. We want to treat this as being hot and available for reuse, so mark it as such until the next retirement pass. Signed-off-by: Chris Wilson commit 999d13f32162ce11fe4042825b5b849073944ca8 Author: Chris Wilson Date: Fri Oct 21 12:43:02 2011 +0100 sna: Fast path unclipped points Signed-off-by: Chris Wilson commit eb80013f4ea50ad4f54b4d1d90c5e9da27e1c34c Author: Chris Wilson Date: Fri Oct 21 11:49:55 2011 +0100 sna: Fast path for unclipped rectangles Signed-off-by: Chris Wilson commit d6ae86a51cc49dbba579838edd24a94e8f68294c Author: Chris Wilson Date: Fri Oct 21 03:06:20 2011 +0100 sna: Optimise reduce_damage() to handle all-damaged pixmaps Signed-off-by: Chris Wilson commit 5b945b85ee938688412df6adfea488766f4656af Author: Chris Wilson Date: Fri Oct 21 02:45:50 2011 +0100 sna: Fast-path unclipped fill spans Signed-off-by: Chris Wilson commit e9a193e9803bb69fc4a7e712f33a36ba395b3c89 Author: Chris Wilson Date: Fri Oct 21 02:20:22 2011 +0100 sna: Short-circuit GetWindowPixmap() to speed-up pixmap retrieval Signed-off-by: Chris Wilson commit 662402e41e5c7976002a71a7f961ca97c771b1f3 Author: Chris Wilson Date: Fri Oct 21 02:11:19 2011 +0100 sna: Micro-optimise PolyLine blt Signed-off-by: Chris Wilson commit c2040fb8e62076d87f7a5b407505ee3f3482945e Author: Chris Wilson Date: Fri Oct 21 02:00:44 2011 +0100 sna: Remove the memset(0) of the fill op The backends are all expected to initialise the state required. Signed-off-by: Chris Wilson commit 7e7759db4c1dbf8b782fab9b9ca95cfa1db6cf59 Author: Chris Wilson Date: Fri Oct 21 01:41:56 2011 +0100 sna: Pass a BoxRec to the fill op For many of the core drawing routines, passing a BoxRec for the fill is more convenient since they already have one generated by the clip intersection. Signed-off-by: Chris Wilson commit 98bca2dbb9c33c548b1d9789ddb633ae0389c8f1 Author: Chris Wilson Date: Fri Oct 21 01:07:52 2011 +0100 sna: Check whether we can blt whilst determining the PolyLine extents Signed-off-by: Chris Wilson commit 91f49549750aac99d38ae8f3a132c955a2c8d8f5 Author: Chris Wilson Date: Fri Oct 21 00:42:43 2011 +0100 sna: Speed-up blitting of unclipped lines Signed-off-by: Chris Wilson commit 06d7574d7da047a6314be5af27f4ac47ccd5a350 Author: Chris Wilson Date: Thu Oct 20 21:38:30 2011 +0100 sna/damage: Stash the last freed damage for quick reallocation Signed-off-by: Chris Wilson commit 1471ef82b595a207dc8873c45176ec31f277a43f Author: Chris Wilson Date: Thu Oct 20 21:32:14 2011 +0100 sna/damage: Only track the mode globally As damage accumulation is handled modally, we do not need to track the mode per elt and so attempt to simplify the code. Signed-off-by: Chris Wilson commit 1229bf6a690e7f315ab22957da23481f58515ff9 Author: Chris Wilson Date: Thu Oct 20 17:37:41 2011 +0100 sna: Actually apply the composite offset for the self-copy I translated the region to copy by the composite pixmap offset, only failed to use the translated region for the actual copy command (using instead the original boxes). Fix that mistake by avoiding the temporary region entirely and applying the translation inplace. We also have to be careful in the case of copying between two composited windows that have different offsets into the same screen pixmap. This fixes the regression introduced with a3466c8b69af (sna/accel: Implement a simpler path for CopyArea between the same pixmaps). Signed-off-by: Chris Wilson commit 3526d83e460ce6410f23f59d1315793ff9607253 Author: Chris Wilson Date: Thu Oct 20 00:29:52 2011 +0100 sna/dri: Perform a little dance to restore the gpu status on release of the bo As the bo is outside of our control whilst it is under the influence of an external renderer, we try to maintain it on the gpu so as to avoid unnecessary ping-pong. But once it is wholly back under our control, we want to stop paying the penalty for sharing it. Signed-off-by: Chris Wilson commit 50b980f12e02401cdd4bc21b970d92e7bd1e6459 Author: Chris Wilson Date: Wed Oct 19 21:09:01 2011 +0100 sna: Reuse any partial write buffer for readback Take advantage of any available temporary buffer that we reuse for readback knowing that it is the last operation in the batch. Signed-off-by: Chris Wilson commit 972989276dd3f84c1cedca0494d04f907875f8f3 Author: Chris Wilson Date: Wed Oct 19 20:41:14 2011 +0100 sna: Add some debug to discern the nature of the Cr fallback Signed-off-by: Chris Wilson commit fc224e2f8c0200c114f8dbddfc4f5395a3ef0fad Author: Chris Wilson Date: Wed Oct 19 20:20:55 2011 +0100 sna: Clean up some debug messages for 64bit Signed-off-by: Chris Wilson commit f4346e5d255f419ee6148f7d69f02560732dd4de Author: Chris Wilson Date: Wed Oct 19 19:26:19 2011 +0100 sna/blt: Use SCANLINE_BLT for multiple fill boxes Signed-off-by: Chris Wilson commit d7fb98efdcc1bcc2cca6deb54b16d425b0350196 Author: Chris Wilson Date: Wed Oct 19 17:52:56 2011 +0100 sna: The initial aperture check for a set of bo is unlikely to fail Signed-off-by: Chris Wilson commit 3c8e1c5c4cbe703781f2845926f76a9537a971ea Author: Chris Wilson Date: Wed Oct 19 16:35:08 2011 +0100 sna: Reset the ring flag upon idling We track the last ring used when active so as to avoid stalling between batches. Once the GPU has retired all the pending requests, we can use whichever ring is preferrable for the next operation without any danger of stalling upon submission. Signed-off-by: Chris Wilson commit 594c5f86bb2e1cd0390b360c926ead58ba49979f Author: Chris Wilson Date: Wed Oct 19 16:25:42 2011 +0100 sna: Don't rewrite the solid colour cache if it hasn't changed Signed-off-by: Chris Wilson commit 5515f75647bb148d9e720dcc4713a93b59ffbd49 Author: Chris Wilson Date: Wed Oct 19 13:49:55 2011 +0100 sna: Enlarge the minimum pixmap size to migrate for Render This is to workaround a ping-pong issue involving small icons. The horrible sequence of operations appears to use a tiled FillRect to copy from the scanout onto to a temporary pixmap, which causes us to readback from the scanout. We are destined to hit the fallback path there anyway until we implement stippling... References: https://bugs.freedesktop.org/show_bug.cgi?id=41718 Signed-off-by: Chris Wilson commit 87ba33bc0bcaf3c5160edfc61cff3ba0d28d3fd8 Author: Chris Wilson Date: Wed Oct 19 13:09:19 2011 +0100 sna/damage: Avoid reducing the damage for simple tests Signed-off-by: Chris Wilson commit 63aa84ef57ff1e55d2df6d680d6bbf88be0619a6 Author: Chris Wilson Date: Wed Oct 19 13:08:50 2011 +0100 sna/gen6: Apply the unknown blitter death workaround Signed-off-by: Chris Wilson commit 25f2d181946738d1ac2deb724eb48453c8692ed1 Author: Chris Wilson Date: Tue Oct 18 23:03:10 2011 +0100 sna: Compute region extents in place to eliminate redundant stack space Signed-off-by: Chris Wilson commit 1a43b2a46a67fdea215719c4446224c9d2e26a20 Author: Chris Wilson Date: Tue Oct 18 17:52:56 2011 +0100 sna: Use the unlikely wedged() throughout Signed-off-by: Chris Wilson commit 7a9c76e1812d106fedf160c959e6e502998e4ce8 Author: Chris Wilson Date: Tue Oct 18 15:51:33 2011 +0100 sna: Micro-optimise fill-spans Signed-off-by: Chris Wilson commit 0b83abfb2bc3f65447205048ae0af1a94fa9ef15 Author: Chris Wilson Date: Tue Oct 18 14:43:37 2011 +0100 sna/gen6: Don't modify composite arguments whilst checking for BLT Signed-off-by: Chris Wilson commit ae7bd2bf70b42b8c12e5e5ae074891595827a1c0 Author: Chris Wilson Date: Tue Oct 18 11:54:05 2011 +0100 sna/blt: Move the conditional out of the fill-many hotpath Signed-off-by: Chris Wilson commit 86f99379ee55b157634174c4c8aad61a30b4f57f Author: Chris Wilson Date: Tue Oct 18 11:35:12 2011 +0100 sna/gen4: Add fill-one Signed-off-by: Chris Wilson commit 26c082dbd3f89b987168d321f72e78db8c5ddc2c Author: Chris Wilson Date: Tue Oct 18 10:50:53 2011 +0100 sna/gen6: Precompute floats_per_rect Signed-off-by: Chris Wilson commit c69a7989b3c9cedc961e29b1a569b174207964ae Author: Chris Wilson Date: Tue Oct 18 10:48:37 2011 +0100 sna/gen5: Add fill-one implementation Signed-off-by: Chris Wilson commit 26a1918290b2d23de72a67805fe5e766da0c5309 Author: Chris Wilson Date: Tue Oct 18 10:42:48 2011 +0100 sna/gen6: Try continuing with the BLT if the last batch was also BLT In the vain hope of reducing switching between rings and introducing stalls between batches. Signed-off-by: Chris Wilson commit 4b1398f26d4de44167096c6548ff7384c24d5e06 Author: Chris Wilson Date: Tue Oct 18 00:29:18 2011 +0100 sna/gen6: Micro-optimise gen6_rectangle_begin We can only emit state between primitives, ergo we need only check for state updates if we've finished the vbo or are starting a new operation. Signed-off-by: Chris Wilson commit b2d842df5e3198dab401fbd450d4af83d44917dd Author: Chris Wilson Date: Mon Oct 17 23:34:19 2011 +0100 sna/gen2: Precompute floats-per-rect Signed-off-by: Chris Wilson commit 729f1ec7869167ff91fa969d06dbdfbf0e8b4126 Author: Chris Wilson Date: Mon Oct 17 23:20:20 2011 +0100 sna/gen2: Prefer to use the BLT Signed-off-by: Chris Wilson commit adef3a56cde1210554dc8327baa37c36fc5f18e3 Author: Chris Wilson Date: Mon Oct 17 23:08:32 2011 +0100 sna/gen3: Prefer to use the BLT where possible for composite ops Signed-off-by: Chris Wilson commit f40e6ab50b264ef7eb7750f72ab7418c0d3dc9c1 Author: Chris Wilson Date: Mon Oct 17 23:06:30 2011 +0100 sna/gen3: Prefer to use the BLT to clear the scratch glyph pixmaps Signed-off-by: Chris Wilson commit 941e3504e049be8af50ca9df2d0aafe9eb477983 Author: Chris Wilson Date: Mon Oct 17 19:51:33 2011 +0100 sna: Some more debug output for request/bo retirement Signed-off-by: Chris Wilson commit 1d82fe3e528578d11d2a258b586b67c807eb7cb4 Author: Chris Wilson Date: Mon Oct 17 19:47:03 2011 +0100 sna: Only retire the flush handler if nothing was submitted within the period Signed-off-by: Chris Wilson commit 7758e333409409393c4c974adb2831a7b5b18fe4 Author: Chris Wilson Date: Mon Oct 17 19:32:44 2011 +0100 sna/gen3: Use immediates for black/white solid sources Signed-off-by: Chris Wilson commit 29ca1a3922cb0e6f3d7b71857a252e5de81941b5 Author: Chris Wilson Date: Mon Oct 17 17:16:16 2011 +0100 sna/gen3: More removal of memset(0) Signed-off-by: Chris Wilson commit 88bc10878830dffefda6ed905c1f598d7a7d67ef Author: Chris Wilson Date: Sun Oct 16 20:05:49 2011 +0100 sna/gen5: Rearrange the BLT->RENDER workaround So that we can simply use the pending DRAWRECT as the non-pipelined flush required following use of a BLT command. Signed-off-by: Chris Wilson commit 18aed47ba37ccfbcdd72ed251fc97222741c66a7 Author: Chris Wilson Date: Mon Oct 17 16:41:14 2011 +0100 sna: Fast path common colour conversions Signed-off-by: Chris Wilson commit a3466c8b69afeda95180fcdc97b56d31f7a1d1ad Author: Chris Wilson Date: Sun Oct 16 20:52:47 2011 +0100 sna/accel: Implement a simpler path for CopyArea between the same pixmaps Signed-off-by: Chris Wilson commit 8afa05191a9a337ce6e02b1064de2876f5635435 Author: Chris Wilson Date: Mon Oct 17 00:55:51 2011 +0100 sna: Improve debug output for mi/fb fallbacks Signed-off-by: Chris Wilson commit 2b118658d5b9cfa56132f91238f2ea61fba8b357 Author: Chris Wilson Date: Mon Oct 17 15:00:01 2011 +0100 sna/gen3: Remove memset(0) from fill_boxes And initialise only the state used for the operation. Signed-off-by: Chris Wilson commit f1bb4ebfd8991f2f9eb9c38b9259792c11e7c86a Author: Chris Wilson Date: Mon Oct 17 14:22:58 2011 +0100 sna/damage: Clear damage->all when subtracting I missed clearing the all-damaged flag on the subtract fast paths, causing us to disregard further GPU damage and losing track of render coherency. Reported-by: Roman Jarosz Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41769 Signed-off-by: Chris Wilson commit 46f97127c22ea42bc8fdae59d2a133e4b8b6c997 Author: Chris Wilson Date: Sun Oct 16 21:40:15 2011 +0100 snb,ivb: Workaround unknown blitter death The first workaround was a performance killing MI_FLUSH_DW after every op. This workaround appears to be a stable compromise instead, only requiring a redundant command after every BLT command with little impact on throughput. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=27892 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=39524 Tested-by: Daniel Vetter Signed-off-by: Chris Wilson commit 71bf291e563ec5224777b4907a5347a3fbfe64c5 Author: Chris Wilson Date: Mon Oct 17 12:53:19 2011 +0100 sna/gen3: Micro-optimise gen3_rectangle_begin() We only need to emit the vbo description either at the beginning of a new op (when the state may have changed) or after finishing a full vbo. Signed-off-by: Chris Wilson commit a032feb2531439b9945d7ae1e0c2e3ab95a960e1 Author: Chris Wilson Date: Mon Oct 17 12:41:21 2011 +0100 sna/gen3: Store floats_per_rect alongside floats_per_vertex Moves a multiply out of the hot path. Signed-off-by: Chris Wilson commit 2cbe79b85b46796d561105afa980e7a52f4f1889 Author: Chris Wilson Date: Mon Oct 17 11:57:07 2011 +0100 sna/gen3: Improve reduction of render operator to blt Signed-off-by: Chris Wilson commit 606e18bd360d904a8aed01aef43644fb4a51d929 Author: Chris Wilson Date: Mon Oct 17 10:50:33 2011 +0100 configure: Add a check for pixman version As SNA requires a fairly recent release and calls directly into pixman. Signed-off-by: Chris Wilson commit 17acaf8e232a8bad9bc2c653a9fceb06f0f65f6b Author: Chris Wilson Date: Mon Oct 17 00:55:51 2011 +0100 sna: Defer CPU fallback if fb calls into mi If the fb routine does not access the pixel data directly, but instead calls into an mi routine, we can defer the readback and possibly avoid it. Signed-off-by: Chris Wilson commit c348b69f66cbe1cafc88396523da9768e1006889 Author: Chris Wilson Date: Sun Oct 16 18:23:33 2011 +0100 sna: Prefer to accelerate non-RENDER operations if already using the GPU Signed-off-by: Chris Wilson commit 6fdc9e3fd3f8defb7ad62de11f8cb069a10e5736 Author: Chris Wilson Date: Sun Oct 16 17:57:55 2011 +0100 sna: Simplify busy tracking by trusting the bo->gpu flag Signed-off-by: Chris Wilson commit 30dff81cd62b5fc5a28d5175a08c5a3ee09667bd Author: Chris Wilson Date: Sun Oct 16 17:41:34 2011 +0100 sna/accel: Upload source to GPU for !copy CopyAreas Signed-off-by: Chris Wilson commit eefa925e3d3e009b21ecc0b428d93a6c732bfa14 Author: Chris Wilson Date: Sun Oct 16 17:39:06 2011 +0100 sna/accel: Fall-forward for handling a non-copy CopyArea to a dst gpu bo Signed-off-by: Chris Wilson commit 01f41e624b31af88d433a25eaefce557e7ff3d62 Author: Chris Wilson Date: Sun Oct 16 17:38:26 2011 +0100 sna/gen2: Eliminate redundant diffuse and rectlist emission Signed-off-by: Chris Wilson commit d9e3dbffcb7e6cff35e10100d81544936813095a Author: Chris Wilson Date: Sun Oct 16 12:48:23 2011 +0100 sna/gen2: Fix fill-one-box Lets only have one special gen2 value for the source channel pixel colour and so remove the confusion and misrendering. Signed-off-by: Chris Wilson commit b89592b16e373da1fe259ad067f65ba95021dc49 Author: Chris Wilson Date: Sun Oct 16 19:39:14 2011 +0100 sna/gen7: Add missing tail to 3DSTATE_SBE I was a few NULs short of the declared amount. Signed-off-by: Chris Wilson commit 33f17b996dd0fcbb8e07875770e11571380d6509 Author: Chris Wilson Date: Fri Oct 14 12:01:34 2011 +0100 Remove a couple of trivial compile warnings for unused variables Signed-off-by: Chris Wilson commit e5e27528ffeb74f404823c678e04e847cf2109aa Author: Chris Wilson Date: Fri Oct 14 11:51:44 2011 +0100 sna/blt: Add a pair of operator reductions for opaque fills Extend the coverage of the BLT for a couple more composite operations, though they be relatively infrequent. Signed-off-by: Chris Wilson commit 3f5289b29962c3e5d94deb30782a156292d20053 Author: Chris Wilson Date: Fri Oct 14 11:31:46 2011 +0100 sna/trapezoids: Fallback if the composite operation is not supported Signed-off-by: Chris Wilson commit 3d79264ef8a8be225d9b13efd14f37a7478e6b1b Author: Chris Wilson Date: Fri Oct 14 11:31:00 2011 +0100 sna/tiling: Hook up composite_box Now used for spans and so triggering death by NULL function pointer on older chipsets. Signed-off-by: Chris Wilson commit f5f3135e3cc1f4740508773cfefca0954aed2fd3 Author: Chris Wilson Date: Fri Oct 14 10:40:39 2011 +0100 sna: Ensure that the scanout is flushed before we sleep So that we do not see any delayed rendering on i965+. Signed-off-by: Chris Wilson commit 020d84d2d09c71a8209dd774a0735a3c11cb148d Author: Chris Wilson Date: Thu Oct 13 22:32:00 2011 +0100 sna/accel: Fix sense of nothing-to-do due to clipping A missing not due to a hasty conversion from an assert. Signed-off-by: Chris Wilson commit b7fd6906c41e328649b97e16c42848a39f6e48f8 Author: Chris Wilson Date: Thu Oct 13 17:46:48 2011 +0100 sna/accel: Actually apply the clip to the glyph extents References: https://bugs.freedesktop.org/show_bug.cgi?id=41718 Signed-off-by: Chris Wilson commit eb5f86b78181b174664aaa9bc689db5421b7e7bd Author: Chris Wilson Date: Thu Oct 13 17:32:54 2011 +0100 sna/accel: Correctly offset the damage intersection for glyph runs Signed-off-by: Chris Wilson commit a4766026ad0aa14283e35598d33f13d311cc029b Author: Chris Wilson Date: Thu Oct 13 17:32:30 2011 +0100 sna/accel: Check for reloc overflow when adding a new glyph run Signed-off-by: Chris Wilson commit b10850af4125b8dbc36d13fa83f1dcce13ac6684 Author: Chris Wilson Date: Thu Oct 13 17:09:25 2011 +0100 sna/blt: Check for reloc overflow when initialising solid fills Signed-off-by: Chris Wilson commit d5242565ef17cb4265177338df5b564b960e3692 Author: Chris Wilson Date: Wed Oct 12 21:14:43 2011 +0100 sna/gen2: Trim some surplus state commands Signed-off-by: Chris Wilson commit 7c5020532335c07d9b0f6cecb0b004de4af6d273 Author: Chris Wilson Date: Wed Oct 12 20:36:53 2011 +0100 Remove vestigial includes from DRI1 Signed-off-by: Chris Wilson commit b6b3bb9b5e56949cbd9189d9857ffa1ff46377fd Author: Chris Wilson Date: Tue Sep 20 19:41:03 2011 +0100 sna: compare against the right array of cache buckets Fortunately harmless today as there are the same number of inactive/active buckets. Signed-off-by: Chris Wilson commit 1f70095837a30d6a88b9e313d3583d38ea55221d Author: Chris Wilson Date: Tue Oct 11 16:06:31 2011 +0100 sna: And free the clip after creation for PolySegments Signed-off-by: Chris Wilson commit 92f4d978c8b1f5e9a6cf3affa15d90bfb3d4e7b9 Author: Chris Wilson Date: Tue Oct 11 15:52:13 2011 +0100 sna: More micro-optimisation of messing around with clip regions Signed-off-by: Chris Wilson commit 57151f654752ed64716358ecb5e9217b59784da8 Author: Chris Wilson Date: Tue Oct 11 15:23:17 2011 +0100 sna: Micro-optimise checking for singular clip boxes Signed-off-by: Chris Wilson commit 823a4272c50247482428a16cb08741bf87a302ea Author: Chris Wilson Date: Tue Oct 11 13:51:41 2011 +0100 sna/gen3: Avoid RENDER/BLT context switch for fill boxes Signed-off-by: Chris Wilson commit 887361de173e082841453902089427447c5a158a Author: Chris Wilson Date: Tue Oct 11 13:51:25 2011 +0100 sna: Enable single fill fast path for PolySegment Signed-off-by: Chris Wilson commit 721cf30e9eeb0102c77f337332ad8259463b7fef Author: Chris Wilson Date: Tue Oct 11 13:28:45 2011 +0100 sna/accel: If the data is already on the GPU, use it for the source Fixes regression from 1ec6a0e2775 (sna: Move the source to the GPU if it is reused). Signed-off-by: Chris Wilson commit 15a4410cec111c3b3bd15ec33f29bc1f4cb709c1 Author: Chris Wilson Date: Tue Oct 11 13:28:30 2011 +0100 sna: use correct insertion point for sorting partials Signed-off-by: Chris Wilson commit a9b53c48774078d404149e86267c39eb82234c3a Author: Chris Wilson Date: Tue Oct 11 10:37:25 2011 +0100 sna: Mark the spans render functions as fastcall This reduces the amount of dancing required to call into the span functions as we can pass the arguments in both the integer and floating point registers. Signed-off-by: Chris Wilson commit 208fa8e6b88daf8446239a1a001a68ceb7d02e76 Author: Chris Wilson Date: Tue Oct 11 10:08:42 2011 +0100 sna/trapezoid: Perform the NULL check for damage in the caller Save the function call overhead in the common case. Signed-off-by: Chris Wilson commit 5050fead0ef81785a2a9be735852921463377e04 Author: Chris Wilson Date: Tue Oct 11 09:59:13 2011 +0100 sna/gen3: avoid applying zero offset to common spans Signed-off-by: Chris Wilson commit d0184b59095d5b8fab1a65ceba075d29189130d4 Author: Daniel Vetter Date: Sun Oct 9 18:43:14 2011 +0200 snb: implement PIPE_CONTROL workaround Sandybdrige requires an elaborate dance to flush caches without hanging the gpu. See public docs Vol2Part1 1.7.4.1 PIPE_CONTROL or the corrensponding code in mesa/kernel. This (together with the corresponding patch for the kernel) seems to fix the hangs in cairo-perf-traces I'm seeing on my snb machine. v2: Incorporate review from Chris Wilson. For paranoia keep all three PIPE_CONTROL cmds in the same batchbuffer to avoid upsetting the gpu. Signed-off-by: Daniel Vetter commit 4a2e833ab17e4facf0f90166b82a5696a1deef91 Author: Chris Wilson Date: Tue Oct 11 08:45:47 2011 +0100 sna/gen7: Add render support for fill one To prevent the RENDER to BLT transition and potential stall. Signed-off-by: Chris Wilson commit 41f525fab5a82c24adafc7e8c8409417d16a0e9a Author: Chris Wilson Date: Tue Oct 11 00:22:11 2011 +0100 sna/gen6: Add render support for fill-one-box Signed-off-by: Chris Wilson commit 5b6575bdded4b24ec1c9515203f44798225c10b6 Author: Chris Wilson Date: Mon Oct 10 16:39:02 2011 +0100 sna: Support a fast composite hook for solitary boxes Signed-off-by: Chris Wilson commit c5414ec992d935e10156a2b513d5ec2dded2f689 Author: Chris Wilson Date: Sun Oct 2 12:02:41 2011 +0100 sna: Use BLT operations to avoid fallbacks in core glyph rendering Signed-off-by: Chris Wilson commit 6b62b9d7c4301457a024f840383fb4515704ebdb Author: Chris Wilson Date: Tue Oct 4 19:30:06 2011 +0100 sna: Increase reserved space in batch to accommodate gen5 workaround Signed-off-by: Chris Wilson commit 6351d8eb823dbfffb4792af8592d1ce565211e23 Author: Chris Wilson Date: Tue Oct 4 19:29:46 2011 +0100 sna/gen[23]: Fix compilation with debugging enabled Signed-off-by: Chris Wilson commit 1ec6a0e27753027a68beeaff0276ae65c658d468 Author: Chris Wilson Date: Mon Oct 3 16:14:18 2011 +0100 sna: Move the source to the GPU if it is reused We attempt to skip upload a source pixmap to the GPU in the event it is used only once (for example during image upload by firefox). However, if we continue to use the CPU source pixmap then it obviously was worth uploading to the GPU. So if we use the CPU pixmap a second time, do the upload and then blit. Signed-off-by: Chris Wilson commit 413c9f7111c605a3842d4d0a85f8cf01470e5faa Author: Chris Wilson Date: Mon Oct 3 00:24:50 2011 +0100 sna/blt: Suppress repeated SETUP_BLT Signed-off-by: Chris Wilson commit 1067335305a6b8123217518085f70a77b7f0334f Author: Chris Wilson Date: Mon Oct 3 00:11:55 2011 +0100 sna/blt: SETUP_BLT needs 9 dwords of batch space, not 3! Signed-off-by: Chris Wilson commit d8c96a6a1d50cd3dd40fd4b78958c8f78337a2fb Author: Chris Wilson Date: Sun Oct 2 12:57:53 2011 +0100 sna/blt: Use SETUP_MONO to reduce the number of fill relocations Signed-off-by: Chris Wilson commit 4d227d43f0dfca1fa1822207d68539635aac37b3 Author: Chris Wilson Date: Sun Oct 2 12:03:21 2011 +0100 sna/accel: Correct syntax for constifying BoxPtr Signed-off-by: Chris Wilson commit 3dd80524160d6b6cf0fb668afcc766f2bc6f8383 Author: Chris Wilson Date: Sun Oct 2 09:59:03 2011 +0100 sna/accel: Only throttle after flushing Signed-off-by: Chris Wilson commit 04b8f0a5a16ff71c5e55e0281dbcaa32554703ec Author: Chris Wilson Date: Sun Oct 2 09:36:38 2011 +0100 sna/accel: Add a compile option to force flushing on every blockhandler Signed-off-by: Chris Wilson commit 32cef71efe231692f7b24f66913a8ae57bc00aa8 Author: Chris Wilson Date: Sun Oct 2 08:55:55 2011 +0100 sna/accel: Add an compile option to disable use of spans Using spans has a tremendous effect (~100x) on x11perf, some good but mostly bad. However, in reality operations are mixed and so preventing migration on alternate opertaions is a win. In the x11perf slowdowns, it appears to be CPU bound and so it seems like there should be plenty of scope for recovering the lost performance. However, for the time being, just go back to the old fallbacks. Signed-off-by: Chris Wilson commit dc1ec0dd1a5f66114ee4249309d3a283ad84d584 Author: Chris Wilson Date: Sat Oct 1 20:11:47 2011 +0100 sna/accel: Only disable the flush migitration if nothing changed Previously we ignored updating the scanout in place, and so we were not amoritizing the shadow cost of common core rendering operations. Signed-off-by: Chris Wilson commit c6acf1325833b8679ef09ab74f0cb0fd82a8cd92 Author: Chris Wilson Date: Sat Oct 1 11:26:54 2011 +0100 sna/accel: Micro-optimise sna_fill_spans_blt Signed-off-by: Chris Wilson commit 8029765515399b130bee18db0a2830eb83f47a07 Author: Chris Wilson Date: Sat Oct 1 11:19:49 2011 +0100 sna/accel: Don't attempt converting to spans if we will only fallback As the span code does not yet handle plane masks or stippling, it is disadvantageous to convert to spans only to fallback. Signed-off-by: Chris Wilson commit cd11bd69f4c1b961593886945946c7d7c9269900 Author: Chris Wilson Date: Sat Oct 1 10:45:18 2011 +0100 sna/accel: Use miPolyArc to convert arcs into spans for gpu bo This is actually tricker than it looks since miPolyArc() sometimes uses an intermediate bitmap which performs worse than the fbPolyArc() fallback. Signed-off-by: Chris Wilson commit d07256cc3360cf94d131d9a1b24d9f1c6a70ee04 Author: Chris Wilson Date: Sat Oct 1 10:42:45 2011 +0100 sna/accel: Convert segments into spans similarly to PolyLine Signed-off-by: Chris Wilson commit d09a229e32468c810f5056bfd0043f2fb68038d3 Author: Chris Wilson Date: Sat Oct 1 10:01:21 2011 +0100 sna/accel: Use the mi*Line routines to convert the line into spans for gpu bo Signed-off-by: Chris Wilson commit e7a662b92e3012735f7a3d72d4f7860ca61a3810 Author: Chris Wilson Date: Sat Oct 1 09:26:52 2011 +0100 sna: Sort partials by remaining space Signed-off-by: Chris Wilson commit 13b9b5d8d6b6f6db59fe2418270ac93d9b74436c Author: Chris Wilson Date: Sat Oct 1 09:23:41 2011 +0100 sna/io: Only mark the buffer as LAST if we know we will flush the IO Otherwise we can continue to batch up the data upload into larger buffers. Signed-off-by: Chris Wilson commit 7ecc6993b8c8205e5896ee87c14d6a76310c9aa7 Author: Chris Wilson Date: Fri Sep 30 16:11:05 2011 +0100 sna/gen6: Fix offset of Scan-Line-Compare register Reported-by: Frank Mariak Signed-off-by: Chris Wilson commit d8fe941bc245e24c83c417ccff5c57e83baac3f7 Author: Chris Wilson Date: Wed Sep 28 23:04:03 2011 +0100 sna: Check for request retires after every batch In the beginning, I did perform a retire after ever batch. Then I decided that it was too much CPU overhead for too little gain. On reflection, i.e. further benchmarking, we do see a performance improvement for recycling active buffers faster. Signed-off-by: Chris Wilson commit e74a39b45446e2c43df5419efc4a2e0e73275c45 Author: Chris Wilson Date: Wed Sep 28 14:47:33 2011 +0100 sna/gen7: Confusion reigns as trying to fix errors found by an outdated checker Signed-off-by: Chris Wilson commit 6395894ada6b9c14deb62814ccf55848eaa80527 Author: Chris Wilson Date: Tue Sep 27 23:26:33 2011 +0100 sna/gen7: Fix up a couple instances of my inability to count Signed-off-by: Chris Wilson commit a53538659d5e18cb5a7a7a7dbd460f35985183fd Author: Chris Wilson Date: Sun Sep 25 12:40:01 2011 +0100 sna/accel: Fix s/x/y/ typo in computing relative drawing coordinates Reported-by:Roman Jarosz Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41165 Signed-off-by: Chris Wilson commit 960688d1684dd062c345aa8df1ff4f105015f467 Author: Chris Wilson Date: Sun Sep 25 12:23:10 2011 +0100 sna/accel: Debug option to force CPU fallbacks Signed-off-by: Chris Wilson commit 4fd46b8bb7e7a104a0afa0e5dee92993e043ef57 Author: Chris Wilson Date: Sun Sep 25 10:02:02 2011 +0100 sna/glyphs: Add glyphs directly onto a client temporary buffer Signed-off-by: Chris Wilson commit 5154e281ed66334a8ff6342236c1203a1e4ac5a3 Author: Chris Wilson Date: Sun Sep 25 09:56:16 2011 +0100 sna/glyph: Avoid useless attempt at GPU glyph rendering to a1 destinations The actual bug is a little involved as we don't damage the temporary glyph mask correctly presuming that we only hit GPU paths. However, should we fail to prepare the composite operation that paints the mask on to the destination, things fail horribly. One particular example is that wine like to create its own temporary a1 buffer for the glyphs (which we render to via another temporary mask...) which triggers the delayed fallback and then sw compositing with a random buffer. Reported-by: Roman Jarosz Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41165 Signed-off-by: Chris Wilson commit 46fedf0cf1a413381109c1de34619e84ad614b8a Author: Chris Wilson Date: Sun Sep 25 09:38:43 2011 +0100 sna/kgem: Check all operation bo in a single amalgamation Signed-off-by: Chris Wilson commit ccf6547a8f1b77ddf4e79bdefe2a0878c0e9b256 Author: Chris Wilson Date: Sat Sep 24 23:16:57 2011 +0100 sna: Paranoid debug flush after every op (as well as before) Signed-off-by: Chris Wilson commit 02337600345951c0ea629db11f0484403a260991 Author: Chris Wilson Date: Sat Sep 24 23:03:52 2011 +0100 sna/gen5: Debug option to disable state caching Signed-off-by: Chris Wilson commit af4d3853ae8f834fbf2fc55fb2b397b3f7f17656 Author: Chris Wilson Date: Sat Sep 24 19:26:46 2011 +0100 sna/glyphs: Convert all sub-8bpp masks to a8 Signed-off-by: Chris Wilson commit c79e90da71ae58cb3804f8abaf0541350e47eb14 Author: Chris Wilson Date: Sat Sep 24 19:26:31 2011 +0100 sna: Add a debug option to disable caching Signed-off-by: Chris Wilson commit 6bbb88af096e054877409a54d0e0a4ccf5ee317e Author: Kenneth Graunke Date: Sat Sep 24 09:27:33 2011 +0100 Fix incorrect maximum PS thread count on IvyBridge I mistakenly set GEN7_PS_MAX_THREAD_SHIFT to 23; it's actually 24 on Ivybridge. Not only did this halve our thread count, it caused us to write 1 into a bit 23, which is marked as MBZ (must be zero). Furthermore, it made us write an even number into this field, which is apparently not allowed. Apparently we were just lucky it worked. Signed-off-by: Kenneth Graunke Signed-off-by: Chris Wilson commit 7f7f95abbf57e6e71f6a30d917f97c2f2bd6cea9 Author: Chris Wilson Date: Fri Sep 23 11:38:18 2011 +0100 sna/accel: Use the PolyFillRect to handle tiled spans Would be preferrable to duplicate the tiling logic. Leave the task of reimplementing XAA to another day! Signed-off-by: Chris Wilson commit 964c96b181e6b55f4de6a4011a5beb6cc2cac33d Author: Chris Wilson Date: Fri Sep 23 11:37:48 2011 +0100 sna/accel: Always subtract the enlarged region from the outstanding GPU damage Signed-off-by: Chris Wilson commit c68856f34653ac3e7af900dfbba41a108ffe119e Author: Chris Wilson Date: Fri Sep 23 11:35:50 2011 +0100 sna/accel: Only skip undamaging the GPU for reads Introduced with ac1b83240e5 (sna/accel: Simplify single pixel read-back) Signed-off-by: Chris Wilson commit 5913c90967091124e7c7b262782f0e99cf400eab Author: Chris Wilson Date: Thu Sep 22 17:13:20 2011 +0100 sna/accel: fix assert to include the offset of copy Signed-off-by: Chris Wilson commit 31857068026138fe5edd8656381fc1ae59d3058b Author: Chris Wilson Date: Thu Sep 22 17:12:53 2011 +0100 sna: move an assert Signed-off-by: Chris Wilson commit 61764af13aa3c770d19d51c8ad198cab8a5866f1 Author: Chris Wilson Date: Thu Sep 22 12:59:32 2011 +0100 sna/dri: Bump DRI2INFOREC_VERSION An intervening dri2 patch landed in the sever. Signed-off-by: Chris Wilson commit 12070b8eb1e98cb158802fff3e59f906b1547877 Author: Chris Wilson Date: Thu Sep 22 12:18:26 2011 +0100 sna/dri: Play with marking bo reusable Since we have no recycling of wc pages in the kernel, we try hard to recycle buffers in userspace to avoid GTT thrashing. This requires co-operation between DRI clients and X, which is sadly lacking and so we need to discard any buffer given out to a client after it is finished. We cheat slightly for page-flips and access to the scanout. A further compromise. References: https://bugs.freedesktop.org/show_bug.cgi?id=38732 Signed-off-by: Chris Wilson commit 902a0234191d77816259affe331339caaa9131d6 Author: Chris Wilson Date: Mon Sep 19 20:34:15 2011 +0100 sna: Use pot buckets for active cache On x11perf one of the major hotspots is the search through the active list for an object large enough to reuse as the target surface. We can eliminate that overhead by keeping those active objects in pre-sorted lists by size. Signed-off-by: Chris Wilson commit 7bb2c5c4d55560f7901fd8036cab164460f81edc Author: Chris Wilson Date: Mon Sep 19 19:12:46 2011 +0100 sna: Move an assertion to the point of import All the guesswork is so that when we require an inactive bo, we do actually get a buffer that is not currently on a GPU active list. For some unresolved reason, this assertion was firing when putting the buffer onto the inactive list - so just workaround the worrisome issue by delaying the check until use. Signed-off-by: Chris Wilson commit 686a5ec52c9ae475fac22c36fff18814372def71 Author: Chris Wilson Date: Mon Sep 19 18:14:05 2011 +0100 sna/trapezoids: Fix overflow during sorting of mono edge step We were tracking the 32bit value of the prev_x using only a 16bit variable, and so failing to sort the edges after advancing to the next scanline. Fixes cairo a1-clip-fill-rule. Signed-off-by: Chris Wilson commit 0390105bc239bf2ac22189f39fccc9d98bae4992 Author: Chris Wilson Date: Mon Sep 19 12:48:38 2011 +0100 sna: compile fixes for debugging Update the DBG messages to reflect changes in function parameters. Signed-off-by: Chris Wilson commit 7f0cba3a255eb9e76d56201b26d15f2d49134b58 Author: Paulo Zanoni Date: Fri Sep 16 18:56:00 2011 -0300 Remove useless assertion Removes 17 instances of: warning: comparison of unsigned expression >= 0 is always true Signed-off-by: Paulo Zanoni Signed-off-by: Chris Wilson commit 2d9effca142b1d82cd1a7ad3b7d2a61c4567801b Author: Paulo Zanoni Date: Fri Sep 16 18:53:01 2011 -0300 Fix "always false" conditionals Enums are unsigned by default in gcc and we can't rely on any specific signedess for the other compilers. i965_render.c: In function ‘i965_prepare_composite’: i965_render.c:2018:2: warning: comparison of unsigned expression < 0 is always false i965_render.c:2025:2: warning: comparison of unsigned expression < 0 is always false i965_render.c:2050:3: warning: comparison of unsigned expression < 0 is always false i965_render.c:2057:3: warning: comparison of unsigned expression < 0 is always false Signed-off-by: Paulo Zanoni [ickle: take advantage and rename the enum values] Signed-off-by: Chris Wilson commit 7bcd1d2b75d280cecfc23877bb13426a28c07a1f Author: Chris Wilson Date: Sat Sep 17 21:38:46 2011 +0100 sna: perform a warnings reduction pass Didn't spot anything that might have led to a genuine bug, but this should help improve the signal-to-noise ratio of warnings in the future. Signed-off-by: Chris Wilson commit a5b5b4ebb14cab19258dd1cbc12721aaa9df226d Author: Chris Wilson Date: Sat Sep 17 00:28:30 2011 +0100 sna: Apply the screen offset for direct upload of a composited pixmap Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38733 Signed-off-by: Chris Wilson commit daeb9291e22d94cd2f81b3b56418f0f879531da5 Author: Chris Wilson Date: Sat Sep 17 00:27:55 2011 +0100 sna/trapezoids: Ensure we do not overrun the vertical edges for mono Signed-off-by: Chris Wilson commit 481df2618af3c10877db0610c4cadf6fc509e72f Author: Chris Wilson Date: Sat Sep 17 00:27:32 2011 +0100 sna: Add debug option to force allocaiton of gpu-only pixmaps Signed-off-by: Chris Wilson commit 52f93c95465151d16f588d648a58b1f979e946a3 Author: Chris Wilson Date: Fri Sep 16 23:24:16 2011 +0100 sna/glyphs: Disable the glyph cache for debugging Signed-off-by: Chris Wilson commit c8a144d6f84a00a26785fd518cb890ad77edd45f Author: Chris Wilson Date: Fri Sep 16 22:56:36 2011 +0100 sna/glyphs: Correct offset of fallback-via-mask glyphs Under a compositing manager where we have fun values for both drawable->x/y and pixmap->screen.x/y, we were not drawing either the glyphs into the mask correctly and then failed to composite the mask in the right position on top of the pixmap. Signed-off-by: Chris Wilson commit 1eea2c4e60af535ac6500b1b62367f9f63f2a784 Author: Chris Wilson Date: Fri Sep 16 20:35:03 2011 +0100 sna: Can't free bo from the active list As the active bo is still referenced in the request list, we can not simply free it but need to wait for it to be purged on expiration. Signed-off-by: Chris Wilson commit d743c456db11bd3c0d21948dc3a2eb4b33e46342 Author: Chris Wilson Date: Fri Sep 16 20:34:33 2011 +0100 sna: Debug option to disable tiling Signed-off-by: Chris Wilson commit 8c35df4493c910ef62c66a411c14e5be3b26bcf0 Author: Chris Wilson Date: Fri Sep 16 20:33:57 2011 +0100 sna: Remove bad assert The caller intentionally violates this assert, so it is useless. Signed-off-by: Chris Wilson commit 72ca1fdf2fea80ff4cf003bb025424d15d8bac58 Author: Chris Wilson Date: Thu Sep 15 17:52:45 2011 +0100 configure: Introduce --with-builderstring Julien Cristau disliked my broadcasting of the git tree used to build his distribution package as it bore little relevance to his users. As it is only useful for people installing their own drivers (as a means of sanity checking that they are running the right driver), we introduce the --with-builderstring idiom borrowed from the xserver. This allows the builder to override the use of `git describe` and either leave it blank or to fill it with something useful for their own purposes. Signed-off-by: Chris Wilson commit 544a4167c156eac7b630f90ddef30a6f00829835 Author: Chris Wilson Date: Wed Sep 14 18:39:37 2011 +0100 sna/trapezoids: Amalgamate adjacent mono spans Signed-off-by: Chris Wilson commit 3565c48c4bb77c836d817de75d098791dbb529d3 Author: Chris Wilson Date: Wed Sep 14 17:45:41 2011 +0100 sna: Yet another s/x/y/ typo Every time I do a transformation into pixmap space I like to include one of these copy'n'paste errors. Reported-by: Paul Neumann Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40850 Signed-off-by: Chris Wilson commit 4d4aca21fd32a367d78dfaf1c23b4faeabe36428 Author: Chris Wilson Date: Wed Sep 14 13:06:26 2011 +0100 sna: assert that the memcpy upload path points to valid regions Signed-off-by: Chris Wilson commit 83961051789e418f6022096b1ed2302cb2f05e5b Author: Chris Wilson Date: Tue Sep 13 18:37:01 2011 +0100 sna/gen3: Reset the shader after playing video Another piece of state we zap without marking as dirty when playing video. Reported-by: Paul Neumann Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40842 Signed-off-by: Chris Wilson commit 34c03f22158d8fc1ec2fc56cb5e87f74e42d9a8f Author: Chris Wilson Date: Tue Sep 13 17:24:14 2011 +0100 sna: Clear the list of buffers upon server regen Or else we may try to clear the new framebuffer with an invalid batch, because it will reuse the same bo as last time and that bo may still think it is part of the old batch. Signed-off-by: Chris Wilson commit 831cdb837189e92aee80030dec553f28e53ba0bc Author: Chris Wilson Date: Tue Sep 13 17:09:38 2011 +0100 sna/debug: Assert that BLT commands on gen2/3 are properly fenced Signed-off-by: Chris Wilson commit a9242a77f0952d029be57d75615dd107af660de1 Author: Chris Wilson Date: Tue Sep 13 16:20:40 2011 +0100 sna: Add a couple of debug statements for why we may not flush the scanout Signed-off-by: Chris Wilson commit 0056bfd11e9930c1bcad6c186cd80fbab3694a8d Author: Chris Wilson Date: Tue Sep 13 14:44:48 2011 +0100 video: Stop advertising unsupported Xv attributes We have yet to implement a yuv-shader that applies contrast/brightness/saturation and so should not advertise such features, potentially allowing the client to fallback and perform the adjustments itself. Signed-off-by: Chris Wilson commit 84a7c11a8134dfd040d2f90bb1e0670aa2c89962 Author: Chris Wilson Date: Tue Sep 13 14:42:33 2011 +0100 sna/video: Stop advertising unsupported Xv attributes Signed-off-by: Chris Wilson commit a0d533ea8d098dbbd86af166de9c07ce67050c35 Author: Chris Wilson Date: Tue Sep 13 12:23:10 2011 +0100 sna/trapezoids: Implement a mono-rasteriser to skip opacity spans For mono-rasteriser we can simply emit the composite spans without requiring an opacity shader. For single trapezoids, it will be more interesting to emit triangles directly. However, we still need to compute the union of many trapezoids, and this builds upon existing code. Signed-off-by: Chris Wilson commit 343b99d2a85c520c81d1408534b2531fcbedfaae Author: Chris Wilson Date: Tue Sep 13 11:39:39 2011 +0100 sna: Reuse the smallest bo that fits the request When scanning the active list, pick the smallest that we can reuse. Signed-off-by: Chris Wilson commit 90071454d24e7230d00c49f5a897296298fc1f22 Author: Chris Wilson Date: Tue Sep 13 11:37:17 2011 +0100 sna: Don't clear the kernel-needs-flush flag if we emit a MI_FLUSH We need to mirror the kernel active lists in order to predict when it will stall upon an access to a bo, and so we cannot clear the needs_flush for our own MI_FLUSH. Signed-off-by: Chris Wilson commit 2deafe2d95d07b574f5a92471f7d7f13aebc790f Author: Chris Wilson Date: Tue Sep 13 11:34:43 2011 +0100 sna/accel: Use correct enum for requesting a write-buffer Signed-off-by: Chris Wilson commit 544b1a678d5bf49559d8422750866685c36cb152 Author: Chris Wilson Date: Tue Sep 13 11:34:25 2011 +0100 sna/gen5: Fix debug compilation Signed-off-by: Chris Wilson commit 6b1ed58d63e9ac80d7d028fa3036633436154816 Author: Chris Wilson Date: Mon Sep 12 19:07:25 2011 +0100 sna/gen5: Avoid bitfields for simple assignments commit 03a7fc16f9ef00ca5591655337621ec67bc37cba Author: Chris Wilson Date: Mon Sep 12 12:20:24 2011 +0100 sna: Avoid the call overhead for the trivial clip case Profile guided micro-optimisation. /o\ Signed-off-by: Chris Wilson commit 2540c877d4811b318e1c2cd707745e5b06c9fa4b Author: Chris Wilson Date: Mon Sep 12 11:54:46 2011 +0100 sna/gen6: Prefer RENDER for copies as it compacts better Signed-off-by: Chris Wilson commit f2a617dcc5fbeaf503db4777f0ec7b3d862085b9 Author: Chris Wilson Date: Mon Sep 12 11:54:02 2011 +0100 sna: Use single precision for computing the texcoord scale factor Signed-off-by: Chris Wilson commit c2e19987c333de31b258a3af37a2ed1f63ef949a Author: Chris Wilson Date: Mon Sep 12 10:37:24 2011 +0100 sna: Provide a direct lookup cache of alpha values To reflect recent changes in cairo. Signed-off-by: Chris Wilson commit 04c5a3df02f6f40a904ff4edb927ae6ff0ce6408 Author: Chris Wilson Date: Mon Sep 12 09:20:58 2011 +0100 sna: Fix compilation without timerfd() Based on the patch by Konstantin Belousov. Reported-by: Konstantin Belousov Signed-off-by: Chris Wilson commit ae887c9d1cb2a06c515e054b36464bcf65440f9f Author: Chris Wilson Date: Sun Sep 11 13:59:08 2011 +0100 sna/trapezoids: Prevent a memleak if feed lots of degenerate boxes Signed-off-by: Chris Wilson commit 72fafdfd374eb165e703b791c70592c47e5772fc Author: Chris Wilson Date: Fri Sep 9 23:15:58 2011 +0100 gitignore: add git_version.h Signed-off-by: Chris Wilson commit ac4d4cdbc1336c86a16a2ec3da2ef6e9842c1079 Author: Chris Wilson Date: Fri Sep 9 23:12:59 2011 +0100 sna: Mark the bo as reusable after extracting the handle from the buffer The whole purpose for that little dance was so that we could reuse the bo. However, we left it marked as non-reusable in order for us not to tie up memory with too many buffers and so defeated the purpose of trying to place it into the inactive cache. Signed-off-by: Chris Wilson commit b3429cf12d6e3e8dd89372f8f70c64205d835b0c Author: Chris Wilson Date: Fri Sep 9 18:09:55 2011 +0100 sna/gen3: Use a clear pattern for ill-defined radial gradients Signed-off-by: Chris Wilson commit b6837c21b459a99cb51b0d41906d82604e515dc0 Author: Chris Wilson Date: Fri Sep 9 14:57:09 2011 +0100 sna/gen5: Prefer BLT for solids And Ironlake also fails to live up to the promise that its GPU is fast enough to run simple programs at memory rates. x11perf -trap300 5x fold improvement. No obvious improvement elsewhere yet. Signed-off-by: Chris Wilson commit 27e42b4e1216099f4a6aa7fddeb1e83b87124b6e Author: Chris Wilson Date: Fri Sep 9 14:06:53 2011 +0100 sna: Prefer memcpy_blt over fbBlt We know we have compatible formats since we have a gpu_bo attached to the pixmap, so we can use the simpler direct memcpy rather than calling fbPutZImage/fbBlt. On my i3-330m, this improves putimage500 from 730 to 1100 ops/s. Reported-by: Michael Larabel Signed-off-by: Chris Wilson commit 2e1bf7e1b44db16d0c322f17535fc6a6fa07353b Author: Chris Wilson Date: Fri Sep 9 12:36:32 2011 +0100 sna: Record git-tree used for compilation Hopefully, I have all the dependencies correct for auto-updating and should continue to work with tarballs... The next step is to perhaps include it in the usual version number, perhaps as patch level? Signed-off-by: Chris Wilson commit f73cd955e760064f57f414dce5f39e43022e4ea6 Author: Chris Wilson Date: Fri Sep 9 11:37:32 2011 +0100 sna/trapezoids: Hook up Imprecise AddTraps in lieu of spans Signed-off-by: Chris Wilson commit adde6eab5d0e532633c864830f8edfa63b36ef4e Author: Chris Wilson Date: Thu Sep 8 23:35:33 2011 +0100 sna/trapezoids: Fast upload path for gpu busy bo Signed-off-by: Chris Wilson commit e9ca05331db9849fba39fbd0583db7052fc80a31 Author: Chris Wilson Date: Thu Sep 8 22:54:22 2011 +0100 sna/traps: Use the trapezoid path for AddTraps Usually this will be to CPU-only pixmap, but just on the off-chance that we are stalling for a GPU pixmap just the faster path developed for Trapezoids. Signed-off-by: Chris Wilson commit afdb8aa89a88c62ccd5e26a3ed9adb70fec310a8 Author: Chris Wilson Date: Wed Sep 7 20:10:02 2011 +0100 sna/gen3: Do not assume video updates are always vsync'ed In case the video is running async, then there may be subsequent instructions within the batch and so we do need to mark the clobbered state as dirty when setting up the video frame. Reported-by: Paul Neumann Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40693 Signed-off-by: Chris Wilson commit 6aee152cb8444bf63c0009a75c6537e9886b6070 Author: Chris Wilson Date: Sun Sep 4 12:57:17 2011 +0100 sna/gen2: Flush the batch when we run out of vertex space Unlike the later gen, we do not yet use a separate vertex buffer and so when can no longer fit a rectangle (and its CA ghost) we must flush the batch. Due to the duplication required for the CA pass, the normal checks to see whether we had sufficient space to add the new command were passing as they failed to take into account the need to submit the whole primitive again. Signed-off-by: Chris Wilson commit 48bfe4e6ded746f32080b83079235a7576f50d7a Author: Chris Wilson Date: Sun Sep 4 12:46:32 2011 +0100 sna/gen2: Improve batch decoder. Signed-off-by: Chris Wilson commit 2cda0aaf397de1a0ca049508c6fa76f2dd4e61e8 Author: Chris Wilson Date: Sat Sep 3 14:46:57 2011 +0100 sna/trapezoids: Check for alignment after projection If after projection onto the Imprecise fast sample grid, the trapezoid becomes a pixel-aligned box, treat it as such and send it down the fast paths. Signed-off-by: Chris Wilson commit db0fb368c135d4fef4ae993df67ed4610a80fd52 Author: Chris Wilson Date: Fri Sep 2 13:13:38 2011 +0100 sna: Add missing implementation for Triangles Feed both into spans and as a mask fallback. Signed-off-by: Chris Wilson commit 695e7115efab96c4467dc926be07dc2609011720 Author: Chris Wilson Date: Thu Sep 1 15:50:29 2011 +0100 sna/trapezoids: Edges may lie out of bounds We cannot assume that the edge lies completely within the target, so we must make sure that the initial prev_x is truly less than any possible value whilst sorting intersections. Signed-off-by: Chris Wilson commit 9a563ea03b6ad87d41bc091c5819e6c462100450 Author: Chris Wilson Date: Wed Aug 31 23:29:00 2011 +0100 sna: Use the shadow buffer for PutImage This is optimising for the x11perf putimage benchmark, but nevertheless, uploading the PutImage directly into the uncached scanout is between 2-20x slower than making a temporary copy in the shaodw buffer and doing a deferred update. Most of the overhead is in the kernel, and should be addressed there (rather than worked around) and a portion is due to the overdraw in the benchmark (which is not likely to be realistic, but then again neither should PutImage be!). The argument for uploading inplace when possible is that given that the buffer already exists on the GPU implies that is likely to be used again in future by the GPU and so we will be uploading it at some point. Deferring that upload incurs an extra copy. The putimage benchmark does not actually use the pixel data and so that extra cost is not being measured. Reported-by: Michael Larabel Signed-off-by: Chris Wilson commit 32fc0c896e0dfd06617c12beda1ccacedf69fb4a Author: Chris Wilson Date: Wed Aug 31 23:21:54 2011 +0100 sna/gen6: Prefer the BLT ring, except for copies on behalf of DRI As demonstrated by the all-important trap300, using the BLT is 2x faster than the RENDER ring for the simple case of solid fills. (Though note that performing the relocations costs 3x as much CPU for 2x GPU performance.) One case that may regress from this change is copywinpix which should benefit from the batching in the RENDER commands, and might warrant revisiting in the future (with realistic and synthetic benchmarks in hand!) However, due to the forced stall when switching rings, we still want to perform RENDER copies on behalf of DRI clients and before page-flips. Checking against cairo-perf-trace indicated no major impact -- I had worried that setting the BLT flag for some clears might have had a knock-on effect causing too many operations that could be pipelined on the RENDER ring to be sent to the BLT ring instead. Reported-by: Michael Larabel Signed-off-by: Chris Wilson commit 5586dd729b153e37f942a285d328a07f3fe7ae16 Author: Chris Wilson Date: Wed Aug 31 09:25:48 2011 +0100 sna/trapezoids: Refactor to project the trapezoid only once And doing so means that we can go back to using the common validity check. Signed-off-by: Chris Wilson commit 3507437cdba62c28772822cce8c4b656448546db Author: Chris Wilson Date: Tue Aug 30 22:13:24 2011 +0100 sna/trapezoids: Reject invalid traps after projecting onto the sample grid If either of the edges are degenerate on the sample grid, then the trap has zero height and must be skipped. (Otherwise if just one edge becomes degenerate than the polygon becomes unbalanced and the rasteriser will implode.) Signed-off-by: Chris Wilson commit 150a0612d545b7fd77bf393efdef1cc92ed91e61 Author: Chris Wilson Date: Tue Aug 30 19:45:22 2011 +0100 sna/trapezoids: Allocate sufficient space for a8 mask for mono traps Oops, a silly cut'n'paste from caused us to allocate an A1 pixmap for mono traps instead of the A8 pixmap that we tried to write to; mayhem ensued. Reported-by: Eugeni Dodonov Signed-off-by: Chris Wilson commit aafe03d3d1cfd5cbdf345cd51436de268ac27b6f Author: Chris Wilson Date: Mon Aug 29 16:47:48 2011 +0100 sna: Retain the GTT space used for an upload buffer In order to retain the GTT space without keeping hold of the memory used for the upload buffer, we have to create a new bo and copy the relevant details across. Signed-off-by: Chris Wilson commit 28c8c5ca14c5b4eab7e2dc58c87050c1019037bb Author: Chris Wilson Date: Mon Aug 29 16:27:35 2011 +0100 sna: Free the buffers immediately upon release They do not appear to have been leaked per-se, but we end up accumulating the unused buffers. A more complicated solution would be to reallocate the handle for retained buffers so that the GTT region can be reused. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=39184 Signed-off-by: Chris Wilson commit 4f2fc00944272243af343a8b99f6eb8e0dfda006 Author: Chris Wilson Date: Mon Aug 29 15:14:41 2011 +0100 sna: Cleanup up the cache upon close To help with leak-chasing under valgrind. Signed-off-by: Chris Wilson commit 0ac4b974b90a5614d1114d5e211cb4b986a89454 Author: Chris Wilson Date: Mon Aug 29 10:46:46 2011 +0100 sna/video: Defend against PutImage to a broken screen Similar to the previous commit, check that the Screen Pixmap is bound to a bo before proceeding. [Note that in this case, the absence of the bo would have been picked up much later after doing all of the setup...] Signed-off-by: Chris Wilson commit 0a74cd77a3f462d5d2707bf1f35663279bcb9be5 Author: Chris Wilson Date: Mon Aug 29 10:41:26 2011 +0100 video: check that the pixmap exists before use Now, the pixmap being used is meant to the Screen pixmap and by rights that has to exists in a GPU buffer! Evidence contrary to the above exists and so we had better check that we have a bo before using... Reported-by: Toralf Förster Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40439 Signed-off-by: Chris Wilson commit 8216c92d5c49d4b8de5c16b615bca0acece49a70 Author: Chris Wilson Date: Sun Aug 28 22:32:09 2011 +0100 sna/trapezoids: Use the tor scan converter to compute the low precision mask Take of the advantage of the faster mask computation available using the imprecise tor scan converter for chipsets non yet supporting spans. In doing so, limit the ability to full step only for vertical only rows as the small sample grid reduces the benefits of the computationally more expensive full-step. Signed-off-by: Chris Wilson commit aeee6db798e9ded746b399bc08716cff0bd16ef8 Author: Chris Wilson Date: Sat Aug 27 11:43:48 2011 +0100 sna/trapezoids: Reduce imprecise sampling to 4x4 Note this also revealed a subtle bug in the handling of degenerate trapezoids after shrinking to the raster grid. Signed-off-by: Chris Wilson commit ac1b83240e5d4dc5d5bacad3ed49446143cc5589 Author: Chris Wilson Date: Sat Aug 27 11:42:19 2011 +0100 sna/accel: Simplify single pixel read-back The single pixel case is usually assocated with synchronisation of perf clients and so we do not want to incur extra complication along that path. Also the cost of tracking a single pixel of non-damage outweighs its benefit. Signed-off-by: Chris Wilson commit 786a770f528a0daee2971494352672cb89f48384 Author: Chris Wilson Date: Thu Aug 25 19:52:13 2011 +0100 sna/video: Flush the video state at the end of the operation Or in the case where a second command is received prior to the batch being flushed, the vertex data is not flushed and leads to the a miscompution of the number of vertices emitted. Reported-by: Elias Probst Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=40332 Signed-off-by: Chris Wilson commit bd98001a49be061f0f2cb008b515f5505c8a63a4 Author: Chris Wilson Date: Thu Aug 25 14:49:30 2011 +0100 sna: Clear structures across server reset Signed-off-by: Chris Wilson commit 0865acb3ad03239ffdf8cbf3c9fc204b6c97121b Author: Chris Wilson Date: Thu Aug 25 12:47:27 2011 +0100 sna/dri2: Add some debug around the use of the Resource database Signed-off-by: Chris Wilson commit 98b67457caea583de50bff1b11a3c5a2bd694e26 Author: Chris Wilson Date: Thu Aug 25 12:45:43 2011 +0100 sna/display: Destroy shadow data Under certain circumstances the shadow can be destroy after being allocated but before being created. The pixmap is a NULL pointer at that time, but we know that its value should be data, so just use the data pointer instead. Signed-off-by: Chris Wilson commit b9ae4e7e71527f1cf2b6dd6890420da22a22fad9 Author: Chris Wilson Date: Wed Aug 24 21:38:28 2011 +0100 sna/gen3: reset blend state after applying CA pass Otherwise we use the stale value when rendering CA glyphs directly to the front-buffer and subsequent rendering have a tendency to become invisible. (Rendering via a temporary glyph mask has a fortunate side-effect of reseting sufficient state to force the re-emission of the blend state.) Signed-off-by: Chris Wilson commit ef52f6c8c3421a31552d5965c40b4d9cf68f6a5c Author: Chris Wilson Date: Wed Aug 24 11:04:28 2011 +0100 sna/render: allow CLAMP_TO_EDGE for outside samples of extract regions as well When clipping the sample region to the edge of the texture we can also allow the GPU to use CLAMP_TO_EDGE (as well as CLAMP_TO_BORDER) to emulate the RepeatPad mode of the parent texture. (Only the RepeatNormal, RepeatReflect need special treatment with regard to tiling that is not yet handled.) This fixes the recent performance regression due to a slight change in the fish benchmark that caused it to sample outside of the texture atlas for one of its little fish. Signed-off-by: Chris Wilson commit d330f3751e484d28293fc593a20375a31b068bc7 Author: Stefan Dirsch Date: Fri Jul 22 12:21:01 2011 +0200 Fix array size calculation for intel_pci_probe(). commit ccddff087df0c567c28416941b175be81190a1d3 Author: Chris Wilson Date: Mon Aug 8 00:42:21 2011 +0100 sna/trapezoids: Speedup tor rasteriser Faster sorts for the win. Signed-off-by: Chris Wilson commit bfbe36cfea76337689dd8a101ec03469f6d3553d Author: Chris Wilson Date: Thu Aug 11 01:08:49 2011 +0100 sna/gradient: Use a high-precision ramp for a color step rather than fallback Slightly less precise, but the difference should not be observable in practice... Signed-off-by: Chris Wilson commit 0e61e235bf7a926fd4e5b1f5a05b72dce4c450f3 Author: Chris Wilson Date: Wed Jul 13 22:55:31 2011 +0100 sna/damage: Take advantage of marking all-damaged Return early from adding new damage regions if we know that we have already marked it as all-damaged. Signed-off-by: Chris Wilson commit 3a81bb6bafdbd37802dab96b8f05173ec6701d7f Author: Chris Wilson Date: Tue Aug 9 09:42:40 2011 +0100 NEWS: 2.16.0 release Signed-off-by: Chris Wilson commit f4bbbd1dfe59031f864c7d2bbf7bb0252a3aa6a7 Author: Edward Sheldrake Date: Mon Aug 1 14:46:08 2011 +0100 Fix man page formatting Two option sections were not starting at the beginning of a new line. commit 63518c42234001ec96f638af5732c09079a3d682 Author: Chris Wilson Date: Mon Aug 1 13:36:28 2011 +0100 dri: Build fix for xserver-1.7.7 Back in the olden days before the introduction of dixRegisterPrivate(). Signed-off-by: Chris Wilson commit 7976f5144d42a03ccd027908252a600db2631054 Author: Chris Wilson Date: Sat Jul 30 09:21:36 2011 +0100 NEWS: 2.15.901 snapshot Signed-off-by: Chris Wilson commit 2cfb703bbe7ec043d443452f4fa94f06b1ff7266 Author: Chris Wilson Date: Sat Jul 30 09:23:22 2011 +0100 Fix typos for distcheck Signed-off-by: Chris Wilson commit 6f919264da69ed8bce6f2573629d89962a670783 Author: Chris Wilson Date: Sat Jul 30 09:00:06 2011 +0100 sna: Mark the stencil as untiled In reality, Mesa will be treating it as W-tiling, only we have no way of communicating that requirement to the kernel (as not only does the kernel not understand W-tiling, but also the GTT is incapable of fencing a W-tiled region.). Ported from Chad Versace's 3e55f3e88. Signed-off-by: Chris Wilson commit 326a84e832c43cc200a32e091b4e60b8b6a4a7c8 Author: Chris Wilson Date: Fri Jul 22 11:10:26 2011 +0100 sna: Port IVB acceleration code (Xrender + Xv) Based on the superlative work by Kenneth Graunke and Xiang, Haihao. Signed-off-by: Chris Wilson commit 10790921570fea21d6b2bcc07a0204ef315c9182 Author: Chris Wilson Date: Sat Jul 30 08:46:19 2011 +0100 sna: Include the pixmap size in the debug info for moving to cpu Signed-off-by: Chris Wilson commit 5691c8cdec2a5264b8552f096b4a34b97afe4ae5 Author: Kenneth Graunke Date: Thu Jul 14 10:14:53 2011 -0700 render: Enable RENDER acceleration on Ivybridge. Signed-off-by: Kenneth Graunke Acked-by: Eric Anholt Acked-by: Chris Wilson commit 0d92612b2a2782f80196a08eb9a17af906169f18 Author: Kenneth Graunke Date: Thu Jul 14 00:30:09 2011 -0700 render: Update pixel shader state for Ivybridge. Signed-off-by: Kenneth Graunke Acked-by: Eric Anholt Acked-by: Chris Wilson commit 7460ee73d1fd22e6b02ce125f11ac38efff743ce Author: Kenneth Graunke Date: Thu Jul 14 00:16:54 2011 -0700 render: Use Ivybridge variants for 3D pipeline setup. Signed-off-by: Kenneth Graunke Acked-by: Eric Anholt Acked-by: Chris Wilson commit e3a09608716c1dee2554e8fc26d6f77aeec684bd Author: Kenneth Graunke Date: Thu Jul 14 00:04:31 2011 -0700 render: Refactor to use newly shared pipeline setup code in i965_3d.c. Slightly generalize the shared SF and CC code to accomodate both. Signed-off-by: Kenneth Graunke Acked-by: Eric Anholt Acked-by: Chris Wilson commit 682a690bfeeabae710b1392282163eab35b58eed Author: Kenneth Graunke Date: Wed Jul 13 22:52:52 2011 -0700 Xv: Refactor out pipeline setup functions for future reuse in render. While we're at it, make the functions simply take an intel_screen_private pointer directly instead of having to fetch it from ScrnInfoPtr. Also coalesce some gen6/gen7 functions that were 98% identical. Signed-off-by: Kenneth Graunke Acked-by: Eric Anholt Acked-by: Chris Wilson commit 54b3222658a285d26b7800bdc5f8343c918a804e Author: Kenneth Graunke Date: Wed Jul 13 22:27:37 2011 -0700 render: Update 3DPRIMITIVE for Ivybridge. Signed-off-by: Kenneth Graunke Acked-by: Eric Anholt Acked-by: Chris Wilson commit 4e491a1f6d7a15009904cb79e2c0b13cf2d9d6ec Author: Kenneth Graunke Date: Wed Jul 13 22:19:21 2011 -0700 render: Set Address Modify Enable in 3DSTATE_VERTEX_BUFFERS on Gen7. Signed-off-by: Kenneth Graunke Acked-by: Eric Anholt Acked-by: Chris Wilson commit 2787cd66f0d2907110f774392370537df63a96fa Author: Kenneth Graunke Date: Wed Jul 13 22:10:17 2011 -0700 render: Update SAMPLER_STATE for Ivybridge. Signed-off-by: Kenneth Graunke Acked-by: Eric Anholt Acked-by: Chris Wilson commit 1a7e541d0d33727953fa69f1e29fa4eda665a0d9 Author: Kenneth Graunke Date: Wed Jul 13 21:53:27 2011 -0700 render: Update SURFACE_STATE for Ivybridge. Signed-off-by: Kenneth Graunke Acked-by: Eric Anholt Acked-by: Chris Wilson commit 07cc488bcf3f7653cd54928e3cedb1f4f102c5e0 Author: Kenneth Graunke Date: Sat Jul 9 01:36:52 2011 -0700 render: New Ivybridge assembly programs for render acceleration. These are exactly the same as the ones for Sandybridge, but with message registers translated (hopefully) in the same way as Haihao's new programs (m1 == g65). Signed-off-by: Kenneth Graunke Acked-by: Eric Anholt Acked-by: Chris Wilson commit 1b9e82b4b59dd50c1b057f58d71d5c04dcc648a7 Author: Chris Wilson Date: Tue Jul 26 08:29:36 2011 +0100 sna: Revert enabling scan-line wait on SNB Hanging the machine does indeed prevent video tearing. Just not quite what the user expected... Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=39497 Signed-off-by: Chris Wilson commit 6dbbb74bde034f5f00aee0396ccd1e03a6625fbd Author: Chris Wilson Date: Sat Jul 16 14:05:54 2011 +0100 sna: Enable gen6 scan-line waiting The code was ready and waiting, just forgot to turn it on. Signed-off-by: Chris Wilson commit 3e55f3e88b40471706d5cd45c4df4010f8675c75 Author: Chad Versace Date: Mon Jul 18 00:38:00 2011 -0700 dri: Do not tile stencil buffer Until now, the stencil buffer was allocated as a Y tiled buffer, because in several locations the PRM states that it is. However, it is actually W tiled. From the PRM, 2011 Sandy Bridge, Volume 1, Part 2, Section 4.5.2.1 W-Major Format: W-Major Tile Format is used for separate stencil. The GTT is incapable of W fencing, so we allocate the stencil buffer with I915_TILING_NONE and decode the tile's layout in software. This commit mutually depends on the mesa commit: intel: Fix stencil buffer to be W tiled Author: Chad Versace Date: Mon Jul 18 00:37:45 2011 -0700 Signed-off-by: Chad Versace Reviewed-by: Ian Romanick Acked-by: Kenneth Graunke commit 212fa9868767637e8f430485eeb522c99e63fd16 Author: Chris Wilson Date: Wed Jul 13 21:11:14 2011 +0100 Disable adding normal RTF modes for an eDP This is causing a hard hang with 2.6.39+, we don't know why so play safe and disable for the time being. References: https://bugs.freedesktop.org/show_bug.cgi?id=38012 Signed-off-by: Chris Wilson commit 7a695c9f6b919eba8785d62094526762ba2a0449 Author: Chris Wilson Date: Wed Jul 13 10:57:13 2011 +0100 sna: Fast-path single span boxes These are very common when compositing unclipped trapezoids, and the majority of the overhead is in handling the arbitrary number of boxes and misses out on the constant folding the compiler can do if it is known we have just one box. Signed-off-by: Chris Wilson commit 0190964906ad878d469d6021c10cde4e7f5799c3 Author: Chris Wilson Date: Wed Jul 13 10:26:44 2011 +0100 sna/damage: Avoid testing against a completey damaged region Signed-off-by: Chris Wilson commit b929717c89352d4b47dc2b9ce58e26fbbf327201 Author: Chris Wilson Date: Wed Jul 13 09:49:09 2011 +0100 sna/gen3: Tune emit_spans_primitive_constant Signed-off-by: Chris Wilson commit fbdbfaf38d4da5204750d91cf5a3f43307a6ac33 Author: Chris Wilson Date: Wed Jul 13 17:38:41 2011 +0100 sna/glyphs: Discard GLYPH_PICTURE hint if the glyph doesn't fit into the cache If the glyph is too big to fit into the cache, than ideally we do want to keep an associated GPU bo around for future use. As it is too large to fit into the cache, it of reasonable size and there is little wastage in allocating indiviual GPU bo for each oversized glyph. Signed-off-by: Chris Wilson commit 12f52530db1727e2f835e55dc922e5efaf4d3a16 Author: Chris Wilson Date: Wed Jul 13 17:38:22 2011 +0100 sna: Add some extra debugging to the texture upload fallback paths Signed-off-by: Chris Wilson commit a861094c23b5f0df7b889bcc03904e32c4c2c6be Author: Chris Wilson Date: Tue Jul 12 20:17:00 2011 +0100 sna/dri: Fix a couple of typos Somehow these were lost in the rebasing. Signed-off-by: Chris Wilson commit c221d0356db57c10f5d29ca17fdf592724b35385 Author: Chris Wilson Date: Tue Jul 12 15:39:42 2011 +0100 sna/dri: Remove the unused id/type members for Resource tracking ...and reduce it to a simple list. Signed-off-by: Chris Wilson commit 644b1a903301531e1fb59f27952c15e87888c4c6 Author: Chris Wilson Date: Tue Jul 12 11:50:24 2011 +0100 dri: Always initialise resource members of DRI2FrameEvent As we now attempt to always decouple the lists upon freeing the frame event, we need to initialise them along all code paths. Signed-off-by: Chris Wilson commit 32f42358140ee812984149ae52b0df3dfd1778c3 Author: Chris Wilson Date: Mon Jul 11 20:29:53 2011 +0100 sna/dri: Add some simple debugging Signed-off-by: Chris Wilson commit a46598220ebf5d4e629e1e0a7baf47ce144ed2c8 Author: Chris Wilson Date: Mon Jul 11 14:40:30 2011 +0100 sna/dri: Refactor common code for assigning a pixmap to the DRI2 buffer Signed-off-by: Chris Wilson commit 7538be3315b8683b05e8f6b22023baadcc0bc4da Author: Chris Wilson Date: Mon Jul 11 10:50:36 2011 +0100 dri: Enable triple-bufferred pageflips By popular demand. Triple-buffering trade-offs output latency versus jitter. By having a pre-rendered frame ready to swap in following a pageflip, we avoid the scenario where the latency between receiving the flip complete signal from the kernel, waking up the vsynced application, it render the new frame and then for the server to process the swap request is greater than the frame interval, causing us to miss the vblank. The result is that application can become frame-locked to 30fps. Instead, we report to the application that the first frame swap is immediately completed, supply a new back buffer (or else the rendering would be blocked on waiting for the front-buffer to be swapped away from the scanout) and let them proceed to render the second frame. The second frame is added to the swap queue, and the client throttled to vrefresh. (If the client missed the vblank, the swap queue is empty and the client is immediately woken again, whilst the pageflip is pending.) Note, for practical reasons this only applies to page-flipping, for example, calls to glXSwapBuffer() on fullscreen applications. Signed-off-by: Chris Wilson commit 2608a367acba7247e50754c3daeed09ba2e97d05 Author: Chris Wilson Date: Mon Jul 11 16:28:15 2011 +0100 dri: Prevent abuse of the Resource database The Resource database is only designed to store a single value for a particular type associated with an XID. Due to the asynchronous nature of the vblank/flip requests, we would often associate multiple frame events with a particular drawable/client. Upon freeing the resource, we would not necessarily decouple the right value, leaving a stale pointer behind. Later when the client disappeared, we would write through that stale pointer upsetting valgrind and causing memory corruption. MDK. Instead, we need to implement an extra layer for tracking multiple frames within a single Resource. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=37700 Signed-off-by: Chris Wilson commit ab1000821ae881a301fb0e1f2210493ec383e681 Author: Chris Wilson Date: Sat Jul 9 19:44:26 2011 +0100 dri: Remove the shadow copy of attachment Signed-off-by: Chris Wilson commit 9f22ea7ca440c788f8104647356393c96c62d155 Author: Chris Wilson Date: Sat Jul 9 14:54:33 2011 +0100 sna: Clamp results for computing BoxRec coords from xRectangle As the width/height in the rectangle is specified as uint16_t, the result may be larger than is storagable in the int16_t of the box. Of course it would take a really inane client to do attempt to draw something much larger than the largest possible surface... Is it strange that first example I've found to do so is a Java application? Reported-by: Nicolas Kalkhof Signed-off-by: Chris Wilson commit f4c5dc88171435aa04a5d99372913120cdafe92b Author: Chris Wilson Date: Sat Jul 9 14:17:24 2011 +0100 sna/accel: Fix fallback for depth=1 copy A little carelessness with passing down the offsets caused us to incorrectly copy depth=1 bitmaps, as exemplified by gkrellm. Reported-by: Nicolas Kalkhof Signed-off-by: Chris Wilson commit 649ebcef0938c7cde4f3172a639d39488454999a Author: Chris Wilson Date: Fri Jul 8 17:44:58 2011 +0100 sna: A buffer only needs a flush if it remains dirty at the end of the batch Signed-off-by: Chris Wilson commit 625e37b317e4d237bdc9f80d7ab86b5d2badddc7 Author: Chris Wilson Date: Fri Jul 8 18:58:32 2011 +0100 sna/gen3: So we also need to ensure stippling is cleared... My theory that we used nothing that invoked polygon stippling proved baseless. Fixes regression from 3b5971bd2359383cb8326702d80e03bc15d34c69 Signed-off-by: Chris Wilson commit 1e2cae0ab339e477929e429f8ff31b11fcaf2cbf Author: Chris Wilson Date: Fri Jul 8 09:54:43 2011 +0100 sna/gen3: Restore disabling the use of stencil/fog in the invariant One cleanup too far causing spurious results after rebooting. We also need to ensure that the writemask is fully enabled (ie not disabled) as well. Signed-off-by: Chris Wilson commit ec3dd64e739c4c2bbd8141de5275fe8a90f24a57 Author: Chris Wilson Date: Fri Jul 8 00:17:27 2011 +0100 sna/dri: Enable chaining of page-flips Trade off extra frames of latency for extra frames of anti-jitter buffering and loss of completion information; compiz users rejoice. Signed-off-by: Chris Wilson commit a32694b0f07e35c22dd83bcfb828196d5d86628e Author: Chris Wilson Date: Thu Jul 7 23:11:39 2011 +0100 sna/dri: Remove redundant NULL check in reference The buffer has already been dereferenced by this point... Signed-off-by: Chris Wilson commit d180c5f5f781f4fa7f747dd7bb8073a20771cd79 Author: Chris Wilson Date: Wed Jul 6 20:19:00 2011 +0100 sna: Take advantage of the needs_flush tracking on the front buffer Signed-off-by: Chris Wilson commit 0be47f459ba576ed3f93367de18732fb2367357a Author: Chris Wilson Date: Wed Jul 6 13:02:53 2011 +0100 sna: Check against an execbuffer reference before discarding partials Signed-off-by: Chris Wilson commit f6573fe7577e00a1d2706dbc39179ab658c021d2 Author: Chris Wilson Date: Wed Jul 6 12:44:08 2011 +0100 sna: Compute aligned tiled heights for gen2 correctly We were underestimating the height of X-tiled surfaces (and less harmfully overestimating the height of Y-tiled surfaces.) Signed-off-by: Chris Wilson commit d6afd66461ebcdc2e8dcd94b3f46f374d8acf469 Author: Chris Wilson Date: Tue Jul 5 23:12:59 2011 +0100 sna: Reset unused partial buffers Whilst searching for available space on the active partial buffer list, if we discover an unreferenced one, reset its used counter to zero. Signed-off-by: Chris Wilson commit 6e7a0c86419bf6c928837f592784333c25d8b27b Author: Chris Wilson Date: Tue Jul 5 23:05:37 2011 +0100 sna: Discard unused partial buffers If we allocate a partial buffer and then fallback for the operation, the buffer would remain on the partial list waiting for another user. Discard any unused partials at the next batch submission or expiration point. Signed-off-by: Chris Wilson commit 3b5971bd2359383cb8326702d80e03bc15d34c69 Author: Chris Wilson Date: Tue Jul 5 22:20:28 2011 +0100 sna/gen2: Restore invariant ENABLES One deletion too many, unnoticed until the next reboot. Besides the failure to disable logic op and enable colour buffer blending which causes a hang if you subsequently try to enable both, you also need to request texture caching... Signed-off-by: Chris Wilson commit 5fa3e73f2c03bcadb87c1760f76f853c22fdba18 Author: Chris Wilson Date: Tue Jul 5 21:38:08 2011 +0100 sna/gen[23]: Do as the comments suggest and prefer the BLT Signed-off-by: Chris Wilson commit f749ed618e21b56a36a2feb9b4333ec797ec2ae5 Author: Chris Wilson Date: Tue Jul 5 21:37:02 2011 +0100 sna: Reduce tiling if pitch is less than a tile_width/height only on pre-G33 (Note this only applies to 2D pixmaps.) The rationale, borne out by experimentation with cairo-perf-trace, is that on the pre-G33 devices we always need a fence region region for tiled surfaces, i.e. at least .5/1MiB in size, and that combined with the smaller GTT on those devices, we loose the benefit of tiling to the excessive GTT thrashing. Signed-off-by: Chris Wilson commit b9de6a98d33db660ffad3f186c2b0ab2aea71ac0 Author: Chris Wilson Date: Tue Jul 5 17:48:11 2011 +0100 sna: Remove unused aperture_size member Signed-off-by: Chris Wilson commit fd3bc2af471a3f9a73064cb28818fdd3485cffc7 Author: Chris Wilson Date: Mon Jul 4 16:31:20 2011 +0100 sna: Clamp object size to the min of 1/4 of the whole GTT or 1/2 the mappable ... for those pesky early devices whose GTT was no larger than the AGP aperture. Signed-off-by: Chris Wilson commit d294e41a6a49ddaa6f8d7d5cda266168095fe1f5 Author: Chris Wilson Date: Mon Jul 4 13:45:06 2011 +0100 sna: Update flush/retirement lists after a implicit flush for mmap Signed-off-by: Chris Wilson commit 3e53b0f3a365c031bfef8d087bcee0ae1c2d2988 Author: Chris Wilson Date: Mon Jul 4 13:44:28 2011 +0100 sna: Enable relaxed-fencing for gen2 devices (Just as dependent upon non-buggy kernels as gen3...) Signed-off-by: Chris Wilson commit 33ddaf54299979e98b196d479f1b2060d9551cc5 Author: Chris Wilson Date: Mon Jul 4 13:43:48 2011 +0100 sna: Fix gen2 tiled surface sizes Actually use the gen2 path for gen2 devices! Signed-off-by: Chris Wilson commit 9eceddf69f78fc79c02ca75ed10b000beeff2033 Author: Chris Wilson Date: Mon Jul 4 13:42:58 2011 +0100 sna/gen2: fix batch buffer acounting Signed-off-by: Chris Wilson commit 3f80f7edb8c511b94e66159cd59ba9362c3f69a2 Author: Chris Wilson Date: Sat Jul 2 23:16:04 2011 +0100 sna: Manually set to the GTT domain for mmap ...since the kernel no longer does strict coherency. Signed-off-by: Chris Wilson commit f91ee24b2dabb48288d6e81dcdd82191f158e312 Author: Chris Wilson Date: Sat Jul 2 23:05:04 2011 +0100 sna: Trim number of downsample passes If we can fit the entire width or the entire height into the pipeline when downsampling, do so. Signed-off-by: Chris Wilson commit 6db93720a73f59a9857a3c5ab260fab8b957813e Author: Chris Wilson Date: Sat Jul 2 23:04:14 2011 +0100 sna: Don't change tiling modes on replace This was trying to workaround a kernel bug, and instead causes a performance cliff for textures that *need* to be tiled. Signed-off-by: Chris Wilson commit 430c905ef306ece8a4cb19091711a9feae74b00b Author: Chris Wilson Date: Sat Jul 2 18:24:40 2011 +0100 sna: Force tiled modes for large pitches If the surface is so big that the 2x2 texel sampling will cause a TLB miss everytime, i.e. the row pitch exceeeds 4096, then we need to encourage tiling to prevent attrocious performance. For example, try downscaling a 2560x1600 background image on a gen3 device using I915_TILING_NONE... Using slideshow-demo /usr/share/backgrounds/cosmos/whirlpool.jpg, on a PineView netbook, fps goes from under 4 to over 40. Signed-off-by: Chris Wilson commit ae567b783e5af53f17f49dbf58b9be17fcb53737 Author: Chris Wilson Date: Sat Jul 2 00:11:21 2011 +0100 sna: Finer-grained debugging for trapezoids Signed-off-by: Chris Wilson commit 98f2e3855d70c02b05e2721a70ebce0c17e44283 Author: Chris Wilson Date: Sat Jul 2 09:53:11 2011 +0100 sna/video: Downgrade severity of "overlay not found" message We don't need to warn the user that their hardware does not support the video overlay plane (but Jesse is working on it!), but merely inform them that its presence is lacking. Signed-off-by: Chris Wilson commit 01c258718e981f4da949a4e48595a0660d55d66e Author: Chris Wilson Date: Fri Jul 1 23:17:54 2011 +0100 sna/gen2: Add missing stub debug files Signed-off-by: Chris Wilson commit 5c8a108d2c99f542372efb1734c96ddd2af6bc76 Author: Chris Wilson Date: Fri Jul 1 21:24:43 2011 +0100 sna/gen2: Recompute blend pipeline for component-alpha pass Signed-off-by: Chris Wilson commit 121511d3bd63da5eca28edf971aae3d062aed46e Author: Chris Wilson Date: Fri Jul 1 16:54:28 2011 +0100 sna/gen2: Pack solid sources into the default diffuse component Signed-off-by: Chris Wilson commit a303f85c163979276ff13e00b7c56f55b5fd1d07 Author: Chris Wilson Date: Fri Jul 1 16:27:11 2011 +0100 sna/gen2: Remove unused state from invariant setup ... and also some state that gets clobbered when we install the composite pipelines. Signed-off-by: Chris Wilson commit 120c98ac10435c8e848a8337c1f544f81a05cd3a Author: Chris Wilson Date: Fri Jul 1 14:55:44 2011 +0100 sna: Downsample sources 2x too large to fit in the 3D pipeline This is quite trivial to hit given the 2k limits on gen2/gen3. We compromise on image quality by pre-downscaling the source by a fixed factor to make it fit into the pipeline in preference to performing the entire operation on the CPU. Signed-off-by: Chris Wilson commit f6c8c3bb6fd75bca6c7704b7d5869a5d44ce3832 Author: Chris Wilson Date: Fri Jul 1 11:17:32 2011 +0100 sna/gen2: Use specular component for solid spans Signed-off-by: Chris Wilson commit de14e3c8595f9e315dc3ce23ad15b04e118499f4 Author: Chris Wilson Date: Fri Jul 1 09:58:27 2011 +0100 sna/gen2: Add missing render fallbacks for blt ops Signed-off-by: Chris Wilson commit ecbf6bbd27b1205dcf76cfe34ae2a7a3f5ec195a Author: Chris Wilson Date: Fri Jul 1 08:50:58 2011 +0100 sna/gen2: Implement composite-spans Signed-off-by: Chris Wilson commit c89b37d7b43c9e588097b7fadcba3bc13a03f8bc Author: Chris Wilson Date: Thu Jun 30 17:53:49 2011 +0100 sna: Mappable aperture is region 0 on gen2 Signed-off-by: Chris Wilson commit c0434ab49035bf278dad6f5f84a541ea58536fb4 Author: Chris Wilson Date: Thu Jun 30 16:31:28 2011 +0100 sna: Distinguish 830/845 vs 855/865 using the generation id Remove the PCI ID device checks by using the simpler check on the generation id for errata pertaining to 830/845. Signed-off-by: Chris Wilson commit 18d08e49d270b7a05f14a309759c9315e5ab9679 Author: Chris Wilson Date: Tue Jun 28 20:25:46 2011 +0100 uxa/glyphs: Fallback instead of crashing on large strings Not ideal, but being slow is a major improvement over losing data. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36860 Signed-off-by: Chris Wilson commit 95866bd6bdaeb612732fd43ec1b93e088763086e Author: Chris Wilson Date: Mon Jun 27 21:07:22 2011 +0100 sna/video: Use EXTEND_PAD to avoid mixing in the border color ...which is 0 and appears green around an unaligned YUV-video. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38723 Signed-off-by: Chris Wilson commit 7446b39f04306ae2ffccdfe8dd6c8bda64a27043 Author: Chris Wilson Date: Mon Jun 27 15:26:49 2011 +0100 sna: Disable XVideo using the TexturedAdapter if the GPU is wedged Signed-off-by: Chris Wilson commit 44cd6ebf43aa5b7f23c03629a11cdf83b6e96e3a Author: Chris Wilson Date: Sun Jun 26 18:41:20 2011 +0100 sna: Typo in debug assertion. Signed-off-by: Chris Wilson commit 5cd7f5b59857f221bd3aa9965b43b938ff7824ed Author: Chris Wilson Date: Sun Jun 26 18:36:05 2011 +0100 sna/dri: Mark the GPU bo as damaged upon a page-flip ...so that CPU pixmap is correctly invalidated for the next readback. For instance, if you were to take a screenshot on a composited destkop. Reported-by: Sitosfe Wheeler Signed-off-by: Chris Wilson commit c4f7959266571f14c43c0f0cea69134bb8556875 Author: Chris Wilson Date: Sun Jun 26 14:09:11 2011 +0100 sna: Only create bo up to half the size of the mappable aperture As we use GTT mappings if writing directly into the tiled buffer and the available aperture is reported by the kernel as the total GTT and not limited to the fenceable/mappable region, we need to manually probe this value and ensure that our creation and fenced routines observe this distinct limit. Signed-off-by: Chris Wilson commit 130350111720a0e4ae825bb9d21a8c481cd2b548 Author: Chris Wilson Date: Sat Jun 25 23:21:20 2011 +0100 sna/dri: Reorganise schedule_swap to not confuse immediate and wait paths Eeek, the wait-for-target-msc was using the immediate swap path, meaning that for copy-swaps the copy was submitting immediately but the client throttled waiting upon the target vblank. What is actually intended is for the presentation to be delayed until the target_msc. Signed-off-by: Chris Wilson commit b460b9645451af84136c5daebbc00c7545de67f4 Author: Chris Wilson Date: Sat Jun 25 16:34:15 2011 +0100 sna/dri: Fix composited copy-swaps The secret is not to cheat and render directly to the front buffer, but remember to mark the Window as damaged. Signed-off-by: Chris Wilson commit 28fffbd1d07890c8b4d697369159f6a30f267675 Author: Chris Wilson Date: Sat Jun 25 16:33:31 2011 +0100 sna/display: Protect against drmModeGetCrtc returning NULL Signed-off-by: Chris Wilson commit 2c73b4651a04390668c3ed2aa10699663e44fd8a Author: Chris Wilson Date: Sat Jun 25 16:32:30 2011 +0100 sna/gen4+: Use the drawable rectangle offset for copy boxes Saves a little bit of work whilst emitting the rectangles. Signed-off-by: Chris Wilson commit 3833ff967766b0b99f1d636c6453de1783a90586 Author: Chris Wilson Date: Sat Jun 25 14:02:50 2011 +0100 sna: Correct typo in computing damage of PolyPoint Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=38614 Signed-off-by: Chris Wilson commit 471115a9806162bf0cafe27947f49d94fdd63d87 Author: Chris Wilson Date: Fri Jun 24 13:32:45 2011 +0100 sna: Also allow BLT copies to discard the alpha channel Signed-off-by: Chris Wilson commit c3b1a0d7046a83b6daec03e5a562116e3adf3c71 Author: Chris Wilson Date: Fri Jun 24 12:19:09 2011 +0100 sna/dri: Copy to real front upon swap The front-buffer of a DRI2 drawable, may not in fact be pointing to the scanout pixmap. So override the destination for swapbuffers to update the scanout. Signed-off-by: Chris Wilson commit 669378cd8db8af89d12f1b95a07fc1ead0b1569c Author: Chris Wilson Date: Fri Jun 24 11:53:17 2011 +0100 sna: Wrap the fbcon in a scratch pixmap for render-copy across depth changes Signed-off-by: Chris Wilson commit 33b2ea0392fe944b210ef744398aa22989bfdf33 Author: Chris Wilson Date: Fri Jun 24 11:43:07 2011 +0100 sna: Avoid using the BLT to copy between mismatching depths We either conflated bpp (which fails given a mixture of depth-24 and depth-30 pixmaps) or neglected to check at all. Signed-off-by: Chris Wilson commit 28f6dc24d3c50aa399dd098a9ba6a18a95837800 Author: Chris Wilson Date: Fri Jun 24 11:24:59 2011 +0100 sna: Support depth-30 and some more logging to show the depth Signed-off-by: Chris Wilson commit 312460ea69792594fe9acca8591ead55baea7d99 Author: Xiang, Haihao Date: Thu Jun 23 00:20:03 2011 +0800 Xv: set up pipeline for Xv on Ivybridge The configuration is same as that on Sandybridge, but many state commands are changed Signed-off-by: Xiang, Haihao commit 90a0800588f83d78254136b94bca656c4c24215d Author: Xiang, Haihao Date: Tue Jun 21 14:14:38 2011 +0800 Xv: upload new shaders to GEM objects for Xv on Ivybridge Signed-off-by: Xiang, Haihao commit 00614f712b243a7724cf919f94d204a123d2789a Author: Xiang, Haihao Date: Thu Jun 23 00:09:21 2011 +0800 Xv: update SURFACE_STATE & SAMPLER_STATE for Xv on Ivybridge SURFACE_STATE & SAMPLER_STATE are changed since Ivybridge Signed-off-by: Xiang, Haihao commit 70f884772a3adc5dbf56572499c5fb2e080aa84a Author: Xiang, Haihao Date: Thu Jun 23 00:02:38 2011 +0800 Xv: New shaders for Xv on Ivybridge Redefine some M4 macros, also update the check for intel-gen4asm to support Ivybridge Signed-off-by: Xiang, Haihao commit 3cf423bd3a9483181e59ee87376a9487fa1f923d Author: Xiang, Haihao Date: Wed Jun 22 23:33:08 2011 +0800 Xv: separate fragments from M4 macros It is to prepare for Xv on Ivybridge. The difference from Sandybridge is that all message payload must be in GRF registers instead of MRF registers on Ivybridge. We will only redefine some M4 macros for Ivybridge Signed-off-by: Xiang, Haihao commit 58d7a89b93ba4022f45465e479d2799b8903137a Author: Chris Wilson Date: Fri Jun 24 00:35:30 2011 +0100 sna: Don't render to invalid surfaces Fixes a regression from d0362a. In bypassing the is_wedged checked, we also ended up bypassing the checks that we could indeed render to the target bo. With the result that we were creating GPU buffers for SHM surfaces, something that requires Xserver fixes before we can actually enable... Signed-off-by: Chris Wilson commit 3c1d5bc35e02dfd8234c029dcab5661e1656ca8e Author: Chris Wilson Date: Fri Jun 24 00:34:11 2011 +0100 sna: Clip the fbcon to the frontbuffer ...both to correct the placement of the fbcon into the smaller scanout and to ensure that we correctly clip the boxes to be copied. Signed-off-by: Chris Wilson commit e3b4c10f239f69e5282bde1d3b0c3685b24cf0aa Author: Chris Wilson Date: Thu Jun 23 20:54:28 2011 +0100 sna: Relent and workaround the lack of O_NONBLOCK on /dev/dri/card0 So in order not to block server shutdown, check that the fd is readable before attempting to read from it. Signed-off-by: Chris Wilson commit 33d3077266942b23c5bc05ef4a9a6cebe357272a Author: Chris Wilson Date: Thu Jun 23 15:53:45 2011 +0100 sna: Debug compile fix, and some extra comments Signed-off-by: Chris Wilson commit 03e6aee8fd2cc7486fbd2ec55a537c712786486b Author: Chris Wilson Date: Thu Jun 23 15:51:59 2011 +0100 sna: For an unbounded op, we need to convert the whole surface Otherwise if we fail to check, then we create a 0x0 surface to sample with the operation -- net result is that we end up using a clear source instead of the desired mask. Signed-off-by: Chris Wilson commit 356ded1308e8fe5f8dbec217b219228a991356d5 Author: Adam Jackson Date: Wed Jun 22 17:17:15 2011 -0400 Don't include xf86Priv.h I'd like it to not be in the SDK anymore, and we're not using anything from it. Signed-off-by: Adam Jackson Signed-off-by: Chris Wilson commit 8fb98e22a63a4354b049ace7870abb6406541c28 Author: Jian Zhao Date: Wed Jun 22 08:54:59 2011 +0800 configure: Define required_xorg_xserver_version later so it can make successfully. commit ea71133da78632d4cfee5b0b4c96e8dddd6cdf44 Author: Chris Wilson Date: Tue Jun 21 12:28:13 2011 +0100 sna/video: Use pwrite for upload of unclipped, unrotated frames Signed-off-by: Chris Wilson commit 2f6afb5b1f02cc448da1b342627108ceddda4f0d Author: Chris Wilson Date: Mon Jun 20 17:29:17 2011 +0100 sna: Only reduce gpu damage after migration Otherwise we end up doing work for no reason, ala the regression in grads-heat-map. However, it is important that the damage is reduced at some point or else it may grow unbounded. Hopefully normal usage will never hit the pathologocial case... Signed-off-by: Chris Wilson commit 88d840b53d64e67cfee14cc4cef8da46d716c401 Author: Chris Wilson Date: Mon Jun 20 15:22:57 2011 +0100 sna/gen4: Check for sufficient batch space before emitting pipelined pointers For the broken shader workaround, we need to reset the pipeline state before every blt as the state is changed by the magic CA pass. So we need to check that we actually have sufficient space to emit the pipelined pointers before doing so. Signed-off-by: Chris Wilson commit 84bd6e51199bf8b49e6f6e0c29a1d71c89f6996f Author: Chris Wilson Date: Mon Jun 20 15:22:00 2011 +0100 sna/gen4: Correct the number of dwods required to emit the ca pass We need 7 for pipelined pointers, 6 for the primitive and 1 for the flush. Signed-off-by: Chris Wilson commit 22255335e428cb1f349fe4198d36e0ab3fe06948 Author: Chris Wilson Date: Mon Jun 20 13:51:12 2011 +0100 sna: Don't perform a GPU copy of the scanout if it is wedged. Signed-off-by: Chris Wilson commit e2684498a4905b4ac157a1c752c1c4f75301e7ad Author: Chris Wilson Date: Mon Jun 20 13:50:43 2011 +0100 sna: Add some debugging asserts for handling wedged GPUs Signed-off-by: Chris Wilson commit d0362a20bb3ead2fab9401b63209f917bdd72d55 Author: Chris Wilson Date: Sun Jun 19 19:33:01 2011 +0100 sna: Bypass the gpu-is-wedged? check for forced bo creation In order to attach a scanout (and use swrast) on a wedged GPU, we need to bypass the safety checks for normal pixmap creation. Signed-off-by: Chris Wilson commit 585667c2f9f88554ed89ff21ae38600f761d964c Author: Chris Wilson Date: Sat Jun 18 15:52:22 2011 +0100 sna: Bump the required xserver version to 1.10 SNA requires some pending bug fixes to the xserver so it makes little sense to conditionalise the code and deliberately cause broken behaviour. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=3843 Signed-off-by: Chris Wilson commit de0286ed9f7814f903d56e488c7a4b3eb0ca56b0 Author: Chris Wilson Date: Fri Jun 17 09:40:53 2011 +0100 sna/display: After copying the fbcon, tell the server that we have a background ... so that the core knows to skip the clear. Signed-off-by: Chris Wilson commit f3869d60cc3bc349d1efba642baa011378f1c09b Author: Chris Wilson Date: Fri Jun 17 09:37:15 2011 +0100 sna/display: Apply damage for the fbcon copy ... so that any immediate shadow usage will read back the fbcon contents. Signed-off-by: Chris Wilson commit 39f0b0ae17d00402971bb62555d3807bdf39ee93 Author: Chris Wilson Date: Thu Jun 16 23:49:06 2011 +0100 sna: Copy the fbcon contents onto the front buffer upon X startup This patch has been carried by the distributions every since they started doing graphical boot splashes. Time to integrate it and give it some TLC. Signed-off-by: Chris Wilson commit 37ba33f502af0878f6cb75f890c9fe288d0f7e41 Author: Chris Wilson Date: Fri Jun 17 07:03:25 2011 +0100 sna: Fix kgem_create_from_name error paths and to mark the bo as non-reusable Signed-off-by: Chris Wilson commit 665bc1735748f266fad5255f82c40edc59ef98e5 Author: Chris Wilson Date: Fri Jun 17 07:00:54 2011 +0100 sna/display: Remove the caching of the drmModeCrtc We only use it for the id. Everything else stored on it, like the buffer_id, is not permanent and we need to query the current status as required. Signed-off-by: Chris Wilson commit ad6235cfb11a5dfdd27106ac45106aaacba73bde Author: Chris Wilson Date: Thu Jun 16 19:02:36 2011 +0100 sna/accel: convert BOX_ADD_RECT to an inline function Signed-off-by: Chris Wilson commit a86f43988c4ded10cc3b1b964668300c9aa3af59 Author: Chris Wilson Date: Thu Jun 16 19:00:09 2011 +0100 sna/accel: convert BOX_ADD_PT to an inline function Signed-off-by: Chris Wilson commit f67a26590aadac8b9b9870ae3b03d23eb7eda1a2 Author: Chris Wilson Date: Thu Jun 16 18:58:38 2011 +0100 sna/accel: convert TRIM_AND_TRANSLATE_BOX to an inline function Signed-off-by: Chris Wilson commit df1b117dedfdda425fbc3e4ee394169902df4716 Author: Chris Wilson Date: Thu Jun 16 18:57:38 2011 +0100 sna/accel: convert TRANSLATE_BOX to an inline function Signed-off-by: Chris Wilson commit 76ff3c715cf6059316d08217e7e7783ca0388393 Author: Chris Wilson Date: Thu Jun 16 18:56:24 2011 +0100 sna/accel: convert TRIM_BOX to an inline Signed-off-by: Chris Wilson commit e4a66368e71df288323fce66b27237f1d9f93c3a Author: Chris Wilson Date: Thu Jun 16 18:55:03 2011 +0100 sna/accel: convert CLIP_BOX to an inline function Signed-off-by: Chris Wilson commit d7b51cc5d6e624a72b2f2fb92b4488e49a1c749c Author: Chris Wilson Date: Thu Jun 16 18:52:56 2011 +0100 sna/accel: convert BOX_EMPTY macro to an inline function Signed-off-by: Chris Wilson commit 1c3c08e80f08adb12a03277a60c4a56115281743 Author: Chris Wilson Date: Thu Jun 16 18:37:43 2011 +0100 sna: Fix the typo in BOX_EMPTY BOX_EMPTY(&box) surprisingly compiles and generates interesting code that evaluates to if (0). Oops. Signed-off-by: Chris Wilson commit 17bf0019b6962c06c87a08e4b41799481eaccd26 Author: Chris Wilson Date: Thu Jun 16 14:26:06 2011 +0100 sna: Only retire requests after IO if the bo was active We only want to process retirements if we know we caused a stall waiting for the GPU to release the bo before performing IO. Signed-off-by: Chris Wilson commit b707f18d17564653a2b45adf46a4e8eafcc6ab2c Author: Chris Wilson Date: Thu Jun 16 14:16:06 2011 +0100 sna: Purge the bo cache only if we detect aperture thrashing Signed-off-by: Chris Wilson commit 855ced5a4eb67e287001ae22cb6489639c548cfa Author: Chris Wilson Date: Thu Jun 16 13:24:14 2011 +0100 uxa: Remove the attempt to use the 3D pipeline for core rendering The attempt was still ridden with bugs, such as http://bugs.freedesktop.org/show_bug.cgi?id=28768 http://bugs.freedesktop.org/show_bug.cgi?id=28798 http://bugs.freedesktop.org/show_bug.cgi?id=28908 http://bugs.freedesktop.org/show_bug.cgi?id=29401 A fresh approach was taken with SNA, but in the mean time before that can be enabled downstream, restore correct behaviour. Signed-off-by: Chris Wilson commit dd4ad11e0d432f3a8eff4574a241c16f8463278d Author: Chris Wilson Date: Thu Jun 16 12:53:22 2011 +0100 sna: compile fix. A pox on all those who write trivial patches, attempt to compile on a system not having dri2proto and just assume that all is good. Signed-off-by: Chris Wilson commit 2ff36af7e1841a82fd43a9317d07b3229a309df5 Author: Chris Wilson Date: Thu Jun 16 11:23:16 2011 +0100 sna/accel: Prevent initialising a region with an invalid box pixman complains if you attempt to use a region created with an invalid box, so don't do that. Reported-by: Reinhard Karcher Signed-off-by: Chris Wilson commit 3c02110052ecf69d43577ed8537a8850227da560 Author: Chris Wilson Date: Thu Jun 16 10:30:58 2011 +0100 sna/dri: Add some comments to explain the choice of flags upon the bo Signed-off-by: Chris Wilson commit 881f961a1c78e554e566ef624d6edcf28fee8fdf Author: Chris Wilson Date: Wed Jun 15 19:11:05 2011 +0100 sna: Clear the gpu flag once is not busy and no flush is pending Signed-off-by: Chris Wilson commit a1ee4b930846d4ba9274028c08800b882fc926f1 Author: Chris Wilson Date: Tue Jun 14 23:46:15 2011 +0100 sna/dri: And fix the blit swap paths Following on the recent successes with the pageflip paths. Signed-off-by: Chris Wilson commit 2f675cf402a6d158448a9300779829a10ca991fd Author: Chris Wilson Date: Tue Jun 14 08:13:58 2011 +0100 sna: Split zaphod across the crtcs Since we have no global resource allocator for zaphod mode, that's what RandR-1.4 solves, we have to further constrain zaphod mode to only use one crtc per screen. This also means that you must match the output restrictions within the Screen definitions, noting that the crtc pipe id corresponds with the screen number. Reportede-by: Phillp Haddad Signed-off-by: Chris Wilson commit 49f265915a4bca52724c345f04cddfeaca972655 Author: Chris Wilson Date: Tue Jun 14 07:59:50 2011 +0100 sna: Compile fix for debugging enabled Signed-off-by: Chris Wilson commit 12b8a62652e219de255fdd8b3c801c23274130e9 Author: Chris Wilson Date: Mon Jun 13 20:51:56 2011 +0100 test: Exclude the long running stress tests from make distcheck tinderbox complains when it is left running for days on end... Reported-by: Jeremy Huddleston Signed-off-by: Chris Wilson commit 4173ca344bb7d3fb7c03ebdce0e31aa82dba1192 Author: Chris Wilson Date: Mon Jun 13 22:31:55 2011 +0100 sna: Invalidate the mode if the front pixmap was swapped whilst blanked Signed-off-by: Chris Wilson commit 2158534421f26bcd1eca9ad74ab7a30f27e47a75 Author: Chris Wilson Date: Mon Jun 13 15:27:23 2011 +0100 sna/dri: Accurately track front and pending front for async flips By not tracking the front buffer correctly, i.e. performing the exchange on every swap, GL_FRONT was no longer pointing at the updated buffer and neither was the root pixmap. So both X and GL would read the wrong buffer was the flip was pending. The other issue was that we would feed the old front buffer back to the application as a future back buffer (due to buffer caching) and so the kernel would duly insert a WAIT_EVENT for the pending flip to complete before allowing rendering to affect it. Signed-off-by: Chris Wilson commit 2facaa910798c0e7adb34345e6d6913849b7d8a3 Author: Chris Wilson Date: Mon Jun 13 11:46:04 2011 +0100 sna/dri: Complete the pending async flip even after DrawableGone If the client exits before the async page-flip completes then we still need to decrement the pending flip count in order to correctly flip the scanout next time. Signed-off-by: Chris Wilson commit 86888723901030c5cb9da16cbb03508d4b13332f Author: Chris Wilson Date: Sun Jun 12 22:38:01 2011 +0100 sna: Just do a pointer exchange when flipping with no scanout Signed-off-by: Chris Wilson commit b881d1b16a8beec024ac18eca8308418e34cb05d Author: Chris Wilson Date: Sun Jun 12 20:13:26 2011 +0100 sna: Check that the scanout is still attached before waiting for scanline Signed-off-by: Chris Wilson commit bb08e73c557c379ef131225ffea5aa729ca781d6 Author: Chris Wilson Date: Sun Jun 12 20:07:20 2011 +0100 sna: Prevent tracking scratch pixmaps on older xservers Before the xserver is patched to send notification of release of the scratch pixmaps, we cannot associated GPU resources with them. In practice, the only advantage for doing so is for SHM pixmaps... Signed-off-by: Chris Wilson commit ff262aca9c46b7616c59d8e8f04d33a5bbc6e324 Author: Chris Wilson Date: Sat Jun 11 10:15:14 2011 +0100 sna/dri: Fix tripple-buffering for vblank_mode=0 Signed-off-by: Chris Wilson commit b199bc2b415fd0f06e456e0b1f44dd25ba8dbe02 Author: Chris Wilson Date: Sat Jun 11 09:57:46 2011 +0100 sna/dri: Skip querying current msc for immediate swaps Signed-off-by: Chris Wilson commit 5f4dbcc8bde3690668bde739ac61178037612475 Author: Chris Wilson Date: Sat Jun 11 09:06:50 2011 +0100 sna/dri: Queue page-flips immediately for next vblank Signed-off-by: Chris Wilson commit 00e8b4bec6dc5bb46e6f073af9c1fa34f4a2c2c9 Author: Chris Wilson Date: Sat Jun 11 09:00:16 2011 +0100 sna/dri: For offscreen, swaps just exchange the buffers Signed-off-by: Chris Wilson commit e9397b28eff5be4cd5e8a2ceca80333424f24391 Author: Chris Wilson Date: Sat Jun 11 08:54:04 2011 +0100 sna: Process dri wakeups first The goal is to minimise the latency in receiving the event from the kernel and acting upon it. Signed-off-by: Chris Wilson commit bcad5b21fef4573f3144608364cf5b1ea6d241e3 Author: Chris Wilson Date: Fri Jun 10 21:27:38 2011 +0100 sna: Unbreak configure after last commit I went a step too far... I still need some define in order to switch between uxa/sna at compile time. Signed-off-by: Chris Wilson commit d0d65940b4f4d4993eccb8c66ec7e8b633b331da Author: Chris Wilson Date: Fri Jun 10 19:51:12 2011 +0100 sna: Remove the ability to disable chipset specific code This was a fun little, but pointless, exercise. Signed-off-by: Chris Wilson commit 6f035e80b98e478ff4c59427e50e57ecd710da62 Author: Chris Wilson Date: Fri Jun 10 18:41:56 2011 +0100 sna/dri: Keep reference on swap buffers until the end of the pageflip Signed-off-by: Chris Wilson commit cf6c7901825bb831443615ef21555c5843184bdb Author: Chris Wilson Date: Fri Jun 10 17:49:13 2011 +0100 sna: Use the ScreenPixmap->serialNumber as a generation count DRI2 presumes that the pixmap->serialNumber can be used as unique id. If it changes revokes *all* the buffers, it presumes a new pixmap has been attached to the window, for example after a reconfiguration event (resizing of a window, or a mode switch). However, as we updated the root pixmap upon a pageflip, we were triggering revocations everytime, causing further revocations and massive aperture thrashing. Signed-off-by: Chris Wilson commit 3f19270d6795738b58d9ce1721896b3067b38c9f Author: Chris Wilson Date: Fri Jun 10 15:29:57 2011 +0100 sna/dri: Actually restrict pageflipping to properly aligned fs windows Signed-off-by: Chris Wilson commit 9e9c628708ae838e5df3df89331243f84b297e8e Author: Chris Wilson Date: Fri Jun 10 15:17:18 2011 +0100 sna/dri: Create pixmap suitable for the framebuffer for fullscreen buffers Signed-off-by: Chris Wilson commit b22de0b01453884d5018e7e0faef439421fa63a0 Author: Chris Wilson Date: Fri Jun 10 13:30:54 2011 +0100 sna/blt: Suppress overwriting boxes through fill_boxes() As the introduction of the unrolled fill_boxes() was bypassing the effective optimisation in fill_one(). Signed-off-by: Chris Wilson commit ebeebc2044610e6e31d9cef746c768d2e435f32c Author: Chris Wilson Date: Fri Jun 10 13:07:13 2011 +0100 sna: Use temporary for storing the current crtc box when computing best crtc ... as the caller may be reusing an input parameter for the result. Signed-off-by: Chris Wilson commit b3949d0d7424242703c9e60e2e33908499aa6a43 Author: Chris Wilson Date: Fri Jun 10 12:45:24 2011 +0100 sna/kgem: remove erroneous assert during submit This was only valid for gen6+ with the multiple rings. Signed-off-by: Chris Wilson commit 33abb68da2c49081f28898f93cc4e14702b40d70 Author: Chris Wilson Date: Fri Jun 10 12:44:56 2011 +0100 sna/kgem: remove redundant clears upon initialisation Signed-off-by: Chris Wilson commit cfde920a2e449efaa387850173e46f87d928023b Author: Chris Wilson Date: Fri Jun 10 11:27:04 2011 +0100 sna: Remember to decouple the fb on closing ... so that we actually attach a new one after regen! Signed-off-by: Chris Wilson commit b6192ce95af8aa8be6d9a68a500393f2a73c2f4c Author: Chris Wilson Date: Fri Jun 10 11:05:41 2011 +0100 sna/gen4: Tweak calculation of required batch space for CA Signed-off-by: Chris Wilson commit c9b89fc87f1d43a715cd9c5915bfed957175986d Author: Chris Wilson Date: Fri Jun 10 10:53:29 2011 +0100 sna: Drain the event queues before CloseScreen Signed-off-by: Chris Wilson commit ea560e25dfcce3750339b477a1a3c05f504cf91e Author: Chris Wilson Date: Fri Jun 10 10:44:27 2011 +0100 sna: Workaround the random free of the ScreenPixmap in fbCloseScreen Signed-off-by: Chris Wilson commit 1f364c6d241e8971e8fc1447871c718240e4563e Author: Chris Wilson Date: Fri Jun 10 10:03:01 2011 +0100 sna: Reset the kgem state on server regen Signed-off-by: Chris Wilson commit 95ae39a93467655b2107b82bd7970f732c8de066 Author: Chris Wilson Date: Fri Jun 10 09:57:22 2011 +0100 sna: Add some debug statements to the core DDX interface Signed-off-by: Chris Wilson commit 0594724dc4e9e459240b8b290ddf42ed711be22b Author: Chris Wilson Date: Fri Jun 10 08:18:07 2011 +0100 sna/gen4: Restore normal state after CA pass and FLUSH_EVERY_VERTEX By working around the broken shaders, we emitted the CA rectangle in the middle of a sequence of glyphs and left the state setup for CA. So we need to reset the pipeline state at the start of every composite blt. Signed-off-by: Chris Wilson commit 2dff681efe1b89ffe59e5d33979c6e059b72a786 Author: Chris Wilson Date: Fri Jun 10 08:23:19 2011 +0100 sna/blt: Remove a couple of unused members from its op-state Signed-off-by: Chris Wilson commit fbbd1c9dde3b2fafd8aaebb88daf3c546d86e5a4 Author: Chris Wilson Date: Fri Jun 10 08:22:00 2011 +0100 sna/glyphs: Fix glyphs to dst fallback path commit 3f46c34d534e389f541b5c7987b78981c556d868 Author: Chris Wilson Date: Fri Jun 10 08:20:12 2011 +0100 sna/composite: Tweak setup for the minimal composite extents Clip the operation extents before passing to the backend to setup the operation, so that we only need to upload the minimum amount of data necessary, or avoid tiling etc. Signed-off-by: Chris Wilson commit a34caf1e3ded03dca53bbea3432dcd45101460fd Author: Chris Wilson Date: Thu Jun 9 20:45:18 2011 +0100 sna/gradient: Check solid busy status not current domain We can write into the bo if it has no outstanding requests, whereas we were checking to see it was last on the gpu instead. Signed-off-by: Chris Wilson commit 1638a0a6c0b335dd31def93a9199f7407ae51170 Author: Chris Wilson Date: Thu Jun 9 16:00:30 2011 +0100 sna/dri: Add a comment to warn about a potential race between DRI clients Signed-off-by: Chris Wilson commit 4b54c89fbddc7aa72e5f2c5eded44e84bce70b77 Author: Chris Wilson Date: Thu Jun 9 15:53:11 2011 +0100 sna: Place the pixmap on the DRI dirty list after damaging the shadow copy In order that we remember to flush the contents back to the GPU before we wake up the DRI clients, we need to add those dirty pixmaps to the flushing list. I caught the obvious place, the central move-to-cpu, but I missed a couple of paths were we optimise the copy onto the shadow. Signed-off-by: Chris Wilson commit 190a6786563aadd69f63bb7b509f3edf712e81ef Author: Chris Wilson Date: Thu Jun 9 15:13:17 2011 +0100 sna: Periodically reduce the gpu damage (after migrating any cpu damage) This will prevent the gpu damage list from growing unbounded. Signed-off-by: Chris Wilson commit 38d084ee6241527193ba08c6600b6734e1833118 Author: Chris Wilson Date: Thu Jun 9 14:53:34 2011 +0100 sna: Move !kgem->wedged check down into kgem_can_create_2d Signed-off-by: Chris Wilson commit d1a3bb1467429310f5d17bf6afbf2eeb043ae64d Author: Chris Wilson Date: Thu Jun 9 14:51:49 2011 +0100 sna: Prefer inactive buffers when creating a bo for a dirty pixmap As we will immediately attempt to replace it with an inactive when moving the data to the GPU, short-circuit that replacement. Signed-off-by: Chris Wilson commit 8ee53cc7449de7df294f49d089ff1d6b2e944323 Author: Chris Wilson Date: Thu Jun 9 13:05:19 2011 +0100 sna: Debugging compile fix Still not enough coffee this morning. Signed-off-by: Chris Wilson commit 6f59d7d19053fed4e9d6402a5f03bc8a62cb56af Author: Chris Wilson Date: Thu Jun 9 12:59:59 2011 +0100 sna: Use --enable-debug=full to enable extremely verbose debugging Signed-off-by: Chris Wilson commit 021209d5d3add8b28143611cfad4c5481a2945a3 Author: Chris Wilson Date: Thu Jun 9 10:27:12 2011 +0100 sna: Remove the stubs from sna_render.c These only existed to work around an include order problem, when kgem was intended to be entirely separable from sna. Moving the function pointer into kgem simplifies matters. Signed-off-by: Chris Wilson commit 6141b1aea159759e7e9dcf2561deb9d8c02bd0a2 Author: Chris Wilson Date: Thu Jun 9 10:06:08 2011 +0100 sna: Warn after detecting a hung GPU ...and include the instructional error message from uxa. Signed-off-by: Chris Wilson commit 1786d2ee03a190ebe242ac7b58bed7cc31d66b16 Author: Chris Wilson Date: Thu Jun 9 09:48:57 2011 +0100 sna/accel: Add debug messages for falling back due to a wedged GPU Signed-off-by: Chris Wilson commit 4d509d501b09f565fea232947e6f53d54a08749f Author: Chris Wilson Date: Thu Jun 9 01:03:16 2011 +0100 sna: Tweak retiring old bo As we check for retirement everytime we wakeup, it is seldom useful to check again until we know we have invoked an operation that may block. But when we do check, we do not want to scan the entire active list looking for flushing candidates, so track those on a separate list. Signed-off-by: Chris Wilson commit 17be5e2eb41b2ada94954b87c855961003c2fc7c Author: Chris Wilson Date: Thu Jun 9 00:38:29 2011 +0100 sna: Reduce the frequency of the timer interrupts Signed-off-by: Chris Wilson commit d0b09f10242e09adfddbbe6ee1ea39dbf5d1b32d Author: Chris Wilson Date: Wed Jun 8 20:34:57 2011 +0100 sna: Make the device fd non-blocking So that we can simply query it from each of the Zaphod instances without blocking. Requires a fixed kernel... Signed-off-by: Chris Wilson commit 67ed14c5369cfd967f90e5a3e6053c95a48dd16e Author: Chris Wilson Date: Wed Jun 8 19:42:02 2011 +0100 sna/dri: Set bo=NULL to actually detect unknown dri attachment points. Signed-off-by: Chris Wilson commit 68755bc5ff830dc5ed6a34b18a1217b7d1003ce4 Author: Chad Versace Date: Wed Jun 8 18:34:02 2011 +0100 sna/dri: Add support for DRI2BufferStencil and DRI2BufferHiz Based on Chad's commits 2662db5b and 3daba7e6: Signed-off-by: Chris Wilson commit 0030c3aab6172cdb83ca8f1b7b07c7db5915990d Author: Chris Wilson Date: Wed Jun 8 18:31:12 2011 +0100 sna/dri: Drop support for old dri2 versions with incompatible ABI Signed-off-by: Chris Wilson commit 715d466ad44e82b740f5454c41db944863420596 Author: Chris Wilson Date: Wed Jun 8 13:32:59 2011 +0100 sna/dri: valgrindify Lots of scary warnings found by valgrind. Signed-off-by: Chris Wilson commit a62db5b050dee10246c02c72385358acb5e72b56 Author: Chad Versace Date: Mon May 23 14:23:54 2011 -0700 dri: Add support for DRI2BufferStencil and DRI2BufferHiz And bump configure.ac to require dri2proto >= 2.6, because DRI2BufferStencil and DRI2BufferHiz were introduced in that version. When a client requests DRI2BufferHiz or DRI2BufferStencil, I830DRI2CreateBuffer() now returns a Y-tiled buffer. The stencil buffer is handled as a special case due its quirky pitch requirements. CC: Eric Anholt CC: Ian Romanick CC: Kristian Høgsberg Signed-off-by: Chad Versace commit 263daba7e6afb37bd471fdc8dd8e4458da0a45ff Author: Chad Versace Date: Sun Jun 5 19:48:19 2011 -0700 dri: Do not create DRI2 buffers for unrecognized DRI2 buffer tokens Before this commit, if a client were to request an unrecognized DRI2 buffer, such as DRI2BufferStencil, then I830DRI2CreateBuffer() allocated and returned an X-tiled buffer by accident. The problem was that unrecognized tokens were caught by the default case of a switch statement. Now, when given unrecognized DRI2 tokens, I830DRI2CreateBuffers() returns null. This shouldn't break older Mesa versions, because they never query (via DRI2GetBuffersWithFormat) for the drawable's DRI2BufferStencil. CC: Eric Anholt CC: Ian Romanick CC: Kenneth Graunke CC: Kristian Høgsberg commit 038f29c259c1463c0bff12f5f8f0b228c02e45b3 Author: Chris Wilson Date: Tue Jun 7 19:16:01 2011 +0100 sna/blt: Flush batch before overwrite surface data A left-over from before the surface was embedded into the tail of the batch, we were only checking for room against the total size of the batch buffer. So under the wrong set of circumstances we ended up overwriting surface data with batch and triggering a GPU hang on gen4+. Signed-off-by: Chris Wilson commit 265d94e0aa46b30a3198893544dd3619cc9145de Author: Chris Wilson Date: Tue Jun 7 14:23:51 2011 +0100 sna: Add zaphod support Zaphod support is a rudimentary method for creating an Xserver with multiple screens from a single device. The Device is instantiated, with a duplication of its resources, as many as required up to a maximum of the number of its outputs, and each instance is attached to a Screen and added to the ServerLayout. A Device can be bound to a selection of outputs using a comma separated list of RandR names. Note: in general, this is not the preferred solution! And will be superseded by per-crtc-pixmaps in RandR-1.4. For example, the following xorg.conf fragment creates an XServer with two screens, one attached to the LVDS panel on the laptop, and the other to any external output: Section "Device" Identifier "Intel0" Driver "intel" BusID "PCI:0:2:0" Option "ZaphodHeads" "LVDS1" Screen 0 EndSection Section "Device" Identifier "Intel1" Driver "intel" BusID "PCI:0:2:0" Option "ZaphodHeads" "DVI1,VGA1" Screen 1 EndSection Section "Screen" Identifier "Screen0" Device "Intel0" EndSection Section "Screen" Identifier "Screen1" Device "Intel1" EndSection Section "ServerLayout" Identifier "default" Screen "Screen0" Screen "Screen1" EndSection Based on a patch by Ben Skegs Signed-off-by: Chris Wilson commit ad5ead8257b7dda84a886461873d87831d43e663 Author: Chris Wilson Date: Tue Jun 7 11:06:52 2011 +0100 sna/gen2: Support covered xrgb sources on 830/845 830/845 cannot directly sample from an x8r8g8b8 source, but if we know that we are only sampling from within the confines of the source then we force the alpha channel to one. (Outside of the source we require the sampler to return a==0.) Signed-off-by: Chris Wilson commit 790f90a277ff2a6fbb615b8cd3c06faa0d549c41 Author: Chris Wilson Date: Tue Jun 7 08:18:30 2011 +0100 sna/gen6: Initialise a couple more composite op members for copy_boxes Valgrind detected that I missed initialised a couple of fields for use with the generic state emission paths: ==28683== Conditional jump or move depends on uninitialised value(s) ==28683== at 0x83BE646: gen6_get_blend (gen6_render.c:251) ==28683== by 0x83BF769: gen6_emit_state (gen6_render.c:818) ==28683== by 0x83C38ED: gen6_emit_copy_state (gen6_render.c:2280) ==28683== by 0x83C3C89: gen6_render_copy_boxes (gen6_render.c:2356) ==28683== Conditional jump or move depends on uninitialised value(s) ==28683== at 0x83C15C3: gen6_rectangle_begin (gen6_render.c:1458) ==28683== by 0x83C177D: gen6_get_rectangles (gen6_render.c:1502) ==28683== by 0x83C3D16: gen6_render_copy_boxes (gen6_render.c:2363) Signed-off-by: Chris Wilson commit 4e443cbef589e016d085e8023677f47c1f01a858 Author: Chris Wilson Date: Tue Jun 7 00:24:17 2011 +0100 sna: Add some more debug commentary to render picture source migration Signed-off-by: Chris Wilson commit 367298c5109b47fa4961a60fa3cb454c800f02c3 Author: Chris Wilson Date: Mon Jun 6 23:21:09 2011 +0100 sna: Subtract the Solid RenderFillRectangles from CPU damage ... and so avoid having to move it the GPU, as seen in the wild. It looks like I will actually need to handle mixed Render/Core operations on the frontbuffer. Signed-off-by: Chris Wilson commit 62e4266b4dc9b5c3d165aca980738fa777a0f259 Author: Chris Wilson Date: Mon Jun 6 16:20:38 2011 +0100 sna/gen5: Only emit the non-pipelined op after BLT commands We were always terminating the batch with the non-pipelined op, and not just at the end of a BLT sequence. Signed-off-by: Chris Wilson commit 8f97157d2e807d6c9acb521ec59757f419e6518b Author: Chris Wilson Date: Mon Jun 6 10:21:17 2011 +0100 sna/gen2: Replicate alpha for non-CA masks Signed-off-by: Chris Wilson commit c8a2fa3a2e3f22e12f363e8ea060c70585156190 Author: Chris Wilson Date: Mon Jun 6 08:43:34 2011 +0100 sna/gen2: Correct command length for CA LOAD_IMMEDIATE_STATE_1 Signed-off-by: Chris Wilson commit a89fc7181b6ccec8ccca2cd4ccab4f180f663656 Author: Chris Wilson Date: Mon Jun 6 08:39:17 2011 +0100 sna/gen2: Only emit the mask texcoord if there is a mask Signed-off-by: Chris Wilson commit 4fb7784e1e1b2b999c0c2420583e9c48eb1127ac Author: Chris Wilson Date: Mon Jun 6 08:27:17 2011 +0100 sna/gen3: Non-affine texcoords require space for 4 floats not 3. Signed-off-by: Chris Wilson commit d9344ab8d04fe4795a3a532c5c0e85dc11ecf968 Author: Chris Wilson Date: Mon Jun 6 08:25:53 2011 +0100 sna/gen2: Set op->floats_per_vertex Signed-off-by: Chris Wilson commit 741c1101f17bfa379a15178e4760211737fa18cf Author: Chris Wilson Date: Mon Jun 6 08:22:45 2011 +0100 sna/gen2: Enable selection of gen2 only Signed-off-by: Chris Wilson commit c76ec69660bf40de052159f60c16de8fd87341a8 Author: Chris Wilson Date: Mon Jun 6 08:02:09 2011 +0100 sna/gen2: The inline primitive takes a length, not a vertex count Signed-off-by: Chris Wilson commit 91424d49373d8117e71441fa3221bd1801171692 Author: Eric Anholt Date: Tue May 31 23:29:43 2011 -0700 uxa: Simplify uxa_poly_fill_rect by only clipping once. Reviewed-by: Keith Packard commit e0066e77e026b0dd0daa0c3765473c7d63aa6753 Author: Eric Anholt Date: Tue May 31 23:17:16 2011 -0700 uxa: Simplify Composite solid acceleration for spans by only clipping once. Unlike the previous commit removing this style of code, the code in this one was originally wrong, and would fail to clip in the second pass of clipping when y was > pbox->y2. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=37233 Reviewed-by: Keith Packard commit ace324e4aa27effdd621156eec03f3f87b610732 Author: Eric Anholt Date: Tue May 31 23:13:18 2011 -0700 uxa: Simplify BLT solid acceleration for spans filling by only clipping once. We were clipping each span against the bounds of the clip, throwing out the span early if it was all clipped, and then walked the clip box clipping against each of the cliprects. We would expect spans to typically be clipped against one box, and not thrown out, so we were not saving any work there. For multiple cliprects, we were adding work. Only for many spans clipped entirely out of a complicated clip region would it have saved work, and it clearly didn't save bugs as evidenced by the many fix attempts here. Reviewed-by: Keith Packard commit bdb396a44bf64f823a44aafee19b5ec692f1bf5f Author: Chris Wilson Date: Sun Jun 5 19:41:25 2011 +0100 sna: PutImage: Copy straight to GTT if the bo is idle This saves a copy in the typical PutImage to frontbuffer favoured by flash. And we also happen to fix a bug if we should be requested to PutImage outside of the clip region... Signed-off-by: Chris Wilson commit 407257570fea1c6456fda47c9fab36c39f169c2b Author: Chris Wilson Date: Sun Jun 5 15:33:27 2011 +0100 sna/gen6: Flush the pipeline before effecting a change of blend modes ... also make sure that we flush if we change the blend mode for the CA pass. Reported-by: Ivan Bulatovic Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=37946 Signed-off-by: Chris Wilson commit 73167711226f430cc9ef4c27f267655d0edf4622 Author: Chris Wilson Date: Sun Jun 5 14:56:32 2011 +0100 sna: 915gm does not have 128-byte Y-tiling Signed-off-by: Chris Wilson commit 0260c4ce32fa4d7ae8c6ee79d5488b0114e96251 Author: Chris Wilson Date: Sun Jun 5 14:39:34 2011 +0100 sna: Fallback if presented with mask under NO_COMPOSITE Just making sure that the debug paths actually work... Signed-off-by: Chris Wilson commit fcbe2d9ee79c936cad3ee86836286dcb280f0047 Author: Chris Wilson Date: Sat Jun 4 18:11:54 2011 +0100 sna/gen4: Flush every vertex for the magic CA pass gen4 dies hard if it has two rectangles in the pipeline, and despite the stringent and crippling efforts to prevent us from efficiently using the GPU, I missed a flush before submitting the CA rectangle. Reported-and-tested-by: Fryderyk Dziarmagowski References: https://bugs.freedesktop.org/show_bug.cgi?id=28768 Signed-off-by: Chris Wilson commit bcef98af561939aa48d9236b2dfa2c5626adf4cb Author: Chris Wilson Date: Fri Apr 8 07:17:14 2011 +0100 sna: Introduce a new acceleration model. The premise is that switching between rings (i.e. the BLT and RENDER rings) on SandyBridge imposes a large latency overhead whilst rendering. The cause is that in order to switch rings, we need to split the batch earlier than is desired and to add serialisation between the rings. Both of which incur large overhead. By switching to using a pure 3D blit engine (ok, not so pure as the BLT engine still has uses for the core drawing model which can not be easily represented without a combinatorial explosion of shaders) we can take advantage of additional efficiencies, such as relative relocations, that have been incorporated into recent hardware advances. However, even older hardware performs better from avoiding the implicit context switches and from the batching efficiency of the 3D pipeline... But this is X, and PolyGlyphBlt still exists and remains in use. So for the operations that are not worth accelerating in hardware, we introduce a shadow buffer mechanism through out and reintroduce pixmap migration. Doing this efficiently is the cornerstone of ensuring that we do exploit the increased potential of recent hardware for running old applications and environments (i.e. so that the latest and greatest chip is actually faster than gen2!) For the curious, sna is SandyBridge's New Acceleration. If you are running older chipsets and welcome the performance increase offered by this patch, then you may choose to call it Snazzy instead. Speedups ======== gen3 firefox-fishtank 1203584.56 (1203842.75 0.01%) -> 85561.71 (125146.44 14.87%): 14.07x speedup gen5 grads-heat-map 3385.42 (3489.73 1.44%) -> 350.29 (350.75 0.18%): 9.66x speedup gen3 xfce4-terminal-a1 4179.02 (4180.09 0.06%) -> 503.90 (531.88 4.48%): 8.29x speedup gen4 grads-heat-map 2458.66 (2826.34 4.64%) -> 348.82 (349.20 0.29%): 7.05x speedup gen3 grads-heat-map 1443.33 (1445.32 0.09%) -> 298.55 (298.76 0.05%): 4.83x speedup gen3 swfdec-youtube 3836.14 (3894.14 0.95%) -> 889.84 (979.56 5.99%): 4.31x speedup gen6 grads-heat-map 742.11 (744.44 0.15%) -> 172.51 (172.93 0.20%): 4.30x speedup gen3 firefox-talos-svg 71740.44 (72370.13 0.59%) -> 21959.29 (21995.09 0.68%): 3.27x speedup gen5 gvim 8045.51 (8071.47 0.17%) -> 2589.38 (3246.78 10.74%): 3.11x speedup gen6 poppler 3800.78 (3817.92 0.24%) -> 1227.36 (1230.12 0.30%): 3.10x speedup gen6 gnome-terminal-vim 9106.84 (9111.56 0.03%) -> 3459.49 (3478.52 0.25%): 2.63x speedup gen5 midori-zoomed 9564.53 (9586.58 0.17%) -> 3677.73 (3837.02 2.02%): 2.60x speedup gen5 gnome-terminal-vim 38167.25 (38215.82 0.08%) -> 14901.09 (14902.28 0.01%): 2.56x speedup gen5 poppler 13575.66 (13605.04 0.16%) -> 5554.27 (5555.84 0.01%): 2.44x speedup gen5 swfdec-giant-steps 8941.61 (8988.72 0.52%) -> 3851.98 (3871.01 0.93%): 2.32x speedup gen5 xfce4-terminal-a1 18956.60 (18986.90 0.07%) -> 8362.75 (8365.70 0.01%): 2.27x speedup gen5 firefox-fishtank 88750.31 (88858.23 0.14%) -> 39164.57 (39835.54 0.80%): 2.27x speedup gen3 midori-zoomed 2392.13 (2397.82 0.14%) -> 1109.96 (1303.10 30.35%): 2.16x speedup gen6 gvim 2510.34 (2513.34 0.20%) -> 1200.76 (1204.30 0.22%): 2.09x speedup gen5 firefox-planet-gnome 40478.16 (40565.68 0.09%) -> 19606.22 (19648.79 0.16%): 2.06x speedup gen5 gnome-system-monitor 10344.47 (10385.62 0.29%) -> 5136.69 (5256.85 1.15%): 2.01x speedup gen3 poppler 2595.23 (2603.10 0.17%) -> 1297.56 (1302.42 0.61%): 2.00x speedup gen6 firefox-talos-gfx 7184.03 (7194.97 0.13%) -> 3806.31 (3811.66 0.06%): 1.89x speedup gen5 evolution 8739.25 (8766.12 0.27%) -> 4817.54 (5050.96 1.54%): 1.81x speedup gen3 evolution 1684.06 (1696.88 0.35%) -> 1004.99 (1008.55 0.85%): 1.68x speedup gen3 gnome-terminal-vim 4285.13 (4287.68 0.04%) -> 2715.97 (3202.17 13.52%): 1.58x speedup gen5 swfdec-youtube 5843.94 (5951.07 0.91%) -> 3810.86 (3826.04 1.32%): 1.53x speedup gen4 poppler 7496.72 (7558.83 0.58%) -> 5125.08 (5247.65 1.44%): 1.46x speedup gen4 gnome-terminal-vim 21126.24 (21292.08 0.85%) -> 14590.25 (15066.33 1.80%): 1.45x speedup gen5 firefox-talos-svg 99873.69 (100300.95 0.37%) -> 70745.66 (70818.86 0.05%): 1.41x speedup gen4 firefox-planet-gnome 28205.10 (28304.45 0.27%) -> 19996.11 (20081.44 0.56%): 1.41x speedup gen5 firefox-talos-gfx 93070.85 (93194.72 0.10%) -> 67687.93 (70374.37 1.30%): 1.37x speedup gen4 evolution 6696.25 (6854.14 0.85%) -> 4958.62 (5027.73 0.85%): 1.35x speedup gen3 swfdec-giant-steps 2538.03 (2539.30 0.04%) -> 1895.71 (2050.62 62.43%): 1.34x speedup gen4 gvim 4356.18 (4422.78 0.70%) -> 3276.31 (3281.69 0.13%): 1.33x speedup gen6 evolution 1242.13 (1245.44 0.72%) -> 953.76 (954.54 0.07%): 1.30x speedup gen6 firefox-planet-gnome 4554.23 (4560.69 0.08%) -> 3758.76 (3768.97 0.28%): 1.21x speedup gen3 firefox-talos-gfx 6264.13 (6284.65 0.30%) -> 5261.56 (5370.87 1.28%): 1.19x speedup gen4 midori-zoomed 4771.13 (4809.90 0.73%) -> 4037.03 (4118.93 0.85%): 1.18x speedup gen6 swfdec-giant-steps 1557.06 (1560.13 0.12%) -> 1336.34 (1341.29 0.32%): 1.17x speedup gen4 firefox-talos-gfx 80767.28 (80986.31 0.17%) -> 69629.08 (69721.71 0.06%): 1.16x speedup gen6 midori-zoomed 1463.70 (1463.76 0.08%) -> 1331.45 (1336.56 0.22%): 1.10x speedup Slowdowns ========= gen6 xfce4-terminal-a1 2030.25 (2036.23 0.25%) -> 2144.60 (2240.31 4.29%): 1.06x slowdown gen4 swfdec-youtube 3580.00 (3597.23 3.92%) -> 3826.90 (3862.24 0.91%): 1.07x slowdown gen4 firefox-talos-svg 66112.25 (66256.51 0.11%) -> 71433.40 (71584.31 0.14%): 1.08x slowdown gen4 gnome-system-monitor 5691.60 (5724.03 0.56%) -> 6707.56 (6747.83 0.33%): 1.18x slowdown gen3 ocitysmap 3494.05 (3502.44 0.20%) -> 4321.99 (4524.42 2.78%): 1.24x slowdown gen4 ocitysmap 3628.42 (3641.66 9.37%) -> 5177.16 (5828.74 8.38%): 1.43x slowdown gen5 ocitysmap 4027.77 (4068.11 0.80%) -> 5748.26 (6282.25 7.38%): 1.43x slowdown gen6 ocitysmap 1401.61 (1402.24 0.40%) -> 2365.74 (2379.14 4.12%): 1.69x slowdown [Note the performance regression for ocitysmap comes from that we now attempt to support rendering to and (more importantly) from large surfaces. By enabling such operations is the only way to one day be faster than purely using the CPU, in the meantime we suffer regression due to the increased migration and aperture thrashing. The other couple of regressions will be eliminated with improved span and shader support, now that the framework for such is in place.] The performance increase for Cairo completely overlooks the other critical aspects of the architecture: World of Padman: gen3 (800x600): 57.5 -> 96.2 gen4 (800x600): 47.8 -> 74.6 gen6 (1366x768): 100.4 -> 140.3 [F15] 144.3 -> 146.4 [drm-intel-next] x11perf (gen6); aa10text: 3.47 -> 14.3 Mglyphs/s [unthrottled!] copywinwin10: 1.66 -> 1.99 Mops/s copywinpix10: 2.28 -> 2.98 Mops/s And we do not have a good measure for how much improvement the reworking of the fallback paths give, except that xterm is now over 4x faster... PS: This depends upon the Xorg patchset "Remove the cacheing of the last scratch PixmapRec" for correct invalidations of scratch Pixmaps (used by the dix to implement SHM operations, used by chromium and gtk+ pixbufs. PPS: ./configure --enable-sna Signed-off-by: Chris Wilson commit 340cfb7f5271fd1df4c8948e5c9336f5b69a6e6c Author: Diego Elio Pettenò Date: Sun May 15 02:17:32 2011 +0200 build: do not use AC_CHECK_FILE to find the header files. Using AC_CHECK_FILE will cause cross-builds to fail picking the right file; instead use compile/preprocessor checks properly, and check for xf86driproto earlier. Reviewed-by: Rémi Cardona Signed-off-by: Chris Wilson commit 9d6e02a135efdea1d169d1938359ab2b553e941c Author: Adam Jackson Date: Tue May 10 15:27:45 2011 -0400 Remove the memory of Option "AccelMethod" Signed-off-by: Adam Jackson Reviewed-by: Eric Anholt Signed-off-by: Chris Wilson commit 895a46e8ff70195c1a4bdccbeb652e330376f64a Author: Chris Wilson Date: Tue May 10 20:38:25 2011 +0100 dri: Flush the batch after a DRI swap/copy event To minimise lag in those every so critical games, we want to ensure that the copy happens as soon as it is received, so we need to flush the batch after processing a swap event and before we go to sleep. References: https://bugs.freedesktop.org/show_bug.cgi?id=37068 Signed-off-by: Chris Wilson commit 0b4ca9313cc7eb4845cf7f4e87c869c0c6d6ff0d Author: Chris Wilson Date: Tue May 10 20:36:10 2011 +0100 video: Flush the batch on the next blockhandler after queuing In order to avoid video lag and jerky playback we need to ensure that any queued video is flushed before we go to sleep. Fixes regression from 6f104189bb. Reported-and-tested-by: Edward Sheldrake Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=37068 Signed-off-by: Chris Wilson commit bb8bf2a28bcb5e838bf4bb7e80ce220d28540719 Author: Chris Wilson Date: Tue May 10 14:35:02 2011 +0100 Correct chipset detection for Q33, Q35, B43_G1 Everytime we update these tables we trip over this bit of marketing genius. Signed-off-by: Chris Wilson commit fd1ebd44fb72e7bdf57d00f8941cd6110a529cac Author: Chris Wilson Date: Tue May 10 07:30:58 2011 +0100 module: Adopt IVB's more detailed naming convention for SNB This should fix the seven-fold repetition of "SandyBridge" in the list of supported chipsets during start-up... And be more useful in bug reports! Signed-off-by: Chris Wilson commit e9811bb777dfc51af19836175645400489f7d991 Author: Chris Wilson Date: Tue May 10 07:28:23 2011 +0100 Whitespacing cleanup for intel_module.c Bring intel_module.c into line with the kernel whitespacing rules abided by everywhere else in the tree. Signed-off-by: Chris Wilson commit 79e59fb2a047b1e733a7b0dee608db3311391725 Author: Eric Anholt Date: Fri May 6 12:40:12 2011 -0700 Add support for Ivybridge chipset. This gets display and 2D blit acceleration up and running. No Render acceleration is provided yet. commit 792738adfc5164d30358f045875dfc9b199a46da Author: Eric Anholt Date: Fri May 6 13:14:25 2011 -0700 Remove the static list of PciChipset and construct it from SymTabRec instead. This is one less place the new hardware enabler has to spam the chipset in. The PciChipset is just a match structure from PciId to the SymTabRec entry token, and our SymTabRec entry tokens are just the PciId, so it's trivial to construct. Acked-by: Kenneth Graunke commit 583e80dfa12d6c73fc677c81cb605a07b2768979 Author: Eric Anholt Date: Fri May 6 13:00:53 2011 -0700 Use the existing deviceID -> name mapping in SymTabRec instead of duping it. We need to have this array anyway for the xf86 interfaces, apparently, so just store the name in one location. This drops the i852/i855 subdevice distinction in the name printed, but I haven't seen us ever care about that. Acked-by: Kenneth Graunke commit adf7bbd3a8758de6cdecbace42e399dd27188497 Author: Eric Anholt Date: Fri May 6 12:56:53 2011 -0700 Store the chipset info struct in the PCI match struct, instead of a switch(). Acked-by: Kenneth Graunke commit 3145530feed879082bcfab11ffc8e7fd0911c920 Author: Chris Wilson Date: Sat May 7 19:51:04 2011 +0100 Ensure that the partial batch is flushed upon the blockhandler Currently, we require that a batch containing a dirty bo be submitted before we mark the device as requiring a flush. So if we never submit a batch between block handlers, we can end up sleeping without ever flushing either the partial batch or the rendering to the scanout. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36776 Tested-by: Vasily Khoruzhick Signed-off-by: Chris Wilson commit 67e5a74e997f199327f9115c7ba867df3c49da8d Author: Paul Menzel Date: Fri Apr 22 15:09:12 2011 +0200 NEWS: fix typo (s/2.14/2.15/) to match corresponding release Signed-off-by: Paul Menzel Signed-off-by: Chris Wilson commit 0944e2d5749f5122cd9802c4a2421106fa829ea4 Author: Jesse Barnes Date: Wed Apr 20 11:39:55 2011 -0700 Add basic 30 bit depth support Still need to handle video and gamma correction, but this gets the display up and running at 30 bit depth if the kernel and display support it. Signed-off-by: Jesse Barnes commit 1d102cc6ed21d1c4afa47800eecd24b9d663f689 Author: Chris Wilson Date: Tue Apr 12 13:48:38 2011 +0100 Use SwapbuffersWait config option to control waiting on fullscreen swaps As fullscreen swaps were going via a different path to the swapping of ordinary windows, we were no longer honouring the xorg.conf option to disable swapbuffer waiting. This changes the code to only use pageflipping if the Option "SwapbuffersWait" is set to "TRUE" (default). Jesse's comment was that this should be superseded by actually supporting asynchronous page flips. As we are missing kernel and dix level support for that, in the meantime honour the config option. Signed-off-by: Chris Wilson Cc: Jesse Barnes Cc: Kristian Høgsberg commit c9fb69cb2502917dfb2828c90802de7766072899 Author: Chris Wilson Date: Sun Apr 17 10:42:05 2011 +0100 i965/video: We need 150 dwords of space for video state emission (Actually around 131, with additional 10% just for safety.) Reported-by: Modestas Vainius Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36319 Signed-off-by: Chris Wilson commit a51cd83d25f2f9f2107219d5671194f931601244 Author: Chris Wilson Date: Sun Apr 17 10:36:26 2011 +0100 intel: Beware the unsigned promotion when checking for batch overflows Reported-by: Modestas Vainius References: https://bugs.freedesktop.org/show_bug.cgi?id=36319 Signed-off-by: Chris Wilson commit 030aa3d13643a0acb7126fa1fa6c5a8eac134639 Author: Chris Wilson Date: Thu Apr 14 10:25:21 2011 +0100 NEWS: typo. Spotted too late... Signed-off-by: Chris Wilson commit 0e425b30e12b11dbf51eea1d3366e3372f8b93af Author: Chris Wilson Date: Thu Apr 14 10:16:03 2011 +0100 configure,NEWS: 2.15.0 release Signed-off-by: Chris Wilson commit 686018f283f1d131073ef5917213e6a8ac013f26 Author: Chris Wilson Date: Tue Apr 12 08:23:04 2011 +0100 Turn relaxed-fencing off by default for older (pre-G33) chipsets There are still too many unresolved bugs, typically GPU hangs, that are related to using relaxed fencing (i.e. only allocating the minimal amount of memory required for a buffer) on older hardware, so turn off the feature by default for the release. Reported-and-tested-by: Knut Petersen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36147 Signed-off-by: Chris Wilson Acked-by: Daniel Vetter commit 3d2b79098ccb3fed86be66f619f4ed338741d454 Author: Chris Wilson Date: Mon Apr 11 15:20:16 2011 +0100 dri: Rearrange code to compile against xorg-server-1.7 Signed-off-by: Chris Wilson commit 4fa35dd5e13a58070220f787fc0678f1c679808d Author: Chris Wilson Date: Mon Apr 11 10:44:55 2011 +0100 NEWS: version bump for 2.14.903 snapshot Signed-off-by: Chris Wilson commit 97e9557619e58ef769eb7cbf1a03fbd52be7f2ed Author: Chris Wilson Date: Fri Apr 8 13:38:48 2011 +0100 intel: Restore manual flush for old kernels Daniel Vetter pointed out that the automagic flush by the kernel for the busy-ioctl was only introduced upstream in 2.6.37. So we still need to manually emit a flush on old kernels. Signed-off-by: Chris Wilson commit fb40bf2b33a6d26f0e6a4e5798d10c905faa8aad Author: Daniel Vetter Date: Fri Apr 8 12:37:35 2011 +0200 Tell users to grab i915_error_state on gpu hangs Acked-by: Chris Wilson Signed-off-by: Daniel Vetter commit 59ed6b05db99d7e5144f4f8499c67cee9b833673 Author: Chris Wilson Date: Thu Apr 7 15:28:46 2011 +0100 Revert "i965: Convert to relative relocations for state" This reverts commit d2106384be6f9df498392127c3ff64d0a2b17457. Breaks compiz (but not mutter/gnome-shell) on gen6. Not sure if this is not seem deep interaction issue with multiple clients sharing the GPU or just with compiz, but for now we have to revert and suffer the inane performance hit. It looks suspiciously like another deferred damage issue... Bugzilla: 51a27e88b073cff229fff4362cb6ac22835c4044 Signed-off-by: Chris Wilson commit 25521900df11bc71020ee80db2223f979bec5ec6 Author: Chris Wilson Date: Thu Apr 7 15:09:30 2011 +0100 gen6: Invalidate texture cache Signed-off-by: Chris Wilson commit ad22003033eb502474ae538a97e3b42cf8f83880 Author: Chris Wilson Date: Thu Apr 7 10:29:40 2011 +0100 i965: Avoid transform overheads for vertex emit where possible Minor improvement as the bottlenecks lie elsewhere. But it was annoying me. Signed-off-by: Chris Wilson commit 007c2f86cbb386861a1f711786523657f92e12cb Author: Chris Wilson Date: Thu Apr 7 09:53:34 2011 +0100 i965: Refactor to use constant sampler_state offsets Signed-off-by: Chris Wilson commit 8dc99b305a514dcd42c4260698e685a66dc95518 Author: Chris Wilson Date: Mon Apr 4 22:30:29 2011 +0100 i965: Reset vertex_id after every batch So that we always remember to re-emit the initial vertex elements state. Signed-off-by: Chris Wilson commit 5982ed4da12a964351029c6f786348a11e33dc81 Author: Chris Wilson Date: Mon Apr 4 19:32:43 2011 +0100 i965: Always update last_floats_per_vertex Signed-off-by: Chris Wilson commit 6f104189bb9439ab0e05f04d4be020813eb04bf9 Author: Chris Wilson Date: Mon Apr 4 19:21:10 2011 +0100 Take advantage of the kernel flush for dirty bo in the busy ioctl Rather than just creating and submitting a batch that simply contains a flush in order to periodically ensure that rendering reaches the scanout, we can simply ask the kernel whether the scanout is busy. The kernel will then submit a flush on our behalf if it is dirty, which takes advantage of the kernel's dirty state tracking. Signed-off-by: Chris Wilson commit 314439860e595c473d168c0cafb2b5b49b7fef30 Author: Chris Wilson Date: Mon Apr 4 17:20:04 2011 +0100 Remove unused function 'intel_bo_alloc_for_data' Signed-off-by: Chris Wilson commit ced747cefb5e697e6caa65296dff728904f52b93 Author: Chris Wilson Date: Mon Apr 4 17:13:50 2011 +0100 Remove the unnecessary MI_FLUSH from the flush handler The kernel will emit any required flushes between the dri client and the ddx, and we do not rely on the MI_FLUSH here for scanout. Signed-off-by: Chris Wilson commit 79444291a39c42039192a5baa3a71d52300cf4ee Author: Chris Wilson Date: Mon Apr 4 16:34:58 2011 +0100 i965: segregate each vertex element into its own buffer Reduce the number of relocations emitted by only emitting one relocation per vertex element per vertex buffer. References: https://bugs.freedesktop.org/show_bug.cgi?id=35733 Signed-off-by: Chris Wilson commit d2106384be6f9df498392127c3ff64d0a2b17457 Author: Chris Wilson Date: Mon Apr 4 12:33:04 2011 +0100 i965: Convert to relative relocations for state References: https://bugs.freedesktop.org/show_bug.cgi?id=35733 Signed-off-by: Chris Wilson commit 972569f6fd1e14519f46e9f50d2509faf1d0aa55 Author: Chris Wilson Date: Fri Mar 25 10:46:14 2011 +0000 MI_LOAD_SCAN_LINES_INCL are inclusive and range [0, display height-1] We have seen GPU hangs with: batchbuffer at 0x0f9b4000: 0x0f9b4000: 0x09000000: MI_LOAD_SCAN_LINES_INCL 0x0f9b4004: 0x00000300: dword 1 0x0f9b4008: 0x09000000: MI_LOAD_SCAN_LINES_INCL 0x0f9b400c: 0x00000300: dword 1 0x0f9b4010: 0x01820000: MI_WAIT_FOR_EVENT 0x0f9b4014: HEAD 0x02000006: MI_FLUSH on a 1366x768 display. That according to the specs an invalid command for the pipe. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35576 Signed-off-by: Chris Wilson commit 537a836dd6db384d53b52eb457a7d257c440217f Author: Chris Wilson Date: Fri Apr 1 07:10:25 2011 +0100 946GZ is a 965G! Sales & Marketing score another victory in confusing me. Bugzila: https://bugs.freedesktop.org/show_bug.cgi?id=35854 Signed-off-by: Chris Wilson commit 630d77bf10ba6234bb9c04538636f7d8aa319aea Author: Chris Wilson Date: Wed Mar 30 07:24:42 2011 +0100 Add a DRI2SwapEventPtr typedef for retro xservers Because people are still trying to build upon our solid historical foundations. Signed-off-by: Chris Wilson commit f660df2cb44b310740ed850037ff37891b671f28 Author: Daniel Vetter Date: Tue Mar 29 18:02:24 2011 +0200 Cleanup gen2 tiling confusion A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. Reviewed-by: Chris Wilson Signed-off-by: Daniel Vetter commit a2c8442fcb29ef2d0df41518952a2d8df1671070 Author: Chris Wilson Date: Tue Mar 29 11:38:45 2011 +0100 configure: version bump for 2.14.902 snapshot Signed-off-by: Chris Wilson commit 2f2680793952876c89796174bed53c824fe6d1cb Author: Chris Wilson Date: Tue Mar 29 11:38:18 2011 +0100 NEWS: Entry for 2.14.902 snapshot Signed-off-by: Chris Wilson commit 7ccbec801e9ee32fc110db730dfec674a94dea21 Author: Keith Packard Date: Thu Mar 24 11:06:57 2011 -0700 Recover from i830_dri2_add_frame_event out-of-memory condition If adding either the frame or client resources fails, we need to clean up afterwards properly. First, add_frame_event needs to internally clean up after itself by undoing any partial execution. Second, the callers need to look at the return value and free the swap/flip info structure when necessary. Signed-off-by: Keith Packard Reviewed-by: Julien Cristau commit ec133abc4bd8caba15ed54e18621b816afb06981 Author: Chris Wilson Date: Thu Mar 24 15:32:50 2011 +0000 Use the per-generation batch context switch for atomic sequences A modest boost to throughput and reduction in CPU overhead from not flushing the batch on every transition from BLT to RENDER. Signed-off-by: Chris Wilson commit 86f23f21ab57fcbc031bcd2b8f432a08ff4cc320 Author: Keith Packard Date: Wed Mar 23 17:07:49 2011 -0700 Skip client and drawable resource delete calls when deleting frame event As the frame_event is about to be freed, there's no point in cleaning up references to the drawable and client. Signed-off-by: Keith Packard commit e1ff5182304e00c0d392092069422cae7626cf8d Author: Keith Packard Date: Wed Mar 9 17:00:41 2011 -0800 Handle drawable/client destruction in pending swaps/flips A pending swap or flip holds references to drawables and clients which become invalid when destroyed. Add suitable resources to the database to track those lifetimes and clean up the pending data structure then. Later, when the pending swap or flip occurs, handle a missing drawable by just discarding the flip or swap. Handle a missing client by not sending an event or reply. Signed-off-by: Keith Packard commit aa0328f342177e33f9c863531712eaa4577b5f2b Author: Keith Packard Date: Wed Mar 9 16:23:22 2011 -0800 dri2: Make DRI2FrameEvent public and use instead of void * Instead of using void * for all of the flip_info and swap_info pointers, just make the underlying structure a public data type and use that. Signed-off-by: Keith Packard commit ee740778f5d5355c04f6fc4564f598993b106d62 Author: Chris Wilson Date: Wed Mar 16 08:37:24 2011 +0000 i915/video: Clip indirect Xv output In the case of a singular clip box and rendering onto the front buffer larger than 2048, the clip extents were being ignored. Here we can simply reduce the size of the indirect pixmap to the clip extents. Reported-by: Michael Chang Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35346 Signed-off-by: Chris Wilson commit 014fc7abb7b2cc2110e3ab9a0bd6f7cff2c64c05 Author: Chris Wilson Date: Wed Mar 9 17:10:50 2011 +0000 dri: Disable page-flip between a tiled buffer and a linear scanout Keith Packard pointed out a loophole that could cause the DDX to end up with a tiled scanout even if the user required a linear framebuffer; that is by using page-flipping we could replace the scanout pixmap with another of our choosing, and not necessarily tiled. Close that loophole by only allowing an exchange of buffers between identical tiling modes. For the common case, this is fine since they will indeed be allocated with the same tiling. For the linear framebuffer case with mesa using a tiled pixmap, we force it to blit onto the scanout instead. Reported-by: Keith Packard Signed-off-by: Chris Wilson commit 049ce4397ddf7fd088ce364cbb53cacf5133176f Author: Chris Wilson Date: Wed Mar 9 08:27:02 2011 +0000 Give each user of tiling separate xorg.conf options So that you can indeed allocate a linear framebuffer if you so desire without breaking mesa. Adds: Section "Driver" Option "LinearFramebuffer" "False|True" # default false EndSection to xorg.conf Signed-off-by: Chris Wilson commit 0bb1a5f19e09dc553761ddd90bf6319eab94a597 Author: Chris Wilson Date: Wed Mar 9 08:26:44 2011 +0000 Update priv->stride after bo reallocation Signed-off-by: Chris Wilson commit 34f9a3335f96b16ef9df6213eb0a586c94f8f05b Author: Chris Wilson Date: Wed Mar 2 17:46:19 2011 +0000 configure: Bump for 2.14.901 snapshot Signed-off-by: Chris Wilson commit 057783937d7a42a766d0e45174c4c2dc0ffacd40 Author: Chris Wilson Date: Wed Mar 2 17:45:43 2011 +0000 NEWS: Add entry for 2.14.901 snapshot Signed-off-by: Chris Wilson commit e889d3a709b55a0731ab098b17a3364b9bf39387 Author: Chris Wilson Date: Sun Feb 27 10:51:50 2011 +0000 dri: Protect against destroying a foreign DRI drawable I have no clue as to how such an alien drawable reached us, but we have the evidence of a segfault to say it can happen. Reported-by: Bernie Innocenti Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34787 Signed-off-by: Chris Wilson commit d21d781466785c317131a8a57606925867265dc8 Author: Daniel Vetter Date: Tue Feb 22 18:31:44 2011 +0100 Fix relaxed tiling on gen2 Signed-off-by: Daniel Vetter commit 9599fde65a0d8b7e7c85199346f7b620bdd8388d Author: Bryce Harrington Date: Tue Feb 15 22:30:18 2011 -0800 Quell excessively verbose vblank counter failed error messages Certain error situations can result in the following printed to Xorg.0.log at a high enough rate to make log file size a problem. (WW) intel(0): I830DRI2GetMSC:1062 get vblank counter failed: Invalid argument (WW) intel(0): I830DRI2ScheduleWaitMSC:1118 get vblank counter failed: Invalid argument Following in the tradition of commit 0ad6d6e1, limit the warnings to be output 5 times, then quell the remainder. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34322 Ref.: https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/710594 Signed-off-by: Bryce Harrington Signed-off-by: Chris Wilson commit 0ca595e9d533019b241666d29b421c7b36f9647a Author: Adam Jackson Date: Thu Feb 17 15:26:35 2011 -0500 Fix IGD and IGDNG constants to be comprehensible Since, with GPU-on-package, it's hard to talk about a model number for a specific chipset like 855GM, just use the platform names. Signed-off-by: Adam Jackson Signed-off-by: Chris Wilson commit 4c66b28870b050493ad96f7b0fe2d70d7ee539c7 Author: Chris Wilson Date: Thu Feb 17 16:48:24 2011 +0000 uxa: Fallback if the temporary is too large If the render operation requires a temporary source Picture and the operation is large, larger than the maximum permitted bo, then we will fail to allocate the bo. In this case, we need to fallback and perform the operation on the CPU rather than dereference a NULL bo. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34399 Signed-off-by: Chris Wilson commit 23f9b14df7c102c1036134835dd5d1a508059858 Author: Chris Wilson Date: Sat Feb 12 10:42:34 2011 +0000 i965: Remove broken maximum base addresses from video WRONG. The hardware was never limited to 0x1000000 and the kernel can quite rightly place objects above that limit. Specifying such had no relation to reality, so why did we do it? TWICE! Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34017 Signed-off-by: Chris Wilson commit 9184af921bc2f332fcb6c9b47001414378eab8e2 Author: Javier Jardón Date: Wed Feb 9 00:36:37 2011 +0000 Update autotools configuration Use new libtool syntax and silent-rules to silent the build output a bit (linux-like) commit 6e721e098b9181e8e77e314f966729d28e705582 Author: Bryce Harrington Date: Fri Feb 4 00:15:13 2011 -0800 Check return value of uxa_acquire_solid() since it can return NULL uxa_acquire_solid returns NULL under OOM. Thus the value of solid must be checked before dereferencing it in the uxa_get_offscreen() call. Signed-off-by: Bryce Harrington Signed-off-by: Chris Wilson commit da990536eca09c6de74627541cd56ecfad925eda Author: Chris Wilson Date: Thu Feb 3 09:41:48 2011 +0000 uxa: Undo damage translation before appending The region is used to paint onto the backing pixmap (and thus translated) prior to being passed to the damage layer (wrt to the drawable). So the local translation needs to be undone first. Identified by Christopher James Halse Rogers. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=33650 Signed-off-by: Chris Wilson commit ce1e0969058f8c70b624bc85bb8d6698a35794d3 Author: Chris Wilson Date: Mon Jan 31 20:27:26 2011 +0000 Rename 'intel' backlight to match upstream name in 2.6.38 (Just waiting for libbacklight to bring sanity...) Signed-off-by: Chris Wilson commit 80f59c8a4f51ccc27653a2de2dee2563b1e911f1 Author: Cyril Brulebois Date: Mon Jan 31 06:22:39 2011 +0100 xvmc: Stop using uninitialized variable. The actual code was removed in 5f64122551, where the get_surface_status driver callback was dropped. Just return Success if there were no issues with the parameter. Get rid of the following with CFLAGS="-Wall -Werror": | CC intel_xvmc.lo | cc1: warnings being treated as errors | intel_xvmc.c: In function ‘XvMCSyncSurface’: | intel_xvmc.c:677: error: ‘ret’ may be used uninitialized in this function | intel_xvmc.c:672: note: ‘ret’ was declared here Signed-off-by: Cyril Brulebois Signed-off-by: Chris Wilson commit 86284abafbe1364f82509d2656c82ba11cdce6cc Author: Cyril Brulebois Date: Mon Jan 31 06:22:38 2011 +0100 xvmc: Silence gcc, adding a cast to work around signedness issues. Both exported XvMCPutSlice/XvMCPutSlice2 functions have a prototype with a parameter whose signedness differs from the one in the put_slice/put_slice2 functions they call. Make it unsigned through a cast. Get rid of this accordingly with CFLAGS="-Wall -Werror": | CC intel_xvmc.lo | cc1: warnings being treated as errors | intel_xvmc.c: In function ‘XvMCSyncSurface’: | intel_xvmc.c:677: error: ‘ret’ may be used uninitialized in this function | intel_xvmc.c:672: note: ‘ret’ was declared here Signed-off-by: Cyril Brulebois Signed-off-by: Chris Wilson commit fc2eb64d7a184770ccd708a5b2337a538ca2b9db Author: Cyril Brulebois Date: Mon Jan 31 09:59:04 2011 +0000 xvmc: Silence gcc, add parentheses around arithmetic. Get rid of those accordingly with CFLAGS="-Wall -Werror": | CC i915_xvmc.lo | cc1: warnings being treated as errors | i915_xvmc.c: In function ‘i915_mc_one_time_state_emit’: | i915_xvmc.c:369: error: suggest parentheses around arithmetic in operand of ‘|’ | i915_xvmc.c:374: error: suggest parentheses around arithmetic in operand of ‘|’ | i915_xvmc.c:379: error: suggest parentheses around arithmetic in operand of ‘|’ | i915_xvmc.c: In function ‘i915_mc_load_indirect_render_emit’: | i915_xvmc.c:708: error: suggest parentheses around arithmetic in operand of ‘|’ | i915_xvmc.c:713: error: suggest parentheses around arithmetic in operand of ‘|’ Signed-off-by: Cyril Brulebois Signed-off-by: Chris Wilson commit 1b9349bceb9172d9bf01638b2df10b9b79e883b4 Author: Cyril Brulebois Date: Mon Jan 31 06:22:36 2011 +0100 xvmc: Silence gcc, add parentheses around assignment. Get rid of the following with CFLAGS="-Wall -Werror": | CC intel_xvmc_dump.lo | cc1: warnings being treated as errors | intel_xvmc_dump.c: In function ‘intel_xvmc_dump_open’: | intel_xvmc_dump.c:41: error: suggest parentheses around assignment used as truth value Signed-off-by: Cyril Brulebois Signed-off-by: Chris Wilson commit ae8877e30707cae586565b4deee4c7fd9ac7d3ed Author: Cyril Brulebois Date: Mon Jan 31 06:22:35 2011 +0100 xvmc: Get rid of unused variables. Signed-off-by: Cyril Brulebois Signed-off-by: Chris Wilson commit 8bd6a7149fcb5f9ed6580dc2aa0180874938a1ea Author: Chris Wilson Date: Sat Jan 29 12:04:09 2011 +0000 Enable conditional compilation of asserts With '--disable-debug' we define NDEBUG and so disable the asserts, that is we continue to default to compiling asserts into the code. Signed-off-by: Chris Wilson commit a5a1ab7bbc58ec884cd0b90fe7139f402291b92f Author: Chris Wilson Date: Fri Jan 28 17:20:06 2011 +0000 i915: Remove unused 'w' and 'h' Signed-off-by: Chris Wilson commit 2c9b3225d8c7b53e2d921705dbb069710abcea5d Author: Chris Wilson Date: Fri Jan 28 17:19:39 2011 +0000 i915: Remove unused 'num_floats' variable Signed-off-by: Chris Wilson commit c6dc27562abbc8ca9e873ad502ca49ae010461d2 Author: Chris Wilson Date: Mon Jan 24 20:25:27 2011 +0000 uxa: Only recreate the glyph cache on *generational* updates The screen resources are recreated when the screen is rotated as well, without being finalized. In this case, we do not need to reconstuct the cache (or if we did, we would need to tear it down first). Reported-by: Till Matthiesen Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=33412 Signed-off-by: Chris Wilson commit 5baa63c634990810a66c3150b4f2b76fcee2df38 Author: Xiang, Haihao Date: Fri Jan 21 08:45:52 2011 +0800 Fix an error in 4c4ad555564a80311df1a4b762eb1e119c6d95fb. See the original patch at https://bugs.freedesktop.org/show_bug.cgi?id=24767 Signed-off-by: Xiang, Haihao commit 3e28a0c0b43823d3104fe8fc50b5994b41fc0cc1 Author: Chris Wilson Date: Thu Jan 20 15:07:26 2011 +0000 Create the UXA generational resources during screen create Signed-off-by: Chris Wilson commit 4c4ad555564a80311df1a4b762eb1e119c6d95fb Author: Xiang, Haihao Date: Wed Jan 19 15:25:06 2011 +0000 Correct offset of planes within clipped window Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=24767 Reported-and-tested-by: Sitsofe Wheeler Signed-off-by: Chris Wilson commit 5a22bc999de8555f26c639eaffbe73b680746174 Author: Eric Anholt Date: Mon Jan 17 11:32:37 2011 -0800 Quiet compiler warning about is_affine_src same way we do is_affine_mask. commit 3a2a4b0784f0fc96a5457b18931471f15ad745fc Author: Simon Farnsworth Date: Mon Jan 17 17:38:23 2011 +0000 Fix textured video when destination is larger than screen In our application, the screen is never rotated from the point of view of the driver; instead, the compositor applies a suitable rotation as it composites the display. This works fine on 945, but on 965, videos are limited in height to the actual height of the screen. Change various bits of code so that we use the width and height of the destination pixmap instead of the width and height of the virtual screen. This works correctly both for XVideo to offscreen storage (CompositeRedirect) and for XVideo to the screen (no compositor). commit fd9235ebe03a01982238cdd6e8b55f613e14b6af Author: Chris Wilson Date: Fri Dec 17 00:58:36 2010 +0000 Delete unused memory allocation flags. Signed-off-by: Chris Wilson commit 03248a798409ca4dd1caf5e25a3d5f5a80173260 Author: Chris Wilson Date: Fri Dec 17 00:57:01 2010 +0000 Cache the fixed crtc<->pipe relationship Signed-off-by: Chris Wilson commit 00a2aee38dc5cbbd4907a593fa8d617f5a20292e Author: Chris Wilson Date: Fri Dec 17 00:50:33 2010 +0000 Remove unused I830Output Signed-off-by: Chris Wilson commit a851879695c48e88d421b053a78f867d9902273f Author: Chris Wilson Date: Fri Dec 17 00:48:26 2010 +0000 Remove bitrotted, but fortunately unused, I830CrtcPrivate Signed-off-by: Chris Wilson commit f8a5d7737e014e99943b947d088a4f9f1b465d46 Author: Chris Wilson Date: Fri Dec 17 00:37:47 2010 +0000 Delete some dead code Signed-off-by: Chris Wilson commit 968151898b807b06953b2f4170ac02889f16c8dc Author: Chris Wilson Date: Fri Dec 17 00:18:25 2010 +0000 Remove unused GTT/Map sizes and addresses These have been made obsolete by KMS and GEM. Signed-off-by: Chris Wilson commit 19b5817a54d4a17161340ada9bf20027644ff074 Author: Chris Wilson Date: Fri Dec 17 00:15:31 2010 +0000 Remove unused struct _intel_memory definition Signed-off-by: Chris Wilson commit 40a7bde9140c0ae6412b8f916b1455d44e2af6cf Author: Chris Wilson Date: Fri Jan 7 23:46:07 2011 +0000 configure: version bump for 2.14.0 commit 8ecbba2aca657da3894eb77e856ac2d4e9efc0cc Author: Chris Wilson Date: Fri Jan 7 23:45:06 2011 +0000 NEWS: Release notes for 2.14.0 commit 22d7b61791c382088a6c0df5dce3a15405d6c495 Author: Chris Wilson Date: Tue Jan 4 12:32:01 2011 +0000 i965: Fix off-by-one in assert Signed-off-by: Chris Wilson commit a7c7a9108f76aa312f3d5efa466052b914c81484 Author: Chris Wilson Date: Tue Jan 4 10:53:30 2011 +0000 configure: version bump for 2.13.903 snapshot Signed-off-by: Chris Wilson commit 3fbecf34630c3588618900afdfbd9a4266856178 Author: Chris Wilson Date: Tue Jan 4 10:52:44 2011 +0000 NEWS: Add entry for 2.13.903 Signed-off-by: Chris Wilson commit 90538ecfff9c324d61419f451d41d26ab026f232 Author: U. Artie Eoff Date: Tue Dec 21 17:42:38 2010 -0700 configure: suggest upstream to find macros in case they're missing. added upstream suggestion to error message in case xorg macros or xserver macros are missing. removed package manager references in suggestion since these are 'user' and/or 'distribution' preferences. Signed-off-by: Chris Wilson commit 6d50f5a140dbefdf86eb25d18d08473aa7e42acc Author: Chris Wilson Date: Mon Jan 3 23:06:14 2011 +0000 If the crtc is not enabled, then it can't be on Signed-off-by: Chris Wilson commit 145c42a101c3150fb1e2cae8a1780b26e8b56f42 Author: Adam Jackson Date: Mon Jan 3 17:52:27 2011 -0500 dri2: Fix interlace computation scrn->currentMode is a hack for xf86vidmode and in general is wrong for RANDRful drivers. Use the mode on the associated CRTC instead. Signed-off-by: Adam Jackson [ickle: crtc->mode is a ModeRec not Ptr] Signed-off-by: Chris Wilson commit b0d10ff04a24a951256a79710ba22b325b549ba4 Author: Adam Jackson Date: Mon Jan 3 17:52:26 2011 -0500 xv: Fix interlace computation scrn->currentMode is a hack for xf86vidmode and in general is wrong for RANDRful drivers. Use the mode on the associated CRTC instead. Signed-off-by: Adam Jackson [ickle: crtc->mode is a ModeRec] Signed-off-by: Chris Wilson commit 0ad6d6e1a678de7d8c2d4cd7c734887e1deb2f9b Author: Chris Wilson Date: Mon Jan 3 16:52:07 2011 +0000 dri: Only issue a warning for an "impossible" flip return 5 times As it appears that some kernels do indeed return the "wrong" value, issuing a warning 60 times a second is a cruel and unusual punishment. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32680 Signed-off-by: Chris Wilson commit d729ef02f2955f7476df4c65403bc1f8e705b780 Author: Chris Wilson Date: Sun Jan 2 09:11:10 2011 +0000 dri: Don't wait upon a NULL current mode There is a race condition between the dri swapbuffers code and hotplugging whereby we might attempt to execute a wait upon a non-existent output. This causes a NULL dereference and a loud crash. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32770 Signed-off-by: Chris Wilson commit 537fa55ed2449e91f3dd1e04abc720c6818d7227 Author: Chris Wilson Date: Sun Jan 2 09:06:28 2011 +0000 dri: Fix the use of the uninitialised bo for flink Reported-by: Jeff Chua Signed-off-by: Chris Wilson commit dbc542b9d38ff9781efcdf1d5308e97f04499138 Author: Chris Wilson Date: Fri Dec 31 23:29:05 2010 +0000 dri: Protect against using dri with an non-gem pixmap Reported-by: Jeff Chua Signed-off-by: Chris Wilson commit 53fbc9f1760ee481cba1f6dceb9e7c97282a2976 Author: Chris Wilson Date: Thu Dec 30 15:32:40 2010 +0000 Don't replace the scanout bo through PutImage As the bo may be pinned for either use by the scanout or through sharing with another application, under those circumstances we cannot replace the bo itself but must force the blit for PutImage. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31367 Reported-and-tested-by: Bjørn Mork Signed-off-by: Chris Wilson commit 7667ad8432c032aec3a2aa004fc4dfc1877971b3 Author: Chris Wilson Date: Fri Dec 24 09:42:29 2010 +0000 dri: Differentiate identical "get vblank failed" messages with line no Signed-off-by: Chris Wilson commit 875d4828352c501ec5d0169735fb078807e76f2e Author: Chris Wilson Date: Thu Dec 23 19:36:12 2010 +0000 i830: amalgamate consecutive composites into a single primitive Improve aa10text on i845 from 218kglyphs/s to 234kglyphs/s Signed-off-by: Chris Wilson commit 58d9912e447cf6e29b20747b5ed6ee595687ce8d Author: Chris Wilson Date: Wed Dec 22 13:50:53 2010 +0000 Remove the deprecated function 'XNFprintf' As we know the maximum length of the string, we can replace our single usage of XNFprintf with snprintf. Signed-off-by: Chris Wilson commit e8db77e019e19ace48592b2f6d96af6baa9a228e Author: Chris Wilson Date: Tue Dec 21 23:03:21 2010 +0000 Revert "Suggest where to find xorg-macros in case it's missing" I failed my reading comprehension and didn't spot that the help strings pointed to two separate downstream packages. Thanks to Carl Worth for pointing out my mistake. This reverts commit ebb7aca66785730737bc739624006e55d43dfe1b. commit ebb7aca66785730737bc739624006e55d43dfe1b Author: Chris Wilson Date: Tue Dec 21 22:23:24 2010 +0000 Suggest where to find xorg-macros in case it's missing [Modified version of U. Artie Eoff's commit to remove the duplicated string. The paraphrased commit message is repeated below for clarity.] xorg-macros is often package under an unusual name, so provide some clues as to what name to try on the user's distribution. Installing build-deps would be just too easy... Also include a check for the existence of the XORG_DRIVER_CHECK_EXT macro, otherwise configure might continue in spite of the missing macro and cause obtuse syntax errors. Signed-off-by: Chris Wilson commit 90576f95f35e528fa2c667df162c5dc7ec98975d Author: U. Artie Eoff Date: Tue Dec 21 15:10:41 2010 -0700 configure: updated m4 macro check in configure.ac Added m4 check for XORG_DRIVER_CHECK_EXT macro definition. Updated m4 fatal messages to give better hint on how to resolve error when xorg macros are missing. Previously, configure would continue in spite of the missing macros and the build would fail for syntax errors. commit 1ac2e04023f84dbf1f3db2ecad1cadd159aa614d Author: Chris Wilson Date: Mon Dec 20 10:55:11 2010 +0000 Undo: Disable BLT for i830 and 845G Reported-by: György Balló Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32482 Signed-off-by: Chris Wilson commit 6f21405454487adf7623cf22f0fdd9f127099afd Author: Chris Wilson Date: Fri Dec 17 16:37:55 2010 +0000 G35 is gen4 and not gen3 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32478 Reported-and-tested-by: Michal Marek Signed-off-by: Chris Wilson commit 5743c223877fbff710cdd5114cff6d3ee3108309 Author: Mario Kleiner Date: Thu Dec 9 03:27:59 2010 +0100 Check consistency of pageflip completion vblank count. Implements a consistency check on returned vblank count values of pageflip completion. Impossible values are detected, a x-warning is logged and returned (msc,ust) values are marked invalid, so clients could perform error handling. Such a warning would indicate bugs in the pageflip completion routine of future kms drivers or the ddx and thereby aid driver debugging. Signed-off-by: Mario Kleiner Signed-off-by: Chris Wilson commit 2177e6032146f4720f244e98f7c0d6df1b925784 Author: Mario Kleiner Date: Thu Dec 9 03:12:35 2010 +0100 Fix reporting of pageflip completion events on multi-head. When a drawable is page-flipped on multiple crtc's (fullscreen drawable on mirror-mode or multi-head x-screen), only one pageflip event is finally delivered, after the last participating crtc signals flip completion, this to avoid visual corruption. Old code returned vblank count and timestamps of flip completion of this last crtc, instead of the values of the "master crtc", the one that was used for initially scheduling/triggering the pagflip via vblank events. (master = I830DRI2DrawablePipe(drawable)) This patch makes sure that the pageflip completion values of the "master" crtc are returned, otherwise client applications will get confused by the random (msc, ust) values returned by whichever crtc was the last to complete its flip. Without this, the returned values change randomly and jump forward and backward in time and count. Signed-off-by: Mario Kleiner Signed-off-by: Chris Wilson commit 71af40a75fbdd1054b1111e8cbe67ad1f97e6613 Author: Chris Wilson Date: Fri Dec 10 15:55:09 2010 +0000 NEWS: 2.14, I meant the upcoming 2.14 release! Signed-off-by: Chris Wilson commit 556331a22101d08babbd276236f74ffcc380171c Author: Chris Wilson Date: Fri Dec 10 15:28:37 2010 +0000 configure: version bump for 2.13.902 This is actually the first release candidate for 2.14. Signed-off-by: Chris Wilson commit e01ea4a45c1cf8953a6d5ff6c600d76dbbe4760d Author: Chris Wilson Date: Fri Dec 10 15:28:00 2010 +0000 NEWS: Add entry for the 2.13.902 snapshot Signed-off-by: Chris Wilson commit 8df6f0a6082ad762ec69be7789a961db0c74154a Author: Chris Wilson Date: Fri Dec 10 12:26:16 2010 +0000 configure: Bump required libdrm to 2.4.23 To pull in the required headers for BLT and relaxed fencing support. Signed-off-by: Chris Wilson commit 9b967807c2d240488a715509649663aac3583532 Author: Chris Wilson Date: Tue Dec 7 20:45:16 2010 +0000 Revert "i965: The RenderCache flush after every glyph is required for compiz" This reverts commit 03e8351179b1c25d219842ef3e01ee8e176f594f. * sigh. This was only meant to be a temporary debugging hack, not for public consumption (or embarrassment). Signed-off-by: Chris Wilson commit 27e33928f87ecb806d1f8c459d4a4ada76b0e30e Author: Chris Wilson Date: Tue Dec 7 20:42:24 2010 +0000 i965: Mark sure we mark reused render targets as dirty ... or else we may forget to flush them again. Signed-off-by: Chris Wilson commit 03e8351179b1c25d219842ef3e01ee8e176f594f Author: Chris Wilson Date: Tue Dec 7 19:27:57 2010 +0000 i965: The RenderCache flush after every glyph is required for compiz ... now who can explain why. Signed-off-by: Chris Wilson commit d90c8f4d0bb6b79ecdcaa82f87291169c18c64b9 Author: Chris Wilson Date: Tue Dec 7 19:22:30 2010 +0000 i965: Invalidate pixmap binding location on reuse. Signed-off-by: Chris Wilson commit 4a186a612376bdd6f86c026e8b8b442108868a0a Author: Chris Wilson Date: Tue Dec 7 16:56:57 2010 +0000 Always flush the batch before blocking for new X requests This should prevent any lag when waiting upon user input, for example whilst logging in with gdm. Signed-off-by: Chris Wilson commit 1ba983034b3a70fb541dc359189c020ee497c634 Author: Chris Wilson Date: Tue Dec 7 12:27:29 2010 +0000 uxa: Emit the damage after the render for the workaround in uxa_solid_rects Signed-off-by: Chris Wilson commit 00c204a7b2df7a6b501db9b57603534a45ecafa9 Author: Chris Wilson Date: Mon Dec 6 16:34:52 2010 +0000 snb: Only emit CC and DepthStencil bos once per batch Signed-off-by: Chris Wilson commit 084ae43110240c582ae7cd6452966dd9f22350fa Author: Chris Wilson Date: Mon Dec 6 15:57:19 2010 +0000 snb: Restore drawrect, we need the implicit flush Something is wrong, we should be tracking when to invalidate the caches as appropriate, yet I can not finding the missing flush to replace the implicit one of DRAW_RECTANGLE. Fixes cacomposite. Signed-off-by: Chris Wilson commit f3a47d7f235d18e4529e3898a48673c7c3cbd489 Author: Chris Wilson Date: Mon Dec 6 14:11:05 2010 +0000 snb: Cache pixmap binding locations Signed-off-by: Chris Wilson commit 4d48fed9aa0c3c7b84e74b4f72f298f580a8973c Author: Chris Wilson Date: Mon Dec 6 13:50:43 2010 +0000 snb: Cache state between composite ops Signed-off-by: Chris Wilson commit a58e5a1bdf10be3b96ecaa3d5e3ee288eab1063f Author: Chris Wilson Date: Mon Dec 6 13:34:53 2010 +0000 snb: Emit more invariants only once Signed-off-by: Chris Wilson commit e8f41c371024e2f3845c7652b22af8f5900200f2 Author: Chris Wilson Date: Sun Dec 5 21:37:23 2010 +0000 uxa: Prevent reading past the last byte on upload/download Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29752 Reported-by: Sergey Samokhin Signed-off-by: Chris Wilson commit c2fac6ca108734dd9566570b15f01cc476fa53dc Author: Matthias Hopf Date: Fri Nov 19 04:29:57 2010 +0100 Don't use hardware acceleration on Sandybridge rev 07 hardware or earlier. This is known to lock up the GPU even with the workaround in place. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31773 Signed-off-by: Matthias Hopf Signed-off-by: Chris Wilson commit 8abade8a2139b500251488be5d6390f149666fb2 Author: Chris Wilson Date: Sun Dec 5 09:55:43 2010 +0000 display: Flush any pending batches before changing modes. Signed-off-by: Chris Wilson commit 8450aba6c731b20e5cd7b55f1d747f00a6523291 Author: Chris Wilson Date: Sun Dec 5 01:08:51 2010 +0000 i965: Also flush the vertex buffer when restarting the array. As a corollary to filling one vertex array and beginning a new one is remembering to emit the old one before overwriting... Signed-off-by: Chris Wilson commit f40f8bcf07bd7f496bfd3069eddfcbeb3d1bf8be Author: Chris Wilson Date: Sun Dec 5 00:26:22 2010 +0000 i965: Check for potential vertex array overflow every time There was a reason why we need to check at the start of every composite operation to see if we have enough space in the array to fit the vertices, which I promptly forgot when moving the code around to make it look pretty. * sigh. Signed-off-by: Chris Wilson commit 55c5f1876e2329a938955967f5d45c814e50beb5 Author: Chris Wilson Date: Fri Dec 3 02:05:05 2010 +0000 Wait on the current buffer to complete when running synchronously. And remove the vestigal wait upon changing crtc as this is more properly done in the kernel. Signed-off-by: Chris Wilson commit 3cc74044ce3546cc7dc2e918cbabbb41a77f4026 Author: Chris Wilson Date: Thu Dec 2 12:07:44 2010 +0000 i965: Amalgamate surface binding tables Signed-off-by: Chris Wilson commit a1fa0dbfdafea32139d4457d81b9d722df955eaf Author: Chris Wilson Date: Thu Dec 2 11:25:05 2010 +0000 i965: Upload an entire vbo in a single pwrite, rather than per-rectangle Signed-off-by: Chris Wilson commit 23437fe6769322d48cc3d264660717475b5d0d74 Author: Chris Wilson Date: Fri Dec 3 01:16:16 2010 +0000 i965: Use reciprocal scale factors to avoid the divide per-vertex-element Signed-off-by: Chris Wilson commit 0bb135c40e5ac1bf7593ec1d68d2815cbf47aa25 Author: Chris Wilson Date: Tue Nov 23 22:27:38 2010 +0000 Disable BLT for i830 and 845G This pair of chipsets seem broken beyond repair, specifically the erratum that causes the wrong PTE entry to be invalidated, so disable our incorrect attempts to use the BLT on those devices. Signed-off-by: Chris Wilson commit 33c08882c0d551afb28baef643279901dcc65fa9 Author: Keith Packard Date: Wed Nov 17 16:37:53 2010 +0800 Mark outputs as DPMSModeOn and restore backlight at mode set The kernel always turns monitors on when doing mode setting, and so no further DPMS action is required. Note this in the mode setting code by marking the updated DPMS mode and restoring any saved backlight level. Signed-off-by: Keith Packard Reviewed-by: Eric Anholt commit cc930a37612341a1f2457adb339523c215879d82 Author: Chris Wilson Date: Sun Nov 14 19:47:00 2010 +0000 uxa: Relax fencing some more for gen3 Allow fenced allocations even for small pixmaps if the kernel supports relaxing fencing (where only the used pages are allocated). Signed-off-by: Chris Wilson commit 3c5b1399e29ef577b8b91655b5e1c215d1b6dfbb Author: Chris Wilson Date: Tue Nov 9 20:20:06 2010 +0000 i915: Disable maximum state addresses As the kernel controls the relocation of state buffers, we should not hard code the maximum permissible value for them. Fixes an eventual hang with full-gtt. Reported-by: Peter Clifton Signed-off-by: Chris Wilson commit 81d355a8dcdfe3d0924bb843bcc0e6546f695391 Author: Chris Wilson Date: Tue Nov 9 09:28:54 2010 +0000 uxa: Fix crash after allocation failure Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31487 Reported-by: Thomas Fjellstrom Signed-off-by: Chris Wilson commit 861ee17ae662ffec2269292f92da7833df508b1a Author: Carl Worth Date: Fri Nov 5 12:55:02 2010 -0700 Update version number to 2.13.901 In preparation for a snapshot. commit aaa436b437839a80d340cc5ad598ec4b47ed2eff Author: Carl Worth Date: Fri Nov 5 12:54:16 2010 -0700 NEWS: Add release notes for 2.13.901 snapshot. An intermediate snapshot to capture recent developments. commit 6b66b45b1ff207b80b81973745f42a776448f764 Merge: a44a63d 9f232ad Author: Carl Worth Date: Fri Nov 5 12:51:55 2010 -0700 Merge commit '2.13.0' This changes the version number and adds the 2.13.0 release notes, (which were otherwise missing from the master branch). commit a44a63d2ff6c01c3dc61de6f736dd441ddd25e52 Author: Chris Wilson Date: Fri Nov 5 09:58:45 2010 +0000 Wait for any pending rendering before switching modes. A perennial problem we have is the accursed WAIT_FOR_EVENT hangs, which occur when we switch the framebuffer before the WAIT_FOR_EVENT completes and upsets the GPU. We have tried more subtle approaches to detected these and fix them up in the kernel, to no avail. What we need to do is to delay the framebuffer flip until the WAIT completes, which is quite tricky in the kernel without new ioctls and round-trips. Instead, apply the big hammer from userspace and synchronise all rendering before changing the framebuffer. I expect this not to cause noticeable latency on switching modes (far less than the actual modeswitch) and should stop these hangs once and for all. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31401 (...) Signed-off-by: Chris Wilson commit 52b32436b9e14a3e13818f80102150ff5bc3c002 Author: Chris Wilson Date: Wed Nov 3 19:42:26 2010 +0000 Downgrade tiling allocation failure to a warning We emitted this message as an error even though we fallback and attempt to allocate a non-tiled framebuffer before failing (with an appropriate error message). Signed-off-by: Chris Wilson commit 18839aaec505f8bbdb0690fe694162bf09a87d5c Author: Chris Wilson Date: Wed Nov 3 18:14:29 2010 +0000 Fallback to shadow for Sandybridge if we don't have access to the BLT If we attempt to emit BLT batches without kernel support, we just end up with EINVAL and no rendering. Prevent this, and avoid uncached rendering, by restoring the shadow fallback paths if there is no BLT support. Signed-off-by: Chris Wilson commit 8ff37667bf864b771d16a58fc5041cb48408b6a8 Author: Eric Anholt Date: Tue Nov 2 10:36:03 2010 -0700 Remove the intermittent GEM_THROTTLE call. This is a holdover from early GEM work when we weren't syncing on the DRI client side. It would keep clients from getting too far ahead and killing their interactivity, by bringing everyone to a halt when anyone was too far ahead. Now, GL clients throttle themselves to avoid the problem, and it turns out that in the case that they don't (long rendering to buffers with no swap), this actually reduces X Server interactivity: instead of lagging of X rendering behind input, you get no response for seconds at a time, then a burst of rendering, then nothing again. Reported by ajax. Tested with moving a window while running cairo-perf-trace on the GL backend (improvement) and X backend (no significant change in responsiveness). commit 540c5742186c26c3aeccb7b5d3ff0f374722a20c Author: Xiang, Haihao Date: Tue Nov 2 11:05:32 2010 +0800 render: use headerless render target write It is weird that some rendercheck cases only work fine with headerless write. Need to update intel-gen4asm to support headerless write Signed-off-by: Xiang, Haihao commit 7a3109312e43ce4c2f600a65fe6bc821a8f0ebde Author: Xiang, Haihao Date: Wed Oct 27 16:51:28 2010 +0800 render: acceleration for composite on Sandybridge Signed-off-by: Xiang, Haihao commit 0ab2c05a291738ee763eb518c46e6dcfe29249a2 Author: Xiang, Haihao Date: Wed Oct 27 16:49:26 2010 +0800 render: fragments for composite on Sandybridge Signed-off-by: Xiang, Haihao commit 21c86548dc2c80632c49ec6ec4da2935a0c99476 Author: Xiang, Haihao Date: Wed Oct 27 16:47:36 2010 +0800 render: fix send instruction used in sampling fragments To prepare for composite on Sandybridge Signed-off-by: Xiang, Haihao commit 8d008ca89d44aa10aeb032d631971aaebb388675 Author: Xiang, Haihao Date: Mon Oct 25 15:39:39 2010 +0800 render: set the surface state base address It is the same as commit 73d4c7d7 Signed-off-by: Xiang, Haihao commit b5ae596a0746e5a37e86f5b0980f9265e0061142 Author: Chris Wilson Date: Mon Nov 1 11:11:09 2010 +0000 Flush BLT batches before starting an atomic RENDER batch Signed-off-by: Chris Wilson commit 42363134bd38fb406d90cdb9e5b227836a793912 Author: Zou Nan hai Date: Mon Nov 1 13:23:36 2010 +0800 Support BLT acceleration on gen6 Signed-off-by: Zou Nan hai Signed-off-by: Chris Wilson commit 5bed685f765671d63642b24e17abd70579c40ddf Author: Zou Nan hai Date: Mon Nov 1 13:23:35 2010 +0800 add BLT ring support gen6+ platform has a BLT engine with seperate command streamer to support BLT commands. Signed-off-by: Zou Nan hai [ickle: merge trivial conflict] Signed-off-by: Chris Wilson commit 6ec3ff134baeac33d9d5821695d5f80843a96c91 Author: Xiang, Haihao Date: Fri Oct 15 11:21:09 2010 +0800 Xv: don't call intel_wait_for_scanline on Sandybridge MI_LOAD_SCAN_LINE_INCL command is not available on sandybridge. Signed-off-by: Xiang, Haihao commit 9e73cbd7eea61f2fe69692056ca446a4d95e17c2 Author: Xiang, Haihao Date: Fri Oct 15 11:20:22 2010 +0800 Xv: enable TextureAdaptor for Sandybridge Signed-off-by: Xiang, Haihao commit 3213849907bf1b1468872668d10764054c1034fe Author: Xiang, Haihao Date: Wed Oct 27 09:54:05 2010 +0800 Xv: setup pipeline for Xv on Sandybridge Signed-off-by: Xiang, Haihao commit 9e4dd27aa848acae1b74b77bbbc0a5bb9f6a502a Author: Xiang, Haihao Date: Thu Oct 21 16:10:14 2010 +0800 Xv: fragments for xv on Sandybridge. Need to update intel-gen4asm to build these fragments Signed--off-by: Xiang, Haihao commit e34b3f6ef5811d5e8d156dd6582df8f442e9792e Author: Xiang, Haihao Date: Thu Oct 21 13:15:45 2010 +0800 Xv: Send instruction doesn't use implied move when sampling YUV surface The two fragments will be reused for sampling YUV surface and send doesn't have implied move on Sandybridge Signed-off-by: Xiang, Haihao commit 73d4c7d7b8efc920ac09885dcace5a536f93b70f Author: Xiang, Haihao Date: Wed Oct 13 09:13:50 2010 +0800 Xv: set the surface state base address To prepare for Xv on Sandybridge. It is easy to fill the binding table without relocation and make sure that the pointer to binding table only uses bits[15:0]. Signed-off-by: Xiang, Haihao commit 5afc7472b155e8e940f12a38baf80c298dc3b364 Author: Chris Wilson Date: Fri Oct 29 12:23:59 2010 +0100 intel: don't pass a dangling pointer to GET_PARAM I fail at cut'n'paste. Signed-off-by: Chris Wilson commit 6b3ce2e8701e7c3fcd30ca07fc13a2cdcf62560d Author: Chris Wilson Date: Fri Oct 29 11:07:50 2010 +0100 uxa: Enable reduced fence sizes for i915 Depends on libdrm 362457715faacd3101929e5f0d8ae250d0ad09df (for HAS_RELAXED_FENCING define). Signed-off-by: Chris Wilson commit b066ddda31e40afa652ae51ffc35025ac3ef6f2a Author: Adam Jackson Date: Sun Oct 3 14:42:56 2010 -0700 intel: Listen for hotplug uevents (V3) This connects the kernel uevent indicating monitor hotplugging to the RandR notification events so that X applications can be notified automatically when monitors are connected or disconnected. This also adds a configuration option to disable hotplug events. V2: missed a #ifdef HAVE_UDEV around some udev-specific declarations V3: document Hotplug option in man page Signed-off-by: Keith Packard commit a1c54f69643671ce296c57d132852e9846cc41d3 Author: Eric Anholt Date: Mon Oct 18 13:28:44 2010 -0700 Fix violation of gen6 requirements for depthbuffer tiling. In general, demoting of tiling of DRI2 buffers seems dubious, as we've got various bits of functionality that won't all work together unless buffers are tiled as expected. This just covers one instance of the problem, caught by assertions in Mesa. Fixes: fbo-1d fbo-d24s8. glean/readPixSanity glean/rgbTriStrip glean/scissor commit 33133a1d38a4dce60d2e135663b545895fc85abc Author: Chris Wilson Date: Sun Oct 17 09:21:06 2010 +0100 display: do not report failure for setting unrecognised properties We need to accept any changes to properties not handled by ourselves -- we can't validate the changes ourselves. Denying those changes breaks EDID reporting, for example. Reported-by: Elvis Pranskevichus Signed-off-by: Chris Wilson commit 8507ef50ba08061ac158848a7c4c136e1755d87e Author: Chris Wilson Date: Wed Oct 13 09:45:59 2010 +0100 Fix driverName regression for i830 from 4083197a Reported-by: Stefan Glasenhardt Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30808 Signed-off-by: Chris Wilson commit 15aab1ef982fb67eb2ea463089f070afd9a2cfe5 Author: Chris Wilson Date: Wed Oct 13 09:50:25 2010 +0100 Move EDID_COMPLETE_RAWDATA define to intel.h to avoid redifinition warning The compiler was simply warning that we defined the name prior to including the original definition, so reorder. Signed-off-by: Chris Wilson commit d2bc2212f8be746e697a65555d6d83bc66d9ce43 Author: Stefan Dirsch Date: Fri Oct 8 17:48:38 2010 +0200 Make driver compile for 1.6 Xserver series again. Part deux. Signed-off-by: Matthias Hopf Acked-by: Chris Wilson commit 5472359d6860af655a3c286d30558540376c9fdb Author: Chris Wilson Date: Fri Oct 8 15:23:13 2010 +0100 dri: Check for pixmap privates before dereferencing them It is still possible for the pixmap allocator to return a software only pixmap (i.e. without an associated GEM buffer or intel_pixmap), so check before dereferencing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30707 Reported-by: Matthias Hopf Signed-off-by: Chris Wilson commit 4083197a44d1a1a05d33654b3c7d6e96d7472fe7 Author: Chris Wilson Date: Thu Oct 7 12:45:02 2010 +0100 Include a chipset generation number to clarify device specific paths. Signed-off-by: Chris Wilson commit 1444ea35706992a1f094fe029e6a7d9eec0f93c6 Author: Chris Wilson Date: Wed Oct 6 12:36:30 2010 +0100 dri+shadow: Only tweak the acceleration of CopyRegion if using shadow. Signed-off-by: Chris Wilson commit f286891d1415fc607f0c1b574e6bce4b3759493e Author: Chris Wilson Date: Wed Oct 6 11:38:48 2010 +0100 dri: Reattach the fake pixmap for the shadow scanout to the drawable. Signed-off-by: Chris Wilson commit 23ee926bcd8ddd7a2785786efdf119e4fae75bfd Author: Chris Wilson Date: Wed Oct 6 10:20:49 2010 +0100 uxa: Skip a pixmap lookup if there is no driver finish access function Signed-off-by: Chris Wilson commit 707901bf98073fb56179a0b61c806f85ef8f413c Author: Chris Wilson Date: Wed Oct 6 08:47:20 2010 +0100 uxa: Re-enable acceleration. A side-effect of discriminating offscreen based on the devPrivate.ptr was that it broke uxa_finish_access and so after any fallback to s/w on a Pixmap, it remained in software for the reminder of its life. Introduce an explicit boolean to mark whether or not hardware acceleration is enabled for a pixmap (with a GEM buffer). Signed-off-by: Chris Wilson commit 54f545e0631a287f421ef6a6f20831624b212cf2 Author: Chris Wilson Date: Wed Oct 6 08:50:13 2010 +0100 Revert "Clear pixmap->devPrivate.ptr [regression in 7c7294e]" This reverts commit 48b4e224297fa807be0e2bc7a67bf7e94579e8de. The better fix is to manually mark the pixmap when acceleration is and is not permitted. Whilst the devPrivate.ptr are invalid upon creation, it is not worth carring code that serves no purpose. commit d1925deedd70c6c4374e42de5aa44989fe328b58 Author: Chris Wilson Date: Wed Oct 6 00:17:03 2010 +0100 Clear pixmap->devPrivate.ptr [regression from 7c7294e] ModifyPixmapHeader(pixdata = NULL) does not clear the pixmap->devPrivate.ptr, instead the NULL value is interpreted as meaning to keep the current value. (This is similar to the interpretation of the other invalid values like depth=-1 which also mean not to change the current property). However pixadata=NULL is indeed a valid value, and in 7c7294e, devPrivate.ptr == NULL was used to differentiate a bo pixmap from a system pixmap. Except that we never did clear the ptr as intended, and so X would immediately crash. Signed-off-by: Chris Wilson commit 4bf2182bf9ee64795e2bf524fedf7b6c36f3cd03 Author: Chris Wilson Date: Tue Oct 5 09:59:04 2010 +0100 shadow: Use a cacheable shadow for all generations Always avoid direct rendering to the uncached scanout buffer, redirecting all 2D access to the shadow instead. Then for the couple of platforms where either the BLT is not ready or cannot be trusted (i8xx) perform the front buffer fixup using the uncached writes from the CPU. Signed-off-by: Chris Wilson commit b27a521214728052b8b10342aaacbaf1622b8e2c Author: Chris Wilson Date: Mon Oct 4 20:31:44 2010 +0100 shadow: Enable shadow by default on SandyBridge SandyBridge 2D support is far from complete, so instead of permanently falling back and always using uncached GTT mapping for rendering, use the shadow buffer instead. Signed-off-by: Chris Wilson commit 3e641459f8997f45288cc3cb314e50f2b5a629fd Author: Chris Wilson Date: Mon Oct 4 20:31:01 2010 +0100 shadow: Disable BLT for SandyBridge The blitting code is incorrect for SandyBridge so disable until the BLT ring is ready. Signed-off-by: Chris Wilson commit 7c7294ec00d6c3a454a17a1b9983d14d0655162c Author: Chris Wilson Date: Mon Oct 4 11:56:27 2010 +0100 shadow+dri2: Allow dri2 to be independently enabled with shadow To enable DRI we create GEM buffers for the client to render into with hardware acceleration. In order to maintain coherency between any 2D render operations with the independent 3D clients (this includes the reading of 2D rasterisation by the direct rendering client, e.g. compiz using texture_from_pixmap) we need to replace the shadow pixmap with the GTT mapping. Therefore 2D rendering to a DRI buffer will be to uncached memory and thus penalised -- but the direct rendering clients will have full hardware acceleration. Signed-off-by: Chris Wilson commit 16a5d0ee3ca4d41af6a6876a8baf81e3f715781d Author: Chris Wilson Date: Mon Oct 4 11:21:17 2010 +0100 shadow: Map the scanout directly on i8xx Even with the minimal use of the BLT to copy from the GTT shadow to the GTT scanout, i830 was still hanging. Just write to the scanout directly. Signed-off-by: Chris Wilson commit 516d235c5b3bd51e9533925140d95d3b4533129c Author: Chris Wilson Date: Mon Oct 4 11:10:57 2010 +0100 Split shadow handling routines to their own file. This is about to get messy, so separate out the shadow from the normal code. Signed-off-by: Chris Wilson commit 455f2939a661764ebb8d1747d44e16a0a8937808 Author: Chris Wilson Date: Sat Oct 2 13:32:58 2010 +0100 Do not claim the PCI device if !KMS By returning FALSE whilst probing if we can't find a KMS driver, we allow X to fallback to trying the VESA driver -- rather than failing. The initial idea for this was by Julien Cristau. Reported-by: Julien Cristau Signed-off-by: Chris Wilson commit 97fea2fd0c36d78f4e940b124a7886c4a3f3dfc7 Author: Chris Wilson Date: Sat Oct 2 10:05:59 2010 +0100 legacy/i810: Remove pVisualConfigs Completely unused pulling in an undesired glxproto dependency. Reported-by: Cyril Brulebois Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30554 Signed-off-by: Chris Wilson commit 8784c4f5a1524fb979b00c7ce7981cbc1dcf0ec0 Author: Chris Wilson Date: Fri Oct 1 21:40:36 2010 +0100 video: Disable TextureAdaptor for Sandybridge The acceleration code does not yet exist, so we try to use gen4 shaders which hangs the chip and makes everybody upset. Disable it until such a time as support is written for Sandybridge XVideo. Reported-by: Matthias Hopf Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30500 Signed-off-by: Chris Wilson commit 9f232ad67c72b7869dcd112207bc41dc01d7d104 Author: Carl Worth Date: Thu Sep 30 08:45:49 2010 -0700 Increment version to 2.13.0 For the new, major release. commit 99ec9bb0f1eaf2e5c04614957a51624a928526e5 Author: Carl Worth Date: Thu Sep 30 08:45:15 2010 -0700 Add release notes for the 2.13.0 release. Which is functionalliy identical to 2.12.902. commit 345c963e443ec325f1ff530512a356ddb318ff70 Author: Zhenyu Wang Date: Thu Sep 30 10:58:49 2010 +0800 Always use tiling on Sandybridge Sandybridge requires kind of buffer must be tiling, like depth. And we would or have all tiling cases handled fine. So not allow user to turn off tiling on Sandybridge+ may be fine. Signed-off-by: Zhenyu Wang commit d4c013cb9d92d2959c9a98eca20e43ab14ae22e3 Author: Carl Worth Date: Tue Sep 28 20:49:52 2010 -0700 Increment version to 2.12.902 Just before making the 2.12.902 (2.13-rc2) snapshot. commit 35e7da7df0b286b5168a85d540cc9fdf55c1cae6 Author: Carl Worth Date: Tue Sep 28 20:49:10 2010 -0700 Add release notes for the 2.12.902 snapshot. Summarizing the 5 recent changes to the driver. commit 5704955538f59a2b7a5eff67cc23953d2f27d523 Author: Carl Worth Date: Tue Sep 28 20:44:40 2010 -0700 Fix to depend on the (just-released) libdrm >= 2.4.22 With libdrm < 2.4.22, the compilation of xf86-video-intel would fail due to an undefined DRM_MODE_CONNECTOR_eDP. We now ensure that a sufficiently new libdrm is available before compiling. commit 40c9d180bf43af84ae05d88e993deedf76e263e6 Author: Chris Wilson Date: Sun Sep 26 23:09:04 2010 +0100 Retry framebuffer allocation if first attempt fails. If we are tiled, we may fail the allocation due to an EIO and so not being able to set tiling. Try again with an untiled request in this case. Signed-off-by: Chris Wilson commit 537e73f3f935b917f2f5f9b51499cb29d65e3889 Author: Chris Wilson Date: Fri Sep 24 17:37:41 2010 +0100 Disable dri2 after forcing fallbacks If we force fallbacks, then we will only create pixmaps in system memory, preventing DRI2 from passing valid bo names to the clients. In this case, they will just fallback to swrast. If we disable DRI2 after forcing fallbacks (e.g. regenerating after a GPU hang or explicitly disabled with the shadow buffer) then it is simpler just to disable the extension and allow mesa to use pure swrast. Reported-by: Julien Cristau Signed-off-by: Chris Wilson commit b84925b9c0842ba4dfa3481c09d3a80f84db4838 Author: Matthias Hopf Date: Tue Aug 17 18:05:02 2010 +0200 Make driver compile for 1.6 Xserver series again. Signed-off-by: Matthias Hopf commit 99f8d68d3dbc54fdd7de4a6df546cfa89422a0c2 Author: Chris Wilson Date: Wed Sep 22 12:34:00 2010 +0100 display: Refactor is_panel() Signed-off-by: Chris Wilson commit 4ba27e1f2198fc10a1dd268ed9f137bac6e80086 Author: Carl Worth Date: Tue Sep 21 17:43:01 2010 -0700 Bump version to 2.12.901 Just prior to pushing out this new snapshot. commit 334265fa5ef18405bd8c897343fff49ad53f5fce Author: Carl Worth Date: Tue Sep 21 17:42:21 2010 -0700 NEWS: Add notes for the 2.12.901 snapshot (Otherwise known as rc1 for 2.13) commit bfba6d6148b938588ffbefdf04f4e71683c66dfd Author: Krzysztof Halasa Date: Tue Sep 21 22:56:26 2010 +0100 Allow interlaced modes. This may not the best method, but it should be a good base on which to build... Signed-off-by: Chris Wilson commit f63c7df6866fed61551d39209b1a262e2a0c4b28 Author: Zhenyu Wang Date: Fri Sep 17 16:39:12 2010 +0800 Disable swap buffer wait on Sandybridge MI_LOAD_SCAN_LINE_INCL command is not available on sandybridge. I haven't got reply on any substitution for it, so turn it off for now. Signed-off-by: Zhenyu Wang commit 55b5fe888002258dd863d41977bfbfcf1a922179 Author: Chris Wilson Date: Thu Sep 16 16:50:13 2010 +0100 Add alternate pci-id for B43 Confirmed by http://en.wikipedia.org/wiki/Intel_GMA Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30221 Signed-off-by: Chris Wilson commit 08c2caca48323d6d5701dcef3486f850619d7905 Author: Chris Wilson Date: Sun Sep 12 12:34:51 2010 +0100 uxa: Apply source clipping to blits Yes, this should be done in the higher layers. Yes, I have written code to that. No, it is not ready, hence add the sanity check to the SRC_COPY_BLT. This isn't the first report that I've seen, but will be the last. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30120 Reported-by: rezbit.hex@gmail.com Signed-off-by: Chris Wilson commit ae160d7fbfc79e78dad8702efcc55d9c0c25ff67 Author: Chris Wilson Date: Fri Sep 10 13:19:12 2010 +0100 shadow: Simply modify the Screen pixmap header This is a slightly less risky strategy than having to remember to update all pointers to the old Screen pixmap. Signed-off-by: Chris Wilson commit 0515256490d5bcd55f85af83b84918d1bfe7f8f8 Author: Chris Wilson Date: Fri Sep 10 00:08:58 2010 +0100 display: Free the EDID blob after we copy it to the output, not before. Signed-off-by: Chris Wilson commit 2b96c18165d713cd6781dbf217ec33e11cc961bc Author: Chris Wilson Date: Wed Aug 25 12:56:43 2010 +0100 Enable a shadow buffer and disable GPU acceleration. An attempt to workaround the incoherency in gen2 chipsets, we avoid using dynamic reallocation as much as possible. The first step is to disable allocation of pixmaps using GEM and simply create them in system memory without a backing buffer object. This forces all rendering to use S/W fallbacks. The second step is to allocate a shadow front buffer and assign that to the Screen pixmap. This ensure that the front buffer remains in the GTT and pinned for scanout. The shadow buffer will be rendered to in the normal fashion via the Screen pixmap, and be marked dirty. In the block handler, the dirty shadow buffer is then blitted (using the GPU) over the front buffer. This should completely avoid having to move pages around in the GTT and avoid incurring the wrath of those early chipsets. Secondly, performance should be reasonable as we avoid the ping-pong caused by the small aperture and weak GPU forcing software fallbacks. Signed-off-by: Chris Wilson commit 0fa4321a765126228170ecb9536f32c134886d51 Author: Jesse Barnes Date: Tue Sep 7 13:56:16 2010 -0700 KMS: initialize backlight support for eDP panels too Since being able to control the backlight is handy. Signed-off-by: Jesse Barnes commit f56c839f30ec39ea22bbf6a7fda4cefd7cbfbfc2 Author: Jesse Barnes Date: Tue Sep 7 13:53:47 2010 -0700 KMS: rename LVDS fields to reflect actual usage These are used for panels, not just LVDS connections, so name them as such. Signed-off-by: Jesse Barnes commit 0d26d950fdada1f59dc6cb31fe2f03004825f773 Author: Jesse Barnes Date: Tue Sep 7 13:46:58 2010 -0700 KMS: add fake EDID on eDP too This gives us a few more standard modes on eDP panels with just a simple fixed timing in the VBT, just like on older, LVDS attached panels. Fixes FDO bug https://bugs.freedesktop.org/show_bug.cgi?id=30069. Reviewed-by: Chris Wilson Tested-by: Manoj Iyer Signed-off-by: Jesse Barnes commit 273d34fbc43e54a8539fbe7efc1dca66bbb4e6dc Author: Chris Wilson Date: Tue Sep 7 12:57:04 2010 +0100 display: Query current level after finding max value. The current backlight value is clamped to the valid range [0, max] and so as we queried the value before setting the max, we forced the current backlight to 0 and so set it to be zero on initialising the display. Fixes: Bug 30063 - start X will modify brightness value to zero https://bugs.freedesktop.org/show_bug.cgi?id=30063 which is a regression due to 38f940dfea494d3093236f065392c431be06ae6e. Signed-off-by: Chris Wilson commit 53767cc0d0a58d36cd445da3a31c65b349eebbba Author: Zhenyu Wang Date: Tue Sep 7 14:17:05 2010 +0800 Add more sandybridge graphics device ids New ids for GT2 and GT2+ on desktop and mobile sandybridge, and server sandybridge device ids. commit 00f6af2c8ec899258ffab60dc2d9d80c4d9daec8 Author: Chris Wilson Date: Sat Sep 4 18:45:11 2010 +0100 display: Set MONITOR_EDID_COMPLETE_RAWDATA for large EDIDs Quoting Adam Jackson: "But the X driver looks like it never sets MONITOR_EDID_COMPLETE_RAWDATA, which means the X core doesn't know that any sections beyond the first are present, so it won't ever hand back more than 128 bytes to clients. Boo." This patch is based on his. Signed-off-by: Chris Wilson commit 501e78b0095b00a635dc1dc182fc132f14f08f22 Author: Chris Wilson Date: Sat Sep 4 12:37:39 2010 +0100 Force use of GTT and fence registers for mapping tiled objects If the buffer object is tiled, we need to use the fence registers to perform the appropriate untiling for CPU access. Ensure that we always take this path for tiled objects, regardless of their size. Signed-off-by: Chris Wilson commit b7a8087fbc5cbd944f8345b8a098270c1f63ebab Author: Chris Wilson Date: Wed Aug 25 15:44:20 2010 +0100 Revert "Leave adjustment of backlight to the driver." This reverts commit 9c3e34703dcdc2155faeb2c1886930def19d9989. This commit is not ready, as first the driver needs to handle all controllers, especially those that ignore the BLC and require their own interface. Fortunately, by moving that discovery into the kernel - where it just means finding which ACPI device is attached to the video and has a backlight interface - the userspace code should become much more sane, and work even with multi-gpu, multi-lid systems. But that is for tomorrow. commit 68a5ad497b557ab9e8bff301098ea78c84d385a2 Author: Chris Wilson Date: Wed Aug 25 14:59:04 2010 +0100 uxa: Fallback if faced with large A1 glyphs. Rather than assert, we should fixup the use of large A1 glyphs. However, the simplest approach is to simply fallback to s/w. Fixes: Bug 29430 - [UXA] Crash due assert (uxa_pixmap_is_offscreen(src_pixmap)); https://bugs.freedesktop.org/show_bug.cgi?id=29430 Signed-off-by: Chris Wilson commit 9c3e34703dcdc2155faeb2c1886930def19d9989 Author: Chris Wilson Date: Sun Aug 22 21:27:45 2010 +0100 Leave adjustment of backlight to the driver. commit 104cd0554bde1d109a54db7a93700d5edfabd914 Author: Zhenyu Wang Date: Mon Aug 23 09:48:22 2010 +0800 Add sandybridge D0 support Signed-off-by: Zhenyu Wang commit 271dda84be2f81b32dbe5947e64f5558a89e385e Author: Chris Wilson Date: Sun Aug 22 19:57:24 2010 +0100 display: Use the native intel backlight controller If the i915 driver exposes a native ACPI interface to modify the panel backlight use it in preference to the generic interfaces. On multi-GPU systems, the panel backlight is meant to be connected via the IGP and this ensures that we always find the right interface. Fixes: Bug 29273 - XORG Intel driver chooses wrong acpi_video to control brightness in multi-GPU system https://bugs.freedesktop.org/show_bug.cgi?id=29273 Signed-off-by: Chris Wilson commit 42312bbd8c9cbadf0adc4556b76987857d105bd9 Author: Chris Wilson Date: Sun Aug 22 09:54:18 2010 +0100 Remove accel_pitch_alignment This has to be 64 on all generations currently, so replace the variable with a constant. Signed-off-by: Chris Wilson commit 7f86e5b5da88201e5443e26619c35a1a9745cf68 Author: Matt Turner Date: Sat Aug 21 17:32:25 2010 -0400 Replace ROUND_* macros with ALIGN. Signed-off-by: Matt Turner Signed-off-by: Chris Wilson commit b611bced15c30f7bcd03106ce90668b684c1ada6 Author: Matt Turner Date: Sat Aug 21 17:32:24 2010 -0400 Use ALIGN macro instead of open coding it. Signed-off-by: Matt Turner Signed-off-by: Chris Wilson commit 8b04b350a983b89eb2d741f55baa297a933ac6ea Author: Chris Wilson Date: Thu Aug 19 20:05:08 2010 +0100 Open-code DRICreatePCIBusID() During -configure we would attempt to query the availablility of KMS before the DRI module was loaded, thus we were unable to create a valid bus identifier and so the query failed and we disowned the device. Fixes: Bug 29611 - Xorg -configure fails https://bugs.freedesktop.org/show_bug.cgi?id=29611 Reported-by: Sergey Samokhin Signed-off-by: Chris Wilson commit c882f6a22a862c1664c375e05e5e6fc4bdb04edb Author: Chris Wilson Date: Wed Aug 18 10:21:22 2010 +0100 Move registration of vsync fd from pre-init to screen-init Marty Jack reported an issue he found where the page-flipping handler was being lost on server reset. This results in the swap completion notification being lost, with the sporadic hang of full screen applications like Compiz, flash and even glxgears! Fixes: Bug 29584 - Server in compute loop https://bugs.freedesktop.org/show_bug.cgi?id=29584 There are also several possibly related bugs with similar symptoms, i.e. OpenGL applications hanging on missed swap notifications. Reported-by: Marty Jack Signed-off-by: Chris Wilson Cc: Keith Packard commit 19c48d3b3f33582baa87a9b3a9189e320e4cea45 Author: Chris Wilson Date: Mon Aug 9 10:13:58 2010 +0100 display: outputs are enabled automatically by KMS When an output is attached to a crtc and that crtc is enabled, the output is automatically enabled so we can remove the redundant manual dpms on. Signed-off-by: Chris Wilson commit 6304cb048c745be81dae13f1d936996e04eaa530 Author: Chris Wilson Date: Thu Aug 5 18:13:55 2010 +0100 display: Minor cleanup for adding extra LVDS modes Signed-off-by: Chris Wilson commit 41ae9564350cba8ac9f040f22bad8740e08e14c4 Author: Chris Wilson Date: Thu Aug 5 18:13:30 2010 +0100 display: Refactor EDID attachment to output. Signed-off-by: Chris Wilson commit a8919ab2967a8425e1cdc04b73702ce534f6abf0 Author: Chris Wilson Date: Thu Aug 5 09:59:22 2010 +0100 Revert "display: Cache whether we have probed for an EDID" Dave Airlie advised that hotplug detection can be unreliable and that mode caching, in general, should be done in the kernel in any case. This reverts commit 622e600069ab0efd22586c7a71eecbd4baf21c40. commit 622e600069ab0efd22586c7a71eecbd4baf21c40 Author: Chris Wilson Date: Wed Aug 4 09:57:12 2010 +0100 display: Cache whether we have probed for an EDID Remember for the detection cycle whether we have already probed for the EDID -- as this can be slow. Signed-off-by: Chris Wilson commit a6a707ca13097b85b319283b3a174b1986056ab8 Author: Chris Wilson Date: Wed Aug 4 09:54:28 2010 +0100 display: Embed the lvds size into the connector Remove one very common allocation. Signed-off-by: Chris Wilson commit 6c7d105ccae32fba49a07a03b726cc3fe2de3d27 Author: Chris Wilson Date: Wed Aug 4 09:51:34 2010 +0100 display: Handle cursor error paths. Check that the cursor was allocated before freeing. Signed-off-by: Chris Wilson commit 38f940dfea494d3093236f065392c431be06ae6e Author: Chris Wilson Date: Wed Aug 4 09:50:14 2010 +0100 display: Tidy backlight initialisation Mostly whitespace and a single error-code fix. Signed-off-by: Chris Wilson commit 2b7263b771d94401cb4ea6cbf4dc7a295eeda7c0 Author: Chris Wilson Date: Wed Aug 4 09:46:01 2010 +0100 display: Check for buffer overrun in output name lookup. The kernel may know about more types than we do, so protect ourselves from reading from beyond the end of the string array. Signed-off-by: Chris Wilson commit 56629166915155628e70e6ec8052c0d220a8bb68 Author: Dave Airlie Date: Wed Aug 4 15:35:41 2010 +1000 intel: add output names for later additions to kernel commit fe7dee7fe1cf12665bc5ba3923cd1a8f74cbbe57 Author: Chris Wilson Date: Sun Aug 1 14:15:09 2010 +0100 Remove the final references to the drmmode prefix In particular fix the compile regression for intel_do_pageflip(). Signed-off-by: Chris Wilson commit 4f8b279f32cfda0f3b8fa1542b3fe00051520012 Author: Chris Wilson Date: Sun Aug 1 12:35:57 2010 +0100 intel_display: Miscellaneous tidy A mixture of whitespace and closing of leaks on error paths. Signed-off-by: Chris Wilson commit db7cd7b9f0ce8e435c121071eaadf8e6dcebf9e8 Author: Chris Wilson Date: Sun Aug 1 11:25:42 2010 +0100 Rename drmmode_display to intel_display And fixup all the drmmode_* functions to have an intel prefix and categorise those into intel_mode, intel_crtc, intel_output and intel_property so that the functions are a little more self-descriptive and, more importantly, are consistent. Signed-off-by: Chris Wilson commit 0be3e95c844247746742805830860ace9f546d99 Author: Kristian Høgsberg Date: Fri Jul 30 09:39:58 2010 -0400 Remove explicit batchbuffer submit in DRI2 copyregion Now that we submit from the flush callback chain, we know we'll always submit before the client receives the reply or event that blocks it from rendering the next frame. commit 69d65f9184006eac790efcff78a0e425160e95aa Author: Kristian Høgsberg Date: Thu Jul 29 18:31:48 2010 -0400 Submit batch buffers from flush callback chain There are a few cases where the server will flush client output buffers but our block handler only catches the most common (before going into select). If the server flushes client buffers before we submit our batch buffer, the client may receive a damage event for rendering that hasn't happened yet. Instead, we can hook into the flush callback chain, which the server will invoke just before flushing output. This lets us submit batch buffers before sending out events, preserving ordering. Fixes 28438: [bisected] incorrect character in gnome-terminal under compiz https://bugs.freedesktop.org/show_bug.cgi?id=28438 Signed-off-by: Kristian Høgsberg commit b68d4fcab5d671946c187947f5d00aedff939852 Author: Chris Wilson Date: Wed Jul 28 13:41:41 2010 +0100 drmmode: Only treat a backlight as connected if it has a non-zero max Optimistically might help https://bugs.freedesktop.org/show_bug.cgi?id=29273 Signed-off-by: Chris Wilson commit 938ef4eaec0e406e198105d866f6d2a1be5e0ef8 Author: Kristian Høgsberg Date: Wed Jul 28 07:57:42 2010 -0400 legacy: Remove long gone use of GlxSetVisualConfigs() This removes the last dependeny on anything GL/GLX in the driver. commit fba6651a92af76d7a8d034e1acfdad5023cd311c Author: Kristian Høgsberg Date: Tue Jul 27 12:59:39 2010 -0400 Drop use of GL types in the driver Still used in i810 for building the glx visuals. commit 34b9d45be6cb0c42f031677a0bda8a5013472ae8 Author: Jesse Barnes Date: Tue Jul 27 09:10:04 2010 -0700 Revert "configure.ac: add xi and gl requirements" This reverts commit d580fa82a1cf339d2d1fd1055d137c0b23cd04f3. Oops, these should be server or other package dependencies, we don't actually need them for xf86-video-intel. commit d580fa82a1cf339d2d1fd1055d137c0b23cd04f3 Author: Jesse Barnes Date: Mon Jul 26 16:44:19 2010 -0700 configure.ac: add xi and gl requirements Could probably be earlier versions, but having these here makes packaging easier. commit f46a8dfce59013ce593c15f7166598d0fff9198f Author: Daniel Vetter Date: Mon Jul 26 23:02:02 2010 +0200 video: kill do { ... } while (ret != -EINTR) loops Chris Wilson likes to sprinkle these all over, but in this case it's just misleading. libdrm already does this for us. Signed-off-by: Daniel Vetter commit 1cb69b9a77b7afbb4358757556065e10a6b15ea8 Author: Daniel Vetter Date: Mon Jul 26 23:00:20 2010 +0200 video: kernel overlay needs triple buffering The kernel overlay code does asynchronous overlay flips. So keep onto two old buffers, for otherwise the rendering of the next frame might overwrite the contents of the currently still displaying one. With ~25fps videos and ~50 Hz screens that's rather unlikely, still, fix it. Signed-off-by: Daniel Vetter commit 68df6b2790891683ee2e58daaad34ef17ae344f5 Author: Gaetan Nadon Date: Fri Jul 23 17:39:37 2010 -0400 simplify Makefile as per-target compilation flags are not needed Per-target compilation flags (libIntelXvMC_la_CFLAGS) are required when multiple targets which require different compiler flags, are build in the same makefile. Automake issues a command with -c and -o flags which not all compilers support. The object fles are prefixed with libIntelXvMC_la. The macro AM_PROG_CC_C_O must then be used to provide this feature on compilers that do not have it. If not, a warning is issued at make time. This macros checks for compiler support and if missing, uses a "compile" script it generates in the package root directory. Currently the driver uses per-target flags but the macro is missing. Rather than adding the macro, this patch stops using per-target flags by using the AM_CFLAGS variable for all targets in the makefile, as there is only one. Acked-by: Chris Wilson Signed-off-by: Gaetan Nadon commit 0ae30b6d1f4f6c2f2db9443f1027ea41849ad087 Author: Gaetan Nadon Date: Wed Jul 21 16:49:04 2010 -0400 config: add comments for main statements commit b12b2219677d94933774955b50545efceff57279 Author: Gaetan Nadon Date: Wed Jul 21 16:07:00 2010 -0400 config: replace deprecated use of AC_OUTPUT with AC_CONFIG_FILES Signed-off-by: Gaetan Nadon commit 8b2d65da41461735b1138fdd6e0efc96419cd815 Author: Gaetan Nadon Date: Wed Jul 21 14:37:41 2010 -0400 config: replace deprecated AC_HELP_STRING with AS_HELP_STRING Signed-off-by: Gaetan Nadon commit 3feeef5294b1a2df05a25f4f4eb6400be6cc4ee1 Author: Gaetan Nadon Date: Wed Jul 21 14:05:22 2010 -0400 config: replace deprecated AM_CONFIG_HEADER with AC_CONFIG_HEADERS Signed-off-by: Gaetan Nadon commit 74a828e286c46473b8edf6de32c1989c052dd82c Author: Gaetan Nadon Date: Wed Jul 21 09:27:42 2010 -0400 config: complete AC_INIT m4 quoting Signed-off-by: Gaetan Nadon commit 33ec66d7006e2a7e287fd77c53a31db49220591a Author: Gaetan Nadon Date: Tue Jul 20 21:54:11 2010 -0400 config: remove unrequired AC_SUBST([DRI_CFLAGS]) This macro is called by PKG_CHECK_MODULES Signed-off-by: Gaetan Nadon commit b20b8ac937505310fbe68f07e42cafe4ba88da76 Author: Gaetan Nadon Date: Tue Jul 20 20:24:42 2010 -0400 config: remove unrequired AC_HEADER_STDC Autoconf says: "This macro is obsolescent, as current systems have conforming header files. New programs need not use this macro". Signed-off-by: Gaetan Nadon commit 9fe5169fffeee10b1262f160a15c11c283e2faa7 Author: Gaetan Nadon Date: Tue Jul 20 19:41:31 2010 -0400 config: remove AC_PROG_CC as it overrides AC_PROG_C_C99 XORG_STRICT_OPTION from XORG_DEFAULT_OPTIONS calls AC_PROG_C_C99. This sets gcc with -std=gnu99. If AC_PROG_CC macro is called afterwards, it resets CC to gcc. Signed-off-by: Gaetan Nadon commit e6b8811e5bb30e2cd4e35b1fe84d69f18a73ee0e Author: Gaetan Nadon Date: Tue Jul 20 18:45:19 2010 -0400 config: update AC_PREREQ statement to 2.60 Unrelated to the previous patches, the new value simply reflects the reality that the minimum level for autoconf to configure all x.org modules is 2.60 dated June 2006. ftp://ftp.gnu.org/gnu/autoconf/autoconf-2.60.tar.gz Signed-off-by: Gaetan Nadon commit 2d85efaa36791bd441f069b612ee86387353d1ed Author: Gaetan Nadon Date: Tue Jul 20 16:15:29 2010 -0400 config: upgrade to util-macros 1.8 for additional man page support Use MAN_SUBST now supplied in XORG_MANPAGE_SECTIONS The value of MAN_SUBST is the same for all X.Org packages. commit 142ffa287236adbc3c5f6ead46c63c4c541ace0c Author: Chris Wilson Date: Thu Jul 22 16:42:26 2010 +0100 video/i915: ValidateGC after setting clip. Order is important. And ensure that the scratch GC is performing clip by children. Fixes: Bug 29213 - video artifacts if used dualscreen mode https://bugs.freedesktop.org/show_bug.cgi?id=29213 Signed-off-by: Chris Wilson commit c57840b272ba88fddf22484929608431879b0fab Author: Chris Wilson Date: Wed Jul 21 09:06:06 2010 +0100 uxa: Check for failed pixmap allocation Fixes: Bug 29187 - crash in intel_drv https://bugs.freedesktop.org/show_bug.cgi?id=29187 Backtrace: 0: /usr/bin/X (xorg_backtrace+0x28) [0x466808] 1: /usr/bin/X (0x400000+0x67c79) [0x467c79] 2: /lib/libpthread.so.0 (0x7ff19b297000+0xef60) [0x7ff19b2a5f60] 3: /usr/lib/xorg/modules/drivers/intel_drv.so (0x7ff197986000+0x34684) => uxa/uxa-render.c:841 Signed-off-by: Chris Wilson commit 7a4bfaf42412f373bbc8ebe1536018dcacde7436 Author: Dave Airlie Date: Tue Jul 20 11:30:44 2010 +1000 intel: respect tiling disable. For testing purposes its nice to know tiling isn't being used anywhere. Signed-off-by: Dave Airlie commit d48d584a822ae5adae64f6d5f09faa4ac9b8de73 Author: Chris Wilson Date: Thu Jul 15 14:37:59 2010 +0100 video: Free the buffers immediately after turning off. Signed-off-by: Chris Wilson commit 24bdfe0d5eb4e890e9c63bbb4617efaa0768ab7f Author: Chris Wilson Date: Thu Jul 15 13:54:04 2010 +0100 video: Reuse the old buffers. After passing the new buffer to the kernel, the old buffer is unpinned and becomes available for re-use. So keep hold of the old buffer and swap after a PutImage. This greatly reduces the amount of CPU time consumed by the kernel on behalf of the video overlay -- by only allocating two buffers for an entire sequence, we avoid clflushing and page allocation on every frame. Signed-off-by: Chris Wilson commit 2267e5928bd90a6997970584462bd97df447e819 Author: Chris Wilson Date: Tue Jul 13 10:36:34 2010 +0100 Workaround a broken container_of define in list.h commit 798c3a5fc6e3d44c9b94e6bc4e72385a10939f52 Author: Chris Wilson Date: Tue Jul 13 10:30:33 2010 +0100 Teardown the bufmgr on shutdown as well. Signed-off-by: Chris Wilson commit b2e98227d11a60e90b3ea518f14962f2764ffa68 Author: Chris Wilson Date: Tue Jul 13 10:15:34 2010 +0100 Remove the duplicate drmmode prototypes. Signed-off-by: Chris Wilson commit 5de1b74d64f807b59c730871d4cb171484db9780 Author: Chris Wilson Date: Tue Jul 13 09:34:53 2010 +0100 modes: There may be more than one crtc and output... DESTROY THEM ALL! In order to cleanup all CRTCs and outputs on shutdown, we need to keep a list of the individual structures and iterate over that list on shutdown. Also, the output and crtcs are configured just once and not for each screen generation so move the shutdown to the termination and not on CloseScreen. Oops. Signed-off-by: Chris Wilson commit 3a7c25ff8ddd45c9d9eca5cc2228552847ca9e7d Author: Chris Wilson Date: Mon Jul 12 19:47:46 2010 +0100 video: Apply overlay stride errata for i830 and i845 Due to an erratum on these chipsets, the overlay stride must be a multiple of 256 bytes. Signed-off-by: Chris Wilson commit 56e5816252afbc7dd555c308ca678fce7ee584cc Author: Chris Wilson Date: Mon Jul 12 17:26:37 2010 +0100 video: Copy DummyEncoding into each adapter. As we use the static DummyEncoding and may attempt to modify it for each adaptor (on each device), we should use copies instead. Signed-off-by: Chris Wilson commit e30f0338fbf894fa3fdab20f4f9a97495cd341da Author: Keith Packard Date: Thu Jul 1 09:56:40 2010 -0400 Destroy screen pixmap on screen close. This avoids a memory leak on server reset. Signed-off-by: Keith Packard [ickle: Added comments from Keith that explain the necessity of destroying the pixmap ourselves and why chaining up in this instance is not the correct approach.] Reviewed-by: Chris Wilson commit 6e08b0f48f0d6ddaca963de6f4fd3b56f32512c6 Author: Fernando Carrijo Date: Thu Jul 1 07:15:22 2010 -0300 Purge macro NEED_EVENTS Signed-off-by: Fernando Carrijo Acked-by: Tiago Vignatti Reviewed-by: Alan Coopersmith commit 5ce3f536b7169a1ee9eadf830e61bab230dd7239 Author: Chris Wilson Date: Fri Jul 9 14:06:43 2010 +0100 drmmode: Destroy the output on shutdown Signed-off-by: Chris Wilson commit 6ff369cd2602497ee11273b50f76d1a7bf25991d Author: Chris Wilson Date: Fri Jul 9 14:00:31 2010 +0100 drmmode: Destroy Crtc on screen shutdown Should fix: Bug 26946 - CRTC cursor BO leak in 2D https://bugs.freedesktop.org/show_bug.cgi?id=26946 Signed-off-by: Chris Wilson commit 6fba8c449f61341a98a5ae8d97effa6fd0610fd4 Author: Chris Wilson Date: Fri Jul 9 12:12:13 2010 +0100 Add support for I854. I spotted that the kernel knew of the I854, but the pci-id was never added to the ddx. Signed-off-by: Chris Wilson commit 141e88c8730a099a6ca5eab1350c2e53a680cb0d Author: Chris Wilson Date: Fri Jul 9 12:11:07 2010 +0100 video: forgotten amendment to previous commit. An extra sanity check to skip the wait if all clipped... Signed-off-by: Chris Wilson commit 272d1c14a39c32ade39b5a8b080a891f2b3d6e8e Author: Chris Wilson Date: Fri Jul 9 10:41:19 2010 +0100 video: apply the crtc box checks from dri. The dri code is much more careful in ensuring that the scan lines that is waits for are valid. Copy this code to video, with a bit of work this can be refactored, and perhaps even teach dri how to handle rotated front buffers. References: Bug 28964 - [i965gm] GPU infinite MI_WAIT_FOR_EVENT while watching video in Totem https://bugs.freedesktop.org/show_bug.cgi?id=28964 Signed-off-by: Chris Wilson commit 75850e824bd66b961b9ce21696d9090169f7b28f Author: Evan McClain Date: Thu Feb 25 01:51:42 2010 -0500 Add mbp_backlight support. Acked-by: Julien Cristau commit a2aa4c23f65b03c389c2ba8eac0298dfb205e67d Author: Dave Airlie Date: Mon Jul 5 14:02:42 2010 +1000 uxa: oops typo in previous commit commit feff2ec80eeeba5074d19efcddf4867adf639b4f Author: Dave Airlie Date: Mon Jul 5 09:07:08 2010 +1000 uxa: don't compare planemask with FB_ALLONES. planemask is an unsigned long initialised to ~0, on 64-bit this is not equal to an (unsigned int)-1. Use the macro provided to do this. Signed-off-by: Dave Airlie commit 7ad9c0bebf2c71db574e0302264859ce53cecd37 Author: Jesse Barnes Date: Fri Jul 2 12:39:27 2010 -0700 add cscope files to gitignore commit afcd41820d7481912b49093670e9d7a4a6a2338f Author: Chris Wilson Date: Thu Jul 1 22:14:03 2010 +0100 Reduce front buffer stride prior to rejection If we reject the front buffer because it has too large a stride, repeat the allocation using untiled for the cases where we can utilize laxer hardware restrictions. Signed-off-by: Chris Wilson commit f8778b66a98d68e622cdf5b2d1fd959c4f7a2b2b Author: Chris Wilson Date: Thu Jul 1 21:58:43 2010 +0100 drmmode: Add missing newlines at the end of log messages. Signed-off-by: Chris Wilson commit 690fbd1a64c1e1fd07f7f8a5e39e05a33e4d0721 Author: Chris Wilson Date: Thu Jul 1 21:55:04 2010 +0100 drmmode: Use a copy of the converted mode on resize Avoid a potential use-after-free of the copied mode string by reusing the converted kernel mode on resize. ==19897== Invalid read of size 8 ==19897== at 0x661C330: ??? (strcpy.S:1308) ==19897== by 0x8618AE7: drmmode_set_mode_major (drmmode_display.c:293) ==19897== by 0x8618E6F: drmmode_xf86crtc_resize (drmmode_display.c:1299) ==19897== by 0x529A77: xf86RandR12ScreenSetSize (xf86RandR12.c:708) ==19897== by 0x4BD528: ProcRRSetScreenSize (rrscreen.c:301) ==19897== by 0x42B820: Dispatch (dispatch.c:432) ==19897== by 0x4254C9: main (main.c:289) ==19897== Address 0x72e91e0 is 0 bytes inside a block of size 9 free'd ==19897== at 0x4C23DBC: free (vg_replace_malloc.c:325) ==19897== by 0x48424F: xf86DeleteMode (xf86Mode.c:1921) ==19897== by 0x4942B7: xf86ProbeOutputModes (xf86Crtc.c:1572) ==19897== by 0x5290BB: xf86RandR12GetInfo12 (xf86RandR12.c:1551) ==19897== by 0x5313AE: RRGetInfo (rrinfo.c:202) ==19897== by 0x4BCCAA: rrGetScreenResources (rrscreen.c:337) ==19897== by 0x42B820: Dispatch (dispatch.c:432) ==19897== by 0x4254C9: main (main.c:289) Signed-off-by: Chris Wilson commit 772f8236d50725f0b330508616b4f2a9a910662a Author: Chris Wilson Date: Wed Jun 30 13:58:05 2010 +0100 dri: Handle errors during GetBuffers() gracefully. Unwind the array of Pixmaps already allocated and report failure for the old dri GetBuffers() path. Signed-off-by: Chris Wilson commit 17884af4eda01c05e7429ed6a195f3e4ceeff892 Author: Chris Wilson Date: Mon Jun 28 17:44:45 2010 +0100 Repair the damage to 'make distcheck' after splitting out i810 Signed-off-by: Chris Wilson commit 28c0ca676c47e7e38fabdd9ef24a70bd26701f33 Author: Chris Wilson Date: Fri Jun 25 13:40:22 2010 +0100 Remove unused inclusion of Signed-off-by: Chris Wilson commit 2306e675c48bc00a8ca1f4545bb88c97d6ef4fa6 Author: Chris Wilson Date: Fri Jun 25 13:32:02 2010 +0100 configure: Remove check for unused function, mprotect Signed-off-by: Chris Wilson commit 6695296ca28da7c4f551b0e80a8d06b557d59a5e Author: Chris Wilson Date: Fri Jun 25 13:31:11 2010 +0100 configure: Remove unused checks for xext Signed-off-by: Chris Wilson commit 5c663ce8442bd3b69c96e29061c57cc565fca91d Author: Chris Wilson Date: Sun Jun 20 15:01:16 2010 +0100 Rename common infrastructure to the intel namespace. After splitting out the i810 driver into its own legacy directory, we can identify the common routines not as i830 but as intel. This clarifies the code which *is* i830 specific. Signed-off-by: Chris Wilson commit 797d173a9af12055ba2609293182b616dd673ef4 Author: Chris Wilson Date: Sun Jun 20 12:52:10 2010 +0100 i810: Move into a legacy directory. The driver is still built but is no longer under active development so move it and supporting files to a new directory. Signed-off-by: Chris Wilson commit cd61531a78b9a2cbdd6019199c43258f83e6e2ce Author: Chris Wilson Date: Sun Jun 20 21:03:44 2010 +0100 Remove unused configure option: --enable-video-debug Signed-off-by: Chris Wilson commit ca16e3133658504b68a6b5c83bb8712899016544 Author: Carl Worth Date: Thu Jun 24 14:07:15 2010 -0700 Update version to 2.12.0 For the imminent 2.12.0 release. commit 8caf1564a75d65636d9b7a4da03219bb302bb37b Author: Carl Worth Date: Thu Jun 24 14:06:43 2010 -0700 NEWS: Add notes for the 2.12.0 release. Let it ship! commit b58a6a39c1568800938eb0e3ebc7664683b61200 Author: Chris Wilson Date: Wed Jun 23 23:56:44 2010 +0100 uxa: Fallback to pixman if source is out-of-bounds If the source is outside the drawable, then CopyArea will fail to initialise the source correctly. The simplest fix in this case is to fallback to pixman to generate the source texture. Fixes: Bug 28497 - Graphics corruption after opening a specific website https://bugs.freedesktop.org/show_bug.cgi?id=28497 Signed-off-by: Chris Wilson commit 6d33e578de4e23336ac69cc3c5d0935a65d4dda1 Author: Chris Wilson Date: Wed Jun 23 21:28:50 2010 +0100 Limit maximum tiled stride to 8k and untiled to 32k. Tiling on gen 2/3 hardware is only supported for pitches up to 8192 bytes, so above this limit the surface will be untiled and we will no longer have to comply with the power-of-two pitch alignment. So disabling tiling for these too wide surface should ~halve the memory requirement for the full surface. Also the absolute limit for the 2D blitter is 32,768 bytes. The documentation says "up to 32,768 bytes" and my PineView box was malfunction with a surface stride of 32,768 so set the limit to be 32,767. References: Bug 28497 - Graphics corruption after opening a specific website https://bugs.freedesktop.org/show_bug.cgi?id=28497 Signed-off-by: Chris Wilson commit 5bf470bd38b1f6a7a540585186a54c9dbbca98f9 Author: Chris Wilson Date: Mon Jun 21 22:28:58 2010 +0100 i965: Compile fix. Oops, I spent more time discussing these flushing bugs than I spent paying attention to what I was actually doing. Signed-off-by: Chris Wilson commit 0203cf91b54ee8a7cea8560e559288ee9b6e8554 Author: Chris Wilson Date: Mon Jun 21 22:25:08 2010 +0100 Do not clear need_mi_flush within the batch. This is a situation that should not be possible, need_mi_flush being true but the list of pending flush pixmaps being clear. However, an earlier bug in doing just that revealed this minor bug. So for correctness, be careful not to clear need_mi_flush without emitting a MI_FLUSH. Signed-off-by: Chris Wilson commit 5107b6fa26ecfdbdd60b869a86765c9c484db3a2 Author: Chris Wilson Date: Mon Jun 21 22:21:58 2010 +0100 i965: Mark the render target as dirty within composite_setup() The key difference between i965 and earlier, is that the surfaces passed to the samplers through an indirect table and so the batch and render target was not being marked dirty by the relocation (since the relocation only happens within prepare_composite() which may have been in another batch.) Simply call intel_pixmap_mark_dirty() when binding the sampler table into the batch to ensure that the dirty is tracked appropriately. Signed-off-by: Chris Wilson commit bebd64d82121d2b61893e1d0adebda03f4faea61 Author: Chris Wilson Date: Mon Jun 21 22:05:19 2010 +0100 Also submit any pending flush for *this* batch in the BlockHander. We still need to submit an additional flush if we have further writes since the last flush. Signed-off-by: Chris Wilson commit c4d200517755e6b0f48d6c6a6ba8dd0ddc883d8b Author: Chris Wilson Date: Mon Jun 21 21:57:21 2010 +0100 Only append the pixmap to the flushing list if we are writing to it. Signed-off-by: Chris Wilson commit c942585098ac84ae461821cbb8f52dedce7a0da1 Author: Chris Wilson Date: Mon Jun 21 21:45:04 2010 +0100 Emit the flush after a potential draw from the BlockHandler. As the batch submit may not trigger further drawing through flushing the vertices, pass the requirement to emit the flush down to the submission routine so that the flush can be appended after the final commands. Signed-off-by: Chris Wilson commit e8783869ad55d337601b6f6a51c02f6576c64f38 Author: Chris Wilson Date: Sun Jun 20 00:09:20 2010 +0100 uxa: Apply the source offsets to the pixmap source, not target. A slight confusion in computing the correction image location resulted in the application of the source offsets to the pixel location in the target and not in the source as intended. Fixes the visual corruption of the scrollbar in Chromium, and hopefully the crash reported by Robert Hooker when starting gdm after plymouth. Signed-off-by: Chris Wilson commit 4b7142baa0b3bf6f38843d06aadc579d8624cefc Author: Chris Wilson Date: Sat Jun 19 12:30:23 2010 +0100 uxa: Enable SHM pixmaps Now with streaming uploads and downloads for composite operations in place, shared memory pixmaps are no longer that dire performance wise. With careful use these can in fact be the most efficient means of transfer between a wholly software renderer in the client and a backing store. For instance, Chromium renders internally to an ARGB32 image buffer and uses a shared pixmap to composite dirty regions into the backing store. Thereby using the GPU to either perform the blit or the format conversion. Enabling shared pixmaps, reduces our CPU overhead whilst scrolling by a factor of 5 or so. And this is achieved simply by deleting obsolete code! Signed-off-by: Chris Wilson commit d748f8e6fcebdf5b5b00c90b6c3d519560ee2928 Author: Chris Wilson Date: Thu Jun 17 18:29:55 2010 +0100 uxa: Use accelerated get_image for copying to !offscreen Signed-off-by: Chris Wilson commit 78ee25f005fac9e9cc85425aa3fca8c396d015ea Author: Chris Wilson Date: Thu Jun 17 18:37:32 2010 +0100 uxa: Match depth 30 to format. Signed-off-by: Chris Wilson commit af5c4fc96db56a14bf6347774d8e8f23b38c5967 Author: Chris Wilson Date: Sat Jun 19 13:36:20 2010 +0100 uxa: Check for allocation failure. Check for the NULL Picture prior to passing it to the backends for inspection. Signed-off-by: Chris Wilson commit be55066c6481b4c5e2cd39ef1c0f3be88cae0c93 Author: Chris Wilson Date: Thu Jun 17 14:23:21 2010 +0100 i830: Remove domain tracking from pixmaps. The 4 integers can be reduced to a single boolean value, so do so. Signed-off-by: Chris Wilson commit c187da9a24e98cbdf86f0f0dfbdcd9025c8a4c76 Author: Chris Wilson Date: Wed Jun 16 13:16:28 2010 +0100 i830: GetImage acceleration. The presumption is that we wish to keep the target hot, so copy to a new bo and move that to the CPU in preference to causing ping-pong of the original. Also the gpu is much faster at detiling. Before (PineView): 400000 trep @ 0.1128 msec ( 8860.0/sec): GetImage 10x10 square 18000 trep @ 1.3839 msec ( 723.0/sec): GetImage 100x100 square 800 trep @ 30.0987 msec ( 33.2/sec): GetImage 500x500 square After: (PineView) 180000 trep @ 0.1478 msec ( 6770.0/sec): GetImage 10x10 square 60000 trep @ 0.4545 msec ( 2200.0/sec): GetImage 100x100 square 4000 trep @ 8.0739 msec ( 124.0/sec): GetImage 500x500 square Signed-off-by: Chris Wilson commit 0e0101758438debf98f989d815989b45e78cf5f6 Author: Chris Wilson Date: Tue Jun 15 12:48:57 2010 +0100 i830: Tidy i830_uxa_put_image() Use a single code path to upload the image data after selecting the right bo, and take advantage of pwrite() when possible. Fixes: Bug 28569 - [i965] IGN's flash-based video player crashes X https://bugs.freedesktop.org/show_bug.cgi?id=28569 Bug 28573 - [i965] Fullscreen flash and windowed SDL games fail to update the screen https://bugs.freedesktop.org/show_bug.cgi?id=28573 Reported-and-tested-by: Brian Rogers Signed-off-by: Chris Wilson commit 2ff7a2fc9d939554502e9adec89cae5597a9e82c Author: Chris Wilson Date: Thu Jun 17 13:56:30 2010 +0100 i915: Force the emission of BUF_INFO on every composite_setup We should be able to eliminate these as the drawable remains unchanged. However, the implicit flush of BUF_INFO fixes the rendering in KDE. Alternatively, we need an MI_FLUSH | INHIBIT_RENDER_CACHE_FLUSH between composites. (Note that it is not stale cache data causing the rendering corruption and that a pipelined flush is not sufficient either.) Also, having tried varies points at which to flush, the only place where the flush is effective seems to be between composite operations - that is a flush after 2D is not sufficient. Reported-by: Vasily Khoruzhick Reported-by: Clemens Eisserer Signed-off-by: Chris Wilson commit a25573d5c47ebea34c076075e1993233d7db2b4f Author: Chris Wilson Date: Tue Jun 15 20:26:19 2010 +0100 drmmode: Use the tiled stride for the rotated pixmap. After d41684d5459 we now allocate all framebuffers as tiled bo, and so we must be careful to use the appropriate stride as returned from the allocation, instead of assuming that it is just an aligned width. Fixes: Bug 28461 - screen rotation results in corrupted output. https://bugs.freedesktop.org/show_bug.cgi?id=28461 Signed-off-by: Chris Wilson Reported-by: Till Matthiesen commit 23ddcf45344936da2931a3bf25bd187a9ea28344 Merge: 254bcc4 ffc6897 Author: Julien Cristau Date: Tue Jun 15 17:46:52 2010 +0100 Merge commit '2.11.901' commit 254bcc40fca6ed9aa0b71f2115c654667f16aec6 Author: Chris Wilson Date: Tue Jun 15 10:24:40 2010 +0100 configure: Bump drm requirement to 2.4.21 We depend upon the recent introduction of drm_intel_bo_is_reusable(). Signed-off-by: Chris Wilson Reported-by: Julien Cristau commit ffc689767fa56f2c7710e6f396441c3d8a24ea18 Author: Carl Worth Date: Mon Jun 14 17:35:20 2010 -0700 Update version to 2.11.901 For the 2.12 RC1 snapshot we're making now. commit 68c8b3f12482489f2e2e8040fd6728f1a2b9e420 Author: Carl Worth Date: Mon Jun 14 17:34:38 2010 -0700 NEWS: Add notes for 2.11.901 This is the 2.12 RC1 snapshot we're making now. commit 8899cd03e2e7ee673e8b3b2a9d2873839cdc1bf8 Author: Carl Worth Date: Thu Jun 10 15:38:54 2010 -0700 Fix to require libdrm 2.4.19 or newer. This is necessary for the drm_intel_bo_emit_reloc_fence function which did not exist in 2.4.16 which is all we were requiring earlier. commit 995a4b2b1d09c31672d9258a8ac732dcf9a8fe9f Author: Chris Wilson Date: Mon Jun 14 12:15:34 2010 +0100 i965: Sanity check ComponentAlpha status in prepare_composite Fixes: Bug 28446 - Garbled Font with Mathematica 7 https://bugs.freedesktop.org/show_bug.cgi?id=28446 Rewriting the glyphs to render to the destination directly and removing the more expensive multiple invocations of CompositePicture per picture was a great performance boost -- except that it needs special handling in the backend in order to not fallback. Having done so for i915, I neglected to ensure the sanity checking in i965_prepare_composite() was sufficient. As it turns out, it was not and so we misrendered CA-glyphs when rendering directly to the destination. This causes us to fallback properly, but is a performance regression as we no longer try the 2-pass magic helper before resorting to s/w. At the moment, I'd rather live with the temporary regression and fix i965 to do the same magic as i915, as it critical to fixing the severe performance issues currently crippling i965, as I believe that this regression only affects the minority of applications (incorrect, as it turns out, as the glyphs are overlapping) rendering directly to the destination. Signed-off-by: Chris Wilson commit 84d65bace521ad80b9bede4ae9e3e2a8d0668b90 Author: Chris Wilson Date: Mon Jun 14 11:31:40 2010 +0100 Compile fix for alternate list.h from xserver-1.9 Signed-off-by: Chris Wilson commit 00a54eee8f29ced610ef9d65b077e64bc65655e9 Author: Gaetan Nadon Date: Sat Jun 12 20:24:10 2010 -0400 COPYING: replace stub file with actual Copyright notices. Signed-off-by: Gaetan Nadon commit 94217ed5f5a3726db3fad6cac2132d99ed45c154 Author: Chris Wilson Date: Sat Jun 12 17:21:44 2010 +0100 uxa: Always clip glyphs to destination. Even if there is only a single clip rect, since the clip may be smaller than the drawing rectangle on the destination we need to actually compute the clipped glyph rectangle. Signed-off-by: Chris Wilson commit 5a0a8a1cf6d9b0616d6a097e783f2aa318b45736 Author: Chris Wilson Date: Thu Jun 10 22:56:34 2010 +0100 i830: Limit disabling acceleration following EIO to !i965 Following a conversation with Owain G. Ainsworth, it was decided that the second best approach to handling a wedged GPU was to hope that the kernel could successfully reset it, which currently is only possible for i965 and later chipsets. The best approach is of course to prevent such hangs from ever occurring in the first place. Signed-off-by: Chris Wilson commit 3bf4ca2cdc2493e209bbb9c597bfa17ed7fcf5dc Author: Chris Wilson Date: Wed Jun 9 12:02:21 2010 +0100 i830: Only emit the disabling GPU error message once. But emit the warning about rendering corruption every time for the transient errors like out-of-memory. Signed-off-by: Chris Wilson commit 35a12f029005d8f432755fb78f10c9d48ea2f347 Author: Chris Wilson Date: Wed Jun 9 11:47:37 2010 +0100 Fallback implementation for trapezoids for hung GPUs. Signed-off-by: Chris Wilson commit 8c1a8d22978f143044cc3cd0ff2ade5736ee9d48 Author: Chris Wilson Date: Wed Jun 9 10:03:08 2010 +0100 Revert "xp:trapezoids" This reverts commit f429fb9d872950705e11171d0e7407fb7673c786. An experimental patch I forgot was on my main branch as I was bugfixing. ARGH! commit 994aa1ef571ac2ab05f6588f9068d33b536c7a37 Author: Chris Wilson Date: Wed Jun 9 09:59:36 2010 +0100 uxa: Handle all-clipped out case with destination glyphs. Fixes the crash reported in: Bug 28446 - Garbled Font with Mathematica 7 https://bugs.freedesktop.org/show_bug.cgi?id=28446 pDst=0x3d663c0, src_x=0, src_y=0, xDst=142, yDst=112, nlist=0, list=0x7fffea026580, glyphs=0x7fffea025d88, extents=0x0) at uxa-glyphs.c:809 dx = 0 y1 = 101 x2 = 150 x1 = 142 dy = 0 y2 = 112 rects = 0x5491000 this_atlas = 0x2456d00 mask_y = 128 glyph = 0x35933a0 mask_x = 736 priv = 0x39309e0 screen = 0x8d2cc0 uxa_screen = 0x2443eb0 src_pixmap = 0x37c29e0 dst_pixmap = 0x45ddbf0 localSrc = 0x361a450 glyph_atlas = 0x2456d00 x = 142 y = 112 n = 18 nrect = -9975128 box = {x1 = 23152, y1 = -5630, x2 = 32767, y2 = 0} __PRETTY_FUNCTION__ = "uxa_glyphs_to_dst" Though the meat of that bug regarding the incorrect remains unsolved. Signed-off-by: Chris Wilson commit f429fb9d872950705e11171d0e7407fb7673c786 Author: Chris Wilson Date: Tue Jun 8 10:24:51 2010 +0100 xp:trapezoids commit 0776a42b70f2de7b7d7d8804046c79442da1cb8a Author: Chris Wilson Date: Tue Jun 8 10:43:24 2010 +0100 implicit-flush commit d41684d54592cf93554a4d6534e7ea74562b1798 Author: Eric Anholt Date: Mon Jun 7 11:18:09 2010 -0700 Allocate rotate shadow buffers using the usual framebuffer allocator. This means we can get tiling on them, which should significantly boost performance, and also allow for FBC. commit b5c9de10ba3a811f312e622b97ee5e601bd3b74f Author: Eric Anholt Date: Sun Jun 6 23:41:23 2010 -0700 Allocate a correctly sized framebuffer when tiling by using libdrm's support. When I made libdrm stop overallocating so much memory for the purpose of bo caching, things started scribbling on the bottom of my frontbuffer (and vice versa, leading to GPU hangs). We had the usual mistake of size = tiled_pitch * height instead of size = tiled_pitch * tile_aligned_height. commit e6acbc763229fd5b5b2cc1d65136404d02ac4655 Author: Chris Wilson Date: Mon Jun 7 18:04:51 2010 +0100 uxa: Setup acceleration functions prior to the damage layer We need to install the acceleration functions so that they are wrapped by the Damage layer. This fixes the corruption under a compositing WM introduced in commit 8700673157fdd3a87ad5150f2f30823261fec519. Signed-off-by: Chris Wilson Reported-and-tested-by: Arkadiusz Miśkiewicz commit 1788b16eb26580624dd3df96ed84f68d40e78ed7 Author: Chris Wilson Date: Mon Jun 7 15:31:47 2010 +0100 i915: Fix typo from previous commit. A trivial change, I thought, having tested it before rebasing, unworthy even of a perfunctory compile test. How wrong I was. Signed-off-by: Chris Wilson commit d9bc36ae03e3c56ab165d24fe4bdc6688fd62b6d Author: Chris Wilson Date: Mon Jun 7 15:28:18 2010 +0100 i915: Remove screen size limit from video setup. The i915 textured video routine know how to handle drawing on an output larger than the 3D pipe, so allow them to do so. Signed-off-by: Chris Wilson commit 6555ef5fd16c9e4fe733caf9e831f29f97462278 Author: Chris Wilson Date: Mon Jun 7 13:16:34 2010 +0100 i915: Replace structure passing with macros for shader generation. gcc is horribly bad at collapsing the constants: text data bss dec hex filename 282336 8720 256 291312 471f0 intel_drv.so.old 269280 8720 256 278256 43ef0 intel_drv.so Signed-off-by: Chris Wilson commit d56ea7a852d7090360fe080acec268de55ee908d Author: Chris Wilson Date: Mon Jun 7 00:20:35 2010 +0100 Use the direct dixGevPrivate() API when available This is quicker and smaller than the old indirect function call to dixLookupPrivate(). Signed-off-by: Chris Wilson commit 8700673157fdd3a87ad5150f2f30823261fec519 Author: Chris Wilson Date: Mon Jun 7 00:16:18 2010 +0100 Adapt glyphs for changes in devPrivates API Signed-off-by: Chris Wilson commit 42ddc39430a10513c49a415ddf1a0dc5fa52089e Author: Keith Packard Date: Fri Apr 30 13:33:54 2010 -0700 Adapt to DevPrivate API changes This allows the driver to be built against either the old or new DevPrivate API. Signed-off-by: Keith Packard commit 2c1fda08e889cad07acb452230da06f9c383d21c Author: Eric Anholt Date: Fri Jun 4 16:04:37 2010 -0700 Use libc instead of deprecated libc wrappers for malloc/calloc/free. commit b586624d4f2908d2a998ba87fe0ae31c10f46b91 Author: Chris Wilson Date: Sun Jun 6 17:11:40 2010 +0100 uxa: Force fallback for copies. All but uxa_copy_window() perform the preliminary checks for whether acceleration is available. The simplest method for adding the fallback for uxa_copy_window() seems to be to add it in the core copy function, so be it. This allows X to survive a little longer once we encounter a GPU hang. Signed-off-by: Chris Wilson commit 6db1e5231b7a0e79611f771d4efea686f7849e04 Author: Chris Wilson Date: Wed Jun 2 20:43:49 2010 +0100 dri: Protect against NULL dereference following GPU hang. References: Bug 28361 - "glresize" causes server segfault with single buffering. https://bugs.freedesktop.org/show_bug.cgi?id=28361 [ 14528.767] (EE) intel(0): Failed to submit batch buffer, expect rendering corruption or even a frozen display: Input/output error. [ 14528.767] (EE) intel(0): Disabling acceleration. [ 14528.788] Backtrace: [ 14528.858] 0: /usr/bin/X (xorg_backtrace+0x28) [0x491818] [ 14528.858] 1: /usr/bin/X (0x400000+0x65ca9) [0x465ca9] [ 14528.858] 2: /lib/libpthread.so.0 (0x7f9df2dc9000+0xedf0) [0x7f9df2dd7df0] [ 14528.858] 3: /usr/local/lib/libdrm_intel.so.1 (drm_intel_bo_flink+0x0) [0x7f9defd60c60] [ 14528.858] 4: /usr/local/lib/xorg/modules/drivers/intel_drv.so (0x7f9deff6a000+0x2fdfd) [0x7f9deff99dfd] [ 14528.858] 5: /usr/lib/xorg/modules/extensions/libdri2.so (0x7f9df01b8000+0x19e7) [0x7f9df01b99e7] [ 14528.858] 6: /usr/lib/xorg/modules/extensions/libdri2.so (0x7f9df01b8000+0x1fdb) [0x7f9df01b9fdb] [ 14528.858] 7: /usr/lib/xorg/modules/extensions/libdri2.so (DRI2GetBuffersWithFormat+0x10) [0x7f9df01ba250] [ 14528.858] 8: /usr/lib/xorg/modules/extensions/libdri2.so (0x7f9df01b8000+0x3834) [0x7f9df01bb834] [ 14528.858] 9: /usr/bin/X (0x400000+0x2fc2c) [0x42fc2c] [ 14528.858] 10: /usr/bin/X (0x400000+0x24da5) [0x424da5] [ 14528.858] 11: /lib/libc.so.6 (__libc_start_main+0xe6) [0x7f9df1d60a26] [ 14528.858] 12: /usr/bin/X (0x400000+0x24959) [0x424959] [ 14528.858] Segmentation fault at address 0x20 [ 14528.858] Fatal server error: [ 14528.858] Caught signal 11 (Segmentation fault). Server aborting Signed-off-by: Chris Wilson commit 2989f51caf3134460c2551de597e7e54fe74ee92 Author: Chris Wilson Date: Tue Jun 1 23:08:02 2010 +0100 i830: Remove unused coord-adjust. Signed-off-by: Chris Wilson commit dc402334f4e9b0de624bc89cd77eae4ec7cf1708 Author: Chris Wilson Date: Tue Jun 1 23:03:19 2010 +0100 i915: Centre sampling. Use centre sampling of textures to match pixman, and remove numerous off-by-one and visual artefacts when rendering. The classic example for this is cairo/text/xcomposite-projection where the edge of the rotated rectangle is jaggy due to the incorrect sample position. Fixes: Bug 16917 - [i915] Blur on y-axis also when only x-axis is scaled billiear https://bugs.freedesktop.org/show_bug.cgi?id=16917 And about 15 tests from the Cairo test suite. Signed-off-by: Chris Wilson commit f74b3f82bab11463a0f4de9f614fc6aa1492ef24 Author: Chris Wilson Date: Tue Jun 1 22:31:35 2010 +0100 i915; Avoid the implicit flush on changing BUF_INFO 3DSTATE_BUF_INFO is an implicit flush of the piepline, so avoid emitting that and associated state unless the destination pixmap has actually changed. This is a win of around 3-5% for cairo-perf-trace, notably for firefox. Signed-off-by: Chris Wilson commit f2272402035574c206a0e3383c55373c440fd928 Author: Jesse Barnes Date: Tue Jun 1 13:46:15 2010 -0700 DRI2: fix new buffer exchange check Chris's new buffer exchange check is a good one, but we don't want to hit the immediate blit fallback path if it fails. We still want to schedule a blit for sometime in the future, and we need to use it wherever an exchange might occur (like the secondary flip check or the currently disabled CanExchange check). Fixes https://bugs.freedesktop.org/show_bug.cgi?id=28252. Signed-off-by: Jesse Barnes commit a386a003e7b0ff7100434dccd51fedd822454a6c Author: Chris Wilson Date: Mon May 31 22:18:43 2010 +0100 uxa: Spans, try again to get the early break correct. Trigger happy bug fixing. The sign *was* right, the endpoint was wrong. Signed-off-by: Chris Wilson commit 1672ee0421a99b745d65d72a3818de01d8100b6b Author: Chris Wilson Date: Mon May 31 22:08:43 2010 +0100 uxa: Sign reversal on early break from spans passing the YXband Introduced with e5c971e7639095d38da3518a5dc404b708d45cfb. Signed-off-by: Chris Wilson commit cd38b705be84901a38380dc2a1b90889b553d565 Author: Chris Wilson Date: Mon May 31 17:23:36 2010 +0100 Disable acceleration if we detect a hardware error. This is wildly optimistic, but it should work in a surprising number of error situations and some output in those cases will be hopefully be better than none... If we submit a batchbuffer and the kernel reports the GPU is hung (which will be caused by an earlier execbuffer, and so the kernel should have had enough time to determine whether or not it could reset the GPU) then disable any further attempt to accelerate gfx and force fallbacks to map the buffers and use the CPU. We cannot normally map any more buffers if the GPU is hung, so only those already mapped prior to the hang can be written to, or those allocated in system memory. However, we can expect that the framebuffer is already mapped, and so have a reasonable expectation to continue to see the display update. Signed-off-by: Chris Wilson commit 5fff430046db2030f89e49beb66c6476dc3fcd4c Author: Chris Wilson Date: Sat May 29 17:35:00 2010 +0100 uxa: Mega-Glyphs! Rewrite glyph rendering to avoid the intermediate buffer, accumulating the glyph rectangles directly in the backend composite routines. And modify the glyph cache routines to fully utilise the allocated size of the tiled buffer on older hardware. To do this we alias all glyph sizes into the same texture using a technique suggested by Keith Packard. PineView: 885/856-> 1150/1110 kglyph/s (aa/rgb) Signed-off-by: Chris Wilson commit d31abccd41c417338aac7c681e8bc6bd187b1843 Author: Chris Wilson Date: Mon May 31 12:14:23 2010 +0100 i915: Support textured video on an extended desktop. Handle rendering textured video onto an extended desktop (>2048) by using a temporary pixmap. Note that we still cannot handle rendering to a greater than 2048 destination region, for that we will need to tile. Hmm, time to request a 2560x1600, 10bpc monitor... Signed-off-by: Chris Wilson commit 2cfd5bc134f0dd86ea714594d61f6d5eb29019ce Author: Chris Wilson Date: Sat May 29 17:55:19 2010 +0100 dri: Compilation fix. 17:53 < arekm> ickle: i830_dri.c:630:28: error: ‘DrawableRec’ has no member named ‘bpp’ 17:53 < arekm> ickle: i830_dri.c:630:57: error: ‘DrawableRec’ has no member named ‘bpp’ * sigh. I need to fix this machine to have the right version of the * headers. Signed-off-by: Chris Wilson commit e2615cdeef078dbd2e834b68c437f098a92b941d Author: Chris Wilson Date: Sat May 29 16:37:12 2010 +0100 dri: Only flip if the front and back pixmaps match. An unredirected window (thanks Michel for the reminder) is backed by the Screen pixmap, and so uses a reference of that as its front buffer. The back buffer is a pixmap appropriately sized for the drawable. When the application requests to swap its buffers, obviously we cannot simply exchange the front and back buffer as they do not match, but need to copy the appropriate region from the back to the front. Signed-off-by: Chris Wilson commit 8b2039187fc23f5e9dddf4081f8b1ab6f4c01416 Author: Chris Wilson Date: Sat May 29 12:14:55 2010 +0100 Revert "dri: Use size from backing pixmap when creating buffers." This reverts commit 44d45d3fa56f121ce89ffe5b28beb48be01a95df. Michel Dänzer pointed out the flaw in using the pixmap size instead of the drawable size: Using the backing pixmap dimensions for this is not desirable. In particular, it means that the DRI2 buffers of non-redirected windows always have the same size as the screen. But even for redirected windows it wastes some graphics memory with a re-parenting window manager, that is if it doesn't break in various ways due to the top left corner of the DRI2 buffers no longer corresponding to the top left corner of the window. commit 44d45d3fa56f121ce89ffe5b28beb48be01a95df Author: Chris Wilson Date: Sat May 29 10:39:28 2010 +0100 dri: Use size from backing pixmap when creating buffers. This avoid using the garbage values stored in the Screen drawable, instead of the true values which are only maintained in its backing pixmap. The consequence of using the wrong size was to hand a 1x1 pixmap to metacity/mutter and have it believe it was a full screen drawable; GPU hangs ensued if using page flipping. Signed-off-by: Chris Wilson commit 90c74a43149ec72bef64fb7e64b812294bda69a5 Author: Chris Wilson Date: Fri May 28 21:49:38 2010 +0100 i915: Don't re-emit vertex size unless it has changed. Signed-off-by: Chris Wilson commit a94ae175d6a69243a4465de0be0a8a3368e0ab28 Author: Eric Anholt Date: Fri May 28 12:40:02 2010 -0700 uxa: Fix prepare_solid being called without check_solid first. Fixes GPU hang on gen6. commit 66c90158e45e890c6f655195c6707d216c7ac4c5 Author: Chris Wilson Date: Fri May 28 17:13:30 2010 +0100 uxa: Skip the redundant miComputeCompositeRects() when adding to the mask As we are in full control of the destination (the temporary glyph mask) and the source (the glyph cache) we know that there are no clip regions on either and so can skip computing the composite rectangles. (We trust the device clipping to prevent compositing outside the target.) x11perf on PineView: 701/686 -> 881/856 kglyphs/s [aa/rgb] Signed-off-by: Chris Wilson commit 5b2254838eb89bf77eeb893c73eecb8c737822f4 Author: Chris Wilson Date: Fri May 28 12:47:26 2010 +0100 uxa: Make the glyph caches' fixed size explicit. Until we actual resize the glyph cache dynamically, make it obvious to the reader and the compiler that the size is fixed. Signed-off-by: Chris Wilson commit 11581dda99cb2e4ae78fc73be4b02185b3be58ed Author: Chris Wilson Date: Fri May 28 11:38:05 2010 +0100 uxa: Use a glyph private rather than a hash table. Store the cache position directly on the glyph using a devPrivate rather than an through auxiliary hash table. x11perf on PineView: 650/638 kglyphs/s -> 701/686 kglyphs/s [aa/rgb] Signed-off-by: Chris Wilson commit 73111cf2a212ee5cc2e03af1c600867df0c55b39 Author: Chris Wilson Date: Wed May 26 21:05:27 2010 +0100 Decouple non-reusuable pixmaps from batch lists on unref. ==7596== Invalid write of size 4 ==7596== at 0x491ACA8: intel_batch_teardown (i830_batchbuffer.c:118) ==7596== by 0x491C9D6: I830CloseScreen (i830_driver.c:1419) ==7596== by 0x8103A9C: RRCloseScreen (randr.c:105) ==7596== by 0x80DE794: xf86CrtcCloseScreen (xf86Crtc.c:759) ==7596== by 0x80BEBA3: DGACloseScreen (xf86DGA.c:268) ==7596== by 0x80D044B: DPMSClose (xf86DPMS.c:134) ==7596== by 0x488B050: XvCloseScreen (xvmain.c:320) ==7596== by 0x81841B1: VidModeClose (xf86VidMode.c:110) ==7596== by 0x80EB12F: CursorCloseScreen (cursor.c:191) ==7596== by 0x810CA17: AnimCurCloseScreen (animcur.c:108) ==7596== by 0x816937E: compCloseScreen (compinit.c:86) ==7596== by 0x48D39B9: glxCloseScreen (glxscreens.c:221) ==7596== Address 0x49c1a50 is 24 bytes inside a block of size 52 free'd ==7596== at 0x4024866: free (vg_replace_malloc.c:325) ==7596== by 0x80B023C: Xfree (utils.c:1096) ==7596== by 0x4927CFD: i830_set_pixmap_bo (i830_uxa.c:647) ==7596== by 0x491C9B4: I830CloseScreen (i830_driver.c:1413) ==7596== by 0x8103A9C: RRCloseScreen (randr.c:105) ==7596== by 0x80DE794: xf86CrtcCloseScreen (xf86Crtc.c:759) ==7596== by 0x80BEBA3: DGACloseScreen (xf86DGA.c:268) ==7596== by 0x80D044B: DPMSClose (xf86DPMS.c:134) ==7596== by 0x488B050: XvCloseScreen (xvmain.c:320) ==7596== by 0x81841B1: VidModeClose (xf86VidMode.c:110) ==7596== by 0x80EB12F: CursorCloseScreen (cursor.c:191) ==7596== by 0x810CA17: AnimCurCloseScreen (animcur.c:108) Signed-off-by: Chris Wilson commit a6fb6aa5f9c1c81b8b81b9d1138a526ffbbd5ad3 Author: Chris Wilson Date: Wed May 26 20:31:45 2010 +0100 Add vertex bo to the list of buffers to be torn down. Signed-off-by: Chris Wilson commit 5dce69002dd48dd6dce4f0e7ad9ecf2c4c17cfe4 Author: Chris Wilson Date: Wed May 26 20:26:42 2010 +0100 i965: Remove ATOMIC_BATCH. This paranoid check is deceased; pining for the fjords. Signed-off-by: Chris Wilson commit 06ebb55d308defbf8e01e30e4f994c2dd1071c40 Author: Eric Anholt Date: Sun May 23 20:33:47 2010 -0700 Add a workaround for Ironlake errata relating to disabling the clipper. commit 158a158dad26b6888dd2ebaf13e6020894475fcb Author: Eric Anholt Date: Sun May 23 20:28:24 2010 -0700 Add a workaround for Ironlake errata regarding blits and other engines. commit 3461f8f4bc2a49fd41c408d225c592623404be91 Author: Eric Anholt Date: Sun Apr 18 19:14:13 2010 -0700 Remove remaining REG_DUMPER build stuff. commit 03bbb4c896ef3cd275312b413a2c85d9f499c032 Author: Chris Wilson Date: Wed May 26 10:16:36 2010 +0100 uxa: Perform manual damage for CompositeRects [xserver-1.8] The damage layer doesn't wrap CompositeRects, so we need to manually append the damaged region ourselves. This works for miCompsiteRects since that translates the call into multiple invocations of either PolyFillRectangle or Composite, which themselves cause damage. Fixes: Bug 28120 - Tint2's tooltip borders end up at 0,0 and do not disappear https://bugs.freedesktop.org/show_bug.cgi?id=28120 Signed-off-by: Chris Wilson commit b9ada52a3081f54e0ed094ac31188bb240866f81 Author: Chris Wilson Date: Wed May 26 10:14:52 2010 +0100 uxa: Force the alpha value to 0xffff when treating Over as Src Since we have at most 8 bits of alpha, we treat >= 0xff00 as opaque. However, being paranoid we should set the alpha value to 0xfff in case something unexpected happens when converting from the xRenderColor to the pixel value. Signed-off-by: Chris Wilson commit 3055d40164590147d35b5e7059ebe5f5858c85fa Author: Chris Wilson Date: Wed May 26 10:12:57 2010 +0100 uxa: Use Composite rather than solid blitter for PolyRect Due to the relocation overhead, using a single composite with many rectangles outperforms many solid blits. Signed-off-by: Chris Wilson commit ec2437f958ec4f5ac5222b37cba4cd403b5c8855 Author: Chris Wilson Date: Wed May 26 10:12:18 2010 +0100 uxa: Add PICT format mapping for depth 4 pixmaps. Signed-off-by: Chris Wilson commit 309bd3a29943ef7502d40c67be49c19a59b6d1a2 Author: Chris Wilson Date: Wed May 26 10:11:32 2010 +0100 i830: Skip an empty fill. In the extremely unlikely event that the higher layer erroneous gave us an empty fill, skip it. Signed-off-by: Chris Wilson commit b645ec83e0d86f2247b8338ceab60b9502516e70 Author: Chris Wilson Date: Tue May 25 09:49:20 2010 +0100 uxa: Apply the drawable offset to the solid rects Fixes: Bug 28120 - Tint2's tooltip borders end up at 0,0 and do not disappear https://bugs.freedesktop.org/show_bug.cgi?id=28120 Signed-off-by: Chris Wilson commit 9d8ac271404ff219c3d40ae8f829e8b76ac7c359 Merge: 509df27 ea07535 Author: Chris Wilson Date: Fri May 21 11:01:30 2010 +0100 Merge branch 'glyphs' Tweak glyphs to improve x11perf on i915 by about 33%. PineView, aa10text: 460 -> 617 kglyphs/s. PineView, rgb10text: 434 -> 610 kglyphs/s. Speedups ======== xcb poppler 18.636 -> 13.958: 1.34x speedup xlib firefox-talos-gfx 71.905 -> 56.232: 1.28x speedup xcb firefox-talos-gfx 72.882 -> 57.969: 1.26x speedup xlib gnome-terminal-vim 38.126 -> 34.472: 1.11x speedup xcb gnome-terminal-vim 35.164 -> 32.573: 1.08x speedup xlib poppler 19.634 -> 18.246: 1.08x speedup Note the lack of significant improvement for firefox-planet-gnome. commit ea07535240dafc4c6ef55b4b7a2eeaa595febe86 Author: Chris Wilson Date: Fri May 21 14:33:18 2010 +0100 i915: Emit CA over using OutReverse + Add passes On PineView: 578/621 -> 610/617 kglyphs/sec [rgb/aa] commit 80a9e64f50aeda6004e3aba1fbfdda50bb1f1c82 Author: Chris Wilson Date: Fri May 21 09:55:55 2010 +0100 uxa: Use temporary dest when target is too large for compositor If the destination cannot fit into the 3D pipeline when we need to composite, we fallback to doing the operation on the CPU. This is very slow, and quite easy to trigger on i915 by plugging in an external display. An alternative is to extract the extents of the operation from the destination using the blitter which can usually handle much larger operations. This gives us a temporary target that can fit into the 3D pipeline and thus be accelerated, before copying back into the larger real destination. For x11perf this boosts glyph rendering on PineView, from 38kglyphs/s to 480kglyphs/s. Just a little shy of the native performance of 601kglyphs/s Signed-off-by: Chris Wilson commit 91f560034fc2695680d1208a78fc56d814b0da79 Author: Chris Wilson Date: Thu May 20 10:26:59 2010 +0100 uxa: Composite glyphs directly onto dst when possible. Without using a mask and compositing directly onto the destination, takes us from 580 kglyphs/s to 850 kglyphs/s on i945 [x11perf -aa10text]. However, the extra intersection check almost entirely cancels out the speed up and we discover that the glyphs in x11perf are always overlapping. Nothing is ever easy. Signed-off-by: Chris Wilson commit e3ece83f577d3664962edeec6ab5bdc41c5d77cf Author: Chris Wilson Date: Wed May 19 16:52:11 2010 +0100 i915: compute normalized texcoords using a scale factor. 500 -> 580kglyphs/s on i945. Signed-off-by: Chris Wilson commit c2abf8d659b8b161a4f9df100b614ee3c8f8e458 Author: Chris Wilson Date: Wed May 19 16:18:40 2010 +0100 uxa: translate the region in line for composites When compositing, we need to convert the box into a rect and so the advantages of using REGION_TRANSLATE are lost. Signed-off-by: Chris Wilson commit 2adf823b80b7b1f6df1bf3422a1219e93321a8fb Author: Chris Wilson Date: Wed May 19 15:02:58 2010 +0100 i915: Add special case primitive emitters for glyphs. Signed-off-by: Chris Wilson commit f64ab9e0d97dd9c654b4ae1924e62ef6813d9bb0 Author: Chris Wilson Date: Wed May 19 14:50:12 2010 +0100 i915: Move vertices into a vertex buffer object. In theory this should allow us to pack far more operations into a single batch buffer, and reduce our overheads. Signed-off-by: Chris Wilson commit 2b050f330f78d02e7f476e55be29d760271ac61c Author: Chris Wilson Date: Wed May 19 10:57:46 2010 +0100 Use pwrite to upload the batch buffer By using pwrite() instead of dri_bo_map() we can write to the batch buffer through the GTT and not be forced to map it back into the CPU domain and out again, eliminating a double clflush. Measing x11perf text performance on PineView: Before: 16000000 trep @ 0.0020 msec (511000.0/sec): Char in 80-char aa line (Charter 10) 16000000 trep @ 0.0021 msec (480000.0/sec): Char in 80-char rgb line (Charter 10) After: 16000000 trep @ 0.0019 msec (532000.0/sec): Char in 80-char aa line (Charter 10) 16000000 trep @ 0.0020 msec (496000.0/sec): Char in 80-char rgb line (Charter 10) Signed-off-by: Chris Wilson commit dcef703a7cdcf360f12312a338361697acffc3e9 Author: Chris Wilson Date: Wed May 19 09:30:02 2010 +0100 Kill paranoid assertions on every write into the batchbuffer. On my PineView box these represent ~5% overhead on x11perf text: Before: 16000000 trep @ 0.0020 msec (495000.0/sec): Char in 80-char aa line (Charter 10) 12000000 trep @ 0.0022 msec (461000.0/sec): Char in 80-char rgb line (Charter 10) After: 16000000 trep @ 0.0020 msec (511000.0/sec): Char in 80-char aa line (Charter 10) 16000000 trep @ 0.0021 msec (480000.0/sec): Char in 80-char rgb line (Charter 10) Signed-off-by: Chris Wilson commit bc41f84e01f18548b05c670e1fd0d641adc28d0f Author: Chris Wilson Date: Tue May 18 23:54:13 2010 +0100 i915: Emit composite primitive with specialised functions. Signed-off-by: Chris Wilson commit 4a3476ea094e84887fefb558e0bba023fee34151 Author: Chris Wilson Date: Tue May 18 23:25:59 2010 +0100 i915: amalgamate composite into a single primitive list Combine all the calls to composite between prepare_composite and done_composite into a single primitive list, rather than a primitive call per composite(). Signed-off-by: Chris Wilson commit e5c971e7639095d38da3518a5dc404b708d45cfb Author: Chris Wilson Date: Tue May 18 22:16:17 2010 +0100 uxa: Spans! OMG! Use composite rather than solid blits in order to bring performance on a par with the CPU when using GEM and relocations. Signed-off-by: Chris Wilson commit 509df27c7401e96d3062890da73f6af6629adef4 Author: Kristian Høgsberg Date: Tue May 18 10:01:52 2010 -0400 dri: Clean up DRI2 API #ifdefs a bit Signed-off-by: Kristian Høgsberg commit 5e04a81369dfc76bbc1ebbd4db00c23e71eb9e1c Author: Chris Wilson Date: Mon May 17 15:16:25 2010 +0100 i830: Remove vestigal debugging ALWAYS_FLUSH and ALWAYS_SYNC These are now debugging options exposed in Xorg.conf, and now unused int the source code. Signed-off-by: Chris Wilson commit 723cc45b2707aa160eac6d5b56a20e19cc42c8a3 Author: Chris Wilson Date: Mon May 17 15:14:55 2010 +0100 dri: Check error code from GetScratchGC() It may fail so be prepared, and do use the right drawable! Signed-off-by: Chris Wilson commit 2c00297bc3b4969f28e2eb19bce36ece50ce4ccb Author: Chris Wilson Date: Sun May 16 19:15:37 2010 +0100 uxa: Replace solid planemask [0xffffffff] with FB_ALLONES Signed-off-by: Chris Wilson commit 2c69709d8afa6e9c0990efc463df0061536585e1 Author: Chris Wilson Date: Sun May 16 18:41:52 2010 +0100 i830: Encode surface bpp into format References: Bug 28135 - [855GM] Slowdown/High CPU-Usage after Git-Commit 926fbc7d90ac1d0d49d154f136f9c9ed613c98c2 https://bugs.freedesktop.org/show_bug.cgi?id=28135 The simple answer is that I had assumed that 0 was a reserved value. However, without the bbp encoded into the format 0 was used for a8r8g8b8 and r5g6b5, which are very common formats! The other possibility for the slowdown is that gtkperf is using of the now verboten xrgb formats -- but would in fact be valid if the source covers the clip and we could fixup the alpha value in the fixed function combine. Signed-off-by: Chris Wilson commit 21b5fd427f5ed6c99276349a7ae128eea580dd72 Author: Chris Wilson Date: Sun May 16 13:51:41 2010 +0100 uxa: Tidy uxa_solid_rects() Move the operator reduction after a few fallbacks, closer to its use. Signed-off-by: Chris Wilson commit 61835701fd411d3bb550ceee3365e30639e46861 Author: Chris Wilson Date: Sun May 16 13:26:07 2010 +0100 uxa: Patterns are acquired at 0,0 Set the correct offset for the gradients patterns after rendering to a local Picture. Fixes cairo/test/huge-radial and friends Signed-off-by: Chris Wilson commit 89f43f69a9c854fb2b82538a8938002675ca19e4 Author: Chris Wilson Date: Sat May 15 18:34:54 2010 +0100 uxa: Force an alpha channel when rendering source fallbacks As the source may not cover the extents, we need to represent those areas as transparent in the fallback picture, ergo we need an alpha channel. We could be smarter and force a format conversion when necessary, and we could let the backend choose the most appropriate format. Signed-off-by: Chris Wilson commit 524fd2dd0da8f69d4c3f5aebe3a345fe34af609d Author: Chris Wilson Date: Sat May 15 18:23:21 2010 +0100 uxa: Apply clip for solid rectangles. References: Bug 28120 - Tint2's tooltip borders end up at 0,0 and do not disappear https://bugs.freedesktop.org/show_bug.cgi?id=28120 Signed-off-by: Chris Wilson commit 58b089febceca1e915607bb723ee658aaa9dbed3 Author: Chris Wilson Date: Sat May 15 09:11:46 2010 +0100 uxa: Avoid using blits when with PictFilterConvolution References: Bug 28098 Compiz renders shadows wrong, garbage line of pixels along left and top edge of windows https://bugs.freedesktop.org/show_bug.cgi?id=28098 Signed-off-by: Chris Wilson commit ef95899f5b21453daeabf81a3015b22456d21fec Author: Chris Wilson Date: Sat May 15 09:02:07 2010 +0100 uxa: Check the w-scaling component is 1 for an translation matrix Signed-off-by: Chris Wilson commit 9c3da71349bcfeabae08f1572cf602c357bf7641 Author: Chris Wilson Date: Sat May 15 01:05:24 2010 +0100 i830: Remove xrgb conversion to argb, no longer required. All textures are now properly declared so that the alpha swizzling occurs in the sampler or not at all. The downside is that for quite a few composite operations we have to fallback to software on older hardware. There is scope for more performing the alpha expansion in shaders or combiners when we know the picture covers the clip - which is almost all of the time for normal operations especially those constructed by Cairo. Signed-off-by: Chris Wilson commit 926fbc7d90ac1d0d49d154f136f9c9ed613c98c2 Author: Chris Wilson Date: Sat May 15 01:01:20 2010 +0100 i830: Remove incorrectly mapped tex formats. We no longer workaround the lack of alpha expansion for xrgb textures as this interferes with EXTEND_NONE, though we could if we know the source covers the clip... Signed-off-by: Chris Wilson commit 95654cffa8643f61f153218f27e800df75b9bdee Author: Chris Wilson Date: Sat May 15 00:50:42 2010 +0100 uxa: Fix order of conditionals to only run fill_region for SRC or opaque Signed-off-by: Chris Wilson commit f67b45965b527699794ee21174809c5d71c03f22 Author: Chris Wilson Date: Sat May 15 00:50:20 2010 +0100 uxa: Expand the range of compatible formats to cover all bpp. Signed-off-by: Chris Wilson commit 82d07fdf10cac2211af74ebf7d519daacd7084c0 Author: Chris Wilson Date: Sat May 15 00:49:39 2010 +0100 uxa: Only use 1x1R as a solid with an opaque format or SRC Signed-off-by: Chris Wilson commit 3bca186a7ead84d4f0e71dfd83847ef77a4e390b Author: Chris Wilson Date: Sat May 15 00:48:31 2010 +0100 uxa: Call check_solid before running the solid blitter. Signed-off-by: Chris Wilson commit 213816c30b5ca6146e26ded85b2aa31ca16ca9bf Author: Chris Wilson Date: Sat May 15 00:47:55 2010 +0100 i915: Load texture into directly into OC when possible. Signed-off-by: Chris Wilson commit 737de9a779d05fe6fb1efe1904fda2cc452ff137 Author: Chris Wilson Date: Fri May 14 23:48:27 2010 +0100 uxa: Disable compatible src xrgb and dst argb I'm seeing garbage alpha for rendercheck blend: x8r8g8b8a 10x10 SRC ar8g8b8a so disable blitting until I work out if we can fast-path it. Signed-off-by: Chris Wilson commit 271240fd477b11885947da32868bc77151681559 Author: Chris Wilson Date: Fri May 14 23:38:02 2010 +0100 i915: Remove a couple of unsupported 16bpp no-alpha tex formats Signed-off-by: Chris Wilson commit a7c318d21c9035f6cab48c16e734b9ecb6f4b238 Author: Chris Wilson Date: Fri May 14 23:30:21 2010 +0100 uxa: Parse BGRA pixel formats. Signed-off-by: Chris Wilson commit f7bbcc492a05f0801c64ee884798cf1a7ebb71c2 Author: Chris Wilson Date: Fri May 14 23:29:13 2010 +0100 Split the prepare blitter functions into check + prepare. Allow us to check whether we can handle the operation using the blitter prior to doing any work. Signed-off-by: Chris Wilson commit 4be8d7eb89e61ffb2ceb19f1f84260e581187692 Author: Chris Wilson Date: Fri May 14 21:13:21 2010 +0100 i915: Don't force alpha=1 for RGB drawables in the shader. I was blindly fixing rendercheck without thinking. We need to force the alpha value to be in the blend unit and not before -- otherwise we generate the incorrect result whilst blending. D'oh. commit b9a5e36f957e42eaf0387ad15f2298d3e9538b05 Author: Chris Wilson Date: Fri May 14 20:52:48 2010 +0100 uxa: enable solid rects for backends that require pixmaps Convert the color into a (cached) pixmap if the backend cannot handle the SolidFill natively. Signed-off-by: Chris Wilson commit a21297d7cc5945704d8cbd28ad0a2a3f6096fa47 Author: Chris Wilson Date: Fri May 14 17:51:42 2010 +0100 drm: Remove pin(); unpin() sync GEM handles serialisation of the new front buffer with respect to page flipping and rendering and reports back when the flip is complete. Adding a sync point here is then redundant. Signed-off-by: Chris Wilson commit 7ee73d2c6f373f3d6829cb1876b1940db62be452 Author: Chris Wilson Date: Fri May 14 17:51:20 2010 +0100 drm: Remove unused old_front parameter from drmmode_do_pageflip. Signed-off-by: Chris Wilson commit 030d56279bf14d9ddd42d8fdbeaa66ef3f557b4d Author: Chris Wilson Date: Fri May 14 16:53:40 2010 +0100 drm: don't overwrite the old intel->front_buffer It's now handled in the common ExchangeBuffers() path. Signed-off-by: Chris Wilson commit 5bd022739511104e4978bdfd2f4a1f60b9206723 Author: Chris Wilson Date: Fri May 14 15:47:09 2010 +0100 i830: Teardown batch entries on reset. By not cleaning up the batch entries when resetting the X server, we left the pointers in an inconsistent state and caused X to crash. commit 0d2392d44aae95d6b571d98f7ec323cf672a687f Author: Chris Wilson Date: Fri May 14 10:32:12 2010 +0100 dri: Hold reference to buffers across swap As we schedule swaps for some time in the future and may process a detachment prior to receiving the vblank notification from the kernel, we need to hold a reference to the buffers for our swap event handler. Fixes: Bug 28080 - "glresize" causes X server segfault with indirect rendering. https://bugs.freedesktop.org/show_bug.cgi?id=28080 Signed-off-by: Chris Wilson commit 8de09a0707ee1be1b919b979843711728618ef27 Author: Chris Wilson Date: Thu May 13 17:15:28 2010 +0100 uxa: Convert 1x1R back to solid_fill In the change to prevent blitting between incompatible sources, we also prevented 1x1R pixmaps from being used for solid fills. Reorder the sequence of conditions to enable this fast path again. commit 92e9cf8af784b13c28030e38b15c8decf29e6a32 Author: Chris Wilson Date: Thu May 13 15:12:51 2010 +0100 uxa: Only use solid_fill for SRC. commit d1bd14e8b6754ba9f797642e1b33bf689e19417b Author: Chris Wilson Date: Thu May 13 15:11:16 2010 +0100 uxa: Replace source for CLEAR with a transparent solid This means that we will hit the faster try_solid_fill path instead. commit cdab72c405434ecbf7a79e402ff2d65d6a728179 Author: Chris Wilson Date: Thu May 13 15:12:32 2010 +0100 uxa: Fallback early if compositing with alphaMaps commit 25811dc7b7d1ad3fb01c31197d1ae1fe5b498975 Author: Chris Wilson Date: Thu May 13 15:09:28 2010 +0100 i915: Force output alpha to 1. if dst has no alpha channel. Ensure that garbage is not stored in the unused alpha channel so that we can rely on it being currently initialiased when used as a source or returning via GetImage. Partial fix for rendercheck -t blend commit 0e726b85ca6013ae9dc51391aaa309203352b61e Author: Chris Wilson Date: Thu May 13 09:41:39 2010 +0100 i915: Add a2r10g10b10 format and friends Signed-off-by: Chris Wilson commit 9f54107f866a25cf670f81f7c52b8c108728c6a5 Author: Chris Wilson Date: Tue May 11 14:55:16 2010 +0100 dri2: Handle reference counting across page flipping 1. Instead of swapping bos, swap the entire private structure. 2. If we update the pixmap bo for the Screen, make sure we update the reference inside intel->front_buffer so that xrandr still functions. Fixes: Bug 27922 - i965: Rapidly resizing OpenGL window causes GPU to hang. https://bugs.freedesktop.org/show_bug.cgi?id=27922 Signed-off-by: Chris Wilson commit 6c27f6e4f76b97df71094acf25083b2922966b42 Author: Chris Wilson Date: Wed May 12 12:01:46 2010 +0100 uxa: Avoid glyph ping-pong with !offscreen destination Signed-off-by: Chris Wilson commit d5383c2073e181b9ec352461c05d6202ad37f9d6 Author: Chris Wilson Date: Wed May 12 10:53:14 2010 +0100 uxa: Avoid ping-pong with !offscreen destination and traps If we are destined to target an !offscreen drawable, then uploading the trapezoid mask to a bo is the last thing we actually want to do... Signed-off-by: Chris Wilson commit 00664b8f9d3da8d0d6aa53471ed3a8a8f6391660 Author: Chris Wilson Date: Wed May 12 12:41:51 2010 +0100 uxa: Fallback when compositing to a !offscreen destination Signed-off-by: Chris Wilson commit 0c6372a77fd8c051534c1b420a02a8737aa1dd01 Author: Chris Wilson Date: Wed May 12 09:57:27 2010 +0100 i830: Prevent allocation of bo larger than half the aperture We need to prevent overcommitting the aperture, and in particular if we allocate a buffer larger than available space we will fail to mmap it in and rendering will fail. Trying to allocate multiple large buffers in the aperture, often the case when falling back, causes thrashes and eviction of useful buffers. So from the outset simply do not allocate a bo if the the required size is more than half the available aperture space. Fixes allocation failure in ocitymap.trace for instance. Signed-off-by: Chris Wilson commit 244b7cbfffdcda4761948eaa37ed2a30ca81f107 Author: Chris Wilson Date: Wed May 12 09:18:30 2010 +0100 uxa: Use accelerated PutImage for uploading pixman images. Short-circuits the current use of PutImage from CopyArea, bypassing all the temporary allocations. commit cb887cfc670bf63993bd313ff33927afb8198eae Author: Chris Wilson Date: Fri Mar 26 09:59:51 2010 +0000 uxa: solid rects The cost of performing relocations outweigh the advantages of using the blitter for solids with lots of rectangles. References: Bug 22127 - [UXA] 50% performance regression for XRenderFillRectangles https://bugs.freedesktop.org/show_bug.cgi?id=22127 By using the 3D pipeline we improve our performance by around 4x on i945, measured by the jxbench microbenchmark, and a factor of 10x by short-cutting to the 3D pipeline for blended rectangles. Before, on a i945GME: 19982.412060 Ops/s; rects (!); 15x15 9599.131693 Ops/s; rects (!); 75x75 3803.654743 Ops/s; rects (!); 250x250 6836.743772 Ops/s; rects blended; 15x15 1443.750000 Ops/s; rects blended; 75x75 495.335821 Ops/s; rects blended; 250x250 23247.933884 Ops/s; rects composition (!); 15x15 10993.073048 Ops/s; rects composition (!); 75x75 3595.905172 Ops/s; rects composition (!); 250x250 After: 87271.145975 Ops/s; rects (!); 15x15 32347.744361 Ops/s; rects (!); 75x75 5884.177215 Ops/s; rects (!); 250x250 73500.000000 Ops/s; rects blended; 15x15 33580.882353 Ops/s; rects blended; 75x75 5858.811749 Ops/s; rects blended; 250x250 25582.317073 Ops/s; rects composition (!); 15x15 6664.728682 Ops/s; rects composition (!); 75x75 14965.909091 Ops/s; rects composition (!); 250x250 [suspicious] This has no impact on Cairo, but I have a suspicion from watching xtrace that Qt likes to blit thousands of 1x1 rectangles with the same colour. However, we are still around 2-3x slower than the reported figures for EXA! Signed-off-by: Chris Wilson commit c8e10f7791fecf0fed7ad606db062d87d8ff263c Author: Chris Wilson Date: Wed May 12 12:41:00 2010 +0100 debug: Add names for operators Most useful for confirming my worst fears: unwarranted use of OutReverse + Add. Signed-off-by: Chris Wilson commit 6ea8ce640fbc7e5054b521a6f70b303945d0e849 Author: Chris Wilson Date: Tue May 11 19:35:59 2010 +0100 xvmc: Build fix with -pedantic Fixes: Bug 27352 - RPMLINT error causes build breakage https://bugs.freedesktop.org/show_bug.cgi?id=27352 Reported-by: Johannes Obermayr Signed-off-by: Chris Wilson commit e1b7e8bf1d475b3d00adcb96e6002c20c9e70d1c Author: Chris Wilson Date: Tue May 11 15:50:23 2010 +0100 drmmode: Reorder i830_set_pixmap_bo() so that the correct stride is used. The pitch needs to be set on the pixmap prior to the private intel_pixmap structure being created so that it can record the correct value from the pixmap. Signed-off-by: Chris Wilson commit dfbaf9aab80cf33d47148f087fa747eacd508b05 Author: Chris Wilson Date: Tue May 11 14:54:15 2010 +0100 i830: Never create a bo for depth=1 pixmaps. As we can not accelerate these either as a destination or a source, don't bother allocating a buffer object for them. Signed-off-by: Chris Wilson commit 5b7efe375ae951ffcdb2c81e2ad8a2ed86ffbdf2 Author: Chris Wilson Date: Tue May 11 14:53:29 2010 +0100 i830: Use set_pixmap_bo() instead of open-coding. The advantage is that this enables in-flight reuse of the old pixmap if possible. Signed-off-by: Chris Wilson commit ad8af95dd35921118f45d6cff355c80cf0906ff0 Author: Chris Wilson Date: Tue May 11 14:52:54 2010 +0100 i830: Do not cache in-flight non-reusable buffers. Signed-off-by: Chris Wilson commit f1048e14d5ef34970cb717e2a37d1c6bb4ea3a34 Author: Chris Wilson Date: Tue May 11 11:39:46 2010 +0100 i965: Add texformats mapping for additional pixman formats Signed-off-by: Chris Wilson commit a35afd4a2df8bab543700d874274228eddccae5b Author: Chris Wilson Date: Tue May 11 11:26:33 2010 +0100 uxa: Recheck texture after acquiring pattern. As the first step to handling unsupported texture formats, double check that the converted pattern can be used as a texture by the card. Fixes: rendercheck -t repeat Signed-off-by: Chris Wilson commit d745cab6c45b9fce5e46eacbdd04ceae911fddbb Author: Keith Packard Date: Mon May 10 22:58:49 2010 -0700 Must call ValidateGC in i830_uxa_put_image for scratch GC Always need to call ValidateGC or the scratch GC will not get the right composite clip. Signed-off-by: Keith Packard commit 3eded4202ea00d42edf5edad831484ebc6c0c826 Author: Chris Wilson Date: Mon May 10 23:38:17 2010 +0100 i915: Fix pixmap based masks. Signed-off-by: Chris Wilson commit 1ecd89be039b642affb2f9933f4341d186cb4dea Author: Chris Wilson Date: Mon May 10 23:33:52 2010 +0100 uxa: Protect against valid SourcePict in uxa_acquire_mask() Signed-off-by: Chris Wilson commit a8761585ef0b37736d302299d6b03e0957ad3e16 Author: Chris Wilson Date: Mon May 10 19:38:24 2010 +0100 i830: Minor cleanup Remove some extraneous prototypes and unused variables. Signed-off-by: Chris Wilson commit 9e9b0d85da801f1f95c7bc7e99566fe7056f5813 Author: Chris Wilson Date: Mon May 10 18:37:02 2010 +0100 i830: Update stride when swapping bo for PutImage Signed-off-by: Chris Wilson commit 0d4dd00aeafdd625ffe902e26e666b63a0842adc Author: Chris Wilson Date: Mon May 10 12:10:09 2010 +0100 uxa,i915: Handle SourcePict through uxa_composite() Signed-off-by: Chris Wilson commit 21c1c3c7f6eb2b5070d2153b15a8fb1afe938bbb Author: Chris Wilson Date: Mon May 10 10:19:28 2010 +0100 i915: Use 1x1R pixmap for solid drawables x11perf has a regression https://bugs.freedesktop.org/show_bug.cgi?id=25068 caused by commit e581ceb7381e29ecc1a172597d258824f6a1d2d3 i915: Use the color channels to pass along solid sources and masks. Do not convert 1x1R pixmaps into a solid color as the readback from the bo negates all the performances advantages of using a smaller vertex buffer and fewer samplers. Before (PineView): aa=66800 glyph/s, rgb=28800 glyphs/s Now: aa=96800 glyphs/s, rgb=48500 glyphs/s Signed-off-by: Chris Wilson commit f52b6e832292c02c0010b19882e38e1097beeda0 Author: Chris Wilson Date: Mon May 10 09:39:44 2010 +0100 uxa: Rearrange checking and preparing of composite textures. x11perf regression caused by 2D driver https://bugs.freedesktop.org/show_bug.cgi?id=28047 caused by commit a7b800513fcc94e063dfd68d2f63b6bab7fae47d uxa: Extract sub-region from in-memory buffers. The issue is that as we extract the region prior to checking whether the composite can in fact be accelerated, we perform expensive surplus operations. This is particularly noticeable for ComponentAlpha text, such as rgb10text. The solution here is to rearrange the check_composite() prior to acquiring the sources, and only extracting the subregion if the render path can not actually handle the texture. Performance (on PineView): a7b800513^: aa=68600 glyphs/s, rgb=29900 glyphs/s a7b800513: aa=65700 glyphs/s, rgb=13200 glyphs/s now: aa=66800 glyph/s, rgb=28800 glyphs/s The residual lossage seems to be from the extra function call and dixPrivate lookups. Hmm. More warning is the extremely low performance, however the results are consistent so the improvement looks real... Signed-off-by: Chris Wilson commit 848ab66384508c3ad3e5fb4884e4527f3ebd3bde Author: Chris Wilson Date: Sat May 8 18:36:55 2010 +0100 uxa: Transform composites with a simple translation into a blit We can also convert a composite with an integer translation into a blit, so long as the sample extents remains within the source. Signed-off-by: Chris Wilson commit a7b800513fcc94e063dfd68d2f63b6bab7fae47d Author: Chris Wilson Date: Wed Apr 14 21:14:34 2010 +0100 uxa: Extract sub-region from in-memory buffers. If the buffer is too large or not suitable for a GPU operation, we currently fallback and perform the composite on the CPU. An alternative is too extract the small region out of the source (as usually the sample extents are much smaller than the actual surface size) and try the composite with the new surface. The effect is particularly noticeable on pathological websites that use very large background images. For example, http://www.woodtv.com/ uses a 1299x15000 pattern that is obscured by another opaque pattern. Signed-off-by: Chris Wilson commit 8562b7bc6740eef2602af76b8685388efd2d4d37 Author: Chris Wilson Date: Tue Apr 27 10:27:44 2010 +0100 i830: prepare the uxa pixmap for fbCopyArea. Complete the prepare access for the PutImage fallback via fbCopyArea(), by remembering to set the private pointer to the GTT mapping. Signed-off-by: Chris Wilson commit 9a5cd65b593ea82e56e0c403f7ddcc2420a64dc3 Author: Chris Wilson Date: Mon Apr 26 09:07:07 2010 +0100 i830: if pixman_blt() fails fallback to fbCopyArea() On older versions of pixman, pixman_blt() can return false if the images are <= 8bpp. If we are being called from CopyArea, then we cannot return FALSE here as that will trigger an infinite recursion. Instead we must manually perform the fallback using fbCopyArea(). Reported-by: Peter Clifton Signed-off-by: Chris Wilson commit 86d349aa7b0a596fbb9530e896c19349405bf3ba Author: Chris Wilson Date: Mon Apr 26 09:12:54 2010 +0100 i830: tidy in flight bo reuse. A left-over cleanup patch for c374c94. *sigh* Signed-off-by: Chris Wilson commit 72fd7d191c33c8d0b75b06ab0717d7ca0d4e019a Author: Daniel Vetter Date: Mon Apr 19 21:56:57 2010 +0200 Fix "make dist" This is some fallout from my xvmc cleanup. Original-Patch-by: Rico Tzschichholz Signed-off-by: Daniel Vetter commit 9494f4e91f8c8c7a0f8d61c6883c9bfceb2cec46 Author: Daniel Vetter Date: Fri Apr 16 22:24:01 2010 +0200 i810: adjust the pitch for DRI rendering Current code forgot to adjust the pitch of the frontbuffer. Signed-off-by: Daniel Vetter Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=16729 commit c374c94e41d6e7d677334171e3255778d77cbe18 Author: Chris Wilson Date: Wed Mar 31 11:50:27 2010 +0100 uxa: Reuse in-flight bo When we need to allocate a new bo for use as a gpu target, first check if we can reuse a pixmap that has already been relocated into the aperture as a temporary target, for instance a glyph mask or a clip mask. Before: backend test min(s) median(s) stddev. xlib firefox-planet-gnome 50.568 50.873 0.30% xcb firefox-planet-gnome 49.686 53.003 3.92% xlib evolution 40.115 40.131 0.86% xcb evolution 28.241 28.285 0.18% After: backend test min(s) median(s) stddev. xlib firefox-planet-gnome 47.759 48.233 0.80% xcb firefox-planet-gnome 48.611 48.657 0.87% xlib evolution 38.954 38.991 0.05% xcb evolution 26.561 26.654 0.19% And even more dramatic improvements when using a font size larger than the maximum size of the glyph cache: xcb firefox-36-20090611: 1.79x speedup xlib firefox-36-20090611: 1.74x speedup xcb firefox-36-20090609: 1.62x speedup xlib firefox-36-20090609: 1.59x speedup Signed-off-by: Chris Wilson commit 96aa7a236ac0605324a94f7b7d10413cb219f071 Author: Chris Wilson Date: Wed Apr 14 15:04:53 2010 +0100 i830: Allocate bo's for glyphs larger than 32x32. As we only use the glyph cache for small glyphs, those large than 32x32 will first be copied to a bo and used as a mask in a composite operation. We can avoid the allocation and upload per use by allocating a bo for the over-sized glyph from the start. As the glyph is large anyway, the excess memory allocation is less significant. Using normal font sizes, firefox shows no change - as expected. However, using the 36 font size traces, we see around a 10% improvement on g45. Before: xcb firefox-36-20090609 127.333 127.897 0.22% xcb firefox-36-20090611 87.456 88.624 0.66% xcb firefox-20090601 19.522 20.194 1.69% xlib firefox-36-20090609 201.054 201.780 0.18% xlib firefox-36-20090611 133.468 133.717 0.09% xlib firefox-20090601 23.740 23.975 0.49% With large glyphs in bo: xcb firefox-36-20090609 117.256 118.254 0.42% xcb firefox-36-20090611 79.462 79.962 0.31% xcb firefox-20090601 19.658 20.024 0.92% xlib firefox-36-20090609 185.645 188.202 0.68% xlib firefox-36-20090611 123.592 124.940 0.54% xlib firefox-20090601 23.917 24.098 0.38% Thanks to Owain G. Ainsworth for the suggestion! Signed-off-by: Chris Wilson commit 2d17bd50af367bead84985c22fdd43d264a5f072 Author: Chris Wilson Date: Wed Apr 14 14:54:34 2010 +0100 Revert "Revert "uxa: Try using put_image when copying from a memory buffer."" This reverts commit 6d50553e8f70d8f2142efdfd6c90bc27a599d0bc. Now we have taught the fallback path not to infinitely recurse, re-enable the accelerated path for ShmPutImage and friends. commit 1cc2c2c44ac72460cf1c4e6bdc13c612235809c9 Author: Chris Wilson Date: Wed Apr 14 11:18:25 2010 +0100 i830: Use pixman_blt directly for performing the in-memory copy In order to avoid an infinite recursion after enabling CopyArea to use the put_image acceleration to either stream a blit or to copy in-place, we cannot call CopyArea from put_image for the fallback path. Instead, we can simply call pixman_blt directly, which coincidentally is a tiny bit faster. Signed-off-by: Chris Wilson commit 324a2810da3fbae35637ba9080f31f9383db0868 Author: Daniel Vetter Date: Tue Apr 13 08:39:43 2010 +0200 i830 render: check aperture space requirements No point not doing this. Signed-off-by: Daniel Vetter commit 804263c10df2fedb2f0debab6cdfaa6a89184a42 Author: Daniel Vetter Date: Sun Apr 11 12:56:24 2010 +0200 render: tell the kernel explicitly when fences are needed This slighlty improves xrender performance on fence reg starved i8xx hw. I've also changed a few function calls to the new names from the compat ones while looking at the code. The i915 textured video path is not converted because atm the xv code does not use tiled surfaces. Signed-off-by: Daniel Vetter commit a619a7831228dc52f0fef7d92c92f701e5aeaa94 Author: Daniel Vetter Date: Thu Apr 8 18:49:01 2010 +0200 i915 render: use tiling bits where possible This is in preparation to explicit fence allocation with execbuf2. Signed-off-by: Daniel Vetter commit 55cd36046e61e8d51b5cb754a81cdb54e3eab166 Author: Daniel Vetter Date: Thu Apr 8 14:48:35 2010 +0200 i830 render: use tiling bits where possible This is in preparation to explicit fence allocation with execbuf2. Signed-off-by: Daniel Vetter commit 6d50553e8f70d8f2142efdfd6c90bc27a599d0bc Author: Eric Anholt Date: Mon Apr 12 13:44:31 2010 -0700 Revert "uxa: Try using put_image when copying from a memory buffer." This reverts commit 27195d7dba0f3ff08b92f3fd916cdf5113cbef58. put_image often calls copy_area. Which calls put_image. Exhausting of the stack follows. commit 28024f6c5f351ce4cb3434998d5dbfbeded7c606 Author: Chris Wilson Date: Mon Apr 12 13:44:01 2010 +0100 Revert "uxa: Add fallback warnings for PutImage." This reverts commit 299b0338d0811192dc4f8eae5d79453e9882c5d1. A debugging patch, it was never intended to go into master commit 27195d7dba0f3ff08b92f3fd916cdf5113cbef58 Author: Chris Wilson Date: Wed Mar 31 20:30:27 2010 +0100 uxa: Try using put_image when copying from a memory buffer. Often, for example in the fallback for ShmPutImage, we will attempt to use uxa_copy_area() copying to a normal pixmap from a memory buffer. This triggers a fallback, and maps the destination pixmap back into the GTT. The accelerated put_image path will attempt to stream a blit to the destination pixmap if it is currently active, avoiding the stall. commit 385563417d10b5e8a005bed6ae4de9a8fac1b407 Author: Chris Wilson Date: Tue Mar 30 21:10:50 2010 +0100 Review i830_pad_drawable_width() We appear to have a confusion of stride in terms of pixels, pitch in terms of bytes and the actual width of the surface. i830_pad_drawable_width() appears to be operating aligning *pixels* to a 64 pixel boundary and has never used the chars-per-pixel causing considerable confusion in its callers. Remove the parameter and ensure that the callers are expecting a value in pixels returned, multiplying by cpp where necessary to get the pitch. Signed-off-by: Chris Wilson commit 299b0338d0811192dc4f8eae5d79453e9882c5d1 Author: Chris Wilson Date: Thu Mar 25 13:43:26 2010 +0000 uxa: Add fallback warnings for PutImage. commit 80f52482c7cde000a76b91fe3d8b6c16baf2141f Author: Daniel Vetter Date: Thu Apr 8 22:30:33 2010 +0200 XvMC: fix memory overflow Caught by a malloc library assert. Note to self: Don't just copy&paste codelines around :( Signed-off-by: Daniel Vetter Buzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27540 Tested-by: Nick Bowler Tested-by: Calvin Walton commit 3d7723526b181686d62f09f81fba3ccdbf7d2b1a Author: Daniel Vetter Date: Thu Apr 8 22:21:01 2010 +0200 Xv: fixup overlay stride confusion For some reason I've made a mess out of the overlay stride constrains. Fix it up. Signed-off-by: Daniel Vetter Tested-by: Calvin Walton Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27453 commit bdf0ee509c26ab35e60f3ed02549efa435be032f Author: Daniel Vetter Date: Thu Apr 8 13:29:04 2010 +0200 i965 Xv: fix chroma pitch In my recent fix for the chroma pitch for i915 xvmc I've forgotten about i965 class hw. For videos with a non-even sized stride (measured in dwords) the chroma pitch was internally incosistent and one dword off. Fix this by using pitch2 for the chroma pitch in i965 textured video like everywhere else. Signed-off-by: Daniel Vetter Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=27417 Tested-by: Nick Bowler Tested-by: Sven Arvidsson commit f6cb28e909c8685474e69e8bd8600f146d3a74e9 Author: Daniel Vetter Date: Thu Mar 11 15:37:54 2010 +0100 libXvMC: rip out debug stuff Almost totatlly unused, but surely totally useless. Signed-off-by: Daniel Vetter commit 676028ec0cbd4fadded92feefc8371e075abcc12 Author: Daniel Vetter Date: Wed Mar 10 19:23:06 2010 +0100 libXvMC: unify CreateSurface Simply store the desired bo size in intel_xvmc_context and initialize it in the driver's create_context function. Signed-off-by: Daniel Vetter commit 3f590a4577f554313e7577205e471757a39129b6 Author: Daniel Vetter Date: Wed Mar 10 19:04:51 2010 +0100 libXvMC i915: kill unused context private fields Signed-off-by: Daniel Vetter commit 8a31dacb067f813a5b0eafc16d265434e48ec5fc Author: Daniel Vetter Date: Wed Mar 10 18:59:29 2010 +0100 libXvMC: derive driver context from struct intel_xvmc_context ... by putting struct intel_xvmc_surface at the beginning. Also kill the common context handling code and simply keep a pointer in the surface private to the context. Signed-off-by: Daniel Vetter commit 16e5edde4d97e1818e0dbfbc165bd8199f697336 Author: Daniel Vetter Date: Wed Mar 10 16:51:10 2010 +0100 libXvMC: unify DestroySurface Surface bo's can be freed by the common code, then there's nothing driver specific left. Signed-off-by: Daniel Vetter commit 5f64122551f2d8d41d745351b2e4e68208aa6084 Author: Daniel Vetter Date: Wed Mar 10 16:25:57 2010 +0100 libXvMC: drop get_surface_status driver callback It's unused. Also drop all related generic code that tries to do clever stuff with this callback. These are all remnants from a pre-gem world. Signed-off-by: Daniel Vetter commit 6c44ce9e127e531224bac825da7918800a3e6a1a Author: Daniel Vetter Date: Wed Mar 10 16:20:03 2010 +0100 libXvMC i915: s/i915XvMCSurface/struct intel_xvmc_surface/ The private surface struct now adds nothing. Drop it. Signed-off-by: Daniel Vetter commit 583ec1f2f7ed32bb42c98baa1ca0fc3735b69b11 Author: Daniel Vetter Date: Wed Mar 10 15:55:44 2010 +0100 libXvMC i915: rip out unneeded surface fields All of these are also stored in the context. Also kill the context reference counting. Doesn't serve a purpose besides occupying a pointer to the context in the private surface struct. Signed-off-by: Daniel Vetter commit c9aaaed829731cda22d057d6ac6424c587770973 Author: Daniel Vetter Date: Wed Mar 10 15:27:02 2010 +0100 libXvMC: unify PutSurface Now that the drm bo is in the common structure, do the PutImage handling in common code, too. Signed-off-by: Daniel Vetter commit 4edff6c972311df2370a8323e346eeabd49ced35 Author: Daniel Vetter Date: Wed Mar 10 15:13:41 2010 +0100 libXvMC: move drm_intel_bo to common intel_xvmc_surface i965 lost the last field in it's private surface struct. Kill it and any associated headers. Signed-off-by: Daniel Vetter commit 9eeabf876d1f70f5525bbac438414557dd2d4335 Author: Daniel Vetter Date: Wed Mar 10 15:00:58 2010 +0100 libXvMC: derive driver surfaces from struct intel_xvmc_surface ... by putting struct intel_xvmc_surface at the beginning. This will allow to consolidate surface and bo handling. Also kill some now dead code used to handle the common surface structure. Signed-off-by: Daniel Vetter commit a0058369bbdfb49f8df5ee1e50671115927d3565 Author: Daniel Vetter Date: Wed Mar 10 14:31:40 2010 +0100 XvMC: kill intel_xvmc_command We only passed around and actually used the gem handle. Don't need a struct for one field alone ... Signed-off-by: Daniel Vetter commit 79fe4caafd21f6ca262901eac4a66ce5a4eaf548 Author: Daniel Vetter Date: Tue Mar 9 16:20:33 2010 +0100 XvMC: dynamically allocate adaptor And kill all the static structures. This way it's clearer what's common and what's specific. And the code is shorter too. Also clean up src/i830_hwmc.c - kill the nonstandard surface types for i915 and the associated code. Signed-off-by: Daniel Vetter commit 00b63ecb192b7eafea9482bf5c5c5d442ce2c6fc Author: Daniel Vetter Date: Tue Mar 9 15:29:15 2010 +0100 XvMC: directly set driver type in context creation Instead of threading it through a global variable. Signed-off-by: Daniel Vetter commit 411cdcb6fcb60085191cf712aba1e0977f145256 Author: Daniel Vetter Date: Tue Mar 9 15:23:02 2010 +0100 XvMC: init driver in one function call No point splitting this up. Gets rid of two #ifdef INTEL_XVMC blocks in i830_video.c. Signed-off-by: Daniel Vetter commit b666e3e29f22894f43a8e9f7f3d1b950d431c42d Author: Daniel Vetter Date: Tue Mar 9 14:56:44 2010 +0100 XvMC: move i965 specific stuff to common context Like for the i915. With this create_context is now also shared. Signed-off-by: Daniel Vetter commit e0068b1e63bc914940dbeb52de46657fcf5da1ea Author: Daniel Vetter Date: Tue Mar 9 14:44:53 2010 +0100 XvMC: move i915 specific stuff to common context Doing the same with the i965 code will allow us to share the create_context function. src/i915_hwmc.h is now almost empty. Move the last #defines to src/xvmv/i915_xvmc.c where they are actually used and delete the file. Also rename the ddx context struct to something sane. Signed-off-by: Daniel Vetter commit 8cab7b84da6d06c20ad9dbbcd8f3f3d971b438e7 Author: Daniel Vetter Date: Tue Mar 9 14:02:23 2010 +0100 XvMC: unify destroy context function Signed-off-by: Daniel Vetter commit 323464b8e2669423df573a18fd1137cb3cad6700 Author: Daniel Vetter Date: Mon Mar 8 23:46:25 2010 +0100 XvMC: clean up i830_hwmc.c - Drop unnecessary macros - Denote i965 specific stuff Signed-off-by: Daniel Vetter commit cfa907adf800e91a3c1f4698ac701b9b83fa600b Author: Daniel Vetter Date: Mon Mar 8 23:41:56 2010 +0100 XvMC: unify surface functions Like for the subpicture stuff, share the "do-nothing" functions ... And fix function name spelling, too. Signed-off-by: Daniel Vetter commit 036cd4bb82131c08b79f596667f00b19a0c8ab79 Author: Daniel Vetter Date: Mon Mar 8 17:33:18 2010 +0100 i965 XvMC: don't create any surface state in the ddx Like for i915. Also drop that now totally superflous limit on the available surfaces. Move the surface struct into the userspace library header now that the ddx doesn't use it anymore. Signed-off-by: Daniel Vetter commit 69218cc1b51acfee91b471bb973a4419b79cdd85 Author: Daniel Vetter Date: Mon Mar 8 17:05:25 2010 +0100 XvMC: unify subpicture functions The XvMC driver api in the server is insane. Even for optional stuff like subpicture support it doesn't check for NULL-pointers. So we have to retain some dummy functions. Wonder how many copies of these things exist on fdo ... Signed-off-by: Daniel Vetter commit 5d104e9c5cd5cd2d34c9035dd38794fa9b5578f3 Author: Daniel Vetter Date: Mon Mar 8 17:03:36 2010 +0100 XvMC: unify PutImage handling Both xvmc are handing in the bo in the exact same way. So move the code to src/i830_video.c and kill this great oeuvre of spaghetti-code. The xvmc driver ini and fini also lost their last use, kill them, too. Signed-off-by: Daniel Vetter commit ebc0ffba79cc4bd564a8bd97327f24a1d15b3d1a Author: Daniel Vetter Date: Mon Mar 8 16:36:24 2010 +0100 XvMC: merge *_hwmc.c into i830_hwmc.c After unifying i915 and i965, not much will be left of these files. Therefore merge them to make the following changes easier. This creates some warnings about some redefined macros, but when this is all cleaned up they'll all be gone. Signed-off-by: Daniel Vetter commit 8199f8f191f8385ef3a228e0ec014a8bbd44002b Author: Daniel Vetter Date: Sun Mar 7 23:17:49 2010 +0100 i915 XvMC: kill more subpict support remnants This things just won't die! Signed-off-by: Daniel Vetter commit 29ba8a84f7cf5c29a5f38688a1ac0ccf41d8e4ec Author: Daniel Vetter Date: Sun Mar 7 23:16:28 2010 +0100 XvMC: everyone's using execbuffer! XvMC was switched over from batchbuffers a few years ago ... Signed-off-by: Daniel Vetter commit 440b4d207b730112169827d0b90b46596659b504 Author: Carl Worth Date: Mon Mar 29 11:20:20 2010 -0700 Increase version to 2.11.0 In preparation for release. commit 1119c4523889ddedecf1722f0e9a2e4a7ad326b2 Author: Carl Worth Date: Mon Mar 29 11:19:31 2010 -0700 NEWS: Add release notes for the 2.11.0 release. Hurrah! We made it. commit df3b26847914557eb3c9c70732d91169b1936d77 Author: Jesse Barnes Date: Fri Mar 26 10:44:55 2010 -0700 DRI2: release our private front buffer ref when buffer swapping Pauli pointed out that we take a ref on the front buffer when exchanging but forget to release it. The ref is necessary since the set functions will drop refs as necessary, but once we set the front buffer to point at the back pixmap, we ned to release our private ref again, or we'll leak buffers. Reported-by: Pauli Nieminen Signed-off-by: Jesse Barnes commit 362a49e71fc41541b6dc121660d98e29da4b14e8 Author: Gaetan Nadon Date: Thu Mar 25 10:07:41 2010 -0400 uxa make: remove unused XORG_INCS and DIX_CFLAGS variables Most likely copied from xserver makefile. Acked-by: Dan Nicholson Signed-off-by: Gaetan Nadon commit 0d1ac4da5288a621d0493cb109fcd1e040e6c5a7 Author: Chris Wilson Date: Thu Mar 25 09:12:09 2010 +0000 uxa: Perform the xrgb -> argb conversion not inplace After reports of segmentation faults caused by d6b7f96fde1add92fd11f5a75869ae6fc688bf77 and vmware, the most obvious cause would be illegally writing to the src data when performing the alpha fill inline. So force the image upload to go via a fresh buffer whenever we need to modify the incoming data. Signed-off-by: Chris Wilson Reported-and-tested-by: Jeff Chua commit 0c47195ca805881e3fbd5b9224be5c930feeeb8c Author: Chris Wilson Date: Wed Mar 24 17:37:39 2010 +0000 i830: Clip solid fills to surface. There is a reasonable surfeit of evidence to support this error, for instance: http://bugs.freedesktop.org/attachment.cgi?id=34417 Signed-off-by: Chris Wilson commit 5537079c29a56133446f1874d24d9e6516825edb Author: Chris Wilson Date: Wed Mar 24 14:59:20 2010 +0000 uxa: After filling the alpha channel xrgb src is compatible with argb dst. Signed-off-by: Chris Wilson commit 90a971c60769781f53827b469a9be3aab14cf71c Author: Chris Wilson Date: Wed Mar 24 14:50:45 2010 +0000 uxa: Only reduce a composite to a BLT if it is wholly contained Signed-off-by: Chris Wilson commit 2eec53d0b9232970fe3d03ce6c8940ebeea44bee Author: Chris Wilson Date: Tue Mar 23 17:28:22 2010 +0000 uxa: Default to using TILING_X for pixmaps. On memory constrained hardware, tiling is vital for good performance as it minimizes cache misses. The downside is that for older hardware (which often suffers from the lack of bandwidth) requires the use of fences for many operations, which are in short supply and so may cause shorter batchbuffers. However our batch buffers are typically short and so this is unlikely to be a concern and not affect the performance wins. A quick bit of testing suggests the effect is inconclusive on firefox/i945: linear tiled xcb 205.470 206.219 xcb-render-0.0 404.704 388.413 xlib 166.410 170.805 A secondary effect of the patch is to workaround a G31 specific hang when attempting to use linear 2048x2048 surfaces. Bonus! Fixes: Bug 25375 - Performance issue using texture from pixmap (tfp) glx extension on 945 http://bugs.freedesktop.org/show_bug.cgi?id=25375 Bug 27100 - GPU Hung copying a 2048x1152 pixmap http://bugs.freedesktop.org/show_bug.cgi?id=27100 Signed-off-by: Chris Wilson Tested-by: John commit 9c037f61a490c96f9095f7ff3fecbf41f5efe9f7 Author: Carl Worth Date: Mon Mar 22 15:23:04 2010 -0700 Update version to 2.10.903 For today's snapshot. commit 11142cffe4bc81e1ce465ea725fcaef024130082 Author: Carl Worth Date: Mon Mar 22 15:22:28 2010 -0700 NEWS: Add notes for 2.10.903 For today's snapshot. commit f206816154fd44e61b0bdeaab1aa4c5359c3b70a Author: Carl Worth Date: Mon Mar 22 14:14:46 2010 -0700 man: Update list of available 'sclaing mode' property values. Include the names from the current kernel driver along with accurate descriptions of each. Indicate how to use the values with: xrandr --output output --set property value and point the user to "xrandr --prop" for an accurate list of currently available values. Closes bug: xf86-video-intel manpage needs update for KMS xrandr properties http://bugs.freedesktop.org/show_bug.cgi?id=25606 commit d1dfab6b1649214177435629d8e85239dbe44d89 Author: Matthias Hopf Date: Wed Mar 17 15:13:51 2010 +0100 Clear drmmode_output->mode_output in drmmode_output_destroy(). commit 10cd04a84bcb6313903fc23b2d7791658ebc6b8e Author: Li Peng Date: Sat Mar 20 00:21:48 2010 +0800 Initialize flip_count before using it Otherwise it would be a random value and drmmode_page_flip_handler() won't have a chance to call I830DRI2FlipEventHandler() and indicate a full page flip is complete. Signed-off-by: Li Peng commit 3d4b3f257fbbb69c6f236d9803abe54a90d7d434 Author: Dave Airlie Date: Thu Mar 18 12:48:39 2010 +1000 intel: free bus id in error path after printing it out. the error message prints out a freed string, spotted during code reappropriation to radeon driver. Signed-off-by: Dave Airlie commit 31d5f84bb4416ef92abd97264d52cdab7a184687 Author: Chris Wilson Date: Wed Mar 17 09:11:05 2010 +0000 i915: Correct preamble for emit_composite Fixes: http://bugs.freedesktop.org/show_bug.cgi?id=27123 Fatal server error: i915_emit_composite_setup: ADVANCE_BATCH: under-used allocation 100/104 Introduced with commit d6b7f96fde1add92fd11f5a75869ae6fc688bf77. Signed-off-by: Chris Wilson commit d6b7f96fde1add92fd11f5a75869ae6fc688bf77 Author: Chris Wilson Date: Sat Mar 6 15:49:04 2010 +0000 Fill alpha on xrgb images. Do not try to fixup the alpha in the ff/shaders as this has the side-effect of overriding the alpha value of the border color, causing images to be padded with black rather than transparent. This can generate large and obnoxious visual artefacts. Fixes: Bug 17933 - x8r8g8b8 doesn't sample alpha=0 outside surface bounds http://bugs.freedesktop.org/show_bug.cgi?id=17933 and many related cairo test suite failures. Signed-off-by: Chris Wilson commit 910fd171a00227025abc8bcc286a740f5bae895b Author: Chris Wilson Date: Fri Mar 5 14:32:13 2010 +0000 i830: Remove coord-adjust for nearest centre-sampling. Fixes a number of cairo test suite failures. Also affects: Bug 16917 - Blur on y-axis also when only x-axis is scaled bilinear http://bugs.freedesktop.org/show_bug.cgi?id=16917 Signed-off-by: Chris Wilson commit 753914acc31947df8e9f2fa3b9c39de745098709 Author: Carl Worth Date: Mon Mar 15 17:32:57 2010 -0700 Bump version to 2.10.902 For the imminent 2.10.902 snapshot release. commit 185196cb010cb8426ca929a9dc3f028ec9b383db Author: Carl Worth Date: Mon Mar 15 17:32:20 2010 -0700 NEWS: Add notes for the 2.10.902 snapshot. Which I'm about to push out. commit 318aa9ed799197810e2039dbe3ec51559dcc888c Author: Daniel Vetter Date: Mon Mar 8 23:22:53 2010 +0100 i915 XvMC: fixup colors My cleanup accidently created a inconsistency in the YUV plane ordering. I think we can safely assume that I'm colorblind ;) As Carl Worth rightly pointed out, this change deserves a more elaborate explanation: For Xv planar formats, the three planes are stored consecutively in memory, ordered Y U V. Now for some totally odd reason (= none at all), i915 xvmc stored it in Y V U order. Right after the release of 2.10, with commit "Xv: consolidate xmvc passthrough handling" I've inadvertently broken xvmc support (which started this whole odyssey into xvmc). When fixing stuff up, I neglected this special plane ordering and simply assumed it to be the same as Xv and dropped that special case for i915 in src/i830_video.c. This patch completes the change to standard YUV plane ordering by making the corresponding change in src/xvmc/i915_xvmc.c. Signed-off-by: Daniel Vetter commit 68629b63740fb6e62c258b8a46669e77660fa4e4 Author: Jesse Barnes Date: Mon Mar 8 15:42:39 2010 -0800 DRI2: make WaitMSC error handling more consistent with ScheduleSwap Just make it mirror ScheduleSwap: complete the wait on any error condition so as not to crash the client if the kernel is misbehaving. Signed-off-by: Jesse Barnes commit 6df74e61afb7831ebf3fbab8782f46ddccbe262b Author: Jesse Barnes Date: Mon Mar 8 15:33:20 2010 -0800 DRI2: truncate OML values to 32 bits We can only handle 32 bit values unless we totally virtualize the count, since the kernel only handles 32 bits itself. Rather than adding all that overhead, just tolerate the occasional missed event everytime the counter runs over. Reported-by: Mario Kleiner Signed-off-by: Jesse Barnes commit c66d57080dc034aa7877f47612065e388bbc38a2 Author: Jesse Barnes Date: Mon Mar 8 15:26:24 2010 -0800 DRI2: more WaitMSC fixes A couple more niggles: make sure we return a target_msc that at least matches the current count; this is a little more friendly to clients that missed an event. Also check for >= when calculating the remainder so we'll catch the *next* vblank event when the calculation is satisfied, rather than the current one as might happen at times. Reported-by: Mario Kleiner Signed-off-by: Jesse Barnes commit 7845c6ade82085488192bd76729d92fb7b534cc0 Author: Jesse Barnes Date: Mon Mar 8 15:19:14 2010 -0800 DRI2: fixup stray curly brace Got left in the wrong column after the last cleanup. Signed-off-by: Jesse Barnes commit 9656d329e4df28cfe138b657d04e5136bc794ce2 Author: Eric Anholt Date: Mon Mar 8 14:34:04 2010 -0800 Put back the pitch alignment for new framebuffers. I confused a dead assignment with dead code, because one of the args to the function was an outvalue. Fixes corruption under compiz. Bug #26814. commit b71ca26a026a356763c51c763bcdd8024fc4a783 Author: Jesse Barnes Date: Mon Mar 8 11:27:42 2010 -0800 DRI2: fixup ScheduleWaitMSC similarly to ScheduleSwap My merge of Mario's patch for this was botched. Fix it up so that OML waits work correctly, and remove a bogus warning from ScheduleSwap. Reported-by: Mario Kleiner Signed-off-by: Jesse Barnes commit 06b54e089eb21736e6d4f6462bbfca987be0c5cc Author: Matt Turner Date: Sun Mar 7 14:27:27 2010 -0500 Don't check for Xinerama. It doesn't seem to be used anywhere, so don't require it. CC: Eric Anholt CC: Jesse Barnes Signed-off-by: Matt Turner commit 8ece6cf5afa1bb0d8d9328696422f42f3c3adbd6 Author: Robert Hooker Date: Sat Mar 6 14:09:12 2010 -0500 Fix build against xserver 1.6 branch. Signed-off-by: Robert Hooker Reviewed-by: Chris Wilson commit 1cd556420277f103c47ade422f3ec8f8efb2d282 Author: Mario Kleiner Date: Fri Mar 5 12:32:18 2010 -0800 DRI2: handle target_msc, divisor and remainder properly in DRI2ScheduleSwap The current code in I830DRI2ScheduleSwap() only schedules the correct vblank events for the case divisor == 0, i.e., the simple glXSwapBuffers() case. In a glXSwapBuffersMscOML() request, divisor can be > 0, which would go wrong. This modified code should handle target_msc, divisor, remainder and the different cases defined in the OML_sync_control extension correctly for the divisor > 0 case. It also tries to make sure that the effective framecount of swap satisfies all constraints, taking the 1 frame delay in pageflipping mode and possible delays in blitting/exchange mode due to DRM_VBLANK_NEXTONMISS into account. The swap_interval logic in the X-Servers DRI2SwapBuffers() call expects the returned swap_target from the DDX to be reasonably accurate, otherwise implementation of swap_interval for the glXSwapBuffers() as defined in the SGI_swap_interval extension may become unreliable. For non-pageflipped mode, the returned swap_target is always correct due to the adjustments done by drmWaitVBlank(), as DRM_VBLANK_NEXTONMISS is set. In pageflipped mode, DRM_VBLANK_NEXTONMISS can't be used without severe impact on performance, so the code in I830DRI2ScheduleSwap() must make manual adjustments to the returned vbl.reply.sequence number. This patch adds the needed adjustments. Signed-off-by: Mario Kleiner commit 13119ffc034a3e9d6c76339d4fedc62bb3b41257 Author: Mario Kleiner Date: Fri Mar 5 11:33:45 2010 -0800 DRI2: make MSC waits handle specific target_mscs and divisor/remainders Previous code only handled divisor == 0 case correctly. This should honor a given target_msc for the divisor > 0 case and handle the (msc % divisor) == remainder constraint correctly. Signed-off-by: Mario Kleiner commit b6e0b92f398823629ba8a1ea8f5e62fbf959e725 Author: Jesse Barnes Date: Thu Mar 4 10:07:26 2010 -0800 DRI2: handle offscreen drawables better at swap time If a drawable isn't visible due to DPMS or redirection, we'll just blit it rather than schedule a swap event. However, we didn't reset the target_msc, so the swap target we receive from the server could get out of sync with the vblank count of the drawable's display. So at DPMS on time, the swap target would be the last good vblank count plus some large number (since the swaps won't have been throttled). Solve this by zeroing out the swap target like we should when we fall back to a blit. Also make the kernel error cases more friendly by making them fall back to blits too. Signed-off-by: Jesse Barnes commit 54ac4e2df987b72529a523ffbde357bec27e3658 Author: Chris Wilson Date: Thu Mar 4 21:34:52 2010 +0000 Rate limit batch buffer error. Once we hit this error it's unlikely that we're coming back - so don't flood the logs with redundant information. Signed-off-by: Chris Wilson commit 066d9b64ee243e0d255d7e12c2134951eef4ade7 Author: Daniel Vetter Date: Thu Mar 4 20:50:20 2010 +0100 i915 XvMC: kill dead code This kills one wip remnant from my i830_memory cleanup and the last remainings of the subpicture support. Signed-off-by: Daniel Vetter commit 7b7c724da97f358f5d2d4d4dae75cfc85bde2c62 Author: Eric Anholt Date: Thu Mar 4 10:29:09 2010 -0800 Remove remaining fbOffset setting. In the long long ago, fbOffset was used for DGA. The server now has only one reference to fbOffset, a leftover setting of it in fbdevhw. We can safely ignore it now, which is good since we weren't updating it in other places where the front buffer offset could change. commit 15026d64d3c0d8ad96e0a73fcae3103d1c41fd46 Author: Eric Anholt Date: Thu Mar 4 10:28:09 2010 -0800 Remove a piece of fbOffset cruft from non-DRM support. commit e8e615289213ba1704e402b923c51ce9d196f06f Author: Eric Anholt Date: Thu Mar 4 10:27:51 2010 -0800 Remove i830_allocate_2d_memory() now that it only called one function. commit e37b562083aa3293e0c009171724a3f122d8a32d Author: Eric Anholt Date: Thu Mar 4 10:23:12 2010 -0800 Init CRTC cursors with CRTC setup instead of i830_memory. commit a36bdaba6136054ae7c67943ca0215cfd177bc5b Author: Eric Anholt Date: Thu Mar 4 09:47:10 2010 -0800 Remove intel_sync() at teardown time. The kernel's still running after we're gone. This didn't matter. commit 4ada6d7a856a941b834871ff8a7c5505ff26ae23 Author: Eric Anholt Date: Thu Mar 4 09:32:42 2010 -0800 Remove 3D state clobber on EnterVT, and always clobber at batch start. We know that it's clobbered at each batchbuffer, anyway. And even if this server isn't running DRI2, it can still be clobbered at batch start in the KMS world. commit d92d42303e5ca9f4208ed97823ad8f691121370f Author: Eric Anholt Date: Thu Mar 4 09:31:56 2010 -0800 Remove pre-2.6.29 error message handling since we require KMS. commit faecd155c49229499e29815eb6e79662ed33ddd5 Author: Eric Anholt Date: Thu Mar 4 09:31:15 2010 -0800 Move batch and 965 render state setup/teardown to screen init/close. Whether we're VT switched or not shouldn't impact rendering. commit 74e2b69a317cc728b00e675c18d2976987407aec Author: Carl Worth Date: Thu Mar 4 09:51:03 2010 -0800 i915_hwmc: Remove dead code. Daniel recently identified this code as unneeded (with an #if 0). Here we take the next step and remove it entirely. commit 1cc35a8ba403ad95b67caff46b803db1edea5ad3 Author: Carl Worth Date: Thu Mar 4 09:46:33 2010 -0800 uxa: Fix type mismatch to avoid compiler warning. The code was using uint32_t where an XID (currently an unsigned long) was specified in the prototype. Use XID to avoid both the warning and any potential problem. commit 1d6537ec57535183638c62e3099bc79786c682ca Author: Carl Worth Date: Thu Mar 4 09:39:28 2010 -0800 i830_video: Remove unused variable. Certainly just a little leftover from the recent rewrites. commit 57c0043b9a519da5c9af29019ef632716782bda2 Author: Daniel Vetter Date: Tue Mar 2 09:22:33 2010 +0100 Xv: fixup relocation in i965_video.c The previous code made no sense, (multiplying an offset by 4 is meaningless). It could have onlt worked with the offset being fortuitously 0. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit e606be463f6359fd017791a8d4d85059831a5d41 Author: Daniel Vetter Date: Tue Mar 2 21:53:28 2010 +0100 i830_memory: rip out the remainings of the old allocator Yeah! Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit 371be65fb74789250dbb1e332e46416d931da321 Author: Daniel Vetter Date: Tue Mar 2 21:53:27 2010 +0100 XvMC: kill the pinned batchbuffer in the ddx code It's been unused for quite a while. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit d5a20c81ab76129a1e0bcefecd9c4a10b5040af4 Author: Daniel Vetter Date: Tue Mar 2 21:53:26 2010 +0100 i915 XvMC: kill pinned surface buffer in the ddx code Like with the per context stuff, also drop the now artificial limit on surfaces. Again, with that gone, a lot of code can be deleted. Reviewed-by: Carl Worth commit e6eb257ad32b393fb67c506943d8ece98b9a8061 Author: Daniel Vetter Date: Tue Mar 2 21:53:25 2010 +0100 i915 XvMC: kill pinned per-context buffers in the ddx code There's now not a reason anymore to limit the number of active contexts. So kill this accounting, too. With that all gone, per-context state in the ddx is nil, so rip out all associated code. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit 47ae1181f6cfd2ab64cd5c8535289fdaa2a9fd9c Author: Daniel Vetter Date: Tue Mar 2 21:53:24 2010 +0100 i915 XvMC: don't stall the cpu anymore Proper bo management ensures that the cpu doesn't step on buffers used by the gpu. Drop the now unnecessary synchronization. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit 9bba123c5f0f081562306c152e70221fc5041a3b Author: Daniel Vetter Date: Tue Mar 2 21:53:23 2010 +0100 i915 XvMC: drop superflous MI_FLUSH Cache coherency is now fully under the control of gem. For lack of hw documentation, I had to find out the correct cache placements by trial and error: Backward and forward surfaces: I915_GEM_DOMAIN_RENDER Correlation data: I915_GEM_DOMAIN_SAMPLER Changing any of them leads to visual corruptions, so I think these are the correct ones. Reviewed-by: Carl Worth commit b11623f20e303ae1d90d4a6bf0d5d73970b4e9bf Author: Daniel Vetter Date: Tue Mar 2 21:53:22 2010 +0100 i915 XvMC: switch surfaces to drm_intel_bo Now the last user of the fixed buffers provided by the ddx is gone! Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit b7f79bfd40db3ed17d7a79750d007b57d7ed157a Author: Daniel Vetter Date: Tue Mar 2 21:53:21 2010 +0100 i915 XvMC: switch corrdata buffer to drm_intel_bo It works! v2: Correlation data needs to be in the render cache! Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit 62846d88d41f1bbbd16a6e700ca611656fa20f61 Author: Daniel Vetter Date: Tue Mar 2 21:53:20 2010 +0100 i915 XvMC: switch msb to drm_intel_bo Like for the static indirect state buffer. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit d27955c697e1768559957da8d61087644befd285 Author: Daniel Vetter Date: Tue Mar 2 21:53:19 2010 +0100 i915 XvMC: switch sis to drm_intel_bo I've decided to allocate a new buffer for every render command, to prevent stalling for the gpu. libdrm bo reuse should take care of not wasting memory in case the buffer is not busy. Also always emit the full state, it's not worth it to complicate the code over a few stores to wc memory. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit 3203c66fbf04c55adba760e97c9fa1feb9e55f8d Author: Daniel Vetter Date: Tue Mar 2 21:53:18 2010 +0100 i915 XvMC: switch load_indirect_render_emit to batchbuffer macros Like with one_time_state_emit, this preps for relocatable bo's. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit d30decae6a9db585f2d2589ae2c3d9e1f9acd33d Author: Daniel Vetter Date: Tue Mar 2 21:53:17 2010 +0100 i915 XvMC: switch psc to drm_intel_bo Like with the sampler state buffer. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit b543c355f4fdcb64deb198765d9b8b86f7c234c2 Author: Daniel Vetter Date: Tue Mar 2 21:53:16 2010 +0100 i915 XvMC: switch psp to drm_intel_bo Like with the sampler state buffer. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit 18c364084ce5495ffdfea38c17c1297d555c6c54 Author: Daniel Vetter Date: Tue Mar 2 21:53:15 2010 +0100 i915 XvMC: switch ssb to drm_intel_bo This also starts to kill the last remnants of the support for physical addresses for the indirect state buffers. With gem this would need kernel support (in the form of a new reloc type in execbuf2). This does not change the ABI between ddx and client libIntelXvMC. I've decided to do this in one swoop when all the buffer rework is done. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit fc9e44f01910eb9fd43def9b2ac531b0742d8b4e Author: Daniel Vetter Date: Tue Mar 2 21:53:14 2010 +0100 i915 XvMC: kill last_flip and last_render Seems to be a remnant from i810 XvMC support. last_flip is always 0, so serves no real purpose anymore. Kill it and the associated code. With last_flip gone, last_render also lost its purpose. Kill it, too. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit 04aa38a639fefcd00acb485f36ab18c2083ed1bb Author: Daniel Vetter Date: Tue Mar 2 21:53:13 2010 +0100 i915 XvMC: switch one_time_state_emit to batchbuffer macros This is in preparation for real relocatable drm_bo's instead of memory at a fixed address. By switching to the batchbuffer macros (like i965 xvmc) we can use the nice OUT_RELOC macro. Also align the code more with coding-style elsewhere, i.e. bitops instead of bitfield structures. The bitfield structures are quite a mess to work with the batchbuffer macros, so they were getting in the way, anyway. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit 24d787335a0c319b8d9243ea1f2726575cf73b2b Author: Daniel Vetter Date: Tue Mar 2 21:53:12 2010 +0100 XvMC: kill dead code in i915_xvmc.c WIP code that hasn't changed for over two years is unlikely to suddenly start progressing. Drop it. After all, git can easily resurect it in cases it's needed. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit 13266b152ae35ed54984844e3282cbdf20dc2e32 Author: Daniel Vetter Date: Tue Mar 2 21:53:11 2010 +0100 XvMC: kill i830_memory in 965 class xvmc Yes, this breaks binary compat of the struct passed around between X ddx and the client libXvMC. But we always ship both, so they should not get out of sync. Signed-off-by: Daniel Vetter Reviewed-by: Carl Worth commit d39d822cf887a861b37cee92c0b59533370ded2f Author: Daniel Vetter Date: Tue Mar 2 09:22:44 2010 +0100 i830_memory: hide as much of the old memory allocator as possible The only user left of this stuff is the xvmc support. Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit 65267d4bfbf19942beab72858333c6ee3c719223 Author: Daniel Vetter Date: Tue Mar 2 09:22:43 2010 +0100 i830_memory: switch frontbuffer to drm_intel_bo Yet another user of i830_memory gone for good. Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit 06f147dc04629a8a1534703be570e7f25e41cdd9 Author: Daniel Vetter Date: Tue Mar 2 09:22:42 2010 +0100 i830_memory: switch cursors to drm_intel_bo Minus one user of i830_memory, some more to go. Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit 23d12e3b088f38d25e83d6501d553d98be442d49 Author: Daniel Vetter Date: Tue Mar 2 09:22:41 2010 +0100 i830_memory: kill field "pitch" Totally unused. Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit 2fb8feeb56fae364380ffd91749eeb69fb461cff Author: Daniel Vetter Date: Tue Mar 2 09:22:40 2010 +0100 i830_memory: rip out field "size" Use the one in the drm bo instead. Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit 4d4d763b3d96e2cac99a0b7b03ad9bcaf4465c61 Author: Daniel Vetter Date: Tue Mar 2 09:22:39 2010 +0100 i830_memory: kill field "tiling_mode" Totally unused. Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit d0800d098739d5e8ea94be9c5ed2f7a8a86c06dc Author: Daniel Vetter Date: Tue Mar 2 09:22:38 2010 +0100 i830_memory: no memory allocations without a bo! Kill the corresponding !bo path in i830_free_memory. Also kill another remnant of the pre-kms era in the same file, while I was looking at the code. Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit 086c0e25cac1d3dd0a37def8b5cb82c1c6279edf Author: Daniel Vetter Date: Tue Mar 2 09:22:37 2010 +0100 i830_memory: rename i830_bind_all_memory to reflect code reality It doesn't bind anything anymore, but does a few random things. Give it a hopefully vague enough name to cover all cases ;) Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit 2a989aa057cee74154419fd0a4911ba1e95582cf Author: Daniel Vetter Date: Tue Mar 2 09:22:36 2010 +0100 i830_memory: rip out the old video memory allocator Besides the debug stuff the went away in the previous patch, this stuff was totally unused ... Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit bf83b9a10254966cb73b24e08954154d4296dac3 Author: Daniel Vetter Date: Tue Mar 2 09:22:35 2010 +0100 i830_memory: kill i830_desribe_allocations Totally useless debug function from the pre-gem era. No point to occasionally spam Xorg.log with a bogus "No memory allocations" message. Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit ff8a1e1cf728eeae848f6284bb4272193dfa918b Author: Daniel Vetter Date: Tue Mar 2 09:22:34 2010 +0100 i830_memory: rip out field "offset" Use the one in the drm bo instead. Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit e18ffceb142a9e18968900dd526a2d50fab72900 Author: Daniel Vetter Date: Tue Mar 2 09:22:32 2010 +0100 i830_memory: rip out field "end" It's a left-over from the non-gem era and no longer used at all. Signed-off-by: Daniel Vetter Reviewed-by: Eric Anholt commit 5018fd3097d77a5f31af4cb27e39daa37557b64e Author: Daniel Vetter Date: Mon Mar 1 22:57:40 2010 +0100 libIntelXvMC: kill ums leftovers On i965 class hw, kernel_exec_fencing was 1 always, anyway. And on i945, this patch kills a memory leak (dunno how, but it does). Signed-off-by: Daniel Vetter commit cb06aa32d433f54affe87da2cf964f0308d3c258 Author: Daniel Vetter Date: Mon Mar 1 22:57:39 2010 +0100 Xv: fixup XvMC on i915 I've accidentally broken i915 xvmc due to alignment constrains that break my assumption that Y-pitch == UV-pitch*2. Fix this up by consistenly using dstPitch2 for the Y-pitch. This also unifies the dst pitch computation slightly, now that the i915 xvmc special case is gone. Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=25949 Signed-off-by: Daniel Vetter (Minor edit to support compilation without INTEL_XVMC defined by Carl Worth ) commit 80f2a1f3b5e477a12899ea2251aebcfa62689943 Author: Daniel Vetter Date: Mon Mar 1 22:57:38 2010 +0100 Xv: fixup YUV plane offset for xvmc case In my previous cleanup I've inadvertedly dropped the offset adjustment code for the xvmc passthrough case. Fix this up. Also reimplement that ugly hack I've accidently killed to keep i915 class xvmc a tad bit longer on life support. Signed-off-by: Daniel Vetter Tested-by: xunx.fang@intel.com commit a0ee9c3d9c72962c8d513ec8c43dd4a21e316947 Author: Carl Worth Date: Fri Feb 26 17:05:45 2010 -0800 Update version number to 2.10.901 In order to make a new snapshot. commit 63b8e890a134e5fc8242b655115491a3905ad0ff Author: Carl Worth Date: Fri Feb 26 17:05:06 2010 -0800 NEWS: Add notes for the 2.10.901 snapshot. From skimming the git lot since 2.10.0. commit d5409303128f5c9ba940ab564ff407a82eabc597 Author: Carl Worth Date: Fri Feb 26 16:12:50 2010 -0800 Remove dead code: fill_detailed_lvds_block All callers of this function were recently removed, so it can join them in the bit bucket. commit 7d0e6ff4dadcf243b1006ce6f85bd06c5f4e4908 Author: Adam Jackson Date: Wed Dec 2 12:05:52 2009 -0500 kms: Fix LVDS mode list construction. Rather than mangle the EDID block and hope the server does the right thing, just build a sensible mode list up front. Do this for LVDS where there is no EDID or where it does not claim to be continuous-frequency (since in the latter case, the server will add reasonable modes for us). Signed-off-by: Adam Jackson commit 1730af4437530ab7f6fe6ca74b16efb4a843b3ae Author: Carl Worth Date: Thu Feb 25 17:12:49 2010 -0800 NEWS: Fix typo (we just released 2.10 *not* 1.10) Sigh. Every version number that must be typed manually will eventually be typed incorrectly at some release. (I think that's Owne Taylor's Law) commit 529bf185fbcb9f7705b315a5106054ee25c1c77f Author: Eric Anholt Date: Wed Feb 24 17:54:13 2010 -0800 In frame event handling, track drawable id instead of drawable pointer. Windows aren't refcounted, so if the event came in after the window was destroyed, we'd dereference garbage and segfault. commit 633c7033170b0e9b468dbee444b94922f6c30940 Author: Eric Anholt Date: Wed Feb 24 17:40:30 2010 -0800 Fix up a bunch of inconsistent 4-space indentation in i830_dri.c commit 9291828a569a01ed4a6ef71f530b93f8a54c84aa Author: Eric Anholt Date: Fri Jan 15 12:51:50 2010 -0800 Add new mobile Sandybridge PCI IDs. commit 3c71f98b9e5262675e61fafb317d0c35e62a873f Author: Eric Anholt Date: Thu Oct 22 16:55:02 2009 -0700 Add initial defines and probing for Sandybridge commit c2c670ef18755cf5c878edf8a6b7d1617f54fe73 Author: Eric Anholt Date: Fri Feb 19 12:54:48 2010 -0500 Remove more DRI1 dead code. commit b320449f75adf912e06832dacc0b861ce26353bd Author: Eric Anholt Date: Fri Feb 19 12:44:11 2010 -0500 Remove dead i830_ring.h. commit 6d48b26098691d772a8de001c89a05b2442ef3b5 Author: Eric Anholt Date: Fri Feb 19 12:27:55 2010 -0500 Remove dead i830_display.h. commit 4126f73051aa73defcf342c81aa0fc9062f83f90 Author: Eric Anholt Date: Fri Feb 19 12:25:47 2010 -0500 Remove dead i830_bios.h. commit ca173c1eaf0e28f7fa138b1965f5e768b3add895 Author: Eric Anholt Date: Fri Feb 19 12:24:00 2010 -0500 Remove the last tool now that it's been moved to gpu_tools. commit 6da7cda5830817b0c977ed4767a9432748f12b09 Author: Eric Anholt Date: Fri Feb 19 12:21:47 2010 -0500 Remove swf_dumper. We have intel_mmio_read in gpu_tools to do this. commit 71c613c8475909e58fc491131bf9c10f4b047b16 Author: Eric Anholt Date: Fri Feb 19 12:20:33 2010 -0500 Remove bios_reader now that it's moved to gpu_tools. commit 7ada4eb3836f58a72f1c5b6b8139030fab9b7d63 Author: Eric Anholt Date: Fri Feb 19 12:18:23 2010 -0500 Remove intel_hotplug tool now that it won't work with KMS. We'd want to put something like it in sysfs or something if we wanted this tool to exist again. commit 3284aacfe095f6260eee5ed126685d0638626a29 Author: Eric Anholt Date: Fri Feb 19 12:14:12 2010 -0500 Remove dead i830_bios.c. Things that used it are now either in the kernel or stashed off in gpu_tools. commit 761d386a940081688b9b599c7a5b0270abfc5138 Author: Eric Anholt Date: Fri Feb 19 12:13:25 2010 -0500 Remove intel_gtt and intel_lid now that they're in gpu_tools. commit 6199af00cb47df6347ecd72ff7f6c86a564cec57 Author: Eric Anholt Date: Fri Feb 19 12:06:18 2010 -0500 Remove xprintf.c from the old "I can't believe it's not an X Server" tools. commit cba8e3136a100ba274f48c78df5b23fa8960fa16 Author: Eric Anholt Date: Fri Feb 19 12:04:51 2010 -0500 Remove intel_statuspage, now that we have /debug/dri/0/i915_gem_hws commit 40f5f72e30003993bfe298cd634d4f3f56148d4a Author: Eric Anholt Date: Fri Feb 19 12:01:30 2010 -0500 Remove dead main.c from reg_dumper/ commit 0c5e4a65f5d0f8d41c6bcb4c6978054f40064494 Author: Eric Anholt Date: Fri Feb 19 12:00:56 2010 -0500 Delete the audio dumping tool now that it lives in gpu_tools. commit 6bdab841766c8d9febaa23cb01a7bbc9edfae471 Author: Eric Anholt Date: Fri Feb 19 11:21:40 2010 -0500 uxa: Skip adjusting mask coordinates when no mask is present. Quiets clang warnings about garbage variable usage. commit a86869e6c3131b83a2ad529bc313270a9f45f5bd Author: Eric Anholt Date: Fri Feb 19 08:15:30 2010 -0800 Fix an unused variable warning for !INTEL_XVMC. commit ec5deb2bcbf828c3c47488eb77461c26cab38ed6 Author: Eric Anholt Date: Fri Feb 19 08:11:00 2010 -0800 Remove dead assignments noticed by clang. commit a4180eabfa00c256494ed09aa336a17605c49a8a Author: Eric Anholt Date: Fri Feb 19 08:10:17 2010 -0800 Remove stale junk in VideoRam setup, noticed by clang. commit 03657d4a698e0a25ab3863a15ad4c8b9d64dbb9a Author: Eric Anholt Date: Fri Feb 19 08:03:44 2010 -0800 Remove dead UMS CRTC resize code. commit 1c3aaad09d6ef207fba748ad4ef4575a26ab2e5c Author: Chris Wilson Date: Wed Feb 17 17:48:32 2010 +0000 dri2: Silence the compiler for an unused function with proto < 4 Move the unused function into the #if DRI2INFOREC_VERSION >= 4 block. Signed-off-by: Chris Wilson commit 00e7312dc45e54cd4547a943897a524639cb0b38 Author: Jesse Barnes Date: Thu Feb 11 09:46:12 2010 -0800 DRI2: handle full height blits without tearing in CopyRegion On 965 and up, if we detect a full height blit, we should just wait for vblank, rather than try to do a scanline wait for the whole display. On pre-965, doing a scanline wait followed by a blit works, but in the full height case we need to give the blitter time to start up, so we wait until the bottom line of the blit minus 2 padding scanlines to accommodate. Fixes FDO bug #22475. Signed-off-by: Jesse Barnes commit f0d760bfd71e2b2b40d2b250cd84b4626492ba47 Author: Jesse Barnes Date: Wed Feb 10 11:24:46 2010 -0800 Disable bo reuse on shadow framebuffer This keeps us from trying to set tiling on it while pinned, which also keeps us from trying to unpin it in the kernel, causing an error. Signed-off-by: Jesse Barnes commit 41784e15d39c29af5a87fe8d0982bd1b0be3562d Author: Gaetan Nadon Date: Fri Jan 29 15:54:16 2010 -0500 config: remove dead LINUXDOC macro usage This module does not generate LINUXDOC documentation. Signed-off-by: Gaetan Nadon commit 6610bcbac51c9ac970128012f0d4566d8cfba000 Author: Jesse Barnes Date: Fri Feb 5 17:18:50 2010 -0800 DRI2: only use version 4 APIs if kernel support exists Check for page flipping support before enabling flip and vblank event support needed for the new DRI2 APIs. Signed-off-by: Jesse Barnes commit 1a76fa5574e8e8f88ac3518a4e4494e1af301dc1 Author: Keith Packard Date: Fri Jan 29 23:28:46 2010 -0800 Initialize DRI2 info rec version 4 list of driver names With DRI2 supporting multiple subsystems, the video driver must initialize the list of driver names instead of just passing the single driver name used by Mesa. Without this, the X server will fail to initialize DRI2 as the numDrivers field in this structure will be uninitialized. Signed-off-by: Keith Packard commit 918151a7955c26174db80b775205f6ffb4f44ab6 Author: Chris Wilson Date: Wed Jan 27 20:33:08 2010 +0000 uxa: Fix compatible_formats() for OVER In separating the boolean logic out into a separate function, dc6522dd, I reversed the sense of one particular test: src->format == dst->format The OVER optimisation is only valid if the src and dst formats match, but not always. Signed-off-by: Chris Wilson commit 197cb08a2d54cabbfe97454d7db85cfe1f5f27ba Author: Chris Wilson Date: Mon Jan 25 15:15:04 2010 +0000 Extract pixel value for all formats to avoid hitting fallbacks. On failing to extract the pixel value for an alpha-only solid we actually triggered a fallback. Since this path is commonly hitting whilst fading in images, for example cairo_paint_with_alpha(), the fallback was detected during the Moblin boot sequence where it was adding a second to the overall boot time. See fallback intel: Moblin startup is hitting a composite fallback, costing a ton of performance https://bugs.freedesktop.org/show_bug.cgi?id=26189 Based on the initial patch by Arjan van de Van. Signed-off-by: Chris Wilson commit 5f93d019dc6311dd16b6792ffb60dbfc45ef3d08 Author: Chris Wilson Date: Mon Jan 25 15:47:11 2010 +0000 uxa: Adjust uxa_get_color_for_pixmap to match prototype The prototype says this function returns a Bool and not just an int, so be pedantic and return TRUE/FALSE. Signed-off-by: Chris Wilson commit dc6522dd491831f3843606e3ed57cc01fe2c804c Author: Chris Wilson Date: Sun Jan 24 09:37:23 2010 +0000 uxa: Protect against a potential NULL src->Drawable reference One of the convoluted if branches dereferenced Drawable when it is potentially NULL. Avoid this by explicitly handling the NULL Drawable cases earlier, and enabling solid fills for solid sources. Signed-off-by: Chris Wilson commit 31bbd7f919f4f1f545dd49861c15e60561c075cb Author: Chris Wilson Date: Sun Jan 24 09:04:16 2010 +0000 uxa/uxa-render: Always remove useless repeats during composite. I added a jump if there was no src or mask Drawable, but we do actually need to check for useless src repeats even if we have a source-only mask. Signed-off-by: Chris Wilson commit 326fe00df4160fbc3513ddbedfec90bdb2d7101b Author: Chris Wilson Date: Sun Jan 24 09:02:05 2010 +0000 uxa: Increase amount of composite fallback verbage The fallback log for http://bugs.freedesktop.org/show_bug.cgi?id=26189 does not actually state the reason why we actually fallback. This is possibly because we need to fallback for reasons other than the operation cannot be performed in hardware -- such as using an alpha map or the screen is swapped out, so add this information to the fallback log. Signed-off-by: Chris Wilson commit 93cd943d41c646c794b8cb5a960d8f0805e15395 Author: Eric Anholt Date: Fri Jan 15 12:53:47 2010 -0800 intel: Use the compositing-aware colorkey filler instead of homebrew fail. Of course, it's still fail since you can't correctly composite colorkey overlay, but at least this doesn't spam colorkey to the root window. Tested-by: Daniel Vetter commit 6e61de896b42cffe1af6b0384cb69265d3d121a1 Author: Alan Coopersmith Date: Fri Jan 15 15:51:28 2010 -0800 Update Sun license notices to current X.Org standard form Signed-off-by: Alan Coopersmith commit 96f45c66eed2631eba98ae416c3afdf540fa5c34 Author: Jesse Barnes Date: Wed Jan 13 13:20:43 2010 -0500 DRI2: if the swap condition is satisfied, complete it immediately If we get to the point where we check the divisor/remainder equation and it's satisfied, we should complete the swap immediately. Signed-off-by: Jesse Barnes commit 51c75906329a4727e37c8d1f64f257ea9602caa2 Author: Jesse Barnes Date: Fri May 1 14:52:26 2009 -0700 DRI2: support new DRI2 APIs The new interfaces allow for improved buffer swap, and support for the SGI_swap_control, SGI_video_sync and OML_sync_control GLX extensions. The Intel implementation allows page flipping to occur for swaps that are full screen and not rotated. Signed-off-by: Jesse Barnes commit 4902f546be19e3d5bb47f6c75e2199dc4856c0f4 Author: Chris Wilson Date: Sun Dec 13 10:44:12 2009 +0000 i965: Ensure that URB_FENCE is aligned to 64-bytes The PRM (Vol 1, p32) specifies that the URB_FENCE command must not cross a cache-line boundary (64-bytes) in order to workaround a silicon issue. Ensure that it does not by inserting an alignment point before the atomic section. This is a slightly too large hammer, but the easiest method to work with the current BEGIN_BATCH/ADVANCE_BATCH protections. Signed-off-by: Chris Wilson commit 83626aba357ffb4dd7931daaf163c1dd1d08f9d3 Author: Chris Wilson Date: Sun Nov 29 21:39:41 2009 +0000 uxa-glyphs: Enable TILING_X on glyph caches. Signed-off-by: Chris Wilson commit 50e07da8094c8c8c593b6eb8c41fc42444851d04 Author: Chris Wilson Date: Sun Dec 13 09:35:36 2009 +0000 i830: Do not use vtSema when chosing mapping type. The mapping type to use is determined by the tiling of the underlying object, not by whether or not not we control the vt. This was a left-over wart that was intended to mean that we had GEM and so could use GTT mappings. Signed-off-by: Chris Wilson commit 7a2b7cfab5cdef277f0feb838683422d9fcb0db3 Author: Chris Wilson Date: Sun Dec 13 09:33:45 2009 +0000 Consolidate determining maximum sizes for use with GEM Add a small wrapper function so that the callsites need only call the single function when checking the available aperture size for determining the maximum viable size for operations. This will allow us to easily extend this set in the future by only needing to adding the check to a single location. Signed-off-by: Chris Wilson commit 229d23fb18d696fb7ad476ce335be14ec9811bd3 Author: Daniel Vetter Date: Tue Dec 1 14:32:34 2009 +0100 Xv: don't enable XVMC port on unsupported configs This just makes it _really_ clear, what's supported. No other changes. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit ce7ba18f577cc9aedddaff303dbc9662a276b4cf Author: Daniel Vetter Date: Tue Dec 1 14:32:33 2009 +0100 Xv: consolidate xmvc passthrough handling It's now all in I830PutImageTextured. Also kill some leftovers from XVMC-on-overlay support and ums-XVMC-on-i915 support. Plus a small comment as a reminder for where to add i915 xvmc support back in. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 1ac7c94083a3266e2d5dd932709118436074dd00 Author: Daniel Vetter Date: Tue Dec 1 14:32:32 2009 +0100 Xv: hide ugly semantics in i830_clip_video_helper I'm still curious as to why fixed-point semantics are necessary for this generic XV helper function that's been causing all this. Can modern X really run on hw without floating-point support? Anyway, the ugliness is now all nicely under the carpet (in i830_clip_video_helper). Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 31f13fa8a0d4cd28067de37d0d31d23e8200d0ff Author: Daniel Vetter Date: Tue Dec 1 14:32:31 2009 +0100 Xv: move users of x1, x2, y1, y2 to PutImage After this there are no other external users of these strange variables, so we can nicely hide them somewhere in the next changeset. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit ce6526b9b4df304ccd83a0a02a95621300dbaed3 Author: Daniel Vetter Date: Tue Dec 1 14:32:30 2009 +0100 Xv: kill unnecessary parameters for hw PutImage functions This is the first part of my small crusade to rip out x1, x2, y1, y2 from I830PutImage*. These variables have strange semantics (they change from simple integers to fixed-point values somewhere in the middle) and don't really seem to be what we actually need. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit cf74caaa91667457bba3583b216dfc157d09f39e Author: Daniel Vetter Date: Tue Dec 1 14:32:29 2009 +0100 Xv: kill an unnecessary if We always pass a non-null pointer for crtc_ret, no point to check for this. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit d8353c737b5b8077f499461b1e6c78f09544d226 Author: Daniel Vetter Date: Tue Dec 1 14:32:28 2009 +0100 Xv: split up I830PutImage into textured and !textured case This wasn't making much sense anymore, and further cleanups will make this even more apparent. This change just makes two copies of I830PutImage and kills the not-applicable if-clauses in both versions. There is one small functional change in here: The textured video path doesn't munch around with adaptor_priv->videoStatus anymore, which is only used by the overlay. This could prevent the overlay from being switched off if someone would use textured video at the same time. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 091035146463bf1aa6674bff6947d04fc620c18f Author: Carl Worth Date: Mon Jan 4 14:20:11 2010 -0800 configure.ac: Bump version to 2.10.0. In preparation for the 2.10.0 release. commit 01f7d0307b3f5f085e383ff85026757de9cda359 Author: Carl Worth Date: Mon Jan 4 14:19:17 2010 -0800 NEWS: Add final release notes for the 2.10.0 release. Mentioning that it's functionally identical to our most recent release candidate. commit e966bca3a9143cff37beb54359bea13c9f693b44 Author: Zhenyu Wang Date: Tue Dec 29 21:49:49 2009 -0800 Take note for Pineview support in README and manpage Signed-off-by: Zhenyu Wang commit 6137791e9f1a4778afabbbc06de3da68648ae258 Author: Carl Worth Date: Mon Jan 4 14:08:24 2010 -0800 man page: Remove section describing BACKLIGHT_CONTROL property. This apparently no longer exists in a KMS world, so remove it from the documentation. commit 7f36a439249cc2101d8985de5e95af652e5b984b Author: Carl Worth Date: Mon Jan 4 14:07:24 2010 -0800 man page: Rename PANEL_FITTING to "scaling mode". The old UMS name was PANEL_FITTING while the new KMS name is "scaling mode". Fixes bug #25606. commit a6fb71e6e26fb31f4cd10fad2d3a87d9114a649a Author: Carl Worth Date: Mon Jan 4 14:05:27 2010 -0800 man page: Add additional indentation for some output configuration options. The BACKLIGHT_CONTROL and PANEL_FITTING options appear in a list, and then each contain a sub-list of sub-options. Use indentation to make this structure more apparent to the reader. commit 25a6c8dfae240143309b14cc32ebac6008c3a378 Author: Gaetan Nadon Date: Tue Dec 15 21:46:48 2009 -0500 configure.ac: use backticks rather than $() for cmd subs Use "$PKG_CONFIG" rather than hard coded "pkg-config" Acked-by: Dan Nicholson Acked-by: Daniel Stone Signed-off-by: Gaetan Nadon commit 2c142e421e859406b5aff16ba18624150269fc06 Author: Carl Worth Date: Thu Dec 10 15:25:44 2009 -0800 Update version to 2.9.99.902. For the second release-candidate snapshot in preparation for 2.10. commit 8ecf70ea553083cbc26928dc3973c8f6f8b3d9d0 Author: Carl Worth Date: Thu Dec 10 15:17:57 2009 -0800 NEWS: Add notes for 2.9.99.902 (and preliminary notes for 2.10) This comes from my cursory glance over the commit log from 2.9.1 to master. commit 88b2209a7526a7c7f3b3a2d491d48bd0d5d56e04 Author: Carl Worth Date: Thu Dec 10 14:52:46 2009 -0800 Document the DebugFlushBatches, DebugFlushCaches, and DebugWait options. These were added in 3c0815abf28744e215bea286e71d935cd486955a . The documentation added here comes straight from that commit message. commit 8d6faf7dc546bda64e11bf6dea7f3c997f07f887 Author: Tobias Doerffel Date: Wed Dec 9 09:57:20 2009 +0100 Fix compiler warning in i830_copy_video_data() if XvMC is disabled The variable "intel" is unused when building i830_video.c without XvMC support which results in a compiler warning: i830_video.c: In function 'i830_copy_video_data': i830_video.c:1443: warning: unused variable `intel' Trivial fix via #ifdef. commit bd81734465912d79d6320a6fb021ce43d258b906 Author: Daniel Vetter Date: Tue Dec 8 15:27:41 2009 +0100 Xv: enable drmmode overlay Now that libdrm 2.4.16 is released (and already required) we can unconditionally enable this. Please add something like this to the release-notes/NEWS file: * Overlay support for kernel modesetting. This needs at least kernel v2.6.33 to work. A backport to 2.6.32 is available at: http://gitorious.org/daniel-s-linux-stuff/linux-kernel/commits/intel-kms-overlay-for-2.6.32 Signed-off-by: Daniel Vetter commit 37f631d669c165c4fb56ccd7a6fc0a432f453b52 Author: Chris Wilson Date: Thu Dec 10 08:50:16 2009 +0000 Revert "uxa-glyphs: Enable TILING_X on glyph caches." This reverts commit 3f11bbec420080151406c203af292e55177e77d1. For unknown reasons, enabling tiling for the glyph cache is causing glyph corruption both across suspend and resume and VT switching, on a wide range of chipsets (reports include both i8xx and gm45) This strongly suggests that we are handling tiling, or updates to tiled buffers, incorrectly across i915_gem_idle(). However, until we can find the root cause, we want to fix this regression before the next stable release, so simply revert this patch. :( Fixes: [Bug 25406] fonts garbled after resuming from suspend since 6729b508 http://bugs.freedesktop.org/show_bug.cgi?id=25406 Signed-off-by: Chris Wilson commit 093bb9ebe69760975a3fcf2322db950312e6c2d7 Author: Chris Wilson Date: Tue Dec 8 23:45:28 2009 +0000 i965: Only use the affine kernels if both src and mask are affine Signed-off-by: Chris Wilson commit 0cf04ea4d736f7d7848f33b772d88a0f1b6678b1 Author: Chris Wilson Date: Tue Dec 8 23:44:45 2009 +0000 i965: Set src_filter before testing. Signed-off-by: Chris Wilson commit 417ad2712edcbca635eb5eeff0d11cdb16c069ed Author: Chris Wilson Date: Tue Dec 8 23:43:57 2009 +0000 Assert that we only call OUT_BATCH() inside a BATCH Signed-off-by: Chris Wilson commit 47416b1eea09b238a997636d35998d71e0d18161 Author: Chris Wilson Date: Tue Dec 8 13:47:07 2009 +0000 i965: Maximum number of vertices per composite is 24, not 18 Beware the potential buffer overflow. Signed-off-by: Chris Wilson commit c1afc831c8fe4cbececee7dfa23506a6746c2425 Author: Chris Wilson Date: Mon Dec 7 21:27:56 2009 +0000 uxa: Cache solid fills. Maintain a small cache of pixmaps to hold SolidFill pictures. Currently we create a pixmap the size of the damaged region and fill that using pixman before downloading it to the GPU and compositing. Needless to say this is extremely expensive compared to simply emitting the solid colour. To mitigate this cost, we maintain a small cache of 1x1R pictures which is recognised by the driver as being a solid, but at the very least is maintained as a GPU ready pixmap. This gives a good boost to cairo-xcb (which uses solid fills) on a gm45: Before: gnome-terminal-vim: 41.9s After: gnome-terminal-vim: 31.7s Compare with using a cache of 1x1R pixmaps in cairo-xcb: gnome-terminal-vim: 31.6s Signed-off-by: Chris Wilson commit cd475bad23c02130d11c49882c11261c9f0d4ef1 Author: Chris Wilson Date: Mon Dec 7 11:09:14 2009 +0000 batch: Ensure we send a MI_FLUSH in the block handler for TFP This should restore the previous level of synchronisation between textures and pixmaps, but *does not* guarantee that a texture will be flushed before use. tfp should be fixed so that the ddx can submit the batch if required to flush the pixmap. A side-effect of this patch is to rename intel_batch_flush() to intel_batch_submit() to reduce the confusion of executing a batch buffer with that of emitting a MI_FLUSH. Should fix the remaining rendering corruption involving tfp [inc compiz]: Bug 25431 [i915 bisected] piglit/texturing_tfp regressed http://bugs.freedesktop.org/show_bug.cgi?id=25431 Bug 25481 Wrong cursor format and cursor blink rate with compiz enabled http://bugs.freedesktop.org/show_bug.cgi?id=25481 Signed-off-by: Chris Wilson commit 415aab474edd1425034981306718afd8506445f1 Author: Chris Wilson Date: Fri Dec 4 09:02:36 2009 +0000 intel: And remember to flush the batch... In commit 98e11210 Remove flush parameter from intel_batch_flush() Maxi spotted that I had broken screen updating. It appears in my haste to eliminate the extra parameter I removed a call to intel_batch_flush() when throttling, i.e. when pushing the updates to the screen before idling. Should fix: Bug 25409 [bisected] rendering corruption since a938673e https://bugs.freedesktop.org/show_bug.cgi?id=25409 Signed-off-by: Chris Wilson commit 8438372dcc9d15c7b708332cfcb3a1c16a2c5cf2 Author: Kristian Høgsberg Date: Thu Dec 3 14:39:43 2009 -0500 Require libdrm 2.4.16 Needed for drmGetDeviceNameFromFd(). commit c439207ec0cc16d7d9f523598fcdebf7cec893e2 Author: Jesse Barnes Date: Wed Dec 2 14:43:17 2009 -0800 Update man page to reflect currently available options Many have been removed or are obsolete now that UMS is gone. And some are only available on i810/i815 or i830+, so move them to the appropriate section. Signed-off-by: Jesse Barnes commit a938673ee84d51ef655c37dfa7bbc5c35334cd28 Author: Chris Wilson Date: Wed Dec 2 20:51:53 2009 +0000 batch: Downgrade batch submission from a FatalError. If we wedge the GPU then we will return -EIO for the current batch and then attempt to reset the GPU. Meanwhile the X server detects the error, throws a FatalError and to all intents and purposes appears to crash to the user - whereas before it often just appeared to momentarily freeze. Of course, on older hardware the server remains frozen until we can find a way to reset those GPUs at runtime. Signed-off-by: Chris Wilson commit 98e11210367c950e3f932419d2a4722cf971885d Author: Chris Wilson Date: Wed Dec 2 20:48:37 2009 +0000 Remove flush parameter from intel_batch_flush() There is only a single caller that wishes to forcibly append a flush into the batch: intel_sync(). So move the logic there. Signed-off-by: Chris Wilson commit 57336c26f1fb90d43851ddcf78539585b67d86d9 Author: Chris Wilson Date: Wed Dec 2 20:42:41 2009 +0000 Rename I830Sync() to intel_sync() Signed-off-by: Chris Wilson commit 370157f4932cf9067ba81c8bd5a311aff610882b Author: Chris Wilson Date: Wed Dec 2 20:28:49 2009 +0000 batch: Avoid flushing a NULL batch During shutdown from a FatalError during batchbuffer submission, it is possible for the batch_ptr to be NULL, so we must be careful not to append a flush on this error path. Signed-off-by: Chris Wilson commit ad68881b670aabf8dbfd3b954e8796f91260579d Author: Chris Wilson Date: Wed Dec 2 14:14:39 2009 +0000 uxa_check_composite: Minor whitespace. Signed-off-by: Chris Wilson commit 49d2ccab2a82083110fe796636f3f91ba8c31237 Author: Chris Wilson Date: Wed Dec 2 14:13:43 2009 +0000 uxa_prepare_access() don't force a flush. Only the kernel knows whether the mapping requires a flush, so do not preempt it. Signed-off-by: Chris Wilson commit b68d3646f1fdfe012c16741958c7a62136a9b5aa Author: Chris Wilson Date: Wed Dec 2 14:12:19 2009 +0000 Review use of errno after libdrm call Since drm may not actually set the appropriate errno after a failure, we must use the return code instead when determining the cause of failure. Signed-off-by: Chris Wilson commit 0ff4d42a42b9e537b083343ee7dcc41cb41ae7cf Author: Chris Wilson Date: Wed Dec 2 12:12:07 2009 +0000 uxa: Review uxa_prepare_access() to remove potential nesting Around a call to uxa_put_image() it is possible to mix both accelerated and fallback paths, with the fallback code making the presumed optimisation of only trying to call uxa_prepare_access() once. This fails if the accelerated path also uses prepare/finish access on the same drawable and then later fallback to the fallback path. This can happen currently if an error is reported whilst attempting to accelerate PutImage. #0 memcpy () at ../sysdeps/x86_64/memcpy.S:162 #1 0x00007ffff43ce4bd in fbBlt (srcLine=, srcStride=40, srcX=, dstLine=0xffffffffffffffff, dstStride=64, dstX=0, width=, height=8, alu=3, pm=4294967295, bpp=8, reverse=0, upsidedown=0) at fbblt.c:93 #2 0x00007ffff43ce740 in fbBltStip (src=0xffffffffffffffff, srcStride=156555204, srcX=34, dst=0xfffffffc, dstStride=64, dstX=40, width=304, height=8, alu=3, pm=4294967295, bpp=8) at fbblt.c:944 #3 0x00007ffff4c32c53 in uxa_do_put_image (pDrawable=0x246aa410, pGC=0x2c0a4f0, depth=8, x=0, y=0, w=38, h=8, leftPad=0, format=2, bits=0x954d7c4 "") at uxa-accel.c:196 #4 uxa_do_shm_put_image (pDrawable=0x246aa410, pGC=0x2c0a4f0, depth=8, x=0, y=0, w=38, h=8, leftPad=0, format=2, bits=0x954d7c4 "") at uxa-accel.c:223 #5 uxa_put_image (pDrawable=0x246aa410, pGC=0x2c0a4f0, depth=8, x=0, y=0, w=38, h=8, leftPad=0, format=2, bits=0x954d7c4 "") at uxa-accel.c:289 #6 0x00000000004d574f in damagePutImage (pDrawable=0x246aa410, pGC=0x2c0a4f0, depth=8, x=0, y=0, w=38, h=8, leftPad=0, format=2, pImage=0x954d7c4 "") at damage.c:905 #7 0x00000000004287db in ProcPutImage (client=0x47ca72d0) at dispatch.c:2073 #8 0x000000000042bd94 in Dispatch () at dispatch.c:445 #9 0x000000000042513a in main (argc=4, argv=0x7fffffffe2a8, envp=) at main.c:285 Signed-off-by: Chris Wilson commit 6be26cae8379f973d9ca27e0d5371d16618e4f7b Author: Chris Wilson Date: Tue Dec 1 16:13:25 2009 +0000 i830: Simplify prepare_access / finish_access Reduce the 3 conditions into the 2 distinct cases. This has the secondary benefit of also distinguishing between the reported errors. Signed-off-by: Chris Wilson commit 637f003b047e426901cab6b1fe3a0924bcb9a38a Author: Chris Wilson Date: Tue Dec 1 13:20:20 2009 +0000 uxa: Don't treat prepare_access as a flush synchronisation point. The kernel will only emit a flush iff the buffer is currently owned by the GPU. Instead of presuming that the kernel must emit a flush, it is safer to assume that it does not and so cannot mapping the buffer on to the CPU as a synchronisation point. The most obvious counter-example is when we map the same buffer twice without using it in a batch. Signed-off-by: Chris Wilson commit cd5a9568ce0a541f030c27cdae529fe18e5f0437 Author: Carl Worth Date: Mon Nov 30 20:17:04 2009 -0800 Add i830_bios.h and i830_display.h to EXTRA_DIST. These files have been dropped from the generated tar file since the removal of UMS support. However, the bios_reader code still includes these, so "make distcheck" fails unless these are distributed. There's probably a cleaner fix possible, but this at least fixes the build so that the snapshot can be pushed out. commit 5bdac72a5c3f68ab6d9f7f2f1dfa6e5b78f04e57 Author: Carl Worth Date: Mon Nov 30 20:16:19 2009 -0800 NEWS: Note that the driver now has a hard dependency on KMS. Since the UMS code has all been removed. commit 813a910d7e4cc1c3deec0dcb1b536f8af337993a Author: Carl Worth Date: Mon Nov 30 19:48:05 2009 -0800 configure.ac: Bump version to 2.9.99.901. In preparation for a new snapshot. commit b62c72913a85895a60268a49eed1c136f63f160d Author: Carl Worth Date: Mon Nov 30 19:46:59 2009 -0800 NEWS: Add generic notes for the 2.9.99.901 snapshot. We plan to collect real release notes before the 2.10.0 release. commit 00aa4f7a45a318af5b651f9f3928e9da4443233a Author: Chris Wilson Date: Mon Nov 30 20:50:31 2009 +0000 uxa: Limit maximum size of tiled objects On older chipsets (i.e. pre-i965) tiling is very restrictive and imposes severe size and alignment constraints. Combine that with relatively small apertures and it is very easy to create a batch buffer that cannot be mapped into the aperture (but would otherwise fit based purely on total object size). To prevent this we need to not use tiling for large buffers (the very same buffers where tiling would be of most benefit!). Signed-off-by: Chris Wilson commit 8dd1c9eca02fb8da0c51f6fa4a38eb5e5ff41855 Author: Gaetan Nadon Date: Sun Nov 22 17:13:02 2009 -0500 video-intel: remove i2c_vid.h from src/Makefile.am make dist failed due to missing i2c_vid.h Commit b9b159c49854d8d9d2207946bb583537bb0d48d6 Remove UMS support. The above commit did not remove this header file from the makefile. Signed-off-by: Gaetan Nadon commit 6729b508c44bfca0b0dbef238a8732adbed6d4c9 Author: Chris Wilson Date: Mon Nov 30 16:52:10 2009 +0000 uxa: Initialise lists for private pixmap structure. When updating a buffer object for the framebuffer, we may need to allocate a fresh pixmap private structure, for example if the pixmap is replaced due to resize. When doing so it is then imperative to initialise the circularly linked lists correctly. Should fix the fault: #0 i830_set_pixmap_bo (pixmap=0x24ab380, bo=0x24ab780) at i830_uxa.c:524 #1 0x00007f8615c629fd in drmmode_xf86crtc_resize (scrn=0x247a320, width=1280, height=800) at drmmode_display.c:1345 #2 0x000000000051246c in xf86RandR12ScreenSetSize (pScreen=0x24824f0, width=, height=, mmWidth=, mmHeight=) at xf86RandR12.c:709 #3 0x0000000000512aa8 in xf86RandR12CreateScreenResources (pScreen=) at xf86RandR12.c:839 #4 0x0000000000514ec0 in xf86CrtcCreateScreenResources (screen=0x24824f0) at xf86Crtc.c:727 #5 0x0000000000424fb3 in main (argc=, argv=, envp=) at main.c:215 as reported by 'buscher'. Signed-off-by: Chris Wilson commit 85fe41126e83b35954dc2066eb103e0555e207a4 Author: Chris Wilson Date: Mon Nov 30 15:57:42 2009 +0000 uxa: Remove cache flush for copy As the copy uses the 2D blitter, it uses the render cache so the source should not require flushing if it has previously been used as a destination. Signed-off-by: Chris Wilson commit 2d434eed09936328a52cb942450a95aedc3eac63 Author: Kristian Høgsberg Date: Mon Nov 30 10:27:42 2009 -0500 Use new drmGetDeviceNameFromFd() for mapping to drm device name Should have been in libdrm to begin with. commit cfcabc45140d19bfbfa4737c0a11cdbb042d11eb Author: Chris Wilson Date: Mon Nov 30 13:58:30 2009 +0000 i915: Disable centre-point sampling. I still have no idea how this is triggering failures, but it is. So revert until the problem is solved. Should fix once again: Bug 23803 [bisected i915] gnome characters disappear http://bugs.freedesktop.org/show_bug.cgi?id=23803 Signed-off-by: Chris Wilson commit 8f8b6bd03d275379918777eaf7f63c0157b7ed9d Author: Chris Wilson Date: Mon Nov 30 14:03:40 2009 +0000 i915: Whitespace Signed-off-by: Chris Wilson commit 47916ea9d351f0ce6dc34713d6c164b0032f9830 Author: Chris Wilson Date: Mon Nov 30 13:58:06 2009 +0000 debug: Enable dumping of batchbuffer [compile-time only] Signed-off-by: Chris Wilson commit b118a52cd1a006321571967bd5f6c2a9e674de3a Author: Chris Wilson Date: Mon Nov 30 11:03:32 2009 +0000 i915: Remove routing of alpha channel to green. This modification is redundant since the routing is done in the blend unit anyway. Signed-off-by: Chris Wilson commit 5e04ded2bce4c135b57d391f5f4e24e030103e61 Author: Chris Wilson Date: Mon Nov 30 10:57:04 2009 +0000 i915: Fix missing texture offset for mask. In commit e581ceb, I modified the shader generation to accommodate mixed textures and solids but missed applying the new computed sampler for the mask. References: Bug 23803 [bisected i915] gnome characters disappear http://bugs.freedesktop.org/show_bug.cgi?id=23803 Bug 25031 rendering and color corruption since 14109abf http://bugs.freedesktop.org/show_bug.cgi?id=25031 Bug 25047 [945GM bisected] rendercheck/repeat/triangles regressed http://bugs.freedesktop.org/show_bug.cgi?id=25047 Signed-off-by: Chris Wilson commit a8ea20100de5be45699e71eb6ba67bef546ad0cd Author: Chris Wilson Date: Mon Nov 30 10:13:18 2009 +0000 debug: Don't always flush the batch when emitting a debugging flush I incorrectly changed the logic in 285f286 and caused the batch to always be flushed when debugging, instead of merely inserting a MI_FLUSH between operations. Signed-off-by: Chris Wilson commit c10850c63f9f88fbf08135bc4dcef1e5a2c71ee6 Author: Chris Wilson Date: Mon Nov 30 09:07:57 2009 +0000 overlay: Fix build after 646b4a9483 The compile cleanup was not without fault... Apparently I don't have XVMC enabled anymore and so missed that this variable is actually used. Signed-off-by: Chris Wilson commit 3f11bbec420080151406c203af292e55177e77d1 Author: Chris Wilson Date: Sun Nov 29 21:39:41 2009 +0000 uxa-glyphs: Enable TILING_X on glyph caches. Signed-off-by: Chris Wilson commit 19d8c0cf50e98909c533ebfce3a0dd3f72b755c1 Author: Chris Wilson Date: Sun Nov 29 21:16:49 2009 +0000 uxa: PutImage acceleration Avoid waiting on dirty buffer object by streaming the upload to a fresh, non-GPU hot buffer and blitting to the destination. This should help to redress the regression reported in bug 18075: [UXA] XPutImage performance regression https://bugs.freedesktop.org/show_bug.cgi?id=18075 Using the particular synthetic benchmark in question on a g45: Before: 9542.910448 Ops/s; put composition (!); 15x15 5623.271889 Ops/s; put composition (!); 75x75 1685.520362 Ops/s; put composition (!); 250x250 After: 40173.865300 Ops/s; put composition (!); 15x15 28670.280612 Ops/s; put composition (!); 75x75 4794.368601 Ops/s; put composition (!); 250x250 which while not stellar performance is at least an improvement. As anticipated this has little impact on the non-fallback RENDER paths, for instance the current cairo-xlib backend is unaffected by this change. Signed-off-by: Chris Wilson commit f7540f06090753cba1190aa9e8cdea05a9512077 Author: Chris Wilson Date: Sun Nov 29 21:12:07 2009 +0000 Only flush batch during prepare access if it may modify the pixmap. As we track when a pixmap is active inside a batch buffer, we can avoid unnecessary flushes of the batch when mapping a pixmap back to the CPU. Signed-off-by: Chris Wilson commit 9a2c18fb92659d57741bfdcacbe4f69aab361532 Author: Chris Wilson Date: Sun Nov 29 21:07:45 2009 +0000 batch: Emit a 'pipelined' flush when using a dirty source. Ensure that the render caches and texture caches are appropriately flushed when switching a pixmap from a target to a source. This should fix bug 24315, [855GM] Rendering corruption in text (usually) https://bugs.freedesktop.org/show_bug.cgi?id=24315 Signed-off-by: Chris Wilson commit 285f286597df5af13ac3f3d366f2fc9d0468dafa Author: Chris Wilson Date: Sun Nov 29 22:42:03 2009 +0000 batch: Track pixmap domains. In order to detect when we require cache flushes we need to track which domains the pixmap currently belongs to. So to do so we create a device private structure to hold the extra information and hook it up. Signed-off-by: Chris Wilson commit 2c3aee2b570dadd9270a08d8ff675d07ac405e33 Author: Chris Wilson Date: Sun Nov 29 20:53:35 2009 +0000 uxa-glyphs: Stream uploads via temporary bo Avoid mapping the glyph cache back to the cpu by allocating temporary buffer objects to store the glyph pixmap and blit to the cache. Signed-off-by: Chris Wilson commit 646b4a9483c01509a7324cc05eaadb72bc940c6d Author: Chris Wilson Date: Sun Nov 29 10:53:36 2009 +0000 Cleanup a few compiler warnings. Simple warnings for unused variables and C99-style declarations. Signed-off-by: Chris Wilson commit 917f9bb2435ba36bb99ef4d4f7b380d7f265e862 Author: Gaetan Nadon Date: Mon Nov 23 09:25:05 2009 -0500 Makefile.am: add ChangeLog and INSTALL on MAINTAINERCLEANFILES Now that the INSTALL file is generated. Allows running make maintainer-clean. commit eda2bb26783f7e9ef1ae659265930308378206e1 Author: Daniel Kahn Gillmor Date: Fri Nov 20 01:52:05 2009 +0100 Makefile.am: Add missing .g4i to be included in the tar file. Apparently Debian packages were having to manually add these files back in. Distribute them in the first place like we meant to. commit c5e86453c3ae3709933779a9dd609bbaebe21e8e Author: Gaetan Nadon Date: Wed Oct 28 14:41:41 2009 -0400 INSTALL, NEWS, README or AUTHORS files are missing/incorrect #24206 Automake 'foreign' option is specified in configure.ac. Remove from Makefile.am commit 12c4a22dd0b4de92a9c3d9e0baab029292f118f0 Author: Gaetan Nadon Date: Wed Oct 28 14:09:09 2009 -0400 INSTALL, NEWS, README or AUTHORS files are missing/incorrect #24206 Add missing INSTALL file. Use standard GNU file on building tarball README may have been updated Remove AUTHORS file as it is empty and no content available yet. Remove NEWS file as it is empty and no content available yet. commit ad4030932490f848c8ac21ba5a7a8d734994ed15 Author: Gaetan Nadon Date: Mon Oct 26 12:54:21 2009 -0400 Several driver modules do not have a ChangeLog target in Makefile.am #23814 The git generated ChangeLog replaces the hand written one. Update configure.ac to xorg-macros level 1.3. Use XORG_DEFAULT_OPTIONS which replaces four XORG_* macros Update Makefile.am to add ChangeLog target if missing Remove ChangeLog from EXTRA_DIST or *CLEAN variables This is a pre-req for the INSTALL_CMD commit bb994ce018ae6c3e3c5548ae7439cfc5e9aa4554 Author: Gaetan Nadon Date: Thu Oct 22 13:02:04 2009 -0400 .gitignore: use common defaults with custom section # 24239 Using common defaults will reduce errors and maintenance. Only the very small or inexistent custom section need periodic maintenance when the structure of the component changes. Do not edit defaults. commit 67bbda0bddae3e0d39bc8deb7378f467aedfd0e3 Author: Gaetan Nadon Date: Thu Oct 22 12:34:17 2009 -0400 .gitignore: use common defaults with custom section # 24239 Using common defaults will reduce errors and maintenance. Only the very small or inexistent custom section need periodic maintenance when the structure of the component changes. Do not edit defaults. commit c180baf43b8a0e407448018f3a7e42491cf974ae Author: Chris Wilson Date: Fri Nov 13 19:35:23 2009 +0000 i915: Derive the correct target color from the pixmap by checking its format Particularly noting to route alpha to the green channel when blending with a8 destinations. Fixes: rendercheck/repeat/triangles regressed http://bugs.freedesktop.org/show_bug.cgi?id=25047 introduced with commit 14109a. Signed-off-by: Chris Wilson commit e9064eacb0ad8867e320597453facbb3c376522c Author: Chris Wilson Date: Fri Nov 13 18:35:44 2009 +0000 uxa: Do not remove repeat from solids for 1x1 composites. Or else we hit the buggy 1x1 source path and trigger: rendercheck/mcoords regressed http://bugs.freedesktop.org/show_bug.cgi?id=25046 caused by the recent commit e581ceb. commit 14109abf285866ad4cd99d0cd16b0954a0a73a62 Author: Chris Wilson Date: Tue Nov 10 11:17:23 2009 +0000 i915: Fix texture sampling coordinates. RENDER specifies that texels should sampled from the pixel centre. This corrects a number of failures in the cairo test suite and a few off-by-one bug reports. Grey border around images https://bugs.freedesktop.org/show_bug.cgi?id=21523 Note that the earlier attempt to fix this was subverted by the buggy use of 1x1R textures for solid sources -- which caused the majority of text to disappear. Signed-off-by: Chris Wilson commit e581ceb7381e29ecc1a172597d258824f6a1d2d3 Author: Chris Wilson Date: Tue Nov 10 11:14:23 2009 +0000 i915: Use the color channels to pass along solid sources and masks. Instead of allocating and utilising the texture samplers for 1x1R solid sources and masks we can simply use the default diffuse and specular colour channels and adjust the fragment shader appropriately. The big advantage is the reduction in size of batches which should give a good boost to glyph performance, irrespective of the additional boost from using simpler shaders. However, the motivating factor behind the switch is that our use of 1x1 textures turns out to be buggy... Signed-off-by: Chris Wilson commit 33cabbfca6acb5149e26f87a538a7cb79f00cad2 Author: Chris Wilson Date: Tue Nov 10 11:09:52 2009 +0000 i915: Check for overflow before overflowing. As the immediate victim of the overflow would be to overwrite the maximum permissible value, the test was optimistic. Signed-off-by: Chris Wilson commit 67af5a99253b1295f8dc09b28863eb7dc8b59e1d Author: Chris Wilson Date: Tue Nov 10 11:05:20 2009 +0000 Check that batch buffers are atomic. Since batch buffers are rarely emitted by themselves but as part of a sequence of state and vertices, the whole sequence is emitted atomically. Here we just enforce that batches are marked as being part of an atomic sequence as appropriate. Signed-off-by: Chris Wilson commit 998d6b3d8c549086fbc8a9f0e309694b23398d8d Author: Chris Wilson Date: Tue Nov 10 11:00:43 2009 +0000 uxa: Force alpha bits to fill remaining bits In the case of x8r8g8b8 and similar where the alpha channel is ignored, but should be interpreted as being 1, then it is convenient if those bits are set appropriately in the colour. In order to do so for these formats, where PIXMAN_FORMAT_A() returns 0 we need to compute the alpha channel width as the remaining bits instead. Signed-off-by: Chris Wilson commit dbb68168dc909ab2ec1d935322c3fd8581e666f1 Author: Eric Anholt Date: Thu Nov 5 15:40:20 2009 -0800 Revert "configure: make --disable-dri work even if the server supports DRI" This reverts commit a851139c2141f6da370186148f2836e18b2acf83. It broke the build, and I don't see why we should be supporting this anyway. Conflicts: configure.ac src/Makefile.am commit 4c8e783d84d2c14c8a1638b6a12307c0164d3e31 Author: Eric Anholt Date: Wed Oct 21 13:30:38 2009 -0700 Fix "Remove flow-control macros for fallbacks in the 2D driver." I guess this is the sort of failure due to rebase-happiness that makes Linus yell at us for rebasing. commit d0e08fe611681fcc840d1b9ee8d49acdf50f7e58 Author: Daniel Vetter Date: Mon Oct 26 13:15:24 2009 +0000 Kill some more #defines only needed for User-Modesetting Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 8ff2a6496413e6b12fad9352f4bd9b6736bda56c Author: Eric Anholt Date: Wed Oct 21 13:30:38 2009 -0700 Remove flow-control macros for fallbacks in the 2D driver. It's poor style, and has confused new developers. commit c87585229b36790f883b9b8954ed061e00624df6 Author: Jesse Barnes Date: Thu Nov 5 13:33:55 2009 -0800 Increase stride limit for IGDNG It can go up to 32k. Upping this lets me use my 2560x1600 and 1920x1200 monitors in an extended desktop configuration. Signed-off-by: Jesse Barnes commit cbcfb711747e3637f20145aed00ac3d6256d0d1d Author: Rémi Cardona Date: Wed Oct 28 13:12:46 2009 +0100 configure: drop some more cruft DEBUGFLAGS wasn't used anywhere and the configure switch is useless. "CFLAGS=-g ./configure" does the same thing and actually works. PKG_CHECK_MODULES already calls AC_SUBST, no need to do it twice. Signed-off-by: Rémi Cardona Acked-by: Chris Wilson commit 3c0a43b24cc7540cc139beca0ec2e4c202ff5593 Author: Rémi Cardona Date: Wed Oct 28 13:01:32 2009 +0100 configure: use CWARNFLAGS from xorg-macros.m4 Signed-off-by: Rémi Cardona Acked-by: Chris Wilson commit a851139c2141f6da370186148f2836e18b2acf83 Author: Rémi Cardona Date: Wed Oct 28 12:37:38 2009 +0100 configure: make --disable-dri work even if the server supports DRI XF86DRI is defined by the SDK so not defining it here just breaks the build. Define HAVE_DRI instead to avoid collisions. Note: DRI2 is still enabled/disabled entirely by SDK defines. Signed-off-by: Rémi Cardona Acked-by: Chris Wilson commit 07e0b2cff6107d6c86096c7da4e31b0c976794d5 Author: Rémi Cardona Date: Wed Oct 28 11:45:55 2009 +0100 configure: group system header checks at the top Signed-off-by: Rémi Cardona Acked-by: Chris Wilson commit 0401a4c3143c5b94875cb4c66c94a0d247c32da5 Author: Rémi Cardona Date: Wed Oct 28 11:42:41 2009 +0100 configure: check for libdrm and libpciaccess earlier Signed-off-by: Rémi Cardona Acked-by: Chris Wilson commit 10946118dd3a63f1375a1bfde0b2f0542a93c1c2 Author: Albert Damen Date: Sun Oct 25 18:02:07 2009 +0100 Fix crash in uxa_acquire_pattern when pDst is NULL This avoids a crash when an XRenderComposite call is made with a -1 value for width/height, (which apparently compiz's gtk-window- decorator likes to do). Fixes bug: X crashes in uxa_acquire_pattern when logging in (gdm) http://bugs.freedesktop.org/show_bug.cgi?id=24724 Signed-off-by: Albert Damen Reviewed-by: Carl Worth commit 751e0a3e4576bbf4bffa56bbd6d4de28f10db98e Author: Thomas Arnhold Date: Mon Oct 19 11:35:30 2009 -0700 Fix 64-bit compiler warnings in intel_xvmc_dump_render(). Bug #24396. commit 3e8f2eae3a586aa29be4858698e666e0ec778cea Author: Eric Anholt Date: Thu Oct 15 13:48:56 2009 -0700 XVMC: Use XCB DRI2 instead of cargo-culting our own copy of Xlib stuff. (v2) v2: Incorporate comments from Jamey on device name handling and extension detection. commit 38ab403d7a1c461c8ac65a056bee2dd5c7f2f58e Author: Eric Anholt Date: Thu Oct 15 11:39:32 2009 -0700 Enable XVMC by default on gen4. commit f171069608bf174d920921fa102b8619794ed272 Author: Zhenyu Wang Date: Mon Sep 28 18:35:57 2009 +0800 i965 XvMC cleanup Remove bo pin for surface buffer access, and remove access attempt for possible unmapped framebuffer. Using xv buffer pointer to pass current xvmc surface bo handler, which is assigned to src image bo and handle that the same way as in Xv. Signed-off-by: Zhenyu Wang [anholt: Fixed up for conflict against the XV rework. Not tested, because both mplayer and xine segfault with XVMC currently.] Signed-off-by: Eric Anholt commit aaedeffe00d9414bb03723dbc30b4938a07ce5fa Author: Daniel Vetter Date: Wed Oct 14 18:09:08 2009 +0200 Xv overlay: fix planar YUV copy for right rotated crtcs While copying and rotating the buffer, array access was out of bounds when rotated to the right (RR_Rotate_270). My buffer handling changes probably made this bug much more likely to actually result in a SIGSEGV. I've checked the logs and the bug exists since rotation has been supported, i.e. this looks like a candidate for cherry-picking for all supported releases. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 703e3326bb41528cc57c0d25003707df209fc714 Author: Daniel Vetter Date: Wed Oct 14 15:56:55 2009 +0200 Xv overlay: further cleanups Kill some unnecessary stuff. Small code changes, but no functional ones. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 1c2aedfce9e6a7561347e873d125b6889dee7941 Author: Daniel Vetter Date: Wed Oct 14 15:56:54 2009 +0200 Xv: fixup the disabled drmmode overlay code This code didn't survive the global renaming of vars to saner names. Fix it up. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 909990f40a437cbd7026a10e32af1ea120f4c2a7 Author: Daniel Vetter Date: Wed Oct 14 15:56:53 2009 +0200 Xv overlay: remove some more dead stuff from ums overlay support Mostly unused definitions and variables, but also some strange ums debug code. Also kill some now obsolete comments. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 86bc23ab5da34137c82250395c68aa92ecd88a24 Author: Chris Wilson Date: Wed Oct 14 12:04:40 2009 +0100 debug: Enable cache flushing after every operation If DEBUG_FLUSH_CACHES is enabled then emit a MI_FLUSH after every rendering operation. This is intended to 'fix' cases where we are missing a required flush in the middle of a sequence of operations, such as switching between 2D to 3D and render to sampler. Signed-off-by: Chris Wilson commit 3c0815abf28744e215bea286e71d935cd486955a Author: Chris Wilson Date: Wed Oct 14 11:29:21 2009 +0100 conf: Add debugging flush options Make the following options available via xorg.conf: Section "Driver" Option "DebugFlushBatches" "1" # Flush the batch buffer after every # single operation; Option "DebugFlushCaches" "1" # Include a MI_FLUSH at the end of every # batch buffer to force data to be # flushed out of cache and into memory # before the completion of the batch. Option "DebugWait" "1" # Wait for the completion of every batch buffer # before continuing, i.e. perform synchronous # rendering. EndSection Signed-off-by: Chris Wilson commit 2f134b84445d2d0bfe3d81276bc7f6648df062ee Author: Zhao Yakui Date: Wed Sep 30 07:31:57 2009 +0000 Return failure when the enum-type output property values are not found Failure to do so causes xrandr to report incorrect property values. Signed-off-by: Zhao Yakui Signed-off-by: Eric Anholt commit fcc2ee48b866b81c79315ff10189b56fc201539d Author: Albert Damen Date: Wed Oct 7 21:55:42 2009 +0200 Drop frontbuffer from crtc in I830CloseScreen By dropping the frontbuffer from the crtc, the new frontbuffer can be properly added to the crtc when the xserver is reset. Signed-off-by: Albert Damen commit 8a77877f9c2c6a8a1308bc1a3be9e7ad88bc7f49 Author: Dave Airlie Date: Fri Oct 9 14:16:06 2009 +1000 drmmode: with 1.7 server, set mode major doesn't get gamma setup. Noticed this on Fedora, where 1.7 server does gamma via the randr codepaths however kms doesn't have this call which happens in the non set_mode_major path. probably should be backported to released drivers. Signed-off-by: Dave Airlie commit d8c7678ddadce89ca7fc0edd1b4d9ed3d959e687 Author: Jesse Barnes Date: Mon Oct 12 14:02:12 2009 -0700 DRI2 compat build fix: it's drawable->pScreen not drawable->screen Fallout from the conversion; DRI2 compat path was broken. Signed-off-by: Jesse Barnes commit b37ac9d317ae537d993922976f87072040b04d04 Author: Chris Wilson Date: Mon Oct 12 14:31:06 2009 +0100 uxa: Refactor create Picture for pixman format Pull the common methods for creating a Picture given a pixman format into its own method, and tidy the surrounding code. The benefit is that we can now composite directly to the Picture and so save an intermediate copy when creating patterns for gradients. Signed-off-by: Chris Wilson commit 7e8f32d0a7279dce1976f87612833d9092554cfe Author: Chris Wilson Date: Mon Oct 12 14:33:08 2009 +0100 uxa: Free the ScratchPixmapHeader after its associated Picture Fixes: http://bugs.freedesktop.org/show_bug.cgi?id=24459 Intel Driver > 2.8: Cairo rendering bug, triggered in QtCurve GTK engine Signed-off-by: Chris Wilson commit 1556c62e0336ea2fef866722ee44d2d188e318f3 Author: Eric Anholt Date: Thu Oct 8 17:34:13 2009 -0700 Replace dolt and shave with relying on current autotools. commit 8b2d2ff0d026eea445a071102a62d782f3bbec78 Author: Eric Anholt Date: Wed Oct 7 16:12:25 2009 -0700 Clean up more i830_memory.c madness. It was cooking up insane alignment values for buffers that new libdrm was justifiably complaining about, but it turns out we don't need the alignment values anywhere because the only case they're needed, they're computed entirely by the kernel. Also, the XVMC code was passing a completely unused flag in. commit d525a0e993a59e118ab1e8519b3d73465f8f0169 Author: Eric Anholt Date: Tue Oct 6 19:05:24 2009 -0700 Rename pScreen to screen. commit b6262dcd2754f7e87f27979dcad145133ee3b945 Author: Eric Anholt Date: Tue Oct 6 19:00:41 2009 -0700 Rename pGC to gc. commit fdcfeb822d15cbfe6fccceab002b75458dca3264 Author: Eric Anholt Date: Tue Oct 6 18:57:22 2009 -0700 Rename pDraw to plain old drawable. commit 7bbf4ac7137ed0e4ec0a75806a396c12f102e779 Author: Eric Anholt Date: Tue Oct 6 18:50:54 2009 -0700 Rename the xv pPriv to adaptor_priv to reflect whose private it is. commit f309d475241260cf60567100511d5f7c6c487a29 Author: Eric Anholt Date: Tue Oct 6 18:38:53 2009 -0700 Call pPixmaps plain old pixmaps. commit da0f6616ad63f1581cf91a98104e5287aa44e7ce Author: Eric Anholt Date: Tue Oct 6 18:37:05 2009 -0700 de-pCamelHungarian the Render pictures and pixmaps. commit 050a141b7bc94b459061615124b7686a9c331e01 Author: Eric Anholt Date: Tue Oct 6 18:30:57 2009 -0700 Share several render fields between render implementations. Also, start settling on the cairo naming for things: source, mask, and dest. commit af27a3a0a5645c6f41f583611bd0f2559dc7cb2f Author: Eric Anholt Date: Tue Oct 6 18:24:50 2009 -0700 Rename the xf86 screen private from pScrn to scrn. commit cc5d3ba3c331c3b1becf2d19277b24144bf34cfa Author: Eric Anholt Date: Tue Oct 6 18:02:38 2009 -0700 Rename the screen private from I830Ptr pI830 to intel_screen_private *intel. This is the beginning of the campaign to remove some of the absurd use of Hungarian in the driver. Not that I don't like Hungarian, but I don't need to know that pI830 is a pPointer. commit 03e8e64f8669263e3cecb79ea57d5a26c0eaee3f Author: Chris Wilson Date: Wed Oct 7 22:15:37 2009 +0100 Complete the removal of UMS build support Eric missed removing the now dead references to the deleted subdirectories in configure.ac with commit b9b159c Signed-off-by: Chris Wilson commit 5e44a0fa4209523bee56f513a2029869f96a710a Author: Eric Anholt Date: Tue Oct 6 18:08:51 2009 -0700 Remove more dead UMS code. commit 6a716a25abc84f1c7f766fd3bfa1c2aac91e6ae7 Author: Eric Anholt Date: Tue Oct 6 17:58:32 2009 -0700 Remove the reg_dumper code, now that it's been moved to intel_gpu_tools. commit e9aff787a55d684e3b9c6d5ea8ac2926be952280 Author: Eric Anholt Date: Tue Oct 6 17:53:59 2009 -0700 Remove the stepping debug app, replaced by version in intel_gpu_tools. commit 71b9cdaa86bb9d3deb44f32f47771c33898253c2 Author: Eric Anholt Date: Tue Oct 6 17:53:21 2009 -0700 Trim down the hotplug debug app. commit e95eb483e210def0814bc61fc36d672145da7dff Author: Eric Anholt Date: Tue Oct 6 17:51:09 2009 -0700 Remove intel_idle, replaced by intel_gpu_top in intel_gpu_tools. commit 8ae0e44e42db645abe6d385f561260d2ae4a1960 Author: Eric Anholt Date: Tue Oct 6 16:30:08 2009 -0700 Move to kernel coding style. We've talked about doing this since the start of the project, putting it off until "some convenient time". Just after removing a third of the driver seems like a convenient time, when backporting's probably not happening much anyway. commit b9b159c49854d8d9d2207946bb583537bb0d48d6 Author: Eric Anholt Date: Wed Sep 30 16:29:53 2009 -0700 Remove UMS support. At this point, the only remaining feature regressions should be the lack of overlay support (about to land), and the need to update the XVMC code to work in the presence of KMS. Acked-by: Keith Packard (in principle) Acked-by: Carl Worth (in principle) commit d26f4c493721dbb2e2cbf4efcf8d37228d1b1f3b Author: Eric Anholt Date: Mon Oct 5 13:31:31 2009 -0700 Remove UMS overlay support. The replacement code is now landed, and the rest of UMS is about to disappear. commit 33c488e83676d26e69145ea615f75ca52768f400 Author: Eric Anholt Date: Mon Oct 5 10:38:05 2009 -0700 Remove error state dumping code. This is replaced by intel_gpu_dump, and would no longer be used once UMS is gone. commit 2370af32fe31bed8e5715639023635bdb3b83b1b Author: Daniel Vetter Date: Tue Aug 11 16:06:47 2009 +0200 Implement drmmode overlay This does not restore the overlay on EnterVT/disable it on LeaveVT. Does not look like this is necessary. Signed-off-by: Daniel Vetter [anholt: Hacked in avoiding the actual kernel calls with Signed-off-by: Eric Anholt commit 99230864050ea2f26c2412c4c87c50947fc3cbe1 Author: Daniel Vetter Date: Tue Aug 11 16:06:46 2009 +0200 Xv: introduce an overlay hal This is the last preparatory step for overlay support with drmmode. Safe two (specially marked) function calls in the setup code, all hw accessing code goes now through these three new functions with the ums_overlay prefix. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit bb04e184fdc55325a362ebf291e16a7c112a5f1d Author: Daniel Vetter Date: Tue Aug 11 16:06:45 2009 +0200 Xv: rework overlay buffer management The basic idea is to only pin the buffer into the gtt when the overlay hw is actually using it. This results in a few changes: - Unify data copied/buffer handling with textured video. Now offsets are always buffer relative and we just use drm_bo_map to access a buffer. - Implement double buffering using two bo's. This is necessary because we can't pin the same buffer to the gtt and map it as normal memory. - Kill XV_DOUBLE_BUFFER. With the above changes, overlay video is always doubel buffered. There is still the XvMC passthrough case, which makes the code slightly ugly. Unfortunately we can't get at the bo behind this buffer. Changes since the last review-round: - Don't overallocate by a factor of 2. - Prevent possible use-after-free issue. Signed-off-by: Eric Anholt commit 60462eb5b5c1931beecc1ed2d32f91090f64174c Author: Daniel Vetter Date: Tue Aug 11 16:06:44 2009 +0200 Xv: create xvmc_passthrough helper This way all thes strange special cases make much more sense. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 71276dff9415322f75792a46c1a1cc0b900588b9 Author: Daniel Vetter Date: Tue Aug 11 16:06:43 2009 +0200 Xv: scrap overlay offscreen pixmap support The code looks like it's been bitrotting since being copied over from the i810 driver. Furthermore painting rgb pixmaps with the overlay engine is in these days of modern compositing X an absolute no-go. And textured video doesn't support it neither, so its likely never ever used by applications. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 99afdf985fa9f763fda4bc49ccd8111960a4ae0f Author: Daniel Vetter Date: Tue Aug 11 16:06:42 2009 +0200 Xv: small cleanups in I830PutImage - scrap unused variable overlay - scrap an superflous if and attach the code to the preceeding else - tiny layout fix. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit d598456f1fe013c250530730c57ad720d38cde3a Author: Daniel Vetter Date: Tue Aug 11 16:06:41 2009 +0200 Xv I830PutImage splitup: extract i830_wait_for scanline Also scrap the unecessary variable sync in I830PutImage and the accompanying obfuscated logic. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 2ba03fa78197d1cb10d6401ad02cfe9edd2623b3 Author: Daniel Vetter Date: Tue Aug 11 16:06:40 2009 +0200 Xv I830PutImage splitup: extract i830_copy_video_data Just moves the code and passes back allocation failures. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 81fc74cc4ce81b9be8b9ba3bcacf1284c47ce80c Author: Daniel Vetter Date: Tue Aug 11 16:06:39 2009 +0200 Xv I830PutImage splitup: extract i830_setup_video_buffer Just move the code and pass back allocation failures. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 0bf4cc5130482ee0f3924f34e37fa5fc988119b3 Author: Daniel Vetter Date: Tue Aug 11 16:06:38 2009 +0200 Xv I830PutImage splitup: extract i830_dst_pitch_and_size Just moves the code. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit c20ef591931b5efc5745d00c06f296c89cf32745 Author: Daniel Vetter Date: Tue Aug 11 16:06:37 2009 +0200 Xv: kill destId in I830PutImage It's only used to remember that XvMC has ỲV12 as output. is_planar_fourcc already takes care of that in all necessary cases. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 5ce944994d57176d0ddf6f6d7c7779fdfcf39cb8 Author: Daniel Vetter Date: Tue Aug 11 16:06:36 2009 +0200 Xv: kill hw double buffering logic The idea for the hw double buffering support is to program two fixed buffers and then only switch buffers in the OCMD register. But the driver as-is always programs the new buffer address (in both register sets when double buffered). Therefore we gain nothing by using this hw capability. Scrap the software support for it. When double buffered, we now allocate just a buffer of size 2*size and switch between the two parts purely in software. To make reviewing this easier, I'll shortly explain the differences of how double-buffering (i.e. tear-free video) is achieved before and after this change: - When double buffer, allocate a buffer twice the size (unchanged). - Depending upon the currently shown buffer-half, copy the new frame into the other buffer-half. In the old code this is done by using the right set of buffer offsets, either *Buf0Offset or *Buf1Offset. The new code simply programs the offset for the right buffer-half into the single set of offsets. The end-result is unchanged. Now the big difference in hw-programming: Old: Programm new buffer offset into both sets of _hw_ buffer offset registers. Depending upon the current _sw_ buffer, select the _hw_ buffer and program this into the OCMD register. This just complicates matters unnecessarly. New: Just always use the hw buffer 0. And then it's again the same story in both old and new code: - Execute an overlay flip (MI_OVERLAY_FLIP) to read in the contents of the hw registers into the shadow hw registers (which are actually being used by the overlay, not the ones we write stuff into). This is synchronized with the respective crtc vblank by the hw. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 232418d72ee967a81e39481b9f2ee379cb685458 Author: Daniel Vetter Date: Tue Aug 11 16:06:35 2009 +0200 Xv: use is_planar_fourcc helper some more Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 219b14310efe49aff5d3d9023d2ba440c9f702c1 Author: Daniel Vetter Date: Tue Aug 11 16:06:34 2009 +0200 Xv: introduce planar memcpy helper Reduced 3 copies of the same code to one. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit b90171f16652d1145fb80a63919f76a804a94cef Author: Daniel Vetter Date: Tue Aug 11 16:06:33 2009 +0200 Xv: rename i830_display_video to i830_display_overlay This function only programs the overlay and is never called for textured video. Make this obvious. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 857e40a6e00db72401717da3ed79edbf65db31d4 Author: Daniel Vetter Date: Tue Aug 11 16:06:32 2009 +0200 Xv i830_display_video splitup: extract i830_overlay_cmd This slightly moves around (and simplifies) the OSTRIDE reg programming, too. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 50d70e644ea0574752d0fe160ce8d873653c913b Author: Daniel Vetter Date: Tue Aug 11 16:06:31 2009 +0200 Xv i830_display_video splitup: extract i830_calc_src_regs Also introduce an is_planar_fourcc helper. I'll use that one later. In i830_display_video this changeset moves the XVMC case (previously obscured as the default case) around. I've figured this default case does not make sense, here's why: XvMC is everywhere else handled as a planar format (e.g. in the register programming a few lines down). Furthermore the id variable gets mapped to FOURCC_YV12 if IS_I915(pI830) is true in I830PutImage. There's a second caller in the offscreen overlay support code. But I think that code is bitrotten and not reliable as an information source. So we have a different behaviour only for id=FOURCC_XVMC and i965 class hw (i830 class doesn't have xvmc). I've crawled through various sources/intel documentations. Finally in the textured video implemention for i965 class hw (src/i965_video.c) I've found a switch statement that puts XVMC into the same case as I420 and YV12. So also in i965 class hw xvmc uses a planar format. In conclusion I claim that this code was bogus and XvMC on i965 class hw over Xv overlay was most likely broken. Signed-off-by: Daniel Vetter Signed-off-by: Eric Anholt commit 2841a4cd8c6c64fdf4b2203ab73b57b38a50f651 Author: Carl Worth Date: Mon Sep 28 20:03:11 2009 -0700 Increment version to 2.9.0 And add a reminder to RELEASING that the incremented version number needs to be committed, (since I forgot to do this with 2.8.99.902). commit a790aff4fef7d0c86b7b9c0da4afdc9c0aba6636 Author: Carl Worth Date: Mon Sep 28 20:02:28 2009 -0700 NEWS: Add notes for the 2.9.0 release. Just renamed notes as from 2.8.99.902. commit a92bbcc94904684e7709b3ddaad82bc04607af26 Author: Carl Worth Date: Tue Sep 22 17:08:23 2009 -0700 Increment version to 2.8.99.902 commit ae00a0923717caec6d0dad94527da26397bd12ce Author: Carl Worth Date: Tue Sep 22 15:14:38 2009 -0700 NEWS: Add notes for 2.8.99.902 commit 7e7db7ac530b5282b0841585959597b54fcc633b Author: Matthias Hopf Date: Mon Aug 17 19:24:03 2009 +0200 Add new backlight driver "samsung". commit 7ae1d0dde6cef3437b67dbc21384cb179616a6c0 Author: Zhao Yakui Date: Mon Aug 31 13:51:01 2009 +0800 Skip setting tv format property if output crtc is NULL When TV is not connected and X start, after plugging TV cable again, system will crash because output crtc is NULL. This patch will return, do not handle crtc immediately, meanwhile set value will be effective until user really enable output by xrandr command. Signed-off-by: Ma Ling Signed-off-by: Zhao Yakui commit 02fe9be695f7e209944bd0f7b67950f93619feee Author: Zhao Yakui Date: Tue Sep 22 10:58:38 2009 +0800 Check whether the DVI-I/D is connected or disconnected based on EDID When the monitor is digital type for SDVO-DVI D, there should exist the EDID. If there is no EDID, it should be detected as disconnected. Signe-off-by: Zhao Yakui commit 762e406d138ac80854b6a23b1078b52f6581f0d8 Author: Chris Wilson Date: Tue Sep 22 01:34:37 2009 +0100 Revert "8xx: Fallback for any non-affine transformation." This reverts commit 505025053d66d415e1c23ac858b9238fa8541d37. In theory, the non-affine paths work -- at least for the stated test case, so re-enable them and avoid the slow work-around. Signed-off-by: Chris Wilson commit 2cc1f3cb6034dddd65b3781b0cde7dff4ac1e803 Author: Keith Packard Date: Sat Sep 19 17:30:57 2009 -0700 i8xx: Format projective texture coordinates correctly. Projective texture coordinates must be delivered as TEXCOORDFMT_3D using TEXCOORDTYPE_HOMOGENOUS. This meant selecting the correct type in i830_texture_setup, the correct format in i830_emit_composite_state and sending only 3 coordinates in i830_emit_composite_primitive. Signed-off-by: Keith Packard [ickle: tweaked to fix up a couple of use-before-initialised] Signed-off-by: Chris Wilson commit 00e8de212b46a243f243b437b7eb866315ab89b3 Author: Chris Wilson Date: Mon Sep 21 22:14:21 2009 +0100 Check the correct Picture for error during creation. commit bd817e2d733dfdb1140874b06595ccd1ef39159b Author: Keith Packard Date: Mon Sep 21 17:21:17 2009 -0700 Split i915/i830 composite_emit_primitive into two functions. The i915 and i830 take similar but different data when emitting the primitives, instead of trying to share code here, just split this apart and avoid potentially breaking things later on. Signed-off-by: Keith Packard commit 5e80297d088e8cdbf66d765f7d252dab66c8df86 Author: Keith Packard Date: Fri Sep 18 21:05:23 2009 -0700 Remove DGA support from the driver. The xf86DiDGA code required that the scanout buffer always be mappable, stay be at a fixed address in the aperture and have a constant size. With frame buffer resizing, the latter two are no longer true, and with KMS, we'd really prefer to not allow the former. The only option available to the driver is to completely disable DGA as the modes code has internal calls to the xf86DiDGA code when fetching new modes from the hardware. A fix for the DiDGA code will be added to the X server which will automatically initialize DGA for mode switching and input, but not frame buffer access, and not require any driver cooperation. Thus, the correct solution is for the driver to not call xf86DiDGAInit at all. For old servers, this eliminates a potential catastrophic problem where random memory is written by the X server. New servers will get the DIX-based behaviour automatically. Signed-off-by: Keith Packard commit 4758311842a16600287c8f9f77ce0af1a31b9264 Author: Keith Packard Date: Fri Sep 18 20:59:52 2009 -0700 Remove vestigial internal rotation which broke KMS DGA/VidMode modesetting. Pre-2.0, the driver supported rotation internally, rather than relying on the X server rotation support. The last piece of this dealt with rotating the mouse coordinates and also tried to preserve rotation across DGA/VidModeExtension modesetting requests. That latter bit of code broke under KMS as the rotation value was never initialized, and when set to zero would create an invalid configuration. This would confuse xrandr which would bail before making any changes, leaving the user without a way to recover. Signed-off-by: Keith Packard commit 505025053d66d415e1c23ac858b9238fa8541d37 Author: Carl Worth Date: Mon Sep 21 13:50:09 2009 -0700 8xx: Fallback for any non-affine transformation. There are definitely bugs in the 8xx code dealing with non-affine transformations. Disable that code for now to get things working. Fixes bug #22947 ([855GM, xf86-video-intel-2.8.0] "Freeze" when RENDER extension is being used) commit b4d29452b929a3ef224d3625e4bc66b787c5edb7 Author: Zhenyu Wang Date: Mon Sep 21 15:28:09 2009 +0800 More dumps for Arrandale LVDS Signed-off-by: Zhenyu Wang commit 57fc09cef28bad2e3e8455b93ef2927118f8a3a3 Author: Chris Wilson Date: Sun Sep 20 01:02:39 2009 +0100 Avoid fallbacks for a1 src/mask Carl Worth did the hard work in identifying that the regression in cairo between X.org 1.6 and 1.7 was caused by cairo sending an a1 mask to the server in 1.7 whereas in 1.6 cairo used local fallbacks (as the source was using RepeatPad, which triggers cairo's 'buggy_pad_reflect' fallback for X.org 1.6). This was causing the driver to do a fallback to handle the a1 mask instead, which due to the GPU pipeline stall is much more expensive than the equivalent fallback in cairo. Reference: cairo's performance downgrades 4X with server master than server-1.6. https://bugs.freedesktop.org/show_bug.cgi?id=23184 The fix is a relatively simple extension of the current uxa_picture_from_pixman_image() to use CompositePicture() instead of CopyArea() when we need to convert to a new format. Signed-off-by: Chris Wilson commit 33f98e4056706f4c30bb4327677ac49e82058231 Author: Keith Packard Date: Thu Sep 17 18:16:02 2009 -0700 Don't destroy bufmgr at CloseScreen time Under KMS, the bufmgr is not initialized at InitOutput time and so it won't be re-initialized during server regen. Thus we must leave the bufmgr running during regen and cannot destroy it in CloseScreen. Under UMS, each place the bufmgr is initialized, it checks to see if it has already happened. Hence, we can safely leave the bufmgr running across server regen for UMS too. Signed-off-by: Keith Packard commit ee9ad853574e3ee1a210db6207b84ecd466e08ee Author: Keith Packard Date: Thu Sep 17 17:57:40 2009 -0700 Make sure DRM output properties are freed after we're done with them. drmmode_output_get_modes was fetching output properties but only freeing some of them. Signed-off-by: Keith Packard commit b8c5c996e888485c3a16d645c8490592534a7882 Author: Jesse Barnes Date: Tue Sep 15 19:45:47 2009 -0700 Eliminate cursor flicker We can update the cursor without hiding and showing it. In fact, doing the hide/show causes noticable flicker when running in KMS mode. Signed-off-by: Jesse Barnes commit c2abfa8e54acab61250dba1e435760e3b1499c8c Author: Chris Wilson Date: Fri Sep 4 17:10:25 2009 +0100 Avoid fallbacks for compositing gradient patterns Currently when asked to composite using a gradient source or mask, we fallback to using fbComposite(). This has the side-effect of causing a readback on the destination surface, stalling the GPU pipeline. Instead, like uxa_trapezoids(), we can use pixman to fill a scratch pixmap and then copy that to an offscreen pixmap for use with uxa_composite(). Speedups on i915: firefox-talos-svg: 710378.14 -> 549262.96: 1.29x speedup No slowdowns. Thanks to Søeren Sandmann Pedersen for spotting the missing ValidatePicture(). Signed-off-by: Chris Wilson commit efbcf29dd1a1ca058b7a2a93f0685102c06c9369 Author: Carl Worth Date: Wed Sep 9 09:32:48 2009 -0700 Update version to 2.8.99.901 for snapshot. commit 54fa27fcd97a6735d8eb6073f5ec7d0d40a7327f Author: Carl Worth Date: Wed Sep 9 09:27:01 2009 -0700 NEWS: Add notes for the 2.8.99.901 snapshot commit 1a77ca74bc829e019a06fe9ad559f013054c27ff Author: Chris Wilson Date: Wed Sep 9 12:09:05 2009 +0100 i915: Restore nearest sampling My recent commit [94fc93] to use the pixel centre for sampling with the i830 broke the i915. This restores the previous sampling coordinates for the i915 whilst preserving the correct coordinates for i830. Fixes: gnome characters disappear http://bugs.freedesktop.org/show_bug.cgi?id=23803 Signed-off-by: Chris Wilson commit ce10b5b6fca086eb4af45c1db28352e06ee4ce0b Author: Zhenyu Wang Date: Tue Sep 8 00:56:34 2009 +0800 Add B43 chipset support Signed-off-by: Zhenyu Wang commit 94fc93d4e2b88565dca17f72903d8991213c9ee8 Author: Chris Wilson Date: Sat Sep 5 09:35:10 2009 +0100 i830/i915: Set the sample position to the pixel center. And in particular we apply the nearest sample bias separately for src/mask. Fixes cairo/test: device-offset-scale finer-grained-fallbacks mask-transformed-{similar,image} meta-surface-pattern pixman-rotate surface-pattern-big-scale-down text-transform Signed-off-by: Chris Wilson commit ced0cc8bb28106c18473777bb184872786325e99 Author: Chris Wilson Date: Sat Sep 5 09:05:36 2009 +0100 i830: Update comments i830_composite() is no longer shared with i915 but i830_emit_composite_primitive() is. Signed-off-by: Chris Wilson commit 8863706e25a73f68993d946e2f1c1040bae0f9c5 Author: Chris Wilson Date: Sat Sep 5 09:03:56 2009 +0100 i830: Trim composite setup Remove a couple of redundant NOOPs from the setup and correct the required space checking for atomic batch operation. commit a9b12111f9787950ad6b8f295a70a872c5933c93 Author: Chris Wilson Date: Sat Sep 5 00:57:39 2009 +0100 i830: remove padding NOOPs from composite Bumps aa10text up from 249k to 260k! These NOOPs have existed uncommented since 04d1584737fd0d14e99608a97281fd7b1549ae0e. Signed-off-by: Chris Wilson commit 9c1bf6d01ca307b7a9b91e181ad7f341862e5e1c Author: Chris Wilson Date: Fri Sep 4 23:31:44 2009 +0100 i830: do not use stale mask transform Not only were incorrectly falling back if we had non-affine transformations, but we made the decision based on a stale transformation matrix. Related bug 22877: batch_start_atomic horribly breaks performance after a while https://bugs.freedesktop.org/show_bug.cgi?id=22877 Signed-off-by: Chris Wilson Tested-by: Maximilian Grothusmann commit e903b3ebad29d943c05ff550940034c3a43e0235 Author: Matthias Hopf Date: Thu Sep 3 16:34:08 2009 +0200 Don't set backlight level if going on->on. Otherwise changed backlight will be reset upon DPMS switch off, because first this function is called with DPMSModeOn. commit 91f26937c1a3a4f33da86aa6b62ab9b288a54e15 Author: Matthias Hopf Date: Tue Aug 18 18:44:38 2009 +0200 Use "Backlight" as backlight brightness property. BACKLIGHT is now deprecated, though still usable. commit dbc8944ee9e6755ab11dfc7375c3394f531a49ce Author: Matthias Hopf Date: Tue Aug 18 18:34:45 2009 +0200 Add get_property support. So far only BACKLIGHT is changed. commit c18fc7955dc2aec878dd3bea1d51aaecf3f08858 Author: Matthias Hopf Date: Tue Aug 18 18:05:45 2009 +0200 Don't ignore backlight level change to the same level. If set externally to a different level, this would result in a no-op. OTOH if the display is switched off (DPMS) you do not want the change to take place immediately, but rather to be saved and set later when the display is active again. commit fe7693c94a396b9d17bb66a000178750a432ce3a Author: Zhenyu Wang Date: Wed Sep 2 22:57:33 2009 +0800 Make DGA optional As DGA is optional in xserver, we should check this too instead of always trying to init DGA. Found when update xserver to 6fffcd5825454a7fe58ffbcfb219f007cf38e731, but not update xf86dgaproto, which caused X fails to start. Signed-off-by: Zhenyu Wang commit 5812531e08147576de776b2dd64e7f94c08eb851 Author: Carl Worth Date: Fri Jul 31 11:20:23 2009 -0700 debug: i830_valid_command: Return invalid for subopcodes with no name Previously the code would always return the count, before ever looking into the _3d_cmds table to see if there was actually a valid command. Thanks to Alan Coopersmith who reported that the code was confusing parfait: https://bugs.freedesktop.org/show_bug.cgi?id=21666 commit 7c48c21b22bf5862c5a35bda1635753cc5a7197c Author: Zou Nan hai Date: Thu Aug 27 09:47:12 2009 +0800 set correct value for indirect access check bound commit 6361c3b9af39265df9222b1f3b6fb9c4197087c1 Author: Keith Packard Date: Tue Aug 25 19:23:27 2009 -0700 Fix SHM functions to work with server after 1.6.0 Signed-off-by: Keith Packard commit 2786a66719a6dbb735eb7c551c412475c30ffa51 Author: Keith Packard Date: Tue Aug 25 18:35:54 2009 -0700 KMS: allocate one bo per crtc for cursor The KMS API doesn't provide for sharing a single bo for multiple cursor images, so allocate one bo for each crtc to hold the cursor image. KMS also only supports ARGB cursors, so don't bother to allocate buffers for two color cursors. Signed-off-by: Keith Packard commit e51126c57132492c664f86981c55b166dbb54c79 Author: Keith Packard Date: Tue Aug 25 18:34:25 2009 -0700 Add cursor registers to debug dump output. Signed-off-by: Keith Packard commit 5fa8d04d9c86f343802c05bd3e11c6e733f01b63 Author: Keith Packard Date: Tue Aug 25 18:33:04 2009 -0700 Reload cursors as needed when setting new modes. Cursor images may need rotation, or positions updated when new modes are set. The server provides a convenience function, xf86_reload_cursors for precisely this purpose. Just call it after the new mode is set. Signed-off-by: Keith Packard commit 1fc3f467ab3edd405adc569ac7f629077e6ffb9d Author: Jesse Barnes Date: Tue Aug 25 09:46:10 2009 -0700 Add KMS only build flag Rather than refactoring all our init code only to have it go away when we remove UMS, this patch adds a build time flag to allow the driver to assume KMS support. With this flag active, the driver will not request that I/O or MEM be enabled at probe time, which can allow the server (if other drivers also cooperate) to run as a non-root user. Signed-off-by: Jesse Barnes commit 5dccd1be3ab80b642ef2022446f5bdc1656ed943 Author: Wu Fengguang Date: Fri Aug 21 14:57:11 2009 +0800 Add HDMI audio registers Dump some of the audio registers at server startup time. (II) intel(0): AUD_CONFIG: 0x00000004 (II) intel(0): AUD_HDMIW_STATUS: 0x00000000 (II) intel(0): AUD_CONV_CHCNT: 0x00000000 (II) intel(0): VIDEO_DIP_CTL: 0x20000600 (II) intel(0): AUD_PINW_CNTR: 0x00000040 (II) intel(0): AUD_CNTL_ST: 0x00002000 (II) intel(0): AUD_PIN_CAP: 0x00000094 (II) intel(0): AUD_PINW_CAP: 0x004073bd (II) intel(0): AUD_PINW_UNSOLRESP: 0x80000008 (II) intel(0): AUD_OUT_DIG_CNVT: 0x00000001 (II) intel(0): AUD_OUT_CWCAP: 0x00006211 (II) intel(0): AUD_GRP_CAP: 0x00000004 Signed-off-by: Wu Fengguang commit 38e97d2366738e83e76c72353b65edb13a9d2c7f Author: Wu Fengguang Date: Fri Aug 21 11:31:13 2009 +0800 Add intel_audio reg dumping program It can dump HDMI audio registers for G45. Signed-off-by: "Wang, Zhenyu Z" Signed-off-by: Wu Fengguang commit 6955fc7a74edf6034a292c31a304577c35e925e6 Author: Kristian Høgsberg Date: Thu Aug 20 16:48:58 2009 -0400 kms: Don't use fb offset when using shadow buffer commit 465a4ab416b2e5ad53b96702720331a44fffa2fe Author: Eric Anholt Date: Wed Aug 12 19:29:31 2009 -0700 Align the height of untiled pixmaps to 2 lines as well. The 965 docs note, and it's probably the case on 915 as well, that the 2x2 subspans are read as a unit, even if the bottom row isn't used. If the address in that bottom row extended beyond the end of the GTT, a fault could occur. Thanks to Chris Wilson for pointing out the problem. commit a3962e6f74ddd954ae1390d150a347745d7bdb24 Author: Jesse Barnes Date: Tue Aug 18 10:56:50 2009 -0700 Print block length of backlight table For debugging VBIOS dumps commit 320f21669900f99a7daf8f2294f37be9ad71d05f Author: Jesse Barnes Date: Mon Aug 17 15:19:41 2009 -0700 Dump LVDS backlight info from bios_reader Add LVDS backlight and power VBT structures and dump from the BIOS reader. commit a50916530426a662f5ed262892080b860a445da3 Author: Matthias Hopf Date: Mon Aug 17 15:53:15 2009 +0200 Add BACKLIGHT property support in KMS case. commit 376397c21eb9a7e4ea79d349af41da81c1af861f Author: Zhenyu Wang Date: Tue Aug 18 10:01:12 2009 +0800 Fix VGA plane disabling Only apply on G4X with SR01 bit5 workaround for VGA plane disable, and restore behavior back for other chips to make sure other modes got disabled too. For bug #17235, #19715, #21064, #23178 Signed-off-by: Zhenyu Wang commit 926c7e7d30458078f8185d4e0b9b32b40102b3d5 Author: Matthias Hopf Date: Thu Aug 13 13:59:55 2009 +0200 Add HP Mini 5101 to quirks list. commit 713820197755ea53003b36a920922c3c525eeeea Author: Adam Jackson Date: Tue Aug 11 14:50:03 2009 -0400 Fix the chip names printed in the log to be less obnoxious. Names taken from pci.ids. Pineview appears to be a platform not a GMCH, so use the G/GM convention to distinguish. commit e8f0763d405a8152c74c28792c52fe12c1d41dd5 Author: Eric Anholt Date: Fri Aug 7 18:24:44 2009 -0700 Fix math in the tiling alignment fix. commit 222b52ef16895823fbf3a0fc0be4eb23b930ed1b Author: Eric Anholt Date: Fri Aug 7 18:05:29 2009 -0700 Align tiled pixmap height so we don't address beyond the end of our buffers. commit 62494407e529cfa68529b7267155a12d75418f21 Author: Zhenyu Wang Date: Thu Aug 6 13:52:54 2009 +0800 Fix typo in bios_reader for invalid pointer cast Fixed locally for af45482a52999b52bf41468c458808e30c100e35, but pushed wrong commit. commit 79b6851148574419389ac8055b0c31b8bdac3ab3 Author: Eric Anholt Date: Wed Aug 5 12:45:16 2009 -0700 Fix sampler indexes on i965 planar video. We only set up one sampler, because all of our sampling is the same. By using a non-zero index for the other two samplers, we'd dereference (likely) zeroed data, resulting in using NEAREST filtering. This was a regression in 40671132cb3732728703c6444f4577467fa9223f which incidentally switched from having 6 samplers to 1. Bug #22895, #19856 commit f4e4c1a8544e264c5a1da02f4e7990a1beecf71e Author: Zou Nan hai Date: Wed Aug 5 15:00:37 2009 +0800 It seems that indirect data upper bound check in STATE_BASE_ADDRESS is not acting like what bspec told on 965gm. G45+ follow bspec, but we have to set it to a large value for 965gm. commit af45482a52999b52bf41468c458808e30c100e35 Author: Zhao Yakui Date: Fri Jul 24 10:44:20 2009 +0800 Calculate the DVO relative offset in LVDS data entry to get the DVO timing Now the DVO timing in LVDS data entry is obtained by using the following step: a. get the entry size for every LVDS panel data b. Get the LVDS fp entry for the preferred panel type c. get the DVO timing by using entry->dvo_timing In our driver the entry->dvo_timing is related with the size of lvds_fp_timing. For example: the size is 46. But it seems that the size of lvds_fp_timing varies on the differnt platform. In such case we will get the incorrect DVO timing because of the incorrect DVO offset in LVDS panel data entry. Calculate the DVO timing offset in LVDS data entry to get the DVO timing a. get the DVO timing offset in the LVDS fp data entry by using the pointer definition in LVDS data ptr b. get the LVDS data entry c. get the DVO timing by adding the DVO timing offset to data entry https://bugs.freedesktop.org/show_bug.cgi?id=22787 Signed-off-by: Zhao Yakui commit 50e2a6734de43a135aa91cd6e6fb5147e15ce315 Author: Dave Airlie Date: Tue Jul 28 18:26:25 2009 +1000 intel: drop RES_SHARED_VGA not needed anymore commit f3387310f312a4a9e1d691974834c3d290c2fa32 Author: Dave Airlie Date: Tue Jul 28 18:27:10 2009 +1000 xserver: fix up for stable build reported by Arkadiusz Miskiewicz commit 9bc0096f9de4b85ca6d6a5db109e49c4364bcee7 Author: Dave Airlie Date: Tue Jul 28 13:55:39 2009 +1000 intel: since driver depends on newer server don't need to wrap this drop resource/RAC interactions commit 9a3b568d62a0b48f4a42ea5377740b2df1af432a Author: Dave Airlie Date: Tue Jul 28 13:32:30 2009 +1000 intel: update for resources/RAC API removal commit 3418c6c16b108e45f67f3c868d28932266f7a0bc Author: Krzysztof Halasa Date: Tue Jul 28 10:47:44 2009 +0800 h/v bias in 3DSTATE_DEST_BUFFER_VARIABLES is 4-bits wide Fixes bug #22370 commit 378445738494663f2ee1615598d4c77b870745af Author: Dave Airlie Date: Tue Jul 28 10:10:13 2009 +1000 intel: remove unneeded includes none of these need the resource includes commit 8084f76d86f048ca5b82da089fffa9665dbbcdd5 Author: Keith Packard Date: Sun Jul 26 13:14:05 2009 -0700 Allow DRM mode setting to include transformations This removes the explicit transform disabling code in drm_set_mode_major. Without a fixed X server, transforms will still be broken, but even a fixed X server can't work around this driver bug. Signed-off-by: Keith Packard commit 9a45ace207199eb40e95dc6d2670b3096e66ecd9 Author: Xiang, Haihao Date: Thu Jul 23 11:09:53 2009 +0800 XvMC: enable XvMC/XvMC-VLD on IGDNG commit 043b4a866ab51acffc52d2d71db3475007747571 Author: Xiang, Haihao Date: Thu Jul 23 11:07:13 2009 +0800 add compiled shader programs for XvMC/XvMC-VLD on IGDNG commit 7684adaa370e8b0bd22e6e7dd1d5fa05f6142bab Author: Xiang, Haihao Date: Thu Jul 23 10:57:22 2009 +0800 Check the version of intel-gen4asm tool in configure.ac commit 7dc95b4f1dfecbeb7e9f4a0c35fda32d020be8fe Author: Xiang, Haihao Date: Fri Jul 24 10:39:05 2009 +0800 XvMC: pin XvMC buffers under KMS. Under KMS, the buffer allocated by i830_allocate_memory isn't pinned anymore. However currently 915 XvMC needs static offsets. Fixes bug #22872 commit 12c5aeca7a3db92d3522d00f5daf338d522e2176 Author: Eric Anholt Date: Thu Jul 16 13:34:09 2009 -0700 8xx render: Add limited support for a8 dests. This improves aa10text performance from 74k to 569k on my 855 laptop. This also causes my 865 to hang on aa10text like it does on rgb10text, thanks to actually hitting render accel. commit 6b7728491c3b771bcba2c7ffd75330c0a0b37f44 Author: Eric Anholt Date: Wed Jul 15 16:38:07 2009 -0700 Only align DRI2 tiled pixmaps to the DRI2 tiled pixmap alignment requirement. This should save significant amounts of memory for glyph and other small pixmap storage. Bug #21387 commit 22f7cbc32b70a89d55c79bbea39fb10c50a310ec Author: Eric Anholt Date: Thu Jul 9 23:56:22 2009 -0700 uxa: Tell the driver when we're just going to immediately map the pixmap. This lets the driver allocate a nice idle buffer object instead of a busy one, reducing runtime of firefox-20090601 on my G45 from 50.7 (+/- .41%) to 48.4 (+/- 1.1%). commit 5ef3db45e059df136162584d00d4b0b511456a33 Author: Eric Anholt Date: Thu Jul 9 19:24:38 2009 -0700 uxa: Skip fill of temporary alpha picture that just gets copied over. This was needed when we were doing the mask computations in this pixmap, but now they're done in a temporary and then uploaded later. This reduces runtime of firefox-20090601 from 52.6 (+/- .96%) to 50.7 (+/- .41%) seconds on my G45. commit 6f3fc6b20f3daedab02e31f49678d4d2ff0fa7a3 Author: Keith Packard Date: Tue Jul 21 12:32:10 2009 -0700 drmmode_output_get_modes: Replace existing EDID property blob with new one This synchronizes the X EDID data with the kernel EDID data each time the kernel data may have changed. Otherwise, X ends up stuck with the first EDID data it sees, failing to accomodate to different monitors. Signed-off-by: Keith Packard commit 840a787a191b31ece5068e10daed04bee70bb1a2 Merge: 0a4c4c5 5d50a94 Author: Carl Worth Date: Mon Jul 20 23:00:06 2009 -0700 Merge branch '2.8' commit 5d50a949b3c5d0ad2bc4cf48ab25da1f707a4f6f Author: Carl Worth Date: Mon Jul 20 22:59:37 2009 -0700 Increment version number to 2.8.0 for release. commit b12220bd81f3a0509a3746dac3258e53f3879b23 Author: Carl Worth Date: Mon Jul 20 22:59:02 2009 -0700 NEWS: Add notes for 2.8.0 release Many thanks to Gordon for his notes from http://intellinuxgraphics.org/2009Q2.html commit 0a4c4c5fe8ebad2dd13f5770bd90a194eebb2890 Author: Peter Hutterer Date: Thu Jul 16 11:40:15 2009 +1000 Update to xextproto 7.1 support. DPMS header was split into dpms.h (client) and dpmsconst.h (server). Drivers need to include dpmsconst.h if xextproto 7.1 is available. SHM is now shm.h instead of shmstr. Requires definition of ShmFuncs that's not exported by the server. Signed-off-by: Peter Hutterer commit 57c7cbade9556e7b21867e61353f0928fd553616 Author: Owain Ainsworth Date: Thu Jul 16 20:38:43 2009 +0100 accessing a pixmap if prepare_access fails is verboten. Don't do it, treat this the same as every other prepare access call in uxa. Reviewed-by: Keith Packard Signed-off-by: Owain Ainsworth commit bb3007384298cb57625ec0b3868dff9b23568f3e Author: Eric Anholt Date: Thu Jul 16 12:56:07 2009 -0700 Really fix i915 render. Fail at commit --amend. commit 8dd7ccf37e2de6d80b556e6d18af244cefc1e417 Author: Eric Anholt Date: Thu Jul 16 11:40:51 2009 -0700 Fix 915-class Render after the 8xx-class Render fix. The two shared i830_composite.c, so giving i830 atomic batch support triggered anger about starting i830's atomic area while in i915's atomic area. Instead, split the emit-a-primitive stuff from the state emission. commit a1e6abb5ca89d699144d10fdc4309b3b78f2f7a9 Author: Eric Anholt Date: Wed Jul 15 14:15:10 2009 -0700 Use batch_start_atomic to fix batchbuffer wrapping problems with 8xx render. Bug #22483. commit e386e7b14b139f15205e14b173e8222bf38d9e18 Author: Keith Packard Date: Wed Jul 15 09:43:04 2009 -0700 Reset framebuffer offset when rebinding aperture (22760). scrn->fbOffset may be changed when binding objects to the aperture during server initialization or VT enter. This was accidentally removed when the NoAlloc option was eliminated. Signed-off-by: Keith Packard commit b74bf3f9a65af9e72921d4e9028d9d4d023f8bc6 Author: Barry Scott Date: Mon Jul 13 16:34:20 2009 -0700 Fix XV scan line calculation when rotated. commit 82905c7c0b871a97ec435a765c2ca407903ba595 Author: Carl Worth Date: Mon Jul 13 05:29:49 2009 -0700 Increment version to 2.7.99.902 commit 925bc6cbd430a00928fac2ef58724dd37c3bc349 Author: Carl Worth Date: Mon Jul 13 05:27:40 2009 -0700 RELEASING: Fix typo in instructions commit 67c0afc7b7446a7b98aa7c65043ddba4c7c72b82 Author: Carl Worth Date: Mon Jul 13 05:27:06 2009 -0700 NEWS: Add notes for 2.7.99.902 commit 34c674dd45879b8ba8395b93b16c8a9e7b848f1f Author: Keith Packard Date: Sat Jul 11 22:53:42 2009 -0700 Remove vestiges of NoAccel options from i830_driver.c The enum and OptionInfoRec weren't removed in the initial patch Signed-off-by: Keith Packard commit 33d6e7a2355dfb8ad324c4fa28ce61c7e051b435 Author: Keith Packard Date: Sat Jul 11 22:53:11 2009 -0700 intel.man: Mark NoAccel option as i810/i815 only The NoAccel option is not valid for other chips. Signed-off-by: Keith Packard commit ed8a9a94e1a670ca35311c9ed83d0c479530d41a Author: Keith Packard Date: Fri Jul 10 17:13:14 2009 -0700 i830_uxa_prepare_access: Flush and wait for idle for non-bo pixmaps Without kernel support and explicit knowledge about where in the ring the last rendering operation for a specific pixmap was, we must synchronize with any outstanding rendering before accessing a pixmap which does not have a buffer object. Signed-off-by: Keith Packard commit cb19ac207b784d814f6f389110fd1b21a0f34e8b Author: Keith Packard Date: Fri Jul 10 14:01:02 2009 -0700 KMS: Keep screen pixmap devPrivate.ptr NULL during init and resize The frame buffer only has a valid address between prepare_access and finish_access calls, so remove all other attempts to compute an address from the driver. Signed-off-by: Keith Packard commit 704b88dd50a7e7e3f362264b86d0401bee8603aa Author: Keith Packard Date: Wed Jul 8 13:06:47 2009 -0700 i830_bind_memory: Under UMS: Bind GEM bos with dri_bo_pin, else through the GART We only need to get static offsets for objects when not running KMS, otherwise the kernel will manage those as needed for us. Binding objects is done in one of two ways. For GEM buffer objects, we use dri_bo_pin. For GART allocated memory, we bind that to the GART. commit 7b273732f70e91df8b41d5c48e1379271557dd8e Author: Keith Packard Date: Wed Jul 8 11:53:13 2009 -0700 Allocate GTT space for GEM only under UMS GEM requires GTT space to map objects. Under KMS, the kernel driver has already provided all available GTT space to GEM, so the X server need not do anything. Signed-off-by: Keith Packard commit 56bfee8705f5d7d965227013b205dbc4c93e220c Author: Keith Packard Date: Fri Jul 10 14:49:20 2009 -0700 Always set screen pixmap data pointer at init and resize times For non-DRM environments, the screen pixmap will be GART allocated memory and not a libdrm buffer object and so uxa will only use devPrivate.ptr to find the associated memory. Make sure devPrivate.ptr is set each time the framebuffer is allocated so that uxa will be able to draw to it. Signed-off-by: Keith Packard commit 98087a0b966d5dc69faf72719153a2c878ba3de1 Author: Keith Packard Date: Wed Jul 8 11:47:25 2009 -0700 Make xorg.conf DRI option work under KMS. Fix name of I830AccelMethodInit KMS mode does not call I830AccelMethodInit as that does the user modesetting initialization (yes, it was misnamed), but that means that the DRI option was ignored. Create a new i830_check_dri_option function to do the option detection, then remove that from I830AccelMethodInit, which is renamed i830_user_modesetting_init to reflect what it actually does. Signed-off-by: Keith Packard commit d655a3ff423e69c19a5dc07140cbf3caaa32cb86 Author: Keith Packard Date: Wed Jul 8 18:06:40 2009 -0700 Remove NoAccel support This removes yet another 'debugging' option that hasn't seen real use in a long time, and wasn't supported under KMS in any case. Signed-off-by: Keith Packard commit 4e4b947f0b13f4a62606ccfd5729d5eb26ca0e92 Author: Eric Anholt Date: Thu Jul 9 15:52:16 2009 -0700 Remove bad comment about 3DSTATE_DRAWING_RECTANGLE size. commit 9155cfca75a207bce0fad945f32f0cb33eab8c4e Author: Eric Anholt Date: Thu Jul 9 14:16:07 2009 -0700 Fix lols in trying to figure out whether this is a 64-bit build. Noticed by: Michel Dänzer commit 40e7c9505265823786cf730214db84812a5e494e Author: Eric Anholt Date: Mon Jul 6 11:54:50 2009 -0700 Refuse to allocate giant BOs on 32-bit systems. The overcommit of address space combined with these buffers hitting SW fallbacks all the time means that we're probably better off telling the application "no" instead of likely silently failing later. Bug #22601. commit 6337cd23e692cae789d07f429442c425c18e1d4f Author: Eric Anholt Date: Wed Jul 1 15:54:38 2009 -0700 Initialize the other argument to drmSetInterfaceVersion. The kernel ignores it if dd_major is -1, anyway. commit 216d939858abc924f2e32c95518f937f29ea018e Author: ling.ma@intel.com Date: Tue Jul 7 14:26:02 2009 +0800 enable sdvo lvds scaling function Currently we implemented basic sdvo lvds function, But except for sdvo lvds fixed mode, we can not switch to other modes, otherwise display get black. The patch intends to work for all modes whose HDisplay and VDisplay are lower than fixed mode. Signed-off-by: Ma Ling commit 0402f4f331148084552bd3963dbcb3fb900be8ea Author: Simon Farnsworth Date: Thu Jun 18 12:33:47 2009 +0100 Raise XV limit to 2048x2048 to match hardware limits. The bigrequests limit isn't present in current X servers (tested using textured video on a 965 with both image and window at 2048x2048 on a 1920x1200 display, and image at 2048x2048, window at 1024x1024). Remove the artificial limit, enabling full-screen HD video when rotated. commit a66357832388ba9db21a4b3bf8311d9d1f1ab308 Author: Keith Packard Date: Tue Jul 7 14:13:57 2009 -0700 non-DRI FB resize failed to assign the screen pixmap devPrivate.ptr (22328) When not using DRI, the screen pixmap is not in a bo, and so the usual enable/disable access functions don't adjust the pixmap devPrivate field, leaving it to the frame buffer allocation code to assign this correctly. During mode setting and fb resizing, FB access is disabled, and the screen pixmap devPrivate is stashed away by xf86EnableDisableFBAccess, to be restored when FB access is turned back on. This means that we have to set the pixmap devPrivate.ptr (in case xf86EnableDisableFBAccess doesn't do this), along with storing the address in the scrn->pixmapPrivate field. Signed-off-by: Keith Packard Reviewed-by: Jesse Barnes commit c889b34e432198d5410a068eff3089ff5314ac27 Author: Chris Wilson Date: Tue Jul 7 18:05:01 2009 +0100 Check for a valid I830Ptr before closing master. After failing to become DRM master, the X server dies attempting to close the master fd during free: (EE) intel(0): [drm] failed to set drm interface version. (EE) intel(0): Failed to become DRM master. (EE) intel(0): failed to get resources: Bad file descriptor (EE) intel(0): Kernel modesetting setup failed Backtrace: 0: X(xorg_backtrace+0x3b) [0x8133a3b] 1: X(xf86SigHandler+0x55) [0x80c7945] 2: [0xb805d400] 3: /usr/lib/xorg/modules/drivers//intel_drv.so [0xb7b4bfcc] 4: X(xf86DeleteScreen+0x6b) [0x80d465b] 5: X(InitOutput+0x548) [0x80b0158] 6: X(main+0x1cb) [0x807220b] 7: /lib/tls/i686/cmov/libc.so.6(__libc_start_main+0xe5) [0xb7d107a5] 8: X [0x8071881] Saw signal 11. Server aborting. ddxSigGiveUp: Closing log ddxSigGiveUp: re-raising 11 Segmentation fault Signed-off-by: Chris Wilson commit 705042f497b7b3843c2dcc5c160fb8dfeac1472a Author: Keith Packard Date: Mon Jul 6 13:49:31 2009 -0700 Handle DRI2INFOREC version 3 This DRI2 version does not support the old CreateBuffers/DestroyBuffers interface anymore. Signed-off-by: Keith Packard commit 2ebc7d32e47b5edd5b776c39f936ed4e053caac2 Author: Keith Packard Date: Thu Jul 2 13:13:14 2009 -0700 Update to multi-API DRI2 interface The DRI2 interface was changed to support both old and new drivers in an API/ABI compatible fashion. This change syncs the intel driver with the new version of the DRI2 API. Signed-off-by: Keith Packard commit f6f79eb629184366b1355743d601129a526da90c Author: Rémi Cardona Date: Mon Jul 6 11:01:31 2009 +0200 remove unused shader program This file is not even referenced by any Makefile.am Acked-by: Zhenyu Wang commit 7e722ada533777c5e9ddf44bb4d770bacf8e13bf Author: Zhenyu Wang Date: Mon Jul 6 16:25:13 2009 +0800 Disable FBC on IGDNG Don't make FBC count for memory allocation. Signed-off-by: Zhenyu Wang commit 74227141923a2f5049592219ab80e8733062a5d9 Author: Barry Scott Date: Tue Jun 23 14:14:50 2009 +0100 Fix segv for clipped movie window When playing a movie that is clipped on its left and right edges the Xorg server will SEGV sometimes. This is because the intel driver ignores the clipping info when it copies the planes out of the XV data. The check for the optimised copy was wrong to ignore the width required. Which leads to too much data being copied by the memcpy. It the source buffer happens to end exactly on a page boundary the server will SEGV. As we reviewed the code we checked the calculation of src1, src2 and src3. The patch includes additional comments to make it clear what the elements of the calculation are. This bug exists in git head and we also see it in 2.4.1. Barry Reviewed-by: Ian Romanick commit c1755599db1d9a20954b84ccc07afd892bb6ac9e Author: Jesse Barnes Date: Thu Jul 2 13:04:51 2009 -0700 Clear the bo on the rotate scratch pixmap Since the scratch pixmap header will be re-used after allocation, we need to clear its bo attachment when we stop using it, otherwise a later user will use a bogus bo. Reviewed-by: Keith Packard Signed-off-by: Jesse Barnes commit 324b4686204feb3a7370eeecaff8ba44635f73ca Author: Daniel Vetter Date: Thu Jul 2 14:15:37 2009 +0200 Xv i830_display_video splitup: extract i830_update_scaling_factors Just moved the code, no other changes. Signed-off-by: Daniel Vetter commit c2410addbfb99fcd7069591d9f387c35ed760522 Author: Daniel Vetter Date: Thu Jul 2 14:15:36 2009 +0200 Xv i830_display_video splitup: extract i830_update_polyphase_coeffs To slightly clean up the implementation of i830_update_polyphase_coeffs, introduce the two small helper functions i830_limit_coeff and i830_store coeffs_in_overlay_regs. Signed-off-by: Daniel Vetter Reviewed-by: Ian Romanick commit 795c11c49cf10525f02127a3629d35378d802fa7 Author: Daniel Vetter Date: Thu Jul 2 14:15:34 2009 +0200 Xv i830_display_video splitup: extract i830_update_dst_box_to_crtc_coords Just moved the code ouf of line. Signed-off-by: Daniel Vetter commit 4100abdf5d208bbcbb4ceabad0572c04221443c9 Author: Daniel Vetter Date: Tue Jun 30 13:12:45 2009 +0200 Xv: kill !textured condition This is in the overlay path and therefore always true. Signed-off-by: Daniel Vetter commit b0df0fe91e2b800ed096f369850aa1af4be2f157 Author: Daniel Vetter Date: Tue Jun 30 13:12:44 2009 +0200 Xv overlay: implement GAMMA5 errata - also ensure that the most significant byte is zero - while I was looking at the code, add the Overlay suffix to SetPortAttribute like in the textured case. Signed-off-by: Daniel Vetter commit 5ef4d3cde1335350d82469ebbaed1b547a59552c Author: Daniel Vetter Date: Tue Jun 30 13:12:43 2009 +0200 Xv: kill unneeded indirection overlay and textured video have the exact same QueryImageAttributes function. Signed-off-by: Daniel Vetter commit 1e4784bf26e3c154f5673f7b5add3ef7af3b1474 Author: Eric Anholt Date: Tue Jun 30 19:52:36 2009 -0700 uxa: Fix segfault on source-only picture usage with FallbackDebug. Bug #22107. commit 7e79fc8aa93df4df37c25cf37ee0ec6c7caca1d9 Author: Zhenyu Wang Date: Tue Jun 30 15:40:34 2009 +0800 Fix 945GM VT switch in UMS Bug #19578. We should set private intel_crtc state according to current, as fail to do so pipe A needs active won't be taken care of. Also make sure pipe swap operation always set during VT switch. Signed-off-by: Zhenyu Wang commit 50392ac8234d643c8a99e1753bdb196c0062a891 Author: Zhenyu Wang Date: Mon May 18 13:53:33 2009 +0800 Load fbcon too if kernel mode setting is checked on If i915 module has already been loaded and kms check is true, it would be nice to load fbcon module too. Signed-off-by: Zhenyu Wang commit 058ad9e6ab4a00ff66046d94c2129056011ebee9 Author: Jesse Barnes Date: Tue Jun 30 16:02:19 2009 -0700 Don't try to pin buffers in KMS mode The only things we try to pin in KMS mode are the cursor objects and front buffer, and those are taken care of by the kernel anyway, so we shouldn't even bother trying to pin them (well, not entirely true, XvMC tries to pin as well, but it needs work w/KMS anyway). Signed-off-by: Jesse Barnes commit cec9fc6f6cffce186606f39982d0d78ff7c63bbf Author: Jesse Barnes Date: Tue Jun 30 12:27:59 2009 -0700 Make KMS set_resource function return TRUE This is what's expected by the server, and allows the EDID for example to be exported in the KMS case. Signed-off-by: Jesse Barnes commit 53e248af4365232416d2143a791a07c6751f8319 Author: Jesse Barnes Date: Tue Jun 30 12:00:28 2009 -0700 Use DVO timing block instead of fp_timing when parsing LFP data The KMS side was correct, but the UMS patch was broken. We need to use the DVO timing block of the LFP data to get the timing, not the fp_timing block. Fixes fdo bug #22529. Signed-off-by: Jesse Barnes commit 362883c2f9a3442f7678e6e815f41b21baaa3f53 Author: Jesse Barnes Date: Mon Jun 29 16:26:15 2009 -0700 Add a few error messages for DRM initialization Makes it easier to see where things go wrong. Signed-off-by: Jesse Barnes commit afac333bef4a0ac934f0e4d933dc5053d81ca88c Author: Zhenyu Wang Date: Tue Jun 30 11:10:52 2009 +0800 Remove unused packed yuv sampler shader programs Signed-off-by: Zhenyu Wang commit 150c9adebc0b502f19c970783f411928e5a5c3b1 Author: Zhenyu Wang Date: Tue Jun 30 10:42:41 2009 +0800 Xv: fix domain usage for binding table on i965+ chips Signed-off-by: Zhenyu Wang commit 7770958e42d60966d95702e75c704e20ae2d90dd Author: Zhenyu Wang Date: Tue Jun 30 10:41:26 2009 +0800 Add XV support on IGDNG This brings necessary change for IGDNG for texture video support from 2D render code. Signed-off-by: Zhenyu Wang commit f806fe7d675b966680a63406167ce37e4f8a1ae8 Author: Xiang Haihao Date: Thu Jun 25 15:39:32 2009 +0800 Enable 2D composite on IGDNG This patch enables 2D composite on IGDNG. IGDNG requires new compiled shader programs for Gen5 and some command changes. The most notable is the layout of vertex element has changed, but we tried to keep it as origin to not change shader programs. Also vertex buffer state requires end address of vertex buffer instead of origin max index. Signed-off-by: Zhenyu Wang commit 9fb34012f667e37f480085696ef9c2632d6eb7e1 Author: Zhenyu Wang Date: Thu Jun 25 15:30:04 2009 +0800 Add new compiled shader program for IGDNG Also check intel-gen4asm tool here for new -g option, which is required to compile new programs. Signed-off-by: Zhenyu Wang commit 488acc4595bb7f40130afcb8bcb05656ff3ae82c Author: Zhenyu Wang Date: Thu Jun 25 14:05:40 2009 +0800 Move shader programs under its own subdirectory Signed-off-by: Zhenyu Wang commit 170cae0c8d58fc141de1d8a2f17a4328d39c1263 Author: Jesse Barnes Date: Mon Jun 29 12:55:43 2009 -0700 Only get the VBIOS in non-KMS mode In KMS mode, the kernel takes care of this for us, so don't bother. commit 6511c082459789cf279e7a4528775a1c821ad8cc Author: Jesse Barnes Date: Mon Jun 29 12:53:51 2009 -0700 Output error info if we fail to get DRM resources Useful for debugging. commit 00eb73286c3512a362dce00efdeae740772d0dcd Author: Jesse Barnes Date: Mon Jun 29 09:12:28 2009 -0700 Use swapbuffers_wait control Commit 1eec83a203c48822400742a1fb184b2cb52c62f7, which added the new SwapbuffersWait option, didn't actually include the code which used it. So add a test to DRI2's CopyRegion call, only emitting the scanline wait command if the swapbuffers_wait option is set. Signed-off-by: Jesse Barnes commit f53b3239dbc0ed723774e386e07ac9d8ce96bb89 Author: Zhenyu Wang Date: Thu Jun 25 10:22:23 2009 +0800 Disable XvMC on 915G/GM in KMS These chips require physical address for XvMC surface, which is not available in KMS case. Instead of crashing X, disable it now. Signed-off-by: Zhenyu Wang commit f0270bbb47baed78a0ff6189ae20d3ac322ec02b Author: Jesse Barnes Date: Wed Jun 24 14:42:08 2009 -0700 Fix i830_crtc_on to only check outputs associated with the given CRTC Otherwise we may end up returning a false positive if some other output & crtc are on, but not the one in question, again leading to hangs. Reported-by: Eric Anholt Signed-off-by: Jesse Barnes commit 5d80e24b5fc6d6028028da6ded35389c08bfce29 Author: Jesse Barnes Date: Wed Jun 24 13:12:25 2009 -0700 Treat disabled CRTCs as "not covering" for scanline wait purposes Now that swapbuffers does a scanline wait to avoid tearing, it's important to take into account the CRTC status to avoid hangs. If we do a scanline wait when the CRTC is off (due to DPMS for example) we'll hang the GPU. So add some code to check the CRTC DPMS status to the i830_covering_crtc function, returning NULL if none of the covering CRTCs are actually active. KMS vs UMS logic is hidden in new i830* functions, cleaning up both DRI2 & video paths a bit. Fixes fdo bug #22383. Signed-off-by: Jesse Barnes commit 6d025e679a99778496576af9a6a6fa8c043ae811 Author: Alan Coopersmith Date: Tue Jun 23 09:53:14 2009 -0700 Harden i830 render in case check_composite didn't throw out bad formats. Fixes a warning in a static analysis program, and the code's a little clearer. Bug #21667 commit 1eec83a203c48822400742a1fb184b2cb52c62f7 Author: Jesse Barnes Date: Tue Jun 23 15:05:03 2009 -0700 Add option to control swapbuffers behavior Until we get triple buffering, we'll want this so users can avoid taking a performance hit on apps that render slower than the refresh rate. Fixes fdo bug #22234. Signed-off-by: Jesse Barnes commit bfeeac6de096256fca82244338bb45d53ee53cbc Author: Zou Nan hai Date: Tue Jun 23 11:31:37 2009 +0800 i915 xvmc, fix fd.o bug #22103 commit 15af8ea6ab6998bbab9f4eeda227565c409da229 Author: Jesse Barnes Date: Mon Jun 22 11:11:06 2009 -0700 Fix LFP data block fetch Apparently the proper way to do this is to use the LFP data pointer block to figure out the LFP data block entry size, then use that plus the panel index to calculate an offset into the LFP data block array. Fixes fdo bug #19450. Signed-off-by: Jesse Barnes commit 534e73ad4f234a04755917f2bf17ba821c27eb52 Author: Zhao Yakui Date: Thu Jun 18 09:46:32 2009 +0800 Don't change the blank/sync width when calculating scaled modes Don't the change the blank/vsync width while doing LVDS scaled modes. And use the border instead of border minus one. At the same time, make sure the horizontal border and hsync are even for the LVDS that works in dual-channel mode. So both horizontal border and hsync start are also changed to be even, even for the LVDS in single-channel mode. https://bugs.freedesktop.org/show_bug.cgi?id=20951 Signed-off-by: Jesse Barnes Signed-off-by: Zhao Yakui commit b5cd2130f97591f4a387db1b98c940c30bc6404c Author: ling.ma@intel.com Date: Tue Jun 16 16:52:25 2009 +0800 TV: Set correct voltage level override values We detect TV connect status by setting DAC voltage level override values as 0.7 voltage for DAC_A/B/C. The corresponding 2-bits shold be 0x2, In order correctly to set last bit as 0, at first we must clean it. It fixed freedesktop.org bug #21204 Signed-off-by: Ma Ling commit a6cdcd9fee0164f79075063fd163d142a55fcbc5 Author: ling.ma@intel.com Date: Tue Jun 16 16:47:52 2009 +0800 Set hot plug interrupt to detect HDMI output We detect HDMI output connection status by writing to HOT Plug Interrupt Detect Enable bit in PORT_HOTPLUG_EN. The behavior will generate an specified interrupt, which is caught by audio driver, but during one detection driver set all Detect Enable bits of HDMIB, HDMIC and HDMID, which generate wrong interrupt signals for current output, according to the signals audio driver misunderstand device status. The patch intends to handle corresponding output precisely. It fixed fredesktop bug #21371 Signed-off-by: Ma Ling commit 6b93afc564a5e74b0eaaa46c95f557449951b3b9 Author: Bryce Harrington Date: Wed May 27 03:40:52 2009 -0700 add pipe a force quirk for Dell mini Add quirk to solve issue with black screen and hang occuring after closing the lid with attached external monitor, on Dell Mini. Fixes fdo bug #21960. Signed-off-by: Bryce Harrington commit eb09014ce10428bbcab04e155186382975545f0a Author: Li Peng Date: Tue Jun 16 15:29:57 2009 -0700 don't wait for vblank on rotated displays We may hang or wait for the wrong line if the display is rotated, so just skip the wait in that case. Fixes fdo bug #22196. commit 6c56521bdc0443c0656271caaa795feb13bc1d6b Author: Bryce Harrington Date: Wed May 27 05:18:53 2009 -0700 pipe-a quirk for thinkpad x30 Fixes freeze when closing lid on ThinkPad X30. Fixes FDO bug # 21976. Signed-off-by: Bryce Harrington commit 246cec965958e94babf5377e6f221522b05fb458 Author: Zhao Yakui Date: Wed Jun 10 11:17:28 2009 +0800 Fix EDID for LVDS output device to add the default modes Fix the EDID for the LVDS output device to add the default modes.This is similar to what we have done in UMS mode. a. When there exists the EDID, either find the DS_RANGES block or replace a DS_VENDOR block, smashing it into a DS_RANGES block with open refresh to match all the defaults modes. b. When there is no EDID, we will construct a bogus EDID and add a DS_RANGES block with the open refresh to match all the default modes. http://bugs.freedesktop.org/show_bug.cgi?id=20801 http://bugs.freedesktop.org/show_bug.cgi?id=21094 http://bugs.freedesktop.org/show_bug.cgi?id=21346 http://bugs.freedesktop.org/show_bug.cgi?id=21417 http://bugs.freedesktop.org/show_bug.cgi?id=21671 Signed-off-by: Zhao Yakui commit 5d1dc7677004d445a7a781decd8c1ef9747c14fb Author: Zhao Yakui Date: Wed Jun 10 11:17:27 2009 +0800 Get the LVDS panel limit and check whether the given modeline is valid When the connector type is LVDS, it will traverse the mode list returned by KMS kernel to get the LVDS panel limit. Then it will use the panel limit to check whether the given modeline is valid. If the given modeline exceeds the LVDS panel limit, it will be invalid. http://bugs.freedesktop.org/show_bug.cgi?id=20801 http://bugs.freedesktop.org/show_bug.cgi?id=21094 http://bugs.freedesktop.org/show_bug.cgi?id=21346 http://bugs.freedesktop.org/show_bug.cgi?id=21417 http://bugs.freedesktop.org/show_bug.cgi?id=21671 Signed-off-by: Zhao Yakui commit 115e28639fbf6a1eba636dafac02fadd83036c75 Author: Zhao Yakui Date: Wed Jun 10 11:17:26 2009 +0800 Add the private data for the LVDS connector Add the private data when the connector type is LVDS. We can use the private_data to store the LVDS panel limit. For example: Hdisplay, Vdisplay. http://bugs.freedesktop.org/show_bug.cgi?id=20801 http://bugs.freedesktop.org/show_bug.cgi?id=21094 http://bugs.freedesktop.org/show_bug.cgi?id=21346 http://bugs.freedesktop.org/show_bug.cgi?id=21417 http://bugs.freedesktop.org/show_bug.cgi?id=21671 Signed-off-by: Zhao Yakui commit 3da549f5b350dd42516e5cb3576f7fefe012d95e Author: Zhao Yakui Date: Wed Jun 10 11:37:03 2009 +0800 GFX: Initialize the SDVO device based on the valid slave address When the slave address is found for the SDVO port, the SDVO device will be initialzied. When the slave address is not found for the SDVO port, it will return the slave address by using the following flowchart: a. If the SDVO device info is found for another SDVO port, it will return the slave address that is not used. For example: if 0x70 is used, then 0x72 is returned. b. If no SDVO device info is found for another SDVO port, it will return 0x70 for SDVOB and 0x72 for SDVOC. http://bugs.freedesktop.org/show_bug.cgi?id=20429 Signed-off-by: Zhao Yakui commit 51b87b9913ba164d4d5de79e558233915b37a0a5 Author: Zhao Yakui Date: Wed Jun 10 11:37:02 2009 +0800 parse general definition block to get the SDVO device info The general definition block contains the child device tables, which include the child device info. For example: device slave address, device dvo port, device type. We will get the info of SDVO device by parsing the general definition blocks. Only when a valid slave address is found, it is regarded as the SDVO device. And the info of DVO port and slave address is recorded. http://bugs.freedesktop.org/show_bug.cgi?id=20429 Signed-off-by: Zhao Yakui commit 6ba148bbd78783f59eed3d898638c39b950dcd89 Author: Zhao Yakui Date: Wed Jun 10 11:37:01 2009 +0800 Dynamically get the number of child device in general definition block The size of general definition block varies on different platform/machines. In such case the number of child device is also different. And it will be better to get the number of child device in general definition block dynamically. The number of child device can be calculated by the following formula: (block_size - block_header_size) / sizeof( struct child_device_config) http://bugs.freedesktop.org/show_bug.cgi?id=20429 Signed-off-by: Zhao Yakui commit cdbf84f20295c8a78624318aa6fdfff3f5c8ce27 Author: Keith Packard Date: Thu Jun 11 13:57:09 2009 -0700 intel_batch_init: test have_gem, not directRenderingType Under KMS, directRenderingType will get set to DRI_NONE during driver initialization. When the first batch buffer is allocated, as directRenderingType is DRI_NONE, the GEM bufmgr would get trashed as intel_batch_init called a fake-bufmgr specific function. Signed-off-by: Keith Packard commit 6d062e9e9fc4ac92a5dc2941b4ed0251a1dc6e11 Author: Julien Cristau Date: Thu Jun 11 17:15:04 2009 +0200 Fix xvmc build If we don't find xext.pc, disable xvmc instead of failing configure Also add dependencies on xfixes and dri2proto (src/xvmc/dri2.h includes and ). commit 9d3c3b056c1d4da6ef7afd3f71a5994fad810632 Author: Carl Worth Date: Wed Jun 10 15:30:45 2009 -0700 Increment version to 2.7.99.901 This is the first release candidate for 2.8.0 commit e2622045155f5aa79bacbec8f81c1231194f3033 Author: Carl Worth Date: Wed Jun 10 15:30:09 2009 -0700 NEWS: Summarize new developments for 2.7.99.901 commit e5bfa2702a31566fa94fa75f7289d7cbe9825420 Author: Lukasz Kurylo Date: Wed Jun 10 07:55:31 2009 -0700 DRI2 copyregion: don't wait for scanlines that won't happen In some configurations, it's possible to wait for a scanline outside of a given CRTC range. Make sure that can't happen to fix multihead cases with dead space. Fixes fdo bug #22203. Signed-off-by: Lukasz Kurylo commit cda5561716891484aa6f1c4a234be8d88f17f659 Author: Zou Nan hai Date: Wed Jun 10 16:43:30 2009 +0800 add missing files for previous commit commit 6d500be3cdecd7617dc6119b58ae273eea478af7 Author: Zou Nan hai Date: Wed Jun 10 15:53:24 2009 +0800 enable MC on g45 for player without vld patch commit 88da9b48737229b305da4423e9aa43a09ccdcfac Author: Zhenyu Wang Date: Wed Jun 10 10:45:51 2009 +0800 Add new chipset register dumps Signed-off-by: Zhenyu Wang commit 0d56ef94be0592aec9aa83e4a5e4ff13348640c2 Author: Zhenyu Wang Date: Fri Jun 5 12:59:07 2009 +0800 Disable composite on new chipset for now This depends on updated intel-gen4asm be ready for new chip. Signed-off-by: Zhenyu Wang commit 440ccc44f51d3a5d6f46c28cfcc576cad155fbbc Author: Zhenyu Wang Date: Fri Jun 5 12:56:04 2009 +0800 Add new register definitions Signed-off-by: Zhenyu Wang commit 0d8a9e2c6f58115b9b8449de52e795699ed032af Author: Zhenyu Wang Date: Fri Jun 5 12:51:51 2009 +0800 Update intel_gtt utility for new chipset GTT check Signed-off-by: Zhenyu Wang commit fb524caa3e2f1f516717669642bb4b2244f9e7e4 Author: Zhenyu Wang Date: Mon Jun 8 10:22:14 2009 +0800 Remove fixed MMIO size Use pci resource size instead, which will get the correct MMIO range. New chipset uses obviously larger MMIO range. Signed-off-by: Zhenyu Wang commit 4f40b33ef4b069b18a6a18406da83a23ca6e1127 Author: Zhenyu Wang Date: Fri Jun 5 11:57:57 2009 +0800 Add new chipsets PCI ids Desktop and mobile version of new chipsets are added. Also do memory config like Intel 4 series chipset. Signed-off-by: Zhenyu Wang commit accdbd23676d812d2345f86d8e3ee62f108841ff Author: Carl Worth Date: Fri May 29 15:34:20 2009 -0700 UXA: Rasterize trapezoids to system memory, not a pixmap Since we're only doing software rasterization right now, anyway, it makes more sense to just rasterize to system memory and then upload to a pixmap once complete. This avoids expensive read-modify-write cycles. This results in a 2.4x speedup for a real-world test case that's heavy on trapezoids, which is swfdec running on the following file: http://michalevy.com/wp-content/uploads/Giant%20Steps%202007.swf Many thanks to Chris Wilson for his cairo-traces repository and cairo-perf-trace tool which makes it so easy to measure things like this. commit b5e32c9cf896a0b93d193d797a8e83b4aa4691fb Author: Carl Worth Date: Fri May 1 13:51:39 2009 -0700 Rename i830_exa.c to i830_uxa.c It was just confusing otherwise, (since the EXA code has all been removed now). commit ee539e58c3bf39766c560d625f6e4158d419e64e Author: Kristian Høgsberg Date: Mon Jun 8 21:14:14 2009 -0400 Fall back to fb pixmaps for backing glyph pictures GEM pads pixmaps to 512 byte stride and backs them with a kernel side buffer objects. We typically don't render out of glyph pictures, so we're incurring a lot of overhead per glyph by allocating a GEM pixmap per glyph. By looking at the usage hint, we can fall back to fbCreatePixmap for pixmaps backing glyph pictures, which gives us a nice tight malloced pixmap. The fast path for text rendering is compositing from the glyph cache pixmap to the destination, which shouldn't be significantly affected. Quick bit of testing: (firefox-20090601) xlib-rgba-before 384512.49: 1.01x xlib-rgba-after 389633.94: 1.00x The difference being within the margin of error for the benchmark. Signed-off-by: Eric Anholt Tested-by: Chris Wilson commit 4698b3bd79452ae2066a3d195cf58dd5e30c93f3 Author: Xiang, Haihao Date: Fri Jun 5 10:43:50 2009 +0800 xvmc: don't include xf86dri.h commit 4d9f3a21ab9b2737fe7a5a088c2da1b0c2be7f04 Merge: b8e360b 52054b6 Author: root Date: Thu Jun 4 10:27:41 2009 +0800 Merge branch 'xvmc-vld' commit b8e360bf2b77d28559d15a7c0f9c766848eb6ced Author: Eric Anholt Date: Wed Jun 3 10:12:25 2009 +0000 Fix segfault in DRI2 vblank syncing if the region isn't onscreen. Also, fix some weirdness in the checking for whether the target was the screen. commit 5901a67fc85ac80fabfa98b78202a388445275c3 Author: Eric Anholt Date: Wed Jun 3 10:00:50 2009 +0000 Fix some drawable abuse in i830_dri.c We were casting pixmaps to drawables even if they weren't pixmaps. They did happen to work out since we only used the drawable record out of them. commit 5e48146777921b693c828af9566a77422cc4f85f Author: Eric Anholt Date: Wed Jun 3 09:57:10 2009 +0000 Replace some pixmap-related idioms with inline functions to do so. commit ea0b00e675281b2914450992501566122f9affe0 Author: Ma Ling Date: Mon Jun 1 17:13:53 2009 +0800 Provide mode line from VBT to xorg. If sdvo get modes function can't find modes from EDID, transmit sdvo lvds modes from VBT to xorg. Signed-off-by: Ma Ling commit 9e7ee50bea5f65003f1d70cc06d8c1ace1282548 Author: Ma Ling Date: Mon Jun 1 17:13:22 2009 +0800 Fetch mode line from VBT, then keep it. Parse SDVO LVDS option section, then according to panel type fetch fixed mode line from SDVO LVDS DTDS section . Signed-off-by: Ma Ling commit 88f766be008008d76c150e3ac16f09d4ecbb6d53 Author: Ma Ling Date: Fri May 15 15:22:11 2009 +0800 Wait doubled regis to be stable for load pipe detection We have two approaches for VGA detections: hot plug detection for 945G onwards and load pipe detection for Pre-945G. load pipe detection will get one free pipe ,and set border color as red and blue, then check CRT status by swf register. Because pipe registers in hires mode are double buffered, once set force border bit in pipeconf register, we have to wait for a vblank until it is effective, otherwise result is unstable. It fixed freedesktop bug #20463 Signed-off-by: Ma Ling commit 6a635be5ea2b2df9d6b9a8006325244394038474 Author: Ma Ling Date: Fri May 15 14:01:18 2009 +0800 Set activation periods as 64 cdclk sync up with KMS We use force CRT detect trigger bit(1 << 3) to detect VGA in hot plug mode, which triggers a CRT hotplug/unplug detection cycle independent of the interrupt enable bit(1 << 9), so keep bit 9. And although spec says CRT_HOTPLUG_ACTIVATION_PERIOD_64(1 << 8) is only useful for mobile platform, it is also required to detect vga on G4x platform correctly. Tested the patch on G45/G43/Q45 platforms with no regressions It fixed freedesktop.org bug #21120 and part of bug #21210. Signed-off-by: Ma Ling commit ec2fde7c8250fdc30984f16c8a1d3587d70b0144 Author: Jesse Barnes Date: Tue Jun 2 16:42:56 2009 +0100 Sync DRI2 CopyRegion to vertical retrace Akin to the Xv code, wait for the scanline to be outside the range to be copied by the DRI2 CopyRegion hook. Fixes fdo bug #20664. Reviewed-by: Eric Anholt Signed-off-by: Jesse Barnes commit 704771f1c595df481d244a6f074e9f5620d4a720 Author: Adam Jackson Date: Thu May 28 15:03:45 2009 -0400 Remove useless loader symbol lists. commit 8e942b70cb9a784b3f1311affd6fc74c4bcf68bb Author: Carl Worth Date: Thu May 21 13:12:52 2009 -0700 Revert "Rely on BO pixmaps being present in acceleration paths." This reverts commit 4653a7db622ad54a3182d93c81331765d930db34. Eric was getting a little too ambitious about our brave, new world. We do still want the driver to work with old, non-GEM kernels after all. commit 1a039f4371bec455cad43f0fb7b329f2ee09a974 Author: Eric Anholt Date: Mon Apr 27 17:45:02 2009 -0700 Fold GEM detection into DRM master open. We don't have anything to do with the DRM unless it's GEM-enabled, unless we were to support GEM-but-not-DRI2, which doesn't seem useful. Compilation fixes by Carl Worth commit a04a51c9bb6066454e0fda3c7897f97dab436358 Author: Eric Anholt Date: Mon Apr 27 17:29:36 2009 -0700 Open the DRM and keep the handle throughout server startup to finish. This will let us configure the server from start to finish with the most pertinent information available (KMS vs UMS, DRI2 vs non-DRI). Also, we now close the DRI2 fd at terminate, which we didn't before. This duplicates some code from DRI1 for getting a master FD like I'd done in DRI2, but given that we weren't loading DRI1 ourselves, this is also a bogosity cleanup, and avoids allocating the extra DRI1 private. commit c3bf8b980134a2761701e4bc18235695a1cb07a4 Author: Eric Anholt Date: Thu May 21 11:05:01 2009 -0700 Fix backwards logic on whether to sync to vblank or not. Thanks to Michel Dänzer for catching it. commit ad2128825ba28551cfef203da017151e2eac32ef Author: Kristian Høgsberg Date: Wed May 20 12:32:10 2009 -0400 Only return FALSE when dri_bo_map() fails Small typo in the previous commit. commit 09beee378cecd1079e7a9fa6eee8f084d680d37e Author: Eric Anholt Date: Mon May 18 18:01:05 2009 -0700 Don't do GTT maps on objects bigger than half the available aperture size. The basic problem is that software fallbacks will do single instructions that copy from one GTT-mapped BO into another GTT-mapped BO. If we can't get both of them bound simultanously, we fault one in, retry the instruction, fault the other in (kicking out #1), retry the instruction, fault #1 back in (kicking out #2), etc. Note that we'll still get into a nasty spot if you do a composite operation with a mask where all 3 are big-but-less-than-half-available-aperture, where you'll thrash. It at least means you'll make progress, though, since each instruction will only be operating on two BOs at at time, and the situation seems unlikely. Bug #20152 (3/3) commit 52054b6a4c1ca5117c9750361f71aedd91220c39 Author: Li Shao Hua Date: Tue May 19 16:27:32 2009 +0800 switch XvMC to gem commit 34660fd2df5d61b77ed7041d32ac29053fc94f5a Author: Eric Anholt Date: Fri May 15 23:21:05 2009 -0700 Only sync XV to vblank when drawing to the frontbuffer. This fixes emitting syncs to random pipes with boxes bigger than that pipe's vertical, leading to GPU hangs. Bug #21738 commit b622860429e00d6ab4407980232659c283a8fe8d Author: Xiang Hai hao Date: Mon May 18 17:12:30 2009 +0800 DRI2 for XvMC commit 50c10ededba15dd0c118f1b65756362061491090 Merge: 13c730e 87332a7 Author: Zou Nan hai Date: Mon May 18 17:11:28 2009 +0800 Merge branch 'master' into xvmc-vld commit 87332a7cc16af82aa47e07fbf90da3635b071dbf Author: Keith Packard Date: Mon May 11 13:52:00 2009 -0700 Use drm_intel_bo_disable_reuse API to flag scanout and cursor buffers Buffers referenced by the kernel for scanout or cursor display should not be reused by the driver. Use the new drm API to disable reuse of these buffers. Signed-off-by: Keith Packard commit ebe05200df381c0e6ee636f0f83440bfedea9bcb Author: Jesse Barnes Date: Fri May 15 08:50:17 2009 -0700 Add --enable-debug flag to configure Defaults to enabled. commit 04772b6c09a88f0483c2a7efc48029967c77b9bc Author: Keith Packard Date: Thu May 14 16:57:11 2009 -0700 If DRM can't figure out which pipe to sync on, then don't sync at all. Syncing to the wrong pipe can wedge the hardware if the exclusion area is larger than the vtotal Signed-off-by: Keith Packard commit 128c1c3b7d57b157604788f82bf9fd389839068f Author: Carl Worth Date: Wed Apr 29 14:43:56 2009 -0700 Use libdrm to lookup pipe for tear-free sync of XV Previously, the code was trying to examine a driver_private field, but those fields are only set by the userland-modesetting code so would fail in the case of KMS. This fixes bug #21076: [945GME] [KMS] XV_SYNC_TO_VBLANK does not prevent tearing of xv video https://bugs.freedesktop.org/show_bug.cgi?id=21076 commit 2572fcc6196aff7a2f1095d211fd85d8668647ca Author: Wu Fengguang Date: Thu Apr 30 19:51:26 2009 +0800 README: kill an evil dot To make copy and paste a more pleasure. Signed-off-by: Wu Fengguang Signed-off-by: Eric Anholt commit b9462516d18bc57be5f33f57adb6c3e8beede5ff Author: Eric Anholt Date: Tue May 12 18:53:27 2009 -0700 Remove dead "avail" variable from XAA stuff. commit 1c68bc376a9cb3c0a010c8e28f69a776755c8f64 Author: Jesse Barnes Date: Wed May 13 13:19:53 2009 -0700 Add new have_gem flag Prior to this patch, code that wanted to check whether GEM was present would look at pI830->memory_manager. This turned out to be occasionally problematic in the KMS case, since memory_manager didn't always get set correctly. So add a new pI830->have_gem flag to make things clear in the various code paths, and set it after GEM initializes or when KMS is detected. Reviewed-by: Eric Anholt Tested-by: Magnus Kessler Signed-off-by: Jesse Barnes commit 52367847087206b92f18c40d356d36ab9ee89d39 Author: Keith Packard Date: Thu May 7 14:58:02 2009 -0700 Load i915 and fbcon when checking for KMS Signed-off-by: Keith Packard Signed-off-by: Eric Anholt commit ff7494b4c4b1bd8bb6f169402a9edbe9780787bb Author: Keith Packard Date: Thu May 7 14:58:01 2009 -0700 Add DP link and GMCH M and N registers Signed-off-by: Eric Anholt commit e54a23bff068416ccbdb75d538dc7dcd40a6c95c Author: Keith Packard Date: Thu May 7 16:35:19 2009 -0700 Fallback when VT inactive While the VT is inactive, pI830->batch_bo will be NULL, so use that as a simple check for when to not use the accelerator. The alternative is to ignore VT switch and just keep drawing, which would also be fine. Bug #21468. Signed-off-by: Keith Packard [anholt: Removed extra return FALSE -- I830FALLBACK does that.] Signed-off-by: Eric Anholt commit 660bd745c21c56e330d844fe4c8eaae862a77483 Author: Wu Fengguang Date: Thu Apr 30 18:42:18 2009 +0800 Remove the offset parameter from i830_allocator_init() offset is redundant. i830_allocator_init() is only called in one place with offset=0. Acked-by: Magnus Kessler Signed-off-by: Wu Fengguang Signed-off-by: Eric Anholt commit b1f5cc3349f6811ff4d8dc64cc291788d6726372 Author: Carl Worth Date: Tue May 12 11:45:03 2009 -0700 RELEASING: Better instructions for where to send announcements The xorg-announce list doesn't need to hear about development snapshots and release candidates. The intel-gfx list is good for that. commit f16ee218845ec48940ea457b921d34896d80a807 Author: Alan Coopersmith Date: Sun May 10 16:25:24 2009 -0700 Fix "Unkown" typo in two FatalError messages Signed-off-by: Alan Coopersmith commit 8d27247829fe4f55691ce68f9f4b14810fb34b32 Author: Stijn van Drongelen Date: Tue May 5 16:37:06 2009 +0200 Fix typo in (unused) INTEL_BIOS_32 macro Debian bug#527062 [jcristau: fix same typo in bios_reader.c] Signed-off-by: Julien Cristau commit a8a771a853478e5f45f71d0eff3c4d55bf24d0ad Author: Arkadiusz Miśkiewicz Date: Wed Apr 29 00:21:18 2009 +0200 Restore CFLAGS after tests. Reverts single line of broken commit e5133a94dc78411eaef324131ea8056aeb81779e. Signed-off-by: Eric Anholt commit 8255cca2c9092f7ecb798944aa8f03fa3efcfa6c Author: Keith Packard Date: Fri May 1 18:34:43 2009 -0700 Split i915 textured video commands to fit into batch buffers. i915 textured video commands are quite long, but must be contained in the same batch buffer as the 3D setup commands. When the number of clip rects for the video becomes too large for the associated commands to fit in the same batch buffer, this change breaks the sequence into pieces, ensuring that each batch contains the necessary setup sequence. Signed-off-by: Keith Packard commit e5e0fb846bda3e1757b89e50d5244d28457b9fe3 Author: Keith Packard Date: Fri May 1 12:26:04 2009 -0700 Call down to lower CloseScreen before shutting down DRM allocator Lower level functions will destroy objects that are managed by the DRM allocator, so make sure those are done before the allocator shuts down. Signed-off-by: Keith Packard commit cfb98f3da936907945f48dad4c2345930f7beb60 Author: Keith Packard Date: Fri May 1 12:23:32 2009 -0700 Revert "Leave allocator running until lower-level CloseScreens are done" Uh, oops -- the FD used to talk to the kernel is closed before the allocator_fini function is called now. This reverts commit 1872869e6ffcc8e6cab820c508fe5404d7e8ff9c. commit 11a853bd8e5d907fe7f5bd907453bcdac9032861 Author: Keith Packard Date: Fri May 1 11:51:13 2009 -0700 Hold reference to video binding table until all rects are painted. The optimization of unreferencing the binding table when the relocation is posted causes the object to be dereferenced for each box in the clip list, causing general chaos in the buffer manager. It's easier to just hold a reference to the object until all of the boxes are painted and then drop it. Signed-off-by: Keith Packard commit ed492131c13715b73c14d328d0668120acb58b40 Author: Keith Packard Date: Fri May 1 11:50:17 2009 -0700 3D_STATE_VERTEX_BUFFERS takes four 32-bit values, not three. The spec says this command takes an extra (mbz) 32-bit value, so let's provide it with one. Signed-off-by: Keith Packard commit 66d1536a2ecc7a3d44da4c0dbe6c85aaa4e05791 Author: Keith Packard Date: Fri May 1 11:48:51 2009 -0700 Don't bother to enable VF statistics during 965 video playback This was used while bringing up the driver to debug vertext fetches. Signed-off-by: Keith Packard commit 1872869e6ffcc8e6cab820c508fe5404d7e8ff9c Author: Keith Packard Date: Fri May 1 11:46:51 2009 -0700 Leave allocator running until lower-level CloseScreens are done The lower level close screen functions will free allocated objects, causing a crash if the allocator isn't still available. Signed-off-by: Keith Packard commit 1142353b487c155a31011923fbd08ec67e60f505 Author: Keith Packard Date: Fri May 1 11:44:13 2009 -0700 intel_batch_start_atomic: fix size passed to intel_batch_require_space (*4) intel_batch_start_atomic takes an argument in 32-bit units, and so it must multiply that by 4 before passing it to intel_batch_require_space, which takes an argument in bytes. We should figure out what units we want to use and use the same everywhere... Signed-off-by: Keith Packard commit 8232177a005127a0001af4b14c3beb766958ef11 Author: Keith Packard Date: Thu Apr 30 15:30:05 2009 -0700 Allow cursors to roam past 2048x2048 limit. There's no reason to clip cursor positions to an artificial limit; the hardware cursor limits always mirror the hardware display limits. Signed-off-by: Keith Packard commit 417f3784b7fae8de3559c7607a2de60661a6a448 Author: Carl Worth Date: Tue Apr 28 20:42:22 2009 -0700 Add doltlibtool to DISTCLEANFILES Otherwise make distcheck fails. commit bc9a688476f02233450eb05dfb40acbf337d679b Author: Carl Worth Date: Tue Apr 28 20:37:13 2009 -0700 NEWS: Add notes for 2.7.99.1 snapshot commit a90cab43209bba52d35b953f3d686a19c154fc43 Author: Kristian Høgsberg Date: Tue Apr 28 13:12:55 2009 -0400 Remove a handful of pointless comments CVS keywords, comments about how the source was once reformatted, and the ad-hoc changelog comment in in i830_driver.c commit c231b41f3f3eb3ba9c8436d5fd93a30704ed437c Author: Eric Anholt Date: Tue Apr 21 15:55:01 2009 -0700 Remove checks for xf86RotateFreeShadow, introduced in server 1.4. commit e5133a94dc78411eaef324131ea8056aeb81779e Author: Eric Anholt Date: Tue Apr 21 15:49:01 2009 -0700 unifdef LIBPCIACCESS and XSERVER_LIBPCIACCESS. Depending on new server means these are always present. commit 4653a7db622ad54a3182d93c81331765d930db34 Author: Eric Anholt Date: Mon Apr 20 22:05:54 2009 -0700 Rely on BO pixmaps being present in acceleration paths. commit 1784efc1f0c74edda8c78fb1b0cdd989f0a088ad Author: Eric Anholt Date: Mon Apr 20 18:25:59 2009 -0700 Remove XF86DRM_MODE. We now depend on server 1.6 and current libdrm, so no need to ifdef it. commit d82ea4372fb74654eb0f37d996977003473846ed Author: Eric Anholt Date: Mon Apr 20 13:20:03 2009 -0700 Replace I830Sync's irq emit/wait code with bufmgr use. This pre-GEM code was all sorts of broken -- see intel_bufmgr_fake.c for the hoops that must be jumped to use that kernel interface successfully. Yet we continued to use it even with KMS/DRI2/UXA, which may account for some hangs. commit 612c1f1f1859ce0cef41049d79cc473657d48612 Author: Eric Anholt Date: Mon Apr 20 16:16:48 2009 -0700 Remove I830_XV ifdef. The developers of the driver don't ever run or test without XV. Don't do it. commit af6892f2b873dd508994d8bbf3d67e719b535e35 Author: Eric Anholt Date: Mon Apr 20 16:07:05 2009 -0700 Replace i830WaitSync with just I830Sync(), as nearly all callers had it wrong. People were trying to BEGIN_BATCH()/ADVANCE_BATCH() then i830WaitSync on the results, which wouldn't necessarily wait and lead to various painful bugs, since only EXA called MarkSync and only for certain rendering operations. commit 393abc15b76804580bfee0760ddbd1fb77e66c02 Author: Eric Anholt Date: Mon Apr 20 15:58:35 2009 -0700 Now that video destination pixmaps are always in BOs, no more MarkSync. commit dc71573292c215f49716f4dc1ebc416c6b172995 Author: Eric Anholt Date: Fri Apr 17 15:13:34 2009 -0700 Remove can_resize, which is now always true (except when a bug interfered) commit 96df22740b2cdc4f82a4a36c0f77663105d9337e Author: Eric Anholt Date: Fri Apr 17 15:11:12 2009 -0700 unifdef I830_USE_UXA. We only have on acceleration architecture now, and you can always build it if you're building the driver. commit fa81ae1637bfd7b73b43355b78c88a9b84c0393c Author: Eric Anholt Date: Fri Apr 17 14:01:47 2009 -0700 Remove EXA support. UXA has completely replaced EXA at this point. UXA is the same rendering core as EXA, but relying on kernel memory management or a fake bufmgr instead of trying to manage memory in the X Server. commit 1b10745a2528622a32271f64c35fcdb7b7154d11 Author: Eric Anholt Date: Fri Jan 23 08:39:59 2009 -0800 Remove XAA support. While EXA/UXA aren't completely good replacements (see bugzilla for performance and stability problems), we are pretty sure at this point that it's the right way to go and that having multiple acceleration architectures is getting in the way of producing a stable codebase. commit 30c226eeb35f034c3ddb881e77454051dc210298 Author: Eric Anholt Date: Thu Jan 22 17:54:49 2009 -0800 Remove DRI1 support. This was blocked on wide distribution of X Server 1.6 (now in the current or next version of major distributions) and solutions for a couple of significant architectural problems (vblank sync and frontbuffer rendering, which we now have code or good plans for). This includes disabling XVMC which is DRI1-only currently. commit 47591334a183881704a121ae06ebc2fadebe6f73 Author: Eric Anholt Date: Fri Apr 17 13:54:47 2009 -0700 Remove pre-server-1.5 support. commit 3187c7698b93f1d0e07798e9c42ca2877d55e055 Author: Eric Anholt Date: Mon Apr 27 14:50:54 2009 -0700 Fix assert at startup with DRI initialiation failure. In this path, we'd make it to allocator_init -> init_bufmgr without GEM and without FbBase being initialized, leading to assertion failure to catch this mistake. Comedy ensued when trying to move just the MapMem up, leading to the rest of the commit. Some day (like tomorrow after I rebase intel-cleanup) I'll clean this path up. Tested with 2 X Servers on 2.6.28 (one gets DRI2, one fails successfully), 2 UMS X Servers on 2.6.30rc2 (each gets DRI2), and 2 KMS X Servers on 2.6.30rc2 (success all around). commit fbaf13c93511547c563129527797fbef8628652e Author: Eric Anholt Date: Mon Apr 27 16:05:50 2009 -0700 Don't clear the framebuffer if it isn't currently bound. This segfault can be triggered in non-KMS memory init before the EnterVT, and will happen anyway at EnterVT time. commit ab878118b9fb46c437a02f824d29f4a206e7fd80 Author: Eric Anholt Date: Mon Apr 27 16:00:05 2009 -0700 Don't initialize DRI2 if the fd we get is not master-capable. commit 385ac2197b64574f30620a203e675d8da0e1472f Author: Eric Anholt Date: Mon Apr 27 15:28:21 2009 -0700 Fix drmSetMaster/DropMaster error messages. commit 5b05a589efb23b2fc09b06e4271174d922b1ab02 Author: Pierre Willenbrock Date: Sat Apr 25 22:58:20 2009 +0200 format == 0 means "use default" in I830DRI2CreateBuffer Reviewed-by: Ian Romanick commit e55d943126cdd3eac7dfec5f40e794f89dbf038b Author: Eric Anholt Date: Mon Apr 27 11:18:07 2009 -0700 Don't try to do anything for I830Sync when VT switched. Fixes a crash with fake bufmgr and UXA. commit 9748aa5594a8357754c06dd82108b131260b1a71 Author: Shuang He Date: Sat Apr 18 11:48:08 2009 +0800 Free front buffer bo when X exit It's needed when KMS or DRI2 is enabled, or there will be memory leak. Also fixes a segfault at startup with fake bufmgr. Signed-off-by: Eric Anholt commit b8ca146b060e6f76bf048f1f6cf6ee89d38d015e Author: Alan Coopersmith Date: Fri Apr 24 16:03:27 2009 -0700 Fix UXA to build with Sun compilers (use __func__ instead of __FUNCTION__) Signed-off-by: Alan Coopersmith commit 5d6f4f6eb7a4dcbe1ce5a134d882e56f958ed2ba Author: Ian Romanick Date: Fri Apr 24 12:28:13 2009 -0700 DRI2: If the SDK supports it, use the DRI2GetBuffersWithFormat interfaces If DRI2INFOREC_VERSION is defined in the server's dri2.h and has a value greater than 1, compile to use the CreateBuffer and DestroyBuffer interfaces. The format parameter parameter to CreateBuffer is assumed to be the bits-per-pixel of the buffer. Signed-off-by: Ian Romanick Reviewed-by: Kristian Høgsberg commit 106e4b44c5af6552cbd079c4ec34def9dcfb168a Author: Zhenyu Wang Date: Fri Apr 24 10:55:09 2009 +0800 SDVO: switch bus once for i2c transfer Before sdvo try to get edid by i2c bus, it must do switch control bus to ddc active state from sdvo only state. However if current state has been ddc active state, redundant switch operation in our driver will cause error- "Unable to write to SDVOCTRL_E for SDVOB Slave 0x70". The patch will do switch control bus only one time during whole edid transmission. It has fixed bug #19937 Signed-off-by: Zhenyu Wang Tested-by: Ma Ling Signed-off-by: Ma Ling commit 8f64837e56b2de0fb8a9100d1a844fd3f18d751c Author: Shaohua Li Date: Mon Feb 23 15:19:25 2009 +0800 Disable FBC on IGD for UMS It appears the new chip doesn't support FBC currently. Signed-off-by: Shaohua Li Signed-off-by: Zhenyu Wang commit 7b01aa5cc41620da5bb48f391ff98d9e82572e52 Author: Eric Anholt Date: Wed Apr 22 09:03:21 2009 -0700 Revert "fix overflow warning on videoRam" This reverts commit 08ebde4715b87867184d42b60762cd774e151f5c, which was apparently untested and broke KMS. commit ceb3a2eaf9090d67e4dfcbed188125108ceab78d Author: Zdenek Kabelac Date: Tue Apr 21 18:58:23 2009 -0700 Remember allocated offscreenImages memory for freeing it in CloseScreen() Signed-off-by: Zdenek Kabelac [anholt: renamed the member to match the variable name] Signed-off-by: Eric Anholt commit 701c6bef14b5d464847cc42c5ccb66fdeb157f1a Author: Zdenek Kabelac Date: Tue Apr 21 18:53:07 2009 -0700 free allocated name inside sdvo_destroy Signed-off-by: Zdenek Kabelac Signed-off-by: Eric Anholt commit fe71217ca86eb7ae8081bf3e26d30f2002d27691 Author: Zdenek Kabelac Date: Tue Apr 21 18:51:02 2009 -0700 Unreference allocated bos in i965 render error paths Signed-off-by: Zdenek Kabelac Signed-off-by: Eric Anholt commit b8b6ca830b1fd6956c76a5417462ca55174cb881 Author: Zdenek Kabelac Date: Tue Apr 21 18:47:03 2009 -0700 Fix leak of some 965 render state on VT switch. Signed-off-by: Zdenek Kabelac [anholt: fixed up unneeded != NULL checks] Signed-off-by: Eric Anholt commit d7ca870e1ce251d42e3689a8e1e7d080ab1325fb Author: Albert Damen Date: Sun Apr 5 16:36:35 2009 +0200 Fix crash with XV with large virtual display If a virtual display with width > 2048 is used, the first time an XV buffer is needed will result in a BadAlloc error message, but the next time X would crash. Signed-off-by: Eric Anholt commit 04ed92e3db8d9fcf2a1089ed433ab67bf0969655 Author: Eric Anholt Date: Tue Apr 21 15:17:31 2009 -0700 Remove dead xoffset/yoffset from pre-randr. commit ab2c988767aec854d3c1702bee1e5a06bd00870c Author: Eric Anholt Date: Tue Apr 21 14:53:45 2009 -0700 Remove dead monitor detect debugger. watch xrandr works fine. commit 928a37041defcca6f57f9452ba62e67524cb4510 Author: Eric Anholt Date: Mon Apr 20 15:46:11 2009 -0700 Replace a bunch of #ifdef debug flushing/syncing with a single function. This removes it from a callsite where it would have just resulted in a fatalerror. commit 1fc93ee184ceefaea9528bb46ae82884c44d9b36 Author: Eric Anholt Date: Mon Apr 20 14:42:31 2009 -0700 Staticize a bunch of functions and variables in the driver. This cleans up findstatic.pl output for the i830+ code, which resulted in removing some code. The only odd part of this commit is the if (0) i830_sdvo_dump() in i830_sdvo.c -- it tells the compiler that the code is used, without using it since we want the code around while debugging. It's also in a likely place to ask for the dump, so I think it's OK. commit b2d7928f195f6439ecd140e6280b958b8a1f534b Author: Eric Anholt Date: Mon Apr 20 14:48:59 2009 -0700 Use a static inline to replace if (0) to an unused stub function. commit 093f51646b2f2301c907e14d0ad4b1f80ff60a16 Author: Eric Anholt Date: Mon Apr 20 14:36:52 2009 -0700 Remove unused i830_output_type_names commit c774ef282bfb0c594479bbab3527fe5fda2a8559 Author: Eric Anholt Date: Mon Apr 20 14:29:17 2009 -0700 Remove dead mono cursor load code. commit 75c531b9652b3919ddbf51f8eec804e6bdbb2331 Author: Eric Anholt Date: Fri Apr 17 14:03:39 2009 -0700 Rename EXA rendering functions to UXA, since we're keeping them post-EXA. commit 40dbba5cf710a6e392afca73965aa48fa3953d1f Author: Eric Anholt Date: Fri Apr 17 15:15:27 2009 -0700 Remove some dead i830.h struct members. commit 84f69081abaeef8b05cafb64d3102eb2abdf9a8e Author: Julien Cristau Date: Thu Apr 16 14:27:15 2009 +0200 Require xserver 1.3 I don't think anyone tests this against an old server anymore. Signed-off-by: Eric Anholt commit 08ebde4715b87867184d42b60762cd774e151f5c Author: Zhenyu Wang Date: Mon Apr 20 09:43:09 2009 +0800 fix overflow warning on videoRam Note that pScrn->videoRam is an 'int'. i830_driver.c: In function ‘I830ScreenInit’: i830_driver.c:3019: warning: overflow in implicit constant conversion Signed-off-by: Wu Fengguang commit 5a07ab502fe1e58e7e37fe554fb42d8d2c8c53ec Author: Ian Romanick Date: Fri Apr 17 20:59:04 2009 -0700 DRI2: Respect the src and dst parameters of CopyRegion. Signed-off-by: Ian Romanick commit 2e3b95ed0197971e81ab7509245c899e96859d5b Author: Carl Worth Date: Wed Apr 15 18:54:19 2009 -0700 Increment version to 2.7.99.1 This is the number we want for any development snapshots along what will eventually become 2.8.0. (Once we get to 'release candidates' we'll bump this up to 2.7.99.901.) commit c9e174b31ae3b9a138ae696d563420a841062f57 Author: Carl Worth Date: Wed Apr 15 18:52:38 2009 -0700 RELEASING: Note that --with-xserver-source is needed for make distcheck I was always forgetting this without this reminder. commit 73c3be1aa033e8c5c7ee777eb2fd43c19668fa86 Author: Carl Worth Date: Wed Apr 15 18:18:14 2009 -0700 README: Fix typos in chipset list, and point to how_to_report_bug web page Thanks to Gordon Jin for these suggestions. commit c51dddb724a79a75491369a4c3e8b7b26231e7ac Author: Carl Worth Date: Wed Apr 15 18:07:17 2009 -0700 AUTHORS: Add Robert Lowery to the authors file Rob got missed from my first scan since one commit lists his name as just 'Rob' and 3 commits don't attribute him as author: 83d304c61ad5fdc58b0a9309dbd1e5a3f6cd9b01 7552d80e367fe38bbc594fe94abd649917fe54d5 6eecef4fed8a21dfdabef42eb69fd150b96167b2 commit 4b5edde5da4b3e955eb2d77004de81e47bec7f69 Author: Robert Lowery Date: Wed Apr 15 18:03:31 2009 -0700 Fix typo in comment Thanks to Robert Lowery for the sharp eyes on this one. commit 3fd5a1ecd1d5140ae07ccc279298bcadd515e97f Author: Carl Worth Date: Wed Apr 15 16:44:11 2009 -0700 RELEASING: Update instructions to reflect some minor process improvements We've added a NEWS file now, so that needs to be updated for each release. We're also now using tag names of just rather than xf86-video-intel-. commit e1cace16a6130dcdd93965d2329a349d49200fa6 Author: Carl Worth Date: Wed Apr 15 16:33:12 2009 -0700 NEWS: Add note about broken PAT code in some kernels Hoping to cut off some false bug reports here. commit 9ffd1951d1f2fd2f53273d04ea29de050f07af55 Author: Carl Worth Date: Wed Apr 15 16:14:44 2009 -0700 Add AUTHORS and NEWS to EXTRA_DIST These new files don't do us much good if we don't distribute them in our releases. commit e4cd9de2933ada3e2a4b43552729ae3a370128bf Author: Carl Worth Date: Wed Apr 15 16:14:03 2009 -0700 Add a NEWS files with release-notes for 2.7.0 It will be nice to have release-notes under revision control, as well being able to document issues in an obviously time-sensitive file, (as opposed to README where we were documenting some of this previously). commit 506c810f8f3db89048dda9777902f142ffeb86aa Author: Carl Worth Date: Wed Apr 15 16:10:52 2009 -0700 Clarify that the default acceleration is UXA if KMS is available. Stale documentation considered harmful of course. commit b9716b836cb2b4569c90b81f344932ac668dc5bf Author: Carl Worth Date: Wed Apr 15 15:39:06 2009 -0700 Add a new AUTHORS file This is a sorted list of everyone with more than 2 commits in the git revision history. We also list some historical authors mentioned in the man page, (with code presumably pre-dating the beginning of revision history). commit 8deb3a3709a9aaa549be404566715a01246354d9 Author: Carl Worth Date: Wed Apr 15 15:38:11 2009 -0700 README: Remove almost all time-sensitive information This was all very stale, and is better convered in intel.man. We replace this with a list of pointers to where to get current information, (man page, web site, and mailing list). commit 9b615a52671aacf34666f90ecfff98651ce6afe2 Author: Li Peng Date: Fri Apr 10 14:39:35 2009 +0800 Turn on front buffer tiling in KMS. This code disabled front buffer tiling in KMS. Turn it on since kernel handles all tiling now, this improves performance of x11perf -aa10text from 97k to 286k on my 945GME. Should help with #20761, if not totally fix it. Acked-by: Jesse Barnes Signed-off-by: Li Peng commit 053432991c812146f6e7c6f13c6ace55385c825f Author: Ma Ling Date: Mon Apr 13 14:27:35 2009 +0800 update manpage for BROADCAST_RGB property commit 62ba7211fe9b6aada125ebfe34cf7161e817ad6b Author: Ma Ling Date: Mon Apr 13 14:24:57 2009 +0800 set broadcast RGB mode for integrated HDMI output. commit 69388953ce889080d5f014123d89bf3eb45f3d8d Author: Ma Ling Date: Mon Apr 13 14:23:06 2009 +0800 set broadcast RGB mode for HDMI and TMDS from SDVOX output Almost all digital TVs accept broadcast RGB values from 16 to 235 for each channel, otherwise for those uncompensated videos, when RGB values are set from 0 to 255, they will shows black and whiter clamping, which seriously degrades picture quality. The patch will enable the broadcast RGB mode for hdtv according to user's setting. It fixed bug #14486 commit 6d345c49f693cc5cffaa00b94559d2afcb3a0864 Author: Carl Worth Date: Fri Apr 10 14:07:14 2009 -0700 Add a RELEASING file documenting the release process Thanks to Jesse Barnes for the original recipe. commit 7e516b6d24d8c0c6549a9a60fcf487e3a1615020 Author: Jesse Barnes Date: Wed Apr 8 16:38:08 2009 -0700 Silence warning in i830_dmi_store_field Just add a dummy ret variable to shut up gcc. commit 620e97bbd6a811ad69b8ac94df1fe2c9edf65549 Author: Jesse Barnes Date: Wed Apr 8 15:49:00 2009 -0700 Don't enable kernel execbuf fencing w/EXA If we enable kernel execbuf fence register management, it's best if the kernel manages all fence registers. This works fine if the accel method is managing pixmaps or doesn't use offscreen pixmaps. However with EXA, pixmap accesses are done relative to the framebuffer BAR mapping (pI830->FbBase) and the Screen pixmap address. So if we try to set the screen pixmap to point at a GTT mapped (and therefore properly fenced) address, later calls to intel_get_pixmap_offset() will call into EXA, which will use the pseudo-random pixmap addr and the EXA offscreen base addr (which is really just FbBase) to calculate the offset. This will fail. So disable kernel fence reg management in the EXA case (this is easier than adding proper EXA pixmap management to xf86-video-intel, and makes more sense since we'll be removing EXA soon anyway). Fixes FDO #21027. Also happens to fix FDO #21029 (as tested by Carl Worth Date: Tue Apr 7 12:31:07 2009 -0700 Fix value for MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW Since the change to scan-line based video sync, (rather than vblank- based), we've only been getting tear-free video on one of the two pipes. This fixes that bug by using the correct constant for waiting on PIPEA. commit 940c2aad4d174b6609bdc49f8c99a4bc37926516 Author: Carl Worth Date: Mon Apr 6 14:36:33 2009 -0700 Don't clip video to CRTC in the case of textured video Since we're not limited by a single overlay plane on a single pipe, we want to not clip at all, (so that the correct video appears on both pipes). This fixes bug #20980 which shows a video spanning two pipes being rendered incorrectly. commit 63b4b5efac936c674dedad8125a8dbac4f000908 Author: Zhenyu Wang Date: Tue Apr 7 10:53:08 2009 +0800 quirk LVDS on ibase MB890 855GM board fix bug #19529 commit 5d9d9a2e466474a0508a15b294a91507ccb3ccc1 Author: Carl Worth Date: Mon Apr 6 14:02:08 2009 -0700 Fix new video sync-to-blank code for multi-head We need to account for a non-zero Y offset for the CRTC. Without this, we don't sync to the correct region, so tearing becomes visible again. commit 3d4ee3cac1d63dfdf7b54c8ba577f3b77637499f Author: Carl Worth Date: Mon Apr 6 11:31:20 2009 -0700 Remove support for 'auto'(-1) value of XV_SYNC_TO_VBLANK We previously had a heurstic here where we would only sync to vblank for windows that covered more than 25% of the screen. We don't need this anymore since the new approach to sync, (WAIT_FOR_SCANLINE_WINDOW), is not excessively costly for small windows. commit bc3312fd7c03d09a231dfebfe390fe668ad15d1e Author: Carl Worth Date: Mon Apr 6 11:16:40 2009 -0700 Use WAIT_FOR_SCAN_LINE instead of WAIT_FOR_VBLANK Either way, the goal is tear-free video playing. But waiting for a scan-line window not only has the advantage of being cheaper for small windows, but also avoids hanging the GPU in the case of the pipe getting turned off, (by screensaver, for example), while a batch is waiting for a VBLANK that will never occur. This fixes that GPU hang. commit 6cd914ef315036ce8e91c7b6492994353e8ed2d8 Author: Jesse Barnes Date: Fri Apr 3 11:15:18 2009 -0700 Fix offset in begin_gtt_access case Don't use bo->virtual in the begin_gtt_access case, use the framebuffer mapping and bo offset instead. Reviewed-by: Eric Anholt Signed-off-by: Jesse Barnes commit 13c730e003e805e19deee0996b2af30f69e54c4d Author: Zou Nan hai Date: Wed Apr 1 15:12:55 2009 +0800 fix 1.multiple instance 2.memory leak commit fad714c40078d22fff82dc0692a344f66ddf9680 Author: Zhenyu Wang Date: Wed Apr 1 10:11:35 2009 +0800 SDVO: fix output flag dumping for unknown type Found by Hugo Jacques commit 00de1757dd5776962bdd4c8968181878c2ebf4c9 Author: Hugo Jacques Date: Wed Apr 1 10:10:05 2009 +0800 SDVO: add composite TV out support commit 087f72e1f5d7d11b8795ba80a842874f5a9bb01d Author: Jesse Barnes Date: Tue Mar 31 07:50:10 2009 -0700 Match GTT unmap with map in KMS rotation case Missed this when the GTT unmap call was added. If we don't do this we trigger an assertion in libdrm, since the buffer has never been mapped normally. Fixes bug #20943. Signed-off-by: Jesse Barnes commit 4f046af760b92c07f59664359453933fb5358e3d Author: Zhenyu Wang Date: Tue Mar 31 13:49:44 2009 +0800 Disable LVDS detect methods Both methods ACPI lid and SWF bit have issues in LVDS detect from wider testing. Fallback to origin code. commit e964d4e53af3a47de6d09c884be1cc0044d03bea Author: Albert Damen Date: Mon Mar 30 11:38:02 2009 -0700 Non-GEM allocations incorrectly force TILE_NONE (bug 20797) With -intel 2.6.3 performance was very bad when using a non gem enabled kernel (2.6.27) and EXA. For example sauerbraten ran with 4 fps and screensaver GLBlur with 1 fps. With -intel 2.6.1 performance was good using the same kernel. Git bisecting led me to commit f1ed73c1ef3e3daa9f695194dcc813167cbcb53d (in 2.6 branch) "Make i830_allocate_memory take tiling parameters" as first bad commit. Using gdb I found tiling was set exactly the same in 2.6.3 as in 2.6.1, so that was good (TILE_XMAJOR for front, back and depth buffers). Looking further I found the line mem->tiling = TILE_NONE; (line 961 in src/i830_memory.c) at the end of i830_allocate_memory suspicious, as mem->tiling now already gets set via i830_allocate_aperture and some buffers do have tiling. Removing that line indeed fixed the performance issue. Now sauerbraten runs with 30+ fps and GLBlur runs smoothly. commit 51cf8a453c2bc2e8604bfc41a649e971c1ba5026 Author: Jesse Barnes Date: Mon Mar 30 11:27:56 2009 -0700 Require libdrm 2.4.6 for GTT unmap support Need the new functions available. commit 8dabcc40747bfd478f296728741240241698f165 Author: Jesse Barnes Date: Mon Mar 30 09:53:40 2009 -0700 Tiling fixes, third set Hopefully this concludes the fixes necessary to deal with the various combinations of kernel and user level tiling. We have several cases to handle: 1) KMS (kernel handles all tiling) 2) UMS w/memory management + kexec fencing (kernel handles all tiling) 3) UMS w/memory mangement but no kexec fencing (userland handles tiling) 4) UMS w/o memory management (userland handles tiling) For cases (1) & (2) we can use GTT mapping, which will give us good performance and take care of allocating fence registers as needed. It's important *not* to have userland set up fence regs in this case, since the kernel will be using all of them. For case (3), we use the begin/end GTT map functions provided by libdrm, in combination with pinning and fence register setup in i830_memory.c to deal with tiled surfaces. This also gives us good performance and correctness. For case (4) we use the old style virtual mapping + offset for dealing with surfaces; note that UXA doesn't seem to work in this configuration regardless of these fixes. Fixes bug #20803. Reviewed-by: Eric Anholt Signed-off-by: Jesse Barnes commit 375b2e40fcb17e94538a75392950e2533c1bb031 Author: Zhenyu Wang Date: Wed Mar 25 11:13:52 2009 +0800 Disable LVDS config parsing from VBT for now As wider tests showed that this doesn't work for all VBIOS, so disable it for now and reenable it after we get reliable method. commit defa6971c6b639ab72d9d4c85c4607d5f852b2b0 Author: Zou Nan hai Date: Thu Mar 26 15:24:29 2009 +0800 enable UV half pixel commit 69c84f2c8204771b68f40ed64e64657237b54546 Author: Zhenyu Wang Date: Thu Mar 26 13:52:05 2009 +0800 gitignore intel_lid commit fe96e517699e37cc990a14dfb48b9611a02254ed Author: Zhenyu Wang Date: Thu Mar 26 10:54:02 2009 +0800 xvmc: add missed vld g4i sources in Makefile and fix distcheck Don't miss the vld shader programs for dist. commit 91886f82a1155ca24eb895f77678ea1edfccf9fe Author: Zhenyu Wang Date: Thu Mar 26 10:51:05 2009 +0800 xvmc: move 965 mc media programs to shader/mc directory Also include some missed g4i files in Makefile.am, fix shader build. commit ebcb64fdc8a45105f529d5e15c335514ecaf1a05 Author: Zou Nan hai Date: Wed Mar 25 16:11:33 2009 +0800 XvMC VLD extension support for G4X commit e6af995b24767815ab30364385768867e80605c2 Author: Zhenyu Wang Date: Mon Mar 23 19:19:58 2009 +0800 KMS: hook up output properties for randr This gets output properties from kernel, then hook them up for randr. So we can control output properties through randr like in UMS. Signed-off-by: Zhenyu Wang commit b5b377806422c9538fa9f846819ad253c1a50846 Author: Ma, Ling Date: Wed Mar 25 14:39:46 2009 +0800 disable center mode for 965GM and G4X platform When disabling VGA mode, usually we don't need to touch VGA center mode. However because of hardware reason, for Cresline, Cantiga & Eaglelake platform, we have to disable center mode as well. The patch fixed bug- TV Out strobing regression, reported by Robert Lowery in intel-gfx@lists.freedesktop.org mailing list. Signed-off-by: Ma Ling commit 74d0713e002a9781ed00fdd10eb6f75907ae796c Author: Kalev Lember Date: Fri Mar 20 02:21:41 2009 +0200 Fix VT switch with XV overlay video enabled. drm_intel_bo_unpin() was called with NULL argument. Signed-off-by: Kalev Lember commit b345b4e6adf00f8b2626e5c2563fc159e2295cc5 Author: Rémi Cardona Date: Fri Nov 14 13:55:52 2008 +0100 clean up man page generation and remove all traces of the i810 driver The i810 compatibility symlink has been broken since libpciaccess, so just let it die. commit 48b91e066878db63a1558e4cd3e6d12ff9c49197 Author: Jesse Barnes Date: Fri Mar 20 12:33:22 2009 -0700 Don't manage fences part two Don't try to clear fences that were never installed. Missed this bit in the last fix for #20265. commit 28319d60aa2d793c209043c1ce2d38b14c66a4be Author: Zhenyu Wang Date: Fri Mar 20 13:14:15 2009 +0800 Add a lid status test program "intel_lid" commit 636d252f3b1eac687f7b11952e949c383cb86ed4 Author: Jesse Barnes Date: Thu Mar 19 13:25:29 2009 -0700 Don't install fences if the kernel is managing them If execbuffer is setting up fences, it also means that the kernel is managing them at pin time, so installing one in the 2D driver in that case is an error. The fence should stick around as long as the buffer is pinned (the kernel won't steal these), though it will be freed at leavevt and re-allocated at entervt. On 965+ chips, the pin ioctl will *not* install a fence reg, but that's also ok because all 965+ operations include tiling bits, and sw fallbacks will be protected by prepare/finish access hooks, which will either access the backing store or use the GTT, which will ensure proper fencing at fault time. Fixes #20265. Acked-by: Eric Anholt commit d92e6158c86d7da873913461ef7e828bd411d8c4 Author: Carl Worth Date: Thu Mar 19 10:06:03 2009 -0700 Revert the rest of the EXA_VERSION_MAJOR bump This was mistakenly added in the unrelated change in revision fe08b81d0f5d6f96e0124e6286bd24aba6e140ad and wasn't completely reverted in the later revision 78a60e1b66fe2e8449702dd43d9b062d279af8f1 commit 85e6b528582c2397ee9eb2132cd0d05ce12eb43d Author: Ma Ling Date: Thu Mar 19 09:10:19 2009 -0700 Set SSC frequency for 8xx chips correctly All 8xx class chips have the 66/48 split, not just 855. Fixes #18358. commit bedc894a565ce3c7a50990e3f78953fc2432ad40 Author: Jesse Barnes Date: Wed Mar 18 20:19:44 2009 -0700 Re-enable disabled outputs after rotation The server may have made a DPMS call before doing rotation, so after we do the mode set with the rotated framebuffer, we need to re-enable the corresponding output(s). Fixes bug #20573. commit 6deb26ae7bd796e88a5dd90df5f6c35fbc44e798 Author: Jesse Barnes Date: Wed Mar 18 09:36:58 2009 -0700 Create known output configuration at EnterVT time Since we added the pipe A force quirk (leaving pipe A on all the time), DPMS calls to disable it have silently returned, leaving the pipe on. If another driver (like vesafb) has enabled it, we may end up with a bad configuration, leading to hangs or blank screens at VT switch time. Fixes bug #19603. commit 7c94227dd4fa2164bebb36234958053bf1d26c12 Author: Ma Ling Date: Tue Mar 17 10:33:15 2009 +0800 Use best PLL timing values for G4X platform construct function to find precise parameters from internal spreadsheet table on G4X platform. Signed-off-by: Ma Ling commit 48db5bde9298f1126dfb42f4be8a3d61166abfd8 Author: Ma Ling Date: Tue Mar 17 10:41:02 2009 +0800 Define documented PLL timing limits for G4X platform These timings on G4X platform were specified by internal spreadsheet from the chipset group. Signed-off-by: Ma Ling commit 78a60e1b66fe2e8449702dd43d9b062d279af8f1 Author: Keith Packard Date: Mon Mar 16 08:41:52 2009 -0700 Revert EXA_DRIVER_KNOWN_MAJOR bump This was mistakenly added in the unrelated change in revision fe08b81d0f5d6f96e0124e6286bd24aba6e140ad commit 1a6e70cd98abc63f24f710819961c24601afb59b Author: Zhenyu Wang Date: Mon Mar 16 10:19:39 2009 +0800 TV: fix contrast and saturation for 945G Bug #20670. commit 4e95327323e3d081b565147f7738eb49c28542bc Author: Zhenyu Wang Date: Mon Mar 16 09:30:22 2009 +0800 TV: force TV as connected with TV_Connector option In order to bypass failure in TV load detect, TV_Connector option will always force TV as connected with user specified connector type. commit d9dbdb325543bd747cd1bfb3e1142ea6daf2b637 Author: Eric Anholt Date: Fri Mar 13 15:48:40 2009 -0700 Add shave support, enabled by default. This cuts down build system noise so that warnings are more visible. The old style output can be reenabled for build system debugging using "make V=1", or --disable-shave at configure time. commit c3a82106a1a1a94c9e1e465c7dc0d828c1cbf50d Author: Eric Anholt Date: Fri Mar 13 15:29:45 2009 -0700 Move contributed m4 (dolt) to a subdirectory so we can include it with others. commit e0aba04da0323efc079ce0a2b78139c4d0d49fa5 Author: Eric Anholt Date: Fri Mar 13 13:37:35 2009 -0700 Add DCC register dumping. commit a57814cc13f4287eccaf1906963b80c9205c680c Author: Eric Anholt Date: Fri Mar 13 13:20:35 2009 -0700 Add dumping of 915 and 945 fence registers. The debug dumper functions can now return NULL to indicate no output, so we get appropriate results on 915, 945, and 965. commit 8166a7ff5c2c1e3736dd06a8453c4e4d769d8b75 Author: Eric Anholt Date: Fri Mar 13 13:12:33 2009 -0700 Add PGETBL_CTL to the debug output. It's nice to know when it gets stomped on. commit fe08b81d0f5d6f96e0124e6286bd24aba6e140ad Author: Keith Packard Date: Mon Mar 2 07:39:41 2009 -0800 Use CopyArea to load glyphs from per-glyph pixmap to cache pixmap With glyphs sitting in per-glyph pixmaps, there's no reason to use the CPU to move them to the cache pixmap, and lots of reasons to use the accelerator. Signed-off-by: Keith Packard commit 2026c57cf0a352d9e6f9d208cfb7d4d550614477 Author: Kalev Lember Date: Fri Mar 13 21:32:08 2009 +0200 Fix Xv crash with overlay video. Bug #20585. commit 3ef9d85371a97ea5baee0c47787b3bb3cdaf5135 Author: Jesse Barnes Date: Fri Mar 13 12:21:34 2009 -0700 Use UXA when KMS is active EXA doesn't support KMS, so force UXA on if KMS is detected. And warn the user if they've specified something other than UXA in their xorg.conf. Fixes bug #20620. commit dc3ff0b514b609448025680778f0e95e1980a5d8 Author: Zhenyu Wang Date: Thu Mar 12 16:32:02 2009 +0800 Revert "SDVO: Switch control bus only before DDC access" This reverts commit ddedf19f889da2ce6d69a3afce4665e2245682fa. After i2c STOP, control bus will return back to internal registers. So this brings back to origin code that we switch to DDC bus before START. But it's ideal to only issue DDC bus switch after STOP, not before every START, which might eliminate some complains from SDVO device, that will be another patch later. commit c6b0135d209bdad3dbc641d0e264596eaf6f99d3 Author: Zhenyu Wang Date: Thu Mar 12 16:31:01 2009 +0800 SDVO: reset privates before output setup For multifunction encoder, forget to reset these values will cause wrong output type in later mode setting operations. commit 28e7f0d71fa09e15a68ab4f0de169474b6235093 Author: Dan Nicholson Date: Tue Mar 10 20:16:03 2009 -0700 Fix dist of xvmc sources The XVMC AM_CONDITIONAL is only needed around the library expression. None of the other definitons will cause anything to be built without libXvMC, but they're needed for 'make dist'. Signed-off-by: Dan Nicholson commit 73db44e7ac524e84e5f0fda2d60069a9e954ad1b Author: Kristian Høgsberg Date: Wed Mar 11 11:10:57 2009 -0400 Drop Legacy3D option, only use fixed texture space with non-gem. With this change, we always expect the 3D driver to use GEM textures when the 2D driver uses GEM. When GEM is not available or disabled, we fall back to legacy fixed textures. commit 2fcf4fcccfe7cfa1425985d21a144137eca07f4e Author: Zhenyu Wang Date: Tue Mar 10 14:21:36 2009 +0800 SDVO: fix pixel multiplier setting for TV We should use preferred input timing's clock for correct pixel multiplier setting, otherwise we might get inconsistent multiplier setting on pipe and SDVO device for some modes. commit fb6e00f40f713a87c760fc7603159ed11ea9b0d5 Author: Eric Anholt Date: Mon Mar 9 20:06:30 2009 -0700 Fix XV with non-GEM kernels by allocating a larger fake bufmgr. Ideally we'd not be using the EXA offscreen memory manager and just hand all that memory to the fake bufmgr for non-GEM, but the fake bufmgr's too slow for that, at least currently. So compromise and take enough memory that it will succeed at XV allocations but hopefully not anger tiny-aperture systems too much. Bug #20563. commit dc12c4b3eb297b2f225409eacf1f3cd521453ab6 Author: Eric Anholt Date: Sat Mar 7 23:22:54 2009 -0800 Flip the update_dri_buffers test around to only run when DRI1 is active. Fixes segfaults at startup with DRI2 and load detection, or with DRI disabled entirely. commit 646e12a9783d1d48ef21841f0909287a876731a4 Author: Xiang, Haihao Date: Mon Mar 9 10:59:36 2009 +0800 typo in intel.man commit 73aa23d9150121a4e4b70a78cab910acd164abf5 Author: Eric Anholt Date: Fri Dec 5 13:06:05 2008 -0800 DRI1: Update sarea (and other information) when CRTC configuration changes. Bug #14423. Signed-off-by: Eric Anholt commit abb213d933ac0d808fc10d4f8d88d7b8cef76346 Author: Eric Anholt Date: Fri Mar 6 14:33:46 2009 -0800 Document the UXA AccelMethod. Signed-off-by: Eric Anholt commit 568297d327cc321f1186afc54b38d08db3f2914d Author: Eric Anholt Date: Thu Jan 22 17:08:19 2009 -0800 Don't allocate the render power saving context in KMS mode. That would be the kernel's job if it chooses to do it. Signed-off-by: Eric Anholt commit 4e1144108424a4525bbd97c3d5a56de06760bdd9 Author: Eric Anholt Date: Fri Mar 6 14:30:05 2009 -0800 unused variable warning fix. Signed-off-by: Eric Anholt commit 043a76a040d4576b7a8397dca805466a99bfcdd6 Author: Eric Anholt Date: Fri Mar 6 14:29:22 2009 -0800 clean up arguments to i830_allocate_framebuffer since zaphod removal. Signed-off-by: Eric Anholt commit b23f57b310b693f56af273526383221a4f8b96f5 Author: Eric Anholt Date: Thu Jan 22 17:17:09 2009 -0800 Use REGION_EQUAL in place of a local implementation. Signed-off-by: Eric Anholt commit 6b61f9945f54df7469f2b2d702b621d4d6064c3f Author: Eric Anholt Date: Thu Jan 22 17:19:04 2009 -0800 nuke unused define. Signed-off-by: Eric Anholt commit c3a747cb54acc1b037b559313e6a2113ae2ac4c7 Author: Dan Nicholson Date: Wed Nov 26 09:57:24 2008 -0800 man: Put option defaults on separate indented line The groff .IP macro is used to put the option defaults in a new indented paragraph so they are separated from the explanations. Signed-off-by: Dan Nicholson [anholt: hand-applied due to conflicts. mistakes are my own] Signed-off-by: Eric Anholt commit d2af21a66d7e1d1dd62c6aa8fb41d3fd6045bcd7 Author: Eric Anholt Date: Fri Feb 27 23:38:00 2009 -0800 Remove configurable support for disabling XV. google shows one instance of this being used a year and a half ago. commit 755757669f0cad670cfa084d33d7c3e928d27855 Author: Eric Anholt Date: Fri Feb 27 22:57:15 2009 -0800 Remove configured SW cursor support. Any time we actually need SW cursors, it gets enabled automatically. commit 917b20ead3cacf1e88314f20edde6a02b97b96d7 Author: Eric Anholt Date: Fri Feb 27 23:01:28 2009 -0800 Remove StolenOnly support. We rely on having AGPGART present to successfully allocate video memory as we configure it by default. Admit that fact, and remove support for non-AGPGART/KMS setups. commit 73b7190421132ad73179c3fb7bb0e06c427dce5c Author: Eric Anholt Date: Fri Feb 27 22:51:22 2009 -0800 intel: Nuke shared-entity support (zaphod mode). It's been broken for years now, and KMS offers a much better chance of getting this working sensibly without making a mess of the 2D driver. commit e9d6bbbe0b41e29c58a79844decd81771da85dd4 Author: Eric Anholt Date: Tue Mar 3 16:45:03 2009 -0800 remove more page flipping leftovers. commit 1cc9b1423c5df591c615ef9588b6eefd81448f80 Author: Lukáš Hejtmánek Date: Fri Mar 6 14:44:03 2009 -0500 Fix another VT switch leak The batch_bo buffer object is reallocated on enter VT, so we need to unref it on leave vt. Signed-off-by: Lukas Hejtmanek commit 67fef27f4b76490be085d232aba0ca9cbb3c5e59 Author: Xiang, Haihao Date: Fri Mar 6 09:40:07 2009 +0800 Xv: free tearing on textured video Add an Xv attribute XV_SYNC_TO_VBLANK which has three values -1(auto), 0(off) and 1(on) to control whether textured adapter synchronizes the screen update to the vblank. The default value is -1(auto). commit 0d20bbbc2005a51f427a9ae6b6a66dbbb101dbab Author: Zhenyu Wang Date: Thu Feb 19 14:24:24 2009 +0800 SDVO: handle multifunction encoder (try 2) For SDVO encoder that advertise multiple functions, we have to get attached display to determine current output, and update output's name according with current type. commit d4c64f01b9429a8fb314e43f40d1f02bb8aab30f Author: Lukas Hejtmanek Date: Wed Mar 4 17:33:27 2009 -0500 Fix serious memory leak at Enter/LeaveVT This fixes huge memory leak at each VT switch (about 600 BOs + 6MB of RSS of Xserver). commit 095a001f755201d3c19335b67a84c57b1d080a83 Author: Kristian Høgsberg Date: Wed Mar 4 17:10:24 2009 -0500 Use drmSetMaster() and drmDropMaster() in enter/leave VT This allows multiple X server to use DRI and makes it possible to run multiple X servers under KMS. This requires a 2.6.29 kernel to work. On older kernels it will just log a warning and DRI will fail to initialize for the second X server. commit 14bb61e0c2e28725a2f6167d3263649bc845be18 Author: Zhenyu Wang Date: Mon Mar 2 16:55:45 2009 +0800 SDVO: only check digital monitor when EDID exists commit 42e34e90e2e4048b38481cab61cef46f932eada7 Author: Zhenyu Wang Date: Tue Mar 3 22:55:35 2009 +0800 TV: add property control for TV attributes This is based on Jesse's origin patch for bug #12763. But export integer range to user instead of hardware float point format, and fix different real format on 965G and 945G for contrast and saturation. commit aa9da5e393c804019720503fe58bdd247fe1eabd Author: Zhenyu Wang Date: Tue Mar 3 20:26:19 2009 +0800 TV: add option to set TV connector type This can let user override non-stable driver TV load detect, and set connector type manually, e.g for s-video to component converter, this patch seems must needed to use HD modes. commit ab1ef05cc0fd5ba9768c26cc51bc2c7b52baa45f Author: Zhenyu Wang Date: Thu Feb 19 20:23:02 2009 +0800 TV: update output and crtc modes when TV format change (try 3) This is to fix bug #16566, change TV format will cause BadMatch error when crtc config apply. Everytime when we change TV format, we may generate a new list of modelines as TV clock changed. After randr get info request, new modelines will be probed and randr output's modes will be renewed too. But crtc's mode failed to be updated, as it never can find a matching mode now within new modes list. So get info will return an invalid crtc's mode, later set crtc config will pass that info, and xserver catches a bad match. This patch trys to refresh output modes and setup crtc's mode with new modelines in TV format change. So get info would be sure to turn valid crtc mode that reference in current new modelines. commit a67a911a93ff3c0b3d2e6f6fb20c0787b9d4d41d Author: Zhenyu Wang Date: Thu Feb 19 01:00:33 2009 +0800 TV: sort input mode lines commit bd360e7517835626bee54bec968cdc78908c6545 Author: Adam Jackson Date: Mon Mar 2 10:33:35 2009 -0500 KMS: Wire up output DPMS. commit 2d0aa553609a0e64fa4b2e755b9b1e244e5c3fa1 Author: Zhenyu Wang Date: Mon Mar 2 15:26:44 2009 +0800 Skip LVDS config parsing on pre-9xx chips. 855GM laptops seems pretty broken when parsing this block. commit 55359ef9ab0a2be42a55e0279835f76a191d6c74 Author: Zhenyu Wang Date: Fri Feb 27 09:02:30 2009 +0800 Update driver feature block definition for missed fields commit 38a7683561cee7fffab174c2a166bfd51b51ba27 Author: Eric Anholt Date: Fri Feb 27 22:55:44 2009 -0800 warnings cleanup commit 5bfd73cd31ba197a62f549cdbad1a1270b571027 Author: Eric Anholt Date: Fri Feb 27 19:09:49 2009 -0800 Only allocate pixmaps aligned for tiling when requested by DRI2 GetBuffers. This saves massive quantities of memory on pre-965 since the DRI2 tiling enable caused the minimum size of any pixmap to be 1MB. commit f53bdad1412f841075232455837578f00709c6ef Author: Shaohua Li Date: Mon Feb 23 15:19:23 2009 +0800 Intel video driver patch This is the intel video driver patch for a new chip, which is G33-like and has some clocking setting related register changes. This patch adds the pci id and DPLx/FPx register changes. The gtt tool should just work to me, as the chip hasn't any changes against G33 on this side. Signed-off-by: Shaohua Li Signed-off-by: Eric Anholt commit 22dc9a5580d77cc4707bfb8e19474e611a06ae9a Author: Eric Anholt Date: Tue Feb 24 18:22:20 2009 -0800 Fix UXA for server 1.4. commit cb1f7ec0876746c1b52b63cdb508544e9e4e32e3 Author: Eric Anholt Date: Tue Feb 24 21:23:59 2009 -0800 uxa: Fix composite fallback debug printing of main memory versus bo info. It was just printing whether it was a pixmap (it is), instead of whether the pixmap was offscreen. commit 635eaa511f28fb673fe306e46ed5370e78a8a534 Author: Eric Anholt Date: Tue Feb 24 21:48:11 2009 -0800 Regard the screen pixmap as suitable for acceleration. With UXA on the fake bufmgr, the screen pixmap doesn't have a BO and so no acceleration was occurring. commit 70e0261208654c6c875ad462da2734c6aa9eeb96 Author: Eric Anholt Date: Tue Feb 24 20:54:05 2009 -0800 Disable fb resizing for DRI1-only server so that DRI1 can initialize. commit d7aa330db31100b7cb54d8165f9a4b94329ece32 Author: Eric Anholt Date: Tue Feb 24 20:34:10 2009 -0800 Fix up i915 composite and common solid/copy code to use check_aperture. This could fix complaints about binding BOs and resulting failure to render. commit a625a07022ea7f6757b288fcc2ffb9e27c7f8341 Author: Xiang, Haihao Date: Wed Feb 25 16:48:22 2009 +0800 XvMC: fix broken xvmc on 965 commit f6d8ae69b0f97e696c142f06c8038f336ed024f9 Author: Zhenyu Wang Date: Wed Feb 25 09:57:00 2009 +0800 Use LVDS config in Driver feature BDB for integrated LVDS check The LVDS config bits in VBT driver feature block is used by vendor to identify the board implement of integrated LVDS/eDP or SDVO LVDS. And video bios uses these bits for LVDS enabling or not. So check these bits for integrated LVDS might eliminate more quirks. commit 8718551f14e064b461e80a583597f0ea9fb8ca9f Author: Zhenyu Wang Date: Wed Feb 25 09:54:03 2009 +0800 Update LVDS config bits definition in driver feature block ALL_LVDS is actually not defined before and include GM45. Embedded DP bit will be used for newer chips. commit 9d8e5c21a1688b915bf39261d4c3b0bf2906daef Author: Eric Anholt Date: Tue Feb 24 14:05:15 2009 -0800 Fix distcheck from drmmode_display.h deletion. commit f4e2f522a5c5b03ea530b9eb67e9d1a9a96274ce Author: Eric Anholt Date: Sat Feb 21 20:36:58 2009 -0800 Don't do AdjustFrame in KMS mode. This was hit by xv86vm's SwitchMode path, and for that the CRTC offsets get set at mode setting time anyway. commit 170f00e161931fdaa8c2812fc710649e1d6d977a Author: Kristian Høgsberg Date: Tue Feb 24 14:07:23 2009 -0500 Remove a handful of unused variable warnings. commit a6b31f38ebf470c61de0e10b0ce2af0d7ee1684b Author: Kristian Høgsberg Date: Tue Feb 24 13:58:20 2009 -0500 Update kms to work with drmModeModeInfo API update. commit 13ee9402e9822d6f57e3ebcc5ae658ce8322118e Author: Adam Jackson Date: Mon Feb 23 15:44:26 2009 -0500 Limit CRT DAC speed better. Verified against the public docs for i8xx parts, although not 9xx yet. commit 668b2352a47bcfba75fe0492a5805726222755eb Author: Keith Packard Date: Mon Feb 23 13:31:51 2009 -0800 Revert "Limit CRT DAC speed better." This reverts commit 8fd0e46571c7ba15c05f0a759113f8ca842c76a2. This doesn't even build. Please try again. commit 8fd0e46571c7ba15c05f0a759113f8ca842c76a2 Author: Adam Jackson Date: Mon Feb 23 15:44:26 2009 -0500 Limit CRT DAC speed better. Verified against the public docs for i8xx parts, although not 9xx yet. commit 73bc7f113969834d00cd92be8374dbadc62f96a9 Author: Kristian Høgsberg Date: Mon Feb 23 15:16:51 2009 -0500 KMS: Fix bug that prevented EDID data from getting propagated. commit ef952760551ad15cb9f63025d1e087645949a227 Author: Kristian Høgsberg Date: Sun Feb 15 22:10:42 2009 -0500 Use stat() and the dev_t to find the drm device filename. Simpler and more robust. Works when we haven't set the device PCI ID, ie when not going through the legacy DRI module. commit 81c652e9a666a7459bcc5217c8a5ec518b6e00da Author: Helge Bahmann Date: Sat Feb 21 10:10:04 2009 -0800 Move disable_render_standby to EnterVT instead of startup. Otherwise, with a pre-2.6.28 older kernel the disable would be lost at resume time and cause hangs. Bug #20214 commit 0621ba12a3b694720e67a49b25ca52f0e09b3802 Author: Eric Anholt Date: Wed Feb 18 13:32:44 2009 -0800 uxa: Ask for BOs ready for rendering for pixmaps. The assumption is that we're almost always accelerating our drawing to new pixmaps (fill, copy, etc.). commit 5018d0f16cb8b44c743b5b37d194fe806d955568 Author: Kristian Høgsberg Date: Fri Feb 20 15:34:29 2009 -0500 KMS: Hook up rotated shadow buffers. commit beca598bc2848093b710bd47828d622205d273df Author: Kristian Høgsberg Date: Fri Feb 20 11:08:51 2009 -0500 Access the Xv buffer through the GTT for the non-KMS case. commit e97e2571703e3d6188bf18f211b793fc50383f9c Author: Kristian Høgsberg Date: Thu Feb 19 16:41:49 2009 -0500 Fix i915 textured video to work with the i830_memory -> bo change. Forgot to update i915_video.c in 872aadc7102bd5131e1582ede081e22672911ba2. commit 96da26b6813a8c1da8a43036c375aa0d2bb70f16 Author: Kristian Høgsberg Date: Thu Feb 19 16:40:19 2009 -0500 Dont allocate overlay registers in KMS mode. commit 872aadc7102bd5131e1582ede081e22672911ba2 Author: Kristian Høgsberg Date: Wed Feb 18 17:26:06 2009 -0500 Make Xv used a buffer object instead of i830_memory. We still pin the buffer object in case of overlay, but for textured video we're now no longer using i830_memory for Xv anymore. commit 527e8177cde3abbabbcdccee0dbc0dcc0068a1be Author: Zhenyu Wang Date: Wed Feb 18 11:26:58 2009 +0800 bios_reader: parse driver feature BDB commit 62ca1c479825ffa0e9cf444b4e25080150faa45b Author: Zhenyu Wang Date: Wed Feb 18 10:49:00 2009 +0800 Fix SDVO mulitiplier setting for 945G Wrong SDVO multiplier setup has been slipped in SDVO TV patch. Thanks Michael Fu to point this out! commit 723b6065093adb56a2d7204bd990ceae41bfafc9 Author: Kristian Høgsberg Date: Tue Feb 17 13:48:04 2009 -0500 KMS: Hook up crtc::gamma_set. commit 506bbb8341c052499057834a669b82787454b426 Author: Zhenyu Wang Date: Mon Feb 16 14:09:49 2009 +0800 Safely init SDVO found variable Found by Michael Fu for my last SDVO detect fix. commit 9d464bd5b0d2724f5edb26e859888ceb6a248f9b Author: Zhenyu Wang Date: Fri Feb 13 11:15:48 2009 +0800 Fix SDVO/HDMI detect SDVOC detect bit is only valid for HDMIC. And for SDVO devices, SDVOB detect bit should be used to probe all possible SDVO outputs. commit 48445d2e939328495b4abe0fb7e579dfcef727bb Author: Zhenyu Wang Date: Fri Feb 13 11:11:18 2009 +0800 SDVO: remove ForceSDVODetect option Which is just a hack to hide our SDVO detect drawback, we will have SDVO/HDMI detect fix later. commit ddedf19f889da2ce6d69a3afce4665e2245682fa Author: Zhenyu Wang Date: Fri Feb 13 10:09:42 2009 +0800 SDVO: Switch control bus only before DDC access Instead of set control bus switch before every i2c start, just set once before doing DDC. This should eliminate some encoders returning error during that. commit f1ca56e17d0ecd4f1299061a6b3272bfd289e123 Author: Zhenyu Wang Date: Fri Feb 13 10:02:02 2009 +0800 SDVO: Fix TV support As SDVO TV uses SDVO_TVClkIn from SDVO encoder for clock reference, it needs to generate proper PLL for current input clock. This uses fixed PLL table from vbios for this. And possible sdvo mulitiplier has to be setup correctly. This makes TV output stable on my 945GCLF2 board with NTSC-M format. commit acde0ef683d6ec33d0b478923ffb11bd6785798f Author: Zhenyu Wang Date: Fri Feb 13 09:53:57 2009 +0800 SDVO: fix CREATE_PREFERRED_INPUT_TIMING command commit 824b2f0c5530c3196901c961757e6677b042caf3 Author: Zhenyu Wang Date: Fri Feb 13 09:50:45 2009 +0800 SDVO: fix usage for SET_TV_FORMAT and GET_SDTV_RESOLUTION_SUPPORT command They both needs parameters. commit 62c0c2f5549a51c5df209f7353a19ca301f221be Author: Zhenyu Wang Date: Fri Feb 13 09:48:34 2009 +0800 SDVO: fix error in modeline and DTD convert commit 37c67088a887e6380571e6eec8a8f058e3e24717 Author: Zhenyu Wang Date: Wed Feb 11 15:15:27 2009 +0800 SDVO: check EDID info for DVI-I For SDVO DVI-I, check EDID info for digital output, otherwise mark it to be disconnected as analog output is driven by VGA then. commit 38079bc0f1038da77048bbf6e5c10758f9fb8a55 Author: Zhenyu Wang Date: Wed Feb 11 14:41:58 2009 +0800 SDVO: Fix for HDMI encode and audio setup (try 5) SDVO HDMI encode and audio is not setup in detect, which fails in hotplug case for HDMI audio. Fix to check current encode type and set flag for HDMI audio enabling. Check and set HDMI encode state in get_modes. commit 3012d85cc5eb58c2447e93c05c39dc14feaae988 Author: Eric Anholt Date: Tue Feb 10 18:47:28 2009 -0800 uxa: Fix breakage from UXA_FALLBACK conversion from "do {} while (0)" construct. Thanks to keithp for post-commit review. commit 5009127de7d9527ae329d1c2fbc7283648bde2e6 Author: Eric Anholt Date: Tue Feb 10 18:23:35 2009 -0800 uxa: Fix driver against fbDoCopy -> miDoCopy change in the server. commit b53977f4c53c7c8f562f909e985b8d5a7b2526f3 Author: Eric Anholt Date: Tue Feb 10 18:22:46 2009 -0800 uxa: Fix failure to --amend in further changes in previous commit. commit 5212ec6515c6562f66b86fc16928b601bf04e49b Author: Eric Anholt Date: Tue Feb 10 15:35:20 2009 -0800 uxa: hook up the fallback debug to the driver's fallback debug option. commit 3aa8591abfbe8db0f13912910c850fdd748808df Author: Ma Ling Date: Fri Feb 6 09:14:15 2009 +0800 Don't disable vga centering bit. commit id b9f5915ce812144ffd9d2aa42e8ba856129c35e, which resolved bug #17235, but generate new regression-bug #19715. This patch intends to resolve bug #17235, and avoid regression as well. We have successfully re-tested it for bug #17235 and #19715 respectively. commit 9fe5fca3fe761a4f11857d9766138a60f471a9e6 Author: Zhenyu Wang Date: Wed Feb 4 06:00:39 2009 +0800 TV quirk for HP Compaq nx6310 commit 5c370091620b38447172ebeffbc6ed3256e86c9d Author: Kristian Høgsberg Date: Mon Feb 2 12:02:00 2009 -0500 Fix front buffer memset() for non-KMS case. Missed the pI830->FbBase condition when removing the KMS hook. commit 2013799b20599a58de48cb21a5a389e898a58af1 Author: Kristian Høgsberg Date: Mon Feb 2 11:51:47 2009 -0500 Un-revert the I915_SETPARAM_NUM_USED_FENCES commit reverted by accident. Oops, my bad. Reverted 8d4bc36fae50b09a73ba2cfab920adb32141a358 since my kernel doesn't yet have the new param, committed the revert by accident. commit 127330bfd53ac7571bdd12a551142528b972893f Author: Kristian Høgsberg Date: Mon Feb 2 11:02:59 2009 -0500 Fix last-minute "cleanup" that broke the patch. commit 0cb87ccfe97b0e016e47dcf236fd5ce78dddfc4b Author: Kristian Høgsberg Date: Fri Jan 30 17:53:03 2009 -0500 Implement front buffer resize for KMS. This adds back the resize hook so we can resize the front buffer under kernel mode setting as well. The patch also pulls the drmmode_* structs from drmmode_display.h into drmmode_display.c and eliminates the header file. commit 66bc44e8f9a0505c0b11b8042243ca74079da85f Author: Eric Anholt Date: Tue Jan 27 15:43:58 2009 -0800 dri2: Use modesetting's master fd instead of opening our own non-master. This fixes failure to auth DRI2 clients under KMS. commit 8d4bc36fae50b09a73ba2cfab920adb32141a358 Author: Jesse Barnes Date: Mon Jan 26 17:14:06 2009 -0800 Support tiled back/depth on 915-class hardware with DRI2. Set alignments, tile settings and flags correctly in the 2D driver to support tiled rendering. UXA's create pixmap function currently assumes the worst about the alignment constraints; that should probably be fixed. Some of the 1M alignment fixes could probably be done more cleanly as well. commit 6c0ca1676bf60529dd331cc739abdf68fa9e918d Author: Eric Anholt Date: Wed Jan 21 15:52:02 2009 -0800 Don't forget the new state bos in check_aperture. They're tiny so it shouldn't have been a problem, but play it safe. This is another <5% loss on top of the previously reported value, bringing the whole series to about 8%. commit 57a02b50c60c10a25ff0f3cd93af9f37fa0d1b11 Author: Jesse Barnes Date: Mon Jan 26 14:58:28 2009 -0800 Fixup bogus VBT modes when detected Several VBT modes out in the wild have H or VSyncEnd values greater than the H or VTotal value. This clearly ends up creating a bad mode, causing some panels to either ignore the timing or display some sort of corrupt image. Check for these cases and fix them up by default, making things work for several Dell and Sony machines. Fixes FDO bug #17292. commit e20e1cf76fb00ba4f933a1ed6d1a4896be346c91 Author: Bill Nottingham Date: Sat Jan 24 08:36:20 2009 +0800 Quirk MSI IM-945GSE-A LVDS, TV outputs. The IM-945GSE-A claims to have a TV output, and always claims a connected LVDS output. It has neither. commit 05ff561234cc2b93fe1ea2a35041fa2e119a7e38 Author: Vincent Mussard Date: Sat Jan 24 08:33:16 2009 +0800 quirk for AOpen MP45 commit fbf003ef2767a1a9f5e4064f04a17992030d8f5c Author: Eric Anholt Date: Fri Dec 5 17:27:13 2008 -0800 Move i965 render sampler state to BOs. This eliminates the pinned memory allocation for 965 render state. commit befd4ad8beae39377f804e06c7cbd926ec4251db Author: Eric Anholt Date: Tue Jan 20 14:43:08 2009 -0800 Move i965 render kernels to BOs. commit 5d705de5d11297f4d6bd5237fb67619e703745bc Author: Eric Anholt Date: Fri Dec 5 15:30:35 2008 -0800 Move 965 render unit state to BOs. This is a first step in a series of changes to avoid requiring a pinned object, which gets in the way of doing non-root KMS. This change appears to result in about a 2-6% loss in x11perf -aa10text, which better algorithms in libdrm could make up for (it hasn't really had to deal with code this bad before). commit 64b08ed5ad46ccd76964972e39bfed8721a920aa Author: Eric Anholt Date: Tue Jan 20 17:13:52 2009 -0800 Remove 965 render wm scratch space, which was just unused. commit f126aabdf8952177bb15f392041da7a7094eb31b Author: Eric Anholt Date: Wed Jan 21 12:52:36 2009 -0800 Fix build with server 1.4. Debian "unstable" is still stuck with this ancient version. commit 253b8db298f38676e47dc902534465054f7b58b8 Author: Jesse Barnes Date: Wed Jan 21 09:02:13 2009 -0800 Don't run in KD_TEXT mode even with KMS Leaving the VT in KD_TEXT mode keeps the kernel's blanking code active, so when a DPMS event happens, the fb console is restored rather than X's configuration. On the downside it means the kernel won't print messages in the background, which would be visible if a panic or emergency switch occurred. The proper fix here is a new kernel mode, which we can move to when ready. commit 131b414feb2ecabe31b538d65725ac4427a4387a Author: Jesse Barnes Date: Wed Jan 21 09:01:05 2009 -0800 Tear down batchbuffers unconditionally on LeaveVT Even if KMS is enabled we should do this, to avoid running batches that depend on other state we tear down in LeaveVT. commit b6f3ce32e295929f461a7bc37e61f126fb51e4aa Author: Eric Anholt Date: Tue Jan 20 10:45:23 2009 -0800 Use drm_intel_bo_subdata to put render vb data in. This improves performance by avoiding repeated map/unmap cycles, which are a bit expensive on my machine with lock debugging on in the kernel. It could do much better if we did more than 18 or so floats at a time. commit 9a8bbb1951ad0ca0a9407a97348fc7fa03127900 Author: Eric Anholt Date: Mon Jan 19 19:34:50 2009 -0800 Move i965 render vb setup to use time, and decouple state emit from it. The require_space had failed since it only checked for the space required by the batch emits in the function itself, but not in the i965_emit_composite_state() that it called (the state we were concerned about having set up for that 12 * 4 dwords to follow!). This is replaced by intel_batch_start_atomic(), which will catch such mistakes in the future. commit 3d739597c4f5817079efd9067ad5db2f4105f765 Author: Eric Anholt Date: Tue Jan 20 10:37:20 2009 -0800 Move i965 render transform setup from emit_composite_state to prepare_composite. commit e20f7278f3abb44a3a151ac91f83c45cf1a2745a Author: Eric Anholt Date: Mon Jan 19 20:31:31 2009 -0800 i965: Pull check_aperture out to a separate function and make it dtrt. Previously it wouldn't count the pixmaps that were about to be used, which is pretty much the only purpose of having the pain around. This also eliminates the check_twice confusion with emit_batch_header_for_composite(). commit 013e2adfbf955cb21450b610091542ebd54392c2 Author: Eric Anholt Date: Mon Jan 19 20:24:20 2009 -0800 Move filter computation from emit_batch_header to prepare_composite. commit a340fe5e4227ebea5493e658eb6289624b07ab0b Author: Eric Anholt Date: Mon Jan 19 19:11:41 2009 -0800 Use intel_emit_reloc from video to prettify 965 render bind_bo setup. commit aefe198ca427a5ad69717f49948eb3ede713bb28 Author: Eric Anholt Date: Mon Jan 19 18:57:01 2009 -0800 Move i965 render state bo setup back to prepare_composite. We want the objects to be created once per prepare/done both for efficiency and so we can handle aperture checking better. commit 946c7ef8170e74ac178c83b1465242d57fa86f2e Author: Eric Anholt Date: Mon Jan 19 14:43:20 2009 -0800 Do check_aperture_space and batch_start_atomic for i965 video. This increases the overhead for video in the presence of cliprects, but we were already doing nasty things in that case and don't seem to care. This could fix potential bad rendering or hangs with video, particularly with DRI2. commit 7be668179a12918918cad863f6936ced4ab78dbf Author: Eric Anholt Date: Mon Jan 19 14:29:25 2009 -0800 Move 965 video setup to a separate function so we can move it around. commit c7db3201106f07f3228c989014d6db5ace5378f6 Author: Owain G. Ainsworth Date: Tue Jan 13 18:46:41 2009 +0000 Remove the pageflipping infrastructure. It was broken on current kernels, and deprecated anyway. commit c82adfd0169317efb6c2f9de0f315651f9adbae1 Author: Owain G. Ainsworth Date: Tue Jan 13 17:09:00 2009 +0000 Remove triple-buffering support It never worked with any upstream linux kernel, and is quite heavily deprecated. A new solution based around DRI2 will probably be forthcoming. Pageflipping itself is next. commit ada44c1c0edcd3ea9e41ed6b6fdb2bf0e87c9c67 Author: Kshitij Kulshreshtha Date: Tue Jan 20 11:35:36 2009 +0800 Support sysfs backlight control for Sony laptops in xf86-video-intel The sony_laptop kernel module (since v2.6.23) supports backlight control via the sysfs interface: /sys/class/backlight/sony This patch will enable xf86-video-intel to use this backlight control method for Sony VAIO Laptops with Intel integrated video. commit d89de6d60a86105a198d904821853e6ed7de3305 Author: Eric Anholt Date: Fri Jan 16 16:59:17 2009 -0800 Protect i915 textured video against batchbuffer wrapping. commit 15780c53f5717936ea10ac87aff8a881c172f1dc Author: Eric Anholt Date: Sat Jan 17 16:23:38 2009 -0800 Fix i915 batch_start_atomic counting. commit fc46cb6403387215d13aa28d720f205688ae9d67 Author: Eric Anholt Date: Sat Jan 17 12:47:53 2009 -0800 Fix libdrm version number requirement regression that got spammed in. commit 1459f794e2a4b9032807c3794b00a33fa6392837 Author: Dave Airlie Date: Sat Jan 17 22:14:26 2009 +1000 intel: fix DRI2 should be DRI_DRI2 commit db43b7870a37ea273941302096a6f00120dfae71 Author: Eric Anholt Date: Thu Jan 15 19:05:52 2009 -0800 Re-emit i915 composite setup when the batchbuffer wraps. This also introduces tests to make sure that we asked for enough reserved space and that we don't allow wrapping at the wrong time. This fixes a hang during text rendering with DRI2 and a GL client running, but could potentially affect text rendering with GEM in general with an exceptional batchbuffer setup. commit cab5b7a7b0e17414f98b2363b0961c87f32f9c05 Author: Eric Anholt Date: Thu Jan 15 09:31:55 2009 -0800 Fix invarient state emits for DRI2 (do it per batch, since there's no lock). commit 9f306193c4b128ec72c5b4db16d07302cee50ab5 Author: Owain G. Ainsworth Date: Tue Jan 13 18:42:44 2009 +0000 Fix ioctl type. I915_EMIT_IRQ is a read/write ioctl, not a write only. Found by OpenBSd's kernel code which checks these things a long more strongly than Linux. commit 1e8588ad5087c69eb77399cfaab8e4ec15eb4da9 Author: Owain G. Ainsworth Date: Tue Jan 13 17:02:59 2009 +0000 use ifdef __linux__ where needed. since modesetting is compiled by default now, ifdef __linux__ the linux only includes and ioctls. commit db9f5915ce812144ffd9d2aa42e8ba856129c35e Author: Ma Ling Date: Wed Jan 14 14:46:52 2009 +0800 Disable VGA plane reliably This fixes #17235, VGA random hang on recent G45/43 board. From spec, SR01 bit 5 should be set before VGA plane disable through control register, otherwise we might get random crash and lockups. commit a4b023c17b9c3bd65fb9466ddb8a953f60244402 Author: Keith Packard Date: Tue Jan 13 20:01:49 2009 -0800 Assign rotation memory dri_bo to rotation pixmap. As the rotation memory and rotation pixmap are allocated separately (to make rotation at startup work), the allocate dri_bo needs to be set in the pixmap for acceleration to work. This restores the performance in rotated modes. Signed-off-by: Keith Packard commit f659cc37e61364a408355b9a6a44d39f4d759935 Author: Jesse Barnes Date: Tue Jan 13 16:49:41 2009 -0800 bios_reader: make mode timing output friendlier Print out the calculated mode line values (as i830_bios.c uses) and check for validity against known problems. commit c80f1a9c5131721eaf87d12a7a67e603cdfed63b Author: Bernhard Rosenkraenzer Date: Tue Jan 13 10:35:19 2009 -0800 UXA: Declare glyph cache picture as component-alpha when necessary. Without this, rendering component-alpha glyphs may break without a mask. Bug #19534. Ported from fix by Michel Dänzer in xserver commit 639f289dcdbe00a516820f573c01a8339e120ed4 commit 3d206f9e46b5237bda7ca3c0f92d64c45ee8bdf5 Author: Ma Ling Date: Tue Jan 13 10:26:40 2009 +0800 set continuous-frequency flag in get modes function http://bugs.freedesktop.org/show_bug.cgi?id=19247 Because latest xorg will check whether the display is continuous frequency through one flag in monitor info structure, if not it doesn't touch default modes. When laptop failed to fetch edid, We don't set the flag. In i830_lvds.c, so currently we can not get default modes except only one mode line from bios. In order to achieve default modes from xserver successfully,I set the flag and other EDID features. commit 3354e660b0744976871683ce226f17e873f26b50 Author: Keith Packard Date: Wed Nov 26 16:32:12 2008 +0800 Fix LVDS EDID to match all possible default modes If the EDID data from the LVDS doesn't indicate support for a wide range of continuous frequencies, it will not match any of the default modes although our LVDS scaler logic ignores refresh rates when programming LVDS modes. Fix this by smashing the compute EDID data to open up the sync rates. Signed-off-by: Keith Packard commit f1e9ca4e4fb3ddb083252aea79c67c5e5e71f29c Author: Alan Coopersmith Date: Fri Jan 9 16:30:15 2009 -0800 Remove xorgconfig & xorgcfg from See Also list in man page commit 91c49067abab262edce54d33af8bfc03eee20f2e Author: Ian Romanick Date: Wed Jan 7 21:45:54 2009 -0800 Prevent redefinitions of CARD8 and friends. Fixes build. commit 934008a2cbcec0c790580750c672c0367a9e4c55 Author: Eric Anholt Date: Tue Jan 6 10:55:59 2009 -0800 Always enable KMS if server's new enough, and remove option. The API should be stable at this point, and we don't want to allow mistakes. commit 342120be0956bfc12822d1ffbfbd8aaabf3e922f Author: Eric Anholt Date: Mon Jan 5 23:21:07 2009 -0800 Fix pin leakage with EXA GTT-mapping shortcut, and crash with UXA on KMS. commit 9a5082d2920c1a212fe935b5a093013e8035c321 Author: Eric Anholt Date: Mon Jan 5 23:28:50 2009 -0800 Disable DRI2 buffer tiling on non-965, as those need fence regs for 2D blits. This fixes glReadPixels failure on single-channel 915GM, as the software code for readpixels was actually the only code in the driver doing tiling against these buffers (everything else says "rely on fence registers", since the 2D blits don't have a "don't rely on fence registers" option). commit 7736b65be4fb4d5c59d7aedb1e64da976bb10ae9 Author: Keith Packard Date: Mon Dec 15 15:49:01 2008 -0800 FatalError on batchbuffer map failure Yes, it would be nice to do something other than crash here. Signed-off-by: Keith Packard commit 632f816c72cb4b48b690fd92d1cc1d5a9c9285c7 Author: Keith Packard Date: Mon Dec 15 15:43:34 2008 -0800 uxa: handle uxa_prepare_access failure uxa_prepare_access may fail to map the pixmap into user space. Recover from this without crashing. Signed-off-by: Keith Packard commit 90b28a56553d809374fa6d9b9529b7a8b583488c Author: Keith Packard Date: Mon Dec 15 15:41:28 2008 -0800 Handle drm_bo_map failure in 965 video and composite paths. These two paths allocate a number of objects directly. Signed-off-by: Keith Packard commit 8237faf8f3ca73ecdf0ef009a7d361b318726f6f Author: Keith Packard Date: Mon Dec 15 15:35:35 2008 -0800 Resize framebuffer on screen size change (requires UXA and DRI2) Signed-off-by: Keith Packard commit 21bd4e8974e4c0e83f5f95adb0fc17290444caf5 Author: Keith Packard Date: Mon Dec 15 15:19:00 2008 -0800 Make i830_allocate_memory take tiling parameters. This eliminates the separate i830_allocate_memory_tiled function which means that all memory objects will have tiling parameters set correctly. Signed-off-by: Keith Packard commit 1f61e97904dfe5f8c08bb9f284cfdfe878f7e541 Author: Zhenyu Wang Date: Wed Dec 31 22:56:57 2008 +0800 UXA: Fallback to dri_bo_map() if pin failed This fixes VT switch issue with UXA after Eric's aae4008096399a0e84abc7c016b35092caf9db25 on 2D side. commit 830bf916724afd21b7947f797c22a8c8aab7a0a4 Author: Eric Anholt Date: Mon Dec 29 13:42:44 2008 -0800 Don't touch the pipestat regs for detecting FIFO underrun. The kernel owns them. Since we don't perform any synchronization with the kernel on these regs, we could race with the kernel to write stale values and end up not having vblank interrupts enabled when somebody was waiting on one. commit d96f774d1bb39640486c72338fe8b19ee1ceaa23 Author: Eric Anholt Date: Mon Dec 29 13:57:24 2008 -0800 warning fix. commit 59b0fbb9be880d489374b141f818948a2721a2ef Author: Henry unbongo Date: Mon Dec 29 13:54:38 2008 -0800 Add support for SDVO LVDS. commit 750d8e105831718d4a44a145fdb87571fa9f9d8e Author: Eric Anholt Date: Mon Dec 29 12:44:26 2008 -0800 Fix compile failure after 45f45c73469f1bd46a1b6fb206f2e9e5e4fd66b3 commit 45f45c73469f1bd46a1b6fb206f2e9e5e4fd66b3 Author: Eric Anholt Date: Mon Dec 29 11:26:11 2008 -0800 Remove logical context setup. This should be a noop. If it wasn't a noop, it means that on pre-g33 chipsets we were spamming some data into a page of system memory because we used a virtual instead of a physical address. It was also supposed to not work when we submit it from a batchbuffer, as we have been doing for some time now. This code has existed since about the beginning of the driver's existence, with no justification. commit 3544bbe22d8cf2640289e1e4febe755a47f26631 Author: Eric Anholt Date: Mon Dec 29 10:41:02 2008 -0800 Add PCI write posting to LeaveVT path when we're about to wait on write results. commit 7b67914b23b54d4d9566190440a3430e40615aa8 Author: Eric Anholt Date: Fri Mar 28 15:51:50 2008 -0700 Add SDVO LVDS register definitions. commit 8464fc285d7b22fd45b7af616fd52aa15e16638a Author: Eric Anholt Date: Mon Dec 29 09:51:45 2008 -0800 Rely on libdrm 2.4.3 and stop checking for xf86drmMode.h. commit c1dde7ac06ce6470c74198b2560ee67d28fb0aea Author: Eric Anholt Date: Mon Dec 22 16:49:57 2008 -0800 Remove old mergedfb includes and defines, which bother spatch. commit 75799d2834be84b016391ec95b221df32380e3e7 Author: Zhenyu Wang Date: Tue Dec 30 00:55:30 2008 +0800 Bug #18004: Add Aopen 915GM LVDS quirk commit cfaaf6af777ad8e56da5a077bdc01f4f2d7bc4d6 Author: Zhenyu Wang Date: Mon Dec 29 21:17:44 2008 +0800 Don't count vertex buffer in second aperture size check With batch flush notify vertex buffer will be unreferenced, so don't count it in later aperture check. Also adding uninitialized vertex buffer check in batch flush notify. commit b710a688a7383df320f9d4e765b48331310a4d1d Author: Dave Airlie Date: Mon Dec 29 12:50:25 2008 +1000 intel/kms: disable overlay when it needs physical address We can't do phy address allocations, need kernel support for this. Signed-off-by: Dave Airlie commit 649374b88b330838133d78be1953ce8b18ddd2c6 Author: Dave Airlie Date: Mon Dec 29 12:48:11 2008 +1000 intel: don't call enter/leave VT for KMS enabled systems Signed-off-by: Dave Airlie commit 408f7139354a942f29334795b5480a0b6bb6142a Author: Dave Airlie Date: Mon Dec 29 12:47:30 2008 +1000 exa: fix map gtt call to use current API commit fcd280b730f86ea54ecd89d3e037e71f8375b5f5 Author: Zhenyu Wang Date: Mon Dec 29 10:05:17 2008 +0800 Bug #19239: Add a quirk for broken ACPI lid state For broken hardware/bios with incorrect ACPI LID state, there's machine that can not be fixed in ACPI way, customed DSDT that reprogram _LID method to read EC state. Although this is ACPI issue, this quirk can be used to work around that. commit 6b9f421b792c701e909d81ae2b6e6a47fb069b0b Author: Dave Airlie Date: Mon Dec 29 11:51:58 2008 +1000 modeset: transformPresent is a new API member commit a320541e51818833a6a445707835fbf70e9babd4 Author: Dave Airlie Date: Mon Dec 29 11:34:51 2008 +1000 modeset: fix xf86CrtcRotate API change across server versions commit e38fd84fcccc18284b649a60b4cfd8e24eaf059d Author: Ma Ling Date: Mon Dec 22 10:35:52 2008 +0800 SDVO: reset pixel repeat in avi frame For #19115, the root cause is avi_if.u.avi.PR in i830_sdvo_set_avi_infoframe() belongs to element for interlaced mode based on CEA_861B, but currently we don't support interlaced mode. So it should be set as 0. commit d8e89b26ef5ef2c15e5d34162b14d279a7f0bb1c Author: Zou Nan hai Date: Fri Dec 19 09:34:14 2008 +0800 [965-xvmc] remove the vblank wait code, drm not support mutlple client to wait on vblank now. commit aae4008096399a0e84abc7c016b35092caf9db25 Author: Eric Anholt Date: Wed Dec 17 14:25:22 2008 -0800 uxa: Do a hack to use the aperture mapping instead of bo_map in sw fallbacks. Because of how fallbacky the uxa rendering core is, and our inability (without wfb in userland or page faulting in the kernel) to tell the kernel just where we're going to fall back, the clflush overhead can become outrageous, for example with emacs and xcompmgr. Instead of using drm_intel_bo_map, pin the buffer and do the fallback to the aperture mapping. This gets us the bad old performance that fb is designed for, instead of bad new performance. commit 74bc420940de4ed02705211ddebbc4033c032242 Author: Peter Alfredsen Date: Fri Dec 19 08:10:06 2008 +0800 xvmc: fix up needed libs commit 555eea5411cf8c725df5f1b4cb80198fa6a1225b Author: Zou Nan hai Date: Wed Dec 17 13:55:07 2008 +0800 wait vblank before render to fix tearing commit ed267072db7c58ee16a458fd3dc24ce3a2d0061d Author: Robert Noland Date: Wed Dec 17 09:27:30 2008 +0800 Fix drmOpen for non-linux 965 XvMC drmOpen by name only works on linux after falling back to groping around in /proc. This doesn't work on other OS. Signed-off-by: Robert Noland commit ecdd706873c1f990f4a78fbaecf7380411edabcd Author: Eric Anholt Date: Sun Dec 14 16:09:25 2008 -0800 uxa: Correctly prepare/finishaccess of stipple in ValidateGC (and only it) This avoids prepare/finish_access_gc overhead when we're not changing things (since GCTile is already handled) and get us the RW flag for the prepare on of the stipple pixmap so thing will be synced correctly. commit e6479f96e5d8da39fcbb5376c4a66a1f924ec4e4 Author: Kristian Høgsberg Date: Mon Dec 15 14:54:20 2008 -0500 Quiet some KMS warnings. commit 30fb0ef53e19b759715f1ee14b81b11c81d79045 Author: Zhenyu Wang Date: Tue Dec 16 00:39:45 2008 +0800 Revert " [965 xvmc] update dual prime g4b files" This reverts commit ea2b6b405e4c8b1bfb4bc568d0453a39a9194a8f. Duplicate with Keith's commit. No idea what's diff target of this one. commit ea2b6b405e4c8b1bfb4bc568d0453a39a9194a8f Author: Zou Nan hai Date: Mon Dec 15 09:19:43 2008 +0800 [965 xvmc] update dual prime g4b files commit d917583c19e2eb20a559eddaa100ce71d8fbe48c Author: Pierre Willenbrock Date: Mon Dec 15 09:08:30 2008 +0800 closedir only after finishing use of any results from readdir commit 865735d8408ee6b75be8fb1a8ab32b2a53dd3adb Author: Keith Packard Date: Fri Dec 12 11:07:20 2008 -0800 Dump out fence registers by default, add fence end registers as well In debugging the frame buffer resize code, I needed to see what the server was doing to the fence registers, so I added this debug code. Seems useful enough to include it. Signed-off-by: Keith Packard commit f3e59e59b54696667b127c82327e16b14d7bab22 Author: Zou Nan hai Date: Fri Dec 12 11:18:25 2008 -0800 Update binary versions of the dual-prime kernels Signed-off-by: Keith Packard commit 80d588e9c49719ec494e705edfc14c78908bbc3f Author: Zhenyu Wang Date: Fri Dec 12 18:27:29 2008 +0800 Don't warn on ring enabled in GEM commit 60c4ee9ece8ea57e61b1590dfeb69d08555e465c Author: Zhenyu Wang Date: Fri Dec 12 18:00:09 2008 +0800 Fix directRenderingType check Don't miss classic texture memory allocation in DRI. commit edf765155497d89ecac328a5b268ecf60e2f377c Author: Zou Nan hai Date: Thu Dec 11 15:41:59 2008 +0800 [965-xvmc] fix dual prime kernel, flush issue on G4x commit 80e2d90139dd99f50beb4f9353599608624b777d Author: Zhenyu Wang Date: Thu Dec 11 13:45:17 2008 +0800 Let lid status be unknown if no acpi lid object found commit 83377b543defdca7226d7c1a7794e4ff3d8b4c84 Author: Bryce Harrington Date: Thu Dec 11 09:38:27 2008 +0800 Pipe-A quirk for HP 2730p (bug #18852) commit 6c4e134a1a30785c2e5c6d57b21fde54a2dd3413 Author: Bryce Harrington Date: Thu Dec 11 09:34:15 2008 +0800 PipeA quirk for Quanta/W251U (launchpad bug #244242) commit 1e974ff6b8446ecd64677b3c9aba60ca850923cc Author: Zhenyu Wang Date: Wed Dec 10 10:54:31 2008 +0800 Try to always probe SDVOC on 965G/965GM Detect bit of SDVOC is reserved on 965G/965GM, instead of ignore SDVOC this trys to always probe it on these chipsets. commit f5f67e1b54e67b4bfc3db3482b2693211be81d63 Author: Zhenyu Wang Date: Wed Dec 10 10:36:07 2008 +0800 bug #17395: Quirk CRT for Sony VGC-LT71DB commit d8b764fbd27dc9c8b28386093931b8d38855bd19 Author: Keith Packard Date: Tue Dec 9 21:51:14 2008 -0800 Add RandR 1.3 panning support by supporting the crtc set_origin function RandR 1.3 panning support can use the regular mode setting interface, but that's really slow. Providing set_origin makes it nice and snappy. Signed-off-by: Keith Packard commit 4d7a95959d8223aec41550eb19f60b3edd7210a1 Author: Zhenyu Wang Date: Tue Dec 9 19:48:11 2008 +0800 Try to add LVDS detect support This one trys to use lid status for LVDS detect, which works when internal panel is not used as primary display alone, or there's no internal panel at all. ACPI button driver's lid state interface is preferred, and SWF state is also checked if ACPI method failed. commit 0fe61b0b7e3bbe8ced1b0ad2be72c438d200c64b Author: Zhenyu Wang Date: Tue Dec 9 19:19:58 2008 +0800 Remove Cappuccino SlimPRO SP625F 855GM LVDS quirk It breaks bug #18462 on IBM 855GM with same subdevice ids. commit bea98cdfd93fc1181a06c51e57fcab227ff4827e Author: Carl Worth Date: Fri Dec 5 15:42:53 2008 -0800 Set vertex_buffer_bo to NULL after unreference. Which is just being tidy. We initially were looking at this code path due to a report of a crash on server shutdown which started after this unreference call was added. Setting this to NULL apparently didn't avoid the crash, but it's a good thing to do regardless. commit ce7efc2e3676c8f80206415480dda91e5e021396 Author: Carl Worth Date: Thu Dec 4 11:41:02 2008 -0800 Don't smash fixed_mode if skip_panel_detect is set. Without this change, setting LVDSFixedMode to false is not effective as i830_bios_init calls i830_parse_panel_data which in turns sets a fixed_mode. To fix this we still call parse_panel_data to set the various lvds_options but we return before setting fixed_mode. commit e8b95efbf5d9c3a5b75b2bb8b5b51844b5fcdfbc Author: Carl Worth Date: Wed Dec 3 13:49:52 2008 -0800 i965: Add batch_flush_notify hook to create new vertex-buffer bo This avoids mapping a buffer object which is being referenced by a batch that has already been flushed, (which is a terribly expensive operation). On my machine this brings the performance of x11perf -aa10text from 85k back to 150k, (where it was before a recent kernel upgrade). Also, before this patch, when I used my X server actively performance would drop as low as 15k---hopefully that bug is gone with this change. commit 768f317cf0da4cd6682af2e71e71c3e130e05182 Author: Zhenyu Wang Date: Mon Dec 8 10:33:13 2008 +0800 Fix DRI2 compiling warning commit 95596f51503bb468364719aec9083d59999e34b7 Author: Zhenyu Wang Date: Mon Dec 8 10:30:12 2008 +0800 Fix TV compiling warning commit c47b6d1def917fad5ad2b5a3e4167edfd354f2c8 Author: Kristian Høgsberg Date: Sat Dec 6 21:20:52 2008 -0500 Make sure DRI/DRI2 can initialize properly with KMS. commit 70af658d4e94cc372f9e9c831611f70b3c1cecab Author: Kristian Høgsberg Date: Sat Dec 6 19:19:21 2008 -0500 Simplify crtc preinit a bit. commit 3ad9c9a82d7b359b9b711070628e6ff07a2aa9f7 Author: Kristian Høgsberg Date: Sat Dec 6 19:17:39 2008 -0500 Fix KMS compilation. commit 2e3c098c5ed9a8451713dc754a5f086992249336 Author: Eric Anholt Date: Fri Dec 5 12:21:53 2008 -0800 uxa: Reject solid/copy to under-8bpp destinations. EXA wouldn't create pixmaps for under-8bpp, but UXA does. Fixes mis-rendering in xfwm, evolution message compose, firefox link drag'n'drop, and I'm sure more. Big thanks to Pierre Willenbrock for debugging the issue! Bug #18050 commit 261c20a479f6ec1e94c2ba801323072227cc3ade Author: Eric Anholt Date: Fri Dec 5 12:13:26 2008 -0800 uxa: Add in EnableDisableFBAccess handling like examodule.c did. This fixes assertion failures when rendering text while VT switched. commit caecd6031e416705b1f0a7051535211feaebdedd Author: Eric Anholt Date: Thu Dec 4 15:18:08 2008 -0800 Remove the extra memory allocation for 965 video state now that it's all in BOs. commit 48c113ade26d5ad64999cd5cc288495c10e02fc4 Author: Eric Anholt Date: Thu Dec 4 15:10:49 2008 -0800 Emit proper relocations to pixmaps in BOs in i965 video. commit ae2cd8b75e41393e072e27064ecefecf1aa1bc6c Author: Eric Anholt Date: Thu Dec 4 15:02:12 2008 -0800 Move i965 video surface state and binding table to BOs. commit 1b3c3c9d79305abe1785fdaef26a950dafa8890f Author: Eric Anholt Date: Thu Dec 4 14:30:56 2008 -0800 Move i965 video vertex data to BOs. This eliminates extra syncing when clipping is involved. commit 84825972597042f0aa6784594dace96be96a0234 Author: Eric Anholt Date: Thu Dec 4 14:26:09 2008 -0800 Move remaining i965 video programs to BOs. commit 40671132cb3732728703c6444f4577467fa9223f Author: Eric Anholt Date: Thu Dec 4 14:20:21 2008 -0800 Move i965 video wm and sampler state to BOs. commit 48803eb7463ad14f3109f67fcf4ccff4362baaa2 Author: Eric Anholt Date: Thu Dec 4 13:22:12 2008 -0800 Stop allocating unused scratch space for i965 video. commit f3fe46b557a4dd7e212c2790fb47142d375c1c75 Author: Eric Anholt Date: Thu Dec 4 13:18:06 2008 -0800 Move i965 video vs/sf state to BOs. commit 4b9d3eac57a972c055c4acd7a10dfe8aa918131c Author: Eric Anholt Date: Thu Dec 4 13:11:13 2008 -0800 Move i965 video cc state to BOs. commit 176e92d89fdfb199780014722feab6ac25836dcc Author: Eric Anholt Date: Thu Dec 4 12:53:37 2008 -0800 Move I965DisplayVideoTextured unit state setup to separate functions. commit 61929f4c641e2ecb145ad2b22f7092d40e31ae6d Author: Eric Anholt Date: Thu Dec 4 11:44:35 2008 -0800 Move I965DisplayVideoTextured surface/sampler setup to separate functions. commit 73d03cb93ca761ee555b87558882e26bd2f10d91 Author: Eric Anholt Date: Thu Dec 4 11:37:38 2008 -0800 Move debug code for I965DisplayVideoTextured to separate functions. commit df01d8f0791bd825c96d9d5e20313d5ffcfeb532 Author: Zhenyu Wang Date: Thu Dec 4 16:11:33 2008 +0800 Change master version to 2.6.99.1 commit b156b3165e1aae5df0353737d0335ac2e653f5fd Author: Julien Cristau Date: Wed Dec 3 04:35:38 2008 +0100 Don't unconditionally define DRI2 xorg-server.h will define it if the server has dri2 support. commit 8d7cbab267e8fbcb2fcf90b18346b60607277266 Author: Zhenyu Wang Date: Thu Dec 4 18:43:03 2008 +0800 Fix maxium backlight level restored issue The origin check for bring back max value for '0' backlight level is ok for legacy or combo control method as '0' mostly doesn't act in ideal lowest level. But it breaks in using kernel control method which should provide a reasonable backlight range. This is tested fine on T61 with thinkpad_acpi module. commit 32e7d47925b445a85847d77651b258e117aaaffe Author: Zhenyu Wang Date: Thu Dec 4 09:24:31 2008 +0800 Disable XvMC on DRI2 for now commit 293f6232c6c0ce12802a2123edfab4551d25e266 Author: Dave Airlie Date: Wed Dec 3 16:51:25 2008 -0800 uxa: don't call composite routines with no buffer. We can get a case with gnome-terminal + links, where we get two arrays of glyphs all with 0 width and 0 heights in them. If this happens we manage to get to this case without any buffer setup and segfault. (cherry picked from commit 717c7492a0f6ba3fb3eabda33515881eef314155) commit 457a680afd0d8f835131ea72be0c3c618c2892c7 Author: Eric Anholt Date: Wed Dec 3 13:17:26 2008 -0800 Enable tiling for DRI2 back/depth buffers. This results in allocation overhead for small (8x8-128x128 or so) pixmaps with DRI2, but we're interested in looking at tiling them in general in the near future, anyway. commit b662ecccb5c036fcc4aa19026642bde0a1ca2ac8 Author: Eric Anholt Date: Wed Dec 3 10:50:33 2008 -0800 Re-enable composite accel on 965 with UXA. This was blocked on getting 965 render aware of BO pixmaps, which is happily now the case. commit d426f799f541cb32fab134f2af068c6cd31923d9 Author: Paulo Cesar Pereira de Andrade Date: Wed Dec 3 14:59:21 2008 -0200 Include prior to including "edid.h" from the sdk. commit 07f5a8223187c1abc79c104d2fa5859a54cecd30 Author: Robert Lowery Date: Wed Dec 3 09:48:23 2008 +0800 TV: add support to set TV margins in xorg.conf commit 00ae7a571b6413aa2530e4f1310f8f4646631946 Author: Eric Anholt Date: Tue Dec 2 13:08:23 2008 -0800 UXA: Add support for tiled front/back/depth by cutting over to the GTT map. commit 34d54db945c67a2fee0a38cc9eafc463b8413669 Author: Eric Anholt Date: Tue Dec 2 13:01:56 2008 -0800 Remove DRI_MM defines which are always true now. commit f7540df184a75a749cabcfa2da8974d3d0714ea6 Merge: 5f34702 ee87f7b Author: Keith Packard Date: Mon Dec 1 19:06:09 2008 -0800 Merge commit 'origin/dri2' commit 5f347020a52b583e19d333361ea7bf2591255899 Author: Paulo Cesar Pereira de Andrade Date: Sat Nov 29 02:35:59 2008 -0200 Export libIntelXvMC and libI80XvMC symbols. This is a side effect of adding the visibility flags to XORG_CFLAGS. commit ec7fd3d1b477928f9bffde1a72d7f3fdea89e629 Merge: d978cd4 baec75a Author: Zou Nan hai Date: Thu Nov 27 10:48:09 2008 +0800 Merge branch '965-xvmc' Conflicts: src/common.h src/i830_hwmc.c src/i830_video.c commit d978cd4b453ea588ed2fc2f2cb4ec26856fe00d4 Author: Wu Fengguang Date: Thu Nov 20 00:47:25 2008 -0800 refresh batch_bo reference after intel_batch_flush() The call into intel_batch_flush() will invalidate the pI830->batch_bo stored in bo_table[0]. Fix it by re-read the refreshed value. Signed-off-by: Wu Fengguang Signed-off-by: Eric Anholt commit ee87f7becc2138348ec0d948829db6e86cee86da Merge: 3dd7f0f a5b1e62 Author: Kristian Høgsberg Date: Wed Nov 12 16:40:37 2008 -0500 Merge commit 'origin/master' into dri2 Conflicts: src/i830_dri.c src/i830_driver.c src/i830_memory.c commit 30c29627c859f1f6780aa652d6de4fa985b63dd0 Author: Jesse Barnes Date: Thu Nov 13 12:35:02 2008 -0800 Make sure DRM library paths are included We need @DRM_LIBS@ in order to find drm_intel if installed in a non-standard path. commit 42ec6938bdea3a5b065a4248fdca5f031415191e Author: Ma Ling Date: Fri Nov 7 14:23:41 2008 +0800 enable Intel G35 SDVO HDMI audio output Set the SDVO_AUDIO_ENABLE bit to enable SDVO HDMI audio output of the Intel G35 chipset. Signed-off-by: Ma Ling Signed-off-by: Wu Fengguang commit 42b3903c3fda95a7c536cb957d8163d8dc54a9a1 Author: Wu Fengguang Date: Fri Nov 7 14:23:40 2008 +0800 enable Intel G45 integrated HDMI audio output Enable audio output for the integrated HDMI of Intel G45 chipset by introducing the SDVO_AUDIO_ENABLE bit. Signed-off-by: Wu Fengguang commit 293f4a8b6d1ca8a47d14c4d4b5904b85a8167e12 Author: Wu Fengguang Date: Thu Nov 13 09:50:37 2008 +0800 introduce i830_hdmi_priv.has_hdmi_sink HDMI is compatible with DVI, and we've seen many boards that use HDMI port for DVI output. So Zhenyu proposed this flag: i830_hdmi_priv.has_hdmi_sink to indicate the presence of HDMI capable monitors. Signed-off-by: Wu Fengguang commit 667923559219429b0c5fec12a0164f7eba1f8f2d Author: Jesse Barnes Date: Tue Nov 11 12:55:06 2008 -0800 Default to FULL_ASPECT panel fitting Now that 8xx is fixed, we should be able to preserve aspect ratio by default. Fixes fdo bz #18033. commit 65cd0fbb018b2c18f1571dc0924c7d92eaf794ad Author: Zhenyu Wang Date: Tue Nov 11 09:36:50 2008 +0800 TV: fix contrast and saturation for 915/945G 915/945G uses exponent-mantissa format instead of fixed-point format on 965G. commit a5b1e62337d4e8840347bb186db48697f0690a19 Author: Zhenyu Wang Date: Fri Nov 7 16:06:26 2008 +0800 quirk LVDS on Asus Eee box Reported by Yang Sheng commit 9942cfa6dcc70a09ea38f738b1e73e3f005080b9 Author: Keith Packard Date: Thu Nov 6 15:04:27 2008 -0800 Use long crt hotplug activation time on GM45. The GM45 b-spec requires the use of the longer hotplug activation period, but does not require looping twice over the detection logic. With this patch, CRT detection appears solid on my GM45. Signed-off-by: Keith Packard commit 226efa7c74c0ed8a7b974a3727c5d7322c8ef815 Author: Zhenyu Wang Date: Wed Oct 29 22:41:20 2008 +0800 TV: subcarrier fix for NTSC and PAL Using subcarrier DDA values from spec give more close result to standard frequency. commit 3651341292d90b7ded4c3f013bcb0f46537a113a Author: Zhenyu Wang Date: Wed Oct 29 20:41:46 2008 +0800 TV: fix timing parameters for PAL, 480p, 1080i commit b404afb755b608b02bcf0be1f8fe8a38d3d7bc1e Author: Zhenyu Wang Date: Wed Oct 29 20:32:18 2008 +0800 TV: save serveral TV_CTL register fields in mode set Driver should keep those fields according with spec. commit 2ae91f0ffdadfb393d526b94e21914a31aa14232 Author: Zhenyu Wang Date: Wed Oct 29 20:26:44 2008 +0800 TV: fix default contrast and saturation modifier Color knobs was set with higher modifier which caused strong color on TV screen. Setting fixed point modifier to default 1.0 makes picture on TV look nicer. commit c4cab00ef7f57fc27776f53263aacec2edf6f959 Author: Zhenyu Wang Date: Wed Oct 29 20:26:03 2008 +0800 TV: white space cleanup commit b130f94f26111e1a12ce869292915504588d0369 Author: Zhenyu Wang Date: Thu Nov 6 10:14:00 2008 +0800 SDVO: fix more command definition errors commit 3ab979da5c867fb862e33a80b973a35d56d56a55 Author: Zhenyu Wang Date: Mon Nov 3 16:05:28 2008 +0800 SDVO: add command for set monitor power state SDVO encoder power state must be higher than monitor's state. This only adds command and doesn't enable monitor power state setting yet. commit f558a4972d1cca03785da025170259c61541ee63 Author: Zhenyu Wang Date: Mon Nov 3 16:01:40 2008 +0800 SDVO: add GetScaledHDTVResolutionSupport command commit cd8cbff5d7921d2f4fdac106c3d54414310af94d Author: Zhenyu Wang Date: Mon Nov 3 15:20:18 2008 +0800 SDVO: fix sdvo tv format and sdtv resolution request/reply definition commit 61672b8c458ecf449138c51aeb12cf24dbbd59d9 Author: Zhenyu Wang Date: Mon Nov 3 14:59:53 2008 +0800 SDVO: add HDMI audio encrypt change bit for GetInterruptEventSource command commit 45fb04474d0e67643a633dcc3aeb4efe7fd71ea1 Author: Zhenyu Wang Date: Mon Nov 3 14:51:14 2008 +0800 SDVO: fix wrong order of sdvo version's major/minor commit 5cbf1e72711e906b5309694045b56933e14dca06 Author: Zhenyu Wang Date: Thu Nov 6 09:46:54 2008 +0800 Make IS_GM45 into IS_G4X define Those are identical that using one define is much clear. And it can also apply fixes for GM45 too, which is missing with origin define. commit 78b6cff3b6ec9513ede3e71d81a828967e6c0068 Author: Eric Anholt Date: Wed Nov 5 14:39:19 2008 -0800 i965: Support render acceleration with pixmaps in BOs. This required reordering the relocation emits for surface/binding table so that we didn't add new relocations to things that had already been relocated at (the check_aperture requirement). commit 801f0eac4f7b0071ed21eb9c68c5a951e1cc409a Author: Eric Anholt Date: Wed Nov 5 13:29:39 2008 -0800 Make I830FALLBACK debugging a runtime instead of compile-time option. commit d828b0802c939cb12664db4dd157a4944a4db01b Author: Maxim Levitsky Date: Wed Nov 5 13:47:09 2008 -0800 Add an option to make the overlay be the first XV adaptor. commit 040d9bf9d8748d1ed8f977a6356d198def978b51 Author: Eric Anholt Date: Thu Oct 30 13:55:07 2008 -0700 Remove the CheckDevices timer. This was an early attempt to support display switch hotkey. It never really worked, as the events didn't show up when they should. It also cost a wakeup every second to check just in case, instead of taking an interrupt like we can now using ACPI. Additionally, some machines apparently get stuck with the event set and end up DDCing checking for new devices every second and smashing your video modes. commit 08914cceda6c57530023cdcdb5ad7e4024f36a6e Author: Carl Worth Date: Thu Oct 30 16:46:06 2008 -0700 Use buffer objects for binding table and surface-state objects. Instead of having a static array for these and doing an ugly sync everytime we recycle the array, we now simply allocate short-lived buffer objects for this dynamic state. The dri layer, in turn, can take care of efficiently reusing objects as necessary. On a GM965 this change was tested to improve the performance of x11perf -aa10text from roughly 120000 to 154000 glyphs/sec. commit 47cc3d79da8174ba30ca130b0fb6c7d9c871caed Author: Carl Worth Date: Thu Oct 30 16:53:57 2008 -0700 Unreference the vertex_buffer_bo in gen4_render_state_cleanup This avoids leaking one buffer object. commit 88700acf30f9eab8f96c197c7d113ce38c0af6e7 Author: Carl Worth Date: Mon Oct 27 14:23:02 2008 -0700 Rename gen4_dynamic_state to gen4_vertex_buffer We don't actually plan to put any other data in this structure, so it doesn't make sense to have a generic name, (since we'll only be using it for our vertex buffer). commit 9e95722763e2379d14a6b46c3750a44713da5135 Author: Carl Worth Date: Thu Oct 23 15:43:19 2008 -0700 965: Move composite setup to new _emit_batch_header_for_composite This function is the new name for _allocate_dynamic_state now that it also emits everything to the batch necessary for setting up a composite operation. This happens in prepare_composite() every time and in composite() whenever our vertex buffer fills up. It's not yet strictly necessary to be redoing this setup in composite() but it will be soon when the setup starts referring to buffer objects for surface state and binding table. This move prepares for that. commit fcb2a5a1253c505913e66b08107c0a9f57b07bad Author: Carl Worth Date: Wed Oct 22 17:12:47 2008 -0700 Use buffer object for vertex buffer (in new gen4_dynamic_state) This begins the process of separating the dynamic data from the static data, (still to move are the surface state and binding table objects). The new dynamic_state is stored in a buffer object, so this patch restores the buffer-object-for-vertex-buffer functionality originally in commit 1abf4d3a7a and later reverted in 5c9a62a29f. A notable difference is that this time we actually do use check_aperture_space to ensure things will fit, (assuming there's a non-empty implementation under that). commit 7e68786cf746b6b984b184080578db1947b268ed Author: Jesse Barnes Date: Thu Oct 30 13:40:23 2008 -0700 Don't modify render standby if kernel mode setting is active Since we can't bang on registers directly in that case. commit 87ea531c5dc5b39809395b277c330854aaaaf019 Author: Adam Jackson Date: Fri Oct 24 14:47:27 2008 -0400 Quirk: No LVDS on Dell Studio Hybrid commit 4d5360b1f3666bca4ed44c7f1b9217b8157c74b9 Author: Carl Worth Date: Wed Oct 22 16:17:39 2008 -0700 Use consistent idiom for obtaining static_state This doesn't make any difference, but it's cleaner to have each function follow the same idiom for obtaining these pointers. commit 36fc53d068673497e77796ba69e010d08c359447 Author: Carl Worth Date: Wed Oct 22 15:45:51 2008 -0700 Rename state_base_offset to static_state_offset in gen4_static_state_init More cleanup here, and again no functional change. commit 8fda7df0071046d057eeaf74328668b227af52a9 Author: Carl Worth Date: Wed Oct 22 15:28:24 2008 -0700 Rename gen4_state_init to gen4_static_state_init This follows naturally from the structure rename. Also we make things less muddled by having this function actually accept a pointer to a gen4_static_state_t rather than a gen4_state_t, (and then fetching the desired pointer out from that). Again, no intended change in functionality here. commit acba4238116f2ead7be88d49c4c56c7cd6d7f3b8 Author: Carl Worth Date: Wed Oct 22 15:12:57 2008 -0700 Rename gen4_state_t to gen4_static_state_t It doesn't contain only static data yet, but it will soon, so this renaming prepares for that. Also, this helps make things more clear between gen4_render_state_t and gen4_state_t which were muddled before, (particularly because the corresponding identifiers were render_state and card_state). The card_state identifier is now known as static_state which should be less confusing. This change is strictly search-and-replace with no functional changes. commit c6550fa53d92c21dc677b86ebcd528a4ac640764 Author: Carl Worth Date: Wed Oct 22 14:51:42 2008 -0700 Ignore intel_gtt binary We simply forgot to add this to .gitignore when it was created. commit ee3df629eaa388f09bec33ad04d443359d63ea7f Author: Dave Airlie Date: Mon Oct 20 18:46:49 2008 -0700 Default kernel mode setting to off, add configure flag to enable Should help avoid unpleasantness. commit 55cb65c6fdcf932d09e97abfa5374ee574676798 Author: Eric Anholt Date: Sun Oct 19 21:22:37 2008 -0700 Enable Option "Legacy3D" for 965 as well, and clarify both the docs and code. Signed-off-by: Eric Anholt Acked-by: Keith Packard commit 28bb056f8cd326770590157412835318863b4134 Author: Keith Packard Date: Sat Oct 18 19:37:09 2008 -0700 Use pipes, not planes for sarea geometry data Vblank in the kernel is far simpler if it deals with pipes instead of planes, so we're changing both user and kernel side. This is the user mode side. This fixes both i830_crtc_dpms and i830PipeSetBase, the two functions which copy geometry from the crtc to the sarea. Signed-off-by: Keith Packard commit 546e2aca5b8b5d9f486d119ea2872ccd2b056054 Author: Keith Packard Date: Tue Oct 14 14:38:05 2008 -0700 Reduce incidence of MI_FLUSH usage. This tracks whether the last command in each batch is an MI_FLUSH command and avoids appending another MI_FLUSH in the non-GEM cases. Signed-off-by: Keith Packard commit 9b91cdf7ac88982880c887ffb0811c92157a7945 Author: Keith Packard Date: Sun Oct 19 14:24:46 2008 -0700 No need to check for drmCommandWriteRead; we link against libdrm My checks for DRM enabled were a bit too extensive; drmCommandWriteRead is part of libdrm which the driver is always linked against. Only the symbols in the DRI module need to be checked here. Signed-off-by: Keith Packard commit c25437a69490b09acff335a81a38aa540f0822f5 Author: Keith Packard Date: Sun Oct 19 13:39:04 2008 -0700 Remove accidental 'return;' left at the top of I830DRIInitBuffers I was testing the behaviour of the XAA-based DRI buffer drawing code for tiled buffers and accidentally left I830DRIInitBuffers disabled. Signed-off-by: Keith Packard commit ae224be27bb4432f25dae851debea6966bf31261 Author: Keith Packard Date: Tue Oct 14 14:35:36 2008 -0700 Check for DRI module before initializing GEM mm GEM requires the DRI extension module currently, so make sure that is loaded (by checking for the DRIQueryVersion symbol) before trying to call it. This allows the server to start with the DRI extension disabled. Signed-off-by: Keith Packard commit 7ddea0447c8972104d43cd7966f5ce89b4cca20c Author: Keith Packard Date: Fri Oct 17 00:07:09 2008 -0700 Handle differently tiled front/back/depth/third in DRI window management When moving or clearing the extra buffer contents associated with DRI windows, the XAA code needs to see which buffer is being manipulated in the Setup functions to program the tiling values correctly. Calling I830SelectBuffer and not then calling I830Setup... would result in mis-tiled rendering. Signed-off-by: Keith Packard Signed-off-by: Eric Anholt commit c946383afc644ae7740e3c3146424fdd86c05285 Author: Keith Packard Date: Fri Oct 17 00:07:08 2008 -0700 XAA tiling support was mis-computing adjusted pitch (>>4 instead of >>2) This may well explain why XAA never worked well on tiled front buffers; tiled buffers require a different pitch programming on 965 than non-tiled buffers, in dwords rather than bytes. Signed-off-by: Keith Packard Signed-off-by: Eric Anholt commit 871728a0cbba12579c830e67020cc0c69c1611bb Author: Zhenyu Wang Date: Thu Oct 16 10:35:17 2008 +0800 Don't handle irq in GEM mode commit 2419bce9efbff63529074e64af5ec5c2e62e368b Author: Zhenyu Wang Date: Thu Oct 16 10:28:16 2008 +0800 Make GTT dumper work on other 9XX chips commit 986c8df79e83c369655ad786a6bf6342b53c535d Author: Adam Jackson Date: Thu Oct 16 10:24:04 2008 +0800 Fix Mac mini crash in DDC mode probe SDVO on Mac mini trys to get EDID from CRT port, which failed with recent DVI-I change. commit 6707371176147340fabc9ab6f1e3d6d5ac980662 Author: Eric Anholt Date: Wed Oct 15 08:12:11 2008 -0700 Remove gratuitous flushing in EXA after solid operations. This snuck in with the UXA rename commit. commit 3dd7f0f9423bb891bc99cd3b77dc3d57e057a7ef Author: Kristian Høgsberg Date: Tue Oct 14 23:57:10 2008 -0400 Update to DRI2 changes. Implement DRI2CopyRegion and provide drm device filename to DRI2 module. commit 282f51c3f0e5bc2cedd2f60f458ca2662290d471 Merge: 8a54e3b 4dd0068 Author: Kristian Høgsberg Date: Tue Oct 14 23:13:40 2008 -0400 Merge commit 'origin/master' into HEAD commit 4dd00681dd0f9fce8dfd4592b46418edbbd2eeb4 Author: Eric Anholt Date: Tue Oct 14 11:33:33 2008 -0700 Fix broken stolen memory counting on G4X. On the GM45 we were assuming too little stolen memory (mostly harmless, except when it wasn't, until the AGP fix), and on the G45 we were assuming too much stolen memory, which was quite harmful when we touched the page that didn't get mapped. Future stolen memory accounting should use src/reg_dumper/intel_gtt before and after enabling AGP on the chipset to confirm that only the GTT entries not mapped to stolen are replaced, and that all of the unmapped GTT entries are replaced with the constant scratch page. commit e7e49bed7e254256f8cc0d4afcdfadc6dadf19e6 Author: Eric Anholt Date: Tue Oct 14 10:38:05 2008 -0700 Add a GTT dumper for G4x debugging. commit 1c6ea4ab4772453da915306045add8d147d567f2 Author: Julien Cristau Date: Sun Oct 12 15:10:22 2008 +0200 Typo fix Reported by Tomas Carnecky on IRC commit 6cb4150160bb1e1365773561fb53294ad9248a0e Author: Zhenyu Wang Date: Sun Oct 12 08:07:44 2008 +0800 Bug #17892: Fix possible crash in CRT probe Introduced in patch for DVI-I CRT probe, if no EDID CRT monitor is connected, origin code destroys default DDC bus which causes crash in later get_modes call. Change it to setup and destroy DDC bus as needed in get_modes, so we always reprobe and get current state. commit 140451abb41fbd68d5aac4736c1cf1ec2805dd9e Author: Keith Packard Date: Thu Oct 9 18:18:34 2008 -0700 For non-DRM, add NOOPs after BATCH_BUFFER_START to verify completion In non-DRM mode, the driver waits for the hardware by checking the ring pointers; when the ring is empty, it assumes the hardware is idle. However, the hardware updates the ring pointers before executing a command, so if the MI_BATCH_BUFFER_START is the last command in the ring, the driver will think the hardware is idle while it may still be processing the contents of the batch buffer. Placing NOOPs after the BATCH_BUFFER_START allows the driver to know that the hardware has completed the batch buffer. Signed-off-by: Keith Packard commit d09d938bf26ea0c44352ff6e7a57ba43f4047fdb Author: Keith Packard Date: Thu Oct 9 18:17:13 2008 -0700 i830 nondrm batch buffer insertion was missing ADVANCE_LP_RING() call The ring commands to insert a batch buffer to the ring in i830 form were not terminated by a call to ADVANCE_LP_RING(). This surely would have caused chaos. Signed-off-by: Keith Packard commit d24010b7b3f2419beb40dc5ae1e8aeb3e04b5a93 Author: Carl Worth Date: Thu Oct 9 14:29:04 2008 -0700 Disable frame buffer compression by default for GM965. We haven't found a way to make FBC work reliably with GM965 yet, (it often fails to notice CPU writes). This appears to be a specific problem with this device, (as we haven't gotten similar bug reports for subsequent devices such as GM45). So FBC is now disabled by default for GM965 but can still be enabled with the FrameBufferCompression option for experimenting/debugging. This resolves bug #16257: [GM965 EXA] Frame-buffer compression broken for CPU writes (XPutImage) https://bugs.freedesktop.org/show_bug.cgi?id=16257 commit 4128b01ec84ffa0f03c335c36738f383376d9381 Author: Zhenyu Wang Date: Thu Oct 9 09:19:41 2008 +0800 Remove Lenovo T61 TV quirk BIOS already says no integrated TV, and this quirk blocks TV on R61i which has the same subdevice id as T61. commit 74571363539426abeb0a1af11f3bb545d91ed6c2 Author: Zhenyu Wang Date: Wed Oct 8 15:36:10 2008 +0800 Put forware VBIOS data parsing i830_bios_init() is called too late after output init, which makes bios data mostly useless, and caused all TV init fail as tv_present flag is not set. commit 111dd151dedf535464d638461f9485ec2939780e Author: Lukas Hejtmanek Date: Tue Oct 7 15:07:08 2008 +0200 Fix driver build against server master. Broken by 3a4151b69daa478ac6edf042d604ee41e8429c0d commit 3a4151b69daa478ac6edf042d604ee41e8429c0d Author: Eric Anholt Date: Mon Oct 6 17:00:08 2008 -0700 Fix driver build against server 1.4.2. This disables UXA and DRM modesetting pre-1.5, due to privates handling issues. commit 3621183cf4acef23414e8d69c34b1e587f52ec67 Author: Eric Anholt Date: Mon Oct 6 16:59:16 2008 -0700 Fix bios_reader build against old servers. The server's pci_device structure ends up conflicting with libpciaccess's. Just don't include the server structure for this non-server tool. commit 080d36648f92d3b9a559e5458687fa82afab411f Author: Eric Anholt Date: Wed Oct 1 16:13:09 2008 -0700 Add support for RepeatPad and RepeatReflect to 915 and 830-class Render accel. commit 5e04b5ad1b618655e201cbf1f5b2585aa6be0c17 Merge: 979bb10 260cbcf Author: Jesse Barnes Date: Mon Oct 6 16:08:12 2008 -0700 Merge branch 'master' of ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit 979bb109c6d76fe18b9e29f55afb2548f890bbfe Author: Jesse Barnes Date: Mon Oct 6 16:05:46 2008 -0700 Document more VBIOS functionality Document a few more VBT structures and comment on VBIOS communication a bit. There should be enough there now for a sufficiently motivated developer to start implementing support for hotkeys and other features on pre-IGD OpRegion machines. commit 260cbcfe61868175ba3e649ce07d43f57601f9be Author: Carl Worth Date: Mon Oct 6 13:17:59 2008 -0700 Document and use 'legacy' border color mode It's very convenient that the hardware supports this non-default mode since it's exactly what is specified by the Render extension. This provides a more efficient means of fixing bug #16820: [EXA] Composition result in black for areas outside of source-surface bo https://bugs.freedesktop.org/show_bug.cgi?id=16820 without the software fallback we had in the earlier fix, (commit 76c9ece36e6400fd10f364ee330faea470e2da64 ). commit 98ca9e2af1b0a67ed91e10cf661af70dfba44d43 Author: Carl Worth Date: Mon Oct 6 13:16:37 2008 -0700 Rename default_color to border_color This is consistent with the documentation, (and just plain makes more sense). commit 175b30e3828266a89021c2439119545099d72715 Author: Carl Worth Date: Mon Oct 6 12:48:07 2008 -0700 Revert "Fallback to software for RepeatNone with transformed RGB-only pictures." This reverts commit 76c9ece36e6400fd10f364ee330faea470e2da64. We've learned a new technique that should let us avoid this fallback to software. See following commit. commit 21cce1998a10db520c390eb5061814867564c583 Author: Shuang He Date: Mon Oct 6 09:48:21 2008 +0800 Fix a typo in G965 texture video code commit 76c9ece36e6400fd10f364ee330faea470e2da64 Author: Carl Worth Date: Thu Oct 2 20:40:14 2008 -0700 Fallback to software for RepeatNone with transformed RGB-only pictures. We wish it wouldn't, but the hardware ignores the alpha in the BorderColor we set when the source picture format has no alpha in it, (and it uses alpha of 1.0 where we want 0.0). For now, fallback for these cases. This gives a correct result, but obviously is not as fast as we would like. This fixes bug #16820: [EXA] Composition result in black for areas outside of source-surface bounds https://bugs.freedesktop.org/show_bug.cgi?id=16820 commit f1dbc266ccfe26c6b9a272e40a5bbe9afaa4f2e0 Author: Eric Anholt Date: Thu Oct 2 14:45:12 2008 -0700 Work around libpciaccess reporting a 0 rom size by guessing. I required the following patch on top of this to work around libpciaccess brokenness. libpciaccess reports 0 rom size if there's no rom resource, even if the rom file exists in sysfs. commit 8304b405e0dc2f31fd2d2fd82e150ba502ab74e2 Author: Keith Packard Date: Mon Sep 29 17:37:28 2008 -0700 Eliminate INT10 call to get BIOS contents libpciaccess (and the old X server PCI code as well) provides a function to get the ROM contents. Code to use that was already present in the driver and used if the INT10 function failed. Skip the INT10 and just use libpciaccess as that eliminates several module loads and scary use of vm86. Signed-off-by: Keith Packard commit ab2b70f831314f81a581bfb1e48d059a3a2b0b06 Author: Carl Worth Date: Wed Oct 1 16:05:16 2008 -0700 Prefer repeatType field over using both repeat and repeatType. Eric informed me that the repeat field exists only for backwards compatibility with old drivers that weren't prepared for values other than 0 or 1 here. Since we are, we can just ignore that field and examine only repeatType. So the code's a (tiny) bit simpler this way. commit 128223ee9b7880e640056475462eca9a88415492 Author: Carl Worth Date: Wed Oct 1 15:29:04 2008 -0700 Add support for RepeatPad and RepeatReflect. It's quite simple to support these modes---we simply need to turn on the support for them in the hardware. These changes have been verified with the extend-pad and extend-reflect tests in cairo's test suite. However, this currently required using a custom-modified version of cairo. The issue is that released versions of cairo, (and even cairo master so far), don't pass RepeatPad and RepeatReflect to Render, (due to various bugs and workarounds in cairo and pixman). I do plan to fix those issues in cairo, so that in a future release of cairo, (1.8.2 perhaps?), the cairo test suite will usefully test these new repeat modes in our driver. commit b7279f1be1b913c1c6ee8ebfb95c97800217a821 Author: Carl Worth Date: Wed Oct 1 15:26:39 2008 -0700 Examine picture repeatType as well as repeat field. The existing switch statement was switching on the Boolean repeat field rather than the correct repeatType field. This had not caused any problem before as only two possible repeat values were supported (RepeatNone = 0 and RepeatNormal = 1) so they were always the same as the repeat field. Soon, however, we'll be supporting more repeat types, so we'll need to switch on the correct value. commit ffcbbb071f1cde90fe0dc4887a05dd66c0e66985 Merge: 1eb46d0 bf8a3ff Author: Jesse Barnes Date: Tue Sep 30 16:59:35 2008 -0700 Merge branch 'master' into xf86-video-intel-2.5-branch commit bf8a3ffeaa4df9ecbad7abff9a44d714de2fa104 Author: Jesse Barnes Date: Tue Sep 30 16:59:02 2008 -0700 Revert "Use -Werror by default" This reverts commit f315e9d1ad92562195ce42b956d4be6b31e8a13e. The world isn't ready for a warning free build. commit 1eb46d055b147941fa529ac582c336a114f47892 Merge: 8408995 497b742 Author: Jesse Barnes Date: Tue Sep 30 12:54:27 2008 -0700 Merge branch 'master' into xf86-video-intel-2.5-branch commit 497b7420c4a76df553ed53322a390a1c754ce30c Author: Olivier Fourdan Date: Tue Sep 30 12:53:11 2008 -0700 Fix ordering of VGA vs. plane disable From the Intel 965 Programmer’s Reference Manual, volume 3, chapter 2.2.2 "Mode Switch Programming Sequence". The disable sequence should be: - Disable planes (VGA or hires) - Disable pipe - Disable VGA display in 0x71400 bit 31 This patch implements that order plus waits for a vblank at the end. Fixes bug #17756. commit a4568740ee296bc392843fd324d2a047e7862187 Author: Jesse Barnes Date: Tue Sep 30 12:48:32 2008 -0700 Be more verbose about panel data in VBIOS dumper Dump more panel data, including number of expected entries. Had to refactor things a bit, but now each function should get size information so further checking can be added more easily. commit fa2586a40f20e73ec7420466638e8f595e0da987 Author: Jesse Barnes Date: Tue Sep 30 12:46:20 2008 -0700 Use VBT LFP info pointers by default On some machines it appears that the LFP info pointers give us more accurate panel info than if we index into the LFP data table using the panel type index. Early reports indicate that using the pointers doesn't cause regressions, so switch to them by default to help 8xx machines. Fixes bug 17310 (and hopefully 17658 too). commit f315e9d1ad92562195ce42b956d4be6b31e8a13e Author: Jesse Barnes Date: Tue Sep 30 12:07:52 2008 -0700 Use -Werror by default commit f082e877d54dbafa437fd05e9c07e870cd513be9 Author: Jesse Barnes Date: Tue Sep 30 12:06:46 2008 -0700 Work around gcc uninitialized variable warnings GCC isn't smart enough to analyze the control flow and figure out that these are false positives, but initializing them shouldn't hurt, so work around it. commit 836d24f2cc3836fbd1695cf1f88c2af975b4862c Author: Keith Packard Date: Mon Sep 29 19:02:51 2008 -0700 Use uintptr_t instead of uint64_t to hold pointer value commit baec75a56d91546443a2e04812face4997bc764b Author: Zou Nan hai Date: Sun Sep 28 11:18:40 2008 +0800 [965-xvmc] 965q indirect media data workaround commit 11d304e99c0e11c28901ec28115d9c8b81a2b9cc Author: Zhenyu Wang Date: Sun Sep 28 10:08:26 2008 +0800 Bug #16631: add option for SDVO force detect Some ADD2 card doesn't get SDVO detect status setup right, which disabled outputs on those cards. This adds a new option "ForceSDVODetect" to probe all SDVO ports anyway. commit 1cc15ba454fdf54a7dea9da066e0a023a4742fab Author: Zhenyu Wang Date: Fri Sep 26 10:01:52 2008 +0800 Render register clock gating disable fix on 4 series chipset commit d6b2696f9ac14a81598e0147698209ad428fd45d Author: Zhenyu Wang Date: Fri Sep 26 09:53:03 2008 +0800 Do force CRT detect sequence twice on 4 series chipset commit d8a007b056e3d6c3e132ecac06368b21d2ac4123 Author: Zhenyu Wang Date: Fri Sep 26 09:44:59 2008 +0800 Bug #16515: Fix VT switch with DVI on G45 On DVI, centered VGA mode is used instead of native mode VGA, and PLL on pipe is used instead of VGA PLL setting. So make sure PLL settled down in restore time. commit a428892b76dba4c55e2ae28933d30e98d9fd646d Author: Jesse Barnes Date: Tue Sep 23 12:36:11 2008 -0700 Update supported hardware list commit 3c2f7d84785954eb91341f85abb175f299b2797d Author: Zou Nan hai Date: Tue Sep 23 17:15:42 2008 +0800 [965-xvmc] IGD support commit 08ab23bb87563517d5653bddf82763b5ef641bed Author: Zou Nan hai Date: Tue Sep 23 14:57:18 2008 +0800 [965-xvmc] optimize, pack some payload commit 8408995ffbf705aa0bc09ab72c58c2e31a4b70c3 Merge: d18b86a afa630b Author: Jesse Barnes Date: Mon Sep 22 18:38:54 2008 -0700 Merge branch 'master' into xf86-video-intel-2.5-branch commit afa630b448e5993850433c9f0b129758ec4d37b5 Author: Bryce Harrington Date: Mon Sep 22 18:38:35 2008 -0700 Add TV out quirk for HP Compaq nx6110 Adds a TV out quirk for HP Compaq nx6110. Fixes bz #17683. commit 204a6281aa59e29027793ba5c84a5d9af7dc9e90 Author: Jesse Barnes Date: Mon Sep 22 18:38:03 2008 -0700 Revert "Add no TV out quirk for HP Compaq nx6110" This reverts commit 6a46022df57d09109fc119fedce99c156715a4d4. It should have been attributed to Bryce. commit d18b86aa7fc9270e24ed9ea861ebbbbb54558fee Merge: 9a7da65 6a46022 Author: Jesse Barnes Date: Mon Sep 22 18:03:39 2008 -0700 Merge branch 'master' into xf86-video-intel-2.5-branch commit 6a46022df57d09109fc119fedce99c156715a4d4 Author: Jesse Barnes Date: Mon Sep 22 13:26:58 2008 -0700 Add no TV out quirk for HP Compaq nx6110 Hopefully we can fix the VBT parsing code so we don't need this, but for the time being it seems necessary. Fixes bz #17683. commit 10909d9b665864bda2b1654de009d556cd068726 Author: Jesse Barnes Date: Mon Sep 22 13:11:55 2008 -0700 Add Cappuccino SlimPRO SP625F to no LVDS quirks list Looks like this platform might contain VBTs that indicate an LFP is present even though it isn't. Intended to fix bz #11368. commit 9a7da65e624060a37eef989963a9c79f13df30d3 Merge: 043b6e7 2f93cfb Author: Jesse Barnes Date: Mon Sep 22 09:59:52 2008 -0700 Merge branch 'master' into xf86-video-intel-2.5-branch commit 2f93cfbc7e96acc32efb5e1ca49b817a81cba6e3 Author: Zhenyu Wang Date: Fri Sep 19 15:20:55 2008 +0800 Fix output detection for DVI-I For CRT this trys to probe all possible port for EDID and detects got confirmed by EDID's d/a type bit. For HDMI/DVI, also using EDID d/a type bit to ensure it should handle the connect or not. commit 1fbe4d602816c9dfc5fba917b9fdc257d8d025b0 Author: David Schleef Date: Thu Sep 18 15:37:00 2008 +0800 Bug #17277: fix upscaling limit Oh duh (i830_video.c): /* Clamp dst width & height to 7x of src (overlay limit) */ if(drw_w > (src_w * 7)) drw_w = src_w * 7; if(drw_h > (src_h * 7)) drw_h = src_h * 7; The condition I see in the documentation appears to be src_h/drw_h < 8, that is, src_h < 8*drw_h. It appears this was "fixed" incorrectly in e784e152. It seems difficult to believe that this limitation would exist at all for the texture unit. commit bc36608e321e01a2be792688b4b734bb7c0667f7 Author: Zhenyu Wang Date: Thu Sep 18 10:42:33 2008 +0800 Check display stride limit when allocate front buffer commit 043b6e71b83eb05339a6f8c4814e6941f8b9695a Author: Xiang, Haihao Date: Tue Sep 16 13:21:43 2008 -0700 Move bufmgr init earlier so it's available at I830DRIDoMappings time. Fixes a crash with non-GEM mode. Bug #17540. (cherry picked from commit 62b75df84c893bf28e20014cf88ce45064611dc9) commit 0a2d17f7c2ea9b695df1855aab4ccc519546d8e5 Author: Xiang, Haihao Date: Tue Sep 16 11:49:39 2008 -0700 Put back check for pI830->hw_status in setting hws in non-GEM mode. Fixes crashes on non-GEM systems with physical hardware status page. Bug #17540 (cherry picked from commit 188d58dac9a87b56dbc34ec219cd196928bbcf64) commit 62b75df84c893bf28e20014cf88ce45064611dc9 Author: Xiang, Haihao Date: Tue Sep 16 13:21:43 2008 -0700 Move bufmgr init earlier so it's available at I830DRIDoMappings time. Fixes a crash with non-GEM mode. Bug #17540. commit 188d58dac9a87b56dbc34ec219cd196928bbcf64 Author: Xiang, Haihao Date: Tue Sep 16 11:49:39 2008 -0700 Put back check for pI830->hw_status in setting hws in non-GEM mode. Fixes crashes on non-GEM systems with physical hardware status page. Bug #17540 commit e2743a409a02978ca8e953dbbeeb96f61bbd5ce6 Author: Jesse Barnes Date: Fri Sep 12 14:22:48 2008 -0700 Only BO map render state if kernel mode setting is active We'll probably end up doing this differently, but avoid this path for now. commit 95b3e3a65a60aa264fbbfd141df980b534005264 Merge: 94a86fa ec17c88 Author: Jesse Barnes Date: Fri Sep 12 13:42:06 2008 -0700 Merge branch 'master' into xf86-video-intel-2.5-branch Conflicts: configure.ac - resolved version number conflict commit 8a54e3be5c5057fe8e3c52c03401fdada7978c45 Author: Keith Packard Date: Fri Sep 12 12:47:13 2008 -0700 Fix mis-merge of DRI2 changes related to pI830->directRenderingType The old code had a directRendering boolean, the new one has an enum. A bunch of the merges failed to remove the '!' in front of the old name, breaking a bunch of 'we don't have DRI' tests. commit d8d95d8c71f2cd4bab277f44132ece7963714a5b Author: Eric Anholt Date: Thu Sep 11 16:11:46 2008 -0700 Fix build failures that should have been in the previous merge commit. commit ec17c88a0ed7c9cf4ad68aa52a7a891946a1c0f4 Author: Zhenyu Wang Date: Thu Sep 11 16:14:47 2008 +0800 Add support for G41 chipset G41 is another 4 series chipset like G45/43. commit f9c625e1e5ddfff06b38fdd4e596fd8eae5934d5 Author: Zhenyu Wang Date: Thu Sep 11 15:35:27 2008 +0800 Disable render standby Render standby is known to cause possible hang issue on some mobile chips, so always disable it. commit 7e8eb6e20b6b1a2a3c1ef28f694fa23c68a15c48 Merge: fba9b5a 58a3817 Author: Eric Anholt Date: Wed Sep 10 14:10:26 2008 -0700 Merge branch 'master' into dri2 Conflicts: src/i830_batchbuffer.c src/i830_display.c commit 58a3817305ef1455a11be6ead8a8521dfc5875c7 Author: Eric Anholt Date: Tue Sep 9 11:02:49 2008 -0700 Track move of exec to bufmgr, and restoration of emit/wait funcs for non-drm. commit f367334c6392a717f6cd2f4ed02200be1c6d356a Author: Eric Anholt Date: Tue Sep 9 11:01:33 2008 -0700 Track the move of irq emit/wait to fake bufmgr. commit 0b4f7b630312b148ce4e172cb7cd9f673751b2a3 Author: Eric Anholt Date: Tue Sep 9 10:57:08 2008 -0700 Track move of bufmgr functions to libdrm_intel. commit 0f804bfa1e1e972e9b4e3b7c8db61e9877c50f50 Author: Eric Anholt Date: Tue Sep 9 19:17:05 2008 -0700 Bug #17446: Don't try to manage IRQs in GEM mode. The kernel told us that it was already doing so, resulting in failure. commit da63b5adec8555cc7b3e71f33933f4c9dd6f714e Author: Eric Anholt Date: Sun Aug 31 14:27:29 2008 -0700 Add some MCHBAR registers for debugging tile swizzling issues. commit c7aaf0118baa34e583df5f1c29c9dab9a6af6eb7 Author: Dave Airlie Date: Tue Sep 9 18:13:56 2008 +1000 mode: fix missing comma commit b9ef0ed7d7b96eca6394cd0d367369ec511d1bcd Author: Daniel Stone Date: Fri Sep 5 05:02:08 2008 +0300 i830: Fix timer leak TimerCancel just cancels the timer: it still leaves the TimerRec intact and unfreed. commit fba9b5aff450d874ef98cafd3ecc0fd85f9597b5 Author: Eric Anholt Date: Wed Sep 3 16:49:07 2008 +0100 DRI2: Move pixmap pitch alignment for use with depth to pixmap create. The previous location for pitch fixup would have only worked when depth was used with the backbuffer, and no page flipping or other adventures occurred. commit 71ec627c3a65cfc7bca7353af43c60b18e73230d Author: Eric Anholt Date: Wed Sep 3 16:37:25 2008 +0100 DRI2: Emit the MI_FLUSH before flushing batch in swapbuffers. Should fix issues with swapbuffers flushing to front buffer on 965. commit daaefd173b4c98d0ebabd43352bfa3a030a62e4b Author: Eric Anholt Date: Wed Sep 3 16:26:27 2008 +0100 UXA: Re-enable non-965 render. commit 32bb5fc7db14911d0438aea1504e1551b2c9fc25 Author: Eric Anholt Date: Wed Sep 3 16:19:03 2008 +0100 Don't set up sarea or drm mappings in DRI2 mode. commit 4a5e31138115f435be7f8f5999b1b2329a18d669 Author: Kristian Høgsberg Date: Wed Sep 3 16:18:23 2008 +0100 Fix broken test for DRI1 in DRI2 conversion. commit fca7a4e9a5c73e1c129e94eeccf8fc795f729931 Author: Stefan Dirsch Date: Wed Sep 3 15:32:11 2008 +0200 Pipe A force quirk for Toshiba Satellite A30. commit 57ad9cc689724a2f3583eda862250eab0a6798d5 Author: Fabio Date: Mon Sep 1 13:33:50 2008 +0800 Man page patch to clarify meaning of VideoRam option with i810/i815 commit fd6a9ca5b59a868260eb91272091ea6169091737 Author: Kristian Høgsberg Date: Fri Aug 8 15:36:35 2008 -0400 Add DRI2 support. commit a1c802e4a0324386cf7370594a46354c89e3b646 Merge: 3733a1b 808b72f Author: Jesse Barnes Date: Fri Aug 29 09:23:35 2008 -0700 Merge branch 'master' of ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit 3733a1b54c95aa378f32577f9e996946e8e8e48c Author: Jesse Barnes Date: Fri Aug 29 09:12:05 2008 -0700 Fix build when using kernel DRM headers Unfortunate mismatch between kernel and DRM master headers. Kernel: typedef struct _drm_i915_batchbuffer { ... } drm_i915_batchbuffer_t; DRM master: typedef struct drm_i915_batchbuffer { ... } drm_i915_batchbuffer_t; so use the typedef rather than the morphing structure name. commit bd7ee7fcf51138d21da92a3d8cbaff49871d7188 Author: Zou Nan hai Date: Fri Aug 29 11:57:46 2008 +0800 [965-xvmc] There is some issue with uv half pixel, remove it till fix commit 973a5fb25652a97e28af03295d430a79557be756 Author: Zou Nan hai Date: Fri Aug 29 10:59:17 2008 +0800 [965-xvmc] some shader optimize commit e7379d1c48a522f137cf1a06a334748c88471946 Author: Zou Nan hai Date: Thu Aug 28 09:49:57 2008 +0800 [965-xvmc] half-pixel bug fix commit be49ae6bd683ee9eb778f7ea937aaee4d72c51f0 Author: Zou Nan hai Date: Wed Aug 27 11:29:15 2008 +0800 [965-xvmc] add missing g4a file commit e813b139b7c353a0930c3e00408700619d3949e4 Author: Zou Nan hai Date: Wed Aug 27 11:11:41 2008 +0800 [965-xvmc] support field prediction and dct type, optimize in GPU commit 808b72f81454061c815321e51a9b9f925c4bf786 Author: Eamon Walsh Date: Tue Aug 26 22:24:36 2008 -0400 Change uxa private keys to integer variables. Prepares for a devPrivates system that will store an index. commit 62ce9e8f9c8cc2014645d58f4249c496aebc36e8 Author: Eamon Walsh Date: Tue Aug 26 22:23:06 2008 -0400 Remove unused exa_pixmap_key. commit 087ade8e66cf7a34b8a96e1efe438099376cd896 Author: Robert Noland Date: Tue Aug 26 16:35:07 2008 -0400 Fix typo in last commit commit 6404ac178bf2c32a715a66e7fd6ab0184a05af36 Author: Robert Noland Date: Tue Aug 26 15:09:47 2008 -0400 Check for drm before calling modeset ioctl. commit c889198ab54336248a03050ad410254912d79bb7 Author: Zhenyu Wang Date: Tue Aug 26 10:12:21 2008 +0800 Fix X exit crash in NoAccel NoAccel should still be needed for performance evaluation, so don't crash me when exit. commit 0929a191ae36473acb0244a818098e4acf26d675 Author: Zhenyu Wang Date: Tue Aug 26 10:01:23 2008 +0800 Destroy bufmgr after allocation finish Fixed X exit crash for me, allocation reset will unreference bo which still requires bufmgr to be live. commit 94a86fa51a931f0059ea17728f857ec92cec5b16 Author: Jesse Barnes Date: Mon Aug 25 16:59:03 2008 -0700 Fix UXA build for distcheck Was missing proper path info in CFLAGS. commit 1c224f72d5f8fa8b6c4d9a6e06698f2462bb43b6 Author: Jesse Barnes Date: Mon Aug 25 16:59:03 2008 -0700 Fix UXA build for distcheck Was missing proper path info in CFLAGS. commit 09a235af0f216052d3101b153c18be1fa75abf15 Author: Jesse Barnes Date: Mon Aug 25 16:38:17 2008 -0700 Update version to 2.4.97 for first 2.5 test release commit 8e3243b8e5549033aa2f901a3bdd882418f6a69b Author: Jesse Barnes Date: Mon Aug 25 16:37:34 2008 -0700 Update version to post-2.5 commit 7a5b090abc39c380955489bad5e46d1278f38fee Author: Jesse Barnes Date: Thu Aug 21 09:40:57 2008 -0700 Hide kernel mode setting EXA code behind XF86DRM_MODE Prevents compiler warnings in the non-kms case. commit 4937b98981923c599786f5007ab0580ad08e1909 Author: Jesse Barnes Date: Thu Aug 21 09:39:33 2008 -0700 Fix compiler warnings in VBIOS utils commit 08326827fdb8abecbff20c7b051537dbad433c40 Merge: 5af5041 0de8ca3 Author: Jesse Barnes Date: Thu Aug 21 09:30:38 2008 -0700 Merge branch 'modesetting-gem' commit 5af504166f14f4401818f3b7c27ac2ccba7b9ff5 Author: Jesse Barnes Date: Wed Aug 20 15:06:36 2008 -0700 Don't disable planes in i830_update_dsparb We need to program DSPARB with only one plane enabled at most, and that's guaranteed to be the case when we're called during mode set, so just assert that case but otherwise leave the planes alone to avoid flicker on active displays during output detection for example. Fixes bug #17050. commit 7b6f4d22211d71480caf6335a3eacaacff369371 Author: Jesse Barnes Date: Wed Aug 20 14:40:29 2008 -0700 Don't allocate a pipe for hotplug detection It shouldn't be needed... commit ba4a4b7887d5c2da21cadfeeed601eaec8515550 Author: Jesse Barnes Date: Wed Aug 20 14:39:34 2008 -0700 Add more panel debugging info to register dump & vbios reader commit 0de8ca36306c506356e82d500134b4eeb96a6080 Merge: f26bcb9 5eccb5e Author: Jesse Barnes Date: Wed Aug 20 12:11:00 2008 -0700 Merge branch 'master' into modesetting-gem Conflicts: configure.ac commit 5eccb5ec7ea78b5800f98decd4216d39b9ebe5ec Author: Julien Cristau Date: Wed Aug 20 15:33:59 2008 +0800 Don't skip the checks for DRI headers with --enable-dri commit 1baebabc3af9f21a5b8084788ecd88dc66ce78de Author: Jesse Barnes Date: Tue Aug 19 16:02:55 2008 -0700 Add swf_dumper to .gitignore commit f26bcb9cb879e2e9ee2b26c95438cf46286c0208 Merge: 67ab546 7a1cc48 Author: Jesse Barnes Date: Tue Aug 19 15:53:18 2008 -0700 Merge branch 'master' into modesetting-gem Conflicts: src/i830_driver.c commit 67ab5462527c5ed94ed073421b60e85a213ea267 Author: Jesse Barnes Date: Tue Aug 19 15:46:52 2008 -0700 Use GTT mapping for EXA PrepareAccess function Makes software fallbacks *much* faster. commit 547cf774801bea2177d1224204f7de0dbf6baf3c Author: Jesse Barnes Date: Tue Aug 19 15:45:26 2008 -0700 Don't allocate EXA offscreen space if kernel mode setting is active We'll use GEM alloc & free routines in that case. commit 2ddd85f8aef5da1aebbfe9fab510858e7a41860d Author: Jesse Barnes Date: Tue Aug 19 15:41:41 2008 -0700 Bail out if kernel mode setting is active but DRI fails commit 646bbdc4b6a7b887ee8f0e51fdff5d07c4586329 Author: Jesse Barnes Date: Tue Aug 19 15:05:00 2008 -0700 Add quirk for pre-915s with working PFIT regs The regs are undocumented, but on some machines they work fine, so add this quirk to indicate it. commit 7a1cc48276f974d04e1c5ef7c92d98fe5ae9d4fa Author: Jesse Barnes Date: Tue Aug 19 10:44:04 2008 -0700 Add VBIOS software flags dumper program Still need to actually print all the flags & test on various platforms, but at least the bits are documented now. commit 385dc85881c56e218e7d17d7e1d022568aa29cfb Author: Zou Nan hai Date: Tue Aug 19 16:27:12 2008 +0800 Fix from He Shuang(shuang.he@intel.com), XvMCDestroyContext to check pointer valid commit 3147fa775c7e2a933dc74af1372a3318e77d3218 Author: Zou Nan hai Date: Tue Aug 19 16:20:16 2008 +0800 Fix from He Shuang(shuang.he@intel.com), XvMCDestroyContext to check pointer valid commit 078a59dd48ed00a6512d155883956c18752da9ce Author: Jesse Barnes Date: Mon Aug 18 12:53:33 2008 -0700 Remove unused VBIOS flag defines We just use the structure definitions now. commit 7048141254b7c1948fe77b1742b463f8723610d8 Author: Jesse Barnes Date: Mon Aug 18 12:51:31 2008 -0700 Pack bdb_general_definitions block More correct & consistent with other definitions. commit 0e6759bb6ad7293b6447bd20e3d7d8fdee46aba7 Author: Zhenyu Wang Date: Tue Aug 19 07:30:01 2008 +0800 Fix reverted LVDS bios capability dword definition Issue found by Peter Clifton. commit 76b5a7ff5c943cfaa254d2fd94b6397c91d1f8e6 Author: Shaohua Li Date: Mon Aug 18 11:13:20 2008 +0800 [PATCH] avoid duplicate mode set in lvds xf86SetDesiredModes() already sets lvds to full mode. later when xf86CrtcScreenInit() initialized randr12, i830_lvds_set_property will recall xf86CrtcSetMode and set mode to full. This patch is to remove the duplication. In my test, this can save about 0.2 - 0.4s x startup time. commit b8ee31cd80a945d1fbbfc45234ffe34a109b5717 Author: Jesse Barnes Date: Sat Aug 16 12:18:01 2008 -0700 Remove last TTM bits Makes it build again with drm#modesetting-gem. commit 6eb3e0f2f4e43e436029fc82e458ac8de1f94745 Author: Adam Jackson Date: Fri Aug 15 15:47:35 2008 -0400 Don't touch pScrn->monitor->DDC directly. commit ed7269e0a377b3135b06cacecc59119f06958feb Author: Zhenyu Wang Date: Fri Aug 15 10:10:43 2008 +0800 Always check and free driver private in LVDS destroy commit f4cb9a135dca9279af8186a9b18bf62ef7351019 Author: Zhenyu Wang Date: Fri Aug 15 10:02:44 2008 +0800 Make skip_panel_detect clear for its meaning commit 22918f62c89a4314fb5d01c58f22fee5b9a15a27 Author: Jesse Barnes Date: Thu Aug 14 16:02:37 2008 -0700 Fix pipe A force quirk Last commit introduced a logic buglet, we went from (foo & BLAH) -> (!foo & BLAH) rather than !(foo & BLAH), so fix it up to make my laptop work again. commit c1687f9ca9ce7b52043272e877e070c810e6599f Author: Jesse Barnes Date: Thu Aug 14 15:48:02 2008 -0700 Map/unmap render state only when bo is available Otherwise just use the GTT address. commit 380c80712f78b3673b64ea07746a8e25e15fba8e Author: Jesse Barnes Date: Thu Aug 14 15:39:57 2008 -0700 Fixup AccelMethod kernel mode setting code Allow UXA or EXA in the kernel mode setting case, defaulting to EXA. commit 4475dfb541c988ad19b177e60f31f333e2fb3355 Author: Jesse Barnes Date: Thu Aug 14 15:38:07 2008 -0700 Use pwrite for cursor updates Don't open code map/memcpy/unmap, let libdrm do that for us if necessary. commit cb217d4bfd941d0fa9ceae3e483dd1ca1d768e86 Author: Jesse Barnes Date: Wed Aug 13 16:55:39 2008 -0700 Make EXA & UXA share bo getting function Needed for proper acceleration & batch buffer handling. commit 1ab7239b73a5e298cadaf44e5605cf05855f08e9 Author: Jesse Barnes Date: Tue Aug 12 18:16:37 2008 -0700 Map gen4 render state buffer before initializing commit 603f48e31b021c4dc0bbf7b5efbb2e68aeb421d5 Author: Jesse Barnes Date: Tue Aug 12 18:04:08 2008 -0700 Don't set tiling (yet) if kernel mode setting is active commit f744aa8d4b22374e1de6dda4facb673c3c428d4d Author: Jesse Barnes Date: Tue Aug 12 18:02:21 2008 -0700 Don't run old accel init code Had the wrong logic. Throw in a couple of cleanups while we're there. commit 2321c865f3da9fd321910236a92b32e0af1aa458 Author: Jesse Barnes Date: Tue Aug 12 17:59:16 2008 -0700 Don't wait for ring if kernel mode setting is active We won't have the ring mapped. commit a1b334a4c8ae090744e802f8d41a36ea631d6c84 Author: Jesse Barnes Date: Tue Aug 12 17:58:29 2008 -0700 Update DRM based modesetting support Just a checkpoint, still needs a lot of work to properly handle resize, rotate & cursor handling. commit 5d78cf7cf0d23f60e6d61a92cbc2065b440027d3 Author: Jesse Barnes Date: Tue Aug 12 17:56:59 2008 -0700 Add EXA pixmap management functions for kernel mode setting Mostly pulled over from the old kernel modesetting code; a few updates were necessary. commit 9ec36e0c8bd8a4bd7c40569412fc1a21219b5af9 Author: Olivier Fourdan Date: Mon Aug 11 12:07:32 2008 -0400 Fix DPMS off in the presence of the pipe A quirk. Still turn off the VGA plane, and also handle the DRI path at the end. commit 445c2e9ef8fc1d49bbb03e07bf36e0339be16a80 Author: Olivier Fourdan Date: Mon Aug 11 11:30:51 2008 -0400 Apply pipe A quirk to 845 as well. commit 915c370964d8dbab48ff24ede2c5e78e7b39132d Author: Zou Nan hai Date: Mon Aug 11 15:45:35 2008 +0800 [965-xvmc] some fixes for earlier 965 chips commit 19ebdf1b24184c0a293a698d44c4e0571109d153 Author: root Date: Mon Aug 11 15:31:13 2008 +0800 [i965-xvmc] bypass copy when put image with xvmc commit d592eabc806b752053ade3c18e9dd8e0f39b45a3 Author: Zhenyu Wang Date: Mon Aug 11 15:16:44 2008 +0800 Fix possible spurious interrupts in hotplug detect on 4 series chip commit d0018a96064ee0adfe87c2d50c341bf7d2e45eb0 Author: Zhenyu Wang Date: Mon Aug 11 15:16:09 2008 +0800 Disable display clock gating for 4 series chips commit 173b909a71955997ed6366e70faebf63fe922a8e Author: Jesse Barnes Date: Fri Aug 8 18:11:13 2008 -0700 Make it actually build the kernel stuff if possible Fixup the kernel stuff to have a slightly better chance of working. Still need to fixup the EXA pixmap functions. commit fe90c0522f65f60c4c431787c889b7fb639ab61b Author: Eric Anholt Date: Fri Aug 8 16:35:25 2008 -0700 Set lvds_ddc_mode before use to avoid a segfault on mac mini. commit b1aef6f63c151dcb202fce869e4b80598b4b2052 Author: Jesse Barnes Date: Fri Aug 8 11:54:18 2008 -0700 Initial port of kernel modesetting from old intel-kernelmode branch Thanks airlied! commit 91e7b93c12f612e41b04a2d6106ff29b53b22a43 Author: Eric Anholt Date: Thu Aug 7 11:02:19 2008 -0700 intel_idle: Instead if #if 0, add an ignore flag for unreliable INSTDONE bits. This lets us produce a decent total value, and still show the unreliable bits in case they aren't on your platform. commit f9504eff31eb3c9c6c6b33dced9875866ff8307e Merge: f911347 5c9a62a Author: Jesse Barnes Date: Wed Aug 6 12:40:47 2008 -0700 Merge branch 'drm-gem' commit 5c9a62a29f62a9ecce37fae98cb01f8217eaba15 Author: Jesse Barnes Date: Wed Aug 6 12:39:03 2008 -0700 Revert "Switch to using a buffer object for the vertex buffer" This reverts commit 1abf4d3a7a203ff5d6e5ceda29573e7fd69ddf8e. Conflicts: src/i965_render.c - flushing was removed, keep it that way commit f91134795b545c8baebf218975b261c76a0e5873 Author: Zhenyu Wang Date: Wed Aug 6 16:19:29 2008 +0800 Fix SDVO HDMI encoding detect (#16920) Check return value of get supported encode command and current encoding mode, which could be DVI or HDMI. commit fc3e287e6b6db21b113aa40ec4d397802c067f8b Author: Keith Packard Date: Tue Aug 5 22:50:01 2008 -0700 [uxa] Remove unused pixmap size limits. All size-related rendering limits should be managed by the driver in the pixmap_is_offscreen call. There's no need for uxa to even know these values. commit 68f0872db6ec4d5dc3b524ee08ecad0aa125acd9 Author: Keith Packard Date: Tue Aug 5 22:36:03 2008 -0700 [uxa] Check xalloc returns and deal with failure Failing xalloc in a rendering function means just dropping the drawing on the floor (that's what we've always done). commit 8f10bfb127bfe73d83d58f1f306fb9a4dfd825d6 Author: Keith Packard Date: Tue Aug 5 22:34:24 2008 -0700 Use EXA by default instead of UXA until we have GTT mapping commit b2d058d80ccd08d9e02ef866ee7a95b58686f6a3 Author: Keith Packard Date: Mon Aug 4 23:43:13 2008 -0700 Rename uxa using _ instead of caps commit fc4d9c55a7fa8001786c1e4da10f005406c57ece Author: Keith Packard Date: Mon Aug 4 18:17:20 2008 -0700 Change PrepareAccess to take access mode rather than index commit c155bb3cb17a3bd3b2e90be52cd1fc90147c4e17 Author: Keith Packard Date: Mon Aug 4 04:11:13 2008 -0700 Add batch flush in i830_uxa_prepare_access commit 66706718553cd272eab6f817b5a059df3e0a4347 Author: Keith Packard Date: Mon Aug 4 04:10:21 2008 -0700 Add throttling commit 12df8f40d2fb41f5446db1b49beeb442da18bee2 Author: Keith Packard Date: Mon Aug 4 01:43:44 2008 -0700 Use dri_bo for all object allocations, including pixmaps under uxa commit 4cc20b7f6e25f4be4598f8edbe0077117126b4ee Author: Keith Packard Date: Mon Aug 4 01:42:48 2008 -0700 Don't call sync on prepare_access -- just let the driver deal with it. Let the driver do whatever sync is necessary from the prepare_access hook rather than forcing a full sync. commit b0b0998b5d52d105eb1e631f688aa8f1bd55ef39 Author: Keith Packard Date: Wed Jul 30 16:15:37 2008 -0700 Make EXA functions work for UXA as well EXA and UXA have the same acceleration interface, but UXA doesn't provide pixmap stride information as it doesn't manage pixmaps. Move all of that into the driver structure so that the acceleration functions needn't reference the EXA structure. commit 59774e9aca2d743e82d616bb644d20ff6d60d492 Author: Keith Packard Date: Tue Jul 29 22:57:09 2008 -0700 Add UXA - the unified memory acceleration architecture. This eliminates the cost of EXA migration management while providing full pixmap allocation control to the driver. The goal is to make something useful for UMA drivers. commit a21d4794b6812ce05d08f06dc47b26c4fb1c1fef Author: Jesse Barnes Date: Tue Aug 5 13:37:38 2008 -0700 Reorganize VBIOS code Make VBT parsing happen at driver init time rather than in each output init function, to save time and better separate VBIOS code into i830_bios.[ch]. The changes end up touching the output files due to field name changes, and allow us to reorder & simplify our LFP mode detection code. commit c2f0df4dc97c87539b66525a277c7d1e2c421f61 Merge: 4f1f308 750bd0b Author: Jesse Barnes Date: Tue Aug 5 13:03:46 2008 -0700 Merge branch 'drm-gem' of ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel into drm-gem commit 4f1f30854260e18b8b9c4103eebbad5dcf729ce6 Merge: e9e6b47 2aaa207 Author: Jesse Barnes Date: Tue Aug 5 13:02:47 2008 -0700 Merge branch 'master' into drm-gem Conflicts: src/i830_driver.c commit 1a59cc6b9acf312de1755d67757bf7f1967342e4 Author: Julien Cristau Date: Mon Aug 4 12:18:12 2008 +0200 Fix up the HP Pavilion ze4944ea quirk The chip is 855GM, not GM45. commit 27e9506fda86e90fd67de1715fa32d23aaa8a683 Author: Alan Coopersmith Date: Thu Jul 31 20:02:21 2008 -0700 Man page typo fixes commit da2eb83fb9a52291ea98f3285aee7bee2d55e0ca Author: Jesse Barnes Date: Thu Jul 31 19:21:36 2008 -0700 Update man page Add example dual head config, add info on bug reporting. commit 2aaa207db2cea03ba05c439b5074807689f2c5be Merge: 2049ba2 76eb8e6 Author: Jesse Barnes Date: Thu Jul 31 13:10:19 2008 -0700 Merge branch 'master' of ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel Conflicts: src/i830_display.c commit 2049ba211e7cdc383976c09f52c2b43acdd59481 Author: Jesse Barnes Date: Thu Jul 31 13:07:20 2008 -0700 Update DSPARB while planes are still off This avoids the flickering people reported in the 2.4.0 release. commit 750bd0bde09adf956c17bbb49c5a6020f12e60a4 Author: Carl Worth Date: Tue Jul 29 15:22:39 2008 -0700 Call DRM_I915_GEM_THROTTLE from I830BlockHandler This prevents the CPU from ridiculously outrunning the GPU. commit a893f176dda0b64f7dadfda6bf0331240037851e Author: Carl Worth Date: Fri Jul 25 15:56:35 2008 -0700 Add call to intel_bufmgr_gem_enable_reuse This instructs GEM to reuse buffer objects and improves the performance of my favorite 'x11perf -aa10text' from about 169k to about 188k glyphs/sec. commit b3c1a148679a4d943e556f996ef6b9004f549a41 Author: Carl Worth Date: Fri Jul 25 15:18:28 2008 -0700 Eliminate unnecessary flush from i965_composite This improves 'x11perf -aa10text' performance from ~144k to ~169k commit 1abf4d3a7a203ff5d6e5ceda29573e7fd69ddf8e Author: Carl Worth Date: Fri Jul 25 14:48:45 2008 -0700 Switch to using a buffer object for the vertex buffer commit e5fab0b7681be06a5a3be4bbd769ba5c435e2128 Author: Carl Worth Date: Fri Jul 25 13:44:29 2008 -0700 Add OUT_RELOC macro and backing intel_batch_emit_reloc function commit 76eb8e6f1f0c6962b23550564f4273f392567857 Author: Zhenyu Wang Date: Thu Jul 31 16:59:43 2008 +0800 Fix SDVO reg definition Remove wrong set tv resolution command, adding HDMI regs in dump. commit 77ed3d7600c1d92bf4a3ef4f54405cde8c232986 Author: Zhenyu Wang Date: Thu Jul 31 13:13:45 2008 +0800 Don't program dsparb on new Intel chip On new chip, DSPARB is controlled by hardware only. commit e9e6b4738573ffa3822ae68088bd53a645eedbce Author: Eric Anholt Date: Wed Jul 30 14:15:57 2008 -0700 intel-gem: Use new getparam to detect kernel GEM support. commit 42fb06f3f14fbec070350cf48361be4a0be0af04 Author: Tomas Carnecky Date: Sun Jun 15 14:27:16 2008 +0200 Reorder visuals reported by the intel driver The root window visual can not be changed. Neither at runtime nor through the configuration file. The xserver simply selects the first one that matches the class (usually TrueColor). I need a root window visual with stencil buffer because my compiz plugin uses the it for some operations. This patch reorders the visuals that the 3D driver reports and puts the one with stencil (and depth) bits as first. commit 1e90c82161789d1fd50b79db50edb7860b934639 Author: Julien Cristau Date: Sun Jul 27 12:07:21 2008 +0200 Link with -lm for sin/cos commit d77d42e543ee82e801a8563a911826521c0ba557 Author: Eric Anholt Date: Sat Jul 26 16:10:05 2008 -0700 intel-gem: Give a better error message if the kernel rejects the tiling mode. commit 6ac352f146bafe3b4bb5832340eb0ccb730565d2 Author: Zhenyu Wang Date: Wed Jul 23 15:10:07 2008 +0800 shut up gcc warning commit 075cf7fce57da4e51acafb3bfd3d61ba1a8096d5 Author: Zhenyu Wang Date: Wed Jul 23 15:07:48 2008 +0800 Fix distcheck for clean doltcompile commit 29d982c6bf873c6685bd0e395a8b0e5e3b1063e0 Author: Zhenyu Wang Date: Wed Jul 23 11:16:14 2008 +0800 Fix HDMI output number Output 33 is confusing. commit fd060ce89d86f6e8ff742d5b287abe8ecea32927 Author: Zhenyu Wang Date: Tue Jul 22 15:29:34 2008 +0800 Bug #16801: fix X crash when NoAccel on 965 commit 577c4d1a0c753fb46d43be05a9781d2e204fac45 Author: Zhenyu Wang Date: Tue Jul 22 15:14:14 2008 +0800 only check pipe underrun if vtSema is true. commit 04bbed2248e3e8f86efd64225abf2db8eb552653 Author: Zhenyu Wang Date: Tue Jul 22 15:08:57 2008 +0800 SSC is LVDS only Fix regression on my 855GM for VGA output. commit 7defa4f1f0eba82f39e74f96d2ad7ed2481b537e Author: Zhenyu Wang Date: Tue Jul 22 10:51:01 2008 +0800 Check underrun on enabled pipe commit b7765b0837af4cc80f1257ba04495140ef5d536e Author: Zhenyu Wang Date: Tue Jul 22 09:51:54 2008 +0800 Thinkpad R60e TV quirk via DMI info commit 286ff63f83db8ea16514512385e6f8c6875871ef Author: Eric Anholt Date: Thu Jul 17 17:06:28 2008 -0700 Don't set up the HWS page in GEM mode now that the kernel manages it. commit ed0fbd016b8fbcf01eddfd17fd25e745e7af2ba4 Author: Jesse Barnes Date: Mon Jul 21 11:48:38 2008 -0700 Add no LVDS quirk for Transtec Senyo 610 mini PC Fixes FDO #16757. commit 62a037b0585d6ecb43daac9d4eb0927a4618a367 Author: Eric Anholt Date: Fri Jul 18 14:50:08 2008 -0700 Fix distcheck. commit 3cbfc6c76bcd2bc9194a944092f6ce0881ff9da2 Author: Eric Anholt Date: Fri Jul 18 14:56:18 2008 -0700 Fix uninitialized-use warning in i830_debug.c ring dumping. commit 1b1c4975768f63ed0f3933ec384d24c324a383b3 Author: Eric Anholt Date: Fri Jul 18 14:53:26 2008 -0700 Get prototype for i830_bios_get_tv(). commit 978abf84e8cf3ba3e915774981fe03610e15efeb Author: Eric Anholt Date: Fri Jul 18 14:50:42 2008 -0700 Bump version number past the 2.4 stable branch. commit f4ab1f6ad47b8f9a33d45b35c1cb2ba9610b96a6 Author: Carl Worth Date: Fri Jul 18 14:31:45 2008 -0700 Add intel_statuspage to .gitignore commit c0dce28892d7a31ebcca615f87ba8d4fa6872204 Merge: a6ad504 b8ca1c7 Author: Keith Packard Date: Fri Jul 18 10:49:50 2008 -0700 Merge commit 'origin/master' into drm-gem commit b8ca1c747a679c931267363639fc0bc690cae2d6 Author: Jesse Barnes Date: Thu Jul 17 14:41:51 2008 -0700 Choose a split for DSPARB based on the configured modes for both planes. Previously, we were attempting to give both planes equal space in the FIFO to be fair. However, larger modes require more fifo space, so split it based on the relative HDisplay of the modes. This should resolve some fifo underrun issues with differently-sized displays, or single large ones. Bug #16169. commit b37a2a8ca82279468e3806dcf77d5fa7bdd0e874 Author: Jesse Barnes Date: Thu Jul 17 12:30:57 2008 -0700 Don't disable pipe A on 855 chips It needs to stay enabled or we may see hangs when trying to re-enable it (say at VT switch time). Fixes FDO bug #15168. commit a6ad50402cb879b08de95f94959bb1f59701c1ff Merge: e9916b9 c4565a9 Author: Carl Worth Date: Thu Jul 17 00:38:54 2008 -0700 Merge branch 'master' into drm-gem Conflicts: configure.ac src/reg_dumper/Makefile.am commit c4565a9811487402d899d0933cc63e27ffe1ff08 Author: Zhenyu Wang Date: Wed Jul 16 10:45:28 2008 +0800 Only initialize integrated TV encoder for mobile chips commit bca316863b79148b2f51a97d58b94e52ba3eae9f Author: Zhenyu Wang Date: Tue Jul 15 13:35:21 2008 +0800 xvmc: use vector based structure This is more clear to read MV components. commit 0c67219d0e6cfc858af2eb375c2f9473d0f6db60 Author: Zhenyu Wang Date: Tue Jul 15 13:29:33 2008 +0800 move FBC register dump out of display registers This makes it easier to read. commit a76ae7cab3001ce6639ae23fb0769c4e46b57e71 Author: lipeng Date: Tue Jul 15 10:26:33 2008 -0700 Fix GPIO pin usage for DDC on second HDMI port. commit 5054a86b1b362f3f63310afb9ef2d37c9f1cfca5 Author: Eric Anholt Date: Mon Jul 14 13:43:31 2008 -0700 Fix DSPARB setting on 845/865, which have only the AEND field and 96 entries. commit 8ac00ca97995e36514ff593fec3c0f0d316ed138 Author: Julien Cristau Date: Fri Jun 6 13:40:20 2008 +0200 Link the driver with -lpciaccess and -ldrm if needed This makes sure the driver ends up with a DT_NEEDED reference to the libraries it's using. commit d61182511b1520b04133d28480e1ffaacbaeb753 Author: Julien Cristau Date: Sun Jul 6 12:00:52 2008 +0200 Fix gen4asm rule to work with a build dir commit 757c00927a6f5760135136450b8d02d0f999ac1c Author: Carl Worth Date: Mon Jul 7 15:58:27 2008 -0700 Use up to 256 separate vertex buffers This allows us to only call i830WaitSync once every 128 calls to composite rather than on every call. However, we do need to also call MI_FLUSH to avoid the vertex cache getting in our way, (since our "separate" buffers are all allocated as one contiguous chunk). commit 0c548cd040d0c5e1812470ccdf6de86b6a2926d7 Author: Carl Worth Date: Mon Jul 7 14:01:15 2008 -0700 Allow for multiple vertex buffers (though only use one for now) Using more than one (in the future) will allow for doing less frequent calls to i830WaitSync. commit cc2249333cd462b4d99d110a12c454ca141b2be8 Author: Carl Worth Date: Mon Jul 7 13:25:42 2008 -0700 Move VERTEX_BUFFERS setup from prepare_composite to composite This is in preparation for having larger (or multiple) vertex buffers in the future. commit e9916b9d496fd0b4df717892dda33f81a2e2990a Author: Eric Anholt Date: Fri Jul 11 18:59:05 2008 -0700 Set tiling state for buffers allocated using GEM. commit 3c0f2bcc9965155fecab606edae68874427d3423 Author: Jesse Barnes Date: Thu Jul 10 12:57:25 2008 -0700 Add VBIOS based TV connector detection Now that the VBIOS code supports it, we can use the general features block to detect whether a TV connector is present on a given platform. Reviewed by Nanhai Zou. commit e00d9435609bcff1afb71aa6638a6b42a64f5178 Author: Jesse Barnes Date: Thu Jul 10 12:55:12 2008 -0700 Improve VBIOS feature detection, add SSC support Improve the VBIOS feature detection and use it to find whether the platform supports spread spectrum clocking. Use the specified reference clock, but disable SSC if multiple heads are active, since it can cause problems in cloned configurations. Reviewed by Nanhai Zou. commit 7332132a79e5b5c208d43e93dfe0c8b12eb1728d Author: Jesse Barnes Date: Mon Jul 7 10:48:56 2008 -0700 Improve FBC size checking In hindsight, this is obvious, since nowhere do we tell the FBC unit how much memory it has available. We need to make sure the compressed buffer is big enough to handle the uncompresed buffer, both in terms of vertical size and total framebuffer size, or the compressor could overwrite the memory immediately following the compressed buffer. commit f2ec3fd8f2c63b1bc0745802dcf737eda4bb42b6 Author: Stefan Dirsch Date: Thu Jul 3 23:12:13 2008 +0200 Add pipea force enable quirk for another 855GM machine. Fixes Novell Bug #406123, thanks Christoph. commit a34a4e3f6420e2b06bbdaa124fe0ccb1bc6a0bd9 Author: Zhenyu Wang Date: Thu Jul 3 01:03:14 2008 +0800 Fix official name for GM45 chipset commit 6506ac7aa008436158db4f4196802cab462f3446 Author: Zhenyu Wang Date: Wed Jul 2 11:12:54 2008 +0800 Give asus and eeepc backlight method higher priority On #16418, Evgeniy Manachkin reported that last asus and eeepc backlight patch is wrong, as acpi_video0 method will take priority and doesn't work. commit 55678c64bc6e3ed613ea6db14c105c18a0cf28ce Author: Dave Airlie Date: Tue Jul 1 18:51:18 2008 +1000 intel: fix drm check. The -mm check is broken now that 2.3.1 is out.. make it 2.4.0, to be fixed with GEM etc. commit 0597d94001afe0a9a34104285ce4dffc75b68071 Author: Roland Test-tools Bär Date: Mon Jun 30 10:32:42 2008 -0700 i810: Remove an effectively unused variable (only used in an incorrect free()) Bug #15401. commit 37661d916e8384f537d5ed8cbec66a93795c6a05 Author: Zhenyu Wang Date: Fri Jun 27 11:21:59 2008 +0800 Fix SDVOC typo commit 7834a3b118ae4e034f064257762d5c25ada5fe52 Author: Zhenyu Wang Date: Fri Jun 27 09:54:35 2008 +0800 xvmc: fix motion_type dump for frame/field picture commit 989ec9e8a69f909cb64f17e4465982613b4b054d Author: Zhenyu Wang Date: Fri Jun 27 09:39:02 2008 +0800 xvmc: Don't copy on xvmc surface in PutImage As xvmc rendering result has already been in fb, we shouldn't do extra copy on it. Although special care is required for i915 xvmc surface pitch alignment, which must be at least 1KB aligned. So video display function should take it into acount instead of always setting Y pitch to be double of U/V pitch. commit 550082070a3fdb951e3cf08974dc56276c0a739c Author: Zhenyu Wang Date: Thu Jun 26 14:22:34 2008 +0800 xvmc: enlarge batch buffer size commit d50cec6ef9e2178ea663e58d548390f0f3da7692 Author: Zhenyu Wang Date: Thu Jun 26 14:20:05 2008 +0800 xvmc: only allocate memory requiring physical address on 915G Later 945-ish chipset can use graphics address instead. commit d1c34d8c0e7ae2a1d952791343e131837fbfda99 Author: Zhenyu Wang Date: Thu Jun 26 10:05:21 2008 +0800 xvmc: init mc render load indirect command once commit 75e38fa8348198ba151afa37e10be3b0b0b468f8 Author: Zhenyu Wang Date: Thu Jun 26 09:47:28 2008 +0800 xvmc: init dest and reference buffer once Init them right after context create, and only update buffer address info later. commit b4d8ca8b38e495b56bb3b4143e5dfe91ee651f15 Author: Zhenyu Wang Date: Wed Jun 25 14:27:16 2008 +0800 xvmc: init one-time mc context once Don't setup one-time mc context everytime, as the content is always unchanged. And several structs got packed layout inside to ease static state initialization. commit 54f3f528e4804b958936ac773e7a507b2676f815 Author: Zhenyu Wang Date: Mon Jun 23 15:51:49 2008 +0800 xvmc: environ debug option support export INTEL_XVMC_DEBUG=1 commit 7a705081788bf957409e17baa5f189241589057c Author: Zhenyu Wang Date: Mon Jun 23 15:49:29 2008 +0800 xvmc: formalize surface type definition We should also carefully select surface type id. commit 0283d22f510ba47dfdac2806a58e46649c26580b Author: Jesse Barnes Date: Fri Jun 27 13:39:31 2008 -0700 Add pipea force enable quirk for HP Pavilion ze4944ea Fixes bug #16540, thanks Bryce. commit 08903abe4dc0295c7ed7d1ff1a22e0e579540c15 Author: Jesse Barnes Date: Fri Jun 27 13:37:10 2008 -0700 Add pipe a force enable quirk for Lenovo T60 Fixes bug #16494. commit 05df8c0b31721a9ccc7215fb1cda1115758367c7 Author: Hong Liu Date: Fri Jun 20 10:57:14 2008 +0800 Fix SDVO HDMI output. While some cards had enough initialized at startup to work already, others required that the driver actually initialize the required AVI info frame. commit 59f39e0ea0ad48c52d9b8f7afb6e04ce95db717e Author: Jesse Barnes Date: Tue Jun 24 11:01:46 2008 -0700 Remove ErrorF debugging from modeset ioctl Oops. commit 1056d79809a3765f81113f3988bd948c1f9c673a Author: Jesse Barnes Date: Tue Jun 24 10:44:23 2008 -0700 Fix back buffer damage handler for 965+ chips When page flipping is enabled, we need to make sure any changes to the front buffer are reflected in the back buffer(s) or corruption might occur at page flip time. So make the damage handler work on 965 by adding appropriate tiling flags and pitch adjustments. commit 65eee25d7d2ca979205f3776d620dbb36bf68a13 Author: Jesse Barnes Date: Tue Jun 24 10:41:46 2008 -0700 Add support for keeping vblank counters sane across mode setting The DRM supports disabling of vblank interrupts when not in use, but in order to function properly it must also be aware of mode setting, which will reset the frame counter to 0. Add code to call into the DRM before and after mode setting, so that it can account for any lost vblank events. commit 277632d8c37cf43c7c1178ae7d5a2e6d5705968c Author: Zou Nan hai Date: Tue Jun 24 16:43:40 2008 +0800 965 xvmc, current only frame based DCT_type support commit 9d7929436488969ca4fd1fef4d2e92be5e1a93aa Author: Keith Packard Date: Fri Jun 20 00:23:45 2008 -0700 Flush pending batch in block handler Make sure any pending rendering commands are delivered to the hardware before the server goes to sleep. commit 2f8a0aa8cd24ede824aa52102b45a295f1b6b5be Author: Keith Packard Date: Tue May 20 20:29:25 2008 -0700 Remove some unreliable regs for i915 commit 6b6be2b2a7179c1c9fa12989e16076aae105f4e2 Author: Eric Anholt Date: Thu Jun 19 15:01:00 2008 -0700 Fix a crash in i830_sdvo_init error paths by setting up dev_priv earlier. commit 65ad29d78793c7804f133a58de80ffaa0404ca28 Author: Eric Anholt Date: Thu Jun 19 14:27:30 2008 -0700 Automatically detect the presence of HDMI. Now, SDVO is only probed if the SDVO detected bit is set. If the SDVO probe fails, but the detect bit is set, assume that it's an HDMI output. commit ea0d21006ec71bc56acde7291e5f8d28e54b83fe Author: Eric Anholt Date: Thu Jun 19 14:10:29 2008 -0700 Fix hdmi POSTING_READ to use the register number instead of the register value. We won't dwell too long on how this ever worked. commit 2fa9240a3b685a0c3d0e2644fc144c927b67b6b3 Author: Eric Anholt Date: Thu Mar 20 15:14:46 2008 -0700 Get HDMI output working. HDMI, despite claiming to have pixel multiply support, actually doesn't want it, at least in the way that SDVO did. Disable it. Also disable the NULL_PACKETS_DURING_VSYNC bit. Despite the docs telling us to set it, the output doesn't like it when you do that, and the BIOS doesn't set it. Also add a posting read to SDVOx setting. Without it, half the X starts wouldn't get anything on the screen. (interestingly, it was every other startup, not just a chance). commit dc8ab9d35b261b6105a62949cfb47a3554531d0b Author: Eric Anholt Date: Thu Mar 20 13:49:47 2008 -0700 Set the sync active bits like we're supposed to, matching the BIOS. commit af13826ed063b60a1e4179101e8889b4ab7a9d0b Author: Eric Anholt Date: Mon Mar 10 11:51:05 2008 -0700 Add pixel multiplier support for HDMI commit 9a05662918223477eb1cf6f80ffac08712721c70 Author: Eric Anholt Date: Mon Mar 10 11:47:15 2008 -0700 The phase shift its are now reserved, and add HDMI clock limits. commit beba1dd3561e38573ed9f507328caf7f8fb9f84a Author: Eric Anholt Date: Thu Mar 6 16:05:17 2008 -0800 Initial HDMI work. Not currently hooked up at startup. commit da58dc3b02999f3244d0eaf77180b828d85bd609 Author: Eric Anholt Date: Thu Mar 6 14:57:57 2008 -0800 Add DisplayPort registers. commit 52a414d1158aa7512fb79560dc220e2a78456a2d Author: Eric Anholt Date: Thu Mar 6 14:00:18 2008 -0800 Remove VGA regs from debug output. commit b60bbbfd7b7dcf31726ad615a493f34f17cc6309 Author: Eric Anholt Date: Thu Mar 6 13:59:06 2008 -0800 Add little hotplug detector app. commit 64fa32e2eba21cb94aa0f8d87a6ee6b7c178a7a5 Author: Zhenyu Wang Date: Thu Jun 19 11:02:29 2008 +0800 Add backlight kernel method support on Asus and Eeepc Noted and tested by Evgeniy Manachkin for asus-laptop support, also add eeepc support. commit 1cfe769c74d1a3a392bf1aaaf5c2dcc8273daf66 Author: Zhenyu Wang Date: Tue Jun 17 12:39:28 2008 -0700 Add support for Intel 4 series chipsets. commit 289790c0467d27e96b537598a6589fc6a36da8b8 Author: Zhenyu Wang Date: Tue Jun 17 09:46:12 2008 +0800 Fix compiling with server master in LVDS backlight patch commit 66418cc99cfd360e303efcdf74a9ee31d435ff15 Author: Zhenyu Wang Date: Thu Jun 12 14:04:41 2008 +0800 Fix compiler warning when disable xvmc config (cherry picked from commit df0bbdc7cbb6ff357a81ed28d12e56c9c7d643f7) commit 078d05865884ca5784b532c0a79c8440632002ac Author: Shuang He Date: Mon May 26 09:20:53 2008 +0800 Fix typo in xvmc block destroy (cherry picked from commit 87ace420a34df7425641d089f71830e44fced098) commit 4c4ef27779aebf4df90b6233de05be2bb972de4c Author: Lukas Hejtmanek Date: Mon Jun 16 02:49:41 2008 +0800 Fix maximum backlight issue commit d775ddc64dc8349b8ef9e85b0be9e93cb1997fea Author: Eric Anholt Date: Fri Jun 13 10:03:24 2008 -0700 [gem] Catch -EINTR from blocking GEM ioctl and restart. commit 02d7141ac395446613edba0f2e2a951e750e4e9f Author: Dave Airlie Date: Fri Jun 13 11:30:58 2008 +1000 [gem] remove one more unused bit commit f07acbdaac95931d184ea2c557edb632e577eb47 Author: Eric Anholt Date: Thu Jun 12 13:47:35 2008 -0700 Require libdrm 2.4.0 always since we need the bufmgr code. This lets us remove a lot of conditional compile stuff in the DRI case, as if we're doing DRI and have 2.4.0, we can rely on GEM ioctls existing. commit 754df0aa55c4b5f0c3c415ad97d7612504410229 Author: Eric Anholt Date: Wed Jun 11 14:43:38 2008 -0700 [gem] Chase move of create ioctl from generic to device-specific. commit 339f00e340c3a9c8ac8f17147e37906494ef370b Author: Eric Anholt Date: Tue Jun 10 16:14:06 2008 -0700 [gem] Don't set up the ring in GEM mode, as that'll be handled by the kernel. commit e930c0dc5b5f98d256a4167ed70ba813c88924d2 Author: Eric Anholt Date: Sat Jun 7 13:57:59 2008 -0700 Use bufmgr_gem when available instead of the fake bufmgr. This is a bit unstable still sometimes. commit ecf19e1cda60a938d41413075ae6e00f24e0ec1a Author: Eric Anholt Date: Fri Jun 6 15:27:44 2008 -0700 Change most usage of pixmap offsets to using a reloc macro. This is based on airlied's RING->BATCH commit. The 965 code still needs to be fixed up for relocations. commit bade7d7d2505a10a8a7d24b084aff9742e2d6d64 Author: Eric Anholt Date: Fri Jun 6 14:03:25 2008 -0700 Use the DRM for submitting batchbuffers when available. There are some concerns with this, as the DRM will be setting the nonsecure flag on the batchbuffer, and the server may be submitting some secure-only commands. It appears to work on the 915GM test system currently. commit 6e94affcc2240e668bcf1aa41f3c8b19929d144b Author: Eric Anholt Date: Fri Jun 6 14:01:05 2008 -0700 Avoid needless flush emits in the blockhandler. The EmitFlush in i830_dri.c was added as a pageflipping workaround, and was noted to not even be sufficient then. There's no reason for it to be there, so it's removed. After that, we just have to not emit an MI_FLUSH if we already had, and cursor movement no longer bashes memory manager. commit b2216e7bc2f1a35f9fc1794bad83208cd5c583d1 Author: Eric Anholt Date: Wed Jun 4 16:31:16 2008 -0700 Use batchbuffers instead of ring emits for general commands. The batchbuffers are managed using libdrm and bufmgr_fake, and dispatched from the ring from userland. commit d0fda9d24c5fe4870cdbd2ba0213091165666a8e Merge: cc98d41 79f94ee Author: Eric Anholt Date: Tue Jun 10 11:32:49 2008 -0700 Merge branch 'master' into drm-gem commit 79f94ee3c4652019395b9c329d94f7779c558571 Author: Eric Anholt Date: Tue Jun 10 11:31:22 2008 -0700 Set up/restore PWRCTXA from enter/leavevt not server start/exit. This should improve behavior in the presence of VT switching, but also avoids a crash on X exit from writing the register after unmapping mmio. commit 231a302013981cc597ba09ee89b367c8ab56e8ba Author: Bryce Harrington Date: Tue Jun 10 14:10:39 2008 +0800 Two more Dell quirks fd.o #16160 commit cc98d41df63f1ee2561440fab3aa471a80a12920 Author: Eric Anholt Date: Mon Jun 9 12:00:14 2008 -0700 Add a little program to dump out the first 64 dwords of the status page. commit 1142be53eb8d2ee8a9b60ace5d49f0ba27332275 Author: Jesse Barnes Date: Mon Jun 9 08:52:59 2008 -0700 Fix TV programming: add vblank wait after TV_CTL writes Fxies FDO bug #14000; we need to wait for vblank after writing TV_CTL or followi ng "DPMS on" calls may not actually enable the output. commit 64a8f2433d7774d06119793b57cec6d3be6389c1 Author: Robert Lowery Date: Tue May 20 21:09:23 2008 +1000 Fix TV out connection type detection Make sure we wait for vblank when using the TV DAC to detect the connection type. Fixes FDO bug #14000. commit a993a8f3ce3a2079c5b5ebaca2ec2564047d7d4e Author: Tomas Carnecky Date: Fri Jun 6 10:03:23 2008 +0800 Fix compile error in LeaveVT commit 432d07fb175b385715eb3ccf97a303d2ad7bfe11 Merge: 3a967b8 bff180e Author: Eric Anholt Date: Thu Jun 5 14:57:18 2008 -0700 Merge branch 'master' into drm-gem commit bff180e6cac4452ef491c81855eb12bfa03d0bf3 Author: Eric Anholt Date: Thu Jun 5 14:55:23 2008 -0700 Move debug clock printout from ErrorF to X_INFO. commit ad459b21b7de4a79552ac155803d5930432fb84b Author: Eric Anholt Date: Thu Jun 5 14:37:59 2008 -0700 Remove SVG_WORK_CONTROL init. The bit set is now reserved -- used to be a workaround for early revisions. commit e41dc98a0aeec389b221038753056c725ecee1c5 Author: Eric Anholt Date: Thu Jun 5 14:37:26 2008 -0700 Initialize clock gating from EnterVT and save/restore it appropriately. commit 8061e5ac27a5f61f940bccc940be922999cc1d3f Author: Eric Anholt Date: Thu Jun 5 14:09:45 2008 -0700 Move BIOS scratch register setup to EnterVT instead of PreInit. We want these to always be set when our driver's in control. They are already appropriately save/restored at leave/entervt. commit b61cb9283185eb5211e84eb7d8e68beea607c2eb Author: Eric Anholt Date: Thu Jun 5 13:57:54 2008 -0700 Remove gratuitous wait_ring_idle after I830Sync. Syncing implies that. commit b65f67b74ff99aea1490d52f170ef4fe80cef6c7 Author: Eric Anholt Date: Thu Jun 5 13:40:55 2008 -0700 Move the remaining two lines of SetHWOperatingState to the caller. commit adb4f5a5e826e584ab212d23fc8d474c3e7bb8e8 Author: Eric Anholt Date: Thu Jun 5 13:39:08 2008 -0700 Remove duplicated i830_stop_ring()/SetHWOperatingState() in EnterVT(). commit c2e2fe48113667c683c6e1e9b1237635c41c61c3 Author: Eric Anholt Date: Thu Jun 5 13:21:55 2008 -0700 Move DSPARB setup into a separate function, and save/restore it at VT switch. commit 7e51384c973a96366b02ea646392c43574674111 Author: Eric Anholt Date: Thu Jun 5 11:56:42 2008 -0700 Replace a couple of wait-for-ring-idles with a single function to do so. commit 65306cdd71dad71e4ca7229764f81a0880dd70bf Author: Eric Anholt Date: Thu Jun 5 11:26:02 2008 -0700 Just remove the mprotect kludge. Besides not being #ifdef __linux__ed as requested, some linux kernels break in exciting new ways when you try to mprotect from PROT_NONE back to PROT_READ|PROT_WRITE. Yes, there are bugs in the code we're calling in a bug-exploiting bug workaround. If you want this workaround for the original bug exposed when moving to libpciaccess, it's already in libpciaccess. commit beb72ae5aa053303f5cc419e9c9d7c6db964f160 Author: Hong Liu Date: Wed Jun 4 16:58:05 2008 +0800 Set SDVO sync polarity to default on 965 Fix fd.o bug 15766 commit c7fee208fd46e143965ea173984d284e1eec2a9b Author: Hong Liu Date: Wed Jun 4 16:56:50 2008 +0800 Fix DSPARB change on 965G From the spec, only 965GM and IGD_GM have 128 FIFO entries. With DSPARB change introduced by commit bd137a, I've got PIPE B underrun when dual-headed on G35 platform. commit 64ccc8a036a1d80fc918e9b124d24ce0d26bdbbb Author: Zhenyu Wang Date: Wed Jun 4 22:30:04 2008 +0800 xvmc: add render dump function commit 1729a4f29dd52346a9fa997f818d57884047657f Author: Zhenyu Wang Date: Wed Jun 4 22:25:39 2008 +0800 xvmc: move block size lookup helper to generic commit 3cc8876db7ba82fa18e8fab4f267ac6e87964c47 Author: Zhenyu Wang Date: Tue Jun 3 16:15:36 2008 +0800 xvmc: a little cleanup Also safe check context size to not exceed surface max. commit 96955003557686469c7ae9f7d42620d2851e6fad Author: Zhenyu Wang Date: Tue Jun 3 16:13:52 2008 +0800 xvmc: remove unused dri drawable commit bd137a19dc29dd466eac030e040f729ed0807e3f Author: Jesse Barnes Date: Wed May 28 15:47:47 2008 -0700 Fixup DSPARB for 855 & 945 It turns out 855 has a different DSPARB layout than 915+. And 945+ have more FIFO entries, so we have to allocate things differently. So on 855 split the FIFO evenly again between A & B planes, and do the same on 945, where we have a larger FIFO. Fixes an issue reported by Daniel Stone with the previous default value. commit 3a967b8359bd6c05a10111076cdb02df15cbf2e8 Author: Eric Anholt Date: Mon May 12 13:51:11 2008 -0700 [gem] Note if pinning a buffer fails. commit 363ccc3dfbf8ab91608d502e0376a43653581856 Author: Jesse Barnes Date: Mon May 26 09:43:40 2008 -0700 Fixup FIFO comment What I originally checked in was a bit misleading. commit 2e1425246ccc75216247b0c2fa6fce2635db472b Author: Jesse Barnes Date: Mon May 26 09:40:10 2008 -0700 Handle display FIFOs better Add some debug code to catch FIFO underruns, which are normally bugs (unless they occur during mode setting) and remove any plane C FIFO allocations, since we don't use that plane at all. We may eventually need to be a little smarter about this on platforms that use plane C for the popup. commit 89bb53cc7a853d88fc34a0ca65ae2b6227a8dd24 Author: Jesse Barnes Date: Mon May 26 09:34:34 2008 -0700 Fixup power saving registers Update clock gating disable bits to match docs and allocate a power context memory area so that newer chips can save state and power down the render unit. commit ced4b4bb0c44b55feb5e32ddb860f1c1dc3bbde5 Author: Eric Anholt Date: Thu May 22 22:10:25 2008 -0700 [gem] Reduce console spam from debugging. commit 165c0865d849b7d280a3a119fe9ae0ad34637df0 Author: Alan Coopersmith Date: Wed May 21 14:56:27 2008 -0700 Define DEFFILEMODE for OS'es that don't have it commit 71180653825a1b141a08590e4b767d33d9b5d8c1 Author: Jesse Barnes Date: Wed May 21 11:51:55 2008 -0700 Revert "Disable FBC by default on 965GM" This reverts commit 53e3693ef13f31f3fc33bcff7286ab2b03b2d430. Conflicts: src/i830_driver.c - default FBC on for 965+ commit 740a73dad1d9a9b0ebf1cc7d6f2a056abad57aaf Author: Zhenyu Wang Date: Tue May 20 08:54:01 2008 +0800 Revert "Add FIFO watermark regs to register dumper" This reverts commit 0c00a638ef57aa9d6a3047176b0bfad733f781f0. Those FIFO watermark regs are 945-ish, and cause problem on G35. commit c81050c0058e32098259b5078515807038beb7d6 Merge: 9c9a5d0 e9532f3 Author: Keith Packard Date: Sat May 17 23:26:14 2008 -0700 Merge commit 'origin/master' into drm-gem commit 9c9a5d0e48c6e911574695fc417d2dc1a0fd1c20 Author: Keith Packard Date: Tue May 13 12:24:50 2008 -0700 Add check for GEM, use that to enable driver GEM support commit e9532f3abf1e0b62b2569d4aae60a5a63add571f Author: Rémi Cardona Date: Wed May 14 14:52:37 2008 +0800 Add glproto to DRI dependencies commit fe455a38cbac8d47a5c82b3eeb3cc6a59a6e8443 Author: Eric Anholt Date: Tue May 13 11:56:10 2008 -0700 Formatting fixes for intel_idle. commit 5c1720ecbc5528c40bb48084dc68ef233e9bb43b Author: Eric Anholt Date: Mon May 12 16:48:05 2008 -0700 Add i915 support to intel_idle. commit 089011daf3da8db3bd16d50e1d6a6457da82300e Author: Keith Packard Date: Mon May 12 12:18:19 2008 -0700 Track name changes in GEM ioctls. allocate → create unreference → close name → flink commit 10f1d835b8ac7bf3153ac39d295ad2a72c4aa076 Author: Keith Packard Date: Mon May 12 12:15:09 2008 -0700 Record alignment requirements in mem structure for use by GEM. GEM needs memory alignment requirements sent at pin time, which is a bit after the allocation itself. Store the required alignment in the memory object for later use by pin. commit 5103e5a39a4869a714b8a59da8bf51ecc8c65e4f Author: Jesse Barnes Date: Mon May 12 10:58:24 2008 -0700 Panel fitting: fix letterbox modes In full_aspect mode, we try to preserve the aspect ratio by adding either top & bottom or left & right borders. In the letterbox case (top & bottom borders) we were miscalculating the top border which led to programming a bad mode. Fix the calculation and bug #15559. commit f280c50dd5d29c5717adc6da2368363cb3d0adbb Author: Zhenyu Wang Date: Mon May 12 08:57:56 2008 +0800 Revert last HP 965GM pipe A quirk Seems not resolve the issue (fdo bug #15885). commit d91d9e6a2f2ba18b35cb6fd7bc3fe8bc617eb44f Author: Bryce Harrington Date: Sat May 10 07:58:59 2008 +0800 More Pipe A force quirks commit 548d4c0f979a72eac5d0c9c76da12f0bd05e64e1 Author: Zhenyu Wang Date: Thu May 8 12:43:30 2008 +0800 Fix i965 render getting dest format error Depend on value returned by function within assert is wrong. Fixed weird render corrupt on i965. commit 9f324860431ff8199a78d19bbaa74046e1476b89 Author: Mike Isely Date: Thu May 8 10:00:17 2008 +0800 Implement option to ignore external fixed mode settings The Intel xorg driver tries mightily to determine the native fixed panel mode settings for the LVDS output. It does this through various means, including scanning video BIOS tables, and noticing if the pipe in question has already been set up by somebody else (and adopting those timings). This strategy works well for say a laptop where the LCD panel is an integral part of the machine. But for other applications where the display is unrelated to the system's BIOS or other software, then the BIOS will likely have no clue how to configure the LVDS output. Worse still, the BIOS can simply "get it wrong", leaving the pipe misconfigured. Unfortunately the Intel driver can potentially notice this, adopt the same settings, leaving a messed up display. All of this complexity normally happens independently, behind the scenes, from the mode timings that might otherwise be specified by the user. This driver has a concept of fixed, i.e. "native" mode, and then user-specified mode. If the corresponding resolutions between those concepts don't match, then the driver in theory will arrange for scaling to take place while adhering to the actual native mode of the panel. Said another way, if the user says 800x600 but the driver mistakenly (see above) thinks the native mode is 640x480, then 640x480 is the mode set with scaling to an 800x600 frame buffer. If the driver gets the wrong native mode, then the result is a miserable mess with no way for the user to override what the driver thinks is right. This patch provides a means to override the driver. This implements a new driver option, "LVDSFixedMode" which defaults to true (the normal, probe-what-I-need behavior). However when set to false, then all the guessing is skipped and the driver will assume no fixed, i.e. "native" mode for the display device. Instead with this option set to false, the driver will directly set the timings specified by the user, providing an escape hatch for situations where the driver can't correctly figure out the right mode. Under most scenarios of course, this option should not be needed. But in situations where the Intel video BIOS is hopelessly fouled up related to the LVDS output, this option provides the escape hatch for the user to get a working display in spite of the BIOS situation. Signed-off-by: Mike Isely commit 33f033cbf346c13a687e469e8879579fcd5bb2fb Author: Jesse Barnes Date: Wed May 7 14:46:52 2008 -0700 Save/restore cursor registers There are lots of good reasons for doing this, one of them is fdo bug #11305. commit a7188b1f2dd9a69fa7daefe478d283735226f9f3 Author: Zhenyu Wang Date: Wed May 7 14:21:59 2008 +0800 Use I830FALLBACK when check pitch for debug commit 79fde3ad7a949fb7f0dc9907cb6eea6ca9a910ae Author: Zhenyu Wang Date: Sat Apr 19 08:54:38 2008 +0800 Check pitch for EXA operation 2D pitch limit applys to all chips. Pre-965 chip has 8KB pitch limit for 3D. 965 supports max pitch by current exa (128KB). (cherry picked from commit 8187a5a16f8bd8f0ba5e7f5357f355928b3b8f07) commit 36ec93300926084fb2951d69b001e4c67bc6ff79 Author: Eric Anholt Date: Tue May 6 18:48:20 2008 -0700 Bug #15807: Fix use of the ring while VT-switched, hit by fast user switching. The fix for flushing at blockhandler with no DRI on 965 was broken and would try to flush the chip even when the driver wasn't in control of the VT. Hilarity ensued. commit 0c00a638ef57aa9d6a3047176b0bfad733f781f0 Author: Jesse Barnes Date: Tue May 6 14:38:48 2008 -0700 Add FIFO watermark regs to register dumper commit c81a4687fca80bf7367d7f0e9a00a6a09737c5bb Author: Zhenyu Wang Date: Tue May 6 13:52:22 2008 +0800 Only check xvmc lib when xvmc is enabled. Don't check xvmc lib if user has already wanted to disable it. Fix fdo bug #15762. commit be746a90a87d7a9807fa4243493e7e4d48f7f1c0 Author: Bryce Harrington Date: Tue May 6 13:51:46 2008 +0800 More quirks from ubuntu/dell commit 417f86d80525d2f5038628afba8f70f8c0fecca3 Author: Keith Packard Date: Mon May 5 13:36:19 2008 -0700 Move a declaration under #ifndef HAVE_FREE_SHADOW commit 587dc5bfc4ef32942bd7511f932a3a2e2fcdccb0 Author: Keith Packard Date: Mon May 5 13:35:22 2008 -0700 Fix up ring dumping code for non-i965 commit 65877d32bb2cd71ccc8d6a66244f029fc3577f69 Merge: b9d12da fff17b9 Author: Keith Packard Date: Mon May 5 12:05:00 2008 -0700 Merge branch 'master' into drm-gem commit b9d12da91eb1afb05bd78a40e15f4333e697093d Author: Keith Packard Date: Mon May 5 10:44:09 2008 -0700 Use GEM for buffer naming now. commit 0741020f3725c32c48ad15535b9c0549e4092c23 Author: Keith Packard Date: Mon May 5 10:17:01 2008 -0700 Set pin alignment for gem on non-965 non-965 tiled frame buffers have fairly strict alignment requirements, 512K on 8xx and 1MB on 9xx, plus they must be aligned to the size of the allocation. commit 271abfd0ec29851273d8ca5241d963be5c64e43c Author: Eric Anholt Date: Fri May 2 10:06:13 2008 -0700 Add initial GEM hacks to bring the server up. commit a0ced923bb793aa22e6bfbeeec0888d3b42ce176 Author: Jesse Barnes Date: Tue Apr 29 13:19:02 2008 -0700 Add a new quirk for BIOSes that reprogram regs at lid close/open time Dell Latitude D500s seem to have this problem. At lid close/open, the DSPABASE reg gets reset to 0, so we either need to keep the framebuffer at offset 0 or make sure we reprogram the CRTCs after the lid opens again. Since we can't make sure the former is always true (buffer resize, etc.), this patch adds a quirk to reset the modes at lid open time. Fixes FDO bug #14890. commit fff17b9d1b58cb53032d153094826dd306836d59 Author: Keith Packard Date: Tue Apr 29 10:32:14 2008 -0700 Use new xf86RotateFreeShadow function to clean up shadow buffers. This simply moves code from the driver up into the X server; use it where available. commit 1d467a8038946a37844795e8860be113d43219ac Author: Keith Packard Date: Wed Apr 23 11:08:38 2008 -0700 Overlay video doesn't require that the target pixmap be in video memory. I830PutImage was checking to make sure the target pixmap resided in video memory, but this isn't necessary when using the overlay. Test commit 40e0a03af57d7b3180d7066bcb15e03dcc9ca295 Author: Keith Packard Date: Mon Apr 21 01:03:22 2008 -0700 Dump batch buffers found from main ring commit c8ae3b781f0d8e325876a74c91cd0a685d34454b Author: Keith Packard Date: Sun Apr 20 02:11:15 2008 -0700 Add a bunch of 965 ring stuff to the debug dump commit 2c135ef8ac40f8e7cd071de7414adfae019f9198 Author: Eric Anholt Date: Wed Apr 16 21:39:58 2008 -0700 Make the binding table and surface state be arrays to reduce syncing. commit c3fb62df4e60b63295f94c99b3c5de70dbf94e1c Author: Keith Packard Date: Thu Apr 17 10:04:55 2008 -0700 Add a kludge-around to fix cd/wt bits in fb ptes on linux. Mmap from /sys/devices/pci* on linux forces the cache-disable and write-through bits, which turns our write-combining map into an uncached-map, seriously impacting performance. It turns out that a bug in mprotect allows us to fix this by disabling access to those pages and then immediately re-enabling them. commit 0ae283582d21776d3317d5fc1c25751d50d562c7 Author: Hong Liu Date: Thu Apr 17 10:57:34 2008 +0800 fix possible segfault in I830FreeScreen pI830 may point to NULL if I830PreInit fails commit 7008eac855302fd467e001495483c2dccfddf68f Author: Eric Anholt Date: Wed Apr 16 12:09:41 2008 -0700 Update dolt from git, fixing fallback to libtool. commit 23d1df22d177e54bfc46304053d8115047ff85d4 Author: Eric Anholt Date: Mon Apr 14 16:46:17 2008 -0700 Abstract surface setup into a separate function. commit e27ce4238f748d024635835824c120eb298b84b2 Author: Eric Anholt Date: Mon Apr 14 23:30:21 2008 -0700 Move the vertex buffer to the state structure as well. commit 69709fe36cfdb59c140f5cba233dcb606f8dbc85 Author: Eric Anholt Date: Mon Apr 14 18:34:13 2008 -0700 Move the binding table for 965 to the state structure. commit 049d057dfd73b6c191a8ba5d73eddb77cf7748e7 Author: Eric Anholt Date: Mon Apr 14 17:09:22 2008 -0700 Move the 965 static variables local to the function they're used in. commit 092962c962fdf3e33a8d387221448fe7c8c36376 Author: Eric Anholt Date: Mon Apr 14 14:02:58 2008 -0700 Make the VS unit state static for 965 render. commit 4bbdd7096d4927fe48673006fff7df922972f116 Author: Eric Anholt Date: Mon Apr 14 13:53:36 2008 -0700 Rename some variables in i965_render.c for clarity. The gen4_render_state is now always called "render_state" (i965_render.c bookkeeping) and gen4_state_t is now always called "card_state" (the buffer for state used by the chip). commit 456bb529335c28cf60f3b6e5900b804efa5c185a Author: Carl Worth Date: Fri Nov 9 17:24:21 2007 -0800 Associate one sf_state object with each sf_kernel (cherry picked from a2b5c23184d19b386fdfd04f578a55566df60132 commit) commit 90d6b178473ba32cf66e6e654e608cb4374e4a19 Author: Zhenyu Wang Date: Mon Apr 14 16:31:03 2008 +0800 Change default panel fitting mode to origin i8xx currently only works in FULL mode. (cherry picked from commit 33ffd781bbca3d0dee8c1b47e7b90be5824b9a4f) commit c1ad0a1a344a87a537aa5f93f6c774997a3189e4 Author: Zhenyu Wang Date: Mon Apr 14 10:02:00 2008 +0800 Remove old sf/wm program from Makefile Fix distcheck (cherry picked from commit 1d8383923bebf38ab8ada6a262cb4fc8c30e074a) commit 18ef4158e5574bfc6621b268821532f13e261d13 Author: Keith Packard Date: Sun Apr 13 21:37:49 2008 -0700 Only use FOURCC_XVMC when INTEL_XVMC is defined The XVMC code uses a magic FOURCC code to signal frame updates, but that code is only defined when the XVMC code is used. commit 269809030ee9d08b56ad0178a7a9c0194e25785e Author: Keith Packard Date: Sun Apr 13 12:47:02 2008 -0700 Move wm_scratch first to meet alignment requirements commit 08d3206f3b891e611e3e16c9eb79cfca21ab8a51 Author: Keith Packard Date: Sun Apr 13 12:35:14 2008 -0700 Kludge to make planar video work - duplicate sampler state This patch duplicates all of the surface sampler state needed to read from the separate YUV surfaces and then has the planar sampler read from samplers 0, 2, 4 instead of 0, 1, 2. This appears to make things work, instead of having the samplers break at random. I do not understand why this works. commit 6366e4de540c4713cbc8402c89516464bbdc35b9 Author: Keith Packard Date: Sat Apr 12 16:39:00 2008 -0700 Skip copying on FOURCC_XVMC surfaces commit 0fec42b64ee529eb7ec15febdaa5e4986ec1ab17 Author: Keith Packard Date: Sat Apr 12 11:01:14 2008 -0700 Set some mask bits to try and get yuv conversion working commit 91d3e19786e22061f4b617cf39a3cd713139a2d9 Author: Keith Packard Date: Sat Apr 12 11:00:51 2008 -0700 Use compressed instructions for yuv conversion commit 03836067b77606c134c71b30c7078d09d77c95fa Author: Eric Anholt Date: Fri Apr 11 12:17:28 2008 -0700 Fix the offset to sampler default color, and a compiler warning. commit d3138d9ff0f821fb3adbd27684b0c22a8a910c3e Author: Carl Worth Date: Tue Nov 13 12:37:13 2007 -0800 Enumerate all possible wm_state objects We have a collection of wm_state objects for each ps kernel, (one for each combination of src and mask extend and repeat values). Thanks to Dave Airlie for noticing an errant write through a wild wm_state pointer in an early version of this commit. (cherry picked from 7763706a93d3021907273f9b330750ba110e2fc3 commit) This cherry-pick required more reformatting than most, due to the projective texturing merge. commit 2293a3677d1dcf294de6a8712bf0d2f65b50dcc3 Author: Carl Worth Date: Mon Nov 12 16:09:00 2007 -0800 Enumerate all possible src,mask sampler state pairs This will eventually allow for the elimination of sampler state updates while compositing---and initializing everything in the initialization function. (cherry picked from commit d0874697be8086cd64740c24698df8cd4d31c76f) commit da85d1b822dcb31698e9c5ab85a7bb27ad745eee Author: Keith Packard Date: Fri Apr 11 11:22:29 2008 -0700 Revert "remove '#line NUM ...' in macro process" This reverts commit f47486fab3dffcbb03e7ad89f777abba1e887299. Sorry for failing to push the #line processing changes to intel-gen4asm; those are now pushed, so this change should no longer be necessary. Having correct file name and line numbers in the error messages is awfully nice though. commit f47486fab3dffcbb03e7ad89f777abba1e887299 Author: Zhenyu Wang Date: Fri Apr 11 10:12:40 2008 +0800 remove '#line NUM ...' in macro process intel-gen4asm doesn't allow '#' line commit 5c9cde37e769287fb7bf4e08c3600a33c2e92dce Author: Hong Liu Date: Fri Apr 11 09:54:34 2008 +0800 Bug #14935: Fix i9xx reference clock for spread spectrum. commit 152a50703aa5e9ebaa9abbe448518742734a5eb7 Author: Eric Anholt Date: Thu Apr 10 16:06:41 2008 -0700 Fix compiler warning from 24-bit lvds change. commit baa55ffe3b67ca952e4d1ef7087335d76eb2f24b Author: Carl Worth Date: Tue Nov 13 12:56:13 2007 -0800 Enumerate all possible cc_state objects We need one for each possible combination of src and dst blend_factors. Again, as with recent changes, this eliminates state updates from prepare_composite and allows that function to instead simply reference an existing object initialized within gen4_state_init. Thanks to Dave Airlie (and git-bisect) for pointing out that with gnome-terminal all text was appearing as solid black with an early version of this commit. As expected the bug was an alignment issue. (cherry picked from 0c0ab52c2d100c47f38c7ef826ef585c8b9815e9 commit) Performance is approximately equivalent on text tests, but may be around +2%. commit d5a80e1e3ab5724d34b20f9ee6f830efd0f5b076 Author: Keith Packard Date: Wed Apr 9 16:27:40 2008 -0500 Single memcpy when pitches align on planar image transfer commit ac97f2b1487df5574875350a9cded958dae33afa Author: Keith Packard Date: Wed Apr 9 16:27:23 2008 -0500 Use available symbolic register name commit f270456e5612cb88933e6aabcd9a816c5c292229 Author: Keith Packard Date: Wed Apr 9 10:00:08 2008 -0500 Remove .g4b files on clean commit fb6ed8b8b59e9dd18801afef5d7c62042ad176d7 Author: Keith Packard Date: Wed Apr 9 09:58:44 2008 -0500 Update yuv->rgb conversion programs to write to src_sample regs The YUV->RGB code was written to write directly to the dataport registers, but that didn't work for the compositing functions (cause still unknown). This change makes that code write RGB values to the src_sample registers as with the other sample computation fragments. commit b01d582e23fc99e32bc47a395e9caa366731372a Author: Keith Packard Date: Wed Apr 9 09:30:35 2008 -0500 Revert "Compute pixel values directly into data port" This reverts commit 346cf57deabb4c336612df4c13650a87b5ef6775. Mixing randr transforms and video caused screen corruption for Render operations. No, I don't understand why. commit 3fc3d1a701bae257b70aa7b7654c722f30e71399 Author: Keith Packard Date: Wed Apr 9 02:02:56 2008 -0500 Remove sync after 965 video put. The hardware has been marked as needing a sync, so the next video put will block waiting for the previous one to complete. Adding a sync here just stalls the video playback for no good reason. commit 825d9e50c59450f07178a54fed2616e551dc0455 Author: Keith Packard Date: Wed Apr 9 00:09:34 2008 -0500 Add planer video decode kernel Support for planar video reduces bus bandwidth by 25% and also reduces CPU usage during planar->packed conversion. commit a03eaaa67b33c57530e92c53d28917e2563b4427 Author: Keith Packard Date: Tue Apr 8 16:24:55 2008 -0500 Use shared exa_wm code for packed yuv decode Eliminate special video sf and ps programs. commit 32ef98518394d29cb87405005c660278489396bb Author: Keith Packard Date: Tue Apr 8 16:21:55 2008 -0500 Compute pixel values directly into data port Instead of leaving pixel values in src_sample registers, compute the pixel values directl to the data port to save 8 moves. This cannot work when no computation is done as there is both no way to wait for the sampler to finish and because the sampler returns data in a different order from that required by the data port (sigh). commit b68d9f4245d0ebe3371c179401ff145f1a4d101b Author: Keith Packard Date: Tue Apr 8 16:09:00 2008 -0500 Use symbolic names for channels in YUV code commit 781be9d47289713b0a8fcd95c769a9c6241d62e9 Author: Keith Packard Date: Tue Apr 8 16:08:20 2008 -0500 Rename src/mask/data registers to indicate channel commit 2871ac8eefd0192080bb0569140c3f5d0e1d9b44 Author: Eric Anholt Date: Thu Apr 10 13:34:13 2008 -0700 Statically allocate the sampler default color, which we never change. Performance change is in the noise. Also from Carl Worth. commit 80dd784e33847e431403d4659a7b8d8425b2676f Author: Eric Anholt Date: Thu Apr 10 13:24:51 2008 -0700 Add copyright information for recent editors of this file. commit b606278db83ec84b1db562a2d65697c50561b169 Author: Eric Anholt Date: Thu Apr 10 13:17:58 2008 -0700 Keep static copies of the 965 render programs in video memory. This reduces the CPU overhead of memcpying them in every time, for a speedup in aa24text of around 30%. This is based on work by Carl Worth which is in the intel-batchbuffer branch. commit bd41d2bb858770c109d5013274a4354e8e6ae32d Author: Eric Anholt Date: Thu Apr 10 10:24:48 2008 -0700 Add dolt to speed up compile time and reduce insanity. Hopefully some day we can be rid of libtool entirely. commit 96ae9a9f0abc582e45ff4e17dd213c8739c24cb3 Author: Eric Anholt Date: Wed Apr 9 14:17:29 2008 -0700 SDVO: Rename output_dtd variable to input_dtd, which is its new job. commit 72c3995d5158286d20e97296f4552697f32f935f Author: Eric Anholt Date: Tue Apr 8 15:00:18 2008 -0700 SDVO: Set adjusted_mode in mode_fixup from the preferred input timings for TV. commit b61178524bece756dc0fd4f798c6c7743b5725db Author: Eric Anholt Date: Tue Apr 8 14:11:42 2008 -0700 SDVO: Fix lols TV mode list handling. commit 5db73f18d2badec37523850024b9aa824e4e6bd8 Author: Eric Anholt Date: Tue Apr 8 13:53:51 2008 -0700 SDVO: Use the TV reference clock for SDVO TV outputs. Based on a patch by Will Wiseman. commit e031cc02e65acfbafb48136dad414751e04425c5 Author: Mike Isely Date: Wed Apr 9 14:15:03 2008 +0800 Implement support for 24 bit pixel format The Intel driver appears to be coded to only work with displays expecting 18 bit pixels. However I have an application using a LCD display that expects pixel data in 24 bit format. The difference is only 2 bits in a single GPU register. This patch implements that change, controlled by a new driver option, "LVDS24Bit". The default value is false, which is the previous behavior. When set to true, then 24 bit panels should work (at least the one I'm testing here does). Fd.o bug #15201 Signed-off-by: Mike Isely commit 79b18980ac9f60b1978abe421352df965aed1681 Author: Zhenyu Wang Date: Wed Apr 9 14:03:45 2008 +0800 Include in i810.h for integer types definition commit 2b720262e1235f1c9da860ba3e9181f0c377aa5e Author: Jesse Barnes Date: Wed Apr 9 17:34:17 2008 +0800 Fix LVDS regression Disable panel fitting on 855GM, and fix dither setting. commit af92f4f885c8eae2211d09080b2289aa5bab9ec1 Author: David Schleef Date: Tue Apr 8 12:43:20 2008 -0700 Bug #15219: Fix default overlay CSC factors, and use BT709 if available. Using the updated factors even when BT709 conversion isn't available (non-965) should still give us better color reproduction. Tested on a 945GM, examining the +/-5% of black bars of videotestsrc. commit 37bc23660a8c346f1eaa6c93ed2c7a840828f0b0 Author: Bryce Harrington Date: Mon Apr 7 17:26:49 2008 +0800 Quirks from Ubuntu/Dell FD bug #15353. Launchpad bug ID is available for reference. (cherry picked from commit 24248097988775d62f6c416f2988e74d31c91cd0) commit dcbdc901d64d2fab489292ef1c9ca1490bdd1e94 Merge: 0147c1c 13563bd Author: Keith Packard Date: Fri Apr 4 19:19:35 2008 -0700 Merge commit 'origin/master' into projective-965 commit 0147c1c84872f7a109721a53d88a539932d9be81 Author: Keith Packard Date: Fri Apr 4 19:17:55 2008 -0700 Forgot to build exa_wm_src_sample_argb.g4b commit 13563bd65cbbbb3e697dacd814efa3517e1493dc Author: Hong Liu Date: Wed Apr 2 16:05:43 2008 -0700 SDVO: Fix DDC bus selection based on output priority list. commit 6ad2d6ba86689674876f5f4c473f11e39243ac38 Author: Eric Anholt Date: Wed Apr 2 15:16:17 2008 -0700 SDVO: Fix mixups with input and output channels. The 2-bit input_mask was actually an input count -- in0 is always there, and in1 is optional. The output flags weren't being reported in the log, so I mistakenly took controlled_output == RGB0 to mean that the device only reported an RGB0, while it actually reported RGB0|SVID0|YPRPB0|misc|other. Move SVID0 up in priority and remove the RGB-is-it-really-TV hack I had just come up with. Finally, set the input/output mapping at mode set time. We're always supposed to do this, but haven't had to so far as we've never handled devices with more than one output. commit 3a17400dc67534f0eb474ece080f01061469569c Author: Eric Anholt Date: Wed Apr 2 14:21:23 2008 -0700 SDVO: Handle RGB outputs that are really TV outputs, and select a TV format. Still doesn't light anything up. commit 3c1701797b61afaae826a78455079e2115483053 Author: Eric Anholt Date: Mon Mar 31 10:04:18 2008 -0700 Add WIP SDVO TV-out support. Doesn't include properties for selecting TV formats or picture enhancements, and totally untested. commit 9d5ba26fb5c337388920b45eadda85e43bc564fa Author: Eric Anholt Date: Fri Mar 28 14:28:28 2008 -0700 Add SDVO TV-out registers. commit 90886f9a602d58b754e9a8d0f1a9c40803d34fa2 Author: Keith Packard Date: Tue Apr 1 00:54:13 2008 -0700 Remove extra flushing commit 0836373dc6e2f8612f120074980561f7ac11f6f7 Author: Keith Packard Date: Tue Apr 1 00:16:05 2008 -0700 Add projective versions of the PS kernels commit bfd803e085e938866efb45c67a79facef78ec399 Author: Keith Packard Date: Tue Apr 1 00:06:08 2008 -0700 Shrink WM thread to 32 registers and 1024 scratch space. Saving registers means we can run more in parallel. commit a6492661ae07310128eb73c3ef037c42ce7ab184 Author: Keith Packard Date: Mon Mar 31 23:50:20 2008 -0700 Fix composite with mask using new compositing thread code Clean up register allocation to never overlap Always write 4 values for each texture vertex. commit f8081178eb6fda0e405967cbacad532561619262 Author: Keith Packard Date: Mon Mar 31 12:06:37 2008 -0700 remove old shader source files commit 879f8717b09f79156b218ee9cc2107700190d586 Author: Keith Packard Date: Mon Mar 31 12:05:56 2008 -0700 remove old monolithic shaders commit 6db8faeb754897b21af045d00f50db9640b080bb Author: Keith Packard Date: Mon Mar 31 12:04:00 2008 -0700 remove old monolithic shaders commit 6bb92213374f278387c539bbe05b773e87e11b90 Author: Keith Packard Date: Mon Mar 31 11:59:14 2008 -0700 Back to new shaders, fix urb read length commit 05710145b6fc4ed2c528128b2e6022591a53d050 Author: Keith Packard Date: Mon Mar 31 11:31:31 2008 -0700 Dont set the compr bit on 8-unit sends commit 08500507284f13ad7084eb231b43e117e9728129 Author: Keith Packard Date: Mon Mar 31 02:20:43 2008 -0700 Use m4 to clean up gen4 asm progs. Start adding projective transform support. Use macros for register names, modularize functions into separate files. commit 949d73271d7100c1f028fd60f185f4929461304e Author: Keith Packard Date: Sun Mar 30 19:19:46 2008 -0700 Remove rotation sf and wm progs commit 492ff1494f782240e6ca68919b2d0b9aa400fc53 Author: Keith Packard Date: Sun Mar 30 19:14:18 2008 -0700 Fix the sf_mask program to compute and pass corrected uvw cooefficients sf_mask is the same as sf except that it must compute both src and mask uvw cooefficients, which are conveniently adjacent in the same registers, and so need only an extended execution width commit 6304b38423f99190a5e54f1a7dcaa75adfad4f2a Author: Keith Packard Date: Sun Mar 30 00:54:51 2008 -0700 Reimplement wm program for nomask case to handle affine transforms This involves correctly computing u/v locations based on x/y vectors and line constants computed in new sf program. Also, use fewer instructions to make this go a bit faster (2X for 500x500 composite). commit 771a56b1ed0df69345c723cb62a73b6842cd8227 Author: Keith Packard Date: Sun Mar 30 00:54:07 2008 -0700 Clarify comment in exa_sf program commit 4f469189fed541549e5d470b2529275a29cc2f20 Author: Keith Packard Date: Sat Mar 29 14:28:05 2008 -0700 Compute du/dv/dw in no-mask SF prog commit 7dcb6e627449c80cea9812462ce6a3e125bd1240 Author: Keith Packard Date: Sat Mar 29 14:27:35 2008 -0700 Disable cursors while switching modes commit d50264fc7c4e0f80d9cc68dfdf322f68520a0f1e Author: Eric Anholt Date: Fri Mar 28 15:15:26 2008 -0700 Add a "total" field to intel_idle output (set when any unit is busy). commit 1450acd046d47e1739a3ffbd146c73ad2974a935 Author: Jesse Barnes Date: Fri Mar 28 13:23:02 2008 -0700 Use combo backlight control rather than pure legacy If the legacy bit is set, use both the BLC_PWM_CTL and LBB regs to control the backlight, rather than just LBB. Looks like more platforms want that than what the current code does. Note that kernel provided interfaces will always be used if available, so this shouldn't affect users with /sys/class/backlight interfaces at all. Fixes #14721. commit 49f409fef5e8b04a8595309ba8959ca36b2e41b1 Author: Matthias Hopf Date: Wed Jan 9 16:31:41 2008 +0100 Include missing stdlib.h for free() commit 3414313ac9d0faa95797ee18cc33afa231ec7581 Author: Matthias Hopf Date: Wed Jan 9 16:08:57 2008 +0100 Fix obviously wrong verification of DRI_SUPPORTS_CLIP_NOTIFY. commit c40f195f2dc3467259b4588e087aac9741003ebf Author: Matthias Hopf Date: Wed Jan 9 14:40:49 2008 +0100 Fix obviously stray '(' in non-I830_USE_EXA case. commit 7bba2c13310ed5ac22a355a3cc0ec8b7afaa79cf Author: Zhenyu Wang Date: Fri Mar 28 11:41:24 2008 +0800 Disable DRI earlier if fb width > 2048 commit b1f358ba97473b792ec2b7ed5170152faebe7262 Author: Zhenyu Wang Date: Fri Mar 28 11:29:40 2008 +0800 Disable overlay on new mobile chipset It's gone, really. commit 588371ba15afffa9343629f0ea7ce530586eef0b Merge: 52d6ced c13efdd Author: Jesse Barnes Date: Wed Mar 26 14:53:15 2008 -0700 Merge branch 'master' into pfit commit c13efdd3d6d3846078766814b57306a7519bce18 Author: Paulo Cesar Pereira de Andrade Date: Wed Mar 26 10:11:36 2008 +0800 More compile warning fixes. o Check for RANDR_GET_CRTC_INTERFACE before defining functions that are used only if it is defined. o Declare a variable before code, and rename it from ret to xvmc_status to better describe it. o if 0 some static functions not used. o Don't declare some unused variables. o Declare as static some functions that are used only in the file defining it. o Add a default/fallback return True to the Bool function src/xvmc/intel_batchbuffer.c:intelInitBatchBuffer(). o Ansify src/xvmc/xf86dri.c. o Add missing prototype to src/xvmc/xf86dri.h and follow pattern of other headers by adding "extern" before function prototype. commit 8cdbd55f8075cd18b563badde35815665d7d053e Author: Eric Anholt Date: Tue Mar 25 10:06:14 2008 -0700 Fix 965+ rendering issues with DRI disabled. The new chips no longer automatically flush the rendering cache, so if we don't flush the RC at blockhandler, the last rendering done may not appear on the screen. This was particularly noticable with a bare Xorg with some missing root weave, and terminals where the last character wouldn't appear until the cursor blinked. A flush in the DRI blockhandler path had hidden this issue for most people. commit c02ab432dd7058c700c35eecf6215daf5f262c51 Author: Eric Anholt Date: Mon Mar 24 13:48:20 2008 -0700 Revert "Use mprotect on unbound AGP memory to attempt to catch use while unbound." While I still like the idea, the mprotect calls themselves are failing on Linux and causing more trouble than they're worth. This reverts commit a1612b7728d4153499fe86b6713a13c8702cc7d9. Conflicts: src/i830_driver.c src/i830_memory.c commit 552a1b824db31a234d7c5cb71057ed0e0ce64477 Author: Eric Anholt Date: Mon Mar 24 13:25:37 2008 -0700 Disable a bunch of clock gating disables on IGD_GM, which doesn't need them. Besides our driver having fallen through to the GM965 path for RENCLK_GATE_D1, the BIOS was turning some of these on. It may be relevant for previous platforms as well to zero out the fields that should be zero in the other registers. commit c1a2bc357fc122d3718eca771530367ba2915815 Author: Julien Cristau Date: Mon Mar 24 13:29:24 2008 +0800 Don't try to build XvMC if DRI is disabled Instead of failing the build, don't even try unless --enable-xvmc was used. commit 5fcc002f77ebb66c1dc0f901a377ccf9bbc1d0bd Author: Maxim Levitsky Date: Mon Mar 24 13:24:12 2008 +0800 Fix crash triggered by dpms low power mode with hardware overlay running When overlay switch crtc, it ignores current crtc dpms mode which might lead to hang. commit 645980596450ed21c3b8927410a6bfe38a0c55d1 Author: Keith Packard Date: Fri Mar 21 03:08:24 2008 -0700 Transformed coord computed using floats. Don't move bilinear composite dst. The homogeneous coordinate computation in the core server cannot be used for many legal matrices as it overflows. Just use floats in the driver; faster and avoids troubles. When compositing with bilinear filter, don't push the dst coordinates around as that makes the output blurry when pixels are aligned. commit bf725b92cf93d74a6f414f81f319dddbc2c78525 Author: Zhenyu Wang Date: Fri Mar 21 11:50:27 2008 +0800 xvmc: fix distcheck Add i915 headers in Makefile.am commit e8da1a5418ab240ae7b1ef95bfea6bee22f1e0c1 Author: Joerg Sonnenberger Date: Fri Mar 21 11:41:49 2008 +0800 Fix DRI config for NetBSD Reported by Joerg. This does a little more clearn up. commit 224c36cc14a7552bc5df793ad582f0ea5349eb1e Merge: 4b9b7b0 03ccffd Author: Zhenyu Wang Date: Thu Mar 20 10:31:57 2008 +0800 Merge branch 'xvmc' commit 52d6ced652059989e6d9780a149488ccd16e3a22 Author: Jesse Barnes Date: Wed Mar 19 11:59:15 2008 -0700 Fixup backlight control and panel fitting property names They should be listed as lower case, since that's what you'd pass to xrandr. commit 4b9b7b007d729f94b01b0031d8ae478134b501da Author: Keith Packard Date: Tue Mar 18 14:08:19 2008 -0700 Handle projective transforms on 9xx for Composite. Projective transforms require un-normalized texture coordinates and the use of the texldp instruction. The coordinates are passed as x/y/z/w (the z is unused, but there isn't a vertext format for just x/y/w). commit f699389818f1f11f3edddcdddcd0a43be21ba4c0 Author: Keith Packard Date: Tue Mar 18 14:06:47 2008 -0700 Add i830_transform_is_affine and i830_get_transformed_coordinates_3d. These are needed to deal with projective transforms in the composite operation. commit a55974b435224fe5726fa44298d051c71e4056a5 Author: Keith Packard Date: Tue Mar 18 13:47:20 2008 -0700 Add defines for 9xx S3 word in 3D_STATE_LOAD_STATE_IMMEDIATE These aren't used at this point, but what the heck. commit 4f5500abe209b92b39ae1f2d7a1118362ac95034 Author: Keith Packard Date: Tue Mar 18 13:45:46 2008 -0700 8xx/9xx can handle textures to 2kx2k. 965 can do 8kx8k commit b1b173d03b3acd300c3b0f0ceffeddf1a8137839 Author: Julien Cristau Date: Tue Mar 18 12:02:25 2008 +0100 Add i8[13]0_ring.h to _SOURCES to fix distcheck Thanks to Bruno . commit 03ccffd5b9b8108166ea143884a1a0a6417f3236 Merge: ac76363 d72e18c Author: Zhenyu Wang Date: Tue Mar 18 16:54:15 2008 +0800 Merge branch 'master' into xvmc commit ac763634069fe070b3afc073ce437959612d39fe Author: Zhenyu Wang Date: Tue Mar 18 16:52:29 2008 +0800 Disable XvMC if DRI is not enabled. Default XvMC to disabled. commit d72e18c10995079121eded758a60ed99b5b8ce1a Author: Paulo Cesar Pereira de Andrade Date: Mon Mar 17 16:59:12 2008 +0800 Compile warning fixes. Move some declarations and don't declare an extra variable with the same name, to fix warnings about mixed declarations and code. commit 81df48d8d151907c2e9dd33a729860c39aa78175 Author: Zhenyu Wang Date: Mon Mar 17 10:05:57 2008 +0800 bug 15060: Dell Latitude X300 needs pipe A quirk commit ffb5a115cc62ed63110f77815b7f04976f720065 Merge: 05cf070 24e6eb2 Author: Jesse Barnes Date: Mon Mar 17 15:19:05 2008 -0700 Merge branch 'master' into pfit commit 24e6eb2ae683ed6614ac79c0d7811ac9fe94209f Author: Jesse Barnes Date: Mon Mar 17 14:17:27 2008 -0700 Add support for new ->get_crtc output callbacks Using the new interface allows the server to avoid some flicker at startup. commit 69fbc17441d0f894d17b058e65ae22300cd2a54c Author: Eric Anholt Date: Fri Mar 14 10:04:18 2008 -0700 Change OUT_RING and similar calls to OUT_BATCH for batchbuffer merge commit 65f92cfb7a05c9c028cf73ce1221cc0a651b50b3 Author: Eric Anholt Date: Fri Mar 14 10:03:11 2008 -0700 Remove h0h0 UploadToScreen implementation that used pattern blits. It never worked and was never that hot of an idea. Most of the motivation is gone with glyph pixmaps anyway. commit 05cf07071e25f84dec3476a9bed7235ed50cd249 Author: Jesse Barnes Date: Thu Mar 13 18:12:00 2008 -0700 Initial panel fitting changes Basic support for panel fitting. commit 402fbd36221d2ed27913850f6bfcce768b970fe8 Author: Jesse Barnes Date: Thu Mar 13 16:12:20 2008 -0700 Remove fbc enable/disable messages Tired of them filling up my logs. commit c20d78a7bc512219fa36dfc9707fe65f66ab80f1 Author: Eric Anholt Date: Mon Mar 10 17:27:45 2008 -0700 Add workarounds for 830/845's lack of a8/x8r8g8b8/x8b8g8r8 support. When we have unset channels (color for a8, or alpha for x8*), force them to the appropriate value in the texture combiner rather than relying on getting the desired results from teture mapping. Performance is the same on 865, so multiple paths aren't necessary and we can use the less friendly texture formats everywhere. commit f425181695b1b3864373e1919cf651229f19fa69 Merge: f4cfc98 1c0e495 Author: Zhenyu Wang Date: Thu Mar 13 23:58:56 2008 +0800 Merge branch 'master' into xvmc commit f4cfc98ab038af4d5d52af12e4d60ded62cf4a6e Author: Zhenyu Wang Date: Thu Mar 13 23:56:48 2008 +0800 nuke unneed error_base and event_base commit f269c69b4e7be076dc9838d0e0801c940ccdba08 Author: Zhenyu Wang Date: Thu Mar 13 23:41:22 2008 +0800 remove unused init/fini hooks for xvmc driver commit 1c0e4958564588162bc22a980567436dfc9d1e56 Author: Zhenyu Wang Date: Thu Mar 13 10:15:55 2008 +0800 Always bind memory after agp aperture allocation This fixed the crash appearing for Xv buffer memory, which appears allocation and free happening in stolen memory. We should always try to bind for stolen memory for correct protect setup, otherwise we might get fault that stolen memory protect reverted to non-r/w after previous free and unbind. Credit goes to Lukas Hejtmanek to identify the real problem of Xv crash! commit 2e2372912ed9bc0d86e8960653ef0bfce5cf99ab Author: Eric Anholt Date: Wed Mar 12 11:38:56 2008 -0700 Eliminate local variables defined in i830 BEGIN_LP_RING(). This lets us get better sanity asserts, and avoid mysterious braces when you do two BEGIN_LP_RING()s in a single function. Potential minor performance loss isn't too exciting, as ring access is about to become a compat path anyway. This change also removes the requirement for ring emits to be aligned to dwords. commit abf11a274e14535630742fe4c41cc0ae92555293 Author: Eric Anholt Date: Wed Mar 12 11:03:26 2008 -0700 Separate i810 and i830 ring macros out into separate files. I want to hack on i830 for changing it into a compat path for batchbuffer without having to worry about the i810 stuff getting broken. commit e04908853db74dc76718f6bc0dfb23b5ab3c5837 Author: Jesse Barnes Date: Wed Mar 12 15:44:58 2008 -0700 Add sysfs backlight support for Fujitsu laptops Tested by Dan Williams. commit 907399660b83b3939aab3dc7d0697197441e4ec8 Author: Jesse Barnes Date: Wed Mar 12 12:33:36 2008 -0700 Add stdint.h to DVO drivers Fixes the build for me (just following the git development guide on a new machine). commit 8563effc96195116c96f89a801c1de6ab982630a Author: Jesse Barnes Date: Wed Mar 12 11:14:17 2008 -0700 Add stdint.h to i830_bios.h Needed for new uint* usage. commit c82d8e51c6ff9522ad0deb33399d13f3d6fef19d Author: Jesse Barnes Date: Wed Mar 12 11:13:50 2008 -0700 Add pipe A force quirk for Thinkpad R31 Fixes #15036. commit a8f4108bea0966406b0fcae8d062ae1cfb4afbb3 Author: Hong Liu Date: Wed Mar 12 21:55:56 2008 +0800 Fix rotation mem with kernel memory manager in VT switch Unbind and bind a DRM BO may change the buffer offset, thus crtc may reference a wrong rotated memory after a VT switch cycle. Destroying it here will cause its reallocation when entering VT. commit cd73c6a5a78eac726b14ef242b8452c559c4c003 Author: Zhenyu Wang Date: Wed Mar 12 20:37:41 2008 +0800 Pass default visual in dri context create commit 21580add63307ca68790bf911243b8675f5f7c64 Author: Zhenyu Wang Date: Wed Mar 12 20:37:17 2008 +0800 disable memory alloc debug commit 5f272471878c896038b2c3f2bf704655d908828d Author: Eric Anholt Date: Tue Mar 11 12:14:51 2008 -0700 Nuke more CARD* types from i810 driver. Untested. commit 9a62d3b598cca3c28fa8b6313bba82983cc29ecf Author: Eric Anholt Date: Tue Mar 11 12:07:52 2008 -0700 Remove i830+ driver's use of CARD*/INT* types for great justice. Several uses are actually left, which are determined by the X Server interfaces we're implementing. commit 15f17aa682129c57d3864a355834edff06e91540 Author: Eric Anholt Date: Tue Mar 11 11:27:10 2008 -0700 Cleanse DVO drivers of CARD* types. commit 642ba6278876ec945ad687c2b9624e532cd3f629 Author: Eric Anholt Date: Tue Mar 11 09:59:16 2008 -0700 Add support for brightness control to i915 textured video output. commit ecdb5963ef6873ab82998dca6ca5186644666ec8 Author: Jesse Barnes Date: Tue Mar 11 11:08:25 2008 -0700 Add pipe A force enable quirk for Toshiba Portege R205-S209 Fixes #14944. commit 4ea67e9b853e9ed61557780b87bd184fc81fd731 Author: Kristian Høgsberg Date: Tue Mar 11 13:54:33 2008 -0400 Crack down on warnings. Fix printf formatting warnings, wrap a couple of long lines, nuke unused variables, add missing #include . commit 9fd13e6773371c82b9799a5bda7c96ffa5cafe8c Author: Kristian Høgsberg Date: Tue Mar 11 13:48:07 2008 -0400 Silence warnings about possible uninitialize use of dst_format. Whoa, gcc got a lot smarter about warnings. If iXXX_get_dest_format() doesn't support the picture format passed in it won't initialize the uint32_t pointed to by dst_format and return FALSE. What gcc now can detect is if dst_format is used without checking the return value, it might be used uninitialized. This patch makes sure we always check the return value before using dst_format. commit 31654f52b084ebb32f69854dfb1c342c9da07928 Merge: a03aca1 02c0ffb Author: Zhenyu Wang Date: Tue Mar 11 14:37:41 2008 +0800 Merge branch 'master' into xvmc Conflicts: man/intel.man src/i830_driver.c commit 02c0ffb1d8112a6fb03f9c8eae9ec1a1fca123ef Author: Jesse Barnes Date: Mon Mar 10 11:51:37 2008 -0700 Add pipe A force enable quirk for Dell Latitude D500 Fixes #14888. commit a1cd37f94cb8efbde84ba0a46839fb8735dd3595 Author: Dave Airlie Date: Mon Mar 10 14:43:24 2008 +1000 quirk: add DVO ivch quirk commit f2b9f387af7f618ad083b1ec8bee513ff2157d06 Author: Matthieu Herrb Date: Sat Mar 8 23:36:56 2008 +0100 Makefile.am: nuke RCS Id commit bf6d59ee98127ac6447848c4202c54d861a510d4 Author: Eric Anholt Date: Fri Mar 7 14:26:22 2008 -0800 Avoid setting reserved bits in SDVOx on everything 965-class. This will likely fix SDVO outputs on G35 hardware. commit 5915c75422c5277d530e7f8ecbdfe94654706efd Author: Jesse Barnes Date: Fri Mar 7 13:18:09 2008 -0800 Enable hardware overlay on 965 Based on Maxim Levitsky's patch for the same. Many thanks to Maxim for discovering that this features still works in recent hardware! commit 13ae79b415d944891cfdc2cd2d5397fec36a4e8e Author: Dave Airlie Date: Fri Mar 7 08:04:37 2008 +1000 fixup pciaccess version detect commit be08b61540e1edbb7673f0b6add0f1e32b136b3c Author: Jesse Barnes Date: Thu Mar 6 13:55:13 2008 -0800 Implement new get_property feature for backlight control This should keep the backlight value reported by xrandr --prop & xbacklight consistent with changes by other software in the system (like the hotkey driver or kernel backlight driver). commit 502e41f6dff91393cfeaf08c9ba312781d1b7267 Author: Zhenyu Wang Date: Thu Mar 6 19:32:29 2008 +0800 remove extra dri checking And directRenderingDisabled already has config check result. commit ea58d66cf778c0477c30e5bfe3142b64e8b971d5 Author: Zhenyu Wang Date: Thu Mar 6 19:31:33 2008 +0800 No ring, no sync commit c823fb00a20f523f50a2779c36aa1c014ba01535 Author: Jesse Barnes Date: Thu Mar 6 19:29:22 2008 +0800 Pull chipset detection out of PreInit into its own function commit 6b16cee0786b636dc849826193b26e898832a73c Author: Jesse Barnes Date: Thu Mar 6 19:27:42 2008 +0800 Account for FBC LL cache in memory reservation When we reserve memory (memory that won't be managed by the kernel) make sure to reserve space for the FBC LL cache as well. commit 6f04d02471f1cebc76eab637a9a78c4004fd3cc9 Author: Jesse Barnes Date: Thu Mar 6 19:27:07 2008 +0800 Move MTRR fixup to its own routine commit 750beb9232b51223d8e650878ce8dad071f0d0b3 Author: Jesse Barnes Date: Thu Mar 6 19:24:47 2008 +0800 Refactor memory allocation into a separate function This simplifies the memory allocation code and fixes a number of bugs. Prior to this change, some flags may have been set after memory allocation occurred, meaning they had no effect. It should also make the allocation logic clearer. commit d466b25d09bbe85abe84d9d7714ffb65fafe7593 Author: Zhenyu Wang Date: Wed Mar 5 13:38:58 2008 +0800 Really print adjusted_mode for mode debug commit d767eabe534be7f7bdcbf00614a8901124ac911f Author: Hong Liu Date: Thu Feb 28 13:51:18 2008 +0800 Fix DPLL programming in CRTC mode set The following patch fixes the display problem on internal development machines. The code in commit 3c22ed633be2ac96eea7bc533839e956f1f31b84 (Jesse's force pipe A enable patch) broke DPLL programming. Moving the DPLL set back up in the function solves the problem. Fix for internal bug #309. commit 4936e097028b91f4bdc2d9101dc49f6fe586e718 Author: Jesse Barnes Date: Tue Mar 4 08:52:40 2008 -0800 Change FBC idle mode back to default Use the "immediate idle" mode for FBC. Rather than waiting for the current compression pass to finish before signalling to the CPU that it's idle, this mode should stop any current compression pass and tell the CPU that the GPU is idle right away. Seems to fix #13326. commit 02a3b80ee8341968dbce5b7cb871b187db5ff805 Author: Zhenyu Wang Date: Fri Feb 29 11:13:34 2008 +0800 Bug 14591: comment out MI_DISPLAY_POWER_DOWN as for 965GM only commit ea7c7d088e0a3c3b7ab2bdd0475aa13379764bf4 Author: Peng Li Date: Wed Feb 27 11:56:55 2008 +0800 HP Compaq 6730s has no TV output commit fdc25cb0ca7d479051cee66a032f9ee1b68db98a Author: Mark Kettenis Date: Tue Feb 26 17:26:50 2008 -0800 Bug #14649: Fix build if pciaccess headers are not with other xorg headers. We failed to include the pciaccess header flags in our build. Even if the server was to include those flags for us, it would leave us broken for the tools-only case, and it's easier to just put the flags everywhere so we avoid future copy'n'paste mistakes. commit e55d86f654aa9dd4951b441636c8ca4b37786daf Author: Eric Anholt Date: Tue Feb 26 12:26:23 2008 -0800 Fix SDVO I2C access on Mac Mini in EFI mode. The GMBUS was being left in SDVO pin access mode, which blocked our bit-banging access to those pins. Thanks to Peter Jones for quick debugging turnaround in getting this fixed. commit 6935c732c351585f31e2094c4201a00e3d5529b3 Author: Julien Cristau Date: Mon Feb 25 14:47:02 2008 +0100 Look for src/{modes,parser} in $srcdir, not in objdir This makes the detection work in case configure is run from another directory. commit 66cdccb021a4748b2af41e415c36ed58ca808df6 Author: Zhenyu Wang Date: Mon Feb 25 14:29:09 2008 +0800 Fix overlay rotation Track current covered crtc rotation in port's private, and fix overlay rotation transform to be against crtc mode coordinate. commit 975d7833bc844485c7043538336bddcba7f7f90e Author: Jesse Barnes Date: Fri Feb 22 11:41:25 2008 -0800 Add quirk for DVO channel selection Some machines want DVOA, some DVOB. We can use this quirk to differentiate them until we come up with a better solution. Patch from Hong Liu. Fixes #13722. commit 33802b6ee3c298bae4d2b6f464ee5cc730a58506 Author: Jesse Barnes Date: Thu Feb 21 08:43:34 2008 -0800 Add pipe A force enable quirk for ThinkPad X40 ThinkPad X40s need this quirk or they'll crash frequently. Fixes #14521. commit 444984a578aae92ff55c06da897ea1d23679e706 Author: Jesse Barnes Date: Thu Feb 21 08:37:42 2008 -0800 Remove side effects from VGA debug code The VGA register dumping code was leaving ARX in data mode rather than index mode, which could cause problems for later software accessing AR* registers. Fix it to make sure it's in index mode when we're done. Fixes #14434. commit 28049540d8a9f79401fcfeb90784f5a528e7b34f Author: Jesse Barnes Date: Wed Feb 20 13:08:27 2008 -0800 Fix DSP*CNTR restoration When checking which pipe a given plane was associated with, we weren't properly masking the pipe selection bits. Fixes #14481 and should allow the driver to work with vesafb again. commit 293120bfc40a5b828567551954d8312639e73578 Author: Zhenyu Wang Date: Tue Feb 19 21:13:45 2008 +0800 Don't leak memory if no DMI info is provided by kernel commit cdc5cb7c3d24f36a30fb931b43ec6df8294709e2 Author: Zhenyu Wang Date: Tue Feb 19 08:51:53 2008 +0800 Fix last 8XX clock's p2 value commit My fault to change Hong's origin patch reversely. commit be0591880f20bdcbae159d5ab47113b6cc6fbffe Author: Zhenyu Wang Date: Mon Feb 18 14:35:06 2008 +0800 Fix Lenovo X60 TV quirk Z61 has same subsys ids with X60, but does have one S-video TV out. Use DMI info instead to quirk TV on X60, X60s. commit d5e564c5f24b0d9320bc4908693d37e7e6d68bc6 Author: Zhenyu Wang Date: Mon Feb 18 14:32:32 2008 +0800 Add DMI info for i830 quirks Linux kernel has CONFIG_DMIID to export dmi info through sysfs. commit 4a42b01f5ee5a673716d6959dfe0e693b037eb48 Author: Keith Packard Date: Sat Feb 16 18:16:12 2008 -0800 Decode DSPCLK_GATE, dump PIPE*STAT, MI_MODE, MI_DISPLAY_POWER_DOWN, MI_ARB_STATE, MI_RDRET_STATE, ECOSKPD commit 663313559873208c00c3d3748b99d837949ecdf2 Author: Zhenyu Wang Date: Fri Feb 15 13:20:22 2008 +0800 Bug #14440: fix stolen mem size mask on i830M For i830M stolen mem size mask should always be 0x70. Use 0xF0 for later chipsets should be ok, so behavior is identical to kernel agp. commit 8c8ca16120927fc2d3cf8bcd5212a4227a280708 Author: Eric Anholt Date: Fri Feb 8 11:34:04 2008 -0800 Add a little program to output the stepping information for several chipsets. commit f5896dcd1f5a964dce024ab8887ac8a79f7093a1 Author: Jesse Barnes Date: Thu Feb 7 11:56:28 2008 -0800 Add CACHE_MODE_0 register to dump output commit d59eaa8b1e6eeb9775c9d21c7a5fd28f25b2bc3a Author: Jesse Barnes Date: Wed Feb 6 09:35:43 2008 -0800 Only disable FBC if registers are available The call to disable FBC should only occur if the FBC feature is actually present or we may end up hanging on a read from a non-existent register. commit 83a071e2c01eb71462273f25d86d77159ac51114 Author: Jesse Barnes Date: Tue Feb 5 17:09:19 2008 -0800 Fix build warnings on 64 bit Use PRIx32 for printing CARD32 types, and PRIx64 for portably printing uint64_t types. Requires the addition of a new include, inttypes.h, to work. Hope C99 is ok with everybody... commit abf4b0cafa038e97bd7a6e5ba107b822117b9ccc Author: Jesse Barnes Date: Tue Feb 5 13:30:51 2008 -0800 Only enable FBC if one pipe is active Some chips can't support FBC if multiple pipes are active. So if more than one pipe is on or we're going from one->two pipes enabled, make sure FBC is disabled. Intended to fix 13418, 13326, 13152. commit f79a585d57c61fbe9af5684a336918e1fe3e8416 Author: liuhong Date: Tue Feb 5 11:04:34 2008 +0800 xf86-video-intel: fix ivch using wrong dvo register We use the wrong DVO output register for ivch which is used for DVO LVDS. Vbios enables DVOB and driver never touches it, so everything seems working correctly now. commit cabed67b6a0e4dd408eeb8d2083269100a65933c Author: Jesse Barnes Date: Tue Feb 5 11:36:24 2008 -0800 Program FBC fence offset register Just a partial fix for some of the FBC issues people have been seeing. The other half is to disable FBC if both pipes are running. commit 332587081fb05d284864aabe608dd9988eee3d44 Author: Zhenyu Wang Date: Tue Feb 5 10:34:55 2008 +0800 Fix last commit on i8xx debug p2 value commit 2d18a299cf39f2ecf9bd3ba8407f892566b2edcc Author: Hong Liu Date: Tue Feb 5 09:10:48 2008 +0800 Fix PLL reference clk debug dump commit 9536515d7717969795edc1b80d6e6a36820dd575 Author: Hong Liu Date: Tue Feb 5 09:06:14 2008 +0800 Allow non-strict free order for bo_list commit 11de831cb706025c003e98fef6d666d273192bcd Author: Hong Liu Date: Tue Feb 5 08:58:44 2008 +0800 Bug 10584: Mac Mini EDID data assigned to TMDS output EDID data for TMDS output got from crt should be applied to TMDS output on mac mini. commit 95327571134d8ebb9d936d80b70c2f642393aa9f Author: Hong Liu Date: Mon Feb 4 17:14:23 2008 +0800 Bug 10773: fix i8xx pll p2 value in i830_crtc_clock_get() Also fix debug dump, slightly modified to use macro instead. commit be1b568bc2379856c3eaaed365002512bebc218c Author: Paulo Cesar Pereira de Andrade Date: Thu Jan 31 22:47:18 2008 -0200 Make sure symbols used by other modules are public. These symbols must be explicitly exported, otherwise if compiled with hidden symbols, LoaderSymbol (and dlopen) will fail to find them. commit cc1031a834b81aa6f835c282ad86deddabe229a0 Author: Mark Kettenis Date: Thu Jan 31 21:02:48 2008 -0800 Bug #14246: Fix biuld on OpenBSD. commit b1e1c7cd993ab4f1935d750eb8852e74be757e53 Author: Eric Anholt Date: Wed Jan 30 23:01:04 2008 -0800 Add detail on different units to intel_idle. commit aa3ac79759581b5eb05293a8cbcf89eb5b76712c Author: Zhenyu Wang Date: Thu Jan 31 18:26:46 2008 +0800 Don't crash if SW cursor In case of device option or hw cursor allocation fails. commit 2e43bec8731ba1b172f7a0bf867bbb5c1adbda2d Author: Jesse Barnes Date: Wed Jan 30 18:59:12 2008 +0800 Frame buffer compression support on new chipset commit bf629466a46c4037ec7b7cc5ee16be947618bd68 Author: Zhenyu Wang Date: Wed Jan 30 18:55:20 2008 +0800 hardware status page initialization rework Order hardware status page setup more reasonable after all memory bound, in case new chipset requires non-stolen page and that could be bound then. Also clean up drm irq handler install function, and put first install in starting stage later than status page setup, so we won't make device cry for uninitialized status page. commit 04032dad28baab80131edbe8fe58aade8149bb71 Author: Zhenyu Wang Date: Wed Jan 30 18:52:32 2008 +0800 Wrap up chipsets which needs graphics address for status page Also add support on new chipset. commit b9c3fa79d9fd48c34536f92e6c1c70fe3a619410 Author: Keith Packard Date: Fri Jan 11 15:51:00 2008 -0800 Add intel_idle to measure GPU load ratio. Samples GPU idle register to detect when the GPU is busy; prints out the number of busy samples per 100 total samples once per second. commit 5d9e67aec3ce458d22b7febd3819542abb360534 Author: Erik Andren Date: Fri Jan 25 11:06:01 2008 +0800 Clevo M720R has no TV-out commit 6bf53eb48f40ad0c8ea9679ee634447410821b4f Author: Zhenyu Wang Date: Fri Jan 25 16:59:13 2008 +0800 Set vtSema before EnterVT Which was missing in our ScreenInit and initial EnterVT. This not only causes failure in initial rotation with TTM, as we won't bind in rotate_mem alloc in this case, and hide another bug that we call randr12 function in I830LoadPalete before we call xf86RandR12Init. commit 94a18fa1f8141837bdab32e545da7a7aed1cc396 Author: Julien Cristau Date: Thu Jan 24 15:24:40 2008 +0100 Don't build reg_dumper if we don't have pciaccess 0.10.0 The pci_device_map_range() function was added in libpciaccess 0.10.0, and is used by the reg_dumper tool. Don't try to build it if we have an older libpciaccess. Also make sure that util-macros >= 1.1.3 is available when running autoconf, because it's required for the PACKAGE_VERSION_* macros. commit d341e41c863f1212bf2c6b84782a7e472b6612a1 Author: Zhenyu Wang Date: Thu Jan 24 10:40:18 2008 +0800 Clear shadow memory after allocation commit 88a1041c5361964d37107c22d77feaa1b2160656 Author: Zhenyu Wang Date: Thu Jan 24 10:36:06 2008 +0800 Fix i830 block handler wrap which was observed in rotation crash with stack overflow. commit db0a7c569e383436a2725e1e74f35fb426da1196 Author: Andreas Stawinoga Date: Thu Jan 24 08:51:09 2008 +0800 Samsung Q45 has no TV output commit f54bba7600647c76fe3bd2d0133edc06dbea6a05 Author: Zhenyu Wang Date: Tue Jan 22 00:48:23 2008 +0800 Add missing i830M and 845G pci ids info commit 633dbd28218fd8a746c1735fd44a14f35bd07faa Author: Julien Cristau Date: Thu Jan 17 22:34:21 2008 +0800 Bug 14032: i810, set default depth to 16 X fails to start without an xorg.conf on i810, because the default depth set by the server (32) is not supported by the driver. I think the driver should default to 16 bits (it supports 24, but when I tested it that didn't seem to work very well, and dri is disabled at 24 bits depth anyway) instead of letting the server use 32 and failing later on. commit 4fec18e07f2b23306e885d63c74661ae0e4b04d9 Author: Jesse Barnes Date: Fri Jan 11 10:28:59 2008 -0800 Turn on backlight when LVDS panel is powered up In some configurations, the LVDS may be off at startup along with the backlight. So when turning the LVDS on for the first time, we may also need to set the backlight to a non-zero value. So try to use the saved value if possible, but if it's zero, make the backlight full brightness when turning on the LVDS. Note that this is slightly sub-optimal for configurations where zero is a valid backlight brightness. Fixes fdo bz #13958. commit b5cf8faf8102e6313c23de87a680cc327ac95478 Author: Jesse Barnes Date: Thu Jan 10 14:25:18 2008 -0800 Remove unnecessary quirk code in CRT probing Since we return early in the CRTC DPMS code, keeping the pipes & clocks enabled, this code is no longer necessary. As an added bonus, VGA connections should be reported correctly even when the pipe A quirk is active. Updates fix for fdo bz #11432. commit 3c22ed633be2ac96eea7bc533839e956f1f31b84 Author: Jesse Barnes Date: Wed Jan 9 09:47:38 2008 -0800 Add pipe A force enable quirk On some platforms, the firmware may read & write GPU registers on lid close, suspend/resume time or during various SMM events. If one of the graphics pipes is disabled at that time, the GPU may hang due to the programming dependencies of the various registers. This patch adds a quirk to force the driver to keep pipe A enabled if necessary, through user configuration in xorg.conf or via a platform specific quirk. Leaving the pipe enabled comes at a power cost however, so the quirk should only be enabled when strictly necessary. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=11432. commit d3b41bcf231a6ffd289c128c06aa619f554a776c Author: Zhenyu Wang Date: Wed Jan 9 21:28:25 2008 +0800 Disable frame buffer compression on new chipset now. commit 2f0c0427dc4113bac64cda07c6365df1f0637697 Author: Zhenyu Wang Date: Wed Jan 9 21:27:42 2008 +0800 Update PIPELINE_SELECT instruction and surface state format for new chipset commit 139e9affdd49dcbe08e260a0a2bd001de16566e6 Author: Zhenyu Wang Date: Wed Jan 9 21:26:57 2008 +0800 GTT access change for new integrated graphics device commit 4f288ff2d1e7d28bf49167f073fbce21492a7c32 Author: Zhenyu Wang Date: Wed Jan 9 21:25:47 2008 +0800 Add new integrated graphics chipset ids commit f089942689df622b1af00569eade4883a84eb7a3 Author: Zhenyu Wang Date: Thu Jan 3 11:28:18 2008 +0800 Change origin i965G_1 to chipset market name G35. commit 71143200ed66cb9dcc1f9edf98128be80b05619c Author: Jesse Barnes Date: Fri Jan 4 15:01:25 2008 -0800 Don't modify low bit of BLC_PWM_CTL when using combo backlight control On some platforms, the low bit of BLC_PWM_CTL is wired as a 'max brightness' flag, rather than a regular part of the backlight duty cycle. So when in the combo mode, divide the total number of backlight levels available by two (tossing one bit) and adjust the programming in the set_brightness routine. Note that platforms with this behavior may need quirks added so that they work by default. commit b434bf4029d1a405216454629bcea717c779ae5a Author: hulifox008 Date: Fri Jan 4 02:46:54 2008 -0800 Fix copy'n'paste-o in unused airlied i2c code. commit f2ffc0f6e038357dda268363e52c11ada1d0b810 Author: Jesse Barnes Date: Thu Jan 3 11:16:15 2008 -0800 Fix compilation error when not using DRI This patch complements 88f8b688e2316ae4a1f7485f0010ce90de54783a which added uint64_t typed variables to avoid unsigned long overflows in 32-bit architectures but didn't include with the required definition. When XF86DRI and _XF86DRI_SERVER_ are defined this header gets indirectly included through "i830_dri.h", thanks to "i830_common.h" which masquerades this problem as released in 2.1.0 and that manifests with : In file included from i810_driver.c:88: i830.h:137: error: expected specifier-qualifier-list before 'uint64_t' i830.h:240: error: expected specifier-qualifier-list before 'uint64_t' Patch from Carlo Marcelo Arenas Belon commit a03aca101d4d51ed2279a99d1137ce3b7ef364e2 Author: Zhenyu Wang Date: Wed Jan 2 14:11:31 2008 +0800 xvmc: setup driver info for XvMCGetDRInfo request User don't need to have XvMCConfig file then, if ld.so can find libIntelXvMC.so in ld path. commit 0fd769b5882058e5ebf17ee1c1e35b4a3d46e6b0 Author: Zhenyu Wang Date: Wed Jan 2 13:57:23 2008 +0800 xvmc: add context id info in debug/trace commit 83d304c61ad5fdc58b0a9309dbd1e5a3f6cd9b01 Author: Nanhai Zou Date: Wed Jan 2 10:50:44 2008 +0800 TV: fix 576p refresh rate commit a2bb2afd24c95e056b801c85dc12daeac54b37f0 Author: Zhenyu Wang Date: Fri Dec 28 15:52:12 2007 +0800 xvmc: move drmOpen earlier remove wrong comments commit 96246c27cb836bae8ee02c46c68a1f2102efd14b Author: Joakim Date: Thu Dec 27 17:09:02 2007 +0800 Aopen Minipc 965GM LVDS quirk commit 666e01bd426a553f23eeb5040ecbc28b4abb87da Author: Zhenyu Wang Date: Wed Dec 26 09:51:09 2007 +0800 xvmc: add info in intel.man commit e75d0c20e3b02f649b62ac9da7f41bb43d0f3d80 Author: Zhenyu Wang Date: Wed Dec 26 09:37:34 2007 +0800 xvmc: make XvMC default on commit ed9ff6f30fff33fe2d60715f1b503047f8e1ef01 Author: Zhenyu Wang Date: Tue Dec 25 08:32:47 2007 +0800 xvmc: consolidate put surface interfaces Make surface list track like context list, and move generic PutSurface code out of i915. So MC driver just needs to fill specific the command params, and we can get one single type of intel xvmc command to issue, ddx driver's put_image_size got removed. Fix last commit with missing XvMCContext assignment. Fix priv_data free with apropriate X11 XFree. commit f0ced5edaeec3e7741828eab728417843326d56f Author: Zhenyu Wang Date: Mon Dec 24 10:53:57 2007 +0800 xvmc: store XvMCContext pointer instead of context_id in internal ctx list commit 216ad7398742f2f80b5477e89f827acb351b4d72 Author: Zhenyu Wang Date: Thu Dec 20 13:39:32 2007 +0800 xvmc: add disable xvmc build support Move xvmc source files under XVMC config commit a811ca30659e8c477027ea9c91fb9fc516fdabc7 Author: Zhenyu Wang Date: Thu Dec 20 13:08:07 2007 +0800 xvmc: handle surface create/destory in generic code commit 5f961f28310a1cd19967df2034b0452bf4446394 Author: Zhenyu Wang Date: Thu Dec 20 12:51:06 2007 +0800 xvmc: move dri context handling to generic code Use XvMCContext's context_id for dri context handling instead of driver private id. Remove unnecessary field for i915 private structs. commit 73827e78357ab3f30a21f159ecdfb26dd0ea889b Merge: 3cf8627 f69b48f Author: Zhenyu Wang Date: Wed Dec 19 22:47:02 2007 +0800 Merge branch 'master' into xvmc commit f69b48fe24ef94dac44b8123884ca71df675be4b Author: Jesse Barnes Date: Tue Dec 18 18:10:33 2007 -0800 Unconditionally restore pipe configuration This is a partial fix for #13196, which covers both leaving pipes disabled at server exit time and problems with restoring the pipe configuration on certain chipsets. It restores the pipe configuration unconditionally (previously we made sure the PLL was running and we weren't in VGA mode) but also adds some additional PLL settle time to the PLL register write paths. commit 4757a218d733af12d04674455fc6e1fad48a1cd0 Author: Michel Dänzer Date: Tue Dec 18 19:37:46 2007 +0100 Always set pPriv->buf to NULL after freeing the memory it pointed to. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=13108 . commit 5cbb4110116f6d4187fd27660a78203caa1da46b Author: Adam Jackson Date: Thu Dec 13 15:10:43 2007 -0500 i830_sdvo_mode_valid: Fix return values to match what we actually check. commit e03bc385e924222d3d5f3c9a8d65e1ef63b858dc Author: Jesse Barnes Date: Tue Dec 11 13:28:01 2007 -0800 Add cscope files to .gitignore commit e720ae4476c3f986f623ce0f0ab9775b8b9b7e05 Author: Jesse Barnes Date: Mon Dec 10 13:00:14 2007 -0800 CRT hotplug detection improvements Patch from Hong Liu. Fixup CRT detection by making sure the pipe is enabled before CRT detection actually occurs. Fixes bugs Hong was seeing on G35 and other machines. commit d9df93578b74785c08ba860b4c9aa23b0c89c91c Author: Dave Airlie Date: Mon Dec 10 16:41:24 2007 +1000 ivch: fails on address mismatch as I seem to get this on my 865 system commit cd6f83519c69f72f146fea59afbd6a3542da783a Author: Zhenyu Wang Date: Mon Dec 10 05:49:58 2007 +0800 Fix tv quirk for Dell Latitude X1 which is actually 915GM, reported by Andreas Schildbach commit 13ec9c8141a9f794258869a04a6bab59dac5eefa Author: Zhenyu Wang Date: Sun Dec 9 00:52:13 2007 +0800 exa: fix rendering issue on some 855GM laptops This trys to initialize more 3d states on i830 like mesa code, which fixes exa rendering failure for some 855GM users. commit e2d9fd6425584119f28768d85c4b7d106ecf8742 Author: Jesse Barnes Date: Fri Dec 7 16:30:46 2007 -0800 Describe output properties in more detail Add descriptions for LVDS and TV output properties and also mention the EDID property a new output configuration section. commit 6f92200db39a790c95c1fac64baf0bd41a70e481 Author: Jesse Barnes Date: Wed Dec 5 08:10:17 2007 -0800 Fix backlight setting save/restore We need to save the current backlight value at LVDS init time, as well as when we change the DPMS setting. Also, since 0 is a valid backlight value, don't set the backlight value to maximum at startup if the value happens to be zero. These fixes should make the backlight user experience much more consistent and hopefully less frustrating. commit 4c1fa5235555c9ef3de1eebd006c4e91283362bf Author: Jesse Barnes Date: Tue Dec 4 18:27:24 2007 -0800 Add BCM_ to backlight control method enums Avoids polluting the global namespace with such generic terms. commit 30d74f1b1f30e751d2c47aa63a4a2043e71467dc Author: Jesse Barnes Date: Tue Dec 4 18:23:44 2007 -0800 Use "LEGACY" backlight method if backlight control is such This may regress the user experience a bit (fewer backlight levels) on machines where both the LBB and native registers work, but it's better that it work for everyone than work extra well for some and not at all for others. commit 0e554e6dd4da56be24d2f971ff4cd4d585936724 Author: Eric Anholt Date: Tue Dec 4 10:32:45 2007 -0800 Remove extra have_libpciaccess=no that broke tools build with old servers. commit 3cf862717688aa679b5e667cd041ddd6f5db0b58 Author: Zhenyu Wang Date: Thu Nov 29 23:12:16 2007 +0800 xvmc: add "XvMC" option, default is false. commit 6da4b7a80cdf730018435fe84485ecdad62bc860 Author: Zhenyu Wang Date: Thu Nov 29 22:56:13 2007 +0800 xvmc: move batch buffer init/fini code into generic commit 75ef3e669dac1259d282dcc8f54b197fc19f22b3 Author: Zhenyu Wang Date: Wed Nov 28 22:13:55 2007 +0800 Replace ALLOCATE_LOCAL/DEALLOCATE_LOCAL with xalloc/xfree commit df47b7ba57f3e7dc8bac1898679186d9d48639ac Merge: df718a7 7f9ceff Author: Zhenyu Wang Date: Tue Nov 27 01:13:43 2007 +0800 Merge branch 'master' into xvmc commit 7f9cefffbf44a2d07b51cc13aaf2d54fcd8f2f22 Author: Alan Hourihane Date: Fri Nov 16 15:56:08 2007 +0000 vendor is CARD8 commit df718a77c854c9110a81c2bc2a32a9aac85850f2 Author: Zhenyu Wang Date: Fri Nov 16 16:08:06 2007 +0800 xvmc: add xvmc decoder type string commit a03a758db0df615fbb44dae1ab6910bfeaeb54f9 Author: Zhenyu Wang Date: Fri Nov 16 15:49:10 2007 +0800 xvmc: move some i915 context destroy code to generic function commit 7bfbcb4dc7806ae7543f230373e67f35ba30668d Author: Zhenyu Wang Date: Fri Nov 16 15:43:04 2007 +0800 xvmc: clean batch buffer finish commit a6e8f4ef0481c66fda4f22fcc4bb0ef9c000f0cd Author: Zhenyu Wang Date: Fri Nov 16 13:51:44 2007 +0800 xvmc: remove i915 drm map type commit 4a2b0f340357c4ca58dc9586fad1337b83966362 Author: Jesse Barnes Date: Thu Nov 15 18:36:54 2007 -0800 Fix typo in 1920x1080 resolution entry commit 6c68fcc93917565712b6a9386df54d0204e4ea8f Author: Zhenyu Wang Date: Fri Nov 16 10:04:46 2007 +0800 xvmc: more i915 xvmc cleanups commit 04b60b6d3436fb57163c23acf335364f0ea2f79c Author: Jesse Barnes Date: Thu Nov 15 11:49:53 2007 -0800 Bump version to 2.2.0 commit 6eecef4fed8a21dfdabef42eb69fd150b96167b2 Author: Jesse Barnes Date: Thu Nov 15 10:10:59 2007 -0800 Adjust default TV out paramaters According to several users, a default brightness of 0 results in much better TV output. Improved control of these parameters will be provided by Randr1.3, which will standardize several output properties across various chips. commit 7552d80e367fe38bbc594fe94abd649917fe54d5 Author: Jesse Barnes Date: Thu Nov 15 10:07:34 2007 -0800 Add 1920x1080 mode to TV out Allows users to use 1080p modes on TV out, see bug #13034. commit e56c166ceb8c1ceddd5020e8de2d0b9d51f535a4 Author: Zhenyu Wang Date: Thu Nov 15 18:34:18 2007 +0800 remove unnecessary i830_reg.h includes i830_reg.h only contains 3d engine cmds for 8XX chips. commit 6f3de19159cd7a2d73ed212add909edb3aedce9c Author: Zhenyu Wang Date: Thu Nov 15 18:33:27 2007 +0800 Move fb compression reg definition into i810_reg.h where we put MMIO control reg in, and shared with intel_reg_dump program. commit 1ff97991a4954d508cc260dda82b7678010d13c9 Author: Zhenyu Wang Date: Thu Nov 15 17:01:31 2007 +0800 xvmc: intel_xvmc.c cleanups commit 1cfdf192882b856bfc93b735cfb9cb813cac3fdb Author: Zhenyu Wang Date: Thu Nov 15 16:38:21 2007 +0800 xvmc: remove unused SAREAPTR macro commit d9ea2fbdcce3c7c91428846eff43b65ac340f38d Author: Zhenyu Wang Date: Thu Nov 15 15:25:35 2007 +0800 xvmc: i915 rename files commit 06c0579df8d45f7f04b96956353d5f86cf59148f Author: Zhenyu Wang Date: Thu Nov 15 15:01:56 2007 +0800 xvmc: some code clean up commit 4983e3401390654098dbf99dcfb45bab060b068c Author: Zhenyu Wang Date: Thu Nov 15 13:56:24 2007 +0800 xvmc: move locking code into generic place commit bcd656c8dfe7309a5cf02ce1da8bc747ccd6e21c Author: Zhenyu Wang Date: Thu Nov 15 11:18:38 2007 +0800 xvmc: oops, should first map batch buffer before init commit 0464af581b0fcfc4d1c7fec8160d812262086177 Merge: 2256519 e56c166 Author: Zhenyu Wang Date: Thu Nov 15 11:05:44 2007 +0800 Merge branch 'master' into xvmc commit 22565198b360826ba10e7ca05d272c419054dc08 Merge: 619044b e64f492 Author: Zhenyu Wang Date: Thu Nov 15 18:53:22 2007 +0800 Merge branch 'master' into xvmc commit e64f4929690a57701241334fbca17e95b39ba3d4 Author: Jesse Barnes Date: Wed Nov 14 16:44:34 2007 -0800 Backlight fixes Open the "actual_brightness" file as read only, since we only read from it. Also set an initial backlight_duty_cycle at init time so we don't set the brightness to 0 at startup. commit 53e3693ef13f31f3fc33bcff7286ab2b03b2d430 Author: Jesse Barnes Date: Wed Nov 14 16:24:56 2007 -0800 Disable FBC by default on 965GM Several people have reported that they see frequent FBC related display corruption on 965GM, so disable it for now. Users wanting to enable it can use the driver option "Framebuffercompression" to override the default. commit b2726899bc6ebd108aa4a5dd66fe1d881bb778b3 Author: Jesse Barnes Date: Wed Nov 14 15:49:41 2007 -0800 Add more FBC regs Needed for the new debug code commit b7bc694c6b98dac17763426d905a22d3ae17a018 Author: Jesse Barnes Date: Wed Nov 14 15:46:57 2007 -0800 Fix kernel get_brightness function We need to look at "actual_brightness" rather than "brightness". The former contains the brightness value the kernel driver has actually set, while the latter is merely what the user requested. commit 9ee96ed02aacd953ab58288fddf0fa60f60b668e Author: Jesse Barnes Date: Wed Nov 14 15:44:56 2007 -0800 Correct FBC debug message To be consistent, it should say 'plane' rather than 'pipe'. commit 675b9471d84059496ca41d427a4f95d419f82be9 Author: Jesse Barnes Date: Wed Nov 14 15:17:05 2007 -0800 Add FBC registers to register dump output Just for completeness. commit a2a0821e74a61f53cc7f0c41ce629644ad712114 Author: Jesse Barnes Date: Wed Nov 14 11:30:20 2007 -0800 Don't stop ring before restoring hw state Some of the hw state restoration callbacks may want to use the ring for various things like stopping video playback, so leave the ring enabled until we get back from RestoreHWState. Also rename the functions so that their purpose is clearer and remove a couple of redundant lines. commit 619044b242d4abf605b42cfff538b63f445fe709 Author: Zhenyu Wang Date: Thu Nov 15 02:23:07 2007 +0800 xvmc: move batch buffer init/fini to intel_batchbuffer.c commit ae805ac379ccfdae9ee272896665e73f5bc7d2cf Author: Zhenyu Wang Date: Thu Nov 15 02:13:07 2007 +0800 xvmc: take out batch buffer handling code commit ad3bc0158d37e98fcbbe6a8e31413c142a260424 Author: Zhenyu Wang Date: Wed Nov 14 22:46:46 2007 +0800 Don't enable fbc with XAA or tiling is off. This slightly reworks my last fbc patch. We don't support tiled front buffer with XAA now, so also disable fbc on it. If tiled alloc failed, disable fbc too. commit 26194e19e1c80615697016e25640d4c8c244353f Author: Keith Packard Date: Tue Nov 13 22:26:40 2007 -0800 Review PLL spreadsheet and update register ranges. The PLL spreadsheet makes the precise register ranges allowed for each mode quite clear, and shows a few inaccuracies in the b-spec. In particular, the N register value may range from 1 to 6 instead of 3 to 8. This should close the gap we've seen in the reachable frequencies. commit 581509321e51becb8ee6ddcfaa15a2a713c9ef8e Author: Zhenyu Wang Date: Wed Nov 14 22:16:04 2007 +0800 Remove one redundant line. commit 8cea3c8cfa86600b5f2c3e1f21c19d4b2a320fd4 Author: Zhenyu Wang Date: Wed Nov 14 22:13:30 2007 +0800 Don't setup fb compression if fb is not tiling commit 539b669d6e23833a917a9b0d3a355d4283e0b76a Author: Jesse Barnes Date: Tue Nov 13 17:59:54 2007 -0800 Remove harmless error message This really isn't an error in general. If vblank pipe setup really fails for some reason, it'll be obvious enough when the user tries to use vblank events for something. Patch from Hong Liu. commit e8db8584ae4860aa991c916126335b287a972d5b Author: Zhenyu Wang Date: Wed Nov 14 00:11:20 2007 +0800 xvmc: attempt to move batch buffer code out of i915 private commit 11c0e0dbef42f1ae77a77d534870d3e9821fb017 Merge: c838f72 43fbc54 Author: Zhenyu Wang Date: Tue Nov 13 22:44:06 2007 +0800 Merge branch 'master' into xvmc commit 43fbc547786cf26514f95bce79fab58a66c291bf Author: Jesse Barnes Date: Mon Nov 12 12:23:41 2007 -0800 Improve backlight control This commit fixes backlight support for several platforms. Except on recent machines supporting the IGD OpRegion specification, backlight control is rather platform specific. In some cases, we can program the native backlight control regsiters directly without any trouble. On others, we need to use the legacy backlight control register. On still others, we need a combination of the two. And on some platforms, none of the above will work, so we go through the kernel backlight interface, which provides a platform specific driver for backlight control. commit 10988c5e6ec0f3c40d56bbf209b7976627cca706 Author: Jesse Barnes Date: Mon Nov 12 09:19:22 2007 -0800 Fix typo in PLL enable check Check against DPLL_A instead of DPLL_B before writing PIPEACONF. Thanks to Colin Guthrie for his sharp eyes. commit ab2055ebb20aa6de121fa377e488ce91913035ae Author: Jesse Barnes Date: Fri Nov 9 13:55:46 2007 -0800 Add 'ret' variable to i830_allocator_init Needed in the XF86DRI_MM case. commit 24280edbdf54e9559b26ea27c1b005eea73f51bc Author: Jesse Barnes Date: Fri Nov 9 13:53:58 2007 -0800 Fixup warnings Remove unused 'ret' variable, move pI830 under #ifdef XF86DRI_MM in i830_allocate_memory. commit 4fe507957bf826d81a71cd63af17c5547d1023a1 Author: Jesse Barnes Date: Fri Nov 9 13:51:11 2007 -0800 Remove unused 'palette_enable' variable commit 62404a9c9c0d98efb69ac96209dea17331e0489c Author: Jesse Barnes Date: Fri Nov 9 07:55:01 2007 -0800 Update man page to reflect EXA by default commit c838f7297f675ea9d82678ed37715955cb0a8a78 Merge: a9449ff 6f53568 Author: Zhenyu Wang Date: Fri Nov 9 19:37:07 2007 +0800 Merge branch 'xvmc' of git+ssh://zhen@people.freedesktop.org/~zhen/xf86-video-intel into xvmc commit a9449fff4be8e6b3cc82914376420e3a66b960f5 Merge: a470f6b 177924e Author: Zhenyu Wang Date: Fri Nov 9 19:36:25 2007 +0800 Merge branch 'master' into xvmc commit 177924e879564b7e9e70fd607141978bfd053fff Author: Jesse Barnes Date: Thu Nov 8 18:16:48 2007 -0800 Bump driver version to 2.1.99 in preparation for 2.2 release commit cb4e5796f0537ea5e0e646d473930c7b826c85d8 Author: Jesse Barnes Date: Thu Nov 8 18:13:47 2007 -0800 Default to EXA If EXA is compiled into the driver, default to using it for acceleration. Hopefully we can remove XAA entirely one day. commit 43a59ab26b09fcc24de1ed7bd770bb622f899ceb Author: Jesse Barnes Date: Thu Nov 8 16:52:41 2007 -0800 Clear current video crtc on DPMS off When calling the video DPMS off function, make sure we zero out the current crtc so that it will be properly re-set up next time video is turned on. Fix from Peter Clifton with changes by Keith Packard. commit e784e152a8e84b6e447b55a5c7019e7b47e17621 Author: Jesse Barnes Date: Thu Nov 8 16:37:53 2007 -0800 Fix overlay destination clamping The overlay width & height scaling clamp check was reversed. Fix that and update the comment. commit b8770f710729d616b3ac72544aa522161a78f819 Author: Jesse Barnes Date: Thu Nov 8 16:19:01 2007 -0800 Setup 3D state at EnterVT time In the absence of full suspend/resume support in the kernel, we have to save/restore state in Enter/LeaveVT. For 8xx chips, 3D state may be lost during suspend/resume, so re-emit the basic setup at EnterVT time. Patch from Peter Clifton. commit 5f92b4c2db9712496b829ee239468e3d14e27d2f Author: Eric Anholt Date: Thu Nov 8 13:31:51 2007 -0800 Bug #12059: Add ch7019 to the list of supported devices for ch7017. While I'm here, fix the chip description to be LVDS instead of TMDS in i2c device. commit eecd3ccedee6c4acf101591f7e60673660379e62 Author: Jesse Barnes Date: Thu Nov 8 09:31:08 2007 -0800 Check DPLL status before writing PIPEnCONF regs If the DPLL isn't enabled or is in VGA mode, writing the PIPEnCONF registers may cause a hang or crash. So ensure the DPLL is in the proper state before writing them. Another excellent fix from Peter Clifton. commit b434c1a437c407de88396b219560649c2dae82b2 Author: Jesse Barnes Date: Thu Nov 1 12:06:07 2007 -0700 Framebuffer compression fix: front buffer may not be at fence 0 Fix a long standing bug in the framebuffer compression code (thanks to Pierre Willenbrock!) that prevented FBC from working correctly if the front buffer was anywhere but fence register 0. commit 50d3693a6862028e50bc5ba8c788e7ea573c3eb8 Author: Zhenyu Wang Date: Thu Nov 1 22:22:27 2007 +0800 Fix allocation reset for really not free BO allocator commit ecd995d533d28b622afc71a20504d47c33ff5b8d Author: Alan Coopersmith Date: Tue Oct 30 18:20:49 2007 -0700 Fix builds without DRI commit 7c88b58a93fce9fda59b6344acb87af16336e287 Author: Alan Coopersmith Date: Tue Oct 30 18:20:15 2007 -0700 Clear compiler error: "void functions cannot return values" commit a470f6b2ca291e305979dd9223885a50dc0b334b Author: Zhenyu Wang Date: Fri Oct 26 22:40:47 2007 +0800 try to move some fields to xvmc driver structure Still a lot of things to move include batch buffer, lock, context, surface resource handling, etc. commit 6f53568cd2aeeec6bd8c1f1d9f9c5ecadc5c62f9 Author: Zhenyu Wang Date: Fri Oct 26 14:58:43 2007 +0800 Fix DRI context creation for XvMC commit d2c78f82c20f33fc9c22cab8a7ca161e57a34bf8 Author: Thomas Hellstrom Date: Wed Oct 24 19:34:12 2007 +0200 Adapt to DRM Lockfree and setStatus changes. commit 78aaec0ffc711742bf8ad77757ed8c15cc3f7a9f Author: Eric Anholt Date: Wed Oct 24 11:50:54 2007 -0700 Fix typo in my hand-application of rglowery's patch. commit 021265fbec9fd4ee31bdc9767c0c0453479ea22c Author: Rob Date: Wed Oct 24 11:06:53 2007 -0700 Fix a crash in TV mode handling by initializing the prev field of modes. commit ce9802edd25255f6c9c11e512b2ef905384b914d Author: Zhenyu Wang Date: Wed Oct 24 00:31:53 2007 +0800 fix xvmc return values Use values defined by xvmc lib spec commit 9c84543eb0fde4643eb7529eb6b08eacf57c12d0 Author: Zhenyu Wang Date: Tue Oct 23 22:16:55 2007 +0800 add missing license header for new files commit 87345e820d20f1a98216c52e156c2e18c15ffa44 Author: Jesse Barnes Date: Mon Oct 22 14:22:37 2007 -0700 intel_reg_dumper - dump VGA AR registers too Add a VGA AR dumping function so we can debug text mode problems too. commit 90e4eafdf59edd966ed626107c3909b24737da8d Author: Zhenyu Wang Date: Mon Oct 22 17:09:15 2007 +0800 revert xvmc memory allocation hacks commit 167c56bcf82f0a6d72151b202e6d56f6e0d627f6 Merge: fc9368c 78e251d Author: Zhenyu Wang Date: Tue Oct 23 00:12:22 2007 +0800 Merge branch 'master' into xvmc commit fc9368ce7dacd52ef222559d20188ddcf2a85df5 Author: Zhenyu Wang Date: Tue Oct 23 00:09:06 2007 +0800 split xvmc user lib chipset drivers commit 78e251db671e21bc859c9b505d391b70babee2dc Author: Eric Anholt Date: Fri Oct 19 15:04:10 2007 -0700 In the clock graph, draw the VCO as erasures in the lines representing clocks. This shows one of the reasons for the gaps: with the other settings, the VCO is too low inside the gap. However, it also points out another issue: we aren't using the high end of the VCO range due to some other limits being hit. commit 9f9b888525b274036d301d6e06351583d0415f9e Author: Eric Anholt Date: Thu Oct 18 11:25:24 2007 -0700 Warn in the log if we choose a PLL clock that's way out of line. commit 1f8bf110394cc1df66aae9acf5c818145ae19b52 Author: Eric Anholt Date: Thu Oct 18 11:17:38 2007 -0700 Add some nickle scripts for looking at PLL issues. While here, move similar nickle scripts under src/scripts/ commit 79636b8c776ae024518103c9fa137c8498c21d48 Author: Eric Anholt Date: Wed Oct 17 17:10:24 2007 -0700 Bump pciaccess version requirement for new API usage. commit c824c45e72908b5b3fa832fec91c7b47f305180c Author: Dave Airlie Date: Wed Oct 17 16:35:29 2007 +1000 intel: make block handler hook happen no matter what video is in use This shouldn't make a difference now, but for upcoming EXA/batch changes it will be more useful commit aa88d23e615e7f154cf850927a0a7bb9fbb0d2f9 Author: Rob Date: Wed Oct 17 09:19:19 2007 +0800 AOpen 965GM mini pc has no LVDS commit 38900f55e2b50ea383f78adb016e3a02c3bd17ad Author: Kyle McMartin Date: Tue Oct 16 16:38:28 2007 -0400 toshiba satellite u300 has no tv out commit 74ac5de14ebb77aeb39d698e9e8d188c9d9abd76 Author: Michel Dänzer Date: Tue Oct 16 15:08:26 2007 +0200 Adapt to libdrm buffer object API changes. commit d66e924680a3504aa1feb9c228145a95d1a16b1e Author: Eric Anholt Date: Mon Oct 15 11:31:51 2007 -0700 In update_front_offset(), set pScrn->fbOffset even at EnterVT during init. Failure to do so led to the memset() at EnterVT being done to an invalid offset. commit cc892d1ba1d87d08bdd04f857efc6b8f64620018 Merge: b52ce0b fd97edb Author: Zhenyu Wang Date: Mon Oct 15 22:09:14 2007 +0800 Merge branch 'xvmc' of git+ssh://zhen@people.freedesktop.org/~zhen/xf86-video-intel into xvmc commit c94cdfd6ddbc580523737f596e97b96a7ce100b9 Author: Jesse Barnes Date: Sat Oct 13 15:57:45 2007 -0700 Fix palette save/restore When restoring the palette, we weren't checking to make sure the associated pipe was enabled before writing the registers. In some configurations, this led to a driver crash. Add new routines to handle palette save/restore and verify that the pipes are on before we touch the registers (could easily be changed to enable/disable the pipes around the save/restore as well). commit e04333a6352040bc883655d606923c912d005981 Author: Eric Anholt Date: Fri Oct 12 12:42:45 2007 -0700 Fix failure in tiling setup on non-power-of-two allocations on pre-965. commit a1612b7728d4153499fe86b6713a13c8702cc7d9 Author: Eric Anholt Date: Fri Oct 12 12:42:06 2007 -0700 Use mprotect on unbound AGP memory to attempt to catch use while unbound. This doesn't help with the most common use-while-unbound cases, which are from the hardware side. commit 3af442ba52550a9d183e215d49cc12dac0cb9e4b Author: Eric Anholt Date: Thu Oct 11 11:56:06 2007 -0700 Don't double-free the memory manager allocation. commit 6c485ff5bd25e9aa6a3c1eb669843e6b969d94df Author: Eric Anholt Date: Fri Oct 5 15:52:56 2007 -0700 Update memory manager sizing for the current set of LIFETIME_FIXED bufffers. commit d47cf148776d74f9035863b23eefdc2b5893af08 Author: Eric Anholt Date: Fri Oct 5 15:45:51 2007 -0700 Move tiling fence register setup to bind time instead of allocate time. This allows us to allocate tiled buffers in buffer objects. In the process I removed the fence division that we had for tiled buffers on pre-965. If we resurrect that code, it should probably be managed by just dividing all the objects in roughly half and fencing those halves (to reduce the alignment requirement), instead of using giant fences until we run out of space and then trying to deal with scarce space on the last (or not) buffer. Halving our tiled objects would use 6/8 of our fence registers on that hardware. commit a6dc81a0864f9ab2f6fc1aa31002c0191f674ceb Author: Eric Anholt Date: Fri Oct 5 12:37:19 2007 -0700 Allow front/back/depth to move over the lifetime of the server. commit 132dce7565feeea1055899f8c1627766fe84c88c Author: Eric Anholt Date: Fri Oct 5 12:12:06 2007 -0700 Delay SAREA and mapping setup until EnterVT when using the memory manager. Otherwise, we would use uninitialized offsets in the early setup. commit 4ca3550fb7d488741f8dc1ba3c8722393277c3b8 Author: Eric Anholt Date: Thu Oct 4 17:02:15 2007 -0700 Rework DRI buffer mappings and sarea setup to allow for moving buffers. While this has been a desired feature for some time, to allow for reallocation of the front buffer, it was made more necessary by the desire to avoid requiring a NO_MOVE buffer type in TTM because buffer objects may not be left pinned over VT switch. This is a step towards making those buffers movable and resizable. commit f393a12d21eed668cf4771f022beded9a4c547c7 Author: Eric Anholt Date: Thu Oct 4 13:03:14 2007 -0700 Move drmMMLock to after we have unbound our (pinned) buffers. There are still issues due to the fact that we're allocating NEED_LIFETIME_FIXED memory as buffer objects, which we refuse to unpin because we have no way of pinning it back in the same location. commit 8fc4e3078210f726c7c375faa2f2fd8d05017c09 Author: Eric Anholt Date: Fri Oct 5 11:51:55 2007 -0700 Refuse to allocate LIFETIME_FIXED objects in buffer objects. We can't guarantee the offset will stay the same using the current DRM interface, but the correct solution is fixing our code to allow these objects to move. Breaks TTM mode of the DRI driver for now. commit 0de747f7d219a56434dad49a8a6d1d9d4c251ca7 Author: Eric Anholt Date: Thu Oct 11 10:36:01 2007 -0700 In i830_allocate_memory_bo, bind if we control the VT, not on lifetime-fixed. commit 0040bb95445e800af80ca9fa1b92f5db33f1b4ac Author: Eric Anholt Date: Wed Oct 10 16:48:12 2007 -0700 Fix potential use-after-free in XV overlay code on video stop. commit 56ae767180da4a8bd4b7a4c35b92e019ab67d753 Author: Zhenyu Wang Date: Thu Oct 11 10:09:29 2007 +0800 Revert "Fix G33 GTT stolen mem range" This reverts commit 2a8592f2ebcba86b1127aa889155d58a3dc186ca. This causes compat issue between ddx and kernel apggart version. Revert it as it shouldn't hurt normal people's default GTT size, but if you change it to 1MB in bios, it's supposed to be broken now. commit 5faee02e97b7543b41bb1f8e3751558c48802833 Author: Zhenyu Wang Date: Wed Oct 10 13:55:30 2007 +0800 EXA: fix tiled dest rendering on i8XX chips commit 5bbe9f09fda1238da04e6b584813d40fc646f49d Author: Keith Packard Date: Wed Oct 3 00:18:25 2007 -0700 Include xf86mm.h if using XF86DRI_MM This header file doesn't appear to be getting automatically included for some reason. commit 41dacf97ec1d4ba6f54057f4fcc7bb76033a454e Author: Keith Packard Date: Wed Oct 3 00:17:41 2007 -0700 Quirk for Samsung Q35 which has no TV output. commit b52ce0bd178c268d20334e2be8fad46037e47499 Author: Zhenyu Wang Date: Mon Oct 8 22:56:44 2007 +0800 use field name to initialize i915 xvmc driver commit e0fb228401b10ea4281eee48497bf1d584999705 Merge: 84d7b2b 9e770bf Author: Zhenyu Wang Date: Mon Oct 8 22:45:11 2007 +0800 Merge branch 'master' into xvmc Conflicts: src/i830_driver.c commit fd97edb62463e50a1860290d54684a68d5490bdc Author: Zhenyu Wang Date: Mon Oct 8 16:13:26 2007 +0800 move some definition out of i915 specific header commit 3a2b5222341b37322b788e329c2b9006dc14ecfd Author: Zhenyu Wang Date: Mon Oct 8 15:46:11 2007 +0800 Temp work around ttm allocation for xvmc, which should be fixed later. commit 9e770bf69edaa8944048049e11266dbe1ef145e5 Author: Eric Anholt Date: Thu Oct 4 14:31:37 2007 -0700 Replace setting of LIFETIME_FIXED on cursors with just updating the offsets. commit c9d6e90c2523096c45d330552f471e6bf1752704 Author: Eric Anholt Date: Thu Oct 4 14:27:07 2007 -0700 Don't set overlay registers LIFETIME_FIXED. It always uses the current offset. commit 1cc6bec4628a4ca04a68919a84148a1e6312072f Author: Eric Anholt Date: Thu Oct 4 14:23:48 2007 -0700 Revert setting of exa_965_state as LIFETIME_FIXED. The current offset is used every time in render setup. commit dfa22df8ce7713b491c4766ce6ce652db91b5f90 Author: Eric Anholt Date: Fri Oct 5 12:53:07 2007 -0700 Don't leak buffer object allocations in i830_reset_allocations(). commit 7db9d706a1bc9da7afc4823cee92b23e96ae55b8 Author: Eric Anholt Date: Fri Oct 5 12:40:48 2007 -0700 Warning cleanup. commit bf33c4e2d91172efd08690fadda7b3743dd3de62 Author: Eric Anholt Date: Fri Oct 5 12:40:37 2007 -0700 Fix formatting of error message. commit 04e936935f0b0045600241424f1d04a6721a2432 Author: Eric Anholt Date: Mon Oct 1 17:29:35 2007 -0700 Bring the CH7017 driver closer to spec. This is also closer to what my hardware is programmed with, except for some very confusing off-by-one bugs in an unexpected direction. commit 263d48ad93a0fb7100729d0c6e0443797c20c80a Author: Eric Anholt Date: Mon Oct 1 16:23:30 2007 -0700 Fix probing of the sample CH7017 device I found by allowing GPIO overrides. It may be that the LVDS chips need to be DVOA and GPIOB only on mobility devices with them, and DVOC/GPIOE on non-mobility like this 845. But until more examples are found, just make this one device probe. commit 219354af212c7b68c20df689692c55331e36a705 Author: Eric Anholt Date: Mon Oct 1 16:09:13 2007 -0700 Restore building of pciaccess-based tools even if the server doesn't use it. commit 1b83e5e589105d05c1b78032fa47eecee478cb99 Author: Eric Anholt Date: Mon Oct 1 14:32:28 2007 -0700 Remove more DVO probing noise. commit 29d3188ee9676f697f6fcb859c7f680f5df30318 Author: Eric Anholt Date: Mon Oct 1 13:45:09 2007 -0700 Suppress I2C failure error messages during DVO device detection. Otherwise, errors would be printed for every chip probed which wasn't present on the system. commit 6dd8228a386334d05836353672aae9f8c456e435 Author: Eric Anholt Date: Mon Oct 1 12:07:22 2007 -0700 Enable CH7017/7018 DVO driver by default. On hardware containing one of these chips (generally single pipe with an LVDS connected), it's probably better to try to enable it and fail in some cases than to not probe the output at all. commit 994ee6721d9f1650ad37e21198b86848352b73af Author: Eric Anholt Date: Mon Oct 1 12:01:16 2007 -0700 Disable TV/VGA output on the CH7017/7018 devices. We don't support those outputs on this chip yet, so turn them off if the BIOS had set them on. commit 0e5574e842eeaac75271ccd50027d3e54c57722d Author: Regis Prevot Date: Sat Sep 29 16:21:08 2007 +0200 Ignore detection of TV output on Panasonic CF-Y7 commit 84d7b2b955107264b67526a04028a8b79d8804e3 Author: Zhenyu Wang Date: Sat Sep 29 19:41:15 2007 +0800 rename xvmc init function names commit 1845e7c6e9caf7a9ad7f46a8fbfa321ddec69a1e Author: Jesse Barnes Date: Fri Sep 28 10:12:11 2007 -0700 Go back to using old drm_i915_flip_t field name This field shouldn't have been renamed in the first place. Go back to using the old name so that the tree is backward and forward compatible again. commit f3d92ab474de11babe507b0e3c15aca146b6cb66 Author: Kyle McMartin Date: Fri Sep 28 10:17:55 2007 -0400 Dell XPS 1330 has no TV out commit bbf69c7446aa9748dacecccfe0b63d803f865b00 Author: Zhenyu Wang Date: Thu Sep 27 17:37:19 2007 +0800 Pin cursor, overlay(no physical) and exa state buffers And cursor mem counting for dri mem manager is not relate to overlay. commit 64188246bb25e95a916ebb8a50a09298e56d91d9 Author: Zhenyu Wang Date: Wed Sep 26 15:48:19 2007 +0800 clean up old i915 xvmc function declare commit 320b7f08f457455f1d16b4c36d149bdc3f6ceead Author: Zhenyu Wang Date: Wed Sep 26 15:02:33 2007 +0800 Revert to origin xvmc setup steps We have to grab xvadaptor's PutImage earlier than xv init, otherwise no chance to do that.. commit 1e0ff38f44e3b5a8b4a5d509c7faa266270d522c Author: Hong Liu Date: Thu Sep 20 11:28:52 2007 +0800 Fix pixmap offset Use consistent interface for counting pixmap offset. commit 85e4bd109464a4d90856e17bc960872eeaebc2ad Author: Zhenyu Wang Date: Wed Sep 26 14:32:46 2007 +0800 Log xvmc driver name commit e58b76a24a29e0a502650807de81e650e5dc184d Author: Zhenyu Wang Date: Wed Sep 26 14:40:04 2007 +0800 clean up err report Still need to clean up return value for XvMC API commit b10a9668dc50d10489b2ae531d89c8ab7c408170 Author: Zhenyu Wang Date: Wed Sep 26 14:01:57 2007 +0800 fix i915 xvmc devPrivate reference commit f12eaaf385e7a0b85524588a5d865d1cc3f1a0cf Author: Zhenyu Wang Date: Wed Sep 26 13:49:55 2007 +0800 comment out i965_xvmc_driver for now commit 513e8a2f8abde1b11b8058e94a650796fd51779b Author: Zhenyu Wang Date: Wed Sep 26 13:45:42 2007 +0800 Create xvmc driver interface convert i915 to new xvmc driver interface commit ca67fa767dc762dac369e84b27a7ef15673d527c Author: Eric Anholt Date: Mon Sep 24 11:12:22 2007 -0700 Remove logic for supporting i915tex_dri.so vs. i915_dri.so. There can be only one. commit 130f79613bfe6a8cfa7f431c8cce06cbb93cc91a Merge: b73235f 1260316 Author: Eric Anholt Date: Fri Sep 21 17:14:44 2007 -0700 Merge branch 'buffer-objects' This branch changes i830_memory.c's allocator to use TTM when available to allocate memory, which also allows TTM to control almost the entire aperture. As a result, our front/back/depth buffers are created as real buffer objects, which may be used by the DRI driver instead of the fake buffer type in TTM. The updated DRM with bo_set_pin ioctl is required, to allow us to pin and unpin our buffers as needed. commit 126031655c3c1db9881ad17d712461533eb59632 Merge: c343835 bda3c69 Author: Eric Anholt Date: Thu Sep 20 08:57:58 2007 -0700 Merge remote branch 'origin/master' into buffer-objects Conflicts: src/i830.h src/i830_driver.c commit b73235f40497cfb10792ba191d4f6eac3a5df009 Author: Hong Liu Date: Thu Sep 20 11:28:52 2007 +0800 Fix pixmap offset Use consistent interface for counting pixmap offset. commit 798448e4641acf241b7cbae0d6c243ae383da9f4 Author: Zhenyu Wang Date: Wed Sep 19 13:29:31 2007 +0800 Add media state definition on i965 This adds VFE state and interface descriptor struct define. commit 36b81ba20d20e7b235cb701c5135cbf3f3eedb12 Merge: 02ad9ce bda3c69 Author: Zhenyu Wang Date: Wed Sep 19 11:44:41 2007 +0800 Merge branch 'master' into xvmc-i915 Conflicts: src/i830.h src/i830_memory.c commit bda3c69a7a044869ea63514b97f8aa9260d6b5a7 Author: Dmitry Babrovich Date: Tue Sep 18 09:34:34 2007 -0700 Bug #12457: Let the ch7xxx driver probe the 7301 Looking at the 7304, this chipset likely requires slightly different programming. However, this change allows for at least some functionality. commit 445a59d262b93bd9d2c16cee9934ce77a103776b Author: Jesse Barnes Date: Wed Sep 12 09:32:41 2007 -0700 Remove unused plane->pipe mappings from SAREA private Turns out we can get away without this, so remove it, fix a crash, and only swap planes/pipes if the DRM can support it. commit d02336290bea30de3c390b8121046c38fd6b0f62 Author: Jesse Barnes Date: Tue Sep 11 04:28:14 2007 -0700 Fix plane/pipe mapping compat code Move plane->pipe mapping adjustment to ScreenInit so we can check against the DRM driver version accurately. commit d9f2b3c0d2d08a4b7fad865dab7deb6224b57999 Author: Jesse Barnes Date: Mon Sep 10 23:49:34 2007 -0700 Fix crash in ScreenInit Use pScreen directly when getting at the SAREA private, since pScrn->pScreen may not be initialized yet. commit 4c7542ef43a5267e470ca1608a2ae57abf9783ec Author: Jesse Barnes Date: Mon Sep 10 23:30:50 2007 -0700 Only swap planes and pipes if DRM supports it We want to associate plane A with pipe B on pre-965 mobile chips, since that's the only way to get framebuffer compression on the builtin LVDS on those platforms. However, if we do this swapping and DRM isn't aware of it, we may end up requesting vblank events for the wrong pipe, or setting up SAREA buffer swap state incorrectly. This mod checks whether DRM supports the new plane->pipe swapping behavior, and only enables the swapping if so. This should fix the bugs Lukas found and debugged. Reviewed by Michel Danzer. commit 286f5df0b62f571cbb4dbf120679d3af029b8775 Author: Keith Packard Date: Thu Sep 6 14:31:55 2007 -0700 Switch to pci_device_map_range/pci_device_unmap_range APIs. With the libpciaccess change that added these new APIs, use them for all mapping. commit 2a8592f2ebcba86b1127aa889155d58a3dc186ca Author: Zhenyu Wang Date: Wed Sep 5 14:52:56 2007 +0800 Fix G33 GTT stolen mem range G33 GTT table lives in seperate stolen mem with graphics data stolen mem. commit 7fd9a98178cdebda4213796fdc452a8a265a1197 Author: Keith Packard Date: Tue Aug 28 16:00:01 2007 -0700 Don't set supported TV formats until after RandR initialized. The TV format property cannot be configured until RandR has been initialized. commit c6e637cd683dc60567b3b4f69b7f2b4c338c89ea Author: Keith Packard Date: Tue Aug 28 12:17:15 2007 -0700 Limit TV formats to those supported by current connection commit ddd6053987b9ca9bd3722ddbdfd412a3d8d252cf Author: Keith Packard Date: Tue Aug 28 12:30:46 2007 -0700 Add register defines for hw binning commit 3fbbd0afde49c53a5a8661f75c8c8c4be3020c30 Author: Michel Dänzer Date: Tue Aug 28 17:48:20 2007 +0200 Fix build against pre-pci-rework xserver. commit 0fdbf64b34e4114c2b89d696b268b9c7464f1efd Author: Zhenyu Wang Date: Tue Aug 28 21:56:21 2007 +0800 Fix i915 a8 color buffer blending From spec, i915 engine uses green channel when reading from 8bit color buffer for blending, and also writes back green channel. Fix blend factor in dest alpha case by using dest color instead. Now rendercheck can pass a8 tests. commit 3411eb0dbae470b910af3116a4ab960c821b9b20 Author: Keith Packard Date: Sun Aug 26 23:09:01 2007 -0700 i830_driver.c changes for libpciaccess. Change to use libpciaccess APIs, including computing and using BAR indices for various mapping activities. commit 387fed6daa7426e4a85d30ba7cf608b5f41d24bb Author: Keith Packard Date: Sun Aug 26 23:06:57 2007 -0700 i810_driver.c changes for libpciaccess. This includes new probe code (intel_pci_probe) and changes for i810 to use BAR indices to refer to suitable portions of the device mappings. commit 2c794192052ca55c3263e27e13d16aafe8caa92c Author: Keith Packard Date: Sun Aug 26 22:46:19 2007 -0700 Mechanical API conversions for libpciaccess. Uncomplicated API transistions for libpciaccess usage: Legacy xf86 API libpciaccess API --------------- ---------------- xf86ReadPciBIOS pci_device_read_rom pciReadWord pci_device_cfg_read_u16 pciWriteByte pci_device_cfg_write_u8 And, more use of the API-independent DEVICE_ID/SUBVENDOR_ID/SUBSYS_ID macros to pull PCI identification data from the underlying structure. commit 70e8e5957200401474967a467663ae049e9080f2 Author: Keith Packard Date: Sun Aug 26 22:40:25 2007 -0700 Change DRI interface to fill in PCI data from new libpciaccess structure. The DRI interface requires bus identification for each DRI object; pull that data from the libpciaccess structures as necessary. commit 5516cc781bd488c936af225123812a61ed5874b8 Author: Keith Packard Date: Sun Aug 26 22:37:38 2007 -0700 Add libpciaccess declarations to I810Rec and I830Rec. Using libpciaccess requires a different type for PciInfo (struct pci_device instead of pciVideoPtr) and it requires knowing which BAR each memory region needs to be mapped from. Add these definitions to the driver private record along with the includes necessary to use libpciaccess. commit daada59b5f8c2294b524a4b5920dc6b1c213642f Author: Keith Packard Date: Sun Aug 26 22:32:39 2007 -0700 Change IS_Ixxx tests to work with or without libpciaccess. libpciaccess has a new structure that holds the PCI identifier data; borrow macros from the mga driver to work with either the old xf86-specific structure or the new libpciaccess structure. commit 3d3bf493a3973f4067433d27a4d7ddfecaa18f1c Author: Keith Packard Date: Sun Aug 26 22:27:34 2007 -0700 Intel driver configuration (only) changes for X server libpciaccess usage. Detect whether the target X server uses libpciaccess, using it in the driver compilation as necessary. This change means that utilities that used to use libpciaccess will not do so unless the driver itself uses libpciaccess. Yes, that could be fixed, but it doesn't seem that important. This patch does not include any code changes necessary to actually have the driver build against an X server using libpciaccess. commit 5faf9cc6afe1c30fa88bc6446088a6fa47fc5d0b Author: Keith Packard Date: Sun Aug 26 09:34:06 2007 -0700 Sort quirk table, add Dell Latitude X1 commit a9e1d42a47cef79d8bbde2afd89d26aed964e344 Author: Keith Packard Date: Sat Aug 25 12:54:11 2007 -0700 Lenovo 201a is x60s, not x61s commit ffc2907f7f2eb039004eff0014c5563a01463fb0 Author: Keith Packard Date: Sat Aug 25 12:31:21 2007 -0700 Thinkpad X61s has no TV out commit 0c20fbabd18c19b2753cb60280f89e240ce5645f Author: Keith Packard Date: Fri Aug 17 22:21:47 2007 -0700 Make sure XV_PIPE is used whenever possible. The code was not consistently using XV_PIPE when the desired crtc contained any portion of the video output. commit e443f83dd6f110156743c93f7d793cdddb8195a1 Author: Eric Anholt Date: Fri Aug 17 18:13:49 2007 -0700 Tune acceleration architecture allocator sizes down. commit bd874b11bbfe582aebd3115771f90807e75afc31 Author: Eric Anholt Date: Fri Aug 17 17:49:21 2007 -0700 Replace AA allocator usage with i830_memory.c for RandR rotation. This requires EXA 2.2 (server 1.3) for rotated performance with EXA, because the i830_memory.c allocation may not fall within what EXA considers the offscreen area, so the PixmapIsOffscreen hook is needed. commit 9ad33dd65a79277ef75a6e95373614852725f5a9 Author: Eric Anholt Date: Fri Aug 17 16:46:48 2007 -0700 Use i830_memory.c instead of the AA's allocator for XV buffers. This should fix issues with XV being allocated into XAA's tiled pixmap cache and resulting bad rendering. Its also brings us closer to being able to shrink the size of the pixmap cache on XAA, which is of limited utility. commit 3655a1ecb62f6c387a16fa87cf6f00bf7835dce4 Merge: e5c336e 2231cdc Author: Jesse Barnes Date: Thu Aug 16 12:04:20 2007 -0700 Merge branch 'master' of ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit e5c336eaa32be8f9379a2c1dd51006b85bc8b270 Author: Jesse Barnes Date: Thu Aug 16 12:04:02 2007 -0700 Disambiguate plane and pipe mapping, use plane A on pipe B on pre-965 LVDS Add a new 'plane' field to the intel_crtc private structure for tracking planes separate from pipes. This allows pre-965 chips to use plane A on pipe B, enabling framebuffer compression for builtin LVDS displays. commit c3438356d6b7b63ad9d0086efb084be8e048980e Author: Eric Anholt Date: Thu Aug 16 11:34:02 2007 -0700 Add tiling information to BO layout description. commit 0c9e4aeea84e20a18e3b76d8cf8e802af004df57 Merge: 79d9a30 2231cdc Author: Eric Anholt Date: Thu Aug 16 11:30:16 2007 -0700 Merge branch 'master' into buffer-objects Conflicts: src/i830_dri.c src/i830_memory.c commit 2231cdcd8f1ee81b3e59cc5e3a325c22ee0f40e4 Author: Dave Airlie Date: Thu Aug 16 17:15:54 2007 +1000 i915: add support for render to a8 commit a69db6f7fe1703b473e5c1d1e0088ccc203f4d5a Author: Dave Airlie Date: Wed Aug 15 18:28:50 2007 +1000 intel: don't setup texOffsetStart unless using EXA commit 5126a71f82767b9e23cd590453718f3364789740 Author: Zhenyu Wang Date: Tue Aug 14 13:54:55 2007 +0800 Fix seg fault introduced in tiling patch when TV detect When TV does load detect, fb hasn't been setup, so we should check that in i830_display_tiled(). Caught by Nanhai. commit d9f89a1af7e7ff4056727060cdf2e35c15a4dcdd Author: Keith Packard Date: Fri Aug 10 17:59:33 2007 -0700 Save/restore tile-mode offset registers DSPATILEOFF and DSPBTILEOFF Now that the driver sets these registers, they must be saved and restored. commit 5bc194d3d3c87bb0128d9ac10f090f031345eb37 Author: Keith Packard Date: Fri Aug 10 17:54:32 2007 -0700 Set DSPATILEOFF/DSPBTILEOFF to handle 965 tiled frame buffers. DSPATILEOFF and DSPBTILEOFF replace DSPASURF and DSPBSURF when the frame buffer is in tiled mode. commit 64b943c79cf957a4c54482720195d7f27b7f0c0d Author: Eric Anholt Date: Fri Aug 10 15:48:05 2007 -0700 Add #if 0-ed fence debugging code. It's noisy, and of little use to most. commit ba9a503ba2099025e393f3382bb453985ef23497 Author: Eric Anholt Date: Fri Aug 10 15:06:58 2007 -0700 Don't force tiling on if it is disabled in configuration but fbc is possible. commit b7751c7d1d6bcf310824295c3bab4ff36760c791 Author: Eric Anholt Date: Fri Aug 10 17:42:09 2007 -0700 Fix stack-smashing in the last commit. commit cb36635a053d4ac3971fea05060d31dbd3d382d2 Author: Eric Anholt Date: Fri Aug 10 14:16:59 2007 -0700 Attempt to fix several front buffer tiling failure cases. Front buffer tiling is now disabled with G965 and XAA. Some of the acceleration that i830_xaa.c does can't be supported on tiled buffers. Adds a tiling field to struct i830_memory, and uses it instead of separate variables for each potential tiled buffer. commit ed1b106fabf3a18489bdb3083326f27387a9cb72 Author: Keith Packard Date: Fri Aug 10 14:31:16 2007 -0700 Clean up tv mode name allocation and copy. TV mode names used to contain the signalling standard along with the pixel size. The signalling has been moved to the TV_FORMAT property, but the allocation and initialization of the mode name was left a bit messy as a result. commit f71b9358b4157a8cfdc694ddef8ca3f98926ca91 Author: Jesse Barnes Date: Fri Aug 10 15:53:04 2007 -0400 Cleanup tiling and FBC driver output. Remove an extra "FBC enabled" message from i830_memory.c (only report errors if they occur), and don't print the "forcing FBC on" message if tiling was already enabled, as it's redundant and confusing. commit e6746d0f286ef9d9a87f748d40e5421c268f2f7d Author: Jesse Barnes Date: Fri Aug 10 15:48:15 2007 -0400 Enable tiling by default on 965. commit e0fcf645a228094620b8f7fdd580963611bdd6ef Author: Jesse Barnes Date: Fri Aug 10 15:43:06 2007 -0400 Tiling fixes for 965 This should be close to the last set of tiling fixes for 965 chipsets. Prior to this commit, the 965 composite hook didn't take tiling into account, nor did 965 textured video, which caused display corruption. However, there seems to be at least one last bug to squash--on occasion, a configuration with tiling enabled won't properly display text. This is likely another tiling related problem with the composite hook. commit 02ad9cee330fb5fb0008ad6f74e74e8d8a1fc36e Merge: 105f8a1 7b143e5 Author: Zhenyu Wang Date: Fri Aug 10 16:45:56 2007 +0800 Merge branch 'master' into xvmc-i915 commit 105f8a183eb64623d9a9e2833dbe27156a551f69 Author: Zhenyu Wang Date: Fri Aug 10 16:44:46 2007 +0800 disable subpicture initial until we really implement it, OSD can't work for now. commit 7b143e5c8397da077c0e02455c21c5a99cf50942 Author: Dave Airlie Date: Thu Aug 9 12:14:44 2007 +1000 i965: increase composite vertex buffer size and alignment to be safe commit 14691b24da5aa29d8c41ac7b7c61828e3cd9eab7 Author: Dave Airlie Date: Thu Aug 9 09:41:32 2007 +1000 i965: fix memcpy of the sf_kernel when a mask is needed commit 5e18c6af9051da654d2a6a97553ef4fe777bb61e Author: Carl Worth Date: Wed Aug 8 11:13:37 2007 -0700 Allow 965 composite acceleration to A8 destinations. Note that this is a slowdown in text rendering due to the high overhead of our compositing setup, but appears to be correct according to rendercheck. commit b0ec670cdb0b6ca6fc0f4f165fa3ee5a20d7c985 Author: Eric Anholt Date: Wed Aug 8 11:03:51 2007 -0700 Bug #11593: Remove dead struct vch_bdb_20 which was angering the sun compiler. commit 87cc72ef509b85635bf0e84c47dfed6b7242170b Author: Zhenyu Wang Date: Wed Aug 8 09:39:55 2007 +0800 check early if we have slot left for new context or surface commit fec6744b763f2b85b4e592c51326b9ee979bef5d Author: Zhenyu Wang Date: Wed Aug 8 09:26:10 2007 +0800 I missed to remove port attributes wrapper commit 76c084d41999f13497b80d4ac6799cb974adaa03 Author: Zhenyu Wang Date: Wed Aug 8 09:22:42 2007 +0800 explicit say "unsigned int" commit cfc614b1f9143ed1407733aaa81c4a980c613a63 Author: Zhenyu Wang Date: Wed Aug 8 09:06:47 2007 +0800 remove xvmc attributes We don't have extra attributes than Xv port. commit 92af2f4bbcb395cbde097776718449d99843ad67 Merge: da82a47 e0be352 Author: Eric Anholt Date: Tue Aug 7 15:18:17 2007 -0700 Merge branch 'origin' Conflicts: src/i830_exa.c commit da82a47a558597f3653e2b33bc6adbab18574b57 Author: Eric Anholt Date: Mon Aug 6 17:01:37 2007 -0700 Fix EXA rendering with tiled front buffer on pre-965. The 915 and earlier appear to respect the fence registers, while only the 965 requires the per-operation tiling setting and pitch shifting. This will also fix issues with rendering on the 965 involving multiple cliprects, where the pitch would get divided repeatedly. This removes the offset < 4096 fallback, which essentially resulted in no acceleration to tiled buffers, hiding the issues. commit e0be352f5017f0e645a4ff8a40961d9c2b98863a Author: Jesse Barnes Date: Tue Aug 7 12:37:25 2007 -0700 Fixup pitch in Prepare* functions, since actual hooks may be called many times for the same pixmap, and we don't want to keep dividing the pitch by 4. commit b29a932bec2a3cc5a38e9c09c012cfdc1b6209c1 Author: Zhenyu Wang Date: Tue Aug 7 16:47:13 2007 +0800 code cleanups and put wrap function in driver xvmc priv instead of per xv port priv commit 7431abee5fb971d1f8bc7ac4bea137f6ece9418b Author: Brice Goglin Date: Tue Aug 7 09:13:00 2007 +0200 Define INTEL_VERSION_MAJOR/MINOR/PATCH using PACKAGE_VERSION_* commit 9e1914270a0978ec4dfae757d3dd57ca7ffe17e5 Author: Jesse Barnes Date: Mon Aug 6 17:55:00 2007 -0700 Remove 4k offset checks from Copy & Solid hooks. Reading the docs too literally can cause you to hide bugs with false fixes... commit 3510d5728fa972b36d022b4f9189d46ff98d7b16 Author: Eric Anholt Date: Mon Aug 6 16:44:39 2007 -0700 Fix accumulated whitespace nits in i830_exa.c commit 5ff05dffe229e35da7619762628fdd0f125585e8 Author: Jesse Barnes Date: Mon Aug 6 16:01:10 2007 -0700 More tiled rendering fixes: - check for tiling, not just offset in PrepareSolid - combine pI830->tiling and frontbuffer checks into new exaPixmapTiled function for readability commit ba90d944329dd8c79a757c38128964fbbe4ab898 Author: Eric Anholt Date: Fri Aug 3 16:46:09 2007 -0700 Add the file mode for bios_dumper output so it doesn't have 000 permissions. commit 322a163cfbda885adc6bb09c1f976d36617ea83b Author: Eric Anholt Date: Fri Aug 3 10:46:39 2007 -0700 Quirk away the nonexistent TV connector on the Panasonic CF-Y4. commit ffbab2ee5dc227b2a8a5ffd1717ae00e8e37f956 Author: Jesse Barnes Date: Fri Aug 3 21:27:52 2007 -0700 Limit Solid & Copy offsets to 4k when rendering to tiled targets commit 019dbfda294aaafb28d8bea0fe2f5dadc2ea3e0b Merge: 3d3c0e8 15f71ed Author: Jesse Barnes Date: Fri Aug 3 20:45:14 2007 -0700 Merge branch 'master' of ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit 3d3c0e8c55f639a501c0756948b518abd903d7d0 Author: Jesse Barnes Date: Fri Aug 3 20:40:45 2007 -0700 Tiled rendering & fbc fixes: - actually enable tiling in DSP(A|B)CNTR if needed - add logic to EXA routines for tiled case (still needs work) - enable/disable fbc on DPMS events (meant moving functions higher in file) - fix fence register pitch programming (use correct pitch instead of kludged value) commit 79d9a309b19e22561e000a47b732c67479c2e6d4 Author: Eric Anholt Date: Thu Aug 2 15:50:42 2007 -0700 Mark DRI buffers as shareable, and pass their buffer handles through the SAREA. commit 0da4f2b0cd7203377ad10407928a367b8c6d310e Author: Jesse Barnes Date: Tue Jul 31 16:22:36 2007 -0700 Legacy backlight changes: - add support for 965GM - make sure legacy enabled systems don't reduce the range of backlight values we can present to the user commit 15f71edba37738f8ba279fa07452fda10cc65298 Author: Zhenyu Wang Date: Sat Jul 28 17:43:29 2007 +0800 Update Lenovo TV quirk info commit 857b4a7bcb69ca43b866b4283fe075abbafb1d22 Author: Eric Anholt Date: Fri Jul 27 18:03:12 2007 -0700 Pin some buffer objects at creation time, which can't be moved yet. A number of other interfaces of ours don't allow buffer offsets to be updated after screeninit. This attempts to catalog why for each one, so that they can be fixed one by one. This happens to restore the EXA offscreen allocator for now, as a fixed-offset object. commit d7b5b595ad29ae0ac3adbd3a176be3fe7ffa6474 Author: Eric Anholt Date: Fri Jul 27 12:48:08 2007 -0700 Delay the first screen pixmap update to CreateScreenResources. The return value of GetScreenPixmap before CreateScreenResources is not, in fact, a pixmap. commit 2b1ec0f51479c1d7e5e62803c68feca29375519d Author: Eric Anholt Date: Fri Jul 27 10:00:35 2007 -0700 Use the dontMapFramebuffer option available with DRIINFO 5.4. If not available, AIGLX init will fail. While here, simplify DRIINFO tests since we refuse to init with a version queried less than the version we compiled against, anyway. commit f403a50afbcef1e54f554481c72037338bd5357c Author: Wang Zhenyu Date: Fri Jul 27 09:24:24 2007 +0800 Add another Lenovo TV output quirk From issue report http://lists.freedesktop.org/archives/xorg/2007-July/026644.html commit 34c82ad7ce83394db47588693b578cf91991bf1c Author: Wang Zhenyu Date: Fri Jul 27 09:14:13 2007 +0800 Add quirk support This one trys to use a flag for possible quirks. It adds a quirk for my Lenovo T61 TV output, and ports some origin LVDS quirks to it. commit 1a585d03972394cb97dec2462937b0104bdf4de2 Author: Eric Anholt Date: Thu Jul 26 10:46:35 2007 -0700 Use new drmBOSetPin interface instead of NO_EVICT/NO_MOVE buffers. To do this, we have to deal with buffer offsets being set at EnterVT time instead of screen init time. We've wanted to move this direction for a long time, but there are repercussions. The EXA offscreen memory manager has to be disabled, because it can't be moved. That will be replaced by BO-backed pixmaps soon. Also unresolved is whether our moving front/back/depth/texture buffers will break the classic-mode DRI driver. This code doesn't actually work yet. commit 0fd3ba0518b3cde9ca0e4e2fc1854c00d8a43d5c Author: Brice Goglin Date: Wed Jul 25 20:11:32 2007 +0200 Fix typo in intel.man Reported by A. Costa" in http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=432061 commit 18c707a8c13ac5fffdd30d55e6f5926a68b367df Author: Eric Anholt Date: Wed Jul 25 10:11:16 2007 -0700 When TTM is available, use it instead of manual AGP allocations when possible. This is a step towards being able to expose buffer objects through the screen private to DRI clients, instead of having them have to use the fake buffer object type. This fails in two ways. First, the kernel memory manager is not currently suitable for doing the physical allocations we need, so we still use AGP for those. Additionally, the DRI lock can't be initialized early enough for us, so these buffer object allocations fail. This will be fixed by improving the DRM interface. commit c4deefa80a6349db968e25bd6778cdf7a514ca7f Author: Xiang, Haihao Date: Mon Jul 23 10:35:32 2007 +0800 only enable xvmc for 915/945/G33 commit 45962eed51120ff77326c29d72cf8b6cd8a934b5 Author: Zhenyu Wang Date: Mon Jul 23 09:50:17 2007 +0800 Fix a typo in i915 render Fence setting is in mapstate actually. This fixes rotation in tiled fb case, thanks Keith to report this. commit a52c53b8603495ab05e07e3da5092fe122fcb6f2 Author: Xiang, Haihao Date: Fri Jul 20 17:10:27 2007 +0800 don't initialize XvMC if xv is disabled. commit b1af2c0e01c54ef1d40fd0ca1ede29a1dd7ed97b Author: Zhenyu Wang Date: Fri Jul 20 15:18:48 2007 +0800 Fix device id info for 945GME, 965GME which do have new host bridge ids commit 6b4d43dbf4bbb86d479d8fca480c8bec39e2714b Author: Xiang, Haihao Date: Fri Jul 20 09:59:40 2007 +0800 lock display when creating context commit 42e91c7092f9cf7f5c0b98e9ae3d92a5b30821bf Author: Xiang, Haihao Date: Thu Jul 19 17:30:54 2007 +0800 move i830_allocate_xvmc_buffer out of #if/#endif commit 36ea26f2779d951fa173da785aca100564e5ecf8 Author: Xiang, Haihao Date: Thu Jul 19 17:21:05 2007 +0800 add copyright commit 9d03873423c0968b2d6700b7d8d44c7e23b8d7f3 Author: Xiang, Haihao Date: Thu Jul 19 10:03:19 2007 +0800 block some signals within critical section to avoid dead lock. commit 25658f838bd1bcd7559d7a032d127c626833fb7c Author: Xiang, Haihao Date: Mon Jul 16 13:03:58 2007 +0800 1. The pitches for y/u/v surfaces are 1024bytes aligned. 2. clean code commit 8f316a4584d0676e5dae051698bde0831f018cc4 Author: root Date: Thu Jul 12 16:24:03 2007 +0800 1. clean code 2. fix an error in map_state commit 4844254431695158287167e3b0fad25d9efb7a6c Author: root Date: Tue Jun 26 16:32:30 2007 +0800 a fix for 945G/945GM commit 8c249765ce788f8adb0325a8e3016a0eae74b13b Author: root Date: Mon Jun 25 14:07:01 2007 +0800 1. using batch buffer 2. implement macroblock_ipicture instruction 3. 16bit INTRA block commit 2b20b395541f786e4009211e4c56042257b8d114 Author: Xiang, Haihao Date: Mon Jun 25 10:43:49 2007 +0800 fix a bug related to display surface commit 6e47601ac7427390fa4cb6e228dfb566ff95db09 Author: Xiang, Haihao Date: Mon Jun 25 10:40:08 2007 +0800 fix some bugs commit d038ffdfffb846e22f360faac5d469c8e59795ad Author: Xiang, Haihao Date: Mon Jun 25 10:37:12 2007 +0800 Release resource allocated for surface/subpicture commit a9bf7e28b91692c7c7a4915cdf9603cd2ef025ea Author: Xiang, Haihao Date: Mon Jun 25 10:33:35 2007 +0800 fix some bugs commit ccac60bf035bb54661c13f306031def81e105a32 Author: Xiang, Haihao Date: Mon Jun 25 10:23:28 2007 +0800 fix some bugs commit 934da9f2b83716bb37d0719a61b8e6b179fff2cd Author: Xiang, Haihao Date: Mon Jun 25 10:17:08 2007 +0800 enable XvMC for i915 commit c7920a0e819308762fca3d6fc7ab194bd565b06a Author: Dave Airlie Date: Thu Jul 19 15:09:54 2007 +1000 strip out remainder of drmmm code in driver commit 37652b68880f1881b90bd22218cfe86eca7e5974 Author: Dave Airlie Date: Tue Jul 17 14:03:21 2007 +1000 intel: oops I commited pixman local workaround - undo it commit e40f6a4923d1323702406266e90eae3218a8a44e Author: Dave Airlie Date: Tue Jul 17 09:20:07 2007 +1000 intel: actually 2.3.1 should be good enough commit 1e169be25b2e4ab34afd4b8ae8ae0041f6069125 Author: Dave Airlie Date: Tue Jul 17 09:17:31 2007 +1000 intel: don't try and use TTM memory manager with old libdrm interface I probably need to release a libdrm with this interface in it now.. commit ff2be3995d33f9e4b7f63b380f166b6168c9b9c6 Author: Keith Packard Date: Fri Jul 13 12:47:18 2007 -0700 Remove hard-coded CRT blanking frobbing for load detection. CRT blanking needn't be adjusted to perform load detection on 9xx chips, and the 8xx load detection path now adjusts blanking just during load detection. Adjusting the blanking interval turned out to cause many monitors to fail to sync. commit 00f4587025a3879626623135b0a153fcdb906719 Author: Keith Packard Date: Fri Jul 13 10:58:06 2007 -0700 Ensure pipe/output active before doing load detection. If the pipe or output have been set to DPMSOff, then load detection will not work correctly. Also, share the load detection configuration code between crt and tv outputs. commit 6f18300aed1340348c6d395f326061b5315be643 Author: Keith Packard Date: Mon Jul 9 21:29:55 2007 -0700 Eliminate bogus (and harmful) blanking adjustment for load detect. Instead of always adding blanking to mode lines, use the FORCE_BORDER option on i9xx hardware where it works, and dynamically add a bit of border if necessary on i8xx hardware to make load detection work. This may cause flashing when a usable crtc is not otherwise idle when load detection is requested. commit 04130ac6b705aa49161fb6dae83ad0bdd76e89d9 Author: Wang Zhenyu Date: Wed Jul 11 11:42:56 2007 +0800 Fix i915 rendering for tiled buffer Make it to check fence register for dest buffer. commit 88f8b688e2316ae4a1f7485f0010ce90de54783a Author: Eric Anholt Date: Mon Jul 9 12:56:13 2007 -0700 Fix some physical address handling for >4GB addresses. The upper bits would have been inappropriately dropped on G33-class hardware, and on G965-class hardware in a 32-bit environment. The only use of physical addresses on these should be for FBC, though, and FBC requires addresses below 4GB. This is unresolved. commit bf831117b4659cc4f2774098dee938505f780a9b Author: Jesse Barnes Date: Sat Jul 7 10:15:32 2007 -0700 FBC fixes: - allow FBC and Tiling to be forced off if configured to do so - only touch FBC registers if pI830->fb_compression is true commit b426866fe1be2ad3861559beff69186379a6afad Author: Jesse Barnes Date: Fri Jul 6 20:48:40 2007 -0700 Fix manpage to reflect default behavior. commit 377c58373daa6bef5d37ead2b6f9a769a905b6fa Author: Jesse Barnes Date: Fri Jul 6 20:39:19 2007 -0700 Fix naming of FBC plane enable bits (mistakenly called them pipes earlier). commit 9c0388dc8d4c6495fae21af6da644b34e20173d1 Author: Jesse Barnes Date: Fri Jul 6 20:38:41 2007 -0700 Update man page with current behavior. commit cecbc71fdc9af832cef23427696f6f654f7d6104 Author: Jesse Barnes Date: Fri Jul 6 16:36:34 2007 -0700 Fix debug output in fbc enable/disable routines. Add logic to make sure fbc isn't enabled twice on two different pipes. commit 4359df9419d2d02a2f9d9adc7f5a49ecf07ddd30 Author: Jesse Barnes Date: Fri Jul 6 16:17:45 2007 -0700 Fix tiling and fb compression defaults for 965 (not yet fully supported). commit ca593a5219549df94a6d234ebbcf9e7c44723c9b Author: Jesse Barnes Date: Fri Jul 6 16:10:52 2007 -0700 FBC and tiling changes - change framebuffer option name to "FramebufferCompression" - add new "Tiling" option (controls all tiling, not just front buffer) - add debug message to fb compression enable/disable routines - update man page with new options commit 8798ef11321ee6957919279076758d47ad956cf3 Merge: 8919b22 3c552af Author: Jesse Barnes Date: Thu Jul 5 12:21:31 2007 -0700 Merge branch 'master' into fbc commit 8919b2292147add41a1c1c6e5e673257cb6c6c6e Author: Jesse Barnes Date: Thu Jul 5 12:21:06 2007 -0700 Re-add tiling kludge, but only for 965. commit 407b124af8f7bb42abe4eecc87476c4c3e555cd0 Author: Jesse Barnes Date: Thu Jul 5 11:31:34 2007 -0700 Remove tiling kludge. May need more fixes for 965. commit 7a87b9d2a2eb4d281dce67586756ff5653b2805a Author: Jesse Barnes Date: Thu Jul 5 11:23:06 2007 -0700 Revert discard alpha change, requires other fixes to work. commit fecf964534f5ba6d40480cb13adc89094946a51e Author: Jesse Barnes Date: Thu Jul 5 10:59:23 2007 -0700 FBC fixes: - properly check several FBC enablement constraints - don't use alpha discard if FBC is in use commit 60ee7b6a91b2b8c447130c60cd8b19eb68119777 Author: Jesse Barnes Date: Tue Jul 3 14:20:34 2007 -0700 Fixup line length buffer padding, add kludge for front buffer tile pitch. commit 3c552af65d28fafec1d09484a8914b690b961349 Author: Eric Anholt Date: Mon Jul 2 18:33:47 2007 -0700 Update documentation and bump driver version to 2.1.0. commit f02036aedcd7866c567a6adc070eda3dad872105 Author: Jesse Barnes Date: Mon Jul 2 15:42:02 2007 -0700 Framebuffer compression changes: - move FBC register definitions to i830_reg.h - add fix from Arjan for 965 depth buffer tiling - add VT switch and clear-at-server-start code for FBC registers commit 2b9961eb9ce8734565ecdb01cb11610714d7f610 Author: Eric Anholt Date: Mon Jul 2 15:16:33 2007 -0700 Fix reversed LVDS dither enabling logic on GM965. commit 3d9ee8b2991ec0da8cc21b8455ff7f00fd0335b5 Author: Eric Anholt Date: Mon Jul 2 14:38:28 2007 -0700 Bug #11365: Disable the panel fitter unless it's needed for the chosen mode. The automatic panel scaling appears to choose bad sampling on some GM965 hardware for 1:1 mapping modes, and there's no real sense in having it on if we just want 1:1. commit b384c608978dcd3d2ea6c0018179673cb4735f4c Author: Jesse Barnes Date: Mon Jul 2 09:32:28 2007 -0700 Enable framebuffer compression (use Option "FrameBufferCompression" "true" in your xorg.conf). Should save ~0.5W during typical 2D usage. commit 1e2e301348b4168aeed38b3fdc6b0e43d5678a86 Author: Keith Packard Date: Sat Jun 30 12:45:24 2007 -0700 Fix load detection to use border region instead of blanking. Make sure there is some border area to use by changing how the pipe is configured, then pick a scanline in the middle of the border for load detection. This lets the load detect code use an active pipe instead of requiring an idle one. commit 11862c2e1f23b77b56d7bd8b384579b5e3ae377b Author: Alan Coopersmith Date: Thu Jun 28 23:31:28 2007 -0700 Add *~ to .gitignore to skip emacs & patch backup files commit 6503eb45023d0db9a94cb9d1e14a26af07a6628d Author: Alan Coopersmith Date: Thu Jun 28 23:30:35 2007 -0700 Add AM_PROG_CC_C_O to configure.ac Clears automake-1.10 warning: src/bios_reader/Makefile.am:8: compiling `bios_dumper.c' with per-target flags requires `AM_PROG_CC_C_O' in `configure.ac' commit 5257e36f502676fd6a44bbb8e747d9138ed3bc5c Author: Keith Packard Date: Thu Jun 28 15:29:52 2007 -0700 Handle dual-channel LVDS on i855. Just as with i9xx LVDS, the i855 LVDS can operate in dual-channel mode with a modified P2 divisor value (7 instead of 14). Just using the existing 9xx code for 855 appears to work fine. commit 16bfcb8042519f24b4494fd621814f39949ceeb6 Author: Keith Packard Date: Thu Jun 28 15:27:56 2007 -0700 Decode PLL registers in LVDS mode a bit better in debug code. LVDS mode changes how the PLL works in fairly dramatic ways; the debug code wasn't properly accounting for those differences resulting in fairly bogus debug output. commit 9675ccb30818bf831ac4c634751ab4bfe35f7bfe Author: Wang Zhenyu Date: Wed Jun 27 09:23:33 2007 +0800 EXA: fallback mask transform on i965 It needs to fix shader programs which hasn't been done yet. commit 7a2300c88ae59f5b7c3ce89d33147e3f0ca23c18 Author: Wang Zhenyu Date: Wed Jun 27 09:19:22 2007 +0800 EXA: don't have to check offscreen size DDX will check it for EXA_OFFSCREEN_PIXMAPS flag commit fff4a3b58fa18ee2ad91f998d190e90b77c051ab Author: Carl Worth Date: Mon Jun 25 23:15:58 2007 -0700 Use local structures for vs_state, sf_state, and wm_state commit 0a8a4afd3c59011d6b1f5b39aedfb9bce0e55c48 Author: Carl Worth Date: Mon Jun 25 23:12:23 2007 -0700 Use local structure for src_sampler_state and mask_sampler_state commit 499166a60fcbf16021bd9ec233790ba55803aa44 Author: Carl Worth Date: Mon Jun 25 23:09:17 2007 -0700 Use local structure for mask_surf_state commit a418ef7316808b239884a90c3fe890220bcc0242 Author: Carl Worth Date: Mon Jun 25 23:07:19 2007 -0700 Use local structure for src_surf_state commit 0e3c0b17826b7b5a21ee2c1d789b084fc167f1ed Author: Carl Worth Date: Mon Jun 25 23:05:50 2007 -0700 Use local structure for dest_surf_state commit 41a2c0f15446d59678461648f476fa71d40d44e0 Author: Carl Worth Date: Mon Jun 25 23:03:47 2007 -0700 Use local structure for cc_state commit 59f2150caca7eb374a2db43a472ba85f50d23274 Author: Carl Worth Date: Mon Jun 25 11:28:57 2007 -0700 Remove redundant i830WaitSync from i965_prepare_composite There were two calls to i830WaitSync, and between them no state was being changed---just offsets were being computed. commit 66aa0e61e1e8d2216a9c0555be5be004ed0a3192 Author: Dave Mueller Date: Fri Jun 22 16:45:27 2007 -0700 Bug #11171: Add support for the Ti TFP410 DVO TMDS transmitter. commit f8d7cbc6e1322acad3351591336cefcfba7d9aaf Author: Eric Anholt Date: Fri Jun 22 16:29:21 2007 -0700 Move the ivch's fixed panel mode support to i830_dvo.c for other LVDS drivers. This also results in removal of the setup hook, which was being called unconditionally and breaking non-ivch dvo drivers. commit ec236c76b93aea5f2ee1e8b8509cde4625974fcb Author: Keith Packard Date: Fri Jun 22 16:32:46 2007 +0100 I830 needs to have plane/pipe/pll started in mode_set. The patch for the i855 to stop enabling plane/pipe/pll in mode_set broke the i830. Revert that just for the i830, leaving it enabled for the i855. commit d957c6b8e1dde8e11c1db3431e0ff58c5d984880 Author: Keith Packard Date: Fri Jun 22 01:32:02 2007 +0100 Increase vblank wait timeout from 20ms to 30ms. 49.6Hz < 20ms. The x40 LVDS mode has a 49.6Hz vertical refresh. Waiting for only 20ms can sometimes cause the driver to start programming the hardware before the vblank has occurred, which will lock up the i855 chipset. Extend this to 30ms (the maximum timeout used by the BIOS) to ensure this doesn't happen. Detecting actual vblank occurance using the various status registers should also be possible but isn't yet working. commit a67c2965385001bcb8987265f698ff0f5809cd11 Author: Keith Packard Date: Thu Jun 21 23:59:38 2007 +0100 Follow BIOS configuration for Legacy Backlight Brightness. The backlight control in the LVDS controller can either operate in 'normal' mode or 'legacy' mode. In legacy mode, it uses the PCI config space register 0xf4 which can range from 0 to 0xff. In normal mode, it reads the range and current value from the BLC_PWM_CTL register. commit d6e46f67ab3af1ad3bfa72acb0efd9fe79dbf1dc Author: Keith Packard Date: Thu Jun 21 20:16:36 2007 +0100 Eliminate some uninitialized variable warnings commit 9d104634cf03bea82d1467f01e577cb8d2e4b554 Author: Keith Packard Date: Thu Jun 21 01:15:39 2007 +0100 Add 3DSTATE_CLEAR_PARAMETERS bits commit 3bbf313ba541526a893915f8b6c64b1eccf325e0 Author: Wang Zhenyu Date: Tue Jun 19 09:33:50 2007 +0800 Fix left G33 issues Be sure to check G33 chip type in: - sdvo output - Y-major tile - crt detect - and xaa composite Sorry for that I should have fixed them very earlier... commit acef342c870f3b5b781e48c8bf44739aa5ee8ffa Author: Eric Anholt Date: Mon Jun 18 11:57:48 2007 -0700 Bug #11295: Disable textured video on i915 with framebuffer width too large. commit fbbb41bc5e03478cb46ee8f64ef68b23ff3fc14b Author: Keith Packard Date: Sun Jun 17 14:59:24 2007 +0100 Let DPMS functions enable plane/pipe/output on 8xx hardware. On 855, letting crtc_mode_set enable the plane and pipe will occasionally hang the chip. Instead, wait for crtc_enable to light things up. For 9xx, leave things alone. commit d5ca000ece145a35fd6df0dcf3fb3460bd2d64e3 Author: Rémi Cardona Date: Sat Jun 16 13:17:54 2007 +0100 Include stdint.h to get uint64_t commit 6b2ae93506d6795f87d6993bebfcb4e6632508ee Author: Dave Airlie Date: Fri Jun 15 23:30:04 2007 +1000 sdvo: add support for RGB outputs on SDVO This lights up my monitor VGA-1 - it doesn't look the best though commit 671ba03befebfdd7256855858987aabc28b2e8cd Author: Eric Anholt Date: Wed Jun 13 16:30:26 2007 -0700 Fix and enable the 915-class planar textured video path. commit 6c29e0bae5f1e7cee02b678418394abb971594eb Author: Eric Anholt Date: Wed Jun 13 13:40:39 2007 -0700 Improve the drm_i915_flip_t check. commit 420e41e7921d3cc07c784fd17936ec8a675f3b20 Author: Eric Anholt Date: Wed Jun 13 13:34:26 2007 -0700 Revert "Replace failure-prone configure test for fresh libdrm with a simple ifndef." This reverts commit c2b130354aecffbeb2a2d23c7371461feaf5766a. Sadly, a non-working DRM_IOCTL_I915_FLIP already existed. commit 51612e5ac3ddfb2bb172c58f2dfff9631093b69c Author: Eric Anholt Date: Tue Jun 12 16:09:54 2007 -0700 On hang, dump up to the head pointer, not just up to the tail. commit ceb6dd72443c094212b0281c42cbe92e9a29f682 Author: Eric Anholt Date: Mon Jun 4 16:37:53 2007 -0700 Fix context switching between DRI and X. Now, all 3D pipeline consumers in the driver just call IntelEmitInvariantState(), which handles basic state setup, the caching of that state setup, and notifying DRI clients. This also removes a mistaken idle wait in the Render code which was papering over the brokenness in the context switching. commit c2b130354aecffbeb2a2d23c7371461feaf5766a Author: Eric Anholt Date: Tue Jun 12 08:49:21 2007 -0700 Replace failure-prone configure test for fresh libdrm with a simple ifndef. commit 0e1deb607f94e4aa3ec4b9df8ff7a07a1c95e31d Author: Eric Anholt Date: Mon Jun 11 17:33:33 2007 -0700 Fix a typo in _3DSTATE_DEPTH_SUBRECT_DISABLE definition. This is already fixed in the definition in the 3d driver. commit 8d7a0ccd4f674659eb781def2cfdc3a6e5a219ce Author: Eric Anholt Date: Mon Jun 11 17:33:07 2007 -0700 Clean up some nits in i915_video.c setup. - The screen dimensions were used for the clipping despite drawing being done to any pixmap, not necessarily the screen. - One piece of state setup was not documented anywhere, and isn't used in other 3d hardware paths that also work. - A 3DSTATE_MODES_1 command (830-class only) was issued even though it no longer exists. commit 15caa64a497dcc0eacb0f91166d9b70206a8db35 Author: Keith Packard Date: Fri Jun 8 18:44:28 2007 -0700 Add description for how to use the frame and pixel counter registers. The 24-bit frame and pixel counters were not described in detail and will be useful for DRM. commit 404fd47573f855b0442d49a383542fc093825ad0 Author: Wang Zhenyu Date: Wed Jun 6 11:01:48 2007 +0800 Enable overlay on G33 class chipsets Which have to use gfx vm offset fot setup overlay regs. commit f4c05973d391bdb0a9b0eadb155548310baa98fd Author: Wang Zhenyu Date: Tue Jun 5 11:07:41 2007 -0700 Add support for the G33, Q33, and Q35 chipsets. These chipsets require that the hardware status page be referenced by an offset in the GTT rather than a physical memory address, so the X Server allocates it rather than the DRM. commit 36fcaeb2ef94db5399071540bba106dec3db81d5 Author: Eric Anholt Date: Mon Jun 4 15:58:31 2007 -0700 Fix misplaced merge of 1280x768 panel fixup. commit 8a19e7d57bc23dd163b45e0ab7deca4f074c934d Author: Keith Packard Date: Tue Jun 5 00:09:57 2007 -0700 Always ensure the pipe A is lit when activating overlay on pipe B. Ok, so moving video from pipe A to pipe B still requires that pipe A be active during the transition. Instead of trying to be fancy, just ensure that pipe A is running on each transition to pipe B. commit e986f6cb62f8644c5fa835bd7dfb7b014c2677c5 Author: Keith Packard Date: Mon Jun 4 23:52:23 2007 -0700 Automatically switch overlay when crtcs are reconfigured. As crtcs are disabled and enabled, make sure the automatic crtc selection mechanism drives overlay configuration at each request to display an image. commit 0984c1fc0963f1ebab31f5b8fce5ad4c387fbd2c Author: Wang Zhenyu Date: Thu May 31 10:17:26 2007 +0800 Add pci ids for 945GME commit 88ee25ebad78e54d243d728b775a69365359b5fb Author: Wang Zhenyu Date: Thu May 31 10:13:30 2007 +0800 Add pci ids for 965GME/GLE chip commit 92e4deb50e049cc83cbde4995ba0b901feceb15a Author: Keith Packard Date: Wed May 30 11:49:07 2007 -0600 Extend XV_PIPE range to include new -1 value commit 888a4a5f469bf955e3ee3e184b628808ae8a4498 Author: Wang Zhenyu Date: Wed May 30 14:42:35 2007 +0800 Fix i965 render's draw clip rectangle Use scrn's virtual size is not correct in rotation rendering. This fixes initial rotation problem on i965. commit 516fb73ffee0aea7cf892e6703d37f8ecf52b812 Author: Eric Anholt Date: Tue May 29 10:22:25 2007 -0700 Remove README statement that 830M panels are unsupported. commit 72462568da589054828b72ace83232a71636ee73 Author: Eric Anholt Date: Tue May 29 10:21:12 2007 -0700 Expand manpage description of outputs supported. commit 906b974bfeeed18d79c244ad3db4f5d30e13e4c8 Author: Eric Anholt Date: Tue May 29 09:49:08 2007 -0700 Add a fixup to LVDS panel mode detection for 1280x768 panel from text mode. Apparently some BIOSes will program a small mode with large blanking instead of using the pannel fitter. commit 4b2781291844b61b397e257a0fdb43e964e5f603 Author: Keith Packard Date: Sat May 26 10:09:11 2007 -0700 Mark IVCH as connected when detected commit 2a365eab0178c28782fba97bdd22365f30ce8963 Author: Keith Packard Date: Sun May 27 12:35:55 2007 -0700 On i830, Pipe B cannot be lit the first time unless Pipe A is running. I don't understand it, but just like the video overlay, if Pipe A is not running, Pipe B will not turn the first time it is activated. This patch restructures the code used for the video overlay to share it with the crtc commit function. commit ff8c8cb869a3c780dbd826f7c94f06e4f3fda6af Author: Keith Packard Date: Fri May 25 20:29:59 2007 -0700 Compute and clip to crtc before call to xf86XVClipVideoHelper. By clipping to the crtc ahead of time, xf86XVClipVideoHelper will correctly clip to the bounds of the crtc, eliminating the need for any custom crtc clipping. Also, replace the broken xf86XVFillKeyHelper with a private version that doesn't end up stuck with the wrong clip list when the root window changes size. commit 33f635d79fe891079558fd909d564f3cf424c482 Author: Keith Packard Date: Fri May 25 17:32:06 2007 -0700 Ensure Pipe A is active when enabling overlay the first time. The overlay on the i830 appears to be clocked by Pipe A when being enabled. If pipe A is not running, it will freeze the overlay and blank the screen. Setting a random mode on the Pipe and turning it on fixes this problem nicely. commit ff0ac8ea63dd6e55573652c5826c482881da0d62 Author: Keith Packard Date: Fri May 25 17:26:15 2007 -0700 Xv does not require directRendering commit 109e5d597b76f7414601cb39c07b133ebf1b0e61 Author: Keith Packard Date: Thu May 24 11:40:50 2007 -0700 Clean up CRTC selection. Remove more overlay blocking. Create separate CRTC selection function, use ints instead of floats for coverage measurement. Remove pipe stalls waiting for overlay update. commit dfb1ec9a07f74125cb1724d41ed4342c4714e12b Author: Keith Packard Date: Thu May 24 11:23:44 2007 -0700 Eliminate blocking for video overlay. No need to block for the overlay; just use the idle buffer. This will always work because the buffer switch occurs at vblank time, so there is always plenty of time to get the next buffer contents in place before it starts getting scanned to the screen. commit d172344599585e11388e59659dc9aaa86d7a31c1 Author: Keith Packard Date: Wed May 23 20:00:16 2007 -0700 Reformat i830_video.c to four-space indents. Yes, I can't stand it anymore. it's a huge patch, but git-diff -w shows no changes. commit 02935ced3fba598a01d908ae49ccc30cbcc765a8 Author: Keith Packard Date: Wed May 23 19:24:25 2007 -0700 Clean up overlay management. Create separate on/continue/off functions for overlay. Manage overlayOn boolean within those functions. Eliminate redundant management code in other routines. commit 08753f9b79f3f09879a18b552d90d88dbf52d4be Author: Keith Packard Date: Wed May 23 18:59:10 2007 -0700 Use FLIP_CONTINUE with ~OVERLAY_ENABLE to turn overlay off. This makes the overlay work on i830 with the modesetting driver. I don't know why the pre-modesetting driver worked without this, but it did. A more 'correct' fix would be welcome, but this does seem to do the trick. commit aa187186dc4f2d770a642060fe54f547ea8952b3 Author: Keith Packard Date: Mon May 21 10:49:08 2007 -0700 Automatically select crtc based on coverage. By default, select crtc based on which one covers more of the video output. pipe property can be used to override selection when both have partial coverage. commit f5017a06a271bba0ace3c5415b78e78bc0c96f22 Author: Keith Packard Date: Sun May 20 17:25:33 2007 -0700 Use CRTCs instead of pipe indices for video pipe selection. Replace pipe indices with crtc indices and store references to the xf86Crtc objects in the video private structure. commit 2df87256df755e972eb884bc742832038a020b2c Author: Keith Packard Date: Sun May 20 17:23:26 2007 -0700 Dump pending ring on crash. When the hardware locks up, dump the pending commands in the ring for analysis. commit 9971fac87622c93503540196e1756fded3d4869e Author: Michel Dänzer Date: Tue May 22 10:46:39 2007 +0200 i830: Provide new DRI texOffsetStart hook when available with EXA. commit 5390a2e2611950d3f48cc735df4a0c37bc5377a5 Author: Michel Dänzer Date: Fri May 18 17:51:36 2007 +0200 Update vblank pipes when a pipe gets disabled. commit 4120a20626998272424225261f2cf7960b7ec0ca Author: Wang Zhenyu Date: Fri May 18 10:10:34 2007 +0800 EXA: add render enter helper function That notify mesa rendering is smashing the state, and check last 3d operation to do sync after we're swapped in or others. commit 8db28aeaa6e908017b40bd9180f144a2972f6278 Author: Wang Zhenyu Date: Fri May 18 09:54:34 2007 +0800 Fix ring debug code Use proper unsigned type for timer variables, and try to dump 965G state. commit 16e50a91dd8b3676e8ce06052c549ab27e6843b7 Author: Wang Zhenyu Date: Fri May 18 09:53:36 2007 +0800 EXA: remove a flush cmd in i915 render code commit 12a9fcfe1b25cee850380d8ce11ef11cde9aaacb Merge: b930bb9 e89d5f2 Author: Keith Packard Date: Thu May 17 15:11:29 2007 -0700 Merge branch 'master' of git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit e89d5f275442915cc7777e75d3fcf7e7ed0f2084 Author: Keith Packard Date: Thu May 17 15:00:12 2007 -0700 Make each output control clones/crtcs. Split DVO into LVDS, TMDS, TV. Move clone/crtc config into each output where it's easier to understand (no need for a switch statement in I830PrepareOutputs. Also, split DVO into three sub-types (TMDS, LVDS, TVOUT) as those have different cloning abilities. commit a441954630c6cdabbf463bfc3404160f97a04b4f Author: Keith Packard Date: Thu May 17 14:11:49 2007 -0700 Enable panel fitter on ivch DVO. Using BIOS source code as a guide, set up the panel fitter on the ivch. This involves setting the pipe to the panel fixed mode, the DVO to the source size and assigning vertical and horizontal scaling factors in the ivch itself. commit c0daa0a982e7074af4b50653b4a45b0a6352b43d Author: Keith Packard Date: Wed May 16 14:02:00 2007 -0700 Change DVO module interface to pass more state across. Fix IVCH display. The DVO module interface reflected most of the xf86Output API to the underlying functions; finish that work given the changes that have since occurred in the xf86Output API. Move the LVDS-specific code into the IVCH module and make that work on the Thinkpad X30 (an i830-based laptop). Panel scaling does not work yet. commit b28817a87a1608e849e4a9a736dda43533a84b0c Author: Keith Packard Date: Wed May 16 13:59:36 2007 -0700 Add i830_bios_get_aim_data_block to read AIM data from BIOS Add-in modules have per-module data in the BIOS which contains configuration information which cannot be entirely discovered. commit b31bef1a8effa9acb6de7edd206b9d8c48d88144 Author: Keith Packard Date: Sat May 12 20:04:31 2007 -0700 Deal with i830 CRT load detection which cannot use FORCE_BORDER. Chips newer than the i830 can force the border color for the active period of the screen, allowing the load detection to easily see the right data. In addition, newer chips appear to have more sensible load detection hardware which either ignores inactive periods on the screen or performs some longer-term averaging. The i830 appears to provide unfiltered samples of the detected load. For the i830, then, emit a border at the bottom of the screen and, for load detection, simply turn it purple and wait for the current line to be within the border. Sample an entire scanline, counting the number of times the load detection sees a monitor. In my testing, the presence of a monitor will cause the detection to succeed every time, while the absense will cause it to fail about 75% of the time. The code here, checks for presence at least 75% of the time, which should be adequate. Also, as the new mode configuration code has already taken care to enable the CRT output, eliminate much of the load detection code which is simply duplicating functionality from the general mode setting code. This should result in faster load detection as this code will now run in no more than one frame time. It does burn the CPU the whole time though, polling the displayed scanline register. commit b930bb9d6da8c24dbe0949afb7bb2aa4bcb24687 Author: Eric Anholt Date: Thu May 3 13:44:12 2007 -0700 Disable vblank interrupts when no DRI clients are running. (cherry picked from commit 6621dd71ada839f4c1742e9e5b272e924cee21d9) commit 3b769af53e0ef6ef9b56afd679446c73a0e63ea5 Author: Eric Anholt Date: Thu May 3 13:44:12 2007 -0700 Disable vblank interrupts when no DRI clients are running. commit 775fc125aa7ecd0f054959ef210be2df4dc54345 Author: Dave Airlie Date: Thu May 3 20:58:50 2007 +1000 i810: be a bit more verbose about disabling DRI commit 34f362d099d255f8f0bb34e9de30f953ee770163 Author: Eric Anholt Date: Wed May 2 15:40:49 2007 -0700 Fix typo s/i/index/ in LoadPalette for depth 16. Reported by: Haihao Xiang commit f850d4727a2ad55c2116d0788f6684b2a0192d24 Author: Eric Anholt Date: Wed May 2 14:16:21 2007 -0700 Make up a fixed panel timing for DVO LVDS, and use DVOA for DVO LVDS. The fixed panel timing will only be available when the LVDS is already on at X startup. So far, our only mostly-working LVDS driver is for the i830, and on i830 the LVDS is always on DVOA, so use that for all LVDS chips. This may need to change if we support the ch7017 I've seen used on embedded i845, for example. commit f3168e3b0c5664a322ca6bb1c81fc94844cb30ab Author: Eric Anholt Date: Wed May 2 14:08:30 2007 -0700 Disable non-working GTT decoding on i830, and fix map/unmap of GTT. commit 1fc630f24f8ad9e304cb0761f9cacca2224203c4 Author: Eric Anholt Date: Wed May 2 13:29:21 2007 -0700 Add DVO[ABC] register debugging. commit d0ec37e9c0ceab1080700cd7be4a7cc58552d465 Author: Eric Anholt Date: Tue May 1 15:56:37 2007 -0700 Make the DVO output name LVDS if it's an LVDS chip. commit 490d05f99d2b62dd612d514d9ae0badbac9285ce Author: Eric Anholt Date: Tue May 1 15:47:01 2007 -0700 Fix typo in previous commit with s/XF86_DRI/XF86DRI/ commit c7bb34e83d7c459d932d01070cfeffbbf6c703ac Author: Dave Airlie Date: Wed May 2 14:25:39 2007 +1000 disable all outputs on EnterVT This disables all outputs on EnterVT as the SDVO output can confuse the VGA output if the BIOS has enabled it on the same pipe but X isn't going to use the SDVO. Worked out on irc with keithp commit cae0ae237b79fa7d3a82dfc8d3fb595ccb6c63e1 Author: Samuel Thibault Date: Tue May 1 12:41:18 2007 -0700 Bug #10714: Fix build without DRI. commit 6748d620fbf39dd98982856c09256bdec0fc82a1 Author: Eric Anholt Date: Mon Apr 30 17:27:23 2007 -0700 Ignore VideoRam now that its original purpose is obsolete. It had been necessary to allow more than a small amount of memory to be allocated, but now those old small allocations people had configured are getting in the way. commit a4f1a7872f6f959bb4bc6568face710bee3589de Author: Eric Anholt Date: Mon Apr 30 17:13:09 2007 -0700 Allow physical-memory allocations within stolen memory. Because stolen memory happens to be a contiguous block of high system memory, we can just read the GTT entries for it to get physical addresses for our allocations there if needed. This reduces fragmentation of the aperture space, and will often reclaim up to 7 MB of memory that had been left unused since the simplified aperture manager was put in place, but without reintroducing the complexities of the old aperture manager. commit 7d0d34cfdcc67d07e7667e13a9413743853134f8 Author: Eric Anholt Date: Mon Apr 30 10:39:54 2007 -0700 Disable some clock gating functions documented to work incorrectly. commit 138ac8f36cb4e4b3776f313955372522646acbb2 Author: Wang Zhenyu Date: Sun Apr 29 14:43:19 2007 +0800 Alloc state mem buffer on 965G for xaa rotation 965G needs state mem buffer to setup render pipeline. Thanks Barry Scrott for report this. commit 0cd524e5411e35c8483c02ecc5062625809e6fc6 Author: Kristian Høgsberg Date: Wed Apr 25 18:09:10 2007 -0400 Implement the custom I2C protocol used by the ivch DVO. The ihch DVO uses a modified I2C addressing scheme as described in section 5.2 of the data sheet. Implement this by over-riding the I2C read and write word routines. commit 880314aabe6326ed56517034940f0e10fb16e866 Author: Keith Packard Date: Tue Apr 24 11:37:08 2007 -0700 CRTC Rotation under XAA wasn't hitting accelerated path. The server rotation code is now using the root window in IncludeInferiors mode rather than using the screen pixmap. Change the XAA Composite code to check for this case now. commit b23eae55c8cdd73e0aba1bf7ced283d402ee6470 Merge: 31bf269 cebdb8b Author: Keith Packard Date: Thu Apr 19 20:38:18 2007 -0700 Merge branch 'origin' commit 31bf269afed0a830e79cbbd9d4b1ee9843af326c Author: Keith Packard Date: Thu Apr 19 20:03:41 2007 -0700 Update version to 2.0.0 commit cebdb8bfc6170a0fb441039f4422917fd0c77e70 Author: Wang Zhenyu Date: Fri Apr 20 10:54:34 2007 +0800 EXA: set enabling bits properly for i830 This was found when debug exa on a 865GV, we should set pipeline state bits properly, otherwise the engine will hang. commit 60e891915af7d0f522c9c3f966599fa07779f7aa Author: Keith Packard Date: Thu Apr 19 14:02:23 2007 -0700 Eliminate LinearAlloc option and code. With the fixes to the 2D frame buffer allocation that allows up to 65536 lines of 2D frame buffer in XAA mode, the old linear allocation hacks are no longer necessary. commit cca389769001c657435f056e1f1c26b0f52a48bd Author: Keith Packard Date: Thu Apr 19 13:15:23 2007 -0700 Clean up 1.2 xserver build support. Convert relative X server source path to absolute. Check for local copies of needed header files before building, rather than requiring server source. Remove extra duplicate -I elements in AM_CFLAGS in sub directories. commit 07797fee88d6be0dfb30394a419dd86f8a3c9095 Author: Keith Packard Date: Thu Apr 19 13:01:37 2007 -0700 Fix mismatching braces when XF86DRI_MM is not defined. A closing brace was left inside #ifdef XF86DRI_MM while the matching open brace was outside. commit 163c565527e8cda1f5a47c7fd63f04c80feaf3c7 Author: Keith Packard Date: Thu Apr 19 13:00:03 2007 -0700 Use I2C delay function instead of usleep. usleep isn't always available, and we have an existing delay mechanism available to use. commit 378ceea3d9ddbec7a08ac2f07f9a8cd9cf3cef36 Author: Wang Zhenyu Date: Thu Apr 19 17:30:28 2007 +0800 Fix mem list order and remove extra unbind call when free memory commit db4b9e18810990e8900bdf54aa3091b876ea2658 Author: Alan Hourihane Date: Wed Apr 18 13:52:08 2007 +0100 Fix return status commit 3f5111940e35989d334aa99cd1b0eb26293ebf1b Author: Alan Hourihane Date: Wed Apr 18 13:27:59 2007 +0100 Update read_response to include the try on PENDING status and remove it from get attached displays call. commit 902388fa06f85486fe8010807ab53e4926cc979a Author: Eric Anholt Date: Tue Apr 17 14:21:25 2007 -0700 Don't try to init the XAA linear region unless we allocated memory for it. Reported by JM Ibanez commit 8abecae202b609375b6754dbd5ecce3d59036daf Author: Eric Anholt Date: Tue Apr 17 12:28:43 2007 -0700 Fix i852 EXA Composite acceleration setup. Reported by JM Ibanez. commit 2dbe8d678b02b724c4f06255383f49bb4c2708b0 Author: Timo Aaltonen Date: Mon Apr 16 14:14:19 2007 -0700 Fix build against xserver 1.2. commit a089ac11beb4c801928c17780401e913bc0d5257 Author: Eric Anholt Date: Tue Apr 17 11:01:05 2007 -0700 Add all the possible ivch slave addresses (still commented out). commit 37ee68a95ca8c86ebe9abafaaf55b060dd2a2f73 Author: Eric Anholt Date: Tue Apr 17 10:50:02 2007 -0700 Bug #10438: Fix 965 XV when sourcing from less than the full image. Bob deinterlacing in MythTV, and the zoom options in totem would result in attempting to source from outside the video instead of scaling appropriately. commit ac9181c014638dbeb334b40b4029d0ccb2b7a0fc Author: Alan Hourihane Date: Tue Apr 17 16:30:17 2007 +0100 Check for the PENDING message when reading the attached displays. Ensures the command has completed before continuing. (probably need to check PENDING in other SDVO calls too) commit ab5bdee8a62c842ae32aaef57eb841ebcb644d2b Author: Wang Zhenyu Date: Tue Apr 17 16:23:46 2007 +0800 EXA: fix i830 render Fix tex blend pipeline in case that src/mask pict has no alpha. Unmask color buffer write disable bits. These make rendercheck run fine on 855GM. commit 1a29750b8dba1371d7d0802744cdf2f3bfa83c13 Author: Wang Zhenyu Date: Mon Apr 16 16:21:39 2007 +0800 EXA: fix 830/845G pict format Fallback in 830/845G when pict format is a8, x8r8g8b8 or x8b8g8r8. The hw doesn't support them. commit 3a634bbd198650c1597dec4306d99928374c30f3 Author: Wang Zhenyu Date: Mon Apr 16 15:14:49 2007 +0800 EXA: Add i830 supported pict format XRGB8888, XBGR8888 commit 3bcb9a0b4ba7f3df346b5708617a7aafcbe2490a Author: Wang Zhenyu Date: Mon Apr 16 14:27:49 2007 +0800 EXA: i830 render misc fix and cleanups Try to map texture stream when setup texture map, and use correct order in load_immediate_1 cmd, which fixed crash on 845GV. Also remove some flush cmds. commit 64c30cf896f8bde3ee74c92b970132ab91b418cd Author: Wang Zhenyu Date: Mon Apr 16 13:58:50 2007 +0800 Update intel.man with 965GM chipset support commit b67adb6de34cede0e31f02f26cd5ec7b1adfa586 Author: Wang Zhenyu Date: Fri Apr 13 22:34:52 2007 +0800 Fix crash on G965 XAA with LinearAlloc option We should alloc xaa_linear mem in LinearAlloc case, otherwise we get crash when initializing xf86 fb manager. commit b5b243e4120d6a048fb6bbe8814fe3184271e9d9 Author: Eric Anholt Date: Thu Apr 12 12:34:23 2007 -0700 Add license headers to 965 programs. commit 08cd5f9b0f086e51112008d50de48556372899f9 Author: Eric Anholt Date: Tue Apr 10 11:26:46 2007 -0700 Bug #10520: i810 manpage not installed despite users expecting it to be there. Install it as an alias to intel.4x, since we're letting people load the driver as "i810" still. commit bf9771e9711361632afe3abeeedca7ce03497005 Author: Eric Anholt Date: Mon Apr 9 15:26:05 2007 -0700 Don't use extended regexps in sed when not necessary. Some seds require a flag to enable extended regexps. commit 656fbd952542ba5ddc9b018071008ceb38b1bd19 Author: Brice Goglin Date: Mon Apr 9 13:06:46 2007 -0700 Bug #10515: Fix module version number with more than one digit per field. commit aa850d3c633a510d787ee59e538e26e5c3acbf4a Author: Eric Anholt Date: Mon Apr 9 11:44:25 2007 -0700 Turn off ALWAYS_SYNC in EXA. This slipped in as a debugging aid, and never got turned off. The driver appears to work fine without it on an i915 system, and for the non-default EXA option, we'd rather see issues found than continue running with debugging aids and hiding them behind bad performance. commit d2e75d8acde2541b85a0050d9e47182c1db7fc2c Author: Eric Anholt Date: Mon Apr 9 11:34:57 2007 -0700 Avoid a magic number and correct a (currently harmless) ifdef in ResetState(). commit 9ed446e12bd21b7c8222c6e63a03a8e2ec6b97e2 Author: Eric Anholt Date: Tue Apr 3 11:39:48 2007 -0700 It's 2007 now. Didn't I get the memo? commit d9d05b553ca1f98efc230ef13f34576122311ac1 Author: Eric Anholt Date: Tue Apr 3 00:15:02 2007 -0700 Bump version to 1.9.94 for 2.0 RC4. commit eb45315b07624cb0506d539f523728a651efb798 Author: Eric Anholt Date: Mon Apr 2 18:20:33 2007 -0700 Move README to being a plain old text file. commit 9b78208f1ef1a8ee98f2aa139956659169e234ab Author: Eric Anholt Date: Mon Apr 2 18:20:15 2007 -0700 Move a bunch of debugging verbosity under Option "ModeDebug". commit 9ea83d440d6b9e30d4627e34168226a6b4b2a841 Author: Eric Anholt Date: Mon Apr 2 11:39:27 2007 -0700 Update README source for new release notes. commit c6d0bf9fb6033339159d98dc2b9fe44759ad9de5 Author: Eric Anholt Date: Mon Apr 2 10:09:43 2007 -0700 Remove long-stale TODO file. commit c59e5895a0ea1f219c8f63a02b429a024bd1ed66 Author: Dave Airlie Date: Mon Apr 2 07:18:04 2007 +1000 make warning info only so ppl don't go reporting stupid bugs commit e119eaabb2ad1ffc1d83f18199f49c52ec71b0fe Author: Eric Anholt Date: Fri Mar 30 17:09:18 2007 -0700 Warnings cleanup in ch7xxx. commit fd98e88d1a6e0e8d35bda868e7afcb78d2d11524 Author: Eric Anholt Date: Fri Mar 30 17:07:29 2007 -0700 Finish off some function renaming that was missed before. Thanks to alanc for catching this. commit 274b99e5e750228eba9a67773725a40ebaa9bf56 Author: Eric Anholt Date: Fri Mar 30 17:06:43 2007 -0700 Don't forget the warnings CFLAGS in subdirectories. commit aa6a9abb34e93780c07563ab5b21d8c064ea0a1c Merge: 670c852 107ac12 Author: Keith Packard Date: Fri Mar 30 12:10:17 2007 -0700 Merge branch 'crestline-qa' commit 670c8521f18f01b9ea899ceb68d2a3dbb884b199 Author: Eric Anholt Date: Thu Mar 29 13:43:31 2007 -0700 Add missing file for old server compatibility build. commit 89c84f939f2dbed1d03a5f0e1daae23a229e47bc Author: Eric Anholt Date: Thu Mar 29 13:40:52 2007 -0700 Whitespace cleanup in Makefile. commit 6cd3b2c2de4596886aab85988b16cf63e8887add Author: Wang Zhenyu Date: Tue Mar 27 15:34:32 2007 +0800 EXA: i830 fix blend action i830_get_blend_cntl() has already added S8 offset. commit 35b3dd881a333569ce20ddf36b915b095757a1ba Author: Wang Zhenyu Date: Tue Mar 27 15:33:43 2007 +0800 EXA: fix i830 componentAlpha support Pick fix from i915 render, change tex blend pipeline for CA. commit df96d9a11d038ad64673022ce14c24223b3bd34c Author: Wang Zhenyu Date: Tue Mar 27 15:32:53 2007 +0800 EXA: fix i830 texture setup Use LOAD_IMM_2 helper cmd for tex setup. Enable RepeatNormal support. Fix A8 format, i830 can support it now. commit aa78e67553ffe8ca986330f0ee49b5414c71a71f Merge: 768821b 2191634 Author: Eric Anholt Date: Mon Mar 26 22:00:36 2007 -0700 Merge branch 'master' of git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit 107ac12867eda6b86212159db15c640d3490f2da Merge: 6548817 2191634 Author: Nian Wu Date: Tue Mar 27 12:51:45 2007 +0800 Merge git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 768821bd3832aad01e44856199e60c6b7726a83b Author: Eric Anholt Date: Mon Mar 26 21:27:54 2007 -0700 Bump version to 1.9.93 for 2.0RC3. commit 2191634dd67b3219bb88f365bcf951d5a58140e8 Author: Alan Coopersmith Date: Mon Mar 26 14:58:41 2007 -0700 Add Solaris to list of OS'es with agpgart in man page commit 1c809f92467f97b098bcc89d66e60f6f88d9bade Author: Eric Anholt Date: Mon Mar 26 13:03:28 2007 -0700 Update .gitignore. commit f7befe50af4c13554d1f7aee6b05848ac312411b Author: Eric Anholt Date: Mon Mar 26 13:01:11 2007 -0700 Power on the LVDS B-channel pairs only when we've chosen dual-channel mode. It was basing off of the clock rate, but we have an override to use the existing dual channel state when we can detect it, so the two settings were conflicting. commit 827dc457a4fd0b97c95ec696ec9c3cd2f4a4becb Author: Eric Anholt Date: Mon Mar 26 12:45:23 2007 -0700 Update manpage to remove Rotate option and point at xorg.conf instead. While here, update a few other bits as well. commit 654881794ae1ad7214e85091b9015ae0fbdc5ddc Merge: 6de3edc d572771 Author: Nian Wu Date: Mon Mar 26 17:00:11 2007 +0800 Merge git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit d5727717c9141be28a69b1154ccd23c23207f8f6 Author: Keith Packard Date: Sun Mar 25 23:44:59 2007 -0700 Switch TV_FORMAT property to format XA_ATOM This allows the driver to report the set of valid formats in the property data. commit 6de3edcb52e6258f1af75e4f4bef73de1698445d Merge: d874aa3 1e6e675 Author: Nian Wu Date: Sat Mar 24 17:00:13 2007 +0800 Merge git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 1e6e675524461ef0eb1983de89e2877426571a55 Author: Keith Packard Date: Fri Mar 23 23:42:52 2007 -0700 Eliminate calls to RRPostPendingProperty. RRPostPendingProperty has been removed in favor of RRPostPendingProperties, and that call is now managed outside of the driver. commit 28da6f4e307880326dd553f50fe3fff3b9be9f4f Author: Keith Packard Date: Fri Mar 23 14:36:42 2007 -0700 Record 3D state loss at EnterVT in last_3d value. last_3d set to LAST_3D_OTHER indicates that the 3D hardware has unknown state. commit ab19439cf4592e4607dc0bfc602aba3d56645a42 Author: Keith Packard Date: Fri Mar 23 14:34:27 2007 -0700 Don't call AdjustFrame on EnterVT. AdjustFrame is strictly for legacy compatibility; calling it on EnterVT wrecks crtc positions. commit d874aa31599da4777438cc51469afe9b66601f55 Merge: 94dbc37 26f32ef Author: Nian Wu Date: Fri Mar 23 17:00:12 2007 +0800 Merge git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 26f32ef680a19e63af4b7c8c84141fe32263f298 Author: Keith Packard Date: Fri Mar 23 01:17:58 2007 -0700 Property size is in units, not bytes. Several places were using byte lengths instead of unit lengths for properties. commit f48dc501fbf74e0ac348f0b77750016597849ef4 Author: Keith Packard Date: Fri Mar 23 01:08:08 2007 -0700 TV output properties: TV_FORMAT, LEFT, TOP, RIGHT, BOTTOM. Remove TV format from mode name, instead use an explicit output property and split the input resolution from the tv format. Add properties to set the blank area on all four sides of the image. commit 94dbc3725358d63fe0ac8e6749489c993d24ede2 Merge: 28af380 20b2685 Author: Nian Wu Date: Thu Mar 22 17:00:15 2007 +0800 Merge git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 20b26854abdacb6dc45cba2d81d515b2e47e25f1 Author: Wang Zhenyu Date: Thu Mar 22 10:33:15 2007 +0800 EXA: don't smash vertex header in G965 Originally we smashed vertex header to store texture coordinates, this is working as we only use sf/wm kernel and disable all other stages on pipeline. But better to not do this. This also cleans up vertex elements state and makes vertex buffer order looks "normal". commit 28af380ab133eb14d21dc650c77bdbab66576255 Merge: 300e893 e06c5f7 Author: Nian Wu Date: Wed Mar 21 17:00:04 2007 +0800 Merge branch 'crestline' of git://otc-graphics.jf.intel.com/git/xorg/driver/xf86-video-intel into crestline commit e06c5f727fb2e2de111ac9e691a877c56d2ca1b4 Merge: 0202399 3025fa0 Author: Wang Zhenyu Date: Wed Mar 21 15:04:21 2007 +0800 Merge branch 'master' into crestline commit 02023998663cc7f0735fadfb1719d93dc2e5a112 Author: Eric Anholt Date: Wed Mar 21 00:00:56 2007 -0700 Whitespace and symbolic reg names cleanup in i830_panel_fitter_pipe(). commit 3e9ec78b4f54defb9986e11e6f2ac3475755849d Author: Eric Anholt Date: Tue Mar 20 23:58:48 2007 -0700 Set the panel fitter to the right pipe on Crestline. commit 3025fa0fb2bf5ace7076796e45e2560fe8410e8d Author: Wang Zhenyu Date: Wed Mar 21 14:50:45 2007 +0800 EXA: try to enable rotation for G965 The new sf/wm should handle the texture sampling only in rotated case. Also fix possible hole in VUE slot. commit a50009604152bf9237c40bd098b3b1da3d018929 Merge: 0a612e7 2239448 Author: Eric Anholt Date: Tue Mar 20 23:32:19 2007 -0700 Merge branch 'master' into crestline Conflicts: src/i810_reg.h src/i830_display.c commit 300e893cec19dca48e00ee25014b8714dc13b278 Merge: 96e8699 0202399 Author: Nian Wu Date: Wed Mar 21 08:55:50 2007 +0800 Merge branch 'crestline' of git://otc-graphics.jf.intel.com/git/xorg/driver/xf86-video-intel into crestline commit 223944878cf38f86580df5a7d3102d86cfc061b9 Author: Eric Anholt Date: Tue Mar 20 14:33:53 2007 -0700 Attempt to fix single/dual-channel issues on i9xx LVDS panels. - Use the existing single/dual-channel state when available, as changing it doesn't appear to work out. - Set the power state of the CLKB and B0-B3 pairs according to whether choose to go dual-channel or not. - Restore the LVDS register at the appropriate point (before DPLLs are re-programmed. commit 96e86994f3d1b4938e99a751454ee99bebfe40d3 Merge: f465c23 0a612e7 Author: Nian Wu Date: Tue Mar 20 13:11:09 2007 +0800 Merge branch 'crestline' of git://otc-graphics.jf.intel.com/git/xorg/driver/xf86-video-intel into crestline commit 0a612e7115ff993bb8e9a00df13c0b0d20122fd6 Merge: 8bb6778 4c4faf2 Author: Wang Zhenyu Date: Tue Mar 20 11:34:40 2007 +0800 Merge branch 'master' of git://proxy.ims.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline Conflicts: src/i830_display.c Change LVDS output and postread like upstream. This might need to be retested on 965GM LVDS. commit 4c4faf260eb4dad1b1919c6168fa9ef477b98a39 Author: Eric Anholt Date: Mon Mar 19 13:36:37 2007 -0700 Set the CURSOR_SIZE register when present. Failure to do so gets you a lot of pretty colors. commit 64c14204453bea3f98d19861c450612e718e6c69 Author: Eric Anholt Date: Mon Mar 19 13:35:43 2007 -0700 Print the mode actually being set per pipe. commit 3ce802414a20ca8af128a00e6925a099dd90ceb4 Author: Eric Anholt Date: Mon Mar 19 11:35:11 2007 -0700 Add debug output for ADPA. commit c21b88d838fda1f00f6f6bcfe7855d32543c6f3f Author: Michel Dänzer Date: Mon Mar 19 10:45:58 2007 +0100 Fix build when DAMAGE is not defined. commit 991719c21a6cc1b5d9b7cbe30d4b333718b3e686 Author: Keith Packard Date: Sun Mar 18 23:05:33 2007 -0700 Make i830_sdvo_write_sdvox write everything twice. For some reason, certain chips don't correctly enable the SDVO hardware when this register is written only once. We're following what the BIOS code does and writing it twice now, but with extra posting reads to boot. Yes, this is cult-and-paste, but it fixes problems found on deployed hardware. commit 9118122a232d4cf7760bcb0874fe970c25251378 Author: Keith Packard Date: Sat Mar 17 21:34:03 2007 -0700 Allocate 4 separate buffers for HW Cursors on Linux. Linux cannot allocate a large fixed buffer for the HW cursors as needed for FreeBSD; instead, allocate four separate buffers. The code now prefers to allocate one buffer (less overhead) and falls back to separate buffers only when necessary. commit 62a5399d70ac3f8579441d617f8d80c94942a32a Author: Keith Packard Date: Sat Mar 17 21:32:36 2007 -0700 Elide I830DRIClipNotify for older DRI versions. I830DRIClipNotify is passed to newer versions of DRI; don't include it in the server when building against older versions. commit 05e0021147a89254182c277007236448f315231c Author: Keith Packard Date: Sat Mar 17 21:31:04 2007 -0700 Cast ARGB cursor address to CARD32 * to eliminate warning. While we're just doing a memcpy, it's nice for the two argument types to match. commit d05bb5362e986c9d27bc03c7e1a939ba28824810 Author: Keith Packard Date: Sat Mar 17 20:21:59 2007 -0700 Increase DDC I2C RiseFallTime to handle older monitors Changing this value slows the entire I2C bus down, making it far more reliable on older monitors. Note the same change has been made in the core X server code; this change is included here to ensure that older X servers work reliably with this driver. commit 44d1b544cec2e75735d2e27d66a9240317b962c2 Author: Keith Packard Date: Sat Mar 17 17:15:43 2007 -0700 Build fix for pre-XF86DRI_MM environments. Misplaced brace broke builds with older DRM libraries. commit a58befe9d243bd562cb4b2f08ec5c9f754148c20 Author: Keith Packard Date: Sat Mar 17 17:12:37 2007 -0700 Remove extra (and incorrect) I2C ByteTimeout setting. Setting the value correctly and then immediately breaking it caused many I2C transactions to timeout with slow monitors. Oops. commit 9d6d9ace4bd3180a4484321c3b96a83bc4adaf84 Author: Eric Anholt Date: Fri Mar 16 19:41:54 2007 -0700 Move vendor ID check in the utils to after pci_device_probe. Even current libpciaccess seems to require this. commit a117bc9e3eb824f2056ee6416859ea3ab1fdcc30 Author: Eric Anholt Date: Fri Mar 16 19:39:34 2007 -0700 Add the (afaict) correct ch7017 I2C slave address. commit 29446cdb4f72e12c5249b0d4b79ea56d9fe19934 Author: Eric Anholt Date: Fri Mar 16 19:18:37 2007 -0700 Fix compile failure due to needed types being in inttypes.h on Linux. commit 213394fbaaf353404cbb3aaa4c20860f48ee1079 Author: Eric Anholt Date: Thu Mar 15 19:13:28 2007 -0700 Fix crashes and other failures when a cursor allocation fails. Now, we allocate one single block of memory for cursors, and either succeed or fail once, rather than trying to support partial fallback modes that generally resulted in pain due to being untested. In particular, this fixes cursors on FreeBSD, which only allowed one large physically-contiguous allocation. commit 316ee682d342556b65cbd60409201591e916aac5 Author: Eric Anholt Date: Thu Mar 15 18:53:55 2007 -0700 Don't reload the cursors if we haven't set up the screen yet. This avoids a crash during preinit if we set a mode for load detecting. commit 8b06ab50bbd79dfaf4c90a6f76116ace64b85b77 Author: Eric Anholt Date: Thu Mar 15 10:12:14 2007 -0700 Fix sparse warnings about using 0 for NULL. commit 8ae6ad93329e2842c6f2d5b20ffeb0c14d10c0de Author: Keith Packard Date: Thu Mar 15 00:00:51 2007 -0700 Use new driver-independent CRTC-based cursor layer. This eliminates all of the cursor rotation code and other cursor management infrastructure, leaving a fairly simple hardware layer in its place. commit 9fbef2de9edbbed9c2f6a80c4074b9b245547c45 Author: Eric Anholt Date: Wed Mar 14 12:34:34 2007 -0700 Bump to 1.9.92 for RC2. commit 555b801a75cafa082808bc9bb683e700fc97d79a Author: Michel Dänzer Date: Wed Mar 14 11:41:50 2007 +0100 Make sure the legacy texture area is there when needed. This currently only matters when the DRM memory manager is not available and Option "Legacy3D" "off" is specified, but that hasn't always been the case and might change again in the future. commit 66fdb08c83d353fbe4e917900c54b555c869eb80 Author: Eric Anholt Date: Tue Mar 13 17:07:10 2007 -0700 Refine the i855 LVDS clock code. In particular, p2 is always 14. This gets correct clocks detected on most harware. The SSC is always assumed to be 66Mhz, which may not be true, but we'll fix that when we find example hardware. commit 44708bdd9ebfef0328302c9a964b80deb46e57c6 Author: Eric Anholt Date: Tue Mar 13 16:55:38 2007 -0700 Get SDVO DPMS working on the Mac Mini by writing SDVOB and SDVOC together. Also, add code for setting the encoder power state like the BIOS does, but this doesn't appear to work. We do much more than the BIOS does in powering things down, so perhaps that's interfering somehow. commit 5135b3a79f9c30ebce78c84c49846bba83607fed Author: Eric Anholt Date: Tue Mar 13 10:21:06 2007 -0700 Use a POSTING_READ(reg) macro instead of using the (void)INREG(reg) pattern. commit 578da7ca705c5a58c0bd397b0831e2f95140f8ae Author: Eric Anholt Date: Tue Mar 13 10:11:29 2007 -0700 Add PCI write posting protection to i2c putbits. commit cf33abe43bd95c9437fad8e6201a24084ff96cb8 Author: Eric Anholt Date: Tue Mar 13 10:08:57 2007 -0700 Add write posting protection for the SDVO DPMS-on path. commit 9d30f0007203157e6b82fa0ffc57324490eb2ca0 Author: Eric Anholt Date: Tue Mar 13 10:04:06 2007 -0700 Replace #if 0ed LVDS register setting with updated comment. commit 9c17c6e9c63563cad5edff837519a73fe0afe313 Author: Eric Anholt Date: Tue Mar 13 09:55:49 2007 -0700 Add write posting protections to relevant register writes in the mode-set path. commit 2824ec7ccbf44ba413a6133f735f4a548c73b3cd Author: Eric Anholt Date: Tue Mar 13 09:53:35 2007 -0700 Fix uninitialized string use in SDVO non-TMDS case. commit f465c23750adf908c0ea874f95aad98ebd2f1015 Merge: d33e8da 1ed3843 Author: Nian Wu Date: Tue Mar 13 17:00:44 2007 +0800 Merge git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 1ed3843f73a0d8efa405daff3483ebe70bf6134f Author: Eric Anholt Date: Mon Mar 12 17:47:32 2007 -0700 Make the 965 use Y-major tiling for the depth buffer, as required by the spec. An example of the failure can be seen with the reflect demo when set to depth buffer mode. Reported by: Haihao Xiang commit 7aa257154685bd2520649ce87a3a84e55644d02c Author: Michel Dänzer Date: Mon Mar 12 19:00:14 2007 +0100 Fix build against released libdrm. commit 7c561956a28e90667fef140bc3cfa0edca464f15 Author: Michel Dänzer Date: Mon Mar 12 18:55:27 2007 +0100 Defer flipping pages back to normal until the end of the DRI block handler. Doing it earlier can result in the wrong page being visible, giving the appearance of a frozen X server. commit fe59ab9f562fd10118563d80eb3351a4d3b48b3f Author: Michel Dänzer Date: Mon Mar 12 13:03:47 2007 +0100 Disable page flipping if the DRM is older than 1.9. Older versions don't support the functionality we need. commit ba55ff15df974197bebd871e28bb96d817ae41c7 Author: Michel Dänzer Date: Mon Mar 12 13:01:00 2007 +0100 Fix attempt to flip pages back to normal when the last 3D window disappears. When this succeeds, 2D rendering does not have to be synchronized to back buffers until the next 3D window appears. commit c4a23c5ef8ce56ee0fe547fbc7c6623c021f801b Author: Michel Dänzer Date: Sat Mar 10 16:15:33 2007 +0100 Remove unused have3DWindows from pI830. commit d33e8daa6874ced978d2a1f687c48922555f2524 Merge: 58aeb87 797aa6f Author: Nian Wu Date: Mon Mar 12 09:03:52 2007 +0800 Merge git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 797aa6fcb1231587bde1efb47bc8430c4c8d8110 Author: Dave Airlie Date: Sun Mar 11 12:58:50 2007 +1100 fixup missing assert includes commit 43a80ef9094efcb49027c83f0e726f907fecfbb2 Author: Dave Airlie Date: Sun Mar 11 12:58:26 2007 +1100 fixup brace alignment for older X.org commit 0d33fd3d03cef3a7e63d88ae441354390b37a937 Author: Dave Airlie Date: Sun Mar 11 12:58:02 2007 +1100 add XMODES flags to the i2c drivers commit 3c2d6e07bdf8daef6486b594aef0d22460eb2585 Author: Michel Dänzer Date: Fri Mar 9 23:49:46 2007 +0100 Don't crash when the SAREA pointer is NULL. commit 7518b8959ee7598f3526365a83ea7e143a5d6a4e Author: Michel Dänzer Date: Fri Mar 9 19:50:03 2007 +0100 Revert change accidentally included in previous commit. commit 1991a90ae90b388c914985d20d6f8c3637856e9a Author: Michel Dänzer Date: Fri Mar 9 19:47:13 2007 +0100 Update SAREA pipe sizes in i830_crtc_dpms instead of i830PipeSetBase. This allows setting the size to 0 when a pipe gets disabled. commit aef161853033907c6916337cebe88c8f111dd542 Merge: 1b54ee4 14ee919 Author: Michel Dänzer Date: Fri Mar 9 15:14:48 2007 +0100 Merge remote branch 'origin/master' into i830-pageflip commit 1b54ee493fb96f944aa81e56fa6f00a8067f87fc Merge: e972265 81722a2 Author: Michel Dänzer Date: Fri Mar 9 15:13:50 2007 +0100 Merge remote branch 'origin/master' into i830-pageflip Conflicts: src/i830_dri.c commit 14ee9195d203192d3f613919f230b20b900ffdba Author: Eric Anholt Date: Wed Mar 7 13:00:03 2007 -0800 Bug #10157: Fix cursor corruption on server regen. commit 58aeb87f2e335d15eba73ce9dd1982e867c52403 Merge: a4e7e81 81722a2 Author: Nian Wu Date: Wed Mar 7 16:02:03 2007 -0500 Merge git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit a5f0522b1d34236278861fe15bac2df099f0a2c7 Author: Alan Hourihane Date: Wed Mar 7 15:49:47 2007 +0000 Add some additional checks when XAA is enabled. commit 81722a21d232fa6cfb11fbe3d984abab50e89bcc Author: Keith Packard Date: Tue Mar 6 23:16:53 2007 -0800 Remove usage of 'shadow' module. Use xf86CrtcScreenInit. With the new mode setting code, rotation is handled outside of the driver, so the old usage of the 'shadow' module is no longer needed. Code to initialize the crtc structures has been moved out of the driver and into the modes code. commit 04f50961e2f1610c39e7e4b45811f2a6b517cad6 Author: Eric Anholt Date: Tue Mar 6 14:23:06 2007 -0800 Bug #9898: Fix a crash with NoAccel set. commit b07dfbba5df7728232b38211c623185116dcea5c Author: Eric Anholt Date: Tue Mar 6 13:59:14 2007 -0800 Remove leftover code that was disabling tiling after we set it up. commit 94c37f35872487c04136fb659526bffefd9c46ad Author: Eric Anholt Date: Tue Mar 6 13:57:04 2007 -0800 Make the depth buffer X tiled instead of Y, and fix a Y tiling nit on 945. The previous code claimed to set the depth buffer up as Y tiled, but due to lack of implementation in SetFence, it ended up being X tiled. Actually setting the Y tiling flag in the new version broke the depth buffer, so just switch the depth buffer to X tiling, which appears to work fine. commit a4e7e814a24dbe30a33e6ad45baeb41d190a2724 Merge: 862088b 4042b27 Author: Nian Wu Date: Tue Mar 6 16:01:40 2007 -0500 Merge git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 30bb719ca0abc2599ffb89e59f297fa9a0a00c3c Author: Eric Anholt Date: Tue Mar 6 12:23:43 2007 -0800 Continue to allocate the legacy texture pool by default. This is a partial revert of 7358642e64ab6d13bc1dc1a44703ee66d715ff61 If we don't allocate it now, when the DRM version is too low there won't be any memory allocated and DRI will fail. Instead, waste the memory in the i915tex case for now, and leave fixing it right (check DRM version up front and decide which memory manager to set up) to later. commit e972265261c421268e4fb806e587378d0adec577 Author: Michel Dänzer Date: Tue Mar 6 16:54:16 2007 +0100 Fix build failure. Not sure how I missed this before... Thanks to Todd Merrill for reporting. commit 862088ba6a91d3e7cf8d37126b1d9f4ee03a1f73 Merge: 11e9158 d717d9d Author: Nian Wu Date: Tue Mar 6 07:43:16 2007 -0500 Merge git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 1e1b45fa6ed1683cba4ae73ac98933e74c3ab9d6 Author: Michel Dänzer Date: Tue Mar 6 10:28:41 2007 +0100 Fix reduced DRI memory manager size. pI830->mmSize is in kB. commit 3c08bc7d6974a1a6cf5f9cb81898617032966c52 Author: Michel Dänzer Date: Tue Mar 6 10:14:47 2007 +0100 Fix some conditionals related to triple buffering. Guard code that dereferences pI830->third_buffer with tests for that instead of pI830->TripleBuffer. It could happen that we want to enable triple buffering but (temporarily) can't because the third buffer couldn't be allocated. commit c25cfafbe1eb380b58b5fc16e94f5cc6f422f0cd Author: Michel Dänzer Date: Tue Mar 6 10:00:12 2007 +0100 Unify allocation of back buffers. commit e787d7b698d320a7c45df35d58c5113413561fe2 Author: Michel Dänzer Date: Tue Mar 6 09:35:42 2007 +0100 Remove warnings about potential artifacts with page flipping and mixed 2D/3D. The artifacts only seemed to occur when EXA was falling back to software for the front buffer. commit 6c299aea8e87e72c68c96c03594706c976601ede Merge: 3308152 4042b27 Author: Michel Dänzer Date: Tue Mar 6 09:28:52 2007 +0100 Merge remote branch 'origin/master' into i830-pageflip Conflicts: src/i830_display.c src/i830_driver.c commit 4042b27f01fdb94e7fc0d4e991e054fff88479ea Author: Keith Packard Date: Mon Mar 5 22:32:52 2007 -0800 Move EnterVT mode setting code to xf86SetDesiredModes. Make the application of crtc desiredModes generic code instead of per-driver by creating xf86SetDesiredModes from the code that was in EnterVT and calling it. Also, move the frame buffer clear until just before mode setting to make sure things are mapped correctly. commit 55ee46aebbf1ec1a8ce914fbd0c8894fc857db8f Merge: 5c72014 50aa094 Author: Wang Zhenyu Date: Tue Mar 6 12:45:08 2007 +0800 Merge branch 'master' of git://proxy.ims.intel.com:9419/git/xorg/driver/xf86-video-intel commit 5c720147e2b86ca4046b7c3812c1ca6b0fb78c9d Author: Wang Zhenyu Date: Tue Mar 6 12:44:04 2007 +0800 EXA: try to always alloc exa i965 state buffer in stolen mem I think this is a safe way to work around any possible chip error. commit 11e91586169b4f4bf2b41c0e0e620a69670c2f07 Merge: a24962a 0150270 Author: Nian Wu Date: Mon Mar 5 16:00:20 2007 -0500 Merge git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit a24962af9ed39fabca0152cae1265a29fe6237d3 Merge: 35e9310 8bb6778 Author: Nian Wu Date: Mon Mar 5 16:00:11 2007 -0500 Merge branch 'crestline' of git://otc-graphics.jf.intel.com/git/xorg/driver/xf86-video-intel into crestline commit 50aa09425f54c4eeca7f8b0fae9579209b10b9c4 Merge: d717d9d c2c6255 Author: Keith Packard Date: Mon Mar 5 11:28:46 2007 -0800 Merge branch 'modesetting' commit c2c62559e702e7de1fa2ef309fa647ab13564dc3 Author: Keith Packard Date: Sat Mar 3 23:12:54 2007 -0800 Move single mode setting code to X server. Code to drive the global configuration from a single mode setting operation (from RandR 1.1, XFree86-VidModeExtension or XFree86-DGA) has been included in the X server now, so remove it from this driver. commit 35e9310ef59873877422dcaf9a65b38789fc8ad6 Merge: c8e6f0b b27fa2c Author: Nian Wu Date: Mon Mar 5 09:01:55 2007 -0500 Merge branch 'modesetting' of git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 8bb677889d3f71cde671f17a3589939acad2c3b3 Author: Eric Anholt Date: Mon Mar 5 05:08:51 2007 -0800 Fix 965GM SDVO by not setting fields in SDVO[BC] which have new meanings. commit 330815251dee808754b328cd2fd60db39f2460eb Merge: 50ba1ff 0150270 Author: Michel Dänzer Date: Mon Mar 5 13:05:20 2007 +0100 Merge remote branch 'origin/master' into i830-pageflip Conflicts: src/i830.h src/i830_dri.c src/i830_dri.h src/i830_driver.c src/i830_memory.c src/i830_xaa.c commit d717d9d566fe3c0866b06840114e1c1990bd7be0 Author: Michel Dänzer Date: Mon Mar 5 12:57:21 2007 +0100 Fix DRM memory manager initialization. It takes the offset and size in pages, not bytes. commit a0c83af3430b6705ab2ecae59085d1c74e890c19 Merge: c0f99b4 bc20b54 Author: Eric Anholt Date: Mon Mar 5 03:37:53 2007 -0800 Merge branch 'modesetting' into crestline commit 7358642e64ab6d13bc1dc1a44703ee66d715ff61 Author: Michel Dänzer Date: Mon Mar 5 11:53:09 2007 +0100 Fix handling of new vs. old texture pools. Only one of them can be active. commit 50ba1fff886a7f51b178ac6d3a1ba79a3014b214 Author: Michel Dänzer Date: Mon Mar 5 10:22:07 2007 +0100 Be more verbose when page flipping can't be enabled for various reasons. commit 015027034e970f1e3bb6ab239f7e0119235e404f Merge: 9a51064 bc20b54 Author: Eric Anholt Date: Sun Mar 4 21:49:00 2007 -0800 Merge branch 'modesetting' Conflicts: configure.ac src/i830_driver.c src/i830_modes.c src/i830_video.c commit af565872a49a1a464ee4154c27136660b184c4c1 Author: Keith Packard Date: Sun Mar 4 21:20:33 2007 -0800 Set version number to 2.0 RC1 (1.9.91). commit bc20b54c34088356a277beaebcc90bb4a7063e19 Author: Keith Packard Date: Sun Mar 4 19:35:44 2007 -0800 Support new CRTC/Output prepare/commit hooks. New hooks replace explicit invocation of DPMS functions to manage mode setting sequencing. commit b27fa2c257ccc49c6f29a20a3e672ebaaf58e7aa Author: Eric Anholt Date: Sun Mar 4 17:15:45 2007 -0800 Fix a crash with XAA and DRI disabled after the allocation rework. commit fc7d43c2b6b98be597152fbd88024273edd931d0 Author: Eric Anholt Date: Sun Mar 4 17:14:30 2007 -0800 Use -f for ln of server source. Otherwise, changing paths didn't take effect. commit b7b6063e62927dd135e118c433f48b4d0b5fe246 Author: Eric Anholt Date: Sun Mar 4 15:53:50 2007 -0800 Add a little BIOS dumper program. This isn't actually tested yet as libpciaccess doesn't do rom access on non-linux yet. commit 6aeb855b9d4e03d458773240a9c0c9c1edd3e403 Author: Keith Packard Date: Sun Mar 4 17:11:40 2007 -0800 Shadow pixmaps use fixed offset of 0. Shadow pixmap contents are copied from the main frame buffer and contain only the bits displayed by the crtc, not the whole frame buffer. The crtc origin is always interpreted by the shadow copying code, the frame buffer itself doesn't move. commit c8e6f0bac13e0e407f9771b1bbf126f023c1511b Merge: 0ed5a2f c0f99b4 Author: Nian Wu Date: Sun Mar 4 09:00:12 2007 -0500 Merge branch 'crestline' of git://otc-graphics.jf.intel.com/git/xorg/driver/xf86-video-intel into crestline commit 7d08f720a95499e8d00dcd7174f06731de420017 Merge: dd24d2a 435d355 Author: Keith Packard Date: Sat Mar 3 23:13:03 2007 -0800 Merge branch 'modesetting-origin' into modesetting commit 435d35558d8135a2c1724dfd813fb4a9a4e14178 Author: Keith Packard Date: Sat Mar 3 22:46:31 2007 -0800 Update for Aaron's xserver changes. Add xf86CrtcConfigFuncs to xf86CrtcConfigInit Add canGrow option to xf86InitialConfiguration commit c0f99b4962553e560a5cb882a5060d95db5477a4 Author: Keith Packard Date: Sat Mar 3 22:36:46 2007 -0800 LVDS dither control moved from PFIT to LVDS register for Crestline The LVDS register now contains lots of new controls for dual-channel LVDS control along with dither enabling. The PFIT register has a lot fewer controls as a result. commit 0fa3d4f51b5ee0dba3882fd74b6ac4e7da708f8f Merge: 10655c4 fd52d63 Author: Keith Packard Date: Sat Mar 3 21:02:17 2007 -0800 Merge branch 'modesetting' into crestline commit 0ed5a2fdcfe9674175aa9af155c20695ef41cadc Merge: 7ba80cc fd52d63 Author: Nian Wu Date: Sat Mar 3 09:00:20 2007 -0500 Merge branch 'modesetting' of git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit fd52d635603b7093c5a2b7fa9c987cf59f9be27c Author: Eric Anholt Date: Fri Mar 2 13:44:57 2007 -0800 Add a WIP UploadToScreen implementation. This almost displays right. commit ca0fa875e8bb5cb778d4db7d8053ec0a5ae34ef4 Author: Eric Anholt Date: Fri Mar 2 11:46:45 2007 -0800 Move EXA offscreen memory back after framebuffer to avoid fallbacks. Without this, the EXA code decides that the framebuffer is not in video memory because it's not located between the start of video memory and the end of EXA allocator memory. We should either have EXA let the driver decide if a pointer is in video memory, or add a new field for "end of video memory" (not just end of EXA offscreen allocation), but this fixes things for now. commit 5a73624b9bcce0004e5b72c74667c9dd504b9c3e Author: Eric Anholt Date: Fri Mar 2 11:03:16 2007 -0800 Fix a crash when an ARGB cursor allocation had failed. commit 7ba80cc3a5e0f469e3ee55c7537fdc952cd85911 Merge: 9796cb7 d5df52b Author: Nian Wu Date: Fri Mar 2 09:01:46 2007 -0500 Merge branch 'modesetting' of git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit d5df52be59a7dd950e73336ce5698e73480108b0 Author: Eric Anholt Date: Thu Mar 1 08:35:13 2007 -0800 Actually add the files for reg_dumper. commit 9796cb7ac4bd74d5336986bb194ff5875b028121 Merge: 42deb1e 1f5d166 Author: Nian Wu Date: Thu Mar 1 09:02:22 2007 -0500 Merge branch 'modesetting' of git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 1f5d1666c8386ca4597c6f2c1ec239f9d821da4c Author: Eric Anholt Date: Wed Feb 28 16:27:55 2007 -0800 Add a non-installed command line tool using libpciaccess to dump registers. This reuses the i830_debug.c code, so we can run that from the console or from the BIOS-based X server to debug some remaining issues. commit cd1d4b398ec91d551bdaaa26c769e5e6a9442df1 Author: Eric Anholt Date: Wed Feb 28 09:47:38 2007 -0800 Many fixes to mode_get, mode_set, clock limits, and register dumps on i855. This should fix a number of issues with i855s, particularly with integrated LVDS panels. commit 36cad3fcb65e3dcd88e58e301cd60adb121cb96b Author: Michel Dänzer Date: Wed Feb 28 17:52:42 2007 +0100 Update vblank pipe setup when setting a mode. commit b5316fb2623e9630cbd58020e0a7c95bf354c587 Author: Michel Dänzer Date: Wed Feb 28 17:50:56 2007 +0100 I830DRIClipNotify: Fix initialization of crtcBox[1].[xy]2. commit 42deb1e10fc445d152b74e2b225daeaee2abb3d1 Merge: 76aac38 3e8e75e Author: Nian Wu Date: Wed Feb 28 09:00:24 2007 -0500 Merge branch 'modesetting' of git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 76aac382659bc1dab7dca078f703b9cf48b4ad74 Merge: 42fc06c 1ac83f5 Author: Nian Wu Date: Tue Feb 27 14:42:42 2007 -0500 Merge branch 'modesetting' of git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 3e8e75e5d83a2fa7e9fc6e9a3fbb07dac548ea5a Author: Wang Zhenyu Date: Tue Feb 27 16:48:48 2007 +0800 Revert "EXA: enlarge 965 exa state buffer size" This reverts commit 1ac83f51ee46d65237eae1b5c767e106ac9e29bc. oops, current exa state + kernel program size + scratch space is actually ~36KB. commit 1ac83f51ee46d65237eae1b5c767e106ac9e29bc Author: Wang Zhenyu Date: Tue Feb 27 13:58:47 2007 +0800 EXA: enlarge 965 exa state buffer size Origin size seems break all render, be sure to assign enough mem. 80k works fine for me. commit acd9f3e28fcf5e91e09d8bdca4cc58681b1fc92a Author: Wang Zhenyu Date: Tue Feb 27 13:56:31 2007 +0800 Fix typo when assign overlay reg mem pointer commit 5b765065c0bdf671b60d8a2fe512f6307f753eab Author: Eric Anholt Date: Mon Feb 26 17:25:57 2007 -0800 Consolidate shared structure allocation to the start of ScreenInit. Previously, the structures would get allocated unnecessarily once, and wouldn't get reallocated in time at server regen. commit 6ed28c5aa34ff1d8b99a8d4721ddac7b9cac41ed Author: Eric Anholt Date: Mon Feb 26 17:12:44 2007 -0800 Fix XV issues on 965 after the allocation rework commit 36bfeb890aeb17a8ee058790dd69b4e9aba644a1 Author: Eric Anholt Date: Mon Feb 26 16:58:33 2007 -0800 Move the initial EnterVT to after we've set up acceleration. This fixes a crash with initial rotation and EXA due to EXA not being initialized in time for the shadow pixmap setup. commit 732885c08daaf17034da8f4855d0b957ec3df9d7 Author: Eric Anholt Date: Mon Feb 26 15:04:56 2007 -0800 Bug #9604: Align the sizes of allocations to page increments as well. Without this, the 965 DRI driver fell over when pitch * height wasn't page-size aligned. Since the allocator only allocates at page-aligned offsets anyway this shouldn't hurt us at all. commit 0bfaeaab2838184827236c5c0fcc17f06d9e1372 Author: Eric Anholt Date: Mon Feb 26 11:11:56 2007 -0800 Fix physical memory allocations, including description in log. commit 5732dd7221b7bb24bf21e16066f014a0c7cb6b2a Author: Eric Anholt Date: Mon Feb 26 09:54:04 2007 -0800 Fix some texture memory allocation issues. commit aeeae1b40fc012bcc01fcd2243d4993de819b7cf Author: Eric Anholt Date: Mon Feb 26 09:13:17 2007 -0800 Fix a crash in startup monitor detect. commit 10655c4674cdac8a231c50dd9afc5d43fe43b4bd Author: Zou Nan hai Date: Mon Feb 26 09:23:14 2007 +0800 for merge with external tree commit 9417af8630fce0476273b693ebac12129415e0cf Author: Zou Nan hai Date: Mon Feb 26 08:02:50 2007 +0800 fix conflict with external branch commit 42fc06c85a0c487cfa26b9d4aa396402dbc4c2fe Merge: 10655c4 3bce8bf Author: Nian Wu Date: Sun Feb 25 12:53:47 2007 -0800 Merge branch 'modesetting' of git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 84a7429730ddd29072d696accb9fdd8fea40731a Author: Eric Anholt Date: Fri Feb 23 14:59:24 2007 -0800 Always allocate logical_context, since we use it in emitting invariants. commit 7bb725dee9ef0ccdc478ed4931dc267bcb80203f Author: Eric Anholt Date: Fri Feb 23 14:56:58 2007 -0800 Improve logging of memory allocation passes, and clean the code up a bit. commit 54198b26e87baa180208932b97f10b27d9c0fddc Author: Eric Anholt Date: Fri Feb 23 14:17:07 2007 -0800 Move memory allocation to ScreenInit rather than PreInit. This lets us do memory allocation just once rather than having several passes (as long as things succeed), avoids trouble with zaphod mode, and will let us do better automatic sizing of allocations soon. commit 828deff6453872ef0f9fa35c08c9f95f464b1785 Author: Eric Anholt Date: Fri Feb 23 13:16:02 2007 -0800 Fix fence allocations on 965. commit d3ac440e127c8a7716062852cd3b5e7943e289e4 Author: Eric Anholt Date: Thu Feb 22 10:41:09 2007 -0800 Rework the video memory allocation. The previous allocator worked in multiple passes, with (at least) one of setting up allocations, another to attempt to adjust those for tiling, and then a pass to set up the offsets and fix them in memory. The new allocator is simpler, allocating memory immediately if possible, setting up tiling up front, and choosing offsets immediately. AGP memory is only allocated to back actual memory used, saving some memory that would have been allocated for padding previous. It will also allow dynamic freeing and reallocation of memory, which will be useful for framebuffer resizing. commit a61a6b1db610a07060d0dcca54b66a4b2b3686cc Author: Eric Anholt Date: Wed Feb 21 09:43:24 2007 -0800 Reformat to 4-space indents, no trailing whitespace, and 80 columns. I'm in the process of rewriting this file, and wanted to separate my whitespace changes. commit dd24d2a082b41abc466391c37a9b3d066586dc55 Author: Keith Packard Date: Thu Feb 22 11:46:44 2007 -0800 Remove copied X server headers from driver. These two headers were copied during mode setting development; as that code is now inside the server, these files are no longer needed here. commit 681966ce6548c6f47b087eb7e369674b7ddbaade Author: Keith Packard Date: Thu Feb 22 11:45:43 2007 -0800 Disable unused functions after configuring the remaining resources. This eliminates an unsightly flash of the hardware cursor during X server startup. commit f5ab9e0ad3a65c972861dd53be6e33e1aac13191 Author: Michel Dänzer Date: Thu Feb 22 18:57:23 2007 +0100 I830DRISwapContext: Some cleanups. Also call I830EmitFlush() when entering/leaving the server context. Doesn't seem to help for artifacts with page flipping and mixed 2D/3D unfortunately. commit 8cce74f195e5ef6ce5599ecd52f35bcfcb0d7913 Author: Michel Dänzer Date: Thu Feb 22 18:27:59 2007 +0100 Do not sync DRI windows between pages when possible. commit f346549183a407a4bff6521ec2450dacb97442e9 Author: Michel Dänzer Date: Wed Feb 21 09:19:54 2007 +0100 intel.man: Fix typo. commit 3bce8bf0e95e5842399959a5d6f6413e96f03adb Author: Keith Packard Date: Tue Feb 20 23:10:17 2007 -0800 Pre-965 hardware had fixed pipe 1 for panel fitter. The pipe mode setting code needs to disable the panel fitter when using the pipe for things other than LVDS output. The driver was checking for panel fitter conflicts using bits that the 965 chipset defines for selecting which pipe the panel fitter is connected to. However, on pre-965 hardware, the panel fitter works only with pipe 1 and those bits returned 0. The result was that when pipe 1 was using the panel fitter, configuring pipe 0 would disable the panel fitter. The fix provided uses a model-specific test for the panel fitter pipe. commit 0bee64f4bc7581de7ab28ca438581d215e85c610 Author: Michel Dänzer Date: Tue Feb 20 19:09:37 2007 +0100 Add support for triple buffering using a third static buffer. Need to bump the DRI DDX version minor for the added SAREA fields. commit 2212baa8454abb4c7948c3f2e20e337f831d1b86 Author: Michel Dänzer Date: Tue Feb 20 18:39:13 2007 +0100 Don't mark page flipping as active when it really isn't. commit fac8f2eb49de22abd853ca75f3c985d4d94e3633 Author: Michel Dänzer Date: Tue Feb 20 18:38:40 2007 +0100 Document Option "PageFlip". commit 5a1a04649c62aa4b1c0617560b813642ce0c67b5 Author: Keith Packard Date: Sat Feb 17 17:01:04 2007 -0800 Make distcheck fixes. Distribute all sources needed even for older servers. Always allow (but do not require) link to server sources so that needed files can be included in the generated tar files. Add remaining .g4a files and assembly output to distributed file lists. commit 0ca926e63c7fa9122a8cba1424ce4cdee1c7b215 Author: Keith Packard Date: Fri Feb 16 02:19:10 2007 -0800 Check for presence of xf86Modes.h file. xf86Modes.h file signals the availability of the new modes API in the server; use that instead of counting on X server version numbers. Also, finish eliminating use of local copies of those header files. commit 972f1109d23c0a3f821fa573e2aa40cd17ce2795 Author: Keith Packard Date: Fri Feb 16 01:07:20 2007 -0800 Remove common code that has moved to xserver/hw/xfree86/modes commit 20e146a09e3b4907a6800588ebfa787bfc5b0d89 Author: Keith Packard Date: Fri Feb 16 00:57:44 2007 -0800 Change rotation pixmap creation API to permit start-time rotation. Start time rotation requires that the pixmap be created after the server has initialized the screens. Delay the pixmap creation until the first block handler invocation. commit 17e38e39a49b2a96e31cca4a0b922631c5f7879e Author: Keith Packard Date: Thu Feb 15 23:09:43 2007 -0800 Enable mode setting function renames from shared code. commit 8e7bc4b1f95f5d62ff18cd94f14f5e3949ef6a29 Author: Keith Packard Date: Thu Feb 15 11:17:53 2007 -0800 Use server sources for crtc/output generic code. As sources for these have been merged to the server, use them from the server source code instead of keeping copies in this driver. commit 6e33c4c44030e05d6d07ca9274cfe4d6df2c0387 Author: Eric Anholt Date: Thu Feb 15 09:54:43 2007 -0800 Print the correct meaning of bit 30 of pipeconf for 965 in debug output. commit 4541150cdce3f2f83b8530d0863aecf28c6610a9 Author: Eric Anholt Date: Thu Feb 15 09:51:04 2007 -0800 Detect core clock frequencies, to avoid double-wide mode when possible. Additionally, don't attempt to set double-wide on the 965, where there is no such thing any more (not that we'd ever see modes high enough to trigger it). commit d1be0dc4e9d443dcbd218a083cfb21a0b5d634ee Author: Wang Zhenyu Date: Thu Feb 15 11:03:12 2007 +0800 EXA: fix i965 default color (0,0,0,1.0) -> (0,0,0,0) (0,0,0,1.0) is actually black... commit c010d28f0a91a9831d366ea490878ef3d958021f Author: Wang Zhenyu Date: Thu Feb 15 11:00:06 2007 +0800 EXA: mask componentAlpha support we're getting load of multiple sf/wm programs for i965, might need to be cleanup in future. commit ec55dd16c4c5f7612d33ae22a6249b3b1c60e2b6 Author: Keith Packard Date: Wed Feb 14 14:37:02 2007 -0800 Global namespace cleanups, filename fixes. Ensure all xf86 symbols created here are protected with XF86NAME. Remove accidentally exported symbols from namespace. Make all to-be-DI files prefixed with i830_xf86. commit 22a271555a46267c40448fa926d45692498ef7c6 Author: Keith Packard Date: Wed Feb 14 14:17:14 2007 -0800 Create driver-independent DGA hooks, remove i830 DGA code. As RandR needs to poke at DGA code, and we want the RandR code to be driver-independent, it seemed easier to just make the DGA code driver-independent as well. commit a7c64d5e28f608d54c94fa7a5c92bd5b471179c7 Author: root Date: Wed Feb 14 10:20:28 2007 -0800 WIP DGA generic support. commit 55c7b017ed718107b9b11467030addf225728b84 Author: Michel Dänzer Date: Wed Feb 14 16:45:22 2007 +0100 Use new DRI ClipNotify hook to track page flipping per CRTC when available. commit 3bd8edb95fcbbb49e97a1a2bdd5c8eae4f83d3a8 Author: Michel Dänzer Date: Fri Feb 2 17:41:18 2007 +0100 Revive i830 page flipping support. Use the damage layer directly instead of via shadowfb. commit 1d22bad33b634aaf61976907cb2ceeec8a9ebe4d Author: Michel Dänzer Date: Wed Feb 14 12:57:12 2007 +0100 Update SAREA pipe fields in i830PipeSetBase. commit 0df490938af10d3a748221e2fb5467b0f244f9eb Author: Michel Dänzer Date: Thu Dec 21 11:27:28 2006 +0100 If the DRM can handle it, enable vertical blank interrupts for both pipes. commit 1623b47c4863f5362587cdac855e3e11c109b007 Author: Eric Anholt Date: Tue Feb 13 17:37:56 2007 -0800 Switch the RECTLIST vertex order to (x2, y2), (x1, y2), (x1, y1). This is the documented correct ordering, and while the previous ordering (reversed) worked on some hardware, it failed on others. Reported by: Wang Zhenyu commit 4bd4058dfdca84d6ebab82a1dfba99adf3852c9c Author: Eric Anholt Date: Tue Feb 13 14:29:52 2007 -0800 Bug #9941: ViewSonic VX2025wm sync polarity quirk to fix mode distortion. commit 0ec4ffcb4e8e5e707e68bef1b13a324677f19f8f Author: Eric Anholt Date: Tue Feb 13 13:18:15 2007 -0800 Fix double free in the case of LVDS disabled through quirks. commit 699fa88d2570de6173e2d866e11b7437f4842d74 Merge: 681b919 6641aec Author: Eric Anholt Date: Tue Feb 13 13:10:08 2007 -0800 Merge branch 'modesetting-origin' into modesetting commit 6641aec0a1cbc869fba1956c556cdd204631545a Author: Eric Anholt Date: Tue Feb 13 10:21:12 2007 -0800 Attempt to detect panel fixed mode from EDID or current programmed mode. These two sources are placed in higher priority to the BIOS data when available, since the BIOS data has proven unreliable. The BIOS data is still read, and warnings printed if it doesn't match what we probe. The BIOS data remains useful for the situation where we want to turn on LVDS but there is no EDID available and no current mode programmed (i.e. booting with VGA or TV connected). commit 991439d4c78cf5b2a8f6bb8f5b36fffbfcc4e4fc Author: Eric Anholt Date: Tue Feb 13 10:07:47 2007 -0800 Remove dead #if 0-ed structure. commit c3aed56d46baba057d83dc6ea12c6b4e705e54ba Author: Eric Anholt Date: Fri Feb 9 13:16:37 2007 -0800 Fix comments on 965 pitch alignment restrictions. commit 98318dfcc99264fb7b7ef34568712812aa6300b6 Author: Daniel Stone Date: Fri Feb 9 16:20:57 2007 +0200 add missing files to fix distcheck A bunch of files were missing from _SOURCES, and the build was also broken for missing files (from EXTRA_DIST) when building without gen4asm. commit fce4390c4f1a76c65423114bb479814787612cd7 Author: Zou Nan hai Date: Fri Feb 9 11:32:22 2007 +0800 TV Enable commit 00dadaa115951c36de9caf2a9d78909811ef34bc Author: Zou Nan hai Date: Fri Feb 9 11:14:50 2007 +0800 set DPLL before detect commit 10712c7a781e50475ee7e8ccd5bfd2d820f863e2 Author: Wang Zhenyu Date: Thu Feb 8 08:56:42 2007 +0800 EXA: i965 pixmap pitch align This seems like a typo, which causes screen artifacts. commit 44eacf2323454e26b535cc5a4f0789cb0ff0e7fb Author: Wang Zhenyu Date: Wed Feb 7 17:30:51 2007 +0800 EXA: fix render issue with i965 Fix SF kernel with corrent coeffient work, and correct VUE storage in multi texture case. commit 920aeaf8478f706ab3b1de4f20f5d351e64a0197 Author: Zou Nan hai Date: Wed Feb 7 13:15:52 2007 +0800 Make TV code same with external tree. Fallback to old filter table. 4 spaces indent reformat. Auto scaling seem to not work well on some low res interlace mode when input width > 1024, filter those modes. Fix some subcarriar number commit 6d9757e466863594300c83f3806fd4376bea0504 Author: Zou Nanhai Date: Mon Feb 5 14:59:53 2007 +0800 Fix hang when TV is not connect. commit 681b91924c364a1c00732f548539f2767929ba0e Author: Eric Anholt Date: Fri Feb 2 17:40:34 2007 -0800 Add subpixel offsets to fix accelerated rotated rendering on i915. This fixes the rendercheck "transformed src/mask coords 2" tests. Previously, the source pixels chosen would be off by one in some cases. The particular values were taken from Mesa, which uses .125 offsets (except apparently broken for y), but the signs are changed. I would be happier if I had better justification for why this worked. commit 76a4f2eea826036e2ac16b7e8c61ab946038c120 Author: Eric Anholt Date: Fri Feb 2 17:34:41 2007 -0800 Fix bad offsets in "right" rotation of the CRTC in cursor and update handling. commit 785a59ead0e8d1d681b2cb6827ee58ad2c51f8c6 Author: Keith Packard Date: Thu Feb 1 22:48:44 2007 -0800 Rename driver from i810 to intel. Permit old name for compatibility. Driver installs as intel_drv.so with symlink to i810_drv.so to ensure existing configurations continue to work. Updated manual page to reflect name change and add attributions for recent work. commit 1dde7a15a3a42b881c57ece95feceffadf412cff Merge: 16f30b2 1ba45a3 Author: Keith Packard Date: Thu Feb 1 21:31:27 2007 -0800 Merge branch 'modesetting-origin' into modesetting commit 16f30b2e6c72e228c66946ff9efadd7278379745 Author: Keith Packard Date: Thu Feb 1 21:30:19 2007 -0800 Add "Ignore" option to per-output monitor, removes output from server. Setting option "Ignore" "Yes" will cause the server to pretend as if the specified output does not exist at all. It will not be listed by the RandR1.2 extension, and the server will not attempt to detect monitors at startup time. commit b3633506dcd4fd58f0f9519cd67f6e75d6fb2042 Author: Wang Zhenyu Date: Fri Feb 2 11:35:44 2007 +0800 Add Intel 965GM chipset support commit 380129a17c61c783d77a87685ad5333e8b1c253c Author: Wang Zhenyu Date: Fri Feb 2 11:33:46 2007 +0800 Revert original crestline pci id patch commit f7489bbec150349bf03bea8d9d55451dbc92bfc2 Merge: f1285ec ae6d358 Author: Wang Zhenyu Date: Fri Feb 2 11:26:57 2007 +0800 Merge branch 'modesetting' into crestline Conflicts: src/i830_display.c src/i830_tv.c src/i830_xf86Crtc.c commit ae6d3585a4d96aa4dc05ca8563cebfa7796324ef Merge: 6d549ed 1ba45a3 Author: Wang Zhenyu Date: Fri Feb 2 11:21:59 2007 +0800 Merge branch 'modesetting' of git://proxy.ims.intel.com:9419/git/xorg/driver/xf86-video-intel into modesetting commit 9f0acf1eb01ad8320f4da4cc5e498af25c0ecc5e Author: Keith Packard Date: Thu Feb 1 15:44:18 2007 -0800 Check for rotation change in xf86RandR12CrtcSet. xf86RandRCrtcSet was ignoring changes to only rotation, so the screen would be left incorrectly rotated. commit 1ba45a3fcd40aaf4d373447fb9f252ca053f9105 Author: Eric Anholt Date: Thu Feb 1 13:26:38 2007 -0800 Improve register debugging output. This includes not reporting some fields on hardware where those bits are reserved, correcting one of the hardware error bit numbers, and reducing the severity of the debugging output warnings. commit 9bfeadbd5b37acb56cb646009239a94727ec52bc Author: Eric Anholt Date: Thu Feb 1 12:04:58 2007 -0800 Remove some more dead options. commit d6bc03c379c46842676f640b8edb13ea828bf20c Author: Eric Anholt Date: Thu Feb 1 11:28:34 2007 -0800 Bug #9819: Add two headers that are apparently necessary on older X Servers. commit 351866b0328b1d7afdc6b414c77d9ab4da4bd085 Author: Eric Anholt Date: Wed Jan 31 15:48:52 2007 -0800 Sync before overwriting Render acceleration state on the 965. commit 96783a458957ca280ebb6275fa692dd415df6931 Author: Eric Anholt Date: Wed Jan 31 15:48:02 2007 -0800 Fix copy-and-paste-o in the render code cleanup that broke XAA. commit 5238ff9c80718f9f8baa06123aa1bb6e3193fce6 Author: Eric Anholt Date: Wed Jan 31 14:01:41 2007 -0800 Naming and formatting cleanup in Render acceleration code. commit c47210d94ed17ad9e8e489a1e1886732e6dc7220 Author: Eric Anholt Date: Wed Jan 31 12:50:31 2007 -0800 Move the render code to non-EXA-specific filenames. commit 72ea0e514dcbebd009833c21f40e9bfb84074628 Author: Eric Anholt Date: Wed Jan 31 12:43:38 2007 -0800 Remove custom accelerated rotation code now that it's all done through Render. commit e62751db8b1a631c22ba0f77c932be4ab39ba741 Author: Eric Anholt Date: Wed Jan 31 12:15:38 2007 -0800 Add an accelerated path for rotation Render operations in XAA. The now-generic (kind of) EXA code will be cleaned up and moved to generic files in a later commit. commit f1285ecb72e807ac10db398fa983bf69d4154d97 Author: Zou Nan hai Date: Wed Jan 31 14:58:08 2007 +0800 tune commit 0620a7650f758652d05a0c25d159587f641aaf3e Author: Zou Nan hai Date: Wed Jan 31 11:21:11 2007 +0800 fix commit 12441e217a1968dea3a6b0646b6c5d0e2ede0e7e Author: Zou Nan hai Date: Wed Jan 31 11:20:23 2007 +0800 add 720p@50Hz, however 720p in this freq seems to not support src width, hactive > 800, so skip those inputs. commit 726c7dd89627409820ee5cf9bf657d5a926b3648 Author: Zou Nan hai Date: Wed Jan 31 10:34:39 2007 +0800 TV fixes. commit 4cd552e8f4851e029e43bf778cd8340f6c2c4881 Author: Eric Anholt Date: Tue Jan 30 16:34:50 2007 -0800 Fix accelerated Render transformations. Previously, we tried to use 2 points instead of 3 to describe the source rectangles, which mostly just worked for scaling. commit 6a628ae12b0568d656059891c5bca4415d8a735f Author: Eric Anholt Date: Tue Jan 30 14:19:05 2007 -0800 Simplify EXA acceleration transform handling. commit c8581254cb811f76aa6eae49d74489b543b3eb05 Merge: 9da1791 d329fa1 Author: Keith Packard Date: Mon Jan 29 21:25:13 2007 -0800 Merge branch 'modesetting-rotation' into modesetting This adds reasonably driver-independent rotation support to the common layer. The piece required in the driver is to allocate and redirect the crtc to a shadow frame buffer. The driver uses Render to perform the actual rotation operation (which leaves us free to do fun projective transforms at some point in the future :-). commit 9da1791eeca446cd59e2e7d0803e8a7920dbbea5 Author: Eric Anholt Date: Mon Jan 29 17:10:14 2007 -0800 Restore a few important lines from 89ace3e81fe72075b1709b073c05532f13b7f0d1 Typical results were failure to sync, and a black screen. commit 67c6a490e63f6997f8198bc3ab180a1af097fe86 Author: Eric Anholt Date: Mon Jan 29 09:53:58 2007 -0800 Remove dead code to undo the damage of xf86SetModeCrtc() blank limiting. commit 89ace3e81fe72075b1709b073c05532f13b7f0d1 Author: Eric Anholt Date: Mon Jan 29 09:43:35 2007 -0800 Bug #9680: Remove bogus blank length limiting in xf86SetModeCrtc(). Our modes typically come from EDID or default modes, and when the monitor asks for a specific mode, deciding to tweak it usually results in incorrect display. And if the user is specifying a mode by hand, tweaking it then is still pretty rude. Reviewed by: ajax commit 6eb69e737864d06dc6d4fbb4cd85a027cbb7643a Author: Dave Airlie Date: Sun Jan 28 19:40:12 2007 +1100 ch7xxx: actually power up the chip around connection detection commit d329fa121b2401cadb991c2854e077cfa68e15e8 Author: Keith Packard Date: Sat Jan 27 18:36:15 2007 -0800 Fetch from root window instead of screen pixmap during rotation. The XAA Composite wrapper doesn't check for sourcing from the root pixmap when deciding whether to sync the hardware drawing. Fix the rotation code to reference the root window in IncludeInferiors mode to avoid reading without correct synchronization. commit 20419d664c77e9a1a2de82987838b45f44774b47 Author: Keith Packard Date: Sat Jan 27 18:34:12 2007 -0800 Paint ARGB cursor data to ARGB cursor memory space in frame buffer. When converting from global cursor to per-crtc cursor, the ARGB cursor data was accidentally painted to the wrong location, overwriting some critical data and causing the hardware to lock up. (along with generating a garbage cursor image from uninitialized data). commit 00decd3b6cea0de22c88b9504dbe26d680e8ab16 Author: Krzysztof Halasa Date: Sat Jan 27 12:29:31 2007 -0800 Don't zero out mode structure after setting name field. Instead of using memset to zero the structure (at the wrong time, no less), use xcalloc to gather pre-initialized memory. commit 7a5f17087bda2833e84fa7e7ff0cb168943b89b6 Author: Keith Packard Date: Sat Jan 27 00:11:21 2007 -0800 Mark crtc region as damaged when rotation is set. When shadow frame buffer is allocated for rotation, it needs to be initialized by copying from the frame buffer. Do this by simply marking the entire screen as damaged which will force an update. commit 2d95cb6f041653f7e530b1f32cf007929c23ef3b Author: Keith Packard Date: Sat Jan 27 00:04:13 2007 -0800 Make rotated pixmap size of mode, not rotated mode. Update only damage. Rotated pixmap should match size of displayed mode, not the rotated version of that size. Take damaged region, rotate each box and display them instead of displaying the whole screen after each damage update. This exposes a bug where the screen is not correctly damaged after rotation. commit 5c1e27cdd243dc24dd2bfdeb46d757bbef6ba6af Author: Eric Anholt Date: Thu Jan 25 15:31:22 2007 -0800 Make rotated shadow buffer allocation dynamic. For EXA, this requires version 2.1 of EXA to do rotation, as the VT switching issues were too complicated otherwise. commit 5a67f3d3690903a181ca854d060cfa8b4c2aca26 Merge: 3cc583e 9811059 Author: Nian Wu Date: Thu Jan 25 13:40:50 2007 -0800 Merge branch 'crestline' of /git/xorg/driver/xf86-video-intel into crestline commit 3cc583ec8e79ec65103308220dd6047a4a7acddf Merge: 566e1d3 effe579 Author: Nian Wu Date: Thu Jan 25 13:37:05 2007 -0800 Merge branch 'modesetting' of git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into crestline commit 6d549ed280d3fcf3fe611b095d9f8adc0196bfb6 Merge: 75f4df2 effe579 Author: Nian Wu Date: Thu Jan 25 13:36:33 2007 -0800 Merge branch 'modesetting' of git://proxy01.pd.intel.com:9419/git/xorg/driver/xf86-video-intel into modesetting Conflicts: src/i830_driver.c commit 83cc4601b27d871484a2408f31154e9387064b9e Author: Eric Anholt Date: Wed Jan 24 16:52:22 2007 +0800 Fix a possible failure to misalign video allocation in XAA. commit e21332419581eff1d7651741bae0b640c84d0ecd Author: Eric Anholt Date: Wed Jan 24 12:32:38 2007 +0800 Warning fix. commit effe579e691b044e3ce59b41b5c0eaaac4368dda Author: Dave Airlie Date: Sun Jan 21 20:23:13 2007 +1100 ch7xxx: fix output detection as per datasheet, have no DVI to test this. commit c68dae2705d6e5b05dba7d40b6da112b98b926b4 Author: Dave Airlie Date: Sun Jan 21 20:22:39 2007 +1100 fix building with 7.1 server by hiding stuff inside RANDR_12_INTERFACE commit 8eb861fb61fda78e6c142ffa66c586357aaa2e44 Author: Eric Anholt Date: Mon Jan 22 15:50:14 2007 +0800 Replace the custom SaveScreen function with a generic function calling DPMS. With this, additional power saving occurs with the core screensaver, for example by turning off LVDS backlight. commit 7161e824e89a6a69f1277e510f2344ad31721f62 Author: Wang Zhenyu Date: Fri Jan 19 15:15:19 2007 +0800 Fix DRI issue when EXA enabled tell DRI we are smashing the context state. commit 74ebff6732b9bfcf8c865b52cbebfd9bf6b73eb2 Author: Eric Anholt Date: Thu Jan 18 14:26:21 2007 -0800 Allocate separate cursor memory per CRTC and rotate cursors appropriately. Also, add bind/unbind of the shadow rotate buffers, which was missed in a previous commit. commit 8759f4d89a141f7d69f1894ec3059ba6bd1cf86b Author: Eric Anholt Date: Thu Jan 18 13:13:25 2007 -0800 Partially deal with cursor rotation. The remaining issue is having a cursor image per CRTC so that the cursors can be rotated on the independently rotated CRTCs. commit b296cd9b8f63ab80e8fe46fcfcdba2e9af846468 Author: Eric Anholt Date: Thu Jan 18 13:02:26 2007 -0800 Fix transformation matrices for rotation at 90 and 270 degrees. commit d2ae2e2ccc3a8e7dc84745c235836cba150754d8 Author: Eric Anholt Date: Thu Jan 18 11:37:14 2007 -0800 Update CRTC values first so they can be used by the driver in mode setting. With this, the screen now gets rotated, though there are major issues. commit 92b0f3d2013c32d94fe57fe674da1b195288f347 Author: Eric Anholt Date: Thu Jan 18 11:23:22 2007 -0800 Disable the clipping for now, since it won't work. commit 14d265a02312e9cda7a21614d77525c7140c0ca8 Author: Eric Anholt Date: Thu Jan 18 11:21:58 2007 -0800 Store fixed values, not integers, in the transformation matrix. Also, add a bit more error checking. commit cc09dc3efe7279bf67512babb0f6cdaeba654772 Merge: 53e765d 3094100 Author: Eric Anholt Date: Thu Jan 18 10:20:36 2007 -0800 Merge branch 'modesetting' into modesetting-rotation commit 53e765d1cf5016961c25a798a27f0fe09bd1f237 Author: Eric Anholt Date: Wed Jan 17 16:56:06 2007 -0800 Fix broken last-minute change in determining whether we're rotated or not. commit f256243fff195f73bc8aa72e8dd2c6f7b33446cf Author: Eric Anholt Date: Wed Jan 17 16:01:18 2007 -0800 Allocate per-crtc rotation buffers and hook up RandR 1.2 per-CRTC rotation. It currently displays garbage. commit d17c386aee55bd223297adf78cf0fc1db43baf2d Author: Eric Anholt Date: Wed Jan 17 15:49:08 2007 -0800 Fix some segfaults: crtc->rotatedPixmap not set and dangling damage pointer. commit 67a152c43cb7231695b99030c952c52d4edd1e65 Author: Eric Anholt Date: Wed Jan 17 14:35:31 2007 -0800 Set all CRTCs' allowable rotations when xf86RandR12SetRotations() is called. commit 98110591001dfaf2b8b5ac440bea0c38456da718 Author: Zou Nan hai Date: Wed Jan 17 10:45:59 2007 +0800 enable all TV modes commit 3094100cdd04560af1b098bbe8024ae5270a10f4 Author: Gary Wong Date: Tue Jan 16 13:25:24 2007 -0800 Bug #9550: Add a quirk for too-high clock from EDID on the EN-7100e. commit 66c6427cc83e5e381932b0c10743cba4cb9ac883 Author: Eric Anholt Date: Tue Jan 16 12:54:29 2007 -0800 Add a settable backlight property for LVDS. This extends the output funcs to have a callback for when it's time to configure properties, and another for when the server has changed a property whose value isn't pending a mode set. (Pending properties are to be picked up by the driver at mode_set time). commit a52df90ffcb19e7c0a3b8018db3cd1391a3ec343 Merge: 37946c9 45696aa Author: Keith Packard Date: Tue Jan 16 12:20:26 2007 +1100 Merge branch 'modesetting' into modesetting-rotation Conflicts: src/i830_driver.c src/i830_randr.c Just a few sync changes. commit 37946c9c8a4afa4a4fc1fe9864a8eec1c4571d2c Author: Keith Packard Date: Tue Jan 16 12:14:55 2007 +1100 Interim work on rotation support with new xf86 code. Yes, there are lots of bits tied together here, and we should split this patch apart. Move I830 mode setting to xf86 mode setting. Make mode setting function also set the base address. This should fix problems where the base gets set incorrectly at times. Add driver-independent rotation support, requires driver-specific hooks for shadow pixmap allocation, otherwise it uses Render for painting. commit 9a5106401a65c90df32cb71987fca7126dc22e81 Author: Emilio Scalise Date: Mon Jan 15 17:22:27 2007 +0000 patch to control mergedfb options, bug #9664 commit bfeda3bfc59d309772398f688d29452ba97f3973 Author: Keith Packard Date: Mon Jan 15 08:05:32 2007 +1100 Convert I830PipeSetMode to xf86CrtcSetMode. Add rotation structures. Makes the mode setting logic device independent. Magic rename hooks allow multiple drivers to provide the generic code without name conflicts. Rotation code requires special pixmap creation hook, and uses Render to perform the actual rotation. commit 319be199ba657d2b82ba034edf3581aea6dcc3f0 Author: root Date: Sat Jan 13 21:34:00 2007 +0000 Tweak to bug #9639 commit 85de57947570de6b3dc9197647be3e9237480880 Author: Alan Hourihane Date: Sat Jan 13 19:18:24 2007 +0000 Fix bug #9639, i810 XvMC needs linking against libdrm. commit 45696aa29124e2852f94880642e70bb2e0cee827 Author: Eric Anholt Date: Thu Jan 4 12:34:47 2007 -0800 EXA: Use PRIM3D_RECTLIST instead of TRIFAN so we don't get diagonal tearing. A side effect is the reduction in vertex dispatch, which is nice. commit 6874a6f25ac87783d3770f77b9192e2d36d083a3 Author: Eric Anholt Date: Thu Jan 11 12:34:38 2007 -0800 Restore legacy overlay size limits, due to card hangs at larger sizes. commit c288aea40775a9cf561fda9912187c3cb5baa419 Author: Eric Anholt Date: Thu Jan 11 10:39:00 2007 -0800 Bug #8845: Unify all our XV ports to 1920x1088 maximum size. This increases the "legacy" size, but that was checked against the 845 documentation which claims support for 2048x2048 as well. It decreases the textured video size, which was running into the limits of the bigrequests extension. The new limits should fit within bigrequests while still supporting HD videos. commit f5d528f8ea27de31054e7f1843e34d8379f811ea Author: Eric Anholt Date: Thu Jan 11 10:36:33 2007 -0800 Don't limit cachelines to a vertical of 2048, and increase default allocation. The cachelines are used for two things: XAA pixmap cache and XV memory. Only XAA pixmap cache is referred to using an offset pointing at the beginning of the front buffer in rendering, and XAA only uses the 2d BLT engine, which actually has a vertical limit of 65536. So, pixmap cache is now limited to that much vertical. Additionally, the previous cachelines allocation was too small for our advertised XV limits, so video at the limits would fail with BadAlloc. Now, XAA allocates the same approximate amount of offscreen memory as EXA: 3 times the screen size, plus one packed HD video. commit d13bc016c0723f1df633ddaf5610ad73003b7c96 Author: Eric Anholt Date: Wed Jan 10 15:06:56 2007 -0800 Correct x/y/pitch limitations in several cases, and detail them in i830_exa.c. This reduces max framebuffer width and increases max framebuffer height on 965, reduces max X/Y on pre-965 EXA (could have caused mis-rendering), and increases max X/Y on 965 EXA (would have prevented acceleration). commit fa383289ac8a6dd1cb359e6f1991cc42beb6ff02 Author: Eric Anholt Date: Thu Jan 4 14:12:45 2007 -0800 EXA: Wait for sync before we set up new state in our static state buffers. commit 5857b4a1693085b8b42dd9560a7c4f5c3c82f862 Author: Wang Zhenyu Date: Wed Jan 10 15:09:47 2007 +0800 Formalize sync interface We should just call i830MarkSync/i830WaitSync in places we need, which care for both XAA and EXA. commit efb75f56053ee06f1dbd4edfaea9986b27162afb Author: Alan Hourihane Date: Tue Jan 9 14:05:43 2007 +0000 Bump to 1.7.4 commit 33c0fac6d63d9a509a24c7a5e5a46a0d6ee4dc5d Author: Alan Hourihane Date: Tue Jan 9 14:02:47 2007 +0000 Fix bug #8536, i915 BIOS fails when restarting Xserver. commit ee52c0ec4e95fa6e5f35c9cd75005a0c0003fd97 Author: Eric Anholt Date: Mon Jan 8 16:53:07 2007 -0800 Correct typo resulting in a crash with ivch. = != ==. commit 566e1d397744d0b477de4da6a206919906176f49 Merge: b13d638 da6a00f Author: Keith Packard Date: Mon Jan 8 12:37:49 2007 -0800 Merge branch 'modesetting' into crestline commit da6a00f787e4d13e6b75768c1976f1c44ae5bf72 Author: Keith Packard Date: Mon Jan 8 12:36:54 2007 -0800 Move EXA function declarations from source to header. Several new global functions were not put into the header file leading to potential mismatches between declaration and definition. commit 66546d8a8006e1c828e18ccab850214fd8d56b63 Merge: 0fd2752 40af0ee Author: Keith Packard Date: Mon Jan 8 10:14:24 2007 -0800 Merge branch 'modesetting-origin' into modesetting commit b13d6386dfb3a00bd9d21ac0695cdce9f812d1f3 Author: Keith Packard Date: Sun Jan 7 22:56:37 2007 -0800 Back out rotation changes for RandR 1.2 which won't work. RandR 1.2 requires a new rotation structure for per-CRTC rotation. commit 7473e7d5297f94164e0f35822166713fb21a11bd Merge: cdde9e7 a87801f Author: Keith Packard Date: Sun Jan 7 22:50:27 2007 -0800 Merge branch 'crestline-otc' into crestline commit cdde9e7f4a0645ab1ee3e124de54433c1a250097 Merge: 3110630 0fd2752 Author: Keith Packard Date: Sun Jan 7 22:50:12 2007 -0800 Merge branch 'modesetting' into crestline commit 0fd2752f199928f846fe03c9087f7b6d48cc28d9 Author: Wang Zhenyu Date: Thu Jan 4 14:35:55 2007 +0800 minor fix on last exa mem binding commit commit 3110630e04f37e184609c91494fa7f9f4d59b93f Merge: be9b635 736d82a Author: Keith Packard Date: Sun Jan 7 22:44:36 2007 -0800 Merge branch 'modesetting' into crestline Conflicts: src/i830_rotate.c Pull in upstream changes to crestline branch leaving only the PCI-IDs as local changes. commit 40af0ee6ba4ab7596fbc7fcc3ad04d109746ca6f Author: Keith Packard Date: Sat Jan 6 18:19:34 2007 -0800 Numerous symbol scope issues. I830EntityIndex is shared between 810 and newer driver. Move most EXA rendering state into I830 structure. Declare shared variables in shared header files rather than .c. commit 736d82a6b43f174cb95b425faacd4b0b889916fa Merge: 53b42f5 4c790f6 Author: Wang Zhenyu Date: Mon Dec 4 15:48:04 2006 +0800 Merge branch 'modesetting-origin' into modesetting commit 53b42f5bc7a58d02106436486e5bb56e56dbbfa1 Author: Zou Nan hai Date: Sat Jan 6 14:59:14 2007 -0800 support NTSC 480i M-J, PAL 576i for 640x480-1280x1024 sizes I still have problem with non-interlace mode and Hi Res mode. also I don't know how to pickup those mode in xorg.conf commit 71946bcdc3c68c220996afac944698eea1974a36 Author: Wang Zhenyu Date: Wed Jan 3 22:37:32 2007 -0800 [PATCH] Add rotation support for 965. commit 35cebed70827999812f8343ac97ad0dffda20786 Author: Eric Anholt Date: Thu Nov 16 15:12:43 2006 -0800 [PATCH] Replace broken PCI resource size detection with pciGetBaseSize() call. Signed-off-by: Keith Packard commit 33e912aca08fa11ef588eb386e16ba5f9ea13727 Author: Wang Zhenyu Date: Thu Jan 4 11:25:31 2007 +0800 [PATCH] Fix EXA mem binding We should check if EXA is really enabled. Signed-off-by: Keith Packard commit fa54a3c08301e59558ab0493b3d22324f4162496 Author: Wang Zhenyu Date: Wed Dec 6 13:24:44 2006 +0800 [PATCH] fix Makefile.am Signed-off-by: Keith Packard commit 2f2c443e971faa54ffcf751b6acb444e8e7875ce Author: Wang Zhenyu Date: Wed Dec 6 10:43:29 2006 +0800 [PATCH] Formats fixes We should use card_fmt for src/mask picture, and use dest color buffer format helper. Also fix wrong name for G965 texture formats, and pict_x1r5g5b5 isn't supported by sampler engine. Signed-off-by: Keith Packard commit 0bf04fe78a8a915310ef8a90f5c7872be7476e2e Author: Wang Zhenyu Date: Mon Dec 4 15:48:04 2006 +0800 [PATCH] set correct default border color Signed-off-by: Keith Packard commit 5c461063cde68092e778c44ac6abd9129cd8019e Author: Wang Zhenyu Date: Mon Dec 4 15:47:31 2006 +0800 [PATCH] fix typo in ps kernel fix corrupt in some subspans Signed-off-by: Keith Packard commit 89a42d489bd370b89e5ff4e01f026b4d64723cd8 Author: Wang Zhenyu Date: Wed Nov 29 17:16:46 2006 +0800 [PATCH] shut up warning Signed-off-by: Keith Packard commit 01bfa4fa6fc0ceec8581676e5d72c68dd71efa96 Author: Wang Zhenyu Date: Wed Nov 29 17:14:55 2006 +0800 [PATCH] fix alpha blending state Signed-off-by: Keith Packard commit 79018bb47c43510d59c592592f06204189bd12dc Author: Wang Zhenyu Date: Wed Nov 29 17:05:32 2006 +0800 [PATCH] Add in sf/wm program for mask picture without CA Signed-off-by: Keith Packard commit a5b9b438469f171b002fa0b99d8cab83e51ec968 Author: Wang Zhenyu Date: Wed Nov 29 16:52:44 2006 +0800 [PATCH] misc cleanup for G965 vs/sf/wm states Signed-off-by: Keith Packard commit b7c1e1656f45e43ea2f9a47f1a487050c0884c22 Author: Wang Zhenyu Date: Wed Nov 29 16:40:15 2006 +0800 [PATCH] WM kernel needs scratch space Signed-off-by: Keith Packard commit db9cfaa35adaf79ea57bc06b27c7e37935d3e1a7 Author: Wang Zhenyu Date: Wed Nov 29 16:37:06 2006 +0800 [PATCH] Setup default border color for our samplers Signed-off-by: Keith Packard commit 70276e4e9a8a5026ec436d2be5bf5eab868aa178 Author: Wang Zhenyu Date: Wed Nov 29 16:30:53 2006 +0800 [PATCH] fix vertex buffer size Signed-off-by: Keith Packard commit e8a4cbdeff4125e28d807d0a563efc0606d21a75 Author: Wang Zhenyu Date: Wed Nov 29 16:24:24 2006 +0800 [PATCH] clean up issue cmd to ring buffer Make it easy to track different part of ring state, and use rectlist primitive instead. Signed-off-by: Keith Packard commit 42534474fd2556e5987205626cca8f30e25855a8 Author: Wang Zhenyu Date: Wed Nov 29 16:04:16 2006 +0800 [PATCH] remove wrong scale_units Signed-off-by: Keith Packard commit 05e8a7989db1b8b9dfa7b688629af65d9910cc53 Author: Wang Zhenyu Date: Wed Nov 29 16:02:16 2006 +0800 [PATCH] Rename exa sf/wm program files Also fix some minors in wm program. Signed-off-by: Keith Packard commit 1329c86f2a4b3664920ded970a984a745a530da4 Author: Wang Zhenyu Date: Wed Nov 29 15:47:19 2006 +0800 [PATCH] EXA state mem for G965 Not split offscreen mem for exa, but alloc a dedicated one for G965 states. Signed-off-by: Keith Packard commit 4c790f614ecba1f6468e51779cfaf0e36b6b17ad Author: Jesse Barnes Date: Sat Jan 6 08:21:36 2007 -0800 More sparse cleanups: NULL vs. 0 make some variables static remove redundant variables There are only a few sparse warnings left now: some bitfield warnings and a few 'mixing code and declarations' warnings from the ring macros. commit a87801f73a73e53524237be7835b8cd8b3eb282c Author: Wang Zhenyu Date: Thu Jan 4 14:47:48 2007 +0800 Fix TV load detect Actually load TV, otherwise we don't have expected reg state to probe. commit 9cf759a2cb2580c4ac5f8cdc983389642f3cfce0 Author: Wang Zhenyu Date: Thu Jan 4 14:35:55 2007 +0800 minor fix on last exa mem binding commit commit f9c3ef40100acb85fca6e49c5c0e98f5c9ac97ca Author: Wang Zhenyu Date: Tue Oct 10 15:50:10 2006 +0800 [PATCH] Mark current ps kernel is experimential with little test. Signed-off-by: Keith Packard commit ef2f25e5c6ce04c202698c5122bc8627130073c0 Author: Wang Zhenyu Date: Tue Oct 10 14:11:35 2006 +0800 [PATCH] Use sf_prog.h instead Signed-off-by: Keith Packard commit ca608028c5301700444d39a1c631cc0d5648e1a2 Author: Wang Zhenyu Date: Thu Sep 28 13:55:52 2006 +0800 [PATCH] Fix picture's transform checking Signed-off-by: Keith Packard commit 848368d5d0b90e03d3ec447cb5bd39fc87aea8df Author: Wang Zhenyu Date: Thu Sep 28 11:15:33 2006 +0800 [PATCH] Fallback in mask picture for now Do it later after finish wm kernel program. Signed-off-by: Keith Packard commit df23624eebe938fa444c80cbedcd61919ec1aeda Author: Wang Zhenyu Date: Thu Sep 28 11:09:52 2006 +0800 [PATCH] Fix compile, add wm header file. Signed-off-by: Keith Packard commit fc944859b1b9605c748162bad1c93a6303c84aae Author: Wang Zhenyu Date: Thu Sep 28 10:36:00 2006 +0800 [PATCH] Add simplest wm kernel program for no mask picture composite This is a try to use new gen4asm language, and will finish composite program for mask picture with or without CA case later. Signed-off-by: Keith Packard commit acdc2da77b445e9347a4c6e53e35c81763cbb0b8 Author: Wang Zhenyu Date: Wed Sep 27 16:48:43 2006 +0800 [PATCH] Add mask sampler state Signed-off-by: Keith Packard commit 926d7fb09aaaabf050949ce7c6127c68441c8801 Author: Wang Zhenyu Date: Wed Sep 27 13:54:14 2006 +0800 [PATCH] change some src sampler states sampler for mask should also be set up, and fix default border texel. Signed-off-by: Keith Packard commit ed73bbaf5c2e9d555c884037a249cf03e7f60fa0 Author: Wang Zhenyu Date: Mon Sep 25 14:35:51 2006 +0800 [PATCH] Add file for i965 exa composite This does not include ps program, which will be added in g4a form. Signed-off-by: Keith Packard commit be9b635b82c0c77ccc0555f178f94de6e5338e27 Merge: 9e48808 5a793b0 Author: Keith Packard Date: Wed Jan 3 22:15:53 2007 -0800 Merge branch 'modesetting' into crestline commit 5a793b0dcf2d5de408b55073858fcfba6d99f994 Merge: f188525 394124c Author: Keith Packard Date: Wed Jan 3 21:54:05 2007 -0800 Merge branch 'modesetting-origin' into modesetting commit f188525030a8fac59e41520449b1aec9b123e4ea Author: Keith Packard Date: Wed Jan 3 21:53:07 2007 -0800 Add interlace defines for pipeconf regs commit 9e48808fccf5b153c2fb4027f9a09944574fdace Author: Wang Zhenyu Date: Thu Jan 4 11:25:31 2007 +0800 Fix EXA mem binding We should check if EXA is really enabled. commit ebd636dbd62cb69ed7defbd86f297c6bc7dac5dd Merge: 75f0033 3d9ea6f Author: Wang Zhenyu Date: Thu Jan 4 10:13:55 2007 +0800 Merge branch 'modesetting' into crestline Conflicts: src/i830.h src/i830_randr.c commit 3d9ea6f3c8a274f930d286fc15d3665dfaa8327a Merge: 75f4df2 394124c Author: Wang Zhenyu Date: Thu Jan 4 10:12:50 2007 +0800 Merge branch 'modesetting' of git+ssh://zhen@git.freedesktop.org/git/xorg/driver/xf86-video-intel into modesetting Conflicts: src/i830_driver.c commit 394124ceaadb46d976ad5c3bdeb1b77d351c57f6 Author: Eric Anholt Date: Tue Jan 2 16:57:33 2007 -0800 Add per-CRTC gamma control support for RandR. This makes the CRTCs now always run in gamma-enabled mode, rather than having flaky logic for switching modes. Also, it should clear up issues with the LUTs being uninitialized when outputs are first brought up. commit 69f250af60220a875f4a04c6d682bffa352281e4 Merge: 232e209 d960dea Author: Keith Packard Date: Wed Jan 3 00:39:15 2007 -0800 Merge branch 'modesetting-origin' into modesetting commit 232e2094321dbcdd6a67ef230eb50494a1c7d6df Author: Keith Packard Date: Wed Jan 3 00:38:34 2007 -0800 Allow initial position to be set in config file. Increase 965 max size. Add relative and absolute position configuration code, using per-output monitor sections. Options include: PreferredMode selects a preferred mode for this output by name Position absolute position, x and y in a single string. Below relative positions; argument names other monitor. RightOf Above LeftOf Enable force the monitor to be disabled by setting Disable enable to no or disable to yes. MinClock Set valid clock ranges MaxClock Monitor sections can also include sync ranges, physical size and mode lines as documented in xorg.conf(5). Monitors are associated with outputs through options in the Device section: Option "monitor-VGA" "My VGA Monitor" Output named 'VGA' will use monitor section "My VGA Monitor". commit 58e797b2caa6effa5455fc1f13dc4c58d0658744 Author: Keith Packard Date: Wed Jan 3 00:04:58 2007 -0800 Sync dspbase/dspsurf registers by re-reading them. This seems to eliminate base/surf value confusion during EnterVT. commit d960deab39eef91fb82b9f23118323aeb4c9c63e Author: Jesse Barnes Date: Tue Jan 2 20:23:37 2007 -0800 Various sparse cleanups: NULL vs. 0 remove redundant pScrn in I830DRISwapContext make I830DRISwapContext static commit 5057769d3a7c1b3a94f49bbff47b9697f368d975 Author: Dave Airlie Date: Tue Jan 2 19:25:08 2007 -0800 Use correct variable to initialize DVO I2C bus. intel_output->pI2CBus isn't initialized until the output is all happy and running, so using it before that is rather unlikely to do much good. commit 2bb9bb951e664d704bdf7a808edbe8b2f50c4366 Author: Keith Packard Date: Tue Jan 2 14:04:10 2007 -0800 Typo disabled new DRI MM on all chips. Detection for new DRI MM wasn't converted to #define correctly because of a typo. commit 5080307230d534b84090bfefc13ac437d53f915d Author: Keith Packard Date: Tue Jan 2 00:16:41 2007 -0800 Fix driver to build on RandR 1.2 systems again. Changes to move initial config code to RandR 1.1/1.2 common path broke code required only for RandR 1.2. commit 237847007afb5a429a50b6aa0b1acc239326571b Author: Keith Packard Date: Tue Jan 2 00:09:35 2007 -0800 Make driver build and run on Xorg 7.1. Delay DSP*BASE setting until last. Autodetect libdrm version, disable new memory manager on older libraries. Move new M_T_ defines from i830.h to i830_xf86Crtc.h. Add many system headers to define functions. Use i830PipeSetBase at end of mode setting code to set DSP*BASE and flush changes. Don't duplicate PipeSetBase call from screen init function. Make initial RandR configuration code usable on older versions of extension so the server doesn't start in a panning mode. Use xfree instead of free in i830_tv.c. commit 25d5a892319b02dc6eb81390dea29cd88a1e7da4 Author: Keith Packard Date: Sun Dec 31 15:39:20 2006 -0800 Elide identical modes from reported list. Where two modes would produce precisely the same crtc settings and have the same name, remove the latter mode from the mode list. commit feeefc92e450e9de58da51147325300ffabd2059 Author: Keith Packard Date: Sun Dec 31 14:22:53 2006 -0800 Replace author-specific license with generic license. This file retained the old MIT license with the embedded author name. Replace that with the version that uses generic 'copyright holders' instead. commit 5e456251f0d6c8bef3241267f6c1b3bca4670c0d Author: Keith Packard Date: Sun Dec 31 14:21:12 2006 -0800 Replace author-specific license with generic license. This file retained the old MIT license with the embedded author name. Replace that with the version that uses generic 'copyright holders' instead. commit 75f0033ec41a34bbe695cfd4a9bc9aa60e919c99 Author: Wang Zhenyu Date: Sun Dec 31 15:16:59 2006 +0800 Issue current virtual size to mode valid. Revert change in rotation patch. commit 2330b341c925e60bc2c991b4ca8450badbc459a4 Author: Keith Packard Date: Sat Dec 30 22:47:58 2006 -0800 Prune default modes to EDID clock limit. Pick out the EDID max clock value and use that to elide default modes which are too fast. commit c70e7bc701cba3092acfdd66ed4d63487ac8ff9f Merge: 8b6c456 4ed79a2 Author: Keith Packard Date: Sat Dec 30 21:58:36 2006 -0800 Merge branch 'modesetting-origin' into modesetting commit 8b6c456e16c81f719bb68178e3e4d26f4108a9c2 Author: Keith Packard Date: Sat Dec 30 21:57:42 2006 -0800 Detect in ProbeModes. Let get_modes set edid. Prune interlace/dblscan. Move output connection status detection from RandR code up to ProbeModes so it is done before mode sets are built. Otherwise, the mode building code will elide all modes the first time through as it ignores outputs that are disconnected. Most get_modes functions fetch EDID data; make sure that any EDID changes are used in the ProbeModes filtering of default modes. Otherwise, stale EDID data will be used. Allow outputs to advertise support for interlaced and double scan modes; prune such modes from the default mode list when outputs do not support them. commit 4ed79a2ba6250354ffc24fa1f7a21ca914ad157e Author: Eric Anholt Date: Fri Dec 29 12:19:41 2006 -0800 Relax tiling requirements on G965. For the 965, we can tile with the pitch at any integer multiple of a tile size (128 or 512B), up to 128KB. commit b8692e646227e56c9ae4f72b9aaa75457b4c0f5f Author: Keith Packard Date: Thu Dec 28 22:23:16 2006 -0800 Lack of configured monitor implies no configured modes. Missing check for missing monitor configuration would result in segfault. commit 973da654219ea43916b0b44acfa09a415bed3d7a Author: Keith Packard Date: Thu Dec 28 22:22:22 2006 -0800 Sync ranges from EDID/default should not limit configured modelines. Limit the effect of sync ranges so that sync ranges found via EDID will not eliminate modes explicitly added by the user. Limit default sync range to eliminating only default modes, not configured or EDID modes. commit f7b1d4c1f7d17a811e17c6a17861ff70be9fbdd7 Author: Keith Packard Date: Thu Dec 28 22:18:57 2006 -0800 Belinea 10 15 55 monitor quirk - override preferred mode with largest @60Hz Belinea 10 15 55 model monitor reports a preferred mode of 640x350, when in fact it wants a 1024x768 mode @ 60Hz. Add an edid quirk that selects the largest size mode, preferring those closer to 60hz among equal sized modes. commit fbd3f588f0d412c20cc3f86dfad73700734a9a76 Author: Wang Zhenyu Date: Fri Dec 29 10:47:52 2006 +0800 rotation support for randr-1.2 This patch trys to resolve rotation regression with randr-1.2. Tested with Crestline VGA output. See bug 83. commit a1796bfb51d90fd545973909404e1a77ad27c9cc Merge: 84915ac fabfccd Author: Wang Zhenyu Date: Fri Dec 29 10:10:26 2006 +0800 Merge branch 'crestline' of git+ssh://zhen@otc-graphics.jf.intel.com/git/xorg/driver/xf86-video-intel into crestline commit bedab1654e2dfcf7800bd0101e6991800a544019 Author: Eric Anholt Date: Thu Dec 28 16:34:40 2006 -0800 Remove 8MB/32MB default VideoRam limits. With modern monitors and increased XV and EXA memory requirements, these small limits were resulting in DRI and other initialization failures because we wouldn't allow them enough memory. Instead, allow each piece of the system (DRI, EXA, XAA, etc) to request as much memory as it wants, and choose the actual videoRam to be used for laying out the memory afterwards. With this change, in the absence of a VideoRam option, 32MB will be allocated for textures. commit 4cc5dcf6d7423239f0181f246638366edcb8be87 Author: Keith Packard Date: Thu Dec 28 16:43:39 2006 -0800 Oops, dont use symlinks for stolen xf86 header files commit 86da0d05e4e338e7f4c841577002eb1ba9f6b2ac Author: Keith Packard Date: Thu Dec 28 16:40:54 2006 -0800 Add stolen xf86 header files to driver source commit 2b0a997e5b4b51267fa4f6725f8a965093392434 Merge: bb238a8 9cfbf1c Author: Keith Packard Date: Thu Dec 28 16:34:38 2006 -0800 Merge branch 'modesetting-origin' into modesetting commit bb238a8fc234a8e5e86cd2f42c58c9816a15732c Author: Keith Packard Date: Thu Dec 28 16:27:22 2006 -0800 Configuration support: per-output mode lines, preferred mode. Add the modelines specified in the per-output monitor and all of the default modes to the list to each output. Prune the resulting list to specified sync limits and virtual sizes. Sort the resulting mode list on preferred/size/refresh. commit 9cfbf1ceda8f153438df1ba4b1712c55cc872017 Author: Eric Anholt Date: Thu Dec 28 12:59:23 2006 -0800 In EXA mode, force backing pixmaps into memory when doing XV to them. commit e889bde13dcc2438181a03319e204ae7b9235a78 Author: Eric Anholt Date: Thu Dec 28 12:49:24 2006 -0800 Draw textured video to the backing pixmap in the composited case. Currently, when the backing pixmap is not in framebuffer, we just BadAlloc rather than drawing garbage to the front buffer. This can be fixed with EXA. commit c7083a6f30fdf1859f60beba4c352bd790af4773 Author: Eric Anholt Date: Thu Dec 28 11:53:33 2006 -0800 Add WIP CH7017 LVDS driver. This is disconnected because it's untested. commit 778db49616b233f5a2f4f007ceb62a1a878a6e25 Author: Eric Anholt Date: Thu Dec 28 11:36:15 2006 -0800 Add WIP IVCH (i82807aa) driver. It is not currently hooked up as it hasn't been tested. The hardware that this was written for decided to stop working. commit 5806f670eb3a5171ffb0b75701640d5311b34c80 Author: Eric Anholt Date: Thu Dec 21 16:22:14 2006 -0800 Reformat the DVO drivers table to be a bit more normal style. commit b928cef9cd5b3f88dc0880f406300d246a59e0fe Author: Eric Anholt Date: Thu Dec 21 16:21:28 2006 -0800 Move dvo driver detection into i830_dvo_init(), and use GPIOB for LVDS drivers. The documentation states that GPIOB is (generally) used for devices on DVOA on the motherboard, which appears to be the case on the laptop we have with LVDS on the motherboard. This patch is probably not entirely accurate, as there was apparently an LVDS DVO card sold that could be put in desktop machines, which would likely be on GPIOE like other ADD cards. Given that we couldn't find one of these cards for purchase, I'm not worrying about it. commit fabfccd3d8a55a83138d361f66c53cb7e6d371a8 Author: Zou Nan hai Date: Thu Dec 28 14:48:54 2006 +0800 Fix commit ddefce4f02eb3272ad37e890350f73f03eff73c9 Author: Zou Nan hai Date: Thu Dec 28 14:45:53 2006 +0800 support NTSC 480i M-J 1280x1024 1024x768 800x600 640x480 PAL 576i 1280x1024 1024x768 800x600 640x480 I still have problem with non-interlace mode and Hi Res mode. also I don't know how to pickup those mode in xorg.conf commit c87462ded20904dbc6c6cbdb9547523b75fe5471 Author: Eric Anholt Date: Wed Dec 27 19:14:14 2006 -0800 Remove the nasty #define away of ErrorF in i830_video.c. Every new person touching this file hits this trap, so it's now removed. commit 6dc3387219b2b31e0c7dbaa88b568fbd54d72878 Author: Eric Anholt Date: Wed Dec 27 18:58:40 2006 -0800 Fix operator precedence issue that stuck 965 t-v state into the front buffer. commit 210f30bd75529d0064bc46af15464a2a47f9d4c6 Author: Eric Anholt Date: Wed Dec 27 18:57:50 2006 -0800 debugging for location of various 965 textured-video state. commit 82738e60769a4798d7425ffc67882d1f74043b76 Author: Eric Anholt Date: Wed Dec 27 18:35:35 2006 -0800 Fix discrepancy between XAA/EXA linear allocations that broke EXA XV. The XAA allocator returned an offset from the beginning of the frontbuffer allocation (where the linear allocations come from), while EXA returned one from the start of framebuffer. Now, both of them use the start of framebuffer as the reference. commit 8165e043670f6a7fee5e7e8f33644adda5757591 Author: Eric Anholt Date: Wed Dec 27 18:17:37 2006 -0800 Bump the size of the extra space for 965 so it actually fits. commit f830c55e5f4efc97451240f8f18b49f46e8bce0f Author: Eric Anholt Date: Wed Dec 27 18:14:59 2006 -0800 Make the assert() in i965_video.c actually work and expose an error. commit a75b416c91085df1db4027a25eafcd04fef1e57c Author: Eric Anholt Date: Wed Dec 27 17:58:57 2006 -0800 Replace XAA mark/waitsyncs with the XAA/EXA wrappers. commit 150010d2f20f4a57f8507eba8762e36966b0f426 Author: Eric Anholt Date: Wed Dec 27 17:57:34 2006 -0800 reformat i965_video.c to 4-space indents, 80 columns, no trailing whitespace. commit 05066632b068ae91d7be77e3a199ea0d337d975b Author: Eric Anholt Date: Wed Dec 27 17:41:45 2006 -0800 Move 965 textured-video out to a separate file. commit 46df75ccd4647ea033583130253a2a2218b34a20 Author: Eric Anholt Date: Wed Dec 27 13:45:06 2006 -0800 Bug #7524: Major improvements to EXA/XAA static memory allocation. With this, we no longer allocate XV through the XF86 linear allocator in the EXA case. We also no longer allocate extra space for the XF86 2D allocator that we don't use in EXA mode, or space for the EXA allocator in XAA mode. The EXA offscreen allocator now gets enough space for several screenfuls of pixmaps plus one 1920x1088 movie. A large duplicated section of code for allocating each framebuffer in the old dual-screen mode was also factored out. commit 84915ac8afeb4bbc03df8f94ab3ba351788d6501 Author: Keith Packard Date: Thu Dec 21 23:42:53 2006 -0800 If DDC detailed modes are missing physical size, pull from features. Monitors without detailed modes, or those which do not bother to set a physical size in their detailed modes may still have physical size in the global data. commit 1e9105395a7900521206b28bae4bb4f85669a0cd Merge: df9ecf8 c237e93 Author: Keith Packard Date: Thu Dec 21 23:34:30 2006 -0800 Merge branch 'modesetting-origin' into modesetting commit df9ecf8ab93f0aeffde11d438513d41220ba75cb Author: Keith Packard Date: Thu Dec 21 23:32:35 2006 -0800 Change belinea edid quirk to cover the 10 20 30W model as well. This larger model reported different (but still incorrect) sync polarities, so instead of flipping them, just set them to the right value. commit c237e930615f1b048895efe988d28503f5d67c37 Author: Keith Packard Date: Thu Dec 21 23:30:37 2006 -0800 Use Vesa DDC timeouts for all I2C busses. The default I2C timeouts are very short, and while most modern monitors have no trouble responding at that rate, some older ones cannot manage. commit d8c5dba4d797fc50d7b2b5855f34e2d2e2ad3e4f Author: Keith Packard Date: Thu Dec 21 21:20:43 2006 -0800 When cleaning duplicate modes, make sure ->Last is reset correctly. When removing the very last mode for a monitor, move the ->Last pointer to the previous list element. commit fab9a6b6210daea423b609208ef57fa26571f5d3 Author: Keith Packard Date: Thu Dec 21 21:19:32 2006 -0800 Add EDID quirk support for broken EDID data. For EDID with known errors, add a quirk mechanism to automatically compensate. The first quirk is for a Belinea 1440x900 monitor which incorrectly specifies sync polarities in the detailed mode. commit d9b27667e6cc6c7e171b0f513d40be7658cf4574 Author: Keith Packard Date: Thu Dec 21 21:17:03 2006 -0800 PLL computations missed one possible 'm2' value. m2 was ranging from min <= m2 < max instead of <= max resulting in inaccurate PLL frequencies for some modes. commit c5205595f2abacc9f736e1f53666302ec551cbc4 Merge: b8f3ec7 4c0c1aa Author: Keith Packard Date: Thu Dec 21 02:51:33 2006 -0800 Merge branch 'modesetting' into crestline commit 4c0c1aa882cfec77b2183baec93cbc4cfaf4abe0 Author: Keith Packard Date: Thu Dec 21 02:33:39 2006 -0800 Computed corred color conversion values. Extract correct color conversion values for all video formats from documentation. Use those, with appropriate conversions, for the color conversion register values. commit 98fd44d681220aa31200e4262f1a7ec952a09530 Author: Keith Packard Date: Thu Dec 21 01:24:24 2006 -0800 TV subcarrier was computed from wrong clock value. The constants provided in the documentation for the subcarrier DDA values assumed the clock was programmed to precisely 108MHz, but the PLL can't hit that value exactly (or our PLL computation can't, in any case). The result was an incorrect subcarrier frequency which resulted in synthetic subcarrier phase shift and a lovely rainbow effect on the screen. Unfortunately, the documentation didn't exactly describe the function performed by the subcarrier clock hardware, so a bit of detective work was needed. New constants were computed using the code in tv.5c and those, along with lots of other values from the documentation were inserted into the necessary tables. The result appears to generate stable NTSC video on the svideo connector. commit b8f3ec77104882fc755ddc88f2583cd5d15387a4 Author: Zou Nan hai Date: Thu Dec 21 10:46:17 2006 +0800 This fix should be better, I830SetMode will call i830_sdvo_dump, if the sdvo is not initialized, X will crash. So any application which SetMode will crash X if there is no SDVO output. commit b83cbec34a8d1ff39bd303fcd27fc03dcdb1d6c3 Author: Zou Nan hai Date: Wed Dec 20 17:32:05 2006 +0800 fix null pointer reference, I hit this when running doom3-demo commit 4ba72fc408e7fab7c384aff5e73f0cfb8fd86cf3 Author: Keith Packard Date: Tue Dec 19 22:39:57 2006 -0800 Reinitialize DGA mode list whenever we update the global list. DGA has a copy of the current mode list (yes, this is broken). Regenerate it whenever the ddx mode list changes. commit 07d3f141712e2abf704cb68a59cd5d5c3390e2ca Merge: 0cd1a11 c28075e Author: Keith Packard Date: Tue Dec 19 22:01:02 2006 -0800 Merge branch 'modesetting' into crestline commit c28075e1d70c98b39fc9829a6a01da171a9b9426 Author: Keith Packard Date: Tue Dec 19 21:53:10 2006 -0800 TV output I830OutputPrivate had wrong type (crashed in SetMode). TV output private type field was set to I830_OUTPUT_SDVO instead of I830_OUTPUT_TVOUT. When DGA mode setting occurred, the sdvo output debug code would be invoked and attempt to dereference sdvo-specific bits of the private structure leading to a segfault. commit 2ef4c5e8f6444aad192304e5a2f7a0c77bfb917d Author: Keith Packard Date: Tue Dec 19 16:45:39 2006 -0800 Re-initialize physical screen size only if -dpi was passed. Physical screen size from the config file or DDC will already be set correctly in the screen structure, unless it was computed from the virtual size using the -dpi command line option. Recompute physical size as we reset the screen size if the -dpi option was used. commit b00951a5c87ca8c596ee9cc73d96d598eec60751 Merge: 05cd921 c0a0ddc Author: Keith Packard Date: Tue Dec 19 16:22:04 2006 -0800 Merge branch 'modesetting-origin' into modesetting commit 05cd921140fae2746c3421715d7f18248a66735a Author: Keith Packard Date: Tue Dec 19 16:21:46 2006 -0800 Align textured video dither matrix to window commit c0a0ddc0ce69b60ac3a58d45cb32ccd0e0bfb0c9 Author: Eric Anholt Date: Tue Dec 19 16:06:13 2006 -0800 Bug #9382: Save the CRTC's desired mode in the old RandR 1.0 mode set path. commit 3c86fdda1d09fd22d4c15a8e412611db4cea7dcf Author: Keith Packard Date: Tue Dec 19 15:53:07 2006 -0800 Turn on dithering for 915 textured video commit 293ad158ece941eeb9894f5af4d663464b9954e5 Author: Eric Anholt Date: Tue Dec 19 14:35:51 2006 -0800 Remove 8k framebuffer stride restriction on 965. Also, clean up the message if the limitation is hit. commit ff1223142aedcf888665de6e4d7d5d03a55b2688 Author: Eric Anholt Date: Tue Dec 19 12:49:55 2006 -0800 Only erase curMode in i830DisableUnusedFunctions when the CRTC is disabled. This bug resulted in broken xinerama, among other issues. commit 3b5703c7fa08e63f2a31be7496ded9c70015946d Author: Daniel Stone Date: Tue Dec 19 09:49:49 2006 -0800 Respect the srcdir. commit d89e211b12ff715d7475421af69157b102accaca Author: Eric Anholt Date: Fri Dec 15 14:39:14 2006 -0800 Disable configure-disabled outputs before mode setting. We're not supposed to turn off pipes/planes/dplls with outputs attached, which we could have done before this. commit 3fc9feec7b29e0b908e3b90e0f6634117d66ba6d Author: Eric Anholt Date: Fri Dec 15 14:38:23 2006 -0800 Simplify i830DisableUnusedFunctions() by using the CRTC dpms routines. commit 7b8056e3e347b15b37be0116315d7d3a23aef99f Author: Keith Packard Date: Tue Dec 19 01:32:54 2006 -0800 Writing 1 to I2C line means to tristate the bus so others can manipulate it. We were forcing bus lines to 1 which was breaking DDC for some monitors. Instead, make the PutBits function just tristate when writing 1 bits. commit 0cd1a11d4493ef4a2d05ccf8aadec743504dba5f Author: Zou Nan hai Date: Tue Dec 19 14:03:19 2006 +0800 fix for bug #108 commit eedef7adc53dd8337d27c02551c5778fb43bae05 Author: Eric Anholt Date: Mon Dec 18 15:57:44 2006 -0800 Add a detect() function for DVO chips, and implement it on sil164. commit 8983845f91cacf8110c70121e0f5f293fe443e6d Author: Eric Anholt Date: Mon Dec 18 15:57:08 2006 -0800 Fix crash in xf86SetScrnInfoModes when pScrn->modes ends up empty. commit fa4642048b183134544fc5ee47558446d27f6194 Author: Eric Anholt Date: Mon Dec 18 15:32:35 2006 -0800 Clean up i2c_vid interface, including de-StudlyCapsing and removing dead code. The old Init() function is removed and the previous Detect() function is now init(). This leaves us room in the namespace for a detect() like other outputs have ("is the monitor connected?"). Also, Power() became dpms(), taking a DPMSMode*. In general, the mode setting path now matches the intel internal path, except for the lack of mode_fixup(). commit dcb069a1da6b3300b0772843dd9b67efdf319637 Author: Dave Airlie Date: Tue Dec 19 10:29:56 2006 +1100 ch7xxx: add lookup table for name Don't load if we don't match name commit 0305298405bd7018e5c520bdd5ea46a75be09f37 Author: Eric Anholt Date: Mon Dec 18 14:49:01 2006 -0800 Limit modes to 165Mhz on CH7009, according to spec. commit 23114fbccad849249b4b7200e3d085a9ac0e2e99 Author: Eric Anholt Date: Mon Dec 18 14:47:44 2006 -0800 Align the driver to the CH7009[AB] spec. With this, the driver works at 640x480 and 1280x1024 on my panel. commit 633d718f6fb019844304228a81c84a8605da004f Author: Eric Anholt Date: Mon Dec 18 13:59:17 2006 -0800 Clean up a bunch of log noise from ch7xxx startup. commit 3167bc6b24bd74c50ca4c4d361b14aa24d77cfa3 Author: Eric Anholt Date: Mon Dec 18 13:45:55 2006 -0800 Fix DVO mode valid function to not throw out all modes. commit 4ca92da5b93b07f0bff51843f8fb5d04a2a29443 Author: Eric Anholt Date: Mon Dec 18 13:45:34 2006 -0800 Add save/restore to ch7xxx to avoid segfaults on server start. commit 31849edb3b503ade659981dfa36babf5ad8757c5 Author: Eric Anholt Date: Mon Dec 18 13:32:21 2006 -0800 Move the ch7xxx code to the style I've been settling on for output code. commit 1975fa5b010100196af201e40f43b30a149b7750 Author: Eamon Walsh Date: Mon Dec 18 14:08:55 2006 -0500 Revert "Convert callers of LookupWindow() to dixLookupWindow()." This reverts commit 08575331ac75783c9910cfb6e78db701a29983ac. commit 2d0ca2202cb0d780bb4387bbe04e5caa6512e3b1 Author: Eric Anholt Date: Mon Dec 18 10:37:33 2006 -0800 Bug #8786: Treat pictures with no color data as non-component alpha. This is an un(der?)-documented part of the render protocol: If the mask is alpha only, then the component alpha flag is ignored on it. commit 65cd18b97bc533b24031d6eb882fd3074779ceba Merge: bf43f8c 6823ca8 Author: Keith Packard Date: Sun Dec 17 17:32:24 2006 -0800 Merge branch 'modesetting' into crestline commit 6823ca87f3b1ef3b28ed167254dcfce2a80467df Author: Keith Packard Date: Sat Dec 16 21:12:47 2006 -0800 Follow mode setting order in RestoreHWState. Add delays after output and CRTC disable. Restore panel fit register before PLLs are restarted. Move all VGA restore code last. Shuffle various register writes around and add delays to match PipeSetMode code. commit 86558cc622b516b568cc26efdf9b64d4b660f50f Author: Keith Packard Date: Sat Dec 16 21:09:31 2006 -0800 Prefer earliest CRTC when mapping to outputs. For some reason, the code was preferring the last possible output when mapping outputs to crtcs. Use the earlier CRTC instead to make the i830 driver consistent with BIOS usage. commit 8e6ab99b3195325f9fe5432725fe328591c0c7e2 Author: Keith Packard Date: Sat Dec 16 21:06:36 2006 -0800 Not restoring active outputs. Wait for input sync before enabling outputs. Oops--looks like a typo to me; the code was callint set_target_output instead of set_active_outputs. BIOS loops waiting for the SDVO input to sync before enabling outputs, this makes sense to me. commit bffd611b0a1cb05868e0f93e6ff9357a3116eaa6 Author: Keith Packard Date: Sat Dec 16 21:03:15 2006 -0800 Follow BIOS order in writing DPLL/DPLL_MD registers. 965 BIOS writes DPLL and then DPLL_MD. 945 BIOS writes DPLL twice. commit 9b1a1b170befae2e705c23ce295837d0d13b60c0 Author: Keith Packard Date: Sat Dec 16 16:53:49 2006 -0800 reorder restore writes for 965 VGA commit 08575331ac75783c9910cfb6e78db701a29983ac Author: Eamon Walsh Date: Fri Dec 15 17:44:44 2006 -0500 Convert callers of LookupWindow() to dixLookupWindow(). commit 60411bc4d0b3c53850c73b7246d5f7ed5c2d4084 Author: Keith Packard Date: Thu Dec 14 18:36:44 2006 -0800 Follow BIOS PLL write protocol (disable,enable,enable). This gets VGA output and text restore working, but SDVO is still not working. commit 082519f34b468d0c5aa08db74ff2b51cf411d743 Author: Keith Packard Date: Thu Dec 14 16:51:48 2006 -0800 Turn pll/pipe/plane on in crtc_set_mode Instead of delaying pll/pipe/plane enables to the dpms function, turn them on right away in the crtc_set_mode function. To avoid rewriting these registers in the subsequent dpms function, check each register written there to see if the enable bit is already on and don't rewrite. commit 55e7a32096a58f7bb2380b04df6b3dd9dc8e5b6a Author: Keith Packard Date: Thu Dec 14 16:50:26 2006 -0800 Respect Virtual in xorg.conf Instead of growing virtual to fit our desired sizes, if it is set in the config file, use the value as the virtual size and make the default configuration fit within that size (if possible). commit d4142abc68888178a8f6c54fdcece91e898bc9f5 Author: Keith Packard Date: Thu Dec 14 13:49:08 2006 -0800 Set frame buffer size ranges in xf86_config. Initialization and default configuration code needs to know the range of legitimate sizes for the frame buffer. commit 2b5a5542ad7d1c558d1684a0a69b66bab6e9d001 Author: Keith Packard Date: Thu Dec 14 13:43:50 2006 -0800 Change TV modes from Preferred to Driver. This avoids having the artificial TV mode size drive overall screen size. commit 3fe802453a85183a69c36a098639895f49b17df1 Author: Keith Packard Date: Wed Dec 13 13:15:14 2006 -0800 Move xf86CrtcConfig to ScrnInfo private. Pull xf86CrtcConfig out of the driver private structure and allocate a ScrnInfo private index for it. Also, make the arrays of outputs and crtcs dynamic instead of fixed. commit 0f6addc8a6aeb9bd041d0f8e8e5850e76764ba51 Merge: 001e272 3fa5b39 Author: Keith Packard Date: Wed Dec 13 12:10:31 2006 -0800 Merge branch 'modesetting-origin' into modesetting commit 001e272437a0247ffbc4b9ff8a3f2b437cf4c533 Author: Keith Packard Date: Wed Dec 13 12:08:58 2006 -0800 Auto-detect working TV output by checking TV regs functionality. We can't figure out which chips are supposed to have TV out, so instead we prod the TV_DAC register to see if it will hold the value written to it, if not, we assume the chip doesn't have TV out. commit 3fa5b3998353518c40e2fb0c28b425ee22c8d625 Author: Eric Anholt Date: Wed Dec 13 11:54:36 2006 -0800 Add magic double-write of the dpll register to fix mac mini cold boot. commit e27372e85a007d8a7e31678dbdb62755c22918bf Author: Eric Anholt Date: Wed Dec 13 00:26:27 2006 -0800 Add some caution with PCI write posting and DPLL delays to i830_crtc_dpms. While it doesn't specifically help/hurt my test case, we've seen enough mysterious behavior that caution is probably warranted. commit df0a5a25aa72563a33731f8063602dd7faad8459 Author: Keith Packard Date: Wed Dec 13 11:38:18 2006 -0800 Rename outputs to TMDS-1/TMDS-2, LVDS, TV and VGA. These names are reasonably short and describe the connector rather than the target media, but we don't appear to have any way to determine what is on the other end of the wire. More importantly, they're all unique now. commit e3604fc63243ab0f31673a923d20e23131b607f6 Author: Alan Hourihane Date: Wed Dec 13 15:42:53 2006 +0000 Delete ChangeLog commit 4cdcaac26b3f425ec8fcc2fd3eaa9bfb7a137422 Author: Keith Packard Date: Tue Dec 12 23:26:00 2006 -0800 Write dpll_md register while updating dpll as that appears to be required. SDVO multiplier on 965 is in the dpll_md register; for some reason, that needs to be written along with the dpll value or the multiplier doesn't get set correctly. commit 9dd1520421dcb8c7f36a684f3d2ffb6b42a6671a Merge: d57a258 63bf484 Author: Keith Packard Date: Tue Dec 12 22:52:59 2006 -0800 Merge branch 'modesetting-origin' into modesetting commit d57a25815398ae83eae8bdcb3a1b607760aa30b6 Author: Keith Packard Date: Tue Dec 12 22:48:21 2006 -0800 Elide duplicate modes in pScrn->monitor. xf86DDCMonitorSet dumps all of the DDC-discovered modes into the monitor mode list without checking to see if they are already present. This provides an ever-changing list of modes for outputs which have no DDC and which simply duplicate the monitor mode list. commit 63bf48481d4e5e285fdfe7037ea4150283163a54 Author: Eric Anholt Date: Tue Dec 12 22:42:41 2006 -0800 Correct typo in mac mini hack, and return modes when the hack is unnecessary. commit 41444183b59ed84c09749ca89afbef036d42ec5f Author: Eric Anholt Date: Tue Dec 12 18:08:57 2006 -0800 Replace custom, partially broken DPMS implementation with a generic one. commit 7ed1b05922c07ff45a5794a992fd3d59ab55aa73 Author: Eric Anholt Date: Tue Dec 12 16:03:52 2006 -0800 Fix mac mini SDVO output: write the SDVO[BC] enabled register state twice. commit 9776f6c68b3cdd5585e58e677c1b1318d9aedaf4 Author: Eric Anholt Date: Tue Dec 12 16:02:47 2006 -0800 Flush the plane changes in i830_crtc_dpms() Otherwise, the changes may not have taken effect. commit 54823ac39ce9666099d69196694643f04123cb4d Author: Eric Anholt Date: Tue Dec 12 14:38:08 2006 -0800 Move the SDVO sync detection to after we've turned the port on. commit ec45d7274333cccd20ad080facc8e995ad7b26b0 Author: Eric Anholt Date: Tue Dec 12 13:54:49 2006 -0800 Extend the error state reporting to cover ESR and decode PGTBL_ERR for 945. commit 838af10b85ee8c085c6d2c4fbe18fd90b2be9d3f Author: Eric Anholt Date: Tue Dec 12 13:45:41 2006 -0800 Move PrintErrorState and CheckInheritedErrors code to i830_debug.c. commit 668ae6ce3c3c4b93a58749fd44ef32451adb6f9c Author: Eric Anholt Date: Tue Dec 12 11:39:40 2006 -0800 Set the SDVO port to on before sending the SDVO output on command. commit 91a538beadc17155be395ea2c8109a0958a969bd Author: Eric Anholt Date: Sat Dec 9 15:58:47 2006 -0800 More debugging output for SDVO. commit ce54538b905eb329f45c1b9b15e95ddce4a7927f Author: Eric Anholt Date: Fri Dec 8 08:26:30 2006 -0800 Add a hack for DDC on my Mac Mini. commit c8c1fb64ccecfb88f9923ad65c9898aa44692260 Author: Eric Anholt Date: Mon Dec 11 16:02:29 2006 -0800 Move the overlay mode switch status updates to when we enable/disable crtcs. This should help if we mode switch with randr during video playback, and also simplifies the code by moving the protection all to one place. commit 3f3791ba2ece8e8a7aa3a5676f5f6361862a292c Author: Eric Anholt Date: Mon Dec 11 15:20:15 2006 -0800 Remove remnants of old savedCurrentMode hack. Man, that was gross. commit c21baa5a3044eb66f2518b018dae07eadb989aa1 Author: Eric Anholt Date: Mon Dec 11 15:15:01 2006 -0800 Remove dead remnants of old clone mode support. commit b3865f34669319f449f2da8f87a4eef6ec8e7804 Author: Joshua J. Berry Date: Mon Dec 11 14:46:20 2006 -0800 Include i830.h to get M_T_* compat defines for older X Servers. Not duplicating the defines ensures that we won't let the compat bits slip into the X Server when we move this code over there. commit 24d9521c7ae72e146025f10ea85b07ebd7041716 Author: Eric Anholt Date: Mon Dec 11 09:34:50 2006 -0800 Add error messages for previous silent DRI initialization failures. commit bf43f8ce736d91659c2757fb39b13e63bc5891a4 Merge: 684ea26 9452321 Author: Wang Zhenyu Date: Fri Dec 8 14:17:43 2006 +0800 Merge branch 'modesetting' into crestline commit 94523215127a3458a28d0f1217224a27c8870884 Merge: 75f4df2 fde52de Author: Wang Zhenyu Date: Fri Dec 8 14:15:06 2006 +0800 Merge branch 'modesetting' of git+ssh://zhen@git.freedesktop.org/git/xorg/driver/xf86-video-intel into modesetting commit 684ea26b740d07ec8f6b0d223c1171e70c073bfa Merge: 64269de 6b977f0 Author: Wang Zhenyu Date: Fri Dec 8 14:03:10 2006 +0800 Merge branch 'exa-i965' of git+ssh://zhen@git.freedesktop.org/git/xorg/driver/xf86-video-intel into crestline commit 99f6f84076b25af69dc226e6d4704c74d207e657 Author: Alan Hourihane Date: Thu Dec 7 09:47:34 2006 +0000 Bump to 1.7.3 commit fde52de870c84821ab457e17634c334a10cf71ab Merge: 7dbe6c3 85de8a0 Author: Keith Packard Date: Wed Dec 6 23:40:13 2006 -0800 Merge branch 'modesetting-origin' into modesetting commit 7dbe6c378d1bc0c06ed6be4c1f9ca38ac31a5571 Author: Keith Packard Date: Wed Dec 6 23:39:14 2006 -0800 Move vga restore to end of RestoreHWState. I was having consistent system lockups when the vga restore was first. Moving it to the end has reduced them to an infrequent occurrence (but, alas, it has happened once since). This does not make me happy. commit 28c7002b1cf81e286a083384575d53021d3ce906 Author: Keith Packard Date: Wed Dec 6 23:35:15 2006 -0800 Use DOUBLE_WIDE mode on all hardware. DOUBLE_WIDE mode is needed when the pixel clock is > 90% of the core clock rate. The code guesses what the core clock rate is based on the bus (AGP -> 133MHz, PCI-E -> 200MHz). commit 85de8a05804eaebcd61430793ef5406f196f9a95 Author: Eric Anholt Date: Wed Dec 6 20:26:53 2006 -0800 Include render.h to get SubPixelUnknown define. commit 64269de3c34db047e78b788dc5681abdc009f8aa Merge: 8ddbc26 182d2f5 Author: Keith Packard Date: Wed Dec 6 18:09:28 2006 -0800 Merge branch 'modesetting' into crestline commit 182d2f503a7a1be90d93a4a15059585a564fd3ce Merge: 677c454 6777d80 Author: Keith Packard Date: Wed Dec 6 17:18:58 2006 -0800 Merge branch 'modesetting-origin' into modesetting commit 6777d8044d5cc063698e05afb7a93a58a7a3b64a Author: Eric Anholt Date: Wed Dec 6 17:10:06 2006 -0800 Harmless warning fix. commit c6ce8a3c3355e8a56e86856caa56baf1cd3c0231 Author: Eric Anholt Date: Wed Dec 6 17:07:48 2006 -0800 Reduce dumpregs to X startup, after a mode set, and LeaveVT. While here, remove some other register dumping that is better done by i830DumpRegs(). commit b23dec37b28a76433ad5d537ab508294e843cabe Author: Eric Anholt Date: Wed Dec 6 16:58:24 2006 -0800 Save/restore registers around calls in PreInit with register side-effects. commit d3c21c09e3904b3d32aca7563044194b061ac2fa Author: Eric Anholt Date: Wed Dec 6 16:50:52 2006 -0800 Remove stale i830_tv_pre_set_mode. Replaced by generic dpms hook call. Also replaced by not spamming unrelated ADPA register. At least, it had sure better not be related. commit 9c3e733aaa2068fcb0164577237ed70d177e9b5a Author: Eric Anholt Date: Wed Dec 6 16:36:42 2006 -0800 Save/restore more TV registers. commit d5ec9d2160f47f21a6015c1cc05b57274cbb0471 Author: Keith Packard Date: Wed Dec 6 14:44:40 2006 -0800 Cannot modify DPLL register in output mode_set function. DPLL register contains clock setup, so it cannot be written from the output mode_set function or 'bad things' happen. commit 5d345c13a949caef384a63769d7185885de6d26d Author: Keith Packard Date: Wed Dec 6 13:19:58 2006 -0800 Clean up SDVO multiplier debug output commit 6ee63364f5fabbc5578bcc9ded38c778595f5a6d Merge: 56f7119 b75ecdb Author: Keith Packard Date: Wed Dec 6 12:53:22 2006 -0800 Merge branch 'modesetting' into nonrandr-setup Also, fix buffer overflow in i830_debug.c commit b75ecdb48309a15eb7c52b279c7f8523a95bcd48 Merge: 1cb6311 b3bb10e Author: Eric Anholt Date: Wed Dec 6 11:59:33 2006 -0800 Merge branch 'generic-mode-set' into modesetting commit b3bb10e33e44c78f132d239e30931f97065a9fd6 Author: Eric Anholt Date: Wed Dec 6 11:53:40 2006 -0800 Fix LVDS: Don't change bits in LVDS other than port enable/pipe select. This behavior matches what we did before when LVDS worked. commit 47d07b1073c162ec00a8b173b8b6389dc4adbe88 Author: Eric Anholt Date: Wed Dec 6 10:56:38 2006 -0800 More LVDS fixed mode fixing: use the EDID DTD's blank length. commit 727bf1cbf72362edcbdd68001a3558fd2b2b4eca Author: Eric Anholt Date: Wed Dec 6 10:12:49 2006 -0800 Add missing newlines to new debug output. commit 236c53be5d94798d55219651a6885fee32ce175b Author: Eric Anholt Date: Wed Dec 6 10:10:27 2006 -0800 Fix LVDS fixed mode code after generic-mode-set. commit 1cb6311c1182fe98d2b8d237cef42509c3178f9a Author: Wang Zhenyu Date: Wed Dec 6 16:31:00 2006 +0800 fix typo in checking xf86CrtcScreenInit return commit 56f71194157ef929b62fe34a89c840bd59e56301 Author: Keith Packard Date: Wed Dec 6 00:13:57 2006 -0800 Use xf86 structures for default config instead of RandR. To avoid requiring RandR 1.2 in the X server, use the xf86 Crtc and Output structures as the basis for the default configuration computation (and, eventually, the config-file based configuration as well). commit 6b977f0eca388a295ca7348f5960bd8e0192cf1d Author: Wang Zhenyu Date: Wed Dec 6 13:24:44 2006 +0800 fix Makefile.am commit ffd8aacbe7c72b696ff7257609e3c1d45c057609 Author: Keith Packard Date: Tue Dec 5 19:48:39 2006 -0800 new server APIs are not in server-1.2 (version 7.1.99.2) commit a73649611414cb92697575efa90addfc3cf91cf9 Author: Keith Packard Date: Tue Dec 5 19:47:04 2006 -0800 Capture VGA registers sooner so checks are more informative commit 62fba80d3ea9c185ec8ae1e06c099c02bf844d8b Author: Keith Packard Date: Tue Dec 5 19:43:41 2006 -0800 fix up misleading comment in i830_crt.c about border register commit 041f0029c78620ca1b50e7e5d11f5d022e189641 Author: Wang Zhenyu Date: Wed Dec 6 10:43:29 2006 +0800 Formats fixes We should use card_fmt for src/mask picture, and use dest color buffer format helper. Also fix wrong name for G965 texture formats, and pict_x1r5g5b5 isn't supported by sampler engine. commit 1d94ec7de3387b70815679977cfc5d88200efa99 Author: Eric Anholt Date: Tue Dec 5 18:22:59 2006 -0800 Fix ordering of PIPE[AB]SRC debug output to be (x, y). commit eee23fdd0dadd38a2b80525ec886120150f91077 Author: Eric Anholt Date: Tue Dec 5 18:19:49 2006 -0800 Fix copy'n'paste-o of the ordering of h/v fields in DSP[AB]SIZE. commit 58c247c6de56508b00eadf77b4c145c94134270d Merge: 0b4c3e7 2e8c927 Author: Eric Anholt Date: Tue Dec 5 15:28:21 2006 -0800 Merge branch 'modesetting-origin' into modesetting Conflicts: src/i830_display.c commit 0b4c3e7bff790e1e99ace5036a41e96046335b04 Author: Eric Anholt Date: Tue Dec 5 14:39:47 2006 -0800 Add a bunch of per-register debug code to i830DumpRegs(). commit 7844e576e71c004ed495bbc31f7bbe890d18b8d9 Author: Eric Anholt Date: Tue Dec 5 14:39:09 2006 -0800 Move reg dump from i830PipeSetMode to after we set up the modes with RandR. commit e777d38ce98d7220621b049b09df1deca5a5df42 Author: Eric Anholt Date: Tue Dec 5 10:01:31 2006 -0800 WIP code to move mode set sequencing to XFree86 handlers. It compiles. It definitely doesn't run. commit 2e8c927f9308069a82f25b65bb0c62bc5a156832 Author: Keith Packard Date: Mon Dec 4 14:02:30 2006 -0800 Re-create RandR Crtc/output structures on server regen. RandR structures must be re-created when the server reinitializes, but the driver PreInit function is not re-invoked. Recreate them manually in this case during ScreenInit. commit 583619cdb2b6a469299dd5bf658bf5b51ee999fe Author: Wang Zhenyu Date: Mon Dec 4 15:48:04 2006 +0800 set correct default border color commit f28d5fc30ccf60d72d5832bb6542522dc7f1c463 Author: Wang Zhenyu Date: Mon Dec 4 15:47:31 2006 +0800 fix typo in ps kernel fix corrupt in some subspans commit 677c454469a6223460778033758e384e989cea47 Merge: 16f9a56 8fcf9a8 Author: Keith Packard Date: Sat Dec 2 23:28:38 2006 -0800 Merge branch 'modesetting-origin' into modesetting commit 8fcf9a81179ee8577ddab5e904c58fbfd14cf59c Author: Keith Packard Date: Sat Dec 2 22:58:31 2006 -0800 DOUBLE_WIDE mode for high pixel clock 8xx. Rewrite PLL search. High pixel clock modes on pipe A of an 8xx chip require DOUBLE_WIDE mode. It's supposed to be modes > 180MHz or so, but the board I have requires DOUBLE_WIDE mode for clocks > 108MHz or so. The limit is related to the core clock speed of the chip, which can be found indirectly through PCI config space. None of the possible values explain why this board needs this mode for these relatively low clock rates though. Also, create tables of data for the PLL computation and use them instead of code. I think it's cleaner looking. It is also untested on 9xx. It'll work. Really. commit 81dde11d419c8f9198ab3502d9813d66d0bc6d6d Author: Eric Anholt Date: Fri Dec 1 10:37:19 2006 -0800 Fix copy'n'paste-o from restructure-outputs that resulted in crashes. Our driver private is stored in the bus that we set up, not the DDC device that xf86 code does. commit a504e31f0fefdec802ae403573f52fac3d577b65 Author: Eric Anholt Date: Fri Dec 1 12:49:43 2006 -0800 Don't try to write the read-only PP_STATUS register. Also, don't bother reading the PP_CONTROL register to try to get LVDS status -- that's what PP_STATUS is for. commit f21230d3e1cc5470e8f88404b5d9f1702bec44bb Author: Eric Anholt Date: Fri Dec 1 12:48:57 2006 -0800 Add the [ax]4r4g4b4 source picture formats. commit 8ddbc26b276016b922487f7b1e8997998b655a7d Merge: 93975a5 16f9a56 Author: Keith Packard Date: Fri Dec 1 10:57:16 2006 -0800 Merge branch 'modesetting' into crestline Use new TV output condition (all 9xx except 915g) commit 16f9a56070a01c7ada8e566d9b73fcf7900136e0 Author: Keith Packard Date: Fri Dec 1 10:50:27 2006 -0800 TV output exists on all 9xx chips except for 915G commit 93975a526086432cdeb8d7ead721a862d632c1e7 Merge: 08b6569 e603cd0 Author: Keith Packard Date: Fri Dec 1 10:28:58 2006 -0800 Merge branch 'modesetting' into crestline commit e603cd0c73344ef137d3276b5cfcbcf4df340778 Author: Keith Packard Date: Fri Dec 1 10:08:36 2006 -0800 Leave detected TV status alone when no free CRTC is available. Yes, this means not detecting TV hotplug when two outputs are already running. An alternative would be to turn off one of the other outputs temporarily, but that would cause flashing. Something to consider. commit ec30356d950199903978265076b8a4e3960cf84f Author: Keith Packard Date: Fri Dec 1 10:06:29 2006 -0800 Do output detection before any crtc allocation. Some output detection requires a crtc for load detection, perform all of the output detection before allocating any crtcs so that there will be a free crtc for any load detection. Avoids losing TV detection when two monitors are connected. commit 7642da82781826cb3b45078750cc54d8f592893a Author: Keith Packard Date: Thu Nov 30 23:21:39 2006 -0800 When CRTC is disable through RandR, the mode is NULL. Don't dereference it. Correctly interpret mode == NULL as CRTC disable, make sure the CRTC is disabled in this case. commit de50ca9ed9e78c17be1badec62e35ed5e4d62b05 Author: Eric Anholt Date: Thu Nov 30 17:56:47 2006 -0800 Tristate the clock/data pins during GPIO when released while getting values. While the register is laid out suggesting that you can read a low value while driving the output high, and the I2C spec seems to indicate that you should be able to as well, and on some hardware this works successfully, on the i865 and perhaps some other chips it doesn't. So, if we're not holding the clock or data pin low during GetBits, tristate the pin so that we can successfully read. This fixes i865 analog (VGA) DDC so it successfully sees slave acks. Also, improve the I2C bit-banging debugging. commit 8c44556408601db2be799b5ac5c4da1d92886d31 Author: Eric Anholt Date: Thu Nov 30 15:56:52 2006 -0800 Preserve some GPIO bits that the docs tell us to. commit 28401b25cc5c1afb272e506cef196ba3a1258bd3 Author: Eric Anholt Date: Thu Nov 30 15:45:13 2006 -0800 Add debug code for the bit-banging I2C implementation. commit ff64bc7397cafbec94e388e1625b3a1999f1aca7 Merge: b94b7c4 16e01b1 Author: Keith Packard Date: Thu Nov 30 14:09:31 2006 -0800 Merge branch 'restructure-outputs' into modesetting. Outputs and Crtcs now have a driver-independent representation which should permit generic code to control RandR 1.2 and startup configuration. commit 16e01b117bb7ae90b150dd4f25a887dd895cf473 Author: Keith Packard Date: Thu Nov 30 11:55:29 2006 -0800 Oops. Don't try to use xf86RandR names, use xf86RandR12 instead. Attempts to override functions in core server fail, so use new names instead. commit bcf206ff17c6eca8212db72dd86fcd8fdc0162da Merge: 27ca1c1 2c8c310 Author: Keith Packard Date: Thu Nov 30 11:39:56 2006 -0800 Merge branch 'restructure-outputs-origin' into restructure-outputs commit 27ca1c17aab30670dd1d07e0809fd58cdecfc3b6 Author: Keith Packard Date: Thu Nov 30 11:39:37 2006 -0800 Rename I830 randr functions to xf86 as they are becoming generic. Change function names, create separate i830_randr.h header file to contain definitions. commit b94b7c4bcfdb7ba59ed818f72309b5060a2ab7ee Merge: b6fc8df 25e6e49 Author: Eric Anholt Date: Thu Nov 30 09:15:30 2006 -0800 Merge branch 'exa' of ../xf86-video-intel into modesetting Conflicts: man/i810.man src/Makefile.am src/i830.h src/i830_driver.c src/i830_rotate.c src/i830_video.c commit b6fc8df9a52f5fe1b4d26ae06bc4d48235b44a67 Author: Eric Anholt Date: Wed Nov 29 15:06:32 2006 -0800 Properly detect the GTT size on the G965. In the past, the GTT has always been sized just large enough to map the whole graphics aperture. However, apparently on the G965 that isn't the case, and it is actually 512KB on hardware with a 256MB aperture. This resulted in X not bothering to allocate memory for 256KB that it thought was already mapped into stolen memory, and thus garbage rendering (particularly visible in large video modes that displayed this unallocated memory). The kernel happens to get the right answer by hardwiring a 512KB GTT size already, but that may not be true on future hardware. Instead, we use a convenient field in PGETBL_CTL that's specifically for the GTT size rather than the aperture size, which gets us the answer we want. commit 359dc81c07901665da0f86c573c096fa1661cdd2 Author: Eric Anholt Date: Wed Nov 29 15:01:39 2006 -0800 Revert "Don't allocate stuff in the first 256K of video memory (GATT?)" This reverts commit 997e8c9bb4235cab1fff4738387df9afcbea0a03. The GTT is definitely located at the end of stolen memory. This commit apparently worked around mis-estimation of the GTT size. commit db391e8e4c4d87bfe3ccad0de14dd5b47b69b8fe Author: Wang Zhenyu Date: Wed Nov 29 17:16:46 2006 +0800 shut up warning commit 290f15cd4cda97727ebcaadacbbbf7650278934b Author: Wang Zhenyu Date: Wed Nov 29 17:14:55 2006 +0800 fix alpha blending state commit 3d4edd325f3859c749ee42df102bb4239eac5287 Author: Wang Zhenyu Date: Wed Nov 29 17:05:32 2006 +0800 Add in sf/wm program for mask picture without CA commit a704120b15efae47344a90d972e7f3da64a202a6 Author: Wang Zhenyu Date: Wed Nov 29 16:52:44 2006 +0800 misc cleanup for G965 vs/sf/wm states commit e3c70c68e39183226e498271c44e98ef1b96a681 Author: Wang Zhenyu Date: Wed Nov 29 16:40:15 2006 +0800 WM kernel needs scratch space commit aa515c54f0cfd9025fc38dc4b7938ff17a8a13fb Author: Wang Zhenyu Date: Wed Nov 29 16:37:06 2006 +0800 Setup default border color for our samplers commit b6eba96584bcd2c024f6443d9f3728eb65b234fb Author: Wang Zhenyu Date: Wed Nov 29 16:30:53 2006 +0800 fix vertex buffer size commit 453842c9ff733af45fa665d9db6a35164f45c60a Author: Wang Zhenyu Date: Wed Nov 29 16:24:24 2006 +0800 clean up issue cmd to ring buffer Make it easy to track different part of ring state, and use rectlist primitive instead. commit 18ad7d5cf04081d89a9f978ccc7794116f7c498b Author: Wang Zhenyu Date: Wed Nov 29 16:04:16 2006 +0800 remove wrong scale_units commit 3d5bd0c14eea7951540f7a12eee257428f78e2d1 Author: Wang Zhenyu Date: Wed Nov 29 16:02:16 2006 +0800 Rename exa sf/wm program files Also fix some minors in wm program. commit a06beb5f80f097fac3b718e742742bb32f1c1194 Author: Wang Zhenyu Date: Wed Nov 29 15:47:19 2006 +0800 EXA state mem for G965 Not split offscreen mem for exa, but alloc a dedicated one for G965 states. commit 9e4e7d4fa25a64a2494e7531967599142e60e716 Author: Eric Anholt Date: Tue Nov 28 16:36:09 2006 -0800 Conditionally compile old-server compatibility code in. This also replaces calls to compat code with the real names of the functions, and slips #defines to an i830-namespaced version in when doing compat. The current server version (7.1.99.2) is still left as requiring compat code, since the version hasn't been bumped yet. This also fixes some failures to call the compat code, and some failures to actually compile the compat code. Oops. commit 8d9ba2405d1f1e58a0cfb570e83e9206af8525b5 Author: Eric Anholt Date: Tue Nov 28 15:44:06 2006 -0800 sparse cleanups (use NULL instead of 0 for pointers) commit dbb8135e10e943a4d4e65f95853eeccc764ccf24 Author: Eric Anholt Date: Tue Nov 28 13:21:31 2006 -0800 Remove printing of the XFree86 screen mode list, and some other detritus. commit e8fb40ab1063b18372be2b5996257eb69d3f15c4 Author: Eric Anholt Date: Tue Nov 28 11:17:21 2006 -0800 Replace custom DDC mode list code with a copy of the X Server's. The X Server now has most of the mode helper functions we want, and we can start removing compilation of our copies when the server is new enough. commit 2c8c310bd8a105dbeda5c989dca31cc766eb6bb8 Author: Keith Packard Date: Mon Nov 27 22:18:59 2006 -0800 Driver-independent code tracks num_crtc itself, don't do it in driver. Now that driver-independent code manages array of crtcs, let it track the count and just have the driver compute how many there are in a separate variable. commit c421724d8151d1d4578468abdbe8fe1120e373ca Author: Keith Packard Date: Mon Nov 27 22:15:40 2006 -0800 Move #include "randrstr.h" from i830.h to i830_xf86Crtc.h As part of the separation of driver-dependent from driver-independent code, the interactions with RandR are moving entirely out of the driver, which means the driver shouldn't even know about RandR, while the driver-independent code does. commit e8d1db326388c9a112f2b8e2eff5a81210b8d6e4 Author: Keith Packard Date: Mon Nov 27 12:01:47 2006 -0800 Move crtc/output config to sub-structure. Place crtc/output in separate structure at head of driver private structure. Use this from the config code to make it driver-independent. Still lots of effectively driver independent code that continues to use driver dependent stuff, but that will change. commit 72692ba2e0254460c4f5a8cd476f5748383390ae Author: Eric Anholt Date: Mon Nov 27 11:23:55 2006 -0800 Postpone SDVO DDC bus creation until we've detected the SDVO device. This reduces log noise for those of us with no SDVO devices. commit 5f38bc3e2a685da5c03efa8103a353f79c842aa7 Author: Eric Anholt Date: Mon Nov 27 11:06:50 2006 -0800 Reduce the severity of many informational log messages. commit 85f404bc67d5ab54175c19e75aad406abfcf2133 Author: Eric Anholt Date: Mon Nov 20 09:32:26 2006 -0800 Re-indent ch7xxx driver. commit a0518f5a440630365b1d935b7c2d0725f326ad51 Author: Keith Packard Date: Sun Nov 26 19:44:38 2006 -0800 Remove mode setting from load detect CRTC allocation. To share load-detect CRTC allocation with TV driver, move it to the output driver commit a47c549df036990e29f05bc3df80e1a2ab9f3b3c Author: Keith Packard Date: Sun Nov 26 18:26:26 2006 -0800 Clean up reworked data structure code so the server actually starts. Use i830GeLoadDetectPipe again (instead of missing xf86AllocCrtc). Actually create new Crtc structures. Fix a few other NULL pointer dereferences. commit 2529863a1ade782819d76be2d0dc16e89028c1e3 Author: Keith Packard Date: Sun Nov 26 16:44:17 2006 -0800 Start output/crtc restructuring work. It compiles. Outputs and Crtcs are now split between 'generic' and 'driver specific' pieces in the hope that more code will be able to migrate to the xf86-generic layer. Right now, the code remains tangled together, significant work remains to tease the pieces apart. First the code needs to be made to actually work as-is though. commit 9aca4e207440119f4280b78199a221f85d50c511 Author: Keith Packard Date: Wed Nov 22 15:52:32 2006 -0800 Remove custom configuration code (which was #ifdef'd out). Multi-screen configuration is moving to generic code. commit 850e3652f4d5bb57f3c4ccb9cf29e2c75fecba9d Author: Keith Packard Date: Wed Nov 22 15:36:43 2006 -0800 Note which pipe has failed to be configured for VBlank interrupt commit 659e3db925de91954421f7f33c072576dfefcc4a Author: Keith Packard Date: Wed Nov 22 15:35:59 2006 -0800 Set up maximum screen size for clone instead of panorama. This avoids heading past the 8Kbyte stride limit of DRI so that 3D will be available by default. commit 03c12f866529230df7a1503de61954cd5ade242e Author: Keith Packard Date: Wed Nov 22 15:34:03 2006 -0800 Limit DRI use to cases when pitch < 8Kbytes, not 4096 pixels. 3D rendering pipeline is limited to pitch of 8Kbytes and not 4096 pixels, which rather makes a difference at 32bpp. commit 6781575f734f05547d7d5ceef4116fc157bba44d Author: Alan Hourihane Date: Wed Nov 22 16:49:57 2006 +0000 Be a little more verbose when rejecting modes. commit e065324661ad08b3b359136f48090232f6138959 Author: Alan Hourihane Date: Wed Nov 22 16:49:36 2006 +0000 update port attributes immediately when overlay is on. commit a0a9d1ea2ac9a0c665e5a1de5b8b8358dee3b9b4 Author: Keith Packard Date: Mon Nov 20 17:25:00 2006 -0800 Set configured values for screen virtual size and initial frame. Computation for virtual size and initial frame origin is quite broken in xf86 common code. commit d6a0f917e601ea36643c6ad857756e19d24ecd73 Author: Keith Packard Date: Mon Nov 20 15:17:32 2006 -0800 Enable second SDVO channel. Rework SDVO support so that it can deal with two channels correctly, also save/restore all connected output timings. commit 08b6569dc663ddf38cb36a6875de6d4ab55acac9 Author: Eric Anholt Date: Sun Nov 19 16:15:45 2006 -0800 Enable TV output on Crestline (untested). commit 05202cabbd23f15330b811ae6b8d708ad042bc40 Merge: ee502dd b945a65 Author: Eric Anholt Date: Sun Nov 19 16:14:18 2006 -0800 Merge branch 'modesetting-origin' into crestline commit b945a650e952f98c2d101b71bd3ec0f390478da5 Author: Keith Packard Date: Sun Nov 19 00:54:30 2006 -0800 Fix TV color key. Subcarrier defines were incorrect in header file leaving one of the DDA phases disabled. commit 28224af3d90a1a08d54a865dfaf20184330fe8a4 Author: Keith Packard Date: Sun Nov 19 00:40:46 2006 -0800 Preliminary 945 TV output. Color key is broken. Fixed mode. TV output is generating video with this patch, but the color burst signal is incorrect somehow. commit ee502dd92a3dfccdc2efcfb76fc652694bc89e3b Merge: 15ff17c 2fe6107 Author: Eric Anholt Date: Fri Nov 17 14:57:41 2006 -0800 Merge branch 'crestline-origin' into crestline commit 15ff17c756e42f392306820e3f7ffbdcc56b9892 Merge: 9cc2f33 816fc1a Author: Eric Anholt Date: Fri Nov 17 11:48:53 2006 -0800 Merge branch 'modesetting' into crestline This works for analog, but SDVO output appears to not work yet. Conflicts: src/i830_driver.c commit 816fc1a76a5ac738e41b172ba8f43137c1521328 Merge: 9948d83 7a7bb33 Author: Eric Anholt Date: Fri Nov 17 00:05:53 2006 -0800 Merge branch 'modesetting-origin' into modesetting commit 7a7bb331e10498e5b8ccec58130bb23334d36562 Author: Keith Packard Date: Thu Nov 16 21:19:20 2006 -0800 Don't dereference null DisplayModePtr on disabled output. During initial configuration, outputs which are disabled have null modes. commit 2fe6107ac68e86ed183d8602436633348340678d Author: Wang Zhenyu Date: Fri Nov 17 13:11:36 2006 +0800 Rotation support for 965GM commit c4508c1cadf323e9ef1d0e69dd77d5e841a6a978 Author: Keith Packard Date: Thu Nov 16 21:09:23 2006 -0800 RandR-based initial output configuration. Using pre-init computed RandR information, make reasonable default choices for the output configuration at startup time. Either some preferred size or a size which yields 96dpi is chosen, from which other monitors are set to a similar size. The largest size sets the screen size. This needs to be extended to respect config file settings, but those have not been defined yet. commit 9948d8377d70e898260c12210151b952b3fb8bf1 Merge: 45a27f8 b649f95 Author: Eric Anholt Date: Thu Nov 16 19:47:24 2006 -0800 Merge branch 'master' into modesetting Conflicts: src/i830.h src/i830_cursor.c src/i830_dri.c src/i830_driver.c src/i830_video.c commit 9cc2f3313d77487dea372e6ab32d6d9c06617ae3 Author: Eric Anholt Date: Thu Nov 16 15:12:43 2006 -0800 Replace broken PCI resource size detection with pciGetBaseSize() call. commit 45a27f80e1c783627f570c309e7a853dcc9af0c1 Author: Keith Packard Date: Thu Nov 16 13:38:35 2006 -0800 Remove output options. Let outputs be connected to other crtcs. Output options will be replaced by properties. Permits outputs to be connected to arbitrary CRTCs (within hardware limits). No cloning yet. commit 9aea79d1e954fe4fb5c101edcb7c2d0f706a5c4c Author: Keith Packard Date: Thu Nov 16 11:40:26 2006 -0800 Inverted boolean sense when selecting pipe for CRT detection. Pipes are available when they are not in use. commit 4889b9f33336c92f07aac86d75f50316db6ef81a Author: Eric Anholt Date: Wed Nov 15 15:26:31 2006 -0800 Enable the LVDS if we find it and assign it to a pipe (oops). commit 854ff826c0031a44e874239c0b0a3533f4d9e14b Author: Eric Anholt Date: Tue Nov 14 09:14:24 2006 -0800 Disable setup of the second SDVO device until we fix it. commit d51555fba4e57c059fd184c1e54822d7e5b62a2f Author: Eric Anholt Date: Fri Nov 10 14:40:40 2006 -0800 Fix clock range for single-channel LVDS. commit dd1dcfab0ab0f2d0c25077fa663209e2762f26e8 Author: Eric Anholt Date: Fri Nov 10 11:08:02 2006 -0800 Fill in some of the high bits of mode timings for SDVO. commit 3955f044cfe1d592bcb36c43c539fb4a75840b8d Author: Eric Anholt Date: Thu Nov 9 20:28:46 2006 -0800 Expose the DDC-probed EDID data as the EDID_DATA output property. commit 0f5886689d7ef7dbbef6425d5c855ac6b67d3350 Author: Keith Packard Date: Wed Nov 8 23:19:59 2006 -0800 Create RandR 1.2 objects in I830PreInit. Creating the objects early will allow the driver to use randr structures to select a reasonable configuration. That part has not been done yet. commit 679c7bd82639a09cdce133becb8a08629ce3a4e9 Author: Keith Packard Date: Wed Nov 8 21:39:28 2006 -0800 ignore edited man page commit 81b7b489afa2cab4d8614c64f4906be627f1d07e Author: Keith Packard Date: Wed Nov 8 21:38:00 2006 -0800 Adapt to RandR updates that split object creation from screen association. RandR DIX code is preparing for xf86 drivers that want to allocate RandR objects at PreInit time. This patch adapts to that change without taking advantage of it. commit 81bace0c316c3ed80201a34eca533254d12cd193 Merge: 713c5b0 beb8916 Author: Keith Packard Date: Wed Nov 8 20:23:20 2006 -0800 Merge branch 'modesetting-keithp' into modesetting Conflicts in PipeSetMode were resolved to use the keithp changes that pushed more modesetting stuff into the per-pipe function. Switched availablePipes to num_pipes. Used modesetting default output configuration. commit 713c5b0899428edfea7cea0780244488115dbe1d Author: Eric Anholt Date: Wed Nov 8 19:55:31 2006 -0800 Change the output and pipe "is it on/off" field name to "enabled". commit ff77e9d84f2037b99a8e4ac55da0b0ac92ed6b9b Author: Eric Anholt Date: Wed Nov 8 19:53:31 2006 -0800 Clean up i830_crt_detect_load() a bit more. ADPA might not have been set right in some cases (DPMS-off monitor, for example), and a wait for vsync that the bios does was missing. commit 9b267014b55f49d9362c1d432d6ba19ddd0ad95d Author: Eric Anholt Date: Wed Nov 8 19:39:18 2006 -0800 Go back to only setting up outputs that have a display connected. commit 35ab689bbde5f74752598cd743d735640486b639 Author: Eric Anholt Date: Wed Nov 8 19:35:49 2006 -0800 Fix i830DisableUnusedFunctions after pipe structure change. Using "pipe" instead of the index "i" meant pipe(3) got referenced instead of a nice small integer. Oops. commit b649f95ea6fd3555d073fdbf8f2f035dfe1afd33 Author: Alan Hourihane Date: Wed Nov 8 19:01:25 2006 +0000 Disable some debug message commit 75f4df278e9db360967d77cdba4756cbde622d56 Author: root Date: Wed Nov 8 13:56:32 2006 +0800 855 fix commit f1ff01e31eb8e9dc05190bf1a8b318d4f587f64a Author: Keith Packard Date: Sat Nov 4 00:46:18 2006 -0800 Eliminate operatingDevices member and PIPE_* values. operatingDevices and MonType1/MonType2 duplicate information already stored in the device structures. Eliminate them and replace uses with direct references to the appropriate other data. (cherry picked from 3ab7f9693217d8fe993bdc94c376b219b0082961 commit) commit 0b2d36d4f038c4e8fa08632b6f1368627f010392 Author: Keith Packard Date: Fri Nov 3 23:29:12 2006 -0800 Use pI830->availablePipes instead of MAX_DISPLAY_PIPES everywhere (cherry picked from e4bcec796e80e9fd66ab0c36394f5946915531f1 commit) commit d0ef9e99acb9e999e1b6d3eb76edc6355555043b Author: Eric Anholt Date: Mon Nov 6 18:30:46 2006 -0800 Restore PFIT_CONTROL before turning the LVDS back on in the restore method. commit 94a3731c2b4f2ea2e696a8c87dccc0d214d41e8e Author: Eric Anholt Date: Mon Nov 6 18:26:48 2006 -0800 Move PFIT_CONTROL disable for G965 up before post_set_mode. Also, remove setting of some other random registers that appears to have been spammed in at the same time, and don't try to disable on the I830, before this register existed. commit beb89163d73376e70870e6e2a6b19863f3a058b1 Author: Keith Packard Date: Sun Nov 5 19:06:45 2006 -0800 DSPSURF must be page aligned. Place intra-screen offset in DSPBASE. DSPASURF/DSPBSURF can only take page aligned values, ignoring the lower order bits. So, place the offset for the output within the frame buffer in the DSPABASE/DSPBBASE registers instead. commit 997e8c9bb4235cab1fff4738387df9afcbea0a03 Author: Keith Packard Date: Sun Nov 5 18:56:33 2006 -0800 Don't allocate stuff in the first 256K of video memory (GATT?) Letting the ring buffer or other objects be allocated within the lowest portion of memory appears to trash some memory mapping data; I'm assuming this is the GATT table on the 965. Just marking this out of bounds for allocation fixes this problem. commit 5a355c72614ed77f2000e5ede45f3ff5990c79d9 Author: Keith Packard Date: Sun Nov 5 18:51:28 2006 -0800 Fix CRT output on 965 chipset. A few more register settings are needed to get CRT output working on the 965 chipset, in particular the the SDVO/UDI clock multiplier register needed to get set to the default value (3). No, I really don't know what this does, but it does get the CRT running at a wide range of sizes. commit 49a6bea7d969dbfd1dd542c0c3e02abc330d6850 Merge: 64447c7 fbb376b Author: Wang Zhenyu Date: Mon Nov 6 10:25:23 2006 +0800 Merge branch 'master' into crestline commit 68c3185046b27ab936ca6c92b924b443b3cd6fce Author: Keith Packard Date: Sun Nov 5 13:30:32 2006 -0800 Avoid crashing when disabling sdvo output. XXX commit 15ef08046bcc3e746453301379f7c5d1bf929ee1 Author: Keith Packard Date: Sun Nov 5 13:29:56 2006 -0800 Move remaining pipe mode setting logic to i830PipeSetMode commit 7fcb555735a58e19ccc10875b211402983170a87 Author: Keith Packard Date: Sat Nov 4 00:52:21 2006 -0800 Rename availablePipes to num_pipes commit 3ab7f9693217d8fe993bdc94c376b219b0082961 Author: Keith Packard Date: Sat Nov 4 00:46:18 2006 -0800 Eliminate operatingDevices member and PIPE_* values. operatingDevices and MonType1/MonType2 duplicate information already stored in the device structures. Eliminate them and replace uses with direct references to the appropriate other data. commit e4bcec796e80e9fd66ab0c36394f5946915531f1 Author: Keith Packard Date: Fri Nov 3 23:29:12 2006 -0800 Use pI830->availablePipes instead of MAX_DISPLAY_PIPES everywhere commit b7262a9a9110dac66e1a92c39dcb3ab59d95d081 Author: Keith Packard Date: Fri Nov 3 23:24:07 2006 -0800 Finish removing persistant vbe data commit 4625073244d4f521a07e12adcf0609e85658acbe Author: Keith Packard Date: Fri Nov 3 23:23:38 2006 -0800 Oops, martian memset of randr modes pointer commit 719ad68515be9b996a6314de5448843de1146b88 Author: Keith Packard Date: Fri Nov 3 19:41:41 2006 -0800 Use VBE only temporarily to fetch BIOS rom image (cherry picked from 6a9386651785afc70a29e355255e8295b321f28e commit) commit 27df2ff7908ea7ea2943a5f3445e12dbc24d97c9 Author: Eric Anholt Date: Fri Nov 3 15:55:10 2006 -0800 Report pipe status (and status mismatches) in i830DescribeOutputConfiguration() commit ecbe73b940b2d642115de4b73c2f757eb46ff956 Merge: 561af00 9681602 Author: Eric Anholt Date: Fri Nov 3 15:59:59 2006 -0800 Merge branch 'modesetting-origin' into modesetting Conflicts: src/i830_display.c commit 561af007974b8cdad1eea907fb73ed9d430c21ac Author: Eric Anholt Date: Fri Nov 3 15:26:14 2006 -0800 Add support for load-based CRT detection. commit e416b426d83de031441ada7a77b6bd66cec8b5c9 Author: Eric Anholt Date: Fri Nov 3 15:25:41 2006 -0800 Print out modelines as info, not error (which had been used for debugging). commit 282a9e073ea985cbf0d0f3f296d593af1426bad5 Author: Eric Anholt Date: Fri Nov 3 13:46:09 2006 -0800 Don't memset the modes pointer on init, which was dereferencing NULL. commit 9681602177124e84a817a1e1d428f1779f2a45c9 Author: Keith Packard Date: Fri Nov 3 12:55:25 2006 -0800 Create I830PipeRec to hold pipe-specific data. Remove unused I830 members. I830 contained six parallel arrays for pipe-specific data; these have been moved to a I830PipeRec structure instead. I830 also contained several unused members: unsigned int bios_version; Bool newPipeSwitch; Bool fakeSwitch; int fixedPipe; These have been removed, along with the code that set them. commit 0510671a6c5233468ac20f0ec8096e084df03ce6 Author: Eric Anholt Date: Fri Nov 3 10:58:23 2006 -0800 Fix a pasteo in I965 register restore. commit 2c9ab6e0594769274f2dbcdf7c00fe297fc385d5 Author: Keith Packard Date: Thu Nov 2 13:44:55 2006 -0800 set the v_sync_off_high to zero. XXX should check docs commit 56f6d4f1bb67f447500af3f4f7fa557c3e887baa Author: Keith Packard Date: Thu Nov 2 13:42:17 2006 -0800 Disable the panel fitter when not using it. Cleans up SDVO DVI output. The panel fitter appears to exist on the 965 hardware (at least) and causes troubles with DVI output over SDVO when enabled. This patch checks to see if the panel fitter is pointing at the pipe being configured and disables it unconditionally in that case. The LVDS driver will configure it correctly if necessary afterwards. commit f22d9bcc25aea19ba38d35282367b591fd1b7ca0 Author: Keith Packard Date: Thu Nov 2 13:34:45 2006 -0800 Add another couple of new registers commit a9eac38bcdb49df2ce1122b49bd8b1eb19e8cae5 Author: Eric Anholt Date: Thu Nov 2 13:24:54 2006 -0800 Remove duplicated register defs that were just added. commit 7887c76062b7c79e14fb8e4f13486aa592dcbce8 Author: Eric Anholt Date: Thu Nov 2 12:27:21 2006 -0800 Add airlied's I2C code, ifdeffed out. I've gone back to compare our behavior to it several times, so I'll just keep the code in tree for now. commit 87b15cfbf762468d4b8728b3e7a39c76654017de Author: Eric Anholt Date: Thu Nov 2 11:30:21 2006 -0800 Remove dead specifiedMonitor field. commit 2636d68663a02f6d9eaf36971706b67036ebf56c Author: Keith Packard Date: Thu Nov 2 11:57:11 2006 -0800 Dump more registers for debug purposes commit 786ec54c4c1540f4aced63ef21d567c3b9f3282e Author: Keith Packard Date: Thu Nov 2 11:56:50 2006 -0800 Add a few more registers from the 965 spec commit 85e32ad2dadcce1134fcadb14ece8ff30f3925f2 Author: Keith Packard Date: Thu Nov 2 11:56:12 2006 -0800 ch7xxxSaveRegs receives real type instead of void * commit ffbd6ca09bc2300bf967d7c248a559d85b8706e0 Author: Eric Anholt Date: Wed Nov 1 13:05:44 2006 -0800 Remove dead VESARec struct. commit 97c3a1b2421031e41f0b2b1630fde1dc4262d264 Author: Eric Anholt Date: Wed Nov 1 13:04:08 2006 -0800 Remove the refresh rate appended to some mode names. This gets the SDVO and CRT outputs I have to have at least 1 common mode according to RandR. commit 7971c401554c218c84a8c45335c9b31bbccfece7 Author: Eric Anholt Date: Wed Nov 1 12:42:56 2006 -0800 Attempt to pull monitor physical size information out of DDC EDID data. commit fb94c1210966f7875e5f034f10ea31c06c502c3a Author: Eric Anholt Date: Wed Nov 1 12:23:50 2006 -0800 Move mode lists from per-pipe to per-output. This should let RandR do the right thing in exposing the modes to userland. As a side effect of getting this working, the SDVO pixel clock range code was fixed and the mode valid tests for various outputs got extended. Also, LVDS grew a get_modes for the fixed panel mode. Note that we now no longer do automatic enabling of outputs at xrandr -s 0, hotkey, or VT switch. That will be left to generic RandR code later. Also, generic modes and user-defined modes are once again not validated into the lists, so this is a regression there. commit f30d7f912f36b110c3af7dc795e35456593781ab Author: Eric Anholt Date: Wed Nov 1 11:50:51 2006 -0800 Update for the move of RandR phyiscal size information. commit 64447c7a059775e7ea8649f4714df7565e932c60 Author: Zou Nanhai Date: Wed Nov 1 14:36:20 2006 +0800 walk around to VBIOS bug in Crestline B0 commit 7195dfabd56239f08cdd8175a2ef3a66ef9600de Author: Eric Anholt Date: Tue Oct 31 17:10:08 2006 -0800 Give each output a get_modes function and expose those modes through RandR. The get_modes should return the probed modes only. The driver should then append to the list (for example, compatible modes listed in other outputs, or standard VESA modes) to create the list to expose through RandR. That isn't done yet. commit cc3728be2481637dda321d3bc2e4e89a220699cd Author: Eric Anholt Date: Tue Oct 31 15:00:36 2006 -0800 Add compat definitions for M_T_PREFERRED and M_T_DRIVER for older X Servers. commit a71f283650e8cb7b760e5a53c4db79202c4cc5c4 Author: Eric Anholt Date: Tue Oct 31 14:46:23 2006 -0800 Connect output detection up to RandR. commit 68cef9f4e028755bbf3e1862da2ef47d46ddaa6a Author: Eric Anholt Date: Tue Oct 31 14:32:00 2006 -0800 Move output connection detection to a per-output method. This will be used by RandR, and should let us clean up some of the initial display configuration, hopefully. Also, analog hotplug-based detection is now enabled on G965. commit 9fd719fce27f916ab5120f6e1234affa14eaed9d Author: Eric Anholt Date: Tue Oct 31 14:29:44 2006 -0800 Move SDVOB_PRESERVE_MASK next to SDVOC_PRESERVE_MASK. commit 4f5d4d8870fc2784192f95a561163cf4fc8737ac Author: Eric Anholt Date: Tue Oct 31 13:37:23 2006 -0800 i830SetLVDSPanelPower is now a static function in i830_lvds.c, so remove it. commit 49bbdf16c02107c08169f8d2b6e9c6dbd7d8cd95 Author: Eric Anholt Date: Tue Oct 31 10:44:45 2006 -0800 Fix many inconsistencies in the SDVO code compared to the spec. Also, fix some struct padding so that the right bits are sent out. commit e7d546cac06767ec58325396a3bb5780b2257c53 Author: Eric Anholt Date: Mon Oct 30 11:24:43 2006 -0800 Remove some dead code from BIOS modesetting. commit 2ca57040b0cd24ad3dbe693789091e28be4e69f8 Author: Eric Anholt Date: Mon Oct 30 11:19:19 2006 -0800 Remove GetBIOSVersion(). This info hardly useful now that we don't use the BIOS for mode setting. commit 837b2f632062bc29268f109895a577bd90cabd6d Author: Eric Anholt Date: Mon Oct 30 11:17:55 2006 -0800 Warning fix. commit bca9e6ccbd14eb8f2f103e8e64b28a623113d494 Author: Eric Anholt Date: Mon Oct 30 11:17:27 2006 -0800 Remove SetPipeAccess and now-unnecessary VBE reinit. commit 819a47b27cd4728feb269a08be32403304993ffa Author: Eric Anholt Date: Mon Oct 30 09:50:33 2006 -0800 Use the new fields for SDVO pixel multiply on the G965. This should fix display at resolutions/refresh rates in a different multiplier class than the console display (generally, high resolution modes). commit 71545db4614cfc4650acc4325912474e777c3b36 Author: Eric Anholt Date: Mon Oct 30 09:46:10 2006 -0800 Return and use valid status bits for i830_sdvo_get_trained_inputs(). commit c357eca10ca1c535d305e1f3028471a912ae4102 Author: Eric Anholt Date: Mon Oct 30 09:44:55 2006 -0800 Clean up whitespace in i830_randr.c. commit fbb376bd1a4daad4c86e349df98438989ce173f1 Author: Wang Zhenyu Date: Mon Oct 30 14:15:12 2006 +0800 Bug 8594: Fix Xv hang with G965 commit c0ee50c4ee5ff2c594fdf60c9cb8b952e25644de Author: Thomas Hellstrom Date: Fri Oct 27 19:13:33 2006 +0200 Add support for the new DRM memory manager. Some code are duplicated with the new libdrm. Once this code has been released with xserver, it can be removed. See the man page for new options and backwards 3D driver compatibility. commit 25e6e497824a23eb231fc6fd6e483f601d612cee Author: Eric Anholt Date: Thu Oct 26 15:47:49 2006 -0700 Major cleanup of 3D invariant state, fixing hangs with rotation and render. Now, the generic invariant state is always set while the X Server is active, and happens automatically when the X Server grabs the DRI lock. More 3D state is moved to the generic code. Then, the 3D consumers (video, rotation, render) set last_3d to their enum entry, and can update their own invariant state when another consumer was active. commit 0bdcce2e4541c6e441c44aad49254ad3093cedb2 Author: Eric Anholt Date: Thu Oct 26 14:30:46 2006 -0700 Note alignment requirement for i915 3D (texturing). commit c3666a968b1cfac61b7867874d5fbe2acd894720 Author: Eric Anholt Date: Thu Oct 26 14:30:25 2006 -0700 Don't write unused values beyond the end of scale_units array. commit 3ab9f5a4a8cd62c8a8c2a09d3d105adbe815a83d Author: Eric Anholt Date: Tue Oct 24 00:26:09 2006 -0700 Move vbeInfo out of the driver struct to the one place it's used. commit df14838eb5d0a056f663d9f12bd8b5c25cf97330 Author: Eric Anholt Date: Tue Oct 24 00:18:33 2006 -0700 Remove dead memsize reporting. The calculation no longer made sense, as we don't use the BIOS for mode selection. commit 3a6104ab89b159241845314ccf88fa62da14cf7d Author: Eric Anholt Date: Mon Oct 23 19:15:30 2006 -0700 Remove disabled I830DetectMonitorChange(). This used to be called when switching back in to X. It might make some sense to detect monitors at this time (it happens to occur at resume time, when monitors are likely to have changed), but it should probably live in either userland policy with RandR 1.2 or RandR 1.2 XFree86-DDX generic code. commit 88c12f577f80fa132ec45cdf456d8060f2ece4fd Author: Eric Anholt Date: Mon Oct 23 18:57:57 2006 -0700 Move LVDS initialization and blacklisting damage to the LVDS support file. commit 2631014e9d5b2e64908ea413729eb5fd819b17fc Author: Eric Anholt Date: Wed Oct 25 12:21:44 2006 -0700 Clean up the SDVO code. The main change is to send SDVO commands using data passed into the send command function, and receive responses into memory passed into the read response function, rather than stuff things in/out through dev_priv->sdvo_regs. This lets us use structures to represent some arguments, which results in a nice cleanup (and 100% fewer arguments named magicN as a side effect). Also, the mode set path is changed to not do any preferred input timing work. We weren't doing anything legitimate with the results, since we didn't modify the CRTC timing appropriately, so now we just stuff the CRTC timing into both and hope for the best. This should probably be revisited later. commit ddb986e54f5320359abac06f512f2d3f446872db Author: Eric Anholt Date: Tue Oct 24 17:47:58 2006 -0700 Nuke trailing whitespace in SDVO code not already cleaned up. commit cd2f0d948a6cae61b0d77d2c7184ed8d695be8c3 Author: Eric Anholt Date: Tue Oct 24 17:47:47 2006 -0700 Clean up SDVO code, moving the private structure internal and cleaning up caps. All the SDVO code should now be in lower case rather than StudlyCaps. This also adjusts the I2C setup to create a bus per SDVO output we set up. The previous setup with shared buses was failing in some circumstances, which is probably due to the lack of refcounting in xf86i2c.c. commit cd9c6e29146e1debaba4b0b9ad0d241f07bdbc14 Merge: c5cca4c eec5580 Author: Keith Packard Date: Tue Oct 24 16:53:46 2006 -0700 Merge branch 'modesetting-origin' into modesetting commit eec5580cefffc293bf547372ab63b2fedaef4a83 Merge: 53c28b3 a91c0cb Author: Eric Anholt Date: Mon Oct 23 14:52:55 2006 -0700 Merge branch 'overhaul' into modesetting commit a91c0cbab5de51885bfce7c7dce76f82c1b19553 Author: Eric Anholt Date: Mon Oct 23 14:30:38 2006 -0700 Add work-in-progress integrated TV-out support. This is the TV connector on board for the 915GM and 945GM. It is currently not hooked up to output initialization as it's entirely untested. However, I think this is a reasonable starting point for getting TV-out actually working. commit 7d67324fa3a5b5cf0227550316c366752fe4abfb Author: Alan Hourihane Date: Mon Oct 23 17:29:17 2006 +0100 Add some MergedFB checks for accelerator limitations commit 20d263805a365be548279758bc39d027d6e56d63 Merge: 8548fa5 5ac927d Author: Alan Hourihane Date: Mon Oct 23 14:24:41 2006 +0100 Merge branch 'master' of git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit 8548fa53746c9886eccfb67d022136471d8f3316 Author: Alan Hourihane Date: Mon Oct 23 14:23:29 2006 +0100 Fix manpage to report 8160 instead of 6144 for LinearAlloc. commit 5ac927d6f05ba6f9608d7e758cbac66e8b3a9db1 Author: Michel Dänzer Date: Tue Oct 17 13:27:40 2006 +0200 Don't crash if SetCursorPosition is called with pScrn->currentMode == NULL. This allows the driver to work with servers that don't have the fix for this that was only recently pushed to git. commit 8149681f2eac0af3b70a9457c5204e17da56142b Author: Eric Anholt Date: Mon Oct 16 16:51:04 2006 -0700 Add a per-output mode-valid method. This is currently disconnected, but will be used in more overhaul work. This should be where any output limitations, such as clocks, resolution, scaling limits, or other options, are validated. Other limitations, such as chipset resolution limits, CRTC clock limits, etc. should be elsewhere. commit c5cca4c20ae6b519e3b021a9d90809c1b3d1facb Author: Keith Packard Date: Fri Oct 13 15:31:43 2006 -0700 Advertise textured video adapter first commit adae75ef2f8a655a699e982ca8f26b934dbe950a Author: Alan Hourihane Date: Fri Oct 13 17:10:27 2006 +0100 Make VIDEO_DEBUG into a configure option commit 1d4cfaa391ac41099de11b8f3b21e5eb56543909 Author: Alan Hourihane Date: Fri Oct 13 13:55:10 2006 +0100 Bump to 1.7.2 commit cd9e51cd3ab0b36d2f97dfc6d8850dafe169c221 Author: Alan Hourihane Date: Fri Oct 13 13:54:31 2006 +0100 Ugh. Turn off debugging. commit 334aa062c333f2c59bc40e1b9239d3ea71c88a8f Author: Alan Hourihane Date: Fri Oct 13 12:59:30 2006 +0100 Bump to 1.7.1 commit 8045a7a0af1b276cd7f46ce99d034fd5d503e67c Author: Alan Hourihane Date: Fri Oct 13 12:53:53 2006 +0100 Fix bug #8553 & #8542 - suspend/resume regression from 1.5 driver commit 6596333b077a692c669f8cb4ae32e145f8da6731 Author: Alan Hourihane Date: Fri Oct 13 12:48:16 2006 +0100 Fix some warnings commit 1838671476875e9f5b3dde235eacf9fb43afb66c Author: Eric Anholt Date: Tue Oct 10 12:41:01 2006 -0700 Only disable the output when marked disabled. Also, remove a couple of dead variables. commit 4198f1216eb13b30d1e92d4395e98861f4324c38 Author: Wang Zhenyu Date: Tue Oct 10 15:50:10 2006 +0800 Mark current ps kernel is experimential with little test. commit d485c1f2de11db92b515690fbe38b6aeb6207605 Author: Wang Zhenyu Date: Tue Oct 10 14:11:35 2006 +0800 Use sf_prog.h instead commit 2591c1fcf15608d96031be4760cf08534461ca34 Author: Eric Anholt Date: Mon Oct 9 14:20:49 2006 -0700 Fix LVDS restore path, and move pipe assignment for outputs to the right place. commit 09e3d10b0ff69d180467fa9099d12da08e4f681b Author: Eric Anholt Date: Mon Oct 9 13:09:18 2006 -0700 Add a function for describing the output connection configuration. commit 317cc119c575650c1aa8bf992a0f42bdfffcd7ba Author: Eric Anholt Date: Mon Oct 9 11:49:18 2006 -0700 Move per-output mode setting code to per-output methods. This is not a very clean interface, as a number of outputs require tweaks to the DPLL registers. When possible, the DPLLs are just adjusted in the per-output post_set_mode, which happens just after the DPLL is enabled. However, this seems better than the previous method of having all outputs programmed in the same function. commit 53c28b3980d2682de830e8f86553ccad71527ac1 Author: Adam Jackson Date: Sat Oct 7 11:18:26 2006 -0400 Expand the check for AOpen Mini-PC. Just match on subsystem vendor, don't bother inspecting the subsystem device ID, since apparently they're all busted. commit bf3820f1f505649ac0730add23d97d6de3f6d22c Author: Keith Packard Date: Fri Oct 6 21:57:26 2006 -0700 Compute LVDS resolution from server DPI and native panel size. I was unable to find the native LVDS panel physical size in the BDB information. I would prefer to report accurate information through RandR if possible though. commit c7a23908a0ef45b14b438f656a5f15582bfcbc1c Author: Alan Hourihane Date: Fri Oct 6 13:35:39 2006 +0100 Fix server regeneration problem mapping the aperture commit d649fb0d964a9b40b8e04314b5fc14bbbfd41bc3 Author: Keith Packard Date: Thu Oct 5 22:46:07 2006 -0700 Don't require MonitorLayout when two monitors are plugged in. With randr12 working, we can just leave the second monitor off for now. commit 9bb7736ab36f172db58703c4664bb1b0cd7f80c3 Author: Eric Anholt Date: Thu Oct 5 16:02:02 2006 -0700 Remove checks for output privates in various bits of code. Now, the output is only set up if it fully initializes, so it will never exist if the private it requires doesn't. commit ada8f62da263d1e93e22df4e0b1149bf1dbe24d4 Author: Eric Anholt Date: Thu Oct 5 15:55:07 2006 -0700 Give each output type an init method in its file, making other methods static. commit 0a5504e59f90abecedd81a8435b88a60fe098f29 Author: Keith Packard Date: Thu Oct 5 09:11:29 2006 -0700 Fix DPI at startup in RandR 1.2 code. Use requested monitor resolution to compute the appropriate screen size when resizing the screen during RandR initialization. commit 4ac81d58b7e0fbffbb4981deffe6a576be821a9b Author: Keith Packard Date: Wed Oct 4 23:22:52 2006 -0700 Remove mode origins, add preferred mode count. Just tracking changes in the 1.2 protocol spec. commit 103b4edce7859ddf58f3e1fadeb427a5e85c7acd Author: Eric Anholt Date: Wed Oct 4 15:00:19 2006 -0700 Move the save, restore, and DPMS per-output settings to per-output files. commit 16988b27258acfe3d56fc2415aa9ade1ae8d03a9 Merge: cc4148e 5a06000 Author: Keith Packard Date: Wed Oct 4 18:44:43 2006 -0700 Merge branch 'modesetting-guitar' into modesetting commit 5a060002487e16c53dc96e32af72cd1bfcf6a227 Author: Keith Packard Date: Wed Oct 4 18:43:07 2006 -0700 Add mode origins for randr commit 07cdc60be8ebe5d0c21149f3cd2aeb8fed05022a Author: Alan Hourihane Date: Wed Oct 4 11:05:30 2006 +0100 Fix bug #5795, VT switching fails because of a bad test on some platforms. commit 8da10d15f84ccc992b828546af5ba0d848e7263e Author: Keith Packard Date: Tue Oct 3 22:00:14 2006 -0700 Enable XV_PORT attribute even when not in Clone mode. As Clone mode is now something that can change after server startup, always enable the XV_PORT attribute as we cannot change the list of reported attributes. (cherry picked from 1bc1cedbcdf6ea4d2a3e8b07b553ac50b3c126f4 commit) commit cc4148e25dc226cb1365e090db21f01b77cb3cbe Merge: 1bc1ced 3e6f81f Author: Keith Packard Date: Tue Oct 3 22:00:41 2006 -0700 Merge branch 'modesetting-origin' into modesetting commit 1bc1cedbcdf6ea4d2a3e8b07b553ac50b3c126f4 Author: Keith Packard Date: Tue Oct 3 22:00:14 2006 -0700 Enable XV_PORT attribute even when not in Clone mode. As Clone mode is now something that can change after server startup, always enable the XV_PORT attribute as we cannot change the list of reported attributes. commit 33629ed304b64e45d5640397bd1807c5a98907d1 Author: Keith Packard Date: Tue Oct 3 09:39:22 2006 -0700 Always register list of modes for outputs, even when disabled. commit 3e6f81f70f65a5ba6b5c3a4e0eeaf67776a5f54d Author: Eric Anholt Date: Mon Oct 2 09:53:57 2006 -0700 Move cursor base address register setting to a separate function. commit f337eea9e73cbf5c71d07df50d2e5b661a1f34cf Author: Alan Hourihane Date: Mon Oct 2 11:16:42 2006 +0100 silence warning commit 2b9bdd8a4021231e4b5f4c5831a46c9ff1e38081 Author: Alan Hourihane Date: Mon Oct 2 11:12:23 2006 +0100 bump to 1.7.0 commit eca082ca0fec12973a4dbb0106b841136b5b6cdb Author: Alan Hourihane Date: Sat Sep 30 13:44:43 2006 +0100 Missing gamma bit commit cece9a455b54ab184a3277c164ee6dfa65b70f48 Author: Alan Hourihane Date: Sat Sep 30 13:27:27 2006 +0100 Fix issues with Xv locking up the engine. bug #7915. commit 2013b839de3733fd12becb2cc3c1daadde329eb4 Author: Michel Dänzer Date: Thu Sep 28 13:49:44 2006 +0200 Always call I830UpdateXineramaScreenInfo() unconditionally, and document why. commit 92c5020bbd31e02c7224798a8f094d237afa19a0 Author: Wang Zhenyu Date: Thu Sep 28 13:55:52 2006 +0800 Fix picture's transform checking commit 518802843284973f1f86132afd805c0e662e1ba6 Author: Wang Zhenyu Date: Thu Sep 28 11:15:33 2006 +0800 Fallback in mask picture for now Do it later after finish wm kernel program. commit 25ff5baad95c205c7c690da72fc0f252b3ed9289 Author: Wang Zhenyu Date: Thu Sep 28 11:09:52 2006 +0800 Fix compile, add wm header file. commit c3a49b5123d094280b5ff358ceef961958319ce4 Author: Wang Zhenyu Date: Thu Sep 28 10:36:00 2006 +0800 Add simplest wm kernel program for no mask picture composite This is a try to use new gen4asm language, and will finish composite program for mask picture with or without CA case later. commit 6ea16bf6b06c8b3aed4d2c98679ab28304d1b56c Merge: fdb6de6 b970166 Author: Eric Anholt Date: Wed Sep 27 16:38:01 2006 -0700 Merge branch 'master' into modesetting This reverts most of the mergedfb code. This will instead be done in device- independent RandR code. Conflicts: src/Makefile.am src/i810_driver.c src/i810_reg.h src/i830.h src/i830_cursor.c src/i830_driver.c src/i830_modes.c src/i830_video.c commit fdb6de663579d3b9f31bf9e8a93430b8505ca73f Author: Eric Anholt Date: Wed Sep 27 13:59:41 2006 -0700 Re-disable broken load-based CRT detection. commit 1407a42c7378706644fd8be554b43b0e7b581011 Merge: 25890ec 4bd3b89 Author: Eric Anholt Date: Wed Sep 27 13:33:23 2006 -0700 Merge branch 'randr-1.2' into modesetting commit 25890ecda9fd00fad9bc53dea83fc58e0013fcdf Merge: 965609f 117ff04 Author: Eric Anholt Date: Wed Sep 27 13:33:17 2006 -0700 Merge branch 'acpi-hotkey' into modesetting Conflicts: src/i830.h src/i830_driver.c commit 117ff04b504578a24dff70659e2db1b81aaa1177 Author: Eric Anholt Date: Thu Sep 21 17:03:34 2006 -0700 Attempt to make the ACPI hotkey support a little more modesetting-compatible. Previously, we watched for the BIOS to have changed the layout, and repaired the resulting configuration. Now, we request that the BIOS make no changes, but leave a note in a register for when the key has been pressed. When we notice this, we reprobe monitors and turn on/off the things we find. This is a temporary solution until we can get the hotkey hooked up as an input key to external applications to control the change using RandR 1.2. It is also untested as neither of my laptops do anything with the hotkey. However, this code does result in many fewer BIOS calls. commit fe691953f08b4d299295f91450412404ba42810b Author: Michel Dänzer Date: Thu Aug 31 18:35:10 2006 +0200 Store viewport limits of both pipes in SAREA. This allows DRI clients to determine which pipe they should synchronize buffer swaps of each window to. commit 06c5f7bd076e9ba4b925e061a40b837714bc8267 Author: Michel Dänzer Date: Wed Aug 30 19:45:33 2006 +0200 If the DRM can handle it, enable vertical blank interrupts for both pipes. commit 89cbc6e215a5f313ccc17370424c35630cf75892 Author: Michel Dänzer Date: Thu Aug 24 10:30:27 2006 +0200 Only enable the IRQ after DRIFinishScreenInit. This makes sure we've been assigned a context ID, so the interrupt context won't mess things up if it grabs the HW lock. commit 185df8a18102eea79b8c8e11304dfee148ac2002 Author: Wang Zhenyu Date: Wed Sep 27 16:48:43 2006 +0800 Add mask sampler state commit 1422d4f04ac2d57899eee91f6522f8670f7263da Author: Wang Zhenyu Date: Wed Sep 27 13:54:14 2006 +0800 change some src sampler states sampler for mask should also be set up, and fix default border texel. commit 6614b4bda2e079fd1e56e0825894481b80e2df58 Merge: d6ca9fe b3ddcf3 Author: Alan Hourihane Date: Mon Sep 25 12:04:01 2006 +0100 Merge branch 'master' of git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit d6ca9feb78a9211758510751bbf47013caabff49 Author: Alan Hourihane Date: Mon Sep 25 12:03:27 2006 +0100 Fix bug #7943 where video flickers when changing attributes. This code was a leftover from testing lockups and shouldn't be needed anymore. commit 52a4f2a02b8f38108bfa866bf74b1596b8125512 Author: Wang Zhenyu Date: Mon Sep 25 14:35:51 2006 +0800 Add file for i965 exa composite This does not include ps program, which will be added in g4a form. commit f272f0d811f9ee059e8f8617a516e6c8bff917a1 Merge: ff202f8 b3ddcf3 Author: Wang Zhenyu Date: Mon Sep 25 14:15:21 2006 +0800 Merge branch 'master' into exa commit 4bd3b89c73b6c5aa9b0eb553ad5d553ee0e8a489 Author: Keith Packard Date: Sat Sep 23 16:41:38 2006 +0100 Oops, duplicated CRT-redetect code. commit c34490bbda6604a21809d15c798607806fa6c725 Author: Keith Packard Date: Sat Sep 23 12:00:43 2006 +0100 Construct default monitor description for hotplug non-DDC monitor. When detecting a monitor that doesn't support DDC, construct a default monitor with "sensible" values instead of using whatever the builtin LCD screen uses. Clearly we need a way to set the monitor parameters when we cannot detect them. commit 965609f6fa63e28e5a28128f5bc44f8c4d7b9f68 Author: Eric Anholt Date: Fri Sep 22 09:51:45 2006 -0700 Restructure i830_bios.c so we don't leak a copy of the BIOS per generation. commit c52242c22779a51aa12b18a7a589080ce44c8484 Author: Eric Anholt Date: Fri Sep 22 09:41:07 2006 -0700 Remove some dead code related to clock ranges. commit c2446be9b444b16c95f78dab17bf130f9f491ee2 Author: Eric Anholt Date: Fri Sep 22 09:38:11 2006 -0700 Remove the GetDevicePresence BIOS call which just printed BIOS information. Because we aren't using the BIOS to set modes any more, what the BIOS thinks is present is probably even less important than before. commit b6ba268d0d5f22c6a18ce45416452fce83438620 Author: Eric Anholt Date: Fri Sep 22 09:31:37 2006 -0700 Remove the no-longer-connected VBERestore option. commit 20956a5d6f1eb518717a680e58938f31461ca5e4 Author: Eric Anholt Date: Fri Sep 22 09:27:30 2006 -0700 Remove unused display{Attached,Present} fields. commit 2cd28be71472d67956f47c7d49283ebabefa089a Author: Eric Anholt Date: Fri Sep 22 08:55:55 2006 -0700 Remove empty SAVERESTORE_HWSTATE code. commit ff202f8e2ae4117b464c94047001023d5d0531cc Author: Wang Zhenyu Date: Fri Sep 22 15:02:19 2006 +0800 Fix a typo to mark sync for XAA. This should fix the scrolling screen corrupt in XAA method. commit d87d1f5bb0475c6f651fcb7e2cab2a7d46edcc69 Author: Keith Packard Date: Fri Sep 22 02:20:35 2006 +0100 Remove BIOS from non-BIOS related names. Lots of names included BIOS for no apparent reason; as we try to eliminate BIOS calls from the driver, these only serve to confuse us. (cherry picked from 8e5d280d94ad3d3ba3c75871c17abec9da62ed34 commit) commit b3ddcf3348365873aed4a2b8b2750b330fb4cf26 Author: A Costa Date: Thu Sep 21 23:18:43 2006 +1000 Typo fix in man page (Debian bug #364559). commit 4820caf46e050761d9b347b8a440381e1b1f4727 Author: Keith Packard Date: Thu Sep 21 01:47:27 2006 -0700 Make planeEnabled track pipes controlled by randr. Also add code to deal with disabling pipes. commit c11c445bdeac34253b48192a5d406b55ff8b2be7 Author: Keith Packard Date: Thu Sep 21 01:23:10 2006 -0700 Consistently use Cursor A on Pipe 0 and Cursor B on Pipe 1. Mixing random cursors and pipes didn't work very well. I'm left wondering whether the palette stuff will work on pre-9xx series hardware though; it is special cased everwhere else. commit 4a8b9515e914369e1faf1dca6b11204b233c73ee Merge: 18a510b bdca869 Author: Keith Packard Date: Wed Sep 20 22:46:55 2006 -0700 Merge branch 'modesetting' into randr-1.2 commit bdca8697cc6ac5a98e0548b2ce2e0032e9bcfa52 Merge: d9db5ec daade50 Author: Keith Packard Date: Wed Sep 20 22:46:42 2006 -0700 Merge branch 'modesetting-origin' into modesetting commit 18a510bf9af2f288c0e94359f672775d6e9c9ab2 Merge: f6500e9 d9db5ec Author: Keith Packard Date: Wed Sep 20 22:45:48 2006 -0700 Merge branch 'modesetting' into randr-1.2 commit f6500e94fec0d6db8c1f1350bee1d137bf06a09e Author: Keith Packard Date: Wed Sep 20 22:38:55 2006 -0700 Update driver for RandR 1.2 X server API. This is not entirely what I'd like to see, but it's at least functional. Limitations: Can't disable/enable crtcs Can't move outputs on/off crtcs But, it does handle monitor hot-plug, detecting changes in VGA and SDVO status on-the fly. Which makes for good demo material. commit daade50ca271d1cdf236bbe84afade85d4111ac9 Author: Linus Torvals Date: Wed Sep 20 12:07:09 2006 -0700 Add standard C headers to fix build on some systems after xf86_ansic.h removal. This appears to have been hidden for others by header pollution in X Server headers. commit 1681fe6bb041385e5aefb11baa9afd1f614abc5b Author: Wang Zhenyu Date: Wed Sep 20 09:36:02 2006 +0800 Revert "fix default tex wrap mode with clamp" oops, we've set border color to all zero, which should give us transparent in RepeatNone case. commit d9db5ec6866555ec13ba3ddabb1516eb45637afa Merge: cbaf3cf e3f4caf Author: Keith Packard Date: Tue Sep 19 16:03:04 2006 -0700 Merge branch 'modesetting-origin' into modesetting commit 5adb05f0b82ee3a168142d803ab3434f75cf15a3 Author: Wang Zhenyu Date: Tue Sep 19 17:14:05 2006 +0800 fix default tex wrap mode with clamp we don't set any 'default' border color, default tex wrap mode should be clamp to edge. commit e3ab89b0327ef6ff790ab53bba29c721aef032cd Author: Eric Anholt Date: Tue Sep 19 10:27:36 2006 +0800 shader program fix for component alpha set If CA is set and blend op needs src alpha, the src value is not needed and should be (src.A * mask.X). This is found in handling exa magic two pass composite. commit 37429c3ecb97df8faf0f3f56128d7a2b22eb8a5e Author: Wang Zhenyu Date: Tue Sep 19 10:08:31 2006 +0800 misc cleanup commit e3f4caf40708478ef327b029d0a75944c51ea905 Author: Adam Jackson Date: Fri Sep 15 13:51:18 2006 -0400 Add model-specific tweaks for some funky 945GM boards. For the Aopen Mini-PC, ignore the claimed attached 800x600 LVDS panel. Likewise for the Apple Mac Mini, but done slightly differently since it shares PCI IDs with the Macbook Pro. commit bd758030a6a59af32f9d73655cb691e018e94a7d Author: Eric Anholt Date: Thu Sep 14 11:12:03 2006 -0700 Add a compile flag to enable syncing after each operation in EXA. This replaces other debug sync options sprinkled around the EXA code. It doesn't change the mis-rendering of text on the 915. commit f46c70e877a3432ba23696e1a16d5906183876af Author: Eric Anholt Date: Thu Sep 14 10:05:51 2006 -0700 Add a note on maxX/maxY for the 2D rendering. commit ce00db054bf0b7f62ff0be312d7e3470141922dc Author: Eric Anholt Date: Thu Sep 14 10:00:06 2006 -0700 Replace a couple of mis-uses of the screen's bpp when the pixmap's was needed. commit 71c2dd63361be9616c77db80a93445307d63dd41 Author: Eric Anholt Date: Thu Sep 14 09:54:19 2006 -0700 Replace duplicated sync code in exa with a call to I830Sync. The I830Sync version has additional code for the 965. commit 564c830a91afda76706a8c4c2f3287d0b8d514e9 Merge: bf49084 b970166 Author: Alan Hourihane Date: Wed Sep 13 16:34:10 2006 +0100 Merge branch 'master' of git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit bf49084ad700f064b732bf39a163209eee1d6845 Author: root Date: Wed Sep 13 16:32:39 2006 +0100 bump max Xvideo height to 1088 to cope with some players. commit 59ce4180b95270432540624a1fdf7ae8dd18a7f3 Author: Wang Zhenyu Date: Mon Sep 11 22:57:23 2006 +0800 reimplement Solid function Replace COLOR_BLT_CMD with XY_COLOR_BLT_CMD, by which device would care for direction and provide a (x,y) coord interface. This fixes pixmap artifacts even in no composite case. commit 2b9c87bbf8ee5f7f56631114eb98303cd80e4a48 Author: Eric Anholt Date: Fri Sep 8 11:14:05 2006 -0700 Remove xf86_ansic.h usage. commit b970166eab95ac024ff481b0f5fd9aaf3644aabf Author: Eric Anholt Date: Fri Sep 8 11:09:19 2006 -0700 Fix a compile failure from the last commit. commit 2b7602847aa7ae9b4e88fbea070710695d2cb8a4 Merge: e4cdc42 b45f4b5 Author: Eric Anholt Date: Fri Sep 8 11:02:41 2006 -0700 Merge branch 'exa-origin' into exa Conflicts: src/i915_exa_render.c commit e4cdc42a98dd1be74e5c2bf5d9566f7449523b14 Author: Eric Anholt Date: Thu Sep 7 10:32:02 2006 -0700 Remove another debug printf. commit 099be52a3bb52516fb5e8d56c154a4d6b6707e09 Author: Eric Anholt Date: Thu Sep 7 10:28:09 2006 -0700 Re-remove xf86_ansic.h, and move copyright to the top of the file. commit 4ad577f83f7190df4d64e66fbf7c515ee6f411ce Author: Eric Anholt Date: Thu Sep 7 10:24:23 2006 -0700 Remove the UTS/DFS implementations that just match the fallback versions. commit 8b9d7a5f8560ee55ca5cb5376517a4246cd79fb9 Merge: 6500a3a 1e6e288 Author: Alan Hourihane Date: Thu Sep 7 17:45:57 2006 +0100 Merge branch 'master' of git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit 6500a3aa134e11a75b7ddaf7fff253003b223241 Author: Alan Hourihane Date: Thu Sep 7 17:45:28 2006 +0100 When in MergedFB mode, fix offscreen memory allocation. commit c378328ece701756ddca966eb108e2b1f5c3ed6c Author: Eric Anholt Date: Wed Sep 6 11:15:17 2006 -0700 Remove a debug printf. commit 1e6e288b8826789f3b2520d12426ff7852a67ccd Author: Eric Anholt Date: Fri Sep 1 16:47:17 2006 -0700 Add a check for intel-gen4asm, and rules to compile {wm,sf}_prog.h using it. This adds assembly source for the two programs used in the textured video implementation on the 965, which should make them easier to modify in the future. The compiled versions are also included, so that intel-gen4asm isn't a build requirement for people that aren't modifying these programs. There are minor differences in the compiled versions of these programs compared to their previous versions which were compiled with a different tool. I believe the changes should be harmless, and video continues to work on my system. commit cbaf3cf74bd420533d299c4113761ec536097e33 Author: Keith Packard Date: Thu Aug 31 18:25:21 2006 -0700 verbose debug message for panel sync data commit 1feb733eb8b09a8b07b7a6987add5149c53b0157 Author: Alan Hourihane Date: Tue Aug 29 14:54:15 2006 +0100 Fix bug with probing info of DFP2 and LFP2 connected devices (Aaron Ridout) commit 26e6c074c17b2d4e9b9f165468ad45a3b0ecc0ef Author: Alan Hourihane Date: Mon Aug 28 11:55:38 2006 +0100 Fix SetVBlank to operate all the time commit b45f4b54b189a496255ddae12af38fc4c4408a51 Author: Wang Zhenyu Date: Fri Aug 25 16:23:18 2006 +0800 Making render log a little quiet in normal commit 6f0d352b83fc9f39dd86edbda9af83243b50c764 Author: Ross Burton Date: Thu Aug 24 18:16:42 2006 -0700 Bug #7957: Fix distcheck. commit cc79b3ec19a7e858972228a270ef774041eb8946 Author: Wang Zhenyu Date: Thu Aug 24 10:28:59 2006 +0800 Current 915 render operations for 915G/945G only commit 078af29fa65653c5322b006404f7ad29aec24cce Merge: 7458a6a ea63e82 Author: Wang Zhenyu Date: Thu Aug 24 10:23:22 2006 +0800 Merge branch 'master' into exa Conflicts: man/i810.man src/Makefile.am src/i830_accel.c src/i830_dga.c src/i830_driver.c commit ea63e82ef417a9918e7d7105910a8ddeba2994f6 Author: Alan Hourihane Date: Tue Aug 22 16:40:08 2006 +0100 fix typo commit b7e57deebbda527e878326cf3e6358c0a48d7817 Author: Wang Zhenyu Date: Tue Aug 22 19:38:13 2006 +0800 pci id update for Crestline The "Crestline" banner should be replaced with official name later. commit dc4128ea0781124984dee0cb41e7b6ee87e362a1 Author: Alan Hourihane Date: Mon Aug 21 12:13:42 2006 +0100 remove GL* usage commit dad0e7fc09fa7794f20278d9d99abd96a21b691e Merge: 361c49a 43daaec Author: Alan Hourihane Date: Mon Aug 21 12:08:01 2006 +0100 Merge branch 'master' of git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit 361c49ad3cfe58b9ab98dfb6e95de505c0d63730 Author: Alan Hourihane Date: Mon Aug 21 12:07:29 2006 +0100 Fix bug #7930, i810 doesn't compile without DRI (Samuel Thibault) commit 43daaec63929c1f0e54a5125375d8147629da4b9 Author: Eric Anholt Date: Thu Aug 17 15:57:31 2006 -0700 Bug #7905: Mark DRI state as dirty in 965 textured video, fixing hangs with 3d. commit cdcc6f23e8cad797e6cfd57e2ff454ec8509b5ba Author: Alan Hourihane Date: Wed Aug 16 17:16:28 2006 +0100 Disable device check when mergedfb in operation. commit a94c96abf90c691faecbebf0c8d08f8010bc67ef Author: Alan Hourihane Date: Wed Aug 16 17:15:26 2006 +0100 Fix bug #5150. Disable LVDS usage on i915G, i945G and i965G. commit 2a4e486d2990af433e915cfa26dc57cae02e01b7 Author: Wang Zhenyu Date: Fri Aug 11 11:07:08 2006 +0800 Fix undefined alloc type for agp memory This shuts up the nonfatal warning that type 3 for alloc agp memory is undefined for intel-agp. commit 4cfed93df6b23903704348cafe050a6546e84479 Author: Eric Anholt Date: Thu Aug 10 15:41:32 2006 -0700 Bump to 1.6.5 for release. commit 38e7e48418cd48a46e48f5bc8a6547721db8f76d Author: Eric Anholt Date: Thu Aug 10 15:38:14 2006 -0700 Fix README typos from in the generated file. commit 975e60261088dee124b329d28c64e508bce1f90b Author: Eric Anholt Date: Thu Aug 10 13:49:43 2006 -0700 Bug #7829: Fix reported driver version. The driver now reports itself as the PACKAGE_VERSION from autoconf. The DRI DDX -> client interface version is dissociated from this so that we can do appropriate major/minor versioning of the interface that's not tied to the package version. Bumped the i830 ddx dri version patchlevel to note the fix in the previous commit. commit 820e9a22fdb759cbdaac4a488322825bc0908b0d Author: Eric Anholt Date: Thu Aug 10 13:37:18 2006 -0700 Bug #7835: Restore unused fields in I830DRIRec to avoid i915 DRI breakage. As it was, 1.6.4 broke compatibility with the released DRI driver. commit caa3b35cd772fc75d65a7ff791f00addbb39a764 Author: Eric Anholt Date: Wed Aug 9 16:11:30 2006 -0700 Correct typos in README source. commit 2a7426cf138e518a5eafb40f478359160a7ec98b Author: Eric Anholt Date: Wed Aug 9 15:47:09 2006 -0700 Clean up warnings. commit 24e59a0daa20b7c3e5028c9ca7972052801d02a1 Merge: bb60807 32f1199 Author: Eric Anholt Date: Wed Aug 9 14:19:06 2006 -0700 Merge branch 'textured-video', bringing in fixed-up i915 textured video. Conflicts: src/i830_video.c commit bb6080735efc40e103e92b65d0c2f1f729156632 Author: Eric Anholt Date: Wed Aug 9 12:21:16 2006 -0700 Bump to 1.6.4 for release. commit 3ca14275d13b1261b69b0e3fda90a112cb567472 Author: Keith Packard Date: Wed Aug 9 10:35:57 2006 -0700 Add missing headers to i810_drv_la_SOURCES commit 309374f78df35207b1398e14bba986fb891f3643 Author: Keith Packard Date: Wed Aug 9 10:30:41 2006 -0700 Use double quotes to avoid sgml syntax error commit dca9f856ca21e63abeb87e4ef2c40944c26d4429 Author: Keith Packard Date: Wed Aug 9 10:29:59 2006 -0700 Reformat README commit b19ea222727ed47b69d28a03242c09d3a6ab2673 Author: Eric Anholt Date: Wed Aug 9 10:01:29 2006 -0700 Update the README.sgml file for the upcoming release. commit f8b47f607297e0591b63e5f25296af07ee74f433 Author: Keith Packard Date: Tue Aug 8 16:19:51 2006 -0700 Update manual page to include i945 and later details. (cherry picked from 7833d0733bc146cf1ae7f588516c49797886b396 commit) commit d150b53d102c511f3c9245ef1f6fd36c12b01ca3 Merge: bb65a4d bc5f565 Author: Eric Anholt Date: Tue Aug 8 15:51:58 2006 -0700 Merge branch 'i965', adding i965G support. Conflicts: src/i830_cursor.c src/i830_driver.c commit bc5f56568021d8c63313e2b6bf30710e7516c04a Author: Eric Anholt Date: Tue Aug 8 15:48:04 2006 -0700 Intel bug #49: Fix video output at 32bpp by using B8G8R8A8 instead of B8G8R8X8. While here, don't overallocate video memory for the i965G state. commit c3b3d479788fcea7e543f29acf83c85b8b148fbe Author: Alan Hourihane Date: Tue Aug 8 15:28:14 2006 -0700 Intel bug #35: Fix accelerator syncing with DGA. Fixes glitches seen with Mark Vojkovich's "texture" demo. commit bc12208f6e145ec29c3ebe38ae04dc2ebca1b4cc Author: Wang Zhenyu Date: Mon Aug 7 13:27:00 2006 +0800 Disable error register dumping in dri TransitionTo2d. This's for debug which might confuse QA. commit bb65a4dc55b416437d61ccbee8b6056fe8e08357 Author: Alan Hourihane Date: Tue Aug 8 14:51:18 2006 +0100 bump to 1.6.3 commit 37644293da751bfc7268c9fc74ecda1044607dee Author: Alan Hourihane Date: Tue Aug 8 14:42:32 2006 +0100 check for xineramaproto commit 3661d4df86db012682ab4b393287aa02e9fc8453 Author: Alan Hourihane Date: Tue Aug 8 12:25:03 2006 +0100 Re-enable monitor detect after a few fixups. commit 995b142f510d1daab3914d336f3c0d017a043b41 Author: Alan Hourihane Date: Tue Aug 8 12:01:39 2006 +0100 Disable detecting of new monitors on VT switch. It's doesn't always work. The modesetting branch will deal with hotplug displays correctly. commit 8e5844bbf9c8880c9eb6eff29b6db2db06b01933 Author: Alan Hourihane Date: Tue Aug 8 11:43:10 2006 +0100 bump to 1.6.2 to indicate mergedfb support commit 421b415e23c1ddc78837cd222167d6ed71a3ef88 Author: Alan Hourihane Date: Tue Aug 8 11:28:42 2006 +0100 Fix a build problem. commit e4f63eaf5efb654121db148f2f8e32cc3b23b6b5 Merge: 633a683 e26f3e3 Author: Alan Hourihane Date: Tue Aug 8 11:07:56 2006 +0100 Merge branch 'master' of git+ssh://xorg.freedesktop.org/git/xorg/driver/xf86-video-intel commit 633a683a4adcb9a44a54519fd7ff66aab2d12f97 Author: Alan Hourihane Date: Tue Aug 8 10:23:29 2006 +0100 Ensure palette is updated in mergedfb & clone modes commit 71e3e2d4e3b2a2c538fe6f1cea41f442fdb8d756 Author: Alan Hourihane Date: Fri Aug 4 20:39:50 2006 +0100 Fix a problem creating the I2C bus for the SDVOC interface, due to a name match with SDVOB. Bus names must be unique. commit 0fd4831fdcf4c8f43d80c66e43eff8942f89b324 Author: Eric Anholt Date: Fri Aug 4 00:21:53 2006 -0700 Disable dynamic front buffer mapping on i965. Moving front buffers should only be necessary for rotation. Currently, the server isn't ready for it, and the method attempted to work around it caused crashes with DRI. Since i965 doesn't support rotation yet, this should be harmless for now. commit 8d0a5138503586cbf980eb9464f2db91b72509c7 Author: Eric Anholt Date: Thu Aug 3 19:16:59 2006 -0700 Add parenthesis so that IS_I965G doesn't make the test pass for 8-bit. commit aa69018c01d2fa963fb940718dbd653d6ca2c9eb Author: Eric Anholt Date: Thu Aug 3 19:12:15 2006 -0700 Turn off video debugging now that it appears to work fine. commit d15f87110807111ab7d71f1254ebe3dfef1fee80 Merge: a79aa0d d56ffa5 Author: Eric Anholt Date: Thu Aug 3 19:08:34 2006 -0700 Merge branch 'broadwater-video-rehash' into i965 The previous merge wasn't done on a synced-up tree, and missed necessary changes. commit a79aa0d7b27b0b9b032472776d7dda410fd66a98 Merge: 760021e f9e94c1 Author: Eric Anholt Date: Thu Aug 3 17:58:56 2006 -0700 Merge branch 'broadwater-video-rehash' into broadwater Conflicts: src/Makefile.am src/common.h src/i810_driver.c src/i810_reg.h src/i830.h src/i830_accel.c src/i830_cursor.c src/i830_dri.c src/i830_dri.h src/i830_driver.c src/i830_memory.c src/i830_rotate.c src/i830_video.c commit 760021e3983f7783900075b8c9603bd4fbe7e0a2 Author: Alan Hourihane Date: Thu Aug 3 17:08:39 2006 -0700 Add current Tungsten Graphics code drop for i965 support. commit d56ffa5f35e3cf4262d66469052b2122fdb24027 Author: Eric Anholt Date: Thu Aug 3 16:03:50 2006 -0700 Bump PS_MAX_THREADS to 32 now that the program doesn't fail. commit 4525379d95ff292d7322e1a7a516c0bedd1f7543 Author: Eric Anholt Date: Thu Aug 3 16:03:15 2006 -0700 Make the sampler's payload be the WM payload rather than uninitialized data. The sampler's payload happens to be in the same format as the WM payload, though most of the fields are ignored. This appears to fix the program in the presence of multiple PS threads. commit ad2c70b4121121f1fb53190ea49edf2323c804a9 Author: Eric Anholt Date: Thu Aug 3 12:47:19 2006 -0700 Remove some stale XXX-prefixed comments. commit f9e94c17c55e4c75802d8574c908744e286e7843 Author: Eric Anholt Date: Wed Aug 2 21:18:19 2006 -0700 Set the WM scratch space that we had already allocated. It appears to be required, even if the kernel doesn't use any scratch space. commit aefa6fdfc5300546caeb64ace14a7854d3dc7dae Author: Eric Anholt Date: Wed Aug 2 21:14:14 2006 -0700 Clean up GRF allocation (which was wrong at 16-register boundaries). Also use PS_MAX_THREADS rather than hard-coding 1 thread, and remove the dead SF_KERNEL_NUM_URB macro. commit 7a64e14624514ef31f6fa9f15e8804c45f930212 Author: Eric Anholt Date: Wed Aug 2 20:48:13 2006 -0700 Crank down the SF allocation and comment on why this is a fine lower limit. commit bc6a2bb7576a7c1e7971f6d1e0b893b2ada1aaa3 Author: Eric Anholt Date: Wed Aug 2 20:34:57 2006 -0700 Remove the clip URB allocation. Previously, the VS was misconfigured and exceeding its allocation, which the (unused) clip was providing padding for. commit defe2795429484ffe4c1438bafb86bb5e5469ba9 Author: Eric Anholt Date: Wed Aug 2 20:32:41 2006 -0700 Correct the VS setup, and allocate a correct, minimal number of URB entries. The VS number of URB entries and URB entry size are always used, even when the VS is disabled. Similarly, the cache enable bit is always used. commit b57ccb682cb3dea3e26c6f1b0c709e63dfde0d31 Author: Eric Anholt Date: Wed Aug 2 19:46:15 2006 -0700 Replace the SF max threads setting with a define for easier tweaking. Tweak it to 1 for now. commit 82037a12758c41a304f2e0bbd033d3345cccbe1a Author: Eric Anholt Date: Wed Aug 2 19:33:28 2006 -0700 Remove CS URB allocation since we don't use any constants. commit 1d45668d7a42bfa5d7f5bfb68d8bae38bda0936b Author: Eric Anholt Date: Wed Aug 2 19:18:20 2006 -0700 We only need 3 vertices to fit in the URB, since we only dispatch 3. commit a076d35bed6f13cf943a0f8948176aa0c999e2da Author: Eric Anholt Date: Wed Aug 2 19:16:03 2006 -0700 No GS URB allocation is necessary when the function is disabled. commit befa655168fb8dcb6806592eb44f7ac49f191822 Author: Eric Anholt Date: Wed Aug 2 19:11:38 2006 -0700 Reduce URB_VS_ENTRY_SIZE to 1 as our vertices are under 8 floats. commit 33acbdca0a0f82725e5bf7887b325726403a6ffd Author: Eric Anholt Date: Wed Aug 2 19:09:19 2006 -0700 Remove the VS kernel and binding table. The VS URB entries have to remain as they're used to store the VF output which isn't modified by a VS program. commit aafa48cb85cd03c735fb968a4275c19e1a68cd02 Author: Eric Anholt Date: Wed Aug 2 18:26:26 2006 -0700 Fix wm prog to correct the ordering of the Cr and Cb channels. commit bc2c842d93de04d48c7de60482814db346bd0b78 Author: Eric Anholt Date: Wed Aug 2 18:10:01 2006 -0700 Allocate space for the 965's state at the end of the video buffer. Fixes corruption in the first few lines of the video. Based on 1b506798d98d911be733543da2c40cb451a28912 commit 524460ea1f02bb6e8e2239d7763334666012cec4 Author: Eric Anholt Date: Wed Aug 2 17:47:55 2006 -0700 Updated WM kernel to load video and do colorspace conversion. commit ba896c779c697e1d7458028798ec49013bd9da9f Author: Eric Anholt Date: Wed Aug 2 17:47:37 2006 -0700 Updated grf/urb state for WM. commit e5c572f841b626b8b6f21a6966a33956d3b0b35b Author: Adam Jackson Date: Wed Aug 2 20:47:12 2006 -0400 Fix a braino in mode list pruning. Interpreting the size of the display in centimeters as the size in pixels, and then clipping the modes list based on that, rarely does what you want. commit 21b62df7c34217be5dd95985c35e33be11c25846 Author: Eric Anholt Date: Wed Aug 2 17:36:49 2006 -0700 Move the WM kernel to a separate file. commit 5d3424492f9586a4c5a28962a9757f48f2c12e83 Author: Eric Anholt Date: Wed Aug 2 17:34:12 2006 -0700 Replace SF kernel with the one from broadwater-video HEAD. commit 7458a6adb5ea62f56bb3d4ab19ad7d1aa6ad2d19 Author: Eric Anholt Date: Mon Jul 31 10:09:17 2006 -0700 Move MAPSURF_XBIT settings into the texture formats structure. commit 7ea74843bbdbf54b6804727be9b41d26832c8f76 Author: Eric Anholt Date: Mon Jul 31 10:06:34 2006 -0700 Whitespace cleanup. commit e71108f1e05b7a8d8edd174eb64edd6cccacbcdc Author: Alan Hourihane Date: Fri Jul 28 10:32:12 2006 +0100 Fix DGA with MergedFB Turn off rotation support when MergedFB enabled commit a91a4f95c664f6905fef61dab251707bf2548bb8 Author: Alan Hourihane Date: Thu Jul 27 16:11:48 2006 +0100 Fix pipe reversal for Xv commit ac3ad32f667b306e771617d784648f7111743f1a Author: Alan Hourihane Date: Thu Jul 27 15:28:42 2006 +0100 Calculate allowable refresh rates on the private mode data for each independent screen in mergedfb. Lots of other fixes too. commit 30952e58ed83e2e18d1007f662d2cc9a773c876c Author: Eric Anholt Date: Wed Jul 26 13:42:12 2006 -0700 Limit drawing to the destination pixmap's boundaries, not the screen's. This shouldn't matter, as miComputeCompositeRegion shouldn't giving us anything that would draw outside the bounds, anyway. commit cffd2cd36d0437b38ac8164d66ea71be50b19330 Author: Eric Anholt Date: Wed Jul 26 13:22:51 2006 -0700 Fix hangs when compositing with a mask. The modify bits in the mask field for sampler/map state appear to actually be enable bits. So, prepare the state values in I915TextureSetup, then write the sampler/map state out all at once in PrepareComposite. commit 96754b822df7ac110a70b2d08dda2ebb299772be Author: Eric Anholt Date: Wed Jul 26 13:19:12 2006 -0700 Fix a couple of typos from code review. commit e786e2f9f3a4df31702736db6f68a44c9ebba546 Author: Alan Hourihane Date: Wed Jul 26 16:45:38 2006 +0100 When detecting new monitors in mergedfb renew the modepool. commit 8e6e990db34d63174670512f494fa9adb44786f5 Author: Alan Hourihane Date: Wed Jul 26 10:48:47 2006 +0100 Update Xvideo to deal with MergedFB modes. commit e26f3e30b30a57ab4aad0267d689a9a5d7a5e877 Author: Alan Hourihane Date: Wed Jul 26 09:17:52 2006 +0100 Fix a build problem commit b919db75d2f6dc1019f981534b0d5d87c6029727 Author: Alan Hourihane Date: Wed Jul 26 09:07:19 2006 +0100 Bump to 1.6.1 commit 9c93d1498fa2363c52ef7fbe97d781560f67acf5 Author: Eric Anholt Date: Tue Jul 25 21:17:05 2006 -0700 Oops, partial revert of last commit. Some were obviously not NOOPS. commit 38d1a5e0dbe059f5c01bd5120a108a386ff10718 Author: Eric Anholt Date: Tue Jul 25 21:09:12 2006 -0700 Replace some OUT_RING(0)s with OUT_RING(MI_NOOP) to remind me why they're there. commit fd19b12793f09b6714468556ace875ef36ed9e1c Author: Alan Hourihane Date: Tue Jul 25 11:14:11 2006 +0100 Add mergedfb support to the intel driver with additional pseudo-Xinerama support. commit aec88cf4c66833f89afa5f8fa4f8bcf30b2b6b4b Author: Wang Zhenyu Date: Mon Jul 24 15:46:19 2006 +0800 remove crap blit in UploadToScreen, we should find a more efficent way and implement blit correctly. commit 32f1199937e92b9100aba52cbbb97157014e3182 Author: Wang Zhenyu Date: Mon Jul 24 15:42:15 2006 +0800 remove an extra '-' commit 02c5c4cd1dd44058d80ec23cccfd45a13bc3bb2c Author: Wang Zhenyu Date: Fri Jul 21 12:54:06 2006 +0800 add copyright info commit 4f0ad337098eb0bacb1c11bc61d780ac18041e1d Author: Wang Zhenyu Date: Fri Jul 21 11:59:04 2006 +0800 fixup segfault in xaa when xaa not initialized in i830WaitSync. commit 914327f40d07a3f7c069752ce005bf8e21352b03 Author: Eric Anholt Date: Thu Jul 20 17:58:07 2006 -0400 Disable drawing to PICT_a8, and turn on support for non-extended repeats. We don't know what COLOR_BUF_8BIT does, so it's disabled for now while we're stabilizing the code. The non-extended repeats appear to be working according to the rendercheck tests on a8 and a8r8g8b8 sources. Masks continue to hang the card, as before this change. commit 45cb032e2b7ac1e4c765fc29a2e4dd0cef19066d Author: Eric Anholt Date: Thu Jul 20 17:34:50 2006 -0400 Use MT_8BIT_A8 so PICT_a8 expands to (0,0,0,a) not (a,a,a,a) commit fd6d825ae0780f3daf436f4224bf5f177cb8630e Author: Eric Anholt Date: Thu Jul 20 17:25:31 2006 -0400 Move ss6 setting with other immediate state, and ensure that stencil is off. commit d6d6a44c66446f34b57394e5ea9a8e32917f7569 Author: Eric Anholt Date: Thu Jul 20 11:23:05 2006 -0400 Try to fix up the basic RepeatNormal and RepeatNone support. With RepeatNone, access outside of the drawable should return 0 alpha values, which is done by using the border color. For RepeatNormal, we use the wrap mode (which requires that we use normalized texture coordinates). commit 2b2173c618c080b1678990d65fe49b52bd8001b4 Author: Eric Anholt Date: Thu Jul 20 11:15:18 2006 -0400 The pixmap's drawable x/y coordinates are always 0, so don't bother using them. commit 9f1cec83e0aef36c7d3482e62e8f01595f1fd076 Author: Eric Anholt Date: Thu Jul 20 11:05:49 2006 -0400 The vertex data are all floats, so write the dest coords as floats. commit 4737955a62c39177e7a7ce7749a2f20e111afc68 Author: Wang Zhenyu Date: Fri Jul 21 01:02:38 2006 +0800 move i830 default coord set into I830EmitInvarientState commit a7e30bb051bc03063fe699473610a57054a64973 Author: Wang Zhenyu Date: Fri Jul 21 00:56:58 2006 +0800 Take from i915, blend ctl code cleanup. commit ac34a37cb60d763cbd99b6e2f6fdcb639592b99b Author: Wang Zhenyu Date: Fri Jul 21 00:52:59 2006 +0800 Take instruction fixes into i830, with indent changes. commit 3e86bf4273241daa23645f5a8104913e4205a74b Author: Wang Zhenyu Date: Thu Jul 20 13:43:27 2006 +0800 remove i915 default ctx setup. commit 5c945bf9eb9f5bedd34d98dcc7abc3f1ea3cb962 Author: Wang Zhenyu Date: Thu Jul 20 13:40:39 2006 +0800 Revert "Fix several size error with STATE3D_LOAD_STATE_IMMEDIATE cmd." This reverts commit 433cb6ba82698676f6f72e09834aba4d64611d54. commit d5243d1b35ab1db608c81889819e4d4d87048154 Author: Eric Anholt Date: Wed Jul 19 19:27:53 2006 -0400 The height and width of texture maps are one more than the programmed values. commit 13e372c2095fde94ae41bea959fba0ad95a59c08 Author: Eric Anholt Date: Wed Jul 19 16:42:57 2006 -0400 Fix the texture map pitch setting as documented, and as used by the 3d driver. commit da5efb09d55291ce5bcabff7db8d1490bb5e838b Author: Eric Anholt Date: Wed Jul 19 16:36:52 2006 -0400 Fix the alignment padding fix (didn't bump BEGIN_LP_RING count). commit 36aa43bf73ee1268f0a250788eb637a4123f08eb Author: Eric Anholt Date: Wed Jul 19 16:22:46 2006 -0400 Force texture alpha channels to 1 if not present. commit adce6bd0fc9533156da09da7d029ba0d76606b4f Author: Eric Anholt Date: Wed Jul 19 16:21:49 2006 -0400 Add a trailing MI_NOOP to frag shader output for alignment if necessary. commit 4e409ea44180f7ef2780d70c9d2f54629bbd0fc3 Author: Eric Anholt Date: Wed Jul 19 15:57:09 2006 -0400 The map bits per pixel must come from the drawable, not the visible screen. commit 449e4be503c8b938d5bd46ee810244f8bcf54ceb Author: Eric Anholt Date: Wed Jul 19 13:34:06 2006 -0400 Correct the DWORD count of several 3D instructions. commit f1b62d890ca22e12d61f7ef67bc4e35d68cde019 Author: Eric Anholt Date: Wed Jul 19 13:02:24 2006 -0400 Replace hand register setting with new i915 fragmet program API. commit 76a316d0cec92a04c8735926a76e76c21f960d7e Merge: 433cb6b 8480516 Author: Eric Anholt Date: Wed Jul 19 12:31:36 2006 -0400 Merge branch 'master' into exa Conflicts: src/Makefile.am commit baf65ce98abcdd21dff2531a43bb9c5044732c28 Author: Eric Anholt Date: Tue Jul 18 19:42:37 2006 -0400 Re-convert i915 video to new fragment shader API. Although in the history of this branch it had happened before, this time it's for real. commit bb81e8d6c777a5e16b8193c07667fbee8e21203e Merge: 2a1b3cf 8480516 Author: Eric Anholt Date: Tue Jul 18 19:23:21 2006 -0400 Merge branch 'master' into textured-video This moves the i915 textured video implementation into i915_video.c to avoid conflicts in register definitions with i830_reg.h when we use i915_reg.h. This also means that i810_reg.h's i915 3D regs definitions are removed and replaced with i915_reg.h usage. Conflicts: src/i830_rotate.c commit 84805167ab8a422966355b9753bfcb4dad802413 Author: Eric Anholt Date: Tue Jul 18 18:27:10 2006 -0400 Convert i915 rotate code to the new fragment program API. commit 5176d62ba58c100c87f75a4f333d00129d780c99 Author: Eric Anholt Date: Tue Jul 18 16:18:18 2006 -0400 Add an API for programming i915 fragment programs. commit 148ef9bdd9e0ef3e7ac86b56a8662b53a3ea9168 Author: Eric Anholt Date: Mon Jul 17 22:32:25 2006 -0700 Convert magic numbers to symbolic names in i915 rotate code. This doesn't cover the fragment shader yet, which we need to make a sensible set of macros for (at least the basic bits). Reviewed by: md5 commit 433cb6ba82698676f6f72e09834aba4d64611d54 Author: Wang Zhenyu Date: Tue Jul 18 17:00:50 2006 +0800 Fix several size error with STATE3D_LOAD_STATE_IMMEDIATE cmd. Issue texture coord set with proper scale value. commit 855a9f13cb7fd4f6c489ff280bf389475bbd9bbe Author: Wang Zhenyu Date: Tue Jul 18 10:02:47 2006 +0800 fallback in 'repeat' case for now commit a6d438ebe3cf141a0331e0cd55eb9b5e137a5e37 Author: Keith Packard Date: Mon Jul 17 14:11:19 2006 -0400 Disable spread spectrum clock usage. The spread spectrum clock generator that improves EMI characteristics for laptop screens lives in an external chip that is programmed over an i2c bus. Without correct programming, attempts to use this mode for the LVDS can result in a DC signal being sent to the panel. Until we find programming information for this external chip, we should leave this mode disabled. commit 16d6263e6518a4a05562e2842ff2d0fdb4710304 Author: Alan Hourihane Date: Sun Jul 16 20:39:52 2006 +0100 whoops, reverse part of that. commit 2f50f6d1b1b3fa4fbec98bd8fa5818df890070e7 Author: Alan Hourihane Date: Sun Jul 16 20:17:38 2006 +0100 move ContextMem out of XF86DRI commit c7083a267209c93b2a91ef00dea2ca840400d160 Author: Eric Anholt Date: Fri Jul 14 13:23:40 2006 -0700 Bug #7404: Only save/restore VGA fonts and not other VGA regs. This fixes a hang on the i945 during restore. It appears that saving/restoring the VGA registers is not important, as we're correctly saving/restoring the registers we touch within the driver anyway. commit 49b827605628d3e1a6d4d41447cf46c5f38cc0c2 Author: Eric Anholt Date: Fri Jul 14 14:23:04 2006 -0700 Add a register restore implementation so we don't crash on LeaveVT. We shouldn't ever need to save/restore the hi/lo frequency regs, as they're read-only. commit 6a92a779646ec03a03a3b1f45170b2e705ce8934 Author: Eric Anholt Date: Fri Jul 14 14:20:41 2006 -0700 Don't try to probe on more pipes than we really have. commit 04d1584737fd0d14e99608a97281fd7b1549ae0e Author: Wang Zhenyu Date: Fri Jul 14 16:14:18 2006 +0800 Current exa render implement for i830 and i915, test on 865GM and 915G. There is issue in picture 'repeat' support. And also stop recursive behavior in I830WaitLpRing to allow server to abort instead of system hang. commit de470aaf5c47f4d2b0f477ac678039ef43af773d Author: Adam Jackson Date: Thu Jul 13 19:10:11 2006 -0400 In I830xf86SortModes, catch cases where two modes are equal in only one dimension, by comparing the areas of the modes. Otherwise, 800x600 would sort before 1024x600 if it was added later. commit 22843830ebdd14247aa76d19f89494a56e2ac887 Author: Adam Jackson Date: Thu Jul 13 17:20:17 2006 -0400 Fix a thinko; would only inject the FP native mode if a mode list was already found, which is never the case when there's no xorg.conf. commit 05bcbadd130524694e11e372d54cb419cea566cc Author: Eric Anholt Date: Tue Jul 11 14:05:38 2006 -0700 Avoid NULL dereference if cursor position changes during a mode change. commit b65f18b05a5fba506b71293b495cab95197037ac Author: Eric Anholt Date: Tue Jul 11 13:29:57 2006 -0700 Bug #7443: Respect the user's Modes configuration, and make it more useful. Now, mode names generated by DDC get names of the form "WIDTHxHEIGHTxREFRESH". The matching for user Modes lines takes the user Modes as the prefix that needs to match, rather than an exact string match or "WIDTHxHEIGHT" match. So one can, for example, specify "1024x768" to get any old 1024x768, or 1024x768x60 to get one of the modes named 1024x768x60. commit 5a2e04bd1b700a8a6e26136b8831ef5e4d11b565 Author: Eric Anholt Date: Tue Jul 11 10:21:51 2006 -0700 Fix crash with DDC when there are no user modes to add. commit f9499a68da0ce459fed0b29b998678fd81898a51 Author: Luká\u0161 Hejtmánek Date: Tue Jul 11 10:13:18 2006 -0700 Make gamma settings apply to the cursor as well, and fix clone-mode gamma. commit 7068468ac1951bfca0071bb9b1a99df4f37368a0 Author: Luká\u0161 Hejtmánek Date: Tue Jul 11 09:51:26 2006 -0700 Add support for adjusting saturation value of overlay video. commit b1c2ea653502dd8547079e7014b698f241433dff Author: Alan Hourihane Date: Tue Jul 11 08:13:30 2006 +0100 whoops, revert some unnecessary changes commit 8a44a7acfcadbba2410dca750afc9d32bc83706e Merge: 584b544 e7723a4 Author: Alan Hourihane Date: Tue Jul 11 07:41:27 2006 +0100 Merge branch 'master' of git+ssh://git.freedesktop.org/git/xorg/driver/xf86-video-intel commit 584b544987be5cf23dce29ddaf3130e59cfe6fa8 Author: Alan Hourihane Date: Tue Jul 11 07:40:40 2006 +0100 Add an additional check before rotating commit b912bf5673e38e03b0b25c2f5d05fe7e26994ba1 Author: Eric Anholt Date: Mon Jul 10 18:35:20 2006 -0700 Clean up warnings in sil164 module. commit d75490701cdbf2ab6eab82eaa078790a5fe0aea0 Author: Eric Anholt Date: Mon Jul 10 18:21:04 2006 -0700 Hook up SiI164 mode setting (just a matter of turning the chip on). Also adds register dumping in case this turns out to not be enough, and fixes a couple of prototypes. commit 426d26ea446d646fa8f561ea0e03c8e4a2c0c315 Author: Eric Anholt Date: Mon Jul 10 18:19:51 2006 -0700 Fix prototype for SaveRegs. commit 8d7987d00242020d29a2574ac0c8b6e55cc22112 Author: Eric Anholt Date: Mon Jul 10 17:34:57 2006 -0700 Move to 4-space indents in sil164. commit f5a01a2ef02125611d5fb74c20d53d52e544701a Author: Eric Anholt Date: Mon Jul 10 17:17:51 2006 -0700 Make DVO code light up my sil164-based DVI output, when already set up by BIOS. commit 23a0ee73bce12f9e0b881af420413aeec4c0517f Author: Eric Anholt Date: Mon Jul 10 17:16:18 2006 -0700 Fix modelist with a configured monitor to not begin with all unvalidated modes. commit 48ba9273ddfb36d3525e19238b94b18c56667c4d Author: Eric Anholt Date: Mon Jul 10 15:01:51 2006 -0700 Fix validation when the first mode is thrown out, and print hsync in modelines. commit 3924ffb7d7b71cb9c6ab9eeb12d0f1b2c26244c0 Merge: 5a8f6a4 f76f94a Author: Eric Anholt Date: Mon Jul 10 12:12:38 2006 -0700 Merge branch 'dvo-merge' into modesetting Conflicts: src/i830_driver.c commit f76f94a743505da16e121992eb789c1f74eb7673 Author: Eric Anholt Date: Mon Jul 10 12:04:09 2006 -0700 Supply proper NULL-terminated symbol lists to avoid crashing. commit 5a8f6a486d79f50d2d659e615283289d59f9caa4 Author: Eric Anholt Date: Sat Jul 8 15:26:19 2006 -0700 Improve output bus setup to include LVDS setup for pre-i915. commit df333cc9a848bc2299a52a7613fe4ffdff8038a2 Author: Eric Anholt Date: Fri Jul 7 13:41:33 2006 -0700 Initial add of DVO support code. Probes my sil164. This is a mostly-untested merge of airlied's work. The I2C modules are intended to be moved into the core server or a separate driver module when they're functional and we're happy with the API. commit e1064f52b0ff69ea7937897b8c951cc3e32cd752 Author: Eric Anholt Date: Wed Jul 5 16:00:03 2006 -0700 Don't try to probe modes on an SDVO device with NULL sdvo_drv. commit ffa6ecc18bc54151061d9956f1d12575fc057da3 Author: Eric Anholt Date: Wed Jul 5 14:41:08 2006 -0700 More fixes to "choose closest mode for the pipe" code to select correct refresh. commit dfd7fef457c048c9f0d826e37d91453d9e1485b9 Author: Eric Anholt Date: Mon Jul 3 12:01:57 2006 -0700 Bug #7375: Don't double-free the current XF86 mode after a randr reprobe. commit 5d07ebdf4f23e16fb8f60eafeadc947701e7877c Author: Eric Anholt Date: Mon Jul 3 11:59:21 2006 -0700 Only override display size with the XFree86 mode's for actual panel scaling. commit 48f27ac62128251640a9b1ca54f63376676b47eb Author: Eric Anholt Date: Wed Jun 28 15:07:01 2006 +0200 Replace i830InjectModes with i830DuplicateModes usage. The remaining functionality of DuplicateModes was OBE, and the name was bad. commit ce5bd108c55d2378db072617c380514a39672603 Author: Eric Anholt Date: Wed Jun 28 14:21:49 2006 +0200 Validate and insert user and VESA standard modes for DDC or configured fallback. This isn't really tested because I lack a good CRT to test against currently. commit 367f69f8e7710e53dcd286f1b62506a3276e80f9 Author: Eric Anholt Date: Wed Jun 28 13:10:02 2006 +0200 Replace xf86ValidateModes usage with a set of custom validators and pruning. This moves us to maintaining MonPtrs per pipe instead of using the EDID structure "xf86MonPtr", which is closer to what we want to be looking at when doing validation. The new validation isn't enough yet -- particularly, we aren't importing and validating the custom modelines to the pipes when applicable, but this will be easier than (for example) trying to make flat panel modes pass xf86ValidateModes through various gross hacks. Hotplug turn-on/off also happens at SwitchMode time now, instead of at randr probe time. commit 9fbd3d8f4befb75ed6f6bd9a9ffe0175626e8785 Author: Eric Anholt Date: Tue Jun 27 23:31:40 2006 +0200 If the panel power registers are all zeroes on Mobile parts, disable LVDS. This is the case on the Mac mini, which is an i945GM but has no LVDS attached. Powering on with the power timing registers zeroed would probably be a bad idea, even if there was a panel attached. commit 56f7aedd0ad1f5645a90a5509b1263ec6b7b7ee1 Author: Eric Anholt Date: Tue Jun 27 00:37:56 2006 +0200 Fix randr current mode reporting and mode loss/mis-configuration on re-randr. commit b85f268051a785f90e4c55bd1cac80d673388f16 Author: Eric Anholt Date: Mon Jun 26 16:26:58 2006 +0200 Fix remaining warning. commit 6a3f89f4b6035534c7b93a4c05fd704305349785 Merge: 3cdc537 e7723a4 Author: Eric Anholt Date: Mon Jun 26 16:25:58 2006 +0200 Merge branch 'master' into exa Conflicts: src/i830.h commit 3cdc53797bf6fdbfbcb53e07b269a5071f5ec97d Author: Eric Anholt Date: Mon Jun 26 16:23:55 2006 +0200 Fix build with new EXA headers. commit e7723a4e5725147d3bd9ba22c5a3314b0556e440 Merge: 5111b88 dae9cb7 Author: Eric Anholt Date: Mon Jun 26 16:04:33 2006 +0200 Merge branch 'origin' commit 7104b915da412a26661bab7b5a940e935e8cbc8a Author: Eric Anholt Date: Mon Jun 26 15:11:13 2006 +0200 Clean up warnings. commit 21dc3edfc41987bb8cf0f8d265fba9775cbe8cdb Merge: f113e90 5111b88 Author: Eric Anholt Date: Mon Jun 26 15:06:42 2006 +0200 Merge branch 'master' into modesetting Conflicts: src/i830.h commit 5111b883480a5a9cc82200f2684cba67b515aa73 Author: Eric Anholt Date: Mon Jun 26 14:53:10 2006 +0200 Turn on extra warning flags for GCC, and clean up the resulting fallout. commit f113e9002cf53510e30984f816d44b06f1e71216 Author: Eric Anholt Date: Mon Jun 26 12:54:30 2006 +0200 Fix the plane/pipe disabling and turn off missing outputs when no longer DDCed. commit 0e5cda3796ba0164496f0814eb57d1dfa7ab9257 Author: Eric Anholt Date: Mon Jun 26 10:30:46 2006 +0200 Fix FP scaling by using the desired mode to get at the real [HV]Display. commit 51d14f803aae6d0a738520c3cad110289ee444db Author: Eric Anholt Date: Mon Jun 26 10:21:23 2006 +0200 Add a function to turn off unused outputs, DPLLs, planes, and pipes. commit d2c18d8d79596513149273e4a0d322f04bf27e80 Author: Eric Anholt Date: Mon Jun 26 10:15:11 2006 +0200 Fix DDC probing after last (untested) commit. commit 6d1d105d68d9c25890c3fd2ebad1367529c2a991 Author: Eric Anholt Date: Mon Jun 26 10:14:27 2006 +0200 Unset pipe current mode on EnterVT, so we reprogram the mode for sure. commit 52e8231a19f28bd4744f983aee2197a18c20aa3a Author: Eric Anholt Date: Mon Jun 26 07:46:28 2006 +0200 Major cleanup of mode reprobing: - Don't mess with pScrn->monitor->Modes, and instead make our own availModes. - Don't re-program the pipe with the same values (no flicker at xrandr) - Move a bunch of stuff that should be exposed through the public API (probably) to i830_xf86Modes.c - Use a table with established modes plus GTF to come up with modes from EDID, instead of trying to walk and find one in pScrn->monitor->Modes. I think this is correct. - Reset clone state if we've detected new pipes, which should turn on the cursor. commit f5e5f8aeddb3e0d6d073471aeff6176fb54576e2 Author: Eric Anholt Date: Fri Jun 23 23:29:55 2006 -0700 WIP to allow re-probing and validation of modes for new heads at "xrandr" time. Now, DDC modes always end up being preferred to custom modelines, even if smaller. This should probably be fixed by inserting custom modelines into the probed mode list if they're valid according to the probed parameters of the monitor. Too much code is lifted from static functions in xf86Mode.c, and those should be made unstatic if possible. Using xf86ValidateModes is also rather hacky, and I want to break the function down, but this is a first step. commit 89791914d2a78f19f4f60ca370d387e5b1ccfb46 Author: Eric Anholt Date: Fri Jun 23 18:21:17 2006 -0700 Split probed modes out per pipe, and union them into the available modes. This is the first stage of getting runtime monitor attachment. The old i830 GTF code is returned to use to provide suitable modelines for xf86ValidateModes in the LVDS case, even though the LVDS doesn't care about the modeline and just always programs its fixed values. commit dae9cb7712d5d8f88697ca83808c59af08364c0e Author: Alan Coopersmith Date: Thu Jun 22 15:07:16 2006 -0700 Provide definitions of __FUNCTION__ for non-gcc compilers commit bb4810521633b6c3db2fc7d01ddc71325583d265 Author: Eric Anholt Date: Thu Jun 22 09:38:27 2006 -0700 Move FP mode validation next to other mode validation code. commit 66d9a1be302ad34573de98de21cbdf6419592092 Author: Eric Anholt Date: Wed Jun 21 17:11:54 2006 -0700 Detect SDVO display presence at startup and default to displaying to it, too. commit 72e25a7488c2eabcc92e9e0769a89dee687f52fd Author: Eric Anholt Date: Wed Jun 21 16:04:18 2006 -0700 Fix SDVO output at low pixel clocks. I had interpreted the docs as saying that the multiplier setting would further divide the clock and stuff dummy bytes in. Instead, we have to set the DPLL at the higher clock rate, and the pixel multiplier just controls the stuffing of dummy bytes. Also, we have to set the multiplier both in the graphics chip and on the SDVO device on the other side. commit 726443309d72134341cff1f6db978aa1d6e3ce52 Author: Eric Anholt Date: Wed Jun 21 15:38:19 2006 -0700 Add decoding of SDVO command names for debug output. commit 5a1b68993f3a3a2e8dcd428a7118e29c36703cd6 Author: Alan Hourihane Date: Wed Jun 21 08:41:16 2006 +0100 Fix build without DRI commit 16b310823bacab6be4947da234b3a081b0a3cd62 Author: Matthieu Herrb Date: Wed Jun 21 00:12:27 2006 +0200 Fix build without DRI commit 896ffe78fe96469cdd3ade77c8e68e1503967223 Merge: 89c2c4b 52243d4 Author: Eric Anholt Date: Tue Jun 20 15:10:35 2006 -0700 Merge branch 'modesetting-origin' into modesetting commit 89c2c4bc40b8c032915ccb3ed4f3c143c3d8db12 Author: Eric Anholt Date: Tue Jun 20 15:10:19 2006 -0700 Add #if 0-ed code I've been using for CRT detection debugging. commit be08661e3126907c50c54485042fcde00b0da2b4 Author: Eric Anholt Date: Tue Jun 20 14:48:03 2006 -0700 Only default to enabling CRT or LVDS output if they're actually detected. Still, if we haven't detected any outputs automatically (including CRT through DDC), default to CRT anyway. commit b454c9601f005c69c11556a558150403378d34d9 Author: Eric Anholt Date: Tue Jun 20 14:32:40 2006 -0700 Add support for CRT detection using DDC. This method is slower (~5ms), but works on older chipsets. Also, load-based detection is disabled, as it can be fooled by other outputs on the pipe being active, such as LVDS. commit 0b76646666e9d330e77c6f81af8b91e34623be92 Author: Eric Anholt Date: Tue Jun 20 13:57:26 2006 -0700 Add CRT detection function by testing for load, and clean up hotplug version. commit e4584a4f44a70d746396ed48b8e40033504d68b2 Author: Eric Anholt Date: Tue Jun 20 10:39:28 2006 -0700 Remove dead DisplayInfo option. commit ab60e34dcfc52ab5f22a82145d5b4db51b4c62c5 Author: Eric Anholt Date: Tue Jun 20 10:07:47 2006 -0700 Add debugging info for pipe/display plane size. commit 8a6edba33213911cc2210b5e903428b81d45862f Author: Keith Packard Date: Mon Jun 19 13:47:28 2006 -0700 Set vblank interrupt configuration to match pipe configuration New i915 drm ioctl (in version 1.5) allows the X server to select which pipe drives vblank interrupts. Use this to drive from the 'preferred' pipe. Yes, per-window vblanks would be nice in a shared fb environment. Maybe someday. (cherry picked from 2fb375b665f4802819b89f2277fd6154006c11ee commit) commit 52243d407cad93283956660de4771097ac0b4b2d Merge: 2fb375b 34f6a82 Author: Keith Packard Date: Mon Jun 19 13:28:09 2006 -0700 Merge branch 'modesetting-origin' into modesetting commit 2fb375b665f4802819b89f2277fd6154006c11ee Author: Keith Packard Date: Mon Jun 19 13:24:57 2006 -0700 Set vblank interrupt configuration to match pipe configuration New i915 drm ioctl (in version 1.5) allows the X server to select which pipe drives vblank interrupts. Use this to drive from the 'preferred' pipe. Yes, per-window vblanks would be nice in a shared fb environment. Maybe someday. commit b5acc6b3a3a3a109014d6b971f4722d0f0a4c29a Author: Keith Packard Date: Mon Jun 19 13:22:17 2006 -0700 Add backlight control to DPMS logic. Turn backlight on and off in response to DPMS state changes. commit d7e5d996aa123e52857362fa8a1e69f709bfe218 Merge: 89a5a00 a73ab7f Author: Wang Zhenyu Date: Tue Jun 20 01:22:53 2006 +0800 Merge branch 'master' into exa commit a73ab7f0e6e3b0462e05c0031ffd602ed3e2bcd4 Author: Alan Hourihane Date: Mon Jun 19 11:35:42 2006 +0100 additions for rotation fixes commit 1fe3dd38eb613475d62140850e64767defed7d34 Author: Alan Hourihane Date: Mon Jun 19 11:27:28 2006 +0100 Set some invarient state, cures some problems with rotation at startup. This mimicks the 3D drivers setup. commit 89a5a0024a7e077a0726ffe1427e573df3bcbef5 Author: Eric Anholt Date: Sun Jun 18 00:25:34 2006 -0700 Fix crash with EXA during randr, when XAA structures were being accessed. EXA shouldn't have any issues with there also being pixmaps in framebuffer while rotation is active. commit f2ab3aa3199e1c4b0edec72b5acea6d725cc514a Author: Eric Anholt Date: Sun Jun 18 00:32:01 2006 -0700 Fix DRI in EXA mode: Don't attempt to use XAA symbols (use the driver's internal ones for EXA support when available). Also, add an abstraction of XAA/EXA MarkSync and WaitSync functionality so we don't need to sprinkle the ifdefs all over, and correctly use them. commit 3592b432b48d51d2273c1e1064f85e656fbba130 Author: Alan Hourihane Date: Tue Jun 13 21:42:53 2006 +0100 fix 8bpp & 16bpp rotation modes for i8xx series chips commit a50610b7719bfe800c3496c17d0ba77739167b35 Author: Alan Hourihane Date: Mon Jun 12 13:53:20 2006 +0100 Use 800x600 mode to double check commit f02268b2091c9a785d26e82bcb35a8b713463072 Author: Alan Hourihane Date: Mon Jun 12 12:16:58 2006 +0100 Don't rely on register check to find out if we're resuming - it's not reliable. But then, neither is the BIOS, but it's the best we can hope for until Eric's work is complete. Try setting another mode to cater for some broken BIOS' too. commit 672c3d18dbb405095e465126053ff887d891409e Author: Alan Hourihane Date: Mon Jun 12 10:02:06 2006 +0100 Only mark rotation flags after initial screen setup. Fixes bug #7053 commit 34f6a8204f1edec015283fc6b5f196e47897e3de Author: Keith Packard Date: Sun Jun 4 00:15:06 2006 -0700 Get sDVO output working on mac mini. Add lots of register debugging to track delta from BIOS settings. Fix various mode settings to mirror BIOS sDVO values. Disable analog/lvds output on pipe with sDVO. Borrow Dave Airlie's I830xf86ValidateDDCModes code. Fix various sDVO I2C messages to mirror Dave's code. commit 6812b5382077e5d3f421aceeeb2f337e9b3f570e Author: Dave Airlie Date: Fri Jun 2 12:22:14 2006 +1000 intel: fix VT switch DRI locking The DRI locking is incorrect at VT switch, due to reference counting inside the driver. Just call the DRI directly. commit 3f158fd610a3363a23daa7205bcd9f213686cf1c Author: Keith his master's voice Packard Date: Mon May 29 18:05:57 2006 -0700 Nice texture coordinate gradient, broken slightly in y commit bb0ad04d46eba2fed57a888ff960d2436ec7d70d Author: Keith his master's voice Packard Date: Sun May 28 22:59:58 2006 -0700 Ok, finally something sensible up on the screen. Replace PS kernel with constant data source (pink). Dodge g0/g1 so URB data doesn't land on top of thread data. Flip source/dest coordinates (dunno why they're fetched this way). commit ddf3e5b2737399dca6d401f91db51a51f93b6373 Author: Keith his master's voice Packard Date: Sun May 28 21:03:39 2006 -0700 Using tiny rectangle, still locks up in pixel shader program somehow commit 2e16c79dc2f24b0a04111aa6236a44870c6c64df Author: Keith his master's voice Packard Date: Sun May 28 20:31:23 2006 -0700 Lots more debug code. Appears to execute pixel shader thread now though. hurray! commit 79a514412bda7e38e018c105a603970c4a9d758a Author: Keith his master's voice Packard Date: Sun May 28 16:09:59 2006 -0700 dump out piles of debug. Create VS thread just to see how it works commit 9c111d89fe19f1773af2eefb000e1c2389b4b6e1 Author: Keith his master's voice Packard Date: Sat May 27 19:52:13 2006 -0700 Push all of the obvious Mesa state setting into the video code commit 01101196b16010ac3dadab647bfe7000a53fa94d Author: Keith his master's voice Packard Date: Sat May 27 01:05:09 2006 -0700 flesh out cc state. set cull mode to none. enable sf kernel commit 462a860af89ed855fe2b718342fcaf9c169af3fb Author: Keith his master's voice Packard Date: Sat May 27 00:17:25 2006 -0700 Rename BRW instructions, check video instruction generation. Doesnt lock up, but doesnt display anything either commit 9ec7cf22e3f03c13524bb2d15711699dfcc02984 Author: Keith his master's voice Packard Date: Fri May 26 21:30:55 2006 -0700 Use broadwater video code on broadwater hardware. Pad ring to even length. compute state base as address rather than offset commit f5fe700b9a943c956bcfcc3a0d2de13c23b978bc Author: Keith his master's voice Packard Date: Fri May 26 13:47:39 2006 -0700 Prepare real SF kernel and fake WM kernel commit 1549accb6f52498fef3dcbd87bb72d89fcd5bccd Author: Keith his master's voice Packard Date: Thu May 25 16:10:31 2006 -0700 Scale video source vertices. Allocate space for kernels commit c1c46f882f9a11c383c8d1d1ce393be8fda55ed0 Merge: 1e2da24 f2967a2 Author: Eric Anholt Date: Mon May 22 10:42:24 2006 -0700 Merge branch 'master' into modesetting Conflicts: man/.gitignore commit 1e2da2450d7213c0aa4d4bd1fba5723dcda13ddf Author: Lukáš Hejtmanek Date: Mon May 22 09:48:09 2006 -0700 Replace VBE call to do DPMS with native code, and fix screensaver in clone mode. commit 2a1b3cfccb7de53f7ce8f9e4816e4278afb1fcab Author: Eric Anholt Date: Mon May 22 10:32:13 2006 -0700 Use RECTLIST instead of TRIFAN for video so we get horizontal shearing instead of diagonal. Also remove the unnecessary vertex elements that were being emitted. commit bc42dbe07cbd61b357d8eed02608e026c4cf4485 Author: Wang Zhenyu Date: Mon May 22 11:22:03 2006 +0800 fix a typo commit bce209cd3f60cb5d51aadc5fc8ec1a4151435ec3 Author: Eric Anholt Date: Fri May 19 17:13:37 2006 -0700 Put in code for idling accelerator on subsequent cliprects. commit 3640117bd9f2073ff54dc474f0cdefff49742584 Author: Eric Anholt Date: Fri May 19 17:10:04 2006 -0700 Set up the state buffer in framebuffer. commit e70d99d51edc39ea53536c2f4d62ac622ba3e0d9 Author: Wang Zhenyu Date: Fri May 19 15:47:19 2006 +0800 revert wrong setting for memorySize, which should be at the range of pI830->Offscreen. commit de06cd70a9edb8b56d05d3f505137f7c7f083c2f Author: Eric Anholt Date: Thu May 18 18:27:11 2006 -0700 Checkpoint for filling out more 3D state. commit ad7ec6a24b436d5492d38e4fa56845b229cf5fb8 Author: Eric Anholt Date: Thu May 18 15:26:28 2006 -0700 Checkpoint of BW textured video work, filling out vertex submission stuff and some more other state. commit 291770efc691a02650e3c580ca40c2f9fce3896c Author: Eric Anholt Date: Thu May 18 10:43:07 2006 -0700 Start laying out some of the bits that need to be done for BW textured video. Headers taken from TG code drop. commit b3d79ad9ecc70e9f841092fc75b7e23576b685dd Author: Wang Zhenyu Date: Thu May 18 16:31:40 2006 +0800 oop I830FALLBACK define error commit 1bc2a8f7a20b2ea9251e93157c0f2342fdbb951c Author: Dave Airlie Date: Thu May 18 16:58:22 2006 +1000 fixup I830SDVOGetActiveInputs to use return values not args commit 33ad959323f70f76c494c66ec35a04d7d839f612 Author: Wang Zhenyu Date: Thu May 18 11:32:59 2006 +0800 Add DEBUG_I830FALLBACK for easier tracking commit 52af679c94a25c0c6e5df5f3647f62fdd256c826 Author: Wang Zhenyu Date: Thu May 18 11:31:14 2006 +0800 Check alignment require in PrepareSolid, noticed by Eric, as pixmap offset align set is violated in Solid. commit fdb52a8c6da0f3d3f4cfbf1583b2dc4d91f7e933 Author: Wang Zhenyu Date: Thu May 18 11:24:46 2006 +0800 Solid planemask in PrepareSolid/Copy might be 0xffffffff or bits up to the depth. This should save some fallback case, noticed by Eric. commit bc51d6525a12c748d0a293b7e560f6dcea33eecb Author: Eric Anholt Date: Wed May 17 13:42:51 2006 -0700 Turn off overlay video on BW until we have stable PCI IDs so we can know whether the hardware supports overlay. commit f97895efd5532cca145b6f224f9615739b1e8f26 Author: Dave Airlie Date: Wed May 17 14:46:37 2006 +1000 fixup chipid override This makes the ChipID override work so that we actually override the pci id that gets used everywhere in the driver. commit 011a1c99d49c1c69b5fa81ade6a2ed73e84276ae Author: Wang Zhenyu Date: Wed May 17 11:16:00 2006 +0800 Fix memorySize to enable offscreen mem manage. commit b0ac5303f33f75dc607cf0c705c23db1da836983 Merge: 4c72725 c2cd10e Author: Eric Anholt Date: Tue May 16 15:21:17 2006 -0700 Merge branch 'textured-video' into broadwater-video Conflicts: src/i830_video.c commit c2cd10e1fba0e75c0ed3db5d17211bddf7ab1e33 Author: Eric Anholt Date: Tue May 16 10:08:58 2006 -0700 Flag the 3D state as dirty when we draw textured video, which should help rotation (I have other issues with rotation anyway). commit 63a72e46fa20a4a4ba74efed386f6c3c167be5b5 Author: Eric Anholt Date: Tue May 16 08:54:43 2006 -0700 Turn debugging back off. commit 01c043de0393170e98515169f8239fef4d3e2053 Author: Eric Anholt Date: Tue May 16 08:53:40 2006 -0700 Use linear min/mag blending. commit db3683907d15959e79adfb8f0cd94e861fae5c36 Author: Eric Anholt Date: Tue May 16 08:40:53 2006 -0700 For textured video, disable double buffering and sync before uploading new video data. Allows more videos to play simultaneously. commit 29a8e88ed01c9e15a2ceba5eb62b19773e14c1f8 Author: Eric Anholt Date: Mon May 15 17:19:33 2006 -0700 Relax the alignment requirements for textured video. commit c9be11459bc2198b435c97c5a3432425246c4d2d Author: Eric Anholt Date: Mon May 15 17:04:27 2006 -0700 Enable overlay and/or textured video at runtime according to hardware capabilities. Sets up 16 textured-video ports. Left in one hack (disconnected but advertised BRIGHTNESS and CONTRAST atoms) which may actually not be necessary. commit f268979a0c779641c84e8d5b763acbda131474cf Author: Eric Anholt Date: Mon May 15 10:05:19 2006 -0700 Correct drawing issues with planar formats when top or left != 0, and Y didn't get its offset. commit b09fd42d7088ead6c23e040ac4b71114f62de82b Author: Eric Anholt Date: Mon May 15 09:29:43 2006 -0700 Fix the planar formats to display correctly in textured mode. Still has issues with clipping, and some sampling differences between ximagesink and xvimagesink. commit dd48790f4600a880fc4907c6e3b1cd51e9c0f0b7 Author: Eric Anholt Date: Fri May 12 13:27:33 2006 -0700 Divide width by 2 in planar-to-packed conversion loop, since each pass through the loop writes two source pixels. commit eec5e996ec9361099bf81d8d3b66933d5981c5a8 Author: Eric Anholt Date: Thu May 11 20:26:26 2006 -0700 Merge textured-video-wip to textured-video-planar-full. commit 4154a2f74811b91c0ef5bef32a919d6f8baf1a70 Author: Eric Anholt Date: Wed May 10 12:09:00 2006 -0700 Experimental work to use a full pixel shader for planar to YUV conversion, which also doesn't quite work. commit 3e0a9c9082942eb6f52612235d84b8408e1e03e9 Author: Eric Anholt Date: Tue May 9 16:57:19 2006 -0700 Do a separate BEGIN/ADVANCE_LP_RING set in the planar vs packed blocks, so I can adjust the planar code more easily. commit 3af4a967e73b367bb531f2760b4803db1388bcf9 Author: Eric Anholt Date: Tue May 9 16:50:48 2006 -0700 Add a couple of macros to simplify writing of video pixel shaders. commit 06e62ec521ed3f7ed232ace8e188891bedb53097 Author: Eric Anholt Date: Tue May 9 12:04:58 2006 -0700 Commit a WIP implementation of the planar video shader that does the planar-to-packed conversion for us. Unfortunately the documentation is unclear, and I haven't managed to get any implementation of it working correctly. commit b1090a42b200710628dd8b0c7ced15db7bbe71a1 Author: Eric Anholt Date: Mon May 8 14:22:00 2006 -0700 More magic number reduction in rotation code. commit 3a2d8af214a79591322ce6e5546f856a1ee41736 Author: Eric Anholt Date: Mon May 8 09:42:40 2006 -0700 Add initial textured XV support for i915, which can do YUY2 and UYVY, but fails on I420 and YV12 currently, doesn't support the composite extension, and should break XV support on non-i915. commit 66875c1559bc20b531ab72e5d6b921d9f50b29f3 Author: Eric Anholt Date: Fri May 5 10:15:23 2006 -0700 Convert magic numbers in i915 rotation 3D state to symbolic names. commit 4c727254da354cfd6f35148a334d046d67a50e99 Author: Eric Anholt Date: Fri May 12 16:26:58 2006 -0700 Remove the local, renamed copy of lnx_agp.c. The diff between lnx_agp.c and it appeared to be removal of bugfixes. commit a115c4b872a385530dcf94b7e7f2fa9b3b7e3155 Author: Eric Anholt Date: Fri May 12 16:11:29 2006 -0700 Remove the code that changes our behavior based on whether a magic file exists with magic contents in /tmp (created by some install script). commit 0cb251fadca1cbb3d4c5b97982cd0d8c2fc3e840 Author: Eric Anholt Date: Fri May 12 16:10:02 2006 -0700 Do a couple of reverts to get the DRI code building. At this point, the whole driver builds. commit 78b95386b630039864b31954ebcd02ec8829b0c8 Author: Eric Anholt Date: Fri May 12 16:09:40 2006 -0700 Remove intel_randr.c and stick with the previous code. Broadwater shouldn't be changing our randr, and the new version didn't compile. commit 2e58aa401dfbab438752038a9034df571c8f8bde Author: Eric Anholt Date: Fri May 12 15:54:37 2006 -0700 Make the intel_acpi.c code non-modular and make it compile. I think we'll end up nuking this code anyway, as keithp (and I, as well) disagree about how ACPI should be handled, but the goal is to compile at the moment. commit 2cd6c8fa2321ca217ef89db1027dbe9e716ad7aa Author: Eric Anholt Date: Fri May 12 15:37:44 2006 -0700 Revert internal shadow module changes back like master, along with RandR initialization. RandR initialization retains the no-rotation setting for BW. commit 88558ebeed12d6cefd73bba0ddac3c043861ac89 Author: Eric Anholt Date: Fri May 12 15:00:17 2006 -0700 Start fixing up the build and remove a regression from master (I think) in rotation. commit 9e387ef92be9b38c68bda8a6a28b0d9eb98d53a4 Author: Eric Anholt Date: Fri May 12 13:41:38 2006 -0700 Re-add authorship note in i830_driver.c accidentally left out of last commit. commit af2432322ba1d561057c34ab185561a8e799e8cd Author: Eric Anholt Date: Fri May 12 13:32:38 2006 -0700 First pass of integrating the Tungsten Graphics driver for Broadwater. This patch is based off of diffing from the branchpoint to the supplied code, but with many chunks containing reversions of commits removed. Won't work yet. commit fbba4312e7cb326fdcf6a71194c4fc4a7a9b5488 Author: Dave Airlie Date: Fri May 12 18:44:27 2006 +1000 add sdvo capability reading support This reads the SDVO cap bits and uses them to figure out the input/output to save/restore commit f2967a2f5f47b636b2445fa69dbc3ec79e065c90 Author: Keith Packard Date: Tue May 9 13:51:25 2006 -0700 Video overlay gamma bounds checking must be done bytewise. Also, pend bound computations to register writes to allow updates to individual values that are 'out of spec' so the client can update multiple values. (cherry picked from 190f9ad0606e96e684e0b028d576d822dc9aa3cf commit) commit 190f9ad0606e96e684e0b028d576d822dc9aa3cf Author: Keith Packard Date: Tue May 9 13:51:25 2006 -0700 Video overlay gamma bounds checking must be done bytewise. Also, pend bound computations to register writes to allow updates to individual values that are 'out of spec' so the client can update multiple values. commit fb10966e9f43f44488097b0daf2fbe10c6a804dc Author: Eric Anholt Date: Thu May 4 18:52:08 2006 -0700 Use xf86int10Addr() when calculating an address to read the video BIOS from, out of int10's copy. Fixes a crash on FreeBSD. commit a66f2c01f7d557d860883346671fb864807dbdca Author: Eric Anholt Date: Mon May 1 12:35:21 2006 -0700 Stop doing the BIOS memory size tweaking now that we don't ask the BIOS about what modes are available. commit 99b0e53244aa49f4e7461a1c96aba69453b3516f Author: Matthieu Herrb Date: Mon May 1 10:47:09 2006 +0200 Fix non-dri build. commit 86f0119f47d8be975016ffdea850f0227e32eebc Author: Matthieu Herrb Date: Mon May 1 10:41:10 2006 +0200 Fix non-dri build. commit fcec956807038a2e90287850df8b4410b1f8b3c2 Author: Wang Zhenyu Date: Sat Apr 29 10:55:25 2006 +0800 Save initialize EXADriverPtr, and free it in failure. commit 0be9bc604420e4433697cc31e8ac58c9f36185e1 Author: Wang Zhenyu Date: Sat Apr 29 10:54:02 2006 +0800 I830CheckDevicesTimer() sync should be in I830_USE_XAA case. commit a00a3d198aee7c173c2c36858f4447e13c86eb7f Author: Wang Zhenyu Date: Sat Apr 29 10:52:45 2006 +0800 fix I830BIOSAdjustFrame() sync in I830_USE_EXA case, use exaWaitSync() helper. commit c94cc67bcc507e8256ae4b51b84dfe3f4aa12ab5 Author: Eric Anholt Date: Fri Apr 28 15:33:57 2006 -0700 Update to EXA 2.0 API. commit a4a4ced50cc235e79013ce8dd78e35c6eb4c98ca Author: Eric Anholt Date: Fri Apr 28 14:59:52 2006 -0700 Get it to compile. commit 941a49f91eac02e256706d8821a2cb069ff7ffef Author: Eric Anholt Date: Fri Apr 28 14:57:03 2006 -0700 Commit what applied from Jesse Barnes's i830-exa-latest.patch. commit a555e28e5afc81969ef7b28482e654cc26b3a446 Author: Eric Anholt Date: Mon Apr 24 16:55:44 2006 -0700 Correct some SDVO-related register definitions. commit cc70e6b789a1901bbe4e3501b6b654542d3cdc20 Author: Eric Anholt Date: Mon Apr 24 16:49:48 2006 -0700 Save/restore the output's SDVO reg. Note that we might be programming the other SDVO reg instead of the one assigned to the output. When trying to fix that, I ended up getting no output at all. commit b498d2b1d1170123595ada65353428578b59a361 Author: Eric Anholt Date: Mon Apr 24 15:42:46 2006 -0700 Start trying to save/restore SDVO state on VT switches. commit 56c1f8b0de9b6acc50f51561caf14d3e6bac09ec Author: Eric Anholt Date: Mon Apr 24 14:10:20 2006 -0700 Clean up some argument passing, and remove extra SetTarget{In,Out}Puts that had no effect. Note that we are currently trying to program both outputs of any SDVO device the same way. commit 9ba5319b36e7286e33cf0dcdd804dfc0458a81f5 Author: Eric Anholt Date: Mon Apr 24 13:55:05 2006 -0700 Only write out as many arguments as the commands need, and fix up the numbers in some cases. Pretty-print the return status. commit d32514aee4b00b035652830e8b5e6c0b43cf159c Author: Eric Anholt Date: Mon Apr 24 12:21:45 2006 -0700 Start trying to implement DDC over SDVO. It's slightly tricky because the control bus will reset from DDC mode to internal-registers mode after every Stop afer a Start on the DDC bus. The xf86 DDC code causes multiple Start/Stops in one probe. So, we create a wrapper bus that does the control bus switch at every Start. It's not working yet on my hardware, but I'm pretty sure this is the right way to go. commit effab21c3d108fac7a4e28ae4dabb0b5f74a5380 Author: Eric Anholt Date: Mon Apr 24 11:42:24 2006 -0700 Set displayWidth to a sufficient value for the modes we come up with for LVDS. Reported by: Lukáš Hejtmánek commit bcb441225d1365435bc3373901180de944298e86 Author: Eric Anholt Date: Mon Apr 24 10:54:45 2006 -0700 Simplify the i2c code by using the GetBits/PutBits interface rather than reimplementing it. commit 47bd9059431eadfd8824e496eb91bb50efa0e282 Merge: 729c373 32a0ad5 Author: Eric Anholt Date: Mon Apr 24 10:36:24 2006 -0700 Merge branch 'lukas-resume' commit 1dbb19059f5dd5cd2ad386c4f73498095987b943 Author: Alan Hourihane Date: Thu Apr 20 10:43:19 2006 +0100 fix bug 6365 commit 729c373121ce2bbb0d813cc923f1254e8b37a025 Author: Dave Airlie Date: Thu Apr 20 13:34:55 2006 +1000 move sdvo output setting we have to set the sdvo register a lot earlier in order for them to sync properly otherwise my monitor doesn't sync unfortunately, also disable the sdvo while tweaking the PLLs. This also comments out a setting that seems to break my system here for Eric to look at later. commit 0ba7b13fb4410c6a48b2fb098d2033e040eca6d2 Author: Dave Airlie Date: Thu Apr 20 12:29:06 2006 +1000 fix type 0 instead of O commit 2991d81a3b643161babab6b8f44c057aaaf351c3 Author: Dave Airlie Date: Thu Apr 20 12:27:47 2006 +1000 correct height parameter in sdvo packet commit b5f099e03a9f58b6b99933fb06526bce4db72bd3 Author: Dave Airlie Date: Thu Apr 20 09:50:36 2006 +1000 cleanup sDVO for device on C only This destroys the i2c device properly if the device isn't detected, and allows sDVO to work on GM chipsets, and doesn't initialise the i2c bus twice for sDVO. commit 2909802de63756972b38651a496b4ff1b36ac8a2 Author: Eric Anholt Date: Wed Apr 19 16:29:06 2006 -0700 Clean up SDVO initialization, include config.h, and make it check the right slave address on the first device as well. This gets me to the point of bringing up some modes on my device. commit 32a0ad570d9c010e7d26d980830f719782d9f2f3 Author: Lukáš Hejtmanek Date: Wed Apr 19 19:43:45 2006 -0300 Add more registers to save/restore. Save/restore palette as well commit 132dc0599cf44389c4cc03919f1da8d3a0762b44 Author: Eric Anholt Date: Wed Apr 19 15:04:17 2006 -0700 Whine if SDVO I2C device init fails, rather than be silent. commit 88bb4b578857588f34ac84b7a20577139eccab6d Author: Eric Anholt Date: Wed Apr 19 14:23:45 2006 -0700 Add more SDVO code. It's taken from airlied's driver, but with magic numbers replaced by symbolic names in many places. I tried to restrain myself from functional changes in airlied's code in this pass. commit d8f7dfac769d7b03f069306b1296bb2e1e08b009 Author: Eric Anholt Date: Wed Apr 19 10:45:13 2006 -0700 Start bringing in some SDVO code, mostly from airlied. commit a371a04a57620b7128e3c4395bc7c2ac55effe19 Author: Eric Anholt Date: Mon Apr 17 14:10:50 2006 -0700 Use the IS_I9XX macro intead of >= i915G, since by PCI ID number, 855GM > 915. commit 33413a3cf34b06e3207fe1cdb733d586d55a4337 Author: Eric Anholt Date: Mon Apr 17 13:42:57 2006 -0700 Remove some dead code and one particularly useless debug printf. commit a85be820033af8bf30d1fec4a899349af35a6ef6 Author: Ian Romanick Date: Mon Apr 17 12:52:30 2006 -0700 Add missing new-line character in log message. commit 365b4a53ee965002a5452e6f6016b528e51cee69 Author: Eric Anholt Date: Mon Apr 17 01:12:28 2006 -0500 Disable the BIOS dump-to-file since it's a trivial local DOS, and I can just ask people to turn it on and recompile when I need to. commit ee7be006b63b6b1ce7f786b045fb8f26d337433c Author: Eric Anholt Date: Sun Apr 16 13:13:42 2006 -0500 Bug #6589: Use alternate offsets to successfully get at the panel data for some broken video BIOSes. commit 786ee3df1726f08953167d05f7fa1930452703bb Author: Eric Anholt Date: Sun Apr 16 13:05:35 2006 -0500 Add a standalone program for parsing VBT. commit 62652127cd12f5a0fc9364285b81d2661372148a Author: Eric Anholt Date: Sat Apr 15 12:16:46 2006 -0700 Check for LVDS BIOS tables exactly once at startup. While there, dump the BIOS data to /tmp/xf86-video-intel-VBIOS, for offline debugging. commit 830fa81792a613fe2127a2b89a3eaa326f56114c Author: Alan Hourihane Date: Wed Apr 12 21:55:31 2006 +0100 fix typo commit 3c9bc19db63a317db9e2d67a5bc15b1de1a1060a Author: Alan Hourihane Date: Wed Apr 12 21:54:50 2006 +0100 fix typo commit d6edffee7d987ef551e1a94d9fac21beb72a9598 Author: Eric Anholt Date: Wed Apr 12 12:16:51 2006 -0700 Initial support for pre-i915 PLL programming. Untested. commit 59f88955f57cf0f98458b57418dae25cf53ca180 Author: Eric Anholt Date: Wed Apr 12 11:11:14 2006 -0700 Automatically enable clone mode if we detect two active outputs. commit a797a6626a8117cd16456a206ed96300e4a0ceeb Author: Wang Zhenyu Date: Tue Apr 11 16:44:42 2006 -0700 Fix a broken test that resulted in page flipping always being enabled, not just when the user enabled it. commit 66d216da3bfe7c143d681b610130e6daf6dfa52f Author: Eric Anholt Date: Tue Apr 11 16:37:10 2006 -0700 Replace .cvsignore with .gitignore. commit 185b5251419724fa9377421d67981daa674908c8 Author: Eric Anholt Date: Mon Apr 10 20:25:13 2006 -0700 Add missing MIT copyright licenses, which should have been on all versions. commit c0a2dc608d95f92b0f5a151c623745f09df3afc5 Author: Keith Packard Date: Mon Apr 10 20:09:37 2006 -0700 Save/restore PFIT_CONTROL. Eliminate compiler warnings commit 498abf474b90b04bc4085397a209cc493d98d15c Merge: c26f073 3de82ff Author: Keith Packard Date: Mon Apr 10 19:41:50 2006 -0700 Merge branch 'modesetting-origin' into modesetting commit c26f0737e2c0f000f67f21ef6007b351160036a4 Merge: 11ad8a5 692a4a4 Author: Keith Packard Date: Mon Apr 10 19:41:41 2006 -0700 Merge in master to modesetting commit 3de82ff3938c6559c90079be0c28dc507d62f79e Author: Eric Anholt Date: Mon Apr 10 15:10:15 2006 -0700 Improve LVDS modes when outputting a CRT+LVDS combo at larger than the LVDS's panel size. This is a hack until we get better clone mode, but it correctly displays a subset of the root on the LVDS by using a correct pixel clock and pipe/display size. commit 692a4a4bafd4cab197b761cda22368581b78f996 Author: Adam Jackson Date: Mon Apr 10 11:27:25 2006 -0700 Bump to 1.6.0. commit 43c93057c044f33c20b1dd639eaeabefc0901589 Author: Aaron Plattner Date: Mon Apr 10 11:26:33 2006 -0700 Add a DrawablePtr argument to the XV functions to pave the way for redirected video. commit 39bdfbb4c23c9ba2a44888f22330a892c4becedc Author: Alan Hourihane Date: Mon Apr 10 11:26:06 2006 -0700 x86_64 warning fixes commit 11ad8a590d65849be00e1be4e9dd52c1159a4f24 Author: Eric Anholt Date: Mon Apr 10 09:39:24 2006 -0700 Remove the int10 POST on EnterVT. It has been reported to cause crashes now, and I believe it is the responsibility of the kernel to bring the device back to a mostly-sane state on resume anyway. commit 4217ce18cec257cad435adf9ddc9258a3c8164ec Author: Eric Anholt Date: Mon Apr 10 09:37:02 2006 -0700 Warnings cleanup. commit 334512e0604c208ffec914374a76d85720c1dcf9 Author: Eric Anholt Date: Mon Apr 10 09:32:45 2006 -0700 Don't try to use LVDS by default on chipsets that won't have an LVDS attached. The BIOS tables may still exist, so we can't rely on their presence to indicate LVDS attachment. commit 69083a2fc3ca4a3d06c1985c8a630d5628c1110c Author: Eric Anholt Date: Mon Apr 3 16:29:14 2006 -0700 Remove BIOS save/restore code, fixing VT switching. Removes some other dead code, too. commit 2e5d85fb83def483ab1fd96877aae4a89a962b7f Author: Eric Anholt Date: Mon Apr 3 16:27:24 2006 -0700 Turn off the VGA plane when we're setting our native modes. commit ceb08d28f4a4e9f42c9417938b8541bf1b4e8245 Author: Eric Anholt Date: Mon Apr 3 15:32:41 2006 -0700 Remove the hacky-looking Set640x480. I'll be removing things it depends on (setpipe), and I suspect we'll end up with different hacks for resume, anyway. commit 1f0ba458d02f7d4777c1669aae02138f3a6628c1 Author: Eric Anholt Date: Mon Apr 3 15:28:47 2006 -0700 Remove more BIOS stuff, particularly Get/SetDisplayDevices. Now, if there's no hardcoding in the config file, we default to LFP if we detect it from BIOS, and LFP or CRT if we can get EDID out of them. commit b20b466aaed54708ae9e4676623c8c394a6f00d5 Author: Eric Anholt Date: Mon Apr 3 14:28:55 2006 -0700 Remove the now-unused displaySize and pipeDisplaySize. commit d960c3ca1512a58a53b5c24702cb5c97124817ee Author: Eric Anholt Date: Mon Apr 3 14:12:29 2006 -0700 Remove more BIOS modesetting stuff. commit 4e3a4827007d624aa3da1a9f5a299837bd601a33 Author: Keith Packard Date: Fri Mar 31 14:05:46 2006 -0800 autodetect LVDS dither. Fix 16bpp depth selection commit 8d27f8246ed5a73f7a78043e128b47be784186c0 Author: Eric Anholt Date: Tue Mar 28 13:49:41 2006 -0800 Clean up (and I believe fix a couple of bugs in) the divisor selection code. commit e45581cd073b23a62719f20783d617bd35316fec Author: Eric Anholt Date: Tue Mar 28 13:40:32 2006 -0800 Fill in clock information from VBT table, so that a good clock value gets requested for choosing divisors. commit 33977d23830b5f9bb7d9e2e9c141f91cb127b7de Author: Eric Anholt Date: Mon Mar 27 18:50:53 2006 -0800 Port code from radeon driver for panel mode validation, which will hopefully get the right mode chosen on the VAIO. Untested. commit febdfa967dbe1df487db71ba5f677ef37450bf7a Author: Eric Anholt Date: Mon Mar 27 15:19:52 2006 -0800 Remove some VBE DDC code that I believe is OBE. commit f86892c9163473a683ab591adeb9fb1c0be2ef99 Author: Eric Anholt Date: Fri Mar 24 16:00:30 2006 -0800 Make auto panel fitting work by pulling LVDS timing EDID info out of the static BIOS table, and always using that. commit f6a3243f40074aee471ec1cda2cc8e5f05116284 Author: Eric Anholt Date: Fri Mar 24 13:49:10 2006 -0800 Add more VBT reading, so we find the panel size. commit 64756e215016730b5cc2e174f08d47c0288c0ba4 Author: Eric Anholt Date: Fri Mar 24 11:55:01 2006 -0800 Start interpreting VBT information with the goal of pulling out LVDS timings for panel fitting. commit c2d554be671f5368bd98867b8ecf9428e4560a81 Author: Eric Anholt Date: Thu Mar 23 14:33:04 2006 -0800 Save/restore a couple of important VGA plane registers, and have vgahw save/restore everything it knows about. Also moves the save to just after the other reg saves, above the VBE save stuff which may have side effects. commit 8411c126ae66239f8b3a2261e338a723c36aa44f Author: Eric Anholt Date: Thu Mar 23 11:31:24 2006 -0800 Update to newer airlied DDC code, and do some cleanups as well. Now tries DDC on LVDS, though my current LVDS gives no results. commit 6414ad89b9d368a032adf2358a65404f5443ef35 Author: Eric Anholt Date: Thu Mar 23 09:48:18 2006 -0800 Add enough of airlied's DDC/I2C work to pull EDID info from my CRT. commit 5215e19af58f5c2746c8d281e33ecee86e55f0a5 Author: Eric Anholt Date: Mon Mar 13 10:29:51 2006 -0800 Add some register information for VGACNTRL, and do the reg-debug thing on it. commit b77bdc2c15640a3b15233f2190179d66bc8b2a4b Author: Eric Anholt Date: Wed Mar 8 15:08:06 2006 -0800 Move the PFIT enabling before the enabling of the pipe, as the specs say we should. This doesn't work yet, as we apparently need to adjust the pipe to output at the full resolution of the panel, not the displayed image size, because PFIT controls scaling between the display planes and the pipe. commit de4a9e4a7891daa1488d17bf4c22283759f97373 Author: Eric Anholt Date: Wed Mar 8 12:54:14 2006 -0800 Add a couple more bits to panel auto-fitting, though it isn't working yet. commit 02341aa68cf2171e037196019f2553f0d1b1bd0d Author: Eric Anholt Date: Mon Mar 6 13:23:29 2006 -0800 Make the reg-snapshot code work, add a couple more registers, and use it on VT switching to hopefully help point out where we aren't restoring enough. Currently doesn't reveal anything. commit 2b6fc7ddb020a5511f6f599a2f5c37db27eddbcc Author: Eric Anholt Date: Fri Mar 3 15:42:15 2006 -0800 Add missed save/restore of DSP*SIZE registers. commit 12ce799818722473dde2f82739d50ba4ec7f6ecd Author: Eric Anholt Date: Fri Mar 3 15:38:31 2006 -0800 Add some untested debugging code to for helping figure out VT switch issues. commit 585cc5f256b8e91460414a26409d0e484a86718c Author: Eric Anholt Date: Fri Mar 3 10:37:26 2006 -0800 Add more integrated LVDS support code. commit 33c62e8e654fa2228bc3fd31ec0fe010703f363a Author: Eric Anholt Date: Thu Mar 2 17:53:38 2006 -0800 Change the order of reg writes for restore, possibly increasing chances of success. Also save and restore ADPA. commit 7f4dc09dcafc7f0423b7f3e970a0b19fbbf515dd Author: Eric Anholt Date: Thu Mar 2 15:55:18 2006 -0800 Remove some dead VBE code. commit f3ec8653ab4c9b26d249bcf4393326de37ac8321 Author: Eric Anholt Date: Thu Mar 2 14:31:39 2006 -0800 Include config.h, fixing many issues with reading from pI830. commit 84fc3971d76f78546a0bb7dd57dba52dd893a921 Author: Eric Anholt Date: Thu Mar 2 13:35:40 2006 -0800 Turn off panel power before poking pipe B, and turn it back on if we're doing LVDS. Also, refuse to do LVDS on pipe A, as the docs say you can't. commit aca0f942f377d997c5c0b5be790ee7f255d6e046 Author: Eric Anholt Date: Thu Mar 2 13:31:51 2006 -0800 Fix prototype for i830DetectCRT. commit df6347139bc9de22af981f776d711ac9d44fad1c Author: Eric Anholt Date: Thu Mar 2 12:52:19 2006 -0800 Use DISPPLANE_32BPP_NO_ALPHA for depth 24, else the empty alpha channel results in a black display plane. commit 8e819ced8397f0330fd44efa60fef89bd10ff70e Author: Eric Anholt Date: Thu Mar 2 11:55:00 2006 -0800 It appears from the specs that you have to wait for vblank after disabling the plane, not the pipe. commit ee2410b965321e3d9d64fc500fdcfa6d6dc3a039 Author: Eric Anholt Date: Thu Mar 2 11:43:41 2006 -0800 Move display base setting to a separate function and use it from both mode setup and AdjustFrame. Rename AdjustFrame to reflect the fact that it doesn't touch the BIOS. commit 980fb78e759b752a6cae3c87d188c50ab131ba80 Author: Eric Anholt Date: Thu Mar 2 10:49:31 2006 -0800 Correct capitalization of i830SetMode. commit 2b842c7ee3f9c33cabf16561f11bf1c3a2502d4a Author: Eric Anholt Date: Thu Mar 2 10:08:20 2006 -0800 Start implementing support for setting modes for multiple output devices, particularly LVDS. Untested. commit a09d9cf27af7016bbd9e562c7b1c338154fd3d40 Author: Eric Anholt Date: Thu Mar 2 09:05:13 2006 -0800 Replace I830VESASetMode with simpler i830SetMode, which is all native and doesn't have BIOS-setup workarounds. Multihead behavior may be wrong, and it is all untested. commit 7edb25789bd13f26134e8f5bf493897c8df322e0 Author: Eric Anholt Date: Wed Mar 1 14:02:51 2006 -0800 Start making i830SetMode aware of multiple pipes. commit b5915ac77a3887cd3aa4ce0bb77b8a36e1aa5a1b Author: Eric Anholt Date: Wed Mar 1 13:12:25 2006 -0800 Clean up a couple of warnings. commit c20e15fbe4daeb7288f5c56cf5467eed13686080 Author: Eric Anholt Date: Wed Mar 1 13:08:38 2006 -0800 Disable I830VESASetVBEMode on restore, since I've removed that code. Note that this means that VT switching is broken. We're fine with that for now, but at least now we get a bad display rather than X crashing about an undefined symbol. commit 7d37c5036956609d0c7ae874d0dc1c616f76f849 Author: Eric Anholt Date: Wed Mar 1 13:06:04 2006 -0800 Re-disable chatty debug code. commit 2538cbeb5014e40280a3ae782a755512b1dc85fa Author: Eric Anholt Date: Wed Mar 1 13:01:52 2006 -0800 Enable -Wall on GCC, and do a cleanup of existing warnings. commit 7746da3b346968ab8d2534fc158d026da67cc7b5 Author: Eric Anholt Date: Wed Mar 1 12:49:06 2006 -0800 Move LVDS panel power state setting to a separate function, and reduce magic numbers. commit 142bc4f91a5d776e7ab44cc5fb2328e3f7267557 Author: Eric Anholt Date: Tue Feb 28 18:50:57 2006 -0800 Write the ADPA (CRTC) register on mode setup. Obtained from airlied. commit 6877f532c5f41a445d41eb6a9982bf6bcf691bf2 Author: Eric Anholt Date: Tue Feb 28 15:56:06 2006 -0800 Add untested CRT detection code. commit a085813714818a23aa8d326804f642cd699e0f17 Author: Eric Anholt Date: Tue Feb 28 15:16:59 2006 -0800 Add adjustments of PLL divisor limits for "Almador". commit 2d4415ff1729554537b20be2b6c878444485e406 Author: Eric Anholt Date: Mon Feb 27 16:57:43 2006 -0800 Remove the hacked local xf86SetModeCRTC now that xf86SetCrtcForModes is taking effect on all of our modes. commit 611264ab9b82bca6648a9b27e5ba4b7457c46aa6 Author: Eric Anholt Date: Mon Feb 27 15:44:11 2006 -0800 Remove more VBE stuff and start using xf86ValidateModes. Guessed some params to xf86ValidateModes. commit 9838f639911e8c165ab615fdd9a00e02fa4b3f8a Author: Eric Anholt Date: Mon Feb 27 14:12:50 2006 -0800 Always ErrorF output debugging info when doing BIOS calls, including file/line. commit 767944e3782f9941e9fc72a6705cc3115a6e24ac Author: Eric Anholt Date: Mon Feb 27 13:08:46 2006 -0800 Replace a few magic numbers with symbolic names. Reviewed by md5. commit 4955cd267e7f8ed70e90b2a3de6f93de2ef859c8 Author: Eric Anholt Date: Mon Feb 27 09:37:47 2006 -0800 Add untested save/restore code, and starting on not using VBEValidateModes commit 73496b765c9783a8a271b4774a44fa263dd47684 Author: Eric Anholt Date: Mon Feb 27 09:26:51 2006 -0800 Change an if statement to a more obvious but equivalent case statement. commit 9fe316da7390918dd88940087567314b6f253981 Author: Eric Anholt Date: Thu Feb 23 13:49:31 2006 -0800 Add the manpage's possible names when generated. commit 1555229f29fa7479d6a7a51f451d04a5ef3460bd Author: Eric Anholt Date: Thu Feb 23 13:48:26 2006 -0800 Move .cvsignore to .gitignore commit 139d33ac807fb0fc35c37c3689a6e80238199442 Author: Eric Anholt Date: Thu Feb 23 13:46:30 2006 -0800 Initial add of native CRT modesetting code. commit 35e4756645891bfc85f25f1ab60c287eba9ef749 Author: Dave Airlie Date: Wed Apr 5 07:12:00 2006 +0000 Fix some argument inversions in xf86DrvMsg function calls commit 6e5f9b026372eea295c390b18fc41f7018e0e797 Author: Kristian Høgsberg Date: Tue Apr 4 18:22:32 2006 +0000 Add more missing #include's, in particular assert.h. commit fdfce49c54dabf0f6b0d20aa7e5eeb62b5b57eda Author: Kristian Høgsberg Date: Wed Mar 22 23:24:03 2006 +0000 Drop libc wrapper; don't include xf86_ansic.h and add includes now missing. commit 58817c9909ba659d0070afab0ff7f4e26f722403 Author: Alan Hourihane Date: Fri Mar 10 13:07:00 2006 +0000 Enable gamma for hw cursor when ARGB cursor in use (Lukas Hejtmanek) commit ab4c2f3bf4b26fdd597ea7b7a726ae77778617b2 Author: Alan Hourihane Date: Fri Mar 3 16:27:37 2006 +0000 Check the version of shadow being used and turn off rotation if it isn't the right one. Bump the Xvideo resolution support from 1920x1080 to 1920x1088. commit be6216cd8c6a47dd053240f7a5d1445b61f79038 Author: Alan Hourihane Date: Mon Feb 20 03:25:50 2006 +0000 Fix a rotation problem when DRI is disabled commit 073c4a6a18e98e2dde114756b5d787b13bb2b7a5 Author: Alan Hourihane Date: Mon Feb 20 03:22:26 2006 +0000 Fix a rotation problem when DRI is disabled commit 7cca2ae73e0114a9df2152ed5ed5b66fc44f65dd Author: Alan Hourihane Date: Sun Feb 19 00:04:49 2006 +0000 fix another build problem commit 2e01277da0be55687ca901efadcaf5c919826824 Author: Alan Hourihane Date: Fri Feb 17 16:16:10 2006 +0000 fix build failure commit 86fa25369353471dc9a1041df74e66e9029863a7 Author: Alan Hourihane Date: Wed Feb 15 18:31:22 2006 +0000 a little more of a workaround until we unplug the frontbuffer from libdri commit 32f97e02ac3611fd5e3870826dedf701f3b69a51 Author: Alan Hourihane Date: Fri Feb 10 21:59:37 2006 +0000 temporary workaround until DRI frontbuffer mapping code is removed from libdri.a commit 50e5c2696389cb4d5907a822aa79d5e0e03cee8c Author: Alan Hourihane Date: Thu Jan 26 09:55:15 2006 +0000 update Changelog commit 91d2ba5743041077754de3bd3565df930b036c7d Author: Alan Hourihane Date: Thu Jan 26 09:05:50 2006 +0000 add changelog commit 076971b95ed3b89e1a333adbffceab1c2a5b7743 Author: Alan Hourihane Date: Wed Jan 25 22:22:42 2006 +0000 When going dual head only take a portion of memory for the second head instead of doubling the requirements. commit 77d1c579f3031789031dd203175d3c9555226f79 Author: Alan Hourihane Date: Wed Jan 25 22:17:00 2006 +0000 Fix a glitch in a dual head fix from #3105 commit d8d749080923e88376db1aa18ae2ad722d5113d9 Author: Alan Hourihane Date: Tue Jan 24 15:20:34 2006 +0000 Bump version to 1.5.0.0 Add Intel 945GM support Add RandR rotation support (full 3D acceleration, HWcursor & Xvideo rotated too) Remove shadow framebuffer rotation code Add a new LinearAlloc option to allow more offscreen memory to be allocated for XVideo applications. This allows HDTV movies to be played via Xvideo. commit 919d36b6717e9a7d930c5120309778da7b0fe16c Author: Kevin E Martin Date: Wed Dec 21 02:30:00 2005 +0000 Update package version for X11R7 release. commit 92962f32fccac6df751268190928d8becb558b64 Author: Adam Jackson Date: Mon Dec 19 16:25:53 2005 +0000 Stub COPYING files commit d2ef609211306b6bd3861c0e5f6d3a9af3e145fb Author: Alan Coopersmith Date: Mon Dec 19 09:07:50 2005 +0000 Typo fixes, mailing list & url updates, and other changes to prepare for X11R6.9 & 7.0 releases. commit 1c51ff5c652690d66d1f7cba803c0bb26208b509 Author: Kevin E Martin Date: Thu Dec 15 00:24:17 2005 +0000 Update package version number for final X11R7 release candidate. commit c5007a4b46ffb66f5d98abe8bcae6df8c6eb1b31 Author: Kevin E Martin Date: Tue Dec 6 22:48:35 2005 +0000 Change *man_SOURCES ==> *man_PRE to fix autotools warnings. commit 15df4215347854604fd3f6795ac5f971444cf39d Author: Kevin E Martin Date: Sat Dec 3 05:49:33 2005 +0000 Update package version number for X11R7 RC3 release. commit c50cd5a7f5af7d45550f25f173b512eb89bf41c5 Author: Kevin E Martin Date: Fri Dec 2 02:16:08 2005 +0000 Remove extraneous AC_MSG_RESULT. commit da2c00c0e85a284e3fbd237f3a77212f9647da37 Author: Adam Jackson Date: Wed Nov 30 18:47:54 2005 +0000 Bump libdrm dep to 2.0. commit ca36f1da4e254c779b38df30fd655533e548a294 Author: Adam Jackson Date: Tue Nov 29 23:29:59 2005 +0000 Only build dlloader modules by default. commit 0b337390d6919e9a3d31ca654c8bc44b30756862 Author: Alan Coopersmith Date: Mon Nov 28 22:04:09 2005 +0000 Change *mandir targets to use new *_MAN_DIR variables set by xorg-macros.m4 update to fix bug #5167 (Linux prefers *.1x man pages in man1 subdir) commit 159bea027893ce5996a452a6f493372792e95122 Author: Eric Anholt Date: Mon Nov 21 10:49:14 2005 +0000 Add .cvsignores for drivers. commit e62939e30e664592085ce394680fd8e7f3d31339 Author: Kevin E Martin Date: Sat Nov 19 07:15:38 2005 +0000 Update pkgconfig files to separate library build-time dependencies from application build-time dependencies, and update package deps to work with separate build roots. commit 08f03e4237ce9a54f0dffa37307af402b0bd2e55 Author: Kevin E Martin Date: Wed Nov 9 21:31:20 2005 +0000 Bump version numbers for X11R6.9/X11R7 RC2. commit a600e89a1547908f2018de96b5ecb814e2427b34 Author: Kevin E Martin Date: Wed Nov 9 21:15:15 2005 +0000 Update package version number for X11R7 RC2 release. commit f73c23b4c588c2f5dbc3c36a2f43b8bbb1e0f36a Author: Kevin E Martin Date: Tue Nov 1 15:08:53 2005 +0000 Update pkgcheck depedencies to work with separate build roots. commit 25a63bfefda420f85b3cba89bdae4b35ef80c84f Author: Adam Jackson Date: Fri Oct 21 18:40:19 2005 +0000 Bug #4829: Remove some useless DRI symbol checks. commit 53c122fa162709f618be26d5940e3488c0cbbafa Author: Kevin E Martin Date: Wed Oct 19 02:48:03 2005 +0000 Update package version number for RC1 release. commit 4b97a544cac9fb507b4a2a7c8017607ea2cac1bb Author: Alan Coopersmith Date: Tue Oct 18 00:01:53 2005 +0000 Use @DRIVER_MAN_SUFFIX@ instead of $(DRIVER_MAN_SUFFIX) in macro substitutions to work better with BSD make commit c7b7ece6330561b3745f0e1136b57575eadec5ad Author: Adam Jackson Date: Mon Oct 17 22:57:33 2005 +0000 More 1.7 braindamage: define EXTRA_DIST in terms of @DRIVER_NAME@ instead of indirectly commit 0586dbe1c5d0432e8d8da2f3576ac2ccbe139919 Author: Alan Coopersmith Date: Mon Oct 17 00:09:03 2005 +0000 Use sed & cpp to substitute variables in driver man pages commit 1317f2d1f35241969dcf376abd106ffe3f918432 Author: Søren Sandmann Pedersen Date: Tue Oct 4 20:01:03 2005 +0000 Check in generated README files commit bd48e0531a16bdf27fc8549826cc1123ba12d5bd Author: Søren Sandmann Pedersen Date: Mon Oct 3 21:22:07 2005 +0000 - For all drivers that have a .sgml file, add code in their build system to build the README file at make dist time - in util/macros/xorg-macros.m4, add a new XORG_CHECK_LINUXDOC macro that will check if the required tools and files exist, and if so set a conditional. - util/modular/symlink.sh - Link all the .sgml to xf86-video-/README.sgml - Add all the README. to the list of excluded files - xc/programs/Xserver/hw/xfree86/doc/sgml/SiS.sgml: Various changes to make it spew less warnings when the text file is built. commit 6fda4e886c30669e346f7f30a38b93a77004a7f6 Author: Alan Hourihane Date: Mon Oct 3 09:39:17 2005 +0000 Bug #4353: Fix lockup when suspend and resume when playing video. Shutdown the overlay on LeaveVT. commit 154724cc4be1e951649c29e4abdbde964a8c112e Author: Alan Hourihane Date: Tue Sep 27 08:58:23 2005 +0000 Put back the print code to display the DDC information, and remove some bogus DDC messages. commit 2174848266940e1896970c12717e106a4742dcbc Author: Adam Jackson Date: Sat Sep 24 18:45:45 2005 +0000 Disable the {Open,Close}FullScreen DRI protocol. Remove empty FullScreen stubs from drivers, comment the non-empty ones. commit b6443515e9d485b1ab8ee266c5b21750d2a5a551 Author: Alan Coopersmith Date: Thu Sep 22 01:58:17 2005 +0000 Don't build xvmc module if DRI support is not present commit 76033c2c885524c2116ccf0bdd30c89fa2636150 Author: Eric Anholt Date: Thu Sep 15 06:04:59 2005 +0000 Bug #4458: Check for the xvmc proto package, since it's required to build these. (Joshua Baergen) commit 50f0bf51a67c89bf445a682f8fec34c52ff909a8 Author: Alan Hourihane Date: Thu Sep 8 14:51:40 2005 +0000 fix another possible crash commit 521e357c1846960b48e83fb97f77025f6f91e638 Author: Alan Hourihane Date: Thu Sep 8 09:31:04 2005 +0000 Fix a crash situation commit e8c46c897564f038744b9274949482568d654ecc Author: Alan Hourihane Date: Tue Sep 6 10:31:33 2005 +0000 Fix DirectColor visual colormap issues at 16bpp in the i830 driver. commit bf6fef41935ebf624cc1ae6faa084dfa0a7eee72 Author: Alan Hourihane Date: Tue Sep 6 10:23:57 2005 +0000 Sync the accelerator before calling AdjustFrame to avoid lockups. commit 5fc5f02d76e077b09bf3ab1c7deeb1263033d57a Author: Dave Airlie Date: Mon Aug 29 12:06:13 2005 +0000 Add i810 XvMC support, it passes distcheck for me. commit 86e6935bd50b129519b24ee3d694a3f75b8d4f1c Author: Dave Airlie Date: Mon Aug 29 12:02:29 2005 +0000 Fix include paths for i810 XvMC add config.h to driDrawable.c commit 6f1406753da102ccce1898b3f160d6eaaccc9b7c Author: Kristian Høgsberg Date: Fri Aug 26 15:32:40 2005 +0000 Added i830_io.c, which just includes i810_io.c with BUILD_FOR_I830 set. commit 219beaca91b88dabfe05b8e756d558269f7a5148 Author: Daniel Stone Date: Sun Aug 21 06:26:33 2005 +0000 Fix typo in debug ErrorF. commit fdc6997f2edf4dfdcfd877152028bff2a0306999 Author: Daniel Stone Date: Thu Aug 18 09:03:47 2005 +0000 Update autogen.sh to one that does objdir != srcdir. commit 461d43be78f49e6cb965b7a206c77f6fe1622601 Author: Alan Hourihane Date: Mon Aug 15 07:30:05 2005 +0000 Egbert's 64bit fixes for mixed 32/64bit clients commit 95bd8dbee69b4b35e4c37e19d15e0449c38726b6 Author: Alan Hourihane Date: Fri Aug 12 21:23:59 2005 +0000 add missing i830_shadow.c commit 7476d0413f161ddb3f3cc4a77c3f2a2912d17e60 Author: Alan Hourihane Date: Mon Aug 8 09:17:06 2005 +0000 Enable gamma correction bit even for 8bit modes. The pipeconf register handles the real enablement. commit a89f89a2423aecb199d5f4af2e9430e180aa1131 Author: Ian Romanick Date: Fri Aug 5 23:04:33 2005 +0000 I have resolved this by making all the "Direct rendering disabled" messages X_WARNING and all the "Direct rendering enabled" messages X_INFO. Ideally, we need to factor some of this stuff out to common code. There is a *LOT* of duplication among the *_dri.c files under programs/Xserver/hw/xfree86/drivers. I'm trying to clean up as much low hanging fruit as I can and got tired of waiting for ajax. :P commit fd6d7d7f7ea03961c5ecf7db029f12ece93d414a Author: Alan Hourihane Date: Tue Aug 2 16:22:42 2005 +0000 Adjust newPipe code for BIOS's starting at 1200 commit da7b85176fc061995e1b04fa22dc736b6c9353e6 Author: Adam Jackson Date: Sun Jul 31 17:19:29 2005 +0000 Post-merge fixups: - Disable building the gamma driver - Fix numerous Imakefiles to get header paths and subdirs right - Symlink client-side GLX lib source from Mesa - Add new shader subdirs to the Mesa core build - Tweak the DDX drivers to not ask for "xf86dri.h"; they don't need it, since they don't generate protocol, and it was breaking the build. commit 1561ec3ca4f0d774f2664e9354d537061a0102d1 Author: Kevin E Martin Date: Fri Jul 29 21:22:43 2005 +0000 Various changes preparing packages for RC0: - Verify and update package version numbers as needed - Implement versioning scheme - Change bug address to point to bugzilla bug entry form - Disable loadable i18n in libX11 by default (use --enable-loadable-i18n to reenable it) - Fix makedepend to use pkgconfig and pass distcheck - Update build script to build macros first - Update modular Xorg version commit d165b7dc4ec3793e921363cdeb1ad41c0a3653d6 Author: Søren Sandmann Pedersen Date: Wed Jul 27 21:23:29 2005 +0000 Add xf86driproto to dependencies for drivers with DRI support. Patch from Donnie Berkholz commit 0cd371c6e57f899c34c4d2e2a8531ef7ce3967a4 Author: Alan Hourihane Date: Tue Jul 26 21:55:42 2005 +0000 Bump the DDX version to 1.4.0 to indicate the removal of drmAddress. Thus allowing 32/64bit clients to cohabit. commit adef005c2f96395d396834f2173125f0c06d40cb Author: Alan Hourihane Date: Tue Jul 26 08:07:37 2005 +0000 Bug #3850: Fix non-DRI builds. commit 09e871b1b4a67cfe818613bc012d72965b449f1c Author: Søren Sandmann Pedersen Date: Tue Jul 26 00:41:42 2005 +0000 Build system for i810 commit ac920dae7c22ed3956e4f31a0d3baf1909762b76 Author: Adam Jackson Date: Mon Jul 11 02:29:51 2005 +0000 Prep for modular builds by adding guarded #include "config.h" everywhere. commit f90f661652e5fe0986eb804f8dff3eeffe0af820 Author: Alan Hourihane Date: Sat Jul 9 21:19:11 2005 +0000 Copy mode strings upon mode copy commit 8fced5b648b0666ca88221e37bc1131ab5c2072d Author: Alan Hourihane Date: Tue Jul 5 09:25:03 2005 +0000 Fix Xvideo when operating in one line mode and video is pushed off the top of the screen. Also some fixes for Xvideo skew in certain resolutions. commit 68bc259fa1082f7780e524fc703e926a27fc7f9a Author: Alan Hourihane Date: Mon Jul 4 20:45:39 2005 +0000 NULL check commit 83c3e3ee49a0aa3ceaf52e2408cc253fc5dc8af4 Author: Alan Hourihane Date: Tue Jun 28 16:13:02 2005 +0000 Add support to check the in-built VESA mode list. commit 0d64e9e1f5494cff633a1499545d55a0edd0d92e Author: Adam Jackson Date: Sat Jun 25 21:16:55 2005 +0000 Bug #3626: _X_EXPORT tags for video and input drivers. commit 67174d67e740b9082ed0a65a79f08b5df3b4fcfb Author: Alan Hourihane Date: Mon Jun 13 12:15:25 2005 +0000 commit missing piece from resume patch commit ddab0558d584fb906cc0dfb383cc0e7a122d5336 Author: Alan Hourihane Date: Thu Jun 9 09:26:03 2005 +0000 Bug #3496 Remove a bogus check for DRM 1.2 for resume functionality as it's been present since 1.1 commit 7f49513afe9d4490bdfdac182d50383c089875e0 Author: Alan Hourihane Date: Wed Jun 8 17:50:32 2005 +0000 Fix the mode validation such that using function 5f05 to set the refresh rate works again. commit f8de9b4b9a5ce2756652c6b9ec1e84aedbc3519a Author: Alan Hourihane Date: Tue Jun 7 18:54:10 2005 +0000 Fix text restoration when display switching has been activated and we could be potentially on a different display than the initial one. commit 1f538007e9da7d4ad30ec4d4d281fb07ef300ddb Author: Alan Hourihane Date: Mon Jun 6 09:47:29 2005 +0000 missed a hunk commit d8a32bf4274ad91cc2b9ca425f5b0a017c2dd293 Author: Alan Hourihane Date: Mon Jun 6 09:40:23 2005 +0000 Bug #3436 Fix some offset, pitch and overlay scaler size problems with the video overlay. Solves various spontaneous lockups. commit 005d121d280ff4502f4d6e3d3d585ff0175367bb Author: Alan Hourihane Date: Tue May 31 20:29:01 2005 +0000 and another. sheesh. commit 27f86d693c32e550d9ebf4d6ff05c2d827754c8b Author: Alan Hourihane Date: Tue May 31 20:27:24 2005 +0000 missed hunk commit 27feb0f3474c1e21557225e10b13558e002c0ebf Author: Alan Hourihane Date: Tue May 31 17:58:26 2005 +0000 Add Intel(R) 945G support commit 2d10e8dc8184b0514e8ac9f835a06b85d609bb1b Author: Alan Hourihane Date: Wed May 25 09:10:44 2005 +0000 Change the sequence on how refresh rates are set in the i830 driver. This works much better with custom modelines. commit 89ec4ac201c09329d5d732323bdce6250b8592fe Author: Alan Hourihane Date: Fri May 20 15:24:02 2005 +0000 Bugzilla #3292: https://bugs.freedesktop.org/show_bug.cgi?id=3292 Add shadowFB support to the Intel driver (Dima Dorfman) commit df0964ea8f92c6b278dd87b95380dbc3ada625e5 Author: Alan Hourihane Date: Fri May 20 13:24:02 2005 +0000 Bugzilla #2339: https://bugs.freedesktop.org/show_bug.cgi?id=2339 Bugzilla #1064: https://bugs.freedesktop.org/show_bug.cgi?id=1064 Bugzilla #3055: https://bugs.freedesktop.org/show_bug.cgi?id=3055 Much better display switching support for mobile chipsets using the Fn+F? combination keys. Add DirectColor support. Add gamma correction support. commit b99ef9cd59fce0e02e8829210c7cb8aadb6a3499 Author: Alan Hourihane Date: Fri May 20 11:56:45 2005 +0000 Bugzilla #2585: https://bugs.freedesktop.org/show_bug.cgi?id=2585 Support the Intel E7221 server chipset. commit 3b87fac327b5549678f91a9c961b9fe5c0bf8a37 Author: Adam Jackson Date: Wed May 18 17:47:35 2005 +0000 Bug #3163: Create new DRIINFO_*_VERSION macros to indicate the version number of the DRIInfoRec, disambiguating it from the XF86DRI protocol version number. Modify DRIQueryVersion to return the libdri version number, which all DDXes were requesting implicitly. Fix the DDXes to check for the DRIINFO version they were compiled against. commit 72100ac7cff7485db3e869f1331caddb0bc21a24 Author: Daniel Stone Date: Wed Apr 20 12:25:28 2005 +0000 Fix includes right throughout the Xserver tree: * change "foo.h" to for core headers, e.g. X.h, Xpoll.h; * change "foo.h", "extensions/foo.h" and "X11/foo.h" to for extension headers, e.g. Xv.h; * change "foo.[ch]" to for Xtrans files. commit c813bf655908cd72049f346919abbdff8365b944 Author: Alan Hourihane Date: Thu Apr 14 22:55:01 2005 +0000 Fix initial DDC parameters when validating modes. commit e637630908f40f42367c94344d44918b6cdb0eb2 Author: Alan Hourihane Date: Fri Apr 1 14:17:24 2005 +0000 Check the VESA BIOS scanline requirements and adjust the displayWidth accordingly. Fixes an assumption that the screen width was always used as the displayWidth. commit 5090c8ba6778091aa4ce24b16b058d534ba78dc7 Author: Alan Hourihane Date: Mon Mar 21 21:20:39 2005 +0000 a one line fixup to the UseDDC code commit 8bc9b0d7da5de9a3294687f450afb50452898c7d Author: Alan Hourihane Date: Mon Mar 21 18:57:39 2005 +0000 Fix some bad alignment problems when allocating memory from the end of AGP space. Bugzilla #2764 (https://bugs.freedesktop.org/show_bug.cgi?id=2764) commit 50a105e88cfdfc22fef8cfd2397fc5e9fae17663 Author: Alan Hourihane Date: Tue Mar 15 13:10:23 2005 +0000 LFP's may exist on Pipe A in older i830's. Check that case so that Panel ID can be obtained and Xvideo is correctly setup for panel fitting. commit eb8b5df739e7be4509423c2bf757a7df35ce02f6 Author: Alan Hourihane Date: Tue Mar 15 11:32:10 2005 +0000 Enforce DDC monitor ranges usage if we have them and reject bad modes. Use NoDDC option to override DDC timings. We currently only use DS_RANGES, but could use other DDC information, as does the common layer, to deduce the h/v ranges. commit 49dcbacf7fa7f29d18c18eec7e2f99e859bf4c7e Author: Alan Hourihane Date: Thu Mar 3 18:01:51 2005 +0000 Limit the maximum refresh rate to 85Hz and remove the bogus 100Hz and 120Hz settings as they don't match close enough and are really unsupported. commit 7eaf88d00d7539fde68422ae6566f23993aa2633 Author: Alan Hourihane Date: Tue Mar 1 19:53:28 2005 +0000 Fix an off by one error when scaling which caused occasional overlay color lines at the far right and bottom of the window. commit 28d65bceaec3ef636f0f5bdd03b38fd76f87c8c6 Author: Alan Hourihane Date: Thu Feb 10 13:16:08 2005 +0000 Fix unaligned YV12 videos that caused skew when playing. commit 6352e65b9cd635e9f266e0e9ed64c5beae9e5c44 Author: Alan Hourihane Date: Thu Feb 10 10:41:20 2005 +0000 Fix pixmap cache corruption when Xv was in use due to a memory allocator calculation problem. commit f691f959213d3eb5c365edaf5a5a53fa96300491 Author: Alan Hourihane Date: Tue Feb 8 20:13:33 2005 +0000 Setup the Xv atoms correctly. commit 31a4191a97f538b2c6d4b8036796f06443f783c1 Author: Egbert Eich Date: Mon Feb 7 11:56:31 2005 +0000 Check the pixel clock choosen for a specific refresh rate against the maximally allowed pixel clock when choosing mode lines for VBESetVBEMode() and VESA BIOS version >= 3.0 (Bugzilla #2486). commit a103496e08f699b609be875827ecf1f3afa45e68 Author: Alan Hourihane Date: Tue Feb 1 19:47:32 2005 +0000 Check return value of i830InitDma() and fail to initialize the DRI if that fails. Also, check the DRM module name that it matches i915 and not the older i830 driver which some people were still trying to use and was causing Dma Initialization failures and lockups. commit 7ff7cec9220815eb5f74cfd95860aaa5f1f263bd Author: Egbert Eich Date: Mon Jan 24 15:02:17 2005 +0000 Unmap XCursor AGP memory on VT switch to prevent system from lockup (Matthias Hopf). commit d4c87adf6792ae9af641b9824c547d18cdd1e521 Author: Alan Hourihane Date: Mon Jan 10 11:29:02 2005 +0000 Revert some changes to TweakMemorySize commit 076c5116ae5eda1822da70184cbcc8942b470541 Author: Alan Hourihane Date: Thu Jan 6 14:43:14 2005 +0000 Add: - Intel i915GM support to 2D DDX and 3D Mesa drivers. - PanelID identification - DRI suspend/resume support - Detection of monitor changes on VT switches - Support custom video modes if available in the Video BIOS - 3D enhancements: * GL_ARB_texture_cube_map * GL_EXT_blend_equation_separate * GL_ATI_blend_equation_separate * GL_ARB_point_parameters * GL_NV_blend_square * GL_EXT_cull_vertex * GL_ARB_depth_texture * GL_SGIX_depth_texture * GL_ARB_shadow * GL_EXT_shadow_funcs * GL_3DFX_texture_compression_FXT1 By Tungsten Graphics, Keith Whitwell & Alan Hourihane. commit edb9b6fde0948bb1121a8456500ef9f55f734376 Author: Adam Jackson Date: Mon Jan 3 16:03:56 2005 +0000 Bug #1488: Fix crash on i830 during startup. (Eric Anholt) commit 59cecb714b78f7f384c24bf159bd39c81e9c7ee1 Author: Markus Kuhn Date: Sat Dec 4 00:43:09 2004 +0000 Encoding of numerous files changed to UTF-8 commit c24b0e04f3a1b064412e0bea44c4af546ec9fb77 Author: Egbert Eich Date: Tue Nov 2 08:54:53 2004 +0000 Fixed KGA handling for i810. KGA handling for chips derived from C&T chips is slightly different. The changes make the code consistent with the C&T (chips) and i740 drivers. commit 7ce4898ee319d149cf86e938e7257ea7490d327f Author: Egbert Eich Date: Wed Oct 27 09:52:15 2004 +0000 Removing vtSema shilding of accel sync - should have been '&&' instead of '||' anyway. commit 88714c3b2274fcfe50837631b1d38a7cd96f692a Author: Egbert Eich Date: Tue Oct 12 19:13:43 2004 +0000 Change order of SetDisplayDevice(), HWRestore(), UnbindGART() and RestoreBIOSMemSize() to be exactly opposite to the Save procedure in EnterVT() (Matthias Hopf, Alan Hourihane). Fixed server crash on reset when a structure allocated in PreInit() was freed on CloseScreen(). Fixed ring buffer lock ups that happened because the structure that contained ringbuffer data was not zeroed after allocation. Fixed numerous warnings due to signed unsigned comparisons. commit 687298daed40aaade44e61342a9abe984088541b Author: Egbert Eich Date: Mon Oct 11 09:58:04 2004 +0000 Checking if server isn't switched away before calling sync. Sanity check for possible bugs in aother areas of the code. Fixing default amount of of allocated video memory from AGP for i810: Use 16MB if less than 192MB are installed else use 24MB (Matthias Hopf). commit d2866271b8d42a0d44b65e30667adab96ac8fd54 Author: Adam Jackson Date: Wed Sep 22 04:38:03 2004 +0000 Bug #1252, #1253, #1255, #1256: Various typo fixes from Dave Jones. commit 88fd270d23ed1a1761cfdb98367c89ca89735b12 Author: Adam Jackson Date: Fri Sep 17 03:04:51 2004 +0000 Bug #1192: Remove cfb support from drivers where its use is an option. Delete xf24_32bpp, as s3virge was the last user. Fix up some comments to refer to fb rather than cfb. commit 9e8e19c6fde15fe5b9bb7532316dedeeca54b8d9 Author: Kevin E Martin Date: Mon Aug 30 03:19:08 2004 +0000 Fix ARGB cursor problem on i810 (Bug #1195, Alan Hourihane). commit 15c61546ea1a64d6c7dd60764164143ea7174123 Author: Kevin E Martin Date: Thu Aug 26 05:10:56 2004 +0000 Fix i810 compilation without Xinerama (Bug #1180, Simon Schubert). commit 828c0fb8050dcbed8026365cbcb17d4d4330c268 Author: Kevin E Martin Date: Wed Aug 25 00:30:41 2004 +0000 Fix i810 driver startup on Sony VAIO laptop (Bug #1084, Dave Airlie). commit c4626af83d760c2a6aae90ad478430eac1c4f4ea Author: Egbert Eich Date: Fri Jul 30 21:36:40 2004 +0000 Do I810EmitFlush() during screen init to make sure 2D engine is in a sane state (Peter Kunzmann). commit e0e01b7d6188a83c7539256ac1710ace04ce132a Author: Egbert Eich Date: Fri Jul 30 20:38:27 2004 +0000 add i845 to the list of chips that allow memory size tweaking. commit 199620cdc924e6aa98683e305843ea91c7e1771d Author: Adam Jackson Date: Fri Jul 30 20:30:52 2004 +0000 Bug #400 (partial): Driver fixes for the dlloader. When using dlloader, all framebuffer formats except cfb and the overlay modes should work, and r128 and radeon need to be loaded from the ati driver (both issues to be fixed soon). Tested on i740, s3virge, mach64, tdfx, vesa, and vga drivers. elfloader users shouldn't be affected. commit 54e644ffbb63290b7e2ec51b041f5b2df26e164b Author: Egbert Eich Date: Fri Jul 30 19:04:14 2004 +0000 Removed bugs on TweakMemorySize() which prevented it from working at all. Initialized last element of BIOS version number string to 0 to avoid random problems. commit 3a3b00f18ac5edd7dfef06a96342c95f3cb97f79 Author: Kevin E Martin Date: Fri Jul 30 04:44:13 2004 +0000 Fix "DoLoadableServer NO" build commit 986bc24892e7ce3784fc723fda54b1f89dd75b66 Author: Egbert Eich Date: Tue Jul 6 14:37:47 2004 +0000 Increase default video RAM size to 16MB when DRI is enabled and more than 128MB are available (Egbert Eich). Fixed lockups during mode switch. Problem was introduced when attempting to copy the behavior during LeaveVT()/EnterVT() but but forgetting to call I810DRILeave() before I810DRIEnter(). The entire DRILeave()/Enter() scenario has been commented out as it didn't seem to be necessary (Egbert Eich). Fix TweakMemorySize() (tested with i855/i865) (Egbert Eich). commit b7310758e60956a7de14dcf968bb713dfc56738f Author: Alan Hourihane Date: Tue Jun 22 15:12:42 2004 +0000 add CmdBuffer commit 5ed7e6f8424236dd57d83f6ab1282693260969cb Author: Alan Hourihane Date: Tue Jun 22 14:28:46 2004 +0000 i915 support Dual Head support for i830, i855, i915. ARGB cursor support (including i810) for all chipsets. commit a46e95722d3c2b9dfb9eacf9a390a7c47d427773 Author: Eric Anholt Date: Wed Jun 16 19:16:54 2004 +0000 Mop-up from the DRI 20040613 import, taking care of some drm.h header location and type changes, and update the ChangeLog. commit 35a5cf103e9e41d178f980f685307f8c8063a006 Author: Eric Anholt Date: Wed Jun 16 09:44:00 2004 +0000 Merge DRI-trunk-20040613 changes in programs/Xserver/hw/xfree86/drivers, with the following notes: - Savage and Mach64 (= ati/ati*.[ch] changes) DRI not merged due to insecurity. - VIA driver converted to new drmContext and drmHandle names. - Radeon driver merge conflicted in many places, and MergedFB at least could probably use some checking at this point. commit bec47f9369b6f02ce4537ab1ac547ba933609edc Author: Eric Anholt Date: Wed Jun 16 09:26:18 2004 +0000 DRI trunk-20040613 import commit c5b1972b50a6dbe57c67d3cc88ae010386b908a6 Author: Eric Anholt Date: Wed Jun 16 09:23:18 2004 +0000 DRI XFree86-4_3_99_12-merge import commit 41eba03d0d62fe03a7b437c9c4914016c3125141 Author: Egbert Eich Date: Fri Apr 23 19:35:55 2004 +0000 Merging XORG-CURRENT into trunk commit e27494f2a9262b6310c2f1e0a40c406f578fc693 Author: Egbert Eich Date: Sun Mar 14 08:33:22 2004 +0000 Importing vendor version xf86-4_4_99_1 on Sun Mar 14 00:26:39 PST 2004 commit 5ece535dc7f77185cc8c327a57ae3c02c8b9f918 Author: Egbert Eich Date: Wed Mar 3 12:12:19 2004 +0000 Importing vendor version xf86-4_4_0 on Wed Mar 3 04:09:24 PST 2004 commit ba904078dd22e013f4112479e7c2669c33e708a8 Author: Egbert Eich Date: Thu Feb 26 13:35:53 2004 +0000 readding XFree86's cvs IDs commit 13ea363db30dc0010cd09df29df90074db77f646 Author: Egbert Eich Date: Thu Feb 26 09:23:19 2004 +0000 Importing vendor version xf86-4_3_99_903 on Wed Feb 26 01:21:00 PST 2004 commit 64b129e800d915f0d82a67ce0f8b1850e67012fc Author: Egbert Eich Date: Thu Jan 29 08:08:35 2004 +0000 Importing vendor version xf86-012804-2330 on Thu Jan 29 00:06:33 PST 2004 commit 64d7bbf0ac060a57761aa2ecf21ddbe8169674c0 Author: Kaleb Keithley Date: Fri Dec 19 20:55:10 2003 +0000 XFree86 4.3.99.902 (RC 2) commit 418eaaee109acd3ea178b147dd29f90318d159f9 Author: Kaleb Keithley Date: Thu Dec 4 22:03:17 2003 +0000 XFree86 4.3.99.901 (RC 1) commit 72063c52b82faf80a0183f66d2fd5789def76d8f Author: Kaleb Keithley Date: Tue Nov 25 19:28:37 2003 +0000 XFree86 4.3.99.16 Bring the tree up to date for the Cygwin folks commit e04a1a8f862eb63b546fb74e73ee602fefb82e00 Author: Kaleb Keithley Date: Fri Nov 14 16:48:55 2003 +0000 XFree86 4.3.0.1 commit 3ad0d9a73bc0a4f3edb858d5f3a7c36827b7a429 Author: Kaleb Keithley Date: Fri Nov 14 16:48:55 2003 +0000 Initial revision xf86-video-intel-2.99.917/COPYING0000664000175000017500000002026312244635433012773 00000000000000Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas. Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. Copyright (c) 2005 Jesse Barnes Copyright © 2002 David Dawes Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. Copyright © 2006 Intel Corporation Copyright © 2006,2010 Intel Corporation Copyright © 2007 Intel Corporation Copyright © 2008 Intel Corporation Copyright © 2009 Intel Corporation Copyright © 2007 Red Hat, Inc. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. Copyright 2000 by Alan Hourihane, Sychdyn, North Wales, UK. Permission to use, copy, modify, distribute, and sell this software and its documentation for any purpose is hereby granted without fee, provided that the above copyright notice appear in all copies and that both that copyright notice and this permission notice appear in supporting documentation, and that the name of Alan Hourihane not be used in advertising or publicity pertaining to distribution of the software without specific, written prior permission. Alan Hourihane makes no representations about the suitability of this software for any purpose. It is provided "as is" without express or implied warranty. ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. Copyright 2000 Intel Corporation. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. Copyright 2001 VA Linux Systems Inc., Fremont, California. Copyright © 2002 by David Dawes All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation on the rights to use, copy, modify, merge, publish, distribute, sub license, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions: The above copyright notice and this permission notice (including the next paragraph) shall be included in all copies or substantial portions of the Software. THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. Copyright © 1999 Keith Packard Copyright ® 2001 Keith Packard Copyright © 2000, 2008 Keith Packard Permission to use, copy, modify, distribute, and sell this software and its documentation for any purpose is hereby granted without fee, provided that the above copyright notice appear in all copies and that both that copyright notice and this permission notice appear in supporting documentation, and that the name of Keith Packard not be used in advertising or publicity pertaining to distribution of the software without specific, written prior permission. Keith Packard makes no representations about the suitability of this software for any purpose. It is provided "as is" without express or implied warranty. KEITH PACKARD DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO EVENT SHALL KEITH PACKARD BE LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. xf86-video-intel-2.99.917/depcomp0000755000175000017500000005601612363743041013315 00000000000000#! /bin/sh # depcomp - compile a program generating dependencies as side-effects scriptversion=2013-05-30.07; # UTC # Copyright (C) 1999-2013 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2, or (at your option) # any later version. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. # You should have received a copy of the GNU General Public License # along with this program. If not, see . # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # Originally written by Alexandre Oliva . case $1 in '') echo "$0: No command. Try '$0 --help' for more information." 1>&2 exit 1; ;; -h | --h*) cat <<\EOF Usage: depcomp [--help] [--version] PROGRAM [ARGS] Run PROGRAMS ARGS to compile a file, generating dependencies as side-effects. Environment variables: depmode Dependency tracking mode. source Source file read by 'PROGRAMS ARGS'. object Object file output by 'PROGRAMS ARGS'. DEPDIR directory where to store dependencies. depfile Dependency file to output. tmpdepfile Temporary file to use when outputting dependencies. libtool Whether libtool is used (yes/no). Report bugs to . EOF exit $? ;; -v | --v*) echo "depcomp $scriptversion" exit $? ;; esac # Get the directory component of the given path, and save it in the # global variables '$dir'. Note that this directory component will # be either empty or ending with a '/' character. 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We # parameterize here, but still list the modes in the big case below, # to make depend.m4 easier to write. Note that we *cannot* use a case # here, because this file can only contain one case statement. if test "$depmode" = hp; then # HP compiler uses -M and no extra arg. gccflag=-M depmode=gcc fi if test "$depmode" = dashXmstdout; then # This is just like dashmstdout with a different argument. dashmflag=-xM depmode=dashmstdout fi cygpath_u="cygpath -u -f -" if test "$depmode" = msvcmsys; then # This is just like msvisualcpp but w/o cygpath translation. # Just convert the backslash-escaped backslashes to single forward # slashes to satisfy depend.m4 cygpath_u='sed s,\\\\,/,g' depmode=msvisualcpp fi if test "$depmode" = msvc7msys; then # This is just like msvc7 but w/o cygpath translation. # Just convert the backslash-escaped backslashes to single forward # slashes to satisfy depend.m4 cygpath_u='sed s,\\\\,/,g' depmode=msvc7 fi if test "$depmode" = xlc; then # IBM C/C++ Compilers xlc/xlC can output gcc-like dependency information. gccflag=-qmakedep=gcc,-MF depmode=gcc fi case "$depmode" in gcc3) ## gcc 3 implements dependency tracking that does exactly what ## we want. Yay! Note: for some reason libtool 1.4 doesn't like ## it if -MD -MP comes after the -MF stuff. Hmm. ## Unfortunately, FreeBSD c89 acceptance of flags depends upon ## the command line argument order; so add the flags where they ## appear in depend2.am. Note that the slowdown incurred here ## affects only configure: in makefiles, %FASTDEP% shortcuts this. for arg do case $arg in -c) set fnord "$@" -MT "$object" -MD -MP -MF "$tmpdepfile" "$arg" ;; *) set fnord "$@" "$arg" ;; esac shift # fnord shift # $arg done "$@" stat=$? if test $stat -ne 0; then rm -f "$tmpdepfile" exit $stat fi mv "$tmpdepfile" "$depfile" ;; gcc) ## Note that this doesn't just cater to obsosete pre-3.x GCC compilers. ## but also to in-use compilers like IMB xlc/xlC and the HP C compiler. ## (see the conditional assignment to $gccflag above). ## There are various ways to get dependency output from gcc. Here's ## why we pick this rather obscure method: ## - Don't want to use -MD because we'd like the dependencies to end ## up in a subdir. Having to rename by hand is ugly. ## (We might end up doing this anyway to support other compilers.) ## - The DEPENDENCIES_OUTPUT environment variable makes gcc act like ## -MM, not -M (despite what the docs say). Also, it might not be ## supported by the other compilers which use the 'gcc' depmode. ## - Using -M directly means running the compiler twice (even worse ## than renaming). if test -z "$gccflag"; then gccflag=-MD, fi "$@" -Wp,"$gccflag$tmpdepfile" stat=$? if test $stat -ne 0; then rm -f "$tmpdepfile" exit $stat fi rm -f "$depfile" echo "$object : \\" > "$depfile" # The second -e expression handles DOS-style file names with drive # letters. sed -e 's/^[^:]*: / /' \ -e 's/^['$alpha']:\/[^:]*: / /' < "$tmpdepfile" >> "$depfile" ## This next piece of magic avoids the "deleted header file" problem. ## The problem is that when a header file which appears in a .P file ## is deleted, the dependency causes make to die (because there is ## typically no way to rebuild the header). We avoid this by adding ## dummy dependencies for each header file. Too bad gcc doesn't do ## this for us directly. ## Some versions of gcc put a space before the ':'. On the theory ## that the space means something, we add a space to the output as ## well. hp depmode also adds that space, but also prefixes the VPATH ## to the object. Take care to not repeat it in the output. ## Some versions of the HPUX 10.20 sed can't process this invocation ## correctly. Breaking it into two sed invocations is a workaround. tr ' ' "$nl" < "$tmpdepfile" \ | sed -e 's/^\\$//' -e '/^$/d' -e "s|.*$object$||" -e '/:$/d' \ | sed -e 's/$/ :/' >> "$depfile" rm -f "$tmpdepfile" ;; hp) # This case exists only to let depend.m4 do its work. It works by # looking at the text of this script. This case will never be run, # since it is checked for above. exit 1 ;; sgi) if test "$libtool" = yes; then "$@" "-Wp,-MDupdate,$tmpdepfile" else "$@" -MDupdate "$tmpdepfile" fi stat=$? if test $stat -ne 0; then rm -f "$tmpdepfile" exit $stat fi rm -f "$depfile" if test -f "$tmpdepfile"; then # yes, the sourcefile depend on other files echo "$object : \\" > "$depfile" # Clip off the initial element (the dependent). Don't try to be # clever and replace this with sed code, as IRIX sed won't handle # lines with more than a fixed number of characters (4096 in # IRIX 6.2 sed, 8192 in IRIX 6.5). We also remove comment lines; # the IRIX cc adds comments like '#:fec' to the end of the # dependency line. tr ' ' "$nl" < "$tmpdepfile" \ | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' \ | tr "$nl" ' ' >> "$depfile" echo >> "$depfile" # The second pass generates a dummy entry for each header file. tr ' ' "$nl" < "$tmpdepfile" \ | sed -e 's/^.*\.o://' -e 's/#.*$//' -e '/^$/ d' -e 's/$/:/' \ >> "$depfile" else make_dummy_depfile fi rm -f "$tmpdepfile" ;; xlc) # This case exists only to let depend.m4 do its work. It works by # looking at the text of this script. This case will never be run, # since it is checked for above. exit 1 ;; aix) # The C for AIX Compiler uses -M and outputs the dependencies # in a .u file. In older versions, this file always lives in the # current directory. Also, the AIX compiler puts '$object:' at the # start of each line; $object doesn't have directory information. # Version 6 uses the directory in both cases. set_dir_from "$object" set_base_from "$object" if test "$libtool" = yes; then tmpdepfile1=$dir$base.u tmpdepfile2=$base.u tmpdepfile3=$dir.libs/$base.u "$@" -Wc,-M else tmpdepfile1=$dir$base.u tmpdepfile2=$dir$base.u tmpdepfile3=$dir$base.u "$@" -M fi stat=$? if test $stat -ne 0; then rm -f "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" exit $stat fi for tmpdepfile in "$tmpdepfile1" "$tmpdepfile2" "$tmpdepfile3" do test -f "$tmpdepfile" && break done aix_post_process_depfile ;; tcc) # tcc (Tiny C Compiler) understand '-MD -MF file' since version 0.9.26 # FIXME: That version still under development at the moment of writing. # Make that this statement remains true also for stable, released # versions. # It will wrap lines (doesn't matter whether long or short) with a # trailing '\', as in: # # foo.o : \ # foo.c \ # foo.h \ # # It will put a trailing '\' even on the last line, and will use leading # spaces rather than leading tabs (at least since its commit 0394caf7 # "Emit spaces for -MD"). "$@" -MD -MF "$tmpdepfile" stat=$? if test $stat -ne 0; then rm -f "$tmpdepfile" exit $stat fi rm -f "$depfile" # Each non-empty line is of the form 'foo.o : \' or ' dep.h \'. # We have to change lines of the first kind to '$object: \'. sed -e "s|.*:|$object :|" < "$tmpdepfile" > "$depfile" # And for each line of the second kind, we have to emit a 'dep.h:' # dummy dependency, to avoid the deleted-header problem. sed -n -e 's|^ *\(.*\) *\\$|\1:|p' < "$tmpdepfile" >> "$depfile" rm -f "$tmpdepfile" ;; ## The order of this option in the case statement is important, since the ## shell code in configure will try each of these formats in the order ## listed in this file. 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The second sed program outputs the file # name when reading, but also accumulates all include files in the # hold buffer in order to output them again at the end. This only # works with sed implementations that can handle large buffers. sed < "$tmpdepfile" -n ' /^Note: including file: *\(.*\)/ { s//\1/ s/\\/\\\\/g p }' | $cygpath_u | sort -u | sed -n ' s/ /\\ /g s/\(.*\)/'"$tab"'\1 \\/p s/.\(.*\) \\/\1:/ H $ { s/.*/'"$tab"'/ G p }' >> "$depfile" echo >> "$depfile" # make sure the fragment doesn't end with a backslash rm -f "$tmpdepfile" ;; msvc7msys) # This case exists only to let depend.m4 do its work. It works by # looking at the text of this script. This case will never be run, # since it is checked for above. exit 1 ;; #nosideeffect) # This comment above is used by automake to tell side-effect # dependency tracking mechanisms from slower ones. dashmstdout) # Important note: in order to support this mode, a compiler *must* # always write the preprocessed file to stdout, regardless of -o. "$@" || exit $? # Remove the call to Libtool. if test "$libtool" = yes; then while test "X$1" != 'X--mode=compile'; do shift done shift fi # Remove '-o $object'. IFS=" " for arg do case $arg in -o) shift ;; $object) shift ;; *) set fnord "$@" "$arg" shift # fnord shift # $arg ;; esac done test -z "$dashmflag" && dashmflag=-M # Require at least two characters before searching for ':' # in the target name. This is to cope with DOS-style filenames: # a dependency such as 'c:/foo/bar' could be seen as target 'c' otherwise. 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"$@" || exit $? # Remove the call to Libtool. if test "$libtool" = yes; then while test "X$1" != 'X--mode=compile'; do shift done shift fi # Remove '-o $object'. IFS=" " for arg do case $arg in -o) shift ;; $object) shift ;; *) set fnord "$@" "$arg" shift # fnord shift # $arg ;; esac done "$@" -E \ | sed -n -e '/^# [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' \ -e '/^#line [0-9][0-9]* "\([^"]*\)".*/ s:: \1 \\:p' \ | sed '$ s: \\$::' > "$tmpdepfile" rm -f "$depfile" echo "$object : \\" > "$depfile" cat < "$tmpdepfile" >> "$depfile" sed < "$tmpdepfile" '/^$/d;s/^ //;s/ \\$//;s/$/ :/' >> "$depfile" rm -f "$tmpdepfile" ;; msvisualcpp) # Important note: in order to support this mode, a compiler *must* # always write the preprocessed file to stdout. "$@" || exit $? # Remove the call to Libtool. if test "$libtool" = yes; then while test "X$1" != 'X--mode=compile'; do shift done shift fi IFS=" " for arg do case "$arg" in -o) shift ;; $object) shift ;; "-Gm"|"/Gm"|"-Gi"|"/Gi"|"-ZI"|"/ZI") set fnord "$@" shift shift ;; *) set fnord "$@" "$arg" shift shift ;; esac done "$@" -E 2>/dev/null | sed -n '/^#line [0-9][0-9]* "\([^"]*\)"/ s::\1:p' | $cygpath_u | sort -u > "$tmpdepfile" rm -f "$depfile" echo "$object : \\" > "$depfile" sed < "$tmpdepfile" -n -e 's% %\\ %g' -e '/^\(.*\)$/ s::'"$tab"'\1 \\:p' >> "$depfile" echo "$tab" >> "$depfile" sed < "$tmpdepfile" -n -e 's% %\\ %g' -e '/^\(.*\)$/ s::\1\::p' >> "$depfile" rm -f "$tmpdepfile" ;; msvcmsys) # This case exists only to let depend.m4 do its work. It works by # looking at the text of this script. This case will never be run, # since it is checked for above. exit 1 ;; none) exec "$@" ;; *) echo "Unknown depmode $depmode" 1>&2 exit 1 ;; esac exit 0 # Local Variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: xf86-video-intel-2.99.917/test/0000775000175000017500000000000012445556132012775 500000000000000xf86-video-intel-2.99.917/test/basic-stress.c0000664000175000017500000000705212400044327015454 00000000000000#include #include #include #include /* for XDestroyImage */ #include #include "test.h" static void fill_rect(struct test_target *tt, int alu, int color, int x, int y, int w, int h) { XGCValues val; val.function = alu; val.foreground = color; XChangeGC(tt->dpy->dpy, tt->gc, GCFunction | GCForeground, &val); XFillRectangle(tt->dpy->dpy, tt->draw, tt->gc, x, y, w, h); } static void clear(struct test_target *tt) { fill_rect(tt, GXcopy, 0, 0, 0, tt->width, tt->height); } static void fill(struct test_target *out, struct test_target *ref) { int x = rand() % (2*out->width) - out->width; int y = rand() % (2*out->height) - out->height; int w = rand() % (2*out->width); int h = rand() % (2*out->height); int color = rand(); int alu = rand() % 16; fill_rect(out, alu, color, x, y, w, h); fill_rect(ref, alu, color, x, y, w, h); } static void copy(struct test_target *out, struct test_target *ref) { int sx = rand() % (2*out->width) - ref->width; int sy = rand() % (2*out->height) - ref->height; int dx = rand() % (2*out->width) - ref->width; int dy = rand() % (2*out->height) - ref->height; int w = rand() % (2*out->width); int h = rand() % (2*out->height); XGCValues val; val.function = rand() % 16; XChangeGC(out->dpy->dpy, out->gc, GCFunction, &val); XCopyArea(out->dpy->dpy, out->draw, out->draw, out->gc, sx, sy, w, h, dx, dy); XChangeGC(ref->dpy->dpy, ref->gc, GCFunction, &val); XCopyArea(ref->dpy->dpy, ref->draw, ref->draw, ref->gc, sx, sy, w, h, dx, dy); } static void _put(struct test_target *tt, int x, int y, int w,int h, int color, int alu) { XImage image; XGCValues val; val.function = alu; test_init_image(&image, &tt->dpy->shm, tt->format, w, h); pixman_fill((uint32_t*)image.data, image.bytes_per_line/sizeof(uint32_t), image.bits_per_pixel, 0, 0, w, h, color); XChangeGC(tt->dpy->dpy, tt->gc, GCFunction, &val); if (rand() & 1) { XShmPutImage(tt->dpy->dpy, tt->draw, tt->gc, &image, 0, 0, x, y, w, h, 0); XSync(tt->dpy->dpy, 1); } else { XPutImage(tt->dpy->dpy, tt->draw, tt->gc, &image, 0, 0, x, y, w, h); } } static void put(struct test_target *out, struct test_target *ref) { int x = rand() % (2*out->width) - out->width; int y = rand() % (2*out->height) - out->height; int w = rand() % out->width; int h = rand() % out->height; int color = rand(); int alu = rand() % 16; _put(out, x, y, w, h, color, alu); _put(ref, x, y, w, h, color, alu); } static void rect_tests(struct test *test, int iterations, enum target target) { struct test_target out, ref; void (* const ops[])(struct test_target *, struct test_target *) = { copy, fill, put, }; int n; printf("Running mixed ops stress against %s: ", test_target_name(target)); fflush(stdout); test_target_create_render(&test->out, target, &out); test_target_create_render(&test->ref, target, &ref); clear(&out); clear(&ref); for (n = 0; n < iterations; n++) ops[rand() % ARRAY_SIZE(ops)](&out, &ref); test_compare(test, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); printf("passed [%d iterations]\n", n); test_target_destroy_render(&test->out, &out); test_target_destroy_render(&test->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int iterations = REPS(i); rect_tests(&test, iterations, 0); rect_tests(&test, iterations, 1); } return 0; } xf86-video-intel-2.99.917/test/test.h0000664000175000017500000000474612400044327014045 00000000000000#ifndef TEST_H #define TEST_H #include #include #include #include #include #define DEFAULT_ITERATIONS 20 enum target { ROOT, CHILD, PIXMAP, }; #define TARGET_FIRST ROOT #define TARGET_LAST PIXMAP enum mask { MASK_NONE, MASK_NONE_AA, MASK_A1, MASK_A8, }; struct test { struct test_display { Display *dpy; Window root; XShmSegmentInfo shm; int max_shm_size; int has_shm_pixmaps; int width, height, depth; XRenderPictFormat *format; enum { REF, OUT } target; } out, ref; }; void die(const char *fmt, ...); #define die_unless(expr) do{ if (!(expr)) die("verification failed: %s\n", #expr); } while(0) void test_init(struct test *test, int argc, char **argv); void test_compare(struct test *out, Drawable out_draw, XRenderPictFormat *out_format, Drawable ref_draw, XRenderPictFormat *ref_format, int x, int y, int w, int h, const char *info); #define MAX_DELTA 3 int pixel_difference(uint32_t a, uint32_t b); static inline int pixel_equal(int depth, uint32_t a, uint32_t b) { if (depth != 32) { uint32_t mask = (1 << depth) - 1; a &= mask; b &= mask; } if (a == b) return 1; return pixel_difference(a, b) < MAX_DELTA; } void test_init_image(XImage *ximage, XShmSegmentInfo *shm, XRenderPictFormat *format, int width, int height); const char *test_target_name(enum target target); struct test_target { struct test_display *dpy; Drawable draw; GC gc; XRenderPictFormat *format; Picture picture; int width, height, depth; enum target target; }; void test_target_create_render(struct test_display *dpy, enum target target, struct test_target *tt); void test_target_destroy_render(struct test_display *dpy, struct test_target *tt); static inline uint32_t depth_mask(int depth) { if (depth == 32) return 0xffffffff; else return (1 << depth) - 1; } static inline uint32_t color(uint8_t red, uint8_t green, uint8_t blue, uint8_t alpha) { uint16_t ra = red * alpha; uint16_t ga = green * alpha; uint16_t ba = blue * alpha; return alpha << 24 | ra >> 8 << 16 | ga >> 8 << 8 | ba >> 8; } void test_timer_start(struct test_display *t, struct timespec *tv); double test_timer_stop(struct test_display *t, struct timespec *tv); #ifndef MAX #define MAX(a,b) ((a) > (b) ? (a) : (b)) #endif #ifndef ARRAY_SIZE #define ARRAY_SIZE(a) (sizeof(a) / sizeof(a[0])) #endif #define SETS(I) ((I) >= 12 ? 1 : 1 << (12 - (I))) #define REPS(I) (1 << (I)) #endif xf86-video-intel-2.99.917/test/shm-test.c0000664000175000017500000001042512400044327014614 00000000000000/* * Copyright (c) 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #if HAVE_X11_EXTENSIONS_SHMPROTO_H #include #elif HAVE_X11_EXTENSIONS_SHMSTR_H #include #else #error Failed to find the right header for X11 MIT-SHM protocol definitions #endif #include #include #include #include #include #include #include #include #include #include static int _x_error_occurred; static int can_use_shm(Display *dpy) { int major, minor, has_pixmap; if (!XShmQueryExtension(dpy)) return 0; XShmQueryVersion(dpy, &major, &minor, &has_pixmap); return has_pixmap; } static int test_subpage(Display *dpy) { const int width = 10; const int height = 10; uint32_t pixel = 0xffffffff; char *expected; XShmSegmentInfo shm; Pixmap pixmap, source; XGCValues gcv; GC gc; printf("Creating %dx%d SHM pixmap\n", width, height); _x_error_occurred = 0; expected = malloc(4096); if (expected == NULL) return 0; shm.shmid = shmget(IPC_PRIVATE, 4096, IPC_CREAT | 0666); if (shm.shmid == -1) return 0; shm.shmaddr = shmat(shm.shmid, 0, 0); if (shm.shmaddr == (char *) -1) { shmctl(shm.shmid, IPC_RMID, NULL); return 0; } shm.readOnly = False; XShmAttach(dpy, &shm); memset(shm.shmaddr, 0xcc, 4096); memset(expected, 0xcc, 4096); memset(expected + 64, 0xff, 4*width * height); pixmap = XShmCreatePixmap(dpy, DefaultRootWindow(dpy), shm.shmaddr + 64, &shm, width, height, 24); XSync(dpy, False); shmctl(shm.shmid, IPC_RMID, NULL); source = XCreatePixmap(dpy, DefaultRootWindow(dpy), width, height, 24); gcv.graphics_exposures = False; gcv.subwindow_mode = IncludeInferiors; gcv.foreground = pixel; gcv.function = GXcopy; gcv.fill_style = FillSolid; gc = XCreateGC(dpy, pixmap, GCGraphicsExposures | GCSubwindowMode | GCFillStyle | GCForeground | GCFunction, &gcv); XCopyArea(dpy, pixmap, source, gc, 0, 0, width, height, 0, 0); XFillRectangle(dpy, source, gc, 0, 0, width, height); XCopyArea(dpy, source, pixmap, gc, 0, 0, width, height, 0, 0); XSync(dpy, True); if (_x_error_occurred == 0) _x_error_occurred = memcmp(shm.shmaddr, expected, 4096); printf("%s: %s\n", __func__, _x_error_occurred ? "failed" : "passed"); XShmDetach(dpy, &shm); shmdt(shm.shmaddr); free(expected); return !_x_error_occurred;; } static int _check_error_handler(Display *display, XErrorEvent *event) { printf("X11 error from display %s, serial=%ld, error=%d, req=%d.%d\n", DisplayString(display), event->serial, event->error_code, event->request_code, event->minor_code); _x_error_occurred++; return False; /* ignored */ } int main(void) { Display *dpy; int error = 0; dpy = XOpenDisplay(NULL); if (dpy == NULL) return 77; if (DefaultDepth(dpy, DefaultScreen(dpy)) != 24) return 77; if (!can_use_shm(dpy)) return 0; XSetErrorHandler(_check_error_handler); error += test_subpage(dpy); return !!error; } xf86-video-intel-2.99.917/test/basic-string.c0000664000175000017500000000437712400044327015446 00000000000000#include #include #include #include #include /* for XDestroyImage */ #include "test.h" static void draw_string(struct test_display *t, Drawable d, uint8_t alu, int x, int y, uint32_t fg, uint32_t bg, int s, int fill) { const char *strings[] = { "Hello", "World", "Cairo's twin is Giza", }; XGCValues val; GC gc; val.function = alu; val.foreground = fg; val.background = bg; gc = XCreateGC(t->dpy, d, GCForeground | GCBackground | GCFunction, &val); if (fill) XDrawImageString(t->dpy, d, gc, x, y, strings[s%3], strlen(strings[s%3])); else XDrawString(t->dpy, d, gc, x, y, strings[s%3], strlen(strings[s%3])); XFreeGC(t->dpy, gc); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void string_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing general (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t bg = rand(); int str = rand(); int fill = rand() & 1; draw_string(&t->out, out.draw, alu, x, y, fg, bg, str, fill); draw_string(&t->ref, ref.draw, alu, x, y, fg, bg, str, fill); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { string_tests(&test, reps, sets, t); } } return 0; } xf86-video-intel-2.99.917/test/dri3.h0000664000175000017500000000340212400044327013713 00000000000000/* * Copyright (c) 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifndef DRI3_H #define DRI3_H #include int dri3_open(Display *dpy); int dri3_open__full(Display *dpy, Window root, unsigned provider); Pixmap dri3_create_pixmap(Display *dpy, Drawable draw, int width, int height, int depth, int fd, int bpp, int stride, int size); int dri3_create_fd(Display *dpy, Pixmap pixmap, int *stride); struct dri3_fence { XID xid; void *addr; }; int dri3_create_fence(Display *dpy, Pixmap pixmap, struct dri3_fence *out); void dri3_fence_sync(Display *dpy, struct dri3_fence *fence); void dri3_fence_free(Display *dpy, struct dri3_fence *fence); #endif /* DRI3_H */ xf86-video-intel-2.99.917/test/mixed-stress.c0000664000175000017500000001175712400044327015510 00000000000000#include #include #include #include /* for XDestroyImage */ #include #include "test.h" static void _render_copy(struct test_target *tt, int x, int y, int w, int h, uint8_t red, uint8_t green, uint8_t blue, uint8_t alpha) { XRenderColor color; Picture src; Pixmap tmp; tmp = XCreatePixmap(tt->dpy->dpy, DefaultRootWindow(tt->dpy->dpy), 10+w, 20+h, tt->format->depth); src = XRenderCreatePicture(tt->dpy->dpy, tmp, tt->format, 0, NULL); /* magenta border */ color.red = 0xffff; color.green = 0; color.blue = 0xffff; color.alpha = 0xffff; XRenderFillRectangle(tt->dpy->dpy, PictOpSrc, src, &color, 0, 0, w+10, h+20); color.red = red * alpha; color.green = green * alpha; color.blue = blue * alpha; color.alpha = alpha << 8 | alpha; XRenderFillRectangle(tt->dpy->dpy, PictOpSrc, src, &color, 5, 10, w, h); XRenderComposite(tt->dpy->dpy, PictOpSrc, src, 0, tt->picture, 5, 10, 0, 0, x, y, w, h); XRenderFreePicture(tt->dpy->dpy, src); XFreePixmap(tt->dpy->dpy, tmp); } static void render_copy(struct test_target *out, struct test_target *ref) { int x = rand() % (2*out->width) - out->width; int y = rand() % (2*out->height) - out->height; int w = rand() % (2*out->width); int h = rand() % (2*out->height); int red = rand() & 0xff; int green = rand() & 0xff; int blue = rand() & 0xff; int alpha = rand() & 0xff; _render_copy(out, x, y, w, h, red, green, blue, alpha); _render_copy(ref, x, y, w, h, red, green, blue, alpha); } static void fill_rect(struct test_target *tt, int alu, int color, int x, int y, int w, int h) { XGCValues val; val.function = alu; val.foreground = color; XChangeGC(tt->dpy->dpy, tt->gc, GCFunction | GCForeground, &val); XFillRectangle(tt->dpy->dpy, tt->draw, tt->gc, x, y, w, h); } static void clear(struct test_target *tt) { fill_rect(tt, GXcopy, 0, 0, 0, tt->width, tt->height); } static void basic_fill(struct test_target *out, struct test_target *ref) { int x = rand() % (2*out->width) - out->width; int y = rand() % (2*out->height) - out->height; int w = rand() % (2*out->width); int h = rand() % (2*out->height); int color = rand(); int alu = rand() % 16; fill_rect(out, alu, color, x, y, w, h); fill_rect(ref, alu, color, x, y, w, h); } static void basic_copy(struct test_target *out, struct test_target *ref) { int sx = rand() % (2*out->width) - ref->width; int sy = rand() % (2*out->height) - ref->height; int dx = rand() % (2*out->width) - ref->width; int dy = rand() % (2*out->height) - ref->height; int w = rand() % (2*out->width); int h = rand() % (2*out->height); XGCValues val; val.function = rand() % 16; XChangeGC(out->dpy->dpy, out->gc, GCFunction, &val); XCopyArea(out->dpy->dpy, out->draw, out->draw, out->gc, sx, sy, w, h, dx, dy); XChangeGC(ref->dpy->dpy, ref->gc, GCFunction, &val); XCopyArea(ref->dpy->dpy, ref->draw, ref->draw, ref->gc, sx, sy, w, h, dx, dy); } static void _put(struct test_target *tt, int x, int y, int w,int h, int color, int alu) { XImage image; XGCValues val; val.function = alu; test_init_image(&image, &tt->dpy->shm, tt->format, w, h); pixman_fill((uint32_t*)image.data, image.bytes_per_line/sizeof(uint32_t), image.bits_per_pixel, 0, 0, w, h, color); XChangeGC(tt->dpy->dpy, tt->gc, GCFunction, &val); if (rand() & 1) { XShmPutImage(tt->dpy->dpy, tt->draw, tt->gc, &image, 0, 0, x, y, w, h, 0); XSync(tt->dpy->dpy, 1); } else { XPutImage(tt->dpy->dpy, tt->draw, tt->gc, &image, 0, 0, x, y, w, h); } } static void basic_put(struct test_target *out, struct test_target *ref) { int x = rand() % (2*out->width) - out->width; int y = rand() % (2*out->height) - out->height; int w = rand() % out->width; int h = rand() % out->height; int color = rand(); int alu = rand() % 16; _put(out, x, y, w, h, color, alu); _put(ref, x, y, w, h, color, alu); } static void rect_tests(struct test *test, int iterations, enum target target) { struct test_target out, ref; void (* const ops[])(struct test_target *, struct test_target *) = { basic_copy, basic_fill, basic_put, render_copy, }; int n; printf("Running mixed ops stress against %s: ", test_target_name(target)); fflush(stdout); test_target_create_render(&test->out, target, &out); test_target_create_render(&test->ref, target, &ref); clear(&out); clear(&ref); for (n = 0; n < iterations; n++) ops[rand() % ARRAY_SIZE(ops)](&out, &ref); test_compare(test, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); printf("passed [%d iterations]\n", n); test_target_destroy_render(&test->out, &out); test_target_destroy_render(&test->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int iterations = REPS(i); rect_tests(&test, iterations, 0); rect_tests(&test, iterations, 1); } return 0; } xf86-video-intel-2.99.917/test/test_render.c0000664000175000017500000000552712400044327015375 00000000000000#include #include #include #include #include #include #include "test.h" const char *test_target_name(enum target target) { switch (target) { default: case ROOT: return "root"; case CHILD: return "child"; case PIXMAP: return "pixmap"; } } void test_target_create_render(struct test_display *dpy, enum target target, struct test_target *tt) { XSetWindowAttributes attr; XGCValues gcv; tt->dpy = dpy; tt->target = target; tt->draw = dpy->root; tt->format = dpy->format; tt->width = dpy->width; tt->height = dpy->height; tt->depth = dpy->depth; switch (target) { case ROOT: break; case CHILD: attr.override_redirect = 1; tt->width /= 4; tt->height /= 4; tt->draw = XCreateWindow(dpy->dpy, tt->draw, dpy->width/2, dpy->height/2, tt->width, tt->height, 0, tt->format->depth, InputOutput, DefaultVisual(dpy->dpy, DefaultScreen(dpy->dpy)), CWOverrideRedirect, &attr); XMapWindow(dpy->dpy, tt->draw); break; case PIXMAP: tt->format = XRenderFindStandardFormat(dpy->dpy, PictStandardARGB32); tt->draw = XCreatePixmap(dpy->dpy, tt->draw, dpy->width, dpy->height, tt->format->depth); tt->depth = 32; break; } tt->picture = XRenderCreatePicture(dpy->dpy, tt->draw, tt->format, 0, NULL); gcv.graphics_exposures = 0; tt->gc = XCreateGC(dpy->dpy, tt->draw, GCGraphicsExposures, &gcv); } void test_target_destroy_render(struct test_display *dpy, struct test_target *tt) { XRenderFreePicture(dpy->dpy, tt->picture); switch (tt->target) { case ROOT: break; case CHILD: XDestroyWindow(dpy->dpy, tt->draw); break; case PIXMAP: XFreePixmap(dpy->dpy, tt->draw); break; } } #if 0 static int random_bool(void) { return rand() > RAND_MAX/2; } static Picture create_alpha_map(void) { return 0; } static Pixmap create_clip_mask(void) { return 0; } unsigned int test_render_randomize_picture_attributes(XRenderPictureAttributes *pa) { unsigned int flags = 0; memset(pa, 0, sizeof(*pa)); if (random_bool()) { pa->repeat = repeat_modes[rand() % ARRAY_SIZE(repeat_modes)]; flags |= CPRepeat; } if (random_bool()) { pa->alpha_map = create_alpha_map(); pa->alpha_x_origin = rand() % 1024; pa->alpha_y_origin = rand() % 1024; flags |= CPAlphaMap; } if (random_bool()) { pa->clip_mask = create_clip_mask(); pa->clip_x_orgin = rand() % 1024; pa->clip_y_orgin = rand() % 1024; flags |= CPClipMask; } if (random_bool()) { pa->subwindow_mode = random_bool(); flags |= CPSubwindowMode; } if (random_bool()) { pa->poly_edge = random_bool(); flags |= CPPolyEdge; } if (random_bool()) { pa->poly_mode = random_bool(); flags |= CPPolyMode; } if (random_bool()) { pa->component_alpha = random_bool(); flags |= CPComponentAlpha; } return flags; } #endif xf86-video-intel-2.99.917/test/basic-fillrect.c0000664000175000017500000001360312400044327015734 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" static void show_cells(char *buf, const uint32_t *out, const uint32_t *ref, int x, int y, int w, int h) { int i, j, len = 0; for (j = y - 2; j <= y + 2; j++) { if (j < 0 || j >= h) continue; for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", out[j*w+i]); } len += sprintf(buf+len, "\t"); for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", ref[j*w+i]); } len += sprintf(buf+len, "\n"); } } static void fill_rect(struct test_display *t, Drawable d, uint8_t alu, int x, int y, int w, int h, uint32_t fg) { XGCValues val; GC gc; val.function = alu; val.foreground = fg; gc = XCreateGC(t->dpy, d, GCForeground | GCFunction, &val); XFillRectangle(t->dpy, d, gc, x, y, w, h); XFreeGC(t->dpy, gc); } static void pixel_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = malloc(t->out.width*t->out.height*4); struct { uint16_t x, y; } *pixels = malloc(reps*sizeof(*pixels)); int r, s; test_target_create_render(&t->out, target, &tt); printf("Testing setting of single pixels (%s): ", test_target_name(target)); fflush(stdout); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (tt.width - 1); int y = rand() % (tt.height - 1); uint32_t fg = rand(); fill_rect(&t->out, tt.draw, GXcopy, x, y, 1, 1, fg); pixels[r].x = x; pixels[r].y = y; cells[y*tt.width+x] = fg; } test_init_image(&image, &t->out.shm, tt.format, 1, 1); for (r = 0; r < reps; r++) { uint32_t x = pixels[r].x; uint32_t y = pixels[r].y; uint32_t result; XShmGetImage(t->out.dpy, tt.draw, &image, x, y, AllPlanes); result = *(uint32_t *)image.data; if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask = depth_mask(image.depth); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result); } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(pixels); free(cells); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void area_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = calloc(sizeof(uint32_t), t->out.width*t->out.height); int r, s, x, y; printf("Testing area sets (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &tt); clear(&t->out, &tt); test_init_image(&image, &t->out.shm, tt.format, tt.width, tt.height); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int w = rand() % tt.width; int h = rand() % tt.height; uint32_t fg = rand(); x = rand() % (2*tt.width) - tt.width; y = rand() % (2*tt.height) - tt.height; fill_rect(&t->out, tt.draw, GXcopy, x, y, w, h, fg); if (x < 0) w += x, x = 0; if (y < 0) h += y, y = 0; if (x >= tt.width || y >= tt.height) continue; if (x + w > tt.width) w = tt.width - x; if (y + h > tt.height) h = tt.height - y; if (w <= 0 || h <= 0) continue; pixman_fill(cells, tt.width, 32, x, y, w, h, fg); } XShmGetImage(t->out.dpy, tt.draw, &image, 0, 0, AllPlanes); for (y = 0; y < tt.height; y++) { for (x = 0; x < tt.width; x++) { uint32_t result = *(uint32_t *) (image.data + y*image.bytes_per_line + x*image.bits_per_pixel/8); if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { char buf[600]; uint32_t mask = depth_mask(image.depth); show_cells(buf, (uint32_t*)image.data, cells, x, y, tt.width, tt.height); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n%s", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result, buf); } } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(cells); } static void rect_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing area fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % (2*out.width); int h = rand() % (2*out.height); uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); fill_rect(&t->out, out.draw, alu, x, y, w, h, fg); fill_rect(&t->ref, ref.draw, alu, x, y, w, h, fg); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { pixel_tests(&test, reps, sets, t); area_tests(&test, reps, sets, t); rect_tests(&test, reps, sets, t); } } return 0; } xf86-video-intel-2.99.917/test/dri2.c0000664000175000017500000004271012400044327013712 00000000000000/* * Copyright © 2008 Red Hat, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Soft- * ware"), to deal in the Software without restriction, including without * limitation the rights to use, copy, modify, merge, publish, distribute, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, provided that the above copyright * notice(s) and this permission notice appear in all copies of the Soft- * ware and that both the above copyright notice(s) and this permission * notice appear in supporting documentation. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABIL- * ITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY * RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN * THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSE- * QUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFOR- * MANCE OF THIS SOFTWARE. * * Except as contained in this notice, the name of a copyright holder shall * not be used in advertising or otherwise to promote the sale, use or * other dealings in this Software without prior written authorization of * the copyright holder. * * Authors: * Kristian Høgsberg (krh@redhat.com) */ #include #include #include #include #include #include "dri2.h" /* Allow the build to work with an older versions of dri2proto.h and * dri2tokens.h. */ #if DRI2_MINOR < 1 #undef DRI2_MINOR #define DRI2_MINOR 1 #define X_DRI2GetBuffersWithFormat 7 #endif static char dri2ExtensionName[] = DRI2_NAME; static XExtensionInfo *dri2Info; static XEXT_GENERATE_CLOSE_DISPLAY (DRI2CloseDisplay, dri2Info) static Bool DRI2WireToEvent(Display *dpy, XEvent *event, xEvent *wire); static Status DRI2EventToWire(Display *dpy, XEvent *event, xEvent *wire); static int DRI2Error(Display *display, xError *err, XExtCodes *codes, int *ret_code); static /* const */ XExtensionHooks dri2ExtensionHooks = { NULL, /* create_gc */ NULL, /* copy_gc */ NULL, /* flush_gc */ NULL, /* free_gc */ NULL, /* create_font */ NULL, /* free_font */ DRI2CloseDisplay, /* close_display */ DRI2WireToEvent, /* wire_to_event */ DRI2EventToWire, /* event_to_wire */ DRI2Error, /* error */ NULL, /* error_string */ }; static XEXT_GENERATE_FIND_DISPLAY (DRI2FindDisplay, dri2Info, dri2ExtensionName, &dri2ExtensionHooks, 0, NULL) static Bool DRI2WireToEvent(Display *dpy, XEvent *event, xEvent *wire) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); XextCheckExtension(dpy, info, dri2ExtensionName, False); switch ((wire->u.u.type & 0x7f) - info->codes->first_event) { #ifdef X_DRI2SwapBuffers case DRI2_BufferSwapComplete: /* Ignore swap events if we're not looking for them */ printf("BufferSwapComplete\n"); return False; #endif #ifdef DRI2_InvalidateBuffers case DRI2_InvalidateBuffers: printf("InvalidateBuffers\n"); return False; #endif default: /* client doesn't support server event */ break; } return False; } /* We don't actually support this. It doesn't make sense for clients to * send each other DRI2 events. */ static Status DRI2EventToWire(Display *dpy, XEvent *event, xEvent *wire) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); XextCheckExtension(dpy, info, dri2ExtensionName, False); switch (event->type) { default: /* client doesn't support server event */ break; } return Success; } static int DRI2Error(Display *display, xError *err, XExtCodes *codes, int *ret_code) { if (err->majorCode == codes->major_opcode && err->errorCode == BadDrawable && err->minorCode == X_DRI2CopyRegion) return True; /* If the X drawable was destroyed before the GLX drawable, the * DRI2 drawble will be gone by the time we call * DRI2DestroyDrawable. So just ignore BadDrawable here. */ if (err->majorCode == codes->major_opcode && err->errorCode == BadDrawable && err->minorCode == X_DRI2DestroyDrawable) return True; /* If the server is non-local DRI2Connect will raise BadRequest. * Swallow this so that DRI2Connect can signal this in its return code */ if (err->majorCode == codes->major_opcode && err->minorCode == X_DRI2Connect && err->errorCode == BadRequest) { *ret_code = False; return True; } return False; } Bool DRI2QueryExtension(Display * dpy, int *eventBase, int *errorBase) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); if (XextHasExtension(info)) { *eventBase = info->codes->first_event; *errorBase = info->codes->first_error; return True; } return False; } Bool DRI2QueryVersion(Display * dpy, int *major, int *minor) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2QueryVersionReply rep; xDRI2QueryVersionReq *req; int i, nevents; XextCheckExtension(dpy, info, dri2ExtensionName, False); LockDisplay(dpy); GetReq(DRI2QueryVersion, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2QueryVersion; req->majorVersion = DRI2_MAJOR; req->minorVersion = DRI2_MINOR; if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { UnlockDisplay(dpy); SyncHandle(); return False; } *major = rep.majorVersion; *minor = rep.minorVersion; UnlockDisplay(dpy); SyncHandle(); switch (rep.minorVersion) { case 1: nevents = 0; break; case 2: nevents = 1; break; case 3: default: nevents = 2; break; } for (i = 0; i < nevents; i++) { XESetWireToEvent (dpy, info->codes->first_event + i, DRI2WireToEvent); XESetEventToWire (dpy, info->codes->first_event + i, DRI2EventToWire); } return True; } Bool DRI2Connect(Display * dpy, XID window, char **driverName, char **deviceName) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2ConnectReply rep; xDRI2ConnectReq *req; XextCheckExtension(dpy, info, dri2ExtensionName, False); LockDisplay(dpy); GetReq(DRI2Connect, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2Connect; req->window = window; req->driverType = DRI2DriverDRI; if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { UnlockDisplay(dpy); SyncHandle(); return False; } if (rep.driverNameLength == 0 && rep.deviceNameLength == 0) { UnlockDisplay(dpy); SyncHandle(); return False; } *driverName = Xmalloc(rep.driverNameLength + 1); if (*driverName == NULL) { _XEatData(dpy, ((rep.driverNameLength + 3) & ~3) + ((rep.deviceNameLength + 3) & ~3)); UnlockDisplay(dpy); SyncHandle(); return False; } _XReadPad(dpy, *driverName, rep.driverNameLength); (*driverName)[rep.driverNameLength] = '\0'; *deviceName = Xmalloc(rep.deviceNameLength + 1); if (*deviceName == NULL) { Xfree(*driverName); _XEatData(dpy, ((rep.deviceNameLength + 3) & ~3)); UnlockDisplay(dpy); SyncHandle(); return False; } _XReadPad(dpy, *deviceName, rep.deviceNameLength); (*deviceName)[rep.deviceNameLength] = '\0'; UnlockDisplay(dpy); SyncHandle(); return True; } Bool DRI2Authenticate(Display * dpy, XID window, unsigned int magic) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2AuthenticateReq *req; xDRI2AuthenticateReply rep; XextCheckExtension(dpy, info, dri2ExtensionName, False); LockDisplay(dpy); GetReq(DRI2Authenticate, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2Authenticate; req->window = window; req->magic = magic; if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { UnlockDisplay(dpy); SyncHandle(); return False; } UnlockDisplay(dpy); SyncHandle(); return rep.authenticated; } void DRI2CreateDrawable(Display * dpy, XID drawable) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2CreateDrawableReq *req; XextSimpleCheckExtension(dpy, info, dri2ExtensionName); LockDisplay(dpy); GetReq(DRI2CreateDrawable, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2CreateDrawable; req->drawable = drawable; UnlockDisplay(dpy); SyncHandle(); } void DRI2DestroyDrawable(Display * dpy, XID drawable) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2DestroyDrawableReq *req; XextSimpleCheckExtension(dpy, info, dri2ExtensionName); XSync(dpy, False); LockDisplay(dpy); GetReq(DRI2DestroyDrawable, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2DestroyDrawable; req->drawable = drawable; UnlockDisplay(dpy); SyncHandle(); } DRI2Buffer * DRI2GetBuffers(Display * dpy, XID drawable, int *width, int *height, unsigned int *attachments, int count, int *outCount) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2GetBuffersReply rep; xDRI2GetBuffersReq *req; DRI2Buffer *buffers; xDRI2Buffer repBuffer; uint32_t *p; int i; XextCheckExtension(dpy, info, dri2ExtensionName, False); LockDisplay(dpy); GetReqExtra(DRI2GetBuffers, count * 4, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2GetBuffers; req->drawable = drawable; req->count = count; p = (uint32_t *) & req[1]; for (i = 0; i < count; i++) p[i] = attachments[i]; if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { UnlockDisplay(dpy); SyncHandle(); return NULL; } *width = rep.width; *height = rep.height; *outCount = rep.count; buffers = Xmalloc(rep.count * sizeof buffers[0]); if (buffers == NULL) { _XEatData(dpy, rep.count * sizeof repBuffer); UnlockDisplay(dpy); SyncHandle(); return NULL; } for (i = 0; i < rep.count; i++) { _XReadPad(dpy, (char *) &repBuffer, sizeof repBuffer); buffers[i].attachment = repBuffer.attachment; buffers[i].name = repBuffer.name; buffers[i].pitch = repBuffer.pitch; buffers[i].cpp = repBuffer.cpp; buffers[i].flags = repBuffer.flags; } UnlockDisplay(dpy); SyncHandle(); return buffers; } DRI2Buffer * DRI2GetBuffersWithFormat(Display * dpy, XID drawable, int *width, int *height, unsigned int *attachments, int count, int *outCount) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2GetBuffersReply rep; xDRI2GetBuffersReq *req; DRI2Buffer *buffers; xDRI2Buffer repBuffer; uint32_t *p; int i; XextCheckExtension(dpy, info, dri2ExtensionName, False); LockDisplay(dpy); GetReqExtra(DRI2GetBuffers, count * (4 * 2), req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2GetBuffersWithFormat; req->drawable = drawable; req->count = count; p = (uint32_t *) & req[1]; for (i = 0; i < (count * 2); i++) p[i] = attachments[i]; if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) { UnlockDisplay(dpy); SyncHandle(); return NULL; } *width = rep.width; *height = rep.height; *outCount = rep.count; buffers = Xmalloc(rep.count * sizeof buffers[0]); if (buffers == NULL) { _XEatData(dpy, rep.count * sizeof repBuffer); UnlockDisplay(dpy); SyncHandle(); return NULL; } for (i = 0; i < rep.count; i++) { _XReadPad(dpy, (char *) &repBuffer, sizeof repBuffer); buffers[i].attachment = repBuffer.attachment; buffers[i].name = repBuffer.name; buffers[i].pitch = repBuffer.pitch; buffers[i].cpp = repBuffer.cpp; buffers[i].flags = repBuffer.flags; } UnlockDisplay(dpy); SyncHandle(); return buffers; } void DRI2CopyRegion(Display * dpy, XID drawable, XserverRegion region, uint32_t dest, uint32_t src) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2CopyRegionReq *req; xDRI2CopyRegionReply rep; XextSimpleCheckExtension(dpy, info, dri2ExtensionName); LockDisplay(dpy); GetReq(DRI2CopyRegion, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2CopyRegion; req->drawable = drawable; req->region = region; req->dest = dest; req->src = src; (void) _XReply(dpy, (xReply *) & rep, 0, xFalse); UnlockDisplay(dpy); SyncHandle(); } #ifdef X_DRI2SwapBuffers static void load_swap_req(xDRI2SwapBuffersReq *req, uint64_t target, uint64_t divisor, uint64_t remainder) { req->target_msc_hi = target >> 32; req->target_msc_lo = target & 0xffffffff; req->divisor_hi = divisor >> 32; req->divisor_lo = divisor & 0xffffffff; req->remainder_hi = remainder >> 32; req->remainder_lo = remainder & 0xffffffff; } static uint64_t vals_to_card64(uint32_t lo, uint32_t hi) { return (uint64_t)hi << 32 | lo; } uint64_t DRI2SwapBuffers(Display *dpy, XID drawable, uint64_t target_msc, uint64_t divisor, uint64_t remainder) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2SwapBuffersReq *req; xDRI2SwapBuffersReply rep; uint64_t count; XextCheckExtension (dpy, info, dri2ExtensionName, 0); LockDisplay(dpy); GetReq(DRI2SwapBuffers, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2SwapBuffers; req->drawable = drawable; load_swap_req(req, target_msc, divisor, remainder); (void) _XReply(dpy, (xReply *)&rep, 0, xFalse); count = vals_to_card64(rep.swap_lo, rep.swap_hi); UnlockDisplay(dpy); SyncHandle(); return count; } #endif #ifdef X_DRI2GetMSC Bool DRI2GetMSC(Display *dpy, XID drawable, uint64_t *ust, uint64_t *msc, uint64_t *sbc) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2GetMSCReq *req; xDRI2MSCReply rep; XextCheckExtension (dpy, info, dri2ExtensionName, False); LockDisplay(dpy); GetReq(DRI2GetMSC, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2GetMSC; req->drawable = drawable; if (!_XReply(dpy, (xReply *)&rep, 0, xFalse)) { UnlockDisplay(dpy); SyncHandle(); return False; } *ust = vals_to_card64(rep.ust_lo, rep.ust_hi); *msc = vals_to_card64(rep.msc_lo, rep.msc_hi); *sbc = vals_to_card64(rep.sbc_lo, rep.sbc_hi); UnlockDisplay(dpy); SyncHandle(); return True; } #endif #ifdef X_DRI2WaitMSC static void load_msc_req(xDRI2WaitMSCReq *req, uint64_t target, uint64_t divisor, uint64_t remainder) { req->target_msc_hi = target >> 32; req->target_msc_lo = target & 0xffffffff; req->divisor_hi = divisor >> 32; req->divisor_lo = divisor & 0xffffffff; req->remainder_hi = remainder >> 32; req->remainder_lo = remainder & 0xffffffff; } Bool DRI2WaitMSC(Display *dpy, XID drawable, uint64_t target_msc, uint64_t divisor, uint64_t remainder, uint64_t *ust, uint64_t *msc, uint64_t *sbc) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2WaitMSCReq *req; xDRI2MSCReply rep; XextCheckExtension (dpy, info, dri2ExtensionName, False); LockDisplay(dpy); GetReq(DRI2WaitMSC, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2WaitMSC; req->drawable = drawable; load_msc_req(req, target_msc, divisor, remainder); if (!_XReply(dpy, (xReply *)&rep, 0, xFalse)) { UnlockDisplay(dpy); SyncHandle(); return False; } *ust = ((uint64_t)rep.ust_hi << 32) | (uint64_t)rep.ust_lo; *msc = ((uint64_t)rep.msc_hi << 32) | (uint64_t)rep.msc_lo; *sbc = ((uint64_t)rep.sbc_hi << 32) | (uint64_t)rep.sbc_lo; UnlockDisplay(dpy); SyncHandle(); return True; } #endif #ifdef X_DRI2WaitSBC static void load_sbc_req(xDRI2WaitSBCReq *req, uint64_t target) { req->target_sbc_hi = target >> 32; req->target_sbc_lo = target & 0xffffffff; } Bool DRI2WaitSBC(Display *dpy, XID drawable, uint64_t target_sbc, uint64_t *ust, uint64_t *msc, uint64_t *sbc) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2WaitSBCReq *req; xDRI2MSCReply rep; XextCheckExtension (dpy, info, dri2ExtensionName, False); LockDisplay(dpy); GetReq(DRI2WaitSBC, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2WaitSBC; req->drawable = drawable; load_sbc_req(req, target_sbc); if (!_XReply(dpy, (xReply *)&rep, 0, xFalse)) { UnlockDisplay(dpy); SyncHandle(); return False; } *ust = ((uint64_t)rep.ust_hi << 32) | rep.ust_lo; *msc = ((uint64_t)rep.msc_hi << 32) | rep.msc_lo; *sbc = ((uint64_t)rep.sbc_hi << 32) | rep.sbc_lo; UnlockDisplay(dpy); SyncHandle(); return True; } #endif #ifdef X_DRI2SwapInterval void DRI2SwapInterval(Display *dpy, XID drawable, int interval) { XExtDisplayInfo *info = DRI2FindDisplay(dpy); xDRI2SwapIntervalReq *req; XextSimpleCheckExtension (dpy, info, dri2ExtensionName); LockDisplay(dpy); GetReq(DRI2SwapInterval, req); req->reqType = info->codes->major_opcode; req->dri2ReqType = X_DRI2SwapInterval; req->drawable = drawable; req->interval = interval; UnlockDisplay(dpy); SyncHandle(); } #endif xf86-video-intel-2.99.917/test/Makefile.am0000664000175000017500000000251412432737457014762 00000000000000stress_TESTS = \ basic-fillrect \ basic-tiledrect \ basic-stippledrect \ basic-rectangle \ basic-string \ basic-copyarea \ basic-copyarea-size \ basic-putimage \ basic-lines \ basic-stress \ DrawSegments \ cursor-test \ render-fill \ render-trapezoid \ render-trapezoid-image \ render-fill-copy \ render-composite-solid \ render-composite-solid-mask \ render-copyarea \ render-copyarea-mask \ render-copyarea-size \ render-copy-alphaless \ mixed-stress \ shm-test \ $(NULL) if DRI2 stress_TESTS += \ dri2-race \ dri2-swap \ dri2-test \ $(NULL) endif if X11_DRI3 stress_TESTS += \ dri3-test \ present-test \ $(NULL) endif check_PROGRAMS = $(stress_TESTS) noinst_PROGRAMS = lowlevel-blt-bench AM_CFLAGS = @CWARNFLAGS@ $(X11_CFLAGS) $(DRM_CFLAGS) LDADD = libtest.la $(X11_LIBS) $(DRM_LIBS) $(CLOCK_GETTIME_LIBS) noinst_LTLIBRARIES = libtest.la libtest_la_SOURCES = \ test.h \ test_display.c \ test_image.c \ test_log.c \ test_render.c \ $(NULL) if DRI2 libtest_la_SOURCES += \ dri2.c \ dri2.h \ $(NULL) endif if X11_DRI3 libtest_la_SOURCES += \ dri3.c \ dri3.h \ $(NULL) AM_CFLAGS += $(X11_DRI3_CFLAGS) LDADD += $(X11_DRI3_LIBS) endif vsync.avi: mkvsync.sh ./mkvsync.sh $@ clean-vsync-avi: rm -rf vsync.avi .build.tmp EXTRA_DIST = README mkvsync.sh tearing.mp4 virtual.conf clean-local: clean-vsync-avi xf86-video-intel-2.99.917/test/render-copy-alphaless.c0000664000175000017500000001515412400044327017255 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" static void show_cells(char *buf, const uint32_t *out, const uint32_t *ref, int x, int y, int w, int h) { int i, j, len = 0; for (j = y - 2; j <= y + 2; j++) { if (j < 0 || j >= h) continue; for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", out[j*w+i]); } len += sprintf(buf+len, "\t"); for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", ref[j*w+i]); } len += sprintf(buf+len, "\n"); } } static void fill_rect(struct test_display *t, Picture p, int x, int y, int w, int h, uint8_t red, uint8_t green, uint8_t blue) { Drawable tmp; XRenderColor c; Picture src; XRenderPictFormat *format; format = XRenderFindStandardFormat(t->dpy, PictStandardRGB24); tmp = XCreatePixmap(t->dpy, DefaultRootWindow(t->dpy), w, h, format->depth); src = XRenderCreatePicture(t->dpy, tmp, format, 0, NULL); c.red = (int)red << 8 | red; c.green = (int)green << 8 | green; c.blue = (int)blue << 8 | blue; c.alpha = 0xffff; XRenderFillRectangle(t->dpy, PictOpSrc, src, &c, 0, 0, w, h); XRenderComposite(t->dpy, PictOpOver, src, 0, p, 0, 0, 0, 0, x, y, w, h); XRenderFreePicture(t->dpy, src); XFreePixmap(t->dpy, tmp); } static void pixel_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = malloc(t->out.width*t->out.height*4); struct { uint16_t x, y; } *pixels = malloc(reps*sizeof(*pixels)); int r, s; test_target_create_render(&t->out, target, &tt); printf("Testing setting of single pixels (%s): ", test_target_name(target)); fflush(stdout); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (tt.width - 1); int y = rand() % (tt.height - 1); uint8_t red = rand(); uint8_t green = rand(); uint8_t blue = rand(); fill_rect(&t->out, tt.picture, x, y, 1, 1, red, green, blue); pixels[r].x = x; pixels[r].y = y; cells[y*tt.width+x] = color(red, green, blue, 0xff); } test_init_image(&image, &t->out.shm, tt.format, 1, 1); for (r = 0; r < reps; r++) { uint32_t x = pixels[r].x; uint32_t y = pixels[r].y; uint32_t result; XShmGetImage(t->out.dpy, tt.draw, &image, x, y, AllPlanes); result = *(uint32_t *)image.data; if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask = depth_mask(image.depth); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result); } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(pixels); free(cells); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void area_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = calloc(sizeof(uint32_t), t->out.width*t->out.height); int r, s, x, y; printf("Testing area sets (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &tt); clear(&t->out, &tt); test_init_image(&image, &t->out.shm, tt.format, tt.width, tt.height); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int w = 1 + rand() % (tt.width - 1); int h = 1 + rand() % (tt.height - 1); uint8_t red = rand(); uint8_t green = rand(); uint8_t blue = rand(); x = rand() % (2*tt.width) - tt.width; y = rand() % (2*tt.height) - tt.height; fill_rect(&t->out, tt.picture, x, y, w, h, red, green, blue); if (x < 0) w += x, x = 0; if (y < 0) h += y, y = 0; if (x >= tt.width || y >= tt.height) continue; if (x + w > tt.width) w = tt.width - x; if (y + h > tt.height) h = tt.height - y; if (w <= 0 || h <= 0) continue; pixman_fill(cells, tt.width, 32, x, y, w, h, color(red, green, blue, 0xff)); } XShmGetImage(t->out.dpy, tt.draw, &image, 0, 0, AllPlanes); for (y = 0; y < tt.height; y++) { for (x = 0; x < tt.width; x++) { uint32_t result = *(uint32_t *) (image.data + y*image.bytes_per_line + x*image.bits_per_pixel/8); if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { char buf[600]; uint32_t mask = depth_mask(image.depth); show_cells(buf, (uint32_t*)image.data, cells, x, y, tt.width, tt.height); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead (set %d, reps %d)\n%s", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result, s, reps, buf); } } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(cells); } static void rect_tests(struct test *t, int reps, int sets, enum target target, int use_window) { struct test_target out, ref; int r, s; printf("Testing area fills (%s, using %s source): ", test_target_name(target), use_window ? "window" : "pixmap"); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x, y, w, h; uint8_t red = rand(); uint8_t green = rand(); uint8_t blue = rand(); x = rand() % (out.width - 1); y = rand() % (out.height - 1); w = 1 + rand() % (out.width - x - 1); h = 1 + rand() % (out.height - y - 1); fill_rect(&t->out, out.picture, x, y, w, h, red, green, blue); fill_rect(&t->ref, ref.picture, x, y, w, h, red, green, blue); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); pixel_tests(&test, reps, sets, PIXMAP); area_tests(&test, reps, sets, PIXMAP); rect_tests(&test, reps, sets, PIXMAP, 0); } return 0; } xf86-video-intel-2.99.917/test/present-test.c0000664000175000017500000004016412400044327015510 00000000000000/* * Copyright (c) 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include #include #if HAVE_X11_EXTENSIONS_SHMPROTO_H #include #elif HAVE_X11_EXTENSIONS_SHMSTR_H #include #else #error Failed to find the right header for X11 MIT-SHM protocol definitions #endif #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "dri3.h" #define ALIGN(x, y) (((x) + (y) - 1) & -(y)) #define PAGE_ALIGN(x) ALIGN(x, 4096) #define GTT I915_GEM_DOMAIN_GTT #define CPU I915_GEM_DOMAIN_CPU static int _x_error_occurred; static uint32_t stamp; static int _check_error_handler(Display *display, XErrorEvent *event) { printf("X11 error from display %s, serial=%ld, error=%d, req=%d.%d\n", DisplayString(display), event->serial, event->error_code, event->request_code, event->minor_code); _x_error_occurred++; return False; /* ignored */ } static int is_i915_device(int fd) { drm_version_t version; char name[5] = ""; memset(&version, 0, sizeof(version)); version.name_len = 4; version.name = name; if (drmIoctl(fd, DRM_IOCTL_VERSION, &version)) return 0; return strcmp("i915", name) == 0; } static int is_intel(int fd) { struct drm_i915_getparam gp; int ret; /* Confirm that this is a i915.ko device with GEM/KMS enabled */ ret = is_i915_device(fd); if (ret) { gp.param = I915_PARAM_HAS_GEM; gp.value = &ret; if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) ret = 0; } return ret; } static void *setup_msc(Display *dpy, Window win) { xcb_connection_t *c = XGetXCBConnection(dpy); xcb_void_cookie_t cookie; uint32_t id = xcb_generate_id(c); xcb_generic_error_t *error; void *q; cookie = xcb_present_select_input_checked(c, id, win, XCB_PRESENT_EVENT_MASK_COMPLETE_NOTIFY); q = xcb_register_for_special_xge(c, &xcb_present_id, id, &stamp); error = xcb_request_check(c, cookie); assert(error == NULL); return q; } static uint64_t check_msc(Display *dpy, Window win, void *q, uint64_t last_msc) { xcb_connection_t *c = XGetXCBConnection(dpy); uint64_t msc = 0; xcb_present_notify_msc(c, win, 0, 0, 0, 0); xcb_flush(c); do { xcb_present_complete_notify_event_t *ce; xcb_generic_event_t *ev; ev = xcb_wait_for_special_event(c, q); if (ev == NULL) break; ce = (xcb_present_complete_notify_event_t *)ev; if (ce->kind != XCB_PRESENT_COMPLETE_KIND_PIXMAP) msc = ce->msc; free(ev); } while (msc == 0); if (msc < last_msc) { printf("Invalid MSC: was %llu, now %llu\n", (long long)last_msc, (long long)msc); } return msc; } static void teardown_msc(Display *dpy, void *q) { xcb_unregister_for_special_event(XGetXCBConnection(dpy), q); } static int test_whole(Display *dpy) { Pixmap pixmap; struct dri3_fence fence; Window root; unsigned int width, height; unsigned border, depth; int x, y, ret = 1; XGetGeometry(dpy, DefaultRootWindow(dpy), &root, &x, &y, &width, &height, &border, &depth); if (dri3_create_fence(dpy, root, &fence)) return 0; printf("Testing whole screen flip: %dx%d\n", width, height); _x_error_occurred = 0; xshmfence_reset(fence.addr); pixmap = XCreatePixmap(dpy, root, width, height, depth); xcb_present_pixmap(XGetXCBConnection(dpy), root, pixmap, 0, /* sbc */ 0, /* valid */ 0, /* update */ 0, /* x_off */ 0, /* y_off */ None, None, /* wait fence */ fence.xid, XCB_PRESENT_OPTION_NONE, 0, /* target msc */ 0, /* divisor */ 0, /* remainder */ 0, NULL); XFreePixmap(dpy, pixmap); pixmap = XCreatePixmap(dpy, root, width, height, depth); xcb_present_pixmap(XGetXCBConnection(dpy), root, pixmap, 0, /* sbc */ 0, /* valid */ 0, /* update */ 0, /* x_off */ 0, /* y_off */ None, None, /* wait fence */ None, /* sync fence */ XCB_PRESENT_OPTION_NONE, 0, /* target msc */ 0, /* divisor */ 0, /* remainder */ 0, NULL); XFreePixmap(dpy, pixmap); XFlush(dpy); ret = !!xshmfence_await(fence.addr); dri3_fence_free(dpy, &fence); XSync(dpy, True); ret += !!_x_error_occurred; return ret; } static inline XRRScreenResources *_XRRGetScreenResourcesCurrent(Display *dpy, Window window) { XRRScreenResources *res; res = XRRGetScreenResourcesCurrent(dpy, window); if (res == NULL) res = XRRGetScreenResources(dpy, window); return res; } static XRRModeInfo *lookup_mode(XRRScreenResources *res, int id) { int i; for (i = 0; i < res->nmode; i++) { if (res->modes[i].id == id) return &res->modes[i]; } return NULL; } static int for_each_crtc(Display *dpy, int (*func)(Display *dpy, RRCrtc crtc, int width, int height, void *closure), void *closure) { XRRScreenResources *res; XRRCrtcInfo **original_crtc; int i, j, err = 0; if (!XRRQueryVersion(dpy, &i, &j)) return -1; res = _XRRGetScreenResourcesCurrent(dpy, DefaultRootWindow(dpy)); if (res == NULL) return -1; original_crtc = malloc(sizeof(XRRCrtcInfo *)*res->ncrtc); for (i = 0; i < res->ncrtc; i++) original_crtc[i] = XRRGetCrtcInfo(dpy, res, res->crtcs[i]); printf("noutput=%d, ncrtc=%d\n", res->noutput, res->ncrtc); for (i = 0; i < res->noutput; i++) { XRROutputInfo *output; XRRModeInfo *mode; output = XRRGetOutputInfo(dpy, res, res->outputs[i]); if (output == NULL) continue; mode = NULL; if (res->nmode) mode = lookup_mode(res, output->modes[0]); for (j = 0; mode && j < output->ncrtc; j++) { printf("[%d, %d] -- OUTPUT:%ld, CRTC:%ld\n", i, j, (long)res->outputs[i], (long)output->crtcs[j]); XRRSetCrtcConfig(dpy, res, output->crtcs[j], CurrentTime, 0, 0, output->modes[0], RR_Rotate_0, &res->outputs[i], 1); XSync(dpy, True); err += func(dpy, output->crtcs[j], mode->width, mode->height, closure); XRRSetCrtcConfig(dpy, res, output->crtcs[j], CurrentTime, 0, 0, None, RR_Rotate_0, NULL, 0); XSync(dpy, True); } XRRFreeOutputInfo(output); } for (i = 0; i < res->ncrtc; i++) XRRSetCrtcConfig(dpy, res, res->crtcs[i], CurrentTime, original_crtc[i]->x, original_crtc[i]->y, original_crtc[i]->mode, original_crtc[i]->rotation, original_crtc[i]->outputs, original_crtc[i]->noutput); free(original_crtc); XRRFreeScreenResources(res); return j; } struct test_crtc { Window win; int depth; unsigned flags; struct dri3_fence fence; void *queue; uint64_t msc; }; #define SYNC 0x1 static int __test_crtc(Display *dpy, RRCrtc crtc, int width, int height, void *closure) { struct test_crtc *test = closure; Pixmap pixmap; int err = 0; test->msc = check_msc(dpy, test->win, test->queue, test->msc); if (test->flags & SYNC) xshmfence_reset(test->fence.addr); pixmap = XCreatePixmap(dpy, test->win, width, height, test->depth); xcb_present_pixmap(XGetXCBConnection(dpy), test->win, pixmap, 0, /* sbc */ 0, /* valid */ 0, /* update */ 0, /* x_off */ 0, /* y_off */ crtc, None, /* wait fence */ test->flags & SYNC ? test->fence.xid : None, XCB_PRESENT_OPTION_NONE, 0, /* target msc */ 1, /* divisor */ 0, /* remainder */ 0, NULL); XFreePixmap(dpy, pixmap); if (test->flags & SYNC) { pixmap = XCreatePixmap(dpy, test->win, width, height, test->depth); xcb_present_pixmap(XGetXCBConnection(dpy), test->win, pixmap, 1, /* sbc */ 0, /* valid */ 0, /* update */ 0, /* x_off */ 0, /* y_off */ crtc, None, /* wait fence */ None, /* sync fence */ XCB_PRESENT_OPTION_NONE, 1, /* target msc */ 1, /* divisor */ 0, /* remainder */ 0, NULL); XFreePixmap(dpy, pixmap); XFlush(dpy); err += !!xshmfence_await(test->fence.addr); } test->msc = check_msc(dpy, test->win, test->queue, test->msc); return err; } static int test_crtc(Display *dpy, void *queue, uint64_t last_msc) { struct test_crtc test; int err = 0; XSync(dpy, True); _x_error_occurred = 0; test.win = DefaultRootWindow(dpy); test.depth = DefaultDepth(dpy, DefaultScreen(dpy)); if (dri3_create_fence(dpy, test.win, &test.fence)) return -1; test.queue = queue; test.msc = last_msc; printf("Testing each crtc, without waiting for each flip\n"); test.flags = 0; err += for_each_crtc(dpy, __test_crtc, &test); printf("Testing each crtc, waiting for flips to complete\n"); test.flags = SYNC; err += for_each_crtc(dpy, __test_crtc, &test); test.msc = check_msc(dpy, test.win, test.queue, test.msc); dri3_fence_free(dpy, &test.fence); XSync(dpy, True); err += !!_x_error_occurred; if (err) printf("%s: failures=%d\n", __func__, err); return err; } static int can_use_shm(Display *dpy) { int major, minor, has_pixmap; if (!XShmQueryExtension(dpy)) return 0; XShmQueryVersion(dpy, &major, &minor, &has_pixmap); return has_pixmap; } static int test_shm(Display *dpy) { Window win = DefaultRootWindow(dpy); XShmSegmentInfo shm; Pixmap pixmap; Window root; unsigned int width, height; unsigned border, depth; int x, y, ret = 1; if (!can_use_shm(dpy)) return 0; _x_error_occurred = 0; XGetGeometry(dpy, win, &root, &x, &y, &width, &height, &border, &depth); printf("Using %dx%d SHM\n", width, height); shm.shmid = shmget(IPC_PRIVATE, height * 4*width, IPC_CREAT | 0666); if (shm.shmid == -1) return 0; shm.shmaddr = shmat(shm.shmid, 0, 0); if (shm.shmaddr == (char *) -1) goto rmid; shm.readOnly = False; XShmAttach(dpy, &shm); pixmap = XShmCreatePixmap(dpy, DefaultRootWindow(dpy), shm.shmaddr, &shm, width, height, 24); if (_x_error_occurred) goto detach; xcb_present_pixmap(XGetXCBConnection(dpy), win, pixmap, 0, /* sbc */ 0, /* valid */ 0, /* update */ 0, /* x_off */ 0, /* y_off */ None, None, /* wait fence */ None, XCB_PRESENT_OPTION_NONE, 0, /* target msc */ 0, /* divisor */ 0, /* remainder */ 0, NULL); XFreePixmap(dpy, pixmap); XSync(dpy, True); if (_x_error_occurred) goto detach; ret = 0; detach: XShmDetach(dpy, &shm); shmdt(shm.shmaddr); XSync(dpy, False); rmid: shmctl(shm.shmid, IPC_RMID, NULL); return ret; } static uint32_t gem_create(int fd, int size) { struct drm_i915_gem_create create; create.handle = 0; create.size = size; (void)drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); return create.handle; } struct local_i915_gem_caching { uint32_t handle; uint32_t caching; }; #define LOCAL_I915_GEM_SET_CACHING 0x2f #define LOCAL_IOCTL_I915_GEM_SET_CACHING DRM_IOW(DRM_COMMAND_BASE + LOCAL_I915_GEM_SET_CACHING, struct local_i915_gem_caching) static int gem_set_caching(int fd, uint32_t handle, int caching) { struct local_i915_gem_caching arg; arg.handle = handle; arg.caching = caching; return drmIoctl(fd, LOCAL_IOCTL_I915_GEM_SET_CACHING, &arg) == 0; } static int gem_export(int fd, uint32_t handle) { struct drm_prime_handle args; args.handle = handle; args.flags = O_CLOEXEC; if (drmIoctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args)) return -1; return args.fd; } static void gem_close(int fd, uint32_t handle) { struct drm_gem_close close; close.handle = handle; (void)drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close); } static int test_dri3(Display *dpy) { Window win = DefaultRootWindow(dpy); Pixmap pixmap; Window root; unsigned int width, height; unsigned border, depth; unsigned stride, size; int x, y, ret = 1; int device, handle; int bpp; device = dri3_open(dpy); if (device < 0) return 0; if (!is_intel(device)) return 0; printf("Opened Intel DRI3 device\n"); XGetGeometry(dpy, win, &root, &x, &y, &width, &height, &border, &depth); switch (depth) { case 8: bpp = 8; break; case 15: case 16: bpp = 16; break; case 24: case 32: bpp = 32; break; default: return 0; } stride = width * bpp/8; size = PAGE_ALIGN(stride * height); printf("Creating DRI3 %dx%d (source stride=%d, size=%d) for GTT\n", width, height, stride, size); pixmap = 0; handle = gem_create(device, size); if (handle) { pixmap = dri3_create_pixmap(dpy, root, width, height, depth, gem_export(device, handle), bpp, stride, size); gem_close(device, handle); } if (pixmap == 0) goto fail; xcb_present_pixmap(XGetXCBConnection(dpy), win, pixmap, 0, /* sbc */ 0, /* valid */ 0, /* update */ 0, /* x_off */ 0, /* y_off */ None, None, /* wait fence */ None, XCB_PRESENT_OPTION_NONE, 0, /* target msc */ 0, /* divisor */ 0, /* remainder */ 0, NULL); XFreePixmap(dpy, pixmap); XSync(dpy, True); if (_x_error_occurred) goto fail; printf("Creating DRI3 %dx%d (source stride=%d, size=%d) for CPU\n", width, height, stride, size); pixmap = 0; handle = gem_create(device, size); if (handle) { gem_set_caching(device, handle, CPU); handle = dri3_create_pixmap(dpy, root, width, height, depth, gem_export(device, handle), bpp, stride, size); gem_close(device, handle); } if (pixmap == 0) goto fail; xcb_present_pixmap(XGetXCBConnection(dpy), win, pixmap, 0, /* sbc */ 0, /* valid */ 0, /* update */ 0, /* x_off */ 0, /* y_off */ None, None, /* wait fence */ None, XCB_PRESENT_OPTION_NONE, 0, /* target msc */ 0, /* divisor */ 0, /* remainder */ 0, NULL); XFreePixmap(dpy, pixmap); XSync(dpy, True); if (_x_error_occurred) goto fail; ret = 0; fail: close(device); return ret; } static int has_present(Display *dpy) { xcb_connection_t *c = XGetXCBConnection(dpy); xcb_present_query_version_reply_t *reply; xcb_generic_error_t *error = NULL; reply = xcb_present_query_version_reply(c, xcb_present_query_version(c, XCB_PRESENT_MAJOR_VERSION, XCB_PRESENT_MINOR_VERSION), &error); free(reply); free(error); return reply != NULL; } int main(void) { Display *dpy; Window root; int error = 0; uint64_t last_msc; void *queue; dpy = XOpenDisplay(NULL); if (dpy == NULL) return 77; if (!has_present(dpy)) return 77; root = DefaultRootWindow(dpy); signal(SIGALRM, SIG_IGN); XSetErrorHandler(_check_error_handler); queue = setup_msc(dpy, root); last_msc = check_msc(dpy, root, queue, 0); error += test_whole(dpy); last_msc = check_msc(dpy, root, queue, last_msc); error += test_crtc(dpy, queue, last_msc); last_msc = check_msc(dpy, root, queue, last_msc); error += test_shm(dpy); last_msc = check_msc(dpy, root, queue, last_msc); error += test_dri3(dpy); last_msc = check_msc(dpy, root, queue, last_msc); teardown_msc(dpy, queue); return !!error; } xf86-video-intel-2.99.917/test/dri2.h0000664000175000017500000000702112244635610013722 00000000000000/* * Copyright © 2007,2008 Red Hat, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Soft- * ware"), to deal in the Software without restriction, including without * limitation the rights to use, copy, modify, merge, publish, distribute, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, provided that the above copyright * notice(s) and this permission notice appear in all copies of the Soft- * ware and that both the above copyright notice(s) and this permission * notice appear in supporting documentation. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABIL- * ITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF THIRD PARTY * RIGHTS. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR HOLDERS INCLUDED IN * THIS NOTICE BE LIABLE FOR ANY CLAIM, OR ANY SPECIAL INDIRECT OR CONSE- * QUENTIAL DAMAGES, OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFOR- * MANCE OF THIS SOFTWARE. * * Except as contained in this notice, the name of a copyright holder shall * not be used in advertising or otherwise to promote the sale, use or * other dealings in this Software without prior written authorization of * the copyright holder. * * Authors: * Kristian Høgsberg (krh@redhat.com) */ #ifndef _DRI2_H_ #define _DRI2_H_ #include #include #include typedef struct { unsigned int attachment; unsigned int name; unsigned int pitch; unsigned int cpp; unsigned int flags; } DRI2Buffer; extern Bool DRI2QueryExtension(Display * display, int *eventBase, int *errorBase); extern Bool DRI2QueryVersion(Display * display, int *major, int *minor); extern Bool DRI2Connect(Display * display, XID window, char **driverName, char **deviceName); extern Bool DRI2Authenticate(Display * display, XID window, unsigned int magic); extern void DRI2CreateDrawable(Display * display, XID drawable); extern void DRI2DestroyDrawable(Display * display, XID handle); extern DRI2Buffer* DRI2GetBuffers(Display * dpy, XID drawable, int *width, int *height, unsigned int *attachments, int count, int *outCount); /** * \note * This function is only supported with DRI2 version 1.1 or later. */ extern DRI2Buffer* DRI2GetBuffersWithFormat(Display * dpy, XID drawable, int *width, int *height, unsigned int *attachments, int count, int *outCount); extern void DRI2CopyRegion(Display * dpy, XID drawable, XserverRegion region, uint32_t dest, uint32_t src); extern uint64_t DRI2SwapBuffers(Display *dpy, XID drawable, uint64_t target_msc, uint64_t divisor, uint64_t remainder); extern Bool DRI2GetMSC(Display *dpy, XID drawable, uint64_t *ust, uint64_t *msc, uint64_t *sbc); extern Bool DRI2WaitMSC(Display *dpy, XID drawable, uint64_t target_msc, uint64_t divisor, uint64_t remainder, uint64_t *ust, uint64_t *msc, uint64_t *sbc); extern Bool DRI2WaitSBC(Display *dpy, XID drawable, uint64_t target_sbc, uint64_t *ust, uint64_t *msc, uint64_t *sbc); extern void DRI2SwapInterval(Display *dpy, XID drawable, int interval); #endif xf86-video-intel-2.99.917/test/basic-lines.c0000664000175000017500000000566612400044327015254 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" static const XPoint points[]= { /* top */ { 0, 0}, { 1, 0}, { 2, 0}, { 3, 0}, { 4, 0}, { 5, 0}, { 6, 0}, { 7, 0}, { 8, 0}, /* right */ { 8, 1}, { 8, 2}, { 8, 3}, { 8, 4}, { 8, 5}, { 8, 6}, { 8, 7}, { 8, 8}, /* bottom */ { 7, 8}, { 6, 8}, { 5, 8}, { 4, 8}, { 3, 8}, { 2, 8}, { 1, 8}, { 0, 8}, /* left */ { 0, 7}, { 0, 6}, { 0, 5}, { 0, 4}, { 0, 3}, { 0, 2}, { 0, 1}, { 0, 0} /* and origin again for luck */ }; #define NUM_POINTS (sizeof(points)/sizeof(points[0])) static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void draw_line(struct test_display *dpy, struct test_target *tt, int alu, int width, int style, int cap, const XPoint *p1, const XPoint *p2, int dx, int dy) { XGCValues val; GC gc; val.function = GXcopy; val.foreground = WhitePixel(dpy->dpy, 0); val.line_width = width; val.line_style = style; val.cap_style = cap; gc = XCreateGC(dpy->dpy, tt->draw, GCForeground | GCFunction | GCLineWidth | GCLineStyle | GCCapStyle, &val); XDrawLine(dpy->dpy, tt->draw, gc, p1->x + dx, p1->y + dy, p2->x + dx, p2->y + dy); XFreeGC(dpy->dpy, gc); } static void line_tests(struct test *t, enum target target) { char buf[1024]; struct test_target out, ref; int a, b, alu, lw, style, cap; printf("Testing drawing of single line segments (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); test_target_create_render(&t->ref, target, &ref); style = LineSolid; for (alu = 0; alu < 16; alu++) { for (cap = CapNotLast; cap <= CapProjecting; cap++) { for (lw = 0; lw <= 4; lw++) { for (a = 0; a < NUM_POINTS; a++) { for (b = 0; b < NUM_POINTS; b++) { sprintf(buf, "p1=(%d, %d), p2=(%d, %d), width=%d, cap=%d, alu=%d", points[a].x, points[a].y, points[b].x, points[b].y, lw, cap, alu); clear(&t->out, &out); clear(&t->ref, &ref); draw_line(&t->out, &out, alu, lw, style, cap, &points[a], &points[b], 64, 64); draw_line(&t->ref, &ref, alu, lw, style, cap, &points[a], &points[b], 64, 64); test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, buf); } } } } } test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); printf("\n"); } int main(int argc, char **argv) { struct test test; enum target t; test_init(&test, argc, argv); for (t = TARGET_FIRST; t <= TARGET_LAST; t++) line_tests(&test, t); return 0; } xf86-video-intel-2.99.917/test/render-fill.c0000664000175000017500000001357512400044327015264 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" static const uint8_t ops[] = { PictOpClear, PictOpSrc, PictOpDst, }; static void fill_rect(struct test_display *dpy, Picture p, uint8_t op, int x, int y, int w, int h, uint8_t red, uint8_t green, uint8_t blue, uint8_t alpha) { XRenderColor render_color; render_color.red = red * alpha; render_color.green = green * alpha; render_color.blue = blue * alpha; render_color.alpha = alpha << 8; XRenderFillRectangle(dpy->dpy, op, p, &render_color, x, y, w,h); } static void pixel_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = malloc(t->out.width*t->out.height*4); struct { uint16_t x, y; } *pixels = malloc(reps*sizeof(*pixels)); int r, s; test_target_create_render(&t->out, target, &tt); printf("Testing setting of single pixels (%s): ", test_target_name(target)); fflush(stdout); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (tt.width - 1); int y = rand() % (tt.height - 1); int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; fill_rect(&t->out, tt.picture, PictOpSrc, x, y, 1, 1, red, green, blue, alpha); pixels[r].x = x; pixels[r].y = y; cells[y*tt.width+x] = color(red, green, blue, alpha); } test_init_image(&image, &t->out.shm, tt.format, 1, 1); for (r = 0; r < reps; r++) { uint32_t result; uint32_t x = pixels[r].x; uint32_t y = pixels[r].y; XShmGetImage(t->out.dpy, tt.draw, &image, x, y, AllPlanes); result = *(uint32_t *)image.data; if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask = depth_mask(image.depth); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask); } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(pixels); free(cells); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void area_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = calloc(sizeof(uint32_t), t->out.width*t->out.height); int r, s, x, y; printf("Testing area sets (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &tt); clear(&t->out, &tt); test_init_image(&image, &t->out.shm, tt.format, tt.width, tt.height); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int w = rand() % tt.width; int h = rand() % tt.height; int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; x = rand() % (2*tt.width) - tt.width; y = rand() % (2*tt.height) - tt.height; fill_rect(&t->out, tt.picture, PictOpSrc, x, y, w, h, red, green, blue, alpha); if (x < 0) w += x, x = 0; if (y < 0) h += y, y = 0; if (x >= tt.width || y >= tt.height) continue; if (x + w > tt.width) w = tt.width - x; if (y + h > tt.height) h = tt.height - y; if (w <= 0 || h <= 0) continue; pixman_fill(cells, tt.width, 32, x, y, w, h, color(red, green, blue, alpha)); } XShmGetImage(t->out.dpy, tt.draw, &image, 0, 0, AllPlanes); for (y = 0; y < tt.height; y++) { for (x = 0; x < tt.width; x++) { uint32_t result = *(uint32_t *)(image.data + y*image.bytes_per_line + image.bits_per_pixel*x/8); if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask; if (image.depth == 32) mask = 0xffffffff; else mask = (1 << image.depth) - 1; die("failed to set pixel (%d,%d) to %08x[%08x], found %08x instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask); } } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(cells); } static void rect_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing area fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % out.width; int h = rand() % out.height; int op = ops[rand() % sizeof(ops)]; int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; fill_rect(&t->out, out.picture, op, x, y, w, h, red, green, blue, alpha); fill_rect(&t->ref, ref.picture, op, x, y, w, h, red, green, blue, alpha); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { pixel_tests(&test, reps, sets, t); area_tests(&test, reps, sets, t); rect_tests(&test, reps, sets, t); } } return 0; } xf86-video-intel-2.99.917/test/cursor-test.c0000664000175000017500000001073412432737457015367 00000000000000/* * Copyright (c) 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include #include #include static void core_cursor(Display *dpy, int width, int height) { char text[256]; cairo_surface_t *surface; cairo_text_extents_t extents; cairo_t *cr; Pixmap bitmap; int scr = DefaultScreen(dpy); Window root = RootWindow(dpy, scr); XColor bg, fg; int pitch; char *data; GC gc; sprintf(text, "%dx%d", width, height); pitch = (width + 31) >> 5 << 2; data = calloc(pitch, height); surface = cairo_image_surface_create_for_data((unsigned char *)data, CAIRO_FORMAT_A1, width, height, pitch); cr = cairo_create(surface); cairo_text_extents(cr, text, &extents); cairo_move_to(cr, 0, extents.height); cairo_show_text(cr, text); cairo_destroy(cr); cairo_surface_destroy(surface); bitmap = XCreatePixmap(dpy, root, width, height, 1); gc = XCreateGC(dpy, bitmap, 0, NULL); if (gc != NULL) { XImage ximage = { .height = height, .width = width, .depth = 1, .bits_per_pixel = 1, .xoffset = 0, .format = XYPixmap, .data = data, .byte_order = LSBFirst, .bitmap_unit = 32, .bitmap_bit_order = LSBFirst, .bitmap_pad = 32, .bytes_per_line = pitch, }; XPutImage(dpy, bitmap, gc, &ximage, 0, 0, 0, 0, width, height); XFreeGC(dpy, gc); } free(data); XParseColor(dpy, DefaultColormap(dpy, scr), "green", &fg); XParseColor(dpy, DefaultColormap(dpy, scr), "black", &bg); XDefineCursor(dpy, root, XCreatePixmapCursor(dpy, bitmap, bitmap, &fg, &bg, 0, 0)); XFreePixmap(dpy, bitmap); } static void render_cursor(Display *dpy, int width, int height) { char text[256]; cairo_surface_t *surface; cairo_text_extents_t extents; cairo_t *cr; Pixmap pixmap; Picture picture; sprintf(text, "%dx%d", width, height); pixmap = XCreatePixmap(dpy, DefaultRootWindow(dpy), width, height, 32); surface = cairo_xlib_surface_create_with_xrender_format(dpy, pixmap, DefaultScreenOfDisplay(dpy), XRenderFindStandardFormat(dpy, PictStandardARGB32), width, height); cr = cairo_create(surface); cairo_surface_destroy(surface); cairo_set_operator(cr, CAIRO_OPERATOR_CLEAR); cairo_paint(cr); cairo_set_operator(cr, CAIRO_OPERATOR_SOURCE); cairo_text_extents(cr, text, &extents); cairo_move_to(cr, 0, extents.height); cairo_set_source_rgb(cr, 1, 0, 1); cairo_show_text(cr, text); cairo_destroy(cr); picture = XRenderCreatePicture(dpy, pixmap, XRenderFindStandardFormat(dpy, PictStandardARGB32), 0, NULL); XFreePixmap(dpy, pixmap); XDefineCursor(dpy, DefaultRootWindow(dpy), XRenderCreateCursor(dpy, picture, 0, 0)); XRenderFreePicture(dpy, picture); } int main(void) { Display *dpy; int sizes[] = { 24, 32, 48, 64, 72, 128, 160, 256 }; int x, y; dpy = XOpenDisplay(NULL); if (dpy == NULL) dpy = XOpenDisplay(":0"); /* lazy */ if (dpy == NULL) return 77; for (x = 0; x < sizeof(sizes)/sizeof(sizes[0]); x++) { for (y = 0; y < sizeof(sizes)/sizeof(sizes[0]); y++) { printf("Testing %dx%d (core)\n", sizes[x], sizes[y]); core_cursor(dpy, sizes[x], sizes[y]); XSync(dpy, True); sleep(2); printf("Testing %dx%d (render)\n", sizes[x], sizes[y]); render_cursor(dpy, sizes[x], sizes[y]); XSync(dpy, True); sleep(2); } } return 0; } xf86-video-intel-2.99.917/test/basic-putimage.c0000664000175000017500000001534212400044327015745 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" static void show_cells(char *buf, const uint32_t *out, const uint32_t *ref, int x, int y, int w, int h) { int i, j, len = 0; for (j = y - 2; j <= y + 2; j++) { if (j < 0 || j >= h) continue; for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", out[j*w+i]); } len += sprintf(buf+len, "\t"); for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", ref[j*w+i]); } len += sprintf(buf+len, "\n"); } } static void fill_rect(struct test_display *dpy, Drawable d, XRenderPictFormat *format, int use_shm, uint8_t alu, int x, int y, int w, int h, uint32_t fg) { XImage image; XGCValues val; GC gc; test_init_image(&image, &dpy->shm, format, w, h); pixman_fill((uint32_t*)image.data, image.bytes_per_line/sizeof(uint32_t), image.bits_per_pixel, 0, 0, w, h, fg); val.function = alu; gc = XCreateGC(dpy->dpy, d, GCFunction, &val); if (use_shm) { XShmPutImage(dpy->dpy, d, gc, &image, 0, 0, x, y, w, h, 0); XSync(dpy->dpy, 1); } else { XPutImage(dpy->dpy, d, gc, &image, 0, 0, x, y, w, h); } XFreeGC(dpy->dpy, gc); } static void pixel_tests(struct test *t, int reps, int sets, enum target target, int use_shm) { struct test_target tt; XImage image; uint32_t *cells = malloc(t->out.width*t->out.height*4); struct { uint16_t x, y; } *pixels = malloc(reps*sizeof(*pixels)); int r, s; test_target_create_render(&t->out, target, &tt); printf("Testing setting of single pixels (%s %s shm): ", test_target_name(target), use_shm ? "with" : "without" ); fflush(stdout); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (tt.width - 1); int y = rand() % (tt.height - 1); int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; uint32_t fg = color(red, green, blue, alpha); fill_rect(&t->out, tt.draw, tt.format, use_shm, GXcopy, x, y, 1, 1, fg); pixels[r].x = x; pixels[r].y = y; cells[y*tt.width+x] = fg; } test_init_image(&image, &t->out.shm, tt.format, 1, 1); for (r = 0; r < reps; r++) { uint32_t result; uint32_t x = pixels[r].x; uint32_t y = pixels[r].y; XShmGetImage(t->out.dpy, tt.draw, &image, x, y, AllPlanes); result = *(uint32_t *)image.data; if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask; if (image.depth == 32) mask = 0xffffffff; else mask = (1 << image.depth) - 1; die("failed to set pixel (%d,%d) to %08x[%08x], found %08x instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask); } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(pixels); free(cells); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void area_tests(struct test *t, int reps, int sets, enum target target, int use_shm) { struct test_target tt; XImage image; uint32_t *cells = calloc(sizeof(uint32_t), t->out.width*t->out.height); int r, s, x, y; printf("Testing area sets (%s %s shm): ", test_target_name(target), use_shm ? "with" : "without" ); fflush(stdout); test_target_create_render(&t->out, target, &tt); clear(&t->out, &tt); test_init_image(&image, &t->out.shm, tt.format, tt.width, tt.height); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; uint32_t fg = color(red, green, blue, alpha); int w, h; x = rand() % tt.width; y = rand() % tt.height; w = rand() % (tt.width - x); h = rand() % (tt.height - y); fill_rect(&t->out, tt.draw, tt.format, use_shm, GXcopy, x, y, w, h, fg); pixman_fill(cells, tt.width, 32, x, y, w, h, fg); } XShmGetImage(t->out.dpy, tt.draw, &image, 0, 0, AllPlanes); for (y = 0; y < tt.height; y++) { for (x = 0; x < tt.width; x++) { uint32_t result = *(uint32_t *)(image.data + y*image.bytes_per_line + image.bits_per_pixel*x/8); if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask = depth_mask(image.depth); char buf[600]; show_cells(buf, (uint32_t*)image.data, cells, x, y, tt.width, tt.height); die("failed to set pixel (%d,%d) to %08x[%08x], found %08x [%08x] instead\n%s", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result, buf); } } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(cells); } static void rect_tests(struct test *t, int reps, int sets, enum target target, int use_shm) { struct test_target out, ref; int r, s; printf("Testing area fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % out.width; int y = rand() % out.height; int w = rand() % (out.width - x); int h = rand() % (out.height - y); uint8_t alu = rand() % (GXset + 1); int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; uint8_t fg = color(red, green, blue, alpha); fill_rect(&t->out, out.draw, out.format, use_shm, alu, x, y, w, h, fg); fill_rect(&t->ref, ref.draw, ref.format, use_shm, alu, x, y, w, h, fg); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { pixel_tests(&test, reps, sets, t, 0); area_tests(&test, reps, sets, t, 0); rect_tests(&test, reps, sets, t, 0); pixel_tests(&test, reps, sets, t, 1); area_tests(&test, reps, sets, t, 1); rect_tests(&test, reps, sets, t, 1); } } return 0; } xf86-video-intel-2.99.917/test/test_log.c0000664000175000017500000000031112244635610014670 00000000000000#include #include #include #include "test.h" void die(const char *fmt, ...) { va_list va; va_start(va, fmt); vfprintf(stderr, fmt, va); va_end(va); exit(1); } xf86-video-intel-2.99.917/test/test_image.c0000664000175000017500000001611312400044327015171 00000000000000#include #include #include #include #include "test.h" #define MAX_DELTA 3 int pixel_difference(uint32_t a, uint32_t b) { int max = 0; int i; for (i = 0; i < 32; i += 8) { uint8_t ac = (a >> i) & 0xff; uint8_t bc = (b >> i) & 0xff; int d; if (ac > bc) d = ac - bc; else d = bc - ac; if (d > max) max = d; } return max; } static void show_pixels(char *buf, const XImage *out, const XImage *ref, int x, int y, int w, int h) { int i, j, len = 0; for (j = y - 2; j <= y + 2; j++) { if (j < 0 || j >= h) continue; for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", *(uint32_t*)(out->data + j*out->bytes_per_line + i*out->bits_per_pixel/8)); } len += sprintf(buf+len, "\t"); for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", *(uint32_t*)(ref->data + j*out->bytes_per_line + i*out->bits_per_pixel/8)); } len += sprintf(buf+len, "\n"); } } static void test_compare_fallback(struct test *t, Drawable out_draw, XRenderPictFormat *out_format, Drawable ref_draw, XRenderPictFormat *ref_format, int x, int y, int w, int h) { XImage *out_image, *ref_image; char *out, *ref; char buf[600]; uint32_t mask; int i, j; die_unless(out_format->depth == ref_format->depth); out_image = XGetImage(t->out.dpy, out_draw, x, y, w, h, AllPlanes, ZPixmap); out = out_image->data; ref_image = XGetImage(t->ref.dpy, ref_draw, x, y, w, h, AllPlanes, ZPixmap); ref = ref_image->data; mask = depth_mask(out_image->depth); /* Start with an exact comparison. However, one quicky desires * a fuzzy comparator to hide hardware inaccuracies... */ for (j = 0; j < h; j++) { for (i = 0; i < w; i++) { uint32_t a = ((uint32_t *)out)[i] & mask; uint32_t b = ((uint32_t *)ref)[i] & mask; if (a != b && pixel_difference(a, b) > MAX_DELTA) { show_pixels(buf, out_image, ref_image, i, j, w, h); die("discrepancy found at (%d+%d, %d+%d): found %08x, expected %08x (delta: %d)\n%s", x,i, y,j, a, b, pixel_difference(a, b), buf); } } out += out_image->bytes_per_line; ref += ref_image->bytes_per_line; } XDestroyImage(out_image); XDestroyImage(ref_image); } static void unpremultiply_data (png_structp png, png_row_infop row_info, png_bytep data) { unsigned int i; for (i = 0; i < row_info->rowbytes; i += 4) { uint8_t *b = &data[i]; uint32_t pixel; uint8_t alpha; memcpy (&pixel, b, sizeof (uint32_t)); alpha = (pixel & 0xff000000) >> 24; if (alpha == 0) { b[0] = (pixel & 0xff0000) >> 16; b[1] = (pixel & 0x00ff00) >> 8; b[2] = (pixel & 0x0000ff) >> 0; b[3] = 0xff; } else { b[0] = (((pixel & 0xff0000) >> 16) * 255 + alpha / 2) / alpha; b[1] = (((pixel & 0x00ff00) >> 8) * 255 + alpha / 2) / alpha; b[2] = (((pixel & 0x0000ff) >> 0) * 255 + alpha / 2) / alpha; b[3] = alpha; } } } static void save_image(XImage *image, const char *filename) { FILE *file; png_struct *png = NULL; png_info *info = NULL; png_byte **rows = NULL; int i; file = fopen(filename, "w"); if (file == NULL) return; png = png_create_write_struct(PNG_LIBPNG_VER_STRING, NULL, NULL, NULL); if (png == NULL) goto out; info = png_create_info_struct(png); if (info == NULL) goto out; rows = png_malloc(png, sizeof(png_byte *) * image->height); if (rows == NULL) goto out; for (i = 0; i < image->height; i++) rows[i] = (png_byte *)(image->data + image->bytes_per_line * i); if (setjmp(png_jmpbuf(png))) goto out; png_set_IHDR(png, info, image->width, image->height, 8, PNG_COLOR_TYPE_RGB_ALPHA, PNG_INTERLACE_NONE, PNG_COMPRESSION_TYPE_DEFAULT, PNG_FILTER_TYPE_DEFAULT); png_init_io(png, file); png_write_info(png, info); png_set_write_user_transform_fn(png, unpremultiply_data); png_write_image(png, rows); png_write_end(png, info); out: if (rows) png_free(png, rows); png_destroy_write_struct(&png, &info); fclose(file); } void test_compare(struct test *t, Drawable out_draw, XRenderPictFormat *out_format, Drawable ref_draw, XRenderPictFormat *ref_format, int x, int y, int w, int h, const char *info) { XImage out_image, ref_image; Pixmap tmp; char *out, *ref; char buf[600]; uint32_t mask; int i, j; XGCValues gcv; GC gc; if (w * h * 4 > t->out.max_shm_size) return test_compare_fallback(t, out_draw, out_format, ref_draw, ref_format, x, y, w, h); test_init_image(&out_image, &t->out.shm, out_format, w, h); test_init_image(&ref_image, &t->ref.shm, ref_format, w, h); gcv.graphics_exposures = 0; die_unless(out_image.depth == ref_image.depth); die_unless(out_image.bits_per_pixel == ref_image.bits_per_pixel); die_unless(out_image.bits_per_pixel == 32); mask = depth_mask(out_image.depth); tmp = XCreatePixmap(t->out.dpy, out_draw, w, h, out_image.depth); gc = XCreateGC(t->out.dpy, tmp, GCGraphicsExposures, &gcv); XCopyArea(t->out.dpy, out_draw, tmp, gc, x, y, w, h, 0, 0); XShmGetImage(t->out.dpy, tmp, &out_image, 0, 0, AllPlanes); XFreeGC(t->out.dpy, gc); XFreePixmap(t->out.dpy, tmp); out = out_image.data; tmp = XCreatePixmap(t->ref.dpy, ref_draw, w, h, ref_image.depth); gc = XCreateGC(t->ref.dpy, tmp, GCGraphicsExposures, &gcv); XCopyArea(t->ref.dpy, ref_draw, tmp, gc, x, y, w, h, 0, 0); XShmGetImage(t->ref.dpy, tmp, &ref_image, 0, 0, AllPlanes); XFreeGC(t->ref.dpy, gc); XFreePixmap(t->ref.dpy, tmp); ref = ref_image.data; /* Start with an exact comparison. However, one quicky desires * a fuzzy comparator to hide hardware inaccuracies... */ for (j = 0; j < h; j++) { for (i = 0; i < w; i++) { uint32_t a = ((uint32_t *)out)[i] & mask; uint32_t b = ((uint32_t *)ref)[i] & mask; if (a != b && pixel_difference(a, b) > MAX_DELTA) { show_pixels(buf, &out_image, &ref_image, i, j, w, h); save_image(&out_image, "out.png"); save_image(&ref_image, "ref.png"); die("discrepancy found at (%d+%d, %d+%d): found %08x, expected %08x (delta: %d)\n%s%s\n", x,i, y,j, a, b, pixel_difference(a, b), buf, info); } } out += out_image.bytes_per_line; ref += ref_image.bytes_per_line; } } static int _native_byte_order_lsb(void) { int x = 1; return *((char *) &x) == 1; } void test_init_image(XImage *ximage, XShmSegmentInfo *shm, XRenderPictFormat *format, int width, int height) { int native_byte_order = _native_byte_order_lsb() ? LSBFirst : MSBFirst; ximage->width = width; ximage->height = height; ximage->format = ZPixmap; ximage->data = shm->shmaddr; ximage->obdata = (void *)shm; ximage->byte_order = native_byte_order; ximage->bitmap_unit = 32; ximage->bitmap_bit_order = native_byte_order; ximage->bitmap_pad = 32; ximage->depth = format->depth; ximage->bytes_per_line = 4*width; ximage->bits_per_pixel = 32; ximage->red_mask = 0xff << 16; ximage->green_mask = 0xff << 8; ximage->blue_mask = 0xff << 0; ximage->xoffset = 0; XInitImage(ximage); } xf86-video-intel-2.99.917/test/dri2-test.c0000664000175000017500000001473612400044327014676 00000000000000#include #include #include #include #include #include #include #include #include #include #include #include #include #include "dri2.h" #define COUNT 60 static inline XRRScreenResources *_XRRGetScreenResourcesCurrent(Display *dpy, Window window) { XRRScreenResources *res; res = XRRGetScreenResourcesCurrent(dpy, window); if (res == NULL) res = XRRGetScreenResources(dpy, window); return res; } static XRRModeInfo *lookup_mode(XRRScreenResources *res, int id) { int i; for (i = 0; i < res->nmode; i++) { if (res->modes[i].id == id) return &res->modes[i]; } return NULL; } static int dri2_open(Display *dpy) { drm_auth_t auth; char *driver, *device; int fd; if (!DRI2Connect(dpy, DefaultRootWindow(dpy), &driver, &device)) return -1; printf ("Connecting to %s driver on %s\n", driver, device); fd = open(device, O_RDWR); if (fd < 0) return -1; if (drmIoctl(fd, DRM_IOCTL_GET_MAGIC, &auth)) return -1; if (!DRI2Authenticate(dpy, DefaultRootWindow(dpy), auth.magic)) return -1; return fd; } static void dri2_copy_swap(Display *dpy, Drawable d, int width, int height, int has_front) { XRectangle rect; XserverRegion region; rect.x = 0; rect.y = 0; rect.width = width; rect.height = height; region = XFixesCreateRegion(dpy, &rect, 1); DRI2CopyRegion(dpy, d, region, DRI2BufferFrontLeft, DRI2BufferBackLeft); if (has_front) DRI2CopyRegion(dpy, d, region, DRI2BufferFakeFrontLeft, DRI2BufferFrontLeft); XFixesDestroyRegion(dpy, region); } static double elapsed(const struct timespec *start, const struct timespec *end) { return (end->tv_sec - start->tv_sec) + 1e-9*(end->tv_nsec - start->tv_nsec); } static uint64_t check_msc(Display *dpy, Window win, uint64_t last_msc) { uint64_t current_msc, current_ust, current_sbc; DRI2GetMSC(dpy, win, ¤t_ust, ¤t_msc, ¤t_sbc); if (current_msc < last_msc) { printf("Invalid MSC: was %llu, now %llu\n", (long long)last_msc, (long long)current_msc); } return current_msc; } static void run(Display *dpy, int width, int height, unsigned int *attachments, int nattachments, const char *name) { Window win; XSetWindowAttributes attr; int count; DRI2Buffer *buffers; struct timespec start, end; uint64_t msc; /* Be nasty and install a fullscreen window on top so that we * can guarantee we do not get clipped by children. */ attr.override_redirect = 1; win = XCreateWindow(dpy, DefaultRootWindow(dpy), 0, 0, width, height, 0, DefaultDepth(dpy, DefaultScreen(dpy)), InputOutput, DefaultVisual(dpy, DefaultScreen(dpy)), CWOverrideRedirect, &attr); XMapWindow(dpy, win); DRI2CreateDrawable(dpy, win); msc = check_msc(dpy, win, 0); buffers = DRI2GetBuffers(dpy, win, &width, &height, attachments, nattachments, &count); if (count != nattachments) return; msc = check_msc(dpy, win, msc); clock_gettime(CLOCK_MONOTONIC, &start); for (count = 0; count < COUNT; count++) DRI2SwapBuffers(dpy, win, 0, 0, 0); msc = check_msc(dpy, win, msc); clock_gettime(CLOCK_MONOTONIC, &end); printf("%d %s (%dx%d) swaps in %fs.\n", count, name, width, height, elapsed(&start, &end)); msc = check_msc(dpy, win, msc); clock_gettime(CLOCK_MONOTONIC, &start); for (count = 0; count < COUNT; count++) dri2_copy_swap(dpy, win, width, height, nattachments == 2); msc = check_msc(dpy, win, msc); clock_gettime(CLOCK_MONOTONIC, &end); printf("%d %s (%dx%d) blits in %fs.\n", count, name, width, height, elapsed(&start, &end)); DRI2SwapInterval(dpy, win, 0); msc = check_msc(dpy, win, msc); clock_gettime(CLOCK_MONOTONIC, &start); for (count = 0; count < COUNT; count++) DRI2SwapBuffers(dpy, win, 0, 0, 0); msc = check_msc(dpy, win, msc); clock_gettime(CLOCK_MONOTONIC, &end); printf("%d %s (%dx%d) vblank=0 swaps in %fs.\n", count, name, width, height, elapsed(&start, &end)); XDestroyWindow(dpy, win); free(buffers); XSync(dpy, 1); } int main(void) { Display *dpy; int i, j, fd; unsigned int attachments[] = { DRI2BufferBackLeft, DRI2BufferFrontLeft, }; XRRScreenResources *res; XRRCrtcInfo **original_crtc; Window root; uint64_t last_msc; dpy = XOpenDisplay(NULL); if (dpy == NULL) return 77; if (!XRRQueryVersion(dpy, &i, &j)) return 77; fd = dri2_open(dpy); if (fd < 0) return 1; root = DefaultRootWindow(dpy); DRI2CreateDrawable(dpy, root); res = _XRRGetScreenResourcesCurrent(dpy, root); if (res == NULL) return 1; original_crtc = malloc(sizeof(XRRCrtcInfo *)*res->ncrtc); for (i = 0; i < res->ncrtc; i++) original_crtc[i] = XRRGetCrtcInfo(dpy, res, res->crtcs[i]); printf("noutput=%d, ncrtc=%d\n", res->noutput, res->ncrtc); last_msc = check_msc(dpy, root, 0); for (i = 0; i < res->ncrtc; i++) XRRSetCrtcConfig(dpy, res, res->crtcs[i], CurrentTime, 0, 0, None, RR_Rotate_0, NULL, 0); last_msc = check_msc(dpy, root, last_msc); for (i = 0; i < res->noutput; i++) { XRROutputInfo *output; XRRModeInfo *mode; output = XRRGetOutputInfo(dpy, res, res->outputs[i]); if (output == NULL) continue; mode = NULL; if (res->nmode) mode = lookup_mode(res, output->modes[0]); for (j = 0; mode && j < 2*output->ncrtc; j++) { int c = j; if (c >= output->ncrtc) c = 2*output->ncrtc - j - 1; printf("[%d, %d] -- OUTPUT:%ld, CRTC:%ld\n", i, c, (long)res->outputs[i], (long)output->crtcs[c]); last_msc = check_msc(dpy, root, last_msc); XRRSetCrtcConfig(dpy, res, output->crtcs[c], CurrentTime, 0, 0, output->modes[0], RR_Rotate_0, &res->outputs[i], 1); last_msc = check_msc(dpy, root, last_msc); run(dpy, mode->width, mode->height, attachments, 1, "fullscreen"); run(dpy, mode->width, mode->height, attachments, 2, "fullscreen (with front)"); run(dpy, mode->width/2, mode->height/2, attachments, 1, "windowed"); run(dpy, mode->width/2, mode->height/2, attachments, 2, "windowed (with front)"); last_msc = check_msc(dpy, root, last_msc); XRRSetCrtcConfig(dpy, res, output->crtcs[c], CurrentTime, 0, 0, None, RR_Rotate_0, NULL, 0); last_msc = check_msc(dpy, root, last_msc); } XRRFreeOutputInfo(output); } for (i = 0; i < res->ncrtc; i++) XRRSetCrtcConfig(dpy, res, res->crtcs[i], CurrentTime, original_crtc[i]->x, original_crtc[i]->y, original_crtc[i]->mode, original_crtc[i]->rotation, original_crtc[i]->outputs, original_crtc[i]->noutput); return 0; } xf86-video-intel-2.99.917/test/virtual.conf0000664000175000017500000000111612400044327015236 00000000000000Section "Device" Identifier "Device0" Driver "intel" Option "ZaphodHeads" "LVDS1" Option "VirtualHeads" "1" BusID "PCI:0:2:0" Screen 0 EndSection Section "Device" Identifier "Device1" Driver "intel" Option "ZaphodHeads" "HDMI1" BusID "PCI:0:2:0" Screen 1 EndSection Section "Screen" Identifier "Screen0" Device "Device0" EndSection Section "Screen" Identifier "Screen1" Device "Device1" EndSection Section "ServerFlags" Option "AutoAddGPU" "False" EndSection Section "ServerLayout" Identifier "ServerLayout0" Screen 0 "Screen0" 0 0 Screen 1 "Screen1" 0 0 EndSection xf86-video-intel-2.99.917/test/basic-stippledrect.c0000664000175000017500000001406412400044327016634 00000000000000#include #include #include #include "test.h" static unsigned char bitmap4x4[] = { 0x03, 0x06, 0x0c, 0x09 }; static unsigned char bitmap8x8[3][8] = { { 0xcc, 0x66, 0x33, 0x99, 0xcc, 0x66, 0x33, 0x99 }, { 0x00, 0xfe, 0x92, 0x92, 0xfe, 0x92, 0x92, 0xfe }, { 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa }, }; static void fill_rect(struct test_target *t, uint8_t alu, XRectangle *clip, int nclip, uint8_t stipple, uint8_t opaque, int tx, int ty, int x, int y, int w, int h, uint32_t fg, uint32_t bg) { Display *dpy = t->dpy->dpy; XGCValues val; GC gc; val.function = alu; val.foreground = fg; val.background = bg; val.fill_style = opaque ? FillOpaqueStippled : FillStippled; val.ts_x_origin = tx; val.ts_y_origin = ty; if (stipple == 0) { val.stipple = XCreateBitmapFromData(dpy, t->draw, (char *)bitmap4x4, 4, 4); } else { char *b = (char *)bitmap8x8[stipple-1]; val.stipple = XCreateBitmapFromData(dpy, t->draw, b, 8, 8); } gc = XCreateGC(dpy, t->draw, GCFillStyle | GCTileStipXOrigin | GCTileStipYOrigin | GCStipple | GCForeground | GCBackground | GCFunction, &val); if (nclip) XSetClipRectangles(dpy, gc, 0, 0, clip, nclip, Unsorted); XFillRectangle(dpy, t->draw, gc, x, y, w, h); XFreeGC(dpy, gc); XFreePixmap(dpy, val.stipple); } static void clear(struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(tt->dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void unclipped_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing unclipped stippled fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&out); test_target_create_render(&t->ref, target, &ref); clear(&ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % out.width; int y = rand() % out.height; int w = rand() % (out.width - x); int h = rand() % (out.height - y); int tx = rand() % (2*out.width) - out.width; int ty = rand() % (2*out.height) - out.height; uint8_t stipple = rand() % 4; uint8_t opaque = rand() % 1; uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t bg = rand(); fill_rect(&out, alu, NULL, 0, stipple, opaque, tx, ty, x, y, w, h, fg, bg); fill_rect(&ref, alu, NULL, 0, stipple, opaque, tx, ty, x, y, w, h, fg, bg); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } static void simple_clip_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing simple clipped stippled fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&out); test_target_create_render(&t->ref, target, &ref); clear(&ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % (2*out.width); int h = rand() % (2*out.height); int tx = rand() % (2*out.width) - out.width; int ty = rand() % (2*out.height) - out.height; uint8_t stipple = rand() % 4; uint8_t opaque = rand() % 1; uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t bg = rand(); fill_rect(&out, alu, NULL, 0, stipple, opaque, tx, ty, x, y, w, h, fg, bg); fill_rect(&ref, alu, NULL, 0, stipple, opaque, tx, ty, x, y, w, h, fg, bg); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } static void complex_clip_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; XRectangle *clip; int nclip, r, s; printf("Testing complex clipped stippled fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&out); test_target_create_render(&t->ref, target, &ref); clear(&ref); for (s = 0; s < sets; s++) { nclip = (rand() % 16) + 2; clip = malloc(sizeof(XRectangle)*nclip); for (r = 0; r < nclip; r++) { clip[r].x = rand() % out.width; clip[r].y = rand() % out.height; clip[r].width = rand() % (out.width - clip[r].x); clip[r].height = rand() % (out.height - clip[r].y); } for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % (2*out.width); int h = rand() % (2*out.height); int tx = rand() % (2*out.width) - out.width; int ty = rand() % (2*out.height) - out.height; uint8_t stipple = rand() % 4; uint8_t opaque = rand() % 1; uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t bg = rand(); fill_rect(&out, alu, clip, nclip, stipple, opaque, tx, ty, x, y, w, h, fg, bg); fill_rect(&ref, alu, clip, nclip, stipple, opaque, tx, ty, x, y, w, h, fg, bg); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); free(clip); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { unclipped_tests(&test, reps, sets, t); simple_clip_tests(&test, reps, sets, t); complex_clip_tests(&test, reps, sets, t); } } return 0; } xf86-video-intel-2.99.917/test/README0000664000175000017500000000074412432737457013611 00000000000000These are no substitute for xts, rendercheck and cairo-test-suite. They are intended to exercise corner cases in the batch management of long drawing commands and more explicit checking of the acceleration paths. Useful tools: # Packed YUV Xv tester gst-launch-1.0 videotestsrc pattern=snow ! 'video/x-raw,format=UYVY,width=640,height=360' ! xvimagesink # Planar YUV Xv tester gst-launch-1.0 videotestsrc pattern=snow ! 'video/x-raw,format=I420,width=640,height=360' ! xvimagesink xf86-video-intel-2.99.917/test/render-copyarea.c0000664000175000017500000001726312400044327016137 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" static void show_cells(char *buf, const uint32_t *out, const uint32_t *ref, int x, int y, int w, int h) { int i, j, len = 0; for (j = y - 2; j <= y + 2; j++) { if (j < 0 || j >= h) continue; for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", out[j*w+i]); } len += sprintf(buf+len, "\t"); for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", ref[j*w+i]); } len += sprintf(buf+len, "\n"); } } static void fill_rect(struct test_display *t, Picture p, XRenderPictFormat *format, int use_window, int tx, int ty, uint8_t op, int x, int y, int w, int h, uint8_t red, uint8_t green, uint8_t blue, uint8_t alpha) { Drawable tmp; XRenderColor color; Picture src; if (use_window) { XSetWindowAttributes attr; attr.override_redirect = 1; tmp = XCreateWindow(t->dpy, DefaultRootWindow(t->dpy), tx, ty, w, h, 0, format->depth, InputOutput, DefaultVisual(t->dpy, DefaultScreen(t->dpy)), CWOverrideRedirect, &attr); XMapWindow(t->dpy, tmp); } else tmp = XCreatePixmap(t->dpy, DefaultRootWindow(t->dpy), w, h, format->depth); src = XRenderCreatePicture(t->dpy, tmp, format, 0, NULL); color.red = red * alpha; color.green = green * alpha; color.blue = blue * alpha; color.alpha = alpha << 8 | alpha; XRenderFillRectangle(t->dpy, PictOpSrc, src, &color, 0, 0, w, h); XRenderComposite(t->dpy, op, src, 0, p, 0, 0, 0, 0, x, y, w, h); XRenderFreePicture(t->dpy, src); if (use_window) XDestroyWindow(t->dpy, tmp); else XFreePixmap(t->dpy, tmp); } static void pixel_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = malloc(t->out.width*t->out.height*4); struct { uint16_t x, y; } *pixels = malloc(reps*sizeof(*pixels)); int r, s; test_target_create_render(&t->out, target, &tt); printf("Testing setting of single pixels (%s): ", test_target_name(target)); fflush(stdout); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (tt.width - 1); int y = rand() % (tt.height - 1); uint8_t red = rand(); uint8_t green = rand(); uint8_t blue = rand(); uint8_t alpha = rand(); fill_rect(&t->out, tt.picture, tt.format, 0, 0, 0, PictOpSrc, x, y, 1, 1, red, green, blue, alpha); pixels[r].x = x; pixels[r].y = y; cells[y*tt.width+x] = color(red, green, blue, alpha); } test_init_image(&image, &t->out.shm, tt.format, 1, 1); for (r = 0; r < reps; r++) { uint32_t x = pixels[r].x; uint32_t y = pixels[r].y; uint32_t result; XShmGetImage(t->out.dpy, tt.draw, &image, x, y, AllPlanes); result = *(uint32_t *)image.data; if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask = depth_mask(image.depth); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result); } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(pixels); free(cells); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void area_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = calloc(sizeof(uint32_t), t->out.width*t->out.height); int r, s, x, y; printf("Testing area sets (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &tt); clear(&t->out, &tt); test_init_image(&image, &t->out.shm, tt.format, tt.width, tt.height); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int w = 1 + rand() % (tt.width - 1); int h = 1 + rand() % (tt.height - 1); uint8_t red = rand(); uint8_t green = rand(); uint8_t blue = rand(); uint8_t alpha = rand(); x = rand() % (2*tt.width) - tt.width; y = rand() % (2*tt.height) - tt.height; fill_rect(&t->out, tt.picture, tt.format, 0, 0, 0, PictOpSrc, x, y, w, h, red, green, blue, alpha); if (x < 0) w += x, x = 0; if (y < 0) h += y, y = 0; if (x >= tt.width || y >= tt.height) continue; if (x + w > tt.width) w = tt.width - x; if (y + h > tt.height) h = tt.height - y; if (w <= 0 || h <= 0) continue; pixman_fill(cells, tt.width, 32, x, y, w, h, color(red, green, blue, alpha)); } XShmGetImage(t->out.dpy, tt.draw, &image, 0, 0, AllPlanes); for (y = 0; y < tt.height; y++) { for (x = 0; x < tt.width; x++) { uint32_t result = *(uint32_t *) (image.data + y*image.bytes_per_line + x*image.bits_per_pixel/8); if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { char buf[600]; uint32_t mask = depth_mask(image.depth); show_cells(buf, (uint32_t*)image.data, cells, x, y, tt.width, tt.height); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n%s", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result, buf); } } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(cells); } static void rect_tests(struct test *t, int reps, int sets, enum target target, int use_window) { struct test_target out, ref; int r, s; printf("Testing area fills (%s, using %s source): ", test_target_name(target), use_window ? "window" : "pixmap"); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x, y, w, h; int tmpx, tmpy; uint8_t red = rand(); uint8_t green = rand(); uint8_t blue = rand(); uint8_t alpha = rand(); int try = 50; do { x = rand() % (out.width - 1); y = rand() % (out.height - 1); w = 1 + rand() % (out.width - x - 1); h = 1 + rand() % (out.height - y - 1); tmpx = w == out.width ? 0 : rand() % (out.width - w); tmpy = h == out.height ? 0 : rand() % (out.height - h); } while (((tmpx+w > x && tmpx < x+w) || (tmpy+h > y && tmpy < y+h)) && --try); if (try) { fill_rect(&t->out, out.picture, out.format, use_window, tmpx, tmpy, PictOpSrc, x, y, w, h, red, green, blue, alpha); fill_rect(&t->ref, ref.picture, ref.format, use_window, tmpx, tmpy, PictOpSrc, x, y, w, h, red, green, blue, alpha); } } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { pixel_tests(&test, reps, sets, t); area_tests(&test, reps, sets, t); rect_tests(&test, reps, sets, t, 0); if (t != PIXMAP) rect_tests(&test, reps, sets, t, 1); } } return 0; } xf86-video-intel-2.99.917/test/dri2-race.c0000664000175000017500000000450312400044327014620 00000000000000#include #include #include #include #include #include #include #include #include #include #include #include #include "dri2.h" #define COUNT 60 static int dri2_open(Display *dpy) { drm_auth_t auth; char *driver, *device; int fd; if (!DRI2Connect(dpy, DefaultRootWindow(dpy), &driver, &device)) return -1; printf ("Connecting to %s driver on %s\n", driver, device); fd = open(device, O_RDWR); if (fd < 0) return -1; if (drmIoctl(fd, DRM_IOCTL_GET_MAGIC, &auth)) return -1; if (!DRI2Authenticate(dpy, DefaultRootWindow(dpy), auth.magic)) return -1; return fd; } static void run(Display *dpy, int width, int height, unsigned int *attachments, int nattachments, const char *name) { Window win; XSetWindowAttributes attr; int count, loop; DRI2Buffer *buffers; /* Be nasty and install a fullscreen window on top so that we * can guarantee we do not get clipped by children. */ attr.override_redirect = 1; loop = 100; do { win = XCreateWindow(dpy, DefaultRootWindow(dpy), 0, 0, width, height, 0, DefaultDepth(dpy, DefaultScreen(dpy)), InputOutput, DefaultVisual(dpy, DefaultScreen(dpy)), CWOverrideRedirect, &attr); XMapWindow(dpy, win); DRI2CreateDrawable(dpy, win); buffers = DRI2GetBuffers(dpy, win, &width, &height, attachments, nattachments, &count); if (count != nattachments) return; free(buffers); for (count = 0; count < loop; count++) DRI2SwapBuffers(dpy, win, 0, 0, 0); XDestroyWindow(dpy, win); } while (--loop); XSync(dpy, 1); sleep(2); XSync(dpy, 1); } int main(void) { Display *dpy; int width, height, fd; unsigned int attachments[] = { DRI2BufferBackLeft, DRI2BufferFrontLeft, }; dpy = XOpenDisplay (NULL); if (dpy == NULL) return 77; fd = dri2_open(dpy); if (fd < 0) return 1; width = WidthOfScreen(DefaultScreenOfDisplay(dpy)); height = HeightOfScreen(DefaultScreenOfDisplay(dpy)); run(dpy, width, height, attachments, 1, "fullscreen"); run(dpy, width, height, attachments, 2, "fullscreen (with front)"); width /= 2; height /= 2; run(dpy, width, height, attachments, 1, "windowed"); run(dpy, width, height, attachments, 2, "windowed (with front)"); return 0; } xf86-video-intel-2.99.917/test/basic-copyarea.c0000664000175000017500000001576412400044327015745 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" static void show_cells(char *buf, const uint32_t *out, const uint32_t *ref, int x, int y, int w, int h) { int i, j, len = 0; for (j = y - 2; j <= y + 2; j++) { if (j < 0 || j >= h) continue; for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", out[j*w+i]); } len += sprintf(buf+len, "\t"); for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", ref[j*w+i]); } len += sprintf(buf+len, "\n"); } } static void fill_rect(struct test_display *t, Drawable d, XRenderPictFormat *format, int use_window, int tx, int ty, uint8_t alu, int x, int y, int w, int h, uint32_t fg) { XGCValues val; Drawable tmp; GC gc; val.graphics_exposures = 0; val.function = alu; val.foreground = fg; if (use_window) { XSetWindowAttributes attr; attr.override_redirect = 1; tmp = XCreateWindow(t->dpy, DefaultRootWindow(t->dpy), tx, ty, w, h, 0, format->depth, InputOutput, DefaultVisual(t->dpy, DefaultScreen(t->dpy)), CWOverrideRedirect, &attr); XMapWindow(t->dpy, tmp); } else tmp = XCreatePixmap(t->dpy, d, w, h, format->depth); gc = XCreateGC(t->dpy, d, GCGraphicsExposures | GCForeground, &val); XFillRectangle(t->dpy, tmp, gc, 0, 0, w, h); XChangeGC(t->dpy, gc, GCFunction, &val); XCopyArea(t->dpy, tmp, d, gc, 0, 0, w, h, x, y); XFreeGC(t->dpy, gc); if (use_window) XDestroyWindow(t->dpy, tmp); else XFreePixmap(t->dpy, tmp); } static void pixel_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = malloc(t->out.width*t->out.height*4); struct { uint16_t x, y; } *pixels = malloc(reps*sizeof(*pixels)); int r, s; test_target_create_render(&t->out, target, &tt); printf("Testing setting of single pixels (%s): ", test_target_name(target)); fflush(stdout); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (tt.width - 1); int y = rand() % (tt.height - 1); uint32_t fg = rand(); fill_rect(&t->out, tt.draw, tt.format, 0, 0, 0, GXcopy, x, y, 1, 1, fg); pixels[r].x = x; pixels[r].y = y; cells[y*tt.width+x] = fg; } test_init_image(&image, &t->out.shm, tt.format, 1, 1); for (r = 0; r < reps; r++) { uint32_t x = pixels[r].x; uint32_t y = pixels[r].y; uint32_t result; XShmGetImage(t->out.dpy, tt.draw, &image, x, y, AllPlanes); result = *(uint32_t *)image.data; if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask = depth_mask(image.depth); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result); } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(pixels); free(cells); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void area_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = calloc(sizeof(uint32_t), t->out.width*t->out.height); int r, s, x, y; printf("Testing area sets (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &tt); clear(&t->out, &tt); test_init_image(&image, &t->out.shm, tt.format, tt.width, tt.height); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int w = 1 + rand() % (tt.width - 1); int h = 1 + rand() % (tt.height - 1); uint32_t fg = rand(); x = rand() % (2*tt.width) - tt.width; y = rand() % (2*tt.height) - tt.height; fill_rect(&t->out, tt.draw, tt.format, 0, 0, 0, GXcopy, x, y, w, h, fg); if (x < 0) w += x, x = 0; if (y < 0) h += y, y = 0; if (x >= tt.width || y >= tt.height) continue; if (x + w > tt.width) w = tt.width - x; if (y + h > tt.height) h = tt.height - y; if (w <= 0 || h <= 0) continue; pixman_fill(cells, tt.width, 32, x, y, w, h, fg); } XShmGetImage(t->out.dpy, tt.draw, &image, 0, 0, AllPlanes); for (y = 0; y < tt.height; y++) { for (x = 0; x < tt.width; x++) { uint32_t result = *(uint32_t *) (image.data + y*image.bytes_per_line + x*image.bits_per_pixel/8); if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { char buf[600]; uint32_t mask = depth_mask(image.depth); show_cells(buf, (uint32_t*)image.data, cells, x, y, tt.width, tt.height); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n%s", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result, buf); } } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(cells); } static void rect_tests(struct test *t, int reps, int sets, enum target target, int use_window) { struct test_target out, ref; int r, s; printf("Testing area fills (%s, using %s source): ", test_target_name(target), use_window ? "window" : "pixmap"); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (out.width - 1); int y = rand() % (out.height - 1); int w = 1 + rand() % (out.width - x - 1); int h = 1 + rand() % (out.height - y - 1); int tmpx = w == out.width ? 0 : rand() % (out.width - w); int tmpy = h == out.height ? 0 : rand() % (out.height - h); uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); fill_rect(&t->out, out.draw, out.format, use_window, tmpx, tmpy, alu, x, y, w, h, fg); fill_rect(&t->ref, ref.draw, ref.format, use_window, tmpx, tmpy, alu, x, y, w, h, fg); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { pixel_tests(&test, reps, sets, t); area_tests(&test, reps, sets, t); rect_tests(&test, reps, sets, t, 0); if (t != PIXMAP) rect_tests(&test, reps, sets, t, 1); } } return 0; } xf86-video-intel-2.99.917/test/render-trapezoid-image.c0000664000175000017500000003625412400044327017416 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" enum trapezoid { RECT_ALIGN, RECT_UNALIGN, GENERAL }; static const uint8_t ops[] = { PictOpClear, PictOpSrc, PictOpDst, }; static XRenderPictFormat *mask_format(Display *dpy, enum mask mask) { switch (mask) { default: case MASK_NONE: case MASK_NONE_AA: return NULL; case MASK_A1: return XRenderFindStandardFormat(dpy, PictStandardA1); case MASK_A8: return XRenderFindStandardFormat(dpy, PictStandardA8); } } static const char *mask_name(enum mask mask) { switch (mask) { default: case MASK_NONE: return "none"; case MASK_NONE_AA: return "none/aa"; case MASK_A1: return "a1"; case MASK_A8: return "a8"; } } static const char *trapezoid_name(enum trapezoid trapezoid) { switch (trapezoid) { default: case RECT_ALIGN: return "pixel-aligned"; case RECT_UNALIGN: return "rectilinear"; case GENERAL: return "general"; } } static void show_cells(char *buf, const uint32_t *out, const uint32_t *ref, int x, int y, int w, int h) { int i, j, len = 0; for (j = y - 2; j <= y + 2; j++) { if (j < 0 || j >= h) continue; for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", out[j*w+i]); } len += sprintf(buf+len, "\t"); for (i = x - 2; i <= x + 2; i++) { if (i < 0 || i >= w) continue; len += sprintf(buf+len, "%08x ", ref[j*w+i]); } len += sprintf(buf+len, "\n"); } } static void fill_rect(struct test_display *t, Picture p, XRenderPictFormat *format, uint8_t op, int x, int y, int w, int h, int dx, int dy, enum mask mask, int use_window, int tx, int ty, uint8_t red, uint8_t green, uint8_t blue, uint8_t alpha) { XRenderColor color; XTrapezoid trap; Drawable tmp; Picture src; int w1 = w + (dx!=0); int h1 = h + (dy!=0); if (use_window) { XSetWindowAttributes attr; attr.override_redirect = 1; tmp = XCreateWindow(t->dpy, DefaultRootWindow(t->dpy), tx, ty, w1, h1, 0, format->depth, InputOutput, DefaultVisual(t->dpy, DefaultScreen(t->dpy)), CWOverrideRedirect, &attr); XMapWindow(t->dpy, tmp); } else tmp = XCreatePixmap(t->dpy, DefaultRootWindow(t->dpy), w1, h1, format->depth); src = XRenderCreatePicture(t->dpy, tmp, format, 0, NULL); color.red = red * alpha; color.green = green * alpha; color.blue = blue * alpha; color.alpha = alpha << 8 | alpha; XRenderFillRectangle(t->dpy, PictOpSrc, src, &color, 0, 0, w1, h1); trap.left.p1.x = trap.left.p2.x = (x << 16) + dx; trap.top = trap.left.p1.y = trap.right.p1.y = (y << 16) + dy; trap.right.p1.x = trap.right.p2.x = ((x + w) << 16) + dx; trap.bottom = trap.left.p2.y = trap.right.p2.y = ((y + h) << 16) + dy; XRenderCompositeTrapezoids(t->dpy, op, src, p, mask_format(t->dpy, mask), 0, 0, &trap, 1); XRenderFreePicture(t->dpy, src); if (use_window) XDestroyWindow(t->dpy, tmp); else XFreePixmap(t->dpy, tmp); } static void pixel_tests(struct test *t, int reps, int sets, enum target target, int use_window) { struct test_target tt; XImage image; uint32_t *cells = malloc(t->out.width*t->out.height*4); struct { uint16_t x, y; } *pixels = malloc(reps*sizeof(*pixels)); int r, s; printf("Testing setting of single pixels (%s using %s): ", test_target_name(target), use_window ? "window" : "pixmap"); fflush(stdout); test_target_create_render(&t->out, target, &tt); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (tt.width - 1); int y = rand() % (tt.height - 1); int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; int tx, ty; do { tx = rand() % (tt.width - 1); ty = rand() % (tt.height - 1); } while (tx == x && ty == y); fill_rect(&t->out, tt.picture, use_window ? t->out.format : tt.format, PictOpSrc, x, y, 1, 1, 0, 0, MASK_NONE, use_window, tx, ty, red, green, blue, alpha); pixels[r].x = x; pixels[r].y = y; cells[y*t->out.width+x] = color(red, green, blue, alpha); } test_init_image(&image, &t->out.shm, tt.format, 1, 1); for (r = 0; r < reps; r++) { uint32_t result; uint32_t x = pixels[r].x; uint32_t y = pixels[r].y; XShmGetImage(t->out.dpy, tt.draw, &image, x, y, AllPlanes); result = *(uint32_t *)image.data; if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask = depth_mask(image.depth); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result); } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(pixels); free(cells); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void set_mask(struct test_display *t, struct test_target *tt, enum mask mask) { XRenderPictureAttributes pa; switch (mask) { case MASK_NONE: pa.poly_edge = PolyEdgeSharp; break; default: pa.poly_edge = PolyEdgeSmooth; break; } XRenderChangePicture(t->dpy, tt->picture, CPPolyEdge, &pa); } static void fill(uint32_t *cells, int x, int y, int w, int h, int max_width, int max_height, uint32_t pixel) { if (x < 0) w += x, x = 0; if (y < 0) h += y, y = 0; if (x >= max_width || y >= max_height) return; if (x + w > max_width) w = max_width - x; if (y + h > max_height) h = max_height - y; if (w <= 0 || h <= 0) return; pixman_fill(cells, max_width, 32, x, y, w, h, pixel); } static void area_tests(struct test *t, int reps, int sets, enum target target, int use_window) { struct test_target tt; XImage image; uint32_t *cells = calloc(sizeof(uint32_t), t->out.width*t->out.height); int r, s, x, y; printf("Testing area sets (%s using %s source): ", test_target_name(target), use_window ? "window" : "pixmap"); fflush(stdout); test_target_create_render(&t->out, target, &tt); clear(&t->out, &tt); test_init_image(&image, &t->out.shm, tt.format, tt.width, tt.height); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; int tx, ty, try = 50; int w, h; x = rand() % (2*tt.width) - tt.width; y = rand() % (2*tt.height) - tt.height; if (use_window) { do { w = 1 + rand() % (tt.width - 1); h = 1 + rand() % (tt.height - 1); tx = w == tt.width ? 0 : rand() % (tt.width - w); ty = h == tt.height ? 0 : rand() % (tt.height - h); } while (((tx+w > x && tx < x+w) && (ty+h > y && ty < y+h)) && --try); if (!try) continue; } else { w = 1 + rand() % (2*tt.width); h = 1 + rand() % (2*tt.height); tx = ty = 0; } fill_rect(&t->out, tt.picture, use_window ? t->out.format : tt.format, PictOpSrc, x, y, w, h, 0, 0, MASK_NONE, use_window, tx, ty, red, green, blue, alpha); if (use_window) fill(cells, tx, ty, w, h, tt.width, tt.height, color(red, green, blue, alpha)); fill(cells, x, y, w, h, tt.width, tt.height, color(red, green, blue, alpha)); } XShmGetImage(t->out.dpy, tt.draw, &image, 0, 0, AllPlanes); for (y = 0; y < tt.height; y++) { for (x = 0; x < tt.width; x++) { uint32_t result = *(uint32_t *)(image.data + y*image.bytes_per_line + image.bits_per_pixel*x/8); if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { char buf[600]; uint32_t mask = depth_mask(image.depth); show_cells(buf, (uint32_t*)image.data, cells, x, y, tt.width, tt.height); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n%s", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result, buf); } } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(cells); } static void rect_tests(struct test *t, int dx, int dy, enum mask mask, int reps, int sets, enum target target, int use_window) { struct test_target out, ref; int r, s; printf("Testing area fills (offset %dx%d, mask %s) (%s using %s source): ", dx, dy, mask_name(mask), test_target_name(target), use_window ? "window" : "pixmap"); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); set_mask(&t->out, &out, mask); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); set_mask(&t->ref, &ref, mask); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x, y, w, h; int op = ops[rand() % sizeof(ops)]; int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; int tx, ty, try = 50; do { x = rand() % (out.width - 1); y = rand() % (out.height - 1); w = 1 + rand() % (out.width - x - 1); h = 1 + rand() % (out.height - y - 1); tx = w == out.width ? 0 : rand() % (out.width - w); ty = h == out.height ? 0 : rand() % (out.height - h); } while (((tx+w > x && tx < x+w) && (ty+h > y && ty < y+h)) && --try); if (try) { fill_rect(&t->out, out.picture, use_window ? t->out.format : out.format, op, x, y, w, h, dx, dy, mask, use_window, tx, ty, red, green, blue, alpha); fill_rect(&t->ref, ref.picture, use_window ? t->ref.format : ref.format, op, x, y, w, h, dx, dy, mask, use_window, tx, ty, red, green, blue, alpha); } } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } static void random_trapezoid(XTrapezoid *trap, enum trapezoid trapezoid, int x1, int y1, int x2, int y2) { switch (trapezoid) { case RECT_ALIGN: x1 = x1 + rand() % (x2 - x1); x2 = x1 + rand() % (x2 - x1); y1 = y1 + rand() % (y2 - y1); y2 = y1 + rand() % (y2 - y1); trap->left.p1.x = trap->left.p2.x = x1 << 16; trap->top = trap->left.p1.y = trap->right.p1.y = y1 << 16; trap->right.p1.x = trap->right.p2.x = x2 << 16; trap->bottom = trap->left.p2.y = trap->right.p2.y = y2 << 16; break; case RECT_UNALIGN: x1 <<= 16; x2 <<= 16; y1 <<= 16; y2 <<= 16; x1 = x1 + rand() % (x2 - x1); x2 = x1 + rand() % (x2 - x1); y1 = y1 + rand() % (y2 - y1); y2 = y1 + rand() % (y2 - y1); trap->left.p1.x = trap->left.p2.x = x1; trap->top = trap->left.p1.y = trap->right.p1.y = y1; trap->right.p1.x = trap->right.p2.x = x2; trap->bottom = trap->left.p2.y = trap->right.p2.y = y2; break; case GENERAL: x1 <<= 16; x2 <<= 16; y1 <<= 16; y2 <<= 16; trap->top = y1 + rand() % (y2 - y1); trap->bottom = y1 + rand() % (y2 - y1); trap->left.p1.x = x1 + rand() % (x2 - x1); trap->left.p2.x = x1 + rand() % (x2 - x1); trap->right.p1.x = x1 + rand() % (x2 - x1); trap->right.p2.x = x1 + rand() % (x2 - x1); break; } } static void fill_traps(struct test_display *t, Picture p, XRenderPictFormat *format, uint8_t op, XTrapezoid *traps, int ntraps, enum mask mask, int srcx, int srcy, int srcw, int srch, uint8_t red, uint8_t green, uint8_t blue, uint8_t alpha) { XRenderColor color; Drawable tmp; Picture src; tmp = XCreatePixmap(t->dpy, DefaultRootWindow(t->dpy), srcw, srch, format->depth); src = XRenderCreatePicture(t->dpy, tmp, format, 0, NULL); color.red = red * alpha; color.green = green * alpha; color.blue = blue * alpha; color.alpha = alpha << 8 | alpha; XRenderFillRectangle(t->dpy, PictOpSrc, src, &color, 0, 0, srcw, srch); XRenderCompositeTrapezoids(t->dpy, op, src, p, mask_format(t->dpy, mask), srcx, srcy, traps, ntraps); XRenderFreePicture(t->dpy, src); XFreePixmap(t->dpy, tmp); } static void trap_tests(struct test *t, enum mask mask, enum trapezoid trapezoid, int reps, int sets, enum target target) { struct test_target out, ref; XTrapezoid *traps; int max_traps = 65536; int r, s, n; traps = malloc(sizeof(*traps) * max_traps); if (traps == NULL) return; printf("Testing trapezoids (%s with mask %s) (%s): ", trapezoid_name(trapezoid), mask_name(mask), test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); set_mask(&t->out, &out, mask); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); set_mask(&t->ref, &ref, mask); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int op = ops[rand() % sizeof(ops)]; int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; int num_traps = rand() % max_traps; int srcx = rand() % 2*out.width - out.width; int srcy = rand() % 2*out.height - out.height; int srcw = rand() % out.width; int srch = rand() % out.height; for (n = 0; n < num_traps; n++) random_trapezoid(&traps[n], 0, 0, 0, out.width, out.height); fill_traps(&t->out, out.picture, out.format, op, traps, num_traps, mask, srcx, srcy, srcw, srch, red, green, blue, alpha); fill_traps(&t->ref, ref.picture, ref.format, op, traps, num_traps, mask, srcx, srcy, srcw, srch, red, green, blue, alpha); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); free(traps); } int main(int argc, char **argv) { struct test test; int i, dx, dy; enum target target; enum mask mask; enum trapezoid trapezoid; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); for (target = TARGET_FIRST; target <= TARGET_LAST; target++) { pixel_tests(&test, reps, sets, target, 0); area_tests(&test, reps, sets, target, 0); for (dy = 0; dy < 1 << 16; dy += 1 << 14) for (dx = 0; dx < 1 << 16; dx += 1 << 14) for (mask = MASK_NONE; mask <= MASK_A8; mask++) rect_tests(&test, dx, dy, mask, reps, sets, target, 0); if (target != CHILD) { pixel_tests(&test, reps, sets, target, 1); area_tests(&test, reps, sets, target, 1); for (dy = 0; dy < 1 << 16; dy += 1 << 14) for (dx = 0; dx < 1 << 16; dx += 1 << 14) for (mask = MASK_NONE; mask <= MASK_A8; mask++) rect_tests(&test, dx, dy, mask, reps, sets, target, 1); } } for (target = TARGET_FIRST; target <= TARGET_LAST; target++) for (trapezoid = RECT_ALIGN; trapezoid <= GENERAL; trapezoid++) trap_tests(&test, mask, trapezoid, reps, sets, target); } return 0; } xf86-video-intel-2.99.917/test/tearing.mp40000664000175000017500000053263612400044327014774 00000000000000ftypmp42isommp42moovlmvhdֵ4ֵ4XFP@iodsO)wtrak\tkhd|%ֵ4FP@mdia mdhd|%ֵ4<U-hdlrvideVideoHandlerminfvmhd$dinfdref url ~stblstsdavc1HH0avcCdgd$[<2h<btrt sttsPstss=y-i;w+g8stsc.     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GC gc; val.function = alu; val.foreground = fg; val.line_width = lw; gc = XCreateGC(t->dpy, d, GCForeground | GCFunction | GCLineWidth, &val); XDrawRectangle(t->dpy, d, gc, x, y, w, h); XFreeGC(t->dpy, gc); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void zrect_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing empty rects (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t lw = rand() % 4; draw_rect(&t->out, out.draw, alu, x, y, 0, 0, fg, lw); draw_rect(&t->ref, ref.draw, alu, x, y, 0, 0, fg, lw); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } static void hrect_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing horizontal rects (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % (2*out.width); uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t lw = rand() % 4; draw_rect(&t->out, out.draw, alu, x, y, w, 0, fg, lw); draw_rect(&t->ref, ref.draw, alu, x, y, w, 0, fg, lw); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } static void vrect_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing vertical rects (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int h = rand() % (2*out.width); uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t lw = rand() % 4; draw_rect(&t->out, out.draw, alu, x, y, 0, h, fg, lw); draw_rect(&t->ref, ref.draw, alu, x, y, 0, h, fg, lw); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } static void rect_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing general (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % (2*out.width); int h = rand() % (2*out.height); uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t lw = rand() % 4; draw_rect(&t->out, out.draw, alu, x, y, w, h, fg, lw); draw_rect(&t->ref, ref.draw, alu, x, y, w, h, fg, lw); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { zrect_tests(&test, reps, sets, t); hrect_tests(&test, reps, sets, t); vrect_tests(&test, reps, sets, t); rect_tests(&test, reps, sets, t); } } return 0; } xf86-video-intel-2.99.917/test/mkvsync.sh0000775000175000017500000000103312244635610014737 00000000000000#!/bin/bash OUT="$1" [ -n "$OUT" ] || OUT="vsync.avi" TMP=".build.tmp" rm -rf ${TMP} mkdir ${TMP} convert -size 640x480 -depth 24 canvas:black png24:${TMP}/black.png convert -size 640x480 -depth 24 canvas:white png24:${TMP}/white.png mkdir ${TMP}/anim for ((a=0; $a < 1000; a=$a+2)); do ln -s ../black.png ${TMP}/anim/$a.png done for ((a=1; $a < 1000; a=$a+2)); do ln -s ../white.png ${TMP}/anim/$a.png done mencoder "mf://${TMP}/anim/*.png" -v -vf-clr -mf fps=60 -o "${OUT}" -ovc lavc exitcode=$? rm -rf ${TMP} exit ${exitcode} xf86-video-intel-2.99.917/test/render-trapezoid.c0000664000175000017500000002541012400044327016326 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" enum trapezoid { RECT_ALIGN, RECT_UNALIGN, GENERAL }; static const uint8_t ops[] = { PictOpClear, PictOpSrc, PictOpDst, }; static XRenderPictFormat *mask_format(Display *dpy, enum mask mask) { switch (mask) { default: case MASK_NONE: return NULL; case MASK_A1: return XRenderFindStandardFormat(dpy, PictStandardA1); case MASK_A8: return XRenderFindStandardFormat(dpy, PictStandardA8); } } static const char *mask_name(enum mask mask) { switch (mask) { default: case MASK_NONE: return "none"; case MASK_A1: return "a1"; case MASK_A8: return "a8"; } } static const char *trapezoid_name(enum trapezoid trapezoid) { switch (trapezoid) { default: case RECT_ALIGN: return "pixel-aligned"; case RECT_UNALIGN: return "rectilinear"; case GENERAL: return "general"; } } static void fill_rect(struct test_display *dpy, Picture p, uint8_t op, int x, int y, int w, int h, int dx, int dy, enum mask mask, uint8_t red, uint8_t green, uint8_t blue, uint8_t alpha) { XRenderColor render_color; XTrapezoid trap; Picture src; render_color.red = red * alpha; render_color.green = green * alpha; render_color.blue = blue * alpha; render_color.alpha = alpha << 8; trap.left.p1.x = trap.left.p2.x = (x << 16) + dx; trap.top = trap.left.p1.y = trap.right.p1.y = (y << 16) + dy; trap.right.p1.x = trap.right.p2.x = ((x + w) << 16) + dx; trap.bottom = trap.left.p2.y = trap.right.p2.y = ((y + h) << 16) + dy; src = XRenderCreateSolidFill(dpy->dpy, &render_color); XRenderCompositeTrapezoids(dpy->dpy, op, src, p, mask_format(dpy->dpy, mask), 0, 0, &trap, 1); XRenderFreePicture(dpy->dpy, src); } static void pixel_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = malloc(t->out.width*t->out.height*4); struct { uint16_t x, y; } *pixels = malloc(reps*sizeof(*pixels)); int r, s; printf("Testing setting of single pixels (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &tt); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (tt.width - 1); int y = rand() % (tt.height - 1); int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; fill_rect(&t->out, tt.picture, PictOpSrc, x, y, 1, 1, 0, 0, MASK_NONE, red, green, blue, alpha); pixels[r].x = x; pixels[r].y = y; cells[y*t->out.width+x] = color(red, green, blue, alpha); } test_init_image(&image, &t->out.shm, tt.format, 1, 1); for (r = 0; r < reps; r++) { uint32_t result; uint32_t x = pixels[r].x; uint32_t y = pixels[r].y; XShmGetImage(t->out.dpy, tt.draw, &image, x, y, AllPlanes); result = *(uint32_t *)image.data; if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask = depth_mask(image.depth); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result); } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(pixels); free(cells); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void area_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = calloc(sizeof(uint32_t), t->out.width*t->out.height); int r, s, x, y; printf("Testing area sets (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &tt); clear(&t->out, &tt); test_init_image(&image, &t->out.shm, tt.format, tt.width, tt.height); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int w = rand() % tt.width; int h = rand() % tt.height; int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; x = rand() % (2*tt.width) - tt.width; y = rand() % (2*tt.height) - tt.height; fill_rect(&t->out, tt.picture, PictOpSrc, x, y, w, h, 0, 0, MASK_NONE, red, green, blue, alpha); if (x < 0) w += x, x = 0; if (y < 0) h += y, y = 0; if (x >= tt.width || y >= tt.height) continue; if (x + w > tt.width) w = tt.width - x; if (y + h > tt.height) h = tt.height - y; if (w <= 0 || h <= 0) continue; pixman_fill(cells, tt.width, 32, x, y, w, h, color(red, green, blue, alpha)); } XShmGetImage(t->out.dpy, tt.draw, &image, 0, 0, AllPlanes); for (y = 0; y < tt.height; y++) { for (x = 0; x < tt.width; x++) { uint32_t result = *(uint32_t *)(image.data + y*image.bytes_per_line + image.bits_per_pixel*x/8); if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask = depth_mask(image.depth); die("failed to set pixel (%d,%d) to %08x [%08x], found %08x [%08x] instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask, result); } } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(cells); } static void rect_tests(struct test *t, int dx, int dy, enum mask mask, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing area fills (offset %dx%d, mask %s) (%s): ", dx, dy, mask_name(mask), test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % out.width; int h = rand() % out.height; int op = ops[rand() % sizeof(ops)]; int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; fill_rect(&t->out, out.picture, op, x, y, w, h, dx, dy, mask, red, green, blue, alpha); fill_rect(&t->ref, ref.picture, op, x, y, w, h, dx, dy, mask, red, green, blue, alpha); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } static void random_trapezoid(XTrapezoid *trap, enum trapezoid trapezoid, int x1, int y1, int x2, int y2) { switch (trapezoid) { case RECT_ALIGN: x1 = x1 + rand() % (x2 - x1); x2 = x1 + rand() % (x2 - x1); y1 = y1 + rand() % (y2 - y1); y2 = y1 + rand() % (y2 - y1); trap->left.p1.x = trap->left.p2.x = x1 << 16; trap->top = trap->left.p1.y = trap->right.p1.y = y1 << 16; trap->right.p1.x = trap->right.p2.x = x2 << 16; trap->bottom = trap->left.p2.y = trap->right.p2.y = y2 << 16; break; case RECT_UNALIGN: x1 <<= 16; x2 <<= 16; y1 <<= 16; y2 <<= 16; x1 = x1 + rand() % (x2 - x1); x2 = x1 + rand() % (x2 - x1); y1 = y1 + rand() % (y2 - y1); y2 = y1 + rand() % (y2 - y1); trap->left.p1.x = trap->left.p2.x = x1; trap->top = trap->left.p1.y = trap->right.p1.y = y1; trap->right.p1.x = trap->right.p2.x = x2; trap->bottom = trap->left.p2.y = trap->right.p2.y = y2; break; case GENERAL: x1 <<= 16; x2 <<= 16; y1 <<= 16; y2 <<= 16; trap->top = y1 + rand() % (y2 - y1); trap->bottom = y1 + rand() % (y2 - y1); trap->left.p1.x = x1 + rand() % (x2 - x1); trap->left.p2.x = x1 + rand() % (x2 - x1); trap->right.p1.x = x1 + rand() % (x2 - x1); trap->right.p2.x = x1 + rand() % (x2 - x1); break; } } static void trap_tests(struct test *t, enum mask mask, enum trapezoid trapezoid, int reps, int sets, enum target target) { struct test_target out, ref; XTrapezoid *traps; int max_traps = 65536; int r, s, n; traps = malloc(sizeof(*traps) * max_traps); if (traps == NULL) return; printf("Testing trapezoids (%s with mask %s) (%s): ", trapezoid_name(trapezoid), mask_name(mask), test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { XRenderColor render_color; int op = ops[rand() % sizeof(ops)]; int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; int num_traps = rand() % max_traps; Picture src; for (n = 0; n < num_traps; n++) random_trapezoid(&traps[n], 0, 0, 0, out.width, out.height); render_color.red = red * alpha; render_color.green = green * alpha; render_color.blue = blue * alpha; render_color.alpha = alpha << 8; src = XRenderCreateSolidFill(t->out.dpy, &render_color); XRenderCompositeTrapezoids(t->out.dpy, op, src, out.picture, mask_format(t->out.dpy, mask), 0, 0, traps, num_traps); XRenderFreePicture(t->out.dpy, src); src = XRenderCreateSolidFill(t->ref.dpy, &render_color); XRenderCompositeTrapezoids(t->ref.dpy, op, src, ref.picture, mask_format(t->ref.dpy, mask), 0, 0, traps, num_traps); XRenderFreePicture(t->ref.dpy, src); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); free(traps); } int main(int argc, char **argv) { struct test test; int i, dx, dy; enum target target; enum mask mask; enum trapezoid trapezoid; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); for (target = TARGET_FIRST; target <= TARGET_LAST; target++) { pixel_tests(&test, reps, sets, target); area_tests(&test, reps, sets, target); for (dy = 0; dy < 1 << 16; dy += 1 << 14) for (dx = 0; dx < 1 << 16; dx += 1 << 14) for (mask = MASK_NONE; mask <= MASK_A8; mask++) rect_tests(&test, dx, dy, mask, reps, sets, target); for (trapezoid = RECT_ALIGN; trapezoid <= GENERAL; trapezoid++) trap_tests(&test, mask, trapezoid, reps, sets, target); } } return 0; } xf86-video-intel-2.99.917/test/basic-tiledrect.c0000664000175000017500000002267212400044327016115 00000000000000#include #include #include #include "test.h" static const unsigned char data[] = { 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, 0xaa, 0x55, }; static struct bitmap { int width, height; struct cache { Display *dpy; Pixmap pixmap; } cached[2]; } bitmaps[] = { { 1, 1, }, { 1, 2, }, { 2, 3, }, { 3, 2, }, { 4, 4, }, { 6, 6, }, { 8, 8, }, { 8, 4, }, { 8, 2, }, { 8, 1, }, { 4, 8, }, { 2, 8, }, { 1, 8, }, { 16, 16, }, { 15, 17, }, { 24, 24, }, { 32, 32, }, { 16, 8, }, { 16, 4, }, { 16, 2, }, { 16, 1, }, { 8, 16, }, { 4, 16, }, { 2, 16, }, { 1, 16, }, }; static void reset_cache(void) { int n, m; for (n = 0; n < sizeof(bitmaps)/sizeof(bitmaps[0]); n++) { for (m = 0; m < 2; m++) { if (bitmaps[n].cached[m].dpy) { XFreePixmap(bitmaps[n].cached[m].dpy, bitmaps[n].cached[m].pixmap); bitmaps[n].cached[m].dpy = NULL; } } } } static void fill_rect(struct test_target *t, uint8_t alu, XRectangle *clip, int nclip, uint8_t tile, int tx, int ty, int x, int y, int w, int h, uint32_t fg, uint32_t bg) { Display *dpy = t->dpy->dpy; struct bitmap *b = &bitmaps[(tile >> 1) % (sizeof(bitmaps)/sizeof(bitmaps[0]))]; XGCValues val; GC gc; int n; val.function = alu; val.function = GXcopy; val.fill_style = FillTiled; val.ts_x_origin = tx; val.ts_y_origin = ty; if (tile & 1) { val.tile = 0; for (n = 0; n < 2; n++) { if (b->cached[n].dpy == dpy) { val.tile = b->cached[n].pixmap; break; } } if (val.tile == 0) { val.tile = XCreatePixmapFromBitmapData(dpy, t->draw, (char *)data, b->width, b->height, fg, bg, t->depth); for (n = 0; n < 2; n++) { if (b->cached[n].dpy == NULL) { b->cached[n].dpy = dpy; b->cached[n].pixmap = val.tile; break; } } } } else val.tile = XCreatePixmapFromBitmapData(dpy, t->draw, (char *)data, b->width, b->height, fg, bg, t->depth); gc = XCreateGC(dpy, t->draw, GCFillStyle | GCTileStipXOrigin | GCTileStipYOrigin | GCTile | GCFunction, &val); if (nclip) XSetClipRectangles(dpy, gc, 0, 0, clip, nclip, Unsorted); XFillRectangle(dpy, t->draw, gc, x, y, w, h); XFreeGC(dpy, gc); if ((tile & 1) == 0) XFreePixmap(dpy, val.tile); } static void clear(struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(tt->dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void small_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing small tiled fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&out); test_target_create_render(&t->ref, target, &ref); clear(&ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % out.width; int y = rand() % out.height; int w = rand() % out.width; int h = rand() % 8; int tx = rand() % (2*out.width) - out.width; int ty = rand() % (2*out.height) - out.height; uint8_t tile = rand(); uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t bg = rand(); fill_rect(&out, alu, NULL, 0, tile, tx, ty, x, y, w, h, fg, bg); fill_rect(&ref, alu, NULL, 0, tile, tx, ty, x, y, w, h, fg, bg); fill_rect(&out, alu, NULL, 0, tile, tx, ty, x, y, h, w, fg, bg); fill_rect(&ref, alu, NULL, 0, tile, tx, ty, x, y, h, w, fg, bg); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); if (target == CHILD) { int x = rand() % (t->out.width-out.width); int y = rand() % (t->out.height-out.height); clear(&out); clear(&ref); XMoveWindow(out.dpy->dpy, out.draw, x, y); XMoveWindow(ref.dpy->dpy, ref.draw, x, y); clear(&out); clear(&ref); } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } static void unclipped_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing unclipped tiled fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&out); test_target_create_render(&t->ref, target, &ref); clear(&ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % out.width; int y = rand() % out.height; int w = rand() % (out.width - x); int h = rand() % (out.height - y); int tx = rand() % (2*out.width) - out.width; int ty = rand() % (2*out.height) - out.height; uint8_t tile = rand(); uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t bg = rand(); fill_rect(&out, alu, NULL, 0, tile, tx, ty, x, y, w, h, fg, bg); fill_rect(&ref, alu, NULL, 0, tile, tx, ty, x, y, w, h, fg, bg); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); if (target == CHILD) { int x = rand() % (t->out.width-out.width); int y = rand() % (t->out.height-out.height); clear(&out); clear(&ref); XMoveWindow(out.dpy->dpy, out.draw, x, y); XMoveWindow(ref.dpy->dpy, ref.draw, x, y); clear(&out); clear(&ref); } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } static void simple_clip_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing simple clipped tiled fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&out); test_target_create_render(&t->ref, target, &ref); clear(&ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % (2*out.width); int h = rand() % (2*out.height); int tx = rand() % (2*out.width) - out.width; int ty = rand() % (2*out.height) - out.height; uint8_t tile = rand(); uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t bg = rand(); fill_rect(&out, alu, NULL, 0, tile, tx, ty, x, y, w, h, fg, bg); fill_rect(&ref, alu, NULL, 0, tile, tx, ty, x, y, w, h, fg, bg); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); if (target == CHILD) { int x = rand() % (t->out.width-out.width); int y = rand() % (t->out.height-out.height); clear(&out); clear(&ref); XMoveWindow(out.dpy->dpy, out.draw, x, y); XMoveWindow(ref.dpy->dpy, ref.draw, x, y); clear(&out); clear(&ref); } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } static void complex_clip_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; XRectangle *clip; int nclip, r, s; printf("Testing complex clipped tiled fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&out); test_target_create_render(&t->ref, target, &ref); clear(&ref); for (s = 0; s < sets; s++) { nclip = (rand() % 16) + 2; clip = malloc(sizeof(XRectangle)*nclip); for (r = 0; r < nclip; r++) { clip[r].x = rand() % out.width; clip[r].y = rand() % out.height; clip[r].width = rand() % (out.width - clip[r].x); clip[r].height = rand() % (out.height - clip[r].y); } for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % (2*out.width); int h = rand() % (2*out.height); int tx = rand() % (2*out.width) - out.width; int ty = rand() % (2*out.height) - out.height; uint8_t tile = rand(); uint8_t alu = rand() % (GXset + 1); uint32_t fg = rand(); uint32_t bg = rand(); fill_rect(&out, alu, clip, nclip, tile, tx, ty, x, y, w, h, fg, bg); fill_rect(&ref, alu, clip, nclip, tile, tx, ty, x, y, w, h, fg, bg); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); free(clip); if (target == CHILD) { int x = rand() % (t->out.width-out.width); int y = rand() % (t->out.height-out.height); clear(&out); clear(&ref); XMoveWindow(out.dpy->dpy, out.draw, x, y); XMoveWindow(ref.dpy->dpy, ref.draw, x, y); clear(&out); clear(&ref); } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { small_tests(&test, reps, sets, t); unclipped_tests(&test, reps, sets, t); simple_clip_tests(&test, reps, sets, t); complex_clip_tests(&test, reps, sets, t); reset_cache(); } } return 0; } xf86-video-intel-2.99.917/test/dri3-test.c0000664000175000017500000006635312400044327014701 00000000000000/* * Copyright (c) 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #if HAVE_X11_EXTENSIONS_SHMPROTO_H #include #elif HAVE_X11_EXTENSIONS_SHMSTR_H #include #else #error Failed to find the right header for X11 MIT-SHM protocol definitions #endif #include #include #include #include #include #include #include #include #include #include #include #include #include "dri3.h" #include "../src/i915_pciids.h" #define ALIGN(x, y) (((x) + (y) - 1) & -(y)) #define PAGE_ALIGN(x) ALIGN(x, 4096) #define GTT I915_GEM_DOMAIN_GTT #define CPU I915_GEM_DOMAIN_CPU static int _x_error_occurred; static const struct pci_id_match ids[] = { INTEL_I830_IDS(020), INTEL_I845G_IDS(021), INTEL_I85X_IDS(022), INTEL_I865G_IDS(023), INTEL_I915G_IDS(030), INTEL_I915GM_IDS(030), INTEL_I945G_IDS(031), INTEL_I945GM_IDS(031), INTEL_G33_IDS(033), INTEL_PINEVIEW_IDS(033), INTEL_I965G_IDS(040), INTEL_I965GM_IDS(040), INTEL_G45_IDS(045), INTEL_GM45_IDS(045), INTEL_IRONLAKE_D_IDS(050), INTEL_IRONLAKE_M_IDS(050), INTEL_SNB_D_IDS(060), INTEL_SNB_M_IDS(060), INTEL_IVB_D_IDS(070), INTEL_IVB_M_IDS(070), INTEL_HSW_D_IDS(075), INTEL_HSW_M_IDS(075), INTEL_VLV_D_IDS(071), INTEL_VLV_M_IDS(071), INTEL_BDW_D_IDS(0100), INTEL_BDW_M_IDS(0100), }; static int i915_gen(int device) { struct drm_i915_getparam gp; int devid = 0; int n; gp.param = I915_PARAM_CHIPSET_ID; gp.value = &devid; if (drmIoctl(device, DRM_IOCTL_I915_GETPARAM, &gp)) return 0; for (n = 0; n < sizeof(ids)/sizeof(ids[0]); n++) { if (devid == ids[n].device_id) return ids[n].match_data; } return 0; } static int is_i915_device(int fd) { drm_version_t version; char name[5] = ""; memset(&version, 0, sizeof(version)); version.name_len = 4; version.name = name; if (drmIoctl(fd, DRM_IOCTL_VERSION, &version)) return 0; return strcmp("i915", name) == 0; } static int is_intel(int fd) { struct drm_i915_getparam gp; int ret; /* Confirm that this is a i915.ko device with GEM/KMS enabled */ ret = is_i915_device(fd); if (ret) { gp.param = I915_PARAM_HAS_GEM; gp.value = &ret; if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) ret = 0; } return ret; } static uint32_t gem_create(int fd, int size) { struct drm_i915_gem_create create; create.handle = 0; create.size = size; (void)drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create); return create.handle; } struct local_i915_gem_caching { uint32_t handle; uint32_t caching; }; #define LOCAL_I915_GEM_SET_CACHING 0x2f #define LOCAL_IOCTL_I915_GEM_SET_CACHING DRM_IOW(DRM_COMMAND_BASE + LOCAL_I915_GEM_SET_CACHING, struct local_i915_gem_caching) static int gem_set_caching(int fd, uint32_t handle, int caching) { struct local_i915_gem_caching arg; arg.handle = handle; arg.caching = caching; return drmIoctl(fd, LOCAL_IOCTL_I915_GEM_SET_CACHING, &arg) == 0; } static int gem_export(int fd, uint32_t handle) { struct drm_prime_handle args; args.handle = handle; args.flags = O_CLOEXEC; if (drmIoctl(fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args)) return -1; return args.fd; } static uint32_t gem_import(int fd, int name) { struct drm_prime_handle args; args.fd = name; args.flags = 0; if (drmIoctl(fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &args)) return 0; return args.handle; } static int gem_write(int fd, uint32_t handle, int offset, void *data, int len) { struct drm_i915_gem_pwrite gem_pwrite; gem_pwrite.handle = handle; gem_pwrite.offset = offset; gem_pwrite.size = len; gem_pwrite.data_ptr = (uintptr_t)data; return drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite); } static void *gem_mmap(int fd, uint32_t handle, int size, unsigned prot, int domain) { struct drm_i915_gem_set_domain set_domain; void *ptr; if (domain == CPU) { struct drm_i915_gem_mmap mmap_arg; mmap_arg.handle = handle; mmap_arg.offset = 0; mmap_arg.size = size; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_MMAP, &mmap_arg)) return NULL; ptr = (void *)(uintptr_t)mmap_arg.addr_ptr; } else { struct drm_i915_gem_mmap_gtt mmap_arg; mmap_arg.handle = handle; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg)) return NULL; ptr = mmap(0, size, prot, MAP_SHARED, fd, mmap_arg.offset); if (ptr == MAP_FAILED) return NULL; } set_domain.handle = handle; set_domain.read_domains = domain; set_domain.write_domain = prot & PROT_WRITE ? set_domain.read_domains : 0; if (drmIoctl(fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain)) { munmap(ptr, size); return NULL; } return ptr; } static void gem_sync(int fd, uint32_t handle, int read) { struct drm_i915_gem_set_domain set_domain; set_domain.handle = handle; set_domain.read_domains = read; set_domain.write_domain = 0; drmIoctl(fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &set_domain); } static int gem_get_tiling(int fd, uint32_t handle) { struct drm_i915_gem_get_tiling tiling; tiling.handle = handle; tiling.tiling_mode = -1; (void)drmIoctl(fd, DRM_IOCTL_I915_GEM_GET_TILING, &tiling); return tiling.tiling_mode; } static void gem_close(int fd, uint32_t handle) { struct drm_gem_close close; close.handle = handle; (void)drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &close); } static void gem_fill(int fd, uint32_t handle, uint32_t pixel, uint32_t size, int domain) { uint32_t *ptr, s; ptr = gem_mmap(fd, handle, size, PROT_READ | PROT_WRITE, domain); if (ptr == NULL) return; for (s = 0; s < size; s += 4) ptr[s/4] = pixel; munmap(ptr, size); } static int check_pixmap(Display *dpy, Pixmap pix, int x, int y, uint32_t expected, int bpp) { XImage *image; int w = 32 / bpp; image = XGetImage(dpy, pix, x - (x % w), y, w, 1, AllPlanes, ZPixmap); if (image == NULL) return 0; if (*(uint32_t *)image->data != expected) { printf("pixmap[%d, %d]:%d = %08x\n", x, y, bpp, *(uint32_t *)image->data); return 0; } XDestroyImage(image); return 1; } static int check_pixel(int fd, uint32_t handle, uint32_t stride, uint32_t size, int x, int y, uint32_t expected, int bpp, int domain) { uint32_t *ptr; int w = 32 / bpp; assert((stride & 3) == 0); ptr = gem_mmap(fd, handle, size, PROT_READ, domain); if (ptr == NULL) return 0; if (ptr[(y*stride + x - (x % w))/4] != expected) { printf("pixel[%d, %d]:%d = %08x\n", x, y, bpp, ptr[(y * stride + x)/4]); return 0; } munmap(ptr, size); return 1; } static GC get_gc(Display *dpy, Drawable d, int depth) { static GC gc[33]; if (gc[depth] == NULL) { XGCValues gcv; gcv.graphics_exposures = False; gc[depth] = XCreateGC(dpy, d, GCGraphicsExposures, &gcv); } return gc[depth]; } static int can_use_shm(Display *dpy) { int major, minor, has_pixmap; if (!XShmQueryExtension(dpy)) return 0; XShmQueryVersion(dpy, &major, &minor, &has_pixmap); return has_pixmap; } static int gpu_fill(int device, int handle, int width, int height, int pitch, int bpp, int tiling, uint32_t pixel) { struct drm_i915_gem_execbuffer2 execbuf; struct drm_i915_gem_relocation_entry gem_reloc[2]; struct drm_i915_gem_exec_object2 gem_exec[2]; uint32_t batch[10]; int gen = i915_gen(device); int len = 0; int ret; if (gen == 0) return -ENODEV; batch[0] = 2 << 29 | 0x50 << 22; batch[0] |= (gen >= 0100 ? 5 : 4); batch[1] = pitch; if (gen >= 040 && tiling) { batch[0] |= 1 << 11; batch[1] >>= 2; } batch[1] |= 0xf0 << 16; switch (bpp) { default: assert(0); case 32: batch[0] |= 1 << 21 | 1 << 20; batch[1] |= 1 << 25; /* RGB8888 */ case 16: batch[1] |= 1 << 24; /* RGB565 */ case 8: break; } batch[2] = 0; batch[3] = height << 16 | width; batch[4] = 0; len = 5; if (gen >= 0100) batch[len++] = 0; batch[len++] = pixel; batch[len++] = 0xA << 23; if (len & 1) len++; gem_reloc[0].offset = 4 * sizeof(uint32_t); gem_reloc[0].delta = 0; gem_reloc[0].target_handle = handle; gem_reloc[0].read_domains = I915_GEM_DOMAIN_RENDER; gem_reloc[0].write_domain = I915_GEM_DOMAIN_RENDER; gem_reloc[0].presumed_offset = 0; memset(gem_exec, 0, sizeof(gem_exec)); gem_exec[0].handle = handle; gem_exec[1].handle = gem_create(device, 4096); gem_exec[1].relocation_count = 1; gem_exec[1].relocs_ptr = (uintptr_t)gem_reloc; memset(&execbuf, 0, sizeof(execbuf)); execbuf.buffers_ptr = (uintptr_t)gem_exec; execbuf.buffer_count = 2; execbuf.batch_len = len * sizeof(uint32_t); execbuf.flags = gen >= 060 ? I915_EXEC_BLT : 0; ret = gem_write(device, gem_exec[1].handle, 0, batch, execbuf.batch_len); if (ret == 0) ret = drmIoctl(device, DRM_IOCTL_I915_GEM_EXECBUFFER2, &execbuf); if (ret < 0) ret = -errno; gem_close(device, gem_exec[1].handle); return ret; } static int test_shm(Display *dpy, int device, int width, int height) { const int x_loc[] = {0, width/2, width-1}; const int y_loc[] = {0, height/2, height-1}; uint32_t pixel = 0xffff00ff; XShmSegmentInfo shm; Pixmap pixmap; uint32_t handle = 0; uint32_t *ptr; int stride, fd; int x, y; int line; if (!can_use_shm(dpy)) return 0; printf("Creating %dx%d SHM pixmap\n", width, height); _x_error_occurred = 0; shm.shmid = shmget(IPC_PRIVATE, height * 4*width, IPC_CREAT | 0666); if (shm.shmid == -1) return 0; shm.shmaddr = shmat(shm.shmid, 0, 0); if (shm.shmaddr == (char *) -1) { shmctl(shm.shmid, IPC_RMID, NULL); return 0; } shm.readOnly = False; XShmAttach(dpy, &shm); pixmap = XShmCreatePixmap(dpy, DefaultRootWindow(dpy), shm.shmaddr, &shm, width, height, 24); XSync(dpy, False); shmctl(shm.shmid, IPC_RMID, NULL); if (_x_error_occurred) { XShmDetach(dpy, &shm); shmdt(shm.shmaddr); return 0; } printf("Testing write of %dx%d SHM pixmap via DRI3 fd\n", width, height); fd = dri3_create_fd(dpy, pixmap, &stride); if (fd < 0) { line = __LINE__; goto fail; } handle = gem_import(device, fd); close(fd); if (handle == 0) { line = __LINE__; goto fail; } if (gpu_fill(device, handle, width, height, stride, 32, I915_TILING_NONE, pixel)) { line = __LINE__; goto fail; } gem_sync(device, handle, CPU); ptr = (uint32_t *)shm.shmaddr; for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (ptr[y_loc[y]*width + x_loc[x]] != pixel) { printf("pixel[%d, %d]:%d = %08x\n", x, y, 32, ptr[y_loc[y] * width + x_loc[x]]); line = __LINE__; goto fail; } for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (!check_pixmap(dpy, pixmap, x_loc[x], y_loc[y], pixel, 32)) { line = __LINE__; goto fail; } if (_x_error_occurred) { line = __LINE__; goto fail; } out: gem_close(device, handle); XFreePixmap(dpy, pixmap); XShmDetach(dpy, &shm); shmdt(shm.shmaddr); return fd != -1; fail: printf("%s failed at (%dx%d), line %d\n", __func__, width, height, line); fd = -1; goto out; } static int test_read_after_write(Display *dpy, int device, int width, int height, int depth, int domain) { const uint32_t pixel = 0xffff00ff; const int x_loc[] = {0, width/2, width-1}; const int y_loc[] = {0, height/2, height-1}; Window root = RootWindow(dpy, DefaultScreen(dpy)); uint32_t src, dst; int src_fd, dst_fd; int src_stride, src_size; int dst_stride, dst_size; Pixmap src_pix, dst_pix; struct dri3_fence fence; int x, y, bpp; _x_error_occurred = 0; switch (depth) { case 8: bpp = 8; break; case 16: bpp = 16; break; case 24: bpp = 32; break; case 32: bpp = 32; break; default: return 0; } src_stride = width * bpp/8; src_size = PAGE_ALIGN(src_stride * height); printf("Creating %dx%d (source stride=%d, size=%d, domain=%d)\n", width, height, src_stride, src_size, domain); src = gem_create(device, src_size); if (!src) goto fail; if (domain == CPU) gem_set_caching(device, src, 1); gem_fill(device, src, pixel, src_size, domain); src_fd = gem_export(device, src); if (src_fd < 0) goto fail; src_pix = dri3_create_pixmap(dpy, root, width, height, depth, src_fd, bpp, src_stride, src_size); for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (!check_pixmap(dpy, src_pix, x_loc[x], y_loc[y], pixel, bpp)) goto fail; close(src_fd); dst_pix = XCreatePixmap(dpy, root, width, height, depth); if (dri3_create_fence(dpy, dst_pix, &fence)) goto fail; dst_fd = dri3_create_fd(dpy, dst_pix, &dst_stride); if (dst_fd < 0) goto fail; dst_size = lseek(dst_fd, 0, SEEK_END); printf("Comparing %dx%d (destination stride=%d, size=%d)\n", width, height, dst_stride, dst_size); dst = gem_import(device, dst_fd); if (dst == 0) goto fail; close(dst_fd); XCopyArea(dpy, src_pix, dst_pix, get_gc(dpy, dst_pix, depth), 0, 0, width, height, 0, 0); dri3_fence_sync(dpy, &fence); dri3_fence_free(dpy, &fence); for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (!check_pixel(device, dst, dst_stride, dst_size, x_loc[x], y_loc[y], pixel, bpp, GTT)) goto fail; XFreePixmap(dpy, dst_pix); XFreePixmap(dpy, src_pix); gem_close(device, src); gem_close(device, dst); if (_x_error_occurred) goto fail; return 0; fail: printf("%s failed at (%dx%d), depth=%d, domain=%d\n", __func__, width, height, depth, domain); return 1; } static XRenderPictFormat *format_for_depth(Display *dpy, int depth) { switch (depth) { case 8: return XRenderFindStandardFormat(dpy, PictStandardA8); case 24: return XRenderFindStandardFormat(dpy, PictStandardRGB24); case 32: return XRenderFindStandardFormat(dpy, PictStandardARGB32); default: assert(0); return NULL; } } static int test_read(Display *dpy, int device, int width, int height, int domain) { const uint32_t pixel = 0xffff00ff; const XRenderColor color = { 0xffff, 0x0000, 0xffff, 0xffff }; const int x_loc[] = {0, width/2, width-1}; const int y_loc[] = {0, height/2, height-1}; Window root = RootWindow(dpy, DefaultScreen(dpy)); uint32_t dst; int dst_stride, dst_size, dst_fd; Pixmap src_pix, dst_pix; Picture src_pic; struct dri3_fence fence; int depth = 32, bpp = 32; int x, y; _x_error_occurred = 0; dst_stride = width * bpp/8; dst_size = PAGE_ALIGN(dst_stride * height); printf("Creating %dx%d (destination stride=%d, size=%d, domain=%d)\n", width, height, dst_stride, dst_size, domain); dst = gem_create(device, dst_size); if (!dst) goto fail; if (domain == CPU) gem_set_caching(device, dst, 1); gem_fill(device, dst, ~pixel, dst_size, domain); dst_fd = gem_export(device, dst); if (dst_fd < 0) goto fail; dst_pix = dri3_create_pixmap(dpy, root, width, height, depth, dst_fd, bpp, dst_stride, dst_size); XSync(dpy, True); if (_x_error_occurred) goto fail; if (dri3_create_fence(dpy, dst_pix, &fence)) goto fail; src_pix = XCreatePixmap(dpy, root, width, height, depth); src_pic = XRenderCreatePicture(dpy, src_pix, format_for_depth(dpy, depth), 0, NULL); XRenderFillRectangle(dpy, PictOpSrc, src_pic, &color, 0, 0, width, height); XCopyArea(dpy, src_pix, dst_pix, get_gc(dpy, dst_pix, depth), 0, 0, width, height, 0, 0); dri3_fence_sync(dpy, &fence); dri3_fence_free(dpy, &fence); for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (!check_pixel(device, dst, dst_stride, dst_size, x_loc[x], y_loc[y], pixel, bpp, domain)) goto fail; XFreePixmap(dpy, dst_pix); XRenderFreePicture(dpy, src_pic); XFreePixmap(dpy, src_pix); gem_close(device, dst); if (_x_error_occurred) goto fail; return 0; fail: printf("%s failed at (%dx%d), depth=%d, domain=%d\n", __func__, width, height, depth, domain); return 1; } static int test_dup_pixmap(Display *dpy, int device) { const uint32_t pixel = 0xffff00ff; const XRenderColor color = { 0xffff, 0x0000, 0xffff, 0xffff }; const XRenderColor inverse = { 0, 0xffff, 0, 0 }; int width = 400, height = 400; const int x_loc[] = {0, width/2, width-1}; const int y_loc[] = {0, height/2, height-1}; Window root = RootWindow(dpy, DefaultScreen(dpy)); uint32_t handle; int stride, size, fd; Pixmap src_pix, dst_pix; Picture src_pic, dst_pic; struct dri3_fence fence; int depth = 32, bpp = 32; int x, y; _x_error_occurred = 0; printf("%s: Creating %dx%d pixmap\n", __func__, width, height); src_pix = XCreatePixmap(dpy, root, width, height, depth); src_pic = XRenderCreatePicture(dpy, src_pix, format_for_depth(dpy, depth), 0, NULL); fd = dri3_create_fd(dpy, src_pix, &stride); if (fd < 0) goto fail; size = lseek(fd, 0, SEEK_END); handle = gem_import(device, fd); printf("%s: Creating duplicate from pixmap exported fd\n", __func__); dst_pix = dri3_create_pixmap(dpy, root, width, height, depth, fd, bpp, stride, size); dst_pic = XRenderCreatePicture(dpy, dst_pix, format_for_depth(dpy, depth), 0, NULL); XSync(dpy, True); if (_x_error_occurred) goto fail; printf("%s: Filling src with %08x, reading dst\n", __func__, pixel); XRenderFillRectangle(dpy, PictOpSrc, src_pic, &color, 0, 0, width, height); for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (!check_pixmap(dpy, dst_pix, x_loc[x], y_loc[y], pixel, 32)) goto fail; printf("%s: Filling dst with %08x, reading src\n", __func__, ~pixel); XRenderFillRectangle(dpy, PictOpSrc, dst_pic, &inverse, 0, 0, width, height); for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (!check_pixmap(dpy, dst_pix, x_loc[x], y_loc[y], ~pixel, 32)) goto fail; if (dri3_create_fence(dpy, src_pix, &fence)) goto fail; printf("%s: Filling src with %08x, reading fd\n", __func__, pixel); XRenderFillRectangle(dpy, PictOpSrc, src_pic, &color, 0, 0, width, height); dri3_fence_sync(dpy, &fence); dri3_fence_free(dpy, &fence); for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (!check_pixel(device, handle, stride, size, x_loc[x], y_loc[y], pixel, bpp, GTT)) goto fail; printf("%s: Filling fd with %08x, reading src\n", __func__, ~pixel); if (gpu_fill(device, handle, width, height, stride, 32, gem_get_tiling(device, handle), ~pixel)) goto fail; for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (!check_pixmap(dpy, src_pix, x_loc[x], y_loc[y], ~pixel, 32)) goto fail; if (dri3_create_fence(dpy, dst_pix, &fence)) goto fail; printf("%s: Filling dst with %08x, reading fd\n", __func__, pixel); XRenderFillRectangle(dpy, PictOpSrc, dst_pic, &color, 0, 0, width, height); dri3_fence_sync(dpy, &fence); dri3_fence_free(dpy, &fence); for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (!check_pixel(device, handle, stride, size, x_loc[x], y_loc[y], pixel, bpp, GTT)) goto fail; printf("%s: Filling fd with %08x, reading dst\n", __func__, ~pixel); if (gpu_fill(device, handle, width, height, stride, 32, gem_get_tiling(device, handle), ~pixel)) goto fail; for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (!check_pixmap(dpy, dst_pix, x_loc[x], y_loc[y], ~pixel, 32)) goto fail; XRenderFreePicture(dpy, src_pic); XFreePixmap(dpy, src_pix); if (dri3_create_fence(dpy, dst_pix, &fence)) goto fail; printf("%s: Closed original src, filling dst with %08x, reading fd\n", __func__, pixel); XRenderFillRectangle(dpy, PictOpSrc, dst_pic, &color, 0, 0, width, height); dri3_fence_sync(dpy, &fence); dri3_fence_free(dpy, &fence); for (x = 0; x < sizeof(x_loc)/sizeof(x_loc[0]); x++) for (y = 0; y < sizeof(y_loc)/sizeof(y_loc[0]); y++) if (!check_pixel(device, handle, stride, size, x_loc[x], y_loc[y], pixel, bpp, GTT)) goto fail; XRenderFreePicture(dpy, dst_pic); XFreePixmap(dpy, dst_pix); gem_close(device, handle); if (_x_error_occurred) goto fail; return 0; fail: printf("%s failed at (%dx%d), depth=%d\n", __func__, width, height, depth); return 1; } static int test_bad_size(Display *dpy, int device) { Window root = RootWindow(dpy, DefaultScreen(dpy)); uint32_t src; int src_fd; Pixmap src_pix; int line = -1; _x_error_occurred = 0; src = gem_create(device, 4096); if (!src) goto fail; src_fd = gem_export(device, src); if (src_fd < 0) goto fail; src_pix = dri3_create_pixmap(dpy, root, 16, 16, 32, dup(src_fd), 32, 16*4, 4096); line = __LINE__; XSync(dpy, True); if (_x_error_occurred) goto fail; XFreePixmap(dpy, src_pix); _x_error_occurred = 0; src_pix = dri3_create_pixmap(dpy, root, 32, 32, 32, dup(src_fd), 32, 32*4, 4096); line = __LINE__; XSync(dpy, True); if (_x_error_occurred) goto fail; XFreePixmap(dpy, src_pix); _x_error_occurred = 0; src_pix = dri3_create_pixmap(dpy, root, 64, 64, 32, dup(src_fd), 32, 64*4, 4096); line = __LINE__; XSync(dpy, True); if (!_x_error_occurred) goto fail; _x_error_occurred = 0; src_pix = dri3_create_pixmap(dpy, root, 64, 64, 32, dup(src_fd), 32, 64*4, 64*64*4); line = __LINE__; XSync(dpy, True); if (!_x_error_occurred) goto fail; _x_error_occurred = 0; src_pix = dri3_create_pixmap(dpy, root, INT16_MAX, INT16_MAX, 8, dup(src_fd), 8, INT16_MAX, UINT32_MAX); line = __LINE__; XSync(dpy, True); if (!_x_error_occurred) goto fail; _x_error_occurred = 0; close(src_fd); gem_close(device, src); return 0; fail: printf("%s failed at line %d\n", __func__, line); return 1; } static int test_bad_pitch(Display *dpy, int device) { Window root = RootWindow(dpy, DefaultScreen(dpy)); uint32_t src; int src_fd; Pixmap src_pix; int line = -1; _x_error_occurred = 0; src = gem_create(device, 4096); if (!src) goto fail; src_fd = gem_export(device, src); if (src_fd < 0) goto fail; src_pix = dri3_create_pixmap(dpy, root, 16, 16, 32, dup(src_fd), 32, 16*4, 4096); line = __LINE__; XSync(dpy, True); if (_x_error_occurred) goto fail; XFreePixmap(dpy, src_pix); _x_error_occurred = 0; src_pix = dri3_create_pixmap(dpy, root, 256, 2, 32, dup(src_fd), 32, 256*4, 4096); line = __LINE__; XSync(dpy, True); if (_x_error_occurred) goto fail; XFreePixmap(dpy, src_pix); _x_error_occurred = 0; src_pix = dri3_create_pixmap(dpy, root, 256, 2, 32, dup(src_fd), 32, 256, 4096); line = __LINE__; XSync(dpy, True); if (!_x_error_occurred) goto fail; _x_error_occurred = 0; src_pix = dri3_create_pixmap(dpy, root, 256, 2, 32, dup(src_fd), 32, 16384, 4096); line = __LINE__; XSync(dpy, True); if (!_x_error_occurred) goto fail; _x_error_occurred = 0; src_pix = dri3_create_pixmap(dpy, root, 256, 2, 32, dup(src_fd), 32, 1023, 4096); line = __LINE__; XSync(dpy, True); if (!_x_error_occurred) goto fail; _x_error_occurred = 0; src_pix = dri3_create_pixmap(dpy, root, 256, 2, 32, dup(src_fd), 32, 1025, 4096); line = __LINE__; XSync(dpy, True); if (!_x_error_occurred) goto fail; _x_error_occurred = 0; close(src_fd); gem_close(device, src); return 0; fail: printf("%s failed at line %d\n", __func__, line); return 1; } static int _check_error_handler(Display *display, XErrorEvent *event) { printf("X11 error from display %s, serial=%ld, error=%d, req=%d.%d\n", DisplayString(display), event->serial, event->error_code, event->request_code, event->minor_code); _x_error_occurred++; return False; /* ignored */ } int main(void) { Display *dpy; int device; int error = 0; dpy = XOpenDisplay(NULL); if (dpy == NULL) return 77; if (DefaultDepth(dpy, DefaultScreen(dpy)) != 24) return 77; XSetErrorHandler(_check_error_handler); device = dri3_open(dpy); if (device < 0) return 127; if (!is_intel(device)) return 77; printf("Opened Intel DRI3 device\n"); error += test_bad_size(dpy, device); error += test_bad_pitch(dpy, device); error += test_shm(dpy, device, 400, 300); error += test_shm(dpy, device, 300, 400); error += test_read(dpy, device, 400, 200, GTT); error += test_read(dpy, device, 4000, 20, GTT); error += test_read(dpy, device, 16000, 10, GTT); error += test_read(dpy, device, 30000, 10, GTT); error += test_read(dpy, device, 200, 400, GTT); error += test_read(dpy, device, 20, 4000, GTT); error += test_read(dpy, device, 16, 16000, GTT); error += test_read(dpy, device, 16, 30000, GTT); error += test_read(dpy, device, 400, 200, CPU); error += test_read(dpy, device, 4000, 20, CPU); error += test_read(dpy, device, 16000, 10, CPU); error += test_read(dpy, device, 30000, 10, CPU); error += test_read(dpy, device, 200, 400, CPU); error += test_read(dpy, device, 20, 4000, CPU); error += test_read(dpy, device, 16, 16000, CPU); error += test_read(dpy, device, 16, 30000, CPU); error += test_read_after_write(dpy, device, 400, 200, 24, GTT); error += test_read_after_write(dpy, device, 4000, 20, 24, GTT); error += test_read_after_write(dpy, device, 16000, 10, 24, GTT); error += test_read_after_write(dpy, device, 30000, 10, 24, GTT); error += test_read_after_write(dpy, device, 30000, 10, 8, GTT); error += test_read_after_write(dpy, device, 200, 400, 24, GTT); error += test_read_after_write(dpy, device, 20, 4000, 24, GTT); error += test_read_after_write(dpy, device, 16, 16000, 24, GTT); error += test_read_after_write(dpy, device, 16, 30000, 24, GTT); error += test_read_after_write(dpy, device, 400, 200, 24, CPU); error += test_read_after_write(dpy, device, 4000, 20, 24, CPU); error += test_read_after_write(dpy, device, 16000, 10, 24, CPU); error += test_read_after_write(dpy, device, 30000, 10, 24, CPU); error += test_read_after_write(dpy, device, 30000, 10, 8, CPU); error += test_read_after_write(dpy, device, 200, 400, 24, CPU); error += test_read_after_write(dpy, device, 20, 4000, 24, CPU); error += test_read_after_write(dpy, device, 16, 16000, 24, CPU); error += test_read_after_write(dpy, device, 16, 30000, 24, CPU); error += test_dup_pixmap(dpy, device); return !!error; } xf86-video-intel-2.99.917/test/lowlevel-blt-bench.c0000664000175000017500000003044312432737457016561 00000000000000/* * Copyright © 2009 Nokia Corporation * Copyright © 2010 Movial Creative Technologies Oy * Copyright © 2013 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #ifdef HAVE_CONFIG_H #include "config.h" #endif #include #include #include #include #include #include #include /* for XDestroyImage */ #include #include #if HAVE_MIT_SHM #include #if HAVE_X11_EXTENSIONS_SHMPROTO_H #include #elif HAVE_X11_EXTENSIONS_SHMSTR_H #include #else #error Failed to find the right header for X11 MIT-SHM protocol definitions #endif #include #include #endif #include /* for pixman blt functions */ #include "test.h" static const struct format { const char *name; pixman_format_code_t pixman_format; } formats[] = { { "a8r8g8b8", PIXMAN_a8r8g8b8 }, { "x8r8g8b8", PIXMAN_x8r8g8b8 }, { "a8", PIXMAN_a8 }, { "a4", PIXMAN_a4 }, { "a1", PIXMAN_a1 }, }; static const struct op { int value; const char *name; } ops[] = { { PictOpClear, "Clear" }, { PictOpSrc, "Src" }, { PictOpDst, "Dst" }, { PictOpOver, "Over" }, { PictOpOverReverse, "OverReverse" }, { PictOpIn, "In" }, { PictOpInReverse, "InReverse" }, { PictOpOut, "Out" }, { PictOpOutReverse, "OutReverse" }, { PictOpAtop, "Atop" }, { PictOpAtopReverse, "AtopReverse" }, { PictOpXor, "Xor" }, { PictOpAdd, "Add" }, { PictOpSaturate, "Saturate" }, { PictOpMultiply, "Multiply" }, { PictOpScreen, "Screen" }, { PictOpOverlay, "Overlay" }, { PictOpDarken, "Darken" }, { PictOpLighten, "Lighten" }, { PictOpColorDodge, "Dodge" }, { PictOpColorBurn, "Burn" }, { PictOpHardLight, "HardLight" }, { PictOpSoftLight, "SoftLight" }, }; static Picture source_pixmap(struct test_display *t, struct test_target *target, int format) { XRenderColor render_color[2] = { { 0x8000, 0x8000, 0x8000, 0x8000 }, { 0xffff, 0xffff, 0xffff, 0xffff }, }; Pixmap pixmap; Picture picture; pixmap = XCreatePixmap(t->dpy, t->root, target->width, target->height, PIXMAN_FORMAT_DEPTH(formats[format].pixman_format)); picture = XRenderCreatePicture(t->dpy, pixmap, XRenderFindStandardFormat(t->dpy, format), 0, NULL); XFreePixmap(t->dpy, pixmap); XRenderFillRectangle(t->dpy, PictOpSrc, picture, &render_color[0], 0, 0, target->width, target->height/2); XRenderFillRectangle(t->dpy, PictOpSrc, picture, &render_color[1], 0, target->height/2, target->width, target->height/2); return picture; } static Picture source_a8r8g8b8(struct test_display *t, struct test_target *target) { return source_pixmap(t, target, 0); } static Picture source_x8r8g8b8(struct test_display *t, struct test_target *target) { return source_pixmap(t, target, 1); } static Picture source_a8(struct test_display *t, struct test_target *target) { return source_pixmap(t, target, 2); } static Picture source_a4(struct test_display *t, struct test_target *target) { return source_pixmap(t, target, 3); } static Picture source_a1(struct test_display *t, struct test_target *target) { return source_pixmap(t, target, 3); } static Picture source_1x1r(struct test_display *t, struct test_target *target) { XRenderColor render_color = { 0x8000, 0x8000, 0x8000, 0x8000 }; XRenderPictureAttributes pa; Pixmap pixmap; Picture picture; pa.repeat = RepeatNormal; pixmap = XCreatePixmap(t->dpy, t->root, 1, 1, 32); picture = XRenderCreatePicture(t->dpy, pixmap, XRenderFindStandardFormat(t->dpy, 0), CPRepeat, &pa); XFreePixmap(t->dpy, pixmap); XRenderFillRectangle(t->dpy, PictOpSrc, picture, &render_color, 0, 0, 1, 1); return picture; } static Picture source_solid(struct test_display *t, struct test_target *target) { XRenderColor render_color = { 0x8000, 0x8000, 0x8000, 0x8000 }; return XRenderCreateSolidFill(t->dpy, &render_color); } static Picture source_linear_horizontal(struct test_display *t, struct test_target *target) { XRenderColor colors[2] = {{0}, {0xffff, 0xffff, 0xffff, 0xffff}}; XFixed stops[2] = {0, 0xffff}; XLinearGradient gradient = { {0, 0}, {target->width << 16, 0}}; return XRenderCreateLinearGradient(t->dpy, &gradient, stops, colors, 2); } static Picture source_linear_vertical(struct test_display *t, struct test_target *target) { XRenderColor colors[2] = {{0}, {0xffff, 0xffff, 0xffff, 0xffff}}; XFixed stops[2] = {0, 0xffff}; XLinearGradient gradient = { {0, 0}, {0, target->height << 16}}; return XRenderCreateLinearGradient(t->dpy, &gradient, stops, colors, 2); } static Picture source_linear_diagonal(struct test_display *t, struct test_target *target) { XRenderColor colors[2] = {{0}, {0xffff, 0xffff, 0xffff, 0xffff}}; XFixed stops[2] = {0, 0xffff}; XLinearGradient gradient = { {0, 0}, {target->width << 16, target->height << 16}}; return XRenderCreateLinearGradient(t->dpy, &gradient, stops, colors, 2); } static Picture source_radial_concentric(struct test_display *t, struct test_target *target) { XRenderColor colors[2] = {{0}, {0xffff, 0xffff, 0xffff, 0xffff}}; XFixed stops[2] = {0, 0xffff}; XRadialGradient gradient = { { ((target->width << 16) + 1) / 2, ((target->height << 16) + 1) / 2, 0, }, { ((target->width << 16) + 1) / 2, ((target->height << 16) + 1) / 2, target->width << 15, } }; return XRenderCreateRadialGradient(t->dpy, &gradient, stops, colors, 2); } static Picture source_radial_generic(struct test_display *t, struct test_target *target) { XRenderColor colors[2] = {{0}, {0xffff, 0xffff, 0xffff, 0xffff}}; XFixed stops[2] = {0, 0xffff}; XRadialGradient gradient = { { 0, 0, target->width << 14, }, { target->width << 16, target->height << 16, target->width << 14, } }; return XRenderCreateRadialGradient(t->dpy, &gradient, stops, colors, 2); } #if HAVE_MIT_SHM static XShmSegmentInfo shmref, shmout; static void setup_shm(struct test *t) { XShmSegmentInfo shm; int size; shm.shmid = -1; if (!(t->ref.has_shm_pixmaps && t->out.has_shm_pixmaps)) return; size = t->ref.width * t->ref.height * 4; size = (size + 4095) & -4096; shm.shmid = shmget(IPC_PRIVATE, size, IPC_CREAT | 0666); if (shm.shmid == -1) return; shm.shmaddr = shmat(shm.shmid, 0, 0); if (shm.shmaddr == (char *) -1) { shmctl(shm.shmid, IPC_RMID, NULL); shm.shmid = -1; return; } shm.readOnly = False; shmref = shm; XShmAttach(t->ref.dpy, &shmref); XSync(t->ref.dpy, True); shmout = shm; XShmAttach(t->out.dpy, &shmout); XSync(t->out.dpy, True); } static Picture source_shm(struct test_display *t, struct test_target *target) { XShmSegmentInfo *shm = t->target == REF ? &shmref : &shmout; Pixmap pixmap; Picture picture; int size; if (shm->shmid == -1) return 0; pixmap = XShmCreatePixmap(t->dpy, t->root, shm->shmaddr, shm, target->width, target->height, 32); picture = XRenderCreatePicture(t->dpy, pixmap, XRenderFindStandardFormat(t->dpy, 0), 0, NULL); XFreePixmap(t->dpy, pixmap); size = target->width * target->height * 4; memset(shm->shmaddr, 0x80, size/2); memset(shm->shmaddr+size/2, 0xff, size/2); return picture; } #else static void setup_shm(struct test *t) { } static Picture source_shm(struct test_display *t, struct test_target *target) { return 0; } #endif static const struct { Picture (*create)(struct test_display *, struct test_target *); const char *name; } source[] = { { source_a8r8g8b8, "a8r8g8b8 pixmap" }, { source_x8r8g8b8, "x8r8g8b8 pixmap" }, { source_a8, "a8 pixmap" }, { source_a4, "a4 pixmap" }, { source_a1, "a1 pixmap" }, { source_1x1r, "a8r8g8b8 1x1R pixmap" }, { source_solid, "solid" }, { source_shm, "a8r8g8b8 shm" }, { source_linear_horizontal, "linear (horizontal gradient)" }, { source_linear_vertical, "linear (vertical gradient)" }, { source_linear_diagonal, "linear (diagonal gradient)" }, { source_radial_concentric, "radial (concentric)" }, { source_radial_generic, "radial (generic)" }, }; static double _bench_source(struct test_display *t, enum target target_type, int op, int src, int loops) { XRenderColor render_color = { 0x8000, 0x8000, 0x8000, 0x8000 }; struct test_target target; Picture picture; struct timespec tv; double elapsed; test_target_create_render(t, target_type, &target); XRenderFillRectangle(t->dpy, PictOpClear, target.picture, &render_color, 0, 0, target.width, target.height); picture = source[src].create(t, &target); if (picture) { test_timer_start(t, &tv); while (loops--) XRenderComposite(t->dpy, op, picture, 0, target.picture, 0, 0, 0, 0, 0, 0, target.width, target.height); elapsed = test_timer_stop(t, &tv); XRenderFreePicture(t->dpy, picture); } else elapsed = -1; test_target_destroy_render(t, &target); return elapsed; } static void bench_source(struct test *t, enum target target, int op, int src) { double out, ref; fprintf(stdout, "%28s with %s: ", source[src].name, ops[op].name); fflush(stdout); op = ops[op].value; ref = _bench_source(&t->ref, target, op, src, 1000); if (ref < 0) { fprintf(stdout, "SKIP\n"); return; } fprintf(stdout, "ref=%f, ", ref); fflush(stdout); out = _bench_source(&t->out, target, op, src, 1000); if (out < 0) { fprintf(stdout, "SKIP\n"); return; } fprintf(stdout, "out=%f\n", out); } static double _bench_mask(struct test_display *t, enum target target_type, int op, int src, int mask, int loops) { XRenderColor render_color = { 0x8000, 0x8000, 0x8000, 0x8000 }; struct test_target target; Picture ps, pm; struct timespec tv; double elapsed; test_target_create_render(t, target_type, &target); XRenderFillRectangle(t->dpy, PictOpClear, target.picture, &render_color, 0, 0, target.width, target.height); ps = source[src].create(t, &target); pm = source[mask].create(t, &target); if (ps && pm) { test_timer_start(t, &tv); while (loops--) XRenderComposite(t->dpy, op, ps, pm, target.picture, 0, 0, 0, 0, 0, 0, target.width, target.height); elapsed = test_timer_stop(t, &tv); } else elapsed = -1; if (ps) XRenderFreePicture(t->dpy, ps); if (pm) XRenderFreePicture(t->dpy, pm); test_target_destroy_render(t, &target); return elapsed; } static void bench_mask(struct test *t, enum target target, int op, int src, int mask) { double out, ref; fprintf(stdout, "%28s In %28s with %s: ", source[src].name, source[mask].name, ops[op].name); fflush(stdout); op = ops[op].value; ref = _bench_mask(&t->ref, target, op, src, mask, 1000); if (ref < 0) { fprintf(stdout, "SKIP\n"); return; } fprintf(stdout, "ref=%f, ", ref); fflush(stdout); out = _bench_mask(&t->out, target, op, src, mask, 1000); if (out < 0) { fprintf(stdout, "SKIP\n"); return; } fprintf(stdout, "out=%f\n", out); } int main(int argc, char **argv) { struct test test; unsigned op, src, mask; test_init(&test, argc, argv); setup_shm(&test); for (op = 0; op < sizeof(ops)/sizeof(ops[0]); op++) { for (src = 0; src < sizeof(source)/sizeof(source[0]); src++) bench_source(&test, ROOT, op, src); fprintf (stdout, "\n"); for (src = 0; src < sizeof(source)/sizeof(source[0]); src++) for (mask = 0; mask < sizeof(source)/sizeof(source[0]); mask++) bench_mask(&test, ROOT, op, src, mask); fprintf (stdout, "\n"); } return 0; } xf86-video-intel-2.99.917/test/render-copyarea-size.c0000664000175000017500000000511012400044327017073 00000000000000#include #include #include #include /* for XDestroyImage */ #include "test.h" #define SIZE 20000 struct draw { Pixmap a, b; Picture pa, pb; GC gc; XRenderPictFormat *format; }; static void target_init(struct test_display *t, struct draw *tt, int size) { XRenderColor color; tt->format = XRenderFindStandardFormat(t->dpy, PictStandardARGB32); tt->a = XCreatePixmap(t->dpy, DefaultRootWindow(t->dpy), size, size, tt->format->depth); tt->pa = XRenderCreatePicture(t->dpy, tt->a, tt->format, 0, NULL); color.alpha = 0xffff; color.red = 0xffff; color.green = 0; color.blue = 0; XRenderFillRectangle(t->dpy, PictOpSrc, tt->pa, &color, 0, 0, size, size); tt->b = XCreatePixmap(t->dpy, DefaultRootWindow(t->dpy), size, size, tt->format->depth); tt->pb = XRenderCreatePicture(t->dpy, tt->b, tt->format, 0, NULL); color.alpha = 0xffff; color.red = 0; color.green = 0; color.blue = 0xffff; XRenderFillRectangle(t->dpy, PictOpSrc, tt->pb, &color, 0, 0, size, size); } static void target_fini(struct test_display *t, struct draw *tt) { XRenderFreePicture(t->dpy, tt->pa); XFreePixmap(t->dpy, tt->a); XRenderFreePicture(t->dpy, tt->pb); XFreePixmap(t->dpy, tt->b); } int main(int argc, char **argv) { struct test test; struct draw out, ref; int size, i; test_init(&test, argc, argv); /* Copy back and forth betwenn two pixmaps, gradually getting larger */ for (size = 1; size <= SIZE; size = (size * 3 + 1) / 2) { target_init(&test.out, &out, size); target_init(&test.ref, &ref, size); printf("size=%d\n", size); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i); do { int sx = rand() % (2*size) - size; int sy = rand() % (2*size) - size; int dx = rand() % (2*size) - size; int dy = rand() % (2*size) - size; int w = rand() % size; int h = rand() % size; int order = rand() & 1; XRenderComposite(test.out.dpy, PictOpSrc, order ? out.pa : out.pb, 0, (!order) ? out.pa : out.pb, sx, sy, 0, 0, dx, dy, w, h); XRenderComposite(test.ref.dpy, PictOpSrc, order ? ref.pa : ref.pb, 0, (!order) ? ref.pa : ref.pb, sx, sy, 0, 0, dx, dy, w, h); } while (--reps); } test_compare(&test, out.a, out.format, ref.a, ref.format, 0, 0, size, size, ""); test_compare(&test, out.b, out.format, ref.b, ref.format, 0, 0, size, size, ""); target_fini(&test.out, &out); target_fini(&test.ref, &ref); } return 0; } xf86-video-intel-2.99.917/test/dri3.c0000664000175000017500000000667012400044327013720 00000000000000/* * Copyright (c) 2014 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * */ #include #include #include #include #include #include #include #include "dri3.h" Pixmap dri3_create_pixmap(Display *dpy, Drawable draw, int width, int height, int depth, int fd, int bpp, int stride, int size) { xcb_connection_t *c = XGetXCBConnection(dpy); if (fd >= 0) { xcb_pixmap_t pixmap = xcb_generate_id(c); xcb_dri3_pixmap_from_buffer(c, pixmap, draw, size, width, height, stride, depth, bpp, fd); return pixmap; } return 0; } int dri3_create_fd(Display *dpy, Pixmap pixmap, int *stride) { xcb_connection_t *c = XGetXCBConnection(dpy); xcb_dri3_buffer_from_pixmap_cookie_t cookie; xcb_dri3_buffer_from_pixmap_reply_t *reply; cookie = xcb_dri3_buffer_from_pixmap(c, pixmap); reply = xcb_dri3_buffer_from_pixmap_reply(c, cookie, NULL); if (!reply) return -1; if (reply->nfd != 1) return -1; *stride = reply->stride; return xcb_dri3_buffer_from_pixmap_reply_fds(c, reply)[0]; } int dri3_create_fence(Display *dpy, Pixmap pixmap, struct dri3_fence *fence) { xcb_connection_t *c = XGetXCBConnection(dpy); struct dri3_fence f; int fd; fd = xshmfence_alloc_shm(); if (fd < 0) return -1; f.addr = xshmfence_map_shm(fd); if (f.addr == NULL) { close(fd); return -1; } f.xid = xcb_generate_id(c); xcb_dri3_fence_from_fd(c, pixmap, f.xid, 0, fd); *fence = f; return 0; } void dri3_fence_sync(Display *dpy, struct dri3_fence *fence) { xcb_connection_t *c = XGetXCBConnection(dpy); xshmfence_reset(fence->addr); xcb_sync_trigger_fence(c, fence->xid); xcb_flush(c); xshmfence_await(fence->addr); } void dri3_fence_free(Display *dpy, struct dri3_fence *fence) { xcb_connection_t *c = XGetXCBConnection(dpy); xshmfence_unmap_shm(fence->addr); xcb_sync_destroy_fence(c, fence->xid); } int dri3_open__full(Display *dpy, Window root, unsigned provider) { xcb_connection_t *c = XGetXCBConnection(dpy); xcb_dri3_open_cookie_t cookie; xcb_dri3_open_reply_t *reply; cookie = xcb_dri3_open(c, root, provider); reply = xcb_dri3_open_reply(c, cookie, NULL); if (!reply) return -1; if (reply->nfd != 1) return -1; return xcb_dri3_open_reply_fds(c, reply)[0]; } int dri3_open(Display *dpy) { return dri3_open__full(dpy, RootWindow(dpy, DefaultScreen(dpy)), None); } xf86-video-intel-2.99.917/test/render-copyarea-mask.c0000664000175000017500000001031612400044327017060 00000000000000#include #include #include #include /* for XDestroyImage */ #include "test.h" static void fill_rect(struct test_display *t, Picture p, XRenderPictFormat *format, int use_window, int tx, int ty, uint8_t op, int x, int y, int w, int h, int mask_x, int mask_y, int mask_w, int mask_h, uint8_t red, uint8_t green, uint8_t blue, uint8_t alpha) { Drawable tmp; Pixmap pixmask; XRenderColor c; Picture src, mask; if (use_window) { XSetWindowAttributes attr; attr.override_redirect = 1; tmp = XCreateWindow(t->dpy, DefaultRootWindow(t->dpy), tx, ty, w, h, 0, format->depth, InputOutput, DefaultVisual(t->dpy, DefaultScreen(t->dpy)), CWOverrideRedirect, &attr); XMapWindow(t->dpy, tmp); } else tmp = XCreatePixmap(t->dpy, DefaultRootWindow(t->dpy), w, h, format->depth); pixmask = XCreatePixmap(t->dpy, DefaultRootWindow(t->dpy), w, h, 8); mask = XRenderCreatePicture(t->dpy, pixmask, XRenderFindStandardFormat(t->dpy, PictStandardA8), 0, NULL); c.red = c.green = c.blue = c.alpha = 0; XRenderFillRectangle(t->dpy, PictOpSrc, mask, &c, 0, 0, w, h); c.red = c.green = c.blue = c.alpha = 0xffff; XRenderFillRectangle(t->dpy, PictOpSrc, mask, &c, mask_x, mask_y, mask_w, mask_h); src = XRenderCreatePicture(t->dpy, tmp, format, 0, NULL); c.red = red * alpha; c.green = green * alpha; c.blue = blue * alpha; c.alpha = alpha << 8 | alpha; XRenderFillRectangle(t->dpy, PictOpSrc, src, &c, 0, 0, w, h); XRenderComposite(t->dpy, op, src, mask, p, 0, 0, 0, 0, x, y, w, h); XRenderFreePicture(t->dpy, src); if (use_window) XDestroyWindow(t->dpy, tmp); else XFreePixmap(t->dpy, tmp); XRenderFreePicture(t->dpy, mask); XFreePixmap(t->dpy, pixmask); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void rect_tests(struct test *t, int reps, int sets, enum target target, int use_window) { struct test_target out, ref; int r, s; printf("Testing area fills (%s, using %s source): ", test_target_name(target), use_window ? "window" : "pixmap"); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x, y, w, h; int mask_x, mask_y, mask_w, mask_h; int tmpx, tmpy; uint8_t red = rand(); uint8_t green = rand(); uint8_t blue = rand(); uint8_t alpha = rand(); int try = 50; do { x = rand() % (out.width - 1); y = rand() % (out.height - 1); w = 1 + rand() % (out.width - x - 1); h = 1 + rand() % (out.height - y - 1); tmpx = w == out.width ? 0 : rand() % (out.width - w); tmpy = h == out.height ? 0 : rand() % (out.height - h); } while (((tmpx+w > x && tmpx < x+w) || (tmpy+h > y && tmpy < y+h)) && --try); mask_x = (rand() % (2*w)) - w; mask_y = (rand() % (2*h)) - h; mask_w = rand() % w; mask_h = rand() % h; if (try) { fill_rect(&t->out, out.picture, out.format, use_window, tmpx, tmpy, PictOpSrc, x, y, w, h, mask_x, mask_y, mask_w, mask_h, red, green, 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xf86-video-intel-2.99.917/test/render-fill-copy.c0000664000175000017500000001517212400044327016227 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" static const uint8_t ops[] = { PictOpClear, PictOpSrc, PictOpDst, }; static void fill_rect(struct test_display *dpy, Picture p, XRenderPictFormat *format, uint8_t op, int x, int y, int w, int h, uint8_t red, uint8_t green, uint8_t blue, uint8_t alpha) { Display *d = dpy->dpy; XRenderColor render_color; Pixmap pixmap1, pixmap2; Picture tmp1, tmp2; XRenderPictureAttributes pa; GC gc; render_color.red = red * alpha; render_color.green = green * alpha; render_color.blue = blue * alpha; render_color.alpha = alpha << 8; pixmap1 = XCreatePixmap(d, dpy->root, 1, 1, format->depth); tmp1 = XRenderCreatePicture(d, pixmap1, format, 0, NULL); pixmap2 = XCreatePixmap(d, dpy->root, 1, 1, format->depth); pa.repeat = 1; tmp2 = XRenderCreatePicture(d, pixmap2, format, CPRepeat, &pa); gc = XCreateGC(d, pixmap1, 0, NULL); XRenderFillRectangle(d, PictOpSrc, tmp1, &render_color, 0, 0, 1,1); XCopyArea(d, pixmap1, pixmap2, gc, 0, 0, 1, 1, 0, 0); XRenderComposite(d, PictOpSrc, tmp2, 0, p, 0, 0, 0, 0, x, y, w,h); XFreeGC(d, gc); XRenderFreePicture(d, tmp2); XFreePixmap(d, pixmap2); XRenderFreePicture(d, tmp1); XFreePixmap(d, pixmap1); } static void pixel_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = malloc(t->out.width*t->out.height*4); struct { uint16_t x, y; } *pixels = malloc(reps*sizeof(*pixels)); int r, s; test_target_create_render(&t->out, target, &tt); printf("Testing setting of single pixels (%s): ", test_target_name(target)); fflush(stdout); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (tt.width - 1); int y = rand() % (tt.height - 1); int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; fill_rect(&t->out, tt.picture, tt.format, PictOpSrc, x, y, 1, 1, red, green, blue, alpha); pixels[r].x = x; pixels[r].y = y; cells[y*tt.width+x] = color(red, green, blue, alpha); } test_init_image(&image, &t->out.shm, tt.format, 1, 1); for (r = 0; r < reps; r++) { uint32_t result; uint32_t x = pixels[r].x; uint32_t y = pixels[r].y; XShmGetImage(t->out.dpy, tt.draw, &image, x, y, AllPlanes); result = *(uint32_t *)image.data; if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask; if (image.depth == 32) mask = 0xffffffff; else mask = (1 << image.depth) - 1; die("failed to set pixel (%d,%d) to %08x, found %08x instead\n", x, y, cells[y*tt.width+x] & mask, result & mask); } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(pixels); free(cells); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void area_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = calloc(sizeof(uint32_t), t->out.width*t->out.height); int r, s, x, y; printf("Testing area sets (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &tt); clear(&t->out, &tt); test_init_image(&image, &t->out.shm, tt.format, tt.width, tt.height); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int w = rand() % tt.width; int h = rand() % tt.height; int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; x = rand() % (2*tt.width) - tt.width; y = rand() % (2*tt.height) - tt.height; fill_rect(&t->out, tt.picture, tt.format, PictOpSrc, x, y, w, h, red, green, blue, alpha); if (x < 0) w += x, x = 0; if (y < 0) h += y, y = 0; if (x >= tt.width || y >= tt.height) continue; if (x + w > tt.width) w = tt.width - x; if (y + h > tt.height) h = tt.height - y; if (w <= 0 || h <= 0) continue; pixman_fill(cells, tt.width, 32, x, y, w, h, color(red, green, blue, alpha)); } XShmGetImage(t->out.dpy, tt.draw, &image, 0, 0, AllPlanes); for (y = 0; y < tt.height; y++) { for (x = 0; x < tt.width; x++) { uint32_t result = *(uint32_t *)(image.data + y*image.bytes_per_line + image.bits_per_pixel*x/8); if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask; if (image.depth == 32) mask = 0xffffffff; else mask = (1 << image.depth) - 1; die("failed to set pixel (%d,%d) to %08x, found %08x instead\n", x, y, cells[y*tt.width+x] & mask, result & mask); } } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(cells); } static void rect_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing area fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % out.width; int h = rand() % out.height; int op = ops[rand() % sizeof(ops)]; int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; fill_rect(&t->out, out.picture, out.format, op, x, y, w, h, red, green, blue, alpha); fill_rect(&t->ref, ref.picture, ref.format, op, x, y, w, h, red, green, blue, alpha); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { pixel_tests(&test, reps, sets, t); area_tests(&test, reps, sets, t); rect_tests(&test, reps, sets, t); } } return 0; } xf86-video-intel-2.99.917/test/render-composite-solid-mask.c0000664000175000017500000000602612400044327020372 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" static const uint8_t ops[] = { PictOpClear, PictOpSrc, PictOpDst, }; static void fill_rect(struct test_display *dpy, Picture p, uint8_t op, int x, int y, int w, int h, uint8_t s_red, uint8_t s_green, uint8_t s_blue, uint8_t s_alpha, uint8_t m_red, uint8_t m_green, uint8_t m_blue, uint8_t m_alpha) { XRenderColor render_color; Picture source, mask; render_color.red = s_red * s_alpha; render_color.green = s_green * s_alpha; render_color.blue = s_blue * s_alpha; render_color.alpha = s_alpha << 8 | s_alpha; source = XRenderCreateSolidFill(dpy->dpy, &render_color); render_color.red = m_red * m_alpha; render_color.green = m_green * m_alpha; render_color.blue = m_blue * m_alpha; render_color.alpha = m_alpha << 8 | m_alpha; mask = XRenderCreateSolidFill(dpy->dpy, &render_color); XRenderComposite(dpy->dpy, op, source, mask, p, 0, 0, 0, 0, x, y, w,h); XRenderFreePicture(dpy->dpy, mask); XRenderFreePicture(dpy->dpy, source); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void ref_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing area fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % out.width; int h = rand() % out.height; int op = ops[rand() % sizeof(ops)]; int s_red = rand() % 0xff; int s_green = rand() % 0xff; int s_blue = rand() % 0xff; int s_alpha = rand() % 0xff; int m_red = rand() % 0xff; int m_green = rand() % 0xff; int m_blue = rand() % 0xff; int m_alpha = rand() % 0xff; fill_rect(&t->out, out.picture, op, x, y, w, h, s_red, s_green, s_blue, s_alpha, m_red, m_green, m_blue, m_alpha); fill_rect(&t->ref, ref.picture, op, x, y, w, h, s_red, s_green, s_blue, s_alpha, m_red, m_green, m_blue, m_alpha); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) ref_tests(&test, reps, sets, t); } return 0; } xf86-video-intel-2.99.917/test/DrawSegments.c0000664000175000017500000001146512432737457015502 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" static const XPoint points[]= { /* top */ { 0, 0}, { 1, 0}, { 2, 0}, { 3, 0}, { 4, 0}, { 5, 0}, { 6, 0}, { 7, 0}, { 8, 0}, /* right */ { 8, 1}, { 8, 2}, { 8, 3}, { 8, 4}, { 8, 5}, { 8, 6}, { 8, 7}, { 8, 8}, /* bottom */ { 7, 8}, { 6, 8}, { 5, 8}, { 4, 8}, { 3, 8}, { 2, 8}, { 1, 8}, { 0, 8}, /* left */ { 0, 7}, { 0, 6}, { 0, 5}, { 0, 4}, { 0, 3}, { 0, 2}, { 0, 1}, { 0, 0} /* and origin again for luck */ }; #define NUM_POINTS (sizeof(points)/sizeof(points[0])) static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void draw(struct test_display *dpy, struct test_target *tt, int alu, int width, int style, int cap, XSegment *seg, int nseg) { XGCValues val; GC gc; val.function = alu; val.foreground = WhitePixel(dpy->dpy, 0); val.line_width = width; val.line_style = style; val.cap_style = cap; gc = XCreateGC(dpy->dpy, tt->draw, GCForeground | GCFunction | GCLineWidth | GCLineStyle | GCCapStyle, &val); XDrawSegments(dpy->dpy, tt->draw, gc, seg, nseg); XFreeGC(dpy->dpy, gc); } static void hv0(struct test *t, enum target target) { char buf[1024]; struct test_target out, ref; int a, alu, cap; XSegment seg[(NUM_POINTS+1)*8]; int n, x, y, nseg; printf("Testing drawing of zero-width line segments (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); test_target_create_render(&t->ref, target, &ref); y = x = n = 0; for (a = 0; a <= NUM_POINTS; a++) { seg[n].x1 = a + 64; seg[n].y1 = y + 64; seg[n].x2 = NUM_POINTS + 64; seg[n].y2 = y + 64; n++; y++; seg[n].x1 = NUM_POINTS - a + 64; seg[n].y1 = y + 64; seg[n].x2 = 0 + 64; seg[n].y2 = y + 64; n++; y++; seg[n].x2 = a + 64; seg[n].y2 = y + 64; seg[n].x1 = NUM_POINTS + 64; seg[n].y1 = y + 64; n++; y++; seg[n].x2 = NUM_POINTS - a + 64; seg[n].y2 = y + 64; seg[n].x1 = 0 + 64; seg[n].y1 = y + 64; n++; y++; seg[n].y1 = a + 64; seg[n].x1 = x + 64; seg[n].y2 = NUM_POINTS + 64; seg[n].x2 = x + 64; n++; x++; seg[n].y1 = NUM_POINTS - a + 64; seg[n].x1 = x + 64; seg[n].y2 = 0 + 64; seg[n].x2 = x + 64; n++; x++; seg[n].y2 = a + 64; seg[n].x2 = x + 64; seg[n].y1 = NUM_POINTS + 64; seg[n].x1 = x + 64; n++; x++; seg[n].y2 = NUM_POINTS - a + 64; seg[n].x2 = x + 64; seg[n].y1 = 0 + 64; seg[n].x1 = x + 64; n++; x++; } for (alu = 0; alu < 16; alu++) { for (cap = CapNotLast; cap <= CapProjecting; cap++) { for (nseg = 0; nseg < n; nseg++) { sprintf(buf, "cap=%d, alu=%d, nseg=%d", cap, alu, nseg); clear(&t->out, &out); clear(&t->ref, &ref); draw(&t->out, &out, alu, 0, LineSolid, cap, seg, nseg); draw(&t->ref, &ref, alu, 0, LineSolid, cap, seg, nseg); test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, buf); } } } test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); printf("\n"); } static void general(struct test *t, enum target target) { char buf[1024]; struct test_target out, ref; int a, b, alu, lw, style, cap; XSegment seg[NUM_POINTS*NUM_POINTS]; int n = 0; printf("Testing drawing of general line segments (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); test_target_create_render(&t->ref, target, &ref); style = LineSolid; for (a = 0; a < NUM_POINTS; a++) { for (b = 0; b < NUM_POINTS; b++) { seg[n].x1 = points[a].x + 64; seg[n].y1 = points[a].y + 64; seg[n].x2 = points[b].x + 64; seg[n].y2 = points[b].y + 64; n++; } } for (alu = 0; alu < 16; alu++) { for (cap = CapNotLast; cap <= CapProjecting; cap++) { for (lw = 0; lw <= 4; lw++) { sprintf(buf, "width=%d, cap=%d, alu=%d", lw, cap, alu); clear(&t->out, &out); clear(&t->ref, &ref); draw(&t->out, &out, alu, lw, style, cap, seg, n); draw(&t->ref, &ref, alu, lw, style, cap, seg, n); test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, buf); } } } test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); printf("\n"); } int main(int argc, char **argv) { struct test test; enum target t; test_init(&test, argc, argv); for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { hv0(&test, t); general(&test, t); } return 0; } xf86-video-intel-2.99.917/test/dri2-swap.c0000664000175000017500000000762712400044327014672 00000000000000#include #include #include #include #include #include #include #include #include #include #include #include #include "dri2.h" #define COUNT 60 static int dri2_open(Display *dpy) { drm_auth_t auth; char *driver, *device; int fd; if (!DRI2Connect(dpy, DefaultRootWindow(dpy), &driver, &device)) return -1; printf ("Connecting to %s driver on %s\n", driver, device); fd = open(device, O_RDWR); if (fd < 0) return -1; if (drmIoctl(fd, DRM_IOCTL_GET_MAGIC, &auth)) return -1; if (!DRI2Authenticate(dpy, DefaultRootWindow(dpy), auth.magic)) return -1; return fd; } static void dri2_copy_swap(Display *dpy, Drawable d, int width, int height, int has_front) { XRectangle rect; XserverRegion region; rect.x = 0; rect.y = 0; rect.width = width; rect.height = height; region = XFixesCreateRegion(dpy, &rect, 1); DRI2CopyRegion(dpy, d, region, DRI2BufferFrontLeft, DRI2BufferBackLeft); if (has_front) DRI2CopyRegion(dpy, d, region, DRI2BufferFakeFrontLeft, DRI2BufferFrontLeft); XFixesDestroyRegion(dpy, region); } static void xsync(Display *dpy, Window win) { XImage *image; image = XGetImage(dpy, win, 0, 0, 1, 1, ~0, ZPixmap); if (image) XDestroyImage(image); } static double elapsed(const struct timespec *start, const struct timespec *end) { return (end->tv_sec - start->tv_sec) + 1e-9*(end->tv_nsec - start->tv_nsec); } static void run(Display *dpy, int width, int height, unsigned int *attachments, int nattachments, const char *name) { Window win; XSetWindowAttributes attr; int count; DRI2Buffer *buffers; struct timespec start, end; /* Be nasty and install a fullscreen window on top so that we * can guarantee we do not get clipped by children. */ attr.override_redirect = 1; win = XCreateWindow(dpy, DefaultRootWindow(dpy), 0, 0, width, height, 0, DefaultDepth(dpy, DefaultScreen(dpy)), InputOutput, DefaultVisual(dpy, DefaultScreen(dpy)), CWOverrideRedirect, &attr); XMapWindow(dpy, win); xsync(dpy, win); DRI2CreateDrawable(dpy, win); buffers = DRI2GetBuffers(dpy, win, &width, &height, attachments, nattachments, &count); if (count != nattachments) return; xsync(dpy, win); clock_gettime(CLOCK_MONOTONIC, &start); for (count = 0; count < COUNT; count++) DRI2SwapBuffers(dpy, win, 0, 0, 0); xsync(dpy, win); clock_gettime(CLOCK_MONOTONIC, &end); printf("%d %s (%dx%d) swaps in %fs.\n", count, name, width, height, elapsed(&start, &end)); xsync(dpy, win); clock_gettime(CLOCK_MONOTONIC, &start); for (count = 0; count < COUNT; count++) dri2_copy_swap(dpy, win, width, height, nattachments == 2); xsync(dpy, win); clock_gettime(CLOCK_MONOTONIC, &end); printf("%d %s (%dx%d) blits in %fs.\n", count, name, width, height, elapsed(&start, &end)); DRI2SwapInterval(dpy, win, 0); xsync(dpy, win); clock_gettime(CLOCK_MONOTONIC, &start); for (count = 0; count < COUNT; count++) DRI2SwapBuffers(dpy, win, 0, 0, 0); xsync(dpy, win); clock_gettime(CLOCK_MONOTONIC, &end); printf("%d %s (%dx%d) vblank=0 swaps in %fs.\n", count, name, width, height, elapsed(&start, &end)); XDestroyWindow(dpy, win); free(buffers); XSync(dpy, 1); } int main(void) { Display *dpy; int width, height, fd; unsigned int attachments[] = { DRI2BufferBackLeft, DRI2BufferFrontLeft, }; dpy = XOpenDisplay (NULL); if (dpy == NULL) return 77; fd = dri2_open(dpy); if (fd < 0) return 1; width = WidthOfScreen(DefaultScreenOfDisplay(dpy)); height = HeightOfScreen(DefaultScreenOfDisplay(dpy)); run(dpy, width, height, attachments, 1, "fullscreen"); run(dpy, width, height, attachments, 2, "fullscreen (with front)"); width /= 2; height /= 2; run(dpy, width, height, attachments, 1, "windowed"); run(dpy, width, height, attachments, 2, "windowed (with front)"); return 0; } xf86-video-intel-2.99.917/test/test_display.c0000664000175000017500000000741112400044327015555 00000000000000#include #include #include #include #include #include #include "test.h" static Window get_root(struct test_display *t) { XSetWindowAttributes attr; Window w; /* Be nasty and install a fullscreen window on top so that we * can guarantee we do not get clipped by children. */ attr.override_redirect = 1; w = XCreateWindow(t->dpy, DefaultRootWindow(t->dpy), 0, 0, t->width, t->height, 0, DefaultDepth(t->dpy, DefaultScreen(t->dpy)), InputOutput, DefaultVisual(t->dpy, DefaultScreen(t->dpy)), CWOverrideRedirect, &attr); XMapWindow(t->dpy, w); return w; } static Display *out_display(int argc, char **argv) { Display *dpy; const char *name = NULL; int i; for (i = 0; i < argc; i++) { if (strncmp(argv[i], "-d", 2) == 0) { if (argv[i][2] == '\0') { if (i+1 < argc) { name = argv[i+1]; i++; } } else name = argv[i] + 2; } } if (name == NULL) name = getenv("DISPLAY"); if (name == NULL) name = ":0"; /* useful default */ dpy = XOpenDisplay(name); if (dpy == NULL) die("unable to open out display %s\n", name); printf("Opened connection to %s for testing.\n", name); return dpy; } static Display *ref_display(int width, int height, int depth) { Display *dpy; char buf[160]; const char *name; int try; name = getenv("REF_DISPLAY"); if (name) { dpy = XOpenDisplay(name); if (dpy == NULL) die("unable to open reference display %s\n", name); printf("Opened connection to %s for reference.\n", name); return dpy; } snprintf(buf, sizeof(buf), "Xvfb -ac -terminate -screen 0 %dx%dx%d :99 >/dev/null 2>&1 &", width, height, depth); if (system(buf)) die("unable to spawn '%s' for reference display\n", buf); try = 0; while (try++ < 1000) { dpy = XOpenDisplay(":99"); if (dpy) break; usleep(1000); } if (dpy == NULL) die("unable to open reference display\n"); return dpy; } static void shm_setup(struct test_display *d) { int major, minor; int size; XShmQueryVersion(d->dpy, &major, &minor, &d->has_shm_pixmaps); if (major == 0 && minor == 0) die("XSHM not supported\n"); size = d->width * d->height * 4; d->max_shm_size = size; d->shm.shmid = shmget(IPC_PRIVATE, size, IPC_CREAT | 0600); if (d->shm.shmid == -1) die("failed to allocated %d bytes for a shm segment\n", size); d->shm.shmaddr = shmat(d->shm.shmid, NULL, 0); d->shm.readOnly = 0; XShmAttach(d->dpy, &d->shm); XSync(d->dpy, 1); } static void default_setup(struct test_display *dpy) { dpy->width = WidthOfScreen(DefaultScreenOfDisplay(dpy->dpy)); dpy->height = HeightOfScreen(DefaultScreenOfDisplay(dpy->dpy)); dpy->format = XRenderFindVisualFormat(dpy->dpy, DefaultVisual(dpy->dpy, DefaultScreen(dpy->dpy))); dpy->depth = DefaultDepth(dpy->dpy, DefaultScreen(dpy->dpy)); } static void test_get_displays(int argc, char **argv, struct test_display *out, struct test_display *ref) { out->dpy = out_display(argc, argv); default_setup(out); shm_setup(out); out->root = get_root(out); out->target = OUT; ref->dpy = ref_display(out->width, out->height, out->depth); default_setup(ref); shm_setup(ref); ref->root = get_root(ref); ref->target = REF; } void test_init(struct test *test, int argc, char **argv) { memset(test, 0, sizeof(*test)); test_get_displays(argc, argv, &test->out, &test->ref); } void test_timer_start(struct test_display *t, struct timespec *tv) { clock_gettime(CLOCK_MONOTONIC, tv); } double test_timer_stop(struct test_display *t, struct timespec *tv) { XImage *image; struct timespec now; image = XGetImage(t->dpy, t->root, 0, 0, 1, 1, AllPlanes, ZPixmap); clock_gettime(CLOCK_MONOTONIC, &now); XDestroyImage(image); return (now.tv_sec - tv->tv_sec) + 1e-9*(now.tv_nsec - tv->tv_nsec); } xf86-video-intel-2.99.917/test/basic-copyarea-size.c0000664000175000017500000000442012400044327016700 00000000000000#include #include #include #include /* for XDestroyImage */ #include "test.h" #define SIZE 20000 struct draw { Pixmap a, b; GC gc; XRenderPictFormat *format; }; static void target_init(struct test_display *t, struct draw *tt, int size) { XGCValues val; tt->a = XCreatePixmap(t->dpy, DefaultRootWindow(t->dpy), size, size, 32); tt->b = XCreatePixmap(t->dpy, DefaultRootWindow(t->dpy), size, size, 32); val.graphics_exposures = 0; tt->gc = XCreateGC(t->dpy, tt->a, GCGraphicsExposures, &val); tt->format = XRenderFindStandardFormat(t->dpy, PictStandardARGB32); val.foreground = 0xffff0000; XChangeGC(t->dpy, tt->gc, GCForeground, &val); XFillRectangle(t->dpy, tt->a, tt->gc, 0, 0, size, size); val.foreground = 0xff0000ff; XChangeGC(t->dpy, tt->gc, GCForeground, &val); XFillRectangle(t->dpy, tt->b, tt->gc, 0, 0, size, size); } static void target_fini(struct test_display *t, struct draw *tt) { XFreePixmap(t->dpy, tt->a); XFreePixmap(t->dpy, tt->b); } int main(int argc, char **argv) { struct test test; struct draw out, ref; int size, i; test_init(&test, argc, argv); /* Copy back and forth betwenn two pixmaps, gradually getting larger */ for (size = 1; size <= SIZE; size = (size * 3 + 1) / 2) { target_init(&test.out, &out, size); target_init(&test.ref, &ref, size); printf("size=%d\n", size); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i); do { int sx = rand() % (2*size) - size; int sy = rand() % (2*size) - size; int dx = rand() % (2*size) - size; int dy = rand() % (2*size) - size; int order = rand() & 1; XCopyArea(test.out.dpy, order ? out.a : out.b, (!order) ? out.a : out.b, out.gc, sx, sy, size, size, dx, dy); XCopyArea(test.ref.dpy, order ? ref.a : ref.b, (!order) ? ref.a : ref.b, ref.gc, sx, sy, size, size, dx, dy); } while (--reps); } test_compare(&test, out.a, out.format, ref.a, ref.format, 0, 0, size, size, ""); test_compare(&test, out.b, out.format, ref.b, ref.format, 0, 0, size, size, ""); target_fini(&test.out, &out); target_fini(&test.ref, &ref); } return 0; } xf86-video-intel-2.99.917/test/render-composite-solid.c0000664000175000017500000001406712400044327017445 00000000000000#include #include #include #include /* for XDestroyImage */ #include /* for pixman blt functions */ #include "test.h" static const uint8_t ops[] = { PictOpClear, PictOpSrc, PictOpDst, }; static void fill_rect(struct test_display *dpy, Picture p, uint8_t op, int x, int y, int w, int h, uint8_t red, uint8_t green, uint8_t blue, uint8_t alpha) { XRenderColor render_color; Picture solid; render_color.red = red * alpha; render_color.green = green * alpha; render_color.blue = blue * alpha; render_color.alpha = alpha << 8 | alpha; solid = XRenderCreateSolidFill(dpy->dpy, &render_color); XRenderComposite(dpy->dpy, op, solid, 0, p, 0, 0, 0, 0, x, y, w,h); XRenderFreePicture(dpy->dpy, solid); } static void pixel_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = malloc(t->out.width*t->out.height*4); struct { uint16_t x, y; } *pixels = malloc(reps*sizeof(*pixels)); int r, s; test_target_create_render(&t->out, target, &tt); printf("Testing setting of single pixels (%s): ", test_target_name(target)); fflush(stdout); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (tt.width - 1); int y = rand() % (tt.height - 1); int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; fill_rect(&t->out, tt.picture, PictOpSrc, x, y, 1, 1, red, green, blue, alpha); pixels[r].x = x; pixels[r].y = y; cells[y*tt.width+x] = color(red, green, blue, alpha); } test_init_image(&image, &t->out.shm, tt.format, 1, 1); for (r = 0; r < reps; r++) { uint32_t result; uint32_t x = pixels[r].x; uint32_t y = pixels[r].y; XShmGetImage(t->out.dpy, tt.draw, &image, x, y, AllPlanes); result = *(uint32_t *)image.data; if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask; if (image.depth == 32) mask = 0xffffffff; else mask = (1 << image.depth) - 1; die("failed to set pixel (%d,%d) to %08x[%08x], found %08x instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask); } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(pixels); free(cells); } static void clear(struct test_display *dpy, struct test_target *tt) { XRenderColor render_color = {0}; XRenderFillRectangle(dpy->dpy, PictOpClear, tt->picture, &render_color, 0, 0, tt->width, tt->height); } static void area_tests(struct test *t, int reps, int sets, enum target target) { struct test_target tt; XImage image; uint32_t *cells = calloc(sizeof(uint32_t), t->out.width*t->out.height); int r, s, x, y; printf("Testing area sets (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &tt); clear(&t->out, &tt); test_init_image(&image, &t->out.shm, tt.format, tt.width, tt.height); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int w = rand() % tt.width; int h = rand() % tt.height; int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; x = rand() % (2*tt.width) - tt.width; y = rand() % (2*tt.height) - tt.height; fill_rect(&t->out, tt.picture, PictOpSrc, x, y, w, h, red, green, blue, alpha); if (x < 0) w += x, x = 0; if (y < 0) h += y, y = 0; if (x >= tt.width || y >= tt.height) continue; if (x + w > tt.width) w = tt.width - x; if (y + h > tt.height) h = tt.height - y; if (w <= 0 || h <= 0) continue; pixman_fill(cells, tt.width, 32, x, y, w, h, color(red, green, blue, alpha)); } XShmGetImage(t->out.dpy, tt.draw, &image, 0, 0, AllPlanes); for (y = 0; y < tt.height; y++) { for (x = 0; x < tt.width; x++) { uint32_t result = *(uint32_t *)(image.data + y*image.bytes_per_line + image.bits_per_pixel*x/8); if (!pixel_equal(image.depth, result, cells[y*tt.width+x])) { uint32_t mask; if (image.depth == 32) mask = 0xffffffff; else mask = (1 << image.depth) - 1; die("failed to set pixel (%d,%d) to %08x[%08x], found %08x instead\n", x, y, cells[y*tt.width+x] & mask, cells[y*tt.width+x], result & mask); } } } } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &tt); free(cells); } static void rect_tests(struct test *t, int reps, int sets, enum target target) { struct test_target out, ref; int r, s; printf("Testing area fills (%s): ", test_target_name(target)); fflush(stdout); test_target_create_render(&t->out, target, &out); clear(&t->out, &out); test_target_create_render(&t->ref, target, &ref); clear(&t->ref, &ref); for (s = 0; s < sets; s++) { for (r = 0; r < reps; r++) { int x = rand() % (2*out.width) - out.width; int y = rand() % (2*out.height) - out.height; int w = rand() % out.width; int h = rand() % out.height; int op = ops[rand() % sizeof(ops)]; int red = rand() % 0xff; int green = rand() % 0xff; int blue = rand() % 0xff; int alpha = rand() % 0xff; fill_rect(&t->out, out.picture, op, x, y, w, h, red, green, blue, alpha); fill_rect(&t->ref, ref.picture, op, x, y, w, h, red, green, blue, alpha); } test_compare(t, out.draw, out.format, ref.draw, ref.format, 0, 0, out.width, out.height, ""); } printf("passed [%d iterations x %d]\n", reps, sets); test_target_destroy_render(&t->out, &out); test_target_destroy_render(&t->ref, &ref); } int main(int argc, char **argv) { struct test test; int i; test_init(&test, argc, argv); for (i = 0; i <= DEFAULT_ITERATIONS; i++) { int reps = REPS(i), sets = SETS(i); enum target t; for (t = TARGET_FIRST; t <= TARGET_LAST; t++) { pixel_tests(&test, reps, sets, t); area_tests(&test, reps, sets, t); rect_tests(&test, reps, sets, t); } } return 0; } xf86-video-intel-2.99.917/m4/0000775000175000017500000000000012445556130012334 500000000000000xf86-video-intel-2.99.917/m4/ltoptions.m40000644000175000017500000003007312363743034014552 00000000000000# Helper functions for option handling. -*- Autoconf -*- # # Copyright (C) 2004, 2005, 2007, 2008, 2009 Free Software Foundation, # Inc. # Written by Gary V. Vaughan, 2004 # # This file is free software; the Free Software Foundation gives # unlimited permission to copy and/or distribute it, with or without # modifications, as long as this notice is preserved. # serial 7 ltoptions.m4 # This is to help aclocal find these macros, as it can't see m4_define. AC_DEFUN([LTOPTIONS_VERSION], [m4_if([1])]) # _LT_MANGLE_OPTION(MACRO-NAME, OPTION-NAME) # ------------------------------------------ m4_define([_LT_MANGLE_OPTION], [[_LT_OPTION_]m4_bpatsubst($1__$2, [[^a-zA-Z0-9_]], [_])]) # _LT_SET_OPTION(MACRO-NAME, OPTION-NAME) # --------------------------------------- # Set option OPTION-NAME for macro MACRO-NAME, and if there is a # matching handler defined, dispatch to it. Other OPTION-NAMEs are # saved as a flag. m4_define([_LT_SET_OPTION], [m4_define(_LT_MANGLE_OPTION([$1], [$2]))dnl m4_ifdef(_LT_MANGLE_DEFUN([$1], [$2]), _LT_MANGLE_DEFUN([$1], [$2]), [m4_warning([Unknown $1 option `$2'])])[]dnl ]) # _LT_IF_OPTION(MACRO-NAME, OPTION-NAME, IF-SET, [IF-NOT-SET]) # ------------------------------------------------------------ # Execute IF-SET if OPTION is set, IF-NOT-SET otherwise. m4_define([_LT_IF_OPTION], [m4_ifdef(_LT_MANGLE_OPTION([$1], [$2]), [$3], [$4])]) # _LT_UNLESS_OPTIONS(MACRO-NAME, OPTION-LIST, IF-NOT-SET) # ------------------------------------------------------- # Execute IF-NOT-SET unless all options in OPTION-LIST for MACRO-NAME # are set. m4_define([_LT_UNLESS_OPTIONS], [m4_foreach([_LT_Option], m4_split(m4_normalize([$2])), [m4_ifdef(_LT_MANGLE_OPTION([$1], _LT_Option), [m4_define([$0_found])])])[]dnl m4_ifdef([$0_found], [m4_undefine([$0_found])], [$3 ])[]dnl ]) # _LT_SET_OPTIONS(MACRO-NAME, OPTION-LIST) # ---------------------------------------- # OPTION-LIST is a space-separated list of Libtool options associated # with MACRO-NAME. If any OPTION has a matching handler declared with # LT_OPTION_DEFINE, dispatch to that macro; otherwise complain about # the unknown option and exit. m4_defun([_LT_SET_OPTIONS], [# Set options m4_foreach([_LT_Option], m4_split(m4_normalize([$2])), [_LT_SET_OPTION([$1], _LT_Option)]) m4_if([$1],[LT_INIT],[ dnl dnl Simply set some default values (i.e off) if boolean options were not dnl specified: _LT_UNLESS_OPTIONS([LT_INIT], [dlopen], [enable_dlopen=no ]) _LT_UNLESS_OPTIONS([LT_INIT], [win32-dll], [enable_win32_dll=no ]) dnl dnl If no reference was made to various pairs of opposing options, then dnl we run the default mode handler for the pair. For example, if neither dnl `shared' nor `disable-shared' was passed, we enable building of shared dnl archives by default: _LT_UNLESS_OPTIONS([LT_INIT], [shared disable-shared], [_LT_ENABLE_SHARED]) _LT_UNLESS_OPTIONS([LT_INIT], [static disable-static], [_LT_ENABLE_STATIC]) _LT_UNLESS_OPTIONS([LT_INIT], [pic-only no-pic], [_LT_WITH_PIC]) _LT_UNLESS_OPTIONS([LT_INIT], [fast-install disable-fast-install], [_LT_ENABLE_FAST_INSTALL]) ]) ])# _LT_SET_OPTIONS ## --------------------------------- ## ## Macros to handle LT_INIT options. ## ## --------------------------------- ## # _LT_MANGLE_DEFUN(MACRO-NAME, OPTION-NAME) # ----------------------------------------- m4_define([_LT_MANGLE_DEFUN], [[_LT_OPTION_DEFUN_]m4_bpatsubst(m4_toupper([$1__$2]), [[^A-Z0-9_]], [_])]) # LT_OPTION_DEFINE(MACRO-NAME, OPTION-NAME, CODE) # ----------------------------------------------- m4_define([LT_OPTION_DEFINE], [m4_define(_LT_MANGLE_DEFUN([$1], [$2]), [$3])[]dnl ])# LT_OPTION_DEFINE # dlopen # ------ LT_OPTION_DEFINE([LT_INIT], [dlopen], [enable_dlopen=yes ]) AU_DEFUN([AC_LIBTOOL_DLOPEN], [_LT_SET_OPTION([LT_INIT], [dlopen]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the `dlopen' option into LT_INIT's first parameter.]) ]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_DLOPEN], []) # win32-dll # --------- # Declare package support for building win32 dll's. LT_OPTION_DEFINE([LT_INIT], [win32-dll], [enable_win32_dll=yes case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-cegcc*) AC_CHECK_TOOL(AS, as, false) AC_CHECK_TOOL(DLLTOOL, dlltool, false) AC_CHECK_TOOL(OBJDUMP, objdump, false) ;; esac test -z "$AS" && AS=as _LT_DECL([], [AS], [1], [Assembler program])dnl test -z "$DLLTOOL" && DLLTOOL=dlltool _LT_DECL([], [DLLTOOL], [1], [DLL creation program])dnl test -z "$OBJDUMP" && OBJDUMP=objdump _LT_DECL([], [OBJDUMP], [1], [Object dumper program])dnl ])# win32-dll AU_DEFUN([AC_LIBTOOL_WIN32_DLL], [AC_REQUIRE([AC_CANONICAL_HOST])dnl _LT_SET_OPTION([LT_INIT], [win32-dll]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the `win32-dll' option into LT_INIT's first parameter.]) ]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_WIN32_DLL], []) # _LT_ENABLE_SHARED([DEFAULT]) # ---------------------------- # implement the --enable-shared flag, and supports the `shared' and # `disable-shared' LT_INIT options. # DEFAULT is either `yes' or `no'. If omitted, it defaults to `yes'. m4_define([_LT_ENABLE_SHARED], [m4_define([_LT_ENABLE_SHARED_DEFAULT], [m4_if($1, no, no, yes)])dnl AC_ARG_ENABLE([shared], [AS_HELP_STRING([--enable-shared@<:@=PKGS@:>@], [build shared libraries @<:@default=]_LT_ENABLE_SHARED_DEFAULT[@:>@])], [p=${PACKAGE-default} case $enableval in yes) enable_shared=yes ;; no) enable_shared=no ;; *) enable_shared=no # Look at the argument we got. We use all the common list separators. lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," for pkg in $enableval; do IFS="$lt_save_ifs" if test "X$pkg" = "X$p"; then enable_shared=yes fi done IFS="$lt_save_ifs" ;; esac], [enable_shared=]_LT_ENABLE_SHARED_DEFAULT) _LT_DECL([build_libtool_libs], [enable_shared], [0], [Whether or not to build shared libraries]) ])# _LT_ENABLE_SHARED LT_OPTION_DEFINE([LT_INIT], [shared], [_LT_ENABLE_SHARED([yes])]) LT_OPTION_DEFINE([LT_INIT], [disable-shared], [_LT_ENABLE_SHARED([no])]) # Old names: AC_DEFUN([AC_ENABLE_SHARED], [_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[shared]) ]) AC_DEFUN([AC_DISABLE_SHARED], [_LT_SET_OPTION([LT_INIT], [disable-shared]) ]) AU_DEFUN([AM_ENABLE_SHARED], [AC_ENABLE_SHARED($@)]) AU_DEFUN([AM_DISABLE_SHARED], [AC_DISABLE_SHARED($@)]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AM_ENABLE_SHARED], []) dnl AC_DEFUN([AM_DISABLE_SHARED], []) # _LT_ENABLE_STATIC([DEFAULT]) # ---------------------------- # implement the --enable-static flag, and support the `static' and # `disable-static' LT_INIT options. # DEFAULT is either `yes' or `no'. If omitted, it defaults to `yes'. m4_define([_LT_ENABLE_STATIC], [m4_define([_LT_ENABLE_STATIC_DEFAULT], [m4_if($1, no, no, yes)])dnl AC_ARG_ENABLE([static], [AS_HELP_STRING([--enable-static@<:@=PKGS@:>@], [build static libraries @<:@default=]_LT_ENABLE_STATIC_DEFAULT[@:>@])], [p=${PACKAGE-default} case $enableval in yes) enable_static=yes ;; no) enable_static=no ;; *) enable_static=no # Look at the argument we got. We use all the common list separators. lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," for pkg in $enableval; do IFS="$lt_save_ifs" if test "X$pkg" = "X$p"; then enable_static=yes fi done IFS="$lt_save_ifs" ;; esac], [enable_static=]_LT_ENABLE_STATIC_DEFAULT) _LT_DECL([build_old_libs], [enable_static], [0], [Whether or not to build static libraries]) ])# _LT_ENABLE_STATIC LT_OPTION_DEFINE([LT_INIT], [static], [_LT_ENABLE_STATIC([yes])]) LT_OPTION_DEFINE([LT_INIT], [disable-static], [_LT_ENABLE_STATIC([no])]) # Old names: AC_DEFUN([AC_ENABLE_STATIC], [_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[static]) ]) AC_DEFUN([AC_DISABLE_STATIC], [_LT_SET_OPTION([LT_INIT], [disable-static]) ]) AU_DEFUN([AM_ENABLE_STATIC], [AC_ENABLE_STATIC($@)]) AU_DEFUN([AM_DISABLE_STATIC], [AC_DISABLE_STATIC($@)]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AM_ENABLE_STATIC], []) dnl AC_DEFUN([AM_DISABLE_STATIC], []) # _LT_ENABLE_FAST_INSTALL([DEFAULT]) # ---------------------------------- # implement the --enable-fast-install flag, and support the `fast-install' # and `disable-fast-install' LT_INIT options. # DEFAULT is either `yes' or `no'. If omitted, it defaults to `yes'. m4_define([_LT_ENABLE_FAST_INSTALL], [m4_define([_LT_ENABLE_FAST_INSTALL_DEFAULT], [m4_if($1, no, no, yes)])dnl AC_ARG_ENABLE([fast-install], [AS_HELP_STRING([--enable-fast-install@<:@=PKGS@:>@], [optimize for fast installation @<:@default=]_LT_ENABLE_FAST_INSTALL_DEFAULT[@:>@])], [p=${PACKAGE-default} case $enableval in yes) enable_fast_install=yes ;; no) enable_fast_install=no ;; *) enable_fast_install=no # Look at the argument we got. We use all the common list separators. lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," for pkg in $enableval; do IFS="$lt_save_ifs" if test "X$pkg" = "X$p"; then enable_fast_install=yes fi done IFS="$lt_save_ifs" ;; esac], [enable_fast_install=]_LT_ENABLE_FAST_INSTALL_DEFAULT) _LT_DECL([fast_install], [enable_fast_install], [0], [Whether or not to optimize for fast installation])dnl ])# _LT_ENABLE_FAST_INSTALL LT_OPTION_DEFINE([LT_INIT], [fast-install], [_LT_ENABLE_FAST_INSTALL([yes])]) LT_OPTION_DEFINE([LT_INIT], [disable-fast-install], [_LT_ENABLE_FAST_INSTALL([no])]) # Old names: AU_DEFUN([AC_ENABLE_FAST_INSTALL], [_LT_SET_OPTION([LT_INIT], m4_if([$1], [no], [disable-])[fast-install]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the `fast-install' option into LT_INIT's first parameter.]) ]) AU_DEFUN([AC_DISABLE_FAST_INSTALL], [_LT_SET_OPTION([LT_INIT], [disable-fast-install]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the `disable-fast-install' option into LT_INIT's first parameter.]) ]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_ENABLE_FAST_INSTALL], []) dnl AC_DEFUN([AM_DISABLE_FAST_INSTALL], []) # _LT_WITH_PIC([MODE]) # -------------------- # implement the --with-pic flag, and support the `pic-only' and `no-pic' # LT_INIT options. # MODE is either `yes' or `no'. If omitted, it defaults to `both'. m4_define([_LT_WITH_PIC], [AC_ARG_WITH([pic], [AS_HELP_STRING([--with-pic@<:@=PKGS@:>@], [try to use only PIC/non-PIC objects @<:@default=use both@:>@])], [lt_p=${PACKAGE-default} case $withval in yes|no) pic_mode=$withval ;; *) pic_mode=default # Look at the argument we got. We use all the common list separators. lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," for lt_pkg in $withval; do IFS="$lt_save_ifs" if test "X$lt_pkg" = "X$lt_p"; then pic_mode=yes fi done IFS="$lt_save_ifs" ;; esac], [pic_mode=default]) test -z "$pic_mode" && pic_mode=m4_default([$1], [default]) _LT_DECL([], [pic_mode], [0], [What type of objects to build])dnl ])# _LT_WITH_PIC LT_OPTION_DEFINE([LT_INIT], [pic-only], [_LT_WITH_PIC([yes])]) LT_OPTION_DEFINE([LT_INIT], [no-pic], [_LT_WITH_PIC([no])]) # Old name: AU_DEFUN([AC_LIBTOOL_PICMODE], [_LT_SET_OPTION([LT_INIT], [pic-only]) AC_DIAGNOSE([obsolete], [$0: Remove this warning and the call to _LT_SET_OPTION when you put the `pic-only' option into LT_INIT's first parameter.]) ]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_LIBTOOL_PICMODE], []) ## ----------------- ## ## LTDL_INIT Options ## ## ----------------- ## m4_define([_LTDL_MODE], []) LT_OPTION_DEFINE([LTDL_INIT], [nonrecursive], [m4_define([_LTDL_MODE], [nonrecursive])]) LT_OPTION_DEFINE([LTDL_INIT], [recursive], [m4_define([_LTDL_MODE], [recursive])]) LT_OPTION_DEFINE([LTDL_INIT], [subproject], [m4_define([_LTDL_MODE], [subproject])]) m4_define([_LTDL_TYPE], []) LT_OPTION_DEFINE([LTDL_INIT], [installable], [m4_define([_LTDL_TYPE], [installable])]) LT_OPTION_DEFINE([LTDL_INIT], [convenience], [m4_define([_LTDL_TYPE], [convenience])]) xf86-video-intel-2.99.917/m4/ac_define_dir.m40000664000175000017500000000314012400044327015236 00000000000000# =========================================================================== # http://autoconf-archive.cryp.to/ac_define_dir.html # =========================================================================== # # SYNOPSIS # # AC_DEFINE_DIR(VARNAME, DIR [, DESCRIPTION]) # # DESCRIPTION # # This macro sets VARNAME to the expansion of the DIR variable, taking # care of fixing up ${prefix} and such. # # VARNAME is then offered as both an output variable and a C preprocessor # symbol. # # Example: # # AC_DEFINE_DIR([DATADIR], [datadir], [Where data are placed to.]) # # LAST MODIFICATION # # 2008-04-12 # # COPYLEFT # # Copyright (c) 2008 Stepan Kasal # Copyright (c) 2008 Andreas Schwab # Copyright (c) 2008 Guido U. Draheim # Copyright (c) 2008 Alexandre Oliva # # Copying and distribution of this file, with or without modification, are # permitted in any medium without royalty provided the copyright notice # and this notice are preserved. AC_DEFUN([AC_DEFINE_DIR], [ prefix_NONE= exec_prefix_NONE= test "x$prefix" = xNONE && prefix_NONE=yes && prefix=$ac_default_prefix test "x$exec_prefix" = xNONE && exec_prefix_NONE=yes && exec_prefix=$prefix dnl In Autoconf 2.60, ${datadir} refers to ${datarootdir}, which in turn dnl refers to ${prefix}. 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Vaughan, 2004 # # This file is free software; the Free Software Foundation gives # unlimited permission to copy and/or distribute it, with or without # modifications, as long as this notice is preserved. # serial 6 ltsugar.m4 # This is to help aclocal find these macros, as it can't see m4_define. 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See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with GNU Libtool; see the file COPYING. If not, a copy # can be downloaded from http://www.gnu.org/licenses/gpl.html, or # obtained by writing to the Free Software Foundation, Inc., # 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. ]) # serial 57 LT_INIT # LT_PREREQ(VERSION) # ------------------ # Complain and exit if this libtool version is less that VERSION. m4_defun([LT_PREREQ], [m4_if(m4_version_compare(m4_defn([LT_PACKAGE_VERSION]), [$1]), -1, [m4_default([$3], [m4_fatal([Libtool version $1 or higher is required], 63)])], [$2])]) # _LT_CHECK_BUILDDIR # ------------------ # Complain if the absolute build directory name contains unusual characters m4_defun([_LT_CHECK_BUILDDIR], [case `pwd` in *\ * | *\ *) AC_MSG_WARN([Libtool does not cope well with whitespace in `pwd`]) ;; esac ]) # LT_INIT([OPTIONS]) # ------------------ AC_DEFUN([LT_INIT], [AC_PREREQ([2.58])dnl We use AC_INCLUDES_DEFAULT AC_REQUIRE([AC_CONFIG_AUX_DIR_DEFAULT])dnl AC_BEFORE([$0], [LT_LANG])dnl AC_BEFORE([$0], [LT_OUTPUT])dnl AC_BEFORE([$0], [LTDL_INIT])dnl m4_require([_LT_CHECK_BUILDDIR])dnl dnl Autoconf doesn't catch unexpanded LT_ macros by default: m4_pattern_forbid([^_?LT_[A-Z_]+$])dnl m4_pattern_allow([^(_LT_EOF|LT_DLGLOBAL|LT_DLLAZY_OR_NOW|LT_MULTI_MODULE)$])dnl dnl aclocal doesn't pull ltoptions.m4, ltsugar.m4, or ltversion.m4 dnl unless we require an AC_DEFUNed macro: AC_REQUIRE([LTOPTIONS_VERSION])dnl AC_REQUIRE([LTSUGAR_VERSION])dnl AC_REQUIRE([LTVERSION_VERSION])dnl AC_REQUIRE([LTOBSOLETE_VERSION])dnl m4_require([_LT_PROG_LTMAIN])dnl _LT_SHELL_INIT([SHELL=${CONFIG_SHELL-/bin/sh}]) dnl Parse OPTIONS _LT_SET_OPTIONS([$0], [$1]) # This can be used to rebuild libtool when needed LIBTOOL_DEPS="$ltmain" # Always use our own libtool. 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#endif int fnord () { return 42; } int main () { void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); int status = $lt_dlunknown; if (self) { if (dlsym (self,"fnord")) status = $lt_dlno_uscore; else { if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; else puts (dlerror ()); } /* dlclose (self); */ } else puts (dlerror ()); return status; }] _LT_EOF if AC_TRY_EVAL(ac_link) && test -s conftest${ac_exeext} 2>/dev/null; then (./conftest; exit; ) >&AS_MESSAGE_LOG_FD 2>/dev/null lt_status=$? case x$lt_status in x$lt_dlno_uscore) $1 ;; x$lt_dlneed_uscore) $2 ;; x$lt_dlunknown|x*) $3 ;; esac else : # compilation failed $3 fi fi rm -fr conftest* ])# _LT_TRY_DLOPEN_SELF # LT_SYS_DLOPEN_SELF # ------------------ AC_DEFUN([LT_SYS_DLOPEN_SELF], [m4_require([_LT_HEADER_DLFCN])dnl if test "x$enable_dlopen" != xyes; then enable_dlopen=unknown enable_dlopen_self=unknown enable_dlopen_self_static=unknown else lt_cv_dlopen=no lt_cv_dlopen_libs= case $host_os in beos*) lt_cv_dlopen="load_add_on" lt_cv_dlopen_libs= lt_cv_dlopen_self=yes ;; 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esac # HP-UX runs *really* slowly unless shared libraries are mode 555, ... postinstall_cmds='chmod 555 $lib' # or fails outright, so override atomically: install_override_mode=555 ;; interix[[3-9]]*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}' soname_spec='${libname}${release}${shared_ext}$major' dynamic_linker='Interix 3.x ld.so.1 (PE, like ELF)' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; irix5* | irix6* | nonstopux*) case $host_os in nonstopux*) version_type=nonstopux ;; *) if test "$lt_cv_prog_gnu_ld" = yes; then version_type=linux # correct to gnu/linux during the next big refactor else version_type=irix fi ;; esac need_lib_prefix=no need_version=no soname_spec='${libname}${release}${shared_ext}$major' library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${release}${shared_ext} $libname${shared_ext}' case $host_os in irix5* | nonstopux*) libsuff= shlibsuff= ;; *) case $LD in # libtool.m4 will add one of these switches to LD *-32|*"-32 "|*-melf32bsmip|*"-melf32bsmip ") libsuff= shlibsuff= libmagic=32-bit;; *-n32|*"-n32 "|*-melf32bmipn32|*"-melf32bmipn32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; *-64|*"-64 "|*-melf64bmip|*"-melf64bmip ") libsuff=64 shlibsuff=64 libmagic=64-bit;; *) libsuff= shlibsuff= libmagic=never-match;; esac ;; esac shlibpath_var=LD_LIBRARY${shlibsuff}_PATH shlibpath_overrides_runpath=no sys_lib_search_path_spec="/usr/lib${libsuff} /lib${libsuff} /usr/local/lib${libsuff}" sys_lib_dlsearch_path_spec="/usr/lib${libsuff} /lib${libsuff}" hardcode_into_libs=yes ;; # No shared lib support for Linux oldld, aout, or coff. linux*oldld* | linux*aout* | linux*coff*) dynamic_linker=no ;; # This must be glibc/ELF. linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' soname_spec='${libname}${release}${shared_ext}$major' finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no # Some binutils ld are patched to set DT_RUNPATH AC_CACHE_VAL([lt_cv_shlibpath_overrides_runpath], [lt_cv_shlibpath_overrides_runpath=no save_LDFLAGS=$LDFLAGS save_libdir=$libdir eval "libdir=/foo; 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newsos6) version_type=linux # correct to gnu/linux during the next big refactor library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes ;; *nto* | *qnx*) version_type=qnx need_lib_prefix=no need_version=no library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' soname_spec='${libname}${release}${shared_ext}$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes dynamic_linker='ldqnx.so' ;; openbsd*) version_type=sunos sys_lib_dlsearch_path_spec="/usr/lib" need_lib_prefix=no # Some older versions of OpenBSD (3.3 at least) *do* need versioned libs. case $host_os in openbsd3.3 | openbsd3.3.*) need_version=yes ;; *) need_version=no ;; esac library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${shared_ext}$versuffix' finish_cmds='PATH="\$PATH:/sbin" ldconfig -m $libdir' shlibpath_var=LD_LIBRARY_PATH if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; 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*) lt_cv_deplibs_check_method='file_magic (s[[0-9]][[0-9]][[0-9]]|PA-RISC[[0-9]]\.[[0-9]]) shared library' lt_cv_file_magic_test_file=/usr/lib/libc.sl ;; esac ;; interix[[3-9]]*) # PIC code is broken on Interix 3.x, that's why |\.a not |_pic\.a here lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so|\.a)$' ;; irix5* | irix6* | nonstopux*) case $LD in *-32|*"-32 ") libmagic=32-bit;; *-n32|*"-n32 ") libmagic=N32;; *-64|*"-64 ") libmagic=64-bit;; *) libmagic=never-match;; esac lt_cv_deplibs_check_method=pass_all ;; # This must be glibc/ELF. linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) lt_cv_deplibs_check_method=pass_all ;; netbsd* | netbsdelf*-gnu) if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so\.[[0-9]]+\.[[0-9]]+|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so|_pic\.a)$' fi ;; newos6*) lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (executable|dynamic lib)' lt_cv_file_magic_cmd=/usr/bin/file lt_cv_file_magic_test_file=/usr/lib/libnls.so ;; *nto* | *qnx*) lt_cv_deplibs_check_method=pass_all ;; openbsd*) if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so\.[[0-9]]+\.[[0-9]]+|\.so|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[[^/]]+(\.so\.[[0-9]]+\.[[0-9]]+|_pic\.a)$' fi ;; osf3* | osf4* | osf5*) lt_cv_deplibs_check_method=pass_all ;; rdos*) lt_cv_deplibs_check_method=pass_all ;; solaris*) lt_cv_deplibs_check_method=pass_all ;; sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) lt_cv_deplibs_check_method=pass_all ;; sysv4 | sysv4.3*) case $host_vendor in motorola) lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[ML]]SB (shared object|dynamic lib) M[[0-9]][[0-9]]* Version [[0-9]]' lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` ;; ncr) lt_cv_deplibs_check_method=pass_all ;; sequent) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method='file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB (shared object|dynamic lib )' ;; sni) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method="file_magic ELF [[0-9]][[0-9]]*-bit [[LM]]SB dynamic lib" lt_cv_file_magic_test_file=/lib/libc.so ;; siemens) lt_cv_deplibs_check_method=pass_all ;; pc) lt_cv_deplibs_check_method=pass_all ;; esac ;; tpf*) lt_cv_deplibs_check_method=pass_all ;; esac ]) file_magic_glob= want_nocaseglob=no if test "$build" = "$host"; then case $host_os in mingw* | pw32*) if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then want_nocaseglob=yes else file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[[\1]]\/[[\1]]\/g;/g"` fi ;; esac fi file_magic_cmd=$lt_cv_file_magic_cmd deplibs_check_method=$lt_cv_deplibs_check_method test -z "$deplibs_check_method" && deplibs_check_method=unknown _LT_DECL([], [deplibs_check_method], [1], [Method to check whether dependent libraries are shared objects]) _LT_DECL([], [file_magic_cmd], [1], [Command to use when deplibs_check_method = "file_magic"]) _LT_DECL([], [file_magic_glob], [1], [How to find potential files when deplibs_check_method = "file_magic"]) _LT_DECL([], [want_nocaseglob], [1], [Find potential files using nocaseglob when deplibs_check_method = "file_magic"]) ])# _LT_CHECK_MAGIC_METHOD # LT_PATH_NM # ---------- # find the pathname to a BSD- or MS-compatible name lister AC_DEFUN([LT_PATH_NM], [AC_REQUIRE([AC_PROG_CC])dnl AC_CACHE_CHECK([for BSD- or MS-compatible name lister (nm)], lt_cv_path_NM, [if test -n "$NM"; then # Let the user override the test. lt_cv_path_NM="$NM" else lt_nm_to_check="${ac_tool_prefix}nm" if test -n "$ac_tool_prefix" && test "$build" = "$host"; then lt_nm_to_check="$lt_nm_to_check nm" fi for lt_tmp_nm in $lt_nm_to_check; do lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR for ac_dir in $PATH /usr/ccs/bin/elf /usr/ccs/bin /usr/ucb /bin; do IFS="$lt_save_ifs" test -z "$ac_dir" && ac_dir=. tmp_nm="$ac_dir/$lt_tmp_nm" if test -f "$tmp_nm" || test -f "$tmp_nm$ac_exeext" ; then # Check to see if the nm accepts a BSD-compat flag. # Adding the `sed 1q' prevents false positives on HP-UX, which says: # nm: unknown option "B" ignored # Tru64's nm complains that /dev/null is an invalid object file case `"$tmp_nm" -B /dev/null 2>&1 | sed '1q'` in */dev/null* | *'Invalid file or object type'*) lt_cv_path_NM="$tmp_nm -B" break ;; *) case `"$tmp_nm" -p /dev/null 2>&1 | sed '1q'` in */dev/null*) lt_cv_path_NM="$tmp_nm -p" break ;; *) lt_cv_path_NM=${lt_cv_path_NM="$tmp_nm"} # keep the first match, but continue # so that we can try to find one that supports BSD flags ;; esac ;; esac fi done IFS="$lt_save_ifs" done : ${lt_cv_path_NM=no} fi]) if test "$lt_cv_path_NM" != "no"; then NM="$lt_cv_path_NM" else # Didn't find any BSD compatible name lister, look for dumpbin. if test -n "$DUMPBIN"; then : # Let the user override the test. else AC_CHECK_TOOLS(DUMPBIN, [dumpbin "link -dump"], :) case `$DUMPBIN -symbols /dev/null 2>&1 | sed '1q'` in *COFF*) DUMPBIN="$DUMPBIN -symbols" ;; *) DUMPBIN=: ;; esac fi AC_SUBST([DUMPBIN]) if test "$DUMPBIN" != ":"; then NM="$DUMPBIN" fi fi test -z "$NM" && NM=nm AC_SUBST([NM]) _LT_DECL([], [NM], [1], [A BSD- or MS-compatible name lister])dnl AC_CACHE_CHECK([the name lister ($NM) interface], [lt_cv_nm_interface], [lt_cv_nm_interface="BSD nm" echo "int some_variable = 0;" > conftest.$ac_ext (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&AS_MESSAGE_LOG_FD) (eval "$ac_compile" 2>conftest.err) cat conftest.err >&AS_MESSAGE_LOG_FD (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&AS_MESSAGE_LOG_FD) (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out) cat conftest.err >&AS_MESSAGE_LOG_FD (eval echo "\"\$as_me:$LINENO: output\"" >&AS_MESSAGE_LOG_FD) cat conftest.out >&AS_MESSAGE_LOG_FD if $GREP 'External.*some_variable' conftest.out > /dev/null; then lt_cv_nm_interface="MS dumpbin" fi rm -f conftest*]) ])# LT_PATH_NM # Old names: AU_ALIAS([AM_PROG_NM], [LT_PATH_NM]) AU_ALIAS([AC_PROG_NM], [LT_PATH_NM]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AM_PROG_NM], []) dnl AC_DEFUN([AC_PROG_NM], []) # _LT_CHECK_SHAREDLIB_FROM_LINKLIB # -------------------------------- # how to determine the name of the shared library # associated with a specific link library. # -- PORTME fill in with the dynamic library characteristics m4_defun([_LT_CHECK_SHAREDLIB_FROM_LINKLIB], [m4_require([_LT_DECL_EGREP]) m4_require([_LT_DECL_OBJDUMP]) m4_require([_LT_DECL_DLLTOOL]) AC_CACHE_CHECK([how to associate runtime and link libraries], lt_cv_sharedlib_from_linklib_cmd, [lt_cv_sharedlib_from_linklib_cmd='unknown' case $host_os in cygwin* | mingw* | pw32* | cegcc*) # two different shell functions defined in ltmain.sh # decide which to use based on capabilities of $DLLTOOL case `$DLLTOOL --help 2>&1` in *--identify-strict*) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib ;; *) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback ;; esac ;; *) # fallback: assume linklib IS sharedlib lt_cv_sharedlib_from_linklib_cmd="$ECHO" ;; esac ]) sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO _LT_DECL([], [sharedlib_from_linklib_cmd], [1], [Command to associate shared and link libraries]) ])# _LT_CHECK_SHAREDLIB_FROM_LINKLIB # _LT_PATH_MANIFEST_TOOL # ---------------------- # locate the manifest tool m4_defun([_LT_PATH_MANIFEST_TOOL], [AC_CHECK_TOOL(MANIFEST_TOOL, mt, :) test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt AC_CACHE_CHECK([if $MANIFEST_TOOL is a manifest tool], [lt_cv_path_mainfest_tool], [lt_cv_path_mainfest_tool=no echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&AS_MESSAGE_LOG_FD $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out cat conftest.err >&AS_MESSAGE_LOG_FD if $GREP 'Manifest Tool' conftest.out > /dev/null; then lt_cv_path_mainfest_tool=yes fi rm -f conftest*]) if test "x$lt_cv_path_mainfest_tool" != xyes; then MANIFEST_TOOL=: fi _LT_DECL([], [MANIFEST_TOOL], [1], [Manifest tool])dnl ])# _LT_PATH_MANIFEST_TOOL # LT_LIB_M # -------- # check for math library AC_DEFUN([LT_LIB_M], [AC_REQUIRE([AC_CANONICAL_HOST])dnl LIBM= case $host in *-*-beos* | *-*-cegcc* | *-*-cygwin* | *-*-haiku* | *-*-pw32* | *-*-darwin*) # These system don't have libm, or don't need it ;; *-ncr-sysv4.3*) AC_CHECK_LIB(mw, _mwvalidcheckl, LIBM="-lmw") AC_CHECK_LIB(m, cos, LIBM="$LIBM -lm") ;; *) AC_CHECK_LIB(m, cos, LIBM="-lm") ;; esac AC_SUBST([LIBM]) ])# LT_LIB_M # Old name: AU_ALIAS([AC_CHECK_LIBM], [LT_LIB_M]) dnl aclocal-1.4 backwards compatibility: dnl AC_DEFUN([AC_CHECK_LIBM], []) # _LT_COMPILER_NO_RTTI([TAGNAME]) # ------------------------------- m4_defun([_LT_COMPILER_NO_RTTI], [m4_require([_LT_TAG_COMPILER])dnl _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)= if test "$GCC" = yes; then case $cc_basename in nvcc*) _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -Xcompiler -fno-builtin' ;; *) _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -fno-builtin' ;; esac _LT_COMPILER_OPTION([if $compiler supports -fno-rtti -fno-exceptions], lt_cv_prog_compiler_rtti_exceptions, [-fno-rtti -fno-exceptions], [], [_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)="$_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1) -fno-rtti -fno-exceptions"]) fi _LT_TAGDECL([no_builtin_flag], [lt_prog_compiler_no_builtin_flag], [1], [Compiler flag to turn off builtin functions]) ])# _LT_COMPILER_NO_RTTI # _LT_CMD_GLOBAL_SYMBOLS # ---------------------- m4_defun([_LT_CMD_GLOBAL_SYMBOLS], [AC_REQUIRE([AC_CANONICAL_HOST])dnl AC_REQUIRE([AC_PROG_CC])dnl AC_REQUIRE([AC_PROG_AWK])dnl AC_REQUIRE([LT_PATH_NM])dnl AC_REQUIRE([LT_PATH_LD])dnl m4_require([_LT_DECL_SED])dnl m4_require([_LT_DECL_EGREP])dnl m4_require([_LT_TAG_COMPILER])dnl # Check for command to grab the raw symbol name followed by C symbol from nm. AC_MSG_CHECKING([command to parse $NM output from $compiler object]) AC_CACHE_VAL([lt_cv_sys_global_symbol_pipe], [ # These are sane defaults that work on at least a few old systems. # [They come from Ultrix. What could be older than Ultrix?!! ;)] # Character class describing NM global symbol codes. symcode='[[BCDEGRST]]' # Regexp to match symbols that can be accessed directly from C. sympat='\([[_A-Za-z]][[_A-Za-z0-9]]*\)' # Define system-specific variables. case $host_os in aix*) symcode='[[BCDT]]' ;; cygwin* | mingw* | pw32* | cegcc*) symcode='[[ABCDGISTW]]' ;; hpux*) if test "$host_cpu" = ia64; then symcode='[[ABCDEGRST]]' fi ;; irix* | nonstopux*) symcode='[[BCDEGRST]]' ;; osf*) symcode='[[BCDEGQRST]]' ;; solaris*) symcode='[[BDRT]]' ;; sco3.2v5*) symcode='[[DT]]' ;; sysv4.2uw2*) symcode='[[DT]]' ;; sysv5* | sco5v6* | unixware* | OpenUNIX*) symcode='[[ABDT]]' ;; sysv4) symcode='[[DFNSTU]]' ;; esac # If we're using GNU nm, then use its standard symbol codes. case `$NM -V 2>&1` in *GNU* | *'with BFD'*) symcode='[[ABCDGIRSTW]]' ;; esac # Transform an extracted symbol line into a proper C declaration. # Some systems (esp. on ia64) link data and code symbols differently, # so use this general approach. lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'" # Transform an extracted symbol line into symbol name and symbol address lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\)[[ ]]*$/ {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/ {\"\2\", (void *) \&\2},/p'" lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([[^ ]]*\)[[ ]]*$/ {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \(lib[[^ ]]*\)$/ {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/ {\"lib\2\", (void *) \&\2},/p'" # Handle CRLF in mingw tool chain opt_cr= case $build_os in mingw*) opt_cr=`$ECHO 'x\{0,1\}' | tr x '\015'` # option cr in regexp ;; esac # Try without a prefix underscore, then with it. for ac_symprfx in "" "_"; do # Transform symcode, sympat, and symprfx into a raw symbol and a C symbol. symxfrm="\\1 $ac_symprfx\\2 \\2" # Write the raw and C identifiers. if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Fake it for dumpbin and say T for any non-static function # and D for any global variable. # Also find C++ and __fastcall symbols from MSVC++, # which start with @ or ?. lt_cv_sys_global_symbol_pipe="$AWK ['"\ " {last_section=section; section=\$ 3};"\ " /^COFF SYMBOL TABLE/{for(i in hide) delete hide[i]};"\ " /Section length .*#relocs.*(pick any)/{hide[last_section]=1};"\ " \$ 0!~/External *\|/{next};"\ " / 0+ UNDEF /{next}; / UNDEF \([^|]\)*()/{next};"\ " {if(hide[section]) next};"\ " {f=0}; \$ 0~/\(\).*\|/{f=1}; {printf f ? \"T \" : \"D \"};"\ " {split(\$ 0, a, /\||\r/); split(a[2], s)};"\ " s[1]~/^[@?]/{print s[1], s[1]; next};"\ " s[1]~prfx {split(s[1],t,\"@\"); print t[1], substr(t[1],length(prfx))}"\ " ' prfx=^$ac_symprfx]" else lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[[ ]]\($symcode$symcode*\)[[ ]][[ ]]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'" fi lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'" # Check to see that the pipe works correctly. pipe_works=no rm -f conftest* cat > conftest.$ac_ext <<_LT_EOF #ifdef __cplusplus extern "C" { #endif char nm_test_var; void nm_test_func(void); void nm_test_func(void){} #ifdef __cplusplus } #endif int main(){nm_test_var='a';nm_test_func();return(0);} _LT_EOF if AC_TRY_EVAL(ac_compile); then # Now try to grab the symbols. nlist=conftest.nm if AC_TRY_EVAL(NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) && test -s "$nlist"; then # Try sorting and uniquifying the output. if sort "$nlist" | uniq > "$nlist"T; then mv -f "$nlist"T "$nlist" else rm -f "$nlist"T fi # Make sure that we snagged all the symbols we need. if $GREP ' nm_test_var$' "$nlist" >/dev/null; then if $GREP ' nm_test_func$' "$nlist" >/dev/null; then cat <<_LT_EOF > conftest.$ac_ext /* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ #if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE) /* DATA imports from DLLs on WIN32 con't be const, because runtime relocations are performed -- see ld's documentation on pseudo-relocs. */ # define LT@&t@_DLSYM_CONST #elif defined(__osf__) /* This system does not cope well with relocations in const data. */ # define LT@&t@_DLSYM_CONST #else # define LT@&t@_DLSYM_CONST const #endif #ifdef __cplusplus extern "C" { #endif _LT_EOF # Now generate the symbol file. eval "$lt_cv_sys_global_symbol_to_cdecl"' < "$nlist" | $GREP -v main >> conftest.$ac_ext' cat <<_LT_EOF >> conftest.$ac_ext /* The mapping between symbol names and symbols. */ LT@&t@_DLSYM_CONST struct { const char *name; void *address; } lt__PROGRAM__LTX_preloaded_symbols[[]] = { { "@PROGRAM@", (void *) 0 }, _LT_EOF $SED "s/^$symcode$symcode* \(.*\) \(.*\)$/ {\"\2\", (void *) \&\2},/" < "$nlist" | $GREP -v main >> conftest.$ac_ext cat <<\_LT_EOF >> conftest.$ac_ext {0, (void *) 0} }; /* This works around a problem in FreeBSD linker */ #ifdef FREEBSD_WORKAROUND static const void *lt_preloaded_setup() { return lt__PROGRAM__LTX_preloaded_symbols; } #endif #ifdef __cplusplus } #endif _LT_EOF # Now try linking the two files. mv conftest.$ac_objext conftstm.$ac_objext lt_globsym_save_LIBS=$LIBS lt_globsym_save_CFLAGS=$CFLAGS LIBS="conftstm.$ac_objext" CFLAGS="$CFLAGS$_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)" if AC_TRY_EVAL(ac_link) && test -s conftest${ac_exeext}; then pipe_works=yes fi LIBS=$lt_globsym_save_LIBS CFLAGS=$lt_globsym_save_CFLAGS else echo "cannot find nm_test_func in $nlist" >&AS_MESSAGE_LOG_FD fi else echo "cannot find nm_test_var in $nlist" >&AS_MESSAGE_LOG_FD fi else echo "cannot run $lt_cv_sys_global_symbol_pipe" >&AS_MESSAGE_LOG_FD fi else echo "$progname: failed program was:" >&AS_MESSAGE_LOG_FD cat conftest.$ac_ext >&5 fi rm -rf conftest* conftst* # Do not use the global_symbol_pipe unless it works. if test "$pipe_works" = yes; then break else lt_cv_sys_global_symbol_pipe= fi done ]) if test -z "$lt_cv_sys_global_symbol_pipe"; then lt_cv_sys_global_symbol_to_cdecl= fi if test -z "$lt_cv_sys_global_symbol_pipe$lt_cv_sys_global_symbol_to_cdecl"; then AC_MSG_RESULT(failed) else AC_MSG_RESULT(ok) fi # Response file support. if test "$lt_cv_nm_interface" = "MS dumpbin"; then nm_file_list_spec='@' elif $NM --help 2>/dev/null | grep '[[@]]FILE' >/dev/null; then nm_file_list_spec='@' fi _LT_DECL([global_symbol_pipe], [lt_cv_sys_global_symbol_pipe], [1], [Take the output of nm and produce a listing of raw symbols and C names]) _LT_DECL([global_symbol_to_cdecl], [lt_cv_sys_global_symbol_to_cdecl], [1], [Transform the output of nm in a proper C declaration]) _LT_DECL([global_symbol_to_c_name_address], [lt_cv_sys_global_symbol_to_c_name_address], [1], [Transform the output of nm in a C name address pair]) _LT_DECL([global_symbol_to_c_name_address_lib_prefix], [lt_cv_sys_global_symbol_to_c_name_address_lib_prefix], [1], [Transform the output of nm in a C name address pair when lib prefix is needed]) _LT_DECL([], [nm_file_list_spec], [1], [Specify filename containing input files for $NM]) ]) # _LT_CMD_GLOBAL_SYMBOLS # _LT_COMPILER_PIC([TAGNAME]) # --------------------------- m4_defun([_LT_COMPILER_PIC], [m4_require([_LT_TAG_COMPILER])dnl _LT_TAGVAR(lt_prog_compiler_wl, $1)= _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)= m4_if([$1], [CXX], [ # C++ specific cases for pic, static, wl, etc. if test "$GXX" = yes; then _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' case $host_os in aix*) # All AIX code is PIC. if test "$host_cpu" = ia64; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; m68k) # FIXME: we need at least 68020 code to build shared libraries, but # adding the `-m68020' flag to GCC prevents building anything better, # like `-m68040'. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4' ;; esac ;; beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) # PIC is the default for these OSes. ;; mingw* | cygwin* | os2* | pw32* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). # Although the cygwin gcc ignores -fPIC, still need this for old-style # (--disable-auto-import) libraries m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) ;; darwin* | rhapsody*) # PIC is the default on this platform # Common symbols not allowed in MH_DYLIB files _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' ;; *djgpp*) # DJGPP does not support shared libraries at all _LT_TAGVAR(lt_prog_compiler_pic, $1)= ;; haiku*) # PIC is the default for Haiku. # The "-static" flag exists, but is broken. _LT_TAGVAR(lt_prog_compiler_static, $1)= ;; interix[[3-9]]*) # Interix 3.x gcc -fpic/-fPIC options generate broken code. # Instead, we relocate shared libraries at runtime. ;; sysv4*MP*) if test -d /usr/nec; then _LT_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic fi ;; hpux*) # PIC is the default for 64-bit PA HP-UX, but not for 32-bit # PA HP-UX. On IA64 HP-UX, PIC is the default but the pic flag # sets the default TLS model and affects inlining. case $host_cpu in hppa*64*) ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac ;; *qnx* | *nto*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac else case $host_os in aix[[4-9]]*) # All AIX code is PIC. if test "$host_cpu" = ia64; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' else _LT_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp' fi ;; chorus*) case $cc_basename in cxch68*) # Green Hills C++ Compiler # _LT_TAGVAR(lt_prog_compiler_static, $1)="--no_auto_instantiation -u __main -u __premain -u _abort -r $COOL_DIR/lib/libOrb.a $MVME_DIR/lib/CC/libC.a $MVME_DIR/lib/classix/libcx.s.a" ;; esac ;; mingw* | cygwin* | os2* | pw32* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) ;; dgux*) case $cc_basename in ec++*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' ;; ghcx*) # Green Hills C++ Compiler _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; *) ;; esac ;; freebsd* | dragonfly*) # FreeBSD uses GNU C++ ;; hpux9* | hpux10* | hpux11*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='${wl}-a ${wl}archive' if test "$host_cpu" != ia64; then _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' fi ;; aCC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='${wl}-a ${wl}archive' case $host_cpu in hppa*64*|ia64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' ;; esac ;; *) ;; esac ;; interix*) # This is c89, which is MS Visual C++ (no shared libs) # Anyone wants to do a port? ;; irix5* | irix6* | nonstopux*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' # CC pic flag -KPIC is the default. ;; *) ;; esac ;; linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) case $cc_basename in KCC*) # KAI C++ Compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; ecpc* ) # old Intel C++ for x86_64 which still supported -KPIC. _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; icpc* ) # Intel C++, used to be incompatible with GCC. # ICC 10 doesn't accept -KPIC any more. _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; pgCC* | pgcpp*) # Portland Group C++ compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; cxx*) # Compaq C++ # Make sure the PIC flag is empty. It appears that all Alpha # Linux and Compaq Tru64 Unix objects are PIC. _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; xlc* | xlC* | bgxl[[cC]]* | mpixl[[cC]]*) # IBM XL 8.0, 9.0 on PPC and BlueGene _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink' ;; *) case `$CC -V 2>&1 | sed 5q` in *Sun\ C*) # Sun C++ 5.9 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; esac ;; esac ;; lynxos*) ;; m88k*) ;; mvs*) case $cc_basename in cxx*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-W c,exportall' ;; *) ;; esac ;; netbsd* | netbsdelf*-gnu) ;; *qnx* | *nto*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; osf3* | osf4* | osf5*) case $cc_basename in KCC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='--backend -Wl,' ;; RCC*) # Rational C++ 2.4.1 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; cxx*) # Digital/Compaq C++ _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # Make sure the PIC flag is empty. It appears that all Alpha # Linux and Compaq Tru64 Unix objects are PIC. _LT_TAGVAR(lt_prog_compiler_pic, $1)= _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; *) ;; esac ;; psos*) ;; solaris*) case $cc_basename in CC* | sunCC*) # Sun C++ 4.2, 5.x and Centerline C++ _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; gcx*) # Green Hills C++ Compiler _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' ;; *) ;; esac ;; sunos4*) case $cc_basename in CC*) # Sun C++ 4.x _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; lcc*) # Lucid _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' ;; *) ;; esac ;; sysv5* | unixware* | sco3.2v5* | sco5v6* | OpenUNIX*) case $cc_basename in CC*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; esac ;; tandem*) case $cc_basename in NCC*) # NonStop-UX NCC 3.20 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' ;; *) ;; esac ;; vxworks*) ;; *) _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; esac fi ], [ if test "$GCC" = yes; then _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' case $host_os in aix*) # All AIX code is PIC. if test "$host_cpu" = ia64; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi ;; amigaos*) case $host_cpu in powerpc) # see comment about AmigaOS4 .so support _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; m68k) # FIXME: we need at least 68020 code to build shared libraries, but # adding the `-m68020' flag to GCC prevents building anything better, # like `-m68040'. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-m68020 -resident32 -malways-restore-a4' ;; esac ;; beos* | irix5* | irix6* | nonstopux* | osf3* | osf4* | osf5*) # PIC is the default for these OSes. ;; mingw* | cygwin* | pw32* | os2* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). # Although the cygwin gcc ignores -fPIC, still need this for old-style # (--disable-auto-import) libraries m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) ;; darwin* | rhapsody*) # PIC is the default on this platform # Common symbols not allowed in MH_DYLIB files _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common' ;; haiku*) # PIC is the default for Haiku. # The "-static" flag exists, but is broken. _LT_TAGVAR(lt_prog_compiler_static, $1)= ;; hpux*) # PIC is the default for 64-bit PA HP-UX, but not for 32-bit # PA HP-UX. On IA64 HP-UX, PIC is the default but the pic flag # sets the default TLS model and affects inlining. case $host_cpu in hppa*64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac ;; interix[[3-9]]*) # Interix 3.x gcc -fpic/-fPIC options generate broken code. # Instead, we relocate shared libraries at runtime. ;; msdosdjgpp*) # Just because we use GCC doesn't mean we suddenly get shared libraries # on systems that don't support them. _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no enable_shared=no ;; *nto* | *qnx*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; sysv4*MP*) if test -d /usr/nec; then _LT_TAGVAR(lt_prog_compiler_pic, $1)=-Kconform_pic fi ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' ;; esac case $cc_basename in nvcc*) # Cuda Compiler Driver 2.2 _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Xlinker ' if test -n "$_LT_TAGVAR(lt_prog_compiler_pic, $1)"; then _LT_TAGVAR(lt_prog_compiler_pic, $1)="-Xcompiler $_LT_TAGVAR(lt_prog_compiler_pic, $1)" fi ;; esac else # PORTME Check for flag to pass linker flags through the system compiler. case $host_os in aix*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' if test "$host_cpu" = ia64; then # AIX 5 now supports IA64 processor _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' else _LT_TAGVAR(lt_prog_compiler_static, $1)='-bnso -bI:/lib/syscalls.exp' fi ;; mingw* | cygwin* | pw32* | os2* | cegcc*) # This hack is so that the source file can tell whether it is being # built for inclusion in a dll (and should export symbols for example). m4_if([$1], [GCJ], [], [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT']) ;; hpux9* | hpux10* | hpux11*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # PIC is the default for IA64 HP-UX and 64-bit HP-UX, but # not for PA HP-UX. case $host_cpu in hppa*64*|ia64*) # +Z the default ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)='+Z' ;; esac # Is there a better lt_prog_compiler_static that works with the bundled CC? _LT_TAGVAR(lt_prog_compiler_static, $1)='${wl}-a ${wl}archive' ;; irix5* | irix6* | nonstopux*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # PIC (with -KPIC) is the default. _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) case $cc_basename in # old Intel for x86_64 which still supported -KPIC. ecc*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; # icc used to be incompatible with GCC. # ICC 10 doesn't accept -KPIC any more. icc* | ifort*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; # Lahey Fortran 8.1. lf95*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='--shared' _LT_TAGVAR(lt_prog_compiler_static, $1)='--static' ;; nagfor*) # NAG Fortran compiler _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,-Wl,,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*) # Portland Group compilers (*not* the Pentium gcc compiler, # which looks to be a dead project) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; ccc*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # All Alpha code is PIC. _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; xl* | bgxl* | bgf* | mpixl*) # IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink' ;; *) case `$CC -V 2>&1 | sed 5q` in *Sun\ Ceres\ Fortran* | *Sun*Fortran*\ [[1-7]].* | *Sun*Fortran*\ 8.[[0-3]]*) # Sun Fortran 8.3 passes all unrecognized flags to the linker _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='' ;; *Sun\ F* | *Sun*Fortran*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' ;; *Sun\ C*) # Sun C 5.9 _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' ;; *Intel*\ [[CF]]*Compiler*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-static' ;; *Portland\ Group*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fpic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; esac ;; esac ;; newsos6) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; *nto* | *qnx*) # QNX uses GNU C++, but need to define -shared option too, otherwise # it will coredump. _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC -shared' ;; osf3* | osf4* | osf5*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' # All OSF/1 code is PIC. _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; rdos*) _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared' ;; solaris*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' case $cc_basename in f77* | f90* | f95* | sunf77* | sunf90* | sunf95*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ';; *) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,';; esac ;; sunos4*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; sysv4 | sysv4.2uw2* | sysv4.3*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; sysv4*MP*) if test -d /usr/nec ;then _LT_TAGVAR(lt_prog_compiler_pic, $1)='-Kconform_pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' fi ;; sysv5* | unixware* | sco3.2v5* | sco5v6* | OpenUNIX*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; unicos*) _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,' _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; uts4*) _LT_TAGVAR(lt_prog_compiler_pic, $1)='-pic' _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic' ;; *) _LT_TAGVAR(lt_prog_compiler_can_build_shared, $1)=no ;; esac fi ]) case $host_os in # For platforms which do not support PIC, -DPIC is meaningless: *djgpp*) _LT_TAGVAR(lt_prog_compiler_pic, $1)= ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)="$_LT_TAGVAR(lt_prog_compiler_pic, $1)@&t@m4_if([$1],[],[ -DPIC],[m4_if([$1],[CXX],[ -DPIC],[])])" ;; esac AC_CACHE_CHECK([for $compiler option to produce PIC], [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)], [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_prog_compiler_pic, $1)]) _LT_TAGVAR(lt_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_cv_prog_compiler_pic, $1) # # Check to make sure the PIC flag actually works. # if test -n "$_LT_TAGVAR(lt_prog_compiler_pic, $1)"; then _LT_COMPILER_OPTION([if $compiler PIC flag $_LT_TAGVAR(lt_prog_compiler_pic, $1) works], [_LT_TAGVAR(lt_cv_prog_compiler_pic_works, $1)], [$_LT_TAGVAR(lt_prog_compiler_pic, $1)@&t@m4_if([$1],[],[ -DPIC],[m4_if([$1],[CXX],[ -DPIC],[])])], [], [case $_LT_TAGVAR(lt_prog_compiler_pic, $1) in "" | " "*) ;; *) _LT_TAGVAR(lt_prog_compiler_pic, $1)=" $_LT_TAGVAR(lt_prog_compiler_pic, $1)" ;; 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(KAI) C++ Compiler # KCC will only create a shared library if the output file # ends with ".so" (or ".sl" for HP-UX), so rename the library # to its proper name (with version) after linking. _LT_TAGVAR(archive_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\${tempext}\..*/.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib; mv \$templib $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='tempext=`echo $shared_ext | $SED -e '\''s/\([[^()0-9A-Za-z{}]]\)/\\\\\1/g'\''`; templib=`echo $lib | $SED -e "s/\${tempext}\..*/.so/"`; $CC $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags --soname $soname -o \$templib ${wl}-retain-symbols-file,$export_symbols; mv \$templib $lib' # Commands to make compiler produce verbose output that lists # what "hidden" libraries, object files and flags are used when # linking a shared library. # # There doesn't appear to be a way to prevent this compiler from # explicitly linking system object files so we need to strip them # from the output so that they don't get included in the library # dependencies. output_verbose_link_cmd='templist=`$CC $CFLAGS -v conftest.$objext -o libconftest$shared_ext 2>&1 | $GREP "ld"`; rm -f libconftest$shared_ext; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"' _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic' # Archives containing C++ object files must be created using # "CC -Bstatic", where "CC" is the KAI C++ compiler. _LT_TAGVAR(old_archive_cmds, $1)='$CC -Bstatic -o $oldlib $oldobjs' ;; icpc* | ecpc* ) # Intel C++ with_gnu_ld=yes # version 8.0 and above of icpc choke on multiply defined symbols # if we add $predep_objects and $postdep_objects, however 7.1 and # earlier do not add the objects themselves. case `$CC -V 2>&1` in *"Version 7."*) _LT_TAGVAR(archive_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' ;; *) # Version 8.0 or newer tmp_idyn= case $host_cpu in ia64*) tmp_idyn=' -i_dynamic';; esac _LT_TAGVAR(archive_cmds, $1)='$CC -shared'"$tmp_idyn"' $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared'"$tmp_idyn"' $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib' ;; esac _LT_TAGVAR(archive_cmds_need_lc, $1)=no _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic' _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive$convenience ${wl}--no-whole-archive' ;; pgCC* | pgcpp*) # Portland Group C++ compiler case `$CC -V` in *pgCC\ [[1-5]].* | *pgcpp\ [[1-5]].*) _LT_TAGVAR(prelink_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $objs $libobjs $compile_deplibs~ compile_command="$compile_command `find $tpldir -name \*.o | sort | $NL2SP`"' _LT_TAGVAR(old_archive_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $oldobjs$old_deplibs~ $AR $AR_FLAGS $oldlib$oldobjs$old_deplibs `find $tpldir -name \*.o | sort | $NL2SP`~ $RANLIB $oldlib' _LT_TAGVAR(archive_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~ $CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='tpldir=Template.dir~ rm -rf $tpldir~ $CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~ $CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname ${wl}-retain-symbols-file ${wl}$export_symbols -o $lib' ;; *) # Version 6 and above use weak symbols _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname ${wl}-retain-symbols-file ${wl}$export_symbols -o $lib' ;; esac _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}--rpath ${wl}$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic' _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' ;; cxx*) # Compaq C++ _LT_TAGVAR(archive_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib ${wl}-retain-symbols-file $wl$export_symbols' runpath_var=LD_RUN_PATH _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir' _LT_TAGVAR(hardcode_libdir_separator, $1)=: # Commands to make compiler produce verbose output that lists # what "hidden" libraries, object files and flags are used when # linking a shared library. # # There doesn't appear to be a way to prevent this compiler from # explicitly linking system object files so we need to strip them # from the output so that they don't get included in the library # dependencies. output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "ld"`; templist=`func_echo_all "$templist" | $SED "s/\(^.*ld.*\)\( .*ld .*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "X$list" | $Xsed' ;; xl* | mpixl* | bgxl*) # IBM XL 8.0 on PPC, with GNU ld _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir' _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic' _LT_TAGVAR(archive_cmds, $1)='$CC -qmkshrobj $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib' if test "x$supports_anon_versioning" = xyes; then _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $output_objdir/$libname.ver~ cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~ echo "local: *; };" >> $output_objdir/$libname.ver~ $CC -qmkshrobj $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-version-script ${wl}$output_objdir/$libname.ver -o $lib' fi ;; *) case `$CC -V 2>&1 | sed 5q` in *Sun\ C*) # Sun C++ 5.9 _LT_TAGVAR(no_undefined_flag, $1)=' -zdefs' _LT_TAGVAR(archive_cmds, $1)='$CC -G${allow_undefined_flag} -h$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags' _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -G${allow_undefined_flag} -h$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-retain-symbols-file ${wl}$export_symbols' _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir' _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive' _LT_TAGVAR(compiler_needs_object, $1)=yes # Not sure whether something based on # $CC $CFLAGS -v conftest.$objext -o libconftest$shared_ext 2>&1 # would be better. output_verbose_link_cmd='func_echo_all' # Archives containing C++ object files must be created using # "CC -xar", where "CC" is the Sun C++ compiler. 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*) _LT_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*' _LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' _LT_TAGVAR(archive_expsym_cmds, $1)='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done~ echo "-hidden">> $lib.exp~ $CC -shared$allow_undefined_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -msym -soname $soname ${wl}-input ${wl}$lib.exp `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~ $RM $lib.exp' _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir' ;; esac _LT_TAGVAR(hardcode_libdir_separator, $1)=: # Commands to make compiler produce verbose output that lists # what "hidden" libraries, object files and flags are used when # linking a shared library. # # There doesn't appear to be a way to prevent this compiler from # explicitly linking system object files so we need to strip them # from the output so that they don't get included in the library # dependencies. output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "ld" | $GREP -v "ld:"`; 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|| _lt_function_replace_fail=: else # Save a `func_append' function call even when '+=' is not available sed -e 's%func_append \([[a-zA-Z_]]\{1,\}\) "%\1="$\1%g' $cfgfile > $cfgfile.tmp \ && mv -f "$cfgfile.tmp" "$cfgfile" \ || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp") test 0 -eq $? || _lt_function_replace_fail=: fi if test x"$_lt_function_replace_fail" = x":"; then AC_MSG_WARN([Unable to substitute extended shell functions in $ofile]) fi ]) # _LT_PATH_CONVERSION_FUNCTIONS # ----------------------------- # Determine which file name conversion functions should be used by # func_to_host_file (and, implicitly, by func_to_host_path). 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See the # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program. If not, see . # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that program. # This file is maintained in Automake, please report # bugs to or send patches to # . nl=' ' # We need space, tab and new line, in precisely that order. Quoting is # there to prevent tools from complaining about whitespace usage. IFS=" "" $nl" file_conv= # func_file_conv build_file lazy # Convert a $build file to $host form and store it in $file # Currently only supports Windows hosts. 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EOF exit $? ;; -v | --v*) echo "compile $scriptversion" exit $? ;; cl | *[/\\]cl | cl.exe | *[/\\]cl.exe ) func_cl_wrapper "$@" # Doesn't return... ;; esac ofile= cfile= for arg do if test -n "$eat"; then eat= else case $1 in -o) # configure might choose to run compile as 'compile cc -o foo foo.c'. # So we strip '-o arg' only if arg is an object. eat=1 case $2 in *.o | *.obj) ofile=$2 ;; *) set x "$@" -o "$2" shift ;; esac ;; *.c) cfile=$1 set x "$@" "$1" shift ;; *) set x "$@" "$1" shift ;; esac fi shift done if test -z "$ofile" || test -z "$cfile"; then # If no '-o' option was seen then we might have been invoked from a # pattern rule where we don't need one. That is ok -- this is a # normal compilation that the losing compiler can handle. If no # '.c' file was seen then we are probably linking. That is also # ok. exec "$@" fi # Name of file we expect compiler to create. cofile=`echo "$cfile" | sed 's|^.*[\\/]||; s|^[a-zA-Z]:||; s/\.c$/.o/'` # Create the lock directory. # Note: use '[/\\:.-]' here to ensure that we don't use the same name # that we are using for the .o file. Also, base the name on the expected # object file name, since that is what matters with a parallel build. lockdir=`echo "$cofile" | sed -e 's|[/\\:.-]|_|g'`.d while true; do if mkdir "$lockdir" >/dev/null 2>&1; then break fi sleep 1 done # FIXME: race condition here if user kills between mkdir and trap. trap "rmdir '$lockdir'; exit 1" 1 2 15 # Run the compile. "$@" ret=$? if test -f "$cofile"; then test "$cofile" = "$ofile" || mv "$cofile" "$ofile" elif test -f "${cofile}bj"; then test "${cofile}bj" = "$ofile" || mv "${cofile}bj" "$ofile" fi rmdir "$lockdir" exit $ret # Local Variables: # mode: shell-script # sh-indentation: 2 # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: xf86-video-intel-2.99.917/AUTHORS0000664000175000017500000000233112400044327012772 00000000000000Authors of xf86-video-intel (since 2003-11-14 when revision-control history begins, sorted roughly by number of commits, descending): Eric Anholt Keith Packard Zhenyu Wang Jesse Barnes Alan Hourihane Carl Worth Dave Airlie Michel Dänzer Zou Nan Hai Kristian Høgsberg Adam Jackson Nian Wu Xian, Haihao Egbert Eich Kevin E Martin Alan Coopersmith Hong Liu Julien Cristau Ma Ling Bryce Harrington Daniel Stone Robert Lowery Kaleb Keithley Paulo Cesar Pereira de Andrade Eamon Walsh Matthieu Herrb Owain G. Ainsworth Søren Sandmann Pedersen Brice Goglin Ian Romanick Lukáš Hejtmánek Matthias Hopf Olivier Fourdan Robert Noland Rémi Cardona Shuang He Wu Fengguang and many others (with 1 or 2 commits) Other authors (from before revision-control history begins): Keith Whitwell Jonathan Bian Matthew J Sottek Jeff Hartmann Mark Vojkovich H. J. Lu David Dawes If the above list is missing anyone, please accept our apologies and let us know. The X.Org version of this driver is maintained by Intel Corporation: https://01.org/linuxgraphics/ The X11R6 version of this driver originally came from XFree86 4.4 rc2. The XFree86 version of this driver was donated to The XFree86 Project by Precision Insight, Inc.; Cedar Park, TX; USA xf86-video-intel-2.99.917/INSTALL0000644000175000017500000002622212445556130012767 00000000000000Installation Instructions ************************* Copyright (C) 1994, 1995, 1996, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc. This file is free documentation; the Free Software Foundation gives unlimited permission to copy, distribute and modify it. Basic Installation ================== Briefly, the shell commands `./configure; make; make install' should configure, build, and install this package. The following more-detailed instructions are generic; see the `README' file for instructions specific to this package. The `configure' shell script attempts to guess correct values for various system-dependent variables used during compilation. It uses those values to create a `Makefile' in each directory of the package. It may also create one or more `.h' files containing system-dependent definitions. Finally, it creates a shell script `config.status' that you can run in the future to recreate the current configuration, and a file `config.log' containing compiler output (useful mainly for debugging `configure'). It can also use an optional file (typically called `config.cache' and enabled with `--cache-file=config.cache' or simply `-C') that saves the results of its tests to speed up reconfiguring. Caching is disabled by default to prevent problems with accidental use of stale cache files. If you need to do unusual things to compile the package, please try to figure out how `configure' could check whether to do them, and mail diffs or instructions to the address given in the `README' so they can be considered for the next release. If you are using the cache, and at some point `config.cache' contains results you don't want to keep, you may remove or edit it. The file `configure.ac' (or `configure.in') is used to create `configure' by a program called `autoconf'. You need `configure.ac' if you want to change it or regenerate `configure' using a newer version of `autoconf'. The simplest way to compile this package is: 1. `cd' to the directory containing the package's source code and type `./configure' to configure the package for your system. Running `configure' might take a while. While running, it prints some messages telling which features it is checking for. 2. Type `make' to compile the package. 3. Optionally, type `make check' to run any self-tests that come with the package. 4. Type `make install' to install the programs and any data files and documentation. 5. You can remove the program binaries and object files from the source code directory by typing `make clean'. To also remove the files that `configure' created (so you can compile the package for a different kind of computer), type `make distclean'. There is also a `make maintainer-clean' target, but that is intended mainly for the package's developers. If you use it, you may have to get all sorts of other programs in order to regenerate files that came with the distribution. 6. Often, you can also type `make uninstall' to remove the installed files again. Compilers and Options ===================== Some systems require unusual options for compilation or linking that the `configure' script does not know about. Run `./configure --help' for details on some of the pertinent environment variables. You can give `configure' initial values for configuration parameters by setting variables in the command line or in the environment. Here is an example: ./configure CC=c99 CFLAGS=-g LIBS=-lposix *Note Defining Variables::, for more details. Compiling For Multiple Architectures ==================================== You can compile the package for more than one kind of computer at the same time, by placing the object files for each architecture in their own directory. To do this, you can use GNU `make'. `cd' to the directory where you want the object files and executables to go and run the `configure' script. `configure' automatically checks for the source code in the directory that `configure' is in and in `..'. With a non-GNU `make', it is safer to compile the package for one architecture at a time in the source code directory. After you have installed the package for one architecture, use `make distclean' before reconfiguring for another architecture. On MacOS X 10.5 and later systems, you can create libraries and executables that work on multiple system types--known as "fat" or "universal" binaries--by specifying multiple `-arch' options to the compiler but only a single `-arch' option to the preprocessor. Like this: ./configure CC="gcc -arch i386 -arch x86_64 -arch ppc -arch ppc64" \ CXX="g++ -arch i386 -arch x86_64 -arch ppc -arch ppc64" \ CPP="gcc -E" CXXCPP="g++ -E" This is not guaranteed to produce working output in all cases, you may have to build one architecture at a time and combine the results using the `lipo' tool if you have problems. Installation Names ================== By default, `make install' installs the package's commands under `/usr/local/bin', include files under `/usr/local/include', etc. You can specify an installation prefix other than `/usr/local' by giving `configure' the option `--prefix=PREFIX'. You can specify separate installation prefixes for architecture-specific files and architecture-independent files. If you pass the option `--exec-prefix=PREFIX' to `configure', the package uses PREFIX as the prefix for installing programs and libraries. Documentation and other data files still use the regular prefix. In addition, if you use an unusual directory layout you can give options like `--bindir=DIR' to specify different values for particular kinds of files. Run `configure --help' for a list of the directories you can set and what kinds of files go in them. If the package supports it, you can cause programs to be installed with an extra prefix or suffix on their names by giving `configure' the option `--program-prefix=PREFIX' or `--program-suffix=SUFFIX'. Optional Features ================= Some packages pay attention to `--enable-FEATURE' options to `configure', where FEATURE indicates an optional part of the package. They may also pay attention to `--with-PACKAGE' options, where PACKAGE is something like `gnu-as' or `x' (for the X Window System). The `README' should mention any `--enable-' and `--with-' options that the package recognizes. For packages that use the X Window System, `configure' can usually find the X include and library files automatically, but if it doesn't, you can use the `configure' options `--x-includes=DIR' and `--x-libraries=DIR' to specify their locations. Particular systems ================== On HP-UX, the default C compiler is not ANSI C compatible. If GNU CC is not installed, it is recommended to use the following options in order to use an ANSI C compiler: ./configure CC="cc -Ae" and if that doesn't work, install pre-built binaries of GCC for HP-UX. On OSF/1 a.k.a. Tru64, some versions of the default C compiler cannot parse its `' header file. The option `-nodtk' can be used as a workaround. If GNU CC is not installed, it is therefore recommended to try ./configure CC="cc" and if that doesn't work, try ./configure CC="cc -nodtk" Specifying the System Type ========================== There may be some features `configure' cannot figure out automatically, but needs to determine by the type of machine the package will run on. Usually, assuming the package is built to be run on the _same_ architectures, `configure' can figure that out, but if it prints a message saying it cannot guess the machine type, give it the `--build=TYPE' option. TYPE can either be a short name for the system type, such as `sun4', or a canonical name which has the form: CPU-COMPANY-SYSTEM where SYSTEM can have one of these forms: OS KERNEL-OS See the file `config.sub' for the possible values of each field. If `config.sub' isn't included in this package, then this package doesn't need to know the machine type. If you are _building_ compiler tools for cross-compiling, you should use the option `--target=TYPE' to select the type of system they will produce code for. If you want to _use_ a cross compiler, that generates code for a platform different from the build platform, you should specify the "host" platform (i.e., that on which the generated programs will eventually be run) with `--host=TYPE'. Sharing Defaults ================ If you want to set default values for `configure' scripts to share, you can create a site shell script called `config.site' that gives default values for variables like `CC', `cache_file', and `prefix'. `configure' looks for `PREFIX/share/config.site' if it exists, then `PREFIX/etc/config.site' if it exists. Or, you can set the `CONFIG_SITE' environment variable to the location of the site script. A warning: not all `configure' scripts look for a site script. Defining Variables ================== Variables not defined in a site shell script can be set in the environment passed to `configure'. However, some packages may run configure again during the build, and the customized values of these variables may be lost. In order to avoid this problem, you should set them in the `configure' command line, using `VAR=value'. For example: ./configure CC=/usr/local2/bin/gcc causes the specified `gcc' to be used as the C compiler (unless it is overridden in the site shell script). Unfortunately, this technique does not work for `CONFIG_SHELL' due to an Autoconf bug. Until the bug is fixed you can use this workaround: CONFIG_SHELL=/bin/bash /bin/bash ./configure CONFIG_SHELL=/bin/bash `configure' Invocation ====================== `configure' recognizes the following options to control how it operates. `--help' `-h' Print a summary of all of the options to `configure', and exit. `--help=short' `--help=recursive' Print a summary of the options unique to this package's `configure', and exit. The `short' variant lists options used only in the top level, while the `recursive' variant lists options also present in any nested packages. `--version' `-V' Print the version of Autoconf used to generate the `configure' script, and exit. `--cache-file=FILE' Enable the cache: use and save the results of the tests in FILE, traditionally `config.cache'. FILE defaults to `/dev/null' to disable caching. `--config-cache' `-C' Alias for `--cache-file=config.cache'. `--quiet' `--silent' `-q' Do not print messages saying which checks are being made. To suppress all normal output, redirect it to `/dev/null' (any error messages will still be shown). `--srcdir=DIR' Look for the package's source code in directory DIR. Usually `configure' can determine that directory automatically. `--prefix=DIR' Use DIR as the installation prefix. *Note Installation Names:: for more details, including other options available for fine-tuning the installation locations. `--no-create' `-n' Run the configure checks, but stop before creating any output files. `configure' also accepts some other, not widely useful, options. Run `configure --help' for more details. xf86-video-intel-2.99.917/configure0000775000175000017500000254624312445556120013662 00000000000000#! /bin/sh # Guess values for system-dependent variables and create Makefiles. # Generated by GNU Autoconf 2.69 for xf86-video-intel 2.99.917. # # Report bugs to . # # # Copyright (C) 1992-1996, 1998-2012 Free Software Foundation, Inc. # # # This configure script is free software; the Free Software Foundation # gives unlimited permission to copy, distribute and modify it. ## -------------------- ## ## M4sh Initialization. ## ## -------------------- ## # Be more Bourne compatible DUALCASE=1; export DUALCASE # for MKS sh if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then : emulate sh NULLCMD=: # Pre-4.2 versions of Zsh do word splitting on ${1+"$@"}, which # is contrary to our usage. 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Even if it were fixed, the result of this # check would be larger than it should be. lt_cv_sys_max_cmd_len=12288; # 12K is about right ;; gnu*) # Under GNU Hurd, this test is not required because there is # no limit to the length of command line arguments. # Libtool will interpret -1 as no limit whatsoever lt_cv_sys_max_cmd_len=-1; ;; cygwin* | mingw* | cegcc*) # On Win9x/ME, this test blows up -- it succeeds, but takes # about 5 minutes as the teststring grows exponentially. # Worse, since 9x/ME are not pre-emptively multitasking, # you end up with a "frozen" computer, even though with patience # the test eventually succeeds (with a max line length of 256k). # Instead, let's just punt: use the minimum linelength reported by # all of the supported platforms: 8192 (on NT/2K/XP). lt_cv_sys_max_cmd_len=8192; ;; mint*) # On MiNT this can take a long time and run out of memory. lt_cv_sys_max_cmd_len=8192; ;; amigaos*) # On AmigaOS with pdksh, this test takes hours, literally. # So we just punt and use a minimum line length of 8192. lt_cv_sys_max_cmd_len=8192; ;; netbsd* | freebsd* | openbsd* | darwin* | dragonfly*) # This has been around since 386BSD, at least. Likely further. if test -x /sbin/sysctl; then lt_cv_sys_max_cmd_len=`/sbin/sysctl -n kern.argmax` elif test -x /usr/sbin/sysctl; then lt_cv_sys_max_cmd_len=`/usr/sbin/sysctl -n kern.argmax` else lt_cv_sys_max_cmd_len=65536 # usable default for all BSDs fi # And add a safety zone lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` ;; interix*) # We know the value 262144 and hardcode it with a safety zone (like BSD) lt_cv_sys_max_cmd_len=196608 ;; os2*) # The test takes a long time on OS/2. lt_cv_sys_max_cmd_len=8192 ;; osf*) # Dr. Hans Ekkehard Plesser reports seeing a kernel panic running configure # due to this test when exec_disable_arg_limit is 1 on Tru64. It is not # nice to cause kernel panics so lets avoid the loop below. # First set a reasonable default. lt_cv_sys_max_cmd_len=16384 # if test -x /sbin/sysconfig; then case `/sbin/sysconfig -q proc exec_disable_arg_limit` in *1*) lt_cv_sys_max_cmd_len=-1 ;; esac fi ;; sco3.2v5*) lt_cv_sys_max_cmd_len=102400 ;; sysv5* | sco5v6* | sysv4.2uw2*) kargmax=`grep ARG_MAX /etc/conf/cf.d/stune 2>/dev/null` if test -n "$kargmax"; then lt_cv_sys_max_cmd_len=`echo $kargmax | sed 's/.*[ ]//'` else lt_cv_sys_max_cmd_len=32768 fi ;; *) lt_cv_sys_max_cmd_len=`(getconf ARG_MAX) 2> /dev/null` if test -n "$lt_cv_sys_max_cmd_len" && \ test undefined != "$lt_cv_sys_max_cmd_len"; then lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 4` lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \* 3` else # Make teststring a little bigger before we do anything with it. # a 1K string should be a reasonable start. for i in 1 2 3 4 5 6 7 8 ; do teststring=$teststring$teststring done SHELL=${SHELL-${CONFIG_SHELL-/bin/sh}} # If test is not a shell built-in, we'll probably end up computing a # maximum length that is only half of the actual maximum length, but # we can't tell. while { test "X"`env echo "$teststring$teststring" 2>/dev/null` \ = "X$teststring$teststring"; } >/dev/null 2>&1 && test $i != 17 # 1/2 MB should be enough do i=`expr $i + 1` teststring=$teststring$teststring done # Only check the string length outside the loop. lt_cv_sys_max_cmd_len=`expr "X$teststring" : ".*" 2>&1` teststring= # Add a significant safety factor because C++ compilers can tack on # massive amounts of additional arguments before passing them to the # linker. It appears as though 1/2 is a usable value. lt_cv_sys_max_cmd_len=`expr $lt_cv_sys_max_cmd_len \/ 2` fi ;; esac fi if test -n $lt_cv_sys_max_cmd_len ; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sys_max_cmd_len" >&5 $as_echo "$lt_cv_sys_max_cmd_len" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: none" >&5 $as_echo "none" >&6; } fi max_cmd_len=$lt_cv_sys_max_cmd_len : ${CP="cp -f"} : ${MV="mv -f"} : ${RM="rm -f"} { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the shell understands some XSI constructs" >&5 $as_echo_n "checking whether the shell understands some XSI constructs... " >&6; } # Try some XSI features xsi_shell=no ( _lt_dummy="a/b/c" test "${_lt_dummy##*/},${_lt_dummy%/*},${_lt_dummy#??}"${_lt_dummy%"$_lt_dummy"}, \ = c,a/b,b/c, \ && eval 'test $(( 1 + 1 )) -eq 2 \ && test "${#_lt_dummy}" -eq 5' ) >/dev/null 2>&1 \ && xsi_shell=yes { $as_echo "$as_me:${as_lineno-$LINENO}: result: $xsi_shell" >&5 $as_echo "$xsi_shell" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the shell understands \"+=\"" >&5 $as_echo_n "checking whether the shell understands \"+=\"... " >&6; } lt_shell_append=no ( foo=bar; set foo baz; eval "$1+=\$2" && test "$foo" = barbaz ) \ >/dev/null 2>&1 \ && lt_shell_append=yes { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_shell_append" >&5 $as_echo "$lt_shell_append" >&6; } if ( (MAIL=60; unset MAIL) || exit) >/dev/null 2>&1; then lt_unset=unset else lt_unset=false fi # test EBCDIC or ASCII case `echo X|tr X '\101'` in A) # ASCII based system # \n is not interpreted correctly by Solaris 8 /usr/ucb/tr lt_SP2NL='tr \040 \012' lt_NL2SP='tr \015\012 \040\040' ;; *) # EBCDIC based system lt_SP2NL='tr \100 \n' lt_NL2SP='tr \r\n \100\100' ;; esac { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to $host format" >&5 $as_echo_n "checking how to convert $build file names to $host format... " >&6; } if ${lt_cv_to_host_file_cmd+:} false; then : $as_echo_n "(cached) " >&6 else case $host in *-*-mingw* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32 ;; *-*-cygwin* ) lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32 ;; * ) # otherwise, assume *nix lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32 ;; esac ;; *-*-cygwin* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin ;; *-*-cygwin* ) lt_cv_to_host_file_cmd=func_convert_file_noop ;; * ) # otherwise, assume *nix lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin ;; esac ;; * ) # unhandled hosts (and "normal" native builds) lt_cv_to_host_file_cmd=func_convert_file_noop ;; esac fi to_host_file_cmd=$lt_cv_to_host_file_cmd { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_host_file_cmd" >&5 $as_echo "$lt_cv_to_host_file_cmd" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to toolchain format" >&5 $as_echo_n "checking how to convert $build file names to toolchain format... " >&6; } if ${lt_cv_to_tool_file_cmd+:} false; then : $as_echo_n "(cached) " >&6 else #assume ordinary cross tools, or native build. lt_cv_to_tool_file_cmd=func_convert_file_noop case $host in *-*-mingw* ) case $build in *-*-mingw* ) # actually msys lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32 ;; esac ;; esac fi to_tool_file_cmd=$lt_cv_to_tool_file_cmd { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_tool_file_cmd" >&5 $as_echo "$lt_cv_to_tool_file_cmd" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $LD option to reload object files" >&5 $as_echo_n "checking for $LD option to reload object files... " >&6; } if ${lt_cv_ld_reload_flag+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ld_reload_flag='-r' fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_reload_flag" >&5 $as_echo "$lt_cv_ld_reload_flag" >&6; } reload_flag=$lt_cv_ld_reload_flag case $reload_flag in "" | " "*) ;; *) reload_flag=" $reload_flag" ;; esac reload_cmds='$LD$reload_flag -o $output$reload_objs' case $host_os in cygwin* | mingw* | pw32* | cegcc*) if test "$GCC" != yes; then reload_cmds=false fi ;; darwin*) if test "$GCC" = yes; then reload_cmds='$LTCC $LTCFLAGS -nostdlib ${wl}-r -o $output$reload_objs' else reload_cmds='$LD$reload_flag -o $output$reload_objs' fi ;; esac if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}objdump", so it can be a program name with args. set dummy ${ac_tool_prefix}objdump; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OBJDUMP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OBJDUMP"; then ac_cv_prog_OBJDUMP="$OBJDUMP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OBJDUMP="${ac_tool_prefix}objdump" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OBJDUMP=$ac_cv_prog_OBJDUMP if test -n "$OBJDUMP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OBJDUMP" >&5 $as_echo "$OBJDUMP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OBJDUMP"; then ac_ct_OBJDUMP=$OBJDUMP # Extract the first word of "objdump", so it can be a program name with args. set dummy objdump; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OBJDUMP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OBJDUMP"; then ac_cv_prog_ac_ct_OBJDUMP="$ac_ct_OBJDUMP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OBJDUMP="objdump" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OBJDUMP=$ac_cv_prog_ac_ct_OBJDUMP if test -n "$ac_ct_OBJDUMP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OBJDUMP" >&5 $as_echo "$ac_ct_OBJDUMP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OBJDUMP" = x; then OBJDUMP="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OBJDUMP=$ac_ct_OBJDUMP fi else OBJDUMP="$ac_cv_prog_OBJDUMP" fi test -z "$OBJDUMP" && OBJDUMP=objdump { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to recognize dependent libraries" >&5 $as_echo_n "checking how to recognize dependent libraries... " >&6; } if ${lt_cv_deplibs_check_method+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_file_magic_cmd='$MAGIC_CMD' lt_cv_file_magic_test_file= lt_cv_deplibs_check_method='unknown' # Need to set the preceding variable on all platforms that support # interlibrary dependencies. # 'none' -- dependencies not supported. # `unknown' -- same as none, but documents that we really don't know. # 'pass_all' -- all dependencies passed with no checks. # 'test_compile' -- check by making test program. # 'file_magic [[regex]]' -- check by looking for files in library path # which responds to the $file_magic_cmd with a given extended regex. # If you have `file' or equivalent on your system and you're not sure # whether `pass_all' will *always* work, you probably want this one. case $host_os in aix[4-9]*) lt_cv_deplibs_check_method=pass_all ;; beos*) lt_cv_deplibs_check_method=pass_all ;; bsdi[45]*) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib)' lt_cv_file_magic_cmd='/usr/bin/file -L' lt_cv_file_magic_test_file=/shlib/libc.so ;; cygwin*) # func_win32_libid is a shell function defined in ltmain.sh lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL' lt_cv_file_magic_cmd='func_win32_libid' ;; mingw* | pw32*) # Base MSYS/MinGW do not provide the 'file' command needed by # func_win32_libid shell function, so use a weaker test based on 'objdump', # unless we find 'file', for example because we are cross-compiling. # func_win32_libid assumes BSD nm, so disallow it if using MS dumpbin. if ( test "$lt_cv_nm_interface" = "BSD nm" && file / ) >/dev/null 2>&1; then lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL' lt_cv_file_magic_cmd='func_win32_libid' else # Keep this pattern in sync with the one in func_win32_libid. lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)' lt_cv_file_magic_cmd='$OBJDUMP -f' fi ;; cegcc*) # use the weaker test based on 'objdump'. See mingw*. lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?' lt_cv_file_magic_cmd='$OBJDUMP -f' ;; darwin* | rhapsody*) lt_cv_deplibs_check_method=pass_all ;; freebsd* | dragonfly*) if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then case $host_cpu in i*86 ) # Not sure whether the presence of OpenBSD here was a mistake. # Let's accept both of them until this is cleared up. lt_cv_deplibs_check_method='file_magic (FreeBSD|OpenBSD|DragonFly)/i[3-9]86 (compact )?demand paged shared library' lt_cv_file_magic_cmd=/usr/bin/file lt_cv_file_magic_test_file=`echo /usr/lib/libc.so.*` ;; esac else lt_cv_deplibs_check_method=pass_all fi ;; haiku*) lt_cv_deplibs_check_method=pass_all ;; hpux10.20* | hpux11*) lt_cv_file_magic_cmd=/usr/bin/file case $host_cpu in ia64*) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - IA64' lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so ;; hppa*64*) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]' lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl ;; *) lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9]\.[0-9]) shared library' lt_cv_file_magic_test_file=/usr/lib/libc.sl ;; esac ;; interix[3-9]*) # PIC code is broken on Interix 3.x, that's why |\.a not |_pic\.a here lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so|\.a)$' ;; irix5* | irix6* | nonstopux*) case $LD in *-32|*"-32 ") libmagic=32-bit;; *-n32|*"-n32 ") libmagic=N32;; *-64|*"-64 ") libmagic=64-bit;; *) libmagic=never-match;; esac lt_cv_deplibs_check_method=pass_all ;; # This must be glibc/ELF. linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) lt_cv_deplibs_check_method=pass_all ;; netbsd* | netbsdelf*-gnu) if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so|_pic\.a)$' fi ;; newos6*) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (executable|dynamic lib)' lt_cv_file_magic_cmd=/usr/bin/file lt_cv_file_magic_test_file=/usr/lib/libnls.so ;; *nto* | *qnx*) lt_cv_deplibs_check_method=pass_all ;; openbsd*) if test -z "`echo __ELF__ | $CC -E - | $GREP __ELF__`" || test "$host_os-$host_cpu" = "openbsd2.8-powerpc"; then lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|\.so|_pic\.a)$' else lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$' fi ;; osf3* | osf4* | osf5*) lt_cv_deplibs_check_method=pass_all ;; rdos*) lt_cv_deplibs_check_method=pass_all ;; solaris*) lt_cv_deplibs_check_method=pass_all ;; sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) lt_cv_deplibs_check_method=pass_all ;; sysv4 | sysv4.3*) case $host_vendor in motorola) lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [ML]SB (shared object|dynamic lib) M[0-9][0-9]* Version [0-9]' lt_cv_file_magic_test_file=`echo /usr/lib/libc.so*` ;; ncr) lt_cv_deplibs_check_method=pass_all ;; sequent) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method='file_magic ELF [0-9][0-9]*-bit [LM]SB (shared object|dynamic lib )' ;; sni) lt_cv_file_magic_cmd='/bin/file' lt_cv_deplibs_check_method="file_magic ELF [0-9][0-9]*-bit [LM]SB dynamic lib" lt_cv_file_magic_test_file=/lib/libc.so ;; siemens) lt_cv_deplibs_check_method=pass_all ;; pc) lt_cv_deplibs_check_method=pass_all ;; esac ;; tpf*) lt_cv_deplibs_check_method=pass_all ;; esac fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_deplibs_check_method" >&5 $as_echo "$lt_cv_deplibs_check_method" >&6; } file_magic_glob= want_nocaseglob=no if test "$build" = "$host"; then case $host_os in mingw* | pw32*) if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then want_nocaseglob=yes else file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[\1]\/[\1]\/g;/g"` fi ;; esac fi file_magic_cmd=$lt_cv_file_magic_cmd deplibs_check_method=$lt_cv_deplibs_check_method test -z "$deplibs_check_method" && deplibs_check_method=unknown if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args. set dummy ${ac_tool_prefix}dlltool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_DLLTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$DLLTOOL"; then ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi DLLTOOL=$ac_cv_prog_DLLTOOL if test -n "$DLLTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DLLTOOL" >&5 $as_echo "$DLLTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_DLLTOOL"; then ac_ct_DLLTOOL=$DLLTOOL # Extract the first word of "dlltool", so it can be a program name with args. set dummy dlltool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_DLLTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_DLLTOOL"; then ac_cv_prog_ac_ct_DLLTOOL="$ac_ct_DLLTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_DLLTOOL="dlltool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_DLLTOOL=$ac_cv_prog_ac_ct_DLLTOOL if test -n "$ac_ct_DLLTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DLLTOOL" >&5 $as_echo "$ac_ct_DLLTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_DLLTOOL" = x; then DLLTOOL="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac DLLTOOL=$ac_ct_DLLTOOL fi else DLLTOOL="$ac_cv_prog_DLLTOOL" fi test -z "$DLLTOOL" && DLLTOOL=dlltool { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to associate runtime and link libraries" >&5 $as_echo_n "checking how to associate runtime and link libraries... " >&6; } if ${lt_cv_sharedlib_from_linklib_cmd+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_sharedlib_from_linklib_cmd='unknown' case $host_os in cygwin* | mingw* | pw32* | cegcc*) # two different shell functions defined in ltmain.sh # decide which to use based on capabilities of $DLLTOOL case `$DLLTOOL --help 2>&1` in *--identify-strict*) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib ;; *) lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback ;; esac ;; *) # fallback: assume linklib IS sharedlib lt_cv_sharedlib_from_linklib_cmd="$ECHO" ;; esac fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sharedlib_from_linklib_cmd" >&5 $as_echo "$lt_cv_sharedlib_from_linklib_cmd" >&6; } sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO if test -n "$ac_tool_prefix"; then for ac_prog in ar do # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args. set dummy $ac_tool_prefix$ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_AR+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$AR"; then ac_cv_prog_AR="$AR" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_AR="$ac_tool_prefix$ac_prog" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi AR=$ac_cv_prog_AR if test -n "$AR"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5 $as_echo "$AR" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$AR" && break done fi if test -z "$AR"; then ac_ct_AR=$AR for ac_prog in ar do # Extract the first word of "$ac_prog", so it can be a program name with args. set dummy $ac_prog; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_AR+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_AR"; then ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_AR="$ac_prog" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_AR=$ac_cv_prog_ac_ct_AR if test -n "$ac_ct_AR"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5 $as_echo "$ac_ct_AR" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi test -n "$ac_ct_AR" && break done if test "x$ac_ct_AR" = x; then AR="false" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac AR=$ac_ct_AR fi fi : ${AR=ar} : ${AR_FLAGS=cru} { $as_echo "$as_me:${as_lineno-$LINENO}: checking for archiver @FILE support" >&5 $as_echo_n "checking for archiver @FILE support... " >&6; } if ${lt_cv_ar_at_file+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ar_at_file=no cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_compile "$LINENO"; then : echo conftest.$ac_objext > conftest.lst lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&5' { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5 (eval $lt_ar_try) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } if test "$ac_status" -eq 0; then # Ensure the archiver fails upon bogus file names. rm -f conftest.$ac_objext libconftest.a { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5 (eval $lt_ar_try) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } if test "$ac_status" -ne 0; then lt_cv_ar_at_file=@ fi fi rm -f conftest.* libconftest.a fi rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ar_at_file" >&5 $as_echo "$lt_cv_ar_at_file" >&6; } if test "x$lt_cv_ar_at_file" = xno; then archiver_list_spec= else archiver_list_spec=$lt_cv_ar_at_file fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. set dummy ${ac_tool_prefix}strip; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_STRIP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$STRIP"; then ac_cv_prog_STRIP="$STRIP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_STRIP="${ac_tool_prefix}strip" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi STRIP=$ac_cv_prog_STRIP if test -n "$STRIP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5 $as_echo "$STRIP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_STRIP"; then ac_ct_STRIP=$STRIP # Extract the first word of "strip", so it can be a program name with args. set dummy strip; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_STRIP+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_STRIP"; then ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_STRIP="strip" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP if test -n "$ac_ct_STRIP"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5 $as_echo "$ac_ct_STRIP" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_STRIP" = x; then STRIP=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac STRIP=$ac_ct_STRIP fi else STRIP="$ac_cv_prog_STRIP" fi test -z "$STRIP" && STRIP=: if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_RANLIB+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$RANLIB"; then ac_cv_prog_RANLIB="$RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_RANLIB="${ac_tool_prefix}ranlib" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi RANLIB=$ac_cv_prog_RANLIB if test -n "$RANLIB"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $RANLIB" >&5 $as_echo "$RANLIB" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_RANLIB"; then ac_ct_RANLIB=$RANLIB # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_RANLIB+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_RANLIB"; then ac_cv_prog_ac_ct_RANLIB="$ac_ct_RANLIB" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_RANLIB="ranlib" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_RANLIB=$ac_cv_prog_ac_ct_RANLIB if test -n "$ac_ct_RANLIB"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_RANLIB" >&5 $as_echo "$ac_ct_RANLIB" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_RANLIB" = x; then RANLIB=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac RANLIB=$ac_ct_RANLIB fi else RANLIB="$ac_cv_prog_RANLIB" fi test -z "$RANLIB" && RANLIB=: # Determine commands to create old-style static archives. old_archive_cmds='$AR $AR_FLAGS $oldlib$oldobjs' old_postinstall_cmds='chmod 644 $oldlib' old_postuninstall_cmds= if test -n "$RANLIB"; then case $host_os in openbsd*) old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB -t \$tool_oldlib" ;; *) old_postinstall_cmds="$old_postinstall_cmds~\$RANLIB \$tool_oldlib" ;; esac old_archive_cmds="$old_archive_cmds~\$RANLIB \$tool_oldlib" fi case $host_os in darwin*) lock_old_archive_extraction=yes ;; *) lock_old_archive_extraction=no ;; esac # If no C compiler was specified, use CC. LTCC=${LTCC-"$CC"} # If no C compiler flags were specified, use CFLAGS. LTCFLAGS=${LTCFLAGS-"$CFLAGS"} # Allow CC to be a program name with arguments. compiler=$CC # Check for command to grab the raw symbol name followed by C symbol from nm. { $as_echo "$as_me:${as_lineno-$LINENO}: checking command to parse $NM output from $compiler object" >&5 $as_echo_n "checking command to parse $NM output from $compiler object... " >&6; } if ${lt_cv_sys_global_symbol_pipe+:} false; then : $as_echo_n "(cached) " >&6 else # These are sane defaults that work on at least a few old systems. # [They come from Ultrix. What could be older than Ultrix?!! ;)] # Character class describing NM global symbol codes. symcode='[BCDEGRST]' # Regexp to match symbols that can be accessed directly from C. sympat='\([_A-Za-z][_A-Za-z0-9]*\)' # Define system-specific variables. case $host_os in aix*) symcode='[BCDT]' ;; cygwin* | mingw* | pw32* | cegcc*) symcode='[ABCDGISTW]' ;; hpux*) if test "$host_cpu" = ia64; then symcode='[ABCDEGRST]' fi ;; irix* | nonstopux*) symcode='[BCDEGRST]' ;; osf*) symcode='[BCDEGQRST]' ;; solaris*) symcode='[BDRT]' ;; sco3.2v5*) symcode='[DT]' ;; sysv4.2uw2*) symcode='[DT]' ;; sysv5* | sco5v6* | unixware* | OpenUNIX*) symcode='[ABDT]' ;; sysv4) symcode='[DFNSTU]' ;; esac # If we're using GNU nm, then use its standard symbol codes. case `$NM -V 2>&1` in *GNU* | *'with BFD'*) symcode='[ABCDGIRSTW]' ;; esac # Transform an extracted symbol line into a proper C declaration. # Some systems (esp. on ia64) link data and code symbols differently, # so use this general approach. lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'" # Transform an extracted symbol line into symbol name and symbol address lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\)[ ]*$/ {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/ {\"\2\", (void *) \&\2},/p'" lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\)[ ]*$/ {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/ {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/ {\"lib\2\", (void *) \&\2},/p'" # Handle CRLF in mingw tool chain opt_cr= case $build_os in mingw*) opt_cr=`$ECHO 'x\{0,1\}' | tr x '\015'` # option cr in regexp ;; esac # Try without a prefix underscore, then with it. for ac_symprfx in "" "_"; do # Transform symcode, sympat, and symprfx into a raw symbol and a C symbol. symxfrm="\\1 $ac_symprfx\\2 \\2" # Write the raw and C identifiers. if test "$lt_cv_nm_interface" = "MS dumpbin"; then # Fake it for dumpbin and say T for any non-static function # and D for any global variable. # Also find C++ and __fastcall symbols from MSVC++, # which start with @ or ?. lt_cv_sys_global_symbol_pipe="$AWK '"\ " {last_section=section; section=\$ 3};"\ " /^COFF SYMBOL TABLE/{for(i in hide) delete hide[i]};"\ " /Section length .*#relocs.*(pick any)/{hide[last_section]=1};"\ " \$ 0!~/External *\|/{next};"\ " / 0+ UNDEF /{next}; / UNDEF \([^|]\)*()/{next};"\ " {if(hide[section]) next};"\ " {f=0}; \$ 0~/\(\).*\|/{f=1}; {printf f ? \"T \" : \"D \"};"\ " {split(\$ 0, a, /\||\r/); split(a[2], s)};"\ " s[1]~/^[@?]/{print s[1], s[1]; next};"\ " s[1]~prfx {split(s[1],t,\"@\"); print t[1], substr(t[1],length(prfx))}"\ " ' prfx=^$ac_symprfx" else lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[ ]\($symcode$symcode*\)[ ][ ]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'" fi lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'" # Check to see that the pipe works correctly. pipe_works=no rm -f conftest* cat > conftest.$ac_ext <<_LT_EOF #ifdef __cplusplus extern "C" { #endif char nm_test_var; void nm_test_func(void); void nm_test_func(void){} #ifdef __cplusplus } #endif int main(){nm_test_var='a';nm_test_func();return(0);} _LT_EOF if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then # Now try to grab the symbols. nlist=conftest.nm if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist\""; } >&5 (eval $NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } && test -s "$nlist"; then # Try sorting and uniquifying the output. if sort "$nlist" | uniq > "$nlist"T; then mv -f "$nlist"T "$nlist" else rm -f "$nlist"T fi # Make sure that we snagged all the symbols we need. if $GREP ' nm_test_var$' "$nlist" >/dev/null; then if $GREP ' nm_test_func$' "$nlist" >/dev/null; then cat <<_LT_EOF > conftest.$ac_ext /* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ #if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE) /* DATA imports from DLLs on WIN32 con't be const, because runtime relocations are performed -- see ld's documentation on pseudo-relocs. */ # define LT_DLSYM_CONST #elif defined(__osf__) /* This system does not cope well with relocations in const data. */ # define LT_DLSYM_CONST #else # define LT_DLSYM_CONST const #endif #ifdef __cplusplus extern "C" { #endif _LT_EOF # Now generate the symbol file. eval "$lt_cv_sys_global_symbol_to_cdecl"' < "$nlist" | $GREP -v main >> conftest.$ac_ext' cat <<_LT_EOF >> conftest.$ac_ext /* The mapping between symbol names and symbols. */ LT_DLSYM_CONST struct { const char *name; void *address; } lt__PROGRAM__LTX_preloaded_symbols[] = { { "@PROGRAM@", (void *) 0 }, _LT_EOF $SED "s/^$symcode$symcode* \(.*\) \(.*\)$/ {\"\2\", (void *) \&\2},/" < "$nlist" | $GREP -v main >> conftest.$ac_ext cat <<\_LT_EOF >> conftest.$ac_ext {0, (void *) 0} }; /* This works around a problem in FreeBSD linker */ #ifdef FREEBSD_WORKAROUND static const void *lt_preloaded_setup() { return lt__PROGRAM__LTX_preloaded_symbols; } #endif #ifdef __cplusplus } #endif _LT_EOF # Now try linking the two files. mv conftest.$ac_objext conftstm.$ac_objext lt_globsym_save_LIBS=$LIBS lt_globsym_save_CFLAGS=$CFLAGS LIBS="conftstm.$ac_objext" CFLAGS="$CFLAGS$lt_prog_compiler_no_builtin_flag" if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5 (eval $ac_link) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } && test -s conftest${ac_exeext}; then pipe_works=yes fi LIBS=$lt_globsym_save_LIBS CFLAGS=$lt_globsym_save_CFLAGS else echo "cannot find nm_test_func in $nlist" >&5 fi else echo "cannot find nm_test_var in $nlist" >&5 fi else echo "cannot run $lt_cv_sys_global_symbol_pipe" >&5 fi else echo "$progname: failed program was:" >&5 cat conftest.$ac_ext >&5 fi rm -rf conftest* conftst* # Do not use the global_symbol_pipe unless it works. if test "$pipe_works" = yes; then break else lt_cv_sys_global_symbol_pipe= fi done fi if test -z "$lt_cv_sys_global_symbol_pipe"; then lt_cv_sys_global_symbol_to_cdecl= fi if test -z "$lt_cv_sys_global_symbol_pipe$lt_cv_sys_global_symbol_to_cdecl"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: failed" >&5 $as_echo "failed" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: ok" >&5 $as_echo "ok" >&6; } fi # Response file support. if test "$lt_cv_nm_interface" = "MS dumpbin"; then nm_file_list_spec='@' elif $NM --help 2>/dev/null | grep '[@]FILE' >/dev/null; then nm_file_list_spec='@' fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysroot" >&5 $as_echo_n "checking for sysroot... " >&6; } # Check whether --with-sysroot was given. if test "${with_sysroot+set}" = set; then : withval=$with_sysroot; else with_sysroot=no fi lt_sysroot= case ${with_sysroot} in #( yes) if test "$GCC" = yes; then lt_sysroot=`$CC --print-sysroot 2>/dev/null` fi ;; #( /*) lt_sysroot=`echo "$with_sysroot" | sed -e "$sed_quote_subst"` ;; #( no|'') ;; #( *) { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${with_sysroot}" >&5 $as_echo "${with_sysroot}" >&6; } as_fn_error $? "The sysroot must be an absolute path." "$LINENO" 5 ;; esac { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${lt_sysroot:-no}" >&5 $as_echo "${lt_sysroot:-no}" >&6; } # Check whether --enable-libtool-lock was given. if test "${enable_libtool_lock+set}" = set; then : enableval=$enable_libtool_lock; fi test "x$enable_libtool_lock" != xno && enable_libtool_lock=yes # Some flags need to be propagated to the compiler or linker for good # libtool support. case $host in ia64-*-hpux*) # Find out which ABI we are using. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.$ac_objext` in *ELF-32*) HPUX_IA64_MODE="32" ;; *ELF-64*) HPUX_IA64_MODE="64" ;; esac fi rm -rf conftest* ;; *-*-irix6*) # Find out which ABI we are using. echo '#line '$LINENO' "configure"' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then if test "$lt_cv_prog_gnu_ld" = yes; then case `/usr/bin/file conftest.$ac_objext` in *32-bit*) LD="${LD-ld} -melf32bsmip" ;; *N32*) LD="${LD-ld} -melf32bmipn32" ;; *64-bit*) LD="${LD-ld} -melf64bmip" ;; esac else case `/usr/bin/file conftest.$ac_objext` in *32-bit*) LD="${LD-ld} -32" ;; *N32*) LD="${LD-ld} -n32" ;; *64-bit*) LD="${LD-ld} -64" ;; esac fi fi rm -rf conftest* ;; x86_64-*kfreebsd*-gnu|x86_64-*linux*|powerpc*-*linux*| \ s390*-*linux*|s390*-*tpf*|sparc*-*linux*) # Find out which ABI we are using. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.o` in *32-bit*) case $host in x86_64-*kfreebsd*-gnu) LD="${LD-ld} -m elf_i386_fbsd" ;; x86_64-*linux*) case `/usr/bin/file conftest.o` in *x86-64*) LD="${LD-ld} -m elf32_x86_64" ;; *) LD="${LD-ld} -m elf_i386" ;; esac ;; powerpc64le-*) LD="${LD-ld} -m elf32lppclinux" ;; powerpc64-*) LD="${LD-ld} -m elf32ppclinux" ;; s390x-*linux*) LD="${LD-ld} -m elf_s390" ;; sparc64-*linux*) LD="${LD-ld} -m elf32_sparc" ;; esac ;; *64-bit*) case $host in x86_64-*kfreebsd*-gnu) LD="${LD-ld} -m elf_x86_64_fbsd" ;; x86_64-*linux*) LD="${LD-ld} -m elf_x86_64" ;; powerpcle-*) LD="${LD-ld} -m elf64lppc" ;; powerpc-*) LD="${LD-ld} -m elf64ppc" ;; s390*-*linux*|s390*-*tpf*) LD="${LD-ld} -m elf64_s390" ;; sparc*-*linux*) LD="${LD-ld} -m elf64_sparc" ;; esac ;; esac fi rm -rf conftest* ;; *-*-sco3.2v5*) # On SCO OpenServer 5, we need -belf to get full-featured binaries. SAVE_CFLAGS="$CFLAGS" CFLAGS="$CFLAGS -belf" { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the C compiler needs -belf" >&5 $as_echo_n "checking whether the C compiler needs -belf... " >&6; } if ${lt_cv_cc_needs_belf+:} false; then : $as_echo_n "(cached) " >&6 else ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_cv_cc_needs_belf=yes else lt_cv_cc_needs_belf=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext ac_ext=c ac_cpp='$CPP $CPPFLAGS' ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_cc_needs_belf" >&5 $as_echo "$lt_cv_cc_needs_belf" >&6; } if test x"$lt_cv_cc_needs_belf" != x"yes"; then # this is probably gcc 2.8.0, egcs 1.0 or newer; no need for -belf CFLAGS="$SAVE_CFLAGS" fi ;; *-*solaris*) # Find out which ABI we are using. echo 'int i;' > conftest.$ac_ext if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5 (eval $ac_compile) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; }; then case `/usr/bin/file conftest.o` in *64-bit*) case $lt_cv_prog_gnu_ld in yes*) case $host in i?86-*-solaris*) LD="${LD-ld} -m elf_x86_64" ;; sparc*-*-solaris*) LD="${LD-ld} -m elf64_sparc" ;; esac # GNU ld 2.21 introduced _sol2 emulations. Use them if available. if ${LD-ld} -V | grep _sol2 >/dev/null 2>&1; then LD="${LD-ld}_sol2" fi ;; *) if ${LD-ld} -64 -r -o conftest2.o conftest.o >/dev/null 2>&1; then LD="${LD-ld} -64" fi ;; esac ;; esac fi rm -rf conftest* ;; esac need_locks="$enable_libtool_lock" if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}mt", so it can be a program name with args. set dummy ${ac_tool_prefix}mt; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_MANIFEST_TOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$MANIFEST_TOOL"; then ac_cv_prog_MANIFEST_TOOL="$MANIFEST_TOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_MANIFEST_TOOL="${ac_tool_prefix}mt" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi MANIFEST_TOOL=$ac_cv_prog_MANIFEST_TOOL if test -n "$MANIFEST_TOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MANIFEST_TOOL" >&5 $as_echo "$MANIFEST_TOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_MANIFEST_TOOL"; then ac_ct_MANIFEST_TOOL=$MANIFEST_TOOL # Extract the first word of "mt", so it can be a program name with args. set dummy mt; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_MANIFEST_TOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_MANIFEST_TOOL"; then ac_cv_prog_ac_ct_MANIFEST_TOOL="$ac_ct_MANIFEST_TOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_MANIFEST_TOOL="mt" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_MANIFEST_TOOL=$ac_cv_prog_ac_ct_MANIFEST_TOOL if test -n "$ac_ct_MANIFEST_TOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MANIFEST_TOOL" >&5 $as_echo "$ac_ct_MANIFEST_TOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_MANIFEST_TOOL" = x; then MANIFEST_TOOL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac MANIFEST_TOOL=$ac_ct_MANIFEST_TOOL fi else MANIFEST_TOOL="$ac_cv_prog_MANIFEST_TOOL" fi test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $MANIFEST_TOOL is a manifest tool" >&5 $as_echo_n "checking if $MANIFEST_TOOL is a manifest tool... " >&6; } if ${lt_cv_path_mainfest_tool+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_path_mainfest_tool=no echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&5 $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out cat conftest.err >&5 if $GREP 'Manifest Tool' conftest.out > /dev/null; then lt_cv_path_mainfest_tool=yes fi rm -f conftest* fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_mainfest_tool" >&5 $as_echo "$lt_cv_path_mainfest_tool" >&6; } if test "x$lt_cv_path_mainfest_tool" != xyes; then MANIFEST_TOOL=: fi case $host_os in rhapsody* | darwin*) if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}dsymutil", so it can be a program name with args. set dummy ${ac_tool_prefix}dsymutil; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_DSYMUTIL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$DSYMUTIL"; then ac_cv_prog_DSYMUTIL="$DSYMUTIL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_DSYMUTIL="${ac_tool_prefix}dsymutil" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi DSYMUTIL=$ac_cv_prog_DSYMUTIL if test -n "$DSYMUTIL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DSYMUTIL" >&5 $as_echo "$DSYMUTIL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_DSYMUTIL"; then ac_ct_DSYMUTIL=$DSYMUTIL # Extract the first word of "dsymutil", so it can be a program name with args. set dummy dsymutil; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_DSYMUTIL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_DSYMUTIL"; then ac_cv_prog_ac_ct_DSYMUTIL="$ac_ct_DSYMUTIL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_DSYMUTIL="dsymutil" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_DSYMUTIL=$ac_cv_prog_ac_ct_DSYMUTIL if test -n "$ac_ct_DSYMUTIL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DSYMUTIL" >&5 $as_echo "$ac_ct_DSYMUTIL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_DSYMUTIL" = x; then DSYMUTIL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac DSYMUTIL=$ac_ct_DSYMUTIL fi else DSYMUTIL="$ac_cv_prog_DSYMUTIL" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}nmedit", so it can be a program name with args. set dummy ${ac_tool_prefix}nmedit; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_NMEDIT+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$NMEDIT"; then ac_cv_prog_NMEDIT="$NMEDIT" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_NMEDIT="${ac_tool_prefix}nmedit" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi NMEDIT=$ac_cv_prog_NMEDIT if test -n "$NMEDIT"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $NMEDIT" >&5 $as_echo "$NMEDIT" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_NMEDIT"; then ac_ct_NMEDIT=$NMEDIT # Extract the first word of "nmedit", so it can be a program name with args. set dummy nmedit; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_NMEDIT+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_NMEDIT"; then ac_cv_prog_ac_ct_NMEDIT="$ac_ct_NMEDIT" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_NMEDIT="nmedit" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_NMEDIT=$ac_cv_prog_ac_ct_NMEDIT if test -n "$ac_ct_NMEDIT"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_NMEDIT" >&5 $as_echo "$ac_ct_NMEDIT" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_NMEDIT" = x; then NMEDIT=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac NMEDIT=$ac_ct_NMEDIT fi else NMEDIT="$ac_cv_prog_NMEDIT" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}lipo", so it can be a program name with args. set dummy ${ac_tool_prefix}lipo; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_LIPO+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$LIPO"; then ac_cv_prog_LIPO="$LIPO" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_LIPO="${ac_tool_prefix}lipo" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi LIPO=$ac_cv_prog_LIPO if test -n "$LIPO"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $LIPO" >&5 $as_echo "$LIPO" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_LIPO"; then ac_ct_LIPO=$LIPO # Extract the first word of "lipo", so it can be a program name with args. set dummy lipo; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_LIPO+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_LIPO"; then ac_cv_prog_ac_ct_LIPO="$ac_ct_LIPO" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_LIPO="lipo" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_LIPO=$ac_cv_prog_ac_ct_LIPO if test -n "$ac_ct_LIPO"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_LIPO" >&5 $as_echo "$ac_ct_LIPO" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_LIPO" = x; then LIPO=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac LIPO=$ac_ct_LIPO fi else LIPO="$ac_cv_prog_LIPO" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}otool", so it can be a program name with args. set dummy ${ac_tool_prefix}otool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OTOOL"; then ac_cv_prog_OTOOL="$OTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OTOOL="${ac_tool_prefix}otool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OTOOL=$ac_cv_prog_OTOOL if test -n "$OTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OTOOL" >&5 $as_echo "$OTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OTOOL"; then ac_ct_OTOOL=$OTOOL # Extract the first word of "otool", so it can be a program name with args. set dummy otool; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OTOOL+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OTOOL"; then ac_cv_prog_ac_ct_OTOOL="$ac_ct_OTOOL" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OTOOL="otool" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OTOOL=$ac_cv_prog_ac_ct_OTOOL if test -n "$ac_ct_OTOOL"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OTOOL" >&5 $as_echo "$ac_ct_OTOOL" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OTOOL" = x; then OTOOL=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OTOOL=$ac_ct_OTOOL fi else OTOOL="$ac_cv_prog_OTOOL" fi if test -n "$ac_tool_prefix"; then # Extract the first word of "${ac_tool_prefix}otool64", so it can be a program name with args. set dummy ${ac_tool_prefix}otool64; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_OTOOL64+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$OTOOL64"; then ac_cv_prog_OTOOL64="$OTOOL64" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_OTOOL64="${ac_tool_prefix}otool64" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi OTOOL64=$ac_cv_prog_OTOOL64 if test -n "$OTOOL64"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $OTOOL64" >&5 $as_echo "$OTOOL64" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi fi if test -z "$ac_cv_prog_OTOOL64"; then ac_ct_OTOOL64=$OTOOL64 # Extract the first word of "otool64", so it can be a program name with args. set dummy otool64; ac_word=$2 { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5 $as_echo_n "checking for $ac_word... " >&6; } if ${ac_cv_prog_ac_ct_OTOOL64+:} false; then : $as_echo_n "(cached) " >&6 else if test -n "$ac_ct_OTOOL64"; then ac_cv_prog_ac_ct_OTOOL64="$ac_ct_OTOOL64" # Let the user override the test. else as_save_IFS=$IFS; IFS=$PATH_SEPARATOR for as_dir in $PATH do IFS=$as_save_IFS test -z "$as_dir" && as_dir=. for ac_exec_ext in '' $ac_executable_extensions; do if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then ac_cv_prog_ac_ct_OTOOL64="otool64" $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5 break 2 fi done done IFS=$as_save_IFS fi fi ac_ct_OTOOL64=$ac_cv_prog_ac_ct_OTOOL64 if test -n "$ac_ct_OTOOL64"; then { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_OTOOL64" >&5 $as_echo "$ac_ct_OTOOL64" >&6; } else { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5 $as_echo "no" >&6; } fi if test "x$ac_ct_OTOOL64" = x; then OTOOL64=":" else case $cross_compiling:$ac_tool_warned in yes:) { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5 $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;} ac_tool_warned=yes ;; esac OTOOL64=$ac_ct_OTOOL64 fi else OTOOL64="$ac_cv_prog_OTOOL64" fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -single_module linker flag" >&5 $as_echo_n "checking for -single_module linker flag... " >&6; } if ${lt_cv_apple_cc_single_mod+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_apple_cc_single_mod=no if test -z "${LT_MULTI_MODULE}"; then # By default we will add the -single_module flag. You can override # by either setting the environment variable LT_MULTI_MODULE # non-empty at configure time, or by adding -multi_module to the # link flags. rm -rf libconftest.dylib* echo "int foo(void){return 1;}" > conftest.c echo "$LTCC $LTCFLAGS $LDFLAGS -o libconftest.dylib \ -dynamiclib -Wl,-single_module conftest.c" >&5 $LTCC $LTCFLAGS $LDFLAGS -o libconftest.dylib \ -dynamiclib -Wl,-single_module conftest.c 2>conftest.err _lt_result=$? # If there is a non-empty error log, and "single_module" # appears in it, assume the flag caused a linker warning if test -s conftest.err && $GREP single_module conftest.err; then cat conftest.err >&5 # Otherwise, if the output was created with a 0 exit code from # the compiler, it worked. elif test -f libconftest.dylib && test $_lt_result -eq 0; then lt_cv_apple_cc_single_mod=yes else cat conftest.err >&5 fi rm -rf libconftest.dylib* rm -f conftest.* fi fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_apple_cc_single_mod" >&5 $as_echo "$lt_cv_apple_cc_single_mod" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -exported_symbols_list linker flag" >&5 $as_echo_n "checking for -exported_symbols_list linker flag... " >&6; } if ${lt_cv_ld_exported_symbols_list+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ld_exported_symbols_list=no save_LDFLAGS=$LDFLAGS echo "_main" > conftest.sym LDFLAGS="$LDFLAGS -Wl,-exported_symbols_list,conftest.sym" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ int main () { ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : lt_cv_ld_exported_symbols_list=yes else lt_cv_ld_exported_symbols_list=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LDFLAGS="$save_LDFLAGS" fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_exported_symbols_list" >&5 $as_echo "$lt_cv_ld_exported_symbols_list" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -force_load linker flag" >&5 $as_echo_n "checking for -force_load linker flag... " >&6; } if ${lt_cv_ld_force_load+:} false; then : $as_echo_n "(cached) " >&6 else lt_cv_ld_force_load=no cat > conftest.c << _LT_EOF int forced_loaded() { return 2;} _LT_EOF echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&5 $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&5 echo "$AR cru libconftest.a conftest.o" >&5 $AR cru libconftest.a conftest.o 2>&5 echo "$RANLIB libconftest.a" >&5 $RANLIB libconftest.a 2>&5 cat > conftest.c << _LT_EOF int main() { return 0;} _LT_EOF echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&5 $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err _lt_result=$? if test -s conftest.err && $GREP force_load conftest.err; then cat conftest.err >&5 elif test -f conftest && test $_lt_result -eq 0 && $GREP forced_load conftest >/dev/null 2>&1 ; then lt_cv_ld_force_load=yes else cat conftest.err >&5 fi rm -f conftest.err libconftest.a conftest conftest.c rm -rf conftest.dSYM fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_force_load" >&5 $as_echo "$lt_cv_ld_force_load" >&6; } case $host_os in rhapsody* | darwin1.[012]) _lt_dar_allow_undefined='${wl}-undefined ${wl}suppress' ;; darwin1.*) _lt_dar_allow_undefined='${wl}-flat_namespace ${wl}-undefined ${wl}suppress' ;; darwin*) # darwin 5.x on # if running on 10.5 or later, the deployment target defaults # to the OS version, if on x86, and 10.4, the deployment # target defaults to 10.4. Don't you love it? case ${MACOSX_DEPLOYMENT_TARGET-10.0},$host in 10.0,*86*-darwin8*|10.0,*-darwin[91]*) _lt_dar_allow_undefined='${wl}-undefined ${wl}dynamic_lookup' ;; 10.[012]*) _lt_dar_allow_undefined='${wl}-flat_namespace ${wl}-undefined ${wl}suppress' ;; 10.*) _lt_dar_allow_undefined='${wl}-undefined ${wl}dynamic_lookup' ;; esac ;; esac if test "$lt_cv_apple_cc_single_mod" = "yes"; then _lt_dar_single_mod='$single_module' fi if test "$lt_cv_ld_exported_symbols_list" = "yes"; then _lt_dar_export_syms=' ${wl}-exported_symbols_list,$output_objdir/${libname}-symbols.expsym' else _lt_dar_export_syms='~$NMEDIT -s $output_objdir/${libname}-symbols.expsym ${lib}' fi if test "$DSYMUTIL" != ":" && test "$lt_cv_ld_force_load" = "no"; then _lt_dsymutil='~$DSYMUTIL $lib || :' else _lt_dsymutil= fi ;; esac for ac_header in dlfcn.h do : ac_fn_c_check_header_compile "$LINENO" "dlfcn.h" "ac_cv_header_dlfcn_h" "$ac_includes_default " if test "x$ac_cv_header_dlfcn_h" = xyes; then : cat >>confdefs.h <<_ACEOF #define HAVE_DLFCN_H 1 _ACEOF fi done # Set options enable_dlopen=no enable_win32_dll=no # Check whether --enable-shared was given. if test "${enable_shared+set}" = set; then : enableval=$enable_shared; p=${PACKAGE-default} case $enableval in yes) enable_shared=yes ;; no) enable_shared=no ;; *) enable_shared=no # Look at the argument we got. We use all the common list separators. lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," for pkg in $enableval; do IFS="$lt_save_ifs" if test "X$pkg" = "X$p"; then enable_shared=yes fi done IFS="$lt_save_ifs" ;; esac else enable_shared=yes fi # Check whether --with-pic was given. if test "${with_pic+set}" = set; then : withval=$with_pic; lt_p=${PACKAGE-default} case $withval in yes|no) pic_mode=$withval ;; *) pic_mode=default # Look at the argument we got. We use all the common list separators. lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," for lt_pkg in $withval; do IFS="$lt_save_ifs" if test "X$lt_pkg" = "X$lt_p"; then pic_mode=yes fi done IFS="$lt_save_ifs" ;; esac else pic_mode=default fi test -z "$pic_mode" && pic_mode=default # Check whether --enable-fast-install was given. if test "${enable_fast_install+set}" = set; then : enableval=$enable_fast_install; p=${PACKAGE-default} case $enableval in yes) enable_fast_install=yes ;; no) enable_fast_install=no ;; *) enable_fast_install=no # Look at the argument we got. We use all the common list separators. lt_save_ifs="$IFS"; IFS="${IFS}$PATH_SEPARATOR," for pkg in $enableval; do IFS="$lt_save_ifs" if test "X$pkg" = "X$p"; then enable_fast_install=yes fi done IFS="$lt_save_ifs" ;; esac else enable_fast_install=yes fi # This can be used to rebuild libtool when needed LIBTOOL_DEPS="$ltmain" # Always use our own libtool. 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*) archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags' hardcode_libdir_flag_spec='${wl}-rpath,$libdir' ;; esac fi else ld_shlibs=no fi ;; os2*) hardcode_libdir_flag_spec='-L$libdir' hardcode_minus_L=yes allow_undefined_flag=unsupported archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~echo DATA >> $output_objdir/$libname.def~echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def' old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def' ;; osf3*) if test "$GCC" = yes; then allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' else allow_undefined_flag=' -expect_unresolved \*' archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' fi archive_cmds_need_lc='no' hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' hardcode_libdir_separator=: ;; osf4* | osf5*) # as osf3* with the addition of -msym flag if test "$GCC" = yes; then allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*' archive_cmds='$CC -shared${allow_undefined_flag} $pic_flag $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib' hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir' else allow_undefined_flag=' -expect_unresolved \*' archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib' archive_expsym_cmds='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~ $CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp' # Both c and cxx compiler support -rpath directly hardcode_libdir_flag_spec='-rpath $libdir' fi archive_cmds_need_lc='no' hardcode_libdir_separator=: ;; solaris*) no_undefined_flag=' -z defs' if test "$GCC" = yes; then wlarc='${wl}' archive_cmds='$CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' else case `$CC -V 2>&1` in *"Compilers 5.0"*) wlarc='' archive_cmds='$LD -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $linker_flags' archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $LD -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $linker_flags~$RM $lib.exp' ;; *) wlarc='${wl}' archive_cmds='$CC -G${allow_undefined_flag} -h $soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~ $CC -G${allow_undefined_flag} -M $lib.exp -h $soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp' ;; esac fi hardcode_libdir_flag_spec='-R$libdir' hardcode_shlibpath_var=no case $host_os in solaris2.[0-5] | solaris2.[0-5].*) ;; *) # The compiler driver will combine and reorder linker options, # but understands `-z linker_flag'. GCC discards it without `$wl', # but is careful enough not to reorder. # Supported since Solaris 2.6 (maybe 2.5.1?) if test "$GCC" = yes; then whole_archive_flag_spec='${wl}-z ${wl}allextract$convenience ${wl}-z ${wl}defaultextract' else whole_archive_flag_spec='-z allextract$convenience -z defaultextract' fi ;; esac link_all_deplibs=yes ;; sunos4*) if test "x$host_vendor" = xsequent; then # Use $CC to link under sequent, because it throws in some extra .o # files that make .init and .fini sections work. archive_cmds='$CC -G ${wl}-h $soname -o $lib $libobjs $deplibs $compiler_flags' else archive_cmds='$LD -assert pure-text -Bstatic -o $lib $libobjs $deplibs $linker_flags' fi hardcode_libdir_flag_spec='-L$libdir' hardcode_direct=yes hardcode_minus_L=yes hardcode_shlibpath_var=no ;; sysv4) case $host_vendor in sni) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_direct=yes # is this really true??? ;; siemens) ## LD is ld it makes a PLAMLIB ## CC just makes a GrossModule. archive_cmds='$LD -G -o $lib $libobjs $deplibs $linker_flags' reload_cmds='$CC -r -o $output$reload_objs' hardcode_direct=no ;; motorola) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_direct=no #Motorola manual says yes, but my tests say they lie ;; esac runpath_var='LD_RUN_PATH' hardcode_shlibpath_var=no ;; sysv4.3*) archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_shlibpath_var=no export_dynamic_flag_spec='-Bexport' ;; sysv4*MP*) if test -d /usr/nec; then archive_cmds='$LD -G -h $soname -o $lib $libobjs $deplibs $linker_flags' hardcode_shlibpath_var=no runpath_var=LD_RUN_PATH hardcode_runpath_var=yes ld_shlibs=yes fi ;; sysv4*uw2* | sysv5OpenUNIX* | sysv5UnixWare7.[01].[10]* | unixware7* | sco3.2v5.0.[024]*) no_undefined_flag='${wl}-z,text' archive_cmds_need_lc=no hardcode_shlibpath_var=no runpath_var='LD_RUN_PATH' if test "$GCC" = yes; then archive_cmds='$CC -shared ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='$CC -shared ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' else archive_cmds='$CC -G ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' archive_expsym_cmds='$CC -G ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags' fi ;; sysv5* | sco3.2v5* | sco5v6*) # Note: We can NOT use -z defs as we might desire, because we do not # link with -lc, and that would cause any symbols used from libc to # always be unresolved, which means just about no library would # ever link correctly. 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The import file would start with # the line `#! .'. This would cause the generated library to # depend on `.', always an invalid library. This was fixed in # development snapshots of GCC prior to 3.0. case $host_os in aix4 | aix4.[01] | aix4.[01].*) if { echo '#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ >= 97)' echo ' yes ' echo '#endif'; } | ${CC} -E - | $GREP yes > /dev/null; then : else can_build_shared=no fi ;; esac # AIX (on Power*) has no versioning support, so currently we can not hardcode correct # soname into executable. Probably we can add versioning support to # collect2, so additional links can be useful in future. if test "$aix_use_runtimelinking" = yes; then # If using run time linking (on AIX 4.2 or later) use lib.so # instead of lib.a to let people know that these are not # typical AIX shared libraries. library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' else # We preserve .a as extension for shared libraries through AIX4.2 # and later when we are not doing run time linking. library_names_spec='${libname}${release}.a $libname.a' soname_spec='${libname}${release}${shared_ext}$major' fi shlibpath_var=LIBPATH fi ;; amigaos*) case $host_cpu in powerpc) # Since July 2007 AmigaOS4 officially supports .so libraries. # When compiling the executable, add -use-dynld -Lsobjs: to the compileline. library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' ;; m68k) library_names_spec='$libname.ixlibrary $libname.a' # Create ${libname}_ixlibrary.a entries in /sys/libs. finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`func_echo_all "$lib" | $SED '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done' ;; esac ;; beos*) library_names_spec='${libname}${shared_ext}' dynamic_linker="$host_os ld.so" shlibpath_var=LIBRARY_PATH ;; bsdi[45]*) version_type=linux # correct to gnu/linux during the next big refactor need_version=no library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' soname_spec='${libname}${release}${shared_ext}$major' finish_cmds='PATH="\$PATH:/sbin" ldconfig $libdir' shlibpath_var=LD_LIBRARY_PATH sys_lib_search_path_spec="/shlib /usr/lib /usr/X11/lib /usr/contrib/lib /lib /usr/local/lib" sys_lib_dlsearch_path_spec="/shlib /usr/lib /usr/local/lib" # the default ld.so.conf also contains /usr/contrib/lib and # /usr/X11R6/lib (/usr/X11 is a link to /usr/X11R6), but let us allow # libtool to hard-code these into programs ;; cygwin* | mingw* | pw32* | cegcc*) version_type=windows shrext_cmds=".dll" need_version=no need_lib_prefix=no case $GCC,$cc_basename in yes,*) # gcc library_names_spec='$libname.dll.a' # DLL is installed to $(libdir)/../bin by postinstall_cmds postinstall_cmds='base_file=`basename \${file}`~ dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~ dldir=$destdir/`dirname \$dlpath`~ test -d \$dldir || mkdir -p \$dldir~ $install_prog $dir/$dlname \$dldir/$dlname~ chmod a+x \$dldir/$dlname~ if test -n '\''$stripme'\'' && test -n '\''$striplib'\''; then eval '\''$striplib \$dldir/$dlname'\'' || exit \$?; fi' postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~ dlpath=$dir/\$dldll~ $RM \$dlpath' shlibpath_overrides_runpath=yes case $host_os in cygwin*) # Cygwin DLLs use 'cyg' prefix rather than 'lib' soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}' sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/lib/w32api" ;; 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esac # HP-UX runs *really* slowly unless shared libraries are mode 555, ... postinstall_cmds='chmod 555 $lib' # or fails outright, so override atomically: install_override_mode=555 ;; interix[3-9]*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${shared_ext}' soname_spec='${libname}${release}${shared_ext}$major' dynamic_linker='Interix 3.x ld.so.1 (PE, like ELF)' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no hardcode_into_libs=yes ;; irix5* | irix6* | nonstopux*) case $host_os in nonstopux*) version_type=nonstopux ;; *) if test "$lt_cv_prog_gnu_ld" = yes; then version_type=linux # correct to gnu/linux during the next big refactor else version_type=irix fi ;; esac need_lib_prefix=no need_version=no soname_spec='${libname}${release}${shared_ext}$major' library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major ${libname}${release}${shared_ext} $libname${shared_ext}' case $host_os in irix5* | nonstopux*) libsuff= shlibsuff= ;; *) case $LD in # libtool.m4 will add one of these switches to LD *-32|*"-32 "|*-melf32bsmip|*"-melf32bsmip ") libsuff= shlibsuff= libmagic=32-bit;; *-n32|*"-n32 "|*-melf32bmipn32|*"-melf32bmipn32 ") libsuff=32 shlibsuff=N32 libmagic=N32;; *-64|*"-64 "|*-melf64bmip|*"-melf64bmip ") libsuff=64 shlibsuff=64 libmagic=64-bit;; *) libsuff= shlibsuff= libmagic=never-match;; esac ;; esac shlibpath_var=LD_LIBRARY${shlibsuff}_PATH shlibpath_overrides_runpath=no sys_lib_search_path_spec="/usr/lib${libsuff} /lib${libsuff} /usr/local/lib${libsuff}" sys_lib_dlsearch_path_spec="/usr/lib${libsuff} /lib${libsuff}" hardcode_into_libs=yes ;; # No shared lib support for Linux oldld, aout, or coff. linux*oldld* | linux*aout* | linux*coff*) dynamic_linker=no ;; # This must be glibc/ELF. linux* | k*bsd*-gnu | kopensolaris*-gnu | gnu*) version_type=linux # correct to gnu/linux during the next big refactor need_lib_prefix=no need_version=no library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}$major $libname${shared_ext}' soname_spec='${libname}${release}${shared_ext}$major' finish_cmds='PATH="\$PATH:/sbin" ldconfig -n $libdir' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=no # Some binutils ld are patched to set DT_RUNPATH if ${lt_cv_shlibpath_overrides_runpath+:} false; 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sysv5* | sco3.2v5* | sco5v6* | unixware* | OpenUNIX* | sysv4*uw2*) version_type=freebsd-elf need_lib_prefix=no need_version=no library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext} $libname${shared_ext}' soname_spec='${libname}${release}${shared_ext}$major' shlibpath_var=LD_LIBRARY_PATH shlibpath_overrides_runpath=yes hardcode_into_libs=yes if test "$with_gnu_ld" = yes; then sys_lib_search_path_spec='/usr/local/lib /usr/gnu/lib /usr/ccs/lib /usr/lib /lib' else sys_lib_search_path_spec='/usr/ccs/lib /usr/lib' case $host_os in sco3.2v5*) sys_lib_search_path_spec="$sys_lib_search_path_spec /lib" ;; esac fi sys_lib_dlsearch_path_spec='/usr/lib' ;; tpf*) # TPF is a cross-target only. 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" >&6; } hardcode_action= if test -n "$hardcode_libdir_flag_spec" || test -n "$runpath_var" || test "X$hardcode_automatic" = "Xyes" ; then # We can hardcode non-existent directories. if test "$hardcode_direct" != no && # If the only mechanism to avoid hardcoding is shlibpath_var, we # have to relink, otherwise we might link with an installed library # when we should be linking with a yet-to-be-installed one ## test "$_LT_TAGVAR(hardcode_shlibpath_var, )" != no && test "$hardcode_minus_L" != no; then # Linking always hardcodes the temporary library directory. hardcode_action=relink else # We can link without hardcoding, and we can hardcode nonexisting dirs. hardcode_action=immediate fi else # We cannot hardcode anything, or else we can only hardcode existing # directories. hardcode_action=unsupported fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $hardcode_action" >&5 $as_echo "$hardcode_action" >&6; } if test "$hardcode_action" = relink || test "$inherit_rpath" = yes; then # Fast installation is not supported enable_fast_install=no elif test "$shlibpath_overrides_runpath" = yes || test "$enable_shared" = no; then # Fast installation is not necessary enable_fast_install=needless fi if test "x$enable_dlopen" != xyes; then enable_dlopen=unknown enable_dlopen_self=unknown enable_dlopen_self_static=unknown else lt_cv_dlopen=no lt_cv_dlopen_libs= case $host_os in beos*) lt_cv_dlopen="load_add_on" lt_cv_dlopen_libs= lt_cv_dlopen_self=yes ;; mingw* | pw32* | cegcc*) lt_cv_dlopen="LoadLibrary" lt_cv_dlopen_libs= ;; cygwin*) lt_cv_dlopen="dlopen" lt_cv_dlopen_libs= ;; darwin*) # if libdl is installed we need to link against it { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -ldl" >&5 $as_echo_n "checking for dlopen in -ldl... " >&6; } if ${ac_cv_lib_dl_dlopen+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldl $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dlopen (); int main () { return dlopen (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dl_dlopen=yes else ac_cv_lib_dl_dlopen=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dl_dlopen" >&5 $as_echo "$ac_cv_lib_dl_dlopen" >&6; } if test "x$ac_cv_lib_dl_dlopen" = xyes; then : lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl" else lt_cv_dlopen="dyld" lt_cv_dlopen_libs= lt_cv_dlopen_self=yes fi ;; *) ac_fn_c_check_func "$LINENO" "shl_load" "ac_cv_func_shl_load" if test "x$ac_cv_func_shl_load" = xyes; then : lt_cv_dlopen="shl_load" else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for shl_load in -ldld" >&5 $as_echo_n "checking for shl_load in -ldld... " >&6; } if ${ac_cv_lib_dld_shl_load+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldld $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char shl_load (); int main () { return shl_load (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dld_shl_load=yes else ac_cv_lib_dld_shl_load=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dld_shl_load" >&5 $as_echo "$ac_cv_lib_dld_shl_load" >&6; } if test "x$ac_cv_lib_dld_shl_load" = xyes; then : lt_cv_dlopen="shl_load" lt_cv_dlopen_libs="-ldld" else ac_fn_c_check_func "$LINENO" "dlopen" "ac_cv_func_dlopen" if test "x$ac_cv_func_dlopen" = xyes; then : lt_cv_dlopen="dlopen" else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -ldl" >&5 $as_echo_n "checking for dlopen in -ldl... " >&6; } if ${ac_cv_lib_dl_dlopen+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldl $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dlopen (); int main () { return dlopen (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dl_dlopen=yes else ac_cv_lib_dl_dlopen=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dl_dlopen" >&5 $as_echo "$ac_cv_lib_dl_dlopen" >&6; } if test "x$ac_cv_lib_dl_dlopen" = xyes; then : lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-ldl" else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dlopen in -lsvld" >&5 $as_echo_n "checking for dlopen in -lsvld... " >&6; } if ${ac_cv_lib_svld_dlopen+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-lsvld $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dlopen (); int main () { return dlopen (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_svld_dlopen=yes else ac_cv_lib_svld_dlopen=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_svld_dlopen" >&5 $as_echo "$ac_cv_lib_svld_dlopen" >&6; } if test "x$ac_cv_lib_svld_dlopen" = xyes; then : lt_cv_dlopen="dlopen" lt_cv_dlopen_libs="-lsvld" else { $as_echo "$as_me:${as_lineno-$LINENO}: checking for dld_link in -ldld" >&5 $as_echo_n "checking for dld_link in -ldld... " >&6; } if ${ac_cv_lib_dld_dld_link+:} false; then : $as_echo_n "(cached) " >&6 else ac_check_lib_save_LIBS=$LIBS LIBS="-ldld $LIBS" cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ /* Override any GCC internal prototype to avoid an error. Use char because int might match the return type of a GCC builtin and then its argument prototype would still apply. */ #ifdef __cplusplus extern "C" #endif char dld_link (); int main () { return dld_link (); ; return 0; } _ACEOF if ac_fn_c_try_link "$LINENO"; then : ac_cv_lib_dld_dld_link=yes else ac_cv_lib_dld_dld_link=no fi rm -f core conftest.err conftest.$ac_objext \ conftest$ac_exeext conftest.$ac_ext LIBS=$ac_check_lib_save_LIBS fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_lib_dld_dld_link" >&5 $as_echo "$ac_cv_lib_dld_dld_link" >&6; } if test "x$ac_cv_lib_dld_dld_link" = xyes; then : lt_cv_dlopen="dld_link" lt_cv_dlopen_libs="-ldld" fi fi fi fi fi fi ;; esac if test "x$lt_cv_dlopen" != xno; then enable_dlopen=yes else enable_dlopen=no fi case $lt_cv_dlopen in dlopen) save_CPPFLAGS="$CPPFLAGS" test "x$ac_cv_header_dlfcn_h" = xyes && CPPFLAGS="$CPPFLAGS -DHAVE_DLFCN_H" save_LDFLAGS="$LDFLAGS" wl=$lt_prog_compiler_wl eval LDFLAGS=\"\$LDFLAGS $export_dynamic_flag_spec\" save_LIBS="$LIBS" LIBS="$lt_cv_dlopen_libs $LIBS" { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether a program can dlopen itself" >&5 $as_echo_n "checking whether a program can dlopen itself... " >&6; } if ${lt_cv_dlopen_self+:} false; then : $as_echo_n "(cached) " >&6 else if test "$cross_compiling" = yes; then : lt_cv_dlopen_self=cross else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF #line $LINENO "configure" #include "confdefs.h" #if HAVE_DLFCN_H #include #endif #include #ifdef RTLD_GLOBAL # define LT_DLGLOBAL RTLD_GLOBAL #else # ifdef DL_GLOBAL # define LT_DLGLOBAL DL_GLOBAL # else # define LT_DLGLOBAL 0 # endif #endif /* We may have to define LT_DLLAZY_OR_NOW in the command line if we find out it does not work in some platform. */ #ifndef LT_DLLAZY_OR_NOW # ifdef RTLD_LAZY # define LT_DLLAZY_OR_NOW RTLD_LAZY # else # ifdef DL_LAZY # define LT_DLLAZY_OR_NOW DL_LAZY # else # ifdef RTLD_NOW # define LT_DLLAZY_OR_NOW RTLD_NOW # else # ifdef DL_NOW # define LT_DLLAZY_OR_NOW DL_NOW # else # define LT_DLLAZY_OR_NOW 0 # endif # endif # endif # endif #endif /* When -fvisbility=hidden is used, assume the code has been annotated correspondingly for the symbols needed. */ #if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3)) int fnord () __attribute__((visibility("default"))); #endif int fnord () { return 42; } int main () { void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); int status = $lt_dlunknown; if (self) { if (dlsym (self,"fnord")) status = $lt_dlno_uscore; else { if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; else puts (dlerror ()); } /* dlclose (self); */ } else puts (dlerror ()); return status; } _LT_EOF if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5 (eval $ac_link) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } && test -s conftest${ac_exeext} 2>/dev/null; then (./conftest; exit; ) >&5 2>/dev/null lt_status=$? case x$lt_status in x$lt_dlno_uscore) lt_cv_dlopen_self=yes ;; x$lt_dlneed_uscore) lt_cv_dlopen_self=yes ;; x$lt_dlunknown|x*) lt_cv_dlopen_self=no ;; esac else : # compilation failed lt_cv_dlopen_self=no fi fi rm -fr conftest* fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_dlopen_self" >&5 $as_echo "$lt_cv_dlopen_self" >&6; } if test "x$lt_cv_dlopen_self" = xyes; then wl=$lt_prog_compiler_wl eval LDFLAGS=\"\$LDFLAGS $lt_prog_compiler_static\" { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether a statically linked program can dlopen itself" >&5 $as_echo_n "checking whether a statically linked program can dlopen itself... " >&6; } if ${lt_cv_dlopen_self_static+:} false; then : $as_echo_n "(cached) " >&6 else if test "$cross_compiling" = yes; then : lt_cv_dlopen_self_static=cross else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF #line $LINENO "configure" #include "confdefs.h" #if HAVE_DLFCN_H #include #endif #include #ifdef RTLD_GLOBAL # define LT_DLGLOBAL RTLD_GLOBAL #else # ifdef DL_GLOBAL # define LT_DLGLOBAL DL_GLOBAL # else # define LT_DLGLOBAL 0 # endif #endif /* We may have to define LT_DLLAZY_OR_NOW in the command line if we find out it does not work in some platform. */ #ifndef LT_DLLAZY_OR_NOW # ifdef RTLD_LAZY # define LT_DLLAZY_OR_NOW RTLD_LAZY # else # ifdef DL_LAZY # define LT_DLLAZY_OR_NOW DL_LAZY # else # ifdef RTLD_NOW # define LT_DLLAZY_OR_NOW RTLD_NOW # else # ifdef DL_NOW # define LT_DLLAZY_OR_NOW DL_NOW # else # define LT_DLLAZY_OR_NOW 0 # endif # endif # endif # endif #endif /* When -fvisbility=hidden is used, assume the code has been annotated correspondingly for the symbols needed. */ #if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3)) int fnord () __attribute__((visibility("default"))); #endif int fnord () { return 42; } int main () { void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW); int status = $lt_dlunknown; if (self) { if (dlsym (self,"fnord")) status = $lt_dlno_uscore; else { if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore; else puts (dlerror ()); } /* dlclose (self); */ } else puts (dlerror ()); return status; } _LT_EOF if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5 (eval $ac_link) 2>&5 ac_status=$? $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 test $ac_status = 0; } && test -s conftest${ac_exeext} 2>/dev/null; then (./conftest; exit; ) >&5 2>/dev/null lt_status=$? case x$lt_status in x$lt_dlno_uscore) lt_cv_dlopen_self_static=yes ;; x$lt_dlneed_uscore) lt_cv_dlopen_self_static=yes ;; x$lt_dlunknown|x*) lt_cv_dlopen_self_static=no ;; esac else : # compilation failed lt_cv_dlopen_self_static=no fi fi rm -fr conftest* fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_dlopen_self_static" >&5 $as_echo "$lt_cv_dlopen_self_static" >&6; } fi CPPFLAGS="$save_CPPFLAGS" LDFLAGS="$save_LDFLAGS" LIBS="$save_LIBS" ;; esac case $lt_cv_dlopen_self in yes|no) enable_dlopen_self=$lt_cv_dlopen_self ;; *) enable_dlopen_self=unknown ;; esac case $lt_cv_dlopen_self_static in yes|no) enable_dlopen_self_static=$lt_cv_dlopen_self_static ;; *) enable_dlopen_self_static=unknown ;; esac fi striplib= old_striplib= { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether stripping libraries is possible" >&5 $as_echo_n "checking whether stripping libraries is possible... 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" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: result: $can_build_shared" >&5 $as_echo "$can_build_shared" >&6; } { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether to build shared libraries" >&5 $as_echo_n "checking whether to build shared libraries... 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" >&6; } if ${ac_cv_sys_largefile_CC+:} false; then : $as_echo_n "(cached) " >&6 else ac_cv_sys_largefile_CC=no if test "$GCC" != yes; then ac_save_CC=$CC while :; do # IRIX 6.2 and later do not support large files by default, # so use the C compiler's -n32 option if that helps. cat confdefs.h - <<_ACEOF >conftest.$ac_ext /* end confdefs.h. */ #include /* Check that off_t can represent 2**63 - 1 correctly. We can't simply define LARGE_OFF_T to be 9223372036854775807, since some C++ compilers masquerading as C compilers incorrectly reject 9223372036854775807. */ #define LARGE_OFF_T ((((off_t) 1 << 31) << 31) - 1 + (((off_t) 1 << 31) << 31)) int off_t_is_large[(LARGE_OFF_T % 2147483629 == 721 && LARGE_OFF_T % 2147483647 == 1) ? 1 : -1]; int main () { ; return 0; } _ACEOF if ac_fn_c_try_compile "$LINENO"; then : break fi rm -f core conftest.err conftest.$ac_objext CC="$CC -n32" if ac_fn_c_try_compile "$LINENO"; then : ac_cv_sys_largefile_CC=' -n32'; break fi rm -f core conftest.err conftest.$ac_objext break done CC=$ac_save_CC rm -f conftest.$ac_ext fi fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_cv_sys_largefile_CC" >&5 $as_echo "$ac_cv_sys_largefile_CC" >&6; } if test "$ac_cv_sys_largefile_CC" != no; then CC=$CC$ac_cv_sys_largefile_CC fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking for _FILE_OFFSET_BITS value needed for large files" >&5 $as_echo_n "checking for _FILE_OFFSET_BITS value needed for large files... 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Check the 'README' file, it" echo "often tells you about the needed prerequisites for installing" echo "this package. You may also peek at any GNU archive site, in" echo "case some other package contains this missing '$1' program." ;; esac } give_advice "$1" | sed -e '1s/^/WARNING: /' \ -e '2,$s/^/ /' >&2 # Propagate the correct exit status (expected to be 127 for a program # not found, 63 for a program that failed due to version mismatch). exit $st # Local variables: # eval: (add-hook 'write-file-hooks 'time-stamp) # time-stamp-start: "scriptversion=" # time-stamp-format: "%:y-%02m-%02d.%02H" # time-stamp-time-zone: "UTC" # time-stamp-end: "; # UTC" # End: xf86-video-intel-2.99.917/README0000664000175000017500000000320712400044327012605 00000000000000xf86-video-intel Open-source X.org graphics driver for Intel graphics https://01.org/linuxgraphics/ What is xf86-video-intel ------------------------ The xf86-video-intel module is an open-source 2D graphics driver for the X Window System as implemented by X.org. It supports a variety of Intel graphics chipsets including: i810/i810e/i810-dc100,i815, i830M,845G,852GM,855GM,865G, 915G/GM,945G/GM/GME,946GZ G/GM/GME/Q965, G/Q33,G/Q35,G41,G/Q43,G/GM/Q45 PineView-M (Atom N400 series) PineView-D (Atom D400/D500 series) Intel(R) HD Graphics: 2000-6000, Intel(R) Iris(TM) Graphics: 5100/6100, and Intel(R) Iris(TM) Pro Graphics: 5200/6200/P6300. Where to get more information about the driver ---------------------------------------------- The primary source of information about this and other open-source drivers for Intel graphics is: https://01.org/linuxgraphics/ Documentation specific to the xf86-video-intel driver including possible configuration options for the xorg.conf file can be found in the intel(4) manual page. After installing the driver this documentation can be read with the following command: man intel Mailing list for communication with users and developers of xf86-video-intel: intel-gfx@lists.freedesktop.org Note: Subscription is required before posting, but anyone is free to subscribe. See instructions (and archives) here: http://lists.freedesktop.org/mailman/listinfo/intel-gfx To report bugs encountered with the driver, see: https://01.org/linuxgraphics/documentation/how-report-bugs To see bugs that are targeted to be fixed in the next release: https://bugs.freedesktop.org/show_bug.cgi?id=intel-2d-release xf86-video-intel-2.99.917/xvmc/0000775000175000017500000000000012445556130012771 500000000000000xf86-video-intel-2.99.917/xvmc/xvmc_vld.c0000664000175000017500000010203012400044327014662 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai */ #include "intel_xvmc_private.h" #include "i830_reg.h" #include "i965_reg.h" #include "brw_defines.h" #include "brw_structs.h" #ifndef ALIGN #define ALIGN(m,n) (((m) + (n) - 1) & ~((n) - 1)) #endif #define BATCH_STRUCT(x) intelBatchbufferData(&x, sizeof(x), 0) #define VLD_MAX_SLICE_SIZE (32 * 1024) #define CS_SIZE 30 #define URB_SIZE 384 /* idct table */ #define C0 23170 #define C1 22725 #define C2 21407 #define C3 19266 #define C4 16383 #define C5 12873 #define C6 8867 #define C7 4520 const uint32_t idct_table[] = { C4, C1, C2, C3, C4, C5, C6, C7, //g5 C4, C1, C2, C3, C4, C5, C6, C7, C4, C3, C6, -C7, -C4, -C1, -C2, -C5, C4, C3, C6, -C7, -C4, -C1, -C2, -C5, C4, C5, -C6, -C1, -C4, C7, C2, C3, C4, C5, -C6, -C1, -C4, C7, C2, C3, C4, C7, -C2, -C5, C4, C3, -C6, -C1, C4, C7, -C2, -C5, C4, C3, -C6, -C1, C4, -C7, -C2, C5, C4, -C3, -C6, C1, C4, -C7, -C2, C5, C4, -C3, -C6, C1, C4, -C5, -C6, C1, -C4, -C7, C2, -C3, C4, -C5, -C6, C1, -C4, -C7, C2, -C3, C4, -C3, C6, C7, -C4, C1, -C2, C5, C4, -C3, C6, C7, -C4, C1, -C2, C5, C4, -C1, C2, -C3, C4, -C5, C6, -C7, C4, -C1, C2, -C3, C4, -C5, C6, -C7 //g20 }; #undef C0 #undef C1 #undef C2 #undef C3 #undef C4 #undef C5 #undef C6 #undef C7 #define INTERFACE_NUM 8 enum interface { FRAME_INTRA = 0, FRAME_FRAME_PRED_FORWARD, FRAME_FRAME_PRED_BACKWARD, FRAME_FRAME_PRED_BIDIRECT, FRAME_FIELD_PRED_FORWARD, FRAME_FIELD_PRED_BACKWARD, FRAME_FIELD_PRED_BIDIRECT, LIB_INTERFACE }; /*kernels for vld mode*/ static uint32_t lib_kernel[][4] = { #include "shader/vld/lib.g4b" }; static uint32_t ipicture_kernel[][4] = { #include "shader/vld/ipicture.g4b" }; static uint32_t frame_forward_kernel[][4] = { #include "shader/vld/frame_forward.g4b" }; static uint32_t frame_backward_kernel[][4] = { #include "shader/vld/frame_backward.g4b" }; static uint32_t frame_f_b_kernel[][4] = { #include "shader/vld/frame_f_b.g4b" }; static uint32_t field_forward_kernel[][4] = { #include "shader/vld/field_forward.g4b" }; static uint32_t field_backward_kernel[][4] = { #include "shader/vld/field_backward.g4b" }; static uint32_t field_f_b_kernel[][4] = { #include "shader/vld/field_f_b.g4b" }; /* on Ironlake */ static uint32_t lib_kernel_gen5[][4] = { #include "shader/vld/lib.g4b.gen5" }; static uint32_t ipicture_kernel_gen5[][4] = { #include "shader/vld/ipicture.g4b.gen5" }; static uint32_t frame_forward_kernel_gen5[][4] = { #include "shader/vld/frame_forward.g4b.gen5" }; static uint32_t frame_backward_kernel_gen5[][4] = { #include "shader/vld/frame_backward.g4b.gen5" }; static uint32_t frame_f_b_kernel_gen5[][4] = { #include "shader/vld/frame_f_b.g4b.gen5" }; static uint32_t field_forward_kernel_gen5[][4] = { #include "shader/vld/field_forward.g4b.gen5" }; static uint32_t field_backward_kernel_gen5[][4] = { #include "shader/vld/field_backward.g4b.gen5" }; static uint32_t field_f_b_kernel_gen5[][4] = { #include "shader/vld/field_f_b.g4b.gen5" }; /*kernels for mc mode*/ static uint32_t lib_kernel_idct[][4] = { #include "shader/mc/lib_igd.g4b" }; static uint32_t ipicture_kernel_idct[][4] = { #include "shader/mc/ipicture_igd.g4b" }; static uint32_t frame_forward_kernel_idct[][4] = { #include "shader/mc/frame_forward_igd.g4b" }; static uint32_t frame_backward_kernel_idct[][4] = { #include "shader/mc/frame_backward_igd.g4b" }; static uint32_t frame_f_b_kernel_idct[][4] = { #include "shader/mc/frame_f_b_igd.g4b" }; static uint32_t field_forward_kernel_idct[][4] = { #include "shader/mc/field_forward_igd.g4b" }; static uint32_t field_backward_kernel_idct[][4] = { #include "shader/mc/field_backward_igd.g4b" }; static uint32_t field_f_b_kernel_idct[][4] = { #include "shader/mc/field_f_b_igd.g4b" }; /* on Ironlake */ static uint32_t lib_kernel_idct_gen5[][4] = { #include "shader/mc/lib_igd.g4b.gen5" }; static uint32_t ipicture_kernel_idct_gen5[][4] = { #include "shader/mc/ipicture_igd.g4b.gen5" }; static uint32_t frame_forward_kernel_idct_gen5[][4] = { #include "shader/mc/frame_forward_igd.g4b.gen5" }; static uint32_t frame_backward_kernel_idct_gen5[][4] = { #include "shader/mc/frame_backward_igd.g4b.gen5" }; static uint32_t frame_f_b_kernel_idct_gen5[][4] = { #include "shader/mc/frame_f_b_igd.g4b.gen5" }; static uint32_t field_forward_kernel_idct_gen5[][4] = { #include "shader/mc/field_forward_igd.g4b.gen5" }; static uint32_t field_backward_kernel_idct_gen5[][4] = { #include "shader/mc/field_backward_igd.g4b.gen5" }; static uint32_t field_f_b_kernel_idct_gen5[][4] = { #include "shader/mc/field_f_b_igd.g4b.gen5" }; struct media_kernel { uint32_t(*bin)[4]; int size; }; static struct media_kernel media_kernels[] = { /*kernels for vld mode */ {ipicture_kernel, sizeof(ipicture_kernel)} , {frame_forward_kernel, sizeof(frame_forward_kernel)} , {frame_backward_kernel, sizeof(frame_backward_kernel)} , {frame_f_b_kernel, sizeof(frame_f_b_kernel)} , {field_forward_kernel, sizeof(field_forward_kernel)} , {field_backward_kernel, sizeof(field_backward_kernel)} , {field_f_b_kernel, sizeof(field_f_b_kernel)} , {lib_kernel, sizeof(lib_kernel)} , /*kernels for mc mode */ {ipicture_kernel_idct, sizeof(ipicture_kernel_idct)} , {frame_forward_kernel_idct, sizeof(frame_forward_kernel_idct)} , {frame_backward_kernel_idct, sizeof(frame_backward_kernel_idct)} , {frame_f_b_kernel_idct, sizeof(frame_f_b_kernel_idct)} , {field_forward_kernel_idct, sizeof(field_forward_kernel_idct)} , {field_backward_kernel_idct, sizeof(field_backward_kernel_idct)} , {field_f_b_kernel_idct, sizeof(field_f_b_kernel_idct)} , {lib_kernel_idct, sizeof(lib_kernel_idct)} }; static struct media_kernel media_gen5_kernels[] = { /*kernels for vld mode */ {ipicture_kernel_gen5, sizeof(ipicture_kernel_gen5)} , {frame_forward_kernel_gen5, sizeof(frame_forward_kernel_gen5)} , {frame_backward_kernel_gen5, sizeof(frame_backward_kernel_gen5)} , {frame_f_b_kernel_gen5, sizeof(frame_f_b_kernel_gen5)} , {field_forward_kernel_gen5, sizeof(field_forward_kernel_gen5)} , {field_backward_kernel_gen5, sizeof(field_backward_kernel_gen5)} , {field_f_b_kernel_gen5, sizeof(field_f_b_kernel_gen5)} , {lib_kernel_gen5, sizeof(lib_kernel_gen5)} , /*kernels for mc mode */ {ipicture_kernel_idct_gen5, sizeof(ipicture_kernel_idct_gen5)} , {frame_forward_kernel_idct_gen5, sizeof(frame_forward_kernel_idct_gen5)} , {frame_backward_kernel_idct_gen5, sizeof(frame_backward_kernel_idct_gen5)} , {frame_f_b_kernel_idct_gen5, sizeof(frame_f_b_kernel_idct_gen5)} , {field_forward_kernel_idct_gen5, sizeof(field_forward_kernel_idct_gen5)} , {field_backward_kernel_idct_gen5, sizeof(field_backward_kernel_idct_gen5)} , {field_f_b_kernel_idct_gen5, sizeof(field_f_b_kernel_idct_gen5)} , {lib_kernel_idct_gen5, sizeof(lib_kernel_idct_gen5)} }; #define MEDIA_KERNEL_NUM (sizeof(media_kernels)/sizeof(media_kernels[0])) struct media_kernel_obj { dri_bo *bo; }; struct interface_descriptor_obj { dri_bo *bo; struct media_kernel_obj kernels[MEDIA_KERNEL_NUM]; }; struct vfe_state_obj { dri_bo *bo; struct interface_descriptor_obj interface; }; struct vld_state_obj { dri_bo *bo; }; struct surface_obj { dri_bo *bo; }; struct surface_state_obj { struct surface_obj surface; dri_bo *bo; }; #define MAX_SURFACES 12 struct binding_table_obj { dri_bo *bo; struct surface_state_obj surface_states[MAX_SURFACES]; }; struct slice_data_obj { dri_bo *bo; }; struct mb_data_obj { dri_bo *bo; }; struct cs_state_obj { dri_bo *bo; }; static struct media_state { struct vfe_state_obj vfe_state; struct vld_state_obj vld_state; struct binding_table_obj binding_table; struct cs_state_obj cs_object; struct slice_data_obj slice_data; struct mb_data_obj mb_data; } media_state; /* XvMCQMatrix * 2 + idct_table + 8 * kernel offset pointer */ #define CS_OBJECT_SIZE (32*20 + sizeof(unsigned int) * 8) static void free_object(struct media_state *s) { int i; #define FREE_ONE_BO(bo) \ if (bo) \ drm_intel_bo_unreference(bo) FREE_ONE_BO(s->vfe_state.bo); FREE_ONE_BO(s->vfe_state.interface.bo); for (i = 0; i < MEDIA_KERNEL_NUM; i++) FREE_ONE_BO(s->vfe_state.interface.kernels[i].bo); FREE_ONE_BO(s->binding_table.bo); for (i = 0; i < MAX_SURFACES; i++) FREE_ONE_BO(s->binding_table.surface_states[i].bo); FREE_ONE_BO(s->slice_data.bo); FREE_ONE_BO(s->mb_data.bo); FREE_ONE_BO(s->cs_object.bo); FREE_ONE_BO(s->vld_state.bo); } static int alloc_object(struct media_state *s) { int i; for (i = 0; i < MAX_SURFACES; i++) { s->binding_table.surface_states[i].bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state", sizeof(struct brw_surface_state), 0x1000); if (!s->binding_table.surface_states[i].bo) goto out; } return 0; out: free_object(s); return BadAlloc; } static void flush() { #define FLUSH_STATE_CACHE 1 struct brw_mi_flush f; memset(&f, 0, sizeof(f)); f.opcode = CMD_MI_FLUSH; f.flags = (1 << FLUSH_STATE_CACHE); BATCH_STRUCT(f); } static Status vfe_state(int vfe_mode) { struct brw_vfe_state tmp, *vfe_state = &tmp; memset(vfe_state, 0, sizeof(*vfe_state)); if (vfe_mode == VFE_VLD_MODE) { vfe_state->vfe0.extend_vfe_state_present = 1; } else { vfe_state->vfe0.extend_vfe_state_present = 0; } vfe_state->vfe1.vfe_mode = vfe_mode; vfe_state->vfe1.num_urb_entries = 1; vfe_state->vfe1.children_present = 0; vfe_state->vfe1.urb_entry_alloc_size = 2; vfe_state->vfe1.max_threads = 31; vfe_state->vfe2.interface_descriptor_base = media_state.vfe_state.interface.bo->offset >> 4; if (media_state.vfe_state.bo) drm_intel_bo_unreference(media_state.vfe_state.bo); media_state.vfe_state.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "vfe state", sizeof(struct brw_vfe_state), 0x1000); if (!media_state.vfe_state.bo) return BadAlloc; drm_intel_bo_subdata(media_state.vfe_state.bo, 0, sizeof(tmp), &tmp); drm_intel_bo_emit_reloc(media_state.vfe_state.bo, offsetof(struct brw_vfe_state, vfe2), media_state.vfe_state.interface.bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0); return Success; } static Status interface_descriptor() { int i; struct brw_interface_descriptor tmp, *desc = &tmp; if (media_state.vfe_state.interface.bo) drm_intel_bo_unreference(media_state.vfe_state.interface.bo); media_state.vfe_state.interface.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "interfaces", MEDIA_KERNEL_NUM * sizeof(struct brw_interface_descriptor), 0x1000); if (!media_state.vfe_state.interface.bo) return BadAlloc; for (i = 0; i < MEDIA_KERNEL_NUM; i++) { memset(desc, 0, sizeof(*desc)); desc->desc0.grf_reg_blocks = 15; desc->desc0.kernel_start_pointer = media_state.vfe_state.interface.kernels[i].bo->offset >> 6; desc->desc1.const_urb_entry_read_offset = 0; desc->desc1.const_urb_entry_read_len = 30; desc->desc3.binding_table_entry_count = MAX_SURFACES - 1; desc->desc3.binding_table_pointer = media_state.binding_table.bo->offset >> 5; drm_intel_bo_subdata(media_state.vfe_state.interface.bo, i * sizeof(tmp), sizeof(tmp), desc); drm_intel_bo_emit_reloc(media_state.vfe_state.interface.bo, i * sizeof(*desc) + offsetof(struct brw_interface_descriptor, desc0), media_state.vfe_state. interface.kernels[i].bo, desc->desc0.grf_reg_blocks, I915_GEM_DOMAIN_INSTRUCTION, 0); drm_intel_bo_emit_reloc(media_state.vfe_state.interface.bo, i * sizeof(*desc) + offsetof(struct brw_interface_descriptor, desc3), media_state.binding_table.bo, desc->desc3.binding_table_entry_count, I915_GEM_DOMAIN_INSTRUCTION, 0); } return Success; } static int setup_media_kernels(struct intel_xvmc_hw_context *ctx) { int i; assert(MEDIA_KERNEL_NUM == sizeof(media_gen5_kernels) / sizeof(media_gen5_kernels[0])); for (i = 0; i < MEDIA_KERNEL_NUM; i++) { if (ctx->i965.is_igdng) media_state.vfe_state.interface.kernels[i].bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "kernel", media_gen5_kernels[i].size, 0x1000); else media_state.vfe_state.interface.kernels[i].bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "kernels", media_kernels[i].size, 0x1000); if (!media_state.vfe_state.interface.kernels[i].bo) goto out; } for (i = 0; i < MEDIA_KERNEL_NUM; i++) { dri_bo *bo = media_state.vfe_state.interface.kernels[i].bo; if (ctx->i965.is_igdng) drm_intel_bo_subdata(bo, 0, media_gen5_kernels[i].size, media_gen5_kernels[i].bin); else drm_intel_bo_subdata(bo, 0, media_kernels[i].size, media_kernels[i].bin); } return 0; out: free_object(&media_state); return BadAlloc; } static Status binding_tables() { unsigned int table[MAX_SURFACES]; int i; if (media_state.binding_table.bo) drm_intel_bo_unreference(media_state.binding_table.bo); media_state.binding_table.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "binding_table", MAX_SURFACES * 4, 0x1000); if (!media_state.binding_table.bo) return BadAlloc; for (i = 0; i < MAX_SURFACES; i++) { table[i] = media_state.binding_table.surface_states[i].bo->offset; drm_intel_bo_emit_reloc(media_state.binding_table.bo, i * sizeof(unsigned int), media_state. binding_table.surface_states[i].bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0); } drm_intel_bo_subdata(media_state.binding_table.bo, 0, sizeof(table), table); return Success; } static Status cs_init(int interface_offset) { char buf[CS_OBJECT_SIZE]; unsigned int *lib_reloc; int i; if (media_state.cs_object.bo) drm_intel_bo_unreference(media_state.cs_object.bo); media_state.cs_object.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "cs object", CS_OBJECT_SIZE, 64); if (!media_state.cs_object.bo) return BadAlloc; memcpy(buf + 32 * 4, idct_table, sizeof(idct_table)); /* idct lib reloction */ lib_reloc = (unsigned int *)(buf + 32 * 20); for (i = 0; i < 8; i++) lib_reloc[i] = media_state.vfe_state.interface.kernels[LIB_INTERFACE + interface_offset].bo-> offset; drm_intel_bo_subdata(media_state.cs_object.bo, 32 * 4, 32 * 16 + 8 * sizeof(unsigned int), buf + 32 * 4); for (i = 0; i < 8; i++) drm_intel_bo_emit_reloc(media_state.cs_object.bo, 32 * 20 + sizeof(unsigned int) * i, media_state.vfe_state. interface.kernels[LIB_INTERFACE + interface_offset].bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0); return Success; } #define STRIDE(w) (w) #define SIZE_YUV420(w, h) (h * (STRIDE(w) + STRIDE(w >> 1))) static Status create_context(Display * display, XvMCContext * context, int priv_count, CARD32 * priv_data) { struct intel_xvmc_context *intel_ctx; struct intel_xvmc_hw_context *hw_ctx; hw_ctx = (struct intel_xvmc_hw_context *)priv_data; intel_ctx = calloc(1, sizeof(struct intel_xvmc_context)); if (!intel_ctx) return BadAlloc; intel_ctx->hw = hw_ctx; context->privData = intel_ctx; intel_ctx->surface_bo_size = SIZE_YUV420(context->width, context->height); if (alloc_object(&media_state)) return BadAlloc; if (setup_media_kernels(hw_ctx)) return BadAlloc; return Success; } static Status destroy_context(Display * display, XvMCContext * context) { struct intel_xvmc_context *intel_ctx; intel_ctx = context->privData; free(intel_ctx->hw); free(intel_ctx); return Success; } static Status load_qmatrix(Display * display, XvMCContext * context, const XvMCQMatrix * qmx) { Status ret; ret = cs_init(0); if (ret != Success) return ret; drm_intel_bo_subdata(media_state.cs_object.bo, 0, 64, qmx->intra_quantiser_matrix); drm_intel_bo_subdata(media_state.cs_object.bo, 64, 64, qmx->non_intra_quantiser_matrix); return Success; } static Status vld_state(const XvMCMpegControl * control) { struct brw_vld_state tmp, *vld = &tmp; if (media_state.vld_state.bo) drm_intel_bo_unreference(media_state.vld_state.bo); media_state.vld_state.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "vld state", sizeof(struct brw_vld_state), 64); if (!media_state.vld_state.bo) return BadAlloc; memset(vld, 0, sizeof(*vld)); vld->vld0.f_code_0_0 = control->FHMV_range + 1; vld->vld0.f_code_0_1 = control->FVMV_range + 1; vld->vld0.f_code_1_0 = control->BHMV_range + 1; vld->vld0.f_code_1_1 = control->BVMV_range + 1; vld->vld0.intra_dc_precision = control->intra_dc_precision; vld->vld0.picture_structure = control->picture_structure; vld->vld0.top_field_first = !!(control->flags & XVMC_TOP_FIELD_FIRST); vld->vld0.frame_predict_frame_dct = !!(control->flags & XVMC_PRED_DCT_FRAME); vld->vld0.concealment_motion_vector = !!(control->flags & XVMC_CONCEALMENT_MOTION_VECTORS); vld->vld0.quantizer_scale_type = !!(control->flags & XVMC_Q_SCALE_TYPE); vld->vld0.intra_vlc_format = !!(control->flags & XVMC_INTRA_VLC_FORMAT); vld->vld0.scan_order = !!(control->flags & XVMC_ALTERNATE_SCAN); vld->vld1.picture_coding_type = control->picture_coding_type; vld->desc_remap_table0.index_0 = FRAME_INTRA; vld->desc_remap_table0.index_1 = FRAME_FRAME_PRED_FORWARD; vld->desc_remap_table0.index_2 = FRAME_FIELD_PRED_FORWARD; vld->desc_remap_table0.index_3 = FRAME_FIELD_PRED_BIDIRECT; /* dual prime */ vld->desc_remap_table0.index_4 = FRAME_FRAME_PRED_BACKWARD; vld->desc_remap_table0.index_5 = FRAME_FIELD_PRED_BACKWARD; vld->desc_remap_table0.index_6 = FRAME_FRAME_PRED_BIDIRECT; vld->desc_remap_table0.index_7 = FRAME_FIELD_PRED_BIDIRECT; vld->desc_remap_table1.index_8 = FRAME_INTRA; vld->desc_remap_table1.index_9 = FRAME_FRAME_PRED_FORWARD; vld->desc_remap_table1.index_10 = FRAME_FIELD_PRED_FORWARD; vld->desc_remap_table1.index_11 = FRAME_FIELD_PRED_BIDIRECT; vld->desc_remap_table1.index_12 = FRAME_FRAME_PRED_BACKWARD; vld->desc_remap_table1.index_13 = FRAME_FIELD_PRED_BACKWARD; vld->desc_remap_table1.index_14 = FRAME_FRAME_PRED_BIDIRECT; vld->desc_remap_table1.index_15 = FRAME_FIELD_PRED_BIDIRECT; drm_intel_bo_subdata(media_state.vld_state.bo, 0, sizeof(tmp), vld); return Success; } static Status setup_media_surface(int index, dri_bo * bo, unsigned long offset, int w, int h, Bool write) { struct brw_surface_state tmp, *ss = &tmp; memset(ss, 0, sizeof(*ss)); ss->ss0.surface_type = BRW_SURFACE_2D; ss->ss0.surface_format = BRW_SURFACEFORMAT_R8_SINT; ss->ss1.base_addr = offset + bo->offset; ss->ss2.width = w - 1; ss->ss2.height = h - 1; ss->ss3.pitch = w - 1; if (media_state.binding_table.surface_states[index].bo) drm_intel_bo_unreference(media_state. binding_table.surface_states[index]. bo); media_state.binding_table.surface_states[index].bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state", sizeof(struct brw_surface_state), 0x1000); if (!media_state.binding_table.surface_states[index].bo) return BadAlloc; drm_intel_bo_subdata(media_state.binding_table.surface_states[index].bo, 0, sizeof(*ss), ss); drm_intel_bo_emit_reloc(media_state.binding_table. surface_states[index].bo, offsetof(struct brw_surface_state, ss1), bo, offset, I915_GEM_DOMAIN_RENDER, write ? I915_GEM_DOMAIN_RENDER : 0); return Success; } static Status setup_surface(struct intel_xvmc_surface *target, struct intel_xvmc_surface *past, struct intel_xvmc_surface *future, int w, int h) { Status ret; ret = setup_media_surface(0, target->bo, 0, w, h, TRUE); if (ret != Success) return ret; ret = setup_media_surface(1, target->bo, w * h, w / 2, h / 2, TRUE); if (ret != Success) return ret; ret = setup_media_surface(2, target->bo, w * h + w * h / 4, w / 2, h / 2, TRUE); if (ret != Success) return ret; if (past) { ret = setup_media_surface(4, past->bo, 0, w, h, FALSE); if (ret != Success) return ret; ret = setup_media_surface(5, past->bo, w * h, w / 2, h / 2, FALSE); if (ret != Success) return ret; ret = setup_media_surface(6, past->bo, w * h + w * h / 4, w / 2, h / 2, FALSE); if (ret != Success) return ret; } if (future) { ret = setup_media_surface(7, future->bo, 0, w, h, FALSE); if (ret != Success) return ret; ret = setup_media_surface(8, future->bo, w * h, w / 2, h / 2, FALSE); if (ret != Success) return ret; ret = setup_media_surface(9, future->bo, w * h + w * h / 4, w / 2, h / 2, FALSE); if (ret != Success) return ret; } return Success; } static Status begin_surface(Display * display, XvMCContext * context, XvMCSurface * target, XvMCSurface * past, XvMCSurface * future, const XvMCMpegControl * control) { struct intel_xvmc_surface *priv_target, *priv_past, *priv_future; intel_xvmc_context_ptr intel_ctx = context->privData; Status ret; priv_target = target->privData; priv_past = past ? past->privData : NULL; priv_future = future ? future->privData : NULL; ret = vld_state(control); if (ret != Success) return ret; ret = setup_surface(priv_target, priv_past, priv_future, context->width, context->height); if (ret != Success) return ret; ret = binding_tables(); if (ret != Success) return ret; ret = interface_descriptor(); if (ret != Success) return ret; ret = vfe_state(VFE_VLD_MODE); if (ret != Success) return ret; LOCK_HARDWARE(intel_ctx->hw_context); flush(); UNLOCK_HARDWARE(intel_ctx->hw_context); return Success; } static Status put_slice(Display * display, XvMCContext * context, unsigned char *slice, int nbytes) { return Success; } static void state_base_address(struct intel_xvmc_hw_context *ctx) { BATCH_LOCALS; if (ctx->i965.is_igdng) { BEGIN_BATCH(8); OUT_BATCH(BRW_STATE_BASE_ADDRESS | 6); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); ADVANCE_BATCH(); } else { BEGIN_BATCH(6); OUT_BATCH(BRW_STATE_BASE_ADDRESS | 4); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); ADVANCE_BATCH(); } } static void pipeline_select() { BATCH_LOCALS; BEGIN_BATCH(1); OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); ADVANCE_BATCH(); } static void media_state_pointers(int vfe_mode) { BATCH_LOCALS; BEGIN_BATCH(3); OUT_BATCH(BRW_MEDIA_STATE_POINTERS | 1); if (vfe_mode == VFE_VLD_MODE) OUT_RELOC(media_state.vld_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1); else OUT_BATCH(0); OUT_RELOC(media_state.vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); ADVANCE_BATCH(); } static void align_urb_fence() { BATCH_LOCALS; int i, offset_to_next_cacheline; unsigned long batch_offset; BEGIN_BATCH(3); batch_offset = (void *)batch_ptr - xvmc_driver->alloc.ptr; offset_to_next_cacheline = ALIGN(batch_offset, 64) - batch_offset; if (offset_to_next_cacheline <= 12 && offset_to_next_cacheline != 0) { for (i = 0; i < offset_to_next_cacheline / 4; i++) OUT_BATCH(0); ADVANCE_BATCH(); } } static void urb_layout() { BATCH_LOCALS; align_urb_fence(); BEGIN_BATCH(3); OUT_BATCH(BRW_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | UF0_SF_REALLOC | UF0_CLIP_REALLOC | UF0_GS_REALLOC | UF0_VS_REALLOC | 1); OUT_BATCH((0 << UF1_CLIP_FENCE_SHIFT) | (0 << UF1_GS_FENCE_SHIFT) | (0 << UF1_VS_FENCE_SHIFT)); OUT_BATCH((0 << UF2_CS_FENCE_SHIFT) | (0 << UF2_SF_FENCE_SHIFT) | ((URB_SIZE - CS_SIZE - 1) << UF2_VFE_FENCE_SHIFT) | /* VFE_SIZE */ ((URB_SIZE) << UF2_CS_FENCE_SHIFT)); /* CS_SIZE */ ADVANCE_BATCH(); } static void cs_urb_layout() { BATCH_LOCALS; BEGIN_BATCH(2); OUT_BATCH(BRW_CS_URB_STATE | 0); OUT_BATCH((CS_SIZE << 4) | /* URB Entry Allocation Size */ (1 << 0)); /* Number of URB Entries */ ADVANCE_BATCH(); } static void cs_buffer() { BATCH_LOCALS; BEGIN_BATCH(2); OUT_BATCH(BRW_CONSTANT_BUFFER | 0 | (1 << 8)); OUT_RELOC(media_state.cs_object.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, CS_SIZE); ADVANCE_BATCH(); } /* kick media object to gpu in idct mode*/ static void send_media_object(XvMCMacroBlock * mb, dri_bo * bo, uint32_t offset, enum interface interface) { BATCH_LOCALS; BEGIN_BATCH(13); OUT_BATCH(BRW_MEDIA_OBJECT | 11); OUT_BATCH(interface); OUT_BATCH(6 * 128); OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, 0, offset); OUT_BATCH(mb->x << 4); OUT_BATCH(mb->y << 4); OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, 0, offset); OUT_BATCH_SHORT(mb->coded_block_pattern); OUT_BATCH_SHORT(mb->PMV[0][0][0]); OUT_BATCH_SHORT(mb->PMV[0][0][1]); OUT_BATCH_SHORT(mb->PMV[0][1][0]); OUT_BATCH_SHORT(mb->PMV[0][1][1]); OUT_BATCH_SHORT(mb->PMV[1][0][0]); OUT_BATCH_SHORT(mb->PMV[1][0][1]); OUT_BATCH_SHORT(mb->PMV[1][1][0]); OUT_BATCH_SHORT(mb->PMV[1][1][1]); OUT_BATCH_CHAR(mb->dct_type); OUT_BATCH_CHAR(mb->motion_vertical_field_select); OUT_BATCH(0xffffffff); ADVANCE_BATCH(); } /* kick media object to gpu in vld mode*/ static void vld_send_media_object(dri_bo * bo, int slice_len, int mb_h_pos, int mb_v_pos, int mb_bit_offset, int mb_count, int q_scale_code) { BATCH_LOCALS; BEGIN_BATCH(6); OUT_BATCH(BRW_MEDIA_OBJECT | 4); OUT_BATCH(0); OUT_BATCH(slice_len); OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); OUT_BATCH((mb_h_pos << 24) | (mb_v_pos << 16) | (mb_count << 8) | (mb_bit_offset)); OUT_BATCH(q_scale_code << 24); ADVANCE_BATCH(); } static Status put_slice2(Display * display, XvMCContext * context, unsigned char *slice, int nbytes, int sliceCode) { unsigned int bit_buf; intel_xvmc_context_ptr intel_ctx = context->privData; struct intel_xvmc_hw_context *hw_ctx = intel_ctx->hw; int q_scale_code, mb_row; mb_row = *(slice - 1) - 1; bit_buf = (slice[0] << 24) | (slice[1] << 16) | (slice[2] << 8) | (slice[3]); q_scale_code = bit_buf >> 27; if (media_state.slice_data.bo) { drm_intel_gem_bo_unmap_gtt(media_state.slice_data.bo); drm_intel_bo_unreference(media_state.slice_data.bo); } media_state.slice_data.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "slice data", VLD_MAX_SLICE_SIZE, 64); if (!media_state.slice_data.bo) return BadAlloc; drm_intel_gem_bo_map_gtt(media_state.slice_data.bo); memcpy(media_state.slice_data.bo->virtual, slice, nbytes); LOCK_HARDWARE(intel_ctx->hw_context); state_base_address(hw_ctx); pipeline_select(); media_state_pointers(VFE_VLD_MODE); urb_layout(); cs_urb_layout(); cs_buffer(); vld_send_media_object(media_state.slice_data.bo, nbytes, 0, mb_row, 6, 127, q_scale_code); intelFlushBatch(); UNLOCK_HARDWARE(intel_ctx->hw_context); return Success; } static Status render_surface(Display * display, XvMCContext * context, unsigned int picture_structure, XvMCSurface * target_surface, XvMCSurface * past_surface, XvMCSurface * future_surface, unsigned int flags, unsigned int num_macroblocks, unsigned int first_macroblock, XvMCMacroBlockArray * macroblock_array, XvMCBlockArray * blocks) { struct intel_xvmc_surface *priv_target, *priv_past, *priv_future; intel_xvmc_context_ptr intel_ctx; XvMCMacroBlock *mb; Status ret; unsigned short *block_ptr; int i, j; int block_offset = 0; struct intel_xvmc_hw_context *hw_ctx; intel_ctx = context->privData; hw_ctx = (struct intel_xvmc_hw_context *)context->privData; priv_target = target_surface->privData; priv_past = past_surface ? past_surface->privData : NULL; priv_future = future_surface ? future_surface->privData : NULL; ret = setup_surface(priv_target, priv_past, priv_future, context->width, context->height); if (ret != Success) return ret; ret = binding_tables(); if (ret != Success) return ret; ret = interface_descriptor(); if (ret != Success) return ret; ret = cs_init(INTERFACE_NUM); if (ret != Success) return ret; ret = vfe_state(VFE_GENERIC_MODE); if (ret != Success) return ret; if (media_state.mb_data.bo) { drm_intel_gem_bo_unmap_gtt(media_state.mb_data.bo); drm_intel_bo_unreference(media_state.mb_data.bo); } unsigned int block_num = (((context->width + 15) >> 4) * ((context->height + 15) >> 4)); unsigned int surface_size = (64 * sizeof(short) * 6 * block_num); media_state.mb_data.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "macroblock data", surface_size, 64); if (!media_state.mb_data.bo) return BadAlloc; drm_intel_gem_bo_map_gtt(media_state.mb_data.bo); block_ptr = media_state.mb_data.bo->virtual; unsigned short *mb_block_ptr; for (i = first_macroblock; i < num_macroblocks + first_macroblock; i++) { mb = ¯oblock_array->macro_blocks[i]; mb_block_ptr = &blocks->blocks[(mb->index << 6)]; if (mb->coded_block_pattern & 0x20) { for (j = 0; j < 8; j++) memcpy(block_ptr + 16 * j, mb_block_ptr + 8 * j, 16); mb_block_ptr += 64; } if (mb->coded_block_pattern & 0x10) { for (j = 0; j < 8; j++) memcpy(block_ptr + 16 * j + 8, mb_block_ptr + 8 * j, 16); mb_block_ptr += 64; } block_ptr += 2 * 64; if (mb->coded_block_pattern & 0x08) { for (j = 0; j < 8; j++) memcpy(block_ptr + 16 * j, mb_block_ptr + 8 * j, 16); mb_block_ptr += 64; } if (mb->coded_block_pattern & 0x04) { for (j = 0; j < 8; j++) memcpy(block_ptr + 16 * j + 8, mb_block_ptr + 8 * j, 16); mb_block_ptr += 64; } block_ptr += 2 * 64; if (mb->coded_block_pattern & 0x2) { memcpy(block_ptr, mb_block_ptr, 128); mb_block_ptr += 64; } block_ptr += 64; if (mb->coded_block_pattern & 0x1) memcpy(block_ptr, mb_block_ptr, 128); block_ptr += 64; } LOCK_HARDWARE(intel_ctx->hw_context); state_base_address(hw_ctx); flush(); pipeline_select(); urb_layout(); media_state_pointers(VFE_GENERIC_MODE); cs_urb_layout(); cs_buffer(); for (i = first_macroblock; i < num_macroblocks + first_macroblock; i++, block_offset += 128 * 6) { mb = ¯oblock_array->macro_blocks[i]; if (mb->macroblock_type & XVMC_MB_TYPE_INTRA) { send_media_object(mb, media_state.mb_data.bo, block_offset, FRAME_INTRA + INTERFACE_NUM); } else { if (((mb->motion_type & 3) == XVMC_PREDICTION_FRAME)) { if ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD)) { if ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD)) { send_media_object(mb, media_state.mb_data. bo, block_offset, FRAME_FRAME_PRED_BIDIRECT + INTERFACE_NUM); } else { send_media_object(mb, media_state.mb_data. bo, block_offset, FRAME_FRAME_PRED_FORWARD + INTERFACE_NUM); } } else if ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD)) { send_media_object(mb, media_state. mb_data.bo, block_offset, FRAME_FRAME_PRED_BACKWARD + INTERFACE_NUM); } } else if ((mb->motion_type & 3) == XVMC_PREDICTION_FIELD) { if ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD)) { if (((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD))) { send_media_object(mb, media_state.mb_data. bo, block_offset, FRAME_FIELD_PRED_BIDIRECT + INTERFACE_NUM); } else { send_media_object(mb, media_state.mb_data. bo, block_offset, FRAME_FIELD_PRED_FORWARD + INTERFACE_NUM); } } else if ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD)) { send_media_object(mb, media_state. mb_data.bo, block_offset, FRAME_FIELD_PRED_BACKWARD + INTERFACE_NUM); } } else { send_media_object(mb, media_state.mb_data.bo, block_offset, FRAME_FIELD_PRED_BIDIRECT + INTERFACE_NUM); /*dual prime */ } } } intelFlushBatch(); UNLOCK_HARDWARE(intel_ctx->hw_context); return Success; } struct _intel_xvmc_driver xvmc_vld_driver = { .type = XVMC_I965_MPEG2_VLD, .create_context = create_context, .destroy_context = destroy_context, .load_qmatrix = load_qmatrix, .begin_surface = begin_surface, .render_surface = render_surface, .put_slice = put_slice, .put_slice2 = put_slice2 }; xf86-video-intel-2.99.917/xvmc/brw_defines.h0000664000175000017500000010617512400044327015352 00000000000000 /************************************************************************** * * Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef BRW_DEFINES_H #define BRW_DEFINES_H /* */ #if 0 #define MI_NOOP 0x00 #define MI_USER_INTERRUPT 0x02 #define MI_WAIT_FOR_EVENT 0x03 #define MI_FLUSH 0x04 #define MI_REPORT_HEAD 0x07 #define MI_ARB_ON_OFF 0x08 #define MI_BATCH_BUFFER_END 0x0A #define MI_OVERLAY_FLIP 0x11 #define MI_LOAD_SCAN_LINES_INCL 0x12 #define MI_LOAD_SCAN_LINES_EXCL 0x13 #define MI_DISPLAY_BUFFER_INFO 0x14 #define MI_SET_CONTEXT 0x18 #define MI_STORE_DATA_IMM 0x20 #define MI_STORE_DATA_INDEX 0x21 #define MI_LOAD_REGISTER_IMM 0x22 #define MI_STORE_REGISTER_MEM 0x24 #define MI_BATCH_BUFFER_START 0x31 #define MI_SYNCHRONOUS_FLIP 0x0 #define MI_ASYNCHRONOUS_FLIP 0x1 #define MI_BUFFER_SECURE 0x0 #define MI_BUFFER_NONSECURE 0x1 #define MI_ARBITRATE_AT_CHAIN_POINTS 0x0 #define MI_ARBITRATE_BETWEEN_INSTS 0x1 #define MI_NO_ARBITRATION 0x3 #define MI_CONDITION_CODE_WAIT_DISABLED 0x0 #define MI_CONDITION_CODE_WAIT_0 0x1 #define MI_CONDITION_CODE_WAIT_1 0x2 #define MI_CONDITION_CODE_WAIT_2 0x3 #define MI_CONDITION_CODE_WAIT_3 0x4 #define MI_CONDITION_CODE_WAIT_4 0x5 #define MI_DISPLAY_PIPE_A 0x0 #define MI_DISPLAY_PIPE_B 0x1 #define MI_DISPLAY_PLANE_A 0x0 #define MI_DISPLAY_PLANE_B 0x1 #define MI_DISPLAY_PLANE_C 0x2 #define MI_STANDARD_FLIP 0x0 #define MI_ENQUEUE_FLIP_PERFORM_BASE_FRAME_NUMBER_LOAD 0x1 #define MI_ENQUEUE_FLIP_TARGET_FRAME_NUMBER_RELATIVE 0x2 #define MI_ENQUEUE_FLIP_ABSOLUTE_TARGET_FRAME_NUMBER 0x3 #define MI_PHYSICAL_ADDRESS 0x0 #define MI_VIRTUAL_ADDRESS 0x1 #define MI_BUFFER_MEMORY_MAIN 0x0 #define MI_BUFFER_MEMORY_GTT 0x2 #define MI_BUFFER_MEMORY_PER_PROCESS_GTT 0x3 #define MI_FLIP_CONTINUE 0x0 #define MI_FLIP_ON 0x1 #define MI_FLIP_OFF 0x2 #define MI_UNTRUSTED_REGISTER_SPACE 0x0 #define MI_TRUSTED_REGISTER_SPACE 0x1 #endif /* 3D state: */ #define _3DOP_3DSTATE_PIPELINED 0x0 #define _3DOP_3DSTATE_NONPIPELINED 0x1 #define _3DOP_3DCONTROL 0x2 #define _3DOP_3DPRIMITIVE 0x3 #define _3DSTATE_PIPELINED_POINTERS 0x00 #define _3DSTATE_BINDING_TABLE_POINTERS 0x01 #define _3DSTATE_VERTEX_BUFFERS 0x08 #define _3DSTATE_VERTEX_ELEMENTS 0x09 #define _3DSTATE_INDEX_BUFFER 0x0A #define _3DSTATE_VF_STATISTICS 0x0B #define _3DSTATE_DRAWING_RECTANGLE 0x00 #define _3DSTATE_CONSTANT_COLOR 0x01 #define _3DSTATE_SAMPLER_PALETTE_LOAD 0x02 #define _3DSTATE_CHROMA_KEY 0x04 #define _3DSTATE_DEPTH_BUFFER 0x05 #define _3DSTATE_POLY_STIPPLE_OFFSET 0x06 #define _3DSTATE_POLY_STIPPLE_PATTERN 0x07 #define _3DSTATE_LINE_STIPPLE 0x08 #define _3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP 0x09 #define _3DCONTROL 0x00 #define _3DPRIMITIVE 0x00 #define PIPE_CONTROL_NOWRITE 0x00 #define PIPE_CONTROL_WRITEIMMEDIATE 0x01 #define PIPE_CONTROL_WRITEDEPTH 0x02 #define PIPE_CONTROL_WRITETIMESTAMP 0x03 #define PIPE_CONTROL_GTTWRITE_PROCESS_LOCAL 0x00 #define PIPE_CONTROL_GTTWRITE_GLOBAL 0x01 #define _3DPRIM_POINTLIST 0x01 #define _3DPRIM_LINELIST 0x02 #define _3DPRIM_LINESTRIP 0x03 #define _3DPRIM_TRILIST 0x04 #define _3DPRIM_TRISTRIP 0x05 #define _3DPRIM_TRIFAN 0x06 #define _3DPRIM_QUADLIST 0x07 #define _3DPRIM_QUADSTRIP 0x08 #define _3DPRIM_LINELIST_ADJ 0x09 #define _3DPRIM_LINESTRIP_ADJ 0x0A #define _3DPRIM_TRILIST_ADJ 0x0B #define _3DPRIM_TRISTRIP_ADJ 0x0C #define _3DPRIM_TRISTRIP_REVERSE 0x0D #define _3DPRIM_POLYGON 0x0E #define _3DPRIM_RECTLIST 0x0F #define _3DPRIM_LINELOOP 0x10 #define _3DPRIM_POINTLIST_BF 0x11 #define _3DPRIM_LINESTRIP_CONT 0x12 #define _3DPRIM_LINESTRIP_BF 0x13 #define _3DPRIM_LINESTRIP_CONT_BF 0x14 #define _3DPRIM_TRIFAN_NOSTIPPLE 0x15 #define _3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL 0 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 #define BRW_ANISORATIO_2 0 #define BRW_ANISORATIO_4 1 #define BRW_ANISORATIO_6 2 #define BRW_ANISORATIO_8 3 #define BRW_ANISORATIO_10 4 #define BRW_ANISORATIO_12 5 #define BRW_ANISORATIO_14 6 #define BRW_ANISORATIO_16 7 #define BRW_BLENDFACTOR_ONE 0x1 #define BRW_BLENDFACTOR_SRC_COLOR 0x2 #define BRW_BLENDFACTOR_SRC_ALPHA 0x3 #define BRW_BLENDFACTOR_DST_ALPHA 0x4 #define BRW_BLENDFACTOR_DST_COLOR 0x5 #define BRW_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6 #define BRW_BLENDFACTOR_CONST_COLOR 0x7 #define BRW_BLENDFACTOR_CONST_ALPHA 0x8 #define BRW_BLENDFACTOR_SRC1_COLOR 0x9 #define BRW_BLENDFACTOR_SRC1_ALPHA 0x0A #define BRW_BLENDFACTOR_ZERO 0x11 #define BRW_BLENDFACTOR_INV_SRC_COLOR 0x12 #define BRW_BLENDFACTOR_INV_SRC_ALPHA 0x13 #define BRW_BLENDFACTOR_INV_DST_ALPHA 0x14 #define BRW_BLENDFACTOR_INV_DST_COLOR 0x15 #define BRW_BLENDFACTOR_INV_CONST_COLOR 0x17 #define BRW_BLENDFACTOR_INV_CONST_ALPHA 0x18 #define BRW_BLENDFACTOR_INV_SRC1_COLOR 0x19 #define BRW_BLENDFACTOR_INV_SRC1_ALPHA 0x1A #define BRW_BLENDFUNCTION_ADD 0 #define BRW_BLENDFUNCTION_SUBTRACT 1 #define BRW_BLENDFUNCTION_REVERSE_SUBTRACT 2 #define BRW_BLENDFUNCTION_MIN 3 #define BRW_BLENDFUNCTION_MAX 4 #define BRW_ALPHATEST_FORMAT_UNORM8 0 #define BRW_ALPHATEST_FORMAT_FLOAT32 1 #define BRW_CHROMAKEY_KILL_ON_ANY_MATCH 0 #define BRW_CHROMAKEY_REPLACE_BLACK 1 #define BRW_CLIP_API_OGL 0 #define BRW_CLIP_API_DX 1 #define BRW_CLIPMODE_NORMAL 0 #define BRW_CLIPMODE_CLIP_ALL 1 #define BRW_CLIPMODE_CLIP_NON_REJECTED 2 #define BRW_CLIPMODE_REJECT_ALL 3 #define BRW_CLIPMODE_ACCEPT_ALL 4 #define BRW_CLIP_NDCSPACE 0 #define BRW_CLIP_SCREENSPACE 1 #define BRW_COMPAREFUNCTION_ALWAYS 0 #define BRW_COMPAREFUNCTION_NEVER 1 #define BRW_COMPAREFUNCTION_LESS 2 #define BRW_COMPAREFUNCTION_EQUAL 3 #define BRW_COMPAREFUNCTION_LEQUAL 4 #define BRW_COMPAREFUNCTION_GREATER 5 #define BRW_COMPAREFUNCTION_NOTEQUAL 6 #define BRW_COMPAREFUNCTION_GEQUAL 7 #define BRW_COVERAGE_PIXELS_HALF 0 #define BRW_COVERAGE_PIXELS_1 1 #define BRW_COVERAGE_PIXELS_2 2 #define BRW_COVERAGE_PIXELS_4 3 #define BRW_CULLMODE_BOTH 0 #define BRW_CULLMODE_NONE 1 #define BRW_CULLMODE_FRONT 2 #define BRW_CULLMODE_BACK 3 #define BRW_DEFAULTCOLOR_R8G8B8A8_UNORM 0 #define BRW_DEFAULTCOLOR_R32G32B32A32_FLOAT 1 #define BRW_DEPTHFORMAT_D32_FLOAT_S8X24_UINT 0 #define BRW_DEPTHFORMAT_D32_FLOAT 1 #define BRW_DEPTHFORMAT_D24_UNORM_S8_UINT 2 #define BRW_DEPTHFORMAT_D16_UNORM 5 #define BRW_FLOATING_POINT_IEEE_754 0 #define BRW_FLOATING_POINT_NON_IEEE_754 1 #define BRW_FRONTWINDING_CW 0 #define BRW_FRONTWINDING_CCW 1 #define BRW_INDEX_BYTE 0 #define BRW_INDEX_WORD 1 #define BRW_INDEX_DWORD 2 #define BRW_LOGICOPFUNCTION_CLEAR 0 #define BRW_LOGICOPFUNCTION_NOR 1 #define BRW_LOGICOPFUNCTION_AND_INVERTED 2 #define BRW_LOGICOPFUNCTION_COPY_INVERTED 3 #define BRW_LOGICOPFUNCTION_AND_REVERSE 4 #define BRW_LOGICOPFUNCTION_INVERT 5 #define BRW_LOGICOPFUNCTION_XOR 6 #define BRW_LOGICOPFUNCTION_NAND 7 #define BRW_LOGICOPFUNCTION_AND 8 #define BRW_LOGICOPFUNCTION_EQUIV 9 #define BRW_LOGICOPFUNCTION_NOOP 10 #define BRW_LOGICOPFUNCTION_OR_INVERTED 11 #define BRW_LOGICOPFUNCTION_COPY 12 #define BRW_LOGICOPFUNCTION_OR_REVERSE 13 #define BRW_LOGICOPFUNCTION_OR 14 #define BRW_LOGICOPFUNCTION_SET 15 #define BRW_MAPFILTER_NEAREST 0x0 #define BRW_MAPFILTER_LINEAR 0x1 #define BRW_MAPFILTER_ANISOTROPIC 0x2 #define BRW_MIPFILTER_NONE 0 #define BRW_MIPFILTER_NEAREST 1 #define BRW_MIPFILTER_LINEAR 3 #define BRW_POLYGON_FRONT_FACING 0 #define BRW_POLYGON_BACK_FACING 1 #define BRW_PREFILTER_ALWAYS 0x0 #define BRW_PREFILTER_NEVER 0x1 #define BRW_PREFILTER_LESS 0x2 #define BRW_PREFILTER_EQUAL 0x3 #define BRW_PREFILTER_LEQUAL 0x4 #define BRW_PREFILTER_GREATER 0x5 #define BRW_PREFILTER_NOTEQUAL 0x6 #define BRW_PREFILTER_GEQUAL 0x7 #define BRW_PROVOKING_VERTEX_0 0 #define BRW_PROVOKING_VERTEX_1 1 #define BRW_PROVOKING_VERTEX_2 2 #define BRW_RASTRULE_UPPER_LEFT 0 #define BRW_RASTRULE_UPPER_RIGHT 1 #define BRW_RENDERTARGET_CLAMPRANGE_UNORM 0 #define BRW_RENDERTARGET_CLAMPRANGE_SNORM 1 #define BRW_RENDERTARGET_CLAMPRANGE_FORMAT 2 #define BRW_STENCILOP_KEEP 0 #define BRW_STENCILOP_ZERO 1 #define BRW_STENCILOP_REPLACE 2 #define BRW_STENCILOP_INCRSAT 3 #define BRW_STENCILOP_DECRSAT 4 #define BRW_STENCILOP_INCR 5 #define BRW_STENCILOP_DECR 6 #define BRW_STENCILOP_INVERT 7 #define BRW_SURFACE_MIPMAPLAYOUT_BELOW 0 #define BRW_SURFACE_MIPMAPLAYOUT_RIGHT 1 #define BRW_SURFACEFORMAT_R32G32B32A32_FLOAT 0x000 #define BRW_SURFACEFORMAT_R32G32B32A32_SINT 0x001 #define BRW_SURFACEFORMAT_R32G32B32A32_UINT 0x002 #define BRW_SURFACEFORMAT_R32G32B32A32_UNORM 0x003 #define BRW_SURFACEFORMAT_R32G32B32A32_SNORM 0x004 #define BRW_SURFACEFORMAT_R64G64_FLOAT 0x005 #define BRW_SURFACEFORMAT_R32G32B32X32_FLOAT 0x006 #define BRW_SURFACEFORMAT_R32G32B32A32_SSCALED 0x007 #define BRW_SURFACEFORMAT_R32G32B32A32_USCALED 0x008 #define BRW_SURFACEFORMAT_R32G32B32_FLOAT 0x040 #define BRW_SURFACEFORMAT_R32G32B32_SINT 0x041 #define BRW_SURFACEFORMAT_R32G32B32_UINT 0x042 #define BRW_SURFACEFORMAT_R32G32B32_UNORM 0x043 #define BRW_SURFACEFORMAT_R32G32B32_SNORM 0x044 #define BRW_SURFACEFORMAT_R32G32B32_SSCALED 0x045 #define BRW_SURFACEFORMAT_R32G32B32_USCALED 0x046 #define BRW_SURFACEFORMAT_R16G16B16A16_UNORM 0x080 #define BRW_SURFACEFORMAT_R16G16B16A16_SNORM 0x081 #define BRW_SURFACEFORMAT_R16G16B16A16_SINT 0x082 #define BRW_SURFACEFORMAT_R16G16B16A16_UINT 0x083 #define BRW_SURFACEFORMAT_R16G16B16A16_FLOAT 0x084 #define BRW_SURFACEFORMAT_R32G32_FLOAT 0x085 #define BRW_SURFACEFORMAT_R32G32_SINT 0x086 #define BRW_SURFACEFORMAT_R32G32_UINT 0x087 #define BRW_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS 0x088 #define BRW_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT 0x089 #define BRW_SURFACEFORMAT_L32A32_FLOAT 0x08A #define BRW_SURFACEFORMAT_R32G32_UNORM 0x08B #define BRW_SURFACEFORMAT_R32G32_SNORM 0x08C #define BRW_SURFACEFORMAT_R64_FLOAT 0x08D #define BRW_SURFACEFORMAT_R16G16B16X16_UNORM 0x08E #define BRW_SURFACEFORMAT_R16G16B16X16_FLOAT 0x08F #define BRW_SURFACEFORMAT_A32X32_FLOAT 0x090 #define BRW_SURFACEFORMAT_L32X32_FLOAT 0x091 #define BRW_SURFACEFORMAT_I32X32_FLOAT 0x092 #define BRW_SURFACEFORMAT_R16G16B16A16_SSCALED 0x093 #define BRW_SURFACEFORMAT_R16G16B16A16_USCALED 0x094 #define BRW_SURFACEFORMAT_R32G32_SSCALED 0x095 #define BRW_SURFACEFORMAT_R32G32_USCALED 0x096 #define BRW_SURFACEFORMAT_B8G8R8A8_UNORM 0x0C0 #define BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB 0x0C1 #define BRW_SURFACEFORMAT_R10G10B10A2_UNORM 0x0C2 #define BRW_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB 0x0C3 #define BRW_SURFACEFORMAT_R10G10B10A2_UINT 0x0C4 #define BRW_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM 0x0C5 #define BRW_SURFACEFORMAT_R8G8B8A8_UNORM 0x0C7 #define BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB 0x0C8 #define BRW_SURFACEFORMAT_R8G8B8A8_SNORM 0x0C9 #define BRW_SURFACEFORMAT_R8G8B8A8_SINT 0x0CA #define BRW_SURFACEFORMAT_R8G8B8A8_UINT 0x0CB #define BRW_SURFACEFORMAT_R16G16_UNORM 0x0CC #define BRW_SURFACEFORMAT_R16G16_SNORM 0x0CD #define BRW_SURFACEFORMAT_R16G16_SINT 0x0CE #define BRW_SURFACEFORMAT_R16G16_UINT 0x0CF #define BRW_SURFACEFORMAT_R16G16_FLOAT 0x0D0 #define BRW_SURFACEFORMAT_B10G10R10A2_UNORM 0x0D1 #define BRW_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB 0x0D2 #define BRW_SURFACEFORMAT_R11G11B10_FLOAT 0x0D3 #define BRW_SURFACEFORMAT_R32_SINT 0x0D6 #define BRW_SURFACEFORMAT_R32_UINT 0x0D7 #define BRW_SURFACEFORMAT_R32_FLOAT 0x0D8 #define BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS 0x0D9 #define BRW_SURFACEFORMAT_X24_TYPELESS_G8_UINT 0x0DA #define BRW_SURFACEFORMAT_L16A16_UNORM 0x0DF #define BRW_SURFACEFORMAT_I24X8_UNORM 0x0E0 #define BRW_SURFACEFORMAT_L24X8_UNORM 0x0E1 #define BRW_SURFACEFORMAT_A24X8_UNORM 0x0E2 #define BRW_SURFACEFORMAT_I32_FLOAT 0x0E3 #define BRW_SURFACEFORMAT_L32_FLOAT 0x0E4 #define BRW_SURFACEFORMAT_A32_FLOAT 0x0E5 #define BRW_SURFACEFORMAT_B8G8R8X8_UNORM 0x0E9 #define BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB 0x0EA #define BRW_SURFACEFORMAT_R8G8B8X8_UNORM 0x0EB #define BRW_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB 0x0EC #define BRW_SURFACEFORMAT_R9G9B9E5_SHAREDEXP 0x0ED #define BRW_SURFACEFORMAT_B10G10R10X2_UNORM 0x0EE #define BRW_SURFACEFORMAT_L16A16_FLOAT 0x0F0 #define BRW_SURFACEFORMAT_R32_UNORM 0x0F1 #define BRW_SURFACEFORMAT_R32_SNORM 0x0F2 #define BRW_SURFACEFORMAT_R10G10B10X2_USCALED 0x0F3 #define BRW_SURFACEFORMAT_R8G8B8A8_SSCALED 0x0F4 #define BRW_SURFACEFORMAT_R8G8B8A8_USCALED 0x0F5 #define BRW_SURFACEFORMAT_R16G16_SSCALED 0x0F6 #define BRW_SURFACEFORMAT_R16G16_USCALED 0x0F7 #define BRW_SURFACEFORMAT_R32_SSCALED 0x0F8 #define BRW_SURFACEFORMAT_R32_USCALED 0x0F9 #define BRW_SURFACEFORMAT_B5G6R5_UNORM 0x100 #define BRW_SURFACEFORMAT_B5G6R5_UNORM_SRGB 0x101 #define BRW_SURFACEFORMAT_B5G5R5A1_UNORM 0x102 #define BRW_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB 0x103 #define BRW_SURFACEFORMAT_B4G4R4A4_UNORM 0x104 #define BRW_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB 0x105 #define BRW_SURFACEFORMAT_R8G8_UNORM 0x106 #define BRW_SURFACEFORMAT_R8G8_SNORM 0x107 #define BRW_SURFACEFORMAT_R8G8_SINT 0x108 #define BRW_SURFACEFORMAT_R8G8_UINT 0x109 #define BRW_SURFACEFORMAT_R16_UNORM 0x10A #define BRW_SURFACEFORMAT_R16_SNORM 0x10B #define BRW_SURFACEFORMAT_R16_SINT 0x10C #define BRW_SURFACEFORMAT_R16_UINT 0x10D #define BRW_SURFACEFORMAT_R16_FLOAT 0x10E #define BRW_SURFACEFORMAT_I16_UNORM 0x111 #define BRW_SURFACEFORMAT_L16_UNORM 0x112 #define BRW_SURFACEFORMAT_A16_UNORM 0x113 #define BRW_SURFACEFORMAT_L8A8_UNORM 0x114 #define BRW_SURFACEFORMAT_I16_FLOAT 0x115 #define BRW_SURFACEFORMAT_L16_FLOAT 0x116 #define BRW_SURFACEFORMAT_A16_FLOAT 0x117 #define BRW_SURFACEFORMAT_R5G5_SNORM_B6_UNORM 0x119 #define BRW_SURFACEFORMAT_B5G5R5X1_UNORM 0x11A #define BRW_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB 0x11B #define BRW_SURFACEFORMAT_R8G8_SSCALED 0x11C #define BRW_SURFACEFORMAT_R8G8_USCALED 0x11D #define BRW_SURFACEFORMAT_R16_SSCALED 0x11E #define BRW_SURFACEFORMAT_R16_USCALED 0x11F #define BRW_SURFACEFORMAT_R8_UNORM 0x140 #define BRW_SURFACEFORMAT_R8_SNORM 0x141 #define BRW_SURFACEFORMAT_R8_SINT 0x142 #define BRW_SURFACEFORMAT_R8_UINT 0x143 #define BRW_SURFACEFORMAT_A8_UNORM 0x144 #define BRW_SURFACEFORMAT_I8_UNORM 0x145 #define BRW_SURFACEFORMAT_L8_UNORM 0x146 #define BRW_SURFACEFORMAT_P4A4_UNORM 0x147 #define BRW_SURFACEFORMAT_A4P4_UNORM 0x148 #define BRW_SURFACEFORMAT_R8_SSCALED 0x149 #define BRW_SURFACEFORMAT_R8_USCALED 0x14A #define BRW_SURFACEFORMAT_R1_UINT 0x181 #define BRW_SURFACEFORMAT_YCRCB_NORMAL 0x182 #define BRW_SURFACEFORMAT_YCRCB_SWAPUVY 0x183 #define BRW_SURFACEFORMAT_BC1_UNORM 0x186 #define BRW_SURFACEFORMAT_BC2_UNORM 0x187 #define BRW_SURFACEFORMAT_BC3_UNORM 0x188 #define BRW_SURFACEFORMAT_BC4_UNORM 0x189 #define BRW_SURFACEFORMAT_BC5_UNORM 0x18A #define BRW_SURFACEFORMAT_BC1_UNORM_SRGB 0x18B #define BRW_SURFACEFORMAT_BC2_UNORM_SRGB 0x18C #define BRW_SURFACEFORMAT_BC3_UNORM_SRGB 0x18D #define BRW_SURFACEFORMAT_MONO8 0x18E #define BRW_SURFACEFORMAT_YCRCB_SWAPUV 0x18F #define BRW_SURFACEFORMAT_YCRCB_SWAPY 0x190 #define BRW_SURFACEFORMAT_DXT1_RGB 0x191 #define BRW_SURFACEFORMAT_FXT1 0x192 #define BRW_SURFACEFORMAT_R8G8B8_UNORM 0x193 #define BRW_SURFACEFORMAT_R8G8B8_SNORM 0x194 #define BRW_SURFACEFORMAT_R8G8B8_SSCALED 0x195 #define BRW_SURFACEFORMAT_R8G8B8_USCALED 0x196 #define BRW_SURFACEFORMAT_R64G64B64A64_FLOAT 0x197 #define BRW_SURFACEFORMAT_R64G64B64_FLOAT 0x198 #define BRW_SURFACEFORMAT_BC4_SNORM 0x199 #define BRW_SURFACEFORMAT_BC5_SNORM 0x19A #define BRW_SURFACEFORMAT_R16G16B16_UNORM 0x19C #define BRW_SURFACEFORMAT_R16G16B16_SNORM 0x19D #define BRW_SURFACEFORMAT_R16G16B16_SSCALED 0x19E #define BRW_SURFACEFORMAT_R16G16B16_USCALED 0x19F #define BRW_SURFACERETURNFORMAT_FLOAT32 0 #define BRW_SURFACERETURNFORMAT_S1 1 #define BRW_SURFACE_1D 0 #define BRW_SURFACE_2D 1 #define BRW_SURFACE_3D 2 #define BRW_SURFACE_CUBE 3 #define BRW_SURFACE_BUFFER 4 #define BRW_SURFACE_NULL 7 #define BRW_BORDER_COLOR_MODE_DEFAULT 0 #define BRW_BORDER_COLOR_MODE_LEGACY 1 #define HSW_SCS_ZERO 0 #define HSW_SCS_ONE 1 #define HSW_SCS_RED 4 #define HSW_SCS_GREEN 5 #define HSW_SCS_BLUE 6 #define HSW_SCS_ALPHA 7 #define BRW_TEXCOORDMODE_WRAP 0 #define BRW_TEXCOORDMODE_MIRROR 1 #define BRW_TEXCOORDMODE_CLAMP 2 #define BRW_TEXCOORDMODE_CUBE 3 #define BRW_TEXCOORDMODE_CLAMP_BORDER 4 #define BRW_TEXCOORDMODE_MIRROR_ONCE 5 #define BRW_THREAD_PRIORITY_NORMAL 0 #define BRW_THREAD_PRIORITY_HIGH 1 #define BRW_TILEWALK_XMAJOR 0 #define BRW_TILEWALK_YMAJOR 1 #define BRW_VERTEX_SUBPIXEL_PRECISION_8BITS 0 #define BRW_VERTEX_SUBPIXEL_PRECISION_4BITS 1 #define BRW_VERTEXBUFFER_ACCESS_VERTEXDATA 0 #define BRW_VERTEXBUFFER_ACCESS_INSTANCEDATA 1 #define BRW_VFCOMPONENT_NOSTORE 0 #define BRW_VFCOMPONENT_STORE_SRC 1 #define BRW_VFCOMPONENT_STORE_0 2 #define BRW_VFCOMPONENT_STORE_1_FLT 3 #define BRW_VFCOMPONENT_STORE_1_INT 4 #define BRW_VFCOMPONENT_STORE_VID 5 #define BRW_VFCOMPONENT_STORE_IID 6 #define BRW_VFCOMPONENT_STORE_PID 7 /* Execution Unit (EU) defines */ #define BRW_ALIGN_1 0 #define BRW_ALIGN_16 1 #define BRW_ADDRESS_DIRECT 0 #define BRW_ADDRESS_REGISTER_INDIRECT_REGISTER 1 #define BRW_CHANNEL_X 0 #define BRW_CHANNEL_Y 1 #define BRW_CHANNEL_Z 2 #define BRW_CHANNEL_W 3 #define BRW_COMPRESSION_NONE 0 #define BRW_COMPRESSION_2NDHALF 1 #define BRW_COMPRESSION_COMPRESSED 2 #define BRW_CONDITIONAL_NONE 0 #define BRW_CONDITIONAL_Z 1 #define BRW_CONDITIONAL_NZ 2 #define BRW_CONDITIONAL_EQ 1 /* Z */ #define BRW_CONDITIONAL_NEQ 2 /* NZ */ #define BRW_CONDITIONAL_G 3 #define BRW_CONDITIONAL_GE 4 #define BRW_CONDITIONAL_L 5 #define BRW_CONDITIONAL_LE 6 #define BRW_CONDITIONAL_C 7 #define BRW_CONDITIONAL_O 8 #define BRW_DEBUG_NONE 0 #define BRW_DEBUG_BREAKPOINT 1 #define BRW_DEPENDENCY_NORMAL 0 #define BRW_DEPENDENCY_NOTCLEARED 1 #define BRW_DEPENDENCY_NOTCHECKED 2 #define BRW_DEPENDENCY_DISABLE 3 #define BRW_EXECUTE_1 0 #define BRW_EXECUTE_2 1 #define BRW_EXECUTE_4 2 #define BRW_EXECUTE_8 3 #define BRW_EXECUTE_16 4 #define BRW_EXECUTE_32 5 #define BRW_HORIZONTAL_STRIDE_0 0 #define BRW_HORIZONTAL_STRIDE_1 1 #define BRW_HORIZONTAL_STRIDE_2 2 #define BRW_HORIZONTAL_STRIDE_4 3 #define BRW_INSTRUCTION_NORMAL 0 #define BRW_INSTRUCTION_SATURATE 1 #define BRW_MASK_ENABLE 0 #define BRW_MASK_DISABLE 1 #define BRW_OPCODE_MOV 1 #define BRW_OPCODE_SEL 2 #define BRW_OPCODE_NOT 4 #define BRW_OPCODE_AND 5 #define BRW_OPCODE_OR 6 #define BRW_OPCODE_XOR 7 #define BRW_OPCODE_SHR 8 #define BRW_OPCODE_SHL 9 #define BRW_OPCODE_RSR 10 #define BRW_OPCODE_RSL 11 #define BRW_OPCODE_ASR 12 #define BRW_OPCODE_CMP 16 #define BRW_OPCODE_JMPI 32 #define BRW_OPCODE_IF 34 #define BRW_OPCODE_IFF 35 #define BRW_OPCODE_ELSE 36 #define BRW_OPCODE_ENDIF 37 #define BRW_OPCODE_DO 38 #define BRW_OPCODE_WHILE 39 #define BRW_OPCODE_BREAK 40 #define BRW_OPCODE_CONTINUE 41 #define BRW_OPCODE_HALT 42 #define BRW_OPCODE_MSAVE 44 #define BRW_OPCODE_MRESTORE 45 #define BRW_OPCODE_PUSH 46 #define BRW_OPCODE_POP 47 #define BRW_OPCODE_WAIT 48 #define BRW_OPCODE_SEND 49 #define BRW_OPCODE_ADD 64 #define BRW_OPCODE_MUL 65 #define BRW_OPCODE_AVG 66 #define BRW_OPCODE_FRC 67 #define BRW_OPCODE_RNDU 68 #define BRW_OPCODE_RNDD 69 #define BRW_OPCODE_RNDE 70 #define BRW_OPCODE_RNDZ 71 #define BRW_OPCODE_MAC 72 #define BRW_OPCODE_MACH 73 #define BRW_OPCODE_LZD 74 #define BRW_OPCODE_SAD2 80 #define BRW_OPCODE_SADA2 81 #define BRW_OPCODE_DP4 84 #define BRW_OPCODE_DPH 85 #define BRW_OPCODE_DP3 86 #define BRW_OPCODE_DP2 87 #define BRW_OPCODE_DPA2 88 #define BRW_OPCODE_LINE 89 #define BRW_OPCODE_NOP 126 #define BRW_PREDICATE_NONE 0 #define BRW_PREDICATE_NORMAL 1 #define BRW_PREDICATE_ALIGN1_ANYV 2 #define BRW_PREDICATE_ALIGN1_ALLV 3 #define BRW_PREDICATE_ALIGN1_ANY2H 4 #define BRW_PREDICATE_ALIGN1_ALL2H 5 #define BRW_PREDICATE_ALIGN1_ANY4H 6 #define BRW_PREDICATE_ALIGN1_ALL4H 7 #define BRW_PREDICATE_ALIGN1_ANY8H 8 #define BRW_PREDICATE_ALIGN1_ALL8H 9 #define BRW_PREDICATE_ALIGN1_ANY16H 10 #define BRW_PREDICATE_ALIGN1_ALL16H 11 #define BRW_PREDICATE_ALIGN16_REPLICATE_X 2 #define BRW_PREDICATE_ALIGN16_REPLICATE_Y 3 #define BRW_PREDICATE_ALIGN16_REPLICATE_Z 4 #define BRW_PREDICATE_ALIGN16_REPLICATE_W 5 #define BRW_PREDICATE_ALIGN16_ANY4H 6 #define BRW_PREDICATE_ALIGN16_ALL4H 7 #define BRW_ARCHITECTURE_REGISTER_FILE 0 #define BRW_GENERAL_REGISTER_FILE 1 #define BRW_MESSAGE_REGISTER_FILE 2 #define BRW_IMMEDIATE_VALUE 3 #define BRW_REGISTER_TYPE_UD 0 #define BRW_REGISTER_TYPE_D 1 #define BRW_REGISTER_TYPE_UW 2 #define BRW_REGISTER_TYPE_W 3 #define BRW_REGISTER_TYPE_UB 4 #define BRW_REGISTER_TYPE_B 5 #define BRW_REGISTER_TYPE_VF 5 /* packed float vector, immediates only? */ #define BRW_REGISTER_TYPE_HF 6 #define BRW_REGISTER_TYPE_V 6 /* packed int vector, immediates only, uword dest only */ #define BRW_REGISTER_TYPE_F 7 #define BRW_ARF_NULL 0x00 #define BRW_ARF_ADDRESS 0x10 #define BRW_ARF_ACCUMULATOR 0x20 #define BRW_ARF_FLAG 0x30 #define BRW_ARF_MASK 0x40 #define BRW_ARF_MASK_STACK 0x50 #define BRW_ARF_MASK_STACK_DEPTH 0x60 #define BRW_ARF_STATE 0x70 #define BRW_ARF_CONTROL 0x80 #define BRW_ARF_NOTIFICATION_COUNT 0x90 #define BRW_ARF_IP 0xA0 #define BRW_AMASK 0 #define BRW_IMASK 1 #define BRW_LMASK 2 #define BRW_CMASK 3 #define BRW_THREAD_NORMAL 0 #define BRW_THREAD_ATOMIC 1 #define BRW_THREAD_SWITCH 2 #define BRW_VERTICAL_STRIDE_0 0 #define BRW_VERTICAL_STRIDE_1 1 #define BRW_VERTICAL_STRIDE_2 2 #define BRW_VERTICAL_STRIDE_4 3 #define BRW_VERTICAL_STRIDE_8 4 #define BRW_VERTICAL_STRIDE_16 5 #define BRW_VERTICAL_STRIDE_32 6 #define BRW_VERTICAL_STRIDE_64 7 #define BRW_VERTICAL_STRIDE_128 8 #define BRW_VERTICAL_STRIDE_256 9 #define BRW_VERTICAL_STRIDE_ONE_DIMENSIONAL 0xF #define BRW_WIDTH_1 0 #define BRW_WIDTH_2 1 #define BRW_WIDTH_4 2 #define BRW_WIDTH_8 3 #define BRW_WIDTH_16 4 #define BRW_STATELESS_BUFFER_BOUNDARY_1K 0 #define BRW_STATELESS_BUFFER_BOUNDARY_2K 1 #define BRW_STATELESS_BUFFER_BOUNDARY_4K 2 #define BRW_STATELESS_BUFFER_BOUNDARY_8K 3 #define BRW_STATELESS_BUFFER_BOUNDARY_16K 4 #define BRW_STATELESS_BUFFER_BOUNDARY_32K 5 #define BRW_STATELESS_BUFFER_BOUNDARY_64K 6 #define BRW_STATELESS_BUFFER_BOUNDARY_128K 7 #define BRW_STATELESS_BUFFER_BOUNDARY_256K 8 #define BRW_STATELESS_BUFFER_BOUNDARY_512K 9 #define BRW_STATELESS_BUFFER_BOUNDARY_1M 10 #define BRW_STATELESS_BUFFER_BOUNDARY_2M 11 #define BRW_POLYGON_FACING_FRONT 0 #define BRW_POLYGON_FACING_BACK 1 #define BRW_MESSAGE_TARGET_NULL 0 #define BRW_MESSAGE_TARGET_MATH 1 #define BRW_MESSAGE_TARGET_SAMPLER 2 #define BRW_MESSAGE_TARGET_GATEWAY 3 #define BRW_MESSAGE_TARGET_DATAPORT_READ 4 #define BRW_MESSAGE_TARGET_DATAPORT_WRITE 5 #define BRW_MESSAGE_TARGET_URB 6 #define BRW_MESSAGE_TARGET_THREAD_SPAWNER 7 #define BRW_SAMPLER_RETURN_FORMAT_FLOAT32 0 #define BRW_SAMPLER_RETURN_FORMAT_UINT32 2 #define BRW_SAMPLER_RETURN_FORMAT_SINT32 3 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS 0 #define BRW_SAMPLER_MESSAGE_SIMD8_KILLPIX 1 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_LOD 1 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_LOD 1 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_GRADIENTS 2 #define BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE_GRADIENTS 2 #define BRW_SAMPLER_MESSAGE_SIMD4X2_SAMPLE_COMPARE 0 #define BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_COMPARE 2 #define BRW_SAMPLER_MESSAGE_SIMD4X2_RESINFO 2 #define BRW_SAMPLER_MESSAGE_SIMD8_RESINFO 2 #define BRW_SAMPLER_MESSAGE_SIMD16_RESINFO 2 #define BRW_SAMPLER_MESSAGE_SIMD4X2_LD 3 #define BRW_SAMPLER_MESSAGE_SIMD8_LD 3 #define BRW_SAMPLER_MESSAGE_SIMD16_LD 3 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDLOW 0 #define BRW_DATAPORT_OWORD_BLOCK_1_OWORDHIGH 1 #define BRW_DATAPORT_OWORD_BLOCK_2_OWORDS 2 #define BRW_DATAPORT_OWORD_BLOCK_4_OWORDS 3 #define BRW_DATAPORT_OWORD_BLOCK_8_OWORDS 4 #define BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD 0 #define BRW_DATAPORT_OWORD_DUAL_BLOCK_4OWORDS 2 #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 #define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 #define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 #define BRW_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 2 #define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 #define BRW_DATAPORT_READ_TARGET_DATA_CACHE 0 #define BRW_DATAPORT_READ_TARGET_RENDER_CACHE 1 #define BRW_DATAPORT_READ_TARGET_SAMPLER_CACHE 2 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE 0 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED 1 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01 2 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23 3 #define BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_SINGLE_SOURCE_SUBSPAN01 4 #define BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE 0 #define BRW_DATAPORT_WRITE_MESSAGE_OWORD_DUAL_BLOCK_WRITE 1 #define BRW_DATAPORT_WRITE_MESSAGE_DWORD_BLOCK_WRITE 2 #define BRW_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE 3 #define BRW_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE 4 #define BRW_DATAPORT_WRITE_MESSAGE_STREAMED_VERTEX_BUFFER_WRITE 5 #define BRW_DATAPORT_WRITE_MESSAGE_FLUSH_RENDER_CACHE 7 #define BRW_MATH_FUNCTION_INV 1 #define BRW_MATH_FUNCTION_LOG 2 #define BRW_MATH_FUNCTION_EXP 3 #define BRW_MATH_FUNCTION_SQRT 4 #define BRW_MATH_FUNCTION_RSQ 5 #define BRW_MATH_FUNCTION_SIN 6 /* was 7 */ #define BRW_MATH_FUNCTION_COS 7 /* was 8 */ #define BRW_MATH_FUNCTION_SINCOS 8 /* was 6 */ #define BRW_MATH_FUNCTION_TAN 9 #define BRW_MATH_FUNCTION_POW 10 #define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT_AND_REMAINDER 11 #define BRW_MATH_FUNCTION_INT_DIV_QUOTIENT 12 #define BRW_MATH_FUNCTION_INT_DIV_REMAINDER 13 #define BRW_MATH_INTEGER_UNSIGNED 0 #define BRW_MATH_INTEGER_SIGNED 1 #define BRW_MATH_PRECISION_FULL 0 #define BRW_MATH_PRECISION_PARTIAL 1 #define BRW_MATH_SATURATE_NONE 0 #define BRW_MATH_SATURATE_SATURATE 1 #define BRW_MATH_DATA_VECTOR 0 #define BRW_MATH_DATA_SCALAR 1 #define BRW_URB_OPCODE_WRITE 0 #define BRW_URB_SWIZZLE_NONE 0 #define BRW_URB_SWIZZLE_INTERLEAVE 1 #define BRW_URB_SWIZZLE_TRANSPOSE 2 #define BRW_SCRATCH_SPACE_SIZE_1K 0 #define BRW_SCRATCH_SPACE_SIZE_2K 1 #define BRW_SCRATCH_SPACE_SIZE_4K 2 #define BRW_SCRATCH_SPACE_SIZE_8K 3 #define BRW_SCRATCH_SPACE_SIZE_16K 4 #define BRW_SCRATCH_SPACE_SIZE_32K 5 #define BRW_SCRATCH_SPACE_SIZE_64K 6 #define BRW_SCRATCH_SPACE_SIZE_128K 7 #define BRW_SCRATCH_SPACE_SIZE_256K 8 #define BRW_SCRATCH_SPACE_SIZE_512K 9 #define BRW_SCRATCH_SPACE_SIZE_1M 10 #define BRW_SCRATCH_SPACE_SIZE_2M 11 #define CMD_URB_FENCE 0x6000 #define CMD_CONST_BUFFER_STATE 0x6001 #define CMD_CONST_BUFFER 0x6002 #define CMD_STATE_BASE_ADDRESS 0x6101 #define CMD_STATE_INSN_POINTER 0x6102 #define CMD_PIPELINE_SELECT 0x6104 #define CMD_PIPELINED_STATE_POINTERS 0x7800 #define CMD_BINDING_TABLE_PTRS 0x7801 #define CMD_VERTEX_BUFFER 0x7808 #define CMD_VERTEX_ELEMENT 0x7809 #define CMD_INDEX_BUFFER 0x780a #define CMD_VF_STATISTICS 0x780b #define CMD_DRAW_RECT 0x7900 #define CMD_BLEND_CONSTANT_COLOR 0x7901 #define CMD_CHROMA_KEY 0x7904 #define CMD_DEPTH_BUFFER 0x7905 #define CMD_POLY_STIPPLE_OFFSET 0x7906 #define CMD_POLY_STIPPLE_PATTERN 0x7907 #define CMD_LINE_STIPPLE_PATTERN 0x7908 #define CMD_GLOBAL_DEPTH_OFFSET_CLAMP 0x7908 #define CMD_PIPE_CONTROL 0x7a00 #define CMD_3D_PRIM 0x7b00 #define CMD_MI_FLUSH 0x0200 /* Various values from the R0 vertex header: */ #define R02_PRIM_END 0x1 #define R02_PRIM_START 0x2 /* media pipeline */ #define BRW_VFE_MODE_GENERIC 0x0 #define BRW_VFE_MODE_VLD_MPEG2 0x1 #define BRW_VFE_MODE_IS 0x2 #define BRW_VFE_MODE_AVC_MC 0x4 #define BRW_VFE_MODE_AVC_IT 0x7 #define BRW_VFE_MODE_VC1_IT 0xB #define BRW_VFE_DEBUG_COUNTER_FREE 0 #define BRW_VFE_DEBUG_COUNTER_FROZEN 1 #define BRW_VFE_DEBUG_COUNTER_ONCE 2 #define BRW_VFE_DEBUG_COUNTER_ALWAYS 3 /* VLD_STATE */ #define BRW_MPEG_TOP_FIELD 1 #define BRW_MPEG_BOTTOM_FIELD 2 #define BRW_MPEG_FRAME 3 #define BRW_MPEG_QSCALE_LINEAR 0 #define BRW_MPEG_QSCALE_NONLINEAR 1 #define BRW_MPEG_ZIGZAG_SCAN 0 #define BRW_MPEG_ALTER_VERTICAL_SCAN 1 #define BRW_MPEG_I_PICTURE 1 #define BRW_MPEG_P_PICTURE 2 #define BRW_MPEG_B_PICTURE 3 #endif xf86-video-intel-2.99.917/xvmc/i915_structs.h0000664000175000017500000005250012400044327015331 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Xiang Haihao * */ #ifndef _I915_STRUCTS_H #define _I915_STRUCTS_H #include /* BLT */ #define CMD_2D 0x02 #define OPC_COLOR_BLT (0x40) struct i915_color_blt { struct { unsigned length:5; unsigned pad0:15; unsigned bpp_mask:2; unsigned opcode:7; unsigned type:3; } dw0; struct { unsigned pitch:16; unsigned rop:8; unsigned color_depth:2; unsigned pad0:6; } dw1; struct { unsigned width:16; unsigned height:16; } dw2; struct { unsigned address; } dw3; struct { unsigned pattern; } dw4; }; /* 3D_INSTRUCTION */ #define CMD_3D 0x03 #define OPCODE_3D(x) (CMD_3D << 29 | (x) << 16) #define OPC_3DMPEG_MACROBLOCK_IPICTURE (0x01 + (0x1e << 5)) #define OPC_3DMPEG_SET_ORIGIN (0x10 + (0x1e << 5)) #define OPC_3DMPEG_MACROBLOCK (0x11 + (0x1e << 5)) #define OPC_3DMPEG_SLICE (0x12 + (0x1e << 5)) #define OPC_3DMPEG_QM_PALETTE_LOAD (0x13 + (0x1e << 5)) #define OPC_3DSTATE_SCISSOR_ENABLE (0x10 + (0x1c << 5)) #define OPC_3DSTATE_MAP_STATE (0x00 + (0x1d << 8)) #define OPC_3DSTATE_SAMPLER_STATE (0x01 + (0x1d << 8)) #define OPC_3DSTATE_LOAD_STATE_IMMEDIATE_1 (0x04 + (0x1d << 8)) #define OP_3D_LOAD_STATE_IMMEDIATE_1 OPCODE_3D(OPC_3DSTATE_LOAD_STATE_IMMEDIATE_1) #define OPC_3DSTATE_PIXEL_SHADER_PROGRAM (0x05 + (0x1d << 8)) #define OPC_3DSTATE_PIXEL_SHADER_CONSTANTS (0x06 + (0x1d << 8)) #define OPC_3DSTATE_LOAD_INDIRECT (0x07 + (0x1d << 8)) #define OP_3D_LOAD_INDIRECT OPCODE_3D(OPC_3DSTATE_LOAD_INDIRECT) #define OPC_3DSTATE_MODES_5 (0x0c) #define OPC_3DSTATE_COORD_SET_BINDINGS (0x16) #define OPC_3DPRIMITIVE (0x1f) #define OPC_3DSTATE_DRAWING_RECTANGLE (0x80 + (0x1d << 8)) #define OPC_3DSTATE_SCISSOR_RECTANGLE (0x81 + (0x1d << 8)) #define OPC_3DSTATE_DEST_BUFFER_VARIABLES (0x85 + (0x1d << 8)) #define OPC_3DSTATE_DEST_BUFFER_VARIABLES_MPEG (0x87 + (0x1d << 8)) #define OPC_3DSTATE_BUFFER_INFO (0x8e + (0x1d << 8)) /* * 3DMPEG instructions */ struct i915_3dmpeg_macroblock_header { struct { unsigned length:19; unsigned opcode:10; unsigned type:3; } dw0; struct { unsigned mb_intra:1; unsigned forward:1; unsigned backward:1; unsigned h263_4mv:1; unsigned pad0:1; unsigned dct_type:1; unsigned pad1:2; unsigned motion_type:2; unsigned pad2:2; unsigned vertical_field_select:4; unsigned coded_block_pattern:6; unsigned pad3:2; unsigned skipped_macroblocks:7; unsigned pad4:1; } dw1; }; struct i915_3dmpeg_macroblock_0mv { struct i915_3dmpeg_macroblock_header header; }; struct i915_3dmpeg_macroblock_1fbmv { struct i915_3dmpeg_macroblock_header header; unsigned dw2; unsigned dw3; }; struct i915_3dmpeg_macroblock_2fbmv { struct i915_3dmpeg_macroblock_header header; unsigned dw2; unsigned dw3; unsigned dw4; unsigned dw5; }; struct i915_3dmpeg_macroblock_5fmv { struct i915_3dmpeg_macroblock_header header; unsigned dw2; unsigned dw3; unsigned dw4; unsigned dw5; unsigned dw6; }; struct i915_3dmpeg_macroblock_ipicture { struct { unsigned pad0:5; unsigned dct_type:1; unsigned pad1:13; unsigned opcode:10; unsigned type:3; } dw0; }; struct i915_3dmpeg_set_origin { struct { unsigned length:19; unsigned opcode:10; unsigned type:3; } dw0; struct { unsigned v_origin:7; unsigned pad0:1; unsigned h_origin:7; unsigned pad1:17; } dw1; }; struct i915_3dmpeg_slice { struct { unsigned length:19; unsigned opcode:10; unsigned type:3; } dw0; struct { unsigned fst_mb_bit_off:3; unsigned pad0:5; unsigned mb_count:7; unsigned pad1:1; unsigned v_position:7; unsigned pad2:1; unsigned h_position:7; unsigned pad3:1; } dw1; struct { unsigned length_minus_one:17; unsigned pad0:7; unsigned qt_scale_code:5; unsigned pad1:3; } dw2; }; struct i915_3dmpeg_qm_palette_load { struct { unsigned length:4; unsigned pad0:15; unsigned opcode:10; unsigned type:3; } dw0; unsigned quantmatrix[16]; }; /* * 3DSTATE instruction */ #define BUFFERID_COLOR_BACK 3 #define BUFFERID_COLOR_AUX 4 #define BUFFERID_MC_INTRA_CORR 5 #define BUFFERID_DEPTH 7 #define TILEWALK_XMAJOR 0 #define TILEWALK_YMAJOR 1 struct i915_3dstate_buffer_info { struct { unsigned length:16; unsigned opcode:13; unsigned type:3; } dw0; struct { unsigned pad0:2; unsigned pitch:12; unsigned pad1:7; unsigned walk:1; unsigned tiled_surface:1; unsigned fence_regs:1; unsigned buffer_id:4; unsigned aux_id:1; unsigned pad2:3; } dw1; struct { unsigned pad0:2; unsigned base_address:27; unsigned pad1:3; } dw2; }; #define COLORBUFFER_8BIT 0x00 #define COLORBUFFER_X1R5G5B5 0x01 #define COLORBUFFER_R5G6B5 0x02 #define COLORBUFFER_A8R8G8B8 0x03 #define COLORBUFFER_YCRCB_SWAP 0x04 #define COLORBUFFER_YCRCB_NORMAL 0x05 #define COLORBUFFER_YCRCB_SWAPUV 0x06 #define COLORBUFFER_YCRCB_SWAPUVY 0x07 #define COLORBUFFER_A4R4G4B4 0x08 #define COLORBUFFER_A1R5G5B5 0x09 #define COLORBUFFER_A2R10G10B10 0x0a struct i915_3dstate_dest_buffer_variables { struct { unsigned length:16; unsigned opcode:13; unsigned type:3; } dw0; struct { unsigned v_ls_offset:1; unsigned v_ls:1; unsigned depth_fmt:2; unsigned pad0:4; unsigned color_fmt:4; unsigned yuv422_select:3; unsigned pad1:1; unsigned dest_v_bias:4; unsigned dest_h_bias:4; unsigned dither_enhancement:1; unsigned linear_gamma:1; unsigned dither_pattern:2; unsigned lod_preclamp:1; unsigned edt_zone:1; /* early depth test in zone rendering */ unsigned texture_default_color:1; unsigned edt_classic:1; /* early depth test in classic mode */ } dw1; }; #define MPEG_DECODE_MC 0 #define MPEG_DECODE_VLD_IDCT_MC 1 #define MPEG_I_PICTURE 1 #define MPEG_P_PICTURE 2 #define MPEG_B_PICTURE 3 #define MC_SUB_1H 0 #define MC_SUB_2H 1 #define MC_SUB_4H 2 #define MC_SUB_1V 0 #define MC_SUB_2V 1 struct i915_3dstate_dest_buffer_variables_mpeg { struct { unsigned length:16; unsigned opcode:13; unsigned type:3; } dw0; struct { unsigned picture_width:7; unsigned pad0:1; unsigned v_subsample_factor:2; unsigned h_subsample_factor:2; unsigned tff:1; unsigned mismatch:1; unsigned pad1:1; unsigned intra8:1; unsigned abort_on_error:8; unsigned pad2:4; unsigned bidir_avrg_control:1; unsigned rcontrol:1; unsigned decode_mode:2; } dw1; struct { unsigned pad0:1; unsigned picture_coding_type:2; unsigned pad1:2; unsigned scan_order:1; unsigned pad2:2; unsigned q_scale_type:1; unsigned concealment:1; unsigned fpf_dct:1; unsigned pad3:2; unsigned intra_dc:2; unsigned intra_vlc:1; unsigned f_code00:4; unsigned f_code01:4; unsigned f_code10:4; unsigned f_code11:4; } dw2; }; struct i915_mc_static_indirect_state_buffer { struct i915_3dstate_buffer_info dest_y; struct i915_3dstate_buffer_info dest_u; struct i915_3dstate_buffer_info dest_v; struct i915_3dstate_dest_buffer_variables dest_buf; struct i915_3dstate_dest_buffer_variables_mpeg dest_buf_mpeg; struct i915_3dstate_buffer_info corr; }; #define MAP_MAP0 0x0001 #define MAP_MAP1 0x0002 #define MAP_MAP2 0x0004 #define MAP_MAP3 0x0008 #define MAP_MAP4 0x0010 #define MAP_MAP5 0x0020 #define MAP_MAP6 0x0040 #define MAP_MAP7 0x0080 #define MAP_MAP8 0x0100 #define MAP_MAP9 0x0200 #define MAP_MAP10 0x0400 #define MAP_MAP11 0x0800 #define MAP_MAP12 0x1000 #define MAP_MAP13 0x2000 #define MAP_MAP14 0x4000 #define MAP_MAP15 0x8000 struct texture_map { struct { unsigned v_ls_offset:1; unsigned v_ls:1; unsigned base_address:27; unsigned pad0:2; unsigned untrusted:1; } tm0; struct { unsigned tile_walk:1; unsigned tiled_surface:1; unsigned utilize_fence_regs:1; unsigned texel_fmt:4; unsigned surface_fmt:3; unsigned width:11; unsigned height:11; } tm1; struct { unsigned depth:8; unsigned mipmap_layout:1; unsigned max_lod:6; unsigned cube_face:6; unsigned pitch:11; } tm2; }; struct i915_3dstate_map_state { struct { unsigned length:6; unsigned pad0:9; unsigned retain:1; unsigned opcode:13; unsigned type:3; } dw0; struct { unsigned map_mask:16; unsigned pad0:16; } dw1; }; struct i915_mc_map_state { struct i915_3dstate_map_state y_map; struct texture_map y_forward; struct texture_map y_backward; struct i915_3dstate_map_state u_map; struct texture_map u_forward; struct texture_map u_backward; struct i915_3dstate_map_state v_map; struct texture_map v_forward; struct texture_map v_backward; }; #define SAMPLER_SAMPLER0 0x0001 #define SAMPLER_SAMPLER1 0x0002 #define SAMPLER_SAMPLER2 0x0004 #define SAMPLER_SAMPLER3 0x0008 #define SAMPLER_SAMPLER4 0x0010 #define SAMPLER_SAMPLER5 0x0020 #define SAMPLER_SAMPLER6 0x0040 #define SAMPLER_SAMPLER7 0x0080 #define SAMPLER_SAMPLER8 0x0100 #define SAMPLER_SAMPLER9 0x0200 #define SAMPLER_SAMPLER10 0x0400 #define SAMPLER_SAMPLER11 0x0800 #define SAMPLER_SAMPLER12 0x1000 #define SAMPLER_SAMPLER13 0x2000 #define SAMPLER_SAMPLER14 0x4000 #define SAMPLER_SAMPLER15 0x8000 #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #define MAPFILTER_NEAREST 0 #define MAPFILTER_LINEAR 1 #define MAPFILTER_ANISOTROPIC 2 #define MAPFILTER_4X4_1 3 #define MAPFILTER_4X4_2 4 #define MAPFILTER_4X4_FLAT 5 #define MAPFILTER_MONO 6 #define ANISORATIO_2 0 #define ANISORATIO_4 1 #define PREFILTEROP_ALWAYS 0 #define PREFILTEROP_NEVER 1 #define PREFILTEROP_LESS 2 #define PREFILTEROP_EQUAL 3 #define PREFILTEROP_LEQUAL 4 #define PREFILTEROP_GREATER 5 #define PREFILTEROP_NOTEQUAL 6 #define PREFILTEROP_GEQUAL 7 #define TEXCOORDMODE_WRAP 0 #define TEXCOORDMODE_MIRROR 1 #define TEXCOORDMODE_CLAMP 2 #define TEXCOORDMODE_CUBE 3 #define TEXCOORDMODE_CLAMP_BORDER 4 #define TEXCOORDMODE_MIRROR_ONCE 5 struct texture_sampler { struct { unsigned shadow_function:3; unsigned max_anisotropy:1; unsigned shadow_enable:1; unsigned lod_bias:9; unsigned min_filter:3; unsigned mag_filter:3; unsigned mip_filter:2; unsigned base_level:5; unsigned chromakey_index:2; unsigned color_conversion:1; unsigned planar2packet:1; unsigned reverse_gamma:1; } ts0; struct { unsigned east_deinterlacer:1; unsigned map_index:4; unsigned normalized_coor:1; unsigned tcz_control:3; unsigned tcy_control:3; unsigned tcx_control:3; unsigned chromakey_enable:1; unsigned keyed_texture_filter:1; unsigned kill_pixel:1; unsigned pad0:6; unsigned min_lod:8; } ts1; struct { unsigned default_color; } ts2; }; struct i915_3dstate_sampler_state { struct { unsigned length:6; unsigned pad0:10; unsigned opcode:13; unsigned type:3; } dw0; struct { unsigned sampler_masker:16; unsigned pad0:16; } dw1; /* we always use two samplers for mc */ struct texture_sampler sampler0; struct texture_sampler sampler1; }; struct arithmetic_inst { struct { unsigned pad0:2; unsigned src0_reg:5; unsigned src0_reg_t:3; unsigned dest_channel_mask:4; unsigned dest_reg:4; unsigned pad1:1; unsigned dest_reg_t:3; unsigned dest_saturate:1; unsigned pad2:1; unsigned opcode:5; unsigned pad3:3; } dw0; struct { unsigned src1_y_select:3; unsigned src1_y_negate:1; unsigned src1_x_select:3; unsigned src1_x_negate:1; unsigned src1_reg:5; unsigned src1_reg_t:3; unsigned src0_w_select:3; unsigned src0_w_negate:1; unsigned src0_z_select:3; unsigned src0_z_negate:1; unsigned src0_y_select:3; unsigned src0_y_negate:1; unsigned src0_x_select:3; unsigned src0_x_negate:1; } dw1; struct { unsigned src2_w_select:3; unsigned src2_w_negate:1; unsigned src2_z_select:3; unsigned src2_z_negate:1; unsigned src2_y_select:3; unsigned src2_y_negate:1; unsigned src2_x_select:3; unsigned src2_x_negate:1; unsigned src2_reg:5; unsigned src2_reg_t:3; unsigned src1_w_select:3; unsigned src1_w_negate:1; unsigned src1_z_select:3; unsigned src1_z_negate:1; } dw2; }; struct texture_inst { struct { unsigned sampler_reg:4; unsigned pad0:10; unsigned dest_reg:4; unsigned pad1:1; unsigned dest_reg_t:3; unsigned pad2:2; unsigned opcode:5; unsigned pad3:3; } dw0; struct { unsigned pad0:16; unsigned address_reg:5; unsigned pad1:3; unsigned address_reg_t:3; unsigned pad2:5; } dw1; struct { unsigned pad0; } dw2; }; struct declaration_inst { struct { unsigned pad0:10; unsigned decl_channel_mask:4; unsigned decl_reg:4; unsigned pad1:1; unsigned decl_reg_t:2; unsigned pad2:1; unsigned sampler_type:2; unsigned opcode:5; unsigned pad3:3; } dw0; struct { unsigned pad0; } dw1; struct { unsigned pad0; } dw2; }; union shader_inst { struct arithmetic_inst a; struct texture_inst t; struct declaration_inst d; }; struct i915_3dstate_pixel_shader_header { unsigned length:9; unsigned pad0:6; unsigned retain:1; unsigned opcode:13; unsigned type:3; }; struct i915_3dstate_pixel_shader_program { struct i915_3dstate_pixel_shader_header shader0; /* mov oC, c0.0000 */ uint32_t inst0[3]; struct i915_3dstate_pixel_shader_header shader1; /* dcl t0.xy */ /* dcl t1.xy */ /* dcl_2D s0 */ /* texld r0, t0, s0 */ /* mov oC, r0 */ uint32_t inst1[3 * 5]; struct i915_3dstate_pixel_shader_header shader2; /* dcl t2.xy */ /* dcl t3.xy */ /* dcl_2D s1 */ /* texld r0, t2, s1 */ /* mov oC, r0 */ uint32_t inst2[3 * 5]; struct i915_3dstate_pixel_shader_header shader3; /* dcl t0.xy */ /* dcl t1.xy */ /* dcl t2.xy */ /* dcl t3.xy */ /* dcl_2D s0 */ /* dcl_2D s1 */ /* texld r0, t0, s0 */ /* texld r0, t2, s1 */ /* add r0, r0, r1 */ /* mov oC, r0 */ uint32_t inst3[3 * 10]; }; #define REG_CR0 0x00000001 #define REG_CR1 0x00000002 #define REG_CR2 0x00000004 #define REG_CR3 0x00000008 #define REG_CR4 0x00000010 #define REG_CR5 0x00000020 #define REG_CR6 0x00000040 #define REG_CR7 0x00000080 #define REG_CR8 0x00000100 #define REG_CR9 0x00000200 #define REG_CR10 0x00000400 #define REG_CR11 0x00000800 #define REG_CR12 0x00001000 #define REG_CR13 0x00002000 #define REG_CR14 0x00004000 #define REG_CR15 0x00008000 #define REG_CR16 0x00010000 #define REG_CR17 0x00020000 #define REG_CR18 0x00040000 #define REG_CR19 0x00080000 #define REG_CR20 0x00100000 #define REG_CR21 0x00200000 #define REG_CR22 0x00400000 #define REG_CR23 0x00800000 #define REG_CR24 0x01000000 #define REG_CR25 0x02000000 #define REG_CR26 0x04000000 #define REG_CR27 0x08000000 #define REG_CR28 0x10000000 #define REG_CR29 0x20000000 #define REG_CR30 0x40000000 #define REG_CR31 0x80000000 struct shader_constant { float x; float y; float z; float w; }; struct i915_3dstate_pixel_shader_constants { struct { unsigned length:8; unsigned pad0:8; unsigned opcode:13; unsigned type:3; } dw0; struct { unsigned reg_mask; } dw1; /* we only need one constant */ struct shader_constant value; }; #define BLOCK_SIS 0x01 #define BLOCK_DIS 0x02 #define BLOCK_SSB 0x04 #define BLOCK_MSB 0x08 #define BLOCK_PSP 0x10 #define BLOCK_PSC 0x20 #define BLOCK_MASK_SHIFT 8 typedef struct _state_ddword { struct { unsigned valid:1; unsigned force:1; unsigned buffer_address:30; } dw0; struct { unsigned length:9; unsigned pad0:23; } dw1; } sis_state, msb_state; #define STATE_VALID 0x1 #define STATE_FORCE 0x2 struct i915_3dstate_load_indirect { struct { unsigned length:8; unsigned block_mask:6; unsigned mem_select:1; unsigned pad0:1; unsigned opcode:13; unsigned type:3; } dw0; }; #define OP_3D_LOAD_INDIRECT_GFX_ADDR (1 << 14) #define TEXCOORDFMT_2FP 0x00 #define TEXCOORDFMT_3FP 0x01 #define TEXCOORDFMT_4FP 0x02 #define TEXCOORDFMT_1FP 0x03 #define TEXCOORDFMT_2FP_16 0x04 #define TEXCOORDFMT_4FP_16 0x05 #define TEXCOORDFMT_NOT_PRESENT 0x0f struct s2_dword { unsigned set0_texcoord_fmt:4; unsigned set1_texcoord_fmt:4; unsigned set2_texcoord_fmt:4; unsigned set3_texcoord_fmt:4; unsigned set4_texcoord_fmt:4; unsigned set5_texcoord_fmt:4; unsigned set6_texcoord_fmt:4; unsigned set7_texcoord_fmt:4; }; #define S3_SET0_PCD (1 << 0*4) #define S3_SET1_PCD (1 << 1*4) #define S3_SET2_PCD (1 << 2*4) #define S3_SET3_PCD (1 << 3*4) #define S3_SET4_PCD (1 << 4*4) #define S3_SET5_PCD (1 << 5*4) #define S3_SET6_PCD (1 << 6*4) #define S3_SET7_PCD (1 << 7*4) #define VERTEXHAS_XYZ 1 #define VERTEXHAS_XYZW 2 #define VERTEXHAS_XY 3 #define VERTEXHAS_XYW 4 #define CULLMODE_BOTH 0 #define CULLMODE_NONE 1 #define CULLMODE_CW 2 #define CULLMODE_CCW 3 #define SHADEMODE_LINEAR 0 #define SHADEMODE_FLAT 1 struct s4_dword { unsigned anti_aliasing_enable:1; unsigned sprite_point_enable:1; unsigned fog_parameter_present:1; unsigned local_depth_offset_enable:1; unsigned force_specular_diffuse_color:1; unsigned force_default_diffuse_color:1; unsigned position_mask:3; unsigned local_depth_offset_present:1; unsigned diffuse_color_presetn:1; unsigned specular_color_fog_factor_present:1; unsigned point_width_present:1; unsigned cull_mode:2; unsigned color_shade_mode:1; unsigned specular_shade_mode:1; unsigned fog_shade_mode:1; unsigned alpha_shade_mode:1; unsigned line_width:4; unsigned point_width:9; }; struct s5_dword { unsigned logic_op_enable:1; unsigned color_dither_enable:1; unsigned stencil_test_enable:1; unsigned stencil_buffer_write_enable:1; unsigned stencil_pass_depth_pass_op:3; unsigned stencil_pass_depth_fail_op:3; unsigned stencil_fail_op:3; unsigned stencil_test_function:3; unsigned stencil_reference_value:8; unsigned fog_enable:1; unsigned global_depth_offset_enable:1; unsigned last_pixel_enable:1; unsigned force_default_point_width:1; unsigned color_buffer_component_write_disable:4; }; #define S6_COLOR_BUFFER_WRITE (1 << 2) #define S6_DST_BLEND_FACTOR_SHIFT 4 #define S6_SRC_BLEND_FACTOR_SHIFT 8 #define S6_DEPTH_TEST_ENABLE (1 << 19) struct s7_dword { unsigned global_depth_offset_const; }; #define OP_3D_LOAD_STATE_IMM_LOAD_S0 (1 << 4) #define OP_3D_LOAD_STATE_IMM_LOAD_S1 (1 << 5) #define OP_3D_LOAD_STATE_IMM_LOAD_S2 (1 << 6) #define OP_3D_LOAD_STATE_IMM_LOAD_S3 (1 << 7) #define OP_3D_LOAD_STATE_IMM_LOAD_S4 (1 << 8) #define OP_3D_LOAD_STATE_IMM_LOAD_S5 (1 << 9) #define OP_3D_LOAD_STATE_IMM_LOAD_S6 (1 << 10) #define OP_3D_LOAD_STATE_IMM_LOAD_S7 (1 << 11) struct i915_3dstate_scissor_rectangle { struct { unsigned length:16; unsigned opcode:13; unsigned type:3; } dw0; struct { unsigned min_x:16; unsigned min_y:16; } dw1; struct { unsigned max_x:16; unsigned max_y:16; } dw2; }; #define VERTEX_INLINE 0x00 #define VERTEX_INDIRECT 0x01 #define PRIM_TRILIST 0x00 #define PRIM_TRISTRIP 0x01 #define PRIM_TRISTRIP_REVERSE 0x02 #define PRIM_TRIFAN 0x03 #define PRIM_POLYGON 0x04 #define PRIM_LINELIST 0x05 #define PRIM_LINESTRIP 0x06 #define PRIM_RECTLIST 0x07 #define PRIM_POINTLIST 0x08 #define PRIM_DIB 0x09 #define PRIM_CLEAR_RECT 0x0a #define PRIM_ZONE_INIT 0x0d struct texture_coordinate_set { unsigned tcx; unsigned tcy; }; struct vertex_data { unsigned x; unsigned y; struct texture_coordinate_set tc0; struct texture_coordinate_set tc1; }; struct i915_3dprimitive { union { struct { unsigned length:18; unsigned prim:5; unsigned vertex_location:1; unsigned opcode:5; unsigned type:3; } inline_prim; struct { unsigned vertex_count:16; unsigned pad0:1; unsigned vertex_access_mode:1; unsigned prim:5; unsigned vertex_location:1; unsigned opcode:5; unsigned type:3; } indirect_prim; } dw0; }; #endif /*_I915_STRUCTS_H */ xf86-video-intel-2.99.917/xvmc/intel_xvmc_dump.c0000664000175000017500000001166012400044327016245 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Zhenyu Wang * */ #include "intel_xvmc_private.h" #define DUMPFILE "./intel_xvmc_dump" static int xvmc_dump = 0; static FILE *fp = NULL; void intel_xvmc_dump_open(void) { char *d = NULL; if (xvmc_dump) return; if ((d = getenv("INTEL_XVMC_DUMP"))) xvmc_dump = 1; if (xvmc_dump) { fp = fopen(DUMPFILE, "a"); if (!fp) xvmc_dump = 0; } } void intel_xvmc_dump_close(void) { if (xvmc_dump) { fclose(fp); xvmc_dump = 0; } } void intel_xvmc_dump_render(XvMCContext * context, unsigned int picture_structure, XvMCSurface * target, XvMCSurface * past, XvMCSurface * future, unsigned int flags, unsigned int num_macroblocks, unsigned int first_macroblock, XvMCMacroBlockArray * macroblock_array, XvMCBlockArray * blocks) { int i; XvMCMacroBlock *mb; if (!xvmc_dump) return; fprintf(fp, "========== new surface rendering ==========\n"); fprintf(fp, "Context (id:%d) (surface_type_id:%d) (width:%d) (height:%d)\n", (int)context->context_id, context->surface_type_id, context->width, context->height); if (picture_structure == XVMC_FRAME_PICTURE) fprintf(fp, "picture structure: frame picture\n"); else if (picture_structure == XVMC_TOP_FIELD) fprintf(fp, "picture structure: top field picture (%s)\n", (flags == XVMC_SECOND_FIELD) ? "second" : "first"); else if (picture_structure == XVMC_BOTTOM_FIELD) fprintf(fp, "picture structure: bottom field picture (%s)\n", (flags == XVMC_SECOND_FIELD) ? "second" : "first"); if (!past && !future) fprintf(fp, "picture type: I\n"); else if (past && !future) fprintf(fp, "picture type: P\n"); else if (past && future) fprintf(fp, "picture type: B\n"); else fprintf(fp, "picture type: Bad!\n"); fprintf(fp, "target picture: id (%d) width (%d) height (%d)\n", (int)target->surface_id, target->width, target->height); if (past) fprintf(fp, "past picture: id (%d) width (%d) height (%d)\n", (int)past->surface_id, past->width, past->height); if (future) fprintf(fp, "future picture: id (%d) width (%d) height (%d)\n", (int)future->surface_id, future->width, future->height); fprintf(fp, "num macroblocks: %d, first macroblocks %d\n", num_macroblocks, first_macroblock); for (i = first_macroblock; i < (first_macroblock + num_macroblocks); i++) { mb = ¯oblock_array->macro_blocks[i]; fprintf(fp, "- MB(%d): ", i); fprintf(fp, "x (%d) y (%d) ", mb->x, mb->y); fprintf(fp, "macroblock type ("); if (mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD) fprintf(fp, "motion_forward "); if (mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD) fprintf(fp, "motion_backward "); if (mb->macroblock_type & XVMC_MB_TYPE_PATTERN) fprintf(fp, "pattern "); if (mb->macroblock_type & XVMC_MB_TYPE_INTRA) fprintf(fp, "intra "); fprintf(fp, ") "); fprintf(fp, "mc type "); if (picture_structure == XVMC_FRAME_PICTURE) { if (mb->motion_type & XVMC_PREDICTION_FIELD) fprintf(fp, "(field) "); else if (mb->motion_type & XVMC_PREDICTION_FRAME) fprintf(fp, "(frame) "); else if (mb->motion_type & XVMC_PREDICTION_DUAL_PRIME) fprintf(fp, "(dual-prime) "); else fprintf(fp, "(unknown %d) ", mb->motion_type); } else { /* field */ if (mb->motion_type & XVMC_PREDICTION_FIELD) fprintf(fp, "(field) "); else if (mb->motion_type & XVMC_PREDICTION_DUAL_PRIME) fprintf(fp, "(dual-prime) "); else if (mb->motion_type & XVMC_PREDICTION_16x8) fprintf(fp, "(16x8) "); else fprintf(fp, "(unknown %d) ", mb->motion_type); } if (mb->dct_type == XVMC_DCT_TYPE_FRAME) fprintf(fp, "dct type (frame) "); else if (mb->dct_type == XVMC_DCT_TYPE_FIELD) fprintf(fp, "dct type (field) "); fprintf(fp, "coded_block_pattern (0x%x)\n", mb->coded_block_pattern); /* XXX mv dump */ } } xf86-video-intel-2.99.917/xvmc/i915_xvmc.c0000664000175000017500000012030612400044327014572 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Xiang Haihao * */ #include #include "i915_xvmc.h" #include "i915_structs.h" #include "i915_program.h" #define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) #define STRIDE(w) (ALIGN((w), 1024)) #define SIZE_Y420(w, h) (h * STRIDE(w)) #define SIZE_UV420(w, h) ((h >> 1) * STRIDE(w >> 1)) #define SIZE_YUV420(w, h) (SIZE_Y420(w,h) + SIZE_UV420(w,h) * 2) #define UOFFSET(context) (SIZE_Y420(context->width, context->height)) #define VOFFSET(context) (SIZE_Y420(context->width, context->height) + \ SIZE_UV420(context->width, context->height)) typedef union { int16_t component[2]; int32_t v; } vector_t; static void i915_inst_arith(unsigned int *inst, unsigned int op, unsigned int dest, unsigned int mask, unsigned int saturate, unsigned int src0, unsigned int src1, unsigned int src2) { dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)); *inst = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0)); inst++; *inst = (A1_SRC0(src0) | A1_SRC1(src1)); inst++; *inst = (A2_SRC1(src1) | A2_SRC2(src2)); } static void i915_inst_decl(unsigned int *inst, unsigned int type, unsigned int nr, unsigned int d0_flags) { unsigned int reg = UREG(type, nr); *inst = (D0_DCL | D0_DEST(reg) | d0_flags); inst++; *inst = D1_MBZ; inst++; *inst = D2_MBZ; } static void i915_inst_texld(unsigned int *inst, unsigned int op, unsigned int dest, unsigned int coord, unsigned int sampler) { dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest)); *inst = (op | T0_DEST(dest) | T0_SAMPLER(sampler)); inst++; *inst = T1_ADDRESS_REG(coord); inst++; *inst = T2_MBZ; } static void i915_mc_one_time_context_init(XvMCContext * context) { unsigned int dest, src0, src1, src2; i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData; int i; struct i915_3dstate_sampler_state *sampler_state; struct i915_3dstate_pixel_shader_program *pixel_shader_program; struct i915_3dstate_pixel_shader_constants *pixel_shader_constants; /* sampler static state */ drm_intel_gem_bo_map_gtt(pI915XvMC->ssb_bo); sampler_state = pI915XvMC->ssb_bo->virtual; memset(sampler_state, 0, sizeof(*sampler_state)); sampler_state->dw0.type = CMD_3D; sampler_state->dw0.opcode = OPC_3DSTATE_SAMPLER_STATE; sampler_state->dw0.length = 6; sampler_state->dw1.sampler_masker = SAMPLER_SAMPLER0 | SAMPLER_SAMPLER1; sampler_state->sampler0.ts0.reverse_gamma = 0; sampler_state->sampler0.ts0.planar2packet = 0; sampler_state->sampler0.ts0.color_conversion = 0; sampler_state->sampler0.ts0.chromakey_index = 0; sampler_state->sampler0.ts0.base_level = 0; sampler_state->sampler0.ts0.mip_filter = MIPFILTER_NONE; /* NONE */ sampler_state->sampler0.ts0.mag_filter = MAPFILTER_LINEAR; /* LINEAR */ sampler_state->sampler0.ts0.min_filter = MAPFILTER_LINEAR; /* LINEAR */ sampler_state->sampler0.ts0.lod_bias = 0; /* 0.0 */ sampler_state->sampler0.ts0.shadow_enable = 0; sampler_state->sampler0.ts0.max_anisotropy = ANISORATIO_2; sampler_state->sampler0.ts0.shadow_function = PREFILTEROP_ALWAYS; sampler_state->sampler0.ts1.min_lod = 0; /* 0.0 Maximum Mip Level */ sampler_state->sampler0.ts1.kill_pixel = 0; sampler_state->sampler0.ts1.keyed_texture_filter = 0; sampler_state->sampler0.ts1.chromakey_enable = 0; sampler_state->sampler0.ts1.tcx_control = TEXCOORDMODE_CLAMP; sampler_state->sampler0.ts1.tcy_control = TEXCOORDMODE_CLAMP; sampler_state->sampler0.ts1.tcz_control = TEXCOORDMODE_CLAMP; sampler_state->sampler0.ts1.normalized_coor = 0; sampler_state->sampler0.ts1.map_index = 0; sampler_state->sampler0.ts1.east_deinterlacer = 0; sampler_state->sampler0.ts2.default_color = 0; sampler_state->sampler1.ts0.reverse_gamma = 0; sampler_state->sampler1.ts0.planar2packet = 0; sampler_state->sampler1.ts0.color_conversion = 0; sampler_state->sampler1.ts0.chromakey_index = 0; sampler_state->sampler1.ts0.base_level = 0; sampler_state->sampler1.ts0.mip_filter = MIPFILTER_NONE; /* NONE */ sampler_state->sampler1.ts0.mag_filter = MAPFILTER_LINEAR; /* LINEAR */ sampler_state->sampler1.ts0.min_filter = MAPFILTER_LINEAR; /* LINEAR */ sampler_state->sampler1.ts0.lod_bias = 0; /* 0.0 */ sampler_state->sampler1.ts0.shadow_enable = 0; sampler_state->sampler1.ts0.max_anisotropy = ANISORATIO_2; sampler_state->sampler1.ts0.shadow_function = PREFILTEROP_ALWAYS; sampler_state->sampler1.ts1.min_lod = 0; /* 0.0 Maximum Mip Level */ sampler_state->sampler1.ts1.kill_pixel = 0; sampler_state->sampler1.ts1.keyed_texture_filter = 0; sampler_state->sampler1.ts1.chromakey_enable = 0; sampler_state->sampler1.ts1.tcx_control = TEXCOORDMODE_CLAMP; sampler_state->sampler1.ts1.tcy_control = TEXCOORDMODE_CLAMP; sampler_state->sampler1.ts1.tcz_control = TEXCOORDMODE_CLAMP; sampler_state->sampler1.ts1.normalized_coor = 0; sampler_state->sampler1.ts1.map_index = 1; sampler_state->sampler1.ts1.east_deinterlacer = 0; sampler_state->sampler1.ts2.default_color = 0; drm_intel_gem_bo_unmap_gtt(pI915XvMC->ssb_bo); /* pixel shader static state */ drm_intel_gem_bo_map_gtt(pI915XvMC->psp_bo); pixel_shader_program = pI915XvMC->psp_bo->virtual; memset(pixel_shader_program, 0, sizeof(*pixel_shader_program)); pixel_shader_program->shader0.type = CMD_3D; pixel_shader_program->shader0.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM; pixel_shader_program->shader0.retain = 1; pixel_shader_program->shader0.length = 2; /* 1 inst */ i = 0; dest = UREG(REG_TYPE_OC, 0); src0 = UREG(REG_TYPE_CONST, 0); src1 = 0; src2 = 0; i915_inst_arith(&pixel_shader_program->inst0[i], A0_MOV, dest, A0_DEST_CHANNEL_ALL, A0_DEST_SATURATE, src0, src1, src2); pixel_shader_program->shader1.type = CMD_3D; pixel_shader_program->shader1.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM; pixel_shader_program->shader1.retain = 1; pixel_shader_program->shader1.length = 14; /* 5 inst */ i = 0; /* dcl t0.xy */ i915_inst_decl(&pixel_shader_program->inst1[i], REG_TYPE_T, T_TEX0, D0_CHANNEL_XY); i += 3; /* dcl t1.xy */ i915_inst_decl(&pixel_shader_program->inst1[i], REG_TYPE_T, T_TEX1, D0_CHANNEL_XY); /* dcl_2D s0 */ i += 3; i915_inst_decl(&pixel_shader_program->inst1[i], REG_TYPE_S, 0, D0_SAMPLE_TYPE_2D); /* texld r0, t0, s0 */ i += 3; dest = UREG(REG_TYPE_R, 0); src0 = UREG(REG_TYPE_T, 0); /* COORD */ src1 = UREG(REG_TYPE_S, 0); /* SAMPLER */ i915_inst_texld(&pixel_shader_program->inst1[i], T0_TEXLD, dest, src0, src1); /* mov oC, r0 */ i += 3; dest = UREG(REG_TYPE_OC, 0); src0 = UREG(REG_TYPE_R, 0); src1 = src2 = 0; i915_inst_arith(&pixel_shader_program->inst1[i], A0_MOV, dest, A0_DEST_CHANNEL_ALL, A0_DEST_SATURATE, src0, src1, src2); pixel_shader_program->shader2.type = CMD_3D; pixel_shader_program->shader2.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM; pixel_shader_program->shader2.retain = 1; pixel_shader_program->shader2.length = 14; /* 5 inst */ i = 0; /* dcl t2.xy */ i915_inst_decl(&pixel_shader_program->inst2[i], REG_TYPE_T, T_TEX2, D0_CHANNEL_XY); /* dcl t3.xy */ i += 3; i915_inst_decl(&pixel_shader_program->inst2[i], REG_TYPE_T, T_TEX3, D0_CHANNEL_XY); /* dcl_2D s1 */ i += 3; i915_inst_decl(&pixel_shader_program->inst2[i], REG_TYPE_S, 1, D0_SAMPLE_TYPE_2D); /* texld r0, t2, s1 */ i += 3; dest = UREG(REG_TYPE_R, 0); src0 = UREG(REG_TYPE_T, 2); /* COORD */ src1 = UREG(REG_TYPE_S, 1); /* SAMPLER */ i915_inst_texld(&pixel_shader_program->inst2[i], T0_TEXLD, dest, src0, src1); /* mov oC, r0 */ i += 3; dest = UREG(REG_TYPE_OC, 0); src0 = UREG(REG_TYPE_R, 0); src1 = src2 = 0; i915_inst_arith(&pixel_shader_program->inst2[i], A0_MOV, dest, A0_DEST_CHANNEL_ALL, A0_DEST_SATURATE, src0, src1, src2); /* Shader 3 */ pixel_shader_program->shader3.type = CMD_3D; pixel_shader_program->shader3.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM; pixel_shader_program->shader3.retain = 1; pixel_shader_program->shader3.length = 29; /* 10 inst */ i = 0; /* dcl t0.xy */ i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX0, D0_CHANNEL_XY); /* dcl t1.xy */ i += 3; i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX1, D0_CHANNEL_XY); /* dcl t2.xy */ i += 3; i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX2, D0_CHANNEL_XY); /* dcl t3.xy */ i += 3; i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX3, D0_CHANNEL_XY); /* dcl_2D s0 */ i += 3; i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 0, D0_SAMPLE_TYPE_2D); /* dcl_2D s1 */ i += 3; i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 1, D0_SAMPLE_TYPE_2D); /* texld r0, t0, s0 */ i += 3; dest = UREG(REG_TYPE_R, 0); src0 = UREG(REG_TYPE_T, 0); /* COORD */ src1 = UREG(REG_TYPE_S, 0); /* SAMPLER */ i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0, src1); /* texld r1, t2, s1 */ i += 3; dest = UREG(REG_TYPE_R, 1); src0 = UREG(REG_TYPE_T, 2); /* COORD */ src1 = UREG(REG_TYPE_S, 1); /* SAMPLER */ i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0, src1); /* add r0, r0, r1 */ i += 3; dest = UREG(REG_TYPE_R, 0); src0 = UREG(REG_TYPE_R, 0); src1 = UREG(REG_TYPE_R, 1); src2 = 0; i915_inst_arith(&pixel_shader_program->inst3[i], A0_ADD, dest, A0_DEST_CHANNEL_ALL, 0 /* A0_DEST_SATURATE */ , src0, src1, src2); /* mul oC, r0, c0 */ i += 3; dest = UREG(REG_TYPE_OC, 0); src0 = UREG(REG_TYPE_R, 0); src1 = UREG(REG_TYPE_CONST, 0); src2 = 0; i915_inst_arith(&pixel_shader_program->inst3[i], A0_MUL, dest, A0_DEST_CHANNEL_ALL, A0_DEST_SATURATE, src0, src1, src2); drm_intel_gem_bo_unmap_gtt(pI915XvMC->psp_bo); /* pixel shader contant static state */ drm_intel_gem_bo_map_gtt(pI915XvMC->psc_bo); pixel_shader_constants = pI915XvMC->psc_bo->virtual; memset(pixel_shader_constants, 0, sizeof(*pixel_shader_constants)); pixel_shader_constants->dw0.type = CMD_3D; pixel_shader_constants->dw0.opcode = OPC_3DSTATE_PIXEL_SHADER_CONSTANTS; pixel_shader_constants->dw0.length = 4; pixel_shader_constants->dw1.reg_mask = REG_CR0; pixel_shader_constants->value.x = 0.5; pixel_shader_constants->value.y = 0.5; pixel_shader_constants->value.z = 0.5; pixel_shader_constants->value.w = 0.5; drm_intel_gem_bo_unmap_gtt(pI915XvMC->psc_bo); } static void i915_mc_one_time_state_emit(XvMCContext * context) { i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData; uint32_t load_state_immediate_1, load_indirect, s3_dword, s6_dword; int mem_select; BATCH_LOCALS; /* 3DSTATE_LOAD_STATE_IMMEDIATE_1 */ BEGIN_BATCH(3 + 8); load_state_immediate_1 = OP_3D_LOAD_STATE_IMMEDIATE_1; load_state_immediate_1 |= OP_3D_LOAD_STATE_IMM_LOAD_S3; load_state_immediate_1 |= OP_3D_LOAD_STATE_IMM_LOAD_S6; load_state_immediate_1 |= 3 - 2; /* length */ OUT_BATCH(load_state_immediate_1); s3_dword = S3_SET0_PCD | S3_SET1_PCD | S3_SET2_PCD | S3_SET3_PCD | S3_SET4_PCD | S3_SET5_PCD | S3_SET6_PCD | S3_SET7_PCD; OUT_BATCH(s3_dword); s6_dword = S6_COLOR_BUFFER_WRITE | S6_DEPTH_TEST_ENABLE; s6_dword |= 1 << S6_SRC_BLEND_FACTOR_SHIFT; s6_dword |= 1 << S6_DST_BLEND_FACTOR_SHIFT; OUT_BATCH(s6_dword); /* 3DSTATE_LOAD_INDIRECT */ load_indirect = OP_3D_LOAD_INDIRECT; load_indirect |= (BLOCK_DIS | BLOCK_SSB | BLOCK_PSP | BLOCK_PSC) << BLOCK_MASK_SHIFT; load_indirect |= 8 - 2; /* length */ if (pI915XvMC->use_phys_addr) mem_select = 0; /* use physical address */ else { load_indirect |= OP_3D_LOAD_INDIRECT_GFX_ADDR; mem_select = 1; /* use gfx address */ } OUT_BATCH(load_indirect); /* Dynamic indirect state buffer */ OUT_BATCH(0); /* no dynamic indirect state */ /* Sample state buffer */ OUT_RELOC(pI915XvMC->ssb_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, STATE_VALID | STATE_FORCE); OUT_BATCH(7); /* 8 - 1 */ /* Pixel shader program buffer */ OUT_RELOC(pI915XvMC->psp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, STATE_VALID | STATE_FORCE); OUT_BATCH(66); /* 4 + 16 + 16 + 31 - 1 */ /* Pixel shader constant buffer */ OUT_RELOC(pI915XvMC->psc_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, STATE_VALID | STATE_FORCE); OUT_BATCH(5); /* 6 - 1 */ ADVANCE_BATCH(); } static void i915_mc_static_indirect_state_set(XvMCContext * context, XvMCSurface * dest, unsigned int picture_structure, unsigned int flags, unsigned int picture_coding_type) { i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData; struct intel_xvmc_surface *intel_surf = dest->privData; struct i915_mc_static_indirect_state_buffer *buffer_info; drm_intel_gem_bo_map_gtt(pI915XvMC->sis_bo); buffer_info = pI915XvMC->sis_bo->virtual; memset(buffer_info, 0, sizeof(*buffer_info)); /* dest Y */ buffer_info->dest_y.dw0.type = CMD_3D; buffer_info->dest_y.dw0.opcode = OPC_3DSTATE_BUFFER_INFO; buffer_info->dest_y.dw0.length = 1; buffer_info->dest_y.dw1.aux_id = 0; buffer_info->dest_y.dw1.buffer_id = BUFFERID_COLOR_BACK; buffer_info->dest_y.dw1.fence_regs = 0; /* disabled *//* FIXME: tiled y for performance */ buffer_info->dest_y.dw1.tiled_surface = 0; /* linear */ buffer_info->dest_y.dw1.walk = TILEWALK_XMAJOR; buffer_info->dest_y.dw1.pitch = (pI915XvMC->yStride >> 2); /* in DWords */ buffer_info->dest_y.dw2.base_address = intel_surf->bo->offset >> 2; /* starting DWORD address */ drm_intel_bo_emit_reloc(pI915XvMC->sis_bo, offsetof(typeof(*buffer_info),dest_y.dw2), intel_surf->bo, 0, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); /* dest U */ buffer_info->dest_u.dw0.type = CMD_3D; buffer_info->dest_u.dw0.opcode = OPC_3DSTATE_BUFFER_INFO; buffer_info->dest_u.dw0.length = 1; buffer_info->dest_u.dw1.aux_id = 0; buffer_info->dest_u.dw1.buffer_id = BUFFERID_COLOR_AUX; buffer_info->dest_u.dw1.fence_regs = 0; buffer_info->dest_u.dw1.tiled_surface = 0; buffer_info->dest_u.dw1.walk = TILEWALK_XMAJOR; buffer_info->dest_u.dw1.pitch = (pI915XvMC->uvStride >> 2); /* in DWords */ buffer_info->dest_u.dw2.base_address = (intel_surf->bo->offset + UOFFSET(context)) >> 2; drm_intel_bo_emit_reloc(pI915XvMC->sis_bo, offsetof(typeof(*buffer_info),dest_u.dw2), intel_surf->bo, UOFFSET(context), I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); /* dest V */ buffer_info->dest_v.dw0.type = CMD_3D; buffer_info->dest_v.dw0.opcode = OPC_3DSTATE_BUFFER_INFO; buffer_info->dest_v.dw0.length = 1; buffer_info->dest_v.dw1.aux_id = 1; buffer_info->dest_v.dw1.buffer_id = BUFFERID_COLOR_AUX; buffer_info->dest_v.dw1.fence_regs = 0; buffer_info->dest_v.dw1.tiled_surface = 0; buffer_info->dest_v.dw1.walk = TILEWALK_XMAJOR; buffer_info->dest_v.dw1.pitch = (pI915XvMC->uvStride >> 2); /* in Dwords */ buffer_info->dest_v.dw2.base_address = (intel_surf->bo->offset + VOFFSET(context)) >> 2; drm_intel_bo_emit_reloc(pI915XvMC->sis_bo, offsetof(typeof(*buffer_info),dest_v.dw2), intel_surf->bo, VOFFSET(context), I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); /* Dest buffer parameters */ buffer_info->dest_buf.dw0.type = CMD_3D; buffer_info->dest_buf.dw0.opcode = OPC_3DSTATE_DEST_BUFFER_VARIABLES; buffer_info->dest_buf.dw0.length = 0; buffer_info->dest_buf.dw1.dest_v_bias = 8; /* 0.5 */ buffer_info->dest_buf.dw1.dest_h_bias = 8; /* 0.5 */ buffer_info->dest_buf.dw1.color_fmt = COLORBUFFER_8BIT; buffer_info->dest_buf.dw1.v_ls = 0; /* fill later */ buffer_info->dest_buf.dw1.v_ls_offset = 0; /* fill later */ if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_FRAME_PICTURE) { ; } else if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_TOP_FIELD) { buffer_info->dest_buf.dw1.v_ls = 1; } else if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_BOTTOM_FIELD) { buffer_info->dest_buf.dw1.v_ls = 1; buffer_info->dest_buf.dw1.v_ls_offset = 1; } /* MPEG buffer parameters */ buffer_info->dest_buf_mpeg.dw0.type = CMD_3D; buffer_info->dest_buf_mpeg.dw0.opcode = OPC_3DSTATE_DEST_BUFFER_VARIABLES_MPEG; buffer_info->dest_buf_mpeg.dw0.length = 1; buffer_info->dest_buf_mpeg.dw1.decode_mode = MPEG_DECODE_MC; buffer_info->dest_buf_mpeg.dw1.rcontrol = 0; /* for MPEG-1/MPEG-2 */ buffer_info->dest_buf_mpeg.dw1.bidir_avrg_control = 0; /* for MPEG-1/MPEG-2/MPEG-4 */ buffer_info->dest_buf_mpeg.dw1.abort_on_error = 1; buffer_info->dest_buf_mpeg.dw1.intra8 = 0; /* 16-bit formatted correction data */ buffer_info->dest_buf_mpeg.dw1.tff = 1; /* fill later */ buffer_info->dest_buf_mpeg.dw1.v_subsample_factor = MC_SUB_1V; buffer_info->dest_buf_mpeg.dw1.h_subsample_factor = MC_SUB_1H; if (picture_structure & XVMC_FRAME_PICTURE) { ; } else if (picture_structure & XVMC_TOP_FIELD) { if (flags & XVMC_SECOND_FIELD) buffer_info->dest_buf_mpeg.dw1.tff = 0; else buffer_info->dest_buf_mpeg.dw1.tff = 1; } else if (picture_structure & XVMC_BOTTOM_FIELD) { if (flags & XVMC_SECOND_FIELD) buffer_info->dest_buf_mpeg.dw1.tff = 1; else buffer_info->dest_buf_mpeg.dw1.tff = 0; } buffer_info->dest_buf_mpeg.dw1.picture_width = (dest->width >> 4); /* in macroblocks */ buffer_info->dest_buf_mpeg.dw2.picture_coding_type = picture_coding_type; buffer_info->corr.dw0.type = CMD_3D; buffer_info->corr.dw0.opcode = OPC_3DSTATE_BUFFER_INFO; buffer_info->corr.dw0.length = 1; buffer_info->corr.dw1.aux_id = 0; buffer_info->corr.dw1.buffer_id = BUFFERID_MC_INTRA_CORR; buffer_info->corr.dw1.aux_id = 0; buffer_info->corr.dw1.fence_regs = 0; buffer_info->corr.dw1.tiled_surface = 0; buffer_info->corr.dw1.walk = 0; buffer_info->corr.dw1.pitch = 0; buffer_info->corr.dw2.base_address = pI915XvMC->corrdata_bo->offset >> 2; /* starting DWORD address */ drm_intel_bo_emit_reloc(pI915XvMC->sis_bo, offsetof(typeof(*buffer_info),corr.dw2), pI915XvMC->corrdata_bo, 0, I915_GEM_DOMAIN_RENDER, 0); drm_intel_gem_bo_unmap_gtt(pI915XvMC->sis_bo); } static void i915_mc_map_state_set(XvMCContext * context, struct intel_xvmc_surface * privPast, struct intel_xvmc_surface * privFuture) { i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData; struct i915_mc_map_state *map_state; unsigned int w = context->width; unsigned int h = context->height; drm_intel_gem_bo_map_gtt(pI915XvMC->msb_bo); map_state = pI915XvMC->msb_bo->virtual; memset(map_state, 0, sizeof(*map_state)); /* 3DSATE_MAP_STATE: Y */ map_state->y_map.dw0.type = CMD_3D; map_state->y_map.dw0.opcode = OPC_3DSTATE_MAP_STATE; map_state->y_map.dw0.retain = 1; map_state->y_map.dw0.length = 6; map_state->y_map.dw1.map_mask = MAP_MAP0 | MAP_MAP1; /* Y Forward (Past) */ map_state->y_forward.tm0.v_ls_offset = 0; map_state->y_forward.tm0.v_ls = 0; map_state->y_forward.tm1.tile_walk = TILEWALK_XMAJOR; map_state->y_forward.tm1.tiled_surface = 0; map_state->y_forward.tm1.utilize_fence_regs = 0; map_state->y_forward.tm1.texel_fmt = 0; /* 8bit */ map_state->y_forward.tm1.surface_fmt = 1; /* 8bit */ map_state->y_forward.tm1.width = w - 1; map_state->y_forward.tm1.height = h - 1; map_state->y_forward.tm2.depth = 0; map_state->y_forward.tm2.max_lod = 0; map_state->y_forward.tm2.cube_face = 0; map_state->y_forward.tm0.base_address = privPast->bo->offset >> 2; drm_intel_bo_emit_reloc(pI915XvMC->msb_bo, offsetof(typeof(*map_state),y_forward.tm0), privPast->bo, 0, I915_GEM_DOMAIN_SAMPLER, 0); map_state->y_forward.tm2.pitch = (pI915XvMC->yStride >> 2) - 1; /* in DWords - 1 */ /* Y Backward (Future) */ map_state->y_backward.tm0.v_ls_offset = 0; map_state->y_backward.tm0.v_ls = 0; map_state->y_backward.tm1.tile_walk = TILEWALK_XMAJOR; map_state->y_backward.tm1.tiled_surface = 0; map_state->y_backward.tm1.utilize_fence_regs = 0; map_state->y_backward.tm1.texel_fmt = 0; /* 8bit */ map_state->y_backward.tm1.surface_fmt = 1; /* 8bit */ map_state->y_backward.tm1.width = w - 1; map_state->y_backward.tm1.height = h - 1; map_state->y_backward.tm2.depth = 0; map_state->y_backward.tm2.max_lod = 0; map_state->y_backward.tm2.cube_face = 0; map_state->y_backward.tm0.base_address = privFuture->bo->offset >> 2; drm_intel_bo_emit_reloc(pI915XvMC->msb_bo, offsetof(typeof(*map_state),y_backward.tm0), privFuture->bo, 0, I915_GEM_DOMAIN_SAMPLER, 0); map_state->y_backward.tm2.pitch = (pI915XvMC->yStride >> 2) - 1; /* 3DSATE_MAP_STATE: U */ map_state->u_map.dw0.type = CMD_3D; map_state->u_map.dw0.opcode = OPC_3DSTATE_MAP_STATE; map_state->u_map.dw0.retain = 1; map_state->u_map.dw0.length = 6; map_state->u_map.dw1.map_mask = MAP_MAP0 | MAP_MAP1; /* U Forward */ map_state->u_forward.tm0.v_ls_offset = 0; map_state->u_forward.tm0.v_ls = 0; map_state->u_forward.tm1.tile_walk = TILEWALK_XMAJOR; map_state->u_forward.tm1.tiled_surface = 0; map_state->u_forward.tm1.utilize_fence_regs = 0; map_state->u_forward.tm1.texel_fmt = 0; /* 8bit */ map_state->u_forward.tm1.surface_fmt = 1; /* 8bit */ map_state->u_forward.tm1.width = (w >> 1) - 1; map_state->u_forward.tm1.height = (h >> 1) - 1; map_state->u_forward.tm2.depth = 0; map_state->u_forward.tm2.max_lod = 0; map_state->u_forward.tm2.cube_face = 0; map_state->u_forward.tm0.base_address = (privPast->bo->offset + UOFFSET(context)) >> 2; drm_intel_bo_emit_reloc(pI915XvMC->msb_bo, offsetof(typeof(*map_state),u_forward.tm0), privPast->bo, UOFFSET(context), I915_GEM_DOMAIN_SAMPLER, 0); map_state->u_forward.tm2.pitch = (pI915XvMC->uvStride >> 2) - 1; /* in DWords - 1 */ /* U Backward */ map_state->u_backward.tm0.v_ls_offset = 0; map_state->u_backward.tm0.v_ls = 0; map_state->u_backward.tm1.tile_walk = TILEWALK_XMAJOR; map_state->u_backward.tm1.tiled_surface = 0; map_state->u_backward.tm1.utilize_fence_regs = 0; map_state->u_backward.tm1.texel_fmt = 0; map_state->u_backward.tm1.surface_fmt = 1; map_state->u_backward.tm1.width = (w >> 1) - 1; map_state->u_backward.tm1.height = (h >> 1) - 1; map_state->u_backward.tm2.depth = 0; map_state->u_backward.tm2.max_lod = 0; map_state->u_backward.tm2.cube_face = 0; map_state->u_backward.tm0.base_address = (privFuture->bo->offset + UOFFSET(context)) >> 2; drm_intel_bo_emit_reloc(pI915XvMC->msb_bo, offsetof(typeof(*map_state),u_backward.tm0), privFuture->bo, UOFFSET(context), I915_GEM_DOMAIN_SAMPLER, 0); map_state->u_backward.tm2.pitch = (pI915XvMC->uvStride >> 2) - 1; /* 3DSATE_MAP_STATE: V */ map_state->v_map.dw0.type = CMD_3D; map_state->v_map.dw0.opcode = OPC_3DSTATE_MAP_STATE; map_state->v_map.dw0.retain = 1; map_state->v_map.dw0.length = 6; map_state->v_map.dw1.map_mask = MAP_MAP0 | MAP_MAP1; /* V Forward */ map_state->v_forward.tm0.v_ls_offset = 0; map_state->v_forward.tm0.v_ls = 0; map_state->v_forward.tm1.tile_walk = TILEWALK_XMAJOR; map_state->v_forward.tm1.tiled_surface = 0; map_state->v_forward.tm1.utilize_fence_regs = 0; map_state->v_forward.tm1.texel_fmt = 0; map_state->v_forward.tm1.surface_fmt = 1; map_state->v_forward.tm1.width = (w >> 1) - 1; map_state->v_forward.tm1.height = (h >> 1) - 1; map_state->v_forward.tm2.depth = 0; map_state->v_forward.tm2.max_lod = 0; map_state->v_forward.tm2.cube_face = 0; map_state->v_forward.tm0.base_address = (privPast->bo->offset + VOFFSET(context)) >> 2; drm_intel_bo_emit_reloc(pI915XvMC->msb_bo, offsetof(typeof(*map_state),v_forward.tm0), privPast->bo, VOFFSET(context), I915_GEM_DOMAIN_SAMPLER, 0); map_state->v_forward.tm2.pitch = (pI915XvMC->uvStride >> 2) - 1; /* in DWords - 1 */ /* V Backward */ map_state->v_backward.tm0.v_ls_offset = 0; map_state->v_backward.tm0.v_ls = 0; map_state->v_backward.tm1.tile_walk = TILEWALK_XMAJOR; map_state->v_backward.tm1.tiled_surface = 0; map_state->v_backward.tm1.utilize_fence_regs = 0; map_state->v_backward.tm1.texel_fmt = 0; map_state->v_backward.tm1.surface_fmt = 1; map_state->v_backward.tm1.width = (w >> 1) - 1; map_state->v_backward.tm1.height = (h >> 1) - 1; map_state->v_backward.tm2.depth = 0; map_state->v_backward.tm2.max_lod = 0; map_state->v_backward.tm2.cube_face = 0; map_state->v_backward.tm0.base_address = (privFuture->bo->offset + VOFFSET(context)) >> 2; drm_intel_bo_emit_reloc(pI915XvMC->msb_bo, offsetof(typeof(*map_state),v_backward.tm0), privFuture->bo, VOFFSET(context), I915_GEM_DOMAIN_SAMPLER, 0); map_state->v_backward.tm2.pitch = (pI915XvMC->uvStride >> 2) - 1; drm_intel_gem_bo_unmap_gtt(pI915XvMC->msb_bo); } static void i915_mc_load_indirect_render_emit(XvMCContext * context) { i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData; int mem_select; uint32_t load_indirect; BATCH_LOCALS; BEGIN_BATCH(5); load_indirect = OP_3D_LOAD_INDIRECT; load_indirect |= (BLOCK_SIS | BLOCK_MSB) << BLOCK_MASK_SHIFT; load_indirect |= 5 - 2; /* length */ if (pI915XvMC->use_phys_addr) mem_select = 0; /* use physical address */ else { load_indirect |= OP_3D_LOAD_INDIRECT_GFX_ADDR; mem_select = 1; /* use gfx address */ } OUT_BATCH(load_indirect); /* Static Indirect state buffer (dest buffer info) */ OUT_RELOC(pI915XvMC->sis_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, STATE_VALID | STATE_FORCE); OUT_BATCH(16); /* 4 * 3 + 2 + 3 - 1 */ /* Map state buffer (reference buffer info) */ OUT_RELOC(pI915XvMC->msb_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, STATE_VALID | STATE_FORCE); OUT_BATCH(23); /* 3 * 8 - 1 */ ADVANCE_BATCH(); } static void i915_mc_mpeg_set_origin(XvMCContext * context, XvMCMacroBlock * mb) { struct i915_3dmpeg_set_origin set_origin; /* 3DMPEG_SET_ORIGIN */ memset(&set_origin, 0, sizeof(set_origin)); set_origin.dw0.type = CMD_3D; set_origin.dw0.opcode = OPC_3DMPEG_SET_ORIGIN; set_origin.dw0.length = 0; set_origin.dw1.h_origin = mb->x; set_origin.dw1.v_origin = mb->y; intelBatchbufferData(&set_origin, sizeof(set_origin), 0); } static void i915_mc_mpeg_macroblock_ipicture(XvMCContext * context, XvMCMacroBlock * mb) { struct i915_3dmpeg_macroblock_ipicture macroblock_ipicture; /* 3DMPEG_MACROBLOCK_IPICTURE */ memset(¯oblock_ipicture, 0, sizeof(macroblock_ipicture)); macroblock_ipicture.dw0.type = CMD_3D; macroblock_ipicture.dw0.opcode = OPC_3DMPEG_MACROBLOCK_IPICTURE; macroblock_ipicture.dw0.dct_type = (mb->dct_type == XVMC_DCT_TYPE_FIELD); intelBatchbufferData(¯oblock_ipicture, sizeof(macroblock_ipicture), 0); } static void i915_mc_mpeg_macroblock_1fbmv(XvMCContext * context, XvMCMacroBlock * mb) { struct i915_3dmpeg_macroblock_1fbmv macroblock_1fbmv; vector_t mv0[2]; /* 3DMPEG_MACROBLOCK(1fbmv) */ memset(¯oblock_1fbmv, 0, sizeof(macroblock_1fbmv)); macroblock_1fbmv.header.dw0.type = CMD_3D; macroblock_1fbmv.header.dw0.opcode = OPC_3DMPEG_MACROBLOCK; macroblock_1fbmv.header.dw0.length = 2; macroblock_1fbmv.header.dw1.mb_intra = 0; /* should be 0 */ macroblock_1fbmv.header.dw1.forward = ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD) ? 1 : 0); macroblock_1fbmv.header.dw1.backward = ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD) ? 1 : 0); macroblock_1fbmv.header.dw1.h263_4mv = 0; /* should be 0 */ macroblock_1fbmv.header.dw1.dct_type = (mb->dct_type == XVMC_DCT_TYPE_FIELD); if (!(mb->coded_block_pattern & 0x3f)) macroblock_1fbmv.header.dw1.dct_type = XVMC_DCT_TYPE_FRAME; macroblock_1fbmv.header.dw1.motion_type = (mb->motion_type & 0x03); macroblock_1fbmv.header.dw1.vertical_field_select = (mb->motion_vertical_field_select & 0x0f); macroblock_1fbmv.header.dw1.coded_block_pattern = mb->coded_block_pattern; macroblock_1fbmv.header.dw1.skipped_macroblocks = 0; mv0[0].component[0] = mb->PMV[0][0][0]; mv0[0].component[1] = mb->PMV[0][0][1]; mv0[1].component[0] = mb->PMV[0][1][0]; mv0[1].component[1] = mb->PMV[0][1][1]; macroblock_1fbmv.dw2 = mv0[0].v; macroblock_1fbmv.dw3 = mv0[1].v; intelBatchbufferData(¯oblock_1fbmv, sizeof(macroblock_1fbmv), 0); } static void i915_mc_mpeg_macroblock_2fbmv(XvMCContext * context, XvMCMacroBlock * mb, unsigned int ps) { struct i915_3dmpeg_macroblock_2fbmv macroblock_2fbmv; vector_t mv0[2]; vector_t mv1[2]; /* 3DMPEG_MACROBLOCK(2fbmv) */ memset(¯oblock_2fbmv, 0, sizeof(macroblock_2fbmv)); macroblock_2fbmv.header.dw0.type = CMD_3D; macroblock_2fbmv.header.dw0.opcode = OPC_3DMPEG_MACROBLOCK; macroblock_2fbmv.header.dw0.length = 4; macroblock_2fbmv.header.dw1.mb_intra = 0; /* should be 0 */ macroblock_2fbmv.header.dw1.forward = ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD) ? 1 : 0); macroblock_2fbmv.header.dw1.backward = ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD) ? 1 : 0); macroblock_2fbmv.header.dw1.h263_4mv = 0; /* should be 0 */ macroblock_2fbmv.header.dw1.dct_type = (mb->dct_type == XVMC_DCT_TYPE_FIELD); if (!(mb->coded_block_pattern & 0x3f)) macroblock_2fbmv.header.dw1.dct_type = XVMC_DCT_TYPE_FRAME; macroblock_2fbmv.header.dw1.motion_type = (mb->motion_type & 0x03); macroblock_2fbmv.header.dw1.vertical_field_select = (mb->motion_vertical_field_select & 0x0f); macroblock_2fbmv.header.dw1.coded_block_pattern = mb->coded_block_pattern; macroblock_2fbmv.header.dw1.skipped_macroblocks = 0; mv0[0].component[0] = mb->PMV[0][0][0]; mv0[0].component[1] = mb->PMV[0][0][1]; mv0[1].component[0] = mb->PMV[0][1][0]; mv0[1].component[1] = mb->PMV[0][1][1]; mv1[0].component[0] = mb->PMV[1][0][0]; mv1[0].component[1] = mb->PMV[1][0][1]; mv1[1].component[0] = mb->PMV[1][1][0]; mv1[1].component[1] = mb->PMV[1][1][1]; if ((ps & XVMC_FRAME_PICTURE) == XVMC_FRAME_PICTURE) { if ((mb->motion_type & 3) == XVMC_PREDICTION_FIELD) { mv0[0].component[1] = mb->PMV[0][0][1] >> 1; mv0[1].component[1] = mb->PMV[0][1][1] >> 1; mv1[0].component[1] = mb->PMV[1][0][1] >> 1; mv1[1].component[1] = mb->PMV[1][1][1] >> 1; } else if ((mb->motion_type & 3) == XVMC_PREDICTION_DUAL_PRIME) { mv0[0].component[1] = mb->PMV[0][0][1] >> 1; mv0[1].component[1] = mb->PMV[0][1][1] >> 1; // MPEG2 MV[0][1] isn't used mv1[0].component[1] = mb->PMV[1][0][1] >> 1; mv1[1].component[1] = mb->PMV[1][1][1] >> 1; } } macroblock_2fbmv.dw2 = mv0[0].v; macroblock_2fbmv.dw3 = mv0[1].v; macroblock_2fbmv.dw4 = mv1[0].v; macroblock_2fbmv.dw5 = mv1[1].v; intelBatchbufferData(¯oblock_2fbmv, sizeof(macroblock_2fbmv), 0); } static int i915_xvmc_alloc_one_time_buffers(i915XvMCContext *pI915XvMC) { pI915XvMC->ssb_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "ssb", GTT_PAGE_SIZE, GTT_PAGE_SIZE); if (!pI915XvMC->ssb_bo) return 0; pI915XvMC->psp_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "psp", GTT_PAGE_SIZE, GTT_PAGE_SIZE); if (!pI915XvMC->psp_bo) return 0; pI915XvMC->psc_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "psc", GTT_PAGE_SIZE, GTT_PAGE_SIZE); if (!pI915XvMC->psc_bo) return 0; return 1; } static void i915_xvmc_free_one_time_buffers(i915XvMCContext *pI915XvMC) { drm_intel_bo_unreference(pI915XvMC->ssb_bo); drm_intel_bo_unreference(pI915XvMC->psp_bo); drm_intel_bo_unreference(pI915XvMC->psc_bo); } /* * Function: i915_release_resource */ static void i915_release_resource(Display * display, XvMCContext * context) { i915XvMCContext *pI915XvMC; if (!(pI915XvMC = context->privData)) return; i915_xvmc_free_one_time_buffers(pI915XvMC); free(pI915XvMC); context->privData = NULL; } static Status i915_xvmc_mc_create_context(Display * display, XvMCContext * context, int priv_count, CARD32 * priv_data) { i915XvMCContext *pI915XvMC = NULL; struct intel_xvmc_hw_context *tmpComm = NULL; if (priv_count != (sizeof(struct intel_xvmc_hw_context) >> 2)) { XVMC_ERR ("_xvmc_create_context() returned incorrect data size!"); XVMC_INFO("\tExpected %d, got %d", (int)(sizeof(struct intel_xvmc_hw_context) >> 2), priv_count); _xvmc_destroy_context(display, context); XFree(priv_data); context->privData = NULL; return BadValue; } context->privData = (void *)calloc(1, sizeof(i915XvMCContext)); if (!context->privData) { XVMC_ERR("Unable to allocate resources for XvMC context."); return BadAlloc; } pI915XvMC = (i915XvMCContext *) context->privData; tmpComm = (struct intel_xvmc_hw_context *) priv_data; pI915XvMC->use_phys_addr = tmpComm->i915.use_phys_addr; pI915XvMC->comm.surface_bo_size = SIZE_YUV420(context->width, context->height); /* Must free the private data we were passed from X */ XFree(priv_data); priv_data = NULL; if (!i915_xvmc_alloc_one_time_buffers(pI915XvMC)) goto free_one_time_buffers; /* Initialize private context values */ pI915XvMC->yStride = STRIDE(context->width); pI915XvMC->uvStride = STRIDE(context->width >> 1); /* pre-init state buffers */ i915_mc_one_time_context_init(context); return Success; free_one_time_buffers: i915_xvmc_free_one_time_buffers(pI915XvMC); free(pI915XvMC); context->privData = NULL; return BadAlloc; } static int i915_xvmc_mc_destroy_context(Display * display, XvMCContext * context) { i915XvMCContext *pI915XvMC; if (!(pI915XvMC = context->privData)) return XvMCBadContext; /* Pass Control to the X server to destroy the drm_context_t */ i915_release_resource(display, context); return Success; } static int i915_xvmc_alloc_render_state_buffers(i915XvMCContext *pI915XvMC) { pI915XvMC->sis_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "sis", GTT_PAGE_SIZE, GTT_PAGE_SIZE); if (!pI915XvMC->sis_bo) return 0; pI915XvMC->msb_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "msb", GTT_PAGE_SIZE, GTT_PAGE_SIZE); if (!pI915XvMC->msb_bo) return 0; pI915XvMC->corrdata_bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "corrdata", CORRDATA_SIZE, GTT_PAGE_SIZE); if (!pI915XvMC->corrdata_bo) return 0; return 1; } static void i915_xvmc_free_render_state_buffers(i915XvMCContext *pI915XvMC) { drm_intel_bo_unreference(pI915XvMC->sis_bo); drm_intel_bo_unreference(pI915XvMC->msb_bo); drm_intel_bo_unreference(pI915XvMC->corrdata_bo); } static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context, unsigned int picture_structure, XvMCSurface * target_surface, XvMCSurface * past_surface, XvMCSurface * future_surface, unsigned int flags, unsigned int num_macroblocks, unsigned int first_macroblock, XvMCMacroBlockArray * macroblock_array, XvMCBlockArray * blocks) { int i; int picture_coding_type = MPEG_I_PICTURE; /* correction data buffer */ char *corrdata_ptr; int corrdata_size = 0; /* Block Pointer */ short *block_ptr; /* Current Macroblock Pointer */ XvMCMacroBlock *mb; intel_xvmc_context_ptr intel_ctx; struct intel_xvmc_surface *privTarget = NULL; struct intel_xvmc_surface *privFuture = NULL; struct intel_xvmc_surface *privPast = NULL; i915XvMCContext *pI915XvMC = NULL; /* Check Parameters for validity */ if (!display || !context || !target_surface) { XVMC_ERR("Invalid Display, Context or Target!"); return BadValue; } if (!num_macroblocks) return Success; if (!macroblock_array || !blocks) { XVMC_ERR("Invalid block data!"); return BadValue; } if (macroblock_array->num_blocks < (num_macroblocks + first_macroblock)) { XVMC_ERR("Too many macroblocks requested for MB array size."); return BadValue; } if (!(pI915XvMC = context->privData)) return XvMCBadContext; if (!(privTarget = target_surface->privData)) return XvMCBadSurface; if (!i915_xvmc_alloc_render_state_buffers(pI915XvMC)) return BadAlloc; intel_ctx = context->privData; if (!intel_ctx) { XVMC_ERR("Can't find intel xvmc context\n"); return BadValue; } /* P Frame Test */ if (!past_surface) { /* Just to avoid some ifs later. */ privPast = privTarget; } else { if (!(privPast = past_surface->privData)) { return XvMCBadSurface; } picture_coding_type = MPEG_P_PICTURE; } /* B Frame Test */ if (!future_surface) { privFuture = privPast; // privTarget; } else { if (!past_surface) { XVMC_ERR("No Past Surface!"); return BadValue; } if (!(privFuture = future_surface->privData)) { XVMC_ERR("Invalid Future Surface!"); return XvMCBadSurface; } picture_coding_type = MPEG_B_PICTURE; } LOCK_HARDWARE(intel_ctx->hw_context); drm_intel_gem_bo_map_gtt(pI915XvMC->corrdata_bo); corrdata_ptr = pI915XvMC->corrdata_bo->virtual; corrdata_size = 0; for (i = first_macroblock; i < (num_macroblocks + first_macroblock); i++) { int bspm = 0; mb = ¯oblock_array->macro_blocks[i]; block_ptr = &(blocks->blocks[mb->index << 6]); /* Lockup can happen if the coordinates are too far out of range */ if (mb->x > (target_surface->width >> 4)) { mb->x = 0; XVMC_INFO("reset x"); } if (mb->y > (target_surface->height >> 4)) { mb->y = 0; XVMC_INFO("reset y"); } /* Catch no pattern case */ if (!(mb->macroblock_type & XVMC_MB_TYPE_PATTERN) && !(mb->macroblock_type & XVMC_MB_TYPE_INTRA) && mb->coded_block_pattern) { mb->coded_block_pattern = 0; XVMC_INFO("no coded blocks present!"); } bspm = mb_bytes_420[mb->coded_block_pattern]; if (!bspm) continue; corrdata_size += bspm; if (corrdata_size > CORRDATA_SIZE) { XVMC_ERR("correction data buffer overflow."); break; } memcpy(corrdata_ptr, block_ptr, bspm); corrdata_ptr += bspm; } drm_intel_gem_bo_unmap_gtt(pI915XvMC->corrdata_bo); // i915_mc_invalidate_subcontext_buffers(context, BLOCK_SIS | BLOCK_DIS | BLOCK_SSB // | BLOCK_MSB | BLOCK_PSP | BLOCK_PSC); i915_mc_one_time_state_emit(context); i915_mc_static_indirect_state_set(context, target_surface, picture_structure, flags, picture_coding_type); /* setup reference surfaces */ i915_mc_map_state_set(context, privPast, privFuture); i915_mc_load_indirect_render_emit(context); i915_mc_mpeg_set_origin(context, ¯oblock_array->macro_blocks [first_macroblock]); for (i = first_macroblock; i < (num_macroblocks + first_macroblock); i++) { mb = ¯oblock_array->macro_blocks[i]; /* Intra Blocks */ if (mb->macroblock_type & XVMC_MB_TYPE_INTRA) { i915_mc_mpeg_macroblock_ipicture(context, mb); } else if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_FRAME_PICTURE) { /* Frame Picture */ switch (mb->motion_type & 3) { case XVMC_PREDICTION_FIELD: /* Field Based */ i915_mc_mpeg_macroblock_2fbmv(context, mb, picture_structure); break; case XVMC_PREDICTION_FRAME: /* Frame Based */ i915_mc_mpeg_macroblock_1fbmv(context, mb); break; case XVMC_PREDICTION_DUAL_PRIME: /* Dual Prime */ i915_mc_mpeg_macroblock_2fbmv(context, mb, picture_structure); break; default: /* No Motion Type */ XVMC_ERR ("Invalid Macroblock Parameters found."); break; } } else { /* Field Picture */ switch (mb->motion_type & 3) { case XVMC_PREDICTION_FIELD: /* Field Based */ i915_mc_mpeg_macroblock_1fbmv(context, mb); break; case XVMC_PREDICTION_16x8: /* 16x8 MC */ i915_mc_mpeg_macroblock_2fbmv(context, mb, picture_structure); break; case XVMC_PREDICTION_DUAL_PRIME: /* Dual Prime */ i915_mc_mpeg_macroblock_1fbmv(context, mb); break; default: /* No Motion Type */ XVMC_ERR ("Invalid Macroblock Parameters found."); break; } } } intelFlushBatch(); i915_xvmc_free_render_state_buffers(pI915XvMC); UNLOCK_HARDWARE(intel_ctx->hw_context); return 0; } struct _intel_xvmc_driver i915_xvmc_mc_driver = { .type = XVMC_I915_MPEG2_MC, .num_ctx = 0, .ctx_list = NULL, .create_context = i915_xvmc_mc_create_context, .destroy_context = i915_xvmc_mc_destroy_context, .render_surface = i915_xvmc_mc_render_surface, }; xf86-video-intel-2.99.917/xvmc/Makefile.am0000664000175000017500000000123112400044327014731 00000000000000if XVMC lib_LTLIBRARIES=libIntelXvMC.la endif SUBDIRS = shader libIntelXvMC_la_SOURCES = \ intel_xvmc.c \ intel_xvmc.h \ intel_xvmc_private.h \ intel_xvmc_dump.c \ i830_reg.h \ i915_reg.h \ i915_structs.h \ i915_program.h \ i915_xvmc.c \ i915_xvmc.h \ brw_defines.h \ brw_structs.h \ i965_reg.h \ i965_xvmc.c \ xvmc_vld.c \ intel_batchbuffer.c \ intel_batchbuffer.h \ $(NULL) AM_CFLAGS = $(XVMCLIB_CFLAGS) $(XORG_CFLAGS) -I$(top_srcdir)/src -DTRUE=1 -DFALSE=0 libIntelXvMC_la_LDFLAGS = -version-number 1:0:0 libIntelXvMC_la_LIBADD = $(XVMCLIB_LIBS) -lpthread xf86-video-intel-2.99.917/xvmc/intel_xvmc.h0000664000175000017500000000423312400044327015223 00000000000000/* * Copyright © 2007 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Zhenyu Wang * */ #ifndef I830_HWMC_H #define I830_HWMC_H #define INTEL_XVMC_LIBNAME "IntelXvMC" #define INTEL_XVMC_MAJOR 0 #define INTEL_XVMC_MINOR 1 #define INTEL_XVMC_PATCHLEVEL 0 #define FOURCC_XVMC (('C' << 24) + ('M' << 16) + ('V' << 8) + 'X') /* * Commands that client submits through XvPutImage: */ #define INTEL_XVMC_COMMAND_DISPLAY 0x00 #define INTEL_XVMC_COMMAND_UNDISPLAY 0x01 /* hw xvmc support type */ #define XVMC_I915_MPEG2_MC 0x01 #define XVMC_I965_MPEG2_MC 0x02 #define XVMC_I945_MPEG2_VLD 0x04 #define XVMC_I965_MPEG2_VLD 0x08 struct intel_xvmc_hw_context { unsigned int type; union { struct { unsigned int use_phys_addr : 1; } i915; struct { unsigned int is_g4x:1; unsigned int is_965_q:1; unsigned int is_igdng:1; } i965; }; }; /* Intel private XvMC command to DDX driver */ struct intel_xvmc_command { uint32_t handle; }; #ifdef _INTEL_XVMC_SERVER_ #include extern Bool intel_xvmc_adaptor_init(ScreenPtr); #endif #endif xf86-video-intel-2.99.917/xvmc/i915_xvmc.h0000664000175000017500000000520212400044327014574 00000000000000/* * Copyright © 2006 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Xiang Haihao * */ #ifndef _I915XVMC_H #define _I915XVMC_H #include "intel_xvmc_private.h" #define I915_SUBPIC_PALETTE_SIZE 16 #define MAX_SUBCONTEXT_LEN 1024 #define PCI_CHIP_I915_G 0x2582 #define PCI_CHIP_I915_GM 0x2592 #define PCI_CHIP_I945_G 0x2772 #define PCI_CHIP_I945_GM 0x27A2 #define PCI_CHIP_I945_GME 0x27AE #define PCI_CHIP_G33_G 0x29C2 #define PCI_CHIP_Q35_G 0x29B2 #define PCI_CHIP_Q33_G 0x29D2 #define CORRDATA_SIZE 128*GTT_PAGE_SIZE /* * i915XvMCContext: * Private Context data referenced via the privData * pointer in the XvMCContext structure. */ typedef struct _i915XvMCContext { struct intel_xvmc_context comm; unsigned int yStride; unsigned int uvStride; unsigned int use_phys_addr; drm_intel_bo *sis_bo; drm_intel_bo *msb_bo; drm_intel_bo *ssb_bo; drm_intel_bo *psp_bo; drm_intel_bo *psc_bo; drm_intel_bo *corrdata_bo; } i915XvMCContext; /* * i915XvMCSubpicture: * Private data structure for each XvMCSubpicture. This * structure is referenced by the privData pointer in the XvMCSubpicture * structure. */ typedef struct _i915XvMCSubpicture { unsigned int srfNo; unsigned int pitch; unsigned char palette[3][16]; intel_xvmc_drm_map_t srf; i915XvMCContext *privContext; } i915XvMCSubpicture; /* Number of YUV buffers per surface */ #define I830_MAX_BUFS 2 #endif /* _I915XVMC_H */ xf86-video-intel-2.99.917/xvmc/intel_xvmc_private.h0000664000175000017500000001603512400044327016760 00000000000000/* * Copyright © 2007 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Zhenyu Wang * */ #ifndef INTEL_XVMC_H #define INTEL_XVMC_H #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "i915_drm.h" #include "intel_bufmgr.h" #include "intel_xvmc.h" #include "intel_batchbuffer.h" #define GTT_PAGE_SIZE 4*1024 #define XVMC_ERR(s, arg...) \ do { \ fprintf(stderr, "[intel_xvmc] err: " s "\n", ##arg); \ } while (0) #define XVMC_INFO(s, arg...) \ do { \ fprintf(stderr, "[intel_xvmc] info: " s "\n", ##arg); \ } while (0) /* Subpicture fourcc */ #define FOURCC_IA44 0x34344149 /* Definitions for temporary wire protocol hooks to be replaced when a HW independent libXvMC is created. */ extern Status _xvmc_create_context(Display * dpy, XvMCContext * context, int *priv_count, CARD32 ** priv_data); extern Status _xvmc_destroy_context(Display * dpy, XvMCContext * context); extern Status _xvmc_create_surface(Display * dpy, XvMCContext * context, XvMCSurface * surface, int *priv_count, CARD32 ** priv_data); extern Status _xvmc_destroy_surface(Display * dpy, XvMCSurface * surface); extern Status _xvmc_create_subpicture(Display * dpy, XvMCContext * context, XvMCSubpicture * subpicture, int *priv_count, uint ** priv_data); extern Status _xvmc_destroy_subpicture(Display * dpy, XvMCSubpicture * subpicture); struct intel_xvmc_context { struct intel_xvmc_hw_context *hw; uint32_t surface_bo_size; drm_context_t hw_context; /* context id to kernel drm */ }; typedef struct intel_xvmc_context *intel_xvmc_context_ptr; struct intel_xvmc_surface { XvMCContext *context; XvImage *image; GC gc; Bool gc_init; Drawable last_draw; drm_intel_bo *bo; uint32_t gem_handle; }; typedef struct intel_xvmc_surface *intel_xvmc_surface_ptr; typedef struct _intel_xvmc_drm_map { drm_handle_t handle; unsigned long offset; unsigned long size; unsigned long bus_addr; drmAddress map; } intel_xvmc_drm_map_t, *intel_xvmc_drm_map_ptr; typedef struct _intel_xvmc_driver { int type; /* hw xvmc type - i830_hwmc.h */ int screen; /* current screen num */ int fd; /* drm file handler */ dri_bufmgr *bufmgr; struct { unsigned int init_offset; unsigned int size; unsigned int space; unsigned char *ptr; unsigned char *init_ptr; dri_bo *buf; } batch; struct { void *ptr; unsigned int size; unsigned int offset; unsigned int active_buf; unsigned int irq_emitted; } alloc; intel_xvmc_drm_map_t batchbuffer; sigset_t sa_mask, old_mask; pthread_mutex_t ctxmutex; int num_ctx; intel_xvmc_context_ptr ctx_list; int num_surf; struct intel_xvmc_surface * surf_list; void *private; /* driver specific xvmc callbacks */ Status(*create_context) (Display * display, XvMCContext * context, int priv_count, CARD32 * priv_data); Status(*destroy_context) (Display * display, XvMCContext * context); Status(*render_surface) (Display * display, XvMCContext * context, unsigned int picture_structure, XvMCSurface * target_surface, XvMCSurface * past_surface, XvMCSurface * future_surface, unsigned int flags, unsigned int num_macroblocks, unsigned int first_macroblock, XvMCMacroBlockArray * macroblock_array, XvMCBlockArray * blocks); Status(*begin_surface) (Display * display, XvMCContext * context, XvMCSurface * target_surface, XvMCSurface * past_surface, XvMCSurface * future_surface, const XvMCMpegControl * control); Status(*load_qmatrix) (Display * display, XvMCContext * context, const XvMCQMatrix * qmx); Status(*put_slice) (Display * display, XvMCContext * context, unsigned char *slice, int bytes); Status(*put_slice2) (Display * display, XvMCContext * context, unsigned char *slice, int bytes, int slice_code); } intel_xvmc_driver_t, *intel_xvmc_driver_ptr; extern struct _intel_xvmc_driver i915_xvmc_mc_driver; extern struct _intel_xvmc_driver i965_xvmc_mc_driver; extern struct _intel_xvmc_driver xvmc_vld_driver; extern struct _intel_xvmc_driver *xvmc_driver; static inline void LOCK_HARDWARE(drm_context_t ctx) { pthread_mutex_lock(&xvmc_driver->ctxmutex); pthread_sigmask(SIG_SETMASK, &xvmc_driver->sa_mask, &xvmc_driver->old_mask); } static inline void UNLOCK_HARDWARE(drm_context_t ctx) { pthread_sigmask(SIG_SETMASK, &xvmc_driver->old_mask, NULL); pthread_mutex_unlock(&xvmc_driver->ctxmutex); } static inline const char *intel_xvmc_decoder_string(int flag) { switch (flag) { case XVMC_I915_MPEG2_MC: return "i915/945 MPEG2 MC decoder"; case XVMC_I965_MPEG2_MC: return "i965 MPEG2 MC decoder"; case XVMC_I945_MPEG2_VLD: return "i945 MPEG2 VLD decoder"; case XVMC_I965_MPEG2_VLD: return "i965 MPEG2 VLD decoder"; default: return "Unknown decoder"; } } extern unsigned int mb_bytes_420[64]; /* dump function */ extern void intel_xvmc_dump_open(void); extern void intel_xvmc_dump_close(void); extern void intel_xvmc_dump_render(XvMCContext * context, unsigned int picture_structure, XvMCSurface * target_surface, XvMCSurface * past_surface, XvMCSurface * future_surface, unsigned int flags, unsigned int num_macroblocks, unsigned int first_macroblock, XvMCMacroBlockArray * macroblock_array, XvMCBlockArray * blocks); #define VFE_GENERIC_MODE 0x0 #define VFE_VLD_MODE 0x1 #define VFE_IS_MODE 0x2 #define VFE_AVC_MC_MODE 0x4 #define VFE_AVC_IT_MODE 0x7 #define VFE_VC1_IT_MODE 0x7 #endif xf86-video-intel-2.99.917/xvmc/intel_batchbuffer.h0000664000175000017500000000455312400044327016526 00000000000000#ifndef _INTEL_BATCHBUFFER_H #define _INTEL_BATCHBUFFER_H /* #define VERBOSE 0 */ #ifndef VERBOSE extern int VERBOSE; #endif #define BATCH_LOCALS unsigned char *batch_ptr; #define BEGIN_BATCH(n) \ do { \ assert(xvmc_driver->batch.space >= (n) *4); \ batch_ptr = xvmc_driver->batch.ptr; \ } while (0) #define OUT_BATCH(n) \ do { \ *(unsigned int *)batch_ptr = (n); \ batch_ptr += 4; \ } while (0) #define OUT_RELOC(bo,read_domains,write_domains,delta) \ do { \ *(unsigned int *)batch_ptr = (delta) + bo->offset; \ intel_batch_emit_reloc(bo, read_domains, write_domains, delta, batch_ptr); \ batch_ptr += 4; \ } while (0) #define OUT_BATCH_SHORT(n) \ do { \ *(short *)batch_ptr = (n); \ batch_ptr += 2; \ } while (0) #define OUT_BATCH_CHAR(n) \ do { \ *(char *)batch_ptr = (n); \ batch_ptr ++; \ } while (0) #define ADVANCE_BATCH() \ do { \ xvmc_driver->batch.space -= (batch_ptr - xvmc_driver->batch.ptr);\ xvmc_driver->batch.ptr = batch_ptr; \ } while(0) extern void intelFlushBatch(void); extern void intelBatchbufferData(const void *, unsigned, unsigned); extern Bool intelInitBatchBuffer(void); extern void intelFiniBatchBuffer(void); extern void intelCmdIoctl(char *, unsigned); extern void intel_batch_emit_reloc(dri_bo * bo, uint32_t read_domain, uint32_t write_domain, uint32_t delta, unsigned char *); #endif /* _INTEL_BATCHBUFFER_H */ xf86-video-intel-2.99.917/xvmc/i965_xvmc.c0000664000175000017500000006054412400044327014606 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * */ #include "intel_xvmc_private.h" #include "i830_reg.h" #include "i965_reg.h" #include "brw_defines.h" #include "brw_structs.h" #define BATCH_STRUCT(x) intelBatchbufferData(&x, sizeof(x), 0) #define URB_SIZE 256 /* XXX */ #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) enum interface { INTRA_INTERFACE = 0, /* non field intra */ NULL_INTERFACE, /* fill with white, do nothing, for debug */ FORWARD_INTERFACE, /* non field forward predict */ BACKWARD_INTERFACE, /* non field backward predict */ F_B_INTERFACE, /* non field forward and backward predict */ FIELD_FORWARD_INTERFACE, /* field forward predict */ FIELD_BACKWARD_INTERFACE, /* field backward predict */ FIELD_F_B_INTERFACE, /* field forward and backward predict */ DUAL_PRIME_INTERFACE }; static const uint32_t ipicture_kernel_static[][4] = { #include "shader/mc/ipicture.g4b" }; static const uint32_t null_kernel_static[][4] = { #include "shader/mc/null.g4b" }; static const uint32_t frame_forward_kernel_static[][4] = { #include "shader/mc/frame_forward.g4b" }; static const uint32_t frame_backward_kernel_static[][4] = { #include "shader/mc/frame_backward.g4b" }; static const uint32_t frame_f_b_kernel_static[][4] = { #include "shader/mc/frame_f_b.g4b" }; static const uint32_t field_forward_kernel_static[][4] = { #include "shader/mc/field_forward.g4b" }; static const uint32_t field_backward_kernel_static[][4] = { #include "shader/mc/field_backward.g4b" }; static const uint32_t field_f_b_kernel_static[][4] = { #include "shader/mc/field_f_b.g4b" }; static const uint32_t dual_prime_kernel_static[][4] = { #include "shader/mc/dual_prime.g4b" }; static const uint32_t frame_forward_igd_kernel_static[][4] = { #include "shader/mc/frame_forward_igd.g4b" }; static const uint32_t frame_backward_igd_kernel_static[][4] = { #include "shader/mc/frame_backward_igd.g4b" }; static const uint32_t frame_f_b_igd_kernel_static[][4] = { #include "shader/mc/frame_f_b_igd.g4b" }; static const uint32_t field_forward_igd_kernel_static[][4] = { #include "shader/mc/field_forward_igd.g4b" }; static const uint32_t field_backward_igd_kernel_static[][4] = { #include "shader/mc/field_backward_igd.g4b" }; static const uint32_t field_f_b_igd_kernel_static[][4] = { #include "shader/mc/field_f_b_igd.g4b" }; static const uint32_t dual_prime_igd_kernel_static[][4] = { #include "shader/mc/dual_prime_igd.g4b" }; struct kernel_struct { const uint32_t(*bin)[4]; uint32_t size; }; struct kernel_struct kernels_igd[] = { {ipicture_kernel_static, sizeof(ipicture_kernel_static)} , {null_kernel_static, sizeof(null_kernel_static)} , {frame_forward_igd_kernel_static, sizeof(frame_forward_igd_kernel_static)} , {frame_backward_igd_kernel_static, sizeof(frame_backward_igd_kernel_static)} , {frame_f_b_igd_kernel_static, sizeof(frame_f_b_igd_kernel_static)} , {field_forward_igd_kernel_static, sizeof(field_forward_igd_kernel_static)} , {field_backward_igd_kernel_static, sizeof(field_backward_igd_kernel_static)} , {field_f_b_igd_kernel_static, sizeof(field_f_b_igd_kernel_static)} , {dual_prime_igd_kernel_static, sizeof(dual_prime_igd_kernel_static)} }; struct kernel_struct kernels_965[] = { {ipicture_kernel_static, sizeof(ipicture_kernel_static)} , {null_kernel_static, sizeof(null_kernel_static)} , {frame_forward_kernel_static, sizeof(frame_forward_kernel_static)} , {frame_backward_kernel_static, sizeof(frame_backward_kernel_static)} , {frame_f_b_kernel_static, sizeof(frame_f_b_kernel_static)} , {field_forward_kernel_static, sizeof(field_forward_kernel_static)} , {field_backward_kernel_static, sizeof(field_backward_kernel_static)} , {field_f_b_kernel_static, sizeof(field_f_b_kernel_static)} , {dual_prime_kernel_static, sizeof(dual_prime_kernel_static)} }; #define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) #define MAX_SURFACE_NUM 10 #define DESCRIPTOR_NUM 12 struct media_kernel_obj { dri_bo *bo; }; struct interface_descriptor_obj { dri_bo *bo; struct media_kernel_obj kernels[DESCRIPTOR_NUM]; }; struct vfe_state_obj { dri_bo *bo; struct interface_descriptor_obj interface; }; struct surface_obj { dri_bo *bo; }; struct surface_state_obj { struct surface_obj surface; dri_bo *bo; }; struct binding_table_obj { dri_bo *bo; struct surface_state_obj surface_states[MAX_SURFACE_NUM]; }; struct indirect_data_obj { dri_bo *bo; }; struct media_state { unsigned int is_g4x:1; unsigned int is_965_q:1; struct vfe_state_obj vfe_state; struct binding_table_obj binding_table; struct indirect_data_obj indirect_data; }; struct media_state media_state; static void free_object(struct media_state *s) { int i; #define FREE_ONE_BO(bo) drm_intel_bo_unreference(bo) FREE_ONE_BO(s->vfe_state.bo); FREE_ONE_BO(s->vfe_state.interface.bo); for (i = 0; i < DESCRIPTOR_NUM; i++) FREE_ONE_BO(s->vfe_state.interface.kernels[i].bo); FREE_ONE_BO(s->binding_table.bo); for (i = 0; i < MAX_SURFACE_NUM; i++) FREE_ONE_BO(s->binding_table.surface_states[i].bo); FREE_ONE_BO(s->indirect_data.bo); } static int alloc_object(struct media_state *s) { int i; for (i = 0; i < MAX_SURFACE_NUM; i++) { s->binding_table.surface_states[i].bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state", sizeof(struct brw_surface_state), 0x1000); if (!s->binding_table.surface_states[i].bo) goto out; } return 0; out: free_object(s); return BadAlloc; } static Status destroy_context(Display * display, XvMCContext * context) { struct intel_xvmc_context *intel_ctx; intel_ctx = context->privData; free(intel_ctx->hw); free(intel_ctx); return Success; } #define STRIDE(w) (w) #define SIZE_YUV420(w, h) (h * (STRIDE(w) + STRIDE(w >> 1))) static void flush() { struct brw_mi_flush flush; memset(&flush, 0, sizeof(flush)); flush.opcode = CMD_MI_FLUSH; flush.flags = (1 << 1); BATCH_STRUCT(flush); } static void clear_sf_state() { struct brw_sf_unit_state sf; memset(&sf, 0, sizeof(sf)); /* TODO */ } /* urb fence must be aligned to cacheline */ static void align_urb_fence() { BATCH_LOCALS; int i, offset_to_next_cacheline; unsigned long batch_offset; BEGIN_BATCH(3); batch_offset = (void *)batch_ptr - xvmc_driver->alloc.ptr; offset_to_next_cacheline = ALIGN(batch_offset, 64) - batch_offset; if (offset_to_next_cacheline <= 12 && offset_to_next_cacheline != 0) { for (i = 0; i < offset_to_next_cacheline / 4; i++) OUT_BATCH(0); ADVANCE_BATCH(); } } /* setup urb layout for media */ static void urb_layout() { BATCH_LOCALS; align_urb_fence(); BEGIN_BATCH(3); OUT_BATCH(BRW_URB_FENCE | UF0_VFE_REALLOC | UF0_CS_REALLOC | UF0_SF_REALLOC | UF0_CLIP_REALLOC | UF0_GS_REALLOC | UF0_VS_REALLOC | 1); OUT_BATCH((0 << UF1_CLIP_FENCE_SHIFT) | (0 << UF1_GS_FENCE_SHIFT) | (0 << UF1_VS_FENCE_SHIFT)); OUT_BATCH(((URB_SIZE) << UF2_VFE_FENCE_SHIFT) | /* VFE_SIZE */ ((URB_SIZE) << UF2_CS_FENCE_SHIFT)); /* CS_SIZE is 0 */ ADVANCE_BATCH(); } static void media_state_pointers(struct media_state *media_state) { BATCH_LOCALS; BEGIN_BATCH(3); OUT_BATCH(BRW_MEDIA_STATE_POINTERS | 1); OUT_BATCH(0); OUT_RELOC(media_state->vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0); ADVANCE_BATCH(); } /* setup 2D surface for media_read or media_write */ static Status setup_media_surface(struct media_state *media_state, int surface_num, dri_bo * bo, unsigned long offset, int w, int h, Bool write) { struct brw_surface_state s, *ss = &s; memset(ss, 0, sizeof(struct brw_surface_state)); ss->ss0.surface_type = BRW_SURFACE_2D; ss->ss0.surface_format = BRW_SURFACEFORMAT_R8_SINT; ss->ss1.base_addr = offset + bo->offset; ss->ss2.width = w - 1; ss->ss2.height = h - 1; ss->ss3.pitch = w - 1; if (media_state->binding_table.surface_states[surface_num].bo) drm_intel_bo_unreference(media_state-> binding_table.surface_states [surface_num].bo); media_state->binding_table.surface_states[surface_num].bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state", sizeof(struct brw_surface_state), 0x1000); if (!media_state->binding_table.surface_states[surface_num].bo) return BadAlloc; drm_intel_bo_subdata(media_state-> binding_table.surface_states[surface_num].bo, 0, sizeof(*ss), ss); drm_intel_bo_emit_reloc(media_state-> binding_table.surface_states[surface_num].bo, offsetof(struct brw_surface_state, ss1), bo, offset, I915_GEM_DOMAIN_RENDER, write ? I915_GEM_DOMAIN_RENDER : 0); return Success; } static Status setup_surfaces(struct media_state *media_state, dri_bo * dst_bo, dri_bo * past_bo, dri_bo * future_bo, int w, int h) { Status ret; ret = setup_media_surface(media_state, 0, dst_bo, 0, w, h, TRUE); if (ret != Success) return ret; ret = setup_media_surface(media_state, 1, dst_bo, w * h, w / 2, h / 2, TRUE); if (ret != Success) return ret; ret = setup_media_surface(media_state, 2, dst_bo, w * h + w * h / 4, w / 2, h / 2, TRUE); if (ret != Success) return ret; if (past_bo) { ret = setup_media_surface(media_state, 4, past_bo, 0, w, h, FALSE); if (ret != Success) return ret; ret = setup_media_surface(media_state, 5, past_bo, w * h, w / 2, h / 2, FALSE); if (ret != Success) return ret; ret = setup_media_surface(media_state, 6, past_bo, w * h + w * h / 4, w / 2, h / 2, FALSE); if (ret != Success) return ret; } if (future_bo) { ret = setup_media_surface(media_state, 7, future_bo, 0, w, h, FALSE); if (ret != Success) return ret; ret = setup_media_surface(media_state, 8, future_bo, w * h, w / 2, h / 2, FALSE); if (ret != Success) return ret; ret = setup_media_surface(media_state, 9, future_bo, w * h + w * h / 4, w / 2, h / 2, FALSE); if (ret != Success) return ret; } return Success; } /* BUFFER SURFACE has a strange format * the size of the surface is in part of w h and d component */ static Status setup_blocks(struct media_state *media_state, unsigned int block_size) { union element { struct { unsigned int w:7; unsigned int h:13; unsigned int d:7; unsigned int pad:7; } whd; unsigned int size; } e; struct brw_surface_state ss; memset(&ss, 0, sizeof(struct brw_surface_state)); ss.ss0.surface_type = BRW_SURFACE_BUFFER; ss.ss0.surface_format = BRW_SURFACEFORMAT_R8_UINT; ss.ss1.base_addr = media_state->indirect_data.bo->offset; e.size = block_size - 1; ss.ss2.width = e.whd.w; ss.ss2.height = e.whd.h; ss.ss3.depth = e.whd.d; ss.ss3.pitch = block_size - 1; if (media_state->binding_table.surface_states[3].bo) drm_intel_bo_unreference(media_state-> binding_table.surface_states[3].bo); media_state->binding_table.surface_states[3].bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state", sizeof(struct brw_surface_state), 0x1000); if (!media_state->binding_table.surface_states[3].bo) return BadAlloc; drm_intel_bo_subdata(media_state->binding_table.surface_states[3].bo, 0, sizeof(ss), &ss); drm_intel_bo_emit_reloc(media_state->binding_table.surface_states[3].bo, offsetof(struct brw_surface_state, ss1), media_state->indirect_data.bo, 0, I915_GEM_DOMAIN_SAMPLER, 0); return Success; } /* setup state base address */ static void state_base_address() { BATCH_LOCALS; BEGIN_BATCH(6); OUT_BATCH(BRW_STATE_BASE_ADDRESS | 4); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0 | BASE_ADDRESS_MODIFY); OUT_BATCH(0xFFFFF000 | BASE_ADDRESS_MODIFY); ADVANCE_BATCH(); } /* select media pipeline */ static void pipeline_select(struct media_state *media_state) { BATCH_LOCALS; BEGIN_BATCH(1); if (media_state->is_g4x) OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); else OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA); ADVANCE_BATCH(); } /* kick media object to gpu */ static void send_media_object(XvMCMacroBlock * mb, int offset, enum interface interface) { BATCH_LOCALS; BEGIN_BATCH(13); OUT_BATCH(BRW_MEDIA_OBJECT | 11); OUT_BATCH(interface); if (media_state.is_965_q) { OUT_BATCH(0); OUT_BATCH(0); } else { OUT_BATCH(6 * 128); OUT_RELOC(media_state.indirect_data.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, offset); } OUT_BATCH(mb->x << 4); //g1.0 OUT_BATCH(mb->y << 4); OUT_RELOC(media_state.indirect_data.bo, //g1.8 I915_GEM_DOMAIN_INSTRUCTION, 0, offset); OUT_BATCH_SHORT(mb->coded_block_pattern); //g1.12 OUT_BATCH_SHORT(mb->PMV[0][0][0]); //g1.14 OUT_BATCH_SHORT(mb->PMV[0][0][1]); //g1.16 OUT_BATCH_SHORT(mb->PMV[0][1][0]); //g1.18 OUT_BATCH_SHORT(mb->PMV[0][1][1]); //g1.20 OUT_BATCH_SHORT(mb->PMV[1][0][0]); //g1.22 OUT_BATCH_SHORT(mb->PMV[1][0][1]); //g1.24 OUT_BATCH_SHORT(mb->PMV[1][1][0]); //g1.26 OUT_BATCH_SHORT(mb->PMV[1][1][1]); //g1.28 OUT_BATCH_CHAR(mb->dct_type); //g1.30 OUT_BATCH_CHAR(mb->motion_vertical_field_select); //g1.31 if (media_state.is_965_q) OUT_BATCH(0x0); else OUT_BATCH(0xffffffff); ADVANCE_BATCH(); } static Status binding_tables(struct media_state *media_state) { unsigned int binding_table[MAX_SURFACE_NUM]; int i; if (media_state->binding_table.bo) drm_intel_bo_unreference(media_state->binding_table.bo); media_state->binding_table.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "binding_table", MAX_SURFACE_NUM * 4, 0x1000); if (!media_state->binding_table.bo) return BadAlloc; for (i = 0; i < MAX_SURFACE_NUM; i++) binding_table[i] = media_state->binding_table.surface_states[i].bo->offset; drm_intel_bo_subdata(media_state->binding_table.bo, 0, sizeof(binding_table), binding_table); for (i = 0; i < MAX_SURFACE_NUM; i++) drm_intel_bo_emit_reloc(media_state->binding_table.bo, i * sizeof(unsigned int), media_state-> binding_table.surface_states[i].bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0); return Success; } static int media_kernels(struct media_state *media_state) { struct kernel_struct *kernels; int kernel_array_size, i; if (media_state->is_g4x) { kernels = kernels_igd; kernel_array_size = ARRAY_SIZE(kernels_igd); } else { kernels = kernels_965; kernel_array_size = ARRAY_SIZE(kernels_965); } for (i = 0; i < kernel_array_size; i++) { media_state->vfe_state.interface.kernels[i].bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "kernel", kernels[i].size, 0x1000); if (!media_state->vfe_state.interface.kernels[i].bo) goto out; } for (i = 0; i < kernel_array_size; i++) { dri_bo *bo = media_state->vfe_state.interface.kernels[i].bo; drm_intel_bo_subdata(bo, 0, kernels[i].size, kernels[i].bin); } return 0; out: free_object(media_state); return BadAlloc; } static void setup_interface(struct media_state *media_state, enum interface i) { struct brw_interface_descriptor desc; memset(&desc, 0, sizeof(desc)); desc.desc0.grf_reg_blocks = 15; desc.desc0.kernel_start_pointer = media_state->vfe_state.interface.kernels[i].bo->offset >> 6; desc.desc1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754; /* use same binding table for all interface * may change this if it affect performance */ desc.desc3.binding_table_entry_count = MAX_SURFACE_NUM; desc.desc3.binding_table_pointer = media_state->binding_table.bo->offset >> 5; drm_intel_bo_subdata(media_state->vfe_state.interface.bo, i * sizeof(desc), sizeof(desc), &desc); drm_intel_bo_emit_reloc(media_state->vfe_state.interface.bo, i * sizeof(desc) + offsetof(struct brw_interface_descriptor, desc0), media_state->vfe_state.interface.kernels[i].bo, desc.desc0.grf_reg_blocks, I915_GEM_DOMAIN_INSTRUCTION, 0); drm_intel_bo_emit_reloc(media_state->vfe_state.interface.bo, i * sizeof(desc) + offsetof(struct brw_interface_descriptor, desc3), media_state->binding_table.bo, desc.desc3.binding_table_entry_count, I915_GEM_DOMAIN_INSTRUCTION, 0); } static Status interface_descriptor(struct media_state *media_state) { if (media_state->vfe_state.interface.bo) drm_intel_bo_unreference(media_state->vfe_state.interface.bo); media_state->vfe_state.interface.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "interfaces", DESCRIPTOR_NUM * sizeof(struct brw_interface_descriptor), 0x1000); if (!media_state->vfe_state.interface.bo) return BadAlloc; setup_interface(media_state, INTRA_INTERFACE); setup_interface(media_state, NULL_INTERFACE); setup_interface(media_state, FORWARD_INTERFACE); setup_interface(media_state, FIELD_FORWARD_INTERFACE); setup_interface(media_state, BACKWARD_INTERFACE); setup_interface(media_state, FIELD_BACKWARD_INTERFACE); setup_interface(media_state, F_B_INTERFACE); setup_interface(media_state, FIELD_F_B_INTERFACE); setup_interface(media_state, DUAL_PRIME_INTERFACE); return Success; } static Status vfe_state(struct media_state *media_state) { struct brw_vfe_state state; memset(&state, 0, sizeof(state)); /* no scratch space */ state.vfe1.vfe_mode = VFE_GENERIC_MODE; state.vfe1.num_urb_entries = 1; /* XXX TODO */ /* should carefully caculate those values for performance */ state.vfe1.urb_entry_alloc_size = 2; state.vfe1.max_threads = 31; state.vfe2.interface_descriptor_base = media_state->vfe_state.interface.bo->offset >> 4; if (media_state->vfe_state.bo) drm_intel_bo_unreference(media_state->vfe_state.bo); media_state->vfe_state.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "vfe state", sizeof(struct brw_vfe_state), 0x1000); if (!media_state->vfe_state.bo) return BadAlloc; drm_intel_bo_subdata(media_state->vfe_state.bo, 0, sizeof(state), &state); drm_intel_bo_emit_reloc(media_state->vfe_state.bo, offsetof(struct brw_vfe_state, vfe2), media_state->vfe_state.interface.bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0); return Success; } static Status render_surface(Display * display, XvMCContext * context, unsigned int picture_structure, XvMCSurface * target_surface, XvMCSurface * past_surface, XvMCSurface * future_surface, unsigned int flags, unsigned int num_macroblocks, unsigned int first_macroblock, XvMCMacroBlockArray * macroblock_array, XvMCBlockArray * blocks) { intel_xvmc_context_ptr intel_ctx; int i, j; struct i965_xvmc_context *i965_ctx; XvMCMacroBlock *mb; struct intel_xvmc_surface *priv_target_surface = target_surface->privData; struct intel_xvmc_surface *priv_past_surface = past_surface ? past_surface->privData : 0; struct intel_xvmc_surface *priv_future_surface = future_surface ? future_surface->privData : 0; unsigned short *block_ptr; intel_ctx = context->privData; i965_ctx = context->privData; if (!intel_ctx) { XVMC_ERR("Can't find intel xvmc context\n"); return BadValue; } if (media_state.indirect_data.bo) { drm_intel_gem_bo_unmap_gtt(media_state. indirect_data.bo); drm_intel_bo_unreference(media_state.indirect_data.bo); } media_state.indirect_data.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "indirect data", 128 * 6 * num_macroblocks, 64); if (!media_state.indirect_data.bo) return BadAlloc; setup_surfaces(&media_state, priv_target_surface->bo, past_surface ? priv_past_surface->bo : NULL, future_surface ? priv_future_surface->bo : NULL, context->width, context->height); setup_blocks(&media_state, 128 * 6 * num_macroblocks); binding_tables(&media_state); interface_descriptor(&media_state); vfe_state(&media_state); drm_intel_gem_bo_map_gtt(media_state.indirect_data.bo); block_ptr = media_state.indirect_data.bo->virtual; for (i = first_macroblock; i < num_macroblocks + first_macroblock; i++) { unsigned short *mb_block_ptr; mb = ¯oblock_array->macro_blocks[i]; mb_block_ptr = &blocks->blocks[(mb->index << 6)]; if (mb->coded_block_pattern & 0x20) { for (j = 0; j < 8; j++) memcpy(block_ptr + 16 * j, mb_block_ptr + 8 * j, 16); mb_block_ptr += 64; } if (mb->coded_block_pattern & 0x10) { for (j = 0; j < 8; j++) memcpy(block_ptr + 16 * j + 8, mb_block_ptr + 8 * j, 16); mb_block_ptr += 64; } block_ptr += 2 * 64; if (mb->coded_block_pattern & 0x08) { for (j = 0; j < 8; j++) memcpy(block_ptr + 16 * j, mb_block_ptr + 8 * j, 16); mb_block_ptr += 64; } if (mb->coded_block_pattern & 0x04) { for (j = 0; j < 8; j++) memcpy(block_ptr + 16 * j + 8, mb_block_ptr + 8 * j, 16); mb_block_ptr += 64; } block_ptr += 2 * 64; if (mb->coded_block_pattern & 0x2) { memcpy(block_ptr, mb_block_ptr, 128); mb_block_ptr += 64; } block_ptr += 64; if (mb->coded_block_pattern & 0x1) memcpy(block_ptr, mb_block_ptr, 128); block_ptr += 64; } { int block_offset = 0; LOCK_HARDWARE(intel_ctx->hw_context); state_base_address(); flush(); clear_sf_state(); pipeline_select(&media_state); urb_layout(); media_state_pointers(&media_state); for (i = first_macroblock; i < num_macroblocks + first_macroblock; i++, block_offset += 128 * 6) { mb = ¯oblock_array->macro_blocks[i]; if (mb->macroblock_type & XVMC_MB_TYPE_INTRA) { send_media_object(mb, block_offset, INTRA_INTERFACE); } else { if (((mb->motion_type & 3) == XVMC_PREDICTION_FRAME)) { if ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD)) { if (((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD))) send_media_object(mb, block_offset, F_B_INTERFACE); else send_media_object(mb, block_offset, FORWARD_INTERFACE); } else if ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD)) { send_media_object(mb, block_offset, BACKWARD_INTERFACE); } } else if ((mb->motion_type & 3) == XVMC_PREDICTION_FIELD) { if ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD)) { if (((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD))) send_media_object(mb, block_offset, FIELD_F_B_INTERFACE); else send_media_object(mb, block_offset, FIELD_FORWARD_INTERFACE); } else if ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD)) { send_media_object(mb, block_offset, FIELD_BACKWARD_INTERFACE); } } else { send_media_object(mb, block_offset, DUAL_PRIME_INTERFACE); } } } intelFlushBatch(); UNLOCK_HARDWARE(intel_ctx->hw_context); } return Success; } static Status create_context(Display * display, XvMCContext * context, int priv_count, CARD32 * priv_data) { struct intel_xvmc_context *intel_ctx; struct intel_xvmc_hw_context *hw_ctx; hw_ctx = (struct intel_xvmc_hw_context *)priv_data; intel_ctx = calloc(1, sizeof(struct intel_xvmc_context)); if (!intel_ctx) return BadAlloc; intel_ctx->hw = hw_ctx; intel_ctx->surface_bo_size = SIZE_YUV420(context->width, context->height); context->privData = intel_ctx; media_state.is_g4x = hw_ctx->i965.is_g4x; media_state.is_965_q = hw_ctx->i965.is_965_q; if (alloc_object(&media_state)) return BadAlloc; if (media_kernels(&media_state)) return BadAlloc; return Success; } struct _intel_xvmc_driver i965_xvmc_mc_driver = { .type = XVMC_I965_MPEG2_MC, .create_context = create_context, .destroy_context = destroy_context, .render_surface = render_surface, }; xf86-video-intel-2.99.917/xvmc/i915_reg.h0000664000175000017500000007762612400044327014417 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef _I915_REG_H_ #define _I915_REG_H_ #define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value) #define CMD_3D (0x3<<29) #define PRIM3D (CMD_3D | (0x1f<<24)) #define PRIM3D_INDIRECT_SEQUENTIAL ((1<<23) | (0<<17)) #define PRIM3D_TRILIST (PRIM3D | (0x0<<18)) #define PRIM3D_TRISTRIP (PRIM3D | (0x1<<18)) #define PRIM3D_TRISTRIP_RVRSE (PRIM3D | (0x2<<18)) #define PRIM3D_TRIFAN (PRIM3D | (0x3<<18)) #define PRIM3D_POLY (PRIM3D | (0x4<<18)) #define PRIM3D_LINELIST (PRIM3D | (0x5<<18)) #define PRIM3D_LINESTRIP (PRIM3D | (0x6<<18)) #define PRIM3D_RECTLIST (PRIM3D | (0x7<<18)) #define PRIM3D_POINTLIST (PRIM3D | (0x8<<18)) #define PRIM3D_DIB (PRIM3D | (0x9<<18)) #define PRIM3D_CLEAR_RECT (PRIM3D | (0xa<<18)) #define PRIM3D_ZONE_INIT (PRIM3D | (0xd<<18)) #define PRIM3D_MASK (0x1f<<18) /* p137 */ #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) #define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) #define AA_LINE_ECAAR_WIDTH_0_5 0 #define AA_LINE_ECAAR_WIDTH_1_0 (1<<14) #define AA_LINE_ECAAR_WIDTH_2_0 (2<<14) #define AA_LINE_ECAAR_WIDTH_4_0 (3<<14) #define AA_LINE_REGION_WIDTH_ENABLE (1<<8) #define AA_LINE_REGION_WIDTH_0_5 0 #define AA_LINE_REGION_WIDTH_1_0 (1<<6) #define AA_LINE_REGION_WIDTH_2_0 (2<<6) #define AA_LINE_REGION_WIDTH_4_0 (3<<6) /* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/ #define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24)) #define BFO_ENABLE_STENCIL_REF (1<<23) #define BFO_STENCIL_REF_SHIFT 15 #define BFO_STENCIL_REF_MASK (0xff<<15) #define BFO_ENABLE_STENCIL_FUNCS (1<<14) #define BFO_STENCIL_TEST_SHIFT 11 #define BFO_STENCIL_TEST_MASK (0x7<<11) #define BFO_STENCIL_FAIL_SHIFT 8 #define BFO_STENCIL_FAIL_MASK (0x7<<8) #define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5 #define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5) #define BFO_STENCIL_PASS_Z_PASS_SHIFT 2 #define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2) #define BFO_ENABLE_STENCIL_TWO_SIDE (1<<1) #define BFO_STENCIL_TWO_SIDE (1<<0) /* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */ #define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24)) #define BFM_ENABLE_STENCIL_TEST_MASK (1<<17) #define BFM_ENABLE_STENCIL_WRITE_MASK (1<<16) #define BFM_STENCIL_TEST_MASK_SHIFT 8 #define BFM_STENCIL_TEST_MASK_MASK (0xff<<8) #define BFM_STENCIL_WRITE_MASK_SHIFT 0 #define BFM_STENCIL_WRITE_MASK_MASK (0xff<<0) /* 3DSTATE_BIN_CONTROL p141 */ /* p143 */ #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) /* Dword 1 */ #define BUF_3D_ID_COLOR_BACK (0x3<<24) #define BUF_3D_ID_DEPTH (0x7<<24) #define BUF_3D_USE_FENCE (1<<23) #define BUF_3D_TILED_SURFACE (1<<22) #define BUF_3D_TILE_WALK_X 0 #define BUF_3D_TILE_WALK_Y (1<<21) #define BUF_3D_PITCH(x) (((x)/4)<<2) /* Dword 2 */ #define BUF_3D_ADDR(x) ((x) & ~0x3) /* 3DSTATE_CHROMA_KEY */ /* 3DSTATE_CLEAR_PARAMETERS, p150 */ #define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5) /* Dword 1 */ #define CLEARPARAM_CLEAR_RECT (1 << 16) #define CLEARPARAM_ZONE_INIT (0 << 16) #define CLEARPARAM_WRITE_COLOR (1 << 2) #define CLEARPARAM_WRITE_DEPTH (1 << 1) #define CLEARPARAM_WRITE_STENCIL (1 << 0) /* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */ #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) /* 3DSTATE_COORD_SET_BINDINGS, p154 */ #define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24)) #define CSB_TCB(iunit, eunit) ((eunit)<<(iunit*3)) /* p156 */ #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) /* p157 */ #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) /* p158 */ #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) /* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */ #define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16)) /* scale in dword 1 */ /* The depth subrectangle is not supported, but must be disabled. */ /* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */ #define _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<<19) | (1 << 1) | (0 << 0)) /* p161 */ #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) /* Dword 1 */ #define TEX_DEFAULT_COLOR_OGL (0<<30) #define TEX_DEFAULT_COLOR_D3D (1<<30) #define ZR_EARLY_DEPTH (1<<29) #define LOD_PRECLAMP_OGL (1<<28) #define LOD_PRECLAMP_D3D (0<<28) #define DITHER_FULL_ALWAYS (0<<26) #define DITHER_FULL_ON_FB_BLEND (1<<26) #define DITHER_CLAMPED_ALWAYS (2<<26) #define LINEAR_GAMMA_BLEND_32BPP (1<<25) #define DEBUG_DISABLE_ENH_DITHER (1<<24) #define DSTORG_HORT_BIAS(x) ((x)<<20) #define DSTORG_VERT_BIAS(x) ((x)<<16) #define COLOR_4_2_2_CHNL_WRT_ALL 0 #define COLOR_4_2_2_CHNL_WRT_Y (1<<12) #define COLOR_4_2_2_CHNL_WRT_CR (2<<12) #define COLOR_4_2_2_CHNL_WRT_CB (3<<12) #define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) #define COLR_BUF_8BIT 0 #define COLR_BUF_RGB555 (1<<8) #define COLR_BUF_RGB565 (2<<8) #define COLR_BUF_ARGB8888 (3<<8) #define COLR_BUF_ARGB4444 (8<<8) #define COLR_BUF_ARGB1555 (9<<8) #define COLR_BUF_ARGB2AAA (0xa<<8) #define DEPTH_FRMT_16_FIXED 0 #define DEPTH_FRMT_16_FLOAT (1<<2) #define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) #define VERT_LINE_STRIDE_1 (1<<1) #define VERT_LINE_STRIDE_0 (0<<1) #define VERT_LINE_STRIDE_OFS_1 1 #define VERT_LINE_STRIDE_OFS_0 0 /* p166 */ #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) /* Dword 1 */ #define DRAW_RECT_DIS_DEPTH_OFS (1<<30) #define DRAW_DITHER_OFS_X(x) ((x)<<26) #define DRAW_DITHER_OFS_Y(x) ((x)<<24) /* Dword 2 */ #define DRAW_YMIN(x) ((x)<<16) #define DRAW_XMIN(x) (x) /* Dword 3 */ #define DRAW_YMAX(x) ((x)<<16) #define DRAW_XMAX(x) (x) /* Dword 4 */ #define DRAW_YORG(x) ((x)<<16) #define DRAW_XORG(x) (x) /* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */ /* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */ /* _3DSTATE_FOG_COLOR, p173 */ #define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) #define FOG_COLOR_RED(x) ((x)<<16) #define FOG_COLOR_GREEN(x) ((x)<<8) #define FOG_COLOR_BLUE(x) (x) /* _3DSTATE_FOG_MODE, p174 */ #define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) /* Dword 1 */ #define FMC1_FOGFUNC_MODIFY_ENABLE (1<<31) #define FMC1_FOGFUNC_VERTEX (0<<28) #define FMC1_FOGFUNC_PIXEL_EXP (1<<28) #define FMC1_FOGFUNC_PIXEL_EXP2 (2<<28) #define FMC1_FOGFUNC_PIXEL_LINEAR (3<<28) #define FMC1_FOGFUNC_MASK (3<<28) #define FMC1_FOGINDEX_MODIFY_ENABLE (1<<27) #define FMC1_FOGINDEX_Z (0<<25) #define FMC1_FOGINDEX_W (1<<25) #define FMC1_C1_C2_MODIFY_ENABLE (1<<24) #define FMC1_DENSITY_MODIFY_ENABLE (1<<23) #define FMC1_C1_ONE (1<<13) #define FMC1_C1_MASK (0xffff<<4) /* Dword 2 */ #define FMC2_C2_ONE (1<<16) /* Dword 3 */ #define FMC3_D_ONE (1<<16) /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */ #define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) #define IAB_MODIFY_ENABLE (1<<23) #define IAB_ENABLE (1<<22) #define IAB_MODIFY_FUNC (1<<21) #define IAB_FUNC_SHIFT 16 #define IAB_MODIFY_SRC_FACTOR (1<<11) #define IAB_SRC_FACTOR_SHIFT 6 #define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6) #define IAB_MODIFY_DST_FACTOR (1<<5) #define IAB_DST_FACTOR_SHIFT 0 #define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0) #define BLENDFACT_ZERO 0x01 #define BLENDFACT_ONE 0x02 #define BLENDFACT_SRC_COLR 0x03 #define BLENDFACT_INV_SRC_COLR 0x04 #define BLENDFACT_SRC_ALPHA 0x05 #define BLENDFACT_INV_SRC_ALPHA 0x06 #define BLENDFACT_DST_ALPHA 0x07 #define BLENDFACT_INV_DST_ALPHA 0x08 #define BLENDFACT_DST_COLR 0x09 #define BLENDFACT_INV_DST_COLR 0x0a #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b #define BLENDFACT_CONST_COLOR 0x0c #define BLENDFACT_INV_CONST_COLOR 0x0d #define BLENDFACT_CONST_ALPHA 0x0e #define BLENDFACT_INV_CONST_ALPHA 0x0f #define BLENDFACT_MASK 0x0f #define BLENDFUNC_ADD 0x0 #define BLENDFUNC_SUBTRACT 0x1 #define BLENDFUNC_REVERSE_SUBTRACT 0x2 #define BLENDFUNC_MIN 0x3 #define BLENDFUNC_MAX 0x4 #define BLENDFUNC_MASK 0x7 /* 3DSTATE_LOAD_INDIRECT, p180 */ #define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16)) #define LI0_STATE_STATIC_INDIRECT (0x01<<8) #define LI0_STATE_DYNAMIC_INDIRECT (0x02<<8) #define LI0_STATE_SAMPLER (0x04<<8) #define LI0_STATE_MAP (0x08<<8) #define LI0_STATE_PROGRAM (0x10<<8) #define LI0_STATE_CONSTANTS (0x20<<8) #define SIS0_BUFFER_ADDRESS(x) ((x)&~0x3) #define SIS0_FORCE_LOAD (1<<1) #define SIS0_BUFFER_VALID (1<<0) #define SIS1_BUFFER_LENGTH(x) ((x)&0xff) #define DIS0_BUFFER_ADDRESS(x) ((x)&~0x3) #define DIS0_BUFFER_RESET (1<<1) #define DIS0_BUFFER_VALID (1<<0) #define SSB0_BUFFER_ADDRESS(x) ((x)&~0x3) #define SSB0_FORCE_LOAD (1<<1) #define SSB0_BUFFER_VALID (1<<0) #define SSB1_BUFFER_LENGTH(x) ((x)&0xff) #define MSB0_BUFFER_ADDRESS(x) ((x)&~0x3) #define MSB0_FORCE_LOAD (1<<1) #define MSB0_BUFFER_VALID (1<<0) #define MSB1_BUFFER_LENGTH(x) ((x)&0xff) #define PSP0_BUFFER_ADDRESS(x) ((x)&~0x3) #define PSP0_FORCE_LOAD (1<<1) #define PSP0_BUFFER_VALID (1<<0) #define PSP1_BUFFER_LENGTH(x) ((x)&0xff) #define PSC0_BUFFER_ADDRESS(x) ((x)&~0x3) #define PSC0_FORCE_LOAD (1<<1) #define PSC0_BUFFER_VALID (1<<0) #define PSC1_BUFFER_LENGTH(x) ((x)&0xff) /* _3DSTATE_RASTERIZATION_RULES */ #define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) #define ENABLE_POINT_RASTER_RULE (1<<15) #define OGL_POINT_RASTER_RULE (1<<13) #define ENABLE_TEXKILL_3D_4D (1<<10) #define TEXKILL_3D (0<<9) #define TEXKILL_4D (1<<9) #define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) #define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) #define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) #define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) /* _3DSTATE_SCISSOR_ENABLE, p256 */ #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) #define ENABLE_SCISSOR_RECT ((1<<1) | 1) #define DISABLE_SCISSOR_RECT (1<<1) /* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */ #define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) /* Dword 1 */ #define SCISSOR_RECT_0_YMIN(x) ((x)<<16) #define SCISSOR_RECT_0_XMIN(x) (x) /* Dword 2 */ #define SCISSOR_RECT_0_YMAX(x) ((x)<<16) #define SCISSOR_RECT_0_XMAX(x) (x) /* p189 */ #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16)) #define I1_LOAD_S(n) (1<<(4+n)) #define S0_VB_OFFSET_MASK 0xffffffc #define S0_AUTO_CACHE_INV_DISABLE (1<<0) #define S1_VERTEX_WIDTH_SHIFT 24 #define S1_VERTEX_WIDTH_MASK (0x3f<<24) #define S1_VERTEX_PITCH_SHIFT 16 #define S1_VERTEX_PITCH_MASK (0x3f<<16) #define TEXCOORDFMT_2D 0x0 #define TEXCOORDFMT_3D 0x1 #define TEXCOORDFMT_4D 0x2 #define TEXCOORDFMT_1D 0x3 #define TEXCOORDFMT_2D_16 0x4 #define TEXCOORDFMT_4D_16 0x5 #define TEXCOORDFMT_NOT_PRESENT 0xf #define S2_TEXCOORD_FMT0_MASK 0xf #define S2_TEXCOORD_FMT1_SHIFT 4 #define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4)) #define S2_TEXCOORD_NONE (~0) #define TEXCOORD_WRAP_SHORTEST_TCX 8 #define TEXCOORD_WRAP_SHORTEST_TCY 4 #define TEXCOORD_WRAP_SHORTEST_TCZ 2 #define TEXCOORD_PERSPECTIVE_DISABLE 1 #define S3_WRAP_SHORTEST_TCX(unit) (TEXCOORD_WRAP_SHORTEST_TCX << ((unit) * 4)) #define S3_WRAP_SHORTEST_TCY(unit) (TEXCOORD_WRAP_SHORTEST_TCY << ((unit) * 4)) #define S3_WRAP_SHORTEST_TCZ(unit) (TEXCOORD_WRAP_SHORTEST_TCZ << ((unit) * 4)) #define S3_PERSPECTIVE_DISABLE(unit) (TEXCOORD_PERSPECTIVE_DISABLE << ((unit) * 4)) /* S3 not interesting */ #define S4_POINT_WIDTH_SHIFT 23 #define S4_POINT_WIDTH_MASK (0x1ff<<23) #define S4_LINE_WIDTH_SHIFT 19 #define S4_LINE_WIDTH_ONE (0x2<<19) #define S4_LINE_WIDTH_MASK (0xf<<19) #define S4_FLATSHADE_ALPHA (1<<18) #define S4_FLATSHADE_FOG (1<<17) #define S4_FLATSHADE_SPECULAR (1<<16) #define S4_FLATSHADE_COLOR (1<<15) #define S4_CULLMODE_BOTH (0<<13) #define S4_CULLMODE_NONE (1<<13) #define S4_CULLMODE_CW (2<<13) #define S4_CULLMODE_CCW (3<<13) #define S4_CULLMODE_MASK (3<<13) #define S4_VFMT_POINT_WIDTH (1<<12) #define S4_VFMT_SPEC_FOG (1<<11) #define S4_VFMT_COLOR (1<<10) #define S4_VFMT_DEPTH_OFFSET (1<<9) #define S4_VFMT_XYZ (1<<6) #define S4_VFMT_XYZW (2<<6) #define S4_VFMT_XY (3<<6) #define S4_VFMT_XYW (4<<6) #define S4_VFMT_XYZW_MASK (7<<6) #define S4_FORCE_DEFAULT_DIFFUSE (1<<5) #define S4_FORCE_DEFAULT_SPECULAR (1<<4) #define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3) #define S4_VFMT_FOG_PARAM (1<<2) #define S4_SPRITE_POINT_ENABLE (1<<1) #define S4_LINE_ANTIALIAS_ENABLE (1<<0) #define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \ S4_VFMT_SPEC_FOG | \ S4_VFMT_COLOR | \ S4_VFMT_DEPTH_OFFSET | \ S4_VFMT_XYZW_MASK | \ S4_VFMT_FOG_PARAM) #define S5_WRITEDISABLE_ALPHA (1<<31) #define S5_WRITEDISABLE_RED (1<<30) #define S5_WRITEDISABLE_GREEN (1<<29) #define S5_WRITEDISABLE_BLUE (1<<28) #define S5_WRITEDISABLE_MASK (0xf<<28) #define S5_FORCE_DEFAULT_POINT_SIZE (1<<27) #define S5_LAST_PIXEL_ENABLE (1<<26) #define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25) #define S5_FOG_ENABLE (1<<24) #define S5_STENCIL_REF_SHIFT 16 #define S5_STENCIL_REF_MASK (0xff<<16) #define S5_STENCIL_TEST_FUNC_SHIFT 13 #define S5_STENCIL_TEST_FUNC_MASK (0x7<<13) #define S5_STENCIL_FAIL_SHIFT 10 #define S5_STENCIL_FAIL_MASK (0x7<<10) #define S5_STENCIL_PASS_Z_FAIL_SHIFT 7 #define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7) #define S5_STENCIL_PASS_Z_PASS_SHIFT 4 #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) #define S5_STENCIL_WRITE_ENABLE (1<<3) #define S5_STENCIL_TEST_ENABLE (1<<2) #define S5_COLOR_DITHER_ENABLE (1<<1) #define S5_LOGICOP_ENABLE (1<<0) #define S6_ALPHA_TEST_ENABLE (1<<31) #define S6_ALPHA_TEST_FUNC_SHIFT 28 #define S6_ALPHA_TEST_FUNC_MASK (0x7<<28) #define S6_ALPHA_REF_SHIFT 20 #define S6_ALPHA_REF_MASK (0xff<<20) #define S6_DEPTH_TEST_ENABLE (1<<19) #define S6_DEPTH_TEST_FUNC_SHIFT 16 #define S6_DEPTH_TEST_FUNC_MASK (0x7<<16) #define S6_CBUF_BLEND_ENABLE (1<<15) #define S6_CBUF_BLEND_FUNC_SHIFT 12 #define S6_CBUF_BLEND_FUNC_MASK (0x7<<12) #define S6_CBUF_SRC_BLEND_FACT_SHIFT 8 #define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8) #define S6_CBUF_DST_BLEND_FACT_SHIFT 4 #define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4) #define S6_DEPTH_WRITE_ENABLE (1<<3) #define S6_COLOR_WRITE_ENABLE (1<<2) #define S6_TRISTRIP_PV_SHIFT 0 #define S6_TRISTRIP_PV_MASK (0x3<<0) #define S7_DEPTH_OFFSET_CONST_MASK ~0 /* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */ /* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */ /* _3DSTATE_MODES_4, p218 */ #define _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24)) #define ENABLE_LOGIC_OP_FUNC (1<<23) #define LOGIC_OP_FUNC(x) ((x)<<18) #define LOGICOP_MASK (0xf<<18) #define LOGICOP_COPY 0xc #define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) #define ENABLE_STENCIL_TEST_MASK (1<<17) #define STENCIL_TEST_MASK(x) ((x)<<8) #define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) #define ENABLE_STENCIL_WRITE_MASK (1<<16) #define STENCIL_WRITE_MASK(x) ((x)&0xff) /* _3DSTATE_MODES_5, p220 */ #define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) #define PIPELINE_FLUSH_RENDER_CACHE (1<<18) #define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16) /* p221 */ #define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16)) #define PS1_REG(n) (1<<(n)) #define PS2_CONST_X(n) (n) #define PS3_CONST_Y(n) (n) #define PS4_CONST_Z(n) (n) #define PS5_CONST_W(n) (n) /* p222 */ #define I915_MAX_TEX_INDIRECT 4 #define I915_MAX_TEX_INSN 32 #define I915_MAX_ALU_INSN 64 #define I915_MAX_DECL_INSN 27 #define I915_MAX_TEMPORARY 16 /* Each instruction is 3 dwords long, though most don't require all * this space. Maximum of 123 instructions. Smaller maxes per insn * type. */ #define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16)) #define REG_TYPE_R 0 /* temporary regs, no need to * dcl, must be written before * read -- Preserved between * phases. */ #define REG_TYPE_T 1 /* Interpolated values, must be * dcl'ed before use. * * 0..7: texture coord, * 8: diffuse spec, * 9: specular color, * 10: fog parameter in w. */ #define REG_TYPE_CONST 2 /* Restriction: only one const * can be referenced per * instruction, though it may be * selected for multiple inputs. * Constants not initialized * default to zero. */ #define REG_TYPE_S 3 /* sampler */ #define REG_TYPE_OC 4 /* output color (rgba) */ #define REG_TYPE_OD 5 /* output depth (w), xyz are * temporaries. If not written, * interpolated depth is used? */ #define REG_TYPE_U 6 /* unpreserved temporaries */ #define REG_TYPE_MASK 0x7 #define REG_NR_MASK 0xf /* REG_TYPE_T: */ #define T_TEX0 0 #define T_TEX1 1 #define T_TEX2 2 #define T_TEX3 3 #define T_TEX4 4 #define T_TEX5 5 #define T_TEX6 6 #define T_TEX7 7 #define T_DIFFUSE 8 #define T_SPECULAR 9 #define T_FOG_W 10 /* interpolated fog is in W coord */ /* Arithmetic instructions */ /* .replicate_swizzle == selection and replication of a particular * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww */ #define A0_NOP (0x0<<24) /* no operation */ #define A0_ADD (0x1<<24) /* dst = src0 + src1 */ #define A0_MOV (0x2<<24) /* dst = src0 */ #define A0_MUL (0x3<<24) /* dst = src0 * src1 */ #define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ #define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ #define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ #define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ #define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ #define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ #define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ #define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ #define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ #define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ #define A0_FLR (0x10<<24) /* dst = floor(src0) */ #define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ #define A0_TRC (0x12<<24) /* dst = int(src0) */ #define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ #define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ #define A0_DEST_SATURATE (1<<22) #define A0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ #define A0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define A0_DEST_CHANNEL_X (1<<10) #define A0_DEST_CHANNEL_Y (2<<10) #define A0_DEST_CHANNEL_Z (4<<10) #define A0_DEST_CHANNEL_W (8<<10) #define A0_DEST_CHANNEL_ALL (0xf<<10) #define A0_DEST_CHANNEL_SHIFT 10 #define A0_SRC0_TYPE_SHIFT 7 #define A0_SRC0_NR_SHIFT 2 #define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) #define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) #define SRC_X 0 #define SRC_Y 1 #define SRC_Z 2 #define SRC_W 3 #define SRC_ZERO 4 #define SRC_ONE 5 #define A1_SRC0_CHANNEL_X_NEGATE (1<<31) #define A1_SRC0_CHANNEL_X_SHIFT 28 #define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) #define A1_SRC0_CHANNEL_Y_SHIFT 24 #define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) #define A1_SRC0_CHANNEL_Z_SHIFT 20 #define A1_SRC0_CHANNEL_W_NEGATE (1<<19) #define A1_SRC0_CHANNEL_W_SHIFT 16 #define A1_SRC1_TYPE_SHIFT 13 #define A1_SRC1_NR_SHIFT 8 #define A1_SRC1_CHANNEL_X_NEGATE (1<<7) #define A1_SRC1_CHANNEL_X_SHIFT 4 #define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) #define A1_SRC1_CHANNEL_Y_SHIFT 0 #define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) #define A2_SRC1_CHANNEL_Z_SHIFT 28 #define A2_SRC1_CHANNEL_W_NEGATE (1<<27) #define A2_SRC1_CHANNEL_W_SHIFT 24 #define A2_SRC2_TYPE_SHIFT 21 #define A2_SRC2_NR_SHIFT 16 #define A2_SRC2_CHANNEL_X_NEGATE (1<<15) #define A2_SRC2_CHANNEL_X_SHIFT 12 #define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) #define A2_SRC2_CHANNEL_Y_SHIFT 8 #define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) #define A2_SRC2_CHANNEL_Z_SHIFT 4 #define A2_SRC2_CHANNEL_W_NEGATE (1<<3) #define A2_SRC2_CHANNEL_W_SHIFT 0 /* Texture instructions */ #define T0_TEXLD (0x15<<24) /* Sample texture using predeclared * sampler and address, and output * filtered texel data to destination * register */ #define T0_TEXLDP (0x16<<24) /* Same as texld but performs a * perspective divide of the texture * coordinate .xyz values by .w before * sampling. */ #define T0_TEXLDB (0x17<<24) /* Same as texld but biases the * computed LOD by w. Only S4.6 two's * comp is used. This implies that a * float to fixed conversion is * done. */ #define T0_TEXKILL (0x18<<24) /* Does not perform a sampling * operation. Simply kills the pixel * if any channel of the address * register is < 0.0. */ #define T0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ /* Note: U (unpreserved) regs do not retain their values between * phases (cannot be used for feedback) * * Note: oC and OD registers can only be used as the destination of a * texture instruction once per phase (this is an implementation * restriction). */ #define T0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ #define T0_SAMPLER_NR_MASK (0xf<<0) #define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ #define T1_ADDRESS_REG_NR_SHIFT 17 #define T2_MBZ 0 /* Declaration instructions */ #define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) * register or an s (sampler) * register. */ #define D0_SAMPLE_TYPE_SHIFT 22 #define D0_SAMPLE_TYPE_2D (0x0<<22) #define D0_SAMPLE_TYPE_CUBE (0x1<<22) #define D0_SAMPLE_TYPE_VOLUME (0x2<<22) #define D0_SAMPLE_TYPE_MASK (0x3<<22) #define D0_TYPE_SHIFT 19 /* Allow: T, S */ #define D0_NR_SHIFT 14 /* Allow T: 0..10, S: 0..15 */ #define D0_CHANNEL_X (1<<10) #define D0_CHANNEL_Y (2<<10) #define D0_CHANNEL_Z (4<<10) #define D0_CHANNEL_W (8<<10) #define D0_CHANNEL_ALL (0xf<<10) #define D0_CHANNEL_NONE (0<<10) #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse * or specular declarations. * * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) * * Must be zero for S (sampler) dcls */ #define D1_MBZ 0 #define D2_MBZ 0 /* p207. * The DWORD count is 3 times the number of bits set in MS1_MAPMASK_MASK */ #define _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16)) #define MS1_MAPMASK_SHIFT 0 #define MS1_MAPMASK_MASK (0x8fff<<0) #define MS2_UNTRUSTED_SURFACE (1<<31) #define MS2_ADDRESS_MASK 0xfffffffc #define MS2_VERTICAL_LINE_STRIDE (1<<1) #define MS2_VERTICAL_OFFSET (1<<1) #define MS3_HEIGHT_SHIFT 21 #define MS3_WIDTH_SHIFT 10 #define MS3_PALETTE_SELECT (1<<9) #define MS3_MAPSURF_FORMAT_SHIFT 7 #define MS3_MAPSURF_FORMAT_MASK (0x7<<7) #define MAPSURF_8BIT (1<<7) #define MAPSURF_16BIT (2<<7) #define MAPSURF_32BIT (3<<7) #define MAPSURF_422 (5<<7) #define MAPSURF_COMPRESSED (6<<7) #define MAPSURF_4BIT_INDEXED (7<<7) #define MS3_MT_FORMAT_MASK (0x7 << 3) #define MS3_MT_FORMAT_SHIFT 3 #define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */ #define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */ #define MT_8BIT_L8 (1<<3) #define MT_8BIT_A8 (4<<3) #define MT_8BIT_MONO8 (5<<3) #define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */ #define MT_16BIT_ARGB1555 (1<<3) #define MT_16BIT_ARGB4444 (2<<3) #define MT_16BIT_AY88 (3<<3) #define MT_16BIT_88DVDU (5<<3) #define MT_16BIT_BUMP_655LDVDU (6<<3) #define MT_16BIT_I16 (7<<3) #define MT_16BIT_L16 (8<<3) #define MT_16BIT_A16 (9<<3) #define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ #define MT_32BIT_ABGR8888 (1<<3) #define MT_32BIT_XRGB8888 (2<<3) #define MT_32BIT_XBGR8888 (3<<3) #define MT_32BIT_QWVU8888 (4<<3) #define MT_32BIT_AXVU8888 (5<<3) #define MT_32BIT_LXVU8888 (6<<3) #define MT_32BIT_XLVU8888 (7<<3) #define MT_32BIT_ARGB2101010 (8<<3) #define MT_32BIT_ABGR2101010 (9<<3) #define MT_32BIT_AWVU2101010 (0xA<<3) #define MT_32BIT_GR1616 (0xB<<3) #define MT_32BIT_VU1616 (0xC<<3) #define MT_32BIT_xI824 (0xD<<3) #define MT_32BIT_xA824 (0xE<<3) #define MT_32BIT_xL824 (0xF<<3) #define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */ #define MT_422_YCRCB_NORMAL (1<<3) #define MT_422_YCRCB_SWAPUV (2<<3) #define MT_422_YCRCB_SWAPUVY (3<<3) #define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */ #define MT_COMPRESS_DXT2_3 (1<<3) #define MT_COMPRESS_DXT4_5 (2<<3) #define MT_COMPRESS_FXT1 (3<<3) #define MT_COMPRESS_DXT1_RGB (4<<3) #define MS3_USE_FENCE_REGS (1<<2) #define MS3_TILED_SURFACE (1<<1) #define MS3_TILE_WALK (1<<0) /* The pitch is the pitch measured in DWORDS, minus 1 */ #define MS4_PITCH_SHIFT 21 #define MS4_CUBE_FACE_ENA_NEGX (1<<20) #define MS4_CUBE_FACE_ENA_POSX (1<<19) #define MS4_CUBE_FACE_ENA_NEGY (1<<18) #define MS4_CUBE_FACE_ENA_POSY (1<<17) #define MS4_CUBE_FACE_ENA_NEGZ (1<<16) #define MS4_CUBE_FACE_ENA_POSZ (1<<15) #define MS4_CUBE_FACE_ENA_MASK (0x3f<<15) #define MS4_MAX_LOD_SHIFT 9 #define MS4_MAX_LOD_MASK (0x3f<<9) #define MS4_MIP_LAYOUT_LEGACY (0<<8) #define MS4_MIP_LAYOUT_BELOW_LPT (0<<8) #define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8) #define MS4_VOLUME_DEPTH_SHIFT 0 #define MS4_VOLUME_DEPTH_MASK (0xff<<0) /* p244. * The DWORD count is 3 times the number of bits set in SS1_MAPMASK_MASK. */ #define _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16)) #define SS1_MAPMASK_SHIFT 0 #define SS1_MAPMASK_MASK (0x8fff<<0) #define SS2_REVERSE_GAMMA_ENABLE (1<<31) #define SS2_PACKED_TO_PLANAR_ENABLE (1<<30) #define SS2_COLORSPACE_CONVERSION (1<<29) #define SS2_CHROMAKEY_SHIFT 27 #define SS2_BASE_MIP_LEVEL_SHIFT 22 #define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22) #define SS2_MIP_FILTER_SHIFT 20 #define SS2_MIP_FILTER_MASK (0x3<<20) #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #define SS2_MAG_FILTER_SHIFT 17 #define SS2_MAG_FILTER_MASK (0x7<<17) #define FILTER_NEAREST 0 #define FILTER_LINEAR 1 #define FILTER_ANISOTROPIC 2 #define FILTER_4X4_1 3 #define FILTER_4X4_2 4 #define FILTER_4X4_FLAT 5 #define FILTER_6X5_MONO 6 /* XXX - check */ #define SS2_MIN_FILTER_SHIFT 14 #define SS2_MIN_FILTER_MASK (0x7<<14) #define SS2_LOD_BIAS_SHIFT 5 #define SS2_LOD_BIAS_ONE (0x10<<5) #define SS2_LOD_BIAS_MASK (0x1ff<<5) /* Shadow requires: * MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format * FILTER_4X4_x MIN and MAG filters */ #define SS2_SHADOW_ENABLE (1<<4) #define SS2_MAX_ANISO_MASK (1<<3) #define SS2_MAX_ANISO_2 (0<<3) #define SS2_MAX_ANISO_4 (1<<3) #define SS2_SHADOW_FUNC_SHIFT 0 #define SS2_SHADOW_FUNC_MASK (0x7<<0) /* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */ #define SS3_MIN_LOD_SHIFT 24 #define SS3_MIN_LOD_ONE (0x10<<24) #define SS3_MIN_LOD_MASK (0xff<<24) #define SS3_KILL_PIXEL_ENABLE (1<<17) #define SS3_TCX_ADDR_MODE_SHIFT 12 #define SS3_TCX_ADDR_MODE_MASK (0x7<<12) #define TEXCOORDMODE_WRAP 0 #define TEXCOORDMODE_MIRROR 1 #define TEXCOORDMODE_CLAMP_EDGE 2 #define TEXCOORDMODE_CUBE 3 #define TEXCOORDMODE_CLAMP_BORDER 4 #define TEXCOORDMODE_MIRROR_ONCE 5 #define SS3_TCY_ADDR_MODE_SHIFT 9 #define SS3_TCY_ADDR_MODE_MASK (0x7<<9) #define SS3_TCZ_ADDR_MODE_SHIFT 6 #define SS3_TCZ_ADDR_MODE_MASK (0x7<<6) #define SS3_NORMALIZED_COORDS (1<<5) #define SS3_TEXTUREMAP_INDEX_SHIFT 1 #define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1) #define SS3_DEINTERLACER_ENABLE (1<<0) #define SS4_BORDER_COLOR_MASK (~0) /* 3DSTATE_SPAN_STIPPLE, p258 */ #define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) #define ST1_ENABLE (1<<16) #define ST1_MASK (0xffff) #define FLUSH_MAP_CACHE (1<<0) #define FLUSH_RENDER_CACHE (1<<1) #endif xf86-video-intel-2.99.917/xvmc/i830_reg.h0000664000175000017500000007030312400044327014374 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef _I830_REG_H_ #define _I830_REG_H_ #define I830_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value) /* Flush */ #define MI_FLUSH (0x04<<23) #define MI_FLUSH_DW (0x26<<23) #define MI_WRITE_DIRTY_STATE (1<<4) #define MI_END_SCENE (1<<3) #define MI_GLOBAL_SNAPSHOT_COUNT_RESET (1<<3) #define MI_INHIBIT_RENDER_CACHE_FLUSH (1<<2) #define MI_STATE_INSTRUCTION_CACHE_FLUSH (1<<1) #define MI_INVALIDATE_MAP_CACHE (1<<0) /* broadwater flush bits */ #define BRW_MI_GLOBAL_SNAPSHOT_RESET (1 << 3) #define MI_BATCH_BUFFER_END (0xA << 23) /* Noop */ #define MI_NOOP 0x00 #define MI_NOOP_WRITE_ID (1<<22) #define MI_NOOP_ID_MASK (1<<22 - 1) /* Wait for Events */ #define MI_WAIT_FOR_EVENT (0x03<<23) #define MI_WAIT_FOR_PIPEB_SVBLANK (1<<18) #define MI_WAIT_FOR_PIPEA_SVBLANK (1<<17) #define MI_WAIT_FOR_OVERLAY_FLIP (1<<16) #define MI_WAIT_FOR_PIPEB_VBLANK (1<<7) #define MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW (1<<5) #define MI_WAIT_FOR_PIPEA_VBLANK (1<<3) #define MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW (1<<1) /* Set the scan line for MI_WAIT_FOR_PIPE?_SCAN_LINE_WINDOW */ #define MI_LOAD_SCAN_LINES_INCL (0x12<<23) #define MI_LOAD_SCAN_LINES_DISPLAY_PIPEA (0) #define MI_LOAD_SCAN_LINES_DISPLAY_PIPEB (0x1<<20) /* BLT commands */ #define COLOR_BLT_CMD ((2<<29)|(0x40<<22)|(0x3)) #define COLOR_BLT_WRITE_ALPHA (1<<21) #define COLOR_BLT_WRITE_RGB (1<<20) #define XY_COLOR_BLT_CMD ((2<<29)|(0x50<<22)|(0x4)) #define XY_COLOR_BLT_WRITE_ALPHA (1<<21) #define XY_COLOR_BLT_WRITE_RGB (1<<20) #define XY_COLOR_BLT_TILED (1<<11) #define XY_SETUP_CLIP_BLT_CMD ((2<<29)|(3<<22)|1) #define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) #define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_SRC_COPY_BLT_SRC_TILED (1<<15) #define XY_SRC_COPY_BLT_DST_TILED (1<<11) #define SRC_COPY_BLT_CMD ((2<<29)|(0x43<<22)|0x4) #define SRC_COPY_BLT_WRITE_ALPHA (1<<21) #define SRC_COPY_BLT_WRITE_RGB (1<<20) #define XY_PAT_BLT_IMMEDIATE ((2<<29)|(0x72<<22)) #define XY_MONO_PAT_BLT_CMD ((0x2<<29)|(0x52<<22)|0x7) #define XY_MONO_PAT_VERT_SEED ((1<<10)|(1<<9)|(1<<8)) #define XY_MONO_PAT_HORT_SEED ((1<<14)|(1<<13)|(1<<12)) #define XY_MONO_PAT_BLT_WRITE_ALPHA (1<<21) #define XY_MONO_PAT_BLT_WRITE_RGB (1<<20) #define XY_MONO_SRC_BLT_CMD ((0x2<<29)|(0x54<<22)|(0x6)) #define XY_MONO_SRC_BLT_WRITE_ALPHA (1<<21) #define XY_MONO_SRC_BLT_WRITE_RGB (1<<20) #define CMD_3D (0x3<<29) #define PRIM3D_INLINE (CMD_3D | (0x1f<<24)) #define PRIM3D_TRILIST (0x0<<18) #define PRIM3D_TRISTRIP (0x1<<18) #define PRIM3D_TRISTRIP_RVRSE (0x2<<18) #define PRIM3D_TRIFAN (0x3<<18) #define PRIM3D_POLY (0x4<<18) #define PRIM3D_LINELIST (0x5<<18) #define PRIM3D_LINESTRIP (0x6<<18) #define PRIM3D_RECTLIST (0x7<<18) #define PRIM3D_POINTLIST (0x8<<18) #define PRIM3D_DIB (0x9<<18) #define PRIM3D_CLEAR_RECT (0xa<<18) #define PRIM3D_ZONE_INIT (0xd<<18) #define PRIM3D_MASK (0x1f<<18) #define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) #define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) #define AA_LINE_ECAAR_WIDTH_0_5 0 #define AA_LINE_ECAAR_WIDTH_1_0 (1<<14) #define AA_LINE_ECAAR_WIDTH_2_0 (2<<14) #define AA_LINE_ECAAR_WIDTH_4_0 (3<<14) #define AA_LINE_REGION_WIDTH_ENABLE (1<<8) #define AA_LINE_REGION_WIDTH_0_5 0 #define AA_LINE_REGION_WIDTH_1_0 (1<<6) #define AA_LINE_REGION_WIDTH_2_0 (2<<6) #define AA_LINE_REGION_WIDTH_4_0 (3<<6) #define AA_LINE_ENABLE ((1<<1) | 1) #define AA_LINE_DISABLE (1<<1) #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) /* Dword 1 */ #define BUF_3D_ID_COLOR_BACK (0x3<<24) #define BUF_3D_ID_DEPTH (0x7<<24) #define BUF_3D_USE_FENCE (1<<23) #define BUF_3D_TILED_SURFACE (1<<22) #define BUF_3D_TILE_WALK_X 0 #define BUF_3D_TILE_WALK_Y (1<<21) #define BUF_3D_PITCH(x) (((x)/4)<<2) /* Dword 2 */ #define BUF_3D_ADDR(x) ((x) & ~0x3) #define _3DSTATE_COLOR_FACTOR_CMD (CMD_3D | (0x1d<<24) | (0x1<<16)) #define _3DSTATE_COLOR_FACTOR_N_CMD(stage) (CMD_3D | (0x1d<<24) | \ ((0x90+(stage))<<16)) #define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) #define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) #define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) #define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) #define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) /* Dword 1 */ #define DSTORG_HORT_BIAS(x) ((x)<<20) #define DSTORG_VERT_BIAS(x) ((x)<<16) #define COLOR_4_2_2_CHNL_WRT_ALL 0 #define COLOR_4_2_2_CHNL_WRT_Y (1<<12) #define COLOR_4_2_2_CHNL_WRT_CR (2<<12) #define COLOR_4_2_2_CHNL_WRT_CB (3<<12) #define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) #define COLR_BUF_8BIT 0 #define COLR_BUF_RGB555 (1<<8) #define COLR_BUF_RGB565 (2<<8) #define COLR_BUF_ARGB8888 (3<<8) #define COLR_BUF_ARGB4444 (8<<8) #define COLR_BUF_ARGB1555 (9<<8) #define DEPTH_IS_Z 0 #define DEPTH_IS_W (1<<6) #define DEPTH_FRMT_16_FIXED 0 #define DEPTH_FRMT_16_FLOAT (1<<2) #define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) #define DEPTH_FRMT_24_FLOAT_8_OTHER (3<<2) #define VERT_LINE_STRIDE_1 (1<<1) #define VERT_LINE_STRIDE_0 0 #define VERT_LINE_STRIDE_OFS_1 1 #define VERT_LINE_STRIDE_OFS_0 0 #define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) /* Dword 1 */ #define DRAW_RECT_DIS_DEPTH_OFS (1<<30) #define DRAW_DITHER_OFS_X(x) ((x)<<26) #define DRAW_DITHER_OFS_Y(x) ((x)<<24) /* Dword 2 */ #define DRAW_YMIN(x) ((x)<<16) #define DRAW_XMIN(x) (x) /* Dword 3 */ #define DRAW_YMAX(x) ((x)<<16) #define DRAW_XMAX(x) (x) /* Dword 4 */ #define DRAW_YORG(x) ((x)<<16) #define DRAW_XORG(x) (x) #define _3DSTATE_ENABLES_1_CMD (CMD_3D|(0x3<<24)) #define ENABLE_LOGIC_OP_MASK ((1<<23)|(1<<22)) #define ENABLE_LOGIC_OP ((1<<23)|(1<<22)) #define DISABLE_LOGIC_OP (1<<23) #define ENABLE_STENCIL_TEST ((1<<21)|(1<<20)) #define DISABLE_STENCIL_TEST (1<<21) #define ENABLE_DEPTH_BIAS ((1<<11)|(1<<10)) #define DISABLE_DEPTH_BIAS (1<<11) #define ENABLE_SPEC_ADD_MASK ((1<<9)|(1<<8)) #define ENABLE_SPEC_ADD ((1<<9)|(1<<8)) #define DISABLE_SPEC_ADD (1<<9) #define ENABLE_DIS_FOG_MASK ((1<<7)|(1<<6)) #define ENABLE_FOG ((1<<7)|(1<<6)) #define DISABLE_FOG (1<<7) #define ENABLE_DIS_ALPHA_TEST_MASK ((1<<5)|(1<<4)) #define ENABLE_ALPHA_TEST ((1<<5)|(1<<4)) #define DISABLE_ALPHA_TEST (1<<5) #define ENABLE_DIS_CBLEND_MASK ((1<<3)|(1<<2)) #define ENABLE_COLOR_BLEND ((1<<3)|(1<<2)) #define DISABLE_COLOR_BLEND (1<<3) #define ENABLE_DIS_DEPTH_TEST_MASK ((1<<1)|1) #define ENABLE_DEPTH_TEST ((1<<1)|1) #define DISABLE_DEPTH_TEST (1<<1) /* _3DSTATE_ENABLES_2, p138 */ #define _3DSTATE_ENABLES_2_CMD (CMD_3D|(0x4<<24)) #define ENABLE_STENCIL_WRITE ((1<<21)|(1<<20)) #define DISABLE_STENCIL_WRITE (1<<21) #define ENABLE_TEX_CACHE ((1<<17)|(1<<16)) #define DISABLE_TEX_CACHE (1<<17) #define ENABLE_DITHER ((1<<9)|(1<<8)) #define DISABLE_DITHER (1<<9) #define ENABLE_COLOR_MASK (1<<10) #define WRITEMASK_ALPHA (1<<7) #define WRITEMASK_ALPHA_SHIFT 7 #define WRITEMASK_RED (1<<6) #define WRITEMASK_RED_SHIFT 6 #define WRITEMASK_GREEN (1<<5) #define WRITEMASK_GREEN_SHIFT 5 #define WRITEMASK_BLUE (1<<4) #define WRITEMASK_BLUE_SHIFT 4 #define WRITEMASK_MASK ((1<<4)|(1<<5)|(1<<6)|(1<<7)) #define ENABLE_COLOR_WRITE ((1<<3)|(1<<2)) #define DISABLE_COLOR_WRITE (1<<3) #define ENABLE_DIS_DEPTH_WRITE_MASK 0x3 #define ENABLE_DEPTH_WRITE ((1<<1)|1) #define DISABLE_DEPTH_WRITE (1<<1) /* _3DSTATE_FOG_COLOR, p139 */ #define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) #define FOG_COLOR_RED(x) ((x)<<16) #define FOG_COLOR_GREEN(x) ((x)<<8) #define FOG_COLOR_BLUE(x) (x) /* _3DSTATE_FOG_MODE, p140 */ #define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) /* Dword 1 */ #define FOGFUNC_ENABLE (1<<31) #define FOGFUNC_VERTEX 0 #define FOGFUNC_PIXEL_EXP (1<<28) #define FOGFUNC_PIXEL_EXP2 (2<<28) #define FOGFUNC_PIXEL_LINEAR (3<<28) #define FOGSRC_INDEX_Z (1<<27) #define FOGSRC_INDEX_W ((1<<27)|(1<<25)) #define FOG_LINEAR_CONST (1<<24) #define FOG_CONST_1(x) ((x)<<4) #define ENABLE_FOG_DENSITY (1<<23) /* Dword 2 */ #define FOG_CONST_2(x) (x) /* Dword 3 */ #define FOG_DENSITY(x) (x) /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p142 */ #define _3DSTATE_INDPT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) #define ENABLE_INDPT_ALPHA_BLEND ((1<<23)|(1<<22)) #define DISABLE_INDPT_ALPHA_BLEND (1<<23) #define ALPHA_BLENDFUNC_MASK 0x3f0000 #define ENABLE_ALPHA_BLENDFUNC (1<<21) #define ABLENDFUNC_ADD 0 #define ABLENDFUNC_SUB (1<<16) #define ABLENDFUNC_RVSE_SUB (2<<16) #define ABLENDFUNC_MIN (3<<16) #define ABLENDFUNC_MAX (4<<16) #define SRC_DST_ABLEND_MASK 0xfff #define ENABLE_SRC_ABLEND_FACTOR (1<<11) #define SRC_ABLEND_FACT(x) ((x)<<6) #define ENABLE_DST_ABLEND_FACTOR (1<<5) #define DST_ABLEND_FACT(x) (x) #define BLENDFACTOR_ZERO 0x01 #define BLENDFACTOR_ONE 0x02 #define BLENDFACTOR_SRC_COLR 0x03 #define BLENDFACTOR_INV_SRC_COLR 0x04 #define BLENDFACTOR_SRC_ALPHA 0x05 #define BLENDFACTOR_INV_SRC_ALPHA 0x06 #define BLENDFACTOR_DST_ALPHA 0x07 #define BLENDFACTOR_INV_DST_ALPHA 0x08 #define BLENDFACTOR_DST_COLR 0x09 #define BLENDFACTOR_INV_DST_COLR 0x0a #define BLENDFACTOR_SRC_ALPHA_SATURATE 0x0b #define BLENDFACTOR_CONST_COLOR 0x0c #define BLENDFACTOR_INV_CONST_COLOR 0x0d #define BLENDFACTOR_CONST_ALPHA 0x0e #define BLENDFACTOR_INV_CONST_ALPHA 0x0f #define BLENDFACTOR_MASK 0x0f /* _3DSTATE_MAP_BLEND_ARG, p152 */ #define _3DSTATE_MAP_BLEND_ARG_CMD(stage) (CMD_3D|(0x0e<<24)|((stage)<<20)) #define TEXPIPE_COLOR 0 #define TEXPIPE_ALPHA (1<<18) #define TEXPIPE_KILL (2<<18) #define TEXBLEND_ARG0 0 #define TEXBLEND_ARG1 (1<<15) #define TEXBLEND_ARG2 (2<<15) #define TEXBLEND_ARG3 (3<<15) #define TEXBLENDARG_MODIFY_PARMS (1<<6) #define TEXBLENDARG_REPLICATE_ALPHA (1<<5) #define TEXBLENDARG_INV_ARG (1<<4) #define TEXBLENDARG_ONE 0 #define TEXBLENDARG_FACTOR 0x01 #define TEXBLENDARG_ACCUM 0x02 #define TEXBLENDARG_DIFFUSE 0x03 #define TEXBLENDARG_SPEC 0x04 #define TEXBLENDARG_CURRENT 0x05 #define TEXBLENDARG_TEXEL0 0x06 #define TEXBLENDARG_TEXEL1 0x07 #define TEXBLENDARG_TEXEL2 0x08 #define TEXBLENDARG_TEXEL3 0x09 #define TEXBLENDARG_FACTOR_N 0x0e /* _3DSTATE_MAP_BLEND_OP, p155 */ #define _3DSTATE_MAP_BLEND_OP_CMD(stage) (CMD_3D|(0x0d<<24)|((stage)<<20)) #if 0 # define TEXPIPE_COLOR 0 # define TEXPIPE_ALPHA (1<<18) # define TEXPIPE_KILL (2<<18) #endif #define ENABLE_TEXOUTPUT_WRT_SEL (1<<17) #define TEXOP_OUTPUT_CURRENT 0 #define TEXOP_OUTPUT_ACCUM (1<<15) #define ENABLE_TEX_CNTRL_STAGE ((1<<12)|(1<<11)) #define DISABLE_TEX_CNTRL_STAGE (1<<12) #define TEXOP_SCALE_SHIFT 9 #define TEXOP_SCALE_1X (0 << TEXOP_SCALE_SHIFT) #define TEXOP_SCALE_2X (1 << TEXOP_SCALE_SHIFT) #define TEXOP_SCALE_4X (2 << TEXOP_SCALE_SHIFT) #define TEXOP_MODIFY_PARMS (1<<8) #define TEXOP_LAST_STAGE (1<<7) #define TEXBLENDOP_KILLPIXEL 0x02 #define TEXBLENDOP_ARG1 0x01 #define TEXBLENDOP_ARG2 0x02 #define TEXBLENDOP_MODULATE 0x03 #define TEXBLENDOP_ADD 0x06 #define TEXBLENDOP_ADDSIGNED 0x07 #define TEXBLENDOP_BLEND 0x08 #define TEXBLENDOP_BLEND_AND_ADD 0x09 #define TEXBLENDOP_SUBTRACT 0x0a #define TEXBLENDOP_DOT3 0x0b #define TEXBLENDOP_DOT4 0x0c #define TEXBLENDOP_MODULATE_AND_ADD 0x0d #define TEXBLENDOP_MODULATE_2X_AND_ADD 0x0e #define TEXBLENDOP_MODULATE_4X_AND_ADD 0x0f /* _3DSTATE_MAP_BUMP_TABLE, p160 TODO */ /* _3DSTATE_MAP_COLOR_CHROMA_KEY, p161 TODO */ #define _3DSTATE_MAP_COORD_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8c<<16)) #define DISABLE_TEX_TRANSFORM (1<<28) #define TEXTURE_SET(x) (x<<29) #define _3DSTATE_VERTEX_TRANSFORM ((3<<29)|(0x1d<<24)|(0x8b<<16)) #define DISABLE_VIEWPORT_TRANSFORM (1<<31) #define DISABLE_PERSPECTIVE_DIVIDE (1<<29) /* _3DSTATE_MAP_COORD_SET_BINDINGS, p162 */ #define _3DSTATE_MAP_COORD_SETBIND_CMD (CMD_3D|(0x1d<<24)|(0x02<<16)) #define TEXBIND_MASK3 ((1<<15)|(1<<14)|(1<<13)|(1<<12)) #define TEXBIND_MASK2 ((1<<11)|(1<<10)|(1<<9)|(1<<8)) #define TEXBIND_MASK1 ((1<<7)|(1<<6)|(1<<5)|(1<<4)) #define TEXBIND_MASK0 ((1<<3)|(1<<2)|(1<<1)|1) #define TEXBIND_SET3(x) ((x)<<12) #define TEXBIND_SET2(x) ((x)<<8) #define TEXBIND_SET1(x) ((x)<<4) #define TEXBIND_SET0(x) (x) #define TEXCOORDSRC_KEEP 0 #define TEXCOORDSRC_DEFAULT 0x01 #define TEXCOORDSRC_VTXSET_0 0x08 #define TEXCOORDSRC_VTXSET_1 0x09 #define TEXCOORDSRC_VTXSET_2 0x0a #define TEXCOORDSRC_VTXSET_3 0x0b #define TEXCOORDSRC_VTXSET_4 0x0c #define TEXCOORDSRC_VTXSET_5 0x0d #define TEXCOORDSRC_VTXSET_6 0x0e #define TEXCOORDSRC_VTXSET_7 0x0f #define MAP_UNIT(unit) ((unit)<<16) #define MAP_UNIT_MASK (0x7<<16) /* _3DSTATE_MAP_COORD_SETS, p164 */ #define _3DSTATE_MAP_COORD_SET_CMD (CMD_3D|(0x1c<<24)|(0x01<<19)) #define TEXCOORD_SET(n) ((n)<<16) #define ENABLE_TEXCOORD_PARAMS (1<<15) #define TEXCOORDS_ARE_NORMAL (1<<14) #define TEXCOORDS_ARE_IN_TEXELUNITS 0 #define TEXCOORDTYPE_CARTESIAN 0 #define TEXCOORDTYPE_HOMOGENEOUS (1<<11) #define TEXCOORDTYPE_VECTOR (2<<11) #define TEXCOORDTYPE_MASK (0x7<<11) #define ENABLE_ADDR_V_CNTL (1<<7) #define ENABLE_ADDR_U_CNTL (1<<3) #define TEXCOORD_ADDR_V_MODE(x) ((x)<<4) #define TEXCOORD_ADDR_U_MODE(x) (x) #define TEXCOORDMODE_WRAP 0 #define TEXCOORDMODE_MIRROR 1 #define TEXCOORDMODE_CLAMP 2 #define TEXCOORDMODE_WRAP_SHORTEST 3 #define TEXCOORDMODE_CLAMP_BORDER 4 #define TEXCOORD_ADDR_V_MASK 0x70 #define TEXCOORD_ADDR_U_MASK 0x7 /* _3DSTATE_MAP_CUBE, p168 TODO */ #define _3DSTATE_MAP_CUBE (CMD_3D|(0x1c<<24)|(0x0a<<19)) #define CUBE_NEGX_ENABLE (1<<5) #define CUBE_POSX_ENABLE (1<<4) #define CUBE_NEGY_ENABLE (1<<3) #define CUBE_POSY_ENABLE (1<<2) #define CUBE_NEGZ_ENABLE (1<<1) #define CUBE_POSZ_ENABLE (1<<0) #define _3DSTATE_MAP_INFO_CMD (CMD_3D|(0x1d<<24)|(0x0<<16)|3) #define TEXMAP_INDEX(x) ((x)<<28) #define MAP_SURFACE_8BIT (1<<24) #define MAP_SURFACE_16BIT (2<<24) #define MAP_SURFACE_32BIT (3<<24) #define MAP_FORMAT_2D (0) #define MAP_FORMAT_3D_CUBE (1<<11) /* _3DSTATE_MODES_1, p190 */ #define _3DSTATE_MODES_1_CMD (CMD_3D|(0x08<<24)) #define BLENDFUNC_MASK 0x3f0000 #define ENABLE_COLR_BLND_FUNC (1<<21) #define BLENDFUNC_ADD 0 #define BLENDFUNC_SUB (1<<16) #define BLENDFUNC_RVRSE_SUB (2<<16) #define BLENDFUNC_MIN (3<<16) #define BLENDFUNC_MAX (4<<16) #define SRC_DST_BLND_MASK 0xfff #define ENABLE_SRC_BLND_FACTOR (1<<11) #define ENABLE_DST_BLND_FACTOR (1<<5) #define SRC_BLND_FACT(x) ((x)<<6) #define DST_BLND_FACT(x) (x) /* _3DSTATE_MODES_2, p192 */ #define _3DSTATE_MODES_2_CMD (CMD_3D|(0x0f<<24)) #define ENABLE_GLOBAL_DEPTH_BIAS (1<<22) #define GLOBAL_DEPTH_BIAS(x) ((x)<<14) #define ENABLE_ALPHA_TEST_FUNC (1<<13) #define ENABLE_ALPHA_REF_VALUE (1<<8) #define ALPHA_TEST_FUNC(x) ((x)<<9) #define ALPHA_REF_VALUE(x) (x) #define ALPHA_TEST_REF_MASK 0x3fff /* _3DSTATE_MODES_3, p193 */ #define _3DSTATE_MODES_3_CMD (CMD_3D|(0x02<<24)) #define DEPTH_TEST_FUNC_MASK 0x1f0000 #define ENABLE_DEPTH_TEST_FUNC (1<<20) /* Uses COMPAREFUNC */ #define DEPTH_TEST_FUNC(x) ((x)<<16) #define ENABLE_ALPHA_SHADE_MODE (1<<11) #define ENABLE_FOG_SHADE_MODE (1<<9) #define ENABLE_SPEC_SHADE_MODE (1<<7) #define ENABLE_COLOR_SHADE_MODE (1<<5) #define ALPHA_SHADE_MODE(x) ((x)<<10) #define FOG_SHADE_MODE(x) ((x)<<8) #define SPEC_SHADE_MODE(x) ((x)<<6) #define COLOR_SHADE_MODE(x) ((x)<<4) #define CULLMODE_MASK 0xf #define ENABLE_CULL_MODE (1<<3) #define CULLMODE_BOTH 0 #define CULLMODE_NONE 1 #define CULLMODE_CW 2 #define CULLMODE_CCW 3 #define SHADE_MODE_LINEAR 0 #define SHADE_MODE_FLAT 0x1 /* _3DSTATE_MODES_4, p195 */ #define _3DSTATE_MODES_4_CMD (CMD_3D|(0x16<<24)) #define ENABLE_LOGIC_OP_FUNC (1<<23) #define LOGIC_OP_FUNC(x) ((x)<<18) #define LOGICOP_MASK ((1<<18)|(1<<19)|(1<<20)|(1<<21)) #define LOGICOP_CLEAR 0 #define LOGICOP_NOR 0x1 #define LOGICOP_AND_INV 0x2 #define LOGICOP_COPY_INV 0x3 #define LOGICOP_AND_RVRSE 0x4 #define LOGICOP_INV 0x5 #define LOGICOP_XOR 0x6 #define LOGICOP_NAND 0x7 #define LOGICOP_AND 0x8 #define LOGICOP_EQUIV 0x9 #define LOGICOP_NOOP 0xa #define LOGICOP_OR_INV 0xb #define LOGICOP_COPY 0xc #define LOGICOP_OR_RVRSE 0xd #define LOGICOP_OR 0xe #define LOGICOP_SET 0xf #define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) #define ENABLE_STENCIL_TEST_MASK (1<<17) #define STENCIL_TEST_MASK(x) ((x)<<8) #define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) #define ENABLE_STENCIL_WRITE_MASK (1<<16) #define STENCIL_WRITE_MASK(x) ((x)&0xff) /* _3DSTATE_MODES_5, p196 */ #define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) #define ENABLE_SPRITE_POINT_TEX (1<<23) #define SPRITE_POINT_TEX_ON (1<<22) #define SPRITE_POINT_TEX_OFF 0 #define FLUSH_RENDER_CACHE (1<<18) #define FLUSH_TEXTURE_CACHE (1<<16) #define FIXED_LINE_WIDTH_MASK 0xfc00 #define ENABLE_FIXED_LINE_WIDTH (1<<15) #define FIXED_LINE_WIDTH(x) ((x)<<10) #define FIXED_POINT_WIDTH_MASK 0x3ff #define ENABLE_FIXED_POINT_WIDTH (1<<9) #define FIXED_POINT_WIDTH(x) (x) /* _3DSTATE_RASTERIZATION_RULES, p198 */ #define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) #define ENABLE_POINT_RASTER_RULE (1<<15) #define OGL_POINT_RASTER_RULE (1<<13) #define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) #define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) #define ENABLE_TRI_STRIP_PROVOKE_VRTX (1<<2) #define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) #define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) #define TRI_STRIP_PROVOKE_VRTX(x) (x) /* _3DSTATE_SCISSOR_ENABLE, p200 */ #define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) #define ENABLE_SCISSOR_RECT ((1<<1) | 1) #define DISABLE_SCISSOR_RECT (1<<1) /* _3DSTATE_SCISSOR_RECTANGLE_0, p201 */ #define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) /* Dword 1 */ #define SCISSOR_RECT_0_YMIN(x) ((x)<<16) #define SCISSOR_RECT_0_XMIN(x) (x) /* Dword 2 */ #define SCISSOR_RECT_0_YMAX(x) ((x)<<16) #define SCISSOR_RECT_0_XMAX(x) (x) /* _3DSTATE_STENCIL_TEST, p202 */ #define _3DSTATE_STENCIL_TEST_CMD (CMD_3D|(0x09<<24)) #define ENABLE_STENCIL_PARMS (1<<23) #define STENCIL_OPS_MASK (0xffc000) #define STENCIL_FAIL_OP(x) ((x)<<20) #define STENCIL_PASS_DEPTH_FAIL_OP(x) ((x)<<17) #define STENCIL_PASS_DEPTH_PASS_OP(x) ((x)<<14) #define ENABLE_STENCIL_TEST_FUNC_MASK ((1<<13)|(1<<12)|(1<<11)|(1<<10)|(1<<9)) #define ENABLE_STENCIL_TEST_FUNC (1<<13) /* Uses COMPAREFUNC */ #define STENCIL_TEST_FUNC(x) ((x)<<9) #define STENCIL_REF_VALUE_MASK ((1<<8)|0xff) #define ENABLE_STENCIL_REF_VALUE (1<<8) #define STENCIL_REF_VALUE(x) (x) /* _3DSTATE_VERTEX_FORMAT, p204 */ #define _3DSTATE_VFT0_CMD (CMD_3D|(0x05<<24)) #define VFT0_POINT_WIDTH (1<<12) #define VFT0_TEX_COUNT_MASK (7<<8) #define VFT0_TEX_COUNT_SHIFT 8 #define VFT0_TEX_COUNT(x) ((x)<<8) #define VFT0_SPEC (1<<7) #define VFT0_DIFFUSE (1<<6) #define VFT0_DEPTH_OFFSET (1<<5) #define VFT0_XYZ (1<<1) #define VFT0_XYZW (2<<1) #define VFT0_XY (3<<1) #define VFT0_XYW (4<<1) #define VFT0_XYZW_MASK (7<<1) /* _3DSTATE_VERTEX_FORMAT_2, p206 */ #define _3DSTATE_VERTEX_FORMAT_2_CMD (CMD_3D|(0x0a<<24)) #define VFT1_TEX7_FMT(x) ((x)<<14) #define VFT1_TEX6_FMT(x) ((x)<<12) #define VFT1_TEX5_FMT(x) ((x)<<10) #define VFT1_TEX4_FMT(x) ((x)<<8) #define VFT1_TEX3_FMT(x) ((x)<<6) #define VFT1_TEX2_FMT(x) ((x)<<4) #define VFT1_TEX1_FMT(x) ((x)<<2) #define VFT1_TEX0_FMT(x) (x) #define VFT1_TEX0_MASK 3 #define VFT1_TEX1_SHIFT 2 #define TEXCOORDFMT_2D 0 #define TEXCOORDFMT_3D 1 #define TEXCOORDFMT_4D 2 #define TEXCOORDFMT_1D 3 /*New stuff picked up along the way */ #define MLC_LOD_BIAS_MASK ((1<<7)-1) /* _3DSTATE_VERTEX_TRANSFORM, p207 */ #define _3DSTATE_VERTEX_TRANS_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|0) #define _3DSTATE_VERTEX_TRANS_MTX_CMD (CMD_3D|(0x1d<<24)|(0x8b<<16)|6) /* Dword 1 */ #define ENABLE_VIEWPORT_TRANSFORM ((1<<31)|(1<<30)) #define DISABLE_VIEWPORT_TRANSFORM (1<<31) #define ENABLE_PERSP_DIVIDE ((1<<29)|(1<<28)) #define DISABLE_PERSP_DIVIDE (1<<29) #define VRTX_TRANS_LOAD_MATRICES 0x7421 #define VRTX_TRANS_NO_LOAD_MATRICES 0x0000 /* Dword 2 -> 7 are matrix elements */ /* _3DSTATE_W_STATE, p209 */ #define _3DSTATE_W_STATE_CMD (CMD_3D|(0x1d<<24)|(0x8d<<16)|1) /* Dword 1 */ #define MAGIC_W_STATE_DWORD1 0x00000008 /* Dword 2 */ #define WFAR_VALUE(x) (x) /* Stipple command, carried over from the i810, apparently: */ #define _3DSTATE_STIPPLE (CMD_3D|(0x1d<<24)|(0x83<<16)) #define ST1_ENABLE (1<<16) #define ST1_MASK (0xffff) #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D|(0x1d<<24)|(0x04<<16)) #define I1_LOAD_S(n) (1<<((n)+4)) #define S3_POINT_WIDTH_SHIFT 23 #define S3_LINE_WIDTH_SHIFT 19 #define S3_ALPHA_SHADE_MODE_SHIFT 18 #define S3_FOG_SHADE_MODE_SHIFT 17 #define S3_SPEC_SHADE_MODE_SHIFT 16 #define S3_COLOR_SHADE_MODE_SHIFT 15 #define S3_CULL_MODE_SHIFT 13 #define S3_CULLMODE_BOTH (0) #define S3_CULLMODE_NONE (1<<13) #define S3_CULLMODE_CW (2<<13) #define S3_CULLMODE_CCW (3<<13) #define S3_POINT_WIDTH_PRESENT (1<<12) #define S3_SPEC_FOG_PRESENT (1<<11) #define S3_DIFFUSE_PRESENT (1<<10) #define S3_DEPTH_OFFSET_PRESENT (1<<9) #define S3_POSITION_SHIFT 6 #define S3_VERTEXHAS_XYZ (1<<6) #define S3_VERTEXHAS_XYZW (2<<6) #define S3_VERTEXHAS_XY (3<<6) #define S3_VERTEXHAS_XYW (4<<6) #define S3_ENABLE_SPEC_ADD (1<<5) #define S3_ENABLE_FOG (1<<4) #define S3_ENABLE_LOCAL_DEPTH_BIAS (1<<3) #define S3_ENABLE_SPRITE_POINT (1<<1) #define S3_ENABLE_ANTIALIASING 1 #define S8_ENABLE_ALPHA_TEST (1<<31) #define S8_ALPHA_TEST_FUNC_SHIFT 28 #define S8_ALPHA_REFVALUE_SHIFT 20 #define S8_ENABLE_DEPTH_TEST (1<<19) #define S8_DEPTH_TEST_FUNC_SHIFT 16 #define S8_ENABLE_COLOR_BLEND (1<<15) #define S8_COLOR_BLEND_FUNC_SHIFT 12 #define S8_BLENDFUNC_ADD (0) #define S8_BLENDFUNC_SUB (1<<12) #define S8_BLENDFUNC_RVRSE_SUB (2<<12) #define S8_BLENDFUNC_MIN (3<<12) #define S8_BLENDFUNC_MAX (4<<12) #define S8_SRC_BLEND_FACTOR_SHIFT 8 #define S8_DST_BLEND_FACTOR_SHIFT 4 #define S8_ENABLE_DEPTH_BUFFER_WRITE (1<<3) #define S8_ENABLE_COLOR_BUFFER_WRITE (1<<2) #define _3DSTATE_LOAD_STATE_IMMEDIATE_2 (CMD_3D|(0x1d<<24)|(0x03<<16)) #define LOAD_TEXTURE_MAP(x) (1<<((x)+11)) #define LOAD_TEXTURE_BLEND_STAGE(x) (1<<((x)+7)) #define LOAD_GLOBAL_COLOR_FACTOR (1<<6) #define TM0S0_ADDRESS_MASK 0xfffffffc #define TM0S0_USE_FENCE (1<<1) #define TM0S1_HEIGHT_SHIFT 21 #define TM0S1_WIDTH_SHIFT 10 #define TM0S1_PALETTE_SELECT (1<<9) #define TM0S1_MAPSURF_FORMAT_MASK (0x7 << 6) #define TM0S1_MAPSURF_FORMAT_SHIFT 6 #define MAPSURF_8BIT_INDEXED (0<<6) #define MAPSURF_8BIT (1<<6) #define MAPSURF_16BIT (2<<6) #define MAPSURF_32BIT (3<<6) #define MAPSURF_411 (4<<6) #define MAPSURF_422 (5<<6) #define MAPSURF_COMPRESSED (6<<6) #define MAPSURF_4BIT_INDEXED (7<<6) #define TM0S1_MT_FORMAT_MASK (0x7 << 3) #define TM0S1_MT_FORMAT_SHIFT 3 #define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */ #define MT_8BIT_IDX_RGB565 (0<<3) /* SURFACE_8BIT_INDEXED */ #define MT_8BIT_IDX_ARGB1555 (1<<3) #define MT_8BIT_IDX_ARGB4444 (2<<3) #define MT_8BIT_IDX_AY88 (3<<3) #define MT_8BIT_IDX_ABGR8888 (4<<3) #define MT_8BIT_IDX_BUMP_88DVDU (5<<3) #define MT_8BIT_IDX_BUMP_655LDVDU (6<<3) #define MT_8BIT_IDX_ARGB8888 (7<<3) #define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */ #define MT_8BIT_L8 (1<<3) #define MT_8BIT_A8 (4<<3) #define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */ #define MT_16BIT_ARGB1555 (1<<3) #define MT_16BIT_ARGB4444 (2<<3) #define MT_16BIT_AY88 (3<<3) #define MT_16BIT_DIB_ARGB1555_8888 (4<<3) #define MT_16BIT_BUMP_88DVDU (5<<3) #define MT_16BIT_BUMP_655LDVDU (6<<3) #define MT_16BIT_DIB_RGB565_8888 (7<<3) #define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ #define MT_32BIT_ABGR8888 (1<<3) #define MT_32BIT_XRGB8888 (2<<3) #define MT_32BIT_XBGR8888 (3<<3) #define MT_32BIT_BUMP_XLDVDU_8888 (6<<3) #define MT_32BIT_DIB_8888 (7<<3) #define MT_411_YUV411 (0<<3) /* SURFACE_411 */ #define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */ #define MT_422_YCRCB_NORMAL (1<<3) #define MT_422_YCRCB_SWAPUV (2<<3) #define MT_422_YCRCB_SWAPUVY (3<<3) #define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */ #define MT_COMPRESS_DXT2_3 (1<<3) #define MT_COMPRESS_DXT4_5 (2<<3) #define MT_COMPRESS_FXT1 (3<<3) #define TM0S1_COLORSPACE_CONVERSION (1 << 2) #define TM0S1_TILED_SURFACE (1 << 1) #define TM0S1_TILE_WALK (1 << 0) #define TM0S2_PITCH_SHIFT 21 #define TM0S2_CUBE_FACE_ENA_SHIFT 15 #define TM0S2_CUBE_FACE_ENA_MASK (1<<15) #define TM0S2_MAP_FORMAT (1<<14) #define TM0S2_MAP_2D (0<<14) #define TM0S2_MAP_3D_CUBE (1<<14) #define TM0S2_VERTICAL_LINE_STRIDE (1<<13) #define TM0S2_VERITCAL_LINE_STRIDE_OFF (1<<12) #define TM0S2_OUTPUT_CHAN_SHIFT 10 #define TM0S2_OUTPUT_CHAN_MASK (3<<10) #define TM0S3_MIP_FILTER_MASK (0x3<<30) #define TM0S3_MIP_FILTER_SHIFT 30 #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #define TM0S3_MAG_FILTER_MASK (0x3<<28) #define TM0S3_MAG_FILTER_SHIFT 28 #define TM0S3_MIN_FILTER_MASK (0x3<<26) #define TM0S3_MIN_FILTER_SHIFT 26 #define FILTER_NEAREST 0 #define FILTER_LINEAR 1 #define FILTER_ANISOTROPIC 2 #define TM0S3_LOD_BIAS_SHIFT 17 #define TM0S3_LOD_BIAS_MASK (0x1ff<<17) #define TM0S3_MAX_MIP_SHIFT 9 #define TM0S3_MAX_MIP_MASK (0xff<<9) #define TM0S3_MIN_MIP_SHIFT 3 #define TM0S3_MIN_MIP_MASK (0x3f<<3) #define TM0S3_KILL_PIXEL (1<<2) #define TM0S3_KEYED_FILTER (1<<1) #define TM0S3_CHROMA_KEY (1<<0) /* _3DSTATE_MAP_TEXEL_STREAM, p188 */ #define _3DSTATE_MAP_TEX_STREAM_CMD (CMD_3D|(0x1c<<24)|(0x05<<19)) #define DISABLE_TEX_STREAM_BUMP (1<<12) #define ENABLE_TEX_STREAM_BUMP ((1<<12)|(1<<11)) #define TEX_MODIFY_UNIT_0 0 #define TEX_MODIFY_UNIT_1 (1<<8) #define ENABLE_TEX_STREAM_COORD_SET (1<<7) #define TEX_STREAM_COORD_SET(x) ((x)<<4) #define ENABLE_TEX_STREAM_MAP_IDX (1<<3) #define TEX_STREAM_MAP_IDX(x) (x) #define FLUSH_MAP_CACHE (1<<0) #define _3DSTATE_MAP_FILTER_CMD (CMD_3D|(0x1c<<24)|(0x02<<19)) #define FILTER_TEXMAP_INDEX(x) ((x) << 16) #define MAG_MODE_FILTER_ENABLE (1 << 5) #define MIN_MODE_FILTER_ENABLE (1 << 2) #define MAG_MAPFILTER_NEAREST (0 << 3) #define MAG_MAPFILTER_LINEAR (1 << 3) #define MAG_MAPFILTER_ANISOTROPIC (2 << 3) #define MIN_MAPFILTER_NEAREST (0) #define MIN_MAPFILTER_LINEAR (1) #define MIN_MAPFILTER_ANISOTROPIC (2) #define ENABLE_KEYS (1<<15) #define DISABLE_COLOR_KEY 0 #define DISABLE_CHROMA_KEY 0 #define DISABLE_KILL_PIXEL 0 #define ENABLE_MIP_MODE_FILTER (1 << 9) #define MIPFILTER_NONE 0 #define MIPFILTER_NEAREST 1 #define MIPFILTER_LINEAR 3 #endif xf86-video-intel-2.99.917/xvmc/i915_program.h0000664000175000017500000002554712400044327015304 00000000000000#ifndef _I915_PROGRAM_H #define _I915_PROGRAM_H #define REG_TYPE_R 0 /* temporary regs, no need to * dcl, must be written before * read -- Preserved between * phases. */ #define REG_TYPE_T 1 /* Interpolated values, must be * dcl'ed before use. * * 0..7: texture coord, * 8: diffuse spec, * 9: specular color, * 10: fog parameter in w. */ #define REG_TYPE_CONST 2 /* Restriction: only one const * can be referenced per * instruction, though it may be * selected for multiple inputs. * Constants not initialized * default to zero. */ #define REG_TYPE_S 3 /* sampler */ #define REG_TYPE_OC 4 /* output color (rgba) */ #define REG_TYPE_OD 5 /* output depth (w), xyz are * temporaries. If not written, * interpolated depth is used? */ #define REG_TYPE_U 6 /* unpreserved temporaries */ #define REG_TYPE_MASK 0x7 #define REG_NR_MASK 0xf /* REG_TYPE_T: */ #define T_TEX0 0 #define T_TEX1 1 #define T_TEX2 2 #define T_TEX3 3 #define T_TEX4 4 #define T_TEX5 5 #define T_TEX6 6 #define T_TEX7 7 #define T_DIFFUSE 8 #define T_SPECULAR 9 #define T_FOG_W 10 /* interpolated fog is in W coord */ /* Arithmetic instructions */ /* .replicate_swizzle == selection and replication of a particular * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww */ #define A0_NOP (0x0<<24) /* no operation */ #define A0_ADD (0x1<<24) /* dst = src0 + src1 */ #define A0_MOV (0x2<<24) /* dst = src0 */ #define A0_MUL (0x3<<24) /* dst = src0 * src1 */ #define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ #define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ #define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ #define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ #define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ #define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ #define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ #define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ #define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ #define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ #define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ #define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ #define A0_FLR (0x10<<24) /* dst = floor(src0) */ #define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ #define A0_TRC (0x12<<24) /* dst = int(src0) */ #define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ #define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ #define A0_DEST_SATURATE (1<<22) #define A0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ #define A0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define A0_DEST_CHANNEL_X (1<<10) #define A0_DEST_CHANNEL_Y (2<<10) #define A0_DEST_CHANNEL_Z (4<<10) #define A0_DEST_CHANNEL_W (8<<10) #define A0_DEST_CHANNEL_ALL (0xf<<10) #define A0_DEST_CHANNEL_SHIFT 10 #define A0_SRC0_TYPE_SHIFT 7 #define A0_SRC0_NR_SHIFT 2 #define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) #define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) #define SRC_X 0 #define SRC_Y 1 #define SRC_Z 2 #define SRC_W 3 #define SRC_ZERO 4 #define SRC_ONE 5 #define A1_SRC0_CHANNEL_X_NEGATE (1<<31) #define A1_SRC0_CHANNEL_X_SHIFT 28 #define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) #define A1_SRC0_CHANNEL_Y_SHIFT 24 #define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) #define A1_SRC0_CHANNEL_Z_SHIFT 20 #define A1_SRC0_CHANNEL_W_NEGATE (1<<19) #define A1_SRC0_CHANNEL_W_SHIFT 16 #define A1_SRC1_TYPE_SHIFT 13 #define A1_SRC1_NR_SHIFT 8 #define A1_SRC1_CHANNEL_X_NEGATE (1<<7) #define A1_SRC1_CHANNEL_X_SHIFT 4 #define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) #define A1_SRC1_CHANNEL_Y_SHIFT 0 #define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) #define A2_SRC1_CHANNEL_Z_SHIFT 28 #define A2_SRC1_CHANNEL_W_NEGATE (1<<27) #define A2_SRC1_CHANNEL_W_SHIFT 24 #define A2_SRC2_TYPE_SHIFT 21 #define A2_SRC2_NR_SHIFT 16 #define A2_SRC2_CHANNEL_X_NEGATE (1<<15) #define A2_SRC2_CHANNEL_X_SHIFT 12 #define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) #define A2_SRC2_CHANNEL_Y_SHIFT 8 #define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) #define A2_SRC2_CHANNEL_Z_SHIFT 4 #define A2_SRC2_CHANNEL_W_NEGATE (1<<3) #define A2_SRC2_CHANNEL_W_SHIFT 0 /* Declaration instructions */ #define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) * register or an s (sampler) * register. */ #define D0_SAMPLE_TYPE_SHIFT 22 #define D0_SAMPLE_TYPE_2D (0x0<<22) #define D0_SAMPLE_TYPE_CUBE (0x1<<22) #define D0_SAMPLE_TYPE_VOLUME (0x2<<22) #define D0_SAMPLE_TYPE_MASK (0x3<<22) #define D0_TYPE_SHIFT 19 /* Allow: T, S */ #define D0_NR_SHIFT 14 /* Allow T: 0..10, S: 0..15 */ #define D0_CHANNEL_X (1<<10) #define D0_CHANNEL_Y (2<<10) #define D0_CHANNEL_Z (4<<10) #define D0_CHANNEL_W (8<<10) #define D0_CHANNEL_ALL (0xf<<10) #define D0_CHANNEL_NONE (0<<10) #define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) #define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse * or specular declarations. * * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) * * Must be zero for S (sampler) dcls */ #define D1_MBZ 0 #define D2_MBZ 0 /* Texture instructions */ #define T0_TEXLD (0x15<<24) /* Sample texture using predeclared * sampler and address, and output * filtered texel data to destination * register */ #define T0_TEXLDP (0x16<<24) /* Same as texld but performs a * perspective divide of the texture * coordinate .xyz values by .w before * sampling. */ #define T0_TEXLDB (0x17<<24) /* Same as texld but biases the * computed LOD by w. Only S4.6 two's * comp is used. This implies that a * float to fixed conversion is * done. */ #define T0_TEXKILL (0x18<<24) /* Does not perform a sampling * operation. Simply kills the pixel * if any channel of the address * register is < 0.0. */ #define T0_DEST_TYPE_SHIFT 19 /* Allow: R, OC, OD, U */ /* Note: U (unpreserved) regs do not retain their values between * phases (cannot be used for feedback) * * Note: oC and OD registers can only be used as the destination of a * texture instruction once per phase (this is an implementation * restriction). */ #define T0_DEST_NR_SHIFT 14 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ #define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ #define T0_SAMPLER_NR_MASK (0xf<<0) #define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ #define T1_ADDRESS_REG_NR_SHIFT 17 #define T2_MBZ 0 /* Having zero and one in here makes the definition of swizzle a lot * easier. */ #define UREG_TYPE_SHIFT 29 #define UREG_NR_SHIFT 24 #define UREG_CHANNEL_X_NEGATE_SHIFT 23 #define UREG_CHANNEL_X_SHIFT 20 #define UREG_CHANNEL_Y_NEGATE_SHIFT 19 #define UREG_CHANNEL_Y_SHIFT 16 #define UREG_CHANNEL_Z_NEGATE_SHIFT 15 #define UREG_CHANNEL_Z_SHIFT 12 #define UREG_CHANNEL_W_NEGATE_SHIFT 11 #define UREG_CHANNEL_W_SHIFT 8 #define UREG_CHANNEL_ZERO_NEGATE_MBZ 5 #define UREG_CHANNEL_ZERO_SHIFT 4 #define UREG_CHANNEL_ONE_NEGATE_MBZ 1 #define UREG_CHANNEL_ONE_SHIFT 0 #define UREG_BAD 0xffffffff /* not a valid ureg */ #define X SRC_X #define Y SRC_Y #define Z SRC_Z #define W SRC_W #define ZERO SRC_ZERO #define ONE SRC_ONE /* Construct a ureg: */ #define UREG(type, nr) (((type) << UREG_TYPE_SHIFT) | \ ((nr) << UREG_NR_SHIFT) | \ (X << UREG_CHANNEL_X_SHIFT) | \ (Y << UREG_CHANNEL_Y_SHIFT) | \ (Z << UREG_CHANNEL_Z_SHIFT) | \ (W << UREG_CHANNEL_W_SHIFT) | \ (ZERO << UREG_CHANNEL_ZERO_SHIFT) | \ (ONE << UREG_CHANNEL_ONE_SHIFT)) #define GET_CHANNEL_SRC( reg, channel ) ((reg<<(channel*4)) & (0xf<<20)) #define CHANNEL_SRC( src, channel ) (src>>(channel*4)) #define GET_UREG_TYPE(reg) (((reg) >> UREG_TYPE_SHIFT) & REG_TYPE_MASK) #define GET_UREG_NR(reg) (((reg) >> UREG_NR_SHIFT) & REG_NR_MASK) #define UREG_XYZW_CHANNEL_MASK 0x00ffff00 #define A0_DEST(reg) (((reg) & UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT) #define D0_DEST(reg) (((reg) & UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT) #define T0_DEST(reg) (((reg) & UREG_TYPE_NR_MASK) >> UREG_A0_DEST_SHIFT_LEFT) #define A0_SRC0(reg) (((reg) & UREG_MASK) >> UREG_A0_SRC0_SHIFT_LEFT) #define A1_SRC0(reg) (((reg) & UREG_MASK) << UREG_A1_SRC0_SHIFT_RIGHT) #define A1_SRC1(reg) (((reg) & UREG_MASK) >> UREG_A1_SRC1_SHIFT_LEFT) #define A2_SRC1(reg) (((reg) & UREG_MASK) << UREG_A2_SRC1_SHIFT_RIGHT) #define A2_SRC2(reg) (((reg) & UREG_MASK) >> UREG_A2_SRC2_SHIFT_LEFT) /* These are special, and don't have swizzle/negate bits. */ #define T0_SAMPLER( reg ) (GET_UREG_NR(reg) << T0_SAMPLER_NR_SHIFT) #define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg) << T1_ADDRESS_REG_NR_SHIFT) | \ (GET_UREG_TYPE(reg) << T1_ADDRESS_REG_TYPE_SHIFT)) /* Macros for translating UREG's into the various register fields used * by the I915 programmable unit. */ #define UREG_A0_DEST_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_DEST_TYPE_SHIFT) #define UREG_A0_SRC0_SHIFT_LEFT (UREG_TYPE_SHIFT - A0_SRC0_TYPE_SHIFT) #define UREG_A1_SRC0_SHIFT_RIGHT (A1_SRC0_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT) #define UREG_A1_SRC1_SHIFT_LEFT (UREG_TYPE_SHIFT - A1_SRC1_TYPE_SHIFT) #define UREG_A2_SRC1_SHIFT_RIGHT (A2_SRC1_CHANNEL_W_SHIFT - UREG_CHANNEL_W_SHIFT) #define UREG_A2_SRC2_SHIFT_LEFT (UREG_TYPE_SHIFT - A2_SRC2_TYPE_SHIFT) #define UREG_MASK 0xffffff00 #define UREG_TYPE_NR_MASK ((REG_TYPE_MASK << UREG_TYPE_SHIFT) | \ (REG_NR_MASK << UREG_NR_SHIFT)) #endif xf86-video-intel-2.99.917/xvmc/i965_reg.h0000664000175000017500000005032512400044327014407 00000000000000/* * New regs for broadwater -- we need to split this file up sensibly somehow. */ #define BRW_3D(Pipeline,Opcode,Subopcode) ((3 << 29) | \ ((Pipeline) << 27) | \ ((Opcode) << 24) | \ ((Subopcode) << 16)) #define BRW_URB_FENCE BRW_3D(0, 0, 0) #define BRW_CS_URB_STATE BRW_3D(0, 0, 1) #define BRW_CONSTANT_BUFFER BRW_3D(0, 0, 2) #define BRW_STATE_PREFETCH BRW_3D(0, 0, 3) #define BRW_STATE_BASE_ADDRESS BRW_3D(0, 1, 1) #define BRW_STATE_SIP BRW_3D(0, 1, 2) #define BRW_PIPELINE_SELECT BRW_3D(0, 1, 4) #define NEW_PIPELINE_SELECT BRW_3D(1, 1, 4) #define BRW_MEDIA_STATE_POINTERS BRW_3D(2, 0, 0) #define BRW_MEDIA_OBJECT BRW_3D(2, 1, 0) #define BRW_3DSTATE_PIPELINED_POINTERS BRW_3D(3, 0, 0) #define BRW_3DSTATE_BINDING_TABLE_POINTERS BRW_3D(3, 0, 1) # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_PS (1 << 12)/* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_GS (1 << 9) /* for GEN6 */ # define GEN6_3DSTATE_BINDING_TABLE_MODIFY_VS (1 << 8) /* for GEN6 */ #define BRW_3DSTATE_VERTEX_BUFFERS BRW_3D(3, 0, 8) #define BRW_3DSTATE_VERTEX_ELEMENTS BRW_3D(3, 0, 9) #define BRW_3DSTATE_INDEX_BUFFER BRW_3D(3, 0, 0xa) #define BRW_3DSTATE_VF_STATISTICS BRW_3D(3, 0, 0xb) #define BRW_3DSTATE_DRAWING_RECTANGLE BRW_3D(3, 1, 0) #define BRW_3DSTATE_CONSTANT_COLOR BRW_3D(3, 1, 1) #define BRW_3DSTATE_SAMPLER_PALETTE_LOAD BRW_3D(3, 1, 2) #define BRW_3DSTATE_CHROMA_KEY BRW_3D(3, 1, 4) #define BRW_3DSTATE_DEPTH_BUFFER BRW_3D(3, 1, 5) # define BRW_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT 29 # define BRW_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT 18 #define BRW_3DSTATE_POLY_STIPPLE_OFFSET BRW_3D(3, 1, 6) #define BRW_3DSTATE_POLY_STIPPLE_PATTERN BRW_3D(3, 1, 7) #define BRW_3DSTATE_LINE_STIPPLE BRW_3D(3, 1, 8) #define BRW_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP BRW_3D(3, 1, 9) /* These two are BLC and CTG only, not BW or CL */ #define BRW_3DSTATE_AA_LINE_PARAMS BRW_3D(3, 1, 0xa) #define BRW_3DSTATE_GS_SVB_INDEX BRW_3D(3, 1, 0xb) #define BRW_PIPE_CONTROL BRW_3D(3, 2, 0) #define BRW_3DPRIMITIVE BRW_3D(3, 3, 0) #define BRW_3DSTATE_CLEAR_PARAMS BRW_3D(3, 1, 0x10) /* DW1 */ # define BRW_3DSTATE_DEPTH_CLEAR_VALID (1 << 15) /* for GEN6+ */ #define GEN6_3DSTATE_SAMPLER_STATE_POINTERS BRW_3D(3, 0, 0x02) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_PS (1 << 12) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_GS (1 << 9) # define GEN6_3DSTATE_SAMPLER_STATE_MODIFY_VS (1 << 8) #define GEN6_3DSTATE_URB BRW_3D(3, 0, 0x05) /* DW1 */ # define GEN6_3DSTATE_URB_VS_SIZE_SHIFT 16 # define GEN6_3DSTATE_URB_VS_ENTRIES_SHIFT 0 /* DW2 */ # define GEN6_3DSTATE_URB_GS_ENTRIES_SHIFT 8 # define GEN6_3DSTATE_URB_GS_SIZE_SHIFT 0 #define GEN6_3DSTATE_VIEWPORT_STATE_POINTERS BRW_3D(3, 0, 0x0d) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CC (1 << 12) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_SF (1 << 11) # define GEN6_3DSTATE_VIEWPORT_STATE_MODIFY_CLIP (1 << 10) #define GEN6_3DSTATE_CC_STATE_POINTERS BRW_3D(3, 0, 0x0e) #define GEN6_3DSTATE_VS BRW_3D(3, 0, 0x10) #define GEN6_3DSTATE_GS BRW_3D(3, 0, 0x11) /* DW4 */ # define GEN6_3DSTATE_GS_DISPATCH_START_GRF_SHIFT 0 #define GEN6_3DSTATE_CLIP BRW_3D(3, 0, 0x12) #define GEN6_3DSTATE_SF BRW_3D(3, 0, 0x13) /* DW1 */ # define GEN6_3DSTATE_SF_NUM_OUTPUTS_SHIFT 22 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN6_3DSTATE_SF_URB_ENTRY_READ_OFFSET_SHIFT 4 /* DW2 */ /* DW3 */ # define GEN6_3DSTATE_SF_CULL_BOTH (0 << 29) # define GEN6_3DSTATE_SF_CULL_NONE (1 << 29) # define GEN6_3DSTATE_SF_CULL_FRONT (2 << 29) # define GEN6_3DSTATE_SF_CULL_BACK (3 << 29) /* DW4 */ # define GEN6_3DSTATE_SF_TRI_PROVOKE_SHIFT 29 # define GEN6_3DSTATE_SF_LINE_PROVOKE_SHIFT 27 # define GEN6_3DSTATE_SF_TRIFAN_PROVOKE_SHIFT 25 #define GEN6_3DSTATE_WM BRW_3D(3, 0, 0x14) /* DW2 */ # define GEN6_3DSTATE_WM_SAMPLER_COUNT_SHITF 27 # define GEN6_3DSTATE_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 /* DW4 */ # define GEN6_3DSTATE_WM_DISPATCH_START_GRF_0_SHIFT 16 /* DW5 */ # define GEN6_3DSTATE_WM_MAX_THREADS_SHIFT 25 # define GEN6_3DSTATE_WM_DISPATCH_ENABLE (1 << 19) # define GEN6_3DSTATE_WM_16_DISPATCH_ENABLE (1 << 1) # define GEN6_3DSTATE_WM_8_DISPATCH_ENABLE (1 << 0) /* DW6 */ # define GEN6_3DSTATE_WM_NUM_SF_OUTPUTS_SHIFT 20 # define GEN6_3DSTATE_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 15) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 14) # define GEN6_3DSTATE_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 13) # define GEN6_3DSTATE_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 12) # define GEN6_3DSTATE_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 11) # define GEN6_3DSTATE_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 10) #define GEN6_3DSTATE_CONSTANT_VS BRW_3D(3, 0, 0x15) #define GEN6_3DSTATE_CONSTANT_GS BRW_3D(3, 0, 0x16) #define GEN6_3DSTATE_CONSTANT_PS BRW_3D(3, 0, 0x17) #define GEN6_3DSTATE_SAMPLE_MASK BRW_3D(3, 0, 0x18) #define GEN6_3DSTATE_MULTISAMPLE BRW_3D(3, 1, 0x0d) /* DW1 */ # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_CENTER (0 << 4) # define GEN6_3DSTATE_MULTISAMPLE_PIXEL_LOCATION_UPPER_LEFT (1 << 4) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_1 (0 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_4 (2 << 1) # define GEN6_3DSTATE_MULTISAMPLE_NUMSAMPLES_8 (3 << 1) /* on GEN7+ */ /* _3DSTATE_VERTEX_BUFFERS on GEN7*/ /* DW1 */ #define GEN7_VB0_ADDRESS_MODIFYENABLE (1 << 14) /* _3DPRIMITIVE on GEN7 */ /* DW1 */ # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8) # define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8) /* 3DSTATE_WM on GEN7 */ /* DW1 */ # define GEN7_WM_STATISTICS_ENABLE (1 << 31) # define GEN7_WM_DEPTH_CLEAR (1 << 30) # define GEN7_WM_DISPATCH_ENABLE (1 << 29) # define GEN6_WM_DEPTH_RESOLVE (1 << 28) # define GEN7_WM_HIERARCHICAL_DEPTH_RESOLVE (1 << 27) # define GEN7_WM_KILL_ENABLE (1 << 25) # define GEN7_WM_PSCDEPTH_OFF (0 << 23) # define GEN7_WM_PSCDEPTH_ON (1 << 23) # define GEN7_WM_PSCDEPTH_ON_GE (2 << 23) # define GEN7_WM_PSCDEPTH_ON_LE (3 << 23) # define GEN7_WM_USES_SOURCE_DEPTH (1 << 20) # define GEN7_WM_USES_SOURCE_W (1 << 19) # define GEN7_WM_POSITION_ZW_PIXEL (0 << 17) # define GEN7_WM_POSITION_ZW_CENTROID (2 << 17) # define GEN7_WM_POSITION_ZW_SAMPLE (3 << 17) # define GEN7_WM_NONPERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 16) # define GEN7_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC (1 << 15) # define GEN7_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC (1 << 14) # define GEN7_WM_PERSPECTIVE_SAMPLE_BARYCENTRIC (1 << 13) # define GEN7_WM_PERSPECTIVE_CENTROID_BARYCENTRIC (1 << 12) # define GEN7_WM_PERSPECTIVE_PIXEL_BARYCENTRIC (1 << 11) # define GEN7_WM_USES_INPUT_COVERAGE_MASK (1 << 10) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5 (0 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_1_0 (1 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_2_0 (2 << 8) # define GEN7_WM_LINE_END_CAP_AA_WIDTH_4_0 (3 << 8) # define GEN7_WM_LINE_AA_WIDTH_0_5 (0 << 6) # define GEN7_WM_LINE_AA_WIDTH_1_0 (1 << 6) # define GEN7_WM_LINE_AA_WIDTH_2_0 (2 << 6) # define GEN7_WM_LINE_AA_WIDTH_4_0 (3 << 6) # define GEN7_WM_POLYGON_STIPPLE_ENABLE (1 << 4) # define GEN7_WM_LINE_STIPPLE_ENABLE (1 << 3) # define GEN7_WM_POINT_RASTRULE_UPPER_RIGHT (1 << 2) # define GEN7_WM_MSRAST_OFF_PIXEL (0 << 0) # define GEN7_WM_MSRAST_OFF_PATTERN (1 << 0) # define GEN7_WM_MSRAST_ON_PIXEL (2 << 0) # define GEN7_WM_MSRAST_ON_PATTERN (3 << 0) /* DW2 */ # define GEN7_WM_MSDISPMODE_PERPIXEL (1 << 31) #define GEN7_3DSTATE_CLEAR_PARAMS BRW_3D(3, 0, 0x04) #define GEN7_3DSTATE_DEPTH_BUFFER BRW_3D(3, 0, 0x05) #define GEN7_3DSTATE_CONSTANT_HS BRW_3D(3, 0, 0x19) #define GEN7_3DSTATE_CONSTANT_DS BRW_3D(3, 0, 0x1a) #define GEN7_3DSTATE_HS BRW_3D(3, 0, 0x1b) #define GEN7_3DSTATE_TE BRW_3D(3, 0, 0x1c) #define GEN7_3DSTATE_DS BRW_3D(3, 0, 0x1d) #define GEN7_3DSTATE_STREAMOUT BRW_3D(3, 0, 0x1e) #define GEN7_3DSTATE_SBE BRW_3D(3, 0, 0x1f) /* DW1 */ # define GEN7_SBE_SWIZZLE_CONTROL_MODE (1 << 28) # define GEN7_SBE_NUM_OUTPUTS_SHIFT 22 # define GEN7_SBE_SWIZZLE_ENABLE (1 << 21) # define GEN7_SBE_POINT_SPRITE_LOWERLEFT (1 << 20) # define GEN7_SBE_URB_ENTRY_READ_LENGTH_SHIFT 11 # define GEN7_SBE_URB_ENTRY_READ_OFFSET_SHIFT 4 #define GEN7_3DSTATE_PS BRW_3D(3, 0, 0x20) /* DW1: kernel pointer */ /* DW2 */ # define GEN7_PS_SPF_MODE (1 << 31) # define GEN7_PS_VECTOR_MASK_ENABLE (1 << 30) # define GEN7_PS_SAMPLER_COUNT_SHIFT 27 # define GEN7_PS_BINDING_TABLE_ENTRY_COUNT_SHIFT 18 # define GEN7_PS_FLOATING_POINT_MODE_IEEE_754 (0 << 16) # define GEN7_PS_FLOATING_POINT_MODE_ALT (1 << 16) /* DW3: scratch space */ /* DW4 */ # define GEN7_PS_MAX_THREADS_SHIFT_IVB 24 # define GEN7_PS_MAX_THREADS_SHIFT_HSW 23 # define GEN7_PS_SAMPLE_MASK_SHIFT_HSW 12 # define GEN7_PS_PUSH_CONSTANT_ENABLE (1 << 11) # define GEN7_PS_ATTRIBUTE_ENABLE (1 << 10) # define GEN7_PS_OMASK_TO_RENDER_TARGET (1 << 9) # define GEN7_PS_DUAL_SOURCE_BLEND_ENABLE (1 << 7) # define GEN7_PS_POSOFFSET_NONE (0 << 3) # define GEN7_PS_POSOFFSET_CENTROID (2 << 3) # define GEN7_PS_POSOFFSET_SAMPLE (3 << 3) # define GEN7_PS_32_DISPATCH_ENABLE (1 << 2) # define GEN7_PS_16_DISPATCH_ENABLE (1 << 1) # define GEN7_PS_8_DISPATCH_ENABLE (1 << 0) /* DW5 */ # define GEN7_PS_DISPATCH_START_GRF_SHIFT_0 16 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_1 8 # define GEN7_PS_DISPATCH_START_GRF_SHIFT_2 0 /* DW6: kernel 1 pointer */ /* DW7: kernel 2 pointer */ #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL BRW_3D(3, 0, 0x21) #define GEN7_3DSTATE_VIEWPORT_STATE_POINTERS_CC BRW_3D(3, 0, 0x23) #define GEN7_3DSTATE_BLEND_STATE_POINTERS BRW_3D(3, 0, 0x24) #define GEN7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS BRW_3D(3, 0, 0x25) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS BRW_3D(3, 0, 0x26) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_HS BRW_3D(3, 0, 0x27) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_DS BRW_3D(3, 0, 0x28) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_GS BRW_3D(3, 0, 0x29) #define GEN7_3DSTATE_BINDING_TABLE_POINTERS_PS BRW_3D(3, 0, 0x2a) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS BRW_3D(3, 0, 0x2b) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_GS BRW_3D(3, 0, 0x2e) #define GEN7_3DSTATE_SAMPLER_STATE_POINTERS_PS BRW_3D(3, 0, 0x2f) #define GEN7_3DSTATE_URB_VS BRW_3D(3, 0, 0x30) #define GEN7_3DSTATE_URB_HS BRW_3D(3, 0, 0x31) #define GEN7_3DSTATE_URB_DS BRW_3D(3, 0, 0x32) #define GEN7_3DSTATE_URB_GS BRW_3D(3, 0, 0x33) /* DW1 */ # define GEN7_URB_ENTRY_NUMBER_SHIFT 0 # define GEN7_URB_ENTRY_SIZE_SHIFT 16 # define GEN7_URB_STARTING_ADDRESS_SHIFT 25 #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_VS BRW_3D(3, 1, 0x12) #define GEN7_3DSTATE_PUSH_CONSTANT_ALLOC_PS BRW_3D(3, 1, 0x16) /* DW1 */ # define GEN7_PUSH_CONSTANT_BUFFER_OFFSET_SHIFT 16 #define PIPELINE_SELECT_3D 0 #define PIPELINE_SELECT_MEDIA 1 #define UF0_CS_REALLOC (1 << 13) #define UF0_VFE_REALLOC (1 << 12) #define UF0_SF_REALLOC (1 << 11) #define UF0_CLIP_REALLOC (1 << 10) #define UF0_GS_REALLOC (1 << 9) #define UF0_VS_REALLOC (1 << 8) #define UF1_CLIP_FENCE_SHIFT 20 #define UF1_GS_FENCE_SHIFT 10 #define UF1_VS_FENCE_SHIFT 0 #define UF2_CS_FENCE_SHIFT 20 #define UF2_VFE_FENCE_SHIFT 10 #define UF2_SF_FENCE_SHIFT 0 /* for BRW_STATE_BASE_ADDRESS */ #define BASE_ADDRESS_MODIFY (1 << 0) /* for BRW_3DSTATE_PIPELINED_POINTERS */ #define BRW_GS_DISABLE 0 #define BRW_GS_ENABLE 1 #define BRW_CLIP_DISABLE 0 #define BRW_CLIP_ENABLE 1 /* for BRW_PIPE_CONTROL */ #define BRW_PIPE_CONTROL_CS_STALL (1 << 20) #define BRW_PIPE_CONTROL_NOWRITE (0 << 14) #define BRW_PIPE_CONTROL_WRITE_QWORD (1 << 14) #define BRW_PIPE_CONTROL_WRITE_DEPTH (2 << 14) #define BRW_PIPE_CONTROL_WRITE_TIME (3 << 14) #define BRW_PIPE_CONTROL_DEPTH_STALL (1 << 13) #define BRW_PIPE_CONTROL_WC_FLUSH (1 << 12) #define BRW_PIPE_CONTROL_IS_FLUSH (1 << 11) #define BRW_PIPE_CONTROL_TC_FLUSH (1 << 10) #define BRW_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8) #define BRW_PIPE_CONTROL_GLOBAL_GTT (1 << 2) #define BRW_PIPE_CONTROL_LOCAL_PGTT (0 << 2) #define BRW_PIPE_CONTROL_STALL_AT_SCOREBOARD (1 << 1) #define BRW_PIPE_CONTROL_DEPTH_CACHE_FLUSH (1 << 0) /* VERTEX_BUFFER_STATE Structure */ #define VB0_BUFFER_INDEX_SHIFT 27 #define GEN6_VB0_BUFFER_INDEX_SHIFT 26 #define VB0_VERTEXDATA (0 << 26) #define VB0_INSTANCEDATA (1 << 26) #define GEN6_VB0_VERTEXDATA (0 << 20) #define GEN6_VB0_INSTANCEDATA (1 << 20) #define VB0_BUFFER_PITCH_SHIFT 0 /* VERTEX_ELEMENT_STATE Structure */ #define VE0_VERTEX_BUFFER_INDEX_SHIFT 27 #define GEN6_VE0_VERTEX_BUFFER_INDEX_SHIFT 26 /* for GEN6 */ #define VE0_VALID (1 << 26) #define GEN6_VE0_VALID (1 << 25) /* for GEN6 */ #define VE0_FORMAT_SHIFT 16 #define VE0_OFFSET_SHIFT 0 #define VE1_VFCOMPONENT_0_SHIFT 28 #define VE1_VFCOMPONENT_1_SHIFT 24 #define VE1_VFCOMPONENT_2_SHIFT 20 #define VE1_VFCOMPONENT_3_SHIFT 16 #define VE1_DESTINATION_ELEMENT_OFFSET_SHIFT 0 /* 3DPRIMITIVE bits */ #define BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL (0 << 15) #define BRW_3DPRIMITIVE_VERTEX_RANDOM (1 << 15) /* Primitive types are in brw_defines.h */ #define BRW_3DPRIMITIVE_TOPOLOGY_SHIFT 10 #define BRW_SVG_CTL 0x7400 #define BRW_SVG_CTL_GS_BA (0 << 8) #define BRW_SVG_CTL_SS_BA (1 << 8) #define BRW_SVG_CTL_IO_BA (2 << 8) #define BRW_SVG_CTL_GS_AUB (3 << 8) #define BRW_SVG_CTL_IO_AUB (4 << 8) #define BRW_SVG_CTL_SIP (5 << 8) #define BRW_SVG_RDATA 0x7404 #define BRW_SVG_WORK_CTL 0x7408 #define BRW_VF_CTL 0x7500 #define BRW_VF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID (0 << 8) #define BRW_VF_CTL_SNAPSHOT_MUX_SELECT_VF_DEBUG (1 << 8) #define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_SEQUENCE (0 << 4) #define BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX (1 << 4) #define BRW_VF_CTL_SKIP_INITIAL_PRIMITIVES (1 << 3) #define BRW_VF_CTL_MAX_PRIMITIVES_LIMIT_ENABLE (1 << 2) #define BRW_VF_CTL_VERTEX_RANGE_LIMIT_ENABLE (1 << 1) #define BRW_VF_CTL_SNAPSHOT_ENABLE (1 << 0) #define BRW_VF_STRG_VAL 0x7504 #define BRW_VF_STR_VL_OVR 0x7508 #define BRW_VF_VC_OVR 0x750c #define BRW_VF_STR_PSKIP 0x7510 #define BRW_VF_MAX_PRIM 0x7514 #define BRW_VF_RDATA 0x7518 #define BRW_VS_CTL 0x7600 #define BRW_VS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_0 (0 << 8) #define BRW_VS_CTL_SNAPSHOT_MUX_VERTEX_1 (1 << 8) #define BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT (2 << 8) #define BRW_VS_CTL_SNAPSHOT_MUX_VS_KERNEL_POINTER (3 << 8) #define BRW_VS_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define BRW_VS_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define BRW_VS_CTL_SNAPSHOT_ENABLE (1 << 0) #define BRW_VS_STRG_VAL 0x7604 #define BRW_VS_RDATA 0x7608 #define BRW_SF_CTL 0x7b00 #define BRW_SF_CTL_SNAPSHOT_COMPLETE (1 << 31) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_FF_ID (0 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_0_REL_COUNT (1 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_FF_ID (2 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_1_REL_COUNT (3 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_FF_ID (4 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_2_REL_COUNT (5 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT (6 << 8) #define BRW_SF_CTL_SNAPSHOT_MUX_SF_KERNEL_POINTER (7 << 8) #define BRW_SF_CTL_MIN_MAX_PRIMITIVE_RANGE_ENABLE (1 << 4) #define BRW_SF_CTL_DEBUG_CLIP_RECTANGLE_ENABLE (1 << 3) #define BRW_SF_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define BRW_SF_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define BRW_SF_CTL_SNAPSHOT_ENABLE (1 << 0) #define BRW_SF_STRG_VAL 0x7b04 #define BRW_SF_RDATA 0x7b18 #define BRW_WIZ_CTL 0x7c00 #define BRW_WIZ_CTL_SNAPSHOT_COMPLETE (1 << 31) #define BRW_WIZ_CTL_SUBSPAN_INSTANCE_SHIFT 16 #define BRW_WIZ_CTL_SNAPSHOT_MUX_WIZ_KERNEL_POINTER (0 << 8) #define BRW_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE (1 << 8) #define BRW_WIZ_CTL_SNAPSHOT_MUX_PRIMITIVE_SEQUENCE (2 << 8) #define BRW_WIZ_CTL_SINGLE_SUBSPAN_DISPATCH (1 << 6) #define BRW_WIZ_CTL_IGNORE_COLOR_SCOREBOARD_STALLS (1 << 5) #define BRW_WIZ_CTL_ENABLE_SUBSPAN_INSTANCE_COMPARE (1 << 4) #define BRW_WIZ_CTL_USE_UPSTREAM_SNAPSHOT_FLAG (1 << 3) #define BRW_WIZ_CTL_SNAPSHOT_ALL_THREADS (1 << 2) #define BRW_WIZ_CTL_THREAD_SNAPSHOT_ENABLE (1 << 1) #define BRW_WIZ_CTL_SNAPSHOT_ENABLE (1 << 0) #define BRW_WIZ_STRG_VAL 0x7c04 #define BRW_WIZ_RDATA 0x7c18 #define BRW_TS_CTL 0x7e00 #define BRW_TS_CTL_SNAPSHOT_COMPLETE (1 << 31) #define BRW_TS_CTL_SNAPSHOT_MESSAGE_ERROR (0 << 8) #define BRW_TS_CTL_SNAPSHOT_INTERFACE_DESCRIPTOR (3 << 8) #define BRW_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS (1 << 2) #define BRW_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS (1 << 1) #define BRW_TS_CTL_SNAPSHOT_ENABLE (1 << 0) #define BRW_TS_STRG_VAL 0x7e04 #define BRW_TS_RDATA 0x7e08 #define BRW_TD_CTL 0x8000 #define BRW_TD_CTL_MUX_SHIFT 8 #define BRW_TD_CTL_EXTERNAL_HALT_R0_DEBUG_MATCH (1 << 7) #define BRW_TD_CTL_FORCE_EXTERNAL_HALT (1 << 6) #define BRW_TD_CTL_EXCEPTION_MASK_OVERRIDE (1 << 5) #define BRW_TD_CTL_FORCE_THREAD_BREAKPOINT_ENABLE (1 << 4) #define BRW_TD_CTL_BREAKPOINT_ENABLE (1 << 2) #define BRW_TD_CTL2 0x8004 #define BRW_TD_CTL2_ILLEGAL_OPCODE_EXCEPTION_OVERRIDE (1 << 28) #define BRW_TD_CTL2_MASKSTACK_EXCEPTION_OVERRIDE (1 << 26) #define BRW_TD_CTL2_SOFTWARE_EXCEPTION_OVERRIDE (1 << 25) #define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_SHIFT 16 #define BRW_TD_CTL2_ACTIVE_THREAD_LIMIT_ENABLE (1 << 8) #define BRW_TD_CTL2_THREAD_SPAWNER_EXECUTION_MASK_ENABLE (1 << 7) #define BRW_TD_CTL2_WIZ_EXECUTION_MASK_ENABLE (1 << 6) #define BRW_TD_CTL2_SF_EXECUTION_MASK_ENABLE (1 << 5) #define BRW_TD_CTL2_CLIPPER_EXECUTION_MASK_ENABLE (1 << 4) #define BRW_TD_CTL2_GS_EXECUTION_MASK_ENABLE (1 << 3) #define BRW_TD_CTL2_VS_EXECUTION_MASK_ENABLE (1 << 0) #define BRW_TD_VF_VS_EMSK 0x8008 #define BRW_TD_GS_EMSK 0x800c #define BRW_TD_CLIP_EMSK 0x8010 #define BRW_TD_SF_EMSK 0x8014 #define BRW_TD_WIZ_EMSK 0x8018 #define BRW_TD_0_6_EHTRG_VAL 0x801c #define BRW_TD_0_7_EHTRG_VAL 0x8020 #define BRW_TD_0_6_EHTRG_MSK 0x8024 #define BRW_TD_0_7_EHTRG_MSK 0x8028 #define BRW_TD_RDATA 0x802c #define BRW_TD_TS_EMSK 0x8030 #define BRW_EU_CTL 0x8800 #define BRW_EU_CTL_SELECT_SHIFT 16 #define BRW_EU_CTL_DATA_MUX_SHIFT 8 #define BRW_EU_ATT_0 0x8810 #define BRW_EU_ATT_1 0x8814 #define BRW_EU_ATT_DATA_0 0x8820 #define BRW_EU_ATT_DATA_1 0x8824 #define BRW_EU_ATT_CLR_0 0x8830 #define BRW_EU_ATT_CLR_1 0x8834 #define BRW_EU_RDATA 0x8840 /* End regs for broadwater */ xf86-video-intel-2.99.917/xvmc/Makefile.in0000664000175000017500000006515412445556120014770 00000000000000# Makefile.in generated by automake 1.14.1 from Makefile.am. # @configure_input@ # Copyright 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distclean-generic distclean-libtool \ distclean-tags distdir dvi dvi-am html html-am info info-am \ install install-am install-data install-data-am install-dvi \ install-dvi-am install-exec install-exec-am install-html \ install-html-am install-info install-info-am \ install-libLTLIBRARIES install-man install-pdf install-pdf-am \ install-ps install-ps-am install-strip installcheck \ installcheck-am installdirs installdirs-am maintainer-clean \ maintainer-clean-generic mostlyclean mostlyclean-compile \ mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ tags tags-am uninstall uninstall-am uninstall-libLTLIBRARIES # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: xf86-video-intel-2.99.917/xvmc/intel_batchbuffer.c0000664000175000017500000001003112400044327016505 00000000000000/************************************************************************** * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include "intel_xvmc_private.h" #include "intel_batchbuffer.h" #include "brw_defines.h" #include "brw_structs.h" #define MI_BATCH_BUFFER_END (0xA << 23) #define BATCH_SIZE 8*1024 /* one bo is allocated each time, so the size can be small */ static void i965_end_batch(void) { unsigned int size = xvmc_driver->batch.ptr - xvmc_driver->batch.init_ptr; if ((size & 4) == 0) { *(unsigned int *)xvmc_driver->batch.ptr = 0; xvmc_driver->batch.ptr += 4; } *(unsigned int *)xvmc_driver->batch.ptr = MI_BATCH_BUFFER_END; xvmc_driver->batch.ptr += 4; } static void reset_batch(void) { dri_bo *bo = xvmc_driver->batch.buf; xvmc_driver->batch.ptr = xvmc_driver->batch.init_ptr = bo->virtual; xvmc_driver->batch.size = bo->size; xvmc_driver->batch.space = bo->size - 8; } Bool intelInitBatchBuffer(void) { if ((xvmc_driver->batch.buf = drm_intel_bo_alloc(xvmc_driver->bufmgr, "batch buffer", BATCH_SIZE, 0x1000)) == NULL) { fprintf(stderr, "unable to alloc batch buffer\n"); return False; } if (drm_intel_gem_bo_map_gtt(xvmc_driver->batch.buf)) { drm_intel_bo_unreference(xvmc_driver->batch.buf); return False; } reset_batch(); return True; } void intelFiniBatchBuffer(void) { if (xvmc_driver->batch.buf == NULL) return; drm_intel_bo_unreference(xvmc_driver->batch.buf); } void intelFlushBatch(void) { dri_bo *bo; i965_end_batch(); drm_intel_bo_exec(xvmc_driver->batch.buf, xvmc_driver->batch.ptr - xvmc_driver->batch.init_ptr, 0, 0, 0); bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "batch buffer", BATCH_SIZE, 0x1000); if (bo != NULL && drm_intel_gem_bo_map_gtt(bo) == 0) { drm_intel_bo_unreference(xvmc_driver->batch.buf); xvmc_driver->batch.buf = bo; } else { if (bo != NULL) drm_intel_bo_unreference(bo); drm_intel_gem_bo_map_gtt(xvmc_driver->batch.buf); } reset_batch(); } void intelBatchbufferData(const void *data, unsigned bytes, unsigned flags) { assert(bytes <= xvmc_driver->batch.space); memcpy(xvmc_driver->batch.ptr, data, bytes); xvmc_driver->batch.ptr += bytes; xvmc_driver->batch.space -= bytes; } void intel_batch_emit_reloc(dri_bo * bo, uint32_t read_domain, uint32_t write_domain, uint32_t delta, unsigned char *ptr) { drm_intel_bo_emit_reloc(xvmc_driver->batch.buf, ptr - xvmc_driver->batch.init_ptr, bo, delta, read_domain, write_domain); } xf86-video-intel-2.99.917/xvmc/brw_structs.h0000664000175000017500000011361112400044327015435 00000000000000 /************************************************************************** * * Copyright 2005 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including * without limitation the rights to use, copy, modify, merge, publish, * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ #ifndef BRW_STRUCTS_H #define BRW_STRUCTS_H /* Command packets: */ struct header { unsigned int length:16; unsigned int opcode:16; }; union header_union { struct header bits; unsigned int dword; }; struct brw_3d_control { struct { unsigned int length:8; unsigned int notify_enable:1; unsigned int pad:3; unsigned int wc_flush_enable:1; unsigned int depth_stall_enable:1; unsigned int operation:2; unsigned int opcode:16; } header; struct { unsigned int pad:2; unsigned int dest_addr_type:1; unsigned int dest_addr:29; } dest; unsigned int dword2; unsigned int dword3; }; struct brw_3d_primitive { struct { unsigned int length:8; unsigned int pad:2; unsigned int topology:5; unsigned int indexed:1; unsigned int opcode:16; } header; unsigned int verts_per_instance; unsigned int start_vert_location; unsigned int instance_count; unsigned int start_instance_location; unsigned int base_vert_location; }; /* These seem to be passed around as function args, so it works out * better to keep them as #defines: */ #define BRW_FLUSH_READ_CACHE 0x1 #define BRW_FLUSH_STATE_CACHE 0x2 #define BRW_INHIBIT_FLUSH_RENDER_CACHE 0x4 #define BRW_FLUSH_SNAPSHOT_COUNTERS 0x8 struct brw_mi_flush { unsigned int flags:4; unsigned int pad:12; unsigned int opcode:16; }; struct brw_vf_statistics { unsigned int statistics_enable:1; unsigned int pad:15; unsigned int opcode:16; }; struct brw_binding_table_pointers { struct header header; unsigned int vs; unsigned int gs; unsigned int clp; unsigned int sf; unsigned int wm; }; struct brw_blend_constant_color { struct header header; float blend_constant_color[4]; }; struct brw_depthbuffer { union header_union header; union { struct { unsigned int pitch:18; unsigned int format:3; unsigned int pad:4; unsigned int depth_offset_disable:1; unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int pad2:1; unsigned int surface_type:3; } bits; unsigned int dword; } dword1; unsigned int dword2_base_addr; union { struct { unsigned int pad:1; unsigned int mipmap_layout:1; unsigned int lod:4; unsigned int width:13; unsigned int height:13; } bits; unsigned int dword; } dword3; union { struct { unsigned int pad:12; unsigned int min_array_element:9; unsigned int depth:11; } bits; unsigned int dword; } dword4; }; struct brw_drawrect { struct header header; unsigned int xmin:16; unsigned int ymin:16; unsigned int xmax:16; unsigned int ymax:16; unsigned int xorg:16; unsigned int yorg:16; }; struct brw_global_depth_offset_clamp { struct header header; float depth_offset_clamp; }; struct brw_indexbuffer { union { struct { unsigned int length:8; unsigned int index_format:2; unsigned int cut_index_enable:1; unsigned int pad:5; unsigned int opcode:16; } bits; unsigned int dword; } header; unsigned int buffer_start; unsigned int buffer_end; }; struct brw_line_stipple { struct header header; struct { unsigned int pattern:16; unsigned int pad:16; } bits0; struct { unsigned int repeat_count:9; unsigned int pad:7; unsigned int inverse_repeat_count:16; } bits1; }; struct brw_pipelined_state_pointers { struct header header; struct { unsigned int pad:5; unsigned int offset:27; } vs; struct { unsigned int enable:1; unsigned int pad:4; unsigned int offset:27; } gs; struct { unsigned int enable:1; unsigned int pad:4; unsigned int offset:27; } clp; struct { unsigned int pad:5; unsigned int offset:27; } sf; struct { unsigned int pad:5; unsigned int offset:27; } wm; struct { unsigned int pad:5; unsigned int offset:27; /* KW: check me! */ } cc; }; struct brw_polygon_stipple_offset { struct header header; struct { unsigned int y_offset:5; unsigned int pad:3; unsigned int x_offset:5; unsigned int pad0:19; } bits0; }; struct brw_polygon_stipple { struct header header; unsigned int stipple[32]; }; struct brw_pipeline_select { struct { unsigned int pipeline_select:1; unsigned int pad:15; unsigned int opcode:16; } header; }; struct brw_pipe_control { struct { unsigned int length:8; unsigned int notify_enable:1; unsigned int pad:2; unsigned int instruction_state_cache_flush_enable:1; unsigned int write_cache_flush_enable:1; unsigned int depth_stall_enable:1; unsigned int post_sync_operation:2; unsigned int opcode:16; } header; struct { unsigned int pad:2; unsigned int dest_addr_type:1; unsigned int dest_addr:29; } bits1; unsigned int data0; unsigned int data1; }; struct brw_urb_fence { struct { unsigned int length:8; unsigned int vs_realloc:1; unsigned int gs_realloc:1; unsigned int clp_realloc:1; unsigned int sf_realloc:1; unsigned int vfe_realloc:1; unsigned int cs_realloc:1; unsigned int pad:2; unsigned int opcode:16; } header; struct { unsigned int vs_fence:10; unsigned int gs_fence:10; unsigned int clp_fence:10; unsigned int pad:2; } bits0; struct { unsigned int sf_fence:10; unsigned int vf_fence:10; unsigned int cs_fence:10; unsigned int pad:2; } bits1; }; struct brw_constant_buffer_state /* previously brw_command_streamer */ { struct header header; struct { unsigned int nr_urb_entries:3; unsigned int pad:1; unsigned int urb_entry_size:5; unsigned int pad0:23; } bits0; }; struct brw_constant_buffer { struct { unsigned int length:8; unsigned int valid:1; unsigned int pad:7; unsigned int opcode:16; } header; struct { unsigned int buffer_length:6; unsigned int buffer_address:26; } bits0; }; struct brw_state_base_address { struct header header; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int general_state_address:27; } bits0; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int surface_state_address:27; } bits1; struct { unsigned int modify_enable:1; unsigned int pad:4; unsigned int indirect_object_state_address:27; } bits2; struct { unsigned int modify_enable:1; unsigned int pad:11; unsigned int general_state_upper_bound:20; } bits3; struct { unsigned int modify_enable:1; unsigned int pad:11; unsigned int indirect_object_state_upper_bound:20; } bits4; }; struct brw_state_prefetch { struct header header; struct { unsigned int prefetch_count:3; unsigned int pad:3; unsigned int prefetch_pointer:26; } bits0; }; struct brw_system_instruction_pointer { struct header header; struct { unsigned int pad:4; unsigned int system_instruction_pointer:28; } bits0; }; /* State structs for the various fixed function units: */ struct thread0 { unsigned int pad0:1; unsigned int grf_reg_count:3; unsigned int pad1:2; unsigned int kernel_start_pointer:26; }; struct thread1 { unsigned int ext_halt_exception_enable:1; unsigned int sw_exception_enable:1; unsigned int mask_stack_exception_enable:1; unsigned int timeout_exception_enable:1; unsigned int illegal_op_exception_enable:1; unsigned int pad0:3; unsigned int depth_coef_urb_read_offset:6; /* WM only */ unsigned int pad1:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int binding_table_entry_count:8; unsigned int pad3:5; unsigned int single_program_flow:1; }; struct thread2 { unsigned int per_thread_scratch_space:4; unsigned int pad0:6; unsigned int scratch_space_base_pointer:22; }; struct thread3 { unsigned int dispatch_grf_start_reg:4; unsigned int urb_entry_read_offset:6; unsigned int pad0:1; unsigned int urb_entry_read_length:6; unsigned int pad1:1; unsigned int const_urb_entry_read_offset:6; unsigned int pad2:1; unsigned int const_urb_entry_read_length:6; unsigned int pad3:1; }; struct brw_clip_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:9; unsigned int gs_output_stats:1; /* not always */ unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:6; /* may be less */ unsigned int pad3:1; } thread4; struct { unsigned int pad0:13; unsigned int clip_mode:3; unsigned int userclip_enable_flags:8; unsigned int userclip_must_clip:1; unsigned int pad1:1; unsigned int guard_band_enable:1; unsigned int viewport_z_clip_enable:1; unsigned int viewport_xy_clip_enable:1; unsigned int vertex_position_space:1; unsigned int api_mode:1; unsigned int pad2:1; } clip5; struct { unsigned int pad0:5; unsigned int clipper_viewport_state_ptr:27; } clip6; float viewport_xmin; float viewport_xmax; float viewport_ymin; float viewport_ymax; }; struct brw_cc_unit_state { struct { unsigned int pad0:3; unsigned int bf_stencil_pass_depth_pass_op:3; unsigned int bf_stencil_pass_depth_fail_op:3; unsigned int bf_stencil_fail_op:3; unsigned int bf_stencil_func:3; unsigned int bf_stencil_enable:1; unsigned int pad1:2; unsigned int stencil_write_enable:1; unsigned int stencil_pass_depth_pass_op:3; unsigned int stencil_pass_depth_fail_op:3; unsigned int stencil_fail_op:3; unsigned int stencil_func:3; unsigned int stencil_enable:1; } cc0; struct { unsigned int bf_stencil_ref:8; unsigned int stencil_write_mask:8; unsigned int stencil_test_mask:8; unsigned int stencil_ref:8; } cc1; struct { unsigned int logicop_enable:1; unsigned int pad0:10; unsigned int depth_write_enable:1; unsigned int depth_test_function:3; unsigned int depth_test:1; unsigned int bf_stencil_write_mask:8; unsigned int bf_stencil_test_mask:8; } cc2; struct { unsigned int pad0:8; unsigned int alpha_test_func:3; unsigned int alpha_test:1; unsigned int blend_enable:1; unsigned int ia_blend_enable:1; unsigned int pad1:1; unsigned int alpha_test_format:1; unsigned int pad2:16; } cc3; struct { unsigned int pad0:5; unsigned int cc_viewport_state_offset:27; } cc4; struct { unsigned int pad0:2; unsigned int ia_dest_blend_factor:5; unsigned int ia_src_blend_factor:5; unsigned int ia_blend_function:3; unsigned int statistics_enable:1; unsigned int logicop_func:4; unsigned int pad1:11; unsigned int dither_enable:1; } cc5; struct { unsigned int clamp_post_alpha_blend:1; unsigned int clamp_pre_alpha_blend:1; unsigned int clamp_range:2; unsigned int pad0:11; unsigned int y_dither_offset:2; unsigned int x_dither_offset:2; unsigned int dest_blend_factor:5; unsigned int src_blend_factor:5; unsigned int blend_function:3; } cc6; struct { union { float f; unsigned char ub[4]; } alpha_ref; } cc7; }; struct brw_sf_unit_state { struct thread0 thread0; struct { unsigned int pad0:7; unsigned int sw_exception_enable:1; unsigned int pad1:3; unsigned int mask_stack_exception_enable:1; unsigned int pad2:1; unsigned int illegal_op_exception_enable:1; unsigned int pad3:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int binding_table_entry_count:8; unsigned int pad4:5; unsigned int single_program_flow:1; } sf1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:6; unsigned int pad3:1; } thread4; struct { unsigned int front_winding:1; unsigned int viewport_transform:1; unsigned int pad0:3; unsigned int sf_viewport_state_offset:27; } sf5; struct { unsigned int pad0:9; unsigned int dest_org_vbias:4; unsigned int dest_org_hbias:4; unsigned int scissor:1; unsigned int disable_2x2_trifilter:1; unsigned int disable_zero_pix_trifilter:1; unsigned int point_rast_rule:2; unsigned int line_endcap_aa_region_width:2; unsigned int line_width:4; unsigned int fast_scissor_disable:1; unsigned int cull_mode:2; unsigned int aa_enable:1; } sf6; struct { unsigned int point_size:11; unsigned int use_point_size_state:1; unsigned int subpixel_precision:1; unsigned int sprite_point:1; unsigned int pad0:11; unsigned int trifan_pv:2; unsigned int linestrip_pv:2; unsigned int tristrip_pv:2; unsigned int line_last_pixel_enable:1; } sf7; }; struct brw_gs_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:1; unsigned int pad3:6; } thread4; struct { unsigned int sampler_count:3; unsigned int pad0:2; unsigned int sampler_state_pointer:27; } gs5; struct { unsigned int max_vp_index:4; unsigned int pad0:26; unsigned int reorder_enable:1; unsigned int pad1:1; } gs6; }; struct brw_vs_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int pad0:10; unsigned int stats_enable:1; unsigned int nr_urb_entries:7; unsigned int pad1:1; unsigned int urb_entry_allocation_size:5; unsigned int pad2:1; unsigned int max_threads:4; unsigned int pad3:3; } thread4; struct { unsigned int sampler_count:3; unsigned int pad0:2; unsigned int sampler_state_pointer:27; } vs5; struct { unsigned int vs_enable:1; unsigned int vert_cache_disable:1; unsigned int pad0:30; } vs6; }; struct brw_wm_unit_state { struct thread0 thread0; struct thread1 thread1; struct thread2 thread2; struct thread3 thread3; struct { unsigned int stats_enable:1; unsigned int pad0:1; unsigned int sampler_count:3; unsigned int sampler_state_pointer:27; } wm4; struct { unsigned int enable_8_pix:1; unsigned int enable_16_pix:1; unsigned int enable_32_pix:1; unsigned int pad0:7; unsigned int legacy_global_depth_bias:1; unsigned int line_stipple:1; unsigned int depth_offset:1; unsigned int polygon_stipple:1; unsigned int line_aa_region_width:2; unsigned int line_endcap_aa_region_width:2; unsigned int early_depth_test:1; unsigned int thread_dispatch_enable:1; unsigned int program_uses_depth:1; unsigned int program_computes_depth:1; unsigned int program_uses_killpixel:1; unsigned int legacy_line_rast: 1; unsigned int transposed_urb_read:1; unsigned int max_threads:7; } wm5; float global_depth_offset_constant; float global_depth_offset_scale; struct { unsigned int pad0:1; unsigned int grf_reg_count_1:3; unsigned int pad1:2; unsigned int kernel_start_pointer_1:26; } wm8; struct { unsigned int pad0:1; unsigned int grf_reg_count_2:3; unsigned int pad1:2; unsigned int kernel_start_pointer_2:26; } wm9; struct { unsigned int pad0:1; unsigned int grf_reg_count_3:3; unsigned int pad1:2; unsigned int kernel_start_pointer_3:26; } wm10; }; struct brw_wm_unit_state_padded { struct brw_wm_unit_state state; char pad[64 - sizeof(struct brw_wm_unit_state)]; }; /* The hardware supports two different modes for border color. The * default (OpenGL) mode uses floating-point color channels, while the * legacy mode uses 4 bytes. * * More significantly, the legacy mode respects the components of the * border color for channels not present in the source, (whereas the * default mode will ignore the border color's alpha channel and use * alpha==1 for an RGB source, for example). * * The legacy mode matches the semantics specified by the Render * extension. */ struct brw_sampler_default_border_color { float color[4]; }; struct brw_sampler_legacy_border_color { uint8_t color[4]; }; struct brw_sampler_state { struct { unsigned int shadow_function:3; unsigned int lod_bias:11; unsigned int min_filter:3; unsigned int mag_filter:3; unsigned int mip_filter:2; unsigned int base_level:5; unsigned int pad:1; unsigned int lod_preclamp:1; unsigned int border_color_mode:1; unsigned int pad0:1; unsigned int disable:1; } ss0; struct { unsigned int r_wrap_mode:3; unsigned int t_wrap_mode:3; unsigned int s_wrap_mode:3; unsigned int pad:3; unsigned int max_lod:10; unsigned int min_lod:10; } ss1; struct { unsigned int pad:5; unsigned int border_color_pointer:27; } ss2; struct { unsigned int pad:19; unsigned int max_aniso:3; unsigned int chroma_key_mode:1; unsigned int chroma_key_index:2; unsigned int chroma_key_enable:1; unsigned int monochrome_filter_width:3; unsigned int monochrome_filter_height:3; } ss3; }; struct brw_clipper_viewport { float xmin; float xmax; float ymin; float ymax; }; struct brw_cc_viewport { float min_depth; float max_depth; }; struct brw_sf_viewport { struct { float m00; float m11; float m22; float m30; float m31; float m32; } viewport; struct { short xmin; short ymin; short xmax; short ymax; } scissor; }; /* Documented in the subsystem/shared-functions/sampler chapter... */ struct brw_surface_state { struct { unsigned int cube_pos_z:1; unsigned int cube_neg_z:1; unsigned int cube_pos_y:1; unsigned int cube_neg_y:1; unsigned int cube_pos_x:1; unsigned int cube_neg_x:1; unsigned int pad:3; unsigned int render_cache_read_mode:1; unsigned int mipmap_layout_mode:1; unsigned int vert_line_stride_ofs:1; unsigned int vert_line_stride:1; unsigned int color_blend:1; unsigned int writedisable_blue:1; unsigned int writedisable_green:1; unsigned int writedisable_red:1; unsigned int writedisable_alpha:1; unsigned int surface_format:9; unsigned int data_return_format:1; unsigned int pad0:1; unsigned int surface_type:3; } ss0; struct { unsigned int base_addr; } ss1; struct { unsigned int render_target_rotation:2; unsigned int mip_count:4; unsigned int width:13; unsigned int height:13; } ss2; struct { unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int pad:1; unsigned int pitch:18; unsigned int depth:11; } ss3; struct { unsigned int pad:19; unsigned int min_array_elt:9; unsigned int min_lod:4; } ss4; struct { unsigned int pad:20; unsigned int y_offset:4; unsigned int pad2:1; unsigned int x_offset:7; } ss5; }; struct brw_vertex_buffer_state { struct { unsigned int pitch:11; unsigned int pad:15; unsigned int access_type:1; unsigned int vb_index:5; } vb0; unsigned int start_addr; unsigned int max_index; #if 1 unsigned int instance_data_step_rate; /* not included for sequential/random vertices? */ #endif }; #define BRW_VBP_MAX 17 struct brw_vb_array_state { struct header header; struct brw_vertex_buffer_state vb[BRW_VBP_MAX]; }; struct brw_vertex_element_state { struct { unsigned int src_offset:11; unsigned int pad:5; unsigned int src_format:9; unsigned int pad0:1; unsigned int valid:1; unsigned int vertex_buffer_index:5; } ve0; struct { unsigned int dst_offset:8; unsigned int pad:8; unsigned int vfcomponent3:4; unsigned int vfcomponent2:4; unsigned int vfcomponent1:4; unsigned int vfcomponent0:4; } ve1; }; #define BRW_VEP_MAX 18 struct brw_vertex_element_packet { struct header header; struct brw_vertex_element_state ve[BRW_VEP_MAX]; /* note: less than _TNL_ATTRIB_MAX */ }; struct brw_urb_immediate { unsigned int opcode:4; unsigned int offset:6; unsigned int swizzle_control:2; unsigned int pad:1; unsigned int allocate:1; unsigned int used:1; unsigned int complete:1; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; }; /* Instruction format for the execution units: */ struct brw_instruction { struct { unsigned int opcode:7; unsigned int pad:1; unsigned int access_mode:1; unsigned int mask_control:1; unsigned int dependency_control:2; unsigned int compression_control:2; unsigned int thread_control:2; unsigned int predicate_control:4; unsigned int predicate_inverse:1; unsigned int execution_size:3; unsigned int destreg__conditonalmod:4; /* destreg - send, conditionalmod - others */ unsigned int pad0:2; unsigned int debug_control:1; unsigned int saturate:1; } header; union { struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int src1_reg_file:2; unsigned int src1_reg_type:3; unsigned int pad:1; unsigned int dest_subreg_nr:5; unsigned int dest_reg_nr:8; unsigned int dest_horiz_stride:2; unsigned int dest_address_mode:1; } da1; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int pad:6; int dest_indirect_offset:10; /* offset against the deref'd address reg */ unsigned int dest_subreg_nr:3; /* subnr for the address reg a0.x */ unsigned int dest_horiz_stride:2; unsigned int dest_address_mode:1; } ia1; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int src1_reg_file:2; unsigned int src1_reg_type:3; unsigned int pad0:1; unsigned int dest_writemask:4; unsigned int dest_subreg_nr:1; unsigned int dest_reg_nr:8; unsigned int pad1:2; unsigned int dest_address_mode:1; } da16; struct { unsigned int dest_reg_file:2; unsigned int dest_reg_type:3; unsigned int src0_reg_file:2; unsigned int src0_reg_type:3; unsigned int pad0:6; unsigned int dest_writemask:4; int dest_indirect_offset:6; unsigned int dest_subreg_nr:3; unsigned int pad1:2; unsigned int dest_address_mode:1; } ia16; } bits1; union { struct { unsigned int src0_subreg_nr:5; unsigned int src0_reg_nr:8; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_horiz_stride:2; unsigned int src0_width:3; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad:6; } da1; struct { int src0_indirect_offset:10; unsigned int src0_subreg_nr:3; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_horiz_stride:2; unsigned int src0_width:3; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad:6; } ia1; struct { unsigned int src0_swz_x:2; unsigned int src0_swz_y:2; unsigned int src0_subreg_nr:1; unsigned int src0_reg_nr:8; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_swz_z:2; unsigned int src0_swz_w:2; unsigned int pad0:1; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } da16; struct { unsigned int src0_swz_x:2; unsigned int src0_swz_y:2; int src0_indirect_offset:6; unsigned int src0_subreg_nr:3; unsigned int src0_abs:1; unsigned int src0_negate:1; unsigned int src0_address_mode:1; unsigned int src0_swz_z:2; unsigned int src0_swz_w:2; unsigned int pad0:1; unsigned int src0_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } ia16; } bits2; union { struct { unsigned int src1_subreg_nr:5; unsigned int src1_reg_nr:8; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad:1; unsigned int src1_horiz_stride:2; unsigned int src1_width:3; unsigned int src1_vert_stride:4; unsigned int pad0:7; } da1; struct { unsigned int src1_swz_x:2; unsigned int src1_swz_y:2; unsigned int src1_subreg_nr:1; unsigned int src1_reg_nr:8; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_swz_z:2; unsigned int src1_swz_w:2; unsigned int pad1:1; unsigned int src1_vert_stride:4; unsigned int pad2:7; } da16; struct { int src1_indirect_offset:10; unsigned int src1_subreg_nr:3; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_horiz_stride:2; unsigned int src1_width:3; unsigned int src1_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad1:6; } ia1; struct { unsigned int src1_swz_x:2; unsigned int src1_swz_y:2; int src1_indirect_offset:6; unsigned int src1_subreg_nr:3; unsigned int src1_abs:1; unsigned int src1_negate:1; unsigned int pad0:1; unsigned int src1_swz_z:2; unsigned int src1_swz_w:2; unsigned int pad1:1; unsigned int src1_vert_stride:4; unsigned int flag_reg_nr:1; unsigned int pad2:6; } ia16; struct { int jump_count:16; /* note: signed */ unsigned int pop_count:4; unsigned int pad0:12; } if_else; struct { unsigned int function:4; unsigned int int_type:1; unsigned int precision:1; unsigned int saturate:1; unsigned int data_type:1; unsigned int pad0:8; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } math; struct { unsigned int binding_table_index:8; unsigned int sampler:4; unsigned int return_format:2; unsigned int msg_type:2; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } sampler; struct brw_urb_immediate urb; struct { unsigned int binding_table_index:8; unsigned int msg_control:4; unsigned int msg_type:2; unsigned int target_cache:2; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } dp_read; struct { unsigned int binding_table_index:8; unsigned int msg_control:3; unsigned int pixel_scoreboard_clear:1; unsigned int msg_type:3; unsigned int send_commit_msg:1; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } dp_write; struct { unsigned int pad:16; unsigned int response_length:4; unsigned int msg_length:4; unsigned int msg_target:4; unsigned int pad1:3; unsigned int end_of_thread:1; } generic; unsigned int ud; } bits3; }; /* media pipeline */ struct brw_vfe_state { struct { unsigned int per_thread_scratch_space:4; unsigned int pad3:3; unsigned int extend_vfe_state_present:1; unsigned int pad2:2; unsigned int scratch_base:22; } vfe0; struct { unsigned int debug_counter_control:2; unsigned int children_present:1; unsigned int vfe_mode:4; unsigned int pad2:2; unsigned int num_urb_entries:7; unsigned int urb_entry_alloc_size:9; unsigned int max_threads:7; } vfe1; struct { unsigned int pad4:4; unsigned int interface_descriptor_base:28; } vfe2; }; struct brw_vld_state { struct { unsigned int pad6:6; unsigned int scan_order:1; unsigned int intra_vlc_format:1; unsigned int quantizer_scale_type:1; unsigned int concealment_motion_vector:1; unsigned int frame_predict_frame_dct:1; unsigned int top_field_first:1; unsigned int picture_structure:2; unsigned int intra_dc_precision:2; unsigned int f_code_0_0:4; unsigned int f_code_0_1:4; unsigned int f_code_1_0:4; unsigned int f_code_1_1:4; } vld0; struct { unsigned int pad2:9; unsigned int picture_coding_type:2; unsigned int pad:21; } vld1; struct { unsigned int index_0:4; unsigned int index_1:4; unsigned int index_2:4; unsigned int index_3:4; unsigned int index_4:4; unsigned int index_5:4; unsigned int index_6:4; unsigned int index_7:4; } desc_remap_table0; struct { unsigned int index_8:4; unsigned int index_9:4; unsigned int index_10:4; unsigned int index_11:4; unsigned int index_12:4; unsigned int index_13:4; unsigned int index_14:4; unsigned int index_15:4; } desc_remap_table1; }; struct brw_interface_descriptor { struct { unsigned int grf_reg_blocks:4; unsigned int pad:2; unsigned int kernel_start_pointer:26; } desc0; struct { unsigned int pad:7; unsigned int software_exception:1; unsigned int pad2:3; unsigned int maskstack_exception:1; unsigned int pad3:1; unsigned int illegal_opcode_exception:1; unsigned int pad4:2; unsigned int floating_point_mode:1; unsigned int thread_priority:1; unsigned int single_program_flow:1; unsigned int pad5:1; unsigned int const_urb_entry_read_offset:6; unsigned int const_urb_entry_read_len:6; } desc1; struct { unsigned int pad:2; unsigned int sampler_count:3; unsigned int sampler_state_pointer:27; } desc2; struct { unsigned int binding_table_entry_count:5; unsigned int binding_table_pointer:27; } desc3; }; struct gen6_blend_state { struct { unsigned int dest_blend_factor:5; unsigned int source_blend_factor:5; unsigned int pad3:1; unsigned int blend_func:3; unsigned int pad2:1; unsigned int ia_dest_blend_factor:5; unsigned int ia_source_blend_factor:5; unsigned int pad1:1; unsigned int ia_blend_func:3; unsigned int pad0:1; unsigned int ia_blend_enable:1; unsigned int blend_enable:1; } blend0; struct { unsigned int post_blend_clamp_enable:1; unsigned int pre_blend_clamp_enable:1; unsigned int clamp_range:2; unsigned int pad0:4; unsigned int x_dither_offset:2; unsigned int y_dither_offset:2; unsigned int dither_enable:1; unsigned int alpha_test_func:3; unsigned int alpha_test_enable:1; unsigned int pad1:1; unsigned int logic_op_func:4; unsigned int logic_op_enable:1; unsigned int pad2:1; unsigned int write_disable_b:1; unsigned int write_disable_g:1; unsigned int write_disable_r:1; unsigned int write_disable_a:1; unsigned int pad3:1; unsigned int alpha_to_coverage_dither:1; unsigned int alpha_to_one:1; unsigned int alpha_to_coverage:1; } blend1; }; struct gen6_color_calc_state { struct { unsigned int alpha_test_format:1; unsigned int pad0:14; unsigned int round_disable:1; unsigned int bf_stencil_ref:8; unsigned int stencil_ref:8; } cc0; union { float alpha_ref_f; struct { unsigned int ui:8; unsigned int pad0:24; } alpha_ref_fi; } cc1; float constant_r; float constant_g; float constant_b; float constant_a; }; struct gen6_depth_stencil_state { struct { unsigned int pad0:3; unsigned int bf_stencil_pass_depth_pass_op:3; unsigned int bf_stencil_pass_depth_fail_op:3; unsigned int bf_stencil_fail_op:3; unsigned int bf_stencil_func:3; unsigned int bf_stencil_enable:1; unsigned int pad1:2; unsigned int stencil_write_enable:1; unsigned int stencil_pass_depth_pass_op:3; unsigned int stencil_pass_depth_fail_op:3; unsigned int stencil_fail_op:3; unsigned int stencil_func:3; unsigned int stencil_enable:1; } ds0; struct { unsigned int bf_stencil_write_mask:8; unsigned int bf_stencil_test_mask:8; unsigned int stencil_write_mask:8; unsigned int stencil_test_mask:8; } ds1; struct { unsigned int pad0:26; unsigned int depth_write_enable:1; unsigned int depth_test_func:3; unsigned int pad1:1; unsigned int depth_test_enable:1; } ds2; }; struct gen7_surface_state { struct { unsigned int cube_pos_z:1; unsigned int cube_neg_z:1; unsigned int cube_pos_y:1; unsigned int cube_neg_y:1; unsigned int cube_pos_x:1; unsigned int cube_neg_x:1; unsigned int pad2:2; unsigned int render_cache_read_write:1; unsigned int pad1:1; unsigned int surface_array_spacing:1; unsigned int vert_line_stride_ofs:1; unsigned int vert_line_stride:1; unsigned int tile_walk:1; unsigned int tiled_surface:1; unsigned int horizontal_alignment:1; unsigned int vertical_alignment:2; unsigned int surface_format:9; /**< BRW_SURFACEFORMAT_x */ unsigned int pad0:1; unsigned int is_array:1; unsigned int surface_type:3; /**< BRW_SURFACE_1D/2D/3D/CUBE */ } ss0; struct { unsigned int base_addr; } ss1; struct { unsigned int width:14; unsigned int pad1:2; unsigned int height:14; unsigned int pad0:2; } ss2; struct { unsigned int pitch:18; unsigned int pad:3; unsigned int depth:11; } ss3; struct { unsigned int multisample_position_palette_index:3; unsigned int num_multisamples:3; unsigned int multisampled_surface_storage_format:1; unsigned int render_target_view_extent:11; unsigned int min_array_elt:11; unsigned int rotation:2; unsigned int pad0:1; } ss4; struct { unsigned int mip_count:4; unsigned int min_lod:4; unsigned int pad1:12; unsigned int y_offset:4; unsigned int pad0:1; unsigned int x_offset:7; } ss5; struct { unsigned int pad; /* Multisample Control Surface stuff */ } ss6; struct { unsigned int resource_min_lod:12; unsigned int pad0:4; unsigned int shader_chanel_select_a:3; unsigned int shader_chanel_select_b:3; unsigned int shader_chanel_select_g:3; unsigned int shader_chanel_select_r:3; unsigned int alpha_clear_color:1; unsigned int blue_clear_color:1; unsigned int green_clear_color:1; unsigned int red_clear_color:1; } ss7; }; struct gen7_sampler_state { struct { unsigned int aniso_algorithm:1; unsigned int lod_bias:13; unsigned int min_filter:3; unsigned int mag_filter:3; unsigned int mip_filter:2; unsigned int base_level:5; unsigned int pad1:1; unsigned int lod_preclamp:1; unsigned int default_color_mode:1; unsigned int pad0:1; unsigned int disable:1; } ss0; struct { unsigned int cube_control_mode:1; unsigned int shadow_function:3; unsigned int pad:4; unsigned int max_lod:12; unsigned int min_lod:12; } ss1; struct { unsigned int pad:5; unsigned int default_color_pointer:27; } ss2; struct { unsigned int r_wrap_mode:3; unsigned int t_wrap_mode:3; unsigned int s_wrap_mode:3; unsigned int pad:1; unsigned int non_normalized_coord:1; unsigned int trilinear_quality:2; unsigned int address_round:6; unsigned int max_aniso:3; unsigned int chroma_key_mode:1; unsigned int chroma_key_index:2; unsigned int chroma_key_enable:1; unsigned int pad0:6; } ss3; }; #endif xf86-video-intel-2.99.917/xvmc/shader/0000775000175000017500000000000012445556130014237 500000000000000xf86-video-intel-2.99.917/xvmc/shader/Makefile.am0000664000175000017500000000002212400044327016174 00000000000000SUBDIRS = mc vld xf86-video-intel-2.99.917/xvmc/shader/vld/0000775000175000017500000000000012445556131015025 500000000000000xf86-video-intel-2.99.917/xvmc/shader/vld/read_frame_x1y0_uv.g4i0000664000175000017500000000374512400044327021031 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g32.8<1>UD 0x007000fUD {align1}; send (16) 0 g34.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 4 {align1}; send (16) 0 g44.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 4 {align1}; avg (16) g74.0<1>UW g34.0<16,8,1>UB g34.1<16,8,1>UB{align1}; avg (16) g75.0<1>UW g35.0<16,8,1>UB g35.1<16,8,1>UB{align1}; avg (16) g76.0<1>UW g36.0<16,8,1>UB g36.1<16,8,1>UB{align1}; avg (16) g77.0<1>UW g37.0<16,8,1>UB g37.1<16,8,1>UB{align1}; avg (16) g78.0<1>UW g44.0<16,8,1>UB g44.1<16,8,1>UB{align1}; avg (16) g79.0<1>UW g45.0<16,8,1>UB g45.1<16,8,1>UB{align1}; avg (16) g80.0<1>UW g46.0<16,8,1>UB g46.1<16,8,1>UB{align1}; avg (16) g81.0<1>UW g47.0<16,8,1>UB g47.1<16,8,1>UB{align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/ipicture.g4b0000664000175000017500000004147712400044327017172 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000005, 0x2da02d29, 0x00210a48, 0x001f001f }, { 0x00000005, 0x2da42d29, 0x00210a48, 0x60006000 }, { 0x00000008, 0x2da42d29, 0x00210da4, 0x000d000d }, { 0x00000001, 0x2da60169, 0x00000000, 0x00080008 }, { 0x00000008, 0x2da42529, 0x00210da6, 0x00210da4 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000012 }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00090009 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00110011 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00190019 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xffe7ffe7 }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00030003 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x00400040 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000009 }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xfff7fff7 }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00010001 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x000a000a }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000005 }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xffefffef }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00020002 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x001c001c }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000001 }, { 0x00000009, 0x2da00d29, 0x00210da0, 0x00000001 }, { 0x00000001, 0x2dc00129, 0x00210da0, 0x00000000 }, { 0x00800001, 0x2e000229, 0x00b10020, 0x00000000 }, { 0x00800001, 0x2e200229, 0x00b10030, 0x00000000 }, { 0x00800001, 0x2e400229, 0x00b10040, 0x00000000 }, { 0x00800001, 0x2e600229, 0x00b10050, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x03f003e0 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000a1 }, { 0x00800001, 0x270001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x272001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x274001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x276001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009b }, { 0x00800001, 0x278001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x27a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x27c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x27e001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000095 }, { 0x00800001, 0x280001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x282001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x284001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x286001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000008f }, { 0x00800001, 0x288001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x28a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x28c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x28e001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000089 }, { 0x00800001, 0x290001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x292001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x294001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x296001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000083 }, { 0x00800001, 0x298001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x29a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x29c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x29e001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x06f006e0 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000008f }, { 0x00600040, 0x2a602dad, 0x00ae0400, 0x00800080 }, { 0x00600040, 0x2a802dad, 0x00ae0420, 0x00800080 }, { 0x00600040, 0x2aa02dad, 0x00ae0440, 0x00800080 }, { 0x00600040, 0x2ac02dad, 0x00ae0460, 0x00800080 }, { 0x00600040, 0x2ae02dad, 0x00ae0480, 0x00800080 }, { 0x00600040, 0x2b002dad, 0x00ae04a0, 0x00800080 }, { 0x00600040, 0x2b202dad, 0x00ae04c0, 0x00800080 }, { 0x00600040, 0x2b402dad, 0x00ae04e0, 0x00800080 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000085 }, { 0x00600040, 0x2a702dad, 0x00ae0400, 0x00800080 }, { 0x00600040, 0x2a902dad, 0x00ae0420, 0x00800080 }, { 0x00600040, 0x2ab02dad, 0x00ae0440, 0x00800080 }, { 0x00600040, 0x2ad02dad, 0x00ae0460, 0x00800080 }, { 0x00600040, 0x2af02dad, 0x00ae0480, 0x00800080 }, { 0x00600040, 0x2b102dad, 0x00ae04a0, 0x00800080 }, { 0x00600040, 0x2b302dad, 0x00ae04c0, 0x00800080 }, { 0x00600040, 0x2b502dad, 0x00ae04e0, 0x00800080 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000007b }, { 0x00600040, 0x2b602dad, 0x00ae0400, 0x00800080 }, { 0x00600040, 0x2b802dad, 0x00ae0420, 0x00800080 }, { 0x00600040, 0x2ba02dad, 0x00ae0440, 0x00800080 }, { 0x00600040, 0x2bc02dad, 0x00ae0460, 0x00800080 }, { 0x00600040, 0x2be02dad, 0x00ae0480, 0x00800080 }, { 0x00600040, 0x2c002dad, 0x00ae04a0, 0x00800080 }, { 0x00600040, 0x2c202dad, 0x00ae04c0, 0x00800080 }, { 0x00600040, 0x2c402dad, 0x00ae04e0, 0x00800080 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000071 }, { 0x00600040, 0x2b702dad, 0x00ae0400, 0x00800080 }, { 0x00600040, 0x2b902dad, 0x00ae0420, 0x00800080 }, { 0x00600040, 0x2bb02dad, 0x00ae0440, 0x00800080 }, { 0x00600040, 0x2bd02dad, 0x00ae0460, 0x00800080 }, { 0x00600040, 0x2bf02dad, 0x00ae0480, 0x00800080 }, { 0x00600040, 0x2c102dad, 0x00ae04a0, 0x00800080 }, { 0x00600040, 0x2c302dad, 0x00ae04c0, 0x00800080 }, { 0x00600040, 0x2c502dad, 0x00ae04e0, 0x00800080 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000067 }, { 0x00800040, 0x2c602dad, 0x00ae0400, 0x00800080 }, { 0x00800040, 0x2c802dad, 0x00ae0440, 0x00800080 }, { 0x00800040, 0x2ca02dad, 0x00ae0480, 0x00800080 }, { 0x00800040, 0x2cc02dad, 0x00ae04c0, 0x00800080 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000061 }, { 0x00800040, 0x2ce02dad, 0x00ae0400, 0x00800080 }, { 0x00800040, 0x2d002dad, 0x00ae0440, 0x00800080 }, { 0x00800040, 0x2d202dad, 0x00ae0480, 0x00800080 }, { 0x00800040, 0x2d402dad, 0x00ae04c0, 0x00800080 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x4a6001b1, 0x00b10a60, 0x00000000 }, { 0x80800001, 0x4a8001b1, 0x00b10a80, 0x00000000 }, { 0x80800001, 0x4aa001b1, 0x00b10aa0, 0x00000000 }, { 0x80800001, 0x4ac001b1, 0x00b10ac0, 0x00000000 }, { 0x80800001, 0x4ae001b1, 0x00b10ae0, 0x00000000 }, { 0x80800001, 0x4b0001b1, 0x00b10b00, 0x00000000 }, { 0x80800001, 0x4b2001b1, 0x00b10b20, 0x00000000 }, { 0x80800001, 0x4b4001b1, 0x00b10b40, 0x00000000 }, { 0x80800001, 0x4b6001b1, 0x00b10b60, 0x00000000 }, { 0x80800001, 0x4b8001b1, 0x00b10b80, 0x00000000 }, { 0x80800001, 0x4ba001b1, 0x00b10ba0, 0x00000000 }, { 0x80800001, 0x4bc001b1, 0x00b10bc0, 0x00000000 }, { 0x80800001, 0x4be001b1, 0x00b10be0, 0x00000000 }, { 0x80800001, 0x4c0001b1, 0x00b10c00, 0x00000000 }, { 0x80800001, 0x4c2001b1, 0x00b10c20, 0x00000000 }, { 0x80800001, 0x4c4001b1, 0x00b10c40, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20a80, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20aa0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20ac0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20ae0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20b00, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20b20, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20b40, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20b60, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20b80, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20ba0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b20bc0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20be0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20c00, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20c20, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20b60, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a80, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20b80, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20aa0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20ba0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20ac0, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20bc0, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20ae0, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20be0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20b00, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b20c00, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20b20, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20c20, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20b40, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01d21, 0x00450a4c, 0x00000001 }, { 0x80800001, 0x4c6001b1, 0x00b10c60, 0x00000000 }, { 0x80800001, 0x4c8001b1, 0x00b10c80, 0x00000000 }, { 0x80800001, 0x4ca001b1, 0x00b10ca0, 0x00000000 }, { 0x80800001, 0x4cc001b1, 0x00b10cc0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20c60, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20c80, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20ca0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20cc0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, { 0x80800001, 0x4ce001b1, 0x00b10ce0, 0x00000000 }, { 0x80800001, 0x4d0001b1, 0x00b10d00, 0x00000000 }, { 0x80800001, 0x4d2001b1, 0x00b10d20, 0x00000000 }, { 0x80800001, 0x4d4001b1, 0x00b10d40, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20ce0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20d00, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20d20, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20d40, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00000001, 0x2de001ad, 0x00218000, 0x00000000 }, { 0x00802041, 0x2e8025a5, 0x008d8000, 0x008d0e00 }, { 0x00802041, 0x2e8024a5, 0x008d0e80, 0x008c0da0 }, { 0x0080200c, 0x2e802ca5, 0x008d0e80, 0x00040004 }, { 0x00000041, 0x2e8025a5, 0x00210de0, 0x00210da4 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2ec025a5, 0x008d8000, 0x008d0e20 }, { 0x00802041, 0x2ec024a5, 0x008d0ec0, 0x008c0da0 }, { 0x0080200c, 0x2ec02ca5, 0x008d0ec0, 0x00040004 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2f0025a5, 0x008d8000, 0x008d0e40 }, { 0x00802041, 0x2f0024a5, 0x008d0f00, 0x008c0da0 }, { 0x0080200c, 0x2f002ca5, 0x008d0f00, 0x00040004 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2f4025a5, 0x008d8000, 0x008d0e60 }, { 0x00802041, 0x2f4024a5, 0x008d0f40, 0x008c0da0 }, { 0x0080200c, 0x2f402ca5, 0x008d0f40, 0x00040004 }, { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00802040, 0x24000ca5, 0x008d0400, 0x00000400 }, { 0x00802040, 0x24400ca5, 0x008d0440, 0x00000400 }, { 0x00802040, 0x24800ca5, 0x008d0480, 0x00000400 }, { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00000400 }, { 0x00802008, 0x24000ca5, 0x008d0400, 0x0000000b }, { 0x00802008, 0x24400ca5, 0x008d0440, 0x0000000b }, { 0x00802008, 0x24800ca5, 0x008d0480, 0x0000000b }, { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x0000000b }, { 0x00800001, 0x2dc001ad, 0x00ae0400, 0x00000000 }, { 0x00800001, 0x2de001ad, 0x00ae0440, 0x00000000 }, { 0x00800001, 0x2e0001ad, 0x00ae0480, 0x00000000 }, { 0x00800001, 0x2e2001ad, 0x00ae04c0, 0x00000000 }, { 0x00000001, 0x2a000001, 0x00210200, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x0db00da0 }, { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00802040, 0x24000ca5, 0x008d0400, 0x00080000 }, { 0x00802040, 0x24400ca5, 0x008d0440, 0x00080000 }, { 0x00802040, 0x24800ca5, 0x008d0480, 0x00080000 }, { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00080000 }, { 0x00802008, 0x24000ca5, 0x008d0400, 0x00000014 }, { 0x00802008, 0x24400ca5, 0x008d0440, 0x00000014 }, { 0x00802008, 0x24800ca5, 0x008d0480, 0x00000014 }, { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x00000014 }, { 0x00000001, 0x22000020, 0x00210a00, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x240014a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x242014a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x244014a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x246014a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x248014a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24a014a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24c014a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24e014a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x240814a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x242814a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x244814a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x246814a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x248814a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24a814a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24c814a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24e814a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x241014a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x243014a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x245014a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x247014a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x249014a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24b014a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24d014a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24f014a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x241814a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x243814a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x245814a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x247814a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x249814a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24b814a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24d814a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24f814a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x34000c20, 0x00210fc0, 0x00000020 }, xf86-video-intel-2.99.917/xvmc/shader/vld/read_frame_x0y1_y.g4i0000664000175000017500000000611712400044327020643 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (1) g32.8<1>UD 0x007001FUD {align1}; send (16) 0 g38.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; mov (1) g32.8<1>UD 0x1FUD {align1}; send (16) 0 g54.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 1 {align1}; avg.sat (16) g58.0<1>UW g38.0<16,16,1>UB g39.0<16,16,1>UB {align1}; avg.sat (16) g59.0<1>UW g39.0<16,16,1>UB g40.0<16,16,1>UB {align1}; avg.sat (16) g60.0<1>UW g40.0<16,16,1>UB g41.0<16,16,1>UB {align1}; avg.sat (16) g61.0<1>UW g41.0<16,16,1>UB g42.0<16,16,1>UB {align1}; avg.sat (16) g62.0<1>UW g42.0<16,16,1>UB g43.0<16,16,1>UB {align1}; avg.sat (16) g63.0<1>UW g43.0<16,16,1>UB g44.0<16,16,1>UB {align1}; avg.sat (16) g64.0<1>UW g44.0<16,16,1>UB g45.0<16,16,1>UB {align1}; avg.sat (16) g65.0<1>UW g45.0<16,16,1>UB g46.0<16,16,1>UB {align1}; avg.sat (16) g66.0<1>UW g46.0<16,16,1>UB g47.0<16,16,1>UB {align1}; avg.sat (16) g67.0<1>UW g47.0<16,16,1>UB g48.0<16,16,1>UB {align1}; avg.sat (16) g68.0<1>UW g48.0<16,16,1>UB g49.0<16,16,1>UB {align1}; avg.sat (16) g69.0<1>UW g49.0<16,16,1>UB g50.0<16,16,1>UB {align1}; avg.sat (16) g70.0<1>UW g50.0<16,16,1>UB g51.0<16,16,1>UB {align1}; avg.sat (16) g71.0<1>UW g51.0<16,16,1>UB g52.0<16,16,1>UB {align1}; avg.sat (16) g72.0<1>UW g52.0<16,16,1>UB g53.0<16,16,1>UB {align1}; avg.sat (16) g73.0<1>UW g53.0<16,16,1>UB g54.0<16,16,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/read_field_x1y0_y.g4i0000664000175000017500000000541312400044327020632 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x01FUD {align1}; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g42.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g46.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; mov (1) g115.8<1>UD 0x07001FUD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; avg.sat (16) g32.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; avg.sat (16) g33.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; avg.sat (16) g34.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; avg.sat (16) g35.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; avg.sat (16) g36.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; avg.sat (16) g37.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; avg.sat (16) g38.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; avg.sat (16) g39.0<1>UW g54.0<16,16,1>UB g54.1<16,16,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/do_iq_intra.g4i0000664000175000017500000000556312400044327017641 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g112~g115: intra IQ matrix in UW format (in order to use instruction compress), copys from g1~g2 g[a0.0]:DCT data of a block g125: ip before jump if(v==0 && u==0 && intra_mb) F''[v][u] = QF[v][u] * intra_dc_mult else F''[v][u] = (QF[v][u]*W[w][v][u]*quantiser_scale*2)/32 */ DO_IQ_INTRA: add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; mov (1) g111.0<1>W g[a0.0]<1,1,1>W {align1}; mul (16) g116.0<1>D g[a0.0]<8,8,1>W g112.0<8,8,1>UW {align1 compr}; mul (16) g116.0<1>D g116.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; asr (16) g116.0<1>D g116.0<8,8,1>D 4UW {align1 compr}; mul (1) g116.0<1>D g111<1,1,1>W g109.4<1,1,1>UW {align1}; //intra_dc_mult add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; mul (16) g118.0<1>D g[a0.0]<8,8,1>W g113.0<8,8,1>UW {align1 compr}; mul (16) g118.0<1>D g118.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; asr (16) g118.0<1>D g118.0<8,8,1>D 4UW {align1 compr}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; mul (16) g120.0<1>D g[a0.0]<8,8,1>W g114.0<8,8,1>UW {align1 compr}; mul (16) g120.0<1>D g120.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; asr (16) g120.0<1>D g120.0<8,8,1>D 4UW {align1 compr}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; mul (16) g122.0<1>D g[a0.0]<8,8,1>W g115.0<8,8,1>UW {align1 compr}; mul (16) g122.0<1>D g122.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; asr (16) g122.0<1>D g122.0<8,8,1>D 4UW {align1 compr}; add (1) ip g125.0<1,1,1>UD 0x20UD {align1}; //jump back xf86-video-intel-2.99.917/xvmc/shader/vld/frame_forward.g4a0000664000175000017500000000471312400044327020153 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; mov (1) g126.8<1>UD ip {align1}; mov (1) ip g21.0<1,1,1>UD {align1}; //Y, (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; define(`input_surface', `4') define(`mv1', `g82.16') define(`mv2', `g82.18') include(`motion_frame_y.g4i') //UV, (x', y') = (x >> 1, y >> 1) + (motion_vector.x >> 2, motion_vector.y >> 2) shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g31.14<1>W g82.16<2,2,1>W 2W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; define(`input_surface1', `5') define(`input_surface2', `6') include(`motion_frame_uv.g4i') include(`addidct.g4i') send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/vld/field_backward.g4b.gen50000664000175000017500000007331712400044327021122 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a5c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x2a543dad, 0x00450a54, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a54, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a009 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x2a5c3dad, 0x00450a5c, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a5c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a009 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/motion_field_uv.g4i0000664000175000017500000000334212400044327020524 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ and.z (1) null mv1<1,1,1>W 1W {align1}; (f0) jmpi L1; and.z (1) null mv2<1,1,1>W 1W {align1}; (f0) jmpi L2; include(`read_field_x1y1_uv.g4i') jmpi L5; L2: include(`read_field_x1y0_uv.g4i') jmpi L5; L1: and.z (1) null mv2<1,1,1>W 1W {align1}; (f0) jmpi L4; include(`read_field_x0y1_uv.g4i') jmpi L5; L4: include(`read_field_x0y0_uv.g4i') L5: xf86-video-intel-2.99.917/xvmc/shader/vld/read_frame_x1y0_y.g4i0000664000175000017500000000564212400044327020645 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (1) g32.8<1>UD 0x007001FUD {align1}; send (16) 0 g38.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; avg.sat (16) g58.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1}; avg.sat (16) g59.0<1>UW g39.0<16,16,1>UB g39.1<16,16,1>UB {align1}; avg.sat (16) g60.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; avg.sat (16) g61.0<1>UW g41.0<16,16,1>UB g41.1<16,16,1>UB {align1}; avg.sat (16) g62.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; avg.sat (16) g63.0<1>UW g43.0<16,16,1>UB g43.1<16,16,1>UB {align1}; avg.sat (16) g64.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; avg.sat (16) g65.0<1>UW g45.0<16,16,1>UB g45.1<16,16,1>UB {align1}; avg.sat (16) g66.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; avg.sat (16) g67.0<1>UW g47.0<16,16,1>UB g47.1<16,16,1>UB {align1}; avg.sat (16) g68.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; avg.sat (16) g69.0<1>UW g49.0<16,16,1>UB g49.1<16,16,1>UB {align1}; avg.sat (16) g70.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; avg.sat (16) g71.0<1>UW g51.0<16,16,1>UB g51.1<16,16,1>UB {align1}; avg.sat (16) g72.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; avg.sat (16) g73.0<1>UW g53.0<16,16,1>UB g53.1<16,16,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/Makefile.am0000664000175000017500000000353612400044327016776 00000000000000 INTEL_G4I = addidct.g4i \ do_iq_intra.g4i \ do_iq_non_intra.g4i \ idct.g4i \ iq_intra.g4i \ iq_non_intra.g4i \ motion_field_uv.g4i \ motion_field_y.g4i \ motion_frame_uv.g4i \ motion_frame_y.g4i \ read_field_x0y0_uv.g4i \ read_field_x0y1_uv.g4i \ read_field_x1y0_uv.g4i \ read_field_x1y1_uv.g4i \ read_field_x0y0_y.g4i \ read_field_x0y1_y.g4i \ read_field_x1y0_y.g4i \ read_field_x1y1_y.g4i \ read_frame_x0y0_uv.g4i \ read_frame_x0y1_uv.g4i \ read_frame_x1y0_uv.g4i \ read_frame_x1y1_uv.g4i \ read_frame_x0y0_y.g4i \ read_frame_x0y1_y.g4i \ read_frame_x1y0_y.g4i \ read_frame_x1y1_y.g4i INTEL_G4A = ipicture.g4a \ lib.g4a \ frame_forward.g4a \ frame_backward.g4a \ frame_f_b.g4a \ field_forward.g4a \ field_backward.g4a \ field_f_b.g4a INTEL_G4B = ipicture.g4b \ lib.g4b \ frame_forward.g4b \ frame_backward.g4b \ frame_f_b.g4b \ field_forward.g4b \ field_backward.g4b \ field_f_b.g4b INTEL_G4B_GEN5 = ipicture.g4b.gen5 \ lib.g4b.gen5 \ frame_forward.g4b.gen5 \ frame_backward.g4b.gen5 \ frame_f_b.g4b.gen5 \ field_forward.g4b.gen5 \ field_backward.g4b.gen5 \ field_f_b.g4b.gen5 EXTRA_DIST = $(INTEL_G4I) \ $(INTEL_G4A) \ $(INTEL_G4B) \ $(INTEL_G4B_GEN5) if HAVE_GEN4ASM SUFFIXES = .g4a .g4b .g4a.g4b: $(AM_V_GEN)m4 $*.g4a > $*.g4m && @INTEL_GEN4ASM@ -o $@ $*.g4m && @INTEL_GEN4ASM@ -g 5 -o $@.gen5 $*.g4m && rm $*.g4m $(INTEL_G4B): $(INTEL_GEN4ASM) $(INTEL_G4I) BUILT_SOURCES= $(INTEL_G4B) clean-local: -rm -f $(INTEL_G4B) -rm -f $(INTEL_G4B_GEN5) endif xf86-video-intel-2.99.917/xvmc/shader/vld/iq_intra.g4i0000664000175000017500000001120512400044327017145 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix in UB format g3~g4:non intra IQ matrix in UB format g5~g20:IDCT table g32~g55:DCT data before IQ g56~g79:DCT data after IQ g82: thread payload backup g109: g109.0:q_scale_code, g109.4:intra_dc_mult, g110: q_scale_code g111: intra DC coefficient g112~g115: intra IQ matrix in UW format (in order to use instruction compress), copys from g1~g2 g125: ip before jump */ and (1) g109.0<1>UW g82.8<1,1,1>UW 0x1fUW {align1}; //q_scale_code and (1) g109.4<1>UW g82.8<1,1,1>UW 0x6000UW {align1}; //intra_dc_presion shr (1) g109.4<1>UW g109.4<1,1,1>UW 13UW {align1}; mov (1) g109.6<1>UW 0x8UW {align1}; shr (1) g109.4<1>UW g109.6<1,1,1>UW g109.4<1,1,1>UW {align1}; //intra_dc_mult and.z (1) null g82.8<1,1,1>UW 0x20UW {align1}; //if(q_scale_type==0) q_scale=q_scale_code*2; (f0) jmpi Q_SCALE_TYPE_0; cmp.l (1) null g109.0<1,1,1>UW 9UW {align1}; //if(q_scale_type!=0) calculate q_scale (f0) jmpi DO_IQ; cmp.l (1) null g109.0<1,1,1>UW 17UW {align1}; (f0) jmpi RANG_9_16; cmp.l (1) null g109.0<1,1,1>UW 25UW {align1}; (f0) jmpi RANG_17_24; RANG_25_31: add (1) g109.0<1>UW g109.0<1,1,1>UW -25W {align1}; shl (1) g109.0<1>UW g109.0<1,1,1>UW 3UW {align1}; add (1) g109.0<1>UW g109.0<1,1,1>UW 64UW {align1}; jmpi DO_IQ; RANG_9_16: add (1) g109.0<1>UW g109.0<1,1,1>UW -9W {align1}; shl (1) g109.0<1>UW g109.0<1,1,1>UW 1UW {align1}; add (1) g109.0<1>UW g109.0<1,1,1>UW 10UW {align1}; jmpi DO_IQ; RANG_17_24: add (1) g109.0<1>UW g109.0<1,1,1>UW -17W {align1}; shl (1) g109.0<1>UW g109.0<1,1,1>UW 2UW {align1}; add (1) g109.0<1>UW g109.0<1,1,1>UW 28UW {align1}; jmpi DO_IQ; Q_SCALE_TYPE_0: shl (1) g109.0<1>UW g109.0<1,1,1>UW 1UD {align1}; DO_IQ: mov (1) g110.0<1>UW g109.0<1,1,1>UW {align1}; mov (16) g112.0<1>UW g1.0<16,16,1>UB {align1}; mov (16) g113.0<1>UW g1.16<16,16,1>UB {align1}; mov (16) g114.0<1>UW g2.0<16,16,1>UB {align1}; mov (16) g115.0<1>UW g2.16<16,16,1>UB {align1}; mov (1) a0.0<1>UD 0x03F003E0UD {align1}; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_INTRA; mov (16) g56.0<1>W g116.0<16,8,2>W {align1}; mov (16) g57.0<1>W g118.0<16,8,2>W {align1}; mov (16) g58.0<1>W g120.0<16,8,2>W {align1}; mov (16) g59.0<1>W g122.0<16,8,2>W {align1}; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_INTRA; mov (16) g60.0<1>W g116.0<16,8,2>W {align1}; mov (16) g61.0<1>W g118.0<16,8,2>W {align1}; mov (16) g62.0<1>W g120.0<16,8,2>W {align1}; mov (16) g63.0<1>W g122.0<16,8,2>W {align1}; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_INTRA; mov (16) g64.0<1>W g116.0<16,8,2>W {align1}; mov (16) g65.0<1>W g118.0<16,8,2>W {align1}; mov (16) g66.0<1>W g120.0<16,8,2>W {align1}; mov (16) g67.0<1>W g122.0<16,8,2>W {align1}; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_INTRA; mov (16) g68.0<1>W g116.0<16,8,2>W {align1}; mov (16) g69.0<1>W g118.0<16,8,2>W {align1}; mov (16) g70.0<1>W g120.0<16,8,2>W {align1}; mov (16) g71.0<1>W g122.0<16,8,2>W {align1}; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_INTRA; mov (16) g72.0<1>W g116.0<16,8,2>W {align1}; mov (16) g73.0<1>W g118.0<16,8,2>W {align1}; mov (16) g74.0<1>W g120.0<16,8,2>W {align1}; mov (16) g75.0<1>W g122.0<16,8,2>W {align1}; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_INTRA; mov (16) g76.0<1>W g116.0<16,8,2>W {align1}; mov (16) g77.0<1>W g118.0<16,8,2>W {align1}; mov (16) g78.0<1>W g120.0<16,8,2>W {align1}; mov (16) g79.0<1>W g122.0<16,8,2>W {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/lib.g4b.gen50000664000175000017500000004076512400044327016750 00000000000000 { 0x00000005, 0x2da02d29, 0x00210a48, 0x001f001f }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00090009 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00110011 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00190019 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xffe7ffe7 }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00030003 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x00400040 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000012 }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xfff7fff7 }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00010001 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x000a000a }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xffefffef }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00020002 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x001c001c }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00000009, 0x2da00d29, 0x00210da0, 0x00000001 }, { 0x00000001, 0x2dc00129, 0x00210da0, 0x00000000 }, { 0x00800001, 0x2e000229, 0x00b10060, 0x00000000 }, { 0x00800001, 0x2e200229, 0x00b10070, 0x00000000 }, { 0x00800001, 0x2e400229, 0x00b10080, 0x00000000 }, { 0x00800001, 0x2e600229, 0x00b10090, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x03f003e0 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x08000800 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000142 }, { 0x00800001, 0x270001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x272001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x274001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x276001ad, 0x00ae0f40, 0x00000000 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x04000400 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000132 }, { 0x00800001, 0x278001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x27a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x27c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x27e001ad, 0x00ae0f40, 0x00000000 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x02000200 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000122 }, { 0x00800001, 0x280001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x282001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x284001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x286001ad, 0x00ae0f40, 0x00000000 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x01000100 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000112 }, { 0x00800001, 0x288001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x28a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x28c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x28e001ad, 0x00ae0f40, 0x00000000 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x00800080 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000102 }, { 0x00800001, 0x290001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x292001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x294001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x296001ad, 0x00ae0f40, 0x00000000 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x00400040 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000f2 }, { 0x00800001, 0x298001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x29a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x29c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x29e001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x06f006e0 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x08000800 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00600001, 0x2a600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2a800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2aa00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ac00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ae00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b400169, 0x00000000, 0x00000000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000ee }, { 0x00600001, 0x2a6001ad, 0x00ae0400, 0x00000000 }, { 0x00600001, 0x2a8001ad, 0x00ae0420, 0x00000000 }, { 0x00600001, 0x2aa001ad, 0x00ae0440, 0x00000000 }, { 0x00600001, 0x2ac001ad, 0x00ae0460, 0x00000000 }, { 0x00600001, 0x2ae001ad, 0x00ae0480, 0x00000000 }, { 0x00600001, 0x2b0001ad, 0x00ae04a0, 0x00000000 }, { 0x00600001, 0x2b2001ad, 0x00ae04c0, 0x00000000 }, { 0x00600001, 0x2b4001ad, 0x00ae04e0, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x04000400 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00600001, 0x2a700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2a900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ab00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ad00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2af00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b500169, 0x00000000, 0x00000000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000c2 }, { 0x00600001, 0x2a7001ad, 0x00ae0400, 0x00000000 }, { 0x00600001, 0x2a9001ad, 0x00ae0420, 0x00000000 }, { 0x00600001, 0x2ab001ad, 0x00ae0440, 0x00000000 }, { 0x00600001, 0x2ad001ad, 0x00ae0460, 0x00000000 }, { 0x00600001, 0x2af001ad, 0x00ae0480, 0x00000000 }, { 0x00600001, 0x2b1001ad, 0x00ae04a0, 0x00000000 }, { 0x00600001, 0x2b3001ad, 0x00ae04c0, 0x00000000 }, { 0x00600001, 0x2b5001ad, 0x00ae04e0, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x02000200 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00600001, 0x2b600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ba00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bc00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2be00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c400169, 0x00000000, 0x00000000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000096 }, { 0x00600001, 0x2b6001ad, 0x00ae0400, 0x00000000 }, { 0x00600001, 0x2b8001ad, 0x00ae0420, 0x00000000 }, { 0x00600001, 0x2ba001ad, 0x00ae0440, 0x00000000 }, { 0x00600001, 0x2bc001ad, 0x00ae0460, 0x00000000 }, { 0x00600001, 0x2be001ad, 0x00ae0480, 0x00000000 }, { 0x00600001, 0x2c0001ad, 0x00ae04a0, 0x00000000 }, { 0x00600001, 0x2c2001ad, 0x00ae04c0, 0x00000000 }, { 0x00600001, 0x2c4001ad, 0x00ae04e0, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x01000100 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00600001, 0x2b700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bb00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bd00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bf00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c500169, 0x00000000, 0x00000000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00600001, 0x2b7001ad, 0x00ae0400, 0x00000000 }, { 0x00600001, 0x2b9001ad, 0x00ae0420, 0x00000000 }, { 0x00600001, 0x2bb001ad, 0x00ae0440, 0x00000000 }, { 0x00600001, 0x2bd001ad, 0x00ae0460, 0x00000000 }, { 0x00600001, 0x2bf001ad, 0x00ae0480, 0x00000000 }, { 0x00600001, 0x2c1001ad, 0x00ae04a0, 0x00000000 }, { 0x00600001, 0x2c3001ad, 0x00ae04c0, 0x00000000 }, { 0x00600001, 0x2c5001ad, 0x00ae04e0, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x00800080 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800001, 0x2c600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2c800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2ca00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2cc00169, 0x00000000, 0x00000000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000046 }, { 0x00800001, 0x2c6001ad, 0x00ae0400, 0x00000000 }, { 0x00800001, 0x2c8001ad, 0x00ae0440, 0x00000000 }, { 0x00800001, 0x2ca001ad, 0x00ae0480, 0x00000000 }, { 0x00800001, 0x2cc001ad, 0x00ae04c0, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x00400040 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00800001, 0x2ce00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d400169, 0x00000000, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, { 0x00800001, 0x2ce001ad, 0x00ae0400, 0x00000000 }, { 0x00800001, 0x2d0001ad, 0x00ae0440, 0x00000000 }, { 0x00800001, 0x2d2001ad, 0x00ae0480, 0x00000000 }, { 0x00800001, 0x2d4001ad, 0x00ae04c0, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2e8025a5, 0x008d8000, 0x008d0e00 }, { 0x00802041, 0x2e8024a5, 0x008d0e80, 0x008c0da0 }, { 0x0080200c, 0x2e802ca5, 0x008d0e80, 0x00040004 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2ec025a5, 0x008d8000, 0x008d0e20 }, { 0x00802041, 0x2ec024a5, 0x008d0ec0, 0x008c0da0 }, { 0x0080200c, 0x2ec02ca5, 0x008d0ec0, 0x00040004 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2f0025a5, 0x008d8000, 0x008d0e40 }, { 0x00802041, 0x2f0024a5, 0x008d0f00, 0x008c0da0 }, { 0x0080200c, 0x2f002ca5, 0x008d0f00, 0x00040004 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2f4025a5, 0x008d8000, 0x008d0e60 }, { 0x00802041, 0x2f4024a5, 0x008d0f40, 0x008c0da0 }, { 0x0080200c, 0x2f402ca5, 0x008d0f40, 0x00040004 }, { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00802040, 0x24000ca5, 0x008d0400, 0x00000400 }, { 0x00802040, 0x24400ca5, 0x008d0440, 0x00000400 }, { 0x00802040, 0x24800ca5, 0x008d0480, 0x00000400 }, { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00000400 }, { 0x00802008, 0x24000ca5, 0x008d0400, 0x0000000b }, { 0x00802008, 0x24400ca5, 0x008d0440, 0x0000000b }, { 0x00802008, 0x24800ca5, 0x008d0480, 0x0000000b }, { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x0000000b }, { 0x00800001, 0x2dc001ad, 0x00ae0400, 0x00000000 }, { 0x00800001, 0x2de001ad, 0x00ae0440, 0x00000000 }, { 0x00800001, 0x2e0001ad, 0x00ae0480, 0x00000000 }, { 0x00800001, 0x2e2001ad, 0x00ae04c0, 0x00000000 }, { 0x00000001, 0x2a000001, 0x00210200, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x0db00da0 }, { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00802040, 0x24000ca5, 0x008d0400, 0x00080000 }, { 0x00802040, 0x24400ca5, 0x008d0440, 0x00080000 }, { 0x00802040, 0x24800ca5, 0x008d0480, 0x00080000 }, { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00080000 }, { 0x00802008, 0x24000ca5, 0x008d0400, 0x00000014 }, { 0x00802008, 0x24400ca5, 0x008d0440, 0x00000014 }, { 0x00802008, 0x24800ca5, 0x008d0480, 0x00000014 }, { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x00000014 }, { 0x00000001, 0x22000020, 0x00210a00, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x240014a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x242014a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x244014a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x246014a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x248014a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24a014a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24c014a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24e014a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x240814a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x242814a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x244814a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x246814a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x248814a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24a814a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24c814a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24e814a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x241014a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x243014a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x245014a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x247014a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x249014a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24b014a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24d014a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24f014a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x241814a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x243814a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x245814a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x247814a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x249814a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24b814a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24d814a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24f814a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x34000c20, 0x00210fc0, 0x00000020 }, xf86-video-intel-2.99.917/xvmc/shader/vld/frame_backward.g4b.gen50000664000175000017500000004750712400044327021133 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000be }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000090 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000086 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a008 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a009 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a008 }, { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a009 }, { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a008 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a009 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a008 }, { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a009 }, { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24801d29, 0x408d0400, 0x0248a008 }, { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a009 }, { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/frame_backward.g4b0000664000175000017500000004750712400044327020276 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005f }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000043 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a008 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a009 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a008 }, { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a009 }, { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000025 }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a008 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a009 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a008 }, { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a009 }, { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24801d29, 0x008d0400, 0x0414a008 }, { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a009 }, { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/ipicture.g4b.gen50000664000175000017500000004147712400044327020027 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000005, 0x2da02d29, 0x00210a48, 0x001f001f }, { 0x00000005, 0x2da42d29, 0x00210a48, 0x60006000 }, { 0x00000008, 0x2da42d29, 0x00210da4, 0x000d000d }, { 0x00000001, 0x2da60169, 0x00000000, 0x00080008 }, { 0x00000008, 0x2da42529, 0x00210da6, 0x00210da4 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00090009 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00110011 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00190019 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xffe7ffe7 }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00030003 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x00400040 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000012 }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xfff7fff7 }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00010001 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x000a000a }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xffefffef }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00020002 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x001c001c }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00000009, 0x2da00d29, 0x00210da0, 0x00000001 }, { 0x00000001, 0x2dc00129, 0x00210da0, 0x00000000 }, { 0x00800001, 0x2e000229, 0x00b10020, 0x00000000 }, { 0x00800001, 0x2e200229, 0x00b10030, 0x00000000 }, { 0x00800001, 0x2e400229, 0x00b10040, 0x00000000 }, { 0x00800001, 0x2e600229, 0x00b10050, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x03f003e0 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000142 }, { 0x00800001, 0x270001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x272001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x274001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x276001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000136 }, { 0x00800001, 0x278001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x27a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x27c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x27e001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000012a }, { 0x00800001, 0x280001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x282001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x284001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x286001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000011e }, { 0x00800001, 0x288001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x28a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x28c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x28e001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000112 }, { 0x00800001, 0x290001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x292001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x294001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x296001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000106 }, { 0x00800001, 0x298001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x29a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x29c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x29e001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x06f006e0 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000011e }, { 0x00600040, 0x2a602dad, 0x00ae0400, 0x00800080 }, { 0x00600040, 0x2a802dad, 0x00ae0420, 0x00800080 }, { 0x00600040, 0x2aa02dad, 0x00ae0440, 0x00800080 }, { 0x00600040, 0x2ac02dad, 0x00ae0460, 0x00800080 }, { 0x00600040, 0x2ae02dad, 0x00ae0480, 0x00800080 }, { 0x00600040, 0x2b002dad, 0x00ae04a0, 0x00800080 }, { 0x00600040, 0x2b202dad, 0x00ae04c0, 0x00800080 }, { 0x00600040, 0x2b402dad, 0x00ae04e0, 0x00800080 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000010a }, { 0x00600040, 0x2a702dad, 0x00ae0400, 0x00800080 }, { 0x00600040, 0x2a902dad, 0x00ae0420, 0x00800080 }, { 0x00600040, 0x2ab02dad, 0x00ae0440, 0x00800080 }, { 0x00600040, 0x2ad02dad, 0x00ae0460, 0x00800080 }, { 0x00600040, 0x2af02dad, 0x00ae0480, 0x00800080 }, { 0x00600040, 0x2b102dad, 0x00ae04a0, 0x00800080 }, { 0x00600040, 0x2b302dad, 0x00ae04c0, 0x00800080 }, { 0x00600040, 0x2b502dad, 0x00ae04e0, 0x00800080 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000f6 }, { 0x00600040, 0x2b602dad, 0x00ae0400, 0x00800080 }, { 0x00600040, 0x2b802dad, 0x00ae0420, 0x00800080 }, { 0x00600040, 0x2ba02dad, 0x00ae0440, 0x00800080 }, { 0x00600040, 0x2bc02dad, 0x00ae0460, 0x00800080 }, { 0x00600040, 0x2be02dad, 0x00ae0480, 0x00800080 }, { 0x00600040, 0x2c002dad, 0x00ae04a0, 0x00800080 }, { 0x00600040, 0x2c202dad, 0x00ae04c0, 0x00800080 }, { 0x00600040, 0x2c402dad, 0x00ae04e0, 0x00800080 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000e2 }, { 0x00600040, 0x2b702dad, 0x00ae0400, 0x00800080 }, { 0x00600040, 0x2b902dad, 0x00ae0420, 0x00800080 }, { 0x00600040, 0x2bb02dad, 0x00ae0440, 0x00800080 }, { 0x00600040, 0x2bd02dad, 0x00ae0460, 0x00800080 }, { 0x00600040, 0x2bf02dad, 0x00ae0480, 0x00800080 }, { 0x00600040, 0x2c102dad, 0x00ae04a0, 0x00800080 }, { 0x00600040, 0x2c302dad, 0x00ae04c0, 0x00800080 }, { 0x00600040, 0x2c502dad, 0x00ae04e0, 0x00800080 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000ce }, { 0x00800040, 0x2c602dad, 0x00ae0400, 0x00800080 }, { 0x00800040, 0x2c802dad, 0x00ae0440, 0x00800080 }, { 0x00800040, 0x2ca02dad, 0x00ae0480, 0x00800080 }, { 0x00800040, 0x2cc02dad, 0x00ae04c0, 0x00800080 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000c2 }, { 0x00800040, 0x2ce02dad, 0x00ae0400, 0x00800080 }, { 0x00800040, 0x2d002dad, 0x00ae0440, 0x00800080 }, { 0x00800040, 0x2d202dad, 0x00ae0480, 0x00800080 }, { 0x00800040, 0x2d402dad, 0x00ae04c0, 0x00800080 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x4a6001b1, 0x00b10a60, 0x00000000 }, { 0x80800001, 0x4a8001b1, 0x00b10a80, 0x00000000 }, { 0x80800001, 0x4aa001b1, 0x00b10aa0, 0x00000000 }, { 0x80800001, 0x4ac001b1, 0x00b10ac0, 0x00000000 }, { 0x80800001, 0x4ae001b1, 0x00b10ae0, 0x00000000 }, { 0x80800001, 0x4b0001b1, 0x00b10b00, 0x00000000 }, { 0x80800001, 0x4b2001b1, 0x00b10b20, 0x00000000 }, { 0x80800001, 0x4b4001b1, 0x00b10b40, 0x00000000 }, { 0x80800001, 0x4b6001b1, 0x00b10b60, 0x00000000 }, { 0x80800001, 0x4b8001b1, 0x00b10b80, 0x00000000 }, { 0x80800001, 0x4ba001b1, 0x00b10ba0, 0x00000000 }, { 0x80800001, 0x4bc001b1, 0x00b10bc0, 0x00000000 }, { 0x80800001, 0x4be001b1, 0x00b10be0, 0x00000000 }, { 0x80800001, 0x4c0001b1, 0x00b10c00, 0x00000000 }, { 0x80800001, 0x4c2001b1, 0x00b10c20, 0x00000000 }, { 0x80800001, 0x4c4001b1, 0x00b10c40, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20a80, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20aa0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20ac0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20ae0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20b00, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20b20, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20b40, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20b60, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20b80, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20ba0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b20bc0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20be0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20c00, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20c20, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800001, 0x20200232, 0x00b20a60, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20b60, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a80, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20b80, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20aa0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20ba0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20ac0, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20bc0, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20ae0, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20be0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20b00, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b20c00, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20b20, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20c20, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20b40, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20c40, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01d21, 0x00450a4c, 0x00000001 }, { 0x80800001, 0x4c6001b1, 0x00b10c60, 0x00000000 }, { 0x80800001, 0x4c8001b1, 0x00b10c80, 0x00000000 }, { 0x80800001, 0x4ca001b1, 0x00b10ca0, 0x00000000 }, { 0x80800001, 0x4cc001b1, 0x00b10cc0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20c60, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20c80, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20ca0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20cc0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, { 0x80800001, 0x4ce001b1, 0x00b10ce0, 0x00000000 }, { 0x80800001, 0x4d0001b1, 0x00b10d00, 0x00000000 }, { 0x80800001, 0x4d2001b1, 0x00b10d20, 0x00000000 }, { 0x80800001, 0x4d4001b1, 0x00b10d40, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20ce0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20d00, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20d20, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20d40, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00000001, 0x2de001ad, 0x00218000, 0x00000000 }, { 0x00802041, 0x2e8025a5, 0x008d8000, 0x008d0e00 }, { 0x00802041, 0x2e8024a5, 0x008d0e80, 0x008c0da0 }, { 0x0080200c, 0x2e802ca5, 0x008d0e80, 0x00040004 }, { 0x00000041, 0x2e8025a5, 0x00210de0, 0x00210da4 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2ec025a5, 0x008d8000, 0x008d0e20 }, { 0x00802041, 0x2ec024a5, 0x008d0ec0, 0x008c0da0 }, { 0x0080200c, 0x2ec02ca5, 0x008d0ec0, 0x00040004 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2f0025a5, 0x008d8000, 0x008d0e40 }, { 0x00802041, 0x2f0024a5, 0x008d0f00, 0x008c0da0 }, { 0x0080200c, 0x2f002ca5, 0x008d0f00, 0x00040004 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2f4025a5, 0x008d8000, 0x008d0e60 }, { 0x00802041, 0x2f4024a5, 0x008d0f40, 0x008c0da0 }, { 0x0080200c, 0x2f402ca5, 0x008d0f40, 0x00040004 }, { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00802040, 0x24000ca5, 0x008d0400, 0x00000400 }, { 0x00802040, 0x24400ca5, 0x008d0440, 0x00000400 }, { 0x00802040, 0x24800ca5, 0x008d0480, 0x00000400 }, { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00000400 }, { 0x00802008, 0x24000ca5, 0x008d0400, 0x0000000b }, { 0x00802008, 0x24400ca5, 0x008d0440, 0x0000000b }, { 0x00802008, 0x24800ca5, 0x008d0480, 0x0000000b }, { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x0000000b }, { 0x00800001, 0x2dc001ad, 0x00ae0400, 0x00000000 }, { 0x00800001, 0x2de001ad, 0x00ae0440, 0x00000000 }, { 0x00800001, 0x2e0001ad, 0x00ae0480, 0x00000000 }, { 0x00800001, 0x2e2001ad, 0x00ae04c0, 0x00000000 }, { 0x00000001, 0x2a000001, 0x00210200, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x0db00da0 }, { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00802040, 0x24000ca5, 0x008d0400, 0x00080000 }, { 0x00802040, 0x24400ca5, 0x008d0440, 0x00080000 }, { 0x00802040, 0x24800ca5, 0x008d0480, 0x00080000 }, { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00080000 }, { 0x00802008, 0x24000ca5, 0x008d0400, 0x00000014 }, { 0x00802008, 0x24400ca5, 0x008d0440, 0x00000014 }, { 0x00802008, 0x24800ca5, 0x008d0480, 0x00000014 }, { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x00000014 }, { 0x00000001, 0x22000020, 0x00210a00, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x240014a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x242014a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x244014a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x246014a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x248014a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24a014a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24c014a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24e014a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x240814a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x242814a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x244814a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x246814a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x248814a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24a814a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24c814a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24e814a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x241014a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x243014a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x245014a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x247014a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x249014a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24b014a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24d014a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24f014a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x241814a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x243814a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x245814a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x247814a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x249814a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24b814a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24d814a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24f814a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x34000c20, 0x00210fc0, 0x00000020 }, xf86-video-intel-2.99.917/xvmc/shader/vld/read_field_x1y0_uv.g4i0000664000175000017500000000202612400044327021011 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x07000FUD {align1}; // 8*16/32=4 send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V avg (16) g32.0<1>UW g40.0<16,8,1>UB g40.1<16,8,1>UB {align1}; avg (16) g33.0<1>UW g41.0<16,8,1>UB g41.1<16,8,1>UB {align1}; avg (16) g34.0<1>UW g42.0<16,8,1>UB g42.1<16,8,1>UB {align1}; avg (16) g35.0<1>UW g43.0<16,8,1>UB g43.1<16,8,1>UB {align1}; avg (16) g36.0<1>UW g44.0<16,8,1>UB g44.1<16,8,1>UB {align1}; avg (16) g37.0<1>UW g45.0<16,8,1>UB g45.1<16,8,1>UB {align1}; avg (16) g38.0<1>UW g46.0<16,8,1>UB g46.1<16,8,1>UB {align1}; avg (16) g39.0<1>UW g47.0<16,8,1>UB g47.1<16,8,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/frame_forward.g4b.gen50000664000175000017500000004750712400044327021021 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000be }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000090 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000086 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a005 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a006 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a005 }, { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a006 }, { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a005 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a006 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a005 }, { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a006 }, { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24801d29, 0x408d0400, 0x0248a005 }, { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a006 }, { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/field_forward.g4a0000664000175000017500000001222212400044327020136 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; mov (1) g126.8<1>UD ip {align1}; mov (1) ip g21.0<1,1,1>UD {align1}; /*field 0 of Y*/ asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; //motion vertical field select (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`4') define(`mv1',`g82.16') define(`mv2',`g82.18') include(`motion_field_y.g4i') mov (8) g58.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g60.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g62.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g64.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g66.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g68.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g70.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g72.0<1>UD g39.0<8,8,1>UD {align1}; /*field 1 of Y*/ asr (2) g31.14<1>W g82.24<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x4000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`4') define(`mv1',`g82.24') define(`mv2',`g82.26') include(`motion_field_y.g4i') mov (8) g59.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g61.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g63.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g65.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g67.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g69.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g71.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g73.0<1>UD g39.0<8,8,1>UD {align1}; /*field 0 of UV*/ shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g82.16<1>W g82.16<2,2,1>W 1W {align1}; asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u', `5') define(`surface_v', `6') define(`mv1',`g82.16') define(`mv2',`g82.18') include(`motion_field_uv.g4i') mov (8) g74.0<1>UW g32.0<8,8,1>UW {align1}; mov (8) g75.0<1>UW g33.0<8,8,1>UW {align1}; mov (8) g76.0<1>UW g34.0<8,8,1>UW {align1}; mov (8) g77.0<1>UW g35.0<8,8,1>UW {align1}; mov (8) g78.0<1>UW g36.0<8,8,1>UW {align1}; mov (8) g79.0<1>UW g37.0<8,8,1>UW {align1}; mov (8) g80.0<1>UW g38.0<8,8,1>UW {align1}; mov (8) g81.0<1>UW g39.0<8,8,1>UW {align1}; /*field 1 of UV*/ asr (2) g82.24<1>W g82.24<2,2,1>W 1W {align1}; asr (2) g31.14<1>W g82.24<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x4000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u', `5') define(`surface_v', `6') define(`mv1',`g82.24') define(`mv2',`g82.26') include(`motion_field_uv.g4i') mov (8) g74.16<1>UW g32.0<8,8,1>UW {align1}; mov (8) g75.16<1>UW g33.0<8,8,1>UW {align1}; mov (8) g76.16<1>UW g34.0<8,8,1>UW {align1}; mov (8) g77.16<1>UW g35.0<8,8,1>UW {align1}; mov (8) g78.16<1>UW g36.0<8,8,1>UW {align1}; mov (8) g79.16<1>UW g37.0<8,8,1>UW {align1}; mov (8) g80.16<1>UW g38.0<8,8,1>UW {align1}; mov (8) g81.16<1>UW g39.0<8,8,1>UW {align1}; include(`addidct.g4i') send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/vld/ipicture.g4a0000664000175000017500000001760312400044327017163 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT tab g31: read and write message descriptor g32~g55:DCT data g58~g81:reference data g82: thread payload g83~g106:IDCT data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; include(`iq_intra.g4i') //defined for idct define(`ROW_SHIFT', `11UD') define(`ROW_ADD', `0x400UD') define(`COL_SHIFT', `20UD') define(`COL_ADD', `0x80000UD') mov (1) a0.0<1>UD 0x06F006E0UD {align1}; //0x06F006E0UD+0x00200020UD=0x07100700UD (g56.0 and g56.16) //Y0 mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; add (8) g83.0<1>W g32.0<16,8,2>W 128UW {align1}; add (8) g84.0<1>W g33.0<16,8,2>W 128UW {align1}; add (8) g85.0<1>W g34.0<16,8,2>W 128UW {align1}; add (8) g86.0<1>W g35.0<16,8,2>W 128UW {align1}; add (8) g87.0<1>W g36.0<16,8,2>W 128UW {align1}; add (8) g88.0<1>W g37.0<16,8,2>W 128UW {align1}; add (8) g89.0<1>W g38.0<16,8,2>W 128UW {align1}; add (8) g90.0<1>W g39.0<16,8,2>W 128UW {align1}; //Y1 mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; add (8) g83.16<1>W g32.0<16,8,2>W 128UW {align1}; add (8) g84.16<1>W g33.0<16,8,2>W 128UW {align1}; add (8) g85.16<1>W g34.0<16,8,2>W 128UW {align1}; add (8) g86.16<1>W g35.0<16,8,2>W 128UW {align1}; add (8) g87.16<1>W g36.0<16,8,2>W 128UW {align1}; add (8) g88.16<1>W g37.0<16,8,2>W 128UW {align1}; add (8) g89.16<1>W g38.0<16,8,2>W 128UW {align1}; add (8) g90.16<1>W g39.0<16,8,2>W 128UW {align1}; //Y2 mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; add (8) g91.0<1>W g32.0<16,8,2>W 128UW {align1}; add (8) g92.0<1>W g33.0<16,8,2>W 128UW {align1}; add (8) g93.0<1>W g34.0<16,8,2>W 128UW {align1}; add (8) g94.0<1>W g35.0<16,8,2>W 128UW {align1}; add (8) g95.0<1>W g36.0<16,8,2>W 128UW {align1}; add (8) g96.0<1>W g37.0<16,8,2>W 128UW {align1}; add (8) g97.0<1>W g38.0<16,8,2>W 128UW {align1}; add (8) g98.0<1>W g39.0<16,8,2>W 128UW {align1}; //Y3 mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; add (8) g91.16<1>W g32.0<16,8,2>W 128UW {align1}; add (8) g92.16<1>W g33.0<16,8,2>W 128UW {align1}; add (8) g93.16<1>W g34.0<16,8,2>W 128UW {align1}; add (8) g94.16<1>W g35.0<16,8,2>W 128UW {align1}; add (8) g95.16<1>W g36.0<16,8,2>W 128UW {align1}; add (8) g96.16<1>W g37.0<16,8,2>W 128UW {align1}; add (8) g97.16<1>W g38.0<16,8,2>W 128UW {align1}; add (8) g98.16<1>W g39.0<16,8,2>W 128UW {align1}; //U mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; add (16) g99.0<1>W g32.0<16,8,2>W 128UW {align1}; add (16) g100.0<1>W g34.0<16,8,2>W 128UW {align1}; add (16) g101.0<1>W g36.0<16,8,2>W 128UW {align1}; add (16) g102.0<1>W g38.0<16,8,2>W 128UW {align1}; //V mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; add (16) g103.0<1>W g32.0<16,8,2>W 128UW {align1}; add (16) g104.0<1>W g34.0<16,8,2>W 128UW {align1}; add (16) g105.0<1>W g36.0<16,8,2>W 128UW {align1}; add (16) g106.0<1>W g38.0<16,8,2>W 128UW {align1}; /******************* MC ************************/ mov (1) g31.8<1>UD 0x00F000FUD {align1}; mov.sat (16) g83.0<2>UB g83.0<16,16,1>W {align1}; mov.sat (16) g84.0<2>UB g84.0<16,16,1>W {align1}; mov.sat (16) g85.0<2>UB g85.0<16,16,1>W {align1}; mov.sat (16) g86.0<2>UB g86.0<16,16,1>W {align1}; mov.sat (16) g87.0<2>UB g87.0<16,16,1>W {align1}; mov.sat (16) g88.0<2>UB g88.0<16,16,1>W {align1}; mov.sat (16) g89.0<2>UB g89.0<16,16,1>W {align1}; mov.sat (16) g90.0<2>UB g90.0<16,16,1>W {align1}; mov.sat (16) g91.0<2>UB g91.0<16,16,1>W {align1}; mov.sat (16) g92.0<2>UB g92.0<16,16,1>W {align1}; mov.sat (16) g93.0<2>UB g93.0<16,16,1>W {align1}; mov.sat (16) g94.0<2>UB g94.0<16,16,1>W {align1}; mov.sat (16) g95.0<2>UB g95.0<16,16,1>W {align1}; mov.sat (16) g96.0<2>UB g96.0<16,16,1>W {align1}; mov.sat (16) g97.0<2>UB g97.0<16,16,1>W {align1}; mov.sat (16) g98.0<2>UB g98.0<16,16,1>W {align1}; and.nz (1) null g82.2<1,1,1>UW 0x20UW{align1}; (f0) jmpi field_dct; mov (16) m1.0<1>UB g83.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g84.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g85.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g86.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g87.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g88.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g89.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g90.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g91.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g92.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g93.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g94.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g95.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g96.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g97.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g98.0<16,16,2>UB {align1}; jmpi write_back; field_dct: mov (16) m1.0<1>UB g83.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g91.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g84.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g92.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g85.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g93.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g86.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g94.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g87.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g95.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g88.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g96.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g89.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g97.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g90.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g98.0<16,16,2>UB {align1}; write_back: send (16) 0 acc0<1>UW g31<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; //U mov (1) g31.8<1>UD 0x0070007UD { align1 }; shr (2) g31.0<1>UD g82.12<2,2,1>UW 1D {align1}; mov.sat (16) g99.0<2>UB g99.0<16,16,1>W {align1}; mov.sat (16) g100.0<2>UB g100.0<16,16,1>W {align1}; mov.sat (16) g101.0<2>UB g101.0<16,16,1>W {align1}; mov.sat (16) g102.0<2>UB g102.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g99.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g100.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g101.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g102.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; //V mov.sat (16) g103.0<2>UB g103.0<16,16,1>W {align1}; mov.sat (16) g104.0<2>UB g104.0<16,16,1>W {align1}; mov.sat (16) g105.0<2>UB g105.0<16,16,1>W {align1}; mov.sat (16) g106.0<2>UB g106.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g103.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g104.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g105.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g106.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; OUT: send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; include(`do_iq_intra.g4i') include(`idct.g4i') xf86-video-intel-2.99.917/xvmc/shader/vld/field_f_b.g4b0000664000175000017500000015413112400044327017227 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a58, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x2a503dad, 0x00450a50, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a50, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a006 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x2a583dad, 0x00450a58, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a58, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a006 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x80800042, 0x27402529, 0x00b10740, 0x00b10400 }, { 0x80800042, 0x27802529, 0x00b10780, 0x00b10420 }, { 0x80800042, 0x27c02529, 0x00b107c0, 0x00b10440 }, { 0x80800042, 0x28002529, 0x00b10800, 0x00b10460 }, { 0x80800042, 0x28402529, 0x00b10840, 0x00b10480 }, { 0x80800042, 0x28802529, 0x00b10880, 0x00b104a0 }, { 0x80800042, 0x28c02529, 0x00b108c0, 0x00b104c0 }, { 0x80800042, 0x29002529, 0x00b10900, 0x00b104e0 }, { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a5c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x80800042, 0x27602529, 0x00b10760, 0x00b10400 }, { 0x80800042, 0x27a02529, 0x00b107a0, 0x00b10420 }, { 0x80800042, 0x27e02529, 0x00b107e0, 0x00b10440 }, { 0x80800042, 0x28202529, 0x00b10820, 0x00b10460 }, { 0x80800042, 0x28602529, 0x00b10860, 0x00b10480 }, { 0x80800042, 0x28a02529, 0x00b108a0, 0x00b104a0 }, { 0x80800042, 0x28e02529, 0x00b108e0, 0x00b104c0 }, { 0x80800042, 0x29202529, 0x00b10920, 0x00b104e0 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x2a543dad, 0x00450a54, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a54, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a009 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x80600042, 0x29402529, 0x008d0940, 0x008d0400 }, { 0x80600042, 0x29602529, 0x008d0960, 0x008d0420 }, { 0x80600042, 0x29802529, 0x008d0980, 0x008d0440 }, { 0x80600042, 0x29a02529, 0x008d09a0, 0x008d0460 }, { 0x80600042, 0x29c02529, 0x008d09c0, 0x008d0480 }, { 0x80600042, 0x29e02529, 0x008d09e0, 0x008d04a0 }, { 0x80600042, 0x2a002529, 0x008d0a00, 0x008d04c0 }, { 0x80600042, 0x2a202529, 0x008d0a20, 0x008d04e0 }, { 0x0020000c, 0x2a5c3dad, 0x00450a5c, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a5c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a009 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x80600042, 0x29502529, 0x008d0950, 0x008d0400 }, { 0x80600042, 0x29702529, 0x008d0970, 0x008d0420 }, { 0x80600042, 0x29902529, 0x008d0990, 0x008d0440 }, { 0x80600042, 0x29b02529, 0x008d09b0, 0x008d0460 }, { 0x80600042, 0x29d02529, 0x008d09d0, 0x008d0480 }, { 0x80600042, 0x29f02529, 0x008d09f0, 0x008d04a0 }, { 0x80600042, 0x2a102529, 0x008d0a10, 0x008d04c0 }, { 0x80600042, 0x2a302529, 0x008d0a30, 0x008d04e0 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/frame_f_b.g4b0000664000175000017500000011040512400044327017232 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005f }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000043 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, { 0x00802001, 0x2d800021, 0x00b10740, 0x00000000 }, { 0x00802001, 0x2dc00021, 0x00b10780, 0x00000000 }, { 0x00802001, 0x2e000021, 0x00b107c0, 0x00000000 }, { 0x00802001, 0x2e400021, 0x00b10800, 0x00000000 }, { 0x00802001, 0x2e800021, 0x00b10840, 0x00000000 }, { 0x00802001, 0x2ec00021, 0x00b10880, 0x00000000 }, { 0x00802001, 0x2f000021, 0x00b108c0, 0x00000000 }, { 0x00802001, 0x2f400021, 0x00b10900, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005f }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000043 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, { 0x80800042, 0x27402529, 0x00b10740, 0x00b10d80 }, { 0x80800042, 0x27602529, 0x00b10760, 0x00b10da0 }, { 0x80800042, 0x27802529, 0x00b10780, 0x00b10dc0 }, { 0x80800042, 0x27a02529, 0x00b107a0, 0x00b10de0 }, { 0x80800042, 0x27c02529, 0x00b107c0, 0x00b10e00 }, { 0x80800042, 0x27e02529, 0x00b107e0, 0x00b10e20 }, { 0x80800042, 0x28002529, 0x00b10800, 0x00b10e40 }, { 0x80800042, 0x28202529, 0x00b10820, 0x00b10e60 }, { 0x80800042, 0x28402529, 0x00b10840, 0x00b10e80 }, { 0x80800042, 0x28602529, 0x00b10860, 0x00b10ea0 }, { 0x80800042, 0x28802529, 0x00b10880, 0x00b10ec0 }, { 0x80800042, 0x28a02529, 0x00b108a0, 0x00b10ee0 }, { 0x80800042, 0x28c02529, 0x00b108c0, 0x00b10f00 }, { 0x80800042, 0x28e02529, 0x00b108e0, 0x00b10f20 }, { 0x80800042, 0x29002529, 0x00b10900, 0x00b10f40 }, { 0x80800042, 0x29202529, 0x00b10920, 0x00b10f60 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a005 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a006 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a005 }, { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a006 }, { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000025 }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a005 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a006 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a005 }, { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a006 }, { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24801d29, 0x008d0400, 0x0414a005 }, { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a006 }, { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x2d800231, 0x00b20940, 0x00000000 }, { 0x00800001, 0x2d900231, 0x00b20960, 0x00000000 }, { 0x00800001, 0x2da00231, 0x00b20980, 0x00000000 }, { 0x00800001, 0x2db00231, 0x00b209a0, 0x00000000 }, { 0x00800001, 0x2dc00231, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x2dd00231, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x2de00231, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x2df00231, 0x00b20a20, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a008 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a009 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a008 }, { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a009 }, { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000025 }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a008 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a009 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a008 }, { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a009 }, { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24801d29, 0x008d0400, 0x0414a008 }, { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a009 }, { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, { 0x80800042, 0x29404529, 0x00b10940, 0x00b10d80 }, { 0x80800042, 0x29604529, 0x00b10960, 0x00b10d90 }, { 0x80800042, 0x29804529, 0x00b10980, 0x00b10da0 }, { 0x80800042, 0x29a04529, 0x00b109a0, 0x00b10db0 }, { 0x80800042, 0x29c04529, 0x00b109c0, 0x00b10dc0 }, { 0x80800042, 0x29e04529, 0x00b109e0, 0x00b10dd0 }, { 0x80800042, 0x2a004529, 0x00b10a00, 0x00b10de0 }, { 0x80800042, 0x2a204529, 0x00b10a20, 0x00b10df0 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/read_field_x0y0_y.g4i0000664000175000017500000000514312400044327020631 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x01FUD {align1}; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g42.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g46.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; mov (1) g115.8<1>UD 0x07001FUD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; mov (16) g32.0<1>UW g40.0<16,16,1>UB {align1}; mov (16) g33.0<1>UW g42.0<16,16,1>UB {align1}; mov (16) g34.0<1>UW g44.0<16,16,1>UB {align1}; mov (16) g35.0<1>UW g46.0<16,16,1>UB {align1}; mov (16) g36.0<1>UW g48.0<16,16,1>UB {align1}; mov (16) g37.0<1>UW g50.0<16,16,1>UB {align1}; mov (16) g38.0<1>UW g52.0<16,16,1>UB {align1}; mov (16) g39.0<1>UW g54.0<16,16,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/read_frame_x1y1_y.g4i0000664000175000017500000001360212400044327020641 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (1) g32.8<1>UD 0x007001FUD {align1}; send (16) 0 g38.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; mov (1) g32.8<1>UD 0x1FUD {align1}; send (16) 0 g54.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 1 {align1}; add (16) g58.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1}; add (16) g59.0<1>UW g39.0<16,16,1>UB g39.1<16,16,1>UB {align1}; add (16) g60.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; add (16) g61.0<1>UW g41.0<16,16,1>UB g41.1<16,16,1>UB {align1}; add (16) g62.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; add (16) g63.0<1>UW g43.0<16,16,1>UB g43.1<16,16,1>UB {align1}; add (16) g64.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; add (16) g65.0<1>UW g45.0<16,16,1>UB g45.1<16,16,1>UB {align1}; add (16) g66.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; add (16) g67.0<1>UW g47.0<16,16,1>UB g47.1<16,16,1>UB {align1}; add (16) g68.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; add (16) g69.0<1>UW g49.0<16,16,1>UB g49.1<16,16,1>UB {align1}; add (16) g70.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; add (16) g71.0<1>UW g51.0<16,16,1>UB g51.1<16,16,1>UB {align1}; add (16) g72.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; add (16) g73.0<1>UW g53.0<16,16,1>UB g53.1<16,16,1>UB {align1}; add (16) g58.0<1>UW g58.0<16,16,1>UW g39.0<16,16,1>UB {align1}; add (16) g59.0<1>UW g59.0<16,16,1>UW g40.0<16,16,1>UB {align1}; add (16) g60.0<1>UW g60.0<16,16,1>UW g41.0<16,16,1>UB {align1}; add (16) g61.0<1>UW g61.0<16,16,1>UW g42.0<16,16,1>UB {align1}; add (16) g62.0<1>UW g62.0<16,16,1>UW g43.0<16,16,1>UB {align1}; add (16) g63.0<1>UW g63.0<16,16,1>UW g44.0<16,16,1>UB {align1}; add (16) g64.0<1>UW g64.0<16,16,1>UW g45.0<16,16,1>UB {align1}; add (16) g65.0<1>UW g65.0<16,16,1>UW g46.0<16,16,1>UB {align1}; add (16) g66.0<1>UW g66.0<16,16,1>UW g47.0<16,16,1>UB {align1}; add (16) g67.0<1>UW g67.0<16,16,1>UW g48.0<16,16,1>UB {align1}; add (16) g68.0<1>UW g68.0<16,16,1>UW g49.0<16,16,1>UB {align1}; add (16) g69.0<1>UW g69.0<16,16,1>UW g50.0<16,16,1>UB {align1}; add (16) g70.0<1>UW g70.0<16,16,1>UW g51.0<16,16,1>UB {align1}; add (16) g71.0<1>UW g71.0<16,16,1>UW g52.0<16,16,1>UB {align1}; add (16) g72.0<1>UW g72.0<16,16,1>UW g53.0<16,16,1>UB {align1}; add (16) g73.0<1>UW g73.0<16,16,1>UW g54.0<16,16,1>UB {align1}; add (16) g58.0<1>UW g58.0<16,16,1>UW g39.1<16,16,1>UB {align1}; add (16) g59.0<1>UW g59.0<16,16,1>UW g40.1<16,16,1>UB {align1}; add (16) g60.0<1>UW g60.0<16,16,1>UW g41.1<16,16,1>UB {align1}; add (16) g61.0<1>UW g61.0<16,16,1>UW g42.1<16,16,1>UB {align1}; add (16) g62.0<1>UW g62.0<16,16,1>UW g43.1<16,16,1>UB {align1}; add (16) g63.0<1>UW g63.0<16,16,1>UW g44.1<16,16,1>UB {align1}; add (16) g64.0<1>UW g64.0<16,16,1>UW g45.1<16,16,1>UB {align1}; add (16) g65.0<1>UW g65.0<16,16,1>UW g46.1<16,16,1>UB {align1}; add (16) g66.0<1>UW g66.0<16,16,1>UW g47.1<16,16,1>UB {align1}; add (16) g67.0<1>UW g67.0<16,16,1>UW g48.1<16,16,1>UB {align1}; add (16) g68.0<1>UW g68.0<16,16,1>UW g49.1<16,16,1>UB {align1}; add (16) g69.0<1>UW g69.0<16,16,1>UW g50.1<16,16,1>UB {align1}; add (16) g70.0<1>UW g70.0<16,16,1>UW g51.1<16,16,1>UB {align1}; add (16) g71.0<1>UW g71.0<16,16,1>UW g52.1<16,16,1>UB {align1}; add (16) g72.0<1>UW g72.0<16,16,1>UW g53.1<16,16,1>UB {align1}; add (16) g73.0<1>UW g73.0<16,16,1>UW g54.1<16,16,1>UB {align1}; shr.sat (16) g58.0<1>UW g58.0<16,16,1>UW 2UW {align1}; shr.sat (16) g59.0<1>UW g59.0<16,16,1>UW 2UW {align1}; shr.sat (16) g60.0<1>UW g60.0<16,16,1>UW 2UW {align1}; shr.sat (16) g61.0<1>UW g61.0<16,16,1>UW 2UW {align1}; shr.sat (16) g62.0<1>UW g62.0<16,16,1>UW 2UW {align1}; shr.sat (16) g63.0<1>UW g63.0<16,16,1>UW 2UW {align1}; shr.sat (16) g64.0<1>UW g64.0<16,16,1>UW 2UW {align1}; shr.sat (16) g65.0<1>UW g65.0<16,16,1>UW 2UW {align1}; shr.sat (16) g66.0<1>UW g66.0<16,16,1>UW 2UW {align1}; shr.sat (16) g67.0<1>UW g67.0<16,16,1>UW 2UW {align1}; shr.sat (16) g68.0<1>UW g68.0<16,16,1>UW 2UW {align1}; shr.sat (16) g69.0<1>UW g69.0<16,16,1>UW 2UW {align1}; shr.sat (16) g70.0<1>UW g70.0<16,16,1>UW 2UW {align1}; shr.sat (16) g71.0<1>UW g71.0<16,16,1>UW 2UW {align1}; shr.sat (16) g72.0<1>UW g72.0<16,16,1>UW 2UW {align1}; shr.sat (16) g73.0<1>UW g73.0<16,16,1>UW 2UW {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/frame_forward.g4b0000664000175000017500000004750712400044327020164 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005f }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000043 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000014 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a005 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a006 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a005 }, { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a006 }, { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000025 }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0418a005 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0418a006 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x008d0400, 0x0411a005 }, { 0x00800031, 0x26801d29, 0x008d0400, 0x0411a006 }, { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24801d29, 0x008d0400, 0x0414a005 }, { 0x00800031, 0x25001d29, 0x008d0400, 0x0414a006 }, { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/read_field_x0y1_uv.g4i0000664000175000017500000000243612400044327021016 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x07000FUD {align1}; // 8*16/32=4 send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g45.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V mov (1) g115.8<1>UD 0xFUD {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1};//U send (16) 0 g49.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1};//V avg (16) g32.0<1>UW g40.0<16,8,1>UB g41.0<16,8,1>UB {align1}; avg (16) g33.0<1>UW g41.0<16,8,1>UB g42.0<16,8,1>UB {align1}; avg (16) g34.0<1>UW g42.0<16,8,1>UB g43.0<16,8,1>UB {align1}; avg (16) g35.0<1>UW g43.0<16,8,1>UB g44.0<16,8,1>UB {align1}; avg (16) g36.0<1>UW g45.0<16,8,1>UB g46.0<16,8,1>UB {align1}; avg (16) g37.0<1>UW g46.0<16,8,1>UB g47.0<16,8,1>UB {align1}; avg (16) g38.0<1>UW g47.0<16,8,1>UB g48.0<16,8,1>UB {align1}; avg (16) g39.0<1>UW g48.0<16,8,1>UB g49.0<16,8,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/lib.g4a0000664000175000017500000001443712400044327016107 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix in UB format g3~g4:non intra IQ matrix in UB format g5~g20:IDCT table g32~g55:DCT data before IQ g56~g79:DCT data after IQ g83~g106: IDCT data after idct g82: thread payload backup g125: ip before jump */ include(`iq_non_intra.g4i') define(`ROW_SHIFT', `11UD') //define for idct define(`ROW_ADD', `0x400UD') define(`COL_SHIFT', `20UD') define(`COL_ADD', `0x80000UD') mov (1) a0.0<1>UD 0x06F006E0UD {align1};//0x06F006E0UD+0x00200020UD=0x07100700UD (g56.0 and g56.16,the start of DCT data) //Y0 and.nz (1) null g82.8<1,1,1>UW 0x800UW {align1}; (f0) jmpi do_idct_y0; mov (8) g83.0<1>UW 0UW {align1}; mov (8) g84.0<1>UW 0UW {align1}; mov (8) g85.0<1>UW 0UW {align1}; mov (8) g86.0<1>UW 0UW {align1}; mov (8) g87.0<1>UW 0UW {align1}; mov (8) g88.0<1>UW 0UW {align1}; mov (8) g89.0<1>UW 0UW {align1}; mov (8) g90.0<1>UW 0UW {align1}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00800080UD {align1}; jmpi block_y1; do_idct_y0: mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; mov (8) g83.0<1>W g32.0<16,8,2>W {align1}; mov (8) g84.0<1>W g33.0<16,8,2>W {align1}; mov (8) g85.0<1>W g34.0<16,8,2>W {align1}; mov (8) g86.0<1>W g35.0<16,8,2>W {align1}; mov (8) g87.0<1>W g36.0<16,8,2>W {align1}; mov (8) g88.0<1>W g37.0<16,8,2>W {align1}; mov (8) g89.0<1>W g38.0<16,8,2>W {align1}; mov (8) g90.0<1>W g39.0<16,8,2>W {align1}; //Y1 block_y1: and.nz (1) null g82.8<1,1,1>UW 0x400UW {align1}; (f0) jmpi do_idct_y1; mov (8) g83.16<1>UW 0UW {align1}; mov (8) g84.16<1>UW 0UW {align1}; mov (8) g85.16<1>UW 0UW {align1}; mov (8) g86.16<1>UW 0UW {align1}; mov (8) g87.16<1>UW 0UW {align1}; mov (8) g88.16<1>UW 0UW {align1}; mov (8) g89.16<1>UW 0UW {align1}; mov (8) g90.16<1>UW 0UW {align1}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00800080UD {align1}; jmpi block_y2; do_idct_y1: mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; mov (8) g83.16<1>W g32.0<16,8,2>W {align1}; mov (8) g84.16<1>W g33.0<16,8,2>W {align1}; mov (8) g85.16<1>W g34.0<16,8,2>W {align1}; mov (8) g86.16<1>W g35.0<16,8,2>W {align1}; mov (8) g87.16<1>W g36.0<16,8,2>W {align1}; mov (8) g88.16<1>W g37.0<16,8,2>W {align1}; mov (8) g89.16<1>W g38.0<16,8,2>W {align1}; mov (8) g90.16<1>W g39.0<16,8,2>W {align1}; //Y2 block_y2: and.nz (1) null g82.8<1,1,1>UW 0x200UW {align1}; (f0) jmpi do_idct_y2; mov (8) g91.0<1>UW 0UW {align1}; mov (8) g92.0<1>UW 0UW {align1}; mov (8) g93.0<1>UW 0UW {align1}; mov (8) g94.0<1>UW 0UW {align1}; mov (8) g95.0<1>UW 0UW {align1}; mov (8) g96.0<1>UW 0UW {align1}; mov (8) g97.0<1>UW 0UW {align1}; mov (8) g98.0<1>UW 0UW {align1}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00800080UD {align1}; jmpi block_y3; do_idct_y2: mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; mov (8) g91.0<1>W g32.0<16,8,2>W {align1}; mov (8) g92.0<1>W g33.0<16,8,2>W {align1}; mov (8) g93.0<1>W g34.0<16,8,2>W {align1}; mov (8) g94.0<1>W g35.0<16,8,2>W {align1}; mov (8) g95.0<1>W g36.0<16,8,2>W {align1}; mov (8) g96.0<1>W g37.0<16,8,2>W {align1}; mov (8) g97.0<1>W g38.0<16,8,2>W {align1}; mov (8) g98.0<1>W g39.0<16,8,2>W {align1}; //Y3 block_y3: and.nz (1) null g82.8<1,1,1>UW 0x100UW {align1}; (f0) jmpi do_idct_y3; mov (8) g91.16<1>UW 0UW {align1}; mov (8) g92.16<1>UW 0UW {align1}; mov (8) g93.16<1>UW 0UW {align1}; mov (8) g94.16<1>UW 0UW {align1}; mov (8) g95.16<1>UW 0UW {align1}; mov (8) g96.16<1>UW 0UW {align1}; mov (8) g97.16<1>UW 0UW {align1}; mov (8) g98.16<1>UW 0UW {align1}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00800080UD {align1}; jmpi block_u; do_idct_y3: mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; mov (8) g91.16<1>W g32.0<16,8,2>W {align1}; mov (8) g92.16<1>W g33.0<16,8,2>W {align1}; mov (8) g93.16<1>W g34.0<16,8,2>W {align1}; mov (8) g94.16<1>W g35.0<16,8,2>W {align1}; mov (8) g95.16<1>W g36.0<16,8,2>W {align1}; mov (8) g96.16<1>W g37.0<16,8,2>W {align1}; mov (8) g97.16<1>W g38.0<16,8,2>W {align1}; mov (8) g98.16<1>W g39.0<16,8,2>W {align1}; //U block_u: and.nz (1) null g82.8<1,1,1>UW 0x80UW {align1}; (f0) jmpi do_idct_u; mov (16) g99.0<1>UW 0UW {align1}; mov (16) g100.0<1>UW 0UW {align1}; mov (16) g101.0<1>UW 0UW {align1}; mov (16) g102.0<1>UW 0UW {align1}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00800080UD {align1}; jmpi block_v; do_idct_u: mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; mov (16) g99.0<1>W g32.0<16,8,2>W {align1}; mov (16) g100.0<1>W g34.0<16,8,2>W {align1}; mov (16) g101.0<1>W g36.0<16,8,2>W {align1}; mov (16) g102.0<1>W g38.0<16,8,2>W {align1}; //V block_v: and.nz (1) null g82.8<1,1,1>UW 0x40UW {align1}; (f0) jmpi do_idct_v; mov (16) g103.0<1>UW 0UW {align1}; mov (16) g104.0<1>UW 0UW {align1}; mov (16) g105.0<1>UW 0UW {align1}; mov (16) g106.0<1>UW 0UW {align1}; jmpi block_end; do_idct_v: mov (1) g125.0<1>UD ip {align1}; jmpi IDCT_START; mov (16) g103.0<1>W g32.0<16,8,2>W {align1}; mov (16) g104.0<1>W g34.0<16,8,2>W {align1}; mov (16) g105.0<1>W g36.0<16,8,2>W {align1}; mov (16) g106.0<1>W g38.0<16,8,2>W {align1}; block_end: add (1) ip g126.8<1,1,1>UD 0x20UD {align1}; //jump back include(`do_iq_non_intra.g4i') include(`idct.g4i') xf86-video-intel-2.99.917/xvmc/shader/vld/addidct.g4i0000664000175000017500000001571112400044327016741 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; //restore x and y and.nz (1) null g82.2<1,1,1>UW 0x20UW {align1}; //dct_type (f0) jmpi field_dct; add (16) g58.0<1>W g83.0<16,16,1>W g58.0<16,16,2>UB {align1}; add (16) g59.0<1>W g84.0<16,16,1>W g59.0<16,16,2>UB {align1}; add (16) g60.0<1>W g85.0<16,16,1>W g60.0<16,16,2>UB {align1}; add (16) g61.0<1>W g86.0<16,16,1>W g61.0<16,16,2>UB {align1}; add (16) g62.0<1>W g87.0<16,16,1>W g62.0<16,16,2>UB {align1}; add (16) g63.0<1>W g88.0<16,16,1>W g63.0<16,16,2>UB {align1}; add (16) g64.0<1>W g89.0<16,16,1>W g64.0<16,16,2>UB {align1}; add (16) g65.0<1>W g90.0<16,16,1>W g65.0<16,16,2>UB {align1}; add (16) g66.0<1>W g91.0<16,16,1>W g66.0<16,16,2>UB {align1}; add (16) g67.0<1>W g92.0<16,16,1>W g67.0<16,16,2>UB {align1}; add (16) g68.0<1>W g93.0<16,16,1>W g68.0<16,16,2>UB {align1}; add (16) g69.0<1>W g94.0<16,16,1>W g69.0<16,16,2>UB {align1}; add (16) g70.0<1>W g95.0<16,16,1>W g70.0<16,16,2>UB {align1}; add (16) g71.0<1>W g96.0<16,16,1>W g71.0<16,16,2>UB {align1}; add (16) g72.0<1>W g97.0<16,16,1>W g72.0<16,16,2>UB {align1}; add (16) g73.0<1>W g98.0<16,16,1>W g73.0<16,16,2>UB {align1}; jmpi write_back; field_dct: add (16) g58.0<1>W g83.0<16,16,1>W g58.0<16,16,2>UB {align1}; add (16) g59.0<1>W g91.0<16,16,1>W g59.0<16,16,2>UB {align1}; add (16) g60.0<1>W g84.0<16,16,1>W g60.0<16,16,2>UB {align1}; add (16) g61.0<1>W g92.0<16,16,1>W g61.0<16,16,2>UB {align1}; add (16) g62.0<1>W g85.0<16,16,1>W g62.0<16,16,2>UB {align1}; add (16) g63.0<1>W g93.0<16,16,1>W g63.0<16,16,2>UB {align1}; add (16) g64.0<1>W g86.0<16,16,1>W g64.0<16,16,2>UB {align1}; add (16) g65.0<1>W g94.0<16,16,1>W g65.0<16,16,2>UB {align1}; add (16) g66.0<1>W g87.0<16,16,1>W g66.0<16,16,2>UB {align1}; add (16) g67.0<1>W g95.0<16,16,1>W g67.0<16,16,2>UB {align1}; add (16) g68.0<1>W g88.0<16,16,1>W g68.0<16,16,2>UB {align1}; add (16) g69.0<1>W g96.0<16,16,1>W g69.0<16,16,2>UB {align1}; add (16) g70.0<1>W g89.0<16,16,1>W g70.0<16,16,2>UB {align1}; add (16) g71.0<1>W g97.0<16,16,1>W g71.0<16,16,2>UB {align1}; add (16) g72.0<1>W g90.0<16,16,1>W g72.0<16,16,2>UB {align1}; add (16) g73.0<1>W g98.0<16,16,1>W g73.0<16,16,2>UB {align1}; write_back: mov (1) g31.8<1>UD 0x00F000FUD {align1}; mov.sat (16) g58.0<2>UB g58.0<16,16,1>W {align1}; mov.sat (16) g59.0<2>UB g59.0<16,16,1>W {align1}; mov.sat (16) g60.0<2>UB g60.0<16,16,1>W {align1}; mov.sat (16) g61.0<2>UB g61.0<16,16,1>W {align1}; mov.sat (16) g62.0<2>UB g62.0<16,16,1>W {align1}; mov.sat (16) g63.0<2>UB g63.0<16,16,1>W {align1}; mov.sat (16) g64.0<2>UB g64.0<16,16,1>W {align1}; mov.sat (16) g65.0<2>UB g65.0<16,16,1>W {align1}; mov.sat (16) g66.0<2>UB g66.0<16,16,1>W {align1}; mov.sat (16) g67.0<2>UB g67.0<16,16,1>W {align1}; mov.sat (16) g68.0<2>UB g68.0<16,16,1>W {align1}; mov.sat (16) g69.0<2>UB g69.0<16,16,1>W {align1}; mov.sat (16) g70.0<2>UB g70.0<16,16,1>W {align1}; mov.sat (16) g71.0<2>UB g71.0<16,16,1>W {align1}; mov.sat (16) g72.0<2>UB g72.0<16,16,1>W {align1}; mov.sat (16) g73.0<2>UB g73.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g58.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g59.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g60.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g61.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g62.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g63.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g64.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g65.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g66.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g67.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g68.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g69.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g70.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g71.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g72.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g73.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; //U mov (1) g31.8<1>UD 0x0070007UD { align1 }; shr (2) g31.0<1>UD g31.0<2,2,1>UD 1D {align1}; add (16) g74.0<1>W g99.0<16,16,1>W g74.0<16,16,1>UW {align1}; add (16) g75.0<1>W g100.0<16,16,1>W g75.0<16,16,1>UW {align1}; add (16) g76.0<1>W g101.0<16,16,1>W g76.0<16,16,1>UW {align1}; add (16) g77.0<1>W g102.0<16,16,1>W g77.0<16,16,1>UW {align1}; mov.sat (16) g74.0<2>UB g74.0<16,16,1>W {align1}; mov.sat (16) g75.0<2>UB g75.0<16,16,1>W {align1}; mov.sat (16) g76.0<2>UB g76.0<16,16,1>W {align1}; mov.sat (16) g77.0<2>UB g77.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g74.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g75.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g76.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g77.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; //V add (16) g78.0<1>UW g103.0<16,16,1>W g78.0<16,16,1>UW {align1}; add (16) g79.0<1>UW g104.0<16,16,1>W g79.0<16,16,1>UW {align1}; add (16) g80.0<1>UW g105.0<16,16,1>W g80.0<16,16,1>UW {align1}; add (16) g81.0<1>UW g106.0<16,16,1>W g81.0<16,16,1>UW {align1}; mov.sat (16) g78.0<2>UB g78.0<16,16,1>W {align1}; mov.sat (16) g79.0<2>UB g79.0<16,16,1>W {align1}; mov.sat (16) g80.0<2>UB g80.0<16,16,1>W {align1}; mov.sat (16) g81.0<2>UB g81.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g78.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g79.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g80.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g81.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/vld/motion_frame_uv.g4i0000664000175000017500000000322112400044327020527 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng */ and.z (1) null mv1<1,1,1>UW 2UD {align1}; (f0) jmpi LL1; and.z (1) null mv2<1,1,1>UW 2UD {align1}; (f0) jmpi LL2; include(`read_frame_x1y1_uv.g4i') jmpi LL5; LL2: include(`read_frame_x1y0_uv.g4i') jmpi LL5; LL1: and.z (1) null mv2<1,1,1>UW 2UD {align1}; (f0) jmpi LL4; include(`read_frame_x0y1_uv.g4i') jmpi LL5; LL4: include(`read_frame_x0y0_uv.g4i') LL5: xf86-video-intel-2.99.917/xvmc/shader/vld/field_backward.g4b0000664000175000017500000007331712400044327020265 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a5c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x2a543dad, 0x00450a54, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a54, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a009 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x2a5c3dad, 0x00450a5c, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a5c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a009 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/field_backward.g4a0000664000175000017500000001167612400044327020264 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov(2) g31.0<1>UD g82.12<2,2,1>UW {align1}; mov (1) g126.8<1>UD ip {align1}; mov (1) ip g21.0<1,1,1>UD {align1}; /*field 0 of Y*/ asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`7') define(`mv1',`g82.20') define(`mv2',`g82.22') include(`motion_field_y.g4i') mov (8) g58.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g60.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g62.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g64.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g66.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g68.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g70.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g72.0<1>UD g39.0<8,8,1>UD {align1}; /*field 1 of Y*/ asr (2) g31.14<1>W g82.28<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x8000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`7') define(`mv1',`g82.28') define(`mv2',`g82.30') include(`motion_field_y.g4i') mov (8) g59.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g61.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g63.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g65.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g67.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g69.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g71.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g73.0<1>UD g39.0<8,8,1>UD {align1}; /*field 0 of UV*/ shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g82.20<1>W g82.20<2,2,1>W 1W {align1}; asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u', `8') define(`surface_v', `9') define(`mv1',`g82.20') define(`mv2',`g82.22') include(`motion_field_uv.g4i') mov (8) g74.0<1>UW g32.0<8,8,1>UW {align1}; mov (8) g75.0<1>UW g33.0<8,8,1>UW {align1}; mov (8) g76.0<1>UW g34.0<8,8,1>UW {align1}; mov (8) g77.0<1>UW g35.0<8,8,1>UW {align1}; mov (8) g78.0<1>UW g36.0<8,8,1>UW {align1}; mov (8) g79.0<1>UW g37.0<8,8,1>UW {align1}; mov (8) g80.0<1>UW g38.0<8,8,1>UW {align1}; mov (8) g81.0<1>UW g39.0<8,8,1>UW {align1}; /*field 1 of UV*/ asr (2) g82.28<1>W g82.28<2,2,1>W 1W {align1}; asr (2) g31.14<1>W g82.28<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and.nz (1) null g82.2<1,1,1>UW 0x8000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g82.28') define(`mv2',`g82.30') include(`motion_field_uv.g4i') mov (8) g74.16<1>UW g32.0<8,8,1>UW {align1}; mov (8) g75.16<1>UW g33.0<8,8,1>UW {align1}; mov (8) g76.16<1>UW g34.0<8,8,1>UW {align1}; mov (8) g77.16<1>UW g35.0<8,8,1>UW {align1}; mov (8) g78.16<1>UW g36.0<8,8,1>UW {align1}; mov (8) g79.16<1>UW g37.0<8,8,1>UW {align1}; mov (8) g80.16<1>UW g38.0<8,8,1>UW {align1}; mov (8) g81.16<1>UW g39.0<8,8,1>UW {align1}; include(`addidct.g4i') send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/vld/frame_backward.g4a0000664000175000017500000000471212400044327020264 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov(2) g31.0<1>UD g82.12<2,2,1>UW {align1}; mov (1) g126.8<1>UD ip {align1}; mov (1) ip g21.0<1,1,1>UD {align1}; //Y, (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; define(`input_surface', `7') define(`mv1', `g82.20') define(`mv2', `g82.22') include(`motion_frame_y.g4i') //UV, (x', y') = (x >> 1, y >> 1) + (motion_vector.x >> 2, motion_vector.y >> 2) shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g31.14<1>W g82.20<2,2,1>W 2W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; define(`input_surface1', `8') define(`input_surface2', `9') include(`motion_frame_uv.g4i') include(`addidct.g4i') send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/vld/field_f_b.g4a0000664000175000017500000002223512400044327017225 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov(2) g31.0<1>UD g82.12<2,2,1>UW {align1}; mov (1) g126.8<1>UD ip {align1}; mov (1) ip g21.0<1,1,1>UD {align1}; /*field 0 forward prediction of Y*/ asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`4') define(`mv1',`g82.16') define(`mv2',`g82.18') include(`motion_field_y.g4i') mov (8) g58.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g60.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g62.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g64.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g66.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g68.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g70.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g72.0<1>UD g39.0<8,8,1>UD {align1}; /*field 1 forward prediction of Y*/ asr (2) g31.14<1>W g82.24<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x4000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`4') define(`mv1',`g82.24') define(`mv2',`g82.26') include(`motion_field_y.g4i') mov (8) g59.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g61.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g63.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g65.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g67.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g69.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g71.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g73.0<1>UD g39.0<8,8,1>UD {align1}; /*field 0 forward prediction of UV*/ shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g82.16<1>W g82.16<2,2,1>W 1W {align1}; asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x1000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u', `5') define(`surface_v', `6') define(`mv1',`g82.16') define(`mv2',`g82.18') include(`motion_field_uv.g4i') mov (8) g74.0<1>UW g32.0<8,8,1>UW {align1}; mov (8) g75.0<1>UW g33.0<8,8,1>UW {align1}; mov (8) g76.0<1>UW g34.0<8,8,1>UW {align1}; mov (8) g77.0<1>UW g35.0<8,8,1>UW {align1}; mov (8) g78.0<1>UW g36.0<8,8,1>UW {align1}; mov (8) g79.0<1>UW g37.0<8,8,1>UW {align1}; mov (8) g80.0<1>UW g38.0<8,8,1>UW {align1}; mov (8) g81.0<1>UW g39.0<8,8,1>UW {align1}; /*field 1 forward prediction of UV*/ asr (2) g82.24<1>W g82.24<2,2,1>W 1W {align1}; asr (2) g31.14<1>W g82.24<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x4000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g82.24') define(`mv2',`g82.26') include(`motion_field_uv.g4i') mov (8) g74.16<1>UW g32.0<8,8,1>UW {align1}; mov (8) g75.16<1>UW g33.0<8,8,1>UW {align1}; mov (8) g76.16<1>UW g34.0<8,8,1>UW {align1}; mov (8) g77.16<1>UW g35.0<8,8,1>UW {align1}; mov (8) g78.16<1>UW g36.0<8,8,1>UW {align1}; mov (8) g79.16<1>UW g37.0<8,8,1>UW {align1}; mov (8) g80.16<1>UW g38.0<8,8,1>UW {align1}; mov (8) g81.16<1>UW g39.0<8,8,1>UW {align1}; /*field 0 backward prediction of Y*/ mov(2) g31.0<1>UD g82.12<2,2,1>UW {align1}; asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`7') define(`mv1',`g82.20') define(`mv2',`g82.22') include(`motion_field_y.g4i') avg.sat (16) g58.0<1>UW g58.0<16,16,1>UW g32.0<16,16,1>UW {align1}; avg.sat (16) g60.0<1>UW g60.0<16,16,1>UW g33.0<16,16,1>UW {align1}; avg.sat (16) g62.0<1>UW g62.0<16,16,1>UW g34.0<16,16,1>UW {align1}; avg.sat (16) g64.0<1>UW g64.0<16,16,1>UW g35.0<16,16,1>UW {align1}; avg.sat (16) g66.0<1>UW g66.0<16,16,1>UW g36.0<16,16,1>UW {align1}; avg.sat (16) g68.0<1>UW g68.0<16,16,1>UW g37.0<16,16,1>UW {align1}; avg.sat (16) g70.0<1>UW g70.0<16,16,1>UW g38.0<16,16,1>UW {align1}; avg.sat (16) g72.0<1>UW g72.0<16,16,1>UW g39.0<16,16,1>UW {align1}; /*field 1 backward prediction of Y*/ asr (2) g31.14<1>W g82.28<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x8000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`7') define(`mv1',`g82.28') define(`mv2',`g82.30') include(`motion_field_y.g4i') avg.sat (16) g59.0<1>UW g59.0<16,16,1>UW g32.0<16,16,1>UW {align1}; avg.sat (16) g61.0<1>UW g61.0<16,16,1>UW g33.0<16,16,1>UW {align1}; avg.sat (16) g63.0<1>UW g63.0<16,16,1>UW g34.0<16,16,1>UW {align1}; avg.sat (16) g65.0<1>UW g65.0<16,16,1>UW g35.0<16,16,1>UW {align1}; avg.sat (16) g67.0<1>UW g67.0<16,16,1>UW g36.0<16,16,1>UW {align1}; avg.sat (16) g69.0<1>UW g69.0<16,16,1>UW g37.0<16,16,1>UW {align1}; avg.sat (16) g71.0<1>UW g71.0<16,16,1>UW g38.0<16,16,1>UW {align1}; avg.sat (16) g73.0<1>UW g73.0<16,16,1>UW g39.0<16,16,1>UW {align1}; /*field 0 backward prediction of UV*/ shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g82.20<1>W g82.20<2,2,1>W 1W {align1}; asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x2000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u', `8') define(`surface_v', `9') define(`mv1',`g82.20') define(`mv2',`g82.22') include(`motion_field_uv.g4i') avg.sat (8) g74.0<1>UW g74.0<8,8,1>UW g32.0<8,8,1>UW {align1}; avg.sat (8) g75.0<1>UW g75.0<8,8,1>UW g33.0<8,8,1>UW {align1}; avg.sat (8) g76.0<1>UW g76.0<8,8,1>UW g34.0<8,8,1>UW {align1}; avg.sat (8) g77.0<1>UW g77.0<8,8,1>UW g35.0<8,8,1>UW {align1}; avg.sat (8) g78.0<1>UW g78.0<8,8,1>UW g36.0<8,8,1>UW {align1}; avg.sat (8) g79.0<1>UW g79.0<8,8,1>UW g37.0<8,8,1>UW {align1}; avg.sat (8) g80.0<1>UW g80.0<8,8,1>UW g38.0<8,8,1>UW {align1}; avg.sat (8) g81.0<1>UW g81.0<8,8,1>UW g39.0<8,8,1>UW {align1}; /*field 1 backward prediction of UV*/ asr (2) g82.28<1>W g82.28<2,2,1>W 1W {align1}; asr (2) g31.14<1>W g82.28<2,2,1>W 1W {align1}; shl (1) g31.16<1>W g31.16<1,1,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.2<1,1,1>UW 0x8000UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g82.28') define(`mv2',`g82.30') include(`motion_field_uv.g4i') avg.sat (8) g74.16<1>UW g74.16<8,8,1>UW g32.0<8,8,1>UW {align1}; avg.sat (8) g75.16<1>UW g75.16<8,8,1>UW g33.0<8,8,1>UW {align1}; avg.sat (8) g76.16<1>UW g76.16<8,8,1>UW g34.0<8,8,1>UW {align1}; avg.sat (8) g77.16<1>UW g77.16<8,8,1>UW g35.0<8,8,1>UW {align1}; avg.sat (8) g78.16<1>UW g78.16<8,8,1>UW g36.0<8,8,1>UW {align1}; avg.sat (8) g79.16<1>UW g79.16<8,8,1>UW g37.0<8,8,1>UW {align1}; avg.sat (8) g80.16<1>UW g80.16<8,8,1>UW g38.0<8,8,1>UW {align1}; avg.sat (8) g81.16<1>UW g81.16<8,8,1>UW g39.0<8,8,1>UW {align1}; include(`addidct.g4i') send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/vld/idct.g4i0000664000175000017500000001555412400044327016275 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix in UB format g3~g4:non intra IQ matrix in UB format g5~g20:IDCT table g56~g79:DCT data after IQ before idct g83~g106: IDCT data after idct g82: thread payload backup g125: ip before idct */ IDCT_START: mov (1) g126.0<1>UD ip {align1}; jmpi DO_IDCT; add (16) g32<1>D g32<8,8,1>D ROW_ADD {compr}; add (16) g34<1>D g34<8,8,1>D ROW_ADD {compr}; add (16) g36<1>D g36<8,8,1>D ROW_ADD {compr}; add (16) g38<1>D g38<8,8,1>D ROW_ADD {compr}; shr (16) g32<1>D g32<8,8,1>D ROW_SHIFT {compr}; shr (16) g34<1>D g34<8,8,1>D ROW_SHIFT {compr}; shr (16) g36<1>D g36<8,8,1>D ROW_SHIFT {compr}; shr (16) g38<1>D g38<8,8,1>D ROW_SHIFT {compr}; mov (16) g110.0<1>W g32<16,8,2>W {align1}; mov (16) g111.0<1>W g34<16,8,2>W {align1}; mov (16) g112.0<1>W g36<16,8,2>W {align1}; mov (16) g113.0<1>W g38<16,8,2>W {align1}; mov (1) g80.0<1>UD a0.0<1,1,1>UD {align1}; //save a0 mov (1) a0.0<1>UD 0x0DB00DA0UD {align1}; //begin at g110.0, the output of idct_row.g4i mov (1) g126.0<1>UD ip {align1}; jmpi DO_IDCT; add (16) g32<1>D g32<8,8,1>D COL_ADD {compr}; add (16) g34<1>D g34<8,8,1>D COL_ADD {compr}; add (16) g36<1>D g36<8,8,1>D COL_ADD {compr}; add (16) g38<1>D g38<8,8,1>D COL_ADD {compr}; shr (16) g32<1>D g32<8,8,1>D COL_SHIFT {compr}; shr (16) g34<1>D g34<8,8,1>D COL_SHIFT {compr}; shr (16) g36<1>D g36<8,8,1>D COL_SHIFT {compr}; shr (16) g38<1>D g38<8,8,1>D COL_SHIFT {compr}; mov (1) a0.0<1>UD g80.0<1,1,1>UD {align1}; //restore a0 add (1) ip g125.0<1,1,1>UD 0x20UD {align1}; //jump back DO_IDCT: add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; //increase the address dp4 (16) g40<1>D g[a0.0]<8,8,1>W g5<8,8,1>D {align1 compr}; dp4 (16) g42<1>D g[a0.0]<8,8,1>W g7<8,8,1>D {align1 compr}; dp4 (16) g44<1>D g[a0.0]<8,8,1>W g9<8,8,1>D {align1 compr}; dp4 (16) g46<1>D g[a0.0]<8,8,1>W g11<8,8,1>D {align1 compr}; dp4 (16) g48<1>D g[a0.0]<8,8,1>W g13<8,8,1>D {align1 compr}; dp4 (16) g50<1>D g[a0.0]<8,8,1>W g15<8,8,1>D {align1 compr}; dp4 (16) g52<1>D g[a0.0]<8,8,1>W g17<8,8,1>D {align1 compr}; dp4 (16) g54<1>D g[a0.0]<8,8,1>W g19<8,8,1>D {align1 compr}; add (2) g32.0<1>D g40.0<8,1,8>D g40.16<8,1,8>D {align1}; add (2) g33.0<1>D g42.0<8,1,8>D g42.16<8,1,8>D {align1}; add (2) g34.0<1>D g44.0<8,1,8>D g44.16<8,1,8>D {align1}; add (2) g35.0<1>D g46.0<8,1,8>D g46.16<8,1,8>D {align1}; add (2) g36.0<1>D g48.0<8,1,8>D g48.16<8,1,8>D {align1}; add (2) g37.0<1>D g50.0<8,1,8>D g50.16<8,1,8>D {align1}; add (2) g38.0<1>D g52.0<8,1,8>D g52.16<8,1,8>D {align1}; add (2) g39.0<1>D g54.0<8,1,8>D g54.16<8,1,8>D {align1}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; dp4 (16) g40<1>D g[a0.0]<8,8,1>W g5<8,8,1>D {align1 compr}; dp4 (16) g42<1>D g[a0.0]<8,8,1>W g7<8,8,1>D {align1 compr}; dp4 (16) g44<1>D g[a0.0]<8,8,1>W g9<8,8,1>D {align1 compr}; dp4 (16) g46<1>D g[a0.0]<8,8,1>W g11<8,8,1>D {align1 compr}; dp4 (16) g48<1>D g[a0.0]<8,8,1>W g13<8,8,1>D {align1 compr}; dp4 (16) g50<1>D g[a0.0]<8,8,1>W g15<8,8,1>D {align1 compr}; dp4 (16) g52<1>D g[a0.0]<8,8,1>W g17<8,8,1>D {align1 compr}; dp4 (16) g54<1>D g[a0.0]<8,8,1>W g19<8,8,1>D {align1 compr}; add (2) g32.8<1>D g40.0<8,1,8>D g40.16<8,1,8>D {align1}; add (2) g33.8<1>D g42.0<8,1,8>D g42.16<8,1,8>D {align1}; add (2) g34.8<1>D g44.0<8,1,8>D g44.16<8,1,8>D {align1}; add (2) g35.8<1>D g46.0<8,1,8>D g46.16<8,1,8>D {align1}; add (2) g36.8<1>D g48.0<8,1,8>D g48.16<8,1,8>D {align1}; add (2) g37.8<1>D g50.0<8,1,8>D g50.16<8,1,8>D {align1}; add (2) g38.8<1>D g52.0<8,1,8>D g52.16<8,1,8>D {align1}; add (2) g39.8<1>D g54.0<8,1,8>D g54.16<8,1,8>D {align1}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; dp4 (16) g40<1>D g[a0.0]<8,8,1>W g5<8,8,1>D {align1 compr}; dp4 (16) g42<1>D g[a0.0]<8,8,1>W g7<8,8,1>D {align1 compr}; dp4 (16) g44<1>D g[a0.0]<8,8,1>W g9<8,8,1>D {align1 compr}; dp4 (16) g46<1>D g[a0.0]<8,8,1>W g11<8,8,1>D {align1 compr}; dp4 (16) g48<1>D g[a0.0]<8,8,1>W g13<8,8,1>D {align1 compr}; dp4 (16) g50<1>D g[a0.0]<8,8,1>W g15<8,8,1>D {align1 compr}; dp4 (16) g52<1>D g[a0.0]<8,8,1>W g17<8,8,1>D {align1 compr}; dp4 (16) g54<1>D g[a0.0]<8,8,1>W g19<8,8,1>D {align1 compr}; add (2) g32.16<1>D g40.0<8,1,8>D g40.16<8,1,8>D {align1}; add (2) g33.16<1>D g42.0<8,1,8>D g42.16<8,1,8>D {align1}; add (2) g34.16<1>D g44.0<8,1,8>D g44.16<8,1,8>D {align1}; add (2) g35.16<1>D g46.0<8,1,8>D g46.16<8,1,8>D {align1}; add (2) g36.16<1>D g48.0<8,1,8>D g48.16<8,1,8>D {align1}; add (2) g37.16<1>D g50.0<8,1,8>D g50.16<8,1,8>D {align1}; add (2) g38.16<1>D g52.0<8,1,8>D g52.16<8,1,8>D {align1}; add (2) g39.16<1>D g54.0<8,1,8>D g54.16<8,1,8>D {align1}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; dp4 (16) g40<1>D g[a0.0]<8,8,1>W g5<8,8,1>D {align1 compr}; dp4 (16) g42<1>D g[a0.0]<8,8,1>W g7<8,8,1>D {align1 compr}; dp4 (16) g44<1>D g[a0.0]<8,8,1>W g9<8,8,1>D {align1 compr}; dp4 (16) g46<1>D g[a0.0]<8,8,1>W g11<8,8,1>D {align1 compr}; dp4 (16) g48<1>D g[a0.0]<8,8,1>W g13<8,8,1>D {align1 compr}; dp4 (16) g50<1>D g[a0.0]<8,8,1>W g15<8,8,1>D {align1 compr}; dp4 (16) g52<1>D g[a0.0]<8,8,1>W g17<8,8,1>D {align1 compr}; dp4 (16) g54<1>D g[a0.0]<8,8,1>W g19<8,8,1>D {align1 compr}; add (2) g32.24<1>D g40.0<8,1,8>D g40.16<8,1,8>D {align1}; add (2) g33.24<1>D g42.0<8,1,8>D g42.16<8,1,8>D {align1}; add (2) g34.24<1>D g44.0<8,1,8>D g44.16<8,1,8>D {align1}; add (2) g35.24<1>D g46.0<8,1,8>D g46.16<8,1,8>D {align1}; add (2) g36.24<1>D g48.0<8,1,8>D g48.16<8,1,8>D {align1}; add (2) g37.24<1>D g50.0<8,1,8>D g50.16<8,1,8>D {align1}; add (2) g38.24<1>D g52.0<8,1,8>D g52.16<8,1,8>D {align1}; add (2) g39.24<1>D g54.0<8,1,8>D g54.16<8,1,8>D {align1}; add (1) ip g126.0<1,1,1>UD 0x20UD {align1}; //jump back xf86-video-intel-2.99.917/xvmc/shader/vld/read_field_x0y1_y.g4i0000664000175000017500000000566312400044327020641 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x01FUD {align1}; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g42.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g46.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; mov (1) g115.8<1>UD 0x07001FUD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; mov (1) g115.8<1>UD 0x1FUD {align1}; send (16) 0 g56.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; avg.sat (16) g32.0<1>UW g40.0<16,16,1>UB g42.0<16,16,1>UB {align1}; avg.sat (16) g33.0<1>UW g42.0<16,16,1>UB g44.0<16,16,1>UB {align1}; avg.sat (16) g34.0<1>UW g44.0<16,16,1>UB g46.0<16,16,1>UB {align1}; avg.sat (16) g35.0<1>UW g46.0<16,16,1>UB g48.0<16,16,1>UB {align1}; avg.sat (16) g36.0<1>UW g48.0<16,16,1>UB g50.0<16,16,1>UB {align1}; avg.sat (16) g37.0<1>UW g50.0<16,16,1>UB g52.0<16,16,1>UB {align1}; avg.sat (16) g38.0<1>UW g52.0<16,16,1>UB g54.0<16,16,1>UB {align1}; avg.sat (16) g39.0<1>UW g54.0<16,16,1>UB g56.0<16,16,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/motion_frame_y.g4i0000664000175000017500000000341412400044327020351 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai */ /* if (motion_vect.x & 1) { * if (motion_vect.y & 1) * half_pixel in x and y; * else * half_pixel in x; * } else { * if (motion_vect.y & 1) * half_pixel y; * else * full_pixel_read; * } */ and.z (1) null mv1<1,1,1>UW 1UD {align1}; (f0) jmpi LL1; and.z (1) null mv2<1,1,1>UW 1UD {align1}; (f0) jmpi LL2; include(`read_frame_x1y1_y.g4i') jmpi LL5; LL2: include(`read_frame_x1y0_y.g4i') jmpi LL5; LL1: and.z (1) null mv2<1,1,1>UW 1UD {align1}; (f0) jmpi LL4; include(`read_frame_x0y1_y.g4i') jmpi LL5; LL4: include(`read_frame_x0y0_y.g4i') LL5: xf86-video-intel-2.99.917/xvmc/shader/vld/do_iq_non_intra.g4i0000664000175000017500000000527712400044327020515 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g112~g115: intra IQ matrix in UW format (in order to use instruction compress), copys from g1~g2 g[a0.0]:DCT data of a block g125: ip before jump F''[v][u]=(((QF[v][u]*2)+Sign(QF[v][u])) * W[w][v][u] * quantiser_scale)/32; */ DO_IQ_NON_INTRA: add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; mul (16) g116.0<1>D g[a0.0]<8,8,1>W g112.0<8,8,1>UW {align1 compr}; mul (16) g116.0<1>D g116.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; asr (16) g116.0<1>D g116.0<8,8,1>D 4UW {align1 compr}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; mul (16) g118.0<1>D g[a0.0]<8,8,1>W g113.0<8,8,1>UW {align1 compr}; mul (16) g118.0<1>D g118.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; asr (16) g118.0<1>D g118.0<8,8,1>D 4UW {align1 compr}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; mul (16) g120.0<1>D g[a0.0]<8,8,1>W g114.0<8,8,1>UW {align1 compr}; mul (16) g120.0<1>D g120.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; asr (16) g120.0<1>D g120.0<8,8,1>D 4UW {align1 compr}; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x00200020UD {align1}; mul (16) g122.0<1>D g[a0.0]<8,8,1>W g115.0<8,8,1>UW {align1 compr}; mul (16) g122.0<1>D g122.0<8,8,1>D g109.0<8,8,0>UW {align1 compr}; asr (16) g122.0<1>D g122.0<8,8,1>D 4UW {align1 compr}; add (1) ip g125.0<1,1,1>UD 0x20UD {align1}; //jump back xf86-video-intel-2.99.917/xvmc/shader/vld/read_frame_x0y0_y.g4i0000664000175000017500000000512212400044327020635 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (1) g32.8<1>UD 0x007001FUD {align1}; send (16) 0 g38.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; mov (16) g58.0<1>UW g38.0<16,16,1>UB {align1}; mov (16) g59.0<1>UW g39.0<16,16,1>UB {align1}; mov (16) g60.0<1>UW g40.0<16,16,1>UB {align1}; mov (16) g61.0<1>UW g41.0<16,16,1>UB {align1}; mov (16) g62.0<1>UW g42.0<16,16,1>UB {align1}; mov (16) g63.0<1>UW g43.0<16,16,1>UB {align1}; mov (16) g64.0<1>UW g44.0<16,16,1>UB {align1}; mov (16) g65.0<1>UW g45.0<16,16,1>UB {align1}; mov (16) g66.0<1>UW g46.0<16,16,1>UB {align1}; mov (16) g67.0<1>UW g47.0<16,16,1>UB {align1}; mov (16) g68.0<1>UW g48.0<16,16,1>UB {align1}; mov (16) g69.0<1>UW g49.0<16,16,1>UB {align1}; mov (16) g70.0<1>UW g50.0<16,16,1>UB {align1}; mov (16) g71.0<1>UW g51.0<16,16,1>UB {align1}; mov (16) g72.0<1>UW g52.0<16,16,1>UB {align1}; mov (16) g73.0<1>UW g53.0<16,16,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/lib.g4b0000664000175000017500000004076512400044327016113 00000000000000 { 0x00000005, 0x2da02d29, 0x00210a48, 0x001f001f }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000012 }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00090009 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00110011 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x05000010, 0x20002d3c, 0x00210da0, 0x00190019 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xffe7ffe7 }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00030003 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x00400040 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000009 }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xfff7fff7 }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00010001 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x000a000a }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000005 }, { 0x00000040, 0x2da03d29, 0x00210da0, 0xffefffef }, { 0x00000009, 0x2da02d29, 0x00210da0, 0x00020002 }, { 0x00000040, 0x2da02d29, 0x00210da0, 0x001c001c }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000001 }, { 0x00000009, 0x2da00d29, 0x00210da0, 0x00000001 }, { 0x00000001, 0x2dc00129, 0x00210da0, 0x00000000 }, { 0x00800001, 0x2e000229, 0x00b10060, 0x00000000 }, { 0x00800001, 0x2e200229, 0x00b10070, 0x00000000 }, { 0x00800001, 0x2e400229, 0x00b10080, 0x00000000 }, { 0x00800001, 0x2e600229, 0x00b10090, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x03f003e0 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x08000800 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000a1 }, { 0x00800001, 0x270001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x272001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x274001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x276001ad, 0x00ae0f40, 0x00000000 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x04000400 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000099 }, { 0x00800001, 0x278001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x27a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x27c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x27e001ad, 0x00ae0f40, 0x00000000 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x02000200 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000091 }, { 0x00800001, 0x280001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x282001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x284001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x286001ad, 0x00ae0f40, 0x00000000 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x01000100 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000089 }, { 0x00800001, 0x288001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x28a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x28c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x28e001ad, 0x00ae0f40, 0x00000000 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x00800080 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000081 }, { 0x00800001, 0x290001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x292001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x294001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x296001ad, 0x00ae0f40, 0x00000000 }, { 0x01000005, 0x20002d3c, 0x00210a48, 0x00400040 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000079 }, { 0x00800001, 0x298001ad, 0x00ae0e80, 0x00000000 }, { 0x00800001, 0x29a001ad, 0x00ae0ec0, 0x00000000 }, { 0x00800001, 0x29c001ad, 0x00ae0f00, 0x00000000 }, { 0x00800001, 0x29e001ad, 0x00ae0f40, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x06f006e0 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x08000800 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00600001, 0x2a600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2a800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2aa00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ac00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ae00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b400169, 0x00000000, 0x00000000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000077 }, { 0x00600001, 0x2a6001ad, 0x00ae0400, 0x00000000 }, { 0x00600001, 0x2a8001ad, 0x00ae0420, 0x00000000 }, { 0x00600001, 0x2aa001ad, 0x00ae0440, 0x00000000 }, { 0x00600001, 0x2ac001ad, 0x00ae0460, 0x00000000 }, { 0x00600001, 0x2ae001ad, 0x00ae0480, 0x00000000 }, { 0x00600001, 0x2b0001ad, 0x00ae04a0, 0x00000000 }, { 0x00600001, 0x2b2001ad, 0x00ae04c0, 0x00000000 }, { 0x00600001, 0x2b4001ad, 0x00ae04e0, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x04000400 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00600001, 0x2a700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2a900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ab00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ad00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2af00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b500169, 0x00000000, 0x00000000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000061 }, { 0x00600001, 0x2a7001ad, 0x00ae0400, 0x00000000 }, { 0x00600001, 0x2a9001ad, 0x00ae0420, 0x00000000 }, { 0x00600001, 0x2ab001ad, 0x00ae0440, 0x00000000 }, { 0x00600001, 0x2ad001ad, 0x00ae0460, 0x00000000 }, { 0x00600001, 0x2af001ad, 0x00ae0480, 0x00000000 }, { 0x00600001, 0x2b1001ad, 0x00ae04a0, 0x00000000 }, { 0x00600001, 0x2b3001ad, 0x00ae04c0, 0x00000000 }, { 0x00600001, 0x2b5001ad, 0x00ae04e0, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x02000200 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00600001, 0x2b600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ba00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bc00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2be00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c400169, 0x00000000, 0x00000000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004b }, { 0x00600001, 0x2b6001ad, 0x00ae0400, 0x00000000 }, { 0x00600001, 0x2b8001ad, 0x00ae0420, 0x00000000 }, { 0x00600001, 0x2ba001ad, 0x00ae0440, 0x00000000 }, { 0x00600001, 0x2bc001ad, 0x00ae0460, 0x00000000 }, { 0x00600001, 0x2be001ad, 0x00ae0480, 0x00000000 }, { 0x00600001, 0x2c0001ad, 0x00ae04a0, 0x00000000 }, { 0x00600001, 0x2c2001ad, 0x00ae04c0, 0x00000000 }, { 0x00600001, 0x2c4001ad, 0x00ae04e0, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x01000100 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00600001, 0x2b700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bb00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bd00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bf00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c500169, 0x00000000, 0x00000000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00600001, 0x2b7001ad, 0x00ae0400, 0x00000000 }, { 0x00600001, 0x2b9001ad, 0x00ae0420, 0x00000000 }, { 0x00600001, 0x2bb001ad, 0x00ae0440, 0x00000000 }, { 0x00600001, 0x2bd001ad, 0x00ae0460, 0x00000000 }, { 0x00600001, 0x2bf001ad, 0x00ae0480, 0x00000000 }, { 0x00600001, 0x2c1001ad, 0x00ae04a0, 0x00000000 }, { 0x00600001, 0x2c3001ad, 0x00ae04c0, 0x00000000 }, { 0x00600001, 0x2c5001ad, 0x00ae04e0, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x00800080 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800001, 0x2c600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2c800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2ca00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2cc00169, 0x00000000, 0x00000000 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00800080 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000023 }, { 0x00800001, 0x2c6001ad, 0x00ae0400, 0x00000000 }, { 0x00800001, 0x2c8001ad, 0x00ae0440, 0x00000000 }, { 0x00800001, 0x2ca001ad, 0x00ae0480, 0x00000000 }, { 0x00800001, 0x2cc001ad, 0x00ae04c0, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a48, 0x00400040 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000005 }, { 0x00800001, 0x2ce00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d400169, 0x00000000, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00000001, 0x2fa00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00800001, 0x2ce001ad, 0x00ae0400, 0x00000000 }, { 0x00800001, 0x2d0001ad, 0x00ae0440, 0x00000000 }, { 0x00800001, 0x2d2001ad, 0x00ae0480, 0x00000000 }, { 0x00800001, 0x2d4001ad, 0x00ae04c0, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2e8025a5, 0x008d8000, 0x008d0e00 }, { 0x00802041, 0x2e8024a5, 0x008d0e80, 0x008c0da0 }, { 0x0080200c, 0x2e802ca5, 0x008d0e80, 0x00040004 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2ec025a5, 0x008d8000, 0x008d0e20 }, { 0x00802041, 0x2ec024a5, 0x008d0ec0, 0x008c0da0 }, { 0x0080200c, 0x2ec02ca5, 0x008d0ec0, 0x00040004 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2f0025a5, 0x008d8000, 0x008d0e40 }, { 0x00802041, 0x2f0024a5, 0x008d0f00, 0x008c0da0 }, { 0x0080200c, 0x2f002ca5, 0x008d0f00, 0x00040004 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802041, 0x2f4025a5, 0x008d8000, 0x008d0e60 }, { 0x00802041, 0x2f4024a5, 0x008d0f40, 0x008c0da0 }, { 0x0080200c, 0x2f402ca5, 0x008d0f40, 0x00040004 }, { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00802040, 0x24000ca5, 0x008d0400, 0x00000400 }, { 0x00802040, 0x24400ca5, 0x008d0440, 0x00000400 }, { 0x00802040, 0x24800ca5, 0x008d0480, 0x00000400 }, { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00000400 }, { 0x00802008, 0x24000ca5, 0x008d0400, 0x0000000b }, { 0x00802008, 0x24400ca5, 0x008d0440, 0x0000000b }, { 0x00802008, 0x24800ca5, 0x008d0480, 0x0000000b }, { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x0000000b }, { 0x00800001, 0x2dc001ad, 0x00ae0400, 0x00000000 }, { 0x00800001, 0x2de001ad, 0x00ae0440, 0x00000000 }, { 0x00800001, 0x2e0001ad, 0x00ae0480, 0x00000000 }, { 0x00800001, 0x2e2001ad, 0x00ae04c0, 0x00000000 }, { 0x00000001, 0x2a000001, 0x00210200, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x0db00da0 }, { 0x00000001, 0x2fc00001, 0x00001400, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000a }, { 0x00802040, 0x24000ca5, 0x008d0400, 0x00080000 }, { 0x00802040, 0x24400ca5, 0x008d0440, 0x00080000 }, { 0x00802040, 0x24800ca5, 0x008d0480, 0x00080000 }, { 0x00802040, 0x24c00ca5, 0x008d04c0, 0x00080000 }, { 0x00802008, 0x24000ca5, 0x008d0400, 0x00000014 }, { 0x00802008, 0x24400ca5, 0x008d0440, 0x00000014 }, { 0x00802008, 0x24800ca5, 0x008d0480, 0x00000014 }, { 0x00802008, 0x24c00ca5, 0x008d04c0, 0x00000014 }, { 0x00000001, 0x22000020, 0x00210a00, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fa0, 0x00000020 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x240014a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x242014a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x244014a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x246014a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x248014a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24a014a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24c014a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24e014a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x240814a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x242814a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x244814a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x246814a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x248814a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24a814a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24c814a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24e814a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x241014a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x243014a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x245014a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x247014a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x249014a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24b014a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24d014a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24f014a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00200020 }, { 0x00802054, 0x250015a5, 0x008d8000, 0x008d00a0 }, { 0x00802054, 0x254015a5, 0x008d8000, 0x008d00e0 }, { 0x00802054, 0x258015a5, 0x008d8000, 0x008d0120 }, { 0x00802054, 0x25c015a5, 0x008d8000, 0x008d0160 }, { 0x00802054, 0x260015a5, 0x008d8000, 0x008d01a0 }, { 0x00802054, 0x264015a5, 0x008d8000, 0x008d01e0 }, { 0x00802054, 0x268015a5, 0x008d8000, 0x008d0220 }, { 0x00802054, 0x26c015a5, 0x008d8000, 0x008d0260 }, { 0x00200040, 0x241814a5, 0x00800500, 0x00800510 }, { 0x00200040, 0x243814a5, 0x00800540, 0x00800550 }, { 0x00200040, 0x245814a5, 0x00800580, 0x00800590 }, { 0x00200040, 0x247814a5, 0x008005c0, 0x008005d0 }, { 0x00200040, 0x249814a5, 0x00800600, 0x00800610 }, { 0x00200040, 0x24b814a5, 0x00800640, 0x00800650 }, { 0x00200040, 0x24d814a5, 0x00800680, 0x00800690 }, { 0x00200040, 0x24f814a5, 0x008006c0, 0x008006d0 }, { 0x00000040, 0x34000c20, 0x00210fc0, 0x00000020 }, xf86-video-intel-2.99.917/xvmc/shader/vld/field_f_b.g4b.gen50000664000175000017500000015413112400044327020064 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a58, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x2a503dad, 0x00450a50, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a50, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a006 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x2a583dad, 0x00450a58, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a58, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a006 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a54, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x80800042, 0x27402529, 0x00b10740, 0x00b10400 }, { 0x80800042, 0x27802529, 0x00b10780, 0x00b10420 }, { 0x80800042, 0x27c02529, 0x00b107c0, 0x00b10440 }, { 0x80800042, 0x28002529, 0x00b10800, 0x00b10460 }, { 0x80800042, 0x28402529, 0x00b10840, 0x00b10480 }, { 0x80800042, 0x28802529, 0x00b10880, 0x00b104a0 }, { 0x80800042, 0x28c02529, 0x00b108c0, 0x00b104c0 }, { 0x80800042, 0x29002529, 0x00b10900, 0x00b104e0 }, { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a5c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x80800042, 0x27602529, 0x00b10760, 0x00b10400 }, { 0x80800042, 0x27a02529, 0x00b107a0, 0x00b10420 }, { 0x80800042, 0x27e02529, 0x00b107e0, 0x00b10440 }, { 0x80800042, 0x28202529, 0x00b10820, 0x00b10460 }, { 0x80800042, 0x28602529, 0x00b10860, 0x00b10480 }, { 0x80800042, 0x28a02529, 0x00b108a0, 0x00b104a0 }, { 0x80800042, 0x28e02529, 0x00b108e0, 0x00b104c0 }, { 0x80800042, 0x29202529, 0x00b10920, 0x00b104e0 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x2a543dad, 0x00450a54, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x20002000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a54, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, { 0x01000005, 0x20003dbc, 0x00210a56, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a009 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x80600042, 0x29402529, 0x008d0940, 0x008d0400 }, { 0x80600042, 0x29602529, 0x008d0960, 0x008d0420 }, { 0x80600042, 0x29802529, 0x008d0980, 0x008d0440 }, { 0x80600042, 0x29a02529, 0x008d09a0, 0x008d0460 }, { 0x80600042, 0x29c02529, 0x008d09c0, 0x008d0480 }, { 0x80600042, 0x29e02529, 0x008d09e0, 0x008d04a0 }, { 0x80600042, 0x2a002529, 0x008d0a00, 0x008d04c0 }, { 0x80600042, 0x2a202529, 0x008d0a20, 0x008d04e0 }, { 0x0020000c, 0x2a5c3dad, 0x00450a5c, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a5c, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x80008000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a5c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, { 0x01000005, 0x20003dbc, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a009 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x80600042, 0x29502529, 0x008d0950, 0x008d0400 }, { 0x80600042, 0x29702529, 0x008d0970, 0x008d0420 }, { 0x80600042, 0x29902529, 0x008d0990, 0x008d0440 }, { 0x80600042, 0x29b02529, 0x008d09b0, 0x008d0460 }, { 0x80600042, 0x29d02529, 0x008d09d0, 0x008d0480 }, { 0x80600042, 0x29f02529, 0x008d09f0, 0x008d04a0 }, { 0x80600042, 0x2a102529, 0x008d0a10, 0x008d04c0 }, { 0x80600042, 0x2a302529, 0x008d0a30, 0x008d04e0 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/read_field_x1y1_uv.g4i0000664000175000017500000000474512400044327021024 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x07000FUD {align1}; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g45.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V mov (1) g115.8<1>UD 0x01000FUD {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1};//U send (16) 0 g49.0<1>UW g115<8,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1};//V //U add (16) g32.0<1>UW g40.0<16,8,1>UB g41.0<16,8,1>UB {align1}; add (16) g33.0<1>UW g41.0<16,8,1>UB g42.0<16,8,1>UB {align1}; add (16) g34.0<1>UW g42.0<16,8,1>UB g43.0<16,8,1>UB {align1}; add (16) g35.0<1>UW g43.0<16,8,1>UB g44.0<16,8,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,8,1>UW g40.1<16,8,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,8,1>UW g41.1<16,8,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,8,1>UW g42.1<16,8,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,8,1>UW g43.1<16,8,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,8,1>UW g41.1<16,8,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,8,1>UW g42.1<16,8,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,8,1>UW g43.1<16,8,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,8,1>UW g44.1<16,8,1>UB {align1}; //V add (16) g36.0<1>UW g45.0<16,8,1>UB g46.0<16,8,1>UB {align1}; add (16) g37.0<1>UW g46.0<16,8,1>UB g47.0<16,8,1>UB {align1}; add (16) g38.0<1>UW g47.0<16,8,1>UB g48.0<16,8,1>UB {align1}; add (16) g39.0<1>UW g48.0<16,8,1>UB g49.0<16,8,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,8,1>UW g45.1<16,8,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,8,1>UW g46.1<16,8,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,8,1>UW g47.1<16,8,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,8,1>UW g48.1<16,8,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,8,1>UW g46.1<16,8,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,8,1>UW g47.1<16,8,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,8,1>UW g48.1<16,8,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,8,1>UW g49.1<16,8,1>UB {align1}; shr (32) g32.0<1>UW g32.0<16,16,1>UW 2UW {align1 compr}; shr (32) g34.0<1>UW g34.0<16,16,1>UW 2UW {align1 compr}; shr (32) g36.0<1>UW g36.0<16,16,1>UW 2UW {align1 compr}; shr (32) g38.0<1>UW g38.0<16,16,1>UW 2UW {align1 compr}; xf86-video-intel-2.99.917/xvmc/shader/vld/read_field_x1y1_y.g4i0000664000175000017500000001045612400044327020636 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x01FUD {align1}; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g42.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g44.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g46.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; mov (1) g115.8<1>UD 0x07001FUD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; mov (1) g115.8<1>UD 0x1FUD {align1}; send (16) 0 g56.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (16) g32.0<1>UW g40.0<16,16,1>UB g42.0<16,16,1>UB {align1}; add (16) g33.0<1>UW g42.0<16,16,1>UB g44.0<16,16,1>UB {align1}; add (16) g34.0<1>UW g44.0<16,16,1>UB g46.0<16,16,1>UB {align1}; add (16) g35.0<1>UW g46.0<16,16,1>UB g48.0<16,16,1>UB {align1}; add (16) g36.0<1>UW g48.0<16,16,1>UB g50.0<16,16,1>UB {align1}; add (16) g37.0<1>UW g50.0<16,16,1>UB g52.0<16,16,1>UB {align1}; add (16) g38.0<1>UW g52.0<16,16,1>UB g54.0<16,16,1>UB {align1}; add (16) g39.0<1>UW g54.0<16,16,1>UB g56.0<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g40.1<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g42.1<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g44.1<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g46.1<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g48.1<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g50.1<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g52.1<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g54.1<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g42.1<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g44.1<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g46.1<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g48.1<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g50.1<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g52.1<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g54.1<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g56.1<16,16,1>UB {align1}; shr (16) g32.0<1>UW g32.0<16,16,1>UW 2UW {align1}; shr (16) g33.0<1>UW g33.0<16,16,1>UW 2UW {align1}; shr (16) g34.0<1>UW g34.0<16,16,1>UW 2UW {align1}; shr (16) g35.0<1>UW g35.0<16,16,1>UW 2UW {align1}; shr (16) g36.0<1>UW g36.0<16,16,1>UW 2UW {align1}; shr (16) g37.0<1>UW g37.0<16,16,1>UW 2UW {align1}; shr (16) g38.0<1>UW g38.0<16,16,1>UW 2UW {align1}; shr (16) g39.0<1>UW g39.0<16,16,1>UW 2UW {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/field_forward.g4b0000664000175000017500000007347512400044327020160 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a58, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000045 }, { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002f }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002c }, { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000017 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000013 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x2a503dad, 0x00450a50, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a50, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a006 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x2a583dad, 0x00450a58, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a58, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001d }, { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000b }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x00ad0e60, 0x0414a006 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/motion_field_y.g4i0000664000175000017500000000320012400044327020333 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ and.z (1) null mv1<1,1,1>W 1UW {align1}; (f0) jmpi L1; and.z (1) null mv2<1,1,1>W 1UW {align1}; (f0) jmpi L2; include(`read_field_x1y1_y.g4i') jmpi L5; L2: include(`read_field_x1y0_y.g4i') jmpi L5; L1: and.z (1) null mv2<1,1,1>W 1UW {align1}; (f0) jmpi L4; include(`read_field_x0y1_y.g4i') jmpi L5; L4: include(`read_field_x0y0_y.g4i') L5: xf86-video-intel-2.99.917/xvmc/shader/vld/read_frame_x0y0_uv.g4i0000664000175000017500000000424512400044327021024 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (1) g32.8<1>UD 0x007000fUD {align1}; send (16) 0 g36.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 4 {align1}; send (16) 0 g40.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 4 {align1}; mov (16) g74.0<1>UW g36.0<16,8,1>UB {align1}; mov (16) g75.0<1>UW g37.0<16,8,1>UB {align1}; mov (16) g76.0<1>UW g38.0<16,8,1>UB {align1}; mov (16) g77.0<1>UW g39.0<16,8,1>UB {align1}; mov (16) g78.0<1>UW g40.0<16,8,1>UB {align1}; mov (16) g79.0<1>UW g41.0<16,8,1>UB {align1}; mov (16) g80.0<1>UW g42.0<16,8,1>UB {align1}; mov (16) g81.0<1>UW g43.0<16,8,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/Makefile.in0000664000175000017500000003703312445556120017016 00000000000000# Makefile.in generated by automake 1.14.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ VPATH = @srcdir@ am__is_gnu_make = test -n '$(MAKEFILE_LIST)' && test -n '$(MAKELEVEL)' am__make_running_with_option = \ case $${target_option-} in \ ?) ;; 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@HAVE_GEN4ASM_TRUE@$(INTEL_G4B): $(INTEL_GEN4ASM) $(INTEL_G4I) @HAVE_GEN4ASM_TRUE@clean-local: @HAVE_GEN4ASM_TRUE@ -rm -f $(INTEL_G4B) @HAVE_GEN4ASM_TRUE@ -rm -f $(INTEL_G4B_GEN5) # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: xf86-video-intel-2.99.917/xvmc/shader/vld/read_frame_x1y1_uv.g4i0000664000175000017500000000740312400044327021025 00000000000000/* */ mov (1) g32.8<1>UD 0x007001FUD {align1}; send (16) 0 g34.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 8 {align1}; //U send (16) 0 g44.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 8 {align1}; //V add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; mov (1) g32.8<1>UD 0x1FUD {align1}; send (16) 0 g42.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 1 {align1}; //U send (16) 0 g52.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 1 {align1}; //V //U add (8) g74.0<1>UW g34.0<8,8,1>UB g34.1<8,8,1>UB {align1}; add (8) g74.16<1>UW g35.0<8,8,1>UB g35.1<8,8,1>UB {align1}; add (8) g75.0<1>UW g36.0<8,8,1>UB g36.1<8,8,1>UB {align1}; add (8) g75.16<1>UW g37.0<8,8,1>UB g37.1<8,8,1>UB {align1}; add (8) g76.0<1>UW g38.0<8,8,1>UB g38.1<8,8,1>UB {align1}; add (8) g76.16<1>UW g39.0<8,8,1>UB g39.1<8,8,1>UB {align1}; add (8) g77.0<1>UW g40.0<8,8,1>UB g40.1<8,8,1>UB {align1}; add (8) g77.16<1>UW g41.0<8,8,1>UB g41.1<8,8,1>UB {align1}; add (8) g74.0<1>UW g74.0<8,8,1>UW g35.0<8,8,1>UB {align1}; add (8) g74.16<1>UW g74.16<8,8,1>UW g36.0<8,8,1>UB {align1}; add (8) g75.0<1>UW g75.0<8,8,1>UW g37.0<8,8,1>UB {align1}; add (8) g75.16<1>UW g75.16<8,8,1>UW g38.0<8,8,1>UB {align1}; add (8) g76.0<1>UW g76.0<8,8,1>UW g39.0<8,8,1>UB {align1}; add (8) g76.16<1>UW g76.16<8,8,1>UW g40.0<8,8,1>UB {align1}; add (8) g77.0<1>UW g77.0<8,8,1>UW g41.0<8,8,1>UB {align1}; add (8) g77.16<1>UW g77.16<8,8,1>UW g42.0<8,8,1>UB {align1}; add (8) g74.0<1>UW g74.0<8,8,1>UW g35.1<8,8,1>UB {align1}; add (8) g74.16<1>UW g74.16<8,8,1>UW g36.1<8,8,1>UB {align1}; add (8) g75.0<1>UW g75.0<8,8,1>UW g37.1<8,8,1>UB {align1}; add (8) g75.16<1>UW g75.16<8,8,1>UW g38.1<8,8,1>UB {align1}; add (8) g76.0<1>UW g76.0<8,8,1>UW g39.1<8,8,1>UB {align1}; add (8) g76.16<1>UW g76.16<8,8,1>UW g40.1<8,8,1>UB {align1}; add (8) g77.0<1>UW g77.0<8,8,1>UW g41.1<8,8,1>UB {align1}; add (8) g77.16<1>UW g77.16<8,8,1>UW g42.1<8,8,1>UB {align1}; //V add (8) g78.0<1>UW g44.0<8,8,1>UB g44.1<8,8,1>UB {align1}; add (8) g78.16<1>UW g45.0<8,8,1>UB g45.1<8,8,1>UB {align1}; add (8) g79.0<1>UW g46.0<8,8,1>UB g46.1<8,8,1>UB {align1}; add (8) g79.16<1>UW g47.0<8,8,1>UB g47.1<8,8,1>UB {align1}; add (8) g80.0<1>UW g48.0<8,8,1>UB g48.1<8,8,1>UB {align1}; add (8) g80.16<1>UW g49.0<8,8,1>UB g49.1<8,8,1>UB {align1}; add (8) g81.0<1>UW g50.0<8,8,1>UB g50.1<8,8,1>UB {align1}; add (8) g81.16<1>UW g51.0<8,8,1>UB g51.1<8,8,1>UB {align1}; add (8) g78.0<1>UW g78.0<8,8,1>UW g45.0<8,8,1>UB {align1}; add (8) g78.16<1>UW g78.16<8,8,1>UW g46.0<8,8,1>UB {align1}; add (8) g79.0<1>UW g79.0<8,8,1>UW g47.0<8,8,1>UB {align1}; add (8) g79.16<1>UW g79.16<8,8,1>UW g48.0<8,8,1>UB {align1}; add (8) g80.0<1>UW g80.0<8,8,1>UW g49.0<8,8,1>UB {align1}; add (8) g80.16<1>UW g80.16<8,8,1>UW g50.0<8,8,1>UB {align1}; add (8) g81.0<1>UW g81.0<8,8,1>UW g51.0<8,8,1>UB {align1}; add (8) g81.16<1>UW g81.16<8,8,1>UW g52.0<8,8,1>UB {align1}; add (8) g78.0<1>UW g78.0<8,8,1>UW g45.1<8,8,1>UB {align1}; add (8) g78.16<1>UW g78.16<8,8,1>UW g46.1<8,8,1>UB {align1}; add (8) g79.0<1>UW g79.0<8,8,1>UW g47.1<8,8,1>UB {align1}; add (8) g79.16<1>UW g79.16<8,8,1>UW g48.1<8,8,1>UB {align1}; add (8) g80.0<1>UW g80.0<8,8,1>UW g49.1<8,8,1>UB {align1}; add (8) g80.16<1>UW g80.16<8,8,1>UW g50.1<8,8,1>UB {align1}; add (8) g81.0<1>UW g81.0<8,8,1>UW g51.1<8,8,1>UB {align1}; add (8) g81.16<1>UW g81.16<8,8,1>UW g52.1<8,8,1>UB {align1}; shr (16) g74.0<1>UW g74.0<16,16,1>UW 2UW {align1}; shr (16) g75.0<1>UW g75.0<16,16,1>UW 2UW {align1}; shr (16) g76.0<1>UW g76.0<16,16,1>UW 2UW {align1}; shr (16) g77.0<1>UW g77.0<16,16,1>UW 2UW {align1}; shr (16) g78.0<1>UW g78.0<16,16,1>UW 2UW {align1}; shr (16) g79.0<1>UW g79.0<16,16,1>UW 2UW {align1}; shr (16) g80.0<1>UW g80.0<16,16,1>UW 2UW {align1}; shr (16) g81.0<1>UW g81.0<16,16,1>UW 2UW {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/frame_f_b.g4a0000664000175000017500000001255512400044327017240 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; mov (1) g126.8<1>UD ip {align1}; mov (1) ip g21.0<1,1,1>UD {align1}; //Y, Forward mov (1) g31.8<1>UD 0x0070007UD {align1}; define(`input_surface', `4') define(`mv1', `g82.16') define(`mv2', `g82.18') asr (2) g31.14<1>W g82.16<2,2,1>W 1W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; include(`motion_frame_y.g4i') //Save Forward mov (16) g108.0<1>UD g58.0<16,16,1>UD {align1 compr}; mov (16) g110.0<1>UD g60.0<16,16,1>UD {align1 compr}; mov (16) g112.0<1>UD g62.0<16,16,1>UD {align1 compr}; mov (16) g114.0<1>UD g64.0<16,16,1>UD {align1 compr}; mov (16) g116.0<1>UD g66.0<16,16,1>UD {align1 compr}; mov (16) g118.0<1>UD g68.0<16,16,1>UD {align1 compr}; mov (16) g120.0<1>UD g70.0<16,16,1>UD {align1 compr}; mov (16) g122.0<1>UD g72.0<16,16,1>UD {align1 compr}; //Y, Backward define(`input_surface', `7') define(`mv1', `g82.20') define(`mv2', `g82.22') asr (2) g31.14<1>W g82.20<2,2,1>W 1W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; include(`motion_frame_y.g4i') //Average Forward and Backward avg.sat (16) g58.0<1>UW g58.0<16,16,1>UW g108.0<16,16,1>UW {align1}; avg.sat (16) g59.0<1>UW g59.0<16,16,1>UW g109.0<16,16,1>UW {align1}; avg.sat (16) g60.0<1>UW g60.0<16,16,1>UW g110.0<16,16,1>UW {align1}; avg.sat (16) g61.0<1>UW g61.0<16,16,1>UW g111.0<16,16,1>UW {align1}; avg.sat (16) g62.0<1>UW g62.0<16,16,1>UW g112.0<16,16,1>UW {align1}; avg.sat (16) g63.0<1>UW g63.0<16,16,1>UW g113.0<16,16,1>UW {align1}; avg.sat (16) g64.0<1>UW g64.0<16,16,1>UW g114.0<16,16,1>UW {align1}; avg.sat (16) g65.0<1>UW g65.0<16,16,1>UW g115.0<16,16,1>UW {align1}; avg.sat (16) g66.0<1>UW g66.0<16,16,1>UW g116.0<16,16,1>UW {align1}; avg.sat (16) g67.0<1>UW g67.0<16,16,1>UW g117.0<16,16,1>UW {align1}; avg.sat (16) g68.0<1>UW g68.0<16,16,1>UW g118.0<16,16,1>UW {align1}; avg.sat (16) g69.0<1>UW g69.0<16,16,1>UW g119.0<16,16,1>UW {align1}; avg.sat (16) g70.0<1>UW g70.0<16,16,1>UW g120.0<16,16,1>UW {align1}; avg.sat (16) g71.0<1>UW g71.0<16,16,1>UW g121.0<16,16,1>UW {align1}; avg.sat (16) g72.0<1>UW g72.0<16,16,1>UW g122.0<16,16,1>UW {align1}; avg.sat (16) g73.0<1>UW g73.0<16,16,1>UW g123.0<16,16,1>UW {align1}; //UV, Forward shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g31.14<1>W g82.16<2,2,1>W 2W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; define(`input_surface1', `5') define(`input_surface2', `6') mov (1) g32.8<1>UD 0x007000fUD {align1}; include(`motion_frame_uv.g4i') //Save UV Forward mov (16) g108.0<1>UB g74.0<16,16,2>UB {align1}; mov (16) g108.16<1>UB g75.0<16,16,2>UB {align1}; mov (16) g109.0<1>UB g76.0<16,16,2>UB {align1}; mov (16) g109.16<1>UB g77.0<16,16,2>UB {align1}; mov (16) g110.0<1>UB g78.0<16,16,2>UB {align1}; mov (16) g110.16<1>UB g79.0<16,16,2>UB {align1}; mov (16) g111.0<1>UB g80.0<16,16,2>UB {align1}; mov (16) g111.16<1>UB g81.0<16,16,2>UB {align1}; //UV, Backward asr (2) g31.14<1>W g82.20<2,2,1>W 2W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; define(`input_surface1', `8') define(`input_surface2', `9') include(`motion_frame_uv.g4i') //Average Forward and Backward avg.sat (16) g74.0<1>UW g74.0<16,16,1>UW g108.0<16,16,1>UB {align1}; avg.sat (16) g75.0<1>UW g75.0<16,16,1>UW g108.16<16,16,1>UB {align1}; avg.sat (16) g76.0<1>UW g76.0<16,16,1>UW g109.0<16,16,1>UB {align1}; avg.sat (16) g77.0<1>UW g77.0<16,16,1>UW g109.16<16,16,1>UB {align1}; avg.sat (16) g78.0<1>UW g78.0<16,16,1>UW g110.0<16,16,1>UB {align1}; avg.sat (16) g79.0<1>UW g79.0<16,16,1>UW g110.16<16,16,1>UB {align1}; avg.sat (16) g80.0<1>UW g80.0<16,16,1>UW g111.0<16,16,1>UB {align1}; avg.sat (16) g81.0<1>UW g81.0<16,16,1>UW g111.16<16,16,1>UB {align1}; include(`addidct.g4i') send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/vld/field_forward.g4b.gen50000664000175000017500000007347512400044327021015 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a50, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002dbc, 0x00210a58, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000008a }, { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x00800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x00800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x00800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x80800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x80800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x80800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x80800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x80800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x80800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x80800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x80800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000026 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x25c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x2a503dad, 0x00450a50, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x10001000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a50, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, { 0x01000005, 0x20003dbc, 0x00210a52, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a006 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29a00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29e00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a200129, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x2a583dad, 0x00450a58, 0x00010001 }, { 0x0020000c, 0x23ee3dad, 0x00450a58, 0x00010001 }, { 0x00000009, 0x23f03dad, 0x002103f0, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x40004000 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20003dbc, 0x00210a58, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000048 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00800040, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800040, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800040, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800040, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0501 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0521 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0541 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0561 }, { 0x00800040, 0x24004529, 0x00ad0400, 0x00ad0521 }, { 0x00800040, 0x24204529, 0x00ad0420, 0x00ad0541 }, { 0x00800040, 0x24404529, 0x00ad0440, 0x00ad0561 }, { 0x00800040, 0x24604529, 0x00ad0460, 0x00ad0581 }, { 0x00800040, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800040, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800040, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800040, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05a1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05c1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad05e1 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0601 }, { 0x00800040, 0x24804529, 0x00ad0480, 0x00ad05c1 }, { 0x00800040, 0x24a04529, 0x00ad04a0, 0x00ad05e1 }, { 0x00800040, 0x24c04529, 0x00ad04c0, 0x00ad0601 }, { 0x00800040, 0x24e04529, 0x00ad04e0, 0x00ad0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0501 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0521 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0541 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0561 }, { 0x00800042, 0x24804629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x24a04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x24c04629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x24e04629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000003a }, { 0x01000005, 0x20003dbc, 0x00210a5a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00800042, 0x24004629, 0x00ad0500, 0x00ad0520 }, { 0x00800042, 0x24204629, 0x00ad0520, 0x00ad0540 }, { 0x00800042, 0x24404629, 0x00ad0540, 0x00ad0560 }, { 0x00800042, 0x24604629, 0x00ad0560, 0x00ad0580 }, { 0x00800042, 0x24804629, 0x00ad05a0, 0x00ad05c0 }, { 0x00800042, 0x24a04629, 0x00ad05c0, 0x00ad05e0 }, { 0x00800042, 0x24c04629, 0x00ad05e0, 0x00ad0600 }, { 0x00800042, 0x24e04629, 0x00ad0600, 0x00ad0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x25001d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x40ad0e60, 0x0248a006 }, { 0x00800001, 0x24000229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x24400229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x24600229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x24800229, 0x00ad05a0, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00ad05c0, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00ad05e0, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00ad0600, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0420, 0x00000000 }, { 0x00600001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00600001, 0x29b00129, 0x008d0460, 0x00000000 }, { 0x00600001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00600001, 0x29f00129, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x2a300129, 0x008d04e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/iq_non_intra.g4i0000664000175000017500000001167412400044327020031 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix in UB format g3~g4:non intra IQ matrix in UB format g5~g20:IDCT table g32~g55:DCT data before IQ g56~g79:DCT data after IQ g82: thread payload backup g109: q_scale_code g110: q_scale_code g112~g115: non intra IQ matrix in UW format (in order to use instruction compress), copys from g3~g4 g125: ip before jump */ and (1) g109.0<1>UW g82.8<1,1,1>UW 0x1fUW {align1}; //q_scale_code and.z (1) null g82.8<1,1,1>UW 0x20UW {align1}; //if(q_scale_type==0) q_scale=q_scale_code*2; (f0) jmpi Q_SCALE_TYPE_0; cmp.l (1) null g109.0<1,1,1>UW 9UW {align1}; //if(q_scale_type!=0) calculate q_scale (f0) jmpi DO_IQ; cmp.l (1) null g109.0<1,1,1>UW 17UW {align1}; (f0) jmpi RANG_9_16; cmp.l (1) null g109.0<1,1,1>UW 25UW {align1}; (f0) jmpi RANG_17_24; RANG_25_31: add (1) g109.0<1>UW g109.0<1,1,1>UW -25W {align1}; shl (1) g109.0<1>UW g109.0<1,1,1>UW 3UW {align1}; add (1) g109.0<1>UW g109.0<1,1,1>UW 64UW {align1}; jmpi DO_IQ; RANG_9_16: add (1) g109.0<1>UW g109.0<1,1,1>UW -9W {align1}; shl (1) g109.0<1>UW g109.0<1,1,1>UW 1UW {align1}; add (1) g109.0<1>UW g109.0<1,1,1>UW 10UW {align1}; jmpi DO_IQ; RANG_17_24: add (1) g109.0<1>UW g109.0<1,1,1>UW -17W {align1}; shl (1) g109.0<1>UW g109.0<1,1,1>UW 2UW {align1}; add (1) g109.0<1>UW g109.0<1,1,1>UW 28UW {align1}; jmpi DO_IQ; Q_SCALE_TYPE_0: shl (1) g109.0<1>UW g109.0<1,1,1>UW 1UD {align1}; DO_IQ: mov (1) g110.0<1>UW g109.0<1,1,1>UW {align1}; mov (16) g112.0<1>UW g3.0<16,16,1>UB {align1}; mov (16) g113.0<1>UW g3.16<16,16,1>UB {align1}; mov (16) g114.0<1>UW g4.0<16,16,1>UB {align1}; mov (16) g115.0<1>UW g4.16<16,16,1>UB {align1}; mov (1) a0.0<1>UD 0x03F003E0UD {align1}; //Y0 iq_non_intra_y0: and.z (1) null g82.8<1,1,1>UW 0x800UW {align1}; (f0) jmpi iq_non_intra_y1; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_NON_INTRA; mov (16) g56.0<1>W g116.0<16,8,2>W {align1}; mov (16) g57.0<1>W g118.0<16,8,2>W {align1}; mov (16) g58.0<1>W g120.0<16,8,2>W {align1}; mov (16) g59.0<1>W g122.0<16,8,2>W {align1}; //Y1 iq_non_intra_y1: and.z (1) null g82.8<1,1,1>UW 0x400UW {align1}; (f0) jmpi iq_non_intra_y2; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_NON_INTRA; mov (16) g60.0<1>W g116.0<16,8,2>W {align1}; mov (16) g61.0<1>W g118.0<16,8,2>W {align1}; mov (16) g62.0<1>W g120.0<16,8,2>W {align1}; mov (16) g63.0<1>W g122.0<16,8,2>W {align1}; //Y2 iq_non_intra_y2: and.z (1) null g82.8<1,1,1>UW 0x200UW {align1}; (f0) jmpi iq_non_intra_y3; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_NON_INTRA; mov (16) g64.0<1>W g116.0<16,8,2>W {align1}; mov (16) g65.0<1>W g118.0<16,8,2>W {align1}; mov (16) g66.0<1>W g120.0<16,8,2>W {align1}; mov (16) g67.0<1>W g122.0<16,8,2>W {align1}; //Y3 iq_non_intra_y3: and.z (1) null g82.8<1,1,1>UW 0x100UW {align1}; (f0) jmpi iq_non_intra_u; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_NON_INTRA; mov (16) g68.0<1>W g116.0<16,8,2>W {align1}; mov (16) g69.0<1>W g118.0<16,8,2>W {align1}; mov (16) g70.0<1>W g120.0<16,8,2>W {align1}; mov (16) g71.0<1>W g122.0<16,8,2>W {align1}; //U iq_non_intra_u: and.z (1) null g82.8<1,1,1>UW 0x80UW {align1}; (f0) jmpi iq_non_intra_v; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_NON_INTRA; mov (16) g72.0<1>W g116.0<16,8,2>W {align1}; mov (16) g73.0<1>W g118.0<16,8,2>W {align1}; mov (16) g74.0<1>W g120.0<16,8,2>W {align1}; mov (16) g75.0<1>W g122.0<16,8,2>W {align1}; //V iq_non_intra_v: and.z (1) null g82.8<1,1,1>UW 0x40UW {align1}; (f0) jmpi iq_non_intra_end; mov (1) g125.0<1>UD ip {align1}; jmpi DO_IQ_NON_INTRA; mov (16) g76.0<1>W g116.0<16,8,2>W {align1}; mov (16) g77.0<1>W g118.0<16,8,2>W {align1}; mov (16) g78.0<1>W g120.0<16,8,2>W {align1}; mov (16) g79.0<1>W g122.0<16,8,2>W {align1}; iq_non_intra_end: xf86-video-intel-2.99.917/xvmc/shader/vld/frame_f_b.g4b.gen50000664000175000017500000011040512400044327020067 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000001, 0x34000020, 0x002102a0, 0x00000000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a50, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000be }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000090 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000086 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, { 0x01000005, 0x20000d3c, 0x00210a52, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, { 0x00802001, 0x2d800021, 0x00b10740, 0x00000000 }, { 0x00802001, 0x2dc00021, 0x00b10780, 0x00000000 }, { 0x00802001, 0x2e000021, 0x00b107c0, 0x00000000 }, { 0x00802001, 0x2e400021, 0x00b10800, 0x00000000 }, { 0x00802001, 0x2e800021, 0x00b10840, 0x00000000 }, { 0x00802001, 0x2ec00021, 0x00b10880, 0x00000000 }, { 0x00802001, 0x2f000021, 0x00b108c0, 0x00000000 }, { 0x00802001, 0x2f400021, 0x00b10900, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000be }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000090 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, { 0x80800008, 0x27402d29, 0x00b10740, 0x00020002 }, { 0x80800008, 0x27602d29, 0x00b10760, 0x00020002 }, { 0x80800008, 0x27802d29, 0x00b10780, 0x00020002 }, { 0x80800008, 0x27a02d29, 0x00b107a0, 0x00020002 }, { 0x80800008, 0x27c02d29, 0x00b107c0, 0x00020002 }, { 0x80800008, 0x27e02d29, 0x00b107e0, 0x00020002 }, { 0x80800008, 0x28002d29, 0x00b10800, 0x00020002 }, { 0x80800008, 0x28202d29, 0x00b10820, 0x00020002 }, { 0x80800008, 0x28402d29, 0x00b10840, 0x00020002 }, { 0x80800008, 0x28602d29, 0x00b10860, 0x00020002 }, { 0x80800008, 0x28802d29, 0x00b10880, 0x00020002 }, { 0x80800008, 0x28a02d29, 0x00b108a0, 0x00020002 }, { 0x80800008, 0x28c02d29, 0x00b108c0, 0x00020002 }, { 0x80800008, 0x28e02d29, 0x00b108e0, 0x00020002 }, { 0x80800008, 0x29002d29, 0x00b10900, 0x00020002 }, { 0x80800008, 0x29202d29, 0x00b10920, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000086 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, { 0x80800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, { 0x80800042, 0x27604629, 0x00b104e0, 0x00b10500 }, { 0x80800042, 0x27804629, 0x00b10500, 0x00b10520 }, { 0x80800042, 0x27a04629, 0x00b10520, 0x00b10540 }, { 0x80800042, 0x27c04629, 0x00b10540, 0x00b10560 }, { 0x80800042, 0x27e04629, 0x00b10560, 0x00b10580 }, { 0x80800042, 0x28004629, 0x00b10580, 0x00b105a0 }, { 0x80800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, { 0x80800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, { 0x80800042, 0x28604629, 0x00b105e0, 0x00b10600 }, { 0x80800042, 0x28804629, 0x00b10600, 0x00b10620 }, { 0x80800042, 0x28a04629, 0x00b10620, 0x00b10640 }, { 0x80800042, 0x28c04629, 0x00b10640, 0x00b10660 }, { 0x80800042, 0x28e04629, 0x00b10660, 0x00b10680 }, { 0x80800042, 0x29004629, 0x00b10680, 0x00b106a0 }, { 0x80800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x00800001, 0x27400229, 0x00b104c0, 0x00000000 }, { 0x00800001, 0x27600229, 0x00b104e0, 0x00000000 }, { 0x00800001, 0x27800229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x27a00229, 0x00b10520, 0x00000000 }, { 0x00800001, 0x27c00229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x27e00229, 0x00b10560, 0x00000000 }, { 0x00800001, 0x28000229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x28200229, 0x00b105a0, 0x00000000 }, { 0x00800001, 0x28400229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x28600229, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x28800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x28a00229, 0x00b10620, 0x00000000 }, { 0x00800001, 0x28c00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x28e00229, 0x00b10660, 0x00000000 }, { 0x00800001, 0x29000229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x29200229, 0x00b106a0, 0x00000000 }, { 0x80800042, 0x27402529, 0x00b10740, 0x00b10d80 }, { 0x80800042, 0x27602529, 0x00b10760, 0x00b10da0 }, { 0x80800042, 0x27802529, 0x00b10780, 0x00b10dc0 }, { 0x80800042, 0x27a02529, 0x00b107a0, 0x00b10de0 }, { 0x80800042, 0x27c02529, 0x00b107c0, 0x00b10e00 }, { 0x80800042, 0x27e02529, 0x00b107e0, 0x00b10e20 }, { 0x80800042, 0x28002529, 0x00b10800, 0x00b10e40 }, { 0x80800042, 0x28202529, 0x00b10820, 0x00b10e60 }, { 0x80800042, 0x28402529, 0x00b10840, 0x00b10e80 }, { 0x80800042, 0x28602529, 0x00b10860, 0x00b10ea0 }, { 0x80800042, 0x28802529, 0x00b10880, 0x00b10ec0 }, { 0x80800042, 0x28a02529, 0x00b108a0, 0x00b10ee0 }, { 0x80800042, 0x28c02529, 0x00b108c0, 0x00b10f00 }, { 0x80800042, 0x28e02529, 0x00b108e0, 0x00b10f20 }, { 0x80800042, 0x29002529, 0x00b10900, 0x00b10f40 }, { 0x80800042, 0x29202529, 0x00b10920, 0x00b10f60 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a50, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a005 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a006 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a005 }, { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a006 }, { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a005 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a006 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a005 }, { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a006 }, { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24801d29, 0x408d0400, 0x0248a005 }, { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a006 }, { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, { 0x00800001, 0x2d800231, 0x00b20940, 0x00000000 }, { 0x00800001, 0x2d900231, 0x00b20960, 0x00000000 }, { 0x00800001, 0x2da00231, 0x00b20980, 0x00000000 }, { 0x00800001, 0x2db00231, 0x00b209a0, 0x00000000 }, { 0x00800001, 0x2dc00231, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x2dd00231, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x2de00231, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x2df00231, 0x00b20a20, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a54, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x01000005, 0x20000d3c, 0x00210a54, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000080 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a008 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a009 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a008 }, { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a009 }, { 0x00600040, 0x29404629, 0x008d0440, 0x008d0441 }, { 0x00600040, 0x29504629, 0x008d0460, 0x008d0461 }, { 0x00600040, 0x29604629, 0x008d0480, 0x008d0481 }, { 0x00600040, 0x29704629, 0x008d04a0, 0x008d04a1 }, { 0x00600040, 0x29804629, 0x008d04c0, 0x008d04c1 }, { 0x00600040, 0x29904629, 0x008d04e0, 0x008d04e1 }, { 0x00600040, 0x29a04629, 0x008d0500, 0x008d0501 }, { 0x00600040, 0x29b04629, 0x008d0520, 0x008d0521 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0460 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0480 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a0 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c0 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e0 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0500 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0520 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0540 }, { 0x00600040, 0x29404529, 0x008d0940, 0x008d0461 }, { 0x00600040, 0x29504529, 0x008d0950, 0x008d0481 }, { 0x00600040, 0x29604529, 0x008d0960, 0x008d04a1 }, { 0x00600040, 0x29704529, 0x008d0970, 0x008d04c1 }, { 0x00600040, 0x29804529, 0x008d0980, 0x008d04e1 }, { 0x00600040, 0x29904529, 0x008d0990, 0x008d0501 }, { 0x00600040, 0x29a04529, 0x008d09a0, 0x008d0521 }, { 0x00600040, 0x29b04529, 0x008d09b0, 0x008d0541 }, { 0x00600040, 0x29c04629, 0x008d0580, 0x008d0581 }, { 0x00600040, 0x29d04629, 0x008d05a0, 0x008d05a1 }, { 0x00600040, 0x29e04629, 0x008d05c0, 0x008d05c1 }, { 0x00600040, 0x29f04629, 0x008d05e0, 0x008d05e1 }, { 0x00600040, 0x2a004629, 0x008d0600, 0x008d0601 }, { 0x00600040, 0x2a104629, 0x008d0620, 0x008d0621 }, { 0x00600040, 0x2a204629, 0x008d0640, 0x008d0641 }, { 0x00600040, 0x2a304629, 0x008d0660, 0x008d0661 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a0 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c0 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e0 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0600 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0620 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0640 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0660 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0680 }, { 0x00600040, 0x29c04529, 0x008d09c0, 0x008d05a1 }, { 0x00600040, 0x29d04529, 0x008d09d0, 0x008d05c1 }, { 0x00600040, 0x29e04529, 0x008d09e0, 0x008d05e1 }, { 0x00600040, 0x29f04529, 0x008d09f0, 0x008d0601 }, { 0x00600040, 0x2a004529, 0x008d0a00, 0x008d0621 }, { 0x00600040, 0x2a104529, 0x008d0a10, 0x008d0641 }, { 0x00600040, 0x2a204529, 0x008d0a20, 0x008d0661 }, { 0x00600040, 0x2a304529, 0x008d0a30, 0x008d0681 }, { 0x00800008, 0x29402d29, 0x00b10940, 0x00020002 }, { 0x00800008, 0x29602d29, 0x00b10960, 0x00020002 }, { 0x00800008, 0x29802d29, 0x00b10980, 0x00020002 }, { 0x00800008, 0x29a02d29, 0x00b109a0, 0x00020002 }, { 0x00800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x00800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x00800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x00800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, { 0x00800042, 0x29404629, 0x00ad0440, 0x00ad0441 }, { 0x00800042, 0x29604629, 0x00ad0460, 0x00ad0461 }, { 0x00800042, 0x29804629, 0x00ad0480, 0x00ad0481 }, { 0x00800042, 0x29a04629, 0x00ad04a0, 0x00ad04a1 }, { 0x00800042, 0x29c04629, 0x00ad0580, 0x00ad0581 }, { 0x00800042, 0x29e04629, 0x00ad05a0, 0x00ad05a1 }, { 0x00800042, 0x2a004629, 0x00ad05c0, 0x00ad05c1 }, { 0x00800042, 0x2a204629, 0x00ad05e0, 0x00ad05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x01000005, 0x20000d3c, 0x00210a56, 0x00000002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0288a008 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0288a009 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x25401d29, 0x408d0400, 0x0218a008 }, { 0x00800031, 0x26801d29, 0x408d0400, 0x0218a009 }, { 0x00600042, 0x29404629, 0x008d0440, 0x008d0460 }, { 0x00600042, 0x29504629, 0x008d0460, 0x008d0480 }, { 0x00600042, 0x29604629, 0x008d0480, 0x008d04a0 }, { 0x00600042, 0x29704629, 0x008d04a0, 0x008d04c0 }, { 0x00600042, 0x29804629, 0x008d04c0, 0x008d04e0 }, { 0x00600042, 0x29904629, 0x008d04e0, 0x008d0500 }, { 0x00600042, 0x29a04629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x29b04629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x29c04629, 0x008d0580, 0x008d05a0 }, { 0x00600042, 0x29d04629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x29e04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x29f04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x2a004629, 0x008d0600, 0x008d0620 }, { 0x00600042, 0x2a104629, 0x008d0620, 0x008d0640 }, { 0x00600042, 0x2a204629, 0x008d0640, 0x008d0660 }, { 0x00600042, 0x2a304629, 0x008d0660, 0x008d0680 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000016 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x00800031, 0x24801d29, 0x408d0400, 0x0248a008 }, { 0x00800031, 0x25001d29, 0x408d0400, 0x0248a009 }, { 0x00800001, 0x29400229, 0x00ad0480, 0x00000000 }, { 0x00800001, 0x29600229, 0x00ad04a0, 0x00000000 }, { 0x00800001, 0x29800229, 0x00ad04c0, 0x00000000 }, { 0x00800001, 0x29a00229, 0x00ad04e0, 0x00000000 }, { 0x00800001, 0x29c00229, 0x00ad0500, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0520, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0540, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0560, 0x00000000 }, { 0x80800042, 0x29404529, 0x00b10940, 0x00b10d80 }, { 0x80800042, 0x29604529, 0x00b10960, 0x00b10d90 }, { 0x80800042, 0x29804529, 0x00b10980, 0x00b10da0 }, { 0x80800042, 0x29a04529, 0x00b109a0, 0x00b10db0 }, { 0x80800042, 0x29c04529, 0x00b109c0, 0x00b10dc0 }, { 0x80800042, 0x29e04529, 0x00b109e0, 0x00b10dd0 }, { 0x80800042, 0x2a004529, 0x00b10a00, 0x00b10de0 }, { 0x80800042, 0x2a204529, 0x00b10a20, 0x00b10df0 }, { 0x00200001, 0x23e00121, 0x00450a4c, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a42, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10a80, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10aa0, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10ac0, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10ae0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10b00, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10b20, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10b40, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10b60, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10b80, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10ba0, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10bc0, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10be0, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c00, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10c20, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x274045ad, 0x00b10a60, 0x00b20740 }, { 0x00800040, 0x276045ad, 0x00b10b60, 0x00b20760 }, { 0x00800040, 0x278045ad, 0x00b10a80, 0x00b20780 }, { 0x00800040, 0x27a045ad, 0x00b10b80, 0x00b207a0 }, { 0x00800040, 0x27c045ad, 0x00b10aa0, 0x00b207c0 }, { 0x00800040, 0x27e045ad, 0x00b10ba0, 0x00b207e0 }, { 0x00800040, 0x280045ad, 0x00b10ac0, 0x00b20800 }, { 0x00800040, 0x282045ad, 0x00b10bc0, 0x00b20820 }, { 0x00800040, 0x284045ad, 0x00b10ae0, 0x00b20840 }, { 0x00800040, 0x286045ad, 0x00b10be0, 0x00b20860 }, { 0x00800040, 0x288045ad, 0x00b10b00, 0x00b20880 }, { 0x00800040, 0x28a045ad, 0x00b10c00, 0x00b208a0 }, { 0x00800040, 0x28c045ad, 0x00b10b20, 0x00b208c0 }, { 0x00800040, 0x28e045ad, 0x00b10c20, 0x00b208e0 }, { 0x00800040, 0x290045ad, 0x00b10b40, 0x00b20900 }, { 0x00800040, 0x292045ad, 0x00b10c40, 0x00b20920 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x80800001, 0x474001b1, 0x00b10740, 0x00000000 }, { 0x80800001, 0x476001b1, 0x00b10760, 0x00000000 }, { 0x80800001, 0x478001b1, 0x00b10780, 0x00000000 }, { 0x80800001, 0x47a001b1, 0x00b107a0, 0x00000000 }, { 0x80800001, 0x47c001b1, 0x00b107c0, 0x00000000 }, { 0x80800001, 0x47e001b1, 0x00b107e0, 0x00000000 }, { 0x80800001, 0x480001b1, 0x00b10800, 0x00000000 }, { 0x80800001, 0x482001b1, 0x00b10820, 0x00000000 }, { 0x80800001, 0x484001b1, 0x00b10840, 0x00000000 }, { 0x80800001, 0x486001b1, 0x00b10860, 0x00000000 }, { 0x80800001, 0x488001b1, 0x00b10880, 0x00000000 }, { 0x80800001, 0x48a001b1, 0x00b108a0, 0x00000000 }, { 0x80800001, 0x48c001b1, 0x00b108c0, 0x00000000 }, { 0x80800001, 0x48e001b1, 0x00b108e0, 0x00000000 }, { 0x80800001, 0x490001b1, 0x00b10900, 0x00000000 }, { 0x80800001, 0x492001b1, 0x00b10920, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800040, 0x294025ad, 0x00b10c60, 0x00b10940 }, { 0x00800040, 0x296025ad, 0x00b10c80, 0x00b10960 }, { 0x00800040, 0x298025ad, 0x00b10ca0, 0x00b10980 }, { 0x00800040, 0x29a025ad, 0x00b10cc0, 0x00b109a0 }, { 0x80800001, 0x494001b1, 0x00b10940, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10960, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10980, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b109a0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, { 0x00800040, 0x29c025a9, 0x00b10ce0, 0x00b109c0 }, { 0x00800040, 0x29e025a9, 0x00b10d00, 0x00b109e0 }, { 0x00800040, 0x2a0025a9, 0x00b10d20, 0x00b10a00 }, { 0x00800040, 0x2a2025a9, 0x00b10d40, 0x00b10a20 }, { 0x80800001, 0x49c001b1, 0x00b109c0, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b109e0, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10a00, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10a20, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/vld/read_frame_x0y1_uv.g4i0000664000175000017500000000533412400044327021025 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDINg BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINgEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIgHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAgES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISINg FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINgS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g32.8<1>UD 0x007001FUD {align1}; send (16) 0 g34.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 8 {align1}; //U send (16) 0 g44.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 8 {align1}; //V add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; mov (1) g32.8<1>UD 0x1FUD {align1}; send (16) 0 g42.0<1>UW g32<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 1 {align1}; //U send (16) 0 g52.0<1>UW g32<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 1 {align1}; //V //U avg (8) g74.0<1>UW g34.0<8,8,1>UB g35.0<8,8,1>UB {align1}; avg (8) g74.16<1>UW g35.0<8,8,1>UB g36.0<8,8,1>UB {align1}; avg (8) g75.0<1>UW g36.0<8,8,1>UB g37.0<8,8,1>UB {align1}; avg (8) g75.16<1>UW g37.0<8,8,1>UB g38.0<8,8,1>UB {align1}; avg (8) g76.0<1>UW g38.0<8,8,1>UB g39.0<8,8,1>UB {align1}; avg (8) g76.16<1>UW g39.0<8,8,1>UB g40.0<8,8,1>UB {align1}; avg (8) g77.0<1>UW g40.0<8,8,1>UB g41.0<8,8,1>UB {align1}; avg (8) g77.16<1>UW g41.0<8,8,1>UB g42.0<8,8,1>UB {align1}; //V avg (8) g78.0<1>UW g44.0<8,8,1>UB g45.0<8,8,1>UB {align1}; avg (8) g78.16<1>UW g45.0<8,8,1>UB g46.0<8,8,1>UB {align1}; avg (8) g79.0<1>UW g46.0<8,8,1>UB g47.0<8,8,1>UB {align1}; avg (8) g79.16<1>UW g47.0<8,8,1>UB g48.0<8,8,1>UB {align1}; avg (8) g80.0<1>UW g48.0<8,8,1>UB g49.0<8,8,1>UB {align1}; avg (8) g80.16<1>UW g49.0<8,8,1>UB g50.0<8,8,1>UB {align1}; avg (8) g81.0<1>UW g50.0<8,8,1>UB g51.0<8,8,1>UB {align1}; avg (8) g81.16<1>UW g51.0<8,8,1>UB g52.0<8,8,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/vld/read_field_x0y0_uv.g4i0000664000175000017500000000423112400044327021010 00000000000000/* * Copyright © 2009 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Yan Li * Liu Xi bin */ /* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x7000FUD {align1}; // 8*16/32=4 send (16) 0 g40.0<1>UW g115<16,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g45.0<1>UW g115<16,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V mov (16) g32.0<1>UW g40.0<16,8,1>UB {align1}; mov (16) g33.0<1>UW g41.0<16,8,1>UB {align1}; mov (16) g34.0<1>UW g42.0<16,8,1>UB {align1}; mov (16) g35.0<1>UW g43.0<16,8,1>UB {align1}; mov (16) g36.0<1>UW g45.0<16,8,1>UB {align1}; mov (16) g37.0<1>UW g46.0<16,8,1>UB {align1}; mov (16) g38.0<1>UW g47.0<16,8,1>UB {align1}; mov (16) g39.0<1>UW g48.0<16,8,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/0000775000175000017500000000000012445556130014636 500000000000000xf86-video-intel-2.99.917/xvmc/shader/mc/dual_prime_igd.g4b0000664000175000017500000020443612400044327020120 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x00b10040, 0x04110203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00600001, 0x2e800021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000043 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000041 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000012 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x26800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000e3c, 0x0021003f, 0x00000004 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000043 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000041 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000012 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x26a00021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26e00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27200021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0ce0, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000041 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00600040, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600040, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600040, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600040, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0501 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0521 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0541 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0561 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0521 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0541 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0561 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0581 }, { 0x00600040, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600040, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600040, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600040, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05a1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05c1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d05e1 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0601 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05c1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05e1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d0601 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000039 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0501 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0521 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0541 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0561 }, { 0x00600042, 0x24804629, 0x008d0580, 0x008d0581 }, { 0x00600042, 0x24a04629, 0x008d05a0, 0x008d05a1 }, { 0x00600042, 0x24c04629, 0x008d05c0, 0x008d05c1 }, { 0x00600042, 0x24e04629, 0x008d05e0, 0x008d05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600042, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0414a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0414a009 }, { 0x00802001, 0x24000229, 0x008d0500, 0x00000000 }, { 0x00802001, 0x24400229, 0x008d0540, 0x00000000 }, { 0x00802001, 0x24800229, 0x008d0600, 0x00000000 }, { 0x00802001, 0x24c00229, 0x008d0640, 0x00000000 }, { 0x00600001, 0x28800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000041 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00600040, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600040, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600040, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600040, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0501 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0521 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0541 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0561 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0521 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0541 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0561 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0581 }, { 0x00600040, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600040, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600040, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600040, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05a1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05c1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d05e1 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0601 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05c1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05e1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d0601 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000039 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0501 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0521 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0541 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0561 }, { 0x00600042, 0x24804629, 0x008d0580, 0x008d0581 }, { 0x00600042, 0x24a04629, 0x008d05a0, 0x008d05a1 }, { 0x00600042, 0x24c04629, 0x008d05c0, 0x008d05c1 }, { 0x00600042, 0x24e04629, 0x008d05e0, 0x008d05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600042, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0414a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0414a009 }, { 0x00802001, 0x24000229, 0x008d0500, 0x00000000 }, { 0x00802001, 0x24400229, 0x008d0540, 0x00000000 }, { 0x00802001, 0x24800229, 0x008d0600, 0x00000000 }, { 0x00802001, 0x24c00229, 0x008d0640, 0x00000000 }, { 0x00600001, 0x28900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0aa0, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0e80, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00000001, 0x20280061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000043 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000041 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000012 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x23800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000c3c, 0x00210054, 0x00000008 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000043 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000041 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000012 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x80800042, 0x23802529, 0x00b10680, 0x00b10380 }, { 0x80800042, 0x23a02529, 0x00b106a0, 0x00b10c00 }, { 0x80800042, 0x23c02529, 0x00b106c0, 0x00b103c0 }, { 0x80800042, 0x23e02529, 0x00b106e0, 0x00b10c20 }, { 0x80800042, 0x24002529, 0x00b10700, 0x00b10400 }, { 0x80800042, 0x24202529, 0x00b10720, 0x00b10c40 }, { 0x80800042, 0x24402529, 0x00b10740, 0x00b10440 }, { 0x80800042, 0x24602529, 0x00b10760, 0x00b10c60 }, { 0x80800042, 0x24802529, 0x00b10780, 0x00b10480 }, { 0x80800042, 0x24a02529, 0x00b107a0, 0x00b10c80 }, { 0x80800042, 0x24c02529, 0x00b107c0, 0x00b104c0 }, { 0x80800042, 0x24e02529, 0x00b107e0, 0x00b10ca0 }, { 0x80800042, 0x25002529, 0x00b10800, 0x00b10500 }, { 0x80800042, 0x25202529, 0x00b10820, 0x00b10cc0 }, { 0x80800042, 0x25402529, 0x00b10840, 0x00b10540 }, { 0x80800042, 0x25602529, 0x00b10860, 0x00b10ce0 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000041 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00600040, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600040, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600040, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600040, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0501 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0521 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0541 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0561 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0521 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0541 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0561 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0581 }, { 0x00600040, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600040, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600040, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600040, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05a1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05c1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d05e1 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0601 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05c1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05e1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d0601 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000039 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0501 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0521 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0541 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0561 }, { 0x00600042, 0x24804629, 0x008d0580, 0x008d0581 }, { 0x00600042, 0x24a04629, 0x008d05a0, 0x008d05a1 }, { 0x00600042, 0x24c04629, 0x008d05c0, 0x008d05c1 }, { 0x00600042, 0x24e04629, 0x008d05e0, 0x008d05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600042, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0414a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0414a009 }, { 0x00802001, 0x24000229, 0x008d0500, 0x00000000 }, { 0x00802001, 0x24400229, 0x008d0540, 0x00000000 }, { 0x00802001, 0x24800229, 0x008d0600, 0x00000000 }, { 0x00802001, 0x24c00229, 0x008d0640, 0x00000000 }, { 0x00600001, 0x25800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000041 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00600040, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600040, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600040, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600040, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0501 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0521 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0541 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0561 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0521 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0541 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0561 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0581 }, { 0x00600040, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600040, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600040, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600040, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05a1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05c1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d05e1 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0601 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05c1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05e1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d0601 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000039 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0501 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0521 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0541 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0561 }, { 0x00600042, 0x24804629, 0x008d0580, 0x008d0581 }, { 0x00600042, 0x24a04629, 0x008d05a0, 0x008d05a1 }, { 0x00600042, 0x24c04629, 0x008d05c0, 0x008d05c1 }, { 0x00600042, 0x24e04629, 0x008d05e0, 0x008d05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600042, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0414a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0414a009 }, { 0x00802001, 0x24000229, 0x008d0500, 0x00000000 }, { 0x00802001, 0x24400229, 0x008d0540, 0x00000000 }, { 0x00802001, 0x24800229, 0x008d0600, 0x00000000 }, { 0x00802001, 0x24c00229, 0x008d0640, 0x00000000 }, { 0x00600001, 0x25900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26700129, 0x008d0aa0, 0x00000000 }, { 0x80800042, 0x25802529, 0x00b10880, 0x00b10580 }, { 0x80800042, 0x25a02529, 0x00b108a0, 0x00b105a0 }, { 0x80800042, 0x25c02529, 0x00b108c0, 0x00b105c0 }, { 0x80800042, 0x25e02529, 0x00b108e0, 0x00b105e0 }, { 0x80800042, 0x26002529, 0x00b10900, 0x00b10600 }, { 0x80800042, 0x26202529, 0x00b10920, 0x00b10620 }, { 0x80800042, 0x26402529, 0x00b10940, 0x00b10640 }, { 0x80800042, 0x26602529, 0x00b10960, 0x00b10660 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05902000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x0y1_y_igd.g4i0000664000175000017500000000430612400044327021276 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (1) g32.8<1>UD 0x007001FUD {align1}; and.nz (1) null g32.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g38.0<1>UW g32<8,8,1>UW read(4, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(4, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; mov (1) g32.8<1>UD 0x1FUD {align1}; send (16) 0 g54.0<1>UW g32<8,8,1>UW read(4, 2, 0, 2) mlen 1 rlen 1 {align1}; jmpi put_data; read_backward: send (16) 0 g38.0<1>UW g32<8,8,1>UW read(7, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(7, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; mov (1) g32.8<1>UD 0x1FUD {align1}; send (16) 0 g54.0<1>UW g32<8,8,1>UW read(7, 2, 0, 2) mlen 1 rlen 1 {align1}; put_data: avg (16) g58.0<1>UW g38.0<16,16,1>UB g39.0<16,16,1>UB {align1}; avg (16) g59.0<1>UW g39.0<16,16,1>UB g40.0<16,16,1>UB {align1}; avg (16) g60.0<1>UW g40.0<16,16,1>UB g41.0<16,16,1>UB {align1}; avg (16) g61.0<1>UW g41.0<16,16,1>UB g42.0<16,16,1>UB {align1}; avg (16) g62.0<1>UW g42.0<16,16,1>UB g43.0<16,16,1>UB {align1}; avg (16) g63.0<1>UW g43.0<16,16,1>UB g44.0<16,16,1>UB {align1}; avg (16) g64.0<1>UW g44.0<16,16,1>UB g45.0<16,16,1>UB {align1}; avg (16) g65.0<1>UW g45.0<16,16,1>UB g46.0<16,16,1>UB {align1}; avg (16) g66.0<1>UW g46.0<16,16,1>UB g47.0<16,16,1>UB {align1}; avg (16) g67.0<1>UW g47.0<16,16,1>UB g48.0<16,16,1>UB {align1}; avg (16) g68.0<1>UW g48.0<16,16,1>UB g49.0<16,16,1>UB {align1}; avg (16) g69.0<1>UW g49.0<16,16,1>UB g50.0<16,16,1>UB {align1}; avg (16) g70.0<1>UW g50.0<16,16,1>UB g51.0<16,16,1>UB {align1}; avg (16) g71.0<1>UW g51.0<16,16,1>UB g52.0<16,16,1>UB {align1}; avg (16) g72.0<1>UW g52.0<16,16,1>UB g53.0<16,16,1>UB {align1}; avg (16) g73.0<1>UW g53.0<16,16,1>UB g54.0<16,16,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x1y0_uv.g4i0000664000175000017500000000726412400044327020643 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g2.8<1>UD 0x007000FUD {align1}; and (1) g2.24<1>UD g2.0<1,1,1>UD 0x3UD {align1}; send (16) 0 g86.0<1>UW g2<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 4 {align1}; send (16) 0 g90.0<1>UW g2<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 4 {align1}; mul(1) g2.24<1>UD g2.24<1,1,1>UD 0x9UD {align1}; jmpi g2.24<1,1,1>D; avg.sat (16) g44.0<1>UW g86.0<16,8,1>UB g86.1<16,8,1>UB{align1}; avg.sat (16) g45.0<1>UW g87.0<16,8,1>UB g87.1<16,8,1>UB{align1}; avg.sat (16) g46.0<1>UW g88.0<16,8,1>UB g88.1<16,8,1>UB{align1}; avg.sat (16) g47.0<1>UW g89.0<16,8,1>UB g89.1<16,8,1>UB{align1}; avg.sat (16) g48.0<1>UW g90.0<16,8,1>UB g90.1<16,8,1>UB{align1}; avg.sat (16) g49.0<1>UW g91.0<16,8,1>UB g91.1<16,8,1>UB{align1}; avg.sat (16) g50.0<1>UW g92.0<16,8,1>UB g92.1<16,8,1>UB{align1}; avg.sat (16) g51.0<1>UW g93.0<16,8,1>UB g93.1<16,8,1>UB{align1}; jmpi out; avg.sat (16) g44.0<1>UW g86.1<16,8,1>UB g86.2<16,8,1>UB{align1}; avg.sat (16) g45.0<1>UW g87.1<16,8,1>UB g87.2<16,8,1>UB{align1}; avg.sat (16) g46.0<1>UW g88.1<16,8,1>UB g88.2<16,8,1>UB{align1}; avg.sat (16) g47.0<1>UW g89.1<16,8,1>UB g89.2<16,8,1>UB{align1}; avg.sat (16) g48.0<1>UW g90.1<16,8,1>UB g90.2<16,8,1>UB{align1}; avg.sat (16) g49.0<1>UW g91.1<16,8,1>UB g91.2<16,8,1>UB{align1}; avg.sat (16) g50.0<1>UW g92.1<16,8,1>UB g92.2<16,8,1>UB{align1}; avg.sat (16) g51.0<1>UW g93.1<16,8,1>UB g93.2<16,8,1>UB{align1}; jmpi out; avg.sat (16) g44.0<1>UW g86.2<16,8,1>UB g86.3<16,8,1>UB{align1}; avg.sat (16) g45.0<1>UW g87.2<16,8,1>UB g87.3<16,8,1>UB{align1}; avg.sat (16) g46.0<1>UW g88.2<16,8,1>UB g88.3<16,8,1>UB{align1}; avg.sat (16) g47.0<1>UW g89.2<16,8,1>UB g89.3<16,8,1>UB{align1}; avg.sat (16) g48.0<1>UW g90.2<16,8,1>UB g90.3<16,8,1>UB{align1}; avg.sat (16) g49.0<1>UW g91.2<16,8,1>UB g91.3<16,8,1>UB{align1}; avg.sat (16) g50.0<1>UW g92.2<16,8,1>UB g92.3<16,8,1>UB{align1}; avg.sat (16) g51.0<1>UW g93.2<16,8,1>UB g93.3<16,8,1>UB{align1}; jmpi out; avg.sat (16) g44.0<1>UW g86.3<16,8,1>UB g86.4<16,8,1>UB{align1}; avg.sat (16) g45.0<1>UW g87.3<16,8,1>UB g87.4<16,8,1>UB{align1}; avg.sat (16) g46.0<1>UW g88.3<16,8,1>UB g88.4<16,8,1>UB{align1}; avg.sat (16) g47.0<1>UW g89.3<16,8,1>UB g89.4<16,8,1>UB{align1}; avg.sat (16) g48.0<1>UW g90.3<16,8,1>UB g90.4<16,8,1>UB{align1}; avg.sat (16) g49.0<1>UW g91.3<16,8,1>UB g91.4<16,8,1>UB{align1}; avg.sat (16) g50.0<1>UW g92.3<16,8,1>UB g92.4<16,8,1>UB{align1}; avg.sat (16) g51.0<1>UW g93.3<16,8,1>UB g93.4<16,8,1>UB{align1}; out: xf86-video-intel-2.99.917/xvmc/shader/mc/field_forward_igd.g4b.gen50000664000175000017500000000652212400044327021437 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x2e700169, 0x00000000, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a56, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a56 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a56, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a56 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/ipicture.g4b0000664000175000017500000001533312400044327016774 00000000000000 { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000040, 0x20480c21, 0x00210e68, 0x00000000 }, { 0x00800031, 0x20601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x00b10040, 0x04110203 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x406001b1, 0x00b10060, 0x00000000 }, { 0x80800001, 0x408001b1, 0x00b10080, 0x00000000 }, { 0x80800001, 0x40a001b1, 0x00b100a0, 0x00000000 }, { 0x80800001, 0x40c001b1, 0x00b100c0, 0x00000000 }, { 0x80800001, 0x40e001b1, 0x00b100e0, 0x00000000 }, { 0x80800001, 0x410001b1, 0x00b10100, 0x00000000 }, { 0x80800001, 0x412001b1, 0x00b10120, 0x00000000 }, { 0x80800001, 0x414001b1, 0x00b10140, 0x00000000 }, { 0x80800001, 0x416001b1, 0x00b10160, 0x00000000 }, { 0x80800001, 0x418001b1, 0x00b10180, 0x00000000 }, { 0x80800001, 0x41a001b1, 0x00b101a0, 0x00000000 }, { 0x80800001, 0x41c001b1, 0x00b101c0, 0x00000000 }, { 0x80800001, 0x41e001b1, 0x00b101e0, 0x00000000 }, { 0x80800001, 0x420001b1, 0x00b10200, 0x00000000 }, { 0x80800001, 0x422001b1, 0x00b10220, 0x00000000 }, { 0x80800001, 0x424001b1, 0x00b10240, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x20200232, 0x00b20060, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20080, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b200a0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b200c0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b200e0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20100, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20120, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20140, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20160, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20180, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b201a0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b201c0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b201e0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20200, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20220, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20240, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x20200232, 0x00b20060, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20160, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20080, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20180, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b200a0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b201a0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b200c0, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b201c0, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b200e0, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b201e0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20100, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b20200, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20120, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20220, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20140, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20240, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05902000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450e60, 0x00000001 }, { 0x80800001, 0x426001b1, 0x00b10260, 0x00000000 }, { 0x80800001, 0x428001b1, 0x00b10280, 0x00000000 }, { 0x80800001, 0x42a001b1, 0x00b102a0, 0x00000000 }, { 0x80800001, 0x42c001b1, 0x00b102c0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20260, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20280, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b202a0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b202c0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302001 }, { 0x80800001, 0x42e001b1, 0x00b102e0, 0x00000000 }, { 0x80800001, 0x430001b1, 0x00b10300, 0x00000000 }, { 0x80800001, 0x432001b1, 0x00b10320, 0x00000000 }, { 0x80800001, 0x434001b1, 0x00b10340, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b202e0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20300, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20320, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20340, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x0y1_uv_igd.g4i0000664000175000017500000000440712400044327021462 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDINg BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINgEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIgHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAgES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISINg FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINgS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ send (16) 0 g86.0<1>UW g2<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 4 {align1}; send (16) 0 g94.0<1>UW g2<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 4 {align1}; mov (1) g2.8<1>UD 0x01001FUD {align1}; add (1) g2.4<1>UD g2.4<1,1,1>UD 8UD {align1}; send (16) 0 g90.0<1>UW g2<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 1 {align1}; send (16) 0 g98.0<1>UW g2<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 1 {align1}; mov (1) g2.8<1>UD 0x007000fUD {align1}; avg.sat (16) g44.0<1>UW g86.0<16,8,1>UB g87.0<16,8,1>UB{align1}; avg.sat (16) g45.0<1>UW g87.0<16,8,1>UB g88.0<16,8,1>UB{align1}; avg.sat (16) g46.0<1>UW g88.0<16,8,1>UB g89.0<16,8,1>UB{align1}; avg.sat (16) g47.0<1>UW g89.0<16,8,1>UB g90.0<16,8,1>UB{align1}; avg.sat (16) g48.0<1>UW g94.0<16,8,1>UB g95.0<16,8,1>UB{align1}; avg.sat (16) g49.0<1>UW g95.0<16,8,1>UB g96.0<16,8,1>UB{align1}; avg.sat (16) g50.0<1>UW g96.0<16,8,1>UB g97.0<16,8,1>UB{align1}; avg.sat (16) g51.0<1>UW g97.0<16,8,1>UB g98.0<16,8,1>UB{align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/field_backward_igd.g4b0000664000175000017500000000652212400044327020714 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x2e700169, 0x00000000, 0x00010001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a5a, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a5a }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a5a, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a5a }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x1y0_uv_igd.g4i0000664000175000017500000000240212400044327021444 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x07000FUD {align1}; // 8*16/32=4 and.nz (1) null g115.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(5, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g44.0<1>UW g115<8,8,1>UW read(6, 2, 0, 2) mlen 1 rlen 4 {align1};//V jmpi put_data; read_backward: send (16) 0 g40.0<1>UW g115<8,8,1>UW read(8, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g44.0<1>UW g115<8,8,1>UW read(9, 2, 0, 2) mlen 1 rlen 4 {align1};//V put_data: avg (8) g32.0<1>UW g40.0<8,8,1>UB g40.1<8,8,1>UB {align1}; avg (8) g33.0<1>UW g41.0<8,8,1>UB g41.1<8,8,1>UB {align1}; avg (8) g34.0<1>UW g42.0<8,8,1>UB g42.1<8,8,1>UB {align1}; avg (8) g35.0<1>UW g43.0<8,8,1>UB g43.1<8,8,1>UB {align1}; avg (8) g36.0<1>UW g44.0<8,8,1>UB g44.1<8,8,1>UB {align1}; avg (8) g37.0<1>UW g45.0<8,8,1>UB g45.1<8,8,1>UB {align1}; avg (8) g38.0<1>UW g46.0<8,8,1>UB g46.1<8,8,1>UB {align1}; avg (8) g39.0<1>UW g47.0<8,8,1>UB g47.1<8,8,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x0y1_y.g4i0000664000175000017500000001433612400044327020457 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g2.8<1>UD 0x007001FUD {align1}; send (16) 0 g98.0<1>UW g2<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; and (1) g2.24<1>UD g2.0<1,1,1>UD 3UD {align1}; mul(1) g2.24<1>UD g2.24<1,1,1>UD 17UD {align1}; add (1) g2.4<1>UD g2.4<1,1,1>UD 8UD {align1}; send (16) 0 g106.0<1>UW g2<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g2.4<1>UD g2.4<1,1,1>UD 8UD {align1}; mov (1) g2.8<1>UD 0x1FUD {align1}; send (16) 0 g120.0<1>UW g2<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 1 {align1}; jmpi g2.24<1,1,1>D; avg.sat (16) g28.0<1>UW g98.0<16,16,1>UB g99.0<16,16,1>UB {align1}; avg.sat (16) g29.0<1>UW g99.0<16,16,1>UB g100.0<16,16,1>UB {align1}; avg.sat (16) g30.0<1>UW g100.0<16,16,1>UB g101.0<16,16,1>UB {align1}; avg.sat (16) g31.0<1>UW g101.0<16,16,1>UB g102.0<16,16,1>UB {align1}; avg.sat (16) g32.0<1>UW g102.0<16,16,1>UB g103.0<16,16,1>UB {align1}; avg.sat (16) g33.0<1>UW g103.0<16,16,1>UB g104.0<16,16,1>UB {align1}; avg.sat (16) g34.0<1>UW g104.0<16,16,1>UB g105.0<16,16,1>UB {align1}; avg.sat (16) g35.0<1>UW g105.0<16,16,1>UB g106.0<16,16,1>UB {align1}; avg.sat (16) g36.0<1>UW g106.0<16,16,1>UB g107.0<16,16,1>UB {align1}; avg.sat (16) g37.0<1>UW g107.0<16,16,1>UB g108.0<16,16,1>UB {align1}; avg.sat (16) g38.0<1>UW g108.0<16,16,1>UB g109.0<16,16,1>UB {align1}; avg.sat (16) g39.0<1>UW g109.0<16,16,1>UB g110.0<16,16,1>UB {align1}; avg.sat (16) g40.0<1>UW g110.0<16,16,1>UB g111.0<16,16,1>UB {align1}; avg.sat (16) g41.0<1>UW g111.0<16,16,1>UB g112.0<16,16,1>UB {align1}; avg.sat (16) g42.0<1>UW g112.0<16,16,1>UB g113.0<16,16,1>UB {align1}; avg.sat (16) g43.0<1>UW g113.0<16,16,1>UB g120.0<16,16,1>UB {align1}; jmpi out; avg.sat (16) g28.0<1>UW g98.1<16,16,1>UB g99.1<16,16,1>UB {align1}; avg.sat (16) g29.0<1>UW g99.1<16,16,1>UB g100.1<16,16,1>UB {align1}; avg.sat (16) g30.0<1>UW g100.1<16,16,1>UB g101.1<16,16,1>UB {align1}; avg.sat (16) g31.0<1>UW g101.1<16,16,1>UB g102.1<16,16,1>UB {align1}; avg.sat (16) g32.0<1>UW g102.1<16,16,1>UB g103.1<16,16,1>UB {align1}; avg.sat (16) g33.0<1>UW g103.1<16,16,1>UB g104.1<16,16,1>UB {align1}; avg.sat (16) g34.0<1>UW g104.1<16,16,1>UB g105.1<16,16,1>UB {align1}; avg.sat (16) g35.0<1>UW g105.1<16,16,1>UB g106.1<16,16,1>UB {align1}; avg.sat (16) g36.0<1>UW g106.1<16,16,1>UB g107.1<16,16,1>UB {align1}; avg.sat (16) g37.0<1>UW g107.1<16,16,1>UB g108.1<16,16,1>UB {align1}; avg.sat (16) g38.0<1>UW g108.1<16,16,1>UB g109.1<16,16,1>UB {align1}; avg.sat (16) g39.0<1>UW g109.1<16,16,1>UB g110.1<16,16,1>UB {align1}; avg.sat (16) g40.0<1>UW g110.1<16,16,1>UB g111.1<16,16,1>UB {align1}; avg.sat (16) g41.0<1>UW g111.1<16,16,1>UB g112.1<16,16,1>UB {align1}; avg.sat (16) g42.0<1>UW g112.1<16,16,1>UB g113.1<16,16,1>UB {align1}; avg.sat (16) g43.0<1>UW g113.1<16,16,1>UB g120.1<16,16,1>UB {align1}; jmpi out; avg.sat (16) g28.0<1>UW g98.2<16,16,1>UB g99.2<16,16,1>UB {align1}; avg.sat (16) g29.0<1>UW g99.2<16,16,1>UB g100.2<16,16,1>UB {align1}; avg.sat (16) g30.0<1>UW g100.2<16,16,1>UB g101.2<16,16,1>UB {align1}; avg.sat (16) g31.0<1>UW g101.2<16,16,1>UB g102.2<16,16,1>UB {align1}; avg.sat (16) g32.0<1>UW g102.2<16,16,1>UB g103.2<16,16,1>UB {align1}; avg.sat (16) g33.0<1>UW g103.2<16,16,1>UB g104.2<16,16,1>UB {align1}; avg.sat (16) g34.0<1>UW g104.2<16,16,1>UB g105.2<16,16,1>UB {align1}; avg.sat (16) g35.0<1>UW g105.2<16,16,1>UB g106.2<16,16,1>UB {align1}; avg.sat (16) g36.0<1>UW g106.2<16,16,1>UB g107.2<16,16,1>UB {align1}; avg.sat (16) g37.0<1>UW g107.2<16,16,1>UB g108.2<16,16,1>UB {align1}; avg.sat (16) g38.0<1>UW g108.2<16,16,1>UB g109.2<16,16,1>UB {align1}; avg.sat (16) g39.0<1>UW g109.2<16,16,1>UB g110.2<16,16,1>UB {align1}; avg.sat (16) g40.0<1>UW g110.2<16,16,1>UB g111.2<16,16,1>UB {align1}; avg.sat (16) g41.0<1>UW g111.2<16,16,1>UB g112.2<16,16,1>UB {align1}; avg.sat (16) g42.0<1>UW g112.2<16,16,1>UB g113.2<16,16,1>UB {align1}; avg.sat (16) g43.0<1>UW g113.2<16,16,1>UB g120.2<16,16,1>UB {align1}; jmpi out; avg.sat (16) g28.0<1>UW g98.3<16,16,1>UB g99.3<16,16,1>UB {align1}; avg.sat (16) g29.0<1>UW g99.3<16,16,1>UB g100.3<16,16,1>UB {align1}; avg.sat (16) g30.0<1>UW g100.3<16,16,1>UB g101.3<16,16,1>UB {align1}; avg.sat (16) g31.0<1>UW g101.3<16,16,1>UB g102.3<16,16,1>UB {align1}; avg.sat (16) g32.0<1>UW g102.3<16,16,1>UB g103.3<16,16,1>UB {align1}; avg.sat (16) g33.0<1>UW g103.3<16,16,1>UB g104.3<16,16,1>UB {align1}; avg.sat (16) g34.0<1>UW g104.3<16,16,1>UB g105.3<16,16,1>UB {align1}; avg.sat (16) g35.0<1>UW g105.3<16,16,1>UB g106.3<16,16,1>UB {align1}; avg.sat (16) g36.0<1>UW g106.3<16,16,1>UB g107.3<16,16,1>UB {align1}; avg.sat (16) g37.0<1>UW g107.3<16,16,1>UB g108.3<16,16,1>UB {align1}; avg.sat (16) g38.0<1>UW g108.3<16,16,1>UB g109.3<16,16,1>UB {align1}; avg.sat (16) g39.0<1>UW g109.3<16,16,1>UB g110.3<16,16,1>UB {align1}; avg.sat (16) g40.0<1>UW g110.3<16,16,1>UB g111.3<16,16,1>UB {align1}; avg.sat (16) g41.0<1>UW g111.3<16,16,1>UB g112.3<16,16,1>UB {align1}; avg.sat (16) g42.0<1>UW g112.3<16,16,1>UB g113.3<16,16,1>UB {align1}; avg.sat (16) g43.0<1>UW g113.3<16,16,1>UB g120.3<16,16,1>UB {align1}; out: xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x1y0_y.g4i0000664000175000017500000001036512400044327020446 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g115.8<1>UD 0x01FUD {align1}; send (16) 0 g78.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g80.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g82.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g84.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; mov (1) g115.8<1>UD 0x07001FUD {align1}; send (16) 0 g86.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; and (1) g2.24<1>UD g115.0<1,1,1>UD 3UD {align1}; mul (1) g2.24<1>UD g2.24<1,1,1>UD 9UD {align1}; jmpi g2.24<1,1,1>D; avg.sat (16) g96.0<1>UW g78.0<16,16,1>UB g78.1<16,16,1>UB {align1}; avg.sat (16) g97.0<1>UW g80.0<16,16,1>UB g80.1<16,16,1>UB {align1}; avg.sat (16) g98.0<1>UW g82.0<16,16,1>UB g82.1<16,16,1>UB {align1}; avg.sat (16) g99.0<1>UW g84.0<16,16,1>UB g84.1<16,16,1>UB {align1}; avg.sat (16) g100.0<1>UW g86.0<16,16,1>UB g86.1<16,16,1>UB {align1}; avg.sat (16) g101.0<1>UW g88.0<16,16,1>UB g88.1<16,16,1>UB {align1}; avg.sat (16) g102.0<1>UW g90.0<16,16,1>UB g90.1<16,16,1>UB {align1}; avg.sat (16) g103.0<1>UW g92.0<16,16,1>UB g92.1<16,16,1>UB {align1}; jmpi out; avg.sat (16) g96.0<1>UW g78.1<16,16,1>UB g78.2<16,16,1>UB {align1}; avg.sat (16) g97.0<1>UW g80.1<16,16,1>UB g80.2<16,16,1>UB {align1}; avg.sat (16) g98.0<1>UW g82.1<16,16,1>UB g82.2<16,16,1>UB {align1}; avg.sat (16) g99.0<1>UW g84.1<16,16,1>UB g84.2<16,16,1>UB {align1}; avg.sat (16) g100.0<1>UW g86.1<16,16,1>UB g86.2<16,16,1>UB {align1}; avg.sat (16) g101.0<1>UW g88.1<16,16,1>UB g88.2<16,16,1>UB {align1}; avg.sat (16) g102.0<1>UW g90.1<16,16,1>UB g90.2<16,16,1>UB {align1}; avg.sat (16) g103.0<1>UW g92.1<16,16,1>UB g92.2<16,16,1>UB {align1}; jmpi out; avg.sat (16) g96.0<1>UW g78.2<16,16,1>UB g78.3<16,16,1>UB {align1}; avg.sat (16) g97.0<1>UW g80.2<16,16,1>UB g80.3<16,16,1>UB {align1}; avg.sat (16) g98.0<1>UW g82.2<16,16,1>UB g82.3<16,16,1>UB {align1}; avg.sat (16) g99.0<1>UW g84.2<16,16,1>UB g84.3<16,16,1>UB {align1}; avg.sat (16) g100.0<1>UW g86.2<16,16,1>UB g86.3<16,16,1>UB {align1}; avg.sat (16) g101.0<1>UW g88.2<16,16,1>UB g88.3<16,16,1>UB {align1}; avg.sat (16) g102.0<1>UW g90.2<16,16,1>UB g90.3<16,16,1>UB {align1}; avg.sat (16) g103.0<1>UW g92.2<16,16,1>UB g92.3<16,16,1>UB {align1}; jmpi out; avg.sat (16) g96.0<1>UW g78.3<16,16,1>UB g78.4<16,16,1>UB {align1}; avg.sat (16) g97.0<1>UW g80.3<16,16,1>UB g80.4<16,16,1>UB {align1}; avg.sat (16) g98.0<1>UW g82.3<16,16,1>UB g82.4<16,16,1>UB {align1}; avg.sat (16) g99.0<1>UW g84.3<16,16,1>UB g84.4<16,16,1>UB {align1}; avg.sat (16) g100.0<1>UW g86.3<16,16,1>UB g86.4<16,16,1>UB {align1}; avg.sat (16) g101.0<1>UW g88.3<16,16,1>UB g88.4<16,16,1>UB {align1}; avg.sat (16) g102.0<1>UW g90.3<16,16,1>UB g90.4<16,16,1>UB {align1}; avg.sat (16) g103.0<1>UW g92.3<16,16,1>UB g92.4<16,16,1>UB {align1}; out: xf86-video-intel-2.99.917/xvmc/shader/mc/lib_igd.g4b.gen50000664000175000017500000007374212400044327017406 00000000000000 { 0x00000020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000001e0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000001f8 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000002de }, { 0x00000020, 0x34001c00, 0x00001400, 0x000003b4 }, { 0x00800001, 0x2a8001ad, 0x00b10420, 0x00000000 }, { 0x00800001, 0x2aa001ad, 0x00b10440, 0x00000000 }, { 0x00800001, 0x2ac001ad, 0x00b10460, 0x00000000 }, { 0x00800001, 0x2ae001ad, 0x00b10480, 0x00000000 }, { 0x00800001, 0x2b0001ad, 0x00b104a0, 0x00000000 }, { 0x00800001, 0x2b2001ad, 0x00b104c0, 0x00000000 }, { 0x00800001, 0x2b4001ad, 0x00b104e0, 0x00000000 }, { 0x00800001, 0x2b6001ad, 0x00b10500, 0x00000000 }, { 0x00800001, 0x2b8001ad, 0x00b10520, 0x00000000 }, { 0x00800001, 0x2ba001ad, 0x00b10540, 0x00000000 }, { 0x00800001, 0x2bc001ad, 0x00b10560, 0x00000000 }, { 0x00800001, 0x2be001ad, 0x00b10580, 0x00000000 }, { 0x00800001, 0x2c0001ad, 0x00b105a0, 0x00000000 }, { 0x00800001, 0x2c2001ad, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x2c4001ad, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x2c6001ad, 0x00b10600, 0x00000000 }, { 0x00800001, 0x2c8001ad, 0x00b10620, 0x00000000 }, { 0x00800001, 0x2ca001ad, 0x00b10640, 0x00000000 }, { 0x00800001, 0x2cc001ad, 0x00b10660, 0x00000000 }, { 0x00800001, 0x2ce001ad, 0x00b10680, 0x00000000 }, { 0x00800001, 0x2d0001ad, 0x00b106a0, 0x00000000 }, { 0x00800001, 0x2d2001ad, 0x00b106c0, 0x00000000 }, { 0x00800001, 0x2d4001ad, 0x00b106e0, 0x00000000 }, { 0x00800001, 0x2d6001ad, 0x00b10700, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x2a8001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2aa001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ac001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ae001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b0001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b2001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b4001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b6001ed, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x2a9001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ab001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ad001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2af001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b1001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b3001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b5001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b7001ed, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x2b8001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ba001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bc001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2be001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c0001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c2001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c4001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c6001ed, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x2b9001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bb001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bd001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bf001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c1001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c3001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c5001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c7001ed, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c8001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2ca001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2cc001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2ce001ed, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2d0001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d2001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d4001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d6001ed, 0x00000000, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x01000005, 0x20000d3c, 0x00218000, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ce }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20000d3c, 0x00218000, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000092 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210410, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, { 0x00a02008, 0x27402d29, 0x00b10740, 0x00020002 }, { 0x00a02008, 0x27802d29, 0x00b10780, 0x00020002 }, { 0x00a02008, 0x27c02d29, 0x00b107c0, 0x00020002 }, { 0x00a02008, 0x28002d29, 0x00b10800, 0x00020002 }, { 0x00a02008, 0x28402d29, 0x00b10840, 0x00020002 }, { 0x00a02008, 0x28802d29, 0x00b10880, 0x00020002 }, { 0x00a02008, 0x28c02d29, 0x00b108c0, 0x00020002 }, { 0x00a02008, 0x29002d29, 0x00b10900, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210410, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800042, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800042, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800042, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800042, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800042, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800042, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000006c }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20000d3c, 0x00218000, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210410, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x408d0400, 0x0218a007 }, { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, { 0x00800042, 0x27604629, 0x00b104e0, 0x00b10500 }, { 0x00800042, 0x27804629, 0x00b10500, 0x00b10520 }, { 0x00800042, 0x27a04629, 0x00b10520, 0x00b10540 }, { 0x00800042, 0x27c04629, 0x00b10540, 0x00b10560 }, { 0x00800042, 0x27e04629, 0x00b10560, 0x00b10580 }, { 0x00800042, 0x28004629, 0x00b10580, 0x00b105a0 }, { 0x00800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, { 0x00800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, { 0x00800042, 0x28604629, 0x00b105e0, 0x00b10600 }, { 0x00800042, 0x28804629, 0x00b10600, 0x00b10620 }, { 0x00800042, 0x28a04629, 0x00b10620, 0x00b10640 }, { 0x00800042, 0x28c04629, 0x00b10640, 0x00b10660 }, { 0x00800042, 0x28e04629, 0x00b10660, 0x00b10680 }, { 0x00800042, 0x29004629, 0x00b10680, 0x00b106a0 }, { 0x00800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210410, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x24c01d29, 0x408d0400, 0x0288a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x408d0400, 0x0288a007 }, { 0x00a02001, 0x27400229, 0x00b104c0, 0x00000000 }, { 0x00a02001, 0x27800229, 0x00b10500, 0x00000000 }, { 0x00a02001, 0x27c00229, 0x00b10540, 0x00000000 }, { 0x00a02001, 0x28000229, 0x00b10580, 0x00000000 }, { 0x00a02001, 0x28400229, 0x00b105c0, 0x00000000 }, { 0x00a02001, 0x28800229, 0x00b10600, 0x00000000 }, { 0x00a02001, 0x28c00229, 0x00b10640, 0x00000000 }, { 0x00a02001, 0x29000229, 0x00b10680, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210410, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x24401d29, 0x408d0400, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0400, 0x0248a009 }, { 0x00a02001, 0x29400229, 0x00ad0440, 0x00000000 }, { 0x00a02001, 0x29800229, 0x00ad0480, 0x00000000 }, { 0x00a02001, 0x29c00229, 0x00ad0580, 0x00000000 }, { 0x00a02001, 0x2a000229, 0x00ad05c0, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000086 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00600040, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600040, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600040, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600040, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0501 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0521 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0541 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0561 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0521 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0541 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0561 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0581 }, { 0x00600040, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600040, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600040, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600040, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05a1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05c1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d05e1 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0601 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05c1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05e1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d0601 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000072 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0501 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0521 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0541 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0561 }, { 0x00600042, 0x24804629, 0x008d0580, 0x008d0581 }, { 0x00600042, 0x24a04629, 0x008d05a0, 0x008d05a1 }, { 0x00600042, 0x24c04629, 0x008d05c0, 0x008d05c1 }, { 0x00600042, 0x24e04629, 0x008d05e0, 0x008d05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000050 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600042, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0248a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0248a009 }, { 0x00802001, 0x24000229, 0x008d0500, 0x00000000 }, { 0x00802001, 0x24400229, 0x008d0540, 0x00000000 }, { 0x00802001, 0x24800229, 0x008d0600, 0x00000000 }, { 0x00802001, 0x24c00229, 0x008d0640, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x00200001, 0x23e00021, 0x00450a40, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80a02040, 0x474045b1, 0x00b10a80, 0x00b20740 }, { 0x80a02040, 0x478045b1, 0x00b10ac0, 0x00b20780 }, { 0x80a02040, 0x47c045b1, 0x00b10b00, 0x00b207c0 }, { 0x80a02040, 0x480045b1, 0x00b10b40, 0x00b20800 }, { 0x80a02040, 0x484045b1, 0x00b10b80, 0x00b20840 }, { 0x80a02040, 0x488045b1, 0x00b10bc0, 0x00b20880 }, { 0x80a02040, 0x48c045b1, 0x00b10c00, 0x00b208c0 }, { 0x80a02040, 0x490045b1, 0x00b10c40, 0x00b20900 }, { 0x80a02040, 0x494045b1, 0x00b10c80, 0x00b20940 }, { 0x80a02040, 0x498045b1, 0x00b10cc0, 0x00b20980 }, { 0x80a02040, 0x49c045b1, 0x00b10d00, 0x00b209c0 }, { 0x80a02040, 0x4a0045b1, 0x00b10d40, 0x00b20a00 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000040 }, { 0x80800040, 0x474045b1, 0x00b10a80, 0x00b20740 }, { 0x80800040, 0x476045b1, 0x00b10b80, 0x00b20760 }, { 0x80800040, 0x478045b1, 0x00b10aa0, 0x00b20780 }, { 0x80800040, 0x47a045b1, 0x00b10ba0, 0x00b207a0 }, { 0x80800040, 0x47c045b1, 0x00b10ac0, 0x00b207c0 }, { 0x80800040, 0x47e045b1, 0x00b10bc0, 0x00b207e0 }, { 0x80800040, 0x480045b1, 0x00b10ae0, 0x00b20800 }, { 0x80800040, 0x482045b1, 0x00b10be0, 0x00b20820 }, { 0x80800040, 0x484045b1, 0x00b10b00, 0x00b20840 }, { 0x80800040, 0x486045b1, 0x00b10c00, 0x00b20860 }, { 0x80800040, 0x488045b1, 0x00b10b20, 0x00b20880 }, { 0x80800040, 0x48a045b1, 0x00b10c20, 0x00b208a0 }, { 0x80800040, 0x48c045b1, 0x00b10b40, 0x00b208c0 }, { 0x80800040, 0x48e045b1, 0x00b10c40, 0x00b208e0 }, { 0x80800040, 0x490045b1, 0x00b10b60, 0x00b20900 }, { 0x80800040, 0x492045b1, 0x00b10c60, 0x00b20920 }, { 0x00800040, 0x2c8045ad, 0x00b10c80, 0x00b20940 }, { 0x00800040, 0x2ca045ad, 0x00b10ca0, 0x00b20960 }, { 0x00800040, 0x2cc045ad, 0x00b10cc0, 0x00b20980 }, { 0x00800040, 0x2ce045ad, 0x00b10ce0, 0x00b209a0 }, { 0x00800040, 0x2d0045ad, 0x00b10d00, 0x00b209c0 }, { 0x00800040, 0x2d2045ad, 0x00b10d20, 0x00b209e0 }, { 0x00800040, 0x2d4045ad, 0x00b10d40, 0x00b20a00 }, { 0x00800040, 0x2d6045ad, 0x00b10d60, 0x00b20a20 }, { 0x80800001, 0x494001b1, 0x00b10c80, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10ca0, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10cc0, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b10ce0, 0x00000000 }, { 0x80800001, 0x49c001b1, 0x00b10d00, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b10d20, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10d40, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10d60, 0x00000000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/frame_forward.g4a0000664000175000017500000000471312400044327017765 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ /* shader for backward predict mc */ /* save payload */ mov (8) g76.0<1>UD g1.0<8,8,1>UD {align1}; //mov (8) g77.0<1>UD g2.0<8,8,1>UD {align1}; include(`block_clear.g4i') mov (8) g115.0<1>UD g1.0<8,8,1>UD {align1}; mov (1) g1.8<1>UD 0x0070007UD {align1}; define(`input_surface', `4') define(`mv1', `g115.14') define(`mv2', `g115.16') /* Y */ /* (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) */ asr (2) g1.14<1>W g115.14<2,2,1>W 1W {align1}; add (2) g2.0<1>UD g115.0<2,2,1>UD g1.14<2,2,1>W {align1}; include(`motion_frame_y.g4i') /* motion_vector = motion_vector >> 1 */ /* (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) */ /* U */ shr (2) g1.0<1>UD g115.0<2,2,1>UD 1UD {align1}; asr (2) g115.14<1>W g115.14<2,2,1>W 1W {align1}; asr (2) g1.14<1>W g115.14<2,2,1>W 1W {align1}; add (2) g2.0<1>UD g1.0<2,2,1>UD g1.14<2,2,1>W {align1}; define(`input_surface1', `5') define(`input_surface2', `6') mov (1) g2.8<1>UD 0x007000fUD {align1}; include(`motion_frame_uv.g4i') /* V */ /* (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) */ include(`addidct.g4i') send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/field_forward_igd.g4a0000664000175000017500000000727212400044327020604 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g84~g107:IDCT data g115: message descriptor for reading reference data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x50UD {align1}; //jump to the lib to do IDCT /*field 0 of Y*/ asr (2) g31.14<1>W g82.14<2,2,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x1UW {align1}; //motion vertical field select (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) g115.16<1>UW 0UW {align1}; //0:forward 1:backward mov (1) a0.0<1>UD 0x0A4EUD {align1}; //g82.14,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x20UD {align1}; //jump to the lib to read reference data mov (8) g58.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g60.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g62.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g64.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g66.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g68.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g70.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g72.0<1>UD g39.0<8,8,1>UD {align1}; /*field 1 of Y*/ asr (2) g31.14<1>W g82.22<2,2,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x4UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A56UD {align1}; //g82.22,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x20UD {align1}; //jump to the lib to read reference data mov (8) g59.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g61.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g63.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g65.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g67.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g69.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g71.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g73.0<1>UD g39.0<8,8,1>UD {align1}; /*field 0 of UV*/ shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g31.14<1>W g82.14<2,2,1>W 2W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A4EUD {align1}; //g82.14,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x30UD {align1}; //jump to the lib to read reference data mov (16) g74.0<1>UW g32.0<8,8,1>UW {align1 compr}; mov (16) g76.0<1>UW g34.0<8,8,1>UW {align1 compr}; mov (16) g78.0<1>UW g36.0<8,8,1>UW {align1 compr}; mov (16) g80.0<1>UW g38.0<8,8,1>UW {align1 compr}; /*field 1 of UV*/ asr (2) g31.14<1>W g82.22<2,2,1>W 2W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x4UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A56UD {align1}; //g82.22,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x30UD {align1}; //jump to the lib to read reference data mov (16) g74.16<1>UW g32.0<8,8,1>UW {align1 compr}; mov (16) g76.16<1>UW g34.0<8,8,1>UW {align1 compr}; mov (16) g78.16<1>UW g36.0<8,8,1>UW {align1 compr}; mov (16) g80.16<1>UW g38.0<8,8,1>UW {align1 compr}; add (1) ip g21.0<1,1,1>UD 0x40UD {align1}; //jump to the lib to add the reference and idct data xf86-video-intel-2.99.917/xvmc/shader/mc/field_backward.g4b.gen50000664000175000017500000022003312400044327020721 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x40b10040, 0x02180203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00600001, 0x2e800021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00000001, 0x20280061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00080008 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23a00021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23e00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24200021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24600021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24a00021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24e00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25200021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25600021, 0x008d0ce0, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26700129, 0x008d0aa0, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x12082000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/motion_field_uv.g4i0000664000175000017500000000335012400044327020335 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ and.z (1) null mv1<1,1,1>UW 2UW {align1}; (f0) jmpi L1; and.z (1) null mv2<1,1,1>UW 2UW {align1}; (f0) jmpi L2; include(`read_field_x1y1_uv.g4i') jmpi L5; L2: include(`read_field_x1y0_uv.g4i') jmpi L5; L1: and.z (1) null mv2<1,1,1>UW 2UW {align1}; (f0) jmpi L4; include(`read_field_x0y1_uv.g4i') jmpi L5; L4: include(`read_field_x0y0_uv.g4i') L5: xf86-video-intel-2.99.917/xvmc/shader/mc/field_forward_igd.g4b0000664000175000017500000000652212400044327020602 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x2e700169, 0x00000000, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a56, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a56 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a56, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a56 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x1y0_y.g4i0000664000175000017500000001405712400044327020457 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g2.8<1>UD 0x007001FUD {align1}; send (16) 0 g98.0<1>UW g2<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; and (1) g2.24<1>UD g2.0<1,1,1>UD 3UD {align1}; mul(1) g2.24<1>UD g2.24<1,1,1>UD 17D {align1}; add (1) g2.4<1>UD g2.4<1,1,1>UD 8UD {align1}; send (16) 0 g106.0<1>UW g2<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; jmpi g2.24<1,1,1>D; avg.sat (16) g28.0<1>UW g98.0<16,16,1>UB g98.1<16,16,1>UB {align1}; avg.sat (16) g29.0<1>UW g99.0<16,16,1>UB g99.1<16,16,1>UB {align1}; avg.sat (16) g30.0<1>UW g100.0<16,16,1>UB g100.1<16,16,1>UB {align1}; avg.sat (16) g31.0<1>UW g101.0<16,16,1>UB g101.1<16,16,1>UB {align1}; avg.sat (16) g32.0<1>UW g102.0<16,16,1>UB g102.1<16,16,1>UB {align1}; avg.sat (16) g33.0<1>UW g103.0<16,16,1>UB g103.1<16,16,1>UB {align1}; avg.sat (16) g34.0<1>UW g104.0<16,16,1>UB g104.1<16,16,1>UB {align1}; avg.sat (16) g35.0<1>UW g105.0<16,16,1>UB g105.1<16,16,1>UB {align1}; avg.sat (16) g36.0<1>UW g106.0<16,16,1>UB g106.1<16,16,1>UB {align1}; avg.sat (16) g37.0<1>UW g107.0<16,16,1>UB g107.1<16,16,1>UB {align1}; avg.sat (16) g38.0<1>UW g108.0<16,16,1>UB g108.1<16,16,1>UB {align1}; avg.sat (16) g39.0<1>UW g109.0<16,16,1>UB g109.1<16,16,1>UB {align1}; avg.sat (16) g40.0<1>UW g110.0<16,16,1>UB g110.1<16,16,1>UB {align1}; avg.sat (16) g41.0<1>UW g111.0<16,16,1>UB g111.1<16,16,1>UB {align1}; avg.sat (16) g42.0<1>UW g112.0<16,16,1>UB g112.1<16,16,1>UB {align1}; avg.sat (16) g43.0<1>UW g113.0<16,16,1>UB g113.1<16,16,1>UB {align1}; jmpi out; avg.sat (16) g28.0<1>UW g98.1<16,16,1>UB g98.2<16,16,1>UB {align1}; avg.sat (16) g29.0<1>UW g99.1<16,16,1>UB g99.2<16,16,1>UB {align1}; avg.sat (16) g30.0<1>UW g100.1<16,16,1>UB g100.2<16,16,1>UB {align1}; avg.sat (16) g31.0<1>UW g101.1<16,16,1>UB g101.2<16,16,1>UB {align1}; avg.sat (16) g32.0<1>UW g102.1<16,16,1>UB g102.2<16,16,1>UB {align1}; avg.sat (16) g33.0<1>UW g103.1<16,16,1>UB g103.2<16,16,1>UB {align1}; avg.sat (16) g34.0<1>UW g104.1<16,16,1>UB g104.2<16,16,1>UB {align1}; avg.sat (16) g35.0<1>UW g105.1<16,16,1>UB g105.2<16,16,1>UB {align1}; avg.sat (16) g36.0<1>UW g106.1<16,16,1>UB g106.2<16,16,1>UB {align1}; avg.sat (16) g37.0<1>UW g107.1<16,16,1>UB g107.2<16,16,1>UB {align1}; avg.sat (16) g38.0<1>UW g108.1<16,16,1>UB g108.2<16,16,1>UB {align1}; avg.sat (16) g39.0<1>UW g109.1<16,16,1>UB g109.2<16,16,1>UB {align1}; avg.sat (16) g40.0<1>UW g110.1<16,16,1>UB g110.2<16,16,1>UB {align1}; avg.sat (16) g41.0<1>UW g111.1<16,16,1>UB g111.2<16,16,1>UB {align1}; avg.sat (16) g42.0<1>UW g112.1<16,16,1>UB g112.2<16,16,1>UB {align1}; avg.sat (16) g43.0<1>UW g113.1<16,16,1>UB g113.2<16,16,1>UB {align1}; jmpi out; avg.sat (16) g28.0<1>UW g98.2<16,16,1>UB g98.3<16,16,1>UB {align1}; avg.sat (16) g29.0<1>UW g99.2<16,16,1>UB g99.3<16,16,1>UB {align1}; avg.sat (16) g30.0<1>UW g100.2<16,16,1>UB g100.3<16,16,1>UB {align1}; avg.sat (16) g31.0<1>UW g101.2<16,16,1>UB g101.3<16,16,1>UB {align1}; avg.sat (16) g32.0<1>UW g102.2<16,16,1>UB g102.3<16,16,1>UB {align1}; avg.sat (16) g33.0<1>UW g103.2<16,16,1>UB g103.3<16,16,1>UB {align1}; avg.sat (16) g34.0<1>UW g104.2<16,16,1>UB g104.3<16,16,1>UB {align1}; avg.sat (16) g35.0<1>UW g105.2<16,16,1>UB g105.3<16,16,1>UB {align1}; avg.sat (16) g36.0<1>UW g106.2<16,16,1>UB g106.3<16,16,1>UB {align1}; avg.sat (16) g37.0<1>UW g107.2<16,16,1>UB g107.3<16,16,1>UB {align1}; avg.sat (16) g38.0<1>UW g108.2<16,16,1>UB g108.3<16,16,1>UB {align1}; avg.sat (16) g39.0<1>UW g109.2<16,16,1>UB g109.3<16,16,1>UB {align1}; avg.sat (16) g40.0<1>UW g110.2<16,16,1>UB g110.3<16,16,1>UB {align1}; avg.sat (16) g41.0<1>UW g111.2<16,16,1>UB g111.3<16,16,1>UB {align1}; avg.sat (16) g42.0<1>UW g112.2<16,16,1>UB g112.3<16,16,1>UB {align1}; avg.sat (16) g43.0<1>UW g113.2<16,16,1>UB g113.3<16,16,1>UB {align1}; jmpi out; avg.sat (16) g28.0<1>UW g98.3<16,16,1>UB g98.4<16,16,1>UB {align1}; avg.sat (16) g29.0<1>UW g99.3<16,16,1>UB g99.4<16,16,1>UB {align1}; avg.sat (16) g30.0<1>UW g100.3<16,16,1>UB g100.4<16,16,1>UB {align1}; avg.sat (16) g31.0<1>UW g101.3<16,16,1>UB g101.4<16,16,1>UB {align1}; avg.sat (16) g32.0<1>UW g102.3<16,16,1>UB g102.4<16,16,1>UB {align1}; avg.sat (16) g33.0<1>UW g103.3<16,16,1>UB g103.4<16,16,1>UB {align1}; avg.sat (16) g34.0<1>UW g104.3<16,16,1>UB g104.4<16,16,1>UB {align1}; avg.sat (16) g35.0<1>UW g105.3<16,16,1>UB g105.4<16,16,1>UB {align1}; avg.sat (16) g36.0<1>UW g106.3<16,16,1>UB g106.4<16,16,1>UB {align1}; avg.sat (16) g37.0<1>UW g107.3<16,16,1>UB g107.4<16,16,1>UB {align1}; avg.sat (16) g38.0<1>UW g108.3<16,16,1>UB g108.4<16,16,1>UB {align1}; avg.sat (16) g39.0<1>UW g109.3<16,16,1>UB g109.4<16,16,1>UB {align1}; avg.sat (16) g40.0<1>UW g110.3<16,16,1>UB g110.4<16,16,1>UB {align1}; avg.sat (16) g41.0<1>UW g111.3<16,16,1>UB g111.4<16,16,1>UB {align1}; avg.sat (16) g42.0<1>UW g112.3<16,16,1>UB g112.4<16,16,1>UB {align1}; avg.sat (16) g43.0<1>UW g113.3<16,16,1>UB g113.4<16,16,1>UB {align1}; out: xf86-video-intel-2.99.917/xvmc/shader/mc/Makefile.am0000664000175000017500000001116312400044327016603 00000000000000 INTEL_G4A = dual_prime_igd.g4a \ field_backward_igd.g4a \ field_f_b_igd.g4a \ field_forward_igd.g4a \ frame_backward_igd.g4a \ frame_f_b_igd.g4a \ frame_forward_igd.g4a \ dual_prime.g4a \ field_backward.g4a \ field_f_b.g4a \ field_forward.g4a \ frame_backward.g4a \ frame_f_b.g4a \ frame_forward.g4a \ lib_igd.g4a \ ipicture.g4a \ ipicture_igd.g4a \ null.g4a INTEL_G4I = addidct.g4i \ addidct_igd.g4i \ block_clear.g4i \ read_frame_x0y0_y.g4i \ read_frame_x0y1_y.g4i \ read_frame_x1y0_y.g4i \ read_frame_x1y1_y.g4i \ read_frame_x0y0_uv.g4i \ read_frame_x0y1_uv.g4i \ read_frame_x1y0_uv.g4i \ read_frame_x1y1_uv.g4i \ read_frame_x0y0_y_igd.g4i \ read_frame_x0y1_y_igd.g4i \ read_frame_x1y0_y_igd.g4i \ read_frame_x1y1_y_igd.g4i \ read_frame_x0y0_uv_igd.g4i \ read_frame_x0y1_uv_igd.g4i \ read_frame_x1y0_uv_igd.g4i \ read_frame_x1y1_uv_igd.g4i \ motion_frame_y.g4i \ motion_frame_uv.g4i \ read_field_x0y0_y.g4i \ read_field_x0y1_y.g4i \ read_field_x1y0_y.g4i \ read_field_x1y1_y.g4i \ read_field_x0y0_uv.g4i \ read_field_x0y1_uv.g4i \ read_field_x1y0_uv.g4i \ read_field_x1y1_uv.g4i \ read_field_x0y0_y_igd.g4i \ read_field_x0y1_y_igd.g4i \ read_field_x1y0_y_igd.g4i \ read_field_x1y1_y_igd.g4i \ read_field_x0y0_uv_igd.g4i \ read_field_x0y1_uv_igd.g4i \ read_field_x1y0_uv_igd.g4i \ read_field_x1y1_uv_igd.g4i \ motion_field_y.g4i \ motion_field_uv.g4i \ motion_field_uv_igd.g4i \ motion_field_y_igd.g4i \ motion_frame_uv_igd.g4i \ motion_frame_y_igd.g4i INTEL_G4B = dual_prime.g4b \ field_backward.g4b \ field_f_b.g4b \ field_forward.g4b \ frame_backward.g4b \ frame_f_b.g4b \ frame_forward.g4b \ dual_prime_igd.g4b \ field_backward_igd.g4b \ field_f_b_igd.g4b \ field_forward_igd.g4b \ frame_backward_igd.g4b \ frame_f_b_igd.g4b \ frame_forward_igd.g4b \ ipicture.g4b \ ipicture_igd.g4b \ lib_igd.g4b \ null.g4b INTEL_G4B_GEN5 = dual_prime.g4b.gen5 \ field_backward.g4b.gen5 \ field_f_b.g4b.gen5 \ field_forward.g4b.gen5 \ frame_backward.g4b.gen5 \ frame_f_b.g4b.gen5 \ frame_forward.g4b.gen5 \ dual_prime_igd.g4b.gen5 \ field_backward_igd.g4b.gen5 \ field_f_b_igd.g4b.gen5 \ field_forward_igd.g4b.gen5 \ frame_backward_igd.g4b.gen5 \ frame_f_b_igd.g4b.gen5 \ frame_forward_igd.g4b.gen5 \ ipicture.g4b.gen5 \ ipicture_igd.g4b.gen5 \ lib_igd.g4b.gen5 \ null.g4b.gen5 EXTRA_DIST = $(INTEL_G4A) \ $(INTEL_G4I) \ $(INTEL_G4B) \ $(INTEL_G4B_GEN5) if HAVE_GEN4ASM SUFFIXES = .g4a .g4b .g4a.g4b: $(AM_V_GEN)m4 -I$(srcdir) $(srcdir)/$*.g4a > $*.g4m && @INTEL_GEN4ASM@ -o $@ $*.g4m && @INTEL_GEN4ASM@ -g 5 -o $@.gen5 $*.g4m && rm $*.g4m $(INTEL_G4B): $(INTEL_GEN4ASM) $(INTEL_G4I) BUILT_SOURCES= $(INTEL_G4B) clean-local: -rm -f $(INTEL_G4B) -rm -f $(INTEL_G4B_GEN5) endif xf86-video-intel-2.99.917/xvmc/shader/mc/frame_f_b_igd.g4b0000664000175000017500000000536512400044327017677 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000000 }, { 0x00802001, 0x2d800021, 0x00b10740, 0x00000000 }, { 0x00802001, 0x2dc00021, 0x00b10780, 0x00000000 }, { 0x00802001, 0x2e000021, 0x00b107c0, 0x00000000 }, { 0x00802001, 0x2e400021, 0x00b10800, 0x00000000 }, { 0x00802001, 0x2e800021, 0x00b10840, 0x00000000 }, { 0x00802001, 0x2ec00021, 0x00b10880, 0x00000000 }, { 0x00802001, 0x2f000021, 0x00b108c0, 0x00000000 }, { 0x00802001, 0x2f400021, 0x00b10900, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00010001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000000 }, { 0x00a02042, 0x27402529, 0x00b10740, 0x00b10d80 }, { 0x00a02042, 0x27802529, 0x00b10780, 0x00b10dc0 }, { 0x00a02042, 0x27c02529, 0x00b107c0, 0x00b10e00 }, { 0x00a02042, 0x28002529, 0x00b10800, 0x00b10e40 }, { 0x00a02042, 0x28402529, 0x00b10840, 0x00b10e80 }, { 0x00a02042, 0x28802529, 0x00b10880, 0x00b10ec0 }, { 0x00a02042, 0x28c02529, 0x00b108c0, 0x00b10f00 }, { 0x00a02042, 0x29002529, 0x00b10900, 0x00b10f40 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000010 }, { 0x00a02001, 0x2d800129, 0x00b10940, 0x00000000 }, { 0x00a02001, 0x2dc00129, 0x00b10980, 0x00000000 }, { 0x00a02001, 0x2e000129, 0x00b109c0, 0x00000000 }, { 0x00a02001, 0x2e400129, 0x00b10a00, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00010001 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000010 }, { 0x00a02042, 0x29402529, 0x00b10940, 0x00b10d80 }, { 0x00a02042, 0x29802529, 0x00b10980, 0x00b10dc0 }, { 0x00a02042, 0x29c02529, 0x00b109c0, 0x00b10e00 }, { 0x00a02042, 0x2a002529, 0x00b10a00, 0x00b10e40 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x0y1_y_igd.g4i0000664000175000017500000000325612400044327021272 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x07001FUD {align1}; and.nz (1) null g115.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(4,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(4,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; mov (1) g115.8<1>UD 0x1FUD {align1}; send (16) 0 g56.0<1>UW g115<8,8,1>UW read(4,2,0,2) mlen 1 rlen 1 {align1}; jmpi put_data; read_backward: send (16) 0 g40.0<1>UW g115<8,8,1>UW read(7,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(7,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; mov (1) g115.8<1>UD 0x1FUD {align1}; send (16) 0 g56.0<1>UW g115<8,8,1>UW read(7,2,0,2) mlen 1 rlen 1 {align1}; put_data: avg (16) g32.0<1>UW g40.0<16,16,1>UB g42.0<16,16,1>UB {align1}; avg (16) g33.0<1>UW g42.0<16,16,1>UB g44.0<16,16,1>UB {align1}; avg (16) g34.0<1>UW g44.0<16,16,1>UB g46.0<16,16,1>UB {align1}; avg (16) g35.0<1>UW g46.0<16,16,1>UB g48.0<16,16,1>UB {align1}; avg (16) g36.0<1>UW g48.0<16,16,1>UB g50.0<16,16,1>UB {align1}; avg (16) g37.0<1>UW g50.0<16,16,1>UB g52.0<16,16,1>UB {align1}; avg (16) g38.0<1>UW g52.0<16,16,1>UB g54.0<16,16,1>UB {align1}; avg (16) g39.0<1>UW g54.0<16,16,1>UB g56.0<16,16,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/field_backward_igd.g4b.gen50000664000175000017500000000652212400044327021551 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x2e700169, 0x00000000, 0x00010001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a5a, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a5a }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a5a, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a5a }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/block_clear.g4i0000664000175000017500000001406512400044327017420 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * */ and.nz (1) null g2.0<1,1,1>UD 0x1UD{align1}; (f0) jmpi direct_idct; add (1) g2.8<1>UD g76.8<1,1,1>UD 0UD{align1}; send (16) 0 g3.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g4.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g5.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g6.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g7.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g8.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g9.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g10.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g11.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g12.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g13.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g14.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g15.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g16.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g17.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g18.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g19.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g20.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g21.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g22.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g23<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g24.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g25.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g26.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; direct_idct: and.nz (1) null g76.12<1,1,1>UW 0x20UW {align1}; (f0) jmpi next_block; mov (8) g3.0<1>UW 0UW {align1}; mov (8) g4.0<1>UW 0UW {align1}; mov (8) g5.0<1>UW 0UW {align1}; mov (8) g6.0<1>UW 0UW {align1}; mov (8) g7.0<1>UW 0UW {align1}; mov (8) g8.0<1>UW 0UW {align1}; mov (8) g9.0<1>UW 0UW {align1}; mov (8) g10.0<1>UW 0UW {align1}; next_block: and.nz (1) null g1.12<1,1,1>UW 0x10UW {align1}; (f0) jmpi next_field; mov (8) g3.16<1>UW 0UW {align1}; mov (8) g4.16<1>UW 0UW {align1}; mov (8) g5.16<1>UW 0UW {align1}; mov (8) g6.16<1>UW 0UW {align1}; mov (8) g7.16<1>UW 0UW {align1}; mov (8) g8.16<1>UW 0UW {align1}; mov (8) g9.16<1>UW 0UW {align1}; mov (8) g10.16<1>UW 0UW {align1}; next_field: and.nz (1) null g1.12<1,1,1>UW 0x8UW {align1}; (f0) jmpi next_field; mov (8) g11.0<1>UW 0UW {align1}; mov (8) g12.0<1>UW 0UW {align1}; mov (8) g13.0<1>UW 0UW {align1}; mov (8) g14.0<1>UW 0UW {align1}; mov (8) g15.0<1>UW 0UW {align1}; mov (8) g16.0<1>UW 0UW {align1}; mov (8) g17.0<1>UW 0UW {align1}; mov (8) g18.0<1>UW 0UW {align1}; next_field: and.nz (1) null g1.12<1,1,1>UW 0x4UW {align1}; (f0) jmpi next_field; mov (8) g11.16<1>UW 0UW {align1}; mov (8) g12.16<1>UW 0UW {align1}; mov (8) g13.16<1>UW 0UW {align1}; mov (8) g14.16<1>UW 0UW {align1}; mov (8) g15.16<1>UW 0UW {align1}; mov (8) g16.16<1>UW 0UW {align1}; mov (8) g17.16<1>UW 0UW {align1}; mov (8) g18.16<1>UW 0UW {align1}; next_field: and.nz (1) null g1.12<1,1,1>UW 0x2UW {align1}; (f0) jmpi next_field; mov (16) g19.0<1>UW 0UW {align1}; mov (16) g20.0<1>UW 0UW {align1}; mov (16) g21.0<1>UW 0UW {align1}; mov (16) g22.0<1>UW 0UW {align1}; next_field: and.nz (1) null g1.12<1,1,1>UW 0x1UW {align1}; (f0) jmpi next_field; mov (16) g23.0<1>UW 0UW {align1}; mov (16) g24.0<1>UW 0UW {align1}; mov (16) g25.0<1>UW 0UW {align1}; mov (16) g26.0<1>UW 0UW {align1}; next_field: xf86-video-intel-2.99.917/xvmc/shader/mc/frame_backward.g4b.gen50000664000175000017500000011472412400044327020741 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x40b10040, 0x02180203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00200001, 0x202e0129, 0x00450032, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x0020000c, 0x202e3dad, 0x00450e6e, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450e60, 0x0045002e }, { 0x01000005, 0x20000d3c, 0x00210e6e, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000256 }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000001bc }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000031 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x408d0040, 0x0218a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x00800040, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x00800040, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x00800040, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x00800040, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x00800040, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x00800040, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x00800040, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x00800040, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x00800040, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x00800040, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x00800040, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x00800040, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x00800040, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x00800040, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x00800040, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c60 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c80 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca0 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc0 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce0 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d00 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d20 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d40 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d60 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d80 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da0 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc0 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de0 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e00 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e20 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f00 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000124 }, { 0x00800040, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x00800040, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x00800040, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x00800040, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x00800040, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x00800040, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x00800040, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x00800040, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x00800040, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x00800040, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x00800040, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x00800040, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x00800040, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x00800040, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x00800040, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x00800040, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000c2 }, { 0x00800040, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x00800040, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x00800040, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x00800040, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x00800040, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x00800040, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x00800040, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x00800040, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x00800040, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x00800040, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x00800040, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x00800040, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x00800040, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x00800040, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x00800040, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x00800040, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000060 }, { 0x00800040, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x00800040, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x00800040, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x00800040, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x00800040, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x00800040, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x00800040, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x00800040, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x00800040, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x00800040, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x00800040, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x00800040, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x00800040, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x00800040, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x00800040, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x00800040, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c64 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c84 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca4 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc4 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce4 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d04 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d24 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d44 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d64 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d84 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da4 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc4 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de4 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e04 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e24 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f04 }, { 0x80800008, 0x23802d29, 0x00b10380, 0x00020002 }, { 0x80800008, 0x23a02d29, 0x00b103a0, 0x00020002 }, { 0x80800008, 0x23c02d29, 0x00b103c0, 0x00020002 }, { 0x80800008, 0x23e02d29, 0x00b103e0, 0x00020002 }, { 0x80800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x80800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x80800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x80800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x80800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x80800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x80800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x80800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x80800008, 0x25002d29, 0x00b10500, 0x00020002 }, { 0x80800008, 0x25202d29, 0x00b10520, 0x00020002 }, { 0x80800008, 0x25402d29, 0x00b10540, 0x00020002 }, { 0x80800008, 0x25602d29, 0x00b10560, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000001ca }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20581c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x408d0040, 0x0218a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c60 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c80 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10ca0 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10cc0 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10ce0 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10d00 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d20 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d40 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d60 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d80 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10da0 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10dc0 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10de0 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10e00 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e20 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10f00 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c61 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c81 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10ca1 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10cc1 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10ce1 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10d01 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d21 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d41 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d61 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d81 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10da1 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10dc1 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10de1 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10e01 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e21 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c62 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c82 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10ca2 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10cc2 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10ce2 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10d02 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d22 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d42 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d62 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d82 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10da2 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10dc2 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10de2 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10e02 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e22 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c63 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c83 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10ca3 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10cc3 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10ce3 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10d03 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d23 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d43 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d63 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d83 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10da3 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10dc3 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10de3 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10e03 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e23 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x23800229, 0x00b10c40, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c60, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c80, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca0, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc0, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce0, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d00, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d20, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d40, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d60, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d80, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da0, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc0, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de0, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e00, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e20, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x00800001, 0x23800229, 0x00b10c41, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c61, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c81, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca1, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc1, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce1, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d01, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d21, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d41, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d61, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d81, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da1, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc1, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de1, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e01, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e21, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x00800001, 0x23800229, 0x00b10c42, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c62, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c82, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca2, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc2, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce2, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d02, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d22, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d42, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d62, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d82, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da2, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc2, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de2, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e02, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e22, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800001, 0x23800229, 0x00b10c43, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c63, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c83, 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0x00800031, 0x20601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 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}, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00200001, 0x202e0129, 0x00450032, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x0020000c, 0x202e3dad, 0x00450e6e, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450e60, 0x0045002e }, { 0x01000005, 0x20000d3c, 0x00210e6e, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000012b }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000de }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000031 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x008d0040, 0x0411a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x00800040, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x00800040, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x00800040, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x00800040, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x00800040, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x00800040, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x00800040, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x00800040, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x00800040, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x00800040, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x00800040, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x00800040, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x00800040, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x00800040, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x00800040, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c60 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c80 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca0 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc0 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce0 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d00 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d20 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d40 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d60 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d80 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da0 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc0 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de0 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e00 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e20 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f00 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000092 }, { 0x00800040, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x00800040, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x00800040, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x00800040, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x00800040, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x00800040, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x00800040, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x00800040, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x00800040, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x00800040, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x00800040, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x00800040, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x00800040, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x00800040, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x00800040, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x00800040, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000061 }, { 0x00800040, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x00800040, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x00800040, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x00800040, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x00800040, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x00800040, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x00800040, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x00800040, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x00800040, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x00800040, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x00800040, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x00800040, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x00800040, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x00800040, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x00800040, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x00800040, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x00800040, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x00800040, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x00800040, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x00800040, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x00800040, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x00800040, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x00800040, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x00800040, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x00800040, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x00800040, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x00800040, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x00800040, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x00800040, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x00800040, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x00800040, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c64 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c84 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca4 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc4 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce4 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d04 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d24 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d44 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d64 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d84 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da4 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc4 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de4 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e04 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e24 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f04 }, { 0x80800008, 0x23802d29, 0x00b10380, 0x00020002 }, { 0x80800008, 0x23a02d29, 0x00b103a0, 0x00020002 }, { 0x80800008, 0x23c02d29, 0x00b103c0, 0x00020002 }, { 0x80800008, 0x23e02d29, 0x00b103e0, 0x00020002 }, { 0x80800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x80800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x80800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x80800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x80800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x80800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x80800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x80800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x80800008, 0x25002d29, 0x00b10500, 0x00020002 }, { 0x80800008, 0x25202d29, 0x00b10520, 0x00020002 }, { 0x80800008, 0x25402d29, 0x00b10540, 0x00020002 }, { 0x80800008, 0x25602d29, 0x00b10560, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000e5 }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20581c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x008d0040, 0x0411a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c60 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c80 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10ca0 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10cc0 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10ce0 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10d00 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d20 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d40 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d60 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d80 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10da0 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10dc0 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10de0 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10e00 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e20 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10f00 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c61 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c81 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10ca1 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10cc1 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10ce1 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10d01 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d21 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d41 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d61 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d81 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10da1 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10dc1 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10de1 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10e01 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e21 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c62 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c82 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10ca2 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10cc2 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10ce2 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10d02 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d22 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d42 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d62 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d82 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10da2 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10dc2 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10de2 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10e02 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e22 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c63 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c83 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10ca3 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10cc3 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10ce3 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10d03 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d23 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d43 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d63 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d83 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10da3 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10dc3 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10de3 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10e03 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e23 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x23800229, 0x00b10c40, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c60, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c80, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca0, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc0, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce0, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d00, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d20, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d40, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d60, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d80, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da0, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc0, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de0, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e00, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e20, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00800001, 0x23800229, 0x00b10c41, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c61, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c81, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca1, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc1, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce1, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d01, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d21, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d41, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d61, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d81, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da1, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc1, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de1, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e01, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e21, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x00800001, 0x23800229, 0x00b10c42, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c62, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c82, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca2, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc2, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce2, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d02, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d22, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d42, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d62, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d82, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da2, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc2, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de2, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e02, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e22, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x23800229, 0x00b10c43, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c63, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c83, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca3, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc3, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce3, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d03, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d23, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d43, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d63, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d83, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da3, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc3, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de3, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e03, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e23, 0x00000000 }, { 0x00200008, 0x20200c21, 0x00450e60, 0x00000001 }, { 0x0020000c, 0x2e6e3dad, 0x00450e6e, 0x00010001 }, { 0x0020000c, 0x202e3dad, 0x00450e6e, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450020, 0x0045002e }, { 0x00000001, 0x20480061, 0x00000000, 0x0007000f }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00800031, 0x2ac01d29, 0x008d0040, 0x0414a008 }, { 0x00800031, 0x2b401d29, 0x008d0040, 0x0414a009 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x25800229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b40, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x25800229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b41, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x25800229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b42, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x25800229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b43, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba3, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05902000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/null.g4a0000664000175000017500000000453312400044327016121 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * */ mov (8) g3.0<1>UD g1.0<8,8,1>UD {align1}; mov (16) g8.0<1>UD 0xFFFFFFFFUD {align1 compr}; mov(1) g1.8<1>UD 0x0070007UD { align1 }; mov (16) m1<1>UD g8.0<8,8,1>UD {align1 compr}; /*Write 8x8 block to (x,y)*/ send (16) 0 acc0<1>UW g1<8,8,1>UW write(0, 0, 2, 0) mlen 3 rlen 0 { align1 }; add (1) g1.0<1>UD g3.0<1,1,1>UD 0x8UD {align1}; /*Write 8x8 block to (x+8,y)*/ send (16) 0 acc0<1>UW g1<8,8,1>UW write(0, 0, 2, 0) mlen 3 rlen 0 { align1 }; add (1) g1.4<1>UD g3.4<1,1,1>UD 0x8UD {align1}; /*Write 8x8 block to (x+8,y+8)*/ send (16) 0 acc0<1>UW g1<8,8,1>UW write(0, 0, 2, 0) mlen 3 rlen 0 { align1 }; mov (1) g1.0<1>UD g3.0<1,1,1>UD {align1}; /*Write 8x8 block to (x,y+8)*/ send (16) 0 acc0<1>UW g1<8,8,1>UW write(0, 0, 2, 0) mlen 3 rlen 0 { align1 }; /*Fill U buffer & V buffer with 0x7F*/ mov (16) m1<1>UD 0x7f7f7f7fUD {align1 compr}; shr (1) g1.0<1>UD g3.0<1,1,1>UD 1D {align1}; shr (1) g1.4<1>UD g3.4<1,1,1>UD 1D {align1}; send (16) 0 acc0<1>UW g1<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g1<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/dual_prime.g4b0000664000175000017500000041303212400044327017267 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x00b10040, 0x04110203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00600001, 0x2e800021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021002e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000b1 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000007d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x26800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000e3c, 0x0021003f, 0x00000004 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210036, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000b1 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000007d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x26a00021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26e00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27200021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0ce0, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021002e, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x28800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x28900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0aa0, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0e80, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00000001, 0x20280061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000b1 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000007d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000c3c, 0x00210054, 0x00000008 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000b1 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000007d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x80800042, 0x23802529, 0x00b10680, 0x00b10380 }, { 0x80800042, 0x23a02529, 0x00b106a0, 0x00b10c00 }, { 0x80800042, 0x23c02529, 0x00b106c0, 0x00b103c0 }, { 0x80800042, 0x23e02529, 0x00b106e0, 0x00b10c20 }, { 0x80800042, 0x24002529, 0x00b10700, 0x00b10400 }, { 0x80800042, 0x24202529, 0x00b10720, 0x00b10c40 }, { 0x80800042, 0x24402529, 0x00b10740, 0x00b10440 }, { 0x80800042, 0x24602529, 0x00b10760, 0x00b10c60 }, { 0x80800042, 0x24802529, 0x00b10780, 0x00b10480 }, { 0x80800042, 0x24a02529, 0x00b107a0, 0x00b10c80 }, { 0x80800042, 0x24c02529, 0x00b107c0, 0x00b104c0 }, { 0x80800042, 0x24e02529, 0x00b107e0, 0x00b10ca0 }, { 0x80800042, 0x25002529, 0x00b10800, 0x00b10500 }, { 0x80800042, 0x25202529, 0x00b10820, 0x00b10cc0 }, { 0x80800042, 0x25402529, 0x00b10840, 0x00b10540 }, { 0x80800042, 0x25602529, 0x00b10860, 0x00b10ce0 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26700129, 0x008d0aa0, 0x00000000 }, { 0x80800042, 0x25802529, 0x00b10880, 0x00b10580 }, { 0x80800042, 0x25a02529, 0x00b108a0, 0x00b105a0 }, { 0x80800042, 0x25c02529, 0x00b108c0, 0x00b105c0 }, { 0x80800042, 0x25e02529, 0x00b108e0, 0x00b105e0 }, { 0x80800042, 0x26002529, 0x00b10900, 0x00b10600 }, { 0x80800042, 0x26202529, 0x00b10920, 0x00b10620 }, { 0x80800042, 0x26402529, 0x00b10940, 0x00b10640 }, { 0x80800042, 0x26602529, 0x00b10960, 0x00b10660 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05902000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/ipicture_igd.g4b0000664000175000017500000001003512400044327017611 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x80800001, 0x458001b1, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a001b1, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c001b1, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e001b1, 0x00b105e0, 0x00000000 }, { 0x80800001, 0x460001b1, 0x00b10600, 0x00000000 }, { 0x80800001, 0x462001b1, 0x00b10620, 0x00000000 }, { 0x80800001, 0x464001b1, 0x00b10640, 0x00000000 }, { 0x80800001, 0x466001b1, 0x00b10660, 0x00000000 }, { 0x80800001, 0x468001b1, 0x00b10680, 0x00000000 }, { 0x80800001, 0x46a001b1, 0x00b106a0, 0x00000000 }, { 0x80800001, 0x46c001b1, 0x00b106c0, 0x00000000 }, { 0x80800001, 0x46e001b1, 0x00b106e0, 0x00000000 }, { 0x80800001, 0x470001b1, 0x00b10700, 0x00000000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x02000005, 0x20002e3c, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x20200232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20560, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b205e0, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20600, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x20200232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20560, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b205e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20600, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x00450a40, 0x00000001 }, { 0x00800001, 0x20200232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20660, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20680, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, { 0x00800001, 0x20200232, 0x00b206a0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b206c0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b206e0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20700, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/ipicture.g4b.gen50000664000175000017500000001533312400044327017631 00000000000000 { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, { 0x00000040, 0x20480c21, 0x00210e68, 0x00000000 }, { 0x00800031, 0x20601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x40b10040, 0x02180203 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x406001b1, 0x00b10060, 0x00000000 }, { 0x80800001, 0x408001b1, 0x00b10080, 0x00000000 }, { 0x80800001, 0x40a001b1, 0x00b100a0, 0x00000000 }, { 0x80800001, 0x40c001b1, 0x00b100c0, 0x00000000 }, { 0x80800001, 0x40e001b1, 0x00b100e0, 0x00000000 }, { 0x80800001, 0x410001b1, 0x00b10100, 0x00000000 }, { 0x80800001, 0x412001b1, 0x00b10120, 0x00000000 }, { 0x80800001, 0x414001b1, 0x00b10140, 0x00000000 }, { 0x80800001, 0x416001b1, 0x00b10160, 0x00000000 }, { 0x80800001, 0x418001b1, 0x00b10180, 0x00000000 }, { 0x80800001, 0x41a001b1, 0x00b101a0, 0x00000000 }, { 0x80800001, 0x41c001b1, 0x00b101c0, 0x00000000 }, { 0x80800001, 0x41e001b1, 0x00b101e0, 0x00000000 }, { 0x80800001, 0x420001b1, 0x00b10200, 0x00000000 }, { 0x80800001, 0x422001b1, 0x00b10220, 0x00000000 }, { 0x80800001, 0x424001b1, 0x00b10240, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x20200232, 0x00b20060, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20080, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b200a0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b200c0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b200e0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20100, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20120, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20140, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20160, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20180, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b201a0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b201c0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b201e0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20200, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20220, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20240, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800001, 0x20200232, 0x00b20060, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20160, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20080, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20180, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b200a0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b201a0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b200c0, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b201c0, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b200e0, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b201e0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20100, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b20200, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20120, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20220, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20140, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20240, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x12082000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450e60, 0x00000001 }, { 0x80800001, 0x426001b1, 0x00b10260, 0x00000000 }, { 0x80800001, 0x428001b1, 0x00b10280, 0x00000000 }, { 0x80800001, 0x42a001b1, 0x00b102a0, 0x00000000 }, { 0x80800001, 0x42c001b1, 0x00b102c0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20260, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20280, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b202a0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b202c0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082001 }, { 0x80800001, 0x42e001b1, 0x00b102e0, 0x00000000 }, { 0x80800001, 0x430001b1, 0x00b10300, 0x00000000 }, { 0x80800001, 0x432001b1, 0x00b10320, 0x00000000 }, { 0x80800001, 0x434001b1, 0x00b10340, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b202e0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20300, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20320, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20340, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/frame_f_b_igd.g4a0000664000175000017500000001060112400044327017663 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ /* mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; define(`UV_red',`0xffffffffUD') define(`UV_white',`0x7f7f7f7fUD') define(`UV_green',`0x00000000UD') mov(1) g31.8<1>UD 0x000f000fUD { align1 }; mov(16) m1<1>UD 0xFFFFFFFFUD {align1 compr}; mov(16) m3<1>UD 0xFFFFFFFFUD {align1 compr}; mov(16) m5<1>UD 0xFFFFFFFFUD {align1 compr}; mov(16) m7<1>UD 0xFFFFFFFFUD {align1 compr}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(0, 0, 2, 0) mlen 9 rlen 0 { align1 }; shr (2) g31.0<1>UD g82.0<2,2,1>UD 1UW {align1}; mov(1) g31.8<1>UD 0x00070007UD { align1 }; mov (16) m1<1>UD UV_green {align1 compr}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g31<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x50UD {align1}; //jump to the lib to do IDCT //Y, Forward asr (2) g31.14<1>W g82.14<2,2,1>W 1W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; mov (1) g32.16<1>UW 0UW {align1}; //0:forward 1:backward mov (1) a0.0<1>UD 0x0A4EUD {align1}; //g82.14,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x0UD {align1}; //jump to the lib to read reference data //Save Forward mov (16) g108.0<1>UD g58.0<16,16,1>UD {align1 compr}; mov (16) g110.0<1>UD g60.0<16,16,1>UD {align1 compr}; mov (16) g112.0<1>UD g62.0<16,16,1>UD {align1 compr}; mov (16) g114.0<1>UD g64.0<16,16,1>UD {align1 compr}; mov (16) g116.0<1>UD g66.0<16,16,1>UD {align1 compr}; mov (16) g118.0<1>UD g68.0<16,16,1>UD {align1 compr}; mov (16) g120.0<1>UD g70.0<16,16,1>UD {align1 compr}; mov (16) g122.0<1>UD g72.0<16,16,1>UD {align1 compr}; //Y, Backward asr (2) g31.14<1>W g82.18<2,2,1>W 1W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; mov (1) g32.16<1>UW 1UW {align1}; //0:forward 1:backward mov (1) a0.0<1>UD 0x0A52UD {align1}; //g82.18,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x0UD {align1}; //jump to the lib to read reference data //Average Forward and Backward avg (32) g58.0<1>UW g58.0<16,16,1>UW g108.0<16,16,1>UW {align1 compr}; avg (32) g60.0<1>UW g60.0<16,16,1>UW g110.0<16,16,1>UW {align1 compr}; avg (32) g62.0<1>UW g62.0<16,16,1>UW g112.0<16,16,1>UW {align1 compr}; avg (32) g64.0<1>UW g64.0<16,16,1>UW g114.0<16,16,1>UW {align1 compr}; avg (32) g66.0<1>UW g66.0<16,16,1>UW g116.0<16,16,1>UW {align1 compr}; avg (32) g68.0<1>UW g68.0<16,16,1>UW g118.0<16,16,1>UW {align1 compr}; avg (32) g70.0<1>UW g70.0<16,16,1>UW g120.0<16,16,1>UW {align1 compr}; avg (32) g72.0<1>UW g72.0<16,16,1>UW g122.0<16,16,1>UW {align1 compr}; //UV, Forward shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g31.14<1>W g82.14<2,2,1>W 2W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; mov (1) g32.16<1>UW 0UW {align1}; //0:forward 1:backward mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x10UD {align1}; //jump to the lib to read reference data //Save UV Forward mov (32) g108.0<1>UW g74.0<16,16,1>UW {align1 compr}; mov (32) g110.0<1>UW g76.0<16,16,1>UW {align1 compr}; mov (32) g112.0<1>UW g78.0<16,16,1>UW {align1 compr}; mov (32) g114.0<1>UW g80.0<16,16,1>UW {align1 compr}; //UV, Backward asr (2) g31.14<1>W g82.18<2,2,1>W 2W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; mov (1) g32.16<1>UW 1UW {align1}; //0:forward 1:backward mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x10UD {align1}; //jump to the lib to read reference data //Average Forward and Backward avg (32) g74.0<1>UW g74.0<16,16,1>UW g108.0<16,16,1>UW {align1 compr}; avg (32) g76.0<1>UW g76.0<16,16,1>UW g110.0<16,16,1>UW {align1 compr}; avg (32) g78.0<1>UW g78.0<16,16,1>UW g112.0<16,16,1>UW {align1 compr}; avg (32) g80.0<1>UW g80.0<16,16,1>UW g114.0<16,16,1>UW {align1 compr}; add (1) ip g21.0<1,1,1>UD 0x40UD {align1}; //jump to the lib to add the reference and idct data xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x1y0_uv.g4i0000664000175000017500000000734312400044327020632 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g115.8<1>UD 0x07000FUD {align1}; // 8*16/32=4 send (16) 0 g86.0<1>UW g115<16,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g91.0<1>UW g115<16,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V and (1) g2.24<1>UD g115.0<1,1,1>UD 3UD {align1}; mul (1) g2.24<1>UD g2.24<1,1,1>UD 9UD {align1}; jmpi g2.24<1,1,1>D; avg.sat (16) g78.0<1>UW g86.0<16,8,1>UB g86.1<16,8,1>UB {align1}; avg.sat (16) g79.0<1>UW g87.0<16,8,1>UB g87.1<16,8,1>UB {align1}; avg.sat (16) g80.0<1>UW g88.0<16,8,1>UB g88.1<16,8,1>UB {align1}; avg.sat (16) g81.0<1>UW g89.0<16,8,1>UB g89.1<16,8,1>UB {align1}; avg.sat (16) g82.0<1>UW g91.0<16,8,1>UB g91.1<16,8,1>UB {align1}; avg.sat (16) g83.0<1>UW g92.0<16,8,1>UB g92.1<16,8,1>UB {align1}; avg.sat (16) g84.0<1>UW g93.0<16,8,1>UB g93.1<16,8,1>UB {align1}; avg.sat (16) g85.0<1>UW g94.0<16,8,1>UB g94.1<16,8,1>UB {align1}; jmpi out; avg.sat (16) g78.0<1>UW g86.1<16,8,1>UB g86.2<16,8,1>UB {align1}; avg.sat (16) g79.0<1>UW g87.1<16,8,1>UB g87.2<16,8,1>UB {align1}; avg.sat (16) g80.0<1>UW g88.1<16,8,1>UB g88.2<16,8,1>UB {align1}; avg.sat (16) g81.0<1>UW g89.1<16,8,1>UB g89.2<16,8,1>UB {align1}; avg.sat (16) g82.0<1>UW g91.1<16,8,1>UB g91.2<16,8,1>UB {align1}; avg.sat (16) g83.0<1>UW g92.1<16,8,1>UB g92.2<16,8,1>UB {align1}; avg.sat (16) g84.0<1>UW g93.1<16,8,1>UB g93.2<16,8,1>UB {align1}; avg.sat (16) g85.0<1>UW g94.1<16,8,1>UB g94.2<16,8,1>UB {align1}; jmpi out; avg.sat (16) g78.0<1>UW g86.2<16,8,1>UB g86.3<16,8,1>UB {align1}; avg.sat (16) g79.0<1>UW g87.2<16,8,1>UB g87.3<16,8,1>UB {align1}; avg.sat (16) g80.0<1>UW g88.2<16,8,1>UB g88.3<16,8,1>UB {align1}; avg.sat (16) g81.0<1>UW g89.2<16,8,1>UB g89.3<16,8,1>UB {align1}; avg.sat (16) g82.0<1>UW g91.2<16,8,1>UB g91.3<16,8,1>UB {align1}; avg.sat (16) g83.0<1>UW g92.2<16,8,1>UB g92.3<16,8,1>UB {align1}; avg.sat (16) g84.0<1>UW g93.2<16,8,1>UB g93.3<16,8,1>UB {align1}; avg.sat (16) g85.0<1>UW g94.2<16,8,1>UB g94.3<16,8,1>UB {align1}; jmpi out; avg.sat (16) g78.0<1>UW g86.3<16,8,1>UB g86.4<16,8,1>UB {align1}; avg.sat (16) g79.0<1>UW g87.3<16,8,1>UB g87.4<16,8,1>UB {align1}; avg.sat (16) g80.0<1>UW g88.3<16,8,1>UB g88.4<16,8,1>UB {align1}; avg.sat (16) g81.0<1>UW g89.3<16,8,1>UB g89.4<16,8,1>UB {align1}; avg.sat (16) g82.0<1>UW g91.3<16,8,1>UB g91.4<16,8,1>UB {align1}; avg.sat (16) g83.0<1>UW g92.3<16,8,1>UB g92.4<16,8,1>UB {align1}; avg.sat (16) g84.0<1>UW g93.3<16,8,1>UB g93.4<16,8,1>UB {align1}; avg.sat (16) g85.0<1>UW g94.3<16,8,1>UB g94.4<16,8,1>UB {align1}; out: xf86-video-intel-2.99.917/xvmc/shader/mc/frame_forward.g4b.gen50000664000175000017500000011463512400044327020630 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x40b10040, 0x02180203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x0020000c, 0x202e3dad, 0x00450e6e, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450e60, 0x0045002e }, { 0x01000005, 0x20000d3c, 0x00210e6e, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000256 }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000001bc }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000031 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a004 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x408d0040, 0x0218a004 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x00800040, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x00800040, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x00800040, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x00800040, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x00800040, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x00800040, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x00800040, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x00800040, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x00800040, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x00800040, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x00800040, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x00800040, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x00800040, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x00800040, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x00800040, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c60 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c80 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca0 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc0 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce0 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d00 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d20 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d40 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d60 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d80 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da0 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc0 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de0 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e00 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e20 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f00 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000124 }, { 0x00800040, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x00800040, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x00800040, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 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0x80800042, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a004 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x408d0040, 0x0218a004 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c60 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c80 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10ca0 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10cc0 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10ce0 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10d00 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d20 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d40 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d60 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d80 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10da0 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10dc0 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10de0 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10e00 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e20 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10f00 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c61 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c81 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10ca1 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10cc1 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10ce1 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10d01 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d21 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d41 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d61 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d81 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10da1 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10dc1 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10de1 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10e01 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e21 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c62 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c82 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10ca2 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10cc2 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10ce2 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10d02 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d22 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d42 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d62 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d82 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10da2 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10dc2 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10de2 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10e02 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e22 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c63 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c83 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10ca3 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10cc3 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10ce3 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10d03 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d23 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d43 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d63 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d83 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10da3 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10dc3 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10de3 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10e03 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e23 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a004 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x23800229, 0x00b10c40, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c60, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c80, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca0, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc0, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce0, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d00, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d20, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d40, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d60, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d80, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da0, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc0, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de0, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e00, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e20, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x00800001, 0x23800229, 0x00b10c41, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c61, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c81, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca1, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc1, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce1, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d01, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d21, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d41, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d61, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d81, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da1, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc1, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de1, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e01, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e21, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x00800001, 0x23800229, 0x00b10c42, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c62, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c82, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca2, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc2, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce2, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d02, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d22, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d42, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d62, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d82, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da2, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc2, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de2, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e02, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e22, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800001, 0x23800229, 0x00b10c43, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c63, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c83, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca3, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc3, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce3, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d03, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d23, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d43, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d63, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d83, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da3, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc3, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de3, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e03, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e23, 0x00000000 }, { 0x00200008, 0x20200c21, 0x00450e60, 0x00000001 }, { 0x0020000c, 0x2e6e3dad, 0x00450e6e, 0x00010001 }, { 0x0020000c, 0x202e3dad, 0x00450e6e, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450020, 0x0045002e }, { 0x00000001, 0x20480061, 0x00000000, 0x0007000f }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00800031, 0x2ac01d29, 0x408d0040, 0x0248a005 }, { 0x00800031, 0x2b401d29, 0x408d0040, 0x0248a006 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x25800229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b40, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x25800229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b41, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x25800229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b42, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x25800229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b43, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba3, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x12082000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x1y0_y_igd.g4i0000664000175000017500000000255112400044327021267 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x07001FUD {align1}; and.nz (1) null g115.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(4,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(4,2,0,2) mlen 1 rlen 8 {align1}; jmpi put_data; read_backward: send (16) 0 g40.0<1>UW g115<8,8,1>UW read(7,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(7,2,0,2) mlen 1 rlen 8 {align1}; put_data: avg (16) g32.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; avg (16) g33.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; avg (16) g34.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; avg (16) g35.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; avg (16) g36.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; avg (16) g37.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; avg (16) g38.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; avg (16) g39.0<1>UW g54.0<16,16,1>UB g54.1<16,16,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/ipicture_igd.g4a0000664000175000017500000000765612400044327017627 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT tab g31: read and write message descriptor g32~g55:DCT data g58~g81:reference data g82: thread payload g83~g106:IDCT data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov.sat (16) g33.0<2>UB g33.0<16,16,1>W {align1}; mov.sat (16) g34.0<2>UB g34.0<16,16,1>W {align1}; mov.sat (16) g35.0<2>UB g35.0<16,16,1>W {align1}; mov.sat (16) g36.0<2>UB g36.0<16,16,1>W {align1}; mov.sat (16) g37.0<2>UB g37.0<16,16,1>W {align1}; mov.sat (16) g38.0<2>UB g38.0<16,16,1>W {align1}; mov.sat (16) g39.0<2>UB g39.0<16,16,1>W {align1}; mov.sat (16) g40.0<2>UB g40.0<16,16,1>W {align1}; mov.sat (16) g41.0<2>UB g41.0<16,16,1>W {align1}; mov.sat (16) g42.0<2>UB g42.0<16,16,1>W {align1}; mov.sat (16) g43.0<2>UB g43.0<16,16,1>W {align1}; mov.sat (16) g44.0<2>UB g44.0<16,16,1>W {align1}; mov.sat (16) g45.0<2>UB g45.0<16,16,1>W {align1}; mov.sat (16) g46.0<2>UB g46.0<16,16,1>W {align1}; mov.sat (16) g47.0<2>UB g47.0<16,16,1>W {align1}; mov.sat (16) g48.0<2>UB g48.0<16,16,1>W {align1}; mov.sat (16) g49.0<2>UB g49.0<16,16,1>W {align1}; mov.sat (16) g50.0<2>UB g50.0<16,16,1>W {align1}; mov.sat (16) g51.0<2>UB g51.0<16,16,1>W {align1}; mov.sat (16) g52.0<2>UB g52.0<16,16,1>W {align1}; mov.sat (16) g53.0<2>UB g53.0<16,16,1>W {align1}; mov.sat (16) g54.0<2>UB g54.0<16,16,1>W {align1}; mov.sat (16) g55.0<2>UB g55.0<16,16,1>W {align1}; mov.sat (16) g56.0<2>UB g56.0<16,16,1>W {align1}; mov (1) g31.8<1>UD 0x00F000FUD {align1}; and.nz (1) null g82.30<1,1,1>UB 0x1UW{align1}; (f0) jmpi field_dct_y; mov (16) m1.0<1>UB g33.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g34.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g35.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g36.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g37.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g38.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g39.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g40.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g41.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g42.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g43.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g44.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g45.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g46.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g47.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g48.0<16,16,2>UB {align1}; jmpi write_back_y; field_dct_y: mov (16) m1.0<1>UB g33.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g41.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g34.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g42.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g35.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g43.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g36.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g44.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g37.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g45.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g38.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g46.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g39.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g47.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g40.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g48.0<16,16,2>UB {align1}; write_back_y: send (16) 0 acc0<1>UW g31<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; //U mov (1) g31.8<1>UD 0x0070007UD { align1 }; shr (2) g31.0<1>UD g82.0<2,2,1>UD 1D {align1}; mov (16) m1.0<1>UB g49.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g50.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g51.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g52.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; //V mov (16) m1.0<1>UB g53.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g54.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g55.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g56.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; OUT: send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x1y0_uv_igd.g4i0000664000175000017500000000400012400044327021447 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g2.8<1>UD 0x007000FUD {align1}; send (16) 0 g86.0<1>UW g2<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 4 {align1}; send (16) 0 g90.0<1>UW g2<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 4 {align1}; avg.sat (16) g44.0<1>UW g86.0<16,8,1>UB g86.1<16,8,1>UB{align1}; avg.sat (16) g45.0<1>UW g87.0<16,8,1>UB g87.1<16,8,1>UB{align1}; avg.sat (16) g46.0<1>UW g88.0<16,8,1>UB g88.1<16,8,1>UB{align1}; avg.sat (16) g47.0<1>UW g89.0<16,8,1>UB g89.1<16,8,1>UB{align1}; avg.sat (16) g48.0<1>UW g90.0<16,8,1>UB g90.1<16,8,1>UB{align1}; avg.sat (16) g49.0<1>UW g91.0<16,8,1>UB g91.1<16,8,1>UB{align1}; avg.sat (16) g50.0<1>UW g92.0<16,8,1>UB g92.1<16,8,1>UB{align1}; avg.sat (16) g51.0<1>UW g93.0<16,8,1>UB g93.1<16,8,1>UB{align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/field_forward.g4a0000664000175000017500000001153712400044327017760 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (8) g76.0<1>UD g1.0<8,8,1>UD {align1}; //mov (8) g77.0<1>UD g2.0<8,8,1>UD {align1}; include(`block_clear.g4i') mov (8) g115.0<1>UD g1.0<8,8,1>UD {align1}; mov (8) g116.0<1>UD g1.0<8,8,1>UD {align1}; /*Y buffer*/ mov(1) g1.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.14<2,2,1>W 1UW {align1}; add (2) g115.0<1>UD g116.0<2,2,1>UD g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov (1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. /*first vector*/ and.nz (1) null g1.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`4') define(`mv1',`g1.14') define(`mv2',`g1.16') include(`motion_field_y.g4i') mov (8) g28.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g30.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g32.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g34.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g36.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g38.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g40.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g42.0<1>UD g103.0<8,8,1>UD {align1}; /*second vector*/ asr (2) g115.14<1>W g1.22<2,2,1>W 1UW {align1}; add (2) g115.0<1>UD g116.0<2,2,1>UD g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov (1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x4UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface',`4') define(`mv1',`g1.22') define(`mv2',`g1.24') include(`motion_field_y.g4i') mov (8) g29.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g31.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g33.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g35.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g37.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g39.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g41.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g43.0<1>UD g103.0<8,8,1>UD {align1}; /*U buffer, V buffer*/ /*first vector*/ mov(1) g115.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.14<2,2,1>W 2UW {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u',`5') define(`surface_v',`6') define(`mv1',`g1.14') define(`mv2',`g1.16') include(`motion_field_uv.g4i') mov (8) g44.0<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.0<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.0<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.0<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.0<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.0<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.0<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.0<1>UW g85.0<8,8,1>UW {align1}; /*second vector*/ asr (2) g115.14<1>W g1.22<2,2,1>W 2UW {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x4UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g1.22') define(`mv2',`g1.24') include(`motion_field_uv.g4i') mov (8) g44.16<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.16<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.16<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.16<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.16<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.16<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.16<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.16<1>UW g85.0<8,8,1>UW {align1}; include(`addidct.g4i') //send (16) 0 acc0<1>UW g0<8,8,1>UW // thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/ipicture.g4a0000664000175000017500000001765012400044327016777 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (8) g115.0<1>UD g1.0<8,8,1>UD {align1}; and.nz (1) null g2.0<1,1,1>UD 0x1UD{align1}; (f0) jmpi direct_idct; add (1) g2.8<1>UD g115.8<1,1,1>UD 0UD{align1}; send (16) 0 g3.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g4.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g5.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g6.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g7.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g8.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g9.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g10.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g11.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g12.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g13.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g14.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g15.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g16.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g17.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g18.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g19.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g20.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g21.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g22.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g23<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g24.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g25.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; add (1) g2.8<1>UD g2.8<1,1,1>UD 32UD {align1}; send (16) 0 g26.0<1>UD g2<16,16,1>UD read(3, 0, 2, 0) mlen 1 rlen 1 { align1 }; direct_idct: mov (1) g1.8<1>UD 0x00F000FUD {align1}; mov.sat (16) g3.0<2>UB g3.0<16,16,1>W {align1}; mov.sat (16) g4.0<2>UB g4.0<16,16,1>W {align1}; mov.sat (16) g5.0<2>UB g5.0<16,16,1>W {align1}; mov.sat (16) g6.0<2>UB g6.0<16,16,1>W {align1}; mov.sat (16) g7.0<2>UB g7.0<16,16,1>W {align1}; mov.sat (16) g8.0<2>UB g8.0<16,16,1>W {align1}; mov.sat (16) g9.0<2>UB g9.0<16,16,1>W {align1}; mov.sat (16) g10.0<2>UB g10.0<16,16,1>W {align1}; mov.sat (16) g11.0<2>UB g11.0<16,16,1>W {align1}; mov.sat (16) g12.0<2>UB g12.0<16,16,1>W {align1}; mov.sat (16) g13.0<2>UB g13.0<16,16,1>W {align1}; mov.sat (16) g14.0<2>UB g14.0<16,16,1>W {align1}; mov.sat (16) g15.0<2>UB g15.0<16,16,1>W {align1}; mov.sat (16) g16.0<2>UB g16.0<16,16,1>W {align1}; mov.sat (16) g17.0<2>UB g17.0<16,16,1>W {align1}; mov.sat (16) g18.0<2>UB g18.0<16,16,1>W {align1}; and.nz (1) null g1.30<1,1,1>UB 0x1UW{align1}; (f0) jmpi field_dct; //Frame IDCT mov (16) m1.0<1>UB g3.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g4.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g5.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g6.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g7.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g8.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g9.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g10.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g11.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g12.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g13.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g14.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g15.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g16.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g17.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g18.0<16,16,2>UB {align1}; jmpi write_back; field_dct: //Field IDCT mov (16) m1.0<1>UB g3.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g11.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g4.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g12.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g5.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g13.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g6.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g14.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g7.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g15.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g8.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g16.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g9.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g17.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g10.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g18.0<16,16,2>UB {align1}; write_back: send (16) 0 acc0<1>UW g1<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; //U mov (1) g1.8<1>UD 0x0070007UD { align1 }; shr (2) g1.0<1>UD g115.0<2,2,1>UD 1D {align1}; mov.sat (16) g19.0<2>UB g19.0<16,16,1>W {align1}; mov.sat (16) g20.0<2>UB g20.0<16,16,1>W {align1}; mov.sat (16) g21.0<2>UB g21.0<16,16,1>W {align1}; mov.sat (16) g22.0<2>UB g22.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g19.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g20.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g21.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g22.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g1<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; //V mov.sat (16) g23.0<2>UB g23.0<16,16,1>W {align1}; mov.sat (16) g24.0<2>UB g24.0<16,16,1>W {align1}; mov.sat (16) g25.0<2>UB g25.0<16,16,1>W {align1}; mov.sat (16) g26.0<2>UB g26.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g23.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g24.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g25.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g26.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g1<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/field_f_b.g4b0000664000175000017500000041303212400044327017037 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x00b10040, 0x04110203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00600001, 0x2e800021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021002e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000b1 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000007d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x26800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000e3c, 0x0021003f, 0x00000004 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210036, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000b1 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000007d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x26a00021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26e00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27200021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0ce0, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021002e, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x28800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x28900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0aa0, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0e80, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00000001, 0x20280061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000b1 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000007d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000c3c, 0x00210054, 0x00000008 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000b1 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000007d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x80800042, 0x23802529, 0x00b10680, 0x00b10380 }, { 0x80800042, 0x23a02529, 0x00b106a0, 0x00b10c00 }, { 0x80800042, 0x23c02529, 0x00b106c0, 0x00b103c0 }, { 0x80800042, 0x23e02529, 0x00b106e0, 0x00b10c20 }, { 0x80800042, 0x24002529, 0x00b10700, 0x00b10400 }, { 0x80800042, 0x24202529, 0x00b10720, 0x00b10c40 }, { 0x80800042, 0x24402529, 0x00b10740, 0x00b10440 }, { 0x80800042, 0x24602529, 0x00b10760, 0x00b10c60 }, { 0x80800042, 0x24802529, 0x00b10780, 0x00b10480 }, { 0x80800042, 0x24a02529, 0x00b107a0, 0x00b10c80 }, { 0x80800042, 0x24c02529, 0x00b107c0, 0x00b104c0 }, { 0x80800042, 0x24e02529, 0x00b107e0, 0x00b10ca0 }, { 0x80800042, 0x25002529, 0x00b10800, 0x00b10500 }, { 0x80800042, 0x25202529, 0x00b10820, 0x00b10cc0 }, { 0x80800042, 0x25402529, 0x00b10840, 0x00b10540 }, { 0x80800042, 0x25602529, 0x00b10860, 0x00b10ce0 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26700129, 0x008d0aa0, 0x00000000 }, { 0x80800042, 0x25802529, 0x00b10880, 0x00b10580 }, { 0x80800042, 0x25a02529, 0x00b108a0, 0x00b105a0 }, { 0x80800042, 0x25c02529, 0x00b108c0, 0x00b105c0 }, { 0x80800042, 0x25e02529, 0x00b108e0, 0x00b105e0 }, { 0x80800042, 0x26002529, 0x00b10900, 0x00b10600 }, { 0x80800042, 0x26202529, 0x00b10920, 0x00b10620 }, { 0x80800042, 0x26402529, 0x00b10940, 0x00b10640 }, { 0x80800042, 0x26602529, 0x00b10960, 0x00b10660 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05902000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/null.g4b.gen50000664000175000017500000000164712400044327016762 00000000000000 { 0x00600001, 0x20600021, 0x008d0020, 0x00000000 }, { 0x00802001, 0x21000061, 0x00000000, 0xffffffff }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00802001, 0x20200022, 0x008d0100, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082000 }, { 0x00000040, 0x20200c21, 0x00210060, 0x00000008 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082000 }, { 0x00000040, 0x20240c21, 0x00210064, 0x00000008 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082000 }, { 0x00000001, 0x20200021, 0x00210060, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082000 }, { 0x00802001, 0x20200062, 0x00000000, 0x7f7f7f7f }, { 0x00000008, 0x20201c21, 0x00210060, 0x00000001 }, { 0x00000008, 0x20241c21, 0x00210064, 0x00000001 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082002 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082001 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x0y0_uv_igd.g4i0000664000175000017500000000172212400044327021447 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x07000FUD {align1}; and.nz (1) null g115.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(5,2,0,2) mlen 1 rlen 4 {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(6,2,0,2) mlen 1 rlen 4 {align1}; jmpi put_data; read_backward: send (16) 0 g40.0<1>UW g115<8,8,1>UW read(8,2,0,2) mlen 1 rlen 4 {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(9,2,0,2) mlen 1 rlen 4 {align1}; put_data: mov (16) g32.0<1>UW g40.0<8,8,1>UB {align1 compr}; mov (16) g34.0<1>UW g42.0<8,8,1>UB {align1 compr}; mov (16) g36.0<1>UW g48.0<8,8,1>UB {align1 compr}; mov (16) g38.0<1>UW g50.0<8,8,1>UB {align1 compr}; xf86-video-intel-2.99.917/xvmc/shader/mc/dual_prime.g4a0000664000175000017500000002267212400044327017274 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (8) g76.0<1>UD g1.0<8,8,1>UD {align1}; //mov (8) g77.0<1>UD g2.0<8,8,1>UD {align1}; include(`block_clear.g4i') mov (8) g115.0<1>UD g1.0<8,8,1>UD {align1}; mov (8) g116.0<1>UD g1.0<8,8,1>UD {align1}; /* forward---Y---first vector*/ mov(1) g115.8<1>UD 0x007001fUD { align1 }; asr (2) g115.14<1>W g1.14<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`4') define(`mv1',`g1.14') define(`mv2',`g1.16') include(`motion_field_y.g4i') mov (8) g52.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g54.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g56.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g58.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g60.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g62.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g64.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g66.0<1>UD g103.0<8,8,1>UD {align1}; /*forward---Y---second vector*/ asr (2) g115.14<1>W g1.22<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x4UD {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`4') define(`mv1',`g1.22') define(`mv2',`g1.24') include(`motion_field_y.g4i') mov (8) g53.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g55.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g57.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g59.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g61.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g63.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g65.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g67.0<1>UD g103.0<8,8,1>UD {align1}; /*forward---UV---first vector*/ mov(1) g115.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.14<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u',`5') define(`surface_v',`6') define(`mv1',`g1.14') define(`mv2',`g1.16') include(`motion_field_uv.g4i') mov (8) g68.0<1>UW g78.0<8,8,1>UW {align1}; mov (8) g69.0<1>UW g79.0<8,8,1>UW {align1}; mov (8) g70.0<1>UW g80.0<8,8,1>UW {align1}; mov (8) g71.0<1>UW g81.0<8,8,1>UW {align1}; mov (8) g72.0<1>UW g82.0<8,8,1>UW {align1}; mov (8) g73.0<1>UW g83.0<8,8,1>UW {align1}; mov (8) g74.0<1>UW g84.0<8,8,1>UW {align1}; mov (8) g75.0<1>UW g85.0<8,8,1>UW {align1}; /*forward---UV---second vector */ asr (2) g115.14<1>W g1.22<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x4UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g1.24') define(`mv2',`g1.26') include(`motion_field_uv.g4i') mov (8) g68.16<1>UW g78.0<8,8,1>UW {align1}; mov (8) g69.16<1>UW g79.0<8,8,1>UW {align1}; mov (8) g70.16<1>UW g80.0<8,8,1>UW {align1}; mov (8) g71.16<1>UW g81.0<8,8,1>UW {align1}; mov (8) g72.16<1>UW g82.0<8,8,1>UW {align1}; mov (8) g73.16<1>UW g83.0<8,8,1>UW {align1}; mov (8) g74.16<1>UW g84.0<8,8,1>UW {align1}; mov (8) g75.16<1>UW g85.0<8,8,1>UW {align1}; /*backward---Y---first vector */ mov(8) g1.0<1>UD g116.0<8,8,1>UD {align1}; mov(1) g115.8<1>UD 0x007001fUD { align1 }; mov(1) g1.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.18<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x2UW {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`7') define(`mv1',`g1.18') define(`mv2',`g1.20') include(`motion_field_y.g4i') mov (8) g28.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g30.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g32.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g34.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g36.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g38.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g40.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g42.0<1>UD g103.0<8,8,1>UD {align1}; /*backward---Y---second vector */ asr (2) g115.14<1>W g1.26<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g2.20<1,1,1>UD 0x8UD {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`7') define(`mv1',`g1.26') define(`mv2',`g1.28') include(`motion_field_y.g4i') avg.sat (16) g28.0<1>UW g52.0<16,16,1>UW g28.0<16,16,1>UW {align1}; avg.sat (16) g29.0<1>UW g53.0<16,16,1>UW g96.0<16,16,1>UW {align1}; avg.sat (16) g30.0<1>UW g54.0<16,16,1>UW g30.0<16,16,1>UW {align1}; avg.sat (16) g31.0<1>UW g55.0<16,16,1>UW g97.0<16,16,1>UW {align1}; avg.sat (16) g32.0<1>UW g56.0<16,16,1>UW g32.0<16,16,1>UW {align1}; avg.sat (16) g33.0<1>UW g57.0<16,16,1>UW g98.0<16,16,1>UW {align1}; avg.sat (16) g34.0<1>UW g58.0<16,16,1>UW g34.0<16,16,1>UW {align1}; avg.sat (16) g35.0<1>UW g59.0<16,16,1>UW g99.0<16,16,1>UW {align1}; avg.sat (16) g36.0<1>UW g60.0<16,16,1>UW g36.0<16,16,1>UW {align1}; avg.sat (16) g37.0<1>UW g61.0<16,16,1>UW g100.0<16,16,1>UW {align1}; avg.sat (16) g38.0<1>UW g62.0<16,16,1>UW g38.0<16,16,1>UW {align1}; avg.sat (16) g39.0<1>UW g63.0<16,16,1>UW g101.0<16,16,1>UW {align1}; avg.sat (16) g40.0<1>UW g64.0<16,16,1>UW g40.0<16,16,1>UW {align1}; avg.sat (16) g41.0<1>UW g65.0<16,16,1>UW g102.0<16,16,1>UW {align1}; avg.sat (16) g42.0<1>UW g66.0<16,16,1>UW g42.0<16,16,1>UW {align1}; avg.sat (16) g43.0<1>UW g67.0<16,16,1>UW g103.0<16,16,1>UW {align1}; /*backward---UV---first vector */ mov(1) g115.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.18<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x2UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u',`8') define(`surface_v',`9') define(`mv1',`g1.18') define(`mv2',`g1.20') include(`motion_field_uv.g4i') mov (8) g44.0<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.0<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.0<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.0<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.0<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.0<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.0<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.0<1>UW g85.0<8,8,1>UW {align1}; /*backward---UV---second vector */ asr (2) g115.14<1>W g1.26<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x8UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g1.26') define(`mv2',`g1.28') include(`motion_field_uv.g4i') mov (8) g44.16<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.16<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.16<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.16<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.16<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.16<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.16<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.16<1>UW g85.0<8,8,1>UW {align1}; avg.sat (16) g44.0<1>UW g68.0<16,16,1>UW g44.0<16,16,1>UW {align1}; avg.sat (16) g45.0<1>UW g69.0<16,16,1>UW g45.0<16,16,1>UW {align1}; avg.sat (16) g46.0<1>UW g70.0<16,16,1>UW g46.0<16,16,1>UW {align1}; avg.sat (16) g47.0<1>UW g71.0<16,16,1>UW g47.0<16,16,1>UW {align1}; avg.sat (16) g48.0<1>UW g72.0<16,16,1>UW g48.0<16,16,1>UW {align1}; avg.sat (16) g49.0<1>UW g73.0<16,16,1>UW g49.0<16,16,1>UW {align1}; avg.sat (16) g50.0<1>UW g74.0<16,16,1>UW g50.0<16,16,1>UW {align1}; avg.sat (16) g51.0<1>UW g75.0<16,16,1>UW g51.0<16,16,1>UW {align1}; include(`addidct.g4i') //send (16) 0 acc0<1>UW g0<8,8,1>UW // thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/frame_f_b.g4b0000664000175000017500000020701712400044327017052 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x00b10040, 0x04110203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, { 0x0020000c, 0x202e3dad, 0x00450e6e, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450e60, 0x0045002e }, { 0x01000005, 0x20000d3c, 0x00210e6e, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000012b }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000de }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000031 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a004 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x008d0040, 0x0411a004 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x00800040, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x00800040, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x00800040, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x00800040, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x00800040, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x00800040, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x00800040, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x00800040, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x00800040, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x00800040, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x00800040, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x00800040, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x00800040, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x00800040, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x00800040, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c60 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c80 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca0 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc0 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce0 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d00 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d20 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d40 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d60 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d80 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da0 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc0 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de0 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e00 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e20 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f00 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000092 }, { 0x00800040, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x00800040, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x00800040, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x00800040, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x00800040, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x00800040, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x00800040, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x00800040, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x00800040, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x00800040, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x00800040, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x00800040, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x00800040, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x00800040, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x00800040, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x00800040, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000061 }, { 0x00800040, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x00800040, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x00800040, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x00800040, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x00800040, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x00800040, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x00800040, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x00800040, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x00800040, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x00800040, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x00800040, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x00800040, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x00800040, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x00800040, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x00800040, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x00800040, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x00800040, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x00800040, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x00800040, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x00800040, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x00800040, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x00800040, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x00800040, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x00800040, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x00800040, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x00800040, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x00800040, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x00800040, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x00800040, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x00800040, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x00800040, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c64 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c84 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca4 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc4 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce4 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d04 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d24 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d44 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d64 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d84 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da4 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc4 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de4 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e04 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e24 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f04 }, { 0x80800008, 0x23802d29, 0x00b10380, 0x00020002 }, { 0x80800008, 0x23a02d29, 0x00b103a0, 0x00020002 }, { 0x80800008, 0x23c02d29, 0x00b103c0, 0x00020002 }, { 0x80800008, 0x23e02d29, 0x00b103e0, 0x00020002 }, { 0x80800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x80800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x80800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x80800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x80800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x80800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x80800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x80800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x80800008, 0x25002d29, 0x00b10500, 0x00020002 }, { 0x80800008, 0x25202d29, 0x00b10520, 0x00020002 }, { 0x80800008, 0x25402d29, 0x00b10540, 0x00020002 }, { 0x80800008, 0x25602d29, 0x00b10560, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000e5 }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20581c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a004 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a004 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x008d0040, 0x0411a004 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c60 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c80 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10ca0 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10cc0 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10ce0 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10d00 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d20 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d40 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d60 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d80 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10da0 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10dc0 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10de0 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10e00 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e20 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10f00 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c61 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c81 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10ca1 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10cc1 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10ce1 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10d01 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d21 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d41 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d61 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d81 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10da1 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10dc1 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10de1 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10e01 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e21 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c62 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c82 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10ca2 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10cc2 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10ce2 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10d02 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d22 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d42 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d62 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d82 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10da2 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10dc2 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10de2 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10e02 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e22 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c63 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c83 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10ca3 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10cc3 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10ce3 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10d03 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d23 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d43 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d63 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d83 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10da3 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10dc3 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10de3 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10e03 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e23 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a004 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x23800229, 0x00b10c40, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c60, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c80, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca0, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc0, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce0, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d00, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d20, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d40, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d60, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d80, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da0, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc0, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de0, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e00, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e20, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00800001, 0x23800229, 0x00b10c41, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c61, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c81, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca1, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc1, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce1, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d01, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d21, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d41, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d61, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d81, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da1, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc1, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de1, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e01, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e21, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x00800001, 0x23800229, 0x00b10c42, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c62, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c82, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca2, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc2, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce2, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d02, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d22, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d42, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d62, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d82, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da2, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc2, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de2, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e02, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e22, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x23800229, 0x00b10c43, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c63, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c83, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca3, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc3, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce3, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d03, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d23, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d43, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d63, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d83, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da3, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc3, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de3, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e03, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e23, 0x00000000 }, { 0x00802001, 0x26800021, 0x00b10380, 0x00000000 }, { 0x00802001, 0x26c00021, 0x00b103c0, 0x00000000 }, { 0x00802001, 0x27000021, 0x00b10400, 0x00000000 }, { 0x00802001, 0x27400021, 0x00b10440, 0x00000000 }, { 0x00802001, 0x27800021, 0x00b10480, 0x00000000 }, { 0x00802001, 0x27c00021, 0x00b104c0, 0x00000000 }, { 0x00802001, 0x28000021, 0x00b10500, 0x00000000 }, { 0x00802001, 0x28400021, 0x00b10540, 0x00000000 }, { 0x0020000c, 0x202e3dad, 0x00450e72, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450e60, 0x0045002e }, { 0x01000005, 0x20000d3c, 0x00210e72, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000012b }, { 0x01000005, 0x20000d3c, 0x00210e74, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000de }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000031 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x008d0040, 0x0411a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x00800040, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x00800040, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x00800040, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x00800040, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x00800040, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x00800040, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x00800040, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x00800040, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x00800040, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x00800040, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x00800040, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x00800040, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x00800040, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x00800040, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x00800040, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c60 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c80 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca0 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc0 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce0 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d00 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d20 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d40 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d60 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d80 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da0 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc0 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de0 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e00 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e20 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f00 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000092 }, { 0x00800040, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x00800040, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x00800040, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x00800040, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x00800040, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x00800040, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x00800040, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x00800040, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x00800040, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x00800040, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x00800040, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x00800040, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x00800040, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x00800040, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x00800040, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x00800040, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000061 }, { 0x00800040, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x00800040, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x00800040, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x00800040, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x00800040, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x00800040, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x00800040, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x00800040, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x00800040, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x00800040, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x00800040, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x00800040, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x00800040, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x00800040, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x00800040, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x00800040, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x00800040, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x00800040, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x00800040, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x00800040, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x00800040, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x00800040, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x00800040, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x00800040, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x00800040, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x00800040, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x00800040, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x00800040, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x00800040, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x00800040, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x00800040, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c64 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c84 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca4 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc4 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce4 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d04 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d24 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d44 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d64 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d84 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da4 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc4 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de4 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e04 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e24 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f04 }, { 0x80800008, 0x23802d29, 0x00b10380, 0x00020002 }, { 0x80800008, 0x23a02d29, 0x00b103a0, 0x00020002 }, { 0x80800008, 0x23c02d29, 0x00b103c0, 0x00020002 }, { 0x80800008, 0x23e02d29, 0x00b103e0, 0x00020002 }, { 0x80800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x80800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x80800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x80800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x80800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x80800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x80800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x80800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x80800008, 0x25002d29, 0x00b10500, 0x00020002 }, { 0x80800008, 0x25202d29, 0x00b10520, 0x00020002 }, { 0x80800008, 0x25402d29, 0x00b10540, 0x00020002 }, { 0x80800008, 0x25602d29, 0x00b10560, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000e5 }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20581c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x01000005, 0x20000d3c, 0x00210e74, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x008d0040, 0x0411a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c60 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c80 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10ca0 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10cc0 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10ce0 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10d00 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d20 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d40 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d60 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d80 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10da0 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10dc0 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10de0 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10e00 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e20 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10f00 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c61 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c81 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10ca1 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10cc1 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10ce1 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10d01 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d21 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d41 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d61 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d81 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10da1 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10dc1 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10de1 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10e01 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e21 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c62 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c82 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10ca2 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10cc2 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10ce2 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10d02 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d22 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d42 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d62 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d82 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10da2 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10dc2 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10de2 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10e02 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e22 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c63 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c83 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10ca3 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10cc3 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10ce3 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10d03 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d23 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d43 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d63 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d83 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10da3 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10dc3 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10de3 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10e03 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e23 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x23800229, 0x00b10c40, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c60, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c80, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca0, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc0, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce0, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d00, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d20, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d40, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d60, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d80, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da0, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc0, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de0, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e00, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e20, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00800001, 0x23800229, 0x00b10c41, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c61, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c81, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca1, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc1, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce1, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d01, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d21, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d41, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d61, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d81, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da1, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc1, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de1, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e01, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e21, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x00800001, 0x23800229, 0x00b10c42, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c62, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c82, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca2, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc2, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce2, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d02, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d22, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d42, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d62, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d82, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da2, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc2, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de2, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e02, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e22, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x23800229, 0x00b10c43, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c63, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c83, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca3, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc3, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce3, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d03, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d23, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d43, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d63, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d83, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da3, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc3, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de3, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e03, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e23, 0x00000000 }, { 0x80800042, 0x23802529, 0x00b10380, 0x00b10680 }, { 0x80800042, 0x23a02529, 0x00b103a0, 0x00b106a0 }, { 0x80800042, 0x23c02529, 0x00b103c0, 0x00b106c0 }, { 0x80800042, 0x23e02529, 0x00b103e0, 0x00b106e0 }, { 0x80800042, 0x24002529, 0x00b10400, 0x00b10700 }, { 0x80800042, 0x24202529, 0x00b10420, 0x00b10720 }, { 0x80800042, 0x24402529, 0x00b10440, 0x00b10740 }, { 0x80800042, 0x24602529, 0x00b10460, 0x00b10760 }, { 0x80800042, 0x24802529, 0x00b10480, 0x00b10780 }, { 0x80800042, 0x24a02529, 0x00b104a0, 0x00b107a0 }, { 0x80800042, 0x24c02529, 0x00b104c0, 0x00b107c0 }, { 0x80800042, 0x24e02529, 0x00b104e0, 0x00b107e0 }, { 0x80800042, 0x25002529, 0x00b10500, 0x00b10800 }, { 0x80800042, 0x25202529, 0x00b10520, 0x00b10820 }, { 0x80800042, 0x25402529, 0x00b10540, 0x00b10840 }, { 0x80800042, 0x25602529, 0x00b10560, 0x00b10860 }, { 0x00200008, 0x20200c21, 0x00450e60, 0x00000001 }, { 0x0020000c, 0x2e6e3dad, 0x00450e6e, 0x00010001 }, { 0x0020000c, 0x202e3dad, 0x00450e6e, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450020, 0x0045002e }, { 0x00000001, 0x20480061, 0x00000000, 0x0007000f }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00800031, 0x2ac01d29, 0x008d0040, 0x0414a005 }, { 0x00800031, 0x2b401d29, 0x008d0040, 0x0414a006 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x25800229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b40, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x25800229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b41, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x25800229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b42, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x25800229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b43, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2f400231, 0x00b20580, 0x00000000 }, { 0x00800001, 0x2f500231, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x2f600231, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x2f700231, 0x00b205e0, 0x00000000 }, { 0x00800001, 0x2f800231, 0x00b20600, 0x00000000 }, { 0x00800001, 0x2f900231, 0x00b20620, 0x00000000 }, { 0x00800001, 0x2fa00231, 0x00b20640, 0x00000000 }, { 0x00800001, 0x2fb00231, 0x00b20660, 0x00000000 }, { 0x0020000c, 0x2e723dad, 0x00450e72, 0x00010001 }, { 0x0020000c, 0x202e3dad, 0x00450e72, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450020, 0x0045002e }, { 0x00000001, 0x20480061, 0x00000000, 0x0007000f }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00800031, 0x2ac01d29, 0x008d0040, 0x0414a008 }, { 0x00800031, 0x2b401d29, 0x008d0040, 0x0414a009 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x25800229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b40, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x25800229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b41, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x25800229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b42, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x25800229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b43, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba3, 0x00000000 }, { 0x80800042, 0x25804529, 0x00b10580, 0x00b10f40 }, { 0x80800042, 0x25a04529, 0x00b105a0, 0x00b10f50 }, { 0x80800042, 0x25c04529, 0x00b105c0, 0x00b10f60 }, { 0x80800042, 0x25e04529, 0x00b105e0, 0x00b10f70 }, { 0x80800042, 0x26004529, 0x00b10600, 0x00b10f80 }, { 0x80800042, 0x26204529, 0x00b10620, 0x00b10f90 }, { 0x80800042, 0x26404529, 0x00b10640, 0x00b10fa0 }, { 0x80800042, 0x26604529, 0x00b10660, 0x00b10fb0 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05902000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x0y0_y.g4i0000664000175000017500000000712512400044327020445 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g115.8<1>UD 0x01FUD {align1}; send (16) 0 g78.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g80.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g82.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g84.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; mov (1) g115.8<1>UD 0x07001FUD {align1}; send (16) 0 g86.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; and (1) g2.24<1>UD g115.0<1,1,1>UD 3UD {align1}; mul (1) g2.24<1>UD g2.24<1,1,1>UD 9UD {align1}; jmpi g2.24<1,1,1>D; mov (16) g96.0<1>UW g78.0<16,16,1>UB {align1}; mov (16) g97.0<1>UW g80.0<16,16,1>UB {align1}; mov (16) g98.0<1>UW g82.0<16,16,1>UB {align1}; mov (16) g99.0<1>UW g84.0<16,16,1>UB {align1}; mov (16) g100.0<1>UW g86.0<16,16,1>UB {align1}; mov (16) g101.0<1>UW g88.0<16,16,1>UB {align1}; mov (16) g102.0<1>UW g90.0<16,16,1>UB {align1}; mov (16) g103.0<1>UW g92.0<16,16,1>UB {align1}; jmpi out; mov (16) g96.0<1>UW g78.1<16,16,1>UB {align1}; mov (16) g97.0<1>UW g80.1<16,16,1>UB {align1}; mov (16) g98.0<1>UW g82.1<16,16,1>UB {align1}; mov (16) g99.0<1>UW g84.1<16,16,1>UB {align1}; mov (16) g100.0<1>UW g86.1<16,16,1>UB {align1}; mov (16) g101.0<1>UW g88.1<16,16,1>UB {align1}; mov (16) g102.0<1>UW g90.1<16,16,1>UB {align1}; mov (16) g103.0<1>UW g92.1<16,16,1>UB {align1}; jmpi out; mov (16) g96.0<1>UW g78.2<16,16,1>UB {align1}; mov (16) g97.0<1>UW g80.2<16,16,1>UB {align1}; mov (16) g98.0<1>UW g82.2<16,16,1>UB {align1}; mov (16) g99.0<1>UW g84.2<16,16,1>UB {align1}; mov (16) g100.0<1>UW g86.2<16,16,1>UB {align1}; mov (16) g101.0<1>UW g88.2<16,16,1>UB {align1}; mov (16) g102.0<1>UW g90.2<16,16,1>UB {align1}; mov (16) g103.0<1>UW g92.2<16,16,1>UB {align1}; jmpi out; mov (16) g96.0<1>UW g78.3<16,16,1>UB {align1}; mov (16) g97.0<1>UW g80.3<16,16,1>UB {align1}; mov (16) g98.0<1>UW g82.3<16,16,1>UB {align1}; mov (16) g99.0<1>UW g84.3<16,16,1>UB {align1}; mov (16) g100.0<1>UW g86.3<16,16,1>UB {align1}; mov (16) g101.0<1>UW g88.3<16,16,1>UB {align1}; mov (16) g102.0<1>UW g90.3<16,16,1>UB {align1}; mov (16) g103.0<1>UW g92.3<16,16,1>UB {align1}; out: xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x1y1_uv_igd.g4i0000664000175000017500000000560412400044327021454 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x07000FUD {align1}; and.nz (1) null g115.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(5, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g45.0<1>UW g115<8,8,1>UW read(6, 2, 0, 2) mlen 1 rlen 4 {align1};//V mov (1) g115.8<1>UD 0xFUD {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g44.0<1>UW g115<8,8,1>UW read(5, 2, 0, 2) mlen 1 rlen 1 {align1};//U send (16) 0 g49.0<1>UW g115<8,8,1>UW read(6, 2, 0, 2) mlen 1 rlen 1 {align1};//V jmpi put_data; read_backward: send (16) 0 g40.0<1>UW g115<8,8,1>UW read(8, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g45.0<1>UW g115<8,8,1>UW read(9, 2, 0, 2) mlen 1 rlen 4 {align1};//V mov (1) g115.8<1>UD 0xFUD {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g44.0<1>UW g115<8,8,1>UW read(8, 2, 0, 2) mlen 1 rlen 1 {align1};//U send (16) 0 g49.0<1>UW g115<8,8,1>UW read(9, 2, 0, 2) mlen 1 rlen 1 {align1};//V put_data: //U add (8) g32.0<1>UW g40.0<8,8,1>UB g41.0<8,8,1>UB {align1}; add (8) g33.0<1>UW g41.0<8,8,1>UB g42.0<8,8,1>UB {align1}; add (8) g34.0<1>UW g42.0<8,8,1>UB g43.0<8,8,1>UB {align1}; add (8) g35.0<1>UW g43.0<8,8,1>UB g44.0<8,8,1>UB {align1}; add (8) g32.0<1>UW g32.0<8,8,1>UW g40.1<8,8,1>UB {align1}; add (8) g33.0<1>UW g33.0<8,8,1>UW g41.1<8,8,1>UB {align1}; add (8) g34.0<1>UW g34.0<8,8,1>UW g42.1<8,8,1>UB {align1}; add (8) g35.0<1>UW g35.0<8,8,1>UW g43.1<8,8,1>UB {align1}; add (8) g32.0<1>UW g32.0<8,8,1>UW g41.1<8,8,1>UB {align1}; add (8) g33.0<1>UW g33.0<8,8,1>UW g42.1<8,8,1>UB {align1}; add (8) g34.0<1>UW g34.0<8,8,1>UW g43.1<8,8,1>UB {align1}; add (8) g35.0<1>UW g35.0<8,8,1>UW g44.1<8,8,1>UB {align1}; //V add (8) g36.0<1>UW g45.0<8,8,1>UB g46.0<8,8,1>UB {align1}; add (8) g37.0<1>UW g46.0<8,8,1>UB g47.0<8,8,1>UB {align1}; add (8) g38.0<1>UW g47.0<8,8,1>UB g48.0<8,8,1>UB {align1}; add (8) g39.0<1>UW g48.0<8,8,1>UB g49.0<8,8,1>UB {align1}; add (8) g36.0<1>UW g36.0<8,8,1>UW g45.1<8,8,1>UB {align1}; add (8) g37.0<1>UW g37.0<8,8,1>UW g46.1<8,8,1>UB {align1}; add (8) g38.0<1>UW g38.0<8,8,1>UW g47.1<8,8,1>UB {align1}; add (8) g39.0<1>UW g39.0<8,8,1>UW g48.1<8,8,1>UB {align1}; add (8) g36.0<1>UW g36.0<8,8,1>UW g46.1<8,8,1>UB {align1}; add (8) g37.0<1>UW g37.0<8,8,1>UW g47.1<8,8,1>UB {align1}; add (8) g38.0<1>UW g38.0<8,8,1>UW g48.1<8,8,1>UB {align1}; add (8) g39.0<1>UW g39.0<8,8,1>UW g49.1<8,8,1>UB {align1}; shr (32) g32.0<1>UW g32.0<16,16,1>UW 2UW {align1 compr}; shr (32) g34.0<1>UW g34.0<16,16,1>UW 2UW {align1 compr}; shr (32) g36.0<1>UW g36.0<16,16,1>UW 2UW {align1 compr}; shr (32) g38.0<1>UW g38.0<16,16,1>UW 2UW {align1 compr}; xf86-video-intel-2.99.917/xvmc/shader/mc/motion_frame_uv_igd.g4i0000664000175000017500000000250512400044327021170 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng */ include(`read_frame_x0y0_uv_igd.g4i') xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x1y1_y_igd.g4i0000664000175000017500000000562412400044327021274 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x07001FUD {align1}; and.nz (1) null g115.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(4,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(4,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; mov (1) g115.8<1>UD 0x1FUD {align1}; send (16) 0 g56.0<1>UW g115<8,8,1>UW read(4,2,0,2) mlen 1 rlen 1 {align1}; jmpi put_data; read_backward: send (16) 0 g40.0<1>UW g115<8,8,1>UW read(7,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(7,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; mov (1) g115.8<1>UD 0x1FUD {align1}; send (16) 0 g56.0<1>UW g115<8,8,1>UW read(7,2,0,2) mlen 1 rlen 1 {align1}; put_data: add (16) g32.0<1>UW g40.0<16,16,1>UB g42.0<16,16,1>UB {align1}; add (16) g33.0<1>UW g42.0<16,16,1>UB g44.0<16,16,1>UB {align1}; add (16) g34.0<1>UW g44.0<16,16,1>UB g46.0<16,16,1>UB {align1}; add (16) g35.0<1>UW g46.0<16,16,1>UB g48.0<16,16,1>UB {align1}; add (16) g36.0<1>UW g48.0<16,16,1>UB g50.0<16,16,1>UB {align1}; add (16) g37.0<1>UW g50.0<16,16,1>UB g52.0<16,16,1>UB {align1}; add (16) g38.0<1>UW g52.0<16,16,1>UB g54.0<16,16,1>UB {align1}; add (16) g39.0<1>UW g54.0<16,16,1>UB g56.0<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g40.1<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g42.1<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g44.1<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g46.1<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g48.1<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g50.1<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g52.1<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g54.1<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g42.1<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g44.1<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g46.1<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g48.1<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g50.1<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g52.1<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g54.1<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g56.1<16,16,1>UB {align1}; shr (32) g32.0<1>UW g32.0<16,16,1>UW 2UW {align1 compr}; shr (32) g34.0<1>UW g34.0<16,16,1>UW 2UW {align1 compr}; shr (32) g36.0<1>UW g36.0<16,16,1>UW 2UW {align1 compr}; shr (32) g38.0<1>UW g38.0<16,16,1>UW 2UW {align1 compr}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x1y1_y_igd.g4i0000664000175000017500000001122112400044327021271 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (1) g32.8<1>UD 0x007001FUD {align1}; and.nz (1) null g32.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g38.0<1>UW g32<8,8,1>UW read(4, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(4, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; mov (1) g32.8<1>UD 0x1FUD {align1}; send (16) 0 g54.0<1>UW g32<8,8,1>UW read(4, 2, 0, 2) mlen 1 rlen 1 {align1}; jmpi put_data; read_backward: send (16) 0 g38.0<1>UW g32<8,8,1>UW read(7, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(7, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; mov (1) g32.8<1>UD 0x1FUD {align1}; send (16) 0 g54.0<1>UW g32<8,8,1>UW read(7, 2, 0, 2) mlen 1 rlen 1 {align1}; put_data: add (16) g58.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1}; add (16) g59.0<1>UW g39.0<16,16,1>UB g39.1<16,16,1>UB {align1}; add (16) g60.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; add (16) g61.0<1>UW g41.0<16,16,1>UB g41.1<16,16,1>UB {align1}; add (16) g62.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; add (16) g63.0<1>UW g43.0<16,16,1>UB g43.1<16,16,1>UB {align1}; add (16) g64.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; add (16) g65.0<1>UW g45.0<16,16,1>UB g45.1<16,16,1>UB {align1}; add (16) g66.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; add (16) g67.0<1>UW g47.0<16,16,1>UB g47.1<16,16,1>UB {align1}; add (16) g68.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; add (16) g69.0<1>UW g49.0<16,16,1>UB g49.1<16,16,1>UB {align1}; add (16) g70.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; add (16) g71.0<1>UW g51.0<16,16,1>UB g51.1<16,16,1>UB {align1}; add (16) g72.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; add (16) g73.0<1>UW g53.0<16,16,1>UB g53.1<16,16,1>UB {align1}; add (16) g58.0<1>UW g58.0<16,16,1>UW g39.0<16,16,1>UB {align1}; add (16) g59.0<1>UW g59.0<16,16,1>UW g40.0<16,16,1>UB {align1}; add (16) g60.0<1>UW g60.0<16,16,1>UW g41.0<16,16,1>UB {align1}; add (16) g61.0<1>UW g61.0<16,16,1>UW g42.0<16,16,1>UB {align1}; add (16) g62.0<1>UW g62.0<16,16,1>UW g43.0<16,16,1>UB {align1}; add (16) g63.0<1>UW g63.0<16,16,1>UW g44.0<16,16,1>UB {align1}; add (16) g64.0<1>UW g64.0<16,16,1>UW g45.0<16,16,1>UB {align1}; add (16) g65.0<1>UW g65.0<16,16,1>UW g46.0<16,16,1>UB {align1}; add (16) g66.0<1>UW g66.0<16,16,1>UW g47.0<16,16,1>UB {align1}; add (16) g67.0<1>UW g67.0<16,16,1>UW g48.0<16,16,1>UB {align1}; add (16) g68.0<1>UW g68.0<16,16,1>UW g49.0<16,16,1>UB {align1}; add (16) g69.0<1>UW g69.0<16,16,1>UW g50.0<16,16,1>UB {align1}; add (16) g70.0<1>UW g70.0<16,16,1>UW g51.0<16,16,1>UB {align1}; add (16) g71.0<1>UW g71.0<16,16,1>UW g52.0<16,16,1>UB {align1}; add (16) g72.0<1>UW g72.0<16,16,1>UW g53.0<16,16,1>UB {align1}; add (16) g73.0<1>UW g73.0<16,16,1>UW g54.0<16,16,1>UB {align1}; add (16) g58.0<1>UW g58.0<16,16,1>UW g39.1<16,16,1>UB {align1}; add (16) g59.0<1>UW g59.0<16,16,1>UW g40.1<16,16,1>UB {align1}; add (16) g60.0<1>UW g60.0<16,16,1>UW g41.1<16,16,1>UB {align1}; add (16) g61.0<1>UW g61.0<16,16,1>UW g42.1<16,16,1>UB {align1}; add (16) g62.0<1>UW g62.0<16,16,1>UW g43.1<16,16,1>UB {align1}; add (16) g63.0<1>UW g63.0<16,16,1>UW g44.1<16,16,1>UB {align1}; add (16) g64.0<1>UW g64.0<16,16,1>UW g45.1<16,16,1>UB {align1}; add (16) g65.0<1>UW g65.0<16,16,1>UW g46.1<16,16,1>UB {align1}; add (16) g66.0<1>UW g66.0<16,16,1>UW g47.1<16,16,1>UB {align1}; add (16) g67.0<1>UW g67.0<16,16,1>UW g48.1<16,16,1>UB {align1}; add (16) g68.0<1>UW g68.0<16,16,1>UW g49.1<16,16,1>UB {align1}; add (16) g69.0<1>UW g69.0<16,16,1>UW g50.1<16,16,1>UB {align1}; add (16) g70.0<1>UW g70.0<16,16,1>UW g51.1<16,16,1>UB {align1}; add (16) g71.0<1>UW g71.0<16,16,1>UW g52.1<16,16,1>UB {align1}; add (16) g72.0<1>UW g72.0<16,16,1>UW g53.1<16,16,1>UB {align1}; add (16) g73.0<1>UW g73.0<16,16,1>UW g54.1<16,16,1>UB {align1}; shr (32) g58.0<1>UW g58.0<16,16,1>UW 2UW {align1 compr}; shr (32) g60.0<1>UW g60.0<16,16,1>UW 2UW {align1 compr}; shr (32) g62.0<1>UW g62.0<16,16,1>UW 2UW {align1 compr}; shr (32) g64.0<1>UW g64.0<16,16,1>UW 2UW {align1 compr}; shr (32) g66.0<1>UW g66.0<16,16,1>UW 2UW {align1 compr}; shr (32) g68.0<1>UW g68.0<16,16,1>UW 2UW {align1 compr}; shr (32) g70.0<1>UW g70.0<16,16,1>UW 2UW {align1 compr}; shr (32) g72.0<1>UW g72.0<16,16,1>UW 2UW {align1 compr}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x0y1_uv_igd.g4i0000664000175000017500000000334712400044327021455 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g83~g106:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x07000FUD {align1}; and.nz (1) null g115.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(5, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g45.0<1>UW g115<8,8,1>UW read(6, 2, 0, 2) mlen 1 rlen 4 {align1};//V mov (1) g115.8<1>UD 0xFUD {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g44.0<1>UW g115<8,8,1>UW read(5, 2, 0, 2) mlen 1 rlen 1 {align1};//U send (16) 0 g49.0<1>UW g115<8,8,1>UW read(6, 2, 0, 2) mlen 1 rlen 1 {align1};//V jmpi put_data; read_backward: send (16) 0 g40.0<1>UW g115<8,8,1>UW read(8, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g45.0<1>UW g115<8,8,1>UW read(9, 2, 0, 2) mlen 1 rlen 4 {align1};//V mov (1) g115.8<1>UD 0xFUD {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g44.0<1>UW g115<8,8,1>UW read(8, 2, 0, 2) mlen 1 rlen 1 {align1};//U send (16) 0 g49.0<1>UW g115<8,8,1>UW read(9, 2, 0, 2) mlen 1 rlen 1 {align1};//V put_data: avg (8) g32.0<1>UW g40.0<8,8,1>UB g41.0<8,8,1>UB {align1}; avg (8) g33.0<1>UW g41.0<8,8,1>UB g42.0<8,8,1>UB {align1}; avg (8) g34.0<1>UW g42.0<8,8,1>UB g43.0<8,8,1>UB {align1}; avg (8) g35.0<1>UW g43.0<8,8,1>UB g44.0<8,8,1>UB {align1}; avg (8) g36.0<1>UW g45.0<8,8,1>UB g46.0<8,8,1>UB {align1}; avg (8) g37.0<1>UW g46.0<8,8,1>UB g47.0<8,8,1>UB {align1}; avg (8) g38.0<1>UW g47.0<8,8,1>UB g48.0<8,8,1>UB {align1}; avg (8) g39.0<1>UW g48.0<8,8,1>UB g49.0<8,8,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x1y1_y.g4i0000664000175000017500000003571112400044327020460 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g2.8<1>UD 0x007001FUD {align1}; send (16) 0 g98.0<1>UW g2<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; and (1) g2.24<1>UD g2.0<1,1,1>UD 3UD {align1}; mul(1) g2.24<1>UD g2.24<1,1,1>UD 49UD {align1}; add (1) g2.4<1>UD g2.4<1,1,1>UD 8UD {align1}; send (16) 0 g106.0<1>UW g2<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g2.4<1>UD g2.4<1,1,1>UD 8UD {align1}; mov (1) g2.8<1>UD 0x1FUD {align1}; send (16) 0 g120.0<1>UW g2<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 1 {align1}; jmpi g2.24<1,1,1>D; add (16) g28.0<1>UW g98.0<16,16,1>UB g98.1<16,16,1>UB {align1}; add (16) g29.0<1>UW g99.0<16,16,1>UB g99.1<16,16,1>UB {align1}; add (16) g30.0<1>UW g100.0<16,16,1>UB g100.1<16,16,1>UB {align1}; add (16) g31.0<1>UW g101.0<16,16,1>UB g101.1<16,16,1>UB {align1}; add (16) g32.0<1>UW g102.0<16,16,1>UB g102.1<16,16,1>UB {align1}; add (16) g33.0<1>UW g103.0<16,16,1>UB g103.1<16,16,1>UB {align1}; add (16) g34.0<1>UW g104.0<16,16,1>UB g104.1<16,16,1>UB {align1}; add (16) g35.0<1>UW g105.0<16,16,1>UB g105.1<16,16,1>UB {align1}; add (16) g36.0<1>UW g106.0<16,16,1>UB g106.1<16,16,1>UB {align1}; add (16) g37.0<1>UW g107.0<16,16,1>UB g107.1<16,16,1>UB {align1}; add (16) g38.0<1>UW g108.0<16,16,1>UB g108.1<16,16,1>UB {align1}; add (16) g39.0<1>UW g109.0<16,16,1>UB g109.1<16,16,1>UB {align1}; add (16) g40.0<1>UW g110.0<16,16,1>UB g110.1<16,16,1>UB {align1}; add (16) g41.0<1>UW g111.0<16,16,1>UB g111.1<16,16,1>UB {align1}; add (16) g42.0<1>UW g112.0<16,16,1>UB g112.1<16,16,1>UB {align1}; add (16) g43.0<1>UW g113.0<16,16,1>UB g113.1<16,16,1>UB {align1}; add (16) g28.0<1>UW g28.0<16,16,1>UW g99.0<16,16,1>UB {align1}; add (16) g29.0<1>UW g29.0<16,16,1>UW g100.0<16,16,1>UB {align1}; add (16) g30.0<1>UW g30.0<16,16,1>UW g101.0<16,16,1>UB {align1}; add (16) g31.0<1>UW g31.0<16,16,1>UW g102.0<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g103.0<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g104.0<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g105.0<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g106.0<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g107.0<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g108.0<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g109.0<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g110.0<16,16,1>UB {align1}; add (16) g40.0<1>UW g40.0<16,16,1>UW g111.0<16,16,1>UB {align1}; add (16) g41.0<1>UW g41.0<16,16,1>UW g112.0<16,16,1>UB {align1}; add (16) g42.0<1>UW g42.0<16,16,1>UW g113.0<16,16,1>UB {align1}; add (16) g43.0<1>UW g43.0<16,16,1>UW g120.0<16,16,1>UB {align1}; add (16) g28.0<1>UW g28.0<16,16,1>UW g99.1<16,16,1>UB {align1}; add (16) g29.0<1>UW g29.0<16,16,1>UW g100.1<16,16,1>UB {align1}; add (16) g30.0<1>UW g30.0<16,16,1>UW g101.1<16,16,1>UB {align1}; add (16) g31.0<1>UW g31.0<16,16,1>UW g102.1<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g103.1<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g104.1<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g105.1<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g106.1<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g107.1<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g108.1<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g109.1<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g110.1<16,16,1>UB {align1}; add (16) g40.0<1>UW g40.0<16,16,1>UW g111.1<16,16,1>UB {align1}; add (16) g41.0<1>UW g41.0<16,16,1>UW g112.1<16,16,1>UB {align1}; add (16) g42.0<1>UW g42.0<16,16,1>UW g113.1<16,16,1>UB {align1}; add (16) g43.0<1>UW g43.0<16,16,1>UW g120.1<16,16,1>UB {align1}; jmpi out; add (16) g28.0<1>UW g98.1<16,16,1>UB g98.2<16,16,1>UB {align1}; add (16) g29.0<1>UW g99.1<16,16,1>UB g99.2<16,16,1>UB {align1}; add (16) g30.0<1>UW g100.1<16,16,1>UB g100.2<16,16,1>UB {align1}; add (16) g31.0<1>UW g101.1<16,16,1>UB g101.2<16,16,1>UB {align1}; add (16) g32.0<1>UW g102.1<16,16,1>UB g102.2<16,16,1>UB {align1}; add (16) g33.0<1>UW g103.1<16,16,1>UB g103.2<16,16,1>UB {align1}; add (16) g34.0<1>UW g104.1<16,16,1>UB g104.2<16,16,1>UB {align1}; add (16) g35.0<1>UW g105.1<16,16,1>UB g105.2<16,16,1>UB {align1}; add (16) g36.0<1>UW g106.1<16,16,1>UB g106.2<16,16,1>UB {align1}; add (16) g37.0<1>UW g107.1<16,16,1>UB g107.2<16,16,1>UB {align1}; add (16) g38.0<1>UW g108.1<16,16,1>UB g108.2<16,16,1>UB {align1}; add (16) g39.0<1>UW g109.1<16,16,1>UB g109.2<16,16,1>UB {align1}; add (16) g40.0<1>UW g110.1<16,16,1>UB g110.2<16,16,1>UB {align1}; add (16) g41.0<1>UW g111.1<16,16,1>UB g111.2<16,16,1>UB {align1}; add (16) g42.0<1>UW g112.1<16,16,1>UB g112.2<16,16,1>UB {align1}; add (16) g43.0<1>UW g113.1<16,16,1>UB g113.2<16,16,1>UB {align1}; add (16) g28.0<1>UW g28.0<16,16,1>UW g99.1<16,16,1>UB {align1}; add (16) g29.0<1>UW g29.0<16,16,1>UW g100.1<16,16,1>UB {align1}; add (16) g30.0<1>UW g30.0<16,16,1>UW g101.1<16,16,1>UB {align1}; add (16) g31.0<1>UW g31.0<16,16,1>UW g102.1<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g103.1<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g104.1<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g105.1<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g106.1<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g107.1<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g108.1<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g109.1<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g110.1<16,16,1>UB {align1}; add (16) g40.0<1>UW g40.0<16,16,1>UW g111.1<16,16,1>UB {align1}; add (16) g41.0<1>UW g41.0<16,16,1>UW g112.1<16,16,1>UB {align1}; add (16) g42.0<1>UW g42.0<16,16,1>UW g113.1<16,16,1>UB {align1}; add (16) g43.0<1>UW g43.0<16,16,1>UW g120.1<16,16,1>UB {align1}; add (16) g28.0<1>UW g28.0<16,16,1>UW g99.2<16,16,1>UB {align1}; add (16) g29.0<1>UW g29.0<16,16,1>UW g100.2<16,16,1>UB {align1}; add (16) g30.0<1>UW g30.0<16,16,1>UW g101.2<16,16,1>UB {align1}; add (16) g31.0<1>UW g31.0<16,16,1>UW g102.2<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g103.2<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g104.2<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g105.2<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g106.2<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g107.2<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g108.2<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g109.2<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g110.2<16,16,1>UB {align1}; add (16) g40.0<1>UW g40.0<16,16,1>UW g111.2<16,16,1>UB {align1}; add (16) g41.0<1>UW g41.0<16,16,1>UW g112.2<16,16,1>UB {align1}; add (16) g42.0<1>UW g42.0<16,16,1>UW g113.2<16,16,1>UB {align1}; add (16) g43.0<1>UW g43.0<16,16,1>UW g120.2<16,16,1>UB {align1}; jmpi out; add (16) g28.0<1>UW g98.2<16,16,1>UB g98.3<16,16,1>UB {align1}; add (16) g29.0<1>UW g99.2<16,16,1>UB g99.3<16,16,1>UB {align1}; add (16) g30.0<1>UW g100.2<16,16,1>UB g100.3<16,16,1>UB {align1}; add (16) g31.0<1>UW g101.2<16,16,1>UB g101.3<16,16,1>UB {align1}; add (16) g32.0<1>UW g102.2<16,16,1>UB g102.3<16,16,1>UB {align1}; add (16) g33.0<1>UW g103.2<16,16,1>UB g103.3<16,16,1>UB {align1}; add (16) g34.0<1>UW g104.2<16,16,1>UB g104.3<16,16,1>UB {align1}; add (16) g35.0<1>UW g105.2<16,16,1>UB g105.3<16,16,1>UB {align1}; add (16) g36.0<1>UW g106.2<16,16,1>UB g106.3<16,16,1>UB {align1}; add (16) g37.0<1>UW g107.2<16,16,1>UB g107.3<16,16,1>UB {align1}; add (16) g38.0<1>UW g108.2<16,16,1>UB g108.3<16,16,1>UB {align1}; add (16) g39.0<1>UW g109.2<16,16,1>UB g109.3<16,16,1>UB {align1}; add (16) g40.0<1>UW g110.2<16,16,1>UB g110.3<16,16,1>UB {align1}; add (16) g41.0<1>UW g111.2<16,16,1>UB g111.3<16,16,1>UB {align1}; add (16) g42.0<1>UW g112.2<16,16,1>UB g112.3<16,16,1>UB {align1}; add (16) g43.0<1>UW g113.2<16,16,1>UB g113.3<16,16,1>UB {align1}; add (16) g28.0<1>UW g28.0<16,16,1>UW g99.2<16,16,1>UB {align1}; add (16) g29.0<1>UW g29.0<16,16,1>UW g100.2<16,16,1>UB {align1}; add (16) g30.0<1>UW g30.0<16,16,1>UW g101.2<16,16,1>UB {align1}; add (16) g31.0<1>UW g31.0<16,16,1>UW g102.2<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g103.2<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g104.2<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g105.2<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g106.2<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g107.2<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g108.2<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g109.2<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g110.2<16,16,1>UB {align1}; add (16) g40.0<1>UW g40.0<16,16,1>UW g111.2<16,16,1>UB {align1}; add (16) g41.0<1>UW g41.0<16,16,1>UW g112.2<16,16,1>UB {align1}; add (16) g42.0<1>UW g42.0<16,16,1>UW g113.2<16,16,1>UB {align1}; add (16) g43.0<1>UW g43.0<16,16,1>UW g120.2<16,16,1>UB {align1}; add (16) g28.0<1>UW g28.0<16,16,1>UW g99.3<16,16,1>UB {align1}; add (16) g29.0<1>UW g29.0<16,16,1>UW g100.3<16,16,1>UB {align1}; add (16) g30.0<1>UW g30.0<16,16,1>UW g101.3<16,16,1>UB {align1}; add (16) g31.0<1>UW g31.0<16,16,1>UW g102.3<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g103.3<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g104.3<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g105.3<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g106.3<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g107.3<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g108.3<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g109.3<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g110.3<16,16,1>UB {align1}; add (16) g40.0<1>UW g40.0<16,16,1>UW g111.3<16,16,1>UB {align1}; add (16) g41.0<1>UW g41.0<16,16,1>UW g112.3<16,16,1>UB {align1}; add (16) g42.0<1>UW g42.0<16,16,1>UW g113.3<16,16,1>UB {align1}; add (16) g43.0<1>UW g43.0<16,16,1>UW g120.3<16,16,1>UB {align1}; jmpi out; add (16) g28.0<1>UW g98.3<16,16,1>UB g98.4<16,16,1>UB {align1}; add (16) g29.0<1>UW g99.3<16,16,1>UB g99.4<16,16,1>UB {align1}; add (16) g30.0<1>UW g100.3<16,16,1>UB g100.4<16,16,1>UB {align1}; add (16) g31.0<1>UW g101.3<16,16,1>UB g101.4<16,16,1>UB {align1}; add (16) g32.0<1>UW g102.3<16,16,1>UB g102.4<16,16,1>UB {align1}; add (16) g33.0<1>UW g103.3<16,16,1>UB g103.4<16,16,1>UB {align1}; add (16) g34.0<1>UW g104.3<16,16,1>UB g104.4<16,16,1>UB {align1}; add (16) g35.0<1>UW g105.3<16,16,1>UB g105.4<16,16,1>UB {align1}; add (16) g36.0<1>UW g106.3<16,16,1>UB g106.4<16,16,1>UB {align1}; add (16) g37.0<1>UW g107.3<16,16,1>UB g107.4<16,16,1>UB {align1}; add (16) g38.0<1>UW g108.3<16,16,1>UB g108.4<16,16,1>UB {align1}; add (16) g39.0<1>UW g109.3<16,16,1>UB g109.4<16,16,1>UB {align1}; add (16) g40.0<1>UW g110.3<16,16,1>UB g110.4<16,16,1>UB {align1}; add (16) g41.0<1>UW g111.3<16,16,1>UB g111.4<16,16,1>UB {align1}; add (16) g42.0<1>UW g112.3<16,16,1>UB g112.4<16,16,1>UB {align1}; add (16) g43.0<1>UW g113.3<16,16,1>UB g113.4<16,16,1>UB {align1}; add (16) g28.0<1>UW g28.0<16,16,1>UW g99.3<16,16,1>UB {align1}; add (16) g29.0<1>UW g29.0<16,16,1>UW g100.3<16,16,1>UB {align1}; add (16) g30.0<1>UW g30.0<16,16,1>UW g101.3<16,16,1>UB {align1}; add (16) g31.0<1>UW g31.0<16,16,1>UW g102.3<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g103.3<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g104.3<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g105.3<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g106.3<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g107.3<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g108.3<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g109.3<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g110.3<16,16,1>UB {align1}; add (16) g40.0<1>UW g40.0<16,16,1>UW g111.3<16,16,1>UB {align1}; add (16) g41.0<1>UW g41.0<16,16,1>UW g112.3<16,16,1>UB {align1}; add (16) g42.0<1>UW g42.0<16,16,1>UW g113.3<16,16,1>UB {align1}; add (16) g43.0<1>UW g43.0<16,16,1>UW g120.3<16,16,1>UB {align1}; add (16) g28.0<1>UW g28.0<16,16,1>UW g99.4<16,16,1>UB {align1}; add (16) g29.0<1>UW g29.0<16,16,1>UW g100.4<16,16,1>UB {align1}; add (16) g30.0<1>UW g30.0<16,16,1>UW g101.4<16,16,1>UB {align1}; add (16) g31.0<1>UW g31.0<16,16,1>UW g102.4<16,16,1>UB {align1}; add (16) g32.0<1>UW g32.0<16,16,1>UW g103.4<16,16,1>UB {align1}; add (16) g33.0<1>UW g33.0<16,16,1>UW g104.4<16,16,1>UB {align1}; add (16) g34.0<1>UW g34.0<16,16,1>UW g105.4<16,16,1>UB {align1}; add (16) g35.0<1>UW g35.0<16,16,1>UW g106.4<16,16,1>UB {align1}; add (16) g36.0<1>UW g36.0<16,16,1>UW g107.4<16,16,1>UB {align1}; add (16) g37.0<1>UW g37.0<16,16,1>UW g108.4<16,16,1>UB {align1}; add (16) g38.0<1>UW g38.0<16,16,1>UW g109.4<16,16,1>UB {align1}; add (16) g39.0<1>UW g39.0<16,16,1>UW g110.4<16,16,1>UB {align1}; add (16) g40.0<1>UW g40.0<16,16,1>UW g111.4<16,16,1>UB {align1}; add (16) g41.0<1>UW g41.0<16,16,1>UW g112.4<16,16,1>UB {align1}; add (16) g42.0<1>UW g42.0<16,16,1>UW g113.4<16,16,1>UB {align1}; add (16) g43.0<1>UW g43.0<16,16,1>UW g120.4<16,16,1>UB {align1}; out: shr.sat (16) g28.0<1>UW g28.0<16,16,1>UW 2UW {align1}; shr.sat (16) g29.0<1>UW g29.0<16,16,1>UW 2UW {align1}; shr.sat (16) g30.0<1>UW g30.0<16,16,1>UW 2UW {align1}; shr.sat (16) g31.0<1>UW g31.0<16,16,1>UW 2UW {align1}; shr.sat (16) g32.0<1>UW g32.0<16,16,1>UW 2UW {align1}; shr.sat (16) g33.0<1>UW g33.0<16,16,1>UW 2UW {align1}; shr.sat (16) g34.0<1>UW g34.0<16,16,1>UW 2UW {align1}; shr.sat (16) g35.0<1>UW g35.0<16,16,1>UW 2UW {align1}; shr.sat (16) g36.0<1>UW g36.0<16,16,1>UW 2UW {align1}; shr.sat (16) g37.0<1>UW g37.0<16,16,1>UW 2UW {align1}; shr.sat (16) g38.0<1>UW g38.0<16,16,1>UW 2UW {align1}; shr.sat (16) g39.0<1>UW g39.0<16,16,1>UW 2UW {align1}; shr.sat (16) g40.0<1>UW g40.0<16,16,1>UW 2UW {align1}; shr.sat (16) g41.0<1>UW g41.0<16,16,1>UW 2UW {align1}; shr.sat (16) g42.0<1>UW g42.0<16,16,1>UW 2UW {align1}; shr.sat (16) g43.0<1>UW g43.0<16,16,1>UW 2UW {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/frame_forward.g4b0000664000175000017500000011463512400044327017773 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x00b10040, 0x04110203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x0020000c, 0x202e3dad, 0x00450e6e, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450e60, 0x0045002e }, { 0x01000005, 0x20000d3c, 0x00210e6e, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000012b }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000de }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000031 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a004 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x008d0040, 0x0411a004 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x00800040, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x00800040, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x00800040, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x00800040, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x00800040, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x00800040, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x00800040, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x00800040, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x00800040, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x00800040, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x00800040, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x00800040, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x00800040, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x00800040, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x00800040, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c60 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c80 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca0 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc0 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce0 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d00 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d20 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d40 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d60 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d80 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da0 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc0 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de0 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e00 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e20 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f00 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000092 }, { 0x00800040, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x00800040, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x00800040, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x00800040, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x00800040, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x00800040, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x00800040, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x00800040, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x00800040, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x00800040, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x00800040, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x00800040, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x00800040, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x00800040, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x00800040, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x00800040, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000061 }, { 0x00800040, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x00800040, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x00800040, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x00800040, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x00800040, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x00800040, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x00800040, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x00800040, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x00800040, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x00800040, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x00800040, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x00800040, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x00800040, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x00800040, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x00800040, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x00800040, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x00800040, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x00800040, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x00800040, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x00800040, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x00800040, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x00800040, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x00800040, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x00800040, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x00800040, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x00800040, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x00800040, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x00800040, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x00800040, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x00800040, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x00800040, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c64 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c84 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca4 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc4 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce4 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d04 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d24 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d44 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d64 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d84 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da4 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc4 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de4 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e04 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e24 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f04 }, { 0x80800008, 0x23802d29, 0x00b10380, 0x00020002 }, { 0x80800008, 0x23a02d29, 0x00b103a0, 0x00020002 }, { 0x80800008, 0x23c02d29, 0x00b103c0, 0x00020002 }, { 0x80800008, 0x23e02d29, 0x00b103e0, 0x00020002 }, { 0x80800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x80800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x80800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x80800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x80800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x80800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x80800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x80800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x80800008, 0x25002d29, 0x00b10500, 0x00020002 }, { 0x80800008, 0x25202d29, 0x00b10520, 0x00020002 }, { 0x80800008, 0x25402d29, 0x00b10540, 0x00020002 }, { 0x80800008, 0x25602d29, 0x00b10560, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000e5 }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20581c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a004 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000004e }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a004 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x008d0040, 0x0411a004 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c60 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c80 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10ca0 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10cc0 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10ce0 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10d00 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d20 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d40 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d60 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d80 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10da0 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10dc0 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10de0 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10e00 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e20 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10f00 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c61 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c81 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10ca1 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10cc1 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10ce1 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10d01 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d21 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d41 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d61 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d81 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10da1 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10dc1 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10de1 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10e01 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e21 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c62 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c82 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10ca2 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10cc2 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10ce2 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10d02 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d22 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d42 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d62 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d82 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10da2 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10dc2 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10de2 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10e02 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e22 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c63 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c83 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10ca3 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10cc3 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10ce3 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10d03 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d23 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d43 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d63 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d83 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10da3 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10dc3 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10de3 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10e03 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e23 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x008d0040, 0x0418a004 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x008d0040, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x23800229, 0x00b10c40, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c60, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c80, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca0, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc0, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce0, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d00, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d20, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d40, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d60, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d80, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da0, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc0, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de0, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e00, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e20, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00800001, 0x23800229, 0x00b10c41, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c61, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c81, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca1, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc1, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce1, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d01, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d21, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d41, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d61, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d81, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da1, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc1, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de1, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e01, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e21, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x00800001, 0x23800229, 0x00b10c42, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c62, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c82, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca2, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc2, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce2, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d02, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d22, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d42, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d62, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d82, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da2, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc2, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de2, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e02, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e22, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x23800229, 0x00b10c43, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c63, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c83, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca3, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc3, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce3, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d03, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d23, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d43, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d63, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d83, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da3, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc3, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de3, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e03, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e23, 0x00000000 }, { 0x00200008, 0x20200c21, 0x00450e60, 0x00000001 }, { 0x0020000c, 0x2e6e3dad, 0x00450e6e, 0x00010001 }, { 0x0020000c, 0x202e3dad, 0x00450e6e, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450020, 0x0045002e }, { 0x00000001, 0x20480061, 0x00000000, 0x0007000f }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00800031, 0x2ac01d29, 0x008d0040, 0x0414a005 }, { 0x00800031, 0x2b401d29, 0x008d0040, 0x0414a006 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x25800229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b40, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x25800229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b41, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x25800229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b42, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x25800229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b43, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba3, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05902000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/lib_igd.g4b0000664000175000017500000007374212400044327016551 00000000000000 { 0x00000020, 0x34001c00, 0x00001400, 0x00000051 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000f0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000fc }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000016f }, { 0x00000020, 0x34001c00, 0x00001400, 0x000001da }, { 0x00800001, 0x2a8001ad, 0x00b10420, 0x00000000 }, { 0x00800001, 0x2aa001ad, 0x00b10440, 0x00000000 }, { 0x00800001, 0x2ac001ad, 0x00b10460, 0x00000000 }, { 0x00800001, 0x2ae001ad, 0x00b10480, 0x00000000 }, { 0x00800001, 0x2b0001ad, 0x00b104a0, 0x00000000 }, { 0x00800001, 0x2b2001ad, 0x00b104c0, 0x00000000 }, { 0x00800001, 0x2b4001ad, 0x00b104e0, 0x00000000 }, { 0x00800001, 0x2b6001ad, 0x00b10500, 0x00000000 }, { 0x00800001, 0x2b8001ad, 0x00b10520, 0x00000000 }, { 0x00800001, 0x2ba001ad, 0x00b10540, 0x00000000 }, { 0x00800001, 0x2bc001ad, 0x00b10560, 0x00000000 }, { 0x00800001, 0x2be001ad, 0x00b10580, 0x00000000 }, { 0x00800001, 0x2c0001ad, 0x00b105a0, 0x00000000 }, { 0x00800001, 0x2c2001ad, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x2c4001ad, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x2c6001ad, 0x00b10600, 0x00000000 }, { 0x00800001, 0x2c8001ad, 0x00b10620, 0x00000000 }, { 0x00800001, 0x2ca001ad, 0x00b10640, 0x00000000 }, { 0x00800001, 0x2cc001ad, 0x00b10660, 0x00000000 }, { 0x00800001, 0x2ce001ad, 0x00b10680, 0x00000000 }, { 0x00800001, 0x2d0001ad, 0x00b106a0, 0x00000000 }, { 0x00800001, 0x2d2001ad, 0x00b106c0, 0x00000000 }, { 0x00800001, 0x2d4001ad, 0x00b106e0, 0x00000000 }, { 0x00800001, 0x2d6001ad, 0x00b10700, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x2a8001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2aa001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ac001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ae001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b0001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b2001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b4001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b6001ed, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x2a9001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ab001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ad001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2af001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b1001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b3001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b5001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2b7001ed, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x2b8001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2ba001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bc001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2be001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c0001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c2001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c4001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c6001ed, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x2b9001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bb001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bd001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2bf001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c1001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c3001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c5001ed, 0x00000000, 0x00000000 }, { 0x00600001, 0x2c7001ed, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x2c8001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2ca001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2cc001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2ce001ed, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x00210a4c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x2d0001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d2001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d4001ed, 0x00000000, 0x00000000 }, { 0x00800001, 0x2d6001ed, 0x00000000, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x01000005, 0x20000d3c, 0x00218000, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000067 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20000d3c, 0x00218000, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000049 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210410, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, { 0x00800040, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800040, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800040, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800040, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800040, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800040, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800040, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800040, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800040, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800040, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800040, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800040, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800040, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800040, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800040, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800040, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e0 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10500 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10520 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10540 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10560 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10580 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a0 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c0 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e0 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10600 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10620 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10640 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10660 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10680 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a0 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c0 }, { 0x00800040, 0x27404529, 0x00b10740, 0x00b104e1 }, { 0x00800040, 0x27604529, 0x00b10760, 0x00b10501 }, { 0x00800040, 0x27804529, 0x00b10780, 0x00b10521 }, { 0x00800040, 0x27a04529, 0x00b107a0, 0x00b10541 }, { 0x00800040, 0x27c04529, 0x00b107c0, 0x00b10561 }, { 0x00800040, 0x27e04529, 0x00b107e0, 0x00b10581 }, { 0x00800040, 0x28004529, 0x00b10800, 0x00b105a1 }, { 0x00800040, 0x28204529, 0x00b10820, 0x00b105c1 }, { 0x00800040, 0x28404529, 0x00b10840, 0x00b105e1 }, { 0x00800040, 0x28604529, 0x00b10860, 0x00b10601 }, { 0x00800040, 0x28804529, 0x00b10880, 0x00b10621 }, { 0x00800040, 0x28a04529, 0x00b108a0, 0x00b10641 }, { 0x00800040, 0x28c04529, 0x00b108c0, 0x00b10661 }, { 0x00800040, 0x28e04529, 0x00b108e0, 0x00b10681 }, { 0x00800040, 0x29004529, 0x00b10900, 0x00b106a1 }, { 0x00800040, 0x29204529, 0x00b10920, 0x00b106c1 }, { 0x00a02008, 0x27402d29, 0x00b10740, 0x00020002 }, { 0x00a02008, 0x27802d29, 0x00b10780, 0x00020002 }, { 0x00a02008, 0x27c02d29, 0x00b107c0, 0x00020002 }, { 0x00a02008, 0x28002d29, 0x00b10800, 0x00020002 }, { 0x00a02008, 0x28402d29, 0x00b10840, 0x00020002 }, { 0x00a02008, 0x28802d29, 0x00b10880, 0x00020002 }, { 0x00a02008, 0x28c02d29, 0x00b108c0, 0x00020002 }, { 0x00a02008, 0x29002d29, 0x00b10900, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000051 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210410, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104c1 }, { 0x00800042, 0x27604629, 0x00b104e0, 0x00b104e1 }, { 0x00800042, 0x27804629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x27a04629, 0x00b10520, 0x00b10521 }, { 0x00800042, 0x27c04629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x27e04629, 0x00b10560, 0x00b10561 }, { 0x00800042, 0x28004629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x28204629, 0x00b105a0, 0x00b105a1 }, { 0x00800042, 0x28404629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x28604629, 0x00b105e0, 0x00b105e1 }, { 0x00800042, 0x28804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x28a04629, 0x00b10620, 0x00b10621 }, { 0x00800042, 0x28c04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x28e04629, 0x00b10660, 0x00b10661 }, { 0x00800042, 0x29004629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x29204629, 0x00b106a0, 0x00b106a1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000036 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20000d3c, 0x00218000, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000021 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210410, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00000001, 0x24080061, 0x00000000, 0x0000001f }, { 0x00800031, 0x26c01d29, 0x008d0400, 0x0411a007 }, { 0x00800042, 0x27404629, 0x00b104c0, 0x00b104e0 }, { 0x00800042, 0x27604629, 0x00b104e0, 0x00b10500 }, { 0x00800042, 0x27804629, 0x00b10500, 0x00b10520 }, { 0x00800042, 0x27a04629, 0x00b10520, 0x00b10540 }, { 0x00800042, 0x27c04629, 0x00b10540, 0x00b10560 }, { 0x00800042, 0x27e04629, 0x00b10560, 0x00b10580 }, { 0x00800042, 0x28004629, 0x00b10580, 0x00b105a0 }, { 0x00800042, 0x28204629, 0x00b105a0, 0x00b105c0 }, { 0x00800042, 0x28404629, 0x00b105c0, 0x00b105e0 }, { 0x00800042, 0x28604629, 0x00b105e0, 0x00b10600 }, { 0x00800042, 0x28804629, 0x00b10600, 0x00b10620 }, { 0x00800042, 0x28a04629, 0x00b10620, 0x00b10640 }, { 0x00800042, 0x28c04629, 0x00b10640, 0x00b10660 }, { 0x00800042, 0x28e04629, 0x00b10660, 0x00b10680 }, { 0x00800042, 0x29004629, 0x00b10680, 0x00b106a0 }, { 0x00800042, 0x29204629, 0x00b106a0, 0x00b106c0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000012 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210410, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a004 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x24c01d29, 0x008d0400, 0x0418a007 }, { 0x00000040, 0x24040c21, 0x00210404, 0x00000008 }, { 0x00800031, 0x25c01d29, 0x008d0400, 0x0418a007 }, { 0x00a02001, 0x27400229, 0x00b104c0, 0x00000000 }, { 0x00a02001, 0x27800229, 0x00b10500, 0x00000000 }, { 0x00a02001, 0x27c00229, 0x00b10540, 0x00000000 }, { 0x00a02001, 0x28000229, 0x00b10580, 0x00000000 }, { 0x00a02001, 0x28400229, 0x00b105c0, 0x00000000 }, { 0x00a02001, 0x28800229, 0x00b10600, 0x00000000 }, { 0x00a02001, 0x28c00229, 0x00b10640, 0x00000000 }, { 0x00a02001, 0x29000229, 0x00b10680, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x00000001, 0x24080061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210410, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00800031, 0x24401d29, 0x008d0400, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0400, 0x0414a009 }, { 0x00a02001, 0x29400229, 0x00ad0440, 0x00000000 }, { 0x00a02001, 0x29800229, 0x00ad0480, 0x00000000 }, { 0x00a02001, 0x29c00229, 0x00ad0580, 0x00000000 }, { 0x00a02001, 0x2a000229, 0x00ad05c0, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000043 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000041 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000002e }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x008d0e60, 0x0411a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000012 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0418a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000041 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00600040, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600040, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600040, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600040, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0501 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0521 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0541 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0561 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0521 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0541 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0561 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0581 }, { 0x00600040, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600040, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600040, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600040, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05a1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05c1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d05e1 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0601 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05c1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05e1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d0601 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000039 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0414a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0501 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0521 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0541 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0561 }, { 0x00600042, 0x24804629, 0x008d0580, 0x008d0581 }, { 0x00600042, 0x24a04629, 0x008d05a0, 0x008d05a1 }, { 0x00600042, 0x24c04629, 0x008d05c0, 0x008d05c1 }, { 0x00600042, 0x24e04629, 0x008d05e0, 0x008d05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000028 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000007 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a005 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x25a01d29, 0x008d0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x008d0e60, 0x0411a008 }, { 0x00800031, 0x26201d29, 0x008d0e60, 0x0411a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600042, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000003 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a005 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0414a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000002 }, { 0x00800031, 0x25001d29, 0x008d0e60, 0x0414a008 }, { 0x00800031, 0x26001d29, 0x008d0e60, 0x0414a009 }, { 0x00802001, 0x24000229, 0x008d0500, 0x00000000 }, { 0x00802001, 0x24400229, 0x008d0540, 0x00000000 }, { 0x00802001, 0x24800229, 0x008d0600, 0x00000000 }, { 0x00802001, 0x24c00229, 0x008d0640, 0x00000000 }, { 0x00000040, 0x34000c20, 0x00210fc8, 0x00000020 }, { 0x00200001, 0x23e00021, 0x00450a40, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000d }, { 0x80a02040, 0x474045b1, 0x00b10a80, 0x00b20740 }, { 0x80a02040, 0x478045b1, 0x00b10ac0, 0x00b20780 }, { 0x80a02040, 0x47c045b1, 0x00b10b00, 0x00b207c0 }, { 0x80a02040, 0x480045b1, 0x00b10b40, 0x00b20800 }, { 0x80a02040, 0x484045b1, 0x00b10b80, 0x00b20840 }, { 0x80a02040, 0x488045b1, 0x00b10bc0, 0x00b20880 }, { 0x80a02040, 0x48c045b1, 0x00b10c00, 0x00b208c0 }, { 0x80a02040, 0x490045b1, 0x00b10c40, 0x00b20900 }, { 0x80a02040, 0x494045b1, 0x00b10c80, 0x00b20940 }, { 0x80a02040, 0x498045b1, 0x00b10cc0, 0x00b20980 }, { 0x80a02040, 0x49c045b1, 0x00b10d00, 0x00b209c0 }, { 0x80a02040, 0x4a0045b1, 0x00b10d40, 0x00b20a00 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x80800040, 0x474045b1, 0x00b10a80, 0x00b20740 }, { 0x80800040, 0x476045b1, 0x00b10b80, 0x00b20760 }, { 0x80800040, 0x478045b1, 0x00b10aa0, 0x00b20780 }, { 0x80800040, 0x47a045b1, 0x00b10ba0, 0x00b207a0 }, { 0x80800040, 0x47c045b1, 0x00b10ac0, 0x00b207c0 }, { 0x80800040, 0x47e045b1, 0x00b10bc0, 0x00b207e0 }, { 0x80800040, 0x480045b1, 0x00b10ae0, 0x00b20800 }, { 0x80800040, 0x482045b1, 0x00b10be0, 0x00b20820 }, { 0x80800040, 0x484045b1, 0x00b10b00, 0x00b20840 }, { 0x80800040, 0x486045b1, 0x00b10c00, 0x00b20860 }, { 0x80800040, 0x488045b1, 0x00b10b20, 0x00b20880 }, { 0x80800040, 0x48a045b1, 0x00b10c20, 0x00b208a0 }, { 0x80800040, 0x48c045b1, 0x00b10b40, 0x00b208c0 }, { 0x80800040, 0x48e045b1, 0x00b10c40, 0x00b208e0 }, { 0x80800040, 0x490045b1, 0x00b10b60, 0x00b20900 }, { 0x80800040, 0x492045b1, 0x00b10c60, 0x00b20920 }, { 0x00800040, 0x2c8045ad, 0x00b10c80, 0x00b20940 }, { 0x00800040, 0x2ca045ad, 0x00b10ca0, 0x00b20960 }, { 0x00800040, 0x2cc045ad, 0x00b10cc0, 0x00b20980 }, { 0x00800040, 0x2ce045ad, 0x00b10ce0, 0x00b209a0 }, { 0x00800040, 0x2d0045ad, 0x00b10d00, 0x00b209c0 }, { 0x00800040, 0x2d2045ad, 0x00b10d20, 0x00b209e0 }, { 0x00800040, 0x2d4045ad, 0x00b10d40, 0x00b20a00 }, { 0x00800040, 0x2d6045ad, 0x00b10d60, 0x00b20a20 }, { 0x80800001, 0x494001b1, 0x00b10c80, 0x00000000 }, { 0x80800001, 0x496001b1, 0x00b10ca0, 0x00000000 }, { 0x80800001, 0x498001b1, 0x00b10cc0, 0x00000000 }, { 0x80800001, 0x49a001b1, 0x00b10ce0, 0x00000000 }, { 0x80800001, 0x49c001b1, 0x00b10d00, 0x00000000 }, { 0x80800001, 0x49e001b1, 0x00b10d20, 0x00000000 }, { 0x80800001, 0x4a0001b1, 0x00b10d40, 0x00000000 }, { 0x80800001, 0x4a2001b1, 0x00b10d60, 0x00000000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x00800001, 0x20200232, 0x00b20740, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20760, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20780, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b207a0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b207c0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b207e0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20800, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20820, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20840, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20860, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20880, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b208a0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b208c0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b208e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20900, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20920, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05902000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x004503e0, 0x00000001 }, { 0x00800001, 0x20200232, 0x00b20940, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20960, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20980, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b209a0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302001 }, { 0x00800001, 0x20200232, 0x00b209c0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b209e0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20a00, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20a20, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d03e0, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x0y1_uv.g4i0000664000175000017500000000766512400044327020641 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g115.8<1>UD 0x07000FUD {align1}; // 8*16/32=4 send (16) 0 g86.0<1>UW g115<16,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g91.0<1>UW g115<16,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V mov (1) g115.8<1>UD 0xFUD {align1}; send (16) 0 g90.0<1>UW g115<16,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1}; send (16) 0 g95.0<1>UW g115<16,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1}; and (1) g2.24<1>UD g115.0<1,1,1>UD 3UD {align1}; mul (1) g2.24<1>UD g2.24<1,1,1>UD 9UD {align1}; jmpi g2.24<1,1,1>D; avg.sat (16) g78.0<1>UW g86.0<16,8,1>UB g87.0<16,8,1>UB {align1}; avg.sat (16) g79.0<1>UW g87.0<16,8,1>UB g88.0<16,8,1>UB {align1}; avg.sat (16) g80.0<1>UW g88.0<16,8,1>UB g89.0<16,8,1>UB {align1}; avg.sat (16) g81.0<1>UW g89.0<16,8,1>UB g90.0<16,8,1>UB {align1}; avg.sat (16) g82.0<1>UW g91.0<16,8,1>UB g92.0<16,8,1>UB {align1}; avg.sat (16) g83.0<1>UW g92.0<16,8,1>UB g93.0<16,8,1>UB {align1}; avg.sat (16) g84.0<1>UW g93.0<16,8,1>UB g94.0<16,8,1>UB {align1}; avg.sat (16) g85.0<1>UW g94.0<16,8,1>UB g95.0<16,8,1>UB {align1}; jmpi out; avg.sat (16) g78.0<1>UW g86.1<16,8,1>UB g87.1<16,8,1>UB {align1}; avg.sat (16) g79.0<1>UW g87.1<16,8,1>UB g88.1<16,8,1>UB {align1}; avg.sat (16) g80.0<1>UW g88.1<16,8,1>UB g89.1<16,8,1>UB {align1}; avg.sat (16) g81.0<1>UW g89.1<16,8,1>UB g90.1<16,8,1>UB {align1}; avg.sat (16) g82.0<1>UW g91.1<16,8,1>UB g92.1<16,8,1>UB {align1}; avg.sat (16) g83.0<1>UW g92.1<16,8,1>UB g93.1<16,8,1>UB {align1}; avg.sat (16) g84.0<1>UW g93.1<16,8,1>UB g94.1<16,8,1>UB {align1}; avg.sat (16) g85.0<1>UW g94.1<16,8,1>UB g95.1<16,8,1>UB {align1}; jmpi out; avg.sat (16) g78.0<1>UW g86.2<16,8,1>UB g87.2<16,8,1>UB {align1}; avg.sat (16) g79.0<1>UW g87.2<16,8,1>UB g88.2<16,8,1>UB {align1}; avg.sat (16) g80.0<1>UW g88.2<16,8,1>UB g89.2<16,8,1>UB {align1}; avg.sat (16) g81.0<1>UW g89.2<16,8,1>UB g90.2<16,8,1>UB {align1}; avg.sat (16) g82.0<1>UW g91.2<16,8,1>UB g92.2<16,8,1>UB {align1}; avg.sat (16) g83.0<1>UW g92.2<16,8,1>UB g93.2<16,8,1>UB {align1}; avg.sat (16) g84.0<1>UW g93.2<16,8,1>UB g94.2<16,8,1>UB {align1}; avg.sat (16) g85.0<1>UW g94.2<16,8,1>UB g95.2<16,8,1>UB {align1}; jmpi out; avg.sat (16) g78.0<1>UW g86.3<16,8,1>UB g86.3<16,8,1>UB {align1}; avg.sat (16) g79.0<1>UW g87.3<16,8,1>UB g87.3<16,8,1>UB {align1}; avg.sat (16) g80.0<1>UW g88.3<16,8,1>UB g88.3<16,8,1>UB {align1}; avg.sat (16) g81.0<1>UW g89.3<16,8,1>UB g89.3<16,8,1>UB {align1}; avg.sat (16) g82.0<1>UW g91.3<16,8,1>UB g91.3<16,8,1>UB {align1}; avg.sat (16) g83.0<1>UW g92.3<16,8,1>UB g92.3<16,8,1>UB {align1}; avg.sat (16) g84.0<1>UW g93.3<16,8,1>UB g93.3<16,8,1>UB {align1}; avg.sat (16) g85.0<1>UW g94.3<16,8,1>UB g94.3<16,8,1>UB {align1}; out: xf86-video-intel-2.99.917/xvmc/shader/mc/motion_field_uv_igd.g4i0000664000175000017500000000355612400044327021170 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng */ and.z (1) null g[a0.0]<1,1,1>UW 2UW {align1}; (f0) jmpi L1; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x2UD {align1}; and.z (1) null g[a0.0]<1,1,1>UW 2UW {align1}; (f0) jmpi L2; include(`read_field_x1y1_uv_igd.g4i') jmpi L5; L2: include(`read_field_x1y0_uv_igd.g4i') jmpi L5; L1: add (1) a0.0<1>UD a0.0<1,1,1>UD 0x2UD {align1}; and.z (1) null g[a0.0]<1,1,1>UW 2UW {align1}; (f0) jmpi L4; include(`read_field_x0y1_uv_igd.g4i') jmpi L5; L4: include(`read_field_x0y0_uv_igd.g4i') L5: xf86-video-intel-2.99.917/xvmc/shader/mc/addidct_igd.g4i0000664000175000017500000001300312400044327017366 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g84~g107:IDCT data */ //mov (2) g31.0<1>UD g82.12<2,2,1>UW {align1}; //restore x and y mov (2) g31.0<1>UD g82.0<2,2,1>UD {align1}; //restore x and y and.nz (1) null g82.30<1,1,1>UB 0x1UW {align1}; //dct_type (f0) jmpi field_dct; add.sat (32) g58.0<2>UB g84.0<16,16,1>W g58.0<16,16,2>UB {align1 compr}; add.sat (32) g60.0<2>UB g86.0<16,16,1>W g60.0<16,16,2>UB {align1 compr}; add.sat (32) g62.0<2>UB g88.0<16,16,1>W g62.0<16,16,2>UB {align1 compr}; add.sat (32) g64.0<2>UB g90.0<16,16,1>W g64.0<16,16,2>UB {align1 compr}; add.sat (32) g66.0<2>UB g92.0<16,16,1>W g66.0<16,16,2>UB {align1 compr}; add.sat (32) g68.0<2>UB g94.0<16,16,1>W g68.0<16,16,2>UB {align1 compr}; add.sat (32) g70.0<2>UB g96.0<16,16,1>W g70.0<16,16,2>UB {align1 compr}; add.sat (32) g72.0<2>UB g98.0<16,16,1>W g72.0<16,16,2>UB {align1 compr}; add.sat (32) g74.0<2>UB g100.0<16,16,1>W g74.0<16,16,2>UB {align1 compr}; add.sat (32) g76.0<2>UB g102.0<16,16,1>W g76.0<16,16,2>UB {align1 compr}; add.sat (32) g78.0<2>UB g104.0<16,16,1>W g78.0<16,16,2>UB {align1 compr}; add.sat (32) g80.0<2>UB g106.0<16,16,1>W g80.0<16,16,2>UB {align1 compr}; jmpi write_back; field_dct: add.sat (16) g58.0<2>UB g84.0<16,16,1>W g58.0<16,16,2>UB {align1}; add.sat (16) g59.0<2>UB g92.0<16,16,1>W g59.0<16,16,2>UB {align1}; add.sat (16) g60.0<2>UB g85.0<16,16,1>W g60.0<16,16,2>UB {align1}; add.sat (16) g61.0<2>UB g93.0<16,16,1>W g61.0<16,16,2>UB {align1}; add.sat (16) g62.0<2>UB g86.0<16,16,1>W g62.0<16,16,2>UB {align1}; add.sat (16) g63.0<2>UB g94.0<16,16,1>W g63.0<16,16,2>UB {align1}; add.sat (16) g64.0<2>UB g87.0<16,16,1>W g64.0<16,16,2>UB {align1}; add.sat (16) g65.0<2>UB g95.0<16,16,1>W g65.0<16,16,2>UB {align1}; add.sat (16) g66.0<2>UB g88.0<16,16,1>W g66.0<16,16,2>UB {align1}; add.sat (16) g67.0<2>UB g96.0<16,16,1>W g67.0<16,16,2>UB {align1}; add.sat (16) g68.0<2>UB g89.0<16,16,1>W g68.0<16,16,2>UB {align1}; add.sat (16) g69.0<2>UB g97.0<16,16,1>W g69.0<16,16,2>UB {align1}; add.sat (16) g70.0<2>UB g90.0<16,16,1>W g70.0<16,16,2>UB {align1}; add.sat (16) g71.0<2>UB g98.0<16,16,1>W g71.0<16,16,2>UB {align1}; add.sat (16) g72.0<2>UB g91.0<16,16,1>W g72.0<16,16,2>UB {align1}; add.sat (16) g73.0<2>UB g99.0<16,16,1>W g73.0<16,16,2>UB {align1}; /* add.sat (16) g74.0<2>UB g100.0<16,16,1>W g74.0<16,16,2>UB {align1}; add.sat (16) g75.0<2>UB g101.0<16,16,1>W g75.0<16,16,2>UB {align1}; add.sat (16) g76.0<2>UB g102.0<16,16,1>W g76.0<16,16,2>UB {align1}; add.sat (16) g77.0<2>UB g103.0<16,16,1>W g77.0<16,16,2>UB {align1}; add.sat (16) g78.0<2>UB g104.0<16,16,1>W g78.0<16,16,2>UB {align1}; add.sat (16) g79.0<2>UB g105.0<16,16,1>W g79.0<16,16,2>UB {align1}; add.sat (16) g80.0<2>UB g106.0<16,16,1>W g80.0<16,16,2>UB {align1}; add.sat (16) g81.0<2>UB g107.0<16,16,1>W g81.0<16,16,2>UB {align1}; */ add (16) g100.0<1>W g100.0<16,16,1>W g74.0<16,16,2>UB {align1}; add (16) g101.0<1>W g101.0<16,16,1>W g75.0<16,16,2>UB {align1}; add (16) g102.0<1>W g102.0<16,16,1>W g76.0<16,16,2>UB {align1}; add (16) g103.0<1>W g103.0<16,16,1>W g77.0<16,16,2>UB {align1}; add (16) g104.0<1>W g104.0<16,16,1>W g78.0<16,16,2>UB {align1}; add (16) g105.0<1>W g105.0<16,16,1>W g79.0<16,16,2>UB {align1}; add (16) g106.0<1>W g106.0<16,16,1>W g80.0<16,16,2>UB {align1}; add (16) g107.0<1>W g107.0<16,16,1>W g81.0<16,16,2>UB {align1}; mov.sat (16) g74.0<2>UB g100.0<16,16,1>W {align1}; mov.sat (16) g75.0<2>UB g101.0<16,16,1>W {align1}; mov.sat (16) g76.0<2>UB g102.0<16,16,1>W {align1}; mov.sat (16) g77.0<2>UB g103.0<16,16,1>W {align1}; mov.sat (16) g78.0<2>UB g104.0<16,16,1>W {align1}; mov.sat (16) g79.0<2>UB g105.0<16,16,1>W {align1}; mov.sat (16) g80.0<2>UB g106.0<16,16,1>W {align1}; mov.sat (16) g81.0<2>UB g107.0<16,16,1>W {align1}; write_back: mov (1) g31.8<1>UD 0x00F000FUD {align1}; mov (16) m1.0<1>UB g58.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g59.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g60.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g61.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g62.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g63.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g64.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g65.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g66.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g67.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g68.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g69.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g70.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g71.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g72.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g73.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; //U mov (1) g31.8<1>UD 0x0070007UD { align1 }; shr (2) g31.0<1>UD g31.0<2,2,1>UD 1D {align1}; mov (16) m1.0<1>UB g74.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g75.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g76.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g77.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; //V mov (16) m1.0<1>UB g78.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g79.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g80.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g81.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/motion_frame_y_igd.g4i0000664000175000017500000000361112400044327021005 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai */ /* if (motion_vect.x & 1) { * if (motion_vect.y & 1) * half_pixel in x and y; * else * half_pixel in x; * } else { * if (motion_vect.y & 1) * half_pixel y; * else * full_pixel_read; * } */ and.z (1) null g[a0.0]<1,1,1>UW 1UD {align1}; (f0) jmpi LL1; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x2UD {align1}; and.z (1) null g[a0.0]<1,1,1>UW 1UD {align1}; (f0) jmpi LL2; include(`read_frame_x1y1_y_igd.g4i') jmpi LL5; LL2: include(`read_frame_x1y0_y_igd.g4i') jmpi LL5; LL1: add (1) a0.0<1>UD a0.0<1,1,1>UD 0x2UD {align1}; and.z (1) null g[a0.0]<1,1,1>UW 1UD {align1}; (f0) jmpi LL4; include(`read_frame_x0y1_y_igd.g4i') jmpi LL5; LL4: include(`read_frame_x0y0_y_igd.g4i') LL5: xf86-video-intel-2.99.917/xvmc/shader/mc/addidct.g4i0000664000175000017500000001563312400044327016556 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (8) g1.0<1>UD g76.0<8,8,1>UD{align1}; //mov (8) g2.0<1>UD g77.0<8,8,1>UD{align1}; mov (16) g44.1<2>UB 0W {align1}; mov (16) g45.1<2>UB 0W {align1}; mov (16) g46.1<2>UB 0W {align1}; mov (16) g47.1<2>UB 0W {align1}; mov (16) g48.1<2>UB 0W {align1}; mov (16) g49.1<2>UB 0W {align1}; mov (16) g50.1<2>UB 0W {align1}; mov (16) g51.1<2>UB 0W {align1}; and.nz (1) null g1.30<1,1,1>UB 1UW {align1}; //dct_type (f0) jmpi field_dct; //jmpi field_dct; add (16) g28.0<1>W g3.0<16,16,1>W g28.0<16,16,2>UB {align1}; add (16) g29.0<1>W g4.0<16,16,1>W g29.0<16,16,2>UB {align1}; add (16) g30.0<1>W g5.0<16,16,1>W g30.0<16,16,2>UB {align1}; add (16) g31.0<1>W g6.0<16,16,1>W g31.0<16,16,2>UB {align1}; add (16) g32.0<1>W g7.0<16,16,1>W g32.0<16,16,2>UB {align1}; add (16) g33.0<1>W g8.0<16,16,1>W g33.0<16,16,2>UB {align1}; add (16) g34.0<1>W g9.0<16,16,1>W g34.0<16,16,2>UB {align1}; add (16) g35.0<1>W g10.0<16,16,1>W g35.0<16,16,2>UB {align1}; add (16) g36.0<1>W g11.0<16,16,1>W g36.0<16,16,2>UB {align1}; add (16) g37.0<1>W g12.0<16,16,1>W g37.0<16,16,2>UB {align1}; add (16) g38.0<1>W g13.0<16,16,1>W g38.0<16,16,2>UB {align1}; add (16) g39.0<1>W g14.0<16,16,1>W g39.0<16,16,2>UB {align1}; add (16) g40.0<1>W g15.0<16,16,1>W g40.0<16,16,2>UB {align1}; add (16) g41.0<1>W g16.0<16,16,1>W g41.0<16,16,2>UB {align1}; add (16) g42.0<1>W g17.0<16,16,1>W g42.0<16,16,2>UB {align1}; add (16) g43.0<1>W g18.0<16,16,1>W g43.0<16,16,2>UB {align1}; jmpi write_back; field_dct: add (16) g28.0<1>W g3.0<16,16,1>W g28.0<16,16,2>UB {align1}; add (16) g29.0<1>W g11.0<16,16,1>W g29.0<16,16,2>UB {align1}; add (16) g30.0<1>W g4.0<16,16,1>W g30.0<16,16,2>UB {align1}; add (16) g31.0<1>W g12.0<16,16,1>W g31.0<16,16,2>UB {align1}; add (16) g32.0<1>W g5.0<16,16,1>W g32.0<16,16,2>UB {align1}; add (16) g33.0<1>W g13.0<16,16,1>W g33.0<16,16,2>UB {align1}; add (16) g34.0<1>W g6.0<16,16,1>W g34.0<16,16,2>UB {align1}; add (16) g35.0<1>W g14.0<16,16,1>W g35.0<16,16,2>UB {align1}; add (16) g36.0<1>W g7.0<16,16,1>W g36.0<16,16,2>UB {align1}; add (16) g37.0<1>W g15.0<16,16,1>W g37.0<16,16,2>UB {align1}; add (16) g38.0<1>W g8.0<16,16,1>W g38.0<16,16,2>UB {align1}; add (16) g39.0<1>W g16.0<16,16,1>W g39.0<16,16,2>UB {align1}; add (16) g40.0<1>W g9.0<16,16,1>W g40.0<16,16,2>UB {align1}; add (16) g41.0<1>W g17.0<16,16,1>W g41.0<16,16,2>UB {align1}; add (16) g42.0<1>W g10.0<16,16,1>W g42.0<16,16,2>UB {align1}; add (16) g43.0<1>W g18.0<16,16,1>W g43.0<16,16,2>UB {align1}; write_back: mov (1) g1.8<1>UD 0x00F000FUD {align1}; mov.sat (16) g28.0<2>UB g28.0<16,16,1>W {align1}; mov.sat (16) g29.0<2>UB g29.0<16,16,1>W {align1}; mov.sat (16) g30.0<2>UB g30.0<16,16,1>W {align1}; mov.sat (16) g31.0<2>UB g31.0<16,16,1>W {align1}; mov.sat (16) g32.0<2>UB g32.0<16,16,1>W {align1}; mov.sat (16) g33.0<2>UB g33.0<16,16,1>W {align1}; mov.sat (16) g34.0<2>UB g34.0<16,16,1>W {align1}; mov.sat (16) g35.0<2>UB g35.0<16,16,1>W {align1}; mov.sat (16) g36.0<2>UB g36.0<16,16,1>W {align1}; mov.sat (16) g37.0<2>UB g37.0<16,16,1>W {align1}; mov.sat (16) g38.0<2>UB g38.0<16,16,1>W {align1}; mov.sat (16) g39.0<2>UB g39.0<16,16,1>W {align1}; mov.sat (16) g40.0<2>UB g40.0<16,16,1>W {align1}; mov.sat (16) g41.0<2>UB g41.0<16,16,1>W {align1}; mov.sat (16) g42.0<2>UB g42.0<16,16,1>W {align1}; mov.sat (16) g43.0<2>UB g43.0<16,16,1>W {align1}; mov (16) m1.0<1>UB g28.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g29.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g30.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g31.0<16,16,2>UB {align1}; mov (16) m3.0<1>UB g32.0<16,16,2>UB {align1}; mov (16) m3.16<1>UB g33.0<16,16,2>UB {align1}; mov (16) m4.0<1>UB g34.0<16,16,2>UB {align1}; mov (16) m4.16<1>UB g35.0<16,16,2>UB {align1}; mov (16) m5.0<1>UB g36.0<16,16,2>UB {align1}; mov (16) m5.16<1>UB g37.0<16,16,2>UB {align1}; mov (16) m6.0<1>UB g38.0<16,16,2>UB {align1}; mov (16) m6.16<1>UB g39.0<16,16,2>UB {align1}; mov (16) m7.0<1>UB g40.0<16,16,2>UB {align1}; mov (16) m7.16<1>UB g41.0<16,16,2>UB {align1}; mov (16) m8.0<1>UB g42.0<16,16,2>UB {align1}; mov (16) m8.16<1>UB g43.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g1<8,8,1>UW write(0,0,2,0) mlen 9 rlen 0 {align1}; //U mov (1) g1.8<1>UD 0x0070007UD { align1 }; shr (2) g1.0<1>UD g1.0<2,2,1>UD 1D {align1}; add (16) g44.0<1>UW g19.0<16,16,1>W g44.0<16,16,1>UW {align1}; add (16) g45.0<1>UW g20.0<16,16,1>W g45.0<16,16,1>UW {align1}; add (16) g46.0<1>UW g21.0<16,16,1>W g46.0<16,16,1>UW {align1}; add (16) g47.0<1>UW g22.0<16,16,1>W g47.0<16,16,1>UW {align1}; mov.sat (16) g44.0<2>UB g44.0<16,16,1>UW {align1}; mov.sat (16) g45.0<2>UB g45.0<16,16,1>UW {align1}; mov.sat (16) g46.0<2>UB g46.0<16,16,1>UW {align1}; mov.sat (16) g47.0<2>UB g47.0<16,16,1>UW {align1}; mov (16) m1.0<1>UB g44.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g45.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g46.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g47.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g1<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; //V add (16) g48.0<1>UW g23.0<16,16,1>W g48.0<16,16,1>UW {align1}; add (16) g49.0<1>UW g24.0<16,16,1>W g49.0<16,16,1>UW {align1}; add (16) g50.0<1>UW g25.0<16,16,1>W g50.0<16,16,1>UW {align1}; add (16) g51.0<1>UW g26.0<16,16,1>W g51.0<16,16,1>UW {align1}; mov.sat (16) g48.0<2>UB g48.0<16,16,1>UW {align1}; mov.sat (16) g49.0<2>UB g49.0<16,16,1>UW {align1}; mov.sat (16) g50.0<2>UB g50.0<16,16,1>UW {align1}; mov.sat (16) g51.0<2>UB g51.0<16,16,1>UW {align1}; mov (16) m1.0<1>UB g48.0<16,16,2>UB {align1}; mov (16) m1.16<1>UB g49.0<16,16,2>UB {align1}; mov (16) m2.0<1>UB g50.0<16,16,2>UB {align1}; mov (16) m2.16<1>UB g51.0<16,16,2>UB {align1}; send (16) 0 acc0<1>UW g1<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/motion_frame_uv.g4i0000664000175000017500000000247712400044327020355 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng */ include(`read_frame_x0y0_uv.g4i') xf86-video-intel-2.99.917/xvmc/shader/mc/dual_prime_igd.g4a0000664000175000017500000002273212400044327020114 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (8) g76.0<1>UD g1.0<8,8,1>UD {align1}; //mov (8) g77.0<1>UD g2.0<8,8,1>UD {align1}; include(`block_clear.g4i') mov (8) g115.0<1>UD g1.0<8,8,1>UD {align1}; mov (8) g116.0<1>UD g1.0<8,8,1>UD {align1}; /* forward---Y---first vector*/ mov(1) g115.8<1>UD 0x007001fUD { align1 }; asr (2) g115.14<1>W g1.14<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`4') define(`mv1',`g1.14') define(`mv2',`g1.16') include(`motion_field_y_igd.g4i') mov (8) g52.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g54.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g56.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g58.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g60.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g62.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g64.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g66.0<1>UD g103.0<8,8,1>UD {align1}; /*forward---Y---second vector*/ asr (2) g115.14<1>W g1.22<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x4UD {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`4') define(`mv1',`g1.22') define(`mv2',`g1.24') include(`motion_field_y_igd.g4i') mov (8) g53.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g55.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g57.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g59.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g61.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g63.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g65.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g67.0<1>UD g103.0<8,8,1>UD {align1}; /*forward---UV---first vector*/ mov(1) g115.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.14<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u',`5') define(`surface_v',`6') define(`mv1',`g1.14') define(`mv2',`g1.16') include(`motion_field_uv_igd.g4i') mov (8) g68.0<1>UW g78.0<8,8,1>UW {align1}; mov (8) g69.0<1>UW g79.0<8,8,1>UW {align1}; mov (8) g70.0<1>UW g80.0<8,8,1>UW {align1}; mov (8) g71.0<1>UW g81.0<8,8,1>UW {align1}; mov (8) g72.0<1>UW g82.0<8,8,1>UW {align1}; mov (8) g73.0<1>UW g83.0<8,8,1>UW {align1}; mov (8) g74.0<1>UW g84.0<8,8,1>UW {align1}; mov (8) g75.0<1>UW g85.0<8,8,1>UW {align1}; /*forward---UV---second vector */ asr (2) g115.14<1>W g1.22<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x4UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g1.24') define(`mv2',`g1.26') include(`motion_field_uv_igd.g4i') mov (8) g68.16<1>UW g78.0<8,8,1>UW {align1}; mov (8) g69.16<1>UW g79.0<8,8,1>UW {align1}; mov (8) g70.16<1>UW g80.0<8,8,1>UW {align1}; mov (8) g71.16<1>UW g81.0<8,8,1>UW {align1}; mov (8) g72.16<1>UW g82.0<8,8,1>UW {align1}; mov (8) g73.16<1>UW g83.0<8,8,1>UW {align1}; mov (8) g74.16<1>UW g84.0<8,8,1>UW {align1}; mov (8) g75.16<1>UW g85.0<8,8,1>UW {align1}; /*backward---Y---first vector */ mov(8) g1.0<1>UD g116.0<8,8,1>UD {align1}; mov(1) g115.8<1>UD 0x007001fUD { align1 }; mov(1) g1.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.18<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x2UW {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`7') define(`mv1',`g1.18') define(`mv2',`g1.20') include(`motion_field_y_igd.g4i') mov (8) g28.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g30.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g32.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g34.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g36.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g38.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g40.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g42.0<1>UD g103.0<8,8,1>UD {align1}; /*backward---Y---second vector */ asr (2) g115.14<1>W g1.26<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g2.20<1,1,1>UD 0x8UD {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`7') define(`mv1',`g1.26') define(`mv2',`g1.28') include(`motion_field_y_igd.g4i') avg.sat (16) g28.0<1>UW g52.0<16,16,1>UW g28.0<16,16,1>UW {align1}; avg.sat (16) g29.0<1>UW g53.0<16,16,1>UW g96.0<16,16,1>UW {align1}; avg.sat (16) g30.0<1>UW g54.0<16,16,1>UW g30.0<16,16,1>UW {align1}; avg.sat (16) g31.0<1>UW g55.0<16,16,1>UW g97.0<16,16,1>UW {align1}; avg.sat (16) g32.0<1>UW g56.0<16,16,1>UW g32.0<16,16,1>UW {align1}; avg.sat (16) g33.0<1>UW g57.0<16,16,1>UW g98.0<16,16,1>UW {align1}; avg.sat (16) g34.0<1>UW g58.0<16,16,1>UW g34.0<16,16,1>UW {align1}; avg.sat (16) g35.0<1>UW g59.0<16,16,1>UW g99.0<16,16,1>UW {align1}; avg.sat (16) g36.0<1>UW g60.0<16,16,1>UW g36.0<16,16,1>UW {align1}; avg.sat (16) g37.0<1>UW g61.0<16,16,1>UW g100.0<16,16,1>UW {align1}; avg.sat (16) g38.0<1>UW g62.0<16,16,1>UW g38.0<16,16,1>UW {align1}; avg.sat (16) g39.0<1>UW g63.0<16,16,1>UW g101.0<16,16,1>UW {align1}; avg.sat (16) g40.0<1>UW g64.0<16,16,1>UW g40.0<16,16,1>UW {align1}; avg.sat (16) g41.0<1>UW g65.0<16,16,1>UW g102.0<16,16,1>UW {align1}; avg.sat (16) g42.0<1>UW g66.0<16,16,1>UW g42.0<16,16,1>UW {align1}; avg.sat (16) g43.0<1>UW g67.0<16,16,1>UW g103.0<16,16,1>UW {align1}; /*backward---UV---first vector */ mov(1) g115.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.18<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x2UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u',`8') define(`surface_v',`9') define(`mv1',`g1.18') define(`mv2',`g1.20') include(`motion_field_uv_igd.g4i') mov (8) g44.0<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.0<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.0<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.0<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.0<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.0<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.0<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.0<1>UW g85.0<8,8,1>UW {align1}; /*backward---UV---second vector */ asr (2) g115.14<1>W g1.26<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x8UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g1.26') define(`mv2',`g1.28') include(`motion_field_uv_igd.g4i') mov (8) g44.16<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.16<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.16<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.16<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.16<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.16<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.16<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.16<1>UW g85.0<8,8,1>UW {align1}; avg.sat (16) g44.0<1>UW g68.0<16,16,1>UW g44.0<16,16,1>UW {align1}; avg.sat (16) g45.0<1>UW g69.0<16,16,1>UW g45.0<16,16,1>UW {align1}; avg.sat (16) g46.0<1>UW g70.0<16,16,1>UW g46.0<16,16,1>UW {align1}; avg.sat (16) g47.0<1>UW g71.0<16,16,1>UW g47.0<16,16,1>UW {align1}; avg.sat (16) g48.0<1>UW g72.0<16,16,1>UW g48.0<16,16,1>UW {align1}; avg.sat (16) g49.0<1>UW g73.0<16,16,1>UW g49.0<16,16,1>UW {align1}; avg.sat (16) g50.0<1>UW g74.0<16,16,1>UW g50.0<16,16,1>UW {align1}; avg.sat (16) g51.0<1>UW g75.0<16,16,1>UW g51.0<16,16,1>UW {align1}; include(`addidct.g4i') //send (16) 0 acc0<1>UW g0<8,8,1>UW // thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/field_f_b_igd.g4b0000664000175000017500000001477712400044327017677 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x2e700169, 0x00000000, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a56, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a56 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a56, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a56 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00200001, 0x23e00021, 0x00450a40, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x2e700169, 0x00000000, 0x00010001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00800042, 0x27402529, 0x00b10740, 0x00b10400 }, { 0x00800042, 0x27802529, 0x00b10780, 0x00b10420 }, { 0x00800042, 0x27c02529, 0x00b107c0, 0x00b10440 }, { 0x00800042, 0x28002529, 0x00b10800, 0x00b10460 }, { 0x00800042, 0x28402529, 0x00b10840, 0x00b10480 }, { 0x00800042, 0x28802529, 0x00b10880, 0x00b104a0 }, { 0x00800042, 0x28c02529, 0x00b108c0, 0x00b104c0 }, { 0x00800042, 0x29002529, 0x00b10900, 0x00b104e0 }, { 0x0020000c, 0x23ee3dad, 0x00450a5a, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a5a }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00800042, 0x27602529, 0x00b10760, 0x00b10400 }, { 0x00800042, 0x27a02529, 0x00b107a0, 0x00b10420 }, { 0x00800042, 0x27e02529, 0x00b107e0, 0x00b10440 }, { 0x00800042, 0x28202529, 0x00b10820, 0x00b10460 }, { 0x00800042, 0x28602529, 0x00b10860, 0x00b10480 }, { 0x00800042, 0x28a02529, 0x00b108a0, 0x00b104a0 }, { 0x00800042, 0x28e02529, 0x00b108e0, 0x00b104c0 }, { 0x00800042, 0x29202529, 0x00b10920, 0x00b104e0 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802042, 0x29402529, 0x008d0940, 0x008d0400 }, { 0x00802042, 0x29802529, 0x008d0980, 0x008d0440 }, { 0x00802042, 0x29c02529, 0x008d09c0, 0x008d0480 }, { 0x00802042, 0x2a002529, 0x008d0a00, 0x008d04c0 }, { 0x0020000c, 0x23ee3dad, 0x00450a5a, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a5a }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802042, 0x29502529, 0x008d0950, 0x008d0400 }, { 0x00802042, 0x29902529, 0x008d0990, 0x008d0440 }, { 0x00802042, 0x29d02529, 0x008d09d0, 0x008d0480 }, { 0x00802042, 0x2a102529, 0x008d0a10, 0x008d04c0 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/dual_prime_igd.g4b.gen50000664000175000017500000020443612400044327020755 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x40b10040, 0x02180203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00600001, 0x2e800021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000086 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x26800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000e3c, 0x0021003f, 0x00000004 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000086 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x26a00021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26e00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27200021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0ce0, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00600040, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600040, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600040, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600040, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0501 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0521 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0541 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0561 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0521 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0541 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0561 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0581 }, { 0x00600040, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600040, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600040, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600040, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05a1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05c1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d05e1 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0601 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05c1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05e1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d0601 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000072 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0501 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0521 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0541 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0561 }, { 0x00600042, 0x24804629, 0x008d0580, 0x008d0581 }, { 0x00600042, 0x24a04629, 0x008d05a0, 0x008d05a1 }, { 0x00600042, 0x24c04629, 0x008d05c0, 0x008d05c1 }, { 0x00600042, 0x24e04629, 0x008d05e0, 0x008d05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000050 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600042, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0248a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0248a009 }, { 0x00802001, 0x24000229, 0x008d0500, 0x00000000 }, { 0x00802001, 0x24400229, 0x008d0540, 0x00000000 }, { 0x00802001, 0x24800229, 0x008d0600, 0x00000000 }, { 0x00802001, 0x24c00229, 0x008d0640, 0x00000000 }, { 0x00600001, 0x28800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00600040, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600040, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600040, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600040, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0501 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0521 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0541 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0561 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0521 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0541 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0561 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0581 }, { 0x00600040, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600040, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600040, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600040, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05a1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05c1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d05e1 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0601 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05c1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05e1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d0601 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000072 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0501 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0521 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0541 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0561 }, { 0x00600042, 0x24804629, 0x008d0580, 0x008d0581 }, { 0x00600042, 0x24a04629, 0x008d05a0, 0x008d05a1 }, { 0x00600042, 0x24c04629, 0x008d05c0, 0x008d05c1 }, { 0x00600042, 0x24e04629, 0x008d05e0, 0x008d05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000050 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600042, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0248a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0248a009 }, { 0x00802001, 0x24000229, 0x008d0500, 0x00000000 }, { 0x00802001, 0x24400229, 0x008d0540, 0x00000000 }, { 0x00802001, 0x24800229, 0x008d0600, 0x00000000 }, { 0x00802001, 0x24c00229, 0x008d0640, 0x00000000 }, { 0x00600001, 0x28900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0aa0, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0e80, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00000001, 0x20280061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000086 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x00600001, 0x23800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000c3c, 0x00210054, 0x00000008 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000086 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800040, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800040, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800040, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800040, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800040, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800040, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800040, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800040, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10501 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10541 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10581 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b105c1 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10601 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10641 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10681 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b106c1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10541 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10581 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b105c1 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10601 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10641 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10681 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b106c1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10701 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10501 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10541 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b10581 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b105c1 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10601 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10641 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b10681 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b106c1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000005c }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x27001d29, 0x408d0e60, 0x0218a007 }, { 0x00800042, 0x24004629, 0x00b10500, 0x00b10540 }, { 0x00800042, 0x24204629, 0x00b10540, 0x00b10580 }, { 0x00800042, 0x24404629, 0x00b10580, 0x00b105c0 }, { 0x00800042, 0x24604629, 0x00b105c0, 0x00b10600 }, { 0x00800042, 0x24804629, 0x00b10600, 0x00b10640 }, { 0x00800042, 0x24a04629, 0x00b10640, 0x00b10680 }, { 0x00800042, 0x24c04629, 0x00b10680, 0x00b106c0 }, { 0x00800042, 0x24e04629, 0x00b106c0, 0x00b10700 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000024 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a004 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0288a007 }, { 0x00800001, 0x24000229, 0x00b10500, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10540, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10580, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b105c0, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10600, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10640, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10680, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b106c0, 0x00000000 }, { 0x80800042, 0x23802529, 0x00b10680, 0x00b10380 }, { 0x80800042, 0x23a02529, 0x00b106a0, 0x00b10c00 }, { 0x80800042, 0x23c02529, 0x00b106c0, 0x00b103c0 }, { 0x80800042, 0x23e02529, 0x00b106e0, 0x00b10c20 }, { 0x80800042, 0x24002529, 0x00b10700, 0x00b10400 }, { 0x80800042, 0x24202529, 0x00b10720, 0x00b10c40 }, { 0x80800042, 0x24402529, 0x00b10740, 0x00b10440 }, { 0x80800042, 0x24602529, 0x00b10760, 0x00b10c60 }, { 0x80800042, 0x24802529, 0x00b10780, 0x00b10480 }, { 0x80800042, 0x24a02529, 0x00b107a0, 0x00b10c80 }, { 0x80800042, 0x24c02529, 0x00b107c0, 0x00b104c0 }, { 0x80800042, 0x24e02529, 0x00b107e0, 0x00b10ca0 }, { 0x80800042, 0x25002529, 0x00b10800, 0x00b10500 }, { 0x80800042, 0x25202529, 0x00b10820, 0x00b10cc0 }, { 0x80800042, 0x25402529, 0x00b10840, 0x00b10540 }, { 0x80800042, 0x25602529, 0x00b10860, 0x00b10ce0 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00600040, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600040, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600040, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600040, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0501 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0521 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0541 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0561 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0521 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0541 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0561 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0581 }, { 0x00600040, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600040, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600040, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600040, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05a1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05c1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d05e1 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0601 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05c1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05e1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d0601 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000072 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0501 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0521 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0541 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0561 }, { 0x00600042, 0x24804629, 0x008d0580, 0x008d0581 }, { 0x00600042, 0x24a04629, 0x008d05a0, 0x008d05a1 }, { 0x00600042, 0x24c04629, 0x008d05c0, 0x008d05c1 }, { 0x00600042, 0x24e04629, 0x008d05e0, 0x008d05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000050 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600042, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0248a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0248a009 }, { 0x00802001, 0x24000229, 0x008d0500, 0x00000000 }, { 0x00802001, 0x24400229, 0x008d0540, 0x00000000 }, { 0x00802001, 0x24800229, 0x008d0600, 0x00000000 }, { 0x00802001, 0x24c00229, 0x008d0640, 0x00000000 }, { 0x00600001, 0x25800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00600040, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600040, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600040, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600040, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0501 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0521 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0541 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0561 }, { 0x00600040, 0x24004529, 0x008d0400, 0x008d0521 }, { 0x00600040, 0x24204529, 0x008d0420, 0x008d0541 }, { 0x00600040, 0x24404529, 0x008d0440, 0x008d0561 }, { 0x00600040, 0x24604529, 0x008d0460, 0x008d0581 }, { 0x00600040, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600040, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600040, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600040, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05a1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05c1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d05e1 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0601 }, { 0x00600040, 0x24804529, 0x008d0480, 0x008d05c1 }, { 0x00600040, 0x24a04529, 0x008d04a0, 0x008d05e1 }, { 0x00600040, 0x24c04529, 0x008d04c0, 0x008d0601 }, { 0x00600040, 0x24e04529, 0x008d04e0, 0x008d0621 }, { 0x00a02008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x00a02008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x00a02008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x00a02008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000072 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0248a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0501 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0521 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0541 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0561 }, { 0x00600042, 0x24804629, 0x008d0580, 0x008d0581 }, { 0x00600042, 0x24a04629, 0x008d05a0, 0x008d05a1 }, { 0x00600042, 0x24c04629, 0x008d05c0, 0x008d05c1 }, { 0x00600042, 0x24e04629, 0x008d05e0, 0x008d05e1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000050 }, { 0x00000040, 0x22000c00, 0x00210200, 0x00000002 }, { 0x01000005, 0x20002d3c, 0x00218000, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000032 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000000e }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a005 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000000c }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x25a01d29, 0x408d0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x25801d29, 0x408d0e60, 0x0218a008 }, { 0x00800031, 0x26201d29, 0x408d0e60, 0x0218a009 }, { 0x00600042, 0x24004629, 0x008d0500, 0x008d0520 }, { 0x00600042, 0x24204629, 0x008d0520, 0x008d0540 }, { 0x00600042, 0x24404629, 0x008d0540, 0x008d0560 }, { 0x00600042, 0x24604629, 0x008d0560, 0x008d0580 }, { 0x00600042, 0x24804629, 0x008d05a0, 0x008d05c0 }, { 0x00600042, 0x24a04629, 0x008d05c0, 0x008d05e0 }, { 0x00600042, 0x24c04629, 0x008d05e0, 0x008d0600 }, { 0x00600042, 0x24e04629, 0x008d0600, 0x008d0620 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x02000005, 0x20002d3c, 0x00210e70, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000006 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a005 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0248a006 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800031, 0x25001d29, 0x408d0e60, 0x0248a008 }, { 0x00800031, 0x26001d29, 0x408d0e60, 0x0248a009 }, { 0x00802001, 0x24000229, 0x008d0500, 0x00000000 }, { 0x00802001, 0x24400229, 0x008d0540, 0x00000000 }, { 0x00802001, 0x24800229, 0x008d0600, 0x00000000 }, { 0x00802001, 0x24c00229, 0x008d0640, 0x00000000 }, { 0x00600001, 0x25900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26700129, 0x008d0aa0, 0x00000000 }, { 0x80800042, 0x25802529, 0x00b10880, 0x00b10580 }, { 0x80800042, 0x25a02529, 0x00b108a0, 0x00b105a0 }, { 0x80800042, 0x25c02529, 0x00b108c0, 0x00b105c0 }, { 0x80800042, 0x25e02529, 0x00b108e0, 0x00b105e0 }, { 0x80800042, 0x26002529, 0x00b10900, 0x00b10600 }, { 0x80800042, 0x26202529, 0x00b10920, 0x00b10620 }, { 0x80800042, 0x26402529, 0x00b10940, 0x00b10640 }, { 0x80800042, 0x26602529, 0x00b10960, 0x00b10660 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x12082000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/field_backward.g4b0000664000175000017500000022003312400044327020064 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x00b10040, 0x04110203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x00b10040, 0x04110203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000004 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00600001, 0x2e800021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00000001, 0x20280061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000b1 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000007d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00080008 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000b1 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000007d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23a00021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23e00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24200021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24600021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24a00021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24e00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25200021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25600021, 0x008d0ce0, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a008 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a008 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26700129, 0x008d0aa0, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05902000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/field_backward.g4a0000664000175000017500000001156012400044327020066 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (8) g76.0<1>UD g1.0<8,8,1>UD {align1}; //mov (8) g77.0<1>UD g2.0<8,8,1>UD {align1}; include(`block_clear.g4i') mov (8) g115.0<1>UD g1.0<8,8,1>UD {align1}; mov (8) g116.0<1>UD g1.0<8,8,1>UD {align1}; /*Y buffer*/ mov(1) g115.8<1>UD 0x007001fUD { align1 }; mov(1) g1.8<1>UD 0x007000fUD { align1 }; /*first vector*/ asr (2) g115.14<1>W g1.18<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x2UW {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`7') define(`mv1',`g1.18') define(`mv2',`g1.20') include(`motion_field_y.g4i') mov (8) g28.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g30.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g32.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g34.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g36.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g38.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g40.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g42.0<1>UD g103.0<8,8,1>UD {align1}; /*second vector*/ asr (2) g115.14<1>W g1.26<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x8UW {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`7') define(`mv1',`g1.26') define(`mv2',`g1.28') include(`motion_field_y.g4i') mov (8) g29.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g31.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g33.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g35.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g37.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g39.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g41.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g43.0<1>UD g103.0<8,8,1>UD {align1}; /*U buffer, V buffer*/ mov(1) g115.8<1>UD 0x007000fUD { align1 }; /*first vector*/ asr (2) g115.14<1>W g1.18<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x2UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u',`8') define(`surface_v',`9') define(`mv1',`g1.18') define(`mv2',`g1.20') include(`motion_field_uv.g4i') mov (8) g44.0<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.0<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.0<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.0<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.0<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.0<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.0<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.0<1>UW g85.0<8,8,1>UW {align1}; /*second vector*/ asr (2) g115.14<1>W g1.26<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x8UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g1.26') define(`mv2',`g1.28') include(`motion_field_uv.g4i') mov (8) g44.16<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.16<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.16<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.16<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.16<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.16<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.16<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.16<1>UW g85.0<8,8,1>UW {align1}; include(`addidct.g4i') //send (16) 0 acc0<1>UW g0<8,8,1>UW // thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/frame_backward.g4a0000664000175000017500000000511312400044327020072 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ /* shader for backward predict mc */ mov (8) g76.0<1>UD g1.0<8,8,1>UD {align1}; //mov (8) g77.0<1>UD g2.0<8,8,1>UD {align1}; include(`block_clear.g4i') mov (2) g1.14<1>UW g1.18<2,2,1>UW {align1}; /* save payload */ mov (8) g115.0<1>UD g1.0<8,8,1>UD {align1}; /* 8x8 media read/write payload */ mov (1) g1.8<1>UD 0x0070007UD {align1}; /* save payload, again */ define(`dest', `g118') define(`input_surface', `7') define(`mv1', `g115.14') define(`mv2', `g115.16') /* Y */ /* (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) */ asr (2) g1.14<1>W g115.14<2,2,1>W 1W {align1}; add (2) g2.0<1>UD g115.0<2,2,1>UD g1.14<2,2,1>W {align1}; include(`motion_frame_y.g4i') /* motion_vector = motion_vector >> 1 */ /* (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) */ shr (2) g1.0<1>UD g115.0<2,2,1>UD 1UD {align1}; asr (2) g115.14<1>W g115.14<2,2,1>W 1W {align1}; asr (2) g1.14<1>W g115.14<2,2,1>W 1W {align1}; add (2) g2.0<1>UD g1.0<2,2,1>UD g1.14<2,2,1>W {align1}; /* U */ define(`input_surface1', `8') define(`input_surface2', `9') mov (1) g2.8<1>UD 0x007000fUD {align1}; include(`motion_frame_uv.g4i') /* V */ /* (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) */ include(`addidct.g4i') send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/field_f_b.g4a0000664000175000017500000002267212400044327017044 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (8) g76.0<1>UD g1.0<8,8,1>UD {align1}; //mov (8) g77.0<1>UD g2.0<8,8,1>UD {align1}; include(`block_clear.g4i') mov (8) g115.0<1>UD g1.0<8,8,1>UD {align1}; mov (8) g116.0<1>UD g1.0<8,8,1>UD {align1}; /* forward---Y---first vector*/ mov(1) g115.8<1>UD 0x007001fUD { align1 }; asr (2) g115.14<1>W g1.14<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`4') define(`mv1',`g1.14') define(`mv2',`g1.16') include(`motion_field_y.g4i') mov (8) g52.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g54.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g56.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g58.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g60.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g62.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g64.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g66.0<1>UD g103.0<8,8,1>UD {align1}; /*forward---Y---second vector*/ asr (2) g115.14<1>W g1.22<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x4UD {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`4') define(`mv1',`g1.22') define(`mv2',`g1.24') include(`motion_field_y.g4i') mov (8) g53.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g55.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g57.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g59.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g61.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g63.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g65.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g67.0<1>UD g103.0<8,8,1>UD {align1}; /*forward---UV---first vector*/ mov(1) g115.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.14<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u',`5') define(`surface_v',`6') define(`mv1',`g1.14') define(`mv2',`g1.16') include(`motion_field_uv.g4i') mov (8) g68.0<1>UW g78.0<8,8,1>UW {align1}; mov (8) g69.0<1>UW g79.0<8,8,1>UW {align1}; mov (8) g70.0<1>UW g80.0<8,8,1>UW {align1}; mov (8) g71.0<1>UW g81.0<8,8,1>UW {align1}; mov (8) g72.0<1>UW g82.0<8,8,1>UW {align1}; mov (8) g73.0<1>UW g83.0<8,8,1>UW {align1}; mov (8) g74.0<1>UW g84.0<8,8,1>UW {align1}; mov (8) g75.0<1>UW g85.0<8,8,1>UW {align1}; /*forward---UV---second vector */ asr (2) g115.14<1>W g1.22<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x4UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g1.24') define(`mv2',`g1.26') include(`motion_field_uv.g4i') mov (8) g68.16<1>UW g78.0<8,8,1>UW {align1}; mov (8) g69.16<1>UW g79.0<8,8,1>UW {align1}; mov (8) g70.16<1>UW g80.0<8,8,1>UW {align1}; mov (8) g71.16<1>UW g81.0<8,8,1>UW {align1}; mov (8) g72.16<1>UW g82.0<8,8,1>UW {align1}; mov (8) g73.16<1>UW g83.0<8,8,1>UW {align1}; mov (8) g74.16<1>UW g84.0<8,8,1>UW {align1}; mov (8) g75.16<1>UW g85.0<8,8,1>UW {align1}; /*backward---Y---first vector */ mov(8) g1.0<1>UD g116.0<8,8,1>UD {align1}; mov(1) g115.8<1>UD 0x007001fUD { align1 }; mov(1) g1.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.18<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g1.31<1,1,1>UB 0x2UW {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`7') define(`mv1',`g1.18') define(`mv2',`g1.20') include(`motion_field_y.g4i') mov (8) g28.0<1>UD g96.0<8,8,1>UD {align1}; mov (8) g30.0<1>UD g97.0<8,8,1>UD {align1}; mov (8) g32.0<1>UD g98.0<8,8,1>UD {align1}; mov (8) g34.0<1>UD g99.0<8,8,1>UD {align1}; mov (8) g36.0<1>UD g100.0<8,8,1>UD {align1}; mov (8) g38.0<1>UD g101.0<8,8,1>UD {align1}; mov (8) g40.0<1>UD g102.0<8,8,1>UD {align1}; mov (8) g42.0<1>UD g103.0<8,8,1>UD {align1}; /*backward---Y---second vector */ asr (2) g115.14<1>W g1.26<2,2,1>W 1W {align1}; add (2) g115.0<1>D g116.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; mov(1) g115.8<1>UD 0x1fUD { align1 }; //read 1 line, 32 columns. and.nz (1) null g2.20<1,1,1>UD 0x8UD {align1}; (f0) add (1) g115.4<1>D g115.4<1,1,1>D 1D {align1}; define(`surface',`7') define(`mv1',`g1.26') define(`mv2',`g1.28') include(`motion_field_y.g4i') avg.sat (16) g28.0<1>UW g52.0<16,16,1>UW g28.0<16,16,1>UW {align1}; avg.sat (16) g29.0<1>UW g53.0<16,16,1>UW g96.0<16,16,1>UW {align1}; avg.sat (16) g30.0<1>UW g54.0<16,16,1>UW g30.0<16,16,1>UW {align1}; avg.sat (16) g31.0<1>UW g55.0<16,16,1>UW g97.0<16,16,1>UW {align1}; avg.sat (16) g32.0<1>UW g56.0<16,16,1>UW g32.0<16,16,1>UW {align1}; avg.sat (16) g33.0<1>UW g57.0<16,16,1>UW g98.0<16,16,1>UW {align1}; avg.sat (16) g34.0<1>UW g58.0<16,16,1>UW g34.0<16,16,1>UW {align1}; avg.sat (16) g35.0<1>UW g59.0<16,16,1>UW g99.0<16,16,1>UW {align1}; avg.sat (16) g36.0<1>UW g60.0<16,16,1>UW g36.0<16,16,1>UW {align1}; avg.sat (16) g37.0<1>UW g61.0<16,16,1>UW g100.0<16,16,1>UW {align1}; avg.sat (16) g38.0<1>UW g62.0<16,16,1>UW g38.0<16,16,1>UW {align1}; avg.sat (16) g39.0<1>UW g63.0<16,16,1>UW g101.0<16,16,1>UW {align1}; avg.sat (16) g40.0<1>UW g64.0<16,16,1>UW g40.0<16,16,1>UW {align1}; avg.sat (16) g41.0<1>UW g65.0<16,16,1>UW g102.0<16,16,1>UW {align1}; avg.sat (16) g42.0<1>UW g66.0<16,16,1>UW g42.0<16,16,1>UW {align1}; avg.sat (16) g43.0<1>UW g67.0<16,16,1>UW g103.0<16,16,1>UW {align1}; /*backward---UV---first vector */ mov(1) g115.8<1>UD 0x007000fUD { align1 }; asr (2) g115.14<1>W g1.18<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x2UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`surface_u',`8') define(`surface_v',`9') define(`mv1',`g1.18') define(`mv2',`g1.20') include(`motion_field_uv.g4i') mov (8) g44.0<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.0<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.0<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.0<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.0<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.0<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.0<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.0<1>UW g85.0<8,8,1>UW {align1}; /*backward---UV---second vector */ asr (2) g115.14<1>W g1.26<2,2,1>W 2W {align1}; asr (2) g115.0<1>D g116.0<2,2,1>D 1D {align1}; add (2) g115.0<1>D g115.0<2,2,1>D g115.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g1.31<1,1,1>UB 0x8UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; define(`mv1',`g1.26') define(`mv2',`g1.28') include(`motion_field_uv.g4i') mov (8) g44.16<1>UW g78.0<8,8,1>UW {align1}; mov (8) g45.16<1>UW g79.0<8,8,1>UW {align1}; mov (8) g46.16<1>UW g80.0<8,8,1>UW {align1}; mov (8) g47.16<1>UW g81.0<8,8,1>UW {align1}; mov (8) g48.16<1>UW g82.0<8,8,1>UW {align1}; mov (8) g49.16<1>UW g83.0<8,8,1>UW {align1}; mov (8) g50.16<1>UW g84.0<8,8,1>UW {align1}; mov (8) g51.16<1>UW g85.0<8,8,1>UW {align1}; avg.sat (16) g44.0<1>UW g68.0<16,16,1>UW g44.0<16,16,1>UW {align1}; avg.sat (16) g45.0<1>UW g69.0<16,16,1>UW g45.0<16,16,1>UW {align1}; avg.sat (16) g46.0<1>UW g70.0<16,16,1>UW g46.0<16,16,1>UW {align1}; avg.sat (16) g47.0<1>UW g71.0<16,16,1>UW g47.0<16,16,1>UW {align1}; avg.sat (16) g48.0<1>UW g72.0<16,16,1>UW g48.0<16,16,1>UW {align1}; avg.sat (16) g49.0<1>UW g73.0<16,16,1>UW g49.0<16,16,1>UW {align1}; avg.sat (16) g50.0<1>UW g74.0<16,16,1>UW g50.0<16,16,1>UW {align1}; avg.sat (16) g51.0<1>UW g75.0<16,16,1>UW g51.0<16,16,1>UW {align1}; include(`addidct.g4i') //send (16) 0 acc0<1>UW g0<8,8,1>UW // thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x0y1_y.g4i0000664000175000017500000001063512400044327020446 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g115.8<1>UD 0x01FUD {align1}; send (16) 0 g78.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g80.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g82.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g84.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; mov (1) g115.8<1>UD 0x07001FUD {align1}; send (16) 0 g86.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; mov (1) g115.8<1>UD 0x1FUD {align1}; send (16) 0 g94.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; and (1) g2.24<1>UD g115.0<1,1,1>UD 3UD {align1}; mul (1) g2.24<1>UD g2.24<1,1,1>UD 9UD {align1}; jmpi g2.24<1,1,1>D; avg.sat (16) g96.0<1>UW g78.0<16,16,1>UB g80.0<16,16,1>UB {align1}; avg.sat (16) g97.0<1>UW g80.0<16,16,1>UB g82.0<16,16,1>UB {align1}; avg.sat (16) g98.0<1>UW g82.0<16,16,1>UB g84.0<16,16,1>UB {align1}; avg.sat (16) g99.0<1>UW g84.0<16,16,1>UB g86.0<16,16,1>UB {align1}; avg.sat (16) g100.0<1>UW g86.0<16,16,1>UB g88.0<16,16,1>UB {align1}; avg.sat (16) g101.0<1>UW g88.0<16,16,1>UB g90.0<16,16,1>UB {align1}; avg.sat (16) g102.0<1>UW g90.0<16,16,1>UB g92.0<16,16,1>UB {align1}; avg.sat (16) g103.0<1>UW g92.0<16,16,1>UB g94.0<16,16,1>UB {align1}; jmpi out; avg.sat (16) g96.0<1>UW g78.1<16,16,1>UB g80.1<16,16,1>UB {align1}; avg.sat (16) g97.0<1>UW g80.1<16,16,1>UB g82.1<16,16,1>UB {align1}; avg.sat (16) g98.0<1>UW g82.1<16,16,1>UB g84.1<16,16,1>UB {align1}; avg.sat (16) g99.0<1>UW g84.1<16,16,1>UB g86.1<16,16,1>UB {align1}; avg.sat (16) g100.0<1>UW g86.1<16,16,1>UB g88.1<16,16,1>UB {align1}; avg.sat (16) g101.0<1>UW g88.1<16,16,1>UB g90.1<16,16,1>UB {align1}; avg.sat (16) g102.0<1>UW g90.1<16,16,1>UB g92.1<16,16,1>UB {align1}; avg.sat (16) g103.0<1>UW g92.1<16,16,1>UB g94.1<16,16,1>UB {align1}; jmpi out; avg.sat (16) g96.0<1>UW g78.2<16,16,1>UB g80.2<16,16,1>UB {align1}; avg.sat (16) g97.0<1>UW g80.2<16,16,1>UB g82.2<16,16,1>UB {align1}; avg.sat (16) g98.0<1>UW g82.2<16,16,1>UB g84.2<16,16,1>UB {align1}; avg.sat (16) g99.0<1>UW g84.2<16,16,1>UB g86.2<16,16,1>UB {align1}; avg.sat (16) g100.0<1>UW g86.2<16,16,1>UB g88.2<16,16,1>UB {align1}; avg.sat (16) g101.0<1>UW g88.2<16,16,1>UB g90.2<16,16,1>UB {align1}; avg.sat (16) g102.0<1>UW g90.2<16,16,1>UB g92.2<16,16,1>UB {align1}; avg.sat (16) g103.0<1>UW g92.2<16,16,1>UB g94.2<16,16,1>UB {align1}; jmpi out; avg.sat (16) g96.0<1>UW g78.3<16,16,1>UB g80.3<16,16,1>UB {align1}; avg.sat (16) g97.0<1>UW g80.3<16,16,1>UB g82.3<16,16,1>UB {align1}; avg.sat (16) g98.0<1>UW g82.3<16,16,1>UB g84.3<16,16,1>UB {align1}; avg.sat (16) g99.0<1>UW g84.3<16,16,1>UB g86.3<16,16,1>UB {align1}; avg.sat (16) g100.0<1>UW g86.3<16,16,1>UB g88.3<16,16,1>UB {align1}; avg.sat (16) g101.0<1>UW g88.3<16,16,1>UB g90.3<16,16,1>UB {align1}; avg.sat (16) g102.0<1>UW g90.3<16,16,1>UB g92.3<16,16,1>UB {align1}; avg.sat (16) g103.0<1>UW g92.3<16,16,1>UB g94.3<16,16,1>UB {align1}; out: xf86-video-intel-2.99.917/xvmc/shader/mc/frame_forward_igd.g4a0000664000175000017500000000256512400044327020613 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x50UD {align1}; //jump to the lib to do IDCT //Y, (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) asr (2) g31.14<1>W g82.14<2,2,1>W 1W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; mov (1) g32.16<1>UW 0UW {align1}; //0:forward 1:backward mov (1) a0.0<1>UD 0x0A4EUD {align1}; //g82.14,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x00UD {align1}; //jump to the lib to read reference data //UV, (x', y') = (x >> 1, y >> 1) + (motion_vector.x >> 2, motion_vector.y >> 2) shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g31.14<1>W g82.14<2,2,1>W 2W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x10UD {align1}; //jump to the lib to read reference data add (1) ip g21.0<1,1,1>UD 0x40UD {align1}; //jump to the lib to add the reference and idct data xf86-video-intel-2.99.917/xvmc/shader/mc/motion_frame_y.g4i0000664000175000017500000000341412400044327020163 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai */ /* if (motion_vect.x & 1) { * if (motion_vect.y & 1) * half_pixel in x and y; * else * half_pixel in x; * } else { * if (motion_vect.y & 1) * half_pixel y; * else * full_pixel_read; * } */ and.z (1) null mv1<1,1,1>UW 1UD {align1}; (f0) jmpi LL1; and.z (1) null mv2<1,1,1>UW 1UD {align1}; (f0) jmpi LL2; include(`read_frame_x1y1_y.g4i') jmpi LL5; LL2: include(`read_frame_x1y0_y.g4i') jmpi LL5; LL1: and.z (1) null mv2<1,1,1>UW 1UD {align1}; (f0) jmpi LL4; include(`read_frame_x0y1_y.g4i') jmpi LL5; LL4: include(`read_frame_x0y0_y.g4i') LL5: xf86-video-intel-2.99.917/xvmc/shader/mc/ipicture_igd.g4b.gen50000664000175000017500000001003512400044327020446 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x80800001, 0x458001b1, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a001b1, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c001b1, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e001b1, 0x00b105e0, 0x00000000 }, { 0x80800001, 0x460001b1, 0x00b10600, 0x00000000 }, { 0x80800001, 0x462001b1, 0x00b10620, 0x00000000 }, { 0x80800001, 0x464001b1, 0x00b10640, 0x00000000 }, { 0x80800001, 0x466001b1, 0x00b10660, 0x00000000 }, { 0x80800001, 0x468001b1, 0x00b10680, 0x00000000 }, { 0x80800001, 0x46a001b1, 0x00b106a0, 0x00000000 }, { 0x80800001, 0x46c001b1, 0x00b106c0, 0x00000000 }, { 0x80800001, 0x46e001b1, 0x00b106e0, 0x00000000 }, { 0x80800001, 0x470001b1, 0x00b10700, 0x00000000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x000f000f }, { 0x02000005, 0x20002e3c, 0x00210a5e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x20200232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b20560, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b205e0, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20600, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800001, 0x20200232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20560, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b205e0, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20600, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x12082000 }, { 0x00000001, 0x23e80061, 0x00000000, 0x00070007 }, { 0x00200008, 0x23e01c21, 0x00450a40, 0x00000001 }, { 0x00800001, 0x20200232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20660, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20680, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082001 }, { 0x00800001, 0x20200232, 0x00b206a0, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b206c0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b206e0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20700, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d03e0, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x0y0_y.g4i0000664000175000017500000001126712400044327020456 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g2.8<1>UD 0x007001FUD {align1}; send (16) 0 g98.0<1>UW g2<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g2.4<1>UD g2.4<1,1,1>UD 8UD {align1}; send (16) 0 g106.0<1>UW g2<8,8,1>UW read(input_surface, 2, 0, 2) mlen 1 rlen 8 {align1}; and (1) g2.24<1>UD g2.0<1,1,1>UD 3UD {align1}; mul(1) g2.24<1>UD g2.24<1,1,1>UD 17UD {align1}; jmpi g2.24<1,1,1>D; mov (16) g28.0<1>UW g98.0<16,16,1>UB {align1}; mov (16) g29.0<1>UW g99.0<16,16,1>UB {align1}; mov (16) g30.0<1>UW g100.0<16,16,1>UB {align1}; mov (16) g31.0<1>UW g101.0<16,16,1>UB {align1}; mov (16) g32.0<1>UW g102.0<16,16,1>UB {align1}; mov (16) g33.0<1>UW g103.0<16,16,1>UB {align1}; mov (16) g34.0<1>UW g104.0<16,16,1>UB {align1}; mov (16) g35.0<1>UW g105.0<16,16,1>UB {align1}; mov (16) g36.0<1>UW g106.0<16,16,1>UB {align1}; mov (16) g37.0<1>UW g107.0<16,16,1>UB {align1}; mov (16) g38.0<1>UW g108.0<16,16,1>UB {align1}; mov (16) g39.0<1>UW g109.0<16,16,1>UB {align1}; mov (16) g40.0<1>UW g110.0<16,16,1>UB {align1}; mov (16) g41.0<1>UW g111.0<16,16,1>UB {align1}; mov (16) g42.0<1>UW g112.0<16,16,1>UB {align1}; mov (16) g43.0<1>UW g113.0<16,16,1>UB {align1}; jmpi out; mov (16) g28.0<1>UW g98.1<16,16,1>UB {align1}; mov (16) g29.0<1>UW g99.1<16,16,1>UB {align1}; mov (16) g30.0<1>UW g100.1<16,16,1>UB {align1}; mov (16) g31.0<1>UW g101.1<16,16,1>UB {align1}; mov (16) g32.0<1>UW g102.1<16,16,1>UB {align1}; mov (16) g33.0<1>UW g103.1<16,16,1>UB {align1}; mov (16) g34.0<1>UW g104.1<16,16,1>UB {align1}; mov (16) g35.0<1>UW g105.1<16,16,1>UB {align1}; mov (16) g36.0<1>UW g106.1<16,16,1>UB {align1}; mov (16) g37.0<1>UW g107.1<16,16,1>UB {align1}; mov (16) g38.0<1>UW g108.1<16,16,1>UB {align1}; mov (16) g39.0<1>UW g109.1<16,16,1>UB {align1}; mov (16) g40.0<1>UW g110.1<16,16,1>UB {align1}; mov (16) g41.0<1>UW g111.1<16,16,1>UB {align1}; mov (16) g42.0<1>UW g112.1<16,16,1>UB {align1}; mov (16) g43.0<1>UW g113.1<16,16,1>UB {align1}; jmpi out; mov (16) g28.0<1>UW g98.2<16,16,1>UB {align1}; mov (16) g29.0<1>UW g99.2<16,16,1>UB {align1}; mov (16) g30.0<1>UW g100.2<16,16,1>UB {align1}; mov (16) g31.0<1>UW g101.2<16,16,1>UB {align1}; mov (16) g32.0<1>UW g102.2<16,16,1>UB {align1}; mov (16) g33.0<1>UW g103.2<16,16,1>UB {align1}; mov (16) g34.0<1>UW g104.2<16,16,1>UB {align1}; mov (16) g35.0<1>UW g105.2<16,16,1>UB {align1}; mov (16) g36.0<1>UW g106.2<16,16,1>UB {align1}; mov (16) g37.0<1>UW g107.2<16,16,1>UB {align1}; mov (16) g38.0<1>UW g108.2<16,16,1>UB {align1}; mov (16) g39.0<1>UW g109.2<16,16,1>UB {align1}; mov (16) g40.0<1>UW g110.2<16,16,1>UB {align1}; mov (16) g41.0<1>UW g111.2<16,16,1>UB {align1}; mov (16) g42.0<1>UW g112.2<16,16,1>UB {align1}; mov (16) g43.0<1>UW g113.2<16,16,1>UB {align1}; jmpi out; mov (16) g28.0<1>UW g98.3<16,16,1>UB {align1}; mov (16) g29.0<1>UW g99.3<16,16,1>UB {align1}; mov (16) g30.0<1>UW g100.3<16,16,1>UB {align1}; mov (16) g31.0<1>UW g101.3<16,16,1>UB {align1}; mov (16) g32.0<1>UW g102.3<16,16,1>UB {align1}; mov (16) g33.0<1>UW g103.3<16,16,1>UB {align1}; mov (16) g34.0<1>UW g104.3<16,16,1>UB {align1}; mov (16) g35.0<1>UW g105.3<16,16,1>UB {align1}; mov (16) g36.0<1>UW g106.3<16,16,1>UB {align1}; mov (16) g37.0<1>UW g107.3<16,16,1>UB {align1}; mov (16) g38.0<1>UW g108.3<16,16,1>UB {align1}; mov (16) g39.0<1>UW g109.3<16,16,1>UB {align1}; mov (16) g40.0<1>UW g110.3<16,16,1>UB {align1}; mov (16) g41.0<1>UW g111.3<16,16,1>UB {align1}; mov (16) g42.0<1>UW g112.3<16,16,1>UB {align1}; mov (16) g43.0<1>UW g113.3<16,16,1>UB {align1}; out: xf86-video-intel-2.99.917/xvmc/shader/mc/field_f_b.g4b.gen50000664000175000017500000041303212400044327017674 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x40b10040, 0x02180203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00600001, 0x2e800021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021002e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x26800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000e3c, 0x0021003f, 0x00000004 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210036, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x26a00021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26e00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27200021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0ce0, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021002e, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x28800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x28900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0aa0, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0e80, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00000001, 0x20280061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000c3c, 0x00210054, 0x00000008 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x80800042, 0x23802529, 0x00b10680, 0x00b10380 }, { 0x80800042, 0x23a02529, 0x00b106a0, 0x00b10c00 }, { 0x80800042, 0x23c02529, 0x00b106c0, 0x00b103c0 }, { 0x80800042, 0x23e02529, 0x00b106e0, 0x00b10c20 }, { 0x80800042, 0x24002529, 0x00b10700, 0x00b10400 }, { 0x80800042, 0x24202529, 0x00b10720, 0x00b10c40 }, { 0x80800042, 0x24402529, 0x00b10740, 0x00b10440 }, { 0x80800042, 0x24602529, 0x00b10760, 0x00b10c60 }, { 0x80800042, 0x24802529, 0x00b10780, 0x00b10480 }, { 0x80800042, 0x24a02529, 0x00b107a0, 0x00b10c80 }, { 0x80800042, 0x24c02529, 0x00b107c0, 0x00b104c0 }, { 0x80800042, 0x24e02529, 0x00b107e0, 0x00b10ca0 }, { 0x80800042, 0x25002529, 0x00b10800, 0x00b10500 }, { 0x80800042, 0x25202529, 0x00b10820, 0x00b10cc0 }, { 0x80800042, 0x25402529, 0x00b10840, 0x00b10540 }, { 0x80800042, 0x25602529, 0x00b10860, 0x00b10ce0 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26700129, 0x008d0aa0, 0x00000000 }, { 0x80800042, 0x25802529, 0x00b10880, 0x00b10580 }, { 0x80800042, 0x25a02529, 0x00b108a0, 0x00b105a0 }, { 0x80800042, 0x25c02529, 0x00b108c0, 0x00b105c0 }, { 0x80800042, 0x25e02529, 0x00b108e0, 0x00b105e0 }, { 0x80800042, 0x26002529, 0x00b10900, 0x00b10600 }, { 0x80800042, 0x26202529, 0x00b10920, 0x00b10620 }, { 0x80800042, 0x26402529, 0x00b10940, 0x00b10640 }, { 0x80800042, 0x26602529, 0x00b10960, 0x00b10660 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x12082000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/null.g4b0000664000175000017500000000164712400044327016125 00000000000000 { 0x00600001, 0x20600021, 0x008d0020, 0x00000000 }, { 0x00802001, 0x21000061, 0x00000000, 0xffffffff }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00802001, 0x20200022, 0x008d0100, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302000 }, { 0x00000040, 0x20200c21, 0x00210060, 0x00000008 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302000 }, { 0x00000040, 0x20240c21, 0x00210064, 0x00000008 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302000 }, { 0x00000001, 0x20200021, 0x00210060, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302000 }, { 0x00802001, 0x20200062, 0x00000000, 0x7f7f7f7f }, { 0x00000008, 0x20201c21, 0x00210060, 0x00000001 }, { 0x00000008, 0x20241c21, 0x00210064, 0x00000001 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302001 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/field_f_b_igd.g4a0000664000175000017500000001652512400044327017667 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g84~g107:IDCT data g115: message descriptor for reading reference data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x50UD {align1}; //jump to the lib to do IQ and IDCT /*field 0 forward prediction of Y*/ asr (2) g31.14<1>W g82.14<2,2,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) g115.16<1>UW 0UW {align1}; //0:forward 1:backward mov (1) a0.0<1>UD 0x0A4EUD {align1}; //g82.14,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x20UD {align1}; //jump to the lib to read reference data mov (8) g58.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g60.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g62.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g64.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g66.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g68.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g70.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g72.0<1>UD g39.0<8,8,1>UD {align1}; /*field 1 forward prediction of Y*/ asr (2) g31.14<1>W g82.22<2,2,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x4UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A56UD {align1}; //g82.22,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x20UD {align1}; //jump to the lib to read reference data mov (8) g59.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g61.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g63.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g65.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g67.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g69.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g71.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g73.0<1>UD g39.0<8,8,1>UD {align1}; /*field 0 forward prediction of UV*/ shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g31.14<1>W g82.14<2,2,1>W 2W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x1UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A4EUD {align1}; //g82.14,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x30UD {align1}; //jump to the lib to read reference data mov (16) g74.0<1>UW g32.0<8,8,1>UW {align1 compr}; mov (16) g76.0<1>UW g34.0<8,8,1>UW {align1 compr}; mov (16) g78.0<1>UW g36.0<8,8,1>UW {align1 compr}; mov (16) g80.0<1>UW g38.0<8,8,1>UW {align1 compr}; /*field 1 forward prediction of UV*/ asr (2) g31.14<1>W g82.22<2,2,1>W 2W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x4UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A56UD {align1}; //g82.22,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x30UD {align1}; //jump to the lib to read reference data mov (16) g74.16<1>UW g32.0<8,8,1>UW {align1 compr}; mov (16) g76.16<1>UW g34.0<8,8,1>UW {align1 compr}; mov (16) g78.16<1>UW g36.0<8,8,1>UW {align1 compr}; mov (16) g80.16<1>UW g38.0<8,8,1>UW {align1 compr}; /*field 0 backward prediction of Y*/ mov(2) g31.0<1>UD g82.0<2,2,1>UD {align1}; asr (2) g31.14<1>W g82.18<2,2,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x2UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) g115.16<1>UW 1UW {align1}; //0:forward 1:backward mov (1) a0.0<1>UD 0x0A52UD {align1}; //g82.18,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x20UD {align1}; //jump to the lib to read reference data avg (16) g58.0<1>UW g58.0<16,16,1>UW g32.0<16,16,1>UW {align1}; avg (16) g60.0<1>UW g60.0<16,16,1>UW g33.0<16,16,1>UW {align1}; avg (16) g62.0<1>UW g62.0<16,16,1>UW g34.0<16,16,1>UW {align1}; avg (16) g64.0<1>UW g64.0<16,16,1>UW g35.0<16,16,1>UW {align1}; avg (16) g66.0<1>UW g66.0<16,16,1>UW g36.0<16,16,1>UW {align1}; avg (16) g68.0<1>UW g68.0<16,16,1>UW g37.0<16,16,1>UW {align1}; avg (16) g70.0<1>UW g70.0<16,16,1>UW g38.0<16,16,1>UW {align1}; avg (16) g72.0<1>UW g72.0<16,16,1>UW g39.0<16,16,1>UW {align1}; /*field 1 backward prediction of Y*/ asr (2) g31.14<1>W g82.26<2,2,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x8UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A5AUD {align1}; //g82.14,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x20UD {align1}; //jump to the lib to read reference data avg (16) g59.0<1>UW g59.0<16,16,1>UW g32.0<16,16,1>UW {align1}; avg (16) g61.0<1>UW g61.0<16,16,1>UW g33.0<16,16,1>UW {align1}; avg (16) g63.0<1>UW g63.0<16,16,1>UW g34.0<16,16,1>UW {align1}; avg (16) g65.0<1>UW g65.0<16,16,1>UW g35.0<16,16,1>UW {align1}; avg (16) g67.0<1>UW g67.0<16,16,1>UW g36.0<16,16,1>UW {align1}; avg (16) g69.0<1>UW g69.0<16,16,1>UW g37.0<16,16,1>UW {align1}; avg (16) g71.0<1>UW g71.0<16,16,1>UW g38.0<16,16,1>UW {align1}; avg (16) g73.0<1>UW g73.0<16,16,1>UW g39.0<16,16,1>UW {align1}; /*field 0 backward prediction of UV*/ shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g31.14<1>W g82.18<2,2,1>W 2W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x2UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A52UD {align1}; //g82.18,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x30UD {align1}; //jump to the lib to read reference data avg (16) g74.0<1>UW g74.0<8,8,1>UW g32.0<8,8,1>UW {align1 compr}; avg (16) g76.0<1>UW g76.0<8,8,1>UW g34.0<8,8,1>UW {align1 compr}; avg (16) g78.0<1>UW g78.0<8,8,1>UW g36.0<8,8,1>UW {align1 compr}; avg (16) g80.0<1>UW g80.0<8,8,1>UW g38.0<8,8,1>UW {align1 compr}; /*field 1 backward prediction of UV*/ asr (2) g31.14<1>W g82.26<2,2,1>W 2W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x8UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A5AUD {align1}; //g82.26,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x30UD {align1}; //jump to the lib to read reference data avg (16) g74.16<1>UW g74.16<8,8,1>UW g32.0<8,8,1>UW {align1 compr}; avg (16) g76.16<1>UW g76.16<8,8,1>UW g34.0<8,8,1>UW {align1 compr}; avg (16) g78.16<1>UW g78.16<8,8,1>UW g36.0<8,8,1>UW {align1 compr}; avg (16) g80.16<1>UW g80.16<8,8,1>UW g38.0<8,8,1>UW {align1 compr}; add (1) ip g21.0<1,1,1>UD 0x40UD {align1}; //jump to the lib to add the reference and idct data xf86-video-intel-2.99.917/xvmc/shader/mc/frame_backward_igd.g4a0000664000175000017500000000427512400044327020725 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ /* mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; define(`UV_red',`0xffffffffUD') define(`UV_white',`0x7f7f7f7fUD') define(`UV_green',`0x00000000UD') mov(1) g31.8<1>UD 0x000f000fUD { align1 }; mov(16) m1<1>UD 0xFFFFFFFFUD {align1 compr}; mov(16) m3<1>UD 0xFFFFFFFFUD {align1 compr}; mov(16) m5<1>UD 0xFFFFFFFFUD {align1 compr}; mov(16) m7<1>UD 0xFFFFFFFFUD {align1 compr}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(0, 0, 2, 0) mlen 9 rlen 0 { align1 }; shr (2) g31.0<1>UD g82.0<2,2,1>UD 1UW {align1}; mov(1) g31.8<1>UD 0x00070007UD { align1 }; mov (16) m1<1>UD UV_green {align1 compr}; send (16) 0 acc0<1>UW g31<8,8,1>UW write(2, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g31<8,8,1>UW write(1, 0, 2, 0) mlen 3 rlen 0 { align1 }; send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x50UD {align1}; //jump to the lib to do IDCT //Y, (x', y') = (x, y) + (motion_vector.x >> 1, motion_vector.y >> 1) asr (2) g31.14<1>W g82.18<2,2,1>W 1W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; mov (1) g32.16<1>UW 1UW {align1}; //0:forward 1:backward mov (1) a0.0<1>UD 0x0A52UD {align1}; //g82.18,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x0UD {align1}; //jump to the lib to read reference data //UV, (x', y') = (x >> 1, y >> 1) + (motion_vector.x >> 2, motion_vector.y >> 2) shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g31.14<1>W g82.18<2,2,1>W 2W {align1}; add (2) g32.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x10UD {align1}; //jump to the lib to read reference data add (1) ip g21.0<1,1,1>UD 0x40UD {align1}; //jump to the lib to add the reference and idct data xf86-video-intel-2.99.917/xvmc/shader/mc/frame_backward_igd.g4b.gen50000664000175000017500000000147112400044327021556 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00010001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000010 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/frame_forward_igd.g4b.gen50000664000175000017500000000147112400044327021444 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000010 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x1y0_y_igd.g4i0000664000175000017500000000360412400044327021276 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (1) g32.8<1>UD 0x007001FUD {align1}; and.nz (1) null g32.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g38.0<1>UW g32<8,8,1>UW read(4, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(4, 2, 0, 2) mlen 1 rlen 8 {align1}; jmpi put_data; read_backward: send (16) 0 g38.0<1>UW g32<8,8,1>UW read(7, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(7, 2, 0, 2) mlen 1 rlen 8 {align1}; put_data: avg (16) g58.0<1>UW g38.0<16,16,1>UB g38.1<16,16,1>UB {align1}; avg (16) g59.0<1>UW g39.0<16,16,1>UB g39.1<16,16,1>UB {align1}; avg (16) g60.0<1>UW g40.0<16,16,1>UB g40.1<16,16,1>UB {align1}; avg (16) g61.0<1>UW g41.0<16,16,1>UB g41.1<16,16,1>UB {align1}; avg (16) g62.0<1>UW g42.0<16,16,1>UB g42.1<16,16,1>UB {align1}; avg (16) g63.0<1>UW g43.0<16,16,1>UB g43.1<16,16,1>UB {align1}; avg (16) g64.0<1>UW g44.0<16,16,1>UB g44.1<16,16,1>UB {align1}; avg (16) g65.0<1>UW g45.0<16,16,1>UB g45.1<16,16,1>UB {align1}; avg (16) g66.0<1>UW g46.0<16,16,1>UB g46.1<16,16,1>UB {align1}; avg (16) g67.0<1>UW g47.0<16,16,1>UB g47.1<16,16,1>UB {align1}; avg (16) g68.0<1>UW g48.0<16,16,1>UB g48.1<16,16,1>UB {align1}; avg (16) g69.0<1>UW g49.0<16,16,1>UB g49.1<16,16,1>UB {align1}; avg (16) g70.0<1>UW g50.0<16,16,1>UB g50.1<16,16,1>UB {align1}; avg (16) g71.0<1>UW g51.0<16,16,1>UB g51.1<16,16,1>UB {align1}; avg (16) g72.0<1>UW g52.0<16,16,1>UB g52.1<16,16,1>UB {align1}; avg (16) g73.0<1>UW g53.0<16,16,1>UB g53.1<16,16,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x1y1_uv.g4i0000664000175000017500000002030512400044327020624 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g115.8<1>UD 0x07000FUD {align1}; send (16) 0 g86.0<1>UW g115<16,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g91.0<1>UW g115<16,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V and (1) g2.24<1>UD g115.0<1,1,1>UD 3UD {align1}; mul (1) g2.24<1>UD g2.24<1,1,1>UD 25UD {align1}; mov (1) g115.8<1>UD 0x01000FUD {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g90.0<1>UW g115<16,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 1 {align1}; send (16) 0 g95.0<1>UW g115<16,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 1 {align1}; jmpi g2.24<1,1,1>D; //U add (16) g78.0<1>UW g86.0<16,8,1>UB g87.0<16,8,1>UB {align1}; add (16) g79.0<1>UW g87.0<16,8,1>UB g88.0<16,8,1>UB {align1}; add (16) g80.0<1>UW g88.0<16,8,1>UB g89.0<16,8,1>UB {align1}; add (16) g81.0<1>UW g89.0<16,8,1>UB g90.0<16,8,1>UB {align1}; add (16) g78.0<1>UW g78.0<16,8,1>UW g86.1<16,8,1>UB {align1}; add (16) g79.0<1>UW g79.0<16,8,1>UW g87.1<16,8,1>UB {align1}; add (16) g80.0<1>UW g80.0<16,8,1>UW g88.1<16,8,1>UB {align1}; add (16) g81.0<1>UW g81.0<16,8,1>UW g89.1<16,8,1>UB {align1}; add (16) g78.0<1>UW g78.0<16,8,1>UW g87.1<16,8,1>UB {align1}; add (16) g79.0<1>UW g79.0<16,8,1>UW g88.1<16,8,1>UB {align1}; add (16) g80.0<1>UW g80.0<16,8,1>UW g89.1<16,8,1>UB {align1}; add (16) g81.0<1>UW g81.0<16,8,1>UW g90.1<16,8,1>UB {align1}; //V add (16) g82.0<1>UW g91.0<16,8,1>UB g92.0<16,8,1>UB {align1}; add (16) g83.0<1>UW g92.0<16,8,1>UB g93.0<16,8,1>UB {align1}; add (16) g84.0<1>UW g93.0<16,8,1>UB g94.0<16,8,1>UB {align1}; add (16) g85.0<1>UW g94.0<16,8,1>UB g95.0<16,8,1>UB {align1}; add (16) g82.0<1>UW g82.0<16,8,1>UW g91.1<16,8,1>UB {align1}; add (16) g83.0<1>UW g83.0<16,8,1>UW g92.1<16,8,1>UB {align1}; add (16) g84.0<1>UW g84.0<16,8,1>UW g93.1<16,8,1>UB {align1}; add (16) g85.0<1>UW g85.0<16,8,1>UW g94.1<16,8,1>UB {align1}; add (16) g82.0<1>UW g82.0<16,8,1>UW g92.1<16,8,1>UB {align1}; add (16) g83.0<1>UW g83.0<16,8,1>UW g93.1<16,8,1>UB {align1}; add (16) g84.0<1>UW g84.0<16,8,1>UW g94.1<16,8,1>UB {align1}; add (16) g85.0<1>UW g85.0<16,8,1>UW g95.1<16,8,1>UB {align1}; jmpi out; //U add (16) g78.0<1>UW g86.1<16,8,1>UB g87.1<16,8,1>UB {align1}; add (16) g79.0<1>UW g87.1<16,8,1>UB g88.1<16,8,1>UB {align1}; add (16) g80.0<1>UW g88.1<16,8,1>UB g89.1<16,8,1>UB {align1}; add (16) g81.0<1>UW g89.1<16,8,1>UB g90.1<16,8,1>UB {align1}; add (16) g78.0<1>UW g78.0<16,8,1>UW g86.2<16,8,1>UB {align1}; add (16) g79.0<1>UW g79.0<16,8,1>UW g87.2<16,8,1>UB {align1}; add (16) g80.0<1>UW g80.0<16,8,1>UW g88.2<16,8,1>UB {align1}; add (16) g81.0<1>UW g81.0<16,8,1>UW g89.2<16,8,1>UB {align1}; add (16) g78.0<1>UW g78.0<16,8,1>UW g87.2<16,8,1>UB {align1}; add (16) g79.0<1>UW g79.0<16,8,1>UW g88.2<16,8,1>UB {align1}; add (16) g80.0<1>UW g80.0<16,8,1>UW g89.2<16,8,1>UB {align1}; add (16) g81.0<1>UW g81.0<16,8,1>UW g90.2<16,8,1>UB {align1}; //V add (16) g82.0<1>UW g91.1<16,8,1>UB g92.1<16,8,1>UB {align1}; add (16) g83.0<1>UW g92.1<16,8,1>UB g93.1<16,8,1>UB {align1}; add (16) g84.0<1>UW g93.1<16,8,1>UB g94.1<16,8,1>UB {align1}; add (16) g85.0<1>UW g94.1<16,8,1>UB g95.1<16,8,1>UB {align1}; add (16) g82.0<1>UW g82.0<16,8,1>UW g91.2<16,8,1>UB {align1}; add (16) g83.0<1>UW g83.0<16,8,1>UW g92.2<16,8,1>UB {align1}; add (16) g84.0<1>UW g84.0<16,8,1>UW g93.2<16,8,1>UB {align1}; add (16) g85.0<1>UW g85.0<16,8,1>UW g94.2<16,8,1>UB {align1}; add (16) g82.0<1>UW g82.0<16,8,1>UW g92.2<16,8,1>UB {align1}; add (16) g83.0<1>UW g83.0<16,8,1>UW g93.2<16,8,1>UB {align1}; add (16) g84.0<1>UW g84.0<16,8,1>UW g94.2<16,8,1>UB {align1}; add (16) g85.0<1>UW g85.0<16,8,1>UW g95.2<16,8,1>UB {align1}; jmpi out; //U add (16) g78.0<1>UW g86.2<16,8,1>UB g87.2<16,8,1>UB {align1}; add (16) g79.0<1>UW g87.2<16,8,1>UB g88.2<16,8,1>UB {align1}; add (16) g80.0<1>UW g88.2<16,8,1>UB g89.2<16,8,1>UB {align1}; add (16) g81.0<1>UW g89.2<16,8,1>UB g90.2<16,8,1>UB {align1}; add (16) g78.0<1>UW g78.0<16,8,1>UW g86.3<16,8,1>UB {align1}; add (16) g79.0<1>UW g79.0<16,8,1>UW g87.3<16,8,1>UB {align1}; add (16) g80.0<1>UW g80.0<16,8,1>UW g88.3<16,8,1>UB {align1}; add (16) g81.0<1>UW g81.0<16,8,1>UW g89.3<16,8,1>UB {align1}; add (16) g78.0<1>UW g78.0<16,8,1>UW g87.3<16,8,1>UB {align1}; add (16) g79.0<1>UW g79.0<16,8,1>UW g88.3<16,8,1>UB {align1}; add (16) g80.0<1>UW g80.0<16,8,1>UW g89.3<16,8,1>UB {align1}; add (16) g81.0<1>UW g81.0<16,8,1>UW g90.3<16,8,1>UB {align1}; //V add (16) g82.0<1>UW g91.2<16,8,1>UB g92.2<16,8,1>UB {align1}; add (16) g83.0<1>UW g92.2<16,8,1>UB g93.2<16,8,1>UB {align1}; add (16) g84.0<1>UW g93.2<16,8,1>UB g94.2<16,8,1>UB {align1}; add (16) g85.0<1>UW g94.2<16,8,1>UB g95.2<16,8,1>UB {align1}; add (16) g82.0<1>UW g82.0<16,8,1>UW g91.3<16,8,1>UB {align1}; add (16) g83.0<1>UW g83.0<16,8,1>UW g92.3<16,8,1>UB {align1}; add (16) g84.0<1>UW g84.0<16,8,1>UW g93.3<16,8,1>UB {align1}; add (16) g85.0<1>UW g85.0<16,8,1>UW g94.3<16,8,1>UB {align1}; add (16) g82.0<1>UW g82.0<16,8,1>UW g92.3<16,8,1>UB {align1}; add (16) g83.0<1>UW g83.0<16,8,1>UW g93.3<16,8,1>UB {align1}; add (16) g84.0<1>UW g84.0<16,8,1>UW g94.3<16,8,1>UB {align1}; add (16) g85.0<1>UW g85.0<16,8,1>UW g95.3<16,8,1>UB {align1}; jmpi out; //U add (16) g78.0<1>UW g86.3<16,8,1>UB g87.3<16,8,1>UB {align1}; add (16) g79.0<1>UW g87.3<16,8,1>UB g88.3<16,8,1>UB {align1}; add (16) g80.0<1>UW g88.3<16,8,1>UB g89.3<16,8,1>UB {align1}; add (16) g81.0<1>UW g89.3<16,8,1>UB g90.3<16,8,1>UB {align1}; add (16) g78.0<1>UW g78.0<16,8,1>UW g86.4<16,8,1>UB {align1}; add (16) g79.0<1>UW g79.0<16,8,1>UW g87.4<16,8,1>UB {align1}; add (16) g80.0<1>UW g80.0<16,8,1>UW g88.4<16,8,1>UB {align1}; add (16) g81.0<1>UW g81.0<16,8,1>UW g89.4<16,8,1>UB {align1}; add (16) g78.0<1>UW g78.0<16,8,1>UW g87.4<16,8,1>UB {align1}; add (16) g79.0<1>UW g79.0<16,8,1>UW g88.4<16,8,1>UB {align1}; add (16) g80.0<1>UW g80.0<16,8,1>UW g89.4<16,8,1>UB {align1}; add (16) g81.0<1>UW g81.0<16,8,1>UW g90.4<16,8,1>UB {align1}; //V add (16) g82.0<1>UW g91.3<16,8,1>UB g92.3<16,8,1>UB {align1}; add (16) g83.0<1>UW g92.3<16,8,1>UB g93.3<16,8,1>UB {align1}; add (16) g84.0<1>UW g93.3<16,8,1>UB g94.3<16,8,1>UB {align1}; add (16) g85.0<1>UW g94.3<16,8,1>UB g95.3<16,8,1>UB {align1}; add (16) g82.0<1>UW g82.0<16,8,1>UW g91.4<16,8,1>UB {align1}; add (16) g83.0<1>UW g83.0<16,8,1>UW g92.4<16,8,1>UB {align1}; add (16) g84.0<1>UW g84.0<16,8,1>UW g93.4<16,8,1>UB {align1}; add (16) g85.0<1>UW g85.0<16,8,1>UW g94.4<16,8,1>UB {align1}; add (16) g82.0<1>UW g82.0<16,8,1>UW g92.4<16,8,1>UB {align1}; add (16) g83.0<1>UW g83.0<16,8,1>UW g93.4<16,8,1>UB {align1}; add (16) g84.0<1>UW g84.0<16,8,1>UW g94.4<16,8,1>UB {align1}; add (16) g85.0<1>UW g85.0<16,8,1>UW g95.4<16,8,1>UB {align1}; out: shr.sat (16) g78.0<1>UW g78.0<16,16,1>UW 2UW {align1}; shr.sat (16) g79.0<1>UW g79.0<16,16,1>UW 2UW {align1}; shr.sat (16) g80.0<1>UW g80.0<16,16,1>UW 2UW {align1}; shr.sat (16) g81.0<1>UW g81.0<16,16,1>UW 2UW {align1}; shr.sat (16) g82.0<1>UW g82.0<16,16,1>UW 2UW {align1}; shr.sat (16) g83.0<1>UW g83.0<16,16,1>UW 2UW {align1}; shr.sat (16) g84.0<1>UW g84.0<16,16,1>UW 2UW {align1}; shr.sat (16) g85.0<1>UW g85.0<16,16,1>UW 2UW {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x1y1_y.g4i0000664000175000017500000002140612400044327020445 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g115.8<1>UD 0x01FUD {align1}; send (16) 0 g78.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g80.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g82.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; send (16) 0 g84.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 2UD {align1}; mov (1) g115.8<1>UD 0x07001FUD {align1}; send (16) 0 g86.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; mov (1) g115.8<1>UD 0x1FUD {align1}; send (16) 0 g94.0<1>UW g115<8,8,1>UW read(surface,2,0,2) mlen 1 rlen 1 {align1}; and (1) g2.24<1>UD g115.0<1,1,1>UD 3UD {align1}; mul (1) g2.24<1>UD g2.24<1,1,1>UD 25UD {align1}; jmpi g2.24<1,1,1>D; add (16) g96.0<1>UW g78.0<16,16,1>UB g80.0<16,16,1>UB {align1}; add (16) g97.0<1>UW g80.0<16,16,1>UB g82.0<16,16,1>UB {align1}; add (16) g98.0<1>UW g82.0<16,16,1>UB g84.0<16,16,1>UB {align1}; add (16) g99.0<1>UW g84.0<16,16,1>UB g86.0<16,16,1>UB {align1}; add (16) g100.0<1>UW g86.0<16,16,1>UB g88.0<16,16,1>UB {align1}; add (16) g101.0<1>UW g88.0<16,16,1>UB g90.0<16,16,1>UB {align1}; add (16) g102.0<1>UW g90.0<16,16,1>UB g92.0<16,16,1>UB {align1}; add (16) g103.0<1>UW g92.0<16,16,1>UB g94.0<16,16,1>UB {align1}; add (16) g96.0<1>UW g96.0<16,16,1>UW g78.1<16,16,1>UB {align1}; add (16) g97.0<1>UW g97.0<16,16,1>UW g80.1<16,16,1>UB {align1}; add (16) g98.0<1>UW g98.0<16,16,1>UW g82.1<16,16,1>UB {align1}; add (16) g99.0<1>UW g99.0<16,16,1>UW g84.1<16,16,1>UB {align1}; add (16) g100.0<1>UW g100.0<16,16,1>UW g86.1<16,16,1>UB {align1}; add (16) g101.0<1>UW g101.0<16,16,1>UW g88.1<16,16,1>UB {align1}; add (16) g102.0<1>UW g102.0<16,16,1>UW g90.1<16,16,1>UB {align1}; add (16) g103.0<1>UW g103.0<16,16,1>UW g92.1<16,16,1>UB {align1}; add (16) g96.0<1>UW g96.0<16,16,1>UW g80.1<16,16,1>UB {align1}; add (16) g97.0<1>UW g97.0<16,16,1>UW g82.1<16,16,1>UB {align1}; add (16) g98.0<1>UW g98.0<16,16,1>UW g84.1<16,16,1>UB {align1}; add (16) g99.0<1>UW g99.0<16,16,1>UW g86.1<16,16,1>UB {align1}; add (16) g100.0<1>UW g100.0<16,16,1>UW g88.1<16,16,1>UB {align1}; add (16) g101.0<1>UW g101.0<16,16,1>UW g90.1<16,16,1>UB {align1}; add (16) g102.0<1>UW g102.0<16,16,1>UW g92.1<16,16,1>UB {align1}; add (16) g103.0<1>UW g103.0<16,16,1>UW g94.1<16,16,1>UB {align1}; jmpi out; add (16) g96.0<1>UW g78.1<16,16,1>UB g80.1<16,16,1>UB {align1}; add (16) g97.0<1>UW g80.1<16,16,1>UB g82.1<16,16,1>UB {align1}; add (16) g98.0<1>UW g82.1<16,16,1>UB g84.1<16,16,1>UB {align1}; add (16) g99.0<1>UW g84.1<16,16,1>UB g86.1<16,16,1>UB {align1}; add (16) g100.0<1>UW g86.1<16,16,1>UB g88.1<16,16,1>UB {align1}; add (16) g101.0<1>UW g88.1<16,16,1>UB g90.1<16,16,1>UB {align1}; add (16) g102.0<1>UW g90.1<16,16,1>UB g92.1<16,16,1>UB {align1}; add (16) g103.0<1>UW g92.1<16,16,1>UB g94.1<16,16,1>UB {align1}; add (16) g96.0<1>UW g96.0<16,16,1>UW g78.2<16,16,1>UB {align1}; add (16) g97.0<1>UW g97.0<16,16,1>UW g80.2<16,16,1>UB {align1}; add (16) g98.0<1>UW g98.0<16,16,1>UW g82.2<16,16,1>UB {align1}; add (16) g99.0<1>UW g99.0<16,16,1>UW g84.2<16,16,1>UB {align1}; add (16) g100.0<1>UW g100.0<16,16,1>UW g86.2<16,16,1>UB {align1}; add (16) g101.0<1>UW g101.0<16,16,1>UW g88.2<16,16,1>UB {align1}; add (16) g102.0<1>UW g102.0<16,16,1>UW g90.2<16,16,1>UB {align1}; add (16) g103.0<1>UW g103.0<16,16,1>UW g92.2<16,16,1>UB {align1}; add (16) g96.0<1>UW g96.0<16,16,1>UW g80.2<16,16,1>UB {align1}; add (16) g97.0<1>UW g97.0<16,16,1>UW g82.2<16,16,1>UB {align1}; add (16) g98.0<1>UW g98.0<16,16,1>UW g84.2<16,16,1>UB {align1}; add (16) g99.0<1>UW g99.0<16,16,1>UW g86.2<16,16,1>UB {align1}; add (16) g100.0<1>UW g100.0<16,16,1>UW g88.2<16,16,1>UB {align1}; add (16) g101.0<1>UW g101.0<16,16,1>UW g90.2<16,16,1>UB {align1}; add (16) g102.0<1>UW g102.0<16,16,1>UW g92.2<16,16,1>UB {align1}; add (16) g103.0<1>UW g103.0<16,16,1>UW g94.2<16,16,1>UB {align1}; jmpi out; add (16) g96.0<1>UW g78.2<16,16,1>UB g80.2<16,16,1>UB {align1}; add (16) g97.0<1>UW g80.2<16,16,1>UB g82.2<16,16,1>UB {align1}; add (16) g98.0<1>UW g82.2<16,16,1>UB g84.2<16,16,1>UB {align1}; add (16) g99.0<1>UW g84.2<16,16,1>UB g86.2<16,16,1>UB {align1}; add (16) g100.0<1>UW g86.2<16,16,1>UB g88.2<16,16,1>UB {align1}; add (16) g101.0<1>UW g88.2<16,16,1>UB g90.2<16,16,1>UB {align1}; add (16) g102.0<1>UW g90.2<16,16,1>UB g92.2<16,16,1>UB {align1}; add (16) g103.0<1>UW g92.2<16,16,1>UB g94.2<16,16,1>UB {align1}; add (16) g96.0<1>UW g96.0<16,16,1>UW g78.3<16,16,1>UB {align1}; add (16) g97.0<1>UW g97.0<16,16,1>UW g80.3<16,16,1>UB {align1}; add (16) g98.0<1>UW g98.0<16,16,1>UW g82.3<16,16,1>UB {align1}; add (16) g99.0<1>UW g99.0<16,16,1>UW g84.3<16,16,1>UB {align1}; add (16) g100.0<1>UW g100.0<16,16,1>UW g86.3<16,16,1>UB {align1}; add (16) g101.0<1>UW g101.0<16,16,1>UW g88.3<16,16,1>UB {align1}; add (16) g102.0<1>UW g102.0<16,16,1>UW g90.3<16,16,1>UB {align1}; add (16) g103.0<1>UW g103.0<16,16,1>UW g92.3<16,16,1>UB {align1}; add (16) g96.0<1>UW g96.0<16,16,1>UW g80.3<16,16,1>UB {align1}; add (16) g97.0<1>UW g97.0<16,16,1>UW g82.3<16,16,1>UB {align1}; add (16) g98.0<1>UW g98.0<16,16,1>UW g84.3<16,16,1>UB {align1}; add (16) g99.0<1>UW g99.0<16,16,1>UW g86.3<16,16,1>UB {align1}; add (16) g100.0<1>UW g100.0<16,16,1>UW g88.3<16,16,1>UB {align1}; add (16) g101.0<1>UW g101.0<16,16,1>UW g90.3<16,16,1>UB {align1}; add (16) g102.0<1>UW g102.0<16,16,1>UW g92.3<16,16,1>UB {align1}; add (16) g103.0<1>UW g103.0<16,16,1>UW g94.3<16,16,1>UB {align1}; jmpi out; add (16) g96.0<1>UW g78.3<16,16,1>UB g80.3<16,16,1>UB {align1}; add (16) g97.0<1>UW g80.3<16,16,1>UB g82.3<16,16,1>UB {align1}; add (16) g98.0<1>UW g82.3<16,16,1>UB g84.3<16,16,1>UB {align1}; add (16) g99.0<1>UW g84.3<16,16,1>UB g86.3<16,16,1>UB {align1}; add (16) g100.0<1>UW g86.3<16,16,1>UB g88.3<16,16,1>UB {align1}; add (16) g101.0<1>UW g88.3<16,16,1>UB g90.3<16,16,1>UB {align1}; add (16) g102.0<1>UW g90.3<16,16,1>UB g92.3<16,16,1>UB {align1}; add (16) g103.0<1>UW g92.3<16,16,1>UB g94.3<16,16,1>UB {align1}; add (16) g96.0<1>UW g96.0<16,16,1>UW g78.4<16,16,1>UB {align1}; add (16) g97.0<1>UW g97.0<16,16,1>UW g80.4<16,16,1>UB {align1}; add (16) g98.0<1>UW g98.0<16,16,1>UW g82.4<16,16,1>UB {align1}; add (16) g99.0<1>UW g99.0<16,16,1>UW g84.4<16,16,1>UB {align1}; add (16) g100.0<1>UW g100.0<16,16,1>UW g86.4<16,16,1>UB {align1}; add (16) g101.0<1>UW g101.0<16,16,1>UW g88.4<16,16,1>UB {align1}; add (16) g102.0<1>UW g102.0<16,16,1>UW g90.4<16,16,1>UB {align1}; add (16) g103.0<1>UW g103.0<16,16,1>UW g92.4<16,16,1>UB {align1}; add (16) g96.0<1>UW g96.0<16,16,1>UW g80.4<16,16,1>UB {align1}; add (16) g97.0<1>UW g97.0<16,16,1>UW g82.4<16,16,1>UB {align1}; add (16) g98.0<1>UW g98.0<16,16,1>UW g84.4<16,16,1>UB {align1}; add (16) g99.0<1>UW g99.0<16,16,1>UW g86.4<16,16,1>UB {align1}; add (16) g100.0<1>UW g100.0<16,16,1>UW g88.4<16,16,1>UB {align1}; add (16) g101.0<1>UW g101.0<16,16,1>UW g90.4<16,16,1>UB {align1}; add (16) g102.0<1>UW g102.0<16,16,1>UW g92.4<16,16,1>UB {align1}; add (16) g103.0<1>UW g103.0<16,16,1>UW g94.4<16,16,1>UB {align1}; out: shr (16) g96.0<1>UW g96.0<16,16,1>UW 2UW {align1}; shr (16) g97.0<1>UW g97.0<16,16,1>UW 2UW {align1}; shr (16) g98.0<1>UW g98.0<16,16,1>UW 2UW {align1}; shr (16) g99.0<1>UW g99.0<16,16,1>UW 2UW {align1}; shr (16) g100.0<1>UW g100.0<16,16,1>UW 2UW {align1}; shr (16) g101.0<1>UW g101.0<16,16,1>UW 2UW {align1}; shr (16) g102.0<1>UW g102.0<16,16,1>UW 2UW {align1}; shr (16) g103.0<1>UW g103.0<16,16,1>UW 2UW {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x0y0_uv_igd.g4i0000664000175000017500000000176312400044327021463 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (1) g32.8<1>UD 0x007000fUD {align1}; and.nz (1) null g32.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g34.0<1>UW g32<8,8,1>UW read(5, 2, 0, 2) mlen 1 rlen 4 {align1}; send (16) 0 g44.0<1>UW g32<8,8,1>UW read(6, 2, 0, 2) mlen 1 rlen 4 {align1}; jmpi put_data; read_backward: send (16) 0 g34.0<1>UW g32<8,8,1>UW read(8, 2, 0, 2) mlen 1 rlen 4 {align1}; send (16) 0 g44.0<1>UW g32<8,8,1>UW read(9, 2, 0, 2) mlen 1 rlen 4 {align1}; put_data: mov (32) g74.0<1>UW g34.0<16,8,1>UB {align1 compr}; mov (32) g76.0<1>UW g36.0<16,8,1>UB {align1 compr}; mov (32) g78.0<1>UW g44.0<16,8,1>UB {align1 compr}; mov (32) g80.0<1>UW g46.0<16,8,1>UB {align1 compr}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x0y0_y_igd.g4i0000664000175000017500000000234112400044327021263 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g84~g107:IDCT data g115: message descriptor for reading reference data */ mov (1) g115.8<1>UD 0x07001FUD {align1}; and.nz (1) null g115.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g40.0<1>UW g115<8,8,1>UW read(4,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(4,2,0,2) mlen 1 rlen 8 {align1}; jmpi put_data; read_backward: send (16) 0 g40.0<1>UW g115<8,8,1>UW read(7,2,0,2) mlen 1 rlen 8 {align1}; add (1) g115.4<1>UD g115.4<1,1,1>UD 8UD {align1}; send (16) 0 g48.0<1>UW g115<8,8,1>UW read(7,2,0,2) mlen 1 rlen 8 {align1}; put_data: mov (16) g32.0<1>UW g40.0<16,16,1>UB {align1}; mov (16) g33.0<1>UW g42.0<16,16,1>UB {align1}; mov (16) g34.0<1>UW g44.0<16,16,1>UB {align1}; mov (16) g35.0<1>UW g46.0<16,16,1>UB {align1}; mov (16) g36.0<1>UW g48.0<16,16,1>UB {align1}; mov (16) g37.0<1>UW g50.0<16,16,1>UB {align1}; mov (16) g38.0<1>UW g52.0<16,16,1>UB {align1}; mov (16) g39.0<1>UW g54.0<16,16,1>UB {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x1y1_uv_igd.g4i0000664000175000017500000000720112400044327021456 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ send (16) 0 g86.0<1>UW g2<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 4 {align1}; send (16) 0 g94.0<1>UW g2<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 4 {align1}; mov (1) g2.8<1>UD 0x01001FUD {align1}; add (1) g2.4<1>UD g2.4<1,1,1>UD 8D {align1}; send (16) 0 g90.0<1>UW g2<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 1 {align1}; send (16) 0 g98.0<1>UW g2<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 1 {align1}; mov (1) g2.8<1>UD 0x007000fUD {align1}; add (16) g44.0<1>UW g86.0<16,8,1>UB g86.1<16,8,1>UB{align1}; add (16) g45.0<1>UW g87.0<16,8,1>UB g87.1<16,8,1>UB{align1}; add (16) g46.0<1>UW g88.0<16,8,1>UB g88.1<16,8,1>UB{align1}; add (16) g47.0<1>UW g89.0<16,8,1>UB g89.1<16,8,1>UB{align1}; add (16) g44.0<1>UW g44.0<16,16,1>UW g87.0<16,8,1>UB{align1}; add (16) g45.0<1>UW g45.0<16,16,1>UW g88.0<16,8,1>UB{align1}; add (16) g46.0<1>UW g46.0<16,16,1>UW g89.0<16,8,1>UB{align1}; add (16) g47.0<1>UW g47.0<16,16,1>UW g90.0<16,8,1>UB{align1}; add (16) g44.0<1>UW g44.0<16,16,1>UW g87.1<16,8,1>UB{align1}; add (16) g45.0<1>UW g45.0<16,16,1>UW g88.1<16,8,1>UB{align1}; add (16) g46.0<1>UW g46.0<16,16,1>UW g89.1<16,8,1>UB{align1}; add (16) g47.0<1>UW g47.0<16,16,1>UW g90.1<16,8,1>UB{align1}; add (16) g48.0<1>UW g94.0<16,8,1>UB g95.0<16,8,1>UB{align1}; add (16) g49.0<1>UW g95.0<16,8,1>UB g96.0<16,8,1>UB{align1}; add (16) g50.0<1>UW g96.0<16,8,1>UB g97.0<16,8,1>UB{align1}; add (16) g51.0<1>UW g97.0<16,8,1>UB g98.0<16,8,1>UB{align1}; add (16) g48.0<1>UW g48.0<16,16,1>UW g94.1<16,8,1>UB{align1}; add (16) g49.0<1>UW g49.0<16,16,1>UW g95.1<16,8,1>UB{align1}; add (16) g50.0<1>UW g50.0<16,16,1>UW g96.1<16,8,1>UB{align1}; add (16) g51.0<1>UW g51.0<16,16,1>UW g97.1<16,8,1>UB{align1}; add (16) g48.0<1>UW g48.0<16,16,1>UW g95.1<16,8,1>UB{align1}; add (16) g49.0<1>UW g49.0<16,16,1>UW g96.1<16,8,1>UB{align1}; add (16) g50.0<1>UW g50.0<16,16,1>UW g97.1<16,8,1>UB{align1}; add (16) g51.0<1>UW g51.0<16,16,1>UW g98.1<16,8,1>UB{align1}; shr.sat (16) g44.0<1>UW g44.0<16,16,1>UW 2UW {align1}; shr.sat (16) g45.0<1>UW g45.0<16,16,1>UW 2UW {align1}; shr.sat (16) g46.0<1>UW g46.0<16,16,1>UW 2UW {align1}; shr.sat (16) g47.0<1>UW g47.0<16,16,1>UW 2UW {align1}; shr.sat (16) g48.0<1>UW g48.0<16,16,1>UW 2UW {align1}; shr.sat (16) g49.0<1>UW g49.0<16,16,1>UW 2UW {align1}; shr.sat (16) g50.0<1>UW g50.0<16,16,1>UW 2UW {align1}; shr.sat (16) g51.0<1>UW g51.0<16,16,1>UW 2UW {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/dual_prime.g4b.gen50000664000175000017500000041303212400044327020124 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x40b10040, 0x02180203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00600001, 0x2e800021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021002e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x26800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000e3c, 0x0021003f, 0x00000004 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210036, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x26a00021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x26e00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x27200021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x27600021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0ce0, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x0045002e, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021002e, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x28800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x00450036, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x28900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x28b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x28d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x28f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x29100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x29300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x29500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x29700129, 0x008d0aa0, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0e80, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00000001, 0x20280061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00010001 }, { 0x00200040, 0x2e6034a5, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20000c3c, 0x00210054, 0x00000008 }, { 0x00010040, 0x2e641ca5, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a007 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x80800042, 0x23802529, 0x00b10680, 0x00b10380 }, { 0x80800042, 0x23a02529, 0x00b106a0, 0x00b10c00 }, { 0x80800042, 0x23c02529, 0x00b106c0, 0x00b103c0 }, { 0x80800042, 0x23e02529, 0x00b106e0, 0x00b10c20 }, { 0x80800042, 0x24002529, 0x00b10700, 0x00b10400 }, { 0x80800042, 0x24202529, 0x00b10720, 0x00b10c40 }, { 0x80800042, 0x24402529, 0x00b10740, 0x00b10440 }, { 0x80800042, 0x24602529, 0x00b10760, 0x00b10c60 }, { 0x80800042, 0x24802529, 0x00b10780, 0x00b10480 }, { 0x80800042, 0x24a02529, 0x00b107a0, 0x00b10c80 }, { 0x80800042, 0x24c02529, 0x00b107c0, 0x00b104c0 }, { 0x80800042, 0x24e02529, 0x00b107e0, 0x00b10ca0 }, { 0x80800042, 0x25002529, 0x00b10800, 0x00b10500 }, { 0x80800042, 0x25202529, 0x00b10820, 0x00b10cc0 }, { 0x80800042, 0x25402529, 0x00b10840, 0x00b10540 }, { 0x80800042, 0x25602529, 0x00b10860, 0x00b10ce0 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e3dad, 0x00450032, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210032, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x00210034, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e3dad, 0x0045003a, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021003a, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x0021003c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a008 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a008 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a009 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26700129, 0x008d0aa0, 0x00000000 }, { 0x80800042, 0x25802529, 0x00b10880, 0x00b10580 }, { 0x80800042, 0x25a02529, 0x00b108a0, 0x00b105a0 }, { 0x80800042, 0x25c02529, 0x00b108c0, 0x00b105c0 }, { 0x80800042, 0x25e02529, 0x00b108e0, 0x00b105e0 }, { 0x80800042, 0x26002529, 0x00b10900, 0x00b10600 }, { 0x80800042, 0x26202529, 0x00b10920, 0x00b10620 }, { 0x80800042, 0x26402529, 0x00b10940, 0x00b10640 }, { 0x80800042, 0x26602529, 0x00b10960, 0x00b10660 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x12082000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 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0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e2dad, 0x00450036, 0x00010001 }, { 0x00200040, 0x2e603421, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210036, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000b1 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000007d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000009a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000068 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000035 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x008d0e60, 0x0411a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x008d0e60, 0x0411a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x008d0e60, 0x0418a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23a00021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23e00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24200021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24600021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24a00021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24e00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25200021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25600021, 0x008d0ce0, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e2dad, 0x0045002e, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021002e, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e2dad, 0x00450036, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210036, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000a2 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000076 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000004a }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000031 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000018 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000082 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000058 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000002d }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x00ad0e60, 0x0411a005 }, { 0x00800031, 0x2be01d29, 0x00ad0e60, 0x0411a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000029 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x00ad0e60, 0x0414a005 }, { 0x00800031, 0x2b601d29, 0x00ad0e60, 0x0414a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x0000001a }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26700129, 0x008d0aa0, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000011 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05902000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x008d0020, 0x05302002 }, { 0x00800031, 0x24001d28, 0x008d0000, 0x87100000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/motion_field_y.g4i0000664000175000017500000000320312400044327020150 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ and.z (1) null mv1<1,1,1>UW 1UW {align1}; (f0) jmpi L1; and.z (1) null mv2<1,1,1>UW 1UW {align1}; (f0) jmpi L2; include(`read_field_x1y1_y.g4i') jmpi L5; L2: include(`read_field_x1y0_y.g4i') jmpi L5; L1: and.z (1) null mv2<1,1,1>UW 1UW {align1}; (f0) jmpi L4; include(`read_field_x0y1_y.g4i') jmpi L5; L4: include(`read_field_x0y0_y.g4i') L5: xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x0y0_uv.g4i0000664000175000017500000000605312400044327020635 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ and (1) g2.24<1>UD g2.0<1,1,1>UD 0x3UD {align1}; send (16) 0 g86.0<1>UW g2<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 4 {align1}; send (16) 0 g90.0<1>UW g2<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 4 {align1}; mul(1) g2.24<1>UD g2.24<1,1,1>UD 0x9UD {align1}; jmpi g2.24<1,1,1>D; mov (16) g44.0<1>UW g86.0<16,8,1>UB {align1}; mov (16) g45.0<1>UW g87.0<16,8,1>UB {align1}; mov (16) g46.0<1>UW g88.0<16,8,1>UB {align1}; mov (16) g47.0<1>UW g89.0<16,8,1>UB {align1}; mov (16) g48.0<1>UW g90.0<16,8,1>UB {align1}; mov (16) g49.0<1>UW g91.0<16,8,1>UB {align1}; mov (16) g50.0<1>UW g92.0<16,8,1>UB {align1}; mov (16) g51.0<1>UW g93.0<16,8,1>UB {align1}; jmpi out; mov (16) g44.0<1>UW g86.1<16,8,1>UB {align1}; mov (16) g45.0<1>UW g87.1<16,8,1>UB {align1}; mov (16) g46.0<1>UW g88.1<16,8,1>UB {align1}; mov (16) g47.0<1>UW g89.1<16,8,1>UB {align1}; mov (16) g48.0<1>UW g90.1<16,8,1>UB {align1}; mov (16) g49.0<1>UW g91.1<16,8,1>UB {align1}; mov (16) g50.0<1>UW g92.1<16,8,1>UB {align1}; mov (16) g51.0<1>UW g93.1<16,8,1>UB {align1}; jmpi out; mov (16) g44.0<1>UW g86.2<16,8,1>UB {align1}; mov (16) g45.0<1>UW g87.2<16,8,1>UB {align1}; mov (16) g46.0<1>UW g88.2<16,8,1>UB {align1}; mov (16) g47.0<1>UW g89.2<16,8,1>UB {align1}; mov (16) g48.0<1>UW g90.2<16,8,1>UB {align1}; mov (16) g49.0<1>UW g91.2<16,8,1>UB {align1}; mov (16) g50.0<1>UW g92.2<16,8,1>UB {align1}; mov (16) g51.0<1>UW g93.2<16,8,1>UB {align1}; jmpi out; mov (16) g44.0<1>UW g86.3<16,8,1>UB {align1}; mov (16) g45.0<1>UW g87.3<16,8,1>UB {align1}; mov (16) g46.0<1>UW g88.3<16,8,1>UB {align1}; mov (16) g47.0<1>UW g89.3<16,8,1>UB {align1}; mov (16) g48.0<1>UW g90.3<16,8,1>UB {align1}; mov (16) g49.0<1>UW g91.3<16,8,1>UB {align1}; mov (16) g50.0<1>UW g92.3<16,8,1>UB {align1}; mov (16) g51.0<1>UW g93.3<16,8,1>UB {align1}; out: xf86-video-intel-2.99.917/xvmc/shader/mc/Makefile.in0000664000175000017500000004446112445556120016633 00000000000000# Makefile.in generated by automake 1.14.1 from Makefile.am. # @configure_input@ # Copyright (C) 1994-2013 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY, to the extent permitted by law; without # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. @SET_MAKE@ VPATH = @srcdir@ am__is_gnu_make = test -n '$(MAKEFILE_LIST)' && test -n '$(MAKELEVEL)' am__make_running_with_option = \ case $${target_option-} in \ ?) ;; \ *) echo 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@localstatedir@ mandir = @mandir@ mkdir_p = @mkdir_p@ moduledir = @moduledir@ oldincludedir = @oldincludedir@ pdfdir = @pdfdir@ prefix = @prefix@ program_transform_name = @program_transform_name@ psdir = @psdir@ sbindir = @sbindir@ sharedstatedir = @sharedstatedir@ srcdir = @srcdir@ sysconfdir = @sysconfdir@ target_alias = @target_alias@ top_build_prefix = @top_build_prefix@ top_builddir = @top_builddir@ top_srcdir = @top_srcdir@ INTEL_G4A = dual_prime_igd.g4a \ field_backward_igd.g4a \ field_f_b_igd.g4a \ field_forward_igd.g4a \ frame_backward_igd.g4a \ frame_f_b_igd.g4a \ frame_forward_igd.g4a \ dual_prime.g4a \ field_backward.g4a \ field_f_b.g4a \ field_forward.g4a \ frame_backward.g4a \ frame_f_b.g4a \ frame_forward.g4a \ lib_igd.g4a \ ipicture.g4a \ ipicture_igd.g4a \ null.g4a INTEL_G4I = addidct.g4i \ addidct_igd.g4i \ block_clear.g4i \ read_frame_x0y0_y.g4i \ read_frame_x0y1_y.g4i \ read_frame_x1y0_y.g4i \ read_frame_x1y1_y.g4i \ read_frame_x0y0_uv.g4i \ read_frame_x0y1_uv.g4i \ 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frame_f_b.g4b \ frame_forward.g4b \ dual_prime_igd.g4b \ field_backward_igd.g4b \ field_f_b_igd.g4b \ field_forward_igd.g4b \ frame_backward_igd.g4b \ frame_f_b_igd.g4b \ frame_forward_igd.g4b \ ipicture.g4b \ ipicture_igd.g4b \ lib_igd.g4b \ null.g4b INTEL_G4B_GEN5 = dual_prime.g4b.gen5 \ field_backward.g4b.gen5 \ field_f_b.g4b.gen5 \ field_forward.g4b.gen5 \ frame_backward.g4b.gen5 \ frame_f_b.g4b.gen5 \ frame_forward.g4b.gen5 \ dual_prime_igd.g4b.gen5 \ field_backward_igd.g4b.gen5 \ field_f_b_igd.g4b.gen5 \ field_forward_igd.g4b.gen5 \ frame_backward_igd.g4b.gen5 \ frame_f_b_igd.g4b.gen5 \ frame_forward_igd.g4b.gen5 \ ipicture.g4b.gen5 \ ipicture_igd.g4b.gen5 \ lib_igd.g4b.gen5 \ null.g4b.gen5 EXTRA_DIST = $(INTEL_G4A) \ $(INTEL_G4I) \ $(INTEL_G4B) \ $(INTEL_G4B_GEN5) @HAVE_GEN4ASM_TRUE@SUFFIXES = .g4a .g4b @HAVE_GEN4ASM_TRUE@BUILT_SOURCES = $(INTEL_G4B) all: $(BUILT_SOURCES) $(MAKE) $(AM_MAKEFLAGS) all-am .SUFFIXES: .SUFFIXES: .g4a .g4b $(srcdir)/Makefile.in: $(srcdir)/Makefile.am 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ps-am \ tags-am uninstall uninstall-am @HAVE_GEN4ASM_TRUE@.g4a.g4b: @HAVE_GEN4ASM_TRUE@ $(AM_V_GEN)m4 -I$(srcdir) $(srcdir)/$*.g4a > $*.g4m && @INTEL_GEN4ASM@ -o $@ $*.g4m && @INTEL_GEN4ASM@ -g 5 -o $@.gen5 $*.g4m && rm $*.g4m @HAVE_GEN4ASM_TRUE@$(INTEL_G4B): $(INTEL_GEN4ASM) $(INTEL_G4I) @HAVE_GEN4ASM_TRUE@clean-local: @HAVE_GEN4ASM_TRUE@ -rm -f $(INTEL_G4B) @HAVE_GEN4ASM_TRUE@ -rm -f $(INTEL_G4B_GEN5) # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x1y1_uv.g4i0000664000175000017500000002017212400044327020635 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ and (1) g2.24<1>UD g2.0<1,1,1>UD 0x3UD {align1}; send (16) 0 g86.0<1>UW g2<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 4 {align1}; send (16) 0 g94.0<1>UW g2<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 4 {align1}; mov (1) g2.8<1>UD 0x01001FUD {align1}; add (1) g2.4<1>UD g2.4<1,1,1>UD 8D {align1}; send (16) 0 g90.0<1>UW g2<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 1 {align1}; send (16) 0 g98.0<1>UW g2<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 1 {align1}; mov (1) g2.8<1>UD 0x007000fUD {align1}; mul(1) g2.24<1>UD g2.24<1,1,1>UD 25UD {align1}; jmpi g2.24<1,1,1>D; add (16) g44.0<1>UW g86.0<16,8,1>UB g86.1<16,8,1>UB{align1}; add (16) g45.0<1>UW g87.0<16,8,1>UB g87.1<16,8,1>UB{align1}; add (16) g46.0<1>UW g88.0<16,8,1>UB g88.1<16,8,1>UB{align1}; add (16) g47.0<1>UW g89.0<16,8,1>UB g89.1<16,8,1>UB{align1}; add (16) g44.0<1>UW g44.0<16,16,1>UW g87.0<16,8,1>UB{align1}; add (16) g45.0<1>UW g45.0<16,16,1>UW g88.0<16,8,1>UB{align1}; add (16) g46.0<1>UW g46.0<16,16,1>UW g89.0<16,8,1>UB{align1}; add (16) g47.0<1>UW g47.0<16,16,1>UW g90.0<16,8,1>UB{align1}; add (16) g44.0<1>UW g44.0<16,16,1>UW g87.1<16,8,1>UB{align1}; add (16) g45.0<1>UW g45.0<16,16,1>UW g88.1<16,8,1>UB{align1}; add (16) g46.0<1>UW g46.0<16,16,1>UW g89.1<16,8,1>UB{align1}; add (16) g47.0<1>UW g47.0<16,16,1>UW g90.1<16,8,1>UB{align1}; add (16) g48.0<1>UW g94.0<16,8,1>UB g95.0<16,8,1>UB{align1}; add (16) g49.0<1>UW g95.0<16,8,1>UB g96.0<16,8,1>UB{align1}; add (16) g50.0<1>UW g96.0<16,8,1>UB g97.0<16,8,1>UB{align1}; add (16) g51.0<1>UW g97.0<16,8,1>UB g98.0<16,8,1>UB{align1}; add (16) g48.0<1>UW g48.0<16,16,1>UW g94.1<16,8,1>UB{align1}; add (16) g49.0<1>UW g49.0<16,16,1>UW g95.1<16,8,1>UB{align1}; add (16) g50.0<1>UW g50.0<16,16,1>UW g96.1<16,8,1>UB{align1}; add (16) g51.0<1>UW g51.0<16,16,1>UW g97.1<16,8,1>UB{align1}; add (16) g48.0<1>UW g48.0<16,16,1>UW g95.1<16,8,1>UB{align1}; add (16) g49.0<1>UW g49.0<16,16,1>UW g96.1<16,8,1>UB{align1}; add (16) g50.0<1>UW g50.0<16,16,1>UW g97.1<16,8,1>UB{align1}; add (16) g51.0<1>UW g51.0<16,16,1>UW g98.1<16,8,1>UB{align1}; jmpi out; add (16) g44.0<1>UW g86.1<16,8,1>UB g86.2<16,8,1>UB{align1}; add (16) g45.0<1>UW g87.1<16,8,1>UB g87.2<16,8,1>UB{align1}; add (16) g46.0<1>UW g88.1<16,8,1>UB g88.2<16,8,1>UB{align1}; add (16) g47.0<1>UW g89.1<16,8,1>UB g89.2<16,8,1>UB{align1}; add (16) g44.0<1>UW g44.0<16,16,1>UW g87.1<16,8,1>UB{align1}; add (16) g45.0<1>UW g45.0<16,16,1>UW g88.1<16,8,1>UB{align1}; add (16) g46.0<1>UW g46.0<16,16,1>UW g89.1<16,8,1>UB{align1}; add (16) g47.0<1>UW g47.0<16,16,1>UW g90.1<16,8,1>UB{align1}; add (16) g44.0<1>UW g44.0<16,16,1>UW g87.2<16,8,1>UB{align1}; add (16) g45.0<1>UW g45.0<16,16,1>UW g88.2<16,8,1>UB{align1}; add (16) g46.0<1>UW g46.0<16,16,1>UW g89.2<16,8,1>UB{align1}; add (16) g47.0<1>UW g47.0<16,16,1>UW g90.2<16,8,1>UB{align1}; add (16) g48.0<1>UW g94.1<16,8,1>UB g95.1<16,8,1>UB{align1}; add (16) g49.0<1>UW g95.1<16,8,1>UB g96.1<16,8,1>UB{align1}; add (16) g50.0<1>UW g96.1<16,8,1>UB g97.1<16,8,1>UB{align1}; add (16) g51.0<1>UW g97.1<16,8,1>UB g98.1<16,8,1>UB{align1}; add (16) g48.0<1>UW g48.0<16,16,1>UW g94.2<16,8,1>UB{align1}; add (16) g49.0<1>UW g49.0<16,16,1>UW g95.2<16,8,1>UB{align1}; add (16) g50.0<1>UW g50.0<16,16,1>UW g96.2<16,8,1>UB{align1}; add (16) g51.0<1>UW g51.0<16,16,1>UW g97.2<16,8,1>UB{align1}; add (16) g48.0<1>UW g48.0<16,16,1>UW g95.2<16,8,1>UB{align1}; add (16) g49.0<1>UW g49.0<16,16,1>UW g96.2<16,8,1>UB{align1}; add (16) g50.0<1>UW g50.0<16,16,1>UW g97.2<16,8,1>UB{align1}; add (16) g51.0<1>UW g51.0<16,16,1>UW g98.2<16,8,1>UB{align1}; jmpi out; add (16) g44.0<1>UW g86.2<16,8,1>UB g86.3<16,8,1>UB{align1}; add (16) g45.0<1>UW g87.2<16,8,1>UB g87.3<16,8,1>UB{align1}; add (16) g46.0<1>UW g88.2<16,8,1>UB g88.3<16,8,1>UB{align1}; add (16) g47.0<1>UW g89.2<16,8,1>UB g89.3<16,8,1>UB{align1}; add (16) g44.0<1>UW g44.0<16,16,1>UW g87.2<16,8,1>UB{align1}; add (16) g45.0<1>UW g45.0<16,16,1>UW g88.2<16,8,1>UB{align1}; add (16) g46.0<1>UW g46.0<16,16,1>UW g89.2<16,8,1>UB{align1}; add (16) g47.0<1>UW g47.0<16,16,1>UW g90.2<16,8,1>UB{align1}; add (16) g44.0<1>UW g44.0<16,16,1>UW g87.3<16,8,1>UB{align1}; add (16) g45.0<1>UW g45.0<16,16,1>UW g88.3<16,8,1>UB{align1}; add (16) g46.0<1>UW g46.0<16,16,1>UW g89.3<16,8,1>UB{align1}; add (16) g47.0<1>UW g47.0<16,16,1>UW g90.3<16,8,1>UB{align1}; add (16) g48.0<1>UW g94.2<16,8,1>UB g95.2<16,8,1>UB{align1}; add (16) g49.0<1>UW g95.2<16,8,1>UB g96.2<16,8,1>UB{align1}; add (16) g50.0<1>UW g96.2<16,8,1>UB g97.2<16,8,1>UB{align1}; add (16) g51.0<1>UW g97.2<16,8,1>UB g98.2<16,8,1>UB{align1}; add (16) g48.0<1>UW g48.0<16,16,1>UW g94.3<16,8,1>UB{align1}; add (16) g49.0<1>UW g49.0<16,16,1>UW g95.3<16,8,1>UB{align1}; add (16) g50.0<1>UW g50.0<16,16,1>UW g96.3<16,8,1>UB{align1}; add (16) g51.0<1>UW g51.0<16,16,1>UW g97.3<16,8,1>UB{align1}; add (16) g48.0<1>UW g48.0<16,16,1>UW g95.3<16,8,1>UB{align1}; add (16) g49.0<1>UW g49.0<16,16,1>UW g96.3<16,8,1>UB{align1}; add (16) g50.0<1>UW g50.0<16,16,1>UW g97.3<16,8,1>UB{align1}; add (16) g51.0<1>UW g51.0<16,16,1>UW g98.3<16,8,1>UB{align1}; jmpi out; add (16) g44.0<1>UW g86.3<16,8,1>UB g86.4<16,8,1>UB{align1}; add (16) g45.0<1>UW g87.3<16,8,1>UB g87.4<16,8,1>UB{align1}; add (16) g46.0<1>UW g88.3<16,8,1>UB g88.4<16,8,1>UB{align1}; add (16) g47.0<1>UW g89.3<16,8,1>UB g89.4<16,8,1>UB{align1}; add (16) g44.0<1>UW g44.0<16,16,1>UW g87.3<16,8,1>UB{align1}; add (16) g45.0<1>UW g45.0<16,16,1>UW g88.3<16,8,1>UB{align1}; add (16) g46.0<1>UW g46.0<16,16,1>UW g89.3<16,8,1>UB{align1}; add (16) g47.0<1>UW g47.0<16,16,1>UW g90.3<16,8,1>UB{align1}; add (16) g44.0<1>UW g44.0<16,16,1>UW g87.4<16,8,1>UB{align1}; add (16) g45.0<1>UW g45.0<16,16,1>UW g88.4<16,8,1>UB{align1}; add (16) g46.0<1>UW g46.0<16,16,1>UW g89.4<16,8,1>UB{align1}; add (16) g47.0<1>UW g47.0<16,16,1>UW g90.4<16,8,1>UB{align1}; add (16) g48.0<1>UW g94.3<16,8,1>UB g95.3<16,8,1>UB{align1}; add (16) g49.0<1>UW g95.3<16,8,1>UB g96.3<16,8,1>UB{align1}; add (16) g50.0<1>UW g96.3<16,8,1>UB g97.3<16,8,1>UB{align1}; add (16) g51.0<1>UW g97.3<16,8,1>UB g98.3<16,8,1>UB{align1}; add (16) g48.0<1>UW g48.0<16,16,1>UW g94.4<16,8,1>UB{align1}; add (16) g49.0<1>UW g49.0<16,16,1>UW g95.4<16,8,1>UB{align1}; add (16) g50.0<1>UW g50.0<16,16,1>UW g96.4<16,8,1>UB{align1}; add (16) g51.0<1>UW g51.0<16,16,1>UW g97.4<16,8,1>UB{align1}; add (16) g48.0<1>UW g48.0<16,16,1>UW g95.4<16,8,1>UB{align1}; add (16) g49.0<1>UW g49.0<16,16,1>UW g96.4<16,8,1>UB{align1}; add (16) g50.0<1>UW g50.0<16,16,1>UW g97.4<16,8,1>UB{align1}; add (16) g51.0<1>UW g51.0<16,16,1>UW g98.4<16,8,1>UB{align1}; out: shr.sat (16) g44.0<1>UW g44.0<16,16,1>UW 2UW {align1}; shr.sat (16) g45.0<1>UW g45.0<16,16,1>UW 2UW {align1}; shr.sat (16) g46.0<1>UW g46.0<16,16,1>UW 2UW {align1}; shr.sat (16) g47.0<1>UW g47.0<16,16,1>UW 2UW {align1}; shr.sat (16) g48.0<1>UW g48.0<16,16,1>UW 2UW {align1}; shr.sat (16) g49.0<1>UW g49.0<16,16,1>UW 2UW {align1}; shr.sat (16) g50.0<1>UW g50.0<16,16,1>UW 2UW {align1}; shr.sat (16) g51.0<1>UW g51.0<16,16,1>UW 2UW {align1}; xf86-video-intel-2.99.917/xvmc/shader/mc/frame_f_b.g4a0000664000175000017500000001300112400044327017035 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ /* shader for forward and backward predict mc */ /* (x', y') = (x, y) + (motion_vector1.x >> 1, motion_vector1.y >> 1) /* (x'', y'') = (x, y) + (motion_vector2.x >> 1, motion_vector2.y >> 1) /* f(x, y) = (motion_forward(x`, y`) + motion_backward(x'', y'') + 1) / 2 */ //Save payload mov (8) g76.0<1>UD g1.0<8,8,1>UD {align1}; //mov (8) g77.0<1>UD g2.0<8,8,1>UD {align1}; include(`block_clear.g4i') mov (8) g115.0<1>UD g1.0<8,8,1>UD {align1}; mov (1) g1.8<1>UD 0x0070007UD {align1}; mov (8) g2.0<1>UD g1.0<8,8,1>UD {align1}; /* Y */ //Forward asr (2) g1.14<1>W g115.14<2,2,1>W 1W {align1}; add (2) g2.0<1>UD g115.0<2,2,1>UD g1.14<2,2,1>W {align1}; define(`input_surface', `4') define(`mv1', `g115.14') define(`mv2', `g115.16') include(`motion_frame_y.g4i') mov (16) g52.0<1>UD g28.0<16,16,1>UD {align1 compr}; mov (16) g54.0<1>UD g30.0<16,16,1>UD {align1 compr}; mov (16) g56.0<1>UD g32.0<16,16,1>UD {align1 compr}; mov (16) g58.0<1>UD g34.0<16,16,1>UD {align1 compr}; mov (16) g60.0<1>UD g36.0<16,16,1>UD {align1 compr}; mov (16) g62.0<1>UD g38.0<16,16,1>UD {align1 compr}; mov (16) g64.0<1>UD g40.0<16,16,1>UD {align1 compr}; mov (16) g66.0<1>UD g42.0<16,16,1>UD {align1 compr}; //Backward asr (2) g1.14<1>W g115.18<2,2,1>W 1W {align1}; add (2) g2.0<1>UD g115.0<2,2,1>UD g1.14<2,2,1>W {align1}; define(`input_surface', `7') define(`mv1', `g115.18') define(`mv2', `g115.20') include(`motion_frame_y.g4i') //Average avg.sat (16) g28.0<1>UW g28.0<16,16,1>UW g52.0<16,16,1>UW {align1}; avg.sat (16) g29.0<1>UW g29.0<16,16,1>UW g53.0<16,16,1>UW {align1}; avg.sat (16) g30.0<1>UW g30.0<16,16,1>UW g54.0<16,16,1>UW {align1}; avg.sat (16) g31.0<1>UW g31.0<16,16,1>UW g55.0<16,16,1>UW {align1}; avg.sat (16) g32.0<1>UW g32.0<16,16,1>UW g56.0<16,16,1>UW {align1}; avg.sat (16) g33.0<1>UW g33.0<16,16,1>UW g57.0<16,16,1>UW {align1}; avg.sat (16) g34.0<1>UW g34.0<16,16,1>UW g58.0<16,16,1>UW {align1}; avg.sat (16) g35.0<1>UW g35.0<16,16,1>UW g59.0<16,16,1>UW {align1}; avg.sat (16) g36.0<1>UW g36.0<16,16,1>UW g60.0<16,16,1>UW {align1}; avg.sat (16) g37.0<1>UW g37.0<16,16,1>UW g61.0<16,16,1>UW {align1}; avg.sat (16) g38.0<1>UW g38.0<16,16,1>UW g62.0<16,16,1>UW {align1}; avg.sat (16) g39.0<1>UW g39.0<16,16,1>UW g63.0<16,16,1>UW {align1}; avg.sat (16) g40.0<1>UW g40.0<16,16,1>UW g64.0<16,16,1>UW {align1}; avg.sat (16) g41.0<1>UW g41.0<16,16,1>UW g65.0<16,16,1>UW {align1}; avg.sat (16) g42.0<1>UW g42.0<16,16,1>UW g66.0<16,16,1>UW {align1}; avg.sat (16) g43.0<1>UW g43.0<16,16,1>UW g67.0<16,16,1>UW {align1}; /* UV */ //Forward shr (2) g1.0<1>UD g115.0<2,2,1>UD 1UD {align1}; asr (2) g115.14<1>W g115.14<2,2,1>W 1W {align1}; asr (2) g1.14<1>W g115.14<2,2,1>W 1W {align1}; add (2) g2.0<1>UD g1.0<2,2,1>UD g1.14<2,2,1>W {align1}; define(`input_surface1', `5') define(`input_surface2', `6') define(`mv1', `g115.14') define(`mv2', `g115.16') mov (1) g2.8<1>UD 0x007000fUD {align1}; include(`motion_frame_uv.g4i') mov (16) g122.0<1>UB g44.0<16,16,2>UB {align1}; mov (16) g122.16<1>UB g45.0<16,16,2>UB {align1}; mov (16) g123.0<1>UB g46.0<16,16,2>UB {align1}; mov (16) g123.16<1>UB g47.0<16,16,2>UB {align1}; mov (16) g124.0<1>UB g48.0<16,16,2>UB {align1}; mov (16) g124.16<1>UB g49.0<16,16,2>UB {align1}; mov (16) g125.0<1>UB g50.0<16,16,2>UB {align1}; mov (16) g125.16<1>UB g51.0<16,16,2>UB {align1}; //Backward asr (2) g115.18<1>W g115.18<2,2,1>W 1W {align1}; asr (2) g1.14<1>W g115.18<2,2,1>W 1W {align1}; add (2) g2.0<1>UD g1.0<2,2,1>UD g1.14<2,2,1>W {align1}; define(`input_surface1', `8') define(`input_surface2', `9') define(`mv1', `g115.18') define(`mv2', `g115.20') mov (1) g2.8<1>UD 0x007000fUD {align1}; include(`motion_frame_uv.g4i') //Average avg.sat (16) g44.0<1>UW g44.0<16,16,1>UW g122.0<16,16,1>UB {align1}; avg.sat (16) g45.0<1>UW g45.0<16,16,1>UW g122.16<16,16,1>UB {align1}; avg.sat (16) g46.0<1>UW g46.0<16,16,1>UW g123.0<16,16,1>UB {align1}; avg.sat (16) g47.0<1>UW g47.0<16,16,1>UW g123.16<16,16,1>UB {align1}; avg.sat (16) g48.0<1>UW g48.0<16,16,1>UW g124.0<16,16,1>UB {align1}; avg.sat (16) g49.0<1>UW g49.0<16,16,1>UW g124.16<16,16,1>UB {align1}; avg.sat (16) g50.0<1>UW g50.0<16,16,1>UW g125.0<16,16,1>UB {align1}; avg.sat (16) g51.0<1>UW g51.0<16,16,1>UW g125.16<16,16,1>UB {align1}; include(`addidct.g4i') send (16) 0 acc0<1>UW g0<8,8,1>UW thread_spawner(0, 0, 0) mlen 1 rlen 0 { align1 EOT}; xf86-video-intel-2.99.917/xvmc/shader/mc/lib_igd.g4a0000664000175000017500000000744612400044327016546 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix in UB format g3~g4:non intra IQ matrix in UB format g5~g20:IDCT table g32~g55:DCT data before IQ g56~g79:DCT data after IQ g84~g107: IDCT data after idct g82: thread payload backup g126.8: ip before jump to the lib */ jmpi MOTION_FRAME_Y; jmpi MOTION_FRAME_UV; jmpi MOTION_FIELD_Y; jmpi MOTION_FIELD_UV; jmpi ADD_IDCT; mov (16) g84.0<1>W g33.0<16,16,1>W {align1}; mov (16) g85.0<1>W g34.0<16,16,1>W {align1}; mov (16) g86.0<1>W g35.0<16,16,1>W {align1}; mov (16) g87.0<1>W g36.0<16,16,1>W {align1}; mov (16) g88.0<1>W g37.0<16,16,1>W {align1}; mov (16) g89.0<1>W g38.0<16,16,1>W {align1}; mov (16) g90.0<1>W g39.0<16,16,1>W {align1}; mov (16) g91.0<1>W g40.0<16,16,1>W {align1}; mov (16) g92.0<1>W g41.0<16,16,1>W {align1}; mov (16) g93.0<1>W g42.0<16,16,1>W {align1}; mov (16) g94.0<1>W g43.0<16,16,1>W {align1}; mov (16) g95.0<1>W g44.0<16,16,1>W {align1}; mov (16) g96.0<1>W g45.0<16,16,1>W {align1}; mov (16) g97.0<1>W g46.0<16,16,1>W {align1}; mov (16) g98.0<1>W g47.0<16,16,1>W {align1}; mov (16) g99.0<1>W g48.0<16,16,1>W {align1}; mov (16) g100.0<1>W g49.0<16,16,1>W {align1}; mov (16) g101.0<1>W g50.0<16,16,1>W {align1}; mov (16) g102.0<1>W g51.0<16,16,1>W {align1}; mov (16) g103.0<1>W g52.0<16,16,1>W {align1}; mov (16) g104.0<1>W g53.0<16,16,1>W {align1}; mov (16) g105.0<1>W g54.0<16,16,1>W {align1}; mov (16) g106.0<1>W g55.0<16,16,1>W {align1}; mov (16) g107.0<1>W g56.0<16,16,1>W {align1}; //Y0 and.nz (1) null g82.12<1,1,1>UW 0x20UW {align1}; (f0) jmpi block_y1; mov (8) g84.0<1>W 0W {align1}; mov (8) g85.0<1>W 0W {align1}; mov (8) g86.0<1>W 0W {align1}; mov (8) g87.0<1>W 0W {align1}; mov (8) g88.0<1>W 0W {align1}; mov (8) g89.0<1>W 0W {align1}; mov (8) g90.0<1>W 0W {align1}; mov (8) g91.0<1>W 0W {align1}; //Y1 block_y1: and.nz (1) null g82.12<1,1,1>UW 0x10UW {align1}; (f0) jmpi block_y2; mov (8) g84.16<1>W 0W {align1}; mov (8) g85.16<1>W 0W {align1}; mov (8) g86.16<1>W 0W {align1}; mov (8) g87.16<1>W 0W {align1}; mov (8) g88.16<1>W 0W {align1}; mov (8) g89.16<1>W 0W {align1}; mov (8) g90.16<1>W 0W {align1}; mov (8) g91.16<1>W 0W {align1}; //Y2 block_y2: and.nz (1) null g82.12<1,1,1>UW 0x08UW {align1}; (f0) jmpi block_y3; mov (8) g92.0<1>W 0W {align1}; mov (8) g93.0<1>W 0W {align1}; mov (8) g94.0<1>W 0W {align1}; mov (8) g95.0<1>W 0W {align1}; mov (8) g96.0<1>W 0W {align1}; mov (8) g97.0<1>W 0W {align1}; mov (8) g98.0<1>W 0W {align1}; mov (8) g99.0<1>W 0W {align1}; //Y3 block_y3: and.nz (1) null g82.12<1,1,1>UW 0x04UW {align1}; (f0) jmpi block_u; mov (8) g92.16<1>W 0W {align1}; mov (8) g93.16<1>W 0W {align1}; mov (8) g94.16<1>W 0W {align1}; mov (8) g95.16<1>W 0W {align1}; mov (8) g96.16<1>W 0W {align1}; mov (8) g97.16<1>W 0W {align1}; mov (8) g98.16<1>W 0W {align1}; mov (8) g99.16<1>W 0W {align1}; //U block_u: and.nz (1) null g82.12<1,1,1>UW 0x02UW {align1}; (f0) jmpi block_v; mov (16) g100.0<1>W 0W {align1}; mov (16) g101.0<1>W 0W {align1}; mov (16) g102.0<1>W 0W {align1}; mov (16) g103.0<1>W 0W {align1}; //V block_v: and.nz (1) null g82.12<1,1,1>UW 0x01UW {align1}; (f0) jmpi out; mov (16) g104.0<1>W 0W {align1}; mov (16) g105.0<1>W 0W {align1}; mov (16) g106.0<1>W 0W {align1}; mov (16) g107.0<1>W 0W {align1}; out: add (1) ip g126.8<1,1,1>UD 0x20UD {align1}; //jump back MOTION_FRAME_Y: include(`motion_frame_y_igd.g4i') add (1) ip g126.8<1,1,1>UD 0x20UD {align1}; //jump back MOTION_FRAME_UV: include(`motion_frame_uv_igd.g4i') add (1) ip g126.8<1,1,1>UD 0x20UD {align1}; //jump back MOTION_FIELD_Y: include(`motion_field_y_igd.g4i') add (1) ip g126.8<1,1,1>UD 0x20UD {align1}; //jump back MOTION_FIELD_UV: include(`motion_field_uv_igd.g4i') add (1) ip g126.8<1,1,1>UD 0x20UD {align1}; //jump back ADD_IDCT: include(`addidct_igd.g4i') xf86-video-intel-2.99.917/xvmc/shader/mc/field_forward.g4b.gen50000664000175000017500000021774412400044327020626 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22401c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x22e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23201c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x23401c21, 0x40b10040, 0x02180203 }, { 0x02000005, 0x20002d3c, 0x0021098c, 0x00200020 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00600001, 0x2e800021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x20280061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e2dad, 0x0045002e, 0x00010001 }, { 0x00200040, 0x2e603421, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021002e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23800021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23c00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24000021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24400021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24800021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24c00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25000021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25400021, 0x008d0ce0, 0x00000000 }, { 0x0020000c, 0x2e6e2dad, 0x00450036, 0x00010001 }, { 0x00200040, 0x2e603421, 0x00450e80, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210036, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000162 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000fa }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x00800040, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x00800040, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x00800040, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x00800040, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x00800040, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x00800040, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x00800040, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c1 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a01 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a41 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a81 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac1 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b01 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b41 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b81 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a01 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a41 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a81 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac1 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b01 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b41 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b81 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x00800040, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x00800040, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x00800040, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x00800040, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x00800040, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x00800040, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x00800040, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c2 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a02 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a42 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a82 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac2 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b02 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b42 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b82 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a02 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a42 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a82 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac2 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b02 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b42 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b82 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x00800040, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x00800040, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x00800040, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x00800040, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x00800040, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x00800040, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x00800040, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c3 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a03 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a43 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a83 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac3 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b03 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b43 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b83 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a03 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a43 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a83 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac3 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b03 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b43 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b83 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x00800040, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x00800040, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x00800040, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x00800040, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x00800040, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x00800040, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x00800040, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b109c4 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a04 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a44 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10a84 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10ac4 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b04 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b44 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10b84 }, { 0x00800040, 0x2c004529, 0x00b10c00, 0x00b10a04 }, { 0x00800040, 0x2c204529, 0x00b10c20, 0x00b10a44 }, { 0x00800040, 0x2c404529, 0x00b10c40, 0x00b10a84 }, { 0x00800040, 0x2c604529, 0x00b10c60, 0x00b10ac4 }, { 0x00800040, 0x2c804529, 0x00b10c80, 0x00b10b04 }, { 0x00800040, 0x2ca04529, 0x00b10ca0, 0x00b10b44 }, { 0x00800040, 0x2cc04529, 0x00b10cc0, 0x00b10b84 }, { 0x00800040, 0x2ce04529, 0x00b10ce0, 0x00b10bc4 }, { 0x00800008, 0x2c002d29, 0x00b10c00, 0x00020002 }, { 0x00800008, 0x2c202d29, 0x00b10c20, 0x00020002 }, { 0x00800008, 0x2c402d29, 0x00b10c40, 0x00020002 }, { 0x00800008, 0x2c602d29, 0x00b10c60, 0x00020002 }, { 0x00800008, 0x2c802d29, 0x00b10c80, 0x00020002 }, { 0x00800008, 0x2ca02d29, 0x00b10ca0, 0x00020002 }, { 0x00800008, 0x2cc02d29, 0x00b10cc0, 0x00020002 }, { 0x00800008, 0x2ce02d29, 0x00b10ce0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b109c1 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a01 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a41 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10a81 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10ac1 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b01 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b41 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10b81 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b109c2 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a02 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a42 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10a82 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10ac2 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b02 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b42 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10b82 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b109c3 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a03 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a43 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10a83 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10ac3 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b03 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b43 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10b83 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b109c4 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a04 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a44 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10a84 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10ac4 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b04 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b44 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10b84 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000006a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2bc01d29, 0x408d0e60, 0x0218a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x2c004629, 0x00b109c0, 0x00b10a00 }, { 0x80800042, 0x2c204629, 0x00b10a00, 0x00b10a40 }, { 0x80800042, 0x2c404629, 0x00b10a40, 0x00b10a80 }, { 0x80800042, 0x2c604629, 0x00b10a80, 0x00b10ac0 }, { 0x80800042, 0x2c804629, 0x00b10ac0, 0x00b10b00 }, { 0x80800042, 0x2ca04629, 0x00b10b00, 0x00b10b40 }, { 0x80800042, 0x2cc04629, 0x00b10b40, 0x00b10b80 }, { 0x80800042, 0x2ce04629, 0x00b10b80, 0x00b10bc0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x2c004629, 0x00b109c1, 0x00b10a01 }, { 0x80800042, 0x2c204629, 0x00b10a01, 0x00b10a41 }, { 0x80800042, 0x2c404629, 0x00b10a41, 0x00b10a81 }, { 0x80800042, 0x2c604629, 0x00b10a81, 0x00b10ac1 }, { 0x80800042, 0x2c804629, 0x00b10ac1, 0x00b10b01 }, { 0x80800042, 0x2ca04629, 0x00b10b01, 0x00b10b41 }, { 0x80800042, 0x2cc04629, 0x00b10b41, 0x00b10b81 }, { 0x80800042, 0x2ce04629, 0x00b10b81, 0x00b10bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x2c004629, 0x00b109c2, 0x00b10a02 }, { 0x80800042, 0x2c204629, 0x00b10a02, 0x00b10a42 }, { 0x80800042, 0x2c404629, 0x00b10a42, 0x00b10a82 }, { 0x80800042, 0x2c604629, 0x00b10a82, 0x00b10ac2 }, { 0x80800042, 0x2c804629, 0x00b10ac2, 0x00b10b02 }, { 0x80800042, 0x2ca04629, 0x00b10b02, 0x00b10b42 }, { 0x80800042, 0x2cc04629, 0x00b10b42, 0x00b10b82 }, { 0x80800042, 0x2ce04629, 0x00b10b82, 0x00b10bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x2c004629, 0x00b109c3, 0x00b10a03 }, { 0x80800042, 0x2c204629, 0x00b10a03, 0x00b10a43 }, { 0x80800042, 0x2c404629, 0x00b10a43, 0x00b10a83 }, { 0x80800042, 0x2c604629, 0x00b10a83, 0x00b10ac3 }, { 0x80800042, 0x2c804629, 0x00b10ac3, 0x00b10b03 }, { 0x80800042, 0x2ca04629, 0x00b10b03, 0x00b10b43 }, { 0x80800042, 0x2cc04629, 0x00b10b43, 0x00b10b83 }, { 0x80800042, 0x2ce04629, 0x00b10b83, 0x00b10bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000001f }, { 0x00800031, 0x29c01d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a001d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a401d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00800031, 0x2a801d29, 0x408d0e60, 0x0218a004 }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000002 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2ac01d29, 0x408d0e60, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x2c000229, 0x00b109c0, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a00, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a40, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a80, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac0, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b00, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b40, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b80, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x2c000229, 0x00b109c1, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a01, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a41, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a81, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac1, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b01, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b41, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b81, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x2c000229, 0x00b109c2, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a02, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a42, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a82, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac2, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b02, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b42, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b82, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x2c000229, 0x00b109c3, 0x00000000 }, { 0x00800001, 0x2c200229, 0x00b10a03, 0x00000000 }, { 0x00800001, 0x2c400229, 0x00b10a43, 0x00000000 }, { 0x00800001, 0x2c600229, 0x00b10a83, 0x00000000 }, { 0x00800001, 0x2c800229, 0x00b10ac3, 0x00000000 }, { 0x00800001, 0x2ca00229, 0x00b10b03, 0x00000000 }, { 0x00800001, 0x2cc00229, 0x00b10b43, 0x00000000 }, { 0x00800001, 0x2ce00229, 0x00b10b83, 0x00000000 }, { 0x00600001, 0x23a00021, 0x008d0c00, 0x00000000 }, { 0x00600001, 0x23e00021, 0x008d0c20, 0x00000000 }, { 0x00600001, 0x24200021, 0x008d0c40, 0x00000000 }, { 0x00600001, 0x24600021, 0x008d0c60, 0x00000000 }, { 0x00600001, 0x24a00021, 0x008d0c80, 0x00000000 }, { 0x00600001, 0x24e00021, 0x008d0ca0, 0x00000000 }, { 0x00600001, 0x25200021, 0x008d0cc0, 0x00000000 }, { 0x00600001, 0x25600021, 0x008d0ce0, 0x00000000 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x0020000c, 0x2e6e2dad, 0x0045002e, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x0021002e, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x00210030, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25800129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25a00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25c00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25e00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26000129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26200129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26400129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26600129, 0x008d0aa0, 0x00000000 }, { 0x0020000c, 0x2e6e2dad, 0x00450036, 0x00020002 }, { 0x0020000c, 0x2e601ca5, 0x00450e80, 0x00000001 }, { 0x00200040, 0x2e6034a5, 0x00450e60, 0x00450e6e }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x0021003f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x01000005, 0x20002d3c, 0x00210036, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000144 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000000ec }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000019 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0001000f }, { 0x00000040, 0x2e640c21, 0x00210e64, 0x00000008 }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x00800040, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x00800040, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x00800040, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae1 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b01 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b21 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae1 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b01 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b21 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b41 }, { 0x00800040, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x00800040, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x00800040, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x00800040, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b61 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b81 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b81 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba1 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc1 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00800040, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x00800040, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x00800040, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x00800040, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae2 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b02 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b22 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae2 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b02 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b22 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b42 }, { 0x00800040, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x00800040, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x00800040, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x00800040, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b62 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b82 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b82 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba2 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc2 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000062 }, { 0x00800040, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x00800040, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x00800040, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x00800040, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae3 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b03 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b23 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae3 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b03 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b23 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b43 }, { 0x00800040, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x00800040, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x00800040, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x00800040, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b63 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b83 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b83 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba3 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc3 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000030 }, { 0x00800040, 0x29c04629, 0x00ad0ac3, 0x00ad0ae3 }, { 0x00800040, 0x29e04629, 0x00ad0ae3, 0x00ad0b03 }, { 0x00800040, 0x2a004629, 0x00ad0b03, 0x00ad0b23 }, { 0x00800040, 0x2a204629, 0x00ad0b23, 0x00ad0b43 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ac4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0ae4 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b04 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b24 }, { 0x00800040, 0x29c04529, 0x00ad09c0, 0x00ad0ae4 }, { 0x00800040, 0x29e04529, 0x00ad09e0, 0x00ad0b04 }, { 0x00800040, 0x2a004529, 0x00ad0a00, 0x00ad0b24 }, { 0x00800040, 0x2a204529, 0x00ad0a20, 0x00ad0b44 }, { 0x00800040, 0x2a404629, 0x00ad0b63, 0x00ad0b83 }, { 0x00800040, 0x2a604629, 0x00ad0b83, 0x00ad0ba3 }, { 0x00800040, 0x2a804629, 0x00ad0ba3, 0x00ad0bc3 }, { 0x00800040, 0x2aa04629, 0x00ad0bc3, 0x00ad0be3 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b64 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0b84 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0ba4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0bc4 }, { 0x00800040, 0x2a404529, 0x00ad0a40, 0x00ad0b84 }, { 0x00800040, 0x2a604529, 0x00ad0a60, 0x00ad0ba4 }, { 0x00800040, 0x2a804529, 0x00ad0a80, 0x00ad0bc4 }, { 0x00800040, 0x2aa04529, 0x00ad0aa0, 0x00ad0be4 }, { 0x80800008, 0x29c02d29, 0x00b109c0, 0x00020002 }, { 0x80800008, 0x29e02d29, 0x00b109e0, 0x00020002 }, { 0x80800008, 0x2a002d29, 0x00b10a00, 0x00020002 }, { 0x80800008, 0x2a202d29, 0x00b10a20, 0x00020002 }, { 0x80800008, 0x2a402d29, 0x00b10a40, 0x00020002 }, { 0x80800008, 0x2a602d29, 0x00b10a60, 0x00020002 }, { 0x80800008, 0x2a802d29, 0x00b10a80, 0x00020002 }, { 0x80800008, 0x2aa02d29, 0x00b10aa0, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000104 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ac1 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0ae1 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b01 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b21 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b61 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0b81 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0ba1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0bc1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ac2 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0ae2 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b02 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b22 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b62 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0b82 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0ba2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0bc2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac4 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae4 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b04 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b24 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b64 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b84 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba4 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc4 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000b0 }, { 0x01000005, 0x20002d3c, 0x00210038, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000005a }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0000000f }, { 0x00800031, 0x2b401d29, 0x40ad0e60, 0x0218a005 }, { 0x00800031, 0x2be01d29, 0x40ad0e60, 0x0218a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x29c04629, 0x00ad0ac0, 0x00ad0ae0 }, { 0x80800042, 0x29e04629, 0x00ad0ae0, 0x00ad0b00 }, { 0x80800042, 0x2a004629, 0x00ad0b00, 0x00ad0b20 }, { 0x80800042, 0x2a204629, 0x00ad0b20, 0x00ad0b40 }, { 0x80800042, 0x2a404629, 0x00ad0b60, 0x00ad0b80 }, { 0x80800042, 0x2a604629, 0x00ad0b80, 0x00ad0ba0 }, { 0x80800042, 0x2a804629, 0x00ad0ba0, 0x00ad0bc0 }, { 0x80800042, 0x2aa04629, 0x00ad0bc0, 0x00ad0be0 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x80800042, 0x29c04629, 0x00ad0ac1, 0x00ad0ae1 }, { 0x80800042, 0x29e04629, 0x00ad0ae1, 0x00ad0b01 }, { 0x80800042, 0x2a004629, 0x00ad0b01, 0x00ad0b21 }, { 0x80800042, 0x2a204629, 0x00ad0b21, 0x00ad0b41 }, { 0x80800042, 0x2a404629, 0x00ad0b61, 0x00ad0b81 }, { 0x80800042, 0x2a604629, 0x00ad0b81, 0x00ad0ba1 }, { 0x80800042, 0x2a804629, 0x00ad0ba1, 0x00ad0bc1 }, { 0x80800042, 0x2aa04629, 0x00ad0bc1, 0x00ad0be1 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x80800042, 0x29c04629, 0x00ad0ac2, 0x00ad0ae2 }, { 0x80800042, 0x29e04629, 0x00ad0ae2, 0x00ad0b02 }, { 0x80800042, 0x2a004629, 0x00ad0b02, 0x00ad0b22 }, { 0x80800042, 0x2a204629, 0x00ad0b22, 0x00ad0b42 }, { 0x80800042, 0x2a404629, 0x00ad0b62, 0x00ad0b82 }, { 0x80800042, 0x2a604629, 0x00ad0b82, 0x00ad0ba2 }, { 0x80800042, 0x2a804629, 0x00ad0ba2, 0x00ad0bc2 }, { 0x80800042, 0x2aa04629, 0x00ad0bc2, 0x00ad0be2 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x80800042, 0x29c04629, 0x00ad0ac3, 0x00ad0ac3 }, { 0x80800042, 0x29e04629, 0x00ad0ae3, 0x00ad0ae3 }, { 0x80800042, 0x2a004629, 0x00ad0b03, 0x00ad0b03 }, { 0x80800042, 0x2a204629, 0x00ad0b23, 0x00ad0b23 }, { 0x80800042, 0x2a404629, 0x00ad0b63, 0x00ad0b63 }, { 0x80800042, 0x2a604629, 0x00ad0b83, 0x00ad0b83 }, { 0x80800042, 0x2a804629, 0x00ad0ba3, 0x00ad0ba3 }, { 0x80800042, 0x2aa04629, 0x00ad0bc3, 0x00ad0bc3 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000052 }, { 0x00000001, 0x2e680061, 0x00000000, 0x0007000f }, { 0x00800031, 0x2ac01d29, 0x40ad0e60, 0x0248a005 }, { 0x00800031, 0x2b601d29, 0x40ad0e60, 0x0248a006 }, { 0x00000005, 0x20580c21, 0x00210e60, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x29c00229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba0, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x29c00229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba1, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x29c00229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba2, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x29c00229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x29e00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x2a000229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x2a200229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x2a400229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x2a600229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x2a800229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2aa00229, 0x00ad0bc3, 0x00000000 }, { 0x00600001, 0x25900129, 0x008d09c0, 0x00000000 }, { 0x00600001, 0x25b00129, 0x008d09e0, 0x00000000 }, { 0x00600001, 0x25d00129, 0x008d0a00, 0x00000000 }, { 0x00600001, 0x25f00129, 0x008d0a20, 0x00000000 }, { 0x00600001, 0x26100129, 0x008d0a40, 0x00000000 }, { 0x00600001, 0x26300129, 0x008d0a60, 0x00000000 }, { 0x00600001, 0x26500129, 0x008d0a80, 0x00000000 }, { 0x00600001, 0x26700129, 0x008d0aa0, 0x00000000 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x12082000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/field_f_b_igd.g4b.gen50000664000175000017500000001477712400044327020534 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x2e700169, 0x00000000, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27400021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27800021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27c00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28000021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28400021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28800021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28c00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29000021, 0x008d04e0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a56, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a56 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00600001, 0x27600021, 0x008d0400, 0x00000000 }, { 0x00600001, 0x27a00021, 0x008d0420, 0x00000000 }, { 0x00600001, 0x27e00021, 0x008d0440, 0x00000000 }, { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 }, { 0x00600001, 0x28600021, 0x008d0480, 0x00000000 }, { 0x00600001, 0x28a00021, 0x008d04a0, 0x00000000 }, { 0x00600001, 0x28e00021, 0x008d04c0, 0x00000000 }, { 0x00600001, 0x29200021, 0x008d04e0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00010001 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29400129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29800129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29c00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a000129, 0x008d04c0, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a56, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00040004 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a56 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802001, 0x29500129, 0x008d0400, 0x00000000 }, { 0x00802001, 0x29900129, 0x008d0440, 0x00000000 }, { 0x00802001, 0x29d00129, 0x008d0480, 0x00000000 }, { 0x00802001, 0x2a100129, 0x008d04c0, 0x00000000 }, { 0x00200001, 0x23e00021, 0x00450a40, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x2e700169, 0x00000000, 0x00010001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00800042, 0x27402529, 0x00b10740, 0x00b10400 }, { 0x00800042, 0x27802529, 0x00b10780, 0x00b10420 }, { 0x00800042, 0x27c02529, 0x00b107c0, 0x00b10440 }, { 0x00800042, 0x28002529, 0x00b10800, 0x00b10460 }, { 0x00800042, 0x28402529, 0x00b10840, 0x00b10480 }, { 0x00800042, 0x28802529, 0x00b10880, 0x00b104a0 }, { 0x00800042, 0x28c02529, 0x00b108c0, 0x00b104c0 }, { 0x00800042, 0x29002529, 0x00b10900, 0x00b104e0 }, { 0x0020000c, 0x23ee3dad, 0x00450a5a, 0x00010001 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a5a }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000020 }, { 0x00800042, 0x27602529, 0x00b10760, 0x00b10400 }, { 0x00800042, 0x27a02529, 0x00b107a0, 0x00b10420 }, { 0x00800042, 0x27e02529, 0x00b107e0, 0x00b10440 }, { 0x00800042, 0x28202529, 0x00b10820, 0x00b10460 }, { 0x00800042, 0x28602529, 0x00b10860, 0x00b10480 }, { 0x00800042, 0x28a02529, 0x00b108a0, 0x00b104a0 }, { 0x00800042, 0x28e02529, 0x00b108e0, 0x00b104c0 }, { 0x00800042, 0x29202529, 0x00b10920, 0x00b104e0 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00020002 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802042, 0x29402529, 0x008d0940, 0x008d0400 }, { 0x00802042, 0x29802529, 0x008d0980, 0x008d0440 }, { 0x00802042, 0x29c02529, 0x008d09c0, 0x008d0480 }, { 0x00802042, 0x2a002529, 0x008d0a00, 0x008d04c0 }, { 0x0020000c, 0x23ee3dad, 0x00450a5a, 0x00020002 }, { 0x00200040, 0x2e603421, 0x004503e0, 0x004503ee }, { 0x00000005, 0x2e640c21, 0x00210e64, 0xfffffffe }, { 0x02000005, 0x20002e3c, 0x00210a5f, 0x00080008 }, { 0x00010040, 0x2e640c21, 0x00210e64, 0x00000001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a5a }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000030 }, { 0x00802042, 0x29502529, 0x008d0950, 0x008d0400 }, { 0x00802042, 0x29902529, 0x008d0990, 0x008d0440 }, { 0x00802042, 0x29d02529, 0x008d09d0, 0x008d0480 }, { 0x00802042, 0x2a102529, 0x008d0a10, 0x008d04c0 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/frame_backward_igd.g4b0000664000175000017500000000147112400044327020721 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00010001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000010 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/frame_forward_igd.g4b0000664000175000017500000000147112400044327020607 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000000 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000010 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/frame_f_b.g4b.gen50000664000175000017500000020701712400044327017707 00000000000000 { 0x00600001, 0x29800021, 0x008d0020, 0x00000000 }, { 0x02000005, 0x20000c3c, 0x00210040, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000060 }, { 0x00000040, 0x20480c21, 0x00210988, 0x00000000 }, { 0x00800031, 0x20601c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20801c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20a01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20c01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x20e01c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21001c21, 0x40b10040, 0x02180203 }, { 0x00000040, 0x20480c21, 0x00210048, 0x00000020 }, { 0x00800031, 0x21201c21, 0x40b10040, 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0x00600001, 0x20a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00100010 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x20700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x20f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00080008 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21600169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21800169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21a00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21c00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21e00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22000169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22200169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22400169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00040004 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00600001, 0x21700169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21900169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21b00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21d00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x21f00169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22100169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22300169, 0x00000000, 0x00000000 }, { 0x00600001, 0x22500169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00020002 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22600169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22800169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22a00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x22c00169, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002d3c, 0x0021002c, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000008 }, { 0x00800001, 0x22e00169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23000169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23200169, 0x00000000, 0x00000000 }, { 0x00800001, 0x23400169, 0x00000000, 0x00000000 }, { 0x00600001, 0x2e600021, 0x008d0020, 0x00000000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00600001, 0x20400021, 0x008d0020, 0x00000000 }, { 0x0020000c, 0x202e3dad, 0x00450e6e, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450e60, 0x0045002e }, { 0x01000005, 0x20000d3c, 0x00210e6e, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000256 }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000001bc }, { 0x00000001, 0x20480061, 0x00000000, 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0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x01000005, 0x20000d3c, 0x00210e70, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a004 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x408d0040, 0x0218a004 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c60 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c80 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10ca0 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10cc0 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10ce0 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10d00 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d20 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d40 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d60 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d80 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10da0 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10dc0 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10de0 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10e00 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e20 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10f00 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c61 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c81 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10ca1 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10cc1 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10ce1 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10d01 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d21 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d41 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d61 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d81 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10da1 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10dc1 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10de1 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10e01 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e21 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c62 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c82 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10ca2 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10cc2 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10ce2 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10d02 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d22 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d42 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d62 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d82 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10da2 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10dc2 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10de2 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10e02 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e22 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c63 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c83 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10ca3 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10cc3 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10ce3 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10d03 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d23 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d43 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d63 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d83 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10da3 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10dc3 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10de3 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10e03 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e23 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a004 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a004 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x23800229, 0x00b10c40, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c60, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c80, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca0, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc0, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce0, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d00, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d20, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d40, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d60, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d80, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da0, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc0, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de0, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e00, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e20, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x00800001, 0x23800229, 0x00b10c41, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c61, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c81, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca1, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc1, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce1, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d01, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d21, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d41, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d61, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d81, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da1, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc1, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de1, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e01, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e21, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x00800001, 0x23800229, 0x00b10c42, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c62, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c82, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca2, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc2, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce2, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d02, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d22, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d42, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d62, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d82, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da2, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc2, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de2, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e02, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e22, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800001, 0x23800229, 0x00b10c43, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c63, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c83, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca3, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc3, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce3, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d03, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d23, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d43, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d63, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d83, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da3, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc3, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de3, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e03, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e23, 0x00000000 }, { 0x00802001, 0x26800021, 0x00b10380, 0x00000000 }, { 0x00802001, 0x26c00021, 0x00b103c0, 0x00000000 }, { 0x00802001, 0x27000021, 0x00b10400, 0x00000000 }, { 0x00802001, 0x27400021, 0x00b10440, 0x00000000 }, { 0x00802001, 0x27800021, 0x00b10480, 0x00000000 }, { 0x00802001, 0x27c00021, 0x00b104c0, 0x00000000 }, { 0x00802001, 0x28000021, 0x00b10500, 0x00000000 }, { 0x00802001, 0x28400021, 0x00b10540, 0x00000000 }, { 0x0020000c, 0x202e3dad, 0x00450e72, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450e60, 0x0045002e }, { 0x01000005, 0x20000d3c, 0x00210e72, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000256 }, { 0x01000005, 0x20000d3c, 0x00210e74, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x000001bc }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000031 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x408d0040, 0x0218a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800040, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x00800040, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x00800040, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x00800040, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x00800040, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x00800040, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x00800040, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x00800040, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x00800040, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x00800040, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x00800040, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x00800040, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x00800040, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x00800040, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x00800040, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x00800040, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c60 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c80 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca0 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc0 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce0 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d00 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d20 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d40 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d60 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d80 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da0 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc0 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de0 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e00 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e20 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f00 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000124 }, { 0x00800040, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x00800040, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x00800040, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x00800040, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x00800040, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x00800040, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x00800040, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x00800040, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x00800040, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x00800040, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x00800040, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x00800040, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x00800040, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x00800040, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x00800040, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x00800040, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c61 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c81 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca1 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc1 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce1 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d01 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d21 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d41 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d61 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d81 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da1 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc1 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de1 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e01 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e21 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f01 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000000c2 }, { 0x00800040, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x00800040, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x00800040, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x00800040, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x00800040, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x00800040, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x00800040, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x00800040, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x00800040, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x00800040, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x00800040, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x00800040, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x00800040, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x00800040, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x00800040, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x00800040, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c62 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c82 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca2 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc2 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce2 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d02 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d22 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d42 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d62 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d82 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da2 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc2 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de2 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e02 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e22 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f02 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000060 }, { 0x00800040, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x00800040, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x00800040, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x00800040, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x00800040, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x00800040, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x00800040, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x00800040, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x00800040, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x00800040, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x00800040, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x00800040, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x00800040, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x00800040, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x00800040, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x00800040, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c63 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c83 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca3 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc3 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce3 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d03 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d23 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d43 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d63 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d83 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da3 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc3 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de3 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e03 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e23 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f03 }, { 0x00800040, 0x23804529, 0x00b10380, 0x00b10c64 }, { 0x00800040, 0x23a04529, 0x00b103a0, 0x00b10c84 }, { 0x00800040, 0x23c04529, 0x00b103c0, 0x00b10ca4 }, { 0x00800040, 0x23e04529, 0x00b103e0, 0x00b10cc4 }, { 0x00800040, 0x24004529, 0x00b10400, 0x00b10ce4 }, { 0x00800040, 0x24204529, 0x00b10420, 0x00b10d04 }, { 0x00800040, 0x24404529, 0x00b10440, 0x00b10d24 }, { 0x00800040, 0x24604529, 0x00b10460, 0x00b10d44 }, { 0x00800040, 0x24804529, 0x00b10480, 0x00b10d64 }, { 0x00800040, 0x24a04529, 0x00b104a0, 0x00b10d84 }, { 0x00800040, 0x24c04529, 0x00b104c0, 0x00b10da4 }, { 0x00800040, 0x24e04529, 0x00b104e0, 0x00b10dc4 }, { 0x00800040, 0x25004529, 0x00b10500, 0x00b10de4 }, { 0x00800040, 0x25204529, 0x00b10520, 0x00b10e04 }, { 0x00800040, 0x25404529, 0x00b10540, 0x00b10e24 }, { 0x00800040, 0x25604529, 0x00b10560, 0x00b10f04 }, { 0x80800008, 0x23802d29, 0x00b10380, 0x00020002 }, { 0x80800008, 0x23a02d29, 0x00b103a0, 0x00020002 }, { 0x80800008, 0x23c02d29, 0x00b103c0, 0x00020002 }, { 0x80800008, 0x23e02d29, 0x00b103e0, 0x00020002 }, { 0x80800008, 0x24002d29, 0x00b10400, 0x00020002 }, { 0x80800008, 0x24202d29, 0x00b10420, 0x00020002 }, { 0x80800008, 0x24402d29, 0x00b10440, 0x00020002 }, { 0x80800008, 0x24602d29, 0x00b10460, 0x00020002 }, { 0x80800008, 0x24802d29, 0x00b10480, 0x00020002 }, { 0x80800008, 0x24a02d29, 0x00b104a0, 0x00020002 }, { 0x80800008, 0x24c02d29, 0x00b104c0, 0x00020002 }, { 0x80800008, 0x24e02d29, 0x00b104e0, 0x00020002 }, { 0x80800008, 0x25002d29, 0x00b10500, 0x00020002 }, { 0x80800008, 0x25202d29, 0x00b10520, 0x00020002 }, { 0x80800008, 0x25402d29, 0x00b10540, 0x00020002 }, { 0x80800008, 0x25602d29, 0x00b10560, 0x00020002 }, { 0x00000020, 0x34001c00, 0x00001400, 0x000001ca }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20581c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c41 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c61 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10c81 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10ca1 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10cc1 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10ce1 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d01 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d21 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d41 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d61 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10d81 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10da1 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10dc1 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10de1 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e01 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10e21 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c42 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c62 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10c82 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10ca2 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10cc2 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10ce2 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d02 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d22 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d42 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d62 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10d82 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10da2 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10dc2 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10de2 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e02 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10e22 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c43 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c63 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10c83 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10ca3 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10cc3 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10ce3 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d03 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d23 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d43 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d63 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10d83 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10da3 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10dc3 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10de3 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e03 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10e23 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c44 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c64 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10c84 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10ca4 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10cc4 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10ce4 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d04 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d24 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d44 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d64 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10d84 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10da4 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10dc4 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10de4 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e04 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10e24 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000134 }, { 0x01000005, 0x20000d3c, 0x00210e74, 0x00000001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x0000009c }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00000001, 0x20480061, 0x00000000, 0x0000001f }, { 0x00800031, 0x2f001d29, 0x408d0040, 0x0218a007 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x80800042, 0x23804629, 0x00b10c40, 0x00b10c60 }, { 0x80800042, 0x23a04629, 0x00b10c60, 0x00b10c80 }, { 0x80800042, 0x23c04629, 0x00b10c80, 0x00b10ca0 }, { 0x80800042, 0x23e04629, 0x00b10ca0, 0x00b10cc0 }, { 0x80800042, 0x24004629, 0x00b10cc0, 0x00b10ce0 }, { 0x80800042, 0x24204629, 0x00b10ce0, 0x00b10d00 }, { 0x80800042, 0x24404629, 0x00b10d00, 0x00b10d20 }, { 0x80800042, 0x24604629, 0x00b10d20, 0x00b10d40 }, { 0x80800042, 0x24804629, 0x00b10d40, 0x00b10d60 }, { 0x80800042, 0x24a04629, 0x00b10d60, 0x00b10d80 }, { 0x80800042, 0x24c04629, 0x00b10d80, 0x00b10da0 }, { 0x80800042, 0x24e04629, 0x00b10da0, 0x00b10dc0 }, { 0x80800042, 0x25004629, 0x00b10dc0, 0x00b10de0 }, { 0x80800042, 0x25204629, 0x00b10de0, 0x00b10e00 }, { 0x80800042, 0x25404629, 0x00b10e00, 0x00b10e20 }, { 0x80800042, 0x25604629, 0x00b10e20, 0x00b10f00 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x80800042, 0x23804629, 0x00b10c41, 0x00b10c61 }, { 0x80800042, 0x23a04629, 0x00b10c61, 0x00b10c81 }, { 0x80800042, 0x23c04629, 0x00b10c81, 0x00b10ca1 }, { 0x80800042, 0x23e04629, 0x00b10ca1, 0x00b10cc1 }, { 0x80800042, 0x24004629, 0x00b10cc1, 0x00b10ce1 }, { 0x80800042, 0x24204629, 0x00b10ce1, 0x00b10d01 }, { 0x80800042, 0x24404629, 0x00b10d01, 0x00b10d21 }, { 0x80800042, 0x24604629, 0x00b10d21, 0x00b10d41 }, { 0x80800042, 0x24804629, 0x00b10d41, 0x00b10d61 }, { 0x80800042, 0x24a04629, 0x00b10d61, 0x00b10d81 }, { 0x80800042, 0x24c04629, 0x00b10d81, 0x00b10da1 }, { 0x80800042, 0x24e04629, 0x00b10da1, 0x00b10dc1 }, { 0x80800042, 0x25004629, 0x00b10dc1, 0x00b10de1 }, { 0x80800042, 0x25204629, 0x00b10de1, 0x00b10e01 }, { 0x80800042, 0x25404629, 0x00b10e01, 0x00b10e21 }, { 0x80800042, 0x25604629, 0x00b10e21, 0x00b10f01 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x80800042, 0x23804629, 0x00b10c42, 0x00b10c62 }, { 0x80800042, 0x23a04629, 0x00b10c62, 0x00b10c82 }, { 0x80800042, 0x23c04629, 0x00b10c82, 0x00b10ca2 }, { 0x80800042, 0x23e04629, 0x00b10ca2, 0x00b10cc2 }, { 0x80800042, 0x24004629, 0x00b10cc2, 0x00b10ce2 }, { 0x80800042, 0x24204629, 0x00b10ce2, 0x00b10d02 }, { 0x80800042, 0x24404629, 0x00b10d02, 0x00b10d22 }, { 0x80800042, 0x24604629, 0x00b10d22, 0x00b10d42 }, { 0x80800042, 0x24804629, 0x00b10d42, 0x00b10d62 }, { 0x80800042, 0x24a04629, 0x00b10d62, 0x00b10d82 }, { 0x80800042, 0x24c04629, 0x00b10d82, 0x00b10da2 }, { 0x80800042, 0x24e04629, 0x00b10da2, 0x00b10dc2 }, { 0x80800042, 0x25004629, 0x00b10dc2, 0x00b10de2 }, { 0x80800042, 0x25204629, 0x00b10de2, 0x00b10e02 }, { 0x80800042, 0x25404629, 0x00b10e02, 0x00b10e22 }, { 0x80800042, 0x25604629, 0x00b10e22, 0x00b10f02 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x80800042, 0x23804629, 0x00b10c43, 0x00b10c63 }, { 0x80800042, 0x23a04629, 0x00b10c63, 0x00b10c83 }, { 0x80800042, 0x23c04629, 0x00b10c83, 0x00b10ca3 }, { 0x80800042, 0x23e04629, 0x00b10ca3, 0x00b10cc3 }, { 0x80800042, 0x24004629, 0x00b10cc3, 0x00b10ce3 }, { 0x80800042, 0x24204629, 0x00b10ce3, 0x00b10d03 }, { 0x80800042, 0x24404629, 0x00b10d03, 0x00b10d23 }, { 0x80800042, 0x24604629, 0x00b10d23, 0x00b10d43 }, { 0x80800042, 0x24804629, 0x00b10d43, 0x00b10d63 }, { 0x80800042, 0x24a04629, 0x00b10d63, 0x00b10d83 }, { 0x80800042, 0x24c04629, 0x00b10d83, 0x00b10da3 }, { 0x80800042, 0x24e04629, 0x00b10da3, 0x00b10dc3 }, { 0x80800042, 0x25004629, 0x00b10dc3, 0x00b10de3 }, { 0x80800042, 0x25204629, 0x00b10de3, 0x00b10e03 }, { 0x80800042, 0x25404629, 0x00b10e03, 0x00b10e23 }, { 0x80800042, 0x25604629, 0x00b10e23, 0x00b10f03 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000094 }, { 0x00000001, 0x20480061, 0x00000000, 0x0007001f }, { 0x00800031, 0x2c401d29, 0x408d0040, 0x0288a007 }, { 0x00000040, 0x20440c21, 0x00210044, 0x00000008 }, { 0x00800031, 0x2d401d29, 0x408d0040, 0x0288a007 }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000011 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x23800229, 0x00b10c40, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c60, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c80, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca0, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc0, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce0, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d00, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d20, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d40, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d60, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d80, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da0, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc0, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de0, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e00, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e20, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000064 }, { 0x00800001, 0x23800229, 0x00b10c41, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c61, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c81, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca1, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc1, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce1, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d01, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d21, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d41, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d61, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d81, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da1, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc1, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de1, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e01, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e21, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000042 }, { 0x00800001, 0x23800229, 0x00b10c42, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c62, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c82, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca2, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc2, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce2, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d02, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d22, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d42, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d62, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d82, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da2, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc2, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de2, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e02, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e22, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800001, 0x23800229, 0x00b10c43, 0x00000000 }, { 0x00800001, 0x23a00229, 0x00b10c63, 0x00000000 }, { 0x00800001, 0x23c00229, 0x00b10c83, 0x00000000 }, { 0x00800001, 0x23e00229, 0x00b10ca3, 0x00000000 }, { 0x00800001, 0x24000229, 0x00b10cc3, 0x00000000 }, { 0x00800001, 0x24200229, 0x00b10ce3, 0x00000000 }, { 0x00800001, 0x24400229, 0x00b10d03, 0x00000000 }, { 0x00800001, 0x24600229, 0x00b10d23, 0x00000000 }, { 0x00800001, 0x24800229, 0x00b10d43, 0x00000000 }, { 0x00800001, 0x24a00229, 0x00b10d63, 0x00000000 }, { 0x00800001, 0x24c00229, 0x00b10d83, 0x00000000 }, { 0x00800001, 0x24e00229, 0x00b10da3, 0x00000000 }, { 0x00800001, 0x25000229, 0x00b10dc3, 0x00000000 }, { 0x00800001, 0x25200229, 0x00b10de3, 0x00000000 }, { 0x00800001, 0x25400229, 0x00b10e03, 0x00000000 }, { 0x00800001, 0x25600229, 0x00b10e23, 0x00000000 }, { 0x80800042, 0x23802529, 0x00b10380, 0x00b10680 }, { 0x80800042, 0x23a02529, 0x00b103a0, 0x00b106a0 }, { 0x80800042, 0x23c02529, 0x00b103c0, 0x00b106c0 }, { 0x80800042, 0x23e02529, 0x00b103e0, 0x00b106e0 }, { 0x80800042, 0x24002529, 0x00b10400, 0x00b10700 }, { 0x80800042, 0x24202529, 0x00b10420, 0x00b10720 }, { 0x80800042, 0x24402529, 0x00b10440, 0x00b10740 }, { 0x80800042, 0x24602529, 0x00b10460, 0x00b10760 }, { 0x80800042, 0x24802529, 0x00b10480, 0x00b10780 }, { 0x80800042, 0x24a02529, 0x00b104a0, 0x00b107a0 }, { 0x80800042, 0x24c02529, 0x00b104c0, 0x00b107c0 }, { 0x80800042, 0x24e02529, 0x00b104e0, 0x00b107e0 }, { 0x80800042, 0x25002529, 0x00b10500, 0x00b10800 }, { 0x80800042, 0x25202529, 0x00b10520, 0x00b10820 }, { 0x80800042, 0x25402529, 0x00b10540, 0x00b10840 }, { 0x80800042, 0x25602529, 0x00b10560, 0x00b10860 }, { 0x00200008, 0x20200c21, 0x00450e60, 0x00000001 }, { 0x0020000c, 0x2e6e3dad, 0x00450e6e, 0x00010001 }, { 0x0020000c, 0x202e3dad, 0x00450e6e, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450020, 0x0045002e }, { 0x00000001, 0x20480061, 0x00000000, 0x0007000f }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00800031, 0x2ac01d29, 0x408d0040, 0x0248a005 }, { 0x00800031, 0x2b401d29, 0x408d0040, 0x0248a006 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x25800229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b40, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x25800229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b41, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x25800229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b42, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x25800229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b43, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba3, 0x00000000 }, { 0x00800001, 0x2f400231, 0x00b20580, 0x00000000 }, { 0x00800001, 0x2f500231, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x2f600231, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x2f700231, 0x00b205e0, 0x00000000 }, { 0x00800001, 0x2f800231, 0x00b20600, 0x00000000 }, { 0x00800001, 0x2f900231, 0x00b20620, 0x00000000 }, { 0x00800001, 0x2fa00231, 0x00b20640, 0x00000000 }, { 0x00800001, 0x2fb00231, 0x00b20660, 0x00000000 }, { 0x0020000c, 0x2e723dad, 0x00450e72, 0x00010001 }, { 0x0020000c, 0x202e3dad, 0x00450e72, 0x00010001 }, { 0x00200040, 0x20403421, 0x00450020, 0x0045002e }, { 0x00000001, 0x20480061, 0x00000000, 0x0007000f }, { 0x00000005, 0x20580c21, 0x00210040, 0x00000003 }, { 0x00800031, 0x2ac01d29, 0x408d0040, 0x0248a008 }, { 0x00800031, 0x2b401d29, 0x408d0040, 0x0248a009 }, { 0x00000041, 0x20580c21, 0x00210058, 0x00000009 }, { 0x00000020, 0x34001400, 0x00001400, 0x00210058 }, { 0x00800001, 0x25800229, 0x00ad0ac0, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae0, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b00, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b20, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b40, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b60, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b80, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba0, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000034 }, { 0x00800001, 0x25800229, 0x00ad0ac1, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae1, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b01, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b21, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b41, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b61, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b81, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba1, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800001, 0x25800229, 0x00ad0ac2, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae2, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b02, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b22, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b42, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b62, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b82, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba2, 0x00000000 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000010 }, { 0x00800001, 0x25800229, 0x00ad0ac3, 0x00000000 }, { 0x00800001, 0x25a00229, 0x00ad0ae3, 0x00000000 }, { 0x00800001, 0x25c00229, 0x00ad0b03, 0x00000000 }, { 0x00800001, 0x25e00229, 0x00ad0b23, 0x00000000 }, { 0x00800001, 0x26000229, 0x00ad0b43, 0x00000000 }, { 0x00800001, 0x26200229, 0x00ad0b63, 0x00000000 }, { 0x00800001, 0x26400229, 0x00ad0b83, 0x00000000 }, { 0x00800001, 0x26600229, 0x00ad0ba3, 0x00000000 }, { 0x80800042, 0x25804529, 0x00b10580, 0x00b10f40 }, { 0x80800042, 0x25a04529, 0x00b105a0, 0x00b10f50 }, { 0x80800042, 0x25c04529, 0x00b105c0, 0x00b10f60 }, { 0x80800042, 0x25e04529, 0x00b105e0, 0x00b10f70 }, { 0x80800042, 0x26004529, 0x00b10600, 0x00b10f80 }, { 0x80800042, 0x26204529, 0x00b10620, 0x00b10f90 }, { 0x80800042, 0x26404529, 0x00b10640, 0x00b10fa0 }, { 0x80800042, 0x26604529, 0x00b10660, 0x00b10fb0 }, { 0x00600001, 0x20200021, 0x008d0980, 0x00000000 }, { 0x00800001, 0x458101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45a101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45c101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x45e101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x460101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x462101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x464101f1, 0x00000000, 0x00000000 }, { 0x00800001, 0x466101f1, 0x00000000, 0x00000000 }, { 0x02000005, 0x20002e3c, 0x0021003e, 0x00010001 }, { 0x00010020, 0x34001c00, 0x00001400, 0x00000022 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10080, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b100a0, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b100c0, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100e0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b10100, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b10120, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b10140, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b10160, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b10180, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b101a0, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b101c0, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b101e0, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10200, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10220, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000020, 0x34001c00, 0x00001400, 0x00000020 }, { 0x00800040, 0x238045ad, 0x00b10060, 0x00b20380 }, { 0x00800040, 0x23a045ad, 0x00b10160, 0x00b203a0 }, { 0x00800040, 0x23c045ad, 0x00b10080, 0x00b203c0 }, { 0x00800040, 0x23e045ad, 0x00b10180, 0x00b203e0 }, { 0x00800040, 0x240045ad, 0x00b100a0, 0x00b20400 }, { 0x00800040, 0x242045ad, 0x00b101a0, 0x00b20420 }, { 0x00800040, 0x244045ad, 0x00b100c0, 0x00b20440 }, { 0x00800040, 0x246045ad, 0x00b101c0, 0x00b20460 }, { 0x00800040, 0x248045ad, 0x00b100e0, 0x00b20480 }, { 0x00800040, 0x24a045ad, 0x00b101e0, 0x00b204a0 }, { 0x00800040, 0x24c045ad, 0x00b10100, 0x00b204c0 }, { 0x00800040, 0x24e045ad, 0x00b10200, 0x00b204e0 }, { 0x00800040, 0x250045ad, 0x00b10120, 0x00b20500 }, { 0x00800040, 0x252045ad, 0x00b10220, 0x00b20520 }, { 0x00800040, 0x254045ad, 0x00b10140, 0x00b20540 }, { 0x00800040, 0x256045ad, 0x00b10240, 0x00b20560 }, { 0x00000001, 0x20280061, 0x00000000, 0x000f000f }, { 0x80800001, 0x438001b1, 0x00b10380, 0x00000000 }, { 0x80800001, 0x43a001b1, 0x00b103a0, 0x00000000 }, { 0x80800001, 0x43c001b1, 0x00b103c0, 0x00000000 }, { 0x80800001, 0x43e001b1, 0x00b103e0, 0x00000000 }, { 0x80800001, 0x440001b1, 0x00b10400, 0x00000000 }, { 0x80800001, 0x442001b1, 0x00b10420, 0x00000000 }, { 0x80800001, 0x444001b1, 0x00b10440, 0x00000000 }, { 0x80800001, 0x446001b1, 0x00b10460, 0x00000000 }, { 0x80800001, 0x448001b1, 0x00b10480, 0x00000000 }, { 0x80800001, 0x44a001b1, 0x00b104a0, 0x00000000 }, { 0x80800001, 0x44c001b1, 0x00b104c0, 0x00000000 }, { 0x80800001, 0x44e001b1, 0x00b104e0, 0x00000000 }, { 0x80800001, 0x450001b1, 0x00b10500, 0x00000000 }, { 0x80800001, 0x452001b1, 0x00b10520, 0x00000000 }, { 0x80800001, 0x454001b1, 0x00b10540, 0x00000000 }, { 0x80800001, 0x456001b1, 0x00b10560, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20380, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b203a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b203c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b203e0, 0x00000000 }, { 0x00800001, 0x20600232, 0x00b20400, 0x00000000 }, { 0x00800001, 0x20700232, 0x00b20420, 0x00000000 }, { 0x00800001, 0x20800232, 0x00b20440, 0x00000000 }, { 0x00800001, 0x20900232, 0x00b20460, 0x00000000 }, { 0x00800001, 0x20a00232, 0x00b20480, 0x00000000 }, { 0x00800001, 0x20b00232, 0x00b204a0, 0x00000000 }, { 0x00800001, 0x20c00232, 0x00b204c0, 0x00000000 }, { 0x00800001, 0x20d00232, 0x00b204e0, 0x00000000 }, { 0x00800001, 0x20e00232, 0x00b20500, 0x00000000 }, { 0x00800001, 0x20f00232, 0x00b20520, 0x00000000 }, { 0x00800001, 0x21000232, 0x00b20540, 0x00000000 }, { 0x00800001, 0x21100232, 0x00b20560, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x12082000 }, { 0x00000001, 0x20280061, 0x00000000, 0x00070007 }, { 0x00200008, 0x20201c21, 0x00450020, 0x00000001 }, { 0x00800040, 0x258025a9, 0x00b10260, 0x00b10580 }, { 0x00800040, 0x25a025a9, 0x00b10280, 0x00b105a0 }, { 0x00800040, 0x25c025a9, 0x00b102a0, 0x00b105c0 }, { 0x00800040, 0x25e025a9, 0x00b102c0, 0x00b105e0 }, { 0x80800001, 0x45800131, 0x00b10580, 0x00000000 }, { 0x80800001, 0x45a00131, 0x00b105a0, 0x00000000 }, { 0x80800001, 0x45c00131, 0x00b105c0, 0x00000000 }, { 0x80800001, 0x45e00131, 0x00b105e0, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20580, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b205a0, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b205c0, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b205e0, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082001 }, { 0x00800040, 0x260025a9, 0x00b102e0, 0x00b10600 }, { 0x00800040, 0x262025a9, 0x00b10300, 0x00b10620 }, { 0x00800040, 0x264025a9, 0x00b10320, 0x00b10640 }, { 0x00800040, 0x266025a9, 0x00b10340, 0x00b10660 }, { 0x80800001, 0x46000131, 0x00b10600, 0x00000000 }, { 0x80800001, 0x46200131, 0x00b10620, 0x00000000 }, { 0x80800001, 0x46400131, 0x00b10640, 0x00000000 }, { 0x80800001, 0x46600131, 0x00b10660, 0x00000000 }, { 0x00800001, 0x20200232, 0x00b20600, 0x00000000 }, { 0x00800001, 0x20300232, 0x00b20620, 0x00000000 }, { 0x00800001, 0x20400232, 0x00b20640, 0x00000000 }, { 0x00800001, 0x20500232, 0x00b20660, 0x00000000 }, { 0x00800031, 0x24001d28, 0x508d0020, 0x06082002 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, { 0x00800031, 0x24001d28, 0x748d0000, 0x82000000 }, xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x0y0_y_igd.g4i0000664000175000017500000000245412400044327021277 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g32: message descriptor for reading reference data g58~g81:reference data g82: thread payload backup g83~g106:IDCT data */ mov (1) g32.8<1>UD 0x007001FUD {align1}; and.nz (1) null g32.16<1,1,1>UW 1UW {align1}; (f0) jmpi read_backward; send (16) 0 g38.0<1>UW g32<8,8,1>UW read(4, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(4, 2, 0, 2) mlen 1 rlen 8 {align1}; jmpi put_data; read_backward: send (16) 0 g38.0<1>UW g32<8,8,1>UW read(7, 2, 0, 2) mlen 1 rlen 8 {align1}; add (1) g32.4<1>UD g32.4<1,1,1>UD 8UD {align1}; send (16) 0 g46.0<1>UW g32<8,8,1>UW read(7, 2, 0, 2) mlen 1 rlen 8 {align1}; put_data: mov (32) g58.0<1>UW g38.0<16,16,1>UB {align1 compr}; mov (32) g60.0<1>UW g40.0<16,16,1>UB {align1 compr}; mov (32) g62.0<1>UW g42.0<16,16,1>UB {align1 compr}; mov (32) g64.0<1>UW g44.0<16,16,1>UB {align1 compr}; mov (32) g66.0<1>UW g46.0<16,16,1>UB {align1 compr}; mov (32) g68.0<1>UW g48.0<16,16,1>UB {align1 compr}; mov (32) g70.0<1>UW g50.0<16,16,1>UB {align1 compr}; mov (32) g72.0<1>UW g52.0<16,16,1>UB {align1 compr}; xf86-video-intel-2.99.917/xvmc/shader/mc/read_frame_x0y1_uv.g4i0000664000175000017500000000767412400044327020650 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDINg BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINgEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIgHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAgES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISINg FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINgS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ and (1) g2.24<1>UD g2.0<1,1,1>UD 0x3UD {align1}; send (16) 0 g86.0<1>UW g2<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 4 {align1}; send (16) 0 g94.0<1>UW g2<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 4 {align1}; mov (1) g2.8<1>UD 0x01001FUD {align1}; add (1) g2.4<1>UD g2.4<1,1,1>UD 8UD {align1}; send (16) 0 g90.0<1>UW g2<8,8,1>UW read(input_surface1, 2, 0, 2) mlen 1 rlen 1 {align1}; send (16) 0 g98.0<1>UW g2<8,8,1>UW read(input_surface2, 2, 0, 2) mlen 1 rlen 1 {align1}; mov (1) g2.8<1>UD 0x007000fUD {align1}; mul(1) g2.24<1>UD g2.24<1,1,1>UD 0x9UD {align1}; jmpi g2.24<1,1,1>D; avg.sat (16) g44.0<1>UW g86.0<16,8,1>UB g87.0<16,8,1>UB{align1}; avg.sat (16) g45.0<1>UW g87.0<16,8,1>UB g88.0<16,8,1>UB{align1}; avg.sat (16) g46.0<1>UW g88.0<16,8,1>UB g89.0<16,8,1>UB{align1}; avg.sat (16) g47.0<1>UW g89.0<16,8,1>UB g90.0<16,8,1>UB{align1}; avg.sat (16) g48.0<1>UW g94.0<16,8,1>UB g95.0<16,8,1>UB{align1}; avg.sat (16) g49.0<1>UW g95.0<16,8,1>UB g96.0<16,8,1>UB{align1}; avg.sat (16) g50.0<1>UW g96.0<16,8,1>UB g97.0<16,8,1>UB{align1}; avg.sat (16) g51.0<1>UW g97.0<16,8,1>UB g98.0<16,8,1>UB{align1}; jmpi out; avg.sat (16) g44.0<1>UW g86.1<16,8,1>UB g87.1<16,8,1>UB{align1}; avg.sat (16) g45.0<1>UW g87.1<16,8,1>UB g88.1<16,8,1>UB{align1}; avg.sat (16) g46.0<1>UW g88.1<16,8,1>UB g89.1<16,8,1>UB{align1}; avg.sat (16) g47.0<1>UW g89.1<16,8,1>UB g90.1<16,8,1>UB{align1}; avg.sat (16) g48.0<1>UW g94.1<16,8,1>UB g95.1<16,8,1>UB{align1}; avg.sat (16) g49.0<1>UW g95.1<16,8,1>UB g96.1<16,8,1>UB{align1}; avg.sat (16) g50.0<1>UW g96.1<16,8,1>UB g97.1<16,8,1>UB{align1}; avg.sat (16) g51.0<1>UW g97.1<16,8,1>UB g98.1<16,8,1>UB{align1}; jmpi out; avg.sat (16) g44.0<1>UW g86.2<16,8,1>UB g87.2<16,8,1>UB{align1}; avg.sat (16) g45.0<1>UW g87.2<16,8,1>UB g88.2<16,8,1>UB{align1}; avg.sat (16) g46.0<1>UW g88.2<16,8,1>UB g89.2<16,8,1>UB{align1}; avg.sat (16) g47.0<1>UW g89.2<16,8,1>UB g90.2<16,8,1>UB{align1}; avg.sat (16) g48.0<1>UW g94.2<16,8,1>UB g95.2<16,8,1>UB{align1}; avg.sat (16) g49.0<1>UW g95.2<16,8,1>UB g96.2<16,8,1>UB{align1}; avg.sat (16) g50.0<1>UW g96.2<16,8,1>UB g97.2<16,8,1>UB{align1}; avg.sat (16) g51.0<1>UW g97.2<16,8,1>UB g98.2<16,8,1>UB{align1}; jmpi out; avg.sat (16) g44.0<1>UW g86.3<16,8,1>UB g87.3<16,8,1>UB{align1}; avg.sat (16) g45.0<1>UW g87.3<16,8,1>UB g88.3<16,8,1>UB{align1}; avg.sat (16) g46.0<1>UW g88.3<16,8,1>UB g89.3<16,8,1>UB{align1}; avg.sat (16) g47.0<1>UW g89.3<16,8,1>UB g90.3<16,8,1>UB{align1}; avg.sat (16) g48.0<1>UW g94.3<16,8,1>UB g95.3<16,8,1>UB{align1}; avg.sat (16) g49.0<1>UW g95.3<16,8,1>UB g96.3<16,8,1>UB{align1}; avg.sat (16) g50.0<1>UW g96.3<16,8,1>UB g97.3<16,8,1>UB{align1}; avg.sat (16) g51.0<1>UW g97.3<16,8,1>UB g98.3<16,8,1>UB{align1}; out: xf86-video-intel-2.99.917/xvmc/shader/mc/frame_f_b_igd.g4b.gen50000664000175000017500000000536512400044327020534 00000000000000 { 0x00600001, 0x2a400021, 0x008d03e0, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000050 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00000000 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a4e }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000000 }, { 0x00802001, 0x2d800021, 0x00b10740, 0x00000000 }, { 0x00802001, 0x2dc00021, 0x00b10780, 0x00000000 }, { 0x00802001, 0x2e000021, 0x00b107c0, 0x00000000 }, { 0x00802001, 0x2e400021, 0x00b10800, 0x00000000 }, { 0x00802001, 0x2e800021, 0x00b10840, 0x00000000 }, { 0x00802001, 0x2ec00021, 0x00b10880, 0x00000000 }, { 0x00802001, 0x2f000021, 0x00b108c0, 0x00000000 }, { 0x00802001, 0x2f400021, 0x00b10900, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00010001 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00010001 }, { 0x00000001, 0x22000060, 0x00000000, 0x00000a52 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000000 }, { 0x00a02042, 0x27402529, 0x00b10740, 0x00b10d80 }, { 0x00a02042, 0x27802529, 0x00b10780, 0x00b10dc0 }, { 0x00a02042, 0x27c02529, 0x00b107c0, 0x00b10e00 }, { 0x00a02042, 0x28002529, 0x00b10800, 0x00b10e40 }, { 0x00a02042, 0x28402529, 0x00b10840, 0x00b10e80 }, { 0x00a02042, 0x28802529, 0x00b10880, 0x00b10ec0 }, { 0x00a02042, 0x28c02529, 0x00b108c0, 0x00b10f00 }, { 0x00a02042, 0x29002529, 0x00b10900, 0x00b10f40 }, { 0x00200008, 0x23e00c21, 0x004503e0, 0x00000001 }, { 0x0020000c, 0x23ee3dad, 0x00450a4e, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00000000 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000010 }, { 0x00a02001, 0x2d800129, 0x00b10940, 0x00000000 }, { 0x00a02001, 0x2dc00129, 0x00b10980, 0x00000000 }, { 0x00a02001, 0x2e000129, 0x00b109c0, 0x00000000 }, { 0x00a02001, 0x2e400129, 0x00b10a00, 0x00000000 }, { 0x0020000c, 0x23ee3dad, 0x00450a52, 0x00020002 }, { 0x00200040, 0x24003421, 0x004503e0, 0x004503ee }, { 0x00000001, 0x24100169, 0x00000000, 0x00010001 }, { 0x00000001, 0x2fc80001, 0x00001400, 0x00000000 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000010 }, { 0x00a02042, 0x29402529, 0x00b10940, 0x00b10d80 }, { 0x00a02042, 0x29802529, 0x00b10980, 0x00b10dc0 }, { 0x00a02042, 0x29c02529, 0x00b109c0, 0x00b10e00 }, { 0x00a02042, 0x2a002529, 0x00b10a00, 0x00b10e40 }, { 0x00000040, 0x34000c20, 0x002102a0, 0x00000040 }, xf86-video-intel-2.99.917/xvmc/shader/mc/field_backward_igd.g4a0000664000175000017500000000726612400044327020721 00000000000000/* GRF allocation: g1~g30: constant buffer g1~g2:intra IQ matrix g3~g4:non intra IQ matrix g5~g20:IDCT table g31: thread payload g58~g81:reference data g82: thread payload backup g84~g107:IDCT data g115: message descriptor for reading reference data */ mov (8) g82.0<1>UD g31.0<8,8,1>UD {align1}; mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x50UD {align1}; //jump to the lib to do IQ and IDCT /*field 0 of Y*/ asr (2) g31.14<1>W g82.18<2,2,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x2UW {align1}; //motion vertical field select (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) g115.16<1>UW 1UW {align1}; //0:forward 1:backward mov (1) a0.0<1>UD 0x0A52UD {align1}; //g82.18,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x20UD {align1}; //jump to the lib to read reference data mov (8) g58.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g60.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g62.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g64.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g66.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g68.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g70.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g72.0<1>UD g39.0<8,8,1>UD {align1}; /*field 1 of Y*/ asr (2) g31.14<1>W g82.26<2,2,1>W 1W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x8UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A5AUD {align1}; //g82.14,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x20UD {align1}; //jump to the lib to read reference data mov (8) g59.0<1>UD g32.0<8,8,1>UD {align1}; mov (8) g61.0<1>UD g33.0<8,8,1>UD {align1}; mov (8) g63.0<1>UD g34.0<8,8,1>UD {align1}; mov (8) g65.0<1>UD g35.0<8,8,1>UD {align1}; mov (8) g67.0<1>UD g36.0<8,8,1>UD {align1}; mov (8) g69.0<1>UD g37.0<8,8,1>UD {align1}; mov (8) g71.0<1>UD g38.0<8,8,1>UD {align1}; mov (8) g73.0<1>UD g39.0<8,8,1>UD {align1}; /*field 0 of UV*/ shr (2) g31.0<1>UD g31.0<2,2,1>UD 1UD {align1}; asr (2) g31.14<1>W g82.18<2,2,1>W 2W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x2UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A52UD {align1}; //g82.18,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x30UD {align1}; //jump to the lib to read reference data mov (16) g74.0<1>UW g32.0<8,8,1>UW {align1 compr}; mov (16) g76.0<1>UW g34.0<8,8,1>UW {align1 compr}; mov (16) g78.0<1>UW g36.0<8,8,1>UW {align1 compr}; mov (16) g80.0<1>UW g38.0<8,8,1>UW {align1 compr}; /*field 1 of UV*/ asr (2) g31.14<1>W g82.26<2,2,1>W 2W {align1}; add (2) g115.0<1>UD g31.0<2,2,1>UD g31.14<2,2,1>W {align1}; and (1) g115.4<1>UD g115.4<1,1,1>UD 0xFFFFFFFEUD {align1}; and.nz (1) null g82.31<1,1,1>UB 0x8UW {align1}; (f0) add (1) g115.4<1>UD g115.4<1,1,1>UD 1UD {align1}; mov (1) a0.0<1>UD 0x0A5AUD {align1}; //g82.14,motion vector mov (1) g126.8<1>UD ip {align1}; add (1) ip g21.0<1,1,1>UD 0x30UD {align1}; //jump to the lib to read reference data mov (16) g74.16<1>UW g32.0<8,8,1>UW {align1 compr}; mov (16) g76.16<1>UW g34.0<8,8,1>UW {align1 compr}; mov (16) g78.16<1>UW g36.0<8,8,1>UW {align1 compr}; mov (16) g80.16<1>UW g38.0<8,8,1>UW {align1 compr}; add (1) ip g21.0<1,1,1>UD 0x40UD {align1}; //jump to the lib to add the reference and idct data xf86-video-intel-2.99.917/xvmc/shader/mc/motion_field_y_igd.g4i0000664000175000017500000000337312400044327021003 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng */ and.z (1) null g[a0.0]<1,1,1>UW 1UW {align1}; (f0) jmpi L1; add (1) a0.0<1>UD a0.0<1,1,1>UD 0x2UD {align1}; and.z (1) null g[a0.0]<1,1,1>UW 1UW {align1}; (f0) jmpi L2; include(`read_field_x1y1_y_igd.g4i') jmpi L5; L2: include(`read_field_x1y0_y_igd.g4i') jmpi L5; L1: add (1) a0.0<1>UD a0.0<1,1,1>UD 0x2UD {align1}; and.z (1) null g[a0.0]<1,1,1>UW 1UW {align1}; (f0) jmpi L4; include(`read_field_x0y1_y_igd.g4i') jmpi L5; L4: include(`read_field_x0y0_y_igd.g4i') L5: xf86-video-intel-2.99.917/xvmc/shader/mc/read_field_x0y0_uv.g4i0000664000175000017500000000614112400044327020624 00000000000000/* * Copyright © 2008 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Author: * Zou Nan hai * Zhang Hua jun * Xing Dong sheng * */ mov (1) g115.8<1>UD 0x7000FUD {align1}; // 8*16/32=4 send (16) 0 g86.0<1>UW g115<16,8,1>UW read(surface_u, 2, 0, 2) mlen 1 rlen 4 {align1};//U send (16) 0 g91.0<1>UW g115<16,8,1>UW read(surface_v, 2, 0, 2) mlen 1 rlen 4 {align1};//V and (1) g2.24<1>UD g115.0<1,1,1>UD 3UD {align1}; mul (1) g2.24<1>UD g2.24<1,1,1>UD 9UD {align1}; jmpi g2.24<1,1,1>D; mov (16) g78.0<1>UW g86.0<16,8,1>UB {align1}; mov (16) g79.0<1>UW g87.0<16,8,1>UB {align1}; mov (16) g80.0<1>UW g88.0<16,8,1>UB {align1}; mov (16) g81.0<1>UW g89.0<16,8,1>UB {align1}; mov (16) g82.0<1>UW g91.0<16,8,1>UB {align1}; mov (16) g83.0<1>UW g92.0<16,8,1>UB {align1}; mov (16) g84.0<1>UW g93.0<16,8,1>UB {align1}; mov (16) g85.0<1>UW g94.0<16,8,1>UB {align1}; jmpi out; mov (16) g78.0<1>UW g86.1<16,8,1>UB {align1}; mov (16) g79.0<1>UW g87.1<16,8,1>UB {align1}; mov (16) g80.0<1>UW g88.1<16,8,1>UB {align1}; mov (16) g81.0<1>UW g89.1<16,8,1>UB {align1}; mov (16) g82.0<1>UW g91.1<16,8,1>UB {align1}; mov (16) g83.0<1>UW g92.1<16,8,1>UB {align1}; mov (16) g84.0<1>UW g93.1<16,8,1>UB {align1}; mov (16) g85.0<1>UW g94.1<16,8,1>UB {align1}; jmpi out; mov (16) g78.0<1>UW g86.2<16,8,1>UB {align1}; mov (16) g79.0<1>UW g87.2<16,8,1>UB {align1}; mov (16) g80.0<1>UW g88.2<16,8,1>UB {align1}; mov (16) g81.0<1>UW g89.2<16,8,1>UB {align1}; mov (16) g82.0<1>UW g91.2<16,8,1>UB {align1}; mov (16) g83.0<1>UW g92.2<16,8,1>UB {align1}; mov (16) g84.0<1>UW g93.2<16,8,1>UB {align1}; mov (16) g85.0<1>UW g94.2<16,8,1>UB {align1}; jmpi out; mov (16) g78.0<1>UW g86.3<16,8,1>UB {align1}; mov (16) g79.0<1>UW g87.3<16,8,1>UB {align1}; mov (16) g80.0<1>UW g88.3<16,8,1>UB {align1}; mov (16) g81.0<1>UW g89.3<16,8,1>UB {align1}; mov (16) g82.0<1>UW g91.3<16,8,1>UB {align1}; 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IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. * * Authors: * Zhenyu Wang * */ #include "intel_xvmc_private.h" #include #include #include #include #include /* global */ struct _intel_xvmc_driver *xvmc_driver = NULL; /* Lookup tables to speed common calculations for coded_block_pattern */ /* each block is ((8*8) * sizeof(short)) */ unsigned int mb_bytes_420[] = { 0, /* 0 */ 128, /* 1 */ 128, /* 10 */ 256, /* 11 */ 128, /* 100 */ 256, /* 101 */ 256, /* 110 */ 384, /* 111 */ 128, /* 1000 */ 256, /* 1001 */ 256, /* 1010 */ 384, /* 1011 */ 256, /* 1100 */ 384, /* 1101 */ 384, /* 1110 */ 512, /* 1111 */ 128, /* 10000 */ 256, /* 10001 */ 256, /* 10010 */ 384, /* 10011 */ 256, /* 10100 */ 384, /* 10101 */ 384, /* 10110 */ 512, /* 10111 */ 256, /* 11000 */ 384, /* 11001 */ 384, /* 11010 */ 512, /* 11011 */ 384, /* 11100 */ 512, /* 11101 */ 512, /* 11110 */ 640, /* 11111 */ 128, /* 100000 */ 256, /* 100001 */ 256, /* 100010 */ 384, /* 100011 */ 256, /* 100100 */ 384, /* 100101 */ 384, /* 100110 */ 512, /* 100111 */ 256, /* 101000 */ 384, /* 101001 */ 384, /* 101010 */ 512, /* 101011 */ 384, /* 101100 */ 512, /* 101101 */ 512, /* 101110 */ 640, /* 101111 */ 256, /* 110000 */ 384, /* 110001 */ 384, /* 110010 */ 512, /* 110011 */ 384, /* 110100 */ 512, /* 110101 */ 512, /* 110110 */ 640, /* 110111 */ 384, /* 111000 */ 512, /* 111001 */ 512, /* 111010 */ 640, /* 111011 */ 512, /* 111100 */ 640, /* 111101 */ 640, /* 111110 */ 768 /* 111111 */ }; static int dri2_connect(Display *display) { xcb_dri2_query_version_cookie_t query_version_cookie; xcb_dri2_query_version_reply_t *query_version_reply; xcb_dri2_connect_cookie_t connect_cookie; xcb_dri2_connect_reply_t *connect_reply; xcb_dri2_authenticate_cookie_t auth_cookie; xcb_dri2_authenticate_reply_t *auth_reply; xcb_screen_t *root; xcb_connection_t *c = XGetXCBConnection(display); drm_magic_t magic; const xcb_query_extension_reply_t *dri2_reply; char *device_name; int len; root = xcb_aux_get_screen(c, DefaultScreen(display)); dri2_reply = xcb_get_extension_data(c, &xcb_dri2_id); if (!dri2_reply) { XVMC_ERR("DRI2 required"); return BadValue; } /* Query the extension and make our first use of it at the same time. */ query_version_cookie = xcb_dri2_query_version(c, 1, 0); connect_cookie = xcb_dri2_connect(c, root->root, DRI2DriverDRI); query_version_reply = xcb_dri2_query_version_reply(c, query_version_cookie, NULL); connect_reply = xcb_dri2_connect_reply(c, connect_cookie, NULL); if (!query_version_reply) { XVMC_ERR("DRI2 required"); return BadValue; } free(query_version_reply); len = xcb_dri2_connect_device_name_length(connect_reply); device_name = malloc(len + 1); if (!device_name) { XVMC_ERR("malloc failure"); return BadAlloc; } strncpy(device_name, xcb_dri2_connect_device_name(connect_reply), len); device_name[len] = 0; xvmc_driver->fd = open(device_name, O_RDWR); free(device_name); free(connect_reply); if (xvmc_driver->fd < 0) { XVMC_ERR("Failed to open drm device: %s\n", strerror(errno)); return BadValue; } if (drmGetMagic(xvmc_driver->fd, &magic)) { XVMC_ERR("Failed to get magic\n"); return BadValue; } auth_cookie = xcb_dri2_authenticate(c, root->root, magic); auth_reply = xcb_dri2_authenticate_reply(c, auth_cookie, NULL); if (!auth_reply) { XVMC_ERR("Failed to authenticate magic %d\n", magic); return BadValue; } free(auth_reply); return Success; } /* * Function: XvMCCreateContext * Description: Create a XvMC context for the given surface parameters. * Arguments: * display - Connection to the X server. * port - XvPortID to use as avertised by the X connection. * surface_type_id - Unique identifier for the Surface type. * width - Width of the surfaces. * height - Height of the surfaces. * flags - one or more of the following * XVMC_DIRECT - A direct rendered context is requested. * * Notes: surface_type_id and width/height parameters must match those * returned by XvMCListSurfaceTypes. * Returns: Status */ _X_EXPORT Status XvMCCreateContext(Display * display, XvPortID port, int surface_type_id, int width, int height, int flags, XvMCContext * context) { Status ret; CARD32 *priv_data = NULL; struct intel_xvmc_hw_context *comm; int major, minor; int error_base; int event_base; int priv_count; /* Verify Obvious things first */ if (!display || !context) return BadValue; if (!(flags & XVMC_DIRECT)) { XVMC_ERR("Indirect Rendering not supported! Using Direct."); return BadValue; } /* Width, Height, and flags are checked against surface_type_id and port for validity inside the X server, no need to check here. */ context->surface_type_id = surface_type_id; context->width = (unsigned short)((width + 15) & ~15); context->height = (unsigned short)((height + 15) & ~15); context->flags = flags; context->port = port; if (!XvMCQueryExtension(display, &event_base, &error_base)) { XVMC_ERR("XvMCExtension is not available!"); return BadValue; } ret = XvMCQueryVersion(display, &major, &minor); if (ret) { XVMC_ERR ("XvMCQueryVersion Failed, unable to determine protocol version."); return ret; } /* XXX: major and minor could be checked in future for XvMC * protocol capability (i.e H.264/AVC decode available) */ /* Pass control to the X server to create a drm_context_t for us and validate the with/height and flags. */ if ((ret = _xvmc_create_context(display, context, &priv_count, &priv_data))) { XVMC_ERR("Unable to create XvMC Context."); return ret; } comm = (struct intel_xvmc_hw_context *)priv_data; if (xvmc_driver == NULL || xvmc_driver->type != comm->type) { switch (comm->type) { case XVMC_I915_MPEG2_MC: xvmc_driver = &i915_xvmc_mc_driver; break; case XVMC_I965_MPEG2_MC: xvmc_driver = &i965_xvmc_mc_driver; break; case XVMC_I965_MPEG2_VLD: xvmc_driver = &xvmc_vld_driver; break; case XVMC_I945_MPEG2_VLD: default: XVMC_ERR("unimplemented xvmc type %d", comm->type); XFree(priv_data); priv_data = NULL; return BadValue; } } if (xvmc_driver == NULL || xvmc_driver->type != comm->type) { XVMC_ERR("fail to load xvmc driver for type %d\n", comm->type); return BadValue; } XVMC_INFO("decoder type is %s", intel_xvmc_decoder_string(comm->type)); /* check DRI2 */ ret = Success; xvmc_driver->fd = -1; ret = dri2_connect(display); if (ret != Success) { XFree(priv_data); context->privData = NULL; if (xvmc_driver->fd >= 0) close(xvmc_driver->fd); xvmc_driver = NULL; return ret; } if ((xvmc_driver->bufmgr = intel_bufmgr_gem_init(xvmc_driver->fd, 1024 * 64)) == NULL) { XVMC_ERR("Can't init bufmgr\n"); return BadAlloc; } drm_intel_bufmgr_gem_enable_reuse(xvmc_driver->bufmgr); if (!intelInitBatchBuffer()) { XFree(priv_data); context->privData = NULL; dri_bufmgr_destroy(xvmc_driver->bufmgr); xvmc_driver = NULL; return BadAlloc; } /* call driver hook. * driver hook should free priv_data after return if success.*/ ret = (xvmc_driver->create_context) (display, context, priv_count, priv_data); if (ret) { XVMC_ERR("driver create context failed\n"); intelFiniBatchBuffer(); XFree(priv_data); context->privData = NULL; dri_bufmgr_destroy(xvmc_driver->bufmgr); xvmc_driver = NULL; return ret; } sigfillset(&xvmc_driver->sa_mask); sigdelset(&xvmc_driver->sa_mask, SIGFPE); sigdelset(&xvmc_driver->sa_mask, SIGILL); sigdelset(&xvmc_driver->sa_mask, SIGSEGV); sigdelset(&xvmc_driver->sa_mask, SIGBUS); sigdelset(&xvmc_driver->sa_mask, SIGKILL); pthread_mutex_init(&xvmc_driver->ctxmutex, NULL); intel_xvmc_dump_open(); return Success; } /* * Function: XvMCDestroyContext * Description: Destorys the specified context. * * Arguments: * display - Specifies the connection to the server. * context - The context to be destroyed. * */ _X_EXPORT Status XvMCDestroyContext(Display * display, XvMCContext * context) { Status ret; int screen; if (!display || !context) return XvMCBadContext; screen = DefaultScreen(display); ret = (xvmc_driver->destroy_context) (display, context); if (ret) { XVMC_ERR("destroy context fail\n"); return ret; } intelFiniBatchBuffer(); dri_bufmgr_destroy(xvmc_driver->bufmgr); ret = _xvmc_destroy_context(display, context); if (ret != Success) { XVMC_ERR("_xvmc_destroy_context fail\n"); return ret; } if (xvmc_driver->num_ctx == 0) { pthread_mutex_destroy(&xvmc_driver->ctxmutex); if (xvmc_driver->fd >= 0) close(xvmc_driver->fd); xvmc_driver->fd = -1; intel_xvmc_dump_close(); } return Success; } /* * Function: XvMCCreateSurface */ _X_EXPORT Status XvMCCreateSurface(Display * display, XvMCContext * context, XvMCSurface * surface) { Status ret; int priv_count; CARD32 *priv_data; intel_xvmc_surface_ptr intel_surf = NULL; struct intel_xvmc_context *intel_ctx; if (!display || !context) return XvMCBadContext; if (!surface) return XvMCBadSurface; intel_ctx = context->privData; if ((ret = _xvmc_create_surface(display, context, surface, &priv_count, &priv_data))) { XVMC_ERR("Unable to create XvMCSurface."); return ret; } XFree(priv_data); surface->privData = calloc(1, sizeof(struct intel_xvmc_surface)); if (!(intel_surf = surface->privData)) goto out_xvmc; intel_surf->bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface", intel_ctx->surface_bo_size, GTT_PAGE_SIZE); if (!intel_surf->bo) goto out_surf; if (drm_intel_bo_flink(intel_surf->bo, &intel_surf->gem_handle)) goto out_bo; intel_surf = surface->privData; intel_surf->context = context; intel_surf->image = XvCreateImage(display, context->port, FOURCC_XVMC, (char *) &intel_surf->gem_handle, surface->width, surface->height); if (!intel_surf->image) { XVMC_ERR("Can't create XvImage for surface\n"); goto out_bo; } return Success; out_bo: drm_intel_bo_unreference(intel_surf->bo); out_surf: free(intel_surf); out_xvmc: _xvmc_destroy_surface(display, surface); return BadAlloc; } /* * Function: XvMCDestroySurface */ _X_EXPORT Status XvMCDestroySurface(Display * display, XvMCSurface * surface) { intel_xvmc_surface_ptr intel_surf; if (!display || !surface) return XvMCBadSurface; intel_surf = surface->privData; if (!intel_surf) return XvMCBadSurface; XFree(intel_surf->image); if (intel_surf->gc_init) XFreeGC(display, intel_surf->gc); drm_intel_bo_unreference(intel_surf->bo); free(intel_surf); _xvmc_destroy_surface(display, surface); return Success; } /* * Function: XvMCCreateBlocks */ _X_EXPORT Status XvMCCreateBlocks(Display * display, XvMCContext * context, unsigned int num_blocks, XvMCBlockArray * block) { if (!display || !context || !num_blocks || !block) return BadValue; memset(block, 0, sizeof(XvMCBlockArray)); if (! (block->blocks = (short *)malloc((num_blocks << 6) * sizeof(short)))) return BadAlloc; block->num_blocks = num_blocks; block->context_id = context->context_id; block->privData = NULL; return Success; } /* * Function: XvMCDestroyBlocks */ _X_EXPORT Status XvMCDestroyBlocks(Display * display, XvMCBlockArray * block) { if (!display || !block) return BadValue; if (block->blocks) free(block->blocks); block->context_id = 0; block->num_blocks = 0; block->blocks = NULL; block->privData = NULL; return Success; } /* * Function: XvMCCreateMacroBlocks */ _X_EXPORT Status XvMCCreateMacroBlocks(Display * display, XvMCContext * context, unsigned int num_blocks, XvMCMacroBlockArray * blocks) { if (!display || !context || !blocks || !num_blocks) return BadValue; memset(blocks, 0, sizeof(XvMCMacroBlockArray)); blocks->macro_blocks = (XvMCMacroBlock *) malloc(num_blocks * sizeof(XvMCMacroBlock)); if (!blocks->macro_blocks) return BadAlloc; blocks->num_blocks = num_blocks; blocks->context_id = context->context_id; blocks->privData = NULL; return Success; } /* * Function: XvMCDestroyMacroBlocks */ _X_EXPORT Status XvMCDestroyMacroBlocks(Display * display, XvMCMacroBlockArray * block) { if (!display || !block) return BadValue; if (block->macro_blocks) free(block->macro_blocks); block->context_id = 0; block->num_blocks = 0; block->macro_blocks = NULL; block->privData = NULL; return Success; } /* * Function: XvMCRenderSurface * * Description: This function does the actual HWMC. Given a list of * macroblock structures it dispatched the hardware commands to execute * them. */ _X_EXPORT Status XvMCRenderSurface(Display * display, XvMCContext * context, unsigned int picture_structure, XvMCSurface * target_surface, XvMCSurface * past_surface, XvMCSurface * future_surface, unsigned int flags, unsigned int num_macroblocks, unsigned int first_macroblock, XvMCMacroBlockArray * macroblock_array, XvMCBlockArray * blocks) { Status ret; if (!display || !context) { XVMC_ERR("Invalid Display, Context or Target!"); return XvMCBadContext; } if (!target_surface) return XvMCBadSurface; intel_xvmc_dump_render(context, picture_structure, target_surface, past_surface, future_surface, flags, num_macroblocks, first_macroblock, macroblock_array, blocks); ret = (xvmc_driver->render_surface) (display, context, picture_structure, target_surface, past_surface, future_surface, flags, num_macroblocks, first_macroblock, macroblock_array, blocks); if (ret) { XVMC_ERR("render surface fail\n"); return ret; } return Success; } /* * Function: XvMCPutSurface * * Description: * Arguments: * display: Connection to X server * surface: Surface to be displayed * draw: X Drawable on which to display the surface * srcx: X coordinate of the top left corner of the region to be * displayed within the surface. * srcy: Y coordinate of the top left corner of the region to be * displayed within the surface. * srcw: Width of the region to be displayed. * srch: Height of the region to be displayed. * destx: X cordinate of the top left corner of the destination region * in the drawable coordinates. * desty: Y cordinate of the top left corner of the destination region * in the drawable coordinates. * destw: Width of the destination region. * desth: Height of the destination region. * flags: One or more of the following. * XVMC_TOP_FIELD - Display only the Top field of the surface. * XVMC_BOTTOM_FIELD - Display only the Bottom Field of the surface. * XVMC_FRAME_PICTURE - Display both fields or frame. */ _X_EXPORT Status XvMCPutSurface(Display * display, XvMCSurface * surface, Drawable draw, short srcx, short srcy, unsigned short srcw, unsigned short srch, short destx, short desty, unsigned short destw, unsigned short desth, int flags) { XvMCContext *context; intel_xvmc_surface_ptr intel_surf; if (!display || !surface) return XvMCBadSurface; intel_surf = surface->privData; if (!intel_surf) return XvMCBadSurface; context = intel_surf->context; if (!context) return XvMCBadSurface; if (intel_surf->gc_init == FALSE) { intel_surf->gc = XCreateGC(display, draw, 0, NULL); intel_surf->gc_init = TRUE; } else if (draw != intel_surf->last_draw) { XFreeGC(display, intel_surf->gc); intel_surf->gc = XCreateGC(display, draw, 0, NULL); } intel_surf->last_draw = draw; return XvPutImage(display, context->port, draw, intel_surf->gc, intel_surf->image, srcx, srcy, srcw, srch, destx, desty, destw, desth); } /* * Function: XvMCSyncSurface * Arguments: * display - Connection to the X server * surface - The surface to synchronize */ _X_EXPORT Status XvMCSyncSurface(Display * display, XvMCSurface * surface) { if (!display || !surface) return XvMCBadSurface; return Success; } /* * Function: XvMCFlushSurface * Description: * This function commits pending rendering requests to ensure that they * wll be completed in a finite amount of time. * Arguments: * display - Connection to X server * surface - Surface to flush * Returns: Status */ _X_EXPORT Status XvMCFlushSurface(Display * display, XvMCSurface * surface) { if (!display || !surface) return XvMCBadSurface; return Success; } /* * Function: XvMCGetSurfaceStatus * Description: * Arguments: * display: connection to X server * surface: The surface to query * stat: One of the Following * XVMC_RENDERING - The last XvMCRenderSurface command has not * completed. * XVMC_DISPLAYING - The surface is currently being displayed or a * display is pending. */ _X_EXPORT Status XvMCGetSurfaceStatus(Display * display, XvMCSurface * surface, int *stat) { if (!display || !surface || !stat) return XvMCBadSurface; *stat = 0; return Success; } /* * Function: XvMCHideSurface * Description: Stops the display of a surface. * Arguments: * display - Connection to the X server. * surface - surface to be hidden. * * Returns: Status */ _X_EXPORT Status XvMCHideSurface(Display * display, XvMCSurface * surface) { if (!display || !surface) return XvMCBadSurface; return Success; } /* * Function: XvMCCreateSubpicture * Description: This creates a subpicture by filling out the XvMCSubpicture * structure passed to it and returning Success. * Arguments: * display - Connection to the X server. * context - The context to create the subpicture for. * subpicture - Pre-allocated XvMCSubpicture structure to be filled in. * width - of subpicture * height - of subpicture * xvimage_id - The id describing the XvImage format. * * Returns: Status */ _X_EXPORT Status XvMCCreateSubpicture(Display * display, XvMCContext * context, XvMCSubpicture * subpicture, unsigned short width, unsigned short height, int xvimage_id) { XVMC_ERR("XvMCCreateSubpicture not implemented!\n"); return BadValue; } /* * Function: XvMCClearSubpicture * Description: Clear the area of the given subpicture to "color". * structure passed to it and returning Success. * Arguments: * display - Connection to the X server. * subpicture - Subpicture to clear. * x, y, width, height - rectangle in the subpicture to clear. * color - The data to file the rectangle with. * * Returns: Status */ _X_EXPORT Status XvMCClearSubpicture(Display * display, XvMCSubpicture * subpicture, short x, short y, unsigned short width, unsigned short height, unsigned int color) { XVMC_ERR("XvMCClearSubpicture not implemented!"); return BadValue; } /* * Function: XvMCCompositeSubpicture * Description: Composite the XvImae on the subpicture. This composit uses * non-premultiplied alpha. Destination alpha is utilized * except for with indexed subpictures. Indexed subpictures * use a simple "replace". * Arguments: * display - Connection to the X server. * subpicture - Subpicture to clear. * image - the XvImage to be used as the source of the composite. * srcx, srcy, width, height - The rectangle from the image to be used. * dstx, dsty - location in the subpicture to composite the source. * * Returns: Status */ _X_EXPORT Status XvMCCompositeSubpicture(Display * display, XvMCSubpicture * subpicture, XvImage * image, short srcx, short srcy, unsigned short width, unsigned short height, short dstx, short dsty) { XVMC_ERR("XvMCCompositeSubpicture not implemented!"); return BadValue; } /* * Function: XvMCDestroySubpicture * Description: Destroys the specified subpicture. * Arguments: * display - Connection to the X server. * subpicture - Subpicture to be destroyed. * * Returns: Status */ _X_EXPORT Status XvMCDestroySubpicture(Display * display, XvMCSubpicture * subpicture) { XVMC_ERR("XvMCDestroySubpicture not implemented!"); return BadValue; } /* * Function: XvMCSetSubpicturePalette * Description: Set the subpictures palette * Arguments: * display - Connection to the X server. * subpicture - Subpiture to set palette for. * palette - A pointer to an array holding the palette data. The array * is num_palette_entries * entry_bytes in size. * Returns: Status */ _X_EXPORT Status XvMCSetSubpicturePalette(Display * display, XvMCSubpicture * subpicture, unsigned char *palette) { XVMC_ERR("XvMCSetSubpicturePalette not implemented!"); return BadValue; } /* * Function: XvMCBlendSubpicture * Description: * The behavior of this function is different depending on whether * or not the XVMC_BACKEND_SUBPICTURE flag is set in the XvMCSurfaceInfo. * i915 only support frontend behavior. * * XVMC_BACKEND_SUBPICTURE not set ("frontend" behavior): * * XvMCBlendSubpicture is a no-op in this case. * * Arguments: * display - Connection to the X server. * subpicture - The subpicture to be blended into the video. * target_surface - The surface to be displayed with the blended subpic. * source_surface - Source surface prior to blending. * subx, suby, subw, subh - The rectangle from the subpicture to use. * surfx, surfy, surfw, surfh - The rectangle in the surface to blend * blend the subpicture rectangle into. Scaling can ocure if * XVMC_SUBPICTURE_INDEPENDENT_SCALING is set. * * Returns: Status */ _X_EXPORT Status XvMCBlendSubpicture(Display * display, XvMCSurface * target_surface, XvMCSubpicture * subpicture, short subx, short suby, unsigned short subw, unsigned short subh, short surfx, short surfy, unsigned short surfw, unsigned short surfh) { XVMC_ERR("XvMCBlendSubpicture not implemented!"); return BadValue; } /* * Function: XvMCBlendSubpicture2 * Description: * The behavior of this function is different depending on whether * or not the XVMC_BACKEND_SUBPICTURE flag is set in the XvMCSurfaceInfo. * i915 only supports frontend blending. * * XVMC_BACKEND_SUBPICTURE not set ("frontend" behavior): * * XvMCBlendSubpicture2 blends the source_surface and subpicture and * puts it in the target_surface. This does not effect the status of * the source surface but will cause the target_surface to query * XVMC_RENDERING until the blend is completed. * * Arguments: * display - Connection to the X server. * subpicture - The subpicture to be blended into the video. * target_surface - The surface to be displayed with the blended subpic. * source_surface - Source surface prior to blending. * subx, suby, subw, subh - The rectangle from the subpicture to use. * surfx, surfy, surfw, surfh - The rectangle in the surface to blend * blend the subpicture rectangle into. Scaling can ocure if * XVMC_SUBPICTURE_INDEPENDENT_SCALING is set. * * Returns: Status */ _X_EXPORT Status XvMCBlendSubpicture2(Display * display, XvMCSurface * source_surface, XvMCSurface * target_surface, XvMCSubpicture * subpicture, short subx, short suby, unsigned short subw, unsigned short subh, short surfx, short surfy, unsigned short surfw, unsigned short surfh) { XVMC_ERR("XvMCBlendSubpicture2 not implemented!"); return BadValue; } /* * Function: XvMCSyncSubpicture * Description: This function blocks until all composite/clear requests on * the subpicture have been complete. * Arguments: * display - Connection to the X server. * subpicture - The subpicture to synchronize * * Returns: Status */ _X_EXPORT Status XvMCSyncSubpicture(Display * display, XvMCSubpicture * subpicture) { XVMC_ERR("XvMCSyncSubpicture not implemented!"); return BadValue; } /* * Function: XvMCFlushSubpicture * Description: This function commits pending composite/clear requests to * ensure that they will be completed in a finite amount of * time. * Arguments: * display - Connection to the X server. * subpicture - The subpicture whos compsiting should be flushed * * Returns: Status */ _X_EXPORT Status XvMCFlushSubpicture(Display * display, XvMCSubpicture * subpicture) { XVMC_ERR("XvMCFlushSubpicture not implemented!"); return BadValue; } /* * Function: XvMCGetSubpictureStatus * Description: This function gets the current status of a subpicture * * Arguments: * display - Connection to the X server. * subpicture - The subpicture whos status is being queried * stat - The status of the subpicture. It can be any of the following * OR'd together: * XVMC_RENDERING - Last composite or clear request not completed * XVMC_DISPLAYING - Suppicture currently being displayed. * * Returns: Status */ _X_EXPORT Status XvMCGetSubpictureStatus(Display * display, XvMCSubpicture * subpicture, int *stat) { XVMC_ERR("XvMCGetSubpictureStatus not implemented!"); return BadValue; } /* * Function: XvMCQueryAttributes * Description: An array of XvAttributes of size "number" is returned by * this function. If there are no attributes, NULL is returned and number * is set to 0. The array may be freed with free(). * * Arguments: * display - Connection to the X server. * context - The context whos attributes we are querying. * number - The returned number of recognized atoms * * Returns: * An array of XvAttributes. */ _X_EXPORT XvAttribute *XvMCQueryAttributes(Display * display, XvMCContext * context, int *number) { /* now XvMC has no extra attribs than Xv */ *number = 0; return NULL; } /* * Function: XvMCSetAttribute * Description: This function sets a context-specific attribute. * * Arguments: * display - Connection to the X server. * context - The context whos attributes we are querying. * attribute - The X atom of the attribute to be changed. * value - The new value for the attribute. * * Returns: * Status */ _X_EXPORT Status XvMCSetAttribute(Display * display, XvMCContext * context, Atom attribute, int value) { return Success; } /* * Function: XvMCGetAttribute * Description: This function queries a context-specific attribute and * returns the value. * * Arguments: * display - Connection to the X server. * context - The context whos attributes we are querying. * attribute - The X atom of the attribute to be queried * value - The returned attribute value * * Returns: * Status */ _X_EXPORT Status XvMCGetAttribute(Display * display, XvMCContext * context, Atom attribute, int *value) { return Success; } _X_EXPORT Status XvMCBeginSurface(Display * display, XvMCContext * context, XvMCSurface * target, XvMCSurface * past, XvMCSurface * future, const XvMCMpegControl * control) { if (xvmc_driver->begin_surface(display, context, target, past, future, control)) { XVMC_ERR("BeginSurface fail\n"); return BadValue; } return Success; } _X_EXPORT Status XvMCLoadQMatrix(Display * display, XvMCContext * context, const XvMCQMatrix * qmx) { if (xvmc_driver->load_qmatrix(display, context, qmx)) { XVMC_ERR("LoadQMatrix fail\n"); return BadValue; } return Success; } _X_EXPORT Status XvMCPutSlice(Display * display, XvMCContext * context, char *slice, int nbytes) { if (xvmc_driver->put_slice(display, context, (unsigned char *) slice, nbytes)) { XVMC_ERR("PutSlice fail\n"); return BadValue; } return Success; } _X_EXPORT Status XvMCPutSlice2(Display * display, XvMCContext * context, char *slice, int nbytes, int slice_code) { if (xvmc_driver->put_slice2 (display, context, (unsigned char *) slice, nbytes, slice_code)) { XVMC_ERR("PutSlice2 fail\n"); return BadValue; } return Success; } xf86-video-intel-2.99.917/config.h.in0000664000175000017500000001412012445556130013755 00000000000000/* config.h.in. Generated from configure.ac by autoheader. */ /* Builder description */ #undef BUILDER_DESCRIPTION /* Enable memory debugging */ #undef DEBUG_MEMORY /* Enable pixmap debugging */ #undef DEBUG_PIXMAP /* Enable synchronous rendering for debugging */ #undef DEBUG_SYNC /* Default acceleration method */ #undef DEFAULT_ACCEL_METHOD /* Default have_dri2 driver path */ #undef DRI_DRIVER_PATH /* Enable XvMC support */ #undef ENABLE_XVMC /* Enable all debugging */ #undef HAS_DEBUG_FULL /* Enable pixman glyph cache */ #undef HAS_PIXMAN_GLYPHS /* Enable pixman triangle rasterisation */ #undef HAS_PIXMAN_TRIANGLES /* Enable if your compiler supports the Intel __sync_* atomic primitives */ #undef HAVE_ATOMIC_PRIMITIVES /* Found a useable cpuid.h */ #undef HAVE_CPUID_H /* Define to 1 if you have the header file. */ #undef HAVE_DGAPROC_H /* Define to 1 if you have the header file. */ #undef HAVE_DLFCN_H /* Are we in a git checkout? */ #undef HAVE_DOT_GIT /* Enable DRI1 driver support */ #undef HAVE_DRI1 /* Enable DRI2 driver support */ #undef HAVE_DRI2 /* Define to 1 if you have the header file. */ #undef HAVE_DRI2_H /* Enable DRI3 driver support */ #undef HAVE_DRI3 /* Define to 1 if you have the header file. */ #undef HAVE_DRISTRUCT_H /* Define to 1 if you have the header file. */ #undef HAVE_DRI_H /* Define to 1 if you have the `getline' function. */ #undef HAVE_GETLINE /* Define to 1 if you have the header file. */ #undef HAVE_INTTYPES_H /* Enable if you have libatomic-ops-dev installed */ #undef HAVE_LIB_ATOMIC_OPS /* Define to 1 if you have the header file. */ #undef HAVE_MEMORY_H /* Define to 1 if you have the header file. */ #undef HAVE_MISYNCSHM_H /* Define to 1 if you have the header file. */ #undef HAVE_MISYNCSTR_H /* Define to 1 if MIT-SHM is available */ #undef HAVE_MIT_SHM /* Enable PRESENT driver support */ #undef HAVE_PRESENT /* Define to 1 if you have the header file. */ #undef HAVE_PRESENT_H /* Define to 1 if you have the header file. */ #undef HAVE_SAREA_H /* Define to 1 if you have the header file. */ #undef HAVE_STDINT_H /* Define to 1 if you have the header file. */ #undef HAVE_STDLIB_H /* Define to 1 if you have the header file. */ #undef HAVE_STRINGS_H /* Define to 1 if you have the header file. */ #undef HAVE_STRING_H /* Define to 1 if you have the `strlcat' function. */ #undef HAVE_STRLCAT /* Define to 1 if you have the `strlcpy' function. */ #undef HAVE_STRLCPY /* Define to 1 if you have the `strndup' function. */ #undef HAVE_STRNDUP /* Define to 1 if `totalram' is a member of `struct sysinfo'. */ #undef HAVE_STRUCT_SYSINFO_TOTALRAM /* Define to 1 if you have the header file. */ #undef HAVE_SYS_IPC_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_STAT_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_SYSINFO_H /* Define to 1 if you have the header file. */ #undef HAVE_SYS_TYPES_H /* Enable udev-based monitor hotplug detection */ #undef HAVE_UDEV /* Define to 1 if you have the header file. */ #undef HAVE_UNISTD_H /* Use valgrind intrinsics to suppress false warnings */ #undef HAVE_VALGRIND /* Define to 1 if you have the header file. */ #undef HAVE_VGAHW_H /* Define to 1 if you have the header file. */ #undef HAVE_X11_EXTENSIONS_DPMSCONST_H /* Define to 1 if you have the header file. */ #undef HAVE_X11_EXTENSIONS_SHMPROTO_H /* Define to 1 if you have the header file. */ #undef HAVE_X11_EXTENSIONS_SHMSTR_H /* Define to 1 if you have the header file. */ #undef HAVE_X11_EXTENSIONS_XINERAMA_H /* Define to 1 if you have the header file. */ #undef HAVE_X11_EXTENSIONS_XSHM_H /* Define to 1 if you have the header file. */ #undef HAVE_XAA_H /* Define to 1 if shared memory segments are released deferred. */ #undef IPC_RMID_DEFERRED_RELEASE /* Assume KMS support */ #undef KMS /* libexec directory */ #undef LIBEXEC_PATH /* Define to the sub-directory in which libtool stores uninstalled libraries. */ #undef LT_OBJDIR /* Disable internal debugging */ #undef NDEBUG /* Name of package */ #undef PACKAGE /* Define to the address where bug reports for this package should be sent. */ #undef PACKAGE_BUGREPORT /* Define to the full name of this package. */ #undef PACKAGE_NAME /* Define to the full name and version of this package. */ #undef PACKAGE_STRING /* Define to the one symbol short name of this package. */ #undef PACKAGE_TARNAME /* Define to the home page for this package. */ #undef PACKAGE_URL /* Define to the version of this package. */ #undef PACKAGE_VERSION /* Major version of this package */ #undef PACKAGE_VERSION_MAJOR /* Minor version of this package */ #undef PACKAGE_VERSION_MINOR /* Patch version of this package */ #undef PACKAGE_VERSION_PATCHLEVEL /* installation prefix */ #undef PREFIX_PATH /* Define to 1 if you have the ANSI C header files. */ #undef STDC_HEADERS /* Enable "TearFree" by default */ #undef TEARFREE /* Assume UMS support */ #undef UMS /* Assume asynchronous swap support */ #undef USE_ASYNC_SWAP /* Enable control of the backlight */ #undef USE_BACKLIGHT /* Enable use of the backlight helper interfaces */ #undef USE_BACKLIGHT_HELPER /* Assume "create2" support */ #undef USE_CREATE2 /* Use automagic builder description */ #undef USE_GIT_DESCRIBE /* Assume "rendernode" support */ #undef USE_RENDERNODE /* Enable SNA support */ #undef USE_SNA /* Enable UXA support */ #undef USE_UXA /* Enable use of WriteCombining mmaps */ #undef USE_WC_MMAP /* Version number of package */ #undef VERSION /* Enable large inode numbers on Mac OS X 10.5. */ #ifndef _DARWIN_USE_64_BIT_INODE # define _DARWIN_USE_64_BIT_INODE 1 #endif /* Number of bits in a file offset, on hosts where this is settable. */ #undef _FILE_OFFSET_BITS /* Define for large files, on AIX-style hosts. */ #undef _LARGE_FILES xf86-video-intel-2.99.917/NEWS0000664000175000017500000031763612445555766012471 00000000000000Snapshot 2.99.917 (2014-12-21) ============================== 3 months drifted by whilst I looked elsewhere for bugs.. The highlight of bugs fixed here are a couple of workarounds required for Broadwell and making sure that the rasterisation code is symmetric under inversions. However, as a couple of crashers slipped through into 2.99.916 (though not actual regressions in 2.99.916 per se) and 3 months have passed, we should make one more snapshot before an imminent release. * Beware of recomputing the clear hint in the middle of MI recursion https://bugs.freedesktop.org/show_bug.cgi?id=77074 * Fix crash from rendering an empty Glyph string under PRIME as the secondary driver * Restore application of default monitor options to the first output, a regression in 2.99.915 and the MST support https://bugs.gentoo.org/show_bug.cgi?id=522500 * Finally fix ZaphodHeads blocking on waiting for flip completion events. Before kernel 3.19, O_NONBLOCK support is broken and so we must avoid reading if we are not expecting an event. * Backwards compatibilty fix for fake triple buffering with PRIME and Xorg-1.15 https://bugs.freedesktop.org/show_bug.cgi?id=85144#c12 * Fix a rendering issue with output rotation and software fallbacks. https://bugs.freedesktop.org/show_bug.cgi?id=84653 * Enable MST discovery even without udev support https://bugs.freedesktop.org/show_bug.cgi?id=84718 * Fix TearFree operation after the GPU is wedged https://bugs.freedesktop.org/show_bug.cgi?id=85058 * Fix projective sampling on gen6+. * Fix rendering and corruption with gen8. https://bugs.freedesktop.org/show_bug.cgi?id=84958 https://bugs.freedesktop.org/show_bug.cgi?id=83207 https://bugs.freedesktop.org/show_bug.cgi?id=79053 https://bugs.freedesktop.org/show_bug.cgi?id=81583 * Fix crash when using Xinerama. https://bugs.freedesktop.org/show_bug.cgi?id=87207 * Fix rendering of right-to-left or bottom-to-top PolySegments in UXA Snapshot 2.99.916 (2014-09-08) ============================== Quick update for MST in UXA - we need to hook up the RandR outputs for dynamicaly added connectors. Snapshot 2.99.915 (2014-09-08) ============================== A significant change to UXA to enable MST and to keep it working on recent kernels needs some soaking before a major release, and the usual plethora of bugfixes. One other feature is the support for hardware rotations on very recent kernels. * Handle rotated scanouts that are all clear correctly. The region to update was not being computed correctly, overdrawing the wrong CRTC. https://bugs.freedesktop.org/show_bug.cgi?id=81820 * Reset cursor images after rotation and size changes https://bugs.freedesktop.org/show_bug.cgi?id=81886 https://bugs.freedesktop.org/show_bug.cgi?id=82273 https://bugs.freedesktop.org/show_bug.cgi?id=82337 * Handle stale DRI2 buffers and Client errors more gracefully * Fallback if we fail to render a glyph onto a too-large surface, e.g. direct rendering of glyphs onto extended desktops with gen2/gen3. https://bugs.archlinux.org/task/40949 * Further work to enable tiled rendering onto large surfaces in severely aperture and memory constrained devices (e.g. gen2/gen3) * Honour the Primary option from xorg.conf and mark that as the RandR primary. https://bugs.freedesktop.org/show_bug.cgi?id=82193 https://bugs.freedesktop.org/show_bug.cgi?id=82205 * Fix another Client-Window DRI2 close race https://bugs.freedesktop.org/show_bug.cgi?id=82979 * Fix incorrect discarding of GPU damage when copying over the TearFree scanout - which caused a flicker in rapidly updated elements (like simple video panes). https://bugs.freedesktop.org/show_bug.cgi?id=81973 Snapshot 2.99.914 (2014-07-23) ============================== And a brown paper bag to hide the rebuilding from the tarball with 'autoreconf -fi' error that arose from not distributing the libobj/ directory. Snapshot 2.99.913 (2014-07-23) ============================== This should be it... A few fixes from testing the new code, we should be ready for the final release. However, we do have one standout feature in this snapshot, we now officially recognise HD Graphics 5300/5500/5600, Iris Graphics 6100 and Iris Pro Graphics 6200/P6300 (formerly known as Broadwell). * Check the window actually covers the CRTC before doing a single CRTC flip, and then restore the right framebuffer after completing CRTC flips. Otherwise we would detect an error and disable an output under TearFree Regression in 2.99.912 https://bugs.freedesktop.org/show_bug.cgi?id=80191 * Fix framebuffer creation on kernels older than 3.11 Regression in 2.99.912 * Check that the damage still exists after implicit reduction Regression in 2.99.912 https://bugs.freedesktop.org/show_bug.cgi?id=77436 * Fix direction flags for fallback composited CopyAreas which caused scrolling corruption in a few configurations Regression from 2.20.0 https://bugs.freedesktop.org/show_bug.cgi?id=79843 * Do not throw away damage if there is no redundant copy https://bugs.freedesktop.org/show_bug.cgi?id=79992 * Check clipping on PolyRect before discarding the clipped damage Regression from 2.99.903 https://bugs.freedesktop.org/show_bug.cgi?id=79992 * Fix hints for GLXPixmapa, as these are never swapped and so miss invalidating the hints on SwapBuffers with the result that they are often presumed blank Regression in 2.99.912 https://bugs.freedesktop.org/show_bug.cgi?id=79999 * Fix incoherent choice of source bo when constructing 8x8 tiles, incorrect pattern origin when extracting, and then fix the alignment of colour patterns for BLT operations https://bugs.freedesktop.org/show_bug.cgi?id=80033 * Disable blending with the render engine on snoopable buffers https://bugs.freedesktop.org/show_bug.cgi?id=80253 * Restore throttling to prevent client lag under heavy GPU load Regression from 2.21.10 https://bugs.freedesktop.org/show_bug.cgi?id=77436 * Use ClientGone for notifications on shared DRI2 windows to prevent rare crashes due to use-after-free of the swap requests https://bugs.freedesktop.org/show_bug.cgi?id=80157 * Ensure the mmaped CPU bo is idle before migrating damage https://bugs.freedesktop.org/show_bug.cgi?id=80560 * Fix incorrect clipping by the render engine for large DRI2 windows * Ensure that the aperture tiling fallbacks are bounded * Validate parameter to xf86-video-intel-backlight-helper more carefully (CVE-2014-4910) * Fix slaved scanouts for reverse optimus, though rotated slaves will require further patches to Xorg. https://bugs.freedesktop.org/show_bug.cgi?id=81383 * Fix build without Composite extension. * Fix build without gettline(). * UXA: Allocate and resize frontbuffer consistently to pass sanity checks https://bugs.freedesktop.org/show_bug.cgi?id=80088 * UXA: Report cached backlight value when the output is off (like sna) https://bugzilla.redhat.com/show_bug.cgi?id=1032978 * UXA: Mark outputs as off before the kernel does (like sna) This will prevent the internal panel from starting up blank in some multi-monitor configurations https://bugzilla.redhat.com/show_bug.cgi?id=1103806 Note that the DRI2 exchange mechanism introduced in 2.99.912 exposes bugs in some compositors, at least kwin and comptom, which discard DRI2 buffer invalidates rather than resourcing their texture. For example, https://bugs.kde.org/show_bug.cgi?id=336589 Note that the improved triple buffering introduced in DRI2 requires a patch to Xorg (now released upstream) to prevent crashes with DRI_PRIME. https://bugs.freedesktop.org/show_bug.cgi?id=80001 Note that DRI3/Present require tracking the relevant development trees for mesa and the xserver as they are very much still under early testing. Also be aware that Mesa provides no support for explicit fencing so Damage tracking between compositors and clients is unserialised. Snapshot 2.99.912 (2014-06-10) ============================== A final round of features. We have everything from support for variable cursor sizes, support for the DRI3 and Present extensions, improved DRI2 support, support for Xserver 1.16, userptr from kernel 3.16, and precursory support for DP multistream transport, * Avoid discarding dirty pixels when promoting a migration to cover the whole pixmap. Regression in 2.99.911 https://bugs.freedesktop.org/show_bug.cgi?id=77063 https://bugs.freedesktop.org/show_bug.cgi?id=77178 * Avoid overextending degenerate lines (and consequentially accessing pixels outside of our damaged area). https://bugs.freedesktop.org/show_bug.cgi?id=77074 * Fix subpixel glyph rendering on gen2 devices (830-865 chipsets) Regression in 2.99.911 https://bugs.freedesktop.org/show_bug.cgi?id=77201 * Share the global pixman glyph cache between ZaphodHeads https://bugs.freedesktop.org/show_bug.cgi?id=54707 * Light up all connected outputs, even if their status is unknown, on takeover from fbcon. This prevents loss of display after a resume on recent kernels, for example. https://bugs.freedesktop.org/show_bug.cgi?id=77768 * Show the video overlay (when supported by the hardware) across all outputs. https://bugs.freedesktop.org/show_bug.cgi?id=77802 * Do not discard damage when performing "BLT" spans inplace with the CPU. Regression from 2.20.10 * Avoid discarding IO buffers too early during their preparation for a new batch https://bugs.freedesktop.org/show_bug.cgi?id=79238 * Fix fallback handling for displaying large scaled framebuffers (that are too large to be scaled by the GPU in a single pass) https://bugs.freedesktop.org/show_bug.cgi?id=79320 * Listen to external modifications of backlight value and propagate the notifications to RandR clients. This should make the GUI report ACPI keypresses to change the backlight correctly. https://bugs.freedesktop.org/show_bug.cgi?id=79699 * UXA: fix pageflips with 3 heads. * UXA: do not report a BadMatch error for DRI2GetMsc - as clients are often unprepared and die when they get the unexpected error. Snapshot 2.99.911 (2014-03-19) ============================== Hans de Geode has been working on making the Xserver work without privileges under the supervision of systemd/logind. This necessitated a few new features for us: server fds (where we are passed which fd to use to talk to our device by the Xserver who may in turn receive it from logind or other host) and a small backlight helper so that we can continue to provide a RandR backlight property when running without root privileges. * Flush when changing blend modes on Ironlake, or else single glyphs are sometimes rendered incorrectly Regression from 2.20.15 https://bugs.freedesktop.org/show_bug.cgi?id=74882 * Fix pixmap offsets for pixman fallbacks onto Composite redirected windows https://bugs.freedesktop.org/show_bug.cgi?id=73811 * Fix blending onto 8-bit destinations, typically used for generating masks in complex Render operations, on gen2 https://bugs.freedesktop.org/show_bug.cgi?id=75818 * Handle failure to create DRI bo more carefully. For example on gen3, the DDX supports pixmaps that are much, much larger than OpenGL can use and do not support the tiling modes that we request for OpenGL. https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1289049 * Fix a bookkeeping bug with proxy buffers that are marked active but not actually inserted into a request (so they end up permanently active and confuse everybody). https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1289923 * Actually turn off displays with DPMS off for UXA. Regression from 2.99.903, but requires kernel commit c9976dcf55c8aaa7037427b239f15e5acfc01a3a Author: Chris Wilson Date: Sun Sep 29 19:15:07 2013 +0100 drm/i915: Only apply DPMS to the encoder if enabled instead for correct behaviour on Haswell. https://code.google.com/p/chromium/issues/detail?id=341135 Snapshot 2.99.910 (2014-02-10) ============================== Another latent bug exposed by recent changes merit another snapshot for final testing. * Only discard damage when overwriting the dirty CPU bo, instead of discarding damage that will be shown! * Reset operation state when switching between glyph caches. https://bugs.freedesktop.org/show_bug.cgi?id=74494 * Fully reinitialise pixmaps allocated from the freed cache. Fixes a potential issue (crash or misrendering) when using some compositors. https://bugs.freedesktop.org/show_bug.cgi?id=74550 * Do not expose the TexturedVideo adaptor in UXA when it is disabled either due to a hung GPU or explicitly disabled by the user. * Restore the pipe stall when changing CC state on gen6, otherwise the GPU may not flush intermediate results from all EU resulting in render corruption (usually the occasional black box). Regression from 2.99.906 https://bugs.freedesktop.org/show_bug.cgi?id=7237 Snapshot 2.99.909 (2014-02-01) ============================== Pass the brown paper bag. Ridiculously stupid bug in last minute coding. * Add Xv support using glamor acceleration in addition to adaptors provided by the UXA backend. * Fix overeager discarding of CPU damage Regression in 2.99.908 :( https://bugs.freedesktop.org/show_bug.cgi?id=74327 Snapshot 2.99.908 (2014-01-31) ============================== A couple of regressions dashed the hopes that .907 was to be the final release candidate, so time to start the cycle again after applying a few more bugfixes. * Fix invalid pageflipping of GLXPixmaps by UXA. https://bugs.freedesktop.org/show_bug.cgi?id=73282 * Consistently treat DPMS Suspend/Standy as Off, otherwise we may incorrectly restore the backlight in UXA. * Fix disabling the backlight in UXA when querying the value whilst off https://bugs.freedesktop.org/show_bug.cgi?id=73181. * Invalidate between every operation if rendering into the source or mask. Fixes regression in 2.99.907 on Ivybridge (seen in KDE) https://bugs.freedesktop.org/show_bug.cgi?id=73208 * Check for available batch buffer state before restoring state on gen4, otherwise we overwrite surface state with commands and cause a GPU hang. https://bugs.freedesktop.org/show_bug.cgi?id=73348 * Prevent an invalid free by TearFree https://bugs.freedesktop.org/show_bug.cgi?id=73469 * Fix confusion in TearFree when it tried to pageflip to a stale bo https://bugs.freedesktop.org/show_bug.cgi?id=70905 * Initialise TearFree contents with the current frontbuffer upon creation, otherwise old content may be visible for significant fractions of a second after resume or DPMS on https://bugs.freedesktop.org/show_bug.cgi?id=73842 * Nullify the old pointer into a CPU mmapping of the bo when promoting it on the GPU. Eventually that old pointer becomes invalid and will cause the Xserver to crash. Fixes regression in 2.99.906 https://bugs.freedesktop.org/show_bug.cgi?id=73351 * Restore the serialNumber on the GC correctly after falling back to software. This was seen to cause corruption with Wine. https://bugs.freedesktop.org/show_bug.cgi?id=73856 * Do not ignore CPU damage on a pixmap unless the Composite operation will completely overwrite it. This was observed in xfce4. https://bugs.freedesktop.org/show_bug.cgi?id=69528 * Skip fake outputs during initial probe as they can cause a NULL pointer dereference. https://bugs.freedesktop.org/show_bug.cgi?id=73981 * Fix rendering of dashed zero-width lines onto 24bit buffers https://bugzilla.redhat.com/show_bug.cgi?id=1059152 * Cap the freed Pixmap cache and reuse it more often Fixes a regression in 2.99.907 that caused the memory used by X to grow until it was cleaned up during server regreneration https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1272338 Snapshot 2.99.907 (2013-12-30) ============================== The highlight here is that things seem to be quietening down on the bug reporting front. All is not quiet as you will see below, and maybe it is just the holiday season that is approaching*, but there has been a remarkable falloff in bug reports. Lets hope this trend holds and we can make a stable release shortly! * This was intended to be sent a couple of weeks ago and the holiday season has been very quiet.... Oh, and acceleration support for Intel's next generation of integrated processor graphics has landed, codenamed Broadwell. * Fix potential X server infinite recursion (crash) from a gen2 bug fix Regression in 2.99.906 https://bugs.freedesktop.org/show_bug.cgi?id=71605 * Workaround a missing pipeline flush within Ivybridge, that would leave black rectangles randomly over the output https://bugs.freedesktop.org/show_bug.cgi?id=68410 * Fix tiled fills. gen2-3 and gen4+ had two different bugs that both broke rendering with small 8x8 patterns in some circumstances https://bugs.freedesktop.org/show_bug.cgi?id=71260 * Fix reads from a cropped video image using a packed pixel format. * Another clear the clear hint after DRI2 SwapBuffers, like the bug fixed in 2.99.903. Failure to clear the hint would cause read backs of the frontbuffer (Xvnc) to be blank. https://bugs.freedesktop.org/show_bug.cgi?id=72194 * Disable VSync on Baytrail https://bugs.freedesktop.org/show_bug.cgi?id=69869 * Handle partial uploads with TearFree correctly https://bugs.freedesktop.org/show_bug.cgi?id=72343 https://bugs.freedesktop.org/show_bug.cgi?id=72430 * Avoid recusing through DRI event handlers whilst processing TearFree, leading to a double free (and memory corruption) https://bugs.freedesktop.org/show_bug.cgi?id=72690 * Hide the gen4 render corruption by crippling the GPU https://bugs.freedesktop.org/show_bug.cgi?id=55500 Snapshot 2.99.906 (2013-11-13) ============================== Several stability fixes required after the recent tweaking of the core mechanics to handle the updated TearFree and attempting to make static analyzers happy. * Fix damage handling when rendering to a partially damaged GPU surface. Regression in 2.99.905 https://bugs.freedesktop.org/show_bug.cgi?id=70527 * Use asprintf() instead of sprintf() Regression in 2.99.905 https://bugs.freedesktop.org/show_bug.cgi?id=70835 * Improve accounting for fence overallocation on older gen2/3, and improve the tiling mechanism to fit into the same aperture constraints https://bugs.freedesktop.org/show_bug.cgi?id=70924 * Add an extra GPU flush on Sandybridge to fix some rare font corruption * Rasterise lines through all clip boxes https://bugs.freedesktop.org/show_bug.cgi?id=70802 * Fix regression from stricter handling of failures to move a GC to the GPU Regression in 2.99.905 https://bugs.freedesktop.org/show_bug.cgi?id=71415 * Fix various fail along the memcpy_xor paths, including inadequate error handling and integer overflow https://bugs.freedesktop.org/show_bug.cgi?id=70527 * Fix outside-of-target stipple uploads https://bugs.launchpad.net/bugs/1247785 * Fix clip detection for long glyphs Incomplete bug fix (causing a regression) in 2.99.905 https://bugs.freedesktop.org/show_bug.cgi?id=70527 * Fix VSync for the render engine (Xv) on Haswell https://bugs.freedesktop.org/show_bug.cgi?id=70527 Snapshot 2.99.905 (2013-10-23) ============================== The highlight for this snapshot is the extension of TearFree to support transformed outputs, along with some polishing to eliminate its impact upon input and output latency. As always, thanks to everyone who have been testing, reporting bugs and helping to improve the stability before release. * Prevent a crash when starting with a user specified mode or position * Prevent some crashes in UXA after allocation failure * Stop marking the user's preferred backlight value as 0 if the backlight property is queried whilst the connector is disabled https://bugs.freedesktop.org/show_bug.cgi?id=70406 * Pad GETCONNECTOR ioctl for compatability between 32/64-bit userspace and kernel * Handle long glyph runs correctly https://bugs.freedesktop.org/show_bug.cgi?id=70541 * Fix clipping of stippled rectangles against clip regions https://bugs.freedesktop.org/show_bug.cgi?id=67865 * Support TearFree rendering of rotated outputs https://bugs.freedesktop.org/show_bug.cgi?id=22969 Snapshot 2.99.904 (2013-10-09) ============================== There is one more feature planned to be completed for 3.0, so time for a snapshot beforehand to push out the bug fixes from the last week. * Fix video output using sprites when changing the image size * Apply more restrictive tile constaints for 915g class devices https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1232546 * Ensure all overlapping rectangles are drawn for XRenderFillRectangles https://bugs.freedesktop.org/show_bug.cgi?id=66313 * Fix trapezoid clipping against the left-edge https://bugs.freedesktop.org/show_bug.cgi?id=69469 * Prevent discarding active upload buffers, causing glitches in chromium https://bugs.freedesktop.org/show_bug.cgi?id=66990 * Prevent specifying a negative timeout to select if the BlockHandler takes too long to update the display * Promote the Ironlake pipecontrol to be a full pipeline flush to prevent render cache corruption https://bugs.freedesktop.org/show_bug.cgi?id=51422 * Never pass an invalid trapezoid to pixman https://bugs.launchpad.net/ubuntu/+source/xorg-server/+bug/1197921 * Prevent out-of-bounds access by overassigning work amongst threads https://bugs.freedesktop.org/show_bug.cgi?id=70204 * Make sure the current mode is always listed amongst the output modes https://bugs.freedesktop.org/show_bug.cgi?id=70132 * Build fixes for 1.14.99.2 Snapshot 2.99.903 (2013-09-28) ============================== Lots more stabilization work, not yet peaceful enough to christen 3.0. We have everything ranging from build fixes for systems like Suse Linux Enterprise Desktop that like to backport hardware enablement to ancient packages, to fixes for hardware enabling, and some more performance tuning. * Fix VSync on Haswell. https://bugs.freedesktop.org/show_bug.cgi?id=69119 * Disable Y-tiling on gen4 - it too frequently leads to instability. https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1222203 * Disable same EDID detection based on property id - the kernel likes to reuse ids leading to a failure to detect the right modes on a monitor change. * Avoid issuing multiple DPMS requests to the same encoder (alised to multiple connectors) to avoid upsetting Haswell and leaving the screens blank. * Honour the user preferrence for the initial mode, even if they are being silly https://bugzilla.novell.com/show_bug.cgi?id=841696 * Clear the clear hint when apply DRI updates - to prevent some screenshots from GL windows being left blank. https://bugs.freedesktop.org/show_bug.cgi?id=69730 * Prevent a NULL dereference from trying to undo an non-existent buffer https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1228677 * Handle out-of-memory conditions far more gracefully. If the system is hard against the memory wall, then the kernel will start issuing SIGBUS even for CPU mmaps. Untrapped these will cause X to die. https://bugs.freedesktop.org/show_bug.cgi?id=67889 Snapshot 2.99.902 (2013-09-07) ============================== We do not condone or support Canonical in the course of action they have chosen, and will not carry XMir patches upstream. -The Management Snapshot 2.99.901 (2013-09-04) ============================== What's this? A pre-release snapshot of an upcoming 3.0 major release? What could be the big new feature about to land? SNA by default! Not only that, we also have a preview of the XMir integration patches. Whilst we consider the SNA acceleration method to be ready to take over from UXA (the current acceleration method), it still remains possible to switch over to the old method with the following xorg.conf snippet: Section "Device" Identifier "Device0" Driver "intel" Option "AccelMethod" "UXA" EndSection The promise of SNA is that it improves the user experience by providing a faster, more fluid, desktop, that is both more power efficient and less prone to crashes than UXA. If it still fails to meet your expections, please file bugs! Release 2.21.15 (2013-08-21) ============================ Some build fixes for the BSDs and alternate compiler, and conflicting configure options and a critcial fix for some PRIME setups. * Don't fail to configure if DRI1 is not available and the user asks for both DRI and KMS-only [Regression from 2.21.14] * Lots of miscellaneous fixes for older gcc, other compilers and BSD. * Initial framework support for hosted X. * Improve transition from fbcon to X with multiple outputs and extended desktops. * Ensure the framebuffer exists before checking it against the CRTC constraints. https://bugs.launchpad.net/ubuntu/+source/xorg-server/+bug/121234 [Regression from 2.21.10] * Add RGB overlay support for Ironlake and later. * Don't release the overlay buffer too early, i.e. before the client disables the Xv image. * Tweak the ring switching logic to reduce use of semaphores on Sandybridge and later - a delicate balancing act between trying to use the faster engine for the task and preventing concurrent use of multiple rings. Release 2.21.14 (2013-08-04) ============================ A few updates for the top-end Haswell systems (notably GT3 and GT3e systems), in particular, setting the appropriate thread counts for the larger GPU and handling a few scaling issues with the emedded DRAM. More important than the performance tuning though is a fix for a critical issue encountered by a few people on gen4/gen5 systems. * Initial performance tuning for HSW:GT3e * Fix a crash with Planetary Annihilation * Disable triple buffering for compositors * Reserve space in the exec buffer array for deferred VBOs. https://bugs.freedesktop.org/show_bug.cgi?id=67504 Release 2.21.13 (2013-07-27) ============================ A minor release to repair the build for non-Linux systems, and to undo a few more regressions. * Avoid potential memory corruption with allocations of very small depth 1 bitmaps. * Fix source clipping whilst computing copy extents and exposures. [Regression from 2.21.12] https://bugs.freedesktop.org/show_bug.cgi?id=66970 * Use /proc/cpuinfo if cpuid4 is not available (old hardware or old gcc), and repair the build on systems without cpuid. [Regression from 2.21.12] * Fix performance regression on Ironlake from inadvertently flushing after every operation. [Regression from 2.21.11] https://bugs.freedesktop.org/show_bug.cgi?id=67157 * Fix conflict handling when probing initial KMS configuration for ZaphodHeads. [Regression from 2.21.11] https://bugs.freedesktop.org/show_bug.cgi?id=67176 * Stop being overly restrictive and rejecting stale DRI2 buffers. (DRI2 is inherently racy in that the client may have completed and submitted rendering to buffers that are now invalid on the server. This race is magnified by bugs within the Xserver where it forgets to notify the DRI2 clients of certain invalidation events.) https://bugs.freedesktop.org/show_bug.cgi?id=67210 * Handle a failure to use a GTT mmap for a pixmap upload and try an alternative method before giving up. Release 2.21.12 (2013-07-14) ============================ In this release, we clear up the teething troubles from preserving the KMS configuration, notably external connections on Haswell and plugging in new outputs after startup were broken. Besides these regression fixes, there are a couple of fixes for some long standing issues, such as incorrect rendering on gen2, an infinite loop with very, very large pixmaps and a slight improvement to the tempermental gen4. * Allow untiled scanouts again (required for large extended desktops on gen2 and gen3). [Regression from 2.21.11] * Use the correct count of the number of dirty damage boxes for the quick check on whether the existing damage contains the requested area. The danger is that we may get a false result and skip migration and so cause pixmap corruption (in the unlikely event that the application frequently causes fallbacks). [Regression from 2.21.11] https://bugs.freedesktop.org/show_bug.cgi?id=66430 * Fix initial connection probing for multi-function encoders, such as the external connections on Haswell. [Regression from 2.21.11, initial connection probing] https://bugs.freedesktop.org/show_bug.cgi?id=66488 * Fix gen2 rendercopy into a8 surfaces, for example, glyph uploads into the glyph cache. * Fix detection of user overrides for initial connection configuration. The code used the xorg-server-1.15 values, having missed the introduction of ZoomModes into that release. [Regression from 2.21.11, initial connection probing] * Always initialise the gamma ramp, even on unconnected CRTCs. https://bugs.freedesktop.org/show_bug.cgi?id=66563 [Regression from 2.21.11, initial connection probing] * Some more tuning of the gen4 vertex corruption workaround. The root cause behind the GPU using incorrect texture coordinates is still not solved, but by reducing the maximum number or rectangles in flight through the GPU we reduce the likelihood of corruption. * Fix compilation with gcc-4.5 [Regression from 2.21.11] * Avoid integer overflow when performing tiled uploads and operations on very large (>28k pixels wide or tall pixmaps) https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1200766 Release 2.21.11 (2013-06-30) ============================ An eventful week. What started with a regression with some builds of firefox on some machines lead ultimately to the discovery of an older kernel bug. Aside from the work to fix the image bug and a few other older bugs that were reported and resolved this week, there is also a (hopefully) subtle change to the initial configuration of displays. In the absence of user overrides in xorg.conf, the DDX will try to preserve the same display configuration as used by the kernel, which hopefully will be the same configuration as setup by the BIOS. The result should be a boot sequence that does not resize at all (aka fastboot) - until the display manager takes over and loads a completely different configuration! * Add reference counting of drmMaster for ZaphodHeads https://bugs.freedesktop.org/show_bug.cgi?id=66041 * Add a GPU flush before changing blend modes on Ironlake https://bugs.freedesktop.org/show_bug.cgi?id=51422 * Fix occasional missing images for inplace uploads [regression from 2.21.10] https://bugs.freedesktop.org/show_bug.cgi?id=66059 * Add missing utility files to the tarball and remove a few unused ones * Initialise PolyPoint operand state before calling miWideDash https://bugs.freedesktop.org/show_bug.cgi?id=66104 * Fix redirection handling for rendering into large surfaces https://bugs.freedesktop.org/show_bug.cgi?id=66168 https://bugs.freedesktop.org/show_bug.cgi?id=66249 * Fix compilation of UXA with xorg-xserver < 1.10 [regression from 2.20.0] * Fix consideration of gradients for deciding when to migrate render operations [performance regression from 2.21.10, the bug itself is older] https://bugs.freedesktop.org/show_bug.cgi?id=66297 Also fixed this week was: commit 22fd5ca947b58901927d100d2b1aa0f1672b3435 Author: Chris Wilson Date: Fri Jun 28 16:54:08 2013 +0100 drm/i915: Only clear write-domains after a successful wait-seqno which affects kernels 3.7 - 3.10, coming to a stable kernel near you soon. Release 2.21.10 (2013-06-22) ============================ Fixes missing support for Xv (with the textured video adaptor) on Haswell, and an old bug with wide monitors on various generation. Along with a few other regression fixes and performance tweaks for various corner cases. * Do not lose track of fast pageflips across mode changes [regression from 2.20.8] * Fix listing of Visuals for Xv [regression from 2.21.8] https://bugs.freedesktop.org/show_bug.cgi?id=65479 * Improve coherency of concurrent CPU accesses to a pixmap https://bugs.freedesktop.org/show_bug.cgi?id=61628 * Set sampler swizzling for textured video on Haswell https://bugs.freedesktop.org/show_bug.cgi?id=65699 * Apply scanout stride limits https://bugs.freedesktop.org/show_bug.cgi?id=65099 * Undo the self-copy for cloned pixmaps for loimpress's animations [regression from 2.21.7] https://bugs.freedesktop.org/show_bug.cgi?id=65665 Release 2.21.9 (2013-06-06) =========================== Consolidating the copy-on-write support, hopefully cleaning up the last of the regressions. * Restore vsync on textured videos. [regression from 2.21.8] https://bugs.freedesktop.org/show_bug.cgi?id=65048 * Fix incorrect ordering of possible_clones with certain outputs, which can lead to attempting to incorrectly clone 2 outputs and failing to light them up. [regression from 2.20.10] * Fix performance regression from not promoting large fills to the GPU [regression from 2.21.7] * Undo the pixmap clone before performing a DRI2CopyRegion [regression from 2.21.7] https://bugs.freedesktop.org/show_bug.cgi?id=65250 Release 2.21.8 (2013-05-27) =========================== A quick release to cleanup a few regressions from the introduction of copy-on-write support, notably hitting wine applications and a memory leak for firefox. * Only mark a PolyFillRect operation as replacing if it is unclipped https://bugs.freedesktop.org/show_bug.cgi?id=64841 * Prevent potential NULL dereference of damage when checking COW support * Fix invalidation of clone after dirtying the pixmap via the CPU * Prevent discarding an operation before requiring it for a fallback * Fix memory leak from replacing the clone under certain circumstances https://bugs.freedesktop.org/show_bug.cgi?id=64978 Release 2.21.7 (2013-05-21) =========================== A couple of weeks turned into a month and a couple of weeks... Amidst the usual bug fixes, we have added the complete set of Haswell PCI IDs - hopefully future proofing ourselves against being surprised by new products. We can also now use the correct term for the top of the range Haswell variants, GT3. * Fix several assertion failures hit by Jiri Slaby. * Allow XvMC to also target overlay/sprite planes. * Throw in a paranoid MI_FLUSH between BLT and RENDER operations on Ironlake. https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1168066 * Prevent reuse of old framebuffers after a resize. https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1157678 * Fix compilation with --enable-valgrind and no --enable-debug * Improve partial migration of render sources. * Fix origin of trapezoids. https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1178020 * Introduce copy-on-write support for cloning pixmaps. The ultimate goal here is to efficiently support the TearFree mode of operation, but this provides immediate benefits with firefox - most importantly because of the inefficient way it now implements scrolling. Release 2.21.6 (2013-04-06) =========================== A surprising highlight of this release is a little refresh to the KMS support for OpenBSD. OpenBSD now has its own KMS implementation which is mostly compatible with the interface in Linux, with one or two tweaks supplied by Mark Kettenis. This release continues to cleanup behaviour for Haswell. * Workaround a failure by the xserver to invalidate DRI buffers following a pixmap change for XComposite redirection. https://bugs.freedesktop.org/show_bug.cgi?id=62614 * Fix computation of clip extents for stippling https://bugs.freedesktop.org/show_bug.cgi?id=62618 * Support KMS on OpenBSD, by Mark Kettenis * Clean up sockets upon CloseScreen (making ourselves better behaved for muxed setups). * Fix the tests for AVX/AVX2 support in CPUID and remember to check for OS support as well. * Report a monotonic UST value for undisplayed drawables rather than 0 by Daniel Kurtz * Fix video playback on gen4 through a complex clip (more gen4 GPU woes) https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1162046 Release 2.21.5 (2013-03-21) =========================== Haswell reintroduces a command to load the scanline window from the command stream and so requires its own specialised wait-for-vsync routine - failure to do so was then causing hangs when trying to do tearfree video or use a compositor. * Prevent buffer leak if a non-fullscreen Window is closed with multiple pending swap events. * Fix offset transformation for fallback gradient paths. https://bugs.freedesktop.org/show_bug.cgi?id=62198 * Prevent Glamor from crashing if misconfigured. Thanks to Michel Dänzer. * Prevent UXA from crashing if torn down during PreInit. Thanks to Aaron Plattner. * Prevent miscompilation with different functional units having different compiler flags. Some functions were expected to be inlined and so recompiled with the current target. However, some compilers were choosing to emit subroutine calls instead without noticing that the ABI was different between the caller and callee - causing corruption. https://bugs.freedesktop.org/show_bug.cgi?id=62198 * Fix rendering of CompositeTriFan with recent Xorg. * Apply the video src-offset fix highlighted in the last release! A typo prevented the fix from working for gen4+. https://bugs.freedesktop.org/show_bug.cgi?id=62343 * Fix rendering of multiple glyphs to very large destination surfaces https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1156387 * Fix scanline waits for Haswell https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1156679 Release 2.21.4 (2013-03-11) =========================== More bugs, more fixes, more releases. A minor new feature being introduced is the runtime detection of CPU instructions sets along with specialised paths to take advantage of the available CPU. * Honour LinearFramebuffer for clumsy PowerXpress integration * Disable read-read optimisations of mappings whilst the root cause of a corruption issue remains elusive. https://bugs.freedesktop.org/show_bug.cgi?id=61628 * Disable 8-bpp framebuffers in UXA as the regressions therein remain unfixed. * Restart vertex checks after lock contention https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1124576 * Handle Screen Pixmap recreation whilst exported via PRIME. * Correct application of scale factors to video source offsets. https://bugs.freedesktop.org/show_bug.cgi?id=61610 * Chain up CloseScreen so that resources are actually freed across regen https://bugs.freedesktop.org/show_bug.cgi?id=56608 * Fix Haswell CRW PCI-IDs * Handle batch submission failure during DRI copies https://bugs.freedesktop.org/show_bug.cgi?id=61708 * Probe for kernel support of requested Screen depth https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1135403 * Correct GPU limits for early gen2 and gen3 architectures and prevent an infinite recursion for particular image sizes. Release 2.21.3 (2013-02-20) =========================== A few minor bugfixes, another point release. * Fix tracking of DRI pixmaps and their backing bo across reparenting. If we tried to execute a SwapBuffers after a Window was reparented, but before the DRI client has updated its references, then we would end up manipulating an exported pixmap without a flush flag set. In the worst case, this would culminate in a segfault in the driver. https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1127497 * Restore the gen4 workarounds for flickering rendering - a few cases still remain, as the root cause persists. https://bugs.freedesktop.org/show_bug.cgi?id=60402 * Double check that the device has KMS enabled before claiming. This allows X to gracefully fallback to VESA/fbdev rather than bailing out. https://bugs.freedesktop.org/show_bug.cgi?id=60987 * Fix the UXA render programs for projective transforms on Ivybridge. Release 2.21.2 (2013-02-10) =========================== Pass the brown paper bags, I need half a dozen or so. That seemingly innocuous build fix with xorg-1.13 happened to have the little side-effect of breaking glyph rendering with xorg-1.12 and older on 64-bit machines. Release 2.21.1 (2013-02-10) =========================== A fix for a potential GPU hang on 945gm (GMA950) and earlier chipsets, along with backporting SNA to the packages found in stable distributions like Debian 6.0 (Squeeze). * Cleanup compilation warnings from deblint, thanks to Paul Menzel * Minor build improvements by Damien Lespiau. * Disable generating span geometry for non-rectilinear spans on gen4 in order to work around and prevent one class of render corruption. * Prevent cache thrashing and severe performance degradation on LLC machines for streaming texture updates. However, note the effect was only observed on just one particular laptop. * Fix alignment of subsurface proxies for old chipsets. https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1120108 * Repair build against Xserver-1.6 and contemporary packages. Release 2.21.0 (2013-02-01) =========================== A few new features: * Enable render acceleration for Haswell GT1/GT2. * Enable multi-threaded rasterisation of trapezoids and fallback composition * Utilise a new kernel interface (v3.9) for processing relocations along with a few older features from the 2.20.x series: * PRIME support for hotplug GPUs and hybrid systems * Support for IvyBridge GT1 machines, aka HD2500 graphics. * Stable 830gm/845g support, at last! As usual we have a large number of bug fixes since the last release: * Prevent a stray relocation being left after a buffer is removed from a batch, leading to GPU hangs. * Make the driver more robust against its own failures to submit batches by falling back to software rendering. * Fix emission of scanline waits for secondary pipes on gen6/7. Otherwise you may encounter GPU hangs in MI_WAIT_FOR_EVENT. * Fix a missing corner pixel when drawing rectangles with PolyLines https://bugs.freedesktop.org/show_bug.cgi?id=55484 * Don't try to use Y-tiling colour buffers with mesa/i915c as mesa doesn't support them and wil fallback to software rendering * Ensure that any cached mmaps are invalidated for a SwapBuffers https://bugs.freedesktop.org/show_bug.cgi?id=60042 * Correctly handle the composition of rotated displays too large for the 3D pipeline https://bugs.freedesktop.org/show_bug.cgi?id=60124 * Fix the computation of the planar video frame size https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1104180 Release 2.20.19 (2013-01-20) ============================ A quick release as the last broke USB DisplayLink slave outputs badly. The performance of those displays was unusable due to an inadvertent change that caused us to flush the entire scanout over the USB for every drawing operation. * Implement the GNOME Build API. A couple of minor changes to make integrators and distributors lives a little easier, or at least more consistent. * Correctly offset inplace trapezoids for subwindows, such as the GTK+ close button after it has a background image uploaded. * Explicitly prevent ring-switching for synchronized rendering to scanouts (for vsync). * Clip dirty region to slave pixmaps (otherwise UDL is nigh unusuable) https://bugs.freedesktop.org/show_bug.cgi?id=59539 Release 2.20.18 (2013-01-16) ============================ A bunch of miscellaneous fixes for assertion failures and various performance regressions when mixing new methods for offloads, along with a couple of improvements for rendering with gen4. * Remove use of packed unnormalized texture coordinates on gen4/5 as these GPUs do not support unnormalized coordinates in the sampler. * Remove dependency upon x86 asm for cross-building to unsupported architectures. https://bugs.gentoo.org/show_bug.cgi?id=448570 * Apply damage around PRIME updates in the correct order. * Correctly read the initial backlight level for when the user overrides UXA's choice of backlight controller. * Throttle UXA and prevent it queuing work much faster than the GPU can complete it. This realised itself in impossible performance figures and the entire display freezing for several seconds whlist the GPU caught up. One side effect is that it also caused the DDX to consume more memory than was required as it could not recycle buffers quick enough, and in some cases this produces a marked improvement in performance. Also note on gen2/3 this requires a new libdrm [2.4.41] in order to prevent a bug causing the DDX to fallback to swrast. Release 2.20.17 (2012-12-26) ============================ A minor update to prepare for co-operating with the kernel over managing stability on 830gm/845g. On this pair of chipsets, the kernel will perform an extra copy of the batchbuffer into reserved memory, which prevents them from randomly dying. However, that extra copy does have a noticeable impact upon throughput, so we also have a mechanism for userspace to opt-out of the kernel workaround and take responsibility for ensuring its batches are coherent. * Build fixes against xorg-1.14 https://bugs.freedesktop.org/show_bug.cgi?id=58552 https://bugs.freedesktop.org/show_bug.cgi?id=58406 * Fixed the origin of cropped (textured) video windows (Xv and XvMC) https://bugs.freedesktop.org/show_bug.cgi?id=23033 * Fix potential corruption when using images larger than ~1GiB Release 2.20.16 (2012-12-15) ============================ Rejoice! We have found a trick to make 830gm/845g stable at long last. Ever since the switch to GEM and dynamic video memory, those early second generation chipsets have been plagued by instability. The lack of flushing cachelines from the CPU to GMCH was eventually solved by using an undocmented bit, but 830/845 were still hanging under memory pressure. These deaths were all due to garbage finding its way into the command streamer, and they go away if we take a leaf out of the original driver and never reuse those pages for anything else. So for the first time ever, I have been able to complete running the test suite on an 845g, even whilst thrashing the page and buffer caches! * Run the SF stage as single-threaded on gen4 to workaround a few issues https://bugs.freedesktop.org/show_bug.cgi?id=57410 * Keep the scanout SURFACE_STATE separate to avoid overriding its memory access control on gen6/7 (i.e. writes to the scanout need to be kept out of the render cache) * Tune batch flushing after an operation to an exported surface under a compositor. * Make sure the source is on the CPU for inplace composition of trapezoids using the CPU https://bugs.freedesktop.org/show_bug.cgi?id=56825 * Immediately flush in the block hander after a split batch to reduce latency between the two halves of an operation. https://bugs.freedesktop.org/show_bug.cgi?id=51718 * Install a fallback config if we fail to install the desired config at VT switch (i.e. booting, after resume with 3 incompatible pipes on Ivybridge) * Pin batches to avoid CS incoherence on 830/845 https://bugs.freedesktop.org/show_bug.cgi?id=26345 Release 2.20.15 (2012-12-03) ============================ And lo, enabling more of the common acceleration paths for gen4 revealed another lurking bug - something is wrong with how we prepare Y-tiling surfaces for rendering. For the time being, we can surreptiously disable them for gen4 and avoid hitting GPU hangs. * Avoid clobbering the render state after failing to convert the operation to use the blitter. https://bugs.freedesktop.org/show_bug.cgi?id=57601 * Disable shadow tracking upon server regeneration, and so fix a crash if you restart the server whilst a RandR transform (e.g. rotation) is in effect. https://bugs.freedesktop.org/show_bug.cgi?id=52255 https://bugs.freedesktop.org/show_bug.cgi?id=56608 Release 2.20.14 (2012-11-26) ============================ The highlight of this release is gen4, from 965g to gm45. Quite an old bug surfaced in the shader assembly, sparking a chance to review a few design choices within that backend and experiment on fresh ways to workaround the remaining issues. * Avoid using inplace XOR'ed uploads for very large buffers https://bugs.freedesktop.org/show_bug.cgi?id=57031 * Fix the gen4/5 opacity shader https://bugs.freedesktop.org/show_bug.cgi?id=57054 * Queue a pending vblank request after flip completion https://bugs.freedesktop.org/show_bug.cgi?id=56423 * Avoid migrating an uninitialised pixmap for use as a render source https://bugs.freedesktop.org/show_bug.cgi?id=47597 * Improve handing of texture fallbacks for 830/845. https://bugs.freedesktop.org/show_bug.cgi?id=57392 Release 2.20.13 (2012-11-11) ============================ Nothing but bug fixes. Many thanks to everyone who took the time to report their issues, and for their help in improving the driver. * Sanity check the platform probe points to our expected i915 device https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1069031 * Prevent 16-bit overflow for computing the sample area to upload of sources for render operations https://bugs.freedesktop.org/show_bug.cgi?id=56324 * Clamp the drawable box for migration to prevent 16-bit overflow https://bugs.freedesktop.org/show_bug.cgi?id=56591 * Disable RandR hotplug events if Xinerama is enabled and thereby prevent a crash upon hotplug https://bugs.freedesktop.org/show_bug.cgi?id=55260 * Call ValidatePicture before attempting to flatten the alphamaps https://bugs.freedesktop.org/show_bug.cgi?id=56367 * Clip the trapezoid correctly if it ends on the boundary pixel https://bugs.freedesktop.org/show_bug.cgi?id=56395 * Make sure the pipeline choice is propagated to the scanline wait across a batch flush https://bugs.freedesktop.org/show_bug.cgi?id=47597 * Set the valid drawable box when choosing placement of BLT composite ops https://bugs.freedesktop.org/show_bug.cgi?id=47597 * Prevent use-after-free when promoting a partial-GPU bo to a full-GPU bo https://bugs.freedesktop.org/show_bug.cgi?id=56591 * gen4 opacity spans require the per-rectangle workaround https://bugs.freedesktop.org/show_bug.cgi?id=55500 * Prevent use of invalid damage pointers when redirecting rendering https://bugs.freedesktop.org/show_bug.cgi?id=56785 Release 2.20.12 (2012-10-20) ============================ More bug reports, more bug fixes! Perhaps the headline feature is that with a secure batches, coming to a 3.8 kernel near you, we may finally have the ability to perform updates to the scanout synchronized to the refresh rate on later SandyBridge and IvyBridge chipsets. It comes at quite a power cost as we need to keep the GPU out of its power saving modes, but it should allow legacy vsync to function at last. But this should allow us to address a longstanding issue with tearing on SandyBridge+. * Fix component-alpha rendering on IvyBridge, for example subpixel antialiased glyphs. https://bugs.freedesktop.org/show_bug.cgi?id=56037 * Flush before some "pipelined" state changes on gen4. The evidence is that the same flushes as required on gen5+ are also required for gen4. https://bugs.freedesktop.org/show_bug.cgi?id=55627 * Prevent a potential crash when forcing a stall on a busy CPU bo https://bugs.freedesktop.org/show_bug.cgi?id=56180 [Release 2.20.11 contained a typo causing UXA to fail immediately.] Release 2.20.10 (2012-10-14) ============================ The last couple of weeks have been fairly retrospective, a dive into prehistory tidying up the earlier generations which lay languishing as the core progressed and lead to a number of annoying core bugs being fixed. * Release DRM master earlier during shutdown so switching between multiple X servers works automatically. https://bugs.freedesktop.org/show_bug.cgi?id=55446 * Suppress error propagation from DRI2GetMSC and behave as if the pipe was simply off to avoid unexpected errors in the clients https://bugs.freedesktop.org/show_bug.cgi?id=55395 * A few fixes to i8xx batch emission, ensuring that the GPU is always in a valid state. https://bugs.freedesktop.org/show_bug.cgi?id=55455 * Prevent a use-after-free during UXA shutdown due to inspecting the glamor flags after the glamor interface had been freed. * Prevent a crash combining TearFree and rotations. https://bugs.freedesktop.org/show_bug.cgi?id=55527 * Correct a missing damage upload along PutImage after using the CPU bo as a source for the GPU. https://bugs.freedesktop.org/show_bug.cgi?id=55508 * Fix compilation for older glibc without O_CLOEXEC https://bugs.freedesktop.org/show_bug.cgi?id=55577 * Fix out-of-tree builds failing to recompile the gen4 assemblies https://bugs.freedesktop.org/show_bug.cgi?id=55645 * Fix non-standard build host configuration handling for intel-gen4asm https://bugs.freedesktop.org/show_bug.cgi?id=55646 * Fix a potential batch buffer overflow when replacing the last BLT fill operation with a copy https://bugs.freedesktop.org/show_bug.cgi?id=55700 * Flush the render pipeline more frequently on Ironlake as not all pipelined state changes are. https://bugs.freedesktop.org/show_bug.cgi?id=51422 * Detect when we need to read the destination for the background raster op during fallbacks. https://bugs.freedesktop.org/show_bug.cgi?id=55810 * Avoid a potential deference of an invalid CPU mmap after doing an inplace tiled upload. https://bugs.freedesktop.org/show_bug.cgi?id=55812 * Prevent sign extension when packing the upload data for CopyPlane https://bugs.freedesktop.org/show_bug.cgi?id=55823 * Fix some render corruption with a UDL slave output and pageflipping Release 2.20.9 (2012-09-29) =========================== And so it came to pass that a critical bug was uncovered in UXA. The kernel does not like to pageflip when the pipe is off, yet due to the delayed nature of a pageflip and the relaxed checking performed by UXA, we could request a pageflip after turning off the display (DPMS). The kernel rejected that pageflip and the error handling path failed to restore sanity, and when the screen came back it was stuck on the image seen before it went to sleep. (Note that there are also some related kernel bugs, but this update should prevent the most conspicious of the freezes.) Many thanks to Timo Aaltonen for his efforts in tracking down the issue. In other news: * Prepare for xorg-1.14, the api is being tweaked again. * Handle early FreeScreen in UXA. https://bugs.freedesktop.org/show_bug.cgi?id=55346 * Reenable XvMC support * Do not replace the GPU bo when uploading into the shadow/CPU copy https://bugs.freedesktop.org/show_bug.cgi?id=54978 * Fix use of an uninitialised GC when drawing glyphs to a depth=1 pixmap Release 2.20.8 (2012-09-16) =========================== Another new small feature, another new release. And a few more bugs fixed as well! But what is this new feature, do I hear you ask? Why, it is nothing less than enabling the ValleyView SDV! The lucky person to have their hands on one will now be able to enjoy X in full TechniColor. For the rest of us, a few more bugs were fixed with interesting combinations of software and rendering patterns. * Add an extra layer of defence against trying to use a non-GEM device with UXA. This should already be taken care of with the new probe, but the extra sanity check already existed in the code but was doing nothing. https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/962892 * Fix computation of valid CRTCs bitmask for ZaphodHead Some systems can only handle certain outputs on certain pipes (Screens), and this information was not being propagated through to X and randr correctly, breaking valid configurations and not detecting invalid configurations correctly. * Disable global glyph caching with ZaphodHeads. The glyph privates need to be Screen private, but at the moment are global leading to conflicts and invalid rendering with multiple heads. https://bugs.freedesktop.org/show_bug.cgi?id=54707 * Prevent direct read back of unmappable buffers https://bugs.freedesktop.org/show_bug.cgi?id=54808 * Tile large uploads whilst replacing the alpha channel https://bugs.freedesktop.org/show_bug.cgi?id=54808 * Correct the source offset when converting a RENDER composite operation into a BLT composite operation. https://bugs.freedesktop.org/show_bug.cgi?id=54868 * Correct a minor typo in flattening alphamaps which caused the replacement pixmap to often end up with a height of zero. https://bugs.gentoo.org/show_bug.cgi?id=434860 * Don't discard the CPU damage if only part of is being replaced. This is most evident when combining software renders like Opera with accelerated rendering. https://bugs.freedesktop.org/show_bug.cgi?id=54937 Release 2.20.7 (2012-09-08) =========================== Continuing the flurry of releases, this week saw the release of xorg-1.13 bringing with it the first steps towards hotpluggable gpu support and the ability to offload DRI rendering onto other GPUs. In light of that advance, this release includes the support code by Dave Airlie to integrate PRIME into xf86-video-intel and make those new features available. Aside from landing PRIME, a few other bugs were fixed since 2.20.6: * Fix framebuffer leak on server regeneration * Fix texture cache flushing on IvyBridge and Kwin with plastique https://bugs.freedesktop.org/show_bug.cgi?id=54488 * Redirect large solid fills on SandyBridge+. By large I mean greater than 8192 or 16384 pixels on SandyBridge and IvyBridge respectively. https://bugs.freedesktop.org/show_bug.cgi?id=54134 * Fix up backlight option handling in the manpage and uxa. https://bugs.freedesktop.org/show_bug.cgi?id=54397 * Unbreak ZaphodHeads. https://bugs.freedesktop.org/show_bug.cgi?id=52438 Release 2.20.6 (2012-09-02) =========================== A serious bug that caused a crash on SandyBridge and IvyBridge when mixing CPU and GPU operations on the same buffer, and an annoyance from bad scheduling of windowed swapbuffer updates causing low framerates and jitter. Plus the usual smattering of assertion fixes and a long standing issue with incoherent page access to a streaming buffer. * Low frame rates in Blobby Valley when "fullscreen" https://bugs.freedesktop.org/show_bug.cgi?id=54274 * Incoherent concurrent access with the CPU and GPU https://bugs.freedesktop.org/show_bug.cgi?id=51422 https://bugs.freedesktop.org/show_bug.cgi?id=52299 * Add Option "Backlight" to override automatic selection of the backlight interface. * Avoid overwriting the composite operation info when testing if we can transfer the operation to the BLT. Release 2.20.5 (2012-08-26) =========================== Another silly bug found, another small bugfix release. The goal was for the driver to bind to all Intel devices supported by the kernel. Unfortunately we were too successful and started claiming Pouslbo, Medfield and Cedarview devices which are still encumbered by propietary IP and not supported by this driver. Bugs fixed since 2.20.4: * Only bind to Intel devices using the i915 kernel module * Regression in the bitmap-to-region code, e.g. icewm window buttons https://bugs.freedesktop.org/show_bug.cgi?id=53699 Release 2.20.4 (2012-08-18) =========================== Continuing the small bugfix releases, the only real feature is initial enabling for Haswell for the purpose of rendering verification and validation - by no means is it complete! Bugs fixed since 2.20.3: * Some potential errors along failure paths found by a static analyser with the help of Zdenek Kablac. * Eliminate zero-sized rectangles from PolyFillRectangles as the code assumes that they did not exist and so caused corruption. * Remove the UXA warning for failing to tile the front buffer if it is disallowed by hardware, and so expected. * Fix the validation of the XV pipe parameter. * Fix 8x8 tiled pattern fills https://bugs.freedesktop.org/show_bug.cgi?id=53353 * Fix compile failure when using --with-builderstring * Restore w/a flush for gen4 fill/copy/video, fortunately rare operations as at least for fill/copy we prefer to use the BLT. https://bugs.freedesktop.org/show_bug.cgi?id=53119 * Restore preferred use of the RENDER ring for SNB+ DRI copies. Release 2.20.3 (2012-08-04) =========================== Just a minor bugfix for gen4 chipsets (965gm, gm45 and friends) that crept into 2.20.2. As an added bonus, the pessimistic workaround for a GPU hang on gen4 has been relaxed and the shaders have been overhauled which should pave the way to eliminating the last of the uncommon CPU operations, along with immediately realising a small perforamnce improvement. Bugs fixed since 2.20.2: * Update DPMS bookkeeping after modeset https://bugs.freedesktop.org/show_bug.cgi?id=52142 * Avoid overlapping gpu/cpu damage after ignoring cpu damage in the consideration of placement for the operation. * Enable acceleration by default on 830gm/845g. The GMCH on this pair of chipsets is notoriously incoherent, so the GPU is almost certainly going to hang at some point, though unlikely to hang the system and should automatically disable acceleration (and thence behave identically as if the acceleration was disabled from the start). Option "NoAccel" can be used to disable all 2D acceleration and Option "DRI" can be used to disable all 3D acceleration. https://bugs.freedesktop.org/show_bug.cgi?id=52624 * Fix vertex bookkeeping for gen4 that was causing corruption in the command stream. Release 2.20.2 (2012-07-27) =========================== For the last 9 months, since 2.16.901, we have been shipping a driver that does not work on IvyBridge GT1 systems (HD2500 graphics); we were telling the GPU to use an invalid number of threads for the pixel shader and this in turned caused the GPU to hang. Also fixed since the last release just a few days ago: * Support for the gmux backlight controller on Apple laptops https://bugs.freedesktop.org/show_bug.cgi?id=52423 * Fix X -configure not to list this driver as matching any Intel device, just the VGA class devices will do! * A crash in SNA when repeatedly switching xrandr rotations * Corruption in SNA observed in kwin on IvyBridge https://bugs.freedesktop.org/show_bug.cgi?id=52473 Release 2.20.1 (2012-07-22) =========================== A week in, grab the brown paper bags, for it is time to reveal a couple of critical bugs that spoilt the 2.20.0 release. Firstly we have the restoration of DRI for i810. I am sure that the solitary user will be overjoyed in a couple of years when a new xserver is forced upon him. That enjoyment will be short-lived when as no actual acceleration remains, not even shadow, for the chipset. Perhaps a little more wildly felt, I hope!, will be that the SNA fallbacks were broken on 64-bit machines if they required clipping. One little misplaced cast of a pointer, and the screen is filled with corruption. Among the other tweaks this week: * A bug affecting gen4 handling of trapezoids was fixed, and CPU overhead reduced. https://bugs.freedesktop.org/show_bug.cgi?id=52158 * A fix for a bug causing corruption of a DRI2 unredirected client window that was resized whilst under a compositor. * Support for snoopable buffers on non-LLC architectures, coming to a future kernel. The aim to accelerate transfers between the CPU and the GPU, in particular to dramatically improve readback performance, and to further minimise clflushes. * Improvement to the composite performance on GT2 SandyBridge and IvyBridge devices, in particular the render copy is significantly improved. * Improved handling for when acceleration is disabled, including permitting DRI2 to remain supported even if the X server believes the GPU wedged. * Shadow support was dropped from UXA as it was neither complete nor correct, use SNA instead. Release 2.20.0 (2012-07-15) =========================== First the big news, a new acceleration method that aims to be faster and consume far less CPU than UXA is now available for selection at runtime. This snazzy new architecture can be selected through use of Option "AccelMethod" "sna" in your xorg.conf. Whilst it has been under development for some time, it has not yet had the same degree of widespread testing of UXA, so tread lightly. Try it and if you spot anything that can be improved, please do report a bug. Otherwise we have the usual smattering of bug fixes for UXA: * Use a white source whilst adding glyphs to the glyph mask (This fixes blank glyphs if using a font that mixes ARGB and A glyphs.) * Avoid fallbacks for glyph-to-dst in e.g. gnome-terminal https://bugs.freedesktop.org/show_bug.cgi?id=50508 * Force unused outputs off when VT switching https://bugs.freedesktop.org/show_bug.cgi?id=50772 * Copy the fbcon across to the Screen pixmap at startup. (This patch has been kicking around in the distributions for years.) * Many missed malloc failures checks and forgotten frees found by a static analyzer. Thanks Zdenek Kabelac! * Leak of the back buffer when terminating an application after pageflipping https://bugs.freedesktop.org/show_bug.cgi?id=50670 * Double check that the pipe is on before emitting a WAIT_ON_EVENT. In conjunction with an uptodate kernel, this should eliminate any hangs when changing resolutions or adding/removing displays. https://bugs.freedesktop.org/show_bug.cgi?id=50668 * Update to new Xorg APIs. Future proofing for the next generation of hotplug Xorg display servers. Many thanks to everyone who has reported a bug and otherwise helped to improve the driver. Release 2.19.0 (2012-04-29) =========================== More stability fixes for UXA and support for another variant of IvyBridge. Given the severity of the stability fixes, I strongly recommend everybody to upgrade to 2.19.0. * Prevent waiting on scanlines whilst not in control of the VT and therefore whilst referencing foreign CRTC configurations. * Pixmap (and bo leak) during fallback glyph composition * Remove broken acceleration for rendering glyphs directly upon the destination pixmap, exposed by cairo-1.12.0 (and coincidentally fix another Pixmap leak upon fallback handling). * Add support for Ivy Bridge GT2 Server chipset [PCI id 0x016a] * Remove broken damage flushing with CompositeRectangles https://bugs.freedesktop.org/show_bug.cgi?id=32547 * Fix crash upon server start with multiple monitors https://bugs.freedesktop.org/show_bug.cgi?id=47395 * Fix composition issues resulting from overly aggressive Pixmap reuse https://bugs.freedesktop.org/show_bug.cgi?id=47345 Release 2.18.0 (2012-02-24) =========================== Time passes, a few more bugs have crept out of the woodwork that are a compelling reason to update. Bugs fixed in this release (compared to 2.17.0) ----------------------------------------------- * Limit maximum object size so that all of the source, mask and destination can be mapped into the aperture simultaneously by basing the limit on the mappable aperture size rather than the size of the total GATT. * Incorrect clipping of polygons https://bugs.freedesktop.org/show_bug.cgi?id=43649 Regression from 2.15.901 * Limit number of VMA cached to avoid hitting the per-process VMA limit There still is a residual bug in that we seem to have so many objects floating around in the first place and that still leads to exhaustion of system limits. https://bugs.freedesktop.org/show_bug.cgi?id=43075 https://bugs.freedesktop.org/show_bug.cgi?id=40066 * Latency in processing user-input during continuous rendering Release 2.17.0 (2011-11-16) ============================== A few months have passed, and we have accumulated a surprising number of bug fixes. Oops! We would strongly encourage everyone to upgrade. Bugs fixed in this snapshot (compared to 2.16.902) -------------------------------------------------- * Video clobbering composite batch state http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=635953 Snapshot 2.16.902 (2011-11-13) ============================== This is the second release candidate in preparation for the upcoming 2.17.0 release. We will appreciate any feedback we can get from testing of this snapshot, and thanks to everyone who tested and reported upon issues in the last snapshot. A very old bug demonstrating that nobody has ever used alpha maps, and a couple of more recent mistakes were found. Bugs fixed in this snapshot (compared to 2.16.901) -------------------------------------------------- * Incorrect reuse of surface bindings within a batch for multiple formats https://bugs.freedesktop.org/show_bug.cgi?id=40926 * Nothing was rendered for text with procedural sources https://bugs.freedesktop.org/show_bug.cgi?id=31819 * Handle fallbacks involving alpha maps Snapshot 2.16.901 (2011-10-30) ============================== This is the first release candidate in preparation for the upcoming 2.17.0 release. We will appreciate any feedback we can get from testing of this snapshot. The basis of this release are to push out a couple of critical stability fixes for SandyBridge and IvyBridge. There is very little else to see here. Those 200+ other commits do not exist... Bugs fixed in this snapshot (compared to 2.16.0) -------------------------------------------------- * Workaround blitter hang on SandyBridge and IvyBridge https://bugzilla.kernel.org/show_bug.cgi?id=27892 https://bugs.freedesktop.org/show_bug.cgi * Workaround pipe control issues on SandyBridge * Use correct maximum PS thread count on IvyBridge * Protect against failed pixmap allocation for XV https://bugs.freedesktop.org/show_bug.cgi?id=40439 Release 2.16.0 (2011-08-09) ============================== A new quarter, a new release! The key feature of this release, looking past the bug fixes, is the enabling of IvyBridge acceleration. We have also fixed many bugs and graphical glitches and would encourage everyone to upgrade. Bugs fixed in this snapshot (compared to 2.15.901) -------------------------------------------------- * Build fix for xserver-1.7.7 Snapshot 2.15.901 (2011-07-30) ============================== This is the first release candidate in preparation for the upcoming 2.16.0 release. We will appreciate any feedback we can get from testing of this snapshot. The highlight of this snapshot is the full enabling of IvyBridge with acceleration for Render and Xv, along with handling of the shared render buffer allocations required for Mesa. Also of note is that deep-color support is enabled (for all chipsets), which allows you to drive your 30-bit monitor at its native colour depth. Bugs fixed in this snapshot (compared to 2.15.0) -------------------------------------------------- * Misuse of the Resource database causing crashes after DRI clients close https://bugs.freedesktop.org/show_bug.cgi?id=37700 * Crash on large strings https://bugs.freedesktop.org/show_bug.cgi?id=36860 * Incorrect rendering for some core drawing operations http://bugs.freedesktop.org/show_bug.cgi?id=28768 http://bugs.freedesktop.org/show_bug.cgi?id=28798 http://bugs.freedesktop.org/show_bug.cgi?id=28908 http://bugs.freedesktop.org/show_bug.cgi?id=29401 * Crash in Xv due to insufficient checks on batch space https://bugs.freedesktop.org/show_bug.cgi?id=36319 Release 2.15.0 (2011-04-14) ============================== We are pleased to announce this major release of the xf86-video-intel driver, roughly on schedule at 3 months since 2.14.0. With the many bug fixes in this release, we encourage everyone to upgrade to 2.15. The priority for this quarter has been simply to be unexciting and stabilise the driver further, seeking to capitalise upon the improvements elsewhere in the stack. Bugs fixed in this snapshot (compared to 2.14.903) -------------------------------------------------- * Turn off relaxed fencing by default for older chipsets This was continuing to destabilize those system, so for the release we disabled the feature. If you wish to help us debug this, you can re-enable the optimisation with Option "RelaxedFencing" "True". Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36147 * Build fix for xserver-1.7.7 * KDE glitches on SNB [Technically fixed in the previous snapshot, but I'm really pleased that this got fixed in time for the release!] https://bugs.freedesktop.org/show_bug.cgi?id=35808 Snapshot 2.14.903 (2011-04-11) ============================== This is the third release candidate in preparation for the upcoming 2.15.0 release. We will appreciate any feedback we can get from testing of this snapshot. There was a bit of churn since 2.14.902 as a potential fix for a performance regression was tried but had to reverted when it was found to cause glitches running Compiz on SandyBridge. Otherwise, there were just a couple of fixes for building against old xservers and running on an obscure chipset. Bugs fixed in this snapshot (compared to 2.14.902) -------------------------------------------------- * Prevent issuing an invalid scanline wait command https://bugs.freedesktop.org/show_bug.cgi?id=35576 * The 946GZ in not a 945, but a 965. https://bugs.freedesktop.org/show_bug.cgi?id=35854 * Fix tile sizes for gen2 (finally). * Allow building of recent dri2 changes against old xservers. Snapshot 2.14.902 (2011-03-29) ============================== This is the second release candidate in preparation for the upcoming 2.15.0 release. We will appreciate any feedback we can get from testing of this snapshot. As befits testing of release candidates, no major regression was found and a couple more bugs have been fixed. Bugs fixed in this snapshot (compared to 2.14.901) -------------------------------------------------- * Clients disappearing with pending swaps * Incorrect clipping of Xv output on i915 across extended desktops https://bugs.freedesktop.org/show_bug.cgi?id=35346 * Introduction of a LinearFramebuffer option. (Defaults to tiled for performance and power saving.) Snapshot 2.14.901 (2011-03-02) ============================== This is the first release candidate in preparation for the upcoming 2.15.0 release. We will appreciate any feedback we can get from testing of this snapshot. Still no further along my grandiose plans to improve Render performance, aside from the performance tuning lower in the stack, instead we have had a steady stream of bug fixes. Bugs fixed in this snapshot (compared to 2.14.0) ------------------------------------------------ * Green pixels within partially off-screen video playback https://bugs.freedesktop.org/show_bug.cgi?id=24767 * Defer creation of the glyph cache to generation startup https://bugs.freedesktop.org/show_bug.cgi?id=33412 * Incorrect maximum addresses for video decoder state https://bugs.freedesktop.org/show_bug.cgi?id=34017 * Failure to handle oversized temporary surfaces https://bugs.freedesktop.org/show_bug.cgi?id=34399 * Relaxed tiling corruption on gen2 * Crash when destroying a foreign DRI drawable https://bugs.freedesktop.org/show_bug.cgi?id=34787 Release 2.14.0 (2011-01-07) =========================== We are pleased to announce this major release of the xf86-video-intel driver, on schedule at 3 months since 2.13.0. With the many bug fixes in this release, we encourage everyone to upgrade to 2.14. The most notable feature of this release is the inclusion of acceleration support, both RENDER and XVIDEO, for Sandy Bridge; note that this requires a 2.6.37 kernel. In improving the acceleration code paths to support Sandy Bridge, we were also able to improve the performance of the general i965+ RENDER acceleration. For example on i3, glyph (aa10 and rgb10) performance is about 3x faster, as is performing small copies between windows, with the improvement becoming negligible once you hit around 100 pixels square. Snapshot 2.13.903 (2010-01-04) ============================== This is the second release candidate in preparation for the upcoming 2.14.0 release, and if no showstoppers turn up in wider testing will become the next release. Besides the usual bug fixes, we've included patches by Mario Kleiner to improve vblank handing which both improve the timing accuracy and remove a few potential races -- provided you also have the corresponding fixes in the kernel. Bug fixes --------- * Crash on hot-unpluging with an active fullscreen GL application, e.g. a compositing WM or video player https://bugs.freedesktop.org/show_bug.cgi?id=32770 * Freeze upon maximising client-side software renderers, e.g. flash. https://bugs.freedesktop.org/show_bug.cgi?id=31367 * Fix confusion over G35 generation https://bugs.freedesktop.org/show_bug.cgi?id=32478 Snapshot 2.13.902 (2010-12-10) ============================== This is the first release candidate in preparation for the upcoming 2.14.0 release. Sandybridge support should be now be ready for use, and we will appreciate any feedback we can get from this snapshot. Improving the code base for Sandybridge should also have had knock on effects for earlier chips as well, in particular Ironlake and to a lesser extent i965. New requirements compared to 2.13 --------------------------------- * Librdrm >= 2.4.23 Bug fixes --------- * Crash after failing to allocate memory https://bugs.freedesktop.org/show_bug.cgi?id=31487 * EFAULT during pwrite https://bugs.freedesktop.org/show_bug.cgi?id=29752 * Mark outputs as on and restore backlight after mode-set * A hang with i965+ with newer kernels. Snapshot 2.13.901 (2010-11-05) ============================== This is an intermediate snapshot of ongoing driver development. The primary purpose of this snapshot is to capture some recent improvements, (particularly in Sandybridge support), for further testing. Release 2.13.0 (2010-09-30) =========================== We are pleased to announce this major release of the xf86-video-intel driver, on schedule at 3 months since 2.12.0. With the many bug fixes in this release, we encourage everyone using 2.12 to upgrade to 2.13. [This release is functionally identical to the earlier 2.12.902 release candidate.] New requirements compared to 2.12 --------------------------------- * Librdrm >= 2.4.22 Bug fixes --------- * Attempt to fix infinite MI_WAIT_FOR_EVENT while watching video https://bugs.freedesktop.org/show_bug.cgi?id=28964 [Various new checks have been added to the video code here, but the bug fix hasn't yet been verified by the original reporter.] * Fix buffer-object leak https://bugs.freedesktop.org/show_bug.cgi?id=26946 * Fix memory leak on server reset * Fix crash due to unchecked pixmap allocation https://bugs.freedesktop.org/show_bug.cgi?id=29187 * Fix for video artifacts when using dualscreen https://bugs.freedesktop.org/show_bug.cgi?id=29213 * Fix for incorrect characters in gnome-terminal when using compiz https://bugs.freedesktop.org/show_bug.cgi?id=28438 * Fix for hanging, full-screen applications, (flash, compiz, etc.) https://bugs.freedesktop.org/show_bug.cgi?id=29584 * Fix selection of backlight device on multi-GPU systems https://bugs.freedesktop.org/show_bug.cgi?id=29273 * Fix to avoid crash with extremely large glyphs https://bugs.freedesktop.org/show_bug.cgi?id=29430 * Fix for eDP panels incorrectly being given only a single, valid mode https://bugs.freedesktop.org/show_bug.cgi?id=30069 * Fix GPU hang involving clipped SRC copies https://bugs.freedesktop.org/show_bug.cgi?id=30120 * Fix to compile for 1.6 series X server. * Fix to retry framebuffer allocation after an initial failure. * Fix to disable dri2 after fallbacks are forced on. Snapshot 2.12.902 (2010-09-28) ============================== This is the second release candidate in preparation for the upcoming 2.13.0 release. The comes exactly one week after 2.12.902 and includes only a handful of changes. One significant change is that the drive now requires libdrm 2.4.22 (or newer), as several people reported compilation failures of xf86-video-intel 2.12.901 with libdrm 2.4.21. Other changes include a fix to compile for the 1.6 series X server, a fix to retry framebuffer allocation after an initial failure, and a fix to disable dri2 after fallbacks are forced on. Snapshot 2.12.901 (2010-09-21) ============================== This is the first release candidate in preparation for the upcoming 2.13.0 release. We will appreciate any feedback we can get from testing of this snapshot. Bugs fixed in this snapshot (compared to 2.12.0) ------------------------------------------------ * Attempt to fix infinite MI_WAIT_FOR_EVENT while watching video https://bugs.freedesktop.org/show_bug.cgi?id=28964 [Various new checks have been added to the video code here, but the bug fix hasn't yet been verified by the original reporter.] * Fix buffer-object leak https://bugs.freedesktop.org/show_bug.cgi?id=26946 * Fix memory leak on server reset * Fix crash due to unchecked pixmap allocation https://bugs.freedesktop.org/show_bug.cgi?id=29187 * Fix for video artifacts when using dualscreen https://bugs.freedesktop.org/show_bug.cgi?id=29213 * Fix for incorrect characters in gnome-terminal when using compiz https://bugs.freedesktop.org/show_bug.cgi?id=28438 * Fix for hanging, full-screen applications, (flash, compiz, etc.) https://bugs.freedesktop.org/show_bug.cgi?id=29584 * Fix selection of backlight device on multi-GPU systems https://bugs.freedesktop.org/show_bug.cgi?id=29273 * Fix to avoid crash with extremely large glyphs https://bugs.freedesktop.org/show_bug.cgi?id=29430 * Fix for eDP panels incorrectly being given only a single, valid mode https://bugs.freedesktop.org/show_bug.cgi?id=30069 * Fix GPU hang involving clipped SRC copies https://bugs.freedesktop.org/show_bug.cgi?id=30120 Release 2.12.0 (2010-06-24) =========================== We are pleased to announce this major release of the xf86-video-intel 2D driver. It contains many correctness and performance improvements compared to the 2.11 releases. We encourage everyone using 2.11 to upgrade to 2.12. [This release contains several bug fixes since the earlier 2.11.901 release candidate---see below for details.] New requirements compared to 2.11 --------------------------------- * Libdrm >= 2.4.21 Major performance improvements ------------------------------ There have been many performance improvements targeting the 915G/945G/Pineview graphics chipsets (thank to Chris Wilson!). Areas improved include: * Major improvements to glyph rendering * Avoid software fallback when using extended desktops, (for example, video playback) * Better performance when using large windows, (for example with firefox scrolling) * Avoiding migration ping-pong with gigantic drawing The following speedups (measured with cairo-perf-trace/cairo-traces) capture some of the improvements. These were measured on a Pineview system with X server 1.8.1. This compares how this 2.12 release improves performance compared to 2.11.0: Trace Speedup ----- ------- ocitysmap 5.41x speedup firefox-talos-gfx 2.41x speedup gnome-terminal-vim 2.15x speedup poppler 1.86x speedup firefox-planet-gnome 1.43x speedup midori-zoomed 1.39x speedup swfdec-giant-steps 1.36x speedup xfce4-terminal-a1 1.17x speedup evolution 1.09x speedup swfdec-youtube 1.06x speedup Other improvements ------------------ Daniel Vetter improved Xvmc and overlay, adding GEM support. Bug fixes --------- There have been many conformance improvements targeting the 915G/945G/Pineview graphics chipsets. The rendercheck test suite passes once again and there has been a significant reduction in the number of errors detected by the cairo test suite (notably center sampling and EXTEND_NONE behaviors are fixed). Other notable bug fixes include: * Fix for bug 28446 Garbled fonts with Mathematica https://bugs.freedesktop.org/show_bug.cgi?id=28446 * Fixes for page-flipping and other DRI2-handling bugs, (Thanks Jesse Barnes, and Kristian Høgsberg) * Avoid corruption when using extended desktops, (for example, video playback) (The bug fixes below are new since the 2.11.901 release candidate) * Fix corrupted output when screen rotated https://bugs.freedesktop.org/show_bug.cgi?id=28461 * Fix corrupted rendering in KDE due to missing flush. * Fixes i830_uxa_put_image for the following issues: Bug 28569 - [i965] IGN's flash-based video player crashes X https://bugs.freedesktop.org/show_bug.cgi?id=28569 Bug 28573 - [i965] Fullscreen flash and windowed SDL games fail to update the screen https://bugs.freedesktop.org/show_bug.cgi?id=28573 * Fix visual corruption of scrollbar in Chromium * Fix tiling limits to resolve this issue: Bug 28497 - Graphics corruption after opening a specific website https://bugs.freedesktop.org/show_bug.cgi?id=28497 Snapshot 2.11.901 (2010-06-14) ============================== This is the first release candidate in preparation for the upcoming 2.12.0 release. We will appreciate any feedback we can get from testing of this snapshot to improve the 2.12.0 release. New requirements compared to 2.10 --------------------------------- * Libdrm >= 2.4.19 Major performance improvements ------------------------------ There have been many performance improvements targeting the 915G/945G/Pineview graphics chipsets (thank to Chris Wilson!). Areas improved include: * Major improvements to glyph rendering * Avoid software fallback when using extended desktops, (for example, video playback) * Better performance when using large windows, (for example with firefox scrolling) * Avoiding migration ping-pong with gigantic drawing The following speedups (measured with cairo-perf-trace/cairo-traces) capture some of the improvements. These were measured on a Pineview system with a very recent X server, (from git just before 1.8.1). This compares how this 2.12 release candidate improves performance compared to 2.11.0: Trace Speedup ----- ------- ocitysmap 5.41x speedup firefox-talos-gfx 2.41x speedup gnome-terminal-vim 2.15x speedup poppler 1.86x speedup firefox-planet-gnome 1.43x speedup midori-zoomed 1.39x speedup swfdec-giant-steps 1.36x speedup xfce4-terminal-a1 1.17x speedup evolution 1.09x speedup swfdec-youtube 1.06x speedup Other improvements ------------------ Daniel Vetter improved Xvmc and overlay, adding GEM support. Bug fixes --------- There have been many conformance improvements targeting the 915G/945G/Pineview graphics chipsets. The rendercheck test suite passes once again and there has been a significant reduction in the number of errors detected by the cairo test suite (notably center sampling and EXTEND_NONE behaviors are fixed). Other notable bug fixes include: * Fix for bug 28446 Garbled fonts with Mathematica https://bugs.freedesktop.org/show_bug.cgi?id=28446 * Fixes for page-flipping and other DRI2-handling bugs, (Thanks Jesse Barnes, and Kristian Høgsberg) * Avoid corruption when using extended desktops, (for example, video playback) Release 2.11.0 (2010-03-29) =========================== New in 2.11: DRI2 and page flipping ----------------------------------- The most significant new feature of this release is support for new DRI2 APIs, allowing page flipping to occur for swaps that are full-screen and not rotated. Performance improvements in 2.11 compared to 2.10 ------------------------------------------------- Dramatically improved performance of large pixmaps on memory-constrained hardware, (such as 945), by using tiling. Note that this fix is new since the most recent release candidate for this release (2.10.903). https://bugs.freedesktop.org/show_bug.cgi?id=25375 Elimination of software fallback with alpha-only pixmap (a fix which eliminated a full second from the Moblin boot time): https://bugs.freedesktop.org/show_bug.cgi?id=26189 Notable bug fixes in 2.11 compared to 2.10 ------------------------------------------ Fix for undesired black borders on some images, (caued several problems with firefox): http://bugs.freedesktop.org/show_bug.cgi?id=17933 And other fixes to provide more conformance with existing software-rendering, (as measures by the cairo test suite), such as the sampling location for nearest-neighbor sampling. Other changes ------------- Eric Anholt and Daniel Vetter both removed large piles of old and useless code now that the driver requires kernel modesetting (KMS). This continues to reduce the mainteance burden of the driver, making it easier to isolate and fix bugs. Snapshot 2.10.903 (2010-03-22) ============================== Some notable bug fixes ---------------------- * Fix unpredictable results in page-flipping code due to access of an uninitialized variable. * Two fixes that address a number of long-outstanding failures in the cairo test suite: Remove coord-adjust for nearest centre-sampling. Fill alpha on xrgb images. Closes: Bug 17933 - x8r8g8b8 doesn't sample alpha=0 outside surface bounds http://bugs.freedesktop.org/show_bug.cgi?id=17933 * Fix a regression introduced in 2.10.902: Fatal server error: i915_emit_composite_setup: ADVANCE_BATCH: under-used allocation 100/104 Bug 21723 [i915 bisected] rendering makes X crash http://bugs.freedesktop.org/show_bug.cgi?id=27123 Other minor fixes (avoid trying to print an error message with a freed string, set a variable to NULL after freeing), and documentation updates are also included. Snapshot 2.10.902 (2010-03-15) ============================== Some significant bug fixes -------------------------- Fix video color problems due to YUV plane ordering issue. This fixed a regression that showed up recently (only in these release candidates). Fix recent regression leading to corruption under compiz: https://bugs.freedesktop.org/show_bug.cgi?id=26814 Further DRI2 improvements/fixes from Mario Kleiner and Jesse Barnes, (including support for SwapBuffers request with divisor != 0). Fix build against X server 1.6 branch. Avoid flooding logs after an error occurs. And dramatic code cleanups -------------------------- Eric Anholt removed several cases of old, useless code, (conditions that could not occur now that we require KMS, etc.). Daniel Vetter eliminated piles of code by modernizing the XvMC memory-management and completely removing the old i830_memory allocator (i830_allocate_memory, i830_free_memory), etc. Snapshot 2.10.901 (2010-02-26) ============================== The most significant new feature of this release is support for new DRI2 APIs, allowing page flipping to occur for swaps that are full-screen and not rotated. Some significant bug fixes -------------------------- * Avoid fallback due to failing to extract pixel value from an alpha-only solid, (this fix eliminated 1 second from Mobilin boot time). https://bugs.freedesktop.org/show_bug.cgi?id=26189 * Handle full-height blits without tearing in CopyRegion https://bugs.freedesktop.org/show_bug.cgi?id=22475 Several other fixes and cleanups are included as well, (including the removal of stale utility code that is now maintained in the separate intel-gpu-tools module). Release 2.10.0 (2010-01-04) =========================== New requirements of 2.10 compared to 2.9 ---------------------------------------- * Linux kernel with kernel-modesetting (KMS) All user-modesetting code has now been removed from the driver. We highly recommend kernel version 2.6.32 or later. * Libdrm >= 2.4.16 New features in 2.10 compared to 2.9 ------------------------------------ * New driver debugging options available in xorg.conf (DebugFlushBatches, DebugFlushCaches, DebugWait). See "man intel" for more details. * Video overlay support with KMS. This currently requires Linux 2.6.33, but a backport to 2.6.32 is available here: http://gitorious.org/daniel-s-linux-stuff/linux-kernel/commits/intel-kms-overlay-for-2.6.32 Notable fixes in 2.10 compared to 2.9 ----------------------------------- * Fix crash when XRenderComposite is called with a -1 value for width/height, (crash at login when using compiz). http://bugs.freedesktop.org/show_bug.cgi?id=24724 * Fix to support larger extended desktops, (such as a 2560x1600 plus a 1920x1200 monitor). * Fix glyph corruption due to insufficient cache flushing: https://bugs.freedesktop.org/show_bug.cgi?id=24315 Several other correctness and performance fixes are also included. Note: The driver code of the 2.10.0 release is identical to that of the 2.9.99.901 release candidate. The only changes in 2.10.0 compared to 2.9.99.902 are a minor change to the configure script, and some small updates to the documentation. Snapshot 2.9.99.902 (2009-12-10) ================================ This is the second release candidate in preparation for the upcoming 2.10.0 release. We will appreciate any feedback we can get from testing of this snapshot to improve the 2.10.0 release. Compared to the previous snapshot, this snapshot now correctly verifies that libdrm 2.4.16 (or newer) is available. The previous snapshot also required libdrm 2.4.16 for correct functionality, but neglected to notify the user of this at configure, compile, or install time and would instead simply fail to run. Snapshot 2.9.99.901 (2009-11-30) ================================ This is the first release candidate in preparation for the upcoming 2.10.0 release. We will appreciate any feedback we can get from testing of this snapshot to improve the 2.10.0 release. With this snapshot, the xf86-video-intel driver requires kernel modesetting (KMS) as all of the user modesetting (UMS) support has been removed from the driver. Release 2.9.0 (2009-09-28) ========================== We are pleased to announce the 2.9.0 release of the xf86-video-intel driver. (If you have been following along at home, this release is identical to the 2.8.99.902 release candidate other than the version number). New features in 2.9 compared to 2.8 ----------------------------------- * Support for the B43 chipset. Major fixes in 2.9.0 compared to 2.8.0 -------------------------------------- * Multiple fixes to make the driver stable for 8xx chipsets, (855GM, 865G, etc.). The 2.8 driver series was extremely unstable with many of these chipsets. https://bugs.freedesktop.org/show_bug.cgi?id=22904 (and many duplicates) https://bugs.freedesktop.org/show_bug.cgi?id=22947 * Add support for BACKLIGHT property when using kernel modesetting (KMS). This allows backlight adjustment with programs such as "xbacklight -set " or "xrandr --set BACKLIGHT ". https://bugs.freedesktop.org/show_bug.cgi?id=20963 * Fix so that "xrandr --scale" works when using KMS. https://bugs.freedesktop.org/show_bug.cgi?id=22893 * Fix segfaults of X server when logging out. https://bugs.freedesktop.org/show_bug.cgi?id=20516 * Avoid falling back to software for 1-bit alpha-only masks. https://bugs.freedesktop.org/show_bug.cgi?id=23184 * Fix pixel sampling position for 8xx chipsets, (fixes some cairo-test suite failures). Snapshot 2.8.99.901 (2009-09-09) ================================ This is the first release candidate in preparation for the upcoming 2.9.0 release. We will appreciate any feedback we can get from testing of this snapshot to improve the 2.9.0 release. See the commit log for changes in this release, and developers, please provide me summaries for any major features in this release that you think should appear in NEWS and in the 2.9.0 release notes. Note: We are still investigating failures with 865G chipsets, (these failures existed in the 2.8 series as well). We are hoping to fix these failures before the 2.9.0 release. Release 2.8.0 (2009-07-20) ========================== We are pleased to present this major release of the xf86-video-intel driver. This release is very similar to the 2.7.99.902 release candidate but includes a couple of additional bug fixes, (for bugs #22760 and @22483). Compared to the 2.7 releases this driver contains several new features and many bug fixes. The driver now depends on X server 1.6 or later, and eliminates several obsolete code paths, (XAA and EXA removed in favor of UXA, DRI1 support eliminated). The driver certainly will work best with an i915 module from a recent kernel (2.6.31) and with kernel-modesetting (KMS, specified by loading i915 with the option "modeset=1"). New features in 2.8.0 compared to 2.7 ------------------------------------- * Remove XAA/EXA/DRI1 and NoAccel, and only support UXA/DRI2 now (requiring xserver 1.6). * VLD support added into XvMC for Mpeg2, which decreases CPU usage when playing video. Major fixes in 2.8.0 compared to 2.7 ------------------------------------ * Fix broken front-buffer rendering https://bugs.freedesktop.org/show_bug.cgi?id=19174 * Fix disabling of XvMC disabled https://bugs.freedesktop.org/show_bug.cgi?id=20790 * Fix broken VT switch on some machines https://bugs.freedesktop.org/show_bug.cgi?id=19578 * Improve performance of trapezoid rendering for UXA https://bugs.freedesktop.org/show_bug.cgi?id=21376 * Vblank sync'd GL buffer swap (fixing video tearing under composite) https://bugs.freedesktop.org/show_bug.cgi?id=20664 * Fix G41 DRM support https://bugs.freedesktop.org/show_bug.cgi?id=21095 * Fix crash on some 8xx https://bugs.freedesktop.org/show_bug.cgi?id=18974 Various fixes for GPU hangs, and more... Snapshot 2.7.99.902 (2009-07-13) -------------------------------- This is the first release candidate in preparation for the upcoming 2.8.0 release. Most major and critical bugs should be fixed, but some minor bugs may still be present. We will appreciate any feedback we can get from testing of this snapshot to improve the 2.8.0 release. Snapshot 2.7.99.901 (2009-06-10) -------------------------------- This is the first release candidate in preparation for the upcoming 2.8.0 release. Most critical bugs should be fixed, but some major bugs may still be present. We will appreciate any feedback we can get from testing of this snapshot to improve the 2.8.0 release. Some of the major fixes in this snapshot include: * Several fixes for intermittent GPU hangs/crashes, (some of which already appeared in the 2.7.1 release) * Fix to avoid X crash when viewing large images in browser * Fix X server failure when running old (non-GEM) kernel * Fixes for SDVO LVDS mode detection * Fix major performance regression of trapezoid rendering compared to XAA/EXA * New support for tear-free video when using KMS * New support for tear-free DRI2 CopyRegion Snapshot 2.7.99.1 (2009-04-28) ------------------------------ This is a development snapshot very early in the process toward developing 2.8. There have been some big changes to the code, and we're anxious to get feedback on these changes as early as possible. Here is a summary of the biggest changes: * Driver now depends on X server 1.6 or later * Eliminate XAA and EXA support (in favor of UXA) * Eliminate DRI1 support * Fixes for running without DRI at all These code removals represent a deletion of a substantial amount of code, (and hopefully piles of bugs), as well as reduce the maintenance effort going forward as the number of combinatorial configurations for the driver are greatly reduced. This means that users are much more likely to be running code that has actually been tested, and it will be much easy for developers to replicate bugs that users experience. One of the things that would be most useful in testing this release is to revisit any outstanding bugs that you have previously reported. If the buggy behavior is gone, (or the bug is no longer relevant---such as a bug that's specific to XAA only), please feel free to indicate so in bugzilla or even just close the bug. If you confirm that the bug is still present, please indicate so in the bug report. (I was going to ask that you select a 1.7.99 version, but it looks like bugzilla only has versions for products not compoenents, while we use a "xorg" product and a "driver/intel" component.) We definitely want to make any such confirmed bugs a priority, so it would be nice to have a consistent mechanism to search for these bugs. Suggestions are welcome on the best approach. Thanks in advance for any testing or feedback on this snapshot. Release 2.7.0 (2009-04-15) -------------------------- Compared to the 2.6 series, 2.7.0 has a large number of bug fixes, but also a few significant features, such as: SDVO-TV support, available on ADD2 card (bug#9992) and D945GCLF2 board (bug#17776). Basic SDVO-LVDS support XV video display without tearing [Though this isn't working for all users yet, see https://bugs.freedesktop.org/show_bug.cgi?id=21076 ] Various fixes for UXA, DRI2, and Kernel modesetting. We encourage users to use kernel modesetting and UXA acceleration with this release, which should give the best performance and robustness. When KMS is available, UXA is the default acceleration used by the driver, (EXA is the default otherwise). Known issue: Some Linux kernel versions (such as 2.6.29) are known to have broken PAT code that causes recent versions of this driver to fail, (which can manifest as the X server simply not starting). This can be verified by adding the "nopat" option to the kernel command-line and seeing the failure go away. We hope that newer kernels in the 2.6.29.x as well as 2.6.30 and above will have working PAT code. Some of the most notable bugs fixed in 2.7.0 include: [GM45 965GM] bad htotal causes panel startup failure https://bugs.freedesktop.org/show_bug.cgi?id=17292 [xrandr TV] need TV output property control https://bugs.freedesktop.org/show_bug.cgi?id=12763 [TV] "xrandr --set TV_FORMAT" gets BadMatch error https://bugs.freedesktop.org/show_bug.cgi?id=16566 [945 tiling] Low performance due to no A17 workaround https://bugs.freedesktop.org/show_bug.cgi?id=16835 [TV]Flicker when launching applications in the 2.4-branch https://bugs.freedesktop.org/show_bug.cgi?id=17405 [945GM FBC] FBC causes underruns & flicker https://bugs.freedesktop.org/show_bug.cgi?id=18651 [xv] Textured video suffers from tearing https://bugs.freedesktop.org/show_bug.cgi?id=19635 [G45] Random hangs with UXA https://bugs.freedesktop.org/show_bug.cgi?id=19734 [945GM] Any 3D app is slow in resolution higher than 800x600 with UXA+DRI2, due to tiling https://bugs.freedesktop.org/show_bug.cgi?id=19738 [i915 UXA,EXA] rotation messes display with tiling on https://bugs.freedesktop.org/show_bug.cgi?id=20265 [G45] DRI2/UXA gives solid white instead of transparency https://bugs.freedesktop.org/show_bug.cgi?id=20321 LVDS output not detected https://bugs.freedesktop.org/show_bug.cgi?id=20517 xf86-video-intel-2.6.3: Xv crashes X server https://bugs.freedesktop.org/show_bug.cgi?id=20525 [G965 non-GEM] systray in KDE 4 completely broken https://bugs.freedesktop.org/show_bug.cgi?id=20527 [SDVO-TV]the desktop is teared in four sections on the screen https://bugs.freedesktop.org/show_bug.cgi?id=20550 Intel video driver 2.6.3 crashes with XVideo https://bugs.freedesktop.org/show_bug.cgi?id=20563 [855GM] Xv crash with non-KMS https://bugs.freedesktop.org/show_bug.cgi?id=20585 2.6.99.902 breaks native 1680x1050 mode on TMDS -- EDID miss https://bugs.freedesktop.org/show_bug.cgi?id=20594 [945GM TV] 2.6.99.902 sets a too high CONTRAST-value https://bugs.freedesktop.org/show_bug.cgi?id=20670 [915GM] fail to detect LVDS with new VBT code https://bugs.freedesktop.org/show_bug.cgi?id=20752 [regression i965]tiled output when start X https://bugs.freedesktop.org/show_bug.cgi?id=20803 2.6.99.902: LVDS wrongly detected as disconnected https://bugs.freedesktop.org/show_bug.cgi?id=20826 vt switching fails and crashes X https://bugs.freedesktop.org/show_bug.cgi?id=20863 [HDMI] The screen will flicker when some application runs on G45-64 https://bugs.freedesktop.org/show_bug.cgi?id=20875 TexturedVideo is offsetted wrongly on dualhead https://bugs.freedesktop.org/show_bug.cgi?id=20980 [EXA] xvideo hang X https://bugs.freedesktop.org/show_bug.cgi?id=21027 [EXA] x11perf performance regression https://bugs.freedesktop.org/show_bug.cgi?id=21029 And many others... xf86-video-intel-2.99.917/configure.ac0000664000175000017500000007062112445556005014231 00000000000000# Copyright 2005 Adam Jackson. # # Permission is hereby granted, free of charge, to any person obtaining a # copy of this software and associated documentation files (the "Software"), # to deal in the Software without restriction, including without limitation # on the rights to use, copy, modify, merge, publish, distribute, sub # license, and/or sell copies of the Software, and to permit persons to whom # the Software is furnished to do so, subject to the following conditions: # # The above copyright notice and this permission notice (including the next # paragraph) shall be included in all copies or substantial portions of the # Software. # # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR # IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, # FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL # ADAM JACKSON BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER # IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN # CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. # # Process this file with autoconf to produce a configure script # Initialize Autoconf AC_PREREQ([2.60]) AC_INIT([xf86-video-intel], [2.99.917], [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg], [xf86-video-intel]) AC_CONFIG_SRCDIR([Makefile.am]) AC_CONFIG_HEADERS([config.h]) AC_CONFIG_MACRO_DIR([m4]) AC_CONFIG_AUX_DIR(.) # Initialize Automake AM_INIT_AUTOMAKE([foreign dist-bzip2]) # Require X.Org macros 1.8 or later for MAN_SUBSTS set by XORG_MANPAGE_SECTIONS m4_ifndef([XORG_MACROS_VERSION], [m4_fatal([must install xorg-macros 1.8 or later before running autoconf/autogen. Hint: either install from source, git://anongit.freedesktop.org/xorg/util/macros or, depending on you distribution, try package 'xutils-dev' or 'xorg-x11-util-macros'])]) XORG_MACROS_VERSION(1.8) XORG_DEFAULT_OPTIONS # And disable a few very noisy warnings m4_ifdef([XORG_TESTSET_CFLAG], [ XORG_TESTSET_CFLAG([NOWARNFLAGS], [-Wno-cast-qual]) XORG_TESTSET_CFLAG([NOWARNFLAGS], [-Wno-redundant-decls]) XORG_TESTSET_CFLAG([NOWARNFLAGS], [-Wno-maybe-uninitialized]) ]) AC_SUBST(NOWARNFLAGS) # Require X.Org server macros (i.e. XORG_DRIVER_CHECK_EXT) to check for required modules m4_ifndef([XORG_DRIVER_CHECK_EXT], [m4_fatal([must install xorg-server macros before running autoconf/autogen. Hint: either install from source, git://anongit.freedesktop.org/xorg/xserver or, depending on your distribution, try package 'xserver-xorg-dev' or 'xorg-x11-server-devel'])]) # Initialize libtool AC_DISABLE_STATIC AC_PROG_LIBTOOL AC_SYS_LARGEFILE # Check for common libc routines redefined by os.h AC_CHECK_FUNCS([strlcpy strlcat strndup], [], []) # Platform specific settings case $host_os in *linux*) backlight_helper=yes ;; esac AC_ARG_ENABLE(backlight, AS_HELP_STRING([--disable-backlight], [Enable control over the backlight [default=yes]]), [backlight="$enableval"], [backlight="yes"]) if test "x$backlight" = "xyes"; then AC_DEFINE(USE_BACKLIGHT, 1, [Enable control of the backlight]) fi AC_ARG_ENABLE(backlight-helper, AS_HELP_STRING([--disable-backlight-helper], [Enable building the backlight helper executable for running X under a normal user [default=auto]]), [backlight_helper="$enableval"],) AM_CONDITIONAL(BUILD_BACKLIGHT_HELPER, [test "x$backlight" = "xyes" -a "x$backlight_helper" = "xyes"]) if test "x$backlight_helper" = "xyes"; then tools_msg="$tools_msg xf86-video-intel-backlight-helper" AC_DEFINE(USE_BACKLIGHT_HELPER, 1, [Enable use of the backlight helper interfaces]) fi # Are we in a git checkout? dot_git=no if test -e .git; then AC_DEFINE(HAVE_DOT_GIT, 1, [Are we in a git checkout?]) dot_git=yes fi AM_CONDITIONAL(HAVE_DOT_GIT, test "x$dot_git" = "xyes") # If so, we include the git description in our logs for sanity checking. # # However, for people not running their own drivers this is just noise. # So we copy the xserver's builderstring idiom to allow for this to be # overridden and perhaps replaced with something more useful. AC_ARG_WITH(builderstring, AS_HELP_STRING([--with-builderstring=BUILDERSTRING], [Additional builder string (default: use git describe)]), [BUILDERSTRING="$withval"], [BUILDERSTRING="x-magic-git-describe"]) if test "x$BUILDERSTRING" = "xx-magic-git-describe" -a "x$dot_git" = "xyes"; then AC_DEFINE(USE_GIT_DESCRIBE, 1, [Use automagic builder description]) else if test "x$BUILDERSTRING" != x -a "x$BUILDERSTRING" != "xno" -a "x$BUILDERSTRING" != xx-magic-git-describe; then AC_DEFINE_UNQUOTED(BUILDER_DESCRIPTION, ["$BUILDERSTRING"], [Builder description]) fi fi AC_ARG_ENABLE(gen4asm, AS_HELP_STRING([--enable-gen4asm], [Enable rebuilding the gen4 assembly files [default=no]]), [ASM="$enableval"], [ASM="no"]) gen4asm=no if test "x$ASM" != "xno"; then AC_ARG_WITH(gen4asm, AS_HELP_STRING([--with-gen4asm=PATH], [Path to intel-gen4asm binary]), [path="$withval"], [path=""]) if test -n "$path" ; then gen4asm=yes else PKG_CHECK_MODULES(GEN4ASM, [intel-gen4asm >= 1.2], [gen4asm=yes], [gen4asm=no]) if test "x$ASM" = "xyes" -a "x$gen4asm" != "xyes"; then AC_MSG_ERROR([intel-gen4asm support requested but not found]) fi fi if test "x$gen4asm" = "xyes"; then AC_MSG_CHECKING([path to use for intel-gen4asm]) if test -n "$path" ; then INTEL_GEN4ASM="$path" else INTEL_GEN4ASM="`pkg-config intel-gen4asm --variable=exec_prefix`/bin/intel-gen4asm" fi if ! test -e "$INTEL_GEN4ASM"; then AC_MSG_ERROR([intel-gen4asm enabled, but not found. Tried '$INTEL_GEN4ASM'.]) fi AC_MSG_RESULT([$INTEL_GEN4ASM]) AC_SUBST([INTEL_GEN4ASM]) fi fi AM_CONDITIONAL(HAVE_GEN4ASM, test "x$gen4asm" = "xyes") # Check for atomic intrinsics AC_CACHE_CHECK([for native atomic primitives], intel_cv_atomic_primitives, [ intel_cv_atomic_primitives="none" AC_LINK_IFELSE([AC_LANG_PROGRAM([[ int atomic_add(int i) { return __sync_fetch_and_add (&i, 1); } int atomic_cmpxchg(int i, int j, int k) { return __sync_val_compare_and_swap (&i, j, k); } ]],[[]])], [intel_cv_atomic_primitives="Intel"],[]) if test "x$intel_cv_atomic_primitives" = "xnone"; then AC_CHECK_HEADER([atomic_ops.h], intel_cv_atomic_primitives="libatomic-ops") fi # atomic functions defined in & libc on Solaris if test "x$intel_cv_atomic_primitives" = "xnone"; then AC_CHECK_FUNC([atomic_cas_uint], intel_cv_atomic_primitives="Solaris") fi ]) if test "x$intel_cv_atomic_primitives" = "xIntel"; then AC_DEFINE(HAVE_ATOMIC_PRIMITIVES, 1, [Enable if your compiler supports the Intel __sync_* atomic primitives]) fi if test "x$intel_cv_atomic_primitives" = "xlibatomic-ops"; then AC_DEFINE(HAVE_LIB_ATOMIC_OPS, 1, [Enable if you have libatomic-ops-dev installed]) fi if test "x$intel_cv_atomic_primitives" = "xnone"; then AC_MSG_ERROR([xf86-video-intel depends upon atomic operations, which were not found for your compiler/cpu. Try compiling with -march=native, or install the libatomics-op-dev package.]) fi AC_ARG_ENABLE(udev, AS_HELP_STRING([--disable-udev], [Disable udev-based monitor hotplug detection [default=auto]]), [UDEV="$enableval"], [UDEV=auto]) if test "x$UDEV" != "xno"; then PKG_CHECK_MODULES(UDEV, [libudev], [udev="yes"], [udev="no"]) if test "x$UDEV" = "xyes" -a "x$udev" != "xyes"; then AC_MSG_ERROR([udev support requested but not found (libudev)]) fi if test "x$udev" = "xyes"; then AC_DEFINE(HAVE_UDEV,1,[Enable udev-based monitor hotplug detection]) fi fi PKG_CHECK_MODULES(X11, [x11 xrender xrandr xext xfixes cairo cairo-xlib-xrender pixman-1 libpng], [x11="yes"], [x11="no"]) AM_CONDITIONAL(HAVE_X11, test "x$x11" = "xyes") cpuid="yes" AC_TRY_LINK([ #include #include ], [ int eax, ebx, ecx, edx; if (__get_cpuid_max(0, NULL) < 4) return 0; __cpuid_count(4, 0, eax, ebx, ecx, edx); ], [cpuid="yes"], [cpuid="no"] ) if test "x$cpuid" = "xyes"; then AC_DEFINE(HAVE_CPUID_H,1,[Found a useable cpuid.h]) fi shm=yes AC_CHECK_HEADERS([sys/ipc.h sys/ipc.h], [], [shm="no"]) AC_CHECK_HEADERS([X11/extensions/XShm.h], [], [shm="no"], [ #include #include ]) AC_CHECK_HEADERS([X11/extensions/shmproto.h X11/extensions/shmstr.h], [], [], [ #include #include ]) if test "x$ac_cv_header_X11_extensions_shmproto_h" != "xyes" -a "x$ac_cv_header_X11_extensions_shmstr_h" != "xyes"; then shm="no" fi if test "x$shm" = "xyes"; then AC_MSG_CHECKING(whether shmctl IPC_RMID allows subsequent attaches) AC_TRY_RUN([ #include #include #include int main() { char *shmaddr; int id = shmget (IPC_PRIVATE, 4, IPC_CREAT | 0600); if (id == -1) return 2; shmaddr = shmat (id, 0, 0); shmctl (id, IPC_RMID, 0); if ((char*) shmat (id, 0, 0) == (char*) -1) { shmdt (shmaddr); return 1; } shmdt (shmaddr); shmdt (shmaddr); return 0; } ], AC_DEFINE(IPC_RMID_DEFERRED_RELEASE, 1, [Define to 1 if shared memory segments are released deferred.]) AC_MSG_RESULT(yes), AC_MSG_RESULT(no), AC_MSG_RESULT(assuming no)) AC_DEFINE([HAVE_MIT_SHM], 1, [Define to 1 if MIT-SHM is available]) fi PKG_CHECK_MODULES(X11_DRI3, [xcb-dri3 xcb-sync xcb-present x11-xcb xshmfence x11 xrender xext libdrm], [x11_dri3="yes"], [x11_dri3="no"]) AM_CONDITIONAL(X11_DRI3, test "x$x11_dri3" = "xyes" -a "x$shm" = "xyes") AM_CONDITIONAL(X11_SHM, test "x$shm" = "xyes") AC_ARG_ENABLE(tools, AS_HELP_STRING([--disable-tools], [Enable building and installing the miscellaneous tools [default=auto]]), [tools="$enableval"], [tools="auto"]) if test "x$shm" != "xyes"; then if test "x$tools" = "xyes"; then AC_MSG_ERROR([Incomplete requirements for extra tools, X11 MIT-SHM extension required]) fi tools="no" fi if test "x$tools" != "xno"; then ivo_requires="xrandr xdamage xfixes xcursor xtst xrender xext x11 pixman-1" extra_cflags="" ignore="xinerama" PKG_CHECK_MODULES(IVO_EXTRA, [$ignore], [AC_CHECK_HEADERS([X11/extensions/Xinerama.h], [ivo_requires="$ignore $ivo_requires"], [], [#include #include ])], [ignore=""]) ignore="xcb-dri3 xcb-sync x11-xcb xshmfence x11" PKG_CHECK_MODULES(IVO_EXTRA, [$ignore], [ivo_requires="$ivo_requires $ignore"; extra_cflags="-DDRI3"], [ignore=""]) PKG_CHECK_MODULES(IVO, [$ivo_requires], [ivo="yes"], [ivo="no"]) AC_CHECK_HEADER([sys/timerfd.h], [], [ivo="no"]) if test "x$ivo" = "xno"; then if test "x$tools" = "xyes"; then AC_MSG_ERROR([Incomplete requirements for intel-virtual-output, requires $ivo_requires]) fi tools="no" fi IVO_CFLAGS="$IVO_CFLAGS $extra_cflags" fi if test "x$tools" != "xno"; then tools_msg="$tools_msg intel-virtual-output" fi AC_MSG_CHECKING([whether to build additional tools]) AC_MSG_RESULT([$tools]) AM_CONDITIONAL(BUILD_TOOLS, test "x$tools" != "xno") # Define a configure option for an alternate module directory AC_ARG_WITH(xorg-module-dir, AS_HELP_STRING([--with-xorg-module-dir=DIR], [Default xorg module directory [[default=$libdir/xorg/modules]]]), [moduledir="$withval"], [moduledir="$libdir/xorg/modules"]) AC_ARG_ENABLE(dri, AS_HELP_STRING([--disable-dri], [Disable DRI support [[default=auto]]]), [DRI=$enableval], [DRI=auto]) AC_ARG_ENABLE(dri1, AS_HELP_STRING([--disable-dri1], [Disable DRI1 support [[default=yes]]]), [DRI1=$enableval], [DRI1=yes]) AC_ARG_ENABLE(dri2, AS_HELP_STRING([--disable-dri2], [Disable DRI2 support [[default=yes]]]), [DRI2=$enableval], [DRI2=yes]) AC_ARG_ENABLE(dri3, AS_HELP_STRING([--enable-dri3], [Enable DRI3 support [[default=no]]]), [DRI3=$enableval], [DRI3=no]) AC_ARG_ENABLE(xvmc, AS_HELP_STRING([--disable-xvmc], [Disable XvMC support [[default=yes]]]), [XVMC="$enableval"], [XVMC="yes"]) AC_ARG_ENABLE(kms, AS_HELP_STRING([--enable-kms], [Assume KMS support [[default=yes]]]), [KMS="$enableval"], [KMS="yes"]) AC_ARG_ENABLE(ums, AS_HELP_STRING([--enable-ums], [Assume UMS support [[default=auto]]]), [UMS="$enableval"], [UMS="auto"]) AC_ARG_ENABLE(kms-only, AS_HELP_STRING([--enable-kms-only], [Only assume KMS support (no UMS) [[default=no]]]), [ONLY_KMS="$enableval"], [ONLY_KMS="no"]) AC_ARG_ENABLE(ums-only, AS_HELP_STRING([--enable-ums-only], [Only assume UMS support (no KMS) [[default=no]]]), [ONLY_UMS="$enableval"], [ONLY_UMS="no"]) required_xorg_server_version=1.6 required_pixman_version=0.16 if pkg-config --exists 'pixman-1 >= 0.27.1'; then AC_DEFINE([HAS_PIXMAN_GLYPHS], 1, [Enable pixman glyph cache]) fi if pkg-config --exists 'pixman-1 >= 0.24.0'; then AC_DEFINE([HAS_PIXMAN_TRIANGLES], 1, [Enable pixman triangle rasterisation]) fi # Store the list of server defined optional extensions in REQUIRED_MODULES XORG_DRIVER_CHECK_EXT(RANDR, randrproto) XORG_DRIVER_CHECK_EXT(RENDER, renderproto) XORG_DRIVER_CHECK_EXT(DPMSExtension, xextproto) # Obtain compiler/linker options for the driver dependencies PKG_CHECK_MODULES(DRM, [libdrm >= 2.4.20]) # libdrm_intel is checked separately PKG_CHECK_MODULES(PCIACCESS, [pciaccess >= 0.10]) AC_ARG_ENABLE(sna, AS_HELP_STRING([--enable-sna], [Enable SandyBridge\'s New Acceleration (SNA) [default=auto]]), [SNA="$enableval"], [SNA=auto]) if test "x$SNA" != "xno"; then AC_DEFINE(USE_SNA, 1, [Enable SNA support]) AC_CHECK_HEADERS([sys/sysinfo.h], AC_CHECK_MEMBERS([struct sysinfo.totalram], [], [], [[#include ]])) fi uxa_requires_libdrm=2.4.52 AC_ARG_ENABLE(uxa, AS_HELP_STRING([--enable-uxa], [Enable Unified Acceleration Architecture (UXA) [default=auto]]), [UXA="$enableval"], [UXA=auto]) if test "x$UXA" = "xauto"; then if ! pkg-config --exists "libdrm_intel >= $uxa_requires_libdrm"; then UXA=no fi if ! pkg-config --exists 'pixman-1 >= 0.24.0'; then UXA=no fi fi if test "x$UXA" != "xno"; then AC_DEFINE(USE_UXA, 1, [Enable UXA support]) PKG_CHECK_MODULES(DRMINTEL, [libdrm_intel >= $uxa_requires_libdrm]) required_pixman_version=0.24 UXA=yes fi PKG_CHECK_MODULES(XORG, [xorg-server >= $required_xorg_server_version xproto fontsproto pixman-1 >= $required_pixman_version $REQUIRED_MODULES]) ABI_VERSION=`$PKG_CONFIG --variable=abi_videodrv xorg-server` if test "x$ONLY_UMS" = "xyes"; then UMS="yes" KMS="no" fi if test "x$ONLY_KMS" = "xyes"; then UMS="no" KMS="yes" fi save_CPPFLAGS=$CPPFLAGS CPPFLAGS=$XORG_CFLAGS AC_CHECK_HEADERS([vgaHW.h], legacy="yes", legacy="no") CPPFLAGS=$save_CPPFLAGS if test "x$UMS" = "xauto"; then UMS="$legacy" fi if test "x$UMS" = "xyes" -a "x$legacy" = "xno"; then AC_MSG_ERROR([vgaHW support required for UMS (i810) driver]) fi if test "x$UMS" = "xyes"; then AC_ARG_ENABLE(xaa, AS_HELP_STRING([--enable-xaa], [Enable legacy X Acceleration Architecture (XAA) for i810 chipsets [default=auto]]), [XAA="$enableval"], [XAA="auto"]) if test "x$XAA" != "xno"; then save_CPPFLAGS=$CPPFLAGS CPPFLAGS=$XORG_CFLAGS AC_CHECK_HEADERS([xaa.h], XAA="yes", XAA="no") CPPFLAGS=$save_CPPFLAGS fi AC_MSG_CHECKING([whether to include XAA support]) AC_MSG_RESULT([$XAA]) AC_ARG_ENABLE(dga, AS_HELP_STRING([--enable-dga], [Enable legacy Direct Graphics Access (DGA) for i810 chipsets [default=auto]]), [DGA="$enableval"], [DGA="auto"]) if test "x$DGA" != "xno"; then save_CFLAGS=$CFLAGS CFLAGS=$XORG_CFLAGS AC_CHECK_HEADERS([dgaproc.h], DGA="yes", DGA="no", [#include ]) CFLAGS=$save_CFLAGS fi AC_MSG_CHECKING([whether to include DGA support]) AC_MSG_RESULT([$DGA]) fi AM_CONDITIONAL(DGA, test "x$DGA" = "xyes") AM_CONDITIONAL(XAA, test "x$XAA" = "xyes") AM_CONDITIONAL(KMS, test "x$KMS" = "xyes") if test "x$KMS" = "xyes"; then AC_DEFINE(KMS,1,[Assume KMS support]) fi AM_CONDITIONAL(UMS, test "x$UMS" = "xyes") if test "x$UMS" = "xyes"; then AC_DEFINE(UMS,1,[Assume UMS support]) fi have_dri1=no XORG_DRIVER_CHECK_EXT(XF86DRI, xf86driproto) if test "x$_EXT_CHECK" != "xno" -a "x$DRI" != "xno" -a "x$DRI1" != "xno" -a "x$UMS" = "xyes"; then PKG_CHECK_MODULES(DRI1, [xf86driproto], [have_dri1=$DRI], [have_dri1=no]) save_CFLAGS="$CFLAGS" save_CPPFLAGS="$CPPFLAGS" CFLAGS="$CFLAGS $XORG_CFLAGS $DRI1_CFLAGS $DRM_CFLAGS" CPPFLAGS="$CPPFLAGS $XORG_CFLAGS $DRI1_CFLAGS $DRM_CFLAGS" AC_CHECK_HEADERS([dri.h sarea.h dristruct.h], [], [have_dri1=no], [/* for dri.h */ #include /* for dristruct.h */ #include #ifdef HAVE_DRI_H # include #endif #ifdef HAVE_SAREA_H # include #endif ]) CFLAGS="$save_CFLAGS" CPPFLAGS="$save_CPPFLAGS" fi AC_MSG_CHECKING([whether to include DRI1 support]) AC_MSG_RESULT([$have_dri1]) AM_CONDITIONAL(DRI1, test "x$have_dri1" != "xno") if test "x$have_dri1" != "xno"; then AC_DEFINE(HAVE_DRI1,1,[Enable DRI1 driver support]) dri_msg="$dri_msg DRI1" else DRI1_CFLAGS="" DRI1_LIBS="" if test "x$DRI" = "xyes" -a "x$UMS" = "xyes" -a "x$DRI1" != "xno"; then AC_MSG_ERROR([DRI1 requested but prerequisites not found]) fi fi have_dri2=no have_dri3=no if test "x$DRI" != "xno"; then if test "x$DRI2" != "xno"; then PKG_CHECK_MODULES(DRI2, [dri2proto >= 2.6], [have_dri2=$DRI], [have_dri2=no]) fi if test "x$have_dri2" != "xno"; then save_CFLAGS=$CFLAGS CFLAGS="$XORG_CFLAGS $DRM_CFLAGS $DRI1_CFLAGS $DRI2_CFLAGS" AC_CHECK_HEADERS([dri2.h], [], [have_dri2=no], [ #include #include ]) CFLAGS=$save_CFLAGS fi if test "x$have_dri2" != "xno"; then dridriverdir=`$PKG_CONFIG --variable=dridriverdir dri` if test "x$dridriverdir" = "x"; then dridriverdir="$libdir/dri" fi AC_DEFINE_DIR(DRI_DRIVER_PATH, dridriverdir, [Default have_dri2 driver path]) fi if test "x$DRI3" != "xno"; then XORG_DRIVER_CHECK_EXT(DRI3, dri3proto) if test "x$_EXT_CHECK" != "xno"; then PKG_CHECK_MODULES(DRI3, [dri3proto], [have_dri3=$DRI], []) fi fi if test "x$have_dri3" != "xno"; then save_CFLAGS=$CFLAGS CFLAGS="$XORG_CFLAGS $DRI3_CFLAGS" AC_CHECK_DECL(DRI3, [], [have_dri3=no], [#include ]) AC_CHECK_HEADERS([misyncstr.h misyncshm.h], [], [have_dri3=no], [ #include #include #include ]) CFLAGS=$save_CFLAGS fi fi AC_MSG_CHECKING([whether to include DRI2 support]) AM_CONDITIONAL(DRI2, test "x$have_dri2" != "xno") AC_MSG_RESULT([$have_dri2]) if test "x$have_dri2" != "xno"; then AC_DEFINE(HAVE_DRI2,1,[Enable DRI2 driver support]) dri_msg="$dri_msg DRI2" else if test "x$DRI" = "xyes" -a "x$DRI2" != "xno" -a "x$KMS" = "xyes"; then AC_MSG_ERROR([DRI2 requested but prerequisites not found]) fi # UXA doesn't build without DRI2 headers, too late to fix UXA=no fi AC_MSG_CHECKING([whether to include DRI3 support]) AM_CONDITIONAL(DRI3, test "x$have_dri3" != "xno") AC_MSG_RESULT([$have_dri3]) if test "x$have_dri3" != "xno"; then AC_DEFINE(HAVE_DRI3,1,[Enable DRI3 driver support]) dri_msg="$dri_msg DRI3" else if test "x$DRI" = "xyes" -a "x$DRI3" != "xno" -a "x$KMS" = "xyes"; then AC_MSG_ERROR([DRI3 requested but prerequisites not found]) fi fi AC_CHECK_HEADERS([X11/extensions/dpmsconst.h]) PRESENT="no" XORG_DRIVER_CHECK_EXT(PRESENT, presentproto) if test "x$_EXT_CHECK" != "xno"; then PKG_CHECK_MODULES(PRESENT, [presentproto], [PRESENT="yes"], []) fi if test "x$PRESENT" != "xno"; then save_CFLAGS=$CFLAGS CFLAGS="$XORG_CFLAGS $PRESENT_CFLAGS" AC_CHECK_HEADERS([present.h], [], [PRESENT="no"], [ #include #include ]) CFLAGS=$save_CFLAGS fi AC_MSG_CHECKING([whether to include PRESENT support]) AM_CONDITIONAL(PRESENT, test "x$PRESENT" != "xno") AC_MSG_RESULT([$PRESENT]) if test "x$PRESENT" != "xno"; then AC_DEFINE(HAVE_PRESENT,1,[Enable PRESENT driver support]) dri_msg="$dri_msg Present" fi AC_MSG_CHECKING([whether to include UXA support]) AC_MSG_RESULT([$UXA]) AM_CONDITIONAL(UXA, test "x$UXA" != "xno") AC_MSG_CHECKING([whether to include SNA support]) AM_CONDITIONAL(SNA, test "x$SNA" != "xno") AC_MSG_RESULT([$SNA]) if test "$XVMC" = "yes"; then PKG_CHECK_MODULES(XVMCLIB, [xvmc dri2proto x11 x11-xcb xcb-dri2 xcb-aux libdrm_intel], [], [XVMC="no"]) fi AC_MSG_CHECKING([whether to include XvMC support]) AC_MSG_RESULT([$XVMC]) AM_CONDITIONAL(XVMC, test "x$XVMC" = "xyes") if test "x$XVMC" = "xyes"; then AC_DEFINE(ENABLE_XVMC,1,[Enable XvMC support]) xvmc_msg=" yes" else xvmc_msg=" no" fi AC_ARG_WITH(default-accel, AS_HELP_STRING([--with-default-accel], [Select the default acceleration method out of none, sna, or uxa [default is sna if enabled, otherwise uxa]]), [accel="$withval"], [accel="auto"]) if test "x$accel" = "xyes"; then AC_MSG_WARN([No default acceleration specified, choosing automatic selection]) accel="auto" fi AC_MSG_CHECKING([which acceleration method to use by default]) if test "x$accel" = "xauto"; then if test "x$SNA" != "xno"; then accel="sna" else if test "x$UXA" != "xno"; then accel="uxa" fi fi if test "x$accel" = "xauto" -a "x$KMS" = "xyes"; then AC_MSG_ERROR([No default acceleration option]) fi fi have_accel="none" if test "x$accel" = "xsna"; then if test "x$SNA" != "xno"; then AC_DEFINE(DEFAULT_ACCEL_METHOD, SNA, [Default acceleration method]) have_accel="yes" else AC_MSG_ERROR([SNA requested as default, but is not enabled]) fi fi if test "x$accel" = "xuxa"; then if test "x$UXA" != "xno"; then AC_DEFINE(DEFAULT_ACCEL_METHOD, UXA, [Default acceleration method]) have_accel="yes" else AC_MSG_ERROR([UXA requested as default, but is not enabled]) fi fi if test "x$have_accel" = "xnone"; then if test "x$KMS" = "xyes"; then if test "x$SNA" != "xno" -o "x$UXA" != "xno"; then AC_DEFINE(DEFAULT_ACCEL_METHOD, NOACCEL, [Default acceleration method]) else AC_MSG_ERROR([Invalid default acceleration option]) fi fi accel="none" fi AC_MSG_RESULT($accel) xp_msg="" AC_ARG_ENABLE(tear-free, AS_HELP_STRING([--enable-tear-free], [Enable use of TearFree by default [default=no]]), [TEARFREE="$enableval"], [TEARFREE="no"]) if test "x$TEARFREE" = "xyes"; then AC_DEFINE(TEARFREE,1,[Enable "TearFree" by default]) xp_msg="$xp_msg TearFree" fi AC_ARG_ENABLE(rendernode, AS_HELP_STRING([--enable-rendernode], [Enable use of render nodes (experimental) [default=no]]), [RENDERNODE="$enableval"], [RENDERNODE="no"]) AM_CONDITIONAL(USE_RENDERNODE, test "x$RENDERNODE" = "xyes") if test "x$RENDERNODE" = "xyes"; then AC_DEFINE(USE_RENDERNODE,1,[Assume "rendernode" support]) xp_msg="$xp_msg rendernode" fi AC_ARG_ENABLE(wc-mmap, AS_HELP_STRING([--enable-wc-mmap], [Enable use of WriteCombining mmaps [default=no]]), [WC_MMAP="$enableval"], [WC_MMAP="no"]) if test "x$WC_MMAP" = "xyes"; then AC_DEFINE(USE_WC_MMAP,1,[Enable use of WriteCombining mmaps]) xp_msg="$xp_msg mmap(wc)" fi AC_ARG_ENABLE(create2, AS_HELP_STRING([--enable-create2], [Enable use of create2 ioctl (experimental) [default=no]]), [CREATE2="$enableval"], [CREATE2="no"]) AM_CONDITIONAL(USE_CREATE2, test "x$CREATE2" = "xyes") if test "x$CREATE2" = "xyes"; then AC_DEFINE(USE_CREATE2,1,[Assume "create2" support]) xp_msg="$xp_msg create2" fi AC_ARG_ENABLE(async-swap, AS_HELP_STRING([--enable-async-swap], [Enable use of asynchronous swaps (experimental) [default=no]]), [ASYNC_SWAP="$enableval"], [ASYNC_SWAP="no"]) AM_CONDITIONAL(USE_ASYNC_SWAP, test "x$ASYNC_SWAP" = "xyes") if test "x$ASYNC_SWAP" = "xyes"; then AC_DEFINE(USE_ASYNC_SWAP,1,[Assume asynchronous swap support]) xp_msg="$xp_msg async-swap" fi AC_ARG_ENABLE(debug, AS_HELP_STRING([--enable-debug], [Enables internal debugging [default=no]]), [DEBUG="$enableval"], [DEBUG="no"]) AC_ARG_ENABLE(valgrind, AS_HELP_STRING([--enable-valgrind], [Enables valgrindified ioctls for debugging [default=no]]), [VG="$enableval"], [VG="no"]) LIBS="" AC_SEARCH_LIBS(clock_gettime, rt, [CLOCK_GETTIME_LIBS=$LIBS]) AC_SUBST(CLOCK_GETTIME_LIBS) sdkdir=`$PKG_CONFIG --variable=sdkdir xorg-server` AM_CONDITIONAL(DEBUG, test "x$DEBUG" != "xno") AM_CONDITIONAL(FULL_DEBUG, test "x$DEBUG" = "xfull") if test "x$DEBUG" = "xno"; then AC_DEFINE(NDEBUG,1,[Disable internal debugging]) else if test "x$VG" != "xyes"; then VG=auto fi fi debug_msg="" have_valgrind="no" if test "x$VG" != "xno"; then PKG_CHECK_MODULES(VALGRIND, [valgrind], have_valgrind="yes", have_valgrind="no") AC_MSG_CHECKING([whether to include valgrind support]) if test "x$have_valgrind" = "xyes"; then AC_DEFINE([HAVE_VALGRIND], 1, [Use valgrind intrinsics to suppress false warnings]) else if test "x$VG" = "xyes"; then AC_MSG_ERROR([valgrind support requested, but valgrind-dev headers not found]) fi fi AC_MSG_RESULT([$have_valgrind ($VG)]) fi AM_CONDITIONAL(VALGRIND, test "x$have_valgrind" = "xyes") if test "x$have_valgrind" = "xyes"; then debug_msg="$debug_msg valgrind" fi if test "x$DEBUG" = "xsync"; then AC_DEFINE(DEBUG_SYNC,1,[Enable synchronous rendering for debugging]) debug_msg="$debug_msg sync" fi if test "x$DEBUG" = "xmemory"; then AC_DEFINE(DEBUG_MEMORY,1,[Enable memory debugging]) debug_msg="$debug_msg memory" fi if test "x$DEBUG" = "xpixmap"; then AC_DEFINE(DEBUG_PIXMAP,1,[Enable pixmap debugging]) debug_msg="$debug_msg pixmaps" fi if test "x$DEBUG" = "xfull"; then AC_DEFINE(DEBUG_MEMORY,1,[Enable memory debugging]) AC_DEFINE(DEBUG_PIXMAP,1,[Enable pixmap debugging]) AC_DEFINE(HAS_DEBUG_FULL,1,[Enable all debugging]) CFLAGS="$CFLAGS -O0 -ggdb3" debug_msg=" full" fi if test "x$debug_msg" = "x"; then debug_msg=" none" fi AC_CONFIG_LIBOBJ_DIR(libobj) AC_REPLACE_FUNCS(getline) DRIVER_NAME="intel" AC_SUBST([DRIVER_NAME]) AC_SUBST([moduledir]) AC_DEFINE_DIR([PREFIX_PATH], prefix, [installation prefix]) AC_DEFINE_DIR([LIBEXEC_PATH], libexecdir, [libexec directory]) AC_CONFIG_FILES([ Makefile man/Makefile libobj/Makefile src/Makefile src/legacy/Makefile src/legacy/i810/Makefile src/legacy/i810/xvmc/Makefile src/render_program/Makefile src/sna/Makefile src/sna/brw/Makefile src/sna/fb/Makefile src/uxa/Makefile xvmc/Makefile xvmc/shader/Makefile xvmc/shader/mc/Makefile xvmc/shader/vld/Makefile test/Makefile tools/Makefile tools/org.x.xf86-video-intel.backlight-helper.policy ]) AC_OUTPUT echo "" echo "" test -e `pwd $0`/README && cat `pwd $0`/README accel_msg="" if test "x$SNA" != "xno"; then if test "$accel" = "none"; then accel_msg="$accel_msg *none" else accel_msg="$accel_msg none" fi if test "$accel" = "sna"; then accel_msg="$accel_msg *sna" else accel_msg="$accel_msg sna" fi fi if test "x$UXA" != "xno"; then if test "x$SNA" = "xno"; then if test "$accel" = "none"; then accel_msg="$accel_msg *none" else accel_msg="$accel_msg none" fi fi if test "$accel" = "uxa"; then accel_msg="$accel_msg *uxa" else accel_msg="$accel_msg uxa" fi fi if test "x$dri_msg" = "x"; then dri_msg=" none" fi if test "x$tools_msg" = "x"; then tools_msg=" none" fi echo "" echo "AC_PACKAGE_STRING will be compiled with:" echo " Xorg Video ABI version: $ABI_VERSION" echo " Acceleration backends:$accel_msg" echo " Additional debugging support?$debug_msg" echo " Support for Kernel Mode Setting? $KMS" echo " Support for legacy User Mode Setting (for i810)? $UMS" echo " Support for Direct Rendering Infrastructure:$dri_msg" echo " Support for Xv motion compensation (XvMC and libXvMC):$xvmc_msg" echo " Build additional tools and utilities?$tools_msg" if test -n "$xp_msg"; then echo " Experimental support:$xp_msg" fi echo "" xf86-video-intel-2.99.917/ltmain.sh0000644000175000017500000105204412363743034013560 00000000000000 # libtool (GNU libtool) 2.4.2 # Written by Gordon Matzigkeit , 1996 # Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006, # 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. # This is free software; see the source for copying conditions. There is NO # warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. # GNU Libtool is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by # the Free Software Foundation; either version 2 of the License, or # (at your option) any later version. # # As a special exception to the GNU General Public License, # if you distribute this file as part of a program or library that # is built using GNU Libtool, you may include this file under the # same distribution terms that you use for the rest of that program. # # GNU Libtool is distributed in the hope that it will be useful, but # WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU # General Public License for more details. # # You should have received a copy of the GNU General Public License # along with GNU Libtool; see the file COPYING. If not, a copy # can be downloaded from http://www.gnu.org/licenses/gpl.html, # or obtained by writing to the Free Software Foundation, Inc., # 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. # Usage: $progname [OPTION]... [MODE-ARG]... # # Provide generalized library-building support services. # # --config show all configuration variables # --debug enable verbose shell tracing # -n, --dry-run display commands without modifying any files # --features display basic configuration information and exit # --mode=MODE use operation mode MODE # --preserve-dup-deps don't remove duplicate dependency libraries # --quiet, --silent don't print informational messages # --no-quiet, --no-silent # print informational messages (default) # --no-warn don't display warning messages # --tag=TAG use configuration variables from tag TAG # -v, --verbose print more informational messages than default # --no-verbose don't print the extra informational messages # --version print version information # -h, --help, --help-all print short, long, or detailed help message # # MODE must be one of the following: # # clean remove files from the build directory # compile compile a source file into a libtool object # execute automatically set library path, then run a program # finish complete the installation of libtool libraries # install install libraries or executables # link create a library or an executable # uninstall remove libraries from an installed directory # # MODE-ARGS vary depending on the MODE. When passed as first option, # `--mode=MODE' may be abbreviated as `MODE' or a unique abbreviation of that. # Try `$progname --help --mode=MODE' for a more detailed description of MODE. # # When reporting a bug, please describe a test case to reproduce it and # include the following information: # # host-triplet: $host # shell: $SHELL # compiler: $LTCC # compiler flags: $LTCFLAGS # linker: $LD (gnu? $with_gnu_ld) # $progname: (GNU libtool) 2.4.2 Debian-2.4.2-1.7ubuntu1 # automake: $automake_version # autoconf: $autoconf_version # # Report bugs to . # GNU libtool home page: . # General help using GNU software: . PROGRAM=libtool PACKAGE=libtool VERSION="2.4.2 Debian-2.4.2-1.7ubuntu1" TIMESTAMP="" package_revision=1.3337 # Be Bourne compatible if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: # Zsh 3.x and 4.x performs word splitting on ${1+"$@"}, which # is contrary to our usage. Disable this feature. alias -g '${1+"$@"}'='"$@"' setopt NO_GLOB_SUBST else case `(set -o) 2>/dev/null` in *posix*) set -o posix;; esac fi BIN_SH=xpg4; export BIN_SH # for Tru64 DUALCASE=1; export DUALCASE # for MKS sh # A function that is used when there is no print builtin or printf. func_fallback_echo () { eval 'cat <<_LTECHO_EOF $1 _LTECHO_EOF' } # NLS nuisances: We save the old values to restore during execute mode. lt_user_locale= lt_safe_locale= for lt_var in LANG LANGUAGE LC_ALL LC_CTYPE LC_COLLATE LC_MESSAGES do eval "if test \"\${$lt_var+set}\" = set; then save_$lt_var=\$$lt_var $lt_var=C export $lt_var lt_user_locale=\"$lt_var=\\\$save_\$lt_var; \$lt_user_locale\" lt_safe_locale=\"$lt_var=C; \$lt_safe_locale\" fi" done LC_ALL=C LANGUAGE=C export LANGUAGE LC_ALL $lt_unset CDPATH # Work around backward compatibility issue on IRIX 6.5. On IRIX 6.4+, sh # is ksh but when the shell is invoked as "sh" and the current value of # the _XPG environment variable is not equal to 1 (one), the special # positional parameter $0, within a function call, is the name of the # function. progpath="$0" : ${CP="cp -f"} test "${ECHO+set}" = set || ECHO=${as_echo-'printf %s\n'} : ${MAKE="make"} : ${MKDIR="mkdir"} : ${MV="mv -f"} : ${RM="rm -f"} : ${SHELL="${CONFIG_SHELL-/bin/sh}"} : ${Xsed="$SED -e 1s/^X//"} # Global variables: EXIT_SUCCESS=0 EXIT_FAILURE=1 EXIT_MISMATCH=63 # $? = 63 is used to indicate version mismatch to missing. EXIT_SKIP=77 # $? = 77 is used to indicate a skipped test to automake. exit_status=$EXIT_SUCCESS # Make sure IFS has a sensible default lt_nl=' ' IFS=" $lt_nl" dirname="s,/[^/]*$,," basename="s,^.*/,," # func_dirname file append nondir_replacement # Compute the dirname of FILE. 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Use a colon delimited # list incase some portion of path contains whitespace. my_dir_list="$my_directory_path:$my_dir_list" # If the last portion added has no slash in it, the list is done case $my_directory_path in */*) ;; *) break ;; esac # ...otherwise throw away the child directory and loop my_directory_path=`$ECHO "$my_directory_path" | $SED -e "$dirname"` done my_dir_list=`$ECHO "$my_dir_list" | $SED 's,:*$,,'` save_mkdir_p_IFS="$IFS"; IFS=':' for my_dir in $my_dir_list; do IFS="$save_mkdir_p_IFS" # mkdir can fail with a `File exist' error if two processes # try to create one of the directories concurrently. Don't # stop in that case! $MKDIR "$my_dir" 2>/dev/null || : done IFS="$save_mkdir_p_IFS" # Bail out if we (or some other process) failed to create a directory. test -d "$my_directory_path" || \ func_fatal_error "Failed to create \`$1'" fi } # func_mktempdir [string] # Make a temporary directory that won't clash with other running # libtool processes, and avoids race conditions if possible. If # given, STRING is the basename for that directory. func_mktempdir () { my_template="${TMPDIR-/tmp}/${1-$progname}" if test "$opt_dry_run" = ":"; then # Return a directory name, but don't create it in dry-run mode my_tmpdir="${my_template}-$$" else # If mktemp works, use that first and foremost my_tmpdir=`mktemp -d "${my_template}-XXXXXXXX" 2>/dev/null` if test ! -d "$my_tmpdir"; then # Failing that, at least try and use $RANDOM to avoid a race my_tmpdir="${my_template}-${RANDOM-0}$$" save_mktempdir_umask=`umask` umask 0077 $MKDIR "$my_tmpdir" umask $save_mktempdir_umask fi # If we're not in dry-run mode, bomb out on failure test -d "$my_tmpdir" || \ func_fatal_error "cannot create temporary directory \`$my_tmpdir'" fi $ECHO "$my_tmpdir" } # func_quote_for_eval arg # Aesthetically quote ARG to be evaled later. # This function returns two values: FUNC_QUOTE_FOR_EVAL_RESULT # is double-quoted, suitable for a subsequent eval, whereas # FUNC_QUOTE_FOR_EVAL_UNQUOTED_RESULT has merely all characters # which are still active within double quotes backslashified. func_quote_for_eval () { case $1 in *[\\\`\"\$]*) func_quote_for_eval_unquoted_result=`$ECHO "$1" | $SED "$sed_quote_subst"` ;; *) func_quote_for_eval_unquoted_result="$1" ;; esac case $func_quote_for_eval_unquoted_result in # Double-quote args containing shell metacharacters to delay # word splitting, command substitution and and variable # expansion for a subsequent eval. # Many Bourne shells cannot handle close brackets correctly # in scan sets, so we specify it separately. *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") func_quote_for_eval_result="\"$func_quote_for_eval_unquoted_result\"" ;; *) func_quote_for_eval_result="$func_quote_for_eval_unquoted_result" esac } # func_quote_for_expand arg # Aesthetically quote ARG to be evaled later; same as above, # but do not quote variable references. func_quote_for_expand () { case $1 in *[\\\`\"]*) my_arg=`$ECHO "$1" | $SED \ -e "$double_quote_subst" -e "$sed_double_backslash"` ;; *) my_arg="$1" ;; esac case $my_arg in # Double-quote args containing shell metacharacters to delay # word splitting and command substitution for a subsequent eval. # Many Bourne shells cannot handle close brackets correctly # in scan sets, so we specify it separately. *[\[\~\#\^\&\*\(\)\{\}\|\;\<\>\?\'\ \ ]*|*]*|"") my_arg="\"$my_arg\"" ;; esac func_quote_for_expand_result="$my_arg" } # func_show_eval cmd [fail_exp] # Unless opt_silent is true, then output CMD. Then, if opt_dryrun is # not true, evaluate CMD. If the evaluation of CMD fails, and FAIL_EXP # is given, then evaluate it. func_show_eval () { my_cmd="$1" my_fail_exp="${2-:}" ${opt_silent-false} || { func_quote_for_expand "$my_cmd" eval "func_echo $func_quote_for_expand_result" } if ${opt_dry_run-false}; then :; else eval "$my_cmd" my_status=$? if test "$my_status" -eq 0; then :; else eval "(exit $my_status); $my_fail_exp" fi fi } # func_show_eval_locale cmd [fail_exp] # Unless opt_silent is true, then output CMD. Then, if opt_dryrun is # not true, evaluate CMD. If the evaluation of CMD fails, and FAIL_EXP # is given, then evaluate it. Use the saved locale for evaluation. func_show_eval_locale () { my_cmd="$1" my_fail_exp="${2-:}" ${opt_silent-false} || { func_quote_for_expand "$my_cmd" eval "func_echo $func_quote_for_expand_result" } if ${opt_dry_run-false}; then :; else eval "$lt_user_locale $my_cmd" my_status=$? eval "$lt_safe_locale" if test "$my_status" -eq 0; then :; else eval "(exit $my_status); $my_fail_exp" fi fi } # func_tr_sh # Turn $1 into a string suitable for a shell variable name. # Result is stored in $func_tr_sh_result. All characters # not in the set a-zA-Z0-9_ are replaced with '_'. Further, # if $1 begins with a digit, a '_' is prepended as well. func_tr_sh () { case $1 in [0-9]* | *[!a-zA-Z0-9_]*) func_tr_sh_result=`$ECHO "$1" | $SED 's/^\([0-9]\)/_\1/; s/[^a-zA-Z0-9_]/_/g'` ;; * ) func_tr_sh_result=$1 ;; esac } # func_version # Echo version message to standard output and exit. func_version () { $opt_debug $SED -n '/(C)/!b go :more /\./!{ N s/\n# / / b more } :go /^# '$PROGRAM' (GNU /,/# warranty; / { s/^# // s/^# *$// s/\((C)\)[ 0-9,-]*\( [1-9][0-9]*\)/\1\2/ p }' < "$progpath" exit $? } # func_usage # Echo short help message to standard output and exit. func_usage () { $opt_debug $SED -n '/^# Usage:/,/^# *.*--help/ { s/^# // s/^# *$// s/\$progname/'$progname'/ p }' < "$progpath" echo $ECHO "run \`$progname --help | more' for full usage" exit $? } # func_help [NOEXIT] # Echo long help message to standard output and exit, # unless 'noexit' is passed as argument. func_help () { $opt_debug $SED -n '/^# Usage:/,/# Report bugs to/ { :print s/^# // s/^# *$// s*\$progname*'$progname'* s*\$host*'"$host"'* s*\$SHELL*'"$SHELL"'* s*\$LTCC*'"$LTCC"'* s*\$LTCFLAGS*'"$LTCFLAGS"'* s*\$LD*'"$LD"'* s/\$with_gnu_ld/'"$with_gnu_ld"'/ s/\$automake_version/'"`(${AUTOMAKE-automake} --version) 2>/dev/null |$SED 1q`"'/ s/\$autoconf_version/'"`(${AUTOCONF-autoconf} --version) 2>/dev/null |$SED 1q`"'/ p d } /^# .* home page:/b print /^# General help using/b print ' < "$progpath" ret=$? if test -z "$1"; then exit $ret fi } # func_missing_arg argname # Echo program name prefixed message to standard error and set global # exit_cmd. func_missing_arg () { $opt_debug func_error "missing argument for $1." exit_cmd=exit } # func_split_short_opt shortopt # Set func_split_short_opt_name and func_split_short_opt_arg shell # variables after splitting SHORTOPT after the 2nd character. func_split_short_opt () { my_sed_short_opt='1s/^\(..\).*$/\1/;q' my_sed_short_rest='1s/^..\(.*\)$/\1/;q' func_split_short_opt_name=`$ECHO "$1" | $SED "$my_sed_short_opt"` func_split_short_opt_arg=`$ECHO "$1" | $SED "$my_sed_short_rest"` } # func_split_short_opt may be replaced by extended shell implementation # func_split_long_opt longopt # Set func_split_long_opt_name and func_split_long_opt_arg shell # variables after splitting LONGOPT at the `=' sign. func_split_long_opt () { my_sed_long_opt='1s/^\(--[^=]*\)=.*/\1/;q' my_sed_long_arg='1s/^--[^=]*=//' func_split_long_opt_name=`$ECHO "$1" | $SED "$my_sed_long_opt"` func_split_long_opt_arg=`$ECHO "$1" | $SED "$my_sed_long_arg"` } # func_split_long_opt may be replaced by extended shell implementation exit_cmd=: magic="%%%MAGIC variable%%%" magic_exe="%%%MAGIC EXE variable%%%" # Global variables. nonopt= preserve_args= lo2o="s/\\.lo\$/.${objext}/" o2lo="s/\\.${objext}\$/.lo/" extracted_archives= extracted_serial=0 # If this variable is set in any of the actions, the command in it # will be execed at the end. This prevents here-documents from being # left over by shells. exec_cmd= # func_append var value # Append VALUE to the end of shell variable VAR. func_append () { eval "${1}=\$${1}\${2}" } # func_append may be replaced by extended shell implementation # func_append_quoted var value # Quote VALUE and append to the end of shell variable VAR, separated # by a space. func_append_quoted () { func_quote_for_eval "${2}" eval "${1}=\$${1}\\ \$func_quote_for_eval_result" } # func_append_quoted may be replaced by extended shell implementation # func_arith arithmetic-term... func_arith () { func_arith_result=`expr "${@}"` } # func_arith may be replaced by extended shell implementation # func_len string # STRING may not start with a hyphen. func_len () { func_len_result=`expr "${1}" : ".*" 2>/dev/null || echo $max_cmd_len` } # func_len may be replaced by extended shell implementation # func_lo2o object func_lo2o () { func_lo2o_result=`$ECHO "${1}" | $SED "$lo2o"` } # func_lo2o may be replaced by extended shell implementation # func_xform libobj-or-source func_xform () { func_xform_result=`$ECHO "${1}" | $SED 's/\.[^.]*$/.lo/'` } # func_xform may be replaced by extended shell implementation # func_fatal_configuration arg... # Echo program name prefixed message to standard error, followed by # a configuration failure hint, and exit. func_fatal_configuration () { func_error ${1+"$@"} func_error "See the $PACKAGE documentation for more information." func_fatal_error "Fatal configuration error." } # func_config # Display the configuration for all the tags in this script. func_config () { re_begincf='^# ### BEGIN LIBTOOL' re_endcf='^# ### END LIBTOOL' # Default configuration. $SED "1,/$re_begincf CONFIG/d;/$re_endcf CONFIG/,\$d" < "$progpath" # Now print the configurations for the tags. for tagname in $taglist; do $SED -n "/$re_begincf TAG CONFIG: $tagname\$/,/$re_endcf TAG CONFIG: $tagname\$/p" < "$progpath" done exit $? } # func_features # Display the features supported by this script. func_features () { echo "host: $host" if test "$build_libtool_libs" = yes; then echo "enable shared libraries" else echo "disable shared libraries" fi if test "$build_old_libs" = yes; then echo "enable static libraries" else echo "disable static libraries" fi exit $? } # func_enable_tag tagname # Verify that TAGNAME is valid, and either flag an error and exit, or # enable the TAGNAME tag. We also add TAGNAME to the global $taglist # variable here. func_enable_tag () { # Global variable: tagname="$1" re_begincf="^# ### BEGIN LIBTOOL TAG CONFIG: $tagname\$" re_endcf="^# ### END LIBTOOL TAG CONFIG: $tagname\$" sed_extractcf="/$re_begincf/,/$re_endcf/p" # Validate tagname. case $tagname in *[!-_A-Za-z0-9,/]*) func_fatal_error "invalid tag name: $tagname" ;; esac # Don't test for the "default" C tag, as we know it's # there but not specially marked. case $tagname in CC) ;; *) if $GREP "$re_begincf" "$progpath" >/dev/null 2>&1; then taglist="$taglist $tagname" # Evaluate the configuration. Be careful to quote the path # and the sed script, to avoid splitting on whitespace, but # also don't use non-portable quotes within backquotes within # quotes we have to do it in 2 steps: extractedcf=`$SED -n -e "$sed_extractcf" < "$progpath"` eval "$extractedcf" else func_error "ignoring unknown tag $tagname" fi ;; esac } # func_check_version_match # Ensure that we are using m4 macros, and libtool script from the same # release of libtool. func_check_version_match () { if test "$package_revision" != "$macro_revision"; then if test "$VERSION" != "$macro_version"; then if test -z "$macro_version"; then cat >&2 <<_LT_EOF $progname: Version mismatch error. This is $PACKAGE $VERSION, but the $progname: definition of this LT_INIT comes from an older release. $progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION $progname: and run autoconf again. _LT_EOF else cat >&2 <<_LT_EOF $progname: Version mismatch error. This is $PACKAGE $VERSION, but the $progname: definition of this LT_INIT comes from $PACKAGE $macro_version. $progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION $progname: and run autoconf again. _LT_EOF fi else cat >&2 <<_LT_EOF $progname: Version mismatch error. This is $PACKAGE $VERSION, revision $package_revision, $progname: but the definition of this LT_INIT comes from revision $macro_revision. $progname: You should recreate aclocal.m4 with macros from revision $package_revision $progname: of $PACKAGE $VERSION and run autoconf again. _LT_EOF fi exit $EXIT_MISMATCH fi } # Shorthand for --mode=foo, only valid as the first argument case $1 in clean|clea|cle|cl) shift; set dummy --mode clean ${1+"$@"}; shift ;; compile|compil|compi|comp|com|co|c) shift; set dummy --mode compile ${1+"$@"}; shift ;; execute|execut|execu|exec|exe|ex|e) shift; set dummy --mode execute ${1+"$@"}; shift ;; finish|finis|fini|fin|fi|f) shift; set dummy --mode finish ${1+"$@"}; shift ;; install|instal|insta|inst|ins|in|i) shift; set dummy --mode install ${1+"$@"}; shift ;; link|lin|li|l) shift; set dummy --mode link ${1+"$@"}; shift ;; uninstall|uninstal|uninsta|uninst|unins|unin|uni|un|u) shift; set dummy --mode uninstall ${1+"$@"}; shift ;; esac # Option defaults: opt_debug=: opt_dry_run=false opt_config=false opt_preserve_dup_deps=false opt_features=false opt_finish=false opt_help=false opt_help_all=false opt_silent=: opt_warning=: opt_verbose=: opt_silent=false opt_verbose=false # Parse options once, thoroughly. This comes as soon as possible in the # script to make things like `--version' happen as quickly as we can. { # this just eases exit handling while test $# -gt 0; do opt="$1" shift case $opt in --debug|-x) opt_debug='set -x' func_echo "enabling shell trace mode" $opt_debug ;; --dry-run|--dryrun|-n) opt_dry_run=: ;; --config) opt_config=: func_config ;; --dlopen|-dlopen) optarg="$1" opt_dlopen="${opt_dlopen+$opt_dlopen }$optarg" shift ;; --preserve-dup-deps) opt_preserve_dup_deps=: ;; --features) opt_features=: func_features ;; --finish) opt_finish=: set dummy --mode finish ${1+"$@"}; shift ;; --help) opt_help=: ;; --help-all) opt_help_all=: opt_help=': help-all' ;; --mode) test $# = 0 && func_missing_arg $opt && break optarg="$1" opt_mode="$optarg" case $optarg in # Valid mode arguments: clean|compile|execute|finish|install|link|relink|uninstall) ;; # Catch anything else as an error *) func_error "invalid argument for $opt" exit_cmd=exit break ;; esac shift ;; --no-silent|--no-quiet) opt_silent=false func_append preserve_args " $opt" ;; --no-warning|--no-warn) opt_warning=false func_append preserve_args " $opt" ;; --no-verbose) opt_verbose=false func_append preserve_args " $opt" ;; --silent|--quiet) opt_silent=: func_append preserve_args " $opt" opt_verbose=false ;; --verbose|-v) opt_verbose=: func_append preserve_args " $opt" opt_silent=false ;; --tag) test $# = 0 && func_missing_arg $opt && break optarg="$1" opt_tag="$optarg" func_append preserve_args " $opt $optarg" func_enable_tag "$optarg" shift ;; -\?|-h) func_usage ;; --help) func_help ;; --version) func_version ;; # Separate optargs to long options: --*=*) func_split_long_opt "$opt" set dummy "$func_split_long_opt_name" "$func_split_long_opt_arg" ${1+"$@"} shift ;; # Separate non-argument short options: -\?*|-h*|-n*|-v*) func_split_short_opt "$opt" set dummy "$func_split_short_opt_name" "-$func_split_short_opt_arg" ${1+"$@"} shift ;; --) break ;; -*) func_fatal_help "unrecognized option \`$opt'" ;; *) set dummy "$opt" ${1+"$@"}; shift; break ;; esac done # Validate options: # save first non-option argument if test "$#" -gt 0; then nonopt="$opt" shift fi # preserve --debug test "$opt_debug" = : || func_append preserve_args " --debug" case $host in *cygwin* | *mingw* | *pw32* | *cegcc*) # don't eliminate duplications in $postdeps and $predeps opt_duplicate_compiler_generated_deps=: ;; *) opt_duplicate_compiler_generated_deps=$opt_preserve_dup_deps ;; esac $opt_help || { # Sanity checks first: func_check_version_match if test "$build_libtool_libs" != yes && test "$build_old_libs" != yes; then func_fatal_configuration "not configured to build any kind of library" fi # Darwin sucks eval std_shrext=\"$shrext_cmds\" # Only execute mode is allowed to have -dlopen flags. if test -n "$opt_dlopen" && test "$opt_mode" != execute; then func_error "unrecognized option \`-dlopen'" $ECHO "$help" 1>&2 exit $EXIT_FAILURE fi # Change the help message to a mode-specific one. generic_help="$help" help="Try \`$progname --help --mode=$opt_mode' for more information." } # Bail if the options were screwed $exit_cmd $EXIT_FAILURE } ## ----------- ## ## Main. ## ## ----------- ## # func_lalib_p file # True iff FILE is a libtool `.la' library or `.lo' object file. # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_lalib_p () { test -f "$1" && $SED -e 4q "$1" 2>/dev/null \ | $GREP "^# Generated by .*$PACKAGE" > /dev/null 2>&1 } # func_lalib_unsafe_p file # True iff FILE is a libtool `.la' library or `.lo' object file. # This function implements the same check as func_lalib_p without # resorting to external programs. To this end, it redirects stdin and # closes it afterwards, without saving the original file descriptor. # As a safety measure, use it only where a negative result would be # fatal anyway. Works if `file' does not exist. func_lalib_unsafe_p () { lalib_p=no if test -f "$1" && test -r "$1" && exec 5<&0 <"$1"; then for lalib_p_l in 1 2 3 4 do read lalib_p_line case "$lalib_p_line" in \#\ Generated\ by\ *$PACKAGE* ) lalib_p=yes; break;; esac done exec 0<&5 5<&- fi test "$lalib_p" = yes } # func_ltwrapper_script_p file # True iff FILE is a libtool wrapper script # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_ltwrapper_script_p () { func_lalib_p "$1" } # func_ltwrapper_executable_p file # True iff FILE is a libtool wrapper executable # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_ltwrapper_executable_p () { func_ltwrapper_exec_suffix= case $1 in *.exe) ;; *) func_ltwrapper_exec_suffix=.exe ;; esac $GREP "$magic_exe" "$1$func_ltwrapper_exec_suffix" >/dev/null 2>&1 } # func_ltwrapper_scriptname file # Assumes file is an ltwrapper_executable # uses $file to determine the appropriate filename for a # temporary ltwrapper_script. func_ltwrapper_scriptname () { func_dirname_and_basename "$1" "" "." func_stripname '' '.exe' "$func_basename_result" func_ltwrapper_scriptname_result="$func_dirname_result/$objdir/${func_stripname_result}_ltshwrapper" } # func_ltwrapper_p file # True iff FILE is a libtool wrapper script or wrapper executable # This function is only a basic sanity check; it will hardly flush out # determined imposters. func_ltwrapper_p () { func_ltwrapper_script_p "$1" || func_ltwrapper_executable_p "$1" } # func_execute_cmds commands fail_cmd # Execute tilde-delimited COMMANDS. # If FAIL_CMD is given, eval that upon failure. # FAIL_CMD may read-access the current command in variable CMD! func_execute_cmds () { $opt_debug save_ifs=$IFS; IFS='~' for cmd in $1; do IFS=$save_ifs eval cmd=\"$cmd\" func_show_eval "$cmd" "${2-:}" done IFS=$save_ifs } # func_source file # Source FILE, adding directory component if necessary. # Note that it is not necessary on cygwin/mingw to append a dot to # FILE even if both FILE and FILE.exe exist: automatic-append-.exe # behavior happens only for exec(3), not for open(2)! Also, sourcing # `FILE.' does not work on cygwin managed mounts. func_source () { $opt_debug case $1 in */* | *\\*) . "$1" ;; *) . "./$1" ;; esac } # func_resolve_sysroot PATH # Replace a leading = in PATH with a sysroot. Store the result into # func_resolve_sysroot_result func_resolve_sysroot () { func_resolve_sysroot_result=$1 case $func_resolve_sysroot_result in =*) func_stripname '=' '' "$func_resolve_sysroot_result" func_resolve_sysroot_result=$lt_sysroot$func_stripname_result ;; esac } # func_replace_sysroot PATH # If PATH begins with the sysroot, replace it with = and # store the result into func_replace_sysroot_result. func_replace_sysroot () { case "$lt_sysroot:$1" in ?*:"$lt_sysroot"*) func_stripname "$lt_sysroot" '' "$1" func_replace_sysroot_result="=$func_stripname_result" ;; *) # Including no sysroot. func_replace_sysroot_result=$1 ;; esac } # func_infer_tag arg # Infer tagged configuration to use if any are available and # if one wasn't chosen via the "--tag" command line option. # Only attempt this if the compiler in the base compile # command doesn't match the default compiler. # arg is usually of the form 'gcc ...' func_infer_tag () { $opt_debug if test -n "$available_tags" && test -z "$tagname"; then CC_quoted= for arg in $CC; do func_append_quoted CC_quoted "$arg" done CC_expanded=`func_echo_all $CC` CC_quoted_expanded=`func_echo_all $CC_quoted` case $@ in # Blanks in the command may have been stripped by the calling shell, # but not from the CC environment variable when configure was run. " $CC "* | "$CC "* | " $CC_expanded "* | "$CC_expanded "* | \ " $CC_quoted"* | "$CC_quoted "* | " $CC_quoted_expanded "* | "$CC_quoted_expanded "*) ;; # Blanks at the start of $base_compile will cause this to fail # if we don't check for them as well. *) for z in $available_tags; do if $GREP "^# ### BEGIN LIBTOOL TAG CONFIG: $z$" < "$progpath" > /dev/null; then # Evaluate the configuration. eval "`${SED} -n -e '/^# ### BEGIN LIBTOOL TAG CONFIG: '$z'$/,/^# ### END LIBTOOL TAG CONFIG: '$z'$/p' < $progpath`" CC_quoted= for arg in $CC; do # Double-quote args containing other shell metacharacters. func_append_quoted CC_quoted "$arg" done CC_expanded=`func_echo_all $CC` CC_quoted_expanded=`func_echo_all $CC_quoted` case "$@ " in " $CC "* | "$CC "* | " $CC_expanded "* | "$CC_expanded "* | \ " $CC_quoted"* | "$CC_quoted "* | " $CC_quoted_expanded "* | "$CC_quoted_expanded "*) # The compiler in the base compile command matches # the one in the tagged configuration. # Assume this is the tagged configuration we want. tagname=$z break ;; esac fi done # If $tagname still isn't set, then no tagged configuration # was found and let the user know that the "--tag" command # line option must be used. if test -z "$tagname"; then func_echo "unable to infer tagged configuration" func_fatal_error "specify a tag with \`--tag'" # else # func_verbose "using $tagname tagged configuration" fi ;; esac fi } # func_write_libtool_object output_name pic_name nonpic_name # Create a libtool object file (analogous to a ".la" file), # but don't create it if we're doing a dry run. func_write_libtool_object () { write_libobj=${1} if test "$build_libtool_libs" = yes; then write_lobj=\'${2}\' else write_lobj=none fi if test "$build_old_libs" = yes; then write_oldobj=\'${3}\' else write_oldobj=none fi $opt_dry_run || { cat >${write_libobj}T </dev/null` if test "$?" -eq 0 && test -n "${func_convert_core_file_wine_to_w32_tmp}"; then func_convert_core_file_wine_to_w32_result=`$ECHO "$func_convert_core_file_wine_to_w32_tmp" | $SED -e "$lt_sed_naive_backslashify"` else func_convert_core_file_wine_to_w32_result= fi fi } # end: func_convert_core_file_wine_to_w32 # func_convert_core_path_wine_to_w32 ARG # Helper function used by path conversion functions when $build is *nix, and # $host is mingw, cygwin, or some other w32 environment. Relies on a correctly # configured wine environment available, with the winepath program in $build's # $PATH. Assumes ARG has no leading or trailing path separator characters. # # ARG is path to be converted from $build format to win32. # Result is available in $func_convert_core_path_wine_to_w32_result. # Unconvertible file (directory) names in ARG are skipped; if no directory names # are convertible, then the result may be empty. func_convert_core_path_wine_to_w32 () { $opt_debug # unfortunately, winepath doesn't convert paths, only file names func_convert_core_path_wine_to_w32_result="" if test -n "$1"; then oldIFS=$IFS IFS=: for func_convert_core_path_wine_to_w32_f in $1; do IFS=$oldIFS func_convert_core_file_wine_to_w32 "$func_convert_core_path_wine_to_w32_f" if test -n "$func_convert_core_file_wine_to_w32_result" ; then if test -z "$func_convert_core_path_wine_to_w32_result"; then func_convert_core_path_wine_to_w32_result="$func_convert_core_file_wine_to_w32_result" else func_append func_convert_core_path_wine_to_w32_result ";$func_convert_core_file_wine_to_w32_result" fi fi done IFS=$oldIFS fi } # end: func_convert_core_path_wine_to_w32 # func_cygpath ARGS... # Wrapper around calling the cygpath program via LT_CYGPATH. This is used when # when (1) $build is *nix and Cygwin is hosted via a wine environment; or (2) # $build is MSYS and $host is Cygwin, or (3) $build is Cygwin. In case (1) or # (2), returns the Cygwin file name or path in func_cygpath_result (input # file name or path is assumed to be in w32 format, as previously converted # from $build's *nix or MSYS format). In case (3), returns the w32 file name # or path in func_cygpath_result (input file name or path is assumed to be in # Cygwin format). Returns an empty string on error. # # ARGS are passed to cygpath, with the last one being the file name or path to # be converted. # # Specify the absolute *nix (or w32) name to cygpath in the LT_CYGPATH # environment variable; do not put it in $PATH. func_cygpath () { $opt_debug if test -n "$LT_CYGPATH" && test -f "$LT_CYGPATH"; then func_cygpath_result=`$LT_CYGPATH "$@" 2>/dev/null` if test "$?" -ne 0; then # on failure, ensure result is empty func_cygpath_result= fi else func_cygpath_result= func_error "LT_CYGPATH is empty or specifies non-existent file: \`$LT_CYGPATH'" fi } #end: func_cygpath # func_convert_core_msys_to_w32 ARG # Convert file name or path ARG from MSYS format to w32 format. Return # result in func_convert_core_msys_to_w32_result. func_convert_core_msys_to_w32 () { $opt_debug # awkward: cmd appends spaces to result func_convert_core_msys_to_w32_result=`( cmd //c echo "$1" ) 2>/dev/null | $SED -e 's/[ ]*$//' -e "$lt_sed_naive_backslashify"` } #end: func_convert_core_msys_to_w32 # func_convert_file_check ARG1 ARG2 # Verify that ARG1 (a file name in $build format) was converted to $host # format in ARG2. Otherwise, emit an error message, but continue (resetting # func_to_host_file_result to ARG1). func_convert_file_check () { $opt_debug if test -z "$2" && test -n "$1" ; then func_error "Could not determine host file name corresponding to" func_error " \`$1'" func_error "Continuing, but uninstalled executables may not work." # Fallback: func_to_host_file_result="$1" fi } # end func_convert_file_check # func_convert_path_check FROM_PATHSEP TO_PATHSEP FROM_PATH TO_PATH # Verify that FROM_PATH (a path in $build format) was converted to $host # format in TO_PATH. Otherwise, emit an error message, but continue, resetting # func_to_host_file_result to a simplistic fallback value (see below). func_convert_path_check () { $opt_debug if test -z "$4" && test -n "$3"; then func_error "Could not determine the host path corresponding to" func_error " \`$3'" func_error "Continuing, but uninstalled executables may not work." # Fallback. This is a deliberately simplistic "conversion" and # should not be "improved". See libtool.info. if test "x$1" != "x$2"; then lt_replace_pathsep_chars="s|$1|$2|g" func_to_host_path_result=`echo "$3" | $SED -e "$lt_replace_pathsep_chars"` else func_to_host_path_result="$3" fi fi } # end func_convert_path_check # func_convert_path_front_back_pathsep FRONTPAT BACKPAT REPL ORIG # Modifies func_to_host_path_result by prepending REPL if ORIG matches FRONTPAT # and appending REPL if ORIG matches BACKPAT. func_convert_path_front_back_pathsep () { $opt_debug case $4 in $1 ) func_to_host_path_result="$3$func_to_host_path_result" ;; esac case $4 in $2 ) func_append func_to_host_path_result "$3" ;; esac } # end func_convert_path_front_back_pathsep ################################################## # $build to $host FILE NAME CONVERSION FUNCTIONS # ################################################## # invoked via `$to_host_file_cmd ARG' # # In each case, ARG is the path to be converted from $build to $host format. # Result will be available in $func_to_host_file_result. # func_to_host_file ARG # Converts the file name ARG from $build format to $host format. Return result # in func_to_host_file_result. func_to_host_file () { $opt_debug $to_host_file_cmd "$1" } # end func_to_host_file # func_to_tool_file ARG LAZY # converts the file name ARG from $build format to toolchain format. Return # result in func_to_tool_file_result. If the conversion in use is listed # in (the comma separated) LAZY, no conversion takes place. func_to_tool_file () { $opt_debug case ,$2, in *,"$to_tool_file_cmd",*) func_to_tool_file_result=$1 ;; *) $to_tool_file_cmd "$1" func_to_tool_file_result=$func_to_host_file_result ;; esac } # end func_to_tool_file # func_convert_file_noop ARG # Copy ARG to func_to_host_file_result. func_convert_file_noop () { func_to_host_file_result="$1" } # end func_convert_file_noop # func_convert_file_msys_to_w32 ARG # Convert file name ARG from (mingw) MSYS to (mingw) w32 format; automatic # conversion to w32 is not available inside the cwrapper. Returns result in # func_to_host_file_result. func_convert_file_msys_to_w32 () { $opt_debug func_to_host_file_result="$1" if test -n "$1"; then func_convert_core_msys_to_w32 "$1" func_to_host_file_result="$func_convert_core_msys_to_w32_result" fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_msys_to_w32 # func_convert_file_cygwin_to_w32 ARG # Convert file name ARG from Cygwin to w32 format. Returns result in # func_to_host_file_result. func_convert_file_cygwin_to_w32 () { $opt_debug func_to_host_file_result="$1" if test -n "$1"; then # because $build is cygwin, we call "the" cygpath in $PATH; no need to use # LT_CYGPATH in this case. func_to_host_file_result=`cygpath -m "$1"` fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_cygwin_to_w32 # func_convert_file_nix_to_w32 ARG # Convert file name ARG from *nix to w32 format. Requires a wine environment # and a working winepath. Returns result in func_to_host_file_result. func_convert_file_nix_to_w32 () { $opt_debug func_to_host_file_result="$1" if test -n "$1"; then func_convert_core_file_wine_to_w32 "$1" func_to_host_file_result="$func_convert_core_file_wine_to_w32_result" fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_nix_to_w32 # func_convert_file_msys_to_cygwin ARG # Convert file name ARG from MSYS to Cygwin format. Requires LT_CYGPATH set. # Returns result in func_to_host_file_result. func_convert_file_msys_to_cygwin () { $opt_debug func_to_host_file_result="$1" if test -n "$1"; then func_convert_core_msys_to_w32 "$1" func_cygpath -u "$func_convert_core_msys_to_w32_result" func_to_host_file_result="$func_cygpath_result" fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_msys_to_cygwin # func_convert_file_nix_to_cygwin ARG # Convert file name ARG from *nix to Cygwin format. Requires Cygwin installed # in a wine environment, working winepath, and LT_CYGPATH set. Returns result # in func_to_host_file_result. func_convert_file_nix_to_cygwin () { $opt_debug func_to_host_file_result="$1" if test -n "$1"; then # convert from *nix to w32, then use cygpath to convert from w32 to cygwin. func_convert_core_file_wine_to_w32 "$1" func_cygpath -u "$func_convert_core_file_wine_to_w32_result" func_to_host_file_result="$func_cygpath_result" fi func_convert_file_check "$1" "$func_to_host_file_result" } # end func_convert_file_nix_to_cygwin ############################################# # $build to $host PATH CONVERSION FUNCTIONS # ############################################# # invoked via `$to_host_path_cmd ARG' # # In each case, ARG is the path to be converted from $build to $host format. # The result will be available in $func_to_host_path_result. # # Path separators are also converted from $build format to $host format. If # ARG begins or ends with a path separator character, it is preserved (but # converted to $host format) on output. # # All path conversion functions are named using the following convention: # file name conversion function : func_convert_file_X_to_Y () # path conversion function : func_convert_path_X_to_Y () # where, for any given $build/$host combination the 'X_to_Y' value is the # same. If conversion functions are added for new $build/$host combinations, # the two new functions must follow this pattern, or func_init_to_host_path_cmd # will break. # func_init_to_host_path_cmd # Ensures that function "pointer" variable $to_host_path_cmd is set to the # appropriate value, based on the value of $to_host_file_cmd. to_host_path_cmd= func_init_to_host_path_cmd () { $opt_debug if test -z "$to_host_path_cmd"; then func_stripname 'func_convert_file_' '' "$to_host_file_cmd" to_host_path_cmd="func_convert_path_${func_stripname_result}" fi } # func_to_host_path ARG # Converts the path ARG from $build format to $host format. Return result # in func_to_host_path_result. func_to_host_path () { $opt_debug func_init_to_host_path_cmd $to_host_path_cmd "$1" } # end func_to_host_path # func_convert_path_noop ARG # Copy ARG to func_to_host_path_result. func_convert_path_noop () { func_to_host_path_result="$1" } # end func_convert_path_noop # func_convert_path_msys_to_w32 ARG # Convert path ARG from (mingw) MSYS to (mingw) w32 format; automatic # conversion to w32 is not available inside the cwrapper. Returns result in # func_to_host_path_result. func_convert_path_msys_to_w32 () { $opt_debug func_to_host_path_result="$1" if test -n "$1"; then # Remove leading and trailing path separator characters from ARG. MSYS # behavior is inconsistent here; cygpath turns them into '.;' and ';.'; # and winepath ignores them completely. func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_msys_to_w32 "$func_to_host_path_tmp1" func_to_host_path_result="$func_convert_core_msys_to_w32_result" func_convert_path_check : ";" \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" fi } # end func_convert_path_msys_to_w32 # func_convert_path_cygwin_to_w32 ARG # Convert path ARG from Cygwin to w32 format. Returns result in # func_to_host_file_result. func_convert_path_cygwin_to_w32 () { $opt_debug func_to_host_path_result="$1" if test -n "$1"; then # See func_convert_path_msys_to_w32: func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_to_host_path_result=`cygpath -m -p "$func_to_host_path_tmp1"` func_convert_path_check : ";" \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" fi } # end func_convert_path_cygwin_to_w32 # func_convert_path_nix_to_w32 ARG # Convert path ARG from *nix to w32 format. Requires a wine environment and # a working winepath. Returns result in func_to_host_file_result. func_convert_path_nix_to_w32 () { $opt_debug func_to_host_path_result="$1" if test -n "$1"; then # See func_convert_path_msys_to_w32: func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_path_wine_to_w32 "$func_to_host_path_tmp1" func_to_host_path_result="$func_convert_core_path_wine_to_w32_result" func_convert_path_check : ";" \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" ";" "$1" fi } # end func_convert_path_nix_to_w32 # func_convert_path_msys_to_cygwin ARG # Convert path ARG from MSYS to Cygwin format. Requires LT_CYGPATH set. # Returns result in func_to_host_file_result. func_convert_path_msys_to_cygwin () { $opt_debug func_to_host_path_result="$1" if test -n "$1"; then # See func_convert_path_msys_to_w32: func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_msys_to_w32 "$func_to_host_path_tmp1" func_cygpath -u -p "$func_convert_core_msys_to_w32_result" func_to_host_path_result="$func_cygpath_result" func_convert_path_check : : \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" : "$1" fi } # end func_convert_path_msys_to_cygwin # func_convert_path_nix_to_cygwin ARG # Convert path ARG from *nix to Cygwin format. Requires Cygwin installed in a # a wine environment, working winepath, and LT_CYGPATH set. Returns result in # func_to_host_file_result. func_convert_path_nix_to_cygwin () { $opt_debug func_to_host_path_result="$1" if test -n "$1"; then # Remove leading and trailing path separator characters from # ARG. msys behavior is inconsistent here, cygpath turns them # into '.;' and ';.', and winepath ignores them completely. func_stripname : : "$1" func_to_host_path_tmp1=$func_stripname_result func_convert_core_path_wine_to_w32 "$func_to_host_path_tmp1" func_cygpath -u -p "$func_convert_core_path_wine_to_w32_result" func_to_host_path_result="$func_cygpath_result" func_convert_path_check : : \ "$func_to_host_path_tmp1" "$func_to_host_path_result" func_convert_path_front_back_pathsep ":*" "*:" : "$1" fi } # end func_convert_path_nix_to_cygwin # func_mode_compile arg... func_mode_compile () { $opt_debug # Get the compilation command and the source file. base_compile= srcfile="$nonopt" # always keep a non-empty value in "srcfile" suppress_opt=yes suppress_output= arg_mode=normal libobj= later= pie_flag= for arg do case $arg_mode in arg ) # do not "continue". Instead, add this to base_compile lastarg="$arg" arg_mode=normal ;; target ) libobj="$arg" arg_mode=normal continue ;; normal ) # Accept any command-line options. case $arg in -o) test -n "$libobj" && \ func_fatal_error "you cannot specify \`-o' more than once" arg_mode=target continue ;; -pie | -fpie | -fPIE) func_append pie_flag " $arg" continue ;; -shared | -static | -prefer-pic | -prefer-non-pic) func_append later " $arg" continue ;; -no-suppress) suppress_opt=no continue ;; -Xcompiler) arg_mode=arg # the next one goes into the "base_compile" arg list continue # The current "srcfile" will either be retained or ;; # replaced later. I would guess that would be a bug. -Wc,*) func_stripname '-Wc,' '' "$arg" args=$func_stripname_result lastarg= save_ifs="$IFS"; IFS=',' for arg in $args; do IFS="$save_ifs" func_append_quoted lastarg "$arg" done IFS="$save_ifs" func_stripname ' ' '' "$lastarg" lastarg=$func_stripname_result # Add the arguments to base_compile. func_append base_compile " $lastarg" continue ;; *) # Accept the current argument as the source file. # The previous "srcfile" becomes the current argument. # lastarg="$srcfile" srcfile="$arg" ;; esac # case $arg ;; esac # case $arg_mode # Aesthetically quote the previous argument. func_append_quoted base_compile "$lastarg" done # for arg case $arg_mode in arg) func_fatal_error "you must specify an argument for -Xcompile" ;; target) func_fatal_error "you must specify a target with \`-o'" ;; *) # Get the name of the library object. test -z "$libobj" && { func_basename "$srcfile" libobj="$func_basename_result" } ;; esac # Recognize several different file suffixes. # If the user specifies -o file.o, it is replaced with file.lo case $libobj in *.[cCFSifmso] | \ *.ada | *.adb | *.ads | *.asm | \ *.c++ | *.cc | *.ii | *.class | *.cpp | *.cxx | \ *.[fF][09]? | *.for | *.java | *.go | *.obj | *.sx | *.cu | *.cup) func_xform "$libobj" libobj=$func_xform_result ;; esac case $libobj in *.lo) func_lo2o "$libobj"; obj=$func_lo2o_result ;; *) func_fatal_error "cannot determine name of library object from \`$libobj'" ;; esac func_infer_tag $base_compile for arg in $later; do case $arg in -shared) test "$build_libtool_libs" != yes && \ func_fatal_configuration "can not build a shared library" build_old_libs=no continue ;; -static) build_libtool_libs=no build_old_libs=yes continue ;; -prefer-pic) pic_mode=yes continue ;; -prefer-non-pic) pic_mode=no continue ;; esac done func_quote_for_eval "$libobj" test "X$libobj" != "X$func_quote_for_eval_result" \ && $ECHO "X$libobj" | $GREP '[]~#^*{};<>?"'"'"' &()|`$[]' \ && func_warning "libobj name \`$libobj' may not contain shell special characters." func_dirname_and_basename "$obj" "/" "" objname="$func_basename_result" xdir="$func_dirname_result" lobj=${xdir}$objdir/$objname test -z "$base_compile" && \ func_fatal_help "you must specify a compilation command" # Delete any leftover library objects. if test "$build_old_libs" = yes; then removelist="$obj $lobj $libobj ${libobj}T" else removelist="$lobj $libobj ${libobj}T" fi # On Cygwin there's no "real" PIC flag so we must build both object types case $host_os in cygwin* | mingw* | pw32* | os2* | cegcc*) pic_mode=default ;; esac if test "$pic_mode" = no && test "$deplibs_check_method" != pass_all; then # non-PIC code in shared libraries is not supported pic_mode=default fi # Calculate the filename of the output object if compiler does # not support -o with -c if test "$compiler_c_o" = no; then output_obj=`$ECHO "$srcfile" | $SED 's%^.*/%%; s%\.[^.]*$%%'`.${objext} lockfile="$output_obj.lock" else output_obj= need_locks=no lockfile= fi # Lock this critical section if it is needed # We use this script file to make the link, it avoids creating a new file if test "$need_locks" = yes; then until $opt_dry_run || ln "$progpath" "$lockfile" 2>/dev/null; do func_echo "Waiting for $lockfile to be removed" sleep 2 done elif test "$need_locks" = warn; then if test -f "$lockfile"; then $ECHO "\ *** ERROR, $lockfile exists and contains: `cat $lockfile 2>/dev/null` This indicates that another process is trying to use the same temporary object file, and libtool could not work around it because your compiler does not support \`-c' and \`-o' together. If you repeat this compilation, it may succeed, by chance, but you had better avoid parallel builds (make -j) in this platform, or get a better compiler." $opt_dry_run || $RM $removelist exit $EXIT_FAILURE fi func_append removelist " $output_obj" $ECHO "$srcfile" > "$lockfile" fi $opt_dry_run || $RM $removelist func_append removelist " $lockfile" trap '$opt_dry_run || $RM $removelist; exit $EXIT_FAILURE' 1 2 15 func_to_tool_file "$srcfile" func_convert_file_msys_to_w32 srcfile=$func_to_tool_file_result func_quote_for_eval "$srcfile" qsrcfile=$func_quote_for_eval_result # Only build a PIC object if we are building libtool libraries. if test "$build_libtool_libs" = yes; then # Without this assignment, base_compile gets emptied. fbsd_hideous_sh_bug=$base_compile if test "$pic_mode" != no; then command="$base_compile $qsrcfile $pic_flag" else # Don't build PIC code command="$base_compile $qsrcfile" fi func_mkdir_p "$xdir$objdir" if test -z "$output_obj"; then # Place PIC objects in $objdir func_append command " -o $lobj" fi func_show_eval_locale "$command" \ 'test -n "$output_obj" && $RM $removelist; exit $EXIT_FAILURE' if test "$need_locks" = warn && test "X`cat $lockfile 2>/dev/null`" != "X$srcfile"; then $ECHO "\ *** ERROR, $lockfile contains: `cat $lockfile 2>/dev/null` but it should contain: $srcfile This indicates that another process is trying to use the same temporary object file, and libtool could not work around it because your compiler does not support \`-c' and \`-o' together. If you repeat this compilation, it may succeed, by chance, but you had better avoid parallel builds (make -j) in this platform, or get a better compiler." $opt_dry_run || $RM $removelist exit $EXIT_FAILURE fi # Just move the object if needed, then go on to compile the next one if test -n "$output_obj" && test "X$output_obj" != "X$lobj"; then func_show_eval '$MV "$output_obj" "$lobj"' \ 'error=$?; $opt_dry_run || $RM $removelist; exit $error' fi # Allow error messages only from the first compilation. if test "$suppress_opt" = yes; then suppress_output=' >/dev/null 2>&1' fi fi # Only build a position-dependent object if we build old libraries. if test "$build_old_libs" = yes; then if test "$pic_mode" != yes; then # Don't build PIC code command="$base_compile $qsrcfile$pie_flag" else command="$base_compile $qsrcfile $pic_flag" fi if test "$compiler_c_o" = yes; then func_append command " -o $obj" fi # Suppress compiler output if we already did a PIC compilation. func_append command "$suppress_output" func_show_eval_locale "$command" \ '$opt_dry_run || $RM $removelist; exit $EXIT_FAILURE' if test "$need_locks" = warn && test "X`cat $lockfile 2>/dev/null`" != "X$srcfile"; then $ECHO "\ *** ERROR, $lockfile contains: `cat $lockfile 2>/dev/null` but it should contain: $srcfile This indicates that another process is trying to use the same temporary object file, and libtool could not work around it because your compiler does not support \`-c' and \`-o' together. If you repeat this compilation, it may succeed, by chance, but you had better avoid parallel builds (make -j) in this platform, or get a better compiler." $opt_dry_run || $RM $removelist exit $EXIT_FAILURE fi # Just move the object if needed if test -n "$output_obj" && test "X$output_obj" != "X$obj"; then func_show_eval '$MV "$output_obj" "$obj"' \ 'error=$?; $opt_dry_run || $RM $removelist; exit $error' fi fi $opt_dry_run || { func_write_libtool_object "$libobj" "$objdir/$objname" "$objname" # Unlock the critical section if it was locked if test "$need_locks" != no; then removelist=$lockfile $RM "$lockfile" fi } exit $EXIT_SUCCESS } $opt_help || { test "$opt_mode" = compile && func_mode_compile ${1+"$@"} } func_mode_help () { # We need to display help for each of the modes. case $opt_mode in "") # Generic help is extracted from the usage comments # at the start of this file. func_help ;; clean) $ECHO \ "Usage: $progname [OPTION]... --mode=clean RM [RM-OPTION]... FILE... Remove files from the build directory. RM is the name of the program to use to delete files associated with each FILE (typically \`/bin/rm'). RM-OPTIONS are options (such as \`-f') to be passed to RM. If FILE is a libtool library, object or program, all the files associated with it are deleted. Otherwise, only FILE itself is deleted using RM." ;; compile) $ECHO \ "Usage: $progname [OPTION]... --mode=compile COMPILE-COMMAND... SOURCEFILE Compile a source file into a libtool library object. This mode accepts the following additional options: -o OUTPUT-FILE set the output file name to OUTPUT-FILE -no-suppress do not suppress compiler output for multiple passes -prefer-pic try to build PIC objects only -prefer-non-pic try to build non-PIC objects only -shared do not build a \`.o' file suitable for static linking -static only build a \`.o' file suitable for static linking -Wc,FLAG pass FLAG directly to the compiler COMPILE-COMMAND is a command to be used in creating a \`standard' object file from the given SOURCEFILE. The output file name is determined by removing the directory component from SOURCEFILE, then substituting the C source code suffix \`.c' with the library object suffix, \`.lo'." ;; execute) $ECHO \ "Usage: $progname [OPTION]... --mode=execute COMMAND [ARGS]... Automatically set library path, then run a program. This mode accepts the following additional options: -dlopen FILE add the directory containing FILE to the library path This mode sets the library path environment variable according to \`-dlopen' flags. If any of the ARGS are libtool executable wrappers, then they are translated into their corresponding uninstalled binary, and any of their required library directories are added to the library path. Then, COMMAND is executed, with ARGS as arguments." ;; finish) $ECHO \ "Usage: $progname [OPTION]... --mode=finish [LIBDIR]... Complete the installation of libtool libraries. Each LIBDIR is a directory that contains libtool libraries. The commands that this mode executes may require superuser privileges. Use the \`--dry-run' option if you just want to see what would be executed." ;; install) $ECHO \ "Usage: $progname [OPTION]... --mode=install INSTALL-COMMAND... Install executables or libraries. INSTALL-COMMAND is the installation command. The first component should be either the \`install' or \`cp' program. The following components of INSTALL-COMMAND are treated specially: -inst-prefix-dir PREFIX-DIR Use PREFIX-DIR as a staging area for installation The rest of the components are interpreted as arguments to that command (only BSD-compatible install options are recognized)." ;; link) $ECHO \ "Usage: $progname [OPTION]... --mode=link LINK-COMMAND... Link object files or libraries together to form another library, or to create an executable program. LINK-COMMAND is a command using the C compiler that you would use to create a program from several object files. The following components of LINK-COMMAND are treated specially: -all-static do not do any dynamic linking at all -avoid-version do not add a version suffix if possible -bindir BINDIR specify path to binaries directory (for systems where libraries must be found in the PATH setting at runtime) -dlopen FILE \`-dlpreopen' FILE if it cannot be dlopened at runtime -dlpreopen FILE link in FILE and add its symbols to lt_preloaded_symbols -export-dynamic allow symbols from OUTPUT-FILE to be resolved with dlsym(3) -export-symbols SYMFILE try to export only the symbols listed in SYMFILE -export-symbols-regex REGEX try to export only the symbols matching REGEX -LLIBDIR search LIBDIR for required installed libraries -lNAME OUTPUT-FILE requires the installed library libNAME -module build a library that can dlopened -no-fast-install disable the fast-install mode -no-install link a not-installable executable -no-undefined declare that a library does not refer to external symbols -o OUTPUT-FILE create OUTPUT-FILE from the specified objects -objectlist FILE Use a list of object files found in FILE to specify objects -precious-files-regex REGEX don't remove output files matching REGEX -release RELEASE specify package release information -rpath LIBDIR the created library will eventually be installed in LIBDIR -R[ ]LIBDIR add LIBDIR to the runtime path of programs and libraries -shared only do dynamic linking of libtool libraries -shrext SUFFIX override the standard shared library file extension -static do not do any dynamic linking of uninstalled libtool libraries -static-libtool-libs do not do any dynamic linking of libtool libraries -version-info CURRENT[:REVISION[:AGE]] specify library version info [each variable defaults to 0] -weak LIBNAME declare that the target provides the LIBNAME interface -Wc,FLAG -Xcompiler FLAG pass linker-specific FLAG directly to the compiler -Wl,FLAG -Xlinker FLAG pass linker-specific FLAG directly to the linker -XCClinker FLAG pass link-specific FLAG to the compiler driver (CC) All other options (arguments beginning with \`-') are ignored. Every other argument is treated as a filename. Files ending in \`.la' are treated as uninstalled libtool libraries, other files are standard or library object files. If the OUTPUT-FILE ends in \`.la', then a libtool library is created, only library objects (\`.lo' files) may be specified, and \`-rpath' is required, except when creating a convenience library. If OUTPUT-FILE ends in \`.a' or \`.lib', then a standard library is created using \`ar' and \`ranlib', or on Windows using \`lib'. If OUTPUT-FILE ends in \`.lo' or \`.${objext}', then a reloadable object file is created, otherwise an executable program is created." ;; uninstall) $ECHO \ "Usage: $progname [OPTION]... --mode=uninstall RM [RM-OPTION]... FILE... Remove libraries from an installation directory. RM is the name of the program to use to delete files associated with each FILE (typically \`/bin/rm'). RM-OPTIONS are options (such as \`-f') to be passed to RM. If FILE is a libtool library, all the files associated with it are deleted. Otherwise, only FILE itself is deleted using RM." ;; *) func_fatal_help "invalid operation mode \`$opt_mode'" ;; esac echo $ECHO "Try \`$progname --help' for more information about other modes." } # Now that we've collected a possible --mode arg, show help if necessary if $opt_help; then if test "$opt_help" = :; then func_mode_help else { func_help noexit for opt_mode in compile link execute install finish uninstall clean; do func_mode_help done } | sed -n '1p; 2,$s/^Usage:/ or: /p' { func_help noexit for opt_mode in compile link execute install finish uninstall clean; do echo func_mode_help done } | sed '1d /^When reporting/,/^Report/{ H d } $x /information about other modes/d /more detailed .*MODE/d s/^Usage:.*--mode=\([^ ]*\) .*/Description of \1 mode:/' fi exit $? fi # func_mode_execute arg... func_mode_execute () { $opt_debug # The first argument is the command name. cmd="$nonopt" test -z "$cmd" && \ func_fatal_help "you must specify a COMMAND" # Handle -dlopen flags immediately. for file in $opt_dlopen; do test -f "$file" \ || func_fatal_help "\`$file' is not a file" dir= case $file in *.la) func_resolve_sysroot "$file" file=$func_resolve_sysroot_result # Check to see that this really is a libtool archive. func_lalib_unsafe_p "$file" \ || func_fatal_help "\`$lib' is not a valid libtool archive" # Read the libtool library. dlname= library_names= func_source "$file" # Skip this library if it cannot be dlopened. if test -z "$dlname"; then # Warn if it was a shared library. test -n "$library_names" && \ func_warning "\`$file' was not linked with \`-export-dynamic'" continue fi func_dirname "$file" "" "." dir="$func_dirname_result" if test -f "$dir/$objdir/$dlname"; then func_append dir "/$objdir" else if test ! -f "$dir/$dlname"; then func_fatal_error "cannot find \`$dlname' in \`$dir' or \`$dir/$objdir'" fi fi ;; *.lo) # Just add the directory containing the .lo file. func_dirname "$file" "" "." dir="$func_dirname_result" ;; *) func_warning "\`-dlopen' is ignored for non-libtool libraries and objects" continue ;; esac # Get the absolute pathname. absdir=`cd "$dir" && pwd` test -n "$absdir" && dir="$absdir" # Now add the directory to shlibpath_var. if eval "test -z \"\$$shlibpath_var\""; then eval "$shlibpath_var=\"\$dir\"" else eval "$shlibpath_var=\"\$dir:\$$shlibpath_var\"" fi done # This variable tells wrapper scripts just to set shlibpath_var # rather than running their programs. libtool_execute_magic="$magic" # Check if any of the arguments is a wrapper script. args= for file do case $file in -* | *.la | *.lo ) ;; *) # Do a test to see if this is really a libtool program. if func_ltwrapper_script_p "$file"; then func_source "$file" # Transform arg to wrapped name. file="$progdir/$program" elif func_ltwrapper_executable_p "$file"; then func_ltwrapper_scriptname "$file" func_source "$func_ltwrapper_scriptname_result" # Transform arg to wrapped name. file="$progdir/$program" fi ;; esac # Quote arguments (to preserve shell metacharacters). func_append_quoted args "$file" done if test "X$opt_dry_run" = Xfalse; then if test -n "$shlibpath_var"; then # Export the shlibpath_var. eval "export $shlibpath_var" fi # Restore saved environment variables for lt_var in LANG LANGUAGE LC_ALL LC_CTYPE LC_COLLATE LC_MESSAGES do eval "if test \"\${save_$lt_var+set}\" = set; then $lt_var=\$save_$lt_var; export $lt_var else $lt_unset $lt_var fi" done # Now prepare to actually exec the command. exec_cmd="\$cmd$args" else # Display what would be done. if test -n "$shlibpath_var"; then eval "\$ECHO \"\$shlibpath_var=\$$shlibpath_var\"" echo "export $shlibpath_var" fi $ECHO "$cmd$args" exit $EXIT_SUCCESS fi } test "$opt_mode" = execute && func_mode_execute ${1+"$@"} # func_mode_finish arg... func_mode_finish () { $opt_debug libs= libdirs= admincmds= for opt in "$nonopt" ${1+"$@"} do if test -d "$opt"; then func_append libdirs " $opt" elif test -f "$opt"; then if func_lalib_unsafe_p "$opt"; then func_append libs " $opt" else func_warning "\`$opt' is not a valid libtool archive" fi else func_fatal_error "invalid argument \`$opt'" fi done if test -n "$libs"; then if test -n "$lt_sysroot"; then sysroot_regex=`$ECHO "$lt_sysroot" | $SED "$sed_make_literal_regex"` sysroot_cmd="s/\([ ']\)$sysroot_regex/\1/g;" else sysroot_cmd= fi # Remove sysroot references if $opt_dry_run; then for lib in $libs; do echo "removing references to $lt_sysroot and \`=' prefixes from $lib" done else tmpdir=`func_mktempdir` for lib in $libs; do sed -e "${sysroot_cmd} s/\([ ']-[LR]\)=/\1/g; s/\([ ']\)=/\1/g" $lib \ > $tmpdir/tmp-la mv -f $tmpdir/tmp-la $lib done ${RM}r "$tmpdir" fi fi if test -n "$finish_cmds$finish_eval" && test -n "$libdirs"; then for libdir in $libdirs; do if test -n "$finish_cmds"; then # Do each command in the finish commands. func_execute_cmds "$finish_cmds" 'admincmds="$admincmds '"$cmd"'"' fi if test -n "$finish_eval"; then # Do the single finish_eval. eval cmds=\"$finish_eval\" $opt_dry_run || eval "$cmds" || func_append admincmds " $cmds" fi done fi # Exit here if they wanted silent mode. $opt_silent && exit $EXIT_SUCCESS if test -n "$finish_cmds$finish_eval" && test -n "$libdirs"; then echo "----------------------------------------------------------------------" echo "Libraries have been installed in:" for libdir in $libdirs; do $ECHO " $libdir" done echo echo "If you ever happen to want to link against installed libraries" echo "in a given directory, LIBDIR, you must either use libtool, and" echo "specify the full pathname of the library, or use the \`-LLIBDIR'" echo "flag during linking and do at least one of the following:" if test -n "$shlibpath_var"; then echo " - add LIBDIR to the \`$shlibpath_var' environment variable" echo " during execution" fi if test -n "$runpath_var"; then echo " - add LIBDIR to the \`$runpath_var' environment variable" echo " during linking" fi if test -n "$hardcode_libdir_flag_spec"; then libdir=LIBDIR eval flag=\"$hardcode_libdir_flag_spec\" $ECHO " - use the \`$flag' linker flag" fi if test -n "$admincmds"; then $ECHO " - have your system administrator run these commands:$admincmds" fi if test -f /etc/ld.so.conf; then echo " - have your system administrator add LIBDIR to \`/etc/ld.so.conf'" fi echo echo "See any operating system documentation about shared libraries for" case $host in solaris2.[6789]|solaris2.1[0-9]) echo "more information, such as the ld(1), crle(1) and ld.so(8) manual" echo "pages." ;; *) echo "more information, such as the ld(1) and ld.so(8) manual pages." ;; esac echo "----------------------------------------------------------------------" fi exit $EXIT_SUCCESS } test "$opt_mode" = finish && func_mode_finish ${1+"$@"} # func_mode_install arg... func_mode_install () { $opt_debug # There may be an optional sh(1) argument at the beginning of # install_prog (especially on Windows NT). if test "$nonopt" = "$SHELL" || test "$nonopt" = /bin/sh || # Allow the use of GNU shtool's install command. case $nonopt in *shtool*) :;; *) false;; esac; then # Aesthetically quote it. func_quote_for_eval "$nonopt" install_prog="$func_quote_for_eval_result " arg=$1 shift else install_prog= arg=$nonopt fi # The real first argument should be the name of the installation program. # Aesthetically quote it. func_quote_for_eval "$arg" func_append install_prog "$func_quote_for_eval_result" install_shared_prog=$install_prog case " $install_prog " in *[\\\ /]cp\ *) install_cp=: ;; *) install_cp=false ;; esac # We need to accept at least all the BSD install flags. dest= files= opts= prev= install_type= isdir=no stripme= no_mode=: for arg do arg2= if test -n "$dest"; then func_append files " $dest" dest=$arg continue fi case $arg in -d) isdir=yes ;; -f) if $install_cp; then :; else prev=$arg fi ;; -g | -m | -o) prev=$arg ;; -s) stripme=" -s" continue ;; -*) ;; *) # If the previous option needed an argument, then skip it. if test -n "$prev"; then if test "x$prev" = x-m && test -n "$install_override_mode"; then arg2=$install_override_mode no_mode=false fi prev= else dest=$arg continue fi ;; esac # Aesthetically quote the argument. func_quote_for_eval "$arg" func_append install_prog " $func_quote_for_eval_result" if test -n "$arg2"; then func_quote_for_eval "$arg2" fi func_append install_shared_prog " $func_quote_for_eval_result" done test -z "$install_prog" && \ func_fatal_help "you must specify an install program" test -n "$prev" && \ func_fatal_help "the \`$prev' option requires an argument" if test -n "$install_override_mode" && $no_mode; then if $install_cp; then :; else func_quote_for_eval "$install_override_mode" func_append install_shared_prog " -m $func_quote_for_eval_result" fi fi if test -z "$files"; then if test -z "$dest"; then func_fatal_help "no file or destination specified" else func_fatal_help "you must specify a destination" fi fi # Strip any trailing slash from the destination. func_stripname '' '/' "$dest" dest=$func_stripname_result # Check to see that the destination is a directory. test -d "$dest" && isdir=yes if test "$isdir" = yes; then destdir="$dest" destname= else func_dirname_and_basename "$dest" "" "." destdir="$func_dirname_result" destname="$func_basename_result" # Not a directory, so check to see that there is only one file specified. set dummy $files; shift test "$#" -gt 1 && \ func_fatal_help "\`$dest' is not a directory" fi case $destdir in [\\/]* | [A-Za-z]:[\\/]*) ;; *) for file in $files; do case $file in *.lo) ;; *) func_fatal_help "\`$destdir' must be an absolute directory name" ;; esac done ;; esac # This variable tells wrapper scripts just to set variables rather # than running their programs. libtool_install_magic="$magic" staticlibs= future_libdirs= current_libdirs= for file in $files; do # Do each installation. case $file in *.$libext) # Do the static libraries later. func_append staticlibs " $file" ;; *.la) func_resolve_sysroot "$file" file=$func_resolve_sysroot_result # Check to see that this really is a libtool archive. func_lalib_unsafe_p "$file" \ || func_fatal_help "\`$file' is not a valid libtool archive" library_names= old_library= relink_command= func_source "$file" # Add the libdir to current_libdirs if it is the destination. if test "X$destdir" = "X$libdir"; then case "$current_libdirs " in *" $libdir "*) ;; *) func_append current_libdirs " $libdir" ;; esac else # Note the libdir as a future libdir. case "$future_libdirs " in *" $libdir "*) ;; *) func_append future_libdirs " $libdir" ;; esac fi func_dirname "$file" "/" "" dir="$func_dirname_result" func_append dir "$objdir" if test -n "$relink_command"; then # Determine the prefix the user has applied to our future dir. inst_prefix_dir=`$ECHO "$destdir" | $SED -e "s%$libdir\$%%"` # Don't allow the user to place us outside of our expected # location b/c this prevents finding dependent libraries that # are installed to the same prefix. # At present, this check doesn't affect windows .dll's that # are installed into $libdir/../bin (currently, that works fine) # but it's something to keep an eye on. test "$inst_prefix_dir" = "$destdir" && \ func_fatal_error "error: cannot install \`$file' to a directory not ending in $libdir" if test -n "$inst_prefix_dir"; then # Stick the inst_prefix_dir data into the link command. relink_command=`$ECHO "$relink_command" | $SED "s%@inst_prefix_dir@%-inst-prefix-dir $inst_prefix_dir%"` else relink_command=`$ECHO "$relink_command" | $SED "s%@inst_prefix_dir@%%"` fi func_warning "relinking \`$file'" func_show_eval "$relink_command" \ 'func_fatal_error "error: relink \`$file'\'' with the above command before installing it"' fi # See the names of the shared library. set dummy $library_names; shift if test -n "$1"; then realname="$1" shift srcname="$realname" test -n "$relink_command" && srcname="$realname"T # Install the shared library and build the symlinks. func_show_eval "$install_shared_prog $dir/$srcname $destdir/$realname" \ 'exit $?' tstripme="$stripme" case $host_os in cygwin* | mingw* | pw32* | cegcc*) case $realname in *.dll.a) tstripme="" ;; esac ;; esac if test -n "$tstripme" && test -n "$striplib"; then func_show_eval "$striplib $destdir/$realname" 'exit $?' fi if test "$#" -gt 0; then # Delete the old symlinks, and create new ones. # Try `ln -sf' first, because the `ln' binary might depend on # the symlink we replace! Solaris /bin/ln does not understand -f, # so we also need to try rm && ln -s. for linkname do test "$linkname" != "$realname" \ && func_show_eval "(cd $destdir && { $LN_S -f $realname $linkname || { $RM $linkname && $LN_S $realname $linkname; }; })" done fi # Do each command in the postinstall commands. lib="$destdir/$realname" func_execute_cmds "$postinstall_cmds" 'exit $?' fi # Install the pseudo-library for information purposes. func_basename "$file" name="$func_basename_result" instname="$dir/$name"i func_show_eval "$install_prog $instname $destdir/$name" 'exit $?' # Maybe install the static library, too. test -n "$old_library" && func_append staticlibs " $dir/$old_library" ;; *.lo) # Install (i.e. copy) a libtool object. # Figure out destination file name, if it wasn't already specified. if test -n "$destname"; then destfile="$destdir/$destname" else func_basename "$file" destfile="$func_basename_result" destfile="$destdir/$destfile" fi # Deduce the name of the destination old-style object file. case $destfile in *.lo) func_lo2o "$destfile" staticdest=$func_lo2o_result ;; *.$objext) staticdest="$destfile" destfile= ;; *) func_fatal_help "cannot copy a libtool object to \`$destfile'" ;; esac # Install the libtool object if requested. test -n "$destfile" && \ func_show_eval "$install_prog $file $destfile" 'exit $?' # Install the old object if enabled. if test "$build_old_libs" = yes; then # Deduce the name of the old-style object file. func_lo2o "$file" staticobj=$func_lo2o_result func_show_eval "$install_prog \$staticobj \$staticdest" 'exit $?' fi exit $EXIT_SUCCESS ;; *) # Figure out destination file name, if it wasn't already specified. if test -n "$destname"; then destfile="$destdir/$destname" else func_basename "$file" destfile="$func_basename_result" destfile="$destdir/$destfile" fi # If the file is missing, and there is a .exe on the end, strip it # because it is most likely a libtool script we actually want to # install stripped_ext="" case $file in *.exe) if test ! -f "$file"; then func_stripname '' '.exe' "$file" file=$func_stripname_result stripped_ext=".exe" fi ;; esac # Do a test to see if this is really a libtool program. case $host in *cygwin* | *mingw*) if func_ltwrapper_executable_p "$file"; then func_ltwrapper_scriptname "$file" wrapper=$func_ltwrapper_scriptname_result else func_stripname '' '.exe' "$file" wrapper=$func_stripname_result fi ;; *) wrapper=$file ;; esac if func_ltwrapper_script_p "$wrapper"; then notinst_deplibs= relink_command= func_source "$wrapper" # Check the variables that should have been set. test -z "$generated_by_libtool_version" && \ func_fatal_error "invalid libtool wrapper script \`$wrapper'" finalize=yes for lib in $notinst_deplibs; do # Check to see that each library is installed. libdir= if test -f "$lib"; then func_source "$lib" fi libfile="$libdir/"`$ECHO "$lib" | $SED 's%^.*/%%g'` ### testsuite: skip nested quoting test if test -n "$libdir" && test ! -f "$libfile"; then func_warning "\`$lib' has not been installed in \`$libdir'" finalize=no fi done relink_command= func_source "$wrapper" outputname= if test "$fast_install" = no && test -n "$relink_command"; then $opt_dry_run || { if test "$finalize" = yes; then tmpdir=`func_mktempdir` func_basename "$file$stripped_ext" file="$func_basename_result" outputname="$tmpdir/$file" # Replace the output file specification. relink_command=`$ECHO "$relink_command" | $SED 's%@OUTPUT@%'"$outputname"'%g'` $opt_silent || { func_quote_for_expand "$relink_command" eval "func_echo $func_quote_for_expand_result" } if eval "$relink_command"; then : else func_error "error: relink \`$file' with the above command before installing it" $opt_dry_run || ${RM}r "$tmpdir" continue fi file="$outputname" else func_warning "cannot relink \`$file'" fi } else # Install the binary that we compiled earlier. file=`$ECHO "$file$stripped_ext" | $SED "s%\([^/]*\)$%$objdir/\1%"` fi fi # remove .exe since cygwin /usr/bin/install will append another # one anyway case $install_prog,$host in */usr/bin/install*,*cygwin*) case $file:$destfile in *.exe:*.exe) # this is ok ;; *.exe:*) destfile=$destfile.exe ;; *:*.exe) func_stripname '' '.exe' "$destfile" destfile=$func_stripname_result ;; esac ;; esac func_show_eval "$install_prog\$stripme \$file \$destfile" 'exit $?' $opt_dry_run || if test -n "$outputname"; then ${RM}r "$tmpdir" fi ;; esac done for file in $staticlibs; do func_basename "$file" name="$func_basename_result" # Set up the ranlib parameters. oldlib="$destdir/$name" func_to_tool_file "$oldlib" func_convert_file_msys_to_w32 tool_oldlib=$func_to_tool_file_result func_show_eval "$install_prog \$file \$oldlib" 'exit $?' if test -n "$stripme" && test -n "$old_striplib"; then func_show_eval "$old_striplib $tool_oldlib" 'exit $?' fi # Do each command in the postinstall commands. func_execute_cmds "$old_postinstall_cmds" 'exit $?' done test -n "$future_libdirs" && \ func_warning "remember to run \`$progname --finish$future_libdirs'" if test -n "$current_libdirs"; then # Maybe just do a dry run. $opt_dry_run && current_libdirs=" -n$current_libdirs" exec_cmd='$SHELL $progpath $preserve_args --finish$current_libdirs' else exit $EXIT_SUCCESS fi } test "$opt_mode" = install && func_mode_install ${1+"$@"} # func_generate_dlsyms outputname originator pic_p # Extract symbols from dlprefiles and create ${outputname}S.o with # a dlpreopen symbol table. func_generate_dlsyms () { $opt_debug my_outputname="$1" my_originator="$2" my_pic_p="${3-no}" my_prefix=`$ECHO "$my_originator" | sed 's%[^a-zA-Z0-9]%_%g'` my_dlsyms= if test -n "$dlfiles$dlprefiles" || test "$dlself" != no; then if test -n "$NM" && test -n "$global_symbol_pipe"; then my_dlsyms="${my_outputname}S.c" else func_error "not configured to extract global symbols from dlpreopened files" fi fi if test -n "$my_dlsyms"; then case $my_dlsyms in "") ;; *.c) # Discover the nlist of each of the dlfiles. nlist="$output_objdir/${my_outputname}.nm" func_show_eval "$RM $nlist ${nlist}S ${nlist}T" # Parse the name list into a source file. func_verbose "creating $output_objdir/$my_dlsyms" $opt_dry_run || $ECHO > "$output_objdir/$my_dlsyms" "\ /* $my_dlsyms - symbol resolution table for \`$my_outputname' dlsym emulation. */ /* Generated by $PROGRAM (GNU $PACKAGE$TIMESTAMP) $VERSION */ #ifdef __cplusplus extern \"C\" { #endif #if defined(__GNUC__) && (((__GNUC__ == 4) && (__GNUC_MINOR__ >= 4)) || (__GNUC__ > 4)) #pragma GCC diagnostic ignored \"-Wstrict-prototypes\" #endif /* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests. */ #if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE) /* DATA imports from DLLs on WIN32 con't be const, because runtime relocations are performed -- see ld's documentation on pseudo-relocs. */ # define LT_DLSYM_CONST #elif defined(__osf__) /* This system does not cope well with relocations in const data. */ # define LT_DLSYM_CONST #else # define LT_DLSYM_CONST const #endif /* External symbol declarations for the compiler. */\ " if test "$dlself" = yes; then func_verbose "generating symbol list for \`$output'" $opt_dry_run || echo ': @PROGRAM@ ' > "$nlist" # Add our own program objects to the symbol list. progfiles=`$ECHO "$objs$old_deplibs" | $SP2NL | $SED "$lo2o" | $NL2SP` for progfile in $progfiles; do func_to_tool_file "$progfile" func_convert_file_msys_to_w32 func_verbose "extracting global C symbols from \`$func_to_tool_file_result'" $opt_dry_run || eval "$NM $func_to_tool_file_result | $global_symbol_pipe >> '$nlist'" done if test -n "$exclude_expsyms"; then $opt_dry_run || { eval '$EGREP -v " ($exclude_expsyms)$" "$nlist" > "$nlist"T' eval '$MV "$nlist"T "$nlist"' } fi if test -n "$export_symbols_regex"; then $opt_dry_run || { eval '$EGREP -e "$export_symbols_regex" "$nlist" > "$nlist"T' eval '$MV "$nlist"T "$nlist"' } fi # Prepare the list of exported symbols if test -z "$export_symbols"; then export_symbols="$output_objdir/$outputname.exp" $opt_dry_run || { $RM $export_symbols eval "${SED} -n -e '/^: @PROGRAM@ $/d' -e 's/^.* \(.*\)$/\1/p' "'< "$nlist" > "$export_symbols"' case $host in *cygwin* | *mingw* | *cegcc* ) eval "echo EXPORTS "'> "$output_objdir/$outputname.def"' eval 'cat "$export_symbols" >> "$output_objdir/$outputname.def"' ;; esac } else $opt_dry_run || { eval "${SED} -e 's/\([].[*^$]\)/\\\\\1/g' -e 's/^/ /' -e 's/$/$/'"' < "$export_symbols" > "$output_objdir/$outputname.exp"' eval '$GREP -f "$output_objdir/$outputname.exp" < "$nlist" > "$nlist"T' eval '$MV "$nlist"T "$nlist"' case $host in *cygwin* | *mingw* | *cegcc* ) eval "echo EXPORTS "'> "$output_objdir/$outputname.def"' eval 'cat "$nlist" >> "$output_objdir/$outputname.def"' ;; esac } fi fi for dlprefile in $dlprefiles; do func_verbose "extracting global C symbols from \`$dlprefile'" func_basename "$dlprefile" name="$func_basename_result" case $host in *cygwin* | *mingw* | *cegcc* ) # if an import library, we need to obtain dlname if func_win32_import_lib_p "$dlprefile"; then func_tr_sh "$dlprefile" eval "curr_lafile=\$libfile_$func_tr_sh_result" dlprefile_dlbasename="" if test -n "$curr_lafile" && func_lalib_p "$curr_lafile"; then # Use subshell, to avoid clobbering current variable values dlprefile_dlname=`source "$curr_lafile" && echo "$dlname"` if test -n "$dlprefile_dlname" ; then func_basename "$dlprefile_dlname" dlprefile_dlbasename="$func_basename_result" else # no lafile. user explicitly requested -dlpreopen . $sharedlib_from_linklib_cmd "$dlprefile" dlprefile_dlbasename=$sharedlib_from_linklib_result fi fi $opt_dry_run || { if test -n "$dlprefile_dlbasename" ; then eval '$ECHO ": $dlprefile_dlbasename" >> "$nlist"' else func_warning "Could not compute DLL name from $name" eval '$ECHO ": $name " >> "$nlist"' fi func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe | $SED -e '/I __imp/d' -e 's/I __nm_/D /;s/_nm__//' >> '$nlist'" } else # not an import lib $opt_dry_run || { eval '$ECHO ": $name " >> "$nlist"' func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe >> '$nlist'" } fi ;; *) $opt_dry_run || { eval '$ECHO ": $name " >> "$nlist"' func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32 eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe >> '$nlist'" } ;; esac done $opt_dry_run || { # Make sure we have at least an empty file. test -f "$nlist" || : > "$nlist" if test -n "$exclude_expsyms"; then $EGREP -v " ($exclude_expsyms)$" "$nlist" > "$nlist"T $MV "$nlist"T "$nlist" fi # Try sorting and uniquifying the output. if $GREP -v "^: " < "$nlist" | if sort -k 3 /dev/null 2>&1; then sort -k 3 else sort +2 fi | uniq > "$nlist"S; then : else $GREP -v "^: " < "$nlist" > "$nlist"S fi if test -f "$nlist"S; then eval "$global_symbol_to_cdecl"' < "$nlist"S >> "$output_objdir/$my_dlsyms"' else echo '/* NONE */' >> "$output_objdir/$my_dlsyms" fi echo >> "$output_objdir/$my_dlsyms" "\ /* The mapping between symbol names and symbols. */ typedef struct { const char *name; void *address; } lt_dlsymlist; extern LT_DLSYM_CONST lt_dlsymlist lt_${my_prefix}_LTX_preloaded_symbols[]; LT_DLSYM_CONST lt_dlsymlist lt_${my_prefix}_LTX_preloaded_symbols[] = {\ { \"$my_originator\", (void *) 0 }," case $need_lib_prefix in no) eval "$global_symbol_to_c_name_address" < "$nlist" >> "$output_objdir/$my_dlsyms" ;; *) eval "$global_symbol_to_c_name_address_lib_prefix" < "$nlist" >> "$output_objdir/$my_dlsyms" ;; esac echo >> "$output_objdir/$my_dlsyms" "\ {0, (void *) 0} }; /* This works around a problem in FreeBSD linker */ #ifdef FREEBSD_WORKAROUND static const void *lt_preloaded_setup() { return lt_${my_prefix}_LTX_preloaded_symbols; } #endif #ifdef __cplusplus } #endif\ " } # !$opt_dry_run pic_flag_for_symtable= case "$compile_command " in *" -static "*) ;; *) case $host in # compiling the symbol table file with pic_flag works around # a FreeBSD bug that causes programs to crash when -lm is # linked before any other PIC object. But we must not use # pic_flag when linking with -static. The problem exists in # FreeBSD 2.2.6 and is fixed in FreeBSD 3.1. *-*-freebsd2.*|*-*-freebsd3.0*|*-*-freebsdelf3.0*) pic_flag_for_symtable=" $pic_flag -DFREEBSD_WORKAROUND" ;; *-*-hpux*) pic_flag_for_symtable=" $pic_flag" ;; *) if test "X$my_pic_p" != Xno; then pic_flag_for_symtable=" $pic_flag" fi ;; esac ;; esac symtab_cflags= for arg in $LTCFLAGS; do case $arg in -pie | -fpie | -fPIE) ;; *) func_append symtab_cflags " $arg" ;; esac done # Now compile the dynamic symbol file. func_show_eval '(cd $output_objdir && $LTCC$symtab_cflags -c$no_builtin_flag$pic_flag_for_symtable "$my_dlsyms")' 'exit $?' # Clean up the generated files. func_show_eval '$RM "$output_objdir/$my_dlsyms" "$nlist" "${nlist}S" "${nlist}T"' # Transform the symbol file into the correct name. symfileobj="$output_objdir/${my_outputname}S.$objext" case $host in *cygwin* | *mingw* | *cegcc* ) if test -f "$output_objdir/$my_outputname.def"; then compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"` finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"` else compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$symfileobj%"` finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$symfileobj%"` fi ;; *) compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$symfileobj%"` finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$symfileobj%"` ;; esac ;; *) func_fatal_error "unknown suffix for \`$my_dlsyms'" ;; esac else # We keep going just in case the user didn't refer to # lt_preloaded_symbols. The linker will fail if global_symbol_pipe # really was required. # Nullify the symbol file. compile_command=`$ECHO "$compile_command" | $SED "s% @SYMFILE@%%"` finalize_command=`$ECHO "$finalize_command" | $SED "s% @SYMFILE@%%"` fi } # func_win32_libid arg # return the library type of file 'arg' # # Need a lot of goo to handle *both* DLLs and import libs # Has to be a shell function in order to 'eat' the argument # that is supplied when $file_magic_command is called. # Despite the name, also deal with 64 bit binaries. func_win32_libid () { $opt_debug win32_libid_type="unknown" win32_fileres=`file -L $1 2>/dev/null` case $win32_fileres in *ar\ archive\ import\ library*) # definitely import win32_libid_type="x86 archive import" ;; *ar\ archive*) # could be an import, or static # Keep the egrep pattern in sync with the one in _LT_CHECK_MAGIC_METHOD. if eval $OBJDUMP -f $1 | $SED -e '10q' 2>/dev/null | $EGREP 'file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)' >/dev/null; then func_to_tool_file "$1" func_convert_file_msys_to_w32 win32_nmres=`eval $NM -f posix -A \"$func_to_tool_file_result\" | $SED -n -e ' 1,100{ / I /{ s,.*,import, p q } }'` case $win32_nmres in import*) win32_libid_type="x86 archive import";; *) win32_libid_type="x86 archive static";; esac fi ;; *DLL*) win32_libid_type="x86 DLL" ;; *executable*) # but shell scripts are "executable" too... case $win32_fileres in *MS\ Windows\ PE\ Intel*) win32_libid_type="x86 DLL" ;; esac ;; esac $ECHO "$win32_libid_type" } # func_cygming_dll_for_implib ARG # # Platform-specific function to extract the # name of the DLL associated with the specified # import library ARG. # Invoked by eval'ing the libtool variable # $sharedlib_from_linklib_cmd # Result is available in the variable # $sharedlib_from_linklib_result func_cygming_dll_for_implib () { $opt_debug sharedlib_from_linklib_result=`$DLLTOOL --identify-strict --identify "$1"` } # func_cygming_dll_for_implib_fallback_core SECTION_NAME LIBNAMEs # # The is the core of a fallback implementation of a # platform-specific function to extract the name of the # DLL associated with the specified import library LIBNAME. # # SECTION_NAME is either .idata$6 or .idata$7, depending # on the platform and compiler that created the implib. # # Echos the name of the DLL associated with the # specified import library. func_cygming_dll_for_implib_fallback_core () { $opt_debug match_literal=`$ECHO "$1" | $SED "$sed_make_literal_regex"` $OBJDUMP -s --section "$1" "$2" 2>/dev/null | $SED '/^Contents of section '"$match_literal"':/{ # Place marker at beginning of archive member dllname section s/.*/====MARK====/ p d } # These lines can sometimes be longer than 43 characters, but # are always uninteresting /:[ ]*file format pe[i]\{,1\}-/d /^In archive [^:]*:/d # Ensure marker is printed /^====MARK====/p # Remove all lines with less than 43 characters /^.\{43\}/!d # From remaining lines, remove first 43 characters s/^.\{43\}//' | $SED -n ' # Join marker and all lines until next marker into a single line /^====MARK====/ b para H $ b para b :para x s/\n//g # Remove the marker s/^====MARK====// # Remove trailing dots and whitespace s/[\. \t]*$// # Print /./p' | # we now have a list, one entry per line, of the stringified # contents of the appropriate section of all members of the # archive which possess that section. Heuristic: eliminate # all those which have a first or second character that is # a '.' (that is, objdump's representation of an unprintable # character.) This should work for all archives with less than # 0x302f exports -- but will fail for DLLs whose name actually # begins with a literal '.' or a single character followed by # a '.'. # # Of those that remain, print the first one. $SED -e '/^\./d;/^.\./d;q' } # func_cygming_gnu_implib_p ARG # This predicate returns with zero status (TRUE) if # ARG is a GNU/binutils-style import library. Returns # with nonzero status (FALSE) otherwise. func_cygming_gnu_implib_p () { $opt_debug func_to_tool_file "$1" func_convert_file_msys_to_w32 func_cygming_gnu_implib_tmp=`$NM "$func_to_tool_file_result" | eval "$global_symbol_pipe" | $EGREP ' (_head_[A-Za-z0-9_]+_[ad]l*|[A-Za-z0-9_]+_[ad]l*_iname)$'` test -n "$func_cygming_gnu_implib_tmp" } # func_cygming_ms_implib_p ARG # This predicate returns with zero status (TRUE) if # ARG is an MS-style import library. Returns # with nonzero status (FALSE) otherwise. func_cygming_ms_implib_p () { $opt_debug func_to_tool_file "$1" func_convert_file_msys_to_w32 func_cygming_ms_implib_tmp=`$NM "$func_to_tool_file_result" | eval "$global_symbol_pipe" | $GREP '_NULL_IMPORT_DESCRIPTOR'` test -n "$func_cygming_ms_implib_tmp" } # func_cygming_dll_for_implib_fallback ARG # Platform-specific function to extract the # name of the DLL associated with the specified # import library ARG. # # This fallback implementation is for use when $DLLTOOL # does not support the --identify-strict option. # Invoked by eval'ing the libtool variable # $sharedlib_from_linklib_cmd # Result is available in the variable # $sharedlib_from_linklib_result func_cygming_dll_for_implib_fallback () { $opt_debug if func_cygming_gnu_implib_p "$1" ; then # binutils import library sharedlib_from_linklib_result=`func_cygming_dll_for_implib_fallback_core '.idata$7' "$1"` elif func_cygming_ms_implib_p "$1" ; then # ms-generated import library sharedlib_from_linklib_result=`func_cygming_dll_for_implib_fallback_core '.idata$6' "$1"` else # unknown sharedlib_from_linklib_result="" fi } # func_extract_an_archive dir oldlib func_extract_an_archive () { $opt_debug f_ex_an_ar_dir="$1"; shift f_ex_an_ar_oldlib="$1" if test "$lock_old_archive_extraction" = yes; then lockfile=$f_ex_an_ar_oldlib.lock until $opt_dry_run || ln "$progpath" "$lockfile" 2>/dev/null; do func_echo "Waiting for $lockfile to be removed" sleep 2 done fi func_show_eval "(cd \$f_ex_an_ar_dir && $AR x \"\$f_ex_an_ar_oldlib\")" \ 'stat=$?; rm -f "$lockfile"; exit $stat' if test "$lock_old_archive_extraction" = yes; then $opt_dry_run || rm -f "$lockfile" fi if ($AR t "$f_ex_an_ar_oldlib" | sort | sort -uc >/dev/null 2>&1); then : else func_fatal_error "object name conflicts in archive: $f_ex_an_ar_dir/$f_ex_an_ar_oldlib" fi } # func_extract_archives gentop oldlib ... func_extract_archives () { $opt_debug my_gentop="$1"; shift my_oldlibs=${1+"$@"} my_oldobjs="" my_xlib="" my_xabs="" my_xdir="" for my_xlib in $my_oldlibs; do # Extract the objects. case $my_xlib in [\\/]* | [A-Za-z]:[\\/]*) my_xabs="$my_xlib" ;; *) my_xabs=`pwd`"/$my_xlib" ;; esac func_basename "$my_xlib" my_xlib="$func_basename_result" my_xlib_u=$my_xlib while :; do case " $extracted_archives " in *" $my_xlib_u "*) func_arith $extracted_serial + 1 extracted_serial=$func_arith_result my_xlib_u=lt$extracted_serial-$my_xlib ;; *) break ;; esac done extracted_archives="$extracted_archives $my_xlib_u" my_xdir="$my_gentop/$my_xlib_u" func_mkdir_p "$my_xdir" case $host in *-darwin*) func_verbose "Extracting $my_xabs" # Do not bother doing anything if just a dry run $opt_dry_run || { darwin_orig_dir=`pwd` cd $my_xdir || exit $? darwin_archive=$my_xabs darwin_curdir=`pwd` darwin_base_archive=`basename "$darwin_archive"` darwin_arches=`$LIPO -info "$darwin_archive" 2>/dev/null | $GREP Architectures 2>/dev/null || true` if test -n "$darwin_arches"; then darwin_arches=`$ECHO "$darwin_arches" | $SED -e 's/.*are://'` darwin_arch= func_verbose "$darwin_base_archive has multiple architectures $darwin_arches" for darwin_arch in $darwin_arches ; do func_mkdir_p "unfat-$$/${darwin_base_archive}-${darwin_arch}" $LIPO -thin $darwin_arch -output "unfat-$$/${darwin_base_archive}-${darwin_arch}/${darwin_base_archive}" "${darwin_archive}" cd "unfat-$$/${darwin_base_archive}-${darwin_arch}" func_extract_an_archive "`pwd`" "${darwin_base_archive}" cd "$darwin_curdir" $RM "unfat-$$/${darwin_base_archive}-${darwin_arch}/${darwin_base_archive}" done # $darwin_arches ## Okay now we've a bunch of thin objects, gotta fatten them up :) darwin_filelist=`find unfat-$$ -type f -name \*.o -print -o -name \*.lo -print | $SED -e "$basename" | sort -u` darwin_file= darwin_files= for darwin_file in $darwin_filelist; do darwin_files=`find unfat-$$ -name $darwin_file -print | sort | $NL2SP` $LIPO -create -output "$darwin_file" $darwin_files done # $darwin_filelist $RM -rf unfat-$$ cd "$darwin_orig_dir" else cd $darwin_orig_dir func_extract_an_archive "$my_xdir" "$my_xabs" fi # $darwin_arches } # !$opt_dry_run ;; *) func_extract_an_archive "$my_xdir" "$my_xabs" ;; esac my_oldobjs="$my_oldobjs "`find $my_xdir -name \*.$objext -print -o -name \*.lo -print | sort | $NL2SP` done func_extract_archives_result="$my_oldobjs" } # func_emit_wrapper [arg=no] # # Emit a libtool wrapper script on stdout. # Don't directly open a file because we may want to # incorporate the script contents within a cygwin/mingw # wrapper executable. Must ONLY be called from within # func_mode_link because it depends on a number of variables # set therein. # # ARG is the value that the WRAPPER_SCRIPT_BELONGS_IN_OBJDIR # variable will take. If 'yes', then the emitted script # will assume that the directory in which it is stored is # the $objdir directory. This is a cygwin/mingw-specific # behavior. func_emit_wrapper () { func_emit_wrapper_arg1=${1-no} $ECHO "\ #! $SHELL # $output - temporary wrapper script for $objdir/$outputname # Generated by $PROGRAM (GNU $PACKAGE$TIMESTAMP) $VERSION # # The $output program cannot be directly executed until all the libtool # libraries that it depends on are installed. # # This wrapper script should never be moved out of the build directory. # If it is, it will not operate correctly. # Sed substitution that helps us do robust quoting. It backslashifies # metacharacters that are still active within double-quoted strings. sed_quote_subst='$sed_quote_subst' # Be Bourne compatible if test -n \"\${ZSH_VERSION+set}\" && (emulate sh) >/dev/null 2>&1; then emulate sh NULLCMD=: # Zsh 3.x and 4.x performs word splitting on \${1+\"\$@\"}, which # is contrary to our usage. Disable this feature. alias -g '\${1+\"\$@\"}'='\"\$@\"' setopt NO_GLOB_SUBST else case \`(set -o) 2>/dev/null\` in *posix*) set -o posix;; esac fi BIN_SH=xpg4; export BIN_SH # for Tru64 DUALCASE=1; export DUALCASE # for MKS sh # The HP-UX ksh and POSIX shell print the target directory to stdout # if CDPATH is set. (unset CDPATH) >/dev/null 2>&1 && unset CDPATH relink_command=\"$relink_command\" # This environment variable determines our operation mode. if test \"\$libtool_install_magic\" = \"$magic\"; then # install mode needs the following variables: generated_by_libtool_version='$macro_version' notinst_deplibs='$notinst_deplibs' else # When we are sourced in execute mode, \$file and \$ECHO are already set. if test \"\$libtool_execute_magic\" != \"$magic\"; then file=\"\$0\"" qECHO=`$ECHO "$ECHO" | $SED "$sed_quote_subst"` $ECHO "\ # A function that is used when there is no print builtin or printf. func_fallback_echo () { eval 'cat <<_LTECHO_EOF \$1 _LTECHO_EOF' } ECHO=\"$qECHO\" fi # Very basic option parsing. These options are (a) specific to # the libtool wrapper, (b) are identical between the wrapper # /script/ and the wrapper /executable/ which is used only on # windows platforms, and (c) all begin with the string "--lt-" # (application programs are unlikely to have options which match # this pattern). # # There are only two supported options: --lt-debug and # --lt-dump-script. There is, deliberately, no --lt-help. # # The first argument to this parsing function should be the # script's $0 value, followed by "$@". lt_option_debug= func_parse_lt_options () { lt_script_arg0=\$0 shift for lt_opt do case \"\$lt_opt\" in --lt-debug) lt_option_debug=1 ;; --lt-dump-script) lt_dump_D=\`\$ECHO \"X\$lt_script_arg0\" | $SED -e 's/^X//' -e 's%/[^/]*$%%'\` test \"X\$lt_dump_D\" = \"X\$lt_script_arg0\" && lt_dump_D=. lt_dump_F=\`\$ECHO \"X\$lt_script_arg0\" | $SED -e 's/^X//' -e 's%^.*/%%'\` cat \"\$lt_dump_D/\$lt_dump_F\" exit 0 ;; --lt-*) \$ECHO \"Unrecognized --lt- option: '\$lt_opt'\" 1>&2 exit 1 ;; esac done # Print the debug banner immediately: if test -n \"\$lt_option_debug\"; then echo \"${outputname}:${output}:\${LINENO}: libtool wrapper (GNU $PACKAGE$TIMESTAMP) $VERSION\" 1>&2 fi } # Used when --lt-debug. Prints its arguments to stdout # (redirection is the responsibility of the caller) func_lt_dump_args () { lt_dump_args_N=1; for lt_arg do \$ECHO \"${outputname}:${output}:\${LINENO}: newargv[\$lt_dump_args_N]: \$lt_arg\" lt_dump_args_N=\`expr \$lt_dump_args_N + 1\` done } # Core function for launching the target application func_exec_program_core () { " case $host in # Backslashes separate directories on plain windows *-*-mingw | *-*-os2* | *-cegcc*) $ECHO "\ if test -n \"\$lt_option_debug\"; then \$ECHO \"${outputname}:${output}:\${LINENO}: newargv[0]: \$progdir\\\\\$program\" 1>&2 func_lt_dump_args \${1+\"\$@\"} 1>&2 fi exec \"\$progdir\\\\\$program\" \${1+\"\$@\"} " ;; *) $ECHO "\ if test -n \"\$lt_option_debug\"; then \$ECHO \"${outputname}:${output}:\${LINENO}: newargv[0]: \$progdir/\$program\" 1>&2 func_lt_dump_args \${1+\"\$@\"} 1>&2 fi exec \"\$progdir/\$program\" \${1+\"\$@\"} " ;; esac $ECHO "\ \$ECHO \"\$0: cannot exec \$program \$*\" 1>&2 exit 1 } # A function to encapsulate launching the target application # Strips options in the --lt-* namespace from \$@ and # launches target application with the remaining arguments. func_exec_program () { case \" \$* \" in *\\ --lt-*) for lt_wr_arg do case \$lt_wr_arg in --lt-*) ;; *) set x \"\$@\" \"\$lt_wr_arg\"; shift;; esac shift done ;; esac func_exec_program_core \${1+\"\$@\"} } # Parse options func_parse_lt_options \"\$0\" \${1+\"\$@\"} # Find the directory that this script lives in. thisdir=\`\$ECHO \"\$file\" | $SED 's%/[^/]*$%%'\` test \"x\$thisdir\" = \"x\$file\" && thisdir=. # Follow symbolic links until we get to the real thisdir. file=\`ls -ld \"\$file\" | $SED -n 's/.*-> //p'\` while test -n \"\$file\"; do destdir=\`\$ECHO \"\$file\" | $SED 's%/[^/]*\$%%'\` # If there was a directory component, then change thisdir. if test \"x\$destdir\" != \"x\$file\"; then case \"\$destdir\" in [\\\\/]* | [A-Za-z]:[\\\\/]*) thisdir=\"\$destdir\" ;; *) thisdir=\"\$thisdir/\$destdir\" ;; esac fi file=\`\$ECHO \"\$file\" | $SED 's%^.*/%%'\` file=\`ls -ld \"\$thisdir/\$file\" | $SED -n 's/.*-> //p'\` done # Usually 'no', except on cygwin/mingw when embedded into # the cwrapper. WRAPPER_SCRIPT_BELONGS_IN_OBJDIR=$func_emit_wrapper_arg1 if test \"\$WRAPPER_SCRIPT_BELONGS_IN_OBJDIR\" = \"yes\"; then # special case for '.' if test \"\$thisdir\" = \".\"; then thisdir=\`pwd\` fi # remove .libs from thisdir case \"\$thisdir\" in *[\\\\/]$objdir ) thisdir=\`\$ECHO \"\$thisdir\" | $SED 's%[\\\\/][^\\\\/]*$%%'\` ;; $objdir ) thisdir=. ;; esac fi # Try to get the absolute directory name. absdir=\`cd \"\$thisdir\" && pwd\` test -n \"\$absdir\" && thisdir=\"\$absdir\" " if test "$fast_install" = yes; then $ECHO "\ program=lt-'$outputname'$exeext progdir=\"\$thisdir/$objdir\" if test ! -f \"\$progdir/\$program\" || { file=\`ls -1dt \"\$progdir/\$program\" \"\$progdir/../\$program\" 2>/dev/null | ${SED} 1q\`; \\ test \"X\$file\" != \"X\$progdir/\$program\"; }; then file=\"\$\$-\$program\" if test ! -d \"\$progdir\"; then $MKDIR \"\$progdir\" else $RM \"\$progdir/\$file\" fi" $ECHO "\ # relink executable if necessary if test -n \"\$relink_command\"; then if relink_command_output=\`eval \$relink_command 2>&1\`; then : else $ECHO \"\$relink_command_output\" >&2 $RM \"\$progdir/\$file\" exit 1 fi fi $MV \"\$progdir/\$file\" \"\$progdir/\$program\" 2>/dev/null || { $RM \"\$progdir/\$program\"; $MV \"\$progdir/\$file\" \"\$progdir/\$program\"; } $RM \"\$progdir/\$file\" fi" else $ECHO "\ program='$outputname' progdir=\"\$thisdir/$objdir\" " fi $ECHO "\ if test -f \"\$progdir/\$program\"; then" # fixup the dll searchpath if we need to. # # Fix the DLL searchpath if we need to. Do this before prepending # to shlibpath, because on Windows, both are PATH and uninstalled # libraries must come first. if test -n "$dllsearchpath"; then $ECHO "\ # Add the dll search path components to the executable PATH PATH=$dllsearchpath:\$PATH " fi # Export our shlibpath_var if we have one. if test "$shlibpath_overrides_runpath" = yes && test -n "$shlibpath_var" && test -n "$temp_rpath"; then $ECHO "\ # Add our own library path to $shlibpath_var $shlibpath_var=\"$temp_rpath\$$shlibpath_var\" # Some systems cannot cope with colon-terminated $shlibpath_var # The second colon is a workaround for a bug in BeOS R4 sed $shlibpath_var=\`\$ECHO \"\$$shlibpath_var\" | $SED 's/::*\$//'\` export $shlibpath_var " fi $ECHO "\ if test \"\$libtool_execute_magic\" != \"$magic\"; then # Run the actual program with our arguments. func_exec_program \${1+\"\$@\"} fi else # The program doesn't exist. \$ECHO \"\$0: error: \\\`\$progdir/\$program' does not exist\" 1>&2 \$ECHO \"This script is just a wrapper for \$program.\" 1>&2 \$ECHO \"See the $PACKAGE documentation for more information.\" 1>&2 exit 1 fi fi\ " } # func_emit_cwrapperexe_src # emit the source code for a wrapper executable on stdout # Must ONLY be called from within func_mode_link because # it depends on a number of variable set therein. func_emit_cwrapperexe_src () { cat < #include #ifdef _MSC_VER # include # include # include #else # include # include # ifdef __CYGWIN__ # include # endif #endif #include #include #include #include #include #include #include #include /* declarations of non-ANSI functions */ #if defined(__MINGW32__) # ifdef __STRICT_ANSI__ int _putenv (const char *); # endif #elif defined(__CYGWIN__) # ifdef __STRICT_ANSI__ char *realpath (const char *, char *); int putenv (char *); int setenv (const char *, const char *, int); # endif /* #elif defined (other platforms) ... */ #endif /* portability defines, excluding path handling macros */ #if defined(_MSC_VER) # define setmode _setmode # define stat _stat # define chmod _chmod # define getcwd _getcwd # define putenv _putenv # define S_IXUSR _S_IEXEC # ifndef _INTPTR_T_DEFINED # define _INTPTR_T_DEFINED # define intptr_t int # endif #elif defined(__MINGW32__) # define setmode _setmode # define stat _stat # define chmod _chmod # define getcwd _getcwd # define putenv _putenv #elif defined(__CYGWIN__) # define HAVE_SETENV # define FOPEN_WB "wb" /* #elif defined (other platforms) ... */ #endif #if defined(PATH_MAX) # define LT_PATHMAX PATH_MAX #elif defined(MAXPATHLEN) # define LT_PATHMAX MAXPATHLEN #else # define LT_PATHMAX 1024 #endif #ifndef S_IXOTH # define S_IXOTH 0 #endif #ifndef S_IXGRP # define S_IXGRP 0 #endif /* path handling portability macros */ #ifndef DIR_SEPARATOR # define DIR_SEPARATOR '/' # define PATH_SEPARATOR ':' #endif #if defined (_WIN32) || defined (__MSDOS__) || defined (__DJGPP__) || \ defined (__OS2__) # define HAVE_DOS_BASED_FILE_SYSTEM # define FOPEN_WB "wb" # ifndef DIR_SEPARATOR_2 # define DIR_SEPARATOR_2 '\\' # endif # ifndef PATH_SEPARATOR_2 # define PATH_SEPARATOR_2 ';' # endif #endif #ifndef DIR_SEPARATOR_2 # define IS_DIR_SEPARATOR(ch) ((ch) == DIR_SEPARATOR) #else /* DIR_SEPARATOR_2 */ # define IS_DIR_SEPARATOR(ch) \ (((ch) == DIR_SEPARATOR) || ((ch) == DIR_SEPARATOR_2)) #endif /* DIR_SEPARATOR_2 */ #ifndef PATH_SEPARATOR_2 # define IS_PATH_SEPARATOR(ch) ((ch) == PATH_SEPARATOR) #else /* PATH_SEPARATOR_2 */ # define IS_PATH_SEPARATOR(ch) ((ch) == PATH_SEPARATOR_2) #endif /* PATH_SEPARATOR_2 */ #ifndef FOPEN_WB # define FOPEN_WB "w" #endif #ifndef _O_BINARY # define _O_BINARY 0 #endif #define XMALLOC(type, num) ((type *) xmalloc ((num) * sizeof(type))) #define XFREE(stale) do { \ if (stale) { free ((void *) stale); stale = 0; } \ } while (0) #if defined(LT_DEBUGWRAPPER) static int lt_debug = 1; #else static int lt_debug = 0; #endif const char *program_name = "libtool-wrapper"; /* in case xstrdup fails */ void *xmalloc (size_t num); char *xstrdup (const char *string); const char *base_name (const char *name); char *find_executable (const char *wrapper); char *chase_symlinks (const char *pathspec); int make_executable (const char *path); int check_executable (const char *path); char *strendzap (char *str, const char *pat); void lt_debugprintf (const char *file, int line, const char *fmt, ...); void lt_fatal (const char *file, int line, const char *message, ...); static const char *nonnull (const char *s); static const char *nonempty (const char *s); void lt_setenv (const char *name, const char *value); char *lt_extend_str (const char *orig_value, const char *add, int to_end); void lt_update_exe_path (const char *name, const char *value); void lt_update_lib_path (const char *name, const char *value); char **prepare_spawn (char **argv); void lt_dump_script (FILE *f); EOF cat <= 0) && (st.st_mode & (S_IXUSR | S_IXGRP | S_IXOTH))) return 1; else return 0; } int make_executable (const char *path) { int rval = 0; struct stat st; lt_debugprintf (__FILE__, __LINE__, "(make_executable): %s\n", nonempty (path)); if ((!path) || (!*path)) return 0; if (stat (path, &st) >= 0) { rval = chmod (path, st.st_mode | S_IXOTH | S_IXGRP | S_IXUSR); } return rval; } /* Searches for the full path of the wrapper. Returns newly allocated full path name if found, NULL otherwise Does not chase symlinks, even on platforms that support them. */ char * find_executable (const char *wrapper) { int has_slash = 0; const char *p; const char *p_next; /* static buffer for getcwd */ char tmp[LT_PATHMAX + 1]; int tmp_len; char *concat_name; lt_debugprintf (__FILE__, __LINE__, "(find_executable): %s\n", nonempty (wrapper)); if ((wrapper == NULL) || (*wrapper == '\0')) return NULL; /* Absolute path? */ #if defined (HAVE_DOS_BASED_FILE_SYSTEM) if (isalpha ((unsigned char) wrapper[0]) && wrapper[1] == ':') { concat_name = xstrdup (wrapper); if (check_executable (concat_name)) return concat_name; XFREE (concat_name); } else { #endif if (IS_DIR_SEPARATOR (wrapper[0])) { concat_name = xstrdup (wrapper); if (check_executable (concat_name)) return concat_name; XFREE (concat_name); } #if defined (HAVE_DOS_BASED_FILE_SYSTEM) } #endif for (p = wrapper; *p; p++) if (*p == '/') { has_slash = 1; break; } if (!has_slash) { /* no slashes; search PATH */ const char *path = getenv ("PATH"); if (path != NULL) { for (p = path; *p; p = p_next) { const char *q; size_t p_len; for (q = p; *q; q++) if (IS_PATH_SEPARATOR (*q)) break; p_len = q - p; p_next = (*q == '\0' ? q : q + 1); if (p_len == 0) { /* empty path: current directory */ if (getcwd (tmp, LT_PATHMAX) == NULL) lt_fatal (__FILE__, __LINE__, "getcwd failed: %s", nonnull (strerror (errno))); tmp_len = strlen (tmp); concat_name = XMALLOC (char, tmp_len + 1 + strlen (wrapper) + 1); memcpy (concat_name, tmp, tmp_len); concat_name[tmp_len] = '/'; strcpy (concat_name + tmp_len + 1, wrapper); } else { concat_name = XMALLOC (char, p_len + 1 + strlen (wrapper) + 1); memcpy (concat_name, p, p_len); concat_name[p_len] = '/'; strcpy (concat_name + p_len + 1, wrapper); } if (check_executable (concat_name)) return concat_name; XFREE (concat_name); } } /* not found in PATH; assume curdir */ } /* Relative path | not found in path: prepend cwd */ if (getcwd (tmp, LT_PATHMAX) == NULL) lt_fatal (__FILE__, __LINE__, "getcwd failed: %s", nonnull (strerror (errno))); tmp_len = strlen (tmp); concat_name = XMALLOC (char, tmp_len + 1 + strlen (wrapper) + 1); memcpy (concat_name, tmp, tmp_len); concat_name[tmp_len] = '/'; strcpy (concat_name + tmp_len + 1, wrapper); if (check_executable (concat_name)) return concat_name; XFREE (concat_name); return NULL; } char * chase_symlinks (const char *pathspec) { #ifndef S_ISLNK return xstrdup (pathspec); #else char buf[LT_PATHMAX]; struct stat s; char *tmp_pathspec = xstrdup (pathspec); char *p; int has_symlinks = 0; while (strlen (tmp_pathspec) && !has_symlinks) { lt_debugprintf (__FILE__, __LINE__, "checking path component for symlinks: %s\n", tmp_pathspec); if (lstat (tmp_pathspec, &s) == 0) { if (S_ISLNK (s.st_mode) != 0) { has_symlinks = 1; break; } /* search backwards for last DIR_SEPARATOR */ p = tmp_pathspec + strlen (tmp_pathspec) - 1; while ((p > tmp_pathspec) && (!IS_DIR_SEPARATOR (*p))) p--; if ((p == tmp_pathspec) && (!IS_DIR_SEPARATOR (*p))) { /* no more DIR_SEPARATORS left */ break; } *p = '\0'; } else { lt_fatal (__FILE__, __LINE__, "error accessing file \"%s\": %s", tmp_pathspec, nonnull (strerror (errno))); } } XFREE (tmp_pathspec); if (!has_symlinks) { return xstrdup (pathspec); } tmp_pathspec = realpath (pathspec, buf); if (tmp_pathspec == 0) { lt_fatal (__FILE__, __LINE__, "could not follow symlinks for %s", pathspec); } return xstrdup (tmp_pathspec); #endif } char * strendzap (char *str, const char *pat) { size_t len, patlen; assert (str != NULL); assert (pat != NULL); len = strlen (str); patlen = strlen (pat); if (patlen <= len) { str += len - patlen; if (strcmp (str, pat) == 0) *str = '\0'; } return str; } void lt_debugprintf (const char *file, int line, const char *fmt, ...) { va_list args; if (lt_debug) { (void) fprintf (stderr, "%s:%s:%d: ", program_name, file, line); va_start (args, fmt); (void) vfprintf (stderr, fmt, args); va_end (args); } } static void lt_error_core (int exit_status, const char *file, int line, const char *mode, const char *message, va_list ap) { fprintf (stderr, "%s:%s:%d: %s: ", program_name, file, line, mode); vfprintf (stderr, message, ap); fprintf (stderr, ".\n"); if (exit_status >= 0) exit (exit_status); } void lt_fatal (const char *file, int line, const char *message, ...) { va_list ap; va_start (ap, message); lt_error_core (EXIT_FAILURE, file, line, "FATAL", message, ap); va_end (ap); } static const char * nonnull (const char *s) { return s ? s : "(null)"; } static const char * nonempty (const char *s) { return (s && !*s) ? "(empty)" : nonnull (s); } void lt_setenv (const char *name, const char *value) { lt_debugprintf (__FILE__, __LINE__, "(lt_setenv) setting '%s' to '%s'\n", nonnull (name), nonnull (value)); { #ifdef HAVE_SETENV /* always make a copy, for consistency with !HAVE_SETENV */ char *str = xstrdup (value); setenv (name, str, 1); #else int len = strlen (name) + 1 + strlen (value) + 1; char *str = XMALLOC (char, len); sprintf (str, "%s=%s", name, value); if (putenv (str) != EXIT_SUCCESS) { XFREE (str); } #endif } } char * lt_extend_str (const char *orig_value, const char *add, int to_end) { char *new_value; if (orig_value && *orig_value) { int orig_value_len = strlen (orig_value); int add_len = strlen (add); new_value = XMALLOC (char, add_len + orig_value_len + 1); if (to_end) { strcpy (new_value, orig_value); strcpy (new_value + orig_value_len, add); } else { strcpy (new_value, add); strcpy (new_value + add_len, orig_value); } } else { new_value = xstrdup (add); } return new_value; } void lt_update_exe_path (const char *name, const char *value) { lt_debugprintf (__FILE__, __LINE__, "(lt_update_exe_path) modifying '%s' by prepending '%s'\n", nonnull (name), nonnull (value)); if (name && *name && value && *value) { char *new_value = lt_extend_str (getenv (name), value, 0); /* some systems can't cope with a ':'-terminated path #' */ int len = strlen (new_value); while (((len = strlen (new_value)) > 0) && IS_PATH_SEPARATOR (new_value[len-1])) { new_value[len-1] = '\0'; } lt_setenv (name, new_value); XFREE (new_value); } } void lt_update_lib_path (const char *name, const char *value) { lt_debugprintf (__FILE__, __LINE__, "(lt_update_lib_path) modifying '%s' by prepending '%s'\n", nonnull (name), nonnull (value)); if (name && *name && value && *value) { char *new_value = lt_extend_str (getenv (name), value, 0); lt_setenv (name, new_value); XFREE (new_value); } } EOF case $host_os in mingw*) cat <<"EOF" /* Prepares an argument vector before calling spawn(). Note that spawn() does not by itself call the command interpreter (getenv ("COMSPEC") != NULL ? getenv ("COMSPEC") : ({ OSVERSIONINFO v; v.dwOSVersionInfoSize = sizeof(OSVERSIONINFO); GetVersionEx(&v); v.dwPlatformId == VER_PLATFORM_WIN32_NT; }) ? "cmd.exe" : "command.com"). Instead it simply concatenates the arguments, separated by ' ', and calls CreateProcess(). We must quote the arguments since Win32 CreateProcess() interprets characters like ' ', '\t', '\\', '"' (but not '<' and '>') in a special way: - Space and tab are interpreted as delimiters. They are not treated as delimiters if they are surrounded by double quotes: "...". - Unescaped double quotes are removed from the input. Their only effect is that within double quotes, space and tab are treated like normal characters. - Backslashes not followed by double quotes are not special. - But 2*n+1 backslashes followed by a double quote become n backslashes followed by a double quote (n >= 0): \" -> " \\\" -> \" \\\\\" -> \\" */ #define SHELL_SPECIAL_CHARS "\"\\ \001\002\003\004\005\006\007\010\011\012\013\014\015\016\017\020\021\022\023\024\025\026\027\030\031\032\033\034\035\036\037" #define SHELL_SPACE_CHARS " \001\002\003\004\005\006\007\010\011\012\013\014\015\016\017\020\021\022\023\024\025\026\027\030\031\032\033\034\035\036\037" char ** prepare_spawn (char **argv) { size_t argc; char **new_argv; size_t i; /* Count number of arguments. */ for (argc = 0; argv[argc] != NULL; argc++) ; /* Allocate new argument vector. */ new_argv = XMALLOC (char *, argc + 1); /* Put quoted arguments into the new argument vector. */ for (i = 0; i < argc; i++) { const char *string = argv[i]; if (string[0] == '\0') new_argv[i] = xstrdup ("\"\""); else if (strpbrk (string, SHELL_SPECIAL_CHARS) != NULL) { int quote_around = (strpbrk (string, SHELL_SPACE_CHARS) != NULL); size_t length; unsigned int backslashes; const char *s; char *quoted_string; char *p; length = 0; backslashes = 0; if (quote_around) length++; for (s = string; *s != '\0'; s++) { char c = *s; if (c == '"') length += backslashes + 1; length++; if (c == '\\') backslashes++; else backslashes = 0; } if (quote_around) length += backslashes + 1; quoted_string = XMALLOC (char, length + 1); p = quoted_string; backslashes = 0; if (quote_around) *p++ = '"'; for (s = string; *s != '\0'; s++) { char c = *s; if (c == '"') { unsigned int j; for (j = backslashes + 1; j > 0; j--) *p++ = '\\'; } *p++ = c; if (c == '\\') backslashes++; else backslashes = 0; } if (quote_around) { unsigned int j; for (j = backslashes; j > 0; j--) *p++ = '\\'; *p++ = '"'; } *p = '\0'; new_argv[i] = quoted_string; } else new_argv[i] = (char *) string; } new_argv[argc] = NULL; return new_argv; } EOF ;; esac cat <<"EOF" void lt_dump_script (FILE* f) { EOF func_emit_wrapper yes | $SED -n -e ' s/^\(.\{79\}\)\(..*\)/\1\ \2/ h s/\([\\"]\)/\\\1/g s/$/\\n/ s/\([^\n]*\).*/ fputs ("\1", f);/p g D' cat <<"EOF" } EOF } # end: func_emit_cwrapperexe_src # func_win32_import_lib_p ARG # True if ARG is an import lib, as indicated by $file_magic_cmd func_win32_import_lib_p () { $opt_debug case `eval $file_magic_cmd \"\$1\" 2>/dev/null | $SED -e 10q` in *import*) : ;; *) false ;; esac } # func_mode_link arg... func_mode_link () { $opt_debug case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-cegcc*) # It is impossible to link a dll without this setting, and # we shouldn't force the makefile maintainer to figure out # which system we are compiling for in order to pass an extra # flag for every libtool invocation. # allow_undefined=no # FIXME: Unfortunately, there are problems with the above when trying # to make a dll which has undefined symbols, in which case not # even a static library is built. For now, we need to specify # -no-undefined on the libtool link line when we can be certain # that all symbols are satisfied, otherwise we get a static library. allow_undefined=yes ;; *) allow_undefined=yes ;; esac libtool_args=$nonopt base_compile="$nonopt $@" compile_command=$nonopt finalize_command=$nonopt compile_rpath= finalize_rpath= compile_shlibpath= finalize_shlibpath= convenience= old_convenience= deplibs= old_deplibs= compiler_flags= linker_flags= dllsearchpath= lib_search_path=`pwd` inst_prefix_dir= new_inherited_linker_flags= avoid_version=no bindir= dlfiles= dlprefiles= dlself=no export_dynamic=no export_symbols= export_symbols_regex= generated= libobjs= ltlibs= module=no no_install=no objs= non_pic_objects= precious_files_regex= prefer_static_libs=no preload=no prev= prevarg= release= rpath= xrpath= perm_rpath= temp_rpath= thread_safe=no vinfo= vinfo_number=no weak_libs= single_module="${wl}-single_module" func_infer_tag $base_compile # We need to know -static, to get the right output filenames. for arg do case $arg in -shared) test "$build_libtool_libs" != yes && \ func_fatal_configuration "can not build a shared library" build_old_libs=no break ;; -all-static | -static | -static-libtool-libs) case $arg in -all-static) if test "$build_libtool_libs" = yes && test -z "$link_static_flag"; then func_warning "complete static linking is impossible in this configuration" fi if test -n "$link_static_flag"; then dlopen_self=$dlopen_self_static fi prefer_static_libs=yes ;; -static) if test -z "$pic_flag" && test -n "$link_static_flag"; then dlopen_self=$dlopen_self_static fi prefer_static_libs=built ;; -static-libtool-libs) if test -z "$pic_flag" && test -n "$link_static_flag"; then dlopen_self=$dlopen_self_static fi prefer_static_libs=yes ;; esac build_libtool_libs=no build_old_libs=yes break ;; esac done # See if our shared archives depend on static archives. test -n "$old_archive_from_new_cmds" && build_old_libs=yes # Go through the arguments, transforming them on the way. while test "$#" -gt 0; do arg="$1" shift func_quote_for_eval "$arg" qarg=$func_quote_for_eval_unquoted_result func_append libtool_args " $func_quote_for_eval_result" # If the previous option needs an argument, assign it. if test -n "$prev"; then case $prev in output) func_append compile_command " @OUTPUT@" func_append finalize_command " @OUTPUT@" ;; esac case $prev in bindir) bindir="$arg" prev= continue ;; dlfiles|dlprefiles) if test "$preload" = no; then # Add the symbol object into the linking commands. func_append compile_command " @SYMFILE@" func_append finalize_command " @SYMFILE@" preload=yes fi case $arg in *.la | *.lo) ;; # We handle these cases below. force) if test "$dlself" = no; then dlself=needless export_dynamic=yes fi prev= continue ;; self) if test "$prev" = dlprefiles; then dlself=yes elif test "$prev" = dlfiles && test "$dlopen_self" != yes; then dlself=yes else dlself=needless export_dynamic=yes fi prev= continue ;; *) if test "$prev" = dlfiles; then func_append dlfiles " $arg" else func_append dlprefiles " $arg" fi prev= continue ;; esac ;; expsyms) export_symbols="$arg" test -f "$arg" \ || func_fatal_error "symbol file \`$arg' does not exist" prev= continue ;; expsyms_regex) export_symbols_regex="$arg" prev= continue ;; framework) case $host in *-*-darwin*) case "$deplibs " in *" $qarg.ltframework "*) ;; *) func_append deplibs " $qarg.ltframework" # this is fixed later ;; esac ;; esac prev= continue ;; inst_prefix) inst_prefix_dir="$arg" prev= continue ;; objectlist) if test -f "$arg"; then save_arg=$arg moreargs= for fil in `cat "$save_arg"` do # func_append moreargs " $fil" arg=$fil # A libtool-controlled object. # Check to see that this really is a libtool object. if func_lalib_unsafe_p "$arg"; then pic_object= non_pic_object= # Read the .lo file func_source "$arg" if test -z "$pic_object" || test -z "$non_pic_object" || test "$pic_object" = none && test "$non_pic_object" = none; then func_fatal_error "cannot find name of object for \`$arg'" fi # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir="$func_dirname_result" if test "$pic_object" != none; then # Prepend the subdirectory the object is found in. pic_object="$xdir$pic_object" if test "$prev" = dlfiles; then if test "$build_libtool_libs" = yes && test "$dlopen_support" = yes; then func_append dlfiles " $pic_object" prev= continue else # If libtool objects are unsupported, then we need to preload. prev=dlprefiles fi fi # CHECK ME: I think I busted this. -Ossama if test "$prev" = dlprefiles; then # Preload the old-style object. func_append dlprefiles " $pic_object" prev= fi # A PIC object. func_append libobjs " $pic_object" arg="$pic_object" fi # Non-PIC object. if test "$non_pic_object" != none; then # Prepend the subdirectory the object is found in. non_pic_object="$xdir$non_pic_object" # A standard non-PIC object func_append non_pic_objects " $non_pic_object" if test -z "$pic_object" || test "$pic_object" = none ; then arg="$non_pic_object" fi else # If the PIC object exists, use it instead. # $xdir was prepended to $pic_object above. non_pic_object="$pic_object" func_append non_pic_objects " $non_pic_object" fi else # Only an error if not doing a dry-run. if $opt_dry_run; then # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir="$func_dirname_result" func_lo2o "$arg" pic_object=$xdir$objdir/$func_lo2o_result non_pic_object=$xdir$func_lo2o_result func_append libobjs " $pic_object" func_append non_pic_objects " $non_pic_object" else func_fatal_error "\`$arg' is not a valid libtool object" fi fi done else func_fatal_error "link input file \`$arg' does not exist" fi arg=$save_arg prev= continue ;; precious_regex) precious_files_regex="$arg" prev= continue ;; release) release="-$arg" prev= continue ;; rpath | xrpath) # We need an absolute path. case $arg in [\\/]* | [A-Za-z]:[\\/]*) ;; *) func_fatal_error "only absolute run-paths are allowed" ;; esac if test "$prev" = rpath; then case "$rpath " in *" $arg "*) ;; *) func_append rpath " $arg" ;; esac else case "$xrpath " in *" $arg "*) ;; *) func_append xrpath " $arg" ;; esac fi prev= continue ;; shrext) shrext_cmds="$arg" prev= continue ;; weak) func_append weak_libs " $arg" prev= continue ;; xcclinker) func_append linker_flags " $qarg" func_append compiler_flags " $qarg" prev= func_append compile_command " $qarg" func_append finalize_command " $qarg" continue ;; xcompiler) func_append compiler_flags " $qarg" prev= func_append compile_command " $qarg" func_append finalize_command " $qarg" continue ;; xlinker) func_append linker_flags " $qarg" func_append compiler_flags " $wl$qarg" prev= func_append compile_command " $wl$qarg" func_append finalize_command " $wl$qarg" continue ;; *) eval "$prev=\"\$arg\"" prev= continue ;; esac fi # test -n "$prev" prevarg="$arg" case $arg in -all-static) if test -n "$link_static_flag"; then # See comment for -static flag below, for more details. func_append compile_command " $link_static_flag" func_append finalize_command " $link_static_flag" fi continue ;; -allow-undefined) # FIXME: remove this flag sometime in the future. func_fatal_error "\`-allow-undefined' must not be used because it is the default" ;; -avoid-version) avoid_version=yes continue ;; -bindir) prev=bindir continue ;; -dlopen) prev=dlfiles continue ;; -dlpreopen) prev=dlprefiles continue ;; -export-dynamic) export_dynamic=yes continue ;; -export-symbols | -export-symbols-regex) if test -n "$export_symbols" || test -n "$export_symbols_regex"; then func_fatal_error "more than one -exported-symbols argument is not allowed" fi if test "X$arg" = "X-export-symbols"; then prev=expsyms else prev=expsyms_regex fi continue ;; -framework) prev=framework continue ;; -inst-prefix-dir) prev=inst_prefix continue ;; # The native IRIX linker understands -LANG:*, -LIST:* and -LNO:* # so, if we see these flags be careful not to treat them like -L -L[A-Z][A-Z]*:*) case $with_gcc/$host in no/*-*-irix* | /*-*-irix*) func_append compile_command " $arg" func_append finalize_command " $arg" ;; esac continue ;; -L*) func_stripname "-L" '' "$arg" if test -z "$func_stripname_result"; then if test "$#" -gt 0; then func_fatal_error "require no space between \`-L' and \`$1'" else func_fatal_error "need path for \`-L' option" fi fi func_resolve_sysroot "$func_stripname_result" dir=$func_resolve_sysroot_result # We need an absolute path. case $dir in [\\/]* | [A-Za-z]:[\\/]*) ;; *) absdir=`cd "$dir" && pwd` test -z "$absdir" && \ func_fatal_error "cannot determine absolute directory name of \`$dir'" dir="$absdir" ;; esac case "$deplibs " in *" -L$dir "* | *" $arg "*) # Will only happen for absolute or sysroot arguments ;; *) # Preserve sysroot, but never include relative directories case $dir in [\\/]* | [A-Za-z]:[\\/]* | =*) func_append deplibs " $arg" ;; *) func_append deplibs " -L$dir" ;; esac func_append lib_search_path " $dir" ;; esac case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-cegcc*) testbindir=`$ECHO "$dir" | $SED 's*/lib$*/bin*'` case :$dllsearchpath: in *":$dir:"*) ;; ::) dllsearchpath=$dir;; *) func_append dllsearchpath ":$dir";; esac case :$dllsearchpath: in *":$testbindir:"*) ;; ::) dllsearchpath=$testbindir;; *) func_append dllsearchpath ":$testbindir";; esac ;; esac continue ;; -l*) if test "X$arg" = "X-lc" || test "X$arg" = "X-lm"; then case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-beos* | *-cegcc* | *-*-haiku*) # These systems don't actually have a C or math library (as such) continue ;; *-*-os2*) # These systems don't actually have a C library (as such) test "X$arg" = "X-lc" && continue ;; *-*-openbsd* | *-*-freebsd* | *-*-dragonfly*) # Do not include libc due to us having libc/libc_r. test "X$arg" = "X-lc" && continue ;; *-*-rhapsody* | *-*-darwin1.[012]) # Rhapsody C and math libraries are in the System framework func_append deplibs " System.ltframework" continue ;; *-*-sco3.2v5* | *-*-sco5v6*) # Causes problems with __ctype test "X$arg" = "X-lc" && continue ;; *-*-sysv4.2uw2* | *-*-sysv5* | *-*-unixware* | *-*-OpenUNIX*) # Compiler inserts libc in the correct place for threads to work test "X$arg" = "X-lc" && continue ;; esac elif test "X$arg" = "X-lc_r"; then case $host in *-*-openbsd* | *-*-freebsd* | *-*-dragonfly*) # Do not include libc_r directly, use -pthread flag. continue ;; esac fi func_append deplibs " $arg" continue ;; -module) module=yes continue ;; # Tru64 UNIX uses -model [arg] to determine the layout of C++ # classes, name mangling, and exception handling. # Darwin uses the -arch flag to determine output architecture. -model|-arch|-isysroot|--sysroot) func_append compiler_flags " $arg" func_append compile_command " $arg" func_append finalize_command " $arg" prev=xcompiler continue ;; -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe \ |-threads|-fopenmp|-openmp|-mp|-xopenmp|-omp|-qsmp=*) func_append compiler_flags " $arg" func_append compile_command " $arg" func_append finalize_command " $arg" case "$new_inherited_linker_flags " in *" $arg "*) ;; * ) func_append new_inherited_linker_flags " $arg" ;; esac continue ;; -multi_module) single_module="${wl}-multi_module" continue ;; -no-fast-install) fast_install=no continue ;; -no-install) case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-darwin* | *-cegcc*) # The PATH hackery in wrapper scripts is required on Windows # and Darwin in order for the loader to find any dlls it needs. func_warning "\`-no-install' is ignored for $host" func_warning "assuming \`-no-fast-install' instead" fast_install=no ;; *) no_install=yes ;; esac continue ;; -no-undefined) allow_undefined=no continue ;; -objectlist) prev=objectlist continue ;; -o) prev=output ;; -precious-files-regex) prev=precious_regex continue ;; -release) prev=release continue ;; -rpath) prev=rpath continue ;; -R) prev=xrpath continue ;; -R*) func_stripname '-R' '' "$arg" dir=$func_stripname_result # We need an absolute path. case $dir in [\\/]* | [A-Za-z]:[\\/]*) ;; =*) func_stripname '=' '' "$dir" dir=$lt_sysroot$func_stripname_result ;; *) func_fatal_error "only absolute run-paths are allowed" ;; esac case "$xrpath " in *" $dir "*) ;; *) func_append xrpath " $dir" ;; esac continue ;; -shared) # The effects of -shared are defined in a previous loop. continue ;; -shrext) prev=shrext continue ;; -static | -static-libtool-libs) # The effects of -static are defined in a previous loop. # We used to do the same as -all-static on platforms that # didn't have a PIC flag, but the assumption that the effects # would be equivalent was wrong. It would break on at least # Digital Unix and AIX. continue ;; -thread-safe) thread_safe=yes continue ;; -version-info) prev=vinfo continue ;; -version-number) prev=vinfo vinfo_number=yes continue ;; -weak) prev=weak continue ;; -Wc,*) func_stripname '-Wc,' '' "$arg" args=$func_stripname_result arg= save_ifs="$IFS"; IFS=',' for flag in $args; do IFS="$save_ifs" func_quote_for_eval "$flag" func_append arg " $func_quote_for_eval_result" func_append compiler_flags " $func_quote_for_eval_result" done IFS="$save_ifs" func_stripname ' ' '' "$arg" arg=$func_stripname_result ;; -Wl,*) func_stripname '-Wl,' '' "$arg" args=$func_stripname_result arg= save_ifs="$IFS"; IFS=',' for flag in $args; do IFS="$save_ifs" func_quote_for_eval "$flag" func_append arg " $wl$func_quote_for_eval_result" func_append compiler_flags " $wl$func_quote_for_eval_result" func_append linker_flags " $func_quote_for_eval_result" done IFS="$save_ifs" func_stripname ' ' '' "$arg" arg=$func_stripname_result ;; -Xcompiler) prev=xcompiler continue ;; -Xlinker) prev=xlinker continue ;; -XCClinker) prev=xcclinker continue ;; # -msg_* for osf cc -msg_*) func_quote_for_eval "$arg" arg="$func_quote_for_eval_result" ;; # Flags to be passed through unchanged, with rationale: # -64, -mips[0-9] enable 64-bit mode for the SGI compiler # -r[0-9][0-9]* specify processor for the SGI compiler # -xarch=*, -xtarget=* enable 64-bit mode for the Sun compiler # +DA*, +DD* enable 64-bit mode for the HP compiler # -q* compiler args for the IBM compiler # -m*, -t[45]*, -txscale* architecture-specific flags for GCC # -F/path path to uninstalled frameworks, gcc on darwin # -p, -pg, --coverage, -fprofile-* profiling flags for GCC # @file GCC response files # -tp=* Portland pgcc target processor selection # --sysroot=* for sysroot support # -O*, -flto*, -fwhopr*, -fuse-linker-plugin GCC link-time optimization -64|-mips[0-9]|-r[0-9][0-9]*|-xarch=*|-xtarget=*|+DA*|+DD*|-q*|-m*| \ -t[45]*|-txscale*|-p|-pg|--coverage|-fprofile-*|-F*|@*|-tp=*|--sysroot=*| \ -O*|-flto*|-fwhopr*|-fuse-linker-plugin) func_quote_for_eval "$arg" arg="$func_quote_for_eval_result" func_append compile_command " $arg" func_append finalize_command " $arg" func_append compiler_flags " $arg" continue ;; # Some other compiler flag. -* | +*) func_quote_for_eval "$arg" arg="$func_quote_for_eval_result" ;; *.$objext) # A standard object. func_append objs " $arg" ;; *.lo) # A libtool-controlled object. # Check to see that this really is a libtool object. if func_lalib_unsafe_p "$arg"; then pic_object= non_pic_object= # Read the .lo file func_source "$arg" if test -z "$pic_object" || test -z "$non_pic_object" || test "$pic_object" = none && test "$non_pic_object" = none; then func_fatal_error "cannot find name of object for \`$arg'" fi # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir="$func_dirname_result" if test "$pic_object" != none; then # Prepend the subdirectory the object is found in. pic_object="$xdir$pic_object" if test "$prev" = dlfiles; then if test "$build_libtool_libs" = yes && test "$dlopen_support" = yes; then func_append dlfiles " $pic_object" prev= continue else # If libtool objects are unsupported, then we need to preload. prev=dlprefiles fi fi # CHECK ME: I think I busted this. -Ossama if test "$prev" = dlprefiles; then # Preload the old-style object. func_append dlprefiles " $pic_object" prev= fi # A PIC object. func_append libobjs " $pic_object" arg="$pic_object" fi # Non-PIC object. if test "$non_pic_object" != none; then # Prepend the subdirectory the object is found in. non_pic_object="$xdir$non_pic_object" # A standard non-PIC object func_append non_pic_objects " $non_pic_object" if test -z "$pic_object" || test "$pic_object" = none ; then arg="$non_pic_object" fi else # If the PIC object exists, use it instead. # $xdir was prepended to $pic_object above. non_pic_object="$pic_object" func_append non_pic_objects " $non_pic_object" fi else # Only an error if not doing a dry-run. if $opt_dry_run; then # Extract subdirectory from the argument. func_dirname "$arg" "/" "" xdir="$func_dirname_result" func_lo2o "$arg" pic_object=$xdir$objdir/$func_lo2o_result non_pic_object=$xdir$func_lo2o_result func_append libobjs " $pic_object" func_append non_pic_objects " $non_pic_object" else func_fatal_error "\`$arg' is not a valid libtool object" fi fi ;; *.$libext) # An archive. func_append deplibs " $arg" func_append old_deplibs " $arg" continue ;; *.la) # A libtool-controlled library. func_resolve_sysroot "$arg" if test "$prev" = dlfiles; then # This library was specified with -dlopen. func_append dlfiles " $func_resolve_sysroot_result" prev= elif test "$prev" = dlprefiles; then # The library was specified with -dlpreopen. func_append dlprefiles " $func_resolve_sysroot_result" prev= else func_append deplibs " $func_resolve_sysroot_result" fi continue ;; # Some other compiler argument. *) # Unknown arguments in both finalize_command and compile_command need # to be aesthetically quoted because they are evaled later. func_quote_for_eval "$arg" arg="$func_quote_for_eval_result" ;; esac # arg # Now actually substitute the argument into the commands. if test -n "$arg"; then func_append compile_command " $arg" func_append finalize_command " $arg" fi done # argument parsing loop test -n "$prev" && \ func_fatal_help "the \`$prevarg' option requires an argument" if test "$export_dynamic" = yes && test -n "$export_dynamic_flag_spec"; then eval arg=\"$export_dynamic_flag_spec\" func_append compile_command " $arg" func_append finalize_command " $arg" fi oldlibs= # calculate the name of the file, without its directory func_basename "$output" outputname="$func_basename_result" libobjs_save="$libobjs" if test -n "$shlibpath_var"; then # get the directories listed in $shlibpath_var eval shlib_search_path=\`\$ECHO \"\${$shlibpath_var}\" \| \$SED \'s/:/ /g\'\` else shlib_search_path= fi eval sys_lib_search_path=\"$sys_lib_search_path_spec\" eval sys_lib_dlsearch_path=\"$sys_lib_dlsearch_path_spec\" func_dirname "$output" "/" "" output_objdir="$func_dirname_result$objdir" func_to_tool_file "$output_objdir/" tool_output_objdir=$func_to_tool_file_result # Create the object directory. func_mkdir_p "$output_objdir" # Determine the type of output case $output in "") func_fatal_help "you must specify an output file" ;; *.$libext) linkmode=oldlib ;; *.lo | *.$objext) linkmode=obj ;; *.la) linkmode=lib ;; *) linkmode=prog ;; # Anything else should be a program. esac specialdeplibs= libs= # Find all interdependent deplibs by searching for libraries # that are linked more than once (e.g. -la -lb -la) for deplib in $deplibs; do if $opt_preserve_dup_deps ; then case "$libs " in *" $deplib "*) func_append specialdeplibs " $deplib" ;; esac fi func_append libs " $deplib" done if test "$linkmode" = lib; then libs="$predeps $libs $compiler_lib_search_path $postdeps" # Compute libraries that are listed more than once in $predeps # $postdeps and mark them as special (i.e., whose duplicates are # not to be eliminated). pre_post_deps= if $opt_duplicate_compiler_generated_deps; then for pre_post_dep in $predeps $postdeps; do case "$pre_post_deps " in *" $pre_post_dep "*) func_append specialdeplibs " $pre_post_deps" ;; esac func_append pre_post_deps " $pre_post_dep" done fi pre_post_deps= fi deplibs= newdependency_libs= newlib_search_path= need_relink=no # whether we're linking any uninstalled libtool libraries notinst_deplibs= # not-installed libtool libraries notinst_path= # paths that contain not-installed libtool libraries case $linkmode in lib) passes="conv dlpreopen link" for file in $dlfiles $dlprefiles; do case $file in *.la) ;; *) func_fatal_help "libraries can \`-dlopen' only libtool libraries: $file" ;; esac done ;; prog) compile_deplibs= finalize_deplibs= alldeplibs=no newdlfiles= newdlprefiles= passes="conv scan dlopen dlpreopen link" ;; *) passes="conv" ;; esac for pass in $passes; do # The preopen pass in lib mode reverses $deplibs; put it back here # so that -L comes before libs that need it for instance... if test "$linkmode,$pass" = "lib,link"; then ## FIXME: Find the place where the list is rebuilt in the wrong ## order, and fix it there properly tmp_deplibs= for deplib in $deplibs; do tmp_deplibs="$deplib $tmp_deplibs" done deplibs="$tmp_deplibs" fi if test "$linkmode,$pass" = "lib,link" || test "$linkmode,$pass" = "prog,scan"; then libs="$deplibs" deplibs= fi if test "$linkmode" = prog; then case $pass in dlopen) libs="$dlfiles" ;; dlpreopen) libs="$dlprefiles" ;; link) libs="$deplibs %DEPLIBS%" test "X$link_all_deplibs" != Xno && libs="$libs $dependency_libs" ;; esac fi if test "$linkmode,$pass" = "lib,dlpreopen"; then # Collect and forward deplibs of preopened libtool libs for lib in $dlprefiles; do # Ignore non-libtool-libs dependency_libs= func_resolve_sysroot "$lib" case $lib in *.la) func_source "$func_resolve_sysroot_result" ;; esac # Collect preopened libtool deplibs, except any this library # has declared as weak libs for deplib in $dependency_libs; do func_basename "$deplib" deplib_base=$func_basename_result case " $weak_libs " in *" $deplib_base "*) ;; *) func_append deplibs " $deplib" ;; esac done done libs="$dlprefiles" fi if test "$pass" = dlopen; then # Collect dlpreopened libraries save_deplibs="$deplibs" deplibs= fi for deplib in $libs; do lib= found=no case $deplib in -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe \ |-threads|-fopenmp|-openmp|-mp|-xopenmp|-omp|-qsmp=*) if test "$linkmode,$pass" = "prog,link"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else func_append compiler_flags " $deplib" if test "$linkmode" = lib ; then case "$new_inherited_linker_flags " in *" $deplib "*) ;; * ) func_append new_inherited_linker_flags " $deplib" ;; esac fi fi continue ;; -l*) if test "$linkmode" != lib && test "$linkmode" != prog; then func_warning "\`-l' is ignored for archives/objects" continue fi func_stripname '-l' '' "$deplib" name=$func_stripname_result if test "$linkmode" = lib; then searchdirs="$newlib_search_path $lib_search_path $compiler_lib_search_dirs $sys_lib_search_path $shlib_search_path" else searchdirs="$newlib_search_path $lib_search_path $sys_lib_search_path $shlib_search_path" fi for searchdir in $searchdirs; do for search_ext in .la $std_shrext .so .a; do # Search the libtool library lib="$searchdir/lib${name}${search_ext}" if test -f "$lib"; then if test "$search_ext" = ".la"; then found=yes else found=no fi break 2 fi done done if test "$found" != yes; then # deplib doesn't seem to be a libtool library if test "$linkmode,$pass" = "prog,link"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else deplibs="$deplib $deplibs" test "$linkmode" = lib && newdependency_libs="$deplib $newdependency_libs" fi continue else # deplib is a libtool library # If $allow_libtool_libs_with_static_runtimes && $deplib is a stdlib, # We need to do some special things here, and not later. if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then case " $predeps $postdeps " in *" $deplib "*) if func_lalib_p "$lib"; then library_names= old_library= func_source "$lib" for l in $old_library $library_names; do ll="$l" done if test "X$ll" = "X$old_library" ; then # only static version available found=no func_dirname "$lib" "" "." ladir="$func_dirname_result" lib=$ladir/$old_library if test "$linkmode,$pass" = "prog,link"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else deplibs="$deplib $deplibs" test "$linkmode" = lib && newdependency_libs="$deplib $newdependency_libs" fi continue fi fi ;; *) ;; esac fi fi ;; # -l *.ltframework) if test "$linkmode,$pass" = "prog,link"; then compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else deplibs="$deplib $deplibs" if test "$linkmode" = lib ; then case "$new_inherited_linker_flags " in *" $deplib "*) ;; * ) func_append new_inherited_linker_flags " $deplib" ;; esac fi fi continue ;; -L*) case $linkmode in lib) deplibs="$deplib $deplibs" test "$pass" = conv && continue newdependency_libs="$deplib $newdependency_libs" func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result" func_append newlib_search_path " $func_resolve_sysroot_result" ;; prog) if test "$pass" = conv; then deplibs="$deplib $deplibs" continue fi if test "$pass" = scan; then deplibs="$deplib $deplibs" else compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" fi func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result" func_append newlib_search_path " $func_resolve_sysroot_result" ;; *) func_warning "\`-L' is ignored for archives/objects" ;; esac # linkmode continue ;; # -L -R*) if test "$pass" = link; then func_stripname '-R' '' "$deplib" func_resolve_sysroot "$func_stripname_result" dir=$func_resolve_sysroot_result # Make sure the xrpath contains only unique directories. case "$xrpath " in *" $dir "*) ;; *) func_append xrpath " $dir" ;; esac fi deplibs="$deplib $deplibs" continue ;; *.la) func_resolve_sysroot "$deplib" lib=$func_resolve_sysroot_result ;; *.$libext) if test "$pass" = conv; then deplibs="$deplib $deplibs" continue fi case $linkmode in lib) # Linking convenience modules into shared libraries is allowed, # but linking other static libraries is non-portable. case " $dlpreconveniencelibs " in *" $deplib "*) ;; *) valid_a_lib=no case $deplibs_check_method in match_pattern*) set dummy $deplibs_check_method; shift match_pattern_regex=`expr "$deplibs_check_method" : "$1 \(.*\)"` if eval "\$ECHO \"$deplib\"" 2>/dev/null | $SED 10q \ | $EGREP "$match_pattern_regex" > /dev/null; then valid_a_lib=yes fi ;; pass_all) valid_a_lib=yes ;; esac if test "$valid_a_lib" != yes; then echo $ECHO "*** Warning: Trying to link with static lib archive $deplib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have" echo "*** because the file extensions .$libext of this argument makes me believe" echo "*** that it is just a static archive that I should not use here." else echo $ECHO "*** Warning: Linking the shared library $output against the" $ECHO "*** static library $deplib is not portable!" deplibs="$deplib $deplibs" fi ;; esac continue ;; prog) if test "$pass" != link; then deplibs="$deplib $deplibs" else compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" fi continue ;; esac # linkmode ;; # *.$libext *.lo | *.$objext) if test "$pass" = conv; then deplibs="$deplib $deplibs" elif test "$linkmode" = prog; then if test "$pass" = dlpreopen || test "$dlopen_support" != yes || test "$build_libtool_libs" = no; then # If there is no dlopen support or we're linking statically, # we need to preload. func_append newdlprefiles " $deplib" compile_deplibs="$deplib $compile_deplibs" finalize_deplibs="$deplib $finalize_deplibs" else func_append newdlfiles " $deplib" fi fi continue ;; %DEPLIBS%) alldeplibs=yes continue ;; esac # case $deplib if test "$found" = yes || test -f "$lib"; then : else func_fatal_error "cannot find the library \`$lib' or unhandled argument \`$deplib'" fi # Check to see that this really is a libtool archive. func_lalib_unsafe_p "$lib" \ || func_fatal_error "\`$lib' is not a valid libtool archive" func_dirname "$lib" "" "." ladir="$func_dirname_result" dlname= dlopen= dlpreopen= libdir= library_names= old_library= inherited_linker_flags= # If the library was installed with an old release of libtool, # it will not redefine variables installed, or shouldnotlink installed=yes shouldnotlink=no avoidtemprpath= # Read the .la file func_source "$lib" # Convert "-framework foo" to "foo.ltframework" if test -n "$inherited_linker_flags"; then tmp_inherited_linker_flags=`$ECHO "$inherited_linker_flags" | $SED 's/-framework \([^ $]*\)/\1.ltframework/g'` for tmp_inherited_linker_flag in $tmp_inherited_linker_flags; do case " $new_inherited_linker_flags " in *" $tmp_inherited_linker_flag "*) ;; *) func_append new_inherited_linker_flags " $tmp_inherited_linker_flag";; esac done fi dependency_libs=`$ECHO " $dependency_libs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` if test "$linkmode,$pass" = "lib,link" || test "$linkmode,$pass" = "prog,scan" || { test "$linkmode" != prog && test "$linkmode" != lib; }; then test -n "$dlopen" && func_append dlfiles " $dlopen" test -n "$dlpreopen" && func_append dlprefiles " $dlpreopen" fi if test "$pass" = conv; then # Only check for convenience libraries deplibs="$lib $deplibs" if test -z "$libdir"; then if test -z "$old_library"; then func_fatal_error "cannot find name of link library for \`$lib'" fi # It is a libtool convenience library, so add in its objects. func_append convenience " $ladir/$objdir/$old_library" func_append old_convenience " $ladir/$objdir/$old_library" tmp_libs= for deplib in $dependency_libs; do deplibs="$deplib $deplibs" if $opt_preserve_dup_deps ; then case "$tmp_libs " in *" $deplib "*) func_append specialdeplibs " $deplib" ;; esac fi func_append tmp_libs " $deplib" done elif test "$linkmode" != prog && test "$linkmode" != lib; then func_fatal_error "\`$lib' is not a convenience library" fi continue fi # $pass = conv # Get the name of the library we link against. linklib= if test -n "$old_library" && { test "$prefer_static_libs" = yes || test "$prefer_static_libs,$installed" = "built,no"; }; then linklib=$old_library else for l in $old_library $library_names; do linklib="$l" done fi if test -z "$linklib"; then func_fatal_error "cannot find name of link library for \`$lib'" fi # This library was specified with -dlopen. if test "$pass" = dlopen; then if test -z "$libdir"; then func_fatal_error "cannot -dlopen a convenience library: \`$lib'" fi if test -z "$dlname" || test "$dlopen_support" != yes || test "$build_libtool_libs" = no; then # If there is no dlname, no dlopen support or we're linking # statically, we need to preload. We also need to preload any # dependent libraries so libltdl's deplib preloader doesn't # bomb out in the load deplibs phase. func_append dlprefiles " $lib $dependency_libs" else func_append newdlfiles " $lib" fi continue fi # $pass = dlopen # We need an absolute path. case $ladir in [\\/]* | [A-Za-z]:[\\/]*) abs_ladir="$ladir" ;; *) abs_ladir=`cd "$ladir" && pwd` if test -z "$abs_ladir"; then func_warning "cannot determine absolute directory name of \`$ladir'" func_warning "passing it literally to the linker, although it might fail" abs_ladir="$ladir" fi ;; esac func_basename "$lib" laname="$func_basename_result" # Find the relevant object directory and library name. if test "X$installed" = Xyes; then if test ! -f "$lt_sysroot$libdir/$linklib" && test -f "$abs_ladir/$linklib"; then func_warning "library \`$lib' was moved." dir="$ladir" absdir="$abs_ladir" libdir="$abs_ladir" else dir="$lt_sysroot$libdir" absdir="$lt_sysroot$libdir" fi test "X$hardcode_automatic" = Xyes && avoidtemprpath=yes else if test ! -f "$ladir/$objdir/$linklib" && test -f "$abs_ladir/$linklib"; then dir="$ladir" absdir="$abs_ladir" # Remove this search path later func_append notinst_path " $abs_ladir" else dir="$ladir/$objdir" absdir="$abs_ladir/$objdir" # Remove this search path later func_append notinst_path " $abs_ladir" fi fi # $installed = yes func_stripname 'lib' '.la' "$laname" name=$func_stripname_result # This library was specified with -dlpreopen. if test "$pass" = dlpreopen; then if test -z "$libdir" && test "$linkmode" = prog; then func_fatal_error "only libraries may -dlpreopen a convenience library: \`$lib'" fi case "$host" in # special handling for platforms with PE-DLLs. *cygwin* | *mingw* | *cegcc* ) # Linker will automatically link against shared library if both # static and shared are present. Therefore, ensure we extract # symbols from the import library if a shared library is present # (otherwise, the dlopen module name will be incorrect). We do # this by putting the import library name into $newdlprefiles. # We recover the dlopen module name by 'saving' the la file # name in a special purpose variable, and (later) extracting the # dlname from the la file. if test -n "$dlname"; then func_tr_sh "$dir/$linklib" eval "libfile_$func_tr_sh_result=\$abs_ladir/\$laname" func_append newdlprefiles " $dir/$linklib" else func_append newdlprefiles " $dir/$old_library" # Keep a list of preopened convenience libraries to check # that they are being used correctly in the link pass. test -z "$libdir" && \ func_append dlpreconveniencelibs " $dir/$old_library" fi ;; * ) # Prefer using a static library (so that no silly _DYNAMIC symbols # are required to link). if test -n "$old_library"; then func_append newdlprefiles " $dir/$old_library" # Keep a list of preopened convenience libraries to check # that they are being used correctly in the link pass. test -z "$libdir" && \ func_append dlpreconveniencelibs " $dir/$old_library" # Otherwise, use the dlname, so that lt_dlopen finds it. elif test -n "$dlname"; then func_append newdlprefiles " $dir/$dlname" else func_append newdlprefiles " $dir/$linklib" fi ;; esac fi # $pass = dlpreopen if test -z "$libdir"; then # Link the convenience library if test "$linkmode" = lib; then deplibs="$dir/$old_library $deplibs" elif test "$linkmode,$pass" = "prog,link"; then compile_deplibs="$dir/$old_library $compile_deplibs" finalize_deplibs="$dir/$old_library $finalize_deplibs" else deplibs="$lib $deplibs" # used for prog,scan pass fi continue fi if test "$linkmode" = prog && test "$pass" != link; then func_append newlib_search_path " $ladir" deplibs="$lib $deplibs" linkalldeplibs=no if test "$link_all_deplibs" != no || test -z "$library_names" || test "$build_libtool_libs" = no; then linkalldeplibs=yes fi tmp_libs= for deplib in $dependency_libs; do case $deplib in -L*) func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result" func_append newlib_search_path " $func_resolve_sysroot_result" ;; esac # Need to link against all dependency_libs? if test "$linkalldeplibs" = yes; then deplibs="$deplib $deplibs" else # Need to hardcode shared library paths # or/and link against static libraries newdependency_libs="$deplib $newdependency_libs" fi if $opt_preserve_dup_deps ; then case "$tmp_libs " in *" $deplib "*) func_append specialdeplibs " $deplib" ;; esac fi func_append tmp_libs " $deplib" done # for deplib continue fi # $linkmode = prog... if test "$linkmode,$pass" = "prog,link"; then if test -n "$library_names" && { { test "$prefer_static_libs" = no || test "$prefer_static_libs,$installed" = "built,yes"; } || test -z "$old_library"; }; then # We need to hardcode the library path if test -n "$shlibpath_var" && test -z "$avoidtemprpath" ; then # Make sure the rpath contains only unique directories. case "$temp_rpath:" in *"$absdir:"*) ;; *) func_append temp_rpath "$absdir:" ;; esac fi # Hardcode the library path. # Skip directories that are in the system default run-time # search path. case " $sys_lib_dlsearch_path " in *" $absdir "*) ;; *) case "$compile_rpath " in *" $absdir "*) ;; *) func_append compile_rpath " $absdir" ;; esac ;; esac case " $sys_lib_dlsearch_path " in *" $libdir "*) ;; *) case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac ;; esac fi # $linkmode,$pass = prog,link... if test "$alldeplibs" = yes && { test "$deplibs_check_method" = pass_all || { test "$build_libtool_libs" = yes && test -n "$library_names"; }; }; then # We only need to search for static libraries continue fi fi link_static=no # Whether the deplib will be linked statically use_static_libs=$prefer_static_libs if test "$use_static_libs" = built && test "$installed" = yes; then use_static_libs=no fi if test -n "$library_names" && { test "$use_static_libs" = no || test -z "$old_library"; }; then case $host in *cygwin* | *mingw* | *cegcc*) # No point in relinking DLLs because paths are not encoded func_append notinst_deplibs " $lib" need_relink=no ;; *) if test "$installed" = no; then func_append notinst_deplibs " $lib" need_relink=yes fi ;; esac # This is a shared library # Warn about portability, can't link against -module's on some # systems (darwin). Don't bleat about dlopened modules though! dlopenmodule="" for dlpremoduletest in $dlprefiles; do if test "X$dlpremoduletest" = "X$lib"; then dlopenmodule="$dlpremoduletest" break fi done if test -z "$dlopenmodule" && test "$shouldnotlink" = yes && test "$pass" = link; then echo if test "$linkmode" = prog; then $ECHO "*** Warning: Linking the executable $output against the loadable module" else $ECHO "*** Warning: Linking the shared library $output against the loadable module" fi $ECHO "*** $linklib is not portable!" fi if test "$linkmode" = lib && test "$hardcode_into_libs" = yes; then # Hardcode the library path. # Skip directories that are in the system default run-time # search path. case " $sys_lib_dlsearch_path " in *" $absdir "*) ;; *) case "$compile_rpath " in *" $absdir "*) ;; *) func_append compile_rpath " $absdir" ;; esac ;; esac case " $sys_lib_dlsearch_path " in *" $libdir "*) ;; *) case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac ;; esac fi if test -n "$old_archive_from_expsyms_cmds"; then # figure out the soname set dummy $library_names shift realname="$1" shift libname=`eval "\\$ECHO \"$libname_spec\""` # use dlname if we got it. it's perfectly good, no? if test -n "$dlname"; then soname="$dlname" elif test -n "$soname_spec"; then # bleh windows case $host in *cygwin* | mingw* | *cegcc*) func_arith $current - $age major=$func_arith_result versuffix="-$major" ;; esac eval soname=\"$soname_spec\" else soname="$realname" fi # Make a new name for the extract_expsyms_cmds to use soroot="$soname" func_basename "$soroot" soname="$func_basename_result" func_stripname 'lib' '.dll' "$soname" newlib=libimp-$func_stripname_result.a # If the library has no export list, then create one now if test -f "$output_objdir/$soname-def"; then : else func_verbose "extracting exported symbol list from \`$soname'" func_execute_cmds "$extract_expsyms_cmds" 'exit $?' fi # Create $newlib if test -f "$output_objdir/$newlib"; then :; else func_verbose "generating import library for \`$soname'" func_execute_cmds "$old_archive_from_expsyms_cmds" 'exit $?' fi # make sure the library variables are pointing to the new library dir=$output_objdir linklib=$newlib fi # test -n "$old_archive_from_expsyms_cmds" if test "$linkmode" = prog || test "$opt_mode" != relink; then add_shlibpath= add_dir= add= lib_linked=yes case $hardcode_action in immediate | unsupported) if test "$hardcode_direct" = no; then add="$dir/$linklib" case $host in *-*-sco3.2v5.0.[024]*) add_dir="-L$dir" ;; *-*-sysv4*uw2*) add_dir="-L$dir" ;; *-*-sysv5OpenUNIX* | *-*-sysv5UnixWare7.[01].[10]* | \ *-*-unixware7*) add_dir="-L$dir" ;; *-*-darwin* ) # if the lib is a (non-dlopened) module then we can not # link against it, someone is ignoring the earlier warnings if /usr/bin/file -L $add 2> /dev/null | $GREP ": [^:]* bundle" >/dev/null ; then if test "X$dlopenmodule" != "X$lib"; then $ECHO "*** Warning: lib $linklib is a module, not a shared library" if test -z "$old_library" ; then echo echo "*** And there doesn't seem to be a static archive available" echo "*** The link will probably fail, sorry" else add="$dir/$old_library" fi elif test -n "$old_library"; then add="$dir/$old_library" fi fi esac elif test "$hardcode_minus_L" = no; then case $host in *-*-sunos*) add_shlibpath="$dir" ;; esac add_dir="-L$dir" add="-l$name" elif test "$hardcode_shlibpath_var" = no; then add_shlibpath="$dir" add="-l$name" else lib_linked=no fi ;; relink) if test "$hardcode_direct" = yes && test "$hardcode_direct_absolute" = no; then add="$dir/$linklib" elif test "$hardcode_minus_L" = yes; then add_dir="-L$absdir" # Try looking first in the location we're being installed to. if test -n "$inst_prefix_dir"; then case $libdir in [\\/]*) func_append add_dir " -L$inst_prefix_dir$libdir" ;; esac fi add="-l$name" elif test "$hardcode_shlibpath_var" = yes; then add_shlibpath="$dir" add="-l$name" else lib_linked=no fi ;; *) lib_linked=no ;; esac if test "$lib_linked" != yes; then func_fatal_configuration "unsupported hardcode properties" fi if test -n "$add_shlibpath"; then case :$compile_shlibpath: in *":$add_shlibpath:"*) ;; *) func_append compile_shlibpath "$add_shlibpath:" ;; esac fi if test "$linkmode" = prog; then test -n "$add_dir" && compile_deplibs="$add_dir $compile_deplibs" test -n "$add" && compile_deplibs="$add $compile_deplibs" else test -n "$add_dir" && deplibs="$add_dir $deplibs" test -n "$add" && deplibs="$add $deplibs" if test "$hardcode_direct" != yes && test "$hardcode_minus_L" != yes && test "$hardcode_shlibpath_var" = yes; then case :$finalize_shlibpath: in *":$libdir:"*) ;; *) func_append finalize_shlibpath "$libdir:" ;; esac fi fi fi if test "$linkmode" = prog || test "$opt_mode" = relink; then add_shlibpath= add_dir= add= # Finalize command for both is simple: just hardcode it. if test "$hardcode_direct" = yes && test "$hardcode_direct_absolute" = no; then add="$libdir/$linklib" elif test "$hardcode_minus_L" = yes; then add_dir="-L$libdir" add="-l$name" elif test "$hardcode_shlibpath_var" = yes; then case :$finalize_shlibpath: in *":$libdir:"*) ;; *) func_append finalize_shlibpath "$libdir:" ;; esac add="-l$name" elif test "$hardcode_automatic" = yes; then if test -n "$inst_prefix_dir" && test -f "$inst_prefix_dir$libdir/$linklib" ; then add="$inst_prefix_dir$libdir/$linklib" else add="$libdir/$linklib" fi else # We cannot seem to hardcode it, guess we'll fake it. add_dir="-L$libdir" # Try looking first in the location we're being installed to. if test -n "$inst_prefix_dir"; then case $libdir in [\\/]*) func_append add_dir " -L$inst_prefix_dir$libdir" ;; esac fi add="-l$name" fi if test "$linkmode" = prog; then test -n "$add_dir" && finalize_deplibs="$add_dir $finalize_deplibs" test -n "$add" && finalize_deplibs="$add $finalize_deplibs" else test -n "$add_dir" && deplibs="$add_dir $deplibs" test -n "$add" && deplibs="$add $deplibs" fi fi elif test "$linkmode" = prog; then # Here we assume that one of hardcode_direct or hardcode_minus_L # is not unsupported. This is valid on all known static and # shared platforms. if test "$hardcode_direct" != unsupported; then test -n "$old_library" && linklib="$old_library" compile_deplibs="$dir/$linklib $compile_deplibs" finalize_deplibs="$dir/$linklib $finalize_deplibs" else compile_deplibs="-l$name -L$dir $compile_deplibs" finalize_deplibs="-l$name -L$dir $finalize_deplibs" fi elif test "$build_libtool_libs" = yes; then # Not a shared library if test "$deplibs_check_method" != pass_all; then # We're trying link a shared library against a static one # but the system doesn't support it. # Just print a warning and add the library to dependency_libs so # that the program can be linked against the static library. echo $ECHO "*** Warning: This system can not link to static lib archive $lib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have." if test "$module" = yes; then echo "*** But as you try to build a module library, libtool will still create " echo "*** a static module, that should work as long as the dlopening application" echo "*** is linked with the -dlopen flag to resolve symbols at runtime." if test -z "$global_symbol_pipe"; then echo echo "*** However, this would only work if libtool was able to extract symbol" echo "*** lists from a program, using \`nm' or equivalent, but libtool could" echo "*** not find such a program. So, this module is probably useless." echo "*** \`nm' from GNU binutils and a full rebuild may help." fi if test "$build_old_libs" = no; then build_libtool_libs=module build_old_libs=yes else build_libtool_libs=no fi fi else deplibs="$dir/$old_library $deplibs" link_static=yes fi fi # link shared/static library? if test "$linkmode" = lib; then if test -n "$dependency_libs" && { test "$hardcode_into_libs" != yes || test "$build_old_libs" = yes || test "$link_static" = yes; }; then # Extract -R from dependency_libs temp_deplibs= for libdir in $dependency_libs; do case $libdir in -R*) func_stripname '-R' '' "$libdir" temp_xrpath=$func_stripname_result case " $xrpath " in *" $temp_xrpath "*) ;; *) func_append xrpath " $temp_xrpath";; esac;; *) func_append temp_deplibs " $libdir";; esac done dependency_libs="$temp_deplibs" fi func_append newlib_search_path " $absdir" # Link against this library test "$link_static" = no && newdependency_libs="$abs_ladir/$laname $newdependency_libs" # ... and its dependency_libs tmp_libs= for deplib in $dependency_libs; do newdependency_libs="$deplib $newdependency_libs" case $deplib in -L*) func_stripname '-L' '' "$deplib" func_resolve_sysroot "$func_stripname_result";; *) func_resolve_sysroot "$deplib" ;; esac if $opt_preserve_dup_deps ; then case "$tmp_libs " in *" $func_resolve_sysroot_result "*) func_append specialdeplibs " $func_resolve_sysroot_result" ;; esac fi func_append tmp_libs " $func_resolve_sysroot_result" done if test "$link_all_deplibs" != no; then # Add the search paths of all dependency libraries for deplib in $dependency_libs; do path= case $deplib in -L*) path="$deplib" ;; *.la) func_resolve_sysroot "$deplib" deplib=$func_resolve_sysroot_result func_dirname "$deplib" "" "." dir=$func_dirname_result # We need an absolute path. case $dir in [\\/]* | [A-Za-z]:[\\/]*) absdir="$dir" ;; *) absdir=`cd "$dir" && pwd` if test -z "$absdir"; then func_warning "cannot determine absolute directory name of \`$dir'" absdir="$dir" fi ;; esac if $GREP "^installed=no" $deplib > /dev/null; then case $host in *-*-darwin*) depdepl= eval deplibrary_names=`${SED} -n -e 's/^library_names=\(.*\)$/\1/p' $deplib` if test -n "$deplibrary_names" ; then for tmp in $deplibrary_names ; do depdepl=$tmp done if test -f "$absdir/$objdir/$depdepl" ; then depdepl="$absdir/$objdir/$depdepl" darwin_install_name=`${OTOOL} -L $depdepl | awk '{if (NR == 2) {print $1;exit}}'` if test -z "$darwin_install_name"; then darwin_install_name=`${OTOOL64} -L $depdepl | awk '{if (NR == 2) {print $1;exit}}'` fi func_append compiler_flags " ${wl}-dylib_file ${wl}${darwin_install_name}:${depdepl}" func_append linker_flags " -dylib_file ${darwin_install_name}:${depdepl}" path= fi fi ;; *) path="-L$absdir/$objdir" ;; esac else eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $deplib` test -z "$libdir" && \ func_fatal_error "\`$deplib' is not a valid libtool archive" test "$absdir" != "$libdir" && \ func_warning "\`$deplib' seems to be moved" path="-L$absdir" fi ;; esac case " $deplibs " in *" $path "*) ;; *) deplibs="$path $deplibs" ;; esac done fi # link_all_deplibs != no fi # linkmode = lib done # for deplib in $libs if test "$pass" = link; then if test "$linkmode" = "prog"; then compile_deplibs="$new_inherited_linker_flags $compile_deplibs" finalize_deplibs="$new_inherited_linker_flags $finalize_deplibs" else compiler_flags="$compiler_flags "`$ECHO " $new_inherited_linker_flags" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` fi fi dependency_libs="$newdependency_libs" if test "$pass" = dlpreopen; then # Link the dlpreopened libraries before other libraries for deplib in $save_deplibs; do deplibs="$deplib $deplibs" done fi if test "$pass" != dlopen; then if test "$pass" != conv; then # Make sure lib_search_path contains only unique directories. lib_search_path= for dir in $newlib_search_path; do case "$lib_search_path " in *" $dir "*) ;; *) func_append lib_search_path " $dir" ;; esac done newlib_search_path= fi if test "$linkmode,$pass" != "prog,link"; then vars="deplibs" else vars="compile_deplibs finalize_deplibs" fi for var in $vars dependency_libs; do # Add libraries to $var in reverse order eval tmp_libs=\"\$$var\" new_libs= for deplib in $tmp_libs; do # FIXME: Pedantically, this is the right thing to do, so # that some nasty dependency loop isn't accidentally # broken: #new_libs="$deplib $new_libs" # Pragmatically, this seems to cause very few problems in # practice: case $deplib in -L*) new_libs="$deplib $new_libs" ;; -R*) ;; *) # And here is the reason: when a library appears more # than once as an explicit dependence of a library, or # is implicitly linked in more than once by the # compiler, it is considered special, and multiple # occurrences thereof are not removed. Compare this # with having the same library being listed as a # dependency of multiple other libraries: in this case, # we know (pedantically, we assume) the library does not # need to be listed more than once, so we keep only the # last copy. This is not always right, but it is rare # enough that we require users that really mean to play # such unportable linking tricks to link the library # using -Wl,-lname, so that libtool does not consider it # for duplicate removal. case " $specialdeplibs " in *" $deplib "*) new_libs="$deplib $new_libs" ;; *) case " $new_libs " in *" $deplib "*) ;; *) new_libs="$deplib $new_libs" ;; esac ;; esac ;; esac done tmp_libs= for deplib in $new_libs; do case $deplib in -L*) case " $tmp_libs " in *" $deplib "*) ;; *) func_append tmp_libs " $deplib" ;; esac ;; *) func_append tmp_libs " $deplib" ;; esac done eval $var=\"$tmp_libs\" done # for var fi # Last step: remove runtime libs from dependency_libs # (they stay in deplibs) tmp_libs= for i in $dependency_libs ; do case " $predeps $postdeps $compiler_lib_search_path " in *" $i "*) i="" ;; esac if test -n "$i" ; then func_append tmp_libs " $i" fi done dependency_libs=$tmp_libs done # for pass if test "$linkmode" = prog; then dlfiles="$newdlfiles" fi if test "$linkmode" = prog || test "$linkmode" = lib; then dlprefiles="$newdlprefiles" fi case $linkmode in oldlib) if test -n "$dlfiles$dlprefiles" || test "$dlself" != no; then func_warning "\`-dlopen' is ignored for archives" fi case " $deplibs" in *\ -l* | *\ -L*) func_warning "\`-l' and \`-L' are ignored for archives" ;; esac test -n "$rpath" && \ func_warning "\`-rpath' is ignored for archives" test -n "$xrpath" && \ func_warning "\`-R' is ignored for archives" test -n "$vinfo" && \ func_warning "\`-version-info/-version-number' is ignored for archives" test -n "$release" && \ func_warning "\`-release' is ignored for archives" test -n "$export_symbols$export_symbols_regex" && \ func_warning "\`-export-symbols' is ignored for archives" # Now set the variables for building old libraries. build_libtool_libs=no oldlibs="$output" func_append objs "$old_deplibs" ;; lib) # Make sure we only generate libraries of the form `libNAME.la'. case $outputname in lib*) func_stripname 'lib' '.la' "$outputname" name=$func_stripname_result eval shared_ext=\"$shrext_cmds\" eval libname=\"$libname_spec\" ;; *) test "$module" = no && \ func_fatal_help "libtool library \`$output' must begin with \`lib'" if test "$need_lib_prefix" != no; then # Add the "lib" prefix for modules if required func_stripname '' '.la' "$outputname" name=$func_stripname_result eval shared_ext=\"$shrext_cmds\" eval libname=\"$libname_spec\" else func_stripname '' '.la' "$outputname" libname=$func_stripname_result fi ;; esac if test -n "$objs"; then if test "$deplibs_check_method" != pass_all; then func_fatal_error "cannot build libtool library \`$output' from non-libtool objects on this host:$objs" else echo $ECHO "*** Warning: Linking the shared library $output against the non-libtool" $ECHO "*** objects $objs is not portable!" func_append libobjs " $objs" fi fi test "$dlself" != no && \ func_warning "\`-dlopen self' is ignored for libtool libraries" set dummy $rpath shift test "$#" -gt 1 && \ func_warning "ignoring multiple \`-rpath's for a libtool library" install_libdir="$1" oldlibs= if test -z "$rpath"; then if test "$build_libtool_libs" = yes; then # Building a libtool convenience library. # Some compilers have problems with a `.al' extension so # convenience libraries should have the same extension an # archive normally would. oldlibs="$output_objdir/$libname.$libext $oldlibs" build_libtool_libs=convenience build_old_libs=yes fi test -n "$vinfo" && \ func_warning "\`-version-info/-version-number' is ignored for convenience libraries" test -n "$release" && \ func_warning "\`-release' is ignored for convenience libraries" else # Parse the version information argument. save_ifs="$IFS"; IFS=':' set dummy $vinfo 0 0 0 shift IFS="$save_ifs" test -n "$7" && \ func_fatal_help "too many parameters to \`-version-info'" # convert absolute version numbers to libtool ages # this retains compatibility with .la files and attempts # to make the code below a bit more comprehensible case $vinfo_number in yes) number_major="$1" number_minor="$2" number_revision="$3" # # There are really only two kinds -- those that # use the current revision as the major version # and those that subtract age and use age as # a minor version. But, then there is irix # which has an extra 1 added just for fun # case $version_type in # correct linux to gnu/linux during the next big refactor darwin|linux|osf|windows|none) func_arith $number_major + $number_minor current=$func_arith_result age="$number_minor" revision="$number_revision" ;; freebsd-aout|freebsd-elf|qnx|sunos) current="$number_major" revision="$number_minor" age="0" ;; irix|nonstopux) func_arith $number_major + $number_minor current=$func_arith_result age="$number_minor" revision="$number_minor" lt_irix_increment=no ;; *) func_fatal_configuration "$modename: unknown library version type \`$version_type'" ;; esac ;; no) current="$1" revision="$2" age="$3" ;; esac # Check that each of the things are valid numbers. case $current in 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; *) func_error "CURRENT \`$current' must be a nonnegative integer" func_fatal_error "\`$vinfo' is not valid version information" ;; esac case $revision in 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; *) func_error "REVISION \`$revision' must be a nonnegative integer" func_fatal_error "\`$vinfo' is not valid version information" ;; esac case $age in 0|[1-9]|[1-9][0-9]|[1-9][0-9][0-9]|[1-9][0-9][0-9][0-9]|[1-9][0-9][0-9][0-9][0-9]) ;; *) func_error "AGE \`$age' must be a nonnegative integer" func_fatal_error "\`$vinfo' is not valid version information" ;; esac if test "$age" -gt "$current"; then func_error "AGE \`$age' is greater than the current interface number \`$current'" func_fatal_error "\`$vinfo' is not valid version information" fi # Calculate the version variables. major= versuffix= verstring= case $version_type in none) ;; darwin) # Like Linux, but with the current version available in # verstring for coding it into the library header func_arith $current - $age major=.$func_arith_result versuffix="$major.$age.$revision" # Darwin ld doesn't like 0 for these options... func_arith $current + 1 minor_current=$func_arith_result xlcverstring="${wl}-compatibility_version ${wl}$minor_current ${wl}-current_version ${wl}$minor_current.$revision" verstring="-compatibility_version $minor_current -current_version $minor_current.$revision" ;; freebsd-aout) major=".$current" versuffix=".$current.$revision"; ;; freebsd-elf) major=".$current" versuffix=".$current" ;; irix | nonstopux) if test "X$lt_irix_increment" = "Xno"; then func_arith $current - $age else func_arith $current - $age + 1 fi major=$func_arith_result case $version_type in nonstopux) verstring_prefix=nonstopux ;; *) verstring_prefix=sgi ;; esac verstring="$verstring_prefix$major.$revision" # Add in all the interfaces that we are compatible with. loop=$revision while test "$loop" -ne 0; do func_arith $revision - $loop iface=$func_arith_result func_arith $loop - 1 loop=$func_arith_result verstring="$verstring_prefix$major.$iface:$verstring" done # Before this point, $major must not contain `.'. major=.$major versuffix="$major.$revision" ;; linux) # correct to gnu/linux during the next big refactor func_arith $current - $age major=.$func_arith_result versuffix="$major.$age.$revision" ;; osf) func_arith $current - $age major=.$func_arith_result versuffix=".$current.$age.$revision" verstring="$current.$age.$revision" # Add in all the interfaces that we are compatible with. loop=$age while test "$loop" -ne 0; do func_arith $current - $loop iface=$func_arith_result func_arith $loop - 1 loop=$func_arith_result verstring="$verstring:${iface}.0" done # Make executables depend on our current version. func_append verstring ":${current}.0" ;; qnx) major=".$current" versuffix=".$current" ;; sunos) major=".$current" versuffix=".$current.$revision" ;; windows) # Use '-' rather than '.', since we only want one # extension on DOS 8.3 filesystems. func_arith $current - $age major=$func_arith_result versuffix="-$major" ;; *) func_fatal_configuration "unknown library version type \`$version_type'" ;; esac # Clear the version info if we defaulted, and they specified a release. if test -z "$vinfo" && test -n "$release"; then major= case $version_type in darwin) # we can't check for "0.0" in archive_cmds due to quoting # problems, so we reset it completely verstring= ;; *) verstring="0.0" ;; esac if test "$need_version" = no; then versuffix= else versuffix=".0.0" fi fi # Remove version info from name if versioning should be avoided if test "$avoid_version" = yes && test "$need_version" = no; then major= versuffix= verstring="" fi # Check to see if the archive will have undefined symbols. if test "$allow_undefined" = yes; then if test "$allow_undefined_flag" = unsupported; then func_warning "undefined symbols not allowed in $host shared libraries" build_libtool_libs=no build_old_libs=yes fi else # Don't allow undefined symbols. allow_undefined_flag="$no_undefined_flag" fi fi func_generate_dlsyms "$libname" "$libname" "yes" func_append libobjs " $symfileobj" test "X$libobjs" = "X " && libobjs= if test "$opt_mode" != relink; then # Remove our outputs, but don't remove object files since they # may have been created when compiling PIC objects. removelist= tempremovelist=`$ECHO "$output_objdir/*"` for p in $tempremovelist; do case $p in *.$objext | *.gcno) ;; $output_objdir/$outputname | $output_objdir/$libname.* | $output_objdir/${libname}${release}.*) if test "X$precious_files_regex" != "X"; then if $ECHO "$p" | $EGREP -e "$precious_files_regex" >/dev/null 2>&1 then continue fi fi func_append removelist " $p" ;; *) ;; esac done test -n "$removelist" && \ func_show_eval "${RM}r \$removelist" fi # Now set the variables for building old libraries. if test "$build_old_libs" = yes && test "$build_libtool_libs" != convenience ; then func_append oldlibs " $output_objdir/$libname.$libext" # Transform .lo files to .o files. oldobjs="$objs "`$ECHO "$libobjs" | $SP2NL | $SED "/\.${libext}$/d; $lo2o" | $NL2SP` fi # Eliminate all temporary directories. #for path in $notinst_path; do # lib_search_path=`$ECHO "$lib_search_path " | $SED "s% $path % %g"` # deplibs=`$ECHO "$deplibs " | $SED "s% -L$path % %g"` # dependency_libs=`$ECHO "$dependency_libs " | $SED "s% -L$path % %g"` #done if test -n "$xrpath"; then # If the user specified any rpath flags, then add them. temp_xrpath= for libdir in $xrpath; do func_replace_sysroot "$libdir" func_append temp_xrpath " -R$func_replace_sysroot_result" case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac done if test "$hardcode_into_libs" != yes || test "$build_old_libs" = yes; then dependency_libs="$temp_xrpath $dependency_libs" fi fi # Make sure dlfiles contains only unique files that won't be dlpreopened old_dlfiles="$dlfiles" dlfiles= for lib in $old_dlfiles; do case " $dlprefiles $dlfiles " in *" $lib "*) ;; *) func_append dlfiles " $lib" ;; esac done # Make sure dlprefiles contains only unique files old_dlprefiles="$dlprefiles" dlprefiles= for lib in $old_dlprefiles; do case "$dlprefiles " in *" $lib "*) ;; *) func_append dlprefiles " $lib" ;; esac done if test "$build_libtool_libs" = yes; then if test -n "$rpath"; then case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-beos* | *-cegcc* | *-*-haiku*) # these systems don't actually have a c library (as such)! ;; *-*-rhapsody* | *-*-darwin1.[012]) # Rhapsody C library is in the System framework func_append deplibs " System.ltframework" ;; *-*-netbsd*) # Don't link with libc until the a.out ld.so is fixed. ;; *-*-openbsd* | *-*-freebsd* | *-*-dragonfly*) # Do not include libc due to us having libc/libc_r. ;; *-*-sco3.2v5* | *-*-sco5v6*) # Causes problems with __ctype ;; *-*-sysv4.2uw2* | *-*-sysv5* | *-*-unixware* | *-*-OpenUNIX*) # Compiler inserts libc in the correct place for threads to work ;; *) # Add libc to deplibs on all other systems if necessary. if test "$build_libtool_need_lc" = "yes"; then func_append deplibs " -lc" fi ;; esac fi # Transform deplibs into only deplibs that can be linked in shared. name_save=$name libname_save=$libname release_save=$release versuffix_save=$versuffix major_save=$major # I'm not sure if I'm treating the release correctly. I think # release should show up in the -l (ie -lgmp5) so we don't want to # add it in twice. Is that correct? release="" versuffix="" major="" newdeplibs= droppeddeps=no case $deplibs_check_method in pass_all) # Don't check for shared/static. Everything works. # This might be a little naive. We might want to check # whether the library exists or not. But this is on # osf3 & osf4 and I'm not really sure... Just # implementing what was already the behavior. newdeplibs=$deplibs ;; test_compile) # This code stresses the "libraries are programs" paradigm to its # limits. Maybe even breaks it. We compile a program, linking it # against the deplibs as a proxy for the library. Then we can check # whether they linked in statically or dynamically with ldd. $opt_dry_run || $RM conftest.c cat > conftest.c </dev/null` $nocaseglob else potential_libs=`ls $i/$libnameglob[.-]* 2>/dev/null` fi for potent_lib in $potential_libs; do # Follow soft links. if ls -lLd "$potent_lib" 2>/dev/null | $GREP " -> " >/dev/null; then continue fi # The statement above tries to avoid entering an # endless loop below, in case of cyclic links. # We might still enter an endless loop, since a link # loop can be closed while we follow links, # but so what? potlib="$potent_lib" while test -h "$potlib" 2>/dev/null; do potliblink=`ls -ld $potlib | ${SED} 's/.* -> //'` case $potliblink in [\\/]* | [A-Za-z]:[\\/]*) potlib="$potliblink";; *) potlib=`$ECHO "$potlib" | $SED 's,[^/]*$,,'`"$potliblink";; esac done if eval $file_magic_cmd \"\$potlib\" 2>/dev/null | $SED -e 10q | $EGREP "$file_magic_regex" > /dev/null; then func_append newdeplibs " $a_deplib" a_deplib="" break 2 fi done done fi if test -n "$a_deplib" ; then droppeddeps=yes echo $ECHO "*** Warning: linker path does not have real file for library $a_deplib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have" echo "*** because I did check the linker path looking for a file starting" if test -z "$potlib" ; then $ECHO "*** with $libname but no candidates were found. (...for file magic test)" else $ECHO "*** with $libname and none of the candidates passed a file format test" $ECHO "*** using a file magic. Last file checked: $potlib" fi fi ;; *) # Add a -L argument. func_append newdeplibs " $a_deplib" ;; esac done # Gone through all deplibs. ;; match_pattern*) set dummy $deplibs_check_method; shift match_pattern_regex=`expr "$deplibs_check_method" : "$1 \(.*\)"` for a_deplib in $deplibs; do case $a_deplib in -l*) func_stripname -l '' "$a_deplib" name=$func_stripname_result if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then case " $predeps $postdeps " in *" $a_deplib "*) func_append newdeplibs " $a_deplib" a_deplib="" ;; esac fi if test -n "$a_deplib" ; then libname=`eval "\\$ECHO \"$libname_spec\""` for i in $lib_search_path $sys_lib_search_path $shlib_search_path; do potential_libs=`ls $i/$libname[.-]* 2>/dev/null` for potent_lib in $potential_libs; do potlib="$potent_lib" # see symlink-check above in file_magic test if eval "\$ECHO \"$potent_lib\"" 2>/dev/null | $SED 10q | \ $EGREP "$match_pattern_regex" > /dev/null; then func_append newdeplibs " $a_deplib" a_deplib="" break 2 fi done done fi if test -n "$a_deplib" ; then droppeddeps=yes echo $ECHO "*** Warning: linker path does not have real file for library $a_deplib." echo "*** I have the capability to make that library automatically link in when" echo "*** you link to this library. But I can only do this if you have a" echo "*** shared version of the library, which you do not appear to have" echo "*** because I did check the linker path looking for a file starting" if test -z "$potlib" ; then $ECHO "*** with $libname but no candidates were found. (...for regex pattern test)" else $ECHO "*** with $libname and none of the candidates passed a file format test" $ECHO "*** using a regex pattern. Last file checked: $potlib" fi fi ;; *) # Add a -L argument. func_append newdeplibs " $a_deplib" ;; esac done # Gone through all deplibs. ;; none | unknown | *) newdeplibs="" tmp_deplibs=`$ECHO " $deplibs" | $SED 's/ -lc$//; s/ -[LR][^ ]*//g'` if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then for i in $predeps $postdeps ; do # can't use Xsed below, because $i might contain '/' tmp_deplibs=`$ECHO " $tmp_deplibs" | $SED "s,$i,,"` done fi case $tmp_deplibs in *[!\ \ ]*) echo if test "X$deplibs_check_method" = "Xnone"; then echo "*** Warning: inter-library dependencies are not supported in this platform." else echo "*** Warning: inter-library dependencies are not known to be supported." fi echo "*** All declared inter-library dependencies are being dropped." droppeddeps=yes ;; esac ;; esac versuffix=$versuffix_save major=$major_save release=$release_save libname=$libname_save name=$name_save case $host in *-*-rhapsody* | *-*-darwin1.[012]) # On Rhapsody replace the C library with the System framework newdeplibs=`$ECHO " $newdeplibs" | $SED 's/ -lc / System.ltframework /'` ;; esac if test "$droppeddeps" = yes; then if test "$module" = yes; then echo echo "*** Warning: libtool could not satisfy all declared inter-library" $ECHO "*** dependencies of module $libname. Therefore, libtool will create" echo "*** a static module, that should work as long as the dlopening" echo "*** application is linked with the -dlopen flag." if test -z "$global_symbol_pipe"; then echo echo "*** However, this would only work if libtool was able to extract symbol" echo "*** lists from a program, using \`nm' or equivalent, but libtool could" echo "*** not find such a program. So, this module is probably useless." echo "*** \`nm' from GNU binutils and a full rebuild may help." fi if test "$build_old_libs" = no; then oldlibs="$output_objdir/$libname.$libext" build_libtool_libs=module build_old_libs=yes else build_libtool_libs=no fi else echo "*** The inter-library dependencies that have been dropped here will be" echo "*** automatically added whenever a program is linked with this library" echo "*** or is declared to -dlopen it." if test "$allow_undefined" = no; then echo echo "*** Since this library must not contain undefined symbols," echo "*** because either the platform does not support them or" echo "*** it was explicitly requested with -no-undefined," echo "*** libtool will only create a static version of it." if test "$build_old_libs" = no; then oldlibs="$output_objdir/$libname.$libext" build_libtool_libs=module build_old_libs=yes else build_libtool_libs=no fi fi fi fi # Done checking deplibs! deplibs=$newdeplibs fi # Time to change all our "foo.ltframework" stuff back to "-framework foo" case $host in *-*-darwin*) newdeplibs=`$ECHO " $newdeplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` new_inherited_linker_flags=`$ECHO " $new_inherited_linker_flags" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` deplibs=`$ECHO " $deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` ;; esac # move library search paths that coincide with paths to not yet # installed libraries to the beginning of the library search list new_libs= for path in $notinst_path; do case " $new_libs " in *" -L$path/$objdir "*) ;; *) case " $deplibs " in *" -L$path/$objdir "*) func_append new_libs " -L$path/$objdir" ;; esac ;; esac done for deplib in $deplibs; do case $deplib in -L*) case " $new_libs " in *" $deplib "*) ;; *) func_append new_libs " $deplib" ;; esac ;; *) func_append new_libs " $deplib" ;; esac done deplibs="$new_libs" # All the library-specific variables (install_libdir is set above). library_names= old_library= dlname= # Test again, we may have decided not to build it any more if test "$build_libtool_libs" = yes; then # Remove ${wl} instances when linking with ld. # FIXME: should test the right _cmds variable. case $archive_cmds in *\$LD\ *) wl= ;; esac if test "$hardcode_into_libs" = yes; then # Hardcode the library paths hardcode_libdirs= dep_rpath= rpath="$finalize_rpath" test "$opt_mode" != relink && rpath="$compile_rpath$rpath" for libdir in $rpath; do if test -n "$hardcode_libdir_flag_spec"; then if test -n "$hardcode_libdir_separator"; then func_replace_sysroot "$libdir" libdir=$func_replace_sysroot_result if test -z "$hardcode_libdirs"; then hardcode_libdirs="$libdir" else # Just accumulate the unique libdirs. case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) ;; *) func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" ;; esac fi else eval flag=\"$hardcode_libdir_flag_spec\" func_append dep_rpath " $flag" fi elif test -n "$runpath_var"; then case "$perm_rpath " in *" $libdir "*) ;; *) func_append perm_rpath " $libdir" ;; esac fi done # Substitute the hardcoded libdirs into the rpath. if test -n "$hardcode_libdir_separator" && test -n "$hardcode_libdirs"; then libdir="$hardcode_libdirs" eval "dep_rpath=\"$hardcode_libdir_flag_spec\"" fi if test -n "$runpath_var" && test -n "$perm_rpath"; then # We should set the runpath_var. rpath= for dir in $perm_rpath; do func_append rpath "$dir:" done eval "$runpath_var='$rpath\$$runpath_var'; export $runpath_var" fi test -n "$dep_rpath" && deplibs="$dep_rpath $deplibs" fi shlibpath="$finalize_shlibpath" test "$opt_mode" != relink && shlibpath="$compile_shlibpath$shlibpath" if test -n "$shlibpath"; then eval "$shlibpath_var='$shlibpath\$$shlibpath_var'; export $shlibpath_var" fi # Get the real and link names of the library. eval shared_ext=\"$shrext_cmds\" eval library_names=\"$library_names_spec\" set dummy $library_names shift realname="$1" shift if test -n "$soname_spec"; then eval soname=\"$soname_spec\" else soname="$realname" fi if test -z "$dlname"; then dlname=$soname fi lib="$output_objdir/$realname" linknames= for link do func_append linknames " $link" done # Use standard objects if they are pic test -z "$pic_flag" && libobjs=`$ECHO "$libobjs" | $SP2NL | $SED "$lo2o" | $NL2SP` test "X$libobjs" = "X " && libobjs= delfiles= if test -n "$export_symbols" && test -n "$include_expsyms"; then $opt_dry_run || cp "$export_symbols" "$output_objdir/$libname.uexp" export_symbols="$output_objdir/$libname.uexp" func_append delfiles " $export_symbols" fi orig_export_symbols= case $host_os in cygwin* | mingw* | cegcc*) if test -n "$export_symbols" && test -z "$export_symbols_regex"; then # exporting using user supplied symfile if test "x`$SED 1q $export_symbols`" != xEXPORTS; then # and it's NOT already a .def file. Must figure out # which of the given symbols are data symbols and tag # them as such. So, trigger use of export_symbols_cmds. # export_symbols gets reassigned inside the "prepare # the list of exported symbols" if statement, so the # include_expsyms logic still works. orig_export_symbols="$export_symbols" export_symbols= always_export_symbols=yes fi fi ;; esac # Prepare the list of exported symbols if test -z "$export_symbols"; then if test "$always_export_symbols" = yes || test -n "$export_symbols_regex"; then func_verbose "generating symbol list for \`$libname.la'" export_symbols="$output_objdir/$libname.exp" $opt_dry_run || $RM $export_symbols cmds=$export_symbols_cmds save_ifs="$IFS"; IFS='~' for cmd1 in $cmds; do IFS="$save_ifs" # Take the normal branch if the nm_file_list_spec branch # doesn't work or if tool conversion is not needed. case $nm_file_list_spec~$to_tool_file_cmd in *~func_convert_file_noop | *~func_convert_file_msys_to_w32 | ~*) try_normal_branch=yes eval cmd=\"$cmd1\" func_len " $cmd" len=$func_len_result ;; *) try_normal_branch=no ;; esac if test "$try_normal_branch" = yes \ && { test "$len" -lt "$max_cmd_len" \ || test "$max_cmd_len" -le -1; } then func_show_eval "$cmd" 'exit $?' skipped_export=false elif test -n "$nm_file_list_spec"; then func_basename "$output" output_la=$func_basename_result save_libobjs=$libobjs save_output=$output output=${output_objdir}/${output_la}.nm func_to_tool_file "$output" libobjs=$nm_file_list_spec$func_to_tool_file_result func_append delfiles " $output" func_verbose "creating $NM input file list: $output" for obj in $save_libobjs; do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" done > "$output" eval cmd=\"$cmd1\" func_show_eval "$cmd" 'exit $?' output=$save_output libobjs=$save_libobjs skipped_export=false else # The command line is too long to execute in one step. func_verbose "using reloadable object file for export list..." skipped_export=: # Break out early, otherwise skipped_export may be # set to false by a later but shorter cmd. break fi done IFS="$save_ifs" if test -n "$export_symbols_regex" && test "X$skipped_export" != "X:"; then func_show_eval '$EGREP -e "$export_symbols_regex" "$export_symbols" > "${export_symbols}T"' func_show_eval '$MV "${export_symbols}T" "$export_symbols"' fi fi fi if test -n "$export_symbols" && test -n "$include_expsyms"; then tmp_export_symbols="$export_symbols" test -n "$orig_export_symbols" && tmp_export_symbols="$orig_export_symbols" $opt_dry_run || eval '$ECHO "$include_expsyms" | $SP2NL >> "$tmp_export_symbols"' fi if test "X$skipped_export" != "X:" && test -n "$orig_export_symbols"; then # The given exports_symbols file has to be filtered, so filter it. func_verbose "filter symbol list for \`$libname.la' to tag DATA exports" # FIXME: $output_objdir/$libname.filter potentially contains lots of # 's' commands which not all seds can handle. GNU sed should be fine # though. Also, the filter scales superlinearly with the number of # global variables. join(1) would be nice here, but unfortunately # isn't a blessed tool. $opt_dry_run || $SED -e '/[ ,]DATA/!d;s,\(.*\)\([ \,].*\),s|^\1$|\1\2|,' < $export_symbols > $output_objdir/$libname.filter func_append delfiles " $export_symbols $output_objdir/$libname.filter" export_symbols=$output_objdir/$libname.def $opt_dry_run || $SED -f $output_objdir/$libname.filter < $orig_export_symbols > $export_symbols fi tmp_deplibs= for test_deplib in $deplibs; do case " $convenience " in *" $test_deplib "*) ;; *) func_append tmp_deplibs " $test_deplib" ;; esac done deplibs="$tmp_deplibs" if test -n "$convenience"; then if test -n "$whole_archive_flag_spec" && test "$compiler_needs_object" = yes && test -z "$libobjs"; then # extract the archives, so we have objects to list. # TODO: could optimize this to just extract one archive. whole_archive_flag_spec= fi if test -n "$whole_archive_flag_spec"; then save_libobjs=$libobjs eval libobjs=\"\$libobjs $whole_archive_flag_spec\" test "X$libobjs" = "X " && libobjs= else gentop="$output_objdir/${outputname}x" func_append generated " $gentop" func_extract_archives $gentop $convenience func_append libobjs " $func_extract_archives_result" test "X$libobjs" = "X " && libobjs= fi fi if test "$thread_safe" = yes && test -n "$thread_safe_flag_spec"; then eval flag=\"$thread_safe_flag_spec\" func_append linker_flags " $flag" fi # Make a backup of the uninstalled library when relinking if test "$opt_mode" = relink; then $opt_dry_run || eval '(cd $output_objdir && $RM ${realname}U && $MV $realname ${realname}U)' || exit $? fi # Do each of the archive commands. if test "$module" = yes && test -n "$module_cmds" ; then if test -n "$export_symbols" && test -n "$module_expsym_cmds"; then eval test_cmds=\"$module_expsym_cmds\" cmds=$module_expsym_cmds else eval test_cmds=\"$module_cmds\" cmds=$module_cmds fi else if test -n "$export_symbols" && test -n "$archive_expsym_cmds"; then eval test_cmds=\"$archive_expsym_cmds\" cmds=$archive_expsym_cmds else eval test_cmds=\"$archive_cmds\" cmds=$archive_cmds fi fi if test "X$skipped_export" != "X:" && func_len " $test_cmds" && len=$func_len_result && test "$len" -lt "$max_cmd_len" || test "$max_cmd_len" -le -1; then : else # The command line is too long to link in one step, link piecewise # or, if using GNU ld and skipped_export is not :, use a linker # script. # Save the value of $output and $libobjs because we want to # use them later. If we have whole_archive_flag_spec, we # want to use save_libobjs as it was before # whole_archive_flag_spec was expanded, because we can't # assume the linker understands whole_archive_flag_spec. # This may have to be revisited, in case too many # convenience libraries get linked in and end up exceeding # the spec. if test -z "$convenience" || test -z "$whole_archive_flag_spec"; then save_libobjs=$libobjs fi save_output=$output func_basename "$output" output_la=$func_basename_result # Clear the reloadable object creation command queue and # initialize k to one. test_cmds= concat_cmds= objlist= last_robj= k=1 if test -n "$save_libobjs" && test "X$skipped_export" != "X:" && test "$with_gnu_ld" = yes; then output=${output_objdir}/${output_la}.lnkscript func_verbose "creating GNU ld script: $output" echo 'INPUT (' > $output for obj in $save_libobjs do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" >> $output done echo ')' >> $output func_append delfiles " $output" func_to_tool_file "$output" output=$func_to_tool_file_result elif test -n "$save_libobjs" && test "X$skipped_export" != "X:" && test "X$file_list_spec" != X; then output=${output_objdir}/${output_la}.lnk func_verbose "creating linker input file list: $output" : > $output set x $save_libobjs shift firstobj= if test "$compiler_needs_object" = yes; then firstobj="$1 " shift fi for obj do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" >> $output done func_append delfiles " $output" func_to_tool_file "$output" output=$firstobj\"$file_list_spec$func_to_tool_file_result\" else if test -n "$save_libobjs"; then func_verbose "creating reloadable object files..." output=$output_objdir/$output_la-${k}.$objext eval test_cmds=\"$reload_cmds\" func_len " $test_cmds" len0=$func_len_result len=$len0 # Loop over the list of objects to be linked. for obj in $save_libobjs do func_len " $obj" func_arith $len + $func_len_result len=$func_arith_result if test "X$objlist" = X || test "$len" -lt "$max_cmd_len"; then func_append objlist " $obj" else # The command $test_cmds is almost too long, add a # command to the queue. if test "$k" -eq 1 ; then # The first file doesn't have a previous command to add. reload_objs=$objlist eval concat_cmds=\"$reload_cmds\" else # All subsequent reloadable object files will link in # the last one created. reload_objs="$objlist $last_robj" eval concat_cmds=\"\$concat_cmds~$reload_cmds~\$RM $last_robj\" fi last_robj=$output_objdir/$output_la-${k}.$objext func_arith $k + 1 k=$func_arith_result output=$output_objdir/$output_la-${k}.$objext objlist=" $obj" func_len " $last_robj" func_arith $len0 + $func_len_result len=$func_arith_result fi done # Handle the remaining objects by creating one last # reloadable object file. All subsequent reloadable object # files will link in the last one created. test -z "$concat_cmds" || concat_cmds=$concat_cmds~ reload_objs="$objlist $last_robj" eval concat_cmds=\"\${concat_cmds}$reload_cmds\" if test -n "$last_robj"; then eval concat_cmds=\"\${concat_cmds}~\$RM $last_robj\" fi func_append delfiles " $output" else output= fi if ${skipped_export-false}; then func_verbose "generating symbol list for \`$libname.la'" export_symbols="$output_objdir/$libname.exp" $opt_dry_run || $RM $export_symbols libobjs=$output # Append the command to create the export file. test -z "$concat_cmds" || concat_cmds=$concat_cmds~ eval concat_cmds=\"\$concat_cmds$export_symbols_cmds\" if test -n "$last_robj"; then eval concat_cmds=\"\$concat_cmds~\$RM $last_robj\" fi fi test -n "$save_libobjs" && func_verbose "creating a temporary reloadable object file: $output" # Loop through the commands generated above and execute them. save_ifs="$IFS"; IFS='~' for cmd in $concat_cmds; do IFS="$save_ifs" $opt_silent || { func_quote_for_expand "$cmd" eval "func_echo $func_quote_for_expand_result" } $opt_dry_run || eval "$cmd" || { lt_exit=$? # Restore the uninstalled library and exit if test "$opt_mode" = relink; then ( cd "$output_objdir" && \ $RM "${realname}T" && \ $MV "${realname}U" "$realname" ) fi exit $lt_exit } done IFS="$save_ifs" if test -n "$export_symbols_regex" && ${skipped_export-false}; then func_show_eval '$EGREP -e "$export_symbols_regex" "$export_symbols" > "${export_symbols}T"' func_show_eval '$MV "${export_symbols}T" "$export_symbols"' fi fi if ${skipped_export-false}; then if test -n "$export_symbols" && test -n "$include_expsyms"; then tmp_export_symbols="$export_symbols" test -n "$orig_export_symbols" && tmp_export_symbols="$orig_export_symbols" $opt_dry_run || eval '$ECHO "$include_expsyms" | $SP2NL >> "$tmp_export_symbols"' fi if test -n "$orig_export_symbols"; then # The given exports_symbols file has to be filtered, so filter it. func_verbose "filter symbol list for \`$libname.la' to tag DATA exports" # FIXME: $output_objdir/$libname.filter potentially contains lots of # 's' commands which not all seds can handle. GNU sed should be fine # though. Also, the filter scales superlinearly with the number of # global variables. join(1) would be nice here, but unfortunately # isn't a blessed tool. $opt_dry_run || $SED -e '/[ ,]DATA/!d;s,\(.*\)\([ \,].*\),s|^\1$|\1\2|,' < $export_symbols > $output_objdir/$libname.filter func_append delfiles " $export_symbols $output_objdir/$libname.filter" export_symbols=$output_objdir/$libname.def $opt_dry_run || $SED -f $output_objdir/$libname.filter < $orig_export_symbols > $export_symbols fi fi libobjs=$output # Restore the value of output. output=$save_output if test -n "$convenience" && test -n "$whole_archive_flag_spec"; then eval libobjs=\"\$libobjs $whole_archive_flag_spec\" test "X$libobjs" = "X " && libobjs= fi # Expand the library linking commands again to reset the # value of $libobjs for piecewise linking. # Do each of the archive commands. if test "$module" = yes && test -n "$module_cmds" ; then if test -n "$export_symbols" && test -n "$module_expsym_cmds"; then cmds=$module_expsym_cmds else cmds=$module_cmds fi else if test -n "$export_symbols" && test -n "$archive_expsym_cmds"; then cmds=$archive_expsym_cmds else cmds=$archive_cmds fi fi fi if test -n "$delfiles"; then # Append the command to remove temporary files to $cmds. eval cmds=\"\$cmds~\$RM $delfiles\" fi # Add any objects from preloaded convenience libraries if test -n "$dlprefiles"; then gentop="$output_objdir/${outputname}x" func_append generated " $gentop" func_extract_archives $gentop $dlprefiles func_append libobjs " $func_extract_archives_result" test "X$libobjs" = "X " && libobjs= fi save_ifs="$IFS"; IFS='~' for cmd in $cmds; do IFS="$save_ifs" eval cmd=\"$cmd\" $opt_silent || { func_quote_for_expand "$cmd" eval "func_echo $func_quote_for_expand_result" } $opt_dry_run || eval "$cmd" || { lt_exit=$? # Restore the uninstalled library and exit if test "$opt_mode" = relink; then ( cd "$output_objdir" && \ $RM "${realname}T" && \ $MV "${realname}U" "$realname" ) fi exit $lt_exit } done IFS="$save_ifs" # Restore the uninstalled library and exit if test "$opt_mode" = relink; then $opt_dry_run || eval '(cd $output_objdir && $RM ${realname}T && $MV $realname ${realname}T && $MV ${realname}U $realname)' || exit $? if test -n "$convenience"; then if test -z "$whole_archive_flag_spec"; then func_show_eval '${RM}r "$gentop"' fi fi exit $EXIT_SUCCESS fi # Create links to the real library. for linkname in $linknames; do if test "$realname" != "$linkname"; then func_show_eval '(cd "$output_objdir" && $RM "$linkname" && $LN_S "$realname" "$linkname")' 'exit $?' fi done # If -module or -export-dynamic was specified, set the dlname. if test "$module" = yes || test "$export_dynamic" = yes; then # On all known operating systems, these are identical. dlname="$soname" fi fi ;; obj) if test -n "$dlfiles$dlprefiles" || test "$dlself" != no; then func_warning "\`-dlopen' is ignored for objects" fi case " $deplibs" in *\ -l* | *\ -L*) func_warning "\`-l' and \`-L' are ignored for objects" ;; esac test -n "$rpath" && \ func_warning "\`-rpath' is ignored for objects" test -n "$xrpath" && \ func_warning "\`-R' is ignored for objects" test -n "$vinfo" && \ func_warning "\`-version-info' is ignored for objects" test -n "$release" && \ func_warning "\`-release' is ignored for objects" case $output in *.lo) test -n "$objs$old_deplibs" && \ func_fatal_error "cannot build library object \`$output' from non-libtool objects" libobj=$output func_lo2o "$libobj" obj=$func_lo2o_result ;; *) libobj= obj="$output" ;; esac # Delete the old objects. $opt_dry_run || $RM $obj $libobj # Objects from convenience libraries. This assumes # single-version convenience libraries. Whenever we create # different ones for PIC/non-PIC, this we'll have to duplicate # the extraction. reload_conv_objs= gentop= # reload_cmds runs $LD directly, so let us get rid of # -Wl from whole_archive_flag_spec and hope we can get by with # turning comma into space.. wl= if test -n "$convenience"; then if test -n "$whole_archive_flag_spec"; then eval tmp_whole_archive_flags=\"$whole_archive_flag_spec\" reload_conv_objs=$reload_objs\ `$ECHO "$tmp_whole_archive_flags" | $SED 's|,| |g'` else gentop="$output_objdir/${obj}x" func_append generated " $gentop" func_extract_archives $gentop $convenience reload_conv_objs="$reload_objs $func_extract_archives_result" fi fi # If we're not building shared, we need to use non_pic_objs test "$build_libtool_libs" != yes && libobjs="$non_pic_objects" # Create the old-style object. reload_objs="$objs$old_deplibs "`$ECHO "$libobjs" | $SP2NL | $SED "/\.${libext}$/d; /\.lib$/d; $lo2o" | $NL2SP`" $reload_conv_objs" ### testsuite: skip nested quoting test output="$obj" func_execute_cmds "$reload_cmds" 'exit $?' # Exit if we aren't doing a library object file. if test -z "$libobj"; then if test -n "$gentop"; then func_show_eval '${RM}r "$gentop"' fi exit $EXIT_SUCCESS fi if test "$build_libtool_libs" != yes; then if test -n "$gentop"; then func_show_eval '${RM}r "$gentop"' fi # Create an invalid libtool object if no PIC, so that we don't # accidentally link it into a program. # $show "echo timestamp > $libobj" # $opt_dry_run || eval "echo timestamp > $libobj" || exit $? exit $EXIT_SUCCESS fi if test -n "$pic_flag" || test "$pic_mode" != default; then # Only do commands if we really have different PIC objects. reload_objs="$libobjs $reload_conv_objs" output="$libobj" func_execute_cmds "$reload_cmds" 'exit $?' fi if test -n "$gentop"; then func_show_eval '${RM}r "$gentop"' fi exit $EXIT_SUCCESS ;; prog) case $host in *cygwin*) func_stripname '' '.exe' "$output" output=$func_stripname_result.exe;; esac test -n "$vinfo" && \ func_warning "\`-version-info' is ignored for programs" test -n "$release" && \ func_warning "\`-release' is ignored for programs" test "$preload" = yes \ && test "$dlopen_support" = unknown \ && test "$dlopen_self" = unknown \ && test "$dlopen_self_static" = unknown && \ func_warning "\`LT_INIT([dlopen])' not used. Assuming no dlopen support." case $host in *-*-rhapsody* | *-*-darwin1.[012]) # On Rhapsody replace the C library is the System framework compile_deplibs=`$ECHO " $compile_deplibs" | $SED 's/ -lc / System.ltframework /'` finalize_deplibs=`$ECHO " $finalize_deplibs" | $SED 's/ -lc / System.ltframework /'` ;; esac case $host in *-*-darwin*) # Don't allow lazy linking, it breaks C++ global constructors # But is supposedly fixed on 10.4 or later (yay!). if test "$tagname" = CXX ; then case ${MACOSX_DEPLOYMENT_TARGET-10.0} in 10.[0123]) func_append compile_command " ${wl}-bind_at_load" func_append finalize_command " ${wl}-bind_at_load" ;; esac fi # Time to change all our "foo.ltframework" stuff back to "-framework foo" compile_deplibs=`$ECHO " $compile_deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` finalize_deplibs=`$ECHO " $finalize_deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'` ;; esac # move library search paths that coincide with paths to not yet # installed libraries to the beginning of the library search list new_libs= for path in $notinst_path; do case " $new_libs " in *" -L$path/$objdir "*) ;; *) case " $compile_deplibs " in *" -L$path/$objdir "*) func_append new_libs " -L$path/$objdir" ;; esac ;; esac done for deplib in $compile_deplibs; do case $deplib in -L*) case " $new_libs " in *" $deplib "*) ;; *) func_append new_libs " $deplib" ;; esac ;; *) func_append new_libs " $deplib" ;; esac done compile_deplibs="$new_libs" func_append compile_command " $compile_deplibs" func_append finalize_command " $finalize_deplibs" if test -n "$rpath$xrpath"; then # If the user specified any rpath flags, then add them. for libdir in $rpath $xrpath; do # This is the magic to use -rpath. case "$finalize_rpath " in *" $libdir "*) ;; *) func_append finalize_rpath " $libdir" ;; esac done fi # Now hardcode the library paths rpath= hardcode_libdirs= for libdir in $compile_rpath $finalize_rpath; do if test -n "$hardcode_libdir_flag_spec"; then if test -n "$hardcode_libdir_separator"; then if test -z "$hardcode_libdirs"; then hardcode_libdirs="$libdir" else # Just accumulate the unique libdirs. case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) ;; *) func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" ;; esac fi else eval flag=\"$hardcode_libdir_flag_spec\" func_append rpath " $flag" fi elif test -n "$runpath_var"; then case "$perm_rpath " in *" $libdir "*) ;; *) func_append perm_rpath " $libdir" ;; esac fi case $host in *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-cegcc*) testbindir=`${ECHO} "$libdir" | ${SED} -e 's*/lib$*/bin*'` case :$dllsearchpath: in *":$libdir:"*) ;; ::) dllsearchpath=$libdir;; *) func_append dllsearchpath ":$libdir";; esac case :$dllsearchpath: in *":$testbindir:"*) ;; ::) dllsearchpath=$testbindir;; *) func_append dllsearchpath ":$testbindir";; esac ;; esac done # Substitute the hardcoded libdirs into the rpath. if test -n "$hardcode_libdir_separator" && test -n "$hardcode_libdirs"; then libdir="$hardcode_libdirs" eval rpath=\" $hardcode_libdir_flag_spec\" fi compile_rpath="$rpath" rpath= hardcode_libdirs= for libdir in $finalize_rpath; do if test -n "$hardcode_libdir_flag_spec"; then if test -n "$hardcode_libdir_separator"; then if test -z "$hardcode_libdirs"; then hardcode_libdirs="$libdir" else # Just accumulate the unique libdirs. case $hardcode_libdir_separator$hardcode_libdirs$hardcode_libdir_separator in *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*) ;; *) func_append hardcode_libdirs "$hardcode_libdir_separator$libdir" ;; esac fi else eval flag=\"$hardcode_libdir_flag_spec\" func_append rpath " $flag" fi elif test -n "$runpath_var"; then case "$finalize_perm_rpath " in *" $libdir "*) ;; *) func_append finalize_perm_rpath " $libdir" ;; esac fi done # Substitute the hardcoded libdirs into the rpath. if test -n "$hardcode_libdir_separator" && test -n "$hardcode_libdirs"; then libdir="$hardcode_libdirs" eval rpath=\" $hardcode_libdir_flag_spec\" fi finalize_rpath="$rpath" if test -n "$libobjs" && test "$build_old_libs" = yes; then # Transform all the library objects into standard objects. compile_command=`$ECHO "$compile_command" | $SP2NL | $SED "$lo2o" | $NL2SP` finalize_command=`$ECHO "$finalize_command" | $SP2NL | $SED "$lo2o" | $NL2SP` fi func_generate_dlsyms "$outputname" "@PROGRAM@" "no" # template prelinking step if test -n "$prelink_cmds"; then func_execute_cmds "$prelink_cmds" 'exit $?' fi wrappers_required=yes case $host in *cegcc* | *mingw32ce*) # Disable wrappers for cegcc and mingw32ce hosts, we are cross compiling anyway. wrappers_required=no ;; *cygwin* | *mingw* ) if test "$build_libtool_libs" != yes; then wrappers_required=no fi ;; *) if test "$need_relink" = no || test "$build_libtool_libs" != yes; then wrappers_required=no fi ;; esac if test "$wrappers_required" = no; then # Replace the output file specification. compile_command=`$ECHO "$compile_command" | $SED 's%@OUTPUT@%'"$output"'%g'` link_command="$compile_command$compile_rpath" # We have no uninstalled library dependencies, so finalize right now. exit_status=0 func_show_eval "$link_command" 'exit_status=$?' if test -n "$postlink_cmds"; then func_to_tool_file "$output" postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` func_execute_cmds "$postlink_cmds" 'exit $?' fi # Delete the generated files. if test -f "$output_objdir/${outputname}S.${objext}"; then func_show_eval '$RM "$output_objdir/${outputname}S.${objext}"' fi exit $exit_status fi if test -n "$compile_shlibpath$finalize_shlibpath"; then compile_command="$shlibpath_var=\"$compile_shlibpath$finalize_shlibpath\$$shlibpath_var\" $compile_command" fi if test -n "$finalize_shlibpath"; then finalize_command="$shlibpath_var=\"$finalize_shlibpath\$$shlibpath_var\" $finalize_command" fi compile_var= finalize_var= if test -n "$runpath_var"; then if test -n "$perm_rpath"; then # We should set the runpath_var. rpath= for dir in $perm_rpath; do func_append rpath "$dir:" done compile_var="$runpath_var=\"$rpath\$$runpath_var\" " fi if test -n "$finalize_perm_rpath"; then # We should set the runpath_var. rpath= for dir in $finalize_perm_rpath; do func_append rpath "$dir:" done finalize_var="$runpath_var=\"$rpath\$$runpath_var\" " fi fi if test "$no_install" = yes; then # We don't need to create a wrapper script. link_command="$compile_var$compile_command$compile_rpath" # Replace the output file specification. link_command=`$ECHO "$link_command" | $SED 's%@OUTPUT@%'"$output"'%g'` # Delete the old output file. $opt_dry_run || $RM $output # Link the executable and exit func_show_eval "$link_command" 'exit $?' if test -n "$postlink_cmds"; then func_to_tool_file "$output" postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` func_execute_cmds "$postlink_cmds" 'exit $?' fi exit $EXIT_SUCCESS fi if test "$hardcode_action" = relink; then # Fast installation is not supported link_command="$compile_var$compile_command$compile_rpath" relink_command="$finalize_var$finalize_command$finalize_rpath" func_warning "this platform does not like uninstalled shared libraries" func_warning "\`$output' will be relinked during installation" else if test "$fast_install" != no; then link_command="$finalize_var$compile_command$finalize_rpath" if test "$fast_install" = yes; then relink_command=`$ECHO "$compile_var$compile_command$compile_rpath" | $SED 's%@OUTPUT@%\$progdir/\$file%g'` else # fast_install is set to needless relink_command= fi else link_command="$compile_var$compile_command$compile_rpath" relink_command="$finalize_var$finalize_command$finalize_rpath" fi fi # Replace the output file specification. link_command=`$ECHO "$link_command" | $SED 's%@OUTPUT@%'"$output_objdir/$outputname"'%g'` # Delete the old output files. $opt_dry_run || $RM $output $output_objdir/$outputname $output_objdir/lt-$outputname func_show_eval "$link_command" 'exit $?' if test -n "$postlink_cmds"; then func_to_tool_file "$output_objdir/$outputname" postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output_objdir/$outputname"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'` func_execute_cmds "$postlink_cmds" 'exit $?' fi # Now create the wrapper script. func_verbose "creating $output" # Quote the relink command for shipping. if test -n "$relink_command"; then # Preserve any variables that may affect compiler behavior for var in $variables_saved_for_relink; do if eval test -z \"\${$var+set}\"; then relink_command="{ test -z \"\${$var+set}\" || $lt_unset $var || { $var=; export $var; }; }; $relink_command" elif eval var_value=\$$var; test -z "$var_value"; then relink_command="$var=; export $var; $relink_command" else func_quote_for_eval "$var_value" relink_command="$var=$func_quote_for_eval_result; export $var; $relink_command" fi done relink_command="(cd `pwd`; $relink_command)" relink_command=`$ECHO "$relink_command" | $SED "$sed_quote_subst"` fi # Only actually do things if not in dry run mode. $opt_dry_run || { # win32 will think the script is a binary if it has # a .exe suffix, so we strip it off here. case $output in *.exe) func_stripname '' '.exe' "$output" output=$func_stripname_result ;; esac # test for cygwin because mv fails w/o .exe extensions case $host in *cygwin*) exeext=.exe func_stripname '' '.exe' "$outputname" outputname=$func_stripname_result ;; *) exeext= ;; esac case $host in *cygwin* | *mingw* ) func_dirname_and_basename "$output" "" "." output_name=$func_basename_result output_path=$func_dirname_result cwrappersource="$output_path/$objdir/lt-$output_name.c" cwrapper="$output_path/$output_name.exe" $RM $cwrappersource $cwrapper trap "$RM $cwrappersource $cwrapper; exit $EXIT_FAILURE" 1 2 15 func_emit_cwrapperexe_src > $cwrappersource # The wrapper executable is built using the $host compiler, # because it contains $host paths and files. If cross- # compiling, it, like the target executable, must be # executed on the $host or under an emulation environment. $opt_dry_run || { $LTCC $LTCFLAGS -o $cwrapper $cwrappersource $STRIP $cwrapper } # Now, create the wrapper script for func_source use: func_ltwrapper_scriptname $cwrapper $RM $func_ltwrapper_scriptname_result trap "$RM $func_ltwrapper_scriptname_result; exit $EXIT_FAILURE" 1 2 15 $opt_dry_run || { # note: this script will not be executed, so do not chmod. if test "x$build" = "x$host" ; then $cwrapper --lt-dump-script > $func_ltwrapper_scriptname_result else func_emit_wrapper no > $func_ltwrapper_scriptname_result fi } ;; * ) $RM $output trap "$RM $output; exit $EXIT_FAILURE" 1 2 15 func_emit_wrapper no > $output chmod +x $output ;; esac } exit $EXIT_SUCCESS ;; esac # See if we need to build an old-fashioned archive. for oldlib in $oldlibs; do if test "$build_libtool_libs" = convenience; then oldobjs="$libobjs_save $symfileobj" addlibs="$convenience" build_libtool_libs=no else if test "$build_libtool_libs" = module; then oldobjs="$libobjs_save" build_libtool_libs=no else oldobjs="$old_deplibs $non_pic_objects" if test "$preload" = yes && test -f "$symfileobj"; then func_append oldobjs " $symfileobj" fi fi addlibs="$old_convenience" fi if test -n "$addlibs"; then gentop="$output_objdir/${outputname}x" func_append generated " $gentop" func_extract_archives $gentop $addlibs func_append oldobjs " $func_extract_archives_result" fi # Do each command in the archive commands. if test -n "$old_archive_from_new_cmds" && test "$build_libtool_libs" = yes; then cmds=$old_archive_from_new_cmds else # Add any objects from preloaded convenience libraries if test -n "$dlprefiles"; then gentop="$output_objdir/${outputname}x" func_append generated " $gentop" func_extract_archives $gentop $dlprefiles func_append oldobjs " $func_extract_archives_result" fi # POSIX demands no paths to be encoded in archives. We have # to avoid creating archives with duplicate basenames if we # might have to extract them afterwards, e.g., when creating a # static archive out of a convenience library, or when linking # the entirety of a libtool archive into another (currently # not supported by libtool). if (for obj in $oldobjs do func_basename "$obj" $ECHO "$func_basename_result" done | sort | sort -uc >/dev/null 2>&1); then : else echo "copying selected object files to avoid basename conflicts..." gentop="$output_objdir/${outputname}x" func_append generated " $gentop" func_mkdir_p "$gentop" save_oldobjs=$oldobjs oldobjs= counter=1 for obj in $save_oldobjs do func_basename "$obj" objbase="$func_basename_result" case " $oldobjs " in " ") oldobjs=$obj ;; *[\ /]"$objbase "*) while :; do # Make sure we don't pick an alternate name that also # overlaps. newobj=lt$counter-$objbase func_arith $counter + 1 counter=$func_arith_result case " $oldobjs " in *[\ /]"$newobj "*) ;; *) if test ! -f "$gentop/$newobj"; then break; fi ;; esac done func_show_eval "ln $obj $gentop/$newobj || cp $obj $gentop/$newobj" func_append oldobjs " $gentop/$newobj" ;; *) func_append oldobjs " $obj" ;; esac done fi func_to_tool_file "$oldlib" func_convert_file_msys_to_w32 tool_oldlib=$func_to_tool_file_result eval cmds=\"$old_archive_cmds\" func_len " $cmds" len=$func_len_result if test "$len" -lt "$max_cmd_len" || test "$max_cmd_len" -le -1; then cmds=$old_archive_cmds elif test -n "$archiver_list_spec"; then func_verbose "using command file archive linking..." for obj in $oldobjs do func_to_tool_file "$obj" $ECHO "$func_to_tool_file_result" done > $output_objdir/$libname.libcmd func_to_tool_file "$output_objdir/$libname.libcmd" oldobjs=" $archiver_list_spec$func_to_tool_file_result" cmds=$old_archive_cmds else # the command line is too long to link in one step, link in parts func_verbose "using piecewise archive linking..." save_RANLIB=$RANLIB RANLIB=: objlist= concat_cmds= save_oldobjs=$oldobjs oldobjs= # Is there a better way of finding the last object in the list? for obj in $save_oldobjs do last_oldobj=$obj done eval test_cmds=\"$old_archive_cmds\" func_len " $test_cmds" len0=$func_len_result len=$len0 for obj in $save_oldobjs do func_len " $obj" func_arith $len + $func_len_result len=$func_arith_result func_append objlist " $obj" if test "$len" -lt "$max_cmd_len"; then : else # the above command should be used before it gets too long oldobjs=$objlist if test "$obj" = "$last_oldobj" ; then RANLIB=$save_RANLIB fi test -z "$concat_cmds" || concat_cmds=$concat_cmds~ eval concat_cmds=\"\${concat_cmds}$old_archive_cmds\" objlist= len=$len0 fi done RANLIB=$save_RANLIB oldobjs=$objlist if test "X$oldobjs" = "X" ; then eval cmds=\"\$concat_cmds\" else eval cmds=\"\$concat_cmds~\$old_archive_cmds\" fi fi fi func_execute_cmds "$cmds" 'exit $?' done test -n "$generated" && \ func_show_eval "${RM}r$generated" # Now create the libtool archive. case $output in *.la) old_library= test "$build_old_libs" = yes && old_library="$libname.$libext" func_verbose "creating $output" # Preserve any variables that may affect compiler behavior for var in $variables_saved_for_relink; do if eval test -z \"\${$var+set}\"; then relink_command="{ test -z \"\${$var+set}\" || $lt_unset $var || { $var=; export $var; }; }; $relink_command" elif eval var_value=\$$var; test -z "$var_value"; then relink_command="$var=; export $var; $relink_command" else func_quote_for_eval "$var_value" relink_command="$var=$func_quote_for_eval_result; export $var; $relink_command" fi done # Quote the link command for shipping. relink_command="(cd `pwd`; $SHELL $progpath $preserve_args --mode=relink $libtool_args @inst_prefix_dir@)" relink_command=`$ECHO "$relink_command" | $SED "$sed_quote_subst"` if test "$hardcode_automatic" = yes ; then relink_command= fi # Only create the output if not a dry run. $opt_dry_run || { for installed in no yes; do if test "$installed" = yes; then if test -z "$install_libdir"; then break fi output="$output_objdir/$outputname"i # Replace all uninstalled libtool libraries with the installed ones newdependency_libs= for deplib in $dependency_libs; do case $deplib in *.la) func_basename "$deplib" name="$func_basename_result" func_resolve_sysroot "$deplib" eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $func_resolve_sysroot_result` test -z "$libdir" && \ func_fatal_error "\`$deplib' is not a valid libtool archive" func_append newdependency_libs " ${lt_sysroot:+=}$libdir/$name" ;; -L*) func_stripname -L '' "$deplib" func_replace_sysroot "$func_stripname_result" func_append newdependency_libs " -L$func_replace_sysroot_result" ;; -R*) func_stripname -R '' "$deplib" func_replace_sysroot "$func_stripname_result" func_append newdependency_libs " -R$func_replace_sysroot_result" ;; *) func_append newdependency_libs " $deplib" ;; esac done dependency_libs="$newdependency_libs" newdlfiles= for lib in $dlfiles; do case $lib in *.la) func_basename "$lib" name="$func_basename_result" eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $lib` test -z "$libdir" && \ func_fatal_error "\`$lib' is not a valid libtool archive" func_append newdlfiles " ${lt_sysroot:+=}$libdir/$name" ;; *) func_append newdlfiles " $lib" ;; esac done dlfiles="$newdlfiles" newdlprefiles= for lib in $dlprefiles; do case $lib in *.la) # Only pass preopened files to the pseudo-archive (for # eventual linking with the app. that links it) if we # didn't already link the preopened objects directly into # the library: func_basename "$lib" name="$func_basename_result" eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $lib` test -z "$libdir" && \ func_fatal_error "\`$lib' is not a valid libtool archive" func_append newdlprefiles " ${lt_sysroot:+=}$libdir/$name" ;; esac done dlprefiles="$newdlprefiles" else newdlfiles= for lib in $dlfiles; do case $lib in [\\/]* | [A-Za-z]:[\\/]*) abs="$lib" ;; *) abs=`pwd`"/$lib" ;; esac func_append newdlfiles " $abs" done dlfiles="$newdlfiles" newdlprefiles= for lib in $dlprefiles; do case $lib in [\\/]* | [A-Za-z]:[\\/]*) abs="$lib" ;; *) abs=`pwd`"/$lib" ;; esac func_append newdlprefiles " $abs" done dlprefiles="$newdlprefiles" fi $RM $output # place dlname in correct position for cygwin # In fact, it would be nice if we could use this code for all target # systems that can't hard-code library paths into their executables # and that have no shared library path variable independent of PATH, # but it turns out we can't easily determine that from inspecting # libtool variables, so we have to hard-code the OSs to which it # applies here; at the moment, that means platforms that use the PE # object format with DLL files. See the long comment at the top of # tests/bindir.at for full details. tdlname=$dlname case $host,$output,$installed,$module,$dlname in *cygwin*,*lai,yes,no,*.dll | *mingw*,*lai,yes,no,*.dll | *cegcc*,*lai,yes,no,*.dll) # If a -bindir argument was supplied, place the dll there. if test "x$bindir" != x ; then func_relative_path "$install_libdir" "$bindir" tdlname=$func_relative_path_result$dlname else # Otherwise fall back on heuristic. tdlname=../bin/$dlname fi ;; esac $ECHO > $output "\ # $outputname - a libtool library file # Generated by $PROGRAM (GNU $PACKAGE$TIMESTAMP) $VERSION # # Please DO NOT delete this file! # It is necessary for linking the library. # The name that we can dlopen(3). dlname='$tdlname' # Names of this library. library_names='$library_names' # The name of the static archive. old_library='$old_library' # Linker flags that can not go in dependency_libs. inherited_linker_flags='$new_inherited_linker_flags' # Libraries that this one depends upon. dependency_libs='$dependency_libs' # Names of additional weak libraries provided by this library weak_library_names='$weak_libs' # Version information for $libname. current=$current age=$age revision=$revision # Is this an already installed library? installed=$installed # Should we warn about portability when linking against -modules? shouldnotlink=$module # Files to dlopen/dlpreopen dlopen='$dlfiles' dlpreopen='$dlprefiles' # Directory that this library needs to be installed in: libdir='$install_libdir'" if test "$installed" = no && test "$need_relink" = yes; then $ECHO >> $output "\ relink_command=\"$relink_command\"" fi done } # Do a symbolic link so that the libtool archive can be found in # LD_LIBRARY_PATH before the program is installed. func_show_eval '( cd "$output_objdir" && $RM "$outputname" && $LN_S "../$outputname" "$outputname" )' 'exit $?' ;; esac exit $EXIT_SUCCESS } { test "$opt_mode" = link || test "$opt_mode" = relink; } && func_mode_link ${1+"$@"} # func_mode_uninstall arg... func_mode_uninstall () { $opt_debug RM="$nonopt" files= rmforce= exit_status=0 # This variable tells wrapper scripts just to set variables rather # than running their programs. libtool_install_magic="$magic" for arg do case $arg in -f) func_append RM " $arg"; rmforce=yes ;; -*) func_append RM " $arg" ;; *) func_append files " $arg" ;; esac done test -z "$RM" && \ func_fatal_help "you must specify an RM program" rmdirs= for file in $files; do func_dirname "$file" "" "." dir="$func_dirname_result" if test "X$dir" = X.; then odir="$objdir" else odir="$dir/$objdir" fi func_basename "$file" name="$func_basename_result" test "$opt_mode" = uninstall && odir="$dir" # Remember odir for removal later, being careful to avoid duplicates if test "$opt_mode" = clean; then case " $rmdirs " in *" $odir "*) ;; *) func_append rmdirs " $odir" ;; esac fi # Don't error if the file doesn't exist and rm -f was used. if { test -L "$file"; } >/dev/null 2>&1 || { test -h "$file"; } >/dev/null 2>&1 || test -f "$file"; then : elif test -d "$file"; then exit_status=1 continue elif test "$rmforce" = yes; then continue fi rmfiles="$file" case $name in *.la) # Possibly a libtool archive, so verify it. if func_lalib_p "$file"; then func_source $dir/$name # Delete the libtool libraries and symlinks. for n in $library_names; do func_append rmfiles " $odir/$n" done test -n "$old_library" && func_append rmfiles " $odir/$old_library" case "$opt_mode" in clean) case " $library_names " in *" $dlname "*) ;; *) test -n "$dlname" && func_append rmfiles " $odir/$dlname" ;; esac test -n "$libdir" && func_append rmfiles " $odir/$name $odir/${name}i" ;; uninstall) if test -n "$library_names"; then # Do each command in the postuninstall commands. func_execute_cmds "$postuninstall_cmds" 'test "$rmforce" = yes || exit_status=1' fi if test -n "$old_library"; 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then eval exec "$exec_cmd" exit $EXIT_FAILURE fi exit $exit_status # The TAGs below are defined such that we never get into a situation # in which we disable both kinds of libraries. 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See the GNU # General Public License for more details. # # You should have received a copy of the GNU General Public License # along with this program; if not, see . # # As a special exception to the GNU General Public License, if you # distribute this file as part of a program that contains a # configuration script generated by Autoconf, you may include it under # the same distribution terms that you use for the rest of that # program. This Exception is an additional permission under section 7 # of the GNU General Public License, version 3 ("GPLv3"). # # Originally written by Per Bothner. # # You can get the latest version of this script from: # http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.guess;hb=HEAD # # Please send patches with a ChangeLog entry to config-patches@gnu.org. me=`echo "$0" | sed -e 's,.*/,,'` usage="\ Usage: $0 [OPTION] Output the configuration name of the system \`$me' is run on. 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Hard to guess exactly what SunOS6 will be like, but # it's likely to be more like Solaris than SunOS4. echo sparc-sun-solaris3`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit ;; sun4*:SunOS:*:*) case "`/usr/bin/arch -k`" in Series*|S4*) UNAME_RELEASE=`uname -v` ;; esac # Japanese Language versions have a version number like `4.1.3-JL'. echo sparc-sun-sunos`echo ${UNAME_RELEASE}|sed -e 's/-/_/'` exit ;; sun3*:SunOS:*:*) echo m68k-sun-sunos${UNAME_RELEASE} exit ;; sun*:*:4.2BSD:*) UNAME_RELEASE=`(sed 1q /etc/motd | awk '{print substr($5,1,3)}') 2>/dev/null` test "x${UNAME_RELEASE}" = "x" && UNAME_RELEASE=3 case "`/bin/arch`" in sun3) echo m68k-sun-sunos${UNAME_RELEASE} ;; sun4) echo sparc-sun-sunos${UNAME_RELEASE} ;; esac exit ;; aushp:SunOS:*:*) echo sparc-auspex-sunos${UNAME_RELEASE} exit ;; # The situation for MiNT is a little confusing. The machine name # can be virtually everything (everything which is not # "atarist" or "atariste" at least should have a processor # > m68000). The system name ranges from "MiNT" over "FreeMiNT" # to the lowercase version "mint" (or "freemint"). Finally # the system name "TOS" denotes a system which is actually not # MiNT. But MiNT is downward compatible to TOS, so this should # be no problem. atarist[e]:*MiNT:*:* | atarist[e]:*mint:*:* | atarist[e]:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit ;; atari*:*MiNT:*:* | atari*:*mint:*:* | atarist[e]:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit ;; *falcon*:*MiNT:*:* | *falcon*:*mint:*:* | *falcon*:*TOS:*:*) echo m68k-atari-mint${UNAME_RELEASE} exit ;; milan*:*MiNT:*:* | milan*:*mint:*:* | *milan*:*TOS:*:*) echo m68k-milan-mint${UNAME_RELEASE} exit ;; hades*:*MiNT:*:* | hades*:*mint:*:* | *hades*:*TOS:*:*) echo m68k-hades-mint${UNAME_RELEASE} exit ;; *:*MiNT:*:* | *:*mint:*:* | *:*TOS:*:*) echo m68k-unknown-mint${UNAME_RELEASE} exit ;; m68k:machten:*:*) echo m68k-apple-machten${UNAME_RELEASE} exit ;; powerpc:machten:*:*) echo powerpc-apple-machten${UNAME_RELEASE} exit ;; RISC*:Mach:*:*) echo mips-dec-mach_bsd4.3 exit ;; RISC*:ULTRIX:*:*) echo mips-dec-ultrix${UNAME_RELEASE} exit ;; VAX*:ULTRIX*:*:*) echo vax-dec-ultrix${UNAME_RELEASE} exit ;; 2020:CLIX:*:* | 2430:CLIX:*:*) echo clipper-intergraph-clix${UNAME_RELEASE} exit ;; mips:*:*:UMIPS | mips:*:*:RISCos) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #ifdef __cplusplus #include /* for printf() prototype */ int main (int argc, char *argv[]) { #else int main (argc, argv) int argc; char *argv[]; { #endif #if defined (host_mips) && defined (MIPSEB) #if defined (SYSTYPE_SYSV) printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0); #endif #if defined (SYSTYPE_SVR4) printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0); #endif #if defined (SYSTYPE_BSD43) || defined(SYSTYPE_BSD) printf ("mips-mips-riscos%sbsd\n", argv[1]); exit (0); #endif #endif exit (-1); } EOF $CC_FOR_BUILD -o $dummy $dummy.c && dummyarg=`echo "${UNAME_RELEASE}" | sed -n 's/\([0-9]*\).*/\1/p'` && SYSTEM_NAME=`$dummy $dummyarg` && { echo "$SYSTEM_NAME"; exit; } echo mips-mips-riscos${UNAME_RELEASE} exit ;; Motorola:PowerMAX_OS:*:*) echo powerpc-motorola-powermax exit ;; Motorola:*:4.3:PL8-*) echo powerpc-harris-powermax exit ;; Night_Hawk:*:*:PowerMAX_OS | Synergy:PowerMAX_OS:*:*) echo powerpc-harris-powermax exit ;; Night_Hawk:Power_UNIX:*:*) echo powerpc-harris-powerunix exit ;; m88k:CX/UX:7*:*) echo m88k-harris-cxux7 exit ;; m88k:*:4*:R4*) echo m88k-motorola-sysv4 exit ;; m88k:*:3*:R3*) echo m88k-motorola-sysv3 exit ;; AViiON:dgux:*:*) # DG/UX returns AViiON for all architectures UNAME_PROCESSOR=`/usr/bin/uname -p` if [ $UNAME_PROCESSOR = mc88100 ] || [ $UNAME_PROCESSOR = mc88110 ] then if [ ${TARGET_BINARY_INTERFACE}x = m88kdguxelfx ] || \ [ ${TARGET_BINARY_INTERFACE}x = x ] then echo m88k-dg-dgux${UNAME_RELEASE} else echo m88k-dg-dguxbcs${UNAME_RELEASE} fi else echo i586-dg-dgux${UNAME_RELEASE} fi exit ;; M88*:DolphinOS:*:*) # DolphinOS (SVR3) echo m88k-dolphin-sysv3 exit ;; M88*:*:R3*:*) # Delta 88k system running SVR3 echo m88k-motorola-sysv3 exit ;; XD88*:*:*:*) # Tektronix XD88 system running UTekV (SVR3) echo m88k-tektronix-sysv3 exit ;; Tek43[0-9][0-9]:UTek:*:*) # Tektronix 4300 system running UTek (BSD) echo m68k-tektronix-bsd exit ;; *:IRIX*:*:*) echo mips-sgi-irix`echo ${UNAME_RELEASE}|sed -e 's/-/_/g'` exit ;; ????????:AIX?:[12].1:2) # AIX 2.2.1 or AIX 2.1.1 is RT/PC AIX. echo romp-ibm-aix # uname -m gives an 8 hex-code CPU id exit ;; # Note that: echo "'`uname -s`'" gives 'AIX ' i*86:AIX:*:*) echo i386-ibm-aix exit ;; ia64:AIX:*:*) if [ -x /usr/bin/oslevel ] ; then IBM_REV=`/usr/bin/oslevel` else IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} fi echo ${UNAME_MACHINE}-ibm-aix${IBM_REV} exit ;; *:AIX:2:3) if grep bos325 /usr/include/stdio.h >/dev/null 2>&1; then eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #include main() { if (!__power_pc()) exit(1); puts("powerpc-ibm-aix3.2.5"); exit(0); } EOF if $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` then echo "$SYSTEM_NAME" else echo rs6000-ibm-aix3.2.5 fi elif grep bos324 /usr/include/stdio.h >/dev/null 2>&1; then echo rs6000-ibm-aix3.2.4 else echo rs6000-ibm-aix3.2 fi exit ;; *:AIX:*:[4567]) IBM_CPU_ID=`/usr/sbin/lsdev -C -c processor -S available | sed 1q | awk '{ print $1 }'` if /usr/sbin/lsattr -El ${IBM_CPU_ID} | grep ' POWER' >/dev/null 2>&1; then IBM_ARCH=rs6000 else IBM_ARCH=powerpc fi if [ -x /usr/bin/oslevel ] ; then IBM_REV=`/usr/bin/oslevel` else IBM_REV=${UNAME_VERSION}.${UNAME_RELEASE} fi echo ${IBM_ARCH}-ibm-aix${IBM_REV} exit ;; *:AIX:*:*) echo rs6000-ibm-aix exit ;; ibmrt:4.4BSD:*|romp-ibm:BSD:*) echo romp-ibm-bsd4.4 exit ;; ibmrt:*BSD:*|romp-ibm:BSD:*) # covers RT/PC BSD and echo romp-ibm-bsd${UNAME_RELEASE} # 4.3 with uname added to exit ;; # report: romp-ibm BSD 4.3 *:BOSX:*:*) echo rs6000-bull-bosx exit ;; DPX/2?00:B.O.S.:*:*) echo m68k-bull-sysv3 exit ;; 9000/[34]??:4.3bsd:1.*:*) echo m68k-hp-bsd exit ;; hp300:4.4BSD:*:* | 9000/[34]??:4.3bsd:2.*:*) echo m68k-hp-bsd4.4 exit ;; 9000/[34678]??:HP-UX:*:*) HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` case "${UNAME_MACHINE}" in 9000/31? ) HP_ARCH=m68000 ;; 9000/[34]?? ) HP_ARCH=m68k ;; 9000/[678][0-9][0-9]) if [ -x /usr/bin/getconf ]; then sc_cpu_version=`/usr/bin/getconf SC_CPU_VERSION 2>/dev/null` sc_kernel_bits=`/usr/bin/getconf SC_KERNEL_BITS 2>/dev/null` case "${sc_cpu_version}" in 523) HP_ARCH="hppa1.0" ;; # CPU_PA_RISC1_0 528) HP_ARCH="hppa1.1" ;; # CPU_PA_RISC1_1 532) # CPU_PA_RISC2_0 case "${sc_kernel_bits}" in 32) HP_ARCH="hppa2.0n" ;; 64) HP_ARCH="hppa2.0w" ;; '') HP_ARCH="hppa2.0" ;; # HP-UX 10.20 esac ;; esac fi if [ "${HP_ARCH}" = "" ]; then eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #define _HPUX_SOURCE #include #include int main () { #if defined(_SC_KERNEL_BITS) long bits = sysconf(_SC_KERNEL_BITS); #endif long cpu = sysconf (_SC_CPU_VERSION); switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0"); break; case CPU_PA_RISC1_1: puts ("hppa1.1"); break; case CPU_PA_RISC2_0: #if defined(_SC_KERNEL_BITS) switch (bits) { case 64: puts ("hppa2.0w"); break; case 32: puts ("hppa2.0n"); break; default: puts ("hppa2.0"); break; } break; #else /* !defined(_SC_KERNEL_BITS) */ puts ("hppa2.0"); break; #endif default: puts ("hppa1.0"); break; } exit (0); } EOF (CCOPTS= $CC_FOR_BUILD -o $dummy $dummy.c 2>/dev/null) && HP_ARCH=`$dummy` test -z "$HP_ARCH" && HP_ARCH=hppa fi ;; esac if [ ${HP_ARCH} = "hppa2.0w" ] then eval $set_cc_for_build # hppa2.0w-hp-hpux* has a 64-bit kernel and a compiler generating # 32-bit code. hppa64-hp-hpux* has the same kernel and a compiler # generating 64-bit code. GNU and HP use different nomenclature: # # $ CC_FOR_BUILD=cc ./config.guess # => hppa2.0w-hp-hpux11.23 # $ CC_FOR_BUILD="cc +DA2.0w" ./config.guess # => hppa64-hp-hpux11.23 if echo __LP64__ | (CCOPTS= $CC_FOR_BUILD -E - 2>/dev/null) | grep -q __LP64__ then HP_ARCH="hppa2.0w" else HP_ARCH="hppa64" fi fi echo ${HP_ARCH}-hp-hpux${HPUX_REV} exit ;; ia64:HP-UX:*:*) HPUX_REV=`echo ${UNAME_RELEASE}|sed -e 's/[^.]*.[0B]*//'` echo ia64-hp-hpux${HPUX_REV} exit ;; 3050*:HI-UX:*:*) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #include int main () { long cpu = sysconf (_SC_CPU_VERSION); /* The order matters, because CPU_IS_HP_MC68K erroneously returns true for CPU_PA_RISC1_0. CPU_IS_PA_RISC returns correct results, however. */ if (CPU_IS_PA_RISC (cpu)) { switch (cpu) { case CPU_PA_RISC1_0: puts ("hppa1.0-hitachi-hiuxwe2"); break; case CPU_PA_RISC1_1: puts ("hppa1.1-hitachi-hiuxwe2"); break; case CPU_PA_RISC2_0: puts ("hppa2.0-hitachi-hiuxwe2"); break; default: puts ("hppa-hitachi-hiuxwe2"); break; } } else if (CPU_IS_HP_MC68K (cpu)) puts ("m68k-hitachi-hiuxwe2"); else puts ("unknown-hitachi-hiuxwe2"); exit (0); } EOF $CC_FOR_BUILD -o $dummy $dummy.c && SYSTEM_NAME=`$dummy` && { echo "$SYSTEM_NAME"; exit; } echo unknown-hitachi-hiuxwe2 exit ;; 9000/7??:4.3bsd:*:* | 9000/8?[79]:4.3bsd:*:* ) echo hppa1.1-hp-bsd exit ;; 9000/8??:4.3bsd:*:*) echo hppa1.0-hp-bsd exit ;; *9??*:MPE/iX:*:* | *3000*:MPE/iX:*:*) echo hppa1.0-hp-mpeix exit ;; hp7??:OSF1:*:* | hp8?[79]:OSF1:*:* ) echo hppa1.1-hp-osf exit ;; hp8??:OSF1:*:*) echo hppa1.0-hp-osf exit ;; i*86:OSF1:*:*) if [ -x /usr/sbin/sysversion ] ; then echo ${UNAME_MACHINE}-unknown-osf1mk else echo ${UNAME_MACHINE}-unknown-osf1 fi exit ;; parisc*:Lites*:*:*) echo hppa1.1-hp-lites exit ;; C1*:ConvexOS:*:* | convex:ConvexOS:C1*:*) echo c1-convex-bsd exit ;; C2*:ConvexOS:*:* | convex:ConvexOS:C2*:*) if getsysinfo -f scalar_acc then echo c32-convex-bsd else echo c2-convex-bsd fi exit ;; C34*:ConvexOS:*:* | convex:ConvexOS:C34*:*) echo c34-convex-bsd exit ;; C38*:ConvexOS:*:* | convex:ConvexOS:C38*:*) echo c38-convex-bsd exit ;; C4*:ConvexOS:*:* | convex:ConvexOS:C4*:*) echo c4-convex-bsd exit ;; CRAY*Y-MP:*:*:*) echo ymp-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*[A-Z]90:*:*:*) echo ${UNAME_MACHINE}-cray-unicos${UNAME_RELEASE} \ | sed -e 's/CRAY.*\([A-Z]90\)/\1/' \ -e y/ABCDEFGHIJKLMNOPQRSTUVWXYZ/abcdefghijklmnopqrstuvwxyz/ \ -e 's/\.[^.]*$/.X/' exit ;; CRAY*TS:*:*:*) echo t90-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*T3E:*:*:*) echo alphaev5-cray-unicosmk${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; CRAY*SV1:*:*:*) echo sv1-cray-unicos${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; *:UNICOS/mp:*:*) echo craynv-cray-unicosmp${UNAME_RELEASE} | sed -e 's/\.[^.]*$/.X/' exit ;; F30[01]:UNIX_System_V:*:* | F700:UNIX_System_V:*:*) FUJITSU_PROC=`uname -m | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz'` FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` FUJITSU_REL=`echo ${UNAME_RELEASE} | sed -e 's/ /_/'` echo "${FUJITSU_PROC}-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit ;; 5000:UNIX_System_V:4.*:*) FUJITSU_SYS=`uname -p | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/\///'` FUJITSU_REL=`echo ${UNAME_RELEASE} | tr 'ABCDEFGHIJKLMNOPQRSTUVWXYZ' 'abcdefghijklmnopqrstuvwxyz' | sed -e 's/ /_/'` echo "sparc-fujitsu-${FUJITSU_SYS}${FUJITSU_REL}" exit ;; i*86:BSD/386:*:* | i*86:BSD/OS:*:* | *:Ascend\ Embedded/OS:*:*) echo ${UNAME_MACHINE}-pc-bsdi${UNAME_RELEASE} exit ;; sparc*:BSD/OS:*:*) echo sparc-unknown-bsdi${UNAME_RELEASE} exit ;; *:BSD/OS:*:*) echo ${UNAME_MACHINE}-unknown-bsdi${UNAME_RELEASE} exit ;; *:FreeBSD:*:*) UNAME_PROCESSOR=`/usr/bin/uname -p` case ${UNAME_PROCESSOR} in amd64) echo x86_64-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; *) echo ${UNAME_PROCESSOR}-unknown-freebsd`echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'` ;; esac exit ;; i*:CYGWIN*:*) echo ${UNAME_MACHINE}-pc-cygwin exit ;; *:MINGW64*:*) echo ${UNAME_MACHINE}-pc-mingw64 exit ;; *:MINGW*:*) echo ${UNAME_MACHINE}-pc-mingw32 exit ;; i*:MSYS*:*) echo ${UNAME_MACHINE}-pc-msys exit ;; i*:windows32*:*) # uname -m includes "-pc" on this system. echo ${UNAME_MACHINE}-mingw32 exit ;; i*:PW*:*) echo ${UNAME_MACHINE}-pc-pw32 exit ;; *:Interix*:*) case ${UNAME_MACHINE} in x86) echo i586-pc-interix${UNAME_RELEASE} exit ;; authenticamd | genuineintel | EM64T) echo x86_64-unknown-interix${UNAME_RELEASE} exit ;; IA64) echo ia64-unknown-interix${UNAME_RELEASE} exit ;; esac ;; [345]86:Windows_95:* | [345]86:Windows_98:* | [345]86:Windows_NT:*) echo i${UNAME_MACHINE}-pc-mks exit ;; 8664:Windows_NT:*) echo x86_64-pc-mks exit ;; i*:Windows_NT*:* | Pentium*:Windows_NT*:*) # How do we know it's Interix rather than the generic POSIX subsystem? # It also conflicts with pre-2.0 versions of AT&T UWIN. Should we # UNAME_MACHINE based on the output of uname instead of i386? echo i586-pc-interix exit ;; i*:UWIN*:*) echo ${UNAME_MACHINE}-pc-uwin exit ;; amd64:CYGWIN*:*:* | x86_64:CYGWIN*:*:*) echo x86_64-unknown-cygwin exit ;; p*:CYGWIN*:*) echo powerpcle-unknown-cygwin exit ;; prep*:SunOS:5.*:*) echo powerpcle-unknown-solaris2`echo ${UNAME_RELEASE}|sed -e 's/[^.]*//'` exit ;; *:GNU:*:*) # the GNU system echo `echo ${UNAME_MACHINE}|sed -e 's,[-/].*$,,'`-unknown-${LIBC}`echo ${UNAME_RELEASE}|sed -e 's,/.*$,,'` exit ;; *:GNU/*:*:*) # other systems with GNU libc and userland echo ${UNAME_MACHINE}-unknown-`echo ${UNAME_SYSTEM} | sed 's,^[^/]*/,,' | tr '[A-Z]' '[a-z]'``echo ${UNAME_RELEASE}|sed -e 's/[-(].*//'`-${LIBC} exit ;; i*86:Minix:*:*) echo ${UNAME_MACHINE}-pc-minix exit ;; aarch64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; aarch64_be:Linux:*:*) UNAME_MACHINE=aarch64_be echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; alpha:Linux:*:*) case `sed -n '/^cpu model/s/^.*: \(.*\)/\1/p' < /proc/cpuinfo` in EV5) UNAME_MACHINE=alphaev5 ;; EV56) UNAME_MACHINE=alphaev56 ;; PCA56) UNAME_MACHINE=alphapca56 ;; PCA57) UNAME_MACHINE=alphapca56 ;; EV6) UNAME_MACHINE=alphaev6 ;; EV67) UNAME_MACHINE=alphaev67 ;; EV68*) UNAME_MACHINE=alphaev68 ;; esac objdump --private-headers /bin/sh | grep -q ld.so.1 if test "$?" = 0 ; then LIBC="gnulibc1" ; fi echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; arc:Linux:*:* | arceb:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; arm*:Linux:*:*) eval $set_cc_for_build if echo __ARM_EABI__ | $CC_FOR_BUILD -E - 2>/dev/null \ | grep -q __ARM_EABI__ then echo ${UNAME_MACHINE}-unknown-linux-${LIBC} else if echo __ARM_PCS_VFP | $CC_FOR_BUILD -E - 2>/dev/null \ | grep -q __ARM_PCS_VFP then echo ${UNAME_MACHINE}-unknown-linux-${LIBC}eabi else echo ${UNAME_MACHINE}-unknown-linux-${LIBC}eabihf fi fi exit ;; avr32*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; cris:Linux:*:*) echo ${UNAME_MACHINE}-axis-linux-${LIBC} exit ;; crisv32:Linux:*:*) echo ${UNAME_MACHINE}-axis-linux-${LIBC} exit ;; frv:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; hexagon:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; i*86:Linux:*:*) echo ${UNAME_MACHINE}-pc-linux-${LIBC} exit ;; ia64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; m32r*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; m68*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; mips:Linux:*:* | mips64:Linux:*:*) eval $set_cc_for_build sed 's/^ //' << EOF >$dummy.c #undef CPU #undef ${UNAME_MACHINE} #undef ${UNAME_MACHINE}el #if defined(__MIPSEL__) || defined(__MIPSEL) || defined(_MIPSEL) || defined(MIPSEL) CPU=${UNAME_MACHINE}el #else #if defined(__MIPSEB__) || defined(__MIPSEB) || defined(_MIPSEB) || defined(MIPSEB) CPU=${UNAME_MACHINE} #else CPU= #endif #endif EOF eval `$CC_FOR_BUILD -E $dummy.c 2>/dev/null | grep '^CPU'` test x"${CPU}" != x && { echo "${CPU}-unknown-linux-${LIBC}"; exit; } ;; or1k:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; or32:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; padre:Linux:*:*) echo sparc-unknown-linux-${LIBC} exit ;; parisc64:Linux:*:* | hppa64:Linux:*:*) echo hppa64-unknown-linux-${LIBC} exit ;; parisc:Linux:*:* | hppa:Linux:*:*) # Look for CPU level case `grep '^cpu[^a-z]*:' /proc/cpuinfo 2>/dev/null | cut -d' ' -f2` in PA7*) echo hppa1.1-unknown-linux-${LIBC} ;; PA8*) echo hppa2.0-unknown-linux-${LIBC} ;; *) echo hppa-unknown-linux-${LIBC} ;; esac exit ;; ppc64:Linux:*:*) echo powerpc64-unknown-linux-${LIBC} exit ;; ppc:Linux:*:*) echo powerpc-unknown-linux-${LIBC} exit ;; ppc64le:Linux:*:*) echo powerpc64le-unknown-linux-${LIBC} exit ;; ppcle:Linux:*:*) echo powerpcle-unknown-linux-${LIBC} exit ;; s390:Linux:*:* | s390x:Linux:*:*) echo ${UNAME_MACHINE}-ibm-linux-${LIBC} exit ;; sh64*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; sh*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; sparc:Linux:*:* | sparc64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; tile*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; vax:Linux:*:*) echo ${UNAME_MACHINE}-dec-linux-${LIBC} exit ;; x86_64:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; xtensa*:Linux:*:*) echo ${UNAME_MACHINE}-unknown-linux-${LIBC} exit ;; i*86:DYNIX/ptx:4*:*) # ptx 4.0 does uname -s correctly, with DYNIX/ptx in there. # earlier versions are messed up and put the nodename in both # sysname and nodename. echo i386-sequent-sysv4 exit ;; i*86:UNIX_SV:4.2MP:2.*) # Unixware is an offshoot of SVR4, but it has its own version # number series starting with 2... # I am not positive that other SVR4 systems won't match this, # I just have to hope. -- rms. # Use sysv4.2uw... so that sysv4* matches it. echo ${UNAME_MACHINE}-pc-sysv4.2uw${UNAME_VERSION} exit ;; i*86:OS/2:*:*) # If we were able to find `uname', then EMX Unix compatibility # is probably installed. echo ${UNAME_MACHINE}-pc-os2-emx exit ;; i*86:XTS-300:*:STOP) echo ${UNAME_MACHINE}-unknown-stop exit ;; i*86:atheos:*:*) echo ${UNAME_MACHINE}-unknown-atheos exit ;; i*86:syllable:*:*) echo ${UNAME_MACHINE}-pc-syllable exit ;; i*86:LynxOS:2.*:* | i*86:LynxOS:3.[01]*:* | i*86:LynxOS:4.[02]*:*) echo i386-unknown-lynxos${UNAME_RELEASE} exit ;; i*86:*DOS:*:*) echo ${UNAME_MACHINE}-pc-msdosdjgpp exit ;; i*86:*:4.*:* | i*86:SYSTEM_V:4.*:*) UNAME_REL=`echo ${UNAME_RELEASE} | sed 's/\/MP$//'` if grep Novell /usr/include/link.h >/dev/null 2>/dev/null; then echo ${UNAME_MACHINE}-univel-sysv${UNAME_REL} else echo ${UNAME_MACHINE}-pc-sysv${UNAME_REL} fi exit ;; i*86:*:5:[678]*) # UnixWare 7.x, OpenUNIX and OpenServer 6. case `/bin/uname -X | grep "^Machine"` in *486*) UNAME_MACHINE=i486 ;; *Pentium) UNAME_MACHINE=i586 ;; *Pent*|*Celeron) UNAME_MACHINE=i686 ;; esac echo ${UNAME_MACHINE}-unknown-sysv${UNAME_RELEASE}${UNAME_SYSTEM}${UNAME_VERSION} exit ;; i*86:*:3.2:*) if test -f /usr/options/cb.name; then UNAME_REL=`sed -n 's/.*Version //p' /dev/null >/dev/null ; then UNAME_REL=`(/bin/uname -X|grep Release|sed -e 's/.*= //')` (/bin/uname -X|grep i80486 >/dev/null) && UNAME_MACHINE=i486 (/bin/uname -X|grep '^Machine.*Pentium' >/dev/null) \ && UNAME_MACHINE=i586 (/bin/uname -X|grep '^Machine.*Pent *II' >/dev/null) \ && UNAME_MACHINE=i686 (/bin/uname -X|grep '^Machine.*Pentium Pro' >/dev/null) \ && UNAME_MACHINE=i686 echo ${UNAME_MACHINE}-pc-sco$UNAME_REL else echo ${UNAME_MACHINE}-pc-sysv32 fi exit ;; pc:*:*:*) # Left here for compatibility: # uname -m prints for DJGPP always 'pc', but it prints nothing about # the processor, so we play safe by assuming i586. # Note: whatever this is, it MUST be the same as what config.sub # prints for the "djgpp" host, or else GDB configury will decide that # this is a cross-build. echo i586-pc-msdosdjgpp exit ;; Intel:Mach:3*:*) echo i386-pc-mach3 exit ;; paragon:*:*:*) echo i860-intel-osf1 exit ;; i860:*:4.*:*) # i860-SVR4 if grep Stardent /usr/include/sys/uadmin.h >/dev/null 2>&1 ; then echo i860-stardent-sysv${UNAME_RELEASE} # Stardent Vistra i860-SVR4 else # Add other i860-SVR4 vendors below as they are discovered. echo i860-unknown-sysv${UNAME_RELEASE} # Unknown i860-SVR4 fi exit ;; mini*:CTIX:SYS*5:*) # "miniframe" echo m68010-convergent-sysv exit ;; mc68k:UNIX:SYSTEM5:3.51m) echo m68k-convergent-sysv exit ;; M680?0:D-NIX:5.3:*) echo m68k-diab-dnix exit ;; M68*:*:R3V[5678]*:*) test -r /sysV68 && { echo 'm68k-motorola-sysv'; exit; } ;; 3[345]??:*:4.0:3.0 | 3[34]??A:*:4.0:3.0 | 3[34]??,*:*:4.0:3.0 | 3[34]??/*:*:4.0:3.0 | 4400:*:4.0:3.0 | 4850:*:4.0:3.0 | SKA40:*:4.0:3.0 | SDS2:*:4.0:3.0 | SHG2:*:4.0:3.0 | S7501*:*:4.0:3.0) OS_REL='' test -r /etc/.relid \ && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && { echo i486-ncr-sysv4.3${OS_REL}; exit; } /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;; 3[34]??:*:4.0:* | 3[34]??,*:*:4.0:*) /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && { echo i486-ncr-sysv4; exit; } ;; NCR*:*:4.2:* | MPRAS*:*:4.2:*) OS_REL='.3' test -r /etc/.relid \ && OS_REL=.`sed -n 's/[^ ]* [^ ]* \([0-9][0-9]\).*/\1/p' < /etc/.relid` /bin/uname -p 2>/dev/null | grep 86 >/dev/null \ && { echo i486-ncr-sysv4.3${OS_REL}; exit; } /bin/uname -p 2>/dev/null | /bin/grep entium >/dev/null \ && { echo i586-ncr-sysv4.3${OS_REL}; exit; } /bin/uname -p 2>/dev/null | /bin/grep pteron >/dev/null \ && { echo i586-ncr-sysv4.3${OS_REL}; exit; } ;; m68*:LynxOS:2.*:* | m68*:LynxOS:3.0*:*) echo m68k-unknown-lynxos${UNAME_RELEASE} exit ;; mc68030:UNIX_System_V:4.*:*) echo m68k-atari-sysv4 exit ;; TSUNAMI:LynxOS:2.*:*) echo sparc-unknown-lynxos${UNAME_RELEASE} exit ;; rs6000:LynxOS:2.*:*) echo rs6000-unknown-lynxos${UNAME_RELEASE} exit ;; PowerPC:LynxOS:2.*:* | PowerPC:LynxOS:3.[01]*:* | PowerPC:LynxOS:4.[02]*:*) echo powerpc-unknown-lynxos${UNAME_RELEASE} exit ;; SM[BE]S:UNIX_SV:*:*) echo mips-dde-sysv${UNAME_RELEASE} exit ;; RM*:ReliantUNIX-*:*:*) echo mips-sni-sysv4 exit ;; RM*:SINIX-*:*:*) echo mips-sni-sysv4 exit ;; *:SINIX-*:*:*) if uname -p 2>/dev/null >/dev/null ; then UNAME_MACHINE=`(uname -p) 2>/dev/null` echo ${UNAME_MACHINE}-sni-sysv4 else echo ns32k-sni-sysv fi exit ;; PENTIUM:*:4.0*:*) # Unisys `ClearPath HMP IX 4000' SVR4/MP effort # says echo i586-unisys-sysv4 exit ;; *:UNIX_System_V:4*:FTX*) # From Gerald Hewes . # How about differentiating between stratus architectures? -djm echo hppa1.1-stratus-sysv4 exit ;; *:*:*:FTX*) # From seanf@swdc.stratus.com. echo i860-stratus-sysv4 exit ;; i*86:VOS:*:*) # From Paul.Green@stratus.com. echo ${UNAME_MACHINE}-stratus-vos exit ;; *:VOS:*:*) # From Paul.Green@stratus.com. echo hppa1.1-stratus-vos exit ;; mc68*:A/UX:*:*) echo m68k-apple-aux${UNAME_RELEASE} exit ;; news*:NEWS-OS:6*:*) echo mips-sony-newsos6 exit ;; R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*) if [ -d /usr/nec ]; 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Make sure it is in your PATH or set the PKG_CONFIG environment variable to the full path to pkg-config. _PKG_TEXT To get pkg-config, see .])[]dnl ]) else $1[]_CFLAGS=$pkg_cv_[]$1[]_CFLAGS $1[]_LIBS=$pkg_cv_[]$1[]_LIBS AC_MSG_RESULT([yes]) $3 fi[]dnl ])# PKG_CHECK_MODULES dnl xorg-macros.m4. Generated from xorg-macros.m4.in xorgversion.m4 by configure. dnl dnl Copyright (c) 2005, 2006, Oracle and/or its affiliates. All rights reserved. dnl dnl Permission is hereby granted, free of charge, to any person obtaining a dnl copy of this software and associated documentation files (the "Software"), dnl to deal in the Software without restriction, including without limitation dnl the rights to use, copy, modify, merge, publish, distribute, sublicense, dnl and/or sell copies of the Software, and to permit persons to whom the dnl Software is furnished to do so, subject to the following conditions: dnl dnl The above copyright notice and this permission notice (including the next dnl paragraph) shall be included in all copies or substantial portions of the dnl Software. dnl dnl THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR dnl IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, dnl FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL dnl THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER dnl LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING dnl FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER dnl DEALINGS IN THE SOFTWARE. # XORG_MACROS_VERSION(required-version) # ------------------------------------- # Minimum version: 1.1.0 # # If you're using a macro added in Version 1.1 or newer, include this in # your configure.ac with the minimum required version, such as: # XORG_MACROS_VERSION(1.1) # # To ensure that this macro is defined, also add: # m4_ifndef([XORG_MACROS_VERSION], # [m4_fatal([must install xorg-macros 1.1 or later before running autoconf/autogen])]) # # # See the "minimum version" comment for each macro you use to see what # version you require. m4_defun([XORG_MACROS_VERSION],[ m4_define([vers_have], [1.17]) m4_define([maj_have], m4_substr(vers_have, 0, m4_index(vers_have, [.]))) m4_define([maj_needed], m4_substr([$1], 0, m4_index([$1], [.]))) m4_if(m4_cmp(maj_have, maj_needed), 0,, [m4_fatal([xorg-macros major version ]maj_needed[ is required but ]vers_have[ found])]) m4_if(m4_version_compare(vers_have, [$1]), -1, [m4_fatal([xorg-macros version $1 or higher is required but ]vers_have[ found])]) m4_undefine([vers_have]) m4_undefine([maj_have]) m4_undefine([maj_needed]) ]) # XORG_MACROS_VERSION # XORG_PROG_RAWCPP() # ------------------ # Minimum version: 1.0.0 # # Find cpp program and necessary flags for use in pre-processing text files # such as man pages and config files AC_DEFUN([XORG_PROG_RAWCPP],[ AC_REQUIRE([AC_PROG_CPP]) AC_PATH_PROGS(RAWCPP, [cpp], [${CPP}], [$PATH:/bin:/usr/bin:/usr/lib:/usr/libexec:/usr/ccs/lib:/usr/ccs/lbin:/lib]) # Check for flag to avoid builtin definitions - assumes unix is predefined, # which is not the best choice for supporting other OS'es, but covers most # of the ones we need for now. AC_MSG_CHECKING([if $RAWCPP requires -undef]) AC_LANG_CONFTEST([AC_LANG_SOURCE([[Does cpp redefine unix ?]])]) if test `${RAWCPP} < conftest.$ac_ext | grep -c 'unix'` -eq 1 ; then AC_MSG_RESULT([no]) else if test `${RAWCPP} -undef < conftest.$ac_ext | grep -c 'unix'` -eq 1 ; then RAWCPPFLAGS=-undef AC_MSG_RESULT([yes]) # under Cygwin unix is still defined even with -undef elif test `${RAWCPP} -undef -ansi < conftest.$ac_ext | grep -c 'unix'` -eq 1 ; then RAWCPPFLAGS="-undef -ansi" AC_MSG_RESULT([yes, with -ansi]) else AC_MSG_ERROR([${RAWCPP} defines unix with or without -undef. I don't know what to do.]) fi fi rm -f conftest.$ac_ext AC_MSG_CHECKING([if $RAWCPP requires -traditional]) AC_LANG_CONFTEST([AC_LANG_SOURCE([[Does cpp preserve "whitespace"?]])]) if test `${RAWCPP} < conftest.$ac_ext | grep -c 'preserve \"'` -eq 1 ; then AC_MSG_RESULT([no]) else if test `${RAWCPP} -traditional < conftest.$ac_ext | grep -c 'preserve \"'` -eq 1 ; then RAWCPPFLAGS="${RAWCPPFLAGS} -traditional" AC_MSG_RESULT([yes]) else AC_MSG_ERROR([${RAWCPP} does not preserve whitespace with or without -traditional. I don't know what to do.]) fi fi rm -f conftest.$ac_ext AC_SUBST(RAWCPPFLAGS) ]) # XORG_PROG_RAWCPP # XORG_MANPAGE_SECTIONS() # ----------------------- # Minimum version: 1.0.0 # # Determine which sections man pages go in for the different man page types # on this OS - replaces *ManSuffix settings in old Imake *.cf per-os files. # Not sure if there's any better way than just hardcoding by OS name. # Override default settings by setting environment variables # Added MAN_SUBSTS in version 1.8 # Added AC_PROG_SED in version 1.8 AC_DEFUN([XORG_MANPAGE_SECTIONS],[ AC_REQUIRE([AC_CANONICAL_HOST]) AC_REQUIRE([AC_PROG_SED]) if test x$APP_MAN_SUFFIX = x ; then APP_MAN_SUFFIX=1 fi if test x$APP_MAN_DIR = x ; then APP_MAN_DIR='$(mandir)/man$(APP_MAN_SUFFIX)' fi if test x$LIB_MAN_SUFFIX = x ; then LIB_MAN_SUFFIX=3 fi if test x$LIB_MAN_DIR = x ; then LIB_MAN_DIR='$(mandir)/man$(LIB_MAN_SUFFIX)' fi if test x$FILE_MAN_SUFFIX = x ; then case $host_os in solaris*) FILE_MAN_SUFFIX=4 ;; *) FILE_MAN_SUFFIX=5 ;; esac fi if test x$FILE_MAN_DIR = x ; then FILE_MAN_DIR='$(mandir)/man$(FILE_MAN_SUFFIX)' fi if test x$MISC_MAN_SUFFIX = x ; then case $host_os in solaris*) MISC_MAN_SUFFIX=5 ;; *) MISC_MAN_SUFFIX=7 ;; esac fi if test x$MISC_MAN_DIR = x ; then MISC_MAN_DIR='$(mandir)/man$(MISC_MAN_SUFFIX)' fi if test x$DRIVER_MAN_SUFFIX = x ; then case $host_os in solaris*) DRIVER_MAN_SUFFIX=7 ;; *) DRIVER_MAN_SUFFIX=4 ;; esac fi if test x$DRIVER_MAN_DIR = x ; then DRIVER_MAN_DIR='$(mandir)/man$(DRIVER_MAN_SUFFIX)' fi if test x$ADMIN_MAN_SUFFIX = x ; then case $host_os in solaris*) ADMIN_MAN_SUFFIX=1m ;; *) ADMIN_MAN_SUFFIX=8 ;; esac fi if test x$ADMIN_MAN_DIR = x ; then ADMIN_MAN_DIR='$(mandir)/man$(ADMIN_MAN_SUFFIX)' fi AC_SUBST([APP_MAN_SUFFIX]) AC_SUBST([LIB_MAN_SUFFIX]) AC_SUBST([FILE_MAN_SUFFIX]) AC_SUBST([MISC_MAN_SUFFIX]) AC_SUBST([DRIVER_MAN_SUFFIX]) AC_SUBST([ADMIN_MAN_SUFFIX]) AC_SUBST([APP_MAN_DIR]) AC_SUBST([LIB_MAN_DIR]) AC_SUBST([FILE_MAN_DIR]) AC_SUBST([MISC_MAN_DIR]) AC_SUBST([DRIVER_MAN_DIR]) AC_SUBST([ADMIN_MAN_DIR]) XORG_MAN_PAGE="X Version 11" AC_SUBST([XORG_MAN_PAGE]) MAN_SUBSTS="\ -e 's|__vendorversion__|\"\$(PACKAGE_STRING)\" \"\$(XORG_MAN_PAGE)\"|' \ -e 's|__xorgversion__|\"\$(PACKAGE_STRING)\" \"\$(XORG_MAN_PAGE)\"|' \ -e 's|__xservername__|Xorg|g' \ -e 's|__xconfigfile__|xorg.conf|g' \ -e 's|__projectroot__|\$(prefix)|g' \ -e 's|__apploaddir__|\$(appdefaultdir)|g' \ -e 's|__appmansuffix__|\$(APP_MAN_SUFFIX)|g' \ -e 's|__drivermansuffix__|\$(DRIVER_MAN_SUFFIX)|g' \ -e 's|__adminmansuffix__|\$(ADMIN_MAN_SUFFIX)|g' \ -e 's|__libmansuffix__|\$(LIB_MAN_SUFFIX)|g' \ -e 's|__miscmansuffix__|\$(MISC_MAN_SUFFIX)|g' \ -e 's|__filemansuffix__|\$(FILE_MAN_SUFFIX)|g'" AC_SUBST([MAN_SUBSTS]) ]) # XORG_MANPAGE_SECTIONS # XORG_CHECK_SGML_DOCTOOLS([MIN-VERSION]) # ------------------------ # Minimum version: 1.7.0 # # Defines the variable XORG_SGML_PATH containing the location of X11/defs.ent # provided by xorg-sgml-doctools, if installed. AC_DEFUN([XORG_CHECK_SGML_DOCTOOLS],[ AC_MSG_CHECKING([for X.Org SGML entities m4_ifval([$1],[>= $1])]) XORG_SGML_PATH= PKG_CHECK_EXISTS([xorg-sgml-doctools m4_ifval([$1],[>= $1])], [XORG_SGML_PATH=`$PKG_CONFIG --variable=sgmlrootdir xorg-sgml-doctools`], [m4_ifval([$1],[:], [if test x"$cross_compiling" != x"yes" ; then AC_CHECK_FILE([$prefix/share/sgml/X11/defs.ent], [XORG_SGML_PATH=$prefix/share/sgml]) fi]) ]) # Define variables STYLESHEET_SRCDIR and XSL_STYLESHEET containing # the path and the name of the doc stylesheet if test "x$XORG_SGML_PATH" != "x" ; then AC_MSG_RESULT([$XORG_SGML_PATH]) STYLESHEET_SRCDIR=$XORG_SGML_PATH/X11 XSL_STYLESHEET=$STYLESHEET_SRCDIR/xorg.xsl else AC_MSG_RESULT([no]) fi AC_SUBST(XORG_SGML_PATH) AC_SUBST(STYLESHEET_SRCDIR) AC_SUBST(XSL_STYLESHEET) AM_CONDITIONAL([HAVE_STYLESHEETS], [test "x$XSL_STYLESHEET" != "x"]) ]) # XORG_CHECK_SGML_DOCTOOLS # XORG_CHECK_LINUXDOC # ------------------- # Minimum version: 1.0.0 # # Defines the variable MAKE_TEXT if the necessary tools and # files are found. $(MAKE_TEXT) blah.sgml will then produce blah.txt. # Whether or not the necessary tools and files are found can be checked # with the AM_CONDITIONAL "BUILD_LINUXDOC" AC_DEFUN([XORG_CHECK_LINUXDOC],[ AC_REQUIRE([XORG_CHECK_SGML_DOCTOOLS]) AC_REQUIRE([XORG_WITH_PS2PDF]) AC_PATH_PROG(LINUXDOC, linuxdoc) AC_MSG_CHECKING([whether to build documentation]) if test x$XORG_SGML_PATH != x && test x$LINUXDOC != x ; then BUILDDOC=yes else BUILDDOC=no fi AM_CONDITIONAL(BUILD_LINUXDOC, [test x$BUILDDOC = xyes]) AC_MSG_RESULT([$BUILDDOC]) AC_MSG_CHECKING([whether to build pdf documentation]) if test x$have_ps2pdf != xno && test x$BUILD_PDFDOC != xno; then BUILDPDFDOC=yes else BUILDPDFDOC=no fi AM_CONDITIONAL(BUILD_PDFDOC, [test x$BUILDPDFDOC = xyes]) AC_MSG_RESULT([$BUILDPDFDOC]) MAKE_TEXT="SGML_SEARCH_PATH=$XORG_SGML_PATH GROFF_NO_SGR=y $LINUXDOC -B txt -f" MAKE_PS="SGML_SEARCH_PATH=$XORG_SGML_PATH $LINUXDOC -B latex --papersize=letter --output=ps" MAKE_PDF="$PS2PDF" MAKE_HTML="SGML_SEARCH_PATH=$XORG_SGML_PATH $LINUXDOC -B html --split=0" AC_SUBST(MAKE_TEXT) AC_SUBST(MAKE_PS) AC_SUBST(MAKE_PDF) AC_SUBST(MAKE_HTML) ]) # XORG_CHECK_LINUXDOC # XORG_CHECK_DOCBOOK # ------------------- # Minimum version: 1.0.0 # # Checks for the ability to build output formats from SGML DocBook source. # For XXX in {TXT, PDF, PS, HTML}, the AM_CONDITIONAL "BUILD_XXXDOC" # indicates whether the necessary tools and files are found and, if set, # $(MAKE_XXX) blah.sgml will produce blah.xxx. AC_DEFUN([XORG_CHECK_DOCBOOK],[ AC_REQUIRE([XORG_CHECK_SGML_DOCTOOLS]) BUILDTXTDOC=no BUILDPDFDOC=no BUILDPSDOC=no BUILDHTMLDOC=no AC_PATH_PROG(DOCBOOKPS, docbook2ps) AC_PATH_PROG(DOCBOOKPDF, docbook2pdf) AC_PATH_PROG(DOCBOOKHTML, docbook2html) AC_PATH_PROG(DOCBOOKTXT, docbook2txt) AC_MSG_CHECKING([whether to build text documentation]) if test x$XORG_SGML_PATH != x && test x$DOCBOOKTXT != x && test x$BUILD_TXTDOC != xno; then BUILDTXTDOC=yes fi AM_CONDITIONAL(BUILD_TXTDOC, [test x$BUILDTXTDOC = xyes]) AC_MSG_RESULT([$BUILDTXTDOC]) AC_MSG_CHECKING([whether to build PDF documentation]) if test x$XORG_SGML_PATH != x && test x$DOCBOOKPDF != x && test x$BUILD_PDFDOC != xno; then BUILDPDFDOC=yes fi AM_CONDITIONAL(BUILD_PDFDOC, [test x$BUILDPDFDOC = xyes]) AC_MSG_RESULT([$BUILDPDFDOC]) AC_MSG_CHECKING([whether to build PostScript documentation]) if test x$XORG_SGML_PATH != x && test x$DOCBOOKPS != x && test x$BUILD_PSDOC != xno; then BUILDPSDOC=yes fi AM_CONDITIONAL(BUILD_PSDOC, [test x$BUILDPSDOC = xyes]) AC_MSG_RESULT([$BUILDPSDOC]) AC_MSG_CHECKING([whether to build HTML documentation]) if test x$XORG_SGML_PATH != x && test x$DOCBOOKHTML != x && test x$BUILD_HTMLDOC != xno; then BUILDHTMLDOC=yes fi AM_CONDITIONAL(BUILD_HTMLDOC, [test x$BUILDHTMLDOC = xyes]) AC_MSG_RESULT([$BUILDHTMLDOC]) MAKE_TEXT="SGML_SEARCH_PATH=$XORG_SGML_PATH $DOCBOOKTXT" MAKE_PS="SGML_SEARCH_PATH=$XORG_SGML_PATH $DOCBOOKPS" MAKE_PDF="SGML_SEARCH_PATH=$XORG_SGML_PATH $DOCBOOKPDF" MAKE_HTML="SGML_SEARCH_PATH=$XORG_SGML_PATH $DOCBOOKHTML" AC_SUBST(MAKE_TEXT) AC_SUBST(MAKE_PS) AC_SUBST(MAKE_PDF) AC_SUBST(MAKE_HTML) ]) # XORG_CHECK_DOCBOOK # XORG_WITH_XMLTO([MIN-VERSION], [DEFAULT]) # ---------------- # Minimum version: 1.5.0 # Minimum version for optional DEFAULT argument: 1.11.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-xmlto option, it allows maximum flexibilty in making decisions # as whether or not to use the xmlto package. When DEFAULT is not specified, # --with-xmlto assumes 'auto'. # # Interface to module: # HAVE_XMLTO: used in makefiles to conditionally generate documentation # XMLTO: returns the path of the xmlto program found # returns the path set by the user in the environment # --with-xmlto: 'yes' user instructs the module to use xmlto # 'no' user instructs the module not to use xmlto # # Added in version 1.10.0 # HAVE_XMLTO_TEXT: used in makefiles to conditionally generate text documentation # xmlto for text output requires either lynx, links, or w3m browsers # # If the user sets the value of XMLTO, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_XMLTO],[ AC_ARG_VAR([XMLTO], [Path to xmlto command]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(xmlto, AS_HELP_STRING([--with-xmlto], [Use xmlto to regenerate documentation (default: ]_defopt[)]), [use_xmlto=$withval], [use_xmlto=]_defopt) m4_undefine([_defopt]) if test "x$use_xmlto" = x"auto"; then AC_PATH_PROG([XMLTO], [xmlto]) if test "x$XMLTO" = "x"; then AC_MSG_WARN([xmlto not found - documentation targets will be skipped]) have_xmlto=no else have_xmlto=yes fi elif test "x$use_xmlto" = x"yes" ; then AC_PATH_PROG([XMLTO], [xmlto]) if test "x$XMLTO" = "x"; then AC_MSG_ERROR([--with-xmlto=yes specified but xmlto not found in PATH]) fi have_xmlto=yes elif test "x$use_xmlto" = x"no" ; then if test "x$XMLTO" != "x"; then AC_MSG_WARN([ignoring XMLTO environment variable since --with-xmlto=no was specified]) fi have_xmlto=no else AC_MSG_ERROR([--with-xmlto expects 'yes' or 'no']) fi # Test for a minimum version of xmlto, if provided. m4_ifval([$1], [if test "$have_xmlto" = yes; then # scrape the xmlto version AC_MSG_CHECKING([the xmlto version]) xmlto_version=`$XMLTO --version 2>/dev/null | cut -d' ' -f3` AC_MSG_RESULT([$xmlto_version]) AS_VERSION_COMPARE([$xmlto_version], [$1], [if test "x$use_xmlto" = xauto; then AC_MSG_WARN([xmlto version $xmlto_version found, but $1 needed]) have_xmlto=no else AC_MSG_ERROR([xmlto version $xmlto_version found, but $1 needed]) fi]) fi]) # Test for the ability of xmlto to generate a text target have_xmlto_text=no cat > conftest.xml << "EOF" EOF AS_IF([test "$have_xmlto" = yes], [AS_IF([$XMLTO --skip-validation txt conftest.xml >/dev/null 2>&1], [have_xmlto_text=yes], [AC_MSG_WARN([xmlto cannot generate text format, this format skipped])])]) rm -f conftest.xml AM_CONDITIONAL([HAVE_XMLTO_TEXT], [test $have_xmlto_text = yes]) AM_CONDITIONAL([HAVE_XMLTO], [test "$have_xmlto" = yes]) ]) # XORG_WITH_XMLTO # XORG_WITH_XSLTPROC([MIN-VERSION], [DEFAULT]) # -------------------------------------------- # Minimum version: 1.12.0 # Minimum version for optional DEFAULT argument: 1.12.0 # # XSLT (Extensible Stylesheet Language Transformations) is a declarative, # XML-based language used for the transformation of XML documents. # The xsltproc command line tool is for applying XSLT stylesheets to XML documents. # It is used under the cover by xmlto to generate html files from DocBook/XML. # The XSLT processor is often used as a standalone tool for transformations. # It should not be assumed that this tool is used only to work with documnetation. # When DEFAULT is not specified, --with-xsltproc assumes 'auto'. # # Interface to module: # HAVE_XSLTPROC: used in makefiles to conditionally generate documentation # XSLTPROC: returns the path of the xsltproc program found # returns the path set by the user in the environment # --with-xsltproc: 'yes' user instructs the module to use xsltproc # 'no' user instructs the module not to use xsltproc # have_xsltproc: returns yes if xsltproc found in PATH or no # # If the user sets the value of XSLTPROC, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_XSLTPROC],[ AC_ARG_VAR([XSLTPROC], [Path to xsltproc command]) # Preserves the interface, should it be implemented later m4_ifval([$1], [m4_warn([syntax], [Checking for xsltproc MIN-VERSION is not implemented])]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(xsltproc, AS_HELP_STRING([--with-xsltproc], [Use xsltproc for the transformation of XML documents (default: ]_defopt[)]), [use_xsltproc=$withval], [use_xsltproc=]_defopt) m4_undefine([_defopt]) if test "x$use_xsltproc" = x"auto"; then AC_PATH_PROG([XSLTPROC], [xsltproc]) if test "x$XSLTPROC" = "x"; then AC_MSG_WARN([xsltproc not found - cannot transform XML documents]) have_xsltproc=no else have_xsltproc=yes fi elif test "x$use_xsltproc" = x"yes" ; then AC_PATH_PROG([XSLTPROC], [xsltproc]) if test "x$XSLTPROC" = "x"; then AC_MSG_ERROR([--with-xsltproc=yes specified but xsltproc not found in PATH]) fi have_xsltproc=yes elif test "x$use_xsltproc" = x"no" ; then if test "x$XSLTPROC" != "x"; then AC_MSG_WARN([ignoring XSLTPROC environment variable since --with-xsltproc=no was specified]) fi have_xsltproc=no else AC_MSG_ERROR([--with-xsltproc expects 'yes' or 'no']) fi AM_CONDITIONAL([HAVE_XSLTPROC], [test "$have_xsltproc" = yes]) ]) # XORG_WITH_XSLTPROC # XORG_WITH_PERL([MIN-VERSION], [DEFAULT]) # ---------------------------------------- # Minimum version: 1.15.0 # # PERL (Practical Extraction and Report Language) is a language optimized for # scanning arbitrary text files, extracting information from those text files, # and printing reports based on that information. # # When DEFAULT is not specified, --with-perl assumes 'auto'. # # Interface to module: # HAVE_PERL: used in makefiles to conditionally scan text files # PERL: returns the path of the perl program found # returns the path set by the user in the environment # --with-perl: 'yes' user instructs the module to use perl # 'no' user instructs the module not to use perl # have_perl: returns yes if perl found in PATH or no # # If the user sets the value of PERL, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_PERL],[ AC_ARG_VAR([PERL], [Path to perl command]) # Preserves the interface, should it be implemented later m4_ifval([$1], [m4_warn([syntax], [Checking for perl MIN-VERSION is not implemented])]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(perl, AS_HELP_STRING([--with-perl], [Use perl for extracting information from files (default: ]_defopt[)]), [use_perl=$withval], [use_perl=]_defopt) m4_undefine([_defopt]) if test "x$use_perl" = x"auto"; then AC_PATH_PROG([PERL], [perl]) if test "x$PERL" = "x"; then AC_MSG_WARN([perl not found - cannot extract information and report]) have_perl=no else have_perl=yes fi elif test "x$use_perl" = x"yes" ; then AC_PATH_PROG([PERL], [perl]) if test "x$PERL" = "x"; then AC_MSG_ERROR([--with-perl=yes specified but perl not found in PATH]) fi have_perl=yes elif test "x$use_perl" = x"no" ; then if test "x$PERL" != "x"; then AC_MSG_WARN([ignoring PERL environment variable since --with-perl=no was specified]) fi have_perl=no else AC_MSG_ERROR([--with-perl expects 'yes' or 'no']) fi AM_CONDITIONAL([HAVE_PERL], [test "$have_perl" = yes]) ]) # XORG_WITH_PERL # XORG_WITH_ASCIIDOC([MIN-VERSION], [DEFAULT]) # ---------------- # Minimum version: 1.5.0 # Minimum version for optional DEFAULT argument: 1.11.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-asciidoc option, it allows maximum flexibilty in making decisions # as whether or not to use the asciidoc package. When DEFAULT is not specified, # --with-asciidoc assumes 'auto'. # # Interface to module: # HAVE_ASCIIDOC: used in makefiles to conditionally generate documentation # ASCIIDOC: returns the path of the asciidoc program found # returns the path set by the user in the environment # --with-asciidoc: 'yes' user instructs the module to use asciidoc # 'no' user instructs the module not to use asciidoc # # If the user sets the value of ASCIIDOC, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_ASCIIDOC],[ AC_ARG_VAR([ASCIIDOC], [Path to asciidoc command]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(asciidoc, AS_HELP_STRING([--with-asciidoc], [Use asciidoc to regenerate documentation (default: ]_defopt[)]), [use_asciidoc=$withval], [use_asciidoc=]_defopt) m4_undefine([_defopt]) if test "x$use_asciidoc" = x"auto"; then AC_PATH_PROG([ASCIIDOC], [asciidoc]) if test "x$ASCIIDOC" = "x"; then AC_MSG_WARN([asciidoc not found - documentation targets will be skipped]) have_asciidoc=no else have_asciidoc=yes fi elif test "x$use_asciidoc" = x"yes" ; then AC_PATH_PROG([ASCIIDOC], [asciidoc]) if test "x$ASCIIDOC" = "x"; then AC_MSG_ERROR([--with-asciidoc=yes specified but asciidoc not found in PATH]) fi have_asciidoc=yes elif test "x$use_asciidoc" = x"no" ; then if test "x$ASCIIDOC" != "x"; then AC_MSG_WARN([ignoring ASCIIDOC environment variable since --with-asciidoc=no was specified]) fi have_asciidoc=no else AC_MSG_ERROR([--with-asciidoc expects 'yes' or 'no']) fi m4_ifval([$1], [if test "$have_asciidoc" = yes; then # scrape the asciidoc version AC_MSG_CHECKING([the asciidoc version]) asciidoc_version=`$ASCIIDOC --version 2>/dev/null | cut -d' ' -f2` AC_MSG_RESULT([$asciidoc_version]) AS_VERSION_COMPARE([$asciidoc_version], [$1], [if test "x$use_asciidoc" = xauto; then AC_MSG_WARN([asciidoc version $asciidoc_version found, but $1 needed]) have_asciidoc=no else AC_MSG_ERROR([asciidoc version $asciidoc_version found, but $1 needed]) fi]) fi]) AM_CONDITIONAL([HAVE_ASCIIDOC], [test "$have_asciidoc" = yes]) ]) # XORG_WITH_ASCIIDOC # XORG_WITH_DOXYGEN([MIN-VERSION], [DEFAULT]) # -------------------------------- # Minimum version: 1.5.0 # Minimum version for optional DEFAULT argument: 1.11.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-doxygen option, it allows maximum flexibilty in making decisions # as whether or not to use the doxygen package. When DEFAULT is not specified, # --with-doxygen assumes 'auto'. # # Interface to module: # HAVE_DOXYGEN: used in makefiles to conditionally generate documentation # DOXYGEN: returns the path of the doxygen program found # returns the path set by the user in the environment # --with-doxygen: 'yes' user instructs the module to use doxygen # 'no' user instructs the module not to use doxygen # # If the user sets the value of DOXYGEN, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_DOXYGEN],[ AC_ARG_VAR([DOXYGEN], [Path to doxygen command]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(doxygen, AS_HELP_STRING([--with-doxygen], [Use doxygen to regenerate documentation (default: ]_defopt[)]), [use_doxygen=$withval], [use_doxygen=]_defopt) m4_undefine([_defopt]) if test "x$use_doxygen" = x"auto"; then AC_PATH_PROG([DOXYGEN], [doxygen]) if test "x$DOXYGEN" = "x"; then AC_MSG_WARN([doxygen not found - documentation targets will be skipped]) have_doxygen=no else have_doxygen=yes fi elif test "x$use_doxygen" = x"yes" ; then AC_PATH_PROG([DOXYGEN], [doxygen]) if test "x$DOXYGEN" = "x"; then AC_MSG_ERROR([--with-doxygen=yes specified but doxygen not found in PATH]) fi have_doxygen=yes elif test "x$use_doxygen" = x"no" ; then if test "x$DOXYGEN" != "x"; then AC_MSG_WARN([ignoring DOXYGEN environment variable since --with-doxygen=no was specified]) fi have_doxygen=no else AC_MSG_ERROR([--with-doxygen expects 'yes' or 'no']) fi m4_ifval([$1], [if test "$have_doxygen" = yes; then # scrape the doxygen version AC_MSG_CHECKING([the doxygen version]) doxygen_version=`$DOXYGEN --version 2>/dev/null` AC_MSG_RESULT([$doxygen_version]) AS_VERSION_COMPARE([$doxygen_version], [$1], [if test "x$use_doxygen" = xauto; then AC_MSG_WARN([doxygen version $doxygen_version found, but $1 needed]) have_doxygen=no else AC_MSG_ERROR([doxygen version $doxygen_version found, but $1 needed]) fi]) fi]) AM_CONDITIONAL([HAVE_DOXYGEN], [test "$have_doxygen" = yes]) ]) # XORG_WITH_DOXYGEN # XORG_WITH_GROFF([DEFAULT]) # ---------------- # Minimum version: 1.6.0 # Minimum version for optional DEFAULT argument: 1.11.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-groff option, it allows maximum flexibilty in making decisions # as whether or not to use the groff package. When DEFAULT is not specified, # --with-groff assumes 'auto'. # # Interface to module: # HAVE_GROFF: used in makefiles to conditionally generate documentation # HAVE_GROFF_MM: the memorandum macros (-mm) package # HAVE_GROFF_MS: the -ms macros package # GROFF: returns the path of the groff program found # returns the path set by the user in the environment # --with-groff: 'yes' user instructs the module to use groff # 'no' user instructs the module not to use groff # # Added in version 1.9.0: # HAVE_GROFF_HTML: groff has dependencies to output HTML format: # pnmcut pnmcrop pnmtopng pnmtops from the netpbm package. # psselect from the psutils package. # the ghostcript package. Refer to the grohtml man pages # # If the user sets the value of GROFF, AC_PATH_PROG skips testing the path. # # OS and distros often splits groff in a basic and full package, the former # having the groff program and the later having devices, fonts and macros # Checking for the groff executable is not enough. # # If macros are missing, we cannot assume that groff is useless, so we don't # unset HAVE_GROFF or GROFF env variables. # HAVE_GROFF_?? can never be true while HAVE_GROFF is false. # AC_DEFUN([XORG_WITH_GROFF],[ AC_ARG_VAR([GROFF], [Path to groff command]) m4_define([_defopt], m4_default([$1], [auto])) AC_ARG_WITH(groff, AS_HELP_STRING([--with-groff], [Use groff to regenerate documentation (default: ]_defopt[)]), [use_groff=$withval], [use_groff=]_defopt) m4_undefine([_defopt]) if test "x$use_groff" = x"auto"; then AC_PATH_PROG([GROFF], [groff]) if test "x$GROFF" = "x"; then AC_MSG_WARN([groff not found - documentation targets will be skipped]) have_groff=no else have_groff=yes fi elif test "x$use_groff" = x"yes" ; then AC_PATH_PROG([GROFF], [groff]) if test "x$GROFF" = "x"; then AC_MSG_ERROR([--with-groff=yes specified but groff not found in PATH]) fi have_groff=yes elif test "x$use_groff" = x"no" ; then if test "x$GROFF" != "x"; then AC_MSG_WARN([ignoring GROFF environment variable since --with-groff=no was specified]) fi have_groff=no else AC_MSG_ERROR([--with-groff expects 'yes' or 'no']) fi # We have groff, test for the presence of the macro packages if test "x$have_groff" = x"yes"; then AC_MSG_CHECKING([for ${GROFF} -ms macros]) if ${GROFF} -ms -I. /dev/null >/dev/null 2>&1 ; then groff_ms_works=yes else groff_ms_works=no fi AC_MSG_RESULT([$groff_ms_works]) AC_MSG_CHECKING([for ${GROFF} -mm macros]) if ${GROFF} -mm -I. /dev/null >/dev/null 2>&1 ; then groff_mm_works=yes else groff_mm_works=no fi AC_MSG_RESULT([$groff_mm_works]) fi # We have groff, test for HTML dependencies, one command per package if test "x$have_groff" = x"yes"; then AC_PATH_PROGS(GS_PATH, [gs gswin32c]) AC_PATH_PROG(PNMTOPNG_PATH, [pnmtopng]) AC_PATH_PROG(PSSELECT_PATH, [psselect]) if test "x$GS_PATH" != "x" -a "x$PNMTOPNG_PATH" != "x" -a "x$PSSELECT_PATH" != "x"; then have_groff_html=yes else have_groff_html=no AC_MSG_WARN([grohtml dependencies not found - HTML Documentation skipped. Refer to grohtml man pages]) fi fi # Set Automake conditionals for Makefiles AM_CONDITIONAL([HAVE_GROFF], [test "$have_groff" = yes]) AM_CONDITIONAL([HAVE_GROFF_MS], [test "$groff_ms_works" = yes]) AM_CONDITIONAL([HAVE_GROFF_MM], [test "$groff_mm_works" = yes]) AM_CONDITIONAL([HAVE_GROFF_HTML], [test "$have_groff_html" = yes]) ]) # XORG_WITH_GROFF # XORG_WITH_FOP([MIN-VERSION], [DEFAULT]) # --------------------------------------- # Minimum version: 1.6.0 # Minimum version for optional DEFAULT argument: 1.11.0 # Minimum version for optional MIN-VERSION argument: 1.15.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-fop option, it allows maximum flexibilty in making decisions # as whether or not to use the fop package. When DEFAULT is not specified, # --with-fop assumes 'auto'. # # Interface to module: # HAVE_FOP: used in makefiles to conditionally generate documentation # FOP: returns the path of the fop program found # returns the path set by the user in the environment # --with-fop: 'yes' user instructs the module to use fop # 'no' user instructs the module not to use fop # # If the user sets the value of FOP, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_FOP],[ AC_ARG_VAR([FOP], [Path to fop command]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(fop, AS_HELP_STRING([--with-fop], [Use fop to regenerate documentation (default: ]_defopt[)]), [use_fop=$withval], [use_fop=]_defopt) m4_undefine([_defopt]) if test "x$use_fop" = x"auto"; then AC_PATH_PROG([FOP], [fop]) if test "x$FOP" = "x"; then AC_MSG_WARN([fop not found - documentation targets will be skipped]) have_fop=no else have_fop=yes fi elif test "x$use_fop" = x"yes" ; then AC_PATH_PROG([FOP], [fop]) if test "x$FOP" = "x"; then AC_MSG_ERROR([--with-fop=yes specified but fop not found in PATH]) fi have_fop=yes elif test "x$use_fop" = x"no" ; then if test "x$FOP" != "x"; then AC_MSG_WARN([ignoring FOP environment variable since --with-fop=no was specified]) fi have_fop=no else AC_MSG_ERROR([--with-fop expects 'yes' or 'no']) fi # Test for a minimum version of fop, if provided. m4_ifval([$1], [if test "$have_fop" = yes; then # scrape the fop version AC_MSG_CHECKING([for fop minimum version]) fop_version=`$FOP -version 2>/dev/null | cut -d' ' -f3` AC_MSG_RESULT([$fop_version]) AS_VERSION_COMPARE([$fop_version], [$1], [if test "x$use_fop" = xauto; then AC_MSG_WARN([fop version $fop_version found, but $1 needed]) have_fop=no else AC_MSG_ERROR([fop version $fop_version found, but $1 needed]) fi]) fi]) AM_CONDITIONAL([HAVE_FOP], [test "$have_fop" = yes]) ]) # XORG_WITH_FOP # XORG_WITH_PS2PDF([DEFAULT]) # ---------------- # Minimum version: 1.6.0 # Minimum version for optional DEFAULT argument: 1.11.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a module to test for the # presence of the tool and obtain it's path in separate variables. Coupled with # the --with-ps2pdf option, it allows maximum flexibilty in making decisions # as whether or not to use the ps2pdf package. When DEFAULT is not specified, # --with-ps2pdf assumes 'auto'. # # Interface to module: # HAVE_PS2PDF: used in makefiles to conditionally generate documentation # PS2PDF: returns the path of the ps2pdf program found # returns the path set by the user in the environment # --with-ps2pdf: 'yes' user instructs the module to use ps2pdf # 'no' user instructs the module not to use ps2pdf # # If the user sets the value of PS2PDF, AC_PATH_PROG skips testing the path. # AC_DEFUN([XORG_WITH_PS2PDF],[ AC_ARG_VAR([PS2PDF], [Path to ps2pdf command]) m4_define([_defopt], m4_default([$1], [auto])) AC_ARG_WITH(ps2pdf, AS_HELP_STRING([--with-ps2pdf], [Use ps2pdf to regenerate documentation (default: ]_defopt[)]), [use_ps2pdf=$withval], [use_ps2pdf=]_defopt) m4_undefine([_defopt]) if test "x$use_ps2pdf" = x"auto"; then AC_PATH_PROG([PS2PDF], [ps2pdf]) if test "x$PS2PDF" = "x"; then AC_MSG_WARN([ps2pdf not found - documentation targets will be skipped]) have_ps2pdf=no else have_ps2pdf=yes fi elif test "x$use_ps2pdf" = x"yes" ; then AC_PATH_PROG([PS2PDF], [ps2pdf]) if test "x$PS2PDF" = "x"; then AC_MSG_ERROR([--with-ps2pdf=yes specified but ps2pdf not found in PATH]) fi have_ps2pdf=yes elif test "x$use_ps2pdf" = x"no" ; then if test "x$PS2PDF" != "x"; then AC_MSG_WARN([ignoring PS2PDF environment variable since --with-ps2pdf=no was specified]) fi have_ps2pdf=no else AC_MSG_ERROR([--with-ps2pdf expects 'yes' or 'no']) fi AM_CONDITIONAL([HAVE_PS2PDF], [test "$have_ps2pdf" = yes]) ]) # XORG_WITH_PS2PDF # XORG_ENABLE_DOCS (enable_docs=yes) # ---------------- # Minimum version: 1.6.0 # # Documentation tools are not always available on all platforms and sometimes # not at the appropriate level. This macro enables a builder to skip all # documentation targets except traditional man pages. # Combined with the specific tool checking macros XORG_WITH_*, it provides # maximum flexibilty in controlling documentation building. # Refer to: # XORG_WITH_XMLTO --with-xmlto # XORG_WITH_ASCIIDOC --with-asciidoc # XORG_WITH_DOXYGEN --with-doxygen # XORG_WITH_FOP --with-fop # XORG_WITH_GROFF --with-groff # XORG_WITH_PS2PDF --with-ps2pdf # # Interface to module: # ENABLE_DOCS: used in makefiles to conditionally generate documentation # --enable-docs: 'yes' user instructs the module to generate docs # 'no' user instructs the module not to generate docs # parm1: specify the default value, yes or no. # AC_DEFUN([XORG_ENABLE_DOCS],[ m4_define([docs_default], m4_default([$1], [yes])) AC_ARG_ENABLE(docs, AS_HELP_STRING([--enable-docs], [Enable building the documentation (default: ]docs_default[)]), [build_docs=$enableval], [build_docs=]docs_default) m4_undefine([docs_default]) AM_CONDITIONAL(ENABLE_DOCS, [test x$build_docs = xyes]) AC_MSG_CHECKING([whether to build documentation]) AC_MSG_RESULT([$build_docs]) ]) # XORG_ENABLE_DOCS # XORG_ENABLE_DEVEL_DOCS (enable_devel_docs=yes) # ---------------- # Minimum version: 1.6.0 # # This macro enables a builder to skip all developer documentation. # Combined with the specific tool checking macros XORG_WITH_*, it provides # maximum flexibilty in controlling documentation building. # Refer to: # XORG_WITH_XMLTO --with-xmlto # XORG_WITH_ASCIIDOC --with-asciidoc # XORG_WITH_DOXYGEN --with-doxygen # XORG_WITH_FOP --with-fop # XORG_WITH_GROFF --with-groff # XORG_WITH_PS2PDF --with-ps2pdf # # Interface to module: # ENABLE_DEVEL_DOCS: used in makefiles to conditionally generate developer docs # --enable-devel-docs: 'yes' user instructs the module to generate developer docs # 'no' user instructs the module not to generate developer docs # parm1: specify the default value, yes or no. # AC_DEFUN([XORG_ENABLE_DEVEL_DOCS],[ m4_define([devel_default], m4_default([$1], [yes])) AC_ARG_ENABLE(devel-docs, AS_HELP_STRING([--enable-devel-docs], [Enable building the developer documentation (default: ]devel_default[)]), [build_devel_docs=$enableval], [build_devel_docs=]devel_default) m4_undefine([devel_default]) AM_CONDITIONAL(ENABLE_DEVEL_DOCS, [test x$build_devel_docs = xyes]) AC_MSG_CHECKING([whether to build developer documentation]) AC_MSG_RESULT([$build_devel_docs]) ]) # XORG_ENABLE_DEVEL_DOCS # XORG_ENABLE_SPECS (enable_specs=yes) # ---------------- # Minimum version: 1.6.0 # # This macro enables a builder to skip all functional specification targets. # Combined with the specific tool checking macros XORG_WITH_*, it provides # maximum flexibilty in controlling documentation building. # Refer to: # XORG_WITH_XMLTO --with-xmlto # XORG_WITH_ASCIIDOC --with-asciidoc # XORG_WITH_DOXYGEN --with-doxygen # XORG_WITH_FOP --with-fop # XORG_WITH_GROFF --with-groff # XORG_WITH_PS2PDF --with-ps2pdf # # Interface to module: # ENABLE_SPECS: used in makefiles to conditionally generate specs # --enable-specs: 'yes' user instructs the module to generate specs # 'no' user instructs the module not to generate specs # parm1: specify the default value, yes or no. # AC_DEFUN([XORG_ENABLE_SPECS],[ m4_define([spec_default], m4_default([$1], [yes])) AC_ARG_ENABLE(specs, AS_HELP_STRING([--enable-specs], [Enable building the specs (default: ]spec_default[)]), [build_specs=$enableval], [build_specs=]spec_default) m4_undefine([spec_default]) AM_CONDITIONAL(ENABLE_SPECS, [test x$build_specs = xyes]) AC_MSG_CHECKING([whether to build functional specifications]) AC_MSG_RESULT([$build_specs]) ]) # XORG_ENABLE_SPECS # XORG_ENABLE_UNIT_TESTS (enable_unit_tests=auto) # ---------------------------------------------- # Minimum version: 1.13.0 # # This macro enables a builder to enable/disable unit testing # It makes no assumption about the test cases implementation # Test cases may or may not use Automake "Support for test suites" # They may or may not use the software utility library GLib # # When used in conjunction with XORG_WITH_GLIB, use both AM_CONDITIONAL # ENABLE_UNIT_TESTS and HAVE_GLIB. Not all unit tests may use glib. # The variable enable_unit_tests is used by other macros in this file. # # Interface to module: # ENABLE_UNIT_TESTS: used in makefiles to conditionally build tests # enable_unit_tests: used in configure.ac for additional configuration # --enable-unit-tests: 'yes' user instructs the module to build tests # 'no' user instructs the module not to build tests # parm1: specify the default value, yes or no. # AC_DEFUN([XORG_ENABLE_UNIT_TESTS],[ AC_BEFORE([$0], [XORG_WITH_GLIB]) AC_BEFORE([$0], [XORG_LD_WRAP]) AC_REQUIRE([XORG_MEMORY_CHECK_FLAGS]) m4_define([_defopt], m4_default([$1], [auto])) AC_ARG_ENABLE(unit-tests, AS_HELP_STRING([--enable-unit-tests], [Enable building unit test cases (default: ]_defopt[)]), [enable_unit_tests=$enableval], [enable_unit_tests=]_defopt) m4_undefine([_defopt]) AM_CONDITIONAL(ENABLE_UNIT_TESTS, [test "x$enable_unit_tests" != xno]) AC_MSG_CHECKING([whether to build unit test cases]) AC_MSG_RESULT([$enable_unit_tests]) ]) # XORG_ENABLE_UNIT_TESTS # XORG_ENABLE_INTEGRATION_TESTS (enable_unit_tests=auto) # ------------------------------------------------------ # Minimum version: 1.17.0 # # This macro enables a builder to enable/disable integration testing # It makes no assumption about the test cases' implementation # Test cases may or may not use Automake "Support for test suites" # # Please see XORG_ENABLE_UNIT_TESTS for unit test support. Unit test support # usually requires less dependencies and may be built and run under less # stringent environments than integration tests. # # Interface to module: # ENABLE_INTEGRATION_TESTS: used in makefiles to conditionally build tests # enable_integration_tests: used in configure.ac for additional configuration # --enable-integration-tests: 'yes' user instructs the module to build tests # 'no' user instructs the module not to build tests # parm1: specify the default value, yes or no. # AC_DEFUN([XORG_ENABLE_INTEGRATION_TESTS],[ AC_REQUIRE([XORG_MEMORY_CHECK_FLAGS]) m4_define([_defopt], m4_default([$1], [auto])) AC_ARG_ENABLE(integration-tests, AS_HELP_STRING([--enable-integration-tests], [Enable building integration test cases (default: ]_defopt[)]), [enable_integration_tests=$enableval], [enable_integration_tests=]_defopt) m4_undefine([_defopt]) AM_CONDITIONAL([ENABLE_INTEGRATION_TESTS], [test "x$enable_integration_tests" != xno]) AC_MSG_CHECKING([whether to build unit test cases]) AC_MSG_RESULT([$enable_integration_tests]) ]) # XORG_ENABLE_INTEGRATION_TESTS # XORG_WITH_GLIB([MIN-VERSION], [DEFAULT]) # ---------------------------------------- # Minimum version: 1.13.0 # # GLib is a library which provides advanced data structures and functions. # This macro enables a module to test for the presence of Glib. # # When used with ENABLE_UNIT_TESTS, it is assumed GLib is used for unit testing. # Otherwise the value of $enable_unit_tests is blank. # # Please see XORG_ENABLE_INTEGRATION_TESTS for integration test support. Unit # test support usually requires less dependencies and may be built and run under # less stringent environments than integration tests. # # Interface to module: # HAVE_GLIB: used in makefiles to conditionally build targets # with_glib: used in configure.ac to know if GLib has been found # --with-glib: 'yes' user instructs the module to use glib # 'no' user instructs the module not to use glib # AC_DEFUN([XORG_WITH_GLIB],[ AC_REQUIRE([PKG_PROG_PKG_CONFIG]) m4_define([_defopt], m4_default([$2], [auto])) AC_ARG_WITH(glib, AS_HELP_STRING([--with-glib], [Use GLib library for unit testing (default: ]_defopt[)]), [with_glib=$withval], [with_glib=]_defopt) m4_undefine([_defopt]) have_glib=no # Do not probe GLib if user explicitly disabled unit testing if test "x$enable_unit_tests" != x"no"; then # Do not probe GLib if user explicitly disabled it if test "x$with_glib" != x"no"; then m4_ifval( [$1], [PKG_CHECK_MODULES([GLIB], [glib-2.0 >= $1], [have_glib=yes], [have_glib=no])], [PKG_CHECK_MODULES([GLIB], [glib-2.0], [have_glib=yes], [have_glib=no])] ) fi fi # Not having GLib when unit testing has been explicitly requested is an error if test "x$enable_unit_tests" = x"yes"; then if test "x$have_glib" = x"no"; then AC_MSG_ERROR([--enable-unit-tests=yes specified but glib-2.0 not found]) fi fi # Having unit testing disabled when GLib has been explicitly requested is an error if test "x$enable_unit_tests" = x"no"; then if test "x$with_glib" = x"yes"; then AC_MSG_ERROR([--enable-unit-tests=yes specified but glib-2.0 not found]) fi fi # Not having GLib when it has been explicitly requested is an error if test "x$with_glib" = x"yes"; then if test "x$have_glib" = x"no"; then AC_MSG_ERROR([--with-glib=yes specified but glib-2.0 not found]) fi fi AM_CONDITIONAL([HAVE_GLIB], [test "$have_glib" = yes]) ]) # XORG_WITH_GLIB # XORG_LD_WRAP([required|optional]) # --------------------------------- # Minimum version: 1.13.0 # # Check if linker supports -wrap, passed via compiler flags # # When used with ENABLE_UNIT_TESTS, it is assumed -wrap is used for unit testing. # Otherwise the value of $enable_unit_tests is blank. # # Argument added in 1.16.0 - default is "required", to match existing behavior # of returning an error if enable_unit_tests is yes, and ld -wrap is not # available, an argument of "optional" allows use when some unit tests require # ld -wrap and others do not. # AC_DEFUN([XORG_LD_WRAP],[ XORG_CHECK_LINKER_FLAGS([-Wl,-wrap,exit],[have_ld_wrap=yes],[have_ld_wrap=no], [AC_LANG_PROGRAM([#include void __wrap_exit(int status) { return; }], [exit(0);])]) # Not having ld wrap when unit testing has been explicitly requested is an error if test "x$enable_unit_tests" = x"yes" -a "x$1" != "xoptional"; then if test "x$have_ld_wrap" = x"no"; then AC_MSG_ERROR([--enable-unit-tests=yes specified but ld -wrap support is not available]) fi fi AM_CONDITIONAL([HAVE_LD_WRAP], [test "$have_ld_wrap" = yes]) # ]) # XORG_LD_WRAP # XORG_CHECK_LINKER_FLAGS # ----------------------- # SYNOPSIS # # XORG_CHECK_LINKER_FLAGS(FLAGS, [ACTION-SUCCESS], [ACTION-FAILURE], [PROGRAM-SOURCE]) # # DESCRIPTION # # Check whether the given linker FLAGS work with the current language's # linker, or whether they give an error. # # ACTION-SUCCESS/ACTION-FAILURE are shell commands to execute on # success/failure. # # PROGRAM-SOURCE is the program source to link with, if needed # # NOTE: Based on AX_CHECK_COMPILER_FLAGS. # # LICENSE # # Copyright (c) 2009 Mike Frysinger # Copyright (c) 2009 Steven G. Johnson # Copyright (c) 2009 Matteo Frigo # # This program is free software: you can redistribute it and/or modify it # under the terms of the GNU General Public License as published by the # Free Software Foundation, either version 3 of the License, or (at your # option) any later version. # # This program is distributed in the hope that it will be useful, but # WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General # Public License for more details. # # You should have received a copy of the GNU General Public License along # with this program. If not, see . # # As a special exception, the respective Autoconf Macro's copyright owner # gives unlimited permission to copy, distribute and modify the configure # scripts that are the output of Autoconf when processing the Macro. You # need not follow the terms of the GNU General Public License when using # or distributing such scripts, even though portions of the text of the # Macro appear in them. The GNU General Public License (GPL) does govern # all other use of the material that constitutes the Autoconf Macro. # # This special exception to the GPL applies to versions of the Autoconf # Macro released by the Autoconf Archive. When you make and distribute a # modified version of the Autoconf Macro, you may extend this special # exception to the GPL to apply to your modified version as well.# AC_DEFUN([XORG_CHECK_LINKER_FLAGS], [AC_MSG_CHECKING([whether the linker accepts $1]) dnl Some hackery here since AC_CACHE_VAL can't handle a non-literal varname: AS_LITERAL_IF([$1], [AC_CACHE_VAL(AS_TR_SH(xorg_cv_linker_flags_[$1]), [ ax_save_FLAGS=$LDFLAGS LDFLAGS="$1" AC_LINK_IFELSE([m4_default([$4],[AC_LANG_PROGRAM()])], AS_TR_SH(xorg_cv_linker_flags_[$1])=yes, AS_TR_SH(xorg_cv_linker_flags_[$1])=no) LDFLAGS=$ax_save_FLAGS])], [ax_save_FLAGS=$LDFLAGS LDFLAGS="$1" AC_LINK_IFELSE([AC_LANG_PROGRAM()], eval AS_TR_SH(xorg_cv_linker_flags_[$1])=yes, eval AS_TR_SH(xorg_cv_linker_flags_[$1])=no) LDFLAGS=$ax_save_FLAGS]) eval xorg_check_linker_flags=$AS_TR_SH(xorg_cv_linker_flags_[$1]) AC_MSG_RESULT($xorg_check_linker_flags) if test "x$xorg_check_linker_flags" = xyes; then m4_default([$2], :) else m4_default([$3], :) fi ]) # XORG_CHECK_LINKER_FLAGS # XORG_MEMORY_CHECK_FLAGS # ----------------------- # Minimum version: 1.16.0 # # This macro attempts to find appropriate memory checking functionality # for various platforms which unit testing code may use to catch various # forms of memory allocation and access errors in testing. # # Interface to module: # XORG_MALLOC_DEBUG_ENV - environment variables to set to enable debugging # Usually added to TESTS_ENVIRONMENT in Makefile.am # # If the user sets the value of XORG_MALLOC_DEBUG_ENV, it is used verbatim. # AC_DEFUN([XORG_MEMORY_CHECK_FLAGS],[ AC_REQUIRE([AC_CANONICAL_HOST]) AC_ARG_VAR([XORG_MALLOC_DEBUG_ENV], [Environment variables to enable memory checking in tests]) # Check for different types of support on different platforms case $host_os in solaris*) AC_CHECK_LIB([umem], [umem_alloc], [malloc_debug_env='LD_PRELOAD=libumem.so UMEM_DEBUG=default']) ;; *-gnu*) # GNU libc - Value is used as a single byte bit pattern, # both directly and inverted, so should not be 0 or 255. malloc_debug_env='MALLOC_PERTURB_=15' ;; darwin*) malloc_debug_env='MallocPreScribble=1 MallocScribble=1 DYLD_INSERT_LIBRARIES=/usr/lib/libgmalloc.dylib' ;; *bsd*) malloc_debug_env='MallocPreScribble=1 MallocScribble=1' ;; esac # User supplied flags override default flags if test "x$XORG_MALLOC_DEBUG_ENV" != "x"; then malloc_debug_env="$XORG_MALLOC_DEBUG_ENV" fi AC_SUBST([XORG_MALLOC_DEBUG_ENV],[$malloc_debug_env]) ]) # XORG_WITH_LINT # XORG_CHECK_MALLOC_ZERO # ---------------------- # Minimum version: 1.0.0 # # Defines {MALLOC,XMALLOC,XTMALLOC}_ZERO_CFLAGS appropriately if # malloc(0) returns NULL. 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These arguments will cause the compiler to print various warnings # during compilation AND turn a conservative set of warnings into errors. # # The set of flags supported by BASE_CFLAGS and BASE_CXXFLAGS will grow in # future versions of util-macros as options are added to new compilers. # AC_DEFUN([XORG_COMPILER_FLAGS], [ AC_REQUIRE([XORG_COMPILER_BRAND]) AC_ARG_ENABLE(selective-werror, AS_HELP_STRING([--disable-selective-werror], [Turn off selective compiler errors. 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For now, I don't want them to drown out the other warnings. # XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wlogical-op]) # XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wparentheses]) # XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Wcast-align]) # Turn some warnings into errors, so we don't accidently get successful builds # when there are problems that should be fixed. if test "x$SELECTIVE_WERROR" = "xyes" ; then XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=implicit], [-errwarn=E_NO_EXPLICIT_TYPE_GIVEN -errwarn=E_NO_IMPLICIT_DECL_ALLOWED]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=nonnull]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=init-self]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=main]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=missing-braces]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=sequence-point]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=return-type], [-errwarn=E_FUNC_HAS_NO_RETURN_STMT]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=trigraphs]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=array-bounds]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=write-strings]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=address]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=int-to-pointer-cast], [-errwarn=E_BAD_PTR_INT_COMBINATION]) XORG_TESTSET_CFLAG([[BASE_]PREFIX[FLAGS]], [-Werror=pointer-to-int-cast]) # Also -errwarn=E_BAD_PTR_INT_COMBINATION else AC_MSG_WARN([You have chosen not to turn some select compiler warnings into errors. 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If -fno-strict-aliasing # is needed, then it should be added explicitly in the module when # it is updated to use BASE_CFLAGS. # AC_DEFUN([XORG_CWARNFLAGS], [ AC_REQUIRE([XORG_COMPILER_FLAGS]) AC_REQUIRE([XORG_COMPILER_BRAND]) AC_LANG_CASE( [C], [ CWARNFLAGS="$BASE_CFLAGS" if test "x$GCC" = xyes ; then CWARNFLAGS="$CWARNFLAGS -fno-strict-aliasing" fi AC_SUBST(CWARNFLAGS) ] ) ]) # XORG_CWARNFLAGS # XORG_STRICT_OPTION # ----------------------- # Minimum version: 1.3.0 # # Add configure option to enable strict compilation flags, such as treating # warnings as fatal errors. # If --enable-strict-compilation is passed to configure, adds strict flags to # $BASE_CFLAGS or $BASE_CXXFLAGS and the deprecated $CWARNFLAGS. # # Starting in 1.14.0 also exports $STRICT_CFLAGS for use in other tests or # when strict compilation is unconditionally desired. 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XORG_TESTSET_CFLAG([[STRICT_]PREFIX[FLAGS]], [-Werror=attributes]) if test "x$STRICT_COMPILE" = "xyes"; then [BASE_]PREFIX[FLAGS]="$[BASE_]PREFIX[FLAGS] $[STRICT_]PREFIX[FLAGS]" AC_LANG_CASE([C], [CWARNFLAGS="$CWARNFLAGS $STRICT_CFLAGS"]) fi AC_SUBST([STRICT_]PREFIX[FLAGS]) AC_SUBST([BASE_]PREFIX[FLAGS]) AC_LANG_CASE([C], AC_SUBST([CWARNFLAGS])) ]) # XORG_STRICT_OPTION # XORG_DEFAULT_OPTIONS # -------------------- # Minimum version: 1.3.0 # # Defines default options for X.Org modules. # AC_DEFUN([XORG_DEFAULT_OPTIONS], [ AC_REQUIRE([AC_PROG_INSTALL]) XORG_COMPILER_FLAGS XORG_CWARNFLAGS XORG_STRICT_OPTION XORG_RELEASE_VERSION XORG_CHANGELOG XORG_INSTALL XORG_MANPAGE_SECTIONS m4_ifdef([AM_SILENT_RULES], [AM_SILENT_RULES([yes])], [AC_SUBST([AM_DEFAULT_VERBOSITY], [1])]) ]) # XORG_DEFAULT_OPTIONS # XORG_INSTALL() # ---------------- # Minimum version: 1.4.0 # # Defines the variable INSTALL_CMD as the command to copy # INSTALL from $prefix/share/util-macros. # AC_DEFUN([XORG_INSTALL], [ AC_REQUIRE([PKG_PROG_PKG_CONFIG]) macros_datadir=`$PKG_CONFIG --print-errors --variable=pkgdatadir xorg-macros` INSTALL_CMD="(cp -f "$macros_datadir/INSTALL" \$(top_srcdir)/.INSTALL.tmp && \ mv \$(top_srcdir)/.INSTALL.tmp \$(top_srcdir)/INSTALL) \ || (rm -f \$(top_srcdir)/.INSTALL.tmp; touch \$(top_srcdir)/INSTALL; \ echo 'util-macros \"pkgdatadir\" from xorg-macros.pc not found: installing possibly empty INSTALL.' >&2)" AC_SUBST([INSTALL_CMD]) ]) # XORG_INSTALL dnl Copyright 2005 Red Hat, Inc dnl dnl Permission to use, copy, modify, distribute, and sell this software and its dnl documentation for any purpose is hereby granted without fee, provided that dnl the above copyright notice appear in all copies and that both that dnl copyright notice and this permission notice appear in supporting dnl documentation. dnl dnl The above copyright notice and this permission notice shall be included dnl in all copies or substantial portions of the Software. dnl dnl THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS dnl OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF dnl MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. dnl IN NO EVENT SHALL THE OPEN GROUP BE LIABLE FOR ANY CLAIM, DAMAGES OR dnl OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, dnl ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR dnl OTHER DEALINGS IN THE SOFTWARE. dnl dnl Except as contained in this notice, the name of the copyright holders shall dnl not be used in advertising or otherwise to promote the sale, use or dnl other dealings in this Software without prior written authorization dnl from the copyright holders. dnl # XORG_RELEASE_VERSION # -------------------- # Defines PACKAGE_VERSION_{MAJOR,MINOR,PATCHLEVEL} for modules to use. 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-mint | -mint[0-9]*) basic_machine=m68k-atari os=-mint ;; esac # Decode aliases for certain CPU-COMPANY combinations. case $basic_machine in # Recognize the basic CPU types without company name. # Some are omitted here because they have special meanings below. 1750a | 580 \ | a29k \ | aarch64 | aarch64_be \ | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ | am33_2.0 \ | arc | arceb \ | arm | arm[bl]e | arme[lb] | armv[2-8] | armv[3-8][lb] | armv7[arm] \ | avr | avr32 \ | be32 | be64 \ | bfin \ | c4x | c8051 | clipper \ | d10v | d30v | dlx | dsp16xx \ | epiphany \ | fido | fr30 | frv \ | h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \ | hexagon \ | i370 | i860 | i960 | ia64 \ | ip2k | iq2000 \ | le32 | le64 \ | lm32 \ | m32c | m32r | m32rle | m68000 | m68k | m88k \ | maxq | mb | microblaze | microblazeel | mcore | mep | metag \ | mips | mipsbe | mipseb | mipsel | mipsle \ | mips16 \ | mips64 | mips64el \ | mips64octeon | mips64octeonel \ | mips64orion | mips64orionel \ | mips64r5900 | mips64r5900el \ | mips64vr | mips64vrel \ | mips64vr4100 | mips64vr4100el \ | mips64vr4300 | mips64vr4300el \ | mips64vr5000 | mips64vr5000el \ | mips64vr5900 | mips64vr5900el \ | mipsisa32 | mipsisa32el \ | mipsisa32r2 | mipsisa32r2el \ | mipsisa64 | mipsisa64el \ | mipsisa64r2 | mipsisa64r2el \ | mipsisa64sb1 | mipsisa64sb1el \ | mipsisa64sr71k | mipsisa64sr71kel \ | mipsr5900 | mipsr5900el \ | mipstx39 | mipstx39el \ | mn10200 | mn10300 \ | moxie \ | mt \ | msp430 \ | nds32 | nds32le | nds32be \ | nios | nios2 | nios2eb | nios2el \ | ns16k | ns32k \ | open8 \ | or1k | or32 \ | pdp10 | pdp11 | pj | pjl \ | powerpc | powerpc64 | powerpc64le | powerpcle \ | pyramid \ | rl78 | rx \ | score \ | sh | sh[1234] | sh[24]a | sh[24]aeb | sh[23]e | sh[34]eb | sheb | shbe | shle | sh[1234]le | sh3ele \ | sh64 | sh64le \ | sparc | sparc64 | sparc64b | sparc64v | sparc86x | sparclet | sparclite \ | sparcv8 | sparcv9 | sparcv9b | sparcv9v \ | spu \ | tahoe | tic4x | tic54x | tic55x | tic6x | tic80 | tron \ | ubicom32 \ | v850 | v850e | v850e1 | v850e2 | v850es | v850e2v3 \ | we32k \ | x86 | xc16x | xstormy16 | xtensa \ | z8k | z80) basic_machine=$basic_machine-unknown ;; c54x) basic_machine=tic54x-unknown ;; c55x) basic_machine=tic55x-unknown ;; c6x) basic_machine=tic6x-unknown ;; m6811 | m68hc11 | m6812 | m68hc12 | m68hcs12x | picochip) basic_machine=$basic_machine-unknown os=-none ;; m88110 | m680[12346]0 | m683?2 | m68360 | m5200 | v70 | w65 | z8k) ;; ms1) basic_machine=mt-unknown ;; strongarm | thumb | xscale) basic_machine=arm-unknown ;; xgate) basic_machine=$basic_machine-unknown os=-none ;; xscaleeb) basic_machine=armeb-unknown ;; xscaleel) basic_machine=armel-unknown ;; # We use `pc' rather than `unknown' # because (1) that's what they normally are, and # (2) the word "unknown" tends to confuse beginning users. i*86 | x86_64) basic_machine=$basic_machine-pc ;; # Object if more than one company name word. *-*-*) echo Invalid configuration \`$1\': machine \`$basic_machine\' not recognized 1>&2 exit 1 ;; # Recognize the basic CPU types with company name. 580-* \ | a29k-* \ | aarch64-* | aarch64_be-* \ | alpha-* | alphaev[4-8]-* | alphaev56-* | alphaev6[78]-* \ | alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \ | alphapca5[67]-* | alpha64pca5[67]-* | arc-* | arceb-* \ | arm-* | armbe-* | armle-* | armeb-* | armv*-* \ | avr-* | avr32-* \ | be32-* | be64-* \ | bfin-* | bs2000-* \ | c[123]* | c30-* | [cjt]90-* | c4x-* \ | c8051-* | clipper-* | craynv-* | cydra-* \ | d10v-* | d30v-* | dlx-* \ | elxsi-* \ | f30[01]-* | f700-* | fido-* | fr30-* | frv-* | fx80-* \ | h8300-* | h8500-* \ | hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \ | hexagon-* \ | i*86-* | i860-* | i960-* | ia64-* \ | ip2k-* | iq2000-* \ | le32-* | le64-* \ | lm32-* \ | m32c-* | m32r-* | m32rle-* \ | m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \ | m88110-* | m88k-* | maxq-* | mcore-* | metag-* \ | microblaze-* | microblazeel-* \ | mips-* | mipsbe-* | mipseb-* | mipsel-* | mipsle-* \ | mips16-* \ | mips64-* | mips64el-* \ | mips64octeon-* | mips64octeonel-* \ | mips64orion-* | mips64orionel-* \ | mips64r5900-* | mips64r5900el-* \ | mips64vr-* | mips64vrel-* \ | mips64vr4100-* | mips64vr4100el-* \ | mips64vr4300-* | mips64vr4300el-* \ | mips64vr5000-* | mips64vr5000el-* \ | mips64vr5900-* | mips64vr5900el-* \ | mipsisa32-* | mipsisa32el-* \ | mipsisa32r2-* | mipsisa32r2el-* \ | mipsisa64-* | mipsisa64el-* \ | mipsisa64r2-* | mipsisa64r2el-* \ | mipsisa64sb1-* | mipsisa64sb1el-* \ | mipsisa64sr71k-* | mipsisa64sr71kel-* \ | mipsr5900-* | mipsr5900el-* \ | mipstx39-* | mipstx39el-* \ | mmix-* \ | mt-* \ | msp430-* \ | nds32-* | nds32le-* | nds32be-* \ | nios-* | nios2-* | nios2eb-* | nios2el-* \ | none-* | np1-* | ns16k-* | ns32k-* \ | open8-* \ | orion-* \ | pdp10-* | pdp11-* | pj-* | pjl-* | pn-* | power-* \ | powerpc-* | powerpc64-* | powerpc64le-* | powerpcle-* \ | pyramid-* \ | rl78-* | romp-* | rs6000-* | rx-* \ | sh-* | sh[1234]-* | sh[24]a-* | sh[24]aeb-* | sh[23]e-* | sh[34]eb-* | sheb-* | shbe-* \ | shle-* | sh[1234]le-* | sh3ele-* | sh64-* | sh64le-* \ | sparc-* | sparc64-* | sparc64b-* | sparc64v-* | sparc86x-* | sparclet-* \ | sparclite-* \ | sparcv8-* | sparcv9-* | sparcv9b-* | sparcv9v-* | sv1-* | sx?-* \ | tahoe-* \ | tic30-* | tic4x-* | tic54x-* | tic55x-* | tic6x-* | tic80-* \ | tile*-* \ | tron-* \ | ubicom32-* \ | v850-* | v850e-* | v850e1-* | v850es-* | v850e2-* | v850e2v3-* \ | vax-* \ | we32k-* \ | x86-* | x86_64-* | xc16x-* | xps100-* \ | xstormy16-* | xtensa*-* \ | ymp-* \ | z8k-* | z80-*) ;; # Recognize the basic CPU types without company name, with glob match. xtensa*) basic_machine=$basic_machine-unknown ;; # Recognize the various machine names and aliases which stand # for a CPU type and a company and sometimes even an OS. 386bsd) basic_machine=i386-unknown os=-bsd ;; 3b1 | 7300 | 7300-att | att-7300 | pc7300 | safari | unixpc) basic_machine=m68000-att ;; 3b*) basic_machine=we32k-att ;; a29khif) basic_machine=a29k-amd os=-udi ;; abacus) basic_machine=abacus-unknown ;; adobe68k) basic_machine=m68010-adobe os=-scout ;; alliant | fx80) basic_machine=fx80-alliant ;; altos | altos3068) basic_machine=m68k-altos ;; am29k) basic_machine=a29k-none os=-bsd ;; amd64) basic_machine=x86_64-pc ;; amd64-*) basic_machine=x86_64-`echo $basic_machine | sed 's/^[^-]*-//'` ;; amdahl) basic_machine=580-amdahl os=-sysv ;; amiga | amiga-*) basic_machine=m68k-unknown ;; amigaos | amigados) basic_machine=m68k-unknown os=-amigaos ;; amigaunix | amix) basic_machine=m68k-unknown os=-sysv4 ;; apollo68) basic_machine=m68k-apollo os=-sysv ;; apollo68bsd) basic_machine=m68k-apollo os=-bsd ;; aros) basic_machine=i386-pc os=-aros ;; aux) basic_machine=m68k-apple os=-aux ;; balance) basic_machine=ns32k-sequent os=-dynix ;; blackfin) basic_machine=bfin-unknown os=-linux ;; blackfin-*) basic_machine=bfin-`echo $basic_machine | sed 's/^[^-]*-//'` os=-linux ;; bluegene*) basic_machine=powerpc-ibm os=-cnk ;; c54x-*) basic_machine=tic54x-`echo $basic_machine | sed 's/^[^-]*-//'` ;; c55x-*) basic_machine=tic55x-`echo $basic_machine | sed 's/^[^-]*-//'` ;; c6x-*) basic_machine=tic6x-`echo $basic_machine | sed 's/^[^-]*-//'` ;; c90) basic_machine=c90-cray os=-unicos ;; cegcc) basic_machine=arm-unknown os=-cegcc ;; convex-c1) basic_machine=c1-convex os=-bsd ;; convex-c2) basic_machine=c2-convex os=-bsd ;; convex-c32) basic_machine=c32-convex os=-bsd ;; convex-c34) basic_machine=c34-convex os=-bsd ;; convex-c38) basic_machine=c38-convex os=-bsd ;; cray | j90) basic_machine=j90-cray os=-unicos ;; craynv) basic_machine=craynv-cray os=-unicosmp ;; cr16 | cr16-*) basic_machine=cr16-unknown os=-elf ;; crds | unos) basic_machine=m68k-crds ;; crisv32 | crisv32-* | etraxfs*) basic_machine=crisv32-axis ;; cris | cris-* | etrax*) basic_machine=cris-axis ;; crx) basic_machine=crx-unknown os=-elf ;; da30 | da30-*) basic_machine=m68k-da30 ;; decstation | decstation-3100 | pmax | pmax-* | pmin | dec3100 | decstatn) basic_machine=mips-dec ;; decsystem10* | dec10*) basic_machine=pdp10-dec os=-tops10 ;; decsystem20* | dec20*) basic_machine=pdp10-dec os=-tops20 ;; delta | 3300 | motorola-3300 | motorola-delta \ | 3300-motorola | delta-motorola) basic_machine=m68k-motorola ;; delta88) basic_machine=m88k-motorola os=-sysv3 ;; dicos) basic_machine=i686-pc os=-dicos ;; djgpp) basic_machine=i586-pc os=-msdosdjgpp ;; dpx20 | dpx20-*) basic_machine=rs6000-bull os=-bosx ;; dpx2* | dpx2*-bull) basic_machine=m68k-bull os=-sysv3 ;; ebmon29k) basic_machine=a29k-amd os=-ebmon ;; elxsi) basic_machine=elxsi-elxsi os=-bsd ;; encore | umax | mmax) basic_machine=ns32k-encore ;; es1800 | OSE68k | ose68k | ose | OSE) basic_machine=m68k-ericsson os=-ose ;; fx2800) basic_machine=i860-alliant ;; genix) basic_machine=ns32k-ns ;; gmicro) basic_machine=tron-gmicro os=-sysv ;; go32) basic_machine=i386-pc os=-go32 ;; h3050r* | hiux*) basic_machine=hppa1.1-hitachi os=-hiuxwe2 ;; h8300hms) basic_machine=h8300-hitachi os=-hms ;; h8300xray) basic_machine=h8300-hitachi os=-xray ;; h8500hms) basic_machine=h8500-hitachi os=-hms ;; harris) basic_machine=m88k-harris os=-sysv3 ;; hp300-*) basic_machine=m68k-hp ;; hp300bsd) basic_machine=m68k-hp os=-bsd ;; hp300hpux) basic_machine=m68k-hp os=-hpux ;; hp3k9[0-9][0-9] | hp9[0-9][0-9]) basic_machine=hppa1.0-hp ;; hp9k2[0-9][0-9] | hp9k31[0-9]) basic_machine=m68000-hp ;; hp9k3[2-9][0-9]) basic_machine=m68k-hp ;; hp9k6[0-9][0-9] | hp6[0-9][0-9]) basic_machine=hppa1.0-hp ;; hp9k7[0-79][0-9] | hp7[0-79][0-9]) basic_machine=hppa1.1-hp ;; hp9k78[0-9] | hp78[0-9]) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; hp9k8[67]1 | hp8[67]1 | hp9k80[24] | hp80[24] | hp9k8[78]9 | hp8[78]9 | hp9k893 | hp893) # FIXME: really hppa2.0-hp basic_machine=hppa1.1-hp ;; hp9k8[0-9][13679] | hp8[0-9][13679]) basic_machine=hppa1.1-hp ;; hp9k8[0-9][0-9] | hp8[0-9][0-9]) basic_machine=hppa1.0-hp ;; hppa-next) os=-nextstep3 ;; hppaosf) basic_machine=hppa1.1-hp os=-osf ;; hppro) basic_machine=hppa1.1-hp os=-proelf ;; i370-ibm* | ibm*) basic_machine=i370-ibm ;; i*86v32) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv32 ;; i*86v4*) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv4 ;; i*86v) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-sysv ;; i*86sol2) basic_machine=`echo $1 | sed -e 's/86.*/86-pc/'` os=-solaris2 ;; i386mach) basic_machine=i386-mach os=-mach ;; i386-vsta | vsta) basic_machine=i386-unknown os=-vsta ;; iris | iris4d) basic_machine=mips-sgi case $os in -irix*) ;; *) os=-irix4 ;; esac ;; isi68 | isi) basic_machine=m68k-isi os=-sysv ;; m68knommu) basic_machine=m68k-unknown os=-linux ;; m68knommu-*) basic_machine=m68k-`echo $basic_machine | sed 's/^[^-]*-//'` os=-linux ;; m88k-omron*) basic_machine=m88k-omron ;; magnum | m3230) basic_machine=mips-mips os=-sysv ;; merlin) basic_machine=ns32k-utek os=-sysv ;; microblaze*) basic_machine=microblaze-xilinx ;; mingw64) basic_machine=x86_64-pc os=-mingw64 ;; mingw32) basic_machine=i686-pc os=-mingw32 ;; mingw32ce) basic_machine=arm-unknown os=-mingw32ce ;; miniframe) basic_machine=m68000-convergent ;; *mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*) basic_machine=m68k-atari os=-mint ;; mips3*-*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'` ;; mips3*) basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`-unknown ;; monitor) basic_machine=m68k-rom68k os=-coff ;; morphos) basic_machine=powerpc-unknown os=-morphos ;; msdos) basic_machine=i386-pc os=-msdos ;; ms1-*) basic_machine=`echo $basic_machine | sed -e 's/ms1-/mt-/'` ;; msys) basic_machine=i686-pc os=-msys ;; mvs) basic_machine=i370-ibm os=-mvs ;; nacl) basic_machine=le32-unknown os=-nacl ;; ncr3000) basic_machine=i486-ncr os=-sysv4 ;; netbsd386) basic_machine=i386-unknown os=-netbsd ;; netwinder) basic_machine=armv4l-rebel os=-linux ;; news | news700 | news800 | news900) basic_machine=m68k-sony os=-newsos ;; news1000) basic_machine=m68030-sony os=-newsos ;; news-3600 | risc-news) basic_machine=mips-sony os=-newsos ;; necv70) basic_machine=v70-nec os=-sysv ;; next | m*-next ) basic_machine=m68k-next case $os in -nextstep* ) ;; -ns2*) os=-nextstep2 ;; *) os=-nextstep3 ;; esac ;; nh3000) basic_machine=m68k-harris os=-cxux ;; nh[45]000) basic_machine=m88k-harris os=-cxux ;; nindy960) basic_machine=i960-intel os=-nindy ;; mon960) basic_machine=i960-intel os=-mon960 ;; nonstopux) basic_machine=mips-compaq os=-nonstopux ;; np1) basic_machine=np1-gould ;; neo-tandem) basic_machine=neo-tandem ;; nse-tandem) basic_machine=nse-tandem ;; nsr-tandem) basic_machine=nsr-tandem ;; op50n-* | op60c-*) basic_machine=hppa1.1-oki os=-proelf ;; openrisc | openrisc-*) basic_machine=or32-unknown ;; os400) basic_machine=powerpc-ibm os=-os400 ;; OSE68000 | ose68000) basic_machine=m68000-ericsson os=-ose ;; os68k) basic_machine=m68k-none os=-os68k ;; pa-hitachi) basic_machine=hppa1.1-hitachi os=-hiuxwe2 ;; paragon) basic_machine=i860-intel os=-osf ;; parisc) basic_machine=hppa-unknown os=-linux ;; parisc-*) basic_machine=hppa-`echo $basic_machine | sed 's/^[^-]*-//'` os=-linux ;; pbd) basic_machine=sparc-tti ;; pbb) basic_machine=m68k-tti ;; pc532 | pc532-*) basic_machine=ns32k-pc532 ;; pc98) basic_machine=i386-pc ;; pc98-*) basic_machine=i386-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentium | p5 | k5 | k6 | nexgen | viac3) basic_machine=i586-pc ;; pentiumpro | p6 | 6x86 | athlon | athlon_*) basic_machine=i686-pc ;; pentiumii | pentium2 | pentiumiii | pentium3) basic_machine=i686-pc ;; pentium4) basic_machine=i786-pc ;; pentium-* | p5-* | k5-* | k6-* | nexgen-* | viac3-*) basic_machine=i586-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentiumpro-* | p6-* | 6x86-* | athlon-*) basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentiumii-* | pentium2-* | pentiumiii-* | pentium3-*) basic_machine=i686-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pentium4-*) basic_machine=i786-`echo $basic_machine | sed 's/^[^-]*-//'` ;; pn) basic_machine=pn-gould ;; power) basic_machine=power-ibm ;; ppc | ppcbe) basic_machine=powerpc-unknown ;; ppc-* | ppcbe-*) basic_machine=powerpc-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppcle | powerpclittle | ppc-le | powerpc-little) basic_machine=powerpcle-unknown ;; ppcle-* | powerpclittle-*) basic_machine=powerpcle-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppc64) basic_machine=powerpc64-unknown ;; ppc64-*) basic_machine=powerpc64-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ppc64le | powerpc64little | ppc64-le | powerpc64-little) basic_machine=powerpc64le-unknown ;; ppc64le-* | powerpc64little-*) basic_machine=powerpc64le-`echo $basic_machine | sed 's/^[^-]*-//'` ;; ps2) basic_machine=i386-ibm ;; pw32) basic_machine=i586-unknown os=-pw32 ;; rdos | rdos64) basic_machine=x86_64-pc os=-rdos ;; rdos32) basic_machine=i386-pc os=-rdos ;; rom68k) basic_machine=m68k-rom68k os=-coff ;; rm[46]00) basic_machine=mips-siemens ;; rtpc | rtpc-*) basic_machine=romp-ibm ;; s390 | s390-*) basic_machine=s390-ibm ;; s390x | s390x-*) basic_machine=s390x-ibm ;; sa29200) basic_machine=a29k-amd os=-udi ;; sb1) basic_machine=mipsisa64sb1-unknown ;; sb1el) basic_machine=mipsisa64sb1el-unknown ;; sde) basic_machine=mipsisa32-sde os=-elf ;; sei) basic_machine=mips-sei os=-seiux ;; sequent) basic_machine=i386-sequent ;; sh) basic_machine=sh-hitachi os=-hms ;; sh5el) basic_machine=sh5le-unknown ;; sh64) basic_machine=sh64-unknown ;; sparclite-wrs | simso-wrs) basic_machine=sparclite-wrs os=-vxworks ;; sps7) basic_machine=m68k-bull os=-sysv2 ;; spur) basic_machine=spur-unknown ;; st2000) basic_machine=m68k-tandem ;; stratus) basic_machine=i860-stratus os=-sysv4 ;; strongarm-* | thumb-*) basic_machine=arm-`echo $basic_machine | sed 's/^[^-]*-//'` ;; sun2) basic_machine=m68000-sun ;; sun2os3) basic_machine=m68000-sun os=-sunos3 ;; sun2os4) basic_machine=m68000-sun os=-sunos4 ;; sun3os3) basic_machine=m68k-sun os=-sunos3 ;; sun3os4) basic_machine=m68k-sun os=-sunos4 ;; sun4os3) basic_machine=sparc-sun os=-sunos3 ;; sun4os4) basic_machine=sparc-sun os=-sunos4 ;; sun4sol2) basic_machine=sparc-sun os=-solaris2 ;; sun3 | sun3-*) basic_machine=m68k-sun ;; sun4) basic_machine=sparc-sun ;; sun386 | sun386i | roadrunner) basic_machine=i386-sun ;; sv1) basic_machine=sv1-cray os=-unicos ;; symmetry) basic_machine=i386-sequent os=-dynix ;; t3e) basic_machine=alphaev5-cray os=-unicos ;; t90) basic_machine=t90-cray os=-unicos ;; tile*) basic_machine=$basic_machine-unknown os=-linux-gnu ;; tx39) basic_machine=mipstx39-unknown ;; tx39el) basic_machine=mipstx39el-unknown ;; toad1) basic_machine=pdp10-xkl os=-tops20 ;; tower | tower-32) basic_machine=m68k-ncr ;; tpf) basic_machine=s390x-ibm os=-tpf ;; udi29k) basic_machine=a29k-amd os=-udi ;; ultra3) basic_machine=a29k-nyu os=-sym1 ;; v810 | necv810) basic_machine=v810-nec os=-none ;; vaxv) basic_machine=vax-dec os=-sysv ;; vms) basic_machine=vax-dec os=-vms ;; vpp*|vx|vx-*) basic_machine=f301-fujitsu ;; vxworks960) basic_machine=i960-wrs os=-vxworks ;; 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